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Datasets:
SAIFIINDUSTRIES
/
verilog_data-2
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Files
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xet
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main
verilog_data-2
/
BerkeleyLab_Bedrock
/
rtsim
97.8 kB
1 contributor
History:
1 commit
SAIFIINDUSTRIES
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7df9186
verified
4 days ago
doc
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README.md
4.63 kB
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a_compress.py
1.55 kB
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a_compress.v
1.72 kB
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a_compress_tb.v
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adc_em.v
2.19 kB
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afilter_siso.v
2.33 kB
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afilter_siso_tb.v
2.14 kB
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beam.v
1.21 kB
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beam_tb.v
1.02 kB
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cav_elec.v
6.9 kB
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cav_elec_tb.v
4.43 kB
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cav_freq.v
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cav_mech.v
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cav_mode.v
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cav_mode_check.py
2.35 kB
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cav_mode_tb.v
2.66 kB
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dot_prod.v
1.17 kB
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filte2.py
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lp_pair.v
1.35 kB
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mag_square.v
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outer_prod.v
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outer_prod_tb.v
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pair_couple.v
2.5 kB
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param.py
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ph_gacc.v
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prng.v
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resonator.v
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resonator_check.py
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resonator_tb.v
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rtsim.v
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rtsim_tb.v
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rtsim_test.py
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station.v
4.36 kB
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