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verilog_data-1

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verilog_data-1 / AngeloJacobo_UberDDR3 /rtl /axi

104 kB

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History: 1 commit

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Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3)

12bef33 verified 7 days ago

axi_addr.v

6.84 kB
Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3) 7 days ago
axim2wbsp.v

9.25 kB
Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3) 7 days ago
aximrd2wbsp.v

18.7 kB
Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3) 7 days ago
aximwr2wbsp.v

19 kB
Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3) 7 days ago
ddr3_top_axi.v

15.7 kB
Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3) 7 days ago
sfifo.v

11.2 kB
Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3) 7 days ago
skidbuffer.v

12.4 kB
Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3) 7 days ago
wbarbiter.v

11.3 kB
Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3) 7 days ago