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Datasets:
SAIFIINDUSTRIES
/
verilog_data-2
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0
Dataset card
Files
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xet
Community
main
verilog_data-2
/
BerkeleyLab_Bedrock
/
fpga_family
/
xilinx
24.8 kB
1 contributor
History:
1 commit
SAIFIINDUSTRIES
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7df9186
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5 days ago
BUFG.v
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BUFGCE.v
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BUFG_GT.v
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BUFH.v
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BUFIO.v
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BUFR.v
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FD.v
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IBUF.v
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IBUFDS.v
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IBUFDS_GTE2.v
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IBUFDS_GTE4.v
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IBUFGDS.v
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IDDR.v
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IDELAYCTRL.v
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IDELAYE2.v
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IOBUF.v
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MMCME2_BASE.v
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MMCME4_ADV.v
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OBUF.v
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OBUFDS.v
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ODDR.v
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README.md
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fake_xadc.v
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xadc_tempvoltmon.v
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xadc_tempvoltmon_tb.v
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xilinx7_clocks.v
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