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Datasets:
SAIFIINDUSTRIES
/
verilog_data-2
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Files
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xet
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main
verilog_data-2
/
BerkeleyLab_Bedrock
/
badger
1 contributor
History:
1 commit
SAIFIINDUSTRIES
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doc
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tests
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README.md
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base_rx_mac.v
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collect_clients.py
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construct.v
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crc8e_guts.v
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ethernet_crc_add.v
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flash.md
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hack_icmp_cksum.v
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hello.v
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lb_gateway.v
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lbus_access.py
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mac_subset.v
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mem_gate.md
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mem_gateway.v
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ones_chksum.v
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packet_categorize.v
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pbuf_writer.v
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precog.v
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rtefi_center.v
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rtefi_notes.txt
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rtefi_preblob.v
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scanner.v
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speed_test.v
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spi_flash.v
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spi_flash_engine.v
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status.md
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test_tx_mac.v
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tx_gen.py
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udp_port_cam.v
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xformer.v
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