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verilog_data-1 / AngeloJacobo_UberDDR3 /testbench /spd_tb

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Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3)

12bef33 verified 6 days ago

i2c_slave.v

12.9 kB
Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3) 6 days ago
spd_reader_tb.sv

817 Bytes
Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3) 6 days ago
spd_reader_tb_behav.wcfg

9.15 kB
Add batch 5 (vicharak-in_shrike, hunterlew_convolution_network_on_FPGA, jhshi_openofdm, dpretet_async_fifo, AngeloJacobo_UberDDR3) 6 days ago