BerkeleyLab_Bedrock/.gitlab/ci/soc.gitlab-ci.yml

soc_picorv32_test:
  extends: .build-matrix
  image: $IMAGE
  before_script:
    - cd soc/picorv32/test
  stage: test
  script:
    - make

# soc_picorv32_unisims_test:
#   before_script:
#     - cd soc/picorv32/test/zest
#   stage: test
#   script:
#     - XILINX_VIVADO=/non-free/Xilinx/Vivado/2019.1 PATH=$XILINX_VIVADO/bin:$PATH make

soc_picorv32_kc705:
  extends: .build-matrix
  image: $IMAGE
  stage: synthesis
  before_script:
    - cd soc/picorv32/project/kc705/synth
  script:
      # Run kc705 with older version of Vivado that has suport to non-webpack FPGAs
    - XILINXD_LICENSE_FILE=$XILINXD_LICENSE_FILE XILINX_VIVADO=/non-free/Xilinx/Vivado/2018.3 PATH=$XILINX_VIVADO/bin:$PATH make system_top.bit
  artifacts:
    name: "$CI_JOB_NAME-$CI_COMMIT_REF_NAME"
    expire_in: 1 week
    paths:
      - soc/picorv32/project/kc705/synth/system_top.bit

soc_picorv32_cmod_a7:
  extends: .build-matrix
  image: $IMAGE
  stage: synthesis
  before_script:
    - cd soc/picorv32/project/cmod_a7/synth
  script:
    - PATH=$XILINX_VIVADO/bin:$PATH make system_top.bit
  artifacts:
    name: "$CI_JOB_NAME-$CI_COMMIT_REF_NAME"
    expire_in: 1 week
    paths:
      - soc/picorv32/project/cmod_a7/synth/system_top.bit

soc_picorv32_cmod_a7_run:
  extends: .build-matrix
  image: $IMAGE
  stage: program
  dependencies:
    - soc_picorv32_cmod_a7
  before_script:
    - cd soc/picorv32/project/cmod_a7
  script:
    - xc3sprog -c jtaghs1_fast -s 210328A6DA47 synth/system_top.bit && python3 hw_test.py 210328A6DA47
  environment: hw_cmod_a7
  resource_group: hw_cmod_a7