verilog_data-1 / Nitcloud_Digital-IDE

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SAIFIINDUSTRIES

Add batch 7 (XUANTIE-RV_openc906, osresearch_spispy, efabless_caravel, ZipCPU_sdspi, Nitcloud_Digital-IDE)

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.vscode
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IP_repo
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config
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images
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lib
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node_modules
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out
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resources
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snippets
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src
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syntaxes
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.eslintrc.json

429 Bytes
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.vscodeignore
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CHANGELOG.md
2.23 kB
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LICENSE.txt

35.1 kB
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README.md
13.2 kB
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fpga-support-0.2.5.vsix

28.2 MB
xet

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package.json
29.4 kB
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prjInitParam.json
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property-schema.json
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system.drawio
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test.js
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token
52 Bytes
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toolchain-flow.svg
117 kB
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webpack.config.js
558 Bytes
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