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Datasets:
SAIFIINDUSTRIES
/
verilog_data-1
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Files
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xet
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27be9c5
verilog_data-1
/
EttusResearch_uhd
/
.ci
/
fpga
/
scripts
5.44 kB
1 contributor
History:
1 commit
SAIFIINDUSTRIES
Add batch 1 (tiny-tpu-v2_tiny-tpu, chili-chips-ba_wireguard-fpga, ultraembedded_biriscv, EttusResearch_uhd, circuitvalley_USB_C_Industrial_Camera_FPGA_USB3)
7b1962c
verified
6 days ago
merge_modelsim_ini.py
Safe
622 Bytes
Add batch 1 (tiny-tpu-v2_tiny-tpu, chili-chips-ba_wireguard-fpga, ultraembedded_biriscv, EttusResearch_uhd, circuitvalley_USB_C_Industrial_Camera_FPGA_USB3)
6 days ago
refresh_ip.sh
Safe
1.31 kB
Add batch 1 (tiny-tpu-v2_tiny-tpu, chili-chips-ba_wireguard-fpga, ultraembedded_biriscv, EttusResearch_uhd, circuitvalley_USB_C_Industrial_Camera_FPGA_USB3)
6 days ago
run_setup.sh
Safe
3.5 kB
Add batch 1 (tiny-tpu-v2_tiny-tpu, chili-chips-ba_wireguard-fpga, ultraembedded_biriscv, EttusResearch_uhd, circuitvalley_USB_C_Industrial_Camera_FPGA_USB3)
6 days ago
