Add batch 1 (tiny-tpu-v2_tiny-tpu, chili-chips-ba_wireguard-fpga, ultraembedded_biriscv, EttusResearch_uhd, circuitvalley_USB_C_Industrial_Camera_FPGA_USB3)

.gitattributes

@@ -257,3 +257,135 @@ aolofsson_oh/gpio/fpga/dummy.elf filter=lfs diff=lfs merge=lfs -text
 aolofsson_oh/parallella/fpga/headless_e16_z7010/dummy.elf filter=lfs diff=lfs merge=lfs -text
 aolofsson_oh/parallella/fpga/headless_e16_z7020/dummy.elf filter=lfs diff=lfs merge=lfs -text
 aolofsson_oh/spi/fpga/dummy.elf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev2/inband_1rxhb_1tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev2/inband_2rxhb_2tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev2/multi_2rxhb_2tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev2/multi_4rx_0tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev2/std_2rxhb_2tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev2/std_4rx_0tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev4/inband_1rxhb_1tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev4/inband_2rxhb_2tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev4/multi_2rxhb_2tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev4/multi_4rx_0tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev4/std_2rxhb_2tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp1/rbf/rev4/std_4rx_0tx.rbf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp2/boot_cpld/boot_cpld.ise filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp2/opencores/i2c/doc/src/I2C_specs.doc filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp2/opencores/spi/doc/src/spi.doc filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp3/lib/wb_spi/doc/src/spi.doc filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp3/top/b200/planahead/planahead.runs/impl_1/b200.xdl filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp3/top/b300/netlists/b310_g2x4_host_interface.edf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp3/top/b300/netlists/b310_jesd204b.edf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp3/top/n3xx/dboards/mg/db_ifc/Jesd204bXcvrCore.edf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp3/top/n3xx/dboards/mg/doc/mg_timing.xlsx filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp3/top/n3xx/dboards/rh/db_ifc/Jesd204bXcvrCore.edf filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp3/top/n3xx/dboards/rh/doc/rh_timing.xlsx filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp3/top/n3xx/doc/mb_timing.xlsx filter=lfs diff=lfs merge=lfs -text
+EttusResearch_uhd/fpga/usrp3/top/x400/cpld/ip/cmi/PcieCmi.qxp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/eth_data_fifo/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/icmp_rx_ram_8_256/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/ila_0/hdl/blk_mem_gen_v8_3_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/ila_0/ila_0.dcp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/ila_0_1/hdl/blk_mem_gen_v8_3_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/ila_0_1/ila_0.dcp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/len_fifo/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/udp_checksum_fifo/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/udp_ram_8_2048/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/udp_rx_ram_8_2048/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/udp_tx_data_fifo/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/01_rtl/ethernet_test/rgmii_ethernet/eth_test.srcs/sources_1/ip/udp_tx_data_fifo/udp_tx_data_fifo.dcp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/04_PCB/01_Schematics_PDF/AX7201-Carrier.brd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/04_PCB/03_Assembly_Drawings/AX7201_Carrier_Assembly.dxf filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/05_component_datasheets/ft232h/CDM[[:space:]]v2.12.28[[:space:]]WHQL[[:space:]]Certified_x64/amd64/ftdibus.sys filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/05_component_datasheets/ft232h/CDM[[:space:]]v2.12.28[[:space:]]WHQL[[:space:]]Certified_x64/i386/ftdibus.sys filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/06_App_Notes/AN108/ADDA.JPG filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/06_App_Notes/AN926/PCB-Sources/ALINX9226结构图.PcbDoc filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Alinx/AX7201_examples/08_HDMI/TMDS.doc filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/Crypto/PipelineC-Wireguard.pptx filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/0.doc/SystemVerilog/1.SystemVerilog-Coding-Standards.docx filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/FontAwesome/fa-solid-900.eot filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/FontAwesome/fa-solid-900.ttf filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-bold.eot filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-bold.ttf filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-bold.woff filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-bold.woff2 filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-bolditalic.eot filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-bolditalic.ttf filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-bolditalic.woff filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-bolditalic.woff2 filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-italic.eot filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-italic.ttf filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-italic.woff filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-italic.woff2 filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-regular.eot filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-regular.ttf filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-regular.woff filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/Lato/lato-regular.woff2 filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/RobotoSlab/roboto-slab-v7-bold.ttf filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/csr_build/generated-files/html/fonts/RobotoSlab/roboto-slab-v7-regular.ttf filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/hw_build.openXC7/build_artifacts/top.fasm filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/hw_build.openXC7/build_artifacts/top.frames filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/3.build/hw_build.openXC7/build_artifacts/top.json filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/4.sim/libuser.a filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/4.sim/libvproc.a filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/4.sim/models/rv32/lib/librv32lnx.a filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/4.sim/models/rv32/lib/librv32win.a filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/eth_data_fifo/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/icmp_rx_ram_8_256/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/ila_0/hdl/blk_mem_gen_v8_3_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/ila_0/ila_0.dcp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/ila_0_1/hdl/blk_mem_gen_v8_3_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/ila_0_1/ila_0.dcp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/len_fifo/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/udp_checksum_fifo/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/udp_ram_8_2048/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/udp_rx_ram_8_2048/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/udp_tx_data_fifo/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/1.hw-eth-test/eth_test.srcs/sources_1/ip/udp_tx_data_fifo/udp_tx_data_fifo.dcp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/3.hw-eth-test-axis/ethernet_4port/ethernet_4port.runs/impl_1/ethernet_4port_opt.dcp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/3.hw-eth-test-axis/ethernet_4port/ethernet_4port.runs/impl_1/ethernet_4port_physopt.dcp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/3.hw-eth-test-axis/ethernet_4port/ethernet_4port.runs/impl_1/ethernet_4port_placed.dcp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/3.hw-eth-test-axis/ethernet_4port/ethernet_4port.runs/impl_1/ethernet_4port_power_routed.rpx filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/3.hw-eth-test-axis/ethernet_4port/ethernet_4port.runs/impl_1/ethernet_4port_routed.dcp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/3.hw-eth-test-axis/ethernet_4port/ethernet_4port.runs/impl_1/ethernet_4port_timing_summary_routed.rpx filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/3.hw-eth-test-axis/ethernet_4port/ethernet_4port.runs/synth_1/ethernet_4port.dcp filter=lfs diff=lfs merge=lfs -text
+chili-chips-ba_wireguard-fpga/99.warmup/3.hw-eth-test-axis/ethernet_4port/ethernet_4port.srcs/utils_1/imports/synth_1/ethernet_4port.dcp filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Cypress_FX3_USB_Firmware/Image/USB_C_FX3_CV.img filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/01_Camera_Sensors/IMX290_IMX327_IMX462/PCB_Source/IMX290_module_pcb.PcbDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/01_Camera_Sensors/IMX290_IMX327_IMX462/PCB_Source/IMX290_module_sch.SchDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/01_Camera_Sensors/IMX477/PCB[[:space:]]Source/imx477.PcbDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/01_Camera_Sensors/IMX477/PCB[[:space:]]Source/imx477_sensor.SchDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/02_FPGA_Core/PCB_Source/FPGA_Core_FX3.PcbDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/02_FPGA_Core/PCB_Source/camera.SchDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/02_FPGA_Core/PCB_Source/fpga_flash.SchDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/02_FPGA_Core/PCB_Source/fpga_gpif.SchDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/02_FPGA_Core/PCB_Source/fpga_power.SchDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/02_FPGA_Core/PCB_Source/power.SchDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/02_FPGA_Core/PCB_Source/psram.SchDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/03_USB_Controller/PCB_Source/cam_FX3.PcbDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/03_USB_Controller/PCB_Source/power.SchDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/03_USB_Controller/PCB_Source/usb.SchDoc filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Encolosure_Camera_mount/Lens_mount/C[[:space:]]mount[[:space:]]v1.f3d filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/custom[[:space:]]IMX477[[:space:]]Sensor[[:space:]]with[[:space:]]FPGA.JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](12)2.JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](12)24.JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](14)1.JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](16)1.JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](19).JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](24).JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](29).JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](3).JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](31).JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](33).JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](4).JPG filter=lfs diff=lfs merge=lfs -text
+circuitvalley_USB_C_Industrial_Camera_FPGA_USB3/Hardware/Images/usb_c_fpga_mipi_camera_c_mount_industrial_lattice_crosslink_fpga_xilinx_zynq[[:space:]](6).JPG filter=lfs diff=lfs merge=lfs -text
+tiny-tpu-v2_tiny-tpu/mnist_demo/artifacts/sim/modelsim_de1_soc_mnist_serial_top/work/_lib1_0.qpg filter=lfs diff=lfs merge=lfs -text
+tiny-tpu-v2_tiny-tpu/mnist_demo/artifacts/sim/modelsim_de1_soc_mnist_serial_top/work/_lib1_0.qtl filter=lfs diff=lfs merge=lfs -text
+tiny-tpu-v2_tiny-tpu/mnist_demo/artifacts/sim/modelsim_mnist_jtag_classifier/work/_lib1_0.qpg filter=lfs diff=lfs merge=lfs -text
+tiny-tpu-v2_tiny-tpu/mnist_demo/artifacts/sim/modelsim_mnist_jtag_classifier/work/_lib1_0.qtl filter=lfs diff=lfs merge=lfs -text
+tiny-tpu-v2_tiny-tpu/mnist_demo/artifacts/sim/modelsim_mnist_serial_classifier/work/_lib1_0.qpg filter=lfs diff=lfs merge=lfs -text
+tiny-tpu-v2_tiny-tpu/mnist_demo/artifacts/sim/modelsim_mnist_serial_classifier/work/_lib1_0.qtl filter=lfs diff=lfs merge=lfs -text
+tiny-tpu-v2_tiny-tpu/mnist_demo/artifacts/sim/modelsim_mnist_serial_classifier_full/work/_lib1_0.qpg filter=lfs diff=lfs merge=lfs -text
+tiny-tpu-v2_tiny-tpu/mnist_demo/artifacts/sim/modelsim_mnist_serial_classifier_full/work/_lib1_0.qtl filter=lfs diff=lfs merge=lfs -text
+tiny-tpu-v2_tiny-tpu/mnist_demo/artifacts/sim/modelsim_mnist_tpu_tiled_classifier/work/_lib1_0.qpg filter=lfs diff=lfs merge=lfs -text
+tiny-tpu-v2_tiny-tpu/mnist_demo/artifacts/sim/modelsim_mnist_tpu_tiled_classifier/work/_lib1_0.qtl filter=lfs diff=lfs merge=lfs -text

EttusResearch_uhd/.ci/docker/scripts/check-url.ps1

@@ -0,0 +1,24 @@
+param(
+    [Parameter(Mandatory = $true)]
+    [string]$Url
+)
+
+if ([string]::IsNullOrWhiteSpace($Url)) {
+    throw "URL check failed: URL parameter is empty or null. Please provide a valid VS Build Tools URL via the VS_BUILD_TOOLS_URL build argument."
+}
+
+$resp = Invoke-WebRequest -Uri $Url -UseBasicParsing -Method Head
+if ($resp.StatusCode -ne 200) {
+    throw "URL check failed: StatusCode=$($resp.StatusCode)"
+}
+
+$ct = $resp.Headers['Content-Type']
+$cl = [int64]($resp.Headers['Content-Length'] | Select-Object -First 1)
+
+if ($ct -and $ct -match 'text/html') {
+    throw "URL check failed: Content-Type=$ct"
+}
+
+if ($cl -and $cl -lt 1048576) {
+    throw "URL check failed: Content-Length=$cl"
+}

EttusResearch_uhd/.ci/docker/scripts/install-choco-package.ps1

@@ -0,0 +1,107 @@
+param(
+    [string]$PackageName,
+
+    [string]$Version = "",
+
+    [string]$InstallArgs = "",
+
+    [ValidateRange(0, 20)]
+    [int]$RetryCount = 2,
+
+    [ValidateRange(1, 3600)]
+    [int]$RetryDelaySeconds = 30,
+
+    [ValidateRange(0, 100000)]
+    [int]$LogTailLines = 300,
+
+    [Alias('h')]
+    [switch]$Help,
+
+    [Parameter(ValueFromRemainingArguments = $true)]
+    [string[]]$ExtraArgs
+)
+
+function Show-Usage {
+    Write-Host "Usage:"
+    Write-Host "  powershell -NoProfile -ExecutionPolicy Bypass -File install-choco-package.ps1 -PackageName <name> [-Version <version>] [-InstallArgs <args>] [-RetryCount <n>] [-RetryDelaySeconds <sec>]"
+    Write-Host ""
+    Write-Host "Options:"
+    Write-Host "  -PackageName   Chocolatey package ID (required)."
+    Write-Host "  -Version       Optional package version passed as --version."
+    Write-Host "  -InstallArgs   Optional installer args passed as --installargs."
+    Write-Host "  -RetryCount    Number of retries after the first failed attempt (default: 2)."
+    Write-Host "  -RetryDelaySeconds   Wait time between retries in seconds (default: 30)."
+    Write-Host "  -LogTailLines  Number of log lines to show on final failure (default: 300, use 0 to disable)."
+    Write-Host "  -Help, --help  Show this help text."
+    Write-Host ""
+    Write-Host "Examples:"
+    Write-Host "  powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 -PackageName doxygen.install -Version 1.9.8"
+    Write-Host "  powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 -PackageName cmake.install -Version 3.22.3 -InstallArgs \"ADD_CMAKE_TO_PATH=System\""
+    Write-Host "  powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 -PackageName git"
+    Write-Host "  powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 -PackageName doxygen.install -Version 1.9.8 -RetryCount 3 -RetryDelaySeconds 30"
+    Write-Host "  powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 -PackageName doxygen.install -Version 1.9.8 -LogTailLines 1000"
+}
+
+if ($Help -or ($ExtraArgs -contains '--help')) {
+    Show-Usage
+    exit 0
+}
+
+if (-not $PackageName) {
+    Write-Host "Error: -PackageName is required."
+    Write-Host "Run with --help to see usage."
+    exit 2
+}
+
+$ErrorActionPreference = 'Stop'
+
+$chocoRoot = if ($env:ChocolateyInstall) { $env:ChocolateyInstall } else { 'C:\ProgramData\chocolatey' }
+$logPath = Join-Path $chocoRoot 'logs\chocolatey.log'
+$packageLibPath = Join-Path (Join-Path $chocoRoot 'lib') $PackageName
+$maxAttempts = $RetryCount + 1
+
+$chocoArgs = @('install', '-y', $PackageName)
+if ($Version) {
+    $chocoArgs += @('--version', $Version)
+}
+if ($InstallArgs) {
+    $chocoArgs += @('--installargs', $InstallArgs)
+}
+
+for ($attempt = 1; $attempt -le $maxAttempts; $attempt++) {
+    Write-Host "Installing Chocolatey package: $PackageName (attempt $attempt of $maxAttempts)"
+    & choco @chocoArgs
+    $exitCode = $LASTEXITCODE
+
+    if ($exitCode -eq 0) {
+        Write-Host "Successfully installed Chocolatey package: $PackageName"
+        exit 0
+    }
+
+    Write-Host "Chocolatey install failed for package '$PackageName' (exit code $exitCode)."
+
+    if ($attempt -lt $maxAttempts) {
+        Write-Host "Retrying in $RetryDelaySeconds seconds..."
+        Start-Sleep -Seconds $RetryDelaySeconds
+    }
+}
+
+if ($LogTailLines -gt 0) {
+    if (Test-Path $logPath) {
+        Write-Host "Showing last $LogTailLines lines from $logPath"
+        Get-Content $logPath -Tail $LogTailLines
+    }
+    else {
+        Write-Host "Chocolatey log not found at $logPath"
+    }
+}
+else {
+    Write-Host "Skipping Chocolatey log output because -LogTailLines is set to 0"
+}
+
+if (Test-Path $packageLibPath) {
+    Write-Host "Contents of $packageLibPath"
+    Get-ChildItem -Path $packageLibPath -Force
+}
+
+exit $exitCode

EttusResearch_uhd/.ci/docker/scripts/install-vcpkg-triplet.ps1

@@ -0,0 +1,176 @@
+param(
+    [Parameter(Mandatory = $true)]
+    [string]$ManifestDir,
+
+    [Parameter(Mandatory = $true)]
+    [string]$Triplet,
+
+    [string]$VcpkgRoot = 'C:\vcpkg'
+)
+
+Set-StrictMode -Version Latest
+$ErrorActionPreference = 'Stop'
+
+$vcpkgExe = Join-Path $VcpkgRoot 'vcpkg.exe'
+if (-not (Test-Path -LiteralPath $vcpkgExe)) {
+    Write-Error "vcpkg executable not found at: $vcpkgExe"
+    exit 2
+}
+
+if (-not (Test-Path -LiteralPath $ManifestDir)) {
+    Write-Error "Manifest directory not found: $ManifestDir"
+    exit 2
+}
+
+Write-Host "Running vcpkg install in: $ManifestDir"
+Write-Host "Triplet: $Triplet"
+
+Push-Location $ManifestDir
+try {
+    & $vcpkgExe install --triplet $Triplet --clean-after-build
+    $vcpkgExitCode = $LASTEXITCODE
+}
+finally {
+    Pop-Location
+}
+
+if ($vcpkgExitCode -eq 0) {
+    exit 0
+}
+
+Write-Host "##[error]vcpkg install failed with exit code: $vcpkgExitCode"
+
+$buildtreesRoot = Join-Path $VcpkgRoot 'buildtrees'
+if (-not (Test-Path -LiteralPath $buildtreesRoot)) {
+    Write-Host "No buildtrees directory found at $buildtreesRoot"
+    exit $vcpkgExitCode
+}
+
+function Write-LogIfExists {
+    param([string]$Path)
+    if (Test-Path -LiteralPath $Path) {
+        $logInfo = Get-Item -LiteralPath $Path
+        Write-Host "===== BEGIN LOG: $Path ($([int64]$logInfo.Length) bytes) ====="
+        Get-Content -LiteralPath $Path -Raw
+        Write-Host "===== END LOG: $Path ====="
+        return $true
+    }
+    return $false
+}
+
+function Write-LogFiles {
+    param(
+        [Parameter(Mandatory = $true)]
+        [string]$Directory,
+
+        [Parameter(Mandatory = $true)]
+        [string]$Triplet
+    )
+
+    if (-not (Test-Path -LiteralPath $Directory)) {
+        return
+    }
+
+    function Get-LogPriority {
+        param([System.IO.FileInfo]$File)
+
+        if ($File.Name -match '^config-') {
+            return 0
+        }
+        if ($File.Name -match '^stdout-') {
+            return 1
+        }
+        if ($File.Name -match '^stderr-') {
+            return 2
+        }
+        return 3
+    }
+
+    $priorityLogs = Get-ChildItem -LiteralPath $Directory -File -Filter "*${Triplet}*.log" -ErrorAction SilentlyContinue |
+        Sort-Object @{ Expression = { Get-LogPriority -File $_ } },
+                     @{ Expression = { $_.LastWriteTimeUtc }; Descending = $true },
+                     Name
+
+    if (-not $priorityLogs) {
+        $priorityLogs = Get-ChildItem -LiteralPath $Directory -File -Filter '*.log' -ErrorAction SilentlyContinue |
+            Sort-Object @{ Expression = { Get-LogPriority -File $_ } },
+                         @{ Expression = { $_.LastWriteTimeUtc }; Descending = $true },
+                         Name
+    }
+
+    if (-not $priorityLogs) {
+        Write-Host "No log files found in $Directory"
+        return
+    }
+
+    Write-Host "Dumping log files from $Directory"
+    foreach ($log in $priorityLogs) {
+        if ($log.Length -eq 0) {
+            Write-Host "===== SKIP EMPTY LOG: $($log.FullName) ====="
+            continue
+        }
+
+        Write-Host "===== BEGIN LOG: $($log.FullName) ($([int64]$log.Length) bytes) ====="
+        Get-Content -LiteralPath $log.FullName -Raw
+        Write-Host "===== END LOG: $($log.FullName) ====="
+    }
+}
+
+# Use the most recently modified log of any type to identify the failing port.
+# This catches failures that occur before configure (fetch/extract/patch stage)
+# where no config-*-out.log is ever created.
+$candidate = Get-ChildItem -LiteralPath $buildtreesRoot -Recurse -File -Filter '*.log' -ErrorAction SilentlyContinue |
+    Sort-Object LastWriteTimeUtc -Descending |
+    Select-Object -First 1
+
+# If the most recent log is not a config-*-out.log, also try to find the newest
+# config-*-out.log in the same port directory to seed the related-log dump,
+# since config logs contain the most actionable CMake failure details.
+if ($candidate) {
+    $portDirFromRecent = $candidate.DirectoryName
+    $configInSamePort = Get-ChildItem -LiteralPath $portDirFromRecent -File -Filter "config-$Triplet-*-out.log" -ErrorAction SilentlyContinue |
+        Sort-Object LastWriteTimeUtc -Descending |
+        Select-Object -First 1
+    if ($configInSamePort) {
+        $candidate = $configInSamePort
+    }
+}
+
+if (-not $candidate) {
+    Write-Host "No log files found under $buildtreesRoot"
+    exit $vcpkgExitCode
+}
+
+$portDir = $candidate.DirectoryName
+$portName = Split-Path -Leaf $portDir
+
+Write-Host "Most recent failing dependency candidate: $portName"
+Write-Host "Selected log seed: $($candidate.FullName)"
+
+$seedName = [System.IO.Path]::GetFileNameWithoutExtension($candidate.Name)
+if ($seedName.EndsWith('-out', [System.StringComparison]::OrdinalIgnoreCase)) {
+    $seedPrefix = $seedName.Substring(0, $seedName.Length - 4)
+    $relatedLogs = @(
+        (Join-Path $portDir ($seedPrefix + '-CMakeCache.txt.log')),
+        (Join-Path $portDir ($seedPrefix + '-CMakeConfigureLog.yaml.log')),
+        (Join-Path $portDir ($seedPrefix + '-out.log'))
+    )
+
+    foreach ($log in $relatedLogs) {
+        [void](Write-LogIfExists -Path $log)
+    }
+} else {
+    [void](Write-LogIfExists -Path $candidate.FullName)
+}
+
+Write-LogFiles -Directory $portDir -Triplet $Triplet
+
+Write-Host 'Recent buildtrees logs (top 20 by timestamp):'
+Get-ChildItem -LiteralPath $buildtreesRoot -Recurse -File -Filter '*.log' -ErrorAction SilentlyContinue |
+    Sort-Object LastWriteTimeUtc -Descending |
+    Select-Object -First 20 FullName, LastWriteTimeUtc |
+    Format-Table -AutoSize |
+    Out-String |
+    Write-Host
+
+exit $vcpkgExitCode

EttusResearch_uhd/.ci/docker/scripts/install-vs-buildtools.ps1

@@ -0,0 +1,101 @@
+param(
+    [Parameter(Mandatory = $true)]
+    [string]$Url,
+
+    # Optional base temp directory for download and installer extraction.
+    # A random subfolder is always created under this base path and cleaned up unless -PreserveTemp is set.
+    [string]$TempDir = '',
+
+    # Preserve the generated temp working directory for debugging.
+    [switch]$PreserveTemp,
+
+    # All remaining arguments are passed directly to vs_buildtools.exe.
+    # Example: -InstallerArgs '--quiet','--wait','--norestart','--installPath','C:\VS','--add','Microsoft.VisualStudio.Workload.VCTools','--includeRecommended'
+    [string[]]$InstallerArgs = @('--quiet', '--wait', '--norestart', '--add', 'Microsoft.VisualStudio.Workload.VCTools', '--includeRecommended')
+)
+
+Set-StrictMode -Version Latest
+$ErrorActionPreference = 'Stop'
+
+# --- URL validation (mirrors check-url.ps1 logic) ---
+if ([string]::IsNullOrWhiteSpace($Url)) {
+    throw "VS_BUILD_TOOLS_URL is empty. Provide a valid download URL."
+}
+
+Write-Host "Validating VS Build Tools URL: $Url"
+$resp = Invoke-WebRequest -Uri $Url -UseBasicParsing -Method Head
+if ($resp.StatusCode -ne 200) {
+    throw "URL check failed: StatusCode=$($resp.StatusCode)"
+}
+$ct = $resp.Headers['Content-Type']
+if ($ct -and $ct -match 'text/html') {
+    throw "URL check failed: Content-Type=$ct (expected binary)"
+}
+$cl = [int64]($resp.Headers['Content-Length'] | Select-Object -First 1)
+if ($cl -and $cl -lt 1048576) {
+    throw "URL check failed: Content-Length=$cl (suspiciously small)"
+}
+Write-Host "URL validation passed (Content-Type: $ct, Content-Length: $cl bytes)."
+
+# --- Setup temp directory ---
+if (-not [string]::IsNullOrWhiteSpace($TempDir)) {
+    $temp = Join-Path $TempDir ([System.IO.Path]::GetRandomFileName())
+} else {
+    $temp = Join-Path $env:TEMP ([System.IO.Path]::GetRandomFileName())
+}
+Write-Host "Using temp directory: $temp"
+New-Item -ItemType Directory -Path $temp -Force | Out-Null
+$env:TEMP = $temp
+$env:TMP  = $temp
+
+# --- Download ---
+$exe = Join-Path $temp 'vs_buildtools.exe'
+Write-Host "Downloading VS Build Tools to $exe ..."
+Invoke-WebRequest $Url -OutFile $exe -UseBasicParsing
+Write-Host "Download complete: $exe"
+
+# --- Install ---
+Push-Location $temp
+try {
+    $fullCmd = ".\vs_buildtools.exe " + ($InstallerArgs -join ' ')
+    Write-Host "Install command: $fullCmd"
+    $p = Start-Process -FilePath '.\vs_buildtools.exe' -ArgumentList $InstallerArgs -Wait -PassThru
+    $code = $p.ExitCode
+    Write-Host "VS installer exit code: $code"
+
+    if ($code -ne 0 -and $code -ne 3010) {
+        # Dump installer logs to stdout before cleanup
+        Get-ChildItem -Path $env:TEMP -Recurse -File -Include 'dd_*', '*.log' -ErrorAction SilentlyContinue |
+            Sort-Object LastWriteTime -Descending |
+            Select-Object -First 20 -ExpandProperty FullName |
+            ForEach-Object { Write-Host ('==== ' + $_ + ' ===='); Get-Content $_ -Tail 250 }
+
+        $b1 = Join-Path $env:ProgramData 'Microsoft\VisualStudio\Packages\_bootstrapper'
+        if (Test-Path $b1) {
+            Get-ChildItem -Path $b1 -Recurse -File -Filter '*.log' -ErrorAction SilentlyContinue |
+                Sort-Object LastWriteTime -Descending |
+                Select-Object -First 20 -ExpandProperty FullName |
+                ForEach-Object { Write-Host ('==== ' + $_ + ' ===='); Get-Content $_ -Tail 250 }
+        }
+
+        throw "Installer failed with exit code: $code"
+    }
+}
+finally {
+    Pop-Location
+    if ($PreserveTemp) {
+        Write-Host "Preserving temp directory: $temp"
+    } else {
+        Remove-Item -LiteralPath $temp -Recurse -Force -ErrorAction SilentlyContinue
+    }
+    # Give Windows time to flush pending filesystem writes (e.g. msiexec deferred
+    # operations) before Docker captures the layer. Without this, hcsshim::ImportLayer
+    # can fail with ERROR_PATH_NOT_FOUND (0x3) due to a race condition between
+    # NTFS lazy-write completion and the layer snapshot.
+    # Runs unconditionally: even a failed install may have partial writes pending.
+    Write-Host "Waiting 10 seconds for filesystem writes to flush..."
+    Start-Sleep -Seconds 10
+    Write-Host "Filesystem flush wait complete."
+}
+
+Write-Host "VS Build Tools installed successfully."

EttusResearch_uhd/.ci/docker/uhd-builder-fedora42.Dockerfile

@@ -0,0 +1,81 @@
+# please follow docker best practices
+# https://docs.docker.com/engine/userguide/eng-image/dockerfile_best-practices/
+
+FROM fedora:42
+LABEL maintainer="Ettus Research"
+
+ARG PIP_INDEX_HOST
+ARG PIP_INDEX_URL
+
+RUN dnf install -y \
+        boost-devel \
+        ccache \
+        clang \
+        cmake \
+        doxygen \
+        dpdk \
+        dpdk-devel \
+        dpdk-tools \
+        gcc \
+        gcc-c++ \
+        git \
+        libusb1-devel \
+        make \
+        ncompress \
+        ninja-build \
+        pybind11-devel \
+        python3-devel \
+        python3-docutils \
+        python3-mako \
+        python3-numpy \
+        python3-pip \
+        python3-requests \
+        redhat-rpm-config \
+        rpm-build \
+        rpm-devel \
+        rsync \
+        tar \
+        xz \
+        # gRPC baseline
+        grpc-devel \
+        protobuf-devel \
+        # gRPC protobuf compiler
+        grpc-plugins \
+        # gRPC Python runtime
+        python3-grpcio \
+    # Install GNURadio dependencies
+        python3-sphinx \
+        python3-lxml \
+        SDL-devel \
+        gsl-devel \
+        qwt-qt5-devel \
+        qt5-qtbase-devel \
+        gmp-devel \
+        fftw-devel \
+        swig \
+        gtk3-devel \
+        pango-devel \
+        PyQt5 \
+        log4cpp-devel \
+        zeromq-devel \
+        cppzmq-devel \
+        python3-ruamel-yaml \
+        python3-click \
+        python3-click-plugins \
+        python3-zmq \
+        python3-scipy \
+        python3-cairo-devel \
+        python3-gobject \
+        spdlog-devel \
+        && \
+    dnf clean all
+
+# Optionally use cached index.
+RUN if [[ -n "$PIP_INDEX_URL" ]]; then \
+        python3 -m pip config --global set global.index-url $PIP_INDEX_URL && \
+        python3 -m pip config --global set global.trusted-host $PIP_INDEX_HOST; \
+    fi
+
+RUN python3 -m pip config list
+RUN python3 -m pip install --upgrade pip
+RUN pip install pygccxml pyyaml

EttusResearch_uhd/.ci/docker/uhd-builder-fedora43.Dockerfile

@@ -0,0 +1,81 @@
+# please follow docker best practices
+# https://docs.docker.com/engine/userguide/eng-image/dockerfile_best-practices/
+
+FROM fedora:43
+LABEL maintainer="Ettus Research"
+
+ARG PIP_INDEX_HOST
+ARG PIP_INDEX_URL
+
+RUN dnf install -y \
+        boost-devel \
+        ccache \
+        clang \
+        cmake \
+        doxygen \
+        dpdk \
+        dpdk-devel \
+        dpdk-tools \
+        gcc \
+        gcc-c++ \
+        git \
+        libusb1-devel \
+        make \
+        ncompress \
+        ninja-build \
+        pybind11-devel \
+        python3-devel \
+        python3-docutils \
+        python3-mako \
+        python3-numpy \
+        python3-pip \
+        python3-requests \
+        redhat-rpm-config \
+        rpm-build \
+        rpm-devel \
+        rsync \
+        tar \
+        xz \
+        # gRPC baseline
+        grpc-devel \
+        protobuf-devel \
+        # gRPC protobuf compiler
+        grpc-plugins \
+        # gRPC Python runtime
+        python3-grpcio \
+    # Install GNURadio dependencies
+        python3-sphinx \
+        python3-lxml \
+        SDL-devel \
+        gsl-devel \
+        qwt-qt5-devel \
+        qt5-qtbase-devel \
+        gmp-devel \
+        fftw-devel \
+        swig \
+        gtk3-devel \
+        pango-devel \
+        PyQt5 \
+        log4cpp-devel \
+        zeromq-devel \
+        cppzmq-devel \
+        python3-ruamel-yaml \
+        python3-click \
+        python3-click-plugins \
+        python3-zmq \
+        python3-scipy \
+        python3-cairo-devel \
+        python3-gobject \
+        spdlog-devel \
+        && \
+    dnf clean all
+
+# Optionally use cached index.
+RUN if [[ -n "$PIP_INDEX_URL" ]]; then \
+        python3 -m pip config --global set global.index-url $PIP_INDEX_URL && \
+        python3 -m pip config --global set global.trusted-host $PIP_INDEX_HOST; \
+    fi
+
+RUN python3 -m pip config list
+RUN python3 -m pip install --upgrade pip
+RUN pip install pygccxml pyyaml

EttusResearch_uhd/.ci/docker/uhd-builder-fedora44.Dockerfile

@@ -0,0 +1,81 @@
+# please follow docker best practices
+# https://docs.docker.com/engine/userguide/eng-image/dockerfile_best-practices/
+
+FROM fedora:44
+LABEL maintainer="Ettus Research"
+
+ARG PIP_INDEX_HOST
+ARG PIP_INDEX_URL
+
+RUN dnf install -y \
+        boost-devel \
+        ccache \
+        clang \
+        cmake \
+        doxygen \
+        dpdk \
+        dpdk-devel \
+        dpdk-tools \
+        gcc \
+        gcc-c++ \
+        git \
+        libusb1-devel \
+        make \
+        ncompress \
+        ninja-build \
+        pybind11-devel \
+        python3-devel \
+        python3-docutils \
+        python3-mako \
+        python3-numpy \
+        python3-pip \
+        python3-requests \
+        redhat-rpm-config \
+        rpm-build \
+        rpm-devel \
+        rsync \
+        tar \
+        xz \
+        # gRPC baseline
+        grpc-devel \
+        protobuf-devel \
+        # gRPC protobuf compiler
+        grpc-plugins \
+        # gRPC Python runtime
+        python3-grpcio \
+    # Install GNURadio dependencies
+        python3-sphinx \
+        python3-lxml \
+        SDL-devel \
+        gsl-devel \
+        qwt-qt5-devel \
+        qt5-qtbase-devel \
+        gmp-devel \
+        fftw-devel \
+        swig \
+        gtk3-devel \
+        pango-devel \
+        PyQt5 \
+        log4cpp-devel \
+        zeromq-devel \
+        cppzmq-devel \
+        python3-ruamel-yaml \
+        python3-click \
+        python3-click-plugins \
+        python3-zmq \
+        python3-scipy \
+        python3-cairo-devel \
+        python3-gobject \
+        spdlog-devel \
+        && \
+    dnf clean all
+
+# Optionally use cached index.
+RUN if [[ -n "$PIP_INDEX_URL" ]]; then \
+        python3 -m pip config --global set global.index-url $PIP_INDEX_URL && \
+        python3 -m pip config --global set global.trusted-host $PIP_INDEX_HOST; \
+    fi
+
+RUN python3 -m pip config list
+RUN python3 -m pip install --upgrade pip --root-user-action=ignore
+RUN pip install pygccxml pyyaml --root-user-action=ignore

EttusResearch_uhd/.ci/docker/uhd-builder-ubuntu2004.Dockerfile

@@ -0,0 +1,96 @@
+# please follow docker best practices
+# https://docs.docker.com/engine/userguide/eng-image/dockerfile_best-practices/
+
+FROM ubuntu:20.04
+LABEL maintainer="Ettus Research"
+
+ARG PIP_INDEX_HOST
+ARG PIP_INDEX_URL
+# This will make apt-get install without question
+ARG DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update && \
+    apt-get -y upgrade && \
+    apt-get -y install -q \
+        build-essential \
+        ccache \
+        clang \
+        curl \
+        git \
+        sudo \
+    # Install UHD dependencies
+        abi-dumper \
+        cmake \
+        doxygen \
+        dpdk \
+        libboost-all-dev \
+        libdpdk-dev \
+        libgps-dev \
+        libgps-dev \
+        libudev-dev \
+        libusb-1.0-0-dev \
+        ncompress \
+        ninja-build \
+        python3-dev \
+        python3-docutils \
+        python3-mako \
+        python3-numpy \
+        python3-pip \
+        python3-requests \
+        pybind11-dev \
+        # gRPC baseline
+        libgrpc++-dev \
+        libprotobuf-dev \
+        # gRPC protobuf compiler
+        protobuf-compiler-grpc \
+        # gRPC Python runtime
+        python3-grpcio \
+    # Install deb dependencies
+        debootstrap \
+        devscripts \
+        pbuilder \
+        debhelper \
+        libncurses5-dev \
+        python3-ruamel.yaml \
+        pkgconf \
+    # Install GNURadio dependencies
+        python3-sphinx \
+        python3-lxml \
+        libsdl1.2-dev \
+        libgsl-dev \
+        libqwt-qt5-dev \
+        libqt5opengl5-dev \
+        libgmp3-dev \
+        libfftw3-dev \
+        swig \
+        gir1.2-gtk-3.0 \
+        libpango1.0-dev \
+        python3-pyqt5 \
+        liblog4cpp5-dev \
+        libzmq3-dev \
+        python3-ruamel.yaml \
+        python3-click \
+        python3-click-plugins \
+        python3-zmq \
+        python3-scipy \
+        python3-gi-cairo \
+        python3-pygccxml \
+        python3-jsonschema \
+        libspdlog-dev \
+        libsndfile1-dev \
+        && \
+    rm -rf /var/lib/apt/lists/*
+
+# Optionally use cached index.
+RUN if [ -n "$PIP_INDEX_URL" ]; then \
+        python3 -m pip config --global set global.index-url $PIP_INDEX_URL && \
+        python3 -m pip config --global set global.trusted-host $PIP_INDEX_HOST; \
+    fi
+
+RUN python3 -m pip config list
+RUN python3 -m pip install --upgrade pip
+# Required for running pbuilder to build debs in docker on Ubuntu 20.04
+# because of this bug: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=968927
+RUN wget https://launchpad.net/ubuntu/+archive/primary/+files/debootstrap_1.0.124_all.deb && \
+    dpkg -i debootstrap_1.0.124_all.deb && \
+    rm debootstrap_1.0.124_all.deb

EttusResearch_uhd/.ci/docker/uhd-builder-ubuntu2204.Dockerfile

@@ -0,0 +1,93 @@
+# please follow docker best practices
+# https://docs.docker.com/engine/userguide/eng-image/dockerfile_best-practices/
+
+FROM ubuntu:22.04
+LABEL maintainer="Ettus Research"
+
+ARG PIP_INDEX_HOST
+ARG PIP_INDEX_URL
+# This will make apt-get install without question
+ARG DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update && \
+    apt-get -y upgrade && \
+    apt-get -y install -q \
+        build-essential \
+        ccache \
+        clang \
+        curl \
+        git \
+        sudo \
+    # Install formatting tools
+        clang-format-14 \
+    # Install UHD dependencies
+        abi-dumper \
+        cmake \
+        doxygen \
+        dpdk \
+        libboost-all-dev \
+        libdpdk-dev \
+        libgps-dev \
+        libgps-dev \
+        libudev-dev \
+        libusb-1.0-0-dev \
+        ncompress \
+        ninja-build \
+        python3-dev \
+        python3-docutils \
+        python3-mako \
+        python3-numpy \
+        python3-pip \
+        python3-requests \
+        pybind11-dev \
+        # gRPC baseline
+        libgrpc++-dev \
+        libprotobuf-dev \
+        # gRPC protobuf compiler
+        protobuf-compiler-grpc \
+        # gRPC Python runtime
+        python3-grpcio \
+    # Install deb dependencies
+        debootstrap \
+        devscripts \
+        pbuilder \
+        debhelper \
+        libncurses5-dev \
+        python3-ruamel.yaml \
+        pkgconf \
+    # Install GNURadio dependencies
+        python3-sphinx \
+        python3-lxml \
+        libsdl1.2-dev \
+        libgsl-dev \
+        libqwt-qt5-dev \
+        libqt5opengl5-dev \
+        libgmp3-dev \
+        libfftw3-dev \
+        swig \
+        gir1.2-gtk-3.0 \
+        libpango1.0-dev \
+        python3-pyqt5 \
+        liblog4cpp5-dev \
+        libzmq3-dev \
+        python3-ruamel.yaml \
+        python3-click \
+        python3-click-plugins \
+        python3-zmq \
+        python3-scipy \
+        python3-gi-cairo \
+        python3-pygccxml \
+        python3-jsonschema \
+        libspdlog-dev \
+        libsndfile1-dev \
+        && \
+    rm -rf /var/lib/apt/lists/*
+
+# Optionally use cached index.
+RUN if [ -n "$PIP_INDEX_URL" ]; then \
+        python3 -m pip config --global set global.index-url $PIP_INDEX_URL && \
+        python3 -m pip config --global set global.trusted-host $PIP_INDEX_HOST; \
+    fi
+
+RUN python3 -m pip config list
+RUN python3 -m pip install --upgrade pip

EttusResearch_uhd/.ci/docker/uhd-builder-ubuntu2404.Dockerfile

@@ -0,0 +1,91 @@
+# please follow docker best practices
+# https://docs.docker.com/engine/userguide/eng-image/dockerfile_best-practices/
+
+FROM ubuntu:24.04
+LABEL maintainer="Ettus Research"
+
+ARG PIP_INDEX_HOST
+ARG PIP_INDEX_URL
+# This will make apt-get install without question
+ARG DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update && \
+    apt-get -y upgrade && \
+    apt-get -y install -q \
+        build-essential \
+        ccache \
+        clang \
+        curl \
+        git \
+        sudo \
+    # Install formatting tools
+        clang-format-14 \
+    # Install UHD dependencies
+        abi-dumper \
+        cmake \
+        doxygen \
+        dpdk \
+        libboost-all-dev \
+        libdpdk-dev \
+        libgps-dev \
+        libgps-dev \
+        libudev-dev \
+        libusb-1.0-0-dev \
+        ncompress \
+        ninja-build \
+        python3-dev \
+        python3-docutils \
+        python3-mako \
+        python3-numpy \
+        python3-pip \
+        python3-requests \
+        pybind11-dev \
+        # gRPC baseline
+        libgrpc++-dev \
+        libprotobuf-dev \
+        # gRPC protobuf compiler
+        protobuf-compiler-grpc \
+        # gRPC Python runtime
+        python3-grpcio \
+    # Install deb dependencies
+        debootstrap \
+        devscripts \
+        pbuilder \
+        debhelper \
+        libncurses5-dev \
+        python3-ruamel.yaml \
+    # Install GNURadio dependencies
+        python3-sphinx \
+        python3-lxml \
+        libsdl1.2-dev \
+        libgsl-dev \
+        libqwt-qt5-dev \
+        libqt5opengl5-dev \
+        libgmp3-dev \
+        libfftw3-dev \
+        swig \
+        gir1.2-gtk-3.0 \
+        libpango1.0-dev \
+        python3-pyqt5 \
+        liblog4cpp5-dev \
+        libzmq3-dev \
+        python3-ruamel.yaml \
+        python3-click \
+        python3-click-plugins \
+        python3-zmq \
+        python3-scipy \
+        python3-gi-cairo \
+        python3-pygccxml \
+        python3-jsonschema \
+        libspdlog-dev \
+        libsndfile1-dev \
+        && \
+    rm -rf /var/lib/apt/lists/*
+
+# Optionally use cached index.
+RUN if [ -n "$PIP_INDEX_URL" ]; then \
+        python3 -m pip config --global set global.index-url $PIP_INDEX_URL && \
+        python3 -m pip config --global set global.trusted-host $PIP_INDEX_HOST; \
+    fi
+
+RUN python3 -m pip config list

EttusResearch_uhd/.ci/docker/uhd-builder-ubuntu2510.Dockerfile

@@ -0,0 +1,92 @@
+# please follow docker best practices
+# https://docs.docker.com/engine/userguide/eng-image/dockerfile_best-practices/
+
+FROM ubuntu:25.10
+LABEL maintainer="Ettus Research"
+
+ARG PIP_INDEX_HOST
+ARG PIP_INDEX_URL
+# This will make apt-get install without question
+ARG DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update && \
+    apt-get -y upgrade && \
+    apt-get -y install -q \
+        build-essential \
+        ccache \
+        clang \
+        curl \
+        git \
+        sudo \
+    # Install formatting tools
+        clang-format-14 \
+    # Install UHD dependencies
+        abi-dumper \
+        cmake \
+        doxygen \
+        dpdk \
+        libboost-all-dev \
+        libdpdk-dev \
+        libgps-dev \
+        libgps-dev \
+        libudev-dev \
+        libusb-1.0-0-dev \
+        ncompress \
+        ninja-build \
+        python3-dev \
+        python3-docutils \
+        python3-mako \
+        python3-numpy \
+        python3-pip \
+        python3-requests \
+        python3-setuptools \
+        pybind11-dev \
+        # gRPC baseline
+        libgrpc++-dev \
+        libprotobuf-dev \
+        # gRPC protobuf compiler
+        protobuf-compiler-grpc \
+        # gRPC Python runtime
+        python3-grpcio \
+    # Install deb dependencies
+        debootstrap \
+        devscripts \
+        pbuilder \
+        debhelper \
+        libncurses5-dev \
+        python3-ruamel.yaml \
+    # Install GNURadio dependencies
+        python3-sphinx \
+        python3-lxml \
+        libsdl1.2-dev \
+        libgsl-dev \
+        libqwt-qt5-dev \
+        libqt5opengl5-dev \
+        libgmp3-dev \
+        libfftw3-dev \
+        swig \
+        gir1.2-gtk-3.0 \
+        libpango1.0-dev \
+        python3-pyqt5 \
+        liblog4cpp5-dev \
+        libzmq3-dev \
+        python3-ruamel.yaml \
+        python3-click \
+        python3-click-plugins \
+        python3-zmq \
+        python3-scipy \
+        python3-gi-cairo \
+        python3-pygccxml \
+        python3-jsonschema \
+        libspdlog-dev \
+        libsndfile1-dev \
+        && \
+    rm -rf /var/lib/apt/lists/*
+
+# Optionally use cached index.
+RUN if [ -n "$PIP_INDEX_URL" ]; then \
+        python3 -m pip config --global set global.index-url $PIP_INDEX_URL && \
+        python3 -m pip config --global set global.trusted-host $PIP_INDEX_HOST; \
+    fi
+
+RUN python3 -m pip config list

EttusResearch_uhd/.ci/docker/uhd-builder-ubuntu2604.Dockerfile

@@ -0,0 +1,87 @@
+# please follow docker best practices
+# https://docs.docker.com/engine/userguide/eng-image/dockerfile_best-practices/
+
+FROM ubuntu:26.04
+LABEL maintainer="Ettus Research"
+
+ARG PIP_INDEX_HOST
+ARG PIP_INDEX_URL
+# This will make apt-get install without question
+ARG DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update && \
+    apt-get -y upgrade && \
+    apt-get -y install -q \
+        build-essential \
+        ccache \
+        clang \
+        curl \
+        git \
+        sudo \
+    # Install UHD dependencies
+        abi-dumper \
+        cmake \
+        doxygen \
+        dpdk \
+        libboost-all-dev \
+        libdpdk-dev \
+        libgps-dev \
+        libudev-dev \
+        libusb-1.0-0-dev \
+        ncompress \
+        ninja-build \
+        python3-dev \
+        python3-docutils \
+        python3-mako \
+        python3-numpy \
+        python3-pip \
+        python3-requests \
+        python3-setuptools \
+        pybind11-dev \
+        # gRPC baseline
+        libgrpc++-dev \
+        libprotobuf-dev \
+        # gRPC protobuf compiler
+        protobuf-compiler-grpc \
+        # gRPC Python runtime
+        python3-grpcio \
+    # Install deb dependencies
+        debootstrap \
+        devscripts \
+        pbuilder \
+        debhelper \
+        libncurses5-dev \
+        python3-ruamel.yaml \
+    # Install GNURadio dependencies
+        python3-sphinx \
+        python3-lxml \
+        libsdl1.2-dev \
+        libgsl-dev \
+        libqwt-qt5-dev \
+        libqt5opengl5-dev \
+        libgmp3-dev \
+        libfftw3-dev \
+        gir1.2-gtk-3.0 \
+        libpango1.0-dev \
+        python3-pyqt5 \
+        liblog4cpp5-dev \
+        libzmq3-dev \
+        python3-click \
+        python3-click-plugins \
+        python3-zmq \
+        python3-scipy \
+        python3-gi-cairo \
+        python3-pygccxml \
+        python3-jsonschema \
+        libspdlog-dev \
+        libsndfile1-dev \
+        && \
+    rm -rf /var/lib/apt/lists/*
+
+# Optionally use cached index.
+RUN if [ -n "$PIP_INDEX_URL" ]; then \
+        python3 -m pip config --global set global.index-url $PIP_INDEX_URL && \
+        python3 -m pip config --global set global.trusted-host $PIP_INDEX_HOST; \
+    fi
+
+RUN python3 -m pip config list

EttusResearch_uhd/.ci/docker/uhd-builder-vs2022-v143-x64.Dockerfile

@@ -0,0 +1,96 @@
+# Docker build context must be uhd/uhddev root
+
+# please follow docker best practices
+# https://docs.docker.com/engine/userguide/eng-image/dockerfile_best-practices/
+
+# Defaults for variables used in FROM statement
+ARG WIN_BASE_TAG=ltsc2025
+
+FROM mcr.microsoft.com/windows/servercore:${WIN_BASE_TAG}
+LABEL maintainer="Ettus Research"
+
+# Minimum required argument
+ARG VS_BUILD_TOOLS_URL
+# Optional arguments for customization
+ARG PYTHON_VERSION=3.10.11
+ARG VCPKG_MANIFEST_FILE=vcpkg.json
+ARG PIP_INDEX_HOST=""
+ARG PIP_INDEX_URL=""
+ENV VCPKG_DISABLE_METRICS=1
+# Optional argument for vcpkg binary cache directory
+ARG VCPKG_BINARY_CACHE_DIR="C:\vcpkg-cache"
+ENV VCPKG_BINARY_SOURCES=clear;files,${VCPKG_BINARY_CACHE_DIR},readwrite
+
+# Enable long file paths (>260 characters)
+RUN reg add HKLM\SYSTEM\CurrentControlSet\Control\FileSystem /v LongPathsEnabled /t REG_DWORD /d 1 /f
+
+# Install vs build tools
+COPY .ci/docker/scripts/install-vs-buildtools.ps1 C:/Temp/install-vs-buildtools.ps1
+RUN powershell -NoProfile -ExecutionPolicy Bypass -Command \
+    "& 'C:\Temp\install-vs-buildtools.ps1' \
+    -Url '%VS_BUILD_TOOLS_URL%' \
+    -InstallerArgs '--quiet','--wait','--norestart','--nocache', \
+        '--add','Microsoft.VisualStudio.Workload.VCTools', \
+        '--includeRecommended'"
+
+RUN setx chocolateyVersion 1.4.0 /m
+RUN @"%SystemRoot%\System32\WindowsPowerShell\v1.0\powershell.exe" \
+    -NoProfile -InputFormat None -ExecutionPolicy Bypass \
+    -Command "[System.Net.ServicePointManager]::SecurityProtocol = 3072; \
+    iex ((New-Object System.Net.WebClient).DownloadString('https://chocolatey.org/install.ps1'))" && \
+    SET "PATH=%PATH%;%ALLUSERSPROFILE%\chocolatey\bin" && \
+    choco config set webRequestTimeoutSeconds 600
+COPY .ci/docker/scripts/install-choco-package.ps1 C:/Temp/install-choco-package.ps1
+RUN powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName doxygen.install -Version 1.9.8 && \
+    powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName cmake.install -Version 3.22.3 -InstallArgs ADD_CMAKE_TO_PATH=System && \
+    powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName git && \
+    powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName NSIS -Version 3.06.1 && \
+    powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName vim && \
+    powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName python3 -Version %PYTHON_VERSION%
+
+# Optionally use cached index.
+RUN if defined PIP_INDEX_URL ( \
+    pip config --global set global.index-url %PIP_INDEX_URL% && \
+    pip config --global set global.trusted-host %PIP_INDEX_HOST% \
+    )
+
+COPY host/python/requirements.txt C:/Temp/requirements.txt
+COPY host/python/requirements_np2.txt C:/Temp/requirements_np2.txt
+RUN pip config list && \
+    python -m pip install --upgrade pip && \
+    powershell -NoProfile -ExecutionPolicy Bypass -Command \
+    "if ([version]('%PYTHON_VERSION%') -ge [version]('3.13')) { \
+        pip install -r C:/Temp/requirements_np2.txt \
+    } else { \
+        pip install -r C:/Temp/requirements.txt \
+    }; \
+    if ($LASTEXITCODE -ne 0) { exit $LASTEXITCODE }"
+
+RUN setx VCPKG_INSTALL_DIR "c:\\vcpkg" /m
+RUN git clone https://github.com/microsoft/vcpkg %VCPKG_INSTALL_DIR% && \
+    cd %VCPKG_INSTALL_DIR% && \
+    bootstrap-vcpkg.bat
+# Add custom UHD vcpkg triplet
+COPY host/cmake/vcpkg/* c:/vcpkg/triplets/
+# Define triplet to be used by this container
+RUN setx VCPKG_TARGET_TRIPLET "uhd-x64-windows-static-md" /m
+RUN echo set(VCPKG_BUILD_TYPE release)>>"%VCPKG_INSTALL_DIR%\triplets\%VCPKG_TARGET_TRIPLET%.cmake"
+RUN type "%VCPKG_INSTALL_DIR%\triplets\%VCPKG_TARGET_TRIPLET%.cmake"
+# Copy vcpkg cache from mapped folder to 
+RUN echo Current path %cd%
+COPY .cache/vcpkg ${VCPKG_BINARY_CACHE_DIR}
+
+RUN powershell -NoProfile -ExecutionPolicy Bypass -Command \
+    "New-Item -ItemType Directory -Path 'c:\uhd-vcpkg' -Force | Out-Null"
+COPY .ci/docker/vcpkg/${VCPKG_MANIFEST_FILE} c:/uhd-vcpkg/vcpkg.json
+COPY .ci/docker/scripts/install-vcpkg-triplet.ps1 C:/Temp/install-vcpkg-triplet.ps1
+RUN powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-vcpkg-triplet.ps1 \
+    -ManifestDir C:\uhd-vcpkg \
+    -Triplet %VCPKG_TARGET_TRIPLET% \
+    -VcpkgRoot %VCPKG_INSTALL_DIR%

EttusResearch_uhd/.ci/docker/uhd-builder-vs2026-v145-x64.Dockerfile

@@ -0,0 +1,96 @@
+# Docker build context must be uhd/uhddev root
+
+# please follow docker best practices
+# https://docs.docker.com/engine/userguide/eng-image/dockerfile_best-practices/
+
+# Defaults for variables used in FROM statement
+ARG WIN_BASE_TAG=ltsc2025
+
+FROM mcr.microsoft.com/windows/servercore:${WIN_BASE_TAG}
+LABEL maintainer="Ettus Research"
+
+# Minimum required argument
+ARG VS_BUILD_TOOLS_URL
+# Optional arguments for customization
+ARG PYTHON_VERSION=3.10.11
+ARG VCPKG_MANIFEST_FILE=vcpkg-vs2026.json
+ARG PIP_INDEX_HOST=""
+ARG PIP_INDEX_URL=""
+ENV VCPKG_DISABLE_METRICS=1
+# Optional argument for vcpkg binary cache directory
+ARG VCPKG_BINARY_CACHE_DIR="C:\vcpkg-cache"
+ENV VCPKG_BINARY_SOURCES=clear;files,${VCPKG_BINARY_CACHE_DIR},readwrite
+
+# Enable long file paths (>260 characters)
+RUN reg add HKLM\SYSTEM\CurrentControlSet\Control\FileSystem /v LongPathsEnabled /t REG_DWORD /d 1 /f
+
+# Install vs build tools
+COPY .ci/docker/scripts/install-vs-buildtools.ps1 C:/Temp/install-vs-buildtools.ps1
+RUN powershell -NoProfile -ExecutionPolicy Bypass -Command \
+    "& 'C:\Temp\install-vs-buildtools.ps1' \
+    -Url '%VS_BUILD_TOOLS_URL%' \
+    -InstallerArgs '--quiet','--wait','--norestart','--nocache', \
+        '--add','Microsoft.VisualStudio.Workload.VCTools', \
+        '--includeRecommended'"
+
+RUN setx chocolateyVersion 2.5.1 /m
+RUN @"%SystemRoot%\System32\WindowsPowerShell\v1.0\powershell.exe" \
+    -NoProfile -InputFormat None -ExecutionPolicy Bypass \
+    -Command "[System.Net.ServicePointManager]::SecurityProtocol = 3072; \
+    iex ((New-Object System.Net.WebClient).DownloadString('https://chocolatey.org/install.ps1'))" && \
+    SET "PATH=%PATH%;%ALLUSERSPROFILE%\chocolatey\bin" && \
+    choco config set webRequestTimeoutSeconds 600
+COPY .ci/docker/scripts/install-choco-package.ps1 C:/Temp/install-choco-package.ps1
+RUN powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName doxygen.install -Version 1.9.8 && \
+    powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName cmake.install -Version 4.2.1 -InstallArgs ADD_CMAKE_TO_PATH=System && \
+    powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName git && \
+    powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName NSIS -Version 3.11.0 && \
+    powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName vim && \
+    powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-choco-package.ps1 \
+        -PackageName python3 -Version %PYTHON_VERSION%
+
+# Optionally use cached index.
+RUN if defined PIP_INDEX_URL ( \
+    pip config --global set global.index-url %PIP_INDEX_URL% && \
+    pip config --global set global.trusted-host %PIP_INDEX_HOST% \
+    )
+
+COPY host/python/requirements.txt C:/Temp/requirements.txt
+COPY host/python/requirements_np2.txt C:/Temp/requirements_np2.txt
+RUN pip config list && \
+    python -m pip install --upgrade pip && \
+    powershell -NoProfile -ExecutionPolicy Bypass -Command \
+    "if ([version]('%PYTHON_VERSION%') -ge [version]('3.13')) { \
+        pip install -r C:/Temp/requirements_np2.txt \
+    } else { \
+        pip install -r C:/Temp/requirements.txt \
+    }; \
+    if ($LASTEXITCODE -ne 0) { exit $LASTEXITCODE }"
+
+RUN setx VCPKG_INSTALL_DIR "c:\\vcpkg" /m
+RUN git clone https://github.com/microsoft/vcpkg %VCPKG_INSTALL_DIR% && \
+    cd %VCPKG_INSTALL_DIR% && \
+    bootstrap-vcpkg.bat
+# Add custom UHD vcpkg triplet
+COPY host/cmake/vcpkg/* c:/vcpkg/triplets/
+# Define triplet to be used by this container
+RUN setx VCPKG_TARGET_TRIPLET "uhd-x64-windows-static-md" /m
+RUN echo set(VCPKG_BUILD_TYPE release)>>"%VCPKG_INSTALL_DIR%\triplets\%VCPKG_TARGET_TRIPLET%.cmake"
+RUN type "%VCPKG_INSTALL_DIR%\triplets\%VCPKG_TARGET_TRIPLET%.cmake"
+# Copy vcpkg cache from mapped folder to 
+RUN echo Current path %cd%
+COPY .cache/vcpkg ${VCPKG_BINARY_CACHE_DIR}
+
+RUN powershell -NoProfile -ExecutionPolicy Bypass -Command \
+    "New-Item -ItemType Directory -Path 'c:\uhd-vcpkg' -Force | Out-Null"
+COPY .ci/docker/vcpkg/${VCPKG_MANIFEST_FILE} c:/uhd-vcpkg/vcpkg.json
+COPY .ci/docker/scripts/install-vcpkg-triplet.ps1 C:/Temp/install-vcpkg-triplet.ps1
+RUN powershell -NoProfile -ExecutionPolicy Bypass -File C:\Temp\install-vcpkg-triplet.ps1 \
+    -ManifestDir C:\uhd-vcpkg \
+    -Triplet %VCPKG_TARGET_TRIPLET% \
+    -VcpkgRoot %VCPKG_INSTALL_DIR%

EttusResearch_uhd/.ci/docker/vcpkg/vcpkg-vc2026.txt

@@ -0,0 +1,6 @@
+The vcpkg.json manifest file is using vcpkg tag "2026.01.16" as builtin-baseline which provides packages in the following versions:
+
+boost 1.90
+libusb 1.0.29
+grpc 1.71.0
+protobuf 5.29.5

EttusResearch_uhd/.ci/docker/vcpkg/vcpkg-vs2026.json

@@ -0,0 +1,35 @@
+{
+  "dependencies": [
+    "libusb",
+    "boost-asio",
+    "boost-assign",
+    "boost-beast",
+    "boost-chrono",
+    "boost-circular-buffer",
+    "boost-date-time",
+    "boost-dll",
+    "boost-filesystem",
+    "boost-format",
+    "boost-graph",
+    "boost-interprocess",
+    "boost-lexical-cast",
+    "boost-locale",
+    "boost-lockfree",
+    "boost-math",
+    "boost-optional",
+    "boost-program-options",
+    "boost-property-tree",
+    "boost-regex",
+    "boost-scope-exit",
+    "boost-serialization",
+    "boost-signals2",
+    "boost-system",
+    "boost-test",
+    "boost-thread",
+    "boost-timer",
+    "boost-units",
+    "grpc",
+    "pkgconf"
+  ],
+  "builtin-baseline": "66c0373dc7fca549e5803087b9487edfe3aca0a1"
+}

EttusResearch_uhd/.ci/docker/vcpkg/vcpkg.json

@@ -0,0 +1,30 @@
+{
+   "dependencies": [
+     "libusb",
+     "boost-asio",
+     "boost-assign",
+     "boost-atomic",
+     "boost-circular-buffer",
+     "boost-date-time",
+     "boost-dll",
+     "boost-exception",
+     "boost-filesystem",
+     "boost-format",
+     "boost-graph",
+     "boost-lockfree",
+     "boost-math",
+     "boost-program-options",
+     "boost-regex",
+     "boost-serialization",
+     "boost-stacktrace",
+     "boost-signals2",
+     "boost-system",
+     "boost-test",
+     "boost-thread",
+     "boost-timer",
+     "boost-units",
+     "grpc",
+     "pkgconf"
+   ],
+   "builtin-baseline": "f176b58f35a75f9f8f54099cd9df97d2e2793a2e"
+ }

EttusResearch_uhd/.ci/docker/vcpkg/vcpkg.txt

@@ -0,0 +1,6 @@
+The vcpkg.json manifest file is using vcpkg tag "2024.09.23" as builtin-baseline which provides packages in the following versions:
+
+boost 1.85
+libusb 1.0.27
+grpc 1.60.0
+protobuf 4.25.1

EttusResearch_uhd/.ci/fpga/devices/job-build-fpga-b310.yml

@@ -0,0 +1,108 @@
+#
+# Copyright 2025 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This template defines a stages-based pipeline for building B310 FPGA
+#   targets.
+#
+#   See https://aka.ms/yaml for pipeline YAML documentation.
+#
+
+parameters:
+## Optional parameters
+# Option to ignore cached artifacts (if available) and perform
+# a clean IP build.
+- name: clean_ip_build
+  type: boolean
+  default: false
+# Number of parallel jobs to use for IP build
+- name: num_ip_jobs
+  type: number
+  default: 5
+# Option to publish intermediate files
+- name: publish_int_files
+  type: boolean
+  default: false
+# Package and publish images
+- name: package_and_publish_images
+  type: boolean
+  default: true
+# Package access in the SDR server ('Internal' or 'Public')
+- name: package_access
+  type: string
+  default: 'Internal'
+# From where to pull FPGA bitfiles if we're not building them
+- name: fpga_imgs_source
+  type: string
+  default: 'Mono Pipeline'
+# B310 FPGA targets to build
+- name: b310_full_targets_matrix
+  type: object
+  default:
+    B310_REPLAY:
+      image_core: b310_replay_rfnoc_image_core.yml
+      target_name: B310
+      image_core_name: usrp_b310_fpga_replay
+      artifact_name: B310_REPLAY
+      timeout: 720
+      max_attempts: 2
+    B310_FIFO:
+      image_core: b310_fifo_rfnoc_image_core.yml
+      target_name: B310
+      image_core_name: usrp_b310_fpga_fifo
+      artifact_name: B310_FIFO
+      timeout: 720
+      max_attempts: 2
+- name: b310_reduced_targets_matrix
+  type: object
+  default:
+    B310_REPLAY:
+      image_core: b310_replay_rfnoc_image_core.yml
+      target_name: B310
+      image_core_name: usrp_b310_fpga_replay
+      artifact_name: B310_REPLAY
+      timeout: 720
+      max_attempts: 2
+    B310_FIFO:
+      image_core: b310_fifo_rfnoc_image_core.yml
+      target_name: B310
+      image_core_name: usrp_b310_fpga_fifo
+      artifact_name: B310_FIFO
+      timeout: 720
+      max_attempts: 2
+
+
+stages:
+
+### START: B310 stages
+
+- stage: provide_b310_fpga_images_stage
+  displayName: Provide B310 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    UhdTestList: $[stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList']]
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.b310'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: b310
+      device_name: B310
+      ip_target: B310_IP
+      package_name: b3xx_b310_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/b300
+      target_full_matrix: ${{ parameters.b310_full_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.b310_reduced_targets_matrix }}
+
+### END: B310 stages

EttusResearch_uhd/.ci/fpga/devices/job-build-fpga-e31x.yml

@@ -0,0 +1,164 @@
+#
+# Copyright 2024 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This template defines a stages-based pipeline for building E31X FPGA targets.
+#
+#   See https://aka.ms/yaml for pipeline YAML documentation.
+#
+
+parameters:
+## Optional parameters
+# Option to ignore cached artifacts (if available) and perform
+# a clean IP build.
+- name: clean_ip_build
+  type: boolean
+  default: false
+# Number of parallel jobs to use for IP build
+- name: num_ip_jobs
+  type: number
+  default: 5
+# Option to publish intermediate files
+- name: publish_int_files
+  type: boolean
+  default: false
+# Package and publish images
+- name: package_and_publish_images
+  type: boolean
+  default: true
+# Package access in the SDR server ('Internal' or 'Public')
+- name: package_access
+  type: string
+  default: 'Internal'
+# From where to pull FPGA bitfiles if we're not building them
+- name: fpga_imgs_source
+  type: string
+  default: 'Mono Pipeline'
+# E310 FPGA targets to build
+- name: e31x_sg1_full_targets_matrix
+  type: object
+  default:
+    E310_SG1:
+      image_core: e310_rfnoc_image_core.yml
+      target_name: E310_SG1
+      image_core_name: usrp_e310_sg1_fpga
+      artifact_name: E310_SG1
+      timeout: 720
+      max_attempts: 2
+    E310_SG1_IDLE:
+      image_core: e310_rfnoc_image_core.yml
+      target_name: E310_SG1_IDLE
+      image_core_name: usrp_e310_sg1_idle_fpga
+      artifact_name: E310_SG1_IDLE
+      timeout: 720
+      max_attempts: 2
+- name: e31x_sg1_reduced_targets_matrix
+  type: object
+  default:
+    E310_SG1:
+      image_core: e310_rfnoc_image_core.yml
+      target_name: E310_SG1
+      image_core_name: usrp_e310_sg1_fpga
+      artifact_name: E310_SG1
+      timeout: 720
+      max_attempts: 2
+- name: e31x_sg3_full_targets_matrix
+  type: object
+  default:
+    E310_SG3:
+      image_core: e310_rfnoc_image_core.yml
+      target_name: E310_SG3
+      image_core_name: usrp_e310_sg3_fpga
+      artifact_name: E310_SG3
+      timeout: 720
+      max_attempts: 2
+    E310_SG3_IDLE:
+      image_core: e310_rfnoc_image_core.yml
+      target_name: E310_SG3_IDLE
+      artifact_name: E310_SG3_IDLE
+      image_core_name: usrp_e310_sg3_idle_fpga
+      timeout: 720
+      max_attempts: 2
+- name: e31x_sg3_reduced_targets_matrix
+  type: object
+  default:
+    E310_SG3:
+      image_core: e310_rfnoc_image_core.yml
+      target_name: E310_SG3
+      image_core_name: usrp_e310_sg3_fpga
+      artifact_name: E310_SG3
+      timeout: 720
+      max_attempts: 2
+- name: additional_setup_steps
+  type: stepList
+  default: []
+- name: rfnoc_include_dir
+  type: string
+  default: ""
+  displayName: RFNoC OOT module path
+
+
+stages:
+
+### START: E310 stages
+
+- stage: provide_e31x_sg1_fpga_images_stage
+  displayName: Provide E310 SG1 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    UhdTestList: $[stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList']]
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.e31x'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: e31x_sg1
+      device_name: E310 SG1
+      ip_target: E310_SG1_IP
+      package_name: e3xx_e310_sg1_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/e31x
+      target_full_matrix: ${{ parameters.e31x_sg1_full_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.e31x_sg1_reduced_targets_matrix }}
+      additional_setup_steps: ${{ parameters.additional_setup_steps }}
+      rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+- stage: provide_e31x_sg3_fpga_images_stage
+  displayName: Provide E310 SG3 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    UhdTestList: $[stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList']]
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.e31x'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: e31x_sg3
+      device_name: E310 SG3
+      ip_target: E310_SG3_IP
+      package_name: e3xx_e310_sg3_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/e31x
+      target_full_matrix: ${{ parameters.e31x_sg3_full_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.e31x_sg3_reduced_targets_matrix }}
+      additional_setup_steps: ${{ parameters.additional_setup_steps }}
+      rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+### END: E310 stages

EttusResearch_uhd/.ci/fpga/devices/job-build-fpga-e320.yml

@@ -0,0 +1,117 @@
+#
+# Copyright 2024 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This template defines a stages-based pipeline for building E320 FPGA targets.
+#
+#   See https://aka.ms/yaml for pipeline YAML documentation.
+#
+
+parameters:
+## Optional parameters
+# Option to ignore cached artifacts (if available) and perform
+# a clean IP build.
+- name: clean_ip_build
+  type: boolean
+  default: false
+# Number of parallel jobs to use for IP build
+- name: num_ip_jobs
+  type: number
+  default: 5
+# Option to publish intermediate files
+- name: publish_int_files
+  type: boolean
+  default: false
+# Package and publish images
+- name: package_and_publish_images
+  type: boolean
+  default: true
+# Package access in the SDR server ('Internal' or 'Public')
+- name: package_access
+  type: string
+  default: 'Internal'
+# From where to pull FPGA bitfiles if we're not building them
+- name: fpga_imgs_source
+  type: string
+  default: 'Mono Pipeline'
+# E320 FPGA targets to build
+- name: e320_full_targets_matrix
+  type: object
+  default:
+    E320_1G:
+      image_core: e320_rfnoc_image_core.yml
+      target_name: E320_1G
+      artifact_name: E320_1G
+      image_core_name: usrp_e320_fpga_1G
+      timeout: 720
+      max_attempts: 2
+    E320_XG:
+      image_core: e320_rfnoc_image_core.yml
+      target_name: E320_XG
+      artifact_name: E320_XG
+      image_core_name: usrp_e320_fpga_XG
+      timeout: 720
+      max_attempts: 2
+    E320_AA:
+      image_core: e320_rfnoc_image_core.yml
+      target_name: E320_AA
+      artifact_name: E320_AA
+      image_core_name: usrp_e320_fpga_AA
+      timeout: 720
+      max_attempts: 2
+- name: e320_reduced_targets_matrix
+  type: object
+  default:
+    E320_XG:
+      image_core: e320_rfnoc_image_core.yml
+      target_name: E320_XG
+      artifact_name: E320_XG
+      image_core_name: usrp_e320_fpga_XG
+      timeout: 720
+      max_attempts: 2
+    E320_1G:
+      image_core: e320_rfnoc_image_core.yml
+      target_name: E320_1G
+      artifact_name: E320_1G
+      image_core_name: usrp_e320_fpga_1G
+      timeout: 720
+      max_attempts: 2
+- name: additional_setup_steps
+  type: stepList
+  default: []
+- name: rfnoc_include_dir
+  type: string
+  default: ""
+  displayName: RFNoC OOT module path
+
+stages:
+- stage: provide_e320_fpga_images_stage
+  displayName: Provide E320 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    UhdTestList: $[stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList']]
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.e320'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: e320
+      device_name: E320
+      ip_target: E320_IP
+      package_name: e3xx_e320_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/e320
+      target_full_matrix: ${{ parameters.e320_full_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.e320_reduced_targets_matrix }}
+      additional_setup_steps: ${{ parameters.additional_setup_steps }}
+      rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}

EttusResearch_uhd/.ci/fpga/devices/job-build-fpga-n3xx.yml

@@ -0,0 +1,294 @@
+#
+# Copyright 2024 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This template defines a stages-based pipeline for building N3xx FPGA targets.
+#
+#   See https://aka.ms/yaml for pipeline YAML documentation.
+#
+
+parameters:
+## Optional parameters
+# Option to ignore cached artifacts (if available) and perform
+# a clean IP build.
+- name: clean_ip_build
+  type: boolean
+  default: false
+# Number of parallel jobs to use for IP build
+- name: num_ip_jobs
+  type: number
+  default: 5
+# Option to publish intermediate files
+- name: publish_int_files
+  type: boolean
+  default: false
+# Package and publish images
+- name: package_and_publish_images
+  type: boolean
+  default: true
+# Package access in the SDR server ('Internal' or 'Public')
+- name: package_access
+  type: string
+  default: 'Internal'
+# From where to pull FPGA bitfiles if we're not building them
+- name: fpga_imgs_source
+  type: string
+  default: 'Mono Pipeline'
+# N300 FPGA targets to build
+- name: n300_full_targets_matrix
+  type: object
+  default:
+    N300_HG:
+      image_core: n300_rfnoc_image_core.yml
+      target_name: N300_HG
+      artifact_name: N300_HG
+      image_core_name: usrp_n300_fpga_HG
+      timeout: 720
+      max_attempts: 2
+    N300_XG:
+      image_core: n300_rfnoc_image_core.yml
+      target_name: N300_XG
+      artifact_name: N300_XG
+      image_core_name: usrp_n300_fpga_XG
+      timeout: 720
+      max_attempts: 2
+    N300_WX:
+      image_core: n300_rfnoc_image_core.yml
+      target_name: N300_WX
+      artifact_name: N300_WX
+      image_core_name: usrp_n300_fpga_WX
+      timeout: 720
+      max_attempts: 2
+    N300_AA:
+      image_core: n300_bist_rfnoc_image_core.yml
+      target_name: N300_AA
+      artifact_name: N300_AA
+      image_core_name: usrp_n300_fpga_AA
+      timeout: 720
+      max_attempts: 2
+- name: n300_reduced_targets_matrix
+  type: object
+  default:
+    N300_HG:
+      image_core: n300_rfnoc_image_core.yml
+      target_name: N300_HG
+      artifact_name: N300_HG
+      image_core_name: usrp_n300_fpga_HG
+      timeout: 720
+      max_attempts: 2
+# N310 FPGA targets to build
+- name: n310_full_targets_matrix
+  type: object
+  default:
+    N310_HG:
+      image_core: n310_rfnoc_image_core.yml
+      target_name: N310_HG
+      artifact_name: N310_HG
+      image_core_name: usrp_n310_fpga_HG
+      timeout: 720
+      max_attempts: 2
+    N310_XG:
+      image_core: n310_rfnoc_image_core.yml
+      target_name: N310_XG
+      artifact_name: N310_XG
+      image_core_name: usrp_n310_fpga_XG
+      timeout: 720
+      max_attempts: 2
+    N310_WX:
+      image_core: n310_rfnoc_image_core.yml
+      target_name: N310_WX
+      artifact_name: N310_WX
+      image_core_name: usrp_n310_fpga_WX
+      timeout: 720
+      max_attempts: 2
+    N310_AA:
+      image_core: n310_bist_rfnoc_image_core.yml
+      target_name: N310_AA
+      artifact_name: N310_AA
+      image_core_name: usrp_n310_fpga_AA
+      timeout: 720
+      max_attempts: 2
+- name: n310_reduced_targets_matrix
+  type: object
+  default:
+    N310_HG:
+      image_core: n310_rfnoc_image_core.yml
+      target_name: N310_HG
+      artifact_name: N310_HG
+      image_core_name: usrp_n310_fpga_HG
+      timeout: 720
+      max_attempts: 2
+    N310_XG:
+      image_core: n310_rfnoc_image_core.yml
+      target_name: N310_XG
+      artifact_name: N310_XG
+      image_core_name: usrp_n310_fpga_XG
+      timeout: 720
+      max_attempts: 2
+# N320 FPGA targets to build
+- name: n320_full_targets_matrix
+  type: object
+  default:
+    N320_HG:
+      image_core: n320_rfnoc_image_core.yml
+      target_name: N320_HG
+      artifact_name: N320_HG
+      image_core_name: usrp_n320_fpga_HG
+      timeout: 720
+      max_attempts: 2
+    N320_XG:
+      image_core: n320_rfnoc_image_core.yml
+      target_name: N320_XG
+      artifact_name: N320_XG
+      image_core_name: usrp_n320_fpga_XG
+      timeout: 720
+      max_attempts: 2
+    N320_WX:
+      image_core: n320_rfnoc_image_core.yml
+      target_name: N320_WX
+      artifact_name: N320_WX
+      image_core_name: usrp_n320_fpga_WX
+      timeout: 720
+      max_attempts: 2
+    N320_AA:
+      image_core: n320_bist_rfnoc_image_core.yml
+      target_name: N320_AA
+      artifact_name: N320_AA
+      image_core_name: usrp_n320_fpga_AA
+      timeout: 720
+      max_attempts: 2
+    N320_AQ:
+      image_core: n320_rfnoc_image_core.yml
+      target_name: N320_AQ
+      artifact_name: N320_AQ
+      image_core_name: usrp_n320_fpga_AQ
+      timeout: 720
+      max_attempts: 2
+    N320_XQ:
+      image_core: n320_rfnoc_image_core.yml
+      target_name: N320_XQ
+      artifact_name: N320_XQ
+      image_core_name: usrp_n320_fpga_XQ
+      timeout: 720
+      max_attempts: 2
+- name: n320_reduced_targets_matrix
+  type: object
+  default:
+    N320_HG:
+      image_core: n320_rfnoc_image_core.yml
+      target_name: N320_HG
+      artifact_name: N320_HG
+      image_core_name: usrp_n320_fpga_HG
+      timeout: 720
+      max_attempts: 2
+    N320_XG:
+      image_core: n320_rfnoc_image_core.yml
+      target_name: N320_XG
+      artifact_name: N320_XG
+      image_core_name: usrp_n320_fpga_XG
+      timeout: 720
+      max_attempts: 2
+    N320_XQ:
+      image_core: n320_rfnoc_image_core.yml
+      target_name: N320_XQ
+      artifact_name: N320_XQ
+      image_core_name: usrp_n320_fpga_XQ
+      timeout: 720
+      max_attempts: 2
+- name: additional_setup_steps
+  type: stepList
+  default: []
+- name: rfnoc_include_dir
+  type: string
+  default: ""
+  displayName: RFNoC OOT module path
+
+
+stages:
+
+- stage: provide_n300_fpga_images_stage
+  displayName: Provide N300 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    UhdTestList: $[stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList']]
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.n3xx'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: n300
+      device_name: N300
+      ip_target: N300_IP
+      package_name: n3xx_n300_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/n3xx
+      target_full_matrix: ${{ parameters.n300_full_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.n300_reduced_targets_matrix }}
+      additional_setup_steps: ${{ parameters.additional_setup_steps }}
+      rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+- stage: provide_n310_fpga_images_stage
+  displayName: Provide N310 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    UhdTestList: $[stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList']]
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.n3xx'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: n310
+      device_name: N310
+      ip_target: N310_IP
+      package_name: n3xx_n310_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/n3xx
+      target_full_matrix: ${{ parameters.n310_full_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.n310_reduced_targets_matrix }}
+      additional_setup_steps: ${{ parameters.additional_setup_steps }}
+      rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+- stage: provide_n320_fpga_images_stage
+  displayName: Provide N320 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    UhdTestList: $[stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList']]
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.n3xx'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: n320
+      device_name: N320
+      ip_target: N320_IP
+      package_name: n3xx_n320_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/n3xx
+      target_full_matrix: ${{ parameters.n320_full_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.n320_reduced_targets_matrix }}
+      additional_setup_steps: ${{ parameters.additional_setup_steps }}
+      rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}

EttusResearch_uhd/.ci/fpga/devices/job-build-fpga-x300.yml

@@ -0,0 +1,179 @@
+#
+# Copyright 2024 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This template defines a stages-based pipeline for building X300 and X310 FPGA.
+#
+#   See https://aka.ms/yaml for pipeline YAML documentation.
+#
+
+parameters:
+## Optional parameters
+# Option to ignore cached artifacts (if available) and perform
+# a clean IP build.
+- name: clean_ip_build
+  type: boolean
+  default: false
+# Number of parallel jobs to use for IP build
+- name: num_ip_jobs
+  type: number
+  default: 5
+# Option to publish intermediate files
+- name: publish_int_files
+  type: boolean
+  default: false
+# Package and publish images
+- name: package_and_publish_images
+  type: boolean
+  default: true
+# Package access in the SDR server ('Internal' or 'Public')
+- name: package_access
+  type: string
+  default: 'Internal'
+# From where to pull FPGA bitfiles if we're not building them
+- name: fpga_imgs_source
+  type: string
+  default: 'Mono Pipeline'
+# X300 FPGA targets to build
+- name: x300_full_targets_matrix
+  type: object
+  default:
+    X300_HG:
+      image_core: x300_HG_rfnoc_image_core.yml
+      image_core_name: usrp_x300_fpga_HG
+      target_name: X300_HG
+      artifact_name: X300_HG
+      timeout: 720
+      max_attempts: 2
+    X300_XG:
+      image_core: x300_XG_rfnoc_image_core.yml
+      image_core_name: usrp_x300_fpga_XG
+      target_name: X300_XG
+      artifact_name: X300_XG
+      timeout: 720
+      max_attempts: 2
+- name: x300_reduced_targets_matrix
+  type: object
+  default:
+    X300_HG:
+      image_core: x300_HG_rfnoc_image_core.yml
+      image_core_name: usrp_x300_fpga_HG
+      target_name: X300_HG
+      artifact_name: X300_HG
+      timeout: 720
+      max_attempts: 2
+    X300_XG:
+      image_core: x300_XG_rfnoc_image_core.yml
+      image_core_name: usrp_x300_fpga_XG
+      target_name: X300_XG
+      artifact_name: X300_XG
+      timeout: 720
+      max_attempts: 2
+# X310 FPGA targets to build
+- name: x310_full_targets_matrix
+  type: object
+  default:
+    X310_HG:
+      image_core: x310_HG_rfnoc_image_core.yml
+      image_core_name: usrp_x310_fpga_HG
+      target_name: X310_HG
+      artifact_name: X310_HG
+      timeout: 720
+      max_attempts: 2
+    X310_XG:
+      image_core: x310_XG_rfnoc_image_core.yml
+      image_core_name: usrp_x310_fpga_XG
+      target_name: X310_XG
+      artifact_name: X310_XG
+      timeout: 720
+      max_attempts: 2
+- name: x310_reduced_targets_matrix
+  type: object
+  default:
+    X310_HG:
+      image_core: x310_HG_rfnoc_image_core.yml
+      image_core_name: usrp_x310_fpga_HG
+      target_name: X310_HG
+      artifact_name: X310_HG
+      timeout: 720
+      max_attempts: 2
+    X310_XG:
+      image_core: x310_XG_rfnoc_image_core.yml
+      image_core_name: usrp_x310_fpga_XG
+      target_name: X310_XG
+      artifact_name: X310_XG
+      timeout: 720
+      max_attempts: 2
+- name: additional_setup_steps
+  type: stepList
+  default: []
+- name: rfnoc_include_dir
+  type: string
+  default: ""
+  displayName: RFNoC OOT module path
+
+
+stages:
+
+### START: X300 stages
+
+- stage: provide_x300_fpga_images_stage
+  displayName: Provide X300 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    UhdTestList: $[stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList']]
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.x3xx'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: x300
+      device_name: X300
+      ip_target: X300_IP
+      package_name: x3xx_x300_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/x300
+      target_full_matrix: ${{ parameters.x300_full_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.x300_reduced_targets_matrix }}
+      additional_setup_steps: ${{ parameters.additional_setup_steps }}
+      rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+- stage: provide_x310_fpga_images_stage
+  displayName: Provide X310 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    UhdTestList: $[stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList']]
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.x3xx'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: x310
+      device_name: X310
+      ip_target: X310_IP
+      package_name: x3xx_x310_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/x300
+      target_full_matrix: ${{ parameters.x310_full_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.x310_reduced_targets_matrix }}
+      additional_setup_steps: ${{ parameters.additional_setup_steps }}
+      rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+### END: X310 stages

EttusResearch_uhd/.ci/fpga/devices/job-build-fpga-x400.yml

@@ -0,0 +1,147 @@
+#
+# Copyright 2024 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This template defines a stages-based pipeline for building X410 and X440 FPGA.
+#
+#   See https://aka.ms/yaml for pipeline YAML documentation.
+#
+
+parameters:
+## Optional parameters
+# Option to ignore cached artifacts (if available) and perform
+# a clean IP build.
+- name: clean_ip_build
+  type: boolean
+  default: false
+# Number of parallel jobs to use for IP build
+- name: num_ip_jobs
+  type: number
+  default: 5
+# Option to publish intermediate files
+- name: publish_int_files
+  type: boolean
+  default: false
+# Package and publish images
+- name: package_and_publish_images
+  type: boolean
+  default: true
+# Package access in the SDR server ('Internal' or 'Public')
+- name: package_access
+  type: string
+  default: 'Internal'
+# From where to pull FPGA bitfiles if we're not building them
+- name: fpga_imgs_source
+  type: string
+  default: 'Mono Pipeline'
+# X410 FPGA targets to build
+- name: x410_targets_matrix
+  type: object
+  default: {}
+# X420 FPGA targets to build
+- name: x420_targets_matrix
+  type: object
+  default: {}
+# X440 FPGA targets to build
+- name: x440_targets_matrix
+  type: object
+  default: {}
+- name: additional_setup_steps
+  type: stepList
+  default: []
+- name: rfnoc_include_dir
+  type: string
+  default: ""
+  displayName: RFNoC OOT module path
+
+stages:
+
+- stage: provide_x410_fpga_images_stage
+  displayName: Provide X410 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.x410'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.x4xx'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: x410
+      device_name: X410
+      ip_target: X410_IP
+      package_name: x4xx_x410_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/x400
+      target_full_matrix: ${{ parameters.x410_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.x410_targets_matrix }}
+      additional_setup_steps: ${{ parameters.additional_setup_steps }}
+      rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+- stage: provide_x420_fpga_images_stage
+  displayName: Provide X420 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.x420'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.x4xx'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: x420
+      device_name: X420
+      ip_target: X420_IP
+      package_name: x4xx_x420_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/x400
+      target_full_matrix: ${{ parameters.x420_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.x420_targets_matrix }}
+      additional_setup_steps: ${{ parameters.additional_setup_steps }}
+      rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+- stage: provide_x440_fpga_images_stage
+  displayName: Provide X440 FPGA Images
+  dependsOn: analyze_changeset
+  variables:
+    BuildRequired: $[or(
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.x440'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.x4xx'),
+                    contains(stageDependencies.analyze_changeset.analyze.outputs['gen_testlist.UhdTestList'], 'fpga.usrp3.all')
+                  )]
+  jobs:
+  - template: ../templates/jobs-provide-fpga-artifacts.yml
+    parameters:
+      id: x440
+      device_name: X440
+      ip_target: X440_IP
+      package_name: x4xx_x440_fpga_default
+      clean_ip_build: ${{ parameters.clean_ip_build }}
+      num_ip_jobs: ${{ parameters.num_ip_jobs }}
+      publish_int_files: ${{ parameters.publish_int_files }}
+      package_and_publish_images: ${{ parameters.package_and_publish_images }}
+      package_access: ${{ parameters.package_access }}
+      fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+      top_dir: uhddev/fpga/usrp3/top/x400
+      target_full_matrix: ${{ parameters.x440_targets_matrix }}
+      target_reduced_matrix: ${{ parameters.x440_targets_matrix }}
+      additional_setup_steps: ${{ parameters.additional_setup_steps }}
+      rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+
+### END: X440 stages

EttusResearch_uhd/.ci/fpga/scripts/merge_modelsim_ini.py

@@ -0,0 +1,22 @@
+#!/usr/bin/env python3
+"""
+Copyright 2025 Ettus Research, a National Instruments Brand
+
+SPDX-License-Identifier: LGPL-3.0-or-later
+
+Merge multiple INI files into a single one.
+"""
+
+import configparser
+import argparse
+
+parser = argparse.ArgumentParser(description=__doc__)
+parser.add_argument('files', type=str, nargs='+', help='a list of INI files to merge')
+parser.add_argument('-o', '--output', type=str, default='modelsim.ini', help='the output file name')
+args = parser.parse_args()
+
+config = configparser.ConfigParser()
+config.read(args.files)
+
+with open(args.output, 'w') as configfile:
+    config.write(configfile)

EttusResearch_uhd/.ci/fpga/scripts/refresh_ip.sh

@@ -0,0 +1,38 @@
+#
+# Copyright 2022 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This script first refreshes a given build IP directory to the current time
+#   (assume all the IP files within that directory were just built) and then
+#   the script touches all the files that changed between the current repo's
+#   working tree and a given hash (used to build IP).
+#   This allows the user to download pre-built IP (e.g. cached) and re-build
+#   only those IP components that changed in between the cached commit and the
+#   current working tree.
+#
+# Arguments:
+#
+#   $1 = absolute path to build-ip/ directory
+#   $2 = git hash used to build IP in $1
+#
+# Example:
+#
+#   bash .refresh_ip.sh `realpath path/to/build-ip` 1234abc
+#
+
+# # Step 1: refresh build-ip/ directory to current time
+echo "[refresh_ip.sh] Resetting timestamp for files in $1"
+find $1 -type f -exec touch --no-create {} +
+
+# # Step 2: determine all files that changed and update their time (dirty)
+echo "[refresh_ip.sh] Differences between $2 and working tree (marked dirty):"
+git diff --line-prefix=`git rev-parse --show-toplevel`/ --name-only $2 | \
+  while read -r line; do \
+    if [[ $line == *"ip/"* ]]; then \
+      echo "    $line"; \
+      touch --no-create $line; \
+    fi \
+  done

EttusResearch_uhd/.ci/fpga/scripts/run_setup.sh

@@ -0,0 +1,87 @@
+#
+# Copyright 2022 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   Script to run NI hwsetup and UHD setupenv for the target build. Always
+#   source this file.
+#
+#   Arguments:
+#
+#     $1 = Directory where setupenv is located
+#
+#  Example:
+#
+#     source run_setup.sh ./usrp3/top/x400
+#
+
+set -e
+
+echo "---- Set environment variables ----"
+export PATH=$HWT_SCRIPTS_DIR:$PATH
+export NETWORK_LIB_BASE_PATH="/mnt/argo/RnD/eda/libraries"
+# Avoid "ERROR: [Common 17-356] Failed to install all user apps."
+export XILINX_LOCAL_USER_DATA=no
+# Some of the FPGA tools expect TERM to be set. This avoids a bunch of error
+# messages about it from being printed in the logs.
+export TERM=xterm-256color
+
+echo "---- Run hwsetup ----"
+# This script sets the XILINX_VIVADO, MODELSIM, and LIB_BASE_PATH
+# variables based on the agent's configuration so we can find the EDA
+# tools.
+pushd $BUILD_SOURCESDIRECTORY/uhddev/.ci/hwtools
+source hwsetup.sh
+popd
+
+echo "---- Fetch the FPGA simulation libraries ----"
+# Compiling the simulation libraries.
+# Extracting the modelsim.ini path from the output.
+# Creating a temporary modelsim.mpf file for the scripting to work.
+echo "[Library]" > modelsim.mpf
+compileFpgaLibs vivado | tee compileFpgaLib.log
+VIVADO_MODELSIM_INI_PATH=$(grep Reading compileFpgaLib.log | awk '{print $3}' | sed 's/\x1b\[[0-9;]*m//g')
+compileFpgaLibs diamond | tee compileFpgaLib.log
+DIAMOND_MODELSIM_INI_PATH=$(grep Reading compileFpgaLib.log | awk '{print $3}' | sed 's/\x1b\[[0-9;]*m//g')
+# Combine all modelsim.ini files to local copy
+python $(dirname $BASH_SOURCE)/merge_modelsim_ini.py \
+    -o $BUILD_SOURCESDIRECTORY/modelsim.ini \
+    $VIVADO_MODELSIM_INI_PATH $DIAMOND_MODELSIM_INI_PATH
+# Removing the temporary files
+rm -f modelsim.mpf compileFpgaLib.log
+
+echo "---- Fetch Vivado patches ----"
+export PATCHES_DIR=$BUILD_SOURCESDIRECTORY/patches
+mkdir -p $PATCHES_DIR
+pushd $PATCHES_DIR
+# Fetch the AR76780 patch for Vivado
+cp /opt/synced/Xilinx/patches/AR76780_Vivado_2021_1_preliminary_rev1.zip ./AR76780_Vivado_2021_1_preliminary_rev1.zip
+unzip -q -o ./AR76780_Vivado_2021_1_preliminary_rev1.zip -d ./AR76780_Vivado_2021/
+rm -f AR76780_Vivado_2021_1_preliminary_rev1.zip
+# Add the AR76780 patch for the simulation library
+cp /opt/synced/modelsim/patches/fir_compiler_v7_2_76780.zip ./fir_compiler_v7_2_76780.zip
+unzip -q -o ./fir_compiler_v7_2_76780.zip -d ./fir_compiler_v7_2_76780/
+rm -f ./fir_compiler_v7_2_76780.zip
+popd
+
+echo "---- Apply the Vivado patches ----"
+pushd $BUILD_SOURCESDIRECTORY
+# Apply the patch to Vivado
+export XILINX_PATH=$PATCHES_DIR/AR76780_Vivado_2021/vivado
+# Add the FIR compiler simulation model to local modelsim.ini
+# Delete all lines containing "fir_compiler_v7_2_76780" to avoid duplicates
+sed -i -e '/fir_compiler_v7_2_76780/d' ./modelsim.ini
+# Duplicate line containing "fir_compiler_v7_2_16"
+sed -i -e '/fir_compiler_v7_2_16/p' ./modelsim.ini
+# Replace the first "fir_compiler_v7_2_16" line with our new library
+PATCHES_DIR_ESC=$(echo $PATCHES_DIR | sed 's_/_\\/_g')
+sed -i -e "0,/fir_compiler_v7_2_16/s/^fir_compiler_v7_2_16.*\$/fir_compiler_v7_2_76780 = $PATCHES_DIR_ESC\/fir_compiler_v7_2_76780/" ./modelsim.ini
+# Tell our build tools to use this modelsim.ini for this session
+export MODELSIM_INI=$(pwd)/modelsim.ini
+export MSIM_VIV_COMPLIBDIR=$(pwd)
+popd
+
+echo "---- Run setupenv ----"
+source $1/setupenv.sh --vivado-path $(dirname $XILINX_VIVADO) --modelsim-path $(dirname $MODELSIM)

EttusResearch_uhd/.ci/fpga/templates/check_clean_repo_steps.yml

@@ -0,0 +1,39 @@
+#
+# Copyright 2021 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   Checks for a clean repository (no untracked or modified files).
+#
+
+parameters:
+  # Directory to execute the commands in
+  - name: directory
+    type: string
+    default: $(Agent.BuildDirectory)/s/uhddev
+
+steps:
+- powershell: |
+    # Using git status as a way to check for a clean repo can produce
+    # misleading results when the line endings have been modified (XmlParse has
+    # a tendency to modify line endings). "git diff" seems to produce more
+    # reliable results, and the --exit-code is useful for detecting a change/no
+    # change summary.
+
+    # Add all untracked files and checked changes in staged area.
+    git add -A .
+    git diff --cached --binary --exit-code > clean_repo.patch
+
+    # Use exit code to determine if there are any changes, and if so, fail the build
+    if ($LASTEXITCODE -ne 0) {
+      throw "Repository is not clean. See clean_repo.patch for details."
+    }
+  displayName: 'Check clean repository'
+  workingDirectory: ${{ parameters.directory }}
+
+- publish: ${{ parameters.directory }}/clean_repo.patch
+  artifact: '$(System.JobDisplayName) clean repo patch'
+  condition: failed()
+  displayName: 'Publish clean repo patch file'

EttusResearch_uhd/.ci/fpga/templates/job-build-cpld.yml

@@ -0,0 +1,96 @@
+#
+# Copyright 2025 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This template should be used for CPLD builds.
+#   Exports the final programming files as pipeline artifacts.
+#
+#   See description for the parameters below.
+#
+
+parameters:
+  # Publishes the intermediate files from the build-* directories as pipeline artifacts.
+  - name: publish_int_files
+    type: boolean
+    default: false
+
+  # cpldBuilds: List of CPLD builds to be executed
+  # each element is a list of 3 strings (displayName, workingDirectory, artifactName)
+  # e.g ['ZBX CPLD Build', './top/x400/dboards/zbx/cpld', 'CPLD_ZBX']
+  - name: cpldBuilds
+    type: object
+    default: []
+
+jobs:
+- ${{ each cpldBuild in parameters.cpldBuilds }}:
+  - job:
+    displayName: ${{ cpldBuild.displayName }}
+    timeoutInMinutes: 30
+    pool:
+      name: Drivers-NIBuildFarm-RFMIBUILD
+      demands:
+      - Agent.OS -equals Linux
+    variables:
+    - group: sdr-pipeline-vars
+    steps:
+      - template: setup_steps.yml
+        parameters:
+          includeAdditionalSources: ${{ coalesce(cpldBuild.includeAdditionalSources, false) }}
+          ref: ${{ coalesce(cpldBuild.ref, '') }}
+
+      - bash: |
+          # Find the directory containing setupenv.sh by searching upwards from the working directory
+          search_dir="${{ cpldBuild.workingDirectory }}"
+          while [[ "$search_dir" != "." && "$search_dir" != "/" ]]; do
+            if [[ -f "$search_dir/setupenv.sh" ]]; then
+              setup_dir="$search_dir"
+              break
+            fi
+            search_dir="$(dirname "$search_dir")"
+          done
+
+          if [[ -z "$setup_dir" ]]; then
+            echo "setupenv.sh not found in hierarchy."
+            exit 1
+          else
+            echo "Found setupenv.sh in: $setup_dir"
+          fi
+
+          source $(Build.SourcesDirectory)/uhddev/.ci/fpga/scripts/run_setup.sh $setup_dir
+
+          echo "---- Run build: ${{ cpldBuild.displayName }} ----"
+          cd ${{ cpldBuild.workingDirectory }}
+          make
+        workingDirectory: uhddev/fpga/usrp3
+        env:
+          PATCHES_PATH: $(sdr-vivado-patches)
+        displayName: ${{ cpldBuild.displayName }}
+
+      # Publish the final result only if all previous steps passed
+      - publish: uhddev/fpga/usrp3/${{ cpldBuild.workingDirectory }}/build
+        artifact: ${{ cpldBuild.artifactName }}
+        displayName: 'Publish ${{ cpldBuild.displayName }}'
+
+      # Publish CPLD build intermediate files on request (even if the build failed)
+      # Publish uhddev/fpga/usrp3/${{ cpldBuild.workingDirectory }}/build-*
+      - bash: |
+          cd ${{ cpldBuild.workingDirectory }}
+          cp -r build-* $(Build.ArtifactStagingDirectory)
+        workingDirectory: uhddev/fpga/usrp3
+        env:
+          PATCHES_PATH: $(sdr-vivado-patches)
+        displayName: 'Copy build directories'
+        condition: and(always(), eq('${{ parameters.publish_int_files }}', true))
+
+      - publish: $(Build.ArtifactStagingDirectory)
+        artifact: '${{ cpldBuild.artifactName }}_Build_Directory Attempt $(System.JobAttempt)'
+        displayName: 'Publish ${{ cpldBuild.displayName }} Directory'
+        condition: and(always(), eq('${{ parameters.publish_int_files }}', true))
+
+      # Check if CPLD build left any untracked files.
+      - template: check_clean_repo_steps.yml
+        parameters:
+          directory: uhddev/

EttusResearch_uhd/.ci/fpga/templates/job-build-fpga-all.yml

@@ -0,0 +1,141 @@
+#
+# Copyright 2025 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: GPL-3.0-or-later
+#
+# Description:
+#
+#   This template defines a stages-based pipeline for building all FPGA bitfiles.
+#
+
+parameters:
+## Optional parameters
+# Option to ignore cached artifacts (if available) and perform
+# a clean IP build.
+- name: clean_ip_build
+  type: boolean
+  default: false
+# Number of parallel jobs to use for IP build
+- name: num_ip_jobs
+  type: number
+  default: 5
+# Option to publish intermediate files
+- name: publish_int_files
+  type: boolean
+  default: false
+# Package and publish images
+- name: package_and_publish_images
+  type: boolean
+  default: true
+# Package access in the SDR server ('Internal' or 'Public')
+- name: package_access
+  type: string
+  default: 'Internal'
+# From where to pull FPGA bitfiles if we're not building them
+- name: fpga_imgs_source
+  type: string
+  default: 'Mono Pipeline'
+## Device-specific parameters
+- name: x410_targets_matrix
+  type: object
+  default: {}
+- name: x420_targets_matrix
+  type: object
+  default: {}
+- name: x440_targets_matrix
+  type: object
+  default: {}
+- name: additional_setup_steps
+  type: stepList
+  default: []
+- name: rfnoc_include_dir
+  type: string
+  default: ""
+  displayName: RFNoC OOT module path
+
+
+stages:
+### START: X400 stages
+
+- template: ../devices/job-build-fpga-x400.yml
+  parameters:
+    clean_ip_build: ${{ parameters.clean_ip_build }}
+    publish_int_files: ${{ parameters.publish_int_files }}
+    package_and_publish_images: ${{ parameters.package_and_publish_images }}
+    package_access: ${{ parameters.package_access }}
+    x410_targets_matrix: ${{ parameters.x410_targets_matrix }}
+    x420_targets_matrix: ${{ parameters.x420_targets_matrix }}
+    x440_targets_matrix: ${{ parameters.x440_targets_matrix }}
+    fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+    additional_setup_steps: ${{ parameters.additional_setup_steps }}
+    rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+### END: X400 stages
+
+### START: X3x0 stages
+
+- template: ../devices/job-build-fpga-x300.yml
+  parameters:
+    clean_ip_build: ${{ parameters.clean_ip_build }}
+    publish_int_files: ${{ parameters.publish_int_files }}
+    package_and_publish_images: ${{ parameters.package_and_publish_images }}
+    package_access: ${{ parameters.package_access }}
+    fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+    additional_setup_steps: ${{ parameters.additional_setup_steps }}
+    rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+### END: X3x0 stages
+
+### START: N3xx stages
+
+- template: ../devices/job-build-fpga-n3xx.yml
+  parameters:
+    clean_ip_build: ${{ parameters.clean_ip_build }}
+    publish_int_files:  ${{ parameters.publish_int_files }}
+    package_and_publish_images: ${{ parameters.package_and_publish_images }}
+    package_access: ${{ parameters.package_access }}
+    fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+    additional_setup_steps: ${{ parameters.additional_setup_steps }}
+    rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+### END: N3xx stages
+
+### START: E31x stages
+
+- template: ../devices/job-build-fpga-e31x.yml
+  parameters:
+    clean_ip_build: ${{ parameters.clean_ip_build }}
+    publish_int_files:  ${{ parameters.publish_int_files }}
+    package_and_publish_images: ${{ parameters.package_and_publish_images }}
+    package_access: ${{ parameters.package_access }}
+    fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+    additional_setup_steps: ${{ parameters.additional_setup_steps }}
+    rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+### END: E31x stages
+
+### START: E320 stages
+
+- template: ../devices/job-build-fpga-e320.yml
+  parameters:
+    clean_ip_build: ${{ parameters.clean_ip_build }}
+    publish_int_files:  ${{ parameters.publish_int_files }}
+    package_and_publish_images: ${{ parameters.package_and_publish_images }}
+    package_access: ${{ parameters.package_access }}
+    fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+    additional_setup_steps: ${{ parameters.additional_setup_steps }}
+    rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+
+### END: E320 stages
+
+### START: B310 stages
+
+- template: ../devices/job-build-fpga-b310.yml
+  parameters:
+    clean_ip_build: ${{ parameters.clean_ip_build }}
+    publish_int_files:  ${{ parameters.publish_int_files }}
+    package_and_publish_images: ${{ parameters.package_and_publish_images }}
+    package_access: ${{ parameters.package_access }}
+    fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
+
+### END: B310 stages

EttusResearch_uhd/.ci/fpga/templates/job-build-fpga.yml

@@ -0,0 +1,181 @@
+#
+# Copyright 2022 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This template shall be used for FPGA builds within the uhddev
+#   repository. Exports the FPGA build results (bitfile, device tree and build
+#   report from build directory) as artifacts '<target>'.
+#
+#   See description for the parameters below.
+#
+
+parameters:
+### Required parameters
+# FPGA targets to be built.
+# E.g.
+#   targets_matrix:
+#     X410_XG_100:
+#       target: X410_XG_100
+#       timeout: 480
+#     X410_X4_200:
+#       target: X410_X4_200
+#       timeout: 480
+- name: targets_matrix
+  type: object
+# IP artifact name (from pipeline) to be used
+- name: ip_artifact
+  type: string
+# PATH to device's top directory (where Makefile is located)
+- name: top_dir
+  type: string
+
+### Optional parameters
+# Set to true if the intermediate files from build-<target> directory should
+# be exported for debugging as artifact 'Build artifacts <target> (Attempt <attempt>)'
+- name: publish_int_files
+  type: boolean
+  default: false
+- name: max_parallel
+  type: number
+  default: 20
+  displayName: 'Max parallel jobs'
+- name: additional_setup_steps
+  type: stepList
+  default: []
+- name: rfnoc_include_dir
+  type: string
+  default: ""
+  displayName: RFNoC OOT module path
+
+
+jobs:
+- job: build_fpga
+  displayName: 'Build FPGA'
+  timeoutInMinutes: $[ variables['timeout'] ]
+  pool:
+    name: Drivers-NIBuildFarm-RFMIBUILD
+    demands:
+    - Agent.OS -equals Linux
+    - SUPER_HIGH_CPU_PER_THREAD
+  variables:
+  - group: sdr-pipeline-vars
+  strategy:
+    matrix:
+      ${{ parameters.targets_matrix }}
+    maxParallel: ${{ parameters.max_parallel }}
+  dependsOn: ${{ parameters.ip_artifact }}
+  condition: and(succeeded(), eq(variables.BuildRequired, true))
+  steps:
+    - ${{ parameters.additional_setup_steps }}
+    - template: setup_steps.yml
+
+    - download: current
+      artifact: ${{ parameters.ip_artifact }}
+      displayName: 'Download ${{ parameters.ip_artifact }}'
+
+    - bash: |
+        mv $(Pipeline.Workspace)/${{ parameters.ip_artifact }} \
+           ${{ parameters.top_dir }}/build-ip/
+      displayName: 'Populate build-ip'
+
+    - bash: |
+        # Purge any existing UHD install
+        rm -rf $(Build.BinariesDirectory)/prefix $(Build.BinariesDirectory)/build_image_builder
+        mkdir -p $(Build.BinariesDirectory)/prefix
+        # hwtools hwsetup.sh will setup a venv, so we'll reuse that for the
+        # image builder! That's also why we install the image builder in the
+        # same step as building the bitfile: To avoid having to run hwsetup.sh
+        # twice.
+        echo "##[group]Setting up build environment..."
+        source $(Build.SourcesDirectory)/uhddev/.ci/fpga/scripts/run_setup.sh ./
+        python3 -m pip install --upgrade pip
+        pip3 install -U numpy mako "ruamel.yaml<0.18.0" jsonschema
+        set -o xtrace
+        # hwsetup.sh injects garbage cmake versions into PATH, so avoid that by
+        # going straight to /usr/bin/cmake
+        /usr/bin/cmake -S $(Build.SourcesDirectory)/uhddev/host \
+          -B $(Build.BinariesDirectory)/build_image_builder \
+          -DCMAKE_INSTALL_PREFIX=$(Build.BinariesDirectory)/prefix \
+          -DUHD_BOOST_REQUIRED=OFF \
+          -DENABLE_LIBUHD=OFF -DENABLE_PYMOD_UTILS=ON \
+          -DENABLE_DOXYGEN=OFF -DENABLE_MAN_PAGES=OFF -DENABLE_MANUAL=OFF
+        /usr/bin/cmake --build $(Build.BinariesDirectory)/build_image_builder
+        /usr/bin/cmake --install $(Build.BinariesDirectory)/build_image_builder
+        echo "##[group]Executing FPGA build..."
+        # rfnoc_image_builder does not currently get installed to a bin/ folder
+        # via pip, so we add it to PATH
+        export PATH=$BUILD_BINARIESDIRECTORY/prefix/bin:$VIRTUAL_ENV/bin:$PATH
+        if [ -n "$TARGET_NAME" ]; then
+            export TARGET_ARG="--target $TARGET_NAME"
+        fi
+        if [ -z "$IMAGE_CORE_NAME" ]; then
+            echo "##vso[task.logissue type=error]image_core_name must be set for proper functioning of pipeline!"
+            exit 1
+        fi
+        if [[ -z "$BUILD_SEED" ]]
+        then
+          export BUILD_SEED=$(($(System.JobAttempt)-1))
+        fi
+        # Add timeout arg if provided, otherwise don't specify a timeout.
+        if [ -n "$ATTEMPT_TIMEOUT" ]; then
+            # Convert from minutes to hours
+            export TIMEOUT_ARG="--timeout $(echo "scale=2; $ATTEMPT_TIMEOUT / 60.0" | bc)"
+        else
+            export TIMEOUT_ARG=""
+        fi
+        if [[ -n "${{ parameters.rfnoc_include_dir }}" ]]; then
+            export INCLUDE_DIR_ARG="--include-dir ${{ parameters.rfnoc_include_dir }}"
+        fi
+        python3 ../../tools/utils/repeat_fpga_build.py \
+            --image-core $(image_core) $TARGET_ARG $BITFILE_NAME_ARG $INCLUDE_DIR_ARG \
+            --image-core-name $IMAGE_CORE_NAME \
+            --vivado-path $(dirname $XILINX_VIVADO) \
+            --num $(max_attempts) --seed $BUILD_SEED --persistent \
+            $TIMEOUT_ARG
+        pip3 uninstall -y uhd
+      workingDirectory: ${{ parameters.top_dir }}
+      displayName: 'Build Target'
+      name: build_target
+
+    # Publish the final result only if all previous steps passed
+    - publish: ${{ parameters.top_dir }}/build
+      artifact: '$(artifact_name)'
+      displayName: 'Publish FPGA'
+
+    # Create a variable so we know that we generated this artifact
+    - bash: |
+        echo "##vso[task.setvariable variable=GeneratedArtifact_$(artifact_name);isOutput=true]true"
+        echo "##vso[task.setvariable variable=GeneratedArtifact;isOutput=true]true"
+        echo "Variable name: GeneratedArtifact_$(artifact_name)"
+      displayName: 'Set GeneratedArtifact variable'
+      name: set_generated_artifact_variable
+
+    # extract build artifact directory
+    - bash: |
+        export BUILD_ARTIFACT_DIR=`ls | grep build-usrp`
+        echo "Build artifact dir: $BUILD_ARTIFACT_DIR"
+        echo "##vso[task.setvariable variable=BuildArtifactDir;isOutput=true]$BUILD_ARTIFACT_DIR"
+        echo "##vso[task.setvariable variable=image_core_basename;isOutput=true]`basename $(image_core)`"
+      workingDirectory: ${{ parameters.top_dir }}
+      displayName: 'Find Build Artifact Directory'
+      name: find_build_artifact_dir
+      condition: and(always(), eq('${{ parameters.publish_int_files }}', true))
+
+    # Publish intermediate files.
+    - publish: ${{ parameters.top_dir }}/$(find_build_artifact_dir.BuildArtifactDir)
+      artifact: 'Build artifacts for $(find_build_artifact_dir.image_core_basename) (Target $(target_name), Image core name $(image_core_name),  Attempt $(System.JobAttempt))'
+      condition: and(always(), eq('${{ parameters.publish_int_files }}', true))
+      displayName: 'Publish Build Directory'
+
+    # Check if FPGA build left any untracked files.
+    - template: check_clean_repo_steps.yml
+      parameters:
+        directory: ${{ parameters.top_dir }}
+
+    - bash: |
+        make cleanall
+      workingDirectory: ${{ parameters.top_dir }}
+      displayName: 'Clean up build artifacts'

EttusResearch_uhd/.ci/fpga/templates/job-build-ip.yml

@@ -0,0 +1,114 @@
+#
+# Copyright 2022 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This template should be used for IP builds within the uhddev repository.
+#   This job uses Azure's caching mechanism to speed up the build. A
+#   successful job publishes the corresponding build-ip/ directory as a
+#   pipeline artifact.
+#
+#   See description for the parameters below.
+#
+
+parameters:
+### Required parameters
+# PATH to device's top directory (where Makefile is located)
+- name: directory
+  type: string
+# Name of the IP Make target (e.g. X410_IP for X410's IP)
+- name: ip_target
+  type: string
+
+
+### Optional parameters
+# Option to ignore cached artifacts (when available) and perform
+# a clean IP build.
+- name: clean_build
+  type: boolean
+  default: false
+# Number of parallel jobs to use for IP build
+- name: num_jobs
+  type: number
+  default: 5
+- name: additional_setup_steps
+  type: stepList
+  default: []
+
+jobs:
+- job: ${{ parameters.ip_target }}
+  displayName: 'Build ${{ parameters.ip_target }}'
+  pool:
+    name: Drivers-NIBuildFarm-RFMIBUILD
+    demands:
+    - Agent.OS -equals Linux
+    - HIGH_CPU_PER_THREAD
+  timeoutInMinutes: 240
+  variables:
+  - group: sdr-pipeline-vars
+  condition: and(succeeded(), eq(variables.BuildRequired, true))
+  steps:
+    - ${{ parameters.additional_setup_steps }}
+    - template: setup_steps.yml
+
+    # Pipeline caching is leveraged in this job to minimize the time it takes
+    # to build all the IP.
+    # At a high level, the pipeline checks for an available and valid cache
+    # artifact from its scope (target branch in PR or its own branch) and
+    # downloads it to the workspace (Cache hit).
+    # If no valid cache artifact exists (Cache miss), then the build will run
+    # and the pipeline will automatically save the result as a cache artifact
+    # for subsequent runs.
+    # Further details on "Pipeline caching" available online:
+    #   https://docs.microsoft.com/en-us/azure/devops/pipelines/release/caching?view=azure-devops
+    # We always allow the Cache task to run, even in clean builds. This way
+    # when in a cache miss, the IP build from that run will be saved as an
+    # artifact for subsequent CI and PR runs to fetch.
+    - task: Cache@2
+      inputs:
+        key: "uhddev-fpga-${{ parameters.ip_target }}"
+        path: ${{ parameters.directory }}/build-ip
+        cacheHitVar: CACHE_RESTORED
+      displayName: Cache IP
+
+    - bash: |
+        BUILD_IP_CACHE_HASH=`cat build-ip/.ci/build-hash`
+        echo "BUILD_IP_CACHE_HASH=$BUILD_IP_CACHE_HASH"
+        git fetch origin $BUILD_IP_CACHE_HASH
+        bash $(Build.SourcesDirectory)/uhddev/.ci/fpga/scripts/refresh_ip.sh \
+          `realpath build-ip/` $BUILD_IP_CACHE_HASH
+      workingDirectory: ${{ parameters.directory }}
+      # Refresh IP when caching is allowed (clean_build = false) and a cache
+      # artifact was fetched.
+      condition: and(eq('${{ parameters.clean_build }}', 'false'), eq(variables.CACHE_RESTORED, 'true'))
+      displayName: "Refresh IP"
+
+    - bash: |
+        echo "Clean IP build requested, removing existing build-ip"
+        rm -rf build-ip
+      workingDirectory: ${{ parameters.directory }}
+      # Remove build-ip directory whenever a clean IP build is requested.
+      condition: eq('${{ parameters.clean_build }}', 'true')
+      displayName: "Prune IP"
+
+    - bash: |
+        source $(Build.SourcesDirectory)/uhddev/.ci/fpga/scripts/run_setup.sh ./
+        make -j ${{ parameters.num_jobs }} ${{ parameters.ip_target }}
+        mkdir -p build-ip/.ci/
+        git rev-parse --verify HEAD 2>/dev/null 1>build-ip/.ci/build-hash
+      workingDirectory: ${{ parameters.directory }}
+      displayName: "Build IP"
+
+    - publish: ${{ parameters.directory }}/build-ip
+      artifact: '${{ parameters.ip_target }} (Attempt $(System.JobAttempt))'
+      condition: failed()
+
+    - publish: ${{ parameters.directory }}/build-ip
+      artifact: ${{ parameters.ip_target }}
+      condition: succeeded()
+
+    - template: check_clean_repo_steps.yml
+      parameters:
+        directory: ${{ parameters.directory }}

EttusResearch_uhd/.ci/fpga/templates/job-guarantee-artifacts.yml

@@ -0,0 +1,55 @@
+#
+# Copyright 2025 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: GPL-3.0-or-later
+#
+# Description:
+#
+#   This job guarantees the availability of FPGA artifacts for downstream jobs.
+#   If the artifacts are not available, they are downloaded from a different
+#   pipeline (declared by uhdFpgaArtifactSource) and published.
+#
+#   This job requires a variable "ArtifactsGenerated" to be set to "NotGenerated"
+#   or "Generated" to determine if the artifacts are already available.
+
+parameters:
+- name: id
+  default: ''
+  type: string
+- name: artifacts_matrix
+  default: []
+  type: object
+  # Identify a pipeline resource. This should never be "current", because this
+  # is for downloading artifacts from other pipelines!
+- name: uhdFpgaArtifactSource
+  type: string
+  default: uhd_mono_pipeline
+
+jobs:
+- job: check_artifact_availability_${{ parameters.id }}
+  variables:
+    - group: sdr-pipeline-vars
+  dependsOn: build_fpga
+  condition: ne(variables.BuildRequired, true)
+  pool:
+    name: Drivers-NIBuildFarm-RFMIBUILD
+    demands:
+    - Agent.OS -equals Linux
+  displayName: 'Check FPGA artifacts availability for ${{ parameters.id }}'
+
+  steps:
+    - checkout: none
+    - ${{ each artifact in parameters.artifacts_matrix }}:
+      - download: ${{ parameters.uhdFpgaArtifactSource }}
+        artifact: ${{ artifact.key }}
+        displayName: 'Download ${{ artifact.value.artifact_name }}'
+        name: download_${{ artifact.key }}
+
+      - task: PublishPipelineArtifact@1
+        inputs:
+          targetPath: $(Agent.BuildDirectory)/${{ parameters.uhdFpgaArtifactSource }}/${{ artifact.key }}
+          artifact: ${{ artifact.key }}
+        displayName: 'Publish ${{ artifact.key }}'
+        # We continue on error, because the error means that the artifact already
+        # exists and we did something wrong elsewhere.
+        continueOnError: true

EttusResearch_uhd/.ci/fpga/templates/job-package-images.yml

@@ -0,0 +1,108 @@
+#
+# Copyright 2022 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This template shall be used to package images.
+#
+#   See description for the parameters below.
+#
+
+parameters:
+### Required parameters
+# Package name for identification purposes
+- name: package_name
+  type: string
+# FPGA artifacts to be downloaded to "build_directory"
+# Note that the value for each key is not used in this job.
+# E.g.
+#   targets_matrix:
+#     X410_XG_100:
+#       target: X410_XG_100
+#       timeout: 480
+#     X410_X4_200:
+#       target: X410_X4_200
+#       timeout: 480
+- name: artifacts_matrix
+  type: object
+# PATH to device's build directory (where artifacts will be copied and
+# packaging utility will be run)
+- name: build_directory
+  type: string
+- name: package_and_publish_images
+  type: boolean
+### Optional parameters
+# Package access in the SDR server ('Internal' or 'Public')
+- name: package_access
+  type: string
+  default: 'Internal'
+
+
+jobs:
+- job: ${{ parameters.package_name }}
+  displayName: 'Package & Publish ${{ parameters.package_name }}'
+  timeoutInMinutes: 10
+  dependsOn: build_fpga
+  condition: and(succeeded(), eq(variables.BuildRequired, true), eq('${{ parameters.package_and_publish_images }}', 'true'))
+  pool:
+    name: Drivers-NIBuildFarm-RFMIBUILD
+    demands:
+    - Agent.OS -equals Linux
+  variables:
+    - group: sdr-pipeline-vars
+  steps:
+    - checkout: self
+      clean: true
+
+    - ${{ each artifact in parameters.artifacts_matrix }}:
+      - download: current
+        artifact: ${{ artifact.value.artifact_name }}
+        displayName: 'Download ${{ artifact.value.artifact_name }}'
+
+    - ${{ each artifact in parameters.artifacts_matrix }}:
+      - bash: |
+          mkdir -p ${{ parameters.build_directory }}
+          cp $(Pipeline.Workspace)/${{ artifact.value.artifact_name }}/* \
+             ${{ parameters.build_directory }}/
+          rm -rf $(Pipeline.Workspace)/${{ artifact.value.artifact_name }}/
+        displayName: 'Populate ${{ artifact.value.artifact_name }} artifacts'
+
+    - bash: |
+        OSS_REPO_HASH="$(git rev-parse --verify HEAD --short=7 2>/dev/null)"
+        echo "##vso[task.setvariable variable=OSS_REPO_HASH]$OSS_REPO_HASH"
+        echo "OSS Repo hash: $OSS_REPO_HASH"
+        python3 $(Build.SourcesDirectory)/fpga/usrp3/tools/utils/package_images.py \
+          --manifest $(Build.SourcesDirectory)/images/manifest.txt \
+          --githash "uhd-$OSS_REPO_HASH"
+        git diff --patch $(Build.SourcesDirectory)/images/manifest.txt > \
+          ${{ parameters.package_name }}-g$OSS_REPO_HASH.patch
+        git restore $(Build.SourcesDirectory)/images/manifest.txt
+        rm -f *.bit *.dts *.rpt *.md5
+      workingDirectory: ${{ parameters.build_directory }}
+      displayName: 'Run package_images.py'
+
+    # Publish the final result only if all previous steps passed
+    - publish: ${{ parameters.build_directory }}
+      artifact: '${{ parameters.package_name }}-g$(OSS_REPO_HASH)'
+      displayName: 'Publish package to AzDO'
+
+    - bash: |
+        if [[ "${{ parameters.package_access }}" == *"Public"* ]]; then
+          echo "##vso[task.setvariable variable=publish_path]$(sdr-public-binaries)";
+        else
+          echo "##vso[task.setvariable variable=publish_path]$(sdr-internal-binaries)";
+        fi
+      workingDirectory: ${{ parameters.build_directory }}
+      displayName: 'Determine SDR server publishing path'
+
+    - task: CopyFilesOverSSH@0
+      inputs:
+        sshEndpoint: 'sdr-server-ssh'
+        sourceFolder: '${{ parameters.build_directory }}'
+        contents: 'cache/*/**'
+        targetFolder: $(publish_path)
+        readyTimeout: '20000'
+        failOnEmptySource: true
+      displayName: 'Publish package to SDR server'

EttusResearch_uhd/.ci/fpga/templates/job-regmap.yml

@@ -0,0 +1,35 @@
+#
+# Copyright 2025 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   Updating the register maps for the X400 based FPGA designs.
+#
+jobs:
+- job:
+  displayName: "Check regmaps"
+  timeoutInMinutes: 30
+  pool:
+    name: Drivers-NIBuildFarm-RFMIBUILD
+    demands:
+    - Agent.OS -equals Linux
+  variables:
+  - group: sdr-pipeline-vars
+  steps:
+    - template: setup_steps.yml
+      parameters:
+        includeAdditionalSources: true
+
+    - bash: |
+        # Set up the hwtools path and run the build script
+        source $(Build.SourcesDirectory)/uhddev/.ci/fpga/scripts/run_setup.sh $(Build.SourcesDirectory)/uhddev/fpga/usrp3/top/x400
+        python build.py
+      workingDirectory: uhddev/.ci/hwtools
+      displayName: "Run xmlparse"
+
+    # Check if regmaps are up to date
+    - template: check_clean_repo_steps.yml
+      parameters:
+        directory: uhddev

EttusResearch_uhd/.ci/fpga/templates/job-run-testbenches.yml

@@ -0,0 +1,52 @@
+#
+# Copyright 2022 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   This template is used to run all the testbenches using the requested simulator.
+#
+
+parameters:
+### Required parameters
+# Simulator to use (e.g. modelsim, xsim, etc.)
+- name: simulator
+  type: string
+
+jobs:
+- job:
+  displayName: "${{ parameters.simulator }} Simulation"
+  timeoutInMinutes: 360
+  pool:
+    name: Drivers-NIBuildFarm-RFMIBUILD
+    demands:
+    - Agent.OS -equals Linux
+  variables:
+  - group: sdr-pipeline-vars
+  - name: excludes_file
+    value: ${{ iif(eq(parameters.simulator, 'xsim'), 'testbenches', parameters.simulator) }}
+  steps:
+    - template: setup_steps.yml
+      parameters:
+        includeAdditionalSources: true
+
+    - bash: |
+        source $(Build.SourcesDirectory)/uhddev/.ci/fpga/scripts/run_setup.sh ./top/x300
+
+        echo "---- Run testbenches ----"
+        pushd ./tools/utils
+        python3 -m pip install --upgrade pip
+        pip3 install -r requirements.txt
+        python3 ./run_testbenches.py --logged --simulator ${{ parameters.simulator }} --excludes=${{ variables.excludes_file }}.excludes -j4 --report $(Build.ArtifactStagingDirectory)/junit.xml run
+        popd
+      workingDirectory: uhddev/fpga/usrp3
+      displayName: "Run Testbenches"
+
+    - task: PublishTestResults@2
+      inputs:
+        testResultsFormat: 'JUnit'
+        testResultsFiles: 'junit.xml'
+        searchFolder: $(Build.ArtifactStagingDirectory)
+        failTaskOnFailedTests: True
+      condition: succeededOrFailed()

EttusResearch_uhd/.ci/fpga/templates/jobs-provide-fpga-artifacts.yml

@@ -0,0 +1,94 @@
+parameters:
+# A short identifier to create unique names
+- name: id
+  default: ''
+  type: string
+# The variable name of the Boolean that tells us if we need to build new artifacts
+# Device name, only used for pretty-printing
+- name: device_name
+  default: ''
+  type: string
+# IP target to build
+- name: ip_target
+  default: ''
+  type: string
+# Package name (e.g., e
+- name: package_name
+  type: string
+  default: ''
+- name: clean_ip_build
+  type: boolean
+  default: false
+- name: num_ip_jobs
+  type: number
+  default: 5
+# Option to publish intermediate files
+- name: publish_int_files
+  type: boolean
+  default: false
+# Package and publish images
+- name: package_and_publish_images
+  type: boolean
+  default: true
+# Package access in the SDR server ('Internal' or 'Public')
+- name: package_access
+  type: string
+  default: 'Internal'
+# From where to pull FPGA bitfiles if we're not building them
+- name: fpga_imgs_source
+  type: string
+  default: 'Mono Pipeline'
+# Path to the top directory of the device (e.g., uhddev/fpga/usrp3/top/e31x)
+- name: top_dir
+  type: string
+  default: ''
+# Full matrix of FPGA targets to build
+- name: target_full_matrix
+  type: object
+# Reduced matrix of FPGA targets to build
+- name: target_reduced_matrix
+  type: object
+- name: additional_setup_steps
+  type: stepList
+  default: []
+- name: rfnoc_include_dir
+  type: string
+  default: ""
+  displayName: RFNoC OOT module path
+
+jobs:
+- template: job-build-ip.yml
+  parameters:
+    directory: ${{ parameters.top_dir }}
+    ip_target: ${{ parameters.ip_target }}
+    clean_build: ${{ parameters.clean_ip_build }}
+    num_jobs: ${{ parameters.num_ip_jobs }}
+    additional_setup_steps: ${{ parameters.additional_setup_steps }}
+- template: ../templates/job-build-fpga.yml
+  parameters:
+    ${{ if eq(parameters.package_and_publish_images, true) }}:
+      targets_matrix: ${{ parameters.target_full_matrix }}
+    ${{ else }}:
+      targets_matrix: ${{ parameters.target_reduced_matrix }}
+    ip_artifact: ${{ parameters.ip_target }}
+    top_dir: ${{ parameters.top_dir }}
+    publish_int_files: ${{ parameters.publish_int_files }}
+    additional_setup_steps: ${{ parameters.additional_setup_steps }}
+    rfnoc_include_dir: ${{ parameters.rfnoc_include_dir }}
+- template: ../templates/job-package-images.yml
+  parameters:
+    package_name: ${{ parameters.package_name }}
+    artifacts_matrix: ${{ parameters.target_full_matrix }}
+    build_directory: ${{ parameters.top_dir }}/build/
+    package_access: ${{ parameters.package_access }}
+    package_and_publish_images: ${{ parameters.package_and_publish_images }}
+- template: job-guarantee-artifacts.yml
+  parameters:
+    id: ${{ parameters.id }}
+    artifacts_matrix: ${{ parameters.target_full_matrix }}
+    ${{ if eq(parameters.fpga_imgs_source,  'Mono Pipeline PR') }}:
+      uhdFpgaArtifactSource: uhd_mono_pipeline_pr
+    ${{ elseif eq(parameters.fpga_imgs_source,  'FPGA Pipeline') }}:
+      uhdFpgaArtifactSource: uhd_fpga_pipeline
+    ${{ else }}:
+      uhdFpgaArtifactSource: uhd_mono_pipeline

EttusResearch_uhd/.ci/fpga/templates/setup_steps.yml

@@ -0,0 +1,58 @@
+parameters:
+  - name: checkoutSteps
+    type: stepList
+    default:
+    # Checkout the repository under test
+    - checkout: self
+      clean: true
+      fetchDepth: 1
+      persistCredentials: true
+    # Checkout hwtools repo
+    - checkout: hwtools
+      fetchDepth: '1'
+      fetchTags: false
+      path: s/hwtools/head
+      persistCredentials: true
+  - name: demands_default
+    type: object
+    default:
+      pool:
+        name: Drivers-NIBuildFarm-RFMIBUILD
+        demands:
+        - Agent.OS -equals Linux
+      hwhookVersion: 2
+  # include additional sources (e.g. for merging a branch) before the build
+  - name: includeAdditionalSources
+    type: boolean
+    default: false
+  # specific git ref to checkout
+  - name: ref
+    type: string
+    default: ''
+
+steps:
+  - template: build/pipelines/helpers/setup_steps.yml@hwtools
+    parameters:
+      caller: setup_steps.yml
+      pool: Drivers-NIBuildFarm-RFMIBUILD
+      checkoutSteps: ${{ parameters.checkoutSteps }}
+      demands: ${{ parameters.demands_default }}
+      repoBase: $(Build.SourcesDirectory)
+      directory: uhddev
+      name: FPGA build
+  - ${{ if eq(parameters.includeAdditionalSources, true) }}:
+    - bash: |
+        set -e
+        git fetch --unshallow --progress
+        git merge origin/$(hbx-branch-name)
+        git log -1
+      displayName: "Merge HBX branch"
+      workingDirectory: uhddev
+  - ${{ if ne(parameters.ref, '') }}:
+    - bash: |
+        set -e
+        git fetch --progress origin ${{ parameters.ref }}
+        git checkout ${{ parameters.ref }}
+      displayName: "Checkout ref ${{ parameters.ref }}"
+      workingDirectory: uhddev
+

EttusResearch_uhd/.ci/hwtools/.gitignore

@@ -0,0 +1,9 @@
+# Ignore objects/ directory created by hwtools
+objects/
+# Ignore Python bytecode cache files
+__pycache__/
+# Ignore modelsim related files
+**/modelsim/
+**/transcript
+# Ignore python version file created by pyenv
+.python-version

EttusResearch_uhd/.ci/hwtools/X410/vsmakesettings.py

@@ -0,0 +1,78 @@
+#!/usr/bin/env python3
+#
+# Copyright 2025 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: MIT
+#
+
+from hwtools.api import vapi
+
+
+def do_options():
+    vapi.set_project_name(name="X410_FPGA", pretty_name="USRP X410 FPGA")
+    vapi.set_top_sim_entity("x4xx")
+    vapi.set_top_synth_entity("x4xx")
+
+
+def do_files():
+    # x400 related files
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/cpld/common")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/cpld/x410")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/dboards", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/dboards/zbx")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/common")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/100m")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/200m")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/400m")
+    vapi.find_files_and_add_to_fileset(
+        base="repo", path="fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/common/regmap"
+    )
+    vapi.find_files_and_add_to_fileset(
+        base="repo", path="fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/x410_ps_rfdc_bd/regmap"
+    )
+
+    # library
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/lib/rfnoc")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/lib/control")
+
+    # regmap files
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/regmap", tree=False)
+    vapi.find_files_and_add_to_fileset(
+        base="repo", path="fpga/usrp3/top/x400/regmap/x410", tree=False
+    )
+    vapi.find_files_and_add_to_fileset(
+        base="repo", path="fpga/usrp3/top/x400/cpld/regmap", tree=False
+    )
+    vapi.find_files_and_add_to_fileset(
+        base="repo", path="fpga/usrp3/top/x400/cpld/regmap/x410", tree=False
+    )
+
+    # simulation files
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/sim")
+
+    vapi.remove_from_fileset("/build-ip/")
+    vapi.remove_from_fileset("/build")
+    vapi.remove_from_fileset("/xsim_proj/")
+    vapi.remove_from_fileset(".*lib/rfnoc/.*_tb")
+    vapi.remove_from_fileset("pll-v")
+
+
+def do_preparse():
+    pass
+
+
+def do_precompile():
+    pass
+
+
+def do_presynth():
+    pass
+
+
+def do_finish():
+    vapi.run_user_function(function="update_xmlparse_files", base="self", path="../common.py")
+
+
+def vhook_warn_filter(msgstr):
+    return False

EttusResearch_uhd/.ci/hwtools/X420/vsmakesettings.py

@@ -0,0 +1,90 @@
+#!/usr/bin/env python3
+#
+# Copyright 2025 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: MIT
+#
+
+import os
+import sys
+
+from hwtools.api import vapi, pathapi, pp
+
+def do_options():
+    vapi.set_project_name(name="X420_FPGA", pretty_name="USRP X420 FPGA")
+    vapi.set_top_synth_entity("x4xx")
+    vapi.set_top_sim_entity("x4xx")
+    pathapi.set_workspace_base("repo")
+
+def do_files():
+    # Pull in xilinx libraries.
+    if not vapi.is_xmlparse():
+        vapi.find_files_and_add_to_fileset(
+            path="%XILINX%/data/verilog/src/unisims"
+        )
+
+    # x400 related files
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/cpld/common")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/cpld/x410")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/dboards", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/dboards/hbx")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/common")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/x420")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/1000m")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/400m_x420")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/400m", regex="adc*")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/400m", regex="dac*")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/full/rf_core_full.sv")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/common/regmap")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/x420_ps_rfdc_bd/regmap")
+    # library
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/lib/axi")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/lib/axi4s_sv")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/lib/control")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/lib/dsp")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/lib/fifo")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/lib/rfnoc")
+    vapi.remove_from_fileset("axi_fifo_2clk.v")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/lib/sim/fifo/axi_fifo_2clk_sim.v")
+
+    # regmap files
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/regmap", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/regmap/x420", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/cpld/regmap", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/cpld/regmap/x410", tree=False)
+
+    # duplicate exclusions
+    vapi.remove_from_fileset("build-.*")
+    vapi.remove_from_fileset("xsim_proj")
+    vapi.remove_from_fileset("lattice/impl1")
+    vapi.remove_from_fileset("crossbar_tb/")
+    vapi.remove_from_fileset("glbl.v")
+
+    # simulation files
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/sim/packages")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/sim/rfnoc")
+
+    # check for hbx CPLD
+    cpld_impl_path = "fpga/usrp3/top/x400/dboards/hbx/cpld/"
+    cpld_source_path = pathapi.get_abs_path(base="repo", path=cpld_impl_path, checkexist=False)
+    if not os.path.isdir(cpld_source_path):
+        pp.printerr(f"HBX implementation is missing. {os.linesep}"
+                    f"Please copy the HBX files to your workspace by executing the following command: {os.linesep}"
+                    f"git restore --source HBX_SOURCE_BRANCH -- {cpld_source_path}")
+        sys.exit(1)
+
+def do_preparse():
+    pass
+
+def do_precompile():
+    pass
+
+def do_presynth():
+    pass
+
+def do_finish():
+    vapi.run_user_function(function="update_xmlparse_files", base="self", path="../common.py")
+
+def vhook_warn_filter(msgstr):
+    return False

EttusResearch_uhd/.ci/hwtools/X440/vsmakesettings.py

@@ -0,0 +1,48 @@
+#!/usr/bin/env python3
+#
+# Copyright 2025 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: MIT
+#
+
+from hwtools.api import vapi
+
+def do_options():
+    vapi.set_project_name(name="X440_FPGA", pretty_name="USRP X440 FPGA")
+
+def do_files():
+    # x400 related files
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/cpld/common")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/cpld/x440")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/dboards", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/dboards/fbx")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/common")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/full")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/rf/200m_x440")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/common/regmap")
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/ip/x4xx_ps_rfdc_bd/x440_ps_rfdc_bd/regmap")
+
+    # library
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/lib/rfnoc")
+
+    # regmap files
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/regmap", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/regmap/x440", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/cpld/regmap", tree=False)
+    vapi.find_files_and_add_to_fileset(base="repo", path="fpga/usrp3/top/x400/cpld/regmap/x440", tree=False)
+
+def do_preparse():
+    pass
+
+def do_precompile():
+    pass
+
+def do_presynth():
+    pass
+
+def do_finish():
+    vapi.run_user_function(function="update_xmlparse_files", base="self", path="../common.py")
+
+def vhook_warn_filter(msgstr):
+    return False

EttusResearch_uhd/.ci/hwtools/build.py

@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+#
+# Copyright 2025 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: MIT
+#
+# Generates the register maps for the X400 based FPGA designs.
+#
+
+import os
+from hwtools.api import WorkingFolder, cmd
+
+# enumerate the subdirectories
+sub_directories = [d for d in os.listdir() if os.path.isdir(d)]
+
+# assume the variant is called as the directory
+for variant in sub_directories:
+    with WorkingFolder(variant, delete_and_recreate=False, create_ok=False):
+        # check if vsmakesettings.py exists
+        if not os.path.isfile("vsmakesettings.py"):
+            continue
+        # generate register map
+        cmd.runlive("xmlparse", "--clean", raise_on_err=True)
+        cmd.runlive("xmlparse", raise_on_err=True)

EttusResearch_uhd/.ci/hwtools/common.py

@@ -0,0 +1,72 @@
+#!/usr/bin/env python3
+#
+# Copyright 2025 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: MIT
+#
+
+import shutil
+
+from pathlib import Path
+
+from hwtools.api import vapi, pathapi, cmd
+
+
+# Revert changes that only update the year in copyright statements for the given file
+def revert_year_only_changes(file_path):
+    cmd.run("git", "diff", "--unified=0", file_path, raise_on_err=False)
+    lines = cmd.stdout.splitlines()
+    if lines:
+        # skip the unified header of 5 lines
+        lines = lines[5:]
+        remaining_lines = [line for line in lines if not ("Copyright" in line or "(c)" in line)]
+        if not remaining_lines:
+            cmd.run("git", "checkout", file_path, raise_on_err=False)
+
+
+def update_xmlparse_files():
+    if vapi.is_xmlparse():
+        # copy the register map to the correct location
+        project_name = vapi.get_project_name()
+        src_file = pathapi.get_abs_path(
+            f"{project_name}/xmlparse/pri1/{project_name}.htm", base="objects"
+        )
+        # determine FPGA and CPLD destination location
+        variant = project_name.split("_")[0]
+        if ("FPGA" in project_name):
+            dest_file = pathapi.get_abs_path(
+                f"fpga/usrp3/top/x400/doc/{variant}/{project_name}.htm", base="repo"
+            )
+        else:
+            dest_file = pathapi.get_abs_path(
+                f"fpga/usrp3/top/x400/dboards/{variant.lower()}/cpld/doc/{project_name}.htm",
+                base="repo"
+            )
+        shutil.copy(src_file, dest_file)
+        revert_year_only_changes(dest_file)
+
+        # get the directory of generated files and check each file in it
+        xmlparse_hdl_dir = Path(pathapi.get_abs_path("pri1/hdl", base="xmlparse"))
+        for gen_file in xmlparse_hdl_dir.iterdir():
+            print(f"Checking {gen_file.name}")
+
+            # check for matching files in the repo
+            existing_files = vapi.get_files_from_fileset("/" + gen_file.name)
+            if (len(existing_files) != 1):
+                # if there is no match for vhd files this might be fine for the NI-USRP case
+                if (len(existing_files) == 0) and (gen_file.name.endswith(".vhd")):
+                    print(f"Skipped")
+                    continue
+                # print if there are multiple or no matches
+                raise Exception(f"File {gen_file.name} match set was not unique. Possible targets: {existing_files}")
+
+            # update the file in the repo
+            # Remove lines containing "not implemented" from the copied file
+            with open(gen_file, "r") as file:
+                lines = file.readlines()
+            with open(existing_files[0], "w") as file:
+                for line in lines:
+                    if "not implemented" not in line:
+                        file.write(line)
+
+            revert_year_only_changes(existing_files[0])

EttusResearch_uhd/.ci/hwtools/root.py

@@ -0,0 +1,39 @@
+#!/usr/bin/env python3
+#
+# Copyright 2025 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# Description:
+#
+#   Setup script for configuring the pipeline agent's environment to allow us
+#   to run proprietary EDA vendor tools.
+#
+
+import sys
+
+
+def do_setup():
+    from hwtools.api import rootapi
+
+    rootapi.set_workspace_name(name="uhddev", pretty_name="UHD FPGA")
+    rootapi.set_major_version("1")
+
+    # Note: The hwtools version for CI purposes is fixed in run_setup.sh
+    rootapi.add_tool(name="hwtools", version="head")
+    rootapi.add_tool(name="Vivado", version="2021.1", allowlater=False)
+    rootapi.add_tool(name="modelsim", version="2020.4", allowlater=True)
+    rootapi.add_tool(name="Diamond", version="3.12", allowlater=True)
+    rootapi.add_tool(name="Quartus", version="20.1", allowlater=True)
+
+
+def do_finish():
+    pass
+
+
+def do_publish():
+    pass
+
+
+if __name__ == "__main__":
+    sys.exit(-1)

EttusResearch_uhd/.ci/templates/job-analyze-changeset.yml

@@ -0,0 +1,106 @@
+# This job will execute the changeset_testlist.py script, which in turn will
+# compute a list of tests that need to be executed.
+# The script itself produces the correct output to set a variable for a future
+# stage.
+
+parameters:
+- name: reference_pipeline_name
+  type: string
+- name: add_tests
+  type: string
+  default: "none"
+- name: remove_tests
+  type: string
+  default: "none"
+- name: skip_rule_checking
+  type: boolean
+  default: False
+
+jobs:
+  - job: analyze
+    displayName: Analyze Changeset
+    variables:
+      - ${{ if not(parameters.skip_rule_checking) }}:
+        - group: github-ettusresearch-uhddev
+    pool:
+      name: Drivers-NIBuildFarm-RFMIBUILD
+      demands: 
+        - Agent.OS -equals Linux
+    steps:
+    - ${{ if parameters.skip_rule_checking }}:
+      - checkout: none
+      - bash : |
+          echo "Task List = $ADD_TESTS"
+          echo "##vso[task.setvariable variable=UhdTestList;isoutput=true]$ADD_TESTS"
+        name: gen_testlist
+        displayName: Set Test-List Variable
+        env:
+          ADD_TESTS: ${{ parameters.add_tests }}
+    - ${{ else }}:
+      # Use checkout depth of large number in order to transfer history of merge commit only.
+      - checkout: self
+        clean: true
+        fetchDepth: 1000000000
+        fetchTags: false
+        persistCredentials: true
+      - bash: |
+          git fetch origin +$PIPELINE_SOURCE_COMMIT
+        displayName: Git fetch source commit
+        env:
+          PIPELINE_SOURCE_COMMIT: $(resources.pipeline.${{ parameters.reference_pipeline_name }}.sourceCommit)
+      - bash: |
+          python3 -m venv $AGENT_TEMPDIRECTORY/ac_venv
+          source $AGENT_TEMPDIRECTORY/ac_venv/bin/activate
+          pip install --upgrade pip
+          pip install ruamel.yaml clang-format==14.0.6 ni-python-styleguide requests
+        displayName: setup venv
+      - bash: |
+          source $AGENT_TEMPDIRECTORY/ac_venv/bin/activate
+          set -e
+          set -o xtrace
+          if [ "$BUILD_REASON" == "PullRequest" ]; then
+            EXTRA_ARGS="--github-label-api-endpoint https://oauth2:$OAUTH_TOKEN@api.github.com/repos/$BUILD_REPOSITORY_ID/issues/$SYSTEM_PULLREQUEST_PULLREQUESTNUMBER/labels"
+            EXTRA_ARGS="$EXTRA_ARGS --source-branch $SYSTEM_PULLREQUEST_SOURCECOMMITID"
+          fi
+          if [ -n "$ADD_TESTS" ] && [ "$ADD_TESTS" != "none" ]; then
+            EXTRA_ARGS="$EXTRA_ARGS --add-test $ADD_TESTS"
+          fi
+          if [ -n "$REMOVE_TESTS" ] && [ "$REMOVE_TESTS" != "none" ]; then
+            EXTRA_ARGS="$EXTRA_ARGS --remove-test $REMOVE_TESTS"
+          fi
+          echo "Using pipeline $PIPELINE_PIPELINE_NAME / $PIPELINE_RUN_NAME as reference (branch $PIPELINE_SOURCE_BRANCH, commit $PIPELINE_SOURCE_COMMIT)"
+          python3 tools/changeset_testlist.py \
+                  --target-branch $PIPELINE_SOURCE_COMMIT \
+                  --set-azdo-var UhdTestList \
+                  --list-tests --verbose $EXTRA_ARGS
+        name: gen_testlist
+        displayName: Generate Test-List
+        env:
+          OAUTH_TOKEN: $(github_uhddev_token)
+          PIPELINE_SOURCE_BRANCH: $(resources.pipeline.${{ parameters.reference_pipeline_name }}.sourceBranch)
+          PIPELINE_SOURCE_COMMIT: $(resources.pipeline.${{ parameters.reference_pipeline_name }}.sourceCommit)
+          PIPELINE_PIPELINE_NAME: $(resources.pipeline.${{ parameters.reference_pipeline_name }}.pipelineName)
+          PIPELINE_RUN_NAME: $(resources.pipeline.${{ parameters.reference_pipeline_name }}.runName)
+          ADD_TESTS: ${{ parameters.add_tests }}
+          REMOVE_TESTS: ${{ parameters.remove_tests }}
+
+    - bash: |
+        if [[ $AGENT_OS == "Windows_NT" ]]; then
+            VENV_BIN_DIR="Scripts"
+        else
+            VENV_BIN_DIR="bin"
+        fi
+        source $AGENT_TEMPDIRECTORY/ac_venv/$VENV_BIN_DIR/activate
+        if [[ $GEN_TESTLIST_UHDTESTLIST =~ "clang-format" ]]; then
+            $AGENT_TEMPDIRECTORY/ac_venv/$VENV_BIN_DIR/python3 \
+                tools/run-clang-format.py . -r --patch-file clang-format.patch \
+                    --clang-format-executable `which clang-format`
+        fi
+      name: run_clang_format
+      displayName: Conditionally run clang-format
+
+    - publish: clang-format.patch
+      artifact: clang-format patch file
+      displayName: Publish clang-format patch file
+      condition: failed()
+

EttusResearch_uhd/.ci/templates/job-get-latest-uhd-docker.yml

@@ -0,0 +1,84 @@
+# Must include uhd-pipeline-vars.yml in top line pipeline to include this template
+# Reads and sets uhd docker builder information to variables
+# dockerBuildNumber, dockerImagePrefix, dockerImageMatrix
+# Reference the data by calling:
+# $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerBuildNumber'] ]
+# $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImagePrefix'] ]
+# $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImageMatrixLin'] ]
+# $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImageMatrixWin'] ]
+# $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImageMatrixUbuntuDeb'] ]
+# $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.macOSBuilders'] ]
+# $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImageMatrixSourcePackageBuilders'] ]
+# $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImageMatrixFedoraRpm'] ]
+jobs:
+- job: get_latest_uhd_docker
+  displayName: Get Last Docker Build Version
+  pool:
+    name: Drivers-NIBuildFarm-RFMIBUILD
+    demands: sh
+  steps:
+  - checkout: self
+    clean: true
+  - download: uhd_build_docker_container
+    displayName: Download Docker Image List
+  # The following script pulls each line from the DockerImageNames
+  # file and variablizes them in the AzDO Pipeline Context.
+  # sed '1q;d' pulls the first line, sed '2q;d' pulls the second, etc.
+  - script: |
+      set -euo pipefail
+      cd $(Pipeline.Workspace)/uhd_build_docker_container/
+      artifact_file="$(UHDPipelineDockerImageArtifactName)/$(UHDPipelineDockerImageArtifactName)"
+      derive_script="$(Build.SourcesDirectory)/.ci/utils/derive_docker_image_matrix.py"
+
+      line_count=$(wc -l < "$artifact_file")
+      if [ "$line_count" -eq 9 ]; then
+        macos_line=6
+        docker_image_matrix_lin=$(sed '3q;d' "$artifact_file")
+        docker_image_matrix_win=$(sed '4q;d' "$artifact_file")
+        docker_image_matrix_ubuntu_deb=$(sed '5q;d' "$artifact_file")
+        docker_image_matrix_source_package=$(sed '7q;d' "$artifact_file")
+        docker_image_matrix_fedora_rpm=$(sed '8q;d' "$artifact_file")
+        docker_image_matrix_windows_python_build=$(sed '9q;d' "$artifact_file")
+      elif [ "$line_count" -eq 6 ]; then
+        macos_line=5
+        # Keep derive failures blocking for strict CI reasons (CI/scheduled),
+        # but allow non-CI/manual debug runs to continue with '{}' fallback.
+        # PR runs also use fallback mode.
+        # The behavior is implemented by derive_docker_image_matrix.py.
+        docker_image_matrix_lin=$(python3 "$derive_script" --empty-on-error-non-ci --input "$artifact_file" --type build --os linux)
+        docker_image_matrix_win=$(python3 "$derive_script" --empty-on-error-non-ci --input "$artifact_file" --type build --os windows)
+        docker_image_matrix_ubuntu_deb=$(python3 "$derive_script" --empty-on-error-non-ci --input "$artifact_file" --type installer --os linux --package deb --filter-out "focal,questing")
+        docker_image_matrix_source_package=$(python3 "$derive_script" --empty-on-error-non-ci --input "$artifact_file" --type source --os linux --select noble)
+        docker_image_matrix_fedora_rpm=$(python3 "$derive_script" --empty-on-error-non-ci --input "$artifact_file" --type installer --os linux --package rpm)
+        docker_image_matrix_windows_python_build=$(python3 "$derive_script" --empty-on-error-non-ci --input "$artifact_file" --section windows-python-build-matrix)
+      else
+        echo "Error: Unexpected DockerImageNames format with $line_count lines; expected 6 or 9"
+        exit 1
+      fi
+
+      docker_build_number=$(sed '1q;d' "$artifact_file")
+      docker_image_prefix=$(sed '2q;d' "$artifact_file")
+      macos_builders=$(sed "${macos_line}q;d" "$artifact_file")
+
+      echo "##vso[task.setvariable variable=dockerBuildNumber;isOutput=true;]$docker_build_number"
+      echo "##vso[task.setvariable variable=dockerImagePrefix;isOutput=true;]$docker_image_prefix"
+      echo "##vso[task.setvariable variable=dockerImageMatrixLin;isOutput=true;]$docker_image_matrix_lin"
+      echo "##vso[task.setvariable variable=dockerImageMatrixWin;isOutput=true;]$docker_image_matrix_win"
+      echo "##vso[task.setvariable variable=dockerImageMatrixUbuntuDeb;isOutput=true;]$docker_image_matrix_ubuntu_deb"
+      echo "##vso[task.setvariable variable=macOSBuilders;isOutput=true;]$macos_builders"
+      echo "##vso[task.setvariable variable=dockerImageMatrixSourcePackageBuilders;isOutput=true;]$docker_image_matrix_source_package"
+      echo "##vso[task.setvariable variable=dockerImageMatrixFedoraRpm;isOutput=true;]$docker_image_matrix_fedora_rpm"
+      echo "##vso[task.setvariable variable=dockerImageMatrixWinPythonBuild;isOutput=true;]$docker_image_matrix_windows_python_build"
+    name: setDockerVar
+  - script: |
+      echo "Docker Build Number: "
+      echo $(setDockerVar.dockerBuildNumber)
+      echo $(setDockerVar.dockerImagePrefix)
+      echo $(setDockerVar.dockerImageMatrixLin)
+      echo $(setDockerVar.dockerImageMatrixWin)
+      echo $(setDockerVar.dockerImageMatrixUbuntuDeb)
+      echo $(setDockerVar.macOSBuilders)
+      echo $(setDockerVar.dockerImageMatrixSourcePackageBuilders)
+      echo $(setDockerVar.dockerImageMatrixFedoraRpm)
+      echo $(setDockerVar.dockerImageMatrixWinPythonBuild)
+    name: echoDockerVar

EttusResearch_uhd/.ci/templates/job-gnuradio-grettus-build-src.yml

@@ -0,0 +1,128 @@
+parameters:
+- name: 'toolset'
+  type: string
+  values:
+  - make
+
+jobs:
+- job: build_and_upload_gnuradio_grettus_${{ parameters.toolset }}
+  displayName: ${{ parameters.toolset }}, ctest, and upload gnuradio and grettus
+  dependsOn: get_latest_uhd_docker
+  timeoutInMinutes: 90
+  variables:
+    # Docker vars from job-get-latest-uhd-docker.yml
+    dockerBuildNumber: $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerBuildNumber'] ]
+    dockerImagePrefix: $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImagePrefix'] ]
+    dockerImageMatrixLin: $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImageMatrixLin'] ]
+    dockerImageMatrixWin: $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImageMatrixWin'] ]
+    dockerImageMatrixUbuntuDeb: $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImageMatrixUbuntuDeb'] ]
+    macOSBuilders: $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.macOSBuilders'] ]
+    dockerImageMatrixSourcePackageBuilders: $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImageMatrixSourcePackageBuilders'] ]
+    dockerImageMatrixFedoraRpm: $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImageMatrixFedoraRpm'] ]
+    dockerImageMatrixWinPythonBuild: $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImageMatrixWinPythonBuild'] ]
+  pool:
+    name: Drivers-NIBuildFarm-RFMIBUILD
+    demands:
+      - ${{ if eq(parameters.toolset, 'msbuild') }}:
+        - docker
+        - Agent.OS -equals Windows_NT
+      - ${{ if or(eq(parameters.toolset, 'make'), eq(parameters.toolset, 'make_trace'), eq(parameters.toolset, 'ninja'), eq(parameters.toolset, 'make_custom_boost_version')) }}:
+        - docker
+        - Agent.OS -equals Linux
+      - ${{ if eq(parameters.toolset, 'make_homebrew_macos') }}:
+        - Agent.OS -equals Darwin
+        - Agent.OSVersion -equals $(macOSVersionDemand)
+        - Agent.OSArchitecture -equals $(macOSArchDemand)
+  workspace:
+    clean: outputs
+  strategy:
+    ${{ if eq(parameters.toolset, 'msbuild') }}:
+      matrix: $[ variables.dockerImageMatrixWin ]
+    ${{ if or(eq(parameters.toolset, 'make'), eq(parameters.toolset, 'make_trace'), eq(parameters.toolset, 'ninja'), eq(parameters.toolset, 'make_custom_boost_version')) }}:
+      matrix: $[ variables.dockerImageMatrixLin ]
+    ${{ if eq(parameters.toolset, 'make_homebrew_macos') }}:
+      matrix: $[ variables.macOSBuilders ]
+  ${{ if ne(parameters.toolset, 'make_homebrew_macos') }}:
+    container:
+      ${{ if eq(parameters.toolset, 'msbuild') }}:
+        options: --cpu-count 6 --memory 12G
+      image: '$(dockerImagePrefix)$(DockerImageName):$(dockerBuildNumber)'
+      ${{ if or(eq(variables['Build.SourceBranch'], 'refs/heads/master'), startsWith(variables['Build.SourceBranch'], 'refs/heads/UHD-')) }}:
+        endpoint: rnd-docker-niartifacts-ci-readonly
+      ${{ else }}:
+        endpoint: rnd-docker-niartifacts-pre-readonly
+  steps:
+  - checkout: self
+    clean: true
+  - checkout: gnuradio
+    clean: true
+    submodules: recursive
+  - checkout: volk
+    clean: true
+    submodules: true
+
+  - task: DeleteFiles@1
+    inputs:
+      SourceFolder: $(Agent.BuildDirectory)
+      Contents: |
+        uhddev-$(buildOSName)-${{ parameters.toolset }}
+    displayName: Delete uhddev artifacts folder
+
+  - download: uhd_build_docker_container
+
+  - download: current
+    artifact: uhddev-$(buildOSName)-${{ parameters.toolset }}
+    displayName: Download pipeline artifact uhddev-$(buildOSName)-${{ parameters.toolset }}
+
+  - task: ExtractFiles@1
+    inputs:
+      archiveFilePatterns: $(Pipeline.Workspace)/uhddev-$(buildOSName)-${{ parameters.toolset }}/uhddev-$(buildOSName)-${{ parameters.toolset }}.tar.gz
+      destinationFolder: $(Agent.BuildDirectory)/uhddev-$(buildOSName)-${{ parameters.toolset }}
+      cleanDestinationFolder: false
+    displayName: Extract uhddev-$(buildOSName)-${{ parameters.toolset }} artifacts
+
+  - ${{ if eq(parameters.toolset, 'make') }}:
+    - template: steps-build-volk-make.yml
+      parameters:
+        volkSrcDir: $(Build.SourcesDirectory)/volk
+        volkBuildDir: $(Build.BinariesDirectory)/volk/build
+        volkInstallPath: $(Build.BinariesDirectory)/volk/build-installed
+
+  - ${{ if eq(parameters.toolset, 'make') }}:
+    - template: steps-build-gnuradio-make.yml
+      parameters:
+        gnuradioSrcDir: $(Build.SourcesDirectory)/gnuradio
+        gnuradioBuildDir: $(Build.BinariesDirectory)/gnuradio/build
+        gnuradioInstallPath: $(Build.BinariesDirectory)/gnuradio/build-installed
+        volkInstalledArtifactPath: $(Build.BinariesDirectory)/volk/build-installed
+        uhdInstalledArtifactPath: $(Agent.BuildDirectory)/uhddev-$(buildOSName)-${{ parameters.toolset }}/uhddev/build-installed
+
+  - task: CopyFiles@2.246.0
+    inputs:
+      sourceFolder: $(Build.BinariesDirectory)
+      targetFolder: $(Build.BinariesDirectory)/artifacts
+      contents: |
+        **/build-installed/**
+    displayName:  Copy only build-installed folders to artifact folder
+
+  - task: ArchiveFiles@2
+    inputs:
+      rootFolderOrFile: $(Build.BinariesDirectory)/artifacts
+      includeRootFolder: false
+      archiveType: tar
+      tarCompression: gz
+      archiveFile: $(Build.ArtifactStagingDirectory)/gnuradio-grettus-$(buildOSName)-${{ parameters.toolset }}.tar.gz
+      replaceExistingArchive: true
+    displayName: Compress build files
+
+  - task: CopyFiles@2.246.0
+    inputs:
+      sourceFolder: $(Pipeline.Workspace)/uhd_build_docker_container/$(UHDPipelineDockerImageArtifactName)
+      targetFolder: $(Build.ArtifactStagingDirectory)
+    displayName:  Copy builder container version to artifact folder
+
+  - task: PublishPipelineArtifact@1
+    inputs:
+      targetPath: '$(Build.ArtifactStagingDirectory)'
+      artifactName: 'gnuradio-grettus-$(buildOSName)-${{ parameters.toolset }}'
+    displayName: Upload gnuradio and gr-ettus build artifacts

EttusResearch_uhd/.ci/templates/job-rfnoc_modtool-test-sw.yml

@@ -0,0 +1,92 @@
+jobs:
+- job: uhd_rfnoc_modtool_test_sw
+  displayName:  rfnoc_modtool test software
+  dependsOn: get_latest_uhd_docker
+  timeoutInMinutes: 20
+  variables:
+    # Docker vars from job-get-latest-uhd-docker.yml
+    dockerBuildNumber: $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerBuildNumber'] ]
+    dockerImagePrefix: $[ dependencies.get_latest_uhd_docker.outputs['setDockerVar.dockerImagePrefix'] ]
+    uhd_artifact_name: uhddev-ubuntu2404-make
+    uhd_builder_name: uhd-builder-ubuntu2404
+  pool:
+    name: Drivers-NIBuildFarm-RFMIBUILD
+    demands:
+    - Agent.OS -equals Linux
+    - docker
+  workspace:
+    clean: outputs
+  container:
+    image: $(dockerImagePrefix)$(uhd_builder_name):$(dockerBuildNumber)
+    ${{ if or(eq(variables['Build.SourceBranch'], 'refs/heads/master'), startsWith(variables['Build.SourceBranch'], 'refs/heads/UHD-')) }}:
+      endpoint: rnd-docker-niartifacts-ci-readonly
+    ${{ else }}:
+      endpoint: rnd-docker-niartifacts-pre-readonly
+
+  steps:
+  - checkout: self
+    clean: true
+    fetchDepth: 1
+
+  - bash: |
+      echo '##vso[task.setvariable variable=uhd_artifact_name]uhddev-ubuntu'`lsb_release -s -r | tr -d .`-make
+    displayName: Set uhddev pipeline artifact information
+
+  - download: current
+    artifact: $(uhd_artifact_name)
+    displayName: Download uhddev artifact
+
+  - task: ExtractFiles@1
+    inputs:
+      archiveFilePatterns: $(Agent.BuildDirectory)/$(uhd_artifact_name)/$(uhd_artifact_name).tar.gz
+      destinationFolder: $(Build.BinariesDirectory)
+      cleanDestinationFolder: true
+
+  # Test SW only firsts
+  - bash: |
+      ls -l $(Build.SourcesDirectory)
+      export LD_LIBRARY_PATH=$(Build.BinariesDirectory)/uhddev/build/lib:$LD_LIBRARY_PATH
+      export PATH=$(Build.BinariesDirectory)/uhddev/build-installed/bin:$PATH
+      export PYTHONPATH=`find $(Build.BinariesDirectory)/uhddev/build-installed/lib -name site-packages`:$PYTHONPATH
+      export UHD_DIR=$(Build.BinariesDirectory)/uhddev/build-installed
+      export UHD_PKG_DATA_PATH=$UHD_DIR/share/uhd
+      mkdir -p $(Agent.TempDirectory)/rfnoc_modtool
+      ls -l $(Build.SourcesDirectory)/host/tests/
+      python3 $(Build.SourcesDirectory)/host/tests/test_modtool.py \
+          --base-dir $(Agent.TempDirectory)/rfnoc_modtool \
+          --rfnoc-oot-name test \
+          --uhd-repo-dir $(Build.SourcesDirectory) \
+          --skip-testbenches
+      ls -lR $(Agent.TempDirectory)/rfnoc_modtool
+    displayName: Run rfnoc_modtool SW test
+
+  # Test rfnoc-gain icore builds
+  - bash: |
+      set -e
+      ls -l $(Build.SourcesDirectory)
+      export LD_LIBRARY_PATH=$(Build.BinariesDirectory)/uhddev/build/lib:$LD_LIBRARY_PATH
+      export PATH=$(Build.BinariesDirectory)/uhddev/build-installed/bin:$PATH
+      export PYTHONPATH=`find $(Build.BinariesDirectory)/uhddev/build-installed/lib -name site-packages`:$PYTHONPATH
+      export UHD_DIR=$(Build.BinariesDirectory)/uhddev/build-installed
+      export UHD_PKG_DATA_PATH=$UHD_DIR/share/uhd
+      mkdir -p $(Build.SourcesDirectory)/host/examples/rfnoc-gain/build
+      cd $(Build.SourcesDirectory)/host/examples/rfnoc-gain/build
+      rfnoc_image_builder -F $(Build.SourcesDirectory)/fpga -I ../rfnoc -HDG -y ../icores/x310_rfnoc_image_core.yml
+      rfnoc_image_builder -F $(Build.SourcesDirectory)/fpga -I ../rfnoc -HDG -y ../icores/x410_XG_200_rfnoc_image_core.yml
+      ls -lR .
+      rm -rf $(Build.SourcesDirectory)/host/examples/rfnoc-gain/build
+    displayName: Run rfnoc_image_builder on rfnoc-gain image cores
+
+  - task: ArchiveFiles@2
+    inputs:
+      rootFolderOrFile: $(Agent.TempDirectory)/rfnoc_modtool
+      includeRootFolder: false
+      archiveType: 'tar'
+      tarCompression: 'gz'
+      archiveFile: '$(Build.ArtifactStagingDirectory)/rfnoc_test_oot.tar.gz'
+
+  - task: PublishPipelineArtifact@1
+    inputs:
+      targetPath: '$(Build.ArtifactStagingDirectory)'
+      artifactName: 'rfnoc_test_oot'
+    displayName: Upload rfnoc_test_oot build artifacts