SAIFIINDUSTRIES's picture
Add batch 1 (tiny-tpu-v2_tiny-tpu, chili-chips-ba_wireguard-fpga, ultraembedded_biriscv, EttusResearch_uhd, circuitvalley_USB_C_Industrial_Camera_FPGA_USB3)
7b1962c verified
Raw
History Blame
3.23 kB
��iverilog -o sim_build/sim.vvp -s tpu -s dump -g2012 src/pe.sv src/leaky_relu_child.sv src/leaky_relu_parent.sv src/leaky_relu_derivative_child.sv src/leaky_relu_derivative_parent.sv src/systolic.sv src/bias_child.sv src/bias_parent.sv src/fixedpoint.sv src/control_unit.sv src/unified_buffer.sv src/vpu.sv src/loss_parent.sv src/loss_child.sv src/tpu.sv src/gradient_descent.sv test/dump_tpu.sv
PYTHONOPTIMIZE= MODULE=test_tpu vvp -M C:/Users/visha/Desktop/FV/tiny-tpu/.venv/Lib/site-packages/cocotb/libs -m cocotbvpi_icarus sim_build/sim.vvp
-.--ns INFO gpi ..mbed\gpi_embed.cpp:81 in set_program_name_in_venv Did not detect Python virtual environment. Using system-wide Python interpreter
-.--ns INFO gpi ..\gpi\GpiCommon.cpp:101 in gpi_print_registered_impl VPI registered
0.00ns INFO cocotb Running on Icarus Verilog version 12.0 (devel)
0.00ns INFO cocotb Running tests with cocotb v1.9.2 from C:\Users\visha\Desktop\FV\tiny-tpu\.venv\Lib\site-packages\cocotb
0.00ns INFO cocotb Seeding Python random module with 1773339804
0.00ns INFO cocotb.regression pytest not found, install it to enable better AssertionError messages
0.00ns INFO cocotb.regression Found test test_tpu.test_tpu
0.00ns INFO cocotb.regression running test_tpu (1/1)
VCD info: dumpfile waveforms/tpu.vcd opened for output.
** VVP Stop(0) **