SAIFIINDUSTRIES's picture
Add batch 2 (danielholanda_LeFlow, The-OpenROAD-Project_OpenSTA, omarelhedaby_CNN-FPGA, QShen3_CNN-FPGA, openrisc_mor1kx)
23d354c verified
Raw
History Blame
165 Bytes
# is_buffer property
read_liberty ../examples/sky130hd_tt.lib.gz
read_verilog get_is_buffer.v
link_design dut
report_object_full_names [get_cells -filter is_buffer]