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verilog_data-1 / EttusResearch_uhd /fpga /usrp2 /sdr_lib /input.dat
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SAIFIINDUSTRIES
Add batch 1 (tiny-tpu-v2_tiny-tpu, chili-chips-ba_wireguard-fpga, ultraembedded_biriscv, EttusResearch_uhd, circuitvalley_USB_C_Industrial_Camera_FPGA_USB3)
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