Add batch 1 (tiny-tpu-v2_tiny-tpu, chili-chips-ba_wireguard-fpga, ultraembedded_biriscv, EttusResearch_uhd, circuitvalley_USB_C_Industrial_Camera_FPGA_USB3)
7b1962c verified | trigger: none | |
| pr: none | |
| parameters: | |
| - name: run_x410_embedded_tests | |
| type: boolean | |
| displayName: Run X410 Embedded Tests | |
| default: false | |
| - name: run_x440_embedded_tests | |
| type: boolean | |
| displayName: Run X440 Embedded Tests | |
| default: false | |
| - name: run_streaming_tests | |
| type: boolean | |
| displayName: Run Streaming Tests | |
| default: false | |
| - name: selected_streaming_tests | |
| type: string | |
| displayName: Streaming Tests Multi-Select (comma-separated) | |
| default: 'B206,B210,B310,X310_XG,X410_CG_400,X410_UC_200,X440_CG_400,X440_CG_1600' | |
| - name: run_devtests | |
| type: boolean | |
| displayName: Run devtests | |
| default: false | |
| - name: run_n310_rf_tests | |
| type: boolean | |
| displayName: Run N310 RF tests | |
| default: false | |
| - name: run_obx_rf_tests | |
| type: boolean | |
| displayName: Run X310 + OBX RF tests | |
| default: false | |
| - name: run_obx_devtests | |
| type: boolean | |
| displayName: Run X310 + OBX devtests | |
| default: false | |
| - name: run_x410_rf_tests | |
| type: boolean | |
| displayName: Run X410 RF tests | |
| default: false | |
| - name: run_x420_rf_tests | |
| type: boolean | |
| displayName: Run X420 RF tests | |
| default: false | |
| - name: run_x440_rf_tests | |
| type: boolean | |
| displayName: Run X440 RF tests | |
| default: false | |
| - name: run_x440_phase_tests | |
| type: boolean | |
| displayName: Run X440 Phase tests | |
| default: false | |
| - name: run_lv_test | |
| type: boolean | |
| displayName: Run LabVIEW test | |
| default: false | |
| - name: run_b310_devtests | |
| type: boolean | |
| displayName: Run B310 devtests | |
| default: false | |
| - name: run_b310_rf_tests | |
| type: boolean | |
| displayName: Run B310 RF tests | |
| default: false | |
| - name: fpga_imgs_source | |
| type: string | |
| values: | |
| - 'Filesystem/Images Downloader' | |
| - 'Mono Pipeline' | |
| - 'Mono Pipeline PR' | |
| - 'FPGA Pipeline' | |
| displayName: FPGA Images Source | |
| default: 'Mono Pipeline' | |
| - name: extra_rf_test_args | |
| type: string | |
| displayName: Extra UHD RF ATS Arguments (for N310 and X4x0 runs) | |
| default: ' ' | |
| - name: testLength | |
| type: string | |
| values: | |
| - 'smoke' | |
| - 'full' | |
| - 'stress' | |
| - name: dpdkVersions | |
| type: object | |
| default: | |
| - '21.11' | |
| - '23.11' | |
| - '25.11' | |
| - name: x300_fpga_matrix | |
| type: object | |
| default: | |
| X300_XG: | |
| run: true | |
| X300_HG: | |
| run: true | |
| - name: x310_fpga_matrix | |
| type: object | |
| default: | |
| X310_XG: | |
| run: true | |
| X310_HG: | |
| run: true | |
| - name: n310_fpga_matrix | |
| type: object | |
| default: | |
| N310_XG: | |
| run: true | |
| N310_HG: | |
| run: true | |
| - name: n320_fpga_matrix | |
| type: object | |
| default: | |
| N320_XG: | |
| run: true | |
| N320_HG: | |
| run: true | |
| N320_XQ: | |
| run: true | |
| - name: x410_fpga_matrix | |
| type: object | |
| default: | |
| X410_X4_200: | |
| run: true | |
| X410_CG_400: | |
| run: true | |
| X410_UC_200: | |
| run: true | |
| - name: x440_fpga_matrix | |
| type: object | |
| default: | |
| X440_X4_400: | |
| run: true | |
| X440_CG_400: | |
| run: true | |
| X440_CG_1600: | |
| run: true | |
| - name: uploadSbomArtifacts | |
| type: boolean | |
| displayName: Publish SBOMs to DepTrack | |
| default: false | |
| - name: sbomExclFromUpload | |
| type: string | |
| displayName: Don't upload listed SBOMs (space-separated list of image names) | |
| default: ' ' | |
| variables: | |
| - name: uhdFpgaArtifactSource | |
| ${{ if eq(parameters.fpga_imgs_source, 'FPGA Pipeline') }}: | |
| value: uhd_fpga_pipeline | |
| ${{ elseif eq(parameters.fpga_imgs_source, 'Mono Pipeline PR') }}: | |
| value: uhd_mono_pipeline_pr | |
| ${{ else }}: | |
| value: uhd_mono_pipeline | |
| - name: fpga_imgs_source | |
| ${{ if contains(parameters.fpga_imgs_source, 'Pipeline') }}: | |
| value: 'Pipeline' | |
| ${{ else }}: | |
| value: 'Filesystem' | |
| resources: | |
| pipelines: | |
| - pipeline: uhd_mono_pipeline | |
| source: 'uhddev mono pipeline' | |
| branch: master | |
| - pipeline: uhd_mono_pipeline_pr | |
| source: 'uhddev mono pipeline PR' | |
| branch: master | |
| - pipeline: usrp-kas-pipeline | |
| source: 'usrp-kas' | |
| branch: scarthgap | |
| # Keep this for now, but it should be removed once the mono pipeline is | |
| # fully populated. | |
| - pipeline: uhd_fpga_pipeline | |
| source: 'uhddev fpga pipeline' | |
| branch: master | |
| repositories: | |
| - repository: meta-ettus | |
| type: github | |
| name: EttusResearch/meta-ettus-dev | |
| endpoint: EttusResearch | |
| ref: scarthgap | |
| - repository: gr-ettus | |
| type: github | |
| name: EttusResearch/gr-ettusdev | |
| endpoint: EttusResearch | |
| ref: maint-3.8-uhd4.0 | |
| - repository: ettus-rts | |
| type: github | |
| endpoint: EttusResearch | |
| name: EttusResearch/ettus-rts | |
| ref: master | |
| - repository: labview-usrp-examples | |
| type: github | |
| endpoint: EttusResearch | |
| name: ni/labview-usrp-examples | |
| ref: main | |
| stages: | |
| - stage: test_uhd_x410_embedded_stage | |
| displayName: Test X410 Embedded UHD | |
| dependsOn: [] | |
| condition: ${{ parameters.run_x410_embedded_tests }} | |
| jobs: | |
| - template: templates/tests/job-uhd-x410-hardware-tests-sdr-test0.yml | |
| parameters: | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| - stage: test_uhd_x440_embedded_stage | |
| displayName: Test X440 Embedded UHD | |
| dependsOn: [] | |
| condition: ${{ parameters.run_x440_embedded_tests }} | |
| jobs: | |
| - template: templates/tests/job-uhd-x440-hardware-tests-sdr-test0.yml | |
| parameters: | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| - stage: stage_uhd_streaming_tests | |
| displayName: UHD Streaming Tests | |
| dependsOn: [] | |
| condition: ${{ parameters.run_streaming_tests }} | |
| jobs: | |
| - template: templates/job-uhd-streaming-tests.yml | |
| parameters: | |
| uhdSrcDir: $(Build.SourcesDirectory)/uhddev | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| testLength: ${{ parameters.testLength }} | |
| dpdkVersions: ${{ parameters.dpdkVersions }} | |
| selectedTests: ${{ split(replace(parameters.selected_streaming_tests, ' ', ''), ',') }} | |
| - stage: test_uhd_devtest | |
| displayName: Test UHD Devtest | |
| dependsOn: [] | |
| condition: ${{ parameters.run_devtests }} | |
| jobs: | |
| - template: templates/job-uhd-devtest-rhombus.yml | |
| parameters: | |
| uhdSrcDir: $(Build.SourcesDirectory) | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| - template: templates/job-uhd-devtest-s175.yml | |
| parameters: | |
| uhdSrcDir: $(Build.SourcesDirectory) | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| - stage: test_n310_rf_tests | |
| displayName: Run N310 RF tests | |
| dependsOn: [] | |
| condition: ${{ parameters.run_n310_rf_tests }} | |
| jobs: | |
| - template: templates/job-uhd-rf-tests-pebbles.yml | |
| parameters: | |
| uhdSrcDir: $(Build.SourcesDirectory)/uhddev | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| extra_rf_test_args: ${{ parameters.extra_rf_test_args }} | |
| - stage: test_obx_rf_tests | |
| displayName: Run X310 + OBX RF tests | |
| dependsOn: [] | |
| condition: ${{ parameters.run_obx_rf_tests }} | |
| jobs: | |
| - template: templates/job-uhd-rf-tests-x310-obx.yml | |
| parameters: | |
| uhdSrcDir: $(Build.SourcesDirectory)/uhddev | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| extra_rf_test_args: ${{ parameters.extra_rf_test_args }} | |
| - stage: test_obx_devtest | |
| displayName: Test X310 + OBX Devtest | |
| dependsOn: [] | |
| condition: ${{ parameters.run_obx_devtests }} | |
| jobs: | |
| - template: templates/job-uhd-devtest-x310-obx.yml | |
| parameters: | |
| uhdSrcDir: $(Build.SourcesDirectory) | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| - stage: test_b310_rf_tests | |
| displayName: Test B310 RF Tests | |
| dependsOn: [] | |
| condition: ${{ parameters.run_b310_rf_tests }} | |
| jobs: | |
| - template: templates/job-uhd-rf-tests-b310.yml | |
| parameters: | |
| uhdSrcDir: $(Build.SourcesDirectory)/uhddev | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| extra_rf_test_args: ${{ parameters.extra_rf_test_args }} | |
| - stage: test_b310_devtest | |
| displayName: Test B310 Devtest | |
| dependsOn: [] | |
| condition: ${{ parameters.run_b310_devtests }} | |
| jobs: | |
| - template: templates/job-uhd-devtest-b310.yml | |
| parameters: | |
| uhdSrcDir: $(Build.SourcesDirectory) | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| - stage: test_x410_rf_tests | |
| displayName: Run X410 RF tests | |
| dependsOn: [] | |
| condition: ${{ parameters.run_x410_rf_tests }} | |
| jobs: | |
| - template: templates/tests/job-uhd-x410-hardware-tests-pebbles.yml | |
| parameters: | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| runX410X4400RfSubset: true | |
| extra_rf_test_args: ${{ parameters.extra_rf_test_args }} | |
| testLength: ${{ parameters.testLength }} | |
| - stage: test_x420_rf_tests | |
| displayName: Run X420 RF tests | |
| dependsOn: [] | |
| condition: ${{ parameters.run_x420_rf_tests }} | |
| jobs: | |
| - template: templates/tests/job-uhd-x420-hardware-tests-s175.yml | |
| parameters: | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| extra_rf_test_args: ${{ parameters.extra_rf_test_args }} | |
| testLength: ${{ parameters.testLength }} | |
| - stage: test_x440_rf_tests | |
| displayName: Run X440 RF tests | |
| dependsOn: [] | |
| condition: ${{ parameters.run_x440_rf_tests }} | |
| jobs: | |
| - template: templates/tests/job-uhd-x440-hardware-tests-pebbles.yml | |
| parameters: | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| extra_rf_test_args: ${{ parameters.extra_rf_test_args }} | |
| testLength: ${{ parameters.testLength }} | |
| - stage: test_x440_phase_tests | |
| displayName: Run X440 Phase tests | |
| dependsOn: [] | |
| condition: ${{ parameters.run_x440_phase_tests }} | |
| jobs: | |
| - template: templates/tests/job-uhd-x440-hardware-tests-saison.yml | |
| parameters: | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| fpga_imgs_source: ${{ variables.fpga_imgs_source }} | |
| ${{ if contains(parameters['extra_rf_test_args'], 'test_selector') }}: | |
| extra_rf_test_args: ${{ parameters.extra_rf_test_args }} | |
| ${{ else }}: | |
| extra_rf_test_args: ${{ parameters.extra_rf_test_args }} --test_selector test_rx_phase_coherence.py test_tx_phase_coherence.py | |
| testLength: ${{ parameters.testLength }} | |
| - stage: test_labview_usrp_examples | |
| displayName: Test LabVIEW USRP Examples | |
| dependsOn: [] | |
| condition: ${{ parameters.run_lv_test }} | |
| jobs: | |
| - template: templates/job-uhd-usrp-tests-uhdlvtest.yml | |
| parameters: | |
| uhdArtifactSource: uhd_mono_pipeline | |
| uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} | |
| - ${{ if eq(parameters.uploadSbomArtifacts, true) }}: | |
| - template: .ci/templates/stages-nisbom-uploads.yml@ettus-rts | |
| parameters: | |
| sbomExclFromUpload: ${{ parameters.sbomExclFromUpload }} | |
| uhdArtifactSource: uhd_mono_pipeline | |
| releaseBinaries: false | |