Phoneix-Bench / issues /AsFigo_pyslint_pr185
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Add 511-case data manifest (testbench_verilator, issues, snapshots) (#2)
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# CNST - add new rule
- Source URL: https://github.com/AsFigo/pyslint/issues/184
```verilog
class bli_c;
bit foo_sel;
rand int foo;
constraint cst_1 {
foo == (foo_sel) ? 5 :6;
}
function void post_randomize();
$display ("%p", this);
endfunction
endclass
module m;
bli_c u_bli_c_0;
initial begin
u_bli_c_0 = new();
repeat (5) u_bli_c_0.randomize();
#10;
$finish (2);
end
endmodule
```
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