diff --git a/.gitattributes b/.gitattributes
index bcaacb07da32cfccdfe2cf1910070225859999ea..75ad10009f22c01b025cd1d048c90bf61568ac27 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -90,3 +90,7 @@ alu_w64_3ops_sky130_50mhz/flow/extracted/physics_labels.json filter=lfs diff=lfs
alu_w64_3ops_sky130_50mhz/flow/extracted/geometry_patches.json filter=lfs diff=lfs merge=lfs -text
aes_core_sky130_50mhz/flow/extracted/physics_labels.json filter=lfs diff=lfs merge=lfs -text
aes_core_sky130_50mhz/flow/extracted/geometry_patches.json filter=lfs diff=lfs merge=lfs -text
+aes_sky130_100mhz/flow/extracted/physics_labels.json filter=lfs diff=lfs merge=lfs -text
+aes_sky130_100mhz/flow/extracted/geometry_patches.json filter=lfs diff=lfs merge=lfs -text
+aes_sky130_50mhz/flow/extracted/physics_labels.json filter=lfs diff=lfs merge=lfs -text
+aes_sky130_50mhz/flow/extracted/geometry_patches.json filter=lfs diff=lfs merge=lfs -text
diff --git a/aes_sky130_100mhz/flow/aes.gds.gz b/aes_sky130_100mhz/flow/aes.gds.gz
new file mode 100644
index 0000000000000000000000000000000000000000..1b2155be6d46028e1daa421252bb662cb5a93d40
--- /dev/null
+++ b/aes_sky130_100mhz/flow/aes.gds.gz
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:60e9e323c13b514b841e40c212b023660296808f852e6a8eef404fc9f5f17c09
+size 4368909
diff --git a/aes_sky130_100mhz/flow/clean_gds_for_lvs.py b/aes_sky130_100mhz/flow/clean_gds_for_lvs.py
new file mode 100644
index 0000000000000000000000000000000000000000..385576382e34848de9c1d976fa04a4764f310cc4
--- /dev/null
+++ b/aes_sky130_100mhz/flow/clean_gds_for_lvs.py
@@ -0,0 +1,52 @@
+import pya
+import sys
+
+layout = pya.Layout()
+layout.read("/tmp/datagen_output/aes_sky130_100mhz/flow/aes.gds")
+
+top_cell = None
+for tc in layout.top_cells():
+ if tc.name == "aes" or tc.name != "OUTLINE":
+ top_cell = tc
+ break
+
+if top_cell is None:
+ print("ERROR: No top cell found")
+ sys.exit(1)
+
+skip_patterns = ["sky130_fd_sc_hd__fill_", "sky130_fd_sc_hd__decap_", "sky130_fd_sc_hd__conb_"]
+
+removed = 0
+to_delete = []
+for inst in top_cell.each_inst():
+ cell_name = inst.cell.name
+ for pat in skip_patterns:
+ if pat in cell_name:
+ to_delete.append(inst)
+ break
+
+for inst in to_delete:
+ inst.delete()
+ removed += 1
+
+print("Removed %d non-logic cell instances" % removed)
+
+# Remove orphaned cell definitions
+used_cells = set()
+for cell in layout.each_cell():
+ for inst in cell.each_inst():
+ used_cells.add(inst.cell.cell_index())
+used_cells.add(top_cell.cell_index())
+
+orphans = []
+for cell in layout.each_cell():
+ if cell.cell_index() not in used_cells and cell.cell_index() != top_cell.cell_index():
+ orphans.append(cell.cell_index())
+
+for ci in orphans:
+ layout.delete_cell(ci)
+
+print("Removed %d orphaned cell definitions" % len(orphans))
+
+layout.write("/tmp/datagen_output/aes_sky130_100mhz/flow/lvs_cleaned.gds")
+print("Cleaned GDS written to /tmp/datagen_output/aes_sky130_100mhz/flow/lvs_cleaned.gds")
diff --git a/aes_sky130_100mhz/flow/drc_deck_patched.lydrc b/aes_sky130_100mhz/flow/drc_deck_patched.lydrc
new file mode 100644
index 0000000000000000000000000000000000000000..fe439f3915e91922e291cb0de1e81df88f643743
--- /dev/null
+++ b/aes_sky130_100mhz/flow/drc_deck_patched.lydrc
@@ -0,0 +1,918 @@
+
+
+
+
+ drc
+
+
+
+ false
+ false
+
+ true
+ drc_scripts
+ tools_menu.drc.end
+ dsl
+ drc-dsl-xml
+ #
+# DRC for SKY130 according to :
+# https://skywater-pdk.readthedocs.io/en/latest/rules/periphery.html
+# https://skywater-pdk.readthedocs.io/en/latest/rules/layers.html
+#
+# Distributed under GNU GPLv3: https://www.gnu.org/licenses/
+#
+# History :
+# 2020-10-04 : v1.0 : initial release
+#
+##########################################################################################
+
+# optionnal for a batch launch : klayout -b -rd in_gds=my_layout.gds -rd report_file=6_drc_count.rpt -r drc_sky130.drc
+if $in_gds
+ source($in_gds, $topcell)
+end
+
+if $report_file
+ report("SKY130 DRC runset", $report_file)
+else
+ report("SKY130 DRC runset", File.join(File.dirname(RBA::CellView::active.filename), "6_drc_count.rpt"))
+end
+
+AL = true # do not change
+CU = false # do not change
+# choose betwen only one of AL or CU back-end flow here :
+backend_flow = AL
+
+# enable / disable rule groups
+FEOL = false # front-end-of-line checks
+BEOL = true # back-end-of-line checks
+OFFGRID = true # manufacturing grid/angle checks
+
+# klayout setup
+########################
+# use a tile size of 1mm - not used in deep mode-
+tiles(1000.um)
+# use a tile border of 10 micron:
+tile_borders(1.um)
+#no_borders
+
+# hierachical
+deep
+
+# use 4 cpu cores
+threads(4)
+# if more inof is needed, set true
+verbose(true)
+
+# layers definitions
+########################
+
+# all except purpose (datatype) 5 -- label and 44 -- via
+li_wildcard = "67/0-4,6-43,45-*"
+mcon_wildcard = "67/44"
+
+m1_wildcard = "68/0-4,6-43,45-*"
+via_wildcard = "68/44"
+
+m2_wildcard = "69/0-4,6-43,45-*"
+via2_wildcard = "69/44"
+
+m3_wildcard = "70/0-4,6-43,45-*"
+via3_wildcard = "70/44"
+
+m4_wildcard = "71/0-4,6-43,45-*"
+via4_wildcard = "71/44"
+
+m5_wildcard = "72/0-4,6-43,45-*"
+
+diff = input(65, 20)
+tap = polygons(65, 44)
+nwell = polygons(64, 20)
+dnwell = polygons(64, 18)
+pwbm = polygons(19, 44)
+pwde = polygons(124, 20)
+natfet = polygons(124, 21)
+hvtr = polygons(18, 20)
+hvtp = polygons(78, 44)
+ldntm = polygons(11, 44)
+hvi = polygons(75, 20)
+tunm = polygons(80, 20)
+lvtn = polygons(125, 44)
+poly = polygons(66, 20)
+hvntm = polygons(125, 20)
+nsdm = polygons(93, 44)
+psdm = polygons(94, 20)
+rpm = polygons(86, 20)
+urpm = polygons(79, 20)
+npc = polygons(95, 20)
+licon = polygons(66, 44)
+
+li = polygons(li_wildcard)
+mcon = polygons(mcon_wildcard)
+
+m1 = polygons(m1_wildcard)
+via = polygons(via_wildcard)
+
+m2 = polygons(m2_wildcard)
+via2 = polygons(via2_wildcard)
+
+m3 = polygons(m3_wildcard)
+via3 = polygons(via3_wildcard)
+
+m4 = polygons(m4_wildcard)
+via4 = polygons(via4_wildcard)
+
+m5 = polygons(m5_wildcard)
+
+pad = polygons(76, 20)
+nsm = polygons(61, 20)
+capm = polygons(89, 44)
+cap2m = polygons(97, 44)
+vhvi = polygons(74, 21)
+uhvi = polygons(74, 22)
+npn = polygons(82, 20)
+inductor = polygons(82, 24)
+vpp = polygons(82, 64)
+pnp = polygons(82, 44)
+lvs_prune = polygons(84, 44)
+ncm = polygons(92, 44)
+padcenter = polygons(81, 20)
+mf = polygons(76, 44)
+areaid_sl = polygons(81, 1)
+areaid_ce = polygons(81, 2)
+areaid_fe = polygons(81, 3)
+areaid_sc = polygons(81, 4)
+areaid_sf = polygons(81, 6)
+areaid_sw = polygons(81, 7)
+areaid_sr = polygons(81, 8)
+areaid_mt = polygons(81, 10)
+areaid_dt = polygons(81, 11)
+areaid_ft = polygons(81, 12)
+areaid_ww = polygons(81, 13)
+areaid_ld = polygons(81, 14)
+areaid_ns = polygons(81, 15)
+areaid_ij = polygons(81, 17)
+areaid_zr = polygons(81, 18)
+areaid_ed = polygons(81, 19)
+areaid_de = polygons(81, 23)
+areaid_rd = polygons(81, 24)
+areaid_dn = polygons(81, 50)
+areaid_cr = polygons(81, 51)
+areaid_cd = polygons(81, 52)
+areaid_st = polygons(81, 53)
+areaid_op = polygons(81, 54)
+areaid_en = polygons(81, 57)
+areaid_en20 = polygons(81, 58)
+areaid_le = polygons(81, 60)
+areaid_hl = polygons(81, 63)
+areaid_sd = polygons(81, 70)
+areaid_po = polygons(81, 81)
+areaid_it = polygons(81, 84)
+areaid_et = polygons(81, 101)
+areaid_lvt = polygons(81, 108)
+areaid_re = polygons(81, 125)
+areaid_ag = polygons(81, 79)
+poly_rs = polygons(66, 13)
+diff_rs = polygons(65, 13)
+pwell_rs = polygons(64, 13)
+li_rs = polygons(67, 13)
+cfom = polygons(22, 20)
+
+
+# Define a new custom function that selects polygons by their number of holes:
+# It will return a new layer containing those polygons with min to max holes.
+# max can be nil to omit the upper limit.
+class DRC::DRCLayer
+ def with_holes(min, max)
+ new_data = RBA::Region::new
+ self.data.each do |p|
+ if p.holes >= (min || 0) && (!max || p.holes <= max)
+ new_data.insert(p)
+ end
+ end
+ DRC::DRCLayer::new(@engine, new_data)
+ end
+end
+
+# DRC section
+########################
+info("DRC section")
+
+if FEOL
+info("FEOL section")
+gate = diff & poly
+
+# dnwell
+dnwell.width(3.0, euclidian).output("dnwell.2", "dnwell.2 : min. dnwell width : 3.0um")
+dnwell.not(uhvi).not(areaid_po).isolated(6.3, euclidian).output("dnwell.3", "dnwell.3 : min. dnwell spacing : 6.3um")
+dnwell.and(pnp).output("dnwell.4", "dnwell.4 : dnwell must not overlap pnp")
+dnwell.and(psdm).edges.not(psdm.edges).output("dnwell.5", "p+ must not straddle dnwell")
+# dnwell.6 rue not coded
+
+# nwell
+nwell.width(0.84, euclidian).output("nwell.1", "nwell.1 : min. nwell width : 0.84um")
+nwell.isolated(1.27, euclidian).output("nwell.2a", "nwell.2a : min. nwell spacing (merged if less) : 1.27um")
+# rule nwell.4 is suitable for digital cells
+#nwell.not(uhvi).not(areaid_en20).not_interacting(tap.and(licon).and(li)).output("nwell.4", "nwell4 : all nwell exempt inside uhvi must contain a n+tap")
+nwell.enclosing(dnwell.not(uhvi).not(areaid_po), 0.4, euclidian).output("nwell.5", "nwell.5 : min. nwell enclosing dnwell exempt unside uhvi : 0.4um")
+dnwell.enclosing(nwell.not(uhvi), 1.03, euclidian).output("nwell.6", "nwell.6 : min. dnwell enclosing nwell exempt unside uhvi : 1.03um")
+dnwell.separation(nwell, 4.5, euclidian).output("nwell.7", "nwell.7 : min. dnwell separation nwell : 4.5um")
+
+# pwbm
+pwbm.not(uhvi).output("pwbm", "pwbm must be inside uhvi")
+dnwell.and(uhvi).edges.not(pwbm).output("pwbm.4", "pwbm.4 : dnwell inside uhvi must be enclosed by pwbm")
+
+# pwde
+pwde.not(pwbm).output("pwdem.3", "pwdem.3 : pwde must be inside pwbm")
+pwde.not(uhvi).output("pwdem.4", "pwdem.4 : pwde must be inside uhvi")
+pwde.not(dnwell).output("pwdem.5", "pwdem.5 : pwde must be inside dnwell")
+
+# hvtp
+#hvtp.not(nwell).output("hvtp", "hvtp must inside nwell")
+hvtp.width(0.38, euclidian).output("hvtp.1", "hvtp.1 : min. hvtp width : 0.38um")
+hvtp.isolated(0.38, euclidian).output("hvtp.2", "hvtp.2 : min. hvtp spacing : 0.38um")
+hvtp.enclosing(gate.and(psdm), 0.18, euclidian).output("hvtp.3", "hvtp.3 : min. hvtp enclosure of pfet gate : 0.18um")
+hvtp.separation(gate.and(psdm), 0.18, euclidian).output("hvtp.4", "hvtp.4 : min. hvtp spacing pfet gate: 0.18um")
+hvtp.with_area(0..0.265).output("hvtp.5", "hvtp.5 : min. hvtp area : 0.265um²")
+
+# hvtr
+hvtr.width(0.38, euclidian).output("hvtr.1", "hvtr.1 : min. hvtr width : 0.38um")
+hvtr.isolated(0.38, euclidian).output("hvtr.2", "hvtr.2 : min. hvtr spacing : 0.38um")
+
+# lvtn
+lvtn.width(0.38, euclidian).output("lvtn.1", "lvtn.1 : min. lvtn width : 0.38um")
+lvtn.isolated(0.38, euclidian).output("lvtn.2", "lvtn.2 : min. lvtn spacing : 0.38um")
+lvtn.separation(diff.and(poly).not(uhvi), 0.18, euclidian).output("lvtn.3a", "lvtn.3a : min. lvtn spacing to gate : 0.18um")
+lvtn.separation(diff.and(nwell).not(poly), 0.235, projection).output("lvtn.3b", "lvtn.3b : min. lvtn spacing to pfet s/d : 0.18um")
+lvtn.enclosing(gate.not(uhvi), 0.18, euclidian).output("lvtn.4b", "lvtn.4b : min. lvtn enclosing to gate : 0.18um")
+lvtn.separation(hvtp, 0.38, euclidian).output("lvtn.9", "lvtn.9 : min. lvtn spacing hvtp : 0.38um")
+nwell.not_interacting(gate.and(nwell.not(hvi).not(areaid_ce))).enclosing(lvtn.not(uhvi), 0.18, euclidian).polygons.without_area(0).output("lvtn.4b", "lvtn.4b : min. lvtn enclosure of gate : 0.18um")
+lvtn.separation(nwell.inside(areaid_ce), 0.38, euclidian).output("lvtn.12", "lvtn.12 : min. lvtn spacing nwell inside areaid.ce : 0.38um")
+lvtn.with_area(0..0.265).output("lvtn.13", "lvtn.13 : min. lvtn area : 0.265um²")
+
+# ncm
+ncm.and(tap.and(nwell).or(diff.not(nwell))).output("ncm.x.3", "ncm.x.3 : ncm must not overlap n+diff")
+ncm.width(0.38, euclidian).output("ncm.1", "ncm.1 : min. ncm width : 0.38um")
+ncm.isolated(0.38, euclidian).output("ncm.2", "ncm.2 : min. ncm spacing manual merge if smaller : 0.38um")
+ncm.enclosing(diff.and(nwell), 0.18, euclidian).output("ncm.3", "ncm.3 : min. ncm enclosure of p+diff : 0.18um")
+ncm.separation(lvtn.and(diff), 0.23, euclidian).output("ncm.5", "ncm.5 : min. ncm spacing lvtn diff : 0.23um")
+ncm.separation(diff.not(nwell), 0.2, euclidian).output("ncm.6", "ncm.6 : min. ncm spacing nfet : 0.2um")
+ncm.with_area(0..0.265).output("ncm.7", "ncm.13 : min. ncm area : 0.265um²")
+
+# diff-tap
+difftap = diff + tap
+difftap.width(0.15, euclidian).output("difftap.1", "difftap.1 : min. difftap width : 0.15um")
+not_in_cell1 = layout(source.cell_obj).select("s8cell_ee_plus_sseln_a", "-s8cell_ee_plus_sseln_b", "-s8cell_ee_plus_sselp_a", "-s8cell_ee_plus_sselp_b" , "-s8fpls_pl8", "-s8fpls_rdrv4" , "-s8fpls_rdrv4f", "-s8fpls_rdrv8")
+not_in_cell1_diff = not_in_cell1.input(65, 20)
+not_in_cell1_diff.not(areaid_sc).not(poly).edges.and(gate.edges).with_length(0,0.42).output("difftap.2", "difftap.2: min. gate (exempt areaid.sc) width : 0.42um")
+diff.and(areaid_sc).not(poly).edges.and(gate.edges).with_length(0,0.36).output("difftap.2", "difftap.2: min. gate inside areaid.sc width : 0.36um")
+difftap.isolated(0.27, euclidian).output("difftap.3", "difftap.3 : min. difftap spacing : 0.27um")
+tap.edges.and(diff.edges).with_length(0,0.29).output("difftap.4", "difftap.4 : min. tap bound by diffusion : 0.29um")
+tap.edges.and(diff.edges).space(0.4, projection).output("difftap.5", "difftap.5 : min. tap bound by 2 diffusions : 0.4um")
+(tap.edges.and(diff.edges)).extended(0.01, 0.01, 0, 0, false).not(tap.and(diff)).and(diff.or(tap)).output("difftap.6", "difftap.6 : diff and tap not allowed to extend beyong their abutting ege")
+tap.edges.not_interacting(diff.edges).separation(diff.edges, 0.13, euclidian).output("difftap.7", "difftap.7 : min. diff/tap spacing to non-coincident diff edge : 0.13um")
+diff.edges.not_interacting(tap.edges).separation(tap.edges, 0.13, euclidian).output("difftap.7", "difftap.7 : min. diff/tap spacing to non-coincident tap edge : 0.13um")
+nwell.enclosing(diff.not(uhvi).and(psdm), 0.18, euclidian).output("difftap.8", "difftap.8 : min. p+diff enclosure by nwell : 0.18um")
+diff.not(uhvi).and(nsdm).separation(nwell, 0.34, euclidian).output("difftap.9", "difftap.9 : min. n+diff spacing to nwell : 0.34um")
+nwell.enclosing(tap.not(uhvi).and(nsdm), 0.18, euclidian).output("difftap.10", "difftap.10 : min. n+tap enclosure by nwell : 0.18um")
+tap.not(uhvi).and(psdm).separation(nwell, 0.13, euclidian).output("difftap.11", "difftap.11 : min. p+tap spacing to nwell : 0.13um")
+
+# tunm
+tunm.width(0.41, euclidian).output("tunm.1", "tunm.1 : min. tunm width : 0.41um")
+tunm.isolated(0.5, euclidian).output("tunm.2", "tunm.2 : min. tunm spacing : 0.5um")
+tunm.enclosing(gate, 0.095, euclidian).output("tunm.3", "tunm.3 : min. tunm beyond gate : 0.095um")
+tunm.separation(gate.not_interacting(tunm), 0.095, euclidian).output("tunm.4", "tunm.4 : min. tunm spacing to gate outside tunm: 0.095um")
+gate.and(tunm).edges.not(gate.edges).output("tunm.5", "tunm.5 : gate must not straddle tunm")
+tunm.not(dnwell).output("tunm.6a", "tunm.6a : tunm not allowed outside dnwell")
+tunm.with_area(0..0.672).output("tunm.7", "tunm.7 : min. tunm area : 0.672um²")
+
+# poly
+poly.width(0.15, euclidian).output("poly.1a", "poly.1a : min. poly width : 0.15um")
+poly.not(diff).edges.and(gate.and(lvtn).edges).space(0.35, euclidian).output("poly.1b", "poly.1b: min. lvtn gate width : 0.35um")
+poly.isolated(0.21, euclidian).output("poly.2", "poly.2 : min. poly spacing : 0.21um")
+poly.and(rpm.or(urpm).or(poly_rs)).width(0.33, euclidian).output("poly.3", "poly.3 : min. poly resistor width : 0.33um")
+poly.not(gate).separation(diff, 0.075, projection).polygons.without_area(0).output("poly.4", "poly.4 : min. poly on field spacing to diff : 0.075um")
+poly.not(gate).separation(tap, 0.055, euclidian).output("poly.5", "poly.5 : min. poly on field spacing to tap : 0.055um")
+gate.separation(tap, 0.3, projection).polygons.and(diff).output("poly.6", "poly.6 : min. gate spacing to tap : 0.3um")
+diff.enclosing(gate, 0.25, projection).polygons.without_area(0).output("poly.7", "poly.7 : min. source/drain length : 0.25um")
+poly.enclosing(gate, 0.13, projection).polygons.without_area(0).output("poly.8", "poly.8 : min. poly extention gate (endcap) : 0.13um")
+poly.and(rpm.or(urpm).or(poly_rs)).separation(poly.or(difftap), 0.48, euclidian).polygons.without_area(0).output("poly.9", "poly.9 : min. poly resistor space to poly or diff/tap : 0.48um")
+diff.merged.edges.end_segments(0.01).and(poly).output("poly.10", "poly.10 : poly must not overlap diff corner")
+gate.with_angle(0 .. 90).output("poly.11", "poly.11 : non 90 degree angle gate")
+not_in_cell3 = layout(source.cell_obj).select("s8fgvr_n_fg2")
+not_in_cell3_poly = not_in_cell3.input(66, 20)
+not_in_cell3_poly.not(hvi).not(nwell.not(hvi)).and(tap).output("poly.12", "poly.12 : poly must not overlap tap")
+poly.and(diff_rs).output("poly.15", "poly.15 : poly must not overlap diff resistor")
+
+# rpm
+rpm.width(1.27, euclidian).output("rpm.1a", "rpm.1a : min. rpm width : 1.27um")
+rpm.isolated(0.84, euclidian).output("rpm.2", "rpm.2 : min. rpm spacing : 0.84um")
+rpm.enclosing(poly.and(poly_rs).and(psdm), 0.2, euclidian).output("rpm.3", "rpm.3 : min. rpm enclosure of poly resistor : 0.2um")
+psdm.enclosing(poly.and(poly_rs).and(rpm), 0.11, euclidian).output("rpm.4", "rpm.4 : min. psdm enclosure of poly resistor : 0.11um")
+npc.enclosing(poly.and(poly_rs).and(rpm), 0.095, euclidian).output("rpm.5", "rpm.5 : min. npc enclosure of poly resistor : 0.095um")
+rpm.separation(nsdm, 0.2, euclidian).output("rpm.6", "rpm.6 : min. rpm spacing nsdm: 0.2um")
+rpm.separation(poly, 0.2, euclidian).output("rpm.7", "rpm.7 : min. rpm spacing poly: 0.2um")
+rpm.and(poly).edges.not(poly.edges).output("rpm.8", "rpm.8 : poly must not straddle rpm")
+poly.and(poly_rs).and(rpm).separation(hvntm, 0.185, euclidian).output("rpm.9", "rpm.9 : min. poly resistor spacing hvntm: 0.185um")
+rpm.and(pwbm).output("rpm.10", "rpm.107 : min. rpm spacing pwbm: na")
+
+# varac
+varac = poly & tap & (nwell - hvi) - areaid_ce
+tap.not(poly).edges.and(varac.edges).space(0.18, euclidian).output("varac.1", "varac.1: min. varac channel length : 0.18um")
+tap.and(poly).edges.and(varac.edges).space(1.0, euclidian).output("varac.2", "varac.2: min. varac channel wdth : 1.0um")
+varac.separation(hvtp, 0.18, euclidian).output("varac.3", "varac.3: min. varac channel space to hvtp : 0.18um")
+varac.separation(licon.and(tap), 0.25, euclidian).output("varac.4", "varac.4: min. varac channel space to licon on tap : 0.25um")
+nwell.enclosing(poly.overlapping(varac), 0.15, euclidian).output("varac.5", "varac.5: min. nwell enclosure of poly overlapping varac channel : 0.15um")
+tap.overlapping(varac).separation(difftap, 0.27, euclidian).polygons.without_area(0).output("varac.6", "varac.6: min. varac channel tap space to difftap : 0.27um")
+nwell.overlapping(varac).and(diff.and(nwell)).output("varac.7", "varac.7: nwell overlapping varac channel must not overlap p+diff")
+
+# photo
+photodiode = dnwell & areaid_po
+photodiode.edges.without_length(3.0).output("photo.2", "photo.2 : minimum/maximum width of photodiode : 3.0um")
+photodiode.isolated(5.0, euclidian).output("photo.3", "photo.3 : mini. photodiode spacing : 5.0um")
+photodiode.separation(dnwell, 5.3, euclidian).output("photo.4", "photo.4 : mini. photodiode spacing to dnwell : 5.3um")
+areaid_po.not(dnwell).output("photo.5.6", "photo.5.6 : photodiode edges must coincide areaid.po and enclosed by dnwell")
+photodiode.not(tap.not(nwell).holes).output("photo.7", "photo.7 : photodiode must be enclosed by p+tap ring")
+photodiode.and(nwell).edges.without_length(0.84).output("photo.8", "photo.8 : minimum/maximum width of nwell inside photodiode : 0.84um")
+areaid_po.edges.and(photodiode.and(nwell).sized(1.08)).without_length(12.0).output("photo.9", "photo.9 : minimum/maximum enclosure of nwell by photodiode : 1.08um")
+photodiode.and(tap).edges.without_length(0.41).output("photo.10", "photo.10 : minimum/maximum width of tap inside photodiode : 0.41um")
+
+# npc
+npc.width(0.27, euclidian).output("npc.1", "npc.1 : min. npc width : 0.27um")
+npc.isolated(0.27, euclidian).output("npc.2", "npc.2 : min. npc spacing, should be mnually merge if less : 0.27um")
+npc.separation(gate, 0.09, euclidian).output("npc.4", "npc.4 : min. npc spacing to gate : 0.09um")
+
+# nsdm/psdm
+npsdm = nsdm + psdm
+nsdm.width(0.38, euclidian).output("nsdm.1", "nsdm.1 : min. nsdm width : 0.38um")
+psdm.width(0.38, euclidian).output("psdm.1", "psdm.1 : min. psdm width : 0.38um")
+nsdm.isolated(0.38, euclidian).output("n/psdm.1", "n/psdm.1 : min. nsdm spacing, should be mnually merge if less : 0.38um")
+psdm.isolated(0.38, euclidian).output("n/psdm.1", "n/psdm.1 : min. psdm spacing, should be mnually merge if less : 0.38um")
+npsdm.enclosing(diff, 0.125, euclidian).polygons.not(tap.sized(0.125)).output("n/psdm.5a", "n/psdm.5a : min. n/psdm enclosure diff except butting edge : 0.125um")
+npsdm.enclosing(tap, 0.125, euclidian).polygons.not(diff.sized(0.125)).output("n/psdm.5b", "n/psdm.5b : min. n/psdm enclosure tap except butting edge : 0.125um")
+tap.edges.and(diff.edges).not(npsdm).output("n/psdm.6", "n/psdm.6 : min. n/psdm enclosure of butting edge : 0.0um")
+nsdm.and(difftap).separation(psdm.and(difftap), 0.13, euclidian).polygons.without_area(0).output("n/psdm.7", "n/psdm.7 : min. nsdm diff spacing to psdm diff except butting edge : 0.13um")
+diff.and((nsdm.and(nwell)).or(psdm.not(nwell))).output("n/psdm.8", "n/psdm.8 : diff should be the opposite type of well/substrate underneath")
+tap.and((nsdm.not(nwell)).or(psdm.and(nwell))).output("n/psdm.8", "n/psdm.8 : tap should be the same type of well/substrate underneath")
+tap.and(diff).without_area(0).output("tap and diff", "tap and diff must not overlap")
+nsdm.with_area(0..0.265).output("n/psdm.10a", "n/psdm.10a : min. nsdm area : 0.265um²")
+psdm.with_area(0..0.265).output("n/psdm.10b", "n/psdm.10b : min. psdm area : 0.265um²")
+
+# licon
+licon.not(poly.interacting(poly_rs).and(rpm)).edges.without_length(0.17).output("licon.1", "licon.1 : minimum/maximum width of licon : 0.17um")
+licon.and(poly.interacting(poly_rs).and(rpm)).not_interacting((licon.and(poly.interacting(poly_rs).and(rpm)).edges.with_length(0.19)).or(licon.and(poly.interacting(poly_rs).and(rpm)).edges.with_length(2.0))).output("licon.1b/c", "licon.1b/c : minimum/maximum width/length of licon inside poly resistor : 2.0/0.19um")
+licon.isolated(0.17, euclidian).output("licon.2", "licon.2 : min. licon spacing : 0.17um")
+licon.and(poly.interacting(poly_rs).and(rpm)).edges.with_length(0.19).space(0.35, euclidian).output("licon.2b", "licon.2b : min. licon 0.19um edge on resistor spacing : 0.35um")
+licon.interacting(licon.and(poly.interacting(poly_rs).and(rpm)).edges.with_length(2.0)).separation(licon.and(poly.interacting(poly_rs).and(rpm)), 0.51, euclidian).output("licon.2c", "licon.2c : min. licon 2.0um edge on resistor spacing : 0.51um")
+licon.and(poly.interacting(poly_rs).and(rpm)).separation(licon.not(poly.interacting(poly_rs).and(rpm)), 0.51, euclidian).output("licon.2d", "licon.2d : min. licon on resistor spacing other licon : 0.51um")
+# rule licon.3 not coded
+licon.not(li).not(poly.or(diff).or(tap)).output("licon.4", "licon.4 : min. licon must overlap li and (poly or tap or diff) ")
+diff.enclosing(licon, 0.04, euclidian).output("licon.5", "licon.5 : min. diff enclosure of licon : 0.04um")
+tap.edges.and(diff.edges).separation(licon.and(tap).edges, 0.06, euclidian).output("licon.6", "licon.6 : min. abutting edge spacing to licon tap : 0.06um")
+licon_edges_with_less_enclosure_tap = tap.enclosing(licon, 0.12, projection).second_edges
+opposite1 = (licon.edges - licon_edges_with_less_enclosure_tap).width(0.17 + 1.dbu, projection).polygons
+licon.not_interacting(opposite1).output("licon.7", "licon.7 : min. tap enclosure of licon by one of 2 opposite edges : 0.12um")
+poly.enclosing(licon, 0.05, euclidian).output("licon.8", "licon.8 : min. poly enclosure of licon : 0.05um")
+licon008 = licon.interacting(poly.enclosing(licon, 0.08, euclidian).polygons)
+licon_edges_with_less_enclosure_poly = poly.enclosing(licon, 0.08, projection).second_edges
+opposite2 = (licon.edges - licon_edges_with_less_enclosure_poly).width(0.17 + 1.dbu, projection).polygons
+licon008.not_interacting(opposite2).output("licon.8a", "licon.8a : min. poly enclosure of licon by one of 2 opposite edges : 0.08um")
+# rule licon.9 not coded
+licon.and(tap.and(nwell.not(hvi))).separation(varac, 0.25, euclidian).output("licon.10", "licon.10 : min. licon spacing to varac channel : 0.25um")
+not_in_cell4 = layout(source.cell_obj).select("-s8fs_gwdlvx4", "-s8fs_gwdlvx8", "-s8fs_hvrsw_x4", "-s8fs_hvrsw8", "-s8fs_hvrsw264", "-s8fs_hvrsw520", "-s8fs_rdecdrv", "-s8fs_rdec8”, “s8fs_rdec32", "-s8fs_rdec264", "-s8fs_rdec520")
+not_in_cell4_licon = not_in_cell4.input(66, 44)
+not_in_cell4_licon.and(diff.or(tap)).separation(gate.not(areaid_sc), 0.055, euclidian).output("licon.11", "licon.11 : min. licon spacing to gate : 0.055um")
+licon.and(diff.or(tap)).separation(gate.and(areaid_sc), 0.05, euclidian).output("licon.11a", "licon.11a : min. licon spacing to gate inside areaid.sc : 0.05um")
+in_cell4 = layout(source.cell_obj).select("+s8fs_gwdlvx4", "+s8fs_gwdlvx8", "+s8fs_hvrsw_x4", "+s8fs_hvrsw8", "+s8fs_hvrsw264", "+s8fs_hvrsw520")
+in_cell4_licon = in_cell4.input(66, 44)
+in_cell4_licon.and(diff.or(tap)).separation(gate, 0.04, euclidian).output("licon.11c", "licon.11c : min. licon spacing to gate for specific cells: 0.04um")
+# rules 11.b , 11.d not coded
+diff.interacting(gate).not(diff.interacting(gate).width(5.7, euclidian).polygons).output("licon.12", "licon.12 : max. sd width without licon : 5.7um")
+licon.and(diff.or(tap)).separation(npc, 0.09, euclidian).output("licon.13", "licon.13 : min. difftap licon spacing to npc : 0.09um")
+licon.and(poly).separation(diff.or(tap), 0.19, euclidian).output("licon.14", "licon.14 : min. poly licon spacing to difftap : 0.19um")
+npc.enclosing(licon.and(poly), 0.1, euclidian).output("licon.15", "licon.15 : min. npc enclosure of poly-licon : 0.1um")
+# rule licon.16 not applicable for the diff for the nmos of a nand gates or the pmos of a nor gates
+#diff.not(gate).not_interacting(licon).output("licon.16", "licon.16 : diff must enclose one licon")
+tap.not(uhvi).not_interacting(licon).output("licon.16", "licon.16 : tap must enclose one licon")
+poly.and(tap).edges.not(tap.edges).output("licon.17", "licon.17 : tap must not straddle poly")
+npc.not_interacting(licon.and(poly)).output("licon.18", "licon.18 : npc mut enclosed one poly-licon")
+
+# vpp
+vpp.width(1.43, euclidian).output("vpp.1", "vpp.1 : min. vpp width : 1.43um")
+# rules 1.b, 1.c not coded
+vpp.and(poly.or(difftap)).output("vpp.3", "vpp.3 : vpp must not overlapp poly or diff or tap")
+vpp.and(nwell).edges.not(vpp.edges).output("vpp.4", "vpp.4 : vpp must not straddle nwell")
+vpp.and(dnwell).edges.not(vpp.edges).output("vpp.4", "vpp.4 : vpp must not straddle dnwell")
+vpp.and(poly.or(li).or(m1).or(m2)).separation(poly.or(li).or(m1).or(m2), 1.5, euclidian).polygons.with_area(2.25,nil).output("vpp.5", "vpp.5 : min. vpp spacing to poly or li or m1 or m2 : 1.5um")
+vpp.with_area(0..area(vpp.and(m3))*0.25).output("vpp.5a", "vpp.5a : max. m3 density in vpp : 0.25")
+vpp.with_area(0..area(vpp.and(m4))*0.3).output("vpp.5b", "vpp.5b : max. m4 density in vpp : 0.3")
+vpp.with_area(0..area(vpp.and(m5))*0.4).output("vpp.5c", "vpp.5c : max. m5 density in vpp : 0.4")
+nwell.enclosing(vpp, 1.5, euclidian).output("vpp.8", "vpp.8 : nwell enclosure of vpp : 1.5")
+vpp.separation(nwell, 1.5, euclidian).polygons.without_area(0).output("vpp.9", "vpp.9 : vpp spacing to nwell : 1.5")
+# rule vpp.10 not coded
+# rule vpp.11 not coded because moscap is not defined properly by any gds layer
+# rules vpp.12a, 12b, 12c not coded because specific to one cell
+if backend_flow = CU
+ m1.separation(vpp.and(m1), 0.16, euclidian).polygons.without_area(0).output("vpp.13", "vpp.13 : m1 spacing to m1inside vpp : 0.16")
+end
+
+# CAPM
+capm.width(1.0, euclidian).output("capm.1", "capm.1 : min. capm width : 1.0um")
+capm.isolated(0.84, euclidian).output("capm.2a", "capm.2a : min. capm spacing : 0.84um")
+m2.interacting(capm).isolated(1.2, euclidian).output("capm.2b", "capm.2b : min. capm spacing : 1.2um")
+m2.enclosing(capm, 0.14, euclidian).output("capm.3", "capm.3 : min. m2 enclosure of capm : 0.14um")
+capm.enclosing(via2, 0.14, euclidian).output("capm.4", "capm.4 : min. capm enclosure of via2 : 0.14um")
+capm.separation(via2, 0.14, euclidian).output("capm.5", "capm.5 : min. capm spacing to via2 : 0.14um")
+capm.sized(-20.0).sized(20.0).output("capm.6", "capm.6 : max. capm lenght/width : 20um")
+capm.with_angle(0 .. 90).output("capm.7", "capm.7 : capm not rectangle")
+capm.separation(via, 0.14, euclidian).polygons.without_area(0).output("capm.8", "capm.8 : min. capm spacing to via : 0.14um")
+capm.and(nwell).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle nwell")
+capm.and(diff).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle diff")
+capm.and(tap).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle tap")
+capm.and(poly).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle poly")
+capm.and(li).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle li")
+capm.and(m1).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle m1")
+capm.separation(m2.not_interacting(capm), 0.14, euclidian).output("capm.11", "capm.11 : min. capm spacing to m2 not overlapping capm : 0.5um")
+
+end #FEOL
+
+if BEOL
+info("BEOL section")
+
+# li
+not_in_cell5 = source.select("-s8rf2_xcmvpp_hd5_*")
+not_in_cell5_li = not_in_cell5.polygons(li_wildcard)
+not_in_cell5_li.width(0.17, euclidian).output("li.1", "li.1 : min. li width : 0.17um")
+
+in_cell5_li = li - not_in_cell5_li
+in_cell5_li.width(0.14, euclidian).output("li.1a", "li.1a : min. li width for the cells s8rf2_xcmvpp_hd5_* : 0.14um")
+
+# rule li.2 not coded
+
+not_in_cell5_li.space(0.17, euclidian).output("li.3", "li.3 : min. li spacing : 0.17um")
+in_cell5_li.space(0.14, euclidian).output("li.3a", "li.3a : min. li spacing for the cells s8rf2_xcmvpp_hd5_* : 0.14um")
+licon08 = licon.interacting(li.enclosing(licon, 0.08, euclidian).polygons)
+licon_edges_with_less_enclosure_li = li.enclosing(licon, 0.08, projection).second_edges
+opposite3 = (licon.edges - licon_edges_with_less_enclosure_li).width(0.17 + 1.dbu, projection).polygons
+licon08.not_interacting(opposite3).output("li.5", "li.5 : min. li enclosure of licon of 2 opposite edges : 0.08um")
+li.with_area(0..0.0561).output("li.6", "li.6 : min. li area : 0.0561um²")
+
+# ct
+mcon.edges.without_length(0.17).output("ct.1", "ct.1 : minimum/maximum width of mcon : 0.17um")
+mcon.space(0.19, euclidian).output("ct.2", "ct.2 : min. mcon spacing : 0.19um")
+# rule ct.3 not coded
+mcon.not(li).output("ct.4", "ct.4 : mcon should covered by li")
+if backend_flow = CU
+ li.interacting(li.and(m1).not(mcon).with_holes(1,10)).enclosing(mcon, 0.2, euclidian).output("ct.irdrop.1", "ct.irdrop.1 : min. li enclsoure of 1..10 mcon : 0.2um")
+ li.interacting(li.and(m1).not(mcon).with_holes(11,100)).enclosing(mcon, 0.3, euclidian).output("ct.irdrop.2", "ct.irdrop.2 : min. li enclsoure of 11..100 mcon : 0.3um")
+end
+
+# m1
+m1.width(0.14, euclidian).output("m1.1", "m1.1 : min. m1 width : 0.14um")
+
+huge_m1 = m1.sized(-1.5).sized(1.5)
+non_huge_m1 = m1 - huge_m1
+
+non_huge_m1.space(0.14, euclidian).output("m1.2", "m1.2 : min. m1 spacing : 0.14um")
+
+(huge_m1.separation(non_huge_m1, 0.28, euclidian) + huge_m1.space(0.28, euclidian)).output("m1.3ab", "m1.3ab : min. 3um.m1 spacing m1 : 0.28um")
+
+not_in_cell6 = layout(source.cell_obj).select("-s8cell_ee_plus_sseln_a", "-s8cell_ee_plus_sseln_b", "-s8cell_ee_plus_sselp_a", "-s8cell_ee_plus_sselp_b", "-s8fpls_pl8", "-s8fs_cmux4_fm")
+not_in_cell6_m1 = not_in_cell6.input(m1_wildcard)
+not_in_cell6_m1.enclosing(mcon, 0.03, euclidian).output("m1.4", "m1.4 : min. m1 enclosure of mcon : 0.03um")
+in_cell6 = layout(source.cell_obj).select("+s8cell_ee_plus_sseln_a", "+s8cell_ee_plus_sseln_b", "+s8cell_ee_plus_sselp_a", "+s8cell_ee_plus_sselp_b", "+s8fpls_pl8", "+s8fs_cmux4_fm")
+in_cell6_m1 = in_cell6.input(m1_wildcard)
+in_cell6_m1.enclosing(mcon, 0.005, euclidian).output("m1.4a", "m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um")
+m1.with_area(0..0.083).output("m1.6", "m1.6 : min. m1 area : 0.083um²")
+m1.holes.with_area(0..0.14).output("m1.7", "m1.7 : min. m1 holes area : 0.14um²")
+if backend_flow = AL
+ mcon06 = mcon.interacting(poly.enclosing(m1, 0.06, euclidian).polygons)
+ mcon_edges_with_less_enclosure_m1 = m1.enclosing(mcon, 0.06, projection).second_edges
+ opposite4 = (mcon.edges - mcon_edges_with_less_enclosure_m1).width(0.17 + 1.dbu, projection).polygons
+ mcon06.not_interacting(opposite4).output("m1.5", "m1.5 : min. m1 enclosure of mcon of 2 opposite edges : 0.06um")
+ # rule m1.pd.1, rule m1.pd.2a, rule m1.pd.2b not coded
+end
+if bakend_flow = CU
+ m1.sized(-2.0).sized(2.0).output("m1.11", "m1.11 : max. m1 width after slotting : 4.0um")
+ # rule m1.12 not coded because inconsistent with m1.11
+ # rule m1.13, m1.14, m1.14a not coded : see : https://www.klayout.de/forum/discussion/comment/6759
+end
+
+# via
+#rule via.3 not coded
+via.not(m1).output("via.4c.5c", "via.4c.5c : m1 must enclose all via")
+if backend_flow = AL
+ via.not(areaid_mt).edges.without_length(0.15).output("via.1a", "via.1a : minimum/maximum width of via : 0.15um")
+ via.and(areaid_mt).not_interacting((via.and(areaid_mt).edges.without_length(0.15)).or(via.and(areaid_mt).edges.without_length(0.23)).or(via.and(areaid_mt).edges.without_length(0.28))).output("via.1b", "via.1b : minimum/maximum width of via in areaid.mt: 0.15um or 0.23um or 0.28um")
+ via.isolated(0.17, euclidian).output("via.2", "via.2 : min. via spacing : 0.17um")
+ m1.enclosing(via.not_interacting(via.edges.without_length(0.15)), 0.055, euclidian).output("via.4a", "via.4a : min. m1 enclosure of 0.15um via : 0.055um")
+ m1.enclosing(via.not_interacting(via.edges.without_length(0.23)), 0.03, euclidian).output("via.4b", "via.4b : min. m1 enclosure of 0.23um via : 0.03um")
+ via1_edges_with_less_enclosure_m1 = m1.enclosing(via.not_interacting(via.edges.without_length(0.15)), 0.085, projection).second_edges
+ opposite5 = (via.not_interacting(via.edges.without_length(0.15)).edges - via1_edges_with_less_enclosure_m1).width(0.15 + 1.dbu, projection).polygons
+ via.not_interacting(via.edges.without_length(0.15)).not_interacting(opposite5).output("via1.5a", "via1.5a : min. m1 enclosure of 0.15um via of 2 opposite edges : 0.085um")
+ via2_edges_with_less_enclosure_m1 = m1.enclosing(via.not_interacting(via.edges.without_length(0.23)), 0.06, projection).second_edges
+ opposite6 = (via.not_interacting(via.edges.without_length(0.23)).edges - via2_edges_with_less_enclosure_m1).width(0.23 + 1.dbu, projection).polygons
+ via.not_interacting(via.edges.without_length(0.23)).not_interacting(opposite6).output("via1.5b", "via1.5b : min. m1 enclosure of 0.23um via of 2 opposite edges : 0.06um")
+end
+if backend_flow = CU
+ via.not(areaid_mt).edges.without_length(0.18).output("via.11", "via.11 : minimum/maximum width of via : 0.18um")
+ via.isolated(0.13, euclidian).output("via.12", "via.12 : min. via spacing : 0.13um")
+ # rule via.13 not coded because not understandable
+ via1_edges_with_less_enclosure_m1 = m1.enclosing(via, 0.04, projection).second_edges
+ opposite5 = (via.edges - via1_edges_with_less_enclosure_m1).width(0.18 + 1.dbu, projection).polygons
+ via.not_interacting(opposite5).output("via1.14", "via1.14 : min. m1 enclosure of 0.04um via of 2 opposite edges : 0.04um")
+ # rules via.irdrop.1, via.irdrop.2, via.irdrop.3, via.irdrop.4 not coded because not understandable
+end
+
+# m2
+m2.width(0.14, euclidian).output("m2.1", "m2.1 : min. m2 width : 0.14um")
+
+huge_m2 = m2.sized(-1.5).sized(1.5)
+non_huge_m2 = m2 - huge_m2
+
+non_huge_m2.space(0.14, euclidian).output("m2.2", "m2.2 : min. m2 spacing : 0.14um")
+
+(huge_m2.separation(non_huge_m2, 0.28, euclidian) + huge_m2.space(0.28, euclidian)).output("m2.3ab", "m2.3ab : min. 3um.m2 spacing m2 : 0.28um")
+
+# rule m2.3c not coded
+m2.with_area(0..0.0676).output("m2.6", "m2.6 : min. m2 area : 0.0676um²")
+m2.holes.with_area(0..0.14).output("m2.7", "m2.7 : min. m2 holes area : 0.14um²")
+via.not(m2).output("m2.via", "m2.via : m2 must enclose via")
+if backend_flow = AL
+ m2.enclosing(via, 0.055, euclidian).output("m2.4", "m2.4 : min. m2 enclosure of via : 0.055um")
+ via_edges_with_less_enclosure_m2 = m2.enclosing(via, 0.085, projection).second_edges
+ opposite7 = (via.edges - via_edges_with_less_enclosure_m2).width(0.2 + 1.dbu, projection).polygons
+ via.not_interacting(opposite7).output("m2.5", "m2.5 : min. m2 enclosure of via of 2 opposite edges : 0.085um")
+ # rule m2.pd.1, rule m2.pd.2a, rule m2.pd.2b not coded
+end
+if bakend_flow = CU
+ m2.sized(-2.0).sized(2.0).output("m2.11", "m2.11 : max. m2 width after slotting : 4.0um")
+ # rule m2.12 not coded because inconsistent with m2.11
+ # rule m2.13, m2.14, m2.14a not coded : see : https://www.klayout.de/forum/discussion/comment/6759
+end
+
+# via2
+#rule via233 not coded
+via2.not(m2).output("via2", "via2 : m2 must enclose all via2")
+if backend_flow = AL
+ via2.not(areaid_mt).edges.without_length(0.2).output("via2.1a", "via2.1a : minimum/maximum width of via2 : 0.2um")
+ via2.and(areaid_mt).not_interacting((via2.and(areaid_mt).edges.without_length(0.2)).or(via2.and(areaid_mt).edges.without_length(1.2)).or(via2.and(areaid_mt).edges.without_length(1.5))).output("via2.1b", "via2.1b : minimum/maximum width of via2 in areaid.mt: 0.2um or 1.2um or 1.5um")
+ via2.isolated(0.2, euclidian).output("via2.2", "via2.2 : min. via2 spacing : 0.2um")
+ m2.enclosing(via2, 0.04, euclidian).output("via2.4", "via2.4 : min. m2 enclosure of via2 : 0.04um")
+ m2.enclosing(via2.not_interacting(via2.edges.without_length(1.5)), 0.14, euclidian).output("via2.4a", "via2.4a : min. m2 enclosure of 1.5um via2 : 0.14um")
+ via2_edges_with_less_enclosure_m2 = m2.enclosing(via2, 0.085, projection).second_edges
+ opposite8 = (via2.edges - via2_edges_with_less_enclosure_m2).width(0.2 + 1.dbu, projection).polygons
+ via2.not_interacting(opposite8).output("via2.5", "via2.5 : min. m2 enclosure of via2 of 2 opposite edges : 0.085um")
+end
+if backend_flow = CU
+ via2.edges.without_length(0.21).output("via2.11", "via2.11 : minimum/maximum width of via2 : 0.21um")
+ via2.isolated(0.18, euclidian).output("via2.12", "via2.12 : min. via2 spacing : 0.18um")
+ # rule via2.13 not coded because not understandable, or not clear
+ m2.enclosing(via2, 0.035, euclidian).output("via2.14", "via2.14 : min. m2 enclosure of via2 : 0.035um")
+ # rules via2.irdrop.1, via2.irdrop.2, via2.irdrop.3, via2.irdrop.4 not coded because not understandable
+end
+
+# m3
+m3.width(0.3, euclidian).output("m3.1", "m3.1 : min. m3 width : 0.3um")
+
+huge_m3 = m3.sized(-1.5).sized(1.5)
+non_huge_m3 = m3 - huge_m3
+
+non_huge_m3.space(0.3, euclidian).output("m3.2", "m3.2 : min. m3 spacing : 0.3um")
+
+(huge_m3.separation(non_huge_m3, 0.4, euclidian) + huge_m3.space(0.4, euclidian)).output("m3.3ab", "m3.3ab : min. 3um.m3 spacing m3 : 0.4um")
+
+# rule m3.3c not coded
+m3.with_area(0..0.24).output("m3.6", "m3.6 : min. m3 area : 0.24um²")
+via2.not(m3).output("m3.via2", "m3.via2 : m3 must enclose via2")
+if backend_flow = AL
+ m3.enclosing(via2, 0.065, euclidian).output("m3.4", "m3.4 : min. m3 enclosure of via2 : 0.065um")
+ via2_edges_with_less_enclosure_m3 = m3.enclosing(via2, 0.085, projection).second_edges
+ # m3.5 N/A
+ # opposite9 = (via2.edges - via2_edges_with_less_enclosure_m3).width(0.3 + 1.dbu, projection).polygons
+ # via2.not_interacting(opposite9).output("m3.5", "m3.5 : min. m3 enclosure of via2 of 2 opposite edges : 0.085um")
+ # rule m3.pd.1, rule m3.pd.2a, rule m3.pd.2b not coded
+end
+if bakend_flow = CU
+ m3.holes.with_area(0..0.2).output("m3.7", "m3.7 : min. m3 holes area : 0.2um²")
+ m3.sized(-2.0).sized(2.0).output("m3.11", "m3.11 : max. m3 width after slotting : 4.0um")
+ # rule m3.12 not coded because inconsistent with m3.11
+ # rule m3.13, m3.14, m3.14a not coded : see : https://www.klayout.de/forum/discussion/comment/6759
+end
+
+# via3
+#rule via3.3 not coded
+via3.not(m3).output("via3", "via3 : m3 must enclose all via3")
+if backend_flow = AL
+ via3.not(areaid_mt).edges.without_length(0.2).output("via3.1a", "via3.1a : minimum/maximum width of via3 : 0.2um")
+ via3.and(areaid_mt).not_interacting((via3.and(areaid_mt).edges.without_length(0.2)).or(via3.and(areaid_mt).edges.without_length(0.8))).output("via3.1a", "via3.1a : minimum/maximum width of via3 in areaid.mt: 0.2um or 0.8um")
+ via3.isolated(0.2, euclidian).output("via3.2", "via3.2 : min. via3 spacing : 0.2um")
+ m3.enclosing(via3, 0.06, euclidian).output("via3.4", "via3.4 : min. m3 enclosure of via3 : 0.06um")
+ via3_edges_with_less_enclosure_m3 = m3.enclosing(via3, 0.09, projection).second_edges
+ opposite10 = (via3.edges - via3_edges_with_less_enclosure_m3).width(0.2 + 1.dbu, projection).polygons
+ via3.not_interacting(opposite10).output("via3.5", "via3.5 : min. m2 enclosure of via3 of 2 opposite edges : 0.09um")
+end
+if backend_flow = CU
+ via3.edges.without_length(0.21).output("via3.11", "via3.11 : minimum/maximum width of via3 : 0.21um")
+ via3.isolated(0.18, euclidian).output("via3.12", "via3.12 : min. via3 spacing : 0.18um")
+ m3.enclosing(via3, 0.055, euclidian).output("via3.13", "via3.13 : min. m3 enclosure of via3 : 0.055um")
+ # rule via3.14 not coded because not understandable, or not clear
+ # rules via3.irdrop.1, via3.irdrop.2, via3.irdrop.3, via3.irdrop.4 not coded because not understandable
+end
+
+# m4
+m4.width(0.3, euclidian).output("m4.1", "m4.1 : min. m4 width : 0.3um")
+
+huge_m4 = m4.sized(-1.5).sized(1.5)
+non_huge_m4 = m4 - huge_m4
+
+non_huge_m4.space(0.3, euclidian).output("m4.2", "m4.2 : min. m4 spacing : 0.3um")
+
+(huge_m4.separation(non_huge_m4, 0.4, euclidian) + huge_m4.space(0.4, euclidian)).output("m4.5ab", "m4.5ab : min. 3um.m4 spacing m4 : 0.4um")
+
+m4.with_area(0..0.24).output("m4.4", "m4.4 : min. m4 area : 0.24um²")
+via3.not(m4).output("m4.via3", "m4.via3 : m4 must enclose via3")
+if backend_flow = AL
+ m4.enclosing(via3, 0.065, euclidian).output("m4.3", "m4.3 : min. m4 enclosure of via3 : 0.065um")
+ # m4.5 doesn't exist
+ # via3_edges_with_less_enclosure_m4 = m4.enclosing(via2, 0.085, projection).second_edges
+ # opposite9 = (via3.edges - via3_edges_with_less_enclosure_m4).width(0.3 + 1.dbu, projection).polygons
+ # via3.not_interacting(opposite9).output("m4.5", "m4.5 : min. m4 enclosure of via3 of 2 opposite edges : 0.085um")
+ # rule m4.pd.1, rule m4.pd.2a, rule m4.pd.2b not coded
+end
+if bakend_flow = CU
+ m4.holes.with_area(0..0.2).output("m4.7", "m4.7 : min. m4 holes area : 0.2um²")
+ m4.sized(-5.0).sized(5.0).output("m4.11", "m4.11 : max. m4 width after slotting : 10.0um")
+ # rule m4.12 not coded because inconsistent with m4.11
+ # rule m4.13, m4.14, m4.14a not coded : see : https://www.klayout.de/forum/discussion/comment/6759
+ m4.enclosing(via3, 0.06, euclidian).output("m4.15", "m4.15 : min. m4 enclosure of via3 : 0.06um")
+end
+
+# via4
+via4.edges.without_length(0.8).output("via4.1a", "via4.1a : minimum/maximum width of via4 : 0.8um")
+via4.isolated(0.8, euclidian).output("via4.2", "via4.2 : min. via4 spacing : 0.8um")
+#rule via4.3 not coded
+m4.enclosing(via4, 0.19, euclidian).output("via4.4", "via4.4 : min. m4 enclosure of via4 : 0.19um")
+via4.not(m4).output("via4", "via4 : m4 must enclose all via4")
+if backend_flow = CU
+ # rules via4.irdrop.1, via4.irdrop.2, via4.irdrop.3, via4.irdrop.4 not coded because not understandable
+end
+
+# m5
+m5.width(1.6, euclidian).output("m5.1", "m5.1 : min. m5 width : 1.6um")
+
+m5.space(1.6, euclidian).output("m5.2", "m5.2 : min. m5 spacing : 1.6um")
+
+via4.not(m5).output("m5.via4", "m5.via4 : m5 must enclose via4")
+m5.enclosing(via4, 0.31, euclidian).output("m5.3", "m4.3 : min. m5 enclosure of via4 : 0.31um")
+
+# nsm
+nsm.width(3.0, euclidian).output("nsm.1", "nsm.1 : min. nsm width : 3.0um")
+nsm.isolated(4.0, euclidian).output("nsm.2", "nsm.2 : min. nsm spacing : 4.0um")
+nsm.enclosing(diff, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of diff : 3.0um")
+nsm.enclosing(tap, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of tap : 3.0um")
+nsm.enclosing(poly, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of poly : 3.0um")
+nsm.enclosing(li, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of li : 3.0um")
+nsm.enclosing(m1, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of m1 : 3.0um")
+nsm.enclosing(m2, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of m2 : 3.0um")
+nsm.enclosing(m3, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of m3 : 3.0um")
+nsm.enclosing(m4, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of m4 : 3.0um")
+nsm.enclosing(m5, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of m5 : 3.0um")
+nsm.enclosing(cfom, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of cfom : 3.0um")
+if backend_flow = AL
+ nsm.separation(diff, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to diff : 1.0um")
+ nsm.separation(tap, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to tap : 1.0um")
+ nsm.separation(poly, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to poly : 1.0um")
+ nsm.separation(li, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to li : 1.0um")
+ nsm.separation(m1, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to m1 : 1.0um")
+ nsm.separation(m2, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to m2 : 1.0um")
+ nsm.separation(m3, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to m3 : 1.0um")
+ nsm.separation(m4, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to m4 : 1.0um")
+ nsm.separation(m5, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to m5 : 1.0um")
+ nsm.separation(cfom, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to cfom : 1.0um")
+end
+
+# pad
+pad.isolated(1.27, euclidian).output("pad.2", "pad.2 : min. pad spacing : 1.27um")
+
+end #BEOL
+
+if FEOL
+info("FEOL section")
+
+# mf
+mf.not_interacting(mf.edges.without_length(0.8)).output("mf.1", "mf.1 : minimum/maximum width of fuse : 0.8um")
+mf.not_interacting(mf.edges.without_length(7.2)).output("mf.2", "mf.2 : minimum/maximum length of fuse : 7.2um")
+mf.isolated(1.96, euclidian).output("mf.3", "mf.3 : min. fuse center spacing : 2.76um")
+# fuses need more clarification on fuse_shield, fuse layers ...
+
+# hvi
+hvi.width(0.6, euclidian).output("hvi.1", "hvi.1 : min. hvi width : 0.6um")
+hvi.isolated(0.7, euclidian).output("hvi.2", "hvi.2 : min. hvi spacing, merge if less : 0.7um")
+hvi.and(tunm).output("hvi.4", "hvi.4 : hvi must not overlapp tunm")
+hvi.and(nwell).separation(nwell, 2.0, euclidian).output("hvnwell.8", "hvnwelli.8 : min. hvnwel spacing to nwell : 2.0")
+areaid_hl.not(hvi).output("hvnwel.9", "hvnwell.9 : hvi must overlapp hvnwell")
+# rule hvnell.10 not coded
+diff.not(psdm.and(diff_rs)).and(hvi).width(0.29, euclidian).output("hvdifftap.14", "hvdifftap.14 : min. diff inside hvi width : 0.29um")
+diff.and(psdm.and(diff_rs)).and(hvi).width(0.15, euclidian).output("hvdifftap.14a", "hvdifftap.14a : min. p+diff resistor inside hvi width : 0.15um")
+diff.and(hvi).isolated(0.3, euclidian).output("hvdifftap.15a", "hvdifftap.15a : min. diff inside hvi spacing : 0.3um")
+diff.and(hvi).and(nsdm).separation(diff.and(hvi).and(psdm), 0.37, euclidian).polygons.without_area(0).output("hvdifftap.15b", "hvdifftap.15b : min. n+diff inside hvi spacing to p+diff inside hvi except abutting: 0.37um")
+tap.and(hvi).edges.and(diff).without_length(0.7).output("hvdifftap.16", "hvdifftap.16 : min. tap inside hvi abuttng diff : 0.7um")
+hvi.and(nwell).enclosing(diff, 0.33, euclidian).output("hvdifftap.17", "hvdifftap.17 : min. hvnwell enclosure of p+diff : 0.33um")
+hvi.and(nwell).separation(diff, 0.43, euclidian).output("hvdifftap.18", "hvdifftap.18 : min. hvnwell spacing to n+diff : 0.43um")
+hvi.and(nwell).enclosing(tap, 0.33, euclidian).output("hvdifftap.19", "hvdifftap.19 : min. hvnwell enclosure of n+tap : 0.33um")
+hvi.and(nwell).separation(tap, 0.43, euclidian).output("hvdifftap.20", "hvdifftap.20 : min. hvnwell spacing to p+tap : 0.43um")
+hvi.and(diff).edges.not(diff.edges).output("hvdifftap.21", "hvdifftap.21 : diff must not straddle hvi")
+hvi.and(tap).edges.not(tap.edges).output("hvdifftap.21", "hvdifftap.21 : tap must not straddle hvi")
+hvi.enclosing(difftap, 0.18, euclidian).output("hvdifftap.22", "hvdifftap.22 : min. hvi enclosure of diff or tap : 0.18um")
+hvi.separation(difftap, 0.18, euclidian).output("hvdifftap.23", "hvdifftap.23 : min. hvi spacing to diff or tap : 0.18um")
+hvi.and(diff).not(nwell).separation(nwell, 0.43, euclidian).output("hvdifftap.24", "hvdifftap.24 : min. hv n+diff spacing to nwell : 0.43um")
+diff.and(hvi).not(nwell).isolated(1.07, euclidian).polygons.and(tap).output("hvdifftap.25", "hvdifftap.25 : min. n+diff inside hvi spacing accros p+tap : 1.07um")
+diff.not(poly).edges.and(gate.and(hvi).edges).space(0.35, euclidian).output("hvpoly.13", "hvpoly.13: min. hvi gate length : 0.5um")
+hvi.and(poly).edges.not(poly.edges).output("hvpoly.14", "hvpoly.14 : poly must not straddle hvi")
+
+# hvntm
+hvntm.width(0.7, euclidian).output("hvntm.1", "hvntm.1 : min. hvntm width : 0.7um")
+hvntm.isolated(0.7, euclidian).output("hvntm.2", "hvntm.2 : min. hvntm spacing : 0.7um")
+hvntm.enclosing(diff.and(nwell).and(hvi), 0.185, euclidian).output("hvntm.3", "hvntm.3 : min. hvntm enclosure of hv n+diff : 0.185um")
+hvntm.separation(diff.not(nwell).not(hvi), 0.185, euclidian).output("hvntm.4", "hvntm.4 : min. hvntm spacing to n+diff : 0.185um")
+hvntm.separation(diff.and(nwell).not(hvi), 0.185, euclidian).output("hvntm.5", "hvntm.5 : min. hvntm spacing to p+diff : 0.185um")
+hvntm.separation(tap.not(nwell).not(hvi), 0.185, euclidian).polygons.without_area(0).output("hvntm.6a", "hvntm.6a : min. hvntm spacing to p+tap : 0.185um")
+hvntm.and(areaid_ce).output("hvntm.9", "hvntm.9 : hvntm must not overlapp areaid.ce")
+
+# denmos
+poly.not_interacting(pwde).interacting(areaid_en).width(1.055, projection).output("denmos.1", "denmos.1 : min. de_nfet gate width : 1.055um")
+diff.not_interacting(pwde).enclosing(poly.interacting(areaid_en), 0.28, projection).polygons.without_area(0).output("denmos.2", "denmos.2 : min. de_nfet source ouside poly width : 0.28um")
+diff.not_interacting(pwde).and(poly.interacting(areaid_en)).width(0.925, projection).output("denmos.3", "denmos.3 : min. de_nfet source inside poly width : 0.925um")
+diff.not_interacting(pwde).interacting(areaid_en).not_interacting(poly).width(0.17, euclidian).output("denmos.4", "denmos.4 : min. de_nfet drain width : 0.17um")
+nwell.not_interacting(pwde).and(poly.interacting(areaid_en)).width(0.225, projection).polygons.or(nwell.and(poly.interacting(areaid_en)).sized(-0.1125).sized(0.1125)).output("denmos.5", "denmos.5 : min. de_nfet source inside nwell width : 0.225m")
+diff.not_interacting(pwde).interacting(areaid_en).not_interacting(poly).separation(diff.interacting(poly.interacting(areaid_en)), 1.585, projection).output("denmos.6", "denmos.6 : min. de_nfet source spacing to drain : 1.585um")
+nwell.not_interacting(pwde).and(poly.and(diff).interacting(areaid_en)).edges.without_length(5.0, nil).output("denmos.7", "denmos.7 : min. de_nfet channel width : 5.0um")
+diff.not_interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.without_angle(45).without_angle(135).without_angle(225).without_angle(315).output("denmos.8", "denmos.8 : 90deg. not allowed for de_nfet drain")
+nwell.not_interacting(pwde).interacting(areaid_en).edges.without_angle(45).without_angle(135).without_angle(225).without_angle(315).output("denmos.9a", "denmos.9a : 90deg. not allowed for de_nfet nwell")
+nwell.not_interacting(pwde).interacting(areaid_en).edges.with_angle(45).without_length(0.607..0.609).output("denmos.9a", "denmos.9a : 45deg. bevels of de_nfet nwell should be 0.43um from corners")
+nwell.not_interacting(pwde).interacting(areaid_en).edges.with_angle(135).without_length(0.607..0.609).output("denmos.9a", "denmos.9a : 45deg. bevels of de_nfet nwell should be 0.43um from corners")
+diff.not_interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.with_angle(45).without_length(0.7..0.71).output("denmos.9b", "denmos.9b : 45deg. bevels of de_nfet drain should be 0.05um from corners")
+diff.not_interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.with_angle(135).without_length(0.7..0.71).output("denmos.9b", "denmos.9b : 45deg. bevels of de_nfet drain should be 0.05um from corners")
+nwell.not_interacting(pwde).enclosing(diff.interacting(areaid_en).not_interacting(poly), 0.66, euclidian).output("denmos.10", "denmos.10 : min. nwell enclosure of de_nfet drain : 0.66um")
+nwell.not_interacting(pwde).interacting(areaid_en).separation(tap.not(nwell), 0.86, euclidian).output("denmos.11", "denmos.11 : min. de_nfet nwell spacing to tap : 0.86um")
+nwell.not_interacting(pwde).interacting(areaid_en).isolated(2.4, euclidian).output("denmos.12", "denmos.12 : min. de_nfet nwell : 2.4um")
+nsdm.not_interacting(pwde).enclosing(diff.interacting(areaid_en).interacting(poly), 0.13, euclidian).output("denmos.13", "denmos.13 : min. nsdm enclosure of de_nfet source : 0.13um")
+
+# depmos
+poly.interacting(pwde).interacting(areaid_en).width(1.05, projection).output("depmos.1", "depmos.1 : min. de_pfet gate width : 1.05um")
+diff.interacting(pwde).enclosing(poly.interacting(areaid_en), 0.28, projection).polygons.without_area(0).output("depmos.2", "depmos.2 : min. de_pfet source ouside poly width : 0.28um")
+diff.interacting(pwde).and(poly.interacting(areaid_en)).width(0.92, projection).output("depmos.3", "depmos.3 : min. de_pfet source inside poly width : 0.92um")
+diff.interacting(pwde).interacting(areaid_en).not_interacting(poly).width(0.17, euclidian).output("depmos.4", "depmos.4 : min. de_pfet drain width : 0.17um")
+pwde.not(nwell).and(poly.interacting(areaid_en)).width(0.26, projection).polygons.or(pwde.not(nwell).and(poly.interacting(areaid_en)).sized(-0.13).sized(0.13)).output("depmos.5", "depmos.5 : min. de_pfet source inside nwell width : 0.26m")
+diff.interacting(pwde).interacting(areaid_en).not_interacting(poly).separation(diff.interacting(poly.interacting(areaid_en)), 1.19, projection).output("depmos.6", "depmos.6 : min. de_pfet source spacing to drain : 1.19um")
+nwell.interacting(pwde).and(poly.and(diff).interacting(areaid_en)).edges.without_length(5.0, nil).output("depmos.7", "depmos.7 : min. de_pfet channel width : 5.0um")
+diff.interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.without_angle(45).without_angle(135).without_angle(225).without_angle(315).output("depmos.8", "depmos.8 : 90deg. not allowed for de_pfet drain")
+pwde.not(nwell).interacting(areaid_en).edges.without_angle(45).without_angle(135).without_angle(225).without_angle(315).output("depmos.9a", "depmos.9a : 90deg. not allowed for de_pfet pwell")
+pwde.not(nwell).interacting(areaid_en).edges.with_angle(45).without_length(0.607..0.609).output("depmos.9a", "depmos.9a : 45deg. bevels of de_pfet pwell should be 0.43um from corners")
+pwde.not(nwell).interacting(areaid_en).edges.with_angle(135).without_length(0.607..0.609).output("depmos.9a", "depmos.9a : 45deg. bevels of de_pfet pwell should be 0.43um from corners")
+diff.interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.with_angle(45).without_length(0.7..0.71).output("depmos.9b", "depmos.9b : 45deg. bevels of de_pfet drain should be 0.05um from corners")
+diff.interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.with_angle(135).without_length(0.7..0.71).output("depmos.9b", "depmos.9b : 45deg. bevels of de_pfet drain should be 0.05um from corners")
+nwell.interacting(pwde).separation(diff.interacting(areaid_en).not_interacting(poly), 0.86, euclidian).output("depmos.10", "depmos.10 : min. pwell enclosure of de_pfet drain : 0.86um")
+pwde.not(nwell).interacting(areaid_en).separation(tap.and(nwell), 0.66, euclidian).output("depmos.11", "depmos.11 : min. de_pfet pwell spacing to tap : 0.66um")
+psdm.interacting(pwde).enclosing(diff.interacting(areaid_en).interacting(poly), 0.13, euclidian).output("depmos.12", "depmos.12 : min. psdm enclosure of de_pfet source : 0.13um")
+
+# extd
+areaid_en.and(difftap).edges.not(difftap.edges).output("extd.1", "extd.1 : difftap must not straddle areaid.en")
+difftap.interacting(areaid_en).not(poly).with_area(0).output("extd.2", "extd.2 : poly must not overlapp entirely difftap in areaid.en")
+# rules extd.4, extd.5, extd.6, extd.7 not coded because specific to some cells
+
+# vhvi
+# rules vhvi.vhv.1, vhvi.vhv.2, vhvi.vhv.3, vhvi.vhv.4, vhvi.vhv.5, vhvi.vhv.6 not coded
+vhvi.width(0.02, euclidian).output("vhvi.1", "vhvi.1 : min. vhvi width : 0.02um")
+vhvi.and(areaid_ce).output("vhvi.2", "vhvi.2 : vhvi must not overlap areaid.ce")
+vhvi.and(hvi).output("vhvi.3", "vhvi.3 : vhvi must not overlap hvi")
+# rules vhvi.4, vhvi.6 not coded
+vhvi.and(diff).edges.not(diff.edges).output("vhvi.5", "vhvi.5 : vhvi must not straddle diff")
+vhvi.and(tap).edges.not(tap.edges).output("vhvi.5", "vhvi.5 : vhvi must not straddle tap")
+vhvi.and(poly).edges.not(poly.edges).output("vhvi.7", "vhvi.7 : vhvi must not straddle poly")
+
+nwell.and(vhvi).separation(nwell, 2.5, euclidian).output("hv.nwell.1", "hv.nwell.1 : min. vhvi nwell spacing to nwell : 2.5um")
+diff.and(vhvi).isolated(0.3, euclidian).output("hv.diff.1", "hv.diff.1 : min. vhvi diff spacing : 0.3um")
+nwell.interacting(diff.and(vhvi)).separation(diff.not(nwell), 0.43, euclidian).output("hv.diff.2", "hv.diff.2 : min. vhvi nwell spacing n+diff : 0.43um")
+diff.and(vhvi).not(nwell).separation(nwell, 0.55, euclidian).output("hv.diff.3a", "hv.diff.3a : min. vhvi n+diff spacing nwell : 0.55um")
+# rule hv.diff.3b not coded
+poly.and(vhvi).not(diff).separation(diff, 0.3, euclidian).polygons.without_area(0).output("hv.poly.2", "hv.poly.2 : min. vhvi poly spacing to diff : 0.3um")
+poly.and(vhvi).not(diff).separation(nwell, 0.55, euclidian).polygons.without_area(0).output("hv.poly.3", "hv.poly.3 : min. vhvi poly spacing to nwell : 0.55um")
+nwell.enclosing(poly.and(vhvi).not(diff), 0.3, euclidian).polygons.without_area(0).output("hv.poly.4", "hv.poly.4 : min. nwell enclosure of vhvi poly : 0.3um")
+#poly.and(vhvi).enclosing(diff.interacting(areaid_en), 0.16, projection).polygons.without_area(0).output("hv.poly.6", "hv.poly.6 : min. poly enclosure of hvfet gate : 0.16um")
+# rule hv.poly.7 not coded
+
+# uhvi
+uhvi.and(diff).edges.not(diff.edges).output("uhvi.1", "uhvi.1 : diff must not straddle uhvi")
+uhvi.and(tap).edges.not(tap.edges).output("uhvi.1", "uhvi.1 : tap must not straddle uhvi")
+uhvi.and(poly).edges.not(poly.edges).output("uhvi.2", "uhvi.2 : poly must not straddle uhvi")
+pwbm.not(uhvi).output("uhvi.3", "uhvi.3 : uhvi must not enclose pwbm")
+uhvi.and(dnwell).edges.not(dnwell.edges).output("uhvi.4", "uhvi.4 : dnwell must not straddle uhvi")
+areaid_en20.not(uhvi).output("uhvi.5", "uhvi.5 : uhvi must not enclose areaid.en20")
+#dnwell.not(uhvi).output("uhvi.6", "uhvi.6 : uhvi must not enclose dnwell")
+natfet.not(uhvi).output("uhvi.7", "uhvi.7 : uhvi must not enclose natfet")
+
+# pwell_res
+pwell_rs.width(2.65).output("pwres.2", "pwres.2 : min. pwell resistor width : 2.65um")
+pwell_rs.sized(-2.65).sized(2.65).output("pwres.2", "pwres.2 : max. pwell resistor width : 2.65um")
+pwell_rs.interacting(pwell_rs.edges.with_length(2.651,26.499)).output("pwres.3", "pwres.3 : min. pwell resistor length : 26.5um")
+pwell_rs.interacting(pwell_rs.edges.with_length(265.0, nil)).output("pwres.4", "pwres.4 : max. pwell resistor length : 265um")
+tap.interacting(pwell_rs).separation(nwell, 0.22, euclidian).output("pwres.5", "pwres.5 : min. pwell resistor tap spacing to nwell : 0.22um")
+tap.interacting(pwell_rs).and(tap.sized(0.22).and(nwell)).output("pwres.5", "pwres.5 : max. pwell resistor tap spacing to nwell : 0.22um")
+tap.interacting(pwell_rs).width(0.53).output("pwres.6", "pwres.6 : min. width of tap inside pwell resistor : 0.53um")
+tap.interacting(pwell_rs).sized(-0.265).sized(0.265).output("pwres.6", "pwres.6 : max. width of tap inside pwell resistor : 0.53um")
+# rules pwres.7a, pwres.7b not coded
+pwell_rs.and(diff).output("pwres.8", "pwres.8 : diff not allowed inside pwell resistor")
+pwell_rs.and(poly).output("pwres.8", "pwres.8 : poly not allowed inside pwell resistor")
+# rules pwres.9, pwres.10 not coded
+
+# rf_diode
+areaid_re.with_angle(0 .. 90).output("rfdiode.1", "rfdiode.1 : non 90 degree angle areaid.re")
+areaid_re.not(nwell).or(nwell.interacting(areaid_re).not(areaid_re)).output("rfdiode.2", "rfdiode.2 : areaid.re must coincide rf nwell diode")
+# rule rfdiode.3 not coded
+
+end #FEOL
+
+if OFFGRID
+info("OFFGRID-ANGLES section")
+
+dnwell.ongrid(0.005).output("dnwell_OFFGRID", "x.1b : OFFGRID vertex on dnwell")
+dnwell.with_angle(0 .. 45).output("dnwell_angle", "x.3a : non 45 degree angle dnwell")
+nwell.ongrid(0.005).output("nwell_OFFGRID", "x.1b : OFFGRID vertex on nwell")
+nwell.with_angle(0 .. 45).output("nwell_angle", "x.3a : non 45 degree angle nwell")
+pwbm.ongrid(0.005).output("pwbm_OFFGRID", "x.1b : OFFGRID vertex on pwbm")
+pwbm.with_angle(0 .. 45).output("pwbm_angle", "x.3a : non 45 degree angle pwbm")
+pwde.ongrid(0.005).output("pwde_OFFGRID", "x.1b : OFFGRID vertex on pwde")
+pwde.with_angle(0 .. 45).output("pwde_angle", "x.3a : non 45 degree angle pwde")
+hvtp.ongrid(0.005).output("hvtp_OFFGRID", "x.1b : OFFGRID vertex on hvtp")
+hvtp.with_angle(0 .. 45).output("hvtp_angle", "x.3a : non 45 degree angle hvtp")
+hvtr.ongrid(0.005).output("hvtr_OFFGRID", "x.1b : OFFGRID vertex on hvtr")
+hvtr.with_angle(0 .. 45).output("hvtr_angle", "x.3a : non 45 degree angle hvtr")
+lvtn.ongrid(0.005).output("lvtn_OFFGRID", "x.1b : OFFGRID vertex on lvtn")
+lvtn.with_angle(0 .. 45).output("lvtn_angle", "x.3a : non 45 degree angle lvtn")
+ncm.ongrid(0.005).output("ncm_OFFGRID", "x.1b : OFFGRID vertex on ncm")
+ncm.with_angle(0 .. 45).output("ncm_angle", "x.3a : non 45 degree angle ncm")
+diff.ongrid(0.005).output("diff_OFFGRID", "x.1b : OFFGRID vertex on diff")
+tap.ongrid(0.005).output("tap_OFFGRID", "x.1b : OFFGRID vertex on tap")
+diff.not(areaid_en.and(uhvi)).with_angle(0 .. 90).output("diff_angle", "x.2 : non 90 degree angle diff")
+diff.and(areaid_en.and(uhvi)).with_angle(0 .. 45).output("diff_angle", "x.2c : non 45 degree angle diff")
+tap.not(areaid_en.and(uhvi)).with_angle(0 .. 90).output("tap_angle", "x.2 : non 90 degree angle tap")
+tap.and(areaid_en.and(uhvi)).with_angle(0 .. 45).output("tap_angle", "x.2c : non 45 degree angle tap")
+tunm.ongrid(0.005).output("tunm_OFFGRID", "x.1b : OFFGRID vertex on tunm")
+tunm.with_angle(0 .. 45).output("tunm_angle", "x.3a : non 45 degree angle tunm")
+poly.ongrid(0.005).output("poly_OFFGRID", "x.1b : OFFGRID vertex on poly")
+poly.with_angle(0 .. 90).output("poly_angle", "x.2 : non 90 degree angle poly")
+rpm.ongrid(0.005).output("rpm_OFFGRID", "x.1b : OFFGRID vertex on rpm")
+rpm.with_angle(0 .. 45).output("rpm_angle", "x.3a : non 45 degree angle rpm")
+npc.ongrid(0.005).output("npc_OFFGRID", "x.1b : OFFGRID vertex on npc")
+npc.with_angle(0 .. 45).output("npc_angle", "x.3a : non 45 degree angle npc")
+nsdm.ongrid(0.005).output("nsdm_OFFGRID", "x.1b : OFFGRID vertex on nsdm")
+nsdm.with_angle(0 .. 45).output("nsdm_angle", "x.3a : non 45 degree angle nsdm")
+psdm.ongrid(0.005).output("psdm_OFFGRID", "x.1b : OFFGRID vertex on psdm")
+psdm.with_angle(0 .. 45).output("psdm_angle", "x.3a : non 45 degree angle psdm")
+licon.ongrid(0.005).output("licon_OFFGRID", "x.1b : OFFGRID vertex on licon")
+licon.with_angle(0 .. 90).output("licon_angle", "x.2 : non 90 degree angle licon")
+li.ongrid(0.005).output("li_OFFGRID", "x.1b : OFFGRID vertex on li")
+li.with_angle(0 .. 45).output("li_angle", "x.3a : non 45 degree angle li")
+mcon.ongrid(0.005).output("ct_OFFGRID", "x.1b : OFFGRID vertex on mcon")
+mcon.with_angle(0 .. 90).output("ct_angle", "x.2 : non 90 degree angle mcon")
+vpp.ongrid(0.005).output("vpp_OFFGRID", "x.1b : OFFGRID vertex on vpp")
+vpp.with_angle(0 .. 45).output("vpp_angle", "x.3a : non 45 degree angle vpp")
+m1.ongrid(0.005).output("m1_OFFGRID", "x.1b : OFFGRID vertex on m1")
+m1.with_angle(0 .. 45).output("m1_angle", "x.3a : non 45 degree angle m1")
+via.ongrid(0.005).output("via_OFFGRID", "x.1b : OFFGRID vertex on via")
+via.with_angle(0 .. 90).output("via_angle", "x.2 : non 90 degree angle via")
+m2.ongrid(0.005).output("m2_OFFGRID", "x.1b : OFFGRID vertex on m2")
+m2.with_angle(0 .. 45).output("m2_angle", "x.3a : non 45 degree angle m2")
+via2.ongrid(0.005).output("via2_OFFGRID", "x.1b : OFFGRID vertex on via2")
+via2.with_angle(0 .. 90).output("via2_angle", "x.2 : non 90 degree angle via2")
+m3.ongrid(0.005).output("m3_OFFGRID", "x.1b : OFFGRID vertex on m3")
+m3.with_angle(0 .. 45).output("m3_angle", "x.3a : non 45 degree angle m3")
+via3.ongrid(0.005).output("via3_OFFGRID", "x.1b : OFFGRID vertex on via3")
+via3.with_angle(0 .. 90).output("via3_angle", "x.2 : non 90 degree angle via3")
+nsm.ongrid(0.005).output("nsm_OFFGRID", "x.1b : OFFGRID vertex on nsm")
+nsm.with_angle(0 .. 45).output("nsm_angle", "x.3a : non 45 degree angle nsm")
+m4.ongrid(0.005).output("m4_OFFGRID", "x.1b : OFFGRID vertex on m4")
+m4.with_angle(0 .. 45).output("m4_angle", "x.3a : non 45 degree angle m4")
+via4.ongrid(0.005).output("via4_OFFGRID", "x.1b : OFFGRID vertex on via4")
+via4.with_angle(0 .. 90).output("via4_angle", "x.2 : non 90 degree angle via4")
+m5.ongrid(0.005).output("m5_OFFGRID", "x.1b : OFFGRID vertex on m5")
+m5.with_angle(0 .. 45).output("m5_angle", "x.3a : non 45 degree angle m5")
+pad.ongrid(0.005).output("pad_OFFGRID", "x.1b : OFFGRID vertex on pad")
+pad.with_angle(0 .. 45).output("pad_angle", "x.3a : non 45 degree angle pad")
+mf.ongrid(0.005).output("mf_OFFGRID", "x.1b : OFFGRID vertex on mf")
+mf.with_angle(0 .. 90).output("mf_angle", "x.2 : non 90 degree angle mf")
+hvi.ongrid(0.005).output("hvi_OFFGRID", "x.1b : OFFGRID vertex on hvi")
+hvi.with_angle(0 .. 45).output("hvi_angle", "x.3a : non 45 degree angle hvi")
+hvntm.ongrid(0.005).output("hvntm_OFFGRID", "x.1b : OFFGRID vertex on hvntm")
+hvntm.with_angle(0 .. 45).output("hvntm_angle", "x.3a : non 45 degree angle hvntm")
+vhvi.ongrid(0.005).output("vhvi_OFFGRID", "x.1b : OFFGRID vertex on vhvi")
+vhvi.with_angle(0 .. 45).output("vhvi_angle", "x.3a : non 45 degree angle vhvi")
+uhvi.ongrid(0.005).output("uhvi_OFFGRID", "x.1b : OFFGRID vertex on uhvi")
+uhvi.with_angle(0 .. 45).output("uhvi_angle", "x.3a : non 45 degree angle uhvi")
+pwell_rs.ongrid(0.005).output("pwell_rs_OFFGRID", "x.1b : OFFGRID vertex on pwell_rs")
+pwell_rs.with_angle(0 .. 45).output("pwell_rs_angle", "x.3a : non 45 degree angle pwell_rs")
+areaid_re.ongrid(0.005).output("areaid_re_OFFGRID", "x.1b : OFFGRID vertex on areaid.re")
+
+end #OFFGRID
+
diff --git a/aes_sky130_100mhz/flow/drc_report.rpt b/aes_sky130_100mhz/flow/drc_report.rpt
new file mode 100644
index 0000000000000000000000000000000000000000..aa7d118db1113b32b77a232ed784a04417a50653
--- /dev/null
+++ b/aes_sky130_100mhz/flow/drc_report.rpt
@@ -0,0 +1,5164 @@
+
+
+ SKY130 DRC runset
+
+ drc: script='/tmp/datagen_output/aes_sky130_100mhz/flow/drc_deck_patched.lydrc'
+ aes
+
+
+
+
+ li.1
+ li.1 : min. li width : 0.17um
+
+
+
+
+ li.1a
+ li.1a : min. li width for the cells s8rf2_xcmvpp_hd5_* : 0.14um
+
+
+
+
+ li.3
+ li.3 : min. li spacing : 0.17um
+
+
+
+
+ li.3a
+ li.3a : min. li spacing for the cells s8rf2_xcmvpp_hd5_* : 0.14um
+
+
+
+
+ li.5
+ li.5 : min. li enclosure of licon of 2 opposite edges : 0.08um
+
+
+
+
+ li.6
+ li.6 : min. li area : 0.0561um²
+
+
+
+
+ ct.1
+ ct.1 : minimum/maximum width of mcon : 0.17um
+
+
+
+
+ ct.2
+ ct.2 : min. mcon spacing : 0.19um
+
+
+
+
+ ct.4
+ ct.4 : mcon should covered by li
+
+
+
+
+ m1.1
+ m1.1 : min. m1 width : 0.14um
+
+
+
+
+ m1.2
+ m1.2 : min. m1 spacing : 0.14um
+
+
+
+
+ m1.3ab
+ m1.3ab : min. 3um.m1 spacing m1 : 0.28um
+
+
+
+
+ m1.4
+ m1.4 : min. m1 enclosure of mcon : 0.03um
+
+
+
+
+ m1.4a
+ m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um
+
+
+
+
+ m1.6
+ m1.6 : min. m1 area : 0.083um²
+
+
+
+
+ m1.7
+ m1.7 : min. m1 holes area : 0.14um²
+
+
+
+
+ m1.5
+ m1.5 : min. m1 enclosure of mcon of 2 opposite edges : 0.06um
+
+
+
+
+ via.4c.5c
+ via.4c.5c : m1 must enclose all via
+
+
+
+
+ via.1a
+ via.1a : minimum/maximum width of via : 0.15um
+
+
+
+
+ via.1b
+ via.1b : minimum/maximum width of via in areaid.mt: 0.15um or 0.23um or 0.28um
+
+
+
+
+ via.2
+ via.2 : min. via spacing : 0.17um
+
+
+
+
+ via.4a
+ via.4a : min. m1 enclosure of 0.15um via : 0.055um
+
+
+
+
+ via.4b
+ via.4b : min. m1 enclosure of 0.23um via : 0.03um
+
+
+
+
+ via1.5a
+ via1.5a : min. m1 enclosure of 0.15um via of 2 opposite edges : 0.085um
+
+
+
+
+ via1.5b
+ via1.5b : min. m1 enclosure of 0.23um via of 2 opposite edges : 0.06um
+
+
+
+
+ m2.1
+ m2.1 : min. m2 width : 0.14um
+
+
+
+
+ m2.2
+ m2.2 : min. m2 spacing : 0.14um
+
+
+
+
+ m2.3ab
+ m2.3ab : min. 3um.m2 spacing m2 : 0.28um
+
+
+
+
+ m2.6
+ m2.6 : min. m2 area : 0.0676um²
+
+
+
+
+ m2.7
+ m2.7 : min. m2 holes area : 0.14um²
+
+
+
+
+ m2.via
+ m2.via : m2 must enclose via
+
+
+
+
+ m2.4
+ m2.4 : min. m2 enclosure of via : 0.055um
+
+
+
+
+ m2.5
+ m2.5 : min. m2 enclosure of via of 2 opposite edges : 0.085um
+
+
+
+
+ via2
+ via2 : m2 must enclose all via2
+
+
+
+
+ via2.1a
+ via2.1a : minimum/maximum width of via2 : 0.2um
+
+
+
+
+ via2.1b
+ via2.1b : minimum/maximum width of via2 in areaid.mt: 0.2um or 1.2um or 1.5um
+
+
+
+
+ via2.2
+ via2.2 : min. via2 spacing : 0.2um
+
+
+
+
+ via2.4
+ via2.4 : min. m2 enclosure of via2 : 0.04um
+
+
+
+
+ via2.4a
+ via2.4a : min. m2 enclosure of 1.5um via2 : 0.14um
+
+
+
+
+ via2.5
+ via2.5 : min. m2 enclosure of via2 of 2 opposite edges : 0.085um
+
+
+
+
+ m3.1
+ m3.1 : min. m3 width : 0.3um
+
+
+
+
+ m3.2
+ m3.2 : min. m3 spacing : 0.3um
+
+
+
+
+ m3.3ab
+ m3.3ab : min. 3um.m3 spacing m3 : 0.4um
+
+
+
+
+ m3.6
+ m3.6 : min. m3 area : 0.24um²
+
+
+
+
+ m3.via2
+ m3.via2 : m3 must enclose via2
+
+
+
+
+ m3.4
+ m3.4 : min. m3 enclosure of via2 : 0.065um
+
+
+
+
+ via3
+ via3 : m3 must enclose all via3
+
+
+
+
+ via3.1a
+ via3.1a : minimum/maximum width of via3 in areaid.mt: 0.2um or 0.8um
+
+
+
+
+ via3.2
+ via3.2 : min. via3 spacing : 0.2um
+
+
+
+
+ via3.4
+ via3.4 : min. m3 enclosure of via3 : 0.06um
+
+
+
+
+ via3.5
+ via3.5 : min. m2 enclosure of via3 of 2 opposite edges : 0.09um
+
+
+
+
+ m4.1
+ m4.1 : min. m4 width : 0.3um
+
+
+
+
+ m4.2
+ m4.2 : min. m4 spacing : 0.3um
+
+
+
+
+ m4.5ab
+ m4.5ab : min. 3um.m4 spacing m4 : 0.4um
+
+
+
+
+ m4.4
+ m4.4 : min. m4 area : 0.24um²
+
+
+
+
+ m4.via3
+ m4.via3 : m4 must enclose via3
+
+
+
+
+ m4.3
+ m4.3 : min. m4 enclosure of via3 : 0.065um
+
+
+
+
+ via4.1a
+ via4.1a : minimum/maximum width of via4 : 0.8um
+
+
+
+
+ via4.2
+ via4.2 : min. via4 spacing : 0.8um
+
+
+
+
+ via4.4
+ via4.4 : min. m4 enclosure of via4 : 0.19um
+
+
+
+
+ via4
+ via4 : m4 must enclose all via4
+
+
+
+
+ m5.1
+ m5.1 : min. m5 width : 1.6um
+
+
+
+
+ m5.2
+ m5.2 : min. m5 spacing : 1.6um
+
+
+
+
+ m5.via4
+ m5.via4 : m5 must enclose via4
+
+
+
+
+ m5.3
+ m4.3 : min. m5 enclosure of via4 : 0.31um
+
+
+
+
+ nsm.1
+ nsm.1 : min. nsm width : 3.0um
+
+
+
+
+ nsm.2
+ nsm.2 : min. nsm spacing : 4.0um
+
+
+
+
+ nsm.4
+ nsm.4 : min. nsm enclosure of cfom : 3.0um
+
+
+
+
+ nsm.3
+ nsm.3 : min. nsm spacing to cfom : 1.0um
+
+
+
+
+ pad.2
+ pad.2 : min. pad spacing : 1.27um
+
+
+
+
+ dnwell_OFFGRID
+ x.1b : OFFGRID vertex on dnwell
+
+
+
+
+ dnwell_angle
+ x.3a : non 45 degree angle dnwell
+
+
+
+
+ nwell_OFFGRID
+ x.1b : OFFGRID vertex on nwell
+
+
+
+
+ nwell_angle
+ x.3a : non 45 degree angle nwell
+
+
+
+
+ pwbm_OFFGRID
+ x.1b : OFFGRID vertex on pwbm
+
+
+
+
+ pwbm_angle
+ x.3a : non 45 degree angle pwbm
+
+
+
+
+ pwde_OFFGRID
+ x.1b : OFFGRID vertex on pwde
+
+
+
+
+ pwde_angle
+ x.3a : non 45 degree angle pwde
+
+
+
+
+ hvtp_OFFGRID
+ x.1b : OFFGRID vertex on hvtp
+
+
+
+
+ hvtp_angle
+ x.3a : non 45 degree angle hvtp
+
+
+
+
+ hvtr_OFFGRID
+ x.1b : OFFGRID vertex on hvtr
+
+
+
+
+ hvtr_angle
+ x.3a : non 45 degree angle hvtr
+
+
+
+
+ lvtn_OFFGRID
+ x.1b : OFFGRID vertex on lvtn
+
+
+
+
+ lvtn_angle
+ x.3a : non 45 degree angle lvtn
+
+
+
+
+ ncm_OFFGRID
+ x.1b : OFFGRID vertex on ncm
+
+
+
+
+ ncm_angle
+ x.3a : non 45 degree angle ncm
+
+
+
+
+ diff_OFFGRID
+ x.1b : OFFGRID vertex on diff
+
+
+
+
+ tap_OFFGRID
+ x.1b : OFFGRID vertex on tap
+
+
+
+
+ diff_angle
+ x.2c : non 45 degree angle diff
+
+
+
+
+ tap_angle
+ x.2c : non 45 degree angle tap
+
+
+
+
+ tunm_OFFGRID
+ x.1b : OFFGRID vertex on tunm
+
+
+
+
+ tunm_angle
+ x.3a : non 45 degree angle tunm
+
+
+
+
+ poly_OFFGRID
+ x.1b : OFFGRID vertex on poly
+
+
+
+
+ poly_angle
+ x.2 : non 90 degree angle poly
+
+
+
+
+ rpm_OFFGRID
+ x.1b : OFFGRID vertex on rpm
+
+
+
+
+ rpm_angle
+ x.3a : non 45 degree angle rpm
+
+
+
+
+ npc_OFFGRID
+ x.1b : OFFGRID vertex on npc
+
+
+
+
+ npc_angle
+ x.3a : non 45 degree angle npc
+
+
+
+
+ nsdm_OFFGRID
+ x.1b : OFFGRID vertex on nsdm
+
+
+
+
+ nsdm_angle
+ x.3a : non 45 degree angle nsdm
+
+
+
+
+ psdm_OFFGRID
+ x.1b : OFFGRID vertex on psdm
+
+
+
+
+ psdm_angle
+ x.3a : non 45 degree angle psdm
+
+
+
+
+ licon_OFFGRID
+ x.1b : OFFGRID vertex on licon
+
+
+
+
+ licon_angle
+ x.2 : non 90 degree angle licon
+
+
+
+
+ li_OFFGRID
+ x.1b : OFFGRID vertex on li
+
+
+
+
+ li_angle
+ x.3a : non 45 degree angle li
+
+
+
+
+ ct_OFFGRID
+ x.1b : OFFGRID vertex on mcon
+
+
+
+
+ ct_angle
+ x.2 : non 90 degree angle mcon
+
+
+
+
+ vpp_OFFGRID
+ x.1b : OFFGRID vertex on vpp
+
+
+
+
+ vpp_angle
+ x.3a : non 45 degree angle vpp
+
+
+
+
+ m1_OFFGRID
+ x.1b : OFFGRID vertex on m1
+
+
+
+
+ m1_angle
+ x.3a : non 45 degree angle m1
+
+
+
+
+ via_OFFGRID
+ x.1b : OFFGRID vertex on via
+
+
+
+
+ via_angle
+ x.2 : non 90 degree angle via
+
+
+
+
+ m2_OFFGRID
+ x.1b : OFFGRID vertex on m2
+
+
+
+
+ m2_angle
+ x.3a : non 45 degree angle m2
+
+
+
+
+ via2_OFFGRID
+ x.1b : OFFGRID vertex on via2
+
+
+
+
+ via2_angle
+ x.2 : non 90 degree angle via2
+
+
+
+
+ m3_OFFGRID
+ x.1b : OFFGRID vertex on m3
+
+
+
+
+ m3_angle
+ x.3a : non 45 degree angle m3
+
+
+
+
+ via3_OFFGRID
+ x.1b : OFFGRID vertex on via3
+
+
+
+
+ via3_angle
+ x.2 : non 90 degree angle via3
+
+
+
+
+ nsm_OFFGRID
+ x.1b : OFFGRID vertex on nsm
+
+
+
+
+ nsm_angle
+ x.3a : non 45 degree angle nsm
+
+
+
+
+ m4_OFFGRID
+ x.1b : OFFGRID vertex on m4
+
+
+
+
+ m4_angle
+ x.3a : non 45 degree angle m4
+
+
+
+
+ via4_OFFGRID
+ x.1b : OFFGRID vertex on via4
+
+
+
+
+ via4_angle
+ x.2 : non 90 degree angle via4
+
+
+
+
+ m5_OFFGRID
+ x.1b : OFFGRID vertex on m5
+
+
+
+
+ m5_angle
+ x.3a : non 45 degree angle m5
+
+
+
+
+ pad_OFFGRID
+ x.1b : OFFGRID vertex on pad
+
+
+
+
+ pad_angle
+ x.3a : non 45 degree angle pad
+
+
+
+
+ mf_OFFGRID
+ x.1b : OFFGRID vertex on mf
+
+
+
+
+ mf_angle
+ x.2 : non 90 degree angle mf
+
+
+
+
+ hvi_OFFGRID
+ x.1b : OFFGRID vertex on hvi
+
+
+
+
+ hvi_angle
+ x.3a : non 45 degree angle hvi
+
+
+
+
+ hvntm_OFFGRID
+ x.1b : OFFGRID vertex on hvntm
+
+
+
+
+ hvntm_angle
+ x.3a : non 45 degree angle hvntm
+
+
+
+
+ vhvi_OFFGRID
+ x.1b : OFFGRID vertex on vhvi
+
+
+
+
+ vhvi_angle
+ x.3a : non 45 degree angle vhvi
+
+
+
+
+ uhvi_OFFGRID
+ x.1b : OFFGRID vertex on uhvi
+
+
+
+
+ uhvi_angle
+ x.3a : non 45 degree angle uhvi
+
+
+
+
+ pwell_rs_OFFGRID
+ x.1b : OFFGRID vertex on pwell_rs
+
+
+
+
+ pwell_rs_angle
+ x.3a : non 45 degree angle pwell_rs
+
+
+
+
+ areaid_re_OFFGRID
+ x.1b : OFFGRID vertex on areaid.re
+
+
+
+
+
+ |
+ aes
+
+
+
+
+ |
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (648.745,641.785;648.915,641.785)|(649.077,641.835;648.583,641.835)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (697.965,448.585;698.135,448.585)|(698.245,448.715;697.855,448.715)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (511.06,206.805;511.965,206.805)|(511.835,206.915;510.93,206.915)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (648.898,641.785;648.915,641.785)|(649.077,641.835;649.06,641.835)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (648.455,641.785;648.762,641.785)|(648.6,641.835;648.455,641.835)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (697.675,448.585;698.135,448.585)|(698.245,448.715;697.675,448.715)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (648.455,641.785;648.915,641.785)|(649.06,641.835;648.455,641.835)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (510.915,206.805;511.06,206.805)|(511.19,206.915;510.915,206.915)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (648.455,641.785;648.915,641.785)|(649.077,641.835;648.6,641.835)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (648.455,641.785;648.915,641.785)|(649.077,641.835;648.455,641.835)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (200.245,448.585;200.705,448.585)|(200.705,448.715;200.135,448.715)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (511.52,206.805;511.965,206.805)|(511.835,206.915;511.39,206.915)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (510.915,206.805;511.965,206.805)|(511.835,206.915;510.915,206.915)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (510.915,206.805;511.52,206.805)|(511.65,206.915;510.915,206.915)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (511.535,206.805;511.965,206.805)|(511.835,206.915;511.665,206.915)
+
+
+ -
+
+ 'li.3'
+
| aes |
+ false
+ 1
+
+
+
+ edge-pair: (200.245,448.585;200.415,448.585)|(200.525,448.715;200.135,448.715)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (695.835,699.125;695.835,698.785)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (695.665,698.785;695.665,699.125)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (558.125,535.585;558.125,535.925)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (558.295,535.925;558.295,535.585)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (601.365,551.905;601.365,552.245)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (601.535,552.245;601.535,551.905)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (748.105,538.305;748.105,538.645)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (748.275,538.645;748.275,538.305)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (814.515,628.405;814.515,628.065)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (814.345,628.065;814.345,628.405)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (497.405,758.625;497.405,758.965)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (497.575,758.965;497.575,758.625)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (524.715,495.295;524.715,494.955)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (524.545,494.955;524.545,495.295)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (497.575,459.935;497.575,459.595)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (497.405,459.595;497.405,459.935)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (485.615,459.935;485.615,459.595)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (485.905,459.425;485.905,459.765)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (486.075,459.765;486.075,459.425)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (485.445,459.595;485.445,459.935)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (723.725,530.315;723.725,530.655)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (723.895,530.655;723.895,530.315)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (750.575,448.885;750.575,448.545)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (750.405,448.545;750.405,448.885)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (573.765,522.155;573.765,522.495)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (573.935,522.495;573.935,522.155)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (577.615,470.645;577.615,470.305)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (577.445,470.305;577.445,470.645)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (550.475,465.205;550.475,464.865)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (550.305,464.865;550.305,465.205)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (559.505,434.945;559.505,435.285)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (559.675,435.285;559.675,434.945)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (562.895,435.285;562.895,434.945)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (562.725,434.945;562.725,435.285)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (573.475,391.765;573.475,391.425)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (573.305,391.425;573.305,391.765)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (690.605,385.985;690.605,386.325)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (690.775,386.325;690.775,385.985)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (220.945,551.905;220.945,552.245)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (221.115,552.245;221.115,551.905)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (468.595,427.295;468.595,426.955)
+
+
+ -
+
+ 'ct.1'
+
| aes |
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+ 1
+
+
+
+ edge: (468.425,426.955;468.425,427.295)
+
+
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+
+ 'ct.1'
+
| aes |
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+ 1
+
+
+
+ edge: (318.005,503.115;318.005,503.455)
+
+
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+
+ 'ct.1'
+
| aes |
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+ 1
+
+
+
+ edge: (318.175,503.455;318.175,503.115)
+
+
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+
+ 'ct.1'
+
| aes |
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+ 1
+
+
+
+ edge: (304.375,397.205;304.375,396.865)
+
+
+ -
+
+ 'ct.1'
+
| aes |
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+ 1
+
+
+
+ edge: (304.205,396.865;304.205,397.205)
+
+
+ -
+
+ 'ct.1'
+
| aes |
+ false
+ 1
+
+
+
+ edge: (303.745,394.145;303.745,394.485)
+
+
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+
+ 'ct.1'
+
| aes |
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+ 1
+
+
+
+ edge: (303.915,394.485;303.915,394.145)
+
+
+ -
+
+ 'ct.1'
+
| aes |
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+ 1
+
+
+
+ edge: (471.645,394.315;471.645,394.655)
+
+
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+
+ 'ct.1'
+
| aes |
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+
+
+
+ edge: (471.815,394.655;471.815,394.315)
+
+
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+
+ 'ct.1'
+
| aes |
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+ 1
+
+
+
+ edge: (152.575,506.175;152.575,505.835)
+
+
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+
+ 'ct.1'
+
| aes |
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+
+
+
+ edge: (152.405,505.835;152.405,506.175)
+
+
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+
+ 'ct.1'
+
| aes |
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+
+
+
+ edge: (179.715,449.055;179.715,448.715)
+
+
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+
+ 'ct.1'
+
| aes |
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+
+
+
+ edge: (179.545,448.715;179.545,449.055)
+
+
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+
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diff --git a/aes_sky130_100mhz/flow/extracted/cell_library.json b/aes_sky130_100mhz/flow/extracted/cell_library.json
new file mode 100644
index 0000000000000000000000000000000000000000..7d914dcbd6ecffacc6e09dd79d1111e352297bb7
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/cell_library.json
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\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/cell_neighborhoods.json b/aes_sky130_100mhz/flow/extracted/cell_neighborhoods.json
new file mode 100644
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diff --git a/aes_sky130_100mhz/flow/extracted/cell_pin_locations.json b/aes_sky130_100mhz/flow/extracted/cell_pin_locations.json
new file mode 100644
index 0000000000000000000000000000000000000000..7f882e27eff75ae2577804b5491b3bdb3bb849fd
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/cell_pin_locations.json
@@ -0,0 +1 @@
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diff --git a/aes_sky130_100mhz/flow/extracted/clock_skew.json b/aes_sky130_100mhz/flow/extracted/clock_skew.json
new file mode 100644
index 0000000000000000000000000000000000000000..483fda968fbf0913120911287e2aaa83ff576be1
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/clock_skew.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "report_type": "clock_skew", "content": "Clock clk\n 0.23 source latency _18_/CLK ^\n -0.25 target latency _20_/CLK ^\n 0.00 CRPR\n--------------\n -0.01 setup skew"}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/deepgate.json b/aes_sky130_100mhz/flow/extracted/deepgate.json
new file mode 100644
index 0000000000000000000000000000000000000000..851491c548c84f88244115fa8ff753d0c0f9aea5
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/deepgate.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "gate_counts": {"or": 6212, "nor": 4780, "and": 3172, "nand": 2952, "mux": 643, "buf": 55, "xor": 474, "xnor": 1359}, "total_gates": 19647, "netlist_file": "netlist.v", "netlist_size_bytes": 2317896}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/die_core_area.json b/aes_sky130_100mhz/flow/extracted/die_core_area.json
new file mode 100644
index 0000000000000000000000000000000000000000..46addbd156bbdef72aabe91e1feb90cf4d62e57a
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/die_core_area.json
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+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "die_x0": 0.0, "die_y0": 0.0, "die_x1": 19.165, "die_y1": 19.165, "num_rows": 5.0, "num_insts": 41.0, "num_nets": 20.0, "dbu_per_um": 1000.0}]
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diff --git a/aes_sky130_100mhz/flow/extracted/drc_labels.json b/aes_sky130_100mhz/flow/extracted/drc_labels.json
new file mode 100644
index 0000000000000000000000000000000000000000..0dd74035b2c74e309cc88092eb061c0a18e91bdf
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/drc_labels.json
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diff --git a/aes_sky130_100mhz/flow/extracted/floating_nets.json b/aes_sky130_100mhz/flow/extracted/floating_nets.json
new file mode 100644
index 0000000000000000000000000000000000000000..da7d81037e8dc6b2e2a136a10ec79f4cd0611421
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/floating_nets.json
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+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "floating_net_count": 0, "floating_nets": []}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/geometry_patches.json b/aes_sky130_100mhz/flow/extracted/geometry_patches.json
new file mode 100644
index 0000000000000000000000000000000000000000..68a718d17694c2b2f9fa50a6a559b6b707180fa2
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/geometry_patches.json
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+version https://git-lfs.github.com/spec/v1
+oid sha256:f4b0f2f195bf0ab6e690a918a907254b0c7dc1228da4c1a70162d3553906cc51
+size 805124439
diff --git a/aes_sky130_100mhz/flow/extracted/instance_placement.json b/aes_sky130_100mhz/flow/extracted/instance_placement.json
new file mode 100644
index 0000000000000000000000000000000000000000..68d070cf015f59458c7ea4b16dda37b6f3bcf4f9
--- /dev/null
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@@ -0,0 +1 @@
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\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/ir_drop_vdd.json b/aes_sky130_100mhz/flow/extracted/ir_drop_vdd.json
new file mode 100644
index 0000000000000000000000000000000000000000..0637a088a01e8ddab3bf3fa98dbe804cbde1a0dc
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/ir_drop_vdd.json
@@ -0,0 +1 @@
+[]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/ir_drop_vss.json b/aes_sky130_100mhz/flow/extracted/ir_drop_vss.json
new file mode 100644
index 0000000000000000000000000000000000000000..0637a088a01e8ddab3bf3fa98dbe804cbde1a0dc
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/ir_drop_vss.json
@@ -0,0 +1 @@
+[]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/mesoscale_blocks.json b/aes_sky130_100mhz/flow/extracted/mesoscale_blocks.json
new file mode 100644
index 0000000000000000000000000000000000000000..d09ab6bcf5c9335ae86eba2240fb93b87a03bb11
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/mesoscale_blocks.json
@@ -0,0 +1 @@
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\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/net_connectivity.json b/aes_sky130_100mhz/flow/extracted/net_connectivity.json
new file mode 100644
index 0000000000000000000000000000000000000000..40f32d4ebf5d27b93d9b1e85c89a39814bd507f0
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/net_connectivity.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_00_", "fanout": 1, "driver": "Y"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_01_", "fanout": 1, "driver": "Y"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_02_", "fanout": 1, "driver": "Y"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_03_", "fanout": 1, "driver": "Y"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_04_", "fanout": 1, "driver": "X"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_05_", "fanout": 1, "driver": "Y"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_06_", "fanout": 1, "driver": "X"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_07_", "fanout": 1, "driver": "Y"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_08_", "fanout": 1, "driver": "X"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "clk", "fanout": 1, "driver": null}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "count[0]", "fanout": 6, "driver": "Q"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "count[1]", "fanout": 5, "driver": "Q"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "count[2]", "fanout": 4, "driver": "Q"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "count[3]", "fanout": 2, "driver": "Q"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "rst", "fanout": 4, "driver": null}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "VDD", "fanout": 0, "driver": null}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "VSS", "fanout": 0, "driver": null}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "clknet_0_clk", "fanout": 2, "driver": "X"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "clknet_1_0__leaf_clk", "fanout": 2, "driver": "X"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "clknet_1_1__leaf_clk", "fanout": 2, "driver": "X"}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/net_wire_info.json b/aes_sky130_100mhz/flow/extracted/net_wire_info.json
new file mode 100644
index 0000000000000000000000000000000000000000..50fc7cc3245ab53f177b500c99af3034df25b4cc
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/net_wire_info.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_00_", "has_wire": 1, "iterm_count": 2, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_01_", "has_wire": 1, "iterm_count": 2, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_02_", "has_wire": 1, "iterm_count": 2, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_03_", "has_wire": 1, "iterm_count": 2, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_04_", "has_wire": 1, "iterm_count": 2, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_05_", "has_wire": 1, "iterm_count": 2, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_06_", "has_wire": 1, "iterm_count": 2, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_07_", "has_wire": 1, "iterm_count": 2, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "_08_", "has_wire": 1, "iterm_count": 2, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "clk", "has_wire": 1, "iterm_count": 1, "bterm_count": 1}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "count[0]", "has_wire": 1, "iterm_count": 7, "bterm_count": 1}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "count[1]", "has_wire": 1, "iterm_count": 6, "bterm_count": 1}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "count[2]", "has_wire": 1, "iterm_count": 5, "bterm_count": 1}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "count[3]", "has_wire": 1, "iterm_count": 3, "bterm_count": 1}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "rst", "has_wire": 1, "iterm_count": 4, "bterm_count": 1}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "VDD", "has_wire": 0, "iterm_count": 26, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "VSS", "has_wire": 0, "iterm_count": 26, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "clknet_0_clk", "has_wire": 1, "iterm_count": 3, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "clknet_1_0__leaf_clk", "has_wire": 1, "iterm_count": 3, "bterm_count": 0}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "net": "clknet_1_1__leaf_clk", "has_wire": 1, "iterm_count": 3, "bterm_count": 0}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/physics_labels.json b/aes_sky130_100mhz/flow/extracted/physics_labels.json
new file mode 100644
index 0000000000000000000000000000000000000000..242e486d794cd7e8080a29243ceb5b8acc96166d
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/physics_labels.json
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:4d15e91a238295f909228127c831c3824ac61d5cbfb6d3bef84b0493a1674388
+size 24468915
diff --git a/aes_sky130_100mhz/flow/extracted/pin_access.json b/aes_sky130_100mhz/flow/extracted/pin_access.json
new file mode 100644
index 0000000000000000000000000000000000000000..713f7861cceff6d6d64330d5230fd4c784589c84
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/pin_access.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "address[0]", "direction": "INPUT", "layer": "met2", "x": 483230, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "address[1]", "direction": "INPUT", "layer": "met2", "x": 531990, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "address[2]", "direction": "INPUT", "layer": "met2", "x": 531070, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "address[3]", "direction": "INPUT", "layer": "met2", "x": 532910, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "address[4]", "direction": "INPUT", "layer": "met2", "x": 550390, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "address[5]", "direction": "INPUT", "layer": "met2", "x": 529230, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "address[6]", "direction": "INPUT", "layer": "met2", "x": 528310, "y": 242}, {"run_id": "aes_sky130_100mhz", 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"read_data[3]", "direction": "OUTPUT", "layer": "met2", "x": 540270, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "read_data[4]", "direction": "OUTPUT", "layer": "met2", "x": 508070, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "read_data[5]", "direction": "OUTPUT", "layer": "met2", "x": 507150, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "read_data[6]", "direction": "OUTPUT", "layer": "met2", "x": 506230, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "read_data[7]", "direction": "OUTPUT", "layer": "met2", "x": 541190, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "read_data[8]", "direction": "OUTPUT", "layer": "met2", "x": 505310, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "read_data[9]", "direction": "OUTPUT", "layer": "met2", "x": 504390, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "reset_n", "direction": "INPUT", "layer": "met2", "x": 503470, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "we", "direction": "INPUT", "layer": "met2", "x": 542110, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[0]", "direction": "INPUT", "layer": "met2", "x": 502550, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[10]", "direction": "INPUT", "layer": "met2", "x": 522790, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[11]", "direction": "INPUT", "layer": "met2", "x": 501630, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[12]", "direction": "INPUT", "layer": "met2", "x": 543030, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[13]", "direction": "INPUT", "layer": "met2", "x": 526470, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[14]", "direction": "INPUT", "layer": "met2", "x": 500710, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[15]", "direction": "INPUT", "layer": "met2", "x": 530150, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[16]", "direction": "INPUT", "layer": "met2", "x": 543950, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[17]", "direction": "INPUT", "layer": "met2", "x": 499790, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[18]", "direction": "INPUT", "layer": "met2", "x": 498870, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[19]", "direction": "INPUT", "layer": "met2", "x": 497950, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[1]", "direction": "INPUT", "layer": "met2", "x": 544870, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[20]", "direction": "INPUT", "layer": "met2", "x": 497030, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[21]", "direction": "INPUT", "layer": "met2", "x": 496110, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[22]", "direction": "INPUT", "layer": "met2", "x": 495190, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[23]", "direction": "INPUT", "layer": "met2", "x": 545790, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[24]", "direction": "INPUT", "layer": "met2", "x": 494270, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[25]", "direction": "INPUT", "layer": "met2", "x": 493350, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[26]", "direction": "INPUT", "layer": "met2", "x": 492430, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[27]", "direction": "INPUT", "layer": "met2", "x": 546710, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[28]", "direction": "INPUT", "layer": "met2", "x": 491510, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[29]", "direction": "INPUT", "layer": "met2", "x": 490590, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[2]", "direction": "INPUT", "layer": "met2", "x": 489670, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[30]", "direction": "INPUT", "layer": "met2", "x": 547630, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[31]", "direction": "INPUT", "layer": "met2", "x": 488750, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[3]", "direction": "INPUT", "layer": "met2", "x": 487830, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[4]", "direction": "INPUT", "layer": "met2", "x": 486910, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[5]", "direction": "INPUT", "layer": "met2", "x": 548550, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[6]", "direction": "INPUT", "layer": "met2", "x": 485990, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[7]", "direction": "INPUT", "layer": "met2", "x": 485070, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[8]", "direction": "INPUT", "layer": "met2", "x": 484150, "y": 242}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "pin_name": "write_data[9]", "direction": "INPUT", "layer": "met2", "x": 549470, "y": 242}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/power_grid.json b/aes_sky130_100mhz/flow/extracted/power_grid.json
new file mode 100644
index 0000000000000000000000000000000000000000..0637a088a01e8ddab3bf3fa98dbe804cbde1a0dc
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/power_grid.json
@@ -0,0 +1 @@
+[]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/power_summary.json b/aes_sky130_100mhz/flow/extracted/power_summary.json
new file mode 100644
index 0000000000000000000000000000000000000000..55b7119cf5b3b5360085257543c1f6c26f9c3778
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/power_summary.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "instance": "__TOTAL__", "internal_mw": 4.91958e-05, "switching_mw": 2.171214e-05, "leakage_mw": 9.068234e-11, "total_mw": 7.090803e-05}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/timing_contexts.json b/aes_sky130_100mhz/flow/extracted/timing_contexts.json
new file mode 100644
index 0000000000000000000000000000000000000000..b63624ec0fe317df4c10ceb2619194fce075406a
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/timing_contexts.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "freq_mhz": 100, "wns_ns": 1.43, "tns_ns": null, "utilization": 0.21, "num_instances": 155344, "area_um2": 234253.0, "multi_corner": ["ff_n40C_1v95 (fast) WNS: NaN ns TNS: NaN ns [VIOLATED]", "tt_025C_1v80 (typical) WNS: NaN ns TNS: NaN ns [VIOLATED]", "ss_n40C_1v40 (slow) WNS: NaN ns TNS: NaN ns [VIOLATED]", "ff_n40C_1v95 (fast) WNS: NaN ns TNS: NaN ns [VIOLATED]", "tt_025C_1v80 (typical) WNS: NaN ns TNS: NaN ns [VIOLATED]", "ss_n40C_1v40 (slow) WNS: NaN ns TNS: NaN ns [VIOLATED]", "Timing: MET"], "power_mw": null, "drc_clean": false, "lvs_clean": true}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/timing_paths_detailed.json b/aes_sky130_100mhz/flow/extracted/timing_paths_detailed.json
new file mode 100644
index 0000000000000000000000000000000000000000..358eadc5de0ed854f430766f83b176c69efc9d47
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/timing_paths_detailed.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "startpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "endpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "path_type": "min", "cells": [{"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 0.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.019159", "delay": 0.095392, "slew": 0.364233, "capacitance": 0.597001, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.095392", "delay": 0.000248, "slew": 0.597248, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.002651", "delay": 0.073433, "slew": 0.098907, "capacitance": 0.696155, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.073433", "delay": 5.1e-05, "slew": 0.696206, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 0.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}], "slack": 0.496267, "data_arrival_time": 0.696206, "data_required_time": 0.19994}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "startpoint": "_21_ (rising edge-triggered flip-flop clocked by clk)", "endpoint": "_21_ (rising edge-triggered flip-flop clocked by clk)", "path_type": "min", "cells": [{"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 0.000129, "slew": 0.232801, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.006615", "delay": 0.042394, "slew": 0.319294, "capacitance": 0.552095, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.042394", "delay": 0.00016, "slew": 0.552255, "cell_type": "sky130_fd_sc_hd__o31ai_1"}, {"pin": "0.006207", "delay": 0.086069, "slew": 0.082288, "capacitance": 0.634543, "cell_type": "sky130_fd_sc_hd__o31ai_1"}, {"pin": "0.086069", "delay": 0.000215, "slew": 0.634758, "cell_type": "sky130_fd_sc_hd__a21oi_1"}, {"pin": "0.002805", "delay": 0.02303, "slew": 0.066946, "capacitance": 0.701704, "cell_type": "sky130_fd_sc_hd__a21oi_1"}, {"pin": "0.023030", "delay": 5.1e-05, "slew": 0.701756, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 0.000129, "slew": 0.232801, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}], "slack": 0.505859, "data_arrival_time": 0.701756, "data_required_time": 0.195896}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "startpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "endpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "path_type": "min", "cells": [{"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 0.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.020745", "delay": 0.19956, "slew": 0.428389, "capacitance": 0.661157, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.199560", "delay": 0.000269, "slew": 0.661426, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.002658", "delay": 0.022103, "slew": 0.061067, "capacitance": 0.722493, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.022103", "delay": 5.1e-05, "slew": 0.722544, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 0.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}], "slack": 0.526295, "data_arrival_time": 0.722544, "data_required_time": 0.196249}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "startpoint": "_20_ (rising edge-triggered flip-flop clocked by clk)", "endpoint": "_20_ (rising edge-triggered flip-flop clocked by clk)", "path_type": "min", "cells": [{"pin": "0.000114", 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"max", "cells": [{"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 0.000129, "slew": 0.232801, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.006918", "delay": 0.07582, "slew": 0.339315, "capacitance": 0.572117, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.075820", "delay": 8.4e-05, "slew": 0.5722, "cell_type": "sky130_fd_sc_hd__or4_1"}, {"pin": "0.006004", "delay": 0.06617, "slew": 0.129214, "capacitance": 0.701415, "cell_type": "sky130_fd_sc_hd__or4_1"}, {"pin": "0.066170", "delay": 0.00021, "slew": 0.701625, "cell_type": "sky130_fd_sc_hd__a21oi_1"}, {"pin": "0.002805", "delay": 0.077401, "slew": 0.064668, "capacitance": 0.766293, "cell_type": "sky130_fd_sc_hd__a21oi_1"}, {"pin": "0.077401", "delay": 5.1e-05, "slew": 0.766344, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.000114", "delay": 5.7e-05, "slew": 5.000057, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 5.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 5.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 5.232673, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 0.000129, "slew": 5.232801, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}], "slack": 4.349466, "data_arrival_time": 0.766344, "data_required_time": 5.11581}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "startpoint": "_21_ (rising edge-triggered flip-flop clocked by clk)", "endpoint": "_21_ (rising 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0.000215, "slew": 0.634758, "cell_type": "sky130_fd_sc_hd__a21oi_1"}, {"pin": "0.002805", "delay": 0.077401, "slew": 0.106228, "capacitance": 0.740986, "cell_type": "sky130_fd_sc_hd__a21oi_1"}, {"pin": "0.077401", "delay": 5.1e-05, "slew": 0.741037, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.000114", "delay": 5.7e-05, "slew": 5.000057, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 5.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 5.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 5.232673, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 0.000129, "slew": 5.232801, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}], "slack": 4.374773, "data_arrival_time": 0.741037, "data_required_time": 5.11581}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "startpoint": "_21_ (rising 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"cell_type": "sky130_fd_sc_hd__o31ai_1"}, {"pin": "0.073469", "delay": 0.000209, "slew": 0.661105, "cell_type": "sky130_fd_sc_hd__a21oi_1"}, {"pin": "0.002798", "delay": 0.104181, "slew": 0.128548, "capacitance": 0.789653, "cell_type": "sky130_fd_sc_hd__a21oi_1"}, {"pin": "0.104181", "delay": 5.1e-05, "slew": 0.789704, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.000114", "delay": 5.7e-05, "slew": 5.000057, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 5.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 5.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 5.232673, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 0.000129, "slew": 5.232801, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}], "slack": 4.380249, "data_arrival_time": 0.789704, "data_required_time": 5.169952}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "startpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "endpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "path_type": "max", "cells": [{"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 0.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.020745", "delay": 0.19956, "slew": 0.428389, "capacitance": 0.661157, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.199560", "delay": 0.000269, "slew": 0.661426, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.002658", "delay": 0.047605, "slew": 0.061067, "capacitance": 0.722493, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.047605", "delay": 5.1e-05, "slew": 0.722544, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.000114", "delay": 5.7e-05, "slew": 5.000057, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 5.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 5.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 5.232673, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 5.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}], "slack": 4.406292, "data_arrival_time": 0.722544, "data_required_time": 5.128836}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "startpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "endpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "path_type": "max", "cells": [{"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 0.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.019159", "delay": 0.095392, "slew": 0.364233, "capacitance": 0.597001, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.095392", "delay": 0.000248, "slew": 0.597248, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.002651", "delay": 0.077516, "slew": 0.098907, "capacitance": 0.696155, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.077516", "delay": 5.1e-05, "slew": 0.696206, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.000114", "delay": 5.7e-05, "slew": 5.000057, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 5.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 5.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 5.232673, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 5.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}], "slack": 4.47983, "data_arrival_time": 0.696206, "data_required_time": 5.176037}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/tns_detail.json b/aes_sky130_100mhz/flow/extracted/tns_detail.json
new file mode 100644
index 0000000000000000000000000000000000000000..17516ef3c548d6b026e69cb8c8e9f33718ead28c
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/tns_detail.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "report_type": "tns", "content": "tns 0.00"}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/trajectory_snapshots.json b/aes_sky130_100mhz/flow/extracted/trajectory_snapshots.json
new file mode 100644
index 0000000000000000000000000000000000000000..78701f5236930745436157f0d0584c594b1b7638
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/trajectory_snapshots.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "phase": 1, "label": "Step 1/3: Synthesis", "type": "phase_start"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "phase": 1, "cells": 18440, "type": "synth_result"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "phase": 1, "duration_s": 15.3, "type": "phase_end"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "phase": 2, "label": "Step 2/3: Place and Route", "type": "phase_start"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "phase": 2, "instances": 155344, "utilization": 0.21, "type": "pnr_result"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "phase": 2, "duration_s": 1369.9, "type": "phase_end"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "phase": 3, "label": "Step 3/3: GDS Generation", "type": "phase_start"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "phase": 3, "duration_s": 1783.94, "type": "phase_end"}, {"run_id": "aes_sky130_100mhz", "pdk": "sky130", "phase": 3, "signoff": "FAIL", "type": "signoff_result"}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/extracted/wns_detail.json b/aes_sky130_100mhz/flow/extracted/wns_detail.json
new file mode 100644
index 0000000000000000000000000000000000000000..7828312ff928ab49ff2a485c90e34370f2538961
--- /dev/null
+++ b/aes_sky130_100mhz/flow/extracted/wns_detail.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_100mhz", "pdk": "sky130", "report_type": "wns", "content": "wns 0.00"}]
\ No newline at end of file
diff --git a/aes_sky130_100mhz/flow/flow_log.txt b/aes_sky130_100mhz/flow/flow_log.txt
new file mode 100644
index 0000000000000000000000000000000000000000..2fcbe71920d56e119c6aa5789906aa21cbaad9fc
--- /dev/null
+++ b/aes_sky130_100mhz/flow/flow_log.txt
@@ -0,0 +1,96 @@
+╔══════════════════════════════════════════╗
+║ Zyphar Flow v1.0.0 ║
+║ Complete RTL-to-GDSII Toolchain ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+ Input: /tmp/github_designs/aes/aes_combined.v
+ Top: aes
+ PDK: Sky130
+ Frequency: 100 MHz
+ Clock: clk
+ Output: /tmp/datagen_output/aes_sky130_100mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 18440 cells, 0.00 um^2
+ Wires: 15109, Modules: 7
+ Netlist: /tmp/zyphar_netlist_2107744.v
+ Duration: 15.3s
+
+--- CDC Analysis ---
+ No clock domain crossings detected
+
+--- Native Re-Optimization ---
+ Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+ Input netlist: /tmp/zyphar_netlist_2107744.v
+ PDK: Sky130, Freq: 100 MHz, Clock: clk
+ Utilization: 15%, Aspect ratio: 1.0, Placement density: 0.30 (user-specified)
+ PDN: false, Detailed route: true, Fillers: true, Antenna: true
+PnR complete: 155344 instances, 0.21 utilization
+ DEF: /tmp/zyphar_pnr_2107744.def
+ WNS: 1.430 ns
+ Duration: 1369.9s
+
+--- Multi-Corner STA ---
+ Using post-PnR netlist with SPEF back-annotation
+ ff_n40C_1v95 (fast) WNS: NaN ns TNS: NaN ns [VIOLATED]
+ tt_025C_1v80 (typical) WNS: NaN ns TNS: NaN ns [VIOLATED]
+ ss_n40C_1v40 (slow) WNS: NaN ns TNS: NaN ns [VIOLATED]
+
+--- Power Analysis ---
+ Power analysis skipped: No Liberty file available (use --liberty or set SKY130_LIBERTY)
+
+=== Step 3/3: GDS Generation ===
+GDS generation complete: /tmp/datagen_output/aes_sky130_100mhz/flow/aes.gds
+
+=== Signoff Checks ===
+
+--- DRC ---
+ DRC: 356 violations
+
+--- LVS ---
+ LVS: CLEAN
+
+═══════════════════════════════════════════
+ RESULTS
+═══════════════════════════════════════════
+
+Synthesis:
+ Cells: 18440
+ Netlist: /tmp/datagen_output/aes_sky130_100mhz/flow/netlist.v
+
+Place & Route:
+ DEF: /tmp/datagen_output/aes_sky130_100mhz/flow/output.def
+ WNS: 1.430 ns
+ Util: 21.0%
+ Instances: 155344
+ Area: 234253.00 um^2
+
+GDSII: /tmp/datagen_output/aes_sky130_100mhz/flow/aes.gds
+
+Multi-Corner STA:
+ ff_n40C_1v95 (fast) WNS: NaN ns TNS: NaN ns [VIOLATED]
+ tt_025C_1v80 (typical) WNS: NaN ns TNS: NaN ns [VIOLATED]
+ ss_n40C_1v40 (slow) WNS: NaN ns TNS: NaN ns [VIOLATED]
+
+SPEF: /tmp/datagen_output/aes_sky130_100mhz/flow/aes.spef
+
+Duration: 1783.94s
+
+Signoff:
+ Timing: MET
+ WNS: 1.430 ns
+ DRC: 356 violations
+ DRC report: /tmp/datagen_output/aes_sky130_100mhz/flow/drc_report.rpt
+ LVS: CLEAN
+ LVS report: /tmp/datagen_output/aes_sky130_100mhz/flow/lvs_report.lyrdb
+
+ SIGNOFF: FAIL
+ - DRC violations
+
+Flow completed successfully!
+
diff --git a/aes_sky130_100mhz/flow/klayout_lvs.log b/aes_sky130_100mhz/flow/klayout_lvs.log
new file mode 100644
index 0000000000000000000000000000000000000000..f60060601c7786c5e2936652c2c84949b2463fde
--- /dev/null
+++ b/aes_sky130_100mhz/flow/klayout_lvs.log
@@ -0,0 +1,611 @@
+=== stdout ===
+"polygons" in: lvs_deck_patched.lylvs:49
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.070s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:50
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+"polygons" in: lvs_deck_patched.lylvs:52
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+"extract_devices" in: lvs_deck_patched.lylvs:159
+ Elapsed: 0.290s Memory: 1250.00M
+"netlist" in: lvs_deck_patched.lylvs:199
+ Elapsed: 11.510s Memory: 1481.00M
+Flatten layout cell (no schematic): VIA_L1M1_PR_MR
+Flatten layout cell (no schematic): VIA_M2M3_PR
+Flatten layout cell (no schematic): VIA_M1M2_PR
+Flatten layout cell (no schematic): VIA_L1M1_PR
+Flatten layout cell (no schematic): VIA_M3M4_PR
+Flatten layout cell (no schematic): VIA_M4M5_PR
+Flatten layout cell (no schematic): VIA_M1M2_PR_MR
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2111O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2111O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A211O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A21BOI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A21BO_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A21BO_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A21BO_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A21O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A221O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A221O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A22O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A22O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2BB2OI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2BB2OI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2BB2O_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2BB2O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2BB2O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A311OI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A311O_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A311O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A311O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A31O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A31O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A32OI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A32OI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A32O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A32O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A41OI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A41O_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A41O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A41O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND2B_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND2B_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND2B_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND3B_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND3B_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND3_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND3_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND4BB_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND4BB_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND4BB_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND4B_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND4_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__BUFBUF_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__BUFBUF_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__BUFINV_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__BUF_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__BUF_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKBUF_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKBUF_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S15_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S15_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S18_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S18_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S25_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S25_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S50_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S50_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKINVLP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKINV_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DECAP_12
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DECAP_3
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DECAP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DECAP_6
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DECAP_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFBBN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFBBN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFBBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFRBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFRBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFRTN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFSBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFSBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFSTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFXBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFXBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFXTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFXTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFXTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DIODE_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLCLKP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLCLKP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLCLKP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRBN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRBN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTN_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXBN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXBN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXTN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXTN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXTN_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYGATE4SD1_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYGATE4SD2_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYGATE4SD3_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYMETAL6S2S_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYMETAL6S4S_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYMETAL6S6S_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EBUFN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EBUFN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EBUFN_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EBUFN_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EDFXBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EDFXTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVN_0
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVN_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVN_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVP_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FAHCIN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FAHCON_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FAH_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FA_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FA_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FA_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FILL_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FILL_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FILL_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FILL_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__HA_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__HA_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__HA_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__INV_12
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__INV_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__INV_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_BLEEDER_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKBUFKAPWR_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKBUFKAPWR_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKBUFKAPWR_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKBUFKAPWR_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKBUFKAPWR_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKINVKAPWR_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKINVKAPWR_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKINVKAPWR_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKINVKAPWR_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKINVKAPWR_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_DECAPKAPWR_12
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_DECAPKAPWR_3
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_DECAPKAPWR_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_DECAPKAPWR_6
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_DECAPKAPWR_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_INPUTISO0N_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_INPUTISO0P_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_INPUTISO1N_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_INPUTISOLATCH_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_ISOBUFSRCKAPWR_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_ISOBUFSRC_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_ISOBUFSRC_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_ISOBUFSRC_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_ISOBUFSRC_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_HL_ISOWELL_TAP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_HL_ISOWELL_TAP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_HL_ISOWELL_TAP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_ISOWELL_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_ISOWELL_TAP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_ISOWELL_TAP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_ISOWELL_TAP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__MACRO_SPARECELL
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CONB_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__INV_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__MAJ3_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__MAJ3_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__MAJ3_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__MUX4_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2111A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2111A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O211A_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O211A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O211A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O21A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O21BA_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O21BA_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O221A_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O221A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O221A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O22A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O22A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2BB2AI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2BB2AI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2BB2A_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2BB2A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2BB2A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O311AI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O311A_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O311A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O311A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O31AI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O31AI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O31A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O31A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O32AI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O32A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O32A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O41AI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O41AI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O41A_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O41A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O41A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2B_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2B_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2B_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2_0
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR4BB_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR4BB_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR4BB_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__PROBEC_P_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__PROBE_P_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFBBN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFBBN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFBBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRTN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFSBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFSBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFSTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFSTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFSTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFXBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFXBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFXTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFXTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFXTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDLCLKP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDLCLKP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDLCLKP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SEDFXBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SEDFXBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SEDFXTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SEDFXTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SEDFXTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__TAPVGND2_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__TAPVGND_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__TAP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__TAP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__XOR3_2
+Writing netlist: /tmp/datagen_output/aes_sky130_100mhz/flow/lvs_extracted.cir ..
+Writing LVS database: /tmp/datagen_output/aes_sky130_100mhz/flow/lvs_report.lyrdb ..
+Total elapsed: 25.700s Memory: 1460.00M
+INFO : Congratulations! Netlists match.
+
+=== stderr ===
diff --git a/aes_sky130_100mhz/flow/lvs_cleaned.gds.gz b/aes_sky130_100mhz/flow/lvs_cleaned.gds.gz
new file mode 100644
index 0000000000000000000000000000000000000000..0c94d7decffa6cd3b851114b13632485c7f0c83c
--- /dev/null
+++ b/aes_sky130_100mhz/flow/lvs_cleaned.gds.gz
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:aa14c4e37304d22924569995554ab53c5e935bea9b01c6ee2d8067bb3dd91da1
+size 3457360
diff --git a/aes_sky130_100mhz/flow/lvs_deck_patched.lylvs b/aes_sky130_100mhz/flow/lvs_deck_patched.lylvs
new file mode 100644
index 0000000000000000000000000000000000000000..e35252eb8a260d188e1097039be3783246c53b05
--- /dev/null
+++ b/aes_sky130_100mhz/flow/lvs_deck_patched.lylvs
@@ -0,0 +1,295 @@
+
+
+
+
+ lvs
+
+
+
+ false
+ false
+
+ true
+ lvs_scripts
+ tools_menu.lvs.end
+ dsl
+ lvs-dsl-xml
+ #
+# Extraction for SKY130
+#
+############################
+
+# optionnal for a batch launch : klayout -b -rd in_gds=my_layout.gds -rd report_file=my_report.lyrdb -rd cdl_file=reference_netlist.cir -rd target_netlist=extracted_netlist.cir -r sky130.lylvs
+if $in_gds
+ source($in_gds)
+end
+
+if $report_file
+ report_lvs($report_file)
+else
+ report_lvs("lvs_report.lvsdb")
+end
+
+if $cdl_file
+#reference netlist
+ schematic($cdl_file)
+else
+ schematic("sky130hd.cdl")
+end
+
+# true: use net names instead of numbers
+# false: use numbers for nets
+spice_with_net_names = true
+
+# true: put in comments with details
+# false: no comments
+spice_with_comments = false
+
+if $target_netlist
+ target_netlist($target_netlist)
+else
+ # target_netlist("netlist.cir", write_spice(spice_with_net_names, spice_with_comments), "The netlist comment goes here.")
+ target_netlist(File.join(File.dirname(RBA::CellView::active.filename), source.cell_name+"_extracted.cir"), write_spice(spice_with_net_names, spice_with_comments), "Extracted by KLayout on : #{Time.now.strftime("%d/%m/%Y %H:%M")}")
+end
+
+# Hierarchical mode
+deep
+# Use 4 CPU cores
+threads(4)
+# Print details
+verbose(true)
+
+
+# layers definitions
+########################
+BOUND = polygons(235, 4)
+DNWELL = polygons(64, 18)
+PWRES = polygons(64, 13)
+NWELL = polygons(64, 20)
+NWELLTXT = input(64, 5)
+NWELLPIN = polygons(64, 16)
+SUBTXT = input(122, 5)
+SUBPIN = input(64, 59)
+DIFF = polygons(65, 20)
+TAP = polygons(65, 44)
+PSDM = polygons(94, 20)
+NSDM = polygons(93, 44)
+LVTN = polygons(125, 44)
+HVTR = polygons(18, 20)
+HVTP = polygons(78, 44)
+SONOS = polygons(80, 20)
+COREID = polygons(81, 2)
+STDCELL = polygons(81, 4)
+NPNID = polygons(82, 20)
+PNPID = polygons(82, 44)
+RPM = polygons(86, 20)
+URPM = polygons(79, 20)
+LDNTM = polygons(11, 44)
+HVNTM = polygons(125, 20)
+POLY = polygons(66, 20)
+POLYTXT = input(66, 5)
+POLYPIN = polygons(66, 16)
+HVI = polygons(75, 20)
+LICON = polygons(66, 44)
+NPC = polygons(95, 20)
+DIFFRES = polygons(65, 13)
+POLYRES = polygons(66, 13)
+POLYSHO = polygons(66, 15)
+DIODE = polygons(81, 23)
+LI = polygons(67, 20)
+LITXT = input(67, 5)
+LIPIN = polygons(67, 16)
+LIRES = polygons(67, 13)
+MCON = polygons(67, 44)
+MET1 = polygons(68, 20)
+MET1TXT = input(68, 5)
+MET1PIN = polygons(68, 16)
+MET1RES = polygons(68, 13)
+VIA1 = polygons(68, 44)
+MET2 = polygons(69, 20)
+MET2TXT = input(69, 5)
+MET2PIN = polygons(69, 16)
+MET2RES = polygons(69, 13)
+VIA2 = polygons(69, 44)
+MET3 = polygons(70, 20)
+MET3TXT = input(70, 5)
+MET3PIN = polygons(70, 16)
+MET3RES = polygons(70, 13)
+VIA3 = polygons(70, 44)
+MET4 = polygons(71, 20)
+MET4TXT = input(71, 5)
+MET4PIN = polygons(71, 16)
+MET4RES = polygons(71, 13)
+VIA4 = polygons(71, 44)
+MET5 = polygons(72, 20)
+MET5TXT = input(72, 5)
+MET5PIN = polygons(72, 16)
+MET5RES = polygons(72, 13)
+RDL = polygons(74, 20)
+RDLTXT = input(74, 5)
+RDLPIN = polygons(74, 16)
+GLASS = polygons(76, 20)
+CAPM = polygons(89, 44)
+CAPM2 = polygons(97, 44)
+LOWTAPD = polygons(81, 14)
+FILLOBSM1 = polygons(62, 24)
+FILLOBSM2 = polygons(105, 52)
+FILLOBSM3 = polygons(107, 24)
+FILLOBSM4 = polygons(112, 4)
+NCM = polygons(92, 44)
+
+# Bulk layer for terminal provisioning
+SUB = polygons(236, 0)
+# SUB = polygon_layer
+
+# Computed layers
+PDIFF = DIFF & NWELL & PSDM
+NTAP = TAP & NWELL & NSDM
+PGATE = PDIFF & POLY
+PSD = PDIFF - PGATE
+STD_PGATE = PGATE - HVTP - NCM - HVI
+HVT_PGATE = PGATE & HVTP - NCM - HVI
+HV5_PGATE = PGATE - HVTP - NCM & HVI
+
+NDIFF = DIFF - NWELL & NSDM
+PTAP = TAP - NWELL & PSDM
+NGATE = NDIFF & POLY
+NSD = NDIFF - NGATE
+STD_NGATE = NGATE - NCM - LVTN - HVI
+LVT_NGATE = NGATE - NCM & LVTN - HVI
+HV5_NGATE = NGATE - NCM - LVTN & HVI
+HV5NA_NGATE = NGATE - NCM & LVTN & HVI
+
+# drawing to physical
+device_scaling(1000000)
+
+# PMOS transistor device extraction
+extract_devices(mos4("pfet_01v8"), { "SD" => PSD, "G" => STD_PGATE, "tS" => PSD, "tD" => PSD, "tG" => POLY, "W" => NWELL })
+extract_devices(mos4("pfet_01v8_hvt"), { "SD" => PSD, "G" => HVT_PGATE, "tS" => PSD, "tD" => PSD, "tG" => POLY, "W" => NWELL })
+extract_devices(mos4("pfet_g5v0d10v5"), { "SD" => PSD, "G" => HV5_PGATE, "tS" => PSD, "tD" => PSD, "tG" => POLY, "W" => NWELL })
+
+# NMOS transistor device extraction
+extract_devices(mos4("nfet_01v8"), { "SD" => NSD, "G" => STD_NGATE, "tS" => NSD, "tD" => NSD, "tG" => POLY, "W" => SUB })
+extract_devices(mos4("nfet_01v8_lvt"), { "SD" => NSD, "G" => LVT_NGATE, "tS" => NSD, "tD" => NSD, "tG" => POLY, "W" => SUB })
+extract_devices(mos4("nfet_g5v0d10v5"), { "SD" => NSD, "G" => HV5_NGATE, "tS" => NSD, "tD" => NSD, "tG" => POLY, "W" => SUB })
+extract_devices(mos4("nfet_01v8_nvt"), { "SD" => NSD, "G" => HV5NA_NGATE, "tS" => NSD, "tD" => NSD, "tG" => POLY, "W" => SUB })
+
+
+# Define connectivity for netlist extraction
+
+# Inter-layer
+connect(SUB, PTAP)
+connect(NWELL, NTAP)
+connect(LICON, PTAP)
+connect(LICON, NTAP)
+connect(PSD, LICON)
+connect(NSD, LICON)
+connect(POLY, LICON)
+connect(LICON, LI)
+connect(LI, MCON)
+connect(MCON, MET1)
+connect(MET1,VIA1)
+connect(VIA1, MET2)
+connect(MET2, VIA2)
+connect(VIA2, MET3)
+connect(MET3, VIA3)
+connect(VIA3, MET4)
+connect(MET4, VIA4)
+connect(VIA4, MET5)
+# Attaching labels
+connect(SUB, SUBTXT)
+connect(SUB, SUBPIN)
+connect(NWELL, NWELLTXT)
+connect(POLY, POLYTXT)
+connect(LI, LITXT)
+connect(MET1, MET1TXT)
+connect(MET2, MET2TXT)
+connect(MET3, MET3TXT)
+connect(MET4, MET4TXT)
+connect(MET5, MET5TXT)
+
+# Global
+connect_global(SUB, "VNB")
+
+# Actually performs the extraction
+netlist # ... not really required
+
+# Flatten cells which are present in one netlist only
+align
+
+# Flat LVS: flatten all cells to transistor level.
+# This avoids hierarchical port identification issues where
+# KLayout misses output pins on cells whose LI shapes are
+# only on the PIN datatype (67/16) not DRAWING (67/20).
+netlist.flatten_circuit("*")
+schematic.flatten_circuit("*")
+
+netlist.make_top_level_pins
+netlist.combine_devices
+netlist.purge
+schematic.combine_devices
+schematic.purge
+
+# Tolerances for the devices extracted parameters
+# tolerance(device_class_name, parameter_name [, :absolute => absolute_tolerance] [, :relative => relative_tolerance])
+tolerance("pfet_01v8", "W", :absolute => 1.nm, :relative => 0.001)
+tolerance("pfet_01v8", "L", :absolute => 1.nm, :relative => 0.001)
+tolerance("pfet_01v8_hvt", "W", :absolute => 1.nm, :relative => 0.001)
+tolerance("pfet_01v8_hvt", "L", :absolute => 1.nm, :relative => 0.001)
+tolerance("nfet_01v8", "W", :absolute => 1.nm, :relative => 0.001)
+tolerance("nfet_01v8", "L", :absolute => 1.nm, :relative => 0.001)
+tolerance("nfet_01v8_lvt", "W", :absolute => 1.nm, :relative => 0.001)
+tolerance("nfet_01v8_lvt", "L", :absolute => 1.nm, :relative => 0.001)
+
+# NangateOpenCellLibrary Digital gates input equivalence :
+equivalent_pins("*AND2_1", "A", "B")
+equivalent_pins("*AND2_2", "A", "B")
+equivalent_pins("*AND2_4", "A", "B")
+equivalent_pins("*AND3_1", "A", "B", "C")
+equivalent_pins("*AND3_2", "A", "B", "C")
+equivalent_pins("*AND3_4", "A", "B", "C")
+equivalent_pins("*AND4_1", "A", "B", "C", "D")
+equivalent_pins("*AND4_2", "A", "B", "C", "D")
+equivalent_pins("*AND4_4", "A", "B", "C", "D")
+equivalent_pins("*NAND2_1", "A", "B")
+equivalent_pins("*NAND2_2", "A", "B")
+equivalent_pins("*NAND2_4", "A", "B")
+equivalent_pins("*NAND3_1", "A", "B", "C")
+equivalent_pins("*NAND3_2", "A", "B", "C")
+equivalent_pins("*NAND3_4", "A", "B", "C")
+equivalent_pins("*NAND4_X1", "A", "B", "C", "D")
+equivalent_pins("*NAND4_2", "A", "B", "C", "D")
+equivalent_pins("*NAND4_4", "A", "B", "C", "D")
+equivalent_pins("*OR2_1", "A", "B")
+equivalent_pins("*OR2_2", "A", "B")
+equivalent_pins("*OR2_4", "A", "B")
+equivalent_pins("*OR3_1", "A", "B", "C")
+equivalent_pins("*OR3_2", "A", "B", "C")
+equivalent_pins("*OR3_4", "A", "B", "C")
+equivalent_pins("*OR4_1", "A", "B", "C", "D")
+equivalent_pins("*OR4_2", "A", "B", "C", "D")
+equivalent_pins("*OR4_4", "A", "B", "C", "D")
+equivalent_pins("*NOR2_1", "A", "B")
+equivalent_pins("*NOR2_2", "A", "B")
+equivalent_pins("*NOR2_4", "A", "B")
+equivalent_pins("*NOR3_1", "A", "B", "C")
+equivalent_pins("*NOR3_2", "A", "B", "C")
+equivalent_pins("*NOR3_4", "A", "B", "C")
+equivalent_pins("*NOR4_1", "A", "B", "C", "D")
+equivalent_pins("*NOR4_2", "A", "B", "C", "D")
+equivalent_pins("*NOR4_4", "A", "B", "C", "D")
+equivalent_pins("*XOR2_1", "A", "B")
+equivalent_pins("*XOR2_2", "A", "B")
+equivalent_pins("*XNOR2_1", "A", "B")
+equivalent_pins("*XNOR2_2", "A", "B")
+
+#max_res(1000000)
+#min_caps(1e-15)
+
+if ! compare
+ #raise "ERROR : Netlists don't match"
+ puts "ERROR : Netlists don't match"
+else
+ puts "INFO : Congratulations! Netlists match."
+end
+
diff --git a/aes_sky130_100mhz/flow/lvs_extracted.cir b/aes_sky130_100mhz/flow/lvs_extracted.cir
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/aes_sky130_100mhz/flow/lvs_report.lyrdb b/aes_sky130_100mhz/flow/lvs_report.lyrdb
new file mode 100644
index 0000000000000000000000000000000000000000..59a26dc9fb6b18fbcc86c560e1fa0b30c3c1fa63
--- /dev/null
+++ b/aes_sky130_100mhz/flow/lvs_report.lyrdb
@@ -0,0 +1,12622 @@
+#%lvsdb-klayout
+J(
+ W(aes)
+ U(0.001)
+ L(l3 '64/20')
+ L(l29 '64/5')
+ L(l27)
+ L(l28 '64/59')
+ L(l4 '66/20')
+ L(l30)
+ L(l15 '66/44')
+ L(l16 '67/20')
+ L(l31 '67/5')
+ L(l17 '67/44')
+ L(l18 '68/20')
+ L(l32 '68/5')
+ L(l19 '68/44')
+ L(l20 '69/20')
+ L(l33 '69/5')
+ L(l21 '69/44')
+ L(l22 '70/20')
+ L(l34)
+ L(l23 '70/44')
+ L(l24 '71/20')
+ L(l35)
+ L(l25 '71/44')
+ L(l26 '72/20')
+ L(l36)
+ L(l9 '236/0')
+ L(l8)
+ L(l14)
+ L(l2)
+ L(l13)
+ C(l3 l3 l29 l14)
+ C(l29 l3 l29)
+ C(l27 l27 l9)
+ C(l28 l28 l9)
+ C(l4 l4 l30 l15)
+ C(l30 l4 l30)
+ C(l15 l4 l15 l16 l8 l14 l2 l13)
+ C(l16 l15 l16 l31 l17)
+ C(l31 l16 l31)
+ C(l17 l16 l17 l18)
+ C(l18 l17 l18 l32 l19)
+ C(l32 l18 l32)
+ C(l19 l18 l19 l20)
+ C(l20 l19 l20 l33 l21)
+ C(l33 l20 l33)
+ C(l21 l20 l21 l22)
+ C(l22 l21 l22 l34 l23)
+ C(l34 l22 l34)
+ C(l23 l22 l23 l24)
+ C(l24 l23 l24 l35 l25)
+ C(l35 l24 l35)
+ C(l25 l24 l25 l26)
+ C(l26 l25 l26 l36)
+ C(l36 l26 l36)
+ C(l9 l27 l28 l9 l13)
+ C(l8 l15 l8)
+ C(l14 l3 l15 l14)
+ C(l2 l15 l2)
+ C(l13 l15 l9 l13)
+ G(l9 VNB)
+ K(pfet_01v8 MOS4)
+ K(pfet_01v8_hvt MOS4)
+ K(pfet_g5v0d10v5 MOS4)
+ K(nfet_01v8 MOS4)
+ K(nfet_01v8_lvt MOS4)
+ K(nfet_g5v0d10v5 MOS4)
+ K(nfet_01v8_nvt MOS4)
+ D(D$pfet_01v8_hvt pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$1 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$2 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$3 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$4 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$5 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (790 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$6 pfet_01v8_hvt
+ T(S
+ R(l2 (-865 -500) (790 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$7 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$8 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$9 pfet_01v8_hvt
+ T(S
+ Q(l2 (-470 -595) (0 1000) (260 0) (0 -195) (135 0) (0 -420) (-135 0) (0 -385))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (365 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$10 pfet_01v8_hvt
+ T(S
+ R(l2 (-440 -210) (365 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (920 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$11 pfet_01v8_hvt
+ T(S
+ R(l2 (-995 -210) (920 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (210 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$12 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (330 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$13 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (280 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$14 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (260 0) (0 -195) (135 0) (0 -420) (-135 0) (0 -385))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$15 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (130 0) (0 580) (260 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$16 pfet_01v8_hvt
+ T(S
+ Q(l2 (-465 -500) (0 420) (130 0) (0 580) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$17 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$18 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -790) (0 580) (-75 0) (0 420) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$19 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 580) (-75 0) (0 420) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$20 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (655 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$21 pfet_01v8_hvt
+ T(S
+ R(l2 (-730 -500) (655 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$22 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (420 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$23 pfet_01v8_hvt
+ T(S
+ R(l2 (-495 -500) (420 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (440 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$24 pfet_01v8_hvt
+ T(S
+ R(l2 (-515 -500) (440 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$25 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$26 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (315 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$27 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -225) (0 15) (-75 0) (0 420) (75 0) (0 270) (-10 0) (0 295) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-390 -210) (315 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$28 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 15) (-75 0) (0 420) (75 0) (0 270) (-10 0) (0 295) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$29 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$30 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (350 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$31 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -210) (350 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (370 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$32 pfet_01v8_hvt
+ T(S
+ R(l2 (-445 -210) (370 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (280 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$33 pfet_01v8_hvt
+ T(S
+ Q(l2 (170 -790) (0 580) (-95 0) (0 420) (680 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-355 -210) (280 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$34 pfet_01v8_hvt
+ T(S
+ Q(l2 (-660 -500) (0 580) (-95 0) (0 420) (680 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$35 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$36 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$37 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 710) (-10 0) (0 290) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$38 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$39 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$40 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (250 0) (0 -715) (10 0) (0 -285))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$41 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -320) (265 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (240 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$42 pfet_01v8_hvt
+ T(S
+ R(l2 (-315 -320) (240 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$43 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -320) (280 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (285 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$44 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$45 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (390 0) (0 -700) (-140 0) (0 -300))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$46 pfet_01v8_hvt
+ T(S
+ Q(l2 (-465 -650) (0 1000) (390 0) (0 -700) (-140 0) (0 -300))
+ )
+ T(G
+ R(l4 (-75 -350) (150 700))
+ )
+ T(D
+ R(l2 (75 -350) (260 700))
+ )
+ T(B
+ R(l3 (-75 -350) (150 700))
+ )
+ )
+ D(D$pfet_01v8_hvt$47 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$48 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$49 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$50 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$51 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$52 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$53 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -500) (265 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$54 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (295 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$55 pfet_01v8_hvt
+ T(S
+ R(l2 (-370 -500) (295 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$56 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 360) (-80 0) (0 640) (330 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$57 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -420) (260 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (75 -420) (0 840) (345 0) (0 -420) (-75 0) (0 -420))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$58 pfet_01v8_hvt
+ T(S
+ Q(l2 (-420 -630) (0 840) (345 0) (0 -420) (-75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (280 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$59 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$60 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (390 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$61 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -210) (390 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$62 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$63 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (310 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$64 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -210) (310 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (345 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$65 pfet_01v8_hvt
+ T(S
+ R(l2 (-420 -210) (345 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (550 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$66 pfet_01v8_hvt
+ T(S
+ R(l2 (-625 -210) (550 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (335 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$67 pfet_01v8_hvt
+ T(S
+ R(l2 (-410 -210) (335 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$68 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -320) (260 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$69 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (260 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$70 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$71 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 360) (-80 0) (0 640) (330 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$72 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$73 pfet_01v8_hvt
+ T(S
+ R(l2 (-350 -500) (275 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$74 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -395) (260 790))
+ )
+ T(G
+ R(l4 (-75 -395) (150 790))
+ )
+ T(D
+ R(l2 (75 -395) (290 790))
+ )
+ T(B
+ R(l3 (-75 -395) (150 790))
+ )
+ )
+ D(D$pfet_01v8_hvt$75 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -395) (290 790))
+ )
+ T(G
+ R(l4 (-75 -395) (150 790))
+ )
+ T(D
+ R(l2 (75 -395) (260 790))
+ )
+ T(B
+ R(l3 (-75 -395) (150 790))
+ )
+ )
+ D(D$pfet_01v8_hvt$76 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (325 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$77 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -500) (325 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (315 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$78 pfet_01v8_hvt
+ T(S
+ R(l2 (-390 -500) (315 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$79 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$80 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$81 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -500) (325 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (1075 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$82 pfet_01v8_hvt
+ T(S
+ R(l2 (-1150 -500) (1075 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$83 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (335 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$84 pfet_01v8_hvt
+ T(S
+ R(l2 (-410 -500) (335 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (1265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$85 pfet_01v8_hvt
+ T(S
+ R(l2 (-1340 -500) (1265 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$86 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (350 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$87 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -500) (350 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$88 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$89 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$90 pfet_01v8_hvt
+ T(S
+ Q(l2 (-355 -500) (0 245) (10 0) (0 755) (270 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$91 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (260 0) (0 -680) (-10 0) (0 -320))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$92 pfet_01v8_hvt
+ T(S
+ R(l2 (-350 -500) (275 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$93 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$94 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$95 pfet_01v8_hvt
+ T(S
+ R(l2 (-375 -500) (300 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$96 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (730 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$97 pfet_01v8_hvt
+ T(S
+ R(l2 (-805 -500) (730 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$98 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$99 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (360 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$100 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$101 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (405 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$102 pfet_01v8_hvt
+ T(S
+ R(l2 (-480 -500) (405 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$103 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$104 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$105 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -500) (325 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$106 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -500) (265 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$107 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$108 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$109 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (635 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$110 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$111 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$112 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (770 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$113 pfet_01v8_hvt
+ T(S
+ R(l2 (-845 -500) (770 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$114 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$115 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (430 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$116 pfet_01v8_hvt
+ T(S
+ R(l2 (-505 -500) (430 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$117 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$118 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$119 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -500) (265 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$120 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$121 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$122 pfet_01v8_hvt
+ T(S
+ R(l2 (-350 -500) (275 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (455 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$123 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$124 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$125 pfet_01v8_hvt
+ T(S
+ R(l2 (-375 -500) (300 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$126 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (620 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$127 pfet_01v8_hvt
+ T(S
+ R(l2 (-695 -500) (620 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$128 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (285 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$129 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$130 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$131 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$132 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (380 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$133 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -500) (350 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$134 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (295 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$135 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$136 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$137 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (360 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$138 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$139 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$140 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (265 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$141 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (355 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$142 pfet_01v8_hvt
+ T(S
+ R(l2 (-430 -500) (355 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$143 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$144 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$145 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$146 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (745 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$147 pfet_01v8_hvt
+ T(S
+ R(l2 (-820 -500) (745 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (235 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$148 pfet_01v8_hvt
+ T(S
+ R(l2 (-310 -500) (235 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (470 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$149 pfet_01v8_hvt
+ T(S
+ R(l2 (-545 -500) (470 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$150 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$151 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (315 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$152 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -320) (280 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$153 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$154 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (450 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$155 pfet_01v8_hvt
+ T(S
+ R(l2 (-525 -320) (450 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (370 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$156 pfet_01v8_hvt
+ T(S
+ R(l2 (-445 -320) (370 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (310 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$157 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (785 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$158 pfet_01v8_hvt
+ T(S
+ R(l2 (-860 -500) (785 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$159 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$160 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (345 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$161 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$162 pfet_01v8_hvt
+ T(S
+ R(l2 (-505 -500) (430 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$163 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (285 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$164 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$165 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -420) (260 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (270 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$166 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -420) (270 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (280 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$167 pfet_01v8_hvt
+ T(S
+ R(l2 (-390 -500) (265 1000))
+ )
+ T(G
+ R(l4 (-125 -500) (250 1000))
+ )
+ T(D
+ R(l2 (125 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-125 -500) (250 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$168 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-125 -500) (250 1000))
+ )
+ T(D
+ R(l2 (125 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-125 -500) (250 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$169 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-125 -500) (250 1000))
+ )
+ T(D
+ R(l2 (125 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-125 -500) (250 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$170 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (225 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$171 pfet_01v8_hvt
+ T(S
+ R(l2 (-300 -500) (225 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (465 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$172 pfet_01v8_hvt
+ T(S
+ R(l2 (-540 -500) (465 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$173 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$174 pfet_01v8_hvt
+ T(S
+ Q(l2 (-680 -320) (0 840) (495 0) (0 -200) (110 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (300 0) (0 160) (425 0) (0 -640) (-250 0) (0 -160))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$175 pfet_01v8_hvt
+ T(S
+ Q(l2 (-800 -480) (0 640) (300 0) (0 160) (425 0) (0 -640) (-250 0) (0 -160))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (75 0) (0 200) (290 0) (0 -840))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$176 pfet_01v8_hvt
+ T(S
+ R(l2 (-495 -420) (420 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (75 -420) (0 840) (495 0) (0 -200) (110 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$177 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -580) (0 160) (-75 0) (0 840) (355 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (-440 -420) (0 640) (75 0) (0 200) (290 0) (0 -840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$178 pfet_01v8_hvt
+ T(S
+ Q(l2 (-355 -500) (0 160) (-75 0) (0 840) (355 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$179 pfet_01v8_hvt
+ T(S
+ Q(l2 (-440 -320) (0 1000) (290 0) (0 -360) (75 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$180 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (290 0) (0 -360) (75 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$181 pfet_01v8_hvt
+ T(S
+ Q(l2 (-330 -500) (0 690) (-5 0) (0 310) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$182 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -420) (0 140) (-85 0) (0 840) (260 0) (0 -140) (75 0) (0 -840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (75 -420) (0 840) (380 0) (0 -210) (5 0) (0 -630))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$183 pfet_01v8_hvt
+ T(S
+ Q(l2 (160 -560) (0 140) (-85 0) (0 840) (260 0) (0 -140) (75 0) (0 -840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (-400 -420) (325 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$184 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (1110 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$185 pfet_01v8_hvt
+ T(S
+ R(l2 (-1185 -500) (1110 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$186 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$187 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (495 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$188 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$189 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (380 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$190 pfet_01v8_hvt
+ T(S
+ R(l2 (-455 -500) (380 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$191 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (380 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$192 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (380 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$193 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 580) (260 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$194 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -500) (0 420) (75 0) (0 580) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$195 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (385 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$196 pfet_01v8_hvt
+ T(S
+ R(l2 (-460 -500) (385 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$197 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$198 pfet_01v8_hvt
+ T(S
+ R(l2 (-830 -500) (755 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (345 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$199 pfet_01v8_hvt
+ T(S
+ R(l2 (-420 -500) (345 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (370 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$200 pfet_01v8_hvt
+ T(S
+ R(l2 (-445 -500) (370 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (580 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$201 pfet_01v8_hvt
+ T(S
+ R(l2 (-655 -500) (580 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$202 pfet_01v8_hvt
+ T(S
+ R(l2 (-350 -500) (275 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$203 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (655 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$204 pfet_01v8_hvt
+ T(S
+ R(l2 (-730 -500) (655 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$205 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$206 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (325 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$207 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -500) (325 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$208 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$209 pfet_01v8_hvt
+ T(S
+ R(l2 (-375 -500) (300 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$210 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (290 0) (0 -360) (75 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$211 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -680) (0 360) (-75 0) (0 640) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (-335 -320) (260 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$212 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 360) (-75 0) (0 640) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$213 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -630) (0 420) (-75 0) (0 420) (330 0) (0 -840))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$214 pfet_01v8_hvt
+ T(S
+ Q(l2 (-330 -420) (0 420) (-75 0) (0 420) (330 0) (0 -840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (260 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$215 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -420) (260 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (75 -420) (0 840) (335 0) (0 -420) (-75 0) (0 -420))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$216 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -630) (0 840) (335 0) (0 -420) (-75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$217 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (450 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$218 pfet_01v8_hvt
+ T(S
+ R(l2 (-525 -210) (450 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (380 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$219 pfet_01v8_hvt
+ T(S
+ R(l2 (-455 -210) (380 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$220 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$221 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (210 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$222 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (390 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$223 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -210) (390 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (210 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$224 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$225 pfet_01v8_hvt
+ T(S
+ R(l2 (-460 -500) (385 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$226 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (210 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$227 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (325 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$228 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -210) (325 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$229 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -500) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$230 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (430 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$231 pfet_01v8_hvt
+ T(S
+ R(l2 (-505 -500) (430 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$232 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (290 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$233 pfet_01v8_hvt
+ T(S
+ Q(l2 (205 -430) (0 220) (-130 0) (0 420) (620 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-365 -210) (290 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$234 pfet_01v8_hvt
+ T(S
+ Q(l2 (-565 -320) (0 220) (-130 0) (0 420) (620 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (265 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$235 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (285 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$236 pfet_01v8_hvt
+ T(S
+ R(l2 (-360 -500) (285 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$237 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$238 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$239 pfet_01v8_hvt
+ T(S
+ R(l2 (-410 -500) (335 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$240 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$241 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (410 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$242 pfet_01v8_hvt
+ T(S
+ R(l2 (-485 -500) (410 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$243 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 580) (260 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$244 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -500) (0 420) (75 0) (0 580) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (340 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$245 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (350 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$246 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -500) (350 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$247 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$248 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (425 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$249 pfet_01v8_hvt
+ T(S
+ R(l2 (-500 -500) (425 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (410 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$250 pfet_01v8_hvt
+ T(S
+ R(l2 (-485 -500) (410 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$251 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (425 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$252 pfet_01v8_hvt
+ T(S
+ R(l2 (-500 -500) (425 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (370 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$253 pfet_01v8_hvt
+ T(S
+ Q(l2 (-685 -320) (0 840) (500 0) (0 -200) (110 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (300 0) (0 160) (425 0) (0 -640) (-250 0) (0 -160))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$254 pfet_01v8_hvt
+ T(S
+ Q(l2 (-490 -420) (0 340) (-10 0) (0 500) (425 0) (0 -840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (75 -420) (0 840) (500 0) (0 -200) (110 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$255 pfet_01v8_hvt
+ T(S
+ Q(l2 (-355 -500) (0 160) (-75 0) (0 840) (355 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$256 pfet_01v8_hvt
+ T(S
+ Q(l2 (-420 -320) (0 1000) (260 0) (0 -360) (85 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (320 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$257 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (260 0) (0 -360) (85 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$258 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -420) (260 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (380 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$259 pfet_01v8_hvt
+ T(S
+ R(l2 (-455 -420) (380 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (525 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$260 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (250 0) (0 -740) (10 0) (0 -260))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$261 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$262 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -500) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$263 pfet_01v8_hvt
+ T(S
+ Q(l2 (-525 -320) (0 1000) (375 0) (0 -360) (75 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$264 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (375 0) (0 -360) (75 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$265 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -420) (320 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (380 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$266 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (840 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$267 pfet_01v8_hvt
+ T(S
+ R(l2 (-915 -500) (840 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$268 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -320) (265 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$269 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -320) (280 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$270 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -320) (280 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (265 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$271 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$272 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$273 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (395 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$274 pfet_01v8_hvt
+ T(S
+ R(l2 (-470 -500) (395 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (600 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$275 pfet_01v8_hvt
+ T(S
+ R(l2 (-675 -500) (600 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$276 pfet_01v8_hvt
+ T(S
+ Q(l2 (-335 -210) (0 565) (-75 0) (0 420) (260 0) (0 -565) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$277 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -775) (0 565) (-75 0) (0 420) (260 0) (0 -565) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$278 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (800 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$279 pfet_01v8_hvt
+ T(S
+ R(l2 (-875 -500) (800 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$280 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (335 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$281 pfet_01v8_hvt
+ T(S
+ R(l2 (-360 -500) (285 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$282 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (770 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$283 pfet_01v8_hvt
+ T(S
+ R(l2 (-370 -320) (295 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (210 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$284 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -320) (210 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (210 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$285 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -320) (210 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$286 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -320) (280 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (380 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$287 pfet_01v8_hvt
+ T(S
+ R(l2 (-455 -320) (380 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (305 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$288 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (330 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$289 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (210 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$290 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -500) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$291 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (470 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$292 pfet_01v8_hvt
+ T(S
+ R(l2 (-545 -210) (470 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (610 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$293 pfet_01v8_hvt
+ T(S
+ R(l2 (-685 -210) (610 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (315 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$294 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -790) (0 580) (-75 0) (0 420) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-390 -210) (315 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$295 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 580) (-75 0) (0 420) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$296 pfet_01v8_hvt
+ T(S
+ R(l2 (-460 -500) (385 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (250 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$297 pfet_01v8_hvt
+ T(S
+ R(l2 (-325 -500) (250 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (360 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$298 pfet_01v8_hvt
+ T(S
+ R(l2 (-435 -500) (360 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (560 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$299 pfet_01v8_hvt
+ T(S
+ R(l2 (-635 -500) (560 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$300 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$301 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$302 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -500) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$303 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (315 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$304 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -210) (0 1000) (265 0) (0 -580) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$305 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$306 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -525) (0 315) (-75 0) (0 420) (75 0) (0 265) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$307 pfet_01v8_hvt
+ T(S
+ Q(l2 (-335 -500) (0 315) (-75 0) (0 420) (75 0) (0 265) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$308 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (265 0) (0 -580) (75 0) (0 -420))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$309 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -500) (265 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (345 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$310 pfet_01v8_hvt
+ T(S
+ R(l2 (-420 -500) (345 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$311 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$312 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$313 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$314 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (325 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$315 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -210) (325 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (215 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$316 pfet_01v8_hvt
+ T(S
+ R(l2 (-290 -210) (215 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (305 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$317 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -210) (305 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$318 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (610 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$319 pfet_01v8_hvt
+ T(S
+ R(l2 (-685 -500) (610 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (490 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$320 pfet_01v8_hvt
+ T(S
+ R(l2 (-565 -500) (490 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$321 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -405) (0 1000) (260 0) (0 -385) (75 0) (0 -420) (-75 0) (0 -195))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$322 pfet_01v8_hvt
+ T(S
+ R(l2 (-595 -500) (520 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$323 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (260 0) (0 -385) (75 0) (0 -420) (-75 0) (0 -195))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$324 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (475 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$325 pfet_01v8_hvt
+ T(S
+ R(l2 (-550 -500) (475 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$326 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (295 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$327 pfet_01v8_hvt
+ T(S
+ R(l2 (-370 -500) (295 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$328 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (250 0) (0 -665) (10 0) (0 -335))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$329 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 715) (-10 0) (0 285) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$330 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (670 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$331 pfet_01v8_hvt
+ T(S
+ R(l2 (-745 -500) (670 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$332 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (420 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$333 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (820 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$334 pfet_01v8_hvt
+ T(S
+ R(l2 (-895 -500) (820 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (360 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$335 pfet_01v8_hvt
+ T(S
+ R(l2 (-435 -500) (360 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (350 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$336 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$337 pfet_01v8_hvt
+ T(S
+ Q(l2 (155 -580) (0 370) (-80 0) (0 420) (130 0) (0 210) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-345 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$338 pfet_01v8_hvt
+ T(S
+ Q(l2 (-385 -500) (0 370) (-80 0) (0 420) (130 0) (0 210) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (475 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$339 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (395 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$340 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$341 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (345 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$342 pfet_01v8_hvt
+ T(S
+ R(l2 (-420 -500) (345 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$343 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$344 pfet_01v8_hvt
+ T(S
+ R(l2 (-375 -500) (300 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (400 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$345 pfet_01v8_hvt
+ T(S
+ R(l2 (-475 -500) (400 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$346 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (370 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$347 pfet_01v8_hvt
+ T(S
+ R(l2 (-445 -500) (370 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$348 pfet_01v8_hvt
+ T(S
+ R(l2 (-435 -500) (360 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$349 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$350 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (425 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$351 pfet_01v8_hvt
+ T(S
+ R(l2 (-500 -500) (425 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (345 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$352 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$353 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (80 0) (0 580) (260 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$354 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -500) (0 420) (80 0) (0 580) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$355 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (670 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$356 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (470 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$357 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -485) (0 275) (-75 0) (0 420) (75 0) (0 305) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$358 pfet_01v8_hvt
+ T(S
+ Q(l2 (-400 -500) (0 275) (-75 0) (0 420) (75 0) (0 305) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$359 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (255 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$360 pfet_01v8_hvt
+ T(S
+ R(l2 (-330 -500) (255 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$361 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -790) (0 580) (-75 0) (0 420) (395 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$362 pfet_01v8_hvt
+ T(S
+ Q(l2 (-395 -500) (0 580) (-75 0) (0 420) (395 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$363 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (435 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$364 pfet_01v8_hvt
+ T(S
+ Q(l2 (-395 -500) (0 580) (-75 0) (0 420) (395 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$365 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (350 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$366 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -500) (350 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (350 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$367 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -375) (0 1000) (260 0) (0 -415) (75 0) (0 -420) (-75 0) (0 -165))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$368 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (260 0) (0 -415) (75 0) (0 -420) (-75 0) (0 -165))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$369 pfet_01v8_hvt
+ T(S
+ R(l2 (-370 -500) (295 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$370 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$371 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$372 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -210) (0 70) (-75 0) (0 420) (250 0) (0 -70) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 285) (-10 0) (0 295) (260 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$373 pfet_01v8_hvt
+ T(S
+ Q(l2 (-335 -210) (0 350) (10 0) (0 70) (250 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$374 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -280) (0 70) (-75 0) (0 420) (250 0) (0 -70) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-345 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$375 pfet_01v8_hvt
+ T(S
+ Q(l2 (-400 -500) (0 420) (75 0) (0 285) (-10 0) (0 295) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$376 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (260 0) (0 -370) (-10 0) (0 -50))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$377 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (740 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$378 pfet_01v8_hvt
+ T(S
+ R(l2 (-815 -500) (740 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$379 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (360 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$380 pfet_01v8_hvt
+ T(S
+ R(l2 (-435 -500) (360 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$381 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (400 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$382 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 410) (-10 0) (0 590) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$383 pfet_01v8_hvt
+ T(S
+ Q(l2 (-335 -210) (0 565) (-75 0) (0 420) (260 0) (0 -565) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (255 0) (0 -140) (5 0) (0 -280))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$384 pfet_01v8_hvt
+ T(S
+ R(l2 (-415 -500) (340 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$385 pfet_01v8_hvt
+ T(S
+ Q(l2 (-385 -500) (0 370) (-80 0) (0 420) (130 0) (0 210) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$386 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (380 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$387 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 280) (-85 0) (0 380) (270 0) (0 -80) (75 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$388 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -210) (0 1000) (75 0) (0 80) (265 0) (0 -380) (-80 0) (0 -280) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (330 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$389 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$390 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -500) (0 420) (75 0) (0 280) (-85 0) (0 380) (270 0) (0 -80) (75 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$391 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (75 0) (0 80) (265 0) (0 -380) (-80 0) (0 -280) (75 0) (0 -420))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$392 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -320) (260 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (525 0) (0 -420) (-275 0) (0 -220))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$393 pfet_01v8_hvt
+ T(S
+ Q(l2 (-600 -430) (0 640) (525 0) (0 -420) (-275 0) (0 -220))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$394 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -430) (0 220) (-75 0) (0 420) (355 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-345 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$395 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -680) (0 360) (-75 0) (0 640) (335 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (-355 -320) (0 220) (-75 0) (0 420) (355 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$396 pfet_01v8_hvt
+ T(S
+ Q(l2 (-335 -500) (0 360) (-75 0) (0 640) (335 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$397 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (340 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$398 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -270) (260 540))
+ )
+ T(G
+ R(l4 (-75 -270) (150 540))
+ )
+ T(D
+ R(l2 (75 -270) (270 540))
+ )
+ T(B
+ R(l3 (-75 -270) (150 540))
+ )
+ )
+ D(D$pfet_01v8_hvt$399 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -270) (270 540))
+ )
+ T(G
+ R(l4 (-75 -270) (150 540))
+ )
+ T(D
+ R(l2 (75 -270) (260 540))
+ )
+ T(B
+ R(l3 (-75 -270) (150 540))
+ )
+ )
+ D(D$pfet_01v8_hvt$400 pfet_01v8_hvt
+ T(S
+ Q(l2 (-365 -320) (0 340) (-280 0) (0 420) (495 0) (0 -120) (75 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$401 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (325 0) (0 -420) (-75 0) (0 -220))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$402 pfet_01v8_hvt
+ T(S
+ Q(l2 (-400 -430) (0 640) (325 0) (0 -420) (-75 0) (0 -220))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$403 pfet_01v8_hvt
+ T(S
+ Q(l2 (355 -550) (0 340) (-280 0) (0 420) (495 0) (0 -120) (75 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-345 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$404 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (485 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$405 pfet_01v8_hvt
+ T(S
+ R(l2 (-560 -500) (485 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$406 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (450 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$407 pfet_01v8_hvt
+ T(S
+ R(l2 (-525 -500) (450 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (370 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$408 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (230 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$409 pfet_01v8_hvt
+ T(S
+ R(l2 (-305 -210) (230 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (390 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$410 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 360) (-75 0) (0 640) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$411 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (335 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$412 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (330 0) (0 -420) (-75 0) (0 -220))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$413 pfet_01v8_hvt
+ T(S
+ Q(l2 (-405 -430) (0 640) (330 0) (0 -420) (-75 0) (0 -220))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$414 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (760 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$415 pfet_01v8_hvt
+ T(S
+ R(l2 (-835 -500) (760 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (240 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$416 pfet_01v8_hvt
+ T(S
+ R(l2 (-315 -500) (240 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (450 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$417 pfet_01v8_hvt
+ T(S
+ R(l2 (-525 -500) (450 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$418 pfet_01v8_hvt
+ T(S
+ R(l2 (-375 -500) (300 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$419 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (675 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$420 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$421 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$422 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (325 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$423 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -500) (325 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$424 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$425 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (415 0) (0 -640) (-165 0) (0 -360))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$426 pfet_01v8_hvt
+ T(S
+ Q(l2 (-490 -680) (0 1000) (415 0) (0 -640) (-165 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (715 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$427 pfet_01v8_hvt
+ T(S
+ R(l2 (-790 -320) (715 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (410 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$428 pfet_01v8_hvt
+ T(S
+ R(l2 (-485 -320) (410 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (210 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$429 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -320) (210 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$430 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$431 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (450 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$432 pfet_01v8_hvt
+ T(S
+ R(l2 (-445 -500) (370 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$433 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$434 pfet_01v8_hvt
+ T(S
+ R(l2 (-350 -500) (275 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$435 pfet_01v8_hvt
+ T(S
+ R(l2 (-455 -500) (380 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$436 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (520 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$437 pfet_01v8_hvt
+ T(S
+ R(l2 (-595 -500) (520 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$438 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (625 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$439 pfet_01v8_hvt
+ T(S
+ R(l2 (-700 -500) (625 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$440 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -500) (350 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$441 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (765 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$442 pfet_01v8_hvt
+ T(S
+ R(l2 (-840 -500) (765 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (435 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$443 pfet_01v8_hvt
+ T(S
+ R(l2 (-510 -500) (435 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (610 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$444 pfet_01v8_hvt
+ T(S
+ R(l2 (-685 -500) (610 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (425 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$445 pfet_01v8_hvt
+ T(S
+ R(l2 (-500 -500) (425 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$446 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$nfet_01v8 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$1 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$2 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (790 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$3 nfet_01v8
+ T(S
+ R(l8 (-865 -325) (790 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$4 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$5 nfet_01v8
+ T(S
+ R(l8 (-350 -325) (275 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$6 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$7 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$8 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$9 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$10 nfet_01v8
+ T(S
+ Q(l8 (-470 -210) (0 650) (260 0) (0 -230) (135 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$11 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (475 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$12 nfet_01v8
+ T(S
+ R(l8 (-550 -210) (475 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$13 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (690 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$14 nfet_01v8
+ T(S
+ R(l8 (-765 -210) (690 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$15 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (260 0) (0 -230) (135 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$16 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (260 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$17 nfet_01v8
+ T(S
+ Q(l8 (-410 -325) (0 420) (75 0) (0 230) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$18 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (250 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$19 nfet_01v8
+ T(S
+ Q(l8 (-400 -325) (0 420) (75 0) (0 230) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$20 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (655 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$21 nfet_01v8
+ T(S
+ R(l8 (-730 -325) (655 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$22 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (420 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$23 nfet_01v8
+ T(S
+ R(l8 (-495 -325) (420 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (440 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$24 nfet_01v8
+ T(S
+ R(l8 (-515 -325) (440 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$25 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$26 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$27 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (240 0) (0 230) (250 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$28 nfet_01v8
+ T(S
+ Q(l8 (-565 -325) (0 420) (240 0) (0 230) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$29 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$30 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (290 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$31 nfet_01v8
+ T(S
+ R(l8 (-365 -210) (290 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (380 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$32 nfet_01v8
+ T(S
+ R(l8 (-455 -210) (380 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$33 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (215 0) (0 230) (465 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$34 nfet_01v8
+ T(S
+ Q(l8 (-755 -325) (0 420) (215 0) (0 230) (465 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$35 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$36 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$37 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$38 nfet_01v8
+ T(S
+ R(l8 (-425 -325) (350 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$39 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$40 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (230 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$41 nfet_01v8
+ T(S
+ R(l8 (-305 -325) (230 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$42 nfet_01v8
+ T(S
+ R(l8 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$43 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$44 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (265 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$45 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$46 nfet_01v8
+ T(S
+ R(l8 (-335 -320) (260 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (210 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$47 nfet_01v8
+ T(S
+ R(l8 (-285 -320) (210 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (910 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$48 nfet_01v8
+ T(S
+ R(l8 (-985 -320) (910 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (210 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$49 nfet_01v8
+ T(S
+ R(l8 (-285 -320) (210 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (330 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$50 nfet_01v8
+ T(S
+ R(l8 (-405 -320) (330 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (330 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$51 nfet_01v8
+ T(S
+ R(l8 (-405 -320) (330 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (260 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$52 nfet_01v8
+ T(S
+ R(l8 (-340 -325) (265 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$53 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$54 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$55 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$56 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$57 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (295 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$58 nfet_01v8
+ T(S
+ R(l8 (-370 -325) (295 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$59 nfet_01v8
+ T(S
+ Q(l8 (-435 -325) (0 420) (110 0) (0 230) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$60 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$61 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$62 nfet_01v8
+ T(S
+ Q(l8 (-400 -180) (0 420) (250 0) (0 -60) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (330 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$63 nfet_01v8
+ T(S
+ R(l8 (-405 -180) (330 360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ Q(l8 (75 -180) (0 360) (90 0) (0 60) (590 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$64 nfet_01v8
+ T(S
+ Q(l8 (-420 -180) (0 640) (270 0) (0 -280) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (395 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$65 nfet_01v8
+ T(S
+ R(l8 (-470 -180) (395 360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ Q(l8 (75 -180) (0 360) (80 0) (0 60) (250 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$66 nfet_01v8
+ T(S
+ R(l8 (-600 -210) (525 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (250 0) (0 -60) (75 0) (0 -360))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$67 nfet_01v8
+ T(S
+ Q(l8 (-755 -210) (0 360) (90 0) (0 60) (590 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$68 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (260 0) (0 220) (250 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$69 nfet_01v8
+ T(S
+ Q(l8 (-405 -210) (0 360) (80 0) (0 60) (250 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (595 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$70 nfet_01v8
+ T(S
+ R(l8 (-670 -210) (595 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (305 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$71 nfet_01v8
+ T(S
+ R(l8 (-380 -210) (305 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$72 nfet_01v8
+ T(S
+ Q(l8 (-585 -320) (0 420) (260 0) (0 220) (250 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (75 -320) (0 640) (270 0) (0 -280) (75 0) (0 -360))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$73 nfet_01v8
+ T(S
+ Q(l8 (-435 -325) (0 420) (110 0) (0 230) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$74 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (275 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$75 nfet_01v8
+ T(S
+ R(l8 (-350 -210) (275 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$76 nfet_01v8
+ T(S
+ R(l8 (-335 -260) (260 520))
+ )
+ T(G
+ R(l4 (-75 -260) (150 520))
+ )
+ T(D
+ R(l8 (75 -260) (290 520))
+ )
+ T(B
+ R(l9 (-75 -260) (150 520))
+ )
+ )
+ D(D$nfet_01v8$77 nfet_01v8
+ T(S
+ R(l8 (-365 -260) (290 520))
+ )
+ T(G
+ R(l4 (-75 -260) (150 520))
+ )
+ T(D
+ R(l8 (75 -260) (260 520))
+ )
+ T(B
+ R(l9 (-75 -260) (150 520))
+ )
+ )
+ D(D$nfet_01v8$78 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (325 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$79 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (315 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$80 nfet_01v8
+ T(S
+ R(l8 (-390 -325) (315 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$81 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (790 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$82 nfet_01v8
+ T(S
+ R(l8 (-865 -325) (790 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$83 nfet_01v8
+ T(S
+ R(l8 (-350 -325) (275 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$84 nfet_01v8
+ T(S
+ Q(l8 (-400 -320) (0 650) (250 0) (0 -10) (75 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (295 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$85 nfet_01v8
+ T(S
+ R(l8 (-370 -320) (295 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (270 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$86 nfet_01v8
+ T(S
+ R(l8 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (1050 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$87 nfet_01v8
+ T(S
+ R(l8 (-1125 -320) (1050 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (335 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$88 nfet_01v8
+ T(S
+ R(l8 (-410 -320) (335 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (485 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$89 nfet_01v8
+ T(S
+ R(l8 (-560 -320) (485 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (270 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$90 nfet_01v8
+ T(S
+ R(l8 (-1125 -320) (1050 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (75 -320) (0 640) (100 0) (0 10) (250 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$91 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (250 0) (0 -10) (75 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$92 nfet_01v8
+ T(S
+ Q(l8 (-425 -325) (0 640) (100 0) (0 10) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$93 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$94 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$95 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (770 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$96 nfet_01v8
+ T(S
+ R(l8 (-845 -325) (770 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$97 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (305 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$98 nfet_01v8
+ T(S
+ R(l8 (-380 -325) (305 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$99 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (300 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$100 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$101 nfet_01v8
+ T(S
+ R(l8 (-340 -325) (265 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$102 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$103 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (405 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$104 nfet_01v8
+ T(S
+ R(l8 (-480 -325) (405 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$105 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$106 nfet_01v8
+ T(S
+ R(l8 (-485 -325) (410 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$107 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$108 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$109 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$110 nfet_01v8
+ T(S
+ R(l8 (-340 -325) (265 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$111 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$112 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$113 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (605 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$114 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (830 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$115 nfet_01v8
+ T(S
+ R(l8 (-905 -325) (830 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$116 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$117 nfet_01v8
+ T(S
+ R(l8 (-305 -325) (230 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (470 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$118 nfet_01v8
+ T(S
+ R(l8 (-545 -325) (470 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (220 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$119 nfet_01v8
+ T(S
+ R(l8 (-295 -325) (220 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$120 nfet_01v8
+ T(S
+ R(l8 (-340 -325) (265 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (800 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$121 nfet_01v8
+ T(S
+ R(l8 (-875 -325) (800 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$122 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$123 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$124 nfet_01v8
+ T(S
+ R(l8 (-350 -325) (275 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (455 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$125 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$126 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$127 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$128 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$129 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$130 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$131 nfet_01v8
+ T(S
+ R(l8 (-370 -325) (295 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (285 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$132 nfet_01v8
+ T(S
+ R(l8 (-360 -325) (285 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$133 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (335 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$134 nfet_01v8
+ T(S
+ R(l8 (-410 -325) (335 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$135 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (430 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$136 nfet_01v8
+ T(S
+ R(l8 (-505 -325) (430 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$137 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$138 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$139 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (290 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$140 nfet_01v8
+ T(S
+ R(l8 (-365 -325) (290 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$141 nfet_01v8
+ T(S
+ R(l8 (-845 -325) (770 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$142 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$143 nfet_01v8
+ T(S
+ R(l8 (-425 -325) (350 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$144 nfet_01v8
+ T(S
+ R(l8 (-360 -325) (285 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$145 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$146 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$147 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (400 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$148 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (305 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$149 nfet_01v8
+ T(S
+ R(l8 (-380 -325) (305 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (305 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$150 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (325 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$151 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (215 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$152 nfet_01v8
+ T(S
+ R(l8 (-290 -325) (215 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$153 nfet_01v8
+ T(S
+ R(l8 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (265 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$154 nfet_01v8
+ T(S
+ Q(l8 (-415 -325) (0 420) (75 0) (0 230) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (440 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$155 nfet_01v8
+ T(S
+ R(l8 (-515 -325) (440 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$156 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (425 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$157 nfet_01v8
+ T(S
+ R(l8 (-500 -325) (425 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$158 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (285 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$159 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$160 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$161 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$162 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (315 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$163 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$164 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$165 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$166 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$167 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (610 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$168 nfet_01v8
+ T(S
+ R(l8 (-685 -210) (610 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$169 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$170 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (610 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$171 nfet_01v8
+ T(S
+ R(l8 (-685 -325) (610 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (340 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$172 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$173 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (395 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$174 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (300 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$175 nfet_01v8
+ T(S
+ R(l8 (-455 -325) (380 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$176 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$177 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (285 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$178 nfet_01v8
+ T(S
+ R(l8 (-340 -275) (265 550))
+ )
+ T(G
+ R(l4 (-75 -275) (150 550))
+ )
+ T(D
+ R(l8 (75 -275) (210 550))
+ )
+ T(B
+ R(l9 (-75 -275) (150 550))
+ )
+ )
+ D(D$nfet_01v8$179 nfet_01v8
+ T(S
+ R(l8 (-285 -275) (210 550))
+ )
+ T(G
+ R(l4 (-75 -275) (150 550))
+ )
+ T(D
+ R(l8 (75 -275) (280 550))
+ )
+ T(B
+ R(l9 (-75 -275) (150 550))
+ )
+ )
+ D(D$nfet_01v8$180 nfet_01v8
+ T(S
+ R(l8 (-355 -275) (280 550))
+ )
+ T(G
+ R(l4 (-75 -275) (150 550))
+ )
+ T(D
+ R(l8 (75 -275) (210 550))
+ )
+ T(B
+ R(l9 (-75 -275) (150 550))
+ )
+ )
+ D(D$nfet_01v8$181 nfet_01v8
+ T(S
+ R(l8 (-285 -275) (210 550))
+ )
+ T(G
+ R(l4 (-75 -275) (150 550))
+ )
+ T(D
+ R(l8 (75 -275) (265 550))
+ )
+ T(B
+ R(l9 (-75 -275) (150 550))
+ )
+ )
+ D(D$nfet_01v8$182 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (285 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$183 nfet_01v8
+ T(S
+ R(l8 (-360 -325) (285 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (355 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$184 nfet_01v8
+ T(S
+ R(l8 (-430 -325) (355 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$185 nfet_01v8
+ T(S
+ Q(l8 (-680 -210) (0 640) (500 0) (0 -220) (105 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (125 0) (0 220) (520 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$186 nfet_01v8
+ T(S
+ Q(l8 (-440 -300) (0 10) (-85 0) (0 640) (250 0) (0 -50) (200 0) (0 -600))
+ )
+ T(G
+ R(l4 (-75 -300) (150 600))
+ )
+ T(D
+ Q(l8 (75 -300) (0 600) (100 0) (0 40) (250 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -300) (150 600))
+ )
+ )
+ D(D$nfet_01v8$187 nfet_01v8
+ T(S
+ Q(l8 (-425 -320) (0 600) (100 0) (0 40) (250 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (270 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$188 nfet_01v8
+ T(S
+ R(l8 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (285 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$189 nfet_01v8
+ T(S
+ Q(l8 (-335 -320) (0 275) (10 0) (0 365) (250 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (75 -320) (0 640) (500 0) (0 -220) (105 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$190 nfet_01v8
+ T(S
+ Q(l8 (160 -330) (0 10) (-85 0) (0 640) (250 0) (0 -50) (200 0) (0 -600))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (-720 -320) (0 420) (125 0) (0 220) (520 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$191 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (385 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$192 nfet_01v8
+ T(S
+ Q(l8 (-460 -440) (0 650) (385 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (425 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$193 nfet_01v8
+ T(S
+ R(l8 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (290 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$194 nfet_01v8
+ T(S
+ R(l8 (-365 -320) (290 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (350 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$195 nfet_01v8
+ T(S
+ R(l8 (-365 -325) (290 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (260 0) (0 -265) (-10 0) (0 -385))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$196 nfet_01v8
+ T(S
+ R(l8 (-365 -325) (290 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$197 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$198 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (495 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$199 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (365 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$200 nfet_01v8
+ T(S
+ R(l8 (-440 -325) (365 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$201 nfet_01v8
+ T(S
+ R(l8 (-350 -325) (275 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$202 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 285) (10 0) (0 365) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$203 nfet_01v8
+ T(S
+ R(l8 (-455 -325) (380 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$204 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$205 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (260 0) (0 -285) (-10 0) (0 -135))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$206 nfet_01v8
+ T(S
+ Q(l8 (150 -440) (0 230) (-75 0) (0 420) (390 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-340 -210) (265 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$207 nfet_01v8
+ T(S
+ Q(l8 (-390 -325) (0 230) (-75 0) (0 420) (390 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$208 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (385 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$209 nfet_01v8
+ T(S
+ R(l8 (-460 -325) (385 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$210 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$211 nfet_01v8
+ T(S
+ R(l8 (-815 -325) (740 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (385 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$212 nfet_01v8
+ T(S
+ R(l8 (-460 -325) (385 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (370 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$213 nfet_01v8
+ T(S
+ R(l8 (-445 -325) (370 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (590 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$214 nfet_01v8
+ T(S
+ R(l8 (-665 -325) (590 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$215 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (295 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$216 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$217 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$218 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (365 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$219 nfet_01v8
+ T(S
+ R(l8 (-440 -325) (365 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (325 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$220 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$221 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$222 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$223 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (385 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$224 nfet_01v8
+ T(S
+ Q(l8 (-400 -180) (0 640) (250 0) (0 -280) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (400 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$225 nfet_01v8
+ T(S
+ R(l8 (-475 -180) (400 360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ Q(l8 (75 -180) (0 360) (75 0) (0 60) (255 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$226 nfet_01v8
+ T(S
+ Q(l8 (-405 -210) (0 360) (75 0) (0 60) (255 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (420 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$227 nfet_01v8
+ T(S
+ R(l8 (-495 -210) (420 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$228 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$229 nfet_01v8
+ T(S
+ R(l8 (-335 -320) (260 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (75 -320) (0 640) (250 0) (0 -280) (75 0) (0 -360))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$230 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$231 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$232 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (220 0) (0 120) (250 0) (0 -540))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$233 nfet_01v8
+ T(S
+ Q(l8 (-545 -270) (0 420) (220 0) (0 120) (250 0) (0 -540))
+ )
+ T(G
+ R(l4 (-75 -270) (150 540))
+ )
+ T(D
+ R(l8 (75 -270) (260 540))
+ )
+ T(B
+ R(l9 (-75 -270) (150 540))
+ )
+ )
+ D(D$nfet_01v8$234 nfet_01v8
+ T(S
+ Q(l8 (150 -440) (0 230) (-75 0) (0 420) (335 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-335 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$235 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 230) (-75 0) (0 420) (335 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$236 nfet_01v8
+ T(S
+ R(l8 (-460 -325) (385 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$237 nfet_01v8
+ T(S
+ Q(l8 (150 -240) (0 30) (-75 0) (0 420) (75 0) (0 200) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-345 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$238 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$239 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (245 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$240 nfet_01v8
+ T(S
+ R(l8 (-320 -325) (245 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (335 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$241 nfet_01v8
+ T(S
+ R(l8 (-410 -325) (335 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (435 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$242 nfet_01v8
+ T(S
+ R(l8 (-510 -325) (435 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (325 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$243 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$244 nfet_01v8
+ T(S
+ R(l8 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$245 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (460 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$246 nfet_01v8
+ T(S
+ R(l8 (-535 -210) (460 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (265 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$247 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (285 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$248 nfet_01v8
+ T(S
+ R(l8 (-360 -325) (285 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$249 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$250 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$251 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (410 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$252 nfet_01v8
+ T(S
+ R(l8 (-485 -325) (410 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (290 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$253 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (260 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$254 nfet_01v8
+ T(S
+ Q(l8 (-410 -325) (0 420) (75 0) (0 230) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$255 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$256 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$257 nfet_01v8
+ T(S
+ Q(l8 (170 -365) (0 40) (-95 0) (0 650) (485 0) (0 -650) (-100 0) (0 -40))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (-335 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$258 nfet_01v8
+ T(S
+ Q(l8 (-465 -365) (0 40) (-95 0) (0 650) (485 0) (0 -650) (-100 0) (0 -40))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$259 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (425 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$260 nfet_01v8
+ T(S
+ R(l8 (-500 -325) (425 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (370 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$261 nfet_01v8
+ T(S
+ Q(l8 (-685 -210) (0 640) (505 0) (0 -220) (105 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (125 0) (0 220) (520 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$262 nfet_01v8
+ T(S
+ Q(l8 (-425 -320) (0 600) (100 0) (0 40) (250 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (310 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$263 nfet_01v8
+ T(S
+ R(l8 (-385 -320) (310 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (260 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$264 nfet_01v8
+ T(S
+ Q(l8 (-335 -320) (0 280) (10 0) (0 360) (250 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (75 -320) (0 640) (505 0) (0 -220) (105 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$265 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (260 0) (0 -280) (-10 0) (0 -370))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$266 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (535 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$267 nfet_01v8
+ T(S
+ Q(l8 (-610 -440) (0 650) (535 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$268 nfet_01v8
+ T(S
+ R(l8 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (400 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$269 nfet_01v8
+ T(S
+ R(l8 (-475 -320) (400 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (495 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$270 nfet_01v8
+ T(S
+ Q(l8 (150 -240) (0 30) (-75 0) (0 420) (75 0) (0 200) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-345 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$271 nfet_01v8
+ T(S
+ Q(l8 (-340 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$272 nfet_01v8
+ T(S
+ R(l8 (-375 -325) (300 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (260 0) (0 -280) (-10 0) (0 -370))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$273 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (470 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$274 nfet_01v8
+ T(S
+ Q(l8 (-545 -440) (0 650) (470 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (420 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$275 nfet_01v8
+ T(S
+ R(l8 (-350 -325) (275 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$276 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (370 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$277 nfet_01v8
+ T(S
+ R(l8 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (620 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$278 nfet_01v8
+ T(S
+ R(l8 (-695 -210) (620 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (530 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$279 nfet_01v8
+ T(S
+ R(l8 (-605 -210) (530 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$280 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (265 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$281 nfet_01v8
+ T(S
+ R(l8 (-415 -325) (340 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$282 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (800 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$283 nfet_01v8
+ T(S
+ R(l8 (-875 -325) (800 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$284 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (315 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$285 nfet_01v8
+ T(S
+ R(l8 (-360 -325) (285 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$286 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (325 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$287 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$288 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (550 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$289 nfet_01v8
+ T(S
+ R(l8 (-625 -325) (550 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (345 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$290 nfet_01v8
+ T(S
+ R(l8 (-420 -325) (345 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$291 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$292 nfet_01v8
+ T(S
+ R(l8 (-375 -210) (300 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$293 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (350 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$294 nfet_01v8
+ T(S
+ R(l8 (-425 -210) (350 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$295 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$296 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (285 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$297 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$298 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$299 nfet_01v8
+ T(S
+ Q(l8 (-340 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$300 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (350 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$301 nfet_01v8
+ T(S
+ R(l8 (-425 -210) (350 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (290 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$302 nfet_01v8
+ T(S
+ R(l8 (-365 -210) (290 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (90 0) (0 230) (260 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$303 nfet_01v8
+ T(S
+ Q(l8 (-425 -325) (0 420) (90 0) (0 230) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$304 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$305 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (845 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$306 nfet_01v8
+ T(S
+ R(l8 (-920 -325) (845 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$307 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$308 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (570 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$309 nfet_01v8
+ T(S
+ R(l8 (-645 -325) (570 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (255 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$310 nfet_01v8
+ T(S
+ R(l8 (-330 -325) (255 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (290 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$311 nfet_01v8
+ T(S
+ Q(l8 (-340 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$312 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (285 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$313 nfet_01v8
+ T(S
+ Q(l8 (-415 -240) (0 650) (265 0) (0 -200) (75 0) (0 -420) (-75 0) (0 -30))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$314 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (265 0) (0 -200) (75 0) (0 -420) (-75 0) (0 -30))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$315 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$316 nfet_01v8
+ T(S
+ R(l8 (-340 -325) (265 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (345 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$317 nfet_01v8
+ T(S
+ R(l8 (-420 -325) (345 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$318 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$319 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$320 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$321 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (305 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$322 nfet_01v8
+ T(S
+ R(l8 (-380 -210) (305 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$323 nfet_01v8
+ T(S
+ Q(l8 (-340 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$324 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$325 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (675 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$326 nfet_01v8
+ T(S
+ R(l8 (-750 -325) (675 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$327 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (335 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$328 nfet_01v8
+ T(S
+ Q(l8 (-410 -440) (0 650) (335 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$329 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (295 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$330 nfet_01v8
+ T(S
+ R(l8 (-370 -325) (295 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$331 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (300 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$332 nfet_01v8
+ T(S
+ R(l8 (-375 -325) (300 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$333 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$334 nfet_01v8
+ T(S
+ R(l8 (-425 -325) (350 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$335 nfet_01v8
+ T(S
+ Q(l8 (205 -350) (0 140) (-130 0) (0 420) (130 0) (0 90) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-345 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$336 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 140) (-130 0) (0 420) (130 0) (0 90) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$337 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (815 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$338 nfet_01v8
+ T(S
+ R(l8 (-890 -325) (815 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$339 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (230 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$340 nfet_01v8
+ T(S
+ R(l8 (-305 -325) (230 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$341 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$342 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (355 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$343 nfet_01v8
+ T(S
+ R(l8 (-430 -325) (355 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (345 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$344 nfet_01v8
+ T(S
+ R(l8 (-420 -325) (345 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$345 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$346 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (375 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$347 nfet_01v8
+ T(S
+ R(l8 (-450 -325) (375 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$348 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$349 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$350 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$351 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$352 nfet_01v8
+ T(S
+ R(l8 (-375 -325) (300 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$353 nfet_01v8
+ T(S
+ Q(l8 (150 -440) (0 230) (-75 0) (0 420) (325 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-335 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$354 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (470 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$355 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (320 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$356 nfet_01v8
+ T(S
+ Q(l8 (-470 -325) (0 420) (75 0) (0 230) (320 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$357 nfet_01v8
+ T(S
+ Q(l8 (150 -440) (0 230) (-75 0) (0 420) (395 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-335 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$358 nfet_01v8
+ T(S
+ Q(l8 (-395 -325) (0 230) (-75 0) (0 420) (395 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$359 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$360 nfet_01v8
+ T(S
+ R(l8 (-425 -325) (350 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$361 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (435 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$362 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$363 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$364 nfet_01v8
+ T(S
+ R(l8 (-420 -325) (345 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$365 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (295 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$366 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$367 nfet_01v8
+ T(S
+ Q(l8 (-335 -210) (0 280) (5 0) (0 5) (5 0) (0 135) (250 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$368 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (255 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$369 nfet_01v8
+ T(S
+ Q(l8 (240 -240) (0 30) (-165 0) (0 420) (150 0) (0 200) (280 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-330 -210) (255 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$370 nfet_01v8
+ T(S
+ Q(l8 (-340 -325) (0 30) (-165 0) (0 420) (150 0) (0 200) (280 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$371 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$372 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$373 nfet_01v8
+ T(S
+ R(l8 (-365 -210) (290 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$374 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (870 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$375 nfet_01v8
+ T(S
+ R(l8 (-945 -325) (870 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$376 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 140) (-130 0) (0 420) (130 0) (0 90) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$377 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$378 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (305 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$379 nfet_01v8
+ T(S
+ Q(l8 (150 -240) (0 30) (-75 0) (0 420) (75 0) (0 200) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-335 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$380 nfet_01v8
+ T(S
+ Q(l8 (-410 -240) (0 650) (260 0) (0 -200) (75 0) (0 -420) (-75 0) (0 -30))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$381 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$382 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (260 0) (0 -200) (75 0) (0 -420) (-75 0) (0 -30))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$383 nfet_01v8
+ T(S
+ Q(l8 (-460 -180) (0 420) (310 0) (0 -60) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (400 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$384 nfet_01v8
+ T(S
+ R(l8 (-475 -180) (400 360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ Q(l8 (75 -180) (0 360) (75 0) (0 60) (250 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$385 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (310 0) (0 -60) (75 0) (0 -360))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$386 nfet_01v8
+ T(S
+ Q(l8 (-400 -210) (0 360) (75 0) (0 60) (250 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (280 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$387 nfet_01v8
+ T(S
+ Q(l8 (-430 -325) (0 420) (75 0) (0 230) (280 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$388 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (340 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$389 nfet_01v8
+ T(S
+ Q(l8 (-400 -180) (0 420) (250 0) (0 -60) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (395 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$390 nfet_01v8
+ T(S
+ R(l8 (-470 -180) (395 360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ Q(l8 (75 -180) (0 360) (75 0) (0 60) (255 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$391 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (250 0) (0 -60) (75 0) (0 -360))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$392 nfet_01v8
+ T(S
+ Q(l8 (-405 -210) (0 360) (75 0) (0 60) (255 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (390 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$393 nfet_01v8
+ T(S
+ R(l8 (-465 -210) (390 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$394 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (275 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$395 nfet_01v8
+ T(S
+ R(l8 (-350 -210) (275 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$396 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (515 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$397 nfet_01v8
+ T(S
+ R(l8 (-590 -325) (515 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (300 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$398 nfet_01v8
+ T(S
+ R(l8 (-375 -325) (300 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (450 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$399 nfet_01v8
+ T(S
+ R(l8 (-525 -325) (450 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (440 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$400 nfet_01v8
+ T(S
+ R(l8 (-515 -325) (440 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$401 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$402 nfet_01v8
+ T(S
+ Q(l8 (-400 -325) (0 420) (75 0) (0 230) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$403 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (230 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$404 nfet_01v8
+ T(S
+ R(l8 (-305 -210) (230 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (220 0) (0 120) (250 0) (0 -540))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$405 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (335 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$406 nfet_01v8
+ T(S
+ Q(l8 (-400 -180) (0 420) (250 0) (0 -60) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (400 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$407 nfet_01v8
+ T(S
+ Q(l8 (-325 -325) (0 380) (-10 0) (0 270) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$408 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (250 0) (0 -360) (10 0) (0 -290))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$409 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (335 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$410 nfet_01v8
+ T(S
+ R(l8 (-410 -325) (335 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$411 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$412 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (290 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$413 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (290 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$414 nfet_01v8
+ T(S
+ R(l8 (-365 -325) (290 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$415 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$416 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (395 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$417 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (335 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$418 nfet_01v8
+ T(S
+ R(l8 (-410 -325) (335 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (800 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$419 nfet_01v8
+ T(S
+ R(l8 (-875 -325) (800 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$420 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (845 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$421 nfet_01v8
+ T(S
+ R(l8 (-920 -325) (845 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$422 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$423 nfet_01v8
+ T(S
+ Q(l8 (-400 -210) (0 650) (250 0) (0 -230) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (325 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$424 nfet_01v8
+ T(S
+ R(l8 (-400 -210) (325 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (825 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$425 nfet_01v8
+ T(S
+ R(l8 (-900 -210) (825 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (275 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$426 nfet_01v8
+ T(S
+ R(l8 (-350 -210) (275 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$427 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$428 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (250 0) (0 -230) (75 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$429 nfet_01v8
+ T(S
+ R(l8 (-685 -325) (610 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$430 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$431 nfet_01v8
+ T(S
+ R(l8 (-380 -325) (305 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$432 nfet_01v8
+ T(S
+ R(l8 (-490 -325) (415 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$433 nfet_01v8
+ T(S
+ R(l8 (-455 -325) (380 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$434 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (620 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$435 nfet_01v8
+ T(S
+ R(l8 (-695 -325) (620 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$436 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$437 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (300 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$438 nfet_01v8
+ T(S
+ R(l8 (-375 -325) (300 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$439 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (520 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$440 nfet_01v8
+ T(S
+ R(l8 (-595 -325) (520 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$441 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (625 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$442 nfet_01v8
+ T(S
+ R(l8 (-700 -325) (625 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$443 nfet_01v8
+ T(S
+ R(l8 (-425 -325) (350 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$444 nfet_01v8
+ T(S
+ R(l8 (-380 -325) (305 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (365 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$445 nfet_01v8
+ T(S
+ R(l8 (-440 -325) (365 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (365 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$446 nfet_01v8
+ T(S
+ R(l8 (-440 -325) (365 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (610 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$447 nfet_01v8
+ T(S
+ R(l8 (-685 -325) (610 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$448 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+)
+H(
+ K(PFET_01V8_HVT MOS4)
+ K(NFET_01V8 MOS4)
+ K(RES RES)
+)
+Z(
+)
diff --git a/aes_sky130_100mhz/flow/write_cdl.tcl b/aes_sky130_100mhz/flow/write_cdl.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..a6a1075db50ef85fc154f5def32cfb6866776059
--- /dev/null
+++ b/aes_sky130_100mhz/flow/write_cdl.tcl
@@ -0,0 +1,4 @@
+read_lef /nix/store/sjh17jnslbv9d60450qybp1ajym2fb83-source/flow/platforms/sky130hd/lef/sky130_fd_sc_hd.tlef
+read_lef /nix/store/sjh17jnslbv9d60450qybp1ajym2fb83-source/flow/platforms/sky130hd/lef/sky130_fd_sc_hd_merged.lef
+read_def /tmp/zyphar_pnr_2107744.def
+write_cdl -masters /nix/store/sjh17jnslbv9d60450qybp1ajym2fb83-source/flow/platforms/sky130hd/cdl/sky130hd.cdl /tmp/datagen_output/aes_sky130_100mhz/flow/design_only.cdl
diff --git a/aes_sky130_50mhz/flow/aes.gds.gz b/aes_sky130_50mhz/flow/aes.gds.gz
new file mode 100644
index 0000000000000000000000000000000000000000..e5acb9df44385ff142bed5ad67732a9e7b974a18
--- /dev/null
+++ b/aes_sky130_50mhz/flow/aes.gds.gz
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:5fe8355e6132e612e9ad87dcd6950972a4e0253e061ce5a34c3d8be9daf0e5d9
+size 4368911
diff --git a/aes_sky130_50mhz/flow/aes.spef.gz b/aes_sky130_50mhz/flow/aes.spef.gz
new file mode 100644
index 0000000000000000000000000000000000000000..29ffbad8bceb8adf8bb57c66b8cd61ee9abe363e
--- /dev/null
+++ b/aes_sky130_50mhz/flow/aes.spef.gz
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:83812e06dd8bf8581f8bcde6bb7cb5ce0d2a7cc046edf29c9c5cefc728cd06b7
+size 9865951
diff --git a/aes_sky130_50mhz/flow/clean_gds_for_lvs.py b/aes_sky130_50mhz/flow/clean_gds_for_lvs.py
new file mode 100644
index 0000000000000000000000000000000000000000..862238faa55bd838f09a905d71fb7ed40f706a08
--- /dev/null
+++ b/aes_sky130_50mhz/flow/clean_gds_for_lvs.py
@@ -0,0 +1,52 @@
+import pya
+import sys
+
+layout = pya.Layout()
+layout.read("/tmp/datagen_output/aes_sky130_50mhz/flow/aes.gds")
+
+top_cell = None
+for tc in layout.top_cells():
+ if tc.name == "aes" or tc.name != "OUTLINE":
+ top_cell = tc
+ break
+
+if top_cell is None:
+ print("ERROR: No top cell found")
+ sys.exit(1)
+
+skip_patterns = ["sky130_fd_sc_hd__fill_", "sky130_fd_sc_hd__decap_", "sky130_fd_sc_hd__conb_"]
+
+removed = 0
+to_delete = []
+for inst in top_cell.each_inst():
+ cell_name = inst.cell.name
+ for pat in skip_patterns:
+ if pat in cell_name:
+ to_delete.append(inst)
+ break
+
+for inst in to_delete:
+ inst.delete()
+ removed += 1
+
+print("Removed %d non-logic cell instances" % removed)
+
+# Remove orphaned cell definitions
+used_cells = set()
+for cell in layout.each_cell():
+ for inst in cell.each_inst():
+ used_cells.add(inst.cell.cell_index())
+used_cells.add(top_cell.cell_index())
+
+orphans = []
+for cell in layout.each_cell():
+ if cell.cell_index() not in used_cells and cell.cell_index() != top_cell.cell_index():
+ orphans.append(cell.cell_index())
+
+for ci in orphans:
+ layout.delete_cell(ci)
+
+print("Removed %d orphaned cell definitions" % len(orphans))
+
+layout.write("/tmp/datagen_output/aes_sky130_50mhz/flow/lvs_cleaned.gds")
+print("Cleaned GDS written to /tmp/datagen_output/aes_sky130_50mhz/flow/lvs_cleaned.gds")
diff --git a/aes_sky130_50mhz/flow/design_only.cdl.gz b/aes_sky130_50mhz/flow/design_only.cdl.gz
new file mode 100644
index 0000000000000000000000000000000000000000..3fa00993657869389a9e6ee36c45190a5a01e64e
--- /dev/null
+++ b/aes_sky130_50mhz/flow/design_only.cdl.gz
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:42acc51837366d5bcac75fa51459c926e4b61e55e55221e2283249c243bada48
+size 641217
diff --git a/aes_sky130_50mhz/flow/drc_deck_patched.lydrc b/aes_sky130_50mhz/flow/drc_deck_patched.lydrc
new file mode 100644
index 0000000000000000000000000000000000000000..fe439f3915e91922e291cb0de1e81df88f643743
--- /dev/null
+++ b/aes_sky130_50mhz/flow/drc_deck_patched.lydrc
@@ -0,0 +1,918 @@
+
+
+
+
+ drc
+
+
+
+ false
+ false
+
+ true
+ drc_scripts
+ tools_menu.drc.end
+ dsl
+ drc-dsl-xml
+ #
+# DRC for SKY130 according to :
+# https://skywater-pdk.readthedocs.io/en/latest/rules/periphery.html
+# https://skywater-pdk.readthedocs.io/en/latest/rules/layers.html
+#
+# Distributed under GNU GPLv3: https://www.gnu.org/licenses/
+#
+# History :
+# 2020-10-04 : v1.0 : initial release
+#
+##########################################################################################
+
+# optionnal for a batch launch : klayout -b -rd in_gds=my_layout.gds -rd report_file=6_drc_count.rpt -r drc_sky130.drc
+if $in_gds
+ source($in_gds, $topcell)
+end
+
+if $report_file
+ report("SKY130 DRC runset", $report_file)
+else
+ report("SKY130 DRC runset", File.join(File.dirname(RBA::CellView::active.filename), "6_drc_count.rpt"))
+end
+
+AL = true # do not change
+CU = false # do not change
+# choose betwen only one of AL or CU back-end flow here :
+backend_flow = AL
+
+# enable / disable rule groups
+FEOL = false # front-end-of-line checks
+BEOL = true # back-end-of-line checks
+OFFGRID = true # manufacturing grid/angle checks
+
+# klayout setup
+########################
+# use a tile size of 1mm - not used in deep mode-
+tiles(1000.um)
+# use a tile border of 10 micron:
+tile_borders(1.um)
+#no_borders
+
+# hierachical
+deep
+
+# use 4 cpu cores
+threads(4)
+# if more inof is needed, set true
+verbose(true)
+
+# layers definitions
+########################
+
+# all except purpose (datatype) 5 -- label and 44 -- via
+li_wildcard = "67/0-4,6-43,45-*"
+mcon_wildcard = "67/44"
+
+m1_wildcard = "68/0-4,6-43,45-*"
+via_wildcard = "68/44"
+
+m2_wildcard = "69/0-4,6-43,45-*"
+via2_wildcard = "69/44"
+
+m3_wildcard = "70/0-4,6-43,45-*"
+via3_wildcard = "70/44"
+
+m4_wildcard = "71/0-4,6-43,45-*"
+via4_wildcard = "71/44"
+
+m5_wildcard = "72/0-4,6-43,45-*"
+
+diff = input(65, 20)
+tap = polygons(65, 44)
+nwell = polygons(64, 20)
+dnwell = polygons(64, 18)
+pwbm = polygons(19, 44)
+pwde = polygons(124, 20)
+natfet = polygons(124, 21)
+hvtr = polygons(18, 20)
+hvtp = polygons(78, 44)
+ldntm = polygons(11, 44)
+hvi = polygons(75, 20)
+tunm = polygons(80, 20)
+lvtn = polygons(125, 44)
+poly = polygons(66, 20)
+hvntm = polygons(125, 20)
+nsdm = polygons(93, 44)
+psdm = polygons(94, 20)
+rpm = polygons(86, 20)
+urpm = polygons(79, 20)
+npc = polygons(95, 20)
+licon = polygons(66, 44)
+
+li = polygons(li_wildcard)
+mcon = polygons(mcon_wildcard)
+
+m1 = polygons(m1_wildcard)
+via = polygons(via_wildcard)
+
+m2 = polygons(m2_wildcard)
+via2 = polygons(via2_wildcard)
+
+m3 = polygons(m3_wildcard)
+via3 = polygons(via3_wildcard)
+
+m4 = polygons(m4_wildcard)
+via4 = polygons(via4_wildcard)
+
+m5 = polygons(m5_wildcard)
+
+pad = polygons(76, 20)
+nsm = polygons(61, 20)
+capm = polygons(89, 44)
+cap2m = polygons(97, 44)
+vhvi = polygons(74, 21)
+uhvi = polygons(74, 22)
+npn = polygons(82, 20)
+inductor = polygons(82, 24)
+vpp = polygons(82, 64)
+pnp = polygons(82, 44)
+lvs_prune = polygons(84, 44)
+ncm = polygons(92, 44)
+padcenter = polygons(81, 20)
+mf = polygons(76, 44)
+areaid_sl = polygons(81, 1)
+areaid_ce = polygons(81, 2)
+areaid_fe = polygons(81, 3)
+areaid_sc = polygons(81, 4)
+areaid_sf = polygons(81, 6)
+areaid_sw = polygons(81, 7)
+areaid_sr = polygons(81, 8)
+areaid_mt = polygons(81, 10)
+areaid_dt = polygons(81, 11)
+areaid_ft = polygons(81, 12)
+areaid_ww = polygons(81, 13)
+areaid_ld = polygons(81, 14)
+areaid_ns = polygons(81, 15)
+areaid_ij = polygons(81, 17)
+areaid_zr = polygons(81, 18)
+areaid_ed = polygons(81, 19)
+areaid_de = polygons(81, 23)
+areaid_rd = polygons(81, 24)
+areaid_dn = polygons(81, 50)
+areaid_cr = polygons(81, 51)
+areaid_cd = polygons(81, 52)
+areaid_st = polygons(81, 53)
+areaid_op = polygons(81, 54)
+areaid_en = polygons(81, 57)
+areaid_en20 = polygons(81, 58)
+areaid_le = polygons(81, 60)
+areaid_hl = polygons(81, 63)
+areaid_sd = polygons(81, 70)
+areaid_po = polygons(81, 81)
+areaid_it = polygons(81, 84)
+areaid_et = polygons(81, 101)
+areaid_lvt = polygons(81, 108)
+areaid_re = polygons(81, 125)
+areaid_ag = polygons(81, 79)
+poly_rs = polygons(66, 13)
+diff_rs = polygons(65, 13)
+pwell_rs = polygons(64, 13)
+li_rs = polygons(67, 13)
+cfom = polygons(22, 20)
+
+
+# Define a new custom function that selects polygons by their number of holes:
+# It will return a new layer containing those polygons with min to max holes.
+# max can be nil to omit the upper limit.
+class DRC::DRCLayer
+ def with_holes(min, max)
+ new_data = RBA::Region::new
+ self.data.each do |p|
+ if p.holes >= (min || 0) && (!max || p.holes <= max)
+ new_data.insert(p)
+ end
+ end
+ DRC::DRCLayer::new(@engine, new_data)
+ end
+end
+
+# DRC section
+########################
+info("DRC section")
+
+if FEOL
+info("FEOL section")
+gate = diff & poly
+
+# dnwell
+dnwell.width(3.0, euclidian).output("dnwell.2", "dnwell.2 : min. dnwell width : 3.0um")
+dnwell.not(uhvi).not(areaid_po).isolated(6.3, euclidian).output("dnwell.3", "dnwell.3 : min. dnwell spacing : 6.3um")
+dnwell.and(pnp).output("dnwell.4", "dnwell.4 : dnwell must not overlap pnp")
+dnwell.and(psdm).edges.not(psdm.edges).output("dnwell.5", "p+ must not straddle dnwell")
+# dnwell.6 rue not coded
+
+# nwell
+nwell.width(0.84, euclidian).output("nwell.1", "nwell.1 : min. nwell width : 0.84um")
+nwell.isolated(1.27, euclidian).output("nwell.2a", "nwell.2a : min. nwell spacing (merged if less) : 1.27um")
+# rule nwell.4 is suitable for digital cells
+#nwell.not(uhvi).not(areaid_en20).not_interacting(tap.and(licon).and(li)).output("nwell.4", "nwell4 : all nwell exempt inside uhvi must contain a n+tap")
+nwell.enclosing(dnwell.not(uhvi).not(areaid_po), 0.4, euclidian).output("nwell.5", "nwell.5 : min. nwell enclosing dnwell exempt unside uhvi : 0.4um")
+dnwell.enclosing(nwell.not(uhvi), 1.03, euclidian).output("nwell.6", "nwell.6 : min. dnwell enclosing nwell exempt unside uhvi : 1.03um")
+dnwell.separation(nwell, 4.5, euclidian).output("nwell.7", "nwell.7 : min. dnwell separation nwell : 4.5um")
+
+# pwbm
+pwbm.not(uhvi).output("pwbm", "pwbm must be inside uhvi")
+dnwell.and(uhvi).edges.not(pwbm).output("pwbm.4", "pwbm.4 : dnwell inside uhvi must be enclosed by pwbm")
+
+# pwde
+pwde.not(pwbm).output("pwdem.3", "pwdem.3 : pwde must be inside pwbm")
+pwde.not(uhvi).output("pwdem.4", "pwdem.4 : pwde must be inside uhvi")
+pwde.not(dnwell).output("pwdem.5", "pwdem.5 : pwde must be inside dnwell")
+
+# hvtp
+#hvtp.not(nwell).output("hvtp", "hvtp must inside nwell")
+hvtp.width(0.38, euclidian).output("hvtp.1", "hvtp.1 : min. hvtp width : 0.38um")
+hvtp.isolated(0.38, euclidian).output("hvtp.2", "hvtp.2 : min. hvtp spacing : 0.38um")
+hvtp.enclosing(gate.and(psdm), 0.18, euclidian).output("hvtp.3", "hvtp.3 : min. hvtp enclosure of pfet gate : 0.18um")
+hvtp.separation(gate.and(psdm), 0.18, euclidian).output("hvtp.4", "hvtp.4 : min. hvtp spacing pfet gate: 0.18um")
+hvtp.with_area(0..0.265).output("hvtp.5", "hvtp.5 : min. hvtp area : 0.265um²")
+
+# hvtr
+hvtr.width(0.38, euclidian).output("hvtr.1", "hvtr.1 : min. hvtr width : 0.38um")
+hvtr.isolated(0.38, euclidian).output("hvtr.2", "hvtr.2 : min. hvtr spacing : 0.38um")
+
+# lvtn
+lvtn.width(0.38, euclidian).output("lvtn.1", "lvtn.1 : min. lvtn width : 0.38um")
+lvtn.isolated(0.38, euclidian).output("lvtn.2", "lvtn.2 : min. lvtn spacing : 0.38um")
+lvtn.separation(diff.and(poly).not(uhvi), 0.18, euclidian).output("lvtn.3a", "lvtn.3a : min. lvtn spacing to gate : 0.18um")
+lvtn.separation(diff.and(nwell).not(poly), 0.235, projection).output("lvtn.3b", "lvtn.3b : min. lvtn spacing to pfet s/d : 0.18um")
+lvtn.enclosing(gate.not(uhvi), 0.18, euclidian).output("lvtn.4b", "lvtn.4b : min. lvtn enclosing to gate : 0.18um")
+lvtn.separation(hvtp, 0.38, euclidian).output("lvtn.9", "lvtn.9 : min. lvtn spacing hvtp : 0.38um")
+nwell.not_interacting(gate.and(nwell.not(hvi).not(areaid_ce))).enclosing(lvtn.not(uhvi), 0.18, euclidian).polygons.without_area(0).output("lvtn.4b", "lvtn.4b : min. lvtn enclosure of gate : 0.18um")
+lvtn.separation(nwell.inside(areaid_ce), 0.38, euclidian).output("lvtn.12", "lvtn.12 : min. lvtn spacing nwell inside areaid.ce : 0.38um")
+lvtn.with_area(0..0.265).output("lvtn.13", "lvtn.13 : min. lvtn area : 0.265um²")
+
+# ncm
+ncm.and(tap.and(nwell).or(diff.not(nwell))).output("ncm.x.3", "ncm.x.3 : ncm must not overlap n+diff")
+ncm.width(0.38, euclidian).output("ncm.1", "ncm.1 : min. ncm width : 0.38um")
+ncm.isolated(0.38, euclidian).output("ncm.2", "ncm.2 : min. ncm spacing manual merge if smaller : 0.38um")
+ncm.enclosing(diff.and(nwell), 0.18, euclidian).output("ncm.3", "ncm.3 : min. ncm enclosure of p+diff : 0.18um")
+ncm.separation(lvtn.and(diff), 0.23, euclidian).output("ncm.5", "ncm.5 : min. ncm spacing lvtn diff : 0.23um")
+ncm.separation(diff.not(nwell), 0.2, euclidian).output("ncm.6", "ncm.6 : min. ncm spacing nfet : 0.2um")
+ncm.with_area(0..0.265).output("ncm.7", "ncm.13 : min. ncm area : 0.265um²")
+
+# diff-tap
+difftap = diff + tap
+difftap.width(0.15, euclidian).output("difftap.1", "difftap.1 : min. difftap width : 0.15um")
+not_in_cell1 = layout(source.cell_obj).select("s8cell_ee_plus_sseln_a", "-s8cell_ee_plus_sseln_b", "-s8cell_ee_plus_sselp_a", "-s8cell_ee_plus_sselp_b" , "-s8fpls_pl8", "-s8fpls_rdrv4" , "-s8fpls_rdrv4f", "-s8fpls_rdrv8")
+not_in_cell1_diff = not_in_cell1.input(65, 20)
+not_in_cell1_diff.not(areaid_sc).not(poly).edges.and(gate.edges).with_length(0,0.42).output("difftap.2", "difftap.2: min. gate (exempt areaid.sc) width : 0.42um")
+diff.and(areaid_sc).not(poly).edges.and(gate.edges).with_length(0,0.36).output("difftap.2", "difftap.2: min. gate inside areaid.sc width : 0.36um")
+difftap.isolated(0.27, euclidian).output("difftap.3", "difftap.3 : min. difftap spacing : 0.27um")
+tap.edges.and(diff.edges).with_length(0,0.29).output("difftap.4", "difftap.4 : min. tap bound by diffusion : 0.29um")
+tap.edges.and(diff.edges).space(0.4, projection).output("difftap.5", "difftap.5 : min. tap bound by 2 diffusions : 0.4um")
+(tap.edges.and(diff.edges)).extended(0.01, 0.01, 0, 0, false).not(tap.and(diff)).and(diff.or(tap)).output("difftap.6", "difftap.6 : diff and tap not allowed to extend beyong their abutting ege")
+tap.edges.not_interacting(diff.edges).separation(diff.edges, 0.13, euclidian).output("difftap.7", "difftap.7 : min. diff/tap spacing to non-coincident diff edge : 0.13um")
+diff.edges.not_interacting(tap.edges).separation(tap.edges, 0.13, euclidian).output("difftap.7", "difftap.7 : min. diff/tap spacing to non-coincident tap edge : 0.13um")
+nwell.enclosing(diff.not(uhvi).and(psdm), 0.18, euclidian).output("difftap.8", "difftap.8 : min. p+diff enclosure by nwell : 0.18um")
+diff.not(uhvi).and(nsdm).separation(nwell, 0.34, euclidian).output("difftap.9", "difftap.9 : min. n+diff spacing to nwell : 0.34um")
+nwell.enclosing(tap.not(uhvi).and(nsdm), 0.18, euclidian).output("difftap.10", "difftap.10 : min. n+tap enclosure by nwell : 0.18um")
+tap.not(uhvi).and(psdm).separation(nwell, 0.13, euclidian).output("difftap.11", "difftap.11 : min. p+tap spacing to nwell : 0.13um")
+
+# tunm
+tunm.width(0.41, euclidian).output("tunm.1", "tunm.1 : min. tunm width : 0.41um")
+tunm.isolated(0.5, euclidian).output("tunm.2", "tunm.2 : min. tunm spacing : 0.5um")
+tunm.enclosing(gate, 0.095, euclidian).output("tunm.3", "tunm.3 : min. tunm beyond gate : 0.095um")
+tunm.separation(gate.not_interacting(tunm), 0.095, euclidian).output("tunm.4", "tunm.4 : min. tunm spacing to gate outside tunm: 0.095um")
+gate.and(tunm).edges.not(gate.edges).output("tunm.5", "tunm.5 : gate must not straddle tunm")
+tunm.not(dnwell).output("tunm.6a", "tunm.6a : tunm not allowed outside dnwell")
+tunm.with_area(0..0.672).output("tunm.7", "tunm.7 : min. tunm area : 0.672um²")
+
+# poly
+poly.width(0.15, euclidian).output("poly.1a", "poly.1a : min. poly width : 0.15um")
+poly.not(diff).edges.and(gate.and(lvtn).edges).space(0.35, euclidian).output("poly.1b", "poly.1b: min. lvtn gate width : 0.35um")
+poly.isolated(0.21, euclidian).output("poly.2", "poly.2 : min. poly spacing : 0.21um")
+poly.and(rpm.or(urpm).or(poly_rs)).width(0.33, euclidian).output("poly.3", "poly.3 : min. poly resistor width : 0.33um")
+poly.not(gate).separation(diff, 0.075, projection).polygons.without_area(0).output("poly.4", "poly.4 : min. poly on field spacing to diff : 0.075um")
+poly.not(gate).separation(tap, 0.055, euclidian).output("poly.5", "poly.5 : min. poly on field spacing to tap : 0.055um")
+gate.separation(tap, 0.3, projection).polygons.and(diff).output("poly.6", "poly.6 : min. gate spacing to tap : 0.3um")
+diff.enclosing(gate, 0.25, projection).polygons.without_area(0).output("poly.7", "poly.7 : min. source/drain length : 0.25um")
+poly.enclosing(gate, 0.13, projection).polygons.without_area(0).output("poly.8", "poly.8 : min. poly extention gate (endcap) : 0.13um")
+poly.and(rpm.or(urpm).or(poly_rs)).separation(poly.or(difftap), 0.48, euclidian).polygons.without_area(0).output("poly.9", "poly.9 : min. poly resistor space to poly or diff/tap : 0.48um")
+diff.merged.edges.end_segments(0.01).and(poly).output("poly.10", "poly.10 : poly must not overlap diff corner")
+gate.with_angle(0 .. 90).output("poly.11", "poly.11 : non 90 degree angle gate")
+not_in_cell3 = layout(source.cell_obj).select("s8fgvr_n_fg2")
+not_in_cell3_poly = not_in_cell3.input(66, 20)
+not_in_cell3_poly.not(hvi).not(nwell.not(hvi)).and(tap).output("poly.12", "poly.12 : poly must not overlap tap")
+poly.and(diff_rs).output("poly.15", "poly.15 : poly must not overlap diff resistor")
+
+# rpm
+rpm.width(1.27, euclidian).output("rpm.1a", "rpm.1a : min. rpm width : 1.27um")
+rpm.isolated(0.84, euclidian).output("rpm.2", "rpm.2 : min. rpm spacing : 0.84um")
+rpm.enclosing(poly.and(poly_rs).and(psdm), 0.2, euclidian).output("rpm.3", "rpm.3 : min. rpm enclosure of poly resistor : 0.2um")
+psdm.enclosing(poly.and(poly_rs).and(rpm), 0.11, euclidian).output("rpm.4", "rpm.4 : min. psdm enclosure of poly resistor : 0.11um")
+npc.enclosing(poly.and(poly_rs).and(rpm), 0.095, euclidian).output("rpm.5", "rpm.5 : min. npc enclosure of poly resistor : 0.095um")
+rpm.separation(nsdm, 0.2, euclidian).output("rpm.6", "rpm.6 : min. rpm spacing nsdm: 0.2um")
+rpm.separation(poly, 0.2, euclidian).output("rpm.7", "rpm.7 : min. rpm spacing poly: 0.2um")
+rpm.and(poly).edges.not(poly.edges).output("rpm.8", "rpm.8 : poly must not straddle rpm")
+poly.and(poly_rs).and(rpm).separation(hvntm, 0.185, euclidian).output("rpm.9", "rpm.9 : min. poly resistor spacing hvntm: 0.185um")
+rpm.and(pwbm).output("rpm.10", "rpm.107 : min. rpm spacing pwbm: na")
+
+# varac
+varac = poly & tap & (nwell - hvi) - areaid_ce
+tap.not(poly).edges.and(varac.edges).space(0.18, euclidian).output("varac.1", "varac.1: min. varac channel length : 0.18um")
+tap.and(poly).edges.and(varac.edges).space(1.0, euclidian).output("varac.2", "varac.2: min. varac channel wdth : 1.0um")
+varac.separation(hvtp, 0.18, euclidian).output("varac.3", "varac.3: min. varac channel space to hvtp : 0.18um")
+varac.separation(licon.and(tap), 0.25, euclidian).output("varac.4", "varac.4: min. varac channel space to licon on tap : 0.25um")
+nwell.enclosing(poly.overlapping(varac), 0.15, euclidian).output("varac.5", "varac.5: min. nwell enclosure of poly overlapping varac channel : 0.15um")
+tap.overlapping(varac).separation(difftap, 0.27, euclidian).polygons.without_area(0).output("varac.6", "varac.6: min. varac channel tap space to difftap : 0.27um")
+nwell.overlapping(varac).and(diff.and(nwell)).output("varac.7", "varac.7: nwell overlapping varac channel must not overlap p+diff")
+
+# photo
+photodiode = dnwell & areaid_po
+photodiode.edges.without_length(3.0).output("photo.2", "photo.2 : minimum/maximum width of photodiode : 3.0um")
+photodiode.isolated(5.0, euclidian).output("photo.3", "photo.3 : mini. photodiode spacing : 5.0um")
+photodiode.separation(dnwell, 5.3, euclidian).output("photo.4", "photo.4 : mini. photodiode spacing to dnwell : 5.3um")
+areaid_po.not(dnwell).output("photo.5.6", "photo.5.6 : photodiode edges must coincide areaid.po and enclosed by dnwell")
+photodiode.not(tap.not(nwell).holes).output("photo.7", "photo.7 : photodiode must be enclosed by p+tap ring")
+photodiode.and(nwell).edges.without_length(0.84).output("photo.8", "photo.8 : minimum/maximum width of nwell inside photodiode : 0.84um")
+areaid_po.edges.and(photodiode.and(nwell).sized(1.08)).without_length(12.0).output("photo.9", "photo.9 : minimum/maximum enclosure of nwell by photodiode : 1.08um")
+photodiode.and(tap).edges.without_length(0.41).output("photo.10", "photo.10 : minimum/maximum width of tap inside photodiode : 0.41um")
+
+# npc
+npc.width(0.27, euclidian).output("npc.1", "npc.1 : min. npc width : 0.27um")
+npc.isolated(0.27, euclidian).output("npc.2", "npc.2 : min. npc spacing, should be mnually merge if less : 0.27um")
+npc.separation(gate, 0.09, euclidian).output("npc.4", "npc.4 : min. npc spacing to gate : 0.09um")
+
+# nsdm/psdm
+npsdm = nsdm + psdm
+nsdm.width(0.38, euclidian).output("nsdm.1", "nsdm.1 : min. nsdm width : 0.38um")
+psdm.width(0.38, euclidian).output("psdm.1", "psdm.1 : min. psdm width : 0.38um")
+nsdm.isolated(0.38, euclidian).output("n/psdm.1", "n/psdm.1 : min. nsdm spacing, should be mnually merge if less : 0.38um")
+psdm.isolated(0.38, euclidian).output("n/psdm.1", "n/psdm.1 : min. psdm spacing, should be mnually merge if less : 0.38um")
+npsdm.enclosing(diff, 0.125, euclidian).polygons.not(tap.sized(0.125)).output("n/psdm.5a", "n/psdm.5a : min. n/psdm enclosure diff except butting edge : 0.125um")
+npsdm.enclosing(tap, 0.125, euclidian).polygons.not(diff.sized(0.125)).output("n/psdm.5b", "n/psdm.5b : min. n/psdm enclosure tap except butting edge : 0.125um")
+tap.edges.and(diff.edges).not(npsdm).output("n/psdm.6", "n/psdm.6 : min. n/psdm enclosure of butting edge : 0.0um")
+nsdm.and(difftap).separation(psdm.and(difftap), 0.13, euclidian).polygons.without_area(0).output("n/psdm.7", "n/psdm.7 : min. nsdm diff spacing to psdm diff except butting edge : 0.13um")
+diff.and((nsdm.and(nwell)).or(psdm.not(nwell))).output("n/psdm.8", "n/psdm.8 : diff should be the opposite type of well/substrate underneath")
+tap.and((nsdm.not(nwell)).or(psdm.and(nwell))).output("n/psdm.8", "n/psdm.8 : tap should be the same type of well/substrate underneath")
+tap.and(diff).without_area(0).output("tap and diff", "tap and diff must not overlap")
+nsdm.with_area(0..0.265).output("n/psdm.10a", "n/psdm.10a : min. nsdm area : 0.265um²")
+psdm.with_area(0..0.265).output("n/psdm.10b", "n/psdm.10b : min. psdm area : 0.265um²")
+
+# licon
+licon.not(poly.interacting(poly_rs).and(rpm)).edges.without_length(0.17).output("licon.1", "licon.1 : minimum/maximum width of licon : 0.17um")
+licon.and(poly.interacting(poly_rs).and(rpm)).not_interacting((licon.and(poly.interacting(poly_rs).and(rpm)).edges.with_length(0.19)).or(licon.and(poly.interacting(poly_rs).and(rpm)).edges.with_length(2.0))).output("licon.1b/c", "licon.1b/c : minimum/maximum width/length of licon inside poly resistor : 2.0/0.19um")
+licon.isolated(0.17, euclidian).output("licon.2", "licon.2 : min. licon spacing : 0.17um")
+licon.and(poly.interacting(poly_rs).and(rpm)).edges.with_length(0.19).space(0.35, euclidian).output("licon.2b", "licon.2b : min. licon 0.19um edge on resistor spacing : 0.35um")
+licon.interacting(licon.and(poly.interacting(poly_rs).and(rpm)).edges.with_length(2.0)).separation(licon.and(poly.interacting(poly_rs).and(rpm)), 0.51, euclidian).output("licon.2c", "licon.2c : min. licon 2.0um edge on resistor spacing : 0.51um")
+licon.and(poly.interacting(poly_rs).and(rpm)).separation(licon.not(poly.interacting(poly_rs).and(rpm)), 0.51, euclidian).output("licon.2d", "licon.2d : min. licon on resistor spacing other licon : 0.51um")
+# rule licon.3 not coded
+licon.not(li).not(poly.or(diff).or(tap)).output("licon.4", "licon.4 : min. licon must overlap li and (poly or tap or diff) ")
+diff.enclosing(licon, 0.04, euclidian).output("licon.5", "licon.5 : min. diff enclosure of licon : 0.04um")
+tap.edges.and(diff.edges).separation(licon.and(tap).edges, 0.06, euclidian).output("licon.6", "licon.6 : min. abutting edge spacing to licon tap : 0.06um")
+licon_edges_with_less_enclosure_tap = tap.enclosing(licon, 0.12, projection).second_edges
+opposite1 = (licon.edges - licon_edges_with_less_enclosure_tap).width(0.17 + 1.dbu, projection).polygons
+licon.not_interacting(opposite1).output("licon.7", "licon.7 : min. tap enclosure of licon by one of 2 opposite edges : 0.12um")
+poly.enclosing(licon, 0.05, euclidian).output("licon.8", "licon.8 : min. poly enclosure of licon : 0.05um")
+licon008 = licon.interacting(poly.enclosing(licon, 0.08, euclidian).polygons)
+licon_edges_with_less_enclosure_poly = poly.enclosing(licon, 0.08, projection).second_edges
+opposite2 = (licon.edges - licon_edges_with_less_enclosure_poly).width(0.17 + 1.dbu, projection).polygons
+licon008.not_interacting(opposite2).output("licon.8a", "licon.8a : min. poly enclosure of licon by one of 2 opposite edges : 0.08um")
+# rule licon.9 not coded
+licon.and(tap.and(nwell.not(hvi))).separation(varac, 0.25, euclidian).output("licon.10", "licon.10 : min. licon spacing to varac channel : 0.25um")
+not_in_cell4 = layout(source.cell_obj).select("-s8fs_gwdlvx4", "-s8fs_gwdlvx8", "-s8fs_hvrsw_x4", "-s8fs_hvrsw8", "-s8fs_hvrsw264", "-s8fs_hvrsw520", "-s8fs_rdecdrv", "-s8fs_rdec8”, “s8fs_rdec32", "-s8fs_rdec264", "-s8fs_rdec520")
+not_in_cell4_licon = not_in_cell4.input(66, 44)
+not_in_cell4_licon.and(diff.or(tap)).separation(gate.not(areaid_sc), 0.055, euclidian).output("licon.11", "licon.11 : min. licon spacing to gate : 0.055um")
+licon.and(diff.or(tap)).separation(gate.and(areaid_sc), 0.05, euclidian).output("licon.11a", "licon.11a : min. licon spacing to gate inside areaid.sc : 0.05um")
+in_cell4 = layout(source.cell_obj).select("+s8fs_gwdlvx4", "+s8fs_gwdlvx8", "+s8fs_hvrsw_x4", "+s8fs_hvrsw8", "+s8fs_hvrsw264", "+s8fs_hvrsw520")
+in_cell4_licon = in_cell4.input(66, 44)
+in_cell4_licon.and(diff.or(tap)).separation(gate, 0.04, euclidian).output("licon.11c", "licon.11c : min. licon spacing to gate for specific cells: 0.04um")
+# rules 11.b , 11.d not coded
+diff.interacting(gate).not(diff.interacting(gate).width(5.7, euclidian).polygons).output("licon.12", "licon.12 : max. sd width without licon : 5.7um")
+licon.and(diff.or(tap)).separation(npc, 0.09, euclidian).output("licon.13", "licon.13 : min. difftap licon spacing to npc : 0.09um")
+licon.and(poly).separation(diff.or(tap), 0.19, euclidian).output("licon.14", "licon.14 : min. poly licon spacing to difftap : 0.19um")
+npc.enclosing(licon.and(poly), 0.1, euclidian).output("licon.15", "licon.15 : min. npc enclosure of poly-licon : 0.1um")
+# rule licon.16 not applicable for the diff for the nmos of a nand gates or the pmos of a nor gates
+#diff.not(gate).not_interacting(licon).output("licon.16", "licon.16 : diff must enclose one licon")
+tap.not(uhvi).not_interacting(licon).output("licon.16", "licon.16 : tap must enclose one licon")
+poly.and(tap).edges.not(tap.edges).output("licon.17", "licon.17 : tap must not straddle poly")
+npc.not_interacting(licon.and(poly)).output("licon.18", "licon.18 : npc mut enclosed one poly-licon")
+
+# vpp
+vpp.width(1.43, euclidian).output("vpp.1", "vpp.1 : min. vpp width : 1.43um")
+# rules 1.b, 1.c not coded
+vpp.and(poly.or(difftap)).output("vpp.3", "vpp.3 : vpp must not overlapp poly or diff or tap")
+vpp.and(nwell).edges.not(vpp.edges).output("vpp.4", "vpp.4 : vpp must not straddle nwell")
+vpp.and(dnwell).edges.not(vpp.edges).output("vpp.4", "vpp.4 : vpp must not straddle dnwell")
+vpp.and(poly.or(li).or(m1).or(m2)).separation(poly.or(li).or(m1).or(m2), 1.5, euclidian).polygons.with_area(2.25,nil).output("vpp.5", "vpp.5 : min. vpp spacing to poly or li or m1 or m2 : 1.5um")
+vpp.with_area(0..area(vpp.and(m3))*0.25).output("vpp.5a", "vpp.5a : max. m3 density in vpp : 0.25")
+vpp.with_area(0..area(vpp.and(m4))*0.3).output("vpp.5b", "vpp.5b : max. m4 density in vpp : 0.3")
+vpp.with_area(0..area(vpp.and(m5))*0.4).output("vpp.5c", "vpp.5c : max. m5 density in vpp : 0.4")
+nwell.enclosing(vpp, 1.5, euclidian).output("vpp.8", "vpp.8 : nwell enclosure of vpp : 1.5")
+vpp.separation(nwell, 1.5, euclidian).polygons.without_area(0).output("vpp.9", "vpp.9 : vpp spacing to nwell : 1.5")
+# rule vpp.10 not coded
+# rule vpp.11 not coded because moscap is not defined properly by any gds layer
+# rules vpp.12a, 12b, 12c not coded because specific to one cell
+if backend_flow = CU
+ m1.separation(vpp.and(m1), 0.16, euclidian).polygons.without_area(0).output("vpp.13", "vpp.13 : m1 spacing to m1inside vpp : 0.16")
+end
+
+# CAPM
+capm.width(1.0, euclidian).output("capm.1", "capm.1 : min. capm width : 1.0um")
+capm.isolated(0.84, euclidian).output("capm.2a", "capm.2a : min. capm spacing : 0.84um")
+m2.interacting(capm).isolated(1.2, euclidian).output("capm.2b", "capm.2b : min. capm spacing : 1.2um")
+m2.enclosing(capm, 0.14, euclidian).output("capm.3", "capm.3 : min. m2 enclosure of capm : 0.14um")
+capm.enclosing(via2, 0.14, euclidian).output("capm.4", "capm.4 : min. capm enclosure of via2 : 0.14um")
+capm.separation(via2, 0.14, euclidian).output("capm.5", "capm.5 : min. capm spacing to via2 : 0.14um")
+capm.sized(-20.0).sized(20.0).output("capm.6", "capm.6 : max. capm lenght/width : 20um")
+capm.with_angle(0 .. 90).output("capm.7", "capm.7 : capm not rectangle")
+capm.separation(via, 0.14, euclidian).polygons.without_area(0).output("capm.8", "capm.8 : min. capm spacing to via : 0.14um")
+capm.and(nwell).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle nwell")
+capm.and(diff).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle diff")
+capm.and(tap).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle tap")
+capm.and(poly).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle poly")
+capm.and(li).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle li")
+capm.and(m1).edges.not(capm.edges).output("capm.10", "capm.10 : capm must not straddle m1")
+capm.separation(m2.not_interacting(capm), 0.14, euclidian).output("capm.11", "capm.11 : min. capm spacing to m2 not overlapping capm : 0.5um")
+
+end #FEOL
+
+if BEOL
+info("BEOL section")
+
+# li
+not_in_cell5 = source.select("-s8rf2_xcmvpp_hd5_*")
+not_in_cell5_li = not_in_cell5.polygons(li_wildcard)
+not_in_cell5_li.width(0.17, euclidian).output("li.1", "li.1 : min. li width : 0.17um")
+
+in_cell5_li = li - not_in_cell5_li
+in_cell5_li.width(0.14, euclidian).output("li.1a", "li.1a : min. li width for the cells s8rf2_xcmvpp_hd5_* : 0.14um")
+
+# rule li.2 not coded
+
+not_in_cell5_li.space(0.17, euclidian).output("li.3", "li.3 : min. li spacing : 0.17um")
+in_cell5_li.space(0.14, euclidian).output("li.3a", "li.3a : min. li spacing for the cells s8rf2_xcmvpp_hd5_* : 0.14um")
+licon08 = licon.interacting(li.enclosing(licon, 0.08, euclidian).polygons)
+licon_edges_with_less_enclosure_li = li.enclosing(licon, 0.08, projection).second_edges
+opposite3 = (licon.edges - licon_edges_with_less_enclosure_li).width(0.17 + 1.dbu, projection).polygons
+licon08.not_interacting(opposite3).output("li.5", "li.5 : min. li enclosure of licon of 2 opposite edges : 0.08um")
+li.with_area(0..0.0561).output("li.6", "li.6 : min. li area : 0.0561um²")
+
+# ct
+mcon.edges.without_length(0.17).output("ct.1", "ct.1 : minimum/maximum width of mcon : 0.17um")
+mcon.space(0.19, euclidian).output("ct.2", "ct.2 : min. mcon spacing : 0.19um")
+# rule ct.3 not coded
+mcon.not(li).output("ct.4", "ct.4 : mcon should covered by li")
+if backend_flow = CU
+ li.interacting(li.and(m1).not(mcon).with_holes(1,10)).enclosing(mcon, 0.2, euclidian).output("ct.irdrop.1", "ct.irdrop.1 : min. li enclsoure of 1..10 mcon : 0.2um")
+ li.interacting(li.and(m1).not(mcon).with_holes(11,100)).enclosing(mcon, 0.3, euclidian).output("ct.irdrop.2", "ct.irdrop.2 : min. li enclsoure of 11..100 mcon : 0.3um")
+end
+
+# m1
+m1.width(0.14, euclidian).output("m1.1", "m1.1 : min. m1 width : 0.14um")
+
+huge_m1 = m1.sized(-1.5).sized(1.5)
+non_huge_m1 = m1 - huge_m1
+
+non_huge_m1.space(0.14, euclidian).output("m1.2", "m1.2 : min. m1 spacing : 0.14um")
+
+(huge_m1.separation(non_huge_m1, 0.28, euclidian) + huge_m1.space(0.28, euclidian)).output("m1.3ab", "m1.3ab : min. 3um.m1 spacing m1 : 0.28um")
+
+not_in_cell6 = layout(source.cell_obj).select("-s8cell_ee_plus_sseln_a", "-s8cell_ee_plus_sseln_b", "-s8cell_ee_plus_sselp_a", "-s8cell_ee_plus_sselp_b", "-s8fpls_pl8", "-s8fs_cmux4_fm")
+not_in_cell6_m1 = not_in_cell6.input(m1_wildcard)
+not_in_cell6_m1.enclosing(mcon, 0.03, euclidian).output("m1.4", "m1.4 : min. m1 enclosure of mcon : 0.03um")
+in_cell6 = layout(source.cell_obj).select("+s8cell_ee_plus_sseln_a", "+s8cell_ee_plus_sseln_b", "+s8cell_ee_plus_sselp_a", "+s8cell_ee_plus_sselp_b", "+s8fpls_pl8", "+s8fs_cmux4_fm")
+in_cell6_m1 = in_cell6.input(m1_wildcard)
+in_cell6_m1.enclosing(mcon, 0.005, euclidian).output("m1.4a", "m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um")
+m1.with_area(0..0.083).output("m1.6", "m1.6 : min. m1 area : 0.083um²")
+m1.holes.with_area(0..0.14).output("m1.7", "m1.7 : min. m1 holes area : 0.14um²")
+if backend_flow = AL
+ mcon06 = mcon.interacting(poly.enclosing(m1, 0.06, euclidian).polygons)
+ mcon_edges_with_less_enclosure_m1 = m1.enclosing(mcon, 0.06, projection).second_edges
+ opposite4 = (mcon.edges - mcon_edges_with_less_enclosure_m1).width(0.17 + 1.dbu, projection).polygons
+ mcon06.not_interacting(opposite4).output("m1.5", "m1.5 : min. m1 enclosure of mcon of 2 opposite edges : 0.06um")
+ # rule m1.pd.1, rule m1.pd.2a, rule m1.pd.2b not coded
+end
+if bakend_flow = CU
+ m1.sized(-2.0).sized(2.0).output("m1.11", "m1.11 : max. m1 width after slotting : 4.0um")
+ # rule m1.12 not coded because inconsistent with m1.11
+ # rule m1.13, m1.14, m1.14a not coded : see : https://www.klayout.de/forum/discussion/comment/6759
+end
+
+# via
+#rule via.3 not coded
+via.not(m1).output("via.4c.5c", "via.4c.5c : m1 must enclose all via")
+if backend_flow = AL
+ via.not(areaid_mt).edges.without_length(0.15).output("via.1a", "via.1a : minimum/maximum width of via : 0.15um")
+ via.and(areaid_mt).not_interacting((via.and(areaid_mt).edges.without_length(0.15)).or(via.and(areaid_mt).edges.without_length(0.23)).or(via.and(areaid_mt).edges.without_length(0.28))).output("via.1b", "via.1b : minimum/maximum width of via in areaid.mt: 0.15um or 0.23um or 0.28um")
+ via.isolated(0.17, euclidian).output("via.2", "via.2 : min. via spacing : 0.17um")
+ m1.enclosing(via.not_interacting(via.edges.without_length(0.15)), 0.055, euclidian).output("via.4a", "via.4a : min. m1 enclosure of 0.15um via : 0.055um")
+ m1.enclosing(via.not_interacting(via.edges.without_length(0.23)), 0.03, euclidian).output("via.4b", "via.4b : min. m1 enclosure of 0.23um via : 0.03um")
+ via1_edges_with_less_enclosure_m1 = m1.enclosing(via.not_interacting(via.edges.without_length(0.15)), 0.085, projection).second_edges
+ opposite5 = (via.not_interacting(via.edges.without_length(0.15)).edges - via1_edges_with_less_enclosure_m1).width(0.15 + 1.dbu, projection).polygons
+ via.not_interacting(via.edges.without_length(0.15)).not_interacting(opposite5).output("via1.5a", "via1.5a : min. m1 enclosure of 0.15um via of 2 opposite edges : 0.085um")
+ via2_edges_with_less_enclosure_m1 = m1.enclosing(via.not_interacting(via.edges.without_length(0.23)), 0.06, projection).second_edges
+ opposite6 = (via.not_interacting(via.edges.without_length(0.23)).edges - via2_edges_with_less_enclosure_m1).width(0.23 + 1.dbu, projection).polygons
+ via.not_interacting(via.edges.without_length(0.23)).not_interacting(opposite6).output("via1.5b", "via1.5b : min. m1 enclosure of 0.23um via of 2 opposite edges : 0.06um")
+end
+if backend_flow = CU
+ via.not(areaid_mt).edges.without_length(0.18).output("via.11", "via.11 : minimum/maximum width of via : 0.18um")
+ via.isolated(0.13, euclidian).output("via.12", "via.12 : min. via spacing : 0.13um")
+ # rule via.13 not coded because not understandable
+ via1_edges_with_less_enclosure_m1 = m1.enclosing(via, 0.04, projection).second_edges
+ opposite5 = (via.edges - via1_edges_with_less_enclosure_m1).width(0.18 + 1.dbu, projection).polygons
+ via.not_interacting(opposite5).output("via1.14", "via1.14 : min. m1 enclosure of 0.04um via of 2 opposite edges : 0.04um")
+ # rules via.irdrop.1, via.irdrop.2, via.irdrop.3, via.irdrop.4 not coded because not understandable
+end
+
+# m2
+m2.width(0.14, euclidian).output("m2.1", "m2.1 : min. m2 width : 0.14um")
+
+huge_m2 = m2.sized(-1.5).sized(1.5)
+non_huge_m2 = m2 - huge_m2
+
+non_huge_m2.space(0.14, euclidian).output("m2.2", "m2.2 : min. m2 spacing : 0.14um")
+
+(huge_m2.separation(non_huge_m2, 0.28, euclidian) + huge_m2.space(0.28, euclidian)).output("m2.3ab", "m2.3ab : min. 3um.m2 spacing m2 : 0.28um")
+
+# rule m2.3c not coded
+m2.with_area(0..0.0676).output("m2.6", "m2.6 : min. m2 area : 0.0676um²")
+m2.holes.with_area(0..0.14).output("m2.7", "m2.7 : min. m2 holes area : 0.14um²")
+via.not(m2).output("m2.via", "m2.via : m2 must enclose via")
+if backend_flow = AL
+ m2.enclosing(via, 0.055, euclidian).output("m2.4", "m2.4 : min. m2 enclosure of via : 0.055um")
+ via_edges_with_less_enclosure_m2 = m2.enclosing(via, 0.085, projection).second_edges
+ opposite7 = (via.edges - via_edges_with_less_enclosure_m2).width(0.2 + 1.dbu, projection).polygons
+ via.not_interacting(opposite7).output("m2.5", "m2.5 : min. m2 enclosure of via of 2 opposite edges : 0.085um")
+ # rule m2.pd.1, rule m2.pd.2a, rule m2.pd.2b not coded
+end
+if bakend_flow = CU
+ m2.sized(-2.0).sized(2.0).output("m2.11", "m2.11 : max. m2 width after slotting : 4.0um")
+ # rule m2.12 not coded because inconsistent with m2.11
+ # rule m2.13, m2.14, m2.14a not coded : see : https://www.klayout.de/forum/discussion/comment/6759
+end
+
+# via2
+#rule via233 not coded
+via2.not(m2).output("via2", "via2 : m2 must enclose all via2")
+if backend_flow = AL
+ via2.not(areaid_mt).edges.without_length(0.2).output("via2.1a", "via2.1a : minimum/maximum width of via2 : 0.2um")
+ via2.and(areaid_mt).not_interacting((via2.and(areaid_mt).edges.without_length(0.2)).or(via2.and(areaid_mt).edges.without_length(1.2)).or(via2.and(areaid_mt).edges.without_length(1.5))).output("via2.1b", "via2.1b : minimum/maximum width of via2 in areaid.mt: 0.2um or 1.2um or 1.5um")
+ via2.isolated(0.2, euclidian).output("via2.2", "via2.2 : min. via2 spacing : 0.2um")
+ m2.enclosing(via2, 0.04, euclidian).output("via2.4", "via2.4 : min. m2 enclosure of via2 : 0.04um")
+ m2.enclosing(via2.not_interacting(via2.edges.without_length(1.5)), 0.14, euclidian).output("via2.4a", "via2.4a : min. m2 enclosure of 1.5um via2 : 0.14um")
+ via2_edges_with_less_enclosure_m2 = m2.enclosing(via2, 0.085, projection).second_edges
+ opposite8 = (via2.edges - via2_edges_with_less_enclosure_m2).width(0.2 + 1.dbu, projection).polygons
+ via2.not_interacting(opposite8).output("via2.5", "via2.5 : min. m2 enclosure of via2 of 2 opposite edges : 0.085um")
+end
+if backend_flow = CU
+ via2.edges.without_length(0.21).output("via2.11", "via2.11 : minimum/maximum width of via2 : 0.21um")
+ via2.isolated(0.18, euclidian).output("via2.12", "via2.12 : min. via2 spacing : 0.18um")
+ # rule via2.13 not coded because not understandable, or not clear
+ m2.enclosing(via2, 0.035, euclidian).output("via2.14", "via2.14 : min. m2 enclosure of via2 : 0.035um")
+ # rules via2.irdrop.1, via2.irdrop.2, via2.irdrop.3, via2.irdrop.4 not coded because not understandable
+end
+
+# m3
+m3.width(0.3, euclidian).output("m3.1", "m3.1 : min. m3 width : 0.3um")
+
+huge_m3 = m3.sized(-1.5).sized(1.5)
+non_huge_m3 = m3 - huge_m3
+
+non_huge_m3.space(0.3, euclidian).output("m3.2", "m3.2 : min. m3 spacing : 0.3um")
+
+(huge_m3.separation(non_huge_m3, 0.4, euclidian) + huge_m3.space(0.4, euclidian)).output("m3.3ab", "m3.3ab : min. 3um.m3 spacing m3 : 0.4um")
+
+# rule m3.3c not coded
+m3.with_area(0..0.24).output("m3.6", "m3.6 : min. m3 area : 0.24um²")
+via2.not(m3).output("m3.via2", "m3.via2 : m3 must enclose via2")
+if backend_flow = AL
+ m3.enclosing(via2, 0.065, euclidian).output("m3.4", "m3.4 : min. m3 enclosure of via2 : 0.065um")
+ via2_edges_with_less_enclosure_m3 = m3.enclosing(via2, 0.085, projection).second_edges
+ # m3.5 N/A
+ # opposite9 = (via2.edges - via2_edges_with_less_enclosure_m3).width(0.3 + 1.dbu, projection).polygons
+ # via2.not_interacting(opposite9).output("m3.5", "m3.5 : min. m3 enclosure of via2 of 2 opposite edges : 0.085um")
+ # rule m3.pd.1, rule m3.pd.2a, rule m3.pd.2b not coded
+end
+if bakend_flow = CU
+ m3.holes.with_area(0..0.2).output("m3.7", "m3.7 : min. m3 holes area : 0.2um²")
+ m3.sized(-2.0).sized(2.0).output("m3.11", "m3.11 : max. m3 width after slotting : 4.0um")
+ # rule m3.12 not coded because inconsistent with m3.11
+ # rule m3.13, m3.14, m3.14a not coded : see : https://www.klayout.de/forum/discussion/comment/6759
+end
+
+# via3
+#rule via3.3 not coded
+via3.not(m3).output("via3", "via3 : m3 must enclose all via3")
+if backend_flow = AL
+ via3.not(areaid_mt).edges.without_length(0.2).output("via3.1a", "via3.1a : minimum/maximum width of via3 : 0.2um")
+ via3.and(areaid_mt).not_interacting((via3.and(areaid_mt).edges.without_length(0.2)).or(via3.and(areaid_mt).edges.without_length(0.8))).output("via3.1a", "via3.1a : minimum/maximum width of via3 in areaid.mt: 0.2um or 0.8um")
+ via3.isolated(0.2, euclidian).output("via3.2", "via3.2 : min. via3 spacing : 0.2um")
+ m3.enclosing(via3, 0.06, euclidian).output("via3.4", "via3.4 : min. m3 enclosure of via3 : 0.06um")
+ via3_edges_with_less_enclosure_m3 = m3.enclosing(via3, 0.09, projection).second_edges
+ opposite10 = (via3.edges - via3_edges_with_less_enclosure_m3).width(0.2 + 1.dbu, projection).polygons
+ via3.not_interacting(opposite10).output("via3.5", "via3.5 : min. m2 enclosure of via3 of 2 opposite edges : 0.09um")
+end
+if backend_flow = CU
+ via3.edges.without_length(0.21).output("via3.11", "via3.11 : minimum/maximum width of via3 : 0.21um")
+ via3.isolated(0.18, euclidian).output("via3.12", "via3.12 : min. via3 spacing : 0.18um")
+ m3.enclosing(via3, 0.055, euclidian).output("via3.13", "via3.13 : min. m3 enclosure of via3 : 0.055um")
+ # rule via3.14 not coded because not understandable, or not clear
+ # rules via3.irdrop.1, via3.irdrop.2, via3.irdrop.3, via3.irdrop.4 not coded because not understandable
+end
+
+# m4
+m4.width(0.3, euclidian).output("m4.1", "m4.1 : min. m4 width : 0.3um")
+
+huge_m4 = m4.sized(-1.5).sized(1.5)
+non_huge_m4 = m4 - huge_m4
+
+non_huge_m4.space(0.3, euclidian).output("m4.2", "m4.2 : min. m4 spacing : 0.3um")
+
+(huge_m4.separation(non_huge_m4, 0.4, euclidian) + huge_m4.space(0.4, euclidian)).output("m4.5ab", "m4.5ab : min. 3um.m4 spacing m4 : 0.4um")
+
+m4.with_area(0..0.24).output("m4.4", "m4.4 : min. m4 area : 0.24um²")
+via3.not(m4).output("m4.via3", "m4.via3 : m4 must enclose via3")
+if backend_flow = AL
+ m4.enclosing(via3, 0.065, euclidian).output("m4.3", "m4.3 : min. m4 enclosure of via3 : 0.065um")
+ # m4.5 doesn't exist
+ # via3_edges_with_less_enclosure_m4 = m4.enclosing(via2, 0.085, projection).second_edges
+ # opposite9 = (via3.edges - via3_edges_with_less_enclosure_m4).width(0.3 + 1.dbu, projection).polygons
+ # via3.not_interacting(opposite9).output("m4.5", "m4.5 : min. m4 enclosure of via3 of 2 opposite edges : 0.085um")
+ # rule m4.pd.1, rule m4.pd.2a, rule m4.pd.2b not coded
+end
+if bakend_flow = CU
+ m4.holes.with_area(0..0.2).output("m4.7", "m4.7 : min. m4 holes area : 0.2um²")
+ m4.sized(-5.0).sized(5.0).output("m4.11", "m4.11 : max. m4 width after slotting : 10.0um")
+ # rule m4.12 not coded because inconsistent with m4.11
+ # rule m4.13, m4.14, m4.14a not coded : see : https://www.klayout.de/forum/discussion/comment/6759
+ m4.enclosing(via3, 0.06, euclidian).output("m4.15", "m4.15 : min. m4 enclosure of via3 : 0.06um")
+end
+
+# via4
+via4.edges.without_length(0.8).output("via4.1a", "via4.1a : minimum/maximum width of via4 : 0.8um")
+via4.isolated(0.8, euclidian).output("via4.2", "via4.2 : min. via4 spacing : 0.8um")
+#rule via4.3 not coded
+m4.enclosing(via4, 0.19, euclidian).output("via4.4", "via4.4 : min. m4 enclosure of via4 : 0.19um")
+via4.not(m4).output("via4", "via4 : m4 must enclose all via4")
+if backend_flow = CU
+ # rules via4.irdrop.1, via4.irdrop.2, via4.irdrop.3, via4.irdrop.4 not coded because not understandable
+end
+
+# m5
+m5.width(1.6, euclidian).output("m5.1", "m5.1 : min. m5 width : 1.6um")
+
+m5.space(1.6, euclidian).output("m5.2", "m5.2 : min. m5 spacing : 1.6um")
+
+via4.not(m5).output("m5.via4", "m5.via4 : m5 must enclose via4")
+m5.enclosing(via4, 0.31, euclidian).output("m5.3", "m4.3 : min. m5 enclosure of via4 : 0.31um")
+
+# nsm
+nsm.width(3.0, euclidian).output("nsm.1", "nsm.1 : min. nsm width : 3.0um")
+nsm.isolated(4.0, euclidian).output("nsm.2", "nsm.2 : min. nsm spacing : 4.0um")
+nsm.enclosing(diff, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of diff : 3.0um")
+nsm.enclosing(tap, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of tap : 3.0um")
+nsm.enclosing(poly, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of poly : 3.0um")
+nsm.enclosing(li, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of li : 3.0um")
+nsm.enclosing(m1, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of m1 : 3.0um")
+nsm.enclosing(m2, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of m2 : 3.0um")
+nsm.enclosing(m3, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of m3 : 3.0um")
+nsm.enclosing(m4, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of m4 : 3.0um")
+nsm.enclosing(m5, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of m5 : 3.0um")
+nsm.enclosing(cfom, 3.0, euclidian).output("nsm.4", "nsm.4 : min. nsm enclosure of cfom : 3.0um")
+if backend_flow = AL
+ nsm.separation(diff, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to diff : 1.0um")
+ nsm.separation(tap, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to tap : 1.0um")
+ nsm.separation(poly, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to poly : 1.0um")
+ nsm.separation(li, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to li : 1.0um")
+ nsm.separation(m1, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to m1 : 1.0um")
+ nsm.separation(m2, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to m2 : 1.0um")
+ nsm.separation(m3, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to m3 : 1.0um")
+ nsm.separation(m4, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to m4 : 1.0um")
+ nsm.separation(m5, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to m5 : 1.0um")
+ nsm.separation(cfom, 1.0, euclidian).output("nsm.3", "nsm.3 : min. nsm spacing to cfom : 1.0um")
+end
+
+# pad
+pad.isolated(1.27, euclidian).output("pad.2", "pad.2 : min. pad spacing : 1.27um")
+
+end #BEOL
+
+if FEOL
+info("FEOL section")
+
+# mf
+mf.not_interacting(mf.edges.without_length(0.8)).output("mf.1", "mf.1 : minimum/maximum width of fuse : 0.8um")
+mf.not_interacting(mf.edges.without_length(7.2)).output("mf.2", "mf.2 : minimum/maximum length of fuse : 7.2um")
+mf.isolated(1.96, euclidian).output("mf.3", "mf.3 : min. fuse center spacing : 2.76um")
+# fuses need more clarification on fuse_shield, fuse layers ...
+
+# hvi
+hvi.width(0.6, euclidian).output("hvi.1", "hvi.1 : min. hvi width : 0.6um")
+hvi.isolated(0.7, euclidian).output("hvi.2", "hvi.2 : min. hvi spacing, merge if less : 0.7um")
+hvi.and(tunm).output("hvi.4", "hvi.4 : hvi must not overlapp tunm")
+hvi.and(nwell).separation(nwell, 2.0, euclidian).output("hvnwell.8", "hvnwelli.8 : min. hvnwel spacing to nwell : 2.0")
+areaid_hl.not(hvi).output("hvnwel.9", "hvnwell.9 : hvi must overlapp hvnwell")
+# rule hvnell.10 not coded
+diff.not(psdm.and(diff_rs)).and(hvi).width(0.29, euclidian).output("hvdifftap.14", "hvdifftap.14 : min. diff inside hvi width : 0.29um")
+diff.and(psdm.and(diff_rs)).and(hvi).width(0.15, euclidian).output("hvdifftap.14a", "hvdifftap.14a : min. p+diff resistor inside hvi width : 0.15um")
+diff.and(hvi).isolated(0.3, euclidian).output("hvdifftap.15a", "hvdifftap.15a : min. diff inside hvi spacing : 0.3um")
+diff.and(hvi).and(nsdm).separation(diff.and(hvi).and(psdm), 0.37, euclidian).polygons.without_area(0).output("hvdifftap.15b", "hvdifftap.15b : min. n+diff inside hvi spacing to p+diff inside hvi except abutting: 0.37um")
+tap.and(hvi).edges.and(diff).without_length(0.7).output("hvdifftap.16", "hvdifftap.16 : min. tap inside hvi abuttng diff : 0.7um")
+hvi.and(nwell).enclosing(diff, 0.33, euclidian).output("hvdifftap.17", "hvdifftap.17 : min. hvnwell enclosure of p+diff : 0.33um")
+hvi.and(nwell).separation(diff, 0.43, euclidian).output("hvdifftap.18", "hvdifftap.18 : min. hvnwell spacing to n+diff : 0.43um")
+hvi.and(nwell).enclosing(tap, 0.33, euclidian).output("hvdifftap.19", "hvdifftap.19 : min. hvnwell enclosure of n+tap : 0.33um")
+hvi.and(nwell).separation(tap, 0.43, euclidian).output("hvdifftap.20", "hvdifftap.20 : min. hvnwell spacing to p+tap : 0.43um")
+hvi.and(diff).edges.not(diff.edges).output("hvdifftap.21", "hvdifftap.21 : diff must not straddle hvi")
+hvi.and(tap).edges.not(tap.edges).output("hvdifftap.21", "hvdifftap.21 : tap must not straddle hvi")
+hvi.enclosing(difftap, 0.18, euclidian).output("hvdifftap.22", "hvdifftap.22 : min. hvi enclosure of diff or tap : 0.18um")
+hvi.separation(difftap, 0.18, euclidian).output("hvdifftap.23", "hvdifftap.23 : min. hvi spacing to diff or tap : 0.18um")
+hvi.and(diff).not(nwell).separation(nwell, 0.43, euclidian).output("hvdifftap.24", "hvdifftap.24 : min. hv n+diff spacing to nwell : 0.43um")
+diff.and(hvi).not(nwell).isolated(1.07, euclidian).polygons.and(tap).output("hvdifftap.25", "hvdifftap.25 : min. n+diff inside hvi spacing accros p+tap : 1.07um")
+diff.not(poly).edges.and(gate.and(hvi).edges).space(0.35, euclidian).output("hvpoly.13", "hvpoly.13: min. hvi gate length : 0.5um")
+hvi.and(poly).edges.not(poly.edges).output("hvpoly.14", "hvpoly.14 : poly must not straddle hvi")
+
+# hvntm
+hvntm.width(0.7, euclidian).output("hvntm.1", "hvntm.1 : min. hvntm width : 0.7um")
+hvntm.isolated(0.7, euclidian).output("hvntm.2", "hvntm.2 : min. hvntm spacing : 0.7um")
+hvntm.enclosing(diff.and(nwell).and(hvi), 0.185, euclidian).output("hvntm.3", "hvntm.3 : min. hvntm enclosure of hv n+diff : 0.185um")
+hvntm.separation(diff.not(nwell).not(hvi), 0.185, euclidian).output("hvntm.4", "hvntm.4 : min. hvntm spacing to n+diff : 0.185um")
+hvntm.separation(diff.and(nwell).not(hvi), 0.185, euclidian).output("hvntm.5", "hvntm.5 : min. hvntm spacing to p+diff : 0.185um")
+hvntm.separation(tap.not(nwell).not(hvi), 0.185, euclidian).polygons.without_area(0).output("hvntm.6a", "hvntm.6a : min. hvntm spacing to p+tap : 0.185um")
+hvntm.and(areaid_ce).output("hvntm.9", "hvntm.9 : hvntm must not overlapp areaid.ce")
+
+# denmos
+poly.not_interacting(pwde).interacting(areaid_en).width(1.055, projection).output("denmos.1", "denmos.1 : min. de_nfet gate width : 1.055um")
+diff.not_interacting(pwde).enclosing(poly.interacting(areaid_en), 0.28, projection).polygons.without_area(0).output("denmos.2", "denmos.2 : min. de_nfet source ouside poly width : 0.28um")
+diff.not_interacting(pwde).and(poly.interacting(areaid_en)).width(0.925, projection).output("denmos.3", "denmos.3 : min. de_nfet source inside poly width : 0.925um")
+diff.not_interacting(pwde).interacting(areaid_en).not_interacting(poly).width(0.17, euclidian).output("denmos.4", "denmos.4 : min. de_nfet drain width : 0.17um")
+nwell.not_interacting(pwde).and(poly.interacting(areaid_en)).width(0.225, projection).polygons.or(nwell.and(poly.interacting(areaid_en)).sized(-0.1125).sized(0.1125)).output("denmos.5", "denmos.5 : min. de_nfet source inside nwell width : 0.225m")
+diff.not_interacting(pwde).interacting(areaid_en).not_interacting(poly).separation(diff.interacting(poly.interacting(areaid_en)), 1.585, projection).output("denmos.6", "denmos.6 : min. de_nfet source spacing to drain : 1.585um")
+nwell.not_interacting(pwde).and(poly.and(diff).interacting(areaid_en)).edges.without_length(5.0, nil).output("denmos.7", "denmos.7 : min. de_nfet channel width : 5.0um")
+diff.not_interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.without_angle(45).without_angle(135).without_angle(225).without_angle(315).output("denmos.8", "denmos.8 : 90deg. not allowed for de_nfet drain")
+nwell.not_interacting(pwde).interacting(areaid_en).edges.without_angle(45).without_angle(135).without_angle(225).without_angle(315).output("denmos.9a", "denmos.9a : 90deg. not allowed for de_nfet nwell")
+nwell.not_interacting(pwde).interacting(areaid_en).edges.with_angle(45).without_length(0.607..0.609).output("denmos.9a", "denmos.9a : 45deg. bevels of de_nfet nwell should be 0.43um from corners")
+nwell.not_interacting(pwde).interacting(areaid_en).edges.with_angle(135).without_length(0.607..0.609).output("denmos.9a", "denmos.9a : 45deg. bevels of de_nfet nwell should be 0.43um from corners")
+diff.not_interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.with_angle(45).without_length(0.7..0.71).output("denmos.9b", "denmos.9b : 45deg. bevels of de_nfet drain should be 0.05um from corners")
+diff.not_interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.with_angle(135).without_length(0.7..0.71).output("denmos.9b", "denmos.9b : 45deg. bevels of de_nfet drain should be 0.05um from corners")
+nwell.not_interacting(pwde).enclosing(diff.interacting(areaid_en).not_interacting(poly), 0.66, euclidian).output("denmos.10", "denmos.10 : min. nwell enclosure of de_nfet drain : 0.66um")
+nwell.not_interacting(pwde).interacting(areaid_en).separation(tap.not(nwell), 0.86, euclidian).output("denmos.11", "denmos.11 : min. de_nfet nwell spacing to tap : 0.86um")
+nwell.not_interacting(pwde).interacting(areaid_en).isolated(2.4, euclidian).output("denmos.12", "denmos.12 : min. de_nfet nwell : 2.4um")
+nsdm.not_interacting(pwde).enclosing(diff.interacting(areaid_en).interacting(poly), 0.13, euclidian).output("denmos.13", "denmos.13 : min. nsdm enclosure of de_nfet source : 0.13um")
+
+# depmos
+poly.interacting(pwde).interacting(areaid_en).width(1.05, projection).output("depmos.1", "depmos.1 : min. de_pfet gate width : 1.05um")
+diff.interacting(pwde).enclosing(poly.interacting(areaid_en), 0.28, projection).polygons.without_area(0).output("depmos.2", "depmos.2 : min. de_pfet source ouside poly width : 0.28um")
+diff.interacting(pwde).and(poly.interacting(areaid_en)).width(0.92, projection).output("depmos.3", "depmos.3 : min. de_pfet source inside poly width : 0.92um")
+diff.interacting(pwde).interacting(areaid_en).not_interacting(poly).width(0.17, euclidian).output("depmos.4", "depmos.4 : min. de_pfet drain width : 0.17um")
+pwde.not(nwell).and(poly.interacting(areaid_en)).width(0.26, projection).polygons.or(pwde.not(nwell).and(poly.interacting(areaid_en)).sized(-0.13).sized(0.13)).output("depmos.5", "depmos.5 : min. de_pfet source inside nwell width : 0.26m")
+diff.interacting(pwde).interacting(areaid_en).not_interacting(poly).separation(diff.interacting(poly.interacting(areaid_en)), 1.19, projection).output("depmos.6", "depmos.6 : min. de_pfet source spacing to drain : 1.19um")
+nwell.interacting(pwde).and(poly.and(diff).interacting(areaid_en)).edges.without_length(5.0, nil).output("depmos.7", "depmos.7 : min. de_pfet channel width : 5.0um")
+diff.interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.without_angle(45).without_angle(135).without_angle(225).without_angle(315).output("depmos.8", "depmos.8 : 90deg. not allowed for de_pfet drain")
+pwde.not(nwell).interacting(areaid_en).edges.without_angle(45).without_angle(135).without_angle(225).without_angle(315).output("depmos.9a", "depmos.9a : 90deg. not allowed for de_pfet pwell")
+pwde.not(nwell).interacting(areaid_en).edges.with_angle(45).without_length(0.607..0.609).output("depmos.9a", "depmos.9a : 45deg. bevels of de_pfet pwell should be 0.43um from corners")
+pwde.not(nwell).interacting(areaid_en).edges.with_angle(135).without_length(0.607..0.609).output("depmos.9a", "depmos.9a : 45deg. bevels of de_pfet pwell should be 0.43um from corners")
+diff.interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.with_angle(45).without_length(0.7..0.71).output("depmos.9b", "depmos.9b : 45deg. bevels of de_pfet drain should be 0.05um from corners")
+diff.interacting(pwde).interacting(areaid_en).not_interacting(poly).edges.with_angle(135).without_length(0.7..0.71).output("depmos.9b", "depmos.9b : 45deg. bevels of de_pfet drain should be 0.05um from corners")
+nwell.interacting(pwde).separation(diff.interacting(areaid_en).not_interacting(poly), 0.86, euclidian).output("depmos.10", "depmos.10 : min. pwell enclosure of de_pfet drain : 0.86um")
+pwde.not(nwell).interacting(areaid_en).separation(tap.and(nwell), 0.66, euclidian).output("depmos.11", "depmos.11 : min. de_pfet pwell spacing to tap : 0.66um")
+psdm.interacting(pwde).enclosing(diff.interacting(areaid_en).interacting(poly), 0.13, euclidian).output("depmos.12", "depmos.12 : min. psdm enclosure of de_pfet source : 0.13um")
+
+# extd
+areaid_en.and(difftap).edges.not(difftap.edges).output("extd.1", "extd.1 : difftap must not straddle areaid.en")
+difftap.interacting(areaid_en).not(poly).with_area(0).output("extd.2", "extd.2 : poly must not overlapp entirely difftap in areaid.en")
+# rules extd.4, extd.5, extd.6, extd.7 not coded because specific to some cells
+
+# vhvi
+# rules vhvi.vhv.1, vhvi.vhv.2, vhvi.vhv.3, vhvi.vhv.4, vhvi.vhv.5, vhvi.vhv.6 not coded
+vhvi.width(0.02, euclidian).output("vhvi.1", "vhvi.1 : min. vhvi width : 0.02um")
+vhvi.and(areaid_ce).output("vhvi.2", "vhvi.2 : vhvi must not overlap areaid.ce")
+vhvi.and(hvi).output("vhvi.3", "vhvi.3 : vhvi must not overlap hvi")
+# rules vhvi.4, vhvi.6 not coded
+vhvi.and(diff).edges.not(diff.edges).output("vhvi.5", "vhvi.5 : vhvi must not straddle diff")
+vhvi.and(tap).edges.not(tap.edges).output("vhvi.5", "vhvi.5 : vhvi must not straddle tap")
+vhvi.and(poly).edges.not(poly.edges).output("vhvi.7", "vhvi.7 : vhvi must not straddle poly")
+
+nwell.and(vhvi).separation(nwell, 2.5, euclidian).output("hv.nwell.1", "hv.nwell.1 : min. vhvi nwell spacing to nwell : 2.5um")
+diff.and(vhvi).isolated(0.3, euclidian).output("hv.diff.1", "hv.diff.1 : min. vhvi diff spacing : 0.3um")
+nwell.interacting(diff.and(vhvi)).separation(diff.not(nwell), 0.43, euclidian).output("hv.diff.2", "hv.diff.2 : min. vhvi nwell spacing n+diff : 0.43um")
+diff.and(vhvi).not(nwell).separation(nwell, 0.55, euclidian).output("hv.diff.3a", "hv.diff.3a : min. vhvi n+diff spacing nwell : 0.55um")
+# rule hv.diff.3b not coded
+poly.and(vhvi).not(diff).separation(diff, 0.3, euclidian).polygons.without_area(0).output("hv.poly.2", "hv.poly.2 : min. vhvi poly spacing to diff : 0.3um")
+poly.and(vhvi).not(diff).separation(nwell, 0.55, euclidian).polygons.without_area(0).output("hv.poly.3", "hv.poly.3 : min. vhvi poly spacing to nwell : 0.55um")
+nwell.enclosing(poly.and(vhvi).not(diff), 0.3, euclidian).polygons.without_area(0).output("hv.poly.4", "hv.poly.4 : min. nwell enclosure of vhvi poly : 0.3um")
+#poly.and(vhvi).enclosing(diff.interacting(areaid_en), 0.16, projection).polygons.without_area(0).output("hv.poly.6", "hv.poly.6 : min. poly enclosure of hvfet gate : 0.16um")
+# rule hv.poly.7 not coded
+
+# uhvi
+uhvi.and(diff).edges.not(diff.edges).output("uhvi.1", "uhvi.1 : diff must not straddle uhvi")
+uhvi.and(tap).edges.not(tap.edges).output("uhvi.1", "uhvi.1 : tap must not straddle uhvi")
+uhvi.and(poly).edges.not(poly.edges).output("uhvi.2", "uhvi.2 : poly must not straddle uhvi")
+pwbm.not(uhvi).output("uhvi.3", "uhvi.3 : uhvi must not enclose pwbm")
+uhvi.and(dnwell).edges.not(dnwell.edges).output("uhvi.4", "uhvi.4 : dnwell must not straddle uhvi")
+areaid_en20.not(uhvi).output("uhvi.5", "uhvi.5 : uhvi must not enclose areaid.en20")
+#dnwell.not(uhvi).output("uhvi.6", "uhvi.6 : uhvi must not enclose dnwell")
+natfet.not(uhvi).output("uhvi.7", "uhvi.7 : uhvi must not enclose natfet")
+
+# pwell_res
+pwell_rs.width(2.65).output("pwres.2", "pwres.2 : min. pwell resistor width : 2.65um")
+pwell_rs.sized(-2.65).sized(2.65).output("pwres.2", "pwres.2 : max. pwell resistor width : 2.65um")
+pwell_rs.interacting(pwell_rs.edges.with_length(2.651,26.499)).output("pwres.3", "pwres.3 : min. pwell resistor length : 26.5um")
+pwell_rs.interacting(pwell_rs.edges.with_length(265.0, nil)).output("pwres.4", "pwres.4 : max. pwell resistor length : 265um")
+tap.interacting(pwell_rs).separation(nwell, 0.22, euclidian).output("pwres.5", "pwres.5 : min. pwell resistor tap spacing to nwell : 0.22um")
+tap.interacting(pwell_rs).and(tap.sized(0.22).and(nwell)).output("pwres.5", "pwres.5 : max. pwell resistor tap spacing to nwell : 0.22um")
+tap.interacting(pwell_rs).width(0.53).output("pwres.6", "pwres.6 : min. width of tap inside pwell resistor : 0.53um")
+tap.interacting(pwell_rs).sized(-0.265).sized(0.265).output("pwres.6", "pwres.6 : max. width of tap inside pwell resistor : 0.53um")
+# rules pwres.7a, pwres.7b not coded
+pwell_rs.and(diff).output("pwres.8", "pwres.8 : diff not allowed inside pwell resistor")
+pwell_rs.and(poly).output("pwres.8", "pwres.8 : poly not allowed inside pwell resistor")
+# rules pwres.9, pwres.10 not coded
+
+# rf_diode
+areaid_re.with_angle(0 .. 90).output("rfdiode.1", "rfdiode.1 : non 90 degree angle areaid.re")
+areaid_re.not(nwell).or(nwell.interacting(areaid_re).not(areaid_re)).output("rfdiode.2", "rfdiode.2 : areaid.re must coincide rf nwell diode")
+# rule rfdiode.3 not coded
+
+end #FEOL
+
+if OFFGRID
+info("OFFGRID-ANGLES section")
+
+dnwell.ongrid(0.005).output("dnwell_OFFGRID", "x.1b : OFFGRID vertex on dnwell")
+dnwell.with_angle(0 .. 45).output("dnwell_angle", "x.3a : non 45 degree angle dnwell")
+nwell.ongrid(0.005).output("nwell_OFFGRID", "x.1b : OFFGRID vertex on nwell")
+nwell.with_angle(0 .. 45).output("nwell_angle", "x.3a : non 45 degree angle nwell")
+pwbm.ongrid(0.005).output("pwbm_OFFGRID", "x.1b : OFFGRID vertex on pwbm")
+pwbm.with_angle(0 .. 45).output("pwbm_angle", "x.3a : non 45 degree angle pwbm")
+pwde.ongrid(0.005).output("pwde_OFFGRID", "x.1b : OFFGRID vertex on pwde")
+pwde.with_angle(0 .. 45).output("pwde_angle", "x.3a : non 45 degree angle pwde")
+hvtp.ongrid(0.005).output("hvtp_OFFGRID", "x.1b : OFFGRID vertex on hvtp")
+hvtp.with_angle(0 .. 45).output("hvtp_angle", "x.3a : non 45 degree angle hvtp")
+hvtr.ongrid(0.005).output("hvtr_OFFGRID", "x.1b : OFFGRID vertex on hvtr")
+hvtr.with_angle(0 .. 45).output("hvtr_angle", "x.3a : non 45 degree angle hvtr")
+lvtn.ongrid(0.005).output("lvtn_OFFGRID", "x.1b : OFFGRID vertex on lvtn")
+lvtn.with_angle(0 .. 45).output("lvtn_angle", "x.3a : non 45 degree angle lvtn")
+ncm.ongrid(0.005).output("ncm_OFFGRID", "x.1b : OFFGRID vertex on ncm")
+ncm.with_angle(0 .. 45).output("ncm_angle", "x.3a : non 45 degree angle ncm")
+diff.ongrid(0.005).output("diff_OFFGRID", "x.1b : OFFGRID vertex on diff")
+tap.ongrid(0.005).output("tap_OFFGRID", "x.1b : OFFGRID vertex on tap")
+diff.not(areaid_en.and(uhvi)).with_angle(0 .. 90).output("diff_angle", "x.2 : non 90 degree angle diff")
+diff.and(areaid_en.and(uhvi)).with_angle(0 .. 45).output("diff_angle", "x.2c : non 45 degree angle diff")
+tap.not(areaid_en.and(uhvi)).with_angle(0 .. 90).output("tap_angle", "x.2 : non 90 degree angle tap")
+tap.and(areaid_en.and(uhvi)).with_angle(0 .. 45).output("tap_angle", "x.2c : non 45 degree angle tap")
+tunm.ongrid(0.005).output("tunm_OFFGRID", "x.1b : OFFGRID vertex on tunm")
+tunm.with_angle(0 .. 45).output("tunm_angle", "x.3a : non 45 degree angle tunm")
+poly.ongrid(0.005).output("poly_OFFGRID", "x.1b : OFFGRID vertex on poly")
+poly.with_angle(0 .. 90).output("poly_angle", "x.2 : non 90 degree angle poly")
+rpm.ongrid(0.005).output("rpm_OFFGRID", "x.1b : OFFGRID vertex on rpm")
+rpm.with_angle(0 .. 45).output("rpm_angle", "x.3a : non 45 degree angle rpm")
+npc.ongrid(0.005).output("npc_OFFGRID", "x.1b : OFFGRID vertex on npc")
+npc.with_angle(0 .. 45).output("npc_angle", "x.3a : non 45 degree angle npc")
+nsdm.ongrid(0.005).output("nsdm_OFFGRID", "x.1b : OFFGRID vertex on nsdm")
+nsdm.with_angle(0 .. 45).output("nsdm_angle", "x.3a : non 45 degree angle nsdm")
+psdm.ongrid(0.005).output("psdm_OFFGRID", "x.1b : OFFGRID vertex on psdm")
+psdm.with_angle(0 .. 45).output("psdm_angle", "x.3a : non 45 degree angle psdm")
+licon.ongrid(0.005).output("licon_OFFGRID", "x.1b : OFFGRID vertex on licon")
+licon.with_angle(0 .. 90).output("licon_angle", "x.2 : non 90 degree angle licon")
+li.ongrid(0.005).output("li_OFFGRID", "x.1b : OFFGRID vertex on li")
+li.with_angle(0 .. 45).output("li_angle", "x.3a : non 45 degree angle li")
+mcon.ongrid(0.005).output("ct_OFFGRID", "x.1b : OFFGRID vertex on mcon")
+mcon.with_angle(0 .. 90).output("ct_angle", "x.2 : non 90 degree angle mcon")
+vpp.ongrid(0.005).output("vpp_OFFGRID", "x.1b : OFFGRID vertex on vpp")
+vpp.with_angle(0 .. 45).output("vpp_angle", "x.3a : non 45 degree angle vpp")
+m1.ongrid(0.005).output("m1_OFFGRID", "x.1b : OFFGRID vertex on m1")
+m1.with_angle(0 .. 45).output("m1_angle", "x.3a : non 45 degree angle m1")
+via.ongrid(0.005).output("via_OFFGRID", "x.1b : OFFGRID vertex on via")
+via.with_angle(0 .. 90).output("via_angle", "x.2 : non 90 degree angle via")
+m2.ongrid(0.005).output("m2_OFFGRID", "x.1b : OFFGRID vertex on m2")
+m2.with_angle(0 .. 45).output("m2_angle", "x.3a : non 45 degree angle m2")
+via2.ongrid(0.005).output("via2_OFFGRID", "x.1b : OFFGRID vertex on via2")
+via2.with_angle(0 .. 90).output("via2_angle", "x.2 : non 90 degree angle via2")
+m3.ongrid(0.005).output("m3_OFFGRID", "x.1b : OFFGRID vertex on m3")
+m3.with_angle(0 .. 45).output("m3_angle", "x.3a : non 45 degree angle m3")
+via3.ongrid(0.005).output("via3_OFFGRID", "x.1b : OFFGRID vertex on via3")
+via3.with_angle(0 .. 90).output("via3_angle", "x.2 : non 90 degree angle via3")
+nsm.ongrid(0.005).output("nsm_OFFGRID", "x.1b : OFFGRID vertex on nsm")
+nsm.with_angle(0 .. 45).output("nsm_angle", "x.3a : non 45 degree angle nsm")
+m4.ongrid(0.005).output("m4_OFFGRID", "x.1b : OFFGRID vertex on m4")
+m4.with_angle(0 .. 45).output("m4_angle", "x.3a : non 45 degree angle m4")
+via4.ongrid(0.005).output("via4_OFFGRID", "x.1b : OFFGRID vertex on via4")
+via4.with_angle(0 .. 90).output("via4_angle", "x.2 : non 90 degree angle via4")
+m5.ongrid(0.005).output("m5_OFFGRID", "x.1b : OFFGRID vertex on m5")
+m5.with_angle(0 .. 45).output("m5_angle", "x.3a : non 45 degree angle m5")
+pad.ongrid(0.005).output("pad_OFFGRID", "x.1b : OFFGRID vertex on pad")
+pad.with_angle(0 .. 45).output("pad_angle", "x.3a : non 45 degree angle pad")
+mf.ongrid(0.005).output("mf_OFFGRID", "x.1b : OFFGRID vertex on mf")
+mf.with_angle(0 .. 90).output("mf_angle", "x.2 : non 90 degree angle mf")
+hvi.ongrid(0.005).output("hvi_OFFGRID", "x.1b : OFFGRID vertex on hvi")
+hvi.with_angle(0 .. 45).output("hvi_angle", "x.3a : non 45 degree angle hvi")
+hvntm.ongrid(0.005).output("hvntm_OFFGRID", "x.1b : OFFGRID vertex on hvntm")
+hvntm.with_angle(0 .. 45).output("hvntm_angle", "x.3a : non 45 degree angle hvntm")
+vhvi.ongrid(0.005).output("vhvi_OFFGRID", "x.1b : OFFGRID vertex on vhvi")
+vhvi.with_angle(0 .. 45).output("vhvi_angle", "x.3a : non 45 degree angle vhvi")
+uhvi.ongrid(0.005).output("uhvi_OFFGRID", "x.1b : OFFGRID vertex on uhvi")
+uhvi.with_angle(0 .. 45).output("uhvi_angle", "x.3a : non 45 degree angle uhvi")
+pwell_rs.ongrid(0.005).output("pwell_rs_OFFGRID", "x.1b : OFFGRID vertex on pwell_rs")
+pwell_rs.with_angle(0 .. 45).output("pwell_rs_angle", "x.3a : non 45 degree angle pwell_rs")
+areaid_re.ongrid(0.005).output("areaid_re_OFFGRID", "x.1b : OFFGRID vertex on areaid.re")
+
+end #OFFGRID
+
diff --git a/aes_sky130_50mhz/flow/drc_report.rpt b/aes_sky130_50mhz/flow/drc_report.rpt
new file mode 100644
index 0000000000000000000000000000000000000000..c42a076d39547721a7a425ffc241bcad76d34c1a
--- /dev/null
+++ b/aes_sky130_50mhz/flow/drc_report.rpt
@@ -0,0 +1,5164 @@
+
+
+ SKY130 DRC runset
+
+ drc: script='/tmp/datagen_output/aes_sky130_50mhz/flow/drc_deck_patched.lydrc'
+ aes
+
+
+
+
+ li.1
+ li.1 : min. li width : 0.17um
+
+
+
+
+ li.1a
+ li.1a : min. li width for the cells s8rf2_xcmvpp_hd5_* : 0.14um
+
+
+
+
+ li.3
+ li.3 : min. li spacing : 0.17um
+
+
+
+
+ li.3a
+ li.3a : min. li spacing for the cells s8rf2_xcmvpp_hd5_* : 0.14um
+
+
+
+
+ li.5
+ li.5 : min. li enclosure of licon of 2 opposite edges : 0.08um
+
+
+
+
+ li.6
+ li.6 : min. li area : 0.0561um²
+
+
+
+
+ ct.1
+ ct.1 : minimum/maximum width of mcon : 0.17um
+
+
+
+
+ ct.2
+ ct.2 : min. mcon spacing : 0.19um
+
+
+
+
+ ct.4
+ ct.4 : mcon should covered by li
+
+
+
+
+ m1.1
+ m1.1 : min. m1 width : 0.14um
+
+
+
+
+ m1.2
+ m1.2 : min. m1 spacing : 0.14um
+
+
+
+
+ m1.3ab
+ m1.3ab : min. 3um.m1 spacing m1 : 0.28um
+
+
+
+
+ m1.4
+ m1.4 : min. m1 enclosure of mcon : 0.03um
+
+
+
+
+ m1.4a
+ m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um
+
+
+
+
+ m1.6
+ m1.6 : min. m1 area : 0.083um²
+
+
+
+
+ m1.7
+ m1.7 : min. m1 holes area : 0.14um²
+
+
+
+
+ m1.5
+ m1.5 : min. m1 enclosure of mcon of 2 opposite edges : 0.06um
+
+
+
+
+ via.4c.5c
+ via.4c.5c : m1 must enclose all via
+
+
+
+
+ via.1a
+ via.1a : minimum/maximum width of via : 0.15um
+
+
+
+
+ via.1b
+ via.1b : minimum/maximum width of via in areaid.mt: 0.15um or 0.23um or 0.28um
+
+
+
+
+ via.2
+ via.2 : min. via spacing : 0.17um
+
+
+
+
+ via.4a
+ via.4a : min. m1 enclosure of 0.15um via : 0.055um
+
+
+
+
+ via.4b
+ via.4b : min. m1 enclosure of 0.23um via : 0.03um
+
+
+
+
+ via1.5a
+ via1.5a : min. m1 enclosure of 0.15um via of 2 opposite edges : 0.085um
+
+
+
+
+ via1.5b
+ via1.5b : min. m1 enclosure of 0.23um via of 2 opposite edges : 0.06um
+
+
+
+
+ m2.1
+ m2.1 : min. m2 width : 0.14um
+
+
+
+
+ m2.2
+ m2.2 : min. m2 spacing : 0.14um
+
+
+
+
+ m2.3ab
+ m2.3ab : min. 3um.m2 spacing m2 : 0.28um
+
+
+
+
+ m2.6
+ m2.6 : min. m2 area : 0.0676um²
+
+
+
+
+ m2.7
+ m2.7 : min. m2 holes area : 0.14um²
+
+
+
+
+ m2.via
+ m2.via : m2 must enclose via
+
+
+
+
+ m2.4
+ m2.4 : min. m2 enclosure of via : 0.055um
+
+
+
+
+ m2.5
+ m2.5 : min. m2 enclosure of via of 2 opposite edges : 0.085um
+
+
+
+
+ via2
+ via2 : m2 must enclose all via2
+
+
+
+
+ via2.1a
+ via2.1a : minimum/maximum width of via2 : 0.2um
+
+
+
+
+ via2.1b
+ via2.1b : minimum/maximum width of via2 in areaid.mt: 0.2um or 1.2um or 1.5um
+
+
+
+
+ via2.2
+ via2.2 : min. via2 spacing : 0.2um
+
+
+
+
+ via2.4
+ via2.4 : min. m2 enclosure of via2 : 0.04um
+
+
+
+
+ via2.4a
+ via2.4a : min. m2 enclosure of 1.5um via2 : 0.14um
+
+
+
+
+ via2.5
+ via2.5 : min. m2 enclosure of via2 of 2 opposite edges : 0.085um
+
+
+
+
+ m3.1
+ m3.1 : min. m3 width : 0.3um
+
+
+
+
+ m3.2
+ m3.2 : min. m3 spacing : 0.3um
+
+
+
+
+ m3.3ab
+ m3.3ab : min. 3um.m3 spacing m3 : 0.4um
+
+
+
+
+ m3.6
+ m3.6 : min. m3 area : 0.24um²
+
+
+
+
+ m3.via2
+ m3.via2 : m3 must enclose via2
+
+
+
+
+ m3.4
+ m3.4 : min. m3 enclosure of via2 : 0.065um
+
+
+
+
+ via3
+ via3 : m3 must enclose all via3
+
+
+
+
+ via3.1a
+ via3.1a : minimum/maximum width of via3 in areaid.mt: 0.2um or 0.8um
+
+
+
+
+ via3.2
+ via3.2 : min. via3 spacing : 0.2um
+
+
+
+
+ via3.4
+ via3.4 : min. m3 enclosure of via3 : 0.06um
+
+
+
+
+ via3.5
+ via3.5 : min. m2 enclosure of via3 of 2 opposite edges : 0.09um
+
+
+
+
+ m4.1
+ m4.1 : min. m4 width : 0.3um
+
+
+
+
+ m4.2
+ m4.2 : min. m4 spacing : 0.3um
+
+
+
+
+ m4.5ab
+ m4.5ab : min. 3um.m4 spacing m4 : 0.4um
+
+
+
+
+ m4.4
+ m4.4 : min. m4 area : 0.24um²
+
+
+
+
+ m4.via3
+ m4.via3 : m4 must enclose via3
+
+
+
+
+ m4.3
+ m4.3 : min. m4 enclosure of via3 : 0.065um
+
+
+
+
+ via4.1a
+ via4.1a : minimum/maximum width of via4 : 0.8um
+
+
+
+
+ via4.2
+ via4.2 : min. via4 spacing : 0.8um
+
+
+
+
+ via4.4
+ via4.4 : min. m4 enclosure of via4 : 0.19um
+
+
+
+
+ via4
+ via4 : m4 must enclose all via4
+
+
+
+
+ m5.1
+ m5.1 : min. m5 width : 1.6um
+
+
+
+
+ m5.2
+ m5.2 : min. m5 spacing : 1.6um
+
+
+
+
+ m5.via4
+ m5.via4 : m5 must enclose via4
+
+
+
+
+ m5.3
+ m4.3 : min. m5 enclosure of via4 : 0.31um
+
+
+
+
+ nsm.1
+ nsm.1 : min. nsm width : 3.0um
+
+
+
+
+ nsm.2
+ nsm.2 : min. nsm spacing : 4.0um
+
+
+
+
+ nsm.4
+ nsm.4 : min. nsm enclosure of cfom : 3.0um
+
+
+
+
+ nsm.3
+ nsm.3 : min. nsm spacing to cfom : 1.0um
+
+
+
+
+ pad.2
+ pad.2 : min. pad spacing : 1.27um
+
+
+
+
+ dnwell_OFFGRID
+ x.1b : OFFGRID vertex on dnwell
+
+
+
+
+ dnwell_angle
+ x.3a : non 45 degree angle dnwell
+
+
+
+
+ nwell_OFFGRID
+ x.1b : OFFGRID vertex on nwell
+
+
+
+
+ nwell_angle
+ x.3a : non 45 degree angle nwell
+
+
+
+
+ pwbm_OFFGRID
+ x.1b : OFFGRID vertex on pwbm
+
+
+
+
+ pwbm_angle
+ x.3a : non 45 degree angle pwbm
+
+
+
+
+ pwde_OFFGRID
+ x.1b : OFFGRID vertex on pwde
+
+
+
+
+ pwde_angle
+ x.3a : non 45 degree angle pwde
+
+
+
+
+ hvtp_OFFGRID
+ x.1b : OFFGRID vertex on hvtp
+
+
+
+
+ hvtp_angle
+ x.3a : non 45 degree angle hvtp
+
+
+
+
+ hvtr_OFFGRID
+ x.1b : OFFGRID vertex on hvtr
+
+
+
+
+ hvtr_angle
+ x.3a : non 45 degree angle hvtr
+
+
+
+
+ lvtn_OFFGRID
+ x.1b : OFFGRID vertex on lvtn
+
+
+
+
+ lvtn_angle
+ x.3a : non 45 degree angle lvtn
+
+
+
+
+ ncm_OFFGRID
+ x.1b : OFFGRID vertex on ncm
+
+
+
+
+ ncm_angle
+ x.3a : non 45 degree angle ncm
+
+
+
+
+ diff_OFFGRID
+ x.1b : OFFGRID vertex on diff
+
+
+
+
+ tap_OFFGRID
+ x.1b : OFFGRID vertex on tap
+
+
+
+
+ diff_angle
+ x.2c : non 45 degree angle diff
+
+
+
+
+ tap_angle
+ x.2c : non 45 degree angle tap
+
+
+
+
+ tunm_OFFGRID
+ x.1b : OFFGRID vertex on tunm
+
+
+
+
+ tunm_angle
+ x.3a : non 45 degree angle tunm
+
+
+
+
+ poly_OFFGRID
+ x.1b : OFFGRID vertex on poly
+
+
+
+
+ poly_angle
+ x.2 : non 90 degree angle poly
+
+
+
+
+ rpm_OFFGRID
+ x.1b : OFFGRID vertex on rpm
+
+
+
+
+ rpm_angle
+ x.3a : non 45 degree angle rpm
+
+
+
+
+ npc_OFFGRID
+ x.1b : OFFGRID vertex on npc
+
+
+
+
+ npc_angle
+ x.3a : non 45 degree angle npc
+
+
+
+
+ nsdm_OFFGRID
+ x.1b : OFFGRID vertex on nsdm
+
+
+
+
+ nsdm_angle
+ x.3a : non 45 degree angle nsdm
+
+
+
+
+ psdm_OFFGRID
+ x.1b : OFFGRID vertex on psdm
+
+
+
+
+ psdm_angle
+ x.3a : non 45 degree angle psdm
+
+
+
+
+ licon_OFFGRID
+ x.1b : OFFGRID vertex on licon
+
+
+
+
+ licon_angle
+ x.2 : non 90 degree angle licon
+
+
+
+
+ li_OFFGRID
+ x.1b : OFFGRID vertex on li
+
+
+
+
+ li_angle
+ x.3a : non 45 degree angle li
+
+
+
+
+ ct_OFFGRID
+ x.1b : OFFGRID vertex on mcon
+
+
+
+
+ ct_angle
+ x.2 : non 90 degree angle mcon
+
+
+
+
+ vpp_OFFGRID
+ x.1b : OFFGRID vertex on vpp
+
+
+
+
+ vpp_angle
+ x.3a : non 45 degree angle vpp
+
+
+
+
+ m1_OFFGRID
+ x.1b : OFFGRID vertex on m1
+
+
+
+
+ m1_angle
+ x.3a : non 45 degree angle m1
+
+
+
+
+ via_OFFGRID
+ x.1b : OFFGRID vertex on via
+
+
+
+
+ via_angle
+ x.2 : non 90 degree angle via
+
+
+
+
+ m2_OFFGRID
+ x.1b : OFFGRID vertex on m2
+
+
+
+
+ m2_angle
+ x.3a : non 45 degree angle m2
+
+
+
+
+ via2_OFFGRID
+ x.1b : OFFGRID vertex on via2
+
+
+
+
+ via2_angle
+ x.2 : non 90 degree angle via2
+
+
+
+
+ m3_OFFGRID
+ x.1b : OFFGRID vertex on m3
+
+
+
+
+ m3_angle
+ x.3a : non 45 degree angle m3
+
+
+
+
+ via3_OFFGRID
+ x.1b : OFFGRID vertex on via3
+
+
+
+
+ via3_angle
+ x.2 : non 90 degree angle via3
+
+
+
+
+ nsm_OFFGRID
+ x.1b : OFFGRID vertex on nsm
+
+
+
+
+ nsm_angle
+ x.3a : non 45 degree angle nsm
+
+
+
+
+ m4_OFFGRID
+ x.1b : OFFGRID vertex on m4
+
+
+
+
+ m4_angle
+ x.3a : non 45 degree angle m4
+
+
+
+
+ via4_OFFGRID
+ x.1b : OFFGRID vertex on via4
+
+
+
+
+ via4_angle
+ x.2 : non 90 degree angle via4
+
+
+
+
+ m5_OFFGRID
+ x.1b : OFFGRID vertex on m5
+
+
+
+
+ m5_angle
+ x.3a : non 45 degree angle m5
+
+
+
+
+ pad_OFFGRID
+ x.1b : OFFGRID vertex on pad
+
+
+
+
+ pad_angle
+ x.3a : non 45 degree angle pad
+
+
+
+
+ mf_OFFGRID
+ x.1b : OFFGRID vertex on mf
+
+
+
+
+ mf_angle
+ x.2 : non 90 degree angle mf
+
+
+
+
+ hvi_OFFGRID
+ x.1b : OFFGRID vertex on hvi
+
+
+
+
+ hvi_angle
+ x.3a : non 45 degree angle hvi
+
+
+
+
+ hvntm_OFFGRID
+ x.1b : OFFGRID vertex on hvntm
+
+
+
+
+ hvntm_angle
+ x.3a : non 45 degree angle hvntm
+
+
+
+
+ vhvi_OFFGRID
+ x.1b : OFFGRID vertex on vhvi
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+
+
+
+ vhvi_angle
+ x.3a : non 45 degree angle vhvi
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+
+
+
+ uhvi_OFFGRID
+ x.1b : OFFGRID vertex on uhvi
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+
+
+
+ uhvi_angle
+ x.3a : non 45 degree angle uhvi
+
+
+
+
+ pwell_rs_OFFGRID
+ x.1b : OFFGRID vertex on pwell_rs
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+
+
+
+ pwell_rs_angle
+ x.3a : non 45 degree angle pwell_rs
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+
+
+
+ areaid_re_OFFGRID
+ x.1b : OFFGRID vertex on areaid.re
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+
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| aes |
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diff --git a/aes_sky130_50mhz/flow/extracted/cell_library.json b/aes_sky130_50mhz/flow/extracted/cell_library.json
new file mode 100644
index 0000000000000000000000000000000000000000..8fa4a5b2c31ca5454892d839be7c17927abc32e4
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/cell_library.json
@@ -0,0 +1 @@
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\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/cell_neighborhoods.json b/aes_sky130_50mhz/flow/extracted/cell_neighborhoods.json
new file mode 100644
index 0000000000000000000000000000000000000000..8602342a3b7bd6732d5ac75371b44b9731e5fd89
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/cell_neighborhoods.json
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diff --git a/aes_sky130_50mhz/flow/extracted/cell_pin_locations.json b/aes_sky130_50mhz/flow/extracted/cell_pin_locations.json
new file mode 100644
index 0000000000000000000000000000000000000000..62b6529d7b20cb00439ed553edd7f9eba5507ed7
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/cell_pin_locations.json
@@ -0,0 +1 @@
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diff --git a/aes_sky130_50mhz/flow/extracted/clock_skew.json b/aes_sky130_50mhz/flow/extracted/clock_skew.json
new file mode 100644
index 0000000000000000000000000000000000000000..8147602b6217fc03c7a175646d6578426649ad31
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/clock_skew.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_50mhz", "pdk": "sky130", "report_type": "clock_skew", "content": "Clock clk\n 0.23 source latency _18_/CLK ^\n -0.25 target latency _20_/CLK ^\n 0.00 CRPR\n--------------\n -0.01 setup skew"}]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/deepgate.json b/aes_sky130_50mhz/flow/extracted/deepgate.json
new file mode 100644
index 0000000000000000000000000000000000000000..34f91ad5675fec991e6b06b1fe5bcb68c16764bd
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/deepgate.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_50mhz", "pdk": "sky130", "gate_counts": {"or": 6212, "nor": 4780, "and": 3172, "nand": 2952, "mux": 643, "buf": 55, "xor": 474, "xnor": 1359}, "total_gates": 19647, "netlist_file": "netlist.v", "netlist_size_bytes": 2317896}]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/die_core_area.json b/aes_sky130_50mhz/flow/extracted/die_core_area.json
new file mode 100644
index 0000000000000000000000000000000000000000..aa5990b4b87f29dc7795a3d180bc048fe8665389
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/die_core_area.json
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+[{"run_id": "aes_sky130_50mhz", "pdk": "sky130", "die_x0": 0.0, "die_y0": 0.0, "die_x1": 19.165, "die_y1": 19.165, "num_rows": 5.0, "num_insts": 41.0, "num_nets": 20.0, "dbu_per_um": 1000.0}]
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diff --git a/aes_sky130_50mhz/flow/extracted/drc_labels.json b/aes_sky130_50mhz/flow/extracted/drc_labels.json
new file mode 100644
index 0000000000000000000000000000000000000000..06e43a8825152013446b57fc38f882b48761d888
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/drc_labels.json
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+[{"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (648.745,641.785;648.915,641.785)|(649.077,641.835;648.583,641.835)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (697.965,448.585;698.135,448.585)|(698.245,448.715;697.855,448.715)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (511.06,206.805;511.965,206.805)|(511.835,206.915;510.93,206.915)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (648.898,641.785;648.915,641.785)|(649.077,641.835;649.06,641.835)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (648.455,641.785;648.762,641.785)|(648.6,641.835;648.455,641.835)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (697.675,448.585;698.135,448.585)|(698.245,448.715;697.675,448.715)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (648.455,641.785;648.915,641.785)|(649.06,641.835;648.455,641.835)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (510.915,206.805;511.06,206.805)|(511.19,206.915;510.915,206.915)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (648.455,641.785;648.915,641.785)|(649.077,641.835;648.6,641.835)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (648.455,641.785;648.915,641.785)|(649.077,641.835;648.455,641.835)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (200.245,448.585;200.705,448.585)|(200.705,448.715;200.135,448.715)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (511.52,206.805;511.965,206.805)|(511.835,206.915;511.39,206.915)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (510.915,206.805;511.965,206.805)|(511.835,206.915;510.915,206.915)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (510.915,206.805;511.52,206.805)|(511.65,206.915;510.915,206.915)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (511.535,206.805;511.965,206.805)|(511.835,206.915;511.665,206.915)"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "violation_type": "'li.3'", "raw_line": "edge-pair: (200.245,448.585;200.415,448.585)|(200.525,448.715;200.135,448.715)"}]
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diff --git a/aes_sky130_50mhz/flow/extracted/floating_nets.json b/aes_sky130_50mhz/flow/extracted/floating_nets.json
new file mode 100644
index 0000000000000000000000000000000000000000..80a7abf03c2f6d109f813d7d694d763447e1fd6a
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/floating_nets.json
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+[{"run_id": "aes_sky130_50mhz", "pdk": "sky130", "floating_net_count": 0, "floating_nets": []}]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/geometry_patches.json b/aes_sky130_50mhz/flow/extracted/geometry_patches.json
new file mode 100644
index 0000000000000000000000000000000000000000..a6f46c52db35faefe6c6f0fa532324e51e956ca6
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/geometry_patches.json
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+version https://git-lfs.github.com/spec/v1
+oid sha256:7e837534ee318032c21427b448a8d77824bee5aa305838108e6cdb58bed41ac4
+size 805112990
diff --git a/aes_sky130_50mhz/flow/extracted/instance_placement.json b/aes_sky130_50mhz/flow/extracted/instance_placement.json
new file mode 100644
index 0000000000000000000000000000000000000000..00ef3b84f4ccaaef2a115734452413ba48119a03
--- /dev/null
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0.92, "height_um": 2.72, "orient": "MX"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "instance": "FILLER_3_31", "cell_type": "sky130_fd_sc_hd__fill_1", "x_um": 15.64, "y_um": 13.6, "width_um": 0.46, "height_um": 2.72, "orient": "MX"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "instance": "FILLER_4_7", "cell_type": "sky130_fd_sc_hd__fill_4", "x_um": 4.6000000000000005, "y_um": 13.6, "width_um": 1.84, "height_um": 2.72, "orient": "R0"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "instance": "FILLER_4_11", "cell_type": "sky130_fd_sc_hd__fill_2", "x_um": 6.44, "y_um": 13.6, "width_um": 0.92, "height_um": 2.72, "orient": "R0"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "instance": "FILLER_4_13", "cell_type": "sky130_fd_sc_hd__fill_1", "x_um": 7.36, "y_um": 13.6, "width_um": 0.46, "height_um": 2.72, "orient": "R0"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "instance": "FILLER_4_21", "cell_type": "sky130_fd_sc_hd__fill_4", "x_um": 11.040000000000001, "y_um": 13.6, "width_um": 1.84, "height_um": 2.72, "orient": "R0"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "instance": "FILLER_4_25", "cell_type": "sky130_fd_sc_hd__fill_2", "x_um": 12.88, "y_um": 13.6, "width_um": 0.92, "height_um": 2.72, "orient": "R0"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "instance": "FILLER_4_31", "cell_type": "sky130_fd_sc_hd__fill_1", "x_um": 15.64, "y_um": 13.6, "width_um": 0.46, "height_um": 2.72, "orient": "R0"}]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/ir_drop_vdd.json b/aes_sky130_50mhz/flow/extracted/ir_drop_vdd.json
new file mode 100644
index 0000000000000000000000000000000000000000..0637a088a01e8ddab3bf3fa98dbe804cbde1a0dc
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/ir_drop_vdd.json
@@ -0,0 +1 @@
+[]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/ir_drop_vss.json b/aes_sky130_50mhz/flow/extracted/ir_drop_vss.json
new file mode 100644
index 0000000000000000000000000000000000000000..0637a088a01e8ddab3bf3fa98dbe804cbde1a0dc
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/ir_drop_vss.json
@@ -0,0 +1 @@
+[]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/mesoscale_blocks.json b/aes_sky130_50mhz/flow/extracted/mesoscale_blocks.json
new file mode 100644
index 0000000000000000000000000000000000000000..cddcdd0581a22931c95d1ab51c004dada90d376c
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/mesoscale_blocks.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_50mhz", "pdk": "sky130", "block_id": "g0_0", "bounds": {"x1": 0, "y1": 0, "x2": 266221, "y2": 266221}, "cell_count": 9922, "type_distribution": {"sky130_fd_sc_hd__fill_8": 4649, "sky130_fd_sc_hd__fill_4": 611, "sky130_fd_sc_hd__fill_1": 1042, "sky130_fd_sc_hd__fill_2": 1062, "sky130_fd_sc_hd__decap_4": 97, "sky130_fd_sc_hd__tapvpwrvgnd_1": 931, "sky130_fd_sc_hd__mux2_1": 5, "sky130_fd_sc_hd__dfrtp_1": 221, "sky130_fd_sc_hd__clkbuf_16": 22, "sky130_fd_sc_hd__bufinv_16": 3, "sky130_fd_sc_hd__clkinv_2": 1, "sky130_fd_sc_hd__clkbuf_1": 3, "sky130_fd_sc_hd__clkinvlp_4": 1, "sky130_fd_sc_hd__clkbuf_8": 1, "sky130_fd_sc_hd__mux2_8": 3, "sky130_fd_sc_hd__xor2_2": 2, "sky130_fd_sc_hd__nand3_1": 26, "sky130_fd_sc_hd__and2_4": 3, "sky130_fd_sc_hd__nor2_1": 275, "sky130_fd_sc_hd__a21oi_1": 168, "sky130_fd_sc_hd__o22a_1": 3, "sky130_fd_sc_hd__nand2_1": 128, "sky130_fd_sc_hd__o21ai_0": 104, "sky130_fd_sc_hd__a22oi_2": 9, "sky130_fd_sc_hd__a221oi_2": 14, "sky130_fd_sc_hd__nand4_4": 18, "sky130_fd_sc_hd__a222oi_1": 26, "sky130_fd_sc_hd__a22o_1": 10, "sky130_fd_sc_hd__a22oi_1": 20, "sky130_fd_sc_hd__a21oi_2": 3, "sky130_fd_sc_hd__a221oi_4": 6, "sky130_fd_sc_hd__nand2_8": 2, "sky130_fd_sc_hd__and3_1": 4, "sky130_fd_sc_hd__dfrtp_4": 1, "sky130_fd_sc_hd__clkinv_1": 1, "sky130_fd_sc_hd__or3b_4": 6, "sky130_fd_sc_hd__nand4bb_4": 17, "sky130_fd_sc_hd__nand3b_1": 1, "sky130_fd_sc_hd__nor2_2": 3, "sky130_fd_sc_hd__or4b_4": 9, "sky130_fd_sc_hd__nand4b_4": 9, "sky130_fd_sc_hd__lpflow_isobufsrc_1": 3, "sky130_fd_sc_hd__nand3b_4": 8, "sky130_fd_sc_hd__lpflow_inputiso1p_1": 4, "sky130_fd_sc_hd__o22ai_1": 117, "sky130_fd_sc_hd__nor4_1": 63, "sky130_fd_sc_hd__or3b_2": 1, "sky130_fd_sc_hd__o32ai_1": 6, "sky130_fd_sc_hd__or3_2": 1, "sky130_fd_sc_hd__or4_4": 4, "sky130_fd_sc_hd__nand4_1": 23, "sky130_fd_sc_hd__a21o_1": 2, "sky130_fd_sc_hd__nor3_1": 61, "sky130_fd_sc_hd__o22ai_2": 9, "sky130_fd_sc_hd__or3_1": 8, "sky130_fd_sc_hd__and4_1": 3, "sky130_fd_sc_hd__a2111oi_0": 3, "sky130_fd_sc_hd__or4_1": 9, "sky130_fd_sc_hd__and4b_1": 1, "sky130_fd_sc_hd__nor4_2": 8, "sky130_fd_sc_hd__nand2b_1": 5, "sky130_fd_sc_hd__nand2b_4": 1, "sky130_fd_sc_hd__nand2_4": 1, "sky130_fd_sc_hd__a41oi_2": 1, "sky130_fd_sc_hd__nor4bb_2": 1, "sky130_fd_sc_hd__a31oi_2": 1, "sky130_fd_sc_hd__o21ai_1": 3, "sky130_fd_sc_hd__nand3_4": 4, "sky130_fd_sc_hd__a2111oi_2": 2, "sky130_fd_sc_hd__nor3_2": 2, "sky130_fd_sc_hd__and2_1": 1, "sky130_fd_sc_hd__a31o_1": 2, "sky130_fd_sc_hd__or3_4": 2, "sky130_fd_sc_hd__o2111ai_4": 1, "sky130_fd_sc_hd__nand4_2": 1, "sky130_fd_sc_hd__a31oi_1": 3, "sky130_fd_sc_hd__and2_0": 1, "sky130_fd_sc_hd__a2111o_1": 3, "sky130_fd_sc_hd__o32ai_2": 1, "sky130_fd_sc_hd__or4b_1": 2, "sky130_fd_sc_hd__o31ai_1": 1, "sky130_fd_sc_hd__a211oi_1": 1, "sky130_fd_sc_hd__a2111oi_1": 2, "sky130_fd_sc_hd__nor4b_1": 1, "sky130_fd_sc_hd__o211ai_2": 1, "sky130_fd_sc_hd__buf_8": 6, "sky130_fd_sc_hd__buf_16": 11, "sky130_fd_sc_hd__buf_12": 6, "sky130_fd_sc_hd__buf_6": 1}, "density": 0.06387115047893707}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "block_id": "g0_1", "bounds": {"x1": 0, "y1": 266221, "x2": 266221, "y2": 532442}, "cell_count": 9783, "type_distribution": {"sky130_fd_sc_hd__fill_8": 4045, "sky130_fd_sc_hd__fill_2": 1071, "sky130_fd_sc_hd__fill_1": 1046, "sky130_fd_sc_hd__fill_4": 754, "sky130_fd_sc_hd__decap_4": 98, "sky130_fd_sc_hd__tapvpwrvgnd_1": 931, "sky130_fd_sc_hd__mux2_1": 41, "sky130_fd_sc_hd__dfrtp_1": 435, "sky130_fd_sc_hd__clkbuf_16": 41, "sky130_fd_sc_hd__clkbuf_8": 6, "sky130_fd_sc_hd__clkinv_2": 5, "sky130_fd_sc_hd__clkbuf_1": 6, "sky130_fd_sc_hd__bufinv_16": 6, "sky130_fd_sc_hd__inv_6": 1, "sky130_fd_sc_hd__mux2_8": 1, "sky130_fd_sc_hd__xnor2_1": 36, "sky130_fd_sc_hd__xnor2_2": 5, "sky130_fd_sc_hd__xor2_1": 15, "sky130_fd_sc_hd__xor2_2": 1, "sky130_fd_sc_hd__nor2b_2": 2, "sky130_fd_sc_hd__a221oi_1": 3, "sky130_fd_sc_hd__o31ai_1": 2, "sky130_fd_sc_hd__mux2i_4": 4, "sky130_fd_sc_hd__nand2_1": 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"sky130_fd_sc_hd__nand4_4": 10, "sky130_fd_sc_hd__a22oi_1": 38, "sky130_fd_sc_hd__a21oi_2": 2, "sky130_fd_sc_hd__nand2_8": 2, "sky130_fd_sc_hd__and4_1": 10, "sky130_fd_sc_hd__nand3_4": 11, "sky130_fd_sc_hd__clkinv_1": 1, "sky130_fd_sc_hd__dfrtp_4": 4, "sky130_fd_sc_hd__buf_8": 17, "sky130_fd_sc_hd__buf_16": 9, "sky130_fd_sc_hd__buf_12": 6, "sky130_fd_sc_hd__buf_6": 6}, "density": 0.06297636213822227}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "block_id": "g0_2", "bounds": {"x1": 0, "y1": 532442, "x2": 266221, "y2": 798663}, "cell_count": 9591, "type_distribution": {"sky130_fd_sc_hd__fill_8": 5251, "sky130_fd_sc_hd__fill_2": 999, "sky130_fd_sc_hd__fill_1": 967, "sky130_fd_sc_hd__fill_4": 393, "sky130_fd_sc_hd__decap_4": 98, "sky130_fd_sc_hd__tapvpwrvgnd_1": 931, "sky130_fd_sc_hd__mux2_1": 18, "sky130_fd_sc_hd__dfrtp_1": 239, "sky130_fd_sc_hd__clkbuf_16": 35, "sky130_fd_sc_hd__bufinv_16": 4, "sky130_fd_sc_hd__clkinv_2": 6, "sky130_fd_sc_hd__clkbuf_1": 5, "sky130_fd_sc_hd__clkbuf_8": 7, "sky130_fd_sc_hd__xnor2_1": 13, "sky130_fd_sc_hd__nand2_1": 126, "sky130_fd_sc_hd__o211ai_1": 3, "sky130_fd_sc_hd__and3_1": 4, "sky130_fd_sc_hd__a31oi_4": 5, "sky130_fd_sc_hd__nor2_1": 116, "sky130_fd_sc_hd__a21oi_1": 118, "sky130_fd_sc_hd__mux2i_2": 1, "sky130_fd_sc_hd__lpflow_isobufsrc_1": 2, "sky130_fd_sc_hd__o311ai_0": 1, "sky130_fd_sc_hd__xnor2_2": 1, "sky130_fd_sc_hd__xor2_1": 2, "sky130_fd_sc_hd__xor2_2": 1, "sky130_fd_sc_hd__nor2b_2": 1, "sky130_fd_sc_hd__a221oi_1": 1, "sky130_fd_sc_hd__o31ai_1": 1, "sky130_fd_sc_hd__nor3_1": 1, "sky130_fd_sc_hd__a221o_1": 1, "sky130_fd_sc_hd__o21ai_0": 101, "sky130_fd_sc_hd__o21ai_1": 2, "sky130_fd_sc_hd__nand3_1": 14, "sky130_fd_sc_hd__and2_4": 3, "sky130_fd_sc_hd__o21a_4": 1, "sky130_fd_sc_hd__a211oi_1": 1, "sky130_fd_sc_hd__o22ai_2": 1, "sky130_fd_sc_hd__o22a_1": 2, "sky130_fd_sc_hd__a32oi_1": 5, "sky130_fd_sc_hd__a21o_1": 3, "sky130_fd_sc_hd__a22oi_2": 6, "sky130_fd_sc_hd__a222oi_1": 42, "sky130_fd_sc_hd__a22oi_1": 15, "sky130_fd_sc_hd__and4_1": 5, "sky130_fd_sc_hd__nand3_4": 5, "sky130_fd_sc_hd__a22o_1": 4, "sky130_fd_sc_hd__a221oi_2": 6, "sky130_fd_sc_hd__nand4_4": 3, "sky130_fd_sc_hd__a21oi_2": 4, "sky130_fd_sc_hd__a221oi_4": 4, "sky130_fd_sc_hd__nand2_8": 4, "sky130_fd_sc_hd__dfrtp_4": 2, "sky130_fd_sc_hd__buf_16": 3, "sky130_fd_sc_hd__buf_6": 3, "sky130_fd_sc_hd__buf_8": 1}, "density": 0.06174039550932125}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "block_id": "g0_3", "bounds": {"x1": 0, "y1": 798663, "x2": 266221, "y2": 1064885}, "cell_count": 9283, "type_distribution": {"sky130_fd_sc_hd__fill_8": 6538, "sky130_fd_sc_hd__fill_2": 865, "sky130_fd_sc_hd__fill_1": 834, "sky130_fd_sc_hd__fill_4": 18, "sky130_fd_sc_hd__decap_4": 97, "sky130_fd_sc_hd__tapvpwrvgnd_1": 931}, "density": 0.05975769904212586}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "block_id": "g1_0", "bounds": {"x1": 266221, "y1": 0, "x2": 532442, "y2": 266221}, "cell_count": 10457, "type_distribution": {"sky130_fd_sc_hd__fill_8": 3553, "sky130_fd_sc_hd__fill_4": 920, "sky130_fd_sc_hd__fill_1": 1288, "sky130_fd_sc_hd__fill_2": 1200, "sky130_fd_sc_hd__tapvpwrvgnd_1": 931, "sky130_fd_sc_hd__nor3b_4": 3, "sky130_fd_sc_hd__nor4bb_4": 1, "sky130_fd_sc_hd__mux2_1": 69, "sky130_fd_sc_hd__and4b_4": 1, "sky130_fd_sc_hd__and2_4": 3, "sky130_fd_sc_hd__nor4_4": 4, "sky130_fd_sc_hd__lpflow_isobufsrc_1": 16, "sky130_fd_sc_hd__nor4b_4": 2, "sky130_fd_sc_hd__nand4_4": 19, "sky130_fd_sc_hd__and4_1": 7, "sky130_fd_sc_hd__mux4_2": 1, "sky130_fd_sc_hd__and3_1": 4, "sky130_fd_sc_hd__nand3_1": 41, "sky130_fd_sc_hd__nand4_1": 63, "sky130_fd_sc_hd__a31oi_1": 21, "sky130_fd_sc_hd__nand3b_1": 13, "sky130_fd_sc_hd__or3b_1": 5, "sky130_fd_sc_hd__a22o_1": 6, "sky130_fd_sc_hd__nand4b_1": 5, "sky130_fd_sc_hd__o21ai_0": 106, "sky130_fd_sc_hd__nand2_1": 112, "sky130_fd_sc_hd__a222oi_1": 36, "sky130_fd_sc_hd__a21oi_4": 10, "sky130_fd_sc_hd__a21oi_1": 215, "sky130_fd_sc_hd__clkinv_1": 2, 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"sky130_fd_sc_hd__xnor3_4": 12, "sky130_fd_sc_hd__xnor3_1": 10, "sky130_fd_sc_hd__xor3_1": 1, "sky130_fd_sc_hd__nor2_1": 134, "sky130_fd_sc_hd__o211ai_4": 1, "sky130_fd_sc_hd__xnor3_2": 3, "sky130_fd_sc_hd__o21ai_4": 4, "sky130_fd_sc_hd__a31oi_1": 11, "sky130_fd_sc_hd__xor3_4": 2, "sky130_fd_sc_hd__o2111ai_1": 19, "sky130_fd_sc_hd__a2111oi_0": 2, "sky130_fd_sc_hd__o21ai_2": 3, "sky130_fd_sc_hd__nor4_1": 4, "sky130_fd_sc_hd__a211oi_4": 2, "sky130_fd_sc_hd__o221ai_2": 2, "sky130_fd_sc_hd__o21a_1": 2, "sky130_fd_sc_hd__a221oi_4": 2, "sky130_fd_sc_hd__o211ai_2": 1, "sky130_fd_sc_hd__o221ai_1": 2, "sky130_fd_sc_hd__a41oi_1": 1, "sky130_fd_sc_hd__a211oi_2": 1, "sky130_fd_sc_hd__a211oi_1": 2, "sky130_fd_sc_hd__a22oi_1": 42, "sky130_fd_sc_hd__nand2_2": 5, "sky130_fd_sc_hd__a221o_1": 6, "sky130_fd_sc_hd__a211o_1": 1, "sky130_fd_sc_hd__a221oi_2": 13, "sky130_fd_sc_hd__a221oi_1": 2, "sky130_fd_sc_hd__a22o_1": 16, "sky130_fd_sc_hd__a21o_1": 6, "sky130_fd_sc_hd__and2_0": 1, "sky130_fd_sc_hd__or3_1": 3, "sky130_fd_sc_hd__a22oi_2": 3, "sky130_fd_sc_hd__nor2b_2": 1, "sky130_fd_sc_hd__o31ai_1": 1, "sky130_fd_sc_hd__and3_1": 2, "sky130_fd_sc_hd__a31oi_4": 1, "sky130_fd_sc_hd__and2_4": 1, "sky130_fd_sc_hd__a32oi_1": 1, "sky130_fd_sc_hd__nand3_4": 4, "sky130_fd_sc_hd__clkinv_1": 1, "sky130_fd_sc_hd__a211o_4": 2, "sky130_fd_sc_hd__and4_1": 1, "sky130_fd_sc_hd__buf_16": 19, "sky130_fd_sc_hd__buf_8": 18, "sky130_fd_sc_hd__buf_12": 7, "sky130_fd_sc_hd__buf_6": 3, "sky130_fd_sc_hd__buf_4": 7}, "density": 0.06251287465238439}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "block_id": "g2_2", "bounds": {"x1": 532442, "y1": 532442, "x2": 798663, "y2": 798663}, "cell_count": 9800, "type_distribution": {"sky130_fd_sc_hd__fill_8": 4159, "sky130_fd_sc_hd__fill_4": 742, "sky130_fd_sc_hd__fill_1": 1106, "sky130_fd_sc_hd__fill_2": 1086, "sky130_fd_sc_hd__tapvpwrvgnd_1": 931, "sky130_fd_sc_hd__mux2_1": 30, "sky130_fd_sc_hd__dfrtp_1": 423, "sky130_fd_sc_hd__clkbuf_16": 40, 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"sky130_fd_sc_hd__o22a_1": 4, "sky130_fd_sc_hd__a32oi_1": 6, "sky130_fd_sc_hd__a21o_1": 7, "sky130_fd_sc_hd__a22oi_1": 61, "sky130_fd_sc_hd__a222oi_1": 65, "sky130_fd_sc_hd__a211o_4": 10, "sky130_fd_sc_hd__a22o_1": 2, "sky130_fd_sc_hd__and4_1": 7, "sky130_fd_sc_hd__nand4_1": 3, "sky130_fd_sc_hd__nand3_4": 12, "sky130_fd_sc_hd__nand4_4": 2, "sky130_fd_sc_hd__a221oi_4": 1, "sky130_fd_sc_hd__a21boi_1": 1, "sky130_fd_sc_hd__a21oi_2": 1, "sky130_fd_sc_hd__dfrtp_4": 3, "sky130_fd_sc_hd__buf_8": 19, "sky130_fd_sc_hd__buf_16": 16, "sky130_fd_sc_hd__buf_12": 11, "sky130_fd_sc_hd__buf_6": 6}, "density": 0.06308579668348954}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "block_id": "g2_3", "bounds": {"x1": 532442, "y1": 798663, "x2": 798663, "y2": 1064885}, "cell_count": 9331, "type_distribution": {"sky130_fd_sc_hd__fill_8": 6538, "sky130_fd_sc_hd__fill_2": 912, "sky130_fd_sc_hd__fill_1": 931, "sky130_fd_sc_hd__fill_4": 19, "sky130_fd_sc_hd__tapvpwrvgnd_1": 931}, "density": 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"sky130_fd_sc_hd__nand2b_2": 5, "sky130_fd_sc_hd__or3_4": 2, "sky130_fd_sc_hd__nand2_2": 3, "sky130_fd_sc_hd__nand4b_1": 8, "sky130_fd_sc_hd__nand4_4": 7, "sky130_fd_sc_hd__o21ai_2": 3, "sky130_fd_sc_hd__o32ai_1": 9, "sky130_fd_sc_hd__a21oi_2": 2, "sky130_fd_sc_hd__o2111ai_1": 8, "sky130_fd_sc_hd__nor3_1": 68, "sky130_fd_sc_hd__nor4_1": 59, "sky130_fd_sc_hd__a221oi_2": 2, "sky130_fd_sc_hd__o22ai_1": 81, "sky130_fd_sc_hd__a211oi_1": 20, "sky130_fd_sc_hd__nand4_1": 41, "sky130_fd_sc_hd__or4_4": 3, "sky130_fd_sc_hd__o22ai_2": 8, "sky130_fd_sc_hd__or4_2": 2, "sky130_fd_sc_hd__nand3b_2": 1, "sky130_fd_sc_hd__nor4_2": 10, "sky130_fd_sc_hd__a2111oi_0": 17, "sky130_fd_sc_hd__o211ai_1": 1, "sky130_fd_sc_hd__nor3_2": 9, "sky130_fd_sc_hd__or4_1": 6, "sky130_fd_sc_hd__o2111a_1": 1, "sky130_fd_sc_hd__o21ai_0": 20, "sky130_fd_sc_hd__o21ai_1": 8, "sky130_fd_sc_hd__or3_2": 1, "sky130_fd_sc_hd__a2111oi_2": 6, "sky130_fd_sc_hd__o21bai_2": 1, "sky130_fd_sc_hd__or3_1": 2, "sky130_fd_sc_hd__nand3b_1": 3, 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"sky130_fd_sc_hd__nor4bb_2": 1, "sky130_fd_sc_hd__a222oi_1": 1, "sky130_fd_sc_hd__dfrtp_1": 10, "sky130_fd_sc_hd__buf_12": 3, "sky130_fd_sc_hd__buf_16": 4}, "density": 0.06399345967658873}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "block_id": "g3_1", "bounds": {"x1": 798663, "y1": 266221, "x2": 1064885, "y2": 532442}, "cell_count": 9512, "type_distribution": {"sky130_fd_sc_hd__fill_1": 955, "sky130_fd_sc_hd__fill_8": 5814, "sky130_fd_sc_hd__fill_2": 981, "sky130_fd_sc_hd__fill_4": 256, "sky130_fd_sc_hd__decap_4": 98, "sky130_fd_sc_hd__tapvpwrvgnd_1": 931, "sky130_fd_sc_hd__clkbuf_16": 13, "sky130_fd_sc_hd__bufinv_16": 2, "sky130_fd_sc_hd__clkinvlp_4": 1, "sky130_fd_sc_hd__clkinv_4": 1, "sky130_fd_sc_hd__clkbuf_8": 1, "sky130_fd_sc_hd__clkbuf_1": 1, "sky130_fd_sc_hd__clkinv_2": 2, "sky130_fd_sc_hd__nor2_1": 72, "sky130_fd_sc_hd__a21oi_1": 70, "sky130_fd_sc_hd__nand2_1": 68, "sky130_fd_sc_hd__o21ai_0": 55, "sky130_fd_sc_hd__a222oi_1": 19, "sky130_fd_sc_hd__a22oi_1": 20, "sky130_fd_sc_hd__nand3_1": 14, "sky130_fd_sc_hd__a211o_4": 5, "sky130_fd_sc_hd__a221oi_2": 6, "sky130_fd_sc_hd__and3_1": 1, "sky130_fd_sc_hd__nand3_4": 1, "sky130_fd_sc_hd__nand4_4": 1, "sky130_fd_sc_hd__dfrtp_1": 116, "sky130_fd_sc_hd__buf_16": 4, "sky130_fd_sc_hd__buf_12": 1, "sky130_fd_sc_hd__buf_8": 3}, "density": 0.06123184674013801}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "block_id": "g3_2", "bounds": {"x1": 798663, "y1": 532442, "x2": 1064885, "y2": 798663}, "cell_count": 9487, "type_distribution": {"sky130_fd_sc_hd__fill_1": 933, "sky130_fd_sc_hd__fill_8": 6149, "sky130_fd_sc_hd__fill_4": 163, "sky130_fd_sc_hd__fill_2": 978, "sky130_fd_sc_hd__decap_4": 98, "sky130_fd_sc_hd__tapvpwrvgnd_1": 931, "sky130_fd_sc_hd__clkbuf_16": 6, "sky130_fd_sc_hd__clkbuf_8": 1, "sky130_fd_sc_hd__inv_8": 1, "sky130_fd_sc_hd__inv_6": 1, "sky130_fd_sc_hd__bufinv_16": 1, "sky130_fd_sc_hd__clkbuf_1": 1, "sky130_fd_sc_hd__clkinv_4": 1, "sky130_fd_sc_hd__nor2_1": 34, "sky130_fd_sc_hd__a21oi_1": 36, "sky130_fd_sc_hd__nand2_1": 39, "sky130_fd_sc_hd__o21ai_0": 29, "sky130_fd_sc_hd__a22oi_1": 10, "sky130_fd_sc_hd__a222oi_1": 11, "sky130_fd_sc_hd__nand4_4": 2, "sky130_fd_sc_hd__nand4_1": 1, "sky130_fd_sc_hd__a211o_4": 1, "sky130_fd_sc_hd__dfrtp_1": 60}, "density": 0.061070913585333196}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "block_id": "g3_3", "bounds": {"x1": 798663, "y1": 798663, "x2": 1064885, "y2": 1064885}, "cell_count": 9379, "type_distribution": {"sky130_fd_sc_hd__fill_2": 960, "sky130_fd_sc_hd__fill_1": 931, "sky130_fd_sc_hd__fill_8": 6393, "sky130_fd_sc_hd__fill_4": 67, "sky130_fd_sc_hd__decap_4": 97, "sky130_fd_sc_hd__tapvpwrvgnd_1": 931}, "density": 0.06037568235657637}]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/net_connectivity.json b/aes_sky130_50mhz/flow/extracted/net_connectivity.json
new file mode 100644
index 0000000000000000000000000000000000000000..7962609fe059e9788a709c68198a6c71869d6750
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/net_connectivity.json
@@ -0,0 +1 @@
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diff --git a/aes_sky130_50mhz/flow/extracted/net_wire_info.json b/aes_sky130_50mhz/flow/extracted/net_wire_info.json
new file mode 100644
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diff --git a/aes_sky130_50mhz/flow/extracted/pin_access.json b/aes_sky130_50mhz/flow/extracted/pin_access.json
new file mode 100644
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\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/power_grid.json b/aes_sky130_50mhz/flow/extracted/power_grid.json
new file mode 100644
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--- /dev/null
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@@ -0,0 +1 @@
+[]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/power_summary.json b/aes_sky130_50mhz/flow/extracted/power_summary.json
new file mode 100644
index 0000000000000000000000000000000000000000..e9fd550d8272d112f01bfa64e2d22a67161e97c8
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/power_summary.json
@@ -0,0 +1 @@
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\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/timing_contexts.json b/aes_sky130_50mhz/flow/extracted/timing_contexts.json
new file mode 100644
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--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/timing_contexts.json
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\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/timing_paths_detailed.json b/aes_sky130_50mhz/flow/extracted/timing_paths_detailed.json
new file mode 100644
index 0000000000000000000000000000000000000000..3fc1a77cc33eeb5e4b7937aeed9e84900ddf5ba6
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/timing_paths_detailed.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_50mhz", "pdk": "sky130", "startpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "endpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "path_type": "min", "cells": [{"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 0.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.019159", "delay": 0.095392, "slew": 0.364233, "capacitance": 0.597001, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.095392", "delay": 0.000248, "slew": 0.597248, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": 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"capacitance": 0.789653, "cell_type": "sky130_fd_sc_hd__a21oi_1"}, {"pin": "0.104181", "delay": 5.1e-05, "slew": 0.789704, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.000114", "delay": 5.7e-05, "slew": 5.000057, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 5.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 5.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 5.232673, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 0.000129, "slew": 5.232801, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}], "slack": 4.380249, "data_arrival_time": 0.789704, "data_required_time": 5.169952}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "startpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "endpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "path_type": "max", "cells": [{"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 0.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.020745", "delay": 0.19956, "slew": 0.428389, "capacitance": 0.661157, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.199560", "delay": 0.000269, "slew": 0.661426, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.002658", "delay": 0.047605, "slew": 0.061067, "capacitance": 0.722493, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.047605", "delay": 5.1e-05, "slew": 0.722544, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.000114", "delay": 5.7e-05, "slew": 5.000057, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 5.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 5.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 5.232673, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 5.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}], "slack": 4.406292, "data_arrival_time": 0.722544, "data_required_time": 5.128836}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "startpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "endpoint": "_18_ (rising edge-triggered flip-flop clocked by clk)", "path_type": "max", "cells": [{"pin": "0.000114", "delay": 5.7e-05, "slew": 5.7e-05, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 0.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 0.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 0.232672, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 0.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.019159", "delay": 0.095392, "slew": 0.364233, "capacitance": 0.597001, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.095392", "delay": 0.000248, "slew": 0.597248, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.002651", "delay": 0.077516, "slew": 0.098907, "capacitance": 0.696155, "cell_type": "sky130_fd_sc_hd__nor2_1"}, {"pin": "0.077516", "delay": 5.1e-05, "slew": 0.696206, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}, {"pin": "0.000114", "delay": 5.7e-05, "slew": 5.000057, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.008491", "delay": 0.107561, "slew": 0.110234, "capacitance": 5.110291, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.107562", "delay": 0.0002, "slew": 5.110491, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.005848", "delay": 0.078134, "slew": 0.122181, "capacitance": 5.232673, "cell_type": "sky130_fd_sc_hd__clkbuf_1"}, {"pin": "0.078134", "delay": 9.5e-05, "slew": 5.232767, "cell_type": "sky130_fd_sc_hd__dfxtp_1"}], "slack": 4.47983, "data_arrival_time": 0.696206, "data_required_time": 5.176037}]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/tns_detail.json b/aes_sky130_50mhz/flow/extracted/tns_detail.json
new file mode 100644
index 0000000000000000000000000000000000000000..cc4f759cb106f14a558d28d04b1fe51ac88486b7
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/tns_detail.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_50mhz", "pdk": "sky130", "report_type": "tns", "content": "tns 0.00"}]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/trajectory_snapshots.json b/aes_sky130_50mhz/flow/extracted/trajectory_snapshots.json
new file mode 100644
index 0000000000000000000000000000000000000000..f24d8da2970756231a56754795e987af96201bea
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/trajectory_snapshots.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_50mhz", "pdk": "sky130", "phase": 1, "label": "Step 1/3: Synthesis", "type": "phase_start"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "phase": 1, "cells": 18440, "type": "synth_result"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "phase": 1, "duration_s": 15.9, "type": "phase_end"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "phase": 2, "label": "Step 2/3: Place and Route", "type": "phase_start"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "phase": 2, "instances": 155344, "utilization": 0.21, "type": "pnr_result"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "phase": 2, "duration_s": 1333.5, "type": "phase_end"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "phase": 3, "label": "Step 3/3: GDS Generation", "type": "phase_start"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "phase": 3, "duration_s": 1746.6, "type": "phase_end"}, {"run_id": "aes_sky130_50mhz", "pdk": "sky130", "phase": 3, "signoff": "FAIL", "type": "signoff_result"}]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/extracted/wns_detail.json b/aes_sky130_50mhz/flow/extracted/wns_detail.json
new file mode 100644
index 0000000000000000000000000000000000000000..49ae6ab504b55f8fdde190d481efa626f66852e7
--- /dev/null
+++ b/aes_sky130_50mhz/flow/extracted/wns_detail.json
@@ -0,0 +1 @@
+[{"run_id": "aes_sky130_50mhz", "pdk": "sky130", "report_type": "wns", "content": "wns 0.00"}]
\ No newline at end of file
diff --git a/aes_sky130_50mhz/flow/flow_log.txt b/aes_sky130_50mhz/flow/flow_log.txt
new file mode 100644
index 0000000000000000000000000000000000000000..26c218d4c3eee29cdbf8eedc879f6ba0d7aaa3ff
--- /dev/null
+++ b/aes_sky130_50mhz/flow/flow_log.txt
@@ -0,0 +1,96 @@
+╔══════════════════════════════════════════╗
+║ Zyphar Flow v1.0.0 ║
+║ Complete RTL-to-GDSII Toolchain ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+ Input: /tmp/github_designs/aes/aes_combined.v
+ Top: aes
+ PDK: Sky130
+ Frequency: 50 MHz
+ Clock: clk
+ Output: /tmp/datagen_output/aes_sky130_50mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 18440 cells, 0.00 um^2
+ Wires: 15109, Modules: 7
+ Netlist: /tmp/zyphar_netlist_2107743.v
+ Duration: 15.9s
+
+--- CDC Analysis ---
+ No clock domain crossings detected
+
+--- Native Re-Optimization ---
+ Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+ Input netlist: /tmp/zyphar_netlist_2107743.v
+ PDK: Sky130, Freq: 50 MHz, Clock: clk
+ Utilization: 15%, Aspect ratio: 1.0, Placement density: 0.30 (user-specified)
+ PDN: false, Detailed route: true, Fillers: true, Antenna: true
+PnR complete: 155344 instances, 0.21 utilization
+ DEF: /tmp/zyphar_pnr_2107743.def
+ WNS: 11.430 ns
+ Duration: 1333.5s
+
+--- Multi-Corner STA ---
+ Using post-PnR netlist with SPEF back-annotation
+ ff_n40C_1v95 (fast) WNS: NaN ns TNS: NaN ns [VIOLATED]
+ tt_025C_1v80 (typical) WNS: NaN ns TNS: NaN ns [VIOLATED]
+ ss_n40C_1v40 (slow) WNS: NaN ns TNS: NaN ns [VIOLATED]
+
+--- Power Analysis ---
+ Power analysis skipped: No Liberty file available (use --liberty or set SKY130_LIBERTY)
+
+=== Step 3/3: GDS Generation ===
+GDS generation complete: /tmp/datagen_output/aes_sky130_50mhz/flow/aes.gds
+
+=== Signoff Checks ===
+
+--- DRC ---
+ DRC: 356 violations
+
+--- LVS ---
+ LVS: CLEAN
+
+═══════════════════════════════════════════
+ RESULTS
+═══════════════════════════════════════════
+
+Synthesis:
+ Cells: 18440
+ Netlist: /tmp/datagen_output/aes_sky130_50mhz/flow/netlist.v
+
+Place & Route:
+ DEF: /tmp/datagen_output/aes_sky130_50mhz/flow/output.def
+ WNS: 11.430 ns
+ Util: 21.0%
+ Instances: 155344
+ Area: 234253.00 um^2
+
+GDSII: /tmp/datagen_output/aes_sky130_50mhz/flow/aes.gds
+
+Multi-Corner STA:
+ ff_n40C_1v95 (fast) WNS: NaN ns TNS: NaN ns [VIOLATED]
+ tt_025C_1v80 (typical) WNS: NaN ns TNS: NaN ns [VIOLATED]
+ ss_n40C_1v40 (slow) WNS: NaN ns TNS: NaN ns [VIOLATED]
+
+SPEF: /tmp/datagen_output/aes_sky130_50mhz/flow/aes.spef
+
+Duration: 1746.60s
+
+Signoff:
+ Timing: MET
+ WNS: 11.430 ns
+ DRC: 356 violations
+ DRC report: /tmp/datagen_output/aes_sky130_50mhz/flow/drc_report.rpt
+ LVS: CLEAN
+ LVS report: /tmp/datagen_output/aes_sky130_50mhz/flow/lvs_report.lyrdb
+
+ SIGNOFF: FAIL
+ - DRC violations
+
+Flow completed successfully!
+
diff --git a/aes_sky130_50mhz/flow/klayout_lvs.log b/aes_sky130_50mhz/flow/klayout_lvs.log
new file mode 100644
index 0000000000000000000000000000000000000000..7921a268ebb7a4a8b5352207ceb7c047e937f8c2
--- /dev/null
+++ b/aes_sky130_50mhz/flow/klayout_lvs.log
@@ -0,0 +1,611 @@
+=== stdout ===
+"polygons" in: lvs_deck_patched.lylvs:49
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.100s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:50
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:51
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:52
+ Polygons (raw): 34405 (flat) 185 (hierarchical)
+ Elapsed: 0.040s Memory: 708.00M
+"input" in: lvs_deck_patched.lylvs:53
+ Polygons (raw): 19844 (flat) 187 (hierarchical)
+ Elapsed: 0.030s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:54
+ Polygons (raw): 19847 (flat) 188 (hierarchical)
+ Elapsed: 0.030s Memory: 708.00M
+"input" in: lvs_deck_patched.lylvs:55
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"input" in: lvs_deck_patched.lylvs:56
+ Polygons (raw): 19884 (flat) 189 (hierarchical)
+ Elapsed: 0.040s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:57
+ Polygons (raw): 64619 (flat) 595 (hierarchical)
+ Elapsed: 0.060s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:58
+ Polygons (raw): 29792 (flat) 2 (hierarchical)
+ Elapsed: 0.040s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:59
+ Polygons (raw): 49306 (flat) 188 (hierarchical)
+ Elapsed: 0.030s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:60
+ Polygons (raw): 49301 (flat) 186 (hierarchical)
+ Elapsed: 0.030s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:61
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:62
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:63
+ Polygons (raw): 35350 (flat) 190 (hierarchical)
+ Elapsed: 0.040s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:64
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:65
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:66
+ Polygons (raw): 34405 (flat) 185 (hierarchical)
+ Elapsed: 0.060s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:67
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:68
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:69
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:70
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:71
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:72
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:73
+ Polygons (raw): 143781 (flat) 1474 (hierarchical)
+ Elapsed: 0.040s Memory: 708.00M
+"input" in: lvs_deck_patched.lylvs:74
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:75
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:76
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:77
+ Polygons (raw): 609433 (flat) 6945 (hierarchical)
+ Elapsed: 0.040s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:78
+ Polygons (raw): 32860 (flat) 221 (hierarchical)
+ Elapsed: 0.050s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:79
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:80
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:81
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:82
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:83
+ Polygons (raw): 438234 (flat) 10440 (hierarchical)
+ Elapsed: 0.050s Memory: 708.00M
+"input" in: lvs_deck_patched.lylvs:84
+ Polygons (raw): 121383 (flat) 1492 (hierarchical)
+ Elapsed: 0.040s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:85
+ Polygons (raw): 126656 (flat) 1592 (hierarchical)
+ Elapsed: 0.030s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:86
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:87
+ Polygons (raw): 485044 (flat) 4015 (hierarchical)
+ Elapsed: 0.030s Memory: 708.00M
+"polygons" in: lvs_deck_patched.lylvs:88
+ Polygons (raw): 371924 (flat) 114147 (hierarchical)
+ Elapsed: 0.170s Memory: 708.00M
+"input" in: lvs_deck_patched.lylvs:89
+ Polygons (raw): 68884 (flat) 373 (hierarchical)
+ Elapsed: 0.030s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:90
+ Polygons (raw): 68890 (flat) 375 (hierarchical)
+ Elapsed: 0.030s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:91
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:92
+ Polygons (raw): 79005 (flat) 2 (hierarchical)
+ Elapsed: 0.030s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:93
+ Polygons (raw): 146312 (flat) 59461 (hierarchical)
+ Elapsed: 0.090s Memory: 711.00M
+"input" in: lvs_deck_patched.lylvs:94
+ Polygons (raw): 76 (flat) 76 (hierarchical)
+ Elapsed: 0.050s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:95
+ Polygons (raw): 76 (flat) 76 (hierarchical)
+ Elapsed: 0.030s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:96
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:97
+ Polygons (raw): 7849 (flat) 1 (hierarchical)
+ Elapsed: 0.040s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:98
+ Polygons (raw): 14488 (flat) 5669 (hierarchical)
+ Elapsed: 0.040s Memory: 711.00M
+"input" in: lvs_deck_patched.lylvs:99
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:100
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:101
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:102
+ Polygons (raw): 972 (flat) 1 (hierarchical)
+ Elapsed: 0.030s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:103
+ Polygons (raw): 1704 (flat) 604 (hierarchical)
+ Elapsed: 0.040s Memory: 711.00M
+"input" in: lvs_deck_patched.lylvs:104
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.030s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:105
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:106
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:107
+ Polygons (raw): 130 (flat) 1 (hierarchical)
+ Elapsed: 0.040s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:108
+ Polygons (raw): 216 (flat) 87 (hierarchical)
+ Elapsed: 0.030s Memory: 711.00M
+"input" in: lvs_deck_patched.lylvs:109
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:110
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:111
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:112
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"input" in: lvs_deck_patched.lylvs:113
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:114
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:115
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:116
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:117
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.020s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:118
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:119
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:120
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:121
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:122
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:123
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 711.00M
+"polygons" in: lvs_deck_patched.lylvs:126
+ Polygons (raw): 19509 (flat) 184 (hierarchical)
+ Elapsed: 0.040s Memory: 711.00M
+"&" in: lvs_deck_patched.lylvs:130
+ Polygons (raw): 31883 (flat) 293 (hierarchical)
+ Elapsed: 0.300s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:130
+ Polygons (raw): 31883 (flat) 293 (hierarchical)
+ Elapsed: 0.250s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:131
+ Polygons (raw): 14896 (flat) 1 (hierarchical)
+ Elapsed: 0.200s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:131
+ Polygons (raw): 14896 (flat) 1 (hierarchical)
+ Elapsed: 0.240s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:132
+ Polygons (raw): 128929 (flat) 1566 (hierarchical)
+ Elapsed: 0.200s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:133
+ Polygons (raw): 160812 (flat) 1859 (hierarchical)
+ Elapsed: 0.250s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:134
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.250s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:134
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:134
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.020s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:135
+ Polygons (raw): 35350 (flat) 190 (hierarchical)
+ Elapsed: 0.020s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:135
+ Polygons (raw): 35350 (flat) 190 (hierarchical)
+ Elapsed: 0.020s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:135
+ Polygons (raw): 128929 (flat) 1566 (hierarchical)
+ Elapsed: 0.290s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:136
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.180s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:136
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.090s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:136
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:138
+ Polygons (raw): 29417 (flat) 293 (hierarchical)
+ Elapsed: 0.350s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:138
+ Polygons (raw): 29291 (flat) 291 (hierarchical)
+ Elapsed: 0.240s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:139
+ Polygons (raw): 14896 (flat) 1 (hierarchical)
+ Elapsed: 0.310s Memory: 1263.00M
+"&" in: lvs_deck_patched.lylvs:139
+ Polygons (raw): 14896 (flat) 1 (hierarchical)
+ Elapsed: 0.180s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:140
+ Polygons (raw): 128851 (flat) 1558 (hierarchical)
+ Elapsed: 0.270s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:141
+ Polygons (raw): 158142 (flat) 1849 (hierarchical)
+ Elapsed: 0.250s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:142
+ Polygons (raw): 128851 (flat) 1558 (hierarchical)
+ Elapsed: 0.040s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:142
+ Polygons (raw): 128851 (flat) 1558 (hierarchical)
+ Elapsed: 0.010s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:142
+ Polygons (raw): 128851 (flat) 1558 (hierarchical)
+ Elapsed: 0.010s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:143
+ Polygons (raw): 128851 (flat) 1558 (hierarchical)
+ Elapsed: 0.020s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:143
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.020s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:143
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:144
+ Polygons (raw): 128851 (flat) 1558 (hierarchical)
+ Elapsed: 0.020s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:144
+ Polygons (raw): 128851 (flat) 1558 (hierarchical)
+ Elapsed: 0.020s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:144
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 1253.00M
+"-" in: lvs_deck_patched.lylvs:145
+ Polygons (raw): 128851 (flat) 1558 (hierarchical)
+ Elapsed: 0.010s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:145
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.080s Memory: 1253.00M
+"&" in: lvs_deck_patched.lylvs:145
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.020s Memory: 1253.00M
+"extract_devices" in: lvs_deck_patched.lylvs:151
+ Elapsed: 0.150s Memory: 1256.00M
+"extract_devices" in: lvs_deck_patched.lylvs:152
+ Elapsed: 0.200s Memory: 1262.00M
+"extract_devices" in: lvs_deck_patched.lylvs:153
+ Elapsed: 0.190s Memory: 1250.00M
+"extract_devices" in: lvs_deck_patched.lylvs:156
+ Elapsed: 0.280s Memory: 1250.00M
+"extract_devices" in: lvs_deck_patched.lylvs:157
+ Elapsed: 0.220s Memory: 1250.00M
+"extract_devices" in: lvs_deck_patched.lylvs:158
+ Elapsed: 0.200s Memory: 1250.00M
+"extract_devices" in: lvs_deck_patched.lylvs:159
+ Elapsed: 0.220s Memory: 1250.00M
+"netlist" in: lvs_deck_patched.lylvs:199
+ Elapsed: 8.960s Memory: 1482.00M
+Flatten layout cell (no schematic): VIA_L1M1_PR_MR
+Flatten layout cell (no schematic): VIA_M2M3_PR
+Flatten layout cell (no schematic): VIA_M1M2_PR
+Flatten layout cell (no schematic): VIA_L1M1_PR
+Flatten layout cell (no schematic): VIA_M3M4_PR
+Flatten layout cell (no schematic): VIA_M4M5_PR
+Flatten layout cell (no schematic): VIA_M1M2_PR_MR
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2111O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2111O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A211O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A21BOI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A21BO_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A21BO_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A21BO_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A21O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A221O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A221O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A22O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A22O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2BB2OI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2BB2OI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2BB2O_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2BB2O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A2BB2O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A311OI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A311O_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A311O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A311O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A31O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A31O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A32OI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A32OI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A32O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A32O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A41OI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A41O_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A41O_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__A41O_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND2B_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND2B_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND2B_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND3B_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND3B_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND3_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND3_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND4BB_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND4BB_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND4BB_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND4B_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__AND4_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__BUFBUF_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__BUFBUF_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__BUFINV_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__BUF_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__BUF_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKBUF_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKBUF_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S15_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S15_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S18_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S18_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S25_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S25_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S50_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKDLYBUF4S50_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKINVLP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CLKINV_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DECAP_12
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DECAP_3
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DECAP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DECAP_6
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DECAP_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFBBN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFBBN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFBBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFRBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFRBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFRTN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFSBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFSBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFSTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFXBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFXBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFXTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFXTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DFXTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DIODE_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLCLKP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLCLKP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLCLKP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRBN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRBN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTN_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLRTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXBN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXBN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXTN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXTN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXTN_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLXTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYGATE4SD1_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYGATE4SD2_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYGATE4SD3_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYMETAL6S2S_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYMETAL6S4S_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__DLYMETAL6S6S_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EBUFN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EBUFN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EBUFN_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EBUFN_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EDFXBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EDFXTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVN_0
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVN_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVN_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__EINVP_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FAHCIN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FAHCON_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FAH_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FA_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FA_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FA_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FILL_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FILL_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FILL_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__FILL_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__HA_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__HA_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__HA_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__INV_12
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__INV_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__INV_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_BLEEDER_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKBUFKAPWR_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKBUFKAPWR_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKBUFKAPWR_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKBUFKAPWR_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKBUFKAPWR_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKINVKAPWR_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKINVKAPWR_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKINVKAPWR_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKINVKAPWR_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_CLKINVKAPWR_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_DECAPKAPWR_12
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_DECAPKAPWR_3
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_DECAPKAPWR_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_DECAPKAPWR_6
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_DECAPKAPWR_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_INPUTISO0N_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_INPUTISO0P_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_INPUTISO1N_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_INPUTISOLATCH_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_ISOBUFSRCKAPWR_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_ISOBUFSRC_16
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_ISOBUFSRC_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_ISOBUFSRC_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_ISOBUFSRC_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_HL_ISOWELL_TAP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_HL_ISOWELL_TAP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_HL_ISOWELL_TAP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_ISOWELL_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_ISOWELL_TAP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_ISOWELL_TAP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__LPFLOW_LSBUF_LH_ISOWELL_TAP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__MACRO_SPARECELL
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__CONB_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__INV_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__MAJ3_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__MAJ3_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__MAJ3_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__MUX4_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2111A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2111A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O211A_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O211A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O211A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O21A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O21BA_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O21BA_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O221A_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O221A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O221A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O22A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O22A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2BB2AI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2BB2AI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2BB2A_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2BB2A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O2BB2A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O311AI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O311A_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O311A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O311A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O31AI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O31AI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O31A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O31A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O32AI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O32A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O32A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O41AI_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O41AI_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O41A_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O41A_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__O41A_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2B_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2B_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2B_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2_0
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR2_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR4BB_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR4BB_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__OR4BB_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__PROBEC_P_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__PROBE_P_8
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFBBN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFBBN_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFBBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRTN_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFRTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFSBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFSBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFSTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFSTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFSTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFXBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFXBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFXTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFXTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDFXTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDLCLKP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDLCLKP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SDLCLKP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SEDFXBP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SEDFXBP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SEDFXTP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SEDFXTP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__SEDFXTP_4
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__TAPVGND2_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__TAPVGND_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__TAP_1
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__TAP_2
+Flatten schematic circuit (no layout): SKY130_FD_SC_HD__XOR3_2
+Writing netlist: /tmp/datagen_output/aes_sky130_50mhz/flow/lvs_extracted.cir ..
+Writing LVS database: /tmp/datagen_output/aes_sky130_50mhz/flow/lvs_report.lyrdb ..
+Total elapsed: 22.070s Memory: 1460.00M
+INFO : Congratulations! Netlists match.
+
+=== stderr ===
diff --git a/aes_sky130_50mhz/flow/lvs_cleaned.gds.gz b/aes_sky130_50mhz/flow/lvs_cleaned.gds.gz
new file mode 100644
index 0000000000000000000000000000000000000000..36b730517d53a687fe819352d5cf8098cc64cbf3
--- /dev/null
+++ b/aes_sky130_50mhz/flow/lvs_cleaned.gds.gz
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:ae16b3db8e923cbabfed8b8e26639e48e8545c08b771018e8fbdf0d2b76bb34c
+size 3457354
diff --git a/aes_sky130_50mhz/flow/lvs_deck_patched.lylvs b/aes_sky130_50mhz/flow/lvs_deck_patched.lylvs
new file mode 100644
index 0000000000000000000000000000000000000000..e35252eb8a260d188e1097039be3783246c53b05
--- /dev/null
+++ b/aes_sky130_50mhz/flow/lvs_deck_patched.lylvs
@@ -0,0 +1,295 @@
+
+
+
+
+ lvs
+
+
+
+ false
+ false
+
+ true
+ lvs_scripts
+ tools_menu.lvs.end
+ dsl
+ lvs-dsl-xml
+ #
+# Extraction for SKY130
+#
+############################
+
+# optionnal for a batch launch : klayout -b -rd in_gds=my_layout.gds -rd report_file=my_report.lyrdb -rd cdl_file=reference_netlist.cir -rd target_netlist=extracted_netlist.cir -r sky130.lylvs
+if $in_gds
+ source($in_gds)
+end
+
+if $report_file
+ report_lvs($report_file)
+else
+ report_lvs("lvs_report.lvsdb")
+end
+
+if $cdl_file
+#reference netlist
+ schematic($cdl_file)
+else
+ schematic("sky130hd.cdl")
+end
+
+# true: use net names instead of numbers
+# false: use numbers for nets
+spice_with_net_names = true
+
+# true: put in comments with details
+# false: no comments
+spice_with_comments = false
+
+if $target_netlist
+ target_netlist($target_netlist)
+else
+ # target_netlist("netlist.cir", write_spice(spice_with_net_names, spice_with_comments), "The netlist comment goes here.")
+ target_netlist(File.join(File.dirname(RBA::CellView::active.filename), source.cell_name+"_extracted.cir"), write_spice(spice_with_net_names, spice_with_comments), "Extracted by KLayout on : #{Time.now.strftime("%d/%m/%Y %H:%M")}")
+end
+
+# Hierarchical mode
+deep
+# Use 4 CPU cores
+threads(4)
+# Print details
+verbose(true)
+
+
+# layers definitions
+########################
+BOUND = polygons(235, 4)
+DNWELL = polygons(64, 18)
+PWRES = polygons(64, 13)
+NWELL = polygons(64, 20)
+NWELLTXT = input(64, 5)
+NWELLPIN = polygons(64, 16)
+SUBTXT = input(122, 5)
+SUBPIN = input(64, 59)
+DIFF = polygons(65, 20)
+TAP = polygons(65, 44)
+PSDM = polygons(94, 20)
+NSDM = polygons(93, 44)
+LVTN = polygons(125, 44)
+HVTR = polygons(18, 20)
+HVTP = polygons(78, 44)
+SONOS = polygons(80, 20)
+COREID = polygons(81, 2)
+STDCELL = polygons(81, 4)
+NPNID = polygons(82, 20)
+PNPID = polygons(82, 44)
+RPM = polygons(86, 20)
+URPM = polygons(79, 20)
+LDNTM = polygons(11, 44)
+HVNTM = polygons(125, 20)
+POLY = polygons(66, 20)
+POLYTXT = input(66, 5)
+POLYPIN = polygons(66, 16)
+HVI = polygons(75, 20)
+LICON = polygons(66, 44)
+NPC = polygons(95, 20)
+DIFFRES = polygons(65, 13)
+POLYRES = polygons(66, 13)
+POLYSHO = polygons(66, 15)
+DIODE = polygons(81, 23)
+LI = polygons(67, 20)
+LITXT = input(67, 5)
+LIPIN = polygons(67, 16)
+LIRES = polygons(67, 13)
+MCON = polygons(67, 44)
+MET1 = polygons(68, 20)
+MET1TXT = input(68, 5)
+MET1PIN = polygons(68, 16)
+MET1RES = polygons(68, 13)
+VIA1 = polygons(68, 44)
+MET2 = polygons(69, 20)
+MET2TXT = input(69, 5)
+MET2PIN = polygons(69, 16)
+MET2RES = polygons(69, 13)
+VIA2 = polygons(69, 44)
+MET3 = polygons(70, 20)
+MET3TXT = input(70, 5)
+MET3PIN = polygons(70, 16)
+MET3RES = polygons(70, 13)
+VIA3 = polygons(70, 44)
+MET4 = polygons(71, 20)
+MET4TXT = input(71, 5)
+MET4PIN = polygons(71, 16)
+MET4RES = polygons(71, 13)
+VIA4 = polygons(71, 44)
+MET5 = polygons(72, 20)
+MET5TXT = input(72, 5)
+MET5PIN = polygons(72, 16)
+MET5RES = polygons(72, 13)
+RDL = polygons(74, 20)
+RDLTXT = input(74, 5)
+RDLPIN = polygons(74, 16)
+GLASS = polygons(76, 20)
+CAPM = polygons(89, 44)
+CAPM2 = polygons(97, 44)
+LOWTAPD = polygons(81, 14)
+FILLOBSM1 = polygons(62, 24)
+FILLOBSM2 = polygons(105, 52)
+FILLOBSM3 = polygons(107, 24)
+FILLOBSM4 = polygons(112, 4)
+NCM = polygons(92, 44)
+
+# Bulk layer for terminal provisioning
+SUB = polygons(236, 0)
+# SUB = polygon_layer
+
+# Computed layers
+PDIFF = DIFF & NWELL & PSDM
+NTAP = TAP & NWELL & NSDM
+PGATE = PDIFF & POLY
+PSD = PDIFF - PGATE
+STD_PGATE = PGATE - HVTP - NCM - HVI
+HVT_PGATE = PGATE & HVTP - NCM - HVI
+HV5_PGATE = PGATE - HVTP - NCM & HVI
+
+NDIFF = DIFF - NWELL & NSDM
+PTAP = TAP - NWELL & PSDM
+NGATE = NDIFF & POLY
+NSD = NDIFF - NGATE
+STD_NGATE = NGATE - NCM - LVTN - HVI
+LVT_NGATE = NGATE - NCM & LVTN - HVI
+HV5_NGATE = NGATE - NCM - LVTN & HVI
+HV5NA_NGATE = NGATE - NCM & LVTN & HVI
+
+# drawing to physical
+device_scaling(1000000)
+
+# PMOS transistor device extraction
+extract_devices(mos4("pfet_01v8"), { "SD" => PSD, "G" => STD_PGATE, "tS" => PSD, "tD" => PSD, "tG" => POLY, "W" => NWELL })
+extract_devices(mos4("pfet_01v8_hvt"), { "SD" => PSD, "G" => HVT_PGATE, "tS" => PSD, "tD" => PSD, "tG" => POLY, "W" => NWELL })
+extract_devices(mos4("pfet_g5v0d10v5"), { "SD" => PSD, "G" => HV5_PGATE, "tS" => PSD, "tD" => PSD, "tG" => POLY, "W" => NWELL })
+
+# NMOS transistor device extraction
+extract_devices(mos4("nfet_01v8"), { "SD" => NSD, "G" => STD_NGATE, "tS" => NSD, "tD" => NSD, "tG" => POLY, "W" => SUB })
+extract_devices(mos4("nfet_01v8_lvt"), { "SD" => NSD, "G" => LVT_NGATE, "tS" => NSD, "tD" => NSD, "tG" => POLY, "W" => SUB })
+extract_devices(mos4("nfet_g5v0d10v5"), { "SD" => NSD, "G" => HV5_NGATE, "tS" => NSD, "tD" => NSD, "tG" => POLY, "W" => SUB })
+extract_devices(mos4("nfet_01v8_nvt"), { "SD" => NSD, "G" => HV5NA_NGATE, "tS" => NSD, "tD" => NSD, "tG" => POLY, "W" => SUB })
+
+
+# Define connectivity for netlist extraction
+
+# Inter-layer
+connect(SUB, PTAP)
+connect(NWELL, NTAP)
+connect(LICON, PTAP)
+connect(LICON, NTAP)
+connect(PSD, LICON)
+connect(NSD, LICON)
+connect(POLY, LICON)
+connect(LICON, LI)
+connect(LI, MCON)
+connect(MCON, MET1)
+connect(MET1,VIA1)
+connect(VIA1, MET2)
+connect(MET2, VIA2)
+connect(VIA2, MET3)
+connect(MET3, VIA3)
+connect(VIA3, MET4)
+connect(MET4, VIA4)
+connect(VIA4, MET5)
+# Attaching labels
+connect(SUB, SUBTXT)
+connect(SUB, SUBPIN)
+connect(NWELL, NWELLTXT)
+connect(POLY, POLYTXT)
+connect(LI, LITXT)
+connect(MET1, MET1TXT)
+connect(MET2, MET2TXT)
+connect(MET3, MET3TXT)
+connect(MET4, MET4TXT)
+connect(MET5, MET5TXT)
+
+# Global
+connect_global(SUB, "VNB")
+
+# Actually performs the extraction
+netlist # ... not really required
+
+# Flatten cells which are present in one netlist only
+align
+
+# Flat LVS: flatten all cells to transistor level.
+# This avoids hierarchical port identification issues where
+# KLayout misses output pins on cells whose LI shapes are
+# only on the PIN datatype (67/16) not DRAWING (67/20).
+netlist.flatten_circuit("*")
+schematic.flatten_circuit("*")
+
+netlist.make_top_level_pins
+netlist.combine_devices
+netlist.purge
+schematic.combine_devices
+schematic.purge
+
+# Tolerances for the devices extracted parameters
+# tolerance(device_class_name, parameter_name [, :absolute => absolute_tolerance] [, :relative => relative_tolerance])
+tolerance("pfet_01v8", "W", :absolute => 1.nm, :relative => 0.001)
+tolerance("pfet_01v8", "L", :absolute => 1.nm, :relative => 0.001)
+tolerance("pfet_01v8_hvt", "W", :absolute => 1.nm, :relative => 0.001)
+tolerance("pfet_01v8_hvt", "L", :absolute => 1.nm, :relative => 0.001)
+tolerance("nfet_01v8", "W", :absolute => 1.nm, :relative => 0.001)
+tolerance("nfet_01v8", "L", :absolute => 1.nm, :relative => 0.001)
+tolerance("nfet_01v8_lvt", "W", :absolute => 1.nm, :relative => 0.001)
+tolerance("nfet_01v8_lvt", "L", :absolute => 1.nm, :relative => 0.001)
+
+# NangateOpenCellLibrary Digital gates input equivalence :
+equivalent_pins("*AND2_1", "A", "B")
+equivalent_pins("*AND2_2", "A", "B")
+equivalent_pins("*AND2_4", "A", "B")
+equivalent_pins("*AND3_1", "A", "B", "C")
+equivalent_pins("*AND3_2", "A", "B", "C")
+equivalent_pins("*AND3_4", "A", "B", "C")
+equivalent_pins("*AND4_1", "A", "B", "C", "D")
+equivalent_pins("*AND4_2", "A", "B", "C", "D")
+equivalent_pins("*AND4_4", "A", "B", "C", "D")
+equivalent_pins("*NAND2_1", "A", "B")
+equivalent_pins("*NAND2_2", "A", "B")
+equivalent_pins("*NAND2_4", "A", "B")
+equivalent_pins("*NAND3_1", "A", "B", "C")
+equivalent_pins("*NAND3_2", "A", "B", "C")
+equivalent_pins("*NAND3_4", "A", "B", "C")
+equivalent_pins("*NAND4_X1", "A", "B", "C", "D")
+equivalent_pins("*NAND4_2", "A", "B", "C", "D")
+equivalent_pins("*NAND4_4", "A", "B", "C", "D")
+equivalent_pins("*OR2_1", "A", "B")
+equivalent_pins("*OR2_2", "A", "B")
+equivalent_pins("*OR2_4", "A", "B")
+equivalent_pins("*OR3_1", "A", "B", "C")
+equivalent_pins("*OR3_2", "A", "B", "C")
+equivalent_pins("*OR3_4", "A", "B", "C")
+equivalent_pins("*OR4_1", "A", "B", "C", "D")
+equivalent_pins("*OR4_2", "A", "B", "C", "D")
+equivalent_pins("*OR4_4", "A", "B", "C", "D")
+equivalent_pins("*NOR2_1", "A", "B")
+equivalent_pins("*NOR2_2", "A", "B")
+equivalent_pins("*NOR2_4", "A", "B")
+equivalent_pins("*NOR3_1", "A", "B", "C")
+equivalent_pins("*NOR3_2", "A", "B", "C")
+equivalent_pins("*NOR3_4", "A", "B", "C")
+equivalent_pins("*NOR4_1", "A", "B", "C", "D")
+equivalent_pins("*NOR4_2", "A", "B", "C", "D")
+equivalent_pins("*NOR4_4", "A", "B", "C", "D")
+equivalent_pins("*XOR2_1", "A", "B")
+equivalent_pins("*XOR2_2", "A", "B")
+equivalent_pins("*XNOR2_1", "A", "B")
+equivalent_pins("*XNOR2_2", "A", "B")
+
+#max_res(1000000)
+#min_caps(1e-15)
+
+if ! compare
+ #raise "ERROR : Netlists don't match"
+ puts "ERROR : Netlists don't match"
+else
+ puts "INFO : Congratulations! Netlists match."
+end
+
diff --git a/aes_sky130_50mhz/flow/lvs_extracted.cir b/aes_sky130_50mhz/flow/lvs_extracted.cir
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/aes_sky130_50mhz/flow/lvs_reference.cdl.gz b/aes_sky130_50mhz/flow/lvs_reference.cdl.gz
new file mode 100644
index 0000000000000000000000000000000000000000..df0761fe930d0539aec67696ebf891ad54f05c39
--- /dev/null
+++ b/aes_sky130_50mhz/flow/lvs_reference.cdl.gz
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:0e7e82be4169d5a40e6c64a2e4dfd9bae4958ad32552f104d118bffb80b92caf
+size 649370
diff --git a/aes_sky130_50mhz/flow/lvs_report.lyrdb b/aes_sky130_50mhz/flow/lvs_report.lyrdb
new file mode 100644
index 0000000000000000000000000000000000000000..8636ecb4ec423297933269762e460aed702ad840
--- /dev/null
+++ b/aes_sky130_50mhz/flow/lvs_report.lyrdb
@@ -0,0 +1,12622 @@
+#%lvsdb-klayout
+J(
+ W(aes)
+ U(0.001)
+ L(l3 '64/20')
+ L(l29 '64/5')
+ L(l27)
+ L(l28 '64/59')
+ L(l4 '66/20')
+ L(l30)
+ L(l15 '66/44')
+ L(l16 '67/20')
+ L(l31 '67/5')
+ L(l17 '67/44')
+ L(l18 '68/20')
+ L(l32 '68/5')
+ L(l19 '68/44')
+ L(l20 '69/20')
+ L(l33 '69/5')
+ L(l21 '69/44')
+ L(l22 '70/20')
+ L(l34)
+ L(l23 '70/44')
+ L(l24 '71/20')
+ L(l35)
+ L(l25 '71/44')
+ L(l26 '72/20')
+ L(l36)
+ L(l9 '236/0')
+ L(l14)
+ L(l2)
+ L(l13)
+ L(l8)
+ C(l3 l3 l29 l14)
+ C(l29 l3 l29)
+ C(l27 l27 l9)
+ C(l28 l28 l9)
+ C(l4 l4 l30 l15)
+ C(l30 l4 l30)
+ C(l15 l4 l15 l16 l14 l2 l13 l8)
+ C(l16 l15 l16 l31 l17)
+ C(l31 l16 l31)
+ C(l17 l16 l17 l18)
+ C(l18 l17 l18 l32 l19)
+ C(l32 l18 l32)
+ C(l19 l18 l19 l20)
+ C(l20 l19 l20 l33 l21)
+ C(l33 l20 l33)
+ C(l21 l20 l21 l22)
+ C(l22 l21 l22 l34 l23)
+ C(l34 l22 l34)
+ C(l23 l22 l23 l24)
+ C(l24 l23 l24 l35 l25)
+ C(l35 l24 l35)
+ C(l25 l24 l25 l26)
+ C(l26 l25 l26 l36)
+ C(l36 l26 l36)
+ C(l9 l27 l28 l9 l13)
+ C(l14 l3 l15 l14)
+ C(l2 l15 l2)
+ C(l13 l15 l9 l13)
+ C(l8 l15 l8)
+ G(l9 VNB)
+ K(pfet_01v8 MOS4)
+ K(pfet_01v8_hvt MOS4)
+ K(pfet_g5v0d10v5 MOS4)
+ K(nfet_01v8 MOS4)
+ K(nfet_01v8_lvt MOS4)
+ K(nfet_g5v0d10v5 MOS4)
+ K(nfet_01v8_nvt MOS4)
+ D(D$pfet_01v8_hvt pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$1 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$2 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$3 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$4 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$5 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (790 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$6 pfet_01v8_hvt
+ T(S
+ R(l2 (-865 -500) (790 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$7 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$8 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$9 pfet_01v8_hvt
+ T(S
+ Q(l2 (-470 -595) (0 1000) (260 0) (0 -195) (135 0) (0 -420) (-135 0) (0 -385))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (365 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$10 pfet_01v8_hvt
+ T(S
+ R(l2 (-440 -210) (365 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (920 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$11 pfet_01v8_hvt
+ T(S
+ R(l2 (-995 -210) (920 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (210 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$12 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (330 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$13 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (280 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$14 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (260 0) (0 -195) (135 0) (0 -420) (-135 0) (0 -385))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$15 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (130 0) (0 580) (260 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$16 pfet_01v8_hvt
+ T(S
+ Q(l2 (-465 -500) (0 420) (130 0) (0 580) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$17 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$18 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -790) (0 580) (-75 0) (0 420) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$19 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 580) (-75 0) (0 420) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$20 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (655 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$21 pfet_01v8_hvt
+ T(S
+ R(l2 (-730 -500) (655 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$22 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (420 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$23 pfet_01v8_hvt
+ T(S
+ R(l2 (-495 -500) (420 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (440 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$24 pfet_01v8_hvt
+ T(S
+ R(l2 (-515 -500) (440 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$25 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$26 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (315 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$27 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -225) (0 15) (-75 0) (0 420) (75 0) (0 270) (-10 0) (0 295) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-390 -210) (315 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$28 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 15) (-75 0) (0 420) (75 0) (0 270) (-10 0) (0 295) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$29 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$30 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (350 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$31 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -210) (350 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (370 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$32 pfet_01v8_hvt
+ T(S
+ R(l2 (-445 -210) (370 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (280 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$33 pfet_01v8_hvt
+ T(S
+ Q(l2 (170 -790) (0 580) (-95 0) (0 420) (680 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-355 -210) (280 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$34 pfet_01v8_hvt
+ T(S
+ Q(l2 (-660 -500) (0 580) (-95 0) (0 420) (680 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$35 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$36 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$37 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 710) (-10 0) (0 290) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$38 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$39 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$40 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (250 0) (0 -715) (10 0) (0 -285))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$41 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -320) (265 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (240 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$42 pfet_01v8_hvt
+ T(S
+ R(l2 (-315 -320) (240 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$43 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -320) (280 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (285 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$44 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$45 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (390 0) (0 -700) (-140 0) (0 -300))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$46 pfet_01v8_hvt
+ T(S
+ Q(l2 (-465 -650) (0 1000) (390 0) (0 -700) (-140 0) (0 -300))
+ )
+ T(G
+ R(l4 (-75 -350) (150 700))
+ )
+ T(D
+ R(l2 (75 -350) (260 700))
+ )
+ T(B
+ R(l3 (-75 -350) (150 700))
+ )
+ )
+ D(D$pfet_01v8_hvt$47 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$48 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$49 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$50 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$51 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$52 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$53 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -500) (265 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$54 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (295 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$55 pfet_01v8_hvt
+ T(S
+ R(l2 (-370 -500) (295 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$56 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 360) (-80 0) (0 640) (330 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$57 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -420) (260 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (75 -420) (0 840) (345 0) (0 -420) (-75 0) (0 -420))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$58 pfet_01v8_hvt
+ T(S
+ Q(l2 (-420 -630) (0 840) (345 0) (0 -420) (-75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (280 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$59 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$60 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (390 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$61 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -210) (390 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$62 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$63 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (310 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$64 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -210) (310 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (345 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$65 pfet_01v8_hvt
+ T(S
+ R(l2 (-420 -210) (345 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (550 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$66 pfet_01v8_hvt
+ T(S
+ R(l2 (-625 -210) (550 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (335 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$67 pfet_01v8_hvt
+ T(S
+ R(l2 (-410 -210) (335 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$68 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -320) (260 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$69 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (260 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$70 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$71 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 360) (-80 0) (0 640) (330 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$72 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$73 pfet_01v8_hvt
+ T(S
+ R(l2 (-350 -500) (275 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$74 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -395) (260 790))
+ )
+ T(G
+ R(l4 (-75 -395) (150 790))
+ )
+ T(D
+ R(l2 (75 -395) (290 790))
+ )
+ T(B
+ R(l3 (-75 -395) (150 790))
+ )
+ )
+ D(D$pfet_01v8_hvt$75 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -395) (290 790))
+ )
+ T(G
+ R(l4 (-75 -395) (150 790))
+ )
+ T(D
+ R(l2 (75 -395) (260 790))
+ )
+ T(B
+ R(l3 (-75 -395) (150 790))
+ )
+ )
+ D(D$pfet_01v8_hvt$76 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (325 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$77 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -500) (325 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (315 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$78 pfet_01v8_hvt
+ T(S
+ R(l2 (-390 -500) (315 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$79 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$80 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$81 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -500) (325 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (1075 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$82 pfet_01v8_hvt
+ T(S
+ R(l2 (-1150 -500) (1075 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$83 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (335 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$84 pfet_01v8_hvt
+ T(S
+ R(l2 (-410 -500) (335 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (1265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$85 pfet_01v8_hvt
+ T(S
+ R(l2 (-1340 -500) (1265 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$86 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (350 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$87 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -500) (350 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$88 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$89 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$90 pfet_01v8_hvt
+ T(S
+ Q(l2 (-355 -500) (0 245) (10 0) (0 755) (270 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$91 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (260 0) (0 -680) (-10 0) (0 -320))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$92 pfet_01v8_hvt
+ T(S
+ R(l2 (-350 -500) (275 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$93 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$94 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$95 pfet_01v8_hvt
+ T(S
+ R(l2 (-375 -500) (300 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$96 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (730 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$97 pfet_01v8_hvt
+ T(S
+ R(l2 (-805 -500) (730 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$98 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$99 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (360 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$100 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$101 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (405 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$102 pfet_01v8_hvt
+ T(S
+ R(l2 (-480 -500) (405 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$103 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$104 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$105 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -500) (325 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$106 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -500) (265 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$107 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$108 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$109 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (635 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$110 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$111 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$112 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (770 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$113 pfet_01v8_hvt
+ T(S
+ R(l2 (-845 -500) (770 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$114 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$115 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (430 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$116 pfet_01v8_hvt
+ T(S
+ R(l2 (-505 -500) (430 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$117 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$118 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$119 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -500) (265 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$120 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$121 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$122 pfet_01v8_hvt
+ T(S
+ R(l2 (-350 -500) (275 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (455 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$123 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$124 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$125 pfet_01v8_hvt
+ T(S
+ R(l2 (-375 -500) (300 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$126 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (620 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$127 pfet_01v8_hvt
+ T(S
+ R(l2 (-695 -500) (620 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$128 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (285 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$129 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$130 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$131 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$132 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (380 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$133 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -500) (350 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$134 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (295 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$135 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$136 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$137 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (360 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$138 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$139 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$140 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (265 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$141 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (355 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$142 pfet_01v8_hvt
+ T(S
+ R(l2 (-430 -500) (355 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$143 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$144 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$145 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$146 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (745 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$147 pfet_01v8_hvt
+ T(S
+ R(l2 (-820 -500) (745 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (235 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$148 pfet_01v8_hvt
+ T(S
+ R(l2 (-310 -500) (235 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (470 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$149 pfet_01v8_hvt
+ T(S
+ R(l2 (-545 -500) (470 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$150 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$151 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (315 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$152 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -320) (280 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$153 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$154 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (450 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$155 pfet_01v8_hvt
+ T(S
+ R(l2 (-525 -320) (450 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (370 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$156 pfet_01v8_hvt
+ T(S
+ R(l2 (-445 -320) (370 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (310 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$157 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (785 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$158 pfet_01v8_hvt
+ T(S
+ R(l2 (-860 -500) (785 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$159 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$160 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (345 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$161 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$162 pfet_01v8_hvt
+ T(S
+ R(l2 (-505 -500) (430 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$163 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (285 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$164 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$165 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -420) (260 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (270 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$166 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -420) (270 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (280 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$167 pfet_01v8_hvt
+ T(S
+ R(l2 (-390 -500) (265 1000))
+ )
+ T(G
+ R(l4 (-125 -500) (250 1000))
+ )
+ T(D
+ R(l2 (125 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-125 -500) (250 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$168 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-125 -500) (250 1000))
+ )
+ T(D
+ R(l2 (125 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-125 -500) (250 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$169 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-125 -500) (250 1000))
+ )
+ T(D
+ R(l2 (125 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-125 -500) (250 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$170 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (225 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$171 pfet_01v8_hvt
+ T(S
+ R(l2 (-300 -500) (225 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (465 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$172 pfet_01v8_hvt
+ T(S
+ R(l2 (-540 -500) (465 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$173 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$174 pfet_01v8_hvt
+ T(S
+ Q(l2 (-680 -320) (0 840) (495 0) (0 -200) (110 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (300 0) (0 160) (425 0) (0 -640) (-250 0) (0 -160))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$175 pfet_01v8_hvt
+ T(S
+ Q(l2 (-800 -480) (0 640) (300 0) (0 160) (425 0) (0 -640) (-250 0) (0 -160))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (75 0) (0 200) (290 0) (0 -840))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$176 pfet_01v8_hvt
+ T(S
+ R(l2 (-495 -420) (420 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (75 -420) (0 840) (495 0) (0 -200) (110 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$177 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -580) (0 160) (-75 0) (0 840) (355 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (-440 -420) (0 640) (75 0) (0 200) (290 0) (0 -840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$178 pfet_01v8_hvt
+ T(S
+ Q(l2 (-355 -500) (0 160) (-75 0) (0 840) (355 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$179 pfet_01v8_hvt
+ T(S
+ Q(l2 (-440 -320) (0 1000) (290 0) (0 -360) (75 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$180 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (290 0) (0 -360) (75 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$181 pfet_01v8_hvt
+ T(S
+ Q(l2 (-330 -500) (0 690) (-5 0) (0 310) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$182 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -420) (0 140) (-85 0) (0 840) (260 0) (0 -140) (75 0) (0 -840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (75 -420) (0 840) (380 0) (0 -210) (5 0) (0 -630))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$183 pfet_01v8_hvt
+ T(S
+ Q(l2 (160 -560) (0 140) (-85 0) (0 840) (260 0) (0 -140) (75 0) (0 -840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (-400 -420) (325 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$184 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (1110 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$185 pfet_01v8_hvt
+ T(S
+ R(l2 (-1185 -500) (1110 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$186 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$187 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (495 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$188 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$189 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (380 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$190 pfet_01v8_hvt
+ T(S
+ R(l2 (-455 -500) (380 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$191 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (380 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$192 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (380 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$193 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 580) (260 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$194 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -500) (0 420) (75 0) (0 580) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$195 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (385 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$196 pfet_01v8_hvt
+ T(S
+ R(l2 (-460 -500) (385 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$197 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$198 pfet_01v8_hvt
+ T(S
+ R(l2 (-830 -500) (755 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (345 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$199 pfet_01v8_hvt
+ T(S
+ R(l2 (-420 -500) (345 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (370 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$200 pfet_01v8_hvt
+ T(S
+ R(l2 (-445 -500) (370 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (580 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$201 pfet_01v8_hvt
+ T(S
+ R(l2 (-655 -500) (580 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$202 pfet_01v8_hvt
+ T(S
+ R(l2 (-350 -500) (275 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$203 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (655 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$204 pfet_01v8_hvt
+ T(S
+ R(l2 (-730 -500) (655 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$205 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$206 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (325 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$207 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -500) (325 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$208 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$209 pfet_01v8_hvt
+ T(S
+ R(l2 (-375 -500) (300 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$210 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (290 0) (0 -360) (75 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$211 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -680) (0 360) (-75 0) (0 640) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (-335 -320) (260 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$212 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 360) (-75 0) (0 640) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$213 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -630) (0 420) (-75 0) (0 420) (330 0) (0 -840))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$214 pfet_01v8_hvt
+ T(S
+ Q(l2 (-330 -420) (0 420) (-75 0) (0 420) (330 0) (0 -840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (260 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$215 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -420) (260 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (75 -420) (0 840) (335 0) (0 -420) (-75 0) (0 -420))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$216 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -630) (0 840) (335 0) (0 -420) (-75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$217 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (450 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$218 pfet_01v8_hvt
+ T(S
+ R(l2 (-525 -210) (450 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (380 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$219 pfet_01v8_hvt
+ T(S
+ R(l2 (-455 -210) (380 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$220 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$221 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (210 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$222 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (390 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$223 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -210) (390 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (210 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$224 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$225 pfet_01v8_hvt
+ T(S
+ R(l2 (-460 -500) (385 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$226 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (210 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$227 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (325 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$228 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -210) (325 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$229 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -500) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$230 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (430 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$231 pfet_01v8_hvt
+ T(S
+ R(l2 (-505 -500) (430 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$232 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (290 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$233 pfet_01v8_hvt
+ T(S
+ Q(l2 (205 -430) (0 220) (-130 0) (0 420) (620 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-365 -210) (290 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$234 pfet_01v8_hvt
+ T(S
+ Q(l2 (-565 -320) (0 220) (-130 0) (0 420) (620 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (265 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$235 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (285 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$236 pfet_01v8_hvt
+ T(S
+ R(l2 (-360 -500) (285 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$237 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$238 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$239 pfet_01v8_hvt
+ T(S
+ R(l2 (-410 -500) (335 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$240 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$241 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (410 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$242 pfet_01v8_hvt
+ T(S
+ R(l2 (-485 -500) (410 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$243 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 580) (260 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$244 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -500) (0 420) (75 0) (0 580) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (340 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$245 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (350 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$246 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -500) (350 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$247 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$248 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (425 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$249 pfet_01v8_hvt
+ T(S
+ R(l2 (-500 -500) (425 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (410 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$250 pfet_01v8_hvt
+ T(S
+ R(l2 (-485 -500) (410 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$251 pfet_01v8_hvt
+ T(S
+ R(l2 (-385 -500) (310 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (425 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$252 pfet_01v8_hvt
+ T(S
+ R(l2 (-500 -500) (425 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (370 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$253 pfet_01v8_hvt
+ T(S
+ Q(l2 (-685 -320) (0 840) (500 0) (0 -200) (110 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (300 0) (0 160) (425 0) (0 -640) (-250 0) (0 -160))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$254 pfet_01v8_hvt
+ T(S
+ Q(l2 (-490 -420) (0 340) (-10 0) (0 500) (425 0) (0 -840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ Q(l2 (75 -420) (0 840) (500 0) (0 -200) (110 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$255 pfet_01v8_hvt
+ T(S
+ Q(l2 (-355 -500) (0 160) (-75 0) (0 840) (355 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$256 pfet_01v8_hvt
+ T(S
+ Q(l2 (-420 -320) (0 1000) (260 0) (0 -360) (85 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (320 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$257 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (260 0) (0 -360) (85 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$258 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -420) (260 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (380 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$259 pfet_01v8_hvt
+ T(S
+ R(l2 (-455 -420) (380 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (525 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$260 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (250 0) (0 -740) (10 0) (0 -260))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$261 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$262 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -500) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$263 pfet_01v8_hvt
+ T(S
+ Q(l2 (-525 -320) (0 1000) (375 0) (0 -360) (75 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$264 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (375 0) (0 -360) (75 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$265 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -420) (320 840))
+ )
+ T(G
+ R(l4 (-75 -420) (150 840))
+ )
+ T(D
+ R(l2 (75 -420) (380 840))
+ )
+ T(B
+ R(l3 (-75 -420) (150 840))
+ )
+ )
+ D(D$pfet_01v8_hvt$266 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (840 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$267 pfet_01v8_hvt
+ T(S
+ R(l2 (-915 -500) (840 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$268 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -320) (265 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$269 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -320) (280 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$270 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -320) (280 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (265 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$271 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$272 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$273 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (395 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$274 pfet_01v8_hvt
+ T(S
+ R(l2 (-470 -500) (395 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (600 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$275 pfet_01v8_hvt
+ T(S
+ R(l2 (-675 -500) (600 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$276 pfet_01v8_hvt
+ T(S
+ Q(l2 (-335 -210) (0 565) (-75 0) (0 420) (260 0) (0 -565) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$277 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -775) (0 565) (-75 0) (0 420) (260 0) (0 -565) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$278 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (800 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$279 pfet_01v8_hvt
+ T(S
+ R(l2 (-875 -500) (800 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$280 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (335 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$281 pfet_01v8_hvt
+ T(S
+ R(l2 (-360 -500) (285 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$282 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (770 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$283 pfet_01v8_hvt
+ T(S
+ R(l2 (-370 -320) (295 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (210 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$284 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -320) (210 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (210 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$285 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -320) (210 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (280 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$286 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -320) (280 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (380 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$287 pfet_01v8_hvt
+ T(S
+ R(l2 (-455 -320) (380 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (305 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$288 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (330 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$289 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (210 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$290 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -500) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$291 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (470 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$292 pfet_01v8_hvt
+ T(S
+ R(l2 (-545 -210) (470 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (610 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$293 pfet_01v8_hvt
+ T(S
+ R(l2 (-685 -210) (610 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (315 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$294 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -790) (0 580) (-75 0) (0 420) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-390 -210) (315 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$295 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 580) (-75 0) (0 420) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$296 pfet_01v8_hvt
+ T(S
+ R(l2 (-460 -500) (385 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (250 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$297 pfet_01v8_hvt
+ T(S
+ R(l2 (-325 -500) (250 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (360 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$298 pfet_01v8_hvt
+ T(S
+ R(l2 (-435 -500) (360 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (560 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$299 pfet_01v8_hvt
+ T(S
+ R(l2 (-635 -500) (560 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$300 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$301 pfet_01v8_hvt
+ T(S
+ R(l2 (-365 -500) (290 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$302 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -500) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$303 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (315 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$304 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -210) (0 1000) (265 0) (0 -580) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$305 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$306 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -525) (0 315) (-75 0) (0 420) (75 0) (0 265) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$307 pfet_01v8_hvt
+ T(S
+ Q(l2 (-335 -500) (0 315) (-75 0) (0 420) (75 0) (0 265) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$308 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (265 0) (0 -580) (75 0) (0 -420))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$309 pfet_01v8_hvt
+ T(S
+ R(l2 (-340 -500) (265 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (345 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$310 pfet_01v8_hvt
+ T(S
+ R(l2 (-420 -500) (345 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$311 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$312 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$313 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$314 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (325 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$315 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -210) (325 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (215 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$316 pfet_01v8_hvt
+ T(S
+ R(l2 (-290 -210) (215 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (305 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$317 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -210) (305 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 580) (265 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$318 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (610 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$319 pfet_01v8_hvt
+ T(S
+ R(l2 (-685 -500) (610 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (490 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$320 pfet_01v8_hvt
+ T(S
+ R(l2 (-565 -500) (490 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$321 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -405) (0 1000) (260 0) (0 -385) (75 0) (0 -420) (-75 0) (0 -195))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$322 pfet_01v8_hvt
+ T(S
+ R(l2 (-595 -500) (520 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$323 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (260 0) (0 -385) (75 0) (0 -420) (-75 0) (0 -195))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$324 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (475 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$325 pfet_01v8_hvt
+ T(S
+ R(l2 (-550 -500) (475 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$326 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (295 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$327 pfet_01v8_hvt
+ T(S
+ R(l2 (-370 -500) (295 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$328 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (250 0) (0 -665) (10 0) (0 -335))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$329 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 715) (-10 0) (0 285) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$330 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (670 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$331 pfet_01v8_hvt
+ T(S
+ R(l2 (-745 -500) (670 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$332 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (420 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$333 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (820 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$334 pfet_01v8_hvt
+ T(S
+ R(l2 (-895 -500) (820 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (360 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$335 pfet_01v8_hvt
+ T(S
+ R(l2 (-435 -500) (360 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (350 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$336 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$337 pfet_01v8_hvt
+ T(S
+ Q(l2 (155 -580) (0 370) (-80 0) (0 420) (130 0) (0 210) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-345 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$338 pfet_01v8_hvt
+ T(S
+ Q(l2 (-385 -500) (0 370) (-80 0) (0 420) (130 0) (0 210) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (475 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$339 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (395 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$340 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$341 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (345 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$342 pfet_01v8_hvt
+ T(S
+ R(l2 (-420 -500) (345 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$343 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (290 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$344 pfet_01v8_hvt
+ T(S
+ R(l2 (-375 -500) (300 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (400 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$345 pfet_01v8_hvt
+ T(S
+ R(l2 (-475 -500) (400 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$346 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (370 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$347 pfet_01v8_hvt
+ T(S
+ R(l2 (-445 -500) (370 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$348 pfet_01v8_hvt
+ T(S
+ R(l2 (-435 -500) (360 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$349 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$350 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (425 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$351 pfet_01v8_hvt
+ T(S
+ R(l2 (-500 -500) (425 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (345 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$352 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$353 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (80 0) (0 580) (260 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$354 pfet_01v8_hvt
+ T(S
+ Q(l2 (-415 -500) (0 420) (80 0) (0 580) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$355 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (670 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$356 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (470 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$357 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -485) (0 275) (-75 0) (0 420) (75 0) (0 305) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$358 pfet_01v8_hvt
+ T(S
+ Q(l2 (-400 -500) (0 275) (-75 0) (0 420) (75 0) (0 305) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (305 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$359 pfet_01v8_hvt
+ T(S
+ R(l2 (-380 -500) (305 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (255 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$360 pfet_01v8_hvt
+ T(S
+ R(l2 (-330 -500) (255 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$361 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -790) (0 580) (-75 0) (0 420) (395 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-335 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$362 pfet_01v8_hvt
+ T(S
+ Q(l2 (-395 -500) (0 580) (-75 0) (0 420) (395 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$363 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (435 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$364 pfet_01v8_hvt
+ T(S
+ Q(l2 (-395 -500) (0 580) (-75 0) (0 420) (395 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$365 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (350 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$366 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -500) (350 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (350 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$367 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -375) (0 1000) (260 0) (0 -415) (75 0) (0 -420) (-75 0) (0 -165))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$368 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (260 0) (0 -415) (75 0) (0 -420) (-75 0) (0 -165))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$369 pfet_01v8_hvt
+ T(S
+ R(l2 (-370 -500) (295 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$370 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$371 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$372 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -210) (0 70) (-75 0) (0 420) (250 0) (0 -70) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 285) (-10 0) (0 295) (260 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$373 pfet_01v8_hvt
+ T(S
+ Q(l2 (-335 -210) (0 350) (10 0) (0 70) (250 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$374 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -280) (0 70) (-75 0) (0 420) (250 0) (0 -70) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-345 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$375 pfet_01v8_hvt
+ T(S
+ Q(l2 (-400 -500) (0 420) (75 0) (0 285) (-10 0) (0 295) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$376 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (260 0) (0 -370) (-10 0) (0 -50))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$377 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (740 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$378 pfet_01v8_hvt
+ T(S
+ R(l2 (-815 -500) (740 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$379 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (360 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$380 pfet_01v8_hvt
+ T(S
+ R(l2 (-435 -500) (360 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$381 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (400 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$382 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 410) (-10 0) (0 590) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$383 pfet_01v8_hvt
+ T(S
+ Q(l2 (-335 -210) (0 565) (-75 0) (0 420) (260 0) (0 -565) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (255 0) (0 -140) (5 0) (0 -280))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$384 pfet_01v8_hvt
+ T(S
+ R(l2 (-415 -500) (340 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$385 pfet_01v8_hvt
+ T(S
+ Q(l2 (-385 -500) (0 370) (-80 0) (0 420) (130 0) (0 210) (260 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (390 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$386 pfet_01v8_hvt
+ T(S
+ R(l2 (-465 -500) (390 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (380 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$387 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l2 (75 -210) (0 420) (75 0) (0 280) (-85 0) (0 380) (270 0) (0 -80) (75 0) (0 -1000))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$388 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -210) (0 1000) (75 0) (0 80) (265 0) (0 -380) (-80 0) (0 -280) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (330 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$389 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (260 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$390 pfet_01v8_hvt
+ T(S
+ Q(l2 (-410 -500) (0 420) (75 0) (0 280) (-85 0) (0 380) (270 0) (0 -80) (75 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$391 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (75 0) (0 80) (265 0) (0 -380) (-80 0) (0 -280) (75 0) (0 -420))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$392 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -320) (260 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (525 0) (0 -420) (-275 0) (0 -220))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$393 pfet_01v8_hvt
+ T(S
+ Q(l2 (-600 -430) (0 640) (525 0) (0 -420) (-275 0) (0 -220))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$394 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -430) (0 220) (-75 0) (0 420) (355 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-345 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$395 pfet_01v8_hvt
+ T(S
+ Q(l2 (150 -680) (0 360) (-75 0) (0 640) (335 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (-355 -320) (0 220) (-75 0) (0 420) (355 0) (0 -640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$396 pfet_01v8_hvt
+ T(S
+ Q(l2 (-335 -500) (0 360) (-75 0) (0 640) (335 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$397 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (340 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$398 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -270) (260 540))
+ )
+ T(G
+ R(l4 (-75 -270) (150 540))
+ )
+ T(D
+ R(l2 (75 -270) (270 540))
+ )
+ T(B
+ R(l3 (-75 -270) (150 540))
+ )
+ )
+ D(D$pfet_01v8_hvt$399 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -270) (270 540))
+ )
+ T(G
+ R(l4 (-75 -270) (150 540))
+ )
+ T(D
+ R(l2 (75 -270) (260 540))
+ )
+ T(B
+ R(l3 (-75 -270) (150 540))
+ )
+ )
+ D(D$pfet_01v8_hvt$400 pfet_01v8_hvt
+ T(S
+ Q(l2 (-365 -320) (0 340) (-280 0) (0 420) (495 0) (0 -120) (75 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$401 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (325 0) (0 -420) (-75 0) (0 -220))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$402 pfet_01v8_hvt
+ T(S
+ Q(l2 (-400 -430) (0 640) (325 0) (0 -420) (-75 0) (0 -220))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$403 pfet_01v8_hvt
+ T(S
+ Q(l2 (355 -550) (0 340) (-280 0) (0 420) (495 0) (0 -120) (75 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (-345 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$404 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (485 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$405 pfet_01v8_hvt
+ T(S
+ R(l2 (-560 -500) (485 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (330 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$406 pfet_01v8_hvt
+ T(S
+ R(l2 (-405 -500) (330 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (450 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$407 pfet_01v8_hvt
+ T(S
+ R(l2 (-525 -500) (450 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (370 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$408 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (230 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$409 pfet_01v8_hvt
+ T(S
+ R(l2 (-305 -210) (230 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (390 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$410 pfet_01v8_hvt
+ T(S
+ Q(l2 (-325 -500) (0 360) (-75 0) (0 640) (325 0) (0 -1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (260 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$411 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (335 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$412 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l2 (75 -320) (0 640) (330 0) (0 -420) (-75 0) (0 -220))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$413 pfet_01v8_hvt
+ T(S
+ Q(l2 (-405 -430) (0 640) (330 0) (0 -420) (-75 0) (0 -220))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l2 (75 -210) (270 420))
+ )
+ T(B
+ R(l3 (-75 -210) (150 420))
+ )
+ )
+ D(D$pfet_01v8_hvt$414 pfet_01v8_hvt
+ T(S
+ R(l2 (-355 -500) (280 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (760 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$415 pfet_01v8_hvt
+ T(S
+ R(l2 (-835 -500) (760 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (240 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$416 pfet_01v8_hvt
+ T(S
+ R(l2 (-315 -500) (240 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (450 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$417 pfet_01v8_hvt
+ T(S
+ R(l2 (-525 -500) (450 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$418 pfet_01v8_hvt
+ T(S
+ R(l2 (-375 -500) (300 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$419 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (675 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$420 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (320 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$421 pfet_01v8_hvt
+ T(S
+ R(l2 (-395 -500) (320 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (300 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$422 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (325 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$423 pfet_01v8_hvt
+ T(S
+ R(l2 (-400 -500) (325 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$424 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$425 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ Q(l2 (75 -500) (0 1000) (415 0) (0 -640) (-165 0) (0 -360))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$426 pfet_01v8_hvt
+ T(S
+ Q(l2 (-490 -680) (0 1000) (415 0) (0 -640) (-165 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (715 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$427 pfet_01v8_hvt
+ T(S
+ R(l2 (-790 -320) (715 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (410 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$428 pfet_01v8_hvt
+ T(S
+ R(l2 (-485 -320) (410 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (210 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$429 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -320) (210 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$430 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l2 (75 -320) (270 640))
+ )
+ T(B
+ R(l3 (-75 -320) (150 640))
+ )
+ )
+ D(D$pfet_01v8_hvt$431 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (450 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$432 pfet_01v8_hvt
+ T(S
+ R(l2 (-445 -500) (370 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (310 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$433 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (275 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$434 pfet_01v8_hvt
+ T(S
+ R(l2 (-350 -500) (275 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$435 pfet_01v8_hvt
+ T(S
+ R(l2 (-455 -500) (380 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$436 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (520 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$437 pfet_01v8_hvt
+ T(S
+ R(l2 (-595 -500) (520 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$438 pfet_01v8_hvt
+ T(S
+ R(l2 (-345 -500) (270 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (625 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$439 pfet_01v8_hvt
+ T(S
+ R(l2 (-700 -500) (625 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (270 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$440 pfet_01v8_hvt
+ T(S
+ R(l2 (-425 -500) (350 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (280 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$441 pfet_01v8_hvt
+ T(S
+ R(l2 (-335 -500) (260 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (765 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$442 pfet_01v8_hvt
+ T(S
+ R(l2 (-840 -500) (765 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (435 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$443 pfet_01v8_hvt
+ T(S
+ R(l2 (-510 -500) (435 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (610 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$444 pfet_01v8_hvt
+ T(S
+ R(l2 (-685 -500) (610 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (425 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$445 pfet_01v8_hvt
+ T(S
+ R(l2 (-500 -500) (425 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (210 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$pfet_01v8_hvt$446 pfet_01v8_hvt
+ T(S
+ R(l2 (-285 -500) (210 1000))
+ )
+ T(G
+ R(l4 (-75 -500) (150 1000))
+ )
+ T(D
+ R(l2 (75 -500) (265 1000))
+ )
+ T(B
+ R(l3 (-75 -500) (150 1000))
+ )
+ )
+ D(D$nfet_01v8 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$1 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$2 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (790 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$3 nfet_01v8
+ T(S
+ R(l8 (-865 -325) (790 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$4 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$5 nfet_01v8
+ T(S
+ R(l8 (-350 -325) (275 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$6 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$7 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$8 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$9 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$10 nfet_01v8
+ T(S
+ Q(l8 (-470 -210) (0 650) (260 0) (0 -230) (135 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$11 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (475 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$12 nfet_01v8
+ T(S
+ R(l8 (-550 -210) (475 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$13 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (690 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$14 nfet_01v8
+ T(S
+ R(l8 (-765 -210) (690 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$15 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (260 0) (0 -230) (135 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$16 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (260 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$17 nfet_01v8
+ T(S
+ Q(l8 (-410 -325) (0 420) (75 0) (0 230) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$18 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (250 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$19 nfet_01v8
+ T(S
+ Q(l8 (-400 -325) (0 420) (75 0) (0 230) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$20 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (655 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$21 nfet_01v8
+ T(S
+ R(l8 (-730 -325) (655 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$22 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (420 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$23 nfet_01v8
+ T(S
+ R(l8 (-495 -325) (420 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (440 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$24 nfet_01v8
+ T(S
+ R(l8 (-515 -325) (440 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$25 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$26 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$27 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (240 0) (0 230) (250 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$28 nfet_01v8
+ T(S
+ Q(l8 (-565 -325) (0 420) (240 0) (0 230) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$29 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$30 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (290 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$31 nfet_01v8
+ T(S
+ R(l8 (-365 -210) (290 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (380 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$32 nfet_01v8
+ T(S
+ R(l8 (-455 -210) (380 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$33 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (215 0) (0 230) (465 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$34 nfet_01v8
+ T(S
+ Q(l8 (-755 -325) (0 420) (215 0) (0 230) (465 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$35 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$36 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$37 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$38 nfet_01v8
+ T(S
+ R(l8 (-425 -325) (350 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$39 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$40 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (230 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$41 nfet_01v8
+ T(S
+ R(l8 (-305 -325) (230 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$42 nfet_01v8
+ T(S
+ R(l8 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$43 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$44 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (265 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$45 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$46 nfet_01v8
+ T(S
+ R(l8 (-335 -320) (260 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (210 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$47 nfet_01v8
+ T(S
+ R(l8 (-285 -320) (210 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (910 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$48 nfet_01v8
+ T(S
+ R(l8 (-985 -320) (910 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (210 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$49 nfet_01v8
+ T(S
+ R(l8 (-285 -320) (210 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (330 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$50 nfet_01v8
+ T(S
+ R(l8 (-405 -320) (330 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (330 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$51 nfet_01v8
+ T(S
+ R(l8 (-405 -320) (330 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (260 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$52 nfet_01v8
+ T(S
+ R(l8 (-340 -325) (265 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$53 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$54 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$55 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$56 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$57 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (295 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$58 nfet_01v8
+ T(S
+ R(l8 (-370 -325) (295 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$59 nfet_01v8
+ T(S
+ Q(l8 (-435 -325) (0 420) (110 0) (0 230) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$60 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$61 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$62 nfet_01v8
+ T(S
+ Q(l8 (-400 -180) (0 420) (250 0) (0 -60) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (330 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$63 nfet_01v8
+ T(S
+ R(l8 (-405 -180) (330 360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ Q(l8 (75 -180) (0 360) (90 0) (0 60) (590 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$64 nfet_01v8
+ T(S
+ Q(l8 (-420 -180) (0 640) (270 0) (0 -280) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (395 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$65 nfet_01v8
+ T(S
+ R(l8 (-470 -180) (395 360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ Q(l8 (75 -180) (0 360) (80 0) (0 60) (250 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$66 nfet_01v8
+ T(S
+ R(l8 (-600 -210) (525 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (250 0) (0 -60) (75 0) (0 -360))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$67 nfet_01v8
+ T(S
+ Q(l8 (-755 -210) (0 360) (90 0) (0 60) (590 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$68 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (260 0) (0 220) (250 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$69 nfet_01v8
+ T(S
+ Q(l8 (-405 -210) (0 360) (80 0) (0 60) (250 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (595 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$70 nfet_01v8
+ T(S
+ R(l8 (-670 -210) (595 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (305 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$71 nfet_01v8
+ T(S
+ R(l8 (-380 -210) (305 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$72 nfet_01v8
+ T(S
+ Q(l8 (-585 -320) (0 420) (260 0) (0 220) (250 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (75 -320) (0 640) (270 0) (0 -280) (75 0) (0 -360))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$73 nfet_01v8
+ T(S
+ Q(l8 (-435 -325) (0 420) (110 0) (0 230) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$74 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (275 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$75 nfet_01v8
+ T(S
+ R(l8 (-350 -210) (275 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$76 nfet_01v8
+ T(S
+ R(l8 (-335 -260) (260 520))
+ )
+ T(G
+ R(l4 (-75 -260) (150 520))
+ )
+ T(D
+ R(l8 (75 -260) (290 520))
+ )
+ T(B
+ R(l9 (-75 -260) (150 520))
+ )
+ )
+ D(D$nfet_01v8$77 nfet_01v8
+ T(S
+ R(l8 (-365 -260) (290 520))
+ )
+ T(G
+ R(l4 (-75 -260) (150 520))
+ )
+ T(D
+ R(l8 (75 -260) (260 520))
+ )
+ T(B
+ R(l9 (-75 -260) (150 520))
+ )
+ )
+ D(D$nfet_01v8$78 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (325 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$79 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (315 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$80 nfet_01v8
+ T(S
+ R(l8 (-390 -325) (315 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$81 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (790 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$82 nfet_01v8
+ T(S
+ R(l8 (-865 -325) (790 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$83 nfet_01v8
+ T(S
+ R(l8 (-350 -325) (275 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$84 nfet_01v8
+ T(S
+ Q(l8 (-400 -320) (0 650) (250 0) (0 -10) (75 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (295 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$85 nfet_01v8
+ T(S
+ R(l8 (-370 -320) (295 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (270 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$86 nfet_01v8
+ T(S
+ R(l8 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (1050 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$87 nfet_01v8
+ T(S
+ R(l8 (-1125 -320) (1050 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (335 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$88 nfet_01v8
+ T(S
+ R(l8 (-410 -320) (335 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (485 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$89 nfet_01v8
+ T(S
+ R(l8 (-560 -320) (485 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (270 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$90 nfet_01v8
+ T(S
+ R(l8 (-1125 -320) (1050 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (75 -320) (0 640) (100 0) (0 10) (250 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$91 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (250 0) (0 -10) (75 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$92 nfet_01v8
+ T(S
+ Q(l8 (-425 -325) (0 640) (100 0) (0 10) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$93 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$94 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$95 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (770 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$96 nfet_01v8
+ T(S
+ R(l8 (-845 -325) (770 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$97 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (305 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$98 nfet_01v8
+ T(S
+ R(l8 (-380 -325) (305 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$99 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (300 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$100 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$101 nfet_01v8
+ T(S
+ R(l8 (-340 -325) (265 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$102 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$103 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (405 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$104 nfet_01v8
+ T(S
+ R(l8 (-480 -325) (405 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$105 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$106 nfet_01v8
+ T(S
+ R(l8 (-485 -325) (410 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$107 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$108 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$109 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$110 nfet_01v8
+ T(S
+ R(l8 (-340 -325) (265 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$111 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$112 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$113 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (605 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$114 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (830 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$115 nfet_01v8
+ T(S
+ R(l8 (-905 -325) (830 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$116 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$117 nfet_01v8
+ T(S
+ R(l8 (-305 -325) (230 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (470 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$118 nfet_01v8
+ T(S
+ R(l8 (-545 -325) (470 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (220 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$119 nfet_01v8
+ T(S
+ R(l8 (-295 -325) (220 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$120 nfet_01v8
+ T(S
+ R(l8 (-340 -325) (265 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (800 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$121 nfet_01v8
+ T(S
+ R(l8 (-875 -325) (800 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$122 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$123 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$124 nfet_01v8
+ T(S
+ R(l8 (-350 -325) (275 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (455 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$125 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$126 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$127 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$128 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$129 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$130 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$131 nfet_01v8
+ T(S
+ R(l8 (-370 -325) (295 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (285 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$132 nfet_01v8
+ T(S
+ R(l8 (-360 -325) (285 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$133 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (335 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$134 nfet_01v8
+ T(S
+ R(l8 (-410 -325) (335 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$135 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (430 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$136 nfet_01v8
+ T(S
+ R(l8 (-505 -325) (430 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$137 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$138 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$139 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (290 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$140 nfet_01v8
+ T(S
+ R(l8 (-365 -325) (290 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$141 nfet_01v8
+ T(S
+ R(l8 (-845 -325) (770 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$142 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$143 nfet_01v8
+ T(S
+ R(l8 (-425 -325) (350 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$144 nfet_01v8
+ T(S
+ R(l8 (-360 -325) (285 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$145 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$146 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$147 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (400 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$148 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (305 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$149 nfet_01v8
+ T(S
+ R(l8 (-380 -325) (305 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (305 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$150 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (325 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$151 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (215 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$152 nfet_01v8
+ T(S
+ R(l8 (-290 -325) (215 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$153 nfet_01v8
+ T(S
+ R(l8 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (265 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$154 nfet_01v8
+ T(S
+ Q(l8 (-415 -325) (0 420) (75 0) (0 230) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (440 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$155 nfet_01v8
+ T(S
+ R(l8 (-515 -325) (440 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$156 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (425 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$157 nfet_01v8
+ T(S
+ R(l8 (-500 -325) (425 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$158 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (285 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$159 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$160 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$161 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$162 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (315 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$163 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$164 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$165 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$166 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$167 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (610 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$168 nfet_01v8
+ T(S
+ R(l8 (-685 -210) (610 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$169 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$170 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (610 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$171 nfet_01v8
+ T(S
+ R(l8 (-685 -325) (610 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (340 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$172 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$173 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (395 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$174 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (300 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$175 nfet_01v8
+ T(S
+ R(l8 (-455 -325) (380 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$176 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$177 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (285 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$178 nfet_01v8
+ T(S
+ R(l8 (-340 -275) (265 550))
+ )
+ T(G
+ R(l4 (-75 -275) (150 550))
+ )
+ T(D
+ R(l8 (75 -275) (210 550))
+ )
+ T(B
+ R(l9 (-75 -275) (150 550))
+ )
+ )
+ D(D$nfet_01v8$179 nfet_01v8
+ T(S
+ R(l8 (-285 -275) (210 550))
+ )
+ T(G
+ R(l4 (-75 -275) (150 550))
+ )
+ T(D
+ R(l8 (75 -275) (280 550))
+ )
+ T(B
+ R(l9 (-75 -275) (150 550))
+ )
+ )
+ D(D$nfet_01v8$180 nfet_01v8
+ T(S
+ R(l8 (-355 -275) (280 550))
+ )
+ T(G
+ R(l4 (-75 -275) (150 550))
+ )
+ T(D
+ R(l8 (75 -275) (210 550))
+ )
+ T(B
+ R(l9 (-75 -275) (150 550))
+ )
+ )
+ D(D$nfet_01v8$181 nfet_01v8
+ T(S
+ R(l8 (-285 -275) (210 550))
+ )
+ T(G
+ R(l4 (-75 -275) (150 550))
+ )
+ T(D
+ R(l8 (75 -275) (265 550))
+ )
+ T(B
+ R(l9 (-75 -275) (150 550))
+ )
+ )
+ D(D$nfet_01v8$182 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (285 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$183 nfet_01v8
+ T(S
+ R(l8 (-360 -325) (285 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (355 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$184 nfet_01v8
+ T(S
+ R(l8 (-430 -325) (355 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$185 nfet_01v8
+ T(S
+ Q(l8 (-680 -210) (0 640) (500 0) (0 -220) (105 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (125 0) (0 220) (520 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$186 nfet_01v8
+ T(S
+ Q(l8 (-440 -300) (0 10) (-85 0) (0 640) (250 0) (0 -50) (200 0) (0 -600))
+ )
+ T(G
+ R(l4 (-75 -300) (150 600))
+ )
+ T(D
+ Q(l8 (75 -300) (0 600) (100 0) (0 40) (250 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -300) (150 600))
+ )
+ )
+ D(D$nfet_01v8$187 nfet_01v8
+ T(S
+ Q(l8 (-425 -320) (0 600) (100 0) (0 40) (250 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (270 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$188 nfet_01v8
+ T(S
+ R(l8 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (285 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$189 nfet_01v8
+ T(S
+ Q(l8 (-335 -320) (0 275) (10 0) (0 365) (250 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (75 -320) (0 640) (500 0) (0 -220) (105 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$190 nfet_01v8
+ T(S
+ Q(l8 (160 -330) (0 10) (-85 0) (0 640) (250 0) (0 -50) (200 0) (0 -600))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (-720 -320) (0 420) (125 0) (0 220) (520 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$191 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (385 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$192 nfet_01v8
+ T(S
+ Q(l8 (-460 -440) (0 650) (385 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (425 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$193 nfet_01v8
+ T(S
+ R(l8 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (290 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$194 nfet_01v8
+ T(S
+ R(l8 (-365 -320) (290 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (350 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$195 nfet_01v8
+ T(S
+ R(l8 (-365 -325) (290 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (260 0) (0 -265) (-10 0) (0 -385))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$196 nfet_01v8
+ T(S
+ R(l8 (-365 -325) (290 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$197 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$198 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (495 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$199 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (365 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$200 nfet_01v8
+ T(S
+ R(l8 (-440 -325) (365 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$201 nfet_01v8
+ T(S
+ R(l8 (-350 -325) (275 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$202 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 285) (10 0) (0 365) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$203 nfet_01v8
+ T(S
+ R(l8 (-455 -325) (380 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$204 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$205 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (260 0) (0 -285) (-10 0) (0 -135))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$206 nfet_01v8
+ T(S
+ Q(l8 (150 -440) (0 230) (-75 0) (0 420) (390 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-340 -210) (265 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$207 nfet_01v8
+ T(S
+ Q(l8 (-390 -325) (0 230) (-75 0) (0 420) (390 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$208 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (385 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$209 nfet_01v8
+ T(S
+ R(l8 (-460 -325) (385 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$210 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$211 nfet_01v8
+ T(S
+ R(l8 (-815 -325) (740 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (385 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$212 nfet_01v8
+ T(S
+ R(l8 (-460 -325) (385 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (370 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$213 nfet_01v8
+ T(S
+ R(l8 (-445 -325) (370 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (590 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$214 nfet_01v8
+ T(S
+ R(l8 (-665 -325) (590 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$215 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (295 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$216 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$217 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$218 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (365 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$219 nfet_01v8
+ T(S
+ R(l8 (-440 -325) (365 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (325 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$220 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$221 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$222 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$223 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (385 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$224 nfet_01v8
+ T(S
+ Q(l8 (-400 -180) (0 640) (250 0) (0 -280) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (400 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$225 nfet_01v8
+ T(S
+ R(l8 (-475 -180) (400 360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ Q(l8 (75 -180) (0 360) (75 0) (0 60) (255 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$226 nfet_01v8
+ T(S
+ Q(l8 (-405 -210) (0 360) (75 0) (0 60) (255 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (420 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$227 nfet_01v8
+ T(S
+ R(l8 (-495 -210) (420 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$228 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$229 nfet_01v8
+ T(S
+ R(l8 (-335 -320) (260 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (75 -320) (0 640) (250 0) (0 -280) (75 0) (0 -360))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$230 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$231 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$232 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (220 0) (0 120) (250 0) (0 -540))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$233 nfet_01v8
+ T(S
+ Q(l8 (-545 -270) (0 420) (220 0) (0 120) (250 0) (0 -540))
+ )
+ T(G
+ R(l4 (-75 -270) (150 540))
+ )
+ T(D
+ R(l8 (75 -270) (260 540))
+ )
+ T(B
+ R(l9 (-75 -270) (150 540))
+ )
+ )
+ D(D$nfet_01v8$234 nfet_01v8
+ T(S
+ Q(l8 (150 -440) (0 230) (-75 0) (0 420) (335 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-335 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$235 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 230) (-75 0) (0 420) (335 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$236 nfet_01v8
+ T(S
+ R(l8 (-460 -325) (385 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$237 nfet_01v8
+ T(S
+ Q(l8 (150 -240) (0 30) (-75 0) (0 420) (75 0) (0 200) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-345 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$238 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$239 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (245 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$240 nfet_01v8
+ T(S
+ R(l8 (-320 -325) (245 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (335 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$241 nfet_01v8
+ T(S
+ R(l8 (-410 -325) (335 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (435 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$242 nfet_01v8
+ T(S
+ R(l8 (-510 -325) (435 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (325 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$243 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$244 nfet_01v8
+ T(S
+ R(l8 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$245 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (460 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$246 nfet_01v8
+ T(S
+ R(l8 (-535 -210) (460 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (265 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$247 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (285 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$248 nfet_01v8
+ T(S
+ R(l8 (-360 -325) (285 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$249 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$250 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$251 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (410 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$252 nfet_01v8
+ T(S
+ R(l8 (-485 -325) (410 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (290 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$253 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (260 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$254 nfet_01v8
+ T(S
+ Q(l8 (-410 -325) (0 420) (75 0) (0 230) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$255 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$256 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$257 nfet_01v8
+ T(S
+ Q(l8 (170 -365) (0 40) (-95 0) (0 650) (485 0) (0 -650) (-100 0) (0 -40))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (-335 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$258 nfet_01v8
+ T(S
+ Q(l8 (-465 -365) (0 40) (-95 0) (0 650) (485 0) (0 -650) (-100 0) (0 -40))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$259 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (425 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$260 nfet_01v8
+ T(S
+ R(l8 (-500 -325) (425 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (370 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$261 nfet_01v8
+ T(S
+ Q(l8 (-685 -210) (0 640) (505 0) (0 -220) (105 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (125 0) (0 220) (520 0) (0 -640))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$262 nfet_01v8
+ T(S
+ Q(l8 (-425 -320) (0 600) (100 0) (0 40) (250 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (310 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$263 nfet_01v8
+ T(S
+ R(l8 (-385 -320) (310 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (260 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$264 nfet_01v8
+ T(S
+ Q(l8 (-335 -320) (0 280) (10 0) (0 360) (250 0) (0 -640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ Q(l8 (75 -320) (0 640) (505 0) (0 -220) (105 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$265 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (260 0) (0 -280) (-10 0) (0 -370))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$266 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (535 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$267 nfet_01v8
+ T(S
+ Q(l8 (-610 -440) (0 650) (535 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$268 nfet_01v8
+ T(S
+ R(l8 (-345 -320) (270 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (400 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$269 nfet_01v8
+ T(S
+ R(l8 (-475 -320) (400 640))
+ )
+ T(G
+ R(l4 (-75 -320) (150 640))
+ )
+ T(D
+ R(l8 (75 -320) (495 640))
+ )
+ T(B
+ R(l9 (-75 -320) (150 640))
+ )
+ )
+ D(D$nfet_01v8$270 nfet_01v8
+ T(S
+ Q(l8 (150 -240) (0 30) (-75 0) (0 420) (75 0) (0 200) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-345 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$271 nfet_01v8
+ T(S
+ Q(l8 (-340 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$272 nfet_01v8
+ T(S
+ R(l8 (-375 -325) (300 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (260 0) (0 -280) (-10 0) (0 -370))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$273 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (470 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$274 nfet_01v8
+ T(S
+ Q(l8 (-545 -440) (0 650) (470 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (420 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$275 nfet_01v8
+ T(S
+ R(l8 (-350 -325) (275 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$276 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (370 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$277 nfet_01v8
+ T(S
+ R(l8 (-340 -210) (265 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (620 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$278 nfet_01v8
+ T(S
+ R(l8 (-695 -210) (620 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (530 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$279 nfet_01v8
+ T(S
+ R(l8 (-605 -210) (530 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$280 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (265 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$281 nfet_01v8
+ T(S
+ R(l8 (-415 -325) (340 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$282 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (800 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$283 nfet_01v8
+ T(S
+ R(l8 (-875 -325) (800 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$284 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (315 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$285 nfet_01v8
+ T(S
+ R(l8 (-360 -325) (285 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$286 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (325 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$287 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$288 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (550 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$289 nfet_01v8
+ T(S
+ R(l8 (-625 -325) (550 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (345 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$290 nfet_01v8
+ T(S
+ R(l8 (-420 -325) (345 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$291 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$292 nfet_01v8
+ T(S
+ R(l8 (-375 -210) (300 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$293 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (350 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$294 nfet_01v8
+ T(S
+ R(l8 (-425 -210) (350 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (280 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$295 nfet_01v8
+ T(S
+ R(l8 (-355 -210) (280 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$296 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (285 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$297 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$298 nfet_01v8
+ T(S
+ R(l8 (-405 -210) (330 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$299 nfet_01v8
+ T(S
+ Q(l8 (-340 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$300 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (350 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$301 nfet_01v8
+ T(S
+ R(l8 (-425 -210) (350 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (290 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$302 nfet_01v8
+ T(S
+ R(l8 (-365 -210) (290 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (90 0) (0 230) (260 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$303 nfet_01v8
+ T(S
+ Q(l8 (-425 -325) (0 420) (90 0) (0 230) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$304 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$305 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (845 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$306 nfet_01v8
+ T(S
+ R(l8 (-920 -325) (845 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$307 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$308 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (570 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$309 nfet_01v8
+ T(S
+ R(l8 (-645 -325) (570 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (255 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$310 nfet_01v8
+ T(S
+ R(l8 (-330 -325) (255 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (290 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$311 nfet_01v8
+ T(S
+ Q(l8 (-340 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$312 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (285 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$313 nfet_01v8
+ T(S
+ Q(l8 (-415 -240) (0 650) (265 0) (0 -200) (75 0) (0 -420) (-75 0) (0 -30))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$314 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (265 0) (0 -200) (75 0) (0 -420) (-75 0) (0 -30))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$315 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$316 nfet_01v8
+ T(S
+ R(l8 (-340 -325) (265 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (345 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$317 nfet_01v8
+ T(S
+ R(l8 (-420 -325) (345 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$318 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$319 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$320 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$321 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (305 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$322 nfet_01v8
+ T(S
+ R(l8 (-380 -210) (305 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$323 nfet_01v8
+ T(S
+ Q(l8 (-340 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (265 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$324 nfet_01v8
+ T(S
+ R(l8 (-400 -325) (325 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$325 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (675 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$326 nfet_01v8
+ T(S
+ R(l8 (-750 -325) (675 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$327 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (335 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$328 nfet_01v8
+ T(S
+ Q(l8 (-410 -440) (0 650) (335 0) (0 -420) (-75 0) (0 -230))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$329 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (295 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$330 nfet_01v8
+ T(S
+ R(l8 (-370 -325) (295 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$331 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (300 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$332 nfet_01v8
+ T(S
+ R(l8 (-375 -325) (300 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$333 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$334 nfet_01v8
+ T(S
+ R(l8 (-425 -325) (350 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$335 nfet_01v8
+ T(S
+ Q(l8 (205 -350) (0 140) (-130 0) (0 420) (130 0) (0 90) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-345 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$336 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 140) (-130 0) (0 420) (130 0) (0 90) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$337 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (815 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$338 nfet_01v8
+ T(S
+ R(l8 (-890 -325) (815 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$339 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (230 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$340 nfet_01v8
+ T(S
+ R(l8 (-305 -325) (230 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$341 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$342 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (355 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$343 nfet_01v8
+ T(S
+ R(l8 (-430 -325) (355 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (345 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$344 nfet_01v8
+ T(S
+ R(l8 (-420 -325) (345 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$345 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$346 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (375 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$347 nfet_01v8
+ T(S
+ R(l8 (-450 -325) (375 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$348 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$349 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$350 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$351 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$352 nfet_01v8
+ T(S
+ R(l8 (-375 -325) (300 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$353 nfet_01v8
+ T(S
+ Q(l8 (150 -440) (0 230) (-75 0) (0 420) (325 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-335 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$354 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (470 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$355 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (320 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$356 nfet_01v8
+ T(S
+ Q(l8 (-470 -325) (0 420) (75 0) (0 230) (320 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$357 nfet_01v8
+ T(S
+ Q(l8 (150 -440) (0 230) (-75 0) (0 420) (395 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-335 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$358 nfet_01v8
+ T(S
+ Q(l8 (-395 -325) (0 230) (-75 0) (0 420) (395 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$359 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$360 nfet_01v8
+ T(S
+ R(l8 (-425 -325) (350 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (350 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$361 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (435 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$362 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$363 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (330 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$364 nfet_01v8
+ T(S
+ R(l8 (-420 -325) (345 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$365 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (295 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$366 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$367 nfet_01v8
+ T(S
+ Q(l8 (-335 -210) (0 280) (5 0) (0 5) (5 0) (0 135) (250 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (210 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$368 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (255 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$369 nfet_01v8
+ T(S
+ Q(l8 (240 -240) (0 30) (-165 0) (0 420) (150 0) (0 200) (280 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-330 -210) (255 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$370 nfet_01v8
+ T(S
+ Q(l8 (-340 -325) (0 30) (-165 0) (0 420) (150 0) (0 200) (280 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$371 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (360 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$372 nfet_01v8
+ T(S
+ R(l8 (-435 -325) (360 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$373 nfet_01v8
+ T(S
+ R(l8 (-365 -210) (290 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$374 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (870 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$375 nfet_01v8
+ T(S
+ R(l8 (-945 -325) (870 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$376 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 140) (-130 0) (0 420) (130 0) (0 90) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (390 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$377 nfet_01v8
+ T(S
+ R(l8 (-465 -325) (390 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$378 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (305 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$379 nfet_01v8
+ T(S
+ Q(l8 (150 -240) (0 30) (-75 0) (0 420) (75 0) (0 200) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (-335 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$380 nfet_01v8
+ T(S
+ Q(l8 (-410 -240) (0 650) (260 0) (0 -200) (75 0) (0 -420) (-75 0) (0 -30))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (330 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$381 nfet_01v8
+ T(S
+ Q(l8 (-335 -325) (0 30) (-75 0) (0 420) (75 0) (0 200) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$382 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (260 0) (0 -200) (75 0) (0 -420) (-75 0) (0 -30))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$383 nfet_01v8
+ T(S
+ Q(l8 (-460 -180) (0 420) (310 0) (0 -60) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (400 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$384 nfet_01v8
+ T(S
+ R(l8 (-475 -180) (400 360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ Q(l8 (75 -180) (0 360) (75 0) (0 60) (250 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$385 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (310 0) (0 -60) (75 0) (0 -360))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$386 nfet_01v8
+ T(S
+ Q(l8 (-400 -210) (0 360) (75 0) (0 60) (250 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (75 0) (0 230) (280 0) (0 -650))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$387 nfet_01v8
+ T(S
+ Q(l8 (-430 -325) (0 420) (75 0) (0 230) (280 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$388 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (340 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$389 nfet_01v8
+ T(S
+ Q(l8 (-400 -180) (0 420) (250 0) (0 -60) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (395 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$390 nfet_01v8
+ T(S
+ R(l8 (-470 -180) (395 360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ Q(l8 (75 -180) (0 360) (75 0) (0 60) (255 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$391 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (250 0) (0 -60) (75 0) (0 -360))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$392 nfet_01v8
+ T(S
+ Q(l8 (-405 -210) (0 360) (75 0) (0 60) (255 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (390 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$393 nfet_01v8
+ T(S
+ R(l8 (-465 -210) (390 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$394 nfet_01v8
+ T(S
+ R(l8 (-335 -210) (260 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (275 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$395 nfet_01v8
+ T(S
+ R(l8 (-350 -210) (275 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (260 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$396 nfet_01v8
+ T(S
+ R(l8 (-405 -325) (330 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (515 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$397 nfet_01v8
+ T(S
+ R(l8 (-590 -325) (515 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (300 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$398 nfet_01v8
+ T(S
+ R(l8 (-375 -325) (300 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (450 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$399 nfet_01v8
+ T(S
+ R(l8 (-525 -325) (450 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (440 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$400 nfet_01v8
+ T(S
+ R(l8 (-515 -325) (440 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$401 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$402 nfet_01v8
+ T(S
+ Q(l8 (-400 -325) (0 420) (75 0) (0 230) (250 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$403 nfet_01v8
+ T(S
+ R(l8 (-285 -210) (210 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (230 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$404 nfet_01v8
+ T(S
+ R(l8 (-305 -210) (230 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ Q(l8 (75 -210) (0 420) (220 0) (0 120) (250 0) (0 -540))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$405 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (335 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$406 nfet_01v8
+ T(S
+ Q(l8 (-400 -180) (0 420) (250 0) (0 -60) (75 0) (0 -360))
+ )
+ T(G
+ R(l4 (-75 -180) (150 360))
+ )
+ T(D
+ R(l8 (75 -180) (400 360))
+ )
+ T(B
+ R(l9 (-75 -180) (150 360))
+ )
+ )
+ D(D$nfet_01v8$407 nfet_01v8
+ T(S
+ Q(l8 (-325 -325) (0 380) (-10 0) (0 270) (260 0) (0 -650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$408 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (250 0) (0 -360) (10 0) (0 -290))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$409 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (335 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$410 nfet_01v8
+ T(S
+ R(l8 (-410 -325) (335 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$411 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (275 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$412 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (290 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$413 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (290 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$414 nfet_01v8
+ T(S
+ R(l8 (-365 -325) (290 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (310 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$415 nfet_01v8
+ T(S
+ R(l8 (-385 -325) (310 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$416 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (395 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$417 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (335 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$418 nfet_01v8
+ T(S
+ R(l8 (-410 -325) (335 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (800 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$419 nfet_01v8
+ T(S
+ R(l8 (-875 -325) (800 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (320 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$420 nfet_01v8
+ T(S
+ R(l8 (-395 -325) (320 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (845 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$421 nfet_01v8
+ T(S
+ R(l8 (-920 -325) (845 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$422 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$423 nfet_01v8
+ T(S
+ Q(l8 (-400 -210) (0 650) (250 0) (0 -230) (75 0) (0 -420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (325 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$424 nfet_01v8
+ T(S
+ R(l8 (-400 -210) (325 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (825 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$425 nfet_01v8
+ T(S
+ R(l8 (-900 -210) (825 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (275 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$426 nfet_01v8
+ T(S
+ R(l8 (-350 -210) (275 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$427 nfet_01v8
+ T(S
+ R(l8 (-345 -210) (270 420))
+ )
+ T(G
+ R(l4 (-75 -210) (150 420))
+ )
+ T(D
+ R(l8 (75 -210) (270 420))
+ )
+ T(B
+ R(l9 (-75 -210) (150 420))
+ )
+ )
+ D(D$nfet_01v8$428 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ Q(l8 (75 -325) (0 650) (250 0) (0 -230) (75 0) (0 -420))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$429 nfet_01v8
+ T(S
+ R(l8 (-685 -325) (610 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (210 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$430 nfet_01v8
+ T(S
+ R(l8 (-285 -325) (210 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$431 nfet_01v8
+ T(S
+ R(l8 (-380 -325) (305 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$432 nfet_01v8
+ T(S
+ R(l8 (-490 -325) (415 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (380 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$433 nfet_01v8
+ T(S
+ R(l8 (-455 -325) (380 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$434 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (620 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$435 nfet_01v8
+ T(S
+ R(l8 (-695 -325) (620 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$436 nfet_01v8
+ T(S
+ R(l8 (-355 -325) (280 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (260 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$437 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (300 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$438 nfet_01v8
+ T(S
+ R(l8 (-375 -325) (300 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$439 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (520 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$440 nfet_01v8
+ T(S
+ R(l8 (-595 -325) (520 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$441 nfet_01v8
+ T(S
+ R(l8 (-335 -325) (260 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (625 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$442 nfet_01v8
+ T(S
+ R(l8 (-700 -325) (625 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$443 nfet_01v8
+ T(S
+ R(l8 (-425 -325) (350 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (280 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$444 nfet_01v8
+ T(S
+ R(l8 (-380 -325) (305 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (365 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$445 nfet_01v8
+ T(S
+ R(l8 (-440 -325) (365 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (365 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$446 nfet_01v8
+ T(S
+ R(l8 (-440 -325) (365 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (610 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$447 nfet_01v8
+ T(S
+ R(l8 (-685 -325) (610 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (270 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+ D(D$nfet_01v8$448 nfet_01v8
+ T(S
+ R(l8 (-345 -325) (270 650))
+ )
+ T(G
+ R(l4 (-75 -325) (150 650))
+ )
+ T(D
+ R(l8 (75 -325) (265 650))
+ )
+ T(B
+ R(l9 (-75 -325) (150 650))
+ )
+ )
+)
+H(
+ K(PFET_01V8_HVT MOS4)
+ K(NFET_01V8 MOS4)
+ K(RES RES)
+)
+Z(
+)
diff --git a/aes_sky130_50mhz/flow/output.def.gz b/aes_sky130_50mhz/flow/output.def.gz
new file mode 100644
index 0000000000000000000000000000000000000000..fefc2b336d810f4a9dad907edc2765244780e7d7
--- /dev/null
+++ b/aes_sky130_50mhz/flow/output.def.gz
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:78c93b81a27671b9f7db0e16d1095d97a4a9ee6e274a5723a6df138b0456ef11
+size 3900530
diff --git a/aes_sky130_50mhz/flow/write_cdl.tcl b/aes_sky130_50mhz/flow/write_cdl.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..01fdaa65a43d6476618990523ab57c65b5e5c860
--- /dev/null
+++ b/aes_sky130_50mhz/flow/write_cdl.tcl
@@ -0,0 +1,4 @@
+read_lef /nix/store/sjh17jnslbv9d60450qybp1ajym2fb83-source/flow/platforms/sky130hd/lef/sky130_fd_sc_hd.tlef
+read_lef /nix/store/sjh17jnslbv9d60450qybp1ajym2fb83-source/flow/platforms/sky130hd/lef/sky130_fd_sc_hd_merged.lef
+read_def /tmp/zyphar_pnr_2107743.def
+write_cdl -masters /nix/store/sjh17jnslbv9d60450qybp1ajym2fb83-source/flow/platforms/sky130hd/cdl/sky130hd.cdl /tmp/datagen_output/aes_sky130_50mhz/flow/design_only.cdl
diff --git a/aes_sky130_50mhz/result.json b/aes_sky130_50mhz/result.json
new file mode 100644
index 0000000000000000000000000000000000000000..5aaa4834b464846ea6a8a8da5945c55acf3988a4
--- /dev/null
+++ b/aes_sky130_50mhz/result.json
@@ -0,0 +1,46 @@
+{
+ "run_id": "aes_sky130_50mhz",
+ "design": "aes",
+ "pdk": "sky130",
+ "frequency_mhz": 50,
+ "status": "success",
+ "metadata": {
+ "name": "aes",
+ "source": "github",
+ "category": "crypto",
+ "files": {
+ "design": "aes_combined.v"
+ },
+ "extra_files": [
+ "aes_core.v",
+ "aes_encipher_block.v",
+ "aes_decipher_block.v",
+ "aes_inv_sbox.v",
+ "aes_key_mem.v",
+ "aes_sbox.v"
+ ],
+ "clock_port": "clk",
+ "combinational": false,
+ "parameters": {
+ "code_lines": 154
+ }
+ },
+ "timings": {
+ "flow_total": 1746.9285688400269,
+ "extraction": 1147.7299318313599
+ },
+ "errors": [],
+ "returncode": 0,
+ "extracted": {
+ "geometry_patches": 11449,
+ "physics_labels": 954213,
+ "drc_labels": 16,
+ "pin_access": 76,
+ "cell_neighborhoods": 201,
+ "timing_contexts": 192185,
+ "power_grid": 0,
+ "mesoscale_blocks": 16,
+ "trajectory_snapshots": 9,
+ "deepgate_aig": 1
+ }
+}
\ No newline at end of file