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fifo_w64_d128_sky130_1000mhz/flow/flow_log.txt

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+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d128/fifo_w64_d128.v
+  Top:       fifo_w64_d128
+  PDK:       Sky130
+  Frequency: 1000 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d128_sky130_1000mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 21984 cells, 0.00 um^2
+  Wires: 13842, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2099548.v
+  Duration: 12.9s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2099548.v
+  PDK: Sky130, Freq: 1000 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d128_sky130_1000mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d128_sky130_1000mhz",
+  "design": "fifo_w64_d128",
+  "pdk": "sky130",
+  "frequency_mhz": 1000,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 128,
+    "addr_width": 7,
+    "combinational": false,
+    "name": "fifo_w64_d128",
+    "files": {
+      "design": "fifo_w64_d128.v",
+      "testbench": "fifo_w64_d128_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 2156.3161714076996,
+    "retry_time": 1071.199859380722
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d128_sky130_100mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d128_sky130_100mhz",
+  "design": "fifo_w64_d128",
+  "pdk": "sky130",
+  "frequency_mhz": 100,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 128,
+    "addr_width": 7,
+    "combinational": false,
+    "name": "fifo_w64_d128",
+    "files": {
+      "design": "fifo_w64_d128.v",
+      "testbench": "fifo_w64_d128_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 780.875284910202,
+    "retry_time": 371.68962264060974
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d128_sky130_200mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d128/fifo_w64_d128.v
+  Top:       fifo_w64_d128
+  PDK:       Sky130
+  Frequency: 200 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d128_sky130_200mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 21984 cells, 0.00 um^2
+  Wires: 13842, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2096754.v
+  Duration: 8.7s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2096754.v
+  PDK: Sky130, Freq: 200 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d128_sky130_200mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d128_sky130_200mhz",
+  "design": "fifo_w64_d128",
+  "pdk": "sky130",
+  "frequency_mhz": 200,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 128,
+    "addr_width": 7,
+    "combinational": false,
+    "name": "fifo_w64_d128",
+    "files": {
+      "design": "fifo_w64_d128.v",
+      "testbench": "fifo_w64_d128_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 1377.5115911960602,
+    "retry_time": 680.1364371776581
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d128_sky130_500mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d128_sky130_500mhz",
+  "design": "fifo_w64_d128",
+  "pdk": "sky130",
+  "frequency_mhz": 500,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 128,
+    "addr_width": 7,
+    "combinational": false,
+    "name": "fifo_w64_d128",
+    "files": {
+      "design": "fifo_w64_d128.v",
+      "testbench": "fifo_w64_d128_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 1920.7711951732635,
+    "retry_time": 964.1709127426147
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d128_sky130_50mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d128_sky130_50mhz",
+  "design": "fifo_w64_d128",
+  "pdk": "sky130",
+  "frequency_mhz": 50,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 128,
+    "addr_width": 7,
+    "combinational": false,
+    "name": "fifo_w64_d128",
+    "files": {
+      "design": "fifo_w64_d128.v",
+      "testbench": "fifo_w64_d128_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 758.734188079834,
+    "retry_time": 392.9219934940338
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d16_sky130_1000mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d16/fifo_w64_d16.v
+  Top:       fifo_w64_d16
+  PDK:       Sky130
+  Frequency: 1000 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d16_sky130_1000mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 2458 cells, 0.00 um^2
+  Wires: 1381, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2100046.v
+  Duration: 1.3s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2100046.v
+  PDK: Sky130, Freq: 1000 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d16_sky130_1000mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d16_sky130_1000mhz",
+  "design": "fifo_w64_d16",
+  "pdk": "sky130",
+  "frequency_mhz": 1000,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 16,
+    "addr_width": 4,
+    "combinational": false,
+    "name": "fifo_w64_d16",
+    "files": {
+      "design": "fifo_w64_d16.v",
+      "testbench": "fifo_w64_d16_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 560.3064601421356,
+    "retry_time": 265.141499042511
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d16_sky130_500mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d16/fifo_w64_d16.v
+  Top:       fifo_w64_d16
+  PDK:       Sky130
+  Frequency: 500 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d16_sky130_500mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 2458 cells, 0.00 um^2
+  Wires: 1381, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2100549.v
+  Duration: 1.2s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2100549.v
+  PDK: Sky130, Freq: 500 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d16_sky130_500mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d16_sky130_500mhz",
+  "design": "fifo_w64_d16",
+  "pdk": "sky130",
+  "frequency_mhz": 500,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 16,
+    "addr_width": 4,
+    "combinational": false,
+    "name": "fifo_w64_d16",
+    "files": {
+      "design": "fifo_w64_d16.v",
+      "testbench": "fifo_w64_d16_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 1879.0992269515991,
+    "retry_time": 967.4707453250885
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d256_sky130_100mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d256/fifo_w64_d256.v
+  Top:       fifo_w64_d256
+  PDK:       Sky130
+  Frequency: 100 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d256_sky130_100mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 42524 cells, 0.00 um^2
+  Wires: 26315, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2103665.v
+  Duration: 17.3s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2103665.v
+  PDK: Sky130, Freq: 100 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d256_sky130_100mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d256_sky130_100mhz",
+  "design": "fifo_w64_d256",
+  "pdk": "sky130",
+  "frequency_mhz": 100,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 256,
+    "addr_width": 8,
+    "combinational": false,
+    "name": "fifo_w64_d256",
+    "files": {
+      "design": "fifo_w64_d256.v",
+      "testbench": "fifo_w64_d256_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 2680.552010536194,
+    "retry_time": 1414.906543970108
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d256_sky130_200mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d256/fifo_w64_d256.v
+  Top:       fifo_w64_d256
+  PDK:       Sky130
+  Frequency: 200 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d256_sky130_200mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 42524 cells, 0.00 um^2
+  Wires: 26315, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2100949.v
+  Duration: 22.8s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2100949.v
+  PDK: Sky130, Freq: 200 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d256_sky130_50mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d256/fifo_w64_d256.v
+  Top:       fifo_w64_d256
+  PDK:       Sky130
+  Frequency: 50 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d256_sky130_50mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 42524 cells, 0.00 um^2
+  Wires: 26315, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2102582.v
+  Duration: 19.8s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2102582.v
+  PDK: Sky130, Freq: 50 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d256_sky130_50mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d256_sky130_50mhz",
+  "design": "fifo_w64_d256",
+  "pdk": "sky130",
+  "frequency_mhz": 50,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 256,
+    "addr_width": 8,
+    "combinational": false,
+    "name": "fifo_w64_d256",
+    "files": {
+      "design": "fifo_w64_d256.v",
+      "testbench": "fifo_w64_d256_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 2549.8377916812897,
+    "retry_time": 1305.8924305438995
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d32_sky130_100mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d32/fifo_w64_d32.v
+  Top:       fifo_w64_d32
+  PDK:       Sky130
+  Frequency: 100 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d32_sky130_100mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 5407 cells, 0.00 um^2
+  Wires: 3319, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2105006.v
+  Duration: 2.1s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2105006.v
+  PDK: Sky130, Freq: 100 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d32_sky130_100mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d32_sky130_100mhz",
+  "design": "fifo_w64_d32",
+  "pdk": "sky130",
+  "frequency_mhz": 100,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 32,
+    "addr_width": 5,
+    "combinational": false,
+    "name": "fifo_w64_d32",
+    "files": {
+      "design": "fifo_w64_d32.v",
+      "testbench": "fifo_w64_d32_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 249.54242515563965,
+    "retry_time": 130.55006623268127
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d32_sky130_200mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d32/fifo_w64_d32.v
+  Top:       fifo_w64_d32
+  PDK:       Sky130
+  Frequency: 200 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d32_sky130_200mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 5407 cells, 0.00 um^2
+  Wires: 3319, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2106773.v
+  Duration: 2.1s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2106773.v
+  PDK: Sky130, Freq: 200 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d32_sky130_200mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d32_sky130_200mhz",
+  "design": "fifo_w64_d32",
+  "pdk": "sky130",
+  "frequency_mhz": 200,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 32,
+    "addr_width": 5,
+    "combinational": false,
+    "name": "fifo_w64_d32",
+    "files": {
+      "design": "fifo_w64_d32.v",
+      "testbench": "fifo_w64_d32_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 282.5927219390869,
+    "retry_time": 139.08702278137207
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d32_sky130_500mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d32/fifo_w64_d32.v
+  Top:       fifo_w64_d32
+  PDK:       Sky130
+  Frequency: 500 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d32_sky130_500mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 5407 cells, 0.00 um^2
+  Wires: 3319, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2107268.v
+  Duration: 2.2s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2107268.v
+  PDK: Sky130, Freq: 500 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d32_sky130_500mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d32_sky130_500mhz",
+  "design": "fifo_w64_d32",
+  "pdk": "sky130",
+  "frequency_mhz": 500,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 32,
+    "addr_width": 5,
+    "combinational": false,
+    "name": "fifo_w64_d32",
+    "files": {
+      "design": "fifo_w64_d32.v",
+      "testbench": "fifo_w64_d32_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 444.0053279399872,
+    "retry_time": 241.6339976787567
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d32_sky130_50mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d32/fifo_w64_d32.v
+  Top:       fifo_w64_d32
+  PDK:       Sky130
+  Frequency: 50 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d32_sky130_50mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 5407 cells, 0.00 um^2
+  Wires: 3319, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2105013.v
+  Duration: 2.7s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2105013.v
+  PDK: Sky130, Freq: 50 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d32_sky130_50mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d32_sky130_50mhz",
+  "design": "fifo_w64_d32",
+  "pdk": "sky130",
+  "frequency_mhz": 50,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 32,
+    "addr_width": 5,
+    "combinational": false,
+    "name": "fifo_w64_d32",
+    "files": {
+      "design": "fifo_w64_d32.v",
+      "testbench": "fifo_w64_d32_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 249.0683298110962,
+    "retry_time": 127.57046914100647
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d64_sky130_100mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d64/fifo_w64_d64.v
+  Top:       fifo_w64_d64
+  PDK:       Sky130
+  Frequency: 100 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d64_sky130_100mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 10537 cells, 0.00 um^2
+  Wires: 6430, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2111206.v
+  Duration: 5.1s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2111206.v
+  PDK: Sky130, Freq: 100 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d64_sky130_100mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d64_sky130_100mhz",
+  "design": "fifo_w64_d64",
+  "pdk": "sky130",
+  "frequency_mhz": 100,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 64,
+    "addr_width": 6,
+    "combinational": false,
+    "name": "fifo_w64_d64",
+    "files": {
+      "design": "fifo_w64_d64.v",
+      "testbench": "fifo_w64_d64_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 438.1181824207306,
+    "retry_time": 214.76692247390747
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}

fifo_w64_d64_sky130_200mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d64/fifo_w64_d64.v
+  Top:       fifo_w64_d64
+  PDK:       Sky130
+  Frequency: 200 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d64_sky130_200mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 10537 cells, 0.00 um^2
+  Wires: 6430, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2113521.v
+  Duration: 4.8s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2113521.v
+  PDK: Sky130, Freq: 200 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d64_sky130_50mhz/flow/flow_log.txt

@@ -0,0 +1,32 @@
+╔══════════════════════════════════════════╗
+║          Zyphar Flow v1.0.0              ║
+║    Complete RTL-to-GDSII Toolchain       ║
+╚══════════════════════════════════════════╝
+
+Configuration:
+  Input:     /tmp/datagen_designs/fifo_w64_d64/fifo_w64_d64.v
+  Top:       fifo_w64_d64
+  PDK:       Sky130
+  Frequency: 50 MHz
+  Clock:     clk
+  Output:    /tmp/datagen_output/fifo_w64_d64_sky130_50mhz/flow
+
+Starting flow...
+
+=== Step 1/3: Synthesis ===
+Synthesis complete: 10537 cells, 0.00 um^2
+  Wires: 6430, Modules: 1
+  Netlist: /tmp/zyphar_netlist_2110757.v
+  Duration: 4.6s
+
+--- CDC Analysis ---
+  No clock domain crossings detected
+
+--- Native Re-Optimization ---
+  Skipped (no Liberty file provided, use --liberty)
+
+=== Step 2/3: Place and Route ===
+  Input netlist: /tmp/zyphar_netlist_2110757.v
+  PDK: Sky130, Freq: 50 MHz, Clock: clk
+  Utilization: 45%, Aspect ratio: 1.0, Placement density: 0.80 (auto)
+  PDN: true, Detailed route: false, Fillers: true, Antenna: true

fifo_w64_d64_sky130_50mhz/result.json

@@ -0,0 +1,28 @@
+{
+  "run_id": "fifo_w64_d64_sky130_50mhz",
+  "design": "fifo_w64_d64",
+  "pdk": "sky130",
+  "frequency_mhz": 50,
+  "status": "flow_failed",
+  "metadata": {
+    "type": "fifo",
+    "width": 64,
+    "depth": 64,
+    "addr_width": 6,
+    "combinational": false,
+    "name": "fifo_w64_d64",
+    "files": {
+      "design": "fifo_w64_d64.v",
+      "testbench": "fifo_w64_d64_tb.v"
+    }
+  },
+  "timings": {
+    "flow_total": 416.2456126213074,
+    "retry_time": 207.7229130268097
+  },
+  "errors": [
+    "Flow failed (code 1), retry also failed (code 1)"
+  ],
+  "returncode": 1,
+  "retry": true
+}