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Datasets:
Xenn007
/
synth-layout-v1

Tasks:
Other
Size:
1B<n<10B
Tags:
eda
chip-design
vlsi
synthesis
place-and-route
drc
License:
Dataset card Data Studio Files
xet
 Community
Xenn007 commited on
Commit
de56c96
·
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1 Parent(s): 462ef8e

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Files changed (1) hide show
  1. .gitattributes +1 -0
.gitattributes CHANGED
@@ -113,3 +113,4 @@ mul_w32_unsigned_p3_sky130_200mhz/flow/extracted/geometry_patches.json filter=lf
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  regfile_w32_d32_r1_sky130_50mhz/flow/extracted/geometry_patches.json filter=lfs diff=lfs merge=lfs -text
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  mul_w32_unsigned_p3_sky130_100mhz/flow/extracted/geometry_patches.json filter=lfs diff=lfs merge=lfs -text
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  mul_w32_unsigned_p1_sky130_50mhz/flow/extracted/geometry_patches.json filter=lfs diff=lfs merge=lfs -text
 
 
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  regfile_w32_d32_r1_sky130_50mhz/flow/extracted/geometry_patches.json filter=lfs diff=lfs merge=lfs -text
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  mul_w32_unsigned_p3_sky130_100mhz/flow/extracted/geometry_patches.json filter=lfs diff=lfs merge=lfs -text
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  mul_w32_unsigned_p1_sky130_50mhz/flow/extracted/geometry_patches.json filter=lfs diff=lfs merge=lfs -text
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+ regfile_w32_d16_r1_sky130_1000mhz/flow/extracted/geometry_patches.json filter=lfs diff=lfs merge=lfs -text