Hugging Face
Models
Datasets
Spaces
Buckets
new
Docs
Enterprise
Pricing
Website
Tasks
HuggingChat
Collections
Languages
Organizations
Community
Blog
Posts
Daily Papers
Hardware
Learn
Discord
Forum
GitHub
Solutions
Team & Enterprise
Hugging Face PRO
Enterprise Support
Inference Providers
Inference Endpoints
Storage Buckets
Log In
Sign Up
Datasets:
SAIFIINDUSTRIES
/
verilog_data-2
Like
0
Dataset card
Files
Files and versions
xet
Community
0693bdd
verilog_data-2
/
antonblanchard_microwatt
/
fpga
1 contributor
History:
1 commit
SAIFIINDUSTRIES
Add Batch 2 with 10 repos
198fb2a
verified
7 days ago
arty-lcd-ts.vhdl
Safe
13.1 kB
Add Batch 2 with 10 repos
7 days ago
clk_gen_bypass.vhd
Safe
565 Bytes
Add Batch 2 with 10 repos
7 days ago
clk_gen_ecp5.vhd
Safe
4.61 kB
Add Batch 2 with 10 repos
7 days ago
clk_gen_mcmm.vhd
Safe
4.07 kB
Add Batch 2 with 10 repos
7 days ago
clk_gen_plle2.vhd
Safe
4.03 kB
Add Batch 2 with 10 repos
7 days ago
fpga-random.vhdl
Safe
1.65 kB
Add Batch 2 with 10 repos
7 days ago
main_bram.vhdl
Safe
2.49 kB
Add Batch 2 with 10 repos
7 days ago
pp_fifo.vhd
Safe
2.56 kB
Add Batch 2 with 10 repos
7 days ago
pp_soc_uart.vhd
Safe
11 kB
Add Batch 2 with 10 repos
7 days ago
pp_utilities.vhd
Safe
2.06 kB
Add Batch 2 with 10 repos
7 days ago
soc_reset.vhdl
Safe
2.61 kB
Add Batch 2 with 10 repos
7 days ago
soc_reset_tb.vhdl
Safe
3.81 kB
Add Batch 2 with 10 repos
7 days ago
top-acorn-cle-215.vhdl
Safe
9.36 kB
Add Batch 2 with 10 repos
7 days ago
top-antmicro-artix-dc-scm.vhdl
Safe
17.5 kB
Add Batch 2 with 10 repos
7 days ago
top-arty.vhdl
Safe
40.6 kB
Add Batch 2 with 10 repos
7 days ago
top-ecpix5.vhdl
Safe
25.4 kB
Add Batch 2 with 10 repos
7 days ago
top-generic.vhdl
Safe
2.21 kB
Add Batch 2 with 10 repos
7 days ago
top-genesys2.vhdl
Safe
13.9 kB
Add Batch 2 with 10 repos
7 days ago
top-nexys-video.vhdl
Safe
20 kB
Add Batch 2 with 10 repos
7 days ago
top-orangecrab0.2.vhdl
Safe
18.3 kB
Add Batch 2 with 10 repos
7 days ago
top-wukong-v2.vhdl
Safe
21.8 kB
Add Batch 2 with 10 repos
7 days ago
