/* Generated by Amaranth Yosys 0.40 (PyPI ver 0.40.0.0.post99, git sha1 a1bb0255d) */ (* top = 1 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:262" *) (* generator = "Amaranth" *) module Controller(clk_100M, clk_50M, clk_25M, reset, ACLK, ARESETN, AWREADY, WREADY, BVALID, ARREADY, RDATA, RLAST, RVALID, slot_A_in, slot_B_in, slot_C_in, slot_D_in, AWADDR, AWLEN, AWSIZE, AWBURST , AWPROT, AWUSER, AWVALID, WDATA, WSTRB, WLAST, WVALID, BREADY, ARADDR, ARLEN, ARSIZE, ARBURST, ARPROT, ARVALID, RREADY, buzzer, slot_A_out, slot_A_out_enable, slot_B_out, slot_B_out_enable, slot_C_out , slot_C_out_enable, slot_D_out, slot_D_out_enable, pl_ps_interrupts, clk_200M); reg \$auto$verilog_backend.cc:2352:dump_module$13 = 0; wire \$1 ; wire [10:0] \$10 ; reg [9:0] \$100 ; reg [9:0] \$101 ; reg [3:0] \$102 ; reg [3:0] \$103 ; reg [15:0] \$104 ; reg [3:0] \$105 ; reg [15:0] \$106 ; reg \$107 ; reg \$108 ; reg \$109 ; wire [10:0] \$11 ; reg \$110 ; reg [2:0] \$111 ; reg [1:0] \$112 ; reg [31:0] \$113 ; reg [9:0] \$114 ; reg [9:0] \$115 ; reg [3:0] \$116 ; reg [3:0] \$117 ; reg [7:0] \$118 ; reg [15:0] \$119 ; wire \$12 ; reg \$120 ; reg \$121 ; reg [15:0] \$122 ; reg [2:0] \$123 ; wire \$124 ; wire \$125 ; wire \$126 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire \$17 ; wire \$18 ; wire \$19 ; wire \$2 ; wire [18:0] \$20 ; wire [18:0] \$21 ; wire \$22 ; wire \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire \$3 ; wire \$30 ; wire \$31 ; wire \$32 ; wire \$33 ; wire \$34 ; wire \$35 ; wire \$36 ; wire \$37 ; wire \$38 ; wire \$39 ; wire [10:0] \$4 ; wire \$40 ; wire \$41 ; wire \$42 ; wire [10:0] \$43 ; wire [10:0] \$44 ; wire \$45 ; wire [10:0] \$46 ; wire [4:0] \$47 ; wire \$48 ; wire [10:0] \$49 ; wire [10:0] \$5 ; wire \$50 ; wire \$51 ; wire \$52 ; wire \$53 ; wire \$54 ; wire \$55 ; wire \$56 ; wire \$57 ; wire \$58 ; wire [10:0] \$59 ; wire [10:0] \$6 ; wire [4:0] \$60 ; wire \$61 ; wire \$62 ; wire [32:0] \$63 ; wire [2:0] \$64 ; wire \$65 ; wire [10:0] \$66 ; wire [10:0] \$67 ; wire \$68 ; wire \$69 ; wire [94:0] \$7 ; wire [10:0] \$70 ; wire [4:0] \$71 ; wire \$72 ; wire \$73 ; wire [32:0] \$74 ; wire [3:0] \$75 ; wire \$76 ; wire \$77 ; wire \$78 ; wire [8:0] \$79 ; wire [94:0] \$8 ; wire \$80 ; wire \$81 ; wire [16:0] \$82 ; wire \$83 ; wire \$84 ; wire \$85 ; wire \$86 ; wire \$87 ; reg \$88 ; reg \$89 ; wire [10:0] \$9 ; reg [63:0] \$90 ; reg \$91 ; reg \$92 ; reg \$93 ; reg \$94 ; reg \$95 ; reg \$96 ; reg [1:0] \$97 ; reg [2:0] \$98 ; reg [31:0] \$99 ; (* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 AXI_controller_master CLK" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:58" *) input ACLK; wire ACLK; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master ARADDR" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:94" *) output [31:0] ARADDR; reg [31:0] ARADDR = 32'd0; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master ARBURST" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:97" *) output [1:0] ARBURST; wire [1:0] ARBURST; (* X_INTERFACE_INFO = "xilinx.com:signal:reset:1.0 AXI_controller_master RST" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:59" *) input ARESETN; wire ARESETN; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master ARLEN" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:95" *) output [3:0] ARLEN; reg [3:0] ARLEN = 4'h0; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master ARPROT" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:100" *) output [2:0] ARPROT; wire [2:0] ARPROT; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master ARREADY" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:105" *) input ARREADY; wire ARREADY; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master ARSIZE" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:96" *) output [2:0] ARSIZE; wire [2:0] ARSIZE; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master ARVALID" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:104" *) output ARVALID; reg ARVALID = 1'h0; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master AWADDR" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:63" *) output [31:0] AWADDR; reg [31:0] AWADDR = 32'd0; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master ARBURST" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:97" *) output [1:0] AWBURST; wire [1:0] AWBURST; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master AWLEN" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:64" *) output [3:0] AWLEN; reg [3:0] AWLEN = 4'h0; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master ARPROT" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:100" *) output [2:0] AWPROT; wire [2:0] AWPROT; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master AWREADY" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:74" *) input AWREADY; wire AWREADY; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master ARSIZE" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:96" *) output [2:0] AWSIZE; wire [2:0] AWSIZE; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:72" *) output [-1:0] AWUSER; wire [-1:0] AWUSER; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master AWVALID" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:73" *) output AWVALID; reg AWVALID = 1'h0; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master BREADY" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:90" *) output BREADY; reg BREADY = 1'h0; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master BVALID" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:89" *) input BVALID; wire BVALID; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master RDATA" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:109" *) input [63:0] RDATA; wire [63:0] RDATA; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master RLAST" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:111" *) input RLAST; wire RLAST; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master RREADY" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME AXI_controller_master, CLK_DOMAIN controller_firmware_processing_system7_0_0_FCLK_CLK0, FREQ_HZ 100000000, PHASE 0.0, PROTOCOL AXI3, DATA_WIDTH 64, ID_WIDTH 0, ADDR_WIDTH 32, HAS_BURST 1, HAS_CACHE 0, HAS_LOCK 0, HAS_PROT 0, HAS_QOS 0, HAS_REGION 0, HAS_WSTRB 1, HAS_BRESP 0, HAS_RRESP 0, SUPPORTS_NARROW_BURST 0, MAX_BURST_LENGTH 16, NUM_READ_OUTSTANDING 1, NUM_WRITE_OUTSTANDING 1, READ_WRITE_MODE READ_WRITE" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:114" *) output RREADY; reg RREADY = 1'h0; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master RVALID" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:113" *) input RVALID; wire RVALID; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master WDATA" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:78" *) output [63:0] WDATA; reg [63:0] WDATA; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master WLAST" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:80" *) output WLAST; reg WLAST = 1'h0; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master WREADY" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:83" *) input WREADY; wire WREADY; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master WSTRB" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:79" *) output [7:0] WSTRB; wire [7:0] WSTRB; (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 AXI_controller_master WVALID" *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:82" *) output WVALID; reg WVALID = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:472" *) reg axi_read_busy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:507" *) reg axi_read_data_incremented = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:323" *) reg axi_transfer_busy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:322" *) reg axi_transfer_start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:471" *) reg axi_write_busy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:46" *) wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) wire [15:0] \bram_address$124 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:46" *) wire [15:0] \bram_address$131 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) wire [15:0] \bram_address$132 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:30" *) wire [15:0] \bram_address$139 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) wire [15:0] \bram_address$140 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:31" *) wire [15:0] \bram_address$147 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) wire [15:0] \bram_address$148 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:33" *) wire [15:0] \bram_address$155 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) wire [15:0] \bram_address$156 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:33" *) wire [15:0] \bram_address$163 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) wire [15:0] \bram_address$164 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:33" *) wire [15:0] \bram_address$171 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) wire [15:0] \bram_address$172 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:33" *) wire [15:0] \bram_address$179 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) wire [15:0] \bram_address$180 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:48" *) wire [31:0] \bram_read_data$130 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) wire [31:0] \bram_read_data$137 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:48" *) wire [31:0] \bram_read_data$138 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) wire [31:0] \bram_read_data$145 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:32" *) wire [31:0] \bram_read_data$146 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) wire [31:0] \bram_read_data$153 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:33" *) wire [31:0] \bram_read_data$154 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) wire [31:0] \bram_read_data$161 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:35" *) wire [31:0] \bram_read_data$162 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) wire [31:0] \bram_read_data$169 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:35" *) wire [31:0] \bram_read_data$170 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) wire [31:0] \bram_read_data$177 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:35" *) wire [31:0] \bram_read_data$178 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) wire [31:0] \bram_read_data$185 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:35" *) wire [31:0] \bram_read_data$186 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:47" *) wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) wire [31:0] \bram_write_data$126 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:47" *) wire [31:0] \bram_write_data$133 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) wire [31:0] \bram_write_data$134 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:31" *) wire [31:0] \bram_write_data$141 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) wire [31:0] \bram_write_data$142 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:32" *) wire [31:0] \bram_write_data$149 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) wire [31:0] \bram_write_data$150 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:34" *) wire [31:0] \bram_write_data$157 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) wire [31:0] \bram_write_data$158 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:34" *) wire [31:0] \bram_write_data$165 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) wire [31:0] \bram_write_data$166 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:34" *) wire [31:0] \bram_write_data$173 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) wire [31:0] \bram_write_data$174 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:34" *) wire [31:0] \bram_write_data$181 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) wire [31:0] \bram_write_data$182 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:49" *) wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) wire \bram_write_enable$128 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:49" *) wire \bram_write_enable$135 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) wire \bram_write_enable$136 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:33" *) wire \bram_write_enable$143 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) wire \bram_write_enable$144 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:34" *) wire \bram_write_enable$151 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) wire \bram_write_enable$152 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:36" *) wire \bram_write_enable$159 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) wire \bram_write_enable$160 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:36" *) wire \bram_write_enable$167 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) wire \bram_write_enable$168 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:36" *) wire \bram_write_enable$175 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) wire \bram_write_enable$176 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:36" *) wire \bram_write_enable$183 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) wire \bram_write_enable$184 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:170" *) wire busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:117" *) output buzzer; wire buzzer; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input clk_100M; wire clk_100M; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input clk_200M; wire clk_200M; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:269" *) input clk_25M; wire clk_25M; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:268" *) input clk_50M; wire clk_50M; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:463" *) reg [15:0] cycle_timer = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:456" *) reg [15:0] cycle_timer_config = 16'hffff; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) reg [31:0] data_input = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) reg [31:0] \data_input$249 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) reg [31:0] \data_input$263 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) reg [31:0] \data_input$277 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) reg [31:0] \data_input$291 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) reg [31:0] \data_input$305 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) reg [31:0] \data_input$319 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) reg [31:0] \data_input$333 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:162" *) reg [31:0] \data_input$347 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:177" *) wire [15:0] data_memory_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:178" *) reg [31:0] data_memory_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:179" *) wire [31:0] data_memory_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:180" *) wire data_memory_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:163" *) wire [31:0] data_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) wire [31:0] \data_output$250 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) wire [31:0] \data_output$264 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) wire [31:0] \data_output$278 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) wire [31:0] \data_output$292 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) wire [31:0] \data_output$306 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) wire [31:0] \data_output$320 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) wire [31:0] \data_output$334 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) wire [31:0] \data_output$348 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:311" *) reg [9:0] data_read_axi_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:312" *) reg [63:0] data_read_axi_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:300" *) wire [9:0] data_read_dma_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:301" *) wire [31:0] data_read_dma_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:302" *) wire [31:0] data_read_dma_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:303" *) wire data_read_dma_write_en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) reg [9:0] data_read_port_axi__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] data_read_port_axi__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) reg [9:0] data_read_read_port_dma__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] data_read_read_port_dma__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [9:0] data_read_write_port_dma__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] data_read_write_port_dma__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg data_read_write_port_dma__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:313" *) reg [9:0] data_write_axi_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:314" *) reg [63:0] data_write_axi_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:315" *) reg data_write_axi_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:305" *) wire [9:0] data_write_dma_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:306" *) wire [31:0] data_write_dma_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:307" *) wire [31:0] data_write_dma_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:308" *) wire data_write_dma_write_en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) reg [9:0] data_write_port_axi__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] data_write_port_axi__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg data_write_port_axi__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) reg [9:0] data_write_read_port_dma__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] data_write_read_port_dma__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [9:0] data_write_write_port_dma__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] data_write_write_port_dma__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg data_write_write_port_dma__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:325" *) wire [7:0] debug_pins; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:464" *) reg [3:0] dma_instruction_block_select = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:372" *) reg dma_memory_half = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:373" *) reg dma_memory_half_comb; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] fsm_state = 3'h0; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [1:0] \fsm_state$120 = 2'h0; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] \fsm_state$213 = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:174" *) wire [15:0] instruction_memory_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:175" *) wire [63:0] instruction_memory_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:293" *) wire [7:0] instruction_read_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:294" *) wire [63:0] instruction_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [7:0] instruction_read_port__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [63:0] instruction_read_port__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:295" *) wire [7:0] instruction_write_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:296" *) wire [63:0] instruction_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:297" *) wire instruction_write_en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) reg [7:0] instruction_write_port__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [63:0] instruction_write_port__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg instruction_write_port__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:503" *) reg [9:0] internal_axi_read_address = 10'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:504" *) reg [63:0] internal_axi_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:505" *) reg internal_axi_read_valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:641" *) reg [9:0] internal_axi_write_address = 10'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:642" *) reg [63:0] internal_axi_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:644" *) reg internal_axi_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:643" *) reg internal_axi_write_ready = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:506" *) reg [63:0] last_axi_read_data = 64'h0000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:458" *) reg [15:0] last_watchdog_value = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:134" *) output [15:0] pl_ps_interrupts; wire [15:0] pl_ps_interrupts; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:498" *) wire read_addr_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) reg [15:0] read_bram_address_input = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) reg [15:0] \read_bram_address_input$241 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) reg [15:0] \read_bram_address_input$255 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) reg [15:0] \read_bram_address_input$269 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) reg [15:0] \read_bram_address_input$283 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) reg [15:0] \read_bram_address_input$297 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) reg [15:0] \read_bram_address_input$311 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) reg [15:0] \read_bram_address_input$325 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:158" *) reg [15:0] \read_bram_address_input$343 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:159" *) wire [15:0] read_bram_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) wire [15:0] \read_bram_address_output$242 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) wire [15:0] \read_bram_address_output$256 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) wire [15:0] \read_bram_address_output$270 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) wire [15:0] \read_bram_address_output$284 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) wire [15:0] \read_bram_address_output$298 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) wire [15:0] \read_bram_address_output$312 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) wire [15:0] \read_bram_address_output$326 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) wire [15:0] \read_bram_address_output$344 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:489" *) reg [9:0] read_bursts_remaining = 10'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) reg read_complete_input = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) reg \read_complete_input$251 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) reg \read_complete_input$265 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) reg \read_complete_input$279 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) reg \read_complete_input$293 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) reg \read_complete_input$307 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) reg \read_complete_input$321 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) reg \read_complete_input$335 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:164" *) reg \read_complete_input$349 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:165" *) wire read_complete_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) wire \read_complete_output$252 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) wire \read_complete_output$266 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) wire \read_complete_output$280 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) wire \read_complete_output$294 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) wire \read_complete_output$308 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) wire \read_complete_output$322 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) wire \read_complete_output$336 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) wire \read_complete_output$350 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:491" *) reg [3:0] read_current_burst = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) reg [7:0] read_node_address_input = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) reg [7:0] \read_node_address_input$245 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) reg [7:0] \read_node_address_input$259 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) reg [7:0] \read_node_address_input$273 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) reg [7:0] \read_node_address_input$287 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) reg [7:0] \read_node_address_input$301 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) reg [7:0] \read_node_address_input$315 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) reg [7:0] \read_node_address_input$329 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:154" *) reg [7:0] \read_node_address_input$339 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:155" *) wire [7:0] read_node_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) wire [7:0] \read_node_address_output$246 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) wire [7:0] \read_node_address_output$260 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) wire [7:0] \read_node_address_output$274 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) wire [7:0] \read_node_address_output$288 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) wire [7:0] \read_node_address_output$302 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) wire [7:0] \read_node_address_output$316 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) wire [7:0] \read_node_address_output$330 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) wire [7:0] \read_node_address_output$340 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:486" *) reg [2:0] read_stage = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:54" *) input reset; wire reset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:39" *) wire [9:0] rs422_rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:39" *) wire [9:0] \rs422_rx$204 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:40" *) wire [9:0] rs422_tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:40" *) wire [9:0] \rs422_tx$205 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:35" *) wire [9:0] rs485_rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:36" *) wire [9:0] rs485_tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:37" *) wire [9:0] rs485_tx_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:28" *) wire [1:0] rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:29" *) wire [5:0] \rx$197 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) wire \rx$203 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) wire \rx$207 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) wire \rx$209 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) wire \rx$211 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:18" *) wire [21:0] slotIn; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:18" *) wire [21:0] \slotIn$190 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:16" *) wire [21:0] slotOut; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:16" *) wire [21:0] \slotOut$191 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:17" *) wire [21:0] slotOutEnable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:17" *) wire [21:0] \slotOutEnable$192 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:120" *) input [21:0] slot_A_in; wire [21:0] slot_A_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:121" *) output [21:0] slot_A_out; wire [21:0] slot_A_out; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:122" *) output [21:0] slot_A_out_enable; wire [21:0] slot_A_out_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:18" *) input [21:0] slot_B_in; wire [21:0] slot_B_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:16" *) output [21:0] slot_B_out; wire [21:0] slot_B_out; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:17" *) output [21:0] slot_B_out_enable; wire [21:0] slot_B_out_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:18" *) input [21:0] slot_C_in; wire [21:0] slot_C_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:16" *) output [21:0] slot_C_out; wire [21:0] slot_C_out; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:17" *) output [21:0] slot_C_out_enable; wire [21:0] slot_C_out_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:129" *) input [21:0] slot_D_in; wire [21:0] slot_D_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:131" *) output [21:0] slot_D_out; wire [21:0] slot_D_out; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:131" *) output [21:0] slot_D_out_enable; wire [21:0] slot_D_out_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:169" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:453" *) wire [31:0] status; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:269" *) wire sync_25_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:269" *) wire sync_25_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:268" *) wire sync_50_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:268" *) wire sync_50_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:508" *) reg [63:0] timed_axi_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:26" *) wire [1:0] tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:27" *) wire [5:0] \tx$200 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:39" *) wire \tx$206 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:39" *) wire \tx$208 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:39" *) wire \tx$210 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:39" *) wire \tx$212 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:28" *) wire [5:0] tx_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:459" *) reg [7:0] watchdog_counter = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:457" *) reg [15:0] watchdog_register = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:493" *) wire write_addr_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) reg [15:0] write_bram_address_input = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) reg [15:0] \write_bram_address_input$243 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) reg [15:0] \write_bram_address_input$257 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) reg [15:0] \write_bram_address_input$271 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) reg [15:0] \write_bram_address_input$285 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) reg [15:0] \write_bram_address_input$299 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) reg [15:0] \write_bram_address_input$313 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) reg [15:0] \write_bram_address_input$327 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:160" *) reg [15:0] \write_bram_address_input$345 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:161" *) wire [15:0] write_bram_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) wire [15:0] \write_bram_address_output$244 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) wire [15:0] \write_bram_address_output$258 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) wire [15:0] \write_bram_address_output$272 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) wire [15:0] \write_bram_address_output$286 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) wire [15:0] \write_bram_address_output$300 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) wire [15:0] \write_bram_address_output$314 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) wire [15:0] \write_bram_address_output$328 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) wire [15:0] \write_bram_address_output$346 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:488" *) reg [9:0] write_bursts_remaining = 10'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) reg write_complete_input = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) reg \write_complete_input$253 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) reg \write_complete_input$267 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) reg \write_complete_input$281 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) reg \write_complete_input$295 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) reg \write_complete_input$309 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) reg \write_complete_input$323 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) reg \write_complete_input$337 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:166" *) reg \write_complete_input$351 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:167" *) wire write_complete_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) wire \write_complete_output$254 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) wire \write_complete_output$268 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) wire \write_complete_output$282 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) wire \write_complete_output$296 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) wire \write_complete_output$310 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) wire \write_complete_output$324 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) wire \write_complete_output$338 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) wire \write_complete_output$352 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:490" *) reg [3:0] write_current_burst = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:494" *) wire write_data_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) reg [7:0] write_node_address_input = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) reg [7:0] \write_node_address_input$247 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) reg [7:0] \write_node_address_input$261 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) reg [7:0] \write_node_address_input$275 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) reg [7:0] \write_node_address_input$289 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) reg [7:0] \write_node_address_input$303 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) reg [7:0] \write_node_address_input$317 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) reg [7:0] \write_node_address_input$331 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:156" *) reg [7:0] \write_node_address_input$341 = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:157" *) wire [7:0] write_node_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) wire [7:0] \write_node_address_output$248 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) wire [7:0] \write_node_address_output$262 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) wire [7:0] \write_node_address_output$276 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) wire [7:0] \write_node_address_output$290 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) wire [7:0] \write_node_address_output$304 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) wire [7:0] \write_node_address_output$318 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) wire [7:0] \write_node_address_output$332 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) wire [7:0] \write_node_address_output$342 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:479" *) reg [1:0] write_stage = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:273" *) reg [31:0] data_memory_read [1023:0]; initial begin data_memory_read[0] = 32'd0; data_memory_read[1] = 32'd0; data_memory_read[2] = 32'd0; data_memory_read[3] = 32'd0; data_memory_read[4] = 32'd0; data_memory_read[5] = 32'd0; data_memory_read[6] = 32'd0; data_memory_read[7] = 32'd0; data_memory_read[8] = 32'd0; data_memory_read[9] = 32'd0; data_memory_read[10] = 32'd0; data_memory_read[11] = 32'd0; data_memory_read[12] = 32'd0; data_memory_read[13] = 32'd0; data_memory_read[14] = 32'd0; data_memory_read[15] = 32'd0; data_memory_read[16] = 32'd0; data_memory_read[17] = 32'd0; data_memory_read[18] = 32'd0; data_memory_read[19] = 32'd0; data_memory_read[20] = 32'd0; data_memory_read[21] = 32'd0; data_memory_read[22] = 32'd0; data_memory_read[23] = 32'd0; data_memory_read[24] = 32'd0; data_memory_read[25] = 32'd0; data_memory_read[26] = 32'd0; data_memory_read[27] = 32'd0; data_memory_read[28] = 32'd0; data_memory_read[29] = 32'd0; data_memory_read[30] = 32'd0; data_memory_read[31] = 32'd0; data_memory_read[32] = 32'd0; data_memory_read[33] = 32'd0; data_memory_read[34] = 32'd0; data_memory_read[35] = 32'd0; data_memory_read[36] = 32'd0; data_memory_read[37] = 32'd0; data_memory_read[38] = 32'd0; data_memory_read[39] = 32'd0; data_memory_read[40] = 32'd0; data_memory_read[41] = 32'd0; data_memory_read[42] = 32'd0; data_memory_read[43] = 32'd0; data_memory_read[44] = 32'd0; data_memory_read[45] = 32'd0; data_memory_read[46] = 32'd0; data_memory_read[47] = 32'd0; data_memory_read[48] = 32'd0; data_memory_read[49] = 32'd0; data_memory_read[50] = 32'd0; data_memory_read[51] = 32'd0; data_memory_read[52] = 32'd0; data_memory_read[53] = 32'd0; data_memory_read[54] = 32'd0; data_memory_read[55] = 32'd0; data_memory_read[56] = 32'd0; data_memory_read[57] = 32'd0; data_memory_read[58] = 32'd0; data_memory_read[59] = 32'd0; data_memory_read[60] = 32'd0; data_memory_read[61] = 32'd0; data_memory_read[62] = 32'd0; data_memory_read[63] = 32'd0; data_memory_read[64] = 32'd0; data_memory_read[65] = 32'd0; data_memory_read[66] = 32'd0; data_memory_read[67] = 32'd0; data_memory_read[68] = 32'd0; data_memory_read[69] = 32'd0; data_memory_read[70] = 32'd0; data_memory_read[71] = 32'd0; data_memory_read[72] = 32'd0; data_memory_read[73] = 32'd0; data_memory_read[74] = 32'd0; data_memory_read[75] = 32'd0; data_memory_read[76] = 32'd0; data_memory_read[77] = 32'd0; data_memory_read[78] = 32'd0; data_memory_read[79] = 32'd0; data_memory_read[80] = 32'd0; data_memory_read[81] = 32'd0; data_memory_read[82] = 32'd0; data_memory_read[83] = 32'd0; data_memory_read[84] = 32'd0; data_memory_read[85] = 32'd0; data_memory_read[86] = 32'd0; data_memory_read[87] = 32'd0; data_memory_read[88] = 32'd0; data_memory_read[89] = 32'd0; data_memory_read[90] = 32'd0; data_memory_read[91] = 32'd0; data_memory_read[92] = 32'd0; data_memory_read[93] = 32'd0; data_memory_read[94] = 32'd0; data_memory_read[95] = 32'd0; data_memory_read[96] = 32'd0; data_memory_read[97] = 32'd0; data_memory_read[98] = 32'd0; data_memory_read[99] = 32'd0; data_memory_read[100] = 32'd0; data_memory_read[101] = 32'd0; data_memory_read[102] = 32'd0; data_memory_read[103] = 32'd0; data_memory_read[104] = 32'd0; data_memory_read[105] = 32'd0; data_memory_read[106] = 32'd0; data_memory_read[107] = 32'd0; data_memory_read[108] = 32'd0; data_memory_read[109] = 32'd0; data_memory_read[110] = 32'd0; data_memory_read[111] = 32'd0; data_memory_read[112] = 32'd0; data_memory_read[113] = 32'd0; data_memory_read[114] = 32'd0; data_memory_read[115] = 32'd0; data_memory_read[116] = 32'd0; data_memory_read[117] = 32'd0; data_memory_read[118] = 32'd0; data_memory_read[119] = 32'd0; data_memory_read[120] = 32'd0; data_memory_read[121] = 32'd0; data_memory_read[122] = 32'd0; data_memory_read[123] = 32'd0; data_memory_read[124] = 32'd0; data_memory_read[125] = 32'd0; data_memory_read[126] = 32'd0; data_memory_read[127] = 32'd0; data_memory_read[128] = 32'd0; data_memory_read[129] = 32'd0; data_memory_read[130] = 32'd0; data_memory_read[131] = 32'd0; data_memory_read[132] = 32'd0; data_memory_read[133] = 32'd0; data_memory_read[134] = 32'd0; data_memory_read[135] = 32'd0; data_memory_read[136] = 32'd0; data_memory_read[137] = 32'd0; data_memory_read[138] = 32'd0; data_memory_read[139] = 32'd0; data_memory_read[140] = 32'd0; data_memory_read[141] = 32'd0; data_memory_read[142] = 32'd0; data_memory_read[143] = 32'd0; data_memory_read[144] = 32'd0; data_memory_read[145] = 32'd0; data_memory_read[146] = 32'd0; data_memory_read[147] = 32'd0; data_memory_read[148] = 32'd0; data_memory_read[149] = 32'd0; data_memory_read[150] = 32'd0; data_memory_read[151] = 32'd0; data_memory_read[152] = 32'd0; data_memory_read[153] = 32'd0; data_memory_read[154] = 32'd0; data_memory_read[155] = 32'd0; data_memory_read[156] = 32'd0; data_memory_read[157] = 32'd0; data_memory_read[158] = 32'd0; data_memory_read[159] = 32'd0; data_memory_read[160] = 32'd0; data_memory_read[161] = 32'd0; data_memory_read[162] = 32'd0; data_memory_read[163] = 32'd0; data_memory_read[164] = 32'd0; data_memory_read[165] = 32'd0; data_memory_read[166] = 32'd0; data_memory_read[167] = 32'd0; data_memory_read[168] = 32'd0; data_memory_read[169] = 32'd0; data_memory_read[170] = 32'd0; data_memory_read[171] = 32'd0; data_memory_read[172] = 32'd0; data_memory_read[173] = 32'd0; data_memory_read[174] = 32'd0; data_memory_read[175] = 32'd0; data_memory_read[176] = 32'd0; data_memory_read[177] = 32'd0; data_memory_read[178] = 32'd0; data_memory_read[179] = 32'd0; data_memory_read[180] = 32'd0; data_memory_read[181] = 32'd0; data_memory_read[182] = 32'd0; data_memory_read[183] = 32'd0; data_memory_read[184] = 32'd0; data_memory_read[185] = 32'd0; data_memory_read[186] = 32'd0; data_memory_read[187] = 32'd0; data_memory_read[188] = 32'd0; data_memory_read[189] = 32'd0; data_memory_read[190] = 32'd0; data_memory_read[191] = 32'd0; data_memory_read[192] = 32'd0; data_memory_read[193] = 32'd0; data_memory_read[194] = 32'd0; data_memory_read[195] = 32'd0; data_memory_read[196] = 32'd0; data_memory_read[197] = 32'd0; data_memory_read[198] = 32'd0; data_memory_read[199] = 32'd0; data_memory_read[200] = 32'd0; data_memory_read[201] = 32'd0; data_memory_read[202] = 32'd0; data_memory_read[203] = 32'd0; data_memory_read[204] = 32'd0; data_memory_read[205] = 32'd0; data_memory_read[206] = 32'd0; data_memory_read[207] = 32'd0; data_memory_read[208] = 32'd0; data_memory_read[209] = 32'd0; data_memory_read[210] = 32'd0; data_memory_read[211] = 32'd0; data_memory_read[212] = 32'd0; data_memory_read[213] = 32'd0; data_memory_read[214] = 32'd0; data_memory_read[215] = 32'd0; data_memory_read[216] = 32'd0; data_memory_read[217] = 32'd0; data_memory_read[218] = 32'd0; data_memory_read[219] = 32'd0; data_memory_read[220] = 32'd0; data_memory_read[221] = 32'd0; data_memory_read[222] = 32'd0; data_memory_read[223] = 32'd0; data_memory_read[224] = 32'd0; data_memory_read[225] = 32'd0; data_memory_read[226] = 32'd0; data_memory_read[227] = 32'd0; data_memory_read[228] = 32'd0; data_memory_read[229] = 32'd0; data_memory_read[230] = 32'd0; data_memory_read[231] = 32'd0; data_memory_read[232] = 32'd0; data_memory_read[233] = 32'd0; data_memory_read[234] = 32'd0; data_memory_read[235] = 32'd0; data_memory_read[236] = 32'd0; data_memory_read[237] = 32'd0; data_memory_read[238] = 32'd0; data_memory_read[239] = 32'd0; data_memory_read[240] = 32'd0; data_memory_read[241] = 32'd0; data_memory_read[242] = 32'd0; data_memory_read[243] = 32'd0; data_memory_read[244] = 32'd0; data_memory_read[245] = 32'd0; data_memory_read[246] = 32'd0; data_memory_read[247] = 32'd0; data_memory_read[248] = 32'd0; data_memory_read[249] = 32'd0; data_memory_read[250] = 32'd0; data_memory_read[251] = 32'd0; data_memory_read[252] = 32'd0; data_memory_read[253] = 32'd0; data_memory_read[254] = 32'd0; data_memory_read[255] = 32'd0; data_memory_read[256] = 32'd0; data_memory_read[257] = 32'd0; data_memory_read[258] = 32'd0; data_memory_read[259] = 32'd0; data_memory_read[260] = 32'd0; data_memory_read[261] = 32'd0; data_memory_read[262] = 32'd0; data_memory_read[263] = 32'd0; data_memory_read[264] = 32'd0; data_memory_read[265] = 32'd0; data_memory_read[266] = 32'd0; data_memory_read[267] = 32'd0; data_memory_read[268] = 32'd0; data_memory_read[269] = 32'd0; data_memory_read[270] = 32'd0; data_memory_read[271] = 32'd0; data_memory_read[272] = 32'd0; data_memory_read[273] = 32'd0; data_memory_read[274] = 32'd0; data_memory_read[275] = 32'd0; data_memory_read[276] = 32'd0; data_memory_read[277] = 32'd0; data_memory_read[278] = 32'd0; data_memory_read[279] = 32'd0; data_memory_read[280] = 32'd0; data_memory_read[281] = 32'd0; data_memory_read[282] = 32'd0; data_memory_read[283] = 32'd0; data_memory_read[284] = 32'd0; data_memory_read[285] = 32'd0; data_memory_read[286] = 32'd0; data_memory_read[287] = 32'd0; data_memory_read[288] = 32'd0; data_memory_read[289] = 32'd0; data_memory_read[290] = 32'd0; data_memory_read[291] = 32'd0; data_memory_read[292] = 32'd0; data_memory_read[293] = 32'd0; data_memory_read[294] = 32'd0; data_memory_read[295] = 32'd0; data_memory_read[296] = 32'd0; data_memory_read[297] = 32'd0; data_memory_read[298] = 32'd0; data_memory_read[299] = 32'd0; data_memory_read[300] = 32'd0; data_memory_read[301] = 32'd0; data_memory_read[302] = 32'd0; data_memory_read[303] = 32'd0; data_memory_read[304] = 32'd0; data_memory_read[305] = 32'd0; data_memory_read[306] = 32'd0; data_memory_read[307] = 32'd0; data_memory_read[308] = 32'd0; data_memory_read[309] = 32'd0; data_memory_read[310] = 32'd0; data_memory_read[311] = 32'd0; data_memory_read[312] = 32'd0; data_memory_read[313] = 32'd0; data_memory_read[314] = 32'd0; data_memory_read[315] = 32'd0; data_memory_read[316] = 32'd0; data_memory_read[317] = 32'd0; data_memory_read[318] = 32'd0; data_memory_read[319] = 32'd0; data_memory_read[320] = 32'd0; data_memory_read[321] = 32'd0; data_memory_read[322] = 32'd0; data_memory_read[323] = 32'd0; data_memory_read[324] = 32'd0; data_memory_read[325] = 32'd0; data_memory_read[326] = 32'd0; data_memory_read[327] = 32'd0; data_memory_read[328] = 32'd0; data_memory_read[329] = 32'd0; data_memory_read[330] = 32'd0; data_memory_read[331] = 32'd0; data_memory_read[332] = 32'd0; data_memory_read[333] = 32'd0; data_memory_read[334] = 32'd0; data_memory_read[335] = 32'd0; data_memory_read[336] = 32'd0; data_memory_read[337] = 32'd0; data_memory_read[338] = 32'd0; data_memory_read[339] = 32'd0; data_memory_read[340] = 32'd0; data_memory_read[341] = 32'd0; data_memory_read[342] = 32'd0; data_memory_read[343] = 32'd0; data_memory_read[344] = 32'd0; data_memory_read[345] = 32'd0; data_memory_read[346] = 32'd0; data_memory_read[347] = 32'd0; data_memory_read[348] = 32'd0; data_memory_read[349] = 32'd0; data_memory_read[350] = 32'd0; data_memory_read[351] = 32'd0; data_memory_read[352] = 32'd0; data_memory_read[353] = 32'd0; data_memory_read[354] = 32'd0; data_memory_read[355] = 32'd0; data_memory_read[356] = 32'd0; data_memory_read[357] = 32'd0; data_memory_read[358] = 32'd0; data_memory_read[359] = 32'd0; data_memory_read[360] = 32'd0; data_memory_read[361] = 32'd0; data_memory_read[362] = 32'd0; data_memory_read[363] = 32'd0; data_memory_read[364] = 32'd0; data_memory_read[365] = 32'd0; data_memory_read[366] = 32'd0; data_memory_read[367] = 32'd0; data_memory_read[368] = 32'd0; data_memory_read[369] = 32'd0; data_memory_read[370] = 32'd0; data_memory_read[371] = 32'd0; data_memory_read[372] = 32'd0; data_memory_read[373] = 32'd0; data_memory_read[374] = 32'd0; data_memory_read[375] = 32'd0; data_memory_read[376] = 32'd0; data_memory_read[377] = 32'd0; data_memory_read[378] = 32'd0; data_memory_read[379] = 32'd0; data_memory_read[380] = 32'd0; data_memory_read[381] = 32'd0; data_memory_read[382] = 32'd0; data_memory_read[383] = 32'd0; data_memory_read[384] = 32'd0; data_memory_read[385] = 32'd0; data_memory_read[386] = 32'd0; data_memory_read[387] = 32'd0; data_memory_read[388] = 32'd0; data_memory_read[389] = 32'd0; data_memory_read[390] = 32'd0; data_memory_read[391] = 32'd0; data_memory_read[392] = 32'd0; data_memory_read[393] = 32'd0; data_memory_read[394] = 32'd0; data_memory_read[395] = 32'd0; data_memory_read[396] = 32'd0; data_memory_read[397] = 32'd0; data_memory_read[398] = 32'd0; data_memory_read[399] = 32'd0; data_memory_read[400] = 32'd0; data_memory_read[401] = 32'd0; data_memory_read[402] = 32'd0; data_memory_read[403] = 32'd0; data_memory_read[404] = 32'd0; data_memory_read[405] = 32'd0; data_memory_read[406] = 32'd0; data_memory_read[407] = 32'd0; data_memory_read[408] = 32'd0; data_memory_read[409] = 32'd0; data_memory_read[410] = 32'd0; data_memory_read[411] = 32'd0; data_memory_read[412] = 32'd0; data_memory_read[413] = 32'd0; data_memory_read[414] = 32'd0; data_memory_read[415] = 32'd0; data_memory_read[416] = 32'd0; data_memory_read[417] = 32'd0; data_memory_read[418] = 32'd0; data_memory_read[419] = 32'd0; data_memory_read[420] = 32'd0; data_memory_read[421] = 32'd0; data_memory_read[422] = 32'd0; data_memory_read[423] = 32'd0; data_memory_read[424] = 32'd0; data_memory_read[425] = 32'd0; data_memory_read[426] = 32'd0; data_memory_read[427] = 32'd0; data_memory_read[428] = 32'd0; data_memory_read[429] = 32'd0; data_memory_read[430] = 32'd0; data_memory_read[431] = 32'd0; data_memory_read[432] = 32'd0; data_memory_read[433] = 32'd0; data_memory_read[434] = 32'd0; data_memory_read[435] = 32'd0; data_memory_read[436] = 32'd0; data_memory_read[437] = 32'd0; data_memory_read[438] = 32'd0; data_memory_read[439] = 32'd0; data_memory_read[440] = 32'd0; data_memory_read[441] = 32'd0; data_memory_read[442] = 32'd0; data_memory_read[443] = 32'd0; data_memory_read[444] = 32'd0; data_memory_read[445] = 32'd0; data_memory_read[446] = 32'd0; data_memory_read[447] = 32'd0; data_memory_read[448] = 32'd0; data_memory_read[449] = 32'd0; data_memory_read[450] = 32'd0; data_memory_read[451] = 32'd0; data_memory_read[452] = 32'd0; data_memory_read[453] = 32'd0; data_memory_read[454] = 32'd0; data_memory_read[455] = 32'd0; data_memory_read[456] = 32'd0; data_memory_read[457] = 32'd0; data_memory_read[458] = 32'd0; data_memory_read[459] = 32'd0; data_memory_read[460] = 32'd0; data_memory_read[461] = 32'd0; data_memory_read[462] = 32'd0; data_memory_read[463] = 32'd0; data_memory_read[464] = 32'd0; data_memory_read[465] = 32'd0; data_memory_read[466] = 32'd0; data_memory_read[467] = 32'd0; data_memory_read[468] = 32'd0; data_memory_read[469] = 32'd0; data_memory_read[470] = 32'd0; data_memory_read[471] = 32'd0; data_memory_read[472] = 32'd0; data_memory_read[473] = 32'd0; data_memory_read[474] = 32'd0; data_memory_read[475] = 32'd0; data_memory_read[476] = 32'd0; data_memory_read[477] = 32'd0; data_memory_read[478] = 32'd0; data_memory_read[479] = 32'd0; data_memory_read[480] = 32'd0; data_memory_read[481] = 32'd0; data_memory_read[482] = 32'd0; data_memory_read[483] = 32'd0; data_memory_read[484] = 32'd0; data_memory_read[485] = 32'd0; data_memory_read[486] = 32'd0; data_memory_read[487] = 32'd0; data_memory_read[488] = 32'd0; data_memory_read[489] = 32'd0; data_memory_read[490] = 32'd0; data_memory_read[491] = 32'd0; data_memory_read[492] = 32'd0; data_memory_read[493] = 32'd0; data_memory_read[494] = 32'd0; data_memory_read[495] = 32'd0; data_memory_read[496] = 32'd0; data_memory_read[497] = 32'd0; data_memory_read[498] = 32'd0; data_memory_read[499] = 32'd0; data_memory_read[500] = 32'd0; data_memory_read[501] = 32'd0; data_memory_read[502] = 32'd0; data_memory_read[503] = 32'd0; data_memory_read[504] = 32'd0; data_memory_read[505] = 32'd0; data_memory_read[506] = 32'd0; data_memory_read[507] = 32'd0; data_memory_read[508] = 32'd0; data_memory_read[509] = 32'd0; data_memory_read[510] = 32'd0; data_memory_read[511] = 32'd0; data_memory_read[512] = 32'd0; data_memory_read[513] = 32'd0; data_memory_read[514] = 32'd0; data_memory_read[515] = 32'd0; data_memory_read[516] = 32'd0; data_memory_read[517] = 32'd0; data_memory_read[518] = 32'd0; data_memory_read[519] = 32'd0; data_memory_read[520] = 32'd0; data_memory_read[521] = 32'd0; data_memory_read[522] = 32'd0; data_memory_read[523] = 32'd0; data_memory_read[524] = 32'd0; data_memory_read[525] = 32'd0; data_memory_read[526] = 32'd0; data_memory_read[527] = 32'd0; data_memory_read[528] = 32'd0; data_memory_read[529] = 32'd0; data_memory_read[530] = 32'd0; data_memory_read[531] = 32'd0; data_memory_read[532] = 32'd0; data_memory_read[533] = 32'd0; data_memory_read[534] = 32'd0; data_memory_read[535] = 32'd0; data_memory_read[536] = 32'd0; data_memory_read[537] = 32'd0; data_memory_read[538] = 32'd0; data_memory_read[539] = 32'd0; data_memory_read[540] = 32'd0; data_memory_read[541] = 32'd0; data_memory_read[542] = 32'd0; data_memory_read[543] = 32'd0; data_memory_read[544] = 32'd0; data_memory_read[545] = 32'd0; data_memory_read[546] = 32'd0; data_memory_read[547] = 32'd0; data_memory_read[548] = 32'd0; data_memory_read[549] = 32'd0; data_memory_read[550] = 32'd0; data_memory_read[551] = 32'd0; data_memory_read[552] = 32'd0; data_memory_read[553] = 32'd0; data_memory_read[554] = 32'd0; data_memory_read[555] = 32'd0; data_memory_read[556] = 32'd0; data_memory_read[557] = 32'd0; data_memory_read[558] = 32'd0; data_memory_read[559] = 32'd0; data_memory_read[560] = 32'd0; data_memory_read[561] = 32'd0; data_memory_read[562] = 32'd0; data_memory_read[563] = 32'd0; data_memory_read[564] = 32'd0; data_memory_read[565] = 32'd0; data_memory_read[566] = 32'd0; data_memory_read[567] = 32'd0; data_memory_read[568] = 32'd0; data_memory_read[569] = 32'd0; data_memory_read[570] = 32'd0; data_memory_read[571] = 32'd0; data_memory_read[572] = 32'd0; data_memory_read[573] = 32'd0; data_memory_read[574] = 32'd0; data_memory_read[575] = 32'd0; data_memory_read[576] = 32'd0; data_memory_read[577] = 32'd0; data_memory_read[578] = 32'd0; data_memory_read[579] = 32'd0; data_memory_read[580] = 32'd0; data_memory_read[581] = 32'd0; data_memory_read[582] = 32'd0; data_memory_read[583] = 32'd0; data_memory_read[584] = 32'd0; data_memory_read[585] = 32'd0; data_memory_read[586] = 32'd0; data_memory_read[587] = 32'd0; data_memory_read[588] = 32'd0; data_memory_read[589] = 32'd0; data_memory_read[590] = 32'd0; data_memory_read[591] = 32'd0; data_memory_read[592] = 32'd0; data_memory_read[593] = 32'd0; data_memory_read[594] = 32'd0; data_memory_read[595] = 32'd0; data_memory_read[596] = 32'd0; data_memory_read[597] = 32'd0; data_memory_read[598] = 32'd0; data_memory_read[599] = 32'd0; data_memory_read[600] = 32'd0; data_memory_read[601] = 32'd0; data_memory_read[602] = 32'd0; data_memory_read[603] = 32'd0; data_memory_read[604] = 32'd0; data_memory_read[605] = 32'd0; data_memory_read[606] = 32'd0; data_memory_read[607] = 32'd0; data_memory_read[608] = 32'd0; data_memory_read[609] = 32'd0; data_memory_read[610] = 32'd0; data_memory_read[611] = 32'd0; data_memory_read[612] = 32'd0; data_memory_read[613] = 32'd0; data_memory_read[614] = 32'd0; data_memory_read[615] = 32'd0; data_memory_read[616] = 32'd0; data_memory_read[617] = 32'd0; data_memory_read[618] = 32'd0; data_memory_read[619] = 32'd0; data_memory_read[620] = 32'd0; data_memory_read[621] = 32'd0; data_memory_read[622] = 32'd0; data_memory_read[623] = 32'd0; data_memory_read[624] = 32'd0; data_memory_read[625] = 32'd0; data_memory_read[626] = 32'd0; data_memory_read[627] = 32'd0; data_memory_read[628] = 32'd0; data_memory_read[629] = 32'd0; data_memory_read[630] = 32'd0; data_memory_read[631] = 32'd0; data_memory_read[632] = 32'd0; data_memory_read[633] = 32'd0; data_memory_read[634] = 32'd0; data_memory_read[635] = 32'd0; data_memory_read[636] = 32'd0; data_memory_read[637] = 32'd0; data_memory_read[638] = 32'd0; data_memory_read[639] = 32'd0; data_memory_read[640] = 32'd0; data_memory_read[641] = 32'd0; data_memory_read[642] = 32'd0; data_memory_read[643] = 32'd0; data_memory_read[644] = 32'd0; data_memory_read[645] = 32'd0; data_memory_read[646] = 32'd0; data_memory_read[647] = 32'd0; data_memory_read[648] = 32'd0; data_memory_read[649] = 32'd0; data_memory_read[650] = 32'd0; data_memory_read[651] = 32'd0; data_memory_read[652] = 32'd0; data_memory_read[653] = 32'd0; data_memory_read[654] = 32'd0; data_memory_read[655] = 32'd0; data_memory_read[656] = 32'd0; data_memory_read[657] = 32'd0; data_memory_read[658] = 32'd0; data_memory_read[659] = 32'd0; data_memory_read[660] = 32'd0; data_memory_read[661] = 32'd0; data_memory_read[662] = 32'd0; data_memory_read[663] = 32'd0; data_memory_read[664] = 32'd0; data_memory_read[665] = 32'd0; data_memory_read[666] = 32'd0; data_memory_read[667] = 32'd0; data_memory_read[668] = 32'd0; data_memory_read[669] = 32'd0; data_memory_read[670] = 32'd0; data_memory_read[671] = 32'd0; data_memory_read[672] = 32'd0; data_memory_read[673] = 32'd0; data_memory_read[674] = 32'd0; data_memory_read[675] = 32'd0; data_memory_read[676] = 32'd0; data_memory_read[677] = 32'd0; data_memory_read[678] = 32'd0; data_memory_read[679] = 32'd0; data_memory_read[680] = 32'd0; data_memory_read[681] = 32'd0; data_memory_read[682] = 32'd0; data_memory_read[683] = 32'd0; data_memory_read[684] = 32'd0; data_memory_read[685] = 32'd0; data_memory_read[686] = 32'd0; data_memory_read[687] = 32'd0; data_memory_read[688] = 32'd0; data_memory_read[689] = 32'd0; data_memory_read[690] = 32'd0; data_memory_read[691] = 32'd0; data_memory_read[692] = 32'd0; data_memory_read[693] = 32'd0; data_memory_read[694] = 32'd0; data_memory_read[695] = 32'd0; data_memory_read[696] = 32'd0; data_memory_read[697] = 32'd0; data_memory_read[698] = 32'd0; data_memory_read[699] = 32'd0; data_memory_read[700] = 32'd0; data_memory_read[701] = 32'd0; data_memory_read[702] = 32'd0; data_memory_read[703] = 32'd0; data_memory_read[704] = 32'd0; data_memory_read[705] = 32'd0; data_memory_read[706] = 32'd0; data_memory_read[707] = 32'd0; data_memory_read[708] = 32'd0; data_memory_read[709] = 32'd0; data_memory_read[710] = 32'd0; data_memory_read[711] = 32'd0; data_memory_read[712] = 32'd0; data_memory_read[713] = 32'd0; data_memory_read[714] = 32'd0; data_memory_read[715] = 32'd0; data_memory_read[716] = 32'd0; data_memory_read[717] = 32'd0; data_memory_read[718] = 32'd0; data_memory_read[719] = 32'd0; data_memory_read[720] = 32'd0; data_memory_read[721] = 32'd0; data_memory_read[722] = 32'd0; data_memory_read[723] = 32'd0; data_memory_read[724] = 32'd0; data_memory_read[725] = 32'd0; data_memory_read[726] = 32'd0; data_memory_read[727] = 32'd0; data_memory_read[728] = 32'd0; data_memory_read[729] = 32'd0; data_memory_read[730] = 32'd0; data_memory_read[731] = 32'd0; data_memory_read[732] = 32'd0; data_memory_read[733] = 32'd0; data_memory_read[734] = 32'd0; data_memory_read[735] = 32'd0; data_memory_read[736] = 32'd0; data_memory_read[737] = 32'd0; data_memory_read[738] = 32'd0; data_memory_read[739] = 32'd0; data_memory_read[740] = 32'd0; data_memory_read[741] = 32'd0; data_memory_read[742] = 32'd0; data_memory_read[743] = 32'd0; data_memory_read[744] = 32'd0; data_memory_read[745] = 32'd0; data_memory_read[746] = 32'd0; data_memory_read[747] = 32'd0; data_memory_read[748] = 32'd0; data_memory_read[749] = 32'd0; data_memory_read[750] = 32'd0; data_memory_read[751] = 32'd0; data_memory_read[752] = 32'd0; data_memory_read[753] = 32'd0; data_memory_read[754] = 32'd0; data_memory_read[755] = 32'd0; data_memory_read[756] = 32'd0; data_memory_read[757] = 32'd0; data_memory_read[758] = 32'd0; data_memory_read[759] = 32'd0; data_memory_read[760] = 32'd0; data_memory_read[761] = 32'd0; data_memory_read[762] = 32'd0; data_memory_read[763] = 32'd0; data_memory_read[764] = 32'd0; data_memory_read[765] = 32'd0; data_memory_read[766] = 32'd0; data_memory_read[767] = 32'd0; data_memory_read[768] = 32'd0; data_memory_read[769] = 32'd0; data_memory_read[770] = 32'd0; data_memory_read[771] = 32'd0; data_memory_read[772] = 32'd0; data_memory_read[773] = 32'd0; data_memory_read[774] = 32'd0; data_memory_read[775] = 32'd0; data_memory_read[776] = 32'd0; data_memory_read[777] = 32'd0; data_memory_read[778] = 32'd0; data_memory_read[779] = 32'd0; data_memory_read[780] = 32'd0; data_memory_read[781] = 32'd0; data_memory_read[782] = 32'd0; data_memory_read[783] = 32'd0; data_memory_read[784] = 32'd0; data_memory_read[785] = 32'd0; data_memory_read[786] = 32'd0; data_memory_read[787] = 32'd0; data_memory_read[788] = 32'd0; data_memory_read[789] = 32'd0; data_memory_read[790] = 32'd0; data_memory_read[791] = 32'd0; data_memory_read[792] = 32'd0; data_memory_read[793] = 32'd0; data_memory_read[794] = 32'd0; data_memory_read[795] = 32'd0; data_memory_read[796] = 32'd0; data_memory_read[797] = 32'd0; data_memory_read[798] = 32'd0; data_memory_read[799] = 32'd0; data_memory_read[800] = 32'd0; data_memory_read[801] = 32'd0; data_memory_read[802] = 32'd0; data_memory_read[803] = 32'd0; data_memory_read[804] = 32'd0; data_memory_read[805] = 32'd0; data_memory_read[806] = 32'd0; data_memory_read[807] = 32'd0; data_memory_read[808] = 32'd0; data_memory_read[809] = 32'd0; data_memory_read[810] = 32'd0; data_memory_read[811] = 32'd0; data_memory_read[812] = 32'd0; data_memory_read[813] = 32'd0; data_memory_read[814] = 32'd0; data_memory_read[815] = 32'd0; data_memory_read[816] = 32'd0; data_memory_read[817] = 32'd0; data_memory_read[818] = 32'd0; data_memory_read[819] = 32'd0; data_memory_read[820] = 32'd0; data_memory_read[821] = 32'd0; data_memory_read[822] = 32'd0; data_memory_read[823] = 32'd0; data_memory_read[824] = 32'd0; data_memory_read[825] = 32'd0; data_memory_read[826] = 32'd0; data_memory_read[827] = 32'd0; data_memory_read[828] = 32'd0; data_memory_read[829] = 32'd0; data_memory_read[830] = 32'd0; data_memory_read[831] = 32'd0; data_memory_read[832] = 32'd0; data_memory_read[833] = 32'd0; data_memory_read[834] = 32'd0; data_memory_read[835] = 32'd0; data_memory_read[836] = 32'd0; data_memory_read[837] = 32'd0; data_memory_read[838] = 32'd0; data_memory_read[839] = 32'd0; data_memory_read[840] = 32'd0; data_memory_read[841] = 32'd0; data_memory_read[842] = 32'd0; data_memory_read[843] = 32'd0; data_memory_read[844] = 32'd0; data_memory_read[845] = 32'd0; data_memory_read[846] = 32'd0; data_memory_read[847] = 32'd0; data_memory_read[848] = 32'd0; data_memory_read[849] = 32'd0; data_memory_read[850] = 32'd0; data_memory_read[851] = 32'd0; data_memory_read[852] = 32'd0; data_memory_read[853] = 32'd0; data_memory_read[854] = 32'd0; data_memory_read[855] = 32'd0; data_memory_read[856] = 32'd0; data_memory_read[857] = 32'd0; data_memory_read[858] = 32'd0; data_memory_read[859] = 32'd0; data_memory_read[860] = 32'd0; data_memory_read[861] = 32'd0; data_memory_read[862] = 32'd0; data_memory_read[863] = 32'd0; data_memory_read[864] = 32'd0; data_memory_read[865] = 32'd0; data_memory_read[866] = 32'd0; data_memory_read[867] = 32'd0; data_memory_read[868] = 32'd0; data_memory_read[869] = 32'd0; data_memory_read[870] = 32'd0; data_memory_read[871] = 32'd0; data_memory_read[872] = 32'd0; data_memory_read[873] = 32'd0; data_memory_read[874] = 32'd0; data_memory_read[875] = 32'd0; data_memory_read[876] = 32'd0; data_memory_read[877] = 32'd0; data_memory_read[878] = 32'd0; data_memory_read[879] = 32'd0; data_memory_read[880] = 32'd0; data_memory_read[881] = 32'd0; data_memory_read[882] = 32'd0; data_memory_read[883] = 32'd0; data_memory_read[884] = 32'd0; data_memory_read[885] = 32'd0; data_memory_read[886] = 32'd0; data_memory_read[887] = 32'd0; data_memory_read[888] = 32'd0; data_memory_read[889] = 32'd0; data_memory_read[890] = 32'd0; data_memory_read[891] = 32'd0; data_memory_read[892] = 32'd0; data_memory_read[893] = 32'd0; data_memory_read[894] = 32'd0; data_memory_read[895] = 32'd0; data_memory_read[896] = 32'd0; data_memory_read[897] = 32'd0; data_memory_read[898] = 32'd0; data_memory_read[899] = 32'd0; data_memory_read[900] = 32'd0; data_memory_read[901] = 32'd0; data_memory_read[902] = 32'd0; data_memory_read[903] = 32'd0; data_memory_read[904] = 32'd0; data_memory_read[905] = 32'd0; data_memory_read[906] = 32'd0; data_memory_read[907] = 32'd0; data_memory_read[908] = 32'd0; data_memory_read[909] = 32'd0; data_memory_read[910] = 32'd0; data_memory_read[911] = 32'd0; data_memory_read[912] = 32'd0; data_memory_read[913] = 32'd0; data_memory_read[914] = 32'd0; data_memory_read[915] = 32'd0; data_memory_read[916] = 32'd0; data_memory_read[917] = 32'd0; data_memory_read[918] = 32'd0; data_memory_read[919] = 32'd0; data_memory_read[920] = 32'd0; data_memory_read[921] = 32'd0; data_memory_read[922] = 32'd0; data_memory_read[923] = 32'd0; data_memory_read[924] = 32'd0; data_memory_read[925] = 32'd0; data_memory_read[926] = 32'd0; data_memory_read[927] = 32'd0; data_memory_read[928] = 32'd0; data_memory_read[929] = 32'd0; data_memory_read[930] = 32'd0; data_memory_read[931] = 32'd0; data_memory_read[932] = 32'd0; data_memory_read[933] = 32'd0; data_memory_read[934] = 32'd0; data_memory_read[935] = 32'd0; data_memory_read[936] = 32'd0; data_memory_read[937] = 32'd0; data_memory_read[938] = 32'd0; data_memory_read[939] = 32'd0; data_memory_read[940] = 32'd0; data_memory_read[941] = 32'd0; data_memory_read[942] = 32'd0; data_memory_read[943] = 32'd0; data_memory_read[944] = 32'd0; data_memory_read[945] = 32'd0; data_memory_read[946] = 32'd0; data_memory_read[947] = 32'd0; data_memory_read[948] = 32'd0; data_memory_read[949] = 32'd0; data_memory_read[950] = 32'd0; data_memory_read[951] = 32'd0; data_memory_read[952] = 32'd0; data_memory_read[953] = 32'd0; data_memory_read[954] = 32'd0; data_memory_read[955] = 32'd0; data_memory_read[956] = 32'd0; data_memory_read[957] = 32'd0; data_memory_read[958] = 32'd0; data_memory_read[959] = 32'd0; data_memory_read[960] = 32'd0; data_memory_read[961] = 32'd0; data_memory_read[962] = 32'd0; data_memory_read[963] = 32'd0; data_memory_read[964] = 32'd0; data_memory_read[965] = 32'd0; data_memory_read[966] = 32'd0; data_memory_read[967] = 32'd0; data_memory_read[968] = 32'd0; data_memory_read[969] = 32'd0; data_memory_read[970] = 32'd0; data_memory_read[971] = 32'd0; data_memory_read[972] = 32'd0; data_memory_read[973] = 32'd0; data_memory_read[974] = 32'd0; data_memory_read[975] = 32'd0; data_memory_read[976] = 32'd0; data_memory_read[977] = 32'd0; data_memory_read[978] = 32'd0; data_memory_read[979] = 32'd0; data_memory_read[980] = 32'd0; data_memory_read[981] = 32'd0; data_memory_read[982] = 32'd0; data_memory_read[983] = 32'd0; data_memory_read[984] = 32'd0; data_memory_read[985] = 32'd0; data_memory_read[986] = 32'd0; data_memory_read[987] = 32'd0; data_memory_read[988] = 32'd0; data_memory_read[989] = 32'd0; data_memory_read[990] = 32'd0; data_memory_read[991] = 32'd0; data_memory_read[992] = 32'd0; data_memory_read[993] = 32'd0; data_memory_read[994] = 32'd0; data_memory_read[995] = 32'd0; data_memory_read[996] = 32'd0; data_memory_read[997] = 32'd0; data_memory_read[998] = 32'd0; data_memory_read[999] = 32'd0; data_memory_read[1000] = 32'd0; data_memory_read[1001] = 32'd0; data_memory_read[1002] = 32'd0; data_memory_read[1003] = 32'd0; data_memory_read[1004] = 32'd0; data_memory_read[1005] = 32'd0; data_memory_read[1006] = 32'd0; data_memory_read[1007] = 32'd0; data_memory_read[1008] = 32'd0; data_memory_read[1009] = 32'd0; data_memory_read[1010] = 32'd0; data_memory_read[1011] = 32'd0; data_memory_read[1012] = 32'd0; data_memory_read[1013] = 32'd0; data_memory_read[1014] = 32'd0; data_memory_read[1015] = 32'd0; data_memory_read[1016] = 32'd0; data_memory_read[1017] = 32'd0; data_memory_read[1018] = 32'd0; data_memory_read[1019] = 32'd0; data_memory_read[1020] = 32'd0; data_memory_read[1021] = 32'd0; data_memory_read[1022] = 32'd0; data_memory_read[1023] = 32'd0; end always @(posedge clk_100M) begin if (data_read_write_port_dma__en) data_memory_read[data_read_read_port_dma__addr] <= data_read_write_port_dma__data; end reg [31:0] _0_; reg [31:0] _1_; always @(posedge clk_100M) begin _0_ <= data_memory_read[data_read_port_axi__addr]; _1_ <= data_memory_read[data_read_read_port_dma__addr]; end assign data_read_port_axi__data = _0_; assign data_read_dma_read_data = _1_; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:274" *) reg [31:0] data_memory_write [1023:0]; initial begin data_memory_write[0] = 32'd0; data_memory_write[1] = 32'd0; data_memory_write[2] = 32'd0; data_memory_write[3] = 32'd0; data_memory_write[4] = 32'd0; data_memory_write[5] = 32'd0; data_memory_write[6] = 32'd0; data_memory_write[7] = 32'd0; data_memory_write[8] = 32'd0; data_memory_write[9] = 32'd0; data_memory_write[10] = 32'd0; data_memory_write[11] = 32'd0; data_memory_write[12] = 32'd0; data_memory_write[13] = 32'd0; data_memory_write[14] = 32'd0; data_memory_write[15] = 32'd0; data_memory_write[16] = 32'd0; data_memory_write[17] = 32'd0; data_memory_write[18] = 32'd0; data_memory_write[19] = 32'd0; data_memory_write[20] = 32'd0; data_memory_write[21] = 32'd0; data_memory_write[22] = 32'd0; data_memory_write[23] = 32'd0; data_memory_write[24] = 32'd0; data_memory_write[25] = 32'd0; data_memory_write[26] = 32'd0; data_memory_write[27] = 32'd0; data_memory_write[28] = 32'd0; data_memory_write[29] = 32'd0; data_memory_write[30] = 32'd0; data_memory_write[31] = 32'd0; data_memory_write[32] = 32'd0; data_memory_write[33] = 32'd0; data_memory_write[34] = 32'd0; data_memory_write[35] = 32'd0; data_memory_write[36] = 32'd0; data_memory_write[37] = 32'd0; data_memory_write[38] = 32'd0; data_memory_write[39] = 32'd0; data_memory_write[40] = 32'd0; data_memory_write[41] = 32'd0; data_memory_write[42] = 32'd0; data_memory_write[43] = 32'd0; data_memory_write[44] = 32'd0; data_memory_write[45] = 32'd0; data_memory_write[46] = 32'd0; data_memory_write[47] = 32'd0; data_memory_write[48] = 32'd0; data_memory_write[49] = 32'd0; data_memory_write[50] = 32'd0; data_memory_write[51] = 32'd0; data_memory_write[52] = 32'd0; data_memory_write[53] = 32'd0; data_memory_write[54] = 32'd0; data_memory_write[55] = 32'd0; data_memory_write[56] = 32'd0; data_memory_write[57] = 32'd0; data_memory_write[58] = 32'd0; data_memory_write[59] = 32'd0; data_memory_write[60] = 32'd0; data_memory_write[61] = 32'd0; data_memory_write[62] = 32'd0; data_memory_write[63] = 32'd0; data_memory_write[64] = 32'd0; data_memory_write[65] = 32'd0; data_memory_write[66] = 32'd0; data_memory_write[67] = 32'd0; data_memory_write[68] = 32'd0; data_memory_write[69] = 32'd0; data_memory_write[70] = 32'd0; data_memory_write[71] = 32'd0; data_memory_write[72] = 32'd0; data_memory_write[73] = 32'd0; data_memory_write[74] = 32'd0; data_memory_write[75] = 32'd0; data_memory_write[76] = 32'd0; data_memory_write[77] = 32'd0; data_memory_write[78] = 32'd0; data_memory_write[79] = 32'd0; data_memory_write[80] = 32'd0; data_memory_write[81] = 32'd0; data_memory_write[82] = 32'd0; data_memory_write[83] = 32'd0; data_memory_write[84] = 32'd0; data_memory_write[85] = 32'd0; data_memory_write[86] = 32'd0; data_memory_write[87] = 32'd0; data_memory_write[88] = 32'd0; data_memory_write[89] = 32'd0; data_memory_write[90] = 32'd0; data_memory_write[91] = 32'd0; data_memory_write[92] = 32'd0; data_memory_write[93] = 32'd0; data_memory_write[94] = 32'd0; data_memory_write[95] = 32'd0; data_memory_write[96] = 32'd0; data_memory_write[97] = 32'd0; data_memory_write[98] = 32'd0; data_memory_write[99] = 32'd0; data_memory_write[100] = 32'd0; data_memory_write[101] = 32'd0; data_memory_write[102] = 32'd0; data_memory_write[103] = 32'd0; data_memory_write[104] = 32'd0; data_memory_write[105] = 32'd0; data_memory_write[106] = 32'd0; data_memory_write[107] = 32'd0; data_memory_write[108] = 32'd0; data_memory_write[109] = 32'd0; data_memory_write[110] = 32'd0; data_memory_write[111] = 32'd0; data_memory_write[112] = 32'd0; data_memory_write[113] = 32'd0; data_memory_write[114] = 32'd0; data_memory_write[115] = 32'd0; data_memory_write[116] = 32'd0; data_memory_write[117] = 32'd0; data_memory_write[118] = 32'd0; data_memory_write[119] = 32'd0; data_memory_write[120] = 32'd0; data_memory_write[121] = 32'd0; data_memory_write[122] = 32'd0; data_memory_write[123] = 32'd0; data_memory_write[124] = 32'd0; data_memory_write[125] = 32'd0; data_memory_write[126] = 32'd0; data_memory_write[127] = 32'd0; data_memory_write[128] = 32'd0; data_memory_write[129] = 32'd0; data_memory_write[130] = 32'd0; data_memory_write[131] = 32'd0; data_memory_write[132] = 32'd0; data_memory_write[133] = 32'd0; data_memory_write[134] = 32'd0; data_memory_write[135] = 32'd0; data_memory_write[136] = 32'd0; data_memory_write[137] = 32'd0; data_memory_write[138] = 32'd0; data_memory_write[139] = 32'd0; data_memory_write[140] = 32'd0; data_memory_write[141] = 32'd0; data_memory_write[142] = 32'd0; data_memory_write[143] = 32'd0; data_memory_write[144] = 32'd0; data_memory_write[145] = 32'd0; data_memory_write[146] = 32'd0; data_memory_write[147] = 32'd0; data_memory_write[148] = 32'd0; data_memory_write[149] = 32'd0; data_memory_write[150] = 32'd0; data_memory_write[151] = 32'd0; data_memory_write[152] = 32'd0; data_memory_write[153] = 32'd0; data_memory_write[154] = 32'd0; data_memory_write[155] = 32'd0; data_memory_write[156] = 32'd0; data_memory_write[157] = 32'd0; data_memory_write[158] = 32'd0; data_memory_write[159] = 32'd0; data_memory_write[160] = 32'd0; data_memory_write[161] = 32'd0; data_memory_write[162] = 32'd0; data_memory_write[163] = 32'd0; data_memory_write[164] = 32'd0; data_memory_write[165] = 32'd0; data_memory_write[166] = 32'd0; data_memory_write[167] = 32'd0; data_memory_write[168] = 32'd0; data_memory_write[169] = 32'd0; data_memory_write[170] = 32'd0; data_memory_write[171] = 32'd0; data_memory_write[172] = 32'd0; data_memory_write[173] = 32'd0; data_memory_write[174] = 32'd0; data_memory_write[175] = 32'd0; data_memory_write[176] = 32'd0; data_memory_write[177] = 32'd0; data_memory_write[178] = 32'd0; data_memory_write[179] = 32'd0; data_memory_write[180] = 32'd0; data_memory_write[181] = 32'd0; data_memory_write[182] = 32'd0; data_memory_write[183] = 32'd0; data_memory_write[184] = 32'd0; data_memory_write[185] = 32'd0; data_memory_write[186] = 32'd0; data_memory_write[187] = 32'd0; data_memory_write[188] = 32'd0; data_memory_write[189] = 32'd0; data_memory_write[190] = 32'd0; data_memory_write[191] = 32'd0; data_memory_write[192] = 32'd0; data_memory_write[193] = 32'd0; data_memory_write[194] = 32'd0; data_memory_write[195] = 32'd0; data_memory_write[196] = 32'd0; data_memory_write[197] = 32'd0; data_memory_write[198] = 32'd0; data_memory_write[199] = 32'd0; data_memory_write[200] = 32'd0; data_memory_write[201] = 32'd0; data_memory_write[202] = 32'd0; data_memory_write[203] = 32'd0; data_memory_write[204] = 32'd0; data_memory_write[205] = 32'd0; data_memory_write[206] = 32'd0; data_memory_write[207] = 32'd0; data_memory_write[208] = 32'd0; data_memory_write[209] = 32'd0; data_memory_write[210] = 32'd0; data_memory_write[211] = 32'd0; data_memory_write[212] = 32'd0; data_memory_write[213] = 32'd0; data_memory_write[214] = 32'd0; data_memory_write[215] = 32'd0; data_memory_write[216] = 32'd0; data_memory_write[217] = 32'd0; data_memory_write[218] = 32'd0; data_memory_write[219] = 32'd0; data_memory_write[220] = 32'd0; data_memory_write[221] = 32'd0; data_memory_write[222] = 32'd0; data_memory_write[223] = 32'd0; data_memory_write[224] = 32'd0; data_memory_write[225] = 32'd0; data_memory_write[226] = 32'd0; data_memory_write[227] = 32'd0; data_memory_write[228] = 32'd0; data_memory_write[229] = 32'd0; data_memory_write[230] = 32'd0; data_memory_write[231] = 32'd0; data_memory_write[232] = 32'd0; data_memory_write[233] = 32'd0; data_memory_write[234] = 32'd0; data_memory_write[235] = 32'd0; data_memory_write[236] = 32'd0; data_memory_write[237] = 32'd0; data_memory_write[238] = 32'd0; data_memory_write[239] = 32'd0; data_memory_write[240] = 32'd0; data_memory_write[241] = 32'd0; data_memory_write[242] = 32'd0; data_memory_write[243] = 32'd0; data_memory_write[244] = 32'd0; data_memory_write[245] = 32'd0; data_memory_write[246] = 32'd0; data_memory_write[247] = 32'd0; data_memory_write[248] = 32'd0; data_memory_write[249] = 32'd0; data_memory_write[250] = 32'd0; data_memory_write[251] = 32'd0; data_memory_write[252] = 32'd0; data_memory_write[253] = 32'd0; data_memory_write[254] = 32'd0; data_memory_write[255] = 32'd0; data_memory_write[256] = 32'd0; data_memory_write[257] = 32'd0; data_memory_write[258] = 32'd0; data_memory_write[259] = 32'd0; data_memory_write[260] = 32'd0; data_memory_write[261] = 32'd0; data_memory_write[262] = 32'd0; data_memory_write[263] = 32'd0; data_memory_write[264] = 32'd0; data_memory_write[265] = 32'd0; data_memory_write[266] = 32'd0; data_memory_write[267] = 32'd0; data_memory_write[268] = 32'd0; data_memory_write[269] = 32'd0; data_memory_write[270] = 32'd0; data_memory_write[271] = 32'd0; data_memory_write[272] = 32'd0; data_memory_write[273] = 32'd0; data_memory_write[274] = 32'd0; data_memory_write[275] = 32'd0; data_memory_write[276] = 32'd0; data_memory_write[277] = 32'd0; data_memory_write[278] = 32'd0; data_memory_write[279] = 32'd0; data_memory_write[280] = 32'd0; data_memory_write[281] = 32'd0; data_memory_write[282] = 32'd0; data_memory_write[283] = 32'd0; data_memory_write[284] = 32'd0; data_memory_write[285] = 32'd0; data_memory_write[286] = 32'd0; data_memory_write[287] = 32'd0; data_memory_write[288] = 32'd0; data_memory_write[289] = 32'd0; data_memory_write[290] = 32'd0; data_memory_write[291] = 32'd0; data_memory_write[292] = 32'd0; data_memory_write[293] = 32'd0; data_memory_write[294] = 32'd0; data_memory_write[295] = 32'd0; data_memory_write[296] = 32'd0; data_memory_write[297] = 32'd0; data_memory_write[298] = 32'd0; data_memory_write[299] = 32'd0; data_memory_write[300] = 32'd0; data_memory_write[301] = 32'd0; data_memory_write[302] = 32'd0; data_memory_write[303] = 32'd0; data_memory_write[304] = 32'd0; data_memory_write[305] = 32'd0; data_memory_write[306] = 32'd0; data_memory_write[307] = 32'd0; data_memory_write[308] = 32'd0; data_memory_write[309] = 32'd0; data_memory_write[310] = 32'd0; data_memory_write[311] = 32'd0; data_memory_write[312] = 32'd0; data_memory_write[313] = 32'd0; data_memory_write[314] = 32'd0; data_memory_write[315] = 32'd0; data_memory_write[316] = 32'd0; data_memory_write[317] = 32'd0; data_memory_write[318] = 32'd0; data_memory_write[319] = 32'd0; data_memory_write[320] = 32'd0; data_memory_write[321] = 32'd0; data_memory_write[322] = 32'd0; data_memory_write[323] = 32'd0; data_memory_write[324] = 32'd0; data_memory_write[325] = 32'd0; data_memory_write[326] = 32'd0; data_memory_write[327] = 32'd0; data_memory_write[328] = 32'd0; data_memory_write[329] = 32'd0; data_memory_write[330] = 32'd0; data_memory_write[331] = 32'd0; data_memory_write[332] = 32'd0; data_memory_write[333] = 32'd0; data_memory_write[334] = 32'd0; data_memory_write[335] = 32'd0; data_memory_write[336] = 32'd0; data_memory_write[337] = 32'd0; data_memory_write[338] = 32'd0; data_memory_write[339] = 32'd0; data_memory_write[340] = 32'd0; data_memory_write[341] = 32'd0; data_memory_write[342] = 32'd0; data_memory_write[343] = 32'd0; data_memory_write[344] = 32'd0; data_memory_write[345] = 32'd0; data_memory_write[346] = 32'd0; data_memory_write[347] = 32'd0; data_memory_write[348] = 32'd0; data_memory_write[349] = 32'd0; data_memory_write[350] = 32'd0; data_memory_write[351] = 32'd0; data_memory_write[352] = 32'd0; data_memory_write[353] = 32'd0; data_memory_write[354] = 32'd0; data_memory_write[355] = 32'd0; data_memory_write[356] = 32'd0; data_memory_write[357] = 32'd0; data_memory_write[358] = 32'd0; data_memory_write[359] = 32'd0; data_memory_write[360] = 32'd0; data_memory_write[361] = 32'd0; data_memory_write[362] = 32'd0; data_memory_write[363] = 32'd0; data_memory_write[364] = 32'd0; data_memory_write[365] = 32'd0; data_memory_write[366] = 32'd0; data_memory_write[367] = 32'd0; data_memory_write[368] = 32'd0; data_memory_write[369] = 32'd0; data_memory_write[370] = 32'd0; data_memory_write[371] = 32'd0; data_memory_write[372] = 32'd0; data_memory_write[373] = 32'd0; data_memory_write[374] = 32'd0; data_memory_write[375] = 32'd0; data_memory_write[376] = 32'd0; data_memory_write[377] = 32'd0; data_memory_write[378] = 32'd0; data_memory_write[379] = 32'd0; data_memory_write[380] = 32'd0; data_memory_write[381] = 32'd0; data_memory_write[382] = 32'd0; data_memory_write[383] = 32'd0; data_memory_write[384] = 32'd0; data_memory_write[385] = 32'd0; data_memory_write[386] = 32'd0; data_memory_write[387] = 32'd0; data_memory_write[388] = 32'd0; data_memory_write[389] = 32'd0; data_memory_write[390] = 32'd0; data_memory_write[391] = 32'd0; data_memory_write[392] = 32'd0; data_memory_write[393] = 32'd0; data_memory_write[394] = 32'd0; data_memory_write[395] = 32'd0; data_memory_write[396] = 32'd0; data_memory_write[397] = 32'd0; data_memory_write[398] = 32'd0; data_memory_write[399] = 32'd0; data_memory_write[400] = 32'd0; data_memory_write[401] = 32'd0; data_memory_write[402] = 32'd0; data_memory_write[403] = 32'd0; data_memory_write[404] = 32'd0; data_memory_write[405] = 32'd0; data_memory_write[406] = 32'd0; data_memory_write[407] = 32'd0; data_memory_write[408] = 32'd0; data_memory_write[409] = 32'd0; data_memory_write[410] = 32'd0; data_memory_write[411] = 32'd0; data_memory_write[412] = 32'd0; data_memory_write[413] = 32'd0; data_memory_write[414] = 32'd0; data_memory_write[415] = 32'd0; data_memory_write[416] = 32'd0; data_memory_write[417] = 32'd0; data_memory_write[418] = 32'd0; data_memory_write[419] = 32'd0; data_memory_write[420] = 32'd0; data_memory_write[421] = 32'd0; data_memory_write[422] = 32'd0; data_memory_write[423] = 32'd0; data_memory_write[424] = 32'd0; data_memory_write[425] = 32'd0; data_memory_write[426] = 32'd0; data_memory_write[427] = 32'd0; data_memory_write[428] = 32'd0; data_memory_write[429] = 32'd0; data_memory_write[430] = 32'd0; data_memory_write[431] = 32'd0; data_memory_write[432] = 32'd0; data_memory_write[433] = 32'd0; data_memory_write[434] = 32'd0; data_memory_write[435] = 32'd0; data_memory_write[436] = 32'd0; data_memory_write[437] = 32'd0; data_memory_write[438] = 32'd0; data_memory_write[439] = 32'd0; data_memory_write[440] = 32'd0; data_memory_write[441] = 32'd0; data_memory_write[442] = 32'd0; data_memory_write[443] = 32'd0; data_memory_write[444] = 32'd0; data_memory_write[445] = 32'd0; data_memory_write[446] = 32'd0; data_memory_write[447] = 32'd0; data_memory_write[448] = 32'd0; data_memory_write[449] = 32'd0; data_memory_write[450] = 32'd0; data_memory_write[451] = 32'd0; data_memory_write[452] = 32'd0; data_memory_write[453] = 32'd0; data_memory_write[454] = 32'd0; data_memory_write[455] = 32'd0; data_memory_write[456] = 32'd0; data_memory_write[457] = 32'd0; data_memory_write[458] = 32'd0; data_memory_write[459] = 32'd0; data_memory_write[460] = 32'd0; data_memory_write[461] = 32'd0; data_memory_write[462] = 32'd0; data_memory_write[463] = 32'd0; data_memory_write[464] = 32'd0; data_memory_write[465] = 32'd0; data_memory_write[466] = 32'd0; data_memory_write[467] = 32'd0; data_memory_write[468] = 32'd0; data_memory_write[469] = 32'd0; data_memory_write[470] = 32'd0; data_memory_write[471] = 32'd0; data_memory_write[472] = 32'd0; data_memory_write[473] = 32'd0; data_memory_write[474] = 32'd0; data_memory_write[475] = 32'd0; data_memory_write[476] = 32'd0; data_memory_write[477] = 32'd0; data_memory_write[478] = 32'd0; data_memory_write[479] = 32'd0; data_memory_write[480] = 32'd0; data_memory_write[481] = 32'd0; data_memory_write[482] = 32'd0; data_memory_write[483] = 32'd0; data_memory_write[484] = 32'd0; data_memory_write[485] = 32'd0; data_memory_write[486] = 32'd0; data_memory_write[487] = 32'd0; data_memory_write[488] = 32'd0; data_memory_write[489] = 32'd0; data_memory_write[490] = 32'd0; data_memory_write[491] = 32'd0; data_memory_write[492] = 32'd0; data_memory_write[493] = 32'd0; data_memory_write[494] = 32'd0; data_memory_write[495] = 32'd0; data_memory_write[496] = 32'd0; data_memory_write[497] = 32'd0; data_memory_write[498] = 32'd0; data_memory_write[499] = 32'd0; data_memory_write[500] = 32'd0; data_memory_write[501] = 32'd0; data_memory_write[502] = 32'd0; data_memory_write[503] = 32'd0; data_memory_write[504] = 32'd0; data_memory_write[505] = 32'd0; data_memory_write[506] = 32'd0; data_memory_write[507] = 32'd0; data_memory_write[508] = 32'd0; data_memory_write[509] = 32'd0; data_memory_write[510] = 32'd0; data_memory_write[511] = 32'd0; data_memory_write[512] = 32'd0; data_memory_write[513] = 32'd0; data_memory_write[514] = 32'd0; data_memory_write[515] = 32'd0; data_memory_write[516] = 32'd0; data_memory_write[517] = 32'd0; data_memory_write[518] = 32'd0; data_memory_write[519] = 32'd0; data_memory_write[520] = 32'd0; data_memory_write[521] = 32'd0; data_memory_write[522] = 32'd0; data_memory_write[523] = 32'd0; data_memory_write[524] = 32'd0; data_memory_write[525] = 32'd0; data_memory_write[526] = 32'd0; data_memory_write[527] = 32'd0; data_memory_write[528] = 32'd0; data_memory_write[529] = 32'd0; data_memory_write[530] = 32'd0; data_memory_write[531] = 32'd0; data_memory_write[532] = 32'd0; data_memory_write[533] = 32'd0; data_memory_write[534] = 32'd0; data_memory_write[535] = 32'd0; data_memory_write[536] = 32'd0; data_memory_write[537] = 32'd0; data_memory_write[538] = 32'd0; data_memory_write[539] = 32'd0; data_memory_write[540] = 32'd0; data_memory_write[541] = 32'd0; data_memory_write[542] = 32'd0; data_memory_write[543] = 32'd0; data_memory_write[544] = 32'd0; data_memory_write[545] = 32'd0; data_memory_write[546] = 32'd0; data_memory_write[547] = 32'd0; data_memory_write[548] = 32'd0; data_memory_write[549] = 32'd0; data_memory_write[550] = 32'd0; data_memory_write[551] = 32'd0; data_memory_write[552] = 32'd0; data_memory_write[553] = 32'd0; data_memory_write[554] = 32'd0; data_memory_write[555] = 32'd0; data_memory_write[556] = 32'd0; data_memory_write[557] = 32'd0; data_memory_write[558] = 32'd0; data_memory_write[559] = 32'd0; data_memory_write[560] = 32'd0; data_memory_write[561] = 32'd0; data_memory_write[562] = 32'd0; data_memory_write[563] = 32'd0; data_memory_write[564] = 32'd0; data_memory_write[565] = 32'd0; data_memory_write[566] = 32'd0; data_memory_write[567] = 32'd0; data_memory_write[568] = 32'd0; data_memory_write[569] = 32'd0; data_memory_write[570] = 32'd0; data_memory_write[571] = 32'd0; data_memory_write[572] = 32'd0; data_memory_write[573] = 32'd0; data_memory_write[574] = 32'd0; data_memory_write[575] = 32'd0; data_memory_write[576] = 32'd0; data_memory_write[577] = 32'd0; data_memory_write[578] = 32'd0; data_memory_write[579] = 32'd0; data_memory_write[580] = 32'd0; data_memory_write[581] = 32'd0; data_memory_write[582] = 32'd0; data_memory_write[583] = 32'd0; data_memory_write[584] = 32'd0; data_memory_write[585] = 32'd0; data_memory_write[586] = 32'd0; data_memory_write[587] = 32'd0; data_memory_write[588] = 32'd0; data_memory_write[589] = 32'd0; data_memory_write[590] = 32'd0; data_memory_write[591] = 32'd0; data_memory_write[592] = 32'd0; data_memory_write[593] = 32'd0; data_memory_write[594] = 32'd0; data_memory_write[595] = 32'd0; data_memory_write[596] = 32'd0; data_memory_write[597] = 32'd0; data_memory_write[598] = 32'd0; data_memory_write[599] = 32'd0; data_memory_write[600] = 32'd0; data_memory_write[601] = 32'd0; data_memory_write[602] = 32'd0; data_memory_write[603] = 32'd0; data_memory_write[604] = 32'd0; data_memory_write[605] = 32'd0; data_memory_write[606] = 32'd0; data_memory_write[607] = 32'd0; data_memory_write[608] = 32'd0; data_memory_write[609] = 32'd0; data_memory_write[610] = 32'd0; data_memory_write[611] = 32'd0; data_memory_write[612] = 32'd0; data_memory_write[613] = 32'd0; data_memory_write[614] = 32'd0; data_memory_write[615] = 32'd0; data_memory_write[616] = 32'd0; data_memory_write[617] = 32'd0; data_memory_write[618] = 32'd0; data_memory_write[619] = 32'd0; data_memory_write[620] = 32'd0; data_memory_write[621] = 32'd0; data_memory_write[622] = 32'd0; data_memory_write[623] = 32'd0; data_memory_write[624] = 32'd0; data_memory_write[625] = 32'd0; data_memory_write[626] = 32'd0; data_memory_write[627] = 32'd0; data_memory_write[628] = 32'd0; data_memory_write[629] = 32'd0; data_memory_write[630] = 32'd0; data_memory_write[631] = 32'd0; data_memory_write[632] = 32'd0; data_memory_write[633] = 32'd0; data_memory_write[634] = 32'd0; data_memory_write[635] = 32'd0; data_memory_write[636] = 32'd0; data_memory_write[637] = 32'd0; data_memory_write[638] = 32'd0; data_memory_write[639] = 32'd0; data_memory_write[640] = 32'd0; data_memory_write[641] = 32'd0; data_memory_write[642] = 32'd0; data_memory_write[643] = 32'd0; data_memory_write[644] = 32'd0; data_memory_write[645] = 32'd0; data_memory_write[646] = 32'd0; data_memory_write[647] = 32'd0; data_memory_write[648] = 32'd0; data_memory_write[649] = 32'd0; data_memory_write[650] = 32'd0; data_memory_write[651] = 32'd0; data_memory_write[652] = 32'd0; data_memory_write[653] = 32'd0; data_memory_write[654] = 32'd0; data_memory_write[655] = 32'd0; data_memory_write[656] = 32'd0; data_memory_write[657] = 32'd0; data_memory_write[658] = 32'd0; data_memory_write[659] = 32'd0; data_memory_write[660] = 32'd0; data_memory_write[661] = 32'd0; data_memory_write[662] = 32'd0; data_memory_write[663] = 32'd0; data_memory_write[664] = 32'd0; data_memory_write[665] = 32'd0; data_memory_write[666] = 32'd0; data_memory_write[667] = 32'd0; data_memory_write[668] = 32'd0; data_memory_write[669] = 32'd0; data_memory_write[670] = 32'd0; data_memory_write[671] = 32'd0; data_memory_write[672] = 32'd0; data_memory_write[673] = 32'd0; data_memory_write[674] = 32'd0; data_memory_write[675] = 32'd0; data_memory_write[676] = 32'd0; data_memory_write[677] = 32'd0; data_memory_write[678] = 32'd0; data_memory_write[679] = 32'd0; data_memory_write[680] = 32'd0; data_memory_write[681] = 32'd0; data_memory_write[682] = 32'd0; data_memory_write[683] = 32'd0; data_memory_write[684] = 32'd0; data_memory_write[685] = 32'd0; data_memory_write[686] = 32'd0; data_memory_write[687] = 32'd0; data_memory_write[688] = 32'd0; data_memory_write[689] = 32'd0; data_memory_write[690] = 32'd0; data_memory_write[691] = 32'd0; data_memory_write[692] = 32'd0; data_memory_write[693] = 32'd0; data_memory_write[694] = 32'd0; data_memory_write[695] = 32'd0; data_memory_write[696] = 32'd0; data_memory_write[697] = 32'd0; data_memory_write[698] = 32'd0; data_memory_write[699] = 32'd0; data_memory_write[700] = 32'd0; data_memory_write[701] = 32'd0; data_memory_write[702] = 32'd0; data_memory_write[703] = 32'd0; data_memory_write[704] = 32'd0; data_memory_write[705] = 32'd0; data_memory_write[706] = 32'd0; data_memory_write[707] = 32'd0; data_memory_write[708] = 32'd0; data_memory_write[709] = 32'd0; data_memory_write[710] = 32'd0; data_memory_write[711] = 32'd0; data_memory_write[712] = 32'd0; data_memory_write[713] = 32'd0; data_memory_write[714] = 32'd0; data_memory_write[715] = 32'd0; data_memory_write[716] = 32'd0; data_memory_write[717] = 32'd0; data_memory_write[718] = 32'd0; data_memory_write[719] = 32'd0; data_memory_write[720] = 32'd0; data_memory_write[721] = 32'd0; data_memory_write[722] = 32'd0; data_memory_write[723] = 32'd0; data_memory_write[724] = 32'd0; data_memory_write[725] = 32'd0; data_memory_write[726] = 32'd0; data_memory_write[727] = 32'd0; data_memory_write[728] = 32'd0; data_memory_write[729] = 32'd0; data_memory_write[730] = 32'd0; data_memory_write[731] = 32'd0; data_memory_write[732] = 32'd0; data_memory_write[733] = 32'd0; data_memory_write[734] = 32'd0; data_memory_write[735] = 32'd0; data_memory_write[736] = 32'd0; data_memory_write[737] = 32'd0; data_memory_write[738] = 32'd0; data_memory_write[739] = 32'd0; data_memory_write[740] = 32'd0; data_memory_write[741] = 32'd0; data_memory_write[742] = 32'd0; data_memory_write[743] = 32'd0; data_memory_write[744] = 32'd0; data_memory_write[745] = 32'd0; data_memory_write[746] = 32'd0; data_memory_write[747] = 32'd0; data_memory_write[748] = 32'd0; data_memory_write[749] = 32'd0; data_memory_write[750] = 32'd0; data_memory_write[751] = 32'd0; data_memory_write[752] = 32'd0; data_memory_write[753] = 32'd0; data_memory_write[754] = 32'd0; data_memory_write[755] = 32'd0; data_memory_write[756] = 32'd0; data_memory_write[757] = 32'd0; data_memory_write[758] = 32'd0; data_memory_write[759] = 32'd0; data_memory_write[760] = 32'd0; data_memory_write[761] = 32'd0; data_memory_write[762] = 32'd0; data_memory_write[763] = 32'd0; data_memory_write[764] = 32'd0; data_memory_write[765] = 32'd0; data_memory_write[766] = 32'd0; data_memory_write[767] = 32'd0; data_memory_write[768] = 32'd0; data_memory_write[769] = 32'd0; data_memory_write[770] = 32'd0; data_memory_write[771] = 32'd0; data_memory_write[772] = 32'd0; data_memory_write[773] = 32'd0; data_memory_write[774] = 32'd0; data_memory_write[775] = 32'd0; data_memory_write[776] = 32'd0; data_memory_write[777] = 32'd0; data_memory_write[778] = 32'd0; data_memory_write[779] = 32'd0; data_memory_write[780] = 32'd0; data_memory_write[781] = 32'd0; data_memory_write[782] = 32'd0; data_memory_write[783] = 32'd0; data_memory_write[784] = 32'd0; data_memory_write[785] = 32'd0; data_memory_write[786] = 32'd0; data_memory_write[787] = 32'd0; data_memory_write[788] = 32'd0; data_memory_write[789] = 32'd0; data_memory_write[790] = 32'd0; data_memory_write[791] = 32'd0; data_memory_write[792] = 32'd0; data_memory_write[793] = 32'd0; data_memory_write[794] = 32'd0; data_memory_write[795] = 32'd0; data_memory_write[796] = 32'd0; data_memory_write[797] = 32'd0; data_memory_write[798] = 32'd0; data_memory_write[799] = 32'd0; data_memory_write[800] = 32'd0; data_memory_write[801] = 32'd0; data_memory_write[802] = 32'd0; data_memory_write[803] = 32'd0; data_memory_write[804] = 32'd0; data_memory_write[805] = 32'd0; data_memory_write[806] = 32'd0; data_memory_write[807] = 32'd0; data_memory_write[808] = 32'd0; data_memory_write[809] = 32'd0; data_memory_write[810] = 32'd0; data_memory_write[811] = 32'd0; data_memory_write[812] = 32'd0; data_memory_write[813] = 32'd0; data_memory_write[814] = 32'd0; data_memory_write[815] = 32'd0; data_memory_write[816] = 32'd0; data_memory_write[817] = 32'd0; data_memory_write[818] = 32'd0; data_memory_write[819] = 32'd0; data_memory_write[820] = 32'd0; data_memory_write[821] = 32'd0; data_memory_write[822] = 32'd0; data_memory_write[823] = 32'd0; data_memory_write[824] = 32'd0; data_memory_write[825] = 32'd0; data_memory_write[826] = 32'd0; data_memory_write[827] = 32'd0; data_memory_write[828] = 32'd0; data_memory_write[829] = 32'd0; data_memory_write[830] = 32'd0; data_memory_write[831] = 32'd0; data_memory_write[832] = 32'd0; data_memory_write[833] = 32'd0; data_memory_write[834] = 32'd0; data_memory_write[835] = 32'd0; data_memory_write[836] = 32'd0; data_memory_write[837] = 32'd0; data_memory_write[838] = 32'd0; data_memory_write[839] = 32'd0; data_memory_write[840] = 32'd0; data_memory_write[841] = 32'd0; data_memory_write[842] = 32'd0; data_memory_write[843] = 32'd0; data_memory_write[844] = 32'd0; data_memory_write[845] = 32'd0; data_memory_write[846] = 32'd0; data_memory_write[847] = 32'd0; data_memory_write[848] = 32'd0; data_memory_write[849] = 32'd0; data_memory_write[850] = 32'd0; data_memory_write[851] = 32'd0; data_memory_write[852] = 32'd0; data_memory_write[853] = 32'd0; data_memory_write[854] = 32'd0; data_memory_write[855] = 32'd0; data_memory_write[856] = 32'd0; data_memory_write[857] = 32'd0; data_memory_write[858] = 32'd0; data_memory_write[859] = 32'd0; data_memory_write[860] = 32'd0; data_memory_write[861] = 32'd0; data_memory_write[862] = 32'd0; data_memory_write[863] = 32'd0; data_memory_write[864] = 32'd0; data_memory_write[865] = 32'd0; data_memory_write[866] = 32'd0; data_memory_write[867] = 32'd0; data_memory_write[868] = 32'd0; data_memory_write[869] = 32'd0; data_memory_write[870] = 32'd0; data_memory_write[871] = 32'd0; data_memory_write[872] = 32'd0; data_memory_write[873] = 32'd0; data_memory_write[874] = 32'd0; data_memory_write[875] = 32'd0; data_memory_write[876] = 32'd0; data_memory_write[877] = 32'd0; data_memory_write[878] = 32'd0; data_memory_write[879] = 32'd0; data_memory_write[880] = 32'd0; data_memory_write[881] = 32'd0; data_memory_write[882] = 32'd0; data_memory_write[883] = 32'd0; data_memory_write[884] = 32'd0; data_memory_write[885] = 32'd0; data_memory_write[886] = 32'd0; data_memory_write[887] = 32'd0; data_memory_write[888] = 32'd0; data_memory_write[889] = 32'd0; data_memory_write[890] = 32'd0; data_memory_write[891] = 32'd0; data_memory_write[892] = 32'd0; data_memory_write[893] = 32'd0; data_memory_write[894] = 32'd0; data_memory_write[895] = 32'd0; data_memory_write[896] = 32'd0; data_memory_write[897] = 32'd0; data_memory_write[898] = 32'd0; data_memory_write[899] = 32'd0; data_memory_write[900] = 32'd0; data_memory_write[901] = 32'd0; data_memory_write[902] = 32'd0; data_memory_write[903] = 32'd0; data_memory_write[904] = 32'd0; data_memory_write[905] = 32'd0; data_memory_write[906] = 32'd0; data_memory_write[907] = 32'd0; data_memory_write[908] = 32'd0; data_memory_write[909] = 32'd0; data_memory_write[910] = 32'd0; data_memory_write[911] = 32'd0; data_memory_write[912] = 32'd0; data_memory_write[913] = 32'd0; data_memory_write[914] = 32'd0; data_memory_write[915] = 32'd0; data_memory_write[916] = 32'd0; data_memory_write[917] = 32'd0; data_memory_write[918] = 32'd0; data_memory_write[919] = 32'd0; data_memory_write[920] = 32'd0; data_memory_write[921] = 32'd0; data_memory_write[922] = 32'd0; data_memory_write[923] = 32'd0; data_memory_write[924] = 32'd0; data_memory_write[925] = 32'd0; data_memory_write[926] = 32'd0; data_memory_write[927] = 32'd0; data_memory_write[928] = 32'd0; data_memory_write[929] = 32'd0; data_memory_write[930] = 32'd0; data_memory_write[931] = 32'd0; data_memory_write[932] = 32'd0; data_memory_write[933] = 32'd0; data_memory_write[934] = 32'd0; data_memory_write[935] = 32'd0; data_memory_write[936] = 32'd0; data_memory_write[937] = 32'd0; data_memory_write[938] = 32'd0; data_memory_write[939] = 32'd0; data_memory_write[940] = 32'd0; data_memory_write[941] = 32'd0; data_memory_write[942] = 32'd0; data_memory_write[943] = 32'd0; data_memory_write[944] = 32'd0; data_memory_write[945] = 32'd0; data_memory_write[946] = 32'd0; data_memory_write[947] = 32'd0; data_memory_write[948] = 32'd0; data_memory_write[949] = 32'd0; data_memory_write[950] = 32'd0; data_memory_write[951] = 32'd0; data_memory_write[952] = 32'd0; data_memory_write[953] = 32'd0; data_memory_write[954] = 32'd0; data_memory_write[955] = 32'd0; data_memory_write[956] = 32'd0; data_memory_write[957] = 32'd0; data_memory_write[958] = 32'd0; data_memory_write[959] = 32'd0; data_memory_write[960] = 32'd0; data_memory_write[961] = 32'd0; data_memory_write[962] = 32'd0; data_memory_write[963] = 32'd0; data_memory_write[964] = 32'd0; data_memory_write[965] = 32'd0; data_memory_write[966] = 32'd0; data_memory_write[967] = 32'd0; data_memory_write[968] = 32'd0; data_memory_write[969] = 32'd0; data_memory_write[970] = 32'd0; data_memory_write[971] = 32'd0; data_memory_write[972] = 32'd0; data_memory_write[973] = 32'd0; data_memory_write[974] = 32'd0; data_memory_write[975] = 32'd0; data_memory_write[976] = 32'd0; data_memory_write[977] = 32'd0; data_memory_write[978] = 32'd0; data_memory_write[979] = 32'd0; data_memory_write[980] = 32'd0; data_memory_write[981] = 32'd0; data_memory_write[982] = 32'd0; data_memory_write[983] = 32'd0; data_memory_write[984] = 32'd0; data_memory_write[985] = 32'd0; data_memory_write[986] = 32'd0; data_memory_write[987] = 32'd0; data_memory_write[988] = 32'd0; data_memory_write[989] = 32'd0; data_memory_write[990] = 32'd0; data_memory_write[991] = 32'd0; data_memory_write[992] = 32'd0; data_memory_write[993] = 32'd0; data_memory_write[994] = 32'd0; data_memory_write[995] = 32'd0; data_memory_write[996] = 32'd0; data_memory_write[997] = 32'd0; data_memory_write[998] = 32'd0; data_memory_write[999] = 32'd0; data_memory_write[1000] = 32'd0; data_memory_write[1001] = 32'd0; data_memory_write[1002] = 32'd0; data_memory_write[1003] = 32'd0; data_memory_write[1004] = 32'd0; data_memory_write[1005] = 32'd0; data_memory_write[1006] = 32'd0; data_memory_write[1007] = 32'd0; data_memory_write[1008] = 32'd0; data_memory_write[1009] = 32'd0; data_memory_write[1010] = 32'd0; data_memory_write[1011] = 32'd0; data_memory_write[1012] = 32'd0; data_memory_write[1013] = 32'd0; data_memory_write[1014] = 32'd0; data_memory_write[1015] = 32'd0; data_memory_write[1016] = 32'd0; data_memory_write[1017] = 32'd0; data_memory_write[1018] = 32'd0; data_memory_write[1019] = 32'd0; data_memory_write[1020] = 32'd0; data_memory_write[1021] = 32'd0; data_memory_write[1022] = 32'd0; data_memory_write[1023] = 32'd0; end always @(posedge clk_100M) begin if (data_write_write_port_dma__en) data_memory_write[data_write_read_port_dma__addr] <= data_write_write_port_dma__data; end always @(posedge clk_100M) begin if (data_write_port_axi__en) data_memory_write[data_write_port_axi__addr] <= data_write_port_axi__data; end reg [31:0] _2_; always @(posedge clk_100M) begin _2_ <= data_memory_write[data_write_read_port_dma__addr]; end assign data_write_dma_read_data = _2_; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:272" *) reg [63:0] instruction_memory [255:0]; initial begin instruction_memory[0] = 64'h0000000000000000; instruction_memory[1] = 64'h0000000000000000; instruction_memory[2] = 64'h0000000000000000; instruction_memory[3] = 64'h0000000000000000; instruction_memory[4] = 64'h0000000000000000; instruction_memory[5] = 64'h0000000000000000; instruction_memory[6] = 64'h0000000000000000; instruction_memory[7] = 64'h0000000000000000; instruction_memory[8] = 64'h0000000000000000; instruction_memory[9] = 64'h0000000000000000; instruction_memory[10] = 64'h0000000000000000; instruction_memory[11] = 64'h0000000000000000; instruction_memory[12] = 64'h0000000000000000; instruction_memory[13] = 64'h0000000000000000; instruction_memory[14] = 64'h0000000000000000; instruction_memory[15] = 64'h0000000000000000; instruction_memory[16] = 64'h0000000000000000; instruction_memory[17] = 64'h0000000000000000; instruction_memory[18] = 64'h0000000000000000; instruction_memory[19] = 64'h0000000000000000; instruction_memory[20] = 64'h0000000000000000; instruction_memory[21] = 64'h0000000000000000; instruction_memory[22] = 64'h0000000000000000; instruction_memory[23] = 64'h0000000000000000; instruction_memory[24] = 64'h0000000000000000; instruction_memory[25] = 64'h0000000000000000; instruction_memory[26] = 64'h0000000000000000; instruction_memory[27] = 64'h0000000000000000; instruction_memory[28] = 64'h0000000000000000; instruction_memory[29] = 64'h0000000000000000; instruction_memory[30] = 64'h0000000000000000; instruction_memory[31] = 64'h0000000000000000; instruction_memory[32] = 64'h0000000000000000; instruction_memory[33] = 64'h0000000000000000; instruction_memory[34] = 64'h0000000000000000; instruction_memory[35] = 64'h0000000000000000; instruction_memory[36] = 64'h0000000000000000; instruction_memory[37] = 64'h0000000000000000; instruction_memory[38] = 64'h0000000000000000; instruction_memory[39] = 64'h0000000000000000; instruction_memory[40] = 64'h0000000000000000; instruction_memory[41] = 64'h0000000000000000; instruction_memory[42] = 64'h0000000000000000; instruction_memory[43] = 64'h0000000000000000; instruction_memory[44] = 64'h0000000000000000; instruction_memory[45] = 64'h0000000000000000; instruction_memory[46] = 64'h0000000000000000; instruction_memory[47] = 64'h0000000000000000; instruction_memory[48] = 64'h0000000000000000; instruction_memory[49] = 64'h0000000000000000; instruction_memory[50] = 64'h0000000000000000; instruction_memory[51] = 64'h0000000000000000; instruction_memory[52] = 64'h0000000000000000; instruction_memory[53] = 64'h0000000000000000; instruction_memory[54] = 64'h0000000000000000; instruction_memory[55] = 64'h0000000000000000; instruction_memory[56] = 64'h0000000000000000; instruction_memory[57] = 64'h0000000000000000; instruction_memory[58] = 64'h0000000000000000; instruction_memory[59] = 64'h0000000000000000; instruction_memory[60] = 64'h0000000000000000; instruction_memory[61] = 64'h0000000000000000; instruction_memory[62] = 64'h0000000000000000; instruction_memory[63] = 64'h0000000000000000; instruction_memory[64] = 64'h0000000000000000; instruction_memory[65] = 64'h0000000000000000; instruction_memory[66] = 64'h0000000000000000; instruction_memory[67] = 64'h0000000000000000; instruction_memory[68] = 64'h0000000000000000; instruction_memory[69] = 64'h0000000000000000; instruction_memory[70] = 64'h0000000000000000; instruction_memory[71] = 64'h0000000000000000; instruction_memory[72] = 64'h0000000000000000; instruction_memory[73] = 64'h0000000000000000; instruction_memory[74] = 64'h0000000000000000; instruction_memory[75] = 64'h0000000000000000; instruction_memory[76] = 64'h0000000000000000; instruction_memory[77] = 64'h0000000000000000; instruction_memory[78] = 64'h0000000000000000; instruction_memory[79] = 64'h0000000000000000; instruction_memory[80] = 64'h0000000000000000; instruction_memory[81] = 64'h0000000000000000; instruction_memory[82] = 64'h0000000000000000; instruction_memory[83] = 64'h0000000000000000; instruction_memory[84] = 64'h0000000000000000; instruction_memory[85] = 64'h0000000000000000; instruction_memory[86] = 64'h0000000000000000; instruction_memory[87] = 64'h0000000000000000; instruction_memory[88] = 64'h0000000000000000; instruction_memory[89] = 64'h0000000000000000; instruction_memory[90] = 64'h0000000000000000; instruction_memory[91] = 64'h0000000000000000; instruction_memory[92] = 64'h0000000000000000; instruction_memory[93] = 64'h0000000000000000; instruction_memory[94] = 64'h0000000000000000; instruction_memory[95] = 64'h0000000000000000; instruction_memory[96] = 64'h0000000000000000; instruction_memory[97] = 64'h0000000000000000; instruction_memory[98] = 64'h0000000000000000; instruction_memory[99] = 64'h0000000000000000; instruction_memory[100] = 64'h0000000000000000; instruction_memory[101] = 64'h0000000000000000; instruction_memory[102] = 64'h0000000000000000; instruction_memory[103] = 64'h0000000000000000; instruction_memory[104] = 64'h0000000000000000; instruction_memory[105] = 64'h0000000000000000; instruction_memory[106] = 64'h0000000000000000; instruction_memory[107] = 64'h0000000000000000; instruction_memory[108] = 64'h0000000000000000; instruction_memory[109] = 64'h0000000000000000; instruction_memory[110] = 64'h0000000000000000; instruction_memory[111] = 64'h0000000000000000; instruction_memory[112] = 64'h0000000000000000; instruction_memory[113] = 64'h0000000000000000; instruction_memory[114] = 64'h0000000000000000; instruction_memory[115] = 64'h0000000000000000; instruction_memory[116] = 64'h0000000000000000; instruction_memory[117] = 64'h0000000000000000; instruction_memory[118] = 64'h0000000000000000; instruction_memory[119] = 64'h0000000000000000; instruction_memory[120] = 64'h0000000000000000; instruction_memory[121] = 64'h0000000000000000; instruction_memory[122] = 64'h0000000000000000; instruction_memory[123] = 64'h0000000000000000; instruction_memory[124] = 64'h0000000000000000; instruction_memory[125] = 64'h0000000000000000; instruction_memory[126] = 64'h0000000000000000; instruction_memory[127] = 64'h0000000000000000; instruction_memory[128] = 64'h0000000000000000; instruction_memory[129] = 64'h0000000000000000; instruction_memory[130] = 64'h0000000000000000; instruction_memory[131] = 64'h0000000000000000; instruction_memory[132] = 64'h0000000000000000; instruction_memory[133] = 64'h0000000000000000; instruction_memory[134] = 64'h0000000000000000; instruction_memory[135] = 64'h0000000000000000; instruction_memory[136] = 64'h0000000000000000; instruction_memory[137] = 64'h0000000000000000; instruction_memory[138] = 64'h0000000000000000; instruction_memory[139] = 64'h0000000000000000; instruction_memory[140] = 64'h0000000000000000; instruction_memory[141] = 64'h0000000000000000; instruction_memory[142] = 64'h0000000000000000; instruction_memory[143] = 64'h0000000000000000; instruction_memory[144] = 64'h0000000000000000; instruction_memory[145] = 64'h0000000000000000; instruction_memory[146] = 64'h0000000000000000; instruction_memory[147] = 64'h0000000000000000; instruction_memory[148] = 64'h0000000000000000; instruction_memory[149] = 64'h0000000000000000; instruction_memory[150] = 64'h0000000000000000; instruction_memory[151] = 64'h0000000000000000; instruction_memory[152] = 64'h0000000000000000; instruction_memory[153] = 64'h0000000000000000; instruction_memory[154] = 64'h0000000000000000; instruction_memory[155] = 64'h0000000000000000; instruction_memory[156] = 64'h0000000000000000; instruction_memory[157] = 64'h0000000000000000; instruction_memory[158] = 64'h0000000000000000; instruction_memory[159] = 64'h0000000000000000; instruction_memory[160] = 64'h0000000000000000; instruction_memory[161] = 64'h0000000000000000; instruction_memory[162] = 64'h0000000000000000; instruction_memory[163] = 64'h0000000000000000; instruction_memory[164] = 64'h0000000000000000; instruction_memory[165] = 64'h0000000000000000; instruction_memory[166] = 64'h0000000000000000; instruction_memory[167] = 64'h0000000000000000; instruction_memory[168] = 64'h0000000000000000; instruction_memory[169] = 64'h0000000000000000; instruction_memory[170] = 64'h0000000000000000; instruction_memory[171] = 64'h0000000000000000; instruction_memory[172] = 64'h0000000000000000; instruction_memory[173] = 64'h0000000000000000; instruction_memory[174] = 64'h0000000000000000; instruction_memory[175] = 64'h0000000000000000; instruction_memory[176] = 64'h0000000000000000; instruction_memory[177] = 64'h0000000000000000; instruction_memory[178] = 64'h0000000000000000; instruction_memory[179] = 64'h0000000000000000; instruction_memory[180] = 64'h0000000000000000; instruction_memory[181] = 64'h0000000000000000; instruction_memory[182] = 64'h0000000000000000; instruction_memory[183] = 64'h0000000000000000; instruction_memory[184] = 64'h0000000000000000; instruction_memory[185] = 64'h0000000000000000; instruction_memory[186] = 64'h0000000000000000; instruction_memory[187] = 64'h0000000000000000; instruction_memory[188] = 64'h0000000000000000; instruction_memory[189] = 64'h0000000000000000; instruction_memory[190] = 64'h0000000000000000; instruction_memory[191] = 64'h0000000000000000; instruction_memory[192] = 64'h0000000000000000; instruction_memory[193] = 64'h0000000000000000; instruction_memory[194] = 64'h0000000000000000; instruction_memory[195] = 64'h0000000000000000; instruction_memory[196] = 64'h0000000000000000; instruction_memory[197] = 64'h0000000000000000; instruction_memory[198] = 64'h0000000000000000; instruction_memory[199] = 64'h0000000000000000; instruction_memory[200] = 64'h0000000000000000; instruction_memory[201] = 64'h0000000000000000; instruction_memory[202] = 64'h0000000000000000; instruction_memory[203] = 64'h0000000000000000; instruction_memory[204] = 64'h0000000000000000; instruction_memory[205] = 64'h0000000000000000; instruction_memory[206] = 64'h0000000000000000; instruction_memory[207] = 64'h0000000000000000; instruction_memory[208] = 64'h0000000000000000; instruction_memory[209] = 64'h0000000000000000; instruction_memory[210] = 64'h0000000000000000; instruction_memory[211] = 64'h0000000000000000; instruction_memory[212] = 64'h0000000000000000; instruction_memory[213] = 64'h0000000000000000; instruction_memory[214] = 64'h0000000000000000; instruction_memory[215] = 64'h0000000000000000; instruction_memory[216] = 64'h0000000000000000; instruction_memory[217] = 64'h0000000000000000; instruction_memory[218] = 64'h0000000000000000; instruction_memory[219] = 64'h0000000000000000; instruction_memory[220] = 64'h0000000000000000; instruction_memory[221] = 64'h0000000000000000; instruction_memory[222] = 64'h0000000000000000; instruction_memory[223] = 64'h0000000000000000; instruction_memory[224] = 64'h0000000000000000; instruction_memory[225] = 64'h0000000000000000; instruction_memory[226] = 64'h0000000000000000; instruction_memory[227] = 64'h0000000000000000; instruction_memory[228] = 64'h0000000000000000; instruction_memory[229] = 64'h0000000000000000; instruction_memory[230] = 64'h0000000000000000; instruction_memory[231] = 64'h0000000000000000; instruction_memory[232] = 64'h0000000000000000; instruction_memory[233] = 64'h0000000000000000; instruction_memory[234] = 64'h0000000000000000; instruction_memory[235] = 64'h0000000000000000; instruction_memory[236] = 64'h0000000000000000; instruction_memory[237] = 64'h0000000000000000; instruction_memory[238] = 64'h0000000000000000; instruction_memory[239] = 64'h0000000000000000; instruction_memory[240] = 64'h0000000000000000; instruction_memory[241] = 64'h0000000000000000; instruction_memory[242] = 64'h0000000000000000; instruction_memory[243] = 64'h0000000000000000; instruction_memory[244] = 64'h0000000000000000; instruction_memory[245] = 64'h0000000000000000; instruction_memory[246] = 64'h0000000000000000; instruction_memory[247] = 64'h0000000000000000; instruction_memory[248] = 64'h0000000000000000; instruction_memory[249] = 64'h0000000000000000; instruction_memory[250] = 64'h0000000000000000; instruction_memory[251] = 64'h0000000000000000; instruction_memory[252] = 64'h0000000000000000; instruction_memory[253] = 64'h0000000000000000; instruction_memory[254] = 64'h0000000000000000; instruction_memory[255] = 64'h0000000000000000; end always @(posedge clk_100M) begin if (instruction_write_port__en) instruction_memory[instruction_write_port__addr] <= instruction_write_port__data; end reg [63:0] _3_; always @(posedge clk_100M) begin _3_ <= instruction_memory[instruction_memory_address[7:0]]; end assign instruction_read_data = _3_; assign \$1 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:381" *) axi_transfer_busy; assign \$2 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:390" *) dma_memory_half; assign \$3 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:404" *) dma_memory_half_comb; assign \$8 = { 63'h0000000000000000, data_read_port_axi__data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:420" *) \$7 ; assign sync_200_rst = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:439" *) reset; assign sync_100_rst = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:440" *) reset; assign sync_50_rst = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:441" *) reset; assign sync_25_rst = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:442" *) reset; assign write_addr_complete = AWVALID & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:495" *) AWREADY; assign write_data_complete = WVALID & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:496" *) WREADY; assign read_addr_complete = ARVALID & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:499" *) ARREADY; assign \$12 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) AWVALID; assign \$13 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) WVALID; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) \$13 ; assign \$15 = write_addr_complete & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) write_data_complete; assign \$16 = \$14 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) \$15 ; assign \$17 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) AWVALID; assign \$18 = \$17 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) write_data_complete; assign \$19 = \$16 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) \$18 ; assign \$21 = { 9'h000, internal_axi_write_address } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:669" *) \$20 ; assign \$22 = RVALID & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:710" *) internal_axi_write_ready; assign \$23 = RVALID & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:718" *) RREADY; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:753" *) axi_transfer_busy; assign \$25 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:755" *) busy; assign \$26 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; assign \$27 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$28 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$29 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$30 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$31 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h5; assign \$32 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) \fsm_state$120 ; assign \$33 = \fsm_state$120 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$34 = \fsm_state$120 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$35 = \fsm_state$120 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$36 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) \fsm_state$213 ; assign \$37 = \fsm_state$213 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$38 = \fsm_state$213 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$39 = \fsm_state$213 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$40 = \fsm_state$213 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$41 = axi_write_busy | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:473" *) axi_read_busy; assign \$42 = write_bursts_remaining >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:559" *) 5'h10; assign \$43 = write_bursts_remaining - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:561" *) 5'h10; assign \$44 = write_bursts_remaining - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:563" *) 1'h1; assign \$45 = write_current_burst == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:575" *) AWLEN; assign \$46 = internal_axi_read_address + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:585" *) 1'h1; assign \$47 = write_current_burst + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:587" *) 1'h1; assign \$48 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:597" *) WLAST; assign \$49 = internal_axi_read_address + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:598" *) 1'h1; assign \$50 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) AWVALID; assign \$51 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) WVALID; assign \$52 = \$50 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) \$51 ; assign \$53 = write_addr_complete & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) write_data_complete; assign \$54 = \$52 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) \$53 ; assign \$55 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) AWVALID; assign \$56 = \$55 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) write_data_complete; assign \$57 = \$54 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:600" *) \$56 ; assign \$58 = write_current_burst == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:607" *) AWLEN; assign \$59 = internal_axi_read_address + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:616" *) 1'h1; assign \$60 = write_current_burst + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:618" *) 1'h1; assign \$61 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:630" *) write_bursts_remaining; assign \$62 = write_stage != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:633" *) 1'h1; assign \$63 = AWADDR + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:631" *) 8'h80; assign \$64 = write_stage + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:634" *) 1'h1; assign \$65 = read_bursts_remaining >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:697" *) 5'h10; assign \$66 = read_bursts_remaining - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:699" *) 5'h10; assign \$67 = read_bursts_remaining - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:701" *) 1'h1; assign \$68 = RVALID & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:710" *) internal_axi_write_ready; assign \$69 = RVALID & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:718" *) RREADY; assign \$70 = internal_axi_write_address + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:719" *) 1'h1; assign \$71 = read_current_burst + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:720" *) 1'h1; assign \$72 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:726" *) read_bursts_remaining; assign \$73 = read_stage != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:729" *) 2'h2; assign \$74 = ARADDR + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:727" *) 8'h80; assign \$75 = read_stage + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:730" *) 1'h1; assign \$76 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:761" *) cycle_timer; assign \$77 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:762" *) cycle_timer_config; assign \$78 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:763" *) watchdog_counter; assign \$79 = watchdog_counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:764" *) 1'h1; assign \$80 = watchdog_register != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:771" *) last_watchdog_value; assign \$81 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:739" *) cycle_timer; assign \$82 = cycle_timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:742" *) 1'h1; assign \$83 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:761" *) cycle_timer; assign \$84 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:762" *) cycle_timer_config; assign \$85 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:763" *) watchdog_counter; assign \$86 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:787" *) busy; assign \$87 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:799" *) axi_transfer_busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:372" *) always @(posedge clk_100M, negedge reset) if (!reset) dma_memory_half <= 1'h0; else dma_memory_half <= \$88 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:323" *) always @(posedge clk_100M, negedge reset) if (!reset) axi_transfer_busy <= 1'h0; else axi_transfer_busy <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:507" *) always @(posedge clk_100M, negedge reset) if (!reset) axi_read_data_incremented <= 1'h0; else axi_read_data_incremented <= \$89 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:506" *) always @(posedge clk_100M, negedge reset) if (!reset) last_axi_read_data <= 64'h0000000000000000; else last_axi_read_data <= \$90 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:505" *) always @(posedge clk_100M, negedge reset) if (!reset) internal_axi_read_valid <= 1'h0; else internal_axi_read_valid <= \$91 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:90" *) always @(posedge clk_100M, negedge reset) if (!reset) BREADY <= 1'h0; else BREADY <= \$92 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:73" *) always @(posedge clk_100M, negedge reset) if (!reset) AWVALID <= 1'h0; else AWVALID <= \$93 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:82" *) always @(posedge clk_100M, negedge reset) if (!reset) WVALID <= 1'h0; else WVALID <= \$94 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:80" *) always @(posedge clk_100M, negedge reset) if (!reset) WLAST <= 1'h0; else WLAST <= \$95 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:471" *) always @(posedge clk_100M, negedge reset) if (!reset) axi_write_busy <= 1'h0; else axi_write_busy <= \$96 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:479" *) always @(posedge clk_100M, negedge reset) if (!reset) write_stage <= 2'h0; else write_stage <= \$97 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge clk_100M, negedge reset) if (!reset) fsm_state <= 3'h0; else fsm_state <= \$98 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:63" *) always @(posedge clk_100M, negedge reset) if (!reset) AWADDR <= 32'd0; else AWADDR <= \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:488" *) always @(posedge clk_100M, negedge reset) if (!reset) write_bursts_remaining <= 10'h000; else write_bursts_remaining <= \$100 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:503" *) always @(posedge clk_100M, negedge reset) if (!reset) internal_axi_read_address <= 10'h000; else internal_axi_read_address <= \$101 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:64" *) always @(posedge clk_100M, negedge reset) if (!reset) AWLEN <= 4'h0; else AWLEN <= \$102 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:490" *) always @(posedge clk_100M, negedge reset) if (!reset) write_current_burst <= 4'h0; else write_current_burst <= \$103 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:456" *) always @(posedge clk_100M, negedge reset) if (!reset) cycle_timer_config <= 16'hffff; else cycle_timer_config <= \$104 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:464" *) always @(posedge clk_100M, negedge reset) if (!reset) dma_instruction_block_select <= 4'h0; else dma_instruction_block_select <= \$105 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:457" *) always @(posedge clk_100M, negedge reset) if (!reset) watchdog_register <= 16'h0000; else watchdog_register <= \$106 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:643" *) always @(posedge clk_100M, negedge reset) if (!reset) internal_axi_write_ready <= 1'h0; else internal_axi_write_ready <= \$107 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:114" *) always @(posedge clk_100M, negedge reset) if (!reset) RREADY <= 1'h0; else RREADY <= \$108 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:104" *) always @(posedge clk_100M, negedge reset) if (!reset) ARVALID <= 1'h0; else ARVALID <= \$109 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:472" *) always @(posedge clk_100M, negedge reset) if (!reset) axi_read_busy <= 1'h0; else axi_read_busy <= \$110 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:486" *) always @(posedge clk_100M, negedge reset) if (!reset) read_stage <= 3'h0; else read_stage <= \$111 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge clk_100M, negedge reset) if (!reset) \fsm_state$120 <= 2'h0; else \fsm_state$120 <= \$112 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:94" *) always @(posedge clk_100M, negedge reset) if (!reset) ARADDR <= 32'd0; else ARADDR <= \$113 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:489" *) always @(posedge clk_100M, negedge reset) if (!reset) read_bursts_remaining <= 10'h000; else read_bursts_remaining <= \$114 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:641" *) always @(posedge clk_100M, negedge reset) if (!reset) internal_axi_write_address <= 10'h000; else internal_axi_write_address <= \$115 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:95" *) always @(posedge clk_100M, negedge reset) if (!reset) ARLEN <= 4'h0; else ARLEN <= \$116 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:491" *) always @(posedge clk_100M, negedge reset) if (!reset) read_current_burst <= 4'h0; else read_current_burst <= \$117 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:459" *) always @(posedge clk_100M, negedge reset) if (!reset) watchdog_counter <= 8'h00; else watchdog_counter <= \$118 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:458" *) always @(posedge clk_100M, negedge reset) if (!reset) last_watchdog_value <= 16'h0000; else last_watchdog_value <= \$119 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:169" *) always @(posedge clk_100M, negedge reset) if (!reset) start <= 1'h0; else start <= \$120 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:322" *) always @(posedge clk_100M, negedge reset) if (!reset) axi_transfer_start <= 1'h0; else axi_transfer_start <= \$121 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) always @(posedge clk_100M, negedge reset) if (!reset) read_bram_address_input <= 16'h0000; else read_bram_address_input <= read_bram_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) always @(posedge clk_100M, negedge reset) if (!reset) write_bram_address_input <= 16'h0000; else write_bram_address_input <= write_bram_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) always @(posedge clk_100M, negedge reset) if (!reset) read_node_address_input <= 8'h00; else read_node_address_input <= read_node_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) always @(posedge clk_100M, negedge reset) if (!reset) write_node_address_input <= 8'h00; else write_node_address_input <= write_node_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) always @(posedge clk_100M, negedge reset) if (!reset) data_input <= 32'd0; else data_input <= data_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) always @(posedge clk_100M, negedge reset) if (!reset) read_complete_input <= 1'h0; else read_complete_input <= read_complete_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) always @(posedge clk_100M, negedge reset) if (!reset) write_complete_input <= 1'h0; else write_complete_input <= write_complete_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_bram_address_input$241 <= 16'h0000; else \read_bram_address_input$241 <= \read_bram_address_output$242 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_bram_address_input$243 <= 16'h0000; else \write_bram_address_input$243 <= \write_bram_address_output$244 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_node_address_input$245 <= 8'h00; else \read_node_address_input$245 <= \read_node_address_output$246 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_node_address_input$247 <= 8'h00; else \write_node_address_input$247 <= \write_node_address_output$248 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) always @(posedge clk_100M, negedge reset) if (!reset) \data_input$249 <= 32'd0; else \data_input$249 <= \data_output$250 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_complete_input$251 <= 1'h0; else \read_complete_input$251 <= \read_complete_output$252 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_complete_input$253 <= 1'h0; else \write_complete_input$253 <= \write_complete_output$254 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_bram_address_input$255 <= 16'h0000; else \read_bram_address_input$255 <= \read_bram_address_output$256 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_bram_address_input$257 <= 16'h0000; else \write_bram_address_input$257 <= \write_bram_address_output$258 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_node_address_input$259 <= 8'h00; else \read_node_address_input$259 <= \read_node_address_output$260 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_node_address_input$261 <= 8'h00; else \write_node_address_input$261 <= \write_node_address_output$262 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) always @(posedge clk_100M, negedge reset) if (!reset) \data_input$263 <= 32'd0; else \data_input$263 <= \data_output$264 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_complete_input$265 <= 1'h0; else \read_complete_input$265 <= \read_complete_output$266 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_complete_input$267 <= 1'h0; else \write_complete_input$267 <= \write_complete_output$268 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_bram_address_input$269 <= 16'h0000; else \read_bram_address_input$269 <= \read_bram_address_output$270 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_bram_address_input$271 <= 16'h0000; else \write_bram_address_input$271 <= \write_bram_address_output$272 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_node_address_input$273 <= 8'h00; else \read_node_address_input$273 <= \read_node_address_output$274 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_node_address_input$275 <= 8'h00; else \write_node_address_input$275 <= \write_node_address_output$276 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) always @(posedge clk_100M, negedge reset) if (!reset) \data_input$277 <= 32'd0; else \data_input$277 <= \data_output$278 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_complete_input$279 <= 1'h0; else \read_complete_input$279 <= \read_complete_output$280 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_complete_input$281 <= 1'h0; else \write_complete_input$281 <= \write_complete_output$282 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_bram_address_input$283 <= 16'h0000; else \read_bram_address_input$283 <= \read_bram_address_output$284 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_bram_address_input$285 <= 16'h0000; else \write_bram_address_input$285 <= \write_bram_address_output$286 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_node_address_input$287 <= 8'h00; else \read_node_address_input$287 <= \read_node_address_output$288 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_node_address_input$289 <= 8'h00; else \write_node_address_input$289 <= \write_node_address_output$290 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) always @(posedge clk_100M, negedge reset) if (!reset) \data_input$291 <= 32'd0; else \data_input$291 <= \data_output$292 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_complete_input$293 <= 1'h0; else \read_complete_input$293 <= \read_complete_output$294 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_complete_input$295 <= 1'h0; else \write_complete_input$295 <= \write_complete_output$296 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_bram_address_input$297 <= 16'h0000; else \read_bram_address_input$297 <= \read_bram_address_output$298 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_bram_address_input$299 <= 16'h0000; else \write_bram_address_input$299 <= \write_bram_address_output$300 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_node_address_input$301 <= 8'h00; else \read_node_address_input$301 <= \read_node_address_output$302 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_node_address_input$303 <= 8'h00; else \write_node_address_input$303 <= \write_node_address_output$304 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) always @(posedge clk_100M, negedge reset) if (!reset) \data_input$305 <= 32'd0; else \data_input$305 <= \data_output$306 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_complete_input$307 <= 1'h0; else \read_complete_input$307 <= \read_complete_output$308 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_complete_input$309 <= 1'h0; else \write_complete_input$309 <= \write_complete_output$310 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_bram_address_input$311 <= 16'h0000; else \read_bram_address_input$311 <= \read_bram_address_output$312 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_bram_address_input$313 <= 16'h0000; else \write_bram_address_input$313 <= \write_bram_address_output$314 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_node_address_input$315 <= 8'h00; else \read_node_address_input$315 <= \read_node_address_output$316 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_node_address_input$317 <= 8'h00; else \write_node_address_input$317 <= \write_node_address_output$318 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) always @(posedge clk_100M, negedge reset) if (!reset) \data_input$319 <= 32'd0; else \data_input$319 <= \data_output$320 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_complete_input$321 <= 1'h0; else \read_complete_input$321 <= \read_complete_output$322 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_complete_input$323 <= 1'h0; else \write_complete_input$323 <= \write_complete_output$324 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_bram_address_input$325 <= 16'h0000; else \read_bram_address_input$325 <= \read_bram_address_output$326 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_bram_address_input$327 <= 16'h0000; else \write_bram_address_input$327 <= \write_bram_address_output$328 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_node_address_input$329 <= 8'h00; else \read_node_address_input$329 <= \read_node_address_output$330 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_node_address_input$331 <= 8'h00; else \write_node_address_input$331 <= \write_node_address_output$332 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) always @(posedge clk_100M, negedge reset) if (!reset) \data_input$333 <= 32'd0; else \data_input$333 <= \data_output$334 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_complete_input$335 <= 1'h0; else \read_complete_input$335 <= \read_complete_output$336 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_complete_input$337 <= 1'h0; else \write_complete_input$337 <= \write_complete_output$338 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:154" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_node_address_input$339 <= 8'h00; else \read_node_address_input$339 <= \read_node_address_output$340 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:156" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_node_address_input$341 <= 8'h00; else \write_node_address_input$341 <= \write_node_address_output$342 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:158" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_bram_address_input$343 <= 16'h0000; else \read_bram_address_input$343 <= \read_bram_address_output$344 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:160" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_bram_address_input$345 <= 16'h0000; else \write_bram_address_input$345 <= \write_bram_address_output$346 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:162" *) always @(posedge clk_100M, negedge reset) if (!reset) \data_input$347 <= 32'd0; else \data_input$347 <= \data_output$348 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:164" *) always @(posedge clk_100M, negedge reset) if (!reset) \read_complete_input$349 <= 1'h0; else \read_complete_input$349 <= \read_complete_output$350 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:166" *) always @(posedge clk_100M, negedge reset) if (!reset) \write_complete_input$351 <= 1'h0; else \write_complete_input$351 <= \write_complete_output$352 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:463" *) always @(posedge clk_25M, negedge reset) if (!reset) cycle_timer <= 16'h0000; else cycle_timer <= \$122 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge clk_25M, negedge reset) if (!reset) \fsm_state$213 <= 3'h0; else \fsm_state$213 <= \$123 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:838" *) \Controller.em_serial_controller_A em_serial_controller_A ( .bram_address(\bram_address$155 ), .\bram_read_data$40 (\bram_read_data$161 ), .bram_write_data(\bram_write_data$157 ), .bram_write_enable(\bram_write_enable$159 ), .rx(\rs422_rx$204 [1]), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .tx(\tx$206 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:866" *) \Controller.em_serial_controller_A_shift_dma_5 em_serial_controller_A_shift_dma_5 ( .bram_address(\bram_address$155 ), .bram_read_data(\bram_read_data$161 ), .bram_write_data(\bram_write_data$157 ), .bram_write_enable(\bram_write_enable$159 ), .data_input(\data_input$291 ), .data_output(\data_output$306 ), .read_bram_address_input(\read_bram_address_input$283 ), .read_bram_address_output(\read_bram_address_output$298 ), .read_complete_input(\read_complete_input$293 ), .read_complete_output(\read_complete_output$308 ), .read_node_address_input(\read_node_address_input$287 ), .read_node_address_output(\read_node_address_output$302 ), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .write_bram_address_input(\write_bram_address_input$285 ), .write_bram_address_output(\write_bram_address_output$300 ), .write_complete_input(\write_complete_input$295 ), .write_complete_output(\write_complete_output$310 ), .write_node_address_input(\write_node_address_input$289 ), .write_node_address_output(\write_node_address_output$304 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:838" *) \Controller.em_serial_controller_B em_serial_controller_B ( .bram_address(\bram_address$163 ), .\bram_read_data$40 (\bram_read_data$169 ), .bram_write_data(\bram_write_data$165 ), .bram_write_enable(\bram_write_enable$167 ), .rx(\rs422_rx$204 [9]), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .tx(\tx$208 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:866" *) \Controller.em_serial_controller_B_shift_dma_6 em_serial_controller_B_shift_dma_6 ( .bram_address(\bram_address$163 ), .bram_read_data(\bram_read_data$169 ), .bram_write_data(\bram_write_data$165 ), .bram_write_enable(\bram_write_enable$167 ), .data_input(\data_input$305 ), .data_output(\data_output$320 ), .read_bram_address_input(\read_bram_address_input$297 ), .read_bram_address_output(\read_bram_address_output$312 ), .read_complete_input(\read_complete_input$307 ), .read_complete_output(\read_complete_output$322 ), .read_node_address_input(\read_node_address_input$301 ), .read_node_address_output(\read_node_address_output$316 ), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .write_bram_address_input(\write_bram_address_input$299 ), .write_bram_address_output(\write_bram_address_output$314 ), .write_complete_input(\write_complete_input$309 ), .write_complete_output(\write_complete_output$324 ), .write_node_address_input(\write_node_address_input$303 ), .write_node_address_output(\write_node_address_output$318 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:838" *) \Controller.em_serial_controller_C em_serial_controller_C ( .bram_address(\bram_address$171 ), .\bram_read_data$40 (\bram_read_data$177 ), .bram_write_data(\bram_write_data$173 ), .bram_write_enable(\bram_write_enable$175 ), .rx(\rs422_rx$204 [8]), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .tx(\tx$210 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:866" *) \Controller.em_serial_controller_C_shift_dma_7 em_serial_controller_C_shift_dma_7 ( .bram_address(\bram_address$171 ), .bram_read_data(\bram_read_data$177 ), .bram_write_data(\bram_write_data$173 ), .bram_write_enable(\bram_write_enable$175 ), .data_input(\data_input$319 ), .data_output(\data_output$334 ), .read_bram_address_input(\read_bram_address_input$311 ), .read_bram_address_output(\read_bram_address_output$326 ), .read_complete_input(\read_complete_input$321 ), .read_complete_output(\read_complete_output$336 ), .read_node_address_input(\read_node_address_input$315 ), .read_node_address_output(\read_node_address_output$330 ), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .write_bram_address_input(\write_bram_address_input$313 ), .write_bram_address_output(\write_bram_address_output$328 ), .write_complete_input(\write_complete_input$323 ), .write_complete_output(\write_complete_output$338 ), .write_node_address_input(\write_node_address_input$317 ), .write_node_address_output(\write_node_address_output$332 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:838" *) \Controller.em_serial_controller_D em_serial_controller_D ( .bram_address(\bram_address$179 ), .\bram_read_data$40 (\bram_read_data$185 ), .bram_write_data(\bram_write_data$181 ), .bram_write_enable(\bram_write_enable$183 ), .rx(\rs422_rx$204 [0]), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .tx(\tx$212 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:866" *) \Controller.em_serial_controller_D_shift_dma_8 em_serial_controller_D_shift_dma_8 ( .bram_address(\bram_address$179 ), .bram_read_data(\bram_read_data$185 ), .bram_write_data(\bram_write_data$181 ), .bram_write_enable(\bram_write_enable$183 ), .data_input(\data_input$333 ), .data_output(\data_output$348 ), .read_bram_address_input(\read_bram_address_input$325 ), .read_bram_address_output(\read_bram_address_output$344 ), .read_complete_input(\read_complete_input$335 ), .read_complete_output(\read_complete_output$350 ), .read_node_address_input(\read_node_address_input$329 ), .read_node_address_output(\read_node_address_output$340 ), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .write_bram_address_input(\write_bram_address_input$327 ), .write_bram_address_output(\write_bram_address_output$346 ), .write_complete_input(\write_complete_input$337 ), .write_complete_output(\write_complete_output$352 ), .write_node_address_input(\write_node_address_input$331 ), .write_node_address_output(\write_node_address_output$342 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:838" *) \Controller.fanuc_encoders fanuc_encoders ( .bram_address(\bram_address$139 ), .bram_read_data(\bram_read_data$145 ), .bram_write_enable(\bram_write_enable$143 ), .req(\$124 ), .\rx$30 (rx), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:866" *) \Controller.fanuc_encoders_shift_dma_3 fanuc_encoders_shift_dma_3 ( .bram_address(\bram_address$139 ), .bram_read_data(\bram_read_data$145 ), .bram_write_data(\bram_write_data$141 ), .bram_write_enable(\bram_write_enable$143 ), .data_input(\data_input$263 ), .data_output(\data_output$278 ), .read_bram_address_input(\read_bram_address_input$255 ), .read_bram_address_output(\read_bram_address_output$270 ), .read_complete_input(\read_complete_input$265 ), .read_complete_output(\read_complete_output$280 ), .read_node_address_input(\read_node_address_input$259 ), .read_node_address_output(\read_node_address_output$274 ), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .write_bram_address_input(\write_bram_address_input$257 ), .write_bram_address_output(\write_bram_address_output$272 ), .write_complete_input(\write_complete_input$267 ), .write_complete_output(\write_complete_output$282 ), .write_node_address_input(\write_node_address_input$261 ), .write_node_address_output(\write_node_address_output$276 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:838" *) \Controller.serial_card_B serial_card_B ( .bram_address(bram_address), .bram_read_data(bram_read_data), .bram_write_data(bram_write_data), .bram_write_enable(bram_write_enable), .rs422_rx(\rs422_rx$204 ), .rs422_tx(\rs422_tx$205 ), .slotIn(slot_B_in), .slotOut(slot_B_out), .slotOutEnable(slot_B_out_enable), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .sync_25_clk(clk_25M), .sync_25_rst(sync_25_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:866" *) \Controller.serial_card_B_shift_dma_1 serial_card_B_shift_dma_1 ( .bram_address(bram_address), .bram_read_data(bram_read_data), .bram_write_data(bram_write_data), .bram_write_enable(bram_write_enable), .data_input(data_input), .data_output(\data_output$250 ), .read_bram_address_input(read_bram_address_input), .read_bram_address_output(\read_bram_address_output$242 ), .read_complete_input(read_complete_input), .read_complete_output(\read_complete_output$252 ), .read_node_address_input(read_node_address_input), .read_node_address_output(\read_node_address_output$246 ), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .write_bram_address_input(write_bram_address_input), .write_bram_address_output(\write_bram_address_output$244 ), .write_complete_input(write_complete_input), .write_complete_output(\write_complete_output$254 ), .write_node_address_input(write_node_address_input), .write_node_address_output(\write_node_address_output$248 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:838" *) \Controller.serial_card_C serial_card_C ( .bram_address(\bram_address$131 ), .bram_read_data(\bram_read_data$137 ), .bram_write_data(\bram_write_data$133 ), .bram_write_enable(\bram_write_enable$135 ), .rs422_rx(rs422_rx), .rs422_tx(rs422_tx), .rs485_rx(rs485_rx), .rs485_tx(rs485_tx), .rs485_tx_enable(rs485_tx_enable), .slotIn(slot_C_in), .slotOut(slot_C_out), .slotOutEnable(slot_C_out_enable), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .sync_25_clk(clk_25M), .sync_25_rst(sync_25_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:866" *) \Controller.serial_card_C_shift_dma_2 serial_card_C_shift_dma_2 ( .bram_address(\bram_address$131 ), .bram_read_data(\bram_read_data$137 ), .bram_write_data(\bram_write_data$133 ), .bram_write_enable(\bram_write_enable$135 ), .data_input(\data_input$249 ), .data_output(\data_output$264 ), .read_bram_address_input(\read_bram_address_input$241 ), .read_bram_address_output(\read_bram_address_output$256 ), .read_complete_input(\read_complete_input$251 ), .read_complete_output(\read_complete_output$266 ), .read_node_address_input(\read_node_address_input$245 ), .read_node_address_output(\read_node_address_output$260 ), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .write_bram_address_input(\write_bram_address_input$243 ), .write_bram_address_output(\write_bram_address_output$258 ), .write_complete_input(\write_complete_input$253 ), .write_complete_output(\write_complete_output$268 ), .write_node_address_input(\write_node_address_input$247 ), .write_node_address_output(\write_node_address_output$262 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:276" *) \Controller.shift_dma shift_dma ( .bram_read_data(data_memory_read_data), .busy(busy), .\data_input$56 (\data_input$347 ), .data_memory_address(data_memory_address), .data_memory_write_data(data_memory_write_data), .data_memory_write_enable(data_memory_write_enable), .data_output(data_output), .instruction_memory_address(instruction_memory_address), .instruction_memory_read_data(instruction_read_data), .\read_bram_address_input$52 (\read_bram_address_input$343 ), .read_bram_address_output(read_bram_address_output), .read_complete_input(\read_complete_input$349 ), .read_complete_output(read_complete_output), .\read_node_address_input$48 (\read_node_address_input$339 ), .read_node_address_output(read_node_address_output), .start(start), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .\write_bram_address_input$54 (\write_bram_address_input$345 ), .write_bram_address_output(write_bram_address_output), .write_complete_input(\write_complete_input$351 ), .write_complete_output(write_complete_output), .\write_node_address_input$50 (\write_node_address_input$341 ), .write_node_address_output(write_node_address_output) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:838" *) \Controller.yaskawa_encoders yaskawa_encoders ( .bram_address(\bram_address$147 ), .bram_read_data(\bram_read_data$153 ), .bram_write_data(\bram_write_data$149 ), .bram_write_enable(\bram_write_enable$151 ), .\rx$105 (\rx$197 ), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .sync_200_clk(clk_200M), .sync_200_rst(sync_200_rst), .\tx$100 (\$125 ), .\tx_enable$102 (\$126 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:866" *) \Controller.yaskawa_encoders_shift_dma_4 yaskawa_encoders_shift_dma_4 ( .bram_address(\bram_address$147 ), .bram_read_data(\bram_read_data$153 ), .bram_write_data(\bram_write_data$149 ), .bram_write_enable(\bram_write_enable$151 ), .data_input(\data_input$277 ), .data_output(\data_output$292 ), .read_bram_address_input(\read_bram_address_input$269 ), .read_bram_address_output(\read_bram_address_output$284 ), .read_complete_input(\read_complete_input$279 ), .read_complete_output(\read_complete_output$294 ), .read_node_address_input(\read_node_address_input$273 ), .read_node_address_output(\read_node_address_output$288 ), .sync_100_clk(clk_100M), .sync_100_rst(sync_100_rst), .write_bram_address_input(\write_bram_address_input$271 ), .write_bram_address_output(\write_bram_address_output$286 ), .write_complete_input(\write_complete_input$281 ), .write_complete_output(\write_complete_output$296 ), .write_node_address_input(\write_node_address_input$275 ), .write_node_address_output(\write_node_address_output$290 ) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end dma_memory_half_comb = 1'h0; if (data_memory_address[10]) begin dma_memory_half_comb = 1'h1; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end (* full_case = 32'd1 *) if (\$1 ) begin data_read_read_port_dma__addr = data_memory_address[9:0]; end else begin data_read_read_port_dma__addr = \$6 [9:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end (* full_case = 32'd1 *) if (\$1 ) begin data_write_read_port_dma__addr = data_memory_address[9:0]; end else begin data_write_read_port_dma__addr = \$11 [9:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_read_write_port_dma__data = 32'd0; if (\$1 ) begin data_read_write_port_dma__data = data_memory_write_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end (* full_case = 32'd1 *) if (\$1 ) begin data_write_write_port_dma__data = data_memory_write_data; end else begin data_write_write_port_dma__data = data_write_axi_data[63:32]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_memory_read_data = 32'd0; if (\$1 ) begin (* full_case = 32'd1 *) if (\$2 ) begin data_memory_read_data = data_read_dma_read_data; end else begin data_memory_read_data = data_write_dma_read_data; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_read_write_port_dma__en = 1'h0; if (\$1 ) begin (* full_case = 32'd1 *) if (\$3 ) begin data_read_write_port_dma__en = data_memory_write_enable; end else begin data_read_write_port_dma__en = 1'h0; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end (* full_case = 32'd1 *) if (\$1 ) begin (* full_case = 32'd1 *) if (\$3 ) begin data_write_write_port_dma__en = 1'h0; end else begin data_write_write_port_dma__en = data_memory_write_enable; end end else begin data_write_write_port_dma__en = data_write_axi_enable; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_read_port_axi__addr = 10'h000; (* full_case = 32'd1 *) if (\$1 ) begin end else begin data_read_port_axi__addr = \$4 [9:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_read_axi_data = 64'h0000000000000000; (* full_case = 32'd1 *) if (\$1 ) begin end else begin data_read_axi_data = \$8 [63:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_write_port_axi__addr = 10'h000; (* full_case = 32'd1 *) if (\$1 ) begin end else begin data_write_port_axi__addr = \$9 [9:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_write_port_axi__data = 32'd0; (* full_case = 32'd1 *) if (\$1 ) begin end else begin data_write_port_axi__data = data_write_axi_data[31:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_write_port_axi__en = 1'h0; (* full_case = 32'd1 *) if (\$1 ) begin end else begin data_write_port_axi__en = data_write_axi_enable; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end (* full_case = 32'd1 *) if (axi_read_data_incremented) begin timed_axi_read_data = internal_axi_read_data; end else begin timed_axi_read_data = last_axi_read_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end internal_axi_read_data = 64'h0000000000000000; casez (write_stage) 2'h0: (* full_case = 32'd1 *) casez (internal_axi_read_address) 10'h000: internal_axi_read_data = 64'h0000000000000000; default: internal_axi_read_data = 64'h0000000000000000; endcase 2'h1: internal_axi_read_data = data_read_axi_data; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_read_axi_address = 10'h000; casez (write_stage) 2'h0: /* empty */; 2'h1: data_read_axi_address = internal_axi_read_address; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end WDATA = 64'h0000000000000000; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: if (internal_axi_read_valid) begin WDATA = timed_axi_read_data; end 3'h4: (* full_case = 32'd1 *) if (\$19 ) begin (* full_case = 32'd1 *) if (WLAST) begin WDATA = timed_axi_read_data; end else begin if (internal_axi_read_valid) begin WDATA = timed_axi_read_data; end end end else begin WDATA = timed_axi_read_data; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_write_axi_address = 10'h000; casez (read_stage) 3'h0: /* empty */; 3'h1: data_write_axi_address = internal_axi_write_address; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_write_axi_data = 64'h0000000000000000; casez (read_stage) 3'h0: /* empty */; 3'h1: data_write_axi_data = internal_axi_write_data; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end data_write_axi_enable = 1'h0; casez (read_stage) 3'h0: /* empty */; 3'h1: data_write_axi_enable = internal_axi_write_enable; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end instruction_write_port__addr = 8'h00; casez (read_stage) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: instruction_write_port__addr = \$21 [7:0]; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end instruction_write_port__data = 64'h0000000000000000; casez (read_stage) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: instruction_write_port__data = internal_axi_write_data; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end instruction_write_port__en = 1'h0; casez (read_stage) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: instruction_write_port__en = internal_axi_write_enable; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end internal_axi_write_data = 64'h0000000000000000; (* full_case = 32'd1 *) casez (\fsm_state$120 ) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: /* empty */; 2'h3: if (\$22 ) begin internal_axi_write_data = RDATA; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end internal_axi_write_enable = 1'h0; (* full_case = 32'd1 *) casez (\fsm_state$120 ) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: /* empty */; 2'h3: (* full_case = 32'd1 *) if (\$23 ) begin internal_axi_write_enable = 1'h1; end else begin internal_axi_write_enable = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end (* full_case = 32'd1 *) if (data_memory_address[10]) begin \$88 = 1'h1; end else begin \$88 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$89 = axi_read_data_incremented; if (axi_read_data_incremented) begin \$89 = 1'h0; end casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: if (internal_axi_read_valid) begin \$89 = 1'h1; end 3'h4: if (write_data_complete) begin if (\$48 ) begin \$89 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$90 = last_axi_read_data; if (axi_read_data_incremented) begin \$90 = internal_axi_read_data; end casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$57 ) begin (* full_case = 32'd1 *) if (WLAST) begin end else begin if (internal_axi_read_valid) begin \$90 = internal_axi_read_data; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$91 = internal_axi_read_valid; casez (write_stage) 2'h0: \$91 = 1'h1; 2'h1: \$91 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$92 = BREADY; casez (fsm_state) 3'h0: \$92 = 1'h0; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$57 ) begin if (WLAST) begin \$92 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$93 = AWVALID; casez (fsm_state) 3'h0: \$93 = 1'h0; 3'h1: /* empty */; 3'h2: \$93 = 1'h1; 3'h3: if (write_addr_complete) begin \$93 = 1'h0; end 3'h4: if (write_addr_complete) begin \$93 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$94 = WVALID; casez (fsm_state) 3'h0: \$94 = 1'h0; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: if (internal_axi_read_valid) begin \$94 = 1'h1; end 3'h4: begin if (write_data_complete) begin \$94 = 1'h0; end if (\$57 ) begin (* full_case = 32'd1 *) if (WLAST) begin end else begin if (internal_axi_read_valid) begin \$94 = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$95 = WLAST; casez (fsm_state) 3'h0: \$95 = 1'h0; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: (* full_case = 32'd1 *) if (\$45 ) begin \$95 = 1'h1; end else begin \$95 = 1'h0; end 3'h4: if (\$57 ) begin (* full_case = 32'd1 *) if (WLAST) begin end else begin (* full_case = 32'd1 *) if (\$58 ) begin \$95 = 1'h1; end else begin \$95 = 1'h0; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$96 = axi_write_busy; casez (fsm_state) 3'h0: begin \$96 = 1'h0; if (axi_transfer_start) begin \$96 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$97 = write_stage; casez (fsm_state) 3'h0: \$97 = 2'h0; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (BVALID) begin if (\$61 ) begin end else if (\$62 ) begin \$97 = \$64 [1:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$98 = fsm_state; casez (fsm_state) 3'h0: if (axi_transfer_start) begin \$98 = 3'h1; end 3'h1: \$98 = 3'h2; 3'h2: \$98 = 3'h3; 3'h3: if (internal_axi_read_valid) begin \$98 = 3'h4; end 3'h4: if (\$57 ) begin if (WLAST) begin \$98 = 3'h5; end end 3'h5: if (BVALID) begin (* full_case = 32'd1 *) if (\$61 ) begin \$98 = 3'h2; end else if (\$62 ) begin \$98 = 3'h1; end else begin \$98 = 3'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$99 = AWADDR; casez (fsm_state) 3'h0: /* empty */; 3'h1: casez (write_stage) 2'h0: \$99 = 32'd985088; 2'h1: \$99 = 32'd991232; endcase 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (BVALID) begin if (\$61 ) begin \$99 = \$63 [31:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$100 = write_bursts_remaining; casez (fsm_state) 3'h0: /* empty */; 3'h1: casez (write_stage) 2'h0: \$100 = 10'h008; 2'h1: \$100 = 10'h200; endcase 3'h2: (* full_case = 32'd1 *) if (\$42 ) begin \$100 = \$43 [9:0]; end else begin \$100 = 10'h000; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$101 = internal_axi_read_address; casez (fsm_state) 3'h0: /* empty */; 3'h1: \$101 = 10'h000; 3'h2: /* empty */; 3'h3: if (internal_axi_read_valid) begin \$101 = \$46 [9:0]; end 3'h4: begin if (write_data_complete) begin if (\$48 ) begin \$101 = \$49 [9:0]; end end if (\$57 ) begin (* full_case = 32'd1 *) if (WLAST) begin end else begin if (internal_axi_read_valid) begin \$101 = \$59 [9:0]; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$102 = AWLEN; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: (* full_case = 32'd1 *) if (\$42 ) begin \$102 = 4'hf; end else begin \$102 = \$44 [3:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$103 = write_current_burst; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: \$103 = 4'h0; 3'h3: if (internal_axi_read_valid) begin \$103 = \$47 [3:0]; end 3'h4: if (\$57 ) begin (* full_case = 32'd1 *) if (WLAST) begin end else begin if (internal_axi_read_valid) begin \$103 = \$60 [3:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$104 = cycle_timer_config; casez (read_stage) 3'h0: casez (internal_axi_write_address) 10'h000: if (internal_axi_write_enable) begin \$104 = internal_axi_write_data[15:0]; end endcase endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$105 = dma_instruction_block_select; casez (read_stage) 3'h0: casez (internal_axi_write_address) 10'h000: if (internal_axi_write_enable) begin \$105 = internal_axi_write_data[19:16]; end endcase endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$106 = watchdog_register; casez (read_stage) 3'h0: casez (internal_axi_write_address) 10'h000: if (internal_axi_write_enable) begin \$106 = internal_axi_write_data[47:32]; end endcase endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$107 = internal_axi_write_ready; casez (read_stage) 3'h0: \$107 = 1'h1; 3'h1: \$107 = 1'h1; 3'h2: \$107 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$108 = RREADY; (* full_case = 32'd1 *) casez (\fsm_state$120 ) 2'h0: \$108 = 1'h0; 2'h1: /* empty */; 2'h2: /* empty */; 2'h3: (* full_case = 32'd1 *) if (\$68 ) begin \$108 = 1'h1; end else begin \$108 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$109 = ARVALID; (* full_case = 32'd1 *) casez (\fsm_state$120 ) 2'h0: \$109 = 1'h0; 2'h1: /* empty */; 2'h2: \$109 = 1'h1; 2'h3: if (read_addr_complete) begin \$109 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$110 = axi_read_busy; casez (\fsm_state$120 ) 2'h0: begin \$110 = 1'h0; if (axi_transfer_start) begin \$110 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$111 = read_stage; (* full_case = 32'd1 *) casez (\fsm_state$120 ) 2'h0: \$111 = 3'h0; 2'h1: /* empty */; 2'h2: /* empty */; 2'h3: if (\$69 ) begin if (RLAST) begin if (\$72 ) begin end else if (\$73 ) begin \$111 = \$75 [2:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$112 = \fsm_state$120 ; (* full_case = 32'd1 *) casez (\fsm_state$120 ) 2'h0: if (axi_transfer_start) begin \$112 = 2'h1; end 2'h1: \$112 = 2'h2; 2'h2: \$112 = 2'h3; 2'h3: if (\$69 ) begin if (RLAST) begin (* full_case = 32'd1 *) if (\$72 ) begin \$112 = 2'h2; end else if (\$73 ) begin \$112 = 2'h1; end else begin \$112 = 2'h0; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$113 = ARADDR; (* full_case = 32'd1 *) casez (\fsm_state$120 ) 2'h0: /* empty */; 2'h1: casez (read_stage) 3'h0: \$113 = 32'd983040; 3'h1: \$113 = 32'd987136; 3'h2: \$113 = 32'd995328; endcase 2'h2: /* empty */; 2'h3: if (\$69 ) begin if (RLAST) begin if (\$72 ) begin \$113 = \$74 [31:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$114 = read_bursts_remaining; casez (\fsm_state$120 ) 2'h0: /* empty */; 2'h1: casez (read_stage) 3'h0: \$114 = 10'h008; 3'h1: \$114 = 10'h200; 3'h2: \$114 = 10'h100; endcase 2'h2: (* full_case = 32'd1 *) if (\$65 ) begin \$114 = \$66 [9:0]; end else begin \$114 = 10'h000; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$115 = internal_axi_write_address; (* full_case = 32'd1 *) casez (\fsm_state$120 ) 2'h0: /* empty */; 2'h1: \$115 = 10'h000; 2'h2: /* empty */; 2'h3: if (\$69 ) begin \$115 = \$70 [9:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$116 = ARLEN; casez (\fsm_state$120 ) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (\$65 ) begin \$116 = 4'hf; end else begin \$116 = \$67 [3:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$117 = read_current_burst; (* full_case = 32'd1 *) casez (\fsm_state$120 ) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: \$117 = 4'h0; 2'h3: if (\$69 ) begin \$117 = \$71 [3:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$118 = watchdog_counter; casez (\fsm_state$213 ) 3'h0: if (\$76 ) begin if (\$77 ) begin if (\$78 ) begin \$118 = \$79 [7:0]; end end if (\$80 ) begin \$118 = 8'h10; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$119 = last_watchdog_value; casez (\fsm_state$213 ) 3'h0: if (\$76 ) begin if (\$80 ) begin \$119 = watchdog_register; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$120 = start; casez (\fsm_state$213 ) 3'h0: /* empty */; 3'h1: \$120 = 1'h1; 3'h3: \$120 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$121 = axi_transfer_start; casez (\fsm_state$213 ) 3'h0: /* empty */; 3'h1: /* empty */; 3'h3: /* empty */; 3'h2: \$121 = 1'h1; 3'h4: \$121 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end (* full_case = 32'd1 *) if (\$81 ) begin \$122 = cycle_timer_config; end else begin \$122 = \$82 [15:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$13 ) begin end \$123 = \fsm_state$213 ; casez (\fsm_state$213 ) 3'h0: if (\$83 ) begin if (\$84 ) begin (* full_case = 32'd1 *) if (\$85 ) begin \$123 = 3'h1; end else begin \$123 = 3'h2; end end end 3'h1: \$123 = 3'h3; 3'h3: if (\$86 ) begin \$123 = 3'h2; end 3'h2: \$123 = 3'h4; 3'h4: if (\$87 ) begin \$123 = 3'h0; end endcase end assign data_read_dma_address = data_read_read_port_dma__addr; assign data_read_write_port_dma__addr = data_read_read_port_dma__addr; assign data_read_read_port_dma__data = data_read_dma_read_data; assign data_read_dma_write_data = data_read_write_port_dma__data; assign data_read_dma_write_en = data_read_write_port_dma__en; assign data_write_dma_address = data_write_read_port_dma__addr; assign data_write_write_port_dma__addr = data_write_read_port_dma__addr; assign data_write_read_port_dma__data = data_write_dma_read_data; assign data_write_dma_write_data = data_write_write_port_dma__data; assign data_write_dma_write_en = data_write_write_port_dma__en; assign instruction_read_port__addr = instruction_memory_address[7:0]; assign instruction_read_address = instruction_memory_address[7:0]; assign instruction_read_port__data = instruction_read_data; assign instruction_write_address = instruction_write_port__addr; assign instruction_write_data = instruction_write_port__data; assign instruction_write_en = instruction_write_port__en; assign instruction_memory_read_data = instruction_read_data; assign sync_200_clk = clk_200M; assign sync_100_clk = clk_100M; assign sync_50_clk = clk_50M; assign sync_25_clk = clk_25M; assign status = 32'd0; assign \bram_address$124 = bram_address; assign \bram_write_data$126 = bram_write_data; assign \bram_write_enable$128 = bram_write_enable; assign \bram_read_data$130 = bram_read_data; assign \bram_address$132 = \bram_address$131 ; assign \bram_write_data$134 = \bram_write_data$133 ; assign \bram_write_enable$136 = \bram_write_enable$135 ; assign \bram_read_data$138 = \bram_read_data$137 ; assign \bram_address$140 = \bram_address$139 ; assign \bram_write_data$142 = \bram_write_data$141 ; assign \bram_write_enable$144 = \bram_write_enable$143 ; assign \bram_read_data$146 = \bram_read_data$145 ; assign \bram_address$148 = \bram_address$147 ; assign \bram_write_data$150 = \bram_write_data$149 ; assign \bram_write_enable$152 = \bram_write_enable$151 ; assign \bram_read_data$154 = \bram_read_data$153 ; assign \bram_address$156 = \bram_address$155 ; assign \bram_write_data$158 = \bram_write_data$157 ; assign \bram_write_enable$160 = \bram_write_enable$159 ; assign \bram_read_data$162 = \bram_read_data$161 ; assign \bram_address$164 = \bram_address$163 ; assign \bram_write_data$166 = \bram_write_data$165 ; assign \bram_write_enable$168 = \bram_write_enable$167 ; assign \bram_read_data$170 = \bram_read_data$169 ; assign \bram_address$172 = \bram_address$171 ; assign \bram_write_data$174 = \bram_write_data$173 ; assign \bram_write_enable$176 = \bram_write_enable$175 ; assign \bram_read_data$178 = \bram_read_data$177 ; assign \bram_address$180 = \bram_address$179 ; assign \bram_write_data$182 = \bram_write_data$181 ; assign \bram_write_enable$184 = \bram_write_enable$183 ; assign \bram_read_data$186 = \bram_read_data$185 ; assign slotIn = slot_B_in; assign slotOut = slot_B_out; assign slotOutEnable = slot_B_out_enable; assign \slotIn$190 = slot_C_in; assign \slotOut$191 = slot_C_out; assign \slotOutEnable$192 = slot_C_out_enable; assign tx = { \$124 , \$124 }; assign \tx$200 = { \$125 , \$125 , \$125 , \$125 , \$125 , \$125 }; assign tx_enable = { \$126 , \$126 , \$126 , \$126 , \$126 , \$126 }; assign \rx$203 = \rs422_rx$204 [1]; assign \rx$207 = \rs422_rx$204 [9]; assign \rx$209 = \rs422_rx$204 [8]; assign \rx$211 = \rs422_rx$204 [0]; assign AWSIZE = 3'h3; assign AWBURST = 2'h1; assign AWPROT = 3'h0; assign WSTRB = 8'hff; assign ARSIZE = 3'h3; assign ARBURST = 2'h1; assign ARPROT = 3'h0; assign buzzer = 1'h0; assign slot_D_out = 22'h000000; assign slot_D_out_enable = 22'h000000; assign debug_pins[7] = \rs422_rx$204 [0]; assign debug_pins[6] = \tx$212 ; assign debug_pins[5] = \rs422_rx$204 [8]; assign debug_pins[4] = \tx$210 ; assign debug_pins[3] = \rs422_rx$204 [9]; assign debug_pins[2] = \tx$208 ; assign debug_pins[1] = \rs422_rx$204 [1]; assign debug_pins[0] = \tx$206 ; assign \rs422_tx$205 [0] = \tx$212 ; assign \rs422_tx$205 [8] = \tx$210 ; assign \rs422_tx$205 [9] = \tx$208 ; assign \rs422_tx$205 [1] = \tx$206 ; assign \rs422_tx$205 [7:2] = 6'h00; assign rs485_tx_enable[5] = \$126 ; assign rs485_tx_enable[4] = \$126 ; assign rs485_tx_enable[3] = \$126 ; assign rs485_tx_enable[2] = \$126 ; assign rs485_tx_enable[1] = \$126 ; assign rs485_tx_enable[0] = \$126 ; assign rs485_tx_enable[9:6] = 4'h0; assign rs485_tx[5] = \$125 ; assign rs485_tx[4] = \$125 ; assign rs485_tx[3] = \$125 ; assign rs485_tx[2] = \$125 ; assign rs485_tx[1] = \$125 ; assign rs485_tx[0] = \$125 ; assign rs485_tx[9:6] = 4'h0; assign \rx$197 [5] = rs485_rx[5]; assign \rx$197 [4] = rs485_rx[4]; assign \rx$197 [3] = rs485_rx[3]; assign \rx$197 [2] = rs485_rx[2]; assign \rx$197 [1] = rs485_rx[1]; assign \rx$197 [0] = rs485_rx[0]; assign rs422_tx[9] = \$124 ; assign rs422_tx[8] = \$124 ; assign rs422_tx[7:0] = 8'h00; assign rx[1] = rs422_rx[9]; assign rx[0] = rs422_rx[8]; assign pl_ps_interrupts[3] = \$25 ; assign pl_ps_interrupts[2] = busy; assign pl_ps_interrupts[1] = \$24 ; assign pl_ps_interrupts[0] = axi_transfer_busy; assign pl_ps_interrupts[15:4] = 12'h000; assign slot_A_out_enable[7:0] = 8'hff; assign slot_A_out_enable[21:8] = 14'h0000; assign slot_A_out[7:0] = debug_pins; assign slot_A_out[21:8] = 14'h0000; assign \$4 = { data_read_axi_address, 1'h0 }; assign \$5 = { data_read_axi_address, 1'h0 }; assign \$6 [10:1] = \$5 [10:1]; assign \$6 [0] = 1'h1; assign \$7 = { 31'h00000000, data_read_dma_read_data, 32'h00000000 }; assign \$9 = { data_write_axi_address, 1'h0 }; assign \$10 = { data_write_axi_address, 1'h0 }; assign \$11 [10:1] = \$10 [10:1]; assign \$11 [0] = 1'h1; assign \$20 = { 3'h0, dma_instruction_block_select, 12'h000 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:104" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_A (sync_100_rst, rx, \bram_read_data$40 , tx, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$14 = 0; wire [5:0] \$1 ; wire [34:0] \$10 ; wire \$100 ; wire \$101 ; wire [4:0] \$102 ; wire [16:0] \$103 ; wire [3:0] \$104 ; wire [4:0] \$105 ; wire [5:0] \$106 ; wire \$107 ; wire \$108 ; wire \$109 ; wire \$11 ; wire \$110 ; wire \$111 ; wire \$112 ; wire \$113 ; wire \$114 ; wire \$115 ; wire [3:0] \$116 ; wire \$117 ; wire [5:0] \$118 ; wire [4:0] \$119 ; wire \$12 ; wire [31:0] \$120 ; wire [3:0] \$121 ; wire [6:0] \$122 ; wire [31:0] \$123 ; wire [31:0] \$124 ; wire [3:0] \$125 ; wire \$126 ; wire [3:0] \$127 ; wire [3:0] \$128 ; wire [4:0] \$129 ; wire \$13 ; wire [4:0] \$130 ; wire [31:0] \$131 ; wire [3:0] \$132 ; wire [6:0] \$133 ; wire [31:0] \$134 ; wire [31:0] \$135 ; wire [3:0] \$136 ; wire [4:0] \$137 ; wire [3:0] \$138 ; wire [5:0] \$139 ; wire \$14 ; wire [3:0] \$140 ; wire [4:0] \$141 ; wire [5:0] \$142 ; wire [8:0] \$143 ; wire [31:0] \$144 ; wire [31:0] \$145 ; wire [3:0] \$146 ; wire [6:0] \$147 ; wire [158:0] \$148 ; wire [158:0] \$149 ; wire \$15 ; wire \$150 ; wire \$151 ; wire [8:0] \$152 ; reg [15:0] \$153 ; reg \$154 ; reg [15:0] \$155 ; reg \$156 ; reg \$157 ; reg \$158 ; reg \$159 ; wire \$16 ; reg \$160 ; reg \$161 ; reg \$162 ; reg \$163 ; reg [31:0] \$164 ; reg \$165 ; reg [4:0] \$166 ; reg \$167 ; reg \$168 ; reg \$169 ; wire \$17 ; reg [7:0] \$170 ; reg [7:0] \$171 ; reg [7:0] \$172 ; reg [1:0] \$173 ; reg [1:0] \$174 ; reg [2:0] \$175 ; reg [2:0] \$176 ; reg [2:0] \$177 ; reg [3:0] \$178 ; reg [15:0] \$179 ; wire [3:0] \$18 ; reg \$180 ; reg [3:0] \$181 ; reg [3:0] \$182 ; reg \$183 ; reg [15:0] \$184 ; reg [2:0] \$185 ; reg [1:0] \$186 ; reg [31:0] \$187 ; reg [3:0] \$188 ; reg [31:0] \$189 ; wire \$19 ; reg [31:0] \$190 ; reg [31:0] \$191 ; reg \$192 ; wire [6:0] \$2 ; wire \$20 ; wire \$21 ; wire \$22 ; wire \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire [31:0] \$3 ; wire \$30 ; wire \$31 ; wire \$32 ; wire \$33 ; wire \$34 ; wire \$35 ; wire \$36 ; wire \$37 ; wire \$38 ; wire \$39 ; wire [1:0] \$4 ; wire \$40 ; wire \$41 ; wire \$42 ; wire \$43 ; wire \$44 ; wire \$45 ; wire \$46 ; wire \$47 ; wire \$48 ; wire \$49 ; wire [1:0] \$5 ; wire \$50 ; wire \$51 ; wire [37:0] \$52 ; wire \$53 ; wire \$54 ; wire \$55 ; wire \$56 ; wire \$57 ; wire \$58 ; wire \$59 ; wire [1:0] \$6 ; wire [4:0] \$60 ; wire [4:0] \$61 ; wire [8:0] \$62 ; wire [4:0] \$63 ; wire [4:0] \$64 ; wire [5:0] \$65 ; wire \$66 ; wire \$67 ; wire \$68 ; wire \$69 ; wire [34:0] \$7 ; wire \$70 ; wire [3:0] \$71 ; wire [3:0] \$72 ; wire \$73 ; wire [62:0] \$74 ; wire [62:0] \$75 ; wire [3:0] \$76 ; wire [6:0] \$77 ; wire [31:0] \$78 ; wire [3:0] \$79 ; wire [34:0] \$8 ; wire [3:0] \$80 ; wire [4:0] \$81 ; wire [62:0] \$82 ; wire [62:0] \$83 ; wire \$84 ; wire \$85 ; wire [4:0] \$86 ; wire [5:0] \$87 ; wire [3:0] \$88 ; wire \$89 ; wire [34:0] \$9 ; wire \$90 ; wire [4:0] \$91 ; wire [5:0] \$92 ; wire \$93 ; wire \$94 ; wire [4:0] \$95 ; wire [16:0] \$96 ; wire \$97 ; wire \$98 ; wire \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:146" *) reg [31:0] bit_time = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:33" *) input [15:0] bram_address; wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) reg [15:0] \bram_address$84 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:267" *) reg bram_control_mode = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:268" *) reg bram_control_mode_comb; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:34" *) wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:35" *) output [31:0] \bram_read_data$40 ; reg [31:0] \bram_read_data$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:34" *) input [31:0] bram_write_data; wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) reg [31:0] \bram_write_data$85 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:36" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) reg \bram_write_enable$83 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:441" *) reg [3:0] bytes_used; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [4:0] controller_fsm_state = 5'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:176" *) reg [2:0] current_cyclic_register = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:158" *) reg [7:0] current_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:159" *) reg [7:0] current_enabled_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:167" *) reg [1:0] current_rx_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:168" *) reg [2:0] current_rx_word_index = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:219" *) wire [4:0] current_tx_bit_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:166" *) reg [1:0] current_tx_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:169" *) reg [2:0] current_tx_word_index = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:183" *) reg cyclic_data_enabled = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:189" *) wire [2:0] cyclic_read_data_size; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:190" *) wire [1:0] cyclic_read_data_starting_byte_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:178" *) reg [2:0] cyclic_register_size = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:180" *) wire [4:0] cyclic_register_starting_bit_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:179" *) reg [1:0] cyclic_register_starting_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:191" *) wire [2:0] cyclic_write_data_size; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:192" *) wire [1:0] cyclic_write_data_starting_byte_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:99" *) wire [7:0] debugPins; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:62" *) wire [7:0] \debugPins$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:100" *) reg [4:0] debugPins_fsm; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [7:0] externalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] externalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [7:0] externalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] externalWritePort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg externalWritePort__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_rx_register_config_first_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_rx_register_config_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_tx_device_config_wait_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:134" *) reg [15:0] internalBramAddress = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:135" *) wire [31:0] internalBramReadData; (* init = 32'd0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:136" *) wire [31:0] internalBramWriteData; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:137" *) wire internalBramWriteEnable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [7:0] internalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] internalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [7:0] internalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] internalWritePort__data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg internalWritePort__en = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:222" *) wire [31:0] internal_read_port_masked_bytes; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:291" *) reg [15:0] last_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:160" *) reg [7:0] last_enabled_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:445" *) reg [2:0] offset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:172" *) reg [15:0] pre_timer = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:164" *) reg [3:0] previous_rx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) wire \rx$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:184" *) reg rx_cyclic_data_enabled = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:156" *) reg [31:0] rx_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:95" *) reg rx_invalid_crc_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:97" *) reg rx_no_response_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:96" *) reg rx_not_finished_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:163" *) reg [3:0] rx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:225" *) wire [31:0] serial_port_control_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:237" *) wire serial_port_rx_busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:238" *) wire serial_port_rx_crc_valid; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:235" *) wire serial_port_rx_done; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:227" *) reg serial_port_rx_trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:236" *) wire serial_port_tx_busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:234" *) wire serial_port_tx_done; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:226" *) reg serial_port_tx_trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg start_rx_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:145" *) reg start_transfers = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:171" *) reg [3:0] timer = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) output tx; wire tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) wire \tx$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:155" *) reg [31:0] tx_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:162" *) reg [3:0] tx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:147" *) reg update_busy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:148" *) reg update_done = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:149" *) reg update_error = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:173" *) reg update_word_time = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:206" *) reg use_future_device_bram; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:207" *) reg use_previous_device_bram; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg wait_for_final_rx_packet_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg wait_tx_start_read_status_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:174" *) reg [15:0] word_time = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:126" *) reg [31:0] memory [159:0]; initial begin memory[0] = 32'd0; memory[1] = 32'd0; memory[2] = 32'd0; memory[3] = 32'd0; memory[4] = 32'd0; memory[5] = 32'd0; memory[6] = 32'd0; memory[7] = 32'd0; memory[8] = 32'd0; memory[9] = 32'd0; memory[10] = 32'd0; memory[11] = 32'd0; memory[12] = 32'd0; memory[13] = 32'd0; memory[14] = 32'd0; memory[15] = 32'd0; memory[16] = 32'd0; memory[17] = 32'd0; memory[18] = 32'd0; memory[19] = 32'd0; memory[20] = 32'd0; memory[21] = 32'd0; memory[22] = 32'd0; memory[23] = 32'd0; memory[24] = 32'd0; memory[25] = 32'd0; memory[26] = 32'd0; memory[27] = 32'd0; memory[28] = 32'd0; memory[29] = 32'd0; memory[30] = 32'd0; memory[31] = 32'd0; memory[32] = 32'd0; memory[33] = 32'd0; memory[34] = 32'd0; memory[35] = 32'd0; memory[36] = 32'd0; memory[37] = 32'd0; memory[38] = 32'd0; memory[39] = 32'd0; memory[40] = 32'd0; memory[41] = 32'd0; memory[42] = 32'd0; memory[43] = 32'd0; memory[44] = 32'd0; memory[45] = 32'd0; memory[46] = 32'd0; memory[47] = 32'd0; memory[48] = 32'd0; memory[49] = 32'd0; memory[50] = 32'd0; memory[51] = 32'd0; memory[52] = 32'd0; memory[53] = 32'd0; memory[54] = 32'd0; memory[55] = 32'd0; memory[56] = 32'd0; memory[57] = 32'd0; memory[58] = 32'd0; memory[59] = 32'd0; memory[60] = 32'd0; memory[61] = 32'd0; memory[62] = 32'd0; memory[63] = 32'd0; memory[64] = 32'd0; memory[65] = 32'd0; memory[66] = 32'd0; memory[67] = 32'd0; memory[68] = 32'd0; memory[69] = 32'd0; memory[70] = 32'd0; memory[71] = 32'd0; memory[72] = 32'd0; memory[73] = 32'd0; memory[74] = 32'd0; memory[75] = 32'd0; memory[76] = 32'd0; memory[77] = 32'd0; memory[78] = 32'd0; memory[79] = 32'd0; memory[80] = 32'd0; memory[81] = 32'd0; memory[82] = 32'd0; memory[83] = 32'd0; memory[84] = 32'd0; memory[85] = 32'd0; memory[86] = 32'd0; memory[87] = 32'd0; memory[88] = 32'd0; memory[89] = 32'd0; memory[90] = 32'd0; memory[91] = 32'd0; memory[92] = 32'd0; memory[93] = 32'd0; memory[94] = 32'd0; memory[95] = 32'd0; memory[96] = 32'd0; memory[97] = 32'd0; memory[98] = 32'd0; memory[99] = 32'd0; memory[100] = 32'd0; memory[101] = 32'd0; memory[102] = 32'd0; memory[103] = 32'd0; memory[104] = 32'd0; memory[105] = 32'd0; memory[106] = 32'd0; memory[107] = 32'd0; memory[108] = 32'd0; memory[109] = 32'd0; memory[110] = 32'd0; memory[111] = 32'd0; memory[112] = 32'd0; memory[113] = 32'd0; memory[114] = 32'd0; memory[115] = 32'd0; memory[116] = 32'd0; memory[117] = 32'd0; memory[118] = 32'd0; memory[119] = 32'd0; memory[120] = 32'd0; memory[121] = 32'd0; memory[122] = 32'd0; memory[123] = 32'd0; memory[124] = 32'd0; memory[125] = 32'd0; memory[126] = 32'd0; memory[127] = 32'd0; memory[128] = 32'd0; memory[129] = 32'd0; memory[130] = 32'd0; memory[131] = 32'd0; memory[132] = 32'd0; memory[133] = 32'd0; memory[134] = 32'd0; memory[135] = 32'd0; memory[136] = 32'd0; memory[137] = 32'd0; memory[138] = 32'd0; memory[139] = 32'd0; memory[140] = 32'd0; memory[141] = 32'd0; memory[142] = 32'd0; memory[143] = 32'd0; memory[144] = 32'd0; memory[145] = 32'd0; memory[146] = 32'd0; memory[147] = 32'd0; memory[148] = 32'd0; memory[149] = 32'd0; memory[150] = 32'd0; memory[151] = 32'd0; memory[152] = 32'd0; memory[153] = 32'd0; memory[154] = 32'd0; memory[155] = 32'd0; memory[156] = 32'd0; memory[157] = 32'd0; memory[158] = 32'd0; memory[159] = 32'd0; end always @(posedge sync_100_clk) begin if (externalWritePort__en) memory[bram_address[7:0]] <= externalWritePort__data; end always @(posedge sync_100_clk) begin if (internalWritePort__en) memory[internalBramAddress[7:0]] <= internalWritePort__data; end reg [31:0] _0_; reg [31:0] _1_; always @(posedge sync_100_clk) begin _0_ <= memory[internalBramAddress[7:0]]; _1_ <= memory[bram_address[7:0]]; end assign internalBramReadData = _0_; assign externalReadPort__data = _1_; assign \$2 = 6'h20 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$1 ; assign \$3 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$2 ; assign internal_read_port_masked_bytes = internalBramReadData & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$3 ; assign \$6 = \$4 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$5 ; assign \$8 = { 33'h000000000, \$6 } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$7 ; assign \$10 = \$8 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$9 ; assign \$11 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'ha0; assign \$12 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'ha1; assign \$13 = \$11 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$12 ; assign \$14 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'ha2; assign \$15 = \$13 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$14 ; assign \$16 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:316" *) bram_control_mode_comb; assign \$17 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:320" *) bram_control_mode; assign \$18 = current_tx_byte_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:442" *) cyclic_register_size; assign \$19 = bytes_used >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:444" *) 3'h4; assign \$20 = bytes_used == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:446" *) 3'h4; assign \$21 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:485" *) timer; assign \$22 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:523" *) current_device_index; assign \$23 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:525" *) bram_read_data[4]; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:530" *) bram_read_data[4]; assign \$25 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:530" *) \$24 ; assign \$26 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:533" *) bram_read_data[2]; assign \$27 = \$26 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:533" *) bram_read_data[3]; assign \$28 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) bram_read_data[2]; assign \$29 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) bram_read_data[3]; assign \$30 = \$28 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) \$29 ; assign \$31 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) controller_fsm_state; assign \$32 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$33 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$34 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$35 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$36 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h5; assign \$37 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h6; assign \$38 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h7; assign \$39 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h8; assign \$40 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h9; assign \$41 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'ha; assign \$42 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hb; assign \$43 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hc; assign \$44 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hd; assign \$45 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'he; assign \$46 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hf; assign \$47 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h10; assign \$48 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h11; assign \$49 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h12; assign \$50 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h13; assign \$51 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h14; assign \$52 = bit_time * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:203" *) 6'h28; assign \$53 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'ha0; assign \$54 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'ha1; assign \$55 = \$53 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$54 ; assign \$56 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'ha2; assign \$57 = \$55 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$56 ; assign \$58 = current_enabled_device_index == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:370" *) 3'h4; assign \$59 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:395" *) 3'h4; assign \$60 = rx_packet_size + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:371" *) 3'h4; assign \$61 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:385" *) current_cyclic_register; assign \$62 = current_device_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:397" *) 1'h1; assign \$63 = rx_packet_size + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:403" *) 3'h4; assign \$64 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:416" *) current_tx_word_index; assign \$65 = 5'h18 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:418" *) current_cyclic_register; assign \$66 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) internalBramReadData[7:5]; assign \$67 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) 2'h3; assign \$68 = \$67 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) cyclic_data_enabled; assign \$69 = \$66 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) \$68 ; assign \$70 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:431" *) current_tx_byte_index; assign \$71 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:434" *) 1'h1; assign \$72 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:435" *) 1'h1; assign \$73 = bytes_used >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:444" *) 3'h4; assign \$74 = internal_read_port_masked_bytes << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:451" *) current_tx_bit_index; assign \$75 = { 31'h00000000, tx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:451" *) \$74 ; assign \$76 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:452" *) cyclic_register_starting_byte_index; assign \$78 = internal_read_port_masked_bytes >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:452" *) \$77 ; assign \$79 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:455" *) 1'h1; assign \$80 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:456" *) current_tx_byte_index; assign \$81 = $signed({ 1'h0, cyclic_register_size }) - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:456" *) $signed(\$80 ); assign \$82 = internal_read_port_masked_bytes << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:460" *) current_tx_bit_index; assign \$83 = { 31'h00000000, tx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:460" *) \$82 ; assign \$84 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:463" *) 2'h3; assign \$85 = \$84 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:463" *) cyclic_data_enabled; assign \$86 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:464" *) current_cyclic_register; assign \$87 = \$86 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:464" *) 1'h1; assign \$88 = current_cyclic_register + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:465" *) 1'h1; assign \$89 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:474" *) current_device_index; assign \$90 = previous_rx_packet_size >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:475" *) tx_packet_size; assign \$91 = previous_rx_packet_size - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:476" *) tx_packet_size; assign \$92 = $signed(\$91 ) + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:476" *) $signed(4'h4); assign \$93 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:485" *) timer; assign \$94 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:494" *) pre_timer; assign \$95 = timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:495" *) 1'h1; assign \$96 = pre_timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:498" *) 1'h1; assign \$97 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:523" *) current_device_index; assign \$98 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:525" *) bram_read_data[4]; assign \$99 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:543" *) 3'h4; assign \$100 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:568" *) timer; assign \$101 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:576" *) pre_timer; assign \$102 = timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:577" *) 1'h1; assign \$103 = pre_timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:580" *) 1'h1; assign \$104 = current_cyclic_register + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:590" *) 1'h1; assign \$105 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:592" *) current_cyclic_register; assign \$106 = \$105 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:592" *) 1'h1; assign \$107 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) internalBramReadData[2:0]; assign \$108 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) 2'h3; assign \$109 = \$108 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) rx_cyclic_data_enabled; assign \$110 = \$107 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) \$109 ; assign \$111 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) 3'h4; assign \$112 = current_enabled_device_index == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) 3'h4; assign \$113 = current_enabled_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) last_enabled_device_index; assign \$114 = \$112 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) \$113 ; assign \$115 = \$111 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) \$114 ; assign \$116 = internalBramReadData[4:3] + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:630" *) internalBramReadData[2:0]; assign \$117 = \$116 <= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:630" *) 3'h4; assign \$118 = 5'h10 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:634" *) current_cyclic_register; assign \$120 = bram_read_data >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$119 ; assign \$121 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) internalBramReadData[2:0]; assign \$123 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$122 ; assign \$124 = \$120 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$123 ; assign \$125 = internalBramReadData[4:3] + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:639" *) internalBramReadData[2:0]; assign \$126 = \$125 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:639" *) 3'h4; assign \$127 = current_rx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:642" *) 1'h1; assign \$128 = 1'h0 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:643" *) current_rx_word_index; assign \$129 = \$128 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:643" *) 1'h1; assign \$131 = bram_read_data >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$130 ; assign \$132 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) internalBramReadData[2:0]; assign \$134 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$133 ; assign \$135 = \$131 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$134 ; assign \$136 = 1'h0 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:654" *) current_rx_word_index; assign \$137 = \$136 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:654" *) 1'h1; assign \$138 = current_rx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:655" *) 1'h1; assign \$139 = 5'h10 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:682" *) current_cyclic_register; assign \$140 = cyclic_register_starting_byte_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) cyclic_register_size; assign \$141 = \$140 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) 3'h4; assign \$142 = $signed(4'h4) - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) $signed(\$141 ); assign \$144 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) \$143 ; assign \$145 = bram_read_data & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:684" *) \$144 ; assign \$146 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:686" *) cyclic_register_starting_byte_index; assign \$148 = \$145 << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:684" *) \$147 ; assign \$149 = { 127'h00000000000000000000000000000000, rx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:683" *) \$148 ; assign \$150 = current_device_index < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:694" *) 3'h4; assign \$151 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:731" *) 3'h4; assign \$152 = current_device_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:732" *) 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:174" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) word_time <= 16'h0000; else word_time <= \$153 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:173" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_word_time <= 1'h0; else update_word_time <= \$154 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:134" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalBramAddress <= 16'h0000; else internalBramAddress <= \$155 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_tx_device_config_wait_read_delay <= 1'h0; else get_tx_device_config_wait_read_delay <= \$156 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) wait_tx_start_read_status_read_delay <= 1'h0; else wait_tx_start_read_status_read_delay <= \$157 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) wait_for_final_rx_packet_read_delay <= 1'h0; else wait_for_final_rx_packet_read_delay <= \$158 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_rx_register_config_read_delay <= 1'h0; else get_rx_register_config_read_delay <= \$159 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_rx_register_config_first_read_delay <= 1'h0; else get_rx_register_config_first_read_delay <= \$160 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start_rx_read_delay <= 1'h0; else start_rx_read_delay <= \$161 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:267" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_control_mode <= 1'h0; else bram_control_mode <= \$162 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:145" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start_transfers <= 1'h0; else start_transfers <= \$163 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:146" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bit_time <= 32'd0; else bit_time <= \$164 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:291" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) last_bram_address <= 16'h0000; else last_bram_address <= bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:137" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__en <= 1'h0; else internalWritePort__en <= \$165 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) controller_fsm_state <= 5'h00; else controller_fsm_state <= \$166 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:147" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_busy <= 1'h0; else update_busy <= \$167 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:148" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_done <= 1'h0; else update_done <= \$168 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:149" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_error <= 1'h0; else update_error <= \$169 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:158" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_device_index <= 8'h00; else current_device_index <= \$170 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:160" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) last_enabled_device_index <= 8'h00; else last_enabled_device_index <= \$171 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:159" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_enabled_device_index <= 8'h00; else current_enabled_device_index <= \$172 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:166" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_tx_byte_index <= 2'h0; else current_tx_byte_index <= \$173 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:167" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_rx_byte_index <= 2'h0; else current_rx_byte_index <= \$174 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:168" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_rx_word_index <= 3'h0; else current_rx_word_index <= \$175 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:169" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_tx_word_index <= 3'h0; else current_tx_word_index <= \$176 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:176" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_cyclic_register <= 3'h0; else current_cyclic_register <= \$177 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:171" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timer <= 4'h0; else timer <= \$178 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:172" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) pre_timer <= 16'h0000; else pre_timer <= \$179 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:183" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_data_enabled <= 1'h0; else cyclic_data_enabled <= \$180 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:164" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) previous_rx_packet_size <= 4'h0; else previous_rx_packet_size <= \$181 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:163" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_packet_size <= 4'h0; else rx_packet_size <= \$182 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_write_enable$83 <= 1'h0; else \bram_write_enable$83 <= \$183 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_address$84 <= 16'h0000; else \bram_address$84 <= \$184 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:178" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_register_size <= 3'h0; else cyclic_register_size <= \$185 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:179" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_register_starting_byte_index <= 2'h0; else cyclic_register_starting_byte_index <= \$186 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_write_data$85 <= 32'd0; else \bram_write_data$85 <= \$187 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:162" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_packet_size <= 4'h0; else tx_packet_size <= \$188 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:155" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_data <= 32'd0; else tx_data <= \$189 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:136" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__data <= 32'd0; else internalWritePort__data <= \$190 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:156" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_data <= 32'd0; else rx_data <= \$191 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:184" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_cyclic_data_enabled <= 1'h0; else rx_cyclic_data_enabled <= \$192 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:108" *) \Controller.em_serial_controller_A.drive_serial_port drive_serial_port ( .address(\bram_address$84 ), .bram_read_data(bram_read_data), .bram_write_data(\bram_write_data$85 ), .bram_write_enable(\bram_write_enable$83 ), .debugPins(debugPins), .rx(rx), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .tx(tx) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end bram_control_mode_comb = 1'h0; if (\$15 ) begin bram_control_mode_comb = 1'h1; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \bram_read_data$40 = 32'd0; casez (last_bram_address) 16'h00a2: if (bram_control_mode) begin \bram_read_data$40 = { 29'h00000000, update_error, update_done, update_busy }; end endcase if (\$17 ) begin \bram_read_data$40 = externalReadPort__data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end externalWritePort__data = 32'd0; if (\$16 ) begin externalWritePort__data = bram_write_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end externalWritePort__en = 1'h0; if (\$16 ) begin externalWritePort__en = bram_write_enable; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end debugPins_fsm = 5'h00; casez (controller_fsm_state) 5'h00: debugPins_fsm = 5'h01; 5'h01: debugPins_fsm = 5'h02; 5'h02: debugPins_fsm = 5'h03; 5'h03: debugPins_fsm = 5'h04; 5'h05: debugPins_fsm = 5'h05; 5'h06: debugPins_fsm = 5'h06; 5'h07: debugPins_fsm = 5'h07; 5'h08: debugPins_fsm = 5'h08; 5'h09: debugPins_fsm = 5'h09; 5'h0a: debugPins_fsm = 5'h0a; 5'h0b: debugPins_fsm = 5'h0b; 5'h0c: debugPins_fsm = 5'h0c; 5'h04: debugPins_fsm = 5'h0d; 5'h0f: debugPins_fsm = 5'h0e; 5'h0d: debugPins_fsm = 5'h0e; 5'h11: debugPins_fsm = 5'h0f; 5'h10: debugPins_fsm = 5'h10; 5'h12: debugPins_fsm = 5'h11; 5'h13: debugPins_fsm = 5'h12; 5'h14: debugPins_fsm = 5'h13; 5'h0e: debugPins_fsm = 5'h14; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end use_future_device_bram = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: use_future_device_bram = 1'h1; 5'h03: use_future_device_bram = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end bytes_used = 4'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: bytes_used = \$18 ; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end offset = 3'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: if (\$19 ) begin (* full_case = 32'd1 *) if (\$20 ) begin offset = 3'h4; end else begin offset = 3'h3; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end serial_port_tx_trigger = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: if (\$21 ) begin serial_port_tx_trigger = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end rx_invalid_crc_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$25 ) begin rx_invalid_crc_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end rx_not_finished_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$27 ) begin rx_not_finished_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end rx_no_response_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$30 ) begin rx_no_response_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end use_previous_device_bram = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin use_previous_device_bram = 1'h1; end end 5'h04: /* empty */; 5'h0f: use_previous_device_bram = 1'h1; 5'h0d: use_previous_device_bram = 1'h1; 5'h11: /* empty */; 5'h10: use_previous_device_bram = 1'h1; 5'h12: use_previous_device_bram = 1'h1; 5'h13: use_previous_device_bram = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end serial_port_rx_trigger = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: serial_port_rx_trigger = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$153 = word_time; if (update_word_time) begin \$153 = \$52 [15:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$154 = update_word_time; if (update_word_time) begin \$154 = 1'h0; end if (bram_write_enable) begin casez (bram_address) 16'h00a0: /* empty */; 16'h00a1: \$154 = 1'h1; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$155 [4:0] = internalBramAddress[4:0]; (* full_case = 32'd1 *) if (use_previous_device_bram) begin \$155 [15:5] = { 3'h0, last_enabled_device_index }; end else if (use_future_device_bram) begin \$155 [15:5] = { 3'h0, current_device_index }; end else begin \$155 [15:5] = { 3'h0, current_enabled_device_index }; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: \$155 [4:0] = 5'h00; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$155 [4:0] = \$61 ; end 5'h05: \$155 [4:0] = \$65 [4:0]; 5'h06: /* empty */; 5'h07: if (\$85 ) begin \$155 [4:0] = \$87 [4:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$155 [4:0] = 5'h01; end end 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$155 [4:0] = \$106 [4:0]; end 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$155 [4:0] = 5'h08; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin if (\$117 ) begin \$155 [4:0] = \$118 [4:0]; end end 5'h12: /* empty */; 5'h13: \$155 [4:0] = \$139 [4:0]; 5'h14: /* empty */; 5'h0e: \$155 [4:0] = 5'h00; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$156 = get_tx_device_config_wait_read_delay; if (get_tx_device_config_wait_read_delay) begin \$156 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: \$156 = 1'h1; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin end else if (\$59 ) begin \$156 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$157 = wait_tx_start_read_status_read_delay; if (wait_tx_start_read_status_read_delay) begin \$157 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: \$157 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$158 = wait_for_final_rx_packet_read_delay; if (wait_for_final_rx_packet_read_delay) begin \$158 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: if (\$100 ) begin \$158 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$159 = get_rx_register_config_read_delay; if (get_rx_register_config_read_delay) begin \$159 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$159 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$160 = get_rx_register_config_first_read_delay; if (get_rx_register_config_first_read_delay) begin \$160 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$160 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$161 = start_rx_read_delay; if (start_rx_read_delay) begin \$161 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$161 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end (* full_case = 32'd1 *) if (\$57 ) begin \$162 = 1'h1; end else begin \$162 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$163 = start_transfers; if (bram_write_enable) begin casez (bram_address) 16'h00a0: \$163 = bram_write_data[0]; endcase end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$163 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$164 = bit_time; if (bram_write_enable) begin casez (bram_address) 16'h00a0: /* empty */; 16'h00a1: \$164 = bram_write_data; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$165 = internalWritePort__en; casez (controller_fsm_state) 5'h00: \$165 = 1'h0; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$165 = 1'h1; end end 5'h04: /* empty */; 5'h0f: \$165 = 1'h0; 5'h0d: \$165 = 1'h0; 5'h11: \$165 = 1'h0; 5'h10: if (\$110 ) begin if (\$117 ) begin \$165 = 1'h1; end end 5'h12: /* empty */; 5'h13: \$165 = 1'h1; 5'h14: /* empty */; 5'h0e: \$165 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$166 = controller_fsm_state; casez (controller_fsm_state) 5'h00: if (start_transfers) begin \$166 = 5'h01; end 5'h01: \$166 = 5'h02; 5'h02: if (get_tx_device_config_wait_read_delay) begin \$166 = 5'h03; end 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$166 = 5'h04; end else if (internalBramReadData[0]) begin \$166 = 5'h05; end else if (\$59 ) begin \$166 = 5'h02; end else begin \$166 = 5'h04; end 5'h05: \$166 = 5'h06; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin \$166 = 5'h07; end else begin \$166 = 5'h08; end 5'h07: (* full_case = 32'd1 *) if (\$85 ) begin \$166 = 5'h05; end else begin \$166 = 5'h08; end 5'h08: \$166 = 5'h09; 5'h09: if (\$93 ) begin \$166 = 5'h0a; end 5'h0a: if (wait_tx_start_read_status_read_delay) begin \$166 = 5'h0b; end 5'h0b: if (bram_read_data[1]) begin \$166 = 5'h0c; end 5'h0c: if (bram_read_data[0]) begin (* full_case = 32'd1 *) if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin \$166 = 5'h0d; end else begin (* full_case = 32'd1 *) if (\$99 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end end end else begin \$166 = 5'h0e; end end 5'h04: if (\$100 ) begin if (wait_for_final_rx_packet_read_delay) begin \$166 = 5'h0c; end end 5'h0f: if (get_rx_register_config_read_delay) begin \$166 = 5'h10; end 5'h0d: if (get_rx_register_config_first_read_delay) begin \$166 = 5'h10; end 5'h11: \$166 = 5'h10; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin \$166 = 5'h0f; end else begin \$166 = 5'h12; end end else if (\$115 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end 5'h12: \$166 = 5'h13; 5'h13: \$166 = 5'h0f; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end 5'h0e: if (start_rx_read_delay) begin \$166 = 5'h02; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$167 = update_busy; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$167 = 1'h1; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin (* full_case = 32'd1 *) if (\$99 ) begin end else begin \$167 = 1'h0; end end end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin end else if (\$115 ) begin end else begin \$167 = 1'h0; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin end else begin \$167 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$168 = update_done; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$168 = 1'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin (* full_case = 32'd1 *) if (\$99 ) begin end else begin \$168 = 1'h1; end end end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin end else if (\$115 ) begin end else begin \$168 = 1'h1; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin end else begin \$168 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$169 = update_error; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$169 = 1'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin \$169 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$170 = current_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$170 = 8'h00; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin end else if (\$59 ) begin \$170 = \$62 [7:0]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin end else begin if (\$151 ) begin \$170 = \$152 [7:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$171 = last_enabled_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$171 = 8'h00; 5'h02: /* empty */; 5'h03: \$171 = current_enabled_device_index; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$172 = current_enabled_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$172 = 8'h00; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$172 = current_device_index; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$173 = current_tx_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$173 = 2'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: (* full_case = 32'd1 *) if (\$73 ) begin \$173 = \$81 [1:0]; end else begin \$173 = bytes_used[1:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$173 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$174 = current_rx_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$174 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$175 = current_rx_word_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$175 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$175 = 3'h0; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin if (\$126 ) begin \$175 = \$127 [2:0]; end end else begin \$175 = \$138 [2:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$176 = current_tx_word_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$176 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$176 = \$71 [2:0]; end end 5'h07: if (\$73 ) begin \$176 = \$79 [2:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$176 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$177 = current_cyclic_register; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$177 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: if (\$85 ) begin \$177 = \$88 [2:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$177 = \$104 [2:0]; end 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$177 = 3'h0; end 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$177 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$178 = timer; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$178 = 4'h0; 5'h02: /* empty */; 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$178 = \$60 [3:0]; end else if (internalBramReadData[0]) begin end else if (\$59 ) begin end else begin \$178 = \$63 [3:0]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: if (\$89 ) begin (* full_case = 32'd1 *) if (\$90 ) begin \$178 = \$92 [3:0]; end else begin \$178 = 4'h4; end end 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin end else begin if (\$94 ) begin \$178 = \$95 [3:0]; end end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: (* full_case = 32'd1 *) if (\$100 ) begin end else begin if (\$101 ) begin \$178 = \$102 [3:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$179 = pre_timer; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$179 = 16'h0000; 5'h02: /* empty */; 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$179 = word_time; end else if (internalBramReadData[0]) begin end else if (\$59 ) begin end else begin \$179 = word_time; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: \$179 = word_time; 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin end else begin (* full_case = 32'd1 *) if (\$94 ) begin \$179 = word_time; end else begin \$179 = \$96 [15:0]; end end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: (* full_case = 32'd1 *) if (\$100 ) begin end else begin (* full_case = 32'd1 *) if (\$101 ) begin \$179 = word_time; end else begin \$179 = \$103 [15:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$180 = cyclic_data_enabled; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$180 = internalBramReadData[1]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$180 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$181 = previous_rx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$181 = rx_packet_size; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$182 = rx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin (* full_case = 32'd1 *) if (internalBramReadData[1]) begin \$182 = internalBramReadData[5:2]; end else begin \$182 = 4'h3; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$183 = \bram_write_enable$83 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: \$183 = 1'h0; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$183 = 1'h1; end end 5'h07: if (\$73 ) begin \$183 = 1'h1; end 5'h08: /* empty */; 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin \$183 = 1'h1; end else begin \$183 = 1'h0; end 5'h0a: \$183 = 1'h0; 5'h0b: /* empty */; 5'h0c: (* full_case = 32'd1 *) if (bram_read_data[0]) begin end else begin \$183 = 1'h0; end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin \$183 = 1'h0; end else begin \$183 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$184 = \bram_address$84 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: \$184 = { 11'h000, \$64 }; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: if (\$93 ) begin \$184 = 16'h8000; end 5'h0a: \$184 = 16'h8002; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: if (\$100 ) begin \$184 = 16'h8002; end 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$184 = 16'h0000; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin if (\$126 ) begin \$184 = { 11'h000, \$129 }; end end else begin \$184 = { 11'h000, \$137 }; end end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$184 = 16'h8000; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$185 = cyclic_register_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: if (\$69 ) begin \$185 = internalBramReadData[7:5]; end 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin \$185 = internalBramReadData[2:0]; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$185 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$186 = cyclic_register_starting_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: if (\$69 ) begin \$186 = internalBramReadData[9:8]; end 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin \$186 = internalBramReadData[4:3]; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$186 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$187 = \bram_write_data$85 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$187 = tx_data; end end 5'h07: if (\$73 ) begin \$187 = \$75 [31:0]; end 5'h08: /* empty */; 5'h09: if (\$93 ) begin \$187 = \$10 [31:0]; end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$187 = \$10 [31:0]; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$188 = tx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$188 = \$72 ; end end 5'h07: (* full_case = 32'd1 *) if (\$85 ) begin end else begin \$188 = { 1'h0, current_tx_word_index }; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$189 = tx_data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: (* full_case = 32'd1 *) if (\$73 ) begin \$189 = \$78 ; end else begin \$189 = \$83 [31:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$189 = 32'd0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$190 = internalWritePort__data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$190 = { 29'h00000000, rx_invalid_crc_fault, rx_not_finished_fault, rx_no_response_fault }; end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin if (\$117 ) begin \$190 = \$124 ; end end 5'h12: /* empty */; 5'h13: \$190 = \$149 [31:0]; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$191 = rx_data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin end else begin \$191 = \$135 ; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$14 ) begin end \$192 = rx_cyclic_data_enabled; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin end else begin \$192 = cyclic_data_enabled; end endcase end assign \rx$1 = rx; assign \tx$3 = tx; assign \debugPins$5 = debugPins; assign internalReadPort__addr = internalBramAddress[7:0]; assign internalWritePort__addr = internalBramAddress[7:0]; assign internalBramWriteData = internalWritePort__data; assign internalBramWriteEnable = internalWritePort__en; assign internalReadPort__data = internalBramReadData; assign cyclic_read_data_size = internalBramReadData[2:0]; assign cyclic_read_data_starting_byte_index = internalBramReadData[4:3]; assign cyclic_write_data_size = internalBramReadData[7:5]; assign cyclic_write_data_starting_byte_index = internalBramReadData[9:8]; assign serial_port_control_data = \$10 [31:0]; assign serial_port_tx_done = bram_read_data[0]; assign serial_port_rx_done = bram_read_data[2]; assign serial_port_tx_busy = bram_read_data[1]; assign serial_port_rx_busy = bram_read_data[3]; assign serial_port_rx_crc_valid = bram_read_data[4]; assign externalReadPort__addr = bram_address[7:0]; assign externalWritePort__addr = bram_address[7:0]; assign cyclic_register_starting_bit_index = { cyclic_register_starting_byte_index, 3'h0 }; assign current_tx_bit_index = { current_tx_byte_index, 3'h0 }; assign \$1 = { cyclic_register_size, 3'h0 }; assign \$4 = { 1'h0, serial_port_tx_trigger }; assign \$5 = { serial_port_rx_trigger, 1'h0 }; assign \$7 = { 15'h0000, tx_packet_size, 16'h0000 }; assign \$9 = { 7'h00, rx_packet_size, 24'h000000 }; assign \$77 = { \$76 , 3'h0 }; assign \$119 = { internalBramReadData[4:3], 3'h0 }; assign \$122 = { \$121 , 3'h0 }; assign \$130 = { internalBramReadData[4:3], 3'h0 }; assign \$133 = { \$132 , 3'h0 }; assign \$143 = { \$142 , 3'h0 }; assign \$147 = { \$146 , 3'h0 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:67" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_A.drive_serial_port (sync_100_rst, rx, bram_write_enable, address, bram_write_data, bram_read_data, debugPins, tx, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$15 = 0; wire \$1 ; wire \$10 ; reg \$100 ; reg \$101 ; reg \$102 ; reg [8:0] \$103 ; reg [2:0] \$104 ; reg \$105 ; reg \$106 ; reg \$107 ; reg [3:0] \$108 ; reg [1:0] \$109 ; wire \$11 ; reg [7:0] \$110 ; reg [10:0] \$111 ; reg \$112 ; reg [31:0] \$113 ; reg [2:0] \$114 ; reg \$115 ; reg \$116 ; reg [3:0] \$117 ; reg [1:0] \$118 ; reg [7:0] \$119 ; wire \$12 ; reg [10:0] \$120 ; reg \$121 ; reg [31:0] \$122 ; reg [31:0] \$123 ; reg [31:0] \$124 ; reg [7:0] \$125 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire \$17 ; wire \$18 ; wire \$19 ; wire [9:0] \$191 ; wire \$193 ; wire \$2 ; wire \$20 ; wire [2:0] \$21 ; wire \$22 ; wire [7:0] \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire [9:0] \$28 ; wire \$29 ; wire \$3 ; wire \$30 ; wire [5:0] \$31 ; wire [6:0] \$32 ; wire \$33 ; wire [5:0] \$34 ; wire [6:0] \$35 ; wire \$36 ; wire [10:0] \$37 ; wire [11:0] \$38 ; wire \$39 ; wire \$4 ; wire \$40 ; wire [10:0] \$41 ; wire \$42 ; wire [5:0] \$43 ; wire [6:0] \$44 ; wire \$45 ; wire [5:0] \$46 ; wire [6:0] \$47 ; wire \$48 ; wire [4:0] \$49 ; wire \$5 ; wire [10:0] \$50 ; wire [11:0] \$51 ; wire \$52 ; wire \$53 ; wire \$54 ; wire \$55 ; wire \$56 ; wire [8:0] \$57 ; wire [8:0] \$58 ; wire \$59 ; wire \$6 ; wire [2:0] \$60 ; wire [11:0] \$61 ; wire \$62 ; wire \$63 ; wire \$64 ; wire \$65 ; wire [9:0] \$66 ; wire [10:0] \$67 ; wire [11:0] \$68 ; wire [11:0] \$69 ; wire \$7 ; wire \$70 ; wire [5:0] \$71 ; wire [6:0] \$72 ; wire \$73 ; wire [4:0] \$74 ; wire [10:0] \$75 ; wire [11:0] \$76 ; wire \$77 ; wire \$78 ; wire \$79 ; wire \$8 ; wire \$80 ; wire \$81 ; wire \$82 ; wire [8:0] \$83 ; wire [2:0] \$84 ; wire [11:0] \$85 ; reg \$86 ; reg \$87 ; reg \$88 ; reg [7:0] \$89 ; wire \$9 ; reg [7:0] \$90 ; reg [9:0] \$91 ; reg [1:0] \$92 ; reg [31:0] \$93 ; reg [15:0] \$94 ; reg \$95 ; reg [31:0] \$96 ; reg \$97 ; reg \$98 ; reg \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) input [15:0] address; wire [15:0] address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:76" *) reg [9:0] bitLength = 10'h008; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:142" *) reg bram_control_mode = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:34" *) output [31:0] bram_read_data; reg [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) input [31:0] bram_write_data; wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [31:0] \crc$62 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) reg [31:0] data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) reg [31:0] \data$63 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:62" *) output [7:0] debugPins; reg [7:0] debugPins; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:136" *) reg [8:0] delay_cnt = 9'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:137" *) reg delay_cnt_increment; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:138" *) reg delay_cnt_reset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [3:0] externalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] externalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [3:0] externalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] externalWritePort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg externalWritePort__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [3:0] internalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] internalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:105" *) reg [15:0] internalReadWriteAddress = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [3:0] internalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] internalWritePort__data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg internalWritePort__en = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:97" *) wire [31:0] readData; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:37" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:26" *) reg rxBusy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:29" *) reg rxCRCvalid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:129" *) reg [3:0] rxCurrentBit = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:130" *) reg [1:0] rxCurrentByte = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:131" *) reg [7:0] rxCurrentWord = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:111" *) reg [31:0] rxData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:28" *) reg rxDone = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:112" *) reg [31:0] rxNewData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:113" *) reg [7:0] rxNewDataIndex = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:73" *) reg [7:0] rxPacketSize = 8'h01; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:127" *) reg [10:0] rxTimer = 11'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:116" *) reg rxWriteDataRequest = 1'h0; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] rx_fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:71" *) reg rx_start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) wire rx_synced; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg \start$49 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) output tx; reg tx = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:25" *) reg txBusy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:123" *) reg [3:0] txCurrentBit = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:124" *) reg [1:0] txCurrentByte = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:125" *) reg [7:0] txCurrentWord = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:27" *) reg txDone = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:72" *) reg [7:0] txPacketSize = 8'h01; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:114" *) reg [31:0] txReadData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:118" *) reg txReadDataRequest = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:119" *) reg [1:0] txReadDataRequestWait = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:121" *) reg [10:0] txTimer = 11'h000; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] tx_fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:70" *) reg tx_start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:117" *) reg updateStatusDataRequest = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg \valid$48 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:95" *) wire [31:0] writeData; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:96" *) wire writeEnable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:87" *) reg [31:0] memory [15:0]; initial begin memory[0] = 32'd0; memory[1] = 32'd0; memory[2] = 32'd0; memory[3] = 32'd0; memory[4] = 32'd0; memory[5] = 32'd0; memory[6] = 32'd0; memory[7] = 32'd0; memory[8] = 32'd0; memory[9] = 32'd0; memory[10] = 32'd0; memory[11] = 32'd0; memory[12] = 32'd0; memory[13] = 32'd0; memory[14] = 32'd0; memory[15] = 32'd0; end always @(posedge sync_100_clk) begin if (externalWritePort__en) memory[address[3:0]] <= externalWritePort__data; end always @(posedge sync_100_clk) begin if (internalWritePort__en) memory[internalReadWriteAddress[3:0]] <= internalWritePort__data; end reg [31:0] _0_; reg [31:0] _1_; always @(posedge sync_100_clk) begin _0_ <= memory[internalReadWriteAddress[3:0]]; _1_ <= memory[address[3:0]]; end assign internalReadPort__data = _0_; assign readData = _1_; assign \$2 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:167" *) address[15]; assign \$4 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:330" *) 7'h64; assign \$5 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:339" *) rx_synced; assign \$6 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:344" *) 9'h12c; assign \$7 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) tx_fsm_state; assign \$8 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$9 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$10 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$11 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$12 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) rx_fsm_state; assign \$13 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$14 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$15 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$16 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$17 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h5; assign \$18 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h6; assign \$19 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h7; assign \$20 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:174" *) txReadDataRequestWait; assign \$21 = txReadDataRequestWait - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:175" *) 1'h1; assign \$22 = txReadDataRequestWait == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:176" *) 1'h1; assign \$28 = delay_cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:206" *) 1'h1; assign \$29 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:234" *) txTimer; assign \$30 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:235" *) txPacketSize; assign \$31 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:236" *) 4'h8; assign \$32 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:236" *) \$31 ; assign \$33 = crc >> \$32 ; assign \$34 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:238" *) 4'h8; assign \$35 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:238" *) \$34 ; assign \$36 = txReadData >> \$35 ; assign \$37 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:240" *) 1'h1; assign \$38 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:244" *) 1'h1; assign \$39 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:247" *) txTimer; assign \$40 = txCurrentBit == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:249" *) 4'h8; assign \$41 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:251" *) 1'h1; assign \$42 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:255" *) txPacketSize; assign \$43 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:256" *) 4'h8; assign \$44 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:256" *) \$43 ; assign \$45 = crc >> \$44 ; assign \$46 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:258" *) 4'h8; assign \$47 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:258" *) \$46 ; assign \$48 = txReadData >> \$47 ; assign \$49 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:260" *) 1'h1; assign \$50 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:261" *) 1'h1; assign \$51 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:264" *) 1'h1; assign \$52 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:267" *) txTimer; assign \$53 = txCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) 2'h3; assign \$54 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) txPacketSize; assign \$55 = \$53 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) \$54 ; assign \$56 = txCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:284" *) 2'h3; assign \$57 = txCurrentWord + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:286" *) 1'h1; assign \$58 = txPacketSize - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:289" *) 1'h1; assign \$59 = txCurrentWord != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:289" *) \$58 ; assign \$60 = txCurrentByte + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:293" *) 1'h1; assign \$61 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:300" *) 1'h1; assign \$62 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:330" *) 7'h64; assign \$63 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:344" *) 9'h12c; assign \$65 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:361" *) rx_synced; assign \$191 = bitLength / (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) 2'h2; assign \$67 = bitLength + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) \$66 ; assign \$68 = \$67 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) 1'h1; assign \$69 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:369" *) 1'h1; assign \$70 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:376" *) rxTimer; assign \$71 = rxCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:377" *) 4'h8; assign \$72 = rxCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:377" *) \$71 ; assign \$73 = rxCurrentBit == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:379" *) 3'h7; assign \$74 = rxCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:384" *) 1'h1; assign \$75 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:385" *) 1'h1; assign \$76 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:389" *) 1'h1; assign \$77 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:396" *) rxTimer; assign \$78 = rxCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) 2'h3; assign \$79 = rxCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) rxPacketSize; assign \$80 = \$78 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) \$79 ; assign \$81 = \crc$62 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:406" *) rxData; assign \$82 = rxCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:419" *) 2'h3; assign \$83 = rxCurrentWord + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:421" *) 1'h1; assign \$84 = rxCurrentByte + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:429" *) 1'h1; assign \$85 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:434" *) 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_control_mode <= 1'h0; else bram_control_mode <= \$86 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:70" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_start <= 1'h0; else tx_start <= \$87 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:71" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_start <= 1'h0; else rx_start <= \$88 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:72" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txPacketSize <= 8'h01; else txPacketSize <= \$89 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:73" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxPacketSize <= 8'h01; else rxPacketSize <= \$90 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:76" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bitLength <= 10'h008; else bitLength <= \$91 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:119" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadDataRequestWait <= 2'h0; else txReadDataRequestWait <= \$92 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:114" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadData <= 32'd0; else txReadData <= \$93 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:105" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalReadWriteAddress <= 16'h0000; else internalReadWriteAddress <= \$94 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:118" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadDataRequest <= 1'h0; else txReadDataRequest <= \$95 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__data <= 32'd0; else internalWritePort__data <= \$96 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__en <= 1'h0; else internalWritePort__en <= \$97 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:116" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxWriteDataRequest <= 1'h0; else rxWriteDataRequest <= \$98 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) valid <= 1'h0; else valid <= \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start <= 1'h0; else start <= \$100 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \valid$48 <= 1'h0; else \valid$48 <= \$101 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \start$49 <= 1'h0; else \start$49 <= \$102 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:136" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) delay_cnt <= 9'h000; else delay_cnt <= \$103 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_fsm_state <= 3'h0; else tx_fsm_state <= \$104 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:27" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txDone <= 1'h1; else txDone <= \$105 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:25" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txBusy <= 1'h0; else txBusy <= \$106 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx <= 1'h1; else tx <= \$107 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:123" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentBit <= 4'h0; else txCurrentBit <= \$108 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:124" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentByte <= 2'h0; else txCurrentByte <= \$109 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:125" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentWord <= 8'h00; else txCurrentWord <= \$110 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:121" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txTimer <= 11'h000; else txTimer <= \$111 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:117" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) updateStatusDataRequest <= 1'h0; else updateStatusDataRequest <= \$112 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data <= 32'd0; else data <= \$113 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_fsm_state <= 3'h0; else rx_fsm_state <= \$114 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:28" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxDone <= 1'h1; else rxDone <= \$115 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:29" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCRCvalid <= 1'h0; else rxCRCvalid <= \$116 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:129" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentBit <= 4'h0; else rxCurrentBit <= \$117 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:130" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentByte <= 2'h0; else rxCurrentByte <= \$118 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:131" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentWord <= 8'h00; else rxCurrentWord <= \$119 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:127" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxTimer <= 11'h000; else rxTimer <= \$120 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:26" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxBusy <= 1'h0; else rxBusy <= \$121 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:111" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxData <= 32'd0; else rxData <= \$122 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:112" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxNewData <= 32'd0; else rxNewData <= \$123 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \data$63 <= 32'd0; else \data$63 <= \$124 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:113" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxNewDataIndex <= 8'h00; else rxNewDataIndex <= \$125 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:84" *) \Controller.em_serial_controller_A.drive_serial_port.U$3 \U$3 ( .rx(rx), .stage1(rx_synced), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:81" *) \Controller.em_serial_controller_A.drive_serial_port.crc32_rx crc32_rx ( .crc(\crc$62 ), .data_in(\data$63 ), .start(\start$49 ), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .valid(\valid$48 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:80" *) \Controller.em_serial_controller_A.drive_serial_port.crc32_tx crc32_tx ( .crc(crc), .data_in(data), .start(start), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .valid(valid) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end bram_read_data = 32'd0; casez (address) 16'h8002: if (\$1 ) begin bram_read_data = { 27'h0000000, rxCRCvalid, rxBusy, rxDone, txBusy, txDone }; end endcase if (\$2 ) begin bram_read_data = readData; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end externalWritePort__data = 32'd0; if (\$2 ) begin externalWritePort__data = bram_write_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end externalWritePort__en = 1'h0; if (\$2 ) begin externalWritePort__en = bram_write_enable; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: debugPins = 8'h01; 3'h1: debugPins = 8'h02; 3'h2: debugPins = 8'h03; 3'h3: debugPins = 8'h04; 3'h4: debugPins = 8'h05; 3'h5: debugPins = 8'h06; 3'h6: debugPins = 8'h07; 3'h7: debugPins = 8'h08; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end delay_cnt_increment = 1'h0; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: if (\$3 ) begin delay_cnt_increment = 1'h1; end 3'h3: if (\$5 ) begin delay_cnt_increment = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end delay_cnt_reset = 1'h0; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: begin (* full_case = 32'd1 *) if (\$3 ) begin end else begin delay_cnt_reset = 1'h1; end if (\$4 ) begin delay_cnt_reset = 1'h1; end end 3'h3: begin (* full_case = 32'd1 *) if (\$5 ) begin end else begin delay_cnt_reset = 1'h1; end if (\$6 ) begin delay_cnt_reset = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end (* full_case = 32'd1 *) if (address[15]) begin \$86 = 1'h1; end else begin \$86 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$87 = tx_start; if (bram_write_enable) begin casez (address) 16'h8000: \$87 = bram_write_data[0]; endcase end casez (tx_fsm_state) 3'h0: if (tx_start) begin \$87 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$87 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$88 = rx_start; if (bram_write_enable) begin casez (address) 16'h8000: \$88 = bram_write_data[1]; endcase end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: if (rx_start) begin \$88 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$88 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$89 = txPacketSize; if (bram_write_enable) begin casez (address) 16'h8000: \$89 = bram_write_data[23:16]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$90 = rxPacketSize; if (bram_write_enable) begin casez (address) 16'h8000: \$90 = bram_write_data[31:24]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$91 = bitLength; if (bram_write_enable) begin casez (address) 16'h8000: /* empty */; 16'h8001: \$91 = bram_write_data[9:0]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$92 = txReadDataRequestWait; if (\$20 ) begin \$92 = \$21 [1:0]; end if (txReadDataRequest) begin \$92 = 2'h2; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$92 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$93 = txReadData; if (\$20 ) begin if (\$22 ) begin \$93 = internalReadPort__data; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$94 = internalReadWriteAddress; if (txReadDataRequest) begin \$94 = { 8'h00, \$23 }; end else if (rxWriteDataRequest) begin \$94 = { 8'h00, rxNewDataIndex }; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$95 = txReadDataRequest; if (txReadDataRequest) begin \$95 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$95 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin if (\$59 ) begin \$95 = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$96 = internalWritePort__data; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$96 = rxNewData; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$97 = internalWritePort__en; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$97 = 1'h1; end if (internalWritePort__en) begin \$97 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$98 = rxWriteDataRequest; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$98 = 1'h0; end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$98 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$99 = valid; if (\$24 ) begin \$99 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$99 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$100 = start; if (\$25 ) begin \$100 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$100 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$101 = \valid$48 ; if (\$26 ) begin \$101 = 1'h0; end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$101 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$102 = \start$49 ; if (\$27 ) begin \$102 = 1'h0; end casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$102 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$103 = delay_cnt; if (delay_cnt_increment) begin \$103 = \$28 [8:0]; end if (delay_cnt_reset) begin \$103 = 9'h000; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$104 = tx_fsm_state; casez (tx_fsm_state) 3'h0: if (tx_start) begin \$104 = 3'h1; end 3'h1: \$104 = 3'h2; 3'h2: if (\$29 ) begin \$104 = 3'h3; end 3'h3: if (\$39 ) begin if (\$40 ) begin \$104 = 3'h4; end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$104 = 3'h0; end else begin \$104 = 3'h2; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$105 = txDone; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$105 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$105 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$106 = txBusy; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$106 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$106 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$107 = tx; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$107 = 1'h0; 3'h2: if (\$29 ) begin (* full_case = 32'd1 *) if (\$30 ) begin \$107 = \$33 ; end else begin \$107 = \$36 ; end end 3'h3: if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin \$107 = 1'h1; end else begin (* full_case = 32'd1 *) if (\$42 ) begin \$107 = \$45 ; end else begin \$107 = \$48 ; end end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$107 = 1'h1; end else begin \$107 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$108 = txCurrentBit; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$108 = 4'h0; 3'h2: if (\$29 ) begin \$108 = 4'h1; end 3'h3: if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin end else begin \$108 = \$49 [3:0]; end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$108 = 4'h0; end else begin \$108 = 4'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$109 = txCurrentByte; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$109 = 2'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin (* full_case = 32'd1 *) if (\$56 ) begin \$109 = 2'h0; end else begin \$109 = \$60 [1:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$110 = txCurrentWord; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$110 = 8'h00; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$110 = \$57 [7:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$111 = txTimer; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$111 = { 1'h0, bitLength }; 3'h2: (* full_case = 32'd1 *) if (\$29 ) begin \$111 = \$37 ; end else begin \$111 = \$38 [10:0]; end 3'h3: (* full_case = 32'd1 *) if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin \$111 = \$41 ; end else begin \$111 = \$50 ; end end else begin \$111 = \$51 [10:0]; end 3'h4: (* full_case = 32'd1 *) if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin \$111 = { 1'h0, bitLength }; end end else begin \$111 = \$61 [10:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$112 = updateStatusDataRequest; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$112 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$112 = 1'h1; end end endcase (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$112 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$112 = 1'h1; end 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$112 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$113 = data; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$113 = txReadData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$114 = rx_fsm_state; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: if (rx_start) begin \$114 = 3'h1; end 3'h1: \$114 = 3'h2; 3'h2: begin if (\$62 ) begin \$114 = 3'h3; end if (rx_start) begin \$114 = 3'h0; end end 3'h3: begin if (\$63 ) begin \$114 = 3'h4; end if (rx_start) begin \$114 = 3'h0; end end 3'h4: begin if (\$64 ) begin \$114 = 3'h5; end if (rx_start) begin \$114 = 3'h0; end end 3'h5: begin if (\$65 ) begin \$114 = 3'h6; end if (rx_start) begin \$114 = 3'h0; end end 3'h6: begin if (\$70 ) begin if (\$73 ) begin \$114 = 3'h7; end end if (rx_start) begin \$114 = 3'h0; end end 3'h7: begin if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$114 = 3'h0; end else begin \$114 = 3'h5; end end if (rx_start) begin \$114 = 3'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$115 = rxDone; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$115 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$115 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$116 = rxCRCvalid; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$116 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin (* full_case = 32'd1 *) if (\$81 ) begin \$116 = 1'h1; end else begin \$116 = 1'h0; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$117 = rxCurrentBit; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$117 = 4'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$117 = 4'h0; end 3'h6: if (\$70 ) begin (* full_case = 32'd1 *) if (\$73 ) begin end else begin \$117 = \$74 [3:0]; end end 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$117 = 4'h0; end else begin \$117 = 4'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$118 = rxCurrentByte; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$118 = 2'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$118 = 2'h0; end else begin (* full_case = 32'd1 *) if (\$82 ) begin \$118 = 2'h0; end else begin \$118 = \$84 [1:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$119 = rxCurrentWord; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$119 = 8'h00; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$119 = 8'h00; end else begin if (\$82 ) begin \$119 = \$83 [7:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$120 = rxTimer; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: (* full_case = 32'd1 *) if (\$65 ) begin \$120 = \$68 [10:0]; end else begin \$120 = \$69 [10:0]; end 3'h6: (* full_case = 32'd1 *) if (\$70 ) begin (* full_case = 32'd1 *) if (\$73 ) begin \$120 = { 1'h0, bitLength }; end else begin \$120 = \$75 ; end end else begin \$120 = \$76 [10:0]; end 3'h7: (* full_case = 32'd1 *) if (\$77 ) begin end else begin \$120 = \$85 [10:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$121 = rxBusy; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$121 = 1'h1; end 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$121 = 1'h0; end else begin \$121 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$122 = rxData; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: if (\$70 ) begin casez (\$72 ) 7'h00: \$122 [0] = rx_synced; 7'h01: \$122 [1] = rx_synced; 7'h02: \$122 [2] = rx_synced; 7'h03: \$122 [3] = rx_synced; 7'h04: \$122 [4] = rx_synced; 7'h05: \$122 [5] = rx_synced; 7'h06: \$122 [6] = rx_synced; 7'h07: \$122 [7] = rx_synced; 7'h08: \$122 [8] = rx_synced; 7'h09: \$122 [9] = rx_synced; 7'h0a: \$122 [10] = rx_synced; 7'h0b: \$122 [11] = rx_synced; 7'h0c: \$122 [12] = rx_synced; 7'h0d: \$122 [13] = rx_synced; 7'h0e: \$122 [14] = rx_synced; 7'h0f: \$122 [15] = rx_synced; 7'h10: \$122 [16] = rx_synced; 7'h11: \$122 [17] = rx_synced; 7'h12: \$122 [18] = rx_synced; 7'h13: \$122 [19] = rx_synced; 7'h14: \$122 [20] = rx_synced; 7'h15: \$122 [21] = rx_synced; 7'h16: \$122 [22] = rx_synced; 7'h17: \$122 [23] = rx_synced; 7'h18: \$122 [24] = rx_synced; 7'h19: \$122 [25] = rx_synced; 7'h1a: \$122 [26] = rx_synced; 7'h1b: \$122 [27] = rx_synced; 7'h1c: \$122 [28] = rx_synced; 7'h1d: \$122 [29] = rx_synced; 7'h1e: \$122 [30] = rx_synced; 7'h1f: \$122 [31] = rx_synced; endcase end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$123 = rxNewData; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$123 = rxData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$124 = \data$63 ; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$124 = rxData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$15 ) begin end \$125 = rxNewDataIndex; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$125 = rxCurrentWord; end end end endcase end assign externalReadPort__addr = address[3:0]; assign externalWritePort__addr = address[3:0]; assign writeData = externalWritePort__data; assign writeEnable = externalWritePort__en; assign externalReadPort__data = readData; assign internalReadPort__addr = internalReadWriteAddress[3:0]; assign internalWritePort__addr = internalReadWriteAddress[3:0]; assign bram_address = address; assign \$1 = bram_control_mode; assign \$3 = rx_synced; assign { \$23 [7:4], \$23 [2:0] } = { txCurrentWord[7:4], txCurrentWord[2:0] }; assign \$23 [3] = 1'h1; assign \$24 = valid; assign \$25 = start; assign \$26 = \valid$48 ; assign \$27 = \start$49 ; assign \$64 = rx_synced; assign \$193 = 1'h1; assign \$66 = \$191 ; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_A.drive_serial_port.U$3 (sync_100_rst, rx, stage1, sync_100_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:37" *) input rx; wire rx; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) wire rx_synced; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) output stage1; reg stage1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage0 <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage1 <= stage0; assign rx_synced = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_A.drive_serial_port.crc32_rx (sync_100_rst, crc, valid, start, data_in, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$16 = 0; wire [31:0] \$1 ; wire \$10 ; wire \$100 ; wire [31:0] \$1000 ; wire \$1001 ; wire [31:0] \$1002 ; wire \$1003 ; wire [31:0] \$1004 ; wire \$1005 ; wire [31:0] \$1006 ; wire \$1007 ; wire [31:0] \$1008 ; wire \$1009 ; wire [31:0] \$101 ; wire [31:0] \$1010 ; wire \$1011 ; wire [31:0] \$1012 ; wire \$1013 ; wire [31:0] \$1014 ; wire \$1015 ; wire \$1016 ; wire \$1017 ; wire \$1018 ; wire \$1019 ; wire \$102 ; wire \$1020 ; wire \$1021 ; wire \$1022 ; wire \$1023 ; wire \$1024 ; wire \$1025 ; wire \$1026 ; wire \$1027 ; wire \$1028 ; wire \$1029 ; wire [31:0] \$103 ; wire [31:0] \$1030 ; wire \$1031 ; wire [31:0] \$1032 ; wire \$1033 ; wire [31:0] \$1034 ; wire \$1035 ; wire [31:0] \$1036 ; wire \$1037 ; wire [31:0] \$1038 ; wire \$1039 ; wire \$104 ; wire [31:0] \$1040 ; wire \$1041 ; wire [31:0] \$1042 ; wire \$1043 ; wire [31:0] \$1044 ; wire \$1045 ; wire [31:0] \$1046 ; wire \$1047 ; wire [31:0] \$1048 ; wire \$1049 ; wire [31:0] \$105 ; wire [31:0] \$1050 ; wire \$1051 ; wire [31:0] \$1052 ; wire \$1053 ; wire [31:0] \$1054 ; wire \$1055 ; wire \$1056 ; wire \$1057 ; wire \$1058 ; wire \$1059 ; wire \$106 ; wire \$1060 ; wire \$1061 ; wire \$1062 ; wire \$1063 ; wire \$1064 ; wire \$1065 ; wire \$1066 ; wire \$1067 ; wire \$1068 ; wire [31:0] \$1069 ; wire [31:0] \$107 ; wire \$1070 ; wire [31:0] \$1071 ; wire \$1072 ; wire [31:0] \$1073 ; wire \$1074 ; wire [31:0] \$1075 ; wire \$1076 ; wire [31:0] \$1077 ; wire \$1078 ; wire [31:0] \$1079 ; wire \$108 ; wire \$1080 ; wire [31:0] \$1081 ; wire \$1082 ; wire [31:0] \$1083 ; wire \$1084 ; wire [31:0] \$1085 ; wire \$1086 ; wire [31:0] \$1087 ; wire \$1088 ; wire [31:0] \$1089 ; wire [31:0] \$109 ; wire \$1090 ; wire [31:0] \$1091 ; wire \$1092 ; wire [31:0] \$1093 ; wire \$1094 ; wire \$1095 ; wire \$1096 ; wire \$1097 ; wire \$1098 ; wire \$1099 ; wire [31:0] \$11 ; wire \$110 ; wire \$1100 ; wire \$1101 ; wire \$1102 ; wire \$1103 ; wire \$1104 ; wire \$1105 ; wire \$1106 ; wire \$1107 ; wire [31:0] \$1108 ; wire \$1109 ; wire \$111 ; wire [31:0] \$1110 ; wire \$1111 ; wire [31:0] \$1112 ; wire \$1113 ; wire [31:0] \$1114 ; wire \$1115 ; wire [31:0] \$1116 ; wire \$1117 ; wire [31:0] \$1118 ; wire \$1119 ; wire \$112 ; wire [31:0] \$1120 ; wire \$1121 ; wire [31:0] \$1122 ; wire \$1123 ; wire [31:0] \$1124 ; wire \$1125 ; wire [31:0] \$1126 ; wire \$1127 ; wire [31:0] \$1128 ; wire \$1129 ; wire \$113 ; wire [31:0] \$1130 ; wire \$1131 ; wire [31:0] \$1132 ; wire \$1133 ; wire [31:0] \$1134 ; wire \$1135 ; wire [31:0] \$1136 ; wire \$1137 ; wire \$1138 ; wire \$1139 ; wire \$114 ; wire \$1140 ; wire \$1141 ; wire \$1142 ; wire \$1143 ; wire \$1144 ; wire \$1145 ; wire \$1146 ; wire \$1147 ; wire \$1148 ; wire \$1149 ; wire \$115 ; wire \$1150 ; wire \$1151 ; wire \$1152 ; wire [31:0] \$1153 ; wire \$1154 ; wire [31:0] \$1155 ; wire \$1156 ; wire [31:0] \$1157 ; wire \$1158 ; wire [31:0] \$1159 ; wire \$116 ; wire \$1160 ; wire [31:0] \$1161 ; wire \$1162 ; wire [31:0] \$1163 ; wire \$1164 ; wire [31:0] \$1165 ; wire \$1166 ; wire [31:0] \$1167 ; wire \$1168 ; wire [31:0] \$1169 ; wire \$117 ; wire \$1170 ; wire [31:0] \$1171 ; wire \$1172 ; wire [31:0] \$1173 ; wire \$1174 ; wire [31:0] \$1175 ; wire \$1176 ; wire [31:0] \$1177 ; wire \$1178 ; wire [31:0] \$1179 ; wire \$118 ; wire \$1180 ; wire \$1181 ; wire \$1182 ; wire \$1183 ; wire \$1184 ; wire \$1185 ; wire \$1186 ; wire \$1187 ; wire \$1188 ; wire \$1189 ; wire \$119 ; wire \$1190 ; wire \$1191 ; wire \$1192 ; wire \$1193 ; wire \$1194 ; wire [31:0] \$1195 ; wire \$1196 ; wire [31:0] \$1197 ; wire \$1198 ; wire [31:0] \$1199 ; wire \$12 ; wire \$120 ; wire \$1200 ; wire [31:0] \$1201 ; wire \$1202 ; wire [31:0] \$1203 ; wire \$1204 ; wire [31:0] \$1205 ; wire \$1206 ; wire [31:0] \$1207 ; wire \$1208 ; wire [31:0] \$1209 ; wire \$121 ; wire \$1210 ; wire [31:0] \$1211 ; wire \$1212 ; wire [31:0] \$1213 ; wire \$1214 ; wire [31:0] \$1215 ; wire \$1216 ; wire [31:0] \$1217 ; wire \$1218 ; wire [31:0] \$1219 ; wire \$122 ; wire \$1220 ; wire [31:0] \$1221 ; wire \$1222 ; wire \$1223 ; wire \$1224 ; wire \$1225 ; wire \$1226 ; wire \$1227 ; wire \$1228 ; wire \$1229 ; wire \$123 ; wire \$1230 ; wire \$1231 ; wire \$1232 ; wire \$1233 ; wire \$1234 ; wire \$1235 ; wire \$1236 ; wire [31:0] \$1237 ; wire \$1238 ; wire [31:0] \$1239 ; wire \$124 ; wire \$1240 ; wire [31:0] \$1241 ; wire \$1242 ; wire [31:0] \$1243 ; wire \$1244 ; wire [31:0] \$1245 ; wire \$1246 ; wire [31:0] \$1247 ; wire \$1248 ; wire [31:0] \$1249 ; wire \$125 ; wire \$1250 ; wire [31:0] \$1251 ; wire \$1252 ; wire [31:0] \$1253 ; wire \$1254 ; wire [31:0] \$1255 ; wire \$1256 ; wire [31:0] \$1257 ; wire \$1258 ; wire [31:0] \$1259 ; wire \$126 ; wire \$1260 ; wire [31:0] \$1261 ; wire \$1262 ; wire [31:0] \$1263 ; wire \$1264 ; wire \$1265 ; wire \$1266 ; wire \$1267 ; wire \$1268 ; wire \$1269 ; wire [31:0] \$127 ; wire \$1270 ; wire \$1271 ; wire \$1272 ; wire \$1273 ; wire \$1274 ; wire \$1275 ; wire \$1276 ; wire \$1277 ; wire \$1278 ; wire [31:0] \$1279 ; wire \$128 ; wire \$1280 ; wire [31:0] \$1281 ; wire \$1282 ; wire [31:0] \$1283 ; wire \$1284 ; wire [31:0] \$1285 ; wire \$1286 ; wire [31:0] \$1287 ; wire \$1288 ; wire [31:0] \$1289 ; wire [31:0] \$129 ; wire \$1290 ; wire [31:0] \$1291 ; wire \$1292 ; wire [31:0] \$1293 ; wire \$1294 ; wire [31:0] \$1295 ; wire \$1296 ; wire [31:0] \$1297 ; wire \$1298 ; wire [31:0] \$1299 ; wire [31:0] \$13 ; wire \$130 ; wire \$1300 ; wire [31:0] \$1301 ; wire \$1302 ; wire [31:0] \$1303 ; wire \$1304 ; wire \$1305 ; wire \$1306 ; wire \$1307 ; wire \$1308 ; wire \$1309 ; wire [31:0] \$131 ; wire \$1310 ; wire \$1311 ; wire \$1312 ; wire \$1313 ; wire \$1314 ; wire \$1315 ; wire \$1316 ; wire \$1317 ; wire [31:0] \$1318 ; wire \$1319 ; wire \$132 ; wire [31:0] \$1320 ; wire \$1321 ; wire [31:0] \$1322 ; wire \$1323 ; wire [31:0] \$1324 ; wire \$1325 ; wire [31:0] \$1326 ; wire \$1327 ; wire [31:0] \$1328 ; wire \$1329 ; wire [31:0] \$133 ; wire [31:0] \$1330 ; wire \$1331 ; wire [31:0] \$1332 ; wire \$1333 ; wire [31:0] \$1334 ; wire \$1335 ; wire [31:0] \$1336 ; wire \$1337 ; wire [31:0] \$1338 ; wire \$1339 ; wire \$134 ; wire [31:0] \$1340 ; wire \$1341 ; wire [31:0] \$1342 ; wire \$1343 ; wire \$1344 ; wire \$1345 ; wire \$1346 ; wire \$1347 ; wire \$1348 ; wire \$1349 ; wire [31:0] \$135 ; wire \$1350 ; wire \$1351 ; wire \$1352 ; wire \$1353 ; wire \$1354 ; wire \$1355 ; wire \$1356 ; reg [31:0] \$1357 ; wire \$136 ; wire [31:0] \$137 ; wire \$138 ; wire [31:0] \$139 ; wire \$14 ; wire \$140 ; wire [31:0] \$141 ; wire \$142 ; wire [31:0] \$143 ; wire \$144 ; wire [31:0] \$145 ; wire \$146 ; wire [31:0] \$147 ; wire \$148 ; wire [31:0] \$149 ; wire [31:0] \$15 ; wire \$150 ; wire [31:0] \$151 ; wire \$152 ; wire [31:0] \$153 ; wire \$154 ; wire [31:0] \$155 ; wire \$156 ; wire \$157 ; wire \$158 ; wire \$159 ; wire \$16 ; wire \$160 ; wire \$161 ; wire \$162 ; wire \$163 ; wire \$164 ; wire \$165 ; wire \$166 ; wire \$167 ; wire \$168 ; wire \$169 ; wire [31:0] \$17 ; wire \$170 ; wire \$171 ; wire [31:0] \$172 ; wire \$173 ; wire [31:0] \$174 ; wire \$175 ; wire [31:0] \$176 ; wire \$177 ; wire [31:0] \$178 ; wire \$179 ; wire \$18 ; wire [31:0] \$180 ; wire \$181 ; wire [31:0] \$182 ; wire \$183 ; wire [31:0] \$184 ; wire \$185 ; wire [31:0] \$186 ; wire \$187 ; wire [31:0] \$188 ; wire \$189 ; wire [31:0] \$19 ; wire [31:0] \$190 ; wire \$191 ; wire [31:0] \$192 ; wire \$193 ; wire [31:0] \$194 ; wire \$195 ; wire [31:0] \$196 ; wire \$197 ; wire [31:0] \$198 ; wire \$199 ; wire \$2 ; wire \$20 ; wire [31:0] \$200 ; wire \$201 ; wire [31:0] \$202 ; wire \$203 ; wire [31:0] \$204 ; wire \$205 ; wire \$206 ; wire \$207 ; wire \$208 ; wire \$209 ; wire [31:0] \$21 ; wire \$210 ; wire \$211 ; wire \$212 ; wire \$213 ; wire \$214 ; wire \$215 ; wire \$216 ; wire \$217 ; wire \$218 ; wire \$219 ; wire \$22 ; wire \$220 ; wire \$221 ; wire \$222 ; wire [31:0] \$223 ; wire \$224 ; wire [31:0] \$225 ; wire \$226 ; wire [31:0] \$227 ; wire \$228 ; wire [31:0] \$229 ; wire [31:0] \$23 ; wire \$230 ; wire [31:0] \$231 ; wire \$232 ; wire [31:0] \$233 ; wire \$234 ; wire [31:0] \$235 ; wire \$236 ; wire [31:0] \$237 ; wire \$238 ; wire [31:0] \$239 ; wire \$24 ; wire \$240 ; wire [31:0] \$241 ; wire \$242 ; wire [31:0] \$243 ; wire \$244 ; wire [31:0] \$245 ; wire \$246 ; wire [31:0] \$247 ; wire \$248 ; wire [31:0] \$249 ; wire [31:0] \$25 ; wire \$250 ; wire [31:0] \$251 ; wire \$252 ; wire \$253 ; wire \$254 ; wire \$255 ; wire \$256 ; wire \$257 ; wire \$258 ; wire \$259 ; wire \$26 ; wire \$260 ; wire \$261 ; wire \$262 ; wire \$263 ; wire \$264 ; wire \$265 ; wire \$266 ; wire \$267 ; wire [31:0] \$268 ; wire \$269 ; wire \$27 ; wire [31:0] \$270 ; wire \$271 ; wire [31:0] \$272 ; wire \$273 ; wire [31:0] \$274 ; wire \$275 ; wire [31:0] \$276 ; wire \$277 ; wire [31:0] \$278 ; wire \$279 ; wire \$28 ; wire [31:0] \$280 ; wire \$281 ; wire [31:0] \$282 ; wire \$283 ; wire [31:0] \$284 ; wire \$285 ; wire [31:0] \$286 ; wire \$287 ; wire [31:0] \$288 ; wire \$289 ; wire \$29 ; wire [31:0] \$290 ; wire \$291 ; wire [31:0] \$292 ; wire \$293 ; wire [31:0] \$294 ; wire \$295 ; wire [31:0] \$296 ; wire \$297 ; wire \$298 ; wire \$299 ; wire [31:0] \$3 ; wire \$30 ; wire \$300 ; wire \$301 ; wire \$302 ; wire \$303 ; wire \$304 ; wire \$305 ; wire \$306 ; wire \$307 ; wire \$308 ; wire \$309 ; wire \$31 ; wire \$310 ; wire \$311 ; wire \$312 ; wire [31:0] \$313 ; wire \$314 ; wire [31:0] \$315 ; wire \$316 ; wire [31:0] \$317 ; wire \$318 ; wire [31:0] \$319 ; wire \$32 ; wire \$320 ; wire [31:0] \$321 ; wire \$322 ; wire [31:0] \$323 ; wire \$324 ; wire [31:0] \$325 ; wire \$326 ; wire [31:0] \$327 ; wire \$328 ; wire [31:0] \$329 ; wire \$33 ; wire \$330 ; wire [31:0] \$331 ; wire \$332 ; wire [31:0] \$333 ; wire \$334 ; wire [31:0] \$335 ; wire \$336 ; wire [31:0] \$337 ; wire \$338 ; wire [31:0] \$339 ; wire \$34 ; wire \$340 ; wire [31:0] \$341 ; wire \$342 ; wire [31:0] \$343 ; wire \$344 ; wire \$345 ; wire \$346 ; wire \$347 ; wire \$348 ; wire \$349 ; wire \$35 ; wire \$350 ; wire \$351 ; wire \$352 ; wire \$353 ; wire \$354 ; wire \$355 ; wire \$356 ; wire \$357 ; wire \$358 ; wire \$359 ; wire \$36 ; wire \$360 ; wire [31:0] \$361 ; wire \$362 ; wire [31:0] \$363 ; wire \$364 ; wire [31:0] \$365 ; wire \$366 ; wire [31:0] \$367 ; wire \$368 ; wire [31:0] \$369 ; wire \$37 ; wire \$370 ; wire [31:0] \$371 ; wire \$372 ; wire [31:0] \$373 ; wire \$374 ; wire [31:0] \$375 ; wire \$376 ; wire [31:0] \$377 ; wire \$378 ; wire [31:0] \$379 ; wire \$38 ; wire \$380 ; wire [31:0] \$381 ; wire \$382 ; wire [31:0] \$383 ; wire \$384 ; wire [31:0] \$385 ; wire \$386 ; wire \$387 ; wire \$388 ; wire \$389 ; wire \$39 ; wire \$390 ; wire \$391 ; wire \$392 ; wire \$393 ; wire \$394 ; wire \$395 ; wire \$396 ; wire \$397 ; wire \$398 ; wire \$399 ; wire \$4 ; wire [31:0] \$40 ; wire [31:0] \$400 ; wire \$401 ; wire [31:0] \$402 ; wire \$403 ; wire [31:0] \$404 ; wire \$405 ; wire [31:0] \$406 ; wire \$407 ; wire [31:0] \$408 ; wire \$409 ; wire \$41 ; wire [31:0] \$410 ; wire \$411 ; wire [31:0] \$412 ; wire \$413 ; wire [31:0] \$414 ; wire \$415 ; wire [31:0] \$416 ; wire \$417 ; wire [31:0] \$418 ; wire \$419 ; wire [31:0] \$42 ; wire [31:0] \$420 ; wire \$421 ; wire [31:0] \$422 ; wire \$423 ; wire \$424 ; wire \$425 ; wire \$426 ; wire \$427 ; wire \$428 ; wire \$429 ; wire \$43 ; wire \$430 ; wire \$431 ; wire \$432 ; wire \$433 ; wire \$434 ; wire \$435 ; wire [31:0] \$436 ; wire \$437 ; wire [31:0] \$438 ; wire \$439 ; wire [31:0] \$44 ; wire [31:0] \$440 ; wire \$441 ; wire [31:0] \$442 ; wire \$443 ; wire [31:0] \$444 ; wire \$445 ; wire [31:0] \$446 ; wire \$447 ; wire [31:0] \$448 ; wire \$449 ; wire \$45 ; wire [31:0] \$450 ; wire \$451 ; wire [31:0] \$452 ; wire \$453 ; wire [31:0] \$454 ; wire \$455 ; wire [31:0] \$456 ; wire \$457 ; wire [31:0] \$458 ; wire \$459 ; wire [31:0] \$46 ; wire [31:0] \$460 ; wire \$461 ; wire \$462 ; wire \$463 ; wire \$464 ; wire \$465 ; wire \$466 ; wire \$467 ; wire \$468 ; wire \$469 ; wire \$47 ; wire \$470 ; wire \$471 ; wire \$472 ; wire \$473 ; wire \$474 ; wire [31:0] \$475 ; wire \$476 ; wire [31:0] \$477 ; wire \$478 ; wire [31:0] \$479 ; wire [31:0] \$48 ; wire \$480 ; wire [31:0] \$481 ; wire \$482 ; wire [31:0] \$483 ; wire \$484 ; wire [31:0] \$485 ; wire \$486 ; wire [31:0] \$487 ; wire \$488 ; wire [31:0] \$489 ; wire \$49 ; wire \$490 ; wire [31:0] \$491 ; wire \$492 ; wire [31:0] \$493 ; wire \$494 ; wire [31:0] \$495 ; wire \$496 ; wire [31:0] \$497 ; wire \$498 ; wire [31:0] \$499 ; wire [31:0] \$5 ; wire [31:0] \$50 ; wire \$500 ; wire [31:0] \$501 ; wire \$502 ; wire [31:0] \$503 ; wire \$504 ; wire [31:0] \$505 ; wire \$506 ; wire [31:0] \$507 ; wire \$508 ; wire \$509 ; wire \$51 ; wire \$510 ; wire \$511 ; wire \$512 ; wire \$513 ; wire \$514 ; wire \$515 ; wire \$516 ; wire \$517 ; wire \$518 ; wire \$519 ; wire [31:0] \$52 ; wire \$520 ; wire \$521 ; wire \$522 ; wire \$523 ; wire \$524 ; wire \$525 ; wire [31:0] \$526 ; wire \$527 ; wire [31:0] \$528 ; wire \$529 ; wire \$53 ; wire [31:0] \$530 ; wire \$531 ; wire [31:0] \$532 ; wire \$533 ; wire [31:0] \$534 ; wire \$535 ; wire [31:0] \$536 ; wire \$537 ; wire [31:0] \$538 ; wire \$539 ; wire [31:0] \$54 ; wire [31:0] \$540 ; wire \$541 ; wire [31:0] \$542 ; wire \$543 ; wire [31:0] \$544 ; wire \$545 ; wire [31:0] \$546 ; wire \$547 ; wire [31:0] \$548 ; wire \$549 ; wire \$55 ; wire [31:0] \$550 ; wire \$551 ; wire [31:0] \$552 ; wire \$553 ; wire [31:0] \$554 ; wire \$555 ; wire [31:0] \$556 ; wire \$557 ; wire [31:0] \$558 ; wire \$559 ; wire [31:0] \$56 ; wire \$560 ; wire \$561 ; wire \$562 ; wire \$563 ; wire \$564 ; wire \$565 ; wire \$566 ; wire \$567 ; wire \$568 ; wire \$569 ; wire \$57 ; wire \$570 ; wire \$571 ; wire \$572 ; wire \$573 ; wire \$574 ; wire \$575 ; wire \$576 ; wire [31:0] \$577 ; wire \$578 ; wire [31:0] \$579 ; wire [31:0] \$58 ; wire \$580 ; wire [31:0] \$581 ; wire \$582 ; wire [31:0] \$583 ; wire \$584 ; wire [31:0] \$585 ; wire \$586 ; wire [31:0] \$587 ; wire \$588 ; wire [31:0] \$589 ; wire \$59 ; wire \$590 ; wire [31:0] \$591 ; wire \$592 ; wire [31:0] \$593 ; wire \$594 ; wire [31:0] \$595 ; wire \$596 ; wire [31:0] \$597 ; wire \$598 ; wire [31:0] \$599 ; wire \$6 ; wire [31:0] \$60 ; wire \$600 ; wire [31:0] \$601 ; wire \$602 ; wire [31:0] \$603 ; wire \$604 ; wire [31:0] \$605 ; wire \$606 ; wire [31:0] \$607 ; wire \$608 ; wire \$609 ; wire \$61 ; wire \$610 ; wire \$611 ; wire \$612 ; wire \$613 ; wire \$614 ; wire \$615 ; wire \$616 ; wire \$617 ; wire \$618 ; wire \$619 ; wire [31:0] \$62 ; wire \$620 ; wire \$621 ; wire \$622 ; wire \$623 ; wire \$624 ; wire [31:0] \$625 ; wire \$626 ; wire [31:0] \$627 ; wire \$628 ; wire [31:0] \$629 ; wire \$63 ; wire \$630 ; wire [31:0] \$631 ; wire \$632 ; wire [31:0] \$633 ; wire \$634 ; wire [31:0] \$635 ; wire \$636 ; wire [31:0] \$637 ; wire \$638 ; wire [31:0] \$639 ; wire [31:0] \$64 ; wire \$640 ; wire [31:0] \$641 ; wire \$642 ; wire [31:0] \$643 ; wire \$644 ; wire [31:0] \$645 ; wire \$646 ; wire [31:0] \$647 ; wire \$648 ; wire [31:0] \$649 ; wire \$65 ; wire \$650 ; wire [31:0] \$651 ; wire \$652 ; wire [31:0] \$653 ; wire \$654 ; wire \$655 ; wire \$656 ; wire \$657 ; wire \$658 ; wire \$659 ; wire \$66 ; wire \$660 ; wire \$661 ; wire \$662 ; wire \$663 ; wire \$664 ; wire \$665 ; wire \$666 ; wire \$667 ; wire \$668 ; wire \$669 ; wire \$67 ; wire [31:0] \$670 ; wire \$671 ; wire [31:0] \$672 ; wire \$673 ; wire [31:0] \$674 ; wire \$675 ; wire [31:0] \$676 ; wire \$677 ; wire [31:0] \$678 ; wire \$679 ; wire \$68 ; wire [31:0] \$680 ; wire \$681 ; wire [31:0] \$682 ; wire \$683 ; wire [31:0] \$684 ; wire \$685 ; wire [31:0] \$686 ; wire \$687 ; wire [31:0] \$688 ; wire \$689 ; wire \$69 ; wire [31:0] \$690 ; wire \$691 ; wire [31:0] \$692 ; wire \$693 ; wire [31:0] \$694 ; wire \$695 ; wire [31:0] \$696 ; wire \$697 ; wire [31:0] \$698 ; wire \$699 ; wire [31:0] \$7 ; wire \$70 ; wire \$700 ; wire \$701 ; wire \$702 ; wire \$703 ; wire \$704 ; wire \$705 ; wire \$706 ; wire \$707 ; wire \$708 ; wire \$709 ; wire \$71 ; wire \$710 ; wire \$711 ; wire \$712 ; wire \$713 ; wire \$714 ; wire [31:0] \$715 ; wire \$716 ; wire [31:0] \$717 ; wire \$718 ; wire [31:0] \$719 ; wire \$72 ; wire \$720 ; wire [31:0] \$721 ; wire \$722 ; wire [31:0] \$723 ; wire \$724 ; wire [31:0] \$725 ; wire \$726 ; wire [31:0] \$727 ; wire \$728 ; wire [31:0] \$729 ; wire \$73 ; wire \$730 ; wire [31:0] \$731 ; wire \$732 ; wire [31:0] \$733 ; wire \$734 ; wire [31:0] \$735 ; wire \$736 ; wire [31:0] \$737 ; wire \$738 ; wire [31:0] \$739 ; wire \$74 ; wire \$740 ; wire [31:0] \$741 ; wire \$742 ; wire \$743 ; wire \$744 ; wire \$745 ; wire \$746 ; wire \$747 ; wire \$748 ; wire \$749 ; wire \$75 ; wire \$750 ; wire \$751 ; wire \$752 ; wire \$753 ; wire \$754 ; wire \$755 ; wire \$756 ; wire [31:0] \$757 ; wire \$758 ; wire [31:0] \$759 ; wire \$76 ; wire \$760 ; wire [31:0] \$761 ; wire \$762 ; wire [31:0] \$763 ; wire \$764 ; wire [31:0] \$765 ; wire \$766 ; wire [31:0] \$767 ; wire \$768 ; wire [31:0] \$769 ; wire \$77 ; wire \$770 ; wire [31:0] \$771 ; wire \$772 ; wire [31:0] \$773 ; wire \$774 ; wire [31:0] \$775 ; wire \$776 ; wire [31:0] \$777 ; wire \$778 ; wire [31:0] \$779 ; wire \$78 ; wire \$780 ; wire [31:0] \$781 ; wire \$782 ; wire [31:0] \$783 ; wire \$784 ; wire \$785 ; wire \$786 ; wire \$787 ; wire \$788 ; wire \$789 ; wire [31:0] \$79 ; wire \$790 ; wire \$791 ; wire \$792 ; wire \$793 ; wire \$794 ; wire \$795 ; wire \$796 ; wire \$797 ; wire \$798 ; wire [31:0] \$799 ; wire \$8 ; wire \$80 ; wire \$800 ; wire [31:0] \$801 ; wire \$802 ; wire [31:0] \$803 ; wire \$804 ; wire [31:0] \$805 ; wire \$806 ; wire [31:0] \$807 ; wire \$808 ; wire [31:0] \$809 ; wire [31:0] \$81 ; wire \$810 ; wire [31:0] \$811 ; wire \$812 ; wire [31:0] \$813 ; wire \$814 ; wire [31:0] \$815 ; wire \$816 ; wire [31:0] \$817 ; wire \$818 ; wire [31:0] \$819 ; wire \$82 ; wire \$820 ; wire [31:0] \$821 ; wire \$822 ; wire [31:0] \$823 ; wire \$824 ; wire \$825 ; wire \$826 ; wire \$827 ; wire \$828 ; wire \$829 ; wire [31:0] \$83 ; wire \$830 ; wire \$831 ; wire \$832 ; wire \$833 ; wire \$834 ; wire \$835 ; wire \$836 ; wire \$837 ; wire [31:0] \$838 ; wire \$839 ; wire \$84 ; wire [31:0] \$840 ; wire \$841 ; wire [31:0] \$842 ; wire \$843 ; wire [31:0] \$844 ; wire \$845 ; wire [31:0] \$846 ; wire \$847 ; wire [31:0] \$848 ; wire \$849 ; wire [31:0] \$85 ; wire [31:0] \$850 ; wire \$851 ; wire [31:0] \$852 ; wire \$853 ; wire [31:0] \$854 ; wire \$855 ; wire [31:0] \$856 ; wire \$857 ; wire [31:0] \$858 ; wire \$859 ; wire \$86 ; wire [31:0] \$860 ; wire \$861 ; wire \$862 ; wire \$863 ; wire \$864 ; wire \$865 ; wire \$866 ; wire \$867 ; wire \$868 ; wire \$869 ; wire [31:0] \$87 ; wire \$870 ; wire \$871 ; wire \$872 ; wire \$873 ; wire [31:0] \$874 ; wire \$875 ; wire [31:0] \$876 ; wire \$877 ; wire [31:0] \$878 ; wire \$879 ; wire \$88 ; wire [31:0] \$880 ; wire \$881 ; wire [31:0] \$882 ; wire \$883 ; wire [31:0] \$884 ; wire \$885 ; wire [31:0] \$886 ; wire \$887 ; wire [31:0] \$888 ; wire \$889 ; wire [31:0] \$89 ; wire [31:0] \$890 ; wire \$891 ; wire [31:0] \$892 ; wire \$893 ; wire [31:0] \$894 ; wire \$895 ; wire [31:0] \$896 ; wire \$897 ; wire \$898 ; wire \$899 ; wire [31:0] \$9 ; wire \$90 ; wire \$900 ; wire \$901 ; wire \$902 ; wire \$903 ; wire \$904 ; wire \$905 ; wire \$906 ; wire \$907 ; wire \$908 ; wire \$909 ; wire [31:0] \$91 ; wire [31:0] \$910 ; wire \$911 ; wire [31:0] \$912 ; wire \$913 ; wire [31:0] \$914 ; wire \$915 ; wire [31:0] \$916 ; wire \$917 ; wire [31:0] \$918 ; wire \$919 ; wire \$92 ; wire [31:0] \$920 ; wire \$921 ; wire [31:0] \$922 ; wire \$923 ; wire [31:0] \$924 ; wire \$925 ; wire [31:0] \$926 ; wire \$927 ; wire [31:0] \$928 ; wire \$929 ; wire [31:0] \$93 ; wire [31:0] \$930 ; wire \$931 ; wire [31:0] \$932 ; wire \$933 ; wire \$934 ; wire \$935 ; wire \$936 ; wire \$937 ; wire \$938 ; wire \$939 ; wire \$94 ; wire \$940 ; wire \$941 ; wire \$942 ; wire \$943 ; wire \$944 ; wire \$945 ; wire [31:0] \$946 ; wire \$947 ; wire [31:0] \$948 ; wire \$949 ; wire [31:0] \$95 ; wire [31:0] \$950 ; wire \$951 ; wire [31:0] \$952 ; wire \$953 ; wire [31:0] \$954 ; wire \$955 ; wire [31:0] \$956 ; wire \$957 ; wire [31:0] \$958 ; wire \$959 ; wire \$96 ; wire [31:0] \$960 ; wire \$961 ; wire [31:0] \$962 ; wire \$963 ; wire [31:0] \$964 ; wire \$965 ; wire [31:0] \$966 ; wire \$967 ; wire [31:0] \$968 ; wire \$969 ; wire [31:0] \$97 ; wire [31:0] \$970 ; wire \$971 ; wire [31:0] \$972 ; wire \$973 ; wire \$974 ; wire \$975 ; wire \$976 ; wire \$977 ; wire \$978 ; wire \$979 ; wire \$98 ; wire \$980 ; wire \$981 ; wire \$982 ; wire \$983 ; wire \$984 ; wire \$985 ; wire \$986 ; wire \$987 ; wire [31:0] \$988 ; wire \$989 ; wire [31:0] \$99 ; wire [31:0] \$990 ; wire \$991 ; wire [31:0] \$992 ; wire \$993 ; wire [31:0] \$994 ; wire \$995 ; wire [31:0] \$996 ; wire \$997 ; wire [31:0] \$998 ; wire \$999 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [31:0] crc; wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [31:0] crc_reg = 32'd4294967295; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire [31:0] data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input [31:0] data_in; wire [31:0] data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:356" *) crc_reg; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$3 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$4 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$3 [6]; assign \$5 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$6 = \$4 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$5 [9]; assign \$7 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$8 = \$6 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$7 [10]; assign \$9 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$10 = \$8 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$9 [12]; assign \$11 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$12 = \$10 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$11 [16]; assign \$13 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$14 = \$12 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$13 [24]; assign \$15 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$16 = \$14 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$15 [25]; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$18 = \$16 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$17 [26]; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$20 = \$18 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$19 [28]; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$22 = \$20 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$21 [29]; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$24 = \$22 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$23 [30]; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$26 = \$24 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$25 [31]; assign \$27 = \$26 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$28 = \$27 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$29 = \$28 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$30 = \$29 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$31 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$32 = \$31 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$34 = \$33 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$35 = \$34 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$36 = \$35 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$37 = \$36 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$38 = \$37 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$39 = \$38 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$40 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$42 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$43 = \$41 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$42 [1]; assign \$44 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$45 = \$43 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$44 [6]; assign \$46 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$47 = \$45 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$46 [7]; assign \$48 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$49 = \$47 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$48 [9]; assign \$50 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$51 = \$49 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$50 [11]; assign \$52 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$53 = \$51 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$52 [12]; assign \$54 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$55 = \$53 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$54 [13]; assign \$56 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$57 = \$55 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$56 [16]; assign \$58 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$59 = \$57 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$58 [17]; assign \$60 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$61 = \$59 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$60 [24]; assign \$62 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$63 = \$61 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$62 [27]; assign \$64 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$65 = \$63 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$64 [28]; assign \$66 = \$65 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$67 = \$66 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$68 = \$67 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$69 = \$68 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$70 = \$69 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$71 = \$70 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$72 = \$71 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$73 = \$72 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$74 = \$73 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$75 = \$74 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$76 = \$75 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$77 = \$76 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$78 = \$77 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$79 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$81 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$82 = \$80 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$81 [1]; assign \$83 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$84 = \$82 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$83 [2]; assign \$85 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$86 = \$84 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$85 [6]; assign \$87 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$88 = \$86 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$87 [7]; assign \$89 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$90 = \$88 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$89 [8]; assign \$91 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$92 = \$90 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$91 [9]; assign \$93 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$94 = \$92 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$93 [13]; assign \$95 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$96 = \$94 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$95 [14]; assign \$97 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$98 = \$96 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$97 [16]; assign \$99 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$100 = \$98 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$99 [17]; assign \$101 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$102 = \$100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$101 [18]; assign \$103 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$104 = \$102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$103 [24]; assign \$105 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$106 = \$104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$105 [26]; assign \$107 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$108 = \$106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$107 [30]; assign \$109 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$110 = \$108 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$109 [31]; assign \$111 = \$110 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$112 = \$111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$113 = \$112 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$114 = \$113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$115 = \$114 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$116 = \$115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$117 = \$116 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$118 = \$117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$119 = \$118 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$120 = \$119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$121 = \$120 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$122 = \$121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$123 = \$122 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$124 = \$123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$125 = \$124 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$126 = \$125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$127 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$129 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$130 = \$128 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$129 [2]; assign \$131 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$132 = \$130 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$131 [3]; assign \$133 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$134 = \$132 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$133 [7]; assign \$135 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$136 = \$134 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$135 [8]; assign \$137 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$138 = \$136 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$137 [9]; assign \$139 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$140 = \$138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$139 [10]; assign \$141 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$142 = \$140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$141 [14]; assign \$143 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$144 = \$142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$143 [15]; assign \$145 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$146 = \$144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$145 [17]; assign \$147 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$148 = \$146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$147 [18]; assign \$149 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$150 = \$148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$149 [19]; assign \$151 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$152 = \$150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$151 [25]; assign \$153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$154 = \$152 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$153 [27]; assign \$155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$156 = \$154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$155 [31]; assign \$157 = \$156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$158 = \$157 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$159 = \$158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$160 = \$159 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$161 = \$160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$162 = \$161 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$163 = \$162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$164 = \$163 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$165 = \$164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$166 = \$165 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$167 = \$166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$168 = \$167 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$169 = \$168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$170 = \$169 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$171 = \$170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$172 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$174 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$175 = \$173 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$174 [2]; assign \$176 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$177 = \$175 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$176 [3]; assign \$178 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$179 = \$177 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$178 [4]; assign \$180 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$181 = \$179 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$180 [6]; assign \$182 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$183 = \$181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$182 [8]; assign \$184 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$185 = \$183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$184 [11]; assign \$186 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$187 = \$185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$186 [12]; assign \$188 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$189 = \$187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$188 [15]; assign \$190 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$191 = \$189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$190 [18]; assign \$192 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$193 = \$191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$192 [19]; assign \$194 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$195 = \$193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$194 [20]; assign \$196 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$197 = \$195 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$196 [24]; assign \$198 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$199 = \$197 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$198 [25]; assign \$200 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$201 = \$199 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$200 [29]; assign \$202 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$203 = \$201 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$202 [30]; assign \$204 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$205 = \$203 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$204 [31]; assign \$206 = \$205 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$207 = \$206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$208 = \$207 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$209 = \$208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$210 = \$209 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$211 = \$210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$212 = \$211 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$213 = \$212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$214 = \$213 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$215 = \$214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$216 = \$215 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$217 = \$216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$218 = \$217 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$219 = \$218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$220 = \$219 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$221 = \$220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$222 = \$221 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$223 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$225 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$226 = \$224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$225 [1]; assign \$227 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$228 = \$226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$227 [3]; assign \$229 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$230 = \$228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$229 [4]; assign \$231 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$232 = \$230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$231 [5]; assign \$233 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$234 = \$232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$233 [6]; assign \$235 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$236 = \$234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$235 [7]; assign \$237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$238 = \$236 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$237 [10]; assign \$239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$240 = \$238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$239 [13]; assign \$241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$242 = \$240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$241 [19]; assign \$243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$244 = \$242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$243 [20]; assign \$245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$246 = \$244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$245 [21]; assign \$247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$248 = \$246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$247 [24]; assign \$249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$250 = \$248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$249 [28]; assign \$251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$252 = \$250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$251 [29]; assign \$253 = \$252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$254 = \$253 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$255 = \$254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$256 = \$255 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$257 = \$256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$258 = \$257 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$259 = \$258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$260 = \$259 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$261 = \$260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$262 = \$261 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$263 = \$262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$264 = \$263 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$265 = \$264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$266 = \$265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$267 = \$266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$268 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$270 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$271 = \$269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$270 [2]; assign \$272 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$273 = \$271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$272 [4]; assign \$274 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$275 = \$273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$274 [5]; assign \$276 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$277 = \$275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$276 [6]; assign \$278 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$279 = \$277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$278 [7]; assign \$280 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$281 = \$279 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$280 [8]; assign \$282 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$283 = \$281 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$282 [11]; assign \$284 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$285 = \$283 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$284 [14]; assign \$286 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$287 = \$285 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$286 [20]; assign \$288 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$289 = \$287 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$288 [21]; assign \$290 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$291 = \$289 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$290 [22]; assign \$292 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$293 = \$291 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$292 [25]; assign \$294 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$295 = \$293 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$294 [29]; assign \$296 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$297 = \$295 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$296 [30]; assign \$298 = \$297 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$299 = \$298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$300 = \$299 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$301 = \$300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$302 = \$301 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$303 = \$302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$304 = \$303 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$305 = \$304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$306 = \$305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$307 = \$306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$308 = \$307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$309 = \$308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$310 = \$309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$311 = \$310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$312 = \$311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$313 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$315 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$316 = \$314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$315 [2]; assign \$317 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$318 = \$316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$317 [3]; assign \$319 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$320 = \$318 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$319 [5]; assign \$321 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$322 = \$320 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$321 [7]; assign \$323 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$324 = \$322 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$323 [8]; assign \$325 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$326 = \$324 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$325 [10]; assign \$327 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$328 = \$326 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$327 [15]; assign \$329 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$330 = \$328 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$329 [16]; assign \$331 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$332 = \$330 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$331 [21]; assign \$333 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$334 = \$332 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$333 [22]; assign \$335 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$336 = \$334 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$335 [23]; assign \$337 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$338 = \$336 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$337 [24]; assign \$339 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$340 = \$338 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$339 [25]; assign \$341 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$342 = \$340 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$341 [28]; assign \$343 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$344 = \$342 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$343 [29]; assign \$345 = \$344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$346 = \$345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$347 = \$346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$348 = \$347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$349 = \$348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$350 = \$349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$351 = \$350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$352 = \$351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$353 = \$352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$354 = \$353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$355 = \$354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$356 = \$355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$357 = \$356 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$358 = \$357 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$359 = \$358 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$360 = \$359 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$361 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$363 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$364 = \$362 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$363 [1]; assign \$365 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$366 = \$364 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$365 [3]; assign \$367 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$368 = \$366 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$367 [4]; assign \$369 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$370 = \$368 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$369 [8]; assign \$371 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$372 = \$370 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$371 [10]; assign \$373 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$374 = \$372 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$373 [11]; assign \$375 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$376 = \$374 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$375 [12]; assign \$377 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$378 = \$376 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$377 [17]; assign \$379 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$380 = \$378 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$379 [22]; assign \$381 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$382 = \$380 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$381 [23]; assign \$383 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$384 = \$382 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$383 [28]; assign \$385 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$386 = \$384 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$385 [31]; assign \$387 = \$386 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$388 = \$387 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$389 = \$388 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$390 = \$389 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$391 = \$390 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$392 = \$391 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$393 = \$392 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$394 = \$393 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$395 = \$394 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$396 = \$395 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$397 = \$396 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$398 = \$397 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$399 = \$398 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$400 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$402 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$403 = \$401 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$402 [2]; assign \$404 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$405 = \$403 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$404 [4]; assign \$406 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$407 = \$405 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$406 [5]; assign \$408 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$409 = \$407 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$408 [9]; assign \$410 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$411 = \$409 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$410 [11]; assign \$412 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$413 = \$411 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$412 [12]; assign \$414 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$415 = \$413 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$414 [13]; assign \$416 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$417 = \$415 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$416 [18]; assign \$418 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$419 = \$417 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$418 [23]; assign \$420 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$421 = \$419 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$420 [24]; assign \$422 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$423 = \$421 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$422 [29]; assign \$424 = \$423 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$425 = \$424 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$426 = \$425 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$427 = \$426 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$428 = \$427 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$429 = \$428 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$430 = \$429 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$431 = \$430 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$432 = \$431 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$433 = \$432 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$434 = \$433 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$435 = \$434 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$436 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$438 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$439 = \$437 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$438 [2]; assign \$440 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$441 = \$439 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$440 [3]; assign \$442 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$443 = \$441 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$442 [5]; assign \$444 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$445 = \$443 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$444 [9]; assign \$446 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$447 = \$445 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$446 [13]; assign \$448 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$449 = \$447 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$448 [14]; assign \$450 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$451 = \$449 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$450 [16]; assign \$452 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$453 = \$451 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$452 [19]; assign \$454 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$455 = \$453 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$454 [26]; assign \$456 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$457 = \$455 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$456 [28]; assign \$458 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$459 = \$457 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$458 [29]; assign \$460 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$461 = \$459 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$460 [31]; assign \$462 = \$461 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$463 = \$462 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$464 = \$463 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$465 = \$464 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$466 = \$465 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$467 = \$466 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$468 = \$467 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$469 = \$468 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$470 = \$469 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$471 = \$470 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$472 = \$471 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$473 = \$472 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$474 = \$473 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$475 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$477 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$478 = \$476 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$477 [1]; assign \$479 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$480 = \$478 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$479 [3]; assign \$481 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$482 = \$480 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$481 [4]; assign \$483 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$484 = \$482 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$483 [9]; assign \$485 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$486 = \$484 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$485 [12]; assign \$487 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$488 = \$486 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$487 [14]; assign \$489 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$490 = \$488 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$489 [15]; assign \$491 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$492 = \$490 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$491 [16]; assign \$493 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$494 = \$492 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$493 [17]; assign \$495 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$496 = \$494 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$495 [20]; assign \$497 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$498 = \$496 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$497 [24]; assign \$499 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$500 = \$498 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$499 [25]; assign \$501 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$502 = \$500 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$501 [26]; assign \$503 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$504 = \$502 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$503 [27]; assign \$505 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$506 = \$504 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$505 [28]; assign \$507 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$508 = \$506 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$507 [31]; assign \$509 = \$508 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$510 = \$509 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$511 = \$510 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$512 = \$511 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$513 = \$512 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$514 = \$513 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$515 = \$514 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$516 = \$515 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$517 = \$516 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$518 = \$517 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$519 = \$518 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$520 = \$519 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$521 = \$520 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$522 = \$521 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$523 = \$522 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$524 = \$523 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$525 = \$524 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$526 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$528 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$529 = \$527 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$528 [1]; assign \$530 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$531 = \$529 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$530 [2]; assign \$532 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$533 = \$531 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$532 [4]; assign \$534 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$535 = \$533 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$534 [5]; assign \$536 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$537 = \$535 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$536 [6]; assign \$538 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$539 = \$537 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$538 [9]; assign \$540 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$541 = \$539 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$540 [12]; assign \$542 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$543 = \$541 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$542 [13]; assign \$544 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$545 = \$543 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$544 [15]; assign \$546 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$547 = \$545 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$546 [17]; assign \$548 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$549 = \$547 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$548 [18]; assign \$550 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$551 = \$549 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$550 [21]; assign \$552 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$553 = \$551 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$552 [24]; assign \$554 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$555 = \$553 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$554 [27]; assign \$556 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$557 = \$555 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$556 [30]; assign \$558 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$559 = \$557 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$558 [31]; assign \$560 = \$559 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$561 = \$560 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$562 = \$561 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$563 = \$562 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$564 = \$563 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$565 = \$564 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$566 = \$565 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$567 = \$566 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$568 = \$567 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$569 = \$568 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$570 = \$569 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$571 = \$570 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$572 = \$571 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$573 = \$572 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$574 = \$573 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$575 = \$574 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$576 = \$575 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$577 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$579 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$580 = \$578 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$579 [2]; assign \$581 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$582 = \$580 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$581 [3]; assign \$583 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$584 = \$582 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$583 [5]; assign \$585 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$586 = \$584 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$585 [6]; assign \$587 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$588 = \$586 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$587 [7]; assign \$589 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$590 = \$588 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$589 [10]; assign \$591 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$592 = \$590 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$591 [13]; assign \$593 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$594 = \$592 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$593 [14]; assign \$595 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$596 = \$594 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$595 [16]; assign \$597 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$598 = \$596 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$597 [18]; assign \$599 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$600 = \$598 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$599 [19]; assign \$601 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$602 = \$600 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$601 [22]; assign \$603 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$604 = \$602 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$603 [25]; assign \$605 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$606 = \$604 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$605 [28]; assign \$607 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$608 = \$606 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$607 [31]; assign \$609 = \$608 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$610 = \$609 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$611 = \$610 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$612 = \$611 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$613 = \$612 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$614 = \$613 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$615 = \$614 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$616 = \$615 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$617 = \$616 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$618 = \$617 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$619 = \$618 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$620 = \$619 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$621 = \$620 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$622 = \$621 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$623 = \$622 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$624 = \$623 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$625 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$627 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$628 = \$626 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$627 [3]; assign \$629 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$630 = \$628 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$629 [4]; assign \$631 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$632 = \$630 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$631 [6]; assign \$633 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$634 = \$632 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$633 [7]; assign \$635 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$636 = \$634 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$635 [8]; assign \$637 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$638 = \$636 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$637 [11]; assign \$639 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$640 = \$638 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$639 [14]; assign \$641 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$642 = \$640 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$641 [15]; assign \$643 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$644 = \$642 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$643 [17]; assign \$645 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$646 = \$644 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$645 [19]; assign \$647 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$648 = \$646 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$647 [20]; assign \$649 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$650 = \$648 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$649 [23]; assign \$651 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$652 = \$650 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$651 [26]; assign \$653 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$654 = \$652 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$653 [29]; assign \$655 = \$654 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$656 = \$655 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$657 = \$656 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$658 = \$657 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$659 = \$658 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$660 = \$659 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$661 = \$660 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$662 = \$661 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$663 = \$662 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$664 = \$663 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$665 = \$664 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$666 = \$665 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$667 = \$666 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$668 = \$667 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$669 = \$668 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$670 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$672 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$673 = \$671 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$672 [4]; assign \$674 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$675 = \$673 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$674 [5]; assign \$676 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$677 = \$675 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$676 [7]; assign \$678 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$679 = \$677 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$678 [8]; assign \$680 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$681 = \$679 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$680 [9]; assign \$682 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$683 = \$681 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$682 [12]; assign \$684 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$685 = \$683 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$684 [15]; assign \$686 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$687 = \$685 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$686 [16]; assign \$688 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$689 = \$687 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$688 [18]; assign \$690 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$691 = \$689 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$690 [20]; assign \$692 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$693 = \$691 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$692 [21]; assign \$694 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$695 = \$693 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$694 [24]; assign \$696 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$697 = \$695 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$696 [27]; assign \$698 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$699 = \$697 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$698 [30]; assign \$700 = \$699 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$701 = \$700 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$702 = \$701 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$703 = \$702 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$704 = \$703 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$705 = \$704 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$706 = \$705 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$707 = \$706 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$708 = \$707 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$709 = \$708 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$710 = \$709 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$711 = \$710 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$712 = \$711 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$713 = \$712 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$714 = \$713 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$715 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$717 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$718 = \$716 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$717 [4]; assign \$719 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$720 = \$718 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$719 [5]; assign \$721 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$722 = \$720 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$721 [8]; assign \$723 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$724 = \$722 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$723 [12]; assign \$725 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$726 = \$724 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$725 [13]; assign \$727 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$728 = \$726 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$727 [17]; assign \$729 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$730 = \$728 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$729 [19]; assign \$731 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$732 = \$730 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$731 [21]; assign \$733 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$734 = \$732 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$733 [22]; assign \$735 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$736 = \$734 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$735 [24]; assign \$737 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$738 = \$736 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$737 [26]; assign \$739 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$740 = \$738 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$739 [29]; assign \$741 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$742 = \$740 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$741 [30]; assign \$743 = \$742 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$744 = \$743 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$745 = \$744 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$746 = \$745 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$747 = \$746 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$748 = \$747 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$749 = \$748 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$750 = \$749 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$751 = \$750 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$752 = \$751 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$753 = \$752 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$754 = \$753 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$755 = \$754 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$756 = \$755 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$757 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$759 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$760 = \$758 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$759 [5]; assign \$761 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$762 = \$760 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$761 [6]; assign \$763 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$764 = \$762 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$763 [9]; assign \$765 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$766 = \$764 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$765 [13]; assign \$767 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$768 = \$766 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$767 [14]; assign \$769 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$770 = \$768 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$769 [18]; assign \$771 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$772 = \$770 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$771 [20]; assign \$773 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$774 = \$772 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$773 [22]; assign \$775 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$776 = \$774 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$775 [23]; assign \$777 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$778 = \$776 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$777 [25]; assign \$779 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$780 = \$778 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$779 [27]; assign \$781 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$782 = \$780 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$781 [30]; assign \$783 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$784 = \$782 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$783 [31]; assign \$785 = \$784 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$786 = \$785 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$787 = \$786 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$788 = \$787 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$789 = \$788 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$790 = \$789 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$791 = \$790 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$792 = \$791 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$793 = \$792 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$794 = \$793 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$795 = \$794 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$796 = \$795 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$797 = \$796 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$798 = \$797 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$799 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$801 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$802 = \$800 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$801 [6]; assign \$803 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$804 = \$802 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$803 [7]; assign \$805 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$806 = \$804 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$805 [10]; assign \$807 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$808 = \$806 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$807 [14]; assign \$809 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$810 = \$808 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$809 [15]; assign \$811 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$812 = \$810 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$811 [19]; assign \$813 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$814 = \$812 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$813 [21]; assign \$815 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$816 = \$814 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$815 [23]; assign \$817 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$818 = \$816 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$817 [24]; assign \$819 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$820 = \$818 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$819 [26]; assign \$821 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$822 = \$820 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$821 [28]; assign \$823 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$824 = \$822 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$823 [31]; assign \$825 = \$824 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$826 = \$825 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$827 = \$826 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$828 = \$827 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$829 = \$828 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$830 = \$829 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$831 = \$830 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$832 = \$831 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$833 = \$832 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$834 = \$833 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$835 = \$834 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$836 = \$835 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$837 = \$836 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$838 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$840 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$841 = \$839 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$840 [7]; assign \$842 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$843 = \$841 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$842 [8]; assign \$844 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$845 = \$843 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$844 [11]; assign \$846 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$847 = \$845 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$846 [15]; assign \$848 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$849 = \$847 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$848 [16]; assign \$850 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$851 = \$849 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$850 [20]; assign \$852 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$853 = \$851 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$852 [22]; assign \$854 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$855 = \$853 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$854 [24]; assign \$856 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$857 = \$855 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$856 [25]; assign \$858 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$859 = \$857 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$858 [27]; assign \$860 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$861 = \$859 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$860 [29]; assign \$862 = \$861 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$863 = \$862 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$864 = \$863 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$865 = \$864 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$866 = \$865 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$867 = \$866 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$868 = \$867 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$869 = \$868 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$870 = \$869 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$871 = \$870 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$872 = \$871 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$873 = \$872 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$874 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$876 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$877 = \$875 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$876 [8]; assign \$878 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$879 = \$877 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$878 [9]; assign \$880 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$881 = \$879 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$880 [12]; assign \$882 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$883 = \$881 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$882 [16]; assign \$884 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$885 = \$883 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$884 [17]; assign \$886 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$887 = \$885 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$886 [21]; assign \$888 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$889 = \$887 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$888 [23]; assign \$890 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$891 = \$889 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$890 [25]; assign \$892 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$893 = \$891 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$892 [26]; assign \$894 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$895 = \$893 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$894 [28]; assign \$896 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$897 = \$895 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$896 [30]; assign \$898 = \$897 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$899 = \$898 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$900 = \$899 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$901 = \$900 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$902 = \$901 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$903 = \$902 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$904 = \$903 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$905 = \$904 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$906 = \$905 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$907 = \$906 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$908 = \$907 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$909 = \$908 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$910 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$912 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$913 = \$911 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$912 [9]; assign \$914 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$915 = \$913 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$914 [10]; assign \$916 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$917 = \$915 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$916 [13]; assign \$918 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$919 = \$917 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$918 [17]; assign \$920 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$921 = \$919 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$920 [18]; assign \$922 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$923 = \$921 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$922 [22]; assign \$924 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$925 = \$923 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$924 [24]; assign \$926 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$927 = \$925 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$926 [26]; assign \$928 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$929 = \$927 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$928 [27]; assign \$930 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$931 = \$929 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$930 [29]; assign \$932 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$933 = \$931 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$932 [31]; assign \$934 = \$933 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$935 = \$934 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$936 = \$935 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$937 = \$936 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$938 = \$937 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$939 = \$938 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$940 = \$939 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$941 = \$940 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$942 = \$941 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$943 = \$942 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$944 = \$943 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$945 = \$944 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$946 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$948 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$949 = \$947 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$948 [9]; assign \$950 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$951 = \$949 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$950 [11]; assign \$952 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$953 = \$951 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$952 [12]; assign \$954 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$955 = \$953 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$954 [14]; assign \$956 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$957 = \$955 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$956 [16]; assign \$958 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$959 = \$957 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$958 [18]; assign \$960 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$961 = \$959 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$960 [19]; assign \$962 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$963 = \$961 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$962 [23]; assign \$964 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$965 = \$963 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$964 [24]; assign \$966 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$967 = \$965 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$966 [26]; assign \$968 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$969 = \$967 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$968 [27]; assign \$970 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$971 = \$969 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$970 [29]; assign \$972 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$973 = \$971 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$972 [31]; assign \$974 = \$973 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$975 = \$974 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$976 = \$975 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$977 = \$976 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$978 = \$977 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$979 = \$978 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$980 = \$979 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$981 = \$980 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$982 = \$981 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$983 = \$982 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$984 = \$983 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$985 = \$984 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$986 = \$985 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$987 = \$986 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$988 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$990 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$991 = \$989 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$990 [1]; assign \$992 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$993 = \$991 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$992 [6]; assign \$994 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$995 = \$993 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$994 [9]; assign \$996 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$997 = \$995 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$996 [13]; assign \$998 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$999 = \$997 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$998 [15]; assign \$1000 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1001 = \$999 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1000 [16]; assign \$1002 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1003 = \$1001 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1002 [17]; assign \$1004 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1005 = \$1003 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1004 [19]; assign \$1006 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1007 = \$1005 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1006 [20]; assign \$1008 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1009 = \$1007 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1008 [26]; assign \$1010 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1011 = \$1009 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1010 [27]; assign \$1012 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1013 = \$1011 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1012 [29]; assign \$1014 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1015 = \$1013 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1014 [31]; assign \$1016 = \$1015 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1017 = \$1016 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1018 = \$1017 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1019 = \$1018 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1020 = \$1019 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1021 = \$1020 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1022 = \$1021 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1023 = \$1022 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1024 = \$1023 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1025 = \$1024 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1026 = \$1025 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1027 = \$1026 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1028 = \$1027 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1029 = \$1028 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1030 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1032 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1033 = \$1031 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1032 [2]; assign \$1034 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1035 = \$1033 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1034 [7]; assign \$1036 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1037 = \$1035 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1036 [10]; assign \$1038 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1039 = \$1037 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1038 [14]; assign \$1040 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1041 = \$1039 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1040 [16]; assign \$1042 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1043 = \$1041 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1042 [17]; assign \$1044 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1045 = \$1043 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1044 [18]; assign \$1046 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1047 = \$1045 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1046 [20]; assign \$1048 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1049 = \$1047 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1048 [21]; assign \$1050 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1051 = \$1049 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1050 [27]; assign \$1052 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1053 = \$1051 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1052 [28]; assign \$1054 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1055 = \$1053 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1054 [30]; assign \$1056 = \$1055 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1057 = \$1056 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1058 = \$1057 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1059 = \$1058 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1060 = \$1059 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1061 = \$1060 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1062 = \$1061 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1063 = \$1062 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1064 = \$1063 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1065 = \$1064 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1066 = \$1065 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1067 = \$1066 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1068 = \$1067 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1069 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1071 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1072 = \$1070 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1071 [3]; assign \$1073 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1074 = \$1072 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1073 [8]; assign \$1075 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1076 = \$1074 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1075 [11]; assign \$1077 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1078 = \$1076 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1077 [15]; assign \$1079 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1080 = \$1078 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1079 [17]; assign \$1081 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1082 = \$1080 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1081 [18]; assign \$1083 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1084 = \$1082 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1083 [19]; assign \$1085 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1086 = \$1084 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1085 [21]; assign \$1087 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1088 = \$1086 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1087 [22]; assign \$1089 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1090 = \$1088 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1089 [28]; assign \$1091 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1092 = \$1090 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1091 [29]; assign \$1093 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1094 = \$1092 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1093 [31]; assign \$1095 = \$1094 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1096 = \$1095 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1097 = \$1096 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1098 = \$1097 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1099 = \$1098 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1100 = \$1099 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1101 = \$1100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1102 = \$1101 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1103 = \$1102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1104 = \$1103 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1105 = \$1104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1106 = \$1105 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1107 = \$1106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1108 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1110 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1111 = \$1109 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1110 [3]; assign \$1112 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1113 = \$1111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1112 [4]; assign \$1114 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1115 = \$1113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1114 [6]; assign \$1116 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1117 = \$1115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1116 [10]; assign \$1118 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1119 = \$1117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1118 [18]; assign \$1120 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1121 = \$1119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1120 [19]; assign \$1122 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1123 = \$1121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1122 [20]; assign \$1124 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1125 = \$1123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1124 [22]; assign \$1126 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1127 = \$1125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1126 [23]; assign \$1128 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1129 = \$1127 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1128 [24]; assign \$1130 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1131 = \$1129 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1130 [25]; assign \$1132 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1133 = \$1131 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1132 [26]; assign \$1134 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1135 = \$1133 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1134 [28]; assign \$1136 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1137 = \$1135 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1136 [31]; assign \$1138 = \$1137 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1139 = \$1138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1140 = \$1139 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1141 = \$1140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1142 = \$1141 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1143 = \$1142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1144 = \$1143 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1145 = \$1144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1146 = \$1145 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1147 = \$1146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1148 = \$1147 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1149 = \$1148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1150 = \$1149 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1151 = \$1150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1152 = \$1151 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1156 = \$1154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1155 [4]; assign \$1157 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1158 = \$1156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1157 [5]; assign \$1159 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1160 = \$1158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1159 [7]; assign \$1161 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1162 = \$1160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1161 [11]; assign \$1163 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1164 = \$1162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1163 [19]; assign \$1165 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1166 = \$1164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1165 [20]; assign \$1167 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1168 = \$1166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1167 [21]; assign \$1169 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1170 = \$1168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1169 [23]; assign \$1171 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1172 = \$1170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1171 [24]; assign \$1173 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1174 = \$1172 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1173 [25]; assign \$1175 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1176 = \$1174 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1175 [26]; assign \$1177 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1178 = \$1176 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1177 [27]; assign \$1179 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1180 = \$1178 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1179 [29]; assign \$1181 = \$1180 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1182 = \$1181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1183 = \$1182 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1184 = \$1183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1185 = \$1184 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1186 = \$1185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1187 = \$1186 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1188 = \$1187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1189 = \$1188 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1190 = \$1189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1191 = \$1190 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1192 = \$1191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1193 = \$1192 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1194 = \$1193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1195 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1197 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1198 = \$1196 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1197 [5]; assign \$1199 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1200 = \$1198 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1199 [6]; assign \$1201 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1202 = \$1200 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1201 [8]; assign \$1203 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1204 = \$1202 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1203 [12]; assign \$1205 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1206 = \$1204 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1205 [20]; assign \$1207 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1208 = \$1206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1207 [21]; assign \$1209 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1210 = \$1208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1209 [22]; assign \$1211 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1212 = \$1210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1211 [24]; assign \$1213 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1214 = \$1212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1213 [25]; assign \$1215 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1216 = \$1214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1215 [26]; assign \$1217 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1218 = \$1216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1217 [27]; assign \$1219 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1220 = \$1218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1219 [28]; assign \$1221 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1222 = \$1220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1221 [30]; assign \$1223 = \$1222 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1224 = \$1223 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1225 = \$1224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1226 = \$1225 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1227 = \$1226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$1228 = \$1227 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1229 = \$1228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1230 = \$1229 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1231 = \$1230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1232 = \$1231 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1233 = \$1232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1234 = \$1233 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1235 = \$1234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1236 = \$1235 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1240 = \$1238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1239 [6]; assign \$1241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1242 = \$1240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1241 [7]; assign \$1243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1244 = \$1242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1243 [9]; assign \$1245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1246 = \$1244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1245 [13]; assign \$1247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1248 = \$1246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1247 [21]; assign \$1249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1250 = \$1248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1249 [22]; assign \$1251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1252 = \$1250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1251 [23]; assign \$1253 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1254 = \$1252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1253 [25]; assign \$1255 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1256 = \$1254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1255 [26]; assign \$1257 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1258 = \$1256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1257 [27]; assign \$1259 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1260 = \$1258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1259 [28]; assign \$1261 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1262 = \$1260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1261 [29]; assign \$1263 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1264 = \$1262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1263 [31]; assign \$1265 = \$1264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1266 = \$1265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1267 = \$1266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1268 = \$1267 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1269 = \$1268 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1270 = \$1269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1271 = \$1270 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1272 = \$1271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1273 = \$1272 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1274 = \$1273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1275 = \$1274 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1276 = \$1275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1277 = \$1276 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1278 = \$1277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1279 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1281 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1282 = \$1280 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1281 [7]; assign \$1283 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1284 = \$1282 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1283 [8]; assign \$1285 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1286 = \$1284 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1285 [10]; assign \$1287 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1288 = \$1286 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1287 [14]; assign \$1289 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1290 = \$1288 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1289 [22]; assign \$1291 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1292 = \$1290 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1291 [23]; assign \$1293 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1294 = \$1292 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1293 [24]; assign \$1295 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1296 = \$1294 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1295 [26]; assign \$1297 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1298 = \$1296 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1297 [27]; assign \$1299 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1300 = \$1298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1299 [28]; assign \$1301 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1302 = \$1300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1301 [29]; assign \$1303 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1304 = \$1302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1303 [30]; assign \$1305 = \$1304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1306 = \$1305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1307 = \$1306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1308 = \$1307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1309 = \$1308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1310 = \$1309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1311 = \$1310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1312 = \$1311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1313 = \$1312 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1314 = \$1313 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1315 = \$1314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1316 = \$1315 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1317 = \$1316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1318 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1320 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1321 = \$1319 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1320 [8]; assign \$1322 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1323 = \$1321 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1322 [9]; assign \$1324 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1325 = \$1323 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1324 [11]; assign \$1326 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1327 = \$1325 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1326 [15]; assign \$1328 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1329 = \$1327 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1328 [23]; assign \$1330 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1331 = \$1329 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1330 [24]; assign \$1332 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1333 = \$1331 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1332 [25]; assign \$1334 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1335 = \$1333 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1334 [27]; assign \$1336 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1337 = \$1335 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1336 [28]; assign \$1338 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1339 = \$1337 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1338 [29]; assign \$1340 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1341 = \$1339 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1340 [30]; assign \$1342 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1343 = \$1341 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1342 [31]; assign \$1344 = \$1343 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1345 = \$1344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1346 = \$1345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1347 = \$1346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1348 = \$1347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1349 = \$1348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1350 = \$1349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1351 = \$1350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1352 = \$1351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1353 = \$1352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1354 = \$1353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1355 = \$1354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1356 = \$1355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_reg <= 32'd4294967295; else crc_reg <= \$1357 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$16 ) begin end \$1357 = crc_reg; if (valid) begin \$1357 [0] = \$39 ; \$1357 [1] = \$78 ; \$1357 [2] = \$126 ; \$1357 [3] = \$171 ; \$1357 [4] = \$222 ; \$1357 [5] = \$267 ; \$1357 [6] = \$312 ; \$1357 [7] = \$360 ; \$1357 [8] = \$399 ; \$1357 [9] = \$435 ; \$1357 [10] = \$474 ; \$1357 [11] = \$525 ; \$1357 [12] = \$576 ; \$1357 [13] = \$624 ; \$1357 [14] = \$669 ; \$1357 [15] = \$714 ; \$1357 [16] = \$756 ; \$1357 [17] = \$798 ; \$1357 [18] = \$837 ; \$1357 [19] = \$873 ; \$1357 [20] = \$909 ; \$1357 [21] = \$945 ; \$1357 [22] = \$987 ; \$1357 [23] = \$1029 ; \$1357 [24] = \$1068 ; \$1357 [25] = \$1107 ; \$1357 [26] = \$1152 ; \$1357 [27] = \$1194 ; \$1357 [28] = \$1236 ; \$1357 [29] = \$1278 ; \$1357 [30] = \$1317 ; \$1357 [31] = \$1356 ; end else if (start) begin \$1357 = 32'd4294967295; end end assign data = data_in; assign crc = crc_reg; assign \$2 = \$1 [0]; assign \$41 = \$40 [0]; assign \$80 = \$79 [0]; assign \$128 = \$127 [1]; assign \$173 = \$172 [0]; assign \$224 = \$223 [0]; assign \$269 = \$268 [1]; assign \$314 = \$313 [0]; assign \$362 = \$361 [0]; assign \$401 = \$400 [1]; assign \$437 = \$436 [0]; assign \$476 = \$475 [0]; assign \$527 = \$526 [0]; assign \$578 = \$577 [1]; assign \$626 = \$625 [2]; assign \$671 = \$670 [3]; assign \$716 = \$715 [0]; assign \$758 = \$757 [1]; assign \$800 = \$799 [2]; assign \$839 = \$838 [3]; assign \$875 = \$874 [4]; assign \$911 = \$910 [5]; assign \$947 = \$946 [0]; assign \$989 = \$988 [0]; assign \$1031 = \$1030 [1]; assign \$1070 = \$1069 [2]; assign \$1109 = \$1108 [0]; assign \$1154 = \$1153 [1]; assign \$1196 = \$1195 [2]; assign \$1238 = \$1237 [3]; assign \$1280 = \$1279 [4]; assign \$1319 = \$1318 [5]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_A.drive_serial_port.crc32_tx (sync_100_rst, crc, valid, start, data_in, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$17 = 0; wire [31:0] \$1 ; wire \$10 ; wire \$100 ; wire [31:0] \$1000 ; wire \$1001 ; wire [31:0] \$1002 ; wire \$1003 ; wire [31:0] \$1004 ; wire \$1005 ; wire [31:0] \$1006 ; wire \$1007 ; wire [31:0] \$1008 ; wire \$1009 ; wire [31:0] \$101 ; wire [31:0] \$1010 ; wire \$1011 ; wire [31:0] \$1012 ; wire \$1013 ; wire [31:0] \$1014 ; wire \$1015 ; wire \$1016 ; wire \$1017 ; wire \$1018 ; wire \$1019 ; wire \$102 ; wire \$1020 ; wire \$1021 ; wire \$1022 ; wire \$1023 ; wire \$1024 ; wire \$1025 ; wire \$1026 ; wire \$1027 ; wire \$1028 ; wire \$1029 ; wire [31:0] \$103 ; wire [31:0] \$1030 ; wire \$1031 ; wire [31:0] \$1032 ; wire \$1033 ; wire [31:0] \$1034 ; wire \$1035 ; wire [31:0] \$1036 ; wire \$1037 ; wire [31:0] \$1038 ; wire \$1039 ; wire \$104 ; wire [31:0] \$1040 ; wire \$1041 ; wire [31:0] \$1042 ; wire \$1043 ; wire [31:0] \$1044 ; wire \$1045 ; wire [31:0] \$1046 ; wire \$1047 ; wire [31:0] \$1048 ; wire \$1049 ; wire [31:0] \$105 ; wire [31:0] \$1050 ; wire \$1051 ; wire [31:0] \$1052 ; wire \$1053 ; wire [31:0] \$1054 ; wire \$1055 ; wire \$1056 ; wire \$1057 ; wire \$1058 ; wire \$1059 ; wire \$106 ; wire \$1060 ; wire \$1061 ; wire \$1062 ; wire \$1063 ; wire \$1064 ; wire \$1065 ; wire \$1066 ; wire \$1067 ; wire \$1068 ; wire [31:0] \$1069 ; wire [31:0] \$107 ; wire \$1070 ; wire [31:0] \$1071 ; wire \$1072 ; wire [31:0] \$1073 ; wire \$1074 ; wire [31:0] \$1075 ; wire \$1076 ; wire [31:0] \$1077 ; wire \$1078 ; wire [31:0] \$1079 ; wire \$108 ; wire \$1080 ; wire [31:0] \$1081 ; wire \$1082 ; wire [31:0] \$1083 ; wire \$1084 ; wire [31:0] \$1085 ; wire \$1086 ; wire [31:0] \$1087 ; wire \$1088 ; wire [31:0] \$1089 ; wire [31:0] \$109 ; wire \$1090 ; wire [31:0] \$1091 ; wire \$1092 ; wire [31:0] \$1093 ; wire \$1094 ; wire \$1095 ; wire \$1096 ; wire \$1097 ; wire \$1098 ; wire \$1099 ; wire [31:0] \$11 ; wire \$110 ; wire \$1100 ; wire \$1101 ; wire \$1102 ; wire \$1103 ; wire \$1104 ; wire \$1105 ; wire \$1106 ; wire \$1107 ; wire [31:0] \$1108 ; wire \$1109 ; wire \$111 ; wire [31:0] \$1110 ; wire \$1111 ; wire [31:0] \$1112 ; wire \$1113 ; wire [31:0] \$1114 ; wire \$1115 ; wire [31:0] \$1116 ; wire \$1117 ; wire [31:0] \$1118 ; wire \$1119 ; wire \$112 ; wire [31:0] \$1120 ; wire \$1121 ; wire [31:0] \$1122 ; wire \$1123 ; wire [31:0] \$1124 ; wire \$1125 ; wire [31:0] \$1126 ; wire \$1127 ; wire [31:0] \$1128 ; wire \$1129 ; wire \$113 ; wire [31:0] \$1130 ; wire \$1131 ; wire [31:0] \$1132 ; wire \$1133 ; wire [31:0] \$1134 ; wire \$1135 ; wire [31:0] \$1136 ; wire \$1137 ; wire \$1138 ; wire \$1139 ; wire \$114 ; wire \$1140 ; wire \$1141 ; wire \$1142 ; wire \$1143 ; wire \$1144 ; wire \$1145 ; wire \$1146 ; wire \$1147 ; wire \$1148 ; wire \$1149 ; wire \$115 ; wire \$1150 ; wire \$1151 ; wire \$1152 ; wire [31:0] \$1153 ; wire \$1154 ; wire [31:0] \$1155 ; wire \$1156 ; wire [31:0] \$1157 ; wire \$1158 ; wire [31:0] \$1159 ; wire \$116 ; wire \$1160 ; wire [31:0] \$1161 ; wire \$1162 ; wire [31:0] \$1163 ; wire \$1164 ; wire [31:0] \$1165 ; wire \$1166 ; wire [31:0] \$1167 ; wire \$1168 ; wire [31:0] \$1169 ; wire \$117 ; wire \$1170 ; wire [31:0] \$1171 ; wire \$1172 ; wire [31:0] \$1173 ; wire \$1174 ; wire [31:0] \$1175 ; wire \$1176 ; wire [31:0] \$1177 ; wire \$1178 ; wire [31:0] \$1179 ; wire \$118 ; wire \$1180 ; wire \$1181 ; wire \$1182 ; wire \$1183 ; wire \$1184 ; wire \$1185 ; wire \$1186 ; wire \$1187 ; wire \$1188 ; wire \$1189 ; wire \$119 ; wire \$1190 ; wire \$1191 ; wire \$1192 ; wire \$1193 ; wire \$1194 ; wire [31:0] \$1195 ; wire \$1196 ; wire [31:0] \$1197 ; wire \$1198 ; wire [31:0] \$1199 ; wire \$12 ; wire \$120 ; wire \$1200 ; wire [31:0] \$1201 ; wire \$1202 ; wire [31:0] \$1203 ; wire \$1204 ; wire [31:0] \$1205 ; wire \$1206 ; wire [31:0] \$1207 ; wire \$1208 ; wire [31:0] \$1209 ; wire \$121 ; wire \$1210 ; wire [31:0] \$1211 ; wire \$1212 ; wire [31:0] \$1213 ; wire \$1214 ; wire [31:0] \$1215 ; wire \$1216 ; wire [31:0] \$1217 ; wire \$1218 ; wire [31:0] \$1219 ; wire \$122 ; wire \$1220 ; wire [31:0] \$1221 ; wire \$1222 ; wire \$1223 ; wire \$1224 ; wire \$1225 ; wire \$1226 ; wire \$1227 ; wire \$1228 ; wire \$1229 ; wire \$123 ; wire \$1230 ; wire \$1231 ; wire \$1232 ; wire \$1233 ; wire \$1234 ; wire \$1235 ; wire \$1236 ; wire [31:0] \$1237 ; wire \$1238 ; wire [31:0] \$1239 ; wire \$124 ; wire \$1240 ; wire [31:0] \$1241 ; wire \$1242 ; wire [31:0] \$1243 ; wire \$1244 ; wire [31:0] \$1245 ; wire \$1246 ; wire [31:0] \$1247 ; wire \$1248 ; wire [31:0] \$1249 ; wire \$125 ; wire \$1250 ; wire [31:0] \$1251 ; wire \$1252 ; wire [31:0] \$1253 ; wire \$1254 ; wire [31:0] \$1255 ; wire \$1256 ; wire [31:0] \$1257 ; wire \$1258 ; wire [31:0] \$1259 ; wire \$126 ; wire \$1260 ; wire [31:0] \$1261 ; wire \$1262 ; wire [31:0] \$1263 ; wire \$1264 ; wire \$1265 ; wire \$1266 ; wire \$1267 ; wire \$1268 ; wire \$1269 ; wire [31:0] \$127 ; wire \$1270 ; wire \$1271 ; wire \$1272 ; wire \$1273 ; wire \$1274 ; wire \$1275 ; wire \$1276 ; wire \$1277 ; wire \$1278 ; wire [31:0] \$1279 ; wire \$128 ; wire \$1280 ; wire [31:0] \$1281 ; wire \$1282 ; wire [31:0] \$1283 ; wire \$1284 ; wire [31:0] \$1285 ; wire \$1286 ; wire [31:0] \$1287 ; wire \$1288 ; wire [31:0] \$1289 ; wire [31:0] \$129 ; wire \$1290 ; wire [31:0] \$1291 ; wire \$1292 ; wire [31:0] \$1293 ; wire \$1294 ; wire [31:0] \$1295 ; wire \$1296 ; wire [31:0] \$1297 ; wire \$1298 ; wire [31:0] \$1299 ; wire [31:0] \$13 ; wire \$130 ; wire \$1300 ; wire [31:0] \$1301 ; wire \$1302 ; wire [31:0] \$1303 ; wire \$1304 ; wire \$1305 ; wire \$1306 ; wire \$1307 ; wire \$1308 ; wire \$1309 ; wire [31:0] \$131 ; wire \$1310 ; wire \$1311 ; wire \$1312 ; wire \$1313 ; wire \$1314 ; wire \$1315 ; wire \$1316 ; wire \$1317 ; wire [31:0] \$1318 ; wire \$1319 ; wire \$132 ; wire [31:0] \$1320 ; wire \$1321 ; wire [31:0] \$1322 ; wire \$1323 ; wire [31:0] \$1324 ; wire \$1325 ; wire [31:0] \$1326 ; wire \$1327 ; wire [31:0] \$1328 ; wire \$1329 ; wire [31:0] \$133 ; wire [31:0] \$1330 ; wire \$1331 ; wire [31:0] \$1332 ; wire \$1333 ; wire [31:0] \$1334 ; wire \$1335 ; wire [31:0] \$1336 ; wire \$1337 ; wire [31:0] \$1338 ; wire \$1339 ; wire \$134 ; wire [31:0] \$1340 ; wire \$1341 ; wire [31:0] \$1342 ; wire \$1343 ; wire \$1344 ; wire \$1345 ; wire \$1346 ; wire \$1347 ; wire \$1348 ; wire \$1349 ; wire [31:0] \$135 ; wire \$1350 ; wire \$1351 ; wire \$1352 ; wire \$1353 ; wire \$1354 ; wire \$1355 ; wire \$1356 ; reg [31:0] \$1357 ; wire \$136 ; wire [31:0] \$137 ; wire \$138 ; wire [31:0] \$139 ; wire \$14 ; wire \$140 ; wire [31:0] \$141 ; wire \$142 ; wire [31:0] \$143 ; wire \$144 ; wire [31:0] \$145 ; wire \$146 ; wire [31:0] \$147 ; wire \$148 ; wire [31:0] \$149 ; wire [31:0] \$15 ; wire \$150 ; wire [31:0] \$151 ; wire \$152 ; wire [31:0] \$153 ; wire \$154 ; wire [31:0] \$155 ; wire \$156 ; wire \$157 ; wire \$158 ; wire \$159 ; wire \$16 ; wire \$160 ; wire \$161 ; wire \$162 ; wire \$163 ; wire \$164 ; wire \$165 ; wire \$166 ; wire \$167 ; wire \$168 ; wire \$169 ; wire [31:0] \$17 ; wire \$170 ; wire \$171 ; wire [31:0] \$172 ; wire \$173 ; wire [31:0] \$174 ; wire \$175 ; wire [31:0] \$176 ; wire \$177 ; wire [31:0] \$178 ; wire \$179 ; wire \$18 ; wire [31:0] \$180 ; wire \$181 ; wire [31:0] \$182 ; wire \$183 ; wire [31:0] \$184 ; wire \$185 ; wire [31:0] \$186 ; wire \$187 ; wire [31:0] \$188 ; wire \$189 ; wire [31:0] \$19 ; wire [31:0] \$190 ; wire \$191 ; wire [31:0] \$192 ; wire \$193 ; wire [31:0] \$194 ; wire \$195 ; wire [31:0] \$196 ; wire \$197 ; wire [31:0] \$198 ; wire \$199 ; wire \$2 ; wire \$20 ; wire [31:0] \$200 ; wire \$201 ; wire [31:0] \$202 ; wire \$203 ; wire [31:0] \$204 ; wire \$205 ; wire \$206 ; wire \$207 ; wire \$208 ; wire \$209 ; wire [31:0] \$21 ; wire \$210 ; wire \$211 ; wire \$212 ; wire \$213 ; wire \$214 ; wire \$215 ; wire \$216 ; wire \$217 ; wire \$218 ; wire \$219 ; wire \$22 ; wire \$220 ; wire \$221 ; wire \$222 ; wire [31:0] \$223 ; wire \$224 ; wire [31:0] \$225 ; wire \$226 ; wire [31:0] \$227 ; wire \$228 ; wire [31:0] \$229 ; wire [31:0] \$23 ; wire \$230 ; wire [31:0] \$231 ; wire \$232 ; wire [31:0] \$233 ; wire \$234 ; wire [31:0] \$235 ; wire \$236 ; wire [31:0] \$237 ; wire \$238 ; wire [31:0] \$239 ; wire \$24 ; wire \$240 ; wire [31:0] \$241 ; wire \$242 ; wire [31:0] \$243 ; wire \$244 ; wire [31:0] \$245 ; wire \$246 ; wire [31:0] \$247 ; wire \$248 ; wire [31:0] \$249 ; wire [31:0] \$25 ; wire \$250 ; wire [31:0] \$251 ; wire \$252 ; wire \$253 ; wire \$254 ; wire \$255 ; wire \$256 ; wire \$257 ; wire \$258 ; wire \$259 ; wire \$26 ; wire \$260 ; wire \$261 ; wire \$262 ; wire \$263 ; wire \$264 ; wire \$265 ; wire \$266 ; wire \$267 ; wire [31:0] \$268 ; wire \$269 ; wire \$27 ; wire [31:0] \$270 ; wire \$271 ; wire [31:0] \$272 ; wire \$273 ; wire [31:0] \$274 ; wire \$275 ; wire [31:0] \$276 ; wire \$277 ; wire [31:0] \$278 ; wire \$279 ; wire \$28 ; wire [31:0] \$280 ; wire \$281 ; wire [31:0] \$282 ; wire \$283 ; wire [31:0] \$284 ; wire \$285 ; wire [31:0] \$286 ; wire \$287 ; wire [31:0] \$288 ; wire \$289 ; wire \$29 ; wire [31:0] \$290 ; wire \$291 ; wire [31:0] \$292 ; wire \$293 ; wire [31:0] \$294 ; wire \$295 ; wire [31:0] \$296 ; wire \$297 ; wire \$298 ; wire \$299 ; wire [31:0] \$3 ; wire \$30 ; wire \$300 ; wire \$301 ; wire \$302 ; wire \$303 ; wire \$304 ; wire \$305 ; wire \$306 ; wire \$307 ; wire \$308 ; wire \$309 ; wire \$31 ; wire \$310 ; wire \$311 ; wire \$312 ; wire [31:0] \$313 ; wire \$314 ; wire [31:0] \$315 ; wire \$316 ; wire [31:0] \$317 ; wire \$318 ; wire [31:0] \$319 ; wire \$32 ; wire \$320 ; wire [31:0] \$321 ; wire \$322 ; wire [31:0] \$323 ; wire \$324 ; wire [31:0] \$325 ; wire \$326 ; wire [31:0] \$327 ; wire \$328 ; wire [31:0] \$329 ; wire \$33 ; wire \$330 ; wire [31:0] \$331 ; wire \$332 ; wire [31:0] \$333 ; wire \$334 ; wire [31:0] \$335 ; wire \$336 ; wire [31:0] \$337 ; wire \$338 ; wire [31:0] \$339 ; wire \$34 ; wire \$340 ; wire [31:0] \$341 ; wire \$342 ; wire [31:0] \$343 ; wire \$344 ; wire \$345 ; wire \$346 ; wire \$347 ; wire \$348 ; wire \$349 ; wire \$35 ; wire \$350 ; wire \$351 ; wire \$352 ; wire \$353 ; wire \$354 ; wire \$355 ; wire \$356 ; wire \$357 ; wire \$358 ; wire \$359 ; wire \$36 ; wire \$360 ; wire [31:0] \$361 ; wire \$362 ; wire [31:0] \$363 ; wire \$364 ; wire [31:0] \$365 ; wire \$366 ; wire [31:0] \$367 ; wire \$368 ; wire [31:0] \$369 ; wire \$37 ; wire \$370 ; wire [31:0] \$371 ; wire \$372 ; wire [31:0] \$373 ; wire \$374 ; wire [31:0] \$375 ; wire \$376 ; wire [31:0] \$377 ; wire \$378 ; wire [31:0] \$379 ; wire \$38 ; wire \$380 ; wire [31:0] \$381 ; wire \$382 ; wire [31:0] \$383 ; wire \$384 ; wire [31:0] \$385 ; wire \$386 ; wire \$387 ; wire \$388 ; wire \$389 ; wire \$39 ; wire \$390 ; wire \$391 ; wire \$392 ; wire \$393 ; wire \$394 ; wire \$395 ; wire \$396 ; wire \$397 ; wire \$398 ; wire \$399 ; wire \$4 ; wire [31:0] \$40 ; wire [31:0] \$400 ; wire \$401 ; wire [31:0] \$402 ; wire \$403 ; wire [31:0] \$404 ; wire \$405 ; wire [31:0] \$406 ; wire \$407 ; wire [31:0] \$408 ; wire \$409 ; wire \$41 ; wire [31:0] \$410 ; wire \$411 ; wire [31:0] \$412 ; wire \$413 ; wire [31:0] \$414 ; wire \$415 ; wire [31:0] \$416 ; wire \$417 ; wire [31:0] \$418 ; wire \$419 ; wire [31:0] \$42 ; wire [31:0] \$420 ; wire \$421 ; wire [31:0] \$422 ; wire \$423 ; wire \$424 ; wire \$425 ; wire \$426 ; wire \$427 ; wire \$428 ; wire \$429 ; wire \$43 ; wire \$430 ; wire \$431 ; wire \$432 ; wire \$433 ; wire \$434 ; wire \$435 ; wire [31:0] \$436 ; wire \$437 ; wire [31:0] \$438 ; wire \$439 ; wire [31:0] \$44 ; wire [31:0] \$440 ; wire \$441 ; wire [31:0] \$442 ; wire \$443 ; wire [31:0] \$444 ; wire \$445 ; wire [31:0] \$446 ; wire \$447 ; wire [31:0] \$448 ; wire \$449 ; wire \$45 ; wire [31:0] \$450 ; wire \$451 ; wire [31:0] \$452 ; wire \$453 ; wire [31:0] \$454 ; wire \$455 ; wire [31:0] \$456 ; wire \$457 ; wire [31:0] \$458 ; wire \$459 ; wire [31:0] \$46 ; wire [31:0] \$460 ; wire \$461 ; wire \$462 ; wire \$463 ; wire \$464 ; wire \$465 ; wire \$466 ; wire \$467 ; wire \$468 ; wire \$469 ; wire \$47 ; wire \$470 ; wire \$471 ; wire \$472 ; wire \$473 ; wire \$474 ; wire [31:0] \$475 ; wire \$476 ; wire [31:0] \$477 ; wire \$478 ; wire [31:0] \$479 ; wire [31:0] \$48 ; wire \$480 ; wire [31:0] \$481 ; wire \$482 ; wire [31:0] \$483 ; wire \$484 ; wire [31:0] \$485 ; wire \$486 ; wire [31:0] \$487 ; wire \$488 ; wire [31:0] \$489 ; wire \$49 ; wire \$490 ; wire [31:0] \$491 ; wire \$492 ; wire [31:0] \$493 ; wire \$494 ; wire [31:0] \$495 ; wire \$496 ; wire [31:0] \$497 ; wire \$498 ; wire [31:0] \$499 ; wire [31:0] \$5 ; wire [31:0] \$50 ; wire \$500 ; wire [31:0] \$501 ; wire \$502 ; wire [31:0] \$503 ; wire \$504 ; wire [31:0] \$505 ; wire \$506 ; wire [31:0] \$507 ; wire \$508 ; wire \$509 ; wire \$51 ; wire \$510 ; wire \$511 ; wire \$512 ; wire \$513 ; wire \$514 ; wire \$515 ; wire \$516 ; wire \$517 ; wire \$518 ; wire \$519 ; wire [31:0] \$52 ; wire \$520 ; wire \$521 ; wire \$522 ; wire \$523 ; wire \$524 ; wire \$525 ; wire [31:0] \$526 ; wire \$527 ; wire [31:0] \$528 ; wire \$529 ; wire \$53 ; wire [31:0] \$530 ; wire \$531 ; wire [31:0] \$532 ; wire \$533 ; wire [31:0] \$534 ; wire \$535 ; wire [31:0] \$536 ; wire \$537 ; wire [31:0] \$538 ; wire \$539 ; wire [31:0] \$54 ; wire [31:0] \$540 ; wire \$541 ; wire [31:0] \$542 ; wire \$543 ; wire [31:0] \$544 ; wire \$545 ; wire [31:0] \$546 ; wire \$547 ; wire [31:0] \$548 ; wire \$549 ; wire \$55 ; wire [31:0] \$550 ; wire \$551 ; wire [31:0] \$552 ; wire \$553 ; wire [31:0] \$554 ; wire \$555 ; wire [31:0] \$556 ; wire \$557 ; wire [31:0] \$558 ; wire \$559 ; wire [31:0] \$56 ; wire \$560 ; wire \$561 ; wire \$562 ; wire \$563 ; wire \$564 ; wire \$565 ; wire \$566 ; wire \$567 ; wire \$568 ; wire \$569 ; wire \$57 ; wire \$570 ; wire \$571 ; wire \$572 ; wire \$573 ; wire \$574 ; wire \$575 ; wire \$576 ; wire [31:0] \$577 ; wire \$578 ; wire [31:0] \$579 ; wire [31:0] \$58 ; wire \$580 ; wire [31:0] \$581 ; wire \$582 ; wire [31:0] \$583 ; wire \$584 ; wire [31:0] \$585 ; wire \$586 ; wire [31:0] \$587 ; wire \$588 ; wire [31:0] \$589 ; wire \$59 ; wire \$590 ; wire [31:0] \$591 ; wire \$592 ; wire [31:0] \$593 ; wire \$594 ; wire [31:0] \$595 ; wire \$596 ; wire [31:0] \$597 ; wire \$598 ; wire [31:0] \$599 ; wire \$6 ; wire [31:0] \$60 ; wire \$600 ; wire [31:0] \$601 ; wire \$602 ; wire [31:0] \$603 ; wire \$604 ; wire [31:0] \$605 ; wire \$606 ; wire [31:0] \$607 ; wire \$608 ; wire \$609 ; wire \$61 ; wire \$610 ; wire \$611 ; wire \$612 ; wire \$613 ; wire \$614 ; wire \$615 ; wire \$616 ; wire \$617 ; wire \$618 ; wire \$619 ; wire [31:0] \$62 ; wire \$620 ; wire \$621 ; wire \$622 ; wire \$623 ; wire \$624 ; wire [31:0] \$625 ; wire \$626 ; wire [31:0] \$627 ; wire \$628 ; wire [31:0] \$629 ; wire \$63 ; wire \$630 ; wire [31:0] \$631 ; wire \$632 ; wire [31:0] \$633 ; wire \$634 ; wire [31:0] \$635 ; wire \$636 ; wire [31:0] \$637 ; wire \$638 ; wire [31:0] \$639 ; wire [31:0] \$64 ; wire \$640 ; wire [31:0] \$641 ; wire \$642 ; wire [31:0] \$643 ; wire \$644 ; wire [31:0] \$645 ; wire \$646 ; wire [31:0] \$647 ; wire \$648 ; wire [31:0] \$649 ; wire \$65 ; wire \$650 ; wire [31:0] \$651 ; wire \$652 ; wire [31:0] \$653 ; wire \$654 ; wire \$655 ; wire \$656 ; wire \$657 ; wire \$658 ; wire \$659 ; wire \$66 ; wire \$660 ; wire \$661 ; wire \$662 ; wire \$663 ; wire \$664 ; wire \$665 ; wire \$666 ; wire \$667 ; wire \$668 ; wire \$669 ; wire \$67 ; wire [31:0] \$670 ; wire \$671 ; wire [31:0] \$672 ; wire \$673 ; wire [31:0] \$674 ; wire \$675 ; wire [31:0] \$676 ; wire \$677 ; wire [31:0] \$678 ; wire \$679 ; wire \$68 ; wire [31:0] \$680 ; wire \$681 ; wire [31:0] \$682 ; wire \$683 ; wire [31:0] \$684 ; wire \$685 ; wire [31:0] \$686 ; wire \$687 ; wire [31:0] \$688 ; wire \$689 ; wire \$69 ; wire [31:0] \$690 ; wire \$691 ; wire [31:0] \$692 ; wire \$693 ; wire [31:0] \$694 ; wire \$695 ; wire [31:0] \$696 ; wire \$697 ; wire [31:0] \$698 ; wire \$699 ; wire [31:0] \$7 ; wire \$70 ; wire \$700 ; wire \$701 ; wire \$702 ; wire \$703 ; wire \$704 ; wire \$705 ; wire \$706 ; wire \$707 ; wire \$708 ; wire \$709 ; wire \$71 ; wire \$710 ; wire \$711 ; wire \$712 ; wire \$713 ; wire \$714 ; wire [31:0] \$715 ; wire \$716 ; wire [31:0] \$717 ; wire \$718 ; wire [31:0] \$719 ; wire \$72 ; wire \$720 ; wire [31:0] \$721 ; wire \$722 ; wire [31:0] \$723 ; wire \$724 ; wire [31:0] \$725 ; wire \$726 ; wire [31:0] \$727 ; wire \$728 ; wire [31:0] \$729 ; wire \$73 ; wire \$730 ; wire [31:0] \$731 ; wire \$732 ; wire [31:0] \$733 ; wire \$734 ; wire [31:0] \$735 ; wire \$736 ; wire [31:0] \$737 ; wire \$738 ; wire [31:0] \$739 ; wire \$74 ; wire \$740 ; wire [31:0] \$741 ; wire \$742 ; wire \$743 ; wire \$744 ; wire \$745 ; wire \$746 ; wire \$747 ; wire \$748 ; wire \$749 ; wire \$75 ; wire \$750 ; wire \$751 ; wire \$752 ; wire \$753 ; wire \$754 ; wire \$755 ; wire \$756 ; wire [31:0] \$757 ; wire \$758 ; wire [31:0] \$759 ; wire \$76 ; wire \$760 ; wire [31:0] \$761 ; wire \$762 ; wire [31:0] \$763 ; wire \$764 ; wire [31:0] \$765 ; wire \$766 ; wire [31:0] \$767 ; wire \$768 ; wire [31:0] \$769 ; wire \$77 ; wire \$770 ; wire [31:0] \$771 ; wire \$772 ; wire [31:0] \$773 ; wire \$774 ; wire [31:0] \$775 ; wire \$776 ; wire [31:0] \$777 ; wire \$778 ; wire [31:0] \$779 ; wire \$78 ; wire \$780 ; wire [31:0] \$781 ; wire \$782 ; wire [31:0] \$783 ; wire \$784 ; wire \$785 ; wire \$786 ; wire \$787 ; wire \$788 ; wire \$789 ; wire [31:0] \$79 ; wire \$790 ; wire \$791 ; wire \$792 ; wire \$793 ; wire \$794 ; wire \$795 ; wire \$796 ; wire \$797 ; wire \$798 ; wire [31:0] \$799 ; wire \$8 ; wire \$80 ; wire \$800 ; wire [31:0] \$801 ; wire \$802 ; wire [31:0] \$803 ; wire \$804 ; wire [31:0] \$805 ; wire \$806 ; wire [31:0] \$807 ; wire \$808 ; wire [31:0] \$809 ; wire [31:0] \$81 ; wire \$810 ; wire [31:0] \$811 ; wire \$812 ; wire [31:0] \$813 ; wire \$814 ; wire [31:0] \$815 ; wire \$816 ; wire [31:0] \$817 ; wire \$818 ; wire [31:0] \$819 ; wire \$82 ; wire \$820 ; wire [31:0] \$821 ; wire \$822 ; wire [31:0] \$823 ; wire \$824 ; wire \$825 ; wire \$826 ; wire \$827 ; wire \$828 ; wire \$829 ; wire [31:0] \$83 ; wire \$830 ; wire \$831 ; wire \$832 ; wire \$833 ; wire \$834 ; wire \$835 ; wire \$836 ; wire \$837 ; wire [31:0] \$838 ; wire \$839 ; wire \$84 ; wire [31:0] \$840 ; wire \$841 ; wire [31:0] \$842 ; wire \$843 ; wire [31:0] \$844 ; wire \$845 ; wire [31:0] \$846 ; wire \$847 ; wire [31:0] \$848 ; wire \$849 ; wire [31:0] \$85 ; wire [31:0] \$850 ; wire \$851 ; wire [31:0] \$852 ; wire \$853 ; wire [31:0] \$854 ; wire \$855 ; wire [31:0] \$856 ; wire \$857 ; wire [31:0] \$858 ; wire \$859 ; wire \$86 ; wire [31:0] \$860 ; wire \$861 ; wire \$862 ; wire \$863 ; wire \$864 ; wire \$865 ; wire \$866 ; wire \$867 ; wire \$868 ; wire \$869 ; wire [31:0] \$87 ; wire \$870 ; wire \$871 ; wire \$872 ; wire \$873 ; wire [31:0] \$874 ; wire \$875 ; wire [31:0] \$876 ; wire \$877 ; wire [31:0] \$878 ; wire \$879 ; wire \$88 ; wire [31:0] \$880 ; wire \$881 ; wire [31:0] \$882 ; wire \$883 ; wire [31:0] \$884 ; wire \$885 ; wire [31:0] \$886 ; wire \$887 ; wire [31:0] \$888 ; wire \$889 ; wire [31:0] \$89 ; wire [31:0] \$890 ; wire \$891 ; wire [31:0] \$892 ; wire \$893 ; wire [31:0] \$894 ; wire \$895 ; wire [31:0] \$896 ; wire \$897 ; wire \$898 ; wire \$899 ; wire [31:0] \$9 ; wire \$90 ; wire \$900 ; wire \$901 ; wire \$902 ; wire \$903 ; wire \$904 ; wire \$905 ; wire \$906 ; wire \$907 ; wire \$908 ; wire \$909 ; wire [31:0] \$91 ; wire [31:0] \$910 ; wire \$911 ; wire [31:0] \$912 ; wire \$913 ; wire [31:0] \$914 ; wire \$915 ; wire [31:0] \$916 ; wire \$917 ; wire [31:0] \$918 ; wire \$919 ; wire \$92 ; wire [31:0] \$920 ; wire \$921 ; wire [31:0] \$922 ; wire \$923 ; wire [31:0] \$924 ; wire \$925 ; wire [31:0] \$926 ; wire \$927 ; wire [31:0] \$928 ; wire \$929 ; wire [31:0] \$93 ; wire [31:0] \$930 ; wire \$931 ; wire [31:0] \$932 ; wire \$933 ; wire \$934 ; wire \$935 ; wire \$936 ; wire \$937 ; wire \$938 ; wire \$939 ; wire \$94 ; wire \$940 ; wire \$941 ; wire \$942 ; wire \$943 ; wire \$944 ; wire \$945 ; wire [31:0] \$946 ; wire \$947 ; wire [31:0] \$948 ; wire \$949 ; wire [31:0] \$95 ; wire [31:0] \$950 ; wire \$951 ; wire [31:0] \$952 ; wire \$953 ; wire [31:0] \$954 ; wire \$955 ; wire [31:0] \$956 ; wire \$957 ; wire [31:0] \$958 ; wire \$959 ; wire \$96 ; wire [31:0] \$960 ; wire \$961 ; wire [31:0] \$962 ; wire \$963 ; wire [31:0] \$964 ; wire \$965 ; wire [31:0] \$966 ; wire \$967 ; wire [31:0] \$968 ; wire \$969 ; wire [31:0] \$97 ; wire [31:0] \$970 ; wire \$971 ; wire [31:0] \$972 ; wire \$973 ; wire \$974 ; wire \$975 ; wire \$976 ; wire \$977 ; wire \$978 ; wire \$979 ; wire \$98 ; wire \$980 ; wire \$981 ; wire \$982 ; wire \$983 ; wire \$984 ; wire \$985 ; wire \$986 ; wire \$987 ; wire [31:0] \$988 ; wire \$989 ; wire [31:0] \$99 ; wire [31:0] \$990 ; wire \$991 ; wire [31:0] \$992 ; wire \$993 ; wire [31:0] \$994 ; wire \$995 ; wire [31:0] \$996 ; wire \$997 ; wire [31:0] \$998 ; wire \$999 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [31:0] crc; wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [31:0] crc_reg = 32'd4294967295; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire [31:0] data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input [31:0] data_in; wire [31:0] data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:356" *) crc_reg; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$3 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$4 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$3 [6]; assign \$5 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$6 = \$4 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$5 [9]; assign \$7 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$8 = \$6 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$7 [10]; assign \$9 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$10 = \$8 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$9 [12]; assign \$11 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$12 = \$10 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$11 [16]; assign \$13 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$14 = \$12 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$13 [24]; assign \$15 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$16 = \$14 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$15 [25]; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$18 = \$16 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$17 [26]; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$20 = \$18 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$19 [28]; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$22 = \$20 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$21 [29]; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$24 = \$22 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$23 [30]; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$26 = \$24 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$25 [31]; assign \$27 = \$26 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$28 = \$27 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$29 = \$28 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$30 = \$29 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$31 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$32 = \$31 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$34 = \$33 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$35 = \$34 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$36 = \$35 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$37 = \$36 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$38 = \$37 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$39 = \$38 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$40 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$42 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$43 = \$41 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$42 [1]; assign \$44 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$45 = \$43 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$44 [6]; assign \$46 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$47 = \$45 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$46 [7]; assign \$48 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$49 = \$47 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$48 [9]; assign \$50 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$51 = \$49 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$50 [11]; assign \$52 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$53 = \$51 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$52 [12]; assign \$54 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$55 = \$53 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$54 [13]; assign \$56 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$57 = \$55 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$56 [16]; assign \$58 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$59 = \$57 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$58 [17]; assign \$60 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$61 = \$59 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$60 [24]; assign \$62 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$63 = \$61 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$62 [27]; assign \$64 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$65 = \$63 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$64 [28]; assign \$66 = \$65 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$67 = \$66 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$68 = \$67 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$69 = \$68 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$70 = \$69 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$71 = \$70 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$72 = \$71 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$73 = \$72 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$74 = \$73 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$75 = \$74 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$76 = \$75 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$77 = \$76 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$78 = \$77 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$79 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$81 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$82 = \$80 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$81 [1]; assign \$83 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$84 = \$82 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$83 [2]; assign \$85 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$86 = \$84 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$85 [6]; assign \$87 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$88 = \$86 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$87 [7]; assign \$89 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$90 = \$88 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$89 [8]; assign \$91 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$92 = \$90 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$91 [9]; assign \$93 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$94 = \$92 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$93 [13]; assign \$95 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$96 = \$94 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$95 [14]; assign \$97 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$98 = \$96 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$97 [16]; assign \$99 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$100 = \$98 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$99 [17]; assign \$101 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$102 = \$100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$101 [18]; assign \$103 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$104 = \$102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$103 [24]; assign \$105 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$106 = \$104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$105 [26]; assign \$107 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$108 = \$106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$107 [30]; assign \$109 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$110 = \$108 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$109 [31]; assign \$111 = \$110 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$112 = \$111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$113 = \$112 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$114 = \$113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$115 = \$114 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$116 = \$115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$117 = \$116 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$118 = \$117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$119 = \$118 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$120 = \$119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$121 = \$120 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$122 = \$121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$123 = \$122 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$124 = \$123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$125 = \$124 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$126 = \$125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$127 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$129 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$130 = \$128 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$129 [2]; assign \$131 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$132 = \$130 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$131 [3]; assign \$133 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$134 = \$132 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$133 [7]; assign \$135 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$136 = \$134 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$135 [8]; assign \$137 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$138 = \$136 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$137 [9]; assign \$139 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$140 = \$138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$139 [10]; assign \$141 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$142 = \$140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$141 [14]; assign \$143 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$144 = \$142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$143 [15]; assign \$145 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$146 = \$144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$145 [17]; assign \$147 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$148 = \$146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$147 [18]; assign \$149 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$150 = \$148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$149 [19]; assign \$151 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$152 = \$150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$151 [25]; assign \$153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$154 = \$152 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$153 [27]; assign \$155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$156 = \$154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$155 [31]; assign \$157 = \$156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$158 = \$157 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$159 = \$158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$160 = \$159 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$161 = \$160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$162 = \$161 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$163 = \$162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$164 = \$163 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$165 = \$164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$166 = \$165 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$167 = \$166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$168 = \$167 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$169 = \$168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$170 = \$169 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$171 = \$170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$172 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$174 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$175 = \$173 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$174 [2]; assign \$176 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$177 = \$175 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$176 [3]; assign \$178 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$179 = \$177 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$178 [4]; assign \$180 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$181 = \$179 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$180 [6]; assign \$182 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$183 = \$181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$182 [8]; assign \$184 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$185 = \$183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$184 [11]; assign \$186 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$187 = \$185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$186 [12]; assign \$188 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$189 = \$187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$188 [15]; assign \$190 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$191 = \$189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$190 [18]; assign \$192 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$193 = \$191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$192 [19]; assign \$194 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$195 = \$193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$194 [20]; assign \$196 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$197 = \$195 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$196 [24]; assign \$198 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$199 = \$197 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$198 [25]; assign \$200 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$201 = \$199 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$200 [29]; assign \$202 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$203 = \$201 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$202 [30]; assign \$204 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$205 = \$203 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$204 [31]; assign \$206 = \$205 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$207 = \$206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$208 = \$207 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$209 = \$208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$210 = \$209 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$211 = \$210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$212 = \$211 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$213 = \$212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$214 = \$213 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$215 = \$214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$216 = \$215 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$217 = \$216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$218 = \$217 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$219 = \$218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$220 = \$219 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$221 = \$220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$222 = \$221 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$223 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$225 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$226 = \$224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$225 [1]; assign \$227 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$228 = \$226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$227 [3]; assign \$229 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$230 = \$228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$229 [4]; assign \$231 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$232 = \$230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$231 [5]; assign \$233 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$234 = \$232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$233 [6]; assign \$235 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$236 = \$234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$235 [7]; assign \$237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$238 = \$236 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$237 [10]; assign \$239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$240 = \$238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$239 [13]; assign \$241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$242 = \$240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$241 [19]; assign \$243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$244 = \$242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$243 [20]; assign \$245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$246 = \$244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$245 [21]; assign \$247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$248 = \$246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$247 [24]; assign \$249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$250 = \$248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$249 [28]; assign \$251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$252 = \$250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$251 [29]; assign \$253 = \$252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$254 = \$253 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$255 = \$254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$256 = \$255 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$257 = \$256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$258 = \$257 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$259 = \$258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$260 = \$259 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$261 = \$260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$262 = \$261 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$263 = \$262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$264 = \$263 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$265 = \$264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$266 = \$265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$267 = \$266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$268 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$270 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$271 = \$269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$270 [2]; assign \$272 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$273 = \$271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$272 [4]; assign \$274 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$275 = \$273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$274 [5]; assign \$276 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$277 = \$275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$276 [6]; assign \$278 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$279 = \$277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$278 [7]; assign \$280 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$281 = \$279 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$280 [8]; assign \$282 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$283 = \$281 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$282 [11]; assign \$284 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$285 = \$283 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$284 [14]; assign \$286 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$287 = \$285 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$286 [20]; assign \$288 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$289 = \$287 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$288 [21]; assign \$290 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$291 = \$289 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$290 [22]; assign \$292 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$293 = \$291 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$292 [25]; assign \$294 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$295 = \$293 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$294 [29]; assign \$296 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$297 = \$295 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$296 [30]; assign \$298 = \$297 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$299 = \$298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$300 = \$299 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$301 = \$300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$302 = \$301 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$303 = \$302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$304 = \$303 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$305 = \$304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$306 = \$305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$307 = \$306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$308 = \$307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$309 = \$308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$310 = \$309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$311 = \$310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$312 = \$311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$313 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$315 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$316 = \$314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$315 [2]; assign \$317 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$318 = \$316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$317 [3]; assign \$319 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$320 = \$318 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$319 [5]; assign \$321 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$322 = \$320 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$321 [7]; assign \$323 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$324 = \$322 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$323 [8]; assign \$325 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$326 = \$324 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$325 [10]; assign \$327 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$328 = \$326 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$327 [15]; assign \$329 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$330 = \$328 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$329 [16]; assign \$331 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$332 = \$330 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$331 [21]; assign \$333 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$334 = \$332 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$333 [22]; assign \$335 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$336 = \$334 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$335 [23]; assign \$337 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$338 = \$336 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$337 [24]; assign \$339 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$340 = \$338 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$339 [25]; assign \$341 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$342 = \$340 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$341 [28]; assign \$343 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$344 = \$342 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$343 [29]; assign \$345 = \$344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$346 = \$345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$347 = \$346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$348 = \$347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$349 = \$348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$350 = \$349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$351 = \$350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$352 = \$351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$353 = \$352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$354 = \$353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$355 = \$354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$356 = \$355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$357 = \$356 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$358 = \$357 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$359 = \$358 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$360 = \$359 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$361 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$363 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$364 = \$362 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$363 [1]; assign \$365 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$366 = \$364 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$365 [3]; assign \$367 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$368 = \$366 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$367 [4]; assign \$369 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$370 = \$368 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$369 [8]; assign \$371 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$372 = \$370 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$371 [10]; assign \$373 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$374 = \$372 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$373 [11]; assign \$375 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$376 = \$374 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$375 [12]; assign \$377 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$378 = \$376 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$377 [17]; assign \$379 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$380 = \$378 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$379 [22]; assign \$381 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$382 = \$380 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$381 [23]; assign \$383 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$384 = \$382 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$383 [28]; assign \$385 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$386 = \$384 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$385 [31]; assign \$387 = \$386 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$388 = \$387 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$389 = \$388 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$390 = \$389 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$391 = \$390 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$392 = \$391 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$393 = \$392 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$394 = \$393 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$395 = \$394 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$396 = \$395 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$397 = \$396 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$398 = \$397 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$399 = \$398 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$400 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$402 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$403 = \$401 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$402 [2]; assign \$404 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$405 = \$403 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$404 [4]; assign \$406 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$407 = \$405 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$406 [5]; assign \$408 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$409 = \$407 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$408 [9]; assign \$410 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$411 = \$409 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$410 [11]; assign \$412 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$413 = \$411 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$412 [12]; assign \$414 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$415 = \$413 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$414 [13]; assign \$416 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$417 = \$415 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$416 [18]; assign \$418 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$419 = \$417 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$418 [23]; assign \$420 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$421 = \$419 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$420 [24]; assign \$422 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$423 = \$421 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$422 [29]; assign \$424 = \$423 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$425 = \$424 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$426 = \$425 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$427 = \$426 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$428 = \$427 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$429 = \$428 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$430 = \$429 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$431 = \$430 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$432 = \$431 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$433 = \$432 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$434 = \$433 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$435 = \$434 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$436 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$438 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$439 = \$437 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$438 [2]; assign \$440 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$441 = \$439 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$440 [3]; assign \$442 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$443 = \$441 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$442 [5]; assign \$444 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$445 = \$443 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$444 [9]; assign \$446 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$447 = \$445 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$446 [13]; assign \$448 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$449 = \$447 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$448 [14]; assign \$450 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$451 = \$449 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$450 [16]; assign \$452 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$453 = \$451 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$452 [19]; assign \$454 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$455 = \$453 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$454 [26]; assign \$456 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$457 = \$455 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$456 [28]; assign \$458 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$459 = \$457 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$458 [29]; assign \$460 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$461 = \$459 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$460 [31]; assign \$462 = \$461 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$463 = \$462 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$464 = \$463 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$465 = \$464 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$466 = \$465 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$467 = \$466 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$468 = \$467 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$469 = \$468 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$470 = \$469 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$471 = \$470 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$472 = \$471 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$473 = \$472 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$474 = \$473 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$475 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$477 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$478 = \$476 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$477 [1]; assign \$479 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$480 = \$478 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$479 [3]; assign \$481 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$482 = \$480 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$481 [4]; assign \$483 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$484 = \$482 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$483 [9]; assign \$485 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$486 = \$484 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$485 [12]; assign \$487 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$488 = \$486 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$487 [14]; assign \$489 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$490 = \$488 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$489 [15]; assign \$491 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$492 = \$490 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$491 [16]; assign \$493 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$494 = \$492 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$493 [17]; assign \$495 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$496 = \$494 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$495 [20]; assign \$497 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$498 = \$496 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$497 [24]; assign \$499 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$500 = \$498 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$499 [25]; assign \$501 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$502 = \$500 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$501 [26]; assign \$503 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$504 = \$502 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$503 [27]; assign \$505 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$506 = \$504 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$505 [28]; assign \$507 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$508 = \$506 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$507 [31]; assign \$509 = \$508 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$510 = \$509 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$511 = \$510 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$512 = \$511 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$513 = \$512 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$514 = \$513 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$515 = \$514 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$516 = \$515 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$517 = \$516 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$518 = \$517 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$519 = \$518 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$520 = \$519 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$521 = \$520 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$522 = \$521 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$523 = \$522 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$524 = \$523 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$525 = \$524 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$526 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$528 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$529 = \$527 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$528 [1]; assign \$530 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$531 = \$529 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$530 [2]; assign \$532 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$533 = \$531 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$532 [4]; assign \$534 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$535 = \$533 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$534 [5]; assign \$536 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$537 = \$535 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$536 [6]; assign \$538 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$539 = \$537 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$538 [9]; assign \$540 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$541 = \$539 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$540 [12]; assign \$542 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$543 = \$541 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$542 [13]; assign \$544 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$545 = \$543 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$544 [15]; assign \$546 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$547 = \$545 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$546 [17]; assign \$548 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$549 = \$547 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$548 [18]; assign \$550 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$551 = \$549 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$550 [21]; assign \$552 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$553 = \$551 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$552 [24]; assign \$554 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$555 = \$553 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$554 [27]; assign \$556 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$557 = \$555 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$556 [30]; assign \$558 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$559 = \$557 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$558 [31]; assign \$560 = \$559 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$561 = \$560 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$562 = \$561 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$563 = \$562 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$564 = \$563 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$565 = \$564 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$566 = \$565 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$567 = \$566 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$568 = \$567 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$569 = \$568 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$570 = \$569 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$571 = \$570 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$572 = \$571 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$573 = \$572 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$574 = \$573 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$575 = \$574 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$576 = \$575 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$577 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$579 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$580 = \$578 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$579 [2]; assign \$581 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$582 = \$580 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$581 [3]; assign \$583 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$584 = \$582 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$583 [5]; assign \$585 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$586 = \$584 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$585 [6]; assign \$587 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$588 = \$586 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$587 [7]; assign \$589 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$590 = \$588 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$589 [10]; assign \$591 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$592 = \$590 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$591 [13]; assign \$593 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$594 = \$592 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$593 [14]; assign \$595 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$596 = \$594 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$595 [16]; assign \$597 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$598 = \$596 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$597 [18]; assign \$599 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$600 = \$598 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$599 [19]; assign \$601 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$602 = \$600 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$601 [22]; assign \$603 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$604 = \$602 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$603 [25]; assign \$605 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$606 = \$604 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$605 [28]; assign \$607 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$608 = \$606 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$607 [31]; assign \$609 = \$608 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$610 = \$609 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$611 = \$610 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$612 = \$611 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$613 = \$612 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$614 = \$613 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$615 = \$614 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$616 = \$615 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$617 = \$616 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$618 = \$617 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$619 = \$618 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$620 = \$619 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$621 = \$620 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$622 = \$621 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$623 = \$622 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$624 = \$623 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$625 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$627 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$628 = \$626 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$627 [3]; assign \$629 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$630 = \$628 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$629 [4]; assign \$631 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$632 = \$630 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$631 [6]; assign \$633 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$634 = \$632 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$633 [7]; assign \$635 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$636 = \$634 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$635 [8]; assign \$637 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$638 = \$636 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$637 [11]; assign \$639 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$640 = \$638 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$639 [14]; assign \$641 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$642 = \$640 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$641 [15]; assign \$643 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$644 = \$642 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$643 [17]; assign \$645 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$646 = \$644 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$645 [19]; assign \$647 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$648 = \$646 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$647 [20]; assign \$649 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$650 = \$648 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$649 [23]; assign \$651 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$652 = \$650 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$651 [26]; assign \$653 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$654 = \$652 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$653 [29]; assign \$655 = \$654 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$656 = \$655 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$657 = \$656 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$658 = \$657 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$659 = \$658 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$660 = \$659 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$661 = \$660 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$662 = \$661 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$663 = \$662 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$664 = \$663 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$665 = \$664 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$666 = \$665 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$667 = \$666 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$668 = \$667 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$669 = \$668 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$670 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$672 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$673 = \$671 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$672 [4]; assign \$674 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$675 = \$673 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$674 [5]; assign \$676 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$677 = \$675 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$676 [7]; assign \$678 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$679 = \$677 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$678 [8]; assign \$680 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$681 = \$679 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$680 [9]; assign \$682 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$683 = \$681 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$682 [12]; assign \$684 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$685 = \$683 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$684 [15]; assign \$686 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$687 = \$685 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$686 [16]; assign \$688 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$689 = \$687 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$688 [18]; assign \$690 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$691 = \$689 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$690 [20]; assign \$692 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$693 = \$691 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$692 [21]; assign \$694 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$695 = \$693 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$694 [24]; assign \$696 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$697 = \$695 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$696 [27]; assign \$698 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$699 = \$697 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$698 [30]; assign \$700 = \$699 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$701 = \$700 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$702 = \$701 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$703 = \$702 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$704 = \$703 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$705 = \$704 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$706 = \$705 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$707 = \$706 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$708 = \$707 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$709 = \$708 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$710 = \$709 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$711 = \$710 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$712 = \$711 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$713 = \$712 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$714 = \$713 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$715 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$717 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$718 = \$716 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$717 [4]; assign \$719 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$720 = \$718 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$719 [5]; assign \$721 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$722 = \$720 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$721 [8]; assign \$723 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$724 = \$722 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$723 [12]; assign \$725 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$726 = \$724 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$725 [13]; assign \$727 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$728 = \$726 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$727 [17]; assign \$729 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$730 = \$728 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$729 [19]; assign \$731 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$732 = \$730 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$731 [21]; assign \$733 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$734 = \$732 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$733 [22]; assign \$735 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$736 = \$734 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$735 [24]; assign \$737 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$738 = \$736 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$737 [26]; assign \$739 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$740 = \$738 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$739 [29]; assign \$741 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$742 = \$740 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$741 [30]; assign \$743 = \$742 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$744 = \$743 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$745 = \$744 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$746 = \$745 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$747 = \$746 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$748 = \$747 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$749 = \$748 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$750 = \$749 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$751 = \$750 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$752 = \$751 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$753 = \$752 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$754 = \$753 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$755 = \$754 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$756 = \$755 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$757 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$759 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$760 = \$758 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$759 [5]; assign \$761 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$762 = \$760 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$761 [6]; assign \$763 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$764 = \$762 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$763 [9]; assign \$765 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$766 = \$764 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$765 [13]; assign \$767 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$768 = \$766 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$767 [14]; assign \$769 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$770 = \$768 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$769 [18]; assign \$771 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$772 = \$770 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$771 [20]; assign \$773 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$774 = \$772 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$773 [22]; assign \$775 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$776 = \$774 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$775 [23]; assign \$777 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$778 = \$776 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$777 [25]; assign \$779 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$780 = \$778 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$779 [27]; assign \$781 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$782 = \$780 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$781 [30]; assign \$783 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$784 = \$782 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$783 [31]; assign \$785 = \$784 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$786 = \$785 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$787 = \$786 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$788 = \$787 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$789 = \$788 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$790 = \$789 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$791 = \$790 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$792 = \$791 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$793 = \$792 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$794 = \$793 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$795 = \$794 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$796 = \$795 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$797 = \$796 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$798 = \$797 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$799 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$801 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$802 = \$800 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$801 [6]; assign \$803 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$804 = \$802 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$803 [7]; assign \$805 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$806 = \$804 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$805 [10]; assign \$807 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$808 = \$806 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$807 [14]; assign \$809 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$810 = \$808 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$809 [15]; assign \$811 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$812 = \$810 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$811 [19]; assign \$813 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$814 = \$812 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$813 [21]; assign \$815 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$816 = \$814 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$815 [23]; assign \$817 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$818 = \$816 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$817 [24]; assign \$819 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$820 = \$818 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$819 [26]; assign \$821 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$822 = \$820 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$821 [28]; assign \$823 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$824 = \$822 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$823 [31]; assign \$825 = \$824 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$826 = \$825 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$827 = \$826 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$828 = \$827 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$829 = \$828 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$830 = \$829 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$831 = \$830 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$832 = \$831 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$833 = \$832 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$834 = \$833 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$835 = \$834 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$836 = \$835 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$837 = \$836 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$838 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$840 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$841 = \$839 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$840 [7]; assign \$842 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$843 = \$841 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$842 [8]; assign \$844 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$845 = \$843 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$844 [11]; assign \$846 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$847 = \$845 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$846 [15]; assign \$848 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$849 = \$847 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$848 [16]; assign \$850 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$851 = \$849 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$850 [20]; assign \$852 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$853 = \$851 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$852 [22]; assign \$854 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$855 = \$853 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$854 [24]; assign \$856 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$857 = \$855 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$856 [25]; assign \$858 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$859 = \$857 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$858 [27]; assign \$860 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$861 = \$859 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$860 [29]; assign \$862 = \$861 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$863 = \$862 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$864 = \$863 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$865 = \$864 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$866 = \$865 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$867 = \$866 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$868 = \$867 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$869 = \$868 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$870 = \$869 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$871 = \$870 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$872 = \$871 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$873 = \$872 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$874 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$876 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$877 = \$875 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$876 [8]; assign \$878 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$879 = \$877 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$878 [9]; assign \$880 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$881 = \$879 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$880 [12]; assign \$882 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$883 = \$881 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$882 [16]; assign \$884 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$885 = \$883 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$884 [17]; assign \$886 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$887 = \$885 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$886 [21]; assign \$888 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$889 = \$887 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$888 [23]; assign \$890 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$891 = \$889 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$890 [25]; assign \$892 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$893 = \$891 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$892 [26]; assign \$894 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$895 = \$893 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$894 [28]; assign \$896 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$897 = \$895 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$896 [30]; assign \$898 = \$897 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$899 = \$898 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$900 = \$899 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$901 = \$900 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$902 = \$901 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$903 = \$902 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$904 = \$903 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$905 = \$904 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$906 = \$905 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$907 = \$906 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$908 = \$907 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$909 = \$908 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$910 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$912 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$913 = \$911 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$912 [9]; assign \$914 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$915 = \$913 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$914 [10]; assign \$916 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$917 = \$915 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$916 [13]; assign \$918 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$919 = \$917 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$918 [17]; assign \$920 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$921 = \$919 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$920 [18]; assign \$922 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$923 = \$921 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$922 [22]; assign \$924 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$925 = \$923 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$924 [24]; assign \$926 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$927 = \$925 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$926 [26]; assign \$928 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$929 = \$927 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$928 [27]; assign \$930 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$931 = \$929 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$930 [29]; assign \$932 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$933 = \$931 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$932 [31]; assign \$934 = \$933 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$935 = \$934 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$936 = \$935 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$937 = \$936 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$938 = \$937 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$939 = \$938 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$940 = \$939 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$941 = \$940 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$942 = \$941 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$943 = \$942 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$944 = \$943 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$945 = \$944 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$946 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$948 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$949 = \$947 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$948 [9]; assign \$950 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$951 = \$949 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$950 [11]; assign \$952 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$953 = \$951 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$952 [12]; assign \$954 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$955 = \$953 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$954 [14]; assign \$956 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$957 = \$955 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$956 [16]; assign \$958 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$959 = \$957 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$958 [18]; assign \$960 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$961 = \$959 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$960 [19]; assign \$962 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$963 = \$961 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$962 [23]; assign \$964 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$965 = \$963 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$964 [24]; assign \$966 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$967 = \$965 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$966 [26]; assign \$968 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$969 = \$967 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$968 [27]; assign \$970 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$971 = \$969 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$970 [29]; assign \$972 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$973 = \$971 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$972 [31]; assign \$974 = \$973 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$975 = \$974 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$976 = \$975 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$977 = \$976 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$978 = \$977 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$979 = \$978 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$980 = \$979 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$981 = \$980 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$982 = \$981 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$983 = \$982 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$984 = \$983 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$985 = \$984 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$986 = \$985 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$987 = \$986 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$988 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$990 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$991 = \$989 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$990 [1]; assign \$992 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$993 = \$991 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$992 [6]; assign \$994 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$995 = \$993 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$994 [9]; assign \$996 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$997 = \$995 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$996 [13]; assign \$998 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$999 = \$997 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$998 [15]; assign \$1000 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1001 = \$999 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1000 [16]; assign \$1002 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1003 = \$1001 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1002 [17]; assign \$1004 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1005 = \$1003 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1004 [19]; assign \$1006 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1007 = \$1005 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1006 [20]; assign \$1008 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1009 = \$1007 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1008 [26]; assign \$1010 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1011 = \$1009 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1010 [27]; assign \$1012 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1013 = \$1011 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1012 [29]; assign \$1014 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1015 = \$1013 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1014 [31]; assign \$1016 = \$1015 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1017 = \$1016 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1018 = \$1017 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1019 = \$1018 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1020 = \$1019 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1021 = \$1020 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1022 = \$1021 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1023 = \$1022 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1024 = \$1023 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1025 = \$1024 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1026 = \$1025 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1027 = \$1026 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1028 = \$1027 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1029 = \$1028 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1030 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1032 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1033 = \$1031 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1032 [2]; assign \$1034 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1035 = \$1033 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1034 [7]; assign \$1036 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1037 = \$1035 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1036 [10]; assign \$1038 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1039 = \$1037 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1038 [14]; assign \$1040 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1041 = \$1039 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1040 [16]; assign \$1042 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1043 = \$1041 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1042 [17]; assign \$1044 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1045 = \$1043 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1044 [18]; assign \$1046 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1047 = \$1045 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1046 [20]; assign \$1048 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1049 = \$1047 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1048 [21]; assign \$1050 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1051 = \$1049 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1050 [27]; assign \$1052 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1053 = \$1051 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1052 [28]; assign \$1054 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1055 = \$1053 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1054 [30]; assign \$1056 = \$1055 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1057 = \$1056 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1058 = \$1057 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1059 = \$1058 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1060 = \$1059 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1061 = \$1060 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1062 = \$1061 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1063 = \$1062 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1064 = \$1063 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1065 = \$1064 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1066 = \$1065 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1067 = \$1066 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1068 = \$1067 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1069 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1071 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1072 = \$1070 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1071 [3]; assign \$1073 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1074 = \$1072 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1073 [8]; assign \$1075 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1076 = \$1074 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1075 [11]; assign \$1077 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1078 = \$1076 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1077 [15]; assign \$1079 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1080 = \$1078 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1079 [17]; assign \$1081 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1082 = \$1080 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1081 [18]; assign \$1083 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1084 = \$1082 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1083 [19]; assign \$1085 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1086 = \$1084 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1085 [21]; assign \$1087 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1088 = \$1086 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1087 [22]; assign \$1089 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1090 = \$1088 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1089 [28]; assign \$1091 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1092 = \$1090 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1091 [29]; assign \$1093 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1094 = \$1092 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1093 [31]; assign \$1095 = \$1094 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1096 = \$1095 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1097 = \$1096 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1098 = \$1097 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1099 = \$1098 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1100 = \$1099 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1101 = \$1100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1102 = \$1101 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1103 = \$1102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1104 = \$1103 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1105 = \$1104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1106 = \$1105 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1107 = \$1106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1108 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1110 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1111 = \$1109 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1110 [3]; assign \$1112 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1113 = \$1111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1112 [4]; assign \$1114 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1115 = \$1113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1114 [6]; assign \$1116 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1117 = \$1115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1116 [10]; assign \$1118 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1119 = \$1117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1118 [18]; assign \$1120 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1121 = \$1119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1120 [19]; assign \$1122 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1123 = \$1121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1122 [20]; assign \$1124 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1125 = \$1123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1124 [22]; assign \$1126 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1127 = \$1125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1126 [23]; assign \$1128 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1129 = \$1127 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1128 [24]; assign \$1130 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1131 = \$1129 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1130 [25]; assign \$1132 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1133 = \$1131 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1132 [26]; assign \$1134 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1135 = \$1133 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1134 [28]; assign \$1136 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1137 = \$1135 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1136 [31]; assign \$1138 = \$1137 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1139 = \$1138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1140 = \$1139 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1141 = \$1140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1142 = \$1141 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1143 = \$1142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1144 = \$1143 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1145 = \$1144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1146 = \$1145 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1147 = \$1146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1148 = \$1147 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1149 = \$1148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1150 = \$1149 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1151 = \$1150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1152 = \$1151 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1156 = \$1154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1155 [4]; assign \$1157 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1158 = \$1156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1157 [5]; assign \$1159 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1160 = \$1158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1159 [7]; assign \$1161 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1162 = \$1160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1161 [11]; assign \$1163 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1164 = \$1162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1163 [19]; assign \$1165 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1166 = \$1164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1165 [20]; assign \$1167 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1168 = \$1166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1167 [21]; assign \$1169 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1170 = \$1168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1169 [23]; assign \$1171 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1172 = \$1170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1171 [24]; assign \$1173 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1174 = \$1172 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1173 [25]; assign \$1175 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1176 = \$1174 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1175 [26]; assign \$1177 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1178 = \$1176 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1177 [27]; assign \$1179 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1180 = \$1178 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1179 [29]; assign \$1181 = \$1180 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1182 = \$1181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1183 = \$1182 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1184 = \$1183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1185 = \$1184 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1186 = \$1185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1187 = \$1186 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1188 = \$1187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1189 = \$1188 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1190 = \$1189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1191 = \$1190 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1192 = \$1191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1193 = \$1192 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1194 = \$1193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1195 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1197 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1198 = \$1196 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1197 [5]; assign \$1199 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1200 = \$1198 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1199 [6]; assign \$1201 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1202 = \$1200 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1201 [8]; assign \$1203 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1204 = \$1202 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1203 [12]; assign \$1205 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1206 = \$1204 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1205 [20]; assign \$1207 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1208 = \$1206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1207 [21]; assign \$1209 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1210 = \$1208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1209 [22]; assign \$1211 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1212 = \$1210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1211 [24]; assign \$1213 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1214 = \$1212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1213 [25]; assign \$1215 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1216 = \$1214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1215 [26]; assign \$1217 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1218 = \$1216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1217 [27]; assign \$1219 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1220 = \$1218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1219 [28]; assign \$1221 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1222 = \$1220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1221 [30]; assign \$1223 = \$1222 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1224 = \$1223 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1225 = \$1224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1226 = \$1225 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1227 = \$1226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$1228 = \$1227 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1229 = \$1228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1230 = \$1229 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1231 = \$1230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1232 = \$1231 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1233 = \$1232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1234 = \$1233 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1235 = \$1234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1236 = \$1235 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1240 = \$1238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1239 [6]; assign \$1241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1242 = \$1240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1241 [7]; assign \$1243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1244 = \$1242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1243 [9]; assign \$1245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1246 = \$1244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1245 [13]; assign \$1247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1248 = \$1246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1247 [21]; assign \$1249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1250 = \$1248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1249 [22]; assign \$1251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1252 = \$1250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1251 [23]; assign \$1253 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1254 = \$1252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1253 [25]; assign \$1255 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1256 = \$1254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1255 [26]; assign \$1257 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1258 = \$1256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1257 [27]; assign \$1259 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1260 = \$1258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1259 [28]; assign \$1261 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1262 = \$1260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1261 [29]; assign \$1263 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1264 = \$1262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1263 [31]; assign \$1265 = \$1264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1266 = \$1265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1267 = \$1266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1268 = \$1267 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1269 = \$1268 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1270 = \$1269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1271 = \$1270 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1272 = \$1271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1273 = \$1272 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1274 = \$1273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1275 = \$1274 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1276 = \$1275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1277 = \$1276 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1278 = \$1277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1279 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1281 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1282 = \$1280 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1281 [7]; assign \$1283 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1284 = \$1282 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1283 [8]; assign \$1285 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1286 = \$1284 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1285 [10]; assign \$1287 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1288 = \$1286 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1287 [14]; assign \$1289 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1290 = \$1288 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1289 [22]; assign \$1291 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1292 = \$1290 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1291 [23]; assign \$1293 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1294 = \$1292 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1293 [24]; assign \$1295 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1296 = \$1294 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1295 [26]; assign \$1297 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1298 = \$1296 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1297 [27]; assign \$1299 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1300 = \$1298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1299 [28]; assign \$1301 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1302 = \$1300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1301 [29]; assign \$1303 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1304 = \$1302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1303 [30]; assign \$1305 = \$1304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1306 = \$1305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1307 = \$1306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1308 = \$1307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1309 = \$1308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1310 = \$1309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1311 = \$1310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1312 = \$1311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1313 = \$1312 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1314 = \$1313 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1315 = \$1314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1316 = \$1315 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1317 = \$1316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1318 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1320 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1321 = \$1319 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1320 [8]; assign \$1322 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1323 = \$1321 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1322 [9]; assign \$1324 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1325 = \$1323 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1324 [11]; assign \$1326 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1327 = \$1325 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1326 [15]; assign \$1328 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1329 = \$1327 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1328 [23]; assign \$1330 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1331 = \$1329 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1330 [24]; assign \$1332 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1333 = \$1331 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1332 [25]; assign \$1334 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1335 = \$1333 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1334 [27]; assign \$1336 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1337 = \$1335 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1336 [28]; assign \$1338 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1339 = \$1337 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1338 [29]; assign \$1340 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1341 = \$1339 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1340 [30]; assign \$1342 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1343 = \$1341 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1342 [31]; assign \$1344 = \$1343 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1345 = \$1344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1346 = \$1345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1347 = \$1346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1348 = \$1347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1349 = \$1348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1350 = \$1349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1351 = \$1350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1352 = \$1351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1353 = \$1352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1354 = \$1353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1355 = \$1354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1356 = \$1355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_reg <= 32'd4294967295; else crc_reg <= \$1357 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$17 ) begin end \$1357 = crc_reg; if (valid) begin \$1357 [0] = \$39 ; \$1357 [1] = \$78 ; \$1357 [2] = \$126 ; \$1357 [3] = \$171 ; \$1357 [4] = \$222 ; \$1357 [5] = \$267 ; \$1357 [6] = \$312 ; \$1357 [7] = \$360 ; \$1357 [8] = \$399 ; \$1357 [9] = \$435 ; \$1357 [10] = \$474 ; \$1357 [11] = \$525 ; \$1357 [12] = \$576 ; \$1357 [13] = \$624 ; \$1357 [14] = \$669 ; \$1357 [15] = \$714 ; \$1357 [16] = \$756 ; \$1357 [17] = \$798 ; \$1357 [18] = \$837 ; \$1357 [19] = \$873 ; \$1357 [20] = \$909 ; \$1357 [21] = \$945 ; \$1357 [22] = \$987 ; \$1357 [23] = \$1029 ; \$1357 [24] = \$1068 ; \$1357 [25] = \$1107 ; \$1357 [26] = \$1152 ; \$1357 [27] = \$1194 ; \$1357 [28] = \$1236 ; \$1357 [29] = \$1278 ; \$1357 [30] = \$1317 ; \$1357 [31] = \$1356 ; end else if (start) begin \$1357 = 32'd4294967295; end end assign data = data_in; assign crc = crc_reg; assign \$2 = \$1 [0]; assign \$41 = \$40 [0]; assign \$80 = \$79 [0]; assign \$128 = \$127 [1]; assign \$173 = \$172 [0]; assign \$224 = \$223 [0]; assign \$269 = \$268 [1]; assign \$314 = \$313 [0]; assign \$362 = \$361 [0]; assign \$401 = \$400 [1]; assign \$437 = \$436 [0]; assign \$476 = \$475 [0]; assign \$527 = \$526 [0]; assign \$578 = \$577 [1]; assign \$626 = \$625 [2]; assign \$671 = \$670 [3]; assign \$716 = \$715 [0]; assign \$758 = \$757 [1]; assign \$800 = \$799 [2]; assign \$839 = \$838 [3]; assign \$875 = \$874 [4]; assign \$911 = \$910 [5]; assign \$947 = \$946 [0]; assign \$989 = \$988 [0]; assign \$1031 = \$1030 [1]; assign \$1070 = \$1069 [2]; assign \$1109 = \$1108 [0]; assign \$1154 = \$1153 [1]; assign \$1196 = \$1195 [2]; assign \$1238 = \$1237 [3]; assign \$1280 = \$1279 [4]; assign \$1319 = \$1318 [5]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:81" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_A_shift_dma_5 (sync_100_rst, read_bram_address_input, write_bram_address_input, read_node_address_input, write_node_address_input, data_input, read_complete_input, write_complete_input, bram_read_data, write_bram_address_output, read_bram_address_output, write_node_address_output, read_node_address_output, write_complete_output, data_output, read_complete_output, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$18 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; reg \$15 ; reg [31:0] \$16 ; reg \$17 ; reg \$18 ; wire \$2 ; wire \$3 ; wire \$4 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) output [15:0] bram_address; reg [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) input [31:0] bram_read_data; wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) output [31:0] bram_write_data; reg [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) output bram_write_enable; reg bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) reg [31:0] buf_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) reg [15:0] buf_read_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) reg buf_read_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) reg [7:0] buf_read_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) reg [15:0] buf_write_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) reg buf_write_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) reg [7:0] buf_write_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) input [31:0] data_input; wire [31:0] data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) output [31:0] data_output; reg [31:0] data_output = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) input [15:0] read_bram_address_input; wire [15:0] read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) output [15:0] read_bram_address_output; reg [15:0] read_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) input read_complete_input; wire read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) output read_complete_output; reg read_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) reg read_next = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) input [7:0] read_node_address_input; wire [7:0] read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) output [7:0] read_node_address_output; reg [7:0] read_node_address_output = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) input [15:0] write_bram_address_input; wire [15:0] write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) output [15:0] write_bram_address_output; reg [15:0] write_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) input write_complete_input; wire write_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) output write_complete_output; reg write_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) input [7:0] write_node_address_input; wire [7:0] write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) output [7:0] write_node_address_output; reg [7:0] write_node_address_output = 8'h00; assign \$1 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 3'h5; assign \$2 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$3 = \$1 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$2 ; assign \$4 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 3'h5; assign \$5 = \$4 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$6 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$7 = \$5 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$6 ; assign \$8 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 3'h5; assign \$9 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$10 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$9 ; assign \$11 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 3'h5; assign \$12 = \$11 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$13 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$13 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_bram_address <= 16'h0000; else buf_write_bram_address <= write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_bram_address <= 16'h0000; else buf_read_bram_address <= read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_node_address <= 8'h00; else buf_write_node_address <= write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_node_address <= 8'h00; else buf_read_node_address <= read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_bram_address_output <= 16'h0000; else write_bram_address_output <= buf_write_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_bram_address_output <= 16'h0000; else read_bram_address_output <= buf_read_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_node_address_output <= 8'h00; else write_node_address_output <= buf_write_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_node_address_output <= 8'h00; else read_node_address_output <= buf_read_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_data <= 32'd0; else buf_data <= data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_complete <= 1'h0; else buf_read_complete <= read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_complete_output <= 1'h0; else write_complete_output <= buf_write_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_next <= 1'h0; else read_next <= \$15 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_output <= 32'd0; else data_output <= \$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_complete_output <= 1'h0; else read_complete_output <= \$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_complete <= 1'h0; else buf_write_complete <= \$18 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$18 ) begin end \$15 = read_next; if (\$3 ) begin \$15 = 1'h1; end else if (read_next) begin \$15 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$18 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$16 = bram_read_data; end else begin \$16 = buf_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$18 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$17 = 1'h1; end else begin \$17 = buf_read_complete; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$18 ) begin end (* full_case = 32'd1 *) if (\$7 ) begin \$18 = 1'h1; end else begin \$18 = write_complete_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$18 ) begin end bram_address = 16'h0000; if (\$10 ) begin bram_address = read_bram_address_input; end if (\$14 ) begin bram_address = write_bram_address_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$18 ) begin end bram_write_data = 32'd0; if (\$14 ) begin bram_write_data = data_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$18 ) begin end (* full_case = 32'd1 *) if (\$14 ) begin bram_write_enable = 1'h1; end else begin bram_write_enable = 1'h0; end end endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:104" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_B (sync_100_rst, rx, \bram_read_data$40 , tx, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$19 = 0; wire [5:0] \$1 ; wire [34:0] \$10 ; wire \$100 ; wire \$101 ; wire [4:0] \$102 ; wire [16:0] \$103 ; wire [3:0] \$104 ; wire [4:0] \$105 ; wire [5:0] \$106 ; wire \$107 ; wire \$108 ; wire \$109 ; wire \$11 ; wire \$110 ; wire \$111 ; wire \$112 ; wire \$113 ; wire \$114 ; wire \$115 ; wire [3:0] \$116 ; wire \$117 ; wire [5:0] \$118 ; wire [4:0] \$119 ; wire \$12 ; wire [31:0] \$120 ; wire [3:0] \$121 ; wire [6:0] \$122 ; wire [31:0] \$123 ; wire [31:0] \$124 ; wire [3:0] \$125 ; wire \$126 ; wire [3:0] \$127 ; wire [3:0] \$128 ; wire [4:0] \$129 ; wire \$13 ; wire [4:0] \$130 ; wire [31:0] \$131 ; wire [3:0] \$132 ; wire [6:0] \$133 ; wire [31:0] \$134 ; wire [31:0] \$135 ; wire [3:0] \$136 ; wire [4:0] \$137 ; wire [3:0] \$138 ; wire [5:0] \$139 ; wire \$14 ; wire [3:0] \$140 ; wire [4:0] \$141 ; wire [5:0] \$142 ; wire [8:0] \$143 ; wire [31:0] \$144 ; wire [31:0] \$145 ; wire [3:0] \$146 ; wire [6:0] \$147 ; wire [158:0] \$148 ; wire [158:0] \$149 ; wire \$15 ; wire \$150 ; wire \$151 ; wire [8:0] \$152 ; reg [15:0] \$153 ; reg \$154 ; reg [15:0] \$155 ; reg \$156 ; reg \$157 ; reg \$158 ; reg \$159 ; wire \$16 ; reg \$160 ; reg \$161 ; reg \$162 ; reg \$163 ; reg [31:0] \$164 ; reg \$165 ; reg [4:0] \$166 ; reg \$167 ; reg \$168 ; reg \$169 ; wire \$17 ; reg [7:0] \$170 ; reg [7:0] \$171 ; reg [7:0] \$172 ; reg [1:0] \$173 ; reg [1:0] \$174 ; reg [2:0] \$175 ; reg [2:0] \$176 ; reg [2:0] \$177 ; reg [3:0] \$178 ; reg [15:0] \$179 ; wire [3:0] \$18 ; reg \$180 ; reg [3:0] \$181 ; reg [3:0] \$182 ; reg \$183 ; reg [15:0] \$184 ; reg [2:0] \$185 ; reg [1:0] \$186 ; reg [31:0] \$187 ; reg [3:0] \$188 ; reg [31:0] \$189 ; wire \$19 ; reg [31:0] \$190 ; reg [31:0] \$191 ; reg \$192 ; wire [6:0] \$2 ; wire \$20 ; wire \$21 ; wire \$22 ; wire \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire [31:0] \$3 ; wire \$30 ; wire \$31 ; wire \$32 ; wire \$33 ; wire \$34 ; wire \$35 ; wire \$36 ; wire \$37 ; wire \$38 ; wire \$39 ; wire [1:0] \$4 ; wire \$40 ; wire \$41 ; wire \$42 ; wire \$43 ; wire \$44 ; wire \$45 ; wire \$46 ; wire \$47 ; wire \$48 ; wire \$49 ; wire [1:0] \$5 ; wire \$50 ; wire \$51 ; wire [37:0] \$52 ; wire \$53 ; wire \$54 ; wire \$55 ; wire \$56 ; wire \$57 ; wire \$58 ; wire \$59 ; wire [1:0] \$6 ; wire [4:0] \$60 ; wire [4:0] \$61 ; wire [8:0] \$62 ; wire [4:0] \$63 ; wire [4:0] \$64 ; wire [5:0] \$65 ; wire \$66 ; wire \$67 ; wire \$68 ; wire \$69 ; wire [34:0] \$7 ; wire \$70 ; wire [3:0] \$71 ; wire [3:0] \$72 ; wire \$73 ; wire [62:0] \$74 ; wire [62:0] \$75 ; wire [3:0] \$76 ; wire [6:0] \$77 ; wire [31:0] \$78 ; wire [3:0] \$79 ; wire [34:0] \$8 ; wire [3:0] \$80 ; wire [4:0] \$81 ; wire [62:0] \$82 ; wire [62:0] \$83 ; wire \$84 ; wire \$85 ; wire [4:0] \$86 ; wire [5:0] \$87 ; wire [3:0] \$88 ; wire \$89 ; wire [34:0] \$9 ; wire \$90 ; wire [4:0] \$91 ; wire [5:0] \$92 ; wire \$93 ; wire \$94 ; wire [4:0] \$95 ; wire [16:0] \$96 ; wire \$97 ; wire \$98 ; wire \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:146" *) reg [31:0] bit_time = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:33" *) input [15:0] bram_address; wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) reg [15:0] \bram_address$84 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:267" *) reg bram_control_mode = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:268" *) reg bram_control_mode_comb; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:34" *) wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:35" *) output [31:0] \bram_read_data$40 ; reg [31:0] \bram_read_data$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:34" *) input [31:0] bram_write_data; wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) reg [31:0] \bram_write_data$85 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:36" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) reg \bram_write_enable$83 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:441" *) reg [3:0] bytes_used; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [4:0] controller_fsm_state = 5'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:176" *) reg [2:0] current_cyclic_register = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:158" *) reg [7:0] current_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:159" *) reg [7:0] current_enabled_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:167" *) reg [1:0] current_rx_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:168" *) reg [2:0] current_rx_word_index = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:219" *) wire [4:0] current_tx_bit_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:166" *) reg [1:0] current_tx_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:169" *) reg [2:0] current_tx_word_index = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:183" *) reg cyclic_data_enabled = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:189" *) wire [2:0] cyclic_read_data_size; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:190" *) wire [1:0] cyclic_read_data_starting_byte_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:178" *) reg [2:0] cyclic_register_size = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:180" *) wire [4:0] cyclic_register_starting_bit_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:179" *) reg [1:0] cyclic_register_starting_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:191" *) wire [2:0] cyclic_write_data_size; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:192" *) wire [1:0] cyclic_write_data_starting_byte_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:99" *) wire [7:0] debugPins; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:62" *) wire [7:0] \debugPins$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:100" *) reg [4:0] debugPins_fsm; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [6:0] externalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] externalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [6:0] externalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] externalWritePort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg externalWritePort__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_rx_register_config_first_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_rx_register_config_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_tx_device_config_wait_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:134" *) reg [15:0] internalBramAddress = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:135" *) wire [31:0] internalBramReadData; (* init = 32'd0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:136" *) wire [31:0] internalBramWriteData; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:137" *) wire internalBramWriteEnable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [6:0] internalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] internalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [6:0] internalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] internalWritePort__data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg internalWritePort__en = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:222" *) wire [31:0] internal_read_port_masked_bytes; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:291" *) reg [15:0] last_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:160" *) reg [7:0] last_enabled_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:445" *) reg [2:0] offset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:172" *) reg [15:0] pre_timer = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:164" *) reg [3:0] previous_rx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) wire \rx$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:184" *) reg rx_cyclic_data_enabled = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:156" *) reg [31:0] rx_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:95" *) reg rx_invalid_crc_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:97" *) reg rx_no_response_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:96" *) reg rx_not_finished_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:163" *) reg [3:0] rx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:225" *) wire [31:0] serial_port_control_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:237" *) wire serial_port_rx_busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:238" *) wire serial_port_rx_crc_valid; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:235" *) wire serial_port_rx_done; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:227" *) reg serial_port_rx_trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:236" *) wire serial_port_tx_busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:234" *) wire serial_port_tx_done; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:226" *) reg serial_port_tx_trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg start_rx_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:145" *) reg start_transfers = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:171" *) reg [3:0] timer = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) output tx; wire tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) wire \tx$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:155" *) reg [31:0] tx_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:162" *) reg [3:0] tx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:147" *) reg update_busy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:148" *) reg update_done = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:149" *) reg update_error = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:173" *) reg update_word_time = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:206" *) reg use_future_device_bram; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:207" *) reg use_previous_device_bram; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg wait_for_final_rx_packet_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg wait_tx_start_read_status_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:174" *) reg [15:0] word_time = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:126" *) reg [31:0] memory [127:0]; initial begin memory[0] = 32'd0; memory[1] = 32'd0; memory[2] = 32'd0; memory[3] = 32'd0; memory[4] = 32'd0; memory[5] = 32'd0; memory[6] = 32'd0; memory[7] = 32'd0; memory[8] = 32'd0; memory[9] = 32'd0; memory[10] = 32'd0; memory[11] = 32'd0; memory[12] = 32'd0; memory[13] = 32'd0; memory[14] = 32'd0; memory[15] = 32'd0; memory[16] = 32'd0; memory[17] = 32'd0; memory[18] = 32'd0; memory[19] = 32'd0; memory[20] = 32'd0; memory[21] = 32'd0; memory[22] = 32'd0; memory[23] = 32'd0; memory[24] = 32'd0; memory[25] = 32'd0; memory[26] = 32'd0; memory[27] = 32'd0; memory[28] = 32'd0; memory[29] = 32'd0; memory[30] = 32'd0; memory[31] = 32'd0; memory[32] = 32'd0; memory[33] = 32'd0; memory[34] = 32'd0; memory[35] = 32'd0; memory[36] = 32'd0; memory[37] = 32'd0; memory[38] = 32'd0; memory[39] = 32'd0; memory[40] = 32'd0; memory[41] = 32'd0; memory[42] = 32'd0; memory[43] = 32'd0; memory[44] = 32'd0; memory[45] = 32'd0; memory[46] = 32'd0; memory[47] = 32'd0; memory[48] = 32'd0; memory[49] = 32'd0; memory[50] = 32'd0; memory[51] = 32'd0; memory[52] = 32'd0; memory[53] = 32'd0; memory[54] = 32'd0; memory[55] = 32'd0; memory[56] = 32'd0; memory[57] = 32'd0; memory[58] = 32'd0; memory[59] = 32'd0; memory[60] = 32'd0; memory[61] = 32'd0; memory[62] = 32'd0; memory[63] = 32'd0; memory[64] = 32'd0; memory[65] = 32'd0; memory[66] = 32'd0; memory[67] = 32'd0; memory[68] = 32'd0; memory[69] = 32'd0; memory[70] = 32'd0; memory[71] = 32'd0; memory[72] = 32'd0; memory[73] = 32'd0; memory[74] = 32'd0; memory[75] = 32'd0; memory[76] = 32'd0; memory[77] = 32'd0; memory[78] = 32'd0; memory[79] = 32'd0; memory[80] = 32'd0; memory[81] = 32'd0; memory[82] = 32'd0; memory[83] = 32'd0; memory[84] = 32'd0; memory[85] = 32'd0; memory[86] = 32'd0; memory[87] = 32'd0; memory[88] = 32'd0; memory[89] = 32'd0; memory[90] = 32'd0; memory[91] = 32'd0; memory[92] = 32'd0; memory[93] = 32'd0; memory[94] = 32'd0; memory[95] = 32'd0; memory[96] = 32'd0; memory[97] = 32'd0; memory[98] = 32'd0; memory[99] = 32'd0; memory[100] = 32'd0; memory[101] = 32'd0; memory[102] = 32'd0; memory[103] = 32'd0; memory[104] = 32'd0; memory[105] = 32'd0; memory[106] = 32'd0; memory[107] = 32'd0; memory[108] = 32'd0; memory[109] = 32'd0; memory[110] = 32'd0; memory[111] = 32'd0; memory[112] = 32'd0; memory[113] = 32'd0; memory[114] = 32'd0; memory[115] = 32'd0; memory[116] = 32'd0; memory[117] = 32'd0; memory[118] = 32'd0; memory[119] = 32'd0; memory[120] = 32'd0; memory[121] = 32'd0; memory[122] = 32'd0; memory[123] = 32'd0; memory[124] = 32'd0; memory[125] = 32'd0; memory[126] = 32'd0; memory[127] = 32'd0; end always @(posedge sync_100_clk) begin if (externalWritePort__en) memory[bram_address[6:0]] <= externalWritePort__data; end always @(posedge sync_100_clk) begin if (internalWritePort__en) memory[internalBramAddress[6:0]] <= internalWritePort__data; end reg [31:0] _0_; reg [31:0] _1_; always @(posedge sync_100_clk) begin _0_ <= memory[internalBramAddress[6:0]]; _1_ <= memory[bram_address[6:0]]; end assign internalBramReadData = _0_; assign externalReadPort__data = _1_; assign \$2 = 6'h20 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$1 ; assign \$3 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$2 ; assign internal_read_port_masked_bytes = internalBramReadData & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$3 ; assign \$6 = \$4 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$5 ; assign \$8 = { 33'h000000000, \$6 } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$7 ; assign \$10 = \$8 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$9 ; assign \$11 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'h80; assign \$12 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'h81; assign \$13 = \$11 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$12 ; assign \$14 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'h82; assign \$15 = \$13 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$14 ; assign \$16 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:316" *) bram_control_mode_comb; assign \$17 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:320" *) bram_control_mode; assign \$18 = current_tx_byte_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:442" *) cyclic_register_size; assign \$19 = bytes_used >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:444" *) 3'h4; assign \$20 = bytes_used == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:446" *) 3'h4; assign \$21 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:485" *) timer; assign \$22 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:523" *) current_device_index; assign \$23 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:525" *) bram_read_data[4]; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:530" *) bram_read_data[4]; assign \$25 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:530" *) \$24 ; assign \$26 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:533" *) bram_read_data[2]; assign \$27 = \$26 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:533" *) bram_read_data[3]; assign \$28 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) bram_read_data[2]; assign \$29 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) bram_read_data[3]; assign \$30 = \$28 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) \$29 ; assign \$31 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) controller_fsm_state; assign \$32 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$33 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$34 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$35 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$36 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h5; assign \$37 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h6; assign \$38 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h7; assign \$39 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h8; assign \$40 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h9; assign \$41 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'ha; assign \$42 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hb; assign \$43 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hc; assign \$44 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hd; assign \$45 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'he; assign \$46 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hf; assign \$47 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h10; assign \$48 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h11; assign \$49 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h12; assign \$50 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h13; assign \$51 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h14; assign \$52 = bit_time * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:203" *) 6'h28; assign \$53 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'h80; assign \$54 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'h81; assign \$55 = \$53 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$54 ; assign \$56 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 8'h82; assign \$57 = \$55 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$56 ; assign \$58 = current_enabled_device_index == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:370" *) 2'h3; assign \$59 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:395" *) 2'h3; assign \$60 = rx_packet_size + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:371" *) 3'h4; assign \$61 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:385" *) current_cyclic_register; assign \$62 = current_device_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:397" *) 1'h1; assign \$63 = rx_packet_size + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:403" *) 3'h4; assign \$64 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:416" *) current_tx_word_index; assign \$65 = 5'h18 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:418" *) current_cyclic_register; assign \$66 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) internalBramReadData[7:5]; assign \$67 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) 2'h3; assign \$68 = \$67 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) cyclic_data_enabled; assign \$69 = \$66 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) \$68 ; assign \$70 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:431" *) current_tx_byte_index; assign \$71 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:434" *) 1'h1; assign \$72 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:435" *) 1'h1; assign \$73 = bytes_used >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:444" *) 3'h4; assign \$74 = internal_read_port_masked_bytes << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:451" *) current_tx_bit_index; assign \$75 = { 31'h00000000, tx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:451" *) \$74 ; assign \$76 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:452" *) cyclic_register_starting_byte_index; assign \$78 = internal_read_port_masked_bytes >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:452" *) \$77 ; assign \$79 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:455" *) 1'h1; assign \$80 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:456" *) current_tx_byte_index; assign \$81 = $signed({ 1'h0, cyclic_register_size }) - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:456" *) $signed(\$80 ); assign \$82 = internal_read_port_masked_bytes << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:460" *) current_tx_bit_index; assign \$83 = { 31'h00000000, tx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:460" *) \$82 ; assign \$84 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:463" *) 2'h3; assign \$85 = \$84 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:463" *) cyclic_data_enabled; assign \$86 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:464" *) current_cyclic_register; assign \$87 = \$86 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:464" *) 1'h1; assign \$88 = current_cyclic_register + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:465" *) 1'h1; assign \$89 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:474" *) current_device_index; assign \$90 = previous_rx_packet_size >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:475" *) tx_packet_size; assign \$91 = previous_rx_packet_size - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:476" *) tx_packet_size; assign \$92 = $signed(\$91 ) + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:476" *) $signed(4'h4); assign \$93 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:485" *) timer; assign \$94 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:494" *) pre_timer; assign \$95 = timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:495" *) 1'h1; assign \$96 = pre_timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:498" *) 1'h1; assign \$97 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:523" *) current_device_index; assign \$98 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:525" *) bram_read_data[4]; assign \$99 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:543" *) 2'h3; assign \$100 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:568" *) timer; assign \$101 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:576" *) pre_timer; assign \$102 = timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:577" *) 1'h1; assign \$103 = pre_timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:580" *) 1'h1; assign \$104 = current_cyclic_register + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:590" *) 1'h1; assign \$105 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:592" *) current_cyclic_register; assign \$106 = \$105 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:592" *) 1'h1; assign \$107 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) internalBramReadData[2:0]; assign \$108 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) 2'h3; assign \$109 = \$108 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) rx_cyclic_data_enabled; assign \$110 = \$107 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) \$109 ; assign \$111 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) 2'h3; assign \$112 = current_enabled_device_index == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) 2'h3; assign \$113 = current_enabled_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) last_enabled_device_index; assign \$114 = \$112 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) \$113 ; assign \$115 = \$111 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) \$114 ; assign \$116 = internalBramReadData[4:3] + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:630" *) internalBramReadData[2:0]; assign \$117 = \$116 <= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:630" *) 3'h4; assign \$118 = 5'h10 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:634" *) current_cyclic_register; assign \$120 = bram_read_data >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$119 ; assign \$121 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) internalBramReadData[2:0]; assign \$123 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$122 ; assign \$124 = \$120 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$123 ; assign \$125 = internalBramReadData[4:3] + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:639" *) internalBramReadData[2:0]; assign \$126 = \$125 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:639" *) 3'h4; assign \$127 = current_rx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:642" *) 1'h1; assign \$128 = 1'h0 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:643" *) current_rx_word_index; assign \$129 = \$128 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:643" *) 1'h1; assign \$131 = bram_read_data >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$130 ; assign \$132 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) internalBramReadData[2:0]; assign \$134 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$133 ; assign \$135 = \$131 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$134 ; assign \$136 = 1'h0 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:654" *) current_rx_word_index; assign \$137 = \$136 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:654" *) 1'h1; assign \$138 = current_rx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:655" *) 1'h1; assign \$139 = 5'h10 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:682" *) current_cyclic_register; assign \$140 = cyclic_register_starting_byte_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) cyclic_register_size; assign \$141 = \$140 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) 3'h4; assign \$142 = $signed(4'h4) - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) $signed(\$141 ); assign \$144 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) \$143 ; assign \$145 = bram_read_data & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:684" *) \$144 ; assign \$146 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:686" *) cyclic_register_starting_byte_index; assign \$148 = \$145 << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:684" *) \$147 ; assign \$149 = { 127'h00000000000000000000000000000000, rx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:683" *) \$148 ; assign \$150 = current_device_index < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:694" *) 2'h3; assign \$151 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:731" *) 2'h3; assign \$152 = current_device_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:732" *) 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:174" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) word_time <= 16'h0000; else word_time <= \$153 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:173" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_word_time <= 1'h0; else update_word_time <= \$154 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:134" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalBramAddress <= 16'h0000; else internalBramAddress <= \$155 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_tx_device_config_wait_read_delay <= 1'h0; else get_tx_device_config_wait_read_delay <= \$156 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) wait_tx_start_read_status_read_delay <= 1'h0; else wait_tx_start_read_status_read_delay <= \$157 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) wait_for_final_rx_packet_read_delay <= 1'h0; else wait_for_final_rx_packet_read_delay <= \$158 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_rx_register_config_read_delay <= 1'h0; else get_rx_register_config_read_delay <= \$159 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_rx_register_config_first_read_delay <= 1'h0; else get_rx_register_config_first_read_delay <= \$160 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start_rx_read_delay <= 1'h0; else start_rx_read_delay <= \$161 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:267" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_control_mode <= 1'h0; else bram_control_mode <= \$162 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:145" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start_transfers <= 1'h0; else start_transfers <= \$163 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:146" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bit_time <= 32'd0; else bit_time <= \$164 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:291" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) last_bram_address <= 16'h0000; else last_bram_address <= bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:137" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__en <= 1'h0; else internalWritePort__en <= \$165 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) controller_fsm_state <= 5'h00; else controller_fsm_state <= \$166 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:147" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_busy <= 1'h0; else update_busy <= \$167 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:148" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_done <= 1'h0; else update_done <= \$168 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:149" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_error <= 1'h0; else update_error <= \$169 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:158" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_device_index <= 8'h00; else current_device_index <= \$170 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:160" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) last_enabled_device_index <= 8'h00; else last_enabled_device_index <= \$171 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:159" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_enabled_device_index <= 8'h00; else current_enabled_device_index <= \$172 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:166" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_tx_byte_index <= 2'h0; else current_tx_byte_index <= \$173 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:167" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_rx_byte_index <= 2'h0; else current_rx_byte_index <= \$174 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:168" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_rx_word_index <= 3'h0; else current_rx_word_index <= \$175 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:169" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_tx_word_index <= 3'h0; else current_tx_word_index <= \$176 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:176" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_cyclic_register <= 3'h0; else current_cyclic_register <= \$177 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:171" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timer <= 4'h0; else timer <= \$178 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:172" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) pre_timer <= 16'h0000; else pre_timer <= \$179 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:183" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_data_enabled <= 1'h0; else cyclic_data_enabled <= \$180 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:164" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) previous_rx_packet_size <= 4'h0; else previous_rx_packet_size <= \$181 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:163" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_packet_size <= 4'h0; else rx_packet_size <= \$182 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_write_enable$83 <= 1'h0; else \bram_write_enable$83 <= \$183 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_address$84 <= 16'h0000; else \bram_address$84 <= \$184 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:178" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_register_size <= 3'h0; else cyclic_register_size <= \$185 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:179" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_register_starting_byte_index <= 2'h0; else cyclic_register_starting_byte_index <= \$186 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_write_data$85 <= 32'd0; else \bram_write_data$85 <= \$187 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:162" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_packet_size <= 4'h0; else tx_packet_size <= \$188 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:155" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_data <= 32'd0; else tx_data <= \$189 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:136" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__data <= 32'd0; else internalWritePort__data <= \$190 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:156" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_data <= 32'd0; else rx_data <= \$191 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:184" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_cyclic_data_enabled <= 1'h0; else rx_cyclic_data_enabled <= \$192 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:108" *) \Controller.em_serial_controller_B.drive_serial_port drive_serial_port ( .address(\bram_address$84 ), .bram_read_data(bram_read_data), .bram_write_data(\bram_write_data$85 ), .bram_write_enable(\bram_write_enable$83 ), .debugPins(debugPins), .rx(rx), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .tx(tx) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end bram_control_mode_comb = 1'h0; if (\$15 ) begin bram_control_mode_comb = 1'h1; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \bram_read_data$40 = 32'd0; casez (last_bram_address) 16'h0082: if (bram_control_mode) begin \bram_read_data$40 = { 29'h00000000, update_error, update_done, update_busy }; end endcase if (\$17 ) begin \bram_read_data$40 = externalReadPort__data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end externalWritePort__data = 32'd0; if (\$16 ) begin externalWritePort__data = bram_write_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end externalWritePort__en = 1'h0; if (\$16 ) begin externalWritePort__en = bram_write_enable; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end debugPins_fsm = 5'h00; casez (controller_fsm_state) 5'h00: debugPins_fsm = 5'h01; 5'h01: debugPins_fsm = 5'h02; 5'h02: debugPins_fsm = 5'h03; 5'h03: debugPins_fsm = 5'h04; 5'h05: debugPins_fsm = 5'h05; 5'h06: debugPins_fsm = 5'h06; 5'h07: debugPins_fsm = 5'h07; 5'h08: debugPins_fsm = 5'h08; 5'h09: debugPins_fsm = 5'h09; 5'h0a: debugPins_fsm = 5'h0a; 5'h0b: debugPins_fsm = 5'h0b; 5'h0c: debugPins_fsm = 5'h0c; 5'h04: debugPins_fsm = 5'h0d; 5'h0f: debugPins_fsm = 5'h0e; 5'h0d: debugPins_fsm = 5'h0e; 5'h11: debugPins_fsm = 5'h0f; 5'h10: debugPins_fsm = 5'h10; 5'h12: debugPins_fsm = 5'h11; 5'h13: debugPins_fsm = 5'h12; 5'h14: debugPins_fsm = 5'h13; 5'h0e: debugPins_fsm = 5'h14; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end use_future_device_bram = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: use_future_device_bram = 1'h1; 5'h03: use_future_device_bram = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end bytes_used = 4'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: bytes_used = \$18 ; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end offset = 3'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: if (\$19 ) begin (* full_case = 32'd1 *) if (\$20 ) begin offset = 3'h4; end else begin offset = 3'h3; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end serial_port_tx_trigger = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: if (\$21 ) begin serial_port_tx_trigger = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end rx_invalid_crc_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$25 ) begin rx_invalid_crc_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end rx_not_finished_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$27 ) begin rx_not_finished_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end rx_no_response_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$30 ) begin rx_no_response_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end use_previous_device_bram = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin use_previous_device_bram = 1'h1; end end 5'h04: /* empty */; 5'h0f: use_previous_device_bram = 1'h1; 5'h0d: use_previous_device_bram = 1'h1; 5'h11: /* empty */; 5'h10: use_previous_device_bram = 1'h1; 5'h12: use_previous_device_bram = 1'h1; 5'h13: use_previous_device_bram = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end serial_port_rx_trigger = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: serial_port_rx_trigger = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$153 = word_time; if (update_word_time) begin \$153 = \$52 [15:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$154 = update_word_time; if (update_word_time) begin \$154 = 1'h0; end if (bram_write_enable) begin casez (bram_address) 16'h0080: /* empty */; 16'h0081: \$154 = 1'h1; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$155 [4:0] = internalBramAddress[4:0]; (* full_case = 32'd1 *) if (use_previous_device_bram) begin \$155 [15:5] = { 3'h0, last_enabled_device_index }; end else if (use_future_device_bram) begin \$155 [15:5] = { 3'h0, current_device_index }; end else begin \$155 [15:5] = { 3'h0, current_enabled_device_index }; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: \$155 [4:0] = 5'h00; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$155 [4:0] = \$61 ; end 5'h05: \$155 [4:0] = \$65 [4:0]; 5'h06: /* empty */; 5'h07: if (\$85 ) begin \$155 [4:0] = \$87 [4:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$155 [4:0] = 5'h01; end end 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$155 [4:0] = \$106 [4:0]; end 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$155 [4:0] = 5'h08; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin if (\$117 ) begin \$155 [4:0] = \$118 [4:0]; end end 5'h12: /* empty */; 5'h13: \$155 [4:0] = \$139 [4:0]; 5'h14: /* empty */; 5'h0e: \$155 [4:0] = 5'h00; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$156 = get_tx_device_config_wait_read_delay; if (get_tx_device_config_wait_read_delay) begin \$156 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: \$156 = 1'h1; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin end else if (\$59 ) begin \$156 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$157 = wait_tx_start_read_status_read_delay; if (wait_tx_start_read_status_read_delay) begin \$157 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: \$157 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$158 = wait_for_final_rx_packet_read_delay; if (wait_for_final_rx_packet_read_delay) begin \$158 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: if (\$100 ) begin \$158 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$159 = get_rx_register_config_read_delay; if (get_rx_register_config_read_delay) begin \$159 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$159 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$160 = get_rx_register_config_first_read_delay; if (get_rx_register_config_first_read_delay) begin \$160 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$160 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$161 = start_rx_read_delay; if (start_rx_read_delay) begin \$161 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$161 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end (* full_case = 32'd1 *) if (\$57 ) begin \$162 = 1'h1; end else begin \$162 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$163 = start_transfers; if (bram_write_enable) begin casez (bram_address) 16'h0080: \$163 = bram_write_data[0]; endcase end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$163 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$164 = bit_time; if (bram_write_enable) begin casez (bram_address) 16'h0080: /* empty */; 16'h0081: \$164 = bram_write_data; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$165 = internalWritePort__en; casez (controller_fsm_state) 5'h00: \$165 = 1'h0; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$165 = 1'h1; end end 5'h04: /* empty */; 5'h0f: \$165 = 1'h0; 5'h0d: \$165 = 1'h0; 5'h11: \$165 = 1'h0; 5'h10: if (\$110 ) begin if (\$117 ) begin \$165 = 1'h1; end end 5'h12: /* empty */; 5'h13: \$165 = 1'h1; 5'h14: /* empty */; 5'h0e: \$165 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$166 = controller_fsm_state; casez (controller_fsm_state) 5'h00: if (start_transfers) begin \$166 = 5'h01; end 5'h01: \$166 = 5'h02; 5'h02: if (get_tx_device_config_wait_read_delay) begin \$166 = 5'h03; end 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$166 = 5'h04; end else if (internalBramReadData[0]) begin \$166 = 5'h05; end else if (\$59 ) begin \$166 = 5'h02; end else begin \$166 = 5'h04; end 5'h05: \$166 = 5'h06; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin \$166 = 5'h07; end else begin \$166 = 5'h08; end 5'h07: (* full_case = 32'd1 *) if (\$85 ) begin \$166 = 5'h05; end else begin \$166 = 5'h08; end 5'h08: \$166 = 5'h09; 5'h09: if (\$93 ) begin \$166 = 5'h0a; end 5'h0a: if (wait_tx_start_read_status_read_delay) begin \$166 = 5'h0b; end 5'h0b: if (bram_read_data[1]) begin \$166 = 5'h0c; end 5'h0c: if (bram_read_data[0]) begin (* full_case = 32'd1 *) if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin \$166 = 5'h0d; end else begin (* full_case = 32'd1 *) if (\$99 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end end end else begin \$166 = 5'h0e; end end 5'h04: if (\$100 ) begin if (wait_for_final_rx_packet_read_delay) begin \$166 = 5'h0c; end end 5'h0f: if (get_rx_register_config_read_delay) begin \$166 = 5'h10; end 5'h0d: if (get_rx_register_config_first_read_delay) begin \$166 = 5'h10; end 5'h11: \$166 = 5'h10; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin \$166 = 5'h0f; end else begin \$166 = 5'h12; end end else if (\$115 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end 5'h12: \$166 = 5'h13; 5'h13: \$166 = 5'h0f; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end 5'h0e: if (start_rx_read_delay) begin \$166 = 5'h02; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$167 = update_busy; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$167 = 1'h1; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin (* full_case = 32'd1 *) if (\$99 ) begin end else begin \$167 = 1'h0; end end end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin end else if (\$115 ) begin end else begin \$167 = 1'h0; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin end else begin \$167 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$168 = update_done; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$168 = 1'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin (* full_case = 32'd1 *) if (\$99 ) begin end else begin \$168 = 1'h1; end end end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin end else if (\$115 ) begin end else begin \$168 = 1'h1; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin end else begin \$168 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$169 = update_error; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$169 = 1'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin \$169 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$170 = current_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$170 = 8'h00; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin end else if (\$59 ) begin \$170 = \$62 [7:0]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin end else begin if (\$151 ) begin \$170 = \$152 [7:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$171 = last_enabled_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$171 = 8'h00; 5'h02: /* empty */; 5'h03: \$171 = current_enabled_device_index; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$172 = current_enabled_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$172 = 8'h00; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$172 = current_device_index; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$173 = current_tx_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$173 = 2'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: (* full_case = 32'd1 *) if (\$73 ) begin \$173 = \$81 [1:0]; end else begin \$173 = bytes_used[1:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$173 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$174 = current_rx_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$174 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$175 = current_rx_word_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$175 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$175 = 3'h0; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin if (\$126 ) begin \$175 = \$127 [2:0]; end end else begin \$175 = \$138 [2:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$176 = current_tx_word_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$176 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$176 = \$71 [2:0]; end end 5'h07: if (\$73 ) begin \$176 = \$79 [2:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$176 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$177 = current_cyclic_register; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$177 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: if (\$85 ) begin \$177 = \$88 [2:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$177 = \$104 [2:0]; end 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$177 = 3'h0; end 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$177 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$178 = timer; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$178 = 4'h0; 5'h02: /* empty */; 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$178 = \$60 [3:0]; end else if (internalBramReadData[0]) begin end else if (\$59 ) begin end else begin \$178 = \$63 [3:0]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: if (\$89 ) begin (* full_case = 32'd1 *) if (\$90 ) begin \$178 = \$92 [3:0]; end else begin \$178 = 4'h4; end end 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin end else begin if (\$94 ) begin \$178 = \$95 [3:0]; end end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: (* full_case = 32'd1 *) if (\$100 ) begin end else begin if (\$101 ) begin \$178 = \$102 [3:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$179 = pre_timer; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$179 = 16'h0000; 5'h02: /* empty */; 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$179 = word_time; end else if (internalBramReadData[0]) begin end else if (\$59 ) begin end else begin \$179 = word_time; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: \$179 = word_time; 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin end else begin (* full_case = 32'd1 *) if (\$94 ) begin \$179 = word_time; end else begin \$179 = \$96 [15:0]; end end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: (* full_case = 32'd1 *) if (\$100 ) begin end else begin (* full_case = 32'd1 *) if (\$101 ) begin \$179 = word_time; end else begin \$179 = \$103 [15:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$180 = cyclic_data_enabled; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$180 = internalBramReadData[1]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$180 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$181 = previous_rx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$181 = rx_packet_size; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$182 = rx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin (* full_case = 32'd1 *) if (internalBramReadData[1]) begin \$182 = internalBramReadData[5:2]; end else begin \$182 = 4'h3; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$183 = \bram_write_enable$83 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: \$183 = 1'h0; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$183 = 1'h1; end end 5'h07: if (\$73 ) begin \$183 = 1'h1; end 5'h08: /* empty */; 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin \$183 = 1'h1; end else begin \$183 = 1'h0; end 5'h0a: \$183 = 1'h0; 5'h0b: /* empty */; 5'h0c: (* full_case = 32'd1 *) if (bram_read_data[0]) begin end else begin \$183 = 1'h0; end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin \$183 = 1'h0; end else begin \$183 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$184 = \bram_address$84 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: \$184 = { 11'h000, \$64 }; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: if (\$93 ) begin \$184 = 16'h8000; end 5'h0a: \$184 = 16'h8002; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: if (\$100 ) begin \$184 = 16'h8002; end 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$184 = 16'h0000; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin if (\$126 ) begin \$184 = { 11'h000, \$129 }; end end else begin \$184 = { 11'h000, \$137 }; end end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$184 = 16'h8000; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$185 = cyclic_register_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: if (\$69 ) begin \$185 = internalBramReadData[7:5]; end 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin \$185 = internalBramReadData[2:0]; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$185 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$186 = cyclic_register_starting_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: if (\$69 ) begin \$186 = internalBramReadData[9:8]; end 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin \$186 = internalBramReadData[4:3]; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$186 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$187 = \bram_write_data$85 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$187 = tx_data; end end 5'h07: if (\$73 ) begin \$187 = \$75 [31:0]; end 5'h08: /* empty */; 5'h09: if (\$93 ) begin \$187 = \$10 [31:0]; end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$187 = \$10 [31:0]; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$188 = tx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$188 = \$72 ; end end 5'h07: (* full_case = 32'd1 *) if (\$85 ) begin end else begin \$188 = { 1'h0, current_tx_word_index }; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$189 = tx_data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: (* full_case = 32'd1 *) if (\$73 ) begin \$189 = \$78 ; end else begin \$189 = \$83 [31:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$189 = 32'd0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$190 = internalWritePort__data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$190 = { 29'h00000000, rx_invalid_crc_fault, rx_not_finished_fault, rx_no_response_fault }; end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin if (\$117 ) begin \$190 = \$124 ; end end 5'h12: /* empty */; 5'h13: \$190 = \$149 [31:0]; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$191 = rx_data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin end else begin \$191 = \$135 ; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$19 ) begin end \$192 = rx_cyclic_data_enabled; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin end else begin \$192 = cyclic_data_enabled; end endcase end assign \rx$1 = rx; assign \tx$3 = tx; assign \debugPins$5 = debugPins; assign internalReadPort__addr = internalBramAddress[6:0]; assign internalWritePort__addr = internalBramAddress[6:0]; assign internalBramWriteData = internalWritePort__data; assign internalBramWriteEnable = internalWritePort__en; assign internalReadPort__data = internalBramReadData; assign cyclic_read_data_size = internalBramReadData[2:0]; assign cyclic_read_data_starting_byte_index = internalBramReadData[4:3]; assign cyclic_write_data_size = internalBramReadData[7:5]; assign cyclic_write_data_starting_byte_index = internalBramReadData[9:8]; assign serial_port_control_data = \$10 [31:0]; assign serial_port_tx_done = bram_read_data[0]; assign serial_port_rx_done = bram_read_data[2]; assign serial_port_tx_busy = bram_read_data[1]; assign serial_port_rx_busy = bram_read_data[3]; assign serial_port_rx_crc_valid = bram_read_data[4]; assign externalReadPort__addr = bram_address[6:0]; assign externalWritePort__addr = bram_address[6:0]; assign cyclic_register_starting_bit_index = { cyclic_register_starting_byte_index, 3'h0 }; assign current_tx_bit_index = { current_tx_byte_index, 3'h0 }; assign \$1 = { cyclic_register_size, 3'h0 }; assign \$4 = { 1'h0, serial_port_tx_trigger }; assign \$5 = { serial_port_rx_trigger, 1'h0 }; assign \$7 = { 15'h0000, tx_packet_size, 16'h0000 }; assign \$9 = { 7'h00, rx_packet_size, 24'h000000 }; assign \$77 = { \$76 , 3'h0 }; assign \$119 = { internalBramReadData[4:3], 3'h0 }; assign \$122 = { \$121 , 3'h0 }; assign \$130 = { internalBramReadData[4:3], 3'h0 }; assign \$133 = { \$132 , 3'h0 }; assign \$143 = { \$142 , 3'h0 }; assign \$147 = { \$146 , 3'h0 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:67" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_B.drive_serial_port (sync_100_rst, rx, bram_write_enable, address, bram_write_data, bram_read_data, debugPins, tx, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$20 = 0; wire \$1 ; wire \$10 ; reg \$100 ; reg \$101 ; reg \$102 ; reg [8:0] \$103 ; reg [2:0] \$104 ; reg \$105 ; reg \$106 ; reg \$107 ; reg [3:0] \$108 ; reg [1:0] \$109 ; wire \$11 ; reg [7:0] \$110 ; reg [10:0] \$111 ; reg \$112 ; reg [31:0] \$113 ; reg [2:0] \$114 ; reg \$115 ; reg \$116 ; reg [3:0] \$117 ; reg [1:0] \$118 ; reg [7:0] \$119 ; wire \$12 ; reg [10:0] \$120 ; reg \$121 ; reg [31:0] \$122 ; reg [31:0] \$123 ; reg [31:0] \$124 ; reg [7:0] \$125 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire \$17 ; wire \$18 ; wire \$19 ; wire [9:0] \$191 ; wire \$193 ; wire \$2 ; wire \$20 ; wire [2:0] \$21 ; wire \$22 ; wire [7:0] \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire [9:0] \$28 ; wire \$29 ; wire \$3 ; wire \$30 ; wire [5:0] \$31 ; wire [6:0] \$32 ; wire \$33 ; wire [5:0] \$34 ; wire [6:0] \$35 ; wire \$36 ; wire [10:0] \$37 ; wire [11:0] \$38 ; wire \$39 ; wire \$4 ; wire \$40 ; wire [10:0] \$41 ; wire \$42 ; wire [5:0] \$43 ; wire [6:0] \$44 ; wire \$45 ; wire [5:0] \$46 ; wire [6:0] \$47 ; wire \$48 ; wire [4:0] \$49 ; wire \$5 ; wire [10:0] \$50 ; wire [11:0] \$51 ; wire \$52 ; wire \$53 ; wire \$54 ; wire \$55 ; wire \$56 ; wire [8:0] \$57 ; wire [8:0] \$58 ; wire \$59 ; wire \$6 ; wire [2:0] \$60 ; wire [11:0] \$61 ; wire \$62 ; wire \$63 ; wire \$64 ; wire \$65 ; wire [9:0] \$66 ; wire [10:0] \$67 ; wire [11:0] \$68 ; wire [11:0] \$69 ; wire \$7 ; wire \$70 ; wire [5:0] \$71 ; wire [6:0] \$72 ; wire \$73 ; wire [4:0] \$74 ; wire [10:0] \$75 ; wire [11:0] \$76 ; wire \$77 ; wire \$78 ; wire \$79 ; wire \$8 ; wire \$80 ; wire \$81 ; wire \$82 ; wire [8:0] \$83 ; wire [2:0] \$84 ; wire [11:0] \$85 ; reg \$86 ; reg \$87 ; reg \$88 ; reg [7:0] \$89 ; wire \$9 ; reg [7:0] \$90 ; reg [9:0] \$91 ; reg [1:0] \$92 ; reg [31:0] \$93 ; reg [15:0] \$94 ; reg \$95 ; reg [31:0] \$96 ; reg \$97 ; reg \$98 ; reg \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) input [15:0] address; wire [15:0] address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:76" *) reg [9:0] bitLength = 10'h008; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:142" *) reg bram_control_mode = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:34" *) output [31:0] bram_read_data; reg [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) input [31:0] bram_write_data; wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [31:0] \crc$62 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) reg [31:0] data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) reg [31:0] \data$63 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:62" *) output [7:0] debugPins; reg [7:0] debugPins; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:136" *) reg [8:0] delay_cnt = 9'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:137" *) reg delay_cnt_increment; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:138" *) reg delay_cnt_reset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [3:0] externalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] externalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [3:0] externalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] externalWritePort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg externalWritePort__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [3:0] internalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] internalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:105" *) reg [15:0] internalReadWriteAddress = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [3:0] internalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] internalWritePort__data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg internalWritePort__en = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:97" *) wire [31:0] readData; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:37" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:26" *) reg rxBusy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:29" *) reg rxCRCvalid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:129" *) reg [3:0] rxCurrentBit = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:130" *) reg [1:0] rxCurrentByte = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:131" *) reg [7:0] rxCurrentWord = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:111" *) reg [31:0] rxData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:28" *) reg rxDone = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:112" *) reg [31:0] rxNewData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:113" *) reg [7:0] rxNewDataIndex = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:73" *) reg [7:0] rxPacketSize = 8'h01; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:127" *) reg [10:0] rxTimer = 11'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:116" *) reg rxWriteDataRequest = 1'h0; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] rx_fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:71" *) reg rx_start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) wire rx_synced; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg \start$49 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) output tx; reg tx = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:25" *) reg txBusy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:123" *) reg [3:0] txCurrentBit = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:124" *) reg [1:0] txCurrentByte = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:125" *) reg [7:0] txCurrentWord = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:27" *) reg txDone = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:72" *) reg [7:0] txPacketSize = 8'h01; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:114" *) reg [31:0] txReadData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:118" *) reg txReadDataRequest = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:119" *) reg [1:0] txReadDataRequestWait = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:121" *) reg [10:0] txTimer = 11'h000; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] tx_fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:70" *) reg tx_start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:117" *) reg updateStatusDataRequest = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg \valid$48 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:95" *) wire [31:0] writeData; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:96" *) wire writeEnable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:87" *) reg [31:0] memory [15:0]; initial begin memory[0] = 32'd0; memory[1] = 32'd0; memory[2] = 32'd0; memory[3] = 32'd0; memory[4] = 32'd0; memory[5] = 32'd0; memory[6] = 32'd0; memory[7] = 32'd0; memory[8] = 32'd0; memory[9] = 32'd0; memory[10] = 32'd0; memory[11] = 32'd0; memory[12] = 32'd0; memory[13] = 32'd0; memory[14] = 32'd0; memory[15] = 32'd0; end always @(posedge sync_100_clk) begin if (externalWritePort__en) memory[address[3:0]] <= externalWritePort__data; end always @(posedge sync_100_clk) begin if (internalWritePort__en) memory[internalReadWriteAddress[3:0]] <= internalWritePort__data; end reg [31:0] _0_; reg [31:0] _1_; always @(posedge sync_100_clk) begin _0_ <= memory[internalReadWriteAddress[3:0]]; _1_ <= memory[address[3:0]]; end assign internalReadPort__data = _0_; assign readData = _1_; assign \$2 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:167" *) address[15]; assign \$4 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:330" *) 7'h64; assign \$5 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:339" *) rx_synced; assign \$6 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:344" *) 9'h12c; assign \$7 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) tx_fsm_state; assign \$8 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$9 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$10 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$11 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$12 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) rx_fsm_state; assign \$13 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$14 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$15 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$16 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$17 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h5; assign \$18 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h6; assign \$19 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h7; assign \$20 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:174" *) txReadDataRequestWait; assign \$21 = txReadDataRequestWait - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:175" *) 1'h1; assign \$22 = txReadDataRequestWait == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:176" *) 1'h1; assign \$28 = delay_cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:206" *) 1'h1; assign \$29 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:234" *) txTimer; assign \$30 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:235" *) txPacketSize; assign \$31 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:236" *) 4'h8; assign \$32 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:236" *) \$31 ; assign \$33 = crc >> \$32 ; assign \$34 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:238" *) 4'h8; assign \$35 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:238" *) \$34 ; assign \$36 = txReadData >> \$35 ; assign \$37 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:240" *) 1'h1; assign \$38 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:244" *) 1'h1; assign \$39 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:247" *) txTimer; assign \$40 = txCurrentBit == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:249" *) 4'h8; assign \$41 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:251" *) 1'h1; assign \$42 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:255" *) txPacketSize; assign \$43 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:256" *) 4'h8; assign \$44 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:256" *) \$43 ; assign \$45 = crc >> \$44 ; assign \$46 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:258" *) 4'h8; assign \$47 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:258" *) \$46 ; assign \$48 = txReadData >> \$47 ; assign \$49 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:260" *) 1'h1; assign \$50 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:261" *) 1'h1; assign \$51 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:264" *) 1'h1; assign \$52 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:267" *) txTimer; assign \$53 = txCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) 2'h3; assign \$54 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) txPacketSize; assign \$55 = \$53 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) \$54 ; assign \$56 = txCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:284" *) 2'h3; assign \$57 = txCurrentWord + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:286" *) 1'h1; assign \$58 = txPacketSize - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:289" *) 1'h1; assign \$59 = txCurrentWord != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:289" *) \$58 ; assign \$60 = txCurrentByte + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:293" *) 1'h1; assign \$61 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:300" *) 1'h1; assign \$62 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:330" *) 7'h64; assign \$63 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:344" *) 9'h12c; assign \$65 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:361" *) rx_synced; assign \$191 = bitLength / (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) 2'h2; assign \$67 = bitLength + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) \$66 ; assign \$68 = \$67 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) 1'h1; assign \$69 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:369" *) 1'h1; assign \$70 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:376" *) rxTimer; assign \$71 = rxCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:377" *) 4'h8; assign \$72 = rxCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:377" *) \$71 ; assign \$73 = rxCurrentBit == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:379" *) 3'h7; assign \$74 = rxCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:384" *) 1'h1; assign \$75 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:385" *) 1'h1; assign \$76 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:389" *) 1'h1; assign \$77 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:396" *) rxTimer; assign \$78 = rxCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) 2'h3; assign \$79 = rxCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) rxPacketSize; assign \$80 = \$78 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) \$79 ; assign \$81 = \crc$62 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:406" *) rxData; assign \$82 = rxCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:419" *) 2'h3; assign \$83 = rxCurrentWord + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:421" *) 1'h1; assign \$84 = rxCurrentByte + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:429" *) 1'h1; assign \$85 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:434" *) 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_control_mode <= 1'h0; else bram_control_mode <= \$86 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:70" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_start <= 1'h0; else tx_start <= \$87 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:71" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_start <= 1'h0; else rx_start <= \$88 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:72" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txPacketSize <= 8'h01; else txPacketSize <= \$89 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:73" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxPacketSize <= 8'h01; else rxPacketSize <= \$90 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:76" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bitLength <= 10'h008; else bitLength <= \$91 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:119" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadDataRequestWait <= 2'h0; else txReadDataRequestWait <= \$92 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:114" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadData <= 32'd0; else txReadData <= \$93 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:105" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalReadWriteAddress <= 16'h0000; else internalReadWriteAddress <= \$94 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:118" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadDataRequest <= 1'h0; else txReadDataRequest <= \$95 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__data <= 32'd0; else internalWritePort__data <= \$96 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__en <= 1'h0; else internalWritePort__en <= \$97 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:116" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxWriteDataRequest <= 1'h0; else rxWriteDataRequest <= \$98 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) valid <= 1'h0; else valid <= \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start <= 1'h0; else start <= \$100 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \valid$48 <= 1'h0; else \valid$48 <= \$101 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \start$49 <= 1'h0; else \start$49 <= \$102 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:136" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) delay_cnt <= 9'h000; else delay_cnt <= \$103 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_fsm_state <= 3'h0; else tx_fsm_state <= \$104 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:27" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txDone <= 1'h1; else txDone <= \$105 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:25" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txBusy <= 1'h0; else txBusy <= \$106 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx <= 1'h1; else tx <= \$107 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:123" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentBit <= 4'h0; else txCurrentBit <= \$108 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:124" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentByte <= 2'h0; else txCurrentByte <= \$109 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:125" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentWord <= 8'h00; else txCurrentWord <= \$110 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:121" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txTimer <= 11'h000; else txTimer <= \$111 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:117" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) updateStatusDataRequest <= 1'h0; else updateStatusDataRequest <= \$112 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data <= 32'd0; else data <= \$113 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_fsm_state <= 3'h0; else rx_fsm_state <= \$114 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:28" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxDone <= 1'h1; else rxDone <= \$115 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:29" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCRCvalid <= 1'h0; else rxCRCvalid <= \$116 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:129" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentBit <= 4'h0; else rxCurrentBit <= \$117 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:130" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentByte <= 2'h0; else rxCurrentByte <= \$118 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:131" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentWord <= 8'h00; else rxCurrentWord <= \$119 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:127" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxTimer <= 11'h000; else rxTimer <= \$120 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:26" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxBusy <= 1'h0; else rxBusy <= \$121 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:111" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxData <= 32'd0; else rxData <= \$122 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:112" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxNewData <= 32'd0; else rxNewData <= \$123 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \data$63 <= 32'd0; else \data$63 <= \$124 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:113" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxNewDataIndex <= 8'h00; else rxNewDataIndex <= \$125 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:84" *) \Controller.em_serial_controller_B.drive_serial_port.U$3 \U$3 ( .rx(rx), .stage1(rx_synced), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:81" *) \Controller.em_serial_controller_B.drive_serial_port.crc32_rx crc32_rx ( .crc(\crc$62 ), .data_in(\data$63 ), .start(\start$49 ), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .valid(\valid$48 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:80" *) \Controller.em_serial_controller_B.drive_serial_port.crc32_tx crc32_tx ( .crc(crc), .data_in(data), .start(start), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .valid(valid) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end bram_read_data = 32'd0; casez (address) 16'h8002: if (\$1 ) begin bram_read_data = { 27'h0000000, rxCRCvalid, rxBusy, rxDone, txBusy, txDone }; end endcase if (\$2 ) begin bram_read_data = readData; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end externalWritePort__data = 32'd0; if (\$2 ) begin externalWritePort__data = bram_write_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end externalWritePort__en = 1'h0; if (\$2 ) begin externalWritePort__en = bram_write_enable; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: debugPins = 8'h01; 3'h1: debugPins = 8'h02; 3'h2: debugPins = 8'h03; 3'h3: debugPins = 8'h04; 3'h4: debugPins = 8'h05; 3'h5: debugPins = 8'h06; 3'h6: debugPins = 8'h07; 3'h7: debugPins = 8'h08; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end delay_cnt_increment = 1'h0; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: if (\$3 ) begin delay_cnt_increment = 1'h1; end 3'h3: if (\$5 ) begin delay_cnt_increment = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end delay_cnt_reset = 1'h0; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: begin (* full_case = 32'd1 *) if (\$3 ) begin end else begin delay_cnt_reset = 1'h1; end if (\$4 ) begin delay_cnt_reset = 1'h1; end end 3'h3: begin (* full_case = 32'd1 *) if (\$5 ) begin end else begin delay_cnt_reset = 1'h1; end if (\$6 ) begin delay_cnt_reset = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end (* full_case = 32'd1 *) if (address[15]) begin \$86 = 1'h1; end else begin \$86 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$87 = tx_start; if (bram_write_enable) begin casez (address) 16'h8000: \$87 = bram_write_data[0]; endcase end casez (tx_fsm_state) 3'h0: if (tx_start) begin \$87 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$87 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$88 = rx_start; if (bram_write_enable) begin casez (address) 16'h8000: \$88 = bram_write_data[1]; endcase end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: if (rx_start) begin \$88 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$88 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$89 = txPacketSize; if (bram_write_enable) begin casez (address) 16'h8000: \$89 = bram_write_data[23:16]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$90 = rxPacketSize; if (bram_write_enable) begin casez (address) 16'h8000: \$90 = bram_write_data[31:24]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$91 = bitLength; if (bram_write_enable) begin casez (address) 16'h8000: /* empty */; 16'h8001: \$91 = bram_write_data[9:0]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$92 = txReadDataRequestWait; if (\$20 ) begin \$92 = \$21 [1:0]; end if (txReadDataRequest) begin \$92 = 2'h2; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$92 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$93 = txReadData; if (\$20 ) begin if (\$22 ) begin \$93 = internalReadPort__data; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$94 = internalReadWriteAddress; if (txReadDataRequest) begin \$94 = { 8'h00, \$23 }; end else if (rxWriteDataRequest) begin \$94 = { 8'h00, rxNewDataIndex }; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$95 = txReadDataRequest; if (txReadDataRequest) begin \$95 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$95 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin if (\$59 ) begin \$95 = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$96 = internalWritePort__data; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$96 = rxNewData; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$97 = internalWritePort__en; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$97 = 1'h1; end if (internalWritePort__en) begin \$97 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$98 = rxWriteDataRequest; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$98 = 1'h0; end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$98 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$99 = valid; if (\$24 ) begin \$99 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$99 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$100 = start; if (\$25 ) begin \$100 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$100 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$101 = \valid$48 ; if (\$26 ) begin \$101 = 1'h0; end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$101 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$102 = \start$49 ; if (\$27 ) begin \$102 = 1'h0; end casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$102 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$103 = delay_cnt; if (delay_cnt_increment) begin \$103 = \$28 [8:0]; end if (delay_cnt_reset) begin \$103 = 9'h000; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$104 = tx_fsm_state; casez (tx_fsm_state) 3'h0: if (tx_start) begin \$104 = 3'h1; end 3'h1: \$104 = 3'h2; 3'h2: if (\$29 ) begin \$104 = 3'h3; end 3'h3: if (\$39 ) begin if (\$40 ) begin \$104 = 3'h4; end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$104 = 3'h0; end else begin \$104 = 3'h2; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$105 = txDone; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$105 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$105 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$106 = txBusy; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$106 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$106 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$107 = tx; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$107 = 1'h0; 3'h2: if (\$29 ) begin (* full_case = 32'd1 *) if (\$30 ) begin \$107 = \$33 ; end else begin \$107 = \$36 ; end end 3'h3: if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin \$107 = 1'h1; end else begin (* full_case = 32'd1 *) if (\$42 ) begin \$107 = \$45 ; end else begin \$107 = \$48 ; end end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$107 = 1'h1; end else begin \$107 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$108 = txCurrentBit; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$108 = 4'h0; 3'h2: if (\$29 ) begin \$108 = 4'h1; end 3'h3: if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin end else begin \$108 = \$49 [3:0]; end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$108 = 4'h0; end else begin \$108 = 4'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$109 = txCurrentByte; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$109 = 2'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin (* full_case = 32'd1 *) if (\$56 ) begin \$109 = 2'h0; end else begin \$109 = \$60 [1:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$110 = txCurrentWord; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$110 = 8'h00; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$110 = \$57 [7:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$111 = txTimer; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$111 = { 1'h0, bitLength }; 3'h2: (* full_case = 32'd1 *) if (\$29 ) begin \$111 = \$37 ; end else begin \$111 = \$38 [10:0]; end 3'h3: (* full_case = 32'd1 *) if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin \$111 = \$41 ; end else begin \$111 = \$50 ; end end else begin \$111 = \$51 [10:0]; end 3'h4: (* full_case = 32'd1 *) if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin \$111 = { 1'h0, bitLength }; end end else begin \$111 = \$61 [10:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$112 = updateStatusDataRequest; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$112 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$112 = 1'h1; end end endcase (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$112 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$112 = 1'h1; end 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$112 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$113 = data; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$113 = txReadData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$114 = rx_fsm_state; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: if (rx_start) begin \$114 = 3'h1; end 3'h1: \$114 = 3'h2; 3'h2: begin if (\$62 ) begin \$114 = 3'h3; end if (rx_start) begin \$114 = 3'h0; end end 3'h3: begin if (\$63 ) begin \$114 = 3'h4; end if (rx_start) begin \$114 = 3'h0; end end 3'h4: begin if (\$64 ) begin \$114 = 3'h5; end if (rx_start) begin \$114 = 3'h0; end end 3'h5: begin if (\$65 ) begin \$114 = 3'h6; end if (rx_start) begin \$114 = 3'h0; end end 3'h6: begin if (\$70 ) begin if (\$73 ) begin \$114 = 3'h7; end end if (rx_start) begin \$114 = 3'h0; end end 3'h7: begin if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$114 = 3'h0; end else begin \$114 = 3'h5; end end if (rx_start) begin \$114 = 3'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$115 = rxDone; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$115 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$115 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$116 = rxCRCvalid; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$116 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin (* full_case = 32'd1 *) if (\$81 ) begin \$116 = 1'h1; end else begin \$116 = 1'h0; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$117 = rxCurrentBit; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$117 = 4'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$117 = 4'h0; end 3'h6: if (\$70 ) begin (* full_case = 32'd1 *) if (\$73 ) begin end else begin \$117 = \$74 [3:0]; end end 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$117 = 4'h0; end else begin \$117 = 4'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$118 = rxCurrentByte; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$118 = 2'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$118 = 2'h0; end else begin (* full_case = 32'd1 *) if (\$82 ) begin \$118 = 2'h0; end else begin \$118 = \$84 [1:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$119 = rxCurrentWord; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$119 = 8'h00; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$119 = 8'h00; end else begin if (\$82 ) begin \$119 = \$83 [7:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$120 = rxTimer; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: (* full_case = 32'd1 *) if (\$65 ) begin \$120 = \$68 [10:0]; end else begin \$120 = \$69 [10:0]; end 3'h6: (* full_case = 32'd1 *) if (\$70 ) begin (* full_case = 32'd1 *) if (\$73 ) begin \$120 = { 1'h0, bitLength }; end else begin \$120 = \$75 ; end end else begin \$120 = \$76 [10:0]; end 3'h7: (* full_case = 32'd1 *) if (\$77 ) begin end else begin \$120 = \$85 [10:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$121 = rxBusy; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$121 = 1'h1; end 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$121 = 1'h0; end else begin \$121 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$122 = rxData; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: if (\$70 ) begin casez (\$72 ) 7'h00: \$122 [0] = rx_synced; 7'h01: \$122 [1] = rx_synced; 7'h02: \$122 [2] = rx_synced; 7'h03: \$122 [3] = rx_synced; 7'h04: \$122 [4] = rx_synced; 7'h05: \$122 [5] = rx_synced; 7'h06: \$122 [6] = rx_synced; 7'h07: \$122 [7] = rx_synced; 7'h08: \$122 [8] = rx_synced; 7'h09: \$122 [9] = rx_synced; 7'h0a: \$122 [10] = rx_synced; 7'h0b: \$122 [11] = rx_synced; 7'h0c: \$122 [12] = rx_synced; 7'h0d: \$122 [13] = rx_synced; 7'h0e: \$122 [14] = rx_synced; 7'h0f: \$122 [15] = rx_synced; 7'h10: \$122 [16] = rx_synced; 7'h11: \$122 [17] = rx_synced; 7'h12: \$122 [18] = rx_synced; 7'h13: \$122 [19] = rx_synced; 7'h14: \$122 [20] = rx_synced; 7'h15: \$122 [21] = rx_synced; 7'h16: \$122 [22] = rx_synced; 7'h17: \$122 [23] = rx_synced; 7'h18: \$122 [24] = rx_synced; 7'h19: \$122 [25] = rx_synced; 7'h1a: \$122 [26] = rx_synced; 7'h1b: \$122 [27] = rx_synced; 7'h1c: \$122 [28] = rx_synced; 7'h1d: \$122 [29] = rx_synced; 7'h1e: \$122 [30] = rx_synced; 7'h1f: \$122 [31] = rx_synced; endcase end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$123 = rxNewData; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$123 = rxData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$124 = \data$63 ; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$124 = rxData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$20 ) begin end \$125 = rxNewDataIndex; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$125 = rxCurrentWord; end end end endcase end assign externalReadPort__addr = address[3:0]; assign externalWritePort__addr = address[3:0]; assign writeData = externalWritePort__data; assign writeEnable = externalWritePort__en; assign externalReadPort__data = readData; assign internalReadPort__addr = internalReadWriteAddress[3:0]; assign internalWritePort__addr = internalReadWriteAddress[3:0]; assign bram_address = address; assign \$1 = bram_control_mode; assign \$3 = rx_synced; assign { \$23 [7:4], \$23 [2:0] } = { txCurrentWord[7:4], txCurrentWord[2:0] }; assign \$23 [3] = 1'h1; assign \$24 = valid; assign \$25 = start; assign \$26 = \valid$48 ; assign \$27 = \start$49 ; assign \$64 = rx_synced; assign \$193 = 1'h1; assign \$66 = \$191 ; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_B.drive_serial_port.U$3 (sync_100_rst, rx, stage1, sync_100_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:37" *) input rx; wire rx; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) wire rx_synced; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) output stage1; reg stage1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage0 <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage1 <= stage0; assign rx_synced = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_B.drive_serial_port.crc32_rx (sync_100_rst, crc, valid, start, data_in, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$21 = 0; wire [31:0] \$1 ; wire \$10 ; wire \$100 ; wire [31:0] \$1000 ; wire \$1001 ; wire [31:0] \$1002 ; wire \$1003 ; wire [31:0] \$1004 ; wire \$1005 ; wire [31:0] \$1006 ; wire \$1007 ; wire [31:0] \$1008 ; wire \$1009 ; wire [31:0] \$101 ; wire [31:0] \$1010 ; wire \$1011 ; wire [31:0] \$1012 ; wire \$1013 ; wire [31:0] \$1014 ; wire \$1015 ; wire \$1016 ; wire \$1017 ; wire \$1018 ; wire \$1019 ; wire \$102 ; wire \$1020 ; wire \$1021 ; wire \$1022 ; wire \$1023 ; wire \$1024 ; wire \$1025 ; wire \$1026 ; wire \$1027 ; wire \$1028 ; wire \$1029 ; wire [31:0] \$103 ; wire [31:0] \$1030 ; wire \$1031 ; wire [31:0] \$1032 ; wire \$1033 ; wire [31:0] \$1034 ; wire \$1035 ; wire [31:0] \$1036 ; wire \$1037 ; wire [31:0] \$1038 ; wire \$1039 ; wire \$104 ; wire [31:0] \$1040 ; wire \$1041 ; wire [31:0] \$1042 ; wire \$1043 ; wire [31:0] \$1044 ; wire \$1045 ; wire [31:0] \$1046 ; wire \$1047 ; wire [31:0] \$1048 ; wire \$1049 ; wire [31:0] \$105 ; wire [31:0] \$1050 ; wire \$1051 ; wire [31:0] \$1052 ; wire \$1053 ; wire [31:0] \$1054 ; wire \$1055 ; wire \$1056 ; wire \$1057 ; wire \$1058 ; wire \$1059 ; wire \$106 ; wire \$1060 ; wire \$1061 ; wire \$1062 ; wire \$1063 ; wire \$1064 ; wire \$1065 ; wire \$1066 ; wire \$1067 ; wire \$1068 ; wire [31:0] \$1069 ; wire [31:0] \$107 ; wire \$1070 ; wire [31:0] \$1071 ; wire \$1072 ; wire [31:0] \$1073 ; wire \$1074 ; wire [31:0] \$1075 ; wire \$1076 ; wire [31:0] \$1077 ; wire \$1078 ; wire [31:0] \$1079 ; wire \$108 ; wire \$1080 ; wire [31:0] \$1081 ; wire \$1082 ; wire [31:0] \$1083 ; wire \$1084 ; wire [31:0] \$1085 ; wire \$1086 ; wire [31:0] \$1087 ; wire \$1088 ; wire [31:0] \$1089 ; wire [31:0] \$109 ; wire \$1090 ; wire [31:0] \$1091 ; wire \$1092 ; wire [31:0] \$1093 ; wire \$1094 ; wire \$1095 ; wire \$1096 ; wire \$1097 ; wire \$1098 ; wire \$1099 ; wire [31:0] \$11 ; wire \$110 ; wire \$1100 ; wire \$1101 ; wire \$1102 ; wire \$1103 ; wire \$1104 ; wire \$1105 ; wire \$1106 ; wire \$1107 ; wire [31:0] \$1108 ; wire \$1109 ; wire \$111 ; wire [31:0] \$1110 ; wire \$1111 ; wire [31:0] \$1112 ; wire \$1113 ; wire [31:0] \$1114 ; wire \$1115 ; wire [31:0] \$1116 ; wire \$1117 ; wire [31:0] \$1118 ; wire \$1119 ; wire \$112 ; wire [31:0] \$1120 ; wire \$1121 ; wire [31:0] \$1122 ; wire \$1123 ; wire [31:0] \$1124 ; wire \$1125 ; wire [31:0] \$1126 ; wire \$1127 ; wire [31:0] \$1128 ; wire \$1129 ; wire \$113 ; wire [31:0] \$1130 ; wire \$1131 ; wire [31:0] \$1132 ; wire \$1133 ; wire [31:0] \$1134 ; wire \$1135 ; wire [31:0] \$1136 ; wire \$1137 ; wire \$1138 ; wire \$1139 ; wire \$114 ; wire \$1140 ; wire \$1141 ; wire \$1142 ; wire \$1143 ; wire \$1144 ; wire \$1145 ; wire \$1146 ; wire \$1147 ; wire \$1148 ; wire \$1149 ; wire \$115 ; wire \$1150 ; wire \$1151 ; wire \$1152 ; wire [31:0] \$1153 ; wire \$1154 ; wire [31:0] \$1155 ; wire \$1156 ; wire [31:0] \$1157 ; wire \$1158 ; wire [31:0] \$1159 ; wire \$116 ; wire \$1160 ; wire [31:0] \$1161 ; wire \$1162 ; wire [31:0] \$1163 ; wire \$1164 ; wire [31:0] \$1165 ; wire \$1166 ; wire [31:0] \$1167 ; wire \$1168 ; wire [31:0] \$1169 ; wire \$117 ; wire \$1170 ; wire [31:0] \$1171 ; wire \$1172 ; wire [31:0] \$1173 ; wire \$1174 ; wire [31:0] \$1175 ; wire \$1176 ; wire [31:0] \$1177 ; wire \$1178 ; wire [31:0] \$1179 ; wire \$118 ; wire \$1180 ; wire \$1181 ; wire \$1182 ; wire \$1183 ; wire \$1184 ; wire \$1185 ; wire \$1186 ; wire \$1187 ; wire \$1188 ; wire \$1189 ; wire \$119 ; wire \$1190 ; wire \$1191 ; wire \$1192 ; wire \$1193 ; wire \$1194 ; wire [31:0] \$1195 ; wire \$1196 ; wire [31:0] \$1197 ; wire \$1198 ; wire [31:0] \$1199 ; wire \$12 ; wire \$120 ; wire \$1200 ; wire [31:0] \$1201 ; wire \$1202 ; wire [31:0] \$1203 ; wire \$1204 ; wire [31:0] \$1205 ; wire \$1206 ; wire [31:0] \$1207 ; wire \$1208 ; wire [31:0] \$1209 ; wire \$121 ; wire \$1210 ; wire [31:0] \$1211 ; wire \$1212 ; wire [31:0] \$1213 ; wire \$1214 ; wire [31:0] \$1215 ; wire \$1216 ; wire [31:0] \$1217 ; wire \$1218 ; wire [31:0] \$1219 ; wire \$122 ; wire \$1220 ; wire [31:0] \$1221 ; wire \$1222 ; wire \$1223 ; wire \$1224 ; wire \$1225 ; wire \$1226 ; wire \$1227 ; wire \$1228 ; wire \$1229 ; wire \$123 ; wire \$1230 ; wire \$1231 ; wire \$1232 ; wire \$1233 ; wire \$1234 ; wire \$1235 ; wire \$1236 ; wire [31:0] \$1237 ; wire \$1238 ; wire [31:0] \$1239 ; wire \$124 ; wire \$1240 ; wire [31:0] \$1241 ; wire \$1242 ; wire [31:0] \$1243 ; wire \$1244 ; wire [31:0] \$1245 ; wire \$1246 ; wire [31:0] \$1247 ; wire \$1248 ; wire [31:0] \$1249 ; wire \$125 ; wire \$1250 ; wire [31:0] \$1251 ; wire \$1252 ; wire [31:0] \$1253 ; wire \$1254 ; wire [31:0] \$1255 ; wire \$1256 ; wire [31:0] \$1257 ; wire \$1258 ; wire [31:0] \$1259 ; wire \$126 ; wire \$1260 ; wire [31:0] \$1261 ; wire \$1262 ; wire [31:0] \$1263 ; wire \$1264 ; wire \$1265 ; wire \$1266 ; wire \$1267 ; wire \$1268 ; wire \$1269 ; wire [31:0] \$127 ; wire \$1270 ; wire \$1271 ; wire \$1272 ; wire \$1273 ; wire \$1274 ; wire \$1275 ; wire \$1276 ; wire \$1277 ; wire \$1278 ; wire [31:0] \$1279 ; wire \$128 ; wire \$1280 ; wire [31:0] \$1281 ; wire \$1282 ; wire [31:0] \$1283 ; wire \$1284 ; wire [31:0] \$1285 ; wire \$1286 ; wire [31:0] \$1287 ; wire \$1288 ; wire [31:0] \$1289 ; wire [31:0] \$129 ; wire \$1290 ; wire [31:0] \$1291 ; wire \$1292 ; wire [31:0] \$1293 ; wire \$1294 ; wire [31:0] \$1295 ; wire \$1296 ; wire [31:0] \$1297 ; wire \$1298 ; wire [31:0] \$1299 ; wire [31:0] \$13 ; wire \$130 ; wire \$1300 ; wire [31:0] \$1301 ; wire \$1302 ; wire [31:0] \$1303 ; wire \$1304 ; wire \$1305 ; wire \$1306 ; wire \$1307 ; wire \$1308 ; wire \$1309 ; wire [31:0] \$131 ; wire \$1310 ; wire \$1311 ; wire \$1312 ; wire \$1313 ; wire \$1314 ; wire \$1315 ; wire \$1316 ; wire \$1317 ; wire [31:0] \$1318 ; wire \$1319 ; wire \$132 ; wire [31:0] \$1320 ; wire \$1321 ; wire [31:0] \$1322 ; wire \$1323 ; wire [31:0] \$1324 ; wire \$1325 ; wire [31:0] \$1326 ; wire \$1327 ; wire [31:0] \$1328 ; wire \$1329 ; wire [31:0] \$133 ; wire [31:0] \$1330 ; wire \$1331 ; wire [31:0] \$1332 ; wire \$1333 ; wire [31:0] \$1334 ; wire \$1335 ; wire [31:0] \$1336 ; wire \$1337 ; wire [31:0] \$1338 ; wire \$1339 ; wire \$134 ; wire [31:0] \$1340 ; wire \$1341 ; wire [31:0] \$1342 ; wire \$1343 ; wire \$1344 ; wire \$1345 ; wire \$1346 ; wire \$1347 ; wire \$1348 ; wire \$1349 ; wire [31:0] \$135 ; wire \$1350 ; wire \$1351 ; wire \$1352 ; wire \$1353 ; wire \$1354 ; wire \$1355 ; wire \$1356 ; reg [31:0] \$1357 ; wire \$136 ; wire [31:0] \$137 ; wire \$138 ; wire [31:0] \$139 ; wire \$14 ; wire \$140 ; wire [31:0] \$141 ; wire \$142 ; wire [31:0] \$143 ; wire \$144 ; wire [31:0] \$145 ; wire \$146 ; wire [31:0] \$147 ; wire \$148 ; wire [31:0] \$149 ; wire [31:0] \$15 ; wire \$150 ; wire [31:0] \$151 ; wire \$152 ; wire [31:0] \$153 ; wire \$154 ; wire [31:0] \$155 ; wire \$156 ; wire \$157 ; wire \$158 ; wire \$159 ; wire \$16 ; wire \$160 ; wire \$161 ; wire \$162 ; wire \$163 ; wire \$164 ; wire \$165 ; wire \$166 ; wire \$167 ; wire \$168 ; wire \$169 ; wire [31:0] \$17 ; wire \$170 ; wire \$171 ; wire [31:0] \$172 ; wire \$173 ; wire [31:0] \$174 ; wire \$175 ; wire [31:0] \$176 ; wire \$177 ; wire [31:0] \$178 ; wire \$179 ; wire \$18 ; wire [31:0] \$180 ; wire \$181 ; wire [31:0] \$182 ; wire \$183 ; wire [31:0] \$184 ; wire \$185 ; wire [31:0] \$186 ; wire \$187 ; wire [31:0] \$188 ; wire \$189 ; wire [31:0] \$19 ; wire [31:0] \$190 ; wire \$191 ; wire [31:0] \$192 ; wire \$193 ; wire [31:0] \$194 ; wire \$195 ; wire [31:0] \$196 ; wire \$197 ; wire [31:0] \$198 ; wire \$199 ; wire \$2 ; wire \$20 ; wire [31:0] \$200 ; wire \$201 ; wire [31:0] \$202 ; wire \$203 ; wire [31:0] \$204 ; wire \$205 ; wire \$206 ; wire \$207 ; wire \$208 ; wire \$209 ; wire [31:0] \$21 ; wire \$210 ; wire \$211 ; wire \$212 ; wire \$213 ; wire \$214 ; wire \$215 ; wire \$216 ; wire \$217 ; wire \$218 ; wire \$219 ; wire \$22 ; wire \$220 ; wire \$221 ; wire \$222 ; wire [31:0] \$223 ; wire \$224 ; wire [31:0] \$225 ; wire \$226 ; wire [31:0] \$227 ; wire \$228 ; wire [31:0] \$229 ; wire [31:0] \$23 ; wire \$230 ; wire [31:0] \$231 ; wire \$232 ; wire [31:0] \$233 ; wire \$234 ; wire [31:0] \$235 ; wire \$236 ; wire [31:0] \$237 ; wire \$238 ; wire [31:0] \$239 ; wire \$24 ; wire \$240 ; wire [31:0] \$241 ; wire \$242 ; wire [31:0] \$243 ; wire \$244 ; wire [31:0] \$245 ; wire \$246 ; wire [31:0] \$247 ; wire \$248 ; wire [31:0] \$249 ; wire [31:0] \$25 ; wire \$250 ; wire [31:0] \$251 ; wire \$252 ; wire \$253 ; wire \$254 ; wire \$255 ; wire \$256 ; wire \$257 ; wire \$258 ; wire \$259 ; wire \$26 ; wire \$260 ; wire \$261 ; wire \$262 ; wire \$263 ; wire \$264 ; wire \$265 ; wire \$266 ; wire \$267 ; wire [31:0] \$268 ; wire \$269 ; wire \$27 ; wire [31:0] \$270 ; wire \$271 ; wire [31:0] \$272 ; wire \$273 ; wire [31:0] \$274 ; wire \$275 ; wire [31:0] \$276 ; wire \$277 ; wire [31:0] \$278 ; wire \$279 ; wire \$28 ; wire [31:0] \$280 ; wire \$281 ; wire [31:0] \$282 ; wire \$283 ; wire [31:0] \$284 ; wire \$285 ; wire [31:0] \$286 ; wire \$287 ; wire [31:0] \$288 ; wire \$289 ; wire \$29 ; wire [31:0] \$290 ; wire \$291 ; wire [31:0] \$292 ; wire \$293 ; wire [31:0] \$294 ; wire \$295 ; wire [31:0] \$296 ; wire \$297 ; wire \$298 ; wire \$299 ; wire [31:0] \$3 ; wire \$30 ; wire \$300 ; wire \$301 ; wire \$302 ; wire \$303 ; wire \$304 ; wire \$305 ; wire \$306 ; wire \$307 ; wire \$308 ; wire \$309 ; wire \$31 ; wire \$310 ; wire \$311 ; wire \$312 ; wire [31:0] \$313 ; wire \$314 ; wire [31:0] \$315 ; wire \$316 ; wire [31:0] \$317 ; wire \$318 ; wire [31:0] \$319 ; wire \$32 ; wire \$320 ; wire [31:0] \$321 ; wire \$322 ; wire [31:0] \$323 ; wire \$324 ; wire [31:0] \$325 ; wire \$326 ; wire [31:0] \$327 ; wire \$328 ; wire [31:0] \$329 ; wire \$33 ; wire \$330 ; wire [31:0] \$331 ; wire \$332 ; wire [31:0] \$333 ; wire \$334 ; wire [31:0] \$335 ; wire \$336 ; wire [31:0] \$337 ; wire \$338 ; wire [31:0] \$339 ; wire \$34 ; wire \$340 ; wire [31:0] \$341 ; wire \$342 ; wire [31:0] \$343 ; wire \$344 ; wire \$345 ; wire \$346 ; wire \$347 ; wire \$348 ; wire \$349 ; wire \$35 ; wire \$350 ; wire \$351 ; wire \$352 ; wire \$353 ; wire \$354 ; wire \$355 ; wire \$356 ; wire \$357 ; wire \$358 ; wire \$359 ; wire \$36 ; wire \$360 ; wire [31:0] \$361 ; wire \$362 ; wire [31:0] \$363 ; wire \$364 ; wire [31:0] \$365 ; wire \$366 ; wire [31:0] \$367 ; wire \$368 ; wire [31:0] \$369 ; wire \$37 ; wire \$370 ; wire [31:0] \$371 ; wire \$372 ; wire [31:0] \$373 ; wire \$374 ; wire [31:0] \$375 ; wire \$376 ; wire [31:0] \$377 ; wire \$378 ; wire [31:0] \$379 ; wire \$38 ; wire \$380 ; wire [31:0] \$381 ; wire \$382 ; wire [31:0] \$383 ; wire \$384 ; wire [31:0] \$385 ; wire \$386 ; wire \$387 ; wire \$388 ; wire \$389 ; wire \$39 ; wire \$390 ; wire \$391 ; wire \$392 ; wire \$393 ; wire \$394 ; wire \$395 ; wire \$396 ; wire \$397 ; wire \$398 ; wire \$399 ; wire \$4 ; wire [31:0] \$40 ; wire [31:0] \$400 ; wire \$401 ; wire [31:0] \$402 ; wire \$403 ; wire [31:0] \$404 ; wire \$405 ; wire [31:0] \$406 ; wire \$407 ; wire [31:0] \$408 ; wire \$409 ; wire \$41 ; wire [31:0] \$410 ; wire \$411 ; wire [31:0] \$412 ; wire \$413 ; wire [31:0] \$414 ; wire \$415 ; wire [31:0] \$416 ; wire \$417 ; wire [31:0] \$418 ; wire \$419 ; wire [31:0] \$42 ; wire [31:0] \$420 ; wire \$421 ; wire [31:0] \$422 ; wire \$423 ; wire \$424 ; wire \$425 ; wire \$426 ; wire \$427 ; wire \$428 ; wire \$429 ; wire \$43 ; wire \$430 ; wire \$431 ; wire \$432 ; wire \$433 ; wire \$434 ; wire \$435 ; wire [31:0] \$436 ; wire \$437 ; wire [31:0] \$438 ; wire \$439 ; wire [31:0] \$44 ; wire [31:0] \$440 ; wire \$441 ; wire [31:0] \$442 ; wire \$443 ; wire [31:0] \$444 ; wire \$445 ; wire [31:0] \$446 ; wire \$447 ; wire [31:0] \$448 ; wire \$449 ; wire \$45 ; wire [31:0] \$450 ; wire \$451 ; wire [31:0] \$452 ; wire \$453 ; wire [31:0] \$454 ; wire \$455 ; wire [31:0] \$456 ; wire \$457 ; wire [31:0] \$458 ; wire \$459 ; wire [31:0] \$46 ; wire [31:0] \$460 ; wire \$461 ; wire \$462 ; wire \$463 ; wire \$464 ; wire \$465 ; wire \$466 ; wire \$467 ; wire \$468 ; wire \$469 ; wire \$47 ; wire \$470 ; wire \$471 ; wire \$472 ; wire \$473 ; wire \$474 ; wire [31:0] \$475 ; wire \$476 ; wire [31:0] \$477 ; wire \$478 ; wire [31:0] \$479 ; wire [31:0] \$48 ; wire \$480 ; wire [31:0] \$481 ; wire \$482 ; wire [31:0] \$483 ; wire \$484 ; wire [31:0] \$485 ; wire \$486 ; wire [31:0] \$487 ; wire \$488 ; wire [31:0] \$489 ; wire \$49 ; wire \$490 ; wire [31:0] \$491 ; wire \$492 ; wire [31:0] \$493 ; wire \$494 ; wire [31:0] \$495 ; wire \$496 ; wire [31:0] \$497 ; wire \$498 ; wire [31:0] \$499 ; wire [31:0] \$5 ; wire [31:0] \$50 ; wire \$500 ; wire [31:0] \$501 ; wire \$502 ; wire [31:0] \$503 ; wire \$504 ; wire [31:0] \$505 ; wire \$506 ; wire [31:0] \$507 ; wire \$508 ; wire \$509 ; wire \$51 ; wire \$510 ; wire \$511 ; wire \$512 ; wire \$513 ; wire \$514 ; wire \$515 ; wire \$516 ; wire \$517 ; wire \$518 ; wire \$519 ; wire [31:0] \$52 ; wire \$520 ; wire \$521 ; wire \$522 ; wire \$523 ; wire \$524 ; wire \$525 ; wire [31:0] \$526 ; wire \$527 ; wire [31:0] \$528 ; wire \$529 ; wire \$53 ; wire [31:0] \$530 ; wire \$531 ; wire [31:0] \$532 ; wire \$533 ; wire [31:0] \$534 ; wire \$535 ; wire [31:0] \$536 ; wire \$537 ; wire [31:0] \$538 ; wire \$539 ; wire [31:0] \$54 ; wire [31:0] \$540 ; wire \$541 ; wire [31:0] \$542 ; wire \$543 ; wire [31:0] \$544 ; wire \$545 ; wire [31:0] \$546 ; wire \$547 ; wire [31:0] \$548 ; wire \$549 ; wire \$55 ; wire [31:0] \$550 ; wire \$551 ; wire [31:0] \$552 ; wire \$553 ; wire [31:0] \$554 ; wire \$555 ; wire [31:0] \$556 ; wire \$557 ; wire [31:0] \$558 ; wire \$559 ; wire [31:0] \$56 ; wire \$560 ; wire \$561 ; wire \$562 ; wire \$563 ; wire \$564 ; wire \$565 ; wire \$566 ; wire \$567 ; wire \$568 ; wire \$569 ; wire \$57 ; wire \$570 ; wire \$571 ; wire \$572 ; wire \$573 ; wire \$574 ; wire \$575 ; wire \$576 ; wire [31:0] \$577 ; wire \$578 ; wire [31:0] \$579 ; wire [31:0] \$58 ; wire \$580 ; wire [31:0] \$581 ; wire \$582 ; wire [31:0] \$583 ; wire \$584 ; wire [31:0] \$585 ; wire \$586 ; wire [31:0] \$587 ; wire \$588 ; wire [31:0] \$589 ; wire \$59 ; wire \$590 ; wire [31:0] \$591 ; wire \$592 ; wire [31:0] \$593 ; wire \$594 ; wire [31:0] \$595 ; wire \$596 ; wire [31:0] \$597 ; wire \$598 ; wire [31:0] \$599 ; wire \$6 ; wire [31:0] \$60 ; wire \$600 ; wire [31:0] \$601 ; wire \$602 ; wire [31:0] \$603 ; wire \$604 ; wire [31:0] \$605 ; wire \$606 ; wire [31:0] \$607 ; wire \$608 ; wire \$609 ; wire \$61 ; wire \$610 ; wire \$611 ; wire \$612 ; wire \$613 ; wire \$614 ; wire \$615 ; wire \$616 ; wire \$617 ; wire \$618 ; wire \$619 ; wire [31:0] \$62 ; wire \$620 ; wire \$621 ; wire \$622 ; wire \$623 ; wire \$624 ; wire [31:0] \$625 ; wire \$626 ; wire [31:0] \$627 ; wire \$628 ; wire [31:0] \$629 ; wire \$63 ; wire \$630 ; wire [31:0] \$631 ; wire \$632 ; wire [31:0] \$633 ; wire \$634 ; wire [31:0] \$635 ; wire \$636 ; wire [31:0] \$637 ; wire \$638 ; wire [31:0] \$639 ; wire [31:0] \$64 ; wire \$640 ; wire [31:0] \$641 ; wire \$642 ; wire [31:0] \$643 ; wire \$644 ; wire [31:0] \$645 ; wire \$646 ; wire [31:0] \$647 ; wire \$648 ; wire [31:0] \$649 ; wire \$65 ; wire \$650 ; wire [31:0] \$651 ; wire \$652 ; wire [31:0] \$653 ; wire \$654 ; wire \$655 ; wire \$656 ; wire \$657 ; wire \$658 ; wire \$659 ; wire \$66 ; wire \$660 ; wire \$661 ; wire \$662 ; wire \$663 ; wire \$664 ; wire \$665 ; wire \$666 ; wire \$667 ; wire \$668 ; wire \$669 ; wire \$67 ; wire [31:0] \$670 ; wire \$671 ; wire [31:0] \$672 ; wire \$673 ; wire [31:0] \$674 ; wire \$675 ; wire [31:0] \$676 ; wire \$677 ; wire [31:0] \$678 ; wire \$679 ; wire \$68 ; wire [31:0] \$680 ; wire \$681 ; wire [31:0] \$682 ; wire \$683 ; wire [31:0] \$684 ; wire \$685 ; wire [31:0] \$686 ; wire \$687 ; wire [31:0] \$688 ; wire \$689 ; wire \$69 ; wire [31:0] \$690 ; wire \$691 ; wire [31:0] \$692 ; wire \$693 ; wire [31:0] \$694 ; wire \$695 ; wire [31:0] \$696 ; wire \$697 ; wire [31:0] \$698 ; wire \$699 ; wire [31:0] \$7 ; wire \$70 ; wire \$700 ; wire \$701 ; wire \$702 ; wire \$703 ; wire \$704 ; wire \$705 ; wire \$706 ; wire \$707 ; wire \$708 ; wire \$709 ; wire \$71 ; wire \$710 ; wire \$711 ; wire \$712 ; wire \$713 ; wire \$714 ; wire [31:0] \$715 ; wire \$716 ; wire [31:0] \$717 ; wire \$718 ; wire [31:0] \$719 ; wire \$72 ; wire \$720 ; wire [31:0] \$721 ; wire \$722 ; wire [31:0] \$723 ; wire \$724 ; wire [31:0] \$725 ; wire \$726 ; wire [31:0] \$727 ; wire \$728 ; wire [31:0] \$729 ; wire \$73 ; wire \$730 ; wire [31:0] \$731 ; wire \$732 ; wire [31:0] \$733 ; wire \$734 ; wire [31:0] \$735 ; wire \$736 ; wire [31:0] \$737 ; wire \$738 ; wire [31:0] \$739 ; wire \$74 ; wire \$740 ; wire [31:0] \$741 ; wire \$742 ; wire \$743 ; wire \$744 ; wire \$745 ; wire \$746 ; wire \$747 ; wire \$748 ; wire \$749 ; wire \$75 ; wire \$750 ; wire \$751 ; wire \$752 ; wire \$753 ; wire \$754 ; wire \$755 ; wire \$756 ; wire [31:0] \$757 ; wire \$758 ; wire [31:0] \$759 ; wire \$76 ; wire \$760 ; wire [31:0] \$761 ; wire \$762 ; wire [31:0] \$763 ; wire \$764 ; wire [31:0] \$765 ; wire \$766 ; wire [31:0] \$767 ; wire \$768 ; wire [31:0] \$769 ; wire \$77 ; wire \$770 ; wire [31:0] \$771 ; wire \$772 ; wire [31:0] \$773 ; wire \$774 ; wire [31:0] \$775 ; wire \$776 ; wire [31:0] \$777 ; wire \$778 ; wire [31:0] \$779 ; wire \$78 ; wire \$780 ; wire [31:0] \$781 ; wire \$782 ; wire [31:0] \$783 ; wire \$784 ; wire \$785 ; wire \$786 ; wire \$787 ; wire \$788 ; wire \$789 ; wire [31:0] \$79 ; wire \$790 ; wire \$791 ; wire \$792 ; wire \$793 ; wire \$794 ; wire \$795 ; wire \$796 ; wire \$797 ; wire \$798 ; wire [31:0] \$799 ; wire \$8 ; wire \$80 ; wire \$800 ; wire [31:0] \$801 ; wire \$802 ; wire [31:0] \$803 ; wire \$804 ; wire [31:0] \$805 ; wire \$806 ; wire [31:0] \$807 ; wire \$808 ; wire [31:0] \$809 ; wire [31:0] \$81 ; wire \$810 ; wire [31:0] \$811 ; wire \$812 ; wire [31:0] \$813 ; wire \$814 ; wire [31:0] \$815 ; wire \$816 ; wire [31:0] \$817 ; wire \$818 ; wire [31:0] \$819 ; wire \$82 ; wire \$820 ; wire [31:0] \$821 ; wire \$822 ; wire [31:0] \$823 ; wire \$824 ; wire \$825 ; wire \$826 ; wire \$827 ; wire \$828 ; wire \$829 ; wire [31:0] \$83 ; wire \$830 ; wire \$831 ; wire \$832 ; wire \$833 ; wire \$834 ; wire \$835 ; wire \$836 ; wire \$837 ; wire [31:0] \$838 ; wire \$839 ; wire \$84 ; wire [31:0] \$840 ; wire \$841 ; wire [31:0] \$842 ; wire \$843 ; wire [31:0] \$844 ; wire \$845 ; wire [31:0] \$846 ; wire \$847 ; wire [31:0] \$848 ; wire \$849 ; wire [31:0] \$85 ; wire [31:0] \$850 ; wire \$851 ; wire [31:0] \$852 ; wire \$853 ; wire [31:0] \$854 ; wire \$855 ; wire [31:0] \$856 ; wire \$857 ; wire [31:0] \$858 ; wire \$859 ; wire \$86 ; wire [31:0] \$860 ; wire \$861 ; wire \$862 ; wire \$863 ; wire \$864 ; wire \$865 ; wire \$866 ; wire \$867 ; wire \$868 ; wire \$869 ; wire [31:0] \$87 ; wire \$870 ; wire \$871 ; wire \$872 ; wire \$873 ; wire [31:0] \$874 ; wire \$875 ; wire [31:0] \$876 ; wire \$877 ; wire [31:0] \$878 ; wire \$879 ; wire \$88 ; wire [31:0] \$880 ; wire \$881 ; wire [31:0] \$882 ; wire \$883 ; wire [31:0] \$884 ; wire \$885 ; wire [31:0] \$886 ; wire \$887 ; wire [31:0] \$888 ; wire \$889 ; wire [31:0] \$89 ; wire [31:0] \$890 ; wire \$891 ; wire [31:0] \$892 ; wire \$893 ; wire [31:0] \$894 ; wire \$895 ; wire [31:0] \$896 ; wire \$897 ; wire \$898 ; wire \$899 ; wire [31:0] \$9 ; wire \$90 ; wire \$900 ; wire \$901 ; wire \$902 ; wire \$903 ; wire \$904 ; wire \$905 ; wire \$906 ; wire \$907 ; wire \$908 ; wire \$909 ; wire [31:0] \$91 ; wire [31:0] \$910 ; wire \$911 ; wire [31:0] \$912 ; wire \$913 ; wire [31:0] \$914 ; wire \$915 ; wire [31:0] \$916 ; wire \$917 ; wire [31:0] \$918 ; wire \$919 ; wire \$92 ; wire [31:0] \$920 ; wire \$921 ; wire [31:0] \$922 ; wire \$923 ; wire [31:0] \$924 ; wire \$925 ; wire [31:0] \$926 ; wire \$927 ; wire [31:0] \$928 ; wire \$929 ; wire [31:0] \$93 ; wire [31:0] \$930 ; wire \$931 ; wire [31:0] \$932 ; wire \$933 ; wire \$934 ; wire \$935 ; wire \$936 ; wire \$937 ; wire \$938 ; wire \$939 ; wire \$94 ; wire \$940 ; wire \$941 ; wire \$942 ; wire \$943 ; wire \$944 ; wire \$945 ; wire [31:0] \$946 ; wire \$947 ; wire [31:0] \$948 ; wire \$949 ; wire [31:0] \$95 ; wire [31:0] \$950 ; wire \$951 ; wire [31:0] \$952 ; wire \$953 ; wire [31:0] \$954 ; wire \$955 ; wire [31:0] \$956 ; wire \$957 ; wire [31:0] \$958 ; wire \$959 ; wire \$96 ; wire [31:0] \$960 ; wire \$961 ; wire [31:0] \$962 ; wire \$963 ; wire [31:0] \$964 ; wire \$965 ; wire [31:0] \$966 ; wire \$967 ; wire [31:0] \$968 ; wire \$969 ; wire [31:0] \$97 ; wire [31:0] \$970 ; wire \$971 ; wire [31:0] \$972 ; wire \$973 ; wire \$974 ; wire \$975 ; wire \$976 ; wire \$977 ; wire \$978 ; wire \$979 ; wire \$98 ; wire \$980 ; wire \$981 ; wire \$982 ; wire \$983 ; wire \$984 ; wire \$985 ; wire \$986 ; wire \$987 ; wire [31:0] \$988 ; wire \$989 ; wire [31:0] \$99 ; wire [31:0] \$990 ; wire \$991 ; wire [31:0] \$992 ; wire \$993 ; wire [31:0] \$994 ; wire \$995 ; wire [31:0] \$996 ; wire \$997 ; wire [31:0] \$998 ; wire \$999 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [31:0] crc; wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [31:0] crc_reg = 32'd4294967295; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire [31:0] data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input [31:0] data_in; wire [31:0] data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:356" *) crc_reg; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$3 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$4 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$3 [6]; assign \$5 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$6 = \$4 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$5 [9]; assign \$7 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$8 = \$6 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$7 [10]; assign \$9 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$10 = \$8 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$9 [12]; assign \$11 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$12 = \$10 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$11 [16]; assign \$13 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$14 = \$12 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$13 [24]; assign \$15 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$16 = \$14 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$15 [25]; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$18 = \$16 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$17 [26]; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$20 = \$18 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$19 [28]; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$22 = \$20 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$21 [29]; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$24 = \$22 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$23 [30]; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$26 = \$24 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$25 [31]; assign \$27 = \$26 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$28 = \$27 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$29 = \$28 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$30 = \$29 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$31 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$32 = \$31 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$34 = \$33 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$35 = \$34 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$36 = \$35 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$37 = \$36 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$38 = \$37 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$39 = \$38 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$40 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$42 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$43 = \$41 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$42 [1]; assign \$44 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$45 = \$43 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$44 [6]; assign \$46 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$47 = \$45 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$46 [7]; assign \$48 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$49 = \$47 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$48 [9]; assign \$50 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$51 = \$49 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$50 [11]; assign \$52 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$53 = \$51 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$52 [12]; assign \$54 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$55 = \$53 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$54 [13]; assign \$56 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$57 = \$55 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$56 [16]; assign \$58 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$59 = \$57 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$58 [17]; assign \$60 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$61 = \$59 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$60 [24]; assign \$62 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$63 = \$61 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$62 [27]; assign \$64 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$65 = \$63 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$64 [28]; assign \$66 = \$65 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$67 = \$66 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$68 = \$67 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$69 = \$68 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$70 = \$69 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$71 = \$70 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$72 = \$71 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$73 = \$72 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$74 = \$73 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$75 = \$74 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$76 = \$75 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$77 = \$76 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$78 = \$77 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$79 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$81 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$82 = \$80 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$81 [1]; assign \$83 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$84 = \$82 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$83 [2]; assign \$85 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$86 = \$84 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$85 [6]; assign \$87 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$88 = \$86 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$87 [7]; assign \$89 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$90 = \$88 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$89 [8]; assign \$91 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$92 = \$90 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$91 [9]; assign \$93 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$94 = \$92 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$93 [13]; assign \$95 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$96 = \$94 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$95 [14]; assign \$97 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$98 = \$96 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$97 [16]; assign \$99 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$100 = \$98 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$99 [17]; assign \$101 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$102 = \$100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$101 [18]; assign \$103 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$104 = \$102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$103 [24]; assign \$105 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$106 = \$104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$105 [26]; assign \$107 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$108 = \$106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$107 [30]; assign \$109 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$110 = \$108 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$109 [31]; assign \$111 = \$110 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$112 = \$111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$113 = \$112 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$114 = \$113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$115 = \$114 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$116 = \$115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$117 = \$116 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$118 = \$117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$119 = \$118 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$120 = \$119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$121 = \$120 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$122 = \$121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$123 = \$122 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$124 = \$123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$125 = \$124 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$126 = \$125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$127 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$129 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$130 = \$128 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$129 [2]; assign \$131 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$132 = \$130 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$131 [3]; assign \$133 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$134 = \$132 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$133 [7]; assign \$135 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$136 = \$134 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$135 [8]; assign \$137 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$138 = \$136 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$137 [9]; assign \$139 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$140 = \$138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$139 [10]; assign \$141 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$142 = \$140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$141 [14]; assign \$143 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$144 = \$142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$143 [15]; assign \$145 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$146 = \$144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$145 [17]; assign \$147 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$148 = \$146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$147 [18]; assign \$149 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$150 = \$148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$149 [19]; assign \$151 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$152 = \$150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$151 [25]; assign \$153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$154 = \$152 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$153 [27]; assign \$155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$156 = \$154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$155 [31]; assign \$157 = \$156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$158 = \$157 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$159 = \$158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$160 = \$159 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$161 = \$160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$162 = \$161 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$163 = \$162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$164 = \$163 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$165 = \$164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$166 = \$165 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$167 = \$166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$168 = \$167 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$169 = \$168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$170 = \$169 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$171 = \$170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$172 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$174 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$175 = \$173 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$174 [2]; assign \$176 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$177 = \$175 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$176 [3]; assign \$178 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$179 = \$177 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$178 [4]; assign \$180 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$181 = \$179 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$180 [6]; assign \$182 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$183 = \$181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$182 [8]; assign \$184 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$185 = \$183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$184 [11]; assign \$186 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$187 = \$185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$186 [12]; assign \$188 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$189 = \$187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$188 [15]; assign \$190 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$191 = \$189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$190 [18]; assign \$192 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$193 = \$191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$192 [19]; assign \$194 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$195 = \$193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$194 [20]; assign \$196 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$197 = \$195 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$196 [24]; assign \$198 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$199 = \$197 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$198 [25]; assign \$200 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$201 = \$199 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$200 [29]; assign \$202 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$203 = \$201 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$202 [30]; assign \$204 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$205 = \$203 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$204 [31]; assign \$206 = \$205 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$207 = \$206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$208 = \$207 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$209 = \$208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$210 = \$209 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$211 = \$210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$212 = \$211 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$213 = \$212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$214 = \$213 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$215 = \$214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$216 = \$215 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$217 = \$216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$218 = \$217 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$219 = \$218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$220 = \$219 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$221 = \$220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$222 = \$221 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$223 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$225 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$226 = \$224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$225 [1]; assign \$227 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$228 = \$226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$227 [3]; assign \$229 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$230 = \$228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$229 [4]; assign \$231 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$232 = \$230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$231 [5]; assign \$233 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$234 = \$232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$233 [6]; assign \$235 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$236 = \$234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$235 [7]; assign \$237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$238 = \$236 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$237 [10]; assign \$239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$240 = \$238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$239 [13]; assign \$241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$242 = \$240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$241 [19]; assign \$243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$244 = \$242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$243 [20]; assign \$245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$246 = \$244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$245 [21]; assign \$247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$248 = \$246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$247 [24]; assign \$249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$250 = \$248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$249 [28]; assign \$251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$252 = \$250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$251 [29]; assign \$253 = \$252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$254 = \$253 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$255 = \$254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$256 = \$255 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$257 = \$256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$258 = \$257 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$259 = \$258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$260 = \$259 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$261 = \$260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$262 = \$261 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$263 = \$262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$264 = \$263 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$265 = \$264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$266 = \$265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$267 = \$266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$268 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$270 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$271 = \$269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$270 [2]; assign \$272 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$273 = \$271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$272 [4]; assign \$274 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$275 = \$273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$274 [5]; assign \$276 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$277 = \$275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$276 [6]; assign \$278 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$279 = \$277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$278 [7]; assign \$280 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$281 = \$279 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$280 [8]; assign \$282 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$283 = \$281 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$282 [11]; assign \$284 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$285 = \$283 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$284 [14]; assign \$286 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$287 = \$285 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$286 [20]; assign \$288 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$289 = \$287 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$288 [21]; assign \$290 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$291 = \$289 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$290 [22]; assign \$292 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$293 = \$291 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$292 [25]; assign \$294 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$295 = \$293 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$294 [29]; assign \$296 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$297 = \$295 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$296 [30]; assign \$298 = \$297 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$299 = \$298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$300 = \$299 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$301 = \$300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$302 = \$301 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$303 = \$302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$304 = \$303 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$305 = \$304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$306 = \$305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$307 = \$306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$308 = \$307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$309 = \$308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$310 = \$309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$311 = \$310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$312 = \$311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$313 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$315 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$316 = \$314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$315 [2]; assign \$317 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$318 = \$316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$317 [3]; assign \$319 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$320 = \$318 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$319 [5]; assign \$321 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$322 = \$320 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$321 [7]; assign \$323 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$324 = \$322 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$323 [8]; assign \$325 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$326 = \$324 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$325 [10]; assign \$327 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$328 = \$326 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$327 [15]; assign \$329 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$330 = \$328 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$329 [16]; assign \$331 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$332 = \$330 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$331 [21]; assign \$333 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$334 = \$332 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$333 [22]; assign \$335 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$336 = \$334 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$335 [23]; assign \$337 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$338 = \$336 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$337 [24]; assign \$339 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$340 = \$338 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$339 [25]; assign \$341 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$342 = \$340 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$341 [28]; assign \$343 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$344 = \$342 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$343 [29]; assign \$345 = \$344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$346 = \$345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$347 = \$346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$348 = \$347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$349 = \$348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$350 = \$349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$351 = \$350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$352 = \$351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$353 = \$352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$354 = \$353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$355 = \$354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$356 = \$355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$357 = \$356 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$358 = \$357 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$359 = \$358 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$360 = \$359 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$361 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$363 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$364 = \$362 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$363 [1]; assign \$365 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$366 = \$364 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$365 [3]; assign \$367 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$368 = \$366 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$367 [4]; assign \$369 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$370 = \$368 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$369 [8]; assign \$371 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$372 = \$370 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$371 [10]; assign \$373 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$374 = \$372 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$373 [11]; assign \$375 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$376 = \$374 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$375 [12]; assign \$377 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$378 = \$376 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$377 [17]; assign \$379 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$380 = \$378 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$379 [22]; assign \$381 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$382 = \$380 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$381 [23]; assign \$383 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$384 = \$382 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$383 [28]; assign \$385 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$386 = \$384 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$385 [31]; assign \$387 = \$386 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$388 = \$387 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$389 = \$388 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$390 = \$389 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$391 = \$390 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$392 = \$391 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$393 = \$392 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$394 = \$393 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$395 = \$394 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$396 = \$395 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$397 = \$396 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$398 = \$397 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$399 = \$398 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$400 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$402 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$403 = \$401 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$402 [2]; assign \$404 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$405 = \$403 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$404 [4]; assign \$406 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$407 = \$405 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$406 [5]; assign \$408 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$409 = \$407 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$408 [9]; assign \$410 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$411 = \$409 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$410 [11]; assign \$412 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$413 = \$411 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$412 [12]; assign \$414 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$415 = \$413 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$414 [13]; assign \$416 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$417 = \$415 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$416 [18]; assign \$418 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$419 = \$417 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$418 [23]; assign \$420 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$421 = \$419 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$420 [24]; assign \$422 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$423 = \$421 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$422 [29]; assign \$424 = \$423 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$425 = \$424 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$426 = \$425 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$427 = \$426 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$428 = \$427 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$429 = \$428 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$430 = \$429 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$431 = \$430 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$432 = \$431 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$433 = \$432 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$434 = \$433 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$435 = \$434 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$436 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$438 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$439 = \$437 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$438 [2]; assign \$440 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$441 = \$439 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$440 [3]; assign \$442 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$443 = \$441 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$442 [5]; assign \$444 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$445 = \$443 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$444 [9]; assign \$446 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$447 = \$445 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$446 [13]; assign \$448 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$449 = \$447 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$448 [14]; assign \$450 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$451 = \$449 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$450 [16]; assign \$452 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$453 = \$451 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$452 [19]; assign \$454 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$455 = \$453 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$454 [26]; assign \$456 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$457 = \$455 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$456 [28]; assign \$458 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$459 = \$457 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$458 [29]; assign \$460 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$461 = \$459 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$460 [31]; assign \$462 = \$461 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$463 = \$462 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$464 = \$463 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$465 = \$464 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$466 = \$465 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$467 = \$466 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$468 = \$467 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$469 = \$468 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$470 = \$469 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$471 = \$470 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$472 = \$471 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$473 = \$472 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$474 = \$473 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$475 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$477 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$478 = \$476 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$477 [1]; assign \$479 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$480 = \$478 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$479 [3]; assign \$481 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$482 = \$480 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$481 [4]; assign \$483 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$484 = \$482 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$483 [9]; assign \$485 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$486 = \$484 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$485 [12]; assign \$487 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$488 = \$486 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$487 [14]; assign \$489 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$490 = \$488 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$489 [15]; assign \$491 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$492 = \$490 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$491 [16]; assign \$493 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$494 = \$492 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$493 [17]; assign \$495 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$496 = \$494 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$495 [20]; assign \$497 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$498 = \$496 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$497 [24]; assign \$499 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$500 = \$498 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$499 [25]; assign \$501 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$502 = \$500 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$501 [26]; assign \$503 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$504 = \$502 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$503 [27]; assign \$505 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$506 = \$504 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$505 [28]; assign \$507 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$508 = \$506 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$507 [31]; assign \$509 = \$508 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$510 = \$509 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$511 = \$510 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$512 = \$511 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$513 = \$512 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$514 = \$513 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$515 = \$514 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$516 = \$515 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$517 = \$516 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$518 = \$517 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$519 = \$518 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$520 = \$519 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$521 = \$520 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$522 = \$521 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$523 = \$522 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$524 = \$523 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$525 = \$524 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$526 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$528 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$529 = \$527 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$528 [1]; assign \$530 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$531 = \$529 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$530 [2]; assign \$532 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$533 = \$531 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$532 [4]; assign \$534 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$535 = \$533 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$534 [5]; assign \$536 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$537 = \$535 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$536 [6]; assign \$538 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$539 = \$537 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$538 [9]; assign \$540 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$541 = \$539 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$540 [12]; assign \$542 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$543 = \$541 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$542 [13]; assign \$544 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$545 = \$543 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$544 [15]; assign \$546 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$547 = \$545 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$546 [17]; assign \$548 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$549 = \$547 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$548 [18]; assign \$550 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$551 = \$549 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$550 [21]; assign \$552 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$553 = \$551 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$552 [24]; assign \$554 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$555 = \$553 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$554 [27]; assign \$556 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$557 = \$555 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$556 [30]; assign \$558 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$559 = \$557 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$558 [31]; assign \$560 = \$559 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$561 = \$560 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$562 = \$561 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$563 = \$562 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$564 = \$563 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$565 = \$564 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$566 = \$565 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$567 = \$566 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$568 = \$567 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$569 = \$568 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$570 = \$569 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$571 = \$570 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$572 = \$571 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$573 = \$572 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$574 = \$573 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$575 = \$574 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$576 = \$575 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$577 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$579 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$580 = \$578 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$579 [2]; assign \$581 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$582 = \$580 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$581 [3]; assign \$583 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$584 = \$582 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$583 [5]; assign \$585 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$586 = \$584 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$585 [6]; assign \$587 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$588 = \$586 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$587 [7]; assign \$589 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$590 = \$588 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$589 [10]; assign \$591 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$592 = \$590 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$591 [13]; assign \$593 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$594 = \$592 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$593 [14]; assign \$595 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$596 = \$594 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$595 [16]; assign \$597 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$598 = \$596 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$597 [18]; assign \$599 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$600 = \$598 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$599 [19]; assign \$601 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$602 = \$600 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$601 [22]; assign \$603 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$604 = \$602 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$603 [25]; assign \$605 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$606 = \$604 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$605 [28]; assign \$607 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$608 = \$606 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$607 [31]; assign \$609 = \$608 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$610 = \$609 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$611 = \$610 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$612 = \$611 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$613 = \$612 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$614 = \$613 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$615 = \$614 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$616 = \$615 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$617 = \$616 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$618 = \$617 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$619 = \$618 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$620 = \$619 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$621 = \$620 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$622 = \$621 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$623 = \$622 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$624 = \$623 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$625 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$627 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$628 = \$626 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$627 [3]; assign \$629 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$630 = \$628 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$629 [4]; assign \$631 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$632 = \$630 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$631 [6]; assign \$633 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$634 = \$632 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$633 [7]; assign \$635 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$636 = \$634 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$635 [8]; assign \$637 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$638 = \$636 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$637 [11]; assign \$639 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$640 = \$638 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$639 [14]; assign \$641 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$642 = \$640 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$641 [15]; assign \$643 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$644 = \$642 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$643 [17]; assign \$645 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$646 = \$644 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$645 [19]; assign \$647 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$648 = \$646 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$647 [20]; assign \$649 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$650 = \$648 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$649 [23]; assign \$651 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$652 = \$650 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$651 [26]; assign \$653 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$654 = \$652 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$653 [29]; assign \$655 = \$654 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$656 = \$655 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$657 = \$656 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$658 = \$657 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$659 = \$658 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$660 = \$659 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$661 = \$660 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$662 = \$661 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$663 = \$662 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$664 = \$663 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$665 = \$664 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$666 = \$665 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$667 = \$666 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$668 = \$667 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$669 = \$668 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$670 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$672 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$673 = \$671 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$672 [4]; assign \$674 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$675 = \$673 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$674 [5]; assign \$676 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$677 = \$675 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$676 [7]; assign \$678 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$679 = \$677 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$678 [8]; assign \$680 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$681 = \$679 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$680 [9]; assign \$682 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$683 = \$681 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$682 [12]; assign \$684 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$685 = \$683 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$684 [15]; assign \$686 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$687 = \$685 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$686 [16]; assign \$688 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$689 = \$687 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$688 [18]; assign \$690 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$691 = \$689 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$690 [20]; assign \$692 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$693 = \$691 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$692 [21]; assign \$694 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$695 = \$693 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$694 [24]; assign \$696 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$697 = \$695 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$696 [27]; assign \$698 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$699 = \$697 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$698 [30]; assign \$700 = \$699 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$701 = \$700 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$702 = \$701 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$703 = \$702 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$704 = \$703 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$705 = \$704 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$706 = \$705 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$707 = \$706 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$708 = \$707 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$709 = \$708 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$710 = \$709 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$711 = \$710 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$712 = \$711 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$713 = \$712 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$714 = \$713 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$715 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$717 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$718 = \$716 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$717 [4]; assign \$719 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$720 = \$718 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$719 [5]; assign \$721 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$722 = \$720 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$721 [8]; assign \$723 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$724 = \$722 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$723 [12]; assign \$725 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$726 = \$724 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$725 [13]; assign \$727 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$728 = \$726 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$727 [17]; assign \$729 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$730 = \$728 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$729 [19]; assign \$731 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$732 = \$730 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$731 [21]; assign \$733 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$734 = \$732 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$733 [22]; assign \$735 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$736 = \$734 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$735 [24]; assign \$737 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$738 = \$736 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$737 [26]; assign \$739 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$740 = \$738 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$739 [29]; assign \$741 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$742 = \$740 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$741 [30]; assign \$743 = \$742 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$744 = \$743 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$745 = \$744 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$746 = \$745 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$747 = \$746 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$748 = \$747 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$749 = \$748 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$750 = \$749 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$751 = \$750 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$752 = \$751 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$753 = \$752 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$754 = \$753 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$755 = \$754 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$756 = \$755 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$757 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$759 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$760 = \$758 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$759 [5]; assign \$761 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$762 = \$760 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$761 [6]; assign \$763 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$764 = \$762 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$763 [9]; assign \$765 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$766 = \$764 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$765 [13]; assign \$767 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$768 = \$766 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$767 [14]; assign \$769 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$770 = \$768 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$769 [18]; assign \$771 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$772 = \$770 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$771 [20]; assign \$773 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$774 = \$772 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$773 [22]; assign \$775 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$776 = \$774 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$775 [23]; assign \$777 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$778 = \$776 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$777 [25]; assign \$779 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$780 = \$778 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$779 [27]; assign \$781 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$782 = \$780 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$781 [30]; assign \$783 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$784 = \$782 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$783 [31]; assign \$785 = \$784 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$786 = \$785 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$787 = \$786 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$788 = \$787 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$789 = \$788 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$790 = \$789 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$791 = \$790 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$792 = \$791 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$793 = \$792 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$794 = \$793 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$795 = \$794 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$796 = \$795 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$797 = \$796 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$798 = \$797 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$799 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$801 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$802 = \$800 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$801 [6]; assign \$803 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$804 = \$802 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$803 [7]; assign \$805 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$806 = \$804 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$805 [10]; assign \$807 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$808 = \$806 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$807 [14]; assign \$809 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$810 = \$808 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$809 [15]; assign \$811 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$812 = \$810 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$811 [19]; assign \$813 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$814 = \$812 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$813 [21]; assign \$815 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$816 = \$814 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$815 [23]; assign \$817 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$818 = \$816 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$817 [24]; assign \$819 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$820 = \$818 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$819 [26]; assign \$821 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$822 = \$820 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$821 [28]; assign \$823 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$824 = \$822 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$823 [31]; assign \$825 = \$824 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$826 = \$825 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$827 = \$826 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$828 = \$827 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$829 = \$828 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$830 = \$829 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$831 = \$830 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$832 = \$831 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$833 = \$832 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$834 = \$833 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$835 = \$834 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$836 = \$835 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$837 = \$836 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$838 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$840 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$841 = \$839 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$840 [7]; assign \$842 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$843 = \$841 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$842 [8]; assign \$844 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$845 = \$843 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$844 [11]; assign \$846 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$847 = \$845 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$846 [15]; assign \$848 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$849 = \$847 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$848 [16]; assign \$850 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$851 = \$849 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$850 [20]; assign \$852 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$853 = \$851 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$852 [22]; assign \$854 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$855 = \$853 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$854 [24]; assign \$856 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$857 = \$855 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$856 [25]; assign \$858 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$859 = \$857 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$858 [27]; assign \$860 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$861 = \$859 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$860 [29]; assign \$862 = \$861 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$863 = \$862 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$864 = \$863 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$865 = \$864 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$866 = \$865 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$867 = \$866 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$868 = \$867 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$869 = \$868 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$870 = \$869 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$871 = \$870 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$872 = \$871 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$873 = \$872 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$874 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$876 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$877 = \$875 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$876 [8]; assign \$878 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$879 = \$877 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$878 [9]; assign \$880 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$881 = \$879 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$880 [12]; assign \$882 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$883 = \$881 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$882 [16]; assign \$884 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$885 = \$883 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$884 [17]; assign \$886 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$887 = \$885 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$886 [21]; assign \$888 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$889 = \$887 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$888 [23]; assign \$890 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$891 = \$889 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$890 [25]; assign \$892 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$893 = \$891 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$892 [26]; assign \$894 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$895 = \$893 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$894 [28]; assign \$896 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$897 = \$895 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$896 [30]; assign \$898 = \$897 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$899 = \$898 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$900 = \$899 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$901 = \$900 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$902 = \$901 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$903 = \$902 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$904 = \$903 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$905 = \$904 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$906 = \$905 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$907 = \$906 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$908 = \$907 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$909 = \$908 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$910 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$912 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$913 = \$911 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$912 [9]; assign \$914 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$915 = \$913 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$914 [10]; assign \$916 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$917 = \$915 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$916 [13]; assign \$918 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$919 = \$917 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$918 [17]; assign \$920 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$921 = \$919 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$920 [18]; assign \$922 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$923 = \$921 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$922 [22]; assign \$924 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$925 = \$923 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$924 [24]; assign \$926 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$927 = \$925 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$926 [26]; assign \$928 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$929 = \$927 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$928 [27]; assign \$930 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$931 = \$929 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$930 [29]; assign \$932 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$933 = \$931 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$932 [31]; assign \$934 = \$933 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$935 = \$934 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$936 = \$935 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$937 = \$936 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$938 = \$937 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$939 = \$938 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$940 = \$939 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$941 = \$940 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$942 = \$941 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$943 = \$942 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$944 = \$943 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$945 = \$944 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$946 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$948 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$949 = \$947 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$948 [9]; assign \$950 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$951 = \$949 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$950 [11]; assign \$952 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$953 = \$951 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$952 [12]; assign \$954 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$955 = \$953 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$954 [14]; assign \$956 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$957 = \$955 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$956 [16]; assign \$958 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$959 = \$957 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$958 [18]; assign \$960 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$961 = \$959 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$960 [19]; assign \$962 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$963 = \$961 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$962 [23]; assign \$964 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$965 = \$963 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$964 [24]; assign \$966 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$967 = \$965 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$966 [26]; assign \$968 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$969 = \$967 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$968 [27]; assign \$970 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$971 = \$969 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$970 [29]; assign \$972 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$973 = \$971 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$972 [31]; assign \$974 = \$973 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$975 = \$974 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$976 = \$975 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$977 = \$976 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$978 = \$977 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$979 = \$978 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$980 = \$979 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$981 = \$980 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$982 = \$981 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$983 = \$982 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$984 = \$983 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$985 = \$984 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$986 = \$985 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$987 = \$986 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$988 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$990 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$991 = \$989 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$990 [1]; assign \$992 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$993 = \$991 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$992 [6]; assign \$994 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$995 = \$993 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$994 [9]; assign \$996 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$997 = \$995 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$996 [13]; assign \$998 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$999 = \$997 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$998 [15]; assign \$1000 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1001 = \$999 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1000 [16]; assign \$1002 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1003 = \$1001 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1002 [17]; assign \$1004 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1005 = \$1003 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1004 [19]; assign \$1006 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1007 = \$1005 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1006 [20]; assign \$1008 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1009 = \$1007 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1008 [26]; assign \$1010 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1011 = \$1009 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1010 [27]; assign \$1012 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1013 = \$1011 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1012 [29]; assign \$1014 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1015 = \$1013 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1014 [31]; assign \$1016 = \$1015 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1017 = \$1016 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1018 = \$1017 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1019 = \$1018 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1020 = \$1019 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1021 = \$1020 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1022 = \$1021 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1023 = \$1022 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1024 = \$1023 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1025 = \$1024 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1026 = \$1025 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1027 = \$1026 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1028 = \$1027 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1029 = \$1028 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1030 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1032 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1033 = \$1031 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1032 [2]; assign \$1034 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1035 = \$1033 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1034 [7]; assign \$1036 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1037 = \$1035 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1036 [10]; assign \$1038 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1039 = \$1037 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1038 [14]; assign \$1040 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1041 = \$1039 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1040 [16]; assign \$1042 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1043 = \$1041 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1042 [17]; assign \$1044 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1045 = \$1043 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1044 [18]; assign \$1046 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1047 = \$1045 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1046 [20]; assign \$1048 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1049 = \$1047 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1048 [21]; assign \$1050 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1051 = \$1049 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1050 [27]; assign \$1052 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1053 = \$1051 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1052 [28]; assign \$1054 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1055 = \$1053 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1054 [30]; assign \$1056 = \$1055 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1057 = \$1056 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1058 = \$1057 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1059 = \$1058 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1060 = \$1059 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1061 = \$1060 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1062 = \$1061 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1063 = \$1062 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1064 = \$1063 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1065 = \$1064 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1066 = \$1065 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1067 = \$1066 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1068 = \$1067 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1069 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1071 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1072 = \$1070 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1071 [3]; assign \$1073 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1074 = \$1072 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1073 [8]; assign \$1075 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1076 = \$1074 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1075 [11]; assign \$1077 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1078 = \$1076 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1077 [15]; assign \$1079 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1080 = \$1078 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1079 [17]; assign \$1081 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1082 = \$1080 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1081 [18]; assign \$1083 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1084 = \$1082 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1083 [19]; assign \$1085 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1086 = \$1084 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1085 [21]; assign \$1087 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1088 = \$1086 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1087 [22]; assign \$1089 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1090 = \$1088 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1089 [28]; assign \$1091 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1092 = \$1090 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1091 [29]; assign \$1093 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1094 = \$1092 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1093 [31]; assign \$1095 = \$1094 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1096 = \$1095 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1097 = \$1096 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1098 = \$1097 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1099 = \$1098 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1100 = \$1099 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1101 = \$1100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1102 = \$1101 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1103 = \$1102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1104 = \$1103 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1105 = \$1104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1106 = \$1105 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1107 = \$1106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1108 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1110 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1111 = \$1109 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1110 [3]; assign \$1112 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1113 = \$1111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1112 [4]; assign \$1114 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1115 = \$1113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1114 [6]; assign \$1116 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1117 = \$1115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1116 [10]; assign \$1118 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1119 = \$1117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1118 [18]; assign \$1120 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1121 = \$1119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1120 [19]; assign \$1122 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1123 = \$1121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1122 [20]; assign \$1124 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1125 = \$1123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1124 [22]; assign \$1126 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1127 = \$1125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1126 [23]; assign \$1128 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1129 = \$1127 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1128 [24]; assign \$1130 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1131 = \$1129 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1130 [25]; assign \$1132 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1133 = \$1131 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1132 [26]; assign \$1134 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1135 = \$1133 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1134 [28]; assign \$1136 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1137 = \$1135 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1136 [31]; assign \$1138 = \$1137 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1139 = \$1138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1140 = \$1139 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1141 = \$1140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1142 = \$1141 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1143 = \$1142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1144 = \$1143 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1145 = \$1144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1146 = \$1145 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1147 = \$1146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1148 = \$1147 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1149 = \$1148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1150 = \$1149 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1151 = \$1150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1152 = \$1151 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1156 = \$1154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1155 [4]; assign \$1157 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1158 = \$1156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1157 [5]; assign \$1159 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1160 = \$1158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1159 [7]; assign \$1161 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1162 = \$1160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1161 [11]; assign \$1163 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1164 = \$1162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1163 [19]; assign \$1165 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1166 = \$1164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1165 [20]; assign \$1167 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1168 = \$1166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1167 [21]; assign \$1169 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1170 = \$1168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1169 [23]; assign \$1171 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1172 = \$1170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1171 [24]; assign \$1173 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1174 = \$1172 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1173 [25]; assign \$1175 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1176 = \$1174 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1175 [26]; assign \$1177 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1178 = \$1176 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1177 [27]; assign \$1179 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1180 = \$1178 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1179 [29]; assign \$1181 = \$1180 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1182 = \$1181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1183 = \$1182 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1184 = \$1183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1185 = \$1184 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1186 = \$1185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1187 = \$1186 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1188 = \$1187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1189 = \$1188 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1190 = \$1189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1191 = \$1190 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1192 = \$1191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1193 = \$1192 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1194 = \$1193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1195 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1197 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1198 = \$1196 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1197 [5]; assign \$1199 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1200 = \$1198 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1199 [6]; assign \$1201 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1202 = \$1200 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1201 [8]; assign \$1203 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1204 = \$1202 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1203 [12]; assign \$1205 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1206 = \$1204 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1205 [20]; assign \$1207 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1208 = \$1206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1207 [21]; assign \$1209 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1210 = \$1208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1209 [22]; assign \$1211 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1212 = \$1210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1211 [24]; assign \$1213 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1214 = \$1212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1213 [25]; assign \$1215 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1216 = \$1214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1215 [26]; assign \$1217 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1218 = \$1216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1217 [27]; assign \$1219 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1220 = \$1218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1219 [28]; assign \$1221 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1222 = \$1220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1221 [30]; assign \$1223 = \$1222 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1224 = \$1223 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1225 = \$1224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1226 = \$1225 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1227 = \$1226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$1228 = \$1227 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1229 = \$1228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1230 = \$1229 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1231 = \$1230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1232 = \$1231 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1233 = \$1232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1234 = \$1233 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1235 = \$1234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1236 = \$1235 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1240 = \$1238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1239 [6]; assign \$1241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1242 = \$1240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1241 [7]; assign \$1243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1244 = \$1242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1243 [9]; assign \$1245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1246 = \$1244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1245 [13]; assign \$1247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1248 = \$1246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1247 [21]; assign \$1249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1250 = \$1248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1249 [22]; assign \$1251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1252 = \$1250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1251 [23]; assign \$1253 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1254 = \$1252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1253 [25]; assign \$1255 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1256 = \$1254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1255 [26]; assign \$1257 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1258 = \$1256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1257 [27]; assign \$1259 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1260 = \$1258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1259 [28]; assign \$1261 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1262 = \$1260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1261 [29]; assign \$1263 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1264 = \$1262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1263 [31]; assign \$1265 = \$1264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1266 = \$1265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1267 = \$1266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1268 = \$1267 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1269 = \$1268 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1270 = \$1269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1271 = \$1270 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1272 = \$1271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1273 = \$1272 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1274 = \$1273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1275 = \$1274 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1276 = \$1275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1277 = \$1276 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1278 = \$1277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1279 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1281 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1282 = \$1280 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1281 [7]; assign \$1283 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1284 = \$1282 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1283 [8]; assign \$1285 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1286 = \$1284 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1285 [10]; assign \$1287 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1288 = \$1286 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1287 [14]; assign \$1289 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1290 = \$1288 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1289 [22]; assign \$1291 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1292 = \$1290 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1291 [23]; assign \$1293 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1294 = \$1292 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1293 [24]; assign \$1295 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1296 = \$1294 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1295 [26]; assign \$1297 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1298 = \$1296 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1297 [27]; assign \$1299 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1300 = \$1298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1299 [28]; assign \$1301 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1302 = \$1300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1301 [29]; assign \$1303 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1304 = \$1302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1303 [30]; assign \$1305 = \$1304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1306 = \$1305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1307 = \$1306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1308 = \$1307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1309 = \$1308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1310 = \$1309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1311 = \$1310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1312 = \$1311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1313 = \$1312 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1314 = \$1313 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1315 = \$1314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1316 = \$1315 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1317 = \$1316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1318 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1320 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1321 = \$1319 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1320 [8]; assign \$1322 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1323 = \$1321 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1322 [9]; assign \$1324 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1325 = \$1323 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1324 [11]; assign \$1326 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1327 = \$1325 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1326 [15]; assign \$1328 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1329 = \$1327 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1328 [23]; assign \$1330 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1331 = \$1329 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1330 [24]; assign \$1332 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1333 = \$1331 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1332 [25]; assign \$1334 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1335 = \$1333 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1334 [27]; assign \$1336 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1337 = \$1335 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1336 [28]; assign \$1338 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1339 = \$1337 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1338 [29]; assign \$1340 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1341 = \$1339 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1340 [30]; assign \$1342 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1343 = \$1341 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1342 [31]; assign \$1344 = \$1343 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1345 = \$1344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1346 = \$1345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1347 = \$1346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1348 = \$1347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1349 = \$1348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1350 = \$1349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1351 = \$1350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1352 = \$1351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1353 = \$1352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1354 = \$1353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1355 = \$1354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1356 = \$1355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_reg <= 32'd4294967295; else crc_reg <= \$1357 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$21 ) begin end \$1357 = crc_reg; if (valid) begin \$1357 [0] = \$39 ; \$1357 [1] = \$78 ; \$1357 [2] = \$126 ; \$1357 [3] = \$171 ; \$1357 [4] = \$222 ; \$1357 [5] = \$267 ; \$1357 [6] = \$312 ; \$1357 [7] = \$360 ; \$1357 [8] = \$399 ; \$1357 [9] = \$435 ; \$1357 [10] = \$474 ; \$1357 [11] = \$525 ; \$1357 [12] = \$576 ; \$1357 [13] = \$624 ; \$1357 [14] = \$669 ; \$1357 [15] = \$714 ; \$1357 [16] = \$756 ; \$1357 [17] = \$798 ; \$1357 [18] = \$837 ; \$1357 [19] = \$873 ; \$1357 [20] = \$909 ; \$1357 [21] = \$945 ; \$1357 [22] = \$987 ; \$1357 [23] = \$1029 ; \$1357 [24] = \$1068 ; \$1357 [25] = \$1107 ; \$1357 [26] = \$1152 ; \$1357 [27] = \$1194 ; \$1357 [28] = \$1236 ; \$1357 [29] = \$1278 ; \$1357 [30] = \$1317 ; \$1357 [31] = \$1356 ; end else if (start) begin \$1357 = 32'd4294967295; end end assign data = data_in; assign crc = crc_reg; assign \$2 = \$1 [0]; assign \$41 = \$40 [0]; assign \$80 = \$79 [0]; assign \$128 = \$127 [1]; assign \$173 = \$172 [0]; assign \$224 = \$223 [0]; assign \$269 = \$268 [1]; assign \$314 = \$313 [0]; assign \$362 = \$361 [0]; assign \$401 = \$400 [1]; assign \$437 = \$436 [0]; assign \$476 = \$475 [0]; assign \$527 = \$526 [0]; assign \$578 = \$577 [1]; assign \$626 = \$625 [2]; assign \$671 = \$670 [3]; assign \$716 = \$715 [0]; assign \$758 = \$757 [1]; assign \$800 = \$799 [2]; assign \$839 = \$838 [3]; assign \$875 = \$874 [4]; assign \$911 = \$910 [5]; assign \$947 = \$946 [0]; assign \$989 = \$988 [0]; assign \$1031 = \$1030 [1]; assign \$1070 = \$1069 [2]; assign \$1109 = \$1108 [0]; assign \$1154 = \$1153 [1]; assign \$1196 = \$1195 [2]; assign \$1238 = \$1237 [3]; assign \$1280 = \$1279 [4]; assign \$1319 = \$1318 [5]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_B.drive_serial_port.crc32_tx (sync_100_rst, crc, valid, start, data_in, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$22 = 0; wire [31:0] \$1 ; wire \$10 ; wire \$100 ; wire [31:0] \$1000 ; wire \$1001 ; wire [31:0] \$1002 ; wire \$1003 ; wire [31:0] \$1004 ; wire \$1005 ; wire [31:0] \$1006 ; wire \$1007 ; wire [31:0] \$1008 ; wire \$1009 ; wire [31:0] \$101 ; wire [31:0] \$1010 ; wire \$1011 ; wire [31:0] \$1012 ; wire \$1013 ; wire [31:0] \$1014 ; wire \$1015 ; wire \$1016 ; wire \$1017 ; wire \$1018 ; wire \$1019 ; wire \$102 ; wire \$1020 ; wire \$1021 ; wire \$1022 ; wire \$1023 ; wire \$1024 ; wire \$1025 ; wire \$1026 ; wire \$1027 ; wire \$1028 ; wire \$1029 ; wire [31:0] \$103 ; wire [31:0] \$1030 ; wire \$1031 ; wire [31:0] \$1032 ; wire \$1033 ; wire [31:0] \$1034 ; wire \$1035 ; wire [31:0] \$1036 ; wire \$1037 ; wire [31:0] \$1038 ; wire \$1039 ; wire \$104 ; wire [31:0] \$1040 ; wire \$1041 ; wire [31:0] \$1042 ; wire \$1043 ; wire [31:0] \$1044 ; wire \$1045 ; wire [31:0] \$1046 ; wire \$1047 ; wire [31:0] \$1048 ; wire \$1049 ; wire [31:0] \$105 ; wire [31:0] \$1050 ; wire \$1051 ; wire [31:0] \$1052 ; wire \$1053 ; wire [31:0] \$1054 ; wire \$1055 ; wire \$1056 ; wire \$1057 ; wire \$1058 ; wire \$1059 ; wire \$106 ; wire \$1060 ; wire \$1061 ; wire \$1062 ; wire \$1063 ; wire \$1064 ; wire \$1065 ; wire \$1066 ; wire \$1067 ; wire \$1068 ; wire [31:0] \$1069 ; wire [31:0] \$107 ; wire \$1070 ; wire [31:0] \$1071 ; wire \$1072 ; wire [31:0] \$1073 ; wire \$1074 ; wire [31:0] \$1075 ; wire \$1076 ; wire [31:0] \$1077 ; wire \$1078 ; wire [31:0] \$1079 ; wire \$108 ; wire \$1080 ; wire [31:0] \$1081 ; wire \$1082 ; wire [31:0] \$1083 ; wire \$1084 ; wire [31:0] \$1085 ; wire \$1086 ; wire [31:0] \$1087 ; wire \$1088 ; wire [31:0] \$1089 ; wire [31:0] \$109 ; wire \$1090 ; wire [31:0] \$1091 ; wire \$1092 ; wire [31:0] \$1093 ; wire \$1094 ; wire \$1095 ; wire \$1096 ; wire \$1097 ; wire \$1098 ; wire \$1099 ; wire [31:0] \$11 ; wire \$110 ; wire \$1100 ; wire \$1101 ; wire \$1102 ; wire \$1103 ; wire \$1104 ; wire \$1105 ; wire \$1106 ; wire \$1107 ; wire [31:0] \$1108 ; wire \$1109 ; wire \$111 ; wire [31:0] \$1110 ; wire \$1111 ; wire [31:0] \$1112 ; wire \$1113 ; wire [31:0] \$1114 ; wire \$1115 ; wire [31:0] \$1116 ; wire \$1117 ; wire [31:0] \$1118 ; wire \$1119 ; wire \$112 ; wire [31:0] \$1120 ; wire \$1121 ; wire [31:0] \$1122 ; wire \$1123 ; wire [31:0] \$1124 ; wire \$1125 ; wire [31:0] \$1126 ; wire \$1127 ; wire [31:0] \$1128 ; wire \$1129 ; wire \$113 ; wire [31:0] \$1130 ; wire \$1131 ; wire [31:0] \$1132 ; wire \$1133 ; wire [31:0] \$1134 ; wire \$1135 ; wire [31:0] \$1136 ; wire \$1137 ; wire \$1138 ; wire \$1139 ; wire \$114 ; wire \$1140 ; wire \$1141 ; wire \$1142 ; wire \$1143 ; wire \$1144 ; wire \$1145 ; wire \$1146 ; wire \$1147 ; wire \$1148 ; wire \$1149 ; wire \$115 ; wire \$1150 ; wire \$1151 ; wire \$1152 ; wire [31:0] \$1153 ; wire \$1154 ; wire [31:0] \$1155 ; wire \$1156 ; wire [31:0] \$1157 ; wire \$1158 ; wire [31:0] \$1159 ; wire \$116 ; wire \$1160 ; wire [31:0] \$1161 ; wire \$1162 ; wire [31:0] \$1163 ; wire \$1164 ; wire [31:0] \$1165 ; wire \$1166 ; wire [31:0] \$1167 ; wire \$1168 ; wire [31:0] \$1169 ; wire \$117 ; wire \$1170 ; wire [31:0] \$1171 ; wire \$1172 ; wire [31:0] \$1173 ; wire \$1174 ; wire [31:0] \$1175 ; wire \$1176 ; wire [31:0] \$1177 ; wire \$1178 ; wire [31:0] \$1179 ; wire \$118 ; wire \$1180 ; wire \$1181 ; wire \$1182 ; wire \$1183 ; wire \$1184 ; wire \$1185 ; wire \$1186 ; wire \$1187 ; wire \$1188 ; wire \$1189 ; wire \$119 ; wire \$1190 ; wire \$1191 ; wire \$1192 ; wire \$1193 ; wire \$1194 ; wire [31:0] \$1195 ; wire \$1196 ; wire [31:0] \$1197 ; wire \$1198 ; wire [31:0] \$1199 ; wire \$12 ; wire \$120 ; wire \$1200 ; wire [31:0] \$1201 ; wire \$1202 ; wire [31:0] \$1203 ; wire \$1204 ; wire [31:0] \$1205 ; wire \$1206 ; wire [31:0] \$1207 ; wire \$1208 ; wire [31:0] \$1209 ; wire \$121 ; wire \$1210 ; wire [31:0] \$1211 ; wire \$1212 ; wire [31:0] \$1213 ; wire \$1214 ; wire [31:0] \$1215 ; wire \$1216 ; wire [31:0] \$1217 ; wire \$1218 ; wire [31:0] \$1219 ; wire \$122 ; wire \$1220 ; wire [31:0] \$1221 ; wire \$1222 ; wire \$1223 ; wire \$1224 ; wire \$1225 ; wire \$1226 ; wire \$1227 ; wire \$1228 ; wire \$1229 ; wire \$123 ; wire \$1230 ; wire \$1231 ; wire \$1232 ; wire \$1233 ; wire \$1234 ; wire \$1235 ; wire \$1236 ; wire [31:0] \$1237 ; wire \$1238 ; wire [31:0] \$1239 ; wire \$124 ; wire \$1240 ; wire [31:0] \$1241 ; wire \$1242 ; wire [31:0] \$1243 ; wire \$1244 ; wire [31:0] \$1245 ; wire \$1246 ; wire [31:0] \$1247 ; wire \$1248 ; wire [31:0] \$1249 ; wire \$125 ; wire \$1250 ; wire [31:0] \$1251 ; wire \$1252 ; wire [31:0] \$1253 ; wire \$1254 ; wire [31:0] \$1255 ; wire \$1256 ; wire [31:0] \$1257 ; wire \$1258 ; wire [31:0] \$1259 ; wire \$126 ; wire \$1260 ; wire [31:0] \$1261 ; wire \$1262 ; wire [31:0] \$1263 ; wire \$1264 ; wire \$1265 ; wire \$1266 ; wire \$1267 ; wire \$1268 ; wire \$1269 ; wire [31:0] \$127 ; wire \$1270 ; wire \$1271 ; wire \$1272 ; wire \$1273 ; wire \$1274 ; wire \$1275 ; wire \$1276 ; wire \$1277 ; wire \$1278 ; wire [31:0] \$1279 ; wire \$128 ; wire \$1280 ; wire [31:0] \$1281 ; wire \$1282 ; wire [31:0] \$1283 ; wire \$1284 ; wire [31:0] \$1285 ; wire \$1286 ; wire [31:0] \$1287 ; wire \$1288 ; wire [31:0] \$1289 ; wire [31:0] \$129 ; wire \$1290 ; wire [31:0] \$1291 ; wire \$1292 ; wire [31:0] \$1293 ; wire \$1294 ; wire [31:0] \$1295 ; wire \$1296 ; wire [31:0] \$1297 ; wire \$1298 ; wire [31:0] \$1299 ; wire [31:0] \$13 ; wire \$130 ; wire \$1300 ; wire [31:0] \$1301 ; wire \$1302 ; wire [31:0] \$1303 ; wire \$1304 ; wire \$1305 ; wire \$1306 ; wire \$1307 ; wire \$1308 ; wire \$1309 ; wire [31:0] \$131 ; wire \$1310 ; wire \$1311 ; wire \$1312 ; wire \$1313 ; wire \$1314 ; wire \$1315 ; wire \$1316 ; wire \$1317 ; wire [31:0] \$1318 ; wire \$1319 ; wire \$132 ; wire [31:0] \$1320 ; wire \$1321 ; wire [31:0] \$1322 ; wire \$1323 ; wire [31:0] \$1324 ; wire \$1325 ; wire [31:0] \$1326 ; wire \$1327 ; wire [31:0] \$1328 ; wire \$1329 ; wire [31:0] \$133 ; wire [31:0] \$1330 ; wire \$1331 ; wire [31:0] \$1332 ; wire \$1333 ; wire [31:0] \$1334 ; wire \$1335 ; wire [31:0] \$1336 ; wire \$1337 ; wire [31:0] \$1338 ; wire \$1339 ; wire \$134 ; wire [31:0] \$1340 ; wire \$1341 ; wire [31:0] \$1342 ; wire \$1343 ; wire \$1344 ; wire \$1345 ; wire \$1346 ; wire \$1347 ; wire \$1348 ; wire \$1349 ; wire [31:0] \$135 ; wire \$1350 ; wire \$1351 ; wire \$1352 ; wire \$1353 ; wire \$1354 ; wire \$1355 ; wire \$1356 ; reg [31:0] \$1357 ; wire \$136 ; wire [31:0] \$137 ; wire \$138 ; wire [31:0] \$139 ; wire \$14 ; wire \$140 ; wire [31:0] \$141 ; wire \$142 ; wire [31:0] \$143 ; wire \$144 ; wire [31:0] \$145 ; wire \$146 ; wire [31:0] \$147 ; wire \$148 ; wire [31:0] \$149 ; wire [31:0] \$15 ; wire \$150 ; wire [31:0] \$151 ; wire \$152 ; wire [31:0] \$153 ; wire \$154 ; wire [31:0] \$155 ; wire \$156 ; wire \$157 ; wire \$158 ; wire \$159 ; wire \$16 ; wire \$160 ; wire \$161 ; wire \$162 ; wire \$163 ; wire \$164 ; wire \$165 ; wire \$166 ; wire \$167 ; wire \$168 ; wire \$169 ; wire [31:0] \$17 ; wire \$170 ; wire \$171 ; wire [31:0] \$172 ; wire \$173 ; wire [31:0] \$174 ; wire \$175 ; wire [31:0] \$176 ; wire \$177 ; wire [31:0] \$178 ; wire \$179 ; wire \$18 ; wire [31:0] \$180 ; wire \$181 ; wire [31:0] \$182 ; wire \$183 ; wire [31:0] \$184 ; wire \$185 ; wire [31:0] \$186 ; wire \$187 ; wire [31:0] \$188 ; wire \$189 ; wire [31:0] \$19 ; wire [31:0] \$190 ; wire \$191 ; wire [31:0] \$192 ; wire \$193 ; wire [31:0] \$194 ; wire \$195 ; wire [31:0] \$196 ; wire \$197 ; wire [31:0] \$198 ; wire \$199 ; wire \$2 ; wire \$20 ; wire [31:0] \$200 ; wire \$201 ; wire [31:0] \$202 ; wire \$203 ; wire [31:0] \$204 ; wire \$205 ; wire \$206 ; wire \$207 ; wire \$208 ; wire \$209 ; wire [31:0] \$21 ; wire \$210 ; wire \$211 ; wire \$212 ; wire \$213 ; wire \$214 ; wire \$215 ; wire \$216 ; wire \$217 ; wire \$218 ; wire \$219 ; wire \$22 ; wire \$220 ; wire \$221 ; wire \$222 ; wire [31:0] \$223 ; wire \$224 ; wire [31:0] \$225 ; wire \$226 ; wire [31:0] \$227 ; wire \$228 ; wire [31:0] \$229 ; wire [31:0] \$23 ; wire \$230 ; wire [31:0] \$231 ; wire \$232 ; wire [31:0] \$233 ; wire \$234 ; wire [31:0] \$235 ; wire \$236 ; wire [31:0] \$237 ; wire \$238 ; wire [31:0] \$239 ; wire \$24 ; wire \$240 ; wire [31:0] \$241 ; wire \$242 ; wire [31:0] \$243 ; wire \$244 ; wire [31:0] \$245 ; wire \$246 ; wire [31:0] \$247 ; wire \$248 ; wire [31:0] \$249 ; wire [31:0] \$25 ; wire \$250 ; wire [31:0] \$251 ; wire \$252 ; wire \$253 ; wire \$254 ; wire \$255 ; wire \$256 ; wire \$257 ; wire \$258 ; wire \$259 ; wire \$26 ; wire \$260 ; wire \$261 ; wire \$262 ; wire \$263 ; wire \$264 ; wire \$265 ; wire \$266 ; wire \$267 ; wire [31:0] \$268 ; wire \$269 ; wire \$27 ; wire [31:0] \$270 ; wire \$271 ; wire [31:0] \$272 ; wire \$273 ; wire [31:0] \$274 ; wire \$275 ; wire [31:0] \$276 ; wire \$277 ; wire [31:0] \$278 ; wire \$279 ; wire \$28 ; wire [31:0] \$280 ; wire \$281 ; wire [31:0] \$282 ; wire \$283 ; wire [31:0] \$284 ; wire \$285 ; wire [31:0] \$286 ; wire \$287 ; wire [31:0] \$288 ; wire \$289 ; wire \$29 ; wire [31:0] \$290 ; wire \$291 ; wire [31:0] \$292 ; wire \$293 ; wire [31:0] \$294 ; wire \$295 ; wire [31:0] \$296 ; wire \$297 ; wire \$298 ; wire \$299 ; wire [31:0] \$3 ; wire \$30 ; wire \$300 ; wire \$301 ; wire \$302 ; wire \$303 ; wire \$304 ; wire \$305 ; wire \$306 ; wire \$307 ; wire \$308 ; wire \$309 ; wire \$31 ; wire \$310 ; wire \$311 ; wire \$312 ; wire [31:0] \$313 ; wire \$314 ; wire [31:0] \$315 ; wire \$316 ; wire [31:0] \$317 ; wire \$318 ; wire [31:0] \$319 ; wire \$32 ; wire \$320 ; wire [31:0] \$321 ; wire \$322 ; wire [31:0] \$323 ; wire \$324 ; wire [31:0] \$325 ; wire \$326 ; wire [31:0] \$327 ; wire \$328 ; wire [31:0] \$329 ; wire \$33 ; wire \$330 ; wire [31:0] \$331 ; wire \$332 ; wire [31:0] \$333 ; wire \$334 ; wire [31:0] \$335 ; wire \$336 ; wire [31:0] \$337 ; wire \$338 ; wire [31:0] \$339 ; wire \$34 ; wire \$340 ; wire [31:0] \$341 ; wire \$342 ; wire [31:0] \$343 ; wire \$344 ; wire \$345 ; wire \$346 ; wire \$347 ; wire \$348 ; wire \$349 ; wire \$35 ; wire \$350 ; wire \$351 ; wire \$352 ; wire \$353 ; wire \$354 ; wire \$355 ; wire \$356 ; wire \$357 ; wire \$358 ; wire \$359 ; wire \$36 ; wire \$360 ; wire [31:0] \$361 ; wire \$362 ; wire [31:0] \$363 ; wire \$364 ; wire [31:0] \$365 ; wire \$366 ; wire [31:0] \$367 ; wire \$368 ; wire [31:0] \$369 ; wire \$37 ; wire \$370 ; wire [31:0] \$371 ; wire \$372 ; wire [31:0] \$373 ; wire \$374 ; wire [31:0] \$375 ; wire \$376 ; wire [31:0] \$377 ; wire \$378 ; wire [31:0] \$379 ; wire \$38 ; wire \$380 ; wire [31:0] \$381 ; wire \$382 ; wire [31:0] \$383 ; wire \$384 ; wire [31:0] \$385 ; wire \$386 ; wire \$387 ; wire \$388 ; wire \$389 ; wire \$39 ; wire \$390 ; wire \$391 ; wire \$392 ; wire \$393 ; wire \$394 ; wire \$395 ; wire \$396 ; wire \$397 ; wire \$398 ; wire \$399 ; wire \$4 ; wire [31:0] \$40 ; wire [31:0] \$400 ; wire \$401 ; wire [31:0] \$402 ; wire \$403 ; wire [31:0] \$404 ; wire \$405 ; wire [31:0] \$406 ; wire \$407 ; wire [31:0] \$408 ; wire \$409 ; wire \$41 ; wire [31:0] \$410 ; wire \$411 ; wire [31:0] \$412 ; wire \$413 ; wire [31:0] \$414 ; wire \$415 ; wire [31:0] \$416 ; wire \$417 ; wire [31:0] \$418 ; wire \$419 ; wire [31:0] \$42 ; wire [31:0] \$420 ; wire \$421 ; wire [31:0] \$422 ; wire \$423 ; wire \$424 ; wire \$425 ; wire \$426 ; wire \$427 ; wire \$428 ; wire \$429 ; wire \$43 ; wire \$430 ; wire \$431 ; wire \$432 ; wire \$433 ; wire \$434 ; wire \$435 ; wire [31:0] \$436 ; wire \$437 ; wire [31:0] \$438 ; wire \$439 ; wire [31:0] \$44 ; wire [31:0] \$440 ; wire \$441 ; wire [31:0] \$442 ; wire \$443 ; wire [31:0] \$444 ; wire \$445 ; wire [31:0] \$446 ; wire \$447 ; wire [31:0] \$448 ; wire \$449 ; wire \$45 ; wire [31:0] \$450 ; wire \$451 ; wire [31:0] \$452 ; wire \$453 ; wire [31:0] \$454 ; wire \$455 ; wire [31:0] \$456 ; wire \$457 ; wire [31:0] \$458 ; wire \$459 ; wire [31:0] \$46 ; wire [31:0] \$460 ; wire \$461 ; wire \$462 ; wire \$463 ; wire \$464 ; wire \$465 ; wire \$466 ; wire \$467 ; wire \$468 ; wire \$469 ; wire \$47 ; wire \$470 ; wire \$471 ; wire \$472 ; wire \$473 ; wire \$474 ; wire [31:0] \$475 ; wire \$476 ; wire [31:0] \$477 ; wire \$478 ; wire [31:0] \$479 ; wire [31:0] \$48 ; wire \$480 ; wire [31:0] \$481 ; wire \$482 ; wire [31:0] \$483 ; wire \$484 ; wire [31:0] \$485 ; wire \$486 ; wire [31:0] \$487 ; wire \$488 ; wire [31:0] \$489 ; wire \$49 ; wire \$490 ; wire [31:0] \$491 ; wire \$492 ; wire [31:0] \$493 ; wire \$494 ; wire [31:0] \$495 ; wire \$496 ; wire [31:0] \$497 ; wire \$498 ; wire [31:0] \$499 ; wire [31:0] \$5 ; wire [31:0] \$50 ; wire \$500 ; wire [31:0] \$501 ; wire \$502 ; wire [31:0] \$503 ; wire \$504 ; wire [31:0] \$505 ; wire \$506 ; wire [31:0] \$507 ; wire \$508 ; wire \$509 ; wire \$51 ; wire \$510 ; wire \$511 ; wire \$512 ; wire \$513 ; wire \$514 ; wire \$515 ; wire \$516 ; wire \$517 ; wire \$518 ; wire \$519 ; wire [31:0] \$52 ; wire \$520 ; wire \$521 ; wire \$522 ; wire \$523 ; wire \$524 ; wire \$525 ; wire [31:0] \$526 ; wire \$527 ; wire [31:0] \$528 ; wire \$529 ; wire \$53 ; wire [31:0] \$530 ; wire \$531 ; wire [31:0] \$532 ; wire \$533 ; wire [31:0] \$534 ; wire \$535 ; wire [31:0] \$536 ; wire \$537 ; wire [31:0] \$538 ; wire \$539 ; wire [31:0] \$54 ; wire [31:0] \$540 ; wire \$541 ; wire [31:0] \$542 ; wire \$543 ; wire [31:0] \$544 ; wire \$545 ; wire [31:0] \$546 ; wire \$547 ; wire [31:0] \$548 ; wire \$549 ; wire \$55 ; wire [31:0] \$550 ; wire \$551 ; wire [31:0] \$552 ; wire \$553 ; wire [31:0] \$554 ; wire \$555 ; wire [31:0] \$556 ; wire \$557 ; wire [31:0] \$558 ; wire \$559 ; wire [31:0] \$56 ; wire \$560 ; wire \$561 ; wire \$562 ; wire \$563 ; wire \$564 ; wire \$565 ; wire \$566 ; wire \$567 ; wire \$568 ; wire \$569 ; wire \$57 ; wire \$570 ; wire \$571 ; wire \$572 ; wire \$573 ; wire \$574 ; wire \$575 ; wire \$576 ; wire [31:0] \$577 ; wire \$578 ; wire [31:0] \$579 ; wire [31:0] \$58 ; wire \$580 ; wire [31:0] \$581 ; wire \$582 ; wire [31:0] \$583 ; wire \$584 ; wire [31:0] \$585 ; wire \$586 ; wire [31:0] \$587 ; wire \$588 ; wire [31:0] \$589 ; wire \$59 ; wire \$590 ; wire [31:0] \$591 ; wire \$592 ; wire [31:0] \$593 ; wire \$594 ; wire [31:0] \$595 ; wire \$596 ; wire [31:0] \$597 ; wire \$598 ; wire [31:0] \$599 ; wire \$6 ; wire [31:0] \$60 ; wire \$600 ; wire [31:0] \$601 ; wire \$602 ; wire [31:0] \$603 ; wire \$604 ; wire [31:0] \$605 ; wire \$606 ; wire [31:0] \$607 ; wire \$608 ; wire \$609 ; wire \$61 ; wire \$610 ; wire \$611 ; wire \$612 ; wire \$613 ; wire \$614 ; wire \$615 ; wire \$616 ; wire \$617 ; wire \$618 ; wire \$619 ; wire [31:0] \$62 ; wire \$620 ; wire \$621 ; wire \$622 ; wire \$623 ; wire \$624 ; wire [31:0] \$625 ; wire \$626 ; wire [31:0] \$627 ; wire \$628 ; wire [31:0] \$629 ; wire \$63 ; wire \$630 ; wire [31:0] \$631 ; wire \$632 ; wire [31:0] \$633 ; wire \$634 ; wire [31:0] \$635 ; wire \$636 ; wire [31:0] \$637 ; wire \$638 ; wire [31:0] \$639 ; wire [31:0] \$64 ; wire \$640 ; wire [31:0] \$641 ; wire \$642 ; wire [31:0] \$643 ; wire \$644 ; wire [31:0] \$645 ; wire \$646 ; wire [31:0] \$647 ; wire \$648 ; wire [31:0] \$649 ; wire \$65 ; wire \$650 ; wire [31:0] \$651 ; wire \$652 ; wire [31:0] \$653 ; wire \$654 ; wire \$655 ; wire \$656 ; wire \$657 ; wire \$658 ; wire \$659 ; wire \$66 ; wire \$660 ; wire \$661 ; wire \$662 ; wire \$663 ; wire \$664 ; wire \$665 ; wire \$666 ; wire \$667 ; wire \$668 ; wire \$669 ; wire \$67 ; wire [31:0] \$670 ; wire \$671 ; wire [31:0] \$672 ; wire \$673 ; wire [31:0] \$674 ; wire \$675 ; wire [31:0] \$676 ; wire \$677 ; wire [31:0] \$678 ; wire \$679 ; wire \$68 ; wire [31:0] \$680 ; wire \$681 ; wire [31:0] \$682 ; wire \$683 ; wire [31:0] \$684 ; wire \$685 ; wire [31:0] \$686 ; wire \$687 ; wire [31:0] \$688 ; wire \$689 ; wire \$69 ; wire [31:0] \$690 ; wire \$691 ; wire [31:0] \$692 ; wire \$693 ; wire [31:0] \$694 ; wire \$695 ; wire [31:0] \$696 ; wire \$697 ; wire [31:0] \$698 ; wire \$699 ; wire [31:0] \$7 ; wire \$70 ; wire \$700 ; wire \$701 ; wire \$702 ; wire \$703 ; wire \$704 ; wire \$705 ; wire \$706 ; wire \$707 ; wire \$708 ; wire \$709 ; wire \$71 ; wire \$710 ; wire \$711 ; wire \$712 ; wire \$713 ; wire \$714 ; wire [31:0] \$715 ; wire \$716 ; wire [31:0] \$717 ; wire \$718 ; wire [31:0] \$719 ; wire \$72 ; wire \$720 ; wire [31:0] \$721 ; wire \$722 ; wire [31:0] \$723 ; wire \$724 ; wire [31:0] \$725 ; wire \$726 ; wire [31:0] \$727 ; wire \$728 ; wire [31:0] \$729 ; wire \$73 ; wire \$730 ; wire [31:0] \$731 ; wire \$732 ; wire [31:0] \$733 ; wire \$734 ; wire [31:0] \$735 ; wire \$736 ; wire [31:0] \$737 ; wire \$738 ; wire [31:0] \$739 ; wire \$74 ; wire \$740 ; wire [31:0] \$741 ; wire \$742 ; wire \$743 ; wire \$744 ; wire \$745 ; wire \$746 ; wire \$747 ; wire \$748 ; wire \$749 ; wire \$75 ; wire \$750 ; wire \$751 ; wire \$752 ; wire \$753 ; wire \$754 ; wire \$755 ; wire \$756 ; wire [31:0] \$757 ; wire \$758 ; wire [31:0] \$759 ; wire \$76 ; wire \$760 ; wire [31:0] \$761 ; wire \$762 ; wire [31:0] \$763 ; wire \$764 ; wire [31:0] \$765 ; wire \$766 ; wire [31:0] \$767 ; wire \$768 ; wire [31:0] \$769 ; wire \$77 ; wire \$770 ; wire [31:0] \$771 ; wire \$772 ; wire [31:0] \$773 ; wire \$774 ; wire [31:0] \$775 ; wire \$776 ; wire [31:0] \$777 ; wire \$778 ; wire [31:0] \$779 ; wire \$78 ; wire \$780 ; wire [31:0] \$781 ; wire \$782 ; wire [31:0] \$783 ; wire \$784 ; wire \$785 ; wire \$786 ; wire \$787 ; wire \$788 ; wire \$789 ; wire [31:0] \$79 ; wire \$790 ; wire \$791 ; wire \$792 ; wire \$793 ; wire \$794 ; wire \$795 ; wire \$796 ; wire \$797 ; wire \$798 ; wire [31:0] \$799 ; wire \$8 ; wire \$80 ; wire \$800 ; wire [31:0] \$801 ; wire \$802 ; wire [31:0] \$803 ; wire \$804 ; wire [31:0] \$805 ; wire \$806 ; wire [31:0] \$807 ; wire \$808 ; wire [31:0] \$809 ; wire [31:0] \$81 ; wire \$810 ; wire [31:0] \$811 ; wire \$812 ; wire [31:0] \$813 ; wire \$814 ; wire [31:0] \$815 ; wire \$816 ; wire [31:0] \$817 ; wire \$818 ; wire [31:0] \$819 ; wire \$82 ; wire \$820 ; wire [31:0] \$821 ; wire \$822 ; wire [31:0] \$823 ; wire \$824 ; wire \$825 ; wire \$826 ; wire \$827 ; wire \$828 ; wire \$829 ; wire [31:0] \$83 ; wire \$830 ; wire \$831 ; wire \$832 ; wire \$833 ; wire \$834 ; wire \$835 ; wire \$836 ; wire \$837 ; wire [31:0] \$838 ; wire \$839 ; wire \$84 ; wire [31:0] \$840 ; wire \$841 ; wire [31:0] \$842 ; wire \$843 ; wire [31:0] \$844 ; wire \$845 ; wire [31:0] \$846 ; wire \$847 ; wire [31:0] \$848 ; wire \$849 ; wire [31:0] \$85 ; wire [31:0] \$850 ; wire \$851 ; wire [31:0] \$852 ; wire \$853 ; wire [31:0] \$854 ; wire \$855 ; wire [31:0] \$856 ; wire \$857 ; wire [31:0] \$858 ; wire \$859 ; wire \$86 ; wire [31:0] \$860 ; wire \$861 ; wire \$862 ; wire \$863 ; wire \$864 ; wire \$865 ; wire \$866 ; wire \$867 ; wire \$868 ; wire \$869 ; wire [31:0] \$87 ; wire \$870 ; wire \$871 ; wire \$872 ; wire \$873 ; wire [31:0] \$874 ; wire \$875 ; wire [31:0] \$876 ; wire \$877 ; wire [31:0] \$878 ; wire \$879 ; wire \$88 ; wire [31:0] \$880 ; wire \$881 ; wire [31:0] \$882 ; wire \$883 ; wire [31:0] \$884 ; wire \$885 ; wire [31:0] \$886 ; wire \$887 ; wire [31:0] \$888 ; wire \$889 ; wire [31:0] \$89 ; wire [31:0] \$890 ; wire \$891 ; wire [31:0] \$892 ; wire \$893 ; wire [31:0] \$894 ; wire \$895 ; wire [31:0] \$896 ; wire \$897 ; wire \$898 ; wire \$899 ; wire [31:0] \$9 ; wire \$90 ; wire \$900 ; wire \$901 ; wire \$902 ; wire \$903 ; wire \$904 ; wire \$905 ; wire \$906 ; wire \$907 ; wire \$908 ; wire \$909 ; wire [31:0] \$91 ; wire [31:0] \$910 ; wire \$911 ; wire [31:0] \$912 ; wire \$913 ; wire [31:0] \$914 ; wire \$915 ; wire [31:0] \$916 ; wire \$917 ; wire [31:0] \$918 ; wire \$919 ; wire \$92 ; wire [31:0] \$920 ; wire \$921 ; wire [31:0] \$922 ; wire \$923 ; wire [31:0] \$924 ; wire \$925 ; wire [31:0] \$926 ; wire \$927 ; wire [31:0] \$928 ; wire \$929 ; wire [31:0] \$93 ; wire [31:0] \$930 ; wire \$931 ; wire [31:0] \$932 ; wire \$933 ; wire \$934 ; wire \$935 ; wire \$936 ; wire \$937 ; wire \$938 ; wire \$939 ; wire \$94 ; wire \$940 ; wire \$941 ; wire \$942 ; wire \$943 ; wire \$944 ; wire \$945 ; wire [31:0] \$946 ; wire \$947 ; wire [31:0] \$948 ; wire \$949 ; wire [31:0] \$95 ; wire [31:0] \$950 ; wire \$951 ; wire [31:0] \$952 ; wire \$953 ; wire [31:0] \$954 ; wire \$955 ; wire [31:0] \$956 ; wire \$957 ; wire [31:0] \$958 ; wire \$959 ; wire \$96 ; wire [31:0] \$960 ; wire \$961 ; wire [31:0] \$962 ; wire \$963 ; wire [31:0] \$964 ; wire \$965 ; wire [31:0] \$966 ; wire \$967 ; wire [31:0] \$968 ; wire \$969 ; wire [31:0] \$97 ; wire [31:0] \$970 ; wire \$971 ; wire [31:0] \$972 ; wire \$973 ; wire \$974 ; wire \$975 ; wire \$976 ; wire \$977 ; wire \$978 ; wire \$979 ; wire \$98 ; wire \$980 ; wire \$981 ; wire \$982 ; wire \$983 ; wire \$984 ; wire \$985 ; wire \$986 ; wire \$987 ; wire [31:0] \$988 ; wire \$989 ; wire [31:0] \$99 ; wire [31:0] \$990 ; wire \$991 ; wire [31:0] \$992 ; wire \$993 ; wire [31:0] \$994 ; wire \$995 ; wire [31:0] \$996 ; wire \$997 ; wire [31:0] \$998 ; wire \$999 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [31:0] crc; wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [31:0] crc_reg = 32'd4294967295; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire [31:0] data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input [31:0] data_in; wire [31:0] data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:356" *) crc_reg; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$3 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$4 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$3 [6]; assign \$5 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$6 = \$4 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$5 [9]; assign \$7 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$8 = \$6 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$7 [10]; assign \$9 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$10 = \$8 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$9 [12]; assign \$11 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$12 = \$10 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$11 [16]; assign \$13 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$14 = \$12 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$13 [24]; assign \$15 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$16 = \$14 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$15 [25]; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$18 = \$16 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$17 [26]; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$20 = \$18 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$19 [28]; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$22 = \$20 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$21 [29]; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$24 = \$22 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$23 [30]; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$26 = \$24 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$25 [31]; assign \$27 = \$26 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$28 = \$27 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$29 = \$28 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$30 = \$29 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$31 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$32 = \$31 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$34 = \$33 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$35 = \$34 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$36 = \$35 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$37 = \$36 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$38 = \$37 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$39 = \$38 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$40 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$42 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$43 = \$41 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$42 [1]; assign \$44 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$45 = \$43 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$44 [6]; assign \$46 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$47 = \$45 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$46 [7]; assign \$48 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$49 = \$47 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$48 [9]; assign \$50 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$51 = \$49 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$50 [11]; assign \$52 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$53 = \$51 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$52 [12]; assign \$54 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$55 = \$53 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$54 [13]; assign \$56 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$57 = \$55 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$56 [16]; assign \$58 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$59 = \$57 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$58 [17]; assign \$60 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$61 = \$59 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$60 [24]; assign \$62 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$63 = \$61 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$62 [27]; assign \$64 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$65 = \$63 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$64 [28]; assign \$66 = \$65 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$67 = \$66 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$68 = \$67 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$69 = \$68 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$70 = \$69 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$71 = \$70 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$72 = \$71 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$73 = \$72 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$74 = \$73 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$75 = \$74 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$76 = \$75 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$77 = \$76 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$78 = \$77 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$79 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$81 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$82 = \$80 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$81 [1]; assign \$83 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$84 = \$82 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$83 [2]; assign \$85 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$86 = \$84 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$85 [6]; assign \$87 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$88 = \$86 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$87 [7]; assign \$89 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$90 = \$88 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$89 [8]; assign \$91 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$92 = \$90 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$91 [9]; assign \$93 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$94 = \$92 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$93 [13]; assign \$95 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$96 = \$94 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$95 [14]; assign \$97 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$98 = \$96 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$97 [16]; assign \$99 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$100 = \$98 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$99 [17]; assign \$101 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$102 = \$100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$101 [18]; assign \$103 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$104 = \$102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$103 [24]; assign \$105 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$106 = \$104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$105 [26]; assign \$107 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$108 = \$106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$107 [30]; assign \$109 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$110 = \$108 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$109 [31]; assign \$111 = \$110 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$112 = \$111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$113 = \$112 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$114 = \$113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$115 = \$114 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$116 = \$115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$117 = \$116 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$118 = \$117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$119 = \$118 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$120 = \$119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$121 = \$120 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$122 = \$121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$123 = \$122 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$124 = \$123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$125 = \$124 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$126 = \$125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$127 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$129 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$130 = \$128 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$129 [2]; assign \$131 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$132 = \$130 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$131 [3]; assign \$133 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$134 = \$132 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$133 [7]; assign \$135 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$136 = \$134 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$135 [8]; assign \$137 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$138 = \$136 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$137 [9]; assign \$139 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$140 = \$138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$139 [10]; assign \$141 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$142 = \$140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$141 [14]; assign \$143 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$144 = \$142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$143 [15]; assign \$145 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$146 = \$144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$145 [17]; assign \$147 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$148 = \$146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$147 [18]; assign \$149 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$150 = \$148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$149 [19]; assign \$151 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$152 = \$150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$151 [25]; assign \$153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$154 = \$152 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$153 [27]; assign \$155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$156 = \$154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$155 [31]; assign \$157 = \$156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$158 = \$157 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$159 = \$158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$160 = \$159 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$161 = \$160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$162 = \$161 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$163 = \$162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$164 = \$163 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$165 = \$164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$166 = \$165 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$167 = \$166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$168 = \$167 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$169 = \$168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$170 = \$169 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$171 = \$170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$172 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$174 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$175 = \$173 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$174 [2]; assign \$176 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$177 = \$175 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$176 [3]; assign \$178 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$179 = \$177 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$178 [4]; assign \$180 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$181 = \$179 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$180 [6]; assign \$182 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$183 = \$181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$182 [8]; assign \$184 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$185 = \$183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$184 [11]; assign \$186 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$187 = \$185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$186 [12]; assign \$188 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$189 = \$187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$188 [15]; assign \$190 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$191 = \$189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$190 [18]; assign \$192 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$193 = \$191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$192 [19]; assign \$194 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$195 = \$193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$194 [20]; assign \$196 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$197 = \$195 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$196 [24]; assign \$198 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$199 = \$197 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$198 [25]; assign \$200 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$201 = \$199 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$200 [29]; assign \$202 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$203 = \$201 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$202 [30]; assign \$204 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$205 = \$203 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$204 [31]; assign \$206 = \$205 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$207 = \$206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$208 = \$207 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$209 = \$208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$210 = \$209 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$211 = \$210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$212 = \$211 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$213 = \$212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$214 = \$213 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$215 = \$214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$216 = \$215 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$217 = \$216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$218 = \$217 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$219 = \$218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$220 = \$219 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$221 = \$220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$222 = \$221 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$223 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$225 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$226 = \$224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$225 [1]; assign \$227 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$228 = \$226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$227 [3]; assign \$229 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$230 = \$228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$229 [4]; assign \$231 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$232 = \$230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$231 [5]; assign \$233 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$234 = \$232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$233 [6]; assign \$235 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$236 = \$234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$235 [7]; assign \$237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$238 = \$236 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$237 [10]; assign \$239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$240 = \$238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$239 [13]; assign \$241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$242 = \$240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$241 [19]; assign \$243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$244 = \$242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$243 [20]; assign \$245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$246 = \$244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$245 [21]; assign \$247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$248 = \$246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$247 [24]; assign \$249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$250 = \$248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$249 [28]; assign \$251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$252 = \$250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$251 [29]; assign \$253 = \$252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$254 = \$253 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$255 = \$254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$256 = \$255 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$257 = \$256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$258 = \$257 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$259 = \$258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$260 = \$259 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$261 = \$260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$262 = \$261 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$263 = \$262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$264 = \$263 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$265 = \$264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$266 = \$265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$267 = \$266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$268 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$270 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$271 = \$269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$270 [2]; assign \$272 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$273 = \$271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$272 [4]; assign \$274 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$275 = \$273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$274 [5]; assign \$276 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$277 = \$275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$276 [6]; assign \$278 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$279 = \$277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$278 [7]; assign \$280 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$281 = \$279 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$280 [8]; assign \$282 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$283 = \$281 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$282 [11]; assign \$284 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$285 = \$283 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$284 [14]; assign \$286 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$287 = \$285 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$286 [20]; assign \$288 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$289 = \$287 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$288 [21]; assign \$290 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$291 = \$289 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$290 [22]; assign \$292 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$293 = \$291 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$292 [25]; assign \$294 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$295 = \$293 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$294 [29]; assign \$296 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$297 = \$295 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$296 [30]; assign \$298 = \$297 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$299 = \$298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$300 = \$299 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$301 = \$300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$302 = \$301 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$303 = \$302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$304 = \$303 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$305 = \$304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$306 = \$305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$307 = \$306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$308 = \$307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$309 = \$308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$310 = \$309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$311 = \$310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$312 = \$311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$313 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$315 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$316 = \$314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$315 [2]; assign \$317 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$318 = \$316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$317 [3]; assign \$319 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$320 = \$318 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$319 [5]; assign \$321 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$322 = \$320 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$321 [7]; assign \$323 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$324 = \$322 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$323 [8]; assign \$325 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$326 = \$324 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$325 [10]; assign \$327 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$328 = \$326 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$327 [15]; assign \$329 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$330 = \$328 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$329 [16]; assign \$331 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$332 = \$330 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$331 [21]; assign \$333 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$334 = \$332 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$333 [22]; assign \$335 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$336 = \$334 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$335 [23]; assign \$337 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$338 = \$336 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$337 [24]; assign \$339 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$340 = \$338 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$339 [25]; assign \$341 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$342 = \$340 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$341 [28]; assign \$343 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$344 = \$342 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$343 [29]; assign \$345 = \$344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$346 = \$345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$347 = \$346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$348 = \$347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$349 = \$348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$350 = \$349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$351 = \$350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$352 = \$351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$353 = \$352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$354 = \$353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$355 = \$354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$356 = \$355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$357 = \$356 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$358 = \$357 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$359 = \$358 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$360 = \$359 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$361 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$363 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$364 = \$362 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$363 [1]; assign \$365 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$366 = \$364 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$365 [3]; assign \$367 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$368 = \$366 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$367 [4]; assign \$369 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$370 = \$368 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$369 [8]; assign \$371 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$372 = \$370 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$371 [10]; assign \$373 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$374 = \$372 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$373 [11]; assign \$375 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$376 = \$374 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$375 [12]; assign \$377 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$378 = \$376 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$377 [17]; assign \$379 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$380 = \$378 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$379 [22]; assign \$381 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$382 = \$380 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$381 [23]; assign \$383 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$384 = \$382 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$383 [28]; assign \$385 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$386 = \$384 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$385 [31]; assign \$387 = \$386 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$388 = \$387 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$389 = \$388 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$390 = \$389 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$391 = \$390 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$392 = \$391 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$393 = \$392 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$394 = \$393 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$395 = \$394 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$396 = \$395 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$397 = \$396 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$398 = \$397 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$399 = \$398 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$400 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$402 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$403 = \$401 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$402 [2]; assign \$404 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$405 = \$403 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$404 [4]; assign \$406 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$407 = \$405 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$406 [5]; assign \$408 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$409 = \$407 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$408 [9]; assign \$410 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$411 = \$409 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$410 [11]; assign \$412 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$413 = \$411 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$412 [12]; assign \$414 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$415 = \$413 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$414 [13]; assign \$416 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$417 = \$415 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$416 [18]; assign \$418 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$419 = \$417 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$418 [23]; assign \$420 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$421 = \$419 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$420 [24]; assign \$422 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$423 = \$421 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$422 [29]; assign \$424 = \$423 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$425 = \$424 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$426 = \$425 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$427 = \$426 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$428 = \$427 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$429 = \$428 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$430 = \$429 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$431 = \$430 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$432 = \$431 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$433 = \$432 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$434 = \$433 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$435 = \$434 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$436 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$438 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$439 = \$437 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$438 [2]; assign \$440 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$441 = \$439 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$440 [3]; assign \$442 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$443 = \$441 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$442 [5]; assign \$444 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$445 = \$443 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$444 [9]; assign \$446 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$447 = \$445 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$446 [13]; assign \$448 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$449 = \$447 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$448 [14]; assign \$450 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$451 = \$449 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$450 [16]; assign \$452 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$453 = \$451 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$452 [19]; assign \$454 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$455 = \$453 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$454 [26]; assign \$456 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$457 = \$455 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$456 [28]; assign \$458 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$459 = \$457 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$458 [29]; assign \$460 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$461 = \$459 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$460 [31]; assign \$462 = \$461 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$463 = \$462 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$464 = \$463 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$465 = \$464 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$466 = \$465 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$467 = \$466 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$468 = \$467 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$469 = \$468 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$470 = \$469 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$471 = \$470 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$472 = \$471 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$473 = \$472 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$474 = \$473 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$475 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$477 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$478 = \$476 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$477 [1]; assign \$479 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$480 = \$478 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$479 [3]; assign \$481 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$482 = \$480 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$481 [4]; assign \$483 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$484 = \$482 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$483 [9]; assign \$485 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$486 = \$484 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$485 [12]; assign \$487 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$488 = \$486 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$487 [14]; assign \$489 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$490 = \$488 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$489 [15]; assign \$491 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$492 = \$490 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$491 [16]; assign \$493 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$494 = \$492 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$493 [17]; assign \$495 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$496 = \$494 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$495 [20]; assign \$497 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$498 = \$496 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$497 [24]; assign \$499 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$500 = \$498 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$499 [25]; assign \$501 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$502 = \$500 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$501 [26]; assign \$503 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$504 = \$502 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$503 [27]; assign \$505 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$506 = \$504 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$505 [28]; assign \$507 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$508 = \$506 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$507 [31]; assign \$509 = \$508 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$510 = \$509 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$511 = \$510 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$512 = \$511 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$513 = \$512 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$514 = \$513 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$515 = \$514 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$516 = \$515 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$517 = \$516 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$518 = \$517 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$519 = \$518 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$520 = \$519 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$521 = \$520 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$522 = \$521 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$523 = \$522 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$524 = \$523 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$525 = \$524 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$526 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$528 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$529 = \$527 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$528 [1]; assign \$530 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$531 = \$529 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$530 [2]; assign \$532 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$533 = \$531 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$532 [4]; assign \$534 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$535 = \$533 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$534 [5]; assign \$536 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$537 = \$535 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$536 [6]; assign \$538 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$539 = \$537 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$538 [9]; assign \$540 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$541 = \$539 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$540 [12]; assign \$542 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$543 = \$541 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$542 [13]; assign \$544 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$545 = \$543 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$544 [15]; assign \$546 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$547 = \$545 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$546 [17]; assign \$548 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$549 = \$547 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$548 [18]; assign \$550 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$551 = \$549 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$550 [21]; assign \$552 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$553 = \$551 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$552 [24]; assign \$554 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$555 = \$553 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$554 [27]; assign \$556 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$557 = \$555 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$556 [30]; assign \$558 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$559 = \$557 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$558 [31]; assign \$560 = \$559 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$561 = \$560 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$562 = \$561 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$563 = \$562 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$564 = \$563 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$565 = \$564 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$566 = \$565 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$567 = \$566 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$568 = \$567 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$569 = \$568 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$570 = \$569 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$571 = \$570 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$572 = \$571 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$573 = \$572 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$574 = \$573 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$575 = \$574 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$576 = \$575 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$577 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$579 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$580 = \$578 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$579 [2]; assign \$581 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$582 = \$580 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$581 [3]; assign \$583 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$584 = \$582 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$583 [5]; assign \$585 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$586 = \$584 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$585 [6]; assign \$587 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$588 = \$586 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$587 [7]; assign \$589 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$590 = \$588 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$589 [10]; assign \$591 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$592 = \$590 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$591 [13]; assign \$593 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$594 = \$592 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$593 [14]; assign \$595 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$596 = \$594 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$595 [16]; assign \$597 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$598 = \$596 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$597 [18]; assign \$599 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$600 = \$598 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$599 [19]; assign \$601 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$602 = \$600 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$601 [22]; assign \$603 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$604 = \$602 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$603 [25]; assign \$605 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$606 = \$604 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$605 [28]; assign \$607 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$608 = \$606 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$607 [31]; assign \$609 = \$608 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$610 = \$609 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$611 = \$610 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$612 = \$611 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$613 = \$612 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$614 = \$613 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$615 = \$614 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$616 = \$615 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$617 = \$616 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$618 = \$617 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$619 = \$618 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$620 = \$619 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$621 = \$620 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$622 = \$621 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$623 = \$622 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$624 = \$623 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$625 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$627 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$628 = \$626 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$627 [3]; assign \$629 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$630 = \$628 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$629 [4]; assign \$631 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$632 = \$630 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$631 [6]; assign \$633 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$634 = \$632 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$633 [7]; assign \$635 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$636 = \$634 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$635 [8]; assign \$637 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$638 = \$636 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$637 [11]; assign \$639 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$640 = \$638 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$639 [14]; assign \$641 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$642 = \$640 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$641 [15]; assign \$643 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$644 = \$642 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$643 [17]; assign \$645 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$646 = \$644 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$645 [19]; assign \$647 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$648 = \$646 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$647 [20]; assign \$649 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$650 = \$648 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$649 [23]; assign \$651 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$652 = \$650 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$651 [26]; assign \$653 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$654 = \$652 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$653 [29]; assign \$655 = \$654 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$656 = \$655 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$657 = \$656 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$658 = \$657 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$659 = \$658 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$660 = \$659 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$661 = \$660 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$662 = \$661 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$663 = \$662 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$664 = \$663 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$665 = \$664 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$666 = \$665 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$667 = \$666 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$668 = \$667 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$669 = \$668 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$670 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$672 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$673 = \$671 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$672 [4]; assign \$674 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$675 = \$673 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$674 [5]; assign \$676 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$677 = \$675 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$676 [7]; assign \$678 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$679 = \$677 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$678 [8]; assign \$680 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$681 = \$679 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$680 [9]; assign \$682 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$683 = \$681 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$682 [12]; assign \$684 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$685 = \$683 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$684 [15]; assign \$686 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$687 = \$685 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$686 [16]; assign \$688 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$689 = \$687 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$688 [18]; assign \$690 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$691 = \$689 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$690 [20]; assign \$692 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$693 = \$691 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$692 [21]; assign \$694 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$695 = \$693 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$694 [24]; assign \$696 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$697 = \$695 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$696 [27]; assign \$698 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$699 = \$697 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$698 [30]; assign \$700 = \$699 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$701 = \$700 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$702 = \$701 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$703 = \$702 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$704 = \$703 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$705 = \$704 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$706 = \$705 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$707 = \$706 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$708 = \$707 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$709 = \$708 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$710 = \$709 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$711 = \$710 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$712 = \$711 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$713 = \$712 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$714 = \$713 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$715 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$717 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$718 = \$716 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$717 [4]; assign \$719 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$720 = \$718 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$719 [5]; assign \$721 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$722 = \$720 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$721 [8]; assign \$723 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$724 = \$722 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$723 [12]; assign \$725 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$726 = \$724 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$725 [13]; assign \$727 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$728 = \$726 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$727 [17]; assign \$729 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$730 = \$728 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$729 [19]; assign \$731 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$732 = \$730 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$731 [21]; assign \$733 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$734 = \$732 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$733 [22]; assign \$735 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$736 = \$734 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$735 [24]; assign \$737 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$738 = \$736 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$737 [26]; assign \$739 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$740 = \$738 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$739 [29]; assign \$741 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$742 = \$740 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$741 [30]; assign \$743 = \$742 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$744 = \$743 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$745 = \$744 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$746 = \$745 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$747 = \$746 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$748 = \$747 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$749 = \$748 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$750 = \$749 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$751 = \$750 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$752 = \$751 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$753 = \$752 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$754 = \$753 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$755 = \$754 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$756 = \$755 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$757 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$759 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$760 = \$758 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$759 [5]; assign \$761 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$762 = \$760 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$761 [6]; assign \$763 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$764 = \$762 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$763 [9]; assign \$765 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$766 = \$764 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$765 [13]; assign \$767 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$768 = \$766 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$767 [14]; assign \$769 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$770 = \$768 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$769 [18]; assign \$771 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$772 = \$770 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$771 [20]; assign \$773 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$774 = \$772 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$773 [22]; assign \$775 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$776 = \$774 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$775 [23]; assign \$777 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$778 = \$776 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$777 [25]; assign \$779 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$780 = \$778 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$779 [27]; assign \$781 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$782 = \$780 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$781 [30]; assign \$783 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$784 = \$782 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$783 [31]; assign \$785 = \$784 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$786 = \$785 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$787 = \$786 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$788 = \$787 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$789 = \$788 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$790 = \$789 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$791 = \$790 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$792 = \$791 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$793 = \$792 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$794 = \$793 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$795 = \$794 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$796 = \$795 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$797 = \$796 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$798 = \$797 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$799 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$801 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$802 = \$800 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$801 [6]; assign \$803 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$804 = \$802 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$803 [7]; assign \$805 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$806 = \$804 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$805 [10]; assign \$807 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$808 = \$806 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$807 [14]; assign \$809 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$810 = \$808 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$809 [15]; assign \$811 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$812 = \$810 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$811 [19]; assign \$813 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$814 = \$812 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$813 [21]; assign \$815 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$816 = \$814 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$815 [23]; assign \$817 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$818 = \$816 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$817 [24]; assign \$819 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$820 = \$818 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$819 [26]; assign \$821 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$822 = \$820 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$821 [28]; assign \$823 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$824 = \$822 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$823 [31]; assign \$825 = \$824 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$826 = \$825 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$827 = \$826 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$828 = \$827 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$829 = \$828 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$830 = \$829 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$831 = \$830 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$832 = \$831 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$833 = \$832 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$834 = \$833 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$835 = \$834 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$836 = \$835 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$837 = \$836 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$838 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$840 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$841 = \$839 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$840 [7]; assign \$842 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$843 = \$841 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$842 [8]; assign \$844 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$845 = \$843 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$844 [11]; assign \$846 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$847 = \$845 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$846 [15]; assign \$848 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$849 = \$847 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$848 [16]; assign \$850 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$851 = \$849 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$850 [20]; assign \$852 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$853 = \$851 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$852 [22]; assign \$854 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$855 = \$853 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$854 [24]; assign \$856 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$857 = \$855 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$856 [25]; assign \$858 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$859 = \$857 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$858 [27]; assign \$860 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$861 = \$859 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$860 [29]; assign \$862 = \$861 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$863 = \$862 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$864 = \$863 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$865 = \$864 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$866 = \$865 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$867 = \$866 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$868 = \$867 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$869 = \$868 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$870 = \$869 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$871 = \$870 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$872 = \$871 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$873 = \$872 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$874 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$876 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$877 = \$875 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$876 [8]; assign \$878 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$879 = \$877 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$878 [9]; assign \$880 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$881 = \$879 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$880 [12]; assign \$882 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$883 = \$881 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$882 [16]; assign \$884 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$885 = \$883 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$884 [17]; assign \$886 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$887 = \$885 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$886 [21]; assign \$888 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$889 = \$887 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$888 [23]; assign \$890 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$891 = \$889 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$890 [25]; assign \$892 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$893 = \$891 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$892 [26]; assign \$894 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$895 = \$893 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$894 [28]; assign \$896 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$897 = \$895 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$896 [30]; assign \$898 = \$897 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$899 = \$898 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$900 = \$899 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$901 = \$900 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$902 = \$901 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$903 = \$902 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$904 = \$903 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$905 = \$904 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$906 = \$905 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$907 = \$906 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$908 = \$907 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$909 = \$908 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$910 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$912 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$913 = \$911 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$912 [9]; assign \$914 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$915 = \$913 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$914 [10]; assign \$916 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$917 = \$915 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$916 [13]; assign \$918 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$919 = \$917 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$918 [17]; assign \$920 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$921 = \$919 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$920 [18]; assign \$922 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$923 = \$921 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$922 [22]; assign \$924 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$925 = \$923 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$924 [24]; assign \$926 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$927 = \$925 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$926 [26]; assign \$928 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$929 = \$927 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$928 [27]; assign \$930 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$931 = \$929 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$930 [29]; assign \$932 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$933 = \$931 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$932 [31]; assign \$934 = \$933 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$935 = \$934 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$936 = \$935 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$937 = \$936 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$938 = \$937 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$939 = \$938 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$940 = \$939 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$941 = \$940 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$942 = \$941 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$943 = \$942 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$944 = \$943 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$945 = \$944 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$946 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$948 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$949 = \$947 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$948 [9]; assign \$950 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$951 = \$949 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$950 [11]; assign \$952 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$953 = \$951 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$952 [12]; assign \$954 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$955 = \$953 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$954 [14]; assign \$956 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$957 = \$955 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$956 [16]; assign \$958 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$959 = \$957 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$958 [18]; assign \$960 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$961 = \$959 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$960 [19]; assign \$962 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$963 = \$961 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$962 [23]; assign \$964 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$965 = \$963 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$964 [24]; assign \$966 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$967 = \$965 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$966 [26]; assign \$968 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$969 = \$967 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$968 [27]; assign \$970 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$971 = \$969 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$970 [29]; assign \$972 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$973 = \$971 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$972 [31]; assign \$974 = \$973 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$975 = \$974 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$976 = \$975 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$977 = \$976 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$978 = \$977 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$979 = \$978 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$980 = \$979 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$981 = \$980 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$982 = \$981 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$983 = \$982 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$984 = \$983 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$985 = \$984 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$986 = \$985 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$987 = \$986 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$988 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$990 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$991 = \$989 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$990 [1]; assign \$992 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$993 = \$991 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$992 [6]; assign \$994 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$995 = \$993 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$994 [9]; assign \$996 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$997 = \$995 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$996 [13]; assign \$998 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$999 = \$997 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$998 [15]; assign \$1000 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1001 = \$999 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1000 [16]; assign \$1002 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1003 = \$1001 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1002 [17]; assign \$1004 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1005 = \$1003 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1004 [19]; assign \$1006 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1007 = \$1005 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1006 [20]; assign \$1008 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1009 = \$1007 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1008 [26]; assign \$1010 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1011 = \$1009 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1010 [27]; assign \$1012 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1013 = \$1011 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1012 [29]; assign \$1014 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1015 = \$1013 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1014 [31]; assign \$1016 = \$1015 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1017 = \$1016 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1018 = \$1017 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1019 = \$1018 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1020 = \$1019 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1021 = \$1020 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1022 = \$1021 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1023 = \$1022 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1024 = \$1023 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1025 = \$1024 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1026 = \$1025 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1027 = \$1026 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1028 = \$1027 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1029 = \$1028 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1030 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1032 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1033 = \$1031 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1032 [2]; assign \$1034 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1035 = \$1033 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1034 [7]; assign \$1036 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1037 = \$1035 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1036 [10]; assign \$1038 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1039 = \$1037 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1038 [14]; assign \$1040 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1041 = \$1039 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1040 [16]; assign \$1042 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1043 = \$1041 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1042 [17]; assign \$1044 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1045 = \$1043 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1044 [18]; assign \$1046 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1047 = \$1045 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1046 [20]; assign \$1048 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1049 = \$1047 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1048 [21]; assign \$1050 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1051 = \$1049 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1050 [27]; assign \$1052 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1053 = \$1051 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1052 [28]; assign \$1054 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1055 = \$1053 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1054 [30]; assign \$1056 = \$1055 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1057 = \$1056 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1058 = \$1057 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1059 = \$1058 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1060 = \$1059 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1061 = \$1060 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1062 = \$1061 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1063 = \$1062 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1064 = \$1063 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1065 = \$1064 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1066 = \$1065 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1067 = \$1066 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1068 = \$1067 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1069 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1071 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1072 = \$1070 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1071 [3]; assign \$1073 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1074 = \$1072 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1073 [8]; assign \$1075 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1076 = \$1074 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1075 [11]; assign \$1077 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1078 = \$1076 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1077 [15]; assign \$1079 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1080 = \$1078 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1079 [17]; assign \$1081 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1082 = \$1080 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1081 [18]; assign \$1083 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1084 = \$1082 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1083 [19]; assign \$1085 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1086 = \$1084 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1085 [21]; assign \$1087 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1088 = \$1086 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1087 [22]; assign \$1089 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1090 = \$1088 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1089 [28]; assign \$1091 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1092 = \$1090 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1091 [29]; assign \$1093 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1094 = \$1092 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1093 [31]; assign \$1095 = \$1094 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1096 = \$1095 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1097 = \$1096 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1098 = \$1097 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1099 = \$1098 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1100 = \$1099 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1101 = \$1100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1102 = \$1101 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1103 = \$1102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1104 = \$1103 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1105 = \$1104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1106 = \$1105 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1107 = \$1106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1108 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1110 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1111 = \$1109 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1110 [3]; assign \$1112 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1113 = \$1111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1112 [4]; assign \$1114 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1115 = \$1113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1114 [6]; assign \$1116 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1117 = \$1115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1116 [10]; assign \$1118 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1119 = \$1117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1118 [18]; assign \$1120 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1121 = \$1119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1120 [19]; assign \$1122 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1123 = \$1121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1122 [20]; assign \$1124 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1125 = \$1123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1124 [22]; assign \$1126 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1127 = \$1125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1126 [23]; assign \$1128 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1129 = \$1127 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1128 [24]; assign \$1130 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1131 = \$1129 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1130 [25]; assign \$1132 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1133 = \$1131 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1132 [26]; assign \$1134 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1135 = \$1133 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1134 [28]; assign \$1136 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1137 = \$1135 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1136 [31]; assign \$1138 = \$1137 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1139 = \$1138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1140 = \$1139 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1141 = \$1140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1142 = \$1141 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1143 = \$1142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1144 = \$1143 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1145 = \$1144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1146 = \$1145 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1147 = \$1146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1148 = \$1147 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1149 = \$1148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1150 = \$1149 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1151 = \$1150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1152 = \$1151 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1156 = \$1154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1155 [4]; assign \$1157 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1158 = \$1156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1157 [5]; assign \$1159 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1160 = \$1158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1159 [7]; assign \$1161 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1162 = \$1160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1161 [11]; assign \$1163 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1164 = \$1162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1163 [19]; assign \$1165 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1166 = \$1164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1165 [20]; assign \$1167 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1168 = \$1166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1167 [21]; assign \$1169 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1170 = \$1168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1169 [23]; assign \$1171 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1172 = \$1170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1171 [24]; assign \$1173 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1174 = \$1172 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1173 [25]; assign \$1175 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1176 = \$1174 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1175 [26]; assign \$1177 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1178 = \$1176 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1177 [27]; assign \$1179 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1180 = \$1178 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1179 [29]; assign \$1181 = \$1180 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1182 = \$1181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1183 = \$1182 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1184 = \$1183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1185 = \$1184 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1186 = \$1185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1187 = \$1186 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1188 = \$1187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1189 = \$1188 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1190 = \$1189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1191 = \$1190 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1192 = \$1191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1193 = \$1192 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1194 = \$1193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1195 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1197 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1198 = \$1196 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1197 [5]; assign \$1199 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1200 = \$1198 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1199 [6]; assign \$1201 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1202 = \$1200 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1201 [8]; assign \$1203 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1204 = \$1202 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1203 [12]; assign \$1205 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1206 = \$1204 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1205 [20]; assign \$1207 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1208 = \$1206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1207 [21]; assign \$1209 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1210 = \$1208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1209 [22]; assign \$1211 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1212 = \$1210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1211 [24]; assign \$1213 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1214 = \$1212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1213 [25]; assign \$1215 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1216 = \$1214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1215 [26]; assign \$1217 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1218 = \$1216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1217 [27]; assign \$1219 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1220 = \$1218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1219 [28]; assign \$1221 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1222 = \$1220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1221 [30]; assign \$1223 = \$1222 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1224 = \$1223 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1225 = \$1224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1226 = \$1225 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1227 = \$1226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$1228 = \$1227 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1229 = \$1228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1230 = \$1229 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1231 = \$1230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1232 = \$1231 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1233 = \$1232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1234 = \$1233 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1235 = \$1234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1236 = \$1235 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1240 = \$1238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1239 [6]; assign \$1241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1242 = \$1240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1241 [7]; assign \$1243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1244 = \$1242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1243 [9]; assign \$1245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1246 = \$1244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1245 [13]; assign \$1247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1248 = \$1246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1247 [21]; assign \$1249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1250 = \$1248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1249 [22]; assign \$1251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1252 = \$1250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1251 [23]; assign \$1253 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1254 = \$1252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1253 [25]; assign \$1255 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1256 = \$1254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1255 [26]; assign \$1257 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1258 = \$1256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1257 [27]; assign \$1259 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1260 = \$1258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1259 [28]; assign \$1261 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1262 = \$1260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1261 [29]; assign \$1263 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1264 = \$1262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1263 [31]; assign \$1265 = \$1264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1266 = \$1265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1267 = \$1266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1268 = \$1267 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1269 = \$1268 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1270 = \$1269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1271 = \$1270 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1272 = \$1271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1273 = \$1272 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1274 = \$1273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1275 = \$1274 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1276 = \$1275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1277 = \$1276 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1278 = \$1277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1279 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1281 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1282 = \$1280 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1281 [7]; assign \$1283 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1284 = \$1282 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1283 [8]; assign \$1285 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1286 = \$1284 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1285 [10]; assign \$1287 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1288 = \$1286 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1287 [14]; assign \$1289 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1290 = \$1288 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1289 [22]; assign \$1291 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1292 = \$1290 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1291 [23]; assign \$1293 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1294 = \$1292 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1293 [24]; assign \$1295 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1296 = \$1294 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1295 [26]; assign \$1297 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1298 = \$1296 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1297 [27]; assign \$1299 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1300 = \$1298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1299 [28]; assign \$1301 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1302 = \$1300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1301 [29]; assign \$1303 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1304 = \$1302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1303 [30]; assign \$1305 = \$1304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1306 = \$1305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1307 = \$1306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1308 = \$1307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1309 = \$1308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1310 = \$1309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1311 = \$1310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1312 = \$1311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1313 = \$1312 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1314 = \$1313 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1315 = \$1314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1316 = \$1315 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1317 = \$1316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1318 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1320 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1321 = \$1319 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1320 [8]; assign \$1322 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1323 = \$1321 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1322 [9]; assign \$1324 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1325 = \$1323 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1324 [11]; assign \$1326 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1327 = \$1325 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1326 [15]; assign \$1328 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1329 = \$1327 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1328 [23]; assign \$1330 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1331 = \$1329 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1330 [24]; assign \$1332 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1333 = \$1331 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1332 [25]; assign \$1334 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1335 = \$1333 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1334 [27]; assign \$1336 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1337 = \$1335 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1336 [28]; assign \$1338 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1339 = \$1337 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1338 [29]; assign \$1340 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1341 = \$1339 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1340 [30]; assign \$1342 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1343 = \$1341 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1342 [31]; assign \$1344 = \$1343 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1345 = \$1344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1346 = \$1345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1347 = \$1346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1348 = \$1347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1349 = \$1348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1350 = \$1349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1351 = \$1350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1352 = \$1351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1353 = \$1352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1354 = \$1353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1355 = \$1354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1356 = \$1355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_reg <= 32'd4294967295; else crc_reg <= \$1357 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$22 ) begin end \$1357 = crc_reg; if (valid) begin \$1357 [0] = \$39 ; \$1357 [1] = \$78 ; \$1357 [2] = \$126 ; \$1357 [3] = \$171 ; \$1357 [4] = \$222 ; \$1357 [5] = \$267 ; \$1357 [6] = \$312 ; \$1357 [7] = \$360 ; \$1357 [8] = \$399 ; \$1357 [9] = \$435 ; \$1357 [10] = \$474 ; \$1357 [11] = \$525 ; \$1357 [12] = \$576 ; \$1357 [13] = \$624 ; \$1357 [14] = \$669 ; \$1357 [15] = \$714 ; \$1357 [16] = \$756 ; \$1357 [17] = \$798 ; \$1357 [18] = \$837 ; \$1357 [19] = \$873 ; \$1357 [20] = \$909 ; \$1357 [21] = \$945 ; \$1357 [22] = \$987 ; \$1357 [23] = \$1029 ; \$1357 [24] = \$1068 ; \$1357 [25] = \$1107 ; \$1357 [26] = \$1152 ; \$1357 [27] = \$1194 ; \$1357 [28] = \$1236 ; \$1357 [29] = \$1278 ; \$1357 [30] = \$1317 ; \$1357 [31] = \$1356 ; end else if (start) begin \$1357 = 32'd4294967295; end end assign data = data_in; assign crc = crc_reg; assign \$2 = \$1 [0]; assign \$41 = \$40 [0]; assign \$80 = \$79 [0]; assign \$128 = \$127 [1]; assign \$173 = \$172 [0]; assign \$224 = \$223 [0]; assign \$269 = \$268 [1]; assign \$314 = \$313 [0]; assign \$362 = \$361 [0]; assign \$401 = \$400 [1]; assign \$437 = \$436 [0]; assign \$476 = \$475 [0]; assign \$527 = \$526 [0]; assign \$578 = \$577 [1]; assign \$626 = \$625 [2]; assign \$671 = \$670 [3]; assign \$716 = \$715 [0]; assign \$758 = \$757 [1]; assign \$800 = \$799 [2]; assign \$839 = \$838 [3]; assign \$875 = \$874 [4]; assign \$911 = \$910 [5]; assign \$947 = \$946 [0]; assign \$989 = \$988 [0]; assign \$1031 = \$1030 [1]; assign \$1070 = \$1069 [2]; assign \$1109 = \$1108 [0]; assign \$1154 = \$1153 [1]; assign \$1196 = \$1195 [2]; assign \$1238 = \$1237 [3]; assign \$1280 = \$1279 [4]; assign \$1319 = \$1318 [5]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:81" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_B_shift_dma_6 (sync_100_rst, read_bram_address_input, write_bram_address_input, read_node_address_input, write_node_address_input, data_input, read_complete_input, write_complete_input, bram_read_data, write_bram_address_output, read_bram_address_output, write_node_address_output, read_node_address_output, write_complete_output, data_output, read_complete_output, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$23 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; reg \$15 ; reg [31:0] \$16 ; reg \$17 ; reg \$18 ; wire \$2 ; wire \$3 ; wire \$4 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) output [15:0] bram_address; reg [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) input [31:0] bram_read_data; wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) output [31:0] bram_write_data; reg [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) output bram_write_enable; reg bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) reg [31:0] buf_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) reg [15:0] buf_read_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) reg buf_read_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) reg [7:0] buf_read_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) reg [15:0] buf_write_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) reg buf_write_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) reg [7:0] buf_write_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) input [31:0] data_input; wire [31:0] data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) output [31:0] data_output; reg [31:0] data_output = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) input [15:0] read_bram_address_input; wire [15:0] read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) output [15:0] read_bram_address_output; reg [15:0] read_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) input read_complete_input; wire read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) output read_complete_output; reg read_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) reg read_next = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) input [7:0] read_node_address_input; wire [7:0] read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) output [7:0] read_node_address_output; reg [7:0] read_node_address_output = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) input [15:0] write_bram_address_input; wire [15:0] write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) output [15:0] write_bram_address_output; reg [15:0] write_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) input write_complete_input; wire write_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) output write_complete_output; reg write_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) input [7:0] write_node_address_input; wire [7:0] write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) output [7:0] write_node_address_output; reg [7:0] write_node_address_output = 8'h00; assign \$1 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 3'h6; assign \$2 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$3 = \$1 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$2 ; assign \$4 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 3'h6; assign \$5 = \$4 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$6 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$7 = \$5 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$6 ; assign \$8 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 3'h6; assign \$9 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$10 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$9 ; assign \$11 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 3'h6; assign \$12 = \$11 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$13 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$13 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_bram_address <= 16'h0000; else buf_write_bram_address <= write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_bram_address <= 16'h0000; else buf_read_bram_address <= read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_node_address <= 8'h00; else buf_write_node_address <= write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_node_address <= 8'h00; else buf_read_node_address <= read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_bram_address_output <= 16'h0000; else write_bram_address_output <= buf_write_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_bram_address_output <= 16'h0000; else read_bram_address_output <= buf_read_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_node_address_output <= 8'h00; else write_node_address_output <= buf_write_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_node_address_output <= 8'h00; else read_node_address_output <= buf_read_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_data <= 32'd0; else buf_data <= data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_complete <= 1'h0; else buf_read_complete <= read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_complete_output <= 1'h0; else write_complete_output <= buf_write_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_next <= 1'h0; else read_next <= \$15 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_output <= 32'd0; else data_output <= \$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_complete_output <= 1'h0; else read_complete_output <= \$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_complete <= 1'h0; else buf_write_complete <= \$18 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$23 ) begin end \$15 = read_next; if (\$3 ) begin \$15 = 1'h1; end else if (read_next) begin \$15 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$23 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$16 = bram_read_data; end else begin \$16 = buf_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$23 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$17 = 1'h1; end else begin \$17 = buf_read_complete; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$23 ) begin end (* full_case = 32'd1 *) if (\$7 ) begin \$18 = 1'h1; end else begin \$18 = write_complete_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$23 ) begin end bram_address = 16'h0000; if (\$10 ) begin bram_address = read_bram_address_input; end if (\$14 ) begin bram_address = write_bram_address_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$23 ) begin end bram_write_data = 32'd0; if (\$14 ) begin bram_write_data = data_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$23 ) begin end (* full_case = 32'd1 *) if (\$14 ) begin bram_write_enable = 1'h1; end else begin bram_write_enable = 1'h0; end end endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:104" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_C (sync_100_rst, rx, \bram_read_data$40 , tx, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$24 = 0; wire [5:0] \$1 ; wire [34:0] \$10 ; wire \$100 ; wire \$101 ; wire [4:0] \$102 ; wire [16:0] \$103 ; wire [3:0] \$104 ; wire [4:0] \$105 ; wire [5:0] \$106 ; wire \$107 ; wire \$108 ; wire \$109 ; wire \$11 ; wire \$110 ; wire \$111 ; wire \$112 ; wire \$113 ; wire \$114 ; wire \$115 ; wire [3:0] \$116 ; wire \$117 ; wire [5:0] \$118 ; wire [4:0] \$119 ; wire \$12 ; wire [31:0] \$120 ; wire [3:0] \$121 ; wire [6:0] \$122 ; wire [31:0] \$123 ; wire [31:0] \$124 ; wire [3:0] \$125 ; wire \$126 ; wire [3:0] \$127 ; wire [3:0] \$128 ; wire [4:0] \$129 ; wire \$13 ; wire [4:0] \$130 ; wire [31:0] \$131 ; wire [3:0] \$132 ; wire [6:0] \$133 ; wire [31:0] \$134 ; wire [31:0] \$135 ; wire [3:0] \$136 ; wire [4:0] \$137 ; wire [3:0] \$138 ; wire [5:0] \$139 ; wire \$14 ; wire [3:0] \$140 ; wire [4:0] \$141 ; wire [5:0] \$142 ; wire [8:0] \$143 ; wire [31:0] \$144 ; wire [31:0] \$145 ; wire [3:0] \$146 ; wire [6:0] \$147 ; wire [158:0] \$148 ; wire [158:0] \$149 ; wire \$15 ; wire \$150 ; wire \$151 ; wire [8:0] \$152 ; reg [15:0] \$153 ; reg \$154 ; reg [15:0] \$155 ; reg \$156 ; reg \$157 ; reg \$158 ; reg \$159 ; wire \$16 ; reg \$160 ; reg \$161 ; reg \$162 ; reg \$163 ; reg [31:0] \$164 ; reg \$165 ; reg [4:0] \$166 ; reg \$167 ; reg \$168 ; reg \$169 ; wire \$17 ; reg [7:0] \$170 ; reg [7:0] \$171 ; reg [7:0] \$172 ; reg [1:0] \$173 ; reg [1:0] \$174 ; reg [2:0] \$175 ; reg [2:0] \$176 ; reg [2:0] \$177 ; reg [3:0] \$178 ; reg [15:0] \$179 ; wire [3:0] \$18 ; reg \$180 ; reg [3:0] \$181 ; reg [3:0] \$182 ; reg \$183 ; reg [15:0] \$184 ; reg [2:0] \$185 ; reg [1:0] \$186 ; reg [31:0] \$187 ; reg [3:0] \$188 ; reg [31:0] \$189 ; wire \$19 ; reg [31:0] \$190 ; reg [31:0] \$191 ; reg \$192 ; wire [6:0] \$2 ; wire \$20 ; wire \$21 ; wire \$22 ; wire \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire [31:0] \$3 ; wire \$30 ; wire \$31 ; wire \$32 ; wire \$33 ; wire \$34 ; wire \$35 ; wire \$36 ; wire \$37 ; wire \$38 ; wire \$39 ; wire [1:0] \$4 ; wire \$40 ; wire \$41 ; wire \$42 ; wire \$43 ; wire \$44 ; wire \$45 ; wire \$46 ; wire \$47 ; wire \$48 ; wire \$49 ; wire [1:0] \$5 ; wire \$50 ; wire \$51 ; wire [37:0] \$52 ; wire \$53 ; wire \$54 ; wire \$55 ; wire \$56 ; wire \$57 ; wire \$58 ; wire \$59 ; wire [1:0] \$6 ; wire [4:0] \$60 ; wire [4:0] \$61 ; wire [8:0] \$62 ; wire [4:0] \$63 ; wire [4:0] \$64 ; wire [5:0] \$65 ; wire \$66 ; wire \$67 ; wire \$68 ; wire \$69 ; wire [34:0] \$7 ; wire \$70 ; wire [3:0] \$71 ; wire [3:0] \$72 ; wire \$73 ; wire [62:0] \$74 ; wire [62:0] \$75 ; wire [3:0] \$76 ; wire [6:0] \$77 ; wire [31:0] \$78 ; wire [3:0] \$79 ; wire [34:0] \$8 ; wire [3:0] \$80 ; wire [4:0] \$81 ; wire [62:0] \$82 ; wire [62:0] \$83 ; wire \$84 ; wire \$85 ; wire [4:0] \$86 ; wire [5:0] \$87 ; wire [3:0] \$88 ; wire \$89 ; wire [34:0] \$9 ; wire \$90 ; wire [4:0] \$91 ; wire [5:0] \$92 ; wire \$93 ; wire \$94 ; wire [4:0] \$95 ; wire [16:0] \$96 ; wire \$97 ; wire \$98 ; wire \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:146" *) reg [31:0] bit_time = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:33" *) input [15:0] bram_address; wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) reg [15:0] \bram_address$84 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:267" *) reg bram_control_mode = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:268" *) reg bram_control_mode_comb; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:34" *) wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:35" *) output [31:0] \bram_read_data$40 ; reg [31:0] \bram_read_data$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:34" *) input [31:0] bram_write_data; wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) reg [31:0] \bram_write_data$85 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:36" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) reg \bram_write_enable$83 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:441" *) reg [3:0] bytes_used; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [4:0] controller_fsm_state = 5'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:176" *) reg [2:0] current_cyclic_register = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:158" *) reg [7:0] current_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:159" *) reg [7:0] current_enabled_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:167" *) reg [1:0] current_rx_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:168" *) reg [2:0] current_rx_word_index = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:219" *) wire [4:0] current_tx_bit_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:166" *) reg [1:0] current_tx_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:169" *) reg [2:0] current_tx_word_index = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:183" *) reg cyclic_data_enabled = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:189" *) wire [2:0] cyclic_read_data_size; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:190" *) wire [1:0] cyclic_read_data_starting_byte_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:178" *) reg [2:0] cyclic_register_size = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:180" *) wire [4:0] cyclic_register_starting_bit_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:179" *) reg [1:0] cyclic_register_starting_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:191" *) wire [2:0] cyclic_write_data_size; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:192" *) wire [1:0] cyclic_write_data_starting_byte_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:99" *) wire [7:0] debugPins; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:62" *) wire [7:0] \debugPins$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:100" *) reg [4:0] debugPins_fsm; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [5:0] externalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] externalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [5:0] externalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] externalWritePort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg externalWritePort__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_rx_register_config_first_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_rx_register_config_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_tx_device_config_wait_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:134" *) reg [15:0] internalBramAddress = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:135" *) wire [31:0] internalBramReadData; (* init = 32'd0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:136" *) wire [31:0] internalBramWriteData; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:137" *) wire internalBramWriteEnable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [5:0] internalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] internalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [5:0] internalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] internalWritePort__data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg internalWritePort__en = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:222" *) wire [31:0] internal_read_port_masked_bytes; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:291" *) reg [15:0] last_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:160" *) reg [7:0] last_enabled_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:445" *) reg [2:0] offset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:172" *) reg [15:0] pre_timer = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:164" *) reg [3:0] previous_rx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) wire \rx$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:184" *) reg rx_cyclic_data_enabled = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:156" *) reg [31:0] rx_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:95" *) reg rx_invalid_crc_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:97" *) reg rx_no_response_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:96" *) reg rx_not_finished_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:163" *) reg [3:0] rx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:225" *) wire [31:0] serial_port_control_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:237" *) wire serial_port_rx_busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:238" *) wire serial_port_rx_crc_valid; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:235" *) wire serial_port_rx_done; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:227" *) reg serial_port_rx_trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:236" *) wire serial_port_tx_busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:234" *) wire serial_port_tx_done; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:226" *) reg serial_port_tx_trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg start_rx_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:145" *) reg start_transfers = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:171" *) reg [3:0] timer = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) output tx; wire tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) wire \tx$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:155" *) reg [31:0] tx_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:162" *) reg [3:0] tx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:147" *) reg update_busy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:148" *) reg update_done = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:149" *) reg update_error = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:173" *) reg update_word_time = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:206" *) reg use_future_device_bram; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:207" *) reg use_previous_device_bram; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg wait_for_final_rx_packet_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg wait_tx_start_read_status_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:174" *) reg [15:0] word_time = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:126" *) reg [31:0] memory [63:0]; initial begin memory[0] = 32'd0; memory[1] = 32'd0; memory[2] = 32'd0; memory[3] = 32'd0; memory[4] = 32'd0; memory[5] = 32'd0; memory[6] = 32'd0; memory[7] = 32'd0; memory[8] = 32'd0; memory[9] = 32'd0; memory[10] = 32'd0; memory[11] = 32'd0; memory[12] = 32'd0; memory[13] = 32'd0; memory[14] = 32'd0; memory[15] = 32'd0; memory[16] = 32'd0; memory[17] = 32'd0; memory[18] = 32'd0; memory[19] = 32'd0; memory[20] = 32'd0; memory[21] = 32'd0; memory[22] = 32'd0; memory[23] = 32'd0; memory[24] = 32'd0; memory[25] = 32'd0; memory[26] = 32'd0; memory[27] = 32'd0; memory[28] = 32'd0; memory[29] = 32'd0; memory[30] = 32'd0; memory[31] = 32'd0; memory[32] = 32'd0; memory[33] = 32'd0; memory[34] = 32'd0; memory[35] = 32'd0; memory[36] = 32'd0; memory[37] = 32'd0; memory[38] = 32'd0; memory[39] = 32'd0; memory[40] = 32'd0; memory[41] = 32'd0; memory[42] = 32'd0; memory[43] = 32'd0; memory[44] = 32'd0; memory[45] = 32'd0; memory[46] = 32'd0; memory[47] = 32'd0; memory[48] = 32'd0; memory[49] = 32'd0; memory[50] = 32'd0; memory[51] = 32'd0; memory[52] = 32'd0; memory[53] = 32'd0; memory[54] = 32'd0; memory[55] = 32'd0; memory[56] = 32'd0; memory[57] = 32'd0; memory[58] = 32'd0; memory[59] = 32'd0; memory[60] = 32'd0; memory[61] = 32'd0; memory[62] = 32'd0; memory[63] = 32'd0; end always @(posedge sync_100_clk) begin if (externalWritePort__en) memory[bram_address[5:0]] <= externalWritePort__data; end always @(posedge sync_100_clk) begin if (internalWritePort__en) memory[internalBramAddress[5:0]] <= internalWritePort__data; end reg [31:0] _0_; reg [31:0] _1_; always @(posedge sync_100_clk) begin _0_ <= memory[internalBramAddress[5:0]]; _1_ <= memory[bram_address[5:0]]; end assign internalBramReadData = _0_; assign externalReadPort__data = _1_; assign \$2 = 6'h20 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$1 ; assign \$3 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$2 ; assign internal_read_port_masked_bytes = internalBramReadData & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$3 ; assign \$6 = \$4 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$5 ; assign \$8 = { 33'h000000000, \$6 } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$7 ; assign \$10 = \$8 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$9 ; assign \$11 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h40; assign \$12 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h41; assign \$13 = \$11 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$12 ; assign \$14 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h42; assign \$15 = \$13 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$14 ; assign \$16 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:316" *) bram_control_mode_comb; assign \$17 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:320" *) bram_control_mode; assign \$18 = current_tx_byte_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:442" *) cyclic_register_size; assign \$19 = bytes_used >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:444" *) 3'h4; assign \$20 = bytes_used == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:446" *) 3'h4; assign \$21 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:485" *) timer; assign \$22 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:523" *) current_device_index; assign \$23 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:525" *) bram_read_data[4]; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:530" *) bram_read_data[4]; assign \$25 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:530" *) \$24 ; assign \$26 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:533" *) bram_read_data[2]; assign \$27 = \$26 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:533" *) bram_read_data[3]; assign \$28 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) bram_read_data[2]; assign \$29 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) bram_read_data[3]; assign \$30 = \$28 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) \$29 ; assign \$31 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) controller_fsm_state; assign \$32 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$33 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$34 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$35 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$36 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h5; assign \$37 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h6; assign \$38 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h7; assign \$39 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h8; assign \$40 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h9; assign \$41 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'ha; assign \$42 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hb; assign \$43 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hc; assign \$44 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hd; assign \$45 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'he; assign \$46 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hf; assign \$47 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h10; assign \$48 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h11; assign \$49 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h12; assign \$50 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h13; assign \$51 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h14; assign \$52 = bit_time * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:203" *) 6'h28; assign \$53 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h40; assign \$54 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h41; assign \$55 = \$53 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$54 ; assign \$56 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h42; assign \$57 = \$55 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$56 ; assign \$58 = current_enabled_device_index == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:370" *) 1'h1; assign \$59 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:395" *) 1'h1; assign \$60 = rx_packet_size + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:371" *) 3'h4; assign \$61 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:385" *) current_cyclic_register; assign \$62 = current_device_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:397" *) 1'h1; assign \$63 = rx_packet_size + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:403" *) 3'h4; assign \$64 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:416" *) current_tx_word_index; assign \$65 = 5'h18 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:418" *) current_cyclic_register; assign \$66 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) internalBramReadData[7:5]; assign \$67 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) 2'h3; assign \$68 = \$67 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) cyclic_data_enabled; assign \$69 = \$66 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) \$68 ; assign \$70 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:431" *) current_tx_byte_index; assign \$71 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:434" *) 1'h1; assign \$72 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:435" *) 1'h1; assign \$73 = bytes_used >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:444" *) 3'h4; assign \$74 = internal_read_port_masked_bytes << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:451" *) current_tx_bit_index; assign \$75 = { 31'h00000000, tx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:451" *) \$74 ; assign \$76 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:452" *) cyclic_register_starting_byte_index; assign \$78 = internal_read_port_masked_bytes >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:452" *) \$77 ; assign \$79 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:455" *) 1'h1; assign \$80 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:456" *) current_tx_byte_index; assign \$81 = $signed({ 1'h0, cyclic_register_size }) - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:456" *) $signed(\$80 ); assign \$82 = internal_read_port_masked_bytes << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:460" *) current_tx_bit_index; assign \$83 = { 31'h00000000, tx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:460" *) \$82 ; assign \$84 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:463" *) 2'h3; assign \$85 = \$84 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:463" *) cyclic_data_enabled; assign \$86 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:464" *) current_cyclic_register; assign \$87 = \$86 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:464" *) 1'h1; assign \$88 = current_cyclic_register + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:465" *) 1'h1; assign \$89 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:474" *) current_device_index; assign \$90 = previous_rx_packet_size >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:475" *) tx_packet_size; assign \$91 = previous_rx_packet_size - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:476" *) tx_packet_size; assign \$92 = $signed(\$91 ) + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:476" *) $signed(4'h4); assign \$93 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:485" *) timer; assign \$94 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:494" *) pre_timer; assign \$95 = timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:495" *) 1'h1; assign \$96 = pre_timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:498" *) 1'h1; assign \$97 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:523" *) current_device_index; assign \$98 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:525" *) bram_read_data[4]; assign \$99 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:543" *) 1'h1; assign \$100 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:568" *) timer; assign \$101 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:576" *) pre_timer; assign \$102 = timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:577" *) 1'h1; assign \$103 = pre_timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:580" *) 1'h1; assign \$104 = current_cyclic_register + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:590" *) 1'h1; assign \$105 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:592" *) current_cyclic_register; assign \$106 = \$105 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:592" *) 1'h1; assign \$107 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) internalBramReadData[2:0]; assign \$108 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) 2'h3; assign \$109 = \$108 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) rx_cyclic_data_enabled; assign \$110 = \$107 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) \$109 ; assign \$111 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) 1'h1; assign \$112 = current_enabled_device_index == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) 1'h1; assign \$113 = current_enabled_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) last_enabled_device_index; assign \$114 = \$112 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) \$113 ; assign \$115 = \$111 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) \$114 ; assign \$116 = internalBramReadData[4:3] + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:630" *) internalBramReadData[2:0]; assign \$117 = \$116 <= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:630" *) 3'h4; assign \$118 = 5'h10 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:634" *) current_cyclic_register; assign \$120 = bram_read_data >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$119 ; assign \$121 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) internalBramReadData[2:0]; assign \$123 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$122 ; assign \$124 = \$120 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$123 ; assign \$125 = internalBramReadData[4:3] + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:639" *) internalBramReadData[2:0]; assign \$126 = \$125 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:639" *) 3'h4; assign \$127 = current_rx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:642" *) 1'h1; assign \$128 = 1'h0 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:643" *) current_rx_word_index; assign \$129 = \$128 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:643" *) 1'h1; assign \$131 = bram_read_data >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$130 ; assign \$132 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) internalBramReadData[2:0]; assign \$134 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$133 ; assign \$135 = \$131 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$134 ; assign \$136 = 1'h0 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:654" *) current_rx_word_index; assign \$137 = \$136 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:654" *) 1'h1; assign \$138 = current_rx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:655" *) 1'h1; assign \$139 = 5'h10 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:682" *) current_cyclic_register; assign \$140 = cyclic_register_starting_byte_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) cyclic_register_size; assign \$141 = \$140 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) 3'h4; assign \$142 = $signed(4'h4) - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) $signed(\$141 ); assign \$144 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) \$143 ; assign \$145 = bram_read_data & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:684" *) \$144 ; assign \$146 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:686" *) cyclic_register_starting_byte_index; assign \$148 = \$145 << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:684" *) \$147 ; assign \$149 = { 127'h00000000000000000000000000000000, rx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:683" *) \$148 ; assign \$150 = current_device_index < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:694" *) 1'h1; assign \$151 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:731" *) 1'h1; assign \$152 = current_device_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:732" *) 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:174" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) word_time <= 16'h0000; else word_time <= \$153 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:173" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_word_time <= 1'h0; else update_word_time <= \$154 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:134" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalBramAddress <= 16'h0000; else internalBramAddress <= \$155 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_tx_device_config_wait_read_delay <= 1'h0; else get_tx_device_config_wait_read_delay <= \$156 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) wait_tx_start_read_status_read_delay <= 1'h0; else wait_tx_start_read_status_read_delay <= \$157 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) wait_for_final_rx_packet_read_delay <= 1'h0; else wait_for_final_rx_packet_read_delay <= \$158 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_rx_register_config_read_delay <= 1'h0; else get_rx_register_config_read_delay <= \$159 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_rx_register_config_first_read_delay <= 1'h0; else get_rx_register_config_first_read_delay <= \$160 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start_rx_read_delay <= 1'h0; else start_rx_read_delay <= \$161 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:267" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_control_mode <= 1'h0; else bram_control_mode <= \$162 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:145" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start_transfers <= 1'h0; else start_transfers <= \$163 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:146" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bit_time <= 32'd0; else bit_time <= \$164 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:291" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) last_bram_address <= 16'h0000; else last_bram_address <= bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:137" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__en <= 1'h0; else internalWritePort__en <= \$165 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) controller_fsm_state <= 5'h00; else controller_fsm_state <= \$166 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:147" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_busy <= 1'h0; else update_busy <= \$167 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:148" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_done <= 1'h0; else update_done <= \$168 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:149" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_error <= 1'h0; else update_error <= \$169 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:158" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_device_index <= 8'h00; else current_device_index <= \$170 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:160" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) last_enabled_device_index <= 8'h00; else last_enabled_device_index <= \$171 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:159" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_enabled_device_index <= 8'h00; else current_enabled_device_index <= \$172 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:166" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_tx_byte_index <= 2'h0; else current_tx_byte_index <= \$173 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:167" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_rx_byte_index <= 2'h0; else current_rx_byte_index <= \$174 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:168" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_rx_word_index <= 3'h0; else current_rx_word_index <= \$175 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:169" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_tx_word_index <= 3'h0; else current_tx_word_index <= \$176 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:176" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_cyclic_register <= 3'h0; else current_cyclic_register <= \$177 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:171" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timer <= 4'h0; else timer <= \$178 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:172" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) pre_timer <= 16'h0000; else pre_timer <= \$179 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:183" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_data_enabled <= 1'h0; else cyclic_data_enabled <= \$180 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:164" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) previous_rx_packet_size <= 4'h0; else previous_rx_packet_size <= \$181 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:163" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_packet_size <= 4'h0; else rx_packet_size <= \$182 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_write_enable$83 <= 1'h0; else \bram_write_enable$83 <= \$183 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_address$84 <= 16'h0000; else \bram_address$84 <= \$184 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:178" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_register_size <= 3'h0; else cyclic_register_size <= \$185 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:179" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_register_starting_byte_index <= 2'h0; else cyclic_register_starting_byte_index <= \$186 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_write_data$85 <= 32'd0; else \bram_write_data$85 <= \$187 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:162" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_packet_size <= 4'h0; else tx_packet_size <= \$188 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:155" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_data <= 32'd0; else tx_data <= \$189 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:136" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__data <= 32'd0; else internalWritePort__data <= \$190 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:156" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_data <= 32'd0; else rx_data <= \$191 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:184" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_cyclic_data_enabled <= 1'h0; else rx_cyclic_data_enabled <= \$192 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:108" *) \Controller.em_serial_controller_C.drive_serial_port drive_serial_port ( .address(\bram_address$84 ), .bram_read_data(bram_read_data), .bram_write_data(\bram_write_data$85 ), .bram_write_enable(\bram_write_enable$83 ), .debugPins(debugPins), .rx(rx), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .tx(tx) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end bram_control_mode_comb = 1'h0; if (\$15 ) begin bram_control_mode_comb = 1'h1; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \bram_read_data$40 = 32'd0; casez (last_bram_address) 16'h0042: if (bram_control_mode) begin \bram_read_data$40 = { 29'h00000000, update_error, update_done, update_busy }; end endcase if (\$17 ) begin \bram_read_data$40 = externalReadPort__data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end externalWritePort__data = 32'd0; if (\$16 ) begin externalWritePort__data = bram_write_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end externalWritePort__en = 1'h0; if (\$16 ) begin externalWritePort__en = bram_write_enable; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end debugPins_fsm = 5'h00; casez (controller_fsm_state) 5'h00: debugPins_fsm = 5'h01; 5'h01: debugPins_fsm = 5'h02; 5'h02: debugPins_fsm = 5'h03; 5'h03: debugPins_fsm = 5'h04; 5'h05: debugPins_fsm = 5'h05; 5'h06: debugPins_fsm = 5'h06; 5'h07: debugPins_fsm = 5'h07; 5'h08: debugPins_fsm = 5'h08; 5'h09: debugPins_fsm = 5'h09; 5'h0a: debugPins_fsm = 5'h0a; 5'h0b: debugPins_fsm = 5'h0b; 5'h0c: debugPins_fsm = 5'h0c; 5'h04: debugPins_fsm = 5'h0d; 5'h0f: debugPins_fsm = 5'h0e; 5'h0d: debugPins_fsm = 5'h0e; 5'h11: debugPins_fsm = 5'h0f; 5'h10: debugPins_fsm = 5'h10; 5'h12: debugPins_fsm = 5'h11; 5'h13: debugPins_fsm = 5'h12; 5'h14: debugPins_fsm = 5'h13; 5'h0e: debugPins_fsm = 5'h14; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end use_future_device_bram = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: use_future_device_bram = 1'h1; 5'h03: use_future_device_bram = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end bytes_used = 4'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: bytes_used = \$18 ; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end offset = 3'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: if (\$19 ) begin (* full_case = 32'd1 *) if (\$20 ) begin offset = 3'h4; end else begin offset = 3'h3; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end serial_port_tx_trigger = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: if (\$21 ) begin serial_port_tx_trigger = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end rx_invalid_crc_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$25 ) begin rx_invalid_crc_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end rx_not_finished_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$27 ) begin rx_not_finished_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end rx_no_response_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$30 ) begin rx_no_response_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end use_previous_device_bram = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin use_previous_device_bram = 1'h1; end end 5'h04: /* empty */; 5'h0f: use_previous_device_bram = 1'h1; 5'h0d: use_previous_device_bram = 1'h1; 5'h11: /* empty */; 5'h10: use_previous_device_bram = 1'h1; 5'h12: use_previous_device_bram = 1'h1; 5'h13: use_previous_device_bram = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end serial_port_rx_trigger = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: serial_port_rx_trigger = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$153 = word_time; if (update_word_time) begin \$153 = \$52 [15:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$154 = update_word_time; if (update_word_time) begin \$154 = 1'h0; end if (bram_write_enable) begin casez (bram_address) 16'h0040: /* empty */; 16'h0041: \$154 = 1'h1; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$155 [4:0] = internalBramAddress[4:0]; (* full_case = 32'd1 *) if (use_previous_device_bram) begin \$155 [15:5] = { 3'h0, last_enabled_device_index }; end else if (use_future_device_bram) begin \$155 [15:5] = { 3'h0, current_device_index }; end else begin \$155 [15:5] = { 3'h0, current_enabled_device_index }; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: \$155 [4:0] = 5'h00; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$155 [4:0] = \$61 ; end 5'h05: \$155 [4:0] = \$65 [4:0]; 5'h06: /* empty */; 5'h07: if (\$85 ) begin \$155 [4:0] = \$87 [4:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$155 [4:0] = 5'h01; end end 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$155 [4:0] = \$106 [4:0]; end 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$155 [4:0] = 5'h08; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin if (\$117 ) begin \$155 [4:0] = \$118 [4:0]; end end 5'h12: /* empty */; 5'h13: \$155 [4:0] = \$139 [4:0]; 5'h14: /* empty */; 5'h0e: \$155 [4:0] = 5'h00; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$156 = get_tx_device_config_wait_read_delay; if (get_tx_device_config_wait_read_delay) begin \$156 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: \$156 = 1'h1; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin end else if (\$59 ) begin \$156 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$157 = wait_tx_start_read_status_read_delay; if (wait_tx_start_read_status_read_delay) begin \$157 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: \$157 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$158 = wait_for_final_rx_packet_read_delay; if (wait_for_final_rx_packet_read_delay) begin \$158 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: if (\$100 ) begin \$158 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$159 = get_rx_register_config_read_delay; if (get_rx_register_config_read_delay) begin \$159 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$159 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$160 = get_rx_register_config_first_read_delay; if (get_rx_register_config_first_read_delay) begin \$160 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$160 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$161 = start_rx_read_delay; if (start_rx_read_delay) begin \$161 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$161 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end (* full_case = 32'd1 *) if (\$57 ) begin \$162 = 1'h1; end else begin \$162 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$163 = start_transfers; if (bram_write_enable) begin casez (bram_address) 16'h0040: \$163 = bram_write_data[0]; endcase end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$163 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$164 = bit_time; if (bram_write_enable) begin casez (bram_address) 16'h0040: /* empty */; 16'h0041: \$164 = bram_write_data; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$165 = internalWritePort__en; casez (controller_fsm_state) 5'h00: \$165 = 1'h0; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$165 = 1'h1; end end 5'h04: /* empty */; 5'h0f: \$165 = 1'h0; 5'h0d: \$165 = 1'h0; 5'h11: \$165 = 1'h0; 5'h10: if (\$110 ) begin if (\$117 ) begin \$165 = 1'h1; end end 5'h12: /* empty */; 5'h13: \$165 = 1'h1; 5'h14: /* empty */; 5'h0e: \$165 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$166 = controller_fsm_state; casez (controller_fsm_state) 5'h00: if (start_transfers) begin \$166 = 5'h01; end 5'h01: \$166 = 5'h02; 5'h02: if (get_tx_device_config_wait_read_delay) begin \$166 = 5'h03; end 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$166 = 5'h04; end else if (internalBramReadData[0]) begin \$166 = 5'h05; end else if (\$59 ) begin \$166 = 5'h02; end else begin \$166 = 5'h04; end 5'h05: \$166 = 5'h06; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin \$166 = 5'h07; end else begin \$166 = 5'h08; end 5'h07: (* full_case = 32'd1 *) if (\$85 ) begin \$166 = 5'h05; end else begin \$166 = 5'h08; end 5'h08: \$166 = 5'h09; 5'h09: if (\$93 ) begin \$166 = 5'h0a; end 5'h0a: if (wait_tx_start_read_status_read_delay) begin \$166 = 5'h0b; end 5'h0b: if (bram_read_data[1]) begin \$166 = 5'h0c; end 5'h0c: if (bram_read_data[0]) begin (* full_case = 32'd1 *) if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin \$166 = 5'h0d; end else begin (* full_case = 32'd1 *) if (\$99 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end end end else begin \$166 = 5'h0e; end end 5'h04: if (\$100 ) begin if (wait_for_final_rx_packet_read_delay) begin \$166 = 5'h0c; end end 5'h0f: if (get_rx_register_config_read_delay) begin \$166 = 5'h10; end 5'h0d: if (get_rx_register_config_first_read_delay) begin \$166 = 5'h10; end 5'h11: \$166 = 5'h10; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin \$166 = 5'h0f; end else begin \$166 = 5'h12; end end else if (\$115 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end 5'h12: \$166 = 5'h13; 5'h13: \$166 = 5'h0f; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end 5'h0e: if (start_rx_read_delay) begin \$166 = 5'h02; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$167 = update_busy; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$167 = 1'h1; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin (* full_case = 32'd1 *) if (\$99 ) begin end else begin \$167 = 1'h0; end end end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin end else if (\$115 ) begin end else begin \$167 = 1'h0; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin end else begin \$167 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$168 = update_done; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$168 = 1'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin (* full_case = 32'd1 *) if (\$99 ) begin end else begin \$168 = 1'h1; end end end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin end else if (\$115 ) begin end else begin \$168 = 1'h1; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin end else begin \$168 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$169 = update_error; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$169 = 1'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin \$169 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$170 = current_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$170 = 8'h00; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin end else if (\$59 ) begin \$170 = \$62 [7:0]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin end else begin if (\$151 ) begin \$170 = \$152 [7:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$171 = last_enabled_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$171 = 8'h00; 5'h02: /* empty */; 5'h03: \$171 = current_enabled_device_index; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$172 = current_enabled_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$172 = 8'h00; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$172 = current_device_index; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$173 = current_tx_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$173 = 2'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: (* full_case = 32'd1 *) if (\$73 ) begin \$173 = \$81 [1:0]; end else begin \$173 = bytes_used[1:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$173 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$174 = current_rx_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$174 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$175 = current_rx_word_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$175 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$175 = 3'h0; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin if (\$126 ) begin \$175 = \$127 [2:0]; end end else begin \$175 = \$138 [2:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$176 = current_tx_word_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$176 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$176 = \$71 [2:0]; end end 5'h07: if (\$73 ) begin \$176 = \$79 [2:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$176 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$177 = current_cyclic_register; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$177 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: if (\$85 ) begin \$177 = \$88 [2:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$177 = \$104 [2:0]; end 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$177 = 3'h0; end 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$177 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$178 = timer; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$178 = 4'h0; 5'h02: /* empty */; 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$178 = \$60 [3:0]; end else if (internalBramReadData[0]) begin end else if (\$59 ) begin end else begin \$178 = \$63 [3:0]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: if (\$89 ) begin (* full_case = 32'd1 *) if (\$90 ) begin \$178 = \$92 [3:0]; end else begin \$178 = 4'h4; end end 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin end else begin if (\$94 ) begin \$178 = \$95 [3:0]; end end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: (* full_case = 32'd1 *) if (\$100 ) begin end else begin if (\$101 ) begin \$178 = \$102 [3:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$179 = pre_timer; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$179 = 16'h0000; 5'h02: /* empty */; 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$179 = word_time; end else if (internalBramReadData[0]) begin end else if (\$59 ) begin end else begin \$179 = word_time; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: \$179 = word_time; 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin end else begin (* full_case = 32'd1 *) if (\$94 ) begin \$179 = word_time; end else begin \$179 = \$96 [15:0]; end end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: (* full_case = 32'd1 *) if (\$100 ) begin end else begin (* full_case = 32'd1 *) if (\$101 ) begin \$179 = word_time; end else begin \$179 = \$103 [15:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$180 = cyclic_data_enabled; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$180 = internalBramReadData[1]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$180 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$181 = previous_rx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$181 = rx_packet_size; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$182 = rx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin (* full_case = 32'd1 *) if (internalBramReadData[1]) begin \$182 = internalBramReadData[5:2]; end else begin \$182 = 4'h3; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$183 = \bram_write_enable$83 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: \$183 = 1'h0; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$183 = 1'h1; end end 5'h07: if (\$73 ) begin \$183 = 1'h1; end 5'h08: /* empty */; 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin \$183 = 1'h1; end else begin \$183 = 1'h0; end 5'h0a: \$183 = 1'h0; 5'h0b: /* empty */; 5'h0c: (* full_case = 32'd1 *) if (bram_read_data[0]) begin end else begin \$183 = 1'h0; end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin \$183 = 1'h0; end else begin \$183 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$184 = \bram_address$84 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: \$184 = { 11'h000, \$64 }; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: if (\$93 ) begin \$184 = 16'h8000; end 5'h0a: \$184 = 16'h8002; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: if (\$100 ) begin \$184 = 16'h8002; end 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$184 = 16'h0000; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin if (\$126 ) begin \$184 = { 11'h000, \$129 }; end end else begin \$184 = { 11'h000, \$137 }; end end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$184 = 16'h8000; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$185 = cyclic_register_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: if (\$69 ) begin \$185 = internalBramReadData[7:5]; end 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin \$185 = internalBramReadData[2:0]; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$185 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$186 = cyclic_register_starting_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: if (\$69 ) begin \$186 = internalBramReadData[9:8]; end 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin \$186 = internalBramReadData[4:3]; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$186 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$187 = \bram_write_data$85 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$187 = tx_data; end end 5'h07: if (\$73 ) begin \$187 = \$75 [31:0]; end 5'h08: /* empty */; 5'h09: if (\$93 ) begin \$187 = \$10 [31:0]; end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$187 = \$10 [31:0]; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$188 = tx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$188 = \$72 ; end end 5'h07: (* full_case = 32'd1 *) if (\$85 ) begin end else begin \$188 = { 1'h0, current_tx_word_index }; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$189 = tx_data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: (* full_case = 32'd1 *) if (\$73 ) begin \$189 = \$78 ; end else begin \$189 = \$83 [31:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$189 = 32'd0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$190 = internalWritePort__data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$190 = { 29'h00000000, rx_invalid_crc_fault, rx_not_finished_fault, rx_no_response_fault }; end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin if (\$117 ) begin \$190 = \$124 ; end end 5'h12: /* empty */; 5'h13: \$190 = \$149 [31:0]; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$191 = rx_data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin end else begin \$191 = \$135 ; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$24 ) begin end \$192 = rx_cyclic_data_enabled; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin end else begin \$192 = cyclic_data_enabled; end endcase end assign \rx$1 = rx; assign \tx$3 = tx; assign \debugPins$5 = debugPins; assign internalReadPort__addr = internalBramAddress[5:0]; assign internalWritePort__addr = internalBramAddress[5:0]; assign internalBramWriteData = internalWritePort__data; assign internalBramWriteEnable = internalWritePort__en; assign internalReadPort__data = internalBramReadData; assign cyclic_read_data_size = internalBramReadData[2:0]; assign cyclic_read_data_starting_byte_index = internalBramReadData[4:3]; assign cyclic_write_data_size = internalBramReadData[7:5]; assign cyclic_write_data_starting_byte_index = internalBramReadData[9:8]; assign serial_port_control_data = \$10 [31:0]; assign serial_port_tx_done = bram_read_data[0]; assign serial_port_rx_done = bram_read_data[2]; assign serial_port_tx_busy = bram_read_data[1]; assign serial_port_rx_busy = bram_read_data[3]; assign serial_port_rx_crc_valid = bram_read_data[4]; assign externalReadPort__addr = bram_address[5:0]; assign externalWritePort__addr = bram_address[5:0]; assign cyclic_register_starting_bit_index = { cyclic_register_starting_byte_index, 3'h0 }; assign current_tx_bit_index = { current_tx_byte_index, 3'h0 }; assign \$1 = { cyclic_register_size, 3'h0 }; assign \$4 = { 1'h0, serial_port_tx_trigger }; assign \$5 = { serial_port_rx_trigger, 1'h0 }; assign \$7 = { 15'h0000, tx_packet_size, 16'h0000 }; assign \$9 = { 7'h00, rx_packet_size, 24'h000000 }; assign \$77 = { \$76 , 3'h0 }; assign \$119 = { internalBramReadData[4:3], 3'h0 }; assign \$122 = { \$121 , 3'h0 }; assign \$130 = { internalBramReadData[4:3], 3'h0 }; assign \$133 = { \$132 , 3'h0 }; assign \$143 = { \$142 , 3'h0 }; assign \$147 = { \$146 , 3'h0 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:67" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_C.drive_serial_port (sync_100_rst, rx, bram_write_enable, address, bram_write_data, bram_read_data, debugPins, tx, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$25 = 0; wire \$1 ; wire \$10 ; reg \$100 ; reg \$101 ; reg \$102 ; reg [8:0] \$103 ; reg [2:0] \$104 ; reg \$105 ; reg \$106 ; reg \$107 ; reg [3:0] \$108 ; reg [1:0] \$109 ; wire \$11 ; reg [7:0] \$110 ; reg [10:0] \$111 ; reg \$112 ; reg [31:0] \$113 ; reg [2:0] \$114 ; reg \$115 ; reg \$116 ; reg [3:0] \$117 ; reg [1:0] \$118 ; reg [7:0] \$119 ; wire \$12 ; reg [10:0] \$120 ; reg \$121 ; reg [31:0] \$122 ; reg [31:0] \$123 ; reg [31:0] \$124 ; reg [7:0] \$125 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire \$17 ; wire \$18 ; wire \$19 ; wire [9:0] \$191 ; wire \$193 ; wire \$2 ; wire \$20 ; wire [2:0] \$21 ; wire \$22 ; wire [7:0] \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire [9:0] \$28 ; wire \$29 ; wire \$3 ; wire \$30 ; wire [5:0] \$31 ; wire [6:0] \$32 ; wire \$33 ; wire [5:0] \$34 ; wire [6:0] \$35 ; wire \$36 ; wire [10:0] \$37 ; wire [11:0] \$38 ; wire \$39 ; wire \$4 ; wire \$40 ; wire [10:0] \$41 ; wire \$42 ; wire [5:0] \$43 ; wire [6:0] \$44 ; wire \$45 ; wire [5:0] \$46 ; wire [6:0] \$47 ; wire \$48 ; wire [4:0] \$49 ; wire \$5 ; wire [10:0] \$50 ; wire [11:0] \$51 ; wire \$52 ; wire \$53 ; wire \$54 ; wire \$55 ; wire \$56 ; wire [8:0] \$57 ; wire [8:0] \$58 ; wire \$59 ; wire \$6 ; wire [2:0] \$60 ; wire [11:0] \$61 ; wire \$62 ; wire \$63 ; wire \$64 ; wire \$65 ; wire [9:0] \$66 ; wire [10:0] \$67 ; wire [11:0] \$68 ; wire [11:0] \$69 ; wire \$7 ; wire \$70 ; wire [5:0] \$71 ; wire [6:0] \$72 ; wire \$73 ; wire [4:0] \$74 ; wire [10:0] \$75 ; wire [11:0] \$76 ; wire \$77 ; wire \$78 ; wire \$79 ; wire \$8 ; wire \$80 ; wire \$81 ; wire \$82 ; wire [8:0] \$83 ; wire [2:0] \$84 ; wire [11:0] \$85 ; reg \$86 ; reg \$87 ; reg \$88 ; reg [7:0] \$89 ; wire \$9 ; reg [7:0] \$90 ; reg [9:0] \$91 ; reg [1:0] \$92 ; reg [31:0] \$93 ; reg [15:0] \$94 ; reg \$95 ; reg [31:0] \$96 ; reg \$97 ; reg \$98 ; reg \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) input [15:0] address; wire [15:0] address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:76" *) reg [9:0] bitLength = 10'h008; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:142" *) reg bram_control_mode = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:34" *) output [31:0] bram_read_data; reg [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) input [31:0] bram_write_data; wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [31:0] \crc$62 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) reg [31:0] data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) reg [31:0] \data$63 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:62" *) output [7:0] debugPins; reg [7:0] debugPins; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:136" *) reg [8:0] delay_cnt = 9'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:137" *) reg delay_cnt_increment; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:138" *) reg delay_cnt_reset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [3:0] externalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] externalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [3:0] externalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] externalWritePort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg externalWritePort__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [3:0] internalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] internalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:105" *) reg [15:0] internalReadWriteAddress = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [3:0] internalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] internalWritePort__data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg internalWritePort__en = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:97" *) wire [31:0] readData; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:37" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:26" *) reg rxBusy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:29" *) reg rxCRCvalid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:129" *) reg [3:0] rxCurrentBit = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:130" *) reg [1:0] rxCurrentByte = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:131" *) reg [7:0] rxCurrentWord = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:111" *) reg [31:0] rxData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:28" *) reg rxDone = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:112" *) reg [31:0] rxNewData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:113" *) reg [7:0] rxNewDataIndex = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:73" *) reg [7:0] rxPacketSize = 8'h01; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:127" *) reg [10:0] rxTimer = 11'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:116" *) reg rxWriteDataRequest = 1'h0; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] rx_fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:71" *) reg rx_start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) wire rx_synced; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg \start$49 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) output tx; reg tx = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:25" *) reg txBusy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:123" *) reg [3:0] txCurrentBit = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:124" *) reg [1:0] txCurrentByte = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:125" *) reg [7:0] txCurrentWord = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:27" *) reg txDone = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:72" *) reg [7:0] txPacketSize = 8'h01; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:114" *) reg [31:0] txReadData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:118" *) reg txReadDataRequest = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:119" *) reg [1:0] txReadDataRequestWait = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:121" *) reg [10:0] txTimer = 11'h000; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] tx_fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:70" *) reg tx_start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:117" *) reg updateStatusDataRequest = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg \valid$48 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:95" *) wire [31:0] writeData; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:96" *) wire writeEnable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:87" *) reg [31:0] memory [15:0]; initial begin memory[0] = 32'd0; memory[1] = 32'd0; memory[2] = 32'd0; memory[3] = 32'd0; memory[4] = 32'd0; memory[5] = 32'd0; memory[6] = 32'd0; memory[7] = 32'd0; memory[8] = 32'd0; memory[9] = 32'd0; memory[10] = 32'd0; memory[11] = 32'd0; memory[12] = 32'd0; memory[13] = 32'd0; memory[14] = 32'd0; memory[15] = 32'd0; end always @(posedge sync_100_clk) begin if (externalWritePort__en) memory[address[3:0]] <= externalWritePort__data; end always @(posedge sync_100_clk) begin if (internalWritePort__en) memory[internalReadWriteAddress[3:0]] <= internalWritePort__data; end reg [31:0] _0_; reg [31:0] _1_; always @(posedge sync_100_clk) begin _0_ <= memory[internalReadWriteAddress[3:0]]; _1_ <= memory[address[3:0]]; end assign internalReadPort__data = _0_; assign readData = _1_; assign \$2 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:167" *) address[15]; assign \$4 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:330" *) 7'h64; assign \$5 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:339" *) rx_synced; assign \$6 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:344" *) 9'h12c; assign \$7 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) tx_fsm_state; assign \$8 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$9 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$10 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$11 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$12 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) rx_fsm_state; assign \$13 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$14 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$15 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$16 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$17 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h5; assign \$18 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h6; assign \$19 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h7; assign \$20 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:174" *) txReadDataRequestWait; assign \$21 = txReadDataRequestWait - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:175" *) 1'h1; assign \$22 = txReadDataRequestWait == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:176" *) 1'h1; assign \$28 = delay_cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:206" *) 1'h1; assign \$29 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:234" *) txTimer; assign \$30 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:235" *) txPacketSize; assign \$31 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:236" *) 4'h8; assign \$32 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:236" *) \$31 ; assign \$33 = crc >> \$32 ; assign \$34 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:238" *) 4'h8; assign \$35 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:238" *) \$34 ; assign \$36 = txReadData >> \$35 ; assign \$37 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:240" *) 1'h1; assign \$38 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:244" *) 1'h1; assign \$39 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:247" *) txTimer; assign \$40 = txCurrentBit == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:249" *) 4'h8; assign \$41 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:251" *) 1'h1; assign \$42 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:255" *) txPacketSize; assign \$43 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:256" *) 4'h8; assign \$44 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:256" *) \$43 ; assign \$45 = crc >> \$44 ; assign \$46 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:258" *) 4'h8; assign \$47 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:258" *) \$46 ; assign \$48 = txReadData >> \$47 ; assign \$49 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:260" *) 1'h1; assign \$50 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:261" *) 1'h1; assign \$51 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:264" *) 1'h1; assign \$52 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:267" *) txTimer; assign \$53 = txCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) 2'h3; assign \$54 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) txPacketSize; assign \$55 = \$53 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) \$54 ; assign \$56 = txCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:284" *) 2'h3; assign \$57 = txCurrentWord + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:286" *) 1'h1; assign \$58 = txPacketSize - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:289" *) 1'h1; assign \$59 = txCurrentWord != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:289" *) \$58 ; assign \$60 = txCurrentByte + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:293" *) 1'h1; assign \$61 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:300" *) 1'h1; assign \$62 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:330" *) 7'h64; assign \$63 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:344" *) 9'h12c; assign \$65 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:361" *) rx_synced; assign \$191 = bitLength / (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) 2'h2; assign \$67 = bitLength + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) \$66 ; assign \$68 = \$67 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) 1'h1; assign \$69 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:369" *) 1'h1; assign \$70 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:376" *) rxTimer; assign \$71 = rxCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:377" *) 4'h8; assign \$72 = rxCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:377" *) \$71 ; assign \$73 = rxCurrentBit == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:379" *) 3'h7; assign \$74 = rxCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:384" *) 1'h1; assign \$75 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:385" *) 1'h1; assign \$76 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:389" *) 1'h1; assign \$77 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:396" *) rxTimer; assign \$78 = rxCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) 2'h3; assign \$79 = rxCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) rxPacketSize; assign \$80 = \$78 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) \$79 ; assign \$81 = \crc$62 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:406" *) rxData; assign \$82 = rxCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:419" *) 2'h3; assign \$83 = rxCurrentWord + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:421" *) 1'h1; assign \$84 = rxCurrentByte + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:429" *) 1'h1; assign \$85 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:434" *) 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_control_mode <= 1'h0; else bram_control_mode <= \$86 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:70" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_start <= 1'h0; else tx_start <= \$87 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:71" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_start <= 1'h0; else rx_start <= \$88 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:72" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txPacketSize <= 8'h01; else txPacketSize <= \$89 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:73" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxPacketSize <= 8'h01; else rxPacketSize <= \$90 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:76" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bitLength <= 10'h008; else bitLength <= \$91 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:119" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadDataRequestWait <= 2'h0; else txReadDataRequestWait <= \$92 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:114" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadData <= 32'd0; else txReadData <= \$93 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:105" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalReadWriteAddress <= 16'h0000; else internalReadWriteAddress <= \$94 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:118" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadDataRequest <= 1'h0; else txReadDataRequest <= \$95 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__data <= 32'd0; else internalWritePort__data <= \$96 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__en <= 1'h0; else internalWritePort__en <= \$97 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:116" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxWriteDataRequest <= 1'h0; else rxWriteDataRequest <= \$98 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) valid <= 1'h0; else valid <= \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start <= 1'h0; else start <= \$100 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \valid$48 <= 1'h0; else \valid$48 <= \$101 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \start$49 <= 1'h0; else \start$49 <= \$102 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:136" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) delay_cnt <= 9'h000; else delay_cnt <= \$103 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_fsm_state <= 3'h0; else tx_fsm_state <= \$104 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:27" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txDone <= 1'h1; else txDone <= \$105 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:25" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txBusy <= 1'h0; else txBusy <= \$106 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx <= 1'h1; else tx <= \$107 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:123" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentBit <= 4'h0; else txCurrentBit <= \$108 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:124" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentByte <= 2'h0; else txCurrentByte <= \$109 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:125" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentWord <= 8'h00; else txCurrentWord <= \$110 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:121" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txTimer <= 11'h000; else txTimer <= \$111 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:117" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) updateStatusDataRequest <= 1'h0; else updateStatusDataRequest <= \$112 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data <= 32'd0; else data <= \$113 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_fsm_state <= 3'h0; else rx_fsm_state <= \$114 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:28" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxDone <= 1'h1; else rxDone <= \$115 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:29" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCRCvalid <= 1'h0; else rxCRCvalid <= \$116 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:129" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentBit <= 4'h0; else rxCurrentBit <= \$117 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:130" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentByte <= 2'h0; else rxCurrentByte <= \$118 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:131" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentWord <= 8'h00; else rxCurrentWord <= \$119 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:127" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxTimer <= 11'h000; else rxTimer <= \$120 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:26" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxBusy <= 1'h0; else rxBusy <= \$121 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:111" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxData <= 32'd0; else rxData <= \$122 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:112" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxNewData <= 32'd0; else rxNewData <= \$123 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \data$63 <= 32'd0; else \data$63 <= \$124 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:113" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxNewDataIndex <= 8'h00; else rxNewDataIndex <= \$125 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:84" *) \Controller.em_serial_controller_C.drive_serial_port.U$3 \U$3 ( .rx(rx), .stage1(rx_synced), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:81" *) \Controller.em_serial_controller_C.drive_serial_port.crc32_rx crc32_rx ( .crc(\crc$62 ), .data_in(\data$63 ), .start(\start$49 ), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .valid(\valid$48 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:80" *) \Controller.em_serial_controller_C.drive_serial_port.crc32_tx crc32_tx ( .crc(crc), .data_in(data), .start(start), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .valid(valid) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end bram_read_data = 32'd0; casez (address) 16'h8002: if (\$1 ) begin bram_read_data = { 27'h0000000, rxCRCvalid, rxBusy, rxDone, txBusy, txDone }; end endcase if (\$2 ) begin bram_read_data = readData; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end externalWritePort__data = 32'd0; if (\$2 ) begin externalWritePort__data = bram_write_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end externalWritePort__en = 1'h0; if (\$2 ) begin externalWritePort__en = bram_write_enable; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: debugPins = 8'h01; 3'h1: debugPins = 8'h02; 3'h2: debugPins = 8'h03; 3'h3: debugPins = 8'h04; 3'h4: debugPins = 8'h05; 3'h5: debugPins = 8'h06; 3'h6: debugPins = 8'h07; 3'h7: debugPins = 8'h08; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end delay_cnt_increment = 1'h0; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: if (\$3 ) begin delay_cnt_increment = 1'h1; end 3'h3: if (\$5 ) begin delay_cnt_increment = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end delay_cnt_reset = 1'h0; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: begin (* full_case = 32'd1 *) if (\$3 ) begin end else begin delay_cnt_reset = 1'h1; end if (\$4 ) begin delay_cnt_reset = 1'h1; end end 3'h3: begin (* full_case = 32'd1 *) if (\$5 ) begin end else begin delay_cnt_reset = 1'h1; end if (\$6 ) begin delay_cnt_reset = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end (* full_case = 32'd1 *) if (address[15]) begin \$86 = 1'h1; end else begin \$86 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$87 = tx_start; if (bram_write_enable) begin casez (address) 16'h8000: \$87 = bram_write_data[0]; endcase end casez (tx_fsm_state) 3'h0: if (tx_start) begin \$87 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$87 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$88 = rx_start; if (bram_write_enable) begin casez (address) 16'h8000: \$88 = bram_write_data[1]; endcase end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: if (rx_start) begin \$88 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$88 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$89 = txPacketSize; if (bram_write_enable) begin casez (address) 16'h8000: \$89 = bram_write_data[23:16]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$90 = rxPacketSize; if (bram_write_enable) begin casez (address) 16'h8000: \$90 = bram_write_data[31:24]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$91 = bitLength; if (bram_write_enable) begin casez (address) 16'h8000: /* empty */; 16'h8001: \$91 = bram_write_data[9:0]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$92 = txReadDataRequestWait; if (\$20 ) begin \$92 = \$21 [1:0]; end if (txReadDataRequest) begin \$92 = 2'h2; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$92 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$93 = txReadData; if (\$20 ) begin if (\$22 ) begin \$93 = internalReadPort__data; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$94 = internalReadWriteAddress; if (txReadDataRequest) begin \$94 = { 8'h00, \$23 }; end else if (rxWriteDataRequest) begin \$94 = { 8'h00, rxNewDataIndex }; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$95 = txReadDataRequest; if (txReadDataRequest) begin \$95 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$95 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin if (\$59 ) begin \$95 = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$96 = internalWritePort__data; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$96 = rxNewData; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$97 = internalWritePort__en; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$97 = 1'h1; end if (internalWritePort__en) begin \$97 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$98 = rxWriteDataRequest; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$98 = 1'h0; end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$98 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$99 = valid; if (\$24 ) begin \$99 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$99 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$100 = start; if (\$25 ) begin \$100 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$100 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$101 = \valid$48 ; if (\$26 ) begin \$101 = 1'h0; end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$101 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$102 = \start$49 ; if (\$27 ) begin \$102 = 1'h0; end casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$102 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$103 = delay_cnt; if (delay_cnt_increment) begin \$103 = \$28 [8:0]; end if (delay_cnt_reset) begin \$103 = 9'h000; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$104 = tx_fsm_state; casez (tx_fsm_state) 3'h0: if (tx_start) begin \$104 = 3'h1; end 3'h1: \$104 = 3'h2; 3'h2: if (\$29 ) begin \$104 = 3'h3; end 3'h3: if (\$39 ) begin if (\$40 ) begin \$104 = 3'h4; end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$104 = 3'h0; end else begin \$104 = 3'h2; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$105 = txDone; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$105 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$105 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$106 = txBusy; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$106 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$106 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$107 = tx; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$107 = 1'h0; 3'h2: if (\$29 ) begin (* full_case = 32'd1 *) if (\$30 ) begin \$107 = \$33 ; end else begin \$107 = \$36 ; end end 3'h3: if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin \$107 = 1'h1; end else begin (* full_case = 32'd1 *) if (\$42 ) begin \$107 = \$45 ; end else begin \$107 = \$48 ; end end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$107 = 1'h1; end else begin \$107 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$108 = txCurrentBit; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$108 = 4'h0; 3'h2: if (\$29 ) begin \$108 = 4'h1; end 3'h3: if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin end else begin \$108 = \$49 [3:0]; end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$108 = 4'h0; end else begin \$108 = 4'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$109 = txCurrentByte; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$109 = 2'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin (* full_case = 32'd1 *) if (\$56 ) begin \$109 = 2'h0; end else begin \$109 = \$60 [1:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$110 = txCurrentWord; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$110 = 8'h00; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$110 = \$57 [7:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$111 = txTimer; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$111 = { 1'h0, bitLength }; 3'h2: (* full_case = 32'd1 *) if (\$29 ) begin \$111 = \$37 ; end else begin \$111 = \$38 [10:0]; end 3'h3: (* full_case = 32'd1 *) if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin \$111 = \$41 ; end else begin \$111 = \$50 ; end end else begin \$111 = \$51 [10:0]; end 3'h4: (* full_case = 32'd1 *) if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin \$111 = { 1'h0, bitLength }; end end else begin \$111 = \$61 [10:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$112 = updateStatusDataRequest; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$112 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$112 = 1'h1; end end endcase (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$112 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$112 = 1'h1; end 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$112 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$113 = data; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$113 = txReadData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$114 = rx_fsm_state; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: if (rx_start) begin \$114 = 3'h1; end 3'h1: \$114 = 3'h2; 3'h2: begin if (\$62 ) begin \$114 = 3'h3; end if (rx_start) begin \$114 = 3'h0; end end 3'h3: begin if (\$63 ) begin \$114 = 3'h4; end if (rx_start) begin \$114 = 3'h0; end end 3'h4: begin if (\$64 ) begin \$114 = 3'h5; end if (rx_start) begin \$114 = 3'h0; end end 3'h5: begin if (\$65 ) begin \$114 = 3'h6; end if (rx_start) begin \$114 = 3'h0; end end 3'h6: begin if (\$70 ) begin if (\$73 ) begin \$114 = 3'h7; end end if (rx_start) begin \$114 = 3'h0; end end 3'h7: begin if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$114 = 3'h0; end else begin \$114 = 3'h5; end end if (rx_start) begin \$114 = 3'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$115 = rxDone; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$115 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$115 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$116 = rxCRCvalid; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$116 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin (* full_case = 32'd1 *) if (\$81 ) begin \$116 = 1'h1; end else begin \$116 = 1'h0; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$117 = rxCurrentBit; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$117 = 4'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$117 = 4'h0; end 3'h6: if (\$70 ) begin (* full_case = 32'd1 *) if (\$73 ) begin end else begin \$117 = \$74 [3:0]; end end 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$117 = 4'h0; end else begin \$117 = 4'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$118 = rxCurrentByte; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$118 = 2'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$118 = 2'h0; end else begin (* full_case = 32'd1 *) if (\$82 ) begin \$118 = 2'h0; end else begin \$118 = \$84 [1:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$119 = rxCurrentWord; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$119 = 8'h00; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$119 = 8'h00; end else begin if (\$82 ) begin \$119 = \$83 [7:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$120 = rxTimer; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: (* full_case = 32'd1 *) if (\$65 ) begin \$120 = \$68 [10:0]; end else begin \$120 = \$69 [10:0]; end 3'h6: (* full_case = 32'd1 *) if (\$70 ) begin (* full_case = 32'd1 *) if (\$73 ) begin \$120 = { 1'h0, bitLength }; end else begin \$120 = \$75 ; end end else begin \$120 = \$76 [10:0]; end 3'h7: (* full_case = 32'd1 *) if (\$77 ) begin end else begin \$120 = \$85 [10:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$121 = rxBusy; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$121 = 1'h1; end 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$121 = 1'h0; end else begin \$121 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$122 = rxData; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: if (\$70 ) begin casez (\$72 ) 7'h00: \$122 [0] = rx_synced; 7'h01: \$122 [1] = rx_synced; 7'h02: \$122 [2] = rx_synced; 7'h03: \$122 [3] = rx_synced; 7'h04: \$122 [4] = rx_synced; 7'h05: \$122 [5] = rx_synced; 7'h06: \$122 [6] = rx_synced; 7'h07: \$122 [7] = rx_synced; 7'h08: \$122 [8] = rx_synced; 7'h09: \$122 [9] = rx_synced; 7'h0a: \$122 [10] = rx_synced; 7'h0b: \$122 [11] = rx_synced; 7'h0c: \$122 [12] = rx_synced; 7'h0d: \$122 [13] = rx_synced; 7'h0e: \$122 [14] = rx_synced; 7'h0f: \$122 [15] = rx_synced; 7'h10: \$122 [16] = rx_synced; 7'h11: \$122 [17] = rx_synced; 7'h12: \$122 [18] = rx_synced; 7'h13: \$122 [19] = rx_synced; 7'h14: \$122 [20] = rx_synced; 7'h15: \$122 [21] = rx_synced; 7'h16: \$122 [22] = rx_synced; 7'h17: \$122 [23] = rx_synced; 7'h18: \$122 [24] = rx_synced; 7'h19: \$122 [25] = rx_synced; 7'h1a: \$122 [26] = rx_synced; 7'h1b: \$122 [27] = rx_synced; 7'h1c: \$122 [28] = rx_synced; 7'h1d: \$122 [29] = rx_synced; 7'h1e: \$122 [30] = rx_synced; 7'h1f: \$122 [31] = rx_synced; endcase end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$123 = rxNewData; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$123 = rxData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$124 = \data$63 ; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$124 = rxData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$25 ) begin end \$125 = rxNewDataIndex; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$125 = rxCurrentWord; end end end endcase end assign externalReadPort__addr = address[3:0]; assign externalWritePort__addr = address[3:0]; assign writeData = externalWritePort__data; assign writeEnable = externalWritePort__en; assign externalReadPort__data = readData; assign internalReadPort__addr = internalReadWriteAddress[3:0]; assign internalWritePort__addr = internalReadWriteAddress[3:0]; assign bram_address = address; assign \$1 = bram_control_mode; assign \$3 = rx_synced; assign { \$23 [7:4], \$23 [2:0] } = { txCurrentWord[7:4], txCurrentWord[2:0] }; assign \$23 [3] = 1'h1; assign \$24 = valid; assign \$25 = start; assign \$26 = \valid$48 ; assign \$27 = \start$49 ; assign \$64 = rx_synced; assign \$193 = 1'h1; assign \$66 = \$191 ; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_C.drive_serial_port.U$3 (sync_100_rst, rx, stage1, sync_100_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:37" *) input rx; wire rx; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) wire rx_synced; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) output stage1; reg stage1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage0 <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage1 <= stage0; assign rx_synced = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_C.drive_serial_port.crc32_rx (sync_100_rst, crc, valid, start, data_in, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$26 = 0; wire [31:0] \$1 ; wire \$10 ; wire \$100 ; wire [31:0] \$1000 ; wire \$1001 ; wire [31:0] \$1002 ; wire \$1003 ; wire [31:0] \$1004 ; wire \$1005 ; wire [31:0] \$1006 ; wire \$1007 ; wire [31:0] \$1008 ; wire \$1009 ; wire [31:0] \$101 ; wire [31:0] \$1010 ; wire \$1011 ; wire [31:0] \$1012 ; wire \$1013 ; wire [31:0] \$1014 ; wire \$1015 ; wire \$1016 ; wire \$1017 ; wire \$1018 ; wire \$1019 ; wire \$102 ; wire \$1020 ; wire \$1021 ; wire \$1022 ; wire \$1023 ; wire \$1024 ; wire \$1025 ; wire \$1026 ; wire \$1027 ; wire \$1028 ; wire \$1029 ; wire [31:0] \$103 ; wire [31:0] \$1030 ; wire \$1031 ; wire [31:0] \$1032 ; wire \$1033 ; wire [31:0] \$1034 ; wire \$1035 ; wire [31:0] \$1036 ; wire \$1037 ; wire [31:0] \$1038 ; wire \$1039 ; wire \$104 ; wire [31:0] \$1040 ; wire \$1041 ; wire [31:0] \$1042 ; wire \$1043 ; wire [31:0] \$1044 ; wire \$1045 ; wire [31:0] \$1046 ; wire \$1047 ; wire [31:0] \$1048 ; wire \$1049 ; wire [31:0] \$105 ; wire [31:0] \$1050 ; wire \$1051 ; wire [31:0] \$1052 ; wire \$1053 ; wire [31:0] \$1054 ; wire \$1055 ; wire \$1056 ; wire \$1057 ; wire \$1058 ; wire \$1059 ; wire \$106 ; wire \$1060 ; wire \$1061 ; wire \$1062 ; wire \$1063 ; wire \$1064 ; wire \$1065 ; wire \$1066 ; wire \$1067 ; wire \$1068 ; wire [31:0] \$1069 ; wire [31:0] \$107 ; wire \$1070 ; wire [31:0] \$1071 ; wire \$1072 ; wire [31:0] \$1073 ; wire \$1074 ; wire [31:0] \$1075 ; wire \$1076 ; wire [31:0] \$1077 ; wire \$1078 ; wire [31:0] \$1079 ; wire \$108 ; wire \$1080 ; wire [31:0] \$1081 ; wire \$1082 ; wire [31:0] \$1083 ; wire \$1084 ; wire [31:0] \$1085 ; wire \$1086 ; wire [31:0] \$1087 ; wire \$1088 ; wire [31:0] \$1089 ; wire [31:0] \$109 ; wire \$1090 ; wire [31:0] \$1091 ; wire \$1092 ; wire [31:0] \$1093 ; wire \$1094 ; wire \$1095 ; wire \$1096 ; wire \$1097 ; wire \$1098 ; wire \$1099 ; wire [31:0] \$11 ; wire \$110 ; wire \$1100 ; wire \$1101 ; wire \$1102 ; wire \$1103 ; wire \$1104 ; wire \$1105 ; wire \$1106 ; wire \$1107 ; wire [31:0] \$1108 ; wire \$1109 ; wire \$111 ; wire [31:0] \$1110 ; wire \$1111 ; wire [31:0] \$1112 ; wire \$1113 ; wire [31:0] \$1114 ; wire \$1115 ; wire [31:0] \$1116 ; wire \$1117 ; wire [31:0] \$1118 ; wire \$1119 ; wire \$112 ; wire [31:0] \$1120 ; wire \$1121 ; wire [31:0] \$1122 ; wire \$1123 ; wire [31:0] \$1124 ; wire \$1125 ; wire [31:0] \$1126 ; wire \$1127 ; wire [31:0] \$1128 ; wire \$1129 ; wire \$113 ; wire [31:0] \$1130 ; wire \$1131 ; wire [31:0] \$1132 ; wire \$1133 ; wire [31:0] \$1134 ; wire \$1135 ; wire [31:0] \$1136 ; wire \$1137 ; wire \$1138 ; wire \$1139 ; wire \$114 ; wire \$1140 ; wire \$1141 ; wire \$1142 ; wire \$1143 ; wire \$1144 ; wire \$1145 ; wire \$1146 ; wire \$1147 ; wire \$1148 ; wire \$1149 ; wire \$115 ; wire \$1150 ; wire \$1151 ; wire \$1152 ; wire [31:0] \$1153 ; wire \$1154 ; wire [31:0] \$1155 ; wire \$1156 ; wire [31:0] \$1157 ; wire \$1158 ; wire [31:0] \$1159 ; wire \$116 ; wire \$1160 ; wire [31:0] \$1161 ; wire \$1162 ; wire [31:0] \$1163 ; wire \$1164 ; wire [31:0] \$1165 ; wire \$1166 ; wire [31:0] \$1167 ; wire \$1168 ; wire [31:0] \$1169 ; wire \$117 ; wire \$1170 ; wire [31:0] \$1171 ; wire \$1172 ; wire [31:0] \$1173 ; wire \$1174 ; wire [31:0] \$1175 ; wire \$1176 ; wire [31:0] \$1177 ; wire \$1178 ; wire [31:0] \$1179 ; wire \$118 ; wire \$1180 ; wire \$1181 ; wire \$1182 ; wire \$1183 ; wire \$1184 ; wire \$1185 ; wire \$1186 ; wire \$1187 ; wire \$1188 ; wire \$1189 ; wire \$119 ; wire \$1190 ; wire \$1191 ; wire \$1192 ; wire \$1193 ; wire \$1194 ; wire [31:0] \$1195 ; wire \$1196 ; wire [31:0] \$1197 ; wire \$1198 ; wire [31:0] \$1199 ; wire \$12 ; wire \$120 ; wire \$1200 ; wire [31:0] \$1201 ; wire \$1202 ; wire [31:0] \$1203 ; wire \$1204 ; wire [31:0] \$1205 ; wire \$1206 ; wire [31:0] \$1207 ; wire \$1208 ; wire [31:0] \$1209 ; wire \$121 ; wire \$1210 ; wire [31:0] \$1211 ; wire \$1212 ; wire [31:0] \$1213 ; wire \$1214 ; wire [31:0] \$1215 ; wire \$1216 ; wire [31:0] \$1217 ; wire \$1218 ; wire [31:0] \$1219 ; wire \$122 ; wire \$1220 ; wire [31:0] \$1221 ; wire \$1222 ; wire \$1223 ; wire \$1224 ; wire \$1225 ; wire \$1226 ; wire \$1227 ; wire \$1228 ; wire \$1229 ; wire \$123 ; wire \$1230 ; wire \$1231 ; wire \$1232 ; wire \$1233 ; wire \$1234 ; wire \$1235 ; wire \$1236 ; wire [31:0] \$1237 ; wire \$1238 ; wire [31:0] \$1239 ; wire \$124 ; wire \$1240 ; wire [31:0] \$1241 ; wire \$1242 ; wire [31:0] \$1243 ; wire \$1244 ; wire [31:0] \$1245 ; wire \$1246 ; wire [31:0] \$1247 ; wire \$1248 ; wire [31:0] \$1249 ; wire \$125 ; wire \$1250 ; wire [31:0] \$1251 ; wire \$1252 ; wire [31:0] \$1253 ; wire \$1254 ; wire [31:0] \$1255 ; wire \$1256 ; wire [31:0] \$1257 ; wire \$1258 ; wire [31:0] \$1259 ; wire \$126 ; wire \$1260 ; wire [31:0] \$1261 ; wire \$1262 ; wire [31:0] \$1263 ; wire \$1264 ; wire \$1265 ; wire \$1266 ; wire \$1267 ; wire \$1268 ; wire \$1269 ; wire [31:0] \$127 ; wire \$1270 ; wire \$1271 ; wire \$1272 ; wire \$1273 ; wire \$1274 ; wire \$1275 ; wire \$1276 ; wire \$1277 ; wire \$1278 ; wire [31:0] \$1279 ; wire \$128 ; wire \$1280 ; wire [31:0] \$1281 ; wire \$1282 ; wire [31:0] \$1283 ; wire \$1284 ; wire [31:0] \$1285 ; wire \$1286 ; wire [31:0] \$1287 ; wire \$1288 ; wire [31:0] \$1289 ; wire [31:0] \$129 ; wire \$1290 ; wire [31:0] \$1291 ; wire \$1292 ; wire [31:0] \$1293 ; wire \$1294 ; wire [31:0] \$1295 ; wire \$1296 ; wire [31:0] \$1297 ; wire \$1298 ; wire [31:0] \$1299 ; wire [31:0] \$13 ; wire \$130 ; wire \$1300 ; wire [31:0] \$1301 ; wire \$1302 ; wire [31:0] \$1303 ; wire \$1304 ; wire \$1305 ; wire \$1306 ; wire \$1307 ; wire \$1308 ; wire \$1309 ; wire [31:0] \$131 ; wire \$1310 ; wire \$1311 ; wire \$1312 ; wire \$1313 ; wire \$1314 ; wire \$1315 ; wire \$1316 ; wire \$1317 ; wire [31:0] \$1318 ; wire \$1319 ; wire \$132 ; wire [31:0] \$1320 ; wire \$1321 ; wire [31:0] \$1322 ; wire \$1323 ; wire [31:0] \$1324 ; wire \$1325 ; wire [31:0] \$1326 ; wire \$1327 ; wire [31:0] \$1328 ; wire \$1329 ; wire [31:0] \$133 ; wire [31:0] \$1330 ; wire \$1331 ; wire [31:0] \$1332 ; wire \$1333 ; wire [31:0] \$1334 ; wire \$1335 ; wire [31:0] \$1336 ; wire \$1337 ; wire [31:0] \$1338 ; wire \$1339 ; wire \$134 ; wire [31:0] \$1340 ; wire \$1341 ; wire [31:0] \$1342 ; wire \$1343 ; wire \$1344 ; wire \$1345 ; wire \$1346 ; wire \$1347 ; wire \$1348 ; wire \$1349 ; wire [31:0] \$135 ; wire \$1350 ; wire \$1351 ; wire \$1352 ; wire \$1353 ; wire \$1354 ; wire \$1355 ; wire \$1356 ; reg [31:0] \$1357 ; wire \$136 ; wire [31:0] \$137 ; wire \$138 ; wire [31:0] \$139 ; wire \$14 ; wire \$140 ; wire [31:0] \$141 ; wire \$142 ; wire [31:0] \$143 ; wire \$144 ; wire [31:0] \$145 ; wire \$146 ; wire [31:0] \$147 ; wire \$148 ; wire [31:0] \$149 ; wire [31:0] \$15 ; wire \$150 ; wire [31:0] \$151 ; wire \$152 ; wire [31:0] \$153 ; wire \$154 ; wire [31:0] \$155 ; wire \$156 ; wire \$157 ; wire \$158 ; wire \$159 ; wire \$16 ; wire \$160 ; wire \$161 ; wire \$162 ; wire \$163 ; wire \$164 ; wire \$165 ; wire \$166 ; wire \$167 ; wire \$168 ; wire \$169 ; wire [31:0] \$17 ; wire \$170 ; wire \$171 ; wire [31:0] \$172 ; wire \$173 ; wire [31:0] \$174 ; wire \$175 ; wire [31:0] \$176 ; wire \$177 ; wire [31:0] \$178 ; wire \$179 ; wire \$18 ; wire [31:0] \$180 ; wire \$181 ; wire [31:0] \$182 ; wire \$183 ; wire [31:0] \$184 ; wire \$185 ; wire [31:0] \$186 ; wire \$187 ; wire [31:0] \$188 ; wire \$189 ; wire [31:0] \$19 ; wire [31:0] \$190 ; wire \$191 ; wire [31:0] \$192 ; wire \$193 ; wire [31:0] \$194 ; wire \$195 ; wire [31:0] \$196 ; wire \$197 ; wire [31:0] \$198 ; wire \$199 ; wire \$2 ; wire \$20 ; wire [31:0] \$200 ; wire \$201 ; wire [31:0] \$202 ; wire \$203 ; wire [31:0] \$204 ; wire \$205 ; wire \$206 ; wire \$207 ; wire \$208 ; wire \$209 ; wire [31:0] \$21 ; wire \$210 ; wire \$211 ; wire \$212 ; wire \$213 ; wire \$214 ; wire \$215 ; wire \$216 ; wire \$217 ; wire \$218 ; wire \$219 ; wire \$22 ; wire \$220 ; wire \$221 ; wire \$222 ; wire [31:0] \$223 ; wire \$224 ; wire [31:0] \$225 ; wire \$226 ; wire [31:0] \$227 ; wire \$228 ; wire [31:0] \$229 ; wire [31:0] \$23 ; wire \$230 ; wire [31:0] \$231 ; wire \$232 ; wire [31:0] \$233 ; wire \$234 ; wire [31:0] \$235 ; wire \$236 ; wire [31:0] \$237 ; wire \$238 ; wire [31:0] \$239 ; wire \$24 ; wire \$240 ; wire [31:0] \$241 ; wire \$242 ; wire [31:0] \$243 ; wire \$244 ; wire [31:0] \$245 ; wire \$246 ; wire [31:0] \$247 ; wire \$248 ; wire [31:0] \$249 ; wire [31:0] \$25 ; wire \$250 ; wire [31:0] \$251 ; wire \$252 ; wire \$253 ; wire \$254 ; wire \$255 ; wire \$256 ; wire \$257 ; wire \$258 ; wire \$259 ; wire \$26 ; wire \$260 ; wire \$261 ; wire \$262 ; wire \$263 ; wire \$264 ; wire \$265 ; wire \$266 ; wire \$267 ; wire [31:0] \$268 ; wire \$269 ; wire \$27 ; wire [31:0] \$270 ; wire \$271 ; wire [31:0] \$272 ; wire \$273 ; wire [31:0] \$274 ; wire \$275 ; wire [31:0] \$276 ; wire \$277 ; wire [31:0] \$278 ; wire \$279 ; wire \$28 ; wire [31:0] \$280 ; wire \$281 ; wire [31:0] \$282 ; wire \$283 ; wire [31:0] \$284 ; wire \$285 ; wire [31:0] \$286 ; wire \$287 ; wire [31:0] \$288 ; wire \$289 ; wire \$29 ; wire [31:0] \$290 ; wire \$291 ; wire [31:0] \$292 ; wire \$293 ; wire [31:0] \$294 ; wire \$295 ; wire [31:0] \$296 ; wire \$297 ; wire \$298 ; wire \$299 ; wire [31:0] \$3 ; wire \$30 ; wire \$300 ; wire \$301 ; wire \$302 ; wire \$303 ; wire \$304 ; wire \$305 ; wire \$306 ; wire \$307 ; wire \$308 ; wire \$309 ; wire \$31 ; wire \$310 ; wire \$311 ; wire \$312 ; wire [31:0] \$313 ; wire \$314 ; wire [31:0] \$315 ; wire \$316 ; wire [31:0] \$317 ; wire \$318 ; wire [31:0] \$319 ; wire \$32 ; wire \$320 ; wire [31:0] \$321 ; wire \$322 ; wire [31:0] \$323 ; wire \$324 ; wire [31:0] \$325 ; wire \$326 ; wire [31:0] \$327 ; wire \$328 ; wire [31:0] \$329 ; wire \$33 ; wire \$330 ; wire [31:0] \$331 ; wire \$332 ; wire [31:0] \$333 ; wire \$334 ; wire [31:0] \$335 ; wire \$336 ; wire [31:0] \$337 ; wire \$338 ; wire [31:0] \$339 ; wire \$34 ; wire \$340 ; wire [31:0] \$341 ; wire \$342 ; wire [31:0] \$343 ; wire \$344 ; wire \$345 ; wire \$346 ; wire \$347 ; wire \$348 ; wire \$349 ; wire \$35 ; wire \$350 ; wire \$351 ; wire \$352 ; wire \$353 ; wire \$354 ; wire \$355 ; wire \$356 ; wire \$357 ; wire \$358 ; wire \$359 ; wire \$36 ; wire \$360 ; wire [31:0] \$361 ; wire \$362 ; wire [31:0] \$363 ; wire \$364 ; wire [31:0] \$365 ; wire \$366 ; wire [31:0] \$367 ; wire \$368 ; wire [31:0] \$369 ; wire \$37 ; wire \$370 ; wire [31:0] \$371 ; wire \$372 ; wire [31:0] \$373 ; wire \$374 ; wire [31:0] \$375 ; wire \$376 ; wire [31:0] \$377 ; wire \$378 ; wire [31:0] \$379 ; wire \$38 ; wire \$380 ; wire [31:0] \$381 ; wire \$382 ; wire [31:0] \$383 ; wire \$384 ; wire [31:0] \$385 ; wire \$386 ; wire \$387 ; wire \$388 ; wire \$389 ; wire \$39 ; wire \$390 ; wire \$391 ; wire \$392 ; wire \$393 ; wire \$394 ; wire \$395 ; wire \$396 ; wire \$397 ; wire \$398 ; wire \$399 ; wire \$4 ; wire [31:0] \$40 ; wire [31:0] \$400 ; wire \$401 ; wire [31:0] \$402 ; wire \$403 ; wire [31:0] \$404 ; wire \$405 ; wire [31:0] \$406 ; wire \$407 ; wire [31:0] \$408 ; wire \$409 ; wire \$41 ; wire [31:0] \$410 ; wire \$411 ; wire [31:0] \$412 ; wire \$413 ; wire [31:0] \$414 ; wire \$415 ; wire [31:0] \$416 ; wire \$417 ; wire [31:0] \$418 ; wire \$419 ; wire [31:0] \$42 ; wire [31:0] \$420 ; wire \$421 ; wire [31:0] \$422 ; wire \$423 ; wire \$424 ; wire \$425 ; wire \$426 ; wire \$427 ; wire \$428 ; wire \$429 ; wire \$43 ; wire \$430 ; wire \$431 ; wire \$432 ; wire \$433 ; wire \$434 ; wire \$435 ; wire [31:0] \$436 ; wire \$437 ; wire [31:0] \$438 ; wire \$439 ; wire [31:0] \$44 ; wire [31:0] \$440 ; wire \$441 ; wire [31:0] \$442 ; wire \$443 ; wire [31:0] \$444 ; wire \$445 ; wire [31:0] \$446 ; wire \$447 ; wire [31:0] \$448 ; wire \$449 ; wire \$45 ; wire [31:0] \$450 ; wire \$451 ; wire [31:0] \$452 ; wire \$453 ; wire [31:0] \$454 ; wire \$455 ; wire [31:0] \$456 ; wire \$457 ; wire [31:0] \$458 ; wire \$459 ; wire [31:0] \$46 ; wire [31:0] \$460 ; wire \$461 ; wire \$462 ; wire \$463 ; wire \$464 ; wire \$465 ; wire \$466 ; wire \$467 ; wire \$468 ; wire \$469 ; wire \$47 ; wire \$470 ; wire \$471 ; wire \$472 ; wire \$473 ; wire \$474 ; wire [31:0] \$475 ; wire \$476 ; wire [31:0] \$477 ; wire \$478 ; wire [31:0] \$479 ; wire [31:0] \$48 ; wire \$480 ; wire [31:0] \$481 ; wire \$482 ; wire [31:0] \$483 ; wire \$484 ; wire [31:0] \$485 ; wire \$486 ; wire [31:0] \$487 ; wire \$488 ; wire [31:0] \$489 ; wire \$49 ; wire \$490 ; wire [31:0] \$491 ; wire \$492 ; wire [31:0] \$493 ; wire \$494 ; wire [31:0] \$495 ; wire \$496 ; wire [31:0] \$497 ; wire \$498 ; wire [31:0] \$499 ; wire [31:0] \$5 ; wire [31:0] \$50 ; wire \$500 ; wire [31:0] \$501 ; wire \$502 ; wire [31:0] \$503 ; wire \$504 ; wire [31:0] \$505 ; wire \$506 ; wire [31:0] \$507 ; wire \$508 ; wire \$509 ; wire \$51 ; wire \$510 ; wire \$511 ; wire \$512 ; wire \$513 ; wire \$514 ; wire \$515 ; wire \$516 ; wire \$517 ; wire \$518 ; wire \$519 ; wire [31:0] \$52 ; wire \$520 ; wire \$521 ; wire \$522 ; wire \$523 ; wire \$524 ; wire \$525 ; wire [31:0] \$526 ; wire \$527 ; wire [31:0] \$528 ; wire \$529 ; wire \$53 ; wire [31:0] \$530 ; wire \$531 ; wire [31:0] \$532 ; wire \$533 ; wire [31:0] \$534 ; wire \$535 ; wire [31:0] \$536 ; wire \$537 ; wire [31:0] \$538 ; wire \$539 ; wire [31:0] \$54 ; wire [31:0] \$540 ; wire \$541 ; wire [31:0] \$542 ; wire \$543 ; wire [31:0] \$544 ; wire \$545 ; wire [31:0] \$546 ; wire \$547 ; wire [31:0] \$548 ; wire \$549 ; wire \$55 ; wire [31:0] \$550 ; wire \$551 ; wire [31:0] \$552 ; wire \$553 ; wire [31:0] \$554 ; wire \$555 ; wire [31:0] \$556 ; wire \$557 ; wire [31:0] \$558 ; wire \$559 ; wire [31:0] \$56 ; wire \$560 ; wire \$561 ; wire \$562 ; wire \$563 ; wire \$564 ; wire \$565 ; wire \$566 ; wire \$567 ; wire \$568 ; wire \$569 ; wire \$57 ; wire \$570 ; wire \$571 ; wire \$572 ; wire \$573 ; wire \$574 ; wire \$575 ; wire \$576 ; wire [31:0] \$577 ; wire \$578 ; wire [31:0] \$579 ; wire [31:0] \$58 ; wire \$580 ; wire [31:0] \$581 ; wire \$582 ; wire [31:0] \$583 ; wire \$584 ; wire [31:0] \$585 ; wire \$586 ; wire [31:0] \$587 ; wire \$588 ; wire [31:0] \$589 ; wire \$59 ; wire \$590 ; wire [31:0] \$591 ; wire \$592 ; wire [31:0] \$593 ; wire \$594 ; wire [31:0] \$595 ; wire \$596 ; wire [31:0] \$597 ; wire \$598 ; wire [31:0] \$599 ; wire \$6 ; wire [31:0] \$60 ; wire \$600 ; wire [31:0] \$601 ; wire \$602 ; wire [31:0] \$603 ; wire \$604 ; wire [31:0] \$605 ; wire \$606 ; wire [31:0] \$607 ; wire \$608 ; wire \$609 ; wire \$61 ; wire \$610 ; wire \$611 ; wire \$612 ; wire \$613 ; wire \$614 ; wire \$615 ; wire \$616 ; wire \$617 ; wire \$618 ; wire \$619 ; wire [31:0] \$62 ; wire \$620 ; wire \$621 ; wire \$622 ; wire \$623 ; wire \$624 ; wire [31:0] \$625 ; wire \$626 ; wire [31:0] \$627 ; wire \$628 ; wire [31:0] \$629 ; wire \$63 ; wire \$630 ; wire [31:0] \$631 ; wire \$632 ; wire [31:0] \$633 ; wire \$634 ; wire [31:0] \$635 ; wire \$636 ; wire [31:0] \$637 ; wire \$638 ; wire [31:0] \$639 ; wire [31:0] \$64 ; wire \$640 ; wire [31:0] \$641 ; wire \$642 ; wire [31:0] \$643 ; wire \$644 ; wire [31:0] \$645 ; wire \$646 ; wire [31:0] \$647 ; wire \$648 ; wire [31:0] \$649 ; wire \$65 ; wire \$650 ; wire [31:0] \$651 ; wire \$652 ; wire [31:0] \$653 ; wire \$654 ; wire \$655 ; wire \$656 ; wire \$657 ; wire \$658 ; wire \$659 ; wire \$66 ; wire \$660 ; wire \$661 ; wire \$662 ; wire \$663 ; wire \$664 ; wire \$665 ; wire \$666 ; wire \$667 ; wire \$668 ; wire \$669 ; wire \$67 ; wire [31:0] \$670 ; wire \$671 ; wire [31:0] \$672 ; wire \$673 ; wire [31:0] \$674 ; wire \$675 ; wire [31:0] \$676 ; wire \$677 ; wire [31:0] \$678 ; wire \$679 ; wire \$68 ; wire [31:0] \$680 ; wire \$681 ; wire [31:0] \$682 ; wire \$683 ; wire [31:0] \$684 ; wire \$685 ; wire [31:0] \$686 ; wire \$687 ; wire [31:0] \$688 ; wire \$689 ; wire \$69 ; wire [31:0] \$690 ; wire \$691 ; wire [31:0] \$692 ; wire \$693 ; wire [31:0] \$694 ; wire \$695 ; wire [31:0] \$696 ; wire \$697 ; wire [31:0] \$698 ; wire \$699 ; wire [31:0] \$7 ; wire \$70 ; wire \$700 ; wire \$701 ; wire \$702 ; wire \$703 ; wire \$704 ; wire \$705 ; wire \$706 ; wire \$707 ; wire \$708 ; wire \$709 ; wire \$71 ; wire \$710 ; wire \$711 ; wire \$712 ; wire \$713 ; wire \$714 ; wire [31:0] \$715 ; wire \$716 ; wire [31:0] \$717 ; wire \$718 ; wire [31:0] \$719 ; wire \$72 ; wire \$720 ; wire [31:0] \$721 ; wire \$722 ; wire [31:0] \$723 ; wire \$724 ; wire [31:0] \$725 ; wire \$726 ; wire [31:0] \$727 ; wire \$728 ; wire [31:0] \$729 ; wire \$73 ; wire \$730 ; wire [31:0] \$731 ; wire \$732 ; wire [31:0] \$733 ; wire \$734 ; wire [31:0] \$735 ; wire \$736 ; wire [31:0] \$737 ; wire \$738 ; wire [31:0] \$739 ; wire \$74 ; wire \$740 ; wire [31:0] \$741 ; wire \$742 ; wire \$743 ; wire \$744 ; wire \$745 ; wire \$746 ; wire \$747 ; wire \$748 ; wire \$749 ; wire \$75 ; wire \$750 ; wire \$751 ; wire \$752 ; wire \$753 ; wire \$754 ; wire \$755 ; wire \$756 ; wire [31:0] \$757 ; wire \$758 ; wire [31:0] \$759 ; wire \$76 ; wire \$760 ; wire [31:0] \$761 ; wire \$762 ; wire [31:0] \$763 ; wire \$764 ; wire [31:0] \$765 ; wire \$766 ; wire [31:0] \$767 ; wire \$768 ; wire [31:0] \$769 ; wire \$77 ; wire \$770 ; wire [31:0] \$771 ; wire \$772 ; wire [31:0] \$773 ; wire \$774 ; wire [31:0] \$775 ; wire \$776 ; wire [31:0] \$777 ; wire \$778 ; wire [31:0] \$779 ; wire \$78 ; wire \$780 ; wire [31:0] \$781 ; wire \$782 ; wire [31:0] \$783 ; wire \$784 ; wire \$785 ; wire \$786 ; wire \$787 ; wire \$788 ; wire \$789 ; wire [31:0] \$79 ; wire \$790 ; wire \$791 ; wire \$792 ; wire \$793 ; wire \$794 ; wire \$795 ; wire \$796 ; wire \$797 ; wire \$798 ; wire [31:0] \$799 ; wire \$8 ; wire \$80 ; wire \$800 ; wire [31:0] \$801 ; wire \$802 ; wire [31:0] \$803 ; wire \$804 ; wire [31:0] \$805 ; wire \$806 ; wire [31:0] \$807 ; wire \$808 ; wire [31:0] \$809 ; wire [31:0] \$81 ; wire \$810 ; wire [31:0] \$811 ; wire \$812 ; wire [31:0] \$813 ; wire \$814 ; wire [31:0] \$815 ; wire \$816 ; wire [31:0] \$817 ; wire \$818 ; wire [31:0] \$819 ; wire \$82 ; wire \$820 ; wire [31:0] \$821 ; wire \$822 ; wire [31:0] \$823 ; wire \$824 ; wire \$825 ; wire \$826 ; wire \$827 ; wire \$828 ; wire \$829 ; wire [31:0] \$83 ; wire \$830 ; wire \$831 ; wire \$832 ; wire \$833 ; wire \$834 ; wire \$835 ; wire \$836 ; wire \$837 ; wire [31:0] \$838 ; wire \$839 ; wire \$84 ; wire [31:0] \$840 ; wire \$841 ; wire [31:0] \$842 ; wire \$843 ; wire [31:0] \$844 ; wire \$845 ; wire [31:0] \$846 ; wire \$847 ; wire [31:0] \$848 ; wire \$849 ; wire [31:0] \$85 ; wire [31:0] \$850 ; wire \$851 ; wire [31:0] \$852 ; wire \$853 ; wire [31:0] \$854 ; wire \$855 ; wire [31:0] \$856 ; wire \$857 ; wire [31:0] \$858 ; wire \$859 ; wire \$86 ; wire [31:0] \$860 ; wire \$861 ; wire \$862 ; wire \$863 ; wire \$864 ; wire \$865 ; wire \$866 ; wire \$867 ; wire \$868 ; wire \$869 ; wire [31:0] \$87 ; wire \$870 ; wire \$871 ; wire \$872 ; wire \$873 ; wire [31:0] \$874 ; wire \$875 ; wire [31:0] \$876 ; wire \$877 ; wire [31:0] \$878 ; wire \$879 ; wire \$88 ; wire [31:0] \$880 ; wire \$881 ; wire [31:0] \$882 ; wire \$883 ; wire [31:0] \$884 ; wire \$885 ; wire [31:0] \$886 ; wire \$887 ; wire [31:0] \$888 ; wire \$889 ; wire [31:0] \$89 ; wire [31:0] \$890 ; wire \$891 ; wire [31:0] \$892 ; wire \$893 ; wire [31:0] \$894 ; wire \$895 ; wire [31:0] \$896 ; wire \$897 ; wire \$898 ; wire \$899 ; wire [31:0] \$9 ; wire \$90 ; wire \$900 ; wire \$901 ; wire \$902 ; wire \$903 ; wire \$904 ; wire \$905 ; wire \$906 ; wire \$907 ; wire \$908 ; wire \$909 ; wire [31:0] \$91 ; wire [31:0] \$910 ; wire \$911 ; wire [31:0] \$912 ; wire \$913 ; wire [31:0] \$914 ; wire \$915 ; wire [31:0] \$916 ; wire \$917 ; wire [31:0] \$918 ; wire \$919 ; wire \$92 ; wire [31:0] \$920 ; wire \$921 ; wire [31:0] \$922 ; wire \$923 ; wire [31:0] \$924 ; wire \$925 ; wire [31:0] \$926 ; wire \$927 ; wire [31:0] \$928 ; wire \$929 ; wire [31:0] \$93 ; wire [31:0] \$930 ; wire \$931 ; wire [31:0] \$932 ; wire \$933 ; wire \$934 ; wire \$935 ; wire \$936 ; wire \$937 ; wire \$938 ; wire \$939 ; wire \$94 ; wire \$940 ; wire \$941 ; wire \$942 ; wire \$943 ; wire \$944 ; wire \$945 ; wire [31:0] \$946 ; wire \$947 ; wire [31:0] \$948 ; wire \$949 ; wire [31:0] \$95 ; wire [31:0] \$950 ; wire \$951 ; wire [31:0] \$952 ; wire \$953 ; wire [31:0] \$954 ; wire \$955 ; wire [31:0] \$956 ; wire \$957 ; wire [31:0] \$958 ; wire \$959 ; wire \$96 ; wire [31:0] \$960 ; wire \$961 ; wire [31:0] \$962 ; wire \$963 ; wire [31:0] \$964 ; wire \$965 ; wire [31:0] \$966 ; wire \$967 ; wire [31:0] \$968 ; wire \$969 ; wire [31:0] \$97 ; wire [31:0] \$970 ; wire \$971 ; wire [31:0] \$972 ; wire \$973 ; wire \$974 ; wire \$975 ; wire \$976 ; wire \$977 ; wire \$978 ; wire \$979 ; wire \$98 ; wire \$980 ; wire \$981 ; wire \$982 ; wire \$983 ; wire \$984 ; wire \$985 ; wire \$986 ; wire \$987 ; wire [31:0] \$988 ; wire \$989 ; wire [31:0] \$99 ; wire [31:0] \$990 ; wire \$991 ; wire [31:0] \$992 ; wire \$993 ; wire [31:0] \$994 ; wire \$995 ; wire [31:0] \$996 ; wire \$997 ; wire [31:0] \$998 ; wire \$999 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [31:0] crc; wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [31:0] crc_reg = 32'd4294967295; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire [31:0] data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input [31:0] data_in; wire [31:0] data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:356" *) crc_reg; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$3 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$4 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$3 [6]; assign \$5 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$6 = \$4 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$5 [9]; assign \$7 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$8 = \$6 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$7 [10]; assign \$9 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$10 = \$8 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$9 [12]; assign \$11 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$12 = \$10 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$11 [16]; assign \$13 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$14 = \$12 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$13 [24]; assign \$15 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$16 = \$14 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$15 [25]; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$18 = \$16 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$17 [26]; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$20 = \$18 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$19 [28]; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$22 = \$20 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$21 [29]; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$24 = \$22 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$23 [30]; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$26 = \$24 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$25 [31]; assign \$27 = \$26 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$28 = \$27 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$29 = \$28 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$30 = \$29 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$31 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$32 = \$31 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$34 = \$33 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$35 = \$34 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$36 = \$35 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$37 = \$36 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$38 = \$37 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$39 = \$38 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$40 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$42 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$43 = \$41 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$42 [1]; assign \$44 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$45 = \$43 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$44 [6]; assign \$46 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$47 = \$45 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$46 [7]; assign \$48 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$49 = \$47 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$48 [9]; assign \$50 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$51 = \$49 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$50 [11]; assign \$52 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$53 = \$51 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$52 [12]; assign \$54 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$55 = \$53 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$54 [13]; assign \$56 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$57 = \$55 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$56 [16]; assign \$58 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$59 = \$57 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$58 [17]; assign \$60 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$61 = \$59 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$60 [24]; assign \$62 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$63 = \$61 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$62 [27]; assign \$64 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$65 = \$63 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$64 [28]; assign \$66 = \$65 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$67 = \$66 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$68 = \$67 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$69 = \$68 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$70 = \$69 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$71 = \$70 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$72 = \$71 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$73 = \$72 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$74 = \$73 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$75 = \$74 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$76 = \$75 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$77 = \$76 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$78 = \$77 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$79 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$81 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$82 = \$80 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$81 [1]; assign \$83 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$84 = \$82 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$83 [2]; assign \$85 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$86 = \$84 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$85 [6]; assign \$87 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$88 = \$86 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$87 [7]; assign \$89 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$90 = \$88 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$89 [8]; assign \$91 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$92 = \$90 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$91 [9]; assign \$93 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$94 = \$92 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$93 [13]; assign \$95 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$96 = \$94 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$95 [14]; assign \$97 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$98 = \$96 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$97 [16]; assign \$99 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$100 = \$98 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$99 [17]; assign \$101 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$102 = \$100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$101 [18]; assign \$103 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$104 = \$102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$103 [24]; assign \$105 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$106 = \$104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$105 [26]; assign \$107 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$108 = \$106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$107 [30]; assign \$109 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$110 = \$108 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$109 [31]; assign \$111 = \$110 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$112 = \$111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$113 = \$112 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$114 = \$113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$115 = \$114 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$116 = \$115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$117 = \$116 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$118 = \$117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$119 = \$118 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$120 = \$119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$121 = \$120 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$122 = \$121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$123 = \$122 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$124 = \$123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$125 = \$124 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$126 = \$125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$127 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$129 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$130 = \$128 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$129 [2]; assign \$131 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$132 = \$130 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$131 [3]; assign \$133 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$134 = \$132 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$133 [7]; assign \$135 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$136 = \$134 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$135 [8]; assign \$137 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$138 = \$136 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$137 [9]; assign \$139 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$140 = \$138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$139 [10]; assign \$141 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$142 = \$140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$141 [14]; assign \$143 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$144 = \$142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$143 [15]; assign \$145 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$146 = \$144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$145 [17]; assign \$147 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$148 = \$146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$147 [18]; assign \$149 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$150 = \$148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$149 [19]; assign \$151 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$152 = \$150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$151 [25]; assign \$153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$154 = \$152 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$153 [27]; assign \$155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$156 = \$154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$155 [31]; assign \$157 = \$156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$158 = \$157 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$159 = \$158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$160 = \$159 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$161 = \$160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$162 = \$161 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$163 = \$162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$164 = \$163 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$165 = \$164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$166 = \$165 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$167 = \$166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$168 = \$167 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$169 = \$168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$170 = \$169 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$171 = \$170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$172 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$174 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$175 = \$173 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$174 [2]; assign \$176 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$177 = \$175 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$176 [3]; assign \$178 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$179 = \$177 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$178 [4]; assign \$180 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$181 = \$179 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$180 [6]; assign \$182 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$183 = \$181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$182 [8]; assign \$184 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$185 = \$183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$184 [11]; assign \$186 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$187 = \$185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$186 [12]; assign \$188 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$189 = \$187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$188 [15]; assign \$190 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$191 = \$189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$190 [18]; assign \$192 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$193 = \$191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$192 [19]; assign \$194 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$195 = \$193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$194 [20]; assign \$196 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$197 = \$195 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$196 [24]; assign \$198 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$199 = \$197 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$198 [25]; assign \$200 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$201 = \$199 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$200 [29]; assign \$202 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$203 = \$201 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$202 [30]; assign \$204 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$205 = \$203 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$204 [31]; assign \$206 = \$205 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$207 = \$206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$208 = \$207 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$209 = \$208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$210 = \$209 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$211 = \$210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$212 = \$211 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$213 = \$212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$214 = \$213 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$215 = \$214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$216 = \$215 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$217 = \$216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$218 = \$217 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$219 = \$218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$220 = \$219 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$221 = \$220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$222 = \$221 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$223 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$225 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$226 = \$224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$225 [1]; assign \$227 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$228 = \$226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$227 [3]; assign \$229 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$230 = \$228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$229 [4]; assign \$231 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$232 = \$230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$231 [5]; assign \$233 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$234 = \$232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$233 [6]; assign \$235 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$236 = \$234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$235 [7]; assign \$237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$238 = \$236 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$237 [10]; assign \$239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$240 = \$238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$239 [13]; assign \$241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$242 = \$240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$241 [19]; assign \$243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$244 = \$242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$243 [20]; assign \$245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$246 = \$244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$245 [21]; assign \$247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$248 = \$246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$247 [24]; assign \$249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$250 = \$248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$249 [28]; assign \$251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$252 = \$250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$251 [29]; assign \$253 = \$252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$254 = \$253 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$255 = \$254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$256 = \$255 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$257 = \$256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$258 = \$257 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$259 = \$258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$260 = \$259 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$261 = \$260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$262 = \$261 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$263 = \$262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$264 = \$263 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$265 = \$264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$266 = \$265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$267 = \$266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$268 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$270 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$271 = \$269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$270 [2]; assign \$272 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$273 = \$271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$272 [4]; assign \$274 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$275 = \$273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$274 [5]; assign \$276 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$277 = \$275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$276 [6]; assign \$278 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$279 = \$277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$278 [7]; assign \$280 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$281 = \$279 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$280 [8]; assign \$282 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$283 = \$281 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$282 [11]; assign \$284 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$285 = \$283 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$284 [14]; assign \$286 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$287 = \$285 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$286 [20]; assign \$288 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$289 = \$287 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$288 [21]; assign \$290 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$291 = \$289 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$290 [22]; assign \$292 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$293 = \$291 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$292 [25]; assign \$294 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$295 = \$293 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$294 [29]; assign \$296 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$297 = \$295 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$296 [30]; assign \$298 = \$297 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$299 = \$298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$300 = \$299 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$301 = \$300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$302 = \$301 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$303 = \$302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$304 = \$303 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$305 = \$304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$306 = \$305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$307 = \$306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$308 = \$307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$309 = \$308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$310 = \$309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$311 = \$310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$312 = \$311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$313 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$315 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$316 = \$314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$315 [2]; assign \$317 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$318 = \$316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$317 [3]; assign \$319 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$320 = \$318 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$319 [5]; assign \$321 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$322 = \$320 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$321 [7]; assign \$323 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$324 = \$322 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$323 [8]; assign \$325 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$326 = \$324 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$325 [10]; assign \$327 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$328 = \$326 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$327 [15]; assign \$329 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$330 = \$328 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$329 [16]; assign \$331 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$332 = \$330 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$331 [21]; assign \$333 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$334 = \$332 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$333 [22]; assign \$335 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$336 = \$334 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$335 [23]; assign \$337 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$338 = \$336 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$337 [24]; assign \$339 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$340 = \$338 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$339 [25]; assign \$341 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$342 = \$340 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$341 [28]; assign \$343 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$344 = \$342 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$343 [29]; assign \$345 = \$344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$346 = \$345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$347 = \$346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$348 = \$347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$349 = \$348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$350 = \$349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$351 = \$350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$352 = \$351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$353 = \$352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$354 = \$353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$355 = \$354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$356 = \$355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$357 = \$356 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$358 = \$357 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$359 = \$358 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$360 = \$359 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$361 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$363 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$364 = \$362 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$363 [1]; assign \$365 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$366 = \$364 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$365 [3]; assign \$367 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$368 = \$366 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$367 [4]; assign \$369 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$370 = \$368 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$369 [8]; assign \$371 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$372 = \$370 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$371 [10]; assign \$373 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$374 = \$372 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$373 [11]; assign \$375 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$376 = \$374 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$375 [12]; assign \$377 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$378 = \$376 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$377 [17]; assign \$379 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$380 = \$378 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$379 [22]; assign \$381 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$382 = \$380 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$381 [23]; assign \$383 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$384 = \$382 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$383 [28]; assign \$385 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$386 = \$384 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$385 [31]; assign \$387 = \$386 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$388 = \$387 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$389 = \$388 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$390 = \$389 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$391 = \$390 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$392 = \$391 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$393 = \$392 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$394 = \$393 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$395 = \$394 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$396 = \$395 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$397 = \$396 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$398 = \$397 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$399 = \$398 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$400 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$402 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$403 = \$401 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$402 [2]; assign \$404 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$405 = \$403 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$404 [4]; assign \$406 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$407 = \$405 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$406 [5]; assign \$408 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$409 = \$407 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$408 [9]; assign \$410 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$411 = \$409 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$410 [11]; assign \$412 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$413 = \$411 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$412 [12]; assign \$414 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$415 = \$413 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$414 [13]; assign \$416 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$417 = \$415 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$416 [18]; assign \$418 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$419 = \$417 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$418 [23]; assign \$420 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$421 = \$419 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$420 [24]; assign \$422 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$423 = \$421 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$422 [29]; assign \$424 = \$423 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$425 = \$424 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$426 = \$425 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$427 = \$426 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$428 = \$427 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$429 = \$428 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$430 = \$429 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$431 = \$430 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$432 = \$431 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$433 = \$432 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$434 = \$433 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$435 = \$434 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$436 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$438 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$439 = \$437 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$438 [2]; assign \$440 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$441 = \$439 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$440 [3]; assign \$442 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$443 = \$441 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$442 [5]; assign \$444 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$445 = \$443 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$444 [9]; assign \$446 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$447 = \$445 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$446 [13]; assign \$448 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$449 = \$447 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$448 [14]; assign \$450 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$451 = \$449 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$450 [16]; assign \$452 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$453 = \$451 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$452 [19]; assign \$454 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$455 = \$453 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$454 [26]; assign \$456 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$457 = \$455 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$456 [28]; assign \$458 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$459 = \$457 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$458 [29]; assign \$460 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$461 = \$459 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$460 [31]; assign \$462 = \$461 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$463 = \$462 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$464 = \$463 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$465 = \$464 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$466 = \$465 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$467 = \$466 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$468 = \$467 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$469 = \$468 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$470 = \$469 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$471 = \$470 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$472 = \$471 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$473 = \$472 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$474 = \$473 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$475 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$477 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$478 = \$476 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$477 [1]; assign \$479 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$480 = \$478 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$479 [3]; assign \$481 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$482 = \$480 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$481 [4]; assign \$483 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$484 = \$482 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$483 [9]; assign \$485 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$486 = \$484 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$485 [12]; assign \$487 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$488 = \$486 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$487 [14]; assign \$489 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$490 = \$488 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$489 [15]; assign \$491 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$492 = \$490 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$491 [16]; assign \$493 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$494 = \$492 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$493 [17]; assign \$495 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$496 = \$494 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$495 [20]; assign \$497 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$498 = \$496 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$497 [24]; assign \$499 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$500 = \$498 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$499 [25]; assign \$501 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$502 = \$500 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$501 [26]; assign \$503 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$504 = \$502 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$503 [27]; assign \$505 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$506 = \$504 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$505 [28]; assign \$507 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$508 = \$506 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$507 [31]; assign \$509 = \$508 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$510 = \$509 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$511 = \$510 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$512 = \$511 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$513 = \$512 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$514 = \$513 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$515 = \$514 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$516 = \$515 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$517 = \$516 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$518 = \$517 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$519 = \$518 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$520 = \$519 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$521 = \$520 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$522 = \$521 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$523 = \$522 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$524 = \$523 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$525 = \$524 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$526 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$528 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$529 = \$527 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$528 [1]; assign \$530 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$531 = \$529 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$530 [2]; assign \$532 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$533 = \$531 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$532 [4]; assign \$534 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$535 = \$533 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$534 [5]; assign \$536 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$537 = \$535 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$536 [6]; assign \$538 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$539 = \$537 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$538 [9]; assign \$540 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$541 = \$539 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$540 [12]; assign \$542 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$543 = \$541 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$542 [13]; assign \$544 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$545 = \$543 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$544 [15]; assign \$546 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$547 = \$545 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$546 [17]; assign \$548 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$549 = \$547 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$548 [18]; assign \$550 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$551 = \$549 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$550 [21]; assign \$552 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$553 = \$551 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$552 [24]; assign \$554 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$555 = \$553 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$554 [27]; assign \$556 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$557 = \$555 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$556 [30]; assign \$558 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$559 = \$557 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$558 [31]; assign \$560 = \$559 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$561 = \$560 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$562 = \$561 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$563 = \$562 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$564 = \$563 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$565 = \$564 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$566 = \$565 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$567 = \$566 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$568 = \$567 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$569 = \$568 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$570 = \$569 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$571 = \$570 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$572 = \$571 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$573 = \$572 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$574 = \$573 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$575 = \$574 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$576 = \$575 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$577 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$579 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$580 = \$578 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$579 [2]; assign \$581 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$582 = \$580 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$581 [3]; assign \$583 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$584 = \$582 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$583 [5]; assign \$585 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$586 = \$584 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$585 [6]; assign \$587 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$588 = \$586 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$587 [7]; assign \$589 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$590 = \$588 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$589 [10]; assign \$591 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$592 = \$590 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$591 [13]; assign \$593 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$594 = \$592 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$593 [14]; assign \$595 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$596 = \$594 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$595 [16]; assign \$597 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$598 = \$596 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$597 [18]; assign \$599 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$600 = \$598 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$599 [19]; assign \$601 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$602 = \$600 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$601 [22]; assign \$603 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$604 = \$602 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$603 [25]; assign \$605 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$606 = \$604 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$605 [28]; assign \$607 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$608 = \$606 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$607 [31]; assign \$609 = \$608 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$610 = \$609 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$611 = \$610 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$612 = \$611 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$613 = \$612 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$614 = \$613 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$615 = \$614 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$616 = \$615 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$617 = \$616 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$618 = \$617 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$619 = \$618 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$620 = \$619 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$621 = \$620 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$622 = \$621 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$623 = \$622 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$624 = \$623 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$625 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$627 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$628 = \$626 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$627 [3]; assign \$629 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$630 = \$628 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$629 [4]; assign \$631 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$632 = \$630 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$631 [6]; assign \$633 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$634 = \$632 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$633 [7]; assign \$635 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$636 = \$634 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$635 [8]; assign \$637 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$638 = \$636 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$637 [11]; assign \$639 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$640 = \$638 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$639 [14]; assign \$641 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$642 = \$640 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$641 [15]; assign \$643 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$644 = \$642 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$643 [17]; assign \$645 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$646 = \$644 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$645 [19]; assign \$647 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$648 = \$646 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$647 [20]; assign \$649 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$650 = \$648 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$649 [23]; assign \$651 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$652 = \$650 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$651 [26]; assign \$653 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$654 = \$652 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$653 [29]; assign \$655 = \$654 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$656 = \$655 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$657 = \$656 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$658 = \$657 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$659 = \$658 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$660 = \$659 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$661 = \$660 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$662 = \$661 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$663 = \$662 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$664 = \$663 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$665 = \$664 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$666 = \$665 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$667 = \$666 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$668 = \$667 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$669 = \$668 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$670 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$672 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$673 = \$671 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$672 [4]; assign \$674 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$675 = \$673 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$674 [5]; assign \$676 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$677 = \$675 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$676 [7]; assign \$678 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$679 = \$677 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$678 [8]; assign \$680 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$681 = \$679 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$680 [9]; assign \$682 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$683 = \$681 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$682 [12]; assign \$684 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$685 = \$683 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$684 [15]; assign \$686 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$687 = \$685 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$686 [16]; assign \$688 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$689 = \$687 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$688 [18]; assign \$690 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$691 = \$689 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$690 [20]; assign \$692 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$693 = \$691 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$692 [21]; assign \$694 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$695 = \$693 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$694 [24]; assign \$696 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$697 = \$695 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$696 [27]; assign \$698 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$699 = \$697 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$698 [30]; assign \$700 = \$699 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$701 = \$700 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$702 = \$701 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$703 = \$702 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$704 = \$703 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$705 = \$704 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$706 = \$705 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$707 = \$706 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$708 = \$707 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$709 = \$708 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$710 = \$709 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$711 = \$710 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$712 = \$711 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$713 = \$712 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$714 = \$713 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$715 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$717 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$718 = \$716 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$717 [4]; assign \$719 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$720 = \$718 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$719 [5]; assign \$721 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$722 = \$720 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$721 [8]; assign \$723 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$724 = \$722 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$723 [12]; assign \$725 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$726 = \$724 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$725 [13]; assign \$727 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$728 = \$726 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$727 [17]; assign \$729 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$730 = \$728 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$729 [19]; assign \$731 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$732 = \$730 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$731 [21]; assign \$733 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$734 = \$732 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$733 [22]; assign \$735 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$736 = \$734 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$735 [24]; assign \$737 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$738 = \$736 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$737 [26]; assign \$739 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$740 = \$738 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$739 [29]; assign \$741 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$742 = \$740 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$741 [30]; assign \$743 = \$742 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$744 = \$743 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$745 = \$744 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$746 = \$745 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$747 = \$746 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$748 = \$747 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$749 = \$748 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$750 = \$749 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$751 = \$750 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$752 = \$751 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$753 = \$752 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$754 = \$753 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$755 = \$754 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$756 = \$755 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$757 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$759 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$760 = \$758 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$759 [5]; assign \$761 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$762 = \$760 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$761 [6]; assign \$763 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$764 = \$762 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$763 [9]; assign \$765 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$766 = \$764 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$765 [13]; assign \$767 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$768 = \$766 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$767 [14]; assign \$769 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$770 = \$768 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$769 [18]; assign \$771 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$772 = \$770 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$771 [20]; assign \$773 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$774 = \$772 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$773 [22]; assign \$775 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$776 = \$774 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$775 [23]; assign \$777 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$778 = \$776 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$777 [25]; assign \$779 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$780 = \$778 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$779 [27]; assign \$781 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$782 = \$780 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$781 [30]; assign \$783 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$784 = \$782 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$783 [31]; assign \$785 = \$784 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$786 = \$785 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$787 = \$786 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$788 = \$787 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$789 = \$788 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$790 = \$789 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$791 = \$790 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$792 = \$791 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$793 = \$792 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$794 = \$793 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$795 = \$794 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$796 = \$795 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$797 = \$796 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$798 = \$797 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$799 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$801 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$802 = \$800 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$801 [6]; assign \$803 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$804 = \$802 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$803 [7]; assign \$805 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$806 = \$804 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$805 [10]; assign \$807 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$808 = \$806 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$807 [14]; assign \$809 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$810 = \$808 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$809 [15]; assign \$811 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$812 = \$810 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$811 [19]; assign \$813 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$814 = \$812 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$813 [21]; assign \$815 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$816 = \$814 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$815 [23]; assign \$817 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$818 = \$816 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$817 [24]; assign \$819 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$820 = \$818 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$819 [26]; assign \$821 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$822 = \$820 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$821 [28]; assign \$823 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$824 = \$822 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$823 [31]; assign \$825 = \$824 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$826 = \$825 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$827 = \$826 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$828 = \$827 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$829 = \$828 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$830 = \$829 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$831 = \$830 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$832 = \$831 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$833 = \$832 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$834 = \$833 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$835 = \$834 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$836 = \$835 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$837 = \$836 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$838 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$840 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$841 = \$839 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$840 [7]; assign \$842 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$843 = \$841 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$842 [8]; assign \$844 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$845 = \$843 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$844 [11]; assign \$846 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$847 = \$845 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$846 [15]; assign \$848 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$849 = \$847 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$848 [16]; assign \$850 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$851 = \$849 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$850 [20]; assign \$852 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$853 = \$851 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$852 [22]; assign \$854 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$855 = \$853 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$854 [24]; assign \$856 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$857 = \$855 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$856 [25]; assign \$858 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$859 = \$857 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$858 [27]; assign \$860 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$861 = \$859 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$860 [29]; assign \$862 = \$861 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$863 = \$862 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$864 = \$863 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$865 = \$864 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$866 = \$865 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$867 = \$866 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$868 = \$867 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$869 = \$868 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$870 = \$869 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$871 = \$870 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$872 = \$871 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$873 = \$872 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$874 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$876 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$877 = \$875 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$876 [8]; assign \$878 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$879 = \$877 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$878 [9]; assign \$880 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$881 = \$879 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$880 [12]; assign \$882 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$883 = \$881 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$882 [16]; assign \$884 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$885 = \$883 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$884 [17]; assign \$886 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$887 = \$885 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$886 [21]; assign \$888 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$889 = \$887 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$888 [23]; assign \$890 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$891 = \$889 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$890 [25]; assign \$892 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$893 = \$891 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$892 [26]; assign \$894 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$895 = \$893 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$894 [28]; assign \$896 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$897 = \$895 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$896 [30]; assign \$898 = \$897 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$899 = \$898 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$900 = \$899 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$901 = \$900 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$902 = \$901 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$903 = \$902 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$904 = \$903 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$905 = \$904 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$906 = \$905 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$907 = \$906 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$908 = \$907 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$909 = \$908 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$910 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$912 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$913 = \$911 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$912 [9]; assign \$914 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$915 = \$913 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$914 [10]; assign \$916 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$917 = \$915 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$916 [13]; assign \$918 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$919 = \$917 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$918 [17]; assign \$920 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$921 = \$919 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$920 [18]; assign \$922 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$923 = \$921 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$922 [22]; assign \$924 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$925 = \$923 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$924 [24]; assign \$926 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$927 = \$925 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$926 [26]; assign \$928 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$929 = \$927 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$928 [27]; assign \$930 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$931 = \$929 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$930 [29]; assign \$932 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$933 = \$931 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$932 [31]; assign \$934 = \$933 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$935 = \$934 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$936 = \$935 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$937 = \$936 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$938 = \$937 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$939 = \$938 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$940 = \$939 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$941 = \$940 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$942 = \$941 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$943 = \$942 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$944 = \$943 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$945 = \$944 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$946 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$948 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$949 = \$947 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$948 [9]; assign \$950 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$951 = \$949 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$950 [11]; assign \$952 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$953 = \$951 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$952 [12]; assign \$954 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$955 = \$953 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$954 [14]; assign \$956 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$957 = \$955 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$956 [16]; assign \$958 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$959 = \$957 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$958 [18]; assign \$960 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$961 = \$959 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$960 [19]; assign \$962 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$963 = \$961 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$962 [23]; assign \$964 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$965 = \$963 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$964 [24]; assign \$966 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$967 = \$965 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$966 [26]; assign \$968 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$969 = \$967 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$968 [27]; assign \$970 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$971 = \$969 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$970 [29]; assign \$972 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$973 = \$971 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$972 [31]; assign \$974 = \$973 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$975 = \$974 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$976 = \$975 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$977 = \$976 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$978 = \$977 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$979 = \$978 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$980 = \$979 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$981 = \$980 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$982 = \$981 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$983 = \$982 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$984 = \$983 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$985 = \$984 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$986 = \$985 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$987 = \$986 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$988 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$990 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$991 = \$989 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$990 [1]; assign \$992 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$993 = \$991 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$992 [6]; assign \$994 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$995 = \$993 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$994 [9]; assign \$996 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$997 = \$995 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$996 [13]; assign \$998 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$999 = \$997 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$998 [15]; assign \$1000 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1001 = \$999 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1000 [16]; assign \$1002 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1003 = \$1001 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1002 [17]; assign \$1004 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1005 = \$1003 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1004 [19]; assign \$1006 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1007 = \$1005 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1006 [20]; assign \$1008 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1009 = \$1007 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1008 [26]; assign \$1010 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1011 = \$1009 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1010 [27]; assign \$1012 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1013 = \$1011 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1012 [29]; assign \$1014 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1015 = \$1013 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1014 [31]; assign \$1016 = \$1015 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1017 = \$1016 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1018 = \$1017 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1019 = \$1018 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1020 = \$1019 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1021 = \$1020 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1022 = \$1021 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1023 = \$1022 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1024 = \$1023 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1025 = \$1024 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1026 = \$1025 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1027 = \$1026 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1028 = \$1027 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1029 = \$1028 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1030 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1032 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1033 = \$1031 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1032 [2]; assign \$1034 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1035 = \$1033 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1034 [7]; assign \$1036 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1037 = \$1035 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1036 [10]; assign \$1038 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1039 = \$1037 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1038 [14]; assign \$1040 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1041 = \$1039 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1040 [16]; assign \$1042 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1043 = \$1041 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1042 [17]; assign \$1044 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1045 = \$1043 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1044 [18]; assign \$1046 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1047 = \$1045 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1046 [20]; assign \$1048 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1049 = \$1047 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1048 [21]; assign \$1050 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1051 = \$1049 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1050 [27]; assign \$1052 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1053 = \$1051 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1052 [28]; assign \$1054 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1055 = \$1053 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1054 [30]; assign \$1056 = \$1055 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1057 = \$1056 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1058 = \$1057 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1059 = \$1058 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1060 = \$1059 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1061 = \$1060 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1062 = \$1061 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1063 = \$1062 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1064 = \$1063 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1065 = \$1064 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1066 = \$1065 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1067 = \$1066 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1068 = \$1067 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1069 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1071 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1072 = \$1070 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1071 [3]; assign \$1073 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1074 = \$1072 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1073 [8]; assign \$1075 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1076 = \$1074 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1075 [11]; assign \$1077 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1078 = \$1076 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1077 [15]; assign \$1079 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1080 = \$1078 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1079 [17]; assign \$1081 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1082 = \$1080 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1081 [18]; assign \$1083 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1084 = \$1082 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1083 [19]; assign \$1085 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1086 = \$1084 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1085 [21]; assign \$1087 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1088 = \$1086 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1087 [22]; assign \$1089 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1090 = \$1088 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1089 [28]; assign \$1091 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1092 = \$1090 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1091 [29]; assign \$1093 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1094 = \$1092 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1093 [31]; assign \$1095 = \$1094 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1096 = \$1095 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1097 = \$1096 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1098 = \$1097 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1099 = \$1098 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1100 = \$1099 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1101 = \$1100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1102 = \$1101 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1103 = \$1102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1104 = \$1103 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1105 = \$1104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1106 = \$1105 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1107 = \$1106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1108 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1110 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1111 = \$1109 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1110 [3]; assign \$1112 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1113 = \$1111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1112 [4]; assign \$1114 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1115 = \$1113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1114 [6]; assign \$1116 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1117 = \$1115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1116 [10]; assign \$1118 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1119 = \$1117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1118 [18]; assign \$1120 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1121 = \$1119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1120 [19]; assign \$1122 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1123 = \$1121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1122 [20]; assign \$1124 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1125 = \$1123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1124 [22]; assign \$1126 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1127 = \$1125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1126 [23]; assign \$1128 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1129 = \$1127 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1128 [24]; assign \$1130 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1131 = \$1129 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1130 [25]; assign \$1132 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1133 = \$1131 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1132 [26]; assign \$1134 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1135 = \$1133 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1134 [28]; assign \$1136 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1137 = \$1135 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1136 [31]; assign \$1138 = \$1137 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1139 = \$1138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1140 = \$1139 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1141 = \$1140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1142 = \$1141 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1143 = \$1142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1144 = \$1143 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1145 = \$1144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1146 = \$1145 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1147 = \$1146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1148 = \$1147 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1149 = \$1148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1150 = \$1149 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1151 = \$1150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1152 = \$1151 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1156 = \$1154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1155 [4]; assign \$1157 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1158 = \$1156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1157 [5]; assign \$1159 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1160 = \$1158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1159 [7]; assign \$1161 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1162 = \$1160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1161 [11]; assign \$1163 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1164 = \$1162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1163 [19]; assign \$1165 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1166 = \$1164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1165 [20]; assign \$1167 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1168 = \$1166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1167 [21]; assign \$1169 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1170 = \$1168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1169 [23]; assign \$1171 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1172 = \$1170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1171 [24]; assign \$1173 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1174 = \$1172 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1173 [25]; assign \$1175 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1176 = \$1174 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1175 [26]; assign \$1177 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1178 = \$1176 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1177 [27]; assign \$1179 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1180 = \$1178 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1179 [29]; assign \$1181 = \$1180 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1182 = \$1181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1183 = \$1182 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1184 = \$1183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1185 = \$1184 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1186 = \$1185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1187 = \$1186 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1188 = \$1187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1189 = \$1188 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1190 = \$1189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1191 = \$1190 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1192 = \$1191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1193 = \$1192 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1194 = \$1193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1195 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1197 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1198 = \$1196 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1197 [5]; assign \$1199 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1200 = \$1198 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1199 [6]; assign \$1201 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1202 = \$1200 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1201 [8]; assign \$1203 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1204 = \$1202 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1203 [12]; assign \$1205 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1206 = \$1204 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1205 [20]; assign \$1207 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1208 = \$1206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1207 [21]; assign \$1209 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1210 = \$1208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1209 [22]; assign \$1211 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1212 = \$1210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1211 [24]; assign \$1213 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1214 = \$1212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1213 [25]; assign \$1215 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1216 = \$1214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1215 [26]; assign \$1217 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1218 = \$1216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1217 [27]; assign \$1219 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1220 = \$1218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1219 [28]; assign \$1221 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1222 = \$1220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1221 [30]; assign \$1223 = \$1222 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1224 = \$1223 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1225 = \$1224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1226 = \$1225 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1227 = \$1226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$1228 = \$1227 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1229 = \$1228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1230 = \$1229 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1231 = \$1230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1232 = \$1231 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1233 = \$1232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1234 = \$1233 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1235 = \$1234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1236 = \$1235 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1240 = \$1238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1239 [6]; assign \$1241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1242 = \$1240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1241 [7]; assign \$1243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1244 = \$1242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1243 [9]; assign \$1245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1246 = \$1244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1245 [13]; assign \$1247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1248 = \$1246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1247 [21]; assign \$1249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1250 = \$1248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1249 [22]; assign \$1251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1252 = \$1250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1251 [23]; assign \$1253 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1254 = \$1252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1253 [25]; assign \$1255 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1256 = \$1254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1255 [26]; assign \$1257 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1258 = \$1256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1257 [27]; assign \$1259 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1260 = \$1258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1259 [28]; assign \$1261 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1262 = \$1260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1261 [29]; assign \$1263 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1264 = \$1262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1263 [31]; assign \$1265 = \$1264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1266 = \$1265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1267 = \$1266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1268 = \$1267 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1269 = \$1268 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1270 = \$1269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1271 = \$1270 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1272 = \$1271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1273 = \$1272 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1274 = \$1273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1275 = \$1274 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1276 = \$1275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1277 = \$1276 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1278 = \$1277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1279 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1281 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1282 = \$1280 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1281 [7]; assign \$1283 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1284 = \$1282 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1283 [8]; assign \$1285 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1286 = \$1284 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1285 [10]; assign \$1287 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1288 = \$1286 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1287 [14]; assign \$1289 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1290 = \$1288 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1289 [22]; assign \$1291 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1292 = \$1290 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1291 [23]; assign \$1293 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1294 = \$1292 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1293 [24]; assign \$1295 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1296 = \$1294 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1295 [26]; assign \$1297 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1298 = \$1296 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1297 [27]; assign \$1299 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1300 = \$1298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1299 [28]; assign \$1301 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1302 = \$1300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1301 [29]; assign \$1303 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1304 = \$1302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1303 [30]; assign \$1305 = \$1304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1306 = \$1305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1307 = \$1306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1308 = \$1307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1309 = \$1308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1310 = \$1309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1311 = \$1310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1312 = \$1311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1313 = \$1312 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1314 = \$1313 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1315 = \$1314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1316 = \$1315 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1317 = \$1316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1318 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1320 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1321 = \$1319 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1320 [8]; assign \$1322 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1323 = \$1321 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1322 [9]; assign \$1324 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1325 = \$1323 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1324 [11]; assign \$1326 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1327 = \$1325 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1326 [15]; assign \$1328 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1329 = \$1327 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1328 [23]; assign \$1330 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1331 = \$1329 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1330 [24]; assign \$1332 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1333 = \$1331 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1332 [25]; assign \$1334 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1335 = \$1333 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1334 [27]; assign \$1336 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1337 = \$1335 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1336 [28]; assign \$1338 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1339 = \$1337 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1338 [29]; assign \$1340 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1341 = \$1339 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1340 [30]; assign \$1342 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1343 = \$1341 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1342 [31]; assign \$1344 = \$1343 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1345 = \$1344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1346 = \$1345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1347 = \$1346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1348 = \$1347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1349 = \$1348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1350 = \$1349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1351 = \$1350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1352 = \$1351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1353 = \$1352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1354 = \$1353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1355 = \$1354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1356 = \$1355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_reg <= 32'd4294967295; else crc_reg <= \$1357 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$26 ) begin end \$1357 = crc_reg; if (valid) begin \$1357 [0] = \$39 ; \$1357 [1] = \$78 ; \$1357 [2] = \$126 ; \$1357 [3] = \$171 ; \$1357 [4] = \$222 ; \$1357 [5] = \$267 ; \$1357 [6] = \$312 ; \$1357 [7] = \$360 ; \$1357 [8] = \$399 ; \$1357 [9] = \$435 ; \$1357 [10] = \$474 ; \$1357 [11] = \$525 ; \$1357 [12] = \$576 ; \$1357 [13] = \$624 ; \$1357 [14] = \$669 ; \$1357 [15] = \$714 ; \$1357 [16] = \$756 ; \$1357 [17] = \$798 ; \$1357 [18] = \$837 ; \$1357 [19] = \$873 ; \$1357 [20] = \$909 ; \$1357 [21] = \$945 ; \$1357 [22] = \$987 ; \$1357 [23] = \$1029 ; \$1357 [24] = \$1068 ; \$1357 [25] = \$1107 ; \$1357 [26] = \$1152 ; \$1357 [27] = \$1194 ; \$1357 [28] = \$1236 ; \$1357 [29] = \$1278 ; \$1357 [30] = \$1317 ; \$1357 [31] = \$1356 ; end else if (start) begin \$1357 = 32'd4294967295; end end assign data = data_in; assign crc = crc_reg; assign \$2 = \$1 [0]; assign \$41 = \$40 [0]; assign \$80 = \$79 [0]; assign \$128 = \$127 [1]; assign \$173 = \$172 [0]; assign \$224 = \$223 [0]; assign \$269 = \$268 [1]; assign \$314 = \$313 [0]; assign \$362 = \$361 [0]; assign \$401 = \$400 [1]; assign \$437 = \$436 [0]; assign \$476 = \$475 [0]; assign \$527 = \$526 [0]; assign \$578 = \$577 [1]; assign \$626 = \$625 [2]; assign \$671 = \$670 [3]; assign \$716 = \$715 [0]; assign \$758 = \$757 [1]; assign \$800 = \$799 [2]; assign \$839 = \$838 [3]; assign \$875 = \$874 [4]; assign \$911 = \$910 [5]; assign \$947 = \$946 [0]; assign \$989 = \$988 [0]; assign \$1031 = \$1030 [1]; assign \$1070 = \$1069 [2]; assign \$1109 = \$1108 [0]; assign \$1154 = \$1153 [1]; assign \$1196 = \$1195 [2]; assign \$1238 = \$1237 [3]; assign \$1280 = \$1279 [4]; assign \$1319 = \$1318 [5]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_C.drive_serial_port.crc32_tx (sync_100_rst, crc, valid, start, data_in, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$27 = 0; wire [31:0] \$1 ; wire \$10 ; wire \$100 ; wire [31:0] \$1000 ; wire \$1001 ; wire [31:0] \$1002 ; wire \$1003 ; wire [31:0] \$1004 ; wire \$1005 ; wire [31:0] \$1006 ; wire \$1007 ; wire [31:0] \$1008 ; wire \$1009 ; wire [31:0] \$101 ; wire [31:0] \$1010 ; wire \$1011 ; wire [31:0] \$1012 ; wire \$1013 ; wire [31:0] \$1014 ; wire \$1015 ; wire \$1016 ; wire \$1017 ; wire \$1018 ; wire \$1019 ; wire \$102 ; wire \$1020 ; wire \$1021 ; wire \$1022 ; wire \$1023 ; wire \$1024 ; wire \$1025 ; wire \$1026 ; wire \$1027 ; wire \$1028 ; wire \$1029 ; wire [31:0] \$103 ; wire [31:0] \$1030 ; wire \$1031 ; wire [31:0] \$1032 ; wire \$1033 ; wire [31:0] \$1034 ; wire \$1035 ; wire [31:0] \$1036 ; wire \$1037 ; wire [31:0] \$1038 ; wire \$1039 ; wire \$104 ; wire [31:0] \$1040 ; wire \$1041 ; wire [31:0] \$1042 ; wire \$1043 ; wire [31:0] \$1044 ; wire \$1045 ; wire [31:0] \$1046 ; wire \$1047 ; wire [31:0] \$1048 ; wire \$1049 ; wire [31:0] \$105 ; wire [31:0] \$1050 ; wire \$1051 ; wire [31:0] \$1052 ; wire \$1053 ; wire [31:0] \$1054 ; wire \$1055 ; wire \$1056 ; wire \$1057 ; wire \$1058 ; wire \$1059 ; wire \$106 ; wire \$1060 ; wire \$1061 ; wire \$1062 ; wire \$1063 ; wire \$1064 ; wire \$1065 ; wire \$1066 ; wire \$1067 ; wire \$1068 ; wire [31:0] \$1069 ; wire [31:0] \$107 ; wire \$1070 ; wire [31:0] \$1071 ; wire \$1072 ; wire [31:0] \$1073 ; wire \$1074 ; wire [31:0] \$1075 ; wire \$1076 ; wire [31:0] \$1077 ; wire \$1078 ; wire [31:0] \$1079 ; wire \$108 ; wire \$1080 ; wire [31:0] \$1081 ; wire \$1082 ; wire [31:0] \$1083 ; wire \$1084 ; wire [31:0] \$1085 ; wire \$1086 ; wire [31:0] \$1087 ; wire \$1088 ; wire [31:0] \$1089 ; wire [31:0] \$109 ; wire \$1090 ; wire [31:0] \$1091 ; wire \$1092 ; wire [31:0] \$1093 ; wire \$1094 ; wire \$1095 ; wire \$1096 ; wire \$1097 ; wire \$1098 ; wire \$1099 ; wire [31:0] \$11 ; wire \$110 ; wire \$1100 ; wire \$1101 ; wire \$1102 ; wire \$1103 ; wire \$1104 ; wire \$1105 ; wire \$1106 ; wire \$1107 ; wire [31:0] \$1108 ; wire \$1109 ; wire \$111 ; wire [31:0] \$1110 ; wire \$1111 ; wire [31:0] \$1112 ; wire \$1113 ; wire [31:0] \$1114 ; wire \$1115 ; wire [31:0] \$1116 ; wire \$1117 ; wire [31:0] \$1118 ; wire \$1119 ; wire \$112 ; wire [31:0] \$1120 ; wire \$1121 ; wire [31:0] \$1122 ; wire \$1123 ; wire [31:0] \$1124 ; wire \$1125 ; wire [31:0] \$1126 ; wire \$1127 ; wire [31:0] \$1128 ; wire \$1129 ; wire \$113 ; wire [31:0] \$1130 ; wire \$1131 ; wire [31:0] \$1132 ; wire \$1133 ; wire [31:0] \$1134 ; wire \$1135 ; wire [31:0] \$1136 ; wire \$1137 ; wire \$1138 ; wire \$1139 ; wire \$114 ; wire \$1140 ; wire \$1141 ; wire \$1142 ; wire \$1143 ; wire \$1144 ; wire \$1145 ; wire \$1146 ; wire \$1147 ; wire \$1148 ; wire \$1149 ; wire \$115 ; wire \$1150 ; wire \$1151 ; wire \$1152 ; wire [31:0] \$1153 ; wire \$1154 ; wire [31:0] \$1155 ; wire \$1156 ; wire [31:0] \$1157 ; wire \$1158 ; wire [31:0] \$1159 ; wire \$116 ; wire \$1160 ; wire [31:0] \$1161 ; wire \$1162 ; wire [31:0] \$1163 ; wire \$1164 ; wire [31:0] \$1165 ; wire \$1166 ; wire [31:0] \$1167 ; wire \$1168 ; wire [31:0] \$1169 ; wire \$117 ; wire \$1170 ; wire [31:0] \$1171 ; wire \$1172 ; wire [31:0] \$1173 ; wire \$1174 ; wire [31:0] \$1175 ; wire \$1176 ; wire [31:0] \$1177 ; wire \$1178 ; wire [31:0] \$1179 ; wire \$118 ; wire \$1180 ; wire \$1181 ; wire \$1182 ; wire \$1183 ; wire \$1184 ; wire \$1185 ; wire \$1186 ; wire \$1187 ; wire \$1188 ; wire \$1189 ; wire \$119 ; wire \$1190 ; wire \$1191 ; wire \$1192 ; wire \$1193 ; wire \$1194 ; wire [31:0] \$1195 ; wire \$1196 ; wire [31:0] \$1197 ; wire \$1198 ; wire [31:0] \$1199 ; wire \$12 ; wire \$120 ; wire \$1200 ; wire [31:0] \$1201 ; wire \$1202 ; wire [31:0] \$1203 ; wire \$1204 ; wire [31:0] \$1205 ; wire \$1206 ; wire [31:0] \$1207 ; wire \$1208 ; wire [31:0] \$1209 ; wire \$121 ; wire \$1210 ; wire [31:0] \$1211 ; wire \$1212 ; wire [31:0] \$1213 ; wire \$1214 ; wire [31:0] \$1215 ; wire \$1216 ; wire [31:0] \$1217 ; wire \$1218 ; wire [31:0] \$1219 ; wire \$122 ; wire \$1220 ; wire [31:0] \$1221 ; wire \$1222 ; wire \$1223 ; wire \$1224 ; wire \$1225 ; wire \$1226 ; wire \$1227 ; wire \$1228 ; wire \$1229 ; wire \$123 ; wire \$1230 ; wire \$1231 ; wire \$1232 ; wire \$1233 ; wire \$1234 ; wire \$1235 ; wire \$1236 ; wire [31:0] \$1237 ; wire \$1238 ; wire [31:0] \$1239 ; wire \$124 ; wire \$1240 ; wire [31:0] \$1241 ; wire \$1242 ; wire [31:0] \$1243 ; wire \$1244 ; wire [31:0] \$1245 ; wire \$1246 ; wire [31:0] \$1247 ; wire \$1248 ; wire [31:0] \$1249 ; wire \$125 ; wire \$1250 ; wire [31:0] \$1251 ; wire \$1252 ; wire [31:0] \$1253 ; wire \$1254 ; wire [31:0] \$1255 ; wire \$1256 ; wire [31:0] \$1257 ; wire \$1258 ; wire [31:0] \$1259 ; wire \$126 ; wire \$1260 ; wire [31:0] \$1261 ; wire \$1262 ; wire [31:0] \$1263 ; wire \$1264 ; wire \$1265 ; wire \$1266 ; wire \$1267 ; wire \$1268 ; wire \$1269 ; wire [31:0] \$127 ; wire \$1270 ; wire \$1271 ; wire \$1272 ; wire \$1273 ; wire \$1274 ; wire \$1275 ; wire \$1276 ; wire \$1277 ; wire \$1278 ; wire [31:0] \$1279 ; wire \$128 ; wire \$1280 ; wire [31:0] \$1281 ; wire \$1282 ; wire [31:0] \$1283 ; wire \$1284 ; wire [31:0] \$1285 ; wire \$1286 ; wire [31:0] \$1287 ; wire \$1288 ; wire [31:0] \$1289 ; wire [31:0] \$129 ; wire \$1290 ; wire [31:0] \$1291 ; wire \$1292 ; wire [31:0] \$1293 ; wire \$1294 ; wire [31:0] \$1295 ; wire \$1296 ; wire [31:0] \$1297 ; wire \$1298 ; wire [31:0] \$1299 ; wire [31:0] \$13 ; wire \$130 ; wire \$1300 ; wire [31:0] \$1301 ; wire \$1302 ; wire [31:0] \$1303 ; wire \$1304 ; wire \$1305 ; wire \$1306 ; wire \$1307 ; wire \$1308 ; wire \$1309 ; wire [31:0] \$131 ; wire \$1310 ; wire \$1311 ; wire \$1312 ; wire \$1313 ; wire \$1314 ; wire \$1315 ; wire \$1316 ; wire \$1317 ; wire [31:0] \$1318 ; wire \$1319 ; wire \$132 ; wire [31:0] \$1320 ; wire \$1321 ; wire [31:0] \$1322 ; wire \$1323 ; wire [31:0] \$1324 ; wire \$1325 ; wire [31:0] \$1326 ; wire \$1327 ; wire [31:0] \$1328 ; wire \$1329 ; wire [31:0] \$133 ; wire [31:0] \$1330 ; wire \$1331 ; wire [31:0] \$1332 ; wire \$1333 ; wire [31:0] \$1334 ; wire \$1335 ; wire [31:0] \$1336 ; wire \$1337 ; wire [31:0] \$1338 ; wire \$1339 ; wire \$134 ; wire [31:0] \$1340 ; wire \$1341 ; wire [31:0] \$1342 ; wire \$1343 ; wire \$1344 ; wire \$1345 ; wire \$1346 ; wire \$1347 ; wire \$1348 ; wire \$1349 ; wire [31:0] \$135 ; wire \$1350 ; wire \$1351 ; wire \$1352 ; wire \$1353 ; wire \$1354 ; wire \$1355 ; wire \$1356 ; reg [31:0] \$1357 ; wire \$136 ; wire [31:0] \$137 ; wire \$138 ; wire [31:0] \$139 ; wire \$14 ; wire \$140 ; wire [31:0] \$141 ; wire \$142 ; wire [31:0] \$143 ; wire \$144 ; wire [31:0] \$145 ; wire \$146 ; wire [31:0] \$147 ; wire \$148 ; wire [31:0] \$149 ; wire [31:0] \$15 ; wire \$150 ; wire [31:0] \$151 ; wire \$152 ; wire [31:0] \$153 ; wire \$154 ; wire [31:0] \$155 ; wire \$156 ; wire \$157 ; wire \$158 ; wire \$159 ; wire \$16 ; wire \$160 ; wire \$161 ; wire \$162 ; wire \$163 ; wire \$164 ; wire \$165 ; wire \$166 ; wire \$167 ; wire \$168 ; wire \$169 ; wire [31:0] \$17 ; wire \$170 ; wire \$171 ; wire [31:0] \$172 ; wire \$173 ; wire [31:0] \$174 ; wire \$175 ; wire [31:0] \$176 ; wire \$177 ; wire [31:0] \$178 ; wire \$179 ; wire \$18 ; wire [31:0] \$180 ; wire \$181 ; wire [31:0] \$182 ; wire \$183 ; wire [31:0] \$184 ; wire \$185 ; wire [31:0] \$186 ; wire \$187 ; wire [31:0] \$188 ; wire \$189 ; wire [31:0] \$19 ; wire [31:0] \$190 ; wire \$191 ; wire [31:0] \$192 ; wire \$193 ; wire [31:0] \$194 ; wire \$195 ; wire [31:0] \$196 ; wire \$197 ; wire [31:0] \$198 ; wire \$199 ; wire \$2 ; wire \$20 ; wire [31:0] \$200 ; wire \$201 ; wire [31:0] \$202 ; wire \$203 ; wire [31:0] \$204 ; wire \$205 ; wire \$206 ; wire \$207 ; wire \$208 ; wire \$209 ; wire [31:0] \$21 ; wire \$210 ; wire \$211 ; wire \$212 ; wire \$213 ; wire \$214 ; wire \$215 ; wire \$216 ; wire \$217 ; wire \$218 ; wire \$219 ; wire \$22 ; wire \$220 ; wire \$221 ; wire \$222 ; wire [31:0] \$223 ; wire \$224 ; wire [31:0] \$225 ; wire \$226 ; wire [31:0] \$227 ; wire \$228 ; wire [31:0] \$229 ; wire [31:0] \$23 ; wire \$230 ; wire [31:0] \$231 ; wire \$232 ; wire [31:0] \$233 ; wire \$234 ; wire [31:0] \$235 ; wire \$236 ; wire [31:0] \$237 ; wire \$238 ; wire [31:0] \$239 ; wire \$24 ; wire \$240 ; wire [31:0] \$241 ; wire \$242 ; wire [31:0] \$243 ; wire \$244 ; wire [31:0] \$245 ; wire \$246 ; wire [31:0] \$247 ; wire \$248 ; wire [31:0] \$249 ; wire [31:0] \$25 ; wire \$250 ; wire [31:0] \$251 ; wire \$252 ; wire \$253 ; wire \$254 ; wire \$255 ; wire \$256 ; wire \$257 ; wire \$258 ; wire \$259 ; wire \$26 ; wire \$260 ; wire \$261 ; wire \$262 ; wire \$263 ; wire \$264 ; wire \$265 ; wire \$266 ; wire \$267 ; wire [31:0] \$268 ; wire \$269 ; wire \$27 ; wire [31:0] \$270 ; wire \$271 ; wire [31:0] \$272 ; wire \$273 ; wire [31:0] \$274 ; wire \$275 ; wire [31:0] \$276 ; wire \$277 ; wire [31:0] \$278 ; wire \$279 ; wire \$28 ; wire [31:0] \$280 ; wire \$281 ; wire [31:0] \$282 ; wire \$283 ; wire [31:0] \$284 ; wire \$285 ; wire [31:0] \$286 ; wire \$287 ; wire [31:0] \$288 ; wire \$289 ; wire \$29 ; wire [31:0] \$290 ; wire \$291 ; wire [31:0] \$292 ; wire \$293 ; wire [31:0] \$294 ; wire \$295 ; wire [31:0] \$296 ; wire \$297 ; wire \$298 ; wire \$299 ; wire [31:0] \$3 ; wire \$30 ; wire \$300 ; wire \$301 ; wire \$302 ; wire \$303 ; wire \$304 ; wire \$305 ; wire \$306 ; wire \$307 ; wire \$308 ; wire \$309 ; wire \$31 ; wire \$310 ; wire \$311 ; wire \$312 ; wire [31:0] \$313 ; wire \$314 ; wire [31:0] \$315 ; wire \$316 ; wire [31:0] \$317 ; wire \$318 ; wire [31:0] \$319 ; wire \$32 ; wire \$320 ; wire [31:0] \$321 ; wire \$322 ; wire [31:0] \$323 ; wire \$324 ; wire [31:0] \$325 ; wire \$326 ; wire [31:0] \$327 ; wire \$328 ; wire [31:0] \$329 ; wire \$33 ; wire \$330 ; wire [31:0] \$331 ; wire \$332 ; wire [31:0] \$333 ; wire \$334 ; wire [31:0] \$335 ; wire \$336 ; wire [31:0] \$337 ; wire \$338 ; wire [31:0] \$339 ; wire \$34 ; wire \$340 ; wire [31:0] \$341 ; wire \$342 ; wire [31:0] \$343 ; wire \$344 ; wire \$345 ; wire \$346 ; wire \$347 ; wire \$348 ; wire \$349 ; wire \$35 ; wire \$350 ; wire \$351 ; wire \$352 ; wire \$353 ; wire \$354 ; wire \$355 ; wire \$356 ; wire \$357 ; wire \$358 ; wire \$359 ; wire \$36 ; wire \$360 ; wire [31:0] \$361 ; wire \$362 ; wire [31:0] \$363 ; wire \$364 ; wire [31:0] \$365 ; wire \$366 ; wire [31:0] \$367 ; wire \$368 ; wire [31:0] \$369 ; wire \$37 ; wire \$370 ; wire [31:0] \$371 ; wire \$372 ; wire [31:0] \$373 ; wire \$374 ; wire [31:0] \$375 ; wire \$376 ; wire [31:0] \$377 ; wire \$378 ; wire [31:0] \$379 ; wire \$38 ; wire \$380 ; wire [31:0] \$381 ; wire \$382 ; wire [31:0] \$383 ; wire \$384 ; wire [31:0] \$385 ; wire \$386 ; wire \$387 ; wire \$388 ; wire \$389 ; wire \$39 ; wire \$390 ; wire \$391 ; wire \$392 ; wire \$393 ; wire \$394 ; wire \$395 ; wire \$396 ; wire \$397 ; wire \$398 ; wire \$399 ; wire \$4 ; wire [31:0] \$40 ; wire [31:0] \$400 ; wire \$401 ; wire [31:0] \$402 ; wire \$403 ; wire [31:0] \$404 ; wire \$405 ; wire [31:0] \$406 ; wire \$407 ; wire [31:0] \$408 ; wire \$409 ; wire \$41 ; wire [31:0] \$410 ; wire \$411 ; wire [31:0] \$412 ; wire \$413 ; wire [31:0] \$414 ; wire \$415 ; wire [31:0] \$416 ; wire \$417 ; wire [31:0] \$418 ; wire \$419 ; wire [31:0] \$42 ; wire [31:0] \$420 ; wire \$421 ; wire [31:0] \$422 ; wire \$423 ; wire \$424 ; wire \$425 ; wire \$426 ; wire \$427 ; wire \$428 ; wire \$429 ; wire \$43 ; wire \$430 ; wire \$431 ; wire \$432 ; wire \$433 ; wire \$434 ; wire \$435 ; wire [31:0] \$436 ; wire \$437 ; wire [31:0] \$438 ; wire \$439 ; wire [31:0] \$44 ; wire [31:0] \$440 ; wire \$441 ; wire [31:0] \$442 ; wire \$443 ; wire [31:0] \$444 ; wire \$445 ; wire [31:0] \$446 ; wire \$447 ; wire [31:0] \$448 ; wire \$449 ; wire \$45 ; wire [31:0] \$450 ; wire \$451 ; wire [31:0] \$452 ; wire \$453 ; wire [31:0] \$454 ; wire \$455 ; wire [31:0] \$456 ; wire \$457 ; wire [31:0] \$458 ; wire \$459 ; wire [31:0] \$46 ; wire [31:0] \$460 ; wire \$461 ; wire \$462 ; wire \$463 ; wire \$464 ; wire \$465 ; wire \$466 ; wire \$467 ; wire \$468 ; wire \$469 ; wire \$47 ; wire \$470 ; wire \$471 ; wire \$472 ; wire \$473 ; wire \$474 ; wire [31:0] \$475 ; wire \$476 ; wire [31:0] \$477 ; wire \$478 ; wire [31:0] \$479 ; wire [31:0] \$48 ; wire \$480 ; wire [31:0] \$481 ; wire \$482 ; wire [31:0] \$483 ; wire \$484 ; wire [31:0] \$485 ; wire \$486 ; wire [31:0] \$487 ; wire \$488 ; wire [31:0] \$489 ; wire \$49 ; wire \$490 ; wire [31:0] \$491 ; wire \$492 ; wire [31:0] \$493 ; wire \$494 ; wire [31:0] \$495 ; wire \$496 ; wire [31:0] \$497 ; wire \$498 ; wire [31:0] \$499 ; wire [31:0] \$5 ; wire [31:0] \$50 ; wire \$500 ; wire [31:0] \$501 ; wire \$502 ; wire [31:0] \$503 ; wire \$504 ; wire [31:0] \$505 ; wire \$506 ; wire [31:0] \$507 ; wire \$508 ; wire \$509 ; wire \$51 ; wire \$510 ; wire \$511 ; wire \$512 ; wire \$513 ; wire \$514 ; wire \$515 ; wire \$516 ; wire \$517 ; wire \$518 ; wire \$519 ; wire [31:0] \$52 ; wire \$520 ; wire \$521 ; wire \$522 ; wire \$523 ; wire \$524 ; wire \$525 ; wire [31:0] \$526 ; wire \$527 ; wire [31:0] \$528 ; wire \$529 ; wire \$53 ; wire [31:0] \$530 ; wire \$531 ; wire [31:0] \$532 ; wire \$533 ; wire [31:0] \$534 ; wire \$535 ; wire [31:0] \$536 ; wire \$537 ; wire [31:0] \$538 ; wire \$539 ; wire [31:0] \$54 ; wire [31:0] \$540 ; wire \$541 ; wire [31:0] \$542 ; wire \$543 ; wire [31:0] \$544 ; wire \$545 ; wire [31:0] \$546 ; wire \$547 ; wire [31:0] \$548 ; wire \$549 ; wire \$55 ; wire [31:0] \$550 ; wire \$551 ; wire [31:0] \$552 ; wire \$553 ; wire [31:0] \$554 ; wire \$555 ; wire [31:0] \$556 ; wire \$557 ; wire [31:0] \$558 ; wire \$559 ; wire [31:0] \$56 ; wire \$560 ; wire \$561 ; wire \$562 ; wire \$563 ; wire \$564 ; wire \$565 ; wire \$566 ; wire \$567 ; wire \$568 ; wire \$569 ; wire \$57 ; wire \$570 ; wire \$571 ; wire \$572 ; wire \$573 ; wire \$574 ; wire \$575 ; wire \$576 ; wire [31:0] \$577 ; wire \$578 ; wire [31:0] \$579 ; wire [31:0] \$58 ; wire \$580 ; wire [31:0] \$581 ; wire \$582 ; wire [31:0] \$583 ; wire \$584 ; wire [31:0] \$585 ; wire \$586 ; wire [31:0] \$587 ; wire \$588 ; wire [31:0] \$589 ; wire \$59 ; wire \$590 ; wire [31:0] \$591 ; wire \$592 ; wire [31:0] \$593 ; wire \$594 ; wire [31:0] \$595 ; wire \$596 ; wire [31:0] \$597 ; wire \$598 ; wire [31:0] \$599 ; wire \$6 ; wire [31:0] \$60 ; wire \$600 ; wire [31:0] \$601 ; wire \$602 ; wire [31:0] \$603 ; wire \$604 ; wire [31:0] \$605 ; wire \$606 ; wire [31:0] \$607 ; wire \$608 ; wire \$609 ; wire \$61 ; wire \$610 ; wire \$611 ; wire \$612 ; wire \$613 ; wire \$614 ; wire \$615 ; wire \$616 ; wire \$617 ; wire \$618 ; wire \$619 ; wire [31:0] \$62 ; wire \$620 ; wire \$621 ; wire \$622 ; wire \$623 ; wire \$624 ; wire [31:0] \$625 ; wire \$626 ; wire [31:0] \$627 ; wire \$628 ; wire [31:0] \$629 ; wire \$63 ; wire \$630 ; wire [31:0] \$631 ; wire \$632 ; wire [31:0] \$633 ; wire \$634 ; wire [31:0] \$635 ; wire \$636 ; wire [31:0] \$637 ; wire \$638 ; wire [31:0] \$639 ; wire [31:0] \$64 ; wire \$640 ; wire [31:0] \$641 ; wire \$642 ; wire [31:0] \$643 ; wire \$644 ; wire [31:0] \$645 ; wire \$646 ; wire [31:0] \$647 ; wire \$648 ; wire [31:0] \$649 ; wire \$65 ; wire \$650 ; wire [31:0] \$651 ; wire \$652 ; wire [31:0] \$653 ; wire \$654 ; wire \$655 ; wire \$656 ; wire \$657 ; wire \$658 ; wire \$659 ; wire \$66 ; wire \$660 ; wire \$661 ; wire \$662 ; wire \$663 ; wire \$664 ; wire \$665 ; wire \$666 ; wire \$667 ; wire \$668 ; wire \$669 ; wire \$67 ; wire [31:0] \$670 ; wire \$671 ; wire [31:0] \$672 ; wire \$673 ; wire [31:0] \$674 ; wire \$675 ; wire [31:0] \$676 ; wire \$677 ; wire [31:0] \$678 ; wire \$679 ; wire \$68 ; wire [31:0] \$680 ; wire \$681 ; wire [31:0] \$682 ; wire \$683 ; wire [31:0] \$684 ; wire \$685 ; wire [31:0] \$686 ; wire \$687 ; wire [31:0] \$688 ; wire \$689 ; wire \$69 ; wire [31:0] \$690 ; wire \$691 ; wire [31:0] \$692 ; wire \$693 ; wire [31:0] \$694 ; wire \$695 ; wire [31:0] \$696 ; wire \$697 ; wire [31:0] \$698 ; wire \$699 ; wire [31:0] \$7 ; wire \$70 ; wire \$700 ; wire \$701 ; wire \$702 ; wire \$703 ; wire \$704 ; wire \$705 ; wire \$706 ; wire \$707 ; wire \$708 ; wire \$709 ; wire \$71 ; wire \$710 ; wire \$711 ; wire \$712 ; wire \$713 ; wire \$714 ; wire [31:0] \$715 ; wire \$716 ; wire [31:0] \$717 ; wire \$718 ; wire [31:0] \$719 ; wire \$72 ; wire \$720 ; wire [31:0] \$721 ; wire \$722 ; wire [31:0] \$723 ; wire \$724 ; wire [31:0] \$725 ; wire \$726 ; wire [31:0] \$727 ; wire \$728 ; wire [31:0] \$729 ; wire \$73 ; wire \$730 ; wire [31:0] \$731 ; wire \$732 ; wire [31:0] \$733 ; wire \$734 ; wire [31:0] \$735 ; wire \$736 ; wire [31:0] \$737 ; wire \$738 ; wire [31:0] \$739 ; wire \$74 ; wire \$740 ; wire [31:0] \$741 ; wire \$742 ; wire \$743 ; wire \$744 ; wire \$745 ; wire \$746 ; wire \$747 ; wire \$748 ; wire \$749 ; wire \$75 ; wire \$750 ; wire \$751 ; wire \$752 ; wire \$753 ; wire \$754 ; wire \$755 ; wire \$756 ; wire [31:0] \$757 ; wire \$758 ; wire [31:0] \$759 ; wire \$76 ; wire \$760 ; wire [31:0] \$761 ; wire \$762 ; wire [31:0] \$763 ; wire \$764 ; wire [31:0] \$765 ; wire \$766 ; wire [31:0] \$767 ; wire \$768 ; wire [31:0] \$769 ; wire \$77 ; wire \$770 ; wire [31:0] \$771 ; wire \$772 ; wire [31:0] \$773 ; wire \$774 ; wire [31:0] \$775 ; wire \$776 ; wire [31:0] \$777 ; wire \$778 ; wire [31:0] \$779 ; wire \$78 ; wire \$780 ; wire [31:0] \$781 ; wire \$782 ; wire [31:0] \$783 ; wire \$784 ; wire \$785 ; wire \$786 ; wire \$787 ; wire \$788 ; wire \$789 ; wire [31:0] \$79 ; wire \$790 ; wire \$791 ; wire \$792 ; wire \$793 ; wire \$794 ; wire \$795 ; wire \$796 ; wire \$797 ; wire \$798 ; wire [31:0] \$799 ; wire \$8 ; wire \$80 ; wire \$800 ; wire [31:0] \$801 ; wire \$802 ; wire [31:0] \$803 ; wire \$804 ; wire [31:0] \$805 ; wire \$806 ; wire [31:0] \$807 ; wire \$808 ; wire [31:0] \$809 ; wire [31:0] \$81 ; wire \$810 ; wire [31:0] \$811 ; wire \$812 ; wire [31:0] \$813 ; wire \$814 ; wire [31:0] \$815 ; wire \$816 ; wire [31:0] \$817 ; wire \$818 ; wire [31:0] \$819 ; wire \$82 ; wire \$820 ; wire [31:0] \$821 ; wire \$822 ; wire [31:0] \$823 ; wire \$824 ; wire \$825 ; wire \$826 ; wire \$827 ; wire \$828 ; wire \$829 ; wire [31:0] \$83 ; wire \$830 ; wire \$831 ; wire \$832 ; wire \$833 ; wire \$834 ; wire \$835 ; wire \$836 ; wire \$837 ; wire [31:0] \$838 ; wire \$839 ; wire \$84 ; wire [31:0] \$840 ; wire \$841 ; wire [31:0] \$842 ; wire \$843 ; wire [31:0] \$844 ; wire \$845 ; wire [31:0] \$846 ; wire \$847 ; wire [31:0] \$848 ; wire \$849 ; wire [31:0] \$85 ; wire [31:0] \$850 ; wire \$851 ; wire [31:0] \$852 ; wire \$853 ; wire [31:0] \$854 ; wire \$855 ; wire [31:0] \$856 ; wire \$857 ; wire [31:0] \$858 ; wire \$859 ; wire \$86 ; wire [31:0] \$860 ; wire \$861 ; wire \$862 ; wire \$863 ; wire \$864 ; wire \$865 ; wire \$866 ; wire \$867 ; wire \$868 ; wire \$869 ; wire [31:0] \$87 ; wire \$870 ; wire \$871 ; wire \$872 ; wire \$873 ; wire [31:0] \$874 ; wire \$875 ; wire [31:0] \$876 ; wire \$877 ; wire [31:0] \$878 ; wire \$879 ; wire \$88 ; wire [31:0] \$880 ; wire \$881 ; wire [31:0] \$882 ; wire \$883 ; wire [31:0] \$884 ; wire \$885 ; wire [31:0] \$886 ; wire \$887 ; wire [31:0] \$888 ; wire \$889 ; wire [31:0] \$89 ; wire [31:0] \$890 ; wire \$891 ; wire [31:0] \$892 ; wire \$893 ; wire [31:0] \$894 ; wire \$895 ; wire [31:0] \$896 ; wire \$897 ; wire \$898 ; wire \$899 ; wire [31:0] \$9 ; wire \$90 ; wire \$900 ; wire \$901 ; wire \$902 ; wire \$903 ; wire \$904 ; wire \$905 ; wire \$906 ; wire \$907 ; wire \$908 ; wire \$909 ; wire [31:0] \$91 ; wire [31:0] \$910 ; wire \$911 ; wire [31:0] \$912 ; wire \$913 ; wire [31:0] \$914 ; wire \$915 ; wire [31:0] \$916 ; wire \$917 ; wire [31:0] \$918 ; wire \$919 ; wire \$92 ; wire [31:0] \$920 ; wire \$921 ; wire [31:0] \$922 ; wire \$923 ; wire [31:0] \$924 ; wire \$925 ; wire [31:0] \$926 ; wire \$927 ; wire [31:0] \$928 ; wire \$929 ; wire [31:0] \$93 ; wire [31:0] \$930 ; wire \$931 ; wire [31:0] \$932 ; wire \$933 ; wire \$934 ; wire \$935 ; wire \$936 ; wire \$937 ; wire \$938 ; wire \$939 ; wire \$94 ; wire \$940 ; wire \$941 ; wire \$942 ; wire \$943 ; wire \$944 ; wire \$945 ; wire [31:0] \$946 ; wire \$947 ; wire [31:0] \$948 ; wire \$949 ; wire [31:0] \$95 ; wire [31:0] \$950 ; wire \$951 ; wire [31:0] \$952 ; wire \$953 ; wire [31:0] \$954 ; wire \$955 ; wire [31:0] \$956 ; wire \$957 ; wire [31:0] \$958 ; wire \$959 ; wire \$96 ; wire [31:0] \$960 ; wire \$961 ; wire [31:0] \$962 ; wire \$963 ; wire [31:0] \$964 ; wire \$965 ; wire [31:0] \$966 ; wire \$967 ; wire [31:0] \$968 ; wire \$969 ; wire [31:0] \$97 ; wire [31:0] \$970 ; wire \$971 ; wire [31:0] \$972 ; wire \$973 ; wire \$974 ; wire \$975 ; wire \$976 ; wire \$977 ; wire \$978 ; wire \$979 ; wire \$98 ; wire \$980 ; wire \$981 ; wire \$982 ; wire \$983 ; wire \$984 ; wire \$985 ; wire \$986 ; wire \$987 ; wire [31:0] \$988 ; wire \$989 ; wire [31:0] \$99 ; wire [31:0] \$990 ; wire \$991 ; wire [31:0] \$992 ; wire \$993 ; wire [31:0] \$994 ; wire \$995 ; wire [31:0] \$996 ; wire \$997 ; wire [31:0] \$998 ; wire \$999 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [31:0] crc; wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [31:0] crc_reg = 32'd4294967295; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire [31:0] data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input [31:0] data_in; wire [31:0] data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:356" *) crc_reg; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$3 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$4 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$3 [6]; assign \$5 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$6 = \$4 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$5 [9]; assign \$7 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$8 = \$6 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$7 [10]; assign \$9 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$10 = \$8 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$9 [12]; assign \$11 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$12 = \$10 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$11 [16]; assign \$13 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$14 = \$12 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$13 [24]; assign \$15 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$16 = \$14 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$15 [25]; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$18 = \$16 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$17 [26]; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$20 = \$18 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$19 [28]; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$22 = \$20 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$21 [29]; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$24 = \$22 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$23 [30]; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$26 = \$24 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$25 [31]; assign \$27 = \$26 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$28 = \$27 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$29 = \$28 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$30 = \$29 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$31 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$32 = \$31 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$34 = \$33 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$35 = \$34 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$36 = \$35 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$37 = \$36 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$38 = \$37 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$39 = \$38 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$40 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$42 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$43 = \$41 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$42 [1]; assign \$44 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$45 = \$43 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$44 [6]; assign \$46 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$47 = \$45 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$46 [7]; assign \$48 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$49 = \$47 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$48 [9]; assign \$50 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$51 = \$49 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$50 [11]; assign \$52 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$53 = \$51 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$52 [12]; assign \$54 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$55 = \$53 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$54 [13]; assign \$56 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$57 = \$55 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$56 [16]; assign \$58 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$59 = \$57 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$58 [17]; assign \$60 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$61 = \$59 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$60 [24]; assign \$62 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$63 = \$61 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$62 [27]; assign \$64 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$65 = \$63 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$64 [28]; assign \$66 = \$65 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$67 = \$66 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$68 = \$67 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$69 = \$68 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$70 = \$69 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$71 = \$70 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$72 = \$71 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$73 = \$72 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$74 = \$73 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$75 = \$74 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$76 = \$75 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$77 = \$76 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$78 = \$77 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$79 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$81 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$82 = \$80 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$81 [1]; assign \$83 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$84 = \$82 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$83 [2]; assign \$85 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$86 = \$84 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$85 [6]; assign \$87 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$88 = \$86 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$87 [7]; assign \$89 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$90 = \$88 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$89 [8]; assign \$91 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$92 = \$90 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$91 [9]; assign \$93 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$94 = \$92 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$93 [13]; assign \$95 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$96 = \$94 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$95 [14]; assign \$97 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$98 = \$96 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$97 [16]; assign \$99 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$100 = \$98 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$99 [17]; assign \$101 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$102 = \$100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$101 [18]; assign \$103 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$104 = \$102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$103 [24]; assign \$105 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$106 = \$104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$105 [26]; assign \$107 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$108 = \$106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$107 [30]; assign \$109 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$110 = \$108 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$109 [31]; assign \$111 = \$110 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$112 = \$111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$113 = \$112 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$114 = \$113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$115 = \$114 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$116 = \$115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$117 = \$116 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$118 = \$117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$119 = \$118 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$120 = \$119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$121 = \$120 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$122 = \$121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$123 = \$122 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$124 = \$123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$125 = \$124 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$126 = \$125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$127 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$129 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$130 = \$128 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$129 [2]; assign \$131 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$132 = \$130 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$131 [3]; assign \$133 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$134 = \$132 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$133 [7]; assign \$135 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$136 = \$134 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$135 [8]; assign \$137 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$138 = \$136 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$137 [9]; assign \$139 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$140 = \$138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$139 [10]; assign \$141 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$142 = \$140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$141 [14]; assign \$143 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$144 = \$142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$143 [15]; assign \$145 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$146 = \$144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$145 [17]; assign \$147 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$148 = \$146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$147 [18]; assign \$149 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$150 = \$148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$149 [19]; assign \$151 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$152 = \$150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$151 [25]; assign \$153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$154 = \$152 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$153 [27]; assign \$155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$156 = \$154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$155 [31]; assign \$157 = \$156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$158 = \$157 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$159 = \$158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$160 = \$159 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$161 = \$160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$162 = \$161 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$163 = \$162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$164 = \$163 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$165 = \$164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$166 = \$165 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$167 = \$166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$168 = \$167 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$169 = \$168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$170 = \$169 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$171 = \$170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$172 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$174 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$175 = \$173 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$174 [2]; assign \$176 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$177 = \$175 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$176 [3]; assign \$178 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$179 = \$177 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$178 [4]; assign \$180 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$181 = \$179 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$180 [6]; assign \$182 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$183 = \$181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$182 [8]; assign \$184 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$185 = \$183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$184 [11]; assign \$186 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$187 = \$185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$186 [12]; assign \$188 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$189 = \$187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$188 [15]; assign \$190 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$191 = \$189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$190 [18]; assign \$192 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$193 = \$191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$192 [19]; assign \$194 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$195 = \$193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$194 [20]; assign \$196 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$197 = \$195 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$196 [24]; assign \$198 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$199 = \$197 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$198 [25]; assign \$200 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$201 = \$199 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$200 [29]; assign \$202 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$203 = \$201 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$202 [30]; assign \$204 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$205 = \$203 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$204 [31]; assign \$206 = \$205 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$207 = \$206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$208 = \$207 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$209 = \$208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$210 = \$209 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$211 = \$210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$212 = \$211 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$213 = \$212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$214 = \$213 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$215 = \$214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$216 = \$215 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$217 = \$216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$218 = \$217 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$219 = \$218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$220 = \$219 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$221 = \$220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$222 = \$221 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$223 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$225 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$226 = \$224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$225 [1]; assign \$227 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$228 = \$226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$227 [3]; assign \$229 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$230 = \$228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$229 [4]; assign \$231 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$232 = \$230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$231 [5]; assign \$233 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$234 = \$232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$233 [6]; assign \$235 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$236 = \$234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$235 [7]; assign \$237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$238 = \$236 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$237 [10]; assign \$239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$240 = \$238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$239 [13]; assign \$241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$242 = \$240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$241 [19]; assign \$243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$244 = \$242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$243 [20]; assign \$245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$246 = \$244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$245 [21]; assign \$247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$248 = \$246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$247 [24]; assign \$249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$250 = \$248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$249 [28]; assign \$251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$252 = \$250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$251 [29]; assign \$253 = \$252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$254 = \$253 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$255 = \$254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$256 = \$255 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$257 = \$256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$258 = \$257 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$259 = \$258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$260 = \$259 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$261 = \$260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$262 = \$261 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$263 = \$262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$264 = \$263 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$265 = \$264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$266 = \$265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$267 = \$266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$268 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$270 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$271 = \$269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$270 [2]; assign \$272 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$273 = \$271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$272 [4]; assign \$274 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$275 = \$273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$274 [5]; assign \$276 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$277 = \$275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$276 [6]; assign \$278 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$279 = \$277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$278 [7]; assign \$280 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$281 = \$279 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$280 [8]; assign \$282 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$283 = \$281 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$282 [11]; assign \$284 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$285 = \$283 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$284 [14]; assign \$286 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$287 = \$285 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$286 [20]; assign \$288 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$289 = \$287 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$288 [21]; assign \$290 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$291 = \$289 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$290 [22]; assign \$292 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$293 = \$291 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$292 [25]; assign \$294 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$295 = \$293 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$294 [29]; assign \$296 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$297 = \$295 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$296 [30]; assign \$298 = \$297 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$299 = \$298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$300 = \$299 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$301 = \$300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$302 = \$301 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$303 = \$302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$304 = \$303 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$305 = \$304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$306 = \$305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$307 = \$306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$308 = \$307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$309 = \$308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$310 = \$309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$311 = \$310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$312 = \$311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$313 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$315 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$316 = \$314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$315 [2]; assign \$317 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$318 = \$316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$317 [3]; assign \$319 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$320 = \$318 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$319 [5]; assign \$321 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$322 = \$320 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$321 [7]; assign \$323 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$324 = \$322 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$323 [8]; assign \$325 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$326 = \$324 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$325 [10]; assign \$327 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$328 = \$326 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$327 [15]; assign \$329 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$330 = \$328 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$329 [16]; assign \$331 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$332 = \$330 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$331 [21]; assign \$333 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$334 = \$332 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$333 [22]; assign \$335 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$336 = \$334 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$335 [23]; assign \$337 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$338 = \$336 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$337 [24]; assign \$339 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$340 = \$338 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$339 [25]; assign \$341 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$342 = \$340 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$341 [28]; assign \$343 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$344 = \$342 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$343 [29]; assign \$345 = \$344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$346 = \$345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$347 = \$346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$348 = \$347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$349 = \$348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$350 = \$349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$351 = \$350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$352 = \$351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$353 = \$352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$354 = \$353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$355 = \$354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$356 = \$355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$357 = \$356 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$358 = \$357 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$359 = \$358 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$360 = \$359 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$361 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$363 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$364 = \$362 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$363 [1]; assign \$365 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$366 = \$364 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$365 [3]; assign \$367 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$368 = \$366 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$367 [4]; assign \$369 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$370 = \$368 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$369 [8]; assign \$371 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$372 = \$370 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$371 [10]; assign \$373 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$374 = \$372 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$373 [11]; assign \$375 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$376 = \$374 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$375 [12]; assign \$377 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$378 = \$376 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$377 [17]; assign \$379 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$380 = \$378 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$379 [22]; assign \$381 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$382 = \$380 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$381 [23]; assign \$383 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$384 = \$382 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$383 [28]; assign \$385 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$386 = \$384 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$385 [31]; assign \$387 = \$386 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$388 = \$387 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$389 = \$388 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$390 = \$389 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$391 = \$390 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$392 = \$391 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$393 = \$392 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$394 = \$393 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$395 = \$394 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$396 = \$395 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$397 = \$396 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$398 = \$397 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$399 = \$398 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$400 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$402 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$403 = \$401 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$402 [2]; assign \$404 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$405 = \$403 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$404 [4]; assign \$406 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$407 = \$405 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$406 [5]; assign \$408 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$409 = \$407 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$408 [9]; assign \$410 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$411 = \$409 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$410 [11]; assign \$412 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$413 = \$411 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$412 [12]; assign \$414 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$415 = \$413 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$414 [13]; assign \$416 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$417 = \$415 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$416 [18]; assign \$418 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$419 = \$417 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$418 [23]; assign \$420 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$421 = \$419 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$420 [24]; assign \$422 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$423 = \$421 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$422 [29]; assign \$424 = \$423 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$425 = \$424 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$426 = \$425 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$427 = \$426 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$428 = \$427 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$429 = \$428 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$430 = \$429 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$431 = \$430 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$432 = \$431 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$433 = \$432 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$434 = \$433 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$435 = \$434 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$436 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$438 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$439 = \$437 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$438 [2]; assign \$440 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$441 = \$439 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$440 [3]; assign \$442 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$443 = \$441 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$442 [5]; assign \$444 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$445 = \$443 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$444 [9]; assign \$446 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$447 = \$445 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$446 [13]; assign \$448 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$449 = \$447 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$448 [14]; assign \$450 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$451 = \$449 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$450 [16]; assign \$452 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$453 = \$451 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$452 [19]; assign \$454 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$455 = \$453 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$454 [26]; assign \$456 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$457 = \$455 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$456 [28]; assign \$458 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$459 = \$457 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$458 [29]; assign \$460 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$461 = \$459 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$460 [31]; assign \$462 = \$461 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$463 = \$462 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$464 = \$463 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$465 = \$464 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$466 = \$465 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$467 = \$466 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$468 = \$467 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$469 = \$468 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$470 = \$469 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$471 = \$470 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$472 = \$471 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$473 = \$472 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$474 = \$473 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$475 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$477 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$478 = \$476 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$477 [1]; assign \$479 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$480 = \$478 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$479 [3]; assign \$481 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$482 = \$480 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$481 [4]; assign \$483 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$484 = \$482 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$483 [9]; assign \$485 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$486 = \$484 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$485 [12]; assign \$487 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$488 = \$486 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$487 [14]; assign \$489 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$490 = \$488 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$489 [15]; assign \$491 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$492 = \$490 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$491 [16]; assign \$493 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$494 = \$492 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$493 [17]; assign \$495 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$496 = \$494 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$495 [20]; assign \$497 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$498 = \$496 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$497 [24]; assign \$499 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$500 = \$498 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$499 [25]; assign \$501 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$502 = \$500 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$501 [26]; assign \$503 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$504 = \$502 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$503 [27]; assign \$505 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$506 = \$504 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$505 [28]; assign \$507 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$508 = \$506 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$507 [31]; assign \$509 = \$508 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$510 = \$509 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$511 = \$510 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$512 = \$511 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$513 = \$512 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$514 = \$513 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$515 = \$514 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$516 = \$515 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$517 = \$516 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$518 = \$517 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$519 = \$518 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$520 = \$519 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$521 = \$520 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$522 = \$521 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$523 = \$522 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$524 = \$523 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$525 = \$524 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$526 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$528 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$529 = \$527 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$528 [1]; assign \$530 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$531 = \$529 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$530 [2]; assign \$532 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$533 = \$531 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$532 [4]; assign \$534 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$535 = \$533 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$534 [5]; assign \$536 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$537 = \$535 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$536 [6]; assign \$538 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$539 = \$537 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$538 [9]; assign \$540 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$541 = \$539 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$540 [12]; assign \$542 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$543 = \$541 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$542 [13]; assign \$544 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$545 = \$543 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$544 [15]; assign \$546 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$547 = \$545 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$546 [17]; assign \$548 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$549 = \$547 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$548 [18]; assign \$550 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$551 = \$549 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$550 [21]; assign \$552 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$553 = \$551 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$552 [24]; assign \$554 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$555 = \$553 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$554 [27]; assign \$556 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$557 = \$555 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$556 [30]; assign \$558 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$559 = \$557 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$558 [31]; assign \$560 = \$559 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$561 = \$560 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$562 = \$561 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$563 = \$562 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$564 = \$563 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$565 = \$564 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$566 = \$565 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$567 = \$566 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$568 = \$567 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$569 = \$568 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$570 = \$569 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$571 = \$570 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$572 = \$571 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$573 = \$572 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$574 = \$573 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$575 = \$574 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$576 = \$575 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$577 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$579 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$580 = \$578 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$579 [2]; assign \$581 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$582 = \$580 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$581 [3]; assign \$583 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$584 = \$582 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$583 [5]; assign \$585 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$586 = \$584 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$585 [6]; assign \$587 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$588 = \$586 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$587 [7]; assign \$589 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$590 = \$588 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$589 [10]; assign \$591 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$592 = \$590 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$591 [13]; assign \$593 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$594 = \$592 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$593 [14]; assign \$595 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$596 = \$594 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$595 [16]; assign \$597 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$598 = \$596 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$597 [18]; assign \$599 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$600 = \$598 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$599 [19]; assign \$601 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$602 = \$600 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$601 [22]; assign \$603 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$604 = \$602 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$603 [25]; assign \$605 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$606 = \$604 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$605 [28]; assign \$607 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$608 = \$606 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$607 [31]; assign \$609 = \$608 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$610 = \$609 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$611 = \$610 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$612 = \$611 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$613 = \$612 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$614 = \$613 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$615 = \$614 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$616 = \$615 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$617 = \$616 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$618 = \$617 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$619 = \$618 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$620 = \$619 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$621 = \$620 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$622 = \$621 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$623 = \$622 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$624 = \$623 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$625 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$627 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$628 = \$626 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$627 [3]; assign \$629 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$630 = \$628 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$629 [4]; assign \$631 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$632 = \$630 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$631 [6]; assign \$633 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$634 = \$632 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$633 [7]; assign \$635 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$636 = \$634 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$635 [8]; assign \$637 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$638 = \$636 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$637 [11]; assign \$639 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$640 = \$638 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$639 [14]; assign \$641 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$642 = \$640 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$641 [15]; assign \$643 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$644 = \$642 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$643 [17]; assign \$645 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$646 = \$644 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$645 [19]; assign \$647 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$648 = \$646 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$647 [20]; assign \$649 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$650 = \$648 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$649 [23]; assign \$651 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$652 = \$650 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$651 [26]; assign \$653 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$654 = \$652 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$653 [29]; assign \$655 = \$654 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$656 = \$655 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$657 = \$656 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$658 = \$657 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$659 = \$658 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$660 = \$659 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$661 = \$660 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$662 = \$661 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$663 = \$662 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$664 = \$663 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$665 = \$664 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$666 = \$665 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$667 = \$666 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$668 = \$667 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$669 = \$668 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$670 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$672 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$673 = \$671 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$672 [4]; assign \$674 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$675 = \$673 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$674 [5]; assign \$676 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$677 = \$675 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$676 [7]; assign \$678 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$679 = \$677 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$678 [8]; assign \$680 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$681 = \$679 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$680 [9]; assign \$682 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$683 = \$681 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$682 [12]; assign \$684 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$685 = \$683 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$684 [15]; assign \$686 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$687 = \$685 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$686 [16]; assign \$688 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$689 = \$687 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$688 [18]; assign \$690 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$691 = \$689 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$690 [20]; assign \$692 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$693 = \$691 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$692 [21]; assign \$694 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$695 = \$693 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$694 [24]; assign \$696 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$697 = \$695 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$696 [27]; assign \$698 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$699 = \$697 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$698 [30]; assign \$700 = \$699 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$701 = \$700 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$702 = \$701 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$703 = \$702 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$704 = \$703 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$705 = \$704 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$706 = \$705 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$707 = \$706 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$708 = \$707 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$709 = \$708 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$710 = \$709 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$711 = \$710 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$712 = \$711 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$713 = \$712 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$714 = \$713 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$715 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$717 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$718 = \$716 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$717 [4]; assign \$719 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$720 = \$718 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$719 [5]; assign \$721 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$722 = \$720 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$721 [8]; assign \$723 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$724 = \$722 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$723 [12]; assign \$725 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$726 = \$724 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$725 [13]; assign \$727 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$728 = \$726 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$727 [17]; assign \$729 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$730 = \$728 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$729 [19]; assign \$731 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$732 = \$730 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$731 [21]; assign \$733 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$734 = \$732 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$733 [22]; assign \$735 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$736 = \$734 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$735 [24]; assign \$737 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$738 = \$736 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$737 [26]; assign \$739 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$740 = \$738 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$739 [29]; assign \$741 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$742 = \$740 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$741 [30]; assign \$743 = \$742 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$744 = \$743 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$745 = \$744 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$746 = \$745 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$747 = \$746 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$748 = \$747 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$749 = \$748 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$750 = \$749 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$751 = \$750 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$752 = \$751 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$753 = \$752 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$754 = \$753 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$755 = \$754 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$756 = \$755 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$757 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$759 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$760 = \$758 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$759 [5]; assign \$761 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$762 = \$760 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$761 [6]; assign \$763 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$764 = \$762 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$763 [9]; assign \$765 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$766 = \$764 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$765 [13]; assign \$767 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$768 = \$766 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$767 [14]; assign \$769 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$770 = \$768 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$769 [18]; assign \$771 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$772 = \$770 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$771 [20]; assign \$773 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$774 = \$772 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$773 [22]; assign \$775 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$776 = \$774 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$775 [23]; assign \$777 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$778 = \$776 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$777 [25]; assign \$779 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$780 = \$778 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$779 [27]; assign \$781 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$782 = \$780 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$781 [30]; assign \$783 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$784 = \$782 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$783 [31]; assign \$785 = \$784 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$786 = \$785 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$787 = \$786 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$788 = \$787 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$789 = \$788 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$790 = \$789 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$791 = \$790 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$792 = \$791 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$793 = \$792 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$794 = \$793 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$795 = \$794 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$796 = \$795 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$797 = \$796 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$798 = \$797 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$799 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$801 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$802 = \$800 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$801 [6]; assign \$803 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$804 = \$802 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$803 [7]; assign \$805 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$806 = \$804 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$805 [10]; assign \$807 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$808 = \$806 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$807 [14]; assign \$809 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$810 = \$808 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$809 [15]; assign \$811 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$812 = \$810 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$811 [19]; assign \$813 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$814 = \$812 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$813 [21]; assign \$815 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$816 = \$814 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$815 [23]; assign \$817 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$818 = \$816 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$817 [24]; assign \$819 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$820 = \$818 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$819 [26]; assign \$821 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$822 = \$820 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$821 [28]; assign \$823 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$824 = \$822 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$823 [31]; assign \$825 = \$824 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$826 = \$825 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$827 = \$826 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$828 = \$827 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$829 = \$828 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$830 = \$829 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$831 = \$830 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$832 = \$831 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$833 = \$832 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$834 = \$833 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$835 = \$834 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$836 = \$835 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$837 = \$836 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$838 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$840 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$841 = \$839 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$840 [7]; assign \$842 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$843 = \$841 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$842 [8]; assign \$844 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$845 = \$843 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$844 [11]; assign \$846 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$847 = \$845 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$846 [15]; assign \$848 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$849 = \$847 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$848 [16]; assign \$850 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$851 = \$849 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$850 [20]; assign \$852 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$853 = \$851 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$852 [22]; assign \$854 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$855 = \$853 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$854 [24]; assign \$856 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$857 = \$855 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$856 [25]; assign \$858 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$859 = \$857 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$858 [27]; assign \$860 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$861 = \$859 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$860 [29]; assign \$862 = \$861 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$863 = \$862 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$864 = \$863 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$865 = \$864 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$866 = \$865 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$867 = \$866 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$868 = \$867 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$869 = \$868 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$870 = \$869 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$871 = \$870 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$872 = \$871 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$873 = \$872 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$874 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$876 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$877 = \$875 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$876 [8]; assign \$878 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$879 = \$877 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$878 [9]; assign \$880 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$881 = \$879 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$880 [12]; assign \$882 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$883 = \$881 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$882 [16]; assign \$884 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$885 = \$883 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$884 [17]; assign \$886 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$887 = \$885 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$886 [21]; assign \$888 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$889 = \$887 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$888 [23]; assign \$890 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$891 = \$889 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$890 [25]; assign \$892 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$893 = \$891 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$892 [26]; assign \$894 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$895 = \$893 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$894 [28]; assign \$896 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$897 = \$895 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$896 [30]; assign \$898 = \$897 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$899 = \$898 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$900 = \$899 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$901 = \$900 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$902 = \$901 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$903 = \$902 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$904 = \$903 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$905 = \$904 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$906 = \$905 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$907 = \$906 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$908 = \$907 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$909 = \$908 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$910 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$912 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$913 = \$911 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$912 [9]; assign \$914 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$915 = \$913 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$914 [10]; assign \$916 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$917 = \$915 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$916 [13]; assign \$918 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$919 = \$917 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$918 [17]; assign \$920 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$921 = \$919 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$920 [18]; assign \$922 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$923 = \$921 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$922 [22]; assign \$924 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$925 = \$923 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$924 [24]; assign \$926 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$927 = \$925 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$926 [26]; assign \$928 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$929 = \$927 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$928 [27]; assign \$930 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$931 = \$929 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$930 [29]; assign \$932 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$933 = \$931 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$932 [31]; assign \$934 = \$933 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$935 = \$934 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$936 = \$935 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$937 = \$936 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$938 = \$937 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$939 = \$938 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$940 = \$939 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$941 = \$940 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$942 = \$941 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$943 = \$942 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$944 = \$943 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$945 = \$944 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$946 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$948 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$949 = \$947 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$948 [9]; assign \$950 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$951 = \$949 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$950 [11]; assign \$952 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$953 = \$951 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$952 [12]; assign \$954 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$955 = \$953 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$954 [14]; assign \$956 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$957 = \$955 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$956 [16]; assign \$958 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$959 = \$957 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$958 [18]; assign \$960 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$961 = \$959 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$960 [19]; assign \$962 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$963 = \$961 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$962 [23]; assign \$964 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$965 = \$963 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$964 [24]; assign \$966 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$967 = \$965 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$966 [26]; assign \$968 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$969 = \$967 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$968 [27]; assign \$970 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$971 = \$969 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$970 [29]; assign \$972 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$973 = \$971 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$972 [31]; assign \$974 = \$973 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$975 = \$974 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$976 = \$975 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$977 = \$976 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$978 = \$977 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$979 = \$978 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$980 = \$979 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$981 = \$980 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$982 = \$981 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$983 = \$982 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$984 = \$983 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$985 = \$984 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$986 = \$985 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$987 = \$986 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$988 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$990 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$991 = \$989 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$990 [1]; assign \$992 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$993 = \$991 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$992 [6]; assign \$994 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$995 = \$993 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$994 [9]; assign \$996 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$997 = \$995 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$996 [13]; assign \$998 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$999 = \$997 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$998 [15]; assign \$1000 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1001 = \$999 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1000 [16]; assign \$1002 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1003 = \$1001 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1002 [17]; assign \$1004 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1005 = \$1003 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1004 [19]; assign \$1006 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1007 = \$1005 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1006 [20]; assign \$1008 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1009 = \$1007 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1008 [26]; assign \$1010 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1011 = \$1009 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1010 [27]; assign \$1012 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1013 = \$1011 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1012 [29]; assign \$1014 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1015 = \$1013 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1014 [31]; assign \$1016 = \$1015 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1017 = \$1016 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1018 = \$1017 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1019 = \$1018 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1020 = \$1019 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1021 = \$1020 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1022 = \$1021 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1023 = \$1022 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1024 = \$1023 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1025 = \$1024 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1026 = \$1025 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1027 = \$1026 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1028 = \$1027 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1029 = \$1028 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1030 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1032 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1033 = \$1031 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1032 [2]; assign \$1034 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1035 = \$1033 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1034 [7]; assign \$1036 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1037 = \$1035 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1036 [10]; assign \$1038 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1039 = \$1037 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1038 [14]; assign \$1040 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1041 = \$1039 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1040 [16]; assign \$1042 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1043 = \$1041 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1042 [17]; assign \$1044 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1045 = \$1043 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1044 [18]; assign \$1046 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1047 = \$1045 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1046 [20]; assign \$1048 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1049 = \$1047 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1048 [21]; assign \$1050 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1051 = \$1049 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1050 [27]; assign \$1052 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1053 = \$1051 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1052 [28]; assign \$1054 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1055 = \$1053 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1054 [30]; assign \$1056 = \$1055 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1057 = \$1056 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1058 = \$1057 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1059 = \$1058 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1060 = \$1059 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1061 = \$1060 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1062 = \$1061 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1063 = \$1062 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1064 = \$1063 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1065 = \$1064 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1066 = \$1065 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1067 = \$1066 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1068 = \$1067 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1069 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1071 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1072 = \$1070 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1071 [3]; assign \$1073 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1074 = \$1072 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1073 [8]; assign \$1075 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1076 = \$1074 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1075 [11]; assign \$1077 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1078 = \$1076 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1077 [15]; assign \$1079 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1080 = \$1078 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1079 [17]; assign \$1081 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1082 = \$1080 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1081 [18]; assign \$1083 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1084 = \$1082 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1083 [19]; assign \$1085 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1086 = \$1084 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1085 [21]; assign \$1087 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1088 = \$1086 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1087 [22]; assign \$1089 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1090 = \$1088 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1089 [28]; assign \$1091 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1092 = \$1090 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1091 [29]; assign \$1093 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1094 = \$1092 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1093 [31]; assign \$1095 = \$1094 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1096 = \$1095 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1097 = \$1096 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1098 = \$1097 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1099 = \$1098 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1100 = \$1099 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1101 = \$1100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1102 = \$1101 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1103 = \$1102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1104 = \$1103 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1105 = \$1104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1106 = \$1105 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1107 = \$1106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1108 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1110 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1111 = \$1109 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1110 [3]; assign \$1112 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1113 = \$1111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1112 [4]; assign \$1114 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1115 = \$1113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1114 [6]; assign \$1116 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1117 = \$1115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1116 [10]; assign \$1118 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1119 = \$1117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1118 [18]; assign \$1120 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1121 = \$1119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1120 [19]; assign \$1122 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1123 = \$1121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1122 [20]; assign \$1124 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1125 = \$1123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1124 [22]; assign \$1126 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1127 = \$1125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1126 [23]; assign \$1128 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1129 = \$1127 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1128 [24]; assign \$1130 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1131 = \$1129 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1130 [25]; assign \$1132 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1133 = \$1131 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1132 [26]; assign \$1134 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1135 = \$1133 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1134 [28]; assign \$1136 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1137 = \$1135 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1136 [31]; assign \$1138 = \$1137 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1139 = \$1138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1140 = \$1139 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1141 = \$1140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1142 = \$1141 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1143 = \$1142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1144 = \$1143 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1145 = \$1144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1146 = \$1145 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1147 = \$1146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1148 = \$1147 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1149 = \$1148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1150 = \$1149 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1151 = \$1150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1152 = \$1151 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1156 = \$1154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1155 [4]; assign \$1157 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1158 = \$1156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1157 [5]; assign \$1159 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1160 = \$1158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1159 [7]; assign \$1161 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1162 = \$1160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1161 [11]; assign \$1163 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1164 = \$1162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1163 [19]; assign \$1165 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1166 = \$1164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1165 [20]; assign \$1167 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1168 = \$1166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1167 [21]; assign \$1169 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1170 = \$1168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1169 [23]; assign \$1171 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1172 = \$1170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1171 [24]; assign \$1173 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1174 = \$1172 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1173 [25]; assign \$1175 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1176 = \$1174 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1175 [26]; assign \$1177 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1178 = \$1176 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1177 [27]; assign \$1179 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1180 = \$1178 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1179 [29]; assign \$1181 = \$1180 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1182 = \$1181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1183 = \$1182 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1184 = \$1183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1185 = \$1184 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1186 = \$1185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1187 = \$1186 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1188 = \$1187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1189 = \$1188 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1190 = \$1189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1191 = \$1190 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1192 = \$1191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1193 = \$1192 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1194 = \$1193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1195 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1197 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1198 = \$1196 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1197 [5]; assign \$1199 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1200 = \$1198 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1199 [6]; assign \$1201 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1202 = \$1200 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1201 [8]; assign \$1203 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1204 = \$1202 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1203 [12]; assign \$1205 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1206 = \$1204 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1205 [20]; assign \$1207 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1208 = \$1206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1207 [21]; assign \$1209 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1210 = \$1208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1209 [22]; assign \$1211 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1212 = \$1210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1211 [24]; assign \$1213 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1214 = \$1212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1213 [25]; assign \$1215 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1216 = \$1214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1215 [26]; assign \$1217 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1218 = \$1216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1217 [27]; assign \$1219 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1220 = \$1218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1219 [28]; assign \$1221 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1222 = \$1220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1221 [30]; assign \$1223 = \$1222 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1224 = \$1223 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1225 = \$1224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1226 = \$1225 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1227 = \$1226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$1228 = \$1227 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1229 = \$1228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1230 = \$1229 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1231 = \$1230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1232 = \$1231 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1233 = \$1232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1234 = \$1233 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1235 = \$1234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1236 = \$1235 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1240 = \$1238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1239 [6]; assign \$1241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1242 = \$1240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1241 [7]; assign \$1243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1244 = \$1242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1243 [9]; assign \$1245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1246 = \$1244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1245 [13]; assign \$1247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1248 = \$1246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1247 [21]; assign \$1249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1250 = \$1248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1249 [22]; assign \$1251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1252 = \$1250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1251 [23]; assign \$1253 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1254 = \$1252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1253 [25]; assign \$1255 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1256 = \$1254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1255 [26]; assign \$1257 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1258 = \$1256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1257 [27]; assign \$1259 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1260 = \$1258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1259 [28]; assign \$1261 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1262 = \$1260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1261 [29]; assign \$1263 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1264 = \$1262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1263 [31]; assign \$1265 = \$1264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1266 = \$1265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1267 = \$1266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1268 = \$1267 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1269 = \$1268 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1270 = \$1269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1271 = \$1270 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1272 = \$1271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1273 = \$1272 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1274 = \$1273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1275 = \$1274 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1276 = \$1275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1277 = \$1276 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1278 = \$1277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1279 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1281 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1282 = \$1280 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1281 [7]; assign \$1283 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1284 = \$1282 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1283 [8]; assign \$1285 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1286 = \$1284 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1285 [10]; assign \$1287 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1288 = \$1286 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1287 [14]; assign \$1289 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1290 = \$1288 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1289 [22]; assign \$1291 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1292 = \$1290 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1291 [23]; assign \$1293 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1294 = \$1292 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1293 [24]; assign \$1295 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1296 = \$1294 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1295 [26]; assign \$1297 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1298 = \$1296 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1297 [27]; assign \$1299 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1300 = \$1298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1299 [28]; assign \$1301 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1302 = \$1300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1301 [29]; assign \$1303 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1304 = \$1302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1303 [30]; assign \$1305 = \$1304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1306 = \$1305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1307 = \$1306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1308 = \$1307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1309 = \$1308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1310 = \$1309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1311 = \$1310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1312 = \$1311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1313 = \$1312 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1314 = \$1313 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1315 = \$1314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1316 = \$1315 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1317 = \$1316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1318 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1320 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1321 = \$1319 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1320 [8]; assign \$1322 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1323 = \$1321 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1322 [9]; assign \$1324 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1325 = \$1323 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1324 [11]; assign \$1326 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1327 = \$1325 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1326 [15]; assign \$1328 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1329 = \$1327 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1328 [23]; assign \$1330 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1331 = \$1329 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1330 [24]; assign \$1332 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1333 = \$1331 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1332 [25]; assign \$1334 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1335 = \$1333 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1334 [27]; assign \$1336 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1337 = \$1335 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1336 [28]; assign \$1338 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1339 = \$1337 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1338 [29]; assign \$1340 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1341 = \$1339 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1340 [30]; assign \$1342 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1343 = \$1341 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1342 [31]; assign \$1344 = \$1343 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1345 = \$1344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1346 = \$1345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1347 = \$1346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1348 = \$1347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1349 = \$1348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1350 = \$1349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1351 = \$1350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1352 = \$1351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1353 = \$1352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1354 = \$1353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1355 = \$1354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1356 = \$1355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_reg <= 32'd4294967295; else crc_reg <= \$1357 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$27 ) begin end \$1357 = crc_reg; if (valid) begin \$1357 [0] = \$39 ; \$1357 [1] = \$78 ; \$1357 [2] = \$126 ; \$1357 [3] = \$171 ; \$1357 [4] = \$222 ; \$1357 [5] = \$267 ; \$1357 [6] = \$312 ; \$1357 [7] = \$360 ; \$1357 [8] = \$399 ; \$1357 [9] = \$435 ; \$1357 [10] = \$474 ; \$1357 [11] = \$525 ; \$1357 [12] = \$576 ; \$1357 [13] = \$624 ; \$1357 [14] = \$669 ; \$1357 [15] = \$714 ; \$1357 [16] = \$756 ; \$1357 [17] = \$798 ; \$1357 [18] = \$837 ; \$1357 [19] = \$873 ; \$1357 [20] = \$909 ; \$1357 [21] = \$945 ; \$1357 [22] = \$987 ; \$1357 [23] = \$1029 ; \$1357 [24] = \$1068 ; \$1357 [25] = \$1107 ; \$1357 [26] = \$1152 ; \$1357 [27] = \$1194 ; \$1357 [28] = \$1236 ; \$1357 [29] = \$1278 ; \$1357 [30] = \$1317 ; \$1357 [31] = \$1356 ; end else if (start) begin \$1357 = 32'd4294967295; end end assign data = data_in; assign crc = crc_reg; assign \$2 = \$1 [0]; assign \$41 = \$40 [0]; assign \$80 = \$79 [0]; assign \$128 = \$127 [1]; assign \$173 = \$172 [0]; assign \$224 = \$223 [0]; assign \$269 = \$268 [1]; assign \$314 = \$313 [0]; assign \$362 = \$361 [0]; assign \$401 = \$400 [1]; assign \$437 = \$436 [0]; assign \$476 = \$475 [0]; assign \$527 = \$526 [0]; assign \$578 = \$577 [1]; assign \$626 = \$625 [2]; assign \$671 = \$670 [3]; assign \$716 = \$715 [0]; assign \$758 = \$757 [1]; assign \$800 = \$799 [2]; assign \$839 = \$838 [3]; assign \$875 = \$874 [4]; assign \$911 = \$910 [5]; assign \$947 = \$946 [0]; assign \$989 = \$988 [0]; assign \$1031 = \$1030 [1]; assign \$1070 = \$1069 [2]; assign \$1109 = \$1108 [0]; assign \$1154 = \$1153 [1]; assign \$1196 = \$1195 [2]; assign \$1238 = \$1237 [3]; assign \$1280 = \$1279 [4]; assign \$1319 = \$1318 [5]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:81" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_C_shift_dma_7 (sync_100_rst, read_bram_address_input, write_bram_address_input, read_node_address_input, write_node_address_input, data_input, read_complete_input, write_complete_input, bram_read_data, write_bram_address_output, read_bram_address_output, write_node_address_output, read_node_address_output, write_complete_output, data_output, read_complete_output, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$28 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; reg \$15 ; reg [31:0] \$16 ; reg \$17 ; reg \$18 ; wire \$2 ; wire \$3 ; wire \$4 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) output [15:0] bram_address; reg [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) input [31:0] bram_read_data; wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) output [31:0] bram_write_data; reg [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) output bram_write_enable; reg bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) reg [31:0] buf_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) reg [15:0] buf_read_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) reg buf_read_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) reg [7:0] buf_read_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) reg [15:0] buf_write_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) reg buf_write_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) reg [7:0] buf_write_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) input [31:0] data_input; wire [31:0] data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) output [31:0] data_output; reg [31:0] data_output = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) input [15:0] read_bram_address_input; wire [15:0] read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) output [15:0] read_bram_address_output; reg [15:0] read_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) input read_complete_input; wire read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) output read_complete_output; reg read_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) reg read_next = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) input [7:0] read_node_address_input; wire [7:0] read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) output [7:0] read_node_address_output; reg [7:0] read_node_address_output = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) input [15:0] write_bram_address_input; wire [15:0] write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) output [15:0] write_bram_address_output; reg [15:0] write_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) input write_complete_input; wire write_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) output write_complete_output; reg write_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) input [7:0] write_node_address_input; wire [7:0] write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) output [7:0] write_node_address_output; reg [7:0] write_node_address_output = 8'h00; assign \$1 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 3'h7; assign \$2 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$3 = \$1 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$2 ; assign \$4 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 3'h7; assign \$5 = \$4 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$6 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$7 = \$5 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$6 ; assign \$8 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 3'h7; assign \$9 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$10 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$9 ; assign \$11 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 3'h7; assign \$12 = \$11 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$13 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$13 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_bram_address <= 16'h0000; else buf_write_bram_address <= write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_bram_address <= 16'h0000; else buf_read_bram_address <= read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_node_address <= 8'h00; else buf_write_node_address <= write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_node_address <= 8'h00; else buf_read_node_address <= read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_bram_address_output <= 16'h0000; else write_bram_address_output <= buf_write_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_bram_address_output <= 16'h0000; else read_bram_address_output <= buf_read_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_node_address_output <= 8'h00; else write_node_address_output <= buf_write_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_node_address_output <= 8'h00; else read_node_address_output <= buf_read_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_data <= 32'd0; else buf_data <= data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_complete <= 1'h0; else buf_read_complete <= read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_complete_output <= 1'h0; else write_complete_output <= buf_write_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_next <= 1'h0; else read_next <= \$15 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_output <= 32'd0; else data_output <= \$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_complete_output <= 1'h0; else read_complete_output <= \$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_complete <= 1'h0; else buf_write_complete <= \$18 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$28 ) begin end \$15 = read_next; if (\$3 ) begin \$15 = 1'h1; end else if (read_next) begin \$15 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$28 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$16 = bram_read_data; end else begin \$16 = buf_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$28 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$17 = 1'h1; end else begin \$17 = buf_read_complete; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$28 ) begin end (* full_case = 32'd1 *) if (\$7 ) begin \$18 = 1'h1; end else begin \$18 = write_complete_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$28 ) begin end bram_address = 16'h0000; if (\$10 ) begin bram_address = read_bram_address_input; end if (\$14 ) begin bram_address = write_bram_address_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$28 ) begin end bram_write_data = 32'd0; if (\$14 ) begin bram_write_data = data_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$28 ) begin end (* full_case = 32'd1 *) if (\$14 ) begin bram_write_enable = 1'h1; end else begin bram_write_enable = 1'h0; end end endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:104" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_D (sync_100_rst, rx, \bram_read_data$40 , tx, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$29 = 0; wire [5:0] \$1 ; wire [34:0] \$10 ; wire \$100 ; wire \$101 ; wire [4:0] \$102 ; wire [16:0] \$103 ; wire [3:0] \$104 ; wire [4:0] \$105 ; wire [5:0] \$106 ; wire \$107 ; wire \$108 ; wire \$109 ; wire \$11 ; wire \$110 ; wire \$111 ; wire \$112 ; wire \$113 ; wire \$114 ; wire \$115 ; wire [3:0] \$116 ; wire \$117 ; wire [5:0] \$118 ; wire [4:0] \$119 ; wire \$12 ; wire [31:0] \$120 ; wire [3:0] \$121 ; wire [6:0] \$122 ; wire [31:0] \$123 ; wire [31:0] \$124 ; wire [3:0] \$125 ; wire \$126 ; wire [3:0] \$127 ; wire [3:0] \$128 ; wire [4:0] \$129 ; wire \$13 ; wire [4:0] \$130 ; wire [31:0] \$131 ; wire [3:0] \$132 ; wire [6:0] \$133 ; wire [31:0] \$134 ; wire [31:0] \$135 ; wire [3:0] \$136 ; wire [4:0] \$137 ; wire [3:0] \$138 ; wire [5:0] \$139 ; wire \$14 ; wire [3:0] \$140 ; wire [4:0] \$141 ; wire [5:0] \$142 ; wire [8:0] \$143 ; wire [31:0] \$144 ; wire [31:0] \$145 ; wire [3:0] \$146 ; wire [6:0] \$147 ; wire [158:0] \$148 ; wire [158:0] \$149 ; wire \$15 ; wire \$150 ; wire \$151 ; wire [8:0] \$152 ; reg [15:0] \$153 ; reg \$154 ; reg [15:0] \$155 ; reg \$156 ; reg \$157 ; reg \$158 ; reg \$159 ; wire \$16 ; reg \$160 ; reg \$161 ; reg \$162 ; reg \$163 ; reg [31:0] \$164 ; reg \$165 ; reg [4:0] \$166 ; reg \$167 ; reg \$168 ; reg \$169 ; wire \$17 ; reg [7:0] \$170 ; reg [7:0] \$171 ; reg [7:0] \$172 ; reg [1:0] \$173 ; reg [1:0] \$174 ; reg [2:0] \$175 ; reg [2:0] \$176 ; reg [2:0] \$177 ; reg [3:0] \$178 ; reg [15:0] \$179 ; wire [3:0] \$18 ; reg \$180 ; reg [3:0] \$181 ; reg [3:0] \$182 ; reg \$183 ; reg [15:0] \$184 ; reg [2:0] \$185 ; reg [1:0] \$186 ; reg [31:0] \$187 ; reg [3:0] \$188 ; reg [31:0] \$189 ; wire \$19 ; reg [31:0] \$190 ; reg [31:0] \$191 ; reg \$192 ; wire [6:0] \$2 ; wire \$20 ; wire \$21 ; wire \$22 ; wire \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire [31:0] \$3 ; wire \$30 ; wire \$31 ; wire \$32 ; wire \$33 ; wire \$34 ; wire \$35 ; wire \$36 ; wire \$37 ; wire \$38 ; wire \$39 ; wire [1:0] \$4 ; wire \$40 ; wire \$41 ; wire \$42 ; wire \$43 ; wire \$44 ; wire \$45 ; wire \$46 ; wire \$47 ; wire \$48 ; wire \$49 ; wire [1:0] \$5 ; wire \$50 ; wire \$51 ; wire [37:0] \$52 ; wire \$53 ; wire \$54 ; wire \$55 ; wire \$56 ; wire \$57 ; wire \$58 ; wire \$59 ; wire [1:0] \$6 ; wire [4:0] \$60 ; wire [4:0] \$61 ; wire [8:0] \$62 ; wire [4:0] \$63 ; wire [4:0] \$64 ; wire [5:0] \$65 ; wire \$66 ; wire \$67 ; wire \$68 ; wire \$69 ; wire [34:0] \$7 ; wire \$70 ; wire [3:0] \$71 ; wire [3:0] \$72 ; wire \$73 ; wire [62:0] \$74 ; wire [62:0] \$75 ; wire [3:0] \$76 ; wire [6:0] \$77 ; wire [31:0] \$78 ; wire [3:0] \$79 ; wire [34:0] \$8 ; wire [3:0] \$80 ; wire [4:0] \$81 ; wire [62:0] \$82 ; wire [62:0] \$83 ; wire \$84 ; wire \$85 ; wire [4:0] \$86 ; wire [5:0] \$87 ; wire [3:0] \$88 ; wire \$89 ; wire [34:0] \$9 ; wire \$90 ; wire [4:0] \$91 ; wire [5:0] \$92 ; wire \$93 ; wire \$94 ; wire [4:0] \$95 ; wire [16:0] \$96 ; wire \$97 ; wire \$98 ; wire \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:146" *) reg [31:0] bit_time = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:33" *) input [15:0] bram_address; wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) reg [15:0] \bram_address$84 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:267" *) reg bram_control_mode = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:268" *) reg bram_control_mode_comb; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:34" *) wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:35" *) output [31:0] \bram_read_data$40 ; reg [31:0] \bram_read_data$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:34" *) input [31:0] bram_write_data; wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) reg [31:0] \bram_write_data$85 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:36" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) reg \bram_write_enable$83 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:441" *) reg [3:0] bytes_used; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [4:0] controller_fsm_state = 5'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:176" *) reg [2:0] current_cyclic_register = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:158" *) reg [7:0] current_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:159" *) reg [7:0] current_enabled_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:167" *) reg [1:0] current_rx_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:168" *) reg [2:0] current_rx_word_index = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:219" *) wire [4:0] current_tx_bit_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:166" *) reg [1:0] current_tx_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:169" *) reg [2:0] current_tx_word_index = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:183" *) reg cyclic_data_enabled = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:189" *) wire [2:0] cyclic_read_data_size; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:190" *) wire [1:0] cyclic_read_data_starting_byte_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:178" *) reg [2:0] cyclic_register_size = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:180" *) wire [4:0] cyclic_register_starting_bit_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:179" *) reg [1:0] cyclic_register_starting_byte_index = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:191" *) wire [2:0] cyclic_write_data_size; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:192" *) wire [1:0] cyclic_write_data_starting_byte_index; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:99" *) wire [7:0] debugPins; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:62" *) wire [7:0] \debugPins$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:100" *) reg [4:0] debugPins_fsm; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [5:0] externalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] externalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [5:0] externalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] externalWritePort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg externalWritePort__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_rx_register_config_first_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_rx_register_config_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg get_tx_device_config_wait_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:134" *) reg [15:0] internalBramAddress = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:135" *) wire [31:0] internalBramReadData; (* init = 32'd0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:136" *) wire [31:0] internalBramWriteData; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:137" *) wire internalBramWriteEnable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [5:0] internalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] internalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [5:0] internalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] internalWritePort__data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg internalWritePort__en = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:222" *) wire [31:0] internal_read_port_masked_bytes; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:291" *) reg [15:0] last_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:160" *) reg [7:0] last_enabled_device_index = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:445" *) reg [2:0] offset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:172" *) reg [15:0] pre_timer = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:164" *) reg [3:0] previous_rx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:38" *) wire \rx$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:184" *) reg rx_cyclic_data_enabled = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:156" *) reg [31:0] rx_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:95" *) reg rx_invalid_crc_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:97" *) reg rx_no_response_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:96" *) reg rx_not_finished_fault; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:163" *) reg [3:0] rx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:225" *) wire [31:0] serial_port_control_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:237" *) wire serial_port_rx_busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:238" *) wire serial_port_rx_crc_valid; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:235" *) wire serial_port_rx_done; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:227" *) reg serial_port_rx_trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:236" *) wire serial_port_tx_busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:234" *) wire serial_port_tx_done; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:226" *) reg serial_port_tx_trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg start_rx_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:145" *) reg start_transfers = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:171" *) reg [3:0] timer = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) output tx; wire tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) wire \tx$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:155" *) reg [31:0] tx_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:162" *) reg [3:0] tx_packet_size = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:147" *) reg update_busy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:148" *) reg update_done = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:149" *) reg update_error = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:173" *) reg update_word_time = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:206" *) reg use_future_device_bram; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:207" *) reg use_previous_device_bram; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg wait_for_final_rx_packet_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) reg wait_tx_start_read_status_read_delay = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:174" *) reg [15:0] word_time = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:126" *) reg [31:0] memory [63:0]; initial begin memory[0] = 32'd0; memory[1] = 32'd0; memory[2] = 32'd0; memory[3] = 32'd0; memory[4] = 32'd0; memory[5] = 32'd0; memory[6] = 32'd0; memory[7] = 32'd0; memory[8] = 32'd0; memory[9] = 32'd0; memory[10] = 32'd0; memory[11] = 32'd0; memory[12] = 32'd0; memory[13] = 32'd0; memory[14] = 32'd0; memory[15] = 32'd0; memory[16] = 32'd0; memory[17] = 32'd0; memory[18] = 32'd0; memory[19] = 32'd0; memory[20] = 32'd0; memory[21] = 32'd0; memory[22] = 32'd0; memory[23] = 32'd0; memory[24] = 32'd0; memory[25] = 32'd0; memory[26] = 32'd0; memory[27] = 32'd0; memory[28] = 32'd0; memory[29] = 32'd0; memory[30] = 32'd0; memory[31] = 32'd0; memory[32] = 32'd0; memory[33] = 32'd0; memory[34] = 32'd0; memory[35] = 32'd0; memory[36] = 32'd0; memory[37] = 32'd0; memory[38] = 32'd0; memory[39] = 32'd0; memory[40] = 32'd0; memory[41] = 32'd0; memory[42] = 32'd0; memory[43] = 32'd0; memory[44] = 32'd0; memory[45] = 32'd0; memory[46] = 32'd0; memory[47] = 32'd0; memory[48] = 32'd0; memory[49] = 32'd0; memory[50] = 32'd0; memory[51] = 32'd0; memory[52] = 32'd0; memory[53] = 32'd0; memory[54] = 32'd0; memory[55] = 32'd0; memory[56] = 32'd0; memory[57] = 32'd0; memory[58] = 32'd0; memory[59] = 32'd0; memory[60] = 32'd0; memory[61] = 32'd0; memory[62] = 32'd0; memory[63] = 32'd0; end always @(posedge sync_100_clk) begin if (externalWritePort__en) memory[bram_address[5:0]] <= externalWritePort__data; end always @(posedge sync_100_clk) begin if (internalWritePort__en) memory[internalBramAddress[5:0]] <= internalWritePort__data; end reg [31:0] _0_; reg [31:0] _1_; always @(posedge sync_100_clk) begin _0_ <= memory[internalBramAddress[5:0]]; _1_ <= memory[bram_address[5:0]]; end assign internalBramReadData = _0_; assign externalReadPort__data = _1_; assign \$2 = 6'h20 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$1 ; assign \$3 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$2 ; assign internal_read_port_masked_bytes = internalBramReadData & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:223" *) \$3 ; assign \$6 = \$4 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$5 ; assign \$8 = { 33'h000000000, \$6 } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$7 ; assign \$10 = \$8 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:229" *) \$9 ; assign \$11 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h40; assign \$12 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h41; assign \$13 = \$11 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$12 ; assign \$14 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h42; assign \$15 = \$13 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$14 ; assign \$16 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:316" *) bram_control_mode_comb; assign \$17 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:320" *) bram_control_mode; assign \$18 = current_tx_byte_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:442" *) cyclic_register_size; assign \$19 = bytes_used >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:444" *) 3'h4; assign \$20 = bytes_used == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:446" *) 3'h4; assign \$21 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:485" *) timer; assign \$22 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:523" *) current_device_index; assign \$23 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:525" *) bram_read_data[4]; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:530" *) bram_read_data[4]; assign \$25 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:530" *) \$24 ; assign \$26 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:533" *) bram_read_data[2]; assign \$27 = \$26 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:533" *) bram_read_data[3]; assign \$28 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) bram_read_data[2]; assign \$29 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) bram_read_data[3]; assign \$30 = \$28 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:536" *) \$29 ; assign \$31 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) controller_fsm_state; assign \$32 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$33 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$34 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$35 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$36 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h5; assign \$37 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h6; assign \$38 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h7; assign \$39 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h8; assign \$40 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h9; assign \$41 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'ha; assign \$42 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hb; assign \$43 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hc; assign \$44 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hd; assign \$45 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'he; assign \$46 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'hf; assign \$47 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h10; assign \$48 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h11; assign \$49 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h12; assign \$50 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h13; assign \$51 = controller_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 5'h14; assign \$52 = bit_time * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:203" *) 6'h28; assign \$53 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h40; assign \$54 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h41; assign \$55 = \$53 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$54 ; assign \$56 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) 7'h42; assign \$57 = \$55 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:269" *) \$56 ; assign \$58 = current_enabled_device_index == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:370" *) 1'h1; assign \$59 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:395" *) 1'h1; assign \$60 = rx_packet_size + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:371" *) 3'h4; assign \$61 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:385" *) current_cyclic_register; assign \$62 = current_device_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:397" *) 1'h1; assign \$63 = rx_packet_size + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:403" *) 3'h4; assign \$64 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:416" *) current_tx_word_index; assign \$65 = 5'h18 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:418" *) current_cyclic_register; assign \$66 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) internalBramReadData[7:5]; assign \$67 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) 2'h3; assign \$68 = \$67 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) cyclic_data_enabled; assign \$69 = \$66 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:425" *) \$68 ; assign \$70 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:431" *) current_tx_byte_index; assign \$71 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:434" *) 1'h1; assign \$72 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:435" *) 1'h1; assign \$73 = bytes_used >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:444" *) 3'h4; assign \$74 = internal_read_port_masked_bytes << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:451" *) current_tx_bit_index; assign \$75 = { 31'h00000000, tx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:451" *) \$74 ; assign \$76 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:452" *) cyclic_register_starting_byte_index; assign \$78 = internal_read_port_masked_bytes >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:452" *) \$77 ; assign \$79 = current_tx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:455" *) 1'h1; assign \$80 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:456" *) current_tx_byte_index; assign \$81 = $signed({ 1'h0, cyclic_register_size }) - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:456" *) $signed(\$80 ); assign \$82 = internal_read_port_masked_bytes << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:460" *) current_tx_bit_index; assign \$83 = { 31'h00000000, tx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:460" *) \$82 ; assign \$84 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:463" *) 2'h3; assign \$85 = \$84 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:463" *) cyclic_data_enabled; assign \$86 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:464" *) current_cyclic_register; assign \$87 = \$86 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:464" *) 1'h1; assign \$88 = current_cyclic_register + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:465" *) 1'h1; assign \$89 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:474" *) current_device_index; assign \$90 = previous_rx_packet_size >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:475" *) tx_packet_size; assign \$91 = previous_rx_packet_size - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:476" *) tx_packet_size; assign \$92 = $signed(\$91 ) + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:476" *) $signed(4'h4); assign \$93 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:485" *) timer; assign \$94 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:494" *) pre_timer; assign \$95 = timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:495" *) 1'h1; assign \$96 = pre_timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:498" *) 1'h1; assign \$97 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:523" *) current_device_index; assign \$98 = bram_read_data[2] & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:525" *) bram_read_data[4]; assign \$99 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:543" *) 1'h1; assign \$100 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:568" *) timer; assign \$101 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:576" *) pre_timer; assign \$102 = timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:577" *) 1'h1; assign \$103 = pre_timer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:580" *) 1'h1; assign \$104 = current_cyclic_register + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:590" *) 1'h1; assign \$105 = 4'h8 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:592" *) current_cyclic_register; assign \$106 = \$105 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:592" *) 1'h1; assign \$107 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) internalBramReadData[2:0]; assign \$108 = current_cyclic_register < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) 2'h3; assign \$109 = \$108 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) rx_cyclic_data_enabled; assign \$110 = \$107 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:625" *) \$109 ; assign \$111 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) 1'h1; assign \$112 = current_enabled_device_index == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) 1'h1; assign \$113 = current_enabled_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) last_enabled_device_index; assign \$114 = \$112 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) \$113 ; assign \$115 = \$111 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:660" *) \$114 ; assign \$116 = internalBramReadData[4:3] + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:630" *) internalBramReadData[2:0]; assign \$117 = \$116 <= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:630" *) 3'h4; assign \$118 = 5'h10 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:634" *) current_cyclic_register; assign \$120 = bram_read_data >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$119 ; assign \$121 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) internalBramReadData[2:0]; assign \$123 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$122 ; assign \$124 = \$120 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:636" *) \$123 ; assign \$125 = internalBramReadData[4:3] + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:639" *) internalBramReadData[2:0]; assign \$126 = \$125 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:639" *) 3'h4; assign \$127 = current_rx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:642" *) 1'h1; assign \$128 = 1'h0 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:643" *) current_rx_word_index; assign \$129 = \$128 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:643" *) 1'h1; assign \$131 = bram_read_data >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$130 ; assign \$132 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) internalBramReadData[2:0]; assign \$134 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$133 ; assign \$135 = \$131 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:651" *) \$134 ; assign \$136 = 1'h0 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:654" *) current_rx_word_index; assign \$137 = \$136 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:654" *) 1'h1; assign \$138 = current_rx_word_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:655" *) 1'h1; assign \$139 = 5'h10 + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:682" *) current_cyclic_register; assign \$140 = cyclic_register_starting_byte_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) cyclic_register_size; assign \$141 = \$140 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) 3'h4; assign \$142 = $signed(4'h4) - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) $signed(\$141 ); assign \$144 = 32'd4294967295 >> (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:685" *) \$143 ; assign \$145 = bram_read_data & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:684" *) \$144 ; assign \$146 = 3'h4 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:686" *) cyclic_register_starting_byte_index; assign \$148 = \$145 << (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:684" *) \$147 ; assign \$149 = { 127'h00000000000000000000000000000000, rx_data } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:683" *) \$148 ; assign \$150 = current_device_index < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:694" *) 1'h1; assign \$151 = current_device_index != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:731" *) 1'h1; assign \$152 = current_device_index + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:732" *) 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:174" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) word_time <= 16'h0000; else word_time <= \$153 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:173" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_word_time <= 1'h0; else update_word_time <= \$154 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:134" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalBramAddress <= 16'h0000; else internalBramAddress <= \$155 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_tx_device_config_wait_read_delay <= 1'h0; else get_tx_device_config_wait_read_delay <= \$156 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) wait_tx_start_read_status_read_delay <= 1'h0; else wait_tx_start_read_status_read_delay <= \$157 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) wait_for_final_rx_packet_read_delay <= 1'h0; else wait_for_final_rx_packet_read_delay <= \$158 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_rx_register_config_read_delay <= 1'h0; else get_rx_register_config_read_delay <= \$159 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) get_rx_register_config_first_read_delay <= 1'h0; else get_rx_register_config_first_read_delay <= \$160 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:255" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start_rx_read_delay <= 1'h0; else start_rx_read_delay <= \$161 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:267" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_control_mode <= 1'h0; else bram_control_mode <= \$162 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:145" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start_transfers <= 1'h0; else start_transfers <= \$163 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:146" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bit_time <= 32'd0; else bit_time <= \$164 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:291" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) last_bram_address <= 16'h0000; else last_bram_address <= bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:137" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__en <= 1'h0; else internalWritePort__en <= \$165 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) controller_fsm_state <= 5'h00; else controller_fsm_state <= \$166 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:147" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_busy <= 1'h0; else update_busy <= \$167 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:148" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_done <= 1'h0; else update_done <= \$168 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:149" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) update_error <= 1'h0; else update_error <= \$169 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:158" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_device_index <= 8'h00; else current_device_index <= \$170 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:160" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) last_enabled_device_index <= 8'h00; else last_enabled_device_index <= \$171 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:159" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_enabled_device_index <= 8'h00; else current_enabled_device_index <= \$172 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:166" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_tx_byte_index <= 2'h0; else current_tx_byte_index <= \$173 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:167" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_rx_byte_index <= 2'h0; else current_rx_byte_index <= \$174 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:168" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_rx_word_index <= 3'h0; else current_rx_word_index <= \$175 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:169" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_tx_word_index <= 3'h0; else current_tx_word_index <= \$176 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:176" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) current_cyclic_register <= 3'h0; else current_cyclic_register <= \$177 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:171" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timer <= 4'h0; else timer <= \$178 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:172" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) pre_timer <= 16'h0000; else pre_timer <= \$179 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:183" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_data_enabled <= 1'h0; else cyclic_data_enabled <= \$180 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:164" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) previous_rx_packet_size <= 4'h0; else previous_rx_packet_size <= \$181 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:163" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_packet_size <= 4'h0; else rx_packet_size <= \$182 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_write_enable$83 <= 1'h0; else \bram_write_enable$83 <= \$183 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_address$84 <= 16'h0000; else \bram_address$84 <= \$184 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:178" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_register_size <= 3'h0; else cyclic_register_size <= \$185 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:179" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cyclic_register_starting_byte_index <= 2'h0; else cyclic_register_starting_byte_index <= \$186 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \bram_write_data$85 <= 32'd0; else \bram_write_data$85 <= \$187 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:162" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_packet_size <= 4'h0; else tx_packet_size <= \$188 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:155" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_data <= 32'd0; else tx_data <= \$189 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:136" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__data <= 32'd0; else internalWritePort__data <= \$190 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:156" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_data <= 32'd0; else rx_data <= \$191 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:184" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_cyclic_data_enabled <= 1'h0; else rx_cyclic_data_enabled <= \$192 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_controller.py:108" *) \Controller.em_serial_controller_D.drive_serial_port drive_serial_port ( .address(\bram_address$84 ), .bram_read_data(bram_read_data), .bram_write_data(\bram_write_data$85 ), .bram_write_enable(\bram_write_enable$83 ), .debugPins(debugPins), .rx(rx), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .tx(tx) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end bram_control_mode_comb = 1'h0; if (\$15 ) begin bram_control_mode_comb = 1'h1; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \bram_read_data$40 = 32'd0; casez (last_bram_address) 16'h0042: if (bram_control_mode) begin \bram_read_data$40 = { 29'h00000000, update_error, update_done, update_busy }; end endcase if (\$17 ) begin \bram_read_data$40 = externalReadPort__data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end externalWritePort__data = 32'd0; if (\$16 ) begin externalWritePort__data = bram_write_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end externalWritePort__en = 1'h0; if (\$16 ) begin externalWritePort__en = bram_write_enable; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end debugPins_fsm = 5'h00; casez (controller_fsm_state) 5'h00: debugPins_fsm = 5'h01; 5'h01: debugPins_fsm = 5'h02; 5'h02: debugPins_fsm = 5'h03; 5'h03: debugPins_fsm = 5'h04; 5'h05: debugPins_fsm = 5'h05; 5'h06: debugPins_fsm = 5'h06; 5'h07: debugPins_fsm = 5'h07; 5'h08: debugPins_fsm = 5'h08; 5'h09: debugPins_fsm = 5'h09; 5'h0a: debugPins_fsm = 5'h0a; 5'h0b: debugPins_fsm = 5'h0b; 5'h0c: debugPins_fsm = 5'h0c; 5'h04: debugPins_fsm = 5'h0d; 5'h0f: debugPins_fsm = 5'h0e; 5'h0d: debugPins_fsm = 5'h0e; 5'h11: debugPins_fsm = 5'h0f; 5'h10: debugPins_fsm = 5'h10; 5'h12: debugPins_fsm = 5'h11; 5'h13: debugPins_fsm = 5'h12; 5'h14: debugPins_fsm = 5'h13; 5'h0e: debugPins_fsm = 5'h14; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end use_future_device_bram = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: use_future_device_bram = 1'h1; 5'h03: use_future_device_bram = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end bytes_used = 4'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: bytes_used = \$18 ; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end offset = 3'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: if (\$19 ) begin (* full_case = 32'd1 *) if (\$20 ) begin offset = 3'h4; end else begin offset = 3'h3; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end serial_port_tx_trigger = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: if (\$21 ) begin serial_port_tx_trigger = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end rx_invalid_crc_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$25 ) begin rx_invalid_crc_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end rx_not_finished_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$27 ) begin rx_not_finished_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end rx_no_response_fault = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (\$30 ) begin rx_no_response_fault = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end use_previous_device_bram = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$22 ) begin use_previous_device_bram = 1'h1; end end 5'h04: /* empty */; 5'h0f: use_previous_device_bram = 1'h1; 5'h0d: use_previous_device_bram = 1'h1; 5'h11: /* empty */; 5'h10: use_previous_device_bram = 1'h1; 5'h12: use_previous_device_bram = 1'h1; 5'h13: use_previous_device_bram = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end serial_port_rx_trigger = 1'h0; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: serial_port_rx_trigger = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$153 = word_time; if (update_word_time) begin \$153 = \$52 [15:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$154 = update_word_time; if (update_word_time) begin \$154 = 1'h0; end if (bram_write_enable) begin casez (bram_address) 16'h0040: /* empty */; 16'h0041: \$154 = 1'h1; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$155 [4:0] = internalBramAddress[4:0]; (* full_case = 32'd1 *) if (use_previous_device_bram) begin \$155 [15:5] = { 3'h0, last_enabled_device_index }; end else if (use_future_device_bram) begin \$155 [15:5] = { 3'h0, current_device_index }; end else begin \$155 [15:5] = { 3'h0, current_enabled_device_index }; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: \$155 [4:0] = 5'h00; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$155 [4:0] = \$61 ; end 5'h05: \$155 [4:0] = \$65 [4:0]; 5'h06: /* empty */; 5'h07: if (\$85 ) begin \$155 [4:0] = \$87 [4:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$155 [4:0] = 5'h01; end end 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$155 [4:0] = \$106 [4:0]; end 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$155 [4:0] = 5'h08; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin if (\$117 ) begin \$155 [4:0] = \$118 [4:0]; end end 5'h12: /* empty */; 5'h13: \$155 [4:0] = \$139 [4:0]; 5'h14: /* empty */; 5'h0e: \$155 [4:0] = 5'h00; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$156 = get_tx_device_config_wait_read_delay; if (get_tx_device_config_wait_read_delay) begin \$156 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: \$156 = 1'h1; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin end else if (\$59 ) begin \$156 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$157 = wait_tx_start_read_status_read_delay; if (wait_tx_start_read_status_read_delay) begin \$157 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: \$157 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$158 = wait_for_final_rx_packet_read_delay; if (wait_for_final_rx_packet_read_delay) begin \$158 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: if (\$100 ) begin \$158 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$159 = get_rx_register_config_read_delay; if (get_rx_register_config_read_delay) begin \$159 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$159 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$160 = get_rx_register_config_first_read_delay; if (get_rx_register_config_first_read_delay) begin \$160 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$160 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$161 = start_rx_read_delay; if (start_rx_read_delay) begin \$161 = 1'h0; end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$161 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end (* full_case = 32'd1 *) if (\$57 ) begin \$162 = 1'h1; end else begin \$162 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$163 = start_transfers; if (bram_write_enable) begin casez (bram_address) 16'h0040: \$163 = bram_write_data[0]; endcase end casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$163 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$164 = bit_time; if (bram_write_enable) begin casez (bram_address) 16'h0040: /* empty */; 16'h0041: \$164 = bram_write_data; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$165 = internalWritePort__en; casez (controller_fsm_state) 5'h00: \$165 = 1'h0; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$165 = 1'h1; end end 5'h04: /* empty */; 5'h0f: \$165 = 1'h0; 5'h0d: \$165 = 1'h0; 5'h11: \$165 = 1'h0; 5'h10: if (\$110 ) begin if (\$117 ) begin \$165 = 1'h1; end end 5'h12: /* empty */; 5'h13: \$165 = 1'h1; 5'h14: /* empty */; 5'h0e: \$165 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$166 = controller_fsm_state; casez (controller_fsm_state) 5'h00: if (start_transfers) begin \$166 = 5'h01; end 5'h01: \$166 = 5'h02; 5'h02: if (get_tx_device_config_wait_read_delay) begin \$166 = 5'h03; end 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$166 = 5'h04; end else if (internalBramReadData[0]) begin \$166 = 5'h05; end else if (\$59 ) begin \$166 = 5'h02; end else begin \$166 = 5'h04; end 5'h05: \$166 = 5'h06; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin \$166 = 5'h07; end else begin \$166 = 5'h08; end 5'h07: (* full_case = 32'd1 *) if (\$85 ) begin \$166 = 5'h05; end else begin \$166 = 5'h08; end 5'h08: \$166 = 5'h09; 5'h09: if (\$93 ) begin \$166 = 5'h0a; end 5'h0a: if (wait_tx_start_read_status_read_delay) begin \$166 = 5'h0b; end 5'h0b: if (bram_read_data[1]) begin \$166 = 5'h0c; end 5'h0c: if (bram_read_data[0]) begin (* full_case = 32'd1 *) if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin \$166 = 5'h0d; end else begin (* full_case = 32'd1 *) if (\$99 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end end end else begin \$166 = 5'h0e; end end 5'h04: if (\$100 ) begin if (wait_for_final_rx_packet_read_delay) begin \$166 = 5'h0c; end end 5'h0f: if (get_rx_register_config_read_delay) begin \$166 = 5'h10; end 5'h0d: if (get_rx_register_config_first_read_delay) begin \$166 = 5'h10; end 5'h11: \$166 = 5'h10; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin \$166 = 5'h0f; end else begin \$166 = 5'h12; end end else if (\$115 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end 5'h12: \$166 = 5'h13; 5'h13: \$166 = 5'h0f; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin \$166 = 5'h0e; end else begin \$166 = 5'h00; end 5'h0e: if (start_rx_read_delay) begin \$166 = 5'h02; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$167 = update_busy; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$167 = 1'h1; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin (* full_case = 32'd1 *) if (\$99 ) begin end else begin \$167 = 1'h0; end end end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin end else if (\$115 ) begin end else begin \$167 = 1'h0; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin end else begin \$167 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$168 = update_done; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$168 = 1'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin (* full_case = 32'd1 *) if (\$99 ) begin end else begin \$168 = 1'h1; end end end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: (* full_case = 32'd1 *) if (\$110 ) begin end else if (\$115 ) begin end else begin \$168 = 1'h1; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: (* full_case = 32'd1 *) if (\$150 ) begin end else begin \$168 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$169 = update_error; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$169 = 1'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin (* full_case = 32'd1 *) if (\$98 ) begin end else begin \$169 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$170 = current_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$170 = 8'h00; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin end else if (\$59 ) begin \$170 = \$62 [7:0]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin end else begin if (\$151 ) begin \$170 = \$152 [7:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$171 = last_enabled_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$171 = 8'h00; 5'h02: /* empty */; 5'h03: \$171 = current_enabled_device_index; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$172 = current_enabled_device_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$172 = 8'h00; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$172 = current_device_index; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$173 = current_tx_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$173 = 2'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: (* full_case = 32'd1 *) if (\$73 ) begin \$173 = \$81 [1:0]; end else begin \$173 = bytes_used[1:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$173 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$174 = current_rx_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$174 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$175 = current_rx_word_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$175 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$175 = 3'h0; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin if (\$126 ) begin \$175 = \$127 [2:0]; end end else begin \$175 = \$138 [2:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$176 = current_tx_word_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$176 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$176 = \$71 [2:0]; end end 5'h07: if (\$73 ) begin \$176 = \$79 [2:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$176 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$177 = current_cyclic_register; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$177 = 3'h0; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: if (\$85 ) begin \$177 = \$88 [2:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: (* full_case = 32'd1 *) if (get_rx_register_config_read_delay) begin end else begin \$177 = \$104 [2:0]; end 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$177 = 3'h0; end 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$177 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$178 = timer; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$178 = 4'h0; 5'h02: /* empty */; 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$178 = \$60 [3:0]; end else if (internalBramReadData[0]) begin end else if (\$59 ) begin end else begin \$178 = \$63 [3:0]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: if (\$89 ) begin (* full_case = 32'd1 *) if (\$90 ) begin \$178 = \$92 [3:0]; end else begin \$178 = 4'h4; end end 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin end else begin if (\$94 ) begin \$178 = \$95 [3:0]; end end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: (* full_case = 32'd1 *) if (\$100 ) begin end else begin if (\$101 ) begin \$178 = \$102 [3:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$179 = pre_timer; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: \$179 = 16'h0000; 5'h02: /* empty */; 5'h03: (* full_case = 32'd1 *) if (\$58 ) begin \$179 = word_time; end else if (internalBramReadData[0]) begin end else if (\$59 ) begin end else begin \$179 = word_time; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: \$179 = word_time; 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin end else begin (* full_case = 32'd1 *) if (\$94 ) begin \$179 = word_time; end else begin \$179 = \$96 [15:0]; end end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: (* full_case = 32'd1 *) if (\$100 ) begin end else begin (* full_case = 32'd1 *) if (\$101 ) begin \$179 = word_time; end else begin \$179 = \$103 [15:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$180 = cyclic_data_enabled; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$180 = internalBramReadData[1]; end 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$180 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$181 = previous_rx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin \$181 = rx_packet_size; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$182 = rx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: if (\$58 ) begin end else if (internalBramReadData[0]) begin (* full_case = 32'd1 *) if (internalBramReadData[1]) begin \$182 = internalBramReadData[5:2]; end else begin \$182 = 4'h3; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$183 = \bram_write_enable$83 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: \$183 = 1'h0; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$183 = 1'h1; end end 5'h07: if (\$73 ) begin \$183 = 1'h1; end 5'h08: /* empty */; 5'h09: (* full_case = 32'd1 *) if (\$93 ) begin \$183 = 1'h1; end else begin \$183 = 1'h0; end 5'h0a: \$183 = 1'h0; 5'h0b: /* empty */; 5'h0c: (* full_case = 32'd1 *) if (bram_read_data[0]) begin end else begin \$183 = 1'h0; end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin \$183 = 1'h0; end else begin \$183 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$184 = \bram_address$84 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: \$184 = { 11'h000, \$64 }; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: if (\$93 ) begin \$184 = 16'h8000; end 5'h0a: \$184 = 16'h8002; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: if (\$100 ) begin \$184 = 16'h8002; end 5'h0f: /* empty */; 5'h0d: (* full_case = 32'd1 *) if (get_rx_register_config_first_read_delay) begin end else begin \$184 = 16'h0000; end 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin if (\$126 ) begin \$184 = { 11'h000, \$129 }; end end else begin \$184 = { 11'h000, \$137 }; end end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$184 = 16'h8000; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$185 = cyclic_register_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: if (\$69 ) begin \$185 = internalBramReadData[7:5]; end 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin \$185 = internalBramReadData[2:0]; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$185 = 3'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$186 = cyclic_register_starting_byte_index; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: if (\$69 ) begin \$186 = internalBramReadData[9:8]; end 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin \$186 = internalBramReadData[4:3]; end 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$186 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$187 = \bram_write_data$85 ; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$187 = tx_data; end end 5'h07: if (\$73 ) begin \$187 = \$75 [31:0]; end 5'h08: /* empty */; 5'h09: if (\$93 ) begin \$187 = \$10 [31:0]; end 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$187 = \$10 [31:0]; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$188 = tx_packet_size; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: (* full_case = 32'd1 *) if (\$69 ) begin end else begin if (\$70 ) begin \$188 = \$72 ; end end 5'h07: (* full_case = 32'd1 *) if (\$85 ) begin end else begin \$188 = { 1'h0, current_tx_word_index }; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$189 = tx_data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: (* full_case = 32'd1 *) if (\$73 ) begin \$189 = \$78 ; end else begin \$189 = \$83 [31:0]; end 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: \$189 = 32'd0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$190 = internalWritePort__data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: if (bram_read_data[0]) begin if (\$97 ) begin \$190 = { 29'h00000000, rx_invalid_crc_fault, rx_not_finished_fault, rx_no_response_fault }; end end 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin if (\$117 ) begin \$190 = \$124 ; end end 5'h12: /* empty */; 5'h13: \$190 = \$149 [31:0]; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$191 = rx_data; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: if (\$110 ) begin (* full_case = 32'd1 *) if (\$117 ) begin end else begin \$191 = \$135 ; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$29 ) begin end \$192 = rx_cyclic_data_enabled; casez (controller_fsm_state) 5'h00: /* empty */; 5'h01: /* empty */; 5'h02: /* empty */; 5'h03: /* empty */; 5'h05: /* empty */; 5'h06: /* empty */; 5'h07: /* empty */; 5'h08: /* empty */; 5'h09: /* empty */; 5'h0a: /* empty */; 5'h0b: /* empty */; 5'h0c: /* empty */; 5'h04: /* empty */; 5'h0f: /* empty */; 5'h0d: /* empty */; 5'h11: /* empty */; 5'h10: /* empty */; 5'h12: /* empty */; 5'h13: /* empty */; 5'h14: /* empty */; 5'h0e: (* full_case = 32'd1 *) if (start_rx_read_delay) begin end else begin \$192 = cyclic_data_enabled; end endcase end assign \rx$1 = rx; assign \tx$3 = tx; assign \debugPins$5 = debugPins; assign internalReadPort__addr = internalBramAddress[5:0]; assign internalWritePort__addr = internalBramAddress[5:0]; assign internalBramWriteData = internalWritePort__data; assign internalBramWriteEnable = internalWritePort__en; assign internalReadPort__data = internalBramReadData; assign cyclic_read_data_size = internalBramReadData[2:0]; assign cyclic_read_data_starting_byte_index = internalBramReadData[4:3]; assign cyclic_write_data_size = internalBramReadData[7:5]; assign cyclic_write_data_starting_byte_index = internalBramReadData[9:8]; assign serial_port_control_data = \$10 [31:0]; assign serial_port_tx_done = bram_read_data[0]; assign serial_port_rx_done = bram_read_data[2]; assign serial_port_tx_busy = bram_read_data[1]; assign serial_port_rx_busy = bram_read_data[3]; assign serial_port_rx_crc_valid = bram_read_data[4]; assign externalReadPort__addr = bram_address[5:0]; assign externalWritePort__addr = bram_address[5:0]; assign cyclic_register_starting_bit_index = { cyclic_register_starting_byte_index, 3'h0 }; assign current_tx_bit_index = { current_tx_byte_index, 3'h0 }; assign \$1 = { cyclic_register_size, 3'h0 }; assign \$4 = { 1'h0, serial_port_tx_trigger }; assign \$5 = { serial_port_rx_trigger, 1'h0 }; assign \$7 = { 15'h0000, tx_packet_size, 16'h0000 }; assign \$9 = { 7'h00, rx_packet_size, 24'h000000 }; assign \$77 = { \$76 , 3'h0 }; assign \$119 = { internalBramReadData[4:3], 3'h0 }; assign \$122 = { \$121 , 3'h0 }; assign \$130 = { internalBramReadData[4:3], 3'h0 }; assign \$133 = { \$132 , 3'h0 }; assign \$143 = { \$142 , 3'h0 }; assign \$147 = { \$146 , 3'h0 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:67" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_D.drive_serial_port (sync_100_rst, rx, bram_write_enable, address, bram_write_data, bram_read_data, debugPins, tx, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$30 = 0; wire \$1 ; wire \$10 ; reg \$100 ; reg \$101 ; reg \$102 ; reg [8:0] \$103 ; reg [2:0] \$104 ; reg \$105 ; reg \$106 ; reg \$107 ; reg [3:0] \$108 ; reg [1:0] \$109 ; wire \$11 ; reg [7:0] \$110 ; reg [10:0] \$111 ; reg \$112 ; reg [31:0] \$113 ; reg [2:0] \$114 ; reg \$115 ; reg \$116 ; reg [3:0] \$117 ; reg [1:0] \$118 ; reg [7:0] \$119 ; wire \$12 ; reg [10:0] \$120 ; reg \$121 ; reg [31:0] \$122 ; reg [31:0] \$123 ; reg [31:0] \$124 ; reg [7:0] \$125 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire \$17 ; wire \$18 ; wire \$19 ; wire [9:0] \$191 ; wire \$193 ; wire \$2 ; wire \$20 ; wire [2:0] \$21 ; wire \$22 ; wire [7:0] \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire [9:0] \$28 ; wire \$29 ; wire \$3 ; wire \$30 ; wire [5:0] \$31 ; wire [6:0] \$32 ; wire \$33 ; wire [5:0] \$34 ; wire [6:0] \$35 ; wire \$36 ; wire [10:0] \$37 ; wire [11:0] \$38 ; wire \$39 ; wire \$4 ; wire \$40 ; wire [10:0] \$41 ; wire \$42 ; wire [5:0] \$43 ; wire [6:0] \$44 ; wire \$45 ; wire [5:0] \$46 ; wire [6:0] \$47 ; wire \$48 ; wire [4:0] \$49 ; wire \$5 ; wire [10:0] \$50 ; wire [11:0] \$51 ; wire \$52 ; wire \$53 ; wire \$54 ; wire \$55 ; wire \$56 ; wire [8:0] \$57 ; wire [8:0] \$58 ; wire \$59 ; wire \$6 ; wire [2:0] \$60 ; wire [11:0] \$61 ; wire \$62 ; wire \$63 ; wire \$64 ; wire \$65 ; wire [9:0] \$66 ; wire [10:0] \$67 ; wire [11:0] \$68 ; wire [11:0] \$69 ; wire \$7 ; wire \$70 ; wire [5:0] \$71 ; wire [6:0] \$72 ; wire \$73 ; wire [4:0] \$74 ; wire [10:0] \$75 ; wire [11:0] \$76 ; wire \$77 ; wire \$78 ; wire \$79 ; wire \$8 ; wire \$80 ; wire \$81 ; wire \$82 ; wire [8:0] \$83 ; wire [2:0] \$84 ; wire [11:0] \$85 ; reg \$86 ; reg \$87 ; reg \$88 ; reg [7:0] \$89 ; wire \$9 ; reg [7:0] \$90 ; reg [9:0] \$91 ; reg [1:0] \$92 ; reg [31:0] \$93 ; reg [15:0] \$94 ; reg \$95 ; reg [31:0] \$96 ; reg \$97 ; reg \$98 ; reg \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) input [15:0] address; wire [15:0] address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:76" *) reg [9:0] bitLength = 10'h008; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:32" *) wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:142" *) reg bram_control_mode = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:34" *) output [31:0] bram_read_data; reg [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:33" *) input [31:0] bram_write_data; wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:35" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [31:0] \crc$62 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) reg [31:0] data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) reg [31:0] \data$63 = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:62" *) output [7:0] debugPins; reg [7:0] debugPins; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:136" *) reg [8:0] delay_cnt = 9'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:137" *) reg delay_cnt_increment; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:138" *) reg delay_cnt_reset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [3:0] externalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] externalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [3:0] externalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] externalWritePort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg externalWritePort__en; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:240" *) wire [3:0] internalReadPort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:241" *) wire [31:0] internalReadPort__data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:105" *) reg [15:0] internalReadWriteAddress = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:401" *) wire [3:0] internalWritePort__addr; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) reg [31:0] internalWritePort__data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) reg internalWritePort__en = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:97" *) wire [31:0] readData; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:37" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:26" *) reg rxBusy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:29" *) reg rxCRCvalid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:129" *) reg [3:0] rxCurrentBit = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:130" *) reg [1:0] rxCurrentByte = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:131" *) reg [7:0] rxCurrentWord = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:111" *) reg [31:0] rxData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:28" *) reg rxDone = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:112" *) reg [31:0] rxNewData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:113" *) reg [7:0] rxNewDataIndex = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:73" *) reg [7:0] rxPacketSize = 8'h01; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:127" *) reg [10:0] rxTimer = 11'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:116" *) reg rxWriteDataRequest = 1'h0; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] rx_fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:71" *) reg rx_start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) wire rx_synced; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg \start$49 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) output tx; reg tx = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:25" *) reg txBusy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:123" *) reg [3:0] txCurrentBit = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:124" *) reg [1:0] txCurrentByte = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:125" *) reg [7:0] txCurrentWord = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:27" *) reg txDone = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:72" *) reg [7:0] txPacketSize = 8'h01; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:114" *) reg [31:0] txReadData = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:118" *) reg txReadDataRequest = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:119" *) reg [1:0] txReadDataRequestWait = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:121" *) reg [10:0] txTimer = 11'h000; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] tx_fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:70" *) reg tx_start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:117" *) reg updateStatusDataRequest = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg \valid$48 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:95" *) wire [31:0] writeData; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:96" *) wire writeEnable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:87" *) reg [31:0] memory [15:0]; initial begin memory[0] = 32'd0; memory[1] = 32'd0; memory[2] = 32'd0; memory[3] = 32'd0; memory[4] = 32'd0; memory[5] = 32'd0; memory[6] = 32'd0; memory[7] = 32'd0; memory[8] = 32'd0; memory[9] = 32'd0; memory[10] = 32'd0; memory[11] = 32'd0; memory[12] = 32'd0; memory[13] = 32'd0; memory[14] = 32'd0; memory[15] = 32'd0; end always @(posedge sync_100_clk) begin if (externalWritePort__en) memory[address[3:0]] <= externalWritePort__data; end always @(posedge sync_100_clk) begin if (internalWritePort__en) memory[internalReadWriteAddress[3:0]] <= internalWritePort__data; end reg [31:0] _0_; reg [31:0] _1_; always @(posedge sync_100_clk) begin _0_ <= memory[internalReadWriteAddress[3:0]]; _1_ <= memory[address[3:0]]; end assign internalReadPort__data = _0_; assign readData = _1_; assign \$2 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:167" *) address[15]; assign \$4 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:330" *) 7'h64; assign \$5 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:339" *) rx_synced; assign \$6 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:344" *) 9'h12c; assign \$7 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) tx_fsm_state; assign \$8 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$9 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$10 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$11 = tx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$12 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) rx_fsm_state; assign \$13 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$14 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$15 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$16 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$17 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h5; assign \$18 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h6; assign \$19 = rx_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h7; assign \$20 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:174" *) txReadDataRequestWait; assign \$21 = txReadDataRequestWait - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:175" *) 1'h1; assign \$22 = txReadDataRequestWait == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:176" *) 1'h1; assign \$28 = delay_cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:206" *) 1'h1; assign \$29 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:234" *) txTimer; assign \$30 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:235" *) txPacketSize; assign \$31 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:236" *) 4'h8; assign \$32 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:236" *) \$31 ; assign \$33 = crc >> \$32 ; assign \$34 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:238" *) 4'h8; assign \$35 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:238" *) \$34 ; assign \$36 = txReadData >> \$35 ; assign \$37 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:240" *) 1'h1; assign \$38 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:244" *) 1'h1; assign \$39 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:247" *) txTimer; assign \$40 = txCurrentBit == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:249" *) 4'h8; assign \$41 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:251" *) 1'h1; assign \$42 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:255" *) txPacketSize; assign \$43 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:256" *) 4'h8; assign \$44 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:256" *) \$43 ; assign \$45 = crc >> \$44 ; assign \$46 = txCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:258" *) 4'h8; assign \$47 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:258" *) \$46 ; assign \$48 = txReadData >> \$47 ; assign \$49 = txCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:260" *) 1'h1; assign \$50 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:261" *) 1'h1; assign \$51 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:264" *) 1'h1; assign \$52 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:267" *) txTimer; assign \$53 = txCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) 2'h3; assign \$54 = txCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) txPacketSize; assign \$55 = \$53 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:268" *) \$54 ; assign \$56 = txCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:284" *) 2'h3; assign \$57 = txCurrentWord + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:286" *) 1'h1; assign \$58 = txPacketSize - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:289" *) 1'h1; assign \$59 = txCurrentWord != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:289" *) \$58 ; assign \$60 = txCurrentByte + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:293" *) 1'h1; assign \$61 = txTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:300" *) 1'h1; assign \$62 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:330" *) 7'h64; assign \$63 = delay_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:344" *) 9'h12c; assign \$65 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:361" *) rx_synced; assign \$191 = bitLength / (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) 2'h2; assign \$67 = bitLength + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) \$66 ; assign \$68 = \$67 - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:363" *) 1'h1; assign \$69 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:369" *) 1'h1; assign \$70 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:376" *) rxTimer; assign \$71 = rxCurrentByte * (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:377" *) 4'h8; assign \$72 = rxCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:377" *) \$71 ; assign \$73 = rxCurrentBit == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:379" *) 3'h7; assign \$74 = rxCurrentBit + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:384" *) 1'h1; assign \$75 = bitLength - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:385" *) 1'h1; assign \$76 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:389" *) 1'h1; assign \$77 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:396" *) rxTimer; assign \$78 = rxCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) 2'h3; assign \$79 = rxCurrentWord == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) rxPacketSize; assign \$80 = \$78 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:398" *) \$79 ; assign \$81 = \crc$62 == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:406" *) rxData; assign \$82 = rxCurrentByte == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:419" *) 2'h3; assign \$83 = rxCurrentWord + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:421" *) 1'h1; assign \$84 = rxCurrentByte + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:429" *) 1'h1; assign \$85 = rxTimer - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:434" *) 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_control_mode <= 1'h0; else bram_control_mode <= \$86 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:70" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_start <= 1'h0; else tx_start <= \$87 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:71" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_start <= 1'h0; else rx_start <= \$88 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:72" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txPacketSize <= 8'h01; else txPacketSize <= \$89 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:73" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxPacketSize <= 8'h01; else rxPacketSize <= \$90 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:76" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bitLength <= 10'h008; else bitLength <= \$91 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:119" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadDataRequestWait <= 2'h0; else txReadDataRequestWait <= \$92 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:114" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadData <= 32'd0; else txReadData <= \$93 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:105" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalReadWriteAddress <= 16'h0000; else internalReadWriteAddress <= \$94 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:118" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txReadDataRequest <= 1'h0; else txReadDataRequest <= \$95 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:402" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__data <= 32'd0; else internalWritePort__data <= \$96 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\memory.py:400" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) internalWritePort__en <= 1'h0; else internalWritePort__en <= \$97 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:116" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxWriteDataRequest <= 1'h0; else rxWriteDataRequest <= \$98 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) valid <= 1'h0; else valid <= \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start <= 1'h0; else start <= \$100 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \valid$48 <= 1'h0; else \valid$48 <= \$101 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \start$49 <= 1'h0; else \start$49 <= \$102 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:136" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) delay_cnt <= 9'h000; else delay_cnt <= \$103 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx_fsm_state <= 3'h0; else tx_fsm_state <= \$104 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:27" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txDone <= 1'h1; else txDone <= \$105 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:25" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txBusy <= 1'h0; else txBusy <= \$106 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:38" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) tx <= 1'h1; else tx <= \$107 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:123" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentBit <= 4'h0; else txCurrentBit <= \$108 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:124" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentByte <= 2'h0; else txCurrentByte <= \$109 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:125" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txCurrentWord <= 8'h00; else txCurrentWord <= \$110 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:121" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) txTimer <= 11'h000; else txTimer <= \$111 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:117" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) updateStatusDataRequest <= 1'h0; else updateStatusDataRequest <= \$112 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data <= 32'd0; else data <= \$113 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_fsm_state <= 3'h0; else rx_fsm_state <= \$114 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:28" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxDone <= 1'h1; else rxDone <= \$115 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:29" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCRCvalid <= 1'h0; else rxCRCvalid <= \$116 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:129" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentBit <= 4'h0; else rxCurrentBit <= \$117 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:130" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentByte <= 2'h0; else rxCurrentByte <= \$118 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:131" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxCurrentWord <= 8'h00; else rxCurrentWord <= \$119 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:127" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxTimer <= 11'h000; else rxTimer <= \$120 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:26" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxBusy <= 1'h0; else rxBusy <= \$121 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:111" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxData <= 32'd0; else rxData <= \$122 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:112" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxNewData <= 32'd0; else rxNewData <= \$123 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \data$63 <= 32'd0; else \data$63 <= \$124 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:113" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rxNewDataIndex <= 8'h00; else rxNewDataIndex <= \$125 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:84" *) \Controller.em_serial_controller_D.drive_serial_port.U$3 \U$3 ( .rx(rx), .stage1(rx_synced), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:81" *) \Controller.em_serial_controller_D.drive_serial_port.crc32_rx crc32_rx ( .crc(\crc$62 ), .data_in(\data$63 ), .start(\start$49 ), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .valid(\valid$48 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:80" *) \Controller.em_serial_controller_D.drive_serial_port.crc32_tx crc32_tx ( .crc(crc), .data_in(data), .start(start), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .valid(valid) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end bram_read_data = 32'd0; casez (address) 16'h8002: if (\$1 ) begin bram_read_data = { 27'h0000000, rxCRCvalid, rxBusy, rxDone, txBusy, txDone }; end endcase if (\$2 ) begin bram_read_data = readData; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end externalWritePort__data = 32'd0; if (\$2 ) begin externalWritePort__data = bram_write_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end externalWritePort__en = 1'h0; if (\$2 ) begin externalWritePort__en = bram_write_enable; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: debugPins = 8'h01; 3'h1: debugPins = 8'h02; 3'h2: debugPins = 8'h03; 3'h3: debugPins = 8'h04; 3'h4: debugPins = 8'h05; 3'h5: debugPins = 8'h06; 3'h6: debugPins = 8'h07; 3'h7: debugPins = 8'h08; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end delay_cnt_increment = 1'h0; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: if (\$3 ) begin delay_cnt_increment = 1'h1; end 3'h3: if (\$5 ) begin delay_cnt_increment = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end delay_cnt_reset = 1'h0; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: begin (* full_case = 32'd1 *) if (\$3 ) begin end else begin delay_cnt_reset = 1'h1; end if (\$4 ) begin delay_cnt_reset = 1'h1; end end 3'h3: begin (* full_case = 32'd1 *) if (\$5 ) begin end else begin delay_cnt_reset = 1'h1; end if (\$6 ) begin delay_cnt_reset = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end (* full_case = 32'd1 *) if (address[15]) begin \$86 = 1'h1; end else begin \$86 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$87 = tx_start; if (bram_write_enable) begin casez (address) 16'h8000: \$87 = bram_write_data[0]; endcase end casez (tx_fsm_state) 3'h0: if (tx_start) begin \$87 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$87 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$88 = rx_start; if (bram_write_enable) begin casez (address) 16'h8000: \$88 = bram_write_data[1]; endcase end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: if (rx_start) begin \$88 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$88 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$89 = txPacketSize; if (bram_write_enable) begin casez (address) 16'h8000: \$89 = bram_write_data[23:16]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$90 = rxPacketSize; if (bram_write_enable) begin casez (address) 16'h8000: \$90 = bram_write_data[31:24]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$91 = bitLength; if (bram_write_enable) begin casez (address) 16'h8000: /* empty */; 16'h8001: \$91 = bram_write_data[9:0]; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$92 = txReadDataRequestWait; if (\$20 ) begin \$92 = \$21 [1:0]; end if (txReadDataRequest) begin \$92 = 2'h2; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$92 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$93 = txReadData; if (\$20 ) begin if (\$22 ) begin \$93 = internalReadPort__data; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$94 = internalReadWriteAddress; if (txReadDataRequest) begin \$94 = { 8'h00, \$23 }; end else if (rxWriteDataRequest) begin \$94 = { 8'h00, rxNewDataIndex }; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$95 = txReadDataRequest; if (txReadDataRequest) begin \$95 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$95 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin if (\$59 ) begin \$95 = 1'h1; end end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$96 = internalWritePort__data; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$96 = rxNewData; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$97 = internalWritePort__en; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$97 = 1'h1; end if (internalWritePort__en) begin \$97 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$98 = rxWriteDataRequest; if (txReadDataRequest) begin end else if (rxWriteDataRequest) begin \$98 = 1'h0; end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$98 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$99 = valid; if (\$24 ) begin \$99 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$99 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$100 = start; if (\$25 ) begin \$100 = 1'h0; end casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$100 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$101 = \valid$48 ; if (\$26 ) begin \$101 = 1'h0; end (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$101 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$102 = \start$49 ; if (\$27 ) begin \$102 = 1'h0; end casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$102 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$103 = delay_cnt; if (delay_cnt_increment) begin \$103 = \$28 [8:0]; end if (delay_cnt_reset) begin \$103 = 9'h000; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$104 = tx_fsm_state; casez (tx_fsm_state) 3'h0: if (tx_start) begin \$104 = 3'h1; end 3'h1: \$104 = 3'h2; 3'h2: if (\$29 ) begin \$104 = 3'h3; end 3'h3: if (\$39 ) begin if (\$40 ) begin \$104 = 3'h4; end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$104 = 3'h0; end else begin \$104 = 3'h2; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$105 = txDone; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$105 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$105 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$106 = txBusy; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$106 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$106 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$107 = tx; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$107 = 1'h0; 3'h2: if (\$29 ) begin (* full_case = 32'd1 *) if (\$30 ) begin \$107 = \$33 ; end else begin \$107 = \$36 ; end end 3'h3: if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin \$107 = 1'h1; end else begin (* full_case = 32'd1 *) if (\$42 ) begin \$107 = \$45 ; end else begin \$107 = \$48 ; end end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$107 = 1'h1; end else begin \$107 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$108 = txCurrentBit; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$108 = 4'h0; 3'h2: if (\$29 ) begin \$108 = 4'h1; end 3'h3: if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin end else begin \$108 = \$49 [3:0]; end end 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin \$108 = 4'h0; end else begin \$108 = 4'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$109 = txCurrentByte; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$109 = 2'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin (* full_case = 32'd1 *) if (\$56 ) begin \$109 = 2'h0; end else begin \$109 = \$60 [1:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$110 = txCurrentWord; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$110 = 8'h00; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$110 = \$57 [7:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$111 = txTimer; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$111 = { 1'h0, bitLength }; 3'h2: (* full_case = 32'd1 *) if (\$29 ) begin \$111 = \$37 ; end else begin \$111 = \$38 [10:0]; end 3'h3: (* full_case = 32'd1 *) if (\$39 ) begin (* full_case = 32'd1 *) if (\$40 ) begin \$111 = \$41 ; end else begin \$111 = \$50 ; end end else begin \$111 = \$51 [10:0]; end 3'h4: (* full_case = 32'd1 *) if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin \$111 = { 1'h0, bitLength }; end end else begin \$111 = \$61 [10:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$112 = updateStatusDataRequest; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: \$112 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin if (\$55 ) begin \$112 = 1'h1; end end endcase (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$112 = 1'h1; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$112 = 1'h1; end 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$112 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$113 = data; casez (tx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$52 ) begin (* full_case = 32'd1 *) if (\$55 ) begin end else begin if (\$56 ) begin \$113 = txReadData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$114 = rx_fsm_state; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: if (rx_start) begin \$114 = 3'h1; end 3'h1: \$114 = 3'h2; 3'h2: begin if (\$62 ) begin \$114 = 3'h3; end if (rx_start) begin \$114 = 3'h0; end end 3'h3: begin if (\$63 ) begin \$114 = 3'h4; end if (rx_start) begin \$114 = 3'h0; end end 3'h4: begin if (\$64 ) begin \$114 = 3'h5; end if (rx_start) begin \$114 = 3'h0; end end 3'h5: begin if (\$65 ) begin \$114 = 3'h6; end if (rx_start) begin \$114 = 3'h0; end end 3'h6: begin if (\$70 ) begin if (\$73 ) begin \$114 = 3'h7; end end if (rx_start) begin \$114 = 3'h0; end end 3'h7: begin if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$114 = 3'h0; end else begin \$114 = 3'h5; end end if (rx_start) begin \$114 = 3'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$115 = rxDone; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$115 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin \$115 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$116 = rxCRCvalid; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$116 = 1'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin if (\$80 ) begin (* full_case = 32'd1 *) if (\$81 ) begin \$116 = 1'h1; end else begin \$116 = 1'h0; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$117 = rxCurrentBit; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$117 = 4'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$117 = 4'h0; end 3'h6: if (\$70 ) begin (* full_case = 32'd1 *) if (\$73 ) begin end else begin \$117 = \$74 [3:0]; end end 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$117 = 4'h0; end else begin \$117 = 4'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$118 = rxCurrentByte; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$118 = 2'h0; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$118 = 2'h0; end else begin (* full_case = 32'd1 *) if (\$82 ) begin \$118 = 2'h0; end else begin \$118 = \$84 [1:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$119 = rxCurrentWord; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: \$119 = 8'h00; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$119 = 8'h00; end else begin if (\$82 ) begin \$119 = \$83 [7:0]; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$120 = rxTimer; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: (* full_case = 32'd1 *) if (\$65 ) begin \$120 = \$68 [10:0]; end else begin \$120 = \$69 [10:0]; end 3'h6: (* full_case = 32'd1 *) if (\$70 ) begin (* full_case = 32'd1 *) if (\$73 ) begin \$120 = { 1'h0, bitLength }; end else begin \$120 = \$75 ; end end else begin \$120 = \$76 [10:0]; end 3'h7: (* full_case = 32'd1 *) if (\$77 ) begin end else begin \$120 = \$85 [10:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$121 = rxBusy; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: if (\$65 ) begin \$121 = 1'h1; end 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin \$121 = 1'h0; end else begin \$121 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$122 = rxData; casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: if (\$70 ) begin casez (\$72 ) 7'h00: \$122 [0] = rx_synced; 7'h01: \$122 [1] = rx_synced; 7'h02: \$122 [2] = rx_synced; 7'h03: \$122 [3] = rx_synced; 7'h04: \$122 [4] = rx_synced; 7'h05: \$122 [5] = rx_synced; 7'h06: \$122 [6] = rx_synced; 7'h07: \$122 [7] = rx_synced; 7'h08: \$122 [8] = rx_synced; 7'h09: \$122 [9] = rx_synced; 7'h0a: \$122 [10] = rx_synced; 7'h0b: \$122 [11] = rx_synced; 7'h0c: \$122 [12] = rx_synced; 7'h0d: \$122 [13] = rx_synced; 7'h0e: \$122 [14] = rx_synced; 7'h0f: \$122 [15] = rx_synced; 7'h10: \$122 [16] = rx_synced; 7'h11: \$122 [17] = rx_synced; 7'h12: \$122 [18] = rx_synced; 7'h13: \$122 [19] = rx_synced; 7'h14: \$122 [20] = rx_synced; 7'h15: \$122 [21] = rx_synced; 7'h16: \$122 [22] = rx_synced; 7'h17: \$122 [23] = rx_synced; 7'h18: \$122 [24] = rx_synced; 7'h19: \$122 [25] = rx_synced; 7'h1a: \$122 [26] = rx_synced; 7'h1b: \$122 [27] = rx_synced; 7'h1c: \$122 [28] = rx_synced; 7'h1d: \$122 [29] = rx_synced; 7'h1e: \$122 [30] = rx_synced; 7'h1f: \$122 [31] = rx_synced; endcase end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$123 = rxNewData; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$123 = rxData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$124 = \data$63 ; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$124 = rxData; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$30 ) begin end \$125 = rxNewDataIndex; (* full_case = 32'd1 *) casez (rx_fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: /* empty */; 3'h5: /* empty */; 3'h6: /* empty */; 3'h7: if (\$77 ) begin (* full_case = 32'd1 *) if (\$80 ) begin end else begin if (\$82 ) begin \$125 = rxCurrentWord; end end end endcase end assign externalReadPort__addr = address[3:0]; assign externalWritePort__addr = address[3:0]; assign writeData = externalWritePort__data; assign writeEnable = externalWritePort__en; assign externalReadPort__data = readData; assign internalReadPort__addr = internalReadWriteAddress[3:0]; assign internalWritePort__addr = internalReadWriteAddress[3:0]; assign bram_address = address; assign \$1 = bram_control_mode; assign \$3 = rx_synced; assign { \$23 [7:4], \$23 [2:0] } = { txCurrentWord[7:4], txCurrentWord[2:0] }; assign \$23 [3] = 1'h1; assign \$24 = valid; assign \$25 = start; assign \$26 = \valid$48 ; assign \$27 = \start$49 ; assign \$64 = rx_synced; assign \$193 = 1'h1; assign \$66 = \$191 ; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_D.drive_serial_port.U$3 (sync_100_rst, rx, stage1, sync_100_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:37" *) input rx; wire rx; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) wire rx_synced; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\em_serial_port.py:83" *) output stage1; reg stage1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage0 <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage1 <= stage0; assign rx_synced = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_D.drive_serial_port.crc32_rx (sync_100_rst, crc, valid, start, data_in, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$31 = 0; wire [31:0] \$1 ; wire \$10 ; wire \$100 ; wire [31:0] \$1000 ; wire \$1001 ; wire [31:0] \$1002 ; wire \$1003 ; wire [31:0] \$1004 ; wire \$1005 ; wire [31:0] \$1006 ; wire \$1007 ; wire [31:0] \$1008 ; wire \$1009 ; wire [31:0] \$101 ; wire [31:0] \$1010 ; wire \$1011 ; wire [31:0] \$1012 ; wire \$1013 ; wire [31:0] \$1014 ; wire \$1015 ; wire \$1016 ; wire \$1017 ; wire \$1018 ; wire \$1019 ; wire \$102 ; wire \$1020 ; wire \$1021 ; wire \$1022 ; wire \$1023 ; wire \$1024 ; wire \$1025 ; wire \$1026 ; wire \$1027 ; wire \$1028 ; wire \$1029 ; wire [31:0] \$103 ; wire [31:0] \$1030 ; wire \$1031 ; wire [31:0] \$1032 ; wire \$1033 ; wire [31:0] \$1034 ; wire \$1035 ; wire [31:0] \$1036 ; wire \$1037 ; wire [31:0] \$1038 ; wire \$1039 ; wire \$104 ; wire [31:0] \$1040 ; wire \$1041 ; wire [31:0] \$1042 ; wire \$1043 ; wire [31:0] \$1044 ; wire \$1045 ; wire [31:0] \$1046 ; wire \$1047 ; wire [31:0] \$1048 ; wire \$1049 ; wire [31:0] \$105 ; wire [31:0] \$1050 ; wire \$1051 ; wire [31:0] \$1052 ; wire \$1053 ; wire [31:0] \$1054 ; wire \$1055 ; wire \$1056 ; wire \$1057 ; wire \$1058 ; wire \$1059 ; wire \$106 ; wire \$1060 ; wire \$1061 ; wire \$1062 ; wire \$1063 ; wire \$1064 ; wire \$1065 ; wire \$1066 ; wire \$1067 ; wire \$1068 ; wire [31:0] \$1069 ; wire [31:0] \$107 ; wire \$1070 ; wire [31:0] \$1071 ; wire \$1072 ; wire [31:0] \$1073 ; wire \$1074 ; wire [31:0] \$1075 ; wire \$1076 ; wire [31:0] \$1077 ; wire \$1078 ; wire [31:0] \$1079 ; wire \$108 ; wire \$1080 ; wire [31:0] \$1081 ; wire \$1082 ; wire [31:0] \$1083 ; wire \$1084 ; wire [31:0] \$1085 ; wire \$1086 ; wire [31:0] \$1087 ; wire \$1088 ; wire [31:0] \$1089 ; wire [31:0] \$109 ; wire \$1090 ; wire [31:0] \$1091 ; wire \$1092 ; wire [31:0] \$1093 ; wire \$1094 ; wire \$1095 ; wire \$1096 ; wire \$1097 ; wire \$1098 ; wire \$1099 ; wire [31:0] \$11 ; wire \$110 ; wire \$1100 ; wire \$1101 ; wire \$1102 ; wire \$1103 ; wire \$1104 ; wire \$1105 ; wire \$1106 ; wire \$1107 ; wire [31:0] \$1108 ; wire \$1109 ; wire \$111 ; wire [31:0] \$1110 ; wire \$1111 ; wire [31:0] \$1112 ; wire \$1113 ; wire [31:0] \$1114 ; wire \$1115 ; wire [31:0] \$1116 ; wire \$1117 ; wire [31:0] \$1118 ; wire \$1119 ; wire \$112 ; wire [31:0] \$1120 ; wire \$1121 ; wire [31:0] \$1122 ; wire \$1123 ; wire [31:0] \$1124 ; wire \$1125 ; wire [31:0] \$1126 ; wire \$1127 ; wire [31:0] \$1128 ; wire \$1129 ; wire \$113 ; wire [31:0] \$1130 ; wire \$1131 ; wire [31:0] \$1132 ; wire \$1133 ; wire [31:0] \$1134 ; wire \$1135 ; wire [31:0] \$1136 ; wire \$1137 ; wire \$1138 ; wire \$1139 ; wire \$114 ; wire \$1140 ; wire \$1141 ; wire \$1142 ; wire \$1143 ; wire \$1144 ; wire \$1145 ; wire \$1146 ; wire \$1147 ; wire \$1148 ; wire \$1149 ; wire \$115 ; wire \$1150 ; wire \$1151 ; wire \$1152 ; wire [31:0] \$1153 ; wire \$1154 ; wire [31:0] \$1155 ; wire \$1156 ; wire [31:0] \$1157 ; wire \$1158 ; wire [31:0] \$1159 ; wire \$116 ; wire \$1160 ; wire [31:0] \$1161 ; wire \$1162 ; wire [31:0] \$1163 ; wire \$1164 ; wire [31:0] \$1165 ; wire \$1166 ; wire [31:0] \$1167 ; wire \$1168 ; wire [31:0] \$1169 ; wire \$117 ; wire \$1170 ; wire [31:0] \$1171 ; wire \$1172 ; wire [31:0] \$1173 ; wire \$1174 ; wire [31:0] \$1175 ; wire \$1176 ; wire [31:0] \$1177 ; wire \$1178 ; wire [31:0] \$1179 ; wire \$118 ; wire \$1180 ; wire \$1181 ; wire \$1182 ; wire \$1183 ; wire \$1184 ; wire \$1185 ; wire \$1186 ; wire \$1187 ; wire \$1188 ; wire \$1189 ; wire \$119 ; wire \$1190 ; wire \$1191 ; wire \$1192 ; wire \$1193 ; wire \$1194 ; wire [31:0] \$1195 ; wire \$1196 ; wire [31:0] \$1197 ; wire \$1198 ; wire [31:0] \$1199 ; wire \$12 ; wire \$120 ; wire \$1200 ; wire [31:0] \$1201 ; wire \$1202 ; wire [31:0] \$1203 ; wire \$1204 ; wire [31:0] \$1205 ; wire \$1206 ; wire [31:0] \$1207 ; wire \$1208 ; wire [31:0] \$1209 ; wire \$121 ; wire \$1210 ; wire [31:0] \$1211 ; wire \$1212 ; wire [31:0] \$1213 ; wire \$1214 ; wire [31:0] \$1215 ; wire \$1216 ; wire [31:0] \$1217 ; wire \$1218 ; wire [31:0] \$1219 ; wire \$122 ; wire \$1220 ; wire [31:0] \$1221 ; wire \$1222 ; wire \$1223 ; wire \$1224 ; wire \$1225 ; wire \$1226 ; wire \$1227 ; wire \$1228 ; wire \$1229 ; wire \$123 ; wire \$1230 ; wire \$1231 ; wire \$1232 ; wire \$1233 ; wire \$1234 ; wire \$1235 ; wire \$1236 ; wire [31:0] \$1237 ; wire \$1238 ; wire [31:0] \$1239 ; wire \$124 ; wire \$1240 ; wire [31:0] \$1241 ; wire \$1242 ; wire [31:0] \$1243 ; wire \$1244 ; wire [31:0] \$1245 ; wire \$1246 ; wire [31:0] \$1247 ; wire \$1248 ; wire [31:0] \$1249 ; wire \$125 ; wire \$1250 ; wire [31:0] \$1251 ; wire \$1252 ; wire [31:0] \$1253 ; wire \$1254 ; wire [31:0] \$1255 ; wire \$1256 ; wire [31:0] \$1257 ; wire \$1258 ; wire [31:0] \$1259 ; wire \$126 ; wire \$1260 ; wire [31:0] \$1261 ; wire \$1262 ; wire [31:0] \$1263 ; wire \$1264 ; wire \$1265 ; wire \$1266 ; wire \$1267 ; wire \$1268 ; wire \$1269 ; wire [31:0] \$127 ; wire \$1270 ; wire \$1271 ; wire \$1272 ; wire \$1273 ; wire \$1274 ; wire \$1275 ; wire \$1276 ; wire \$1277 ; wire \$1278 ; wire [31:0] \$1279 ; wire \$128 ; wire \$1280 ; wire [31:0] \$1281 ; wire \$1282 ; wire [31:0] \$1283 ; wire \$1284 ; wire [31:0] \$1285 ; wire \$1286 ; wire [31:0] \$1287 ; wire \$1288 ; wire [31:0] \$1289 ; wire [31:0] \$129 ; wire \$1290 ; wire [31:0] \$1291 ; wire \$1292 ; wire [31:0] \$1293 ; wire \$1294 ; wire [31:0] \$1295 ; wire \$1296 ; wire [31:0] \$1297 ; wire \$1298 ; wire [31:0] \$1299 ; wire [31:0] \$13 ; wire \$130 ; wire \$1300 ; wire [31:0] \$1301 ; wire \$1302 ; wire [31:0] \$1303 ; wire \$1304 ; wire \$1305 ; wire \$1306 ; wire \$1307 ; wire \$1308 ; wire \$1309 ; wire [31:0] \$131 ; wire \$1310 ; wire \$1311 ; wire \$1312 ; wire \$1313 ; wire \$1314 ; wire \$1315 ; wire \$1316 ; wire \$1317 ; wire [31:0] \$1318 ; wire \$1319 ; wire \$132 ; wire [31:0] \$1320 ; wire \$1321 ; wire [31:0] \$1322 ; wire \$1323 ; wire [31:0] \$1324 ; wire \$1325 ; wire [31:0] \$1326 ; wire \$1327 ; wire [31:0] \$1328 ; wire \$1329 ; wire [31:0] \$133 ; wire [31:0] \$1330 ; wire \$1331 ; wire [31:0] \$1332 ; wire \$1333 ; wire [31:0] \$1334 ; wire \$1335 ; wire [31:0] \$1336 ; wire \$1337 ; wire [31:0] \$1338 ; wire \$1339 ; wire \$134 ; wire [31:0] \$1340 ; wire \$1341 ; wire [31:0] \$1342 ; wire \$1343 ; wire \$1344 ; wire \$1345 ; wire \$1346 ; wire \$1347 ; wire \$1348 ; wire \$1349 ; wire [31:0] \$135 ; wire \$1350 ; wire \$1351 ; wire \$1352 ; wire \$1353 ; wire \$1354 ; wire \$1355 ; wire \$1356 ; reg [31:0] \$1357 ; wire \$136 ; wire [31:0] \$137 ; wire \$138 ; wire [31:0] \$139 ; wire \$14 ; wire \$140 ; wire [31:0] \$141 ; wire \$142 ; wire [31:0] \$143 ; wire \$144 ; wire [31:0] \$145 ; wire \$146 ; wire [31:0] \$147 ; wire \$148 ; wire [31:0] \$149 ; wire [31:0] \$15 ; wire \$150 ; wire [31:0] \$151 ; wire \$152 ; wire [31:0] \$153 ; wire \$154 ; wire [31:0] \$155 ; wire \$156 ; wire \$157 ; wire \$158 ; wire \$159 ; wire \$16 ; wire \$160 ; wire \$161 ; wire \$162 ; wire \$163 ; wire \$164 ; wire \$165 ; wire \$166 ; wire \$167 ; wire \$168 ; wire \$169 ; wire [31:0] \$17 ; wire \$170 ; wire \$171 ; wire [31:0] \$172 ; wire \$173 ; wire [31:0] \$174 ; wire \$175 ; wire [31:0] \$176 ; wire \$177 ; wire [31:0] \$178 ; wire \$179 ; wire \$18 ; wire [31:0] \$180 ; wire \$181 ; wire [31:0] \$182 ; wire \$183 ; wire [31:0] \$184 ; wire \$185 ; wire [31:0] \$186 ; wire \$187 ; wire [31:0] \$188 ; wire \$189 ; wire [31:0] \$19 ; wire [31:0] \$190 ; wire \$191 ; wire [31:0] \$192 ; wire \$193 ; wire [31:0] \$194 ; wire \$195 ; wire [31:0] \$196 ; wire \$197 ; wire [31:0] \$198 ; wire \$199 ; wire \$2 ; wire \$20 ; wire [31:0] \$200 ; wire \$201 ; wire [31:0] \$202 ; wire \$203 ; wire [31:0] \$204 ; wire \$205 ; wire \$206 ; wire \$207 ; wire \$208 ; wire \$209 ; wire [31:0] \$21 ; wire \$210 ; wire \$211 ; wire \$212 ; wire \$213 ; wire \$214 ; wire \$215 ; wire \$216 ; wire \$217 ; wire \$218 ; wire \$219 ; wire \$22 ; wire \$220 ; wire \$221 ; wire \$222 ; wire [31:0] \$223 ; wire \$224 ; wire [31:0] \$225 ; wire \$226 ; wire [31:0] \$227 ; wire \$228 ; wire [31:0] \$229 ; wire [31:0] \$23 ; wire \$230 ; wire [31:0] \$231 ; wire \$232 ; wire [31:0] \$233 ; wire \$234 ; wire [31:0] \$235 ; wire \$236 ; wire [31:0] \$237 ; wire \$238 ; wire [31:0] \$239 ; wire \$24 ; wire \$240 ; wire [31:0] \$241 ; wire \$242 ; wire [31:0] \$243 ; wire \$244 ; wire [31:0] \$245 ; wire \$246 ; wire [31:0] \$247 ; wire \$248 ; wire [31:0] \$249 ; wire [31:0] \$25 ; wire \$250 ; wire [31:0] \$251 ; wire \$252 ; wire \$253 ; wire \$254 ; wire \$255 ; wire \$256 ; wire \$257 ; wire \$258 ; wire \$259 ; wire \$26 ; wire \$260 ; wire \$261 ; wire \$262 ; wire \$263 ; wire \$264 ; wire \$265 ; wire \$266 ; wire \$267 ; wire [31:0] \$268 ; wire \$269 ; wire \$27 ; wire [31:0] \$270 ; wire \$271 ; wire [31:0] \$272 ; wire \$273 ; wire [31:0] \$274 ; wire \$275 ; wire [31:0] \$276 ; wire \$277 ; wire [31:0] \$278 ; wire \$279 ; wire \$28 ; wire [31:0] \$280 ; wire \$281 ; wire [31:0] \$282 ; wire \$283 ; wire [31:0] \$284 ; wire \$285 ; wire [31:0] \$286 ; wire \$287 ; wire [31:0] \$288 ; wire \$289 ; wire \$29 ; wire [31:0] \$290 ; wire \$291 ; wire [31:0] \$292 ; wire \$293 ; wire [31:0] \$294 ; wire \$295 ; wire [31:0] \$296 ; wire \$297 ; wire \$298 ; wire \$299 ; wire [31:0] \$3 ; wire \$30 ; wire \$300 ; wire \$301 ; wire \$302 ; wire \$303 ; wire \$304 ; wire \$305 ; wire \$306 ; wire \$307 ; wire \$308 ; wire \$309 ; wire \$31 ; wire \$310 ; wire \$311 ; wire \$312 ; wire [31:0] \$313 ; wire \$314 ; wire [31:0] \$315 ; wire \$316 ; wire [31:0] \$317 ; wire \$318 ; wire [31:0] \$319 ; wire \$32 ; wire \$320 ; wire [31:0] \$321 ; wire \$322 ; wire [31:0] \$323 ; wire \$324 ; wire [31:0] \$325 ; wire \$326 ; wire [31:0] \$327 ; wire \$328 ; wire [31:0] \$329 ; wire \$33 ; wire \$330 ; wire [31:0] \$331 ; wire \$332 ; wire [31:0] \$333 ; wire \$334 ; wire [31:0] \$335 ; wire \$336 ; wire [31:0] \$337 ; wire \$338 ; wire [31:0] \$339 ; wire \$34 ; wire \$340 ; wire [31:0] \$341 ; wire \$342 ; wire [31:0] \$343 ; wire \$344 ; wire \$345 ; wire \$346 ; wire \$347 ; wire \$348 ; wire \$349 ; wire \$35 ; wire \$350 ; wire \$351 ; wire \$352 ; wire \$353 ; wire \$354 ; wire \$355 ; wire \$356 ; wire \$357 ; wire \$358 ; wire \$359 ; wire \$36 ; wire \$360 ; wire [31:0] \$361 ; wire \$362 ; wire [31:0] \$363 ; wire \$364 ; wire [31:0] \$365 ; wire \$366 ; wire [31:0] \$367 ; wire \$368 ; wire [31:0] \$369 ; wire \$37 ; wire \$370 ; wire [31:0] \$371 ; wire \$372 ; wire [31:0] \$373 ; wire \$374 ; wire [31:0] \$375 ; wire \$376 ; wire [31:0] \$377 ; wire \$378 ; wire [31:0] \$379 ; wire \$38 ; wire \$380 ; wire [31:0] \$381 ; wire \$382 ; wire [31:0] \$383 ; wire \$384 ; wire [31:0] \$385 ; wire \$386 ; wire \$387 ; wire \$388 ; wire \$389 ; wire \$39 ; wire \$390 ; wire \$391 ; wire \$392 ; wire \$393 ; wire \$394 ; wire \$395 ; wire \$396 ; wire \$397 ; wire \$398 ; wire \$399 ; wire \$4 ; wire [31:0] \$40 ; wire [31:0] \$400 ; wire \$401 ; wire [31:0] \$402 ; wire \$403 ; wire [31:0] \$404 ; wire \$405 ; wire [31:0] \$406 ; wire \$407 ; wire [31:0] \$408 ; wire \$409 ; wire \$41 ; wire [31:0] \$410 ; wire \$411 ; wire [31:0] \$412 ; wire \$413 ; wire [31:0] \$414 ; wire \$415 ; wire [31:0] \$416 ; wire \$417 ; wire [31:0] \$418 ; wire \$419 ; wire [31:0] \$42 ; wire [31:0] \$420 ; wire \$421 ; wire [31:0] \$422 ; wire \$423 ; wire \$424 ; wire \$425 ; wire \$426 ; wire \$427 ; wire \$428 ; wire \$429 ; wire \$43 ; wire \$430 ; wire \$431 ; wire \$432 ; wire \$433 ; wire \$434 ; wire \$435 ; wire [31:0] \$436 ; wire \$437 ; wire [31:0] \$438 ; wire \$439 ; wire [31:0] \$44 ; wire [31:0] \$440 ; wire \$441 ; wire [31:0] \$442 ; wire \$443 ; wire [31:0] \$444 ; wire \$445 ; wire [31:0] \$446 ; wire \$447 ; wire [31:0] \$448 ; wire \$449 ; wire \$45 ; wire [31:0] \$450 ; wire \$451 ; wire [31:0] \$452 ; wire \$453 ; wire [31:0] \$454 ; wire \$455 ; wire [31:0] \$456 ; wire \$457 ; wire [31:0] \$458 ; wire \$459 ; wire [31:0] \$46 ; wire [31:0] \$460 ; wire \$461 ; wire \$462 ; wire \$463 ; wire \$464 ; wire \$465 ; wire \$466 ; wire \$467 ; wire \$468 ; wire \$469 ; wire \$47 ; wire \$470 ; wire \$471 ; wire \$472 ; wire \$473 ; wire \$474 ; wire [31:0] \$475 ; wire \$476 ; wire [31:0] \$477 ; wire \$478 ; wire [31:0] \$479 ; wire [31:0] \$48 ; wire \$480 ; wire [31:0] \$481 ; wire \$482 ; wire [31:0] \$483 ; wire \$484 ; wire [31:0] \$485 ; wire \$486 ; wire [31:0] \$487 ; wire \$488 ; wire [31:0] \$489 ; wire \$49 ; wire \$490 ; wire [31:0] \$491 ; wire \$492 ; wire [31:0] \$493 ; wire \$494 ; wire [31:0] \$495 ; wire \$496 ; wire [31:0] \$497 ; wire \$498 ; wire [31:0] \$499 ; wire [31:0] \$5 ; wire [31:0] \$50 ; wire \$500 ; wire [31:0] \$501 ; wire \$502 ; wire [31:0] \$503 ; wire \$504 ; wire [31:0] \$505 ; wire \$506 ; wire [31:0] \$507 ; wire \$508 ; wire \$509 ; wire \$51 ; wire \$510 ; wire \$511 ; wire \$512 ; wire \$513 ; wire \$514 ; wire \$515 ; wire \$516 ; wire \$517 ; wire \$518 ; wire \$519 ; wire [31:0] \$52 ; wire \$520 ; wire \$521 ; wire \$522 ; wire \$523 ; wire \$524 ; wire \$525 ; wire [31:0] \$526 ; wire \$527 ; wire [31:0] \$528 ; wire \$529 ; wire \$53 ; wire [31:0] \$530 ; wire \$531 ; wire [31:0] \$532 ; wire \$533 ; wire [31:0] \$534 ; wire \$535 ; wire [31:0] \$536 ; wire \$537 ; wire [31:0] \$538 ; wire \$539 ; wire [31:0] \$54 ; wire [31:0] \$540 ; wire \$541 ; wire [31:0] \$542 ; wire \$543 ; wire [31:0] \$544 ; wire \$545 ; wire [31:0] \$546 ; wire \$547 ; wire [31:0] \$548 ; wire \$549 ; wire \$55 ; wire [31:0] \$550 ; wire \$551 ; wire [31:0] \$552 ; wire \$553 ; wire [31:0] \$554 ; wire \$555 ; wire [31:0] \$556 ; wire \$557 ; wire [31:0] \$558 ; wire \$559 ; wire [31:0] \$56 ; wire \$560 ; wire \$561 ; wire \$562 ; wire \$563 ; wire \$564 ; wire \$565 ; wire \$566 ; wire \$567 ; wire \$568 ; wire \$569 ; wire \$57 ; wire \$570 ; wire \$571 ; wire \$572 ; wire \$573 ; wire \$574 ; wire \$575 ; wire \$576 ; wire [31:0] \$577 ; wire \$578 ; wire [31:0] \$579 ; wire [31:0] \$58 ; wire \$580 ; wire [31:0] \$581 ; wire \$582 ; wire [31:0] \$583 ; wire \$584 ; wire [31:0] \$585 ; wire \$586 ; wire [31:0] \$587 ; wire \$588 ; wire [31:0] \$589 ; wire \$59 ; wire \$590 ; wire [31:0] \$591 ; wire \$592 ; wire [31:0] \$593 ; wire \$594 ; wire [31:0] \$595 ; wire \$596 ; wire [31:0] \$597 ; wire \$598 ; wire [31:0] \$599 ; wire \$6 ; wire [31:0] \$60 ; wire \$600 ; wire [31:0] \$601 ; wire \$602 ; wire [31:0] \$603 ; wire \$604 ; wire [31:0] \$605 ; wire \$606 ; wire [31:0] \$607 ; wire \$608 ; wire \$609 ; wire \$61 ; wire \$610 ; wire \$611 ; wire \$612 ; wire \$613 ; wire \$614 ; wire \$615 ; wire \$616 ; wire \$617 ; wire \$618 ; wire \$619 ; wire [31:0] \$62 ; wire \$620 ; wire \$621 ; wire \$622 ; wire \$623 ; wire \$624 ; wire [31:0] \$625 ; wire \$626 ; wire [31:0] \$627 ; wire \$628 ; wire [31:0] \$629 ; wire \$63 ; wire \$630 ; wire [31:0] \$631 ; wire \$632 ; wire [31:0] \$633 ; wire \$634 ; wire [31:0] \$635 ; wire \$636 ; wire [31:0] \$637 ; wire \$638 ; wire [31:0] \$639 ; wire [31:0] \$64 ; wire \$640 ; wire [31:0] \$641 ; wire \$642 ; wire [31:0] \$643 ; wire \$644 ; wire [31:0] \$645 ; wire \$646 ; wire [31:0] \$647 ; wire \$648 ; wire [31:0] \$649 ; wire \$65 ; wire \$650 ; wire [31:0] \$651 ; wire \$652 ; wire [31:0] \$653 ; wire \$654 ; wire \$655 ; wire \$656 ; wire \$657 ; wire \$658 ; wire \$659 ; wire \$66 ; wire \$660 ; wire \$661 ; wire \$662 ; wire \$663 ; wire \$664 ; wire \$665 ; wire \$666 ; wire \$667 ; wire \$668 ; wire \$669 ; wire \$67 ; wire [31:0] \$670 ; wire \$671 ; wire [31:0] \$672 ; wire \$673 ; wire [31:0] \$674 ; wire \$675 ; wire [31:0] \$676 ; wire \$677 ; wire [31:0] \$678 ; wire \$679 ; wire \$68 ; wire [31:0] \$680 ; wire \$681 ; wire [31:0] \$682 ; wire \$683 ; wire [31:0] \$684 ; wire \$685 ; wire [31:0] \$686 ; wire \$687 ; wire [31:0] \$688 ; wire \$689 ; wire \$69 ; wire [31:0] \$690 ; wire \$691 ; wire [31:0] \$692 ; wire \$693 ; wire [31:0] \$694 ; wire \$695 ; wire [31:0] \$696 ; wire \$697 ; wire [31:0] \$698 ; wire \$699 ; wire [31:0] \$7 ; wire \$70 ; wire \$700 ; wire \$701 ; wire \$702 ; wire \$703 ; wire \$704 ; wire \$705 ; wire \$706 ; wire \$707 ; wire \$708 ; wire \$709 ; wire \$71 ; wire \$710 ; wire \$711 ; wire \$712 ; wire \$713 ; wire \$714 ; wire [31:0] \$715 ; wire \$716 ; wire [31:0] \$717 ; wire \$718 ; wire [31:0] \$719 ; wire \$72 ; wire \$720 ; wire [31:0] \$721 ; wire \$722 ; wire [31:0] \$723 ; wire \$724 ; wire [31:0] \$725 ; wire \$726 ; wire [31:0] \$727 ; wire \$728 ; wire [31:0] \$729 ; wire \$73 ; wire \$730 ; wire [31:0] \$731 ; wire \$732 ; wire [31:0] \$733 ; wire \$734 ; wire [31:0] \$735 ; wire \$736 ; wire [31:0] \$737 ; wire \$738 ; wire [31:0] \$739 ; wire \$74 ; wire \$740 ; wire [31:0] \$741 ; wire \$742 ; wire \$743 ; wire \$744 ; wire \$745 ; wire \$746 ; wire \$747 ; wire \$748 ; wire \$749 ; wire \$75 ; wire \$750 ; wire \$751 ; wire \$752 ; wire \$753 ; wire \$754 ; wire \$755 ; wire \$756 ; wire [31:0] \$757 ; wire \$758 ; wire [31:0] \$759 ; wire \$76 ; wire \$760 ; wire [31:0] \$761 ; wire \$762 ; wire [31:0] \$763 ; wire \$764 ; wire [31:0] \$765 ; wire \$766 ; wire [31:0] \$767 ; wire \$768 ; wire [31:0] \$769 ; wire \$77 ; wire \$770 ; wire [31:0] \$771 ; wire \$772 ; wire [31:0] \$773 ; wire \$774 ; wire [31:0] \$775 ; wire \$776 ; wire [31:0] \$777 ; wire \$778 ; wire [31:0] \$779 ; wire \$78 ; wire \$780 ; wire [31:0] \$781 ; wire \$782 ; wire [31:0] \$783 ; wire \$784 ; wire \$785 ; wire \$786 ; wire \$787 ; wire \$788 ; wire \$789 ; wire [31:0] \$79 ; wire \$790 ; wire \$791 ; wire \$792 ; wire \$793 ; wire \$794 ; wire \$795 ; wire \$796 ; wire \$797 ; wire \$798 ; wire [31:0] \$799 ; wire \$8 ; wire \$80 ; wire \$800 ; wire [31:0] \$801 ; wire \$802 ; wire [31:0] \$803 ; wire \$804 ; wire [31:0] \$805 ; wire \$806 ; wire [31:0] \$807 ; wire \$808 ; wire [31:0] \$809 ; wire [31:0] \$81 ; wire \$810 ; wire [31:0] \$811 ; wire \$812 ; wire [31:0] \$813 ; wire \$814 ; wire [31:0] \$815 ; wire \$816 ; wire [31:0] \$817 ; wire \$818 ; wire [31:0] \$819 ; wire \$82 ; wire \$820 ; wire [31:0] \$821 ; wire \$822 ; wire [31:0] \$823 ; wire \$824 ; wire \$825 ; wire \$826 ; wire \$827 ; wire \$828 ; wire \$829 ; wire [31:0] \$83 ; wire \$830 ; wire \$831 ; wire \$832 ; wire \$833 ; wire \$834 ; wire \$835 ; wire \$836 ; wire \$837 ; wire [31:0] \$838 ; wire \$839 ; wire \$84 ; wire [31:0] \$840 ; wire \$841 ; wire [31:0] \$842 ; wire \$843 ; wire [31:0] \$844 ; wire \$845 ; wire [31:0] \$846 ; wire \$847 ; wire [31:0] \$848 ; wire \$849 ; wire [31:0] \$85 ; wire [31:0] \$850 ; wire \$851 ; wire [31:0] \$852 ; wire \$853 ; wire [31:0] \$854 ; wire \$855 ; wire [31:0] \$856 ; wire \$857 ; wire [31:0] \$858 ; wire \$859 ; wire \$86 ; wire [31:0] \$860 ; wire \$861 ; wire \$862 ; wire \$863 ; wire \$864 ; wire \$865 ; wire \$866 ; wire \$867 ; wire \$868 ; wire \$869 ; wire [31:0] \$87 ; wire \$870 ; wire \$871 ; wire \$872 ; wire \$873 ; wire [31:0] \$874 ; wire \$875 ; wire [31:0] \$876 ; wire \$877 ; wire [31:0] \$878 ; wire \$879 ; wire \$88 ; wire [31:0] \$880 ; wire \$881 ; wire [31:0] \$882 ; wire \$883 ; wire [31:0] \$884 ; wire \$885 ; wire [31:0] \$886 ; wire \$887 ; wire [31:0] \$888 ; wire \$889 ; wire [31:0] \$89 ; wire [31:0] \$890 ; wire \$891 ; wire [31:0] \$892 ; wire \$893 ; wire [31:0] \$894 ; wire \$895 ; wire [31:0] \$896 ; wire \$897 ; wire \$898 ; wire \$899 ; wire [31:0] \$9 ; wire \$90 ; wire \$900 ; wire \$901 ; wire \$902 ; wire \$903 ; wire \$904 ; wire \$905 ; wire \$906 ; wire \$907 ; wire \$908 ; wire \$909 ; wire [31:0] \$91 ; wire [31:0] \$910 ; wire \$911 ; wire [31:0] \$912 ; wire \$913 ; wire [31:0] \$914 ; wire \$915 ; wire [31:0] \$916 ; wire \$917 ; wire [31:0] \$918 ; wire \$919 ; wire \$92 ; wire [31:0] \$920 ; wire \$921 ; wire [31:0] \$922 ; wire \$923 ; wire [31:0] \$924 ; wire \$925 ; wire [31:0] \$926 ; wire \$927 ; wire [31:0] \$928 ; wire \$929 ; wire [31:0] \$93 ; wire [31:0] \$930 ; wire \$931 ; wire [31:0] \$932 ; wire \$933 ; wire \$934 ; wire \$935 ; wire \$936 ; wire \$937 ; wire \$938 ; wire \$939 ; wire \$94 ; wire \$940 ; wire \$941 ; wire \$942 ; wire \$943 ; wire \$944 ; wire \$945 ; wire [31:0] \$946 ; wire \$947 ; wire [31:0] \$948 ; wire \$949 ; wire [31:0] \$95 ; wire [31:0] \$950 ; wire \$951 ; wire [31:0] \$952 ; wire \$953 ; wire [31:0] \$954 ; wire \$955 ; wire [31:0] \$956 ; wire \$957 ; wire [31:0] \$958 ; wire \$959 ; wire \$96 ; wire [31:0] \$960 ; wire \$961 ; wire [31:0] \$962 ; wire \$963 ; wire [31:0] \$964 ; wire \$965 ; wire [31:0] \$966 ; wire \$967 ; wire [31:0] \$968 ; wire \$969 ; wire [31:0] \$97 ; wire [31:0] \$970 ; wire \$971 ; wire [31:0] \$972 ; wire \$973 ; wire \$974 ; wire \$975 ; wire \$976 ; wire \$977 ; wire \$978 ; wire \$979 ; wire \$98 ; wire \$980 ; wire \$981 ; wire \$982 ; wire \$983 ; wire \$984 ; wire \$985 ; wire \$986 ; wire \$987 ; wire [31:0] \$988 ; wire \$989 ; wire [31:0] \$99 ; wire [31:0] \$990 ; wire \$991 ; wire [31:0] \$992 ; wire \$993 ; wire [31:0] \$994 ; wire \$995 ; wire [31:0] \$996 ; wire \$997 ; wire [31:0] \$998 ; wire \$999 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [31:0] crc; wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [31:0] crc_reg = 32'd4294967295; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire [31:0] data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input [31:0] data_in; wire [31:0] data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:356" *) crc_reg; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$3 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$4 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$3 [6]; assign \$5 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$6 = \$4 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$5 [9]; assign \$7 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$8 = \$6 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$7 [10]; assign \$9 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$10 = \$8 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$9 [12]; assign \$11 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$12 = \$10 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$11 [16]; assign \$13 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$14 = \$12 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$13 [24]; assign \$15 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$16 = \$14 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$15 [25]; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$18 = \$16 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$17 [26]; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$20 = \$18 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$19 [28]; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$22 = \$20 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$21 [29]; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$24 = \$22 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$23 [30]; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$26 = \$24 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$25 [31]; assign \$27 = \$26 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$28 = \$27 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$29 = \$28 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$30 = \$29 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$31 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$32 = \$31 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$34 = \$33 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$35 = \$34 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$36 = \$35 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$37 = \$36 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$38 = \$37 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$39 = \$38 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$40 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$42 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$43 = \$41 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$42 [1]; assign \$44 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$45 = \$43 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$44 [6]; assign \$46 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$47 = \$45 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$46 [7]; assign \$48 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$49 = \$47 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$48 [9]; assign \$50 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$51 = \$49 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$50 [11]; assign \$52 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$53 = \$51 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$52 [12]; assign \$54 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$55 = \$53 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$54 [13]; assign \$56 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$57 = \$55 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$56 [16]; assign \$58 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$59 = \$57 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$58 [17]; assign \$60 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$61 = \$59 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$60 [24]; assign \$62 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$63 = \$61 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$62 [27]; assign \$64 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$65 = \$63 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$64 [28]; assign \$66 = \$65 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$67 = \$66 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$68 = \$67 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$69 = \$68 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$70 = \$69 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$71 = \$70 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$72 = \$71 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$73 = \$72 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$74 = \$73 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$75 = \$74 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$76 = \$75 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$77 = \$76 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$78 = \$77 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$79 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$81 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$82 = \$80 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$81 [1]; assign \$83 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$84 = \$82 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$83 [2]; assign \$85 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$86 = \$84 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$85 [6]; assign \$87 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$88 = \$86 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$87 [7]; assign \$89 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$90 = \$88 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$89 [8]; assign \$91 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$92 = \$90 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$91 [9]; assign \$93 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$94 = \$92 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$93 [13]; assign \$95 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$96 = \$94 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$95 [14]; assign \$97 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$98 = \$96 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$97 [16]; assign \$99 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$100 = \$98 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$99 [17]; assign \$101 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$102 = \$100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$101 [18]; assign \$103 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$104 = \$102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$103 [24]; assign \$105 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$106 = \$104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$105 [26]; assign \$107 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$108 = \$106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$107 [30]; assign \$109 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$110 = \$108 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$109 [31]; assign \$111 = \$110 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$112 = \$111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$113 = \$112 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$114 = \$113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$115 = \$114 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$116 = \$115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$117 = \$116 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$118 = \$117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$119 = \$118 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$120 = \$119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$121 = \$120 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$122 = \$121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$123 = \$122 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$124 = \$123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$125 = \$124 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$126 = \$125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$127 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$129 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$130 = \$128 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$129 [2]; assign \$131 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$132 = \$130 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$131 [3]; assign \$133 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$134 = \$132 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$133 [7]; assign \$135 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$136 = \$134 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$135 [8]; assign \$137 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$138 = \$136 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$137 [9]; assign \$139 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$140 = \$138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$139 [10]; assign \$141 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$142 = \$140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$141 [14]; assign \$143 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$144 = \$142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$143 [15]; assign \$145 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$146 = \$144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$145 [17]; assign \$147 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$148 = \$146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$147 [18]; assign \$149 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$150 = \$148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$149 [19]; assign \$151 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$152 = \$150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$151 [25]; assign \$153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$154 = \$152 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$153 [27]; assign \$155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$156 = \$154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$155 [31]; assign \$157 = \$156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$158 = \$157 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$159 = \$158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$160 = \$159 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$161 = \$160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$162 = \$161 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$163 = \$162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$164 = \$163 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$165 = \$164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$166 = \$165 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$167 = \$166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$168 = \$167 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$169 = \$168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$170 = \$169 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$171 = \$170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$172 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$174 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$175 = \$173 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$174 [2]; assign \$176 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$177 = \$175 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$176 [3]; assign \$178 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$179 = \$177 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$178 [4]; assign \$180 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$181 = \$179 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$180 [6]; assign \$182 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$183 = \$181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$182 [8]; assign \$184 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$185 = \$183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$184 [11]; assign \$186 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$187 = \$185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$186 [12]; assign \$188 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$189 = \$187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$188 [15]; assign \$190 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$191 = \$189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$190 [18]; assign \$192 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$193 = \$191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$192 [19]; assign \$194 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$195 = \$193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$194 [20]; assign \$196 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$197 = \$195 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$196 [24]; assign \$198 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$199 = \$197 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$198 [25]; assign \$200 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$201 = \$199 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$200 [29]; assign \$202 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$203 = \$201 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$202 [30]; assign \$204 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$205 = \$203 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$204 [31]; assign \$206 = \$205 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$207 = \$206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$208 = \$207 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$209 = \$208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$210 = \$209 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$211 = \$210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$212 = \$211 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$213 = \$212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$214 = \$213 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$215 = \$214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$216 = \$215 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$217 = \$216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$218 = \$217 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$219 = \$218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$220 = \$219 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$221 = \$220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$222 = \$221 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$223 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$225 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$226 = \$224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$225 [1]; assign \$227 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$228 = \$226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$227 [3]; assign \$229 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$230 = \$228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$229 [4]; assign \$231 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$232 = \$230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$231 [5]; assign \$233 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$234 = \$232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$233 [6]; assign \$235 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$236 = \$234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$235 [7]; assign \$237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$238 = \$236 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$237 [10]; assign \$239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$240 = \$238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$239 [13]; assign \$241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$242 = \$240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$241 [19]; assign \$243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$244 = \$242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$243 [20]; assign \$245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$246 = \$244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$245 [21]; assign \$247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$248 = \$246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$247 [24]; assign \$249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$250 = \$248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$249 [28]; assign \$251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$252 = \$250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$251 [29]; assign \$253 = \$252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$254 = \$253 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$255 = \$254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$256 = \$255 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$257 = \$256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$258 = \$257 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$259 = \$258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$260 = \$259 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$261 = \$260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$262 = \$261 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$263 = \$262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$264 = \$263 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$265 = \$264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$266 = \$265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$267 = \$266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$268 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$270 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$271 = \$269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$270 [2]; assign \$272 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$273 = \$271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$272 [4]; assign \$274 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$275 = \$273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$274 [5]; assign \$276 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$277 = \$275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$276 [6]; assign \$278 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$279 = \$277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$278 [7]; assign \$280 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$281 = \$279 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$280 [8]; assign \$282 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$283 = \$281 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$282 [11]; assign \$284 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$285 = \$283 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$284 [14]; assign \$286 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$287 = \$285 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$286 [20]; assign \$288 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$289 = \$287 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$288 [21]; assign \$290 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$291 = \$289 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$290 [22]; assign \$292 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$293 = \$291 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$292 [25]; assign \$294 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$295 = \$293 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$294 [29]; assign \$296 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$297 = \$295 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$296 [30]; assign \$298 = \$297 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$299 = \$298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$300 = \$299 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$301 = \$300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$302 = \$301 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$303 = \$302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$304 = \$303 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$305 = \$304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$306 = \$305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$307 = \$306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$308 = \$307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$309 = \$308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$310 = \$309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$311 = \$310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$312 = \$311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$313 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$315 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$316 = \$314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$315 [2]; assign \$317 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$318 = \$316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$317 [3]; assign \$319 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$320 = \$318 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$319 [5]; assign \$321 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$322 = \$320 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$321 [7]; assign \$323 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$324 = \$322 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$323 [8]; assign \$325 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$326 = \$324 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$325 [10]; assign \$327 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$328 = \$326 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$327 [15]; assign \$329 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$330 = \$328 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$329 [16]; assign \$331 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$332 = \$330 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$331 [21]; assign \$333 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$334 = \$332 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$333 [22]; assign \$335 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$336 = \$334 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$335 [23]; assign \$337 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$338 = \$336 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$337 [24]; assign \$339 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$340 = \$338 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$339 [25]; assign \$341 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$342 = \$340 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$341 [28]; assign \$343 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$344 = \$342 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$343 [29]; assign \$345 = \$344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$346 = \$345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$347 = \$346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$348 = \$347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$349 = \$348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$350 = \$349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$351 = \$350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$352 = \$351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$353 = \$352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$354 = \$353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$355 = \$354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$356 = \$355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$357 = \$356 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$358 = \$357 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$359 = \$358 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$360 = \$359 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$361 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$363 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$364 = \$362 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$363 [1]; assign \$365 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$366 = \$364 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$365 [3]; assign \$367 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$368 = \$366 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$367 [4]; assign \$369 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$370 = \$368 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$369 [8]; assign \$371 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$372 = \$370 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$371 [10]; assign \$373 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$374 = \$372 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$373 [11]; assign \$375 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$376 = \$374 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$375 [12]; assign \$377 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$378 = \$376 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$377 [17]; assign \$379 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$380 = \$378 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$379 [22]; assign \$381 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$382 = \$380 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$381 [23]; assign \$383 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$384 = \$382 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$383 [28]; assign \$385 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$386 = \$384 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$385 [31]; assign \$387 = \$386 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$388 = \$387 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$389 = \$388 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$390 = \$389 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$391 = \$390 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$392 = \$391 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$393 = \$392 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$394 = \$393 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$395 = \$394 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$396 = \$395 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$397 = \$396 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$398 = \$397 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$399 = \$398 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$400 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$402 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$403 = \$401 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$402 [2]; assign \$404 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$405 = \$403 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$404 [4]; assign \$406 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$407 = \$405 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$406 [5]; assign \$408 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$409 = \$407 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$408 [9]; assign \$410 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$411 = \$409 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$410 [11]; assign \$412 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$413 = \$411 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$412 [12]; assign \$414 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$415 = \$413 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$414 [13]; assign \$416 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$417 = \$415 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$416 [18]; assign \$418 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$419 = \$417 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$418 [23]; assign \$420 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$421 = \$419 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$420 [24]; assign \$422 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$423 = \$421 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$422 [29]; assign \$424 = \$423 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$425 = \$424 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$426 = \$425 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$427 = \$426 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$428 = \$427 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$429 = \$428 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$430 = \$429 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$431 = \$430 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$432 = \$431 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$433 = \$432 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$434 = \$433 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$435 = \$434 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$436 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$438 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$439 = \$437 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$438 [2]; assign \$440 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$441 = \$439 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$440 [3]; assign \$442 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$443 = \$441 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$442 [5]; assign \$444 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$445 = \$443 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$444 [9]; assign \$446 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$447 = \$445 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$446 [13]; assign \$448 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$449 = \$447 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$448 [14]; assign \$450 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$451 = \$449 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$450 [16]; assign \$452 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$453 = \$451 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$452 [19]; assign \$454 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$455 = \$453 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$454 [26]; assign \$456 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$457 = \$455 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$456 [28]; assign \$458 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$459 = \$457 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$458 [29]; assign \$460 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$461 = \$459 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$460 [31]; assign \$462 = \$461 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$463 = \$462 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$464 = \$463 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$465 = \$464 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$466 = \$465 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$467 = \$466 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$468 = \$467 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$469 = \$468 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$470 = \$469 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$471 = \$470 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$472 = \$471 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$473 = \$472 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$474 = \$473 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$475 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$477 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$478 = \$476 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$477 [1]; assign \$479 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$480 = \$478 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$479 [3]; assign \$481 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$482 = \$480 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$481 [4]; assign \$483 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$484 = \$482 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$483 [9]; assign \$485 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$486 = \$484 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$485 [12]; assign \$487 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$488 = \$486 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$487 [14]; assign \$489 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$490 = \$488 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$489 [15]; assign \$491 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$492 = \$490 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$491 [16]; assign \$493 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$494 = \$492 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$493 [17]; assign \$495 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$496 = \$494 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$495 [20]; assign \$497 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$498 = \$496 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$497 [24]; assign \$499 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$500 = \$498 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$499 [25]; assign \$501 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$502 = \$500 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$501 [26]; assign \$503 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$504 = \$502 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$503 [27]; assign \$505 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$506 = \$504 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$505 [28]; assign \$507 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$508 = \$506 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$507 [31]; assign \$509 = \$508 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$510 = \$509 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$511 = \$510 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$512 = \$511 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$513 = \$512 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$514 = \$513 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$515 = \$514 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$516 = \$515 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$517 = \$516 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$518 = \$517 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$519 = \$518 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$520 = \$519 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$521 = \$520 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$522 = \$521 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$523 = \$522 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$524 = \$523 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$525 = \$524 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$526 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$528 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$529 = \$527 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$528 [1]; assign \$530 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$531 = \$529 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$530 [2]; assign \$532 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$533 = \$531 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$532 [4]; assign \$534 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$535 = \$533 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$534 [5]; assign \$536 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$537 = \$535 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$536 [6]; assign \$538 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$539 = \$537 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$538 [9]; assign \$540 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$541 = \$539 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$540 [12]; assign \$542 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$543 = \$541 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$542 [13]; assign \$544 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$545 = \$543 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$544 [15]; assign \$546 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$547 = \$545 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$546 [17]; assign \$548 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$549 = \$547 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$548 [18]; assign \$550 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$551 = \$549 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$550 [21]; assign \$552 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$553 = \$551 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$552 [24]; assign \$554 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$555 = \$553 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$554 [27]; assign \$556 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$557 = \$555 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$556 [30]; assign \$558 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$559 = \$557 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$558 [31]; assign \$560 = \$559 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$561 = \$560 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$562 = \$561 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$563 = \$562 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$564 = \$563 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$565 = \$564 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$566 = \$565 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$567 = \$566 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$568 = \$567 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$569 = \$568 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$570 = \$569 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$571 = \$570 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$572 = \$571 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$573 = \$572 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$574 = \$573 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$575 = \$574 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$576 = \$575 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$577 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$579 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$580 = \$578 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$579 [2]; assign \$581 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$582 = \$580 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$581 [3]; assign \$583 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$584 = \$582 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$583 [5]; assign \$585 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$586 = \$584 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$585 [6]; assign \$587 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$588 = \$586 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$587 [7]; assign \$589 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$590 = \$588 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$589 [10]; assign \$591 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$592 = \$590 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$591 [13]; assign \$593 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$594 = \$592 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$593 [14]; assign \$595 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$596 = \$594 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$595 [16]; assign \$597 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$598 = \$596 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$597 [18]; assign \$599 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$600 = \$598 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$599 [19]; assign \$601 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$602 = \$600 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$601 [22]; assign \$603 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$604 = \$602 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$603 [25]; assign \$605 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$606 = \$604 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$605 [28]; assign \$607 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$608 = \$606 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$607 [31]; assign \$609 = \$608 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$610 = \$609 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$611 = \$610 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$612 = \$611 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$613 = \$612 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$614 = \$613 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$615 = \$614 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$616 = \$615 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$617 = \$616 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$618 = \$617 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$619 = \$618 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$620 = \$619 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$621 = \$620 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$622 = \$621 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$623 = \$622 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$624 = \$623 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$625 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$627 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$628 = \$626 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$627 [3]; assign \$629 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$630 = \$628 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$629 [4]; assign \$631 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$632 = \$630 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$631 [6]; assign \$633 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$634 = \$632 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$633 [7]; assign \$635 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$636 = \$634 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$635 [8]; assign \$637 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$638 = \$636 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$637 [11]; assign \$639 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$640 = \$638 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$639 [14]; assign \$641 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$642 = \$640 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$641 [15]; assign \$643 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$644 = \$642 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$643 [17]; assign \$645 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$646 = \$644 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$645 [19]; assign \$647 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$648 = \$646 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$647 [20]; assign \$649 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$650 = \$648 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$649 [23]; assign \$651 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$652 = \$650 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$651 [26]; assign \$653 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$654 = \$652 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$653 [29]; assign \$655 = \$654 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$656 = \$655 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$657 = \$656 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$658 = \$657 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$659 = \$658 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$660 = \$659 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$661 = \$660 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$662 = \$661 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$663 = \$662 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$664 = \$663 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$665 = \$664 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$666 = \$665 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$667 = \$666 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$668 = \$667 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$669 = \$668 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$670 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$672 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$673 = \$671 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$672 [4]; assign \$674 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$675 = \$673 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$674 [5]; assign \$676 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$677 = \$675 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$676 [7]; assign \$678 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$679 = \$677 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$678 [8]; assign \$680 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$681 = \$679 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$680 [9]; assign \$682 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$683 = \$681 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$682 [12]; assign \$684 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$685 = \$683 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$684 [15]; assign \$686 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$687 = \$685 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$686 [16]; assign \$688 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$689 = \$687 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$688 [18]; assign \$690 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$691 = \$689 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$690 [20]; assign \$692 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$693 = \$691 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$692 [21]; assign \$694 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$695 = \$693 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$694 [24]; assign \$696 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$697 = \$695 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$696 [27]; assign \$698 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$699 = \$697 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$698 [30]; assign \$700 = \$699 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$701 = \$700 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$702 = \$701 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$703 = \$702 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$704 = \$703 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$705 = \$704 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$706 = \$705 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$707 = \$706 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$708 = \$707 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$709 = \$708 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$710 = \$709 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$711 = \$710 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$712 = \$711 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$713 = \$712 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$714 = \$713 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$715 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$717 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$718 = \$716 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$717 [4]; assign \$719 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$720 = \$718 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$719 [5]; assign \$721 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$722 = \$720 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$721 [8]; assign \$723 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$724 = \$722 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$723 [12]; assign \$725 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$726 = \$724 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$725 [13]; assign \$727 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$728 = \$726 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$727 [17]; assign \$729 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$730 = \$728 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$729 [19]; assign \$731 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$732 = \$730 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$731 [21]; assign \$733 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$734 = \$732 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$733 [22]; assign \$735 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$736 = \$734 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$735 [24]; assign \$737 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$738 = \$736 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$737 [26]; assign \$739 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$740 = \$738 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$739 [29]; assign \$741 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$742 = \$740 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$741 [30]; assign \$743 = \$742 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$744 = \$743 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$745 = \$744 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$746 = \$745 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$747 = \$746 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$748 = \$747 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$749 = \$748 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$750 = \$749 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$751 = \$750 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$752 = \$751 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$753 = \$752 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$754 = \$753 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$755 = \$754 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$756 = \$755 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$757 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$759 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$760 = \$758 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$759 [5]; assign \$761 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$762 = \$760 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$761 [6]; assign \$763 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$764 = \$762 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$763 [9]; assign \$765 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$766 = \$764 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$765 [13]; assign \$767 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$768 = \$766 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$767 [14]; assign \$769 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$770 = \$768 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$769 [18]; assign \$771 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$772 = \$770 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$771 [20]; assign \$773 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$774 = \$772 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$773 [22]; assign \$775 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$776 = \$774 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$775 [23]; assign \$777 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$778 = \$776 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$777 [25]; assign \$779 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$780 = \$778 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$779 [27]; assign \$781 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$782 = \$780 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$781 [30]; assign \$783 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$784 = \$782 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$783 [31]; assign \$785 = \$784 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$786 = \$785 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$787 = \$786 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$788 = \$787 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$789 = \$788 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$790 = \$789 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$791 = \$790 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$792 = \$791 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$793 = \$792 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$794 = \$793 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$795 = \$794 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$796 = \$795 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$797 = \$796 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$798 = \$797 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$799 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$801 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$802 = \$800 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$801 [6]; assign \$803 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$804 = \$802 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$803 [7]; assign \$805 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$806 = \$804 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$805 [10]; assign \$807 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$808 = \$806 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$807 [14]; assign \$809 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$810 = \$808 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$809 [15]; assign \$811 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$812 = \$810 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$811 [19]; assign \$813 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$814 = \$812 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$813 [21]; assign \$815 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$816 = \$814 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$815 [23]; assign \$817 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$818 = \$816 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$817 [24]; assign \$819 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$820 = \$818 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$819 [26]; assign \$821 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$822 = \$820 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$821 [28]; assign \$823 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$824 = \$822 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$823 [31]; assign \$825 = \$824 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$826 = \$825 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$827 = \$826 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$828 = \$827 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$829 = \$828 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$830 = \$829 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$831 = \$830 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$832 = \$831 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$833 = \$832 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$834 = \$833 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$835 = \$834 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$836 = \$835 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$837 = \$836 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$838 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$840 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$841 = \$839 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$840 [7]; assign \$842 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$843 = \$841 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$842 [8]; assign \$844 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$845 = \$843 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$844 [11]; assign \$846 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$847 = \$845 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$846 [15]; assign \$848 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$849 = \$847 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$848 [16]; assign \$850 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$851 = \$849 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$850 [20]; assign \$852 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$853 = \$851 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$852 [22]; assign \$854 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$855 = \$853 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$854 [24]; assign \$856 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$857 = \$855 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$856 [25]; assign \$858 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$859 = \$857 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$858 [27]; assign \$860 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$861 = \$859 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$860 [29]; assign \$862 = \$861 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$863 = \$862 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$864 = \$863 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$865 = \$864 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$866 = \$865 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$867 = \$866 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$868 = \$867 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$869 = \$868 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$870 = \$869 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$871 = \$870 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$872 = \$871 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$873 = \$872 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$874 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$876 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$877 = \$875 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$876 [8]; assign \$878 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$879 = \$877 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$878 [9]; assign \$880 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$881 = \$879 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$880 [12]; assign \$882 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$883 = \$881 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$882 [16]; assign \$884 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$885 = \$883 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$884 [17]; assign \$886 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$887 = \$885 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$886 [21]; assign \$888 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$889 = \$887 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$888 [23]; assign \$890 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$891 = \$889 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$890 [25]; assign \$892 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$893 = \$891 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$892 [26]; assign \$894 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$895 = \$893 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$894 [28]; assign \$896 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$897 = \$895 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$896 [30]; assign \$898 = \$897 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$899 = \$898 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$900 = \$899 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$901 = \$900 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$902 = \$901 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$903 = \$902 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$904 = \$903 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$905 = \$904 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$906 = \$905 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$907 = \$906 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$908 = \$907 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$909 = \$908 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$910 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$912 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$913 = \$911 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$912 [9]; assign \$914 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$915 = \$913 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$914 [10]; assign \$916 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$917 = \$915 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$916 [13]; assign \$918 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$919 = \$917 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$918 [17]; assign \$920 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$921 = \$919 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$920 [18]; assign \$922 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$923 = \$921 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$922 [22]; assign \$924 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$925 = \$923 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$924 [24]; assign \$926 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$927 = \$925 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$926 [26]; assign \$928 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$929 = \$927 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$928 [27]; assign \$930 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$931 = \$929 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$930 [29]; assign \$932 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$933 = \$931 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$932 [31]; assign \$934 = \$933 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$935 = \$934 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$936 = \$935 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$937 = \$936 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$938 = \$937 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$939 = \$938 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$940 = \$939 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$941 = \$940 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$942 = \$941 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$943 = \$942 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$944 = \$943 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$945 = \$944 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$946 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$948 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$949 = \$947 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$948 [9]; assign \$950 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$951 = \$949 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$950 [11]; assign \$952 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$953 = \$951 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$952 [12]; assign \$954 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$955 = \$953 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$954 [14]; assign \$956 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$957 = \$955 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$956 [16]; assign \$958 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$959 = \$957 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$958 [18]; assign \$960 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$961 = \$959 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$960 [19]; assign \$962 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$963 = \$961 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$962 [23]; assign \$964 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$965 = \$963 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$964 [24]; assign \$966 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$967 = \$965 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$966 [26]; assign \$968 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$969 = \$967 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$968 [27]; assign \$970 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$971 = \$969 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$970 [29]; assign \$972 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$973 = \$971 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$972 [31]; assign \$974 = \$973 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$975 = \$974 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$976 = \$975 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$977 = \$976 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$978 = \$977 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$979 = \$978 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$980 = \$979 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$981 = \$980 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$982 = \$981 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$983 = \$982 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$984 = \$983 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$985 = \$984 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$986 = \$985 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$987 = \$986 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$988 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$990 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$991 = \$989 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$990 [1]; assign \$992 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$993 = \$991 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$992 [6]; assign \$994 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$995 = \$993 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$994 [9]; assign \$996 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$997 = \$995 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$996 [13]; assign \$998 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$999 = \$997 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$998 [15]; assign \$1000 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1001 = \$999 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1000 [16]; assign \$1002 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1003 = \$1001 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1002 [17]; assign \$1004 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1005 = \$1003 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1004 [19]; assign \$1006 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1007 = \$1005 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1006 [20]; assign \$1008 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1009 = \$1007 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1008 [26]; assign \$1010 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1011 = \$1009 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1010 [27]; assign \$1012 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1013 = \$1011 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1012 [29]; assign \$1014 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1015 = \$1013 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1014 [31]; assign \$1016 = \$1015 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1017 = \$1016 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1018 = \$1017 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1019 = \$1018 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1020 = \$1019 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1021 = \$1020 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1022 = \$1021 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1023 = \$1022 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1024 = \$1023 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1025 = \$1024 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1026 = \$1025 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1027 = \$1026 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1028 = \$1027 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1029 = \$1028 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1030 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1032 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1033 = \$1031 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1032 [2]; assign \$1034 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1035 = \$1033 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1034 [7]; assign \$1036 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1037 = \$1035 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1036 [10]; assign \$1038 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1039 = \$1037 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1038 [14]; assign \$1040 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1041 = \$1039 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1040 [16]; assign \$1042 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1043 = \$1041 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1042 [17]; assign \$1044 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1045 = \$1043 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1044 [18]; assign \$1046 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1047 = \$1045 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1046 [20]; assign \$1048 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1049 = \$1047 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1048 [21]; assign \$1050 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1051 = \$1049 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1050 [27]; assign \$1052 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1053 = \$1051 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1052 [28]; assign \$1054 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1055 = \$1053 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1054 [30]; assign \$1056 = \$1055 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1057 = \$1056 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1058 = \$1057 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1059 = \$1058 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1060 = \$1059 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1061 = \$1060 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1062 = \$1061 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1063 = \$1062 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1064 = \$1063 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1065 = \$1064 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1066 = \$1065 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1067 = \$1066 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1068 = \$1067 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1069 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1071 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1072 = \$1070 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1071 [3]; assign \$1073 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1074 = \$1072 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1073 [8]; assign \$1075 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1076 = \$1074 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1075 [11]; assign \$1077 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1078 = \$1076 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1077 [15]; assign \$1079 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1080 = \$1078 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1079 [17]; assign \$1081 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1082 = \$1080 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1081 [18]; assign \$1083 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1084 = \$1082 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1083 [19]; assign \$1085 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1086 = \$1084 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1085 [21]; assign \$1087 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1088 = \$1086 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1087 [22]; assign \$1089 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1090 = \$1088 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1089 [28]; assign \$1091 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1092 = \$1090 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1091 [29]; assign \$1093 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1094 = \$1092 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1093 [31]; assign \$1095 = \$1094 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1096 = \$1095 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1097 = \$1096 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1098 = \$1097 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1099 = \$1098 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1100 = \$1099 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1101 = \$1100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1102 = \$1101 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1103 = \$1102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1104 = \$1103 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1105 = \$1104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1106 = \$1105 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1107 = \$1106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1108 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1110 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1111 = \$1109 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1110 [3]; assign \$1112 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1113 = \$1111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1112 [4]; assign \$1114 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1115 = \$1113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1114 [6]; assign \$1116 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1117 = \$1115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1116 [10]; assign \$1118 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1119 = \$1117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1118 [18]; assign \$1120 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1121 = \$1119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1120 [19]; assign \$1122 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1123 = \$1121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1122 [20]; assign \$1124 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1125 = \$1123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1124 [22]; assign \$1126 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1127 = \$1125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1126 [23]; assign \$1128 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1129 = \$1127 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1128 [24]; assign \$1130 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1131 = \$1129 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1130 [25]; assign \$1132 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1133 = \$1131 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1132 [26]; assign \$1134 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1135 = \$1133 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1134 [28]; assign \$1136 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1137 = \$1135 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1136 [31]; assign \$1138 = \$1137 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1139 = \$1138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1140 = \$1139 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1141 = \$1140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1142 = \$1141 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1143 = \$1142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1144 = \$1143 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1145 = \$1144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1146 = \$1145 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1147 = \$1146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1148 = \$1147 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1149 = \$1148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1150 = \$1149 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1151 = \$1150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1152 = \$1151 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1156 = \$1154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1155 [4]; assign \$1157 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1158 = \$1156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1157 [5]; assign \$1159 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1160 = \$1158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1159 [7]; assign \$1161 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1162 = \$1160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1161 [11]; assign \$1163 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1164 = \$1162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1163 [19]; assign \$1165 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1166 = \$1164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1165 [20]; assign \$1167 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1168 = \$1166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1167 [21]; assign \$1169 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1170 = \$1168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1169 [23]; assign \$1171 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1172 = \$1170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1171 [24]; assign \$1173 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1174 = \$1172 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1173 [25]; assign \$1175 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1176 = \$1174 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1175 [26]; assign \$1177 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1178 = \$1176 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1177 [27]; assign \$1179 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1180 = \$1178 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1179 [29]; assign \$1181 = \$1180 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1182 = \$1181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1183 = \$1182 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1184 = \$1183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1185 = \$1184 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1186 = \$1185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1187 = \$1186 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1188 = \$1187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1189 = \$1188 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1190 = \$1189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1191 = \$1190 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1192 = \$1191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1193 = \$1192 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1194 = \$1193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1195 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1197 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1198 = \$1196 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1197 [5]; assign \$1199 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1200 = \$1198 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1199 [6]; assign \$1201 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1202 = \$1200 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1201 [8]; assign \$1203 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1204 = \$1202 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1203 [12]; assign \$1205 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1206 = \$1204 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1205 [20]; assign \$1207 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1208 = \$1206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1207 [21]; assign \$1209 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1210 = \$1208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1209 [22]; assign \$1211 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1212 = \$1210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1211 [24]; assign \$1213 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1214 = \$1212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1213 [25]; assign \$1215 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1216 = \$1214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1215 [26]; assign \$1217 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1218 = \$1216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1217 [27]; assign \$1219 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1220 = \$1218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1219 [28]; assign \$1221 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1222 = \$1220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1221 [30]; assign \$1223 = \$1222 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1224 = \$1223 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1225 = \$1224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1226 = \$1225 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1227 = \$1226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$1228 = \$1227 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1229 = \$1228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1230 = \$1229 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1231 = \$1230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1232 = \$1231 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1233 = \$1232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1234 = \$1233 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1235 = \$1234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1236 = \$1235 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1240 = \$1238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1239 [6]; assign \$1241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1242 = \$1240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1241 [7]; assign \$1243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1244 = \$1242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1243 [9]; assign \$1245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1246 = \$1244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1245 [13]; assign \$1247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1248 = \$1246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1247 [21]; assign \$1249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1250 = \$1248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1249 [22]; assign \$1251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1252 = \$1250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1251 [23]; assign \$1253 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1254 = \$1252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1253 [25]; assign \$1255 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1256 = \$1254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1255 [26]; assign \$1257 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1258 = \$1256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1257 [27]; assign \$1259 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1260 = \$1258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1259 [28]; assign \$1261 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1262 = \$1260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1261 [29]; assign \$1263 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1264 = \$1262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1263 [31]; assign \$1265 = \$1264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1266 = \$1265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1267 = \$1266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1268 = \$1267 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1269 = \$1268 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1270 = \$1269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1271 = \$1270 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1272 = \$1271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1273 = \$1272 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1274 = \$1273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1275 = \$1274 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1276 = \$1275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1277 = \$1276 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1278 = \$1277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1279 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1281 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1282 = \$1280 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1281 [7]; assign \$1283 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1284 = \$1282 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1283 [8]; assign \$1285 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1286 = \$1284 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1285 [10]; assign \$1287 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1288 = \$1286 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1287 [14]; assign \$1289 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1290 = \$1288 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1289 [22]; assign \$1291 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1292 = \$1290 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1291 [23]; assign \$1293 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1294 = \$1292 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1293 [24]; assign \$1295 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1296 = \$1294 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1295 [26]; assign \$1297 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1298 = \$1296 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1297 [27]; assign \$1299 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1300 = \$1298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1299 [28]; assign \$1301 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1302 = \$1300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1301 [29]; assign \$1303 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1304 = \$1302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1303 [30]; assign \$1305 = \$1304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1306 = \$1305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1307 = \$1306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1308 = \$1307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1309 = \$1308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1310 = \$1309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1311 = \$1310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1312 = \$1311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1313 = \$1312 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1314 = \$1313 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1315 = \$1314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1316 = \$1315 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1317 = \$1316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1318 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1320 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1321 = \$1319 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1320 [8]; assign \$1322 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1323 = \$1321 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1322 [9]; assign \$1324 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1325 = \$1323 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1324 [11]; assign \$1326 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1327 = \$1325 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1326 [15]; assign \$1328 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1329 = \$1327 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1328 [23]; assign \$1330 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1331 = \$1329 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1330 [24]; assign \$1332 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1333 = \$1331 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1332 [25]; assign \$1334 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1335 = \$1333 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1334 [27]; assign \$1336 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1337 = \$1335 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1336 [28]; assign \$1338 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1339 = \$1337 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1338 [29]; assign \$1340 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1341 = \$1339 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1340 [30]; assign \$1342 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1343 = \$1341 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1342 [31]; assign \$1344 = \$1343 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1345 = \$1344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1346 = \$1345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1347 = \$1346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1348 = \$1347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1349 = \$1348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1350 = \$1349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1351 = \$1350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1352 = \$1351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1353 = \$1352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1354 = \$1353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1355 = \$1354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1356 = \$1355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_reg <= 32'd4294967295; else crc_reg <= \$1357 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$31 ) begin end \$1357 = crc_reg; if (valid) begin \$1357 [0] = \$39 ; \$1357 [1] = \$78 ; \$1357 [2] = \$126 ; \$1357 [3] = \$171 ; \$1357 [4] = \$222 ; \$1357 [5] = \$267 ; \$1357 [6] = \$312 ; \$1357 [7] = \$360 ; \$1357 [8] = \$399 ; \$1357 [9] = \$435 ; \$1357 [10] = \$474 ; \$1357 [11] = \$525 ; \$1357 [12] = \$576 ; \$1357 [13] = \$624 ; \$1357 [14] = \$669 ; \$1357 [15] = \$714 ; \$1357 [16] = \$756 ; \$1357 [17] = \$798 ; \$1357 [18] = \$837 ; \$1357 [19] = \$873 ; \$1357 [20] = \$909 ; \$1357 [21] = \$945 ; \$1357 [22] = \$987 ; \$1357 [23] = \$1029 ; \$1357 [24] = \$1068 ; \$1357 [25] = \$1107 ; \$1357 [26] = \$1152 ; \$1357 [27] = \$1194 ; \$1357 [28] = \$1236 ; \$1357 [29] = \$1278 ; \$1357 [30] = \$1317 ; \$1357 [31] = \$1356 ; end else if (start) begin \$1357 = 32'd4294967295; end end assign data = data_in; assign crc = crc_reg; assign \$2 = \$1 [0]; assign \$41 = \$40 [0]; assign \$80 = \$79 [0]; assign \$128 = \$127 [1]; assign \$173 = \$172 [0]; assign \$224 = \$223 [0]; assign \$269 = \$268 [1]; assign \$314 = \$313 [0]; assign \$362 = \$361 [0]; assign \$401 = \$400 [1]; assign \$437 = \$436 [0]; assign \$476 = \$475 [0]; assign \$527 = \$526 [0]; assign \$578 = \$577 [1]; assign \$626 = \$625 [2]; assign \$671 = \$670 [3]; assign \$716 = \$715 [0]; assign \$758 = \$757 [1]; assign \$800 = \$799 [2]; assign \$839 = \$838 [3]; assign \$875 = \$874 [4]; assign \$911 = \$910 [5]; assign \$947 = \$946 [0]; assign \$989 = \$988 [0]; assign \$1031 = \$1030 [1]; assign \$1070 = \$1069 [2]; assign \$1109 = \$1108 [0]; assign \$1154 = \$1153 [1]; assign \$1196 = \$1195 [2]; assign \$1238 = \$1237 [3]; assign \$1280 = \$1279 [4]; assign \$1319 = \$1318 [5]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_D.drive_serial_port.crc32_tx (sync_100_rst, crc, valid, start, data_in, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$32 = 0; wire [31:0] \$1 ; wire \$10 ; wire \$100 ; wire [31:0] \$1000 ; wire \$1001 ; wire [31:0] \$1002 ; wire \$1003 ; wire [31:0] \$1004 ; wire \$1005 ; wire [31:0] \$1006 ; wire \$1007 ; wire [31:0] \$1008 ; wire \$1009 ; wire [31:0] \$101 ; wire [31:0] \$1010 ; wire \$1011 ; wire [31:0] \$1012 ; wire \$1013 ; wire [31:0] \$1014 ; wire \$1015 ; wire \$1016 ; wire \$1017 ; wire \$1018 ; wire \$1019 ; wire \$102 ; wire \$1020 ; wire \$1021 ; wire \$1022 ; wire \$1023 ; wire \$1024 ; wire \$1025 ; wire \$1026 ; wire \$1027 ; wire \$1028 ; wire \$1029 ; wire [31:0] \$103 ; wire [31:0] \$1030 ; wire \$1031 ; wire [31:0] \$1032 ; wire \$1033 ; wire [31:0] \$1034 ; wire \$1035 ; wire [31:0] \$1036 ; wire \$1037 ; wire [31:0] \$1038 ; wire \$1039 ; wire \$104 ; wire [31:0] \$1040 ; wire \$1041 ; wire [31:0] \$1042 ; wire \$1043 ; wire [31:0] \$1044 ; wire \$1045 ; wire [31:0] \$1046 ; wire \$1047 ; wire [31:0] \$1048 ; wire \$1049 ; wire [31:0] \$105 ; wire [31:0] \$1050 ; wire \$1051 ; wire [31:0] \$1052 ; wire \$1053 ; wire [31:0] \$1054 ; wire \$1055 ; wire \$1056 ; wire \$1057 ; wire \$1058 ; wire \$1059 ; wire \$106 ; wire \$1060 ; wire \$1061 ; wire \$1062 ; wire \$1063 ; wire \$1064 ; wire \$1065 ; wire \$1066 ; wire \$1067 ; wire \$1068 ; wire [31:0] \$1069 ; wire [31:0] \$107 ; wire \$1070 ; wire [31:0] \$1071 ; wire \$1072 ; wire [31:0] \$1073 ; wire \$1074 ; wire [31:0] \$1075 ; wire \$1076 ; wire [31:0] \$1077 ; wire \$1078 ; wire [31:0] \$1079 ; wire \$108 ; wire \$1080 ; wire [31:0] \$1081 ; wire \$1082 ; wire [31:0] \$1083 ; wire \$1084 ; wire [31:0] \$1085 ; wire \$1086 ; wire [31:0] \$1087 ; wire \$1088 ; wire [31:0] \$1089 ; wire [31:0] \$109 ; wire \$1090 ; wire [31:0] \$1091 ; wire \$1092 ; wire [31:0] \$1093 ; wire \$1094 ; wire \$1095 ; wire \$1096 ; wire \$1097 ; wire \$1098 ; wire \$1099 ; wire [31:0] \$11 ; wire \$110 ; wire \$1100 ; wire \$1101 ; wire \$1102 ; wire \$1103 ; wire \$1104 ; wire \$1105 ; wire \$1106 ; wire \$1107 ; wire [31:0] \$1108 ; wire \$1109 ; wire \$111 ; wire [31:0] \$1110 ; wire \$1111 ; wire [31:0] \$1112 ; wire \$1113 ; wire [31:0] \$1114 ; wire \$1115 ; wire [31:0] \$1116 ; wire \$1117 ; wire [31:0] \$1118 ; wire \$1119 ; wire \$112 ; wire [31:0] \$1120 ; wire \$1121 ; wire [31:0] \$1122 ; wire \$1123 ; wire [31:0] \$1124 ; wire \$1125 ; wire [31:0] \$1126 ; wire \$1127 ; wire [31:0] \$1128 ; wire \$1129 ; wire \$113 ; wire [31:0] \$1130 ; wire \$1131 ; wire [31:0] \$1132 ; wire \$1133 ; wire [31:0] \$1134 ; wire \$1135 ; wire [31:0] \$1136 ; wire \$1137 ; wire \$1138 ; wire \$1139 ; wire \$114 ; wire \$1140 ; wire \$1141 ; wire \$1142 ; wire \$1143 ; wire \$1144 ; wire \$1145 ; wire \$1146 ; wire \$1147 ; wire \$1148 ; wire \$1149 ; wire \$115 ; wire \$1150 ; wire \$1151 ; wire \$1152 ; wire [31:0] \$1153 ; wire \$1154 ; wire [31:0] \$1155 ; wire \$1156 ; wire [31:0] \$1157 ; wire \$1158 ; wire [31:0] \$1159 ; wire \$116 ; wire \$1160 ; wire [31:0] \$1161 ; wire \$1162 ; wire [31:0] \$1163 ; wire \$1164 ; wire [31:0] \$1165 ; wire \$1166 ; wire [31:0] \$1167 ; wire \$1168 ; wire [31:0] \$1169 ; wire \$117 ; wire \$1170 ; wire [31:0] \$1171 ; wire \$1172 ; wire [31:0] \$1173 ; wire \$1174 ; wire [31:0] \$1175 ; wire \$1176 ; wire [31:0] \$1177 ; wire \$1178 ; wire [31:0] \$1179 ; wire \$118 ; wire \$1180 ; wire \$1181 ; wire \$1182 ; wire \$1183 ; wire \$1184 ; wire \$1185 ; wire \$1186 ; wire \$1187 ; wire \$1188 ; wire \$1189 ; wire \$119 ; wire \$1190 ; wire \$1191 ; wire \$1192 ; wire \$1193 ; wire \$1194 ; wire [31:0] \$1195 ; wire \$1196 ; wire [31:0] \$1197 ; wire \$1198 ; wire [31:0] \$1199 ; wire \$12 ; wire \$120 ; wire \$1200 ; wire [31:0] \$1201 ; wire \$1202 ; wire [31:0] \$1203 ; wire \$1204 ; wire [31:0] \$1205 ; wire \$1206 ; wire [31:0] \$1207 ; wire \$1208 ; wire [31:0] \$1209 ; wire \$121 ; wire \$1210 ; wire [31:0] \$1211 ; wire \$1212 ; wire [31:0] \$1213 ; wire \$1214 ; wire [31:0] \$1215 ; wire \$1216 ; wire [31:0] \$1217 ; wire \$1218 ; wire [31:0] \$1219 ; wire \$122 ; wire \$1220 ; wire [31:0] \$1221 ; wire \$1222 ; wire \$1223 ; wire \$1224 ; wire \$1225 ; wire \$1226 ; wire \$1227 ; wire \$1228 ; wire \$1229 ; wire \$123 ; wire \$1230 ; wire \$1231 ; wire \$1232 ; wire \$1233 ; wire \$1234 ; wire \$1235 ; wire \$1236 ; wire [31:0] \$1237 ; wire \$1238 ; wire [31:0] \$1239 ; wire \$124 ; wire \$1240 ; wire [31:0] \$1241 ; wire \$1242 ; wire [31:0] \$1243 ; wire \$1244 ; wire [31:0] \$1245 ; wire \$1246 ; wire [31:0] \$1247 ; wire \$1248 ; wire [31:0] \$1249 ; wire \$125 ; wire \$1250 ; wire [31:0] \$1251 ; wire \$1252 ; wire [31:0] \$1253 ; wire \$1254 ; wire [31:0] \$1255 ; wire \$1256 ; wire [31:0] \$1257 ; wire \$1258 ; wire [31:0] \$1259 ; wire \$126 ; wire \$1260 ; wire [31:0] \$1261 ; wire \$1262 ; wire [31:0] \$1263 ; wire \$1264 ; wire \$1265 ; wire \$1266 ; wire \$1267 ; wire \$1268 ; wire \$1269 ; wire [31:0] \$127 ; wire \$1270 ; wire \$1271 ; wire \$1272 ; wire \$1273 ; wire \$1274 ; wire \$1275 ; wire \$1276 ; wire \$1277 ; wire \$1278 ; wire [31:0] \$1279 ; wire \$128 ; wire \$1280 ; wire [31:0] \$1281 ; wire \$1282 ; wire [31:0] \$1283 ; wire \$1284 ; wire [31:0] \$1285 ; wire \$1286 ; wire [31:0] \$1287 ; wire \$1288 ; wire [31:0] \$1289 ; wire [31:0] \$129 ; wire \$1290 ; wire [31:0] \$1291 ; wire \$1292 ; wire [31:0] \$1293 ; wire \$1294 ; wire [31:0] \$1295 ; wire \$1296 ; wire [31:0] \$1297 ; wire \$1298 ; wire [31:0] \$1299 ; wire [31:0] \$13 ; wire \$130 ; wire \$1300 ; wire [31:0] \$1301 ; wire \$1302 ; wire [31:0] \$1303 ; wire \$1304 ; wire \$1305 ; wire \$1306 ; wire \$1307 ; wire \$1308 ; wire \$1309 ; wire [31:0] \$131 ; wire \$1310 ; wire \$1311 ; wire \$1312 ; wire \$1313 ; wire \$1314 ; wire \$1315 ; wire \$1316 ; wire \$1317 ; wire [31:0] \$1318 ; wire \$1319 ; wire \$132 ; wire [31:0] \$1320 ; wire \$1321 ; wire [31:0] \$1322 ; wire \$1323 ; wire [31:0] \$1324 ; wire \$1325 ; wire [31:0] \$1326 ; wire \$1327 ; wire [31:0] \$1328 ; wire \$1329 ; wire [31:0] \$133 ; wire [31:0] \$1330 ; wire \$1331 ; wire [31:0] \$1332 ; wire \$1333 ; wire [31:0] \$1334 ; wire \$1335 ; wire [31:0] \$1336 ; wire \$1337 ; wire [31:0] \$1338 ; wire \$1339 ; wire \$134 ; wire [31:0] \$1340 ; wire \$1341 ; wire [31:0] \$1342 ; wire \$1343 ; wire \$1344 ; wire \$1345 ; wire \$1346 ; wire \$1347 ; wire \$1348 ; wire \$1349 ; wire [31:0] \$135 ; wire \$1350 ; wire \$1351 ; wire \$1352 ; wire \$1353 ; wire \$1354 ; wire \$1355 ; wire \$1356 ; reg [31:0] \$1357 ; wire \$136 ; wire [31:0] \$137 ; wire \$138 ; wire [31:0] \$139 ; wire \$14 ; wire \$140 ; wire [31:0] \$141 ; wire \$142 ; wire [31:0] \$143 ; wire \$144 ; wire [31:0] \$145 ; wire \$146 ; wire [31:0] \$147 ; wire \$148 ; wire [31:0] \$149 ; wire [31:0] \$15 ; wire \$150 ; wire [31:0] \$151 ; wire \$152 ; wire [31:0] \$153 ; wire \$154 ; wire [31:0] \$155 ; wire \$156 ; wire \$157 ; wire \$158 ; wire \$159 ; wire \$16 ; wire \$160 ; wire \$161 ; wire \$162 ; wire \$163 ; wire \$164 ; wire \$165 ; wire \$166 ; wire \$167 ; wire \$168 ; wire \$169 ; wire [31:0] \$17 ; wire \$170 ; wire \$171 ; wire [31:0] \$172 ; wire \$173 ; wire [31:0] \$174 ; wire \$175 ; wire [31:0] \$176 ; wire \$177 ; wire [31:0] \$178 ; wire \$179 ; wire \$18 ; wire [31:0] \$180 ; wire \$181 ; wire [31:0] \$182 ; wire \$183 ; wire [31:0] \$184 ; wire \$185 ; wire [31:0] \$186 ; wire \$187 ; wire [31:0] \$188 ; wire \$189 ; wire [31:0] \$19 ; wire [31:0] \$190 ; wire \$191 ; wire [31:0] \$192 ; wire \$193 ; wire [31:0] \$194 ; wire \$195 ; wire [31:0] \$196 ; wire \$197 ; wire [31:0] \$198 ; wire \$199 ; wire \$2 ; wire \$20 ; wire [31:0] \$200 ; wire \$201 ; wire [31:0] \$202 ; wire \$203 ; wire [31:0] \$204 ; wire \$205 ; wire \$206 ; wire \$207 ; wire \$208 ; wire \$209 ; wire [31:0] \$21 ; wire \$210 ; wire \$211 ; wire \$212 ; wire \$213 ; wire \$214 ; wire \$215 ; wire \$216 ; wire \$217 ; wire \$218 ; wire \$219 ; wire \$22 ; wire \$220 ; wire \$221 ; wire \$222 ; wire [31:0] \$223 ; wire \$224 ; wire [31:0] \$225 ; wire \$226 ; wire [31:0] \$227 ; wire \$228 ; wire [31:0] \$229 ; wire [31:0] \$23 ; wire \$230 ; wire [31:0] \$231 ; wire \$232 ; wire [31:0] \$233 ; wire \$234 ; wire [31:0] \$235 ; wire \$236 ; wire [31:0] \$237 ; wire \$238 ; wire [31:0] \$239 ; wire \$24 ; wire \$240 ; wire [31:0] \$241 ; wire \$242 ; wire [31:0] \$243 ; wire \$244 ; wire [31:0] \$245 ; wire \$246 ; wire [31:0] \$247 ; wire \$248 ; wire [31:0] \$249 ; wire [31:0] \$25 ; wire \$250 ; wire [31:0] \$251 ; wire \$252 ; wire \$253 ; wire \$254 ; wire \$255 ; wire \$256 ; wire \$257 ; wire \$258 ; wire \$259 ; wire \$26 ; wire \$260 ; wire \$261 ; wire \$262 ; wire \$263 ; wire \$264 ; wire \$265 ; wire \$266 ; wire \$267 ; wire [31:0] \$268 ; wire \$269 ; wire \$27 ; wire [31:0] \$270 ; wire \$271 ; wire [31:0] \$272 ; wire \$273 ; wire [31:0] \$274 ; wire \$275 ; wire [31:0] \$276 ; wire \$277 ; wire [31:0] \$278 ; wire \$279 ; wire \$28 ; wire [31:0] \$280 ; wire \$281 ; wire [31:0] \$282 ; wire \$283 ; wire [31:0] \$284 ; wire \$285 ; wire [31:0] \$286 ; wire \$287 ; wire [31:0] \$288 ; wire \$289 ; wire \$29 ; wire [31:0] \$290 ; wire \$291 ; wire [31:0] \$292 ; wire \$293 ; wire [31:0] \$294 ; wire \$295 ; wire [31:0] \$296 ; wire \$297 ; wire \$298 ; wire \$299 ; wire [31:0] \$3 ; wire \$30 ; wire \$300 ; wire \$301 ; wire \$302 ; wire \$303 ; wire \$304 ; wire \$305 ; wire \$306 ; wire \$307 ; wire \$308 ; wire \$309 ; wire \$31 ; wire \$310 ; wire \$311 ; wire \$312 ; wire [31:0] \$313 ; wire \$314 ; wire [31:0] \$315 ; wire \$316 ; wire [31:0] \$317 ; wire \$318 ; wire [31:0] \$319 ; wire \$32 ; wire \$320 ; wire [31:0] \$321 ; wire \$322 ; wire [31:0] \$323 ; wire \$324 ; wire [31:0] \$325 ; wire \$326 ; wire [31:0] \$327 ; wire \$328 ; wire [31:0] \$329 ; wire \$33 ; wire \$330 ; wire [31:0] \$331 ; wire \$332 ; wire [31:0] \$333 ; wire \$334 ; wire [31:0] \$335 ; wire \$336 ; wire [31:0] \$337 ; wire \$338 ; wire [31:0] \$339 ; wire \$34 ; wire \$340 ; wire [31:0] \$341 ; wire \$342 ; wire [31:0] \$343 ; wire \$344 ; wire \$345 ; wire \$346 ; wire \$347 ; wire \$348 ; wire \$349 ; wire \$35 ; wire \$350 ; wire \$351 ; wire \$352 ; wire \$353 ; wire \$354 ; wire \$355 ; wire \$356 ; wire \$357 ; wire \$358 ; wire \$359 ; wire \$36 ; wire \$360 ; wire [31:0] \$361 ; wire \$362 ; wire [31:0] \$363 ; wire \$364 ; wire [31:0] \$365 ; wire \$366 ; wire [31:0] \$367 ; wire \$368 ; wire [31:0] \$369 ; wire \$37 ; wire \$370 ; wire [31:0] \$371 ; wire \$372 ; wire [31:0] \$373 ; wire \$374 ; wire [31:0] \$375 ; wire \$376 ; wire [31:0] \$377 ; wire \$378 ; wire [31:0] \$379 ; wire \$38 ; wire \$380 ; wire [31:0] \$381 ; wire \$382 ; wire [31:0] \$383 ; wire \$384 ; wire [31:0] \$385 ; wire \$386 ; wire \$387 ; wire \$388 ; wire \$389 ; wire \$39 ; wire \$390 ; wire \$391 ; wire \$392 ; wire \$393 ; wire \$394 ; wire \$395 ; wire \$396 ; wire \$397 ; wire \$398 ; wire \$399 ; wire \$4 ; wire [31:0] \$40 ; wire [31:0] \$400 ; wire \$401 ; wire [31:0] \$402 ; wire \$403 ; wire [31:0] \$404 ; wire \$405 ; wire [31:0] \$406 ; wire \$407 ; wire [31:0] \$408 ; wire \$409 ; wire \$41 ; wire [31:0] \$410 ; wire \$411 ; wire [31:0] \$412 ; wire \$413 ; wire [31:0] \$414 ; wire \$415 ; wire [31:0] \$416 ; wire \$417 ; wire [31:0] \$418 ; wire \$419 ; wire [31:0] \$42 ; wire [31:0] \$420 ; wire \$421 ; wire [31:0] \$422 ; wire \$423 ; wire \$424 ; wire \$425 ; wire \$426 ; wire \$427 ; wire \$428 ; wire \$429 ; wire \$43 ; wire \$430 ; wire \$431 ; wire \$432 ; wire \$433 ; wire \$434 ; wire \$435 ; wire [31:0] \$436 ; wire \$437 ; wire [31:0] \$438 ; wire \$439 ; wire [31:0] \$44 ; wire [31:0] \$440 ; wire \$441 ; wire [31:0] \$442 ; wire \$443 ; wire [31:0] \$444 ; wire \$445 ; wire [31:0] \$446 ; wire \$447 ; wire [31:0] \$448 ; wire \$449 ; wire \$45 ; wire [31:0] \$450 ; wire \$451 ; wire [31:0] \$452 ; wire \$453 ; wire [31:0] \$454 ; wire \$455 ; wire [31:0] \$456 ; wire \$457 ; wire [31:0] \$458 ; wire \$459 ; wire [31:0] \$46 ; wire [31:0] \$460 ; wire \$461 ; wire \$462 ; wire \$463 ; wire \$464 ; wire \$465 ; wire \$466 ; wire \$467 ; wire \$468 ; wire \$469 ; wire \$47 ; wire \$470 ; wire \$471 ; wire \$472 ; wire \$473 ; wire \$474 ; wire [31:0] \$475 ; wire \$476 ; wire [31:0] \$477 ; wire \$478 ; wire [31:0] \$479 ; wire [31:0] \$48 ; wire \$480 ; wire [31:0] \$481 ; wire \$482 ; wire [31:0] \$483 ; wire \$484 ; wire [31:0] \$485 ; wire \$486 ; wire [31:0] \$487 ; wire \$488 ; wire [31:0] \$489 ; wire \$49 ; wire \$490 ; wire [31:0] \$491 ; wire \$492 ; wire [31:0] \$493 ; wire \$494 ; wire [31:0] \$495 ; wire \$496 ; wire [31:0] \$497 ; wire \$498 ; wire [31:0] \$499 ; wire [31:0] \$5 ; wire [31:0] \$50 ; wire \$500 ; wire [31:0] \$501 ; wire \$502 ; wire [31:0] \$503 ; wire \$504 ; wire [31:0] \$505 ; wire \$506 ; wire [31:0] \$507 ; wire \$508 ; wire \$509 ; wire \$51 ; wire \$510 ; wire \$511 ; wire \$512 ; wire \$513 ; wire \$514 ; wire \$515 ; wire \$516 ; wire \$517 ; wire \$518 ; wire \$519 ; wire [31:0] \$52 ; wire \$520 ; wire \$521 ; wire \$522 ; wire \$523 ; wire \$524 ; wire \$525 ; wire [31:0] \$526 ; wire \$527 ; wire [31:0] \$528 ; wire \$529 ; wire \$53 ; wire [31:0] \$530 ; wire \$531 ; wire [31:0] \$532 ; wire \$533 ; wire [31:0] \$534 ; wire \$535 ; wire [31:0] \$536 ; wire \$537 ; wire [31:0] \$538 ; wire \$539 ; wire [31:0] \$54 ; wire [31:0] \$540 ; wire \$541 ; wire [31:0] \$542 ; wire \$543 ; wire [31:0] \$544 ; wire \$545 ; wire [31:0] \$546 ; wire \$547 ; wire [31:0] \$548 ; wire \$549 ; wire \$55 ; wire [31:0] \$550 ; wire \$551 ; wire [31:0] \$552 ; wire \$553 ; wire [31:0] \$554 ; wire \$555 ; wire [31:0] \$556 ; wire \$557 ; wire [31:0] \$558 ; wire \$559 ; wire [31:0] \$56 ; wire \$560 ; wire \$561 ; wire \$562 ; wire \$563 ; wire \$564 ; wire \$565 ; wire \$566 ; wire \$567 ; wire \$568 ; wire \$569 ; wire \$57 ; wire \$570 ; wire \$571 ; wire \$572 ; wire \$573 ; wire \$574 ; wire \$575 ; wire \$576 ; wire [31:0] \$577 ; wire \$578 ; wire [31:0] \$579 ; wire [31:0] \$58 ; wire \$580 ; wire [31:0] \$581 ; wire \$582 ; wire [31:0] \$583 ; wire \$584 ; wire [31:0] \$585 ; wire \$586 ; wire [31:0] \$587 ; wire \$588 ; wire [31:0] \$589 ; wire \$59 ; wire \$590 ; wire [31:0] \$591 ; wire \$592 ; wire [31:0] \$593 ; wire \$594 ; wire [31:0] \$595 ; wire \$596 ; wire [31:0] \$597 ; wire \$598 ; wire [31:0] \$599 ; wire \$6 ; wire [31:0] \$60 ; wire \$600 ; wire [31:0] \$601 ; wire \$602 ; wire [31:0] \$603 ; wire \$604 ; wire [31:0] \$605 ; wire \$606 ; wire [31:0] \$607 ; wire \$608 ; wire \$609 ; wire \$61 ; wire \$610 ; wire \$611 ; wire \$612 ; wire \$613 ; wire \$614 ; wire \$615 ; wire \$616 ; wire \$617 ; wire \$618 ; wire \$619 ; wire [31:0] \$62 ; wire \$620 ; wire \$621 ; wire \$622 ; wire \$623 ; wire \$624 ; wire [31:0] \$625 ; wire \$626 ; wire [31:0] \$627 ; wire \$628 ; wire [31:0] \$629 ; wire \$63 ; wire \$630 ; wire [31:0] \$631 ; wire \$632 ; wire [31:0] \$633 ; wire \$634 ; wire [31:0] \$635 ; wire \$636 ; wire [31:0] \$637 ; wire \$638 ; wire [31:0] \$639 ; wire [31:0] \$64 ; wire \$640 ; wire [31:0] \$641 ; wire \$642 ; wire [31:0] \$643 ; wire \$644 ; wire [31:0] \$645 ; wire \$646 ; wire [31:0] \$647 ; wire \$648 ; wire [31:0] \$649 ; wire \$65 ; wire \$650 ; wire [31:0] \$651 ; wire \$652 ; wire [31:0] \$653 ; wire \$654 ; wire \$655 ; wire \$656 ; wire \$657 ; wire \$658 ; wire \$659 ; wire \$66 ; wire \$660 ; wire \$661 ; wire \$662 ; wire \$663 ; wire \$664 ; wire \$665 ; wire \$666 ; wire \$667 ; wire \$668 ; wire \$669 ; wire \$67 ; wire [31:0] \$670 ; wire \$671 ; wire [31:0] \$672 ; wire \$673 ; wire [31:0] \$674 ; wire \$675 ; wire [31:0] \$676 ; wire \$677 ; wire [31:0] \$678 ; wire \$679 ; wire \$68 ; wire [31:0] \$680 ; wire \$681 ; wire [31:0] \$682 ; wire \$683 ; wire [31:0] \$684 ; wire \$685 ; wire [31:0] \$686 ; wire \$687 ; wire [31:0] \$688 ; wire \$689 ; wire \$69 ; wire [31:0] \$690 ; wire \$691 ; wire [31:0] \$692 ; wire \$693 ; wire [31:0] \$694 ; wire \$695 ; wire [31:0] \$696 ; wire \$697 ; wire [31:0] \$698 ; wire \$699 ; wire [31:0] \$7 ; wire \$70 ; wire \$700 ; wire \$701 ; wire \$702 ; wire \$703 ; wire \$704 ; wire \$705 ; wire \$706 ; wire \$707 ; wire \$708 ; wire \$709 ; wire \$71 ; wire \$710 ; wire \$711 ; wire \$712 ; wire \$713 ; wire \$714 ; wire [31:0] \$715 ; wire \$716 ; wire [31:0] \$717 ; wire \$718 ; wire [31:0] \$719 ; wire \$72 ; wire \$720 ; wire [31:0] \$721 ; wire \$722 ; wire [31:0] \$723 ; wire \$724 ; wire [31:0] \$725 ; wire \$726 ; wire [31:0] \$727 ; wire \$728 ; wire [31:0] \$729 ; wire \$73 ; wire \$730 ; wire [31:0] \$731 ; wire \$732 ; wire [31:0] \$733 ; wire \$734 ; wire [31:0] \$735 ; wire \$736 ; wire [31:0] \$737 ; wire \$738 ; wire [31:0] \$739 ; wire \$74 ; wire \$740 ; wire [31:0] \$741 ; wire \$742 ; wire \$743 ; wire \$744 ; wire \$745 ; wire \$746 ; wire \$747 ; wire \$748 ; wire \$749 ; wire \$75 ; wire \$750 ; wire \$751 ; wire \$752 ; wire \$753 ; wire \$754 ; wire \$755 ; wire \$756 ; wire [31:0] \$757 ; wire \$758 ; wire [31:0] \$759 ; wire \$76 ; wire \$760 ; wire [31:0] \$761 ; wire \$762 ; wire [31:0] \$763 ; wire \$764 ; wire [31:0] \$765 ; wire \$766 ; wire [31:0] \$767 ; wire \$768 ; wire [31:0] \$769 ; wire \$77 ; wire \$770 ; wire [31:0] \$771 ; wire \$772 ; wire [31:0] \$773 ; wire \$774 ; wire [31:0] \$775 ; wire \$776 ; wire [31:0] \$777 ; wire \$778 ; wire [31:0] \$779 ; wire \$78 ; wire \$780 ; wire [31:0] \$781 ; wire \$782 ; wire [31:0] \$783 ; wire \$784 ; wire \$785 ; wire \$786 ; wire \$787 ; wire \$788 ; wire \$789 ; wire [31:0] \$79 ; wire \$790 ; wire \$791 ; wire \$792 ; wire \$793 ; wire \$794 ; wire \$795 ; wire \$796 ; wire \$797 ; wire \$798 ; wire [31:0] \$799 ; wire \$8 ; wire \$80 ; wire \$800 ; wire [31:0] \$801 ; wire \$802 ; wire [31:0] \$803 ; wire \$804 ; wire [31:0] \$805 ; wire \$806 ; wire [31:0] \$807 ; wire \$808 ; wire [31:0] \$809 ; wire [31:0] \$81 ; wire \$810 ; wire [31:0] \$811 ; wire \$812 ; wire [31:0] \$813 ; wire \$814 ; wire [31:0] \$815 ; wire \$816 ; wire [31:0] \$817 ; wire \$818 ; wire [31:0] \$819 ; wire \$82 ; wire \$820 ; wire [31:0] \$821 ; wire \$822 ; wire [31:0] \$823 ; wire \$824 ; wire \$825 ; wire \$826 ; wire \$827 ; wire \$828 ; wire \$829 ; wire [31:0] \$83 ; wire \$830 ; wire \$831 ; wire \$832 ; wire \$833 ; wire \$834 ; wire \$835 ; wire \$836 ; wire \$837 ; wire [31:0] \$838 ; wire \$839 ; wire \$84 ; wire [31:0] \$840 ; wire \$841 ; wire [31:0] \$842 ; wire \$843 ; wire [31:0] \$844 ; wire \$845 ; wire [31:0] \$846 ; wire \$847 ; wire [31:0] \$848 ; wire \$849 ; wire [31:0] \$85 ; wire [31:0] \$850 ; wire \$851 ; wire [31:0] \$852 ; wire \$853 ; wire [31:0] \$854 ; wire \$855 ; wire [31:0] \$856 ; wire \$857 ; wire [31:0] \$858 ; wire \$859 ; wire \$86 ; wire [31:0] \$860 ; wire \$861 ; wire \$862 ; wire \$863 ; wire \$864 ; wire \$865 ; wire \$866 ; wire \$867 ; wire \$868 ; wire \$869 ; wire [31:0] \$87 ; wire \$870 ; wire \$871 ; wire \$872 ; wire \$873 ; wire [31:0] \$874 ; wire \$875 ; wire [31:0] \$876 ; wire \$877 ; wire [31:0] \$878 ; wire \$879 ; wire \$88 ; wire [31:0] \$880 ; wire \$881 ; wire [31:0] \$882 ; wire \$883 ; wire [31:0] \$884 ; wire \$885 ; wire [31:0] \$886 ; wire \$887 ; wire [31:0] \$888 ; wire \$889 ; wire [31:0] \$89 ; wire [31:0] \$890 ; wire \$891 ; wire [31:0] \$892 ; wire \$893 ; wire [31:0] \$894 ; wire \$895 ; wire [31:0] \$896 ; wire \$897 ; wire \$898 ; wire \$899 ; wire [31:0] \$9 ; wire \$90 ; wire \$900 ; wire \$901 ; wire \$902 ; wire \$903 ; wire \$904 ; wire \$905 ; wire \$906 ; wire \$907 ; wire \$908 ; wire \$909 ; wire [31:0] \$91 ; wire [31:0] \$910 ; wire \$911 ; wire [31:0] \$912 ; wire \$913 ; wire [31:0] \$914 ; wire \$915 ; wire [31:0] \$916 ; wire \$917 ; wire [31:0] \$918 ; wire \$919 ; wire \$92 ; wire [31:0] \$920 ; wire \$921 ; wire [31:0] \$922 ; wire \$923 ; wire [31:0] \$924 ; wire \$925 ; wire [31:0] \$926 ; wire \$927 ; wire [31:0] \$928 ; wire \$929 ; wire [31:0] \$93 ; wire [31:0] \$930 ; wire \$931 ; wire [31:0] \$932 ; wire \$933 ; wire \$934 ; wire \$935 ; wire \$936 ; wire \$937 ; wire \$938 ; wire \$939 ; wire \$94 ; wire \$940 ; wire \$941 ; wire \$942 ; wire \$943 ; wire \$944 ; wire \$945 ; wire [31:0] \$946 ; wire \$947 ; wire [31:0] \$948 ; wire \$949 ; wire [31:0] \$95 ; wire [31:0] \$950 ; wire \$951 ; wire [31:0] \$952 ; wire \$953 ; wire [31:0] \$954 ; wire \$955 ; wire [31:0] \$956 ; wire \$957 ; wire [31:0] \$958 ; wire \$959 ; wire \$96 ; wire [31:0] \$960 ; wire \$961 ; wire [31:0] \$962 ; wire \$963 ; wire [31:0] \$964 ; wire \$965 ; wire [31:0] \$966 ; wire \$967 ; wire [31:0] \$968 ; wire \$969 ; wire [31:0] \$97 ; wire [31:0] \$970 ; wire \$971 ; wire [31:0] \$972 ; wire \$973 ; wire \$974 ; wire \$975 ; wire \$976 ; wire \$977 ; wire \$978 ; wire \$979 ; wire \$98 ; wire \$980 ; wire \$981 ; wire \$982 ; wire \$983 ; wire \$984 ; wire \$985 ; wire \$986 ; wire \$987 ; wire [31:0] \$988 ; wire \$989 ; wire [31:0] \$99 ; wire [31:0] \$990 ; wire \$991 ; wire [31:0] \$992 ; wire \$993 ; wire [31:0] \$994 ; wire \$995 ; wire [31:0] \$996 ; wire \$997 ; wire [31:0] \$998 ; wire \$999 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [31:0] crc; wire [31:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [31:0] crc_reg = 32'd4294967295; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire [31:0] data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input [31:0] data_in; wire [31:0] data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:356" *) crc_reg; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$3 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$4 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$3 [6]; assign \$5 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$6 = \$4 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$5 [9]; assign \$7 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$8 = \$6 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$7 [10]; assign \$9 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$10 = \$8 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$9 [12]; assign \$11 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$12 = \$10 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$11 [16]; assign \$13 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$14 = \$12 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$13 [24]; assign \$15 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$16 = \$14 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$15 [25]; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$18 = \$16 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$17 [26]; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$20 = \$18 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$19 [28]; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$22 = \$20 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$21 [29]; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$24 = \$22 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$23 [30]; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$26 = \$24 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$25 [31]; assign \$27 = \$26 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$28 = \$27 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$29 = \$28 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$30 = \$29 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$31 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$32 = \$31 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$34 = \$33 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$35 = \$34 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$36 = \$35 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$37 = \$36 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$38 = \$37 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$39 = \$38 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$40 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$42 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$43 = \$41 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$42 [1]; assign \$44 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$45 = \$43 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$44 [6]; assign \$46 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$47 = \$45 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$46 [7]; assign \$48 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$49 = \$47 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$48 [9]; assign \$50 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$51 = \$49 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$50 [11]; assign \$52 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$53 = \$51 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$52 [12]; assign \$54 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$55 = \$53 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$54 [13]; assign \$56 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$57 = \$55 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$56 [16]; assign \$58 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$59 = \$57 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$58 [17]; assign \$60 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$61 = \$59 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$60 [24]; assign \$62 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$63 = \$61 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$62 [27]; assign \$64 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$65 = \$63 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$64 [28]; assign \$66 = \$65 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$67 = \$66 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$68 = \$67 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$69 = \$68 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$70 = \$69 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$71 = \$70 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$72 = \$71 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$73 = \$72 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$74 = \$73 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$75 = \$74 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$76 = \$75 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$77 = \$76 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$78 = \$77 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$79 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$81 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$82 = \$80 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$81 [1]; assign \$83 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$84 = \$82 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$83 [2]; assign \$85 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$86 = \$84 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$85 [6]; assign \$87 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$88 = \$86 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$87 [7]; assign \$89 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$90 = \$88 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$89 [8]; assign \$91 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$92 = \$90 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$91 [9]; assign \$93 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$94 = \$92 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$93 [13]; assign \$95 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$96 = \$94 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$95 [14]; assign \$97 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$98 = \$96 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$97 [16]; assign \$99 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$100 = \$98 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$99 [17]; assign \$101 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$102 = \$100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$101 [18]; assign \$103 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$104 = \$102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$103 [24]; assign \$105 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$106 = \$104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$105 [26]; assign \$107 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$108 = \$106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$107 [30]; assign \$109 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$110 = \$108 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$109 [31]; assign \$111 = \$110 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$112 = \$111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$113 = \$112 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$114 = \$113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$115 = \$114 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$116 = \$115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$117 = \$116 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$118 = \$117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$119 = \$118 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$120 = \$119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$121 = \$120 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$122 = \$121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$123 = \$122 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$124 = \$123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$125 = \$124 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$126 = \$125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$127 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$129 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$130 = \$128 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$129 [2]; assign \$131 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$132 = \$130 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$131 [3]; assign \$133 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$134 = \$132 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$133 [7]; assign \$135 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$136 = \$134 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$135 [8]; assign \$137 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$138 = \$136 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$137 [9]; assign \$139 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$140 = \$138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$139 [10]; assign \$141 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$142 = \$140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$141 [14]; assign \$143 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$144 = \$142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$143 [15]; assign \$145 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$146 = \$144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$145 [17]; assign \$147 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$148 = \$146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$147 [18]; assign \$149 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$150 = \$148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$149 [19]; assign \$151 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$152 = \$150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$151 [25]; assign \$153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$154 = \$152 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$153 [27]; assign \$155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$156 = \$154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$155 [31]; assign \$157 = \$156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$158 = \$157 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$159 = \$158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$160 = \$159 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$161 = \$160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$162 = \$161 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$163 = \$162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$164 = \$163 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$165 = \$164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$166 = \$165 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$167 = \$166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$168 = \$167 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$169 = \$168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$170 = \$169 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$171 = \$170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$172 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$174 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$175 = \$173 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$174 [2]; assign \$176 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$177 = \$175 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$176 [3]; assign \$178 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$179 = \$177 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$178 [4]; assign \$180 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$181 = \$179 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$180 [6]; assign \$182 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$183 = \$181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$182 [8]; assign \$184 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$185 = \$183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$184 [11]; assign \$186 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$187 = \$185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$186 [12]; assign \$188 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$189 = \$187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$188 [15]; assign \$190 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$191 = \$189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$190 [18]; assign \$192 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$193 = \$191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$192 [19]; assign \$194 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$195 = \$193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$194 [20]; assign \$196 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$197 = \$195 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$196 [24]; assign \$198 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$199 = \$197 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$198 [25]; assign \$200 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$201 = \$199 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$200 [29]; assign \$202 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$203 = \$201 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$202 [30]; assign \$204 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$205 = \$203 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$204 [31]; assign \$206 = \$205 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$207 = \$206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$208 = \$207 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$209 = \$208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$210 = \$209 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$211 = \$210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$212 = \$211 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$213 = \$212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$214 = \$213 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$215 = \$214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$216 = \$215 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$217 = \$216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$218 = \$217 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$219 = \$218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$220 = \$219 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$221 = \$220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$222 = \$221 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$223 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$225 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$226 = \$224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$225 [1]; assign \$227 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$228 = \$226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$227 [3]; assign \$229 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$230 = \$228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$229 [4]; assign \$231 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$232 = \$230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$231 [5]; assign \$233 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$234 = \$232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$233 [6]; assign \$235 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$236 = \$234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$235 [7]; assign \$237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$238 = \$236 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$237 [10]; assign \$239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$240 = \$238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$239 [13]; assign \$241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$242 = \$240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$241 [19]; assign \$243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$244 = \$242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$243 [20]; assign \$245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$246 = \$244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$245 [21]; assign \$247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$248 = \$246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$247 [24]; assign \$249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$250 = \$248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$249 [28]; assign \$251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$252 = \$250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$251 [29]; assign \$253 = \$252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$254 = \$253 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$255 = \$254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$256 = \$255 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$257 = \$256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$258 = \$257 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$259 = \$258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$260 = \$259 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$261 = \$260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$262 = \$261 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$263 = \$262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$264 = \$263 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$265 = \$264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$266 = \$265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$267 = \$266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$268 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$270 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$271 = \$269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$270 [2]; assign \$272 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$273 = \$271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$272 [4]; assign \$274 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$275 = \$273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$274 [5]; assign \$276 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$277 = \$275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$276 [6]; assign \$278 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$279 = \$277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$278 [7]; assign \$280 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$281 = \$279 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$280 [8]; assign \$282 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$283 = \$281 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$282 [11]; assign \$284 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$285 = \$283 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$284 [14]; assign \$286 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$287 = \$285 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$286 [20]; assign \$288 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$289 = \$287 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$288 [21]; assign \$290 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$291 = \$289 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$290 [22]; assign \$292 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$293 = \$291 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$292 [25]; assign \$294 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$295 = \$293 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$294 [29]; assign \$296 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$297 = \$295 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$296 [30]; assign \$298 = \$297 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$299 = \$298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$300 = \$299 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$301 = \$300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$302 = \$301 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$303 = \$302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$304 = \$303 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$305 = \$304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$306 = \$305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$307 = \$306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$308 = \$307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$309 = \$308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$310 = \$309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$311 = \$310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$312 = \$311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$313 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$315 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$316 = \$314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$315 [2]; assign \$317 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$318 = \$316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$317 [3]; assign \$319 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$320 = \$318 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$319 [5]; assign \$321 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$322 = \$320 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$321 [7]; assign \$323 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$324 = \$322 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$323 [8]; assign \$325 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$326 = \$324 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$325 [10]; assign \$327 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$328 = \$326 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$327 [15]; assign \$329 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$330 = \$328 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$329 [16]; assign \$331 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$332 = \$330 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$331 [21]; assign \$333 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$334 = \$332 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$333 [22]; assign \$335 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$336 = \$334 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$335 [23]; assign \$337 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$338 = \$336 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$337 [24]; assign \$339 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$340 = \$338 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$339 [25]; assign \$341 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$342 = \$340 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$341 [28]; assign \$343 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$344 = \$342 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$343 [29]; assign \$345 = \$344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$346 = \$345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$347 = \$346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$348 = \$347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$349 = \$348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$350 = \$349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$351 = \$350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$352 = \$351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$353 = \$352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$354 = \$353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$355 = \$354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$356 = \$355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$357 = \$356 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$358 = \$357 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$359 = \$358 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$360 = \$359 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$361 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$363 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$364 = \$362 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$363 [1]; assign \$365 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$366 = \$364 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$365 [3]; assign \$367 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$368 = \$366 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$367 [4]; assign \$369 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$370 = \$368 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$369 [8]; assign \$371 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$372 = \$370 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$371 [10]; assign \$373 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$374 = \$372 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$373 [11]; assign \$375 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$376 = \$374 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$375 [12]; assign \$377 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$378 = \$376 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$377 [17]; assign \$379 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$380 = \$378 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$379 [22]; assign \$381 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$382 = \$380 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$381 [23]; assign \$383 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$384 = \$382 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$383 [28]; assign \$385 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$386 = \$384 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$385 [31]; assign \$387 = \$386 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$388 = \$387 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$389 = \$388 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$390 = \$389 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$391 = \$390 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$392 = \$391 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$393 = \$392 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$394 = \$393 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$395 = \$394 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$396 = \$395 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$397 = \$396 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$398 = \$397 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$399 = \$398 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$400 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$402 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$403 = \$401 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$402 [2]; assign \$404 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$405 = \$403 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$404 [4]; assign \$406 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$407 = \$405 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$406 [5]; assign \$408 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$409 = \$407 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$408 [9]; assign \$410 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$411 = \$409 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$410 [11]; assign \$412 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$413 = \$411 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$412 [12]; assign \$414 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$415 = \$413 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$414 [13]; assign \$416 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$417 = \$415 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$416 [18]; assign \$418 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$419 = \$417 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$418 [23]; assign \$420 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$421 = \$419 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$420 [24]; assign \$422 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$423 = \$421 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$422 [29]; assign \$424 = \$423 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$425 = \$424 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$426 = \$425 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$427 = \$426 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$428 = \$427 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$429 = \$428 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$430 = \$429 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$431 = \$430 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$432 = \$431 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$433 = \$432 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$434 = \$433 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$435 = \$434 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$436 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$438 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$439 = \$437 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$438 [2]; assign \$440 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$441 = \$439 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$440 [3]; assign \$442 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$443 = \$441 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$442 [5]; assign \$444 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$445 = \$443 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$444 [9]; assign \$446 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$447 = \$445 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$446 [13]; assign \$448 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$449 = \$447 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$448 [14]; assign \$450 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$451 = \$449 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$450 [16]; assign \$452 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$453 = \$451 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$452 [19]; assign \$454 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$455 = \$453 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$454 [26]; assign \$456 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$457 = \$455 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$456 [28]; assign \$458 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$459 = \$457 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$458 [29]; assign \$460 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$461 = \$459 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$460 [31]; assign \$462 = \$461 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$463 = \$462 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$464 = \$463 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$465 = \$464 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$466 = \$465 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$467 = \$466 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$468 = \$467 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$469 = \$468 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$470 = \$469 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$471 = \$470 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$472 = \$471 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$473 = \$472 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$474 = \$473 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$475 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$477 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$478 = \$476 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$477 [1]; assign \$479 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$480 = \$478 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$479 [3]; assign \$481 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$482 = \$480 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$481 [4]; assign \$483 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$484 = \$482 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$483 [9]; assign \$485 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$486 = \$484 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$485 [12]; assign \$487 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$488 = \$486 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$487 [14]; assign \$489 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$490 = \$488 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$489 [15]; assign \$491 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$492 = \$490 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$491 [16]; assign \$493 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$494 = \$492 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$493 [17]; assign \$495 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$496 = \$494 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$495 [20]; assign \$497 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$498 = \$496 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$497 [24]; assign \$499 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$500 = \$498 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$499 [25]; assign \$501 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$502 = \$500 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$501 [26]; assign \$503 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$504 = \$502 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$503 [27]; assign \$505 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$506 = \$504 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$505 [28]; assign \$507 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$508 = \$506 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$507 [31]; assign \$509 = \$508 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$510 = \$509 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$511 = \$510 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$512 = \$511 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$513 = \$512 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$514 = \$513 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$515 = \$514 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$516 = \$515 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$517 = \$516 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$518 = \$517 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$519 = \$518 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$520 = \$519 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$521 = \$520 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$522 = \$521 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$523 = \$522 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$524 = \$523 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$525 = \$524 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$526 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$528 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$529 = \$527 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$528 [1]; assign \$530 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$531 = \$529 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$530 [2]; assign \$532 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$533 = \$531 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$532 [4]; assign \$534 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$535 = \$533 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$534 [5]; assign \$536 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$537 = \$535 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$536 [6]; assign \$538 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$539 = \$537 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$538 [9]; assign \$540 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$541 = \$539 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$540 [12]; assign \$542 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$543 = \$541 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$542 [13]; assign \$544 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$545 = \$543 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$544 [15]; assign \$546 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$547 = \$545 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$546 [17]; assign \$548 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$549 = \$547 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$548 [18]; assign \$550 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$551 = \$549 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$550 [21]; assign \$552 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$553 = \$551 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$552 [24]; assign \$554 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$555 = \$553 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$554 [27]; assign \$556 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$557 = \$555 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$556 [30]; assign \$558 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$559 = \$557 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$558 [31]; assign \$560 = \$559 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$561 = \$560 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$562 = \$561 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$563 = \$562 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$564 = \$563 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$565 = \$564 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$566 = \$565 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$567 = \$566 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$568 = \$567 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$569 = \$568 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$570 = \$569 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$571 = \$570 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$572 = \$571 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$573 = \$572 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$574 = \$573 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$575 = \$574 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$576 = \$575 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$577 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$579 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$580 = \$578 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$579 [2]; assign \$581 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$582 = \$580 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$581 [3]; assign \$583 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$584 = \$582 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$583 [5]; assign \$585 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$586 = \$584 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$585 [6]; assign \$587 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$588 = \$586 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$587 [7]; assign \$589 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$590 = \$588 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$589 [10]; assign \$591 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$592 = \$590 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$591 [13]; assign \$593 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$594 = \$592 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$593 [14]; assign \$595 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$596 = \$594 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$595 [16]; assign \$597 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$598 = \$596 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$597 [18]; assign \$599 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$600 = \$598 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$599 [19]; assign \$601 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$602 = \$600 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$601 [22]; assign \$603 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$604 = \$602 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$603 [25]; assign \$605 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$606 = \$604 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$605 [28]; assign \$607 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$608 = \$606 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$607 [31]; assign \$609 = \$608 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$610 = \$609 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$611 = \$610 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$612 = \$611 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$613 = \$612 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$614 = \$613 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$615 = \$614 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$616 = \$615 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$617 = \$616 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$618 = \$617 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$619 = \$618 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$620 = \$619 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$621 = \$620 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$622 = \$621 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$623 = \$622 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$624 = \$623 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$625 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$627 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$628 = \$626 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$627 [3]; assign \$629 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$630 = \$628 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$629 [4]; assign \$631 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$632 = \$630 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$631 [6]; assign \$633 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$634 = \$632 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$633 [7]; assign \$635 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$636 = \$634 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$635 [8]; assign \$637 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$638 = \$636 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$637 [11]; assign \$639 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$640 = \$638 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$639 [14]; assign \$641 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$642 = \$640 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$641 [15]; assign \$643 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$644 = \$642 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$643 [17]; assign \$645 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$646 = \$644 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$645 [19]; assign \$647 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$648 = \$646 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$647 [20]; assign \$649 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$650 = \$648 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$649 [23]; assign \$651 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$652 = \$650 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$651 [26]; assign \$653 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$654 = \$652 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$653 [29]; assign \$655 = \$654 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$656 = \$655 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$657 = \$656 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$658 = \$657 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$659 = \$658 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$660 = \$659 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$661 = \$660 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$662 = \$661 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$663 = \$662 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$664 = \$663 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$665 = \$664 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$666 = \$665 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$667 = \$666 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$668 = \$667 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$669 = \$668 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$670 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$672 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$673 = \$671 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$672 [4]; assign \$674 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$675 = \$673 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$674 [5]; assign \$676 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$677 = \$675 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$676 [7]; assign \$678 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$679 = \$677 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$678 [8]; assign \$680 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$681 = \$679 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$680 [9]; assign \$682 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$683 = \$681 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$682 [12]; assign \$684 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$685 = \$683 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$684 [15]; assign \$686 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$687 = \$685 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$686 [16]; assign \$688 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$689 = \$687 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$688 [18]; assign \$690 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$691 = \$689 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$690 [20]; assign \$692 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$693 = \$691 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$692 [21]; assign \$694 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$695 = \$693 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$694 [24]; assign \$696 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$697 = \$695 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$696 [27]; assign \$698 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$699 = \$697 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$698 [30]; assign \$700 = \$699 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$701 = \$700 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$702 = \$701 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$703 = \$702 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$704 = \$703 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$705 = \$704 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$706 = \$705 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$707 = \$706 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$708 = \$707 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$709 = \$708 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$710 = \$709 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$711 = \$710 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$712 = \$711 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$713 = \$712 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$714 = \$713 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$715 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$717 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$718 = \$716 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$717 [4]; assign \$719 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$720 = \$718 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$719 [5]; assign \$721 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$722 = \$720 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$721 [8]; assign \$723 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$724 = \$722 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$723 [12]; assign \$725 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$726 = \$724 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$725 [13]; assign \$727 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$728 = \$726 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$727 [17]; assign \$729 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$730 = \$728 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$729 [19]; assign \$731 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$732 = \$730 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$731 [21]; assign \$733 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$734 = \$732 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$733 [22]; assign \$735 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$736 = \$734 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$735 [24]; assign \$737 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$738 = \$736 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$737 [26]; assign \$739 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$740 = \$738 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$739 [29]; assign \$741 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$742 = \$740 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$741 [30]; assign \$743 = \$742 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$744 = \$743 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$745 = \$744 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$746 = \$745 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$747 = \$746 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$748 = \$747 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$749 = \$748 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$750 = \$749 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$751 = \$750 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$752 = \$751 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$753 = \$752 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$754 = \$753 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$755 = \$754 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$756 = \$755 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$757 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$759 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$760 = \$758 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$759 [5]; assign \$761 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$762 = \$760 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$761 [6]; assign \$763 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$764 = \$762 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$763 [9]; assign \$765 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$766 = \$764 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$765 [13]; assign \$767 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$768 = \$766 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$767 [14]; assign \$769 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$770 = \$768 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$769 [18]; assign \$771 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$772 = \$770 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$771 [20]; assign \$773 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$774 = \$772 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$773 [22]; assign \$775 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$776 = \$774 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$775 [23]; assign \$777 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$778 = \$776 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$777 [25]; assign \$779 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$780 = \$778 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$779 [27]; assign \$781 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$782 = \$780 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$781 [30]; assign \$783 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$784 = \$782 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$783 [31]; assign \$785 = \$784 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$786 = \$785 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$787 = \$786 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$788 = \$787 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$789 = \$788 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$790 = \$789 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$791 = \$790 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$792 = \$791 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$793 = \$792 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$794 = \$793 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$795 = \$794 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$796 = \$795 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$797 = \$796 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$798 = \$797 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$799 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$801 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$802 = \$800 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$801 [6]; assign \$803 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$804 = \$802 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$803 [7]; assign \$805 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$806 = \$804 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$805 [10]; assign \$807 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$808 = \$806 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$807 [14]; assign \$809 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$810 = \$808 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$809 [15]; assign \$811 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$812 = \$810 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$811 [19]; assign \$813 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$814 = \$812 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$813 [21]; assign \$815 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$816 = \$814 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$815 [23]; assign \$817 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$818 = \$816 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$817 [24]; assign \$819 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$820 = \$818 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$819 [26]; assign \$821 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$822 = \$820 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$821 [28]; assign \$823 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$824 = \$822 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$823 [31]; assign \$825 = \$824 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$826 = \$825 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$827 = \$826 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$828 = \$827 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$829 = \$828 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$830 = \$829 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$831 = \$830 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$832 = \$831 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$833 = \$832 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$834 = \$833 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$835 = \$834 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$836 = \$835 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$837 = \$836 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$838 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$840 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$841 = \$839 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$840 [7]; assign \$842 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$843 = \$841 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$842 [8]; assign \$844 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$845 = \$843 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$844 [11]; assign \$846 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$847 = \$845 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$846 [15]; assign \$848 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$849 = \$847 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$848 [16]; assign \$850 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$851 = \$849 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$850 [20]; assign \$852 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$853 = \$851 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$852 [22]; assign \$854 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$855 = \$853 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$854 [24]; assign \$856 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$857 = \$855 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$856 [25]; assign \$858 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$859 = \$857 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$858 [27]; assign \$860 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$861 = \$859 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$860 [29]; assign \$862 = \$861 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$863 = \$862 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$864 = \$863 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$865 = \$864 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$866 = \$865 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$867 = \$866 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$868 = \$867 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$869 = \$868 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$870 = \$869 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$871 = \$870 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$872 = \$871 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$873 = \$872 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$874 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$876 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$877 = \$875 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$876 [8]; assign \$878 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$879 = \$877 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$878 [9]; assign \$880 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$881 = \$879 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$880 [12]; assign \$882 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$883 = \$881 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$882 [16]; assign \$884 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$885 = \$883 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$884 [17]; assign \$886 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$887 = \$885 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$886 [21]; assign \$888 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$889 = \$887 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$888 [23]; assign \$890 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$891 = \$889 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$890 [25]; assign \$892 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$893 = \$891 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$892 [26]; assign \$894 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$895 = \$893 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$894 [28]; assign \$896 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$897 = \$895 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$896 [30]; assign \$898 = \$897 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$899 = \$898 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$900 = \$899 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$901 = \$900 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$902 = \$901 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$903 = \$902 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$904 = \$903 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$905 = \$904 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$906 = \$905 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$907 = \$906 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$908 = \$907 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$909 = \$908 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$910 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$912 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$913 = \$911 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$912 [9]; assign \$914 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$915 = \$913 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$914 [10]; assign \$916 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$917 = \$915 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$916 [13]; assign \$918 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$919 = \$917 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$918 [17]; assign \$920 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$921 = \$919 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$920 [18]; assign \$922 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$923 = \$921 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$922 [22]; assign \$924 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$925 = \$923 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$924 [24]; assign \$926 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$927 = \$925 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$926 [26]; assign \$928 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$929 = \$927 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$928 [27]; assign \$930 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$931 = \$929 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$930 [29]; assign \$932 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$933 = \$931 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$932 [31]; assign \$934 = \$933 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$935 = \$934 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$936 = \$935 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$937 = \$936 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$938 = \$937 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$939 = \$938 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$940 = \$939 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$941 = \$940 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$942 = \$941 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$943 = \$942 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$944 = \$943 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$945 = \$944 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$946 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$948 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$949 = \$947 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$948 [9]; assign \$950 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$951 = \$949 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$950 [11]; assign \$952 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$953 = \$951 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$952 [12]; assign \$954 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$955 = \$953 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$954 [14]; assign \$956 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$957 = \$955 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$956 [16]; assign \$958 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$959 = \$957 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$958 [18]; assign \$960 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$961 = \$959 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$960 [19]; assign \$962 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$963 = \$961 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$962 [23]; assign \$964 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$965 = \$963 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$964 [24]; assign \$966 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$967 = \$965 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$966 [26]; assign \$968 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$969 = \$967 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$968 [27]; assign \$970 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$971 = \$969 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$970 [29]; assign \$972 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$973 = \$971 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$972 [31]; assign \$974 = \$973 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$975 = \$974 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$976 = \$975 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$977 = \$976 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$978 = \$977 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$979 = \$978 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$980 = \$979 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$981 = \$980 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$982 = \$981 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$983 = \$982 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$984 = \$983 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$985 = \$984 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$986 = \$985 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$987 = \$986 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$988 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$990 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$991 = \$989 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$990 [1]; assign \$992 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$993 = \$991 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$992 [6]; assign \$994 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$995 = \$993 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$994 [9]; assign \$996 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$997 = \$995 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$996 [13]; assign \$998 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$999 = \$997 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$998 [15]; assign \$1000 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1001 = \$999 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1000 [16]; assign \$1002 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1003 = \$1001 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1002 [17]; assign \$1004 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1005 = \$1003 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1004 [19]; assign \$1006 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1007 = \$1005 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1006 [20]; assign \$1008 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1009 = \$1007 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1008 [26]; assign \$1010 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1011 = \$1009 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1010 [27]; assign \$1012 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1013 = \$1011 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1012 [29]; assign \$1014 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1015 = \$1013 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1014 [31]; assign \$1016 = \$1015 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1017 = \$1016 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1018 = \$1017 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1019 = \$1018 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1020 = \$1019 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1021 = \$1020 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1022 = \$1021 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1023 = \$1022 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1024 = \$1023 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1025 = \$1024 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1026 = \$1025 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1027 = \$1026 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1028 = \$1027 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1029 = \$1028 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1030 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1032 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1033 = \$1031 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1032 [2]; assign \$1034 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1035 = \$1033 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1034 [7]; assign \$1036 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1037 = \$1035 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1036 [10]; assign \$1038 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1039 = \$1037 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1038 [14]; assign \$1040 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1041 = \$1039 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1040 [16]; assign \$1042 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1043 = \$1041 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1042 [17]; assign \$1044 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1045 = \$1043 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1044 [18]; assign \$1046 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1047 = \$1045 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1046 [20]; assign \$1048 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1049 = \$1047 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1048 [21]; assign \$1050 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1051 = \$1049 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1050 [27]; assign \$1052 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1053 = \$1051 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1052 [28]; assign \$1054 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1055 = \$1053 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1054 [30]; assign \$1056 = \$1055 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1057 = \$1056 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1058 = \$1057 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1059 = \$1058 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1060 = \$1059 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1061 = \$1060 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[16]; assign \$1062 = \$1061 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1063 = \$1062 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1064 = \$1063 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1065 = \$1064 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1066 = \$1065 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1067 = \$1066 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1068 = \$1067 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1069 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1071 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1072 = \$1070 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1071 [3]; assign \$1073 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1074 = \$1072 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1073 [8]; assign \$1075 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1076 = \$1074 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1075 [11]; assign \$1077 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1078 = \$1076 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1077 [15]; assign \$1079 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1080 = \$1078 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1079 [17]; assign \$1081 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1082 = \$1080 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1081 [18]; assign \$1083 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1084 = \$1082 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1083 [19]; assign \$1085 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1086 = \$1084 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1085 [21]; assign \$1087 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1088 = \$1086 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1087 [22]; assign \$1089 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1090 = \$1088 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1089 [28]; assign \$1091 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1092 = \$1090 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1091 [29]; assign \$1093 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1094 = \$1092 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1093 [31]; assign \$1095 = \$1094 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1096 = \$1095 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1097 = \$1096 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1098 = \$1097 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1099 = \$1098 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1100 = \$1099 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[17]; assign \$1101 = \$1100 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1102 = \$1101 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1103 = \$1102 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1104 = \$1103 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1105 = \$1104 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1106 = \$1105 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1107 = \$1106 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1108 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1110 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1111 = \$1109 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1110 [3]; assign \$1112 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1113 = \$1111 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1112 [4]; assign \$1114 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1115 = \$1113 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1114 [6]; assign \$1116 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1117 = \$1115 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1116 [10]; assign \$1118 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1119 = \$1117 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1118 [18]; assign \$1120 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1121 = \$1119 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1120 [19]; assign \$1122 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1123 = \$1121 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1122 [20]; assign \$1124 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1125 = \$1123 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1124 [22]; assign \$1126 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1127 = \$1125 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1126 [23]; assign \$1128 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1129 = \$1127 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1128 [24]; assign \$1130 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1131 = \$1129 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1130 [25]; assign \$1132 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1133 = \$1131 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1132 [26]; assign \$1134 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1135 = \$1133 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1134 [28]; assign \$1136 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1137 = \$1135 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1136 [31]; assign \$1138 = \$1137 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[0]; assign \$1139 = \$1138 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1140 = \$1139 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1141 = \$1140 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1142 = \$1141 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1143 = \$1142 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[18]; assign \$1144 = \$1143 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1145 = \$1144 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1146 = \$1145 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1147 = \$1146 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1148 = \$1147 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1149 = \$1148 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1150 = \$1149 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1151 = \$1150 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1152 = \$1151 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1153 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1155 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1156 = \$1154 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1155 [4]; assign \$1157 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1158 = \$1156 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1157 [5]; assign \$1159 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1160 = \$1158 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1159 [7]; assign \$1161 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1162 = \$1160 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1161 [11]; assign \$1163 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1164 = \$1162 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1163 [19]; assign \$1165 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1166 = \$1164 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1165 [20]; assign \$1167 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1168 = \$1166 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1167 [21]; assign \$1169 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1170 = \$1168 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1169 [23]; assign \$1171 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1172 = \$1170 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1171 [24]; assign \$1173 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1174 = \$1172 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1173 [25]; assign \$1175 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1176 = \$1174 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1175 [26]; assign \$1177 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1178 = \$1176 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1177 [27]; assign \$1179 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1180 = \$1178 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1179 [29]; assign \$1181 = \$1180 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[1]; assign \$1182 = \$1181 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1183 = \$1182 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1184 = \$1183 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1185 = \$1184 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1186 = \$1185 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[19]; assign \$1187 = \$1186 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1188 = \$1187 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1189 = \$1188 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1190 = \$1189 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1191 = \$1190 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1192 = \$1191 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1193 = \$1192 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1194 = \$1193 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1195 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1197 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1198 = \$1196 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1197 [5]; assign \$1199 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1200 = \$1198 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1199 [6]; assign \$1201 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1202 = \$1200 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1201 [8]; assign \$1203 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1204 = \$1202 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1203 [12]; assign \$1205 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1206 = \$1204 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1205 [20]; assign \$1207 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1208 = \$1206 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1207 [21]; assign \$1209 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1210 = \$1208 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1209 [22]; assign \$1211 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1212 = \$1210 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1211 [24]; assign \$1213 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1214 = \$1212 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1213 [25]; assign \$1215 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1216 = \$1214 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1215 [26]; assign \$1217 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1218 = \$1216 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1217 [27]; assign \$1219 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1220 = \$1218 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1219 [28]; assign \$1221 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1222 = \$1220 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1221 [30]; assign \$1223 = \$1222 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[2]; assign \$1224 = \$1223 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1225 = \$1224 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1226 = \$1225 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1227 = \$1226 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[12]; assign \$1228 = \$1227 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[20]; assign \$1229 = \$1228 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1230 = \$1229 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1231 = \$1230 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1232 = \$1231 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1233 = \$1232 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1234 = \$1233 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1235 = \$1234 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1236 = \$1235 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1237 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1239 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1240 = \$1238 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1239 [6]; assign \$1241 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1242 = \$1240 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1241 [7]; assign \$1243 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1244 = \$1242 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1243 [9]; assign \$1245 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1246 = \$1244 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1245 [13]; assign \$1247 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1248 = \$1246 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1247 [21]; assign \$1249 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1250 = \$1248 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1249 [22]; assign \$1251 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1252 = \$1250 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1251 [23]; assign \$1253 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1254 = \$1252 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1253 [25]; assign \$1255 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1256 = \$1254 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1255 [26]; assign \$1257 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1258 = \$1256 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1257 [27]; assign \$1259 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1260 = \$1258 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1259 [28]; assign \$1261 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1262 = \$1260 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1261 [29]; assign \$1263 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1264 = \$1262 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1263 [31]; assign \$1265 = \$1264 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[3]; assign \$1266 = \$1265 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[6]; assign \$1267 = \$1266 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1268 = \$1267 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1269 = \$1268 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[13]; assign \$1270 = \$1269 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[21]; assign \$1271 = \$1270 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1272 = \$1271 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1273 = \$1272 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1274 = \$1273 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1275 = \$1274 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1276 = \$1275 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1277 = \$1276 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1278 = \$1277 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; assign \$1279 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1281 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1282 = \$1280 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1281 [7]; assign \$1283 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1284 = \$1282 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1283 [8]; assign \$1285 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1286 = \$1284 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1285 [10]; assign \$1287 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1288 = \$1286 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1287 [14]; assign \$1289 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1290 = \$1288 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1289 [22]; assign \$1291 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1292 = \$1290 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1291 [23]; assign \$1293 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1294 = \$1292 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1293 [24]; assign \$1295 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1296 = \$1294 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1295 [26]; assign \$1297 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1298 = \$1296 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1297 [27]; assign \$1299 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1300 = \$1298 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1299 [28]; assign \$1301 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1302 = \$1300 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1301 [29]; assign \$1303 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1304 = \$1302 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1303 [30]; assign \$1305 = \$1304 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[4]; assign \$1306 = \$1305 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[7]; assign \$1307 = \$1306 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1308 = \$1307 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[10]; assign \$1309 = \$1308 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[14]; assign \$1310 = \$1309 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[22]; assign \$1311 = \$1310 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1312 = \$1311 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1313 = \$1312 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[26]; assign \$1314 = \$1313 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1315 = \$1314 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1316 = \$1315 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1317 = \$1316 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1318 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1320 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1321 = \$1319 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1320 [8]; assign \$1322 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1323 = \$1321 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1322 [9]; assign \$1324 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1325 = \$1323 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1324 [11]; assign \$1326 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1327 = \$1325 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1326 [15]; assign \$1328 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1329 = \$1327 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1328 [23]; assign \$1330 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1331 = \$1329 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1330 [24]; assign \$1332 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1333 = \$1331 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1332 [25]; assign \$1334 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1335 = \$1333 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1334 [27]; assign \$1336 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1337 = \$1335 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1336 [28]; assign \$1338 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1339 = \$1337 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1338 [29]; assign \$1340 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1341 = \$1339 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1340 [30]; assign \$1342 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 32'd4294967295 : crc_reg; assign \$1343 = \$1341 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$1342 [31]; assign \$1344 = \$1343 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[5]; assign \$1345 = \$1344 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[8]; assign \$1346 = \$1345 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[9]; assign \$1347 = \$1346 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[11]; assign \$1348 = \$1347 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[15]; assign \$1349 = \$1348 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[23]; assign \$1350 = \$1349 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[24]; assign \$1351 = \$1350 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[25]; assign \$1352 = \$1351 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[27]; assign \$1353 = \$1352 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[28]; assign \$1354 = \$1353 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[29]; assign \$1355 = \$1354 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[30]; assign \$1356 = \$1355 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in[31]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_reg <= 32'd4294967295; else crc_reg <= \$1357 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$32 ) begin end \$1357 = crc_reg; if (valid) begin \$1357 [0] = \$39 ; \$1357 [1] = \$78 ; \$1357 [2] = \$126 ; \$1357 [3] = \$171 ; \$1357 [4] = \$222 ; \$1357 [5] = \$267 ; \$1357 [6] = \$312 ; \$1357 [7] = \$360 ; \$1357 [8] = \$399 ; \$1357 [9] = \$435 ; \$1357 [10] = \$474 ; \$1357 [11] = \$525 ; \$1357 [12] = \$576 ; \$1357 [13] = \$624 ; \$1357 [14] = \$669 ; \$1357 [15] = \$714 ; \$1357 [16] = \$756 ; \$1357 [17] = \$798 ; \$1357 [18] = \$837 ; \$1357 [19] = \$873 ; \$1357 [20] = \$909 ; \$1357 [21] = \$945 ; \$1357 [22] = \$987 ; \$1357 [23] = \$1029 ; \$1357 [24] = \$1068 ; \$1357 [25] = \$1107 ; \$1357 [26] = \$1152 ; \$1357 [27] = \$1194 ; \$1357 [28] = \$1236 ; \$1357 [29] = \$1278 ; \$1357 [30] = \$1317 ; \$1357 [31] = \$1356 ; end else if (start) begin \$1357 = 32'd4294967295; end end assign data = data_in; assign crc = crc_reg; assign \$2 = \$1 [0]; assign \$41 = \$40 [0]; assign \$80 = \$79 [0]; assign \$128 = \$127 [1]; assign \$173 = \$172 [0]; assign \$224 = \$223 [0]; assign \$269 = \$268 [1]; assign \$314 = \$313 [0]; assign \$362 = \$361 [0]; assign \$401 = \$400 [1]; assign \$437 = \$436 [0]; assign \$476 = \$475 [0]; assign \$527 = \$526 [0]; assign \$578 = \$577 [1]; assign \$626 = \$625 [2]; assign \$671 = \$670 [3]; assign \$716 = \$715 [0]; assign \$758 = \$757 [1]; assign \$800 = \$799 [2]; assign \$839 = \$838 [3]; assign \$875 = \$874 [4]; assign \$911 = \$910 [5]; assign \$947 = \$946 [0]; assign \$989 = \$988 [0]; assign \$1031 = \$1030 [1]; assign \$1070 = \$1069 [2]; assign \$1109 = \$1108 [0]; assign \$1154 = \$1153 [1]; assign \$1196 = \$1195 [2]; assign \$1238 = \$1237 [3]; assign \$1280 = \$1279 [4]; assign \$1319 = \$1318 [5]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:81" *) (* generator = "Amaranth" *) module \Controller.em_serial_controller_D_shift_dma_8 (sync_100_rst, read_bram_address_input, write_bram_address_input, read_node_address_input, write_node_address_input, data_input, read_complete_input, write_complete_input, bram_read_data, write_bram_address_output, read_bram_address_output, write_node_address_output, read_node_address_output, write_complete_output, data_output, read_complete_output, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$33 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; reg \$15 ; reg [31:0] \$16 ; reg \$17 ; reg \$18 ; wire \$2 ; wire \$3 ; wire \$4 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) output [15:0] bram_address; reg [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) input [31:0] bram_read_data; wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) output [31:0] bram_write_data; reg [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) output bram_write_enable; reg bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) reg [31:0] buf_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) reg [15:0] buf_read_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) reg buf_read_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) reg [7:0] buf_read_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) reg [15:0] buf_write_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) reg buf_write_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) reg [7:0] buf_write_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) input [31:0] data_input; wire [31:0] data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) output [31:0] data_output; reg [31:0] data_output = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) input [15:0] read_bram_address_input; wire [15:0] read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) output [15:0] read_bram_address_output; reg [15:0] read_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) input read_complete_input; wire read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) output read_complete_output; reg read_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) reg read_next = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) input [7:0] read_node_address_input; wire [7:0] read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) output [7:0] read_node_address_output; reg [7:0] read_node_address_output = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) input [15:0] write_bram_address_input; wire [15:0] write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) output [15:0] write_bram_address_output; reg [15:0] write_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) input write_complete_input; wire write_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) output write_complete_output; reg write_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) input [7:0] write_node_address_input; wire [7:0] write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) output [7:0] write_node_address_output; reg [7:0] write_node_address_output = 8'h00; assign \$1 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 4'h8; assign \$2 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$3 = \$1 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$2 ; assign \$4 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 4'h8; assign \$5 = \$4 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$6 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$7 = \$5 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$6 ; assign \$8 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 4'h8; assign \$9 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$10 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$9 ; assign \$11 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 4'h8; assign \$12 = \$11 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$13 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$13 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_bram_address <= 16'h0000; else buf_write_bram_address <= write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_bram_address <= 16'h0000; else buf_read_bram_address <= read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_node_address <= 8'h00; else buf_write_node_address <= write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_node_address <= 8'h00; else buf_read_node_address <= read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_bram_address_output <= 16'h0000; else write_bram_address_output <= buf_write_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_bram_address_output <= 16'h0000; else read_bram_address_output <= buf_read_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_node_address_output <= 8'h00; else write_node_address_output <= buf_write_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_node_address_output <= 8'h00; else read_node_address_output <= buf_read_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_data <= 32'd0; else buf_data <= data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_complete <= 1'h0; else buf_read_complete <= read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_complete_output <= 1'h0; else write_complete_output <= buf_write_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_next <= 1'h0; else read_next <= \$15 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_output <= 32'd0; else data_output <= \$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_complete_output <= 1'h0; else read_complete_output <= \$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_complete <= 1'h0; else buf_write_complete <= \$18 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$33 ) begin end \$15 = read_next; if (\$3 ) begin \$15 = 1'h1; end else if (read_next) begin \$15 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$33 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$16 = bram_read_data; end else begin \$16 = buf_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$33 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$17 = 1'h1; end else begin \$17 = buf_read_complete; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$33 ) begin end (* full_case = 32'd1 *) if (\$7 ) begin \$18 = 1'h1; end else begin \$18 = write_complete_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$33 ) begin end bram_address = 16'h0000; if (\$10 ) begin bram_address = read_bram_address_input; end if (\$14 ) begin bram_address = write_bram_address_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$33 ) begin end bram_write_data = 32'd0; if (\$14 ) begin bram_write_data = data_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$33 ) begin end (* full_case = 32'd1 *) if (\$14 ) begin bram_write_enable = 1'h1; end else begin bram_write_enable = 1'h0; end end endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:62" *) (* generator = "Amaranth" *) module \Controller.fanuc_encoders (sync_100_rst, \rx$30 , bram_read_data, req, bram_address, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$34 = 0; wire \$1 ; reg [31:0] \$10 ; wire \$2 ; wire \$3 ; wire [46:0] \$4 ; wire [16:0] \$5 ; wire \$6 ; wire [46:0] \$7 ; wire [16:0] \$8 ; reg \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:200" *) wire battery_fail; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:200" *) wire \battery_fail$25 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:30" *) input [15:0] bram_address; wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:32" *) output [31:0] bram_read_data; reg [31:0] bram_read_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:33" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:199" *) wire [9:0] commutation_count; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:199" *) wire [9:0] \commutation_count$24 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:204" *) wire crc_fail; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:204" *) wire \crc_fail$27 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:205" *) wire done; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:205" *) wire \done$28 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:197" *) wire [15:0] multiturn_count; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:197" *) wire [15:0] \multiturn_count$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:203" *) wire no_response; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:203" *) wire \no_response$26 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:123" *) output req; wire req; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:193" *) wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:28" *) input [1:0] \rx$30 ; wire [1:0] \rx$30 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:193" *) wire \rx$7 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:198" *) wire [15:0] singleturn_count; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:198" *) wire [15:0] \singleturn_count$23 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:63" *) wire [1:0] synced_rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:195" *) reg trigger = 1'h0; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:122" *) wire \trigger$6 ; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:195" *) wire \trigger$8 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:26" *) wire [1:0] tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:27" *) wire [1:0] tx_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:201" *) wire unindexed; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:201" *) wire \unindexed$29 ; assign \$1 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:82" *) 4'h8; assign \$2 = bram_write_enable & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:82" *) \$1 ; assign \$3 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:95" *) bram_address[3:2]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:122" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) trigger <= 1'h0; else trigger <= \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:32" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_read_data <= 32'd0; else bram_read_data <= \$10 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:67" *) \Controller.fanuc_encoders.U$3 \U$3 ( .rx(\rx$30 ), .stage1(synced_rx), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:74" *) \Controller.fanuc_encoders.receiver_0 receiver_0 ( .battery_fail(battery_fail), .commutation_count(commutation_count), .crc_fail(crc_fail), .done(done), .multiturn_count(multiturn_count), .no_response(no_response), .rx(synced_rx[0]), .singleturn_count(singleturn_count), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .trigger(trigger), .unindexed(unindexed) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:74" *) \Controller.fanuc_encoders.receiver_1 receiver_1 ( .battery_fail(\battery_fail$25 ), .commutation_count(\commutation_count$24 ), .crc_fail(\crc_fail$27 ), .done(\done$28 ), .multiturn_count(\multiturn_count$22 ), .no_response(\no_response$26 ), .rx(synced_rx[1]), .singleturn_count(\singleturn_count$23 ), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .trigger(trigger), .unindexed(\unindexed$29 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:65" *) \Controller.fanuc_encoders.request_pulse request_pulse ( .req(req), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .trigger(trigger) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$34 ) begin end (* full_case = 32'd1 *) if (\$2 ) begin \$9 = 1'h1; end else begin \$9 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$34 ) begin end \$10 = bram_read_data; if (\$3 ) begin (* full_case = 32'd1 *) casez (bram_address[1:0]) 2'h0: \$10 = { 16'h0000, multiturn_count }; 2'h1: \$10 = \$4 [31:0]; 2'h2: \$10 = { 15'h0000, \$5 }; 2'h3: begin \$10 [0] = battery_fail; \$10 [2] = no_response; \$10 [3] = crc_fail; \$10 [4] = done; \$10 [1] = unindexed; end endcase end if (\$6 ) begin (* full_case = 32'd1 *) casez (bram_address[1:0]) 2'h0: \$10 = { 16'h0000, \multiturn_count$22 }; 2'h1: \$10 = \$7 [31:0]; 2'h2: \$10 = { 15'h0000, \$8 }; 2'h3: begin \$10 [0] = \battery_fail$25 ; \$10 [2] = \no_response$26 ; \$10 [3] = \crc_fail$27 ; \$10 [4] = \done$28 ; \$10 [1] = \unindexed$29 ; end endcase end end assign tx_enable = 2'h3; assign tx = { req, req }; assign rx = synced_rx[0]; assign \trigger$6 = trigger; assign \rx$7 = synced_rx[1]; assign \trigger$8 = trigger; assign \$4 = { 15'h0000, singleturn_count, 16'h0000 }; assign \$5 = { 1'h0, commutation_count, 6'h00 }; assign \$6 = 1'h0; assign \$7 = { 15'h0000, \singleturn_count$23 , 16'h0000 }; assign \$8 = { 1'h0, \commutation_count$24 , 6'h00 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.fanuc_encoders.U$3 (sync_100_rst, rx, stage1, sync_100_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:28" *) input [1:0] rx; wire [1:0] rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg [1:0] stage0 = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:63" *) output [1:0] stage1; reg [1:0] stage1 = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* init = 2'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:63" *) wire [1:0] synced_rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage0 <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage1 <= stage0; assign synced_rx = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:211" *) (* generator = "Amaranth" *) module \Controller.fanuc_encoders.receiver_0 (sync_100_rst, trigger, no_response, done, crc_fail, multiturn_count, singleturn_count, commutation_count, battery_fail, unindexed, rx, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$35 = 0; wire \$1 ; wire \$10 ; reg \$100 ; reg \$101 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; reg \$15 ; reg \$16 ; reg [7:0] \$17 ; reg [6:0] \$18 ; reg [1:0] \$19 ; wire \$2 ; reg \$20 ; reg [15:0] \$21 ; reg [15:0] \$22 ; reg [9:0] \$23 ; reg \$24 ; reg \$25 ; reg \$26 ; reg \$27 ; reg \$28 ; reg \$29 ; wire \$3 ; reg \$30 ; reg \$31 ; reg \$32 ; reg \$33 ; reg \$34 ; reg \$35 ; reg \$36 ; reg \$37 ; reg \$38 ; reg \$39 ; wire \$4 ; reg \$40 ; reg \$41 ; reg \$42 ; reg \$43 ; reg \$44 ; reg \$45 ; reg \$46 ; reg \$47 ; reg \$48 ; reg \$49 ; wire [7:0] \$5 ; reg \$50 ; reg \$51 ; reg \$52 ; reg \$53 ; reg \$54 ; reg \$55 ; reg \$56 ; reg \$57 ; reg \$58 ; reg \$59 ; wire [8:0] \$6 ; reg \$60 ; reg \$61 ; reg \$62 ; reg \$63 ; reg \$64 ; reg \$65 ; reg \$66 ; reg \$67 ; reg \$68 ; reg \$69 ; wire \$7 ; reg \$70 ; reg \$71 ; reg \$72 ; reg \$73 ; reg \$74 ; reg \$75 ; reg \$76 ; reg \$77 ; reg \$78 ; reg \$79 ; wire \$8 ; reg \$80 ; reg \$81 ; reg \$82 ; reg \$83 ; reg \$84 ; reg \$85 ; reg \$86 ; reg \$87 ; reg \$88 ; reg \$89 ; wire \$9 ; reg \$90 ; reg \$91 ; reg \$92 ; reg \$93 ; reg \$94 ; reg \$95 ; reg \$96 ; reg \$97 ; reg \$98 ; reg \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:200" *) output battery_fail; reg battery_fail = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_10 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_11 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_12 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_13 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_14 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_15 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_16 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_17 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_18 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_19 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_2 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_20 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_21 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_22 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_23 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_24 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_25 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_26 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_27 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_28 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_29 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_3 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_30 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_31 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_32 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_33 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_34 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_35 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_36 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_37 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_38 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_39 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_4 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_40 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_41 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_42 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_43 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_44 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_45 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_46 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_47 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_48 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_49 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_5 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_50 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_51 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_52 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_53 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_54 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_55 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_56 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_57 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_58 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_59 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_6 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_60 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_61 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_62 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_63 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_64 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_65 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_66 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_67 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_68 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_69 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_7 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_70 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_71 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_72 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_73 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_74 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_75 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_8 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_9 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:184" *) reg capture; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:185" *) reg [7:0] cnt = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:199" *) output [9:0] commutation_count; reg [9:0] commutation_count = 10'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:204" *) output crc_fail; reg crc_fail = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:156" *) wire crc_ok; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:157" *) output done; reg done = 1'h0; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [1:0] fsm_state = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:186" *) reg [6:0] idx = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:154" *) wire \input ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:190" *) reg input_prev = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:197" *) output [15:0] multiturn_count; reg [15:0] multiturn_count = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:203" *) output no_response; reg no_response = 1'h0; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:157" *) wire reset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:154" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:198" *) output [15:0] singleturn_count; reg [15:0] singleturn_count = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:187" *) reg [2:0] state; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:155" *) wire strobe; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:195" *) input trigger; wire trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:201" *) output unindexed; reg unindexed = 1'h0; assign \$1 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:227" *) rx; assign \$2 = input_prev & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:227" *) \$1 ; assign \$3 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:240" *) cnt; assign \$4 = rx != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:245" *) input_prev; assign \$5 = idx + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:243" *) 1'h1; assign \$6 = cnt - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:249" *) 1'h1; assign \$7 = idx == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:251" *) 7'h4c; assign \$8 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:260" *) crc_ok; assign \$9 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:286" *) trigger; assign \$10 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:240" *) cnt; assign \$11 = rx != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:245" *) input_prev; assign \$12 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; assign \$13 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$14 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:190" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) input_prev <= 1'h0; else input_prev <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:203" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) no_response <= 1'h0; else no_response <= \$15 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:205" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) done <= 1'h0; else done <= \$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:185" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cnt <= 8'h00; else cnt <= \$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:186" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) idx <= 7'h00; else idx <= \$18 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) fsm_state <= 2'h0; else fsm_state <= \$19 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:204" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_fail <= 1'h0; else crc_fail <= \$20 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:197" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) multiturn_count <= 16'h0000; else multiturn_count <= \$21 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:198" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) singleturn_count <= 16'h0000; else singleturn_count <= \$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:199" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) commutation_count <= 10'h000; else commutation_count <= \$23 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:200" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) battery_fail <= 1'h0; else battery_fail <= \$24 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:201" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) unindexed <= 1'h0; else unindexed <= \$25 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_0 <= 1'h0; else buf_0 <= \$26 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_1 <= 1'h0; else buf_1 <= \$27 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_2 <= 1'h0; else buf_2 <= \$28 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_3 <= 1'h0; else buf_3 <= \$29 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_4 <= 1'h0; else buf_4 <= \$30 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_5 <= 1'h0; else buf_5 <= \$31 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_6 <= 1'h0; else buf_6 <= \$32 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_7 <= 1'h0; else buf_7 <= \$33 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_8 <= 1'h0; else buf_8 <= \$34 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_9 <= 1'h0; else buf_9 <= \$35 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_10 <= 1'h0; else buf_10 <= \$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_11 <= 1'h0; else buf_11 <= \$37 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_12 <= 1'h0; else buf_12 <= \$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_13 <= 1'h0; else buf_13 <= \$39 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_14 <= 1'h0; else buf_14 <= \$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_15 <= 1'h0; else buf_15 <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_16 <= 1'h0; else buf_16 <= \$42 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_17 <= 1'h0; else buf_17 <= \$43 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_18 <= 1'h0; else buf_18 <= \$44 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_19 <= 1'h0; else buf_19 <= \$45 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_20 <= 1'h0; else buf_20 <= \$46 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_21 <= 1'h0; else buf_21 <= \$47 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_22 <= 1'h0; else buf_22 <= \$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_23 <= 1'h0; else buf_23 <= \$49 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_24 <= 1'h0; else buf_24 <= \$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_25 <= 1'h0; else buf_25 <= \$51 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_26 <= 1'h0; else buf_26 <= \$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_27 <= 1'h0; else buf_27 <= \$53 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_28 <= 1'h0; else buf_28 <= \$54 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_29 <= 1'h0; else buf_29 <= \$55 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_30 <= 1'h0; else buf_30 <= \$56 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_31 <= 1'h0; else buf_31 <= \$57 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_32 <= 1'h0; else buf_32 <= \$58 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_33 <= 1'h0; else buf_33 <= \$59 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_34 <= 1'h0; else buf_34 <= \$60 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_35 <= 1'h0; else buf_35 <= \$61 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_36 <= 1'h0; else buf_36 <= \$62 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_37 <= 1'h0; else buf_37 <= \$63 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_38 <= 1'h0; else buf_38 <= \$64 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_39 <= 1'h0; else buf_39 <= \$65 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_40 <= 1'h0; else buf_40 <= \$66 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_41 <= 1'h0; else buf_41 <= \$67 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_42 <= 1'h0; else buf_42 <= \$68 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_43 <= 1'h0; else buf_43 <= \$69 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_44 <= 1'h0; else buf_44 <= \$70 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_45 <= 1'h0; else buf_45 <= \$71 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_46 <= 1'h0; else buf_46 <= \$72 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_47 <= 1'h0; else buf_47 <= \$73 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_48 <= 1'h0; else buf_48 <= \$74 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_49 <= 1'h0; else buf_49 <= \$75 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_50 <= 1'h0; else buf_50 <= \$76 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_51 <= 1'h0; else buf_51 <= \$77 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_52 <= 1'h0; else buf_52 <= \$78 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_53 <= 1'h0; else buf_53 <= \$79 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_54 <= 1'h0; else buf_54 <= \$80 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_55 <= 1'h0; else buf_55 <= \$81 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_56 <= 1'h0; else buf_56 <= \$82 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_57 <= 1'h0; else buf_57 <= \$83 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_58 <= 1'h0; else buf_58 <= \$84 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_59 <= 1'h0; else buf_59 <= \$85 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_60 <= 1'h0; else buf_60 <= \$86 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_61 <= 1'h0; else buf_61 <= \$87 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_62 <= 1'h0; else buf_62 <= \$88 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_63 <= 1'h0; else buf_63 <= \$89 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_64 <= 1'h0; else buf_64 <= \$90 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_65 <= 1'h0; else buf_65 <= \$91 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_66 <= 1'h0; else buf_66 <= \$92 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_67 <= 1'h0; else buf_67 <= \$93 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_68 <= 1'h0; else buf_68 <= \$94 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_69 <= 1'h0; else buf_69 <= \$95 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_70 <= 1'h0; else buf_70 <= \$96 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_71 <= 1'h0; else buf_71 <= \$97 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_72 <= 1'h0; else buf_72 <= \$98 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_73 <= 1'h0; else buf_73 <= \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_74 <= 1'h0; else buf_74 <= \$100 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_75 <= 1'h0; else buf_75 <= \$101 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:213" *) \Controller.fanuc_encoders.receiver_0.crc crc ( .crc_ok(crc_ok), .\input (rx), .reset(done), .strobe(capture), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$15 = no_response; if (trigger) begin \$15 = 1'h1; end casez (fsm_state) 2'h0: if (\$2 ) begin \$15 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$16 = done; casez (fsm_state) 2'h0: if (\$2 ) begin \$16 = 1'h0; end 2'h1: /* empty */; 2'h2: \$16 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$17 = cnt; casez (fsm_state) 2'h0: if (\$2 ) begin \$17 = 8'h90; end 2'h1: (* full_case = 32'd1 *) if (\$3 ) begin \$17 = 8'h60; end else if (\$4 ) begin \$17 = 8'h2f; end else begin \$17 = \$6 [7:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$18 = idx; casez (fsm_state) 2'h0: if (\$2 ) begin \$18 = 7'h00; end 2'h1: if (\$3 ) begin \$18 = \$5 [6:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$19 = fsm_state; casez (fsm_state) 2'h0: if (\$2 ) begin \$19 = 2'h1; end 2'h1: begin if (trigger) begin \$19 = 2'h0; end if (\$7 ) begin \$19 = 2'h2; end end 2'h2: if (\$9 ) begin \$19 = 2'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$20 = crc_fail; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin \$20 = 1'h1; end else begin \$20 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$21 = multiturn_count; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin end else begin \$21 = { buf_51, buf_50, buf_49, buf_48, buf_47, buf_46, buf_45, buf_44, buf_43, buf_42, buf_41, buf_40, buf_39, buf_38, buf_37, buf_36 }; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$22 = singleturn_count; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin end else begin \$22 = { buf_33, buf_32, buf_31, buf_30, buf_29, buf_28, buf_27, buf_26, buf_25, buf_24, buf_23, buf_22, buf_21, buf_20, buf_19, buf_18 }; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$23 = commutation_count; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin end else begin \$23 = { buf_63, buf_62, buf_61, buf_60, buf_59, buf_58, buf_57, buf_56, buf_55, buf_54 }; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$24 = battery_fail; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin end else begin \$24 = buf_5; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$25 = unindexed; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin end else begin \$25 = buf_8; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$26 = buf_0; if (capture) begin casez (idx) 7'h00: \$26 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$27 = buf_1; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: \$27 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$28 = buf_2; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: \$28 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$29 = buf_3; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: \$29 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$30 = buf_4; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: \$30 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$31 = buf_5; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: \$31 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$32 = buf_6; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: \$32 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$33 = buf_7; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: \$33 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$34 = buf_8; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: \$34 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$35 = buf_9; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: \$35 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$36 = buf_10; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: \$36 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$37 = buf_11; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: \$37 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$38 = buf_12; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: \$38 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$39 = buf_13; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: \$39 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$40 = buf_14; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: \$40 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$41 = buf_15; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: \$41 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$42 = buf_16; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: \$42 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$43 = buf_17; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: \$43 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$44 = buf_18; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: \$44 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$45 = buf_19; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: \$45 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$46 = buf_20; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: \$46 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$47 = buf_21; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: \$47 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$48 = buf_22; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: \$48 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$49 = buf_23; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: \$49 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$50 = buf_24; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: \$50 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$51 = buf_25; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: \$51 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$52 = buf_26; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: \$52 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$53 = buf_27; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: \$53 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$54 = buf_28; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: \$54 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$55 = buf_29; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: \$55 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$56 = buf_30; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: \$56 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$57 = buf_31; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: \$57 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$58 = buf_32; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: \$58 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$59 = buf_33; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: \$59 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$60 = buf_34; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: \$60 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$61 = buf_35; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: \$61 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$62 = buf_36; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: \$62 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$63 = buf_37; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: \$63 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$64 = buf_38; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: \$64 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$65 = buf_39; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: \$65 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$66 = buf_40; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: \$66 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$67 = buf_41; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: \$67 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$68 = buf_42; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: \$68 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$69 = buf_43; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: \$69 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$70 = buf_44; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: \$70 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$71 = buf_45; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: \$71 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$72 = buf_46; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: \$72 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$73 = buf_47; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: \$73 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$74 = buf_48; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: \$74 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$75 = buf_49; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: \$75 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$76 = buf_50; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: \$76 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$77 = buf_51; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: \$77 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$78 = buf_52; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: \$78 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$79 = buf_53; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: \$79 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$80 = buf_54; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: \$80 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$81 = buf_55; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: \$81 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$82 = buf_56; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: \$82 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$83 = buf_57; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: \$83 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$84 = buf_58; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: \$84 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$85 = buf_59; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: \$85 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$86 = buf_60; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: \$86 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$87 = buf_61; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: \$87 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$88 = buf_62; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: \$88 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$89 = buf_63; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: \$89 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$90 = buf_64; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: \$90 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$91 = buf_65; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: \$91 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$92 = buf_66; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: \$92 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$93 = buf_67; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: \$93 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$94 = buf_68; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: \$94 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$95 = buf_69; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: \$95 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$96 = buf_70; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: \$96 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$97 = buf_71; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: /* empty */; 7'h47: \$97 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$98 = buf_72; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: /* empty */; 7'h47: /* empty */; 7'h48: \$98 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$99 = buf_73; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: /* empty */; 7'h47: /* empty */; 7'h48: /* empty */; 7'h49: \$99 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$100 = buf_74; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: /* empty */; 7'h47: /* empty */; 7'h48: /* empty */; 7'h49: /* empty */; 7'h4a: \$100 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end \$101 = buf_75; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: /* empty */; 7'h47: /* empty */; 7'h48: /* empty */; 7'h49: /* empty */; 7'h4a: /* empty */; 7'h4b: \$101 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end state = 3'h0; casez (fsm_state) 2'h0: state = 3'h1; 2'h1: state = 3'h2; 2'h2: state = 3'h3; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$35 ) begin end capture = 1'h0; casez (fsm_state) 2'h0: /* empty */; 2'h1: if (\$10 ) begin capture = 1'h1; end endcase end assign \input = rx; assign strobe = capture; assign reset = done; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:161" *) (* generator = "Amaranth" *) module \Controller.fanuc_encoders.receiver_0.crc (sync_100_rst, crc_ok, reset, strobe, \input , sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$36 = 0; wire [5:0] \$1 ; reg [4:0] \$2 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:156" *) output crc_ok; wire crc_ok; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:154" *) input \input ; wire \input ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:157" *) input reset; wire reset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:163" *) reg [4:0] shreg = 5'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:155" *) input strobe; wire strobe; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:164" *) reg [4:0] \xor ; assign crc_ok = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:166" *) shreg; assign \$1 = { shreg, \input } ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:172" *) { 1'h0, \xor }; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:163" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) shreg <= 5'h00; else shreg <= \$2 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$36 ) begin end \xor = 5'h00; if (shreg[4]) begin \xor = 5'h0b; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$36 ) begin end \$2 = shreg; if (strobe) begin \$2 = \$1 [4:0]; end if (reset) begin \$2 = 5'h00; end end endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:211" *) (* generator = "Amaranth" *) module \Controller.fanuc_encoders.receiver_1 (sync_100_rst, trigger, no_response, done, crc_fail, multiturn_count, singleturn_count, commutation_count, battery_fail, unindexed, rx, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$37 = 0; wire \$1 ; wire \$10 ; reg \$100 ; reg \$101 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; reg \$15 ; reg \$16 ; reg [7:0] \$17 ; reg [6:0] \$18 ; reg [1:0] \$19 ; wire \$2 ; reg \$20 ; reg [15:0] \$21 ; reg [15:0] \$22 ; reg [9:0] \$23 ; reg \$24 ; reg \$25 ; reg \$26 ; reg \$27 ; reg \$28 ; reg \$29 ; wire \$3 ; reg \$30 ; reg \$31 ; reg \$32 ; reg \$33 ; reg \$34 ; reg \$35 ; reg \$36 ; reg \$37 ; reg \$38 ; reg \$39 ; wire \$4 ; reg \$40 ; reg \$41 ; reg \$42 ; reg \$43 ; reg \$44 ; reg \$45 ; reg \$46 ; reg \$47 ; reg \$48 ; reg \$49 ; wire [7:0] \$5 ; reg \$50 ; reg \$51 ; reg \$52 ; reg \$53 ; reg \$54 ; reg \$55 ; reg \$56 ; reg \$57 ; reg \$58 ; reg \$59 ; wire [8:0] \$6 ; reg \$60 ; reg \$61 ; reg \$62 ; reg \$63 ; reg \$64 ; reg \$65 ; reg \$66 ; reg \$67 ; reg \$68 ; reg \$69 ; wire \$7 ; reg \$70 ; reg \$71 ; reg \$72 ; reg \$73 ; reg \$74 ; reg \$75 ; reg \$76 ; reg \$77 ; reg \$78 ; reg \$79 ; wire \$8 ; reg \$80 ; reg \$81 ; reg \$82 ; reg \$83 ; reg \$84 ; reg \$85 ; reg \$86 ; reg \$87 ; reg \$88 ; reg \$89 ; wire \$9 ; reg \$90 ; reg \$91 ; reg \$92 ; reg \$93 ; reg \$94 ; reg \$95 ; reg \$96 ; reg \$97 ; reg \$98 ; reg \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:200" *) output battery_fail; reg battery_fail = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_10 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_11 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_12 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_13 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_14 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_15 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_16 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_17 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_18 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_19 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_2 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_20 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_21 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_22 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_23 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_24 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_25 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_26 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_27 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_28 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_29 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_3 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_30 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_31 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_32 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_33 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_34 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_35 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_36 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_37 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_38 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_39 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_4 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_40 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_41 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_42 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_43 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_44 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_45 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_46 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_47 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_48 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_49 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_5 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_50 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_51 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_52 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_53 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_54 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_55 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_56 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_57 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_58 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_59 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_6 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_60 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_61 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_62 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_63 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_64 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_65 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_66 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_67 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_68 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_69 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_7 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_70 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_71 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_72 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_73 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_74 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_75 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_8 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) reg buf_9 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:184" *) reg capture; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:185" *) reg [7:0] cnt = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:199" *) output [9:0] commutation_count; reg [9:0] commutation_count = 10'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:204" *) output crc_fail; reg crc_fail = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:156" *) wire crc_ok; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:157" *) output done; reg done = 1'h0; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [1:0] fsm_state = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:186" *) reg [6:0] idx = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:154" *) wire \input ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:190" *) reg input_prev = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:197" *) output [15:0] multiturn_count; reg [15:0] multiturn_count = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:203" *) output no_response; reg no_response = 1'h0; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:157" *) wire reset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:154" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:198" *) output [15:0] singleturn_count; reg [15:0] singleturn_count = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:187" *) reg [2:0] state; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:155" *) wire strobe; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:195" *) input trigger; wire trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:201" *) output unindexed; reg unindexed = 1'h0; assign \$1 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:227" *) rx; assign \$2 = input_prev & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:227" *) \$1 ; assign \$3 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:240" *) cnt; assign \$4 = rx != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:245" *) input_prev; assign \$5 = idx + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:243" *) 1'h1; assign \$6 = cnt - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:249" *) 1'h1; assign \$7 = idx == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:251" *) 7'h4c; assign \$8 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:260" *) crc_ok; assign \$9 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:286" *) trigger; assign \$10 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:240" *) cnt; assign \$11 = rx != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:245" *) input_prev; assign \$12 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; assign \$13 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$14 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:190" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) input_prev <= 1'h0; else input_prev <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:203" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) no_response <= 1'h0; else no_response <= \$15 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:205" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) done <= 1'h0; else done <= \$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:185" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cnt <= 8'h00; else cnt <= \$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:186" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) idx <= 7'h00; else idx <= \$18 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) fsm_state <= 2'h0; else fsm_state <= \$19 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:204" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_fail <= 1'h0; else crc_fail <= \$20 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:197" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) multiturn_count <= 16'h0000; else multiturn_count <= \$21 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:198" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) singleturn_count <= 16'h0000; else singleturn_count <= \$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:199" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) commutation_count <= 10'h000; else commutation_count <= \$23 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:200" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) battery_fail <= 1'h0; else battery_fail <= \$24 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:201" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) unindexed <= 1'h0; else unindexed <= \$25 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_0 <= 1'h0; else buf_0 <= \$26 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_1 <= 1'h0; else buf_1 <= \$27 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_2 <= 1'h0; else buf_2 <= \$28 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_3 <= 1'h0; else buf_3 <= \$29 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_4 <= 1'h0; else buf_4 <= \$30 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_5 <= 1'h0; else buf_5 <= \$31 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_6 <= 1'h0; else buf_6 <= \$32 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_7 <= 1'h0; else buf_7 <= \$33 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_8 <= 1'h0; else buf_8 <= \$34 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_9 <= 1'h0; else buf_9 <= \$35 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_10 <= 1'h0; else buf_10 <= \$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_11 <= 1'h0; else buf_11 <= \$37 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_12 <= 1'h0; else buf_12 <= \$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_13 <= 1'h0; else buf_13 <= \$39 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_14 <= 1'h0; else buf_14 <= \$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_15 <= 1'h0; else buf_15 <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_16 <= 1'h0; else buf_16 <= \$42 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_17 <= 1'h0; else buf_17 <= \$43 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_18 <= 1'h0; else buf_18 <= \$44 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_19 <= 1'h0; else buf_19 <= \$45 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_20 <= 1'h0; else buf_20 <= \$46 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_21 <= 1'h0; else buf_21 <= \$47 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_22 <= 1'h0; else buf_22 <= \$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_23 <= 1'h0; else buf_23 <= \$49 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_24 <= 1'h0; else buf_24 <= \$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_25 <= 1'h0; else buf_25 <= \$51 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_26 <= 1'h0; else buf_26 <= \$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_27 <= 1'h0; else buf_27 <= \$53 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_28 <= 1'h0; else buf_28 <= \$54 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_29 <= 1'h0; else buf_29 <= \$55 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_30 <= 1'h0; else buf_30 <= \$56 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_31 <= 1'h0; else buf_31 <= \$57 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_32 <= 1'h0; else buf_32 <= \$58 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_33 <= 1'h0; else buf_33 <= \$59 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_34 <= 1'h0; else buf_34 <= \$60 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_35 <= 1'h0; else buf_35 <= \$61 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_36 <= 1'h0; else buf_36 <= \$62 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_37 <= 1'h0; else buf_37 <= \$63 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_38 <= 1'h0; else buf_38 <= \$64 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_39 <= 1'h0; else buf_39 <= \$65 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_40 <= 1'h0; else buf_40 <= \$66 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_41 <= 1'h0; else buf_41 <= \$67 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_42 <= 1'h0; else buf_42 <= \$68 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_43 <= 1'h0; else buf_43 <= \$69 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_44 <= 1'h0; else buf_44 <= \$70 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_45 <= 1'h0; else buf_45 <= \$71 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_46 <= 1'h0; else buf_46 <= \$72 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_47 <= 1'h0; else buf_47 <= \$73 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_48 <= 1'h0; else buf_48 <= \$74 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_49 <= 1'h0; else buf_49 <= \$75 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_50 <= 1'h0; else buf_50 <= \$76 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_51 <= 1'h0; else buf_51 <= \$77 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_52 <= 1'h0; else buf_52 <= \$78 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_53 <= 1'h0; else buf_53 <= \$79 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_54 <= 1'h0; else buf_54 <= \$80 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_55 <= 1'h0; else buf_55 <= \$81 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_56 <= 1'h0; else buf_56 <= \$82 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_57 <= 1'h0; else buf_57 <= \$83 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_58 <= 1'h0; else buf_58 <= \$84 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_59 <= 1'h0; else buf_59 <= \$85 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_60 <= 1'h0; else buf_60 <= \$86 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_61 <= 1'h0; else buf_61 <= \$87 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_62 <= 1'h0; else buf_62 <= \$88 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_63 <= 1'h0; else buf_63 <= \$89 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_64 <= 1'h0; else buf_64 <= \$90 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_65 <= 1'h0; else buf_65 <= \$91 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_66 <= 1'h0; else buf_66 <= \$92 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_67 <= 1'h0; else buf_67 <= \$93 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_68 <= 1'h0; else buf_68 <= \$94 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_69 <= 1'h0; else buf_69 <= \$95 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_70 <= 1'h0; else buf_70 <= \$96 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_71 <= 1'h0; else buf_71 <= \$97 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_72 <= 1'h0; else buf_72 <= \$98 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_73 <= 1'h0; else buf_73 <= \$99 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_74 <= 1'h0; else buf_74 <= \$100 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:219" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_75 <= 1'h0; else buf_75 <= \$101 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:213" *) \Controller.fanuc_encoders.receiver_1.crc crc ( .crc_ok(crc_ok), .\input (rx), .reset(done), .strobe(capture), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$15 = no_response; if (trigger) begin \$15 = 1'h1; end casez (fsm_state) 2'h0: if (\$2 ) begin \$15 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$16 = done; casez (fsm_state) 2'h0: if (\$2 ) begin \$16 = 1'h0; end 2'h1: /* empty */; 2'h2: \$16 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$17 = cnt; casez (fsm_state) 2'h0: if (\$2 ) begin \$17 = 8'h90; end 2'h1: (* full_case = 32'd1 *) if (\$3 ) begin \$17 = 8'h60; end else if (\$4 ) begin \$17 = 8'h2f; end else begin \$17 = \$6 [7:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$18 = idx; casez (fsm_state) 2'h0: if (\$2 ) begin \$18 = 7'h00; end 2'h1: if (\$3 ) begin \$18 = \$5 [6:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$19 = fsm_state; casez (fsm_state) 2'h0: if (\$2 ) begin \$19 = 2'h1; end 2'h1: begin if (trigger) begin \$19 = 2'h0; end if (\$7 ) begin \$19 = 2'h2; end end 2'h2: if (\$9 ) begin \$19 = 2'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$20 = crc_fail; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin \$20 = 1'h1; end else begin \$20 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$21 = multiturn_count; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin end else begin \$21 = { buf_51, buf_50, buf_49, buf_48, buf_47, buf_46, buf_45, buf_44, buf_43, buf_42, buf_41, buf_40, buf_39, buf_38, buf_37, buf_36 }; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$22 = singleturn_count; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin end else begin \$22 = { buf_33, buf_32, buf_31, buf_30, buf_29, buf_28, buf_27, buf_26, buf_25, buf_24, buf_23, buf_22, buf_21, buf_20, buf_19, buf_18 }; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$23 = commutation_count; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin end else begin \$23 = { buf_63, buf_62, buf_61, buf_60, buf_59, buf_58, buf_57, buf_56, buf_55, buf_54 }; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$24 = battery_fail; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin end else begin \$24 = buf_5; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$25 = unindexed; casez (fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: (* full_case = 32'd1 *) if (no_response) begin end else if (\$8 ) begin end else begin \$25 = buf_8; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$26 = buf_0; if (capture) begin casez (idx) 7'h00: \$26 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$27 = buf_1; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: \$27 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$28 = buf_2; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: \$28 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$29 = buf_3; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: \$29 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$30 = buf_4; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: \$30 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$31 = buf_5; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: \$31 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$32 = buf_6; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: \$32 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$33 = buf_7; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: \$33 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$34 = buf_8; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: \$34 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$35 = buf_9; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: \$35 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$36 = buf_10; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: \$36 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$37 = buf_11; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: \$37 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$38 = buf_12; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: \$38 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$39 = buf_13; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: \$39 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$40 = buf_14; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: \$40 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$41 = buf_15; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: \$41 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$42 = buf_16; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: \$42 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$43 = buf_17; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: \$43 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$44 = buf_18; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: \$44 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$45 = buf_19; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: \$45 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$46 = buf_20; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: \$46 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$47 = buf_21; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: \$47 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$48 = buf_22; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: \$48 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$49 = buf_23; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: \$49 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$50 = buf_24; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: \$50 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$51 = buf_25; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: \$51 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$52 = buf_26; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: \$52 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$53 = buf_27; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: \$53 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$54 = buf_28; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: \$54 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$55 = buf_29; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: \$55 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$56 = buf_30; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: \$56 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$57 = buf_31; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: \$57 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$58 = buf_32; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: \$58 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$59 = buf_33; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: \$59 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$60 = buf_34; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: \$60 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$61 = buf_35; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: \$61 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$62 = buf_36; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: \$62 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$63 = buf_37; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: \$63 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$64 = buf_38; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: \$64 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$65 = buf_39; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: \$65 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$66 = buf_40; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: \$66 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$67 = buf_41; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: \$67 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$68 = buf_42; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: \$68 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$69 = buf_43; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: \$69 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$70 = buf_44; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: \$70 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$71 = buf_45; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: \$71 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$72 = buf_46; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: \$72 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$73 = buf_47; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: \$73 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$74 = buf_48; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: \$74 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$75 = buf_49; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: \$75 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$76 = buf_50; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: \$76 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$77 = buf_51; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: \$77 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$78 = buf_52; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: \$78 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$79 = buf_53; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: \$79 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$80 = buf_54; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: \$80 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$81 = buf_55; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: \$81 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$82 = buf_56; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: \$82 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$83 = buf_57; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: \$83 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$84 = buf_58; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: \$84 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$85 = buf_59; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: \$85 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$86 = buf_60; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: \$86 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$87 = buf_61; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: \$87 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$88 = buf_62; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: \$88 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$89 = buf_63; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: \$89 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$90 = buf_64; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: \$90 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$91 = buf_65; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: \$91 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$92 = buf_66; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: \$92 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$93 = buf_67; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: \$93 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$94 = buf_68; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: \$94 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$95 = buf_69; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: \$95 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$96 = buf_70; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: \$96 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$97 = buf_71; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: /* empty */; 7'h47: \$97 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$98 = buf_72; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: /* empty */; 7'h47: /* empty */; 7'h48: \$98 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$99 = buf_73; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: /* empty */; 7'h47: /* empty */; 7'h48: /* empty */; 7'h49: \$99 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$100 = buf_74; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: /* empty */; 7'h47: /* empty */; 7'h48: /* empty */; 7'h49: /* empty */; 7'h4a: \$100 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end \$101 = buf_75; if (capture) begin casez (idx) 7'h00: /* empty */; 7'h01: /* empty */; 7'h02: /* empty */; 7'h03: /* empty */; 7'h04: /* empty */; 7'h05: /* empty */; 7'h06: /* empty */; 7'h07: /* empty */; 7'h08: /* empty */; 7'h09: /* empty */; 7'h0a: /* empty */; 7'h0b: /* empty */; 7'h0c: /* empty */; 7'h0d: /* empty */; 7'h0e: /* empty */; 7'h0f: /* empty */; 7'h10: /* empty */; 7'h11: /* empty */; 7'h12: /* empty */; 7'h13: /* empty */; 7'h14: /* empty */; 7'h15: /* empty */; 7'h16: /* empty */; 7'h17: /* empty */; 7'h18: /* empty */; 7'h19: /* empty */; 7'h1a: /* empty */; 7'h1b: /* empty */; 7'h1c: /* empty */; 7'h1d: /* empty */; 7'h1e: /* empty */; 7'h1f: /* empty */; 7'h20: /* empty */; 7'h21: /* empty */; 7'h22: /* empty */; 7'h23: /* empty */; 7'h24: /* empty */; 7'h25: /* empty */; 7'h26: /* empty */; 7'h27: /* empty */; 7'h28: /* empty */; 7'h29: /* empty */; 7'h2a: /* empty */; 7'h2b: /* empty */; 7'h2c: /* empty */; 7'h2d: /* empty */; 7'h2e: /* empty */; 7'h2f: /* empty */; 7'h30: /* empty */; 7'h31: /* empty */; 7'h32: /* empty */; 7'h33: /* empty */; 7'h34: /* empty */; 7'h35: /* empty */; 7'h36: /* empty */; 7'h37: /* empty */; 7'h38: /* empty */; 7'h39: /* empty */; 7'h3a: /* empty */; 7'h3b: /* empty */; 7'h3c: /* empty */; 7'h3d: /* empty */; 7'h3e: /* empty */; 7'h3f: /* empty */; 7'h40: /* empty */; 7'h41: /* empty */; 7'h42: /* empty */; 7'h43: /* empty */; 7'h44: /* empty */; 7'h45: /* empty */; 7'h46: /* empty */; 7'h47: /* empty */; 7'h48: /* empty */; 7'h49: /* empty */; 7'h4a: /* empty */; 7'h4b: \$101 = rx; endcase end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end state = 3'h0; casez (fsm_state) 2'h0: state = 3'h1; 2'h1: state = 3'h2; 2'h2: state = 3'h3; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$37 ) begin end capture = 1'h0; casez (fsm_state) 2'h0: /* empty */; 2'h1: if (\$10 ) begin capture = 1'h1; end endcase end assign \input = rx; assign strobe = capture; assign reset = done; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:161" *) (* generator = "Amaranth" *) module \Controller.fanuc_encoders.receiver_1.crc (sync_100_rst, crc_ok, reset, strobe, \input , sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$38 = 0; wire [5:0] \$1 ; reg [4:0] \$2 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:156" *) output crc_ok; wire crc_ok; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:154" *) input \input ; wire \input ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:157" *) input reset; wire reset; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:163" *) reg [4:0] shreg = 5'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:155" *) input strobe; wire strobe; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:164" *) reg [4:0] \xor ; assign crc_ok = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:166" *) shreg; assign \$1 = { shreg, \input } ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:172" *) { 1'h0, \xor }; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:163" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) shreg <= 5'h00; else shreg <= \$2 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$38 ) begin end \xor = 5'h00; if (shreg[4]) begin \xor = 5'h0b; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$38 ) begin end \$2 = shreg; if (strobe) begin \$2 = \$1 [4:0]; end if (reset) begin \$2 = 5'h00; end end endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:127" *) (* generator = "Amaranth" *) module \Controller.fanuc_encoders.request_pulse (sync_100_rst, trigger, req, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$39 = 0; wire [10:0] \$1 ; wire \$2 ; wire \$3 ; wire [10:0] \$4 ; wire \$5 ; wire \$6 ; reg [9:0] \$7 ; reg \$8 ; reg \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:129" *) reg [9:0] cnt = 10'h000; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg fsm_state = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:123" *) output req; reg req = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:122" *) input trigger; wire trigger; assign \$1 = cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:131" *) 1'h1; assign \$2 = cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:141" *) 10'h31f; assign \$3 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:143" *) trigger; assign \$4 = cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:147" *) 1'h1; assign \$5 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:129" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) cnt <= 10'h000; else cnt <= \$7 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\fanuc_encoder.py:123" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) req <= 1'h0; else req <= \$8 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) fsm_state <= 1'h0; else fsm_state <= \$9 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$39 ) begin end \$7 = \$1 [9:0]; (* full_case = 32'd1 *) casez (fsm_state) 1'h0: if (trigger) begin \$7 = 10'h000; end 1'h1: (* full_case = 32'd1 *) if (\$2 ) begin end else begin \$7 = \$4 [9:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$39 ) begin end \$8 = req; (* full_case = 32'd1 *) casez (fsm_state) 1'h0: if (trigger) begin \$8 = 1'h1; end 1'h1: if (\$2 ) begin \$8 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$39 ) begin end \$9 = fsm_state; (* full_case = 32'd1 *) casez (fsm_state) 1'h0: if (trigger) begin \$9 = 1'h1; end 1'h1: if (\$2 ) begin if (\$3 ) begin \$9 = 1'h0; end end endcase end assign \$6 = fsm_state; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:81" *) (* generator = "Amaranth" *) module \Controller.fanuc_encoders_shift_dma_3 (sync_100_rst, read_bram_address_input, write_bram_address_input, read_node_address_input, write_node_address_input, data_input, read_complete_input, write_complete_input, bram_read_data, write_bram_address_output, read_bram_address_output, write_node_address_output, read_node_address_output, write_complete_output, data_output, read_complete_output, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$40 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; reg \$15 ; reg [31:0] \$16 ; reg \$17 ; reg \$18 ; wire \$2 ; wire \$3 ; wire \$4 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) output [15:0] bram_address; reg [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) input [31:0] bram_read_data; wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) output [31:0] bram_write_data; reg [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) output bram_write_enable; reg bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) reg [31:0] buf_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) reg [15:0] buf_read_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) reg buf_read_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) reg [7:0] buf_read_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) reg [15:0] buf_write_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) reg buf_write_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) reg [7:0] buf_write_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) input [31:0] data_input; wire [31:0] data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) output [31:0] data_output; reg [31:0] data_output = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) input [15:0] read_bram_address_input; wire [15:0] read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) output [15:0] read_bram_address_output; reg [15:0] read_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) input read_complete_input; wire read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) output read_complete_output; reg read_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) reg read_next = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) input [7:0] read_node_address_input; wire [7:0] read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) output [7:0] read_node_address_output; reg [7:0] read_node_address_output = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) input [15:0] write_bram_address_input; wire [15:0] write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) output [15:0] write_bram_address_output; reg [15:0] write_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) input write_complete_input; wire write_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) output write_complete_output; reg write_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) input [7:0] write_node_address_input; wire [7:0] write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) output [7:0] write_node_address_output; reg [7:0] write_node_address_output = 8'h00; assign \$1 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 2'h3; assign \$2 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$3 = \$1 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$2 ; assign \$4 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 2'h3; assign \$5 = \$4 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$6 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$7 = \$5 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$6 ; assign \$8 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 2'h3; assign \$9 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$10 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$9 ; assign \$11 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 2'h3; assign \$12 = \$11 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$13 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$13 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_bram_address <= 16'h0000; else buf_write_bram_address <= write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_bram_address <= 16'h0000; else buf_read_bram_address <= read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_node_address <= 8'h00; else buf_write_node_address <= write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_node_address <= 8'h00; else buf_read_node_address <= read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_bram_address_output <= 16'h0000; else write_bram_address_output <= buf_write_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_bram_address_output <= 16'h0000; else read_bram_address_output <= buf_read_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_node_address_output <= 8'h00; else write_node_address_output <= buf_write_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_node_address_output <= 8'h00; else read_node_address_output <= buf_read_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_data <= 32'd0; else buf_data <= data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_complete <= 1'h0; else buf_read_complete <= read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_complete_output <= 1'h0; else write_complete_output <= buf_write_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_next <= 1'h0; else read_next <= \$15 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_output <= 32'd0; else data_output <= \$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_complete_output <= 1'h0; else read_complete_output <= \$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_complete <= 1'h0; else buf_write_complete <= \$18 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$40 ) begin end \$15 = read_next; if (\$3 ) begin \$15 = 1'h1; end else if (read_next) begin \$15 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$40 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$16 = bram_read_data; end else begin \$16 = buf_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$40 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$17 = 1'h1; end else begin \$17 = buf_read_complete; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$40 ) begin end (* full_case = 32'd1 *) if (\$7 ) begin \$18 = 1'h1; end else begin \$18 = write_complete_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$40 ) begin end bram_address = 16'h0000; if (\$10 ) begin bram_address = read_bram_address_input; end if (\$14 ) begin bram_address = write_bram_address_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$40 ) begin end bram_write_data = 32'd0; if (\$14 ) begin bram_write_data = data_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$40 ) begin end (* full_case = 32'd1 *) if (\$14 ) begin bram_write_enable = 1'h1; end else begin bram_write_enable = 1'h0; end end endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:168" *) (* generator = "Amaranth" *) module \Controller.serial_card_B (sync_25_clk, slotIn, sync_100_rst, sync_25_rst, rs422_tx, slotOut, slotOutEnable, rs422_rx, bram_read_data, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$41 = 0; reg [31:0] \$1 ; reg [31:0] \$10 ; reg [9:0] \$2 ; reg [9:0] \$3 ; reg [6:0] \$4 ; reg \$5 ; reg [6:0] \$6 ; reg [7:0] \$7 ; reg [2:0] \$8 ; reg \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:46" *) input [15:0] bram_address; wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:48" *) output [31:0] bram_read_data; reg [31:0] bram_read_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:47" *) input [31:0] bram_write_data; wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:49" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:22" *) wire busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:30" *) reg [2:0] byte_count = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:31" *) reg [31:0] data_in = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:32" *) wire [31:0] data_out; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:28" *) reg [6:0] device_address = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:24" *) wire error; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:126" *) reg [6:0] quadrature_mode_enable = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:26" *) reg read = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:29" *) reg [7:0] register_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:125" *) reg [9:0] rs422_mode_enable = 10'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:39" *) output [9:0] rs422_rx; reg [9:0] rs422_rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:40" *) input [9:0] rs422_tx; wire [9:0] rs422_tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:124" *) reg [9:0] rs485_mode_enable = 10'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:35" *) reg [9:0] rs485_rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:36" *) wire [9:0] rs485_tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:37" *) wire [9:0] rs485_tx_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:16" *) wire scl; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:17" *) wire scl_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:18" *) wire sda_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:19" *) wire sda_out; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:20" *) wire sda_out_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:18" *) input [21:0] slotIn; wire [21:0] slotIn; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:16" *) output [21:0] slotOut; reg [21:0] slotOut; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:17" *) output [21:0] slotOutEnable; reg [21:0] slotOutEnable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:23" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:269" *) input sync_25_clk; wire sync_25_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:269" *) input sync_25_rst; wire sync_25_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:48" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_read_data <= 32'd0; else bram_read_data <= \$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:124" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rs485_mode_enable <= 10'h000; else rs485_mode_enable <= \$2 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:125" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rs422_mode_enable <= 10'h000; else rs422_mode_enable <= \$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:126" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) quadrature_mode_enable <= 7'h00; else quadrature_mode_enable <= \$4 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:26" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read <= 1'h0; else read <= \$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:28" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) device_address <= 7'h00; else device_address <= \$6 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:29" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) register_address <= 8'h00; else register_address <= \$7 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:30" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) byte_count <= 3'h0; else byte_count <= \$8 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:23" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start <= 1'h0; else start <= \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:31" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_in <= 32'd0; else data_in <= \$10 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:171" *) \Controller.serial_card_B.i2c i2c ( .busy(busy), .byte_count(byte_count), .data_in(data_in), .data_out(data_out), .device_address(device_address), .error(error), .read(read), .register_address(register_address), .scl(scl), .scl_enable(scl_enable), .sda_in(slotIn[21]), .sda_out_enable(sda_out_enable), .start(start), .sync_25_clk(sync_25_clk), .sync_25_rst(sync_25_rst) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end slotOut[19:0] = 20'h00000; if (rs422_mode_enable[0]) begin slotOut[19] = rs422_tx[0]; end else if (rs485_mode_enable[0]) begin slotOut[18] = 1'h0; end if (rs422_mode_enable[1]) begin slotOut[9] = rs422_tx[1]; end else if (rs485_mode_enable[1]) begin slotOut[8] = 1'h0; end if (rs422_mode_enable[2]) begin slotOut[17] = rs422_tx[2]; end else if (rs485_mode_enable[2]) begin slotOut[16] = 1'h0; end if (rs422_mode_enable[3]) begin slotOut[7] = rs422_tx[3]; end else if (rs485_mode_enable[3]) begin slotOut[6] = 1'h0; end if (rs422_mode_enable[4]) begin slotOut[15] = rs422_tx[4]; end else if (rs485_mode_enable[4]) begin slotOut[14] = 1'h0; end if (rs422_mode_enable[5]) begin slotOut[5] = rs422_tx[5]; end else if (rs485_mode_enable[5]) begin slotOut[4] = 1'h0; end if (rs422_mode_enable[6]) begin slotOut[13] = rs422_tx[6]; end else if (rs485_mode_enable[6]) begin slotOut[12] = 1'h0; end if (rs422_mode_enable[7]) begin slotOut[3] = rs422_tx[7]; end else if (rs485_mode_enable[7]) begin slotOut[2] = 1'h0; end if (rs422_mode_enable[8]) begin slotOut[11] = rs422_tx[8]; end else if (rs485_mode_enable[8]) begin slotOut[10] = 1'h0; end if (rs422_mode_enable[9]) begin slotOut[1] = rs422_tx[9]; end else if (rs485_mode_enable[9]) begin slotOut[0] = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end slotOutEnable[19:0] = 20'h00000; if (rs422_mode_enable[0]) begin slotOutEnable[19] = 1'h1; end else if (rs485_mode_enable[0]) begin slotOutEnable[18] = 1'h1; slotOutEnable[19] = 1'h0; end if (rs422_mode_enable[1]) begin slotOutEnable[9] = 1'h1; end else if (rs485_mode_enable[1]) begin slotOutEnable[8] = 1'h1; slotOutEnable[9] = 1'h0; end if (rs422_mode_enable[2]) begin slotOutEnable[17] = 1'h1; end else if (rs485_mode_enable[2]) begin slotOutEnable[16] = 1'h1; slotOutEnable[17] = 1'h0; end if (rs422_mode_enable[3]) begin slotOutEnable[7] = 1'h1; end else if (rs485_mode_enable[3]) begin slotOutEnable[6] = 1'h1; slotOutEnable[7] = 1'h0; end if (rs422_mode_enable[4]) begin slotOutEnable[15] = 1'h1; end else if (rs485_mode_enable[4]) begin slotOutEnable[14] = 1'h1; slotOutEnable[15] = 1'h0; end if (rs422_mode_enable[5]) begin slotOutEnable[5] = 1'h1; end else if (rs485_mode_enable[5]) begin slotOutEnable[4] = 1'h1; slotOutEnable[5] = 1'h0; end if (rs422_mode_enable[6]) begin slotOutEnable[13] = 1'h1; end else if (rs485_mode_enable[6]) begin slotOutEnable[12] = 1'h1; slotOutEnable[13] = 1'h0; end if (rs422_mode_enable[7]) begin slotOutEnable[3] = 1'h1; end else if (rs485_mode_enable[7]) begin slotOutEnable[2] = 1'h1; slotOutEnable[3] = 1'h0; end if (rs422_mode_enable[8]) begin slotOutEnable[11] = 1'h1; end else if (rs485_mode_enable[8]) begin slotOutEnable[10] = 1'h1; slotOutEnable[11] = 1'h0; end if (rs422_mode_enable[9]) begin slotOutEnable[1] = 1'h1; end else if (rs485_mode_enable[9]) begin slotOutEnable[0] = 1'h1; slotOutEnable[1] = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end rs422_rx = 10'h000; if (rs422_mode_enable[0]) begin rs422_rx[0] = slotIn[18]; end if (rs422_mode_enable[1]) begin rs422_rx[1] = slotIn[8]; end if (rs422_mode_enable[2]) begin rs422_rx[2] = slotIn[16]; end if (rs422_mode_enable[3]) begin rs422_rx[3] = slotIn[6]; end if (rs422_mode_enable[4]) begin rs422_rx[4] = slotIn[14]; end if (rs422_mode_enable[5]) begin rs422_rx[5] = slotIn[4]; end if (rs422_mode_enable[6]) begin rs422_rx[6] = slotIn[12]; end if (rs422_mode_enable[7]) begin rs422_rx[7] = slotIn[2]; end if (rs422_mode_enable[8]) begin rs422_rx[8] = slotIn[10]; end if (rs422_mode_enable[9]) begin rs422_rx[9] = slotIn[0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end rs485_rx = 10'h000; if (rs422_mode_enable[0]) begin end else if (rs485_mode_enable[0]) begin rs485_rx[0] = slotIn[19]; end if (rs422_mode_enable[1]) begin end else if (rs485_mode_enable[1]) begin rs485_rx[1] = slotIn[9]; end if (rs422_mode_enable[2]) begin end else if (rs485_mode_enable[2]) begin rs485_rx[2] = slotIn[17]; end if (rs422_mode_enable[3]) begin end else if (rs485_mode_enable[3]) begin rs485_rx[3] = slotIn[7]; end if (rs422_mode_enable[4]) begin end else if (rs485_mode_enable[4]) begin rs485_rx[4] = slotIn[15]; end if (rs422_mode_enable[5]) begin end else if (rs485_mode_enable[5]) begin rs485_rx[5] = slotIn[5]; end if (rs422_mode_enable[6]) begin end else if (rs485_mode_enable[6]) begin rs485_rx[6] = slotIn[13]; end if (rs422_mode_enable[7]) begin end else if (rs485_mode_enable[7]) begin rs485_rx[7] = slotIn[3]; end if (rs422_mode_enable[8]) begin end else if (rs485_mode_enable[8]) begin rs485_rx[8] = slotIn[11]; end if (rs422_mode_enable[9]) begin end else if (rs485_mode_enable[9]) begin rs485_rx[9] = slotIn[1]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end \$1 = bram_read_data; casez (bram_address) 16'h0000: \$1 = 32'd0; 16'h0001: \$1 = 32'd0; 16'h0003: \$1 = 32'd0; 16'h0002: \$1 = data_out; 16'h0004: \$1 = { 30'h00000000, error, busy }; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end \$2 = rs485_mode_enable; casez (bram_address) 16'h0000: if (bram_write_enable) begin \$2 = bram_write_data[9:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end \$3 = rs422_mode_enable; casez (bram_address) 16'h0000: if (bram_write_enable) begin \$3 = bram_write_data[19:10]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end \$4 = quadrature_mode_enable; casez (bram_address) 16'h0000: if (bram_write_enable) begin \$4 = bram_write_data[26:20]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end \$5 = read; casez (bram_address) 16'h0000: /* empty */; 16'h0001: if (bram_write_enable) begin \$5 = bram_write_data[0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end \$6 = device_address; casez (bram_address) 16'h0000: /* empty */; 16'h0001: if (bram_write_enable) begin \$6 = bram_write_data[7:1]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end \$7 = register_address; casez (bram_address) 16'h0000: /* empty */; 16'h0001: if (bram_write_enable) begin \$7 = bram_write_data[15:8]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end \$8 = byte_count; casez (bram_address) 16'h0000: /* empty */; 16'h0001: if (bram_write_enable) begin \$8 = bram_write_data[18:16]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end \$9 = start; casez (bram_address) 16'h0000: /* empty */; 16'h0001: if (bram_write_enable) begin \$9 = bram_write_data[19]; end endcase if (busy) begin \$9 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$41 ) begin end \$10 = data_in; casez (bram_address) 16'h0000: /* empty */; 16'h0001: /* empty */; 16'h0003: if (bram_write_enable) begin \$10 = bram_write_data; end endcase end assign sda_in = slotIn[21]; assign sda_out = 1'h0; assign rs485_tx_enable = 10'h000; assign rs485_tx = 10'h000; always @* slotOutEnable[21] = sda_out_enable; always @* slotOutEnable[20] = scl_enable; always @* slotOut[21] = 1'h0; always @* slotOut[20] = scl; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:42" *) (* generator = "Amaranth" *) module \Controller.serial_card_B.i2c (sda_in, sync_25_rst, sda_out_enable, read, device_address, register_address, byte_count, start, data_in, scl, busy, scl_enable, error, data_out, sync_25_clk); reg \$auto$verilog_backend.cc:2352:dump_module$42 = 0; wire \$1 ; wire \$10 ; wire [5:0] \$11 ; wire [5:0] \$12 ; wire \$13 ; wire \$14 ; wire [3:0] \$15 ; wire \$16 ; wire [3:0] \$17 ; wire [3:0] \$18 ; wire \$19 ; wire \$2 ; wire [5:0] \$20 ; wire [5:0] \$21 ; wire \$22 ; wire [3:0] \$23 ; wire [3:0] \$24 ; wire [3:0] \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire [5:0] \$3 ; wire \$30 ; wire \$31 ; wire \$32 ; wire \$33 ; wire \$34 ; wire \$35 ; wire \$36 ; wire \$37 ; wire \$38 ; wire \$39 ; wire \$4 ; wire \$40 ; reg \$41 ; reg [4:0] \$42 ; reg [3:0] \$43 ; reg \$44 ; reg \$45 ; reg \$46 ; reg \$47 ; reg \$48 ; reg \$49 ; wire \$5 ; reg [3:0] \$50 ; reg \$51 ; reg [2:0] \$52 ; reg [2:0] \$53 ; reg [2:0] \$54 ; reg [31:0] \$55 ; reg [47:0] \$56 ; reg [31:0] \$57 ; wire [4:0] \$6 ; wire \$7 ; wire [7:0] \$8 ; wire [7:0] \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:52" *) reg [2:0] bit_counter = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:22" *) output busy; reg busy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:30" *) input [2:0] byte_count; wire [2:0] byte_count; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:53" *) reg [2:0] byte_counter = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:82" *) reg [2:0] bytes_sent = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:46" *) reg [4:0] counter = 5'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:76" *) reg d_out = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:31" *) input [31:0] data_in; wire [31:0] data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:32" *) output [31:0] data_out; reg [31:0] data_out = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:28" *) input [6:0] device_address; wire [6:0] device_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:24" *) output error; reg error = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:47" *) reg [3:0] half_counter = 4'h0; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [3:0] i2c_fsm_state = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:26" *) input read; wire read; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:80" *) reg [31:0] read_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:84" *) reg read_next = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:29" *) input [7:0] register_address; wire [7:0] register_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:16" *) output scl; reg scl = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:17" *) output scl_enable; reg scl_enable = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:49" *) reg scl_high_sample = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:50" *) reg scl_low_sample = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:45" *) reg scl_toggle = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:18" *) input sda_in; wire sda_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:20" *) output sda_out_enable; wire sda_out_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:79" *) reg [47:0] send_data = 48'h000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:23" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:269" *) input sync_25_clk; wire sync_25_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:269" *) input sync_25_rst; wire sync_25_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:45" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) scl_toggle <= 1'h0; else scl_toggle <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:46" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) counter <= 5'h00; else counter <= \$42 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:47" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) half_counter <= 4'h0; else half_counter <= \$43 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:49" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) scl_high_sample <= 1'h0; else scl_high_sample <= \$44 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:50" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) scl_low_sample <= 1'h0; else scl_low_sample <= \$45 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:16" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) scl <= 1'h0; else scl <= \$7 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:22" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) busy <= 1'h0; else busy <= \$46 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:76" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) d_out <= 1'h1; else d_out <= \$47 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:17" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) scl_enable <= 1'h0; else scl_enable <= \$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:84" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) read_next <= 1'h0; else read_next <= \$49 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) i2c_fsm_state <= 4'h0; else i2c_fsm_state <= \$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:24" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) error <= 1'h0; else error <= \$51 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:53" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) byte_counter <= 3'h0; else byte_counter <= \$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:82" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) bytes_sent <= 3'h0; else bytes_sent <= \$53 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:52" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) bit_counter <= 3'h0; else bit_counter <= \$54 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:80" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) read_data <= 32'd0; else read_data <= \$55 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:79" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) send_data <= 48'h000000000000; else send_data <= \$56 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:32" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) data_out <= 32'd0; else data_out <= \$57 ; assign \$1 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:56" *) counter; assign \$2 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:57" *) scl_toggle; assign \$3 = counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:62" *) 1'h1; assign \$4 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:63" *) half_counter; assign \$5 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:65" *) scl; assign \$6 = half_counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:68" *) 1'h1; assign \$7 = scl_enable & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:72" *) scl_toggle; assign \$9 = \$8 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:105" *) { 7'h00, read_next }; assign \$10 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:113" *) counter; assign \$12 = { 3'h0, bit_counter } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:122" *) \$11 ; assign \$13 = send_data >> \$12 ; assign \$14 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:124" *) bit_counter; assign \$15 = byte_counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:125" *) 1'h1; assign \$16 = byte_counter < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:126" *) 3'h4; assign \$17 = bytes_sent + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:127" *) 1'h1; assign \$18 = bit_counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:132" *) 1'h1; assign \$21 = { 3'h0, bit_counter } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:142" *) \$20 ; assign \$22 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:144" *) bit_counter; assign \$23 = byte_counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:145" *) 1'h1; assign \$24 = bytes_sent + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:146" *) 1'h1; assign \$25 = bit_counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:151" *) 1'h1; assign \$26 = bytes_sent >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:155" *) byte_count; assign \$27 = bytes_sent >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:175" *) byte_count; assign \$28 = byte_counter == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:177" *) 2'h3; assign \$29 = read & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:177" *) \$28 ; assign sda_out_enable = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:77" *) d_out; assign \$30 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) i2c_fsm_state; assign \$31 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$32 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$33 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$34 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$35 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h5; assign \$36 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h6; assign \$37 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h7; assign \$38 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h8; assign \$39 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h9; assign \$40 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'ha; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end (* full_case = 32'd1 *) if (\$1 ) begin \$42 = 5'h1e; end else begin \$42 = \$3 [4:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end (* full_case = 32'd1 *) if (\$1 ) begin \$43 = 4'he; end else begin (* full_case = 32'd1 *) if (\$4 ) begin \$43 = 4'hf; end else begin \$43 = \$6 [3:0]; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$44 = scl_high_sample; (* full_case = 32'd1 *) if (\$1 ) begin end else begin (* full_case = 32'd1 *) if (\$4 ) begin \$44 = scl; end else begin \$44 = 1'h0; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$45 = scl_low_sample; (* full_case = 32'd1 *) if (\$1 ) begin end else begin (* full_case = 32'd1 *) if (\$4 ) begin \$45 = \$5 ; end else begin \$45 = 1'h0; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$46 = busy; casez (i2c_fsm_state) 4'h0: \$46 = 1'h0; 4'h1: \$46 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$47 = d_out; casez (i2c_fsm_state) 4'h0: \$47 = 1'h1; 4'h1: if (scl_high_sample) begin \$47 = 1'h0; end 4'h2: if (scl_low_sample) begin \$47 = \$13 ; end 4'h4: if (scl_high_sample) begin \$47 = 1'h0; end 4'h5: /* empty */; 4'h6: if (scl_low_sample) begin \$47 = \$26 ; end 4'h7: /* empty */; 4'h3: if (scl_low_sample) begin \$47 = 1'h1; end 4'h9: /* empty */; 4'h8: begin if (scl_low_sample) begin \$47 = 1'h0; end if (scl_high_sample) begin \$47 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$48 = scl_enable; casez (i2c_fsm_state) 4'h0: \$48 = 1'h0; 4'h1: if (\$10 ) begin \$48 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$49 = read_next; casez (i2c_fsm_state) 4'h0: \$49 = 1'h0; 4'h1: /* empty */; 4'h2: /* empty */; 4'h4: /* empty */; 4'h5: /* empty */; 4'h6: /* empty */; 4'h7: /* empty */; 4'h3: /* empty */; 4'h9: if (scl_high_sample) begin (* full_case = 32'd1 *) if (sda_in) begin end else begin if (\$27 ) begin end else if (\$29 ) begin \$49 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$50 = i2c_fsm_state; casez (i2c_fsm_state) 4'h0: if (start) begin \$50 = 4'h1; end 4'h1: if (scl_high_sample) begin \$50 = 4'h2; end 4'h2: if (scl_low_sample) begin if (\$14 ) begin \$50 = 4'h3; end end 4'h4: if (scl_high_sample) begin \$50 = 4'h5; end 4'h5: if (scl_high_sample) begin if (\$22 ) begin \$50 = 4'h6; end end 4'h6: if (scl_low_sample) begin \$50 = 4'h7; end 4'h7: if (scl_low_sample) begin (* full_case = 32'd1 *) if (d_out) begin \$50 = 4'h8; end else begin \$50 = 4'h5; end end 4'h3: if (scl_low_sample) begin \$50 = 4'h9; end 4'h9: if (scl_high_sample) begin (* full_case = 32'd1 *) if (sda_in) begin \$50 = 4'ha; end else begin (* full_case = 32'd1 *) if (\$27 ) begin \$50 = 4'h8; end else if (\$29 ) begin \$50 = 4'h1; end else if (read_next) begin \$50 = 4'h5; end else begin \$50 = 4'h2; end end end 4'h8: if (scl_high_sample) begin \$50 = 4'h0; end 4'ha: \$50 = 4'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$51 = error; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: \$51 = 1'h0; 4'h2: /* empty */; 4'h4: /* empty */; 4'h5: /* empty */; 4'h6: /* empty */; 4'h7: /* empty */; 4'h3: /* empty */; 4'h9: /* empty */; 4'h8: /* empty */; 4'ha: \$51 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$52 = byte_counter; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: \$52 = 3'h5; 4'h2: if (scl_low_sample) begin if (\$14 ) begin \$52 = \$15 [2:0]; end end 4'h4: /* empty */; 4'h5: if (scl_high_sample) begin if (\$22 ) begin \$52 = \$23 [2:0]; end end 4'h6: /* empty */; 4'h7: /* empty */; 4'h3: /* empty */; 4'h9: if (scl_high_sample) begin (* full_case = 32'd1 *) if (sda_in) begin end else begin if (\$27 ) begin end else if (\$29 ) begin \$52 = 3'h5; end else if (read_next) begin \$52 = 3'h3; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$53 = bytes_sent; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: \$53 = 3'h0; 4'h2: if (scl_low_sample) begin if (\$14 ) begin if (\$16 ) begin \$53 = \$17 [2:0]; end end end 4'h4: /* empty */; 4'h5: if (scl_high_sample) begin if (\$22 ) begin \$53 = \$24 [2:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$54 = bit_counter; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: \$54 = 3'h7; 4'h2: if (scl_low_sample) begin (* full_case = 32'd1 *) if (\$14 ) begin \$54 = 3'h7; end else begin \$54 = \$18 [2:0]; end end 4'h4: /* empty */; 4'h5: if (scl_high_sample) begin (* full_case = 32'd1 *) if (\$22 ) begin \$54 = 3'h7; end else begin \$54 = \$25 [2:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$55 = read_data; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: \$55 = 32'd0; 4'h2: /* empty */; 4'h4: /* empty */; 4'h5: if (scl_high_sample) begin casez (\$21 ) 6'h00: \$55 [0] = \$19 ; 6'h01: \$55 [1] = \$19 ; 6'h02: \$55 [2] = \$19 ; 6'h03: \$55 [3] = \$19 ; 6'h04: \$55 [4] = \$19 ; 6'h05: \$55 [5] = \$19 ; 6'h06: \$55 [6] = \$19 ; 6'h07: \$55 [7] = \$19 ; 6'h08: \$55 [8] = \$19 ; 6'h09: \$55 [9] = \$19 ; 6'h0a: \$55 [10] = \$19 ; 6'h0b: \$55 [11] = \$19 ; 6'h0c: \$55 [12] = \$19 ; 6'h0d: \$55 [13] = \$19 ; 6'h0e: \$55 [14] = \$19 ; 6'h0f: \$55 [15] = \$19 ; 6'h10: \$55 [16] = \$19 ; 6'h11: \$55 [17] = \$19 ; 6'h12: \$55 [18] = \$19 ; 6'h13: \$55 [19] = \$19 ; 6'h14: \$55 [20] = \$19 ; 6'h15: \$55 [21] = \$19 ; 6'h16: \$55 [22] = \$19 ; 6'h17: \$55 [23] = \$19 ; 6'h18: \$55 [24] = \$19 ; 6'h19: \$55 [25] = \$19 ; 6'h1a: \$55 [26] = \$19 ; 6'h1b: \$55 [27] = \$19 ; 6'h1c: \$55 [28] = \$19 ; 6'h1d: \$55 [29] = \$19 ; 6'h1e: \$55 [30] = \$19 ; 6'h1f: \$55 [31] = \$19 ; endcase end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$56 = send_data; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: begin \$56 [47:40] = \$9 ; \$56 [39:32] = register_address; \$56 [31:24] = data_in[7:0]; \$56 [23:16] = data_in[15:8]; \$56 [15:8] = data_in[23:16]; \$56 [7:0] = data_in[31:24]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$57 = data_out; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: /* empty */; 4'h2: /* empty */; 4'h4: /* empty */; 4'h5: /* empty */; 4'h6: /* empty */; 4'h7: /* empty */; 4'h3: /* empty */; 4'h9: /* empty */; 4'h8: begin \$57 [7:0] = read_data[31:24]; \$57 [15:8] = read_data[23:16]; \$57 [23:16] = read_data[15:8]; \$57 [31:24] = read_data[7:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$42 ) begin end \$41 = scl_toggle; if (\$1 ) begin \$41 = \$2 ; end end assign \$8 = { device_address, 1'h0 }; assign \$11 = { byte_counter, 3'h0 }; assign \$19 = 1'h1; assign \$20 = { byte_counter, 3'h0 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:81" *) (* generator = "Amaranth" *) module \Controller.serial_card_B_shift_dma_1 (sync_100_rst, read_bram_address_input, write_bram_address_input, read_node_address_input, write_node_address_input, data_input, read_complete_input, write_complete_input, bram_read_data, write_bram_address_output, read_bram_address_output, write_node_address_output, read_node_address_output, write_complete_output, data_output, read_complete_output, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$43 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; reg \$15 ; reg [31:0] \$16 ; reg \$17 ; reg \$18 ; wire \$2 ; wire \$3 ; wire \$4 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) output [15:0] bram_address; reg [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) input [31:0] bram_read_data; wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) output [31:0] bram_write_data; reg [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) output bram_write_enable; reg bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) reg [31:0] buf_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) reg [15:0] buf_read_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) reg buf_read_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) reg [7:0] buf_read_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) reg [15:0] buf_write_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) reg buf_write_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) reg [7:0] buf_write_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) input [31:0] data_input; wire [31:0] data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) output [31:0] data_output; reg [31:0] data_output = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) input [15:0] read_bram_address_input; wire [15:0] read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) output [15:0] read_bram_address_output; reg [15:0] read_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) input read_complete_input; wire read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) output read_complete_output; reg read_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) reg read_next = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) input [7:0] read_node_address_input; wire [7:0] read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) output [7:0] read_node_address_output; reg [7:0] read_node_address_output = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) input [15:0] write_bram_address_input; wire [15:0] write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) output [15:0] write_bram_address_output; reg [15:0] write_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) input write_complete_input; wire write_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) output write_complete_output; reg write_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) input [7:0] write_node_address_input; wire [7:0] write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) output [7:0] write_node_address_output; reg [7:0] write_node_address_output = 8'h00; assign \$1 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 1'h1; assign \$2 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$3 = \$1 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$2 ; assign \$4 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 1'h1; assign \$5 = \$4 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$6 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$7 = \$5 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$6 ; assign \$8 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 1'h1; assign \$9 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$10 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$9 ; assign \$11 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 1'h1; assign \$12 = \$11 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$13 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$13 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_bram_address <= 16'h0000; else buf_write_bram_address <= write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_bram_address <= 16'h0000; else buf_read_bram_address <= read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_node_address <= 8'h00; else buf_write_node_address <= write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_node_address <= 8'h00; else buf_read_node_address <= read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_bram_address_output <= 16'h0000; else write_bram_address_output <= buf_write_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_bram_address_output <= 16'h0000; else read_bram_address_output <= buf_read_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_node_address_output <= 8'h00; else write_node_address_output <= buf_write_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_node_address_output <= 8'h00; else read_node_address_output <= buf_read_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_data <= 32'd0; else buf_data <= data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_complete <= 1'h0; else buf_read_complete <= read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_complete_output <= 1'h0; else write_complete_output <= buf_write_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_next <= 1'h0; else read_next <= \$15 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_output <= 32'd0; else data_output <= \$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_complete_output <= 1'h0; else read_complete_output <= \$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_complete <= 1'h0; else buf_write_complete <= \$18 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$43 ) begin end \$15 = read_next; if (\$3 ) begin \$15 = 1'h1; end else if (read_next) begin \$15 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$43 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$16 = bram_read_data; end else begin \$16 = buf_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$43 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$17 = 1'h1; end else begin \$17 = buf_read_complete; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$43 ) begin end (* full_case = 32'd1 *) if (\$7 ) begin \$18 = 1'h1; end else begin \$18 = write_complete_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$43 ) begin end bram_address = 16'h0000; if (\$10 ) begin bram_address = read_bram_address_input; end if (\$14 ) begin bram_address = write_bram_address_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$43 ) begin end bram_write_data = 32'd0; if (\$14 ) begin bram_write_data = data_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$43 ) begin end (* full_case = 32'd1 *) if (\$14 ) begin bram_write_enable = 1'h1; end else begin bram_write_enable = 1'h0; end end endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:168" *) (* generator = "Amaranth" *) module \Controller.serial_card_C (sync_25_clk, slotIn, sync_100_rst, sync_25_rst, rs422_tx, rs485_tx, rs485_tx_enable, slotOut, slotOutEnable, rs422_rx, rs485_rx, bram_read_data, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$44 = 0; reg [31:0] \$1 ; reg [31:0] \$10 ; reg [9:0] \$2 ; reg [9:0] \$3 ; reg [6:0] \$4 ; reg \$5 ; reg [6:0] \$6 ; reg [7:0] \$7 ; reg [2:0] \$8 ; reg \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:46" *) input [15:0] bram_address; wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:48" *) output [31:0] bram_read_data; reg [31:0] bram_read_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:47" *) input [31:0] bram_write_data; wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:49" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:22" *) wire busy; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:30" *) reg [2:0] byte_count = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:31" *) reg [31:0] data_in = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:32" *) wire [31:0] data_out; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:28" *) reg [6:0] device_address = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:24" *) wire error; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:126" *) reg [6:0] quadrature_mode_enable = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:26" *) reg read = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:29" *) reg [7:0] register_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:125" *) reg [9:0] rs422_mode_enable = 10'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:39" *) output [9:0] rs422_rx; reg [9:0] rs422_rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:40" *) input [9:0] rs422_tx; wire [9:0] rs422_tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:124" *) reg [9:0] rs485_mode_enable = 10'h000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:35" *) output [9:0] rs485_rx; reg [9:0] rs485_rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:36" *) input [9:0] rs485_tx; wire [9:0] rs485_tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:37" *) input [9:0] rs485_tx_enable; wire [9:0] rs485_tx_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:16" *) wire scl; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:17" *) wire scl_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:18" *) wire sda_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:19" *) wire sda_out; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:20" *) wire sda_out_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:18" *) input [21:0] slotIn; wire [21:0] slotIn; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:16" *) output [21:0] slotOut; reg [21:0] slotOut; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:17" *) output [21:0] slotOutEnable; reg [21:0] slotOutEnable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:23" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:269" *) input sync_25_clk; wire sync_25_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:269" *) input sync_25_rst; wire sync_25_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:48" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_read_data <= 32'd0; else bram_read_data <= \$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:124" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rs485_mode_enable <= 10'h000; else rs485_mode_enable <= \$2 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:125" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rs422_mode_enable <= 10'h000; else rs422_mode_enable <= \$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:126" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) quadrature_mode_enable <= 7'h00; else quadrature_mode_enable <= \$4 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:26" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read <= 1'h0; else read <= \$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:28" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) device_address <= 7'h00; else device_address <= \$6 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:29" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) register_address <= 8'h00; else register_address <= \$7 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:30" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) byte_count <= 3'h0; else byte_count <= \$8 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:23" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start <= 1'h0; else start <= \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:31" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_in <= 32'd0; else data_in <= \$10 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\interface_cards\\serial_interface.py:171" *) \Controller.serial_card_C.i2c i2c ( .busy(busy), .byte_count(byte_count), .data_in(data_in), .data_out(data_out), .device_address(device_address), .error(error), .read(read), .register_address(register_address), .scl(scl), .scl_enable(scl_enable), .sda_in(slotIn[21]), .sda_out_enable(sda_out_enable), .start(start), .sync_25_clk(sync_25_clk), .sync_25_rst(sync_25_rst) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end slotOut[19:0] = 20'h00000; if (rs422_mode_enable[0]) begin slotOut[19] = rs422_tx[0]; end else if (rs485_mode_enable[0]) begin slotOut[18] = rs485_tx_enable[0]; if (rs485_tx_enable[0]) begin slotOut[19] = rs485_tx[0]; end end if (rs422_mode_enable[1]) begin slotOut[9] = rs422_tx[1]; end else if (rs485_mode_enable[1]) begin slotOut[8] = rs485_tx_enable[1]; if (rs485_tx_enable[1]) begin slotOut[9] = rs485_tx[1]; end end if (rs422_mode_enable[2]) begin slotOut[17] = rs422_tx[2]; end else if (rs485_mode_enable[2]) begin slotOut[16] = rs485_tx_enable[2]; if (rs485_tx_enable[2]) begin slotOut[17] = rs485_tx[2]; end end if (rs422_mode_enable[3]) begin slotOut[7] = rs422_tx[3]; end else if (rs485_mode_enable[3]) begin slotOut[6] = rs485_tx_enable[3]; if (rs485_tx_enable[3]) begin slotOut[7] = rs485_tx[3]; end end if (rs422_mode_enable[4]) begin slotOut[15] = rs422_tx[4]; end else if (rs485_mode_enable[4]) begin slotOut[14] = rs485_tx_enable[4]; if (rs485_tx_enable[4]) begin slotOut[15] = rs485_tx[4]; end end if (rs422_mode_enable[5]) begin slotOut[5] = rs422_tx[5]; end else if (rs485_mode_enable[5]) begin slotOut[4] = rs485_tx_enable[5]; if (rs485_tx_enable[5]) begin slotOut[5] = rs485_tx[5]; end end if (rs422_mode_enable[6]) begin slotOut[13] = rs422_tx[6]; end else if (rs485_mode_enable[6]) begin slotOut[12] = rs485_tx_enable[6]; if (rs485_tx_enable[6]) begin slotOut[13] = rs485_tx[6]; end end if (rs422_mode_enable[7]) begin slotOut[3] = rs422_tx[7]; end else if (rs485_mode_enable[7]) begin slotOut[2] = rs485_tx_enable[7]; if (rs485_tx_enable[7]) begin slotOut[3] = rs485_tx[7]; end end if (rs422_mode_enable[8]) begin slotOut[11] = rs422_tx[8]; end else if (rs485_mode_enable[8]) begin slotOut[10] = rs485_tx_enable[8]; if (rs485_tx_enable[8]) begin slotOut[11] = rs485_tx[8]; end end if (rs422_mode_enable[9]) begin slotOut[1] = rs422_tx[9]; end else if (rs485_mode_enable[9]) begin slotOut[0] = rs485_tx_enable[9]; if (rs485_tx_enable[9]) begin slotOut[1] = rs485_tx[9]; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end slotOutEnable[19:0] = 20'h00000; if (rs422_mode_enable[0]) begin slotOutEnable[19] = 1'h1; end else if (rs485_mode_enable[0]) begin slotOutEnable[18] = 1'h1; slotOutEnable[19] = rs485_tx_enable[0]; end if (rs422_mode_enable[1]) begin slotOutEnable[9] = 1'h1; end else if (rs485_mode_enable[1]) begin slotOutEnable[8] = 1'h1; slotOutEnable[9] = rs485_tx_enable[1]; end if (rs422_mode_enable[2]) begin slotOutEnable[17] = 1'h1; end else if (rs485_mode_enable[2]) begin slotOutEnable[16] = 1'h1; slotOutEnable[17] = rs485_tx_enable[2]; end if (rs422_mode_enable[3]) begin slotOutEnable[7] = 1'h1; end else if (rs485_mode_enable[3]) begin slotOutEnable[6] = 1'h1; slotOutEnable[7] = rs485_tx_enable[3]; end if (rs422_mode_enable[4]) begin slotOutEnable[15] = 1'h1; end else if (rs485_mode_enable[4]) begin slotOutEnable[14] = 1'h1; slotOutEnable[15] = rs485_tx_enable[4]; end if (rs422_mode_enable[5]) begin slotOutEnable[5] = 1'h1; end else if (rs485_mode_enable[5]) begin slotOutEnable[4] = 1'h1; slotOutEnable[5] = rs485_tx_enable[5]; end if (rs422_mode_enable[6]) begin slotOutEnable[13] = 1'h1; end else if (rs485_mode_enable[6]) begin slotOutEnable[12] = 1'h1; slotOutEnable[13] = rs485_tx_enable[6]; end if (rs422_mode_enable[7]) begin slotOutEnable[3] = 1'h1; end else if (rs485_mode_enable[7]) begin slotOutEnable[2] = 1'h1; slotOutEnable[3] = rs485_tx_enable[7]; end if (rs422_mode_enable[8]) begin slotOutEnable[11] = 1'h1; end else if (rs485_mode_enable[8]) begin slotOutEnable[10] = 1'h1; slotOutEnable[11] = rs485_tx_enable[8]; end if (rs422_mode_enable[9]) begin slotOutEnable[1] = 1'h1; end else if (rs485_mode_enable[9]) begin slotOutEnable[0] = 1'h1; slotOutEnable[1] = rs485_tx_enable[9]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end rs422_rx = 10'h000; if (rs422_mode_enable[0]) begin rs422_rx[0] = slotIn[18]; end if (rs422_mode_enable[1]) begin rs422_rx[1] = slotIn[8]; end if (rs422_mode_enable[2]) begin rs422_rx[2] = slotIn[16]; end if (rs422_mode_enable[3]) begin rs422_rx[3] = slotIn[6]; end if (rs422_mode_enable[4]) begin rs422_rx[4] = slotIn[14]; end if (rs422_mode_enable[5]) begin rs422_rx[5] = slotIn[4]; end if (rs422_mode_enable[6]) begin rs422_rx[6] = slotIn[12]; end if (rs422_mode_enable[7]) begin rs422_rx[7] = slotIn[2]; end if (rs422_mode_enable[8]) begin rs422_rx[8] = slotIn[10]; end if (rs422_mode_enable[9]) begin rs422_rx[9] = slotIn[0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end rs485_rx = 10'h000; if (rs422_mode_enable[0]) begin end else if (rs485_mode_enable[0]) begin (* full_case = 32'd1 *) if (rs485_tx_enable[0]) begin end else begin rs485_rx[0] = slotIn[19]; end end if (rs422_mode_enable[1]) begin end else if (rs485_mode_enable[1]) begin (* full_case = 32'd1 *) if (rs485_tx_enable[1]) begin end else begin rs485_rx[1] = slotIn[9]; end end if (rs422_mode_enable[2]) begin end else if (rs485_mode_enable[2]) begin (* full_case = 32'd1 *) if (rs485_tx_enable[2]) begin end else begin rs485_rx[2] = slotIn[17]; end end if (rs422_mode_enable[3]) begin end else if (rs485_mode_enable[3]) begin (* full_case = 32'd1 *) if (rs485_tx_enable[3]) begin end else begin rs485_rx[3] = slotIn[7]; end end if (rs422_mode_enable[4]) begin end else if (rs485_mode_enable[4]) begin (* full_case = 32'd1 *) if (rs485_tx_enable[4]) begin end else begin rs485_rx[4] = slotIn[15]; end end if (rs422_mode_enable[5]) begin end else if (rs485_mode_enable[5]) begin (* full_case = 32'd1 *) if (rs485_tx_enable[5]) begin end else begin rs485_rx[5] = slotIn[5]; end end if (rs422_mode_enable[6]) begin end else if (rs485_mode_enable[6]) begin (* full_case = 32'd1 *) if (rs485_tx_enable[6]) begin end else begin rs485_rx[6] = slotIn[13]; end end if (rs422_mode_enable[7]) begin end else if (rs485_mode_enable[7]) begin (* full_case = 32'd1 *) if (rs485_tx_enable[7]) begin end else begin rs485_rx[7] = slotIn[3]; end end if (rs422_mode_enable[8]) begin end else if (rs485_mode_enable[8]) begin (* full_case = 32'd1 *) if (rs485_tx_enable[8]) begin end else begin rs485_rx[8] = slotIn[11]; end end if (rs422_mode_enable[9]) begin end else if (rs485_mode_enable[9]) begin (* full_case = 32'd1 *) if (rs485_tx_enable[9]) begin end else begin rs485_rx[9] = slotIn[1]; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end \$1 = bram_read_data; casez (bram_address) 16'h0000: \$1 = 32'd0; 16'h0001: \$1 = 32'd0; 16'h0003: \$1 = 32'd0; 16'h0002: \$1 = data_out; 16'h0004: \$1 = { 30'h00000000, error, busy }; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end \$2 = rs485_mode_enable; casez (bram_address) 16'h0000: if (bram_write_enable) begin \$2 = bram_write_data[9:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end \$3 = rs422_mode_enable; casez (bram_address) 16'h0000: if (bram_write_enable) begin \$3 = bram_write_data[19:10]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end \$4 = quadrature_mode_enable; casez (bram_address) 16'h0000: if (bram_write_enable) begin \$4 = bram_write_data[26:20]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end \$5 = read; casez (bram_address) 16'h0000: /* empty */; 16'h0001: if (bram_write_enable) begin \$5 = bram_write_data[0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end \$6 = device_address; casez (bram_address) 16'h0000: /* empty */; 16'h0001: if (bram_write_enable) begin \$6 = bram_write_data[7:1]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end \$7 = register_address; casez (bram_address) 16'h0000: /* empty */; 16'h0001: if (bram_write_enable) begin \$7 = bram_write_data[15:8]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end \$8 = byte_count; casez (bram_address) 16'h0000: /* empty */; 16'h0001: if (bram_write_enable) begin \$8 = bram_write_data[18:16]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end \$9 = start; casez (bram_address) 16'h0000: /* empty */; 16'h0001: if (bram_write_enable) begin \$9 = bram_write_data[19]; end endcase if (busy) begin \$9 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$44 ) begin end \$10 = data_in; casez (bram_address) 16'h0000: /* empty */; 16'h0001: /* empty */; 16'h0003: if (bram_write_enable) begin \$10 = bram_write_data; end endcase end assign sda_in = slotIn[21]; assign sda_out = 1'h0; always @* slotOutEnable[21] = sda_out_enable; always @* slotOutEnable[20] = scl_enable; always @* slotOut[21] = 1'h0; always @* slotOut[20] = scl; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:42" *) (* generator = "Amaranth" *) module \Controller.serial_card_C.i2c (sda_in, sync_25_rst, sda_out_enable, read, device_address, register_address, byte_count, start, data_in, scl, busy, scl_enable, error, data_out, sync_25_clk); reg \$auto$verilog_backend.cc:2352:dump_module$45 = 0; wire \$1 ; wire \$10 ; wire [5:0] \$11 ; wire [5:0] \$12 ; wire \$13 ; wire \$14 ; wire [3:0] \$15 ; wire \$16 ; wire [3:0] \$17 ; wire [3:0] \$18 ; wire \$19 ; wire \$2 ; wire [5:0] \$20 ; wire [5:0] \$21 ; wire \$22 ; wire [3:0] \$23 ; wire [3:0] \$24 ; wire [3:0] \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire [5:0] \$3 ; wire \$30 ; wire \$31 ; wire \$32 ; wire \$33 ; wire \$34 ; wire \$35 ; wire \$36 ; wire \$37 ; wire \$38 ; wire \$39 ; wire \$4 ; wire \$40 ; reg \$41 ; reg [4:0] \$42 ; reg [3:0] \$43 ; reg \$44 ; reg \$45 ; reg \$46 ; reg \$47 ; reg \$48 ; reg \$49 ; wire \$5 ; reg [3:0] \$50 ; reg \$51 ; reg [2:0] \$52 ; reg [2:0] \$53 ; reg [2:0] \$54 ; reg [31:0] \$55 ; reg [47:0] \$56 ; reg [31:0] \$57 ; wire [4:0] \$6 ; wire \$7 ; wire [7:0] \$8 ; wire [7:0] \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:52" *) reg [2:0] bit_counter = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:22" *) output busy; reg busy = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:30" *) input [2:0] byte_count; wire [2:0] byte_count; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:53" *) reg [2:0] byte_counter = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:82" *) reg [2:0] bytes_sent = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:46" *) reg [4:0] counter = 5'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:76" *) reg d_out = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:31" *) input [31:0] data_in; wire [31:0] data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:32" *) output [31:0] data_out; reg [31:0] data_out = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:28" *) input [6:0] device_address; wire [6:0] device_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:24" *) output error; reg error = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:47" *) reg [3:0] half_counter = 4'h0; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [3:0] i2c_fsm_state = 4'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:26" *) input read; wire read; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:80" *) reg [31:0] read_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:84" *) reg read_next = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:29" *) input [7:0] register_address; wire [7:0] register_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:16" *) output scl; reg scl = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:17" *) output scl_enable; reg scl_enable = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:49" *) reg scl_high_sample = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:50" *) reg scl_low_sample = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:45" *) reg scl_toggle = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:18" *) input sda_in; wire sda_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:20" *) output sda_out_enable; wire sda_out_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:79" *) reg [47:0] send_data = 48'h000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:23" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:269" *) input sync_25_clk; wire sync_25_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:269" *) input sync_25_rst; wire sync_25_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:45" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) scl_toggle <= 1'h0; else scl_toggle <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:46" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) counter <= 5'h00; else counter <= \$42 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:47" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) half_counter <= 4'h0; else half_counter <= \$43 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:49" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) scl_high_sample <= 1'h0; else scl_high_sample <= \$44 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:50" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) scl_low_sample <= 1'h0; else scl_low_sample <= \$45 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:16" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) scl <= 1'h0; else scl <= \$7 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:22" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) busy <= 1'h0; else busy <= \$46 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:76" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) d_out <= 1'h1; else d_out <= \$47 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:17" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) scl_enable <= 1'h0; else scl_enable <= \$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:84" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) read_next <= 1'h0; else read_next <= \$49 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) i2c_fsm_state <= 4'h0; else i2c_fsm_state <= \$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:24" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) error <= 1'h0; else error <= \$51 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:53" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) byte_counter <= 3'h0; else byte_counter <= \$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:82" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) bytes_sent <= 3'h0; else bytes_sent <= \$53 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:52" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) bit_counter <= 3'h0; else bit_counter <= \$54 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:80" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) read_data <= 32'd0; else read_data <= \$55 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:79" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) send_data <= 48'h000000000000; else send_data <= \$56 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:32" *) always @(posedge sync_25_clk, posedge sync_25_rst) if (sync_25_rst) data_out <= 32'd0; else data_out <= \$57 ; assign \$1 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:56" *) counter; assign \$2 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:57" *) scl_toggle; assign \$3 = counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:62" *) 1'h1; assign \$4 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:63" *) half_counter; assign \$5 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:65" *) scl; assign \$6 = half_counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:68" *) 1'h1; assign \$7 = scl_enable & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:72" *) scl_toggle; assign \$9 = \$8 | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:105" *) { 7'h00, read_next }; assign \$10 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:113" *) counter; assign \$12 = { 3'h0, bit_counter } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:122" *) \$11 ; assign \$13 = send_data >> \$12 ; assign \$14 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:124" *) bit_counter; assign \$15 = byte_counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:125" *) 1'h1; assign \$16 = byte_counter < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:126" *) 3'h4; assign \$17 = bytes_sent + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:127" *) 1'h1; assign \$18 = bit_counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:132" *) 1'h1; assign \$21 = { 3'h0, bit_counter } | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:142" *) \$20 ; assign \$22 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:144" *) bit_counter; assign \$23 = byte_counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:145" *) 1'h1; assign \$24 = bytes_sent + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:146" *) 1'h1; assign \$25 = bit_counter - (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:151" *) 1'h1; assign \$26 = bytes_sent >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:155" *) byte_count; assign \$27 = bytes_sent >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:175" *) byte_count; assign \$28 = byte_counter == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:177" *) 2'h3; assign \$29 = read & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:177" *) \$28 ; assign sda_out_enable = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\i2c.py:77" *) d_out; assign \$30 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) i2c_fsm_state; assign \$31 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$32 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$33 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$34 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$35 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h5; assign \$36 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h6; assign \$37 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h7; assign \$38 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h8; assign \$39 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'h9; assign \$40 = i2c_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 4'ha; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end (* full_case = 32'd1 *) if (\$1 ) begin \$42 = 5'h1e; end else begin \$42 = \$3 [4:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end (* full_case = 32'd1 *) if (\$1 ) begin \$43 = 4'he; end else begin (* full_case = 32'd1 *) if (\$4 ) begin \$43 = 4'hf; end else begin \$43 = \$6 [3:0]; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$44 = scl_high_sample; (* full_case = 32'd1 *) if (\$1 ) begin end else begin (* full_case = 32'd1 *) if (\$4 ) begin \$44 = scl; end else begin \$44 = 1'h0; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$45 = scl_low_sample; (* full_case = 32'd1 *) if (\$1 ) begin end else begin (* full_case = 32'd1 *) if (\$4 ) begin \$45 = \$5 ; end else begin \$45 = 1'h0; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$46 = busy; casez (i2c_fsm_state) 4'h0: \$46 = 1'h0; 4'h1: \$46 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$47 = d_out; casez (i2c_fsm_state) 4'h0: \$47 = 1'h1; 4'h1: if (scl_high_sample) begin \$47 = 1'h0; end 4'h2: if (scl_low_sample) begin \$47 = \$13 ; end 4'h4: if (scl_high_sample) begin \$47 = 1'h0; end 4'h5: /* empty */; 4'h6: if (scl_low_sample) begin \$47 = \$26 ; end 4'h7: /* empty */; 4'h3: if (scl_low_sample) begin \$47 = 1'h1; end 4'h9: /* empty */; 4'h8: begin if (scl_low_sample) begin \$47 = 1'h0; end if (scl_high_sample) begin \$47 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$48 = scl_enable; casez (i2c_fsm_state) 4'h0: \$48 = 1'h0; 4'h1: if (\$10 ) begin \$48 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$49 = read_next; casez (i2c_fsm_state) 4'h0: \$49 = 1'h0; 4'h1: /* empty */; 4'h2: /* empty */; 4'h4: /* empty */; 4'h5: /* empty */; 4'h6: /* empty */; 4'h7: /* empty */; 4'h3: /* empty */; 4'h9: if (scl_high_sample) begin (* full_case = 32'd1 *) if (sda_in) begin end else begin if (\$27 ) begin end else if (\$29 ) begin \$49 = 1'h1; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$50 = i2c_fsm_state; casez (i2c_fsm_state) 4'h0: if (start) begin \$50 = 4'h1; end 4'h1: if (scl_high_sample) begin \$50 = 4'h2; end 4'h2: if (scl_low_sample) begin if (\$14 ) begin \$50 = 4'h3; end end 4'h4: if (scl_high_sample) begin \$50 = 4'h5; end 4'h5: if (scl_high_sample) begin if (\$22 ) begin \$50 = 4'h6; end end 4'h6: if (scl_low_sample) begin \$50 = 4'h7; end 4'h7: if (scl_low_sample) begin (* full_case = 32'd1 *) if (d_out) begin \$50 = 4'h8; end else begin \$50 = 4'h5; end end 4'h3: if (scl_low_sample) begin \$50 = 4'h9; end 4'h9: if (scl_high_sample) begin (* full_case = 32'd1 *) if (sda_in) begin \$50 = 4'ha; end else begin (* full_case = 32'd1 *) if (\$27 ) begin \$50 = 4'h8; end else if (\$29 ) begin \$50 = 4'h1; end else if (read_next) begin \$50 = 4'h5; end else begin \$50 = 4'h2; end end end 4'h8: if (scl_high_sample) begin \$50 = 4'h0; end 4'ha: \$50 = 4'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$51 = error; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: \$51 = 1'h0; 4'h2: /* empty */; 4'h4: /* empty */; 4'h5: /* empty */; 4'h6: /* empty */; 4'h7: /* empty */; 4'h3: /* empty */; 4'h9: /* empty */; 4'h8: /* empty */; 4'ha: \$51 = 1'h1; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$52 = byte_counter; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: \$52 = 3'h5; 4'h2: if (scl_low_sample) begin if (\$14 ) begin \$52 = \$15 [2:0]; end end 4'h4: /* empty */; 4'h5: if (scl_high_sample) begin if (\$22 ) begin \$52 = \$23 [2:0]; end end 4'h6: /* empty */; 4'h7: /* empty */; 4'h3: /* empty */; 4'h9: if (scl_high_sample) begin (* full_case = 32'd1 *) if (sda_in) begin end else begin if (\$27 ) begin end else if (\$29 ) begin \$52 = 3'h5; end else if (read_next) begin \$52 = 3'h3; end end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$53 = bytes_sent; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: \$53 = 3'h0; 4'h2: if (scl_low_sample) begin if (\$14 ) begin if (\$16 ) begin \$53 = \$17 [2:0]; end end end 4'h4: /* empty */; 4'h5: if (scl_high_sample) begin if (\$22 ) begin \$53 = \$24 [2:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$54 = bit_counter; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: \$54 = 3'h7; 4'h2: if (scl_low_sample) begin (* full_case = 32'd1 *) if (\$14 ) begin \$54 = 3'h7; end else begin \$54 = \$18 [2:0]; end end 4'h4: /* empty */; 4'h5: if (scl_high_sample) begin (* full_case = 32'd1 *) if (\$22 ) begin \$54 = 3'h7; end else begin \$54 = \$25 [2:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$55 = read_data; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: \$55 = 32'd0; 4'h2: /* empty */; 4'h4: /* empty */; 4'h5: if (scl_high_sample) begin casez (\$21 ) 6'h00: \$55 [0] = \$19 ; 6'h01: \$55 [1] = \$19 ; 6'h02: \$55 [2] = \$19 ; 6'h03: \$55 [3] = \$19 ; 6'h04: \$55 [4] = \$19 ; 6'h05: \$55 [5] = \$19 ; 6'h06: \$55 [6] = \$19 ; 6'h07: \$55 [7] = \$19 ; 6'h08: \$55 [8] = \$19 ; 6'h09: \$55 [9] = \$19 ; 6'h0a: \$55 [10] = \$19 ; 6'h0b: \$55 [11] = \$19 ; 6'h0c: \$55 [12] = \$19 ; 6'h0d: \$55 [13] = \$19 ; 6'h0e: \$55 [14] = \$19 ; 6'h0f: \$55 [15] = \$19 ; 6'h10: \$55 [16] = \$19 ; 6'h11: \$55 [17] = \$19 ; 6'h12: \$55 [18] = \$19 ; 6'h13: \$55 [19] = \$19 ; 6'h14: \$55 [20] = \$19 ; 6'h15: \$55 [21] = \$19 ; 6'h16: \$55 [22] = \$19 ; 6'h17: \$55 [23] = \$19 ; 6'h18: \$55 [24] = \$19 ; 6'h19: \$55 [25] = \$19 ; 6'h1a: \$55 [26] = \$19 ; 6'h1b: \$55 [27] = \$19 ; 6'h1c: \$55 [28] = \$19 ; 6'h1d: \$55 [29] = \$19 ; 6'h1e: \$55 [30] = \$19 ; 6'h1f: \$55 [31] = \$19 ; endcase end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$56 = send_data; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: begin \$56 [47:40] = \$9 ; \$56 [39:32] = register_address; \$56 [31:24] = data_in[7:0]; \$56 [23:16] = data_in[15:8]; \$56 [15:8] = data_in[23:16]; \$56 [7:0] = data_in[31:24]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$57 = data_out; casez (i2c_fsm_state) 4'h0: /* empty */; 4'h1: /* empty */; 4'h2: /* empty */; 4'h4: /* empty */; 4'h5: /* empty */; 4'h6: /* empty */; 4'h7: /* empty */; 4'h3: /* empty */; 4'h9: /* empty */; 4'h8: begin \$57 [7:0] = read_data[31:24]; \$57 [15:8] = read_data[23:16]; \$57 [23:16] = read_data[15:8]; \$57 [31:24] = read_data[7:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$45 ) begin end \$41 = scl_toggle; if (\$1 ) begin \$41 = \$2 ; end end assign \$8 = { device_address, 1'h0 }; assign \$11 = { byte_counter, 3'h0 }; assign \$19 = 1'h1; assign \$20 = { byte_counter, 3'h0 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:81" *) (* generator = "Amaranth" *) module \Controller.serial_card_C_shift_dma_2 (sync_100_rst, read_bram_address_input, write_bram_address_input, read_node_address_input, write_node_address_input, data_input, read_complete_input, write_complete_input, bram_read_data, write_bram_address_output, read_bram_address_output, write_node_address_output, read_node_address_output, write_complete_output, data_output, read_complete_output, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$46 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; reg \$15 ; reg [31:0] \$16 ; reg \$17 ; reg \$18 ; wire \$2 ; wire \$3 ; wire \$4 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) output [15:0] bram_address; reg [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) input [31:0] bram_read_data; wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) output [31:0] bram_write_data; reg [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) output bram_write_enable; reg bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) reg [31:0] buf_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) reg [15:0] buf_read_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) reg buf_read_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) reg [7:0] buf_read_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) reg [15:0] buf_write_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) reg buf_write_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) reg [7:0] buf_write_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) input [31:0] data_input; wire [31:0] data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) output [31:0] data_output; reg [31:0] data_output = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) input [15:0] read_bram_address_input; wire [15:0] read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) output [15:0] read_bram_address_output; reg [15:0] read_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) input read_complete_input; wire read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) output read_complete_output; reg read_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) reg read_next = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) input [7:0] read_node_address_input; wire [7:0] read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) output [7:0] read_node_address_output; reg [7:0] read_node_address_output = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) input [15:0] write_bram_address_input; wire [15:0] write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) output [15:0] write_bram_address_output; reg [15:0] write_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) input write_complete_input; wire write_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) output write_complete_output; reg write_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) input [7:0] write_node_address_input; wire [7:0] write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) output [7:0] write_node_address_output; reg [7:0] write_node_address_output = 8'h00; assign \$1 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 2'h2; assign \$2 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$3 = \$1 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$2 ; assign \$4 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 2'h2; assign \$5 = \$4 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$6 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$7 = \$5 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$6 ; assign \$8 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 2'h2; assign \$9 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$10 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$9 ; assign \$11 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 2'h2; assign \$12 = \$11 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$13 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$13 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_bram_address <= 16'h0000; else buf_write_bram_address <= write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_bram_address <= 16'h0000; else buf_read_bram_address <= read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_node_address <= 8'h00; else buf_write_node_address <= write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_node_address <= 8'h00; else buf_read_node_address <= read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_bram_address_output <= 16'h0000; else write_bram_address_output <= buf_write_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_bram_address_output <= 16'h0000; else read_bram_address_output <= buf_read_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_node_address_output <= 8'h00; else write_node_address_output <= buf_write_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_node_address_output <= 8'h00; else read_node_address_output <= buf_read_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_data <= 32'd0; else buf_data <= data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_complete <= 1'h0; else buf_read_complete <= read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_complete_output <= 1'h0; else write_complete_output <= buf_write_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_next <= 1'h0; else read_next <= \$15 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_output <= 32'd0; else data_output <= \$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_complete_output <= 1'h0; else read_complete_output <= \$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_complete <= 1'h0; else buf_write_complete <= \$18 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$46 ) begin end \$15 = read_next; if (\$3 ) begin \$15 = 1'h1; end else if (read_next) begin \$15 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$46 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$16 = bram_read_data; end else begin \$16 = buf_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$46 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$17 = 1'h1; end else begin \$17 = buf_read_complete; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$46 ) begin end (* full_case = 32'd1 *) if (\$7 ) begin \$18 = 1'h1; end else begin \$18 = write_complete_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$46 ) begin end bram_address = 16'h0000; if (\$10 ) begin bram_address = read_bram_address_input; end if (\$14 ) begin bram_address = write_bram_address_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$46 ) begin end bram_write_data = 32'd0; if (\$14 ) begin bram_write_data = data_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$46 ) begin end (* full_case = 32'd1 *) if (\$14 ) begin bram_write_enable = 1'h1; end else begin bram_write_enable = 1'h0; end end endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:190" *) (* generator = "Amaranth" *) module \Controller.shift_dma (sync_100_rst, instruction_memory_read_data, bram_read_data, start, \read_node_address_input$48 , \write_node_address_input$50 , \read_bram_address_input$52 , \write_bram_address_input$54 , \data_input$56 , read_complete_input, write_complete_input, data_memory_address, instruction_memory_address, busy, write_bram_address_output, read_bram_address_output, write_node_address_output, read_node_address_output, write_complete_output, data_output, read_complete_output , data_memory_write_data, data_memory_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$47 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; wire [20:0] \$15 ; wire [16:0] \$16 ; wire \$17 ; wire \$18 ; wire \$19 ; wire \$2 ; wire \$20 ; wire \$21 ; wire \$22 ; wire \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; reg [19:0] \$27 ; reg [15:0] \$28 ; reg \$29 ; wire \$3 ; reg [63:0] \$30 ; reg [1:0] \$31 ; reg \$32 ; reg [7:0] \$33 ; reg [7:0] \$34 ; reg [15:0] \$35 ; reg [15:0] \$36 ; reg [31:0] \$37 ; reg \$38 ; reg \$39 ; wire \$4 ; reg \$40 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:178" *) input [31:0] bram_read_data; wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:170" *) output busy; reg busy = 1'h0; (* init = 16'h0000 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:230" *) wire [15:0] current_instruction; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) reg [31:0] data_input = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:162" *) input [31:0] \data_input$56 ; wire [31:0] \data_input$56 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:177" *) output [15:0] data_memory_address; wire [15:0] data_memory_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:178" *) wire [31:0] data_memory_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) output [31:0] data_memory_write_data; wire [31:0] data_memory_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) output data_memory_write_enable; wire data_memory_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) output [31:0] data_output; wire [31:0] data_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) wire [31:0] \data_output$34 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:197" *) wire [15:0] destination_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:195" *) wire [7:0] destination_node; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:241" *) reg increment_instruction; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:198" *) wire [3:0] instruction; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:247" *) reg [63:0] instruction_data; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [1:0] instruction_mem_reset_fsm_state = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:230" *) output [15:0] instruction_memory_address; reg [15:0] instruction_memory_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:175" *) input [63:0] instruction_memory_read_data; wire [63:0] instruction_memory_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:211" *) reg opening_available; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:245" *) reg [63:0] previous_instruction_data = 64'h0000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) reg [15:0] read_bram_address_input = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:158" *) input [15:0] \read_bram_address_input$52 ; wire [15:0] \read_bram_address_input$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) output [15:0] read_bram_address_output; wire [15:0] read_bram_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) wire [15:0] \read_bram_address_output$30 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:164" *) input read_complete_input; wire read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) reg \read_complete_input$57 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) output read_complete_output; wire read_complete_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) wire \read_complete_output$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) reg [7:0] read_node_address_input = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:154" *) input [7:0] \read_node_address_input$48 ; wire [7:0] \read_node_address_input$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) output [7:0] read_node_address_output; wire [7:0] read_node_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) wire [7:0] \read_node_address_output$26 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:243" *) reg reset_instruction_memory = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:196" *) wire [15:0] source_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:194" *) wire [7:0] source_node; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:169" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:200" *) reg [19:0] timer = 20'h00000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:203" *) wire timer_compare_passed; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:202" *) wire [19:0] timer_compare_value; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:172" *) wire [31:0] timer_count; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:248" *) reg use_previous_instruction_data = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:249" *) reg use_previous_instruction_data_last = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) reg [15:0] write_bram_address_input = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:160" *) input [15:0] \write_bram_address_input$54 ; wire [15:0] \write_bram_address_input$54 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) output [15:0] write_bram_address_output; wire [15:0] write_bram_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) wire [15:0] \write_bram_address_output$32 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:166" *) input write_complete_input; wire write_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) reg \write_complete_input$58 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) output write_complete_output; wire write_complete_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) wire \write_complete_output$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) reg [7:0] write_node_address_input = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:156" *) input [7:0] \write_node_address_input$50 ; wire [7:0] \write_node_address_input$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) output [7:0] write_node_address_output; wire [7:0] write_node_address_output; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) wire [7:0] \write_node_address_output$28 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:170" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) busy <= 1'h0; else busy <= \$40 ; assign timer_compare_passed = timer >= (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:208" *) instruction_data[19:0]; assign \$1 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:324" *) read_complete_input; assign \$2 = write_complete_input | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:324" *) \$1 ; assign \$3 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:337" *) instruction_data[51:48]; assign \$4 = instruction_memory_address != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:337" *) 8'hff; assign \$5 = \$3 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:337" *) \$4 ; assign \$6 = busy | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:337" *) reset_instruction_memory; assign \$7 = \$5 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:337" *) \$6 ; assign \$8 = instruction_data[51:48] == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:340" *) 2'h2; assign \$9 = instruction_data[51:48] == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:355" *) 1'h1; assign \$10 = instruction_data[51:48] == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:368" *) 2'h3; assign \$11 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) instruction_mem_reset_fsm_state; assign \$12 = instruction_mem_reset_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$13 = instruction_mem_reset_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$14 = instruction_mem_reset_fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$15 = timer + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:206" *) 1'h1; assign \$16 = instruction_memory_address + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:256" *) 1'h1; assign \$17 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:324" *) read_complete_input; assign \$18 = write_complete_input | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:324" *) \$17 ; assign \$19 = | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:337" *) instruction_data[51:48]; assign \$20 = instruction_memory_address != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:337" *) 8'hff; assign \$21 = \$19 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:337" *) \$20 ; assign \$22 = busy | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:337" *) reset_instruction_memory; assign \$23 = \$21 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:337" *) \$22 ; assign \$24 = instruction_data[51:48] == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:340" *) 2'h2; assign \$25 = instruction_data[51:48] == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:355" *) 1'h1; assign \$26 = instruction_data[51:48] == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:368" *) 2'h3; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:200" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timer <= 20'h00000; else timer <= \$27 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:249" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) use_previous_instruction_data_last <= 1'h0; else use_previous_instruction_data_last <= use_previous_instruction_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:230" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) instruction_memory_address <= 16'h0000; else instruction_memory_address <= \$28 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:248" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) use_previous_instruction_data <= 1'h0; else use_previous_instruction_data <= \$29 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:245" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) previous_instruction_data <= 64'h0000000000000000; else previous_instruction_data <= \$30 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) instruction_mem_reset_fsm_state <= 2'h0; else instruction_mem_reset_fsm_state <= \$31 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:243" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) reset_instruction_memory <= 1'h0; else reset_instruction_memory <= \$32 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_node_address_input <= 8'h00; else read_node_address_input <= \$33 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_node_address_input <= 8'h00; else write_node_address_input <= \$34 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_bram_address_input <= 16'h0000; else read_bram_address_input <= \$35 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_bram_address_input <= 16'h0000; else write_bram_address_input <= \$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_input <= 32'd0; else data_input <= \$37 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \read_complete_input$57 <= 1'h0; else \read_complete_input$57 <= \$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \write_complete_input$58 <= 1'h0; else \write_complete_input$58 <= \$39 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:214" *) \Controller.shift_dma.dma_node dma_node ( .bram_address(bram_address), .bram_read_data(bram_read_data), .bram_write_data(data_memory_write_data), .bram_write_enable(data_memory_write_enable), .data_input(data_input), .data_output(data_output), .read_bram_address_input(read_bram_address_input), .read_bram_address_output(read_bram_address_output), .read_complete_input(\read_complete_input$57 ), .read_complete_output(read_complete_output), .read_node_address_input(read_node_address_input), .read_node_address_output(read_node_address_output), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .write_bram_address_input(write_bram_address_input), .write_bram_address_output(write_bram_address_output), .write_complete_input(\write_complete_input$58 ), .write_complete_output(write_complete_output), .write_node_address_input(write_node_address_input), .write_node_address_output(write_node_address_output) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end (* full_case = 32'd1 *) if (use_previous_instruction_data) begin instruction_data = instruction_memory_read_data; end else begin instruction_data = previous_instruction_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end increment_instruction = 1'h0; casez (instruction_mem_reset_fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: increment_instruction = 1'h1; endcase if (\$7 ) begin (* full_case = 32'd1 *) if (\$8 ) begin if (opening_available) begin increment_instruction = 1'h1; end end else if (\$9 ) begin increment_instruction = 1'h1; end else if (\$10 ) begin if (timer_compare_passed) begin increment_instruction = 1'h1; end end else begin increment_instruction = 1'h1; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end (* full_case = 32'd1 *) if (\$2 ) begin opening_available = 1'h1; end else begin opening_available = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$27 = timer; if (busy) begin \$27 = \$15 [19:0]; end (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (start) begin \$27 = 20'h00000; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$28 = instruction_memory_address; if (increment_instruction) begin \$28 = \$16 [15:0]; end casez (instruction_mem_reset_fsm_state) 2'h0: if (reset_instruction_memory) begin \$28 = 16'h0000; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end (* full_case = 32'd1 *) if (increment_instruction) begin \$29 = 1'h1; end else begin \$29 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$30 = previous_instruction_data; if (use_previous_instruction_data) begin \$30 = instruction_memory_read_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$31 = instruction_mem_reset_fsm_state; (* full_case = 32'd1 *) casez (instruction_mem_reset_fsm_state) 2'h0: if (reset_instruction_memory) begin \$31 = 2'h1; end 2'h1: \$31 = 2'h2; 2'h2: \$31 = 2'h3; 2'h3: \$31 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$32 = reset_instruction_memory; (* full_case = 32'd1 *) casez (instruction_mem_reset_fsm_state) 2'h0: /* empty */; 2'h1: /* empty */; 2'h2: /* empty */; 2'h3: \$32 = 1'h0; endcase (* full_case = 32'd1 *) if (\$23 ) begin end else begin if (start) begin \$32 = 1'h1; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$33 = read_node_address_input; (* full_case = 32'd1 *) if (\$18 ) begin end else begin \$33 = \read_node_address_input$48 ; end (* full_case = 32'd1 *) if (\$23 ) begin (* full_case = 32'd1 *) if (\$24 ) begin if (opening_available) begin \$33 = instruction_data[7:0]; end end else if (\$25 ) begin if (opening_available) begin \$33 = 8'h00; end end else if (\$26 ) begin if (opening_available) begin \$33 = 8'h00; end end else begin if (opening_available) begin \$33 = 8'h00; end end end else begin if (opening_available) begin \$33 = 8'h00; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$34 = write_node_address_input; (* full_case = 32'd1 *) if (\$18 ) begin end else begin \$34 = \write_node_address_input$50 ; end (* full_case = 32'd1 *) if (\$23 ) begin (* full_case = 32'd1 *) if (\$24 ) begin if (opening_available) begin \$34 = instruction_data[15:8]; end end else if (\$25 ) begin if (opening_available) begin \$34 = 8'h00; end end else if (\$26 ) begin if (opening_available) begin \$34 = 8'h00; end end else begin if (opening_available) begin \$34 = 8'h00; end end end else begin if (opening_available) begin \$34 = 8'h00; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$35 = read_bram_address_input; (* full_case = 32'd1 *) if (\$18 ) begin end else begin \$35 = \read_bram_address_input$52 ; end (* full_case = 32'd1 *) if (\$23 ) begin (* full_case = 32'd1 *) if (\$24 ) begin if (opening_available) begin \$35 = instruction_data[31:16]; end end else if (\$25 ) begin if (opening_available) begin \$35 = 16'h0000; end end else if (\$26 ) begin if (opening_available) begin \$35 = 16'h0000; end end else begin if (opening_available) begin \$35 = 16'h0000; end end end else begin if (opening_available) begin \$35 = 16'h0000; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$36 = write_bram_address_input; (* full_case = 32'd1 *) if (\$18 ) begin end else begin \$36 = \write_bram_address_input$54 ; end (* full_case = 32'd1 *) if (\$23 ) begin (* full_case = 32'd1 *) if (\$24 ) begin if (opening_available) begin \$36 = instruction_data[47:32]; end end else if (\$25 ) begin if (opening_available) begin \$36 = 16'h0000; end end else if (\$26 ) begin if (opening_available) begin \$36 = 16'h0000; end end else begin if (opening_available) begin \$36 = 16'h0000; end end end else begin if (opening_available) begin \$36 = 16'h0000; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$37 = data_input; (* full_case = 32'd1 *) if (\$18 ) begin end else begin \$37 = \data_input$56 ; end (* full_case = 32'd1 *) if (\$23 ) begin (* full_case = 32'd1 *) if (\$24 ) begin if (opening_available) begin \$37 = 32'd0; end end else if (\$25 ) begin if (opening_available) begin \$37 = 32'd0; end end else if (\$26 ) begin if (opening_available) begin \$37 = 32'd0; end end else begin if (opening_available) begin \$37 = 32'd0; end end end else begin if (opening_available) begin \$37 = 32'd0; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$38 = \read_complete_input$57 ; (* full_case = 32'd1 *) if (\$18 ) begin end else begin \$38 = read_complete_input; end (* full_case = 32'd1 *) if (\$23 ) begin (* full_case = 32'd1 *) if (\$24 ) begin if (opening_available) begin \$38 = 1'h0; end end else if (\$25 ) begin if (opening_available) begin \$38 = 1'h1; end end else if (\$26 ) begin if (opening_available) begin \$38 = 1'h1; end end else begin if (opening_available) begin \$38 = 1'h1; end end end else begin if (opening_available) begin \$38 = 1'h1; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end \$39 = \write_complete_input$58 ; (* full_case = 32'd1 *) if (\$18 ) begin end else begin \$39 = write_complete_input; end (* full_case = 32'd1 *) if (\$23 ) begin (* full_case = 32'd1 *) if (\$24 ) begin if (opening_available) begin \$39 = 1'h0; end end else if (\$25 ) begin if (opening_available) begin \$39 = 1'h1; end end else if (\$26 ) begin if (opening_available) begin \$39 = 1'h1; end end else begin if (opening_available) begin \$39 = 1'h1; end end end else begin if (opening_available) begin \$39 = 1'h1; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$47 ) begin end (* full_case = 32'd1 *) if (\$23 ) begin \$40 = 1'h1; end else begin \$40 = 1'h0; end end assign timer_count = { 12'h000, timer }; assign timer_compare_value = instruction_data[19:0]; assign current_instruction = instruction_memory_address; assign instruction = instruction_data[51:48]; assign source_node = instruction_data[7:0]; assign destination_node = instruction_data[15:8]; assign source_address = instruction_data[31:16]; assign destination_address = instruction_data[47:32]; assign bram_write_data = data_memory_write_data; assign bram_write_enable = data_memory_write_enable; assign data_memory_read_data = bram_read_data; assign \read_node_address_output$26 = read_node_address_output; assign \write_node_address_output$28 = write_node_address_output; assign \read_bram_address_output$30 = read_bram_address_output; assign \write_bram_address_output$32 = write_bram_address_output; assign \data_output$34 = data_output; assign \read_complete_output$36 = read_complete_output; assign \write_complete_output$38 = write_complete_output; assign data_memory_address = bram_address; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:81" *) (* generator = "Amaranth" *) module \Controller.shift_dma.dma_node (sync_100_rst, bram_read_data, read_node_address_input, write_node_address_input, read_bram_address_input, write_bram_address_input, data_input, read_complete_input, write_complete_input, write_bram_address_output, read_bram_address_output, write_node_address_output, read_node_address_output, write_complete_output, data_output, read_complete_output, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$48 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; reg \$15 ; reg [31:0] \$16 ; reg \$17 ; reg \$18 ; wire \$2 ; wire \$3 ; wire \$4 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) output [15:0] bram_address; reg [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) input [31:0] bram_read_data; wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) output [31:0] bram_write_data; reg [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) output bram_write_enable; reg bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) reg [31:0] buf_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) reg [15:0] buf_read_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) reg buf_read_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) reg [7:0] buf_read_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) reg [15:0] buf_write_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) reg buf_write_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) reg [7:0] buf_write_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) input [31:0] data_input; wire [31:0] data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) output [31:0] data_output; reg [31:0] data_output = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) input [15:0] read_bram_address_input; wire [15:0] read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) output [15:0] read_bram_address_output; reg [15:0] read_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) input read_complete_input; wire read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) output read_complete_output; reg read_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) reg read_next = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) input [7:0] read_node_address_input; wire [7:0] read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) output [7:0] read_node_address_output; reg [7:0] read_node_address_output = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) input [15:0] write_bram_address_input; wire [15:0] write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) output [15:0] write_bram_address_output; reg [15:0] write_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) input write_complete_input; wire write_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) output write_complete_output; reg write_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) input [7:0] write_node_address_input; wire [7:0] write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) output [7:0] write_node_address_output; reg [7:0] write_node_address_output = 8'h00; assign \$1 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_node_address_input; assign \$2 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$3 = \$1 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$2 ; assign \$4 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_node_address_input; assign \$5 = \$4 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$6 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$7 = \$5 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$6 ; assign \$8 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_node_address_input; assign \$9 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$10 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$9 ; assign \$11 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_node_address_input; assign \$12 = \$11 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$13 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$13 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_bram_address <= 16'h0000; else buf_write_bram_address <= write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_bram_address <= 16'h0000; else buf_read_bram_address <= read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_node_address <= 8'h00; else buf_write_node_address <= write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_node_address <= 8'h00; else buf_read_node_address <= read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_bram_address_output <= 16'h0000; else write_bram_address_output <= buf_write_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_bram_address_output <= 16'h0000; else read_bram_address_output <= buf_read_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_node_address_output <= 8'h00; else write_node_address_output <= buf_write_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_node_address_output <= 8'h00; else read_node_address_output <= buf_read_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_data <= 32'd0; else buf_data <= data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_complete <= 1'h0; else buf_read_complete <= read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_complete_output <= 1'h0; else write_complete_output <= buf_write_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_next <= 1'h0; else read_next <= \$15 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_output <= 32'd0; else data_output <= \$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_complete_output <= 1'h0; else read_complete_output <= \$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_complete <= 1'h0; else buf_write_complete <= \$18 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$48 ) begin end \$15 = read_next; if (\$3 ) begin \$15 = 1'h1; end else if (read_next) begin \$15 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$48 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$16 = bram_read_data; end else begin \$16 = buf_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$48 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$17 = 1'h1; end else begin \$17 = buf_read_complete; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$48 ) begin end (* full_case = 32'd1 *) if (\$7 ) begin \$18 = 1'h1; end else begin \$18 = write_complete_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$48 ) begin end bram_address = 16'h0000; if (\$10 ) begin bram_address = read_bram_address_input; end if (\$14 ) begin bram_address = write_bram_address_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$48 ) begin end bram_write_data = 32'd0; if (\$14 ) begin bram_write_data = data_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$48 ) begin end (* full_case = 32'd1 *) if (\$14 ) begin bram_write_enable = 1'h1; end else begin bram_write_enable = 1'h0; end end endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:68" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders (sync_100_clk, sync_200_rst, sync_100_rst, \rx$105 , bram_read_data, \tx$100 , \tx_enable$102 , bram_address, bram_write_data, bram_write_enable, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$49 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire \$17 ; wire \$18 ; wire [31:0] \$19 ; wire \$2 ; wire \$20 ; wire [31:0] \$21 ; wire \$22 ; wire [31:0] \$23 ; wire \$24 ; wire [31:0] \$25 ; wire \$26 ; wire [31:0] \$27 ; wire \$28 ; wire [31:0] \$29 ; wire \$3 ; wire \$30 ; wire \$31 ; wire \$32 ; wire \$33 ; wire \$34 ; wire [7:0] \$35 ; reg [5:0] \$36 ; wire [5:0] \$37 ; reg \$38 ; reg \$39 ; wire \$4 ; reg \$40 ; reg [1:0] \$41 ; reg \$42 ; reg [15:0] \$43 ; reg [31:0] \$44 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) wire battery_fail; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) wire \battery_fail$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) wire \battery_fail$58 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) wire \battery_fail$66 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) wire \battery_fail$74 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) wire \battery_fail$82 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:31" *) input [15:0] bram_address; wire [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:33" *) output [31:0] bram_read_data; reg [31:0] bram_read_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:32" *) input [31:0] bram_write_data; wire [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:34" *) input bram_write_enable; wire bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:496" *) wire clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) wire crc_valid; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) wire \crc_valid$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) wire \crc_valid$60 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) wire \crc_valid$68 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) wire \crc_valid$76 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) wire \crc_valid$84 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:497" *) wire [5:0] data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:498" *) wire data_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:36" *) reg [7:0] debug = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:326" *) wire done; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:326" *) wire \done$11 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:326" *) wire \done$14 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:326" *) wire \done$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:326" *) wire \done$20 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:326" *) wire \done$23 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:203" *) wire \done$31 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [1:0] fsm_state = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:90" *) reg [5:0] last_dones = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) wire [15:0] multi_turn; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) wire [15:0] \multi_turn$46 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) wire [15:0] \multi_turn$54 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) wire [15:0] \multi_turn$62 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) wire [15:0] \multi_turn$70 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) wire [15:0] \multi_turn$78 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:88" *) reg [5:0] new_data = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) wire no_response; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) wire \no_response$51 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) wire \no_response$59 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) wire \no_response$67 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) wire \no_response$75 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) wire \no_response$83 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:328" *) wire [111:0] raw_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:328" *) wire [111:0] \raw_data$13 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:328" *) wire [111:0] \raw_data$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:328" *) wire [111:0] \raw_data$19 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:328" *) wire [111:0] \raw_data$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:328" *) wire [111:0] \raw_data$25 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) reg [111:0] raw_data_0 = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) reg [111:0] raw_data_1 = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) reg [111:0] raw_data_2 = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) reg [111:0] raw_data_3 = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) reg [111:0] raw_data_4 = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) reg [111:0] raw_data_5 = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:199" *) reg [15:0] request_packet_data = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:29" *) input [5:0] \rx$105 ; wire [5:0] \rx$105 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) wire \rx$89 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) wire \rx$91 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) wire \rx$93 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) wire \rx$95 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) wire \rx$97 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:86" *) reg rx_start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:164" *) wire [2:0] selected_encoder; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) wire [31:0] single_turn; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) wire [31:0] \single_turn$47 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) wire [31:0] \single_turn$55 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) wire [31:0] \single_turn$63 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) wire [31:0] \single_turn$71 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) wire [31:0] \single_turn$79 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:494" *) reg start = 1'h0; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) wire \start$88 ; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) wire \start$90 ; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) wire \start$92 ; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) wire \start$94 ; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) wire \start$96 ; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) wire \start$98 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:70" *) wire [5:0] synced_rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) wire [15:0] timestamp_fast; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) wire [15:0] \timestamp_fast$49 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) wire [15:0] \timestamp_fast$57 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) wire [15:0] \timestamp_fast$65 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) wire [15:0] \timestamp_fast$73 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) wire [15:0] \timestamp_fast$81 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) wire [7:0] timestamp_slow; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) wire [7:0] \timestamp_slow$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) wire [7:0] \timestamp_slow$56 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) wire [7:0] \timestamp_slow$64 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) wire [7:0] \timestamp_slow$72 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) wire [7:0] \timestamp_slow$80 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:85" *) reg trigger = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:200" *) reg \trigger$30 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:27" *) wire [5:0] tx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:201" *) output \tx$100 ; wire \tx$100 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:28" *) wire [5:0] tx_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:202" *) output \tx_enable$102 ; wire \tx_enable$102 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) wire unindexed; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) wire \unindexed$53 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) wire \unindexed$61 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) wire \unindexed$69 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) wire \unindexed$77 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) wire \unindexed$85 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:85" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) trigger <= 1'h0; else trigger <= \$42 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:199" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) request_packet_data <= 16'h0000; else request_packet_data <= \$43 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:33" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bram_read_data <= 32'd0; else bram_read_data <= \$44 ; assign \$1 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) last_dones[0]; assign \$2 = done & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) \$1 ; assign \$3 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) last_dones[1]; assign \$4 = \done$11 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) \$3 ; assign \$5 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) last_dones[2]; assign \$6 = \done$14 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) \$5 ; assign \$7 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) last_dones[3]; assign \$8 = \done$17 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) \$7 ; assign \$9 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) last_dones[4]; assign \$10 = \done$20 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) \$9 ; assign \$11 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) last_dones[5]; assign \$12 = \done$23 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:101" *) \$11 ; assign \$13 = & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:109" *) new_data; assign \$14 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:132" *) \done$31 ; assign \$15 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:150" *) 6'h30; assign \$16 = bram_write_enable & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:150" *) \$15 ; assign \$17 = bram_address == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:155" *) 6'h31; assign \$18 = bram_write_enable & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:155" *) \$17 ; assign \$20 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:186" *) crc_valid; assign \$22 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:186" *) \crc_valid$52 ; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:186" *) \crc_valid$60 ; assign \$26 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:186" *) \crc_valid$68 ; assign \$28 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:186" *) \crc_valid$76 ; assign \$30 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:186" *) \crc_valid$84 ; assign \$31 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; assign \$32 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$33 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$34 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:36" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) debug <= 8'h00; else debug <= \$35 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:88" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) new_data <= 6'h00; else new_data <= \$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:90" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) last_dones <= 6'h00; else last_dones <= \$37 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) raw_data_0 <= 112'h0000000000000000000000000000; else raw_data_0 <= raw_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) raw_data_1 <= 112'h0000000000000000000000000000; else raw_data_1 <= \raw_data$13 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) raw_data_2 <= 112'h0000000000000000000000000000; else raw_data_2 <= \raw_data$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) raw_data_3 <= 112'h0000000000000000000000000000; else raw_data_3 <= \raw_data$19 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) raw_data_4 <= 112'h0000000000000000000000000000; else raw_data_4 <= \raw_data$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) raw_data_5 <= 112'h0000000000000000000000000000; else raw_data_5 <= \raw_data$25 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:494" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) start <= 1'h0; else start <= \$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:86" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) rx_start <= 1'h0; else rx_start <= \$39 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:200" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \trigger$30 <= 1'h0; else \trigger$30 <= \$40 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) fsm_state <= 2'h0; else fsm_state <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:72" *) \Controller.yaskawa_encoders.U$8 \U$8 ( .rx(\rx$105 ), .stage1(synced_rx), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:95" *) \Controller.yaskawa_encoders.receiver_0 receiver_0 ( .battery_fail(battery_fail), .crc_valid(crc_valid), .done(done), .multi_turn(multi_turn), .no_response(no_response), .raw_data(raw_data), .rx(synced_rx[0]), .single_turn(single_turn), .\start$36 (rx_start), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .timestamp_fast(timestamp_fast), .timestamp_slow(timestamp_slow), .unindexed(unindexed) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:95" *) \Controller.yaskawa_encoders.receiver_1 receiver_1 ( .battery_fail(\battery_fail$50 ), .crc_valid(\crc_valid$52 ), .done(\done$11 ), .multi_turn(\multi_turn$46 ), .no_response(\no_response$51 ), .raw_data(\raw_data$13 ), .rx(synced_rx[1]), .single_turn(\single_turn$47 ), .\start$36 (rx_start), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .timestamp_fast(\timestamp_fast$49 ), .timestamp_slow(\timestamp_slow$48 ), .unindexed(\unindexed$53 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:95" *) \Controller.yaskawa_encoders.receiver_2 receiver_2 ( .battery_fail(\battery_fail$58 ), .crc_valid(\crc_valid$60 ), .done(\done$14 ), .multi_turn(\multi_turn$54 ), .no_response(\no_response$59 ), .raw_data(\raw_data$16 ), .rx(synced_rx[2]), .single_turn(\single_turn$55 ), .\start$36 (rx_start), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .timestamp_fast(\timestamp_fast$57 ), .timestamp_slow(\timestamp_slow$56 ), .unindexed(\unindexed$61 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:95" *) \Controller.yaskawa_encoders.receiver_3 receiver_3 ( .battery_fail(\battery_fail$66 ), .crc_valid(\crc_valid$68 ), .done(\done$17 ), .multi_turn(\multi_turn$62 ), .no_response(\no_response$67 ), .raw_data(\raw_data$19 ), .rx(synced_rx[3]), .single_turn(\single_turn$63 ), .\start$36 (rx_start), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .timestamp_fast(\timestamp_fast$65 ), .timestamp_slow(\timestamp_slow$64 ), .unindexed(\unindexed$69 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:95" *) \Controller.yaskawa_encoders.receiver_4 receiver_4 ( .battery_fail(\battery_fail$74 ), .crc_valid(\crc_valid$76 ), .done(\done$20 ), .multi_turn(\multi_turn$70 ), .no_response(\no_response$75 ), .raw_data(\raw_data$22 ), .rx(synced_rx[4]), .single_turn(\single_turn$71 ), .\start$36 (rx_start), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .timestamp_fast(\timestamp_fast$73 ), .timestamp_slow(\timestamp_slow$72 ), .unindexed(\unindexed$77 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:95" *) \Controller.yaskawa_encoders.receiver_5 receiver_5 ( .battery_fail(\battery_fail$82 ), .crc_valid(\crc_valid$84 ), .done(\done$23 ), .multi_turn(\multi_turn$78 ), .no_response(\no_response$83 ), .raw_data(\raw_data$25 ), .rx(synced_rx[5]), .single_turn(\single_turn$79 ), .\start$36 (rx_start), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .timestamp_fast(\timestamp_fast$81 ), .timestamp_slow(\timestamp_slow$80 ), .unindexed(\unindexed$85 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:75" *) \Controller.yaskawa_encoders.request_packet request_packet ( .done(\done$31 ), .\request_packet_data$23 (request_packet_data), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .\trigger$24 (\trigger$30 ), .tx(\tx$100 ), .tx_enable(\tx_enable$102 ) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:77" *) \Controller.yaskawa_encoders.spi_send_debug spi_send_debug ( .clk(clk), .data(data), .data_enable(data_enable), .raw_data_0(raw_data_0), .raw_data_1(raw_data_1), .raw_data_2(raw_data_2), .raw_data_3(raw_data_3), .raw_data_4(raw_data_4), .raw_data_5(raw_data_5), .start(start), .sync_100_clk(sync_100_clk), .sync_100_rst(sync_100_rst) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$49 ) begin end \$43 = request_packet_data; if (\$18 ) begin \$43 = bram_write_data[15:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$49 ) begin end \$44 = bram_read_data; casez (bram_address[5:3]) 3'h0: (* full_case = 32'd1 *) casez (bram_address[2:0]) 3'h0: \$44 = { 16'h0000, multi_turn }; 3'h1: \$44 = single_turn; 3'h2: \$44 = \$19 ; 3'h3: \$44 = { 24'h000000, timestamp_slow }; 3'h4: \$44 = { 16'h0000, timestamp_fast }; 3'h5: begin \$44 [0] = battery_fail; \$44 [2] = no_response; \$44 [3] = \$20 ; \$44 [4] = done; \$44 [1] = unindexed; end default: \$44 = 32'd0; endcase 3'h1: (* full_case = 32'd1 *) casez (bram_address[2:0]) 3'h0: \$44 = { 16'h0000, \multi_turn$46 }; 3'h1: \$44 = \single_turn$47 ; 3'h2: \$44 = \$21 ; 3'h3: \$44 = { 24'h000000, \timestamp_slow$48 }; 3'h4: \$44 = { 16'h0000, \timestamp_fast$49 }; 3'h5: begin \$44 [0] = \battery_fail$50 ; \$44 [2] = \no_response$51 ; \$44 [3] = \$22 ; \$44 [4] = \done$11 ; \$44 [1] = \unindexed$53 ; end default: \$44 = 32'd0; endcase 3'h2: (* full_case = 32'd1 *) casez (bram_address[2:0]) 3'h0: \$44 = { 16'h0000, \multi_turn$54 }; 3'h1: \$44 = \single_turn$55 ; 3'h2: \$44 = \$23 ; 3'h3: \$44 = { 24'h000000, \timestamp_slow$56 }; 3'h4: \$44 = { 16'h0000, \timestamp_fast$57 }; 3'h5: begin \$44 [0] = \battery_fail$58 ; \$44 [2] = \no_response$59 ; \$44 [3] = \$24 ; \$44 [4] = \done$14 ; \$44 [1] = \unindexed$61 ; end default: \$44 = 32'd0; endcase 3'h3: (* full_case = 32'd1 *) casez (bram_address[2:0]) 3'h0: \$44 = { 16'h0000, \multi_turn$62 }; 3'h1: \$44 = \single_turn$63 ; 3'h2: \$44 = \$25 ; 3'h3: \$44 = { 24'h000000, \timestamp_slow$64 }; 3'h4: \$44 = { 16'h0000, \timestamp_fast$65 }; 3'h5: begin \$44 [0] = \battery_fail$66 ; \$44 [2] = \no_response$67 ; \$44 [3] = \$26 ; \$44 [4] = \done$17 ; \$44 [1] = \unindexed$69 ; end default: \$44 = 32'd0; endcase 3'h4: (* full_case = 32'd1 *) casez (bram_address[2:0]) 3'h0: \$44 = { 16'h0000, \multi_turn$70 }; 3'h1: \$44 = \single_turn$71 ; 3'h2: \$44 = \$27 ; 3'h3: \$44 = { 24'h000000, \timestamp_slow$72 }; 3'h4: \$44 = { 16'h0000, \timestamp_fast$73 }; 3'h5: begin \$44 [0] = \battery_fail$74 ; \$44 [2] = \no_response$75 ; \$44 [3] = \$28 ; \$44 [4] = \done$20 ; \$44 [1] = \unindexed$77 ; end default: \$44 = 32'd0; endcase 3'h5: (* full_case = 32'd1 *) casez (bram_address[2:0]) 3'h0: \$44 = { 16'h0000, \multi_turn$78 }; 3'h1: \$44 = \single_turn$79 ; 3'h2: \$44 = \$29 ; 3'h3: \$44 = { 24'h000000, \timestamp_slow$80 }; 3'h4: \$44 = { 16'h0000, \timestamp_fast$81 }; 3'h5: begin \$44 [0] = \battery_fail$82 ; \$44 [2] = \no_response$83 ; \$44 [3] = \$30 ; \$44 [4] = \done$23 ; \$44 [1] = \unindexed$85 ; end default: \$44 = 32'd0; endcase endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$49 ) begin end \$36 = new_data; if (\$2 ) begin \$36 [0] = 1'h1; end if (\$4 ) begin \$36 [1] = 1'h1; end if (\$6 ) begin \$36 [2] = 1'h1; end if (\$8 ) begin \$36 [3] = 1'h1; end if (\$10 ) begin \$36 [4] = 1'h1; end if (\$12 ) begin \$36 [5] = 1'h1; end if (\$13 ) begin \$36 = 6'h00; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$49 ) begin end (* full_case = 32'd1 *) if (\$13 ) begin \$38 = 1'h1; end else begin \$38 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$49 ) begin end \$39 = rx_start; (* full_case = 32'd1 *) casez (fsm_state) 2'h0: \$39 = 1'h0; 2'h1: /* empty */; 2'h2: if (\done$31 ) begin \$39 = 1'h1; end 2'h3: \$39 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$49 ) begin end \$40 = \trigger$30 ; casez (fsm_state) 2'h0: if (trigger) begin \$40 = 1'h1; end 2'h1: /* empty */; 2'h2: \$40 = 1'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$49 ) begin end \$41 = fsm_state; (* full_case = 32'd1 *) casez (fsm_state) 2'h0: if (trigger) begin \$41 = 2'h1; end 2'h1: if (\$14 ) begin \$41 = 2'h2; end 2'h2: if (\done$31 ) begin \$41 = 2'h3; end 2'h3: \$41 = 2'h0; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$49 ) begin end (* full_case = 32'd1 *) if (\$16 ) begin \$42 = 1'h1; end else begin \$42 = 1'h0; end end assign selected_encoder = bram_address[5:3]; assign rx = synced_rx[0]; assign \start$88 = rx_start; assign \rx$89 = synced_rx[1]; assign \start$90 = rx_start; assign \rx$91 = synced_rx[2]; assign \start$92 = rx_start; assign \rx$93 = synced_rx[3]; assign \start$94 = rx_start; assign \rx$95 = synced_rx[4]; assign \start$96 = rx_start; assign \rx$97 = synced_rx[5]; assign \start$98 = rx_start; assign tx = { \tx$100 , \tx$100 , \tx$100 , \tx$100 , \tx$100 , \tx$100 }; assign tx_enable = { \tx_enable$102 , \tx_enable$102 , \tx_enable$102 , \tx_enable$102 , \tx_enable$102 , \tx_enable$102 }; assign \$37 [5] = \done$23 ; assign \$37 [4] = \done$20 ; assign \$37 [3] = \done$17 ; assign \$37 [2] = \done$14 ; assign \$37 [1] = \done$11 ; assign \$37 [0] = done; assign \$35 [7:2] = data; assign \$35 [1] = clk; assign \$35 [0] = data_enable; assign \$19 = { 16'h0000, single_turn[31:16] }; assign \$21 = { 16'h0000, \single_turn$47 [31:16] }; assign \$23 = { 16'h0000, \single_turn$55 [31:16] }; assign \$25 = { 16'h0000, \single_turn$63 [31:16] }; assign \$27 = { 16'h0000, \single_turn$71 [31:16] }; assign \$29 = { 16'h0000, \single_turn$79 [31:16] }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.U$8 (sync_100_rst, rx, stage1, sync_100_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:29" *) input [5:0] rx; wire [5:0] rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg [5:0] stage0 = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:70" *) output [5:0] stage1; reg [5:0] stage1 = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* init = 6'h00 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:70" *) wire [5:0] synced_rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage0 <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_100_clk) stage1 <= stage0; assign synced_rx = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:339" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_0 (sync_100_clk, sync_200_rst, sync_100_rst, \start$36 , raw_data, done, no_response, crc_valid, battery_fail, timestamp_slow, timestamp_fast, unindexed, single_turn, multi_turn, rx, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$50 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire [6:0] \$17 ; wire \$18 ; wire \$19 ; wire \$2 ; wire \$20 ; wire \$21 ; wire \$22 ; wire [7:0] \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire \$3 ; wire [31:0] \$30 ; reg \$31 ; reg \$32 ; reg \$33 ; reg \$34 ; reg \$35 ; reg \$36 ; reg [5:0] \$37 ; reg [7:0] \$38 ; reg [111:0] \$39 ; wire \$4 ; reg [6:0] \$40 ; reg \$41 ; reg \$42 ; reg \$43 ; reg [2:0] \$44 ; reg \$45 ; reg \$46 ; reg \$47 ; reg \$48 ; reg \$49 ; wire \$5 ; reg [7:0] \$50 ; reg [15:0] \$51 ; reg \$52 ; reg [31:0] \$53 ; reg [15:0] \$54 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) output battery_fail; reg battery_fail = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) reg crc_match = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) reg crc_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) output crc_valid; reg crc_valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) reg [6:0] current_bit_cnt = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) output done; reg done = 1'h0; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) wire \done$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) reg falling_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:358" *) wire [7:0] flag; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) reg half_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) reg [7:0] last_8_bits = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) output [15:0] multi_turn; reg [15:0] multi_turn = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) output no_response; reg no_response = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) reg prev_rx = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) output [111:0] raw_data; reg [111:0] raw_data = 112'h0000000000000000000000000000; (* init = 112'h0000000000000000000000000000 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) wire [111:0] \raw_data$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) reg receive = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) reg rising_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) reg save = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) output [31:0] single_turn; reg [31:0] single_turn = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input \start$36 ; wire \start$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) reg timeout_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) reg [5:0] timer = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) output [15:0] timestamp_fast; reg [15:0] timestamp_fast = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) output [7:0] timestamp_slow; reg [7:0] timestamp_slow = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) output unindexed; reg unindexed = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timer <= 6'h00; else timer <= \$37 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) last_8_bits <= 8'h00; else last_8_bits <= \$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) raw_data <= 112'h0000000000000000000000000000; else raw_data <= \$39 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) current_bit_cnt <= 7'h00; else current_bit_cnt <= \$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reached <= 1'h0; else crc_reached <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) done <= 1'h0; else done <= \$42 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) no_response <= 1'h0; else no_response <= \$43 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) fsm_state <= 3'h0; else fsm_state <= \$44 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) receive <= 1'h0; else receive <= \$45 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) save <= 1'h0; else save <= \$46 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_valid <= 1'h0; else crc_valid <= \$47 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_match <= 1'h0; else crc_match <= \$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) battery_fail <= 1'h0; else battery_fail <= \$49 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_slow <= 8'h00; else timestamp_slow <= \$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_fast <= 16'h0000; else timestamp_fast <= \$51 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) unindexed <= 1'h0; else unindexed <= \$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) single_turn <= 32'd0; else single_turn <= \$53 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) multi_turn <= 16'h0000; else multi_turn <= \$54 ; assign data = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:401" *) rx; assign \$1 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; assign \$2 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$3 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$4 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$5 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$6 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:364" *) 6'h24; assign \$7 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:366" *) 6'h3d; assign \$8 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) prev_rx; assign \$9 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) rx; assign \$10 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) rx; assign \$11 = prev_rx & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) \$10 ; assign \$12 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) rising_edge; assign \$13 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) falling_edge; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$13 ; assign \$15 = timer != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) 6'h3d; assign \$16 = \$14 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$15 ; assign \$17 = timer + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:399" *) 1'h1; assign \$18 = falling_edge | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) rising_edge; assign \$19 = \$18 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) half_bit_reached; assign \$20 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:408" *) rx; assign \$21 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:410" *) rx; assign \$22 = last_8_bits[4:0] != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:411" *) 5'h1f; assign \$23 = current_bit_cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:412" *) 1'h1; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:413" *) crc_reached; assign \$25 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:414" *) 7'h5f; assign \$26 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:439" *) 7'h7e; assign \$27 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:446" *) 7'h70; assign \$28 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:456" *) 7'h7e; assign \$29 = crc == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:454" *) raw_data[111:96]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) half_bit_reached <= 1'h0; else half_bit_reached <= \$31 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timeout_bit_reached <= 1'h0; else timeout_bit_reached <= \$32 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) prev_rx <= 1'h0; else prev_rx <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) rising_edge <= 1'h0; else rising_edge <= \$33 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) falling_edge <= 1'h0; else falling_edge <= \$34 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) start <= 1'h0; else start <= \$35 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) valid <= 1'h0; else valid <= \$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:348" *) \Controller.yaskawa_encoders.receiver_0.U$1 \U$1 ( .stage1(\start$22 ), .start(\start$36 ), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:342" *) \Controller.yaskawa_encoders.receiver_0.crc16_rx crc16_rx ( .crc(crc), .data_in(data), .start(start), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .valid(valid) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$38 = last_8_bits; if (receive) begin if (\$19 ) begin \$38 = { last_8_bits[6:0], \$20 }; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$39 = raw_data; if (receive) begin if (\$19 ) begin if (save) begin casez (current_bit_cnt) 7'h00: \$39 [0] = \$21 ; 7'h01: \$39 [1] = \$21 ; 7'h02: \$39 [2] = \$21 ; 7'h03: \$39 [3] = \$21 ; 7'h04: \$39 [4] = \$21 ; 7'h05: \$39 [5] = \$21 ; 7'h06: \$39 [6] = \$21 ; 7'h07: \$39 [7] = \$21 ; 7'h08: \$39 [8] = \$21 ; 7'h09: \$39 [9] = \$21 ; 7'h0a: \$39 [10] = \$21 ; 7'h0b: \$39 [11] = \$21 ; 7'h0c: \$39 [12] = \$21 ; 7'h0d: \$39 [13] = \$21 ; 7'h0e: \$39 [14] = \$21 ; 7'h0f: \$39 [15] = \$21 ; 7'h10: \$39 [16] = \$21 ; 7'h11: \$39 [17] = \$21 ; 7'h12: \$39 [18] = \$21 ; 7'h13: \$39 [19] = \$21 ; 7'h14: \$39 [20] = \$21 ; 7'h15: \$39 [21] = \$21 ; 7'h16: \$39 [22] = \$21 ; 7'h17: \$39 [23] = \$21 ; 7'h18: \$39 [24] = \$21 ; 7'h19: \$39 [25] = \$21 ; 7'h1a: \$39 [26] = \$21 ; 7'h1b: \$39 [27] = \$21 ; 7'h1c: \$39 [28] = \$21 ; 7'h1d: \$39 [29] = \$21 ; 7'h1e: \$39 [30] = \$21 ; 7'h1f: \$39 [31] = \$21 ; 7'h20: \$39 [32] = \$21 ; 7'h21: \$39 [33] = \$21 ; 7'h22: \$39 [34] = \$21 ; 7'h23: \$39 [35] = \$21 ; 7'h24: \$39 [36] = \$21 ; 7'h25: \$39 [37] = \$21 ; 7'h26: \$39 [38] = \$21 ; 7'h27: \$39 [39] = \$21 ; 7'h28: \$39 [40] = \$21 ; 7'h29: \$39 [41] = \$21 ; 7'h2a: \$39 [42] = \$21 ; 7'h2b: \$39 [43] = \$21 ; 7'h2c: \$39 [44] = \$21 ; 7'h2d: \$39 [45] = \$21 ; 7'h2e: \$39 [46] = \$21 ; 7'h2f: \$39 [47] = \$21 ; 7'h30: \$39 [48] = \$21 ; 7'h31: \$39 [49] = \$21 ; 7'h32: \$39 [50] = \$21 ; 7'h33: \$39 [51] = \$21 ; 7'h34: \$39 [52] = \$21 ; 7'h35: \$39 [53] = \$21 ; 7'h36: \$39 [54] = \$21 ; 7'h37: \$39 [55] = \$21 ; 7'h38: \$39 [56] = \$21 ; 7'h39: \$39 [57] = \$21 ; 7'h3a: \$39 [58] = \$21 ; 7'h3b: \$39 [59] = \$21 ; 7'h3c: \$39 [60] = \$21 ; 7'h3d: \$39 [61] = \$21 ; 7'h3e: \$39 [62] = \$21 ; 7'h3f: \$39 [63] = \$21 ; 7'h40: \$39 [64] = \$21 ; 7'h41: \$39 [65] = \$21 ; 7'h42: \$39 [66] = \$21 ; 7'h43: \$39 [67] = \$21 ; 7'h44: \$39 [68] = \$21 ; 7'h45: \$39 [69] = \$21 ; 7'h46: \$39 [70] = \$21 ; 7'h47: \$39 [71] = \$21 ; 7'h48: \$39 [72] = \$21 ; 7'h49: \$39 [73] = \$21 ; 7'h4a: \$39 [74] = \$21 ; 7'h4b: \$39 [75] = \$21 ; 7'h4c: \$39 [76] = \$21 ; 7'h4d: \$39 [77] = \$21 ; 7'h4e: \$39 [78] = \$21 ; 7'h4f: \$39 [79] = \$21 ; 7'h50: \$39 [80] = \$21 ; 7'h51: \$39 [81] = \$21 ; 7'h52: \$39 [82] = \$21 ; 7'h53: \$39 [83] = \$21 ; 7'h54: \$39 [84] = \$21 ; 7'h55: \$39 [85] = \$21 ; 7'h56: \$39 [86] = \$21 ; 7'h57: \$39 [87] = \$21 ; 7'h58: \$39 [88] = \$21 ; 7'h59: \$39 [89] = \$21 ; 7'h5a: \$39 [90] = \$21 ; 7'h5b: \$39 [91] = \$21 ; 7'h5c: \$39 [92] = \$21 ; 7'h5d: \$39 [93] = \$21 ; 7'h5e: \$39 [94] = \$21 ; 7'h5f: \$39 [95] = \$21 ; 7'h60: \$39 [96] = \$21 ; 7'h61: \$39 [97] = \$21 ; 7'h62: \$39 [98] = \$21 ; 7'h63: \$39 [99] = \$21 ; 7'h64: \$39 [100] = \$21 ; 7'h65: \$39 [101] = \$21 ; 7'h66: \$39 [102] = \$21 ; 7'h67: \$39 [103] = \$21 ; 7'h68: \$39 [104] = \$21 ; 7'h69: \$39 [105] = \$21 ; 7'h6a: \$39 [106] = \$21 ; 7'h6b: \$39 [107] = \$21 ; 7'h6c: \$39 [108] = \$21 ; 7'h6d: \$39 [109] = \$21 ; 7'h6e: \$39 [110] = \$21 ; 7'h6f: \$39 [111] = \$21 ; endcase end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$39 = 112'h0000000000000000000000000000; end endcase if (crc_match) begin \$39 [111:96] = 16'h0000; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$40 = current_bit_cnt; if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$40 = \$23 [6:0]; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$40 = 7'h00; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$41 = crc_reached; if (receive) begin if (\$19 ) begin if (save) begin if (\$25 ) begin \$41 = 1'h1; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$41 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$42 = done; casez (fsm_state) 3'h0: if (\start$22 ) begin \$42 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$28 ) begin \$42 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$43 = no_response; casez (fsm_state) 3'h0: if (\start$22 ) begin \$43 = 1'h1; end 3'h1: if (rising_edge) begin \$43 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$44 = fsm_state; casez (fsm_state) 3'h0: if (\start$22 ) begin \$44 = 3'h1; end 3'h1: if (rising_edge) begin \$44 = 3'h2; end 3'h2: begin if (\$26 ) begin \$44 = 3'h3; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h3: begin if (\$27 ) begin \$44 = 3'h4; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h4: begin if (\$28 ) begin \$44 = 3'h0; end if (timeout_bit_reached) begin \$44 = 3'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$45 = receive; casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$45 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$46 = save; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: if (\$26 ) begin \$46 = 1'h1; end 3'h3: if (\$27 ) begin \$46 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$47 = crc_valid; casez (fsm_state) 3'h0: if (\start$22 ) begin \$47 = 1'h0; end endcase if (crc_match) begin \$47 = 1'h1; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$48 = crc_match; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$29 ) begin \$48 = 1'h1; end endcase if (crc_match) begin \$48 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$49 = battery_fail; if (crc_match) begin \$49 = raw_data[2]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$50 = timestamp_slow; if (crc_match) begin \$50 = raw_data[23:16]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$51 = timestamp_fast; if (crc_match) begin \$51 = raw_data[39:24]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$52 = unindexed; if (crc_match) begin \$52 = raw_data[0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$53 = single_turn; if (crc_match) begin \$53 = \$30 ; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$54 = multi_turn; if (crc_match) begin \$54 = raw_data[92:77]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$31 = half_bit_reached; if (\$6 ) begin \$31 = 1'h1; end if (receive) begin if (\$19 ) begin \$31 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$31 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$32 = timeout_bit_reached; if (\$7 ) begin \$32 = 1'h1; end if (receive) begin if (\$19 ) begin \$32 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$32 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end (* full_case = 32'd1 *) if (\$9 ) begin \$33 = 1'h1; end else begin \$33 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end (* full_case = 32'd1 *) if (\$11 ) begin \$34 = 1'h1; end else begin \$34 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$35 = start; if (start) begin \$35 = 1'h0; end casez (fsm_state) 3'h0: if (\start$22 ) begin \$35 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$36 = valid; if (valid) begin \$36 = 1'h0; end if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$36 = \$24 ; end end end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$50 ) begin end \$37 = timer; if (\$16 ) begin \$37 = \$17 [5:0]; end if (receive) begin if (\$19 ) begin \$37 = 6'h00; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$37 = 6'h00; end endcase end assign \done$1 = done; assign \raw_data$3 = raw_data; assign flag = 8'h7e; assign \$30 = { raw_data[76:60], 15'h0000 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_0.U$1 (sync_200_rst, start, stage1, sync_200_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) output stage1; reg stage1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input start; wire start; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage0 <= start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage1 <= stage0; assign \start$5 = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_0.crc16_rx (sync_200_rst, data_in, crc, start, valid, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$51 = 0; wire [15:0] \$1 ; wire [15:0] \$10 ; wire \$11 ; wire [15:0] \$12 ; wire \$13 ; wire [15:0] \$14 ; wire \$15 ; wire \$16 ; wire [15:0] \$17 ; wire \$18 ; wire [15:0] \$19 ; wire \$2 ; wire \$20 ; wire [15:0] \$21 ; wire \$22 ; wire [15:0] \$23 ; wire \$24 ; wire [15:0] \$25 ; wire \$26 ; wire [15:0] \$27 ; wire \$28 ; wire [15:0] \$29 ; wire \$3 ; wire \$30 ; wire [15:0] \$31 ; wire \$32 ; wire \$33 ; wire [15:0] \$34 ; wire \$35 ; wire [15:0] \$36 ; wire \$37 ; wire [15:0] \$38 ; wire \$39 ; wire [15:0] \$4 ; reg [15:0] \$40 ; wire \$5 ; wire [15:0] \$6 ; wire \$7 ; wire [15:0] \$8 ; wire \$9 ; wire [15:0] \$auto$rtlil.cc:2485:Not$12 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [15:0] crc; wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [15:0] crc_reg = 16'hffff; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input data_in; wire data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] } == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:354" *) 16'hf0b8; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$3 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$4 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$6 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$8 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$10 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$12 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$14 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$15 = \$13 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$14 [15]; assign \$16 = \$15 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$27 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$29 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$31 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$32 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$31 [15]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$34 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$36 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$38 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reg <= 16'hffff; else crc_reg <= \$40 ; assign \$auto$rtlil.cc:2485:Not$12 = ~ { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] }; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$51 ) begin end \$40 = crc_reg; if (valid) begin \$40 [0] = \$3 ; \$40 [1] = \$5 ; \$40 [2] = \$7 ; \$40 [3] = \$9 ; \$40 [4] = \$11 ; \$40 [5] = \$16 ; \$40 [6] = \$18 ; \$40 [7] = \$20 ; \$40 [8] = \$22 ; \$40 [9] = \$24 ; \$40 [10] = \$26 ; \$40 [11] = \$28 ; \$40 [12] = \$33 ; \$40 [13] = \$35 ; \$40 [14] = \$37 ; \$40 [15] = \$39 ; end else if (start) begin \$40 = 16'hffff; end end assign data = data_in; assign crc = \$auto$rtlil.cc:2485:Not$12 ; assign \$2 = \$1 [15]; assign \$5 = \$4 [0]; assign \$7 = \$6 [1]; assign \$9 = \$8 [2]; assign \$11 = \$10 [3]; assign \$13 = \$12 [4]; assign \$18 = \$17 [5]; assign \$20 = \$19 [6]; assign \$22 = \$21 [7]; assign \$24 = \$23 [8]; assign \$26 = \$25 [9]; assign \$28 = \$27 [10]; assign \$30 = \$29 [11]; assign \$35 = \$34 [12]; assign \$37 = \$36 [13]; assign \$39 = \$38 [14]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:339" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_1 (sync_100_clk, sync_200_rst, sync_100_rst, \start$36 , raw_data, done, no_response, crc_valid, battery_fail, timestamp_slow, timestamp_fast, unindexed, single_turn, multi_turn, rx, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$52 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire [6:0] \$17 ; wire \$18 ; wire \$19 ; wire \$2 ; wire \$20 ; wire \$21 ; wire \$22 ; wire [7:0] \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire \$3 ; wire [31:0] \$30 ; reg \$31 ; reg \$32 ; reg \$33 ; reg \$34 ; reg \$35 ; reg \$36 ; reg [5:0] \$37 ; reg [7:0] \$38 ; reg [111:0] \$39 ; wire \$4 ; reg [6:0] \$40 ; reg \$41 ; reg \$42 ; reg \$43 ; reg [2:0] \$44 ; reg \$45 ; reg \$46 ; reg \$47 ; reg \$48 ; reg \$49 ; wire \$5 ; reg [7:0] \$50 ; reg [15:0] \$51 ; reg \$52 ; reg [31:0] \$53 ; reg [15:0] \$54 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) output battery_fail; reg battery_fail = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) reg crc_match = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) reg crc_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) output crc_valid; reg crc_valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) reg [6:0] current_bit_cnt = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) output done; reg done = 1'h0; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) wire \done$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) reg falling_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:358" *) wire [7:0] flag; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) reg half_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) reg [7:0] last_8_bits = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) output [15:0] multi_turn; reg [15:0] multi_turn = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) output no_response; reg no_response = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) reg prev_rx = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) output [111:0] raw_data; reg [111:0] raw_data = 112'h0000000000000000000000000000; (* init = 112'h0000000000000000000000000000 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) wire [111:0] \raw_data$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) reg receive = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) reg rising_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) reg save = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) output [31:0] single_turn; reg [31:0] single_turn = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input \start$36 ; wire \start$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) reg timeout_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) reg [5:0] timer = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) output [15:0] timestamp_fast; reg [15:0] timestamp_fast = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) output [7:0] timestamp_slow; reg [7:0] timestamp_slow = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) output unindexed; reg unindexed = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timer <= 6'h00; else timer <= \$37 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) last_8_bits <= 8'h00; else last_8_bits <= \$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) raw_data <= 112'h0000000000000000000000000000; else raw_data <= \$39 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) current_bit_cnt <= 7'h00; else current_bit_cnt <= \$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reached <= 1'h0; else crc_reached <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) done <= 1'h0; else done <= \$42 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) no_response <= 1'h0; else no_response <= \$43 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) fsm_state <= 3'h0; else fsm_state <= \$44 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) receive <= 1'h0; else receive <= \$45 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) save <= 1'h0; else save <= \$46 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_valid <= 1'h0; else crc_valid <= \$47 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_match <= 1'h0; else crc_match <= \$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) battery_fail <= 1'h0; else battery_fail <= \$49 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_slow <= 8'h00; else timestamp_slow <= \$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_fast <= 16'h0000; else timestamp_fast <= \$51 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) unindexed <= 1'h0; else unindexed <= \$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) single_turn <= 32'd0; else single_turn <= \$53 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) multi_turn <= 16'h0000; else multi_turn <= \$54 ; assign data = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:401" *) rx; assign \$1 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; assign \$2 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$3 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$4 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$5 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$6 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:364" *) 6'h24; assign \$7 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:366" *) 6'h3d; assign \$8 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) prev_rx; assign \$9 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) rx; assign \$10 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) rx; assign \$11 = prev_rx & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) \$10 ; assign \$12 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) rising_edge; assign \$13 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) falling_edge; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$13 ; assign \$15 = timer != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) 6'h3d; assign \$16 = \$14 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$15 ; assign \$17 = timer + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:399" *) 1'h1; assign \$18 = falling_edge | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) rising_edge; assign \$19 = \$18 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) half_bit_reached; assign \$20 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:408" *) rx; assign \$21 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:410" *) rx; assign \$22 = last_8_bits[4:0] != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:411" *) 5'h1f; assign \$23 = current_bit_cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:412" *) 1'h1; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:413" *) crc_reached; assign \$25 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:414" *) 7'h5f; assign \$26 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:439" *) 7'h7e; assign \$27 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:446" *) 7'h70; assign \$28 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:456" *) 7'h7e; assign \$29 = crc == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:454" *) raw_data[111:96]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) half_bit_reached <= 1'h0; else half_bit_reached <= \$31 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timeout_bit_reached <= 1'h0; else timeout_bit_reached <= \$32 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) prev_rx <= 1'h0; else prev_rx <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) rising_edge <= 1'h0; else rising_edge <= \$33 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) falling_edge <= 1'h0; else falling_edge <= \$34 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) start <= 1'h0; else start <= \$35 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) valid <= 1'h0; else valid <= \$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:348" *) \Controller.yaskawa_encoders.receiver_1.U$1 \U$1 ( .stage1(\start$22 ), .start(\start$36 ), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:342" *) \Controller.yaskawa_encoders.receiver_1.crc16_rx crc16_rx ( .crc(crc), .data_in(data), .start(start), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .valid(valid) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$38 = last_8_bits; if (receive) begin if (\$19 ) begin \$38 = { last_8_bits[6:0], \$20 }; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$39 = raw_data; if (receive) begin if (\$19 ) begin if (save) begin casez (current_bit_cnt) 7'h00: \$39 [0] = \$21 ; 7'h01: \$39 [1] = \$21 ; 7'h02: \$39 [2] = \$21 ; 7'h03: \$39 [3] = \$21 ; 7'h04: \$39 [4] = \$21 ; 7'h05: \$39 [5] = \$21 ; 7'h06: \$39 [6] = \$21 ; 7'h07: \$39 [7] = \$21 ; 7'h08: \$39 [8] = \$21 ; 7'h09: \$39 [9] = \$21 ; 7'h0a: \$39 [10] = \$21 ; 7'h0b: \$39 [11] = \$21 ; 7'h0c: \$39 [12] = \$21 ; 7'h0d: \$39 [13] = \$21 ; 7'h0e: \$39 [14] = \$21 ; 7'h0f: \$39 [15] = \$21 ; 7'h10: \$39 [16] = \$21 ; 7'h11: \$39 [17] = \$21 ; 7'h12: \$39 [18] = \$21 ; 7'h13: \$39 [19] = \$21 ; 7'h14: \$39 [20] = \$21 ; 7'h15: \$39 [21] = \$21 ; 7'h16: \$39 [22] = \$21 ; 7'h17: \$39 [23] = \$21 ; 7'h18: \$39 [24] = \$21 ; 7'h19: \$39 [25] = \$21 ; 7'h1a: \$39 [26] = \$21 ; 7'h1b: \$39 [27] = \$21 ; 7'h1c: \$39 [28] = \$21 ; 7'h1d: \$39 [29] = \$21 ; 7'h1e: \$39 [30] = \$21 ; 7'h1f: \$39 [31] = \$21 ; 7'h20: \$39 [32] = \$21 ; 7'h21: \$39 [33] = \$21 ; 7'h22: \$39 [34] = \$21 ; 7'h23: \$39 [35] = \$21 ; 7'h24: \$39 [36] = \$21 ; 7'h25: \$39 [37] = \$21 ; 7'h26: \$39 [38] = \$21 ; 7'h27: \$39 [39] = \$21 ; 7'h28: \$39 [40] = \$21 ; 7'h29: \$39 [41] = \$21 ; 7'h2a: \$39 [42] = \$21 ; 7'h2b: \$39 [43] = \$21 ; 7'h2c: \$39 [44] = \$21 ; 7'h2d: \$39 [45] = \$21 ; 7'h2e: \$39 [46] = \$21 ; 7'h2f: \$39 [47] = \$21 ; 7'h30: \$39 [48] = \$21 ; 7'h31: \$39 [49] = \$21 ; 7'h32: \$39 [50] = \$21 ; 7'h33: \$39 [51] = \$21 ; 7'h34: \$39 [52] = \$21 ; 7'h35: \$39 [53] = \$21 ; 7'h36: \$39 [54] = \$21 ; 7'h37: \$39 [55] = \$21 ; 7'h38: \$39 [56] = \$21 ; 7'h39: \$39 [57] = \$21 ; 7'h3a: \$39 [58] = \$21 ; 7'h3b: \$39 [59] = \$21 ; 7'h3c: \$39 [60] = \$21 ; 7'h3d: \$39 [61] = \$21 ; 7'h3e: \$39 [62] = \$21 ; 7'h3f: \$39 [63] = \$21 ; 7'h40: \$39 [64] = \$21 ; 7'h41: \$39 [65] = \$21 ; 7'h42: \$39 [66] = \$21 ; 7'h43: \$39 [67] = \$21 ; 7'h44: \$39 [68] = \$21 ; 7'h45: \$39 [69] = \$21 ; 7'h46: \$39 [70] = \$21 ; 7'h47: \$39 [71] = \$21 ; 7'h48: \$39 [72] = \$21 ; 7'h49: \$39 [73] = \$21 ; 7'h4a: \$39 [74] = \$21 ; 7'h4b: \$39 [75] = \$21 ; 7'h4c: \$39 [76] = \$21 ; 7'h4d: \$39 [77] = \$21 ; 7'h4e: \$39 [78] = \$21 ; 7'h4f: \$39 [79] = \$21 ; 7'h50: \$39 [80] = \$21 ; 7'h51: \$39 [81] = \$21 ; 7'h52: \$39 [82] = \$21 ; 7'h53: \$39 [83] = \$21 ; 7'h54: \$39 [84] = \$21 ; 7'h55: \$39 [85] = \$21 ; 7'h56: \$39 [86] = \$21 ; 7'h57: \$39 [87] = \$21 ; 7'h58: \$39 [88] = \$21 ; 7'h59: \$39 [89] = \$21 ; 7'h5a: \$39 [90] = \$21 ; 7'h5b: \$39 [91] = \$21 ; 7'h5c: \$39 [92] = \$21 ; 7'h5d: \$39 [93] = \$21 ; 7'h5e: \$39 [94] = \$21 ; 7'h5f: \$39 [95] = \$21 ; 7'h60: \$39 [96] = \$21 ; 7'h61: \$39 [97] = \$21 ; 7'h62: \$39 [98] = \$21 ; 7'h63: \$39 [99] = \$21 ; 7'h64: \$39 [100] = \$21 ; 7'h65: \$39 [101] = \$21 ; 7'h66: \$39 [102] = \$21 ; 7'h67: \$39 [103] = \$21 ; 7'h68: \$39 [104] = \$21 ; 7'h69: \$39 [105] = \$21 ; 7'h6a: \$39 [106] = \$21 ; 7'h6b: \$39 [107] = \$21 ; 7'h6c: \$39 [108] = \$21 ; 7'h6d: \$39 [109] = \$21 ; 7'h6e: \$39 [110] = \$21 ; 7'h6f: \$39 [111] = \$21 ; endcase end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$39 = 112'h0000000000000000000000000000; end endcase if (crc_match) begin \$39 [111:96] = 16'h0000; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$40 = current_bit_cnt; if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$40 = \$23 [6:0]; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$40 = 7'h00; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$41 = crc_reached; if (receive) begin if (\$19 ) begin if (save) begin if (\$25 ) begin \$41 = 1'h1; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$41 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$42 = done; casez (fsm_state) 3'h0: if (\start$22 ) begin \$42 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$28 ) begin \$42 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$43 = no_response; casez (fsm_state) 3'h0: if (\start$22 ) begin \$43 = 1'h1; end 3'h1: if (rising_edge) begin \$43 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$44 = fsm_state; casez (fsm_state) 3'h0: if (\start$22 ) begin \$44 = 3'h1; end 3'h1: if (rising_edge) begin \$44 = 3'h2; end 3'h2: begin if (\$26 ) begin \$44 = 3'h3; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h3: begin if (\$27 ) begin \$44 = 3'h4; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h4: begin if (\$28 ) begin \$44 = 3'h0; end if (timeout_bit_reached) begin \$44 = 3'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$45 = receive; casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$45 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$46 = save; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: if (\$26 ) begin \$46 = 1'h1; end 3'h3: if (\$27 ) begin \$46 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$47 = crc_valid; casez (fsm_state) 3'h0: if (\start$22 ) begin \$47 = 1'h0; end endcase if (crc_match) begin \$47 = 1'h1; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$48 = crc_match; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$29 ) begin \$48 = 1'h1; end endcase if (crc_match) begin \$48 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$49 = battery_fail; if (crc_match) begin \$49 = raw_data[2]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$50 = timestamp_slow; if (crc_match) begin \$50 = raw_data[23:16]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$51 = timestamp_fast; if (crc_match) begin \$51 = raw_data[39:24]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$52 = unindexed; if (crc_match) begin \$52 = raw_data[0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$53 = single_turn; if (crc_match) begin \$53 = \$30 ; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$54 = multi_turn; if (crc_match) begin \$54 = raw_data[92:77]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$31 = half_bit_reached; if (\$6 ) begin \$31 = 1'h1; end if (receive) begin if (\$19 ) begin \$31 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$31 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$32 = timeout_bit_reached; if (\$7 ) begin \$32 = 1'h1; end if (receive) begin if (\$19 ) begin \$32 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$32 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end (* full_case = 32'd1 *) if (\$9 ) begin \$33 = 1'h1; end else begin \$33 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end (* full_case = 32'd1 *) if (\$11 ) begin \$34 = 1'h1; end else begin \$34 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$35 = start; if (start) begin \$35 = 1'h0; end casez (fsm_state) 3'h0: if (\start$22 ) begin \$35 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$36 = valid; if (valid) begin \$36 = 1'h0; end if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$36 = \$24 ; end end end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$52 ) begin end \$37 = timer; if (\$16 ) begin \$37 = \$17 [5:0]; end if (receive) begin if (\$19 ) begin \$37 = 6'h00; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$37 = 6'h00; end endcase end assign \done$1 = done; assign \raw_data$3 = raw_data; assign flag = 8'h7e; assign \$30 = { raw_data[76:60], 15'h0000 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_1.U$1 (sync_200_rst, start, stage1, sync_200_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) output stage1; reg stage1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input start; wire start; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage0 <= start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage1 <= stage0; assign \start$5 = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_1.crc16_rx (sync_200_rst, data_in, crc, start, valid, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$53 = 0; wire [15:0] \$1 ; wire [15:0] \$10 ; wire \$11 ; wire [15:0] \$12 ; wire \$13 ; wire [15:0] \$14 ; wire \$15 ; wire \$16 ; wire [15:0] \$17 ; wire \$18 ; wire [15:0] \$19 ; wire \$2 ; wire \$20 ; wire [15:0] \$21 ; wire \$22 ; wire [15:0] \$23 ; wire \$24 ; wire [15:0] \$25 ; wire \$26 ; wire [15:0] \$27 ; wire \$28 ; wire [15:0] \$29 ; wire \$3 ; wire \$30 ; wire [15:0] \$31 ; wire \$32 ; wire \$33 ; wire [15:0] \$34 ; wire \$35 ; wire [15:0] \$36 ; wire \$37 ; wire [15:0] \$38 ; wire \$39 ; wire [15:0] \$4 ; reg [15:0] \$40 ; wire \$5 ; wire [15:0] \$6 ; wire \$7 ; wire [15:0] \$8 ; wire \$9 ; wire [15:0] \$auto$rtlil.cc:2485:Not$10 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [15:0] crc; wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [15:0] crc_reg = 16'hffff; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input data_in; wire data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] } == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:354" *) 16'hf0b8; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$3 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$4 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$6 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$8 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$10 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$12 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$14 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$15 = \$13 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$14 [15]; assign \$16 = \$15 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$27 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$29 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$31 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$32 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$31 [15]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$34 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$36 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$38 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reg <= 16'hffff; else crc_reg <= \$40 ; assign \$auto$rtlil.cc:2485:Not$10 = ~ { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] }; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$53 ) begin end \$40 = crc_reg; if (valid) begin \$40 [0] = \$3 ; \$40 [1] = \$5 ; \$40 [2] = \$7 ; \$40 [3] = \$9 ; \$40 [4] = \$11 ; \$40 [5] = \$16 ; \$40 [6] = \$18 ; \$40 [7] = \$20 ; \$40 [8] = \$22 ; \$40 [9] = \$24 ; \$40 [10] = \$26 ; \$40 [11] = \$28 ; \$40 [12] = \$33 ; \$40 [13] = \$35 ; \$40 [14] = \$37 ; \$40 [15] = \$39 ; end else if (start) begin \$40 = 16'hffff; end end assign data = data_in; assign crc = \$auto$rtlil.cc:2485:Not$10 ; assign \$2 = \$1 [15]; assign \$5 = \$4 [0]; assign \$7 = \$6 [1]; assign \$9 = \$8 [2]; assign \$11 = \$10 [3]; assign \$13 = \$12 [4]; assign \$18 = \$17 [5]; assign \$20 = \$19 [6]; assign \$22 = \$21 [7]; assign \$24 = \$23 [8]; assign \$26 = \$25 [9]; assign \$28 = \$27 [10]; assign \$30 = \$29 [11]; assign \$35 = \$34 [12]; assign \$37 = \$36 [13]; assign \$39 = \$38 [14]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:339" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_2 (sync_100_clk, sync_200_rst, sync_100_rst, \start$36 , raw_data, done, no_response, crc_valid, battery_fail, timestamp_slow, timestamp_fast, unindexed, single_turn, multi_turn, rx, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$54 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire [6:0] \$17 ; wire \$18 ; wire \$19 ; wire \$2 ; wire \$20 ; wire \$21 ; wire \$22 ; wire [7:0] \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire \$3 ; wire [31:0] \$30 ; reg \$31 ; reg \$32 ; reg \$33 ; reg \$34 ; reg \$35 ; reg \$36 ; reg [5:0] \$37 ; reg [7:0] \$38 ; reg [111:0] \$39 ; wire \$4 ; reg [6:0] \$40 ; reg \$41 ; reg \$42 ; reg \$43 ; reg [2:0] \$44 ; reg \$45 ; reg \$46 ; reg \$47 ; reg \$48 ; reg \$49 ; wire \$5 ; reg [7:0] \$50 ; reg [15:0] \$51 ; reg \$52 ; reg [31:0] \$53 ; reg [15:0] \$54 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) output battery_fail; reg battery_fail = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) reg crc_match = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) reg crc_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) output crc_valid; reg crc_valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) reg [6:0] current_bit_cnt = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) output done; reg done = 1'h0; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) wire \done$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) reg falling_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:358" *) wire [7:0] flag; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) reg half_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) reg [7:0] last_8_bits = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) output [15:0] multi_turn; reg [15:0] multi_turn = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) output no_response; reg no_response = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) reg prev_rx = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) output [111:0] raw_data; reg [111:0] raw_data = 112'h0000000000000000000000000000; (* init = 112'h0000000000000000000000000000 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) wire [111:0] \raw_data$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) reg receive = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) reg rising_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) reg save = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) output [31:0] single_turn; reg [31:0] single_turn = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input \start$36 ; wire \start$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) reg timeout_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) reg [5:0] timer = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) output [15:0] timestamp_fast; reg [15:0] timestamp_fast = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) output [7:0] timestamp_slow; reg [7:0] timestamp_slow = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) output unindexed; reg unindexed = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timer <= 6'h00; else timer <= \$37 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) last_8_bits <= 8'h00; else last_8_bits <= \$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) raw_data <= 112'h0000000000000000000000000000; else raw_data <= \$39 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) current_bit_cnt <= 7'h00; else current_bit_cnt <= \$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reached <= 1'h0; else crc_reached <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) done <= 1'h0; else done <= \$42 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) no_response <= 1'h0; else no_response <= \$43 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) fsm_state <= 3'h0; else fsm_state <= \$44 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) receive <= 1'h0; else receive <= \$45 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) save <= 1'h0; else save <= \$46 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_valid <= 1'h0; else crc_valid <= \$47 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_match <= 1'h0; else crc_match <= \$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) battery_fail <= 1'h0; else battery_fail <= \$49 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_slow <= 8'h00; else timestamp_slow <= \$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_fast <= 16'h0000; else timestamp_fast <= \$51 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) unindexed <= 1'h0; else unindexed <= \$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) single_turn <= 32'd0; else single_turn <= \$53 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) multi_turn <= 16'h0000; else multi_turn <= \$54 ; assign data = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:401" *) rx; assign \$1 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; assign \$2 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$3 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$4 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$5 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$6 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:364" *) 6'h24; assign \$7 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:366" *) 6'h3d; assign \$8 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) prev_rx; assign \$9 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) rx; assign \$10 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) rx; assign \$11 = prev_rx & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) \$10 ; assign \$12 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) rising_edge; assign \$13 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) falling_edge; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$13 ; assign \$15 = timer != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) 6'h3d; assign \$16 = \$14 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$15 ; assign \$17 = timer + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:399" *) 1'h1; assign \$18 = falling_edge | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) rising_edge; assign \$19 = \$18 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) half_bit_reached; assign \$20 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:408" *) rx; assign \$21 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:410" *) rx; assign \$22 = last_8_bits[4:0] != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:411" *) 5'h1f; assign \$23 = current_bit_cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:412" *) 1'h1; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:413" *) crc_reached; assign \$25 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:414" *) 7'h5f; assign \$26 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:439" *) 7'h7e; assign \$27 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:446" *) 7'h70; assign \$28 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:456" *) 7'h7e; assign \$29 = crc == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:454" *) raw_data[111:96]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) half_bit_reached <= 1'h0; else half_bit_reached <= \$31 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timeout_bit_reached <= 1'h0; else timeout_bit_reached <= \$32 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) prev_rx <= 1'h0; else prev_rx <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) rising_edge <= 1'h0; else rising_edge <= \$33 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) falling_edge <= 1'h0; else falling_edge <= \$34 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) start <= 1'h0; else start <= \$35 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) valid <= 1'h0; else valid <= \$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:348" *) \Controller.yaskawa_encoders.receiver_2.U$1 \U$1 ( .stage1(\start$22 ), .start(\start$36 ), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:342" *) \Controller.yaskawa_encoders.receiver_2.crc16_rx crc16_rx ( .crc(crc), .data_in(data), .start(start), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .valid(valid) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$38 = last_8_bits; if (receive) begin if (\$19 ) begin \$38 = { last_8_bits[6:0], \$20 }; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$39 = raw_data; if (receive) begin if (\$19 ) begin if (save) begin casez (current_bit_cnt) 7'h00: \$39 [0] = \$21 ; 7'h01: \$39 [1] = \$21 ; 7'h02: \$39 [2] = \$21 ; 7'h03: \$39 [3] = \$21 ; 7'h04: \$39 [4] = \$21 ; 7'h05: \$39 [5] = \$21 ; 7'h06: \$39 [6] = \$21 ; 7'h07: \$39 [7] = \$21 ; 7'h08: \$39 [8] = \$21 ; 7'h09: \$39 [9] = \$21 ; 7'h0a: \$39 [10] = \$21 ; 7'h0b: \$39 [11] = \$21 ; 7'h0c: \$39 [12] = \$21 ; 7'h0d: \$39 [13] = \$21 ; 7'h0e: \$39 [14] = \$21 ; 7'h0f: \$39 [15] = \$21 ; 7'h10: \$39 [16] = \$21 ; 7'h11: \$39 [17] = \$21 ; 7'h12: \$39 [18] = \$21 ; 7'h13: \$39 [19] = \$21 ; 7'h14: \$39 [20] = \$21 ; 7'h15: \$39 [21] = \$21 ; 7'h16: \$39 [22] = \$21 ; 7'h17: \$39 [23] = \$21 ; 7'h18: \$39 [24] = \$21 ; 7'h19: \$39 [25] = \$21 ; 7'h1a: \$39 [26] = \$21 ; 7'h1b: \$39 [27] = \$21 ; 7'h1c: \$39 [28] = \$21 ; 7'h1d: \$39 [29] = \$21 ; 7'h1e: \$39 [30] = \$21 ; 7'h1f: \$39 [31] = \$21 ; 7'h20: \$39 [32] = \$21 ; 7'h21: \$39 [33] = \$21 ; 7'h22: \$39 [34] = \$21 ; 7'h23: \$39 [35] = \$21 ; 7'h24: \$39 [36] = \$21 ; 7'h25: \$39 [37] = \$21 ; 7'h26: \$39 [38] = \$21 ; 7'h27: \$39 [39] = \$21 ; 7'h28: \$39 [40] = \$21 ; 7'h29: \$39 [41] = \$21 ; 7'h2a: \$39 [42] = \$21 ; 7'h2b: \$39 [43] = \$21 ; 7'h2c: \$39 [44] = \$21 ; 7'h2d: \$39 [45] = \$21 ; 7'h2e: \$39 [46] = \$21 ; 7'h2f: \$39 [47] = \$21 ; 7'h30: \$39 [48] = \$21 ; 7'h31: \$39 [49] = \$21 ; 7'h32: \$39 [50] = \$21 ; 7'h33: \$39 [51] = \$21 ; 7'h34: \$39 [52] = \$21 ; 7'h35: \$39 [53] = \$21 ; 7'h36: \$39 [54] = \$21 ; 7'h37: \$39 [55] = \$21 ; 7'h38: \$39 [56] = \$21 ; 7'h39: \$39 [57] = \$21 ; 7'h3a: \$39 [58] = \$21 ; 7'h3b: \$39 [59] = \$21 ; 7'h3c: \$39 [60] = \$21 ; 7'h3d: \$39 [61] = \$21 ; 7'h3e: \$39 [62] = \$21 ; 7'h3f: \$39 [63] = \$21 ; 7'h40: \$39 [64] = \$21 ; 7'h41: \$39 [65] = \$21 ; 7'h42: \$39 [66] = \$21 ; 7'h43: \$39 [67] = \$21 ; 7'h44: \$39 [68] = \$21 ; 7'h45: \$39 [69] = \$21 ; 7'h46: \$39 [70] = \$21 ; 7'h47: \$39 [71] = \$21 ; 7'h48: \$39 [72] = \$21 ; 7'h49: \$39 [73] = \$21 ; 7'h4a: \$39 [74] = \$21 ; 7'h4b: \$39 [75] = \$21 ; 7'h4c: \$39 [76] = \$21 ; 7'h4d: \$39 [77] = \$21 ; 7'h4e: \$39 [78] = \$21 ; 7'h4f: \$39 [79] = \$21 ; 7'h50: \$39 [80] = \$21 ; 7'h51: \$39 [81] = \$21 ; 7'h52: \$39 [82] = \$21 ; 7'h53: \$39 [83] = \$21 ; 7'h54: \$39 [84] = \$21 ; 7'h55: \$39 [85] = \$21 ; 7'h56: \$39 [86] = \$21 ; 7'h57: \$39 [87] = \$21 ; 7'h58: \$39 [88] = \$21 ; 7'h59: \$39 [89] = \$21 ; 7'h5a: \$39 [90] = \$21 ; 7'h5b: \$39 [91] = \$21 ; 7'h5c: \$39 [92] = \$21 ; 7'h5d: \$39 [93] = \$21 ; 7'h5e: \$39 [94] = \$21 ; 7'h5f: \$39 [95] = \$21 ; 7'h60: \$39 [96] = \$21 ; 7'h61: \$39 [97] = \$21 ; 7'h62: \$39 [98] = \$21 ; 7'h63: \$39 [99] = \$21 ; 7'h64: \$39 [100] = \$21 ; 7'h65: \$39 [101] = \$21 ; 7'h66: \$39 [102] = \$21 ; 7'h67: \$39 [103] = \$21 ; 7'h68: \$39 [104] = \$21 ; 7'h69: \$39 [105] = \$21 ; 7'h6a: \$39 [106] = \$21 ; 7'h6b: \$39 [107] = \$21 ; 7'h6c: \$39 [108] = \$21 ; 7'h6d: \$39 [109] = \$21 ; 7'h6e: \$39 [110] = \$21 ; 7'h6f: \$39 [111] = \$21 ; endcase end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$39 = 112'h0000000000000000000000000000; end endcase if (crc_match) begin \$39 [111:96] = 16'h0000; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$40 = current_bit_cnt; if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$40 = \$23 [6:0]; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$40 = 7'h00; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$41 = crc_reached; if (receive) begin if (\$19 ) begin if (save) begin if (\$25 ) begin \$41 = 1'h1; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$41 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$42 = done; casez (fsm_state) 3'h0: if (\start$22 ) begin \$42 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$28 ) begin \$42 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$43 = no_response; casez (fsm_state) 3'h0: if (\start$22 ) begin \$43 = 1'h1; end 3'h1: if (rising_edge) begin \$43 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$44 = fsm_state; casez (fsm_state) 3'h0: if (\start$22 ) begin \$44 = 3'h1; end 3'h1: if (rising_edge) begin \$44 = 3'h2; end 3'h2: begin if (\$26 ) begin \$44 = 3'h3; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h3: begin if (\$27 ) begin \$44 = 3'h4; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h4: begin if (\$28 ) begin \$44 = 3'h0; end if (timeout_bit_reached) begin \$44 = 3'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$45 = receive; casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$45 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$46 = save; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: if (\$26 ) begin \$46 = 1'h1; end 3'h3: if (\$27 ) begin \$46 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$47 = crc_valid; casez (fsm_state) 3'h0: if (\start$22 ) begin \$47 = 1'h0; end endcase if (crc_match) begin \$47 = 1'h1; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$48 = crc_match; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$29 ) begin \$48 = 1'h1; end endcase if (crc_match) begin \$48 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$49 = battery_fail; if (crc_match) begin \$49 = raw_data[2]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$50 = timestamp_slow; if (crc_match) begin \$50 = raw_data[23:16]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$51 = timestamp_fast; if (crc_match) begin \$51 = raw_data[39:24]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$52 = unindexed; if (crc_match) begin \$52 = raw_data[0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$53 = single_turn; if (crc_match) begin \$53 = \$30 ; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$54 = multi_turn; if (crc_match) begin \$54 = raw_data[92:77]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$31 = half_bit_reached; if (\$6 ) begin \$31 = 1'h1; end if (receive) begin if (\$19 ) begin \$31 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$31 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$32 = timeout_bit_reached; if (\$7 ) begin \$32 = 1'h1; end if (receive) begin if (\$19 ) begin \$32 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$32 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end (* full_case = 32'd1 *) if (\$9 ) begin \$33 = 1'h1; end else begin \$33 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end (* full_case = 32'd1 *) if (\$11 ) begin \$34 = 1'h1; end else begin \$34 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$35 = start; if (start) begin \$35 = 1'h0; end casez (fsm_state) 3'h0: if (\start$22 ) begin \$35 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$36 = valid; if (valid) begin \$36 = 1'h0; end if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$36 = \$24 ; end end end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$54 ) begin end \$37 = timer; if (\$16 ) begin \$37 = \$17 [5:0]; end if (receive) begin if (\$19 ) begin \$37 = 6'h00; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$37 = 6'h00; end endcase end assign \done$1 = done; assign \raw_data$3 = raw_data; assign flag = 8'h7e; assign \$30 = { raw_data[76:60], 15'h0000 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_2.U$1 (sync_200_rst, start, stage1, sync_200_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) output stage1; reg stage1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input start; wire start; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage0 <= start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage1 <= stage0; assign \start$5 = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_2.crc16_rx (sync_200_rst, data_in, crc, start, valid, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$55 = 0; wire [15:0] \$1 ; wire [15:0] \$10 ; wire \$11 ; wire [15:0] \$12 ; wire \$13 ; wire [15:0] \$14 ; wire \$15 ; wire \$16 ; wire [15:0] \$17 ; wire \$18 ; wire [15:0] \$19 ; wire \$2 ; wire \$20 ; wire [15:0] \$21 ; wire \$22 ; wire [15:0] \$23 ; wire \$24 ; wire [15:0] \$25 ; wire \$26 ; wire [15:0] \$27 ; wire \$28 ; wire [15:0] \$29 ; wire \$3 ; wire \$30 ; wire [15:0] \$31 ; wire \$32 ; wire \$33 ; wire [15:0] \$34 ; wire \$35 ; wire [15:0] \$36 ; wire \$37 ; wire [15:0] \$38 ; wire \$39 ; wire [15:0] \$4 ; reg [15:0] \$40 ; wire \$5 ; wire [15:0] \$6 ; wire \$7 ; wire [15:0] \$8 ; wire \$9 ; wire [15:0] \$auto$rtlil.cc:2485:Not$8 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [15:0] crc; wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [15:0] crc_reg = 16'hffff; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input data_in; wire data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] } == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:354" *) 16'hf0b8; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$3 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$4 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$6 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$8 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$10 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$12 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$14 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$15 = \$13 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$14 [15]; assign \$16 = \$15 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$27 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$29 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$31 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$32 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$31 [15]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$34 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$36 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$38 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reg <= 16'hffff; else crc_reg <= \$40 ; assign \$auto$rtlil.cc:2485:Not$8 = ~ { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] }; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$55 ) begin end \$40 = crc_reg; if (valid) begin \$40 [0] = \$3 ; \$40 [1] = \$5 ; \$40 [2] = \$7 ; \$40 [3] = \$9 ; \$40 [4] = \$11 ; \$40 [5] = \$16 ; \$40 [6] = \$18 ; \$40 [7] = \$20 ; \$40 [8] = \$22 ; \$40 [9] = \$24 ; \$40 [10] = \$26 ; \$40 [11] = \$28 ; \$40 [12] = \$33 ; \$40 [13] = \$35 ; \$40 [14] = \$37 ; \$40 [15] = \$39 ; end else if (start) begin \$40 = 16'hffff; end end assign data = data_in; assign crc = \$auto$rtlil.cc:2485:Not$8 ; assign \$2 = \$1 [15]; assign \$5 = \$4 [0]; assign \$7 = \$6 [1]; assign \$9 = \$8 [2]; assign \$11 = \$10 [3]; assign \$13 = \$12 [4]; assign \$18 = \$17 [5]; assign \$20 = \$19 [6]; assign \$22 = \$21 [7]; assign \$24 = \$23 [8]; assign \$26 = \$25 [9]; assign \$28 = \$27 [10]; assign \$30 = \$29 [11]; assign \$35 = \$34 [12]; assign \$37 = \$36 [13]; assign \$39 = \$38 [14]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:339" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_3 (sync_100_clk, sync_200_rst, sync_100_rst, \start$36 , raw_data, done, no_response, crc_valid, battery_fail, timestamp_slow, timestamp_fast, unindexed, single_turn, multi_turn, rx, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$56 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire [6:0] \$17 ; wire \$18 ; wire \$19 ; wire \$2 ; wire \$20 ; wire \$21 ; wire \$22 ; wire [7:0] \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire \$3 ; wire [46:0] \$30 ; reg \$31 ; reg \$32 ; reg \$33 ; reg \$34 ; reg \$35 ; reg \$36 ; reg [5:0] \$37 ; reg [7:0] \$38 ; reg [111:0] \$39 ; wire \$4 ; reg [6:0] \$40 ; reg \$41 ; reg \$42 ; reg \$43 ; reg [2:0] \$44 ; reg \$45 ; reg \$46 ; reg \$47 ; reg \$48 ; reg \$49 ; wire \$5 ; reg [7:0] \$50 ; reg [15:0] \$51 ; reg \$52 ; reg [31:0] \$53 ; reg [15:0] \$54 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) output battery_fail; reg battery_fail = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) reg crc_match = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) reg crc_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) output crc_valid; reg crc_valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) reg [6:0] current_bit_cnt = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) output done; reg done = 1'h0; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) wire \done$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) reg falling_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:358" *) wire [7:0] flag; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) reg half_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) reg [7:0] last_8_bits = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) output [15:0] multi_turn; reg [15:0] multi_turn = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) output no_response; reg no_response = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) reg prev_rx = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) output [111:0] raw_data; reg [111:0] raw_data = 112'h0000000000000000000000000000; (* init = 112'h0000000000000000000000000000 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) wire [111:0] \raw_data$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) reg receive = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) reg rising_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) reg save = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) output [31:0] single_turn; reg [31:0] single_turn = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input \start$36 ; wire \start$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) reg timeout_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) reg [5:0] timer = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) output [15:0] timestamp_fast; reg [15:0] timestamp_fast = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) output [7:0] timestamp_slow; reg [7:0] timestamp_slow = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) output unindexed; reg unindexed = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timer <= 6'h00; else timer <= \$37 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) last_8_bits <= 8'h00; else last_8_bits <= \$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) raw_data <= 112'h0000000000000000000000000000; else raw_data <= \$39 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) current_bit_cnt <= 7'h00; else current_bit_cnt <= \$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reached <= 1'h0; else crc_reached <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) done <= 1'h0; else done <= \$42 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) no_response <= 1'h0; else no_response <= \$43 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) fsm_state <= 3'h0; else fsm_state <= \$44 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) receive <= 1'h0; else receive <= \$45 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) save <= 1'h0; else save <= \$46 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_valid <= 1'h0; else crc_valid <= \$47 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_match <= 1'h0; else crc_match <= \$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) battery_fail <= 1'h0; else battery_fail <= \$49 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_slow <= 8'h00; else timestamp_slow <= \$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_fast <= 16'h0000; else timestamp_fast <= \$51 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) unindexed <= 1'h0; else unindexed <= \$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) single_turn <= 32'd0; else single_turn <= \$53 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) multi_turn <= 16'h0000; else multi_turn <= \$54 ; assign data = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:401" *) rx; assign \$1 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; assign \$2 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$3 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$4 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$5 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$6 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:364" *) 6'h24; assign \$7 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:366" *) 6'h3d; assign \$8 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) prev_rx; assign \$9 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) rx; assign \$10 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) rx; assign \$11 = prev_rx & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) \$10 ; assign \$12 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) rising_edge; assign \$13 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) falling_edge; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$13 ; assign \$15 = timer != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) 6'h3d; assign \$16 = \$14 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$15 ; assign \$17 = timer + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:399" *) 1'h1; assign \$18 = falling_edge | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) rising_edge; assign \$19 = \$18 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) half_bit_reached; assign \$20 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:408" *) rx; assign \$21 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:410" *) rx; assign \$22 = last_8_bits[4:0] != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:411" *) 5'h1f; assign \$23 = current_bit_cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:412" *) 1'h1; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:413" *) crc_reached; assign \$25 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:414" *) 7'h5f; assign \$26 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:439" *) 7'h7e; assign \$27 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:446" *) 7'h70; assign \$28 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:456" *) 7'h7e; assign \$29 = crc == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:454" *) raw_data[111:96]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) half_bit_reached <= 1'h0; else half_bit_reached <= \$31 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timeout_bit_reached <= 1'h0; else timeout_bit_reached <= \$32 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) prev_rx <= 1'h0; else prev_rx <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) rising_edge <= 1'h0; else rising_edge <= \$33 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) falling_edge <= 1'h0; else falling_edge <= \$34 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) start <= 1'h0; else start <= \$35 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) valid <= 1'h0; else valid <= \$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:348" *) \Controller.yaskawa_encoders.receiver_3.U$1 \U$1 ( .stage1(\start$22 ), .start(\start$36 ), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:342" *) \Controller.yaskawa_encoders.receiver_3.crc16_rx crc16_rx ( .crc(crc), .data_in(data), .start(start), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .valid(valid) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$38 = last_8_bits; if (receive) begin if (\$19 ) begin \$38 = { last_8_bits[6:0], \$20 }; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$39 = raw_data; if (receive) begin if (\$19 ) begin if (save) begin casez (current_bit_cnt) 7'h00: \$39 [0] = \$21 ; 7'h01: \$39 [1] = \$21 ; 7'h02: \$39 [2] = \$21 ; 7'h03: \$39 [3] = \$21 ; 7'h04: \$39 [4] = \$21 ; 7'h05: \$39 [5] = \$21 ; 7'h06: \$39 [6] = \$21 ; 7'h07: \$39 [7] = \$21 ; 7'h08: \$39 [8] = \$21 ; 7'h09: \$39 [9] = \$21 ; 7'h0a: \$39 [10] = \$21 ; 7'h0b: \$39 [11] = \$21 ; 7'h0c: \$39 [12] = \$21 ; 7'h0d: \$39 [13] = \$21 ; 7'h0e: \$39 [14] = \$21 ; 7'h0f: \$39 [15] = \$21 ; 7'h10: \$39 [16] = \$21 ; 7'h11: \$39 [17] = \$21 ; 7'h12: \$39 [18] = \$21 ; 7'h13: \$39 [19] = \$21 ; 7'h14: \$39 [20] = \$21 ; 7'h15: \$39 [21] = \$21 ; 7'h16: \$39 [22] = \$21 ; 7'h17: \$39 [23] = \$21 ; 7'h18: \$39 [24] = \$21 ; 7'h19: \$39 [25] = \$21 ; 7'h1a: \$39 [26] = \$21 ; 7'h1b: \$39 [27] = \$21 ; 7'h1c: \$39 [28] = \$21 ; 7'h1d: \$39 [29] = \$21 ; 7'h1e: \$39 [30] = \$21 ; 7'h1f: \$39 [31] = \$21 ; 7'h20: \$39 [32] = \$21 ; 7'h21: \$39 [33] = \$21 ; 7'h22: \$39 [34] = \$21 ; 7'h23: \$39 [35] = \$21 ; 7'h24: \$39 [36] = \$21 ; 7'h25: \$39 [37] = \$21 ; 7'h26: \$39 [38] = \$21 ; 7'h27: \$39 [39] = \$21 ; 7'h28: \$39 [40] = \$21 ; 7'h29: \$39 [41] = \$21 ; 7'h2a: \$39 [42] = \$21 ; 7'h2b: \$39 [43] = \$21 ; 7'h2c: \$39 [44] = \$21 ; 7'h2d: \$39 [45] = \$21 ; 7'h2e: \$39 [46] = \$21 ; 7'h2f: \$39 [47] = \$21 ; 7'h30: \$39 [48] = \$21 ; 7'h31: \$39 [49] = \$21 ; 7'h32: \$39 [50] = \$21 ; 7'h33: \$39 [51] = \$21 ; 7'h34: \$39 [52] = \$21 ; 7'h35: \$39 [53] = \$21 ; 7'h36: \$39 [54] = \$21 ; 7'h37: \$39 [55] = \$21 ; 7'h38: \$39 [56] = \$21 ; 7'h39: \$39 [57] = \$21 ; 7'h3a: \$39 [58] = \$21 ; 7'h3b: \$39 [59] = \$21 ; 7'h3c: \$39 [60] = \$21 ; 7'h3d: \$39 [61] = \$21 ; 7'h3e: \$39 [62] = \$21 ; 7'h3f: \$39 [63] = \$21 ; 7'h40: \$39 [64] = \$21 ; 7'h41: \$39 [65] = \$21 ; 7'h42: \$39 [66] = \$21 ; 7'h43: \$39 [67] = \$21 ; 7'h44: \$39 [68] = \$21 ; 7'h45: \$39 [69] = \$21 ; 7'h46: \$39 [70] = \$21 ; 7'h47: \$39 [71] = \$21 ; 7'h48: \$39 [72] = \$21 ; 7'h49: \$39 [73] = \$21 ; 7'h4a: \$39 [74] = \$21 ; 7'h4b: \$39 [75] = \$21 ; 7'h4c: \$39 [76] = \$21 ; 7'h4d: \$39 [77] = \$21 ; 7'h4e: \$39 [78] = \$21 ; 7'h4f: \$39 [79] = \$21 ; 7'h50: \$39 [80] = \$21 ; 7'h51: \$39 [81] = \$21 ; 7'h52: \$39 [82] = \$21 ; 7'h53: \$39 [83] = \$21 ; 7'h54: \$39 [84] = \$21 ; 7'h55: \$39 [85] = \$21 ; 7'h56: \$39 [86] = \$21 ; 7'h57: \$39 [87] = \$21 ; 7'h58: \$39 [88] = \$21 ; 7'h59: \$39 [89] = \$21 ; 7'h5a: \$39 [90] = \$21 ; 7'h5b: \$39 [91] = \$21 ; 7'h5c: \$39 [92] = \$21 ; 7'h5d: \$39 [93] = \$21 ; 7'h5e: \$39 [94] = \$21 ; 7'h5f: \$39 [95] = \$21 ; 7'h60: \$39 [96] = \$21 ; 7'h61: \$39 [97] = \$21 ; 7'h62: \$39 [98] = \$21 ; 7'h63: \$39 [99] = \$21 ; 7'h64: \$39 [100] = \$21 ; 7'h65: \$39 [101] = \$21 ; 7'h66: \$39 [102] = \$21 ; 7'h67: \$39 [103] = \$21 ; 7'h68: \$39 [104] = \$21 ; 7'h69: \$39 [105] = \$21 ; 7'h6a: \$39 [106] = \$21 ; 7'h6b: \$39 [107] = \$21 ; 7'h6c: \$39 [108] = \$21 ; 7'h6d: \$39 [109] = \$21 ; 7'h6e: \$39 [110] = \$21 ; 7'h6f: \$39 [111] = \$21 ; endcase end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$39 = 112'h0000000000000000000000000000; end endcase if (crc_match) begin \$39 [111:96] = 16'h0000; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$40 = current_bit_cnt; if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$40 = \$23 [6:0]; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$40 = 7'h00; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$41 = crc_reached; if (receive) begin if (\$19 ) begin if (save) begin if (\$25 ) begin \$41 = 1'h1; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$41 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$42 = done; casez (fsm_state) 3'h0: if (\start$22 ) begin \$42 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$28 ) begin \$42 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$43 = no_response; casez (fsm_state) 3'h0: if (\start$22 ) begin \$43 = 1'h1; end 3'h1: if (rising_edge) begin \$43 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$44 = fsm_state; casez (fsm_state) 3'h0: if (\start$22 ) begin \$44 = 3'h1; end 3'h1: if (rising_edge) begin \$44 = 3'h2; end 3'h2: begin if (\$26 ) begin \$44 = 3'h3; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h3: begin if (\$27 ) begin \$44 = 3'h4; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h4: begin if (\$28 ) begin \$44 = 3'h0; end if (timeout_bit_reached) begin \$44 = 3'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$45 = receive; casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$45 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$46 = save; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: if (\$26 ) begin \$46 = 1'h1; end 3'h3: if (\$27 ) begin \$46 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$47 = crc_valid; casez (fsm_state) 3'h0: if (\start$22 ) begin \$47 = 1'h0; end endcase if (crc_match) begin \$47 = 1'h1; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$48 = crc_match; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$29 ) begin \$48 = 1'h1; end endcase if (crc_match) begin \$48 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$49 = battery_fail; if (crc_match) begin \$49 = raw_data[2]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$50 = timestamp_slow; if (crc_match) begin \$50 = raw_data[23:16]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$51 = timestamp_fast; if (crc_match) begin \$51 = raw_data[39:24]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$52 = unindexed; if (crc_match) begin \$52 = raw_data[0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$53 = single_turn; if (crc_match) begin \$53 = \$30 [31:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$54 = multi_turn; if (crc_match) begin \$54 = raw_data[91:76]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$31 = half_bit_reached; if (\$6 ) begin \$31 = 1'h1; end if (receive) begin if (\$19 ) begin \$31 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$31 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$32 = timeout_bit_reached; if (\$7 ) begin \$32 = 1'h1; end if (receive) begin if (\$19 ) begin \$32 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$32 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end (* full_case = 32'd1 *) if (\$9 ) begin \$33 = 1'h1; end else begin \$33 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end (* full_case = 32'd1 *) if (\$11 ) begin \$34 = 1'h1; end else begin \$34 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$35 = start; if (start) begin \$35 = 1'h0; end casez (fsm_state) 3'h0: if (\start$22 ) begin \$35 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$36 = valid; if (valid) begin \$36 = 1'h0; end if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$36 = \$24 ; end end end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$56 ) begin end \$37 = timer; if (\$16 ) begin \$37 = \$17 [5:0]; end if (receive) begin if (\$19 ) begin \$37 = 6'h00; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$37 = 6'h00; end endcase end assign \done$1 = done; assign \raw_data$3 = raw_data; assign flag = 8'h7e; assign \$30 = { 15'h0000, raw_data[75:60], 16'h0000 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_3.U$1 (sync_200_rst, start, stage1, sync_200_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) output stage1; reg stage1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input start; wire start; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage0 <= start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage1 <= stage0; assign \start$5 = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_3.crc16_rx (sync_200_rst, data_in, crc, start, valid, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$57 = 0; wire [15:0] \$1 ; wire [15:0] \$10 ; wire \$11 ; wire [15:0] \$12 ; wire \$13 ; wire [15:0] \$14 ; wire \$15 ; wire \$16 ; wire [15:0] \$17 ; wire \$18 ; wire [15:0] \$19 ; wire \$2 ; wire \$20 ; wire [15:0] \$21 ; wire \$22 ; wire [15:0] \$23 ; wire \$24 ; wire [15:0] \$25 ; wire \$26 ; wire [15:0] \$27 ; wire \$28 ; wire [15:0] \$29 ; wire \$3 ; wire \$30 ; wire [15:0] \$31 ; wire \$32 ; wire \$33 ; wire [15:0] \$34 ; wire \$35 ; wire [15:0] \$36 ; wire \$37 ; wire [15:0] \$38 ; wire \$39 ; wire [15:0] \$4 ; reg [15:0] \$40 ; wire \$5 ; wire [15:0] \$6 ; wire \$7 ; wire [15:0] \$8 ; wire \$9 ; wire [15:0] \$auto$rtlil.cc:2485:Not$6 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [15:0] crc; wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [15:0] crc_reg = 16'hffff; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input data_in; wire data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] } == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:354" *) 16'hf0b8; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$3 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$4 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$6 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$8 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$10 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$12 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$14 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$15 = \$13 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$14 [15]; assign \$16 = \$15 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$27 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$29 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$31 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$32 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$31 [15]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$34 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$36 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$38 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reg <= 16'hffff; else crc_reg <= \$40 ; assign \$auto$rtlil.cc:2485:Not$6 = ~ { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] }; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$57 ) begin end \$40 = crc_reg; if (valid) begin \$40 [0] = \$3 ; \$40 [1] = \$5 ; \$40 [2] = \$7 ; \$40 [3] = \$9 ; \$40 [4] = \$11 ; \$40 [5] = \$16 ; \$40 [6] = \$18 ; \$40 [7] = \$20 ; \$40 [8] = \$22 ; \$40 [9] = \$24 ; \$40 [10] = \$26 ; \$40 [11] = \$28 ; \$40 [12] = \$33 ; \$40 [13] = \$35 ; \$40 [14] = \$37 ; \$40 [15] = \$39 ; end else if (start) begin \$40 = 16'hffff; end end assign data = data_in; assign crc = \$auto$rtlil.cc:2485:Not$6 ; assign \$2 = \$1 [15]; assign \$5 = \$4 [0]; assign \$7 = \$6 [1]; assign \$9 = \$8 [2]; assign \$11 = \$10 [3]; assign \$13 = \$12 [4]; assign \$18 = \$17 [5]; assign \$20 = \$19 [6]; assign \$22 = \$21 [7]; assign \$24 = \$23 [8]; assign \$26 = \$25 [9]; assign \$28 = \$27 [10]; assign \$30 = \$29 [11]; assign \$35 = \$34 [12]; assign \$37 = \$36 [13]; assign \$39 = \$38 [14]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:339" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_4 (sync_100_clk, sync_200_rst, sync_100_rst, \start$36 , raw_data, done, no_response, crc_valid, battery_fail, timestamp_slow, timestamp_fast, unindexed, single_turn, multi_turn, rx, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$58 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire [6:0] \$17 ; wire \$18 ; wire \$19 ; wire \$2 ; wire \$20 ; wire \$21 ; wire \$22 ; wire [7:0] \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire \$3 ; wire [46:0] \$30 ; reg \$31 ; reg \$32 ; reg \$33 ; reg \$34 ; reg \$35 ; reg \$36 ; reg [5:0] \$37 ; reg [7:0] \$38 ; reg [111:0] \$39 ; wire \$4 ; reg [6:0] \$40 ; reg \$41 ; reg \$42 ; reg \$43 ; reg [2:0] \$44 ; reg \$45 ; reg \$46 ; reg \$47 ; reg \$48 ; reg \$49 ; wire \$5 ; reg [7:0] \$50 ; reg [15:0] \$51 ; reg \$52 ; reg [31:0] \$53 ; reg [15:0] \$54 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) output battery_fail; reg battery_fail = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) reg crc_match = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) reg crc_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) output crc_valid; reg crc_valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) reg [6:0] current_bit_cnt = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) output done; reg done = 1'h0; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) wire \done$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) reg falling_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:358" *) wire [7:0] flag; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) reg half_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) reg [7:0] last_8_bits = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) output [15:0] multi_turn; reg [15:0] multi_turn = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) output no_response; reg no_response = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) reg prev_rx = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) output [111:0] raw_data; reg [111:0] raw_data = 112'h0000000000000000000000000000; (* init = 112'h0000000000000000000000000000 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) wire [111:0] \raw_data$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) reg receive = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) reg rising_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) reg save = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) output [31:0] single_turn; reg [31:0] single_turn = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input \start$36 ; wire \start$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) reg timeout_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) reg [5:0] timer = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) output [15:0] timestamp_fast; reg [15:0] timestamp_fast = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) output [7:0] timestamp_slow; reg [7:0] timestamp_slow = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) output unindexed; reg unindexed = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timer <= 6'h00; else timer <= \$37 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) last_8_bits <= 8'h00; else last_8_bits <= \$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) raw_data <= 112'h0000000000000000000000000000; else raw_data <= \$39 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) current_bit_cnt <= 7'h00; else current_bit_cnt <= \$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reached <= 1'h0; else crc_reached <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) done <= 1'h0; else done <= \$42 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) no_response <= 1'h0; else no_response <= \$43 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) fsm_state <= 3'h0; else fsm_state <= \$44 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) receive <= 1'h0; else receive <= \$45 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) save <= 1'h0; else save <= \$46 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_valid <= 1'h0; else crc_valid <= \$47 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_match <= 1'h0; else crc_match <= \$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) battery_fail <= 1'h0; else battery_fail <= \$49 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_slow <= 8'h00; else timestamp_slow <= \$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_fast <= 16'h0000; else timestamp_fast <= \$51 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) unindexed <= 1'h0; else unindexed <= \$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) single_turn <= 32'd0; else single_turn <= \$53 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) multi_turn <= 16'h0000; else multi_turn <= \$54 ; assign data = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:401" *) rx; assign \$1 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; assign \$2 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$3 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$4 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$5 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$6 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:364" *) 6'h24; assign \$7 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:366" *) 6'h3d; assign \$8 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) prev_rx; assign \$9 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) rx; assign \$10 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) rx; assign \$11 = prev_rx & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) \$10 ; assign \$12 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) rising_edge; assign \$13 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) falling_edge; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$13 ; assign \$15 = timer != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) 6'h3d; assign \$16 = \$14 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$15 ; assign \$17 = timer + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:399" *) 1'h1; assign \$18 = falling_edge | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) rising_edge; assign \$19 = \$18 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) half_bit_reached; assign \$20 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:408" *) rx; assign \$21 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:410" *) rx; assign \$22 = last_8_bits[4:0] != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:411" *) 5'h1f; assign \$23 = current_bit_cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:412" *) 1'h1; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:413" *) crc_reached; assign \$25 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:414" *) 7'h5f; assign \$26 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:439" *) 7'h7e; assign \$27 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:446" *) 7'h70; assign \$28 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:456" *) 7'h7e; assign \$29 = crc == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:454" *) raw_data[111:96]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) half_bit_reached <= 1'h0; else half_bit_reached <= \$31 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timeout_bit_reached <= 1'h0; else timeout_bit_reached <= \$32 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) prev_rx <= 1'h0; else prev_rx <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) rising_edge <= 1'h0; else rising_edge <= \$33 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) falling_edge <= 1'h0; else falling_edge <= \$34 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) start <= 1'h0; else start <= \$35 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) valid <= 1'h0; else valid <= \$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:348" *) \Controller.yaskawa_encoders.receiver_4.U$1 \U$1 ( .stage1(\start$22 ), .start(\start$36 ), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:342" *) \Controller.yaskawa_encoders.receiver_4.crc16_rx crc16_rx ( .crc(crc), .data_in(data), .start(start), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .valid(valid) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$38 = last_8_bits; if (receive) begin if (\$19 ) begin \$38 = { last_8_bits[6:0], \$20 }; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$39 = raw_data; if (receive) begin if (\$19 ) begin if (save) begin casez (current_bit_cnt) 7'h00: \$39 [0] = \$21 ; 7'h01: \$39 [1] = \$21 ; 7'h02: \$39 [2] = \$21 ; 7'h03: \$39 [3] = \$21 ; 7'h04: \$39 [4] = \$21 ; 7'h05: \$39 [5] = \$21 ; 7'h06: \$39 [6] = \$21 ; 7'h07: \$39 [7] = \$21 ; 7'h08: \$39 [8] = \$21 ; 7'h09: \$39 [9] = \$21 ; 7'h0a: \$39 [10] = \$21 ; 7'h0b: \$39 [11] = \$21 ; 7'h0c: \$39 [12] = \$21 ; 7'h0d: \$39 [13] = \$21 ; 7'h0e: \$39 [14] = \$21 ; 7'h0f: \$39 [15] = \$21 ; 7'h10: \$39 [16] = \$21 ; 7'h11: \$39 [17] = \$21 ; 7'h12: \$39 [18] = \$21 ; 7'h13: \$39 [19] = \$21 ; 7'h14: \$39 [20] = \$21 ; 7'h15: \$39 [21] = \$21 ; 7'h16: \$39 [22] = \$21 ; 7'h17: \$39 [23] = \$21 ; 7'h18: \$39 [24] = \$21 ; 7'h19: \$39 [25] = \$21 ; 7'h1a: \$39 [26] = \$21 ; 7'h1b: \$39 [27] = \$21 ; 7'h1c: \$39 [28] = \$21 ; 7'h1d: \$39 [29] = \$21 ; 7'h1e: \$39 [30] = \$21 ; 7'h1f: \$39 [31] = \$21 ; 7'h20: \$39 [32] = \$21 ; 7'h21: \$39 [33] = \$21 ; 7'h22: \$39 [34] = \$21 ; 7'h23: \$39 [35] = \$21 ; 7'h24: \$39 [36] = \$21 ; 7'h25: \$39 [37] = \$21 ; 7'h26: \$39 [38] = \$21 ; 7'h27: \$39 [39] = \$21 ; 7'h28: \$39 [40] = \$21 ; 7'h29: \$39 [41] = \$21 ; 7'h2a: \$39 [42] = \$21 ; 7'h2b: \$39 [43] = \$21 ; 7'h2c: \$39 [44] = \$21 ; 7'h2d: \$39 [45] = \$21 ; 7'h2e: \$39 [46] = \$21 ; 7'h2f: \$39 [47] = \$21 ; 7'h30: \$39 [48] = \$21 ; 7'h31: \$39 [49] = \$21 ; 7'h32: \$39 [50] = \$21 ; 7'h33: \$39 [51] = \$21 ; 7'h34: \$39 [52] = \$21 ; 7'h35: \$39 [53] = \$21 ; 7'h36: \$39 [54] = \$21 ; 7'h37: \$39 [55] = \$21 ; 7'h38: \$39 [56] = \$21 ; 7'h39: \$39 [57] = \$21 ; 7'h3a: \$39 [58] = \$21 ; 7'h3b: \$39 [59] = \$21 ; 7'h3c: \$39 [60] = \$21 ; 7'h3d: \$39 [61] = \$21 ; 7'h3e: \$39 [62] = \$21 ; 7'h3f: \$39 [63] = \$21 ; 7'h40: \$39 [64] = \$21 ; 7'h41: \$39 [65] = \$21 ; 7'h42: \$39 [66] = \$21 ; 7'h43: \$39 [67] = \$21 ; 7'h44: \$39 [68] = \$21 ; 7'h45: \$39 [69] = \$21 ; 7'h46: \$39 [70] = \$21 ; 7'h47: \$39 [71] = \$21 ; 7'h48: \$39 [72] = \$21 ; 7'h49: \$39 [73] = \$21 ; 7'h4a: \$39 [74] = \$21 ; 7'h4b: \$39 [75] = \$21 ; 7'h4c: \$39 [76] = \$21 ; 7'h4d: \$39 [77] = \$21 ; 7'h4e: \$39 [78] = \$21 ; 7'h4f: \$39 [79] = \$21 ; 7'h50: \$39 [80] = \$21 ; 7'h51: \$39 [81] = \$21 ; 7'h52: \$39 [82] = \$21 ; 7'h53: \$39 [83] = \$21 ; 7'h54: \$39 [84] = \$21 ; 7'h55: \$39 [85] = \$21 ; 7'h56: \$39 [86] = \$21 ; 7'h57: \$39 [87] = \$21 ; 7'h58: \$39 [88] = \$21 ; 7'h59: \$39 [89] = \$21 ; 7'h5a: \$39 [90] = \$21 ; 7'h5b: \$39 [91] = \$21 ; 7'h5c: \$39 [92] = \$21 ; 7'h5d: \$39 [93] = \$21 ; 7'h5e: \$39 [94] = \$21 ; 7'h5f: \$39 [95] = \$21 ; 7'h60: \$39 [96] = \$21 ; 7'h61: \$39 [97] = \$21 ; 7'h62: \$39 [98] = \$21 ; 7'h63: \$39 [99] = \$21 ; 7'h64: \$39 [100] = \$21 ; 7'h65: \$39 [101] = \$21 ; 7'h66: \$39 [102] = \$21 ; 7'h67: \$39 [103] = \$21 ; 7'h68: \$39 [104] = \$21 ; 7'h69: \$39 [105] = \$21 ; 7'h6a: \$39 [106] = \$21 ; 7'h6b: \$39 [107] = \$21 ; 7'h6c: \$39 [108] = \$21 ; 7'h6d: \$39 [109] = \$21 ; 7'h6e: \$39 [110] = \$21 ; 7'h6f: \$39 [111] = \$21 ; endcase end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$39 = 112'h0000000000000000000000000000; end endcase if (crc_match) begin \$39 [111:96] = 16'h0000; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$40 = current_bit_cnt; if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$40 = \$23 [6:0]; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$40 = 7'h00; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$41 = crc_reached; if (receive) begin if (\$19 ) begin if (save) begin if (\$25 ) begin \$41 = 1'h1; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$41 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$42 = done; casez (fsm_state) 3'h0: if (\start$22 ) begin \$42 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$28 ) begin \$42 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$43 = no_response; casez (fsm_state) 3'h0: if (\start$22 ) begin \$43 = 1'h1; end 3'h1: if (rising_edge) begin \$43 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$44 = fsm_state; casez (fsm_state) 3'h0: if (\start$22 ) begin \$44 = 3'h1; end 3'h1: if (rising_edge) begin \$44 = 3'h2; end 3'h2: begin if (\$26 ) begin \$44 = 3'h3; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h3: begin if (\$27 ) begin \$44 = 3'h4; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h4: begin if (\$28 ) begin \$44 = 3'h0; end if (timeout_bit_reached) begin \$44 = 3'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$45 = receive; casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$45 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$46 = save; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: if (\$26 ) begin \$46 = 1'h1; end 3'h3: if (\$27 ) begin \$46 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$47 = crc_valid; casez (fsm_state) 3'h0: if (\start$22 ) begin \$47 = 1'h0; end endcase if (crc_match) begin \$47 = 1'h1; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$48 = crc_match; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$29 ) begin \$48 = 1'h1; end endcase if (crc_match) begin \$48 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$49 = battery_fail; if (crc_match) begin \$49 = raw_data[2]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$50 = timestamp_slow; if (crc_match) begin \$50 = raw_data[23:16]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$51 = timestamp_fast; if (crc_match) begin \$51 = raw_data[39:24]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$52 = unindexed; if (crc_match) begin \$52 = raw_data[0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$53 = single_turn; if (crc_match) begin \$53 = \$30 [31:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$54 = multi_turn; if (crc_match) begin \$54 = raw_data[91:76]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$31 = half_bit_reached; if (\$6 ) begin \$31 = 1'h1; end if (receive) begin if (\$19 ) begin \$31 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$31 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$32 = timeout_bit_reached; if (\$7 ) begin \$32 = 1'h1; end if (receive) begin if (\$19 ) begin \$32 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$32 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end (* full_case = 32'd1 *) if (\$9 ) begin \$33 = 1'h1; end else begin \$33 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end (* full_case = 32'd1 *) if (\$11 ) begin \$34 = 1'h1; end else begin \$34 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$35 = start; if (start) begin \$35 = 1'h0; end casez (fsm_state) 3'h0: if (\start$22 ) begin \$35 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$36 = valid; if (valid) begin \$36 = 1'h0; end if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$36 = \$24 ; end end end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$58 ) begin end \$37 = timer; if (\$16 ) begin \$37 = \$17 [5:0]; end if (receive) begin if (\$19 ) begin \$37 = 6'h00; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$37 = 6'h00; end endcase end assign \done$1 = done; assign \raw_data$3 = raw_data; assign flag = 8'h7e; assign \$30 = { 15'h0000, raw_data[75:60], 16'h0000 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_4.U$1 (sync_200_rst, start, stage1, sync_200_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) output stage1; reg stage1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input start; wire start; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage0 <= start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage1 <= stage0; assign \start$5 = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_4.crc16_rx (sync_200_rst, data_in, crc, start, valid, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$59 = 0; wire [15:0] \$1 ; wire [15:0] \$10 ; wire \$11 ; wire [15:0] \$12 ; wire \$13 ; wire [15:0] \$14 ; wire \$15 ; wire \$16 ; wire [15:0] \$17 ; wire \$18 ; wire [15:0] \$19 ; wire \$2 ; wire \$20 ; wire [15:0] \$21 ; wire \$22 ; wire [15:0] \$23 ; wire \$24 ; wire [15:0] \$25 ; wire \$26 ; wire [15:0] \$27 ; wire \$28 ; wire [15:0] \$29 ; wire \$3 ; wire \$30 ; wire [15:0] \$31 ; wire \$32 ; wire \$33 ; wire [15:0] \$34 ; wire \$35 ; wire [15:0] \$36 ; wire \$37 ; wire [15:0] \$38 ; wire \$39 ; wire [15:0] \$4 ; reg [15:0] \$40 ; wire \$5 ; wire [15:0] \$6 ; wire \$7 ; wire [15:0] \$8 ; wire \$9 ; wire [15:0] \$auto$rtlil.cc:2485:Not$4 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [15:0] crc; wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [15:0] crc_reg = 16'hffff; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input data_in; wire data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] } == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:354" *) 16'hf0b8; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$3 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$4 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$6 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$8 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$10 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$12 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$14 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$15 = \$13 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$14 [15]; assign \$16 = \$15 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$27 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$29 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$31 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$32 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$31 [15]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$34 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$36 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$38 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reg <= 16'hffff; else crc_reg <= \$40 ; assign \$auto$rtlil.cc:2485:Not$4 = ~ { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] }; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$59 ) begin end \$40 = crc_reg; if (valid) begin \$40 [0] = \$3 ; \$40 [1] = \$5 ; \$40 [2] = \$7 ; \$40 [3] = \$9 ; \$40 [4] = \$11 ; \$40 [5] = \$16 ; \$40 [6] = \$18 ; \$40 [7] = \$20 ; \$40 [8] = \$22 ; \$40 [9] = \$24 ; \$40 [10] = \$26 ; \$40 [11] = \$28 ; \$40 [12] = \$33 ; \$40 [13] = \$35 ; \$40 [14] = \$37 ; \$40 [15] = \$39 ; end else if (start) begin \$40 = 16'hffff; end end assign data = data_in; assign crc = \$auto$rtlil.cc:2485:Not$4 ; assign \$2 = \$1 [15]; assign \$5 = \$4 [0]; assign \$7 = \$6 [1]; assign \$9 = \$8 [2]; assign \$11 = \$10 [3]; assign \$13 = \$12 [4]; assign \$18 = \$17 [5]; assign \$20 = \$19 [6]; assign \$22 = \$21 [7]; assign \$24 = \$23 [8]; assign \$26 = \$25 [9]; assign \$28 = \$27 [10]; assign \$30 = \$29 [11]; assign \$35 = \$34 [12]; assign \$37 = \$36 [13]; assign \$39 = \$38 [14]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:339" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_5 (sync_100_clk, sync_200_rst, sync_100_rst, \start$36 , raw_data, done, no_response, crc_valid, battery_fail, timestamp_slow, timestamp_fast, unindexed, single_turn, multi_turn, rx, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$60 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire [6:0] \$17 ; wire \$18 ; wire \$19 ; wire \$2 ; wire \$20 ; wire \$21 ; wire \$22 ; wire [7:0] \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; wire \$29 ; wire \$3 ; wire [46:0] \$30 ; reg \$31 ; reg \$32 ; reg \$33 ; reg \$34 ; reg \$35 ; reg \$36 ; reg [5:0] \$37 ; reg [7:0] \$38 ; reg [111:0] \$39 ; wire \$4 ; reg [6:0] \$40 ; reg \$41 ; reg \$42 ; reg \$43 ; reg [2:0] \$44 ; reg \$45 ; reg \$46 ; reg \$47 ; reg \$48 ; reg \$49 ; wire \$5 ; reg [7:0] \$50 ; reg [15:0] \$51 ; reg \$52 ; reg [31:0] \$53 ; reg [15:0] \$54 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) output battery_fail; reg battery_fail = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) reg crc_match = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) reg crc_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) output crc_valid; reg crc_valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) reg [6:0] current_bit_cnt = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) output done; reg done = 1'h0; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) wire \done$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) reg falling_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:358" *) wire [7:0] flag; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [2:0] fsm_state = 3'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) reg half_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) reg [7:0] last_8_bits = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) output [15:0] multi_turn; reg [15:0] multi_turn = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) output no_response; reg no_response = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) reg prev_rx = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) output [111:0] raw_data; reg [111:0] raw_data = 112'h0000000000000000000000000000; (* init = 112'h0000000000000000000000000000 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) wire [111:0] \raw_data$3 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) reg receive = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) reg rising_edge = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:324" *) input rx; wire rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) reg save = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) output [31:0] single_turn; reg [31:0] single_turn = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) reg start = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input \start$36 ; wire \start$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) reg timeout_bit_reached = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) reg [5:0] timer = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) output [15:0] timestamp_fast; reg [15:0] timestamp_fast = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) output [7:0] timestamp_slow; reg [7:0] timestamp_slow = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) output unindexed; reg unindexed = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) reg valid = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:360" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timer <= 6'h00; else timer <= \$37 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:371" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) last_8_bits <= 8'h00; else last_8_bits <= \$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:350" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) raw_data <= 112'h0000000000000000000000000000; else raw_data <= \$39 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:370" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) current_bit_cnt <= 7'h00; else current_bit_cnt <= \$40 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:374" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reached <= 1'h0; else crc_reached <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:344" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) done <= 1'h0; else done <= \$42 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:327" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) no_response <= 1'h0; else no_response <= \$43 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) fsm_state <= 3'h0; else fsm_state <= \$44 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:372" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) receive <= 1'h0; else receive <= \$45 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:373" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) save <= 1'h0; else save <= \$46 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:329" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_valid <= 1'h0; else crc_valid <= \$47 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:375" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) crc_match <= 1'h0; else crc_match <= \$48 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:332" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) battery_fail <= 1'h0; else battery_fail <= \$49 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:333" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_slow <= 8'h00; else timestamp_slow <= \$50 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:334" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) timestamp_fast <= 16'h0000; else timestamp_fast <= \$51 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:335" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) unindexed <= 1'h0; else unindexed <= \$52 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:330" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) single_turn <= 32'd0; else single_turn <= \$53 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:331" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) multi_turn <= 16'h0000; else multi_turn <= \$54 ; assign data = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:401" *) rx; assign \$1 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; assign \$2 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$3 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$4 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h3; assign \$5 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 3'h4; assign \$6 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:364" *) 6'h24; assign \$7 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:366" *) 6'h3d; assign \$8 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) prev_rx; assign \$9 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:383" *) rx; assign \$10 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) rx; assign \$11 = prev_rx & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:387" *) \$10 ; assign \$12 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) rising_edge; assign \$13 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) falling_edge; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$13 ; assign \$15 = timer != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) 6'h3d; assign \$16 = \$14 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:398" *) \$15 ; assign \$17 = timer + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:399" *) 1'h1; assign \$18 = falling_edge | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) rising_edge; assign \$19 = \$18 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:404" *) half_bit_reached; assign \$20 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:408" *) rx; assign \$21 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:410" *) rx; assign \$22 = last_8_bits[4:0] != (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:411" *) 5'h1f; assign \$23 = current_bit_cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:412" *) 1'h1; assign \$24 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:413" *) crc_reached; assign \$25 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:414" *) 7'h5f; assign \$26 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:439" *) 7'h7e; assign \$27 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:446" *) 7'h70; assign \$28 = last_8_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:456" *) 7'h7e; assign \$29 = crc == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:454" *) raw_data[111:96]; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:361" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) half_bit_reached <= 1'h0; else half_bit_reached <= \$31 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:362" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timeout_bit_reached <= 1'h0; else timeout_bit_reached <= \$32 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:379" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) prev_rx <= 1'h0; else prev_rx <= rx; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:378" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) rising_edge <= 1'h0; else rising_edge <= \$33 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:377" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) falling_edge <= 1'h0; else falling_edge <= \$34 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) start <= 1'h0; else start <= \$35 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) valid <= 1'h0; else valid <= \$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:348" *) \Controller.yaskawa_encoders.receiver_5.U$1 \U$1 ( .stage1(\start$22 ), .start(\start$36 ), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:342" *) \Controller.yaskawa_encoders.receiver_5.crc16_rx crc16_rx ( .crc(crc), .data_in(data), .start(start), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .valid(valid) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$38 = last_8_bits; if (receive) begin if (\$19 ) begin \$38 = { last_8_bits[6:0], \$20 }; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$39 = raw_data; if (receive) begin if (\$19 ) begin if (save) begin casez (current_bit_cnt) 7'h00: \$39 [0] = \$21 ; 7'h01: \$39 [1] = \$21 ; 7'h02: \$39 [2] = \$21 ; 7'h03: \$39 [3] = \$21 ; 7'h04: \$39 [4] = \$21 ; 7'h05: \$39 [5] = \$21 ; 7'h06: \$39 [6] = \$21 ; 7'h07: \$39 [7] = \$21 ; 7'h08: \$39 [8] = \$21 ; 7'h09: \$39 [9] = \$21 ; 7'h0a: \$39 [10] = \$21 ; 7'h0b: \$39 [11] = \$21 ; 7'h0c: \$39 [12] = \$21 ; 7'h0d: \$39 [13] = \$21 ; 7'h0e: \$39 [14] = \$21 ; 7'h0f: \$39 [15] = \$21 ; 7'h10: \$39 [16] = \$21 ; 7'h11: \$39 [17] = \$21 ; 7'h12: \$39 [18] = \$21 ; 7'h13: \$39 [19] = \$21 ; 7'h14: \$39 [20] = \$21 ; 7'h15: \$39 [21] = \$21 ; 7'h16: \$39 [22] = \$21 ; 7'h17: \$39 [23] = \$21 ; 7'h18: \$39 [24] = \$21 ; 7'h19: \$39 [25] = \$21 ; 7'h1a: \$39 [26] = \$21 ; 7'h1b: \$39 [27] = \$21 ; 7'h1c: \$39 [28] = \$21 ; 7'h1d: \$39 [29] = \$21 ; 7'h1e: \$39 [30] = \$21 ; 7'h1f: \$39 [31] = \$21 ; 7'h20: \$39 [32] = \$21 ; 7'h21: \$39 [33] = \$21 ; 7'h22: \$39 [34] = \$21 ; 7'h23: \$39 [35] = \$21 ; 7'h24: \$39 [36] = \$21 ; 7'h25: \$39 [37] = \$21 ; 7'h26: \$39 [38] = \$21 ; 7'h27: \$39 [39] = \$21 ; 7'h28: \$39 [40] = \$21 ; 7'h29: \$39 [41] = \$21 ; 7'h2a: \$39 [42] = \$21 ; 7'h2b: \$39 [43] = \$21 ; 7'h2c: \$39 [44] = \$21 ; 7'h2d: \$39 [45] = \$21 ; 7'h2e: \$39 [46] = \$21 ; 7'h2f: \$39 [47] = \$21 ; 7'h30: \$39 [48] = \$21 ; 7'h31: \$39 [49] = \$21 ; 7'h32: \$39 [50] = \$21 ; 7'h33: \$39 [51] = \$21 ; 7'h34: \$39 [52] = \$21 ; 7'h35: \$39 [53] = \$21 ; 7'h36: \$39 [54] = \$21 ; 7'h37: \$39 [55] = \$21 ; 7'h38: \$39 [56] = \$21 ; 7'h39: \$39 [57] = \$21 ; 7'h3a: \$39 [58] = \$21 ; 7'h3b: \$39 [59] = \$21 ; 7'h3c: \$39 [60] = \$21 ; 7'h3d: \$39 [61] = \$21 ; 7'h3e: \$39 [62] = \$21 ; 7'h3f: \$39 [63] = \$21 ; 7'h40: \$39 [64] = \$21 ; 7'h41: \$39 [65] = \$21 ; 7'h42: \$39 [66] = \$21 ; 7'h43: \$39 [67] = \$21 ; 7'h44: \$39 [68] = \$21 ; 7'h45: \$39 [69] = \$21 ; 7'h46: \$39 [70] = \$21 ; 7'h47: \$39 [71] = \$21 ; 7'h48: \$39 [72] = \$21 ; 7'h49: \$39 [73] = \$21 ; 7'h4a: \$39 [74] = \$21 ; 7'h4b: \$39 [75] = \$21 ; 7'h4c: \$39 [76] = \$21 ; 7'h4d: \$39 [77] = \$21 ; 7'h4e: \$39 [78] = \$21 ; 7'h4f: \$39 [79] = \$21 ; 7'h50: \$39 [80] = \$21 ; 7'h51: \$39 [81] = \$21 ; 7'h52: \$39 [82] = \$21 ; 7'h53: \$39 [83] = \$21 ; 7'h54: \$39 [84] = \$21 ; 7'h55: \$39 [85] = \$21 ; 7'h56: \$39 [86] = \$21 ; 7'h57: \$39 [87] = \$21 ; 7'h58: \$39 [88] = \$21 ; 7'h59: \$39 [89] = \$21 ; 7'h5a: \$39 [90] = \$21 ; 7'h5b: \$39 [91] = \$21 ; 7'h5c: \$39 [92] = \$21 ; 7'h5d: \$39 [93] = \$21 ; 7'h5e: \$39 [94] = \$21 ; 7'h5f: \$39 [95] = \$21 ; 7'h60: \$39 [96] = \$21 ; 7'h61: \$39 [97] = \$21 ; 7'h62: \$39 [98] = \$21 ; 7'h63: \$39 [99] = \$21 ; 7'h64: \$39 [100] = \$21 ; 7'h65: \$39 [101] = \$21 ; 7'h66: \$39 [102] = \$21 ; 7'h67: \$39 [103] = \$21 ; 7'h68: \$39 [104] = \$21 ; 7'h69: \$39 [105] = \$21 ; 7'h6a: \$39 [106] = \$21 ; 7'h6b: \$39 [107] = \$21 ; 7'h6c: \$39 [108] = \$21 ; 7'h6d: \$39 [109] = \$21 ; 7'h6e: \$39 [110] = \$21 ; 7'h6f: \$39 [111] = \$21 ; endcase end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$39 = 112'h0000000000000000000000000000; end endcase if (crc_match) begin \$39 [111:96] = 16'h0000; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$40 = current_bit_cnt; if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$40 = \$23 [6:0]; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$40 = 7'h00; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$41 = crc_reached; if (receive) begin if (\$19 ) begin if (save) begin if (\$25 ) begin \$41 = 1'h1; end end end end casez (fsm_state) 3'h0: if (\start$22 ) begin \$41 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$42 = done; casez (fsm_state) 3'h0: if (\start$22 ) begin \$42 = 1'h0; end 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$28 ) begin \$42 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$43 = no_response; casez (fsm_state) 3'h0: if (\start$22 ) begin \$43 = 1'h1; end 3'h1: if (rising_edge) begin \$43 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$44 = fsm_state; casez (fsm_state) 3'h0: if (\start$22 ) begin \$44 = 3'h1; end 3'h1: if (rising_edge) begin \$44 = 3'h2; end 3'h2: begin if (\$26 ) begin \$44 = 3'h3; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h3: begin if (\$27 ) begin \$44 = 3'h4; end if (timeout_bit_reached) begin \$44 = 3'h0; end end 3'h4: begin if (\$28 ) begin \$44 = 3'h0; end if (timeout_bit_reached) begin \$44 = 3'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$45 = receive; casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$45 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$46 = save; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: if (\$26 ) begin \$46 = 1'h1; end 3'h3: if (\$27 ) begin \$46 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$47 = crc_valid; casez (fsm_state) 3'h0: if (\start$22 ) begin \$47 = 1'h0; end endcase if (crc_match) begin \$47 = 1'h1; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$48 = crc_match; casez (fsm_state) 3'h0: /* empty */; 3'h1: /* empty */; 3'h2: /* empty */; 3'h3: /* empty */; 3'h4: if (\$29 ) begin \$48 = 1'h1; end endcase if (crc_match) begin \$48 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$49 = battery_fail; if (crc_match) begin \$49 = raw_data[2]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$50 = timestamp_slow; if (crc_match) begin \$50 = raw_data[23:16]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$51 = timestamp_fast; if (crc_match) begin \$51 = raw_data[39:24]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$52 = unindexed; if (crc_match) begin \$52 = raw_data[0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$53 = single_turn; if (crc_match) begin \$53 = \$30 [31:0]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$54 = multi_turn; if (crc_match) begin \$54 = raw_data[91:76]; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$31 = half_bit_reached; if (\$6 ) begin \$31 = 1'h1; end if (receive) begin if (\$19 ) begin \$31 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$31 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$32 = timeout_bit_reached; if (\$7 ) begin \$32 = 1'h1; end if (receive) begin if (\$19 ) begin \$32 = 1'h0; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$32 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end (* full_case = 32'd1 *) if (\$9 ) begin \$33 = 1'h1; end else begin \$33 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end (* full_case = 32'd1 *) if (\$11 ) begin \$34 = 1'h1; end else begin \$34 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$35 = start; if (start) begin \$35 = 1'h0; end casez (fsm_state) 3'h0: if (\start$22 ) begin \$35 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$36 = valid; if (valid) begin \$36 = 1'h0; end if (receive) begin if (\$19 ) begin if (save) begin if (\$22 ) begin \$36 = \$24 ; end end end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$60 ) begin end \$37 = timer; if (\$16 ) begin \$37 = \$17 [5:0]; end if (receive) begin if (\$19 ) begin \$37 = 6'h00; end end casez (fsm_state) 3'h0: /* empty */; 3'h1: if (rising_edge) begin \$37 = 6'h00; end endcase end assign \done$1 = done; assign \raw_data$3 = raw_data; assign flag = 8'h7e; assign \$30 = { 15'h0000, raw_data[75:60], 16'h0000 }; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_5.U$1 (sync_200_rst, start, stage1, sync_200_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) output stage1; reg stage1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:325" *) input start; wire start; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:347" *) wire \start$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage0 <= start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage1 <= stage0; assign \start$5 = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:320" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.receiver_5.crc16_rx (sync_200_rst, data_in, crc, start, valid, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$61 = 0; wire [15:0] \$1 ; wire [15:0] \$10 ; wire \$11 ; wire [15:0] \$12 ; wire \$13 ; wire [15:0] \$14 ; wire \$15 ; wire \$16 ; wire [15:0] \$17 ; wire \$18 ; wire [15:0] \$19 ; wire \$2 ; wire \$20 ; wire [15:0] \$21 ; wire \$22 ; wire [15:0] \$23 ; wire \$24 ; wire [15:0] \$25 ; wire \$26 ; wire [15:0] \$27 ; wire \$28 ; wire [15:0] \$29 ; wire \$3 ; wire \$30 ; wire [15:0] \$31 ; wire \$32 ; wire \$33 ; wire [15:0] \$34 ; wire \$35 ; wire [15:0] \$36 ; wire \$37 ; wire [15:0] \$38 ; wire \$39 ; wire [15:0] \$4 ; reg [15:0] \$40 ; wire \$5 ; wire [15:0] \$6 ; wire \$7 ; wire [15:0] \$8 ; wire \$9 ; wire [15:0] \$auto$rtlil.cc:2485:Not$2 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:316" *) output [15:0] crc; wire [15:0] crc; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) reg [15:0] crc_reg = 16'hffff; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) wire data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:314" *) input data_in; wire data_in; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:317" *) wire match_detected; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:313" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:315" *) input valid; wire valid; assign match_detected = { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] } == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:354" *) 16'hf0b8; assign \$1 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$3 = \$2 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$4 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$6 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$8 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$10 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$12 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$14 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$15 = \$13 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$14 [15]; assign \$16 = \$15 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$17 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$19 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$21 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$23 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$25 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$27 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$29 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$31 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$32 = \$30 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:344" *) \$31 [15]; assign \$33 = \$32 ^ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:347" *) data_in; assign \$34 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$36 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; assign \$38 = start ? (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:338" *) 16'hffff : crc_reg; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\crc\\__init__.py:322" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) crc_reg <= 16'hffff; else crc_reg <= \$40 ; assign \$auto$rtlil.cc:2485:Not$2 = ~ { crc_reg[0], crc_reg[1], crc_reg[2], crc_reg[3], crc_reg[4], crc_reg[5], crc_reg[6], crc_reg[7], crc_reg[8], crc_reg[9], crc_reg[10], crc_reg[11], crc_reg[12], crc_reg[13], crc_reg[14], crc_reg[15] }; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$61 ) begin end \$40 = crc_reg; if (valid) begin \$40 [0] = \$3 ; \$40 [1] = \$5 ; \$40 [2] = \$7 ; \$40 [3] = \$9 ; \$40 [4] = \$11 ; \$40 [5] = \$16 ; \$40 [6] = \$18 ; \$40 [7] = \$20 ; \$40 [8] = \$22 ; \$40 [9] = \$24 ; \$40 [10] = \$26 ; \$40 [11] = \$28 ; \$40 [12] = \$33 ; \$40 [13] = \$35 ; \$40 [14] = \$37 ; \$40 [15] = \$39 ; end else if (start) begin \$40 = 16'hffff; end end assign data = data_in; assign crc = \$auto$rtlil.cc:2485:Not$2 ; assign \$2 = \$1 [15]; assign \$5 = \$4 [0]; assign \$7 = \$6 [1]; assign \$9 = \$8 [2]; assign \$11 = \$10 [3]; assign \$13 = \$12 [4]; assign \$18 = \$17 [5]; assign \$20 = \$19 [6]; assign \$22 = \$21 [7]; assign \$24 = \$23 [8]; assign \$26 = \$25 [9]; assign \$28 = \$27 [10]; assign \$30 = \$29 [11]; assign \$35 = \$34 [12]; assign \$37 = \$36 [13]; assign \$39 = \$38 [14]; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:207" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.request_packet (sync_200_rst, \trigger$24 , \request_packet_data$23 , tx, tx_enable, done, sync_200_clk); reg \$auto$verilog_backend.cc:2352:dump_module$62 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; wire \$15 ; wire \$16 ; wire [6:0] \$17 ; wire \$18 ; wire \$19 ; wire \$2 ; wire \$20 ; wire \$21 ; wire [5:0] \$22 ; wire \$23 ; wire \$24 ; wire \$25 ; wire \$26 ; wire \$27 ; wire \$28 ; reg \$29 ; wire \$3 ; reg [5:0] \$30 ; reg [4:0] \$31 ; reg \$32 ; reg \$33 ; reg \$34 ; reg \$35 ; reg [4:0] \$36 ; reg \$37 ; reg \$38 ; reg \$39 ; wire \$4 ; reg \$40 ; reg [1:0] \$41 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:264" *) reg clk_falling = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:267" *) reg clk_reset = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:265" *) reg clk_rising = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:230" *) reg clock = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:238" *) reg current_bit = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:237" *) reg [5:0] current_bit_cnt = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:232" *) wire [47:0] data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:217" *) output done; reg done = 1'h0; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:217" *) wire \done$1 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:226" *) wire [7:0] flag; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg [1:0] fsm_state = 2'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:246" *) reg increment_bit = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:239" *) reg [4:0] last_5_bits = 5'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:225" *) wire [15:0] preemble; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:209" *) wire [15:0] request_packet_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:199" *) input [15:0] \request_packet_data$23 ; wire [15:0] \request_packet_data$23 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:245" *) reg stuff_bit; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:228" *) reg [4:0] timer = 5'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:213" *) wire trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:200" *) input \trigger$24 ; wire \trigger$24 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:201" *) output tx; reg tx = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:202" *) output tx_enable; reg tx_enable = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:241" *) wire tx_inverted; assign tx_inverted = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:242" *) tx; assign \$1 = current_bit_cnt > (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:248" *) 5'h18; assign \$2 = current_bit_cnt < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:248" *) 6'h28; assign \$3 = \$1 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:248" *) \$2 ; assign \$4 = last_5_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:248" *) 5'h1f; assign \$5 = \$3 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:248" *) \$4 ; assign \$6 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; assign \$7 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 1'h1; assign \$8 = fsm_state == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) 2'h2; assign \$9 = current_bit_cnt > (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:248" *) 5'h18; assign \$10 = current_bit_cnt < (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:248" *) 6'h28; assign \$11 = \$9 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:248" *) \$10 ; assign \$12 = last_5_bits == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:248" *) 5'h1f; assign \$13 = \$11 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:248" *) \$12 ; assign \$14 = { 7'h7e, request_packet_data, 24'h7e5555 } >> current_bit_cnt; assign \$15 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:256" *) stuff_bit; assign \$16 = { 7'h7e, request_packet_data, 24'h7e5555 } >> current_bit_cnt; assign \$17 = current_bit_cnt + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:258" *) 1'h1; assign \$18 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:269" *) clk_reset; assign \$19 = timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:270" *) 5'h18; assign \$20 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:271" *) clock; assign \$21 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:273" *) clock; assign \$22 = timer + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:276" *) 1'h1; assign \$23 = clk_falling | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:306" *) clk_rising; assign \$24 = current_bit | (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:307" *) clock; assign \$25 = current_bit & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:307" *) clock; assign \$26 = ~ (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:307" *) \$25 ; assign \$27 = \$24 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:307" *) \$26 ; assign \$28 = current_bit_cnt == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:309" *) 6'h30; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:238" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) current_bit <= 1'h0; else current_bit <= \$29 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:237" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) current_bit_cnt <= 6'h00; else current_bit_cnt <= \$30 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:239" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) last_5_bits <= 5'h00; else last_5_bits <= \$31 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:246" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) increment_bit <= 1'h0; else increment_bit <= \$32 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:230" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) clock <= 1'h0; else clock <= \$33 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:264" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) clk_falling <= 1'h0; else clk_falling <= \$34 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:265" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) clk_rising <= 1'h0; else clk_rising <= \$35 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:228" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) timer <= 5'h00; else timer <= \$36 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:267" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) clk_reset <= 1'h0; else clk_reset <= \$37 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:201" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) tx <= 1'h0; else tx <= \$38 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:202" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) tx_enable <= 1'h0; else tx_enable <= \$39 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:217" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) done <= 1'h0; else done <= \$40 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_200_clk, posedge sync_200_rst) if (sync_200_rst) fsm_state <= 2'h0; else fsm_state <= \$41 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:211" *) \Controller.yaskawa_encoders.request_packet.U$0 \U$0 ( .request_packet_data(\request_packet_data$23 ), .stage1(request_packet_data), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst) ); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:215" *) \Controller.yaskawa_encoders.request_packet.U$1 \U$1 ( .stage3(trigger), .sync_200_clk(sync_200_clk), .sync_200_rst(sync_200_rst), .trigger(\trigger$24 ) ); always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end (* full_case = 32'd1 *) if (\$5 ) begin stuff_bit = 1'h1; end else begin stuff_bit = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end (* full_case = 32'd1 *) if (\$13 ) begin \$29 = 1'h0; end else begin \$29 = \$14 ; end if (increment_bit) begin if (\$15 ) begin \$29 = \$16 ; end end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end \$30 = current_bit_cnt; if (increment_bit) begin if (\$15 ) begin \$30 = \$17 [5:0]; end end casez (fsm_state) 2'h0: \$30 = 6'h00; endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end \$31 = last_5_bits; if (increment_bit) begin \$31 = { current_bit, last_5_bits[4:1] }; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end \$32 = increment_bit; if (increment_bit) begin \$32 = 1'h0; end casez (fsm_state) 2'h0: /* empty */; 2'h1: if (clk_rising) begin \$32 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end \$33 = clock; (* full_case = 32'd1 *) if (\$18 ) begin if (\$19 ) begin \$33 = \$20 ; end end else begin \$33 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end (* full_case = 32'd1 *) if (\$18 ) begin (* full_case = 32'd1 *) if (\$19 ) begin \$34 = clock; end else begin \$34 = 1'h0; end end else begin \$34 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end (* full_case = 32'd1 *) if (\$18 ) begin (* full_case = 32'd1 *) if (\$19 ) begin \$35 = \$21 ; end else begin \$35 = 1'h0; end end else begin \$35 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end (* full_case = 32'd1 *) if (\$18 ) begin (* full_case = 32'd1 *) if (\$19 ) begin \$36 = 5'h00; end else begin \$36 = \$22 [4:0]; end end else begin \$36 = 5'h00; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end \$37 = clk_reset; (* full_case = 32'd1 *) if (\$18 ) begin end else begin \$37 = 1'h0; end casez (fsm_state) 2'h0: if (trigger) begin \$37 = 1'h1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end \$38 = tx; casez (fsm_state) 2'h0: \$38 = 1'h0; 2'h1: if (\$23 ) begin \$38 = \$27 ; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end \$39 = tx_enable; casez (fsm_state) 2'h0: \$39 = 1'h0; 2'h1: if (clk_falling) begin \$39 = 1'h1; end 2'h2: if (clk_falling) begin \$39 = 1'h0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end \$40 = done; casez (fsm_state) 2'h0: begin \$40 = 1'h1; if (trigger) begin \$40 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$62 ) begin end \$41 = fsm_state; casez (fsm_state) 2'h0: if (trigger) begin \$41 = 2'h1; end 2'h1: if (\$28 ) begin \$41 = 2'h2; end 2'h2: if (clk_falling) begin \$41 = 2'h0; end endcase end assign \done$1 = done; assign data = { 8'h7e, request_packet_data, 24'h7e5555 }; assign preemble = 16'h5555; assign flag = 8'h7e; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.request_packet.U$0 (sync_200_rst, request_packet_data, stage1, sync_200_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:199" *) input [15:0] request_packet_data; wire [15:0] request_packet_data; (* init = 16'h0000 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:209" *) wire [15:0] \request_packet_data$5 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg [15:0] stage0 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:209" *) output [15:0] stage1; reg [15:0] stage1 = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage0 <= request_packet_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage1 <= stage0; assign \request_packet_data$5 = stage1; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:101" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.request_packet.U$1 (sync_200_rst, trigger, stage3, sync_200_clk); (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage0 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage1 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) reg stage2 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:213" *) output stage3; reg stage3 = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_clk; wire sync_200_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:266" *) input sync_200_rst; wire sync_200_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:200" *) input trigger; wire trigger; (* init = 1'h0 *) (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:213" *) wire \trigger$7 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage0 <= trigger; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage1 <= stage0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage2 <= stage1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\lib\\cdc.py:102" *) always @(posedge sync_200_clk) stage3 <= stage2; assign \trigger$7 = stage3; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:506" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders.spi_send_debug (sync_100_rst, raw_data_0, raw_data_1, raw_data_2, raw_data_3, raw_data_4, raw_data_5, start, data_enable, data, clk, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$63 = 0; wire \$1 ; wire [7:0] \$10 ; wire \$11 ; wire [7:0] \$12 ; wire \$13 ; wire [7:0] \$14 ; wire \$15 ; wire \$16 ; wire [8:0] \$17 ; wire \$18 ; wire \$19 ; wire \$2 ; reg [6:0] \$20 ; reg [7:0] \$21 ; reg \$22 ; reg \$23 ; reg [111:0] \$24 ; reg [111:0] \$25 ; reg [111:0] \$26 ; reg [111:0] \$27 ; reg [111:0] \$28 ; reg [111:0] \$29 ; wire \$3 ; reg \$30 ; reg [5:0] \$31 ; reg \$32 ; wire [7:0] \$4 ; wire \$5 ; wire [7:0] \$6 ; wire \$7 ; wire [7:0] \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) reg [111:0] \$signal = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) reg [111:0] \$signal$10 = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) reg [111:0] \$signal$12 = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) reg [111:0] \$signal$14 = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) reg [111:0] \$signal$16 = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) reg [111:0] \$signal$18 = 112'h0000000000000000000000000000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:509" *) reg [6:0] bit_count = 7'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:510" *) reg [7:0] bit_timer = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:496" *) output clk; reg clk = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:497" *) output [5:0] data; reg [5:0] data = 6'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:498" *) output data_enable; reg data_enable = 1'h1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:495" *) reg done = 1'h0; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) reg fsm_state = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) input [111:0] raw_data_0; wire [111:0] raw_data_0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) input [111:0] raw_data_1; wire [111:0] raw_data_1; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) input [111:0] raw_data_2; wire [111:0] raw_data_2; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) input [111:0] raw_data_3; wire [111:0] raw_data_3; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) input [111:0] raw_data_4; wire [111:0] raw_data_4; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:501" *) input [111:0] raw_data_5; wire [111:0] raw_data_5; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:494" *) input start; wire start; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; assign \$1 = bit_timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:530" *) 2'h2; assign \$2 = bit_count == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:531" *) 7'h70; assign \$3 = \$signal >> bit_count; assign \$4 = bit_count + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:538" *) 1'h1; assign \$5 = \$signal$10 >> bit_count; assign \$6 = bit_count + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:538" *) 1'h1; assign \$7 = \$signal$12 >> bit_count; assign \$8 = bit_count + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:538" *) 1'h1; assign \$9 = \$signal$14 >> bit_count; assign \$10 = bit_count + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:538" *) 1'h1; assign \$11 = \$signal$16 >> bit_count; assign \$12 = bit_count + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:538" *) 1'h1; assign \$13 = \$signal$18 >> bit_count; assign \$14 = bit_count + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:538" *) 1'h1; assign \$15 = bit_timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:540" *) 3'h4; assign \$16 = bit_timer == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:543" *) 4'h8; assign \$17 = bit_timer + (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:547" *) 1'h1; assign \$18 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\venv\\lib\\site-packages\\amaranth\\hdl\\_dsl.py:490" *) fsm_state; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:509" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bit_count <= 7'h00; else bit_count <= \$20 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:510" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) bit_timer <= 8'h00; else bit_timer <= \$21 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:495" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) done <= 1'h0; else done <= \$22 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:498" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_enable <= 1'h1; else data_enable <= \$23 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \$signal <= 112'h0000000000000000000000000000; else \$signal <= \$24 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \$signal$10 <= 112'h0000000000000000000000000000; else \$signal$10 <= \$25 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \$signal$12 <= 112'h0000000000000000000000000000; else \$signal$12 <= \$26 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \$signal$14 <= 112'h0000000000000000000000000000; else \$signal$14 <= \$27 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \$signal$16 <= 112'h0000000000000000000000000000; else \$signal$16 <= \$28 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:515" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) \$signal$18 <= 112'h0000000000000000000000000000; else \$signal$18 <= \$29 ; (* src = "C:\\Program Files\\WindowsApps\\PythonSoftwareFoundation.Python.3.10_3.10.3056.0_x64__qbz5n2kfra8p0\\lib\\contextlib.py:142" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) fsm_state <= 1'h0; else fsm_state <= \$30 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:497" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data <= 6'h00; else data <= \$31 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\yaskawa_encoders.py:496" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) clk <= 1'h0; else clk <= \$32 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$20 = bit_count; (* full_case = 32'd1 *) casez (fsm_state) 1'h0: if (start) begin \$20 = 7'h00; end 1'h1: if (\$1 ) begin (* full_case = 32'd1 *) if (\$2 ) begin end else begin \$20 = \$14 [6:0]; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$21 = bit_timer; (* full_case = 32'd1 *) casez (fsm_state) 1'h0: if (start) begin \$21 = 8'h00; end 1'h1: (* full_case = 32'd1 *) if (\$16 ) begin \$21 = 8'h00; end else begin \$21 = \$17 [7:0]; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$22 = done; (* full_case = 32'd1 *) casez (fsm_state) 1'h0: if (start) begin \$22 = 1'h0; end 1'h1: if (\$1 ) begin if (\$2 ) begin \$22 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$23 = data_enable; (* full_case = 32'd1 *) casez (fsm_state) 1'h0: if (start) begin \$23 = 1'h0; end 1'h1: if (\$1 ) begin if (\$2 ) begin \$23 = 1'h1; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$24 = \$signal ; casez (fsm_state) 1'h0: if (start) begin \$24 = raw_data_0; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$25 = \$signal$10 ; casez (fsm_state) 1'h0: if (start) begin \$25 = raw_data_1; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$26 = \$signal$12 ; casez (fsm_state) 1'h0: if (start) begin \$26 = raw_data_2; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$27 = \$signal$14 ; casez (fsm_state) 1'h0: if (start) begin \$27 = raw_data_3; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$28 = \$signal$16 ; casez (fsm_state) 1'h0: if (start) begin \$28 = raw_data_4; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$29 = \$signal$18 ; casez (fsm_state) 1'h0: if (start) begin \$29 = raw_data_5; end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$30 = fsm_state; (* full_case = 32'd1 *) casez (fsm_state) 1'h0: if (start) begin \$30 = 1'h1; end 1'h1: if (\$1 ) begin if (\$2 ) begin \$30 = 1'h0; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$31 = data; (* full_case = 32'd1 *) casez (fsm_state) 1'h0: /* empty */; 1'h1: if (\$1 ) begin (* full_case = 32'd1 *) if (\$2 ) begin end else begin \$31 [0] = \$3 ; \$31 [1] = \$5 ; \$31 [2] = \$7 ; \$31 [3] = \$9 ; \$31 [4] = \$11 ; \$31 [5] = \$13 ; end end endcase end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$63 ) begin end \$32 = clk; (* full_case = 32'd1 *) casez (fsm_state) 1'h0: /* empty */; 1'h1: begin if (\$15 ) begin \$32 = 1'h1; end if (\$16 ) begin \$32 = 1'h0; end end endcase end assign \$19 = fsm_state; endmodule (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:81" *) (* generator = "Amaranth" *) module \Controller.yaskawa_encoders_shift_dma_4 (sync_100_rst, read_bram_address_input, write_bram_address_input, read_node_address_input, write_node_address_input, data_input, read_complete_input, write_complete_input, bram_read_data, write_bram_address_output, read_bram_address_output, write_node_address_output, read_node_address_output, write_complete_output, data_output, read_complete_output, bram_address, bram_write_data, bram_write_enable, sync_100_clk); reg \$auto$verilog_backend.cc:2352:dump_module$64 = 0; wire \$1 ; wire \$10 ; wire \$11 ; wire \$12 ; wire \$13 ; wire \$14 ; reg \$15 ; reg [31:0] \$16 ; reg \$17 ; reg \$18 ; wire \$2 ; wire \$3 ; wire \$4 ; wire \$5 ; wire \$6 ; wire \$7 ; wire \$8 ; wire \$9 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:71" *) output [15:0] bram_address; reg [15:0] bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:73" *) input [31:0] bram_read_data; wire [31:0] bram_read_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:72" *) output [31:0] bram_write_data; reg [31:0] bram_write_data; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:74" *) output bram_write_enable; reg bram_write_enable; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) reg [31:0] buf_data = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) reg [15:0] buf_read_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) reg buf_read_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) reg [7:0] buf_read_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) reg [15:0] buf_write_bram_address = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) reg buf_write_complete = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) reg [7:0] buf_write_node_address = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:64" *) input [31:0] data_input; wire [31:0] data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) output [31:0] data_output; reg [31:0] data_output = 32'd0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:60" *) input [15:0] read_bram_address_input; wire [15:0] read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) output [15:0] read_bram_address_output; reg [15:0] read_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:66" *) input read_complete_input; wire read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) output read_complete_output; reg read_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) reg read_next = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:56" *) input [7:0] read_node_address_input; wire [7:0] read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) output [7:0] read_node_address_output; reg [7:0] read_node_address_output = 8'h00; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_clk; wire sync_100_clk; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\controller.py:267" *) input sync_100_rst; wire sync_100_rst; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:62" *) input [15:0] write_bram_address_input; wire [15:0] write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) output [15:0] write_bram_address_output; reg [15:0] write_bram_address_output = 16'h0000; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:68" *) input write_complete_input; wire write_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) output write_complete_output; reg write_complete_output = 1'h0; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:58" *) input [7:0] write_node_address_input; wire [7:0] write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) output [7:0] write_node_address_output; reg [7:0] write_node_address_output = 8'h00; assign \$1 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 3'h4; assign \$2 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$3 = \$1 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$2 ; assign \$4 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 3'h4; assign \$5 = \$4 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$6 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$7 = \$5 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$6 ; assign \$8 = read_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) 3'h4; assign \$9 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) read_complete_input; assign \$10 = \$8 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:114" *) \$9 ; assign \$11 = write_node_address_input == (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) 3'h4; assign \$12 = \$11 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) read_complete_input; assign \$13 = ! (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) write_complete_input; assign \$14 = \$12 & (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:130" *) \$13 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:86" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_bram_address <= 16'h0000; else buf_write_bram_address <= write_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:87" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_bram_address <= 16'h0000; else buf_read_bram_address <= read_bram_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:88" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_node_address <= 8'h00; else buf_write_node_address <= write_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:89" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_node_address <= 8'h00; else buf_read_node_address <= read_node_address_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:63" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_bram_address_output <= 16'h0000; else write_bram_address_output <= buf_write_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:61" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_bram_address_output <= 16'h0000; else read_bram_address_output <= buf_read_bram_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:59" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_node_address_output <= 8'h00; else write_node_address_output <= buf_write_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:57" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_node_address_output <= 8'h00; else read_node_address_output <= buf_read_node_address; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:90" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_data <= 32'd0; else buf_data <= data_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:91" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_read_complete <= 1'h0; else buf_read_complete <= read_complete_input; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:69" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) write_complete_output <= 1'h0; else write_complete_output <= buf_write_complete; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:94" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_next <= 1'h0; else read_next <= \$15 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:65" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) data_output <= 32'd0; else data_output <= \$16 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:67" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) read_complete_output <= 1'h0; else read_complete_output <= \$17 ; (* src = "c:\\Users\\voids\\Documents\\GitHub\\controller-software\\controller-firmware\\python\\src\\shift_dma.py:92" *) always @(posedge sync_100_clk, posedge sync_100_rst) if (sync_100_rst) buf_write_complete <= 1'h0; else buf_write_complete <= \$18 ; always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$64 ) begin end \$15 = read_next; if (\$3 ) begin \$15 = 1'h1; end else if (read_next) begin \$15 = 1'h0; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$64 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$16 = bram_read_data; end else begin \$16 = buf_data; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$64 ) begin end (* full_case = 32'd1 *) if (read_next) begin \$17 = 1'h1; end else begin \$17 = buf_read_complete; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$64 ) begin end (* full_case = 32'd1 *) if (\$7 ) begin \$18 = 1'h1; end else begin \$18 = write_complete_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$64 ) begin end bram_address = 16'h0000; if (\$10 ) begin bram_address = read_bram_address_input; end if (\$14 ) begin bram_address = write_bram_address_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$64 ) begin end bram_write_data = 32'd0; if (\$14 ) begin bram_write_data = data_input; end end always @* begin if (\$auto$verilog_backend.cc:2352:dump_module$64 ) begin end (* full_case = 32'd1 *) if (\$14 ) begin bram_write_enable = 1'h1; end else begin bram_write_enable = 1'h0; end end endmodule