diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/README.md b/kilmu1337_pcileech-rtl8188ee-wifi-emul/README.md new file mode 100644 index 0000000000000000000000000000000000000000..c40a4a7f614aa23dbb8f3266ff496cbd9e165896 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/README.md @@ -0,0 +1,14 @@ +# pcileech-rtl8188ee-wifi-emul +Emulated firmware for the rtl8188ee + +Website: [https://kilmu.dev/](https://kilmu.dev/) + +Tutorial in UC: +https://www.unknowncheats.me/forum/anti-cheat-bypass/654112-pcileech-rtl8188ee-wifi-emul.html + +@credit + +@kilmu1337 Discord id: **kilmu1337** / Channel Link:[https://discord.gg/KilmuDMA](https://discord.gg/KilmuDMA) + +@AceKingSuited Discord id: **ace_king_suited** / Channel Link: [https://discord.gg/sXeTPJfpaN](https://discord.gg/E32e7Yca) + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0.v new file mode 100644 index 0000000000000000000000000000000000000000..2e4eec8a13eb917f92123b4d21dc5eef07a869e8 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0.v @@ -0,0 +1,932 @@ +// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. +// (c) Copyright 2022-2023 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and international copyright +// and other intellectual property laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +// DO NOT MODIFY THIS FILE. + + +// IP VLNV: xilinx.com:ip:pcie_7x:3.3 +// IP Revision: 18 + +(* X_CORE_INFO = "pcie_7x_0_pcie2_top,Vivado 2023.1" *) +(* CHECK_LICENSE_TYPE = "pcie_7x_0,pcie_7x_0_pcie2_top,{}" *) +(* CORE_GENERATION_INFO = "pcie_7x_0,pcie_7x_0_pcie2_top,{x_ipProduct=Vivado 2023.1,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=pcie_7x,x_ipVersion=3.3,x_ipCoreRevision=18,x_ipLanguage=VERILOG,x_ipSimLanguage=MIXED,PCIE_ID_IF=FALSE,c_component_name=pcie_7x_0,dev_port_type=0000,c_dev_port_type=0,c_header_type=00,c_upstream_facing=TRUE,max_lnk_wdt=000001,max_lnk_spd=2,c_gen1=true,pci_exp_int_freq=1,c_pcie_fast_config=0,bar_0=FFE00000,bar_1=00000000,bar_2=00000000,bar_3=00000000,bar_4=00000000,bar_5=00000000,xrom_bar=00000\ +000,cost_table=1,ven_id=10EE,dev_id=0666,rev_id=02,subsys_ven_id=10EE,subsys_id=0007,class_code=020000,cardbus_cis_ptr=00000000,cap_ver=2,c_pcie_cap_slot_implemented=FALSE,mps=010,cmps=2,ext_tag_fld_sup=TRUE,c_dev_control_ext_tag_default=TRUE,phantm_func_sup=00,c_phantom_functions=0,ep_l0s_accpt_lat=111,c_ep_l0s_accpt_lat=7,ep_l1_accpt_lat=111,c_ep_l1_accpt_lat=7,c_cpl_timeout_disable_sup=FALSE,c_cpl_timeout_range=0010,c_cpl_timeout_ranges_sup=2,c_buf_opt_bma=FALSE,c_perf_level_high=TRUE,c_tx_la\ +st_tlp=29,c_rx_ram_limit=7FF,c_fc_ph=4,c_fc_pd=64,c_fc_nph=4,c_fc_npd=8,c_fc_cplh=72,c_fc_cpld=850,c_cpl_inf=TRUE,c_cpl_infinite=TRUE,c_dll_lnk_actv_cap=FALSE,c_trgt_lnk_spd=2,c_hw_auton_spd_disable=FALSE,c_de_emph=FALSE,slot_clk=TRUE,c_rcb=0,c_root_cap_crs=FALSE,c_slot_cap_attn_butn=FALSE,c_slot_cap_attn_ind=FALSE,c_slot_cap_pwr_ctrl=FALSE,c_slot_cap_pwr_ind=FALSE,c_slot_cap_hotplug_surprise=FALSE,c_slot_cap_hotplug_cap=FALSE,c_slot_cap_mrl=FALSE,c_slot_cap_elec_interlock=FALSE,c_slot_cap_no_cm\ +d_comp_sup=FALSE,c_slot_cap_pwr_limit_value=0,c_slot_cap_pwr_limit_scale=0,c_slot_cap_physical_slot_num=0,intx=TRUE,int_pin=1,c_msi_cap_on=TRUE,c_pm_cap_next_ptr=48,c_msi_64b_addr=TRUE,c_msi=0,c_msi_mult_msg_extn=0,c_msi_per_vctr_mask_cap=FALSE,c_msix_cap_on=FALSE,c_msix_next_ptr=00,c_pcie_cap_next_ptr=00,c_msix_table_size=000,c_msix_table_offset=0,c_msix_table_bir=0,c_msix_pba_offset=0,c_msix_pba_bir=0,dsi=0,c_dsi_bool=FALSE,d1_sup=0,c_d1_support=FALSE,d2_sup=0,c_d2_support=FALSE,pme_sup=0F,c_p\ +me_support=0F,no_soft_rst=TRUE,pwr_con_d0_state=00,con_scl_fctr_d0_state=0,pwr_con_d1_state=00,con_scl_fctr_d1_state=0,pwr_con_d2_state=00,con_scl_fctr_d2_state=0,pwr_con_d3_state=00,con_scl_fctr_d3_state=0,pwr_dis_d0_state=00,dis_scl_fctr_d0_state=0,pwr_dis_d1_state=00,dis_scl_fctr_d1_state=0,pwr_dis_d2_state=00,dis_scl_fctr_d2_state=0,pwr_dis_d3_state=00,dis_scl_fctr_d3_state=0,c_dsn_cap_enabled=TRUE,c_dsn_base_ptr=100,c_vc_cap_enabled=FALSE,c_vc_base_ptr=000,c_vc_cap_reject_snoop=FALSE,c_vsec\ +_cap_enabled=FALSE,c_vsec_base_ptr=000,c_vsec_next_ptr=000,c_dsn_next_ptr=ffc,c_vc_next_ptr=000,c_pci_cfg_space_addr=2A,c_ext_pci_cfg_space_addr=3FF,c_last_cfg_dw=10C,c_enable_msg_route=00000000000,bram_lat=0,c_rx_raddr_lat=0,c_rx_rdata_lat=2,c_rx_write_lat=0,c_tx_raddr_lat=0,c_tx_rdata_lat=2,c_tx_write_lat=0,c_ll_ack_timeout_enable=FALSE,c_ll_ack_timeout_function=0,c_ll_ack_timeout=0000,c_ll_replay_timeout_enable=FALSE,c_ll_replay_timeout_func=1,c_ll_replay_timeout=0000,c_dis_lane_reverse=TRUE,\ +c_upconfig_capable=TRUE,c_disable_scrambling=FALSE,c_disable_tx_aspm_l0s=FALSE,c_pcie_dbg_ports=TRUE,pci_exp_ref_freq=0,c_xlnx_ref_board=NONE,c_pcie_blk_locn=0,c_ur_atomic=FALSE,c_dev_cap2_atomicop32_completer_supported=FALSE,c_dev_cap2_atomicop64_completer_supported=FALSE,c_dev_cap2_cas128_completer_supported=FALSE,c_dev_cap2_tph_completer_supported=00,c_dev_cap2_ari_forwarding_supported=FALSE,c_dev_cap2_atomicop_routing_supported=FALSE,c_link_cap_aspm_optionality=FALSE,c_aer_cap_on=FALSE,c_aer\ +_base_ptr=000,c_aer_cap_nextptr=000,c_aer_cap_ecrc_check_capable=FALSE,c_aer_cap_ecrc_gen_capable=FALSE,c_aer_cap_multiheader=FALSE,c_aer_cap_permit_rooterr_update=FALSE,c_rbar_cap_on=FALSE,c_rbar_base_ptr=000,c_rbar_cap_nextptr=000,c_rbar_num=0,c_rbar_cap_sup0=00001,c_rbar_cap_index0=0,c_rbar_cap_control_encodedbar0=00,c_rbar_cap_sup1=00001,c_rbar_cap_index1=0,c_rbar_cap_control_encodedbar1=00,c_rbar_cap_sup2=00001,c_rbar_cap_index2=0,c_rbar_cap_control_encodedbar2=00,c_rbar_cap_sup3=00001,c_rb\ +ar_cap_index3=0,c_rbar_cap_control_encodedbar3=00,c_rbar_cap_sup4=00001,c_rbar_cap_index4=0,c_rbar_cap_control_encodedbar4=00,c_rbar_cap_sup5=00001,c_rbar_cap_index5=0,c_rbar_cap_control_encodedbar5=00,c_recrc_check=0,c_recrc_check_trim=FALSE,c_disable_rx_poisoned_resp=FALSE,c_trn_np_fc=TRUE,c_ur_inv_req=TRUE,c_ur_prs_response=TRUE,c_silicon_rev=2,c_aer_cap_optional_err_support=000000,LINK_CAP_MAX_LINK_WIDTH=1,C_DATA_WIDTH=64,PIPE_SIM=FALSE,PCIE_EXT_CLK=FALSE,PCIE_EXT_GT_COMMON=FALSE,EXT_CH_GT_D\ +RP=FALSE,TRANSCEIVER_CTRL_STATUS_PORTS=FALSE,SHARED_LOGIC_IN_CORE=FALSE,ERR_REPORTING_IF=FALSE,PL_INTERFACE=TRUE,CFG_MGMT_IF=TRUE,CFG_CTL_IF=TRUE,CFG_STATUS_IF=TRUE,RCV_MSG_IF=FALSE,CFG_FC_IF=FALSE,EXT_PIPE_INTERFACE=FALSE,EXT_STARTUP_PRIMITIVE=FALSE,KEEP_WIDTH=8,PCIE_ASYNC_EN=FALSE,ENABLE_JTAG_DBG=FALSE,REDUCE_OOB_FREQ=FALSE}" *) +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0 ( + pci_exp_txp, + pci_exp_txn, + pci_exp_rxp, + pci_exp_rxn, + user_clk_out, + user_reset_out, + user_lnk_up, + user_app_rdy, + tx_buf_av, + tx_cfg_req, + tx_err_drop, + s_axis_tx_tready, + s_axis_tx_tdata, + s_axis_tx_tkeep, + s_axis_tx_tlast, + s_axis_tx_tvalid, + s_axis_tx_tuser, + tx_cfg_gnt, + m_axis_rx_tdata, + m_axis_rx_tkeep, + m_axis_rx_tlast, + m_axis_rx_tvalid, + m_axis_rx_tready, + m_axis_rx_tuser, + rx_np_ok, + rx_np_req, + cfg_mgmt_do, + cfg_mgmt_rd_wr_done, + cfg_status, + cfg_command, + cfg_dstatus, + cfg_dcommand, + cfg_lstatus, + cfg_lcommand, + cfg_dcommand2, + cfg_pcie_link_state, + cfg_pmcsr_pme_en, + cfg_pmcsr_powerstate, + cfg_pmcsr_pme_status, + cfg_received_func_lvl_rst, + cfg_mgmt_di, + cfg_mgmt_byte_en, + cfg_mgmt_dwaddr, + cfg_mgmt_wr_en, + cfg_mgmt_rd_en, + cfg_mgmt_wr_readonly, + cfg_trn_pending, + cfg_pm_halt_aspm_l0s, + cfg_pm_halt_aspm_l1, + cfg_pm_force_state_en, + cfg_pm_force_state, + cfg_dsn, + cfg_interrupt, + cfg_interrupt_rdy, + cfg_interrupt_assert, + cfg_interrupt_di, + cfg_interrupt_do, + cfg_interrupt_mmenable, + cfg_interrupt_msienable, + cfg_interrupt_msixenable, + cfg_interrupt_msixfm, + cfg_interrupt_stat, + cfg_pciecap_interrupt_msgnum, + cfg_to_turnoff, + cfg_turnoff_ok, + cfg_bus_number, + cfg_device_number, + cfg_function_number, + cfg_pm_wake, + cfg_pm_send_pme_to, + cfg_ds_bus_number, + cfg_ds_device_number, + cfg_ds_function_number, + cfg_mgmt_wr_rw1c_as_rw, + cfg_bridge_serr_en, + cfg_slot_control_electromech_il_ctl_pulse, + cfg_root_control_syserr_corr_err_en, + cfg_root_control_syserr_non_fatal_err_en, + cfg_root_control_syserr_fatal_err_en, + cfg_root_control_pme_int_en, + cfg_aer_rooterr_corr_err_reporting_en, + cfg_aer_rooterr_non_fatal_err_reporting_en, + cfg_aer_rooterr_fatal_err_reporting_en, + cfg_aer_rooterr_corr_err_received, + cfg_aer_rooterr_non_fatal_err_received, + cfg_aer_rooterr_fatal_err_received, + pl_directed_link_change, + pl_directed_link_width, + pl_directed_link_speed, + pl_directed_link_auton, + pl_upstream_prefer_deemph, + pl_sel_lnk_rate, + pl_sel_lnk_width, + pl_ltssm_state, + pl_lane_reversal_mode, + pl_phy_lnk_up, + pl_tx_pm_state, + pl_rx_pm_state, + pl_link_upcfg_cap, + pl_link_gen2_cap, + pl_link_partner_gen2_supported, + pl_initial_link_width, + pl_directed_change_done, + pl_received_hot_rst, + pl_transmit_hot_rst, + pl_downstream_deemph_source, + cfg_vc_tcvc_map, + sys_clk, + sys_rst_n, + pcie_drp_clk, + pcie_drp_en, + pcie_drp_we, + pcie_drp_addr, + pcie_drp_di, + pcie_drp_do, + pcie_drp_rdy +); + +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_7x_mgt txp" *) +output wire [0 : 0] pci_exp_txp; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_7x_mgt txn" *) +output wire [0 : 0] pci_exp_txn; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_7x_mgt rxp" *) +input wire [0 : 0] pci_exp_rxp; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_7x_mgt rxn" *) +input wire [0 : 0] pci_exp_rxn; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME CLK.user_clk_out, ASSOCIATED_BUSIF m_axis_rx:s_axis_tx, FREQ_HZ 125000000, ASSOCIATED_RESET user_reset_out, FREQ_TOLERANCE_HZ 0, PHASE 0.0, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 CLK.user_clk_out CLK" *) +output wire user_clk_out; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME RST.user_reset_out, POLARITY ACTIVE_HIGH, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:signal:reset:1.0 RST.user_reset_out RST" *) +output wire user_reset_out; +output wire user_lnk_up; +output wire user_app_rdy; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status tx_buf_av" *) +output wire [5 : 0] tx_buf_av; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status tx_cfg_req" *) +output wire tx_cfg_req; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status tx_err_drop" *) +output wire tx_err_drop; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TREADY" *) +output wire s_axis_tx_tready; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TDATA" *) +input wire [63 : 0] s_axis_tx_tdata; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TKEEP" *) +input wire [7 : 0] s_axis_tx_tkeep; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TLAST" *) +input wire s_axis_tx_tlast; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TVALID" *) +input wire s_axis_tx_tvalid; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME s_axis_tx, TDATA_NUM_BYTES 8, TDEST_WIDTH 0, TID_WIDTH 0, TUSER_WIDTH 4, HAS_TREADY 1, HAS_TSTRB 0, HAS_TKEEP 1, HAS_TLAST 1, FREQ_HZ 100000000, PHASE 0.0, LAYERED_METADATA undef, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TUSER" *) +input wire [3 : 0] s_axis_tx_tuser; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control tx_cfg_gnt" *) +input wire tx_cfg_gnt; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TDATA" *) +output wire [63 : 0] m_axis_rx_tdata; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TKEEP" *) +output wire [7 : 0] m_axis_rx_tkeep; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TLAST" *) +output wire m_axis_rx_tlast; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TVALID" *) +output wire m_axis_rx_tvalid; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TREADY" *) +input wire m_axis_rx_tready; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME m_axis_rx, TDATA_NUM_BYTES 8, TDEST_WIDTH 0, TID_WIDTH 0, TUSER_WIDTH 22, HAS_TREADY 1, HAS_TSTRB 0, HAS_TKEEP 1, HAS_TLAST 1, FREQ_HZ 100000000, PHASE 0.0, LAYERED_METADATA undef, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TUSER" *) +output wire [21 : 0] m_axis_rx_tuser; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control rx_np_ok" *) +input wire rx_np_ok; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control rx_np_req" *) +input wire rx_np_req; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt READ_DATA" *) +output wire [31 : 0] cfg_mgmt_do; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt READ_WRITE_DONE" *) +output wire cfg_mgmt_rd_wr_done; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status status" *) +output wire [15 : 0] cfg_status; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status command" *) +output wire [15 : 0] cfg_command; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status dstatus" *) +output wire [15 : 0] cfg_dstatus; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status dcommand" *) +output wire [15 : 0] cfg_dcommand; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status lstatus" *) +output wire [15 : 0] cfg_lstatus; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status lcommand" *) +output wire [15 : 0] cfg_lcommand; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status dcommand2" *) +output wire [15 : 0] cfg_dcommand2; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status pcie_link_state" *) +output wire [2 : 0] cfg_pcie_link_state; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status pmcsr_pme_en" *) +output wire cfg_pmcsr_pme_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status pmcsr_powerstate" *) +output wire [1 : 0] cfg_pmcsr_powerstate; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status pmcsr_pme_status" *) +output wire cfg_pmcsr_pme_status; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status received_func_lvl_rst" *) +output wire cfg_received_func_lvl_rst; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt WRITE_DATA" *) +input wire [31 : 0] cfg_mgmt_di; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt BYTE_EN" *) +input wire [3 : 0] cfg_mgmt_byte_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt ADDR" *) +input wire [9 : 0] cfg_mgmt_dwaddr; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt WRITE_EN" *) +input wire cfg_mgmt_wr_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt READ_EN" *) +input wire cfg_mgmt_rd_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt READONLY" *) +input wire cfg_mgmt_wr_readonly; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control trn_pending" *) +input wire cfg_trn_pending; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_halt_aspm_l0s" *) +input wire cfg_pm_halt_aspm_l0s; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_halt_aspm_l1" *) +input wire cfg_pm_halt_aspm_l1; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_force_state_en" *) +input wire cfg_pm_force_state_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_force_state" *) +input wire [1 : 0] cfg_pm_force_state; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control dsn" *) +input wire [63 : 0] cfg_dsn; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt interrupt" *) +input wire cfg_interrupt; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt rdy" *) +output wire cfg_interrupt_rdy; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt assert" *) +input wire cfg_interrupt_assert; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt write_data" *) +input wire [7 : 0] cfg_interrupt_di; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt read_data" *) +output wire [7 : 0] cfg_interrupt_do; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt mmenable" *) +output wire [2 : 0] cfg_interrupt_mmenable; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt msienable" *) +output wire cfg_interrupt_msienable; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt msixenable" *) +output wire cfg_interrupt_msixenable; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt msixfm" *) +output wire cfg_interrupt_msixfm; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt stat" *) +input wire cfg_interrupt_stat; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt pciecap_interrupt_msgnum" *) +input wire [4 : 0] cfg_pciecap_interrupt_msgnum; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status turnoff" *) +output wire cfg_to_turnoff; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control turnoff_ok" *) +input wire cfg_turnoff_ok; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status bus_number" *) +output wire [7 : 0] cfg_bus_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status device_number" *) +output wire [4 : 0] cfg_device_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status function_number" *) +output wire [2 : 0] cfg_function_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_wake" *) +input wire cfg_pm_wake; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_send_pme_to" *) +input wire cfg_pm_send_pme_to; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control ds_bus_number" *) +input wire [7 : 0] cfg_ds_bus_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control ds_device_number" *) +input wire [4 : 0] cfg_ds_device_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control ds_function_number" *) +input wire [2 : 0] cfg_ds_function_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt TYPE1_CFG_REG_ACCESS" *) +input wire cfg_mgmt_wr_rw1c_as_rw; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status bridge_serr_en" *) +output wire cfg_bridge_serr_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status slot_control_electromech_il_ctl_pulse" *) +output wire cfg_slot_control_electromech_il_ctl_pulse; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status root_control_syserr_corr_err_en" *) +output wire cfg_root_control_syserr_corr_err_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status root_control_syserr_non_fatal_err_en" *) +output wire cfg_root_control_syserr_non_fatal_err_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status root_control_syserr_fatal_err_en" *) +output wire cfg_root_control_syserr_fatal_err_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status root_control_pme_int_en" *) +output wire cfg_root_control_pme_int_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_corr_err_reporting_en" *) +output wire cfg_aer_rooterr_corr_err_reporting_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_non_fatal_err_reporting_en" *) +output wire cfg_aer_rooterr_non_fatal_err_reporting_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_fatal_err_reporting_en" *) +output wire cfg_aer_rooterr_fatal_err_reporting_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_corr_err_received" *) +output wire cfg_aer_rooterr_corr_err_received; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_non_fatal_err_received" *) +output wire cfg_aer_rooterr_non_fatal_err_received; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_fatal_err_received" *) +output wire cfg_aer_rooterr_fatal_err_received; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl directed_link_change" *) +input wire [1 : 0] pl_directed_link_change; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl directed_link_width" *) +input wire [1 : 0] pl_directed_link_width; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl directed_link_speed" *) +input wire pl_directed_link_speed; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl directed_link_auton" *) +input wire pl_directed_link_auton; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl upstream_prefer_deemph" *) +input wire pl_upstream_prefer_deemph; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl sel_lnk_rate" *) +output wire pl_sel_lnk_rate; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl sel_lnk_width" *) +output wire [1 : 0] pl_sel_lnk_width; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl ltssm_state" *) +output wire [5 : 0] pl_ltssm_state; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl lane_reversal_mode" *) +output wire [1 : 0] pl_lane_reversal_mode; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl phy_lnk_up" *) +output wire pl_phy_lnk_up; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl tx_pm_state" *) +output wire [2 : 0] pl_tx_pm_state; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl rx_pm_state" *) +output wire [1 : 0] pl_rx_pm_state; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl link_upcfg_cap" *) +output wire pl_link_upcfg_cap; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl link_gen2_cap" *) +output wire pl_link_gen2_cap; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl link_partner_gen2_supported" *) +output wire pl_link_partner_gen2_supported; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl initial_link_width" *) +output wire [2 : 0] pl_initial_link_width; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl directed_change_done" *) +output wire pl_directed_change_done; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl received_hot_rst" *) +output wire pl_received_hot_rst; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl transmit_hot_rst" *) +input wire pl_transmit_hot_rst; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl downstream_deemph_source" *) +input wire pl_downstream_deemph_source; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status vc_tcvc_map" *) +output wire [6 : 0] cfg_vc_tcvc_map; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME CLK.sys_clk, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 CLK.sys_clk CLK" *) +input wire sys_clk; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME RST.sys_rst_n, POLARITY ACTIVE_LOW, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:signal:reset:1.0 RST.sys_rst_n RST" *) +input wire sys_rst_n; +input wire pcie_drp_clk; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DEN" *) +input wire pcie_drp_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DWE" *) +input wire pcie_drp_we; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DADDR" *) +input wire [8 : 0] pcie_drp_addr; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DI" *) +input wire [15 : 0] pcie_drp_di; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DO" *) +output wire [15 : 0] pcie_drp_do; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DRDY" *) +output wire pcie_drp_rdy; + + pcie_7x_0_pcie2_top #( + .PCIE_ID_IF("FALSE"), + .c_component_name("pcie_7x_0"), + .dev_port_type("0000"), + .c_dev_port_type("0"), + .c_header_type("00"), + .c_upstream_facing("TRUE"), + .max_lnk_wdt("000001"), + .max_lnk_spd("2"), + .c_gen1(1'B1), + .pci_exp_int_freq(1), + .c_pcie_fast_config(0), + .bar_0("FFE00000"), + .bar_1("00000000"), + .bar_2("00000000"), + .bar_3("00000000"), + .bar_4("00000000"), + .bar_5("00000000"), + .xrom_bar("00000000"), + .cost_table(1), + .ven_id("10EE"), + .dev_id("0666"), + .rev_id("02"), + .subsys_ven_id("10EE"), + .subsys_id("0007"), + .class_code("020000"), + .cardbus_cis_ptr("00000000"), + .cap_ver("2"), + .c_pcie_cap_slot_implemented("FALSE"), + .mps("010"), + .cmps("2"), + .ext_tag_fld_sup("TRUE"), + .c_dev_control_ext_tag_default("TRUE"), + .phantm_func_sup("00"), + .c_phantom_functions("0"), + .ep_l0s_accpt_lat("111"), + .c_ep_l0s_accpt_lat("7"), + .ep_l1_accpt_lat("111"), + .c_ep_l1_accpt_lat("7"), + .c_cpl_timeout_disable_sup("FALSE"), + .c_cpl_timeout_range("0010"), + .c_cpl_timeout_ranges_sup("2"), + .c_buf_opt_bma("FALSE"), + .c_perf_level_high("TRUE"), + .c_tx_last_tlp("29"), + .c_rx_ram_limit("7FF"), + .c_fc_ph("4"), + .c_fc_pd("64"), + .c_fc_nph("4"), + .c_fc_npd("8"), + .c_fc_cplh("72"), + .c_fc_cpld("850"), + .c_cpl_inf("TRUE"), + .c_cpl_infinite("TRUE"), + .c_dll_lnk_actv_cap("FALSE"), + .c_trgt_lnk_spd("2"), + .c_hw_auton_spd_disable("FALSE"), + .c_de_emph("FALSE"), + .slot_clk("TRUE"), + .c_rcb("0"), + .c_root_cap_crs("FALSE"), + .c_slot_cap_attn_butn("FALSE"), + .c_slot_cap_attn_ind("FALSE"), + .c_slot_cap_pwr_ctrl("FALSE"), + .c_slot_cap_pwr_ind("FALSE"), + .c_slot_cap_hotplug_surprise("FALSE"), + .c_slot_cap_hotplug_cap("FALSE"), + .c_slot_cap_mrl("FALSE"), + .c_slot_cap_elec_interlock("FALSE"), + .c_slot_cap_no_cmd_comp_sup("FALSE"), + .c_slot_cap_pwr_limit_value("0"), + .c_slot_cap_pwr_limit_scale("0"), + .c_slot_cap_physical_slot_num("0"), + .intx("TRUE"), + .int_pin("1"), + .c_msi_cap_on("TRUE"), + .c_pm_cap_next_ptr("48"), + .c_msi_64b_addr("TRUE"), + .c_msi("0"), + .c_msi_mult_msg_extn("0"), + .c_msi_per_vctr_mask_cap("FALSE"), + .c_msix_cap_on("FALSE"), + .c_msix_next_ptr("00"), + .c_pcie_cap_next_ptr("00"), + .c_msix_table_size("000"), + .c_msix_table_offset("0"), + .c_msix_table_bir("0"), + .c_msix_pba_offset("0"), + .c_msix_pba_bir("0"), + .dsi("0"), + .c_dsi_bool("FALSE"), + .d1_sup("0"), + .c_d1_support("FALSE"), + .d2_sup("0"), + .c_d2_support("FALSE"), + .pme_sup("0F"), + .c_pme_support("0F"), + .no_soft_rst("TRUE"), + .pwr_con_d0_state("00"), + .con_scl_fctr_d0_state("0"), + .pwr_con_d1_state("00"), + .con_scl_fctr_d1_state("0"), + .pwr_con_d2_state("00"), + .con_scl_fctr_d2_state("0"), + .pwr_con_d3_state("00"), + .con_scl_fctr_d3_state("0"), + .pwr_dis_d0_state("00"), + .dis_scl_fctr_d0_state("0"), + .pwr_dis_d1_state("00"), + .dis_scl_fctr_d1_state("0"), + .pwr_dis_d2_state("00"), + .dis_scl_fctr_d2_state("0"), + .pwr_dis_d3_state("00"), + .dis_scl_fctr_d3_state("0"), + .c_dsn_cap_enabled("TRUE"), + .c_dsn_base_ptr("100"), + .c_vc_cap_enabled("FALSE"), + .c_vc_base_ptr("000"), + .c_vc_cap_reject_snoop("FALSE"), + .c_vsec_cap_enabled("FALSE"), + .c_vsec_base_ptr("000"), + .c_vsec_next_ptr("000"), + .c_dsn_next_ptr("ffc"), + .c_vc_next_ptr("000"), + .c_pci_cfg_space_addr("2A"), + .c_ext_pci_cfg_space_addr("3FF"), + .c_last_cfg_dw("10C"), + .c_enable_msg_route("00000000000"), + .bram_lat("0"), + .c_rx_raddr_lat("0"), + .c_rx_rdata_lat("2"), + .c_rx_write_lat("0"), + .c_tx_raddr_lat("0"), + .c_tx_rdata_lat("2"), + .c_tx_write_lat("0"), + .c_ll_ack_timeout_enable("FALSE"), + .c_ll_ack_timeout_function("0"), + .c_ll_ack_timeout("0000"), + .c_ll_replay_timeout_enable("FALSE"), + .c_ll_replay_timeout_func("1"), + .c_ll_replay_timeout("0000"), + .c_dis_lane_reverse("TRUE"), + .c_upconfig_capable("TRUE"), + .c_disable_scrambling("FALSE"), + .c_disable_tx_aspm_l0s("FALSE"), + .c_pcie_dbg_ports("TRUE"), + .pci_exp_ref_freq("0"), + .c_xlnx_ref_board("NONE"), + .c_pcie_blk_locn("0"), + .c_ur_atomic("FALSE"), + .c_dev_cap2_atomicop32_completer_supported("FALSE"), + .c_dev_cap2_atomicop64_completer_supported("FALSE"), + .c_dev_cap2_cas128_completer_supported("FALSE"), + .c_dev_cap2_tph_completer_supported("00"), + .c_dev_cap2_ari_forwarding_supported("FALSE"), + .c_dev_cap2_atomicop_routing_supported("FALSE"), + .c_link_cap_aspm_optionality("FALSE"), + .c_aer_cap_on("FALSE"), + .c_aer_base_ptr("000"), + .c_aer_cap_nextptr("000"), + .c_aer_cap_ecrc_check_capable("FALSE"), + .c_aer_cap_ecrc_gen_capable("FALSE"), + .c_aer_cap_multiheader("FALSE"), + .c_aer_cap_permit_rooterr_update("FALSE"), + .c_rbar_cap_on("FALSE"), + .c_rbar_base_ptr("000"), + .c_rbar_cap_nextptr("000"), + .c_rbar_num("0"), + .c_rbar_cap_sup0("00001"), + .c_rbar_cap_index0("0"), + .c_rbar_cap_control_encodedbar0("00"), + .c_rbar_cap_sup1("00001"), + .c_rbar_cap_index1("0"), + .c_rbar_cap_control_encodedbar1("00"), + .c_rbar_cap_sup2("00001"), + .c_rbar_cap_index2("0"), + .c_rbar_cap_control_encodedbar2("00"), + .c_rbar_cap_sup3("00001"), + .c_rbar_cap_index3("0"), + .c_rbar_cap_control_encodedbar3("00"), + .c_rbar_cap_sup4("00001"), + .c_rbar_cap_index4("0"), + .c_rbar_cap_control_encodedbar4("00"), + .c_rbar_cap_sup5("00001"), + .c_rbar_cap_index5("0"), + .c_rbar_cap_control_encodedbar5("00"), + .c_recrc_check("0"), + .c_recrc_check_trim("FALSE"), + .c_disable_rx_poisoned_resp("FALSE"), + .c_trn_np_fc("TRUE"), + .c_ur_inv_req("TRUE"), + .c_ur_prs_response("TRUE"), + .c_silicon_rev("2"), + .c_aer_cap_optional_err_support("000000"), + .LINK_CAP_MAX_LINK_WIDTH(1), + .C_DATA_WIDTH(64), + .PIPE_SIM("FALSE"), + .PCIE_EXT_CLK("FALSE"), + .PCIE_EXT_GT_COMMON("FALSE"), + .EXT_CH_GT_DRP("FALSE"), + .TRANSCEIVER_CTRL_STATUS_PORTS("FALSE"), + .SHARED_LOGIC_IN_CORE("FALSE"), + .ERR_REPORTING_IF("FALSE"), + .PL_INTERFACE("TRUE"), + .CFG_MGMT_IF("TRUE"), + .CFG_CTL_IF("TRUE"), + .CFG_STATUS_IF("TRUE"), + .RCV_MSG_IF("FALSE"), + .CFG_FC_IF("FALSE"), + .EXT_PIPE_INTERFACE("FALSE"), + .EXT_STARTUP_PRIMITIVE("FALSE"), + .KEEP_WIDTH(8), + .PCIE_ASYNC_EN("FALSE"), + .ENABLE_JTAG_DBG("FALSE"), + .REDUCE_OOB_FREQ("FALSE") + ) inst ( + .cfg_subsys_ven_id(16'H10EE), + .cfg_ven_id(16'H10EE), + .cfg_dev_id_pf0(16'H0007), + .cfg_rev_id_pf0(8'H00), + .cfg_subsys_id_pf0(16'H0007), + .pci_exp_txp(pci_exp_txp), + .pci_exp_txn(pci_exp_txn), + .pci_exp_rxp(pci_exp_rxp), + .pci_exp_rxn(pci_exp_rxn), + .int_pclk_out_slave(), + .int_pipe_rxusrclk_out(), + .int_rxoutclk_out(), + .int_dclk_out(), + .int_mmcm_lock_out(), + .int_userclk1_out(), + .int_userclk2_out(), + .int_oobclk_out(), + .int_qplllock_out(), + .int_qplloutclk_out(), + .int_qplloutrefclk_out(), + .int_pclk_sel_slave(1'B0), + .pipe_pclk_in(1'B0), + .pipe_rxusrclk_in(1'B0), + .pipe_rxoutclk_in(1'B0), + .pipe_dclk_in(1'B0), + .pipe_userclk1_in(1'B1), + .pipe_userclk2_in(1'B0), + .pipe_oobclk_in(1'B0), + .pipe_mmcm_lock_in(1'B1), + .pipe_txoutclk_out(), + .pipe_rxoutclk_out(), + .pipe_pclk_sel_out(), + .pipe_gen3_out(), + .user_clk_out(user_clk_out), + .user_reset_out(user_reset_out), + .user_lnk_up(user_lnk_up), + .user_app_rdy(user_app_rdy), + .tx_buf_av(tx_buf_av), + .tx_cfg_req(tx_cfg_req), + .tx_err_drop(tx_err_drop), + .s_axis_tx_tready(s_axis_tx_tready), + .s_axis_tx_tdata(s_axis_tx_tdata), + .s_axis_tx_tkeep(s_axis_tx_tkeep), + .s_axis_tx_tlast(s_axis_tx_tlast), + .s_axis_tx_tvalid(s_axis_tx_tvalid), + .s_axis_tx_tuser(s_axis_tx_tuser), + .tx_cfg_gnt(tx_cfg_gnt), + .m_axis_rx_tdata(m_axis_rx_tdata), + .m_axis_rx_tkeep(m_axis_rx_tkeep), + .m_axis_rx_tlast(m_axis_rx_tlast), + .m_axis_rx_tvalid(m_axis_rx_tvalid), + .m_axis_rx_tready(m_axis_rx_tready), + .m_axis_rx_tuser(m_axis_rx_tuser), + .rx_np_ok(rx_np_ok), + .rx_np_req(rx_np_req), + .fc_cpld(), + .fc_cplh(), + .fc_npd(), + .fc_nph(), + .fc_pd(), + .fc_ph(), + .fc_sel(3'B0), + .cfg_mgmt_do(cfg_mgmt_do), + .cfg_mgmt_rd_wr_done(cfg_mgmt_rd_wr_done), + .cfg_status(cfg_status), + .cfg_command(cfg_command), + .cfg_dstatus(cfg_dstatus), + .cfg_dcommand(cfg_dcommand), + .cfg_lstatus(cfg_lstatus), + .cfg_lcommand(cfg_lcommand), + .cfg_dcommand2(cfg_dcommand2), + .cfg_pcie_link_state(cfg_pcie_link_state), + .cfg_pmcsr_pme_en(cfg_pmcsr_pme_en), + .cfg_pmcsr_powerstate(cfg_pmcsr_powerstate), + .cfg_pmcsr_pme_status(cfg_pmcsr_pme_status), + .cfg_received_func_lvl_rst(cfg_received_func_lvl_rst), + .cfg_mgmt_di(cfg_mgmt_di), + .cfg_mgmt_byte_en(cfg_mgmt_byte_en), + .cfg_mgmt_dwaddr(cfg_mgmt_dwaddr), + .cfg_mgmt_wr_en(cfg_mgmt_wr_en), + .cfg_mgmt_rd_en(cfg_mgmt_rd_en), + .cfg_mgmt_wr_readonly(cfg_mgmt_wr_readonly), + .cfg_err_ecrc(1'B0), + .cfg_err_ur(1'B0), + .cfg_err_cpl_timeout(1'B0), + .cfg_err_cpl_unexpect(1'B0), + .cfg_err_cpl_abort(1'B0), + .cfg_err_posted(1'B0), + .cfg_err_cor(1'B0), + .cfg_err_atomic_egress_blocked(1'B0), + .cfg_err_internal_cor(1'B0), + .cfg_err_malformed(1'B0), + .cfg_err_mc_blocked(1'B0), + .cfg_err_poisoned(1'B0), + .cfg_err_norecovery(1'B0), + .cfg_err_tlp_cpl_header(48'B0), + .cfg_err_cpl_rdy(), + .cfg_err_locked(1'B0), + .cfg_err_acs(1'B0), + .cfg_err_internal_uncor(1'B0), + .cfg_trn_pending(cfg_trn_pending), + .cfg_pm_halt_aspm_l0s(cfg_pm_halt_aspm_l0s), + .cfg_pm_halt_aspm_l1(cfg_pm_halt_aspm_l1), + .cfg_pm_force_state_en(cfg_pm_force_state_en), + .cfg_pm_force_state(cfg_pm_force_state), + .cfg_dsn(cfg_dsn), + .cfg_interrupt(cfg_interrupt), + .cfg_interrupt_rdy(cfg_interrupt_rdy), + .cfg_interrupt_assert(cfg_interrupt_assert), + .cfg_interrupt_di(cfg_interrupt_di), + .cfg_interrupt_do(cfg_interrupt_do), + .cfg_interrupt_mmenable(cfg_interrupt_mmenable), + .cfg_interrupt_msienable(cfg_interrupt_msienable), + .cfg_interrupt_msixenable(cfg_interrupt_msixenable), + .cfg_interrupt_msixfm(cfg_interrupt_msixfm), + .cfg_interrupt_stat(cfg_interrupt_stat), + .cfg_pciecap_interrupt_msgnum(cfg_pciecap_interrupt_msgnum), + .cfg_to_turnoff(cfg_to_turnoff), + .cfg_turnoff_ok(cfg_turnoff_ok), + .cfg_bus_number(cfg_bus_number), + .cfg_device_number(cfg_device_number), + .cfg_function_number(cfg_function_number), + .cfg_pm_wake(cfg_pm_wake), + .cfg_pm_send_pme_to(cfg_pm_send_pme_to), + .cfg_ds_bus_number(cfg_ds_bus_number), + .cfg_ds_device_number(cfg_ds_device_number), + .cfg_ds_function_number(cfg_ds_function_number), + .cfg_mgmt_wr_rw1c_as_rw(cfg_mgmt_wr_rw1c_as_rw), + .cfg_msg_received(), + .cfg_msg_data(), + .cfg_bridge_serr_en(cfg_bridge_serr_en), + .cfg_slot_control_electromech_il_ctl_pulse(cfg_slot_control_electromech_il_ctl_pulse), + .cfg_root_control_syserr_corr_err_en(cfg_root_control_syserr_corr_err_en), + .cfg_root_control_syserr_non_fatal_err_en(cfg_root_control_syserr_non_fatal_err_en), + .cfg_root_control_syserr_fatal_err_en(cfg_root_control_syserr_fatal_err_en), + .cfg_root_control_pme_int_en(cfg_root_control_pme_int_en), + .cfg_aer_rooterr_corr_err_reporting_en(cfg_aer_rooterr_corr_err_reporting_en), + .cfg_aer_rooterr_non_fatal_err_reporting_en(cfg_aer_rooterr_non_fatal_err_reporting_en), + .cfg_aer_rooterr_fatal_err_reporting_en(cfg_aer_rooterr_fatal_err_reporting_en), + .cfg_aer_rooterr_corr_err_received(cfg_aer_rooterr_corr_err_received), + .cfg_aer_rooterr_non_fatal_err_received(cfg_aer_rooterr_non_fatal_err_received), + .cfg_aer_rooterr_fatal_err_received(cfg_aer_rooterr_fatal_err_received), + .cfg_msg_received_err_cor(), + .cfg_msg_received_err_non_fatal(), + .cfg_msg_received_err_fatal(), + .cfg_msg_received_pm_as_nak(), + .cfg_msg_received_pm_pme(), + .cfg_msg_received_pme_to_ack(), + .cfg_msg_received_assert_int_a(), + .cfg_msg_received_assert_int_b(), + .cfg_msg_received_assert_int_c(), + .cfg_msg_received_assert_int_d(), + .cfg_msg_received_deassert_int_a(), + .cfg_msg_received_deassert_int_b(), + .cfg_msg_received_deassert_int_c(), + .cfg_msg_received_deassert_int_d(), + .cfg_msg_received_setslotpowerlimit(), + .pl_directed_link_change(pl_directed_link_change), + .pl_directed_link_width(pl_directed_link_width), + .pl_directed_link_speed(pl_directed_link_speed), + .pl_directed_link_auton(pl_directed_link_auton), + .pl_upstream_prefer_deemph(pl_upstream_prefer_deemph), + .pl_sel_lnk_rate(pl_sel_lnk_rate), + .pl_sel_lnk_width(pl_sel_lnk_width), + .pl_ltssm_state(pl_ltssm_state), + .pl_lane_reversal_mode(pl_lane_reversal_mode), + .pl_phy_lnk_up(pl_phy_lnk_up), + .pl_tx_pm_state(pl_tx_pm_state), + .pl_rx_pm_state(pl_rx_pm_state), + .pl_link_upcfg_cap(pl_link_upcfg_cap), + .pl_link_gen2_cap(pl_link_gen2_cap), + .pl_link_partner_gen2_supported(pl_link_partner_gen2_supported), + .pl_initial_link_width(pl_initial_link_width), + .pl_directed_change_done(pl_directed_change_done), + .pl_received_hot_rst(pl_received_hot_rst), + .pl_transmit_hot_rst(pl_transmit_hot_rst), + .pl_downstream_deemph_source(pl_downstream_deemph_source), + .cfg_err_aer_headerlog(128'B0), + .cfg_aer_interrupt_msgnum(5'B0), + .cfg_err_aer_headerlog_set(), + .cfg_aer_ecrc_check_en(), + .cfg_aer_ecrc_gen_en(), + .cfg_vc_tcvc_map(cfg_vc_tcvc_map), + .sys_clk(sys_clk), + .sys_rst_n(sys_rst_n), + .pipe_mmcm_rst_n(1'B1), + .startup_eos_in(1'B0), + .startup_cfgclk(), + .startup_cfgmclk(), + .startup_eos(), + .startup_preq(), + .startup_clk(1'B0), + .startup_gsr(1'B0), + .startup_gts(1'B0), + .startup_keyclearb(1'B1), + .startup_pack(1'B0), + .startup_usrcclko(1'B1), + .startup_usrcclkts(1'B0), + .startup_usrdoneo(1'B0), + .startup_usrdonets(1'B1), + .icap_clk(1'B0), + .icap_csib(1'B0), + .icap_rdwrb(1'B0), + .icap_i(32'B0), + .icap_o(), + .qpll_drp_crscode(12'B0), + .qpll_drp_fsm(18'B0), + .qpll_drp_done(2'B0), + .qpll_drp_reset(2'B0), + .qpll_qplllock(2'B0), + .qpll_qplloutclk(2'B0), + .qpll_qplloutrefclk(2'B0), + .qpll_qplld(), + .qpll_qpllreset(), + .qpll_drp_clk(), + .qpll_drp_rst_n(), + .qpll_drp_ovrd(), + .qpll_drp_gen3(), + .qpll_drp_start(), + .pipe_txprbssel(3'B0), + .pipe_rxprbssel(3'B0), + .pipe_txprbsforceerr(1'B0), + .pipe_rxprbscntreset(1'B0), + .pipe_loopback(3'B0), + .pipe_rxprbserr(), + .pipe_txinhibit(1'B0), + .pipe_rst_fsm(), + .pipe_qrst_fsm(), + .pipe_rate_fsm(), + .pipe_sync_fsm_tx(), + .pipe_sync_fsm_rx(), + .pipe_drp_fsm(), + .pipe_rst_idle(), + .pipe_qrst_idle(), + .pipe_rate_idle(), + .pipe_eyescandataerror(), + .pipe_rxstatus(), + .pipe_dmonitorout(), + .pipe_cpll_lock(), + .pipe_qpll_lock(), + .pipe_rxpmaresetdone(), + .pipe_rxbufstatus(), + .pipe_txphaligndone(), + .pipe_txphinitdone(), + .pipe_txdlysresetdone(), + .pipe_rxphaligndone(), + .pipe_rxdlysresetdone(), + .pipe_rxsyncdone(), + .pipe_rxdisperr(), + .pipe_rxnotintable(), + .pipe_rxcommadet(), + .gt_ch_drp_rdy(), + .pipe_debug_1(), + .pipe_debug_2(), + .pipe_debug_3(), + .pipe_debug_4(), + .pipe_debug_5(), + .pipe_debug_6(), + .pipe_debug_7(), + .pipe_debug_8(), + .pipe_debug_9(), + .pipe_debug(), + .ext_ch_gt_drpclk(), + .ext_ch_gt_drpaddr(9'B0), + .ext_ch_gt_drpen(1'B0), + .ext_ch_gt_drpdi(16'B0), + .ext_ch_gt_drpwe(1'B0), + .ext_ch_gt_drpdo(), + .ext_ch_gt_drprdy(), + .pcie_drp_clk(pcie_drp_clk), + .pcie_drp_en(pcie_drp_en), + .pcie_drp_we(pcie_drp_we), + .pcie_drp_addr(pcie_drp_addr), + .pcie_drp_di(pcie_drp_di), + .pcie_drp_do(pcie_drp_do), + .pcie_drp_rdy(pcie_drp_rdy), + .common_commands_in(12'B0), + .pipe_rx_0_sigs(25'B0), + .pipe_rx_1_sigs(25'B0), + .pipe_rx_2_sigs(25'B0), + .pipe_rx_3_sigs(25'B0), + .pipe_rx_4_sigs(25'B0), + .pipe_rx_5_sigs(25'B0), + .pipe_rx_6_sigs(25'B0), + .pipe_rx_7_sigs(25'B0), + .common_commands_out(), + .pipe_tx_0_sigs(), + .pipe_tx_1_sigs(), + .pipe_tx_2_sigs(), + .pipe_tx_3_sigs(), + .pipe_tx_4_sigs(), + .pipe_tx_5_sigs(), + .pipe_tx_6_sigs(), + .pipe_tx_7_sigs() + ); +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_rx.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_rx.v new file mode 100644 index 0000000000000000000000000000000000000000..52c389530cb99a2ad73b041ee4fe99c999f8b7ea --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_rx.v @@ -0,0 +1,212 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_rx.v +// Version : 3.3 +// // +// Description: // +// TRN to AXI RX module. Instantiates pipeline and null generator RX // +// submodules. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_rx // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_rx #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_FAMILY = "X7", // Targeted FPGA family + parameter C_ROOT_PORT = "FALSE", // PCIe block is in root port mode + parameter C_PM_PRIORITY = "FALSE", // Disable TX packet boundary thrtl + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, // trem/rrem width + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + //---------------------------------------------// + // User Design I/O // + //---------------------------------------------// + + // AXI RX + //----------- + output [C_DATA_WIDTH-1:0] m_axis_rx_tdata, // RX data to user + output m_axis_rx_tvalid, // RX data is valid + input m_axis_rx_tready, // RX ready for data + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, // RX strobe byte enables + output m_axis_rx_tlast, // RX data is last + output [21:0] m_axis_rx_tuser, // RX user signals + + //---------------------------------------------// + // PCIe Block I/O // + //---------------------------------------------// + + // TRN RX + //----------- + input [C_DATA_WIDTH-1:0] trn_rd, // RX data from block + input trn_rsof, // RX start of packet + input trn_reof, // RX end of packet + input trn_rsrc_rdy, // RX source ready + output trn_rdst_rdy, // RX destination ready + input trn_rsrc_dsc, // RX source discontinue + input [REM_WIDTH-1:0] trn_rrem, // RX remainder + input trn_rerrfwd, // RX error forward + input [6:0] trn_rbar_hit, // RX BAR hit + input trn_recrc_err, // RX ECRC error + + // System + //----------- + output [2:0] np_counter, // Non-posted counter + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +// Wires +wire null_rx_tvalid; +wire null_rx_tlast; +wire [KEEP_WIDTH-1:0] null_rx_tkeep; +wire null_rdst_rdy; +wire [4:0] null_is_eof; + +//---------------------------------------------// +// RX Data Pipeline // +//---------------------------------------------// + +pcie_7x_0_axi_basic_rx_pipeline #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .C_FAMILY( C_FAMILY ), + .TCQ( TCQ ), + + .REM_WIDTH( REM_WIDTH ), + .KEEP_WIDTH( KEEP_WIDTH ) + +) rx_pipeline_inst ( + + // Outgoing AXI TX + //----------- + .m_axis_rx_tdata( m_axis_rx_tdata ), + .m_axis_rx_tvalid( m_axis_rx_tvalid ), + .m_axis_rx_tready( m_axis_rx_tready ), + .m_axis_rx_tkeep( m_axis_rx_tkeep ), + .m_axis_rx_tlast( m_axis_rx_tlast ), + .m_axis_rx_tuser( m_axis_rx_tuser ), + + // Incoming TRN RX + //----------- + .trn_rd( trn_rd ), + .trn_rsof( trn_rsof ), + .trn_reof( trn_reof ), + .trn_rsrc_rdy( trn_rsrc_rdy ), + .trn_rdst_rdy( trn_rdst_rdy ), + .trn_rsrc_dsc( trn_rsrc_dsc ), + .trn_rrem( trn_rrem ), + .trn_rerrfwd( trn_rerrfwd ), + .trn_rbar_hit( trn_rbar_hit ), + .trn_recrc_err( trn_recrc_err ), + + // Null Inputs + //----------- + .null_rx_tvalid( null_rx_tvalid ), + .null_rx_tlast( null_rx_tlast ), + .null_rx_tkeep( null_rx_tkeep ), + .null_rdst_rdy( null_rdst_rdy ), + .null_is_eof( null_is_eof ), + + // System + //----------- + .np_counter( np_counter ), + .user_clk( user_clk ), + .user_rst( user_rst ) +); + + + //---------------------------------------------// + // RX Null Packet Generator // + //---------------------------------------------// + +pcie_7x_0_axi_basic_rx_null_gen #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .TCQ( TCQ ), + + .KEEP_WIDTH( KEEP_WIDTH ) + + ) rx_null_gen_inst ( + + // Inputs + //----------- + .m_axis_rx_tdata( m_axis_rx_tdata ), + .m_axis_rx_tvalid( m_axis_rx_tvalid ), + .m_axis_rx_tready( m_axis_rx_tready ), + .m_axis_rx_tlast( m_axis_rx_tlast ), + .m_axis_rx_tuser( m_axis_rx_tuser ), + + // Null Outputs + //----------- + .null_rx_tvalid( null_rx_tvalid ), + .null_rx_tlast( null_rx_tlast ), + .null_rx_tkeep( null_rx_tkeep ), + .null_rdst_rdy( null_rdst_rdy ), + .null_is_eof( null_is_eof ), + + // System + //----------- + .user_clk( user_clk ), + .user_rst( user_rst ) + ); + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v new file mode 100644 index 0000000000000000000000000000000000000000..f23efe41f4a06a6514ceec6e553eb511858d10e2 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v @@ -0,0 +1,383 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_rx_null_gen.v +// Version : 3.3 +// // +// Description: // +// TRN to AXI RX null generator. Generates null packets for use in // +// discontinue situations. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_rx // +// axi_basic_rx_null_gen // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_rx_null_gen # ( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + + // AXI RX + //----------- + input [C_DATA_WIDTH-1:0] m_axis_rx_tdata, // RX data to user + input m_axis_rx_tvalid, // RX data is valid + input m_axis_rx_tready, // RX ready for data + input m_axis_rx_tlast, // RX data is last + input [21:0] m_axis_rx_tuser, // RX user signals + + // Null Inputs + //----------- + output null_rx_tvalid, // NULL generated tvalid + output null_rx_tlast, // NULL generated tlast + output [KEEP_WIDTH-1:0] null_rx_tkeep, // NULL generated tkeep + output null_rdst_rdy, // NULL generated rdst_rdy + output reg [4:0] null_is_eof, // NULL generated is_eof + + // System + //----------- + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +localparam INTERFACE_WIDTH_DWORDS = (C_DATA_WIDTH == 128) ? 11'd4 : + (C_DATA_WIDTH == 64) ? 11'd2 : 11'd1; + +//----------------------------------------------------------------------------// +// NULL packet generator state machine // +// This state machine shadows the AXI RX interface, tracking each packet as // +// it's passed to the AXI user. When a multi-cycle packet is detected, the // +// state machine automatically generates a "null" packet. In the event of a // +// discontinue, the RX pipeline can switch over to this null packet as // +// necessary. // +//----------------------------------------------------------------------------// + +// State machine variables and states +localparam IDLE = 0; +localparam IN_PACKET = 1; +reg cur_state; +reg next_state; + +// Signals for tracking a packet on the AXI interface +reg [11:0] reg_pkt_len_counter; +reg [11:0] pkt_len_counter; +wire [11:0] pkt_len_counter_dec; +wire pkt_done; + +// Calculate packet fields, which are needed to determine total packet length. +wire [11:0] new_pkt_len; +wire [9:0] payload_len; +wire [1:0] packet_fmt; +wire packet_td; +reg [3:0] packet_overhead; + +// Misc. +wire [KEEP_WIDTH-1:0] eof_tkeep; +wire straddle_sof; +wire eof; + + +// Create signals to detect sof and eof situations. These signals vary depending +// on data width. +assign eof = m_axis_rx_tuser[21]; +generate + if(C_DATA_WIDTH == 128) begin : sof_eof_128 + assign straddle_sof = (m_axis_rx_tuser[14:13] == 2'b11); + end + else begin : sof_eof_64_32 + assign straddle_sof = 1'b0; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Calculate the length of the packet being presented on the RX interface. To // +// do so, we need the relevent packet fields that impact total packet length. // +// These are: // +// - Header length: obtained from bit 1 of FMT field in 1st DWORD of header // +// - Payload length: obtained from LENGTH field in 1st DWORD of header // +// - TLP digest: obtained from TD field in 1st DWORD of header // +// - Current data: the number of bytes that have already been presented // +// on the data interface // +// // +// packet length = header + payload + tlp digest - # of DWORDS already // +// transmitted // +// // +// packet_overhead is where we calculate everything except payload. // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : len_calc_128 + assign packet_fmt = straddle_sof ? + m_axis_rx_tdata[94:93] : m_axis_rx_tdata[30:29]; + assign packet_td = straddle_sof ? + m_axis_rx_tdata[79] : m_axis_rx_tdata[15]; + assign payload_len = packet_fmt[1] ? + (straddle_sof ? m_axis_rx_tdata[73:64] : m_axis_rx_tdata[9:0]) : 10'h0; + + always @(*) begin + // In 128-bit mode, the amount of data currently on the interface + // depends on whether we're straddling or not. If so, 2 DWORDs have been + // seen. If not, 4 DWORDs. + case({packet_fmt[0], packet_td, straddle_sof}) + // Header + TD - Data currently on interface + 3'b0_0_0: packet_overhead = 4'd3 + 4'd0 - 4'd4; + 3'b0_0_1: packet_overhead = 4'd3 + 4'd0 - 4'd2; + 3'b0_1_0: packet_overhead = 4'd3 + 4'd1 - 4'd4; + 3'b0_1_1: packet_overhead = 4'd3 + 4'd1 - 4'd2; + 3'b1_0_0: packet_overhead = 4'd4 + 4'd0 - 4'd4; + 3'b1_0_1: packet_overhead = 4'd4 + 4'd0 - 4'd2; + 3'b1_1_0: packet_overhead = 4'd4 + 4'd1 - 4'd4; + 3'b1_1_1: packet_overhead = 4'd4 + 4'd1 - 4'd2; + endcase + end +assign new_pkt_len = + {{9{packet_overhead[3]}}, packet_overhead[2:0]} + {2'b0, payload_len}; + end + else if(C_DATA_WIDTH == 64) begin : len_calc_64 + assign packet_fmt = m_axis_rx_tdata[30:29]; + assign packet_td = m_axis_rx_tdata[15]; + assign payload_len = packet_fmt[1] ? m_axis_rx_tdata[9:0] : 10'h0; + + always @(*) begin + // 64-bit mode: no straddling, so always 2 DWORDs + case({packet_fmt[0], packet_td}) + // Header + TD - Data currently on interface + 2'b0_0: packet_overhead[1:0] = 2'b01 ;//4'd3 + 4'd0 - 4'd2; // 1 + 2'b0_1: packet_overhead[1:0] = 2'b10 ;//4'd3 + 4'd1 - 4'd2; // 2 + 2'b1_0: packet_overhead[1:0] = 2'b10 ;//4'd4 + 4'd0 - 4'd2; // 2 + 2'b1_1: packet_overhead[1:0] = 2'b11 ;//4'd4 + 4'd1 - 4'd2; // 3 + endcase + end +assign new_pkt_len = + {{10{1'b0}}, packet_overhead[1:0]} + {2'b0, payload_len}; + end + else begin : len_calc_32 + assign packet_fmt = m_axis_rx_tdata[30:29]; + assign packet_td = m_axis_rx_tdata[15]; + assign payload_len = packet_fmt[1] ? m_axis_rx_tdata[9:0] : 10'h0; + + always @(*) begin + // 32-bit mode: no straddling, so always 1 DWORD + case({packet_fmt[0], packet_td}) + // Header + TD - Data currently on interface + 2'b0_0: packet_overhead = 4'd3 + 4'd0 - 4'd1; + 2'b0_1: packet_overhead = 4'd3 + 4'd1 - 4'd1; + 2'b1_0: packet_overhead = 4'd4 + 4'd0 - 4'd1; + 2'b1_1: packet_overhead = 4'd4 + 4'd1 - 4'd1; + endcase + end +assign new_pkt_len = + {{9{packet_overhead[3]}}, packet_overhead[2:0]} + {2'b0, payload_len}; + end +endgenerate + +// Now calculate actual packet length, adding the packet overhead and the +// payload length. This is signed math, so sign-extend packet_overhead. +// NOTE: a payload length of zero means 1024 DW in the PCIe spec, but this +// behavior isn't supported in our block. +//assign new_pkt_len = +// {{9{packet_overhead[3]}}, packet_overhead[2:0]} + {2'b0, payload_len}; + + +// Math signals needed in the state machine below. These are seperate wires to +// help ensure synthesis tools sre smart about optimizing them. +assign pkt_len_counter_dec = reg_pkt_len_counter - INTERFACE_WIDTH_DWORDS; +assign pkt_done = (reg_pkt_len_counter <= INTERFACE_WIDTH_DWORDS); + +//----------------------------------------------------------------------------// +// Null generator Mealy state machine. Determine outputs based on: // +// 1) current st // +// 2) current inp // +//----------------------------------------------------------------------------// +always @(*) begin + case (cur_state) + + // IDLE state: the interface is IDLE and we're waiting for a packet to + // start. If a packet starts, move to state IN_PACKET and begin tracking + // it as long as it's NOT a single cycle packet (indicated by assertion of + // eof at packet start) + IDLE: begin + if(m_axis_rx_tvalid && m_axis_rx_tready && !eof) begin + next_state = IN_PACKET; + end + else begin + next_state = IDLE; + end + + pkt_len_counter = new_pkt_len; + end + + // IN_PACKET: a mutli-cycle packet is in progress and we're tracking it. We + // are in lock-step with the AXI interface decrementing our packet length + // tracking reg, and waiting for the packet to finish. + // + // * If packet finished and a new one starts, this is a straddle situation. + // Next state is IN_PACKET (128-bit only). + // * If the current packet is done, next state is IDLE. + // * Otherwise, next state is IN_PACKET. + IN_PACKET: begin + // Straddle packet + if((C_DATA_WIDTH == 128) && straddle_sof && m_axis_rx_tvalid) begin + pkt_len_counter = new_pkt_len; + next_state = IN_PACKET; + end + + // Current packet finished + else if(m_axis_rx_tready && pkt_done) + begin + pkt_len_counter = new_pkt_len; + next_state = IDLE; + end + + // Packet in progress + else begin + if(m_axis_rx_tready) begin + // Not throttled + pkt_len_counter = pkt_len_counter_dec; + end + else begin + // Throttled + pkt_len_counter = reg_pkt_len_counter; + end + + next_state = IN_PACKET; + end + end + + default: begin + pkt_len_counter = reg_pkt_len_counter; + next_state = IDLE; + end + endcase +end + + +// Synchronous NULL packet generator state machine logic +always @(posedge user_clk) begin + if(user_rst) begin + cur_state <= #TCQ IDLE; + reg_pkt_len_counter <= #TCQ 12'h0; + end + else begin + cur_state <= #TCQ next_state; + reg_pkt_len_counter <= #TCQ pkt_len_counter; + end +end + + +// Generate tkeep/is_eof for an end-of-packet situation. +generate + if(C_DATA_WIDTH == 128) begin : strb_calc_128 + always @(*) begin + // Assign null_is_eof depending on how many DWORDs are left in the + // packet. + case(pkt_len_counter) + 10'd1: null_is_eof = 5'b10011; + 10'd2: null_is_eof = 5'b10111; + 10'd3: null_is_eof = 5'b11011; + 10'd4: null_is_eof = 5'b11111; + default: null_is_eof = 5'b00011; + endcase + end + + // tkeep not used in 128-bit interface + assign eof_tkeep = {KEEP_WIDTH{1'b0}}; + end + else if(C_DATA_WIDTH == 64) begin : strb_calc_64 + always @(*) begin + // Assign null_is_eof depending on how many DWORDs are left in the + // packet. + case(pkt_len_counter) + 10'd1: null_is_eof = 5'b10011; + 10'd2: null_is_eof = 5'b10111; + default: null_is_eof = 5'b00011; + endcase + end + + // Assign tkeep to 0xFF or 0x0F depending on how many DWORDs are left in + // the current packet. + assign eof_tkeep = { ((pkt_len_counter == 12'd2) ? 4'hF:4'h0), 4'hF }; + end + else begin : strb_calc_32 + always @(*) begin + // is_eof is either on or off for 32-bit + if(pkt_len_counter == 12'd1) begin + null_is_eof = 5'b10011; + end + else begin + null_is_eof = 5'b00011; + end + end + + // The entire DWORD is always valid in 32-bit mode, so tkeep is always 0xF + assign eof_tkeep = 4'hF; + end +endgenerate + + +// Finally, use everything we've generated to calculate our NULL outputs +assign null_rx_tvalid = 1'b1; +assign null_rx_tlast = (pkt_len_counter <= INTERFACE_WIDTH_DWORDS); +assign null_rx_tkeep = null_rx_tlast ? eof_tkeep : {KEEP_WIDTH{1'b1}}; +assign null_rdst_rdy = null_rx_tlast; + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v new file mode 100644 index 0000000000000000000000000000000000000000..2f81823a20eb04255dc6ea655351631b1333779b --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v @@ -0,0 +1,623 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_rx_pipeline.v +// Version : 3.3 +// // +// Description: // +// TRN to AXI RX pipeline. Converts received data from TRN protocol to AXI. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_rx // +// axi_basic_rx_pipeline // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_rx_pipeline #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_FAMILY = "X7", // Targeted FPGA family + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, // trem/rrem width + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + + // AXI RX + //----------- + output reg [C_DATA_WIDTH-1:0] m_axis_rx_tdata, // RX data to user + output reg m_axis_rx_tvalid, // RX data is valid + input m_axis_rx_tready, // RX ready for data + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, // RX strobe byte enables + output m_axis_rx_tlast, // RX data is last + output reg [21:0] m_axis_rx_tuser, // RX user signals + + // TRN RX + //----------- + input [C_DATA_WIDTH-1:0] trn_rd, // RX data from block + input trn_rsof, // RX start of packet + input trn_reof, // RX end of packet + input trn_rsrc_rdy, // RX source ready + output reg trn_rdst_rdy, // RX destination ready + input trn_rsrc_dsc, // RX source discontinue + input [REM_WIDTH-1:0] trn_rrem, // RX remainder + input trn_rerrfwd, // RX error forward + input [6:0] trn_rbar_hit, // RX BAR hit + input trn_recrc_err, // RX ECRC error + + // Null Inputs + //----------- + input null_rx_tvalid, // NULL generated tvalid + input null_rx_tlast, // NULL generated tlast + input [KEEP_WIDTH-1:0] null_rx_tkeep, // NULL generated tkeep + input null_rdst_rdy, // NULL generated rdst_rdy + input [4:0] null_is_eof, // NULL generated is_eof + + // System + //----------- + output [2:0] np_counter, // Non-posted counter + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +// Wires and regs for creating AXI signals +wire [4:0] is_sof; +wire [4:0] is_sof_prev; + +wire [4:0] is_eof; +wire [4:0] is_eof_prev; + +reg [KEEP_WIDTH-1:0] reg_tkeep; +wire [KEEP_WIDTH-1:0] tkeep; +wire [KEEP_WIDTH-1:0] tkeep_prev; + +reg reg_tlast; +wire rsrc_rdy_filtered; + +// Wires and regs for previous value buffer +wire [C_DATA_WIDTH-1:0] trn_rd_DW_swapped; +reg [C_DATA_WIDTH-1:0] trn_rd_prev; + +wire data_hold; +reg data_prev; + +reg trn_reof_prev; +reg [REM_WIDTH-1:0] trn_rrem_prev; +reg trn_rsrc_rdy_prev; +reg trn_rsrc_dsc_prev; +reg trn_rsof_prev; +reg [6:0] trn_rbar_hit_prev; +reg trn_rerrfwd_prev; +reg trn_recrc_err_prev; + +// Null packet handling signals +reg null_mux_sel; +reg trn_in_packet; +wire dsc_flag; +wire dsc_detect; +reg reg_dsc_detect; +reg trn_rsrc_dsc_d; + + +// Create "filtered" version of rsrc_rdy, where discontinued SOFs are removed. +assign rsrc_rdy_filtered = trn_rsrc_rdy && + (trn_in_packet || (trn_rsof && !trn_rsrc_dsc)); + +//----------------------------------------------------------------------------// +// Previous value buffer // +// --------------------- // +// We are inserting a pipeline stage in between TRN and AXI, which causes // +// some issues with handshaking signals m_axis_rx_tready/trn_rdst_rdy. The // +// added cycle of latency in the path causes the user design to fall behind // +// the TRN interface whenever it throttles. // +// // +// To avoid loss of data, we must keep the previous value of all trn_r* // +// signals in case the user throttles. // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + trn_rd_prev <= #TCQ {C_DATA_WIDTH{1'b0}}; + trn_rsof_prev <= #TCQ 1'b0; + trn_rrem_prev <= #TCQ {REM_WIDTH{1'b0}}; + trn_rsrc_rdy_prev <= #TCQ 1'b0; + trn_rbar_hit_prev <= #TCQ 7'h00; + trn_rerrfwd_prev <= #TCQ 1'b0; + trn_recrc_err_prev <= #TCQ 1'b0; + trn_reof_prev <= #TCQ 1'b0; + trn_rsrc_dsc_prev <= #TCQ 1'b0; + end + else begin + // prev buffer works by checking trn_rdst_rdy. When trn_rdst_rdy is + // asserted, a new value is present on the interface. + if(trn_rdst_rdy) begin + trn_rd_prev <= #TCQ trn_rd_DW_swapped; + trn_rsof_prev <= #TCQ trn_rsof; + trn_rrem_prev <= #TCQ trn_rrem; + trn_rbar_hit_prev <= #TCQ trn_rbar_hit; + trn_rerrfwd_prev <= #TCQ trn_rerrfwd; + trn_recrc_err_prev <= #TCQ trn_recrc_err; + trn_rsrc_rdy_prev <= #TCQ rsrc_rdy_filtered; + trn_reof_prev <= #TCQ trn_reof; + trn_rsrc_dsc_prev <= #TCQ trn_rsrc_dsc || dsc_flag; + end + end +end + + +//----------------------------------------------------------------------------// +// Create TDATA // +//----------------------------------------------------------------------------// + +// Convert TRN data format to AXI data format. AXI is DWORD swapped from TRN +// 128-bit: 64-bit: 32-bit: +// TRN DW0 maps to AXI DW3 TRN DW0 maps to AXI DW1 TNR DW0 maps to AXI DW0 +// TRN DW1 maps to AXI DW2 TRN DW1 maps to AXI DW0 +// TRN DW2 maps to AXI DW1 +// TRN DW3 maps to AXI DW0 +generate + if(C_DATA_WIDTH == 128) begin : rd_DW_swap_128 + assign trn_rd_DW_swapped = {trn_rd[31:0], + trn_rd[63:32], + trn_rd[95:64], + trn_rd[127:96]}; + end + else if(C_DATA_WIDTH == 64) begin : rd_DW_swap_64 + assign trn_rd_DW_swapped = {trn_rd[31:0], trn_rd[63:32]}; + end + else begin : rd_DW_swap_32 + assign trn_rd_DW_swapped = trn_rd; + end +endgenerate + + +// Create special buffer which locks in the proper value of TDATA depending +// on whether the user is throttling or not. This buffer has three states: +// +// HOLD state: TDATA maintains its current value +// - the user has throttled the PCIe block +// PREVIOUS state: the buffer provides the previous value on trn_rd +// - the user has finished throttling, and is a little behind +// the PCIe block +// CURRENT state: the buffer passes the current value on trn_rd +// - the user is caught up and ready to receive the latest +// data from the PCIe block +always @(posedge user_clk) begin + if(user_rst) begin + m_axis_rx_tdata <= #TCQ {C_DATA_WIDTH{1'b0}}; + end + else begin + if(!data_hold) begin + // PREVIOUS state + if(data_prev) begin + m_axis_rx_tdata <= #TCQ trn_rd_prev; + end + + // CURRENT state + else begin + m_axis_rx_tdata <= #TCQ trn_rd_DW_swapped; + end + end + // else HOLD state + end +end + +// Logic to instruct pipeline to hold its value +assign data_hold = (!m_axis_rx_tready && m_axis_rx_tvalid); + +// Logic to instruct pipeline to use previous bus values. Always use previous +// value after holding a value. +always @(posedge user_clk) begin + if(user_rst) begin + data_prev <= #TCQ 1'b0; + end + else begin + data_prev <= #TCQ data_hold; + end +end + + +//----------------------------------------------------------------------------// +// Create TVALID, TLAST, tkeep, TUSER // +// ----------------------------------- // +// Use the same strategy for these signals as for TDATA, except here we need // +// an extra provision for null packets. // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + m_axis_rx_tvalid <= #TCQ 1'b0; + reg_tlast <= #TCQ 1'b0; + reg_tkeep <= #TCQ {KEEP_WIDTH{1'b1}}; + m_axis_rx_tuser <= #TCQ 22'h0; + end + else begin + if(!data_hold) begin + // If in a null packet, use null generated value + if(null_mux_sel) begin + m_axis_rx_tvalid <= #TCQ null_rx_tvalid; + reg_tlast <= #TCQ null_rx_tlast; + reg_tkeep <= #TCQ null_rx_tkeep; + m_axis_rx_tuser <= #TCQ {null_is_eof, 17'h0000}; + end + + // PREVIOUS state + else if(data_prev) begin + m_axis_rx_tvalid <= #TCQ (trn_rsrc_rdy_prev || dsc_flag); + reg_tlast <= #TCQ trn_reof_prev; + reg_tkeep <= #TCQ tkeep_prev; + m_axis_rx_tuser <= #TCQ {is_eof_prev, // TUSER bits [21:17] + 2'b00, // TUSER bits [16:15] + is_sof_prev, // TUSER bits [14:10] + 1'b0, // TUSER bit [9] + trn_rbar_hit_prev, // TUSER bits [8:2] + trn_rerrfwd_prev, // TUSER bit [1] + trn_recrc_err_prev}; // TUSER bit [0] + end + + // CURRENT state + else begin + m_axis_rx_tvalid <= #TCQ (rsrc_rdy_filtered || dsc_flag); + reg_tlast <= #TCQ trn_reof; + reg_tkeep <= #TCQ tkeep; + m_axis_rx_tuser <= #TCQ {is_eof, // TUSER bits [21:17] + 2'b00, // TUSER bits [16:15] + is_sof, // TUSER bits [14:10] + 1'b0, // TUSER bit [9] + trn_rbar_hit, // TUSER bits [8:2] + trn_rerrfwd, // TUSER bit [1] + trn_recrc_err}; // TUSER bit [0] + end + end + // else HOLD state + end +end + +// Hook up TLAST and tkeep depending on interface width +generate + // For 128-bit interface, don't pass TLAST and tkeep to user (is_eof and + // is_data passed to user instead). reg_tlast is still used internally. + if(C_DATA_WIDTH == 128) begin : tlast_tkeep_hookup_128 + assign m_axis_rx_tlast = 1'b0; + assign m_axis_rx_tkeep = {KEEP_WIDTH{1'b1}}; + end + + // For 64/32-bit interface, pass TLAST to user. + else begin : tlast_tkeep_hookup_64_32 + assign m_axis_rx_tlast = reg_tlast; + assign m_axis_rx_tkeep = reg_tkeep; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Create tkeep // +// ------------ // +// Convert RREM to STRB. Here, we are converting the encoding method for the // +// location of the EOF from TRN flavor (rrem) to AXI (tkeep). // +// // +// NOTE: for each configuration, we need two values of tkeep, the current and // +// previous values. The need for these two values is described below. // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : rrem_to_tkeep_128 + // TLAST and tkeep not used in 128-bit interface. is_sof and is_eof used + // instead. + assign tkeep = 16'h0000; + assign tkeep_prev = 16'h0000; + end + else if(C_DATA_WIDTH == 64) begin : rrem_to_tkeep_64 + // 64-bit interface: contains 2 DWORDs per cycle, for a total of 8 bytes + // - tkeep has only two possible values here, 0xFF or 0x0F + assign tkeep = trn_rrem ? 8'hFF : 8'h0F; + assign tkeep_prev = trn_rrem_prev ? 8'hFF : 8'h0F; + end + else begin : rrem_to_tkeep_32 + // 32-bit interface: contains 1 DWORD per cycle, for a total of 4 bytes + // - tkeep is always 0xF in this case, due to the nature of the PCIe block + assign tkeep = 4'hF; + assign tkeep_prev = 4'hF; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Create is_sof // +// ------------- // +// is_sof is a signal to the user indicating the location of SOF in TDATA . // +// Due to inherent 64-bit alignment of packets from the block, the only // +// possible values are: // +// Value Valid data widths // +// 5'b11000 (sof @ byte 8) 128 // +// 5'b10000 (sof @ byte 0) 128, 64, 32 // +// 5'b00000 (sof not present) 128, 64, 32 // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : is_sof_128 + assign is_sof = {(trn_rsof && !trn_rsrc_dsc), // bit 4: enable + (trn_rsof && !trn_rrem[1]), // bit 3: sof @ byte 8? + 3'b000}; // bit 2-0: hardwired 0 + + assign is_sof_prev = {(trn_rsof_prev && !trn_rsrc_dsc_prev), // bit 4 + (trn_rsof_prev && !trn_rrem_prev[1]), // bit 3 + 3'b000}; // bit 2-0 + end + else begin : is_sof_64_32 + assign is_sof = {(trn_rsof && !trn_rsrc_dsc), // bit 4: enable + 4'b0000}; // bit 3-0: hardwired 0 + + assign is_sof_prev = {(trn_rsof_prev && !trn_rsrc_dsc_prev), // bit 4 + 4'b0000}; // bit 3-0 + end +endgenerate + + +//----------------------------------------------------------------------------// +// Create is_eof // +// ------------- // +// is_eof is a signal to the user indicating the location of EOF in TDATA . // +// Due to DWORD granularity of packets from the block, the only // +// possible values are: // +// Value Valid data widths // +// 5'b11111 (eof @ byte 15) 128 // +// 5'b11011 (eof @ byte 11) 128 // +// 5'b10111 (eof @ byte 7) 128, 64 // +// 5'b10011 (eof @ byte 3)` 128, 64, 32 // +// 5'b00011 (eof not present) 128, 64, 32 // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : is_eof_128 + assign is_eof = {trn_reof, // bit 4: enable + trn_rrem, // bit 3-2: encoded eof loc rom block + 2'b11}; // bit 1-0: hardwired 1 + + assign is_eof_prev = {trn_reof_prev, // bit 4: enable + trn_rrem_prev, // bit 3-2: encoded eof loc from block + 2'b11}; // bit 1-0: hardwired 1 + end + else if(C_DATA_WIDTH == 64) begin : is_eof_64 + assign is_eof = {trn_reof, // bit 4: enable + 1'b0, // bit 3: hardwired 0 + trn_rrem, // bit 2: encoded eof loc from block + 2'b11}; // bit 1-0: hardwired 1 + + assign is_eof_prev = {trn_reof_prev, // bit 4: enable + 1'b0, // bit 3: hardwired 0 + trn_rrem_prev, // bit 2: encoded eof loc from block + 2'b11}; // bit 1-0: hardwired 1 + end + else begin : is_eof_32 + assign is_eof = {trn_reof, // bit 4: enable + 4'b0011}; // bit 3-0: hardwired to byte 3 + + assign is_eof_prev = {trn_reof_prev, // bit 4: enable + 4'b0011}; // bit 3-0: hardwired to byte 3 + end +endgenerate + + + +//----------------------------------------------------------------------------// +// Create trn_rdst_rdy // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + trn_rdst_rdy <= #TCQ 1'b0; + end + else begin + // If in a null packet, use null generated value + if(null_mux_sel && m_axis_rx_tready) begin + trn_rdst_rdy <= #TCQ null_rdst_rdy; + end + + // If a discontinue needs to be serviced, throttle the block until we are + // ready to pad out the packet. + else if(dsc_flag) begin + trn_rdst_rdy <= #TCQ 1'b0; + end + + // If in a packet, pass user back-pressure directly to block + else if(m_axis_rx_tvalid) begin + trn_rdst_rdy <= #TCQ m_axis_rx_tready; + end + + // If idle, default to no back-pressure. We need to default to the + // "ready to accept data" state to make sure we catch the first + // clock of data of a new packet. + else begin + trn_rdst_rdy <= #TCQ 1'b1; + end + end +end + +//----------------------------------------------------------------------------// +// Create null_mux_sel // +// null_mux_sel is the signal used to detect a discontinue situation and // +// mux in the null packet generated in rx_null_gen. Only mux in null data // +// when not at the beginningof a packet. SOF discontinues do not require // +// padding, as the whole packet is simply squashed instead. // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + null_mux_sel <= #TCQ 1'b0; + end + else begin + // NULL packet done + if(null_mux_sel && null_rx_tlast && m_axis_rx_tready) + begin + null_mux_sel <= #TCQ 1'b0; + end + + // Discontinue detected and we're in packet, so switch to NULL packet + else if(dsc_flag && !data_hold) begin + null_mux_sel <= #TCQ 1'b1; + end + end +end + + +//----------------------------------------------------------------------------// +// Create discontinue tracking signals // +//----------------------------------------------------------------------------// +// Create signal trn_in_packet, which is needed to validate trn_rsrc_dsc. We +// should ignore trn_rsrc_dsc when it's asserted out-of-packet. +always @(posedge user_clk) begin + if(user_rst) begin + trn_in_packet <= #TCQ 1'b0; + end + else begin + if(trn_rsof && !trn_reof && rsrc_rdy_filtered && trn_rdst_rdy) + begin + trn_in_packet <= #TCQ 1'b1; + end + else if(trn_rsrc_dsc) begin + trn_in_packet <= #TCQ 1'b0; + end + else if(trn_reof && !trn_rsof && trn_rsrc_rdy && trn_rdst_rdy) begin + trn_in_packet <= #TCQ 1'b0; + end + end +end + + +// Create dsc_flag, which identifies and stores mid-packet discontinues that +// require null packet padding. This signal is edge sensitive to trn_rsrc_dsc, +// to make sure we don't service the same dsc twice in the event that +// trn_rsrc_dsc stays asserted for longer than it takes to pad out the packet. +assign dsc_detect = trn_rsrc_dsc && !trn_rsrc_dsc_d && trn_in_packet && + (!trn_rsof || trn_reof) && !(trn_rdst_rdy && trn_reof); + +always @(posedge user_clk) begin + if(user_rst) begin + reg_dsc_detect <= #TCQ 1'b0; + trn_rsrc_dsc_d <= #TCQ 1'b0; + end + else begin + if(dsc_detect) begin + reg_dsc_detect <= #TCQ 1'b1; + end + else if(null_mux_sel) begin + reg_dsc_detect <= #TCQ 1'b0; + end + + trn_rsrc_dsc_d <= #TCQ trn_rsrc_dsc; + end +end + +assign dsc_flag = dsc_detect || reg_dsc_detect; + + + +//----------------------------------------------------------------------------// +// Create np_counter (V6 128-bit only). This counter tells the V6 128-bit // +// interface core how many NP packets have left the RX pipeline. The V6 // +// 128-bit interface uses this count to perform rnp_ok modulation. // +//----------------------------------------------------------------------------// +generate + if(C_FAMILY == "V6" && C_DATA_WIDTH == 128) begin : np_cntr_to_128_enabled + reg [2:0] reg_np_counter; + + // Look for NP packets beginning on lower (i.e. unaligned) start + wire mrd_lower = (!(|m_axis_rx_tdata[92:88]) && !m_axis_rx_tdata[94]); + wire mrd_lk_lower = (m_axis_rx_tdata[92:88] == 5'b00001); + wire io_rdwr_lower = (m_axis_rx_tdata[92:88] == 5'b00010); + wire cfg_rdwr_lower = (m_axis_rx_tdata[92:89] == 4'b0010); + wire atomic_lower = ((&m_axis_rx_tdata[91:90]) && m_axis_rx_tdata[94]); + + wire np_pkt_lower = (mrd_lower || + mrd_lk_lower || + io_rdwr_lower || + cfg_rdwr_lower || + atomic_lower) && m_axis_rx_tuser[13]; + + // Look for NP packets beginning on upper (i.e. aligned) start + wire mrd_upper = (!(|m_axis_rx_tdata[28:24]) && !m_axis_rx_tdata[30]); + wire mrd_lk_upper = (m_axis_rx_tdata[28:24] == 5'b00001); + wire io_rdwr_upper = (m_axis_rx_tdata[28:24] == 5'b00010); + wire cfg_rdwr_upper = (m_axis_rx_tdata[28:25] == 4'b0010); + wire atomic_upper = ((&m_axis_rx_tdata[27:26]) && m_axis_rx_tdata[30]); + + wire np_pkt_upper = (mrd_upper || + mrd_lk_upper || + io_rdwr_upper || + cfg_rdwr_upper || + atomic_upper) && !m_axis_rx_tuser[13]; + + wire pkt_accepted = + m_axis_rx_tuser[14] && m_axis_rx_tready && m_axis_rx_tvalid; + + // Increment counter whenever an NP packet leaves the RX pipeline + always @(posedge user_clk) begin + if (user_rst) begin + reg_np_counter <= #TCQ 0; + end + else begin + if((np_pkt_lower || np_pkt_upper) && pkt_accepted) + begin + reg_np_counter <= #TCQ reg_np_counter + 3'h1; + end + end + end + + assign np_counter = reg_np_counter; + end + else begin : np_cntr_to_128_disabled + assign np_counter = 3'h0; + end +endgenerate + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_top.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_top.v new file mode 100644 index 0000000000000000000000000000000000000000..f180020a9361cb3f547e7dc6072ce288789c97a1 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_top.v @@ -0,0 +1,282 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_top.v +// Version : 3.3 +// // +// Description: // +// TRN/AXI4-S Bridge top level module. Instantiates RX and TX modules. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_top #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_FAMILY = "X7", // Targeted FPGA family + parameter C_ROOT_PORT = "FALSE", // PCIe block is in root port mode + parameter C_PM_PRIORITY = "FALSE", // Disable TX packet boundary thrtl + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, // trem/rrem width + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + //---------------------------------------------// + // User Design I/O // + //---------------------------------------------// + + // AXI TX + //----------- + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, // TX data from user + input s_axis_tx_tvalid, // TX data is valid + output s_axis_tx_tready, // TX ready for data + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, // TX strobe byte enables + input s_axis_tx_tlast, // TX data is last + input [3:0] s_axis_tx_tuser, // TX user signals + + // AXI RX + //----------- + output [C_DATA_WIDTH-1:0] m_axis_rx_tdata, // RX data to user + output m_axis_rx_tvalid, // RX data is valid + input m_axis_rx_tready, // RX ready for data + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, // RX strobe byte enables + output m_axis_rx_tlast, // RX data is last + output [21:0] m_axis_rx_tuser, // RX user signals + + // User Misc. + //----------- + input user_turnoff_ok, // Turnoff OK from user + input user_tcfg_gnt, // Send cfg OK from user + + //---------------------------------------------// + // PCIe Block I/O // + //---------------------------------------------// + + // TRN TX + //----------- + output [C_DATA_WIDTH-1:0] trn_td, // TX data from block + output trn_tsof, // TX start of packet + output trn_teof, // TX end of packet + output trn_tsrc_rdy, // TX source ready + input trn_tdst_rdy, // TX destination ready + output trn_tsrc_dsc, // TX source discontinue + output [REM_WIDTH-1:0] trn_trem, // TX remainder + output trn_terrfwd, // TX error forward + output trn_tstr, // TX streaming enable + input [5:0] trn_tbuf_av, // TX buffers available + output trn_tecrc_gen, // TX ECRC generate + + // TRN RX + //----------- + input [127:0] trn_rd, // RX data from block + input trn_rsof, // RX start of packet + input trn_reof, // RX end of packet + input trn_rsrc_rdy, // RX source ready + output trn_rdst_rdy, // RX destination ready + input trn_rsrc_dsc, // RX source discontinue + input [1:0] trn_rrem, // RX remainder + input trn_rerrfwd, // RX error forward + input [6:0] trn_rbar_hit, // RX BAR hit + input trn_recrc_err, // RX ECRC error + + // TRN Misc. + //----------- + input trn_tcfg_req, // TX config request + output trn_tcfg_gnt, // RX config grant + input trn_lnk_up, // PCIe link up + + // 7 Series/Virtex6 PM + //----------- + input [2:0] cfg_pcie_link_state, // Encoded PCIe link state + + // Virtex6 PM + //----------- + input cfg_pm_send_pme_to, // PM send PME turnoff msg + input [1:0] cfg_pmcsr_powerstate, // PMCSR power state + input [31:0] trn_rdllp_data, // RX DLLP data + input trn_rdllp_src_rdy, // RX DLLP source ready + + // Virtex6/Spartan6 PM + //----------- + input cfg_to_turnoff, // Turnoff request + output cfg_turnoff_ok, // Turnoff grant + + // System + //----------- + output [2:0] np_counter, // Non-posted counter + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +//---------------------------------------------// +// RX Data Pipeline // +//---------------------------------------------// + +pcie_7x_0_axi_basic_rx #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .C_FAMILY( C_FAMILY ), + + .TCQ( TCQ ), + .REM_WIDTH( REM_WIDTH ), + .KEEP_WIDTH( KEEP_WIDTH ) +) rx_inst ( + + // Outgoing AXI TX + //----------- + .m_axis_rx_tdata( m_axis_rx_tdata ), + .m_axis_rx_tvalid( m_axis_rx_tvalid ), + .m_axis_rx_tready( m_axis_rx_tready ), + .m_axis_rx_tkeep( m_axis_rx_tkeep ), + .m_axis_rx_tlast( m_axis_rx_tlast ), + .m_axis_rx_tuser( m_axis_rx_tuser ), + + // Incoming TRN RX + //----------- + .trn_rd( trn_rd[C_DATA_WIDTH-1:0] ), + .trn_rsof( trn_rsof ), + .trn_reof( trn_reof ), + .trn_rsrc_rdy( trn_rsrc_rdy ), + .trn_rdst_rdy( trn_rdst_rdy ), + .trn_rsrc_dsc( trn_rsrc_dsc ), + .trn_rrem( trn_rrem[REM_WIDTH-1:0] ), + .trn_rerrfwd( trn_rerrfwd ), + .trn_rbar_hit( trn_rbar_hit ), + .trn_recrc_err( trn_recrc_err ), + + // System + //----------- + .np_counter( np_counter ), + .user_clk( user_clk ), + .user_rst( user_rst ) +); + + + +//---------------------------------------------// +// TX Data Pipeline // +//---------------------------------------------// + +pcie_7x_0_axi_basic_tx #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .C_FAMILY( C_FAMILY ), + .C_ROOT_PORT( C_ROOT_PORT ), + .C_PM_PRIORITY( C_PM_PRIORITY ), + + .TCQ( TCQ ), + .REM_WIDTH( REM_WIDTH ), + .KEEP_WIDTH( KEEP_WIDTH ) +) tx_inst ( + + // Incoming AXI RX + //----------- + .s_axis_tx_tdata( s_axis_tx_tdata ), + .s_axis_tx_tvalid( s_axis_tx_tvalid ), + .s_axis_tx_tready( s_axis_tx_tready ), + .s_axis_tx_tkeep( s_axis_tx_tkeep ), + .s_axis_tx_tlast( s_axis_tx_tlast ), + .s_axis_tx_tuser( s_axis_tx_tuser ), + + // User Misc. + //----------- + .user_turnoff_ok( user_turnoff_ok ), + .user_tcfg_gnt( user_tcfg_gnt ), + + // Outgoing TRN TX + //----------- + .trn_td( trn_td ), + .trn_tsof( trn_tsof ), + .trn_teof( trn_teof ), + .trn_tsrc_rdy( trn_tsrc_rdy ), + .trn_tdst_rdy( trn_tdst_rdy ), + .trn_tsrc_dsc( trn_tsrc_dsc ), + .trn_trem( trn_trem ), + .trn_terrfwd( trn_terrfwd ), + .trn_tstr( trn_tstr ), + .trn_tbuf_av( trn_tbuf_av ), + .trn_tecrc_gen( trn_tecrc_gen ), + + // TRN Misc. + //----------- + .trn_tcfg_req( trn_tcfg_req ), + .trn_tcfg_gnt( trn_tcfg_gnt ), + .trn_lnk_up( trn_lnk_up ), + + // 7 Series/Virtex6 PM + //----------- + .cfg_pcie_link_state( cfg_pcie_link_state ), + + // Virtex6 PM + //----------- + .cfg_pm_send_pme_to( cfg_pm_send_pme_to ), + .cfg_pmcsr_powerstate( cfg_pmcsr_powerstate ), + .trn_rdllp_data( trn_rdllp_data ), + .trn_rdllp_src_rdy( trn_rdllp_src_rdy ), + + // Spartan6 PM + //----------- + .cfg_to_turnoff( cfg_to_turnoff ), + .cfg_turnoff_ok( cfg_turnoff_ok ), + + // System + //----------- + .user_clk( user_clk ), + .user_rst( user_rst ) +); + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_tx.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_tx.v new file mode 100644 index 0000000000000000000000000000000000000000..b1c189987ea40d3346af818dd0baa0ade7803210 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_tx.v @@ -0,0 +1,260 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_tx.v +// Version : 3.3 +// // +// Description: // +// AXI to TRN TX module. Instantiates pipeline and throttle control TX // +// submodules. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_tx // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_tx #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_FAMILY = "X7", // Targeted FPGA family + parameter C_ROOT_PORT = "FALSE", // PCIe block is in root port mode + parameter C_PM_PRIORITY = "FALSE", // Disable TX packet boundary thrtl + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, // trem/rrem width + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + //---------------------------------------------// + // User Design I/O // + //---------------------------------------------// + + // AXI TX + //----------- + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, // TX data from user + input s_axis_tx_tvalid, // TX data is valid + output s_axis_tx_tready, // TX ready for data + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, // TX strobe byte enables + input s_axis_tx_tlast, // TX data is last + input [3:0] s_axis_tx_tuser, // TX user signals + + // User Misc. + //----------- + input user_turnoff_ok, // Turnoff OK from user + input user_tcfg_gnt, // Send cfg OK from user + + //---------------------------------------------// + // PCIe Block I/O // + //---------------------------------------------// + + // TRN TX + //----------- + output [C_DATA_WIDTH-1:0] trn_td, // TX data from block + output trn_tsof, // TX start of packet + output trn_teof, // TX end of packet + output trn_tsrc_rdy, // TX source ready + input trn_tdst_rdy, // TX destination ready + output trn_tsrc_dsc, // TX source discontinue + output [REM_WIDTH-1:0] trn_trem, // TX remainder + output trn_terrfwd, // TX error forward + output trn_tstr, // TX streaming enable + input [5:0] trn_tbuf_av, // TX buffers available + output trn_tecrc_gen, // TX ECRC generate + + // TRN Misc. + //----------- + input trn_tcfg_req, // TX config request + output trn_tcfg_gnt, // RX config grant + input trn_lnk_up, // PCIe link up + + // 7 Series/Virtex6 PM + //----------- + input [2:0] cfg_pcie_link_state, // Encoded PCIe link state + + // Virtex6 PM + //----------- + input cfg_pm_send_pme_to, // PM send PME turnoff msg + input [1:0] cfg_pmcsr_powerstate, // PMCSR power state + input [31:0] trn_rdllp_data, // RX DLLP data + input trn_rdllp_src_rdy, // RX DLLP source ready + + // Virtex6/Spartan6 PM + //----------- + input cfg_to_turnoff, // Turnoff request + output cfg_turnoff_ok, // Turnoff grant + + // System + //----------- + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +wire tready_thrtl; + +//---------------------------------------------// +// TX Data Pipeline // +//---------------------------------------------// + +pcie_7x_0_axi_basic_tx_pipeline #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .C_PM_PRIORITY( C_PM_PRIORITY ), + .TCQ( TCQ ), + + .REM_WIDTH( REM_WIDTH ), + .KEEP_WIDTH( KEEP_WIDTH ) +) tx_pipeline_inst ( + + // Incoming AXI RX + //----------- + .s_axis_tx_tdata( s_axis_tx_tdata ), + .s_axis_tx_tready( s_axis_tx_tready ), + .s_axis_tx_tvalid( s_axis_tx_tvalid ), + .s_axis_tx_tkeep( s_axis_tx_tkeep ), + .s_axis_tx_tlast( s_axis_tx_tlast ), + .s_axis_tx_tuser( s_axis_tx_tuser ), + + // Outgoing TRN TX + //----------- + .trn_td( trn_td ), + .trn_tsof( trn_tsof ), + .trn_teof( trn_teof ), + .trn_tsrc_rdy( trn_tsrc_rdy ), + .trn_tdst_rdy( trn_tdst_rdy ), + .trn_tsrc_dsc( trn_tsrc_dsc ), + .trn_trem( trn_trem ), + .trn_terrfwd( trn_terrfwd ), + .trn_tstr( trn_tstr ), + .trn_tecrc_gen( trn_tecrc_gen ), + .trn_lnk_up( trn_lnk_up ), + + // System + //----------- + .tready_thrtl( tready_thrtl ), + .user_clk( user_clk ), + .user_rst( user_rst ) +); + + +//---------------------------------------------// +// TX Throttle Controller // +//---------------------------------------------// + +generate + if(C_PM_PRIORITY == "FALSE") begin : thrtl_ctl_enabled +pcie_7x_0_axi_basic_tx_thrtl_ctl #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .C_FAMILY( C_FAMILY ), + .C_ROOT_PORT( C_ROOT_PORT ), + .TCQ( TCQ ) + + ) tx_thrl_ctl_inst ( + + // Outgoing AXI TX + //----------- + .s_axis_tx_tdata( s_axis_tx_tdata ), + .s_axis_tx_tvalid( s_axis_tx_tvalid ), + .s_axis_tx_tuser( s_axis_tx_tuser ), + .s_axis_tx_tlast( s_axis_tx_tlast ), + + // User Misc. + //----------- + .user_turnoff_ok( user_turnoff_ok ), + .user_tcfg_gnt( user_tcfg_gnt ), + + // Incoming TRN RX + //----------- + .trn_tbuf_av( trn_tbuf_av ), + .trn_tdst_rdy( trn_tdst_rdy ), + + // TRN Misc. + //----------- + .trn_tcfg_req( trn_tcfg_req ), + .trn_tcfg_gnt( trn_tcfg_gnt ), + .trn_lnk_up( trn_lnk_up ), + + // 7 Seriesq/Virtex6 PM + //----------- + .cfg_pcie_link_state( cfg_pcie_link_state ), + + // Virtex6 PM + //----------- + .cfg_pm_send_pme_to( cfg_pm_send_pme_to ), + .cfg_pmcsr_powerstate( cfg_pmcsr_powerstate ), + .trn_rdllp_data( trn_rdllp_data ), + .trn_rdllp_src_rdy( trn_rdllp_src_rdy ), + + // Spartan6 PM + //----------- + .cfg_to_turnoff( cfg_to_turnoff ), + .cfg_turnoff_ok( cfg_turnoff_ok ), + + // System + //----------- + .tready_thrtl( tready_thrtl ), + .user_clk( user_clk ), + .user_rst( user_rst ) + ); + end + else begin : thrtl_ctl_disabled + assign tready_thrtl = 1'b0; + + assign cfg_turnoff_ok = user_turnoff_ok; + assign trn_tcfg_gnt = user_tcfg_gnt; + end +endgenerate + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v new file mode 100644 index 0000000000000000000000000000000000000000..efa08af68505c9e225d2639b2c6124d69e6866fc --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v @@ -0,0 +1,543 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_tx_pipeline.v +// Version : 3.3 +// // +// Description: // +// AXI to TRN TX pipeline. Converts transmitted data from AXI protocol to // +// TRN. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_tx // +// axi_basic_tx_pipeline // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_tx_pipeline #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_PM_PRIORITY = "FALSE", // Disable TX packet boundary thrtl + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, // trem/rrem width + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + //---------------------------------------------// + // User Design I/O // + //---------------------------------------------// + + // AXI TX + //----------- + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, // TX data from user + input s_axis_tx_tvalid, // TX data is valid + output s_axis_tx_tready, // TX ready for data + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, // TX strobe byte enables + input s_axis_tx_tlast, // TX data is last + input [3:0] s_axis_tx_tuser, // TX user signals + + //---------------------------------------------// + // PCIe Block I/O // + //---------------------------------------------// + + // TRN TX + //----------- + output [C_DATA_WIDTH-1:0] trn_td, // TX data from block + output trn_tsof, // TX start of packet + output trn_teof, // TX end of packet + output trn_tsrc_rdy, // TX source ready + input trn_tdst_rdy, // TX destination ready + output trn_tsrc_dsc, // TX source discontinue + output [REM_WIDTH-1:0] trn_trem, // TX remainder + output trn_terrfwd, // TX error forward + output trn_tstr, // TX streaming enable + output trn_tecrc_gen, // TX ECRC generate + input trn_lnk_up, // PCIe link up + + // System + //----------- + input tready_thrtl, // TREADY from thrtl ctl + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +// Input register stage +reg [C_DATA_WIDTH-1:0] reg_tdata; +reg reg_tvalid; +reg [KEEP_WIDTH-1:0] reg_tkeep; +reg [3:0] reg_tuser; +reg reg_tlast; +reg reg_tready; + +// Pipeline utility signals +reg trn_in_packet; +reg axi_in_packet; +reg flush_axi; +wire disable_trn; +reg reg_disable_trn; + +wire axi_beat_live = s_axis_tx_tvalid && s_axis_tx_tready; +wire axi_end_packet = axi_beat_live && s_axis_tx_tlast; + + +//----------------------------------------------------------------------------// +// Convert TRN data format to AXI data format. AXI is DWORD swapped from TRN. // +// 128-bit: 64-bit: 32-bit: // +// TRN DW0 maps to AXI DW3 TRN DW0 maps to AXI DW1 TNR DW0 maps to AXI DW0 // +// TRN DW1 maps to AXI DW2 TRN DW1 maps to AXI DW0 // +// TRN DW2 maps to AXI DW1 // +// TRN DW3 maps to AXI DW0 // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : td_DW_swap_128 + assign trn_td = {reg_tdata[31:0], + reg_tdata[63:32], + reg_tdata[95:64], + reg_tdata[127:96]}; + end + else if(C_DATA_WIDTH == 64) begin : td_DW_swap_64 + assign trn_td = {reg_tdata[31:0], reg_tdata[63:32]}; + end + else begin : td_DW_swap_32 + assign trn_td = reg_tdata; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Create trn_tsof. If we're not currently in a packet and TVALID goes high, // +// assert TSOF. // +//----------------------------------------------------------------------------// +assign trn_tsof = reg_tvalid && !trn_in_packet; + + +//----------------------------------------------------------------------------// +// Create trn_in_packet. This signal tracks if the TRN interface is currently // +// in the middle of a packet, which is needed to generate trn_tsof // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + trn_in_packet <= #TCQ 1'b0; + end + else begin + if(trn_tsof && trn_tsrc_rdy && trn_tdst_rdy && !trn_teof) begin + trn_in_packet <= #TCQ 1'b1; + end + else if((trn_in_packet && trn_teof && trn_tsrc_rdy) || !trn_lnk_up) begin + trn_in_packet <= #TCQ 1'b0; + end + end +end + + +//----------------------------------------------------------------------------// +// Create axi_in_packet. This signal tracks if the AXI interface is currently // +// in the middle of a packet, which is needed in case the link goes down. // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + axi_in_packet <= #TCQ 1'b0; + end + else begin + if(axi_beat_live && !s_axis_tx_tlast) begin + axi_in_packet <= #TCQ 1'b1; + end + else if(axi_beat_live) begin + axi_in_packet <= #TCQ 1'b0; + end + end +end + + +//----------------------------------------------------------------------------// +// Create disable_trn. This signal asserts when the link goes down and // +// triggers the deassertiong of trn_tsrc_rdy. The deassertion of disable_trn // +// depends on C_PM_PRIORITY, as described below. // +//----------------------------------------------------------------------------// +generate + // In the C_PM_PRIORITY pipeline, we disable the TRN interfacefrom the time + // the link goes down until the the AXI interface is ready to accept packets + // again (via assertion of TREADY). By waiting for TREADY, we allow the + // previous value buffer to fill, so we're ready for any throttling by the + // user or the block. + if(C_PM_PRIORITY == "TRUE") begin : pm_priority_trn_flush + always @(posedge user_clk) begin + if(user_rst) begin + reg_disable_trn <= #TCQ 1'b1; + end + else begin + // When the link goes down, disable the TRN interface. + if(!trn_lnk_up) + begin + reg_disable_trn <= #TCQ 1'b1; + end + + // When the link comes back up and the AXI interface is ready, we can + // release the pipeline and return to normal operation. + else if(!flush_axi && s_axis_tx_tready) begin + reg_disable_trn <= #TCQ 1'b0; + end + end + end + + assign disable_trn = reg_disable_trn; + end + + // In the throttle-controlled pipeline, we don't have a previous value buffer. + // The throttle control mechanism handles TREADY, so all we need to do is + // detect when the link goes down and disable the TRN interface until the link + // comes back up and the AXI interface is finished flushing any packets. + else begin : thrtl_ctl_trn_flush + always @(posedge user_clk) begin + if(user_rst) begin + reg_disable_trn <= #TCQ 1'b0; + end + else begin + // If the link is down and AXI is in packet, disable TRN and look for + // the end of the packet + if(axi_in_packet && !trn_lnk_up && !axi_end_packet) + begin + reg_disable_trn <= #TCQ 1'b1; + end + + // AXI packet is ending, so we're done flushing + else if(axi_end_packet) begin + reg_disable_trn <= #TCQ 1'b0; + end + end + end + + // Disable the TRN interface if link is down or we're still flushing the AXI + // interface. + assign disable_trn = reg_disable_trn || !trn_lnk_up; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Convert STRB to RREM. Here, we are converting the encoding method for the // +// location of the EOF from AXI (tkeep) to TRN flavor (rrem). // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : tkeep_to_trem_128 + //---------------------------------------// + // Conversion table: // + // trem | tkeep // + // [1] [0] | [15:12] [11:8] [7:4] [3:0] // + // ------------------------------------- // + // 1 1 | D3 D2 D1 D0 // + // 1 0 | -- D2 D1 D0 // + // 0 1 | -- -- D1 D0 // + // 0 0 | -- -- -- D0 // + //---------------------------------------// + + wire axi_DW_1 = reg_tkeep[7]; + wire axi_DW_2 = reg_tkeep[11]; + wire axi_DW_3 = reg_tkeep[15]; + assign trn_trem[1] = axi_DW_2; + assign trn_trem[0] = axi_DW_3 || (axi_DW_1 && !axi_DW_2); + end + else if(C_DATA_WIDTH == 64) begin : tkeep_to_trem_64 + assign trn_trem = reg_tkeep[7]; + end + else begin : tkeep_to_trem_32 + assign trn_trem = 1'b0; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Create remaining TRN signals // +//----------------------------------------------------------------------------// +assign trn_teof = reg_tlast; +assign trn_tecrc_gen = reg_tuser[0]; +assign trn_terrfwd = reg_tuser[1]; +assign trn_tstr = reg_tuser[2]; +assign trn_tsrc_dsc = reg_tuser[3]; + + +//----------------------------------------------------------------------------// +// Pipeline stage // +//----------------------------------------------------------------------------// +// We need one of two approaches for the pipeline stage depending on the +// C_PM_PRIORITY parameter. +generate + reg reg_tsrc_rdy; + + // If set to FALSE, that means the user wants to use the TX packet boundary + // throttling feature. Since all Block throttling will now be predicted, we + // can use a simple straight-through pipeline. + if(C_PM_PRIORITY == "FALSE") begin : throttle_ctl_pipeline + always @(posedge user_clk) begin + if(user_rst) begin + reg_tdata <= #TCQ {C_DATA_WIDTH{1'b0}}; + reg_tvalid <= #TCQ 1'b0; + reg_tkeep <= #TCQ {KEEP_WIDTH{1'b0}}; + reg_tlast <= #TCQ 1'b0; + reg_tuser <= #TCQ 4'h0; + reg_tsrc_rdy <= #TCQ 1'b0; + end + else begin + reg_tdata <= #TCQ s_axis_tx_tdata; + reg_tvalid <= #TCQ s_axis_tx_tvalid; + reg_tkeep <= #TCQ s_axis_tx_tkeep; + reg_tlast <= #TCQ s_axis_tx_tlast; + reg_tuser <= #TCQ s_axis_tx_tuser; + + // Hold trn_tsrc_rdy low when flushing a packet. + reg_tsrc_rdy <= #TCQ axi_beat_live && !disable_trn; + end + end + + assign trn_tsrc_rdy = reg_tsrc_rdy; + + // With TX packet boundary throttling, TREADY is pipelined in + // axi_basic_tx_thrtl_ctl and wired through here. + assign s_axis_tx_tready = tready_thrtl; + end + + //**************************************************************************// + + // If C_PM_PRIORITY is set to TRUE, that means the user prefers to have all PM + // functionality intact isntead of TX packet boundary throttling. Now the + // Block could back-pressure at any time, which creates the standard problem + // of potential data loss due to the handshaking latency. Here we need a + // previous value buffer, just like the RX data path. + else begin : pm_prioity_pipeline + reg [C_DATA_WIDTH-1:0] tdata_prev; + reg tvalid_prev; + reg [KEEP_WIDTH-1:0] tkeep_prev; + reg tlast_prev; + reg [3:0] tuser_prev; + reg reg_tdst_rdy; + + wire data_hold; + reg data_prev; + + + //------------------------------------------------------------------------// + // Previous value buffer // + // --------------------- // + // We are inserting a pipeline stage in between AXI and TRN, which causes // + // some issues with handshaking signals trn_tsrc_rdy/s_axis_tx_tready. // + // The added cycle of latency in the path causes the Block to fall behind // + // the AXI interface whenever it throttles. // + // // + // To avoid loss of data, we must keep the previous value of all // + // s_axis_tx_* signals in case the Block throttles. // + //------------------------------------------------------------------------// + always @(posedge user_clk) begin + if(user_rst) begin + tdata_prev <= #TCQ {C_DATA_WIDTH{1'b0}}; + tvalid_prev <= #TCQ 1'b0; + tkeep_prev <= #TCQ {KEEP_WIDTH{1'b0}}; + tlast_prev <= #TCQ 1'b0; + tuser_prev <= #TCQ 4'h 0; + end + else begin + // prev buffer works by checking s_axis_tx_tready. When + // s_axis_tx_tready is asserted, a new value is present on the + // interface. + if(!s_axis_tx_tready) begin + tdata_prev <= #TCQ tdata_prev; + tvalid_prev <= #TCQ tvalid_prev; + tkeep_prev <= #TCQ tkeep_prev; + tlast_prev <= #TCQ tlast_prev; + tuser_prev <= #TCQ tuser_prev; + end + else begin + tdata_prev <= #TCQ s_axis_tx_tdata; + tvalid_prev <= #TCQ s_axis_tx_tvalid; + tkeep_prev <= #TCQ s_axis_tx_tkeep; + tlast_prev <= #TCQ s_axis_tx_tlast; + tuser_prev <= #TCQ s_axis_tx_tuser; + end + end + end + + // Create special buffer which locks in the proper value of TDATA depending + // on whether the user is throttling or not. This buffer has three states: + // + // HOLD state: TDATA maintains its current value + // - the Block has throttled the PCIe block + // PREVIOUS state: the buffer provides the previous value on TDATA + // - the Block has finished throttling, and is a little + // behind the user + // CURRENT state: the buffer passes the current value on TDATA + // - the Block is caught up and ready to receive the + // latest data from the user + always @(posedge user_clk) begin + if(user_rst) begin + reg_tdata <= #TCQ {C_DATA_WIDTH{1'b0}}; + reg_tvalid <= #TCQ 1'b0; + reg_tkeep <= #TCQ {KEEP_WIDTH{1'b0}}; + reg_tlast <= #TCQ 1'b0; + reg_tuser <= #TCQ 4'h0; + + reg_tdst_rdy <= #TCQ 1'b0; + end + else begin + reg_tdst_rdy <= #TCQ trn_tdst_rdy; + + if(!data_hold) begin + // PREVIOUS state + if(data_prev) begin + reg_tdata <= #TCQ tdata_prev; + reg_tvalid <= #TCQ tvalid_prev; + reg_tkeep <= #TCQ tkeep_prev; + reg_tlast <= #TCQ tlast_prev; + reg_tuser <= #TCQ tuser_prev; + end + + // CURRENT state + else begin + reg_tdata <= #TCQ s_axis_tx_tdata; + reg_tvalid <= #TCQ s_axis_tx_tvalid; + reg_tkeep <= #TCQ s_axis_tx_tkeep; + reg_tlast <= #TCQ s_axis_tx_tlast; + reg_tuser <= #TCQ s_axis_tx_tuser; + end + end + // else HOLD state + end + end + + + // Logic to instruct pipeline to hold its value + assign data_hold = trn_tsrc_rdy && !trn_tdst_rdy; + + + // Logic to instruct pipeline to use previous bus values. Always use + // previous value after holding a value. + always @(posedge user_clk) begin + if(user_rst) begin + data_prev <= #TCQ 1'b0; + end + else begin + data_prev <= #TCQ data_hold; + end + end + + + //------------------------------------------------------------------------// + // Create trn_tsrc_rdy. If we're flushing the TRN hold trn_tsrc_rdy low. // + //------------------------------------------------------------------------// + assign trn_tsrc_rdy = reg_tvalid && !disable_trn; + + + //------------------------------------------------------------------------// + // Create TREADY // + //------------------------------------------------------------------------// + always @(posedge user_clk) begin + if(user_rst) begin + reg_tready <= #TCQ 1'b0; + end + else begin + // If the link went down and we need to flush a packet in flight, hold + // TREADY high + if(flush_axi && !axi_end_packet) begin + reg_tready <= #TCQ 1'b1; + end + + // If the link is up, TREADY is as follows: + // TREADY = 1 when trn_tsrc_rdy == 0 + // - While idle, keep the pipeline primed and ready for the next + // packet + // + // TREADY = trn_tdst_rdy when trn_tsrc_rdy == 1 + // - While in packet, throttle pipeline based on state of TRN + else if(trn_lnk_up) begin + reg_tready <= #TCQ trn_tdst_rdy || !trn_tsrc_rdy; + end + + // If the link is down and we're not flushing a packet, hold TREADY low + // wait for link to come back up + else begin + reg_tready <= #TCQ 1'b0; + end + end + end + + assign s_axis_tx_tready = reg_tready; + end + + + //--------------------------------------------------------------------------// + // Create flush_axi. This signal detects if the link goes down while the // + // AXI interface is in packet. In this situation, we need to flush the // + // packet through the AXI interface and discard it. // + //--------------------------------------------------------------------------// + always @(posedge user_clk) begin + if(user_rst) begin + flush_axi <= #TCQ 1'b0; + end + else begin + // If the AXI interface is in packet and the link goes down, purge it. + if(axi_in_packet && !trn_lnk_up && !axi_end_packet) begin + flush_axi <= #TCQ 1'b1; + end + + // The packet is finished, so we're done flushing. + else if(axi_end_packet) begin + flush_axi <= #TCQ 1'b0; + end + end + end +endgenerate + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v new file mode 100644 index 0000000000000000000000000000000000000000..d1feee2008fc064d17dd0259906bc03131d38e6b --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v @@ -0,0 +1,784 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_tx_thrtl_ctl.v +// Version : 3.3 +// // +// Description: // +// TX throttle controller. Anticipates back-pressure from PCIe block and // +// preemptively back-pressures user design (packet boundary throttling). // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_tx // +// axi_basic_tx_thrtl_ctl // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_tx_thrtl_ctl #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_FAMILY = "X7", // Targeted FPGA family + parameter C_ROOT_PORT = "FALSE", // PCIe block is in root port mode + parameter TCQ = 1 // Clock to Q time + ) ( + + // AXI TX + //----------- + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, // TX data from user + input s_axis_tx_tvalid, // TX data is valid + input [3:0] s_axis_tx_tuser, // TX user signals + input s_axis_tx_tlast, // TX data is last + + // User Misc. + //----------- + input user_turnoff_ok, // Turnoff OK from user + input user_tcfg_gnt, // Send cfg OK from user + + // TRN TX + //----------- + input [5:0] trn_tbuf_av, // TX buffers available + input trn_tdst_rdy, // TX destination ready + + // TRN Misc. + //----------- + input trn_tcfg_req, // TX config request + output trn_tcfg_gnt, // TX config grant + input trn_lnk_up, // PCIe link up + + // 7 Series/Virtex6 PM + //----------- + input [2:0] cfg_pcie_link_state, // Encoded PCIe link state + + // Virtex6 PM + //----------- + input cfg_pm_send_pme_to, // PM send PME turnoff msg + input [1:0] cfg_pmcsr_powerstate, // PMCSR power state + input [31:0] trn_rdllp_data, // RX DLLP data + input trn_rdllp_src_rdy, // RX DLLP source ready + + // Virtex6/Spartan6 PM + //----------- + input cfg_to_turnoff, // Turnoff request + output reg cfg_turnoff_ok, // Turnoff grant + + // System + //----------- + output reg tready_thrtl, // TREADY to pipeline + input user_clk, // user clock from block + input user_rst // user reset from block +); + +// Thrtl user when TBUF hits this val +localparam TBUF_AV_MIN = (C_DATA_WIDTH == 128) ? 5 : + (C_DATA_WIDTH == 64) ? 1 : 0; + +// Pause user when TBUF hits this val +localparam TBUF_AV_GAP = TBUF_AV_MIN + 1; + +// GAP pause time - the latency from the time a packet is accepted on the TRN +// interface to the time trn_tbuf_av from the Block will decrement. +localparam TBUF_GAP_TIME = (C_DATA_WIDTH == 128) ? 4 : 1; + +// Latency time from when tcfg_gnt is asserted to when PCIe block will throttle +localparam TCFG_LATENCY_TIME = 2'd2; + +// Number of pipeline stages to delay trn_tcfg_gnt. For V6 128-bit only +localparam TCFG_GNT_PIPE_STAGES = 3; + +// Throttle condition registers and constants +reg lnk_up_thrtl; +wire lnk_up_trig; +wire lnk_up_exit; + +reg tbuf_av_min_thrtl; +wire tbuf_av_min_trig; + +reg tbuf_av_gap_thrtl; +reg [2:0] tbuf_gap_cnt; +wire tbuf_av_gap_trig; +wire tbuf_av_gap_exit; +wire gap_trig_tlast; +wire gap_trig_decr; +wire gap_trig_tcfg; +reg [5:0] tbuf_av_d; + +reg tcfg_req_thrtl; +reg [1:0] tcfg_req_cnt; +reg trn_tdst_rdy_d; +wire tcfg_req_trig; +wire tcfg_req_exit; +reg tcfg_gnt_log; + +wire pre_throttle; +wire reg_throttle; +wire exit_crit; +reg reg_tcfg_gnt; +reg trn_tcfg_req_d; +reg tcfg_gnt_pending; +wire wire_to_turnoff; +reg reg_turnoff_ok; + +reg tready_thrtl_mux; + +localparam LINKSTATE_L0 = 3'b000; +localparam LINKSTATE_PPM_L1 = 3'b001; +localparam LINKSTATE_PPM_L1_TRANS = 3'b101; +localparam LINKSTATE_PPM_L23R_TRANS = 3'b110; +localparam PM_ENTER_L1 = 8'h20; +localparam POWERSTATE_D0 = 2'b00; + +reg ppm_L1_thrtl; +wire ppm_L1_trig; +wire ppm_L1_exit; +reg [2:0] cfg_pcie_link_state_d; +reg trn_rdllp_src_rdy_d; + +reg ppm_L23_thrtl; +wire ppm_L23_trig; +reg cfg_turnoff_ok_pending; + +reg reg_tlast; + +// Throttle control state machine states and registers +localparam IDLE = 0; +localparam THROTTLE = 1; +reg cur_state; +reg next_state; + +reg reg_axi_in_pkt; +wire axi_in_pkt; +wire axi_pkt_ending; +wire axi_throttled; +wire axi_thrtl_ok; +wire tx_ecrc_pause; + +//----------------------------------------------------------------------------// +// THROTTLE REASON: PCIe link is down // +// - When to throttle: trn_lnk_up deasserted // +// - When to stop: trn_tdst_rdy assesrted // +//----------------------------------------------------------------------------// +assign lnk_up_trig = !trn_lnk_up; +assign lnk_up_exit = trn_tdst_rdy; + +always @(posedge user_clk) begin + if(user_rst) begin + lnk_up_thrtl <= #TCQ 1'b1; + end + else begin + if(lnk_up_trig) begin + lnk_up_thrtl <= #TCQ 1'b1; + end + else if(lnk_up_exit) begin + lnk_up_thrtl <= #TCQ 1'b0; + end + end +end + + +//----------------------------------------------------------------------------// +// THROTTLE REASON: Transmit buffers depleted // +// - When to throttle: trn_tbuf_av falls to 0 // +// - When to stop: trn_tbuf_av rises above 0 again // +//----------------------------------------------------------------------------// +assign tbuf_av_min_trig = (trn_tbuf_av <= TBUF_AV_MIN); + +always @(posedge user_clk) begin + if(user_rst) begin + tbuf_av_min_thrtl <= #TCQ 1'b0; + end + else begin + if(tbuf_av_min_trig) begin + tbuf_av_min_thrtl <= #TCQ 1'b1; + end + + // The exit condition for tbuf_av_min_thrtl is !tbuf_av_min_trig + else begin + tbuf_av_min_thrtl <= #TCQ 1'b0; + end + end +end + + +//----------------------------------------------------------------------------// +// THROTTLE REASON: Transmit buffers getting low // +// - When to throttle: trn_tbuf_av falls below "gap" threshold TBUF_AV_GAP // +// - When to stop: after TBUF_GAP_TIME cycles elapse // +// // +// If we're about to run out of transmit buffers, throttle the user for a // +// few clock cycles to give the PCIe block time to catch up. This is // +// needed to compensate for latency in decrementing trn_tbuf_av in the PCIe // +// Block transmit path. // +//----------------------------------------------------------------------------// + +// Detect two different scenarios for buffers getting low: +// 1) If we see a TLAST. a new packet has been inserted into the buffer, and +// we need to pause and let that packet "soak in" +assign gap_trig_tlast = (trn_tbuf_av <= TBUF_AV_GAP) && + s_axis_tx_tvalid && tready_thrtl && s_axis_tx_tlast; + +// 2) Any time tbug_avail decrements to the TBUF_AV_GAP threshold, we need to +// pause and make sure no other packets are about to soak in and cause the +// buffer availability to drop further. +assign gap_trig_decr = (trn_tbuf_av == (TBUF_AV_GAP)) && + (tbuf_av_d == (TBUF_AV_GAP+1)); + +assign gap_trig_tcfg = (tcfg_req_thrtl && tcfg_req_exit); +assign tbuf_av_gap_trig = gap_trig_tlast || gap_trig_decr || gap_trig_tcfg; +assign tbuf_av_gap_exit = (tbuf_gap_cnt == 0); + +always @(posedge user_clk) begin + if(user_rst) begin + tbuf_av_gap_thrtl <= #TCQ 1'b0; + tbuf_gap_cnt <= #TCQ 3'h0; + tbuf_av_d <= #TCQ 6'h00; + end + else begin + if(tbuf_av_gap_trig) begin + tbuf_av_gap_thrtl <= #TCQ 1'b1; + end + else if(tbuf_av_gap_exit) begin + tbuf_av_gap_thrtl <= #TCQ 1'b0; + end + + // tbuf gap counter: + // This logic controls the length of the throttle condition when tbufs are + // getting low. + if(tbuf_av_gap_thrtl && (cur_state == THROTTLE)) begin + if(tbuf_gap_cnt > 0) begin + tbuf_gap_cnt <= #TCQ tbuf_gap_cnt - 3'd1; + end + end + else begin + tbuf_gap_cnt <= #TCQ TBUF_GAP_TIME; + end + + tbuf_av_d <= #TCQ trn_tbuf_av; + end +end + + +//----------------------------------------------------------------------------// +// THROTTLE REASON: Block needs to send a CFG response // +// - When to throttle: trn_tcfg_req and user_tcfg_gnt asserted // +// - When to stop: after trn_tdst_rdy transitions to unasserted // +// // +// If the block needs to send a response to a CFG packet, this will cause // +// the subsequent deassertion of trn_tdst_rdy. When the user design permits, // +// grant permission to the block to service request and throttle the user. // +//----------------------------------------------------------------------------// +assign tcfg_req_trig = trn_tcfg_req && reg_tcfg_gnt; +assign tcfg_req_exit = (tcfg_req_cnt == 2'd0) && !trn_tdst_rdy_d && + trn_tdst_rdy; +always @(posedge user_clk) begin + if(user_rst) begin + tcfg_req_thrtl <= #TCQ 1'b0; + trn_tcfg_req_d <= #TCQ 1'b0; + trn_tdst_rdy_d <= #TCQ 1'b1; + reg_tcfg_gnt <= #TCQ 1'b0; + tcfg_req_cnt <= #TCQ 2'd0; + tcfg_gnt_pending <= #TCQ 1'b0; + end + else begin + if(tcfg_req_trig) begin + tcfg_req_thrtl <= #TCQ 1'b1; + end + else if(tcfg_req_exit) begin + tcfg_req_thrtl <= #TCQ 1'b0; + end + + // We need to wait the appropriate amount of time for the tcfg_gnt to + // "sink in" to the PCIe block. After that, we know that the PCIe block will + // not reassert trn_tdst_rdy until the CFG request has been serviced. If a + // new request is being service (tcfg_gnt_log == 1), then reset the timer. + if((trn_tcfg_req && !trn_tcfg_req_d) || tcfg_gnt_pending) begin + tcfg_req_cnt <= #TCQ TCFG_LATENCY_TIME; + end + else begin + if(tcfg_req_cnt > 0) begin + tcfg_req_cnt <= #TCQ tcfg_req_cnt - 2'd1; + end + end + + // Make sure tcfg_gnt_log pulses once for one clock cycle for every + // cfg packet request. + if(trn_tcfg_req && !trn_tcfg_req_d) begin + tcfg_gnt_pending <= #TCQ 1'b1; + end + else if(tcfg_gnt_log) begin + tcfg_gnt_pending <= #TCQ 1'b0; + end + + trn_tcfg_req_d <= #TCQ trn_tcfg_req; + trn_tdst_rdy_d <= #TCQ trn_tdst_rdy; + reg_tcfg_gnt <= #TCQ user_tcfg_gnt; + end +end + + +//----------------------------------------------------------------------------// +// THROTTLE REASON: Block needs to transition to low power state PPM L1 // +// - When to throttle: appropriate low power state signal asserted // +// (architecture dependent) // +// - When to stop: cfg_pcie_link_state goes to proper value (C_ROOT_PORT // +// dependent) // +// // +// If the block needs to transition to PM state PPM L1, we need to finish // +// up what we're doing and throttle immediately. // +//----------------------------------------------------------------------------// +generate + // PPM L1 signals for 7 Series in RC mode + if((C_FAMILY == "X7") && (C_ROOT_PORT == "TRUE")) begin : x7_L1_thrtl_rp + assign ppm_L1_trig = (cfg_pcie_link_state_d == LINKSTATE_L0) && + (cfg_pcie_link_state == LINKSTATE_PPM_L1_TRANS); + assign ppm_L1_exit = cfg_pcie_link_state == LINKSTATE_PPM_L1; + end + + // PPM L1 signals for 7 Series in EP mode + else if((C_FAMILY == "X7") && (C_ROOT_PORT == "FALSE")) begin : x7_L1_thrtl_ep + assign ppm_L1_trig = (cfg_pcie_link_state_d == LINKSTATE_L0) && + (cfg_pcie_link_state == LINKSTATE_PPM_L1_TRANS); + assign ppm_L1_exit = cfg_pcie_link_state == LINKSTATE_L0; + end + + // PPM L1 signals for V6 in RC mode + else if((C_FAMILY == "V6") && (C_ROOT_PORT == "TRUE")) begin : v6_L1_thrtl_rp + assign ppm_L1_trig = (trn_rdllp_data[31:24] == PM_ENTER_L1) && + trn_rdllp_src_rdy && !trn_rdllp_src_rdy_d; + assign ppm_L1_exit = cfg_pcie_link_state == LINKSTATE_PPM_L1; + end + + // PPM L1 signals for V6 in EP mode + else if((C_FAMILY == "V6") && (C_ROOT_PORT == "FALSE")) begin : v6_L1_thrtl_ep + assign ppm_L1_trig = (cfg_pmcsr_powerstate != POWERSTATE_D0); + assign ppm_L1_exit = cfg_pcie_link_state == LINKSTATE_L0; + end + + // PPM L1 detection not supported for S6 + else begin : s6_L1_thrtl + assign ppm_L1_trig = 1'b0; + assign ppm_L1_exit = 1'b1; + end +endgenerate + +always @(posedge user_clk) begin + if(user_rst) begin + ppm_L1_thrtl <= #TCQ 1'b0; + cfg_pcie_link_state_d <= #TCQ 3'b0; + trn_rdllp_src_rdy_d <= #TCQ 1'b0; + end + else begin + if(ppm_L1_trig) begin + ppm_L1_thrtl <= #TCQ 1'b1; + end + else if(ppm_L1_exit) begin + ppm_L1_thrtl <= #TCQ 1'b0; + end + cfg_pcie_link_state_d <= #TCQ cfg_pcie_link_state; + trn_rdllp_src_rdy_d <= #TCQ trn_rdllp_src_rdy; + end +end + + +//----------------------------------------------------------------------------// +// THROTTLE REASON: Block needs to transition to low power state PPM L2/3 // +// - When to throttle: appropriate PM signal indicates a transition to // +// L2/3 is pending or in progress (family and role dependent) // +// - When to stop: never (the only path out of L2/3 is a full reset) // +// // +// If the block needs to transition to PM state PPM L2/3, we need to finish // +// up what we're doing and throttle when the user gives permission. // +//----------------------------------------------------------------------------// +generate + // PPM L2/3 signals for 7 Series in RC mode + if((C_FAMILY == "X7") && (C_ROOT_PORT == "TRUE")) begin : x7_L23_thrtl_rp + assign ppm_L23_trig = (cfg_pcie_link_state_d == LINKSTATE_PPM_L23R_TRANS); + assign wire_to_turnoff = 1'b0; + end + + // PPM L2/3 signals for V6 in RC mode + else if((C_FAMILY == "V6") && (C_ROOT_PORT == "TRUE")) begin : v6_L23_thrtl_rp + assign ppm_L23_trig = cfg_pm_send_pme_to; + assign wire_to_turnoff = 1'b0; + end + + // PPM L2/3 signals in EP mode + else begin : L23_thrtl_ep + assign ppm_L23_trig = wire_to_turnoff && reg_turnoff_ok; + + // PPM L2/3 signals for 7 Series in EP mode + // For 7 Series, cfg_to_turnoff pulses once when a turnoff request is + // outstanding, so we need a "sticky" register that grabs the request. + if(C_FAMILY == "X7") begin : x7_L23_thrtl_ep + reg reg_to_turnoff; + + always @(posedge user_clk) begin + if(user_rst) begin + reg_to_turnoff <= #TCQ 1'b0; + end + else begin + if(cfg_to_turnoff) begin + reg_to_turnoff <= #TCQ 1'b1; + end + end + end + + assign wire_to_turnoff = reg_to_turnoff; + end + + // PPM L2/3 signals for V6/S6 in EP mode + // In V6 and S6, the to_turnoff signal asserts and remains asserted until + // turnoff_ok is asserted, so a sticky reg is not necessary. + else begin : v6_s6_L23_thrtl_ep + assign wire_to_turnoff = cfg_to_turnoff; + end + + always @(posedge user_clk) begin + if(user_rst) begin + reg_turnoff_ok <= #TCQ 1'b0; + end + else begin + reg_turnoff_ok <= #TCQ user_turnoff_ok; + end + end + end +endgenerate + +always @(posedge user_clk) begin + if(user_rst) begin + ppm_L23_thrtl <= #TCQ 1'b0; + cfg_turnoff_ok_pending <= #TCQ 1'b0; + end + else begin + if(ppm_L23_trig) begin + ppm_L23_thrtl <= #TCQ 1'b1; + end + + // Make sure cfg_turnoff_ok pulses once for one clock cycle for every + // turnoff request. + if(ppm_L23_trig && !ppm_L23_thrtl) begin + cfg_turnoff_ok_pending <= #TCQ 1'b1; + end + else if(cfg_turnoff_ok) begin + cfg_turnoff_ok_pending <= #TCQ 1'b0; + end + end +end + + +//----------------------------------------------------------------------------// +// Create axi_thrtl_ok. This signal determines if it's OK to throttle the // +// user design on the AXI interface. Since TREADY is registered, this signal // +// needs to assert on the cycle ~before~ we actually intend to throttle. // +// The only time it's OK to throttle when TVALID is asserted is on the first // +// beat of a new packet. Therefore, assert axi_thrtl_ok if one of the // +// is true: // +// 1) The user is not in a packet and is not starting one // +// 2) The user is just finishing a packet // +// 3) We're already throttled, so it's OK to continue throttling // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + reg_axi_in_pkt <= #TCQ 1'b0; + end + else begin + if(s_axis_tx_tvalid && s_axis_tx_tlast) begin + reg_axi_in_pkt <= #TCQ 1'b0; + end + else if(tready_thrtl && s_axis_tx_tvalid) begin + reg_axi_in_pkt <= #TCQ 1'b1; + end + end +end + +assign axi_in_pkt = s_axis_tx_tvalid || reg_axi_in_pkt; +assign axi_pkt_ending = s_axis_tx_tvalid && s_axis_tx_tlast; +assign axi_throttled = !tready_thrtl; +assign axi_thrtl_ok = !axi_in_pkt || axi_pkt_ending || axi_throttled; + + +//----------------------------------------------------------------------------// +// Throttle CTL State Machine: // +// Throttle user design when a throttle trigger (or triggers) occur. // +// Keep user throttled until all exit criteria have been met. // +//----------------------------------------------------------------------------// + +// Immediate throttle signal. Used to "pounce" on a throttle opportunity when +// we're seeking one +assign pre_throttle = tbuf_av_min_trig || tbuf_av_gap_trig || lnk_up_trig + || tcfg_req_trig || ppm_L1_trig || ppm_L23_trig; + + +// Registered throttle signals. Used to control throttle state machine +assign reg_throttle = tbuf_av_min_thrtl || tbuf_av_gap_thrtl || lnk_up_thrtl + || tcfg_req_thrtl || ppm_L1_thrtl || ppm_L23_thrtl; + +assign exit_crit = !tbuf_av_min_thrtl && !tbuf_av_gap_thrtl && !lnk_up_thrtl + && !tcfg_req_thrtl && !ppm_L1_thrtl && !ppm_L23_thrtl; + +always @(*) begin + case(cur_state) + // IDLE: in this state we're waiting for a trigger event to occur. As + // soon as an event occurs and the user isn't transmitting a packet, we + // throttle the PCIe block and the user and next state is THROTTLE. + IDLE: begin + if(reg_throttle && axi_thrtl_ok) begin + // Throttle user + tready_thrtl_mux = 1'b0; + next_state = THROTTLE; + + // Assert appropriate grant signal depending on the throttle type. + if(tcfg_req_thrtl) begin + tcfg_gnt_log = 1'b1; // For cfg request, grant the request + cfg_turnoff_ok = 1'b0; // + end + else if(ppm_L23_thrtl) begin + tcfg_gnt_log = 1'b0; // + cfg_turnoff_ok = 1'b1; // For PM request, permit transition + end + else begin + tcfg_gnt_log = 1'b0; // Otherwise do nothing + cfg_turnoff_ok = 1'b0; // + end + end + + // If there's not throttle event, do nothing + else begin + // Throttle user as soon as possible + tready_thrtl_mux = !(axi_thrtl_ok && pre_throttle); + next_state = IDLE; + + tcfg_gnt_log = 1'b0; + cfg_turnoff_ok = 1'b0; + end + end + + // THROTTLE: in this state the user is throttle and we're waiting for + // exit criteria, which tells us that the throttle event is over. When + // the exit criteria is satisfied, de-throttle the user and next state + // is IDLE. + THROTTLE: begin + if(exit_crit) begin + // Dethrottle user + tready_thrtl_mux = !pre_throttle; + next_state = IDLE; + end + else begin + // Throttle user + tready_thrtl_mux = 1'b0; + next_state = THROTTLE; + end + + // Assert appropriate grant signal depending on the throttle type. + if(tcfg_req_thrtl && tcfg_gnt_pending) begin + tcfg_gnt_log = 1'b1; // For cfg request, grant the request + cfg_turnoff_ok = 1'b0; // + end + else if(cfg_turnoff_ok_pending) begin + tcfg_gnt_log = 1'b0; // + cfg_turnoff_ok = 1'b1; // For PM request, permit transition + end + else begin + tcfg_gnt_log = 1'b0; // Otherwise do nothing + cfg_turnoff_ok = 1'b0; // + end + end + + default: begin + tready_thrtl_mux = 1'b0; + next_state = IDLE; + tcfg_gnt_log = 1'b0; + cfg_turnoff_ok = 1'b0; + end + endcase +end + +// Synchronous logic +always @(posedge user_clk) begin + if(user_rst) begin + // Throttle user by default until link comes up + cur_state <= #TCQ THROTTLE; + + reg_tlast <= #TCQ 1'b0; + + tready_thrtl <= #TCQ 1'b0; + end + else begin + cur_state <= #TCQ next_state; + + tready_thrtl <= #TCQ tready_thrtl_mux && !tx_ecrc_pause; + reg_tlast <= #TCQ s_axis_tx_tlast; + end +end + +// For X7, the PCIe block will generate the ECRC for a packet if trn_tecrc_gen +// is asserted at SOF. In this case, the Block needs an extra data beat to +// calculate the ECRC, but only if the following conditions are met: +// 1) there is no empty DWORDS at the end of the packet +// (i.e. packet length % C_DATA_WIDTH == 0) +// +// 2) There isn't a ECRC in the TLP already, as indicated by the TD bit in the +// TLP header +// +// If both conditions are met, the Block will stall the TRN interface for one +// data beat after EOF. We need to predict this stall and preemptively stall the +// User for one beat. +generate + if(C_FAMILY == "X7") begin : ecrc_pause_enabled + wire tx_ecrc_pkt; + reg reg_tx_ecrc_pkt; + + wire [1:0] packet_fmt; + wire packet_td; + wire [2:0] header_len; + wire [9:0] payload_len; + wire [13:0] packet_len; + wire pause_needed; + + // Grab necessary packet fields + assign packet_fmt = s_axis_tx_tdata[30:29]; + assign packet_td = s_axis_tx_tdata[15]; + + // Calculate total packet length + assign header_len = packet_fmt[0] ? 3'd4 : 3'd3; + assign payload_len = packet_fmt[1] ? s_axis_tx_tdata[9:0] : 10'h0; + assign packet_len = {10'h000, header_len} + {4'h0, payload_len}; + + + // Determine if packet a ECRC pause is needed + if(C_DATA_WIDTH == 128) begin : packet_len_check_128 + assign pause_needed = (packet_len[1:0] == 2'b00) && !packet_td; + end + else begin : packet_len_check_64 + assign pause_needed = (packet_len[0] == 1'b0) && !packet_td; + end + + + // Create flag to alert TX pipeline to insert a stall + assign tx_ecrc_pkt = s_axis_tx_tuser[0] && pause_needed && + tready_thrtl && s_axis_tx_tvalid && !reg_axi_in_pkt; + + always @(posedge user_clk) begin + if(user_rst) begin + reg_tx_ecrc_pkt <= #TCQ 1'b0; + end + else begin + if(tx_ecrc_pkt && !s_axis_tx_tlast) begin + reg_tx_ecrc_pkt <= #TCQ 1'b1; + end + else if(tready_thrtl && s_axis_tx_tvalid && s_axis_tx_tlast) begin + reg_tx_ecrc_pkt <= #TCQ 1'b0; + end + end + end + + + // Insert the stall now + assign tx_ecrc_pause = ((tx_ecrc_pkt || reg_tx_ecrc_pkt) && + s_axis_tx_tlast && s_axis_tx_tvalid && tready_thrtl); + + end + else begin : ecrc_pause_disabled + assign tx_ecrc_pause = 1'b0; + end +endgenerate + + +// Logic for 128-bit single cycle bug fix. +// This tcfg_gnt pipeline addresses an issue with 128-bit V6 designs where a +// single cycle packet transmitted simultaneously with an assertion of tcfg_gnt +// from AXI Basic causes the packet to be dropped. The packet drop occurs +// because the 128-bit shim doesn't know about the tcfg_req/gnt, and therefor +// isn't expecting trn_tdst_rdy to go low. Since the 128-bit shim does throttle +// prediction just as we do, it ignores the value of trn_tdst_rdy, and +// ultimately drops the packet when transmitting the packet to the block. +generate + if(C_DATA_WIDTH == 128 && C_FAMILY == "V6") begin : tcfg_gnt_pipeline + genvar stage; + reg tcfg_gnt_pipe [TCFG_GNT_PIPE_STAGES:0]; + + // Create a configurable depth FF delay pipeline + for(stage = 0; stage < TCFG_GNT_PIPE_STAGES; stage = stage + 1) + begin : tcfg_gnt_pipeline_stage + + always @(posedge user_clk) begin + if(user_rst) begin + tcfg_gnt_pipe[stage] <= #TCQ 1'b0; + end + else begin + // For stage 0, insert the actual tcfg_gnt signal from logic + if(stage == 0) begin + tcfg_gnt_pipe[stage] <= #TCQ tcfg_gnt_log; + end + + // For stages 1+, chain together + else begin + tcfg_gnt_pipe[stage] <= #TCQ tcfg_gnt_pipe[stage - 1]; + end + end + end + + // tcfg_gnt output to block assigned the last pipeline stage + assign trn_tcfg_gnt = tcfg_gnt_pipe[TCFG_GNT_PIPE_STAGES-1]; + end + end + else begin : tcfg_gnt_no_pipeline + + // For all other architectures, no pipeline delay needed for tcfg_gnt + assign trn_tcfg_gnt = tcfg_gnt_log; + end +endgenerate + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_core_top.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_core_top.v new file mode 100644 index 0000000000000000000000000000000000000000..36d7ccbe0265480d5623c099e8155265dfd6aa7a --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_core_top.v @@ -0,0 +1,2219 @@ +`timescale 1ps/1ps + +(* CORE_GENERATION_INFO = "pcie_7x_0,pcie_7x_v3_3_18,{LINK_CAP_MAX_LINK_SPEED=2,LINK_CAP_MAX_LINK_WIDTH=1,PCIE_CAP_DEVICE_PORT_TYPE=0000,DEV_CAP_MAX_PAYLOAD_SUPPORTED=2,USER_CLK_FREQ=1,REF_CLK_FREQ=0,MSI_CAP_ON=TRUE,MSI_CAP_MULTIMSGCAP=0,MSI_CAP_MULTIMSG_EXTENSION=0,MSIX_CAP_ON=FALSE,TL_TX_RAM_RADDR_LATENCY=0,TL_TX_RAM_RDATA_LATENCY=2,TL_RX_RAM_RADDR_LATENCY=0,TL_RX_RAM_RDATA_LATENCY=2,TL_RX_RAM_WRITE_LATENCY=0,\ +VC0_TX_LASTPACKET=29,VC0_RX_RAM_LIMIT=7FF,VC0_TOTAL_CREDITS_PH=4,VC0_TOTAL_CREDITS_PD=64,VC0_TOTAL_CREDITS_NPH=4,VC0_TOTAL_CREDITS_NPD=8,VC0_TOTAL_CREDITS_CH=72,VC0_TOTAL_CREDITS_CD=850,VC0_CPL_INFINITE=TRUE,DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT=0,DEV_CAP_EXT_TAG_SUPPORTED=TRUE,LINK_STATUS_SLOT_CLOCK_CONFIG=TRUE,DISABLE_LANE_REVERSAL=TRUE,DISABLE_SCRAMBLING=FALSE,DSN_CAP_ON=TRUE,REVISION_ID=02,VC_CAP_ON=FALSE}" *) +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_core_top # ( + + //CFG SPACE key parameters + parameter CFG_DEV_ID = 16'h8179, + parameter CFG_VEND_ID = 16'h10EC, + + parameter CLASS_CODE = 24'h028000, + + parameter CFG_REV_ID = 8'h01, + + parameter [7:0] HEADER_TYPE = 8'h00, + + parameter CFG_SUBSYS_ID = 16'h8179, + parameter CFG_SUBSYS_VEND_ID = 16'h17AA, + + parameter C_DATA_WIDTH = 64, + parameter EXT_PIPE_SIM = "FALSE", + parameter ALLOW_X8_GEN2 = "FALSE", + parameter PIPE_PIPELINE_STAGES = 1, + + parameter [31:0] BAR0 = 32'hFFFFFF01, + parameter [31:0] BAR1 = 32'h00000000, + parameter [31:0] BAR2 = 32'hFFFFC004, + parameter [31:0] BAR3 = 32'hFFFFFFFF, + parameter [31:0] BAR4 = 32'h00000000, + parameter [31:0] BAR5 = 32'h00000000, + + parameter [31:0] CARDBUS_CIS_POINTER = 32'h00000000, + parameter [31:0] EXPANSION_ROM = 32'h00000000, + parameter [7:0] INTERRUPT_PIN = 8'h1, + + parameter [5:0] EXT_CFG_CAP_PTR = 6'h3F, + parameter [9:0] EXT_CFG_XP_CAP_PTR = 10'h3FF, + + parameter MPS_FORCE = "FALSE", + //drvscan + parameter CPL_TIMEOUT_DISABLE_SUPPORTED = "TRUE", + parameter [3:0] CPL_TIMEOUT_RANGES_SUPPORTED = 4'h0, + + //--------------------------------------------------------- + //---------------CFG SPACE ORDER-------------------- + //--------------------------------------------------------- + //First CAP + parameter [7:0] CAPABILITIES_PTR = 8'h40, + + //PCIE CAP + parameter PCIE_CAP_ON = "TRUE", + parameter [7:0] PCIE_BASE_PTR = 8'h70, + parameter [7:0] PCIE_CAP_NEXTPTR = 8'h00, + + //MSI CAP + parameter MSI_CAP_ON = "TRUE", + parameter [7:0] MSI_BASE_PTR = 8'h50, + parameter [7:0] MSI_CAP_NEXTPTR = 8'h70, + + //MSIX CAP + parameter MSIX_CAP_ON = "FALSE", + parameter [7:0] MSIX_BASE_PTR = 8'hB0, + parameter [7:0] MSIX_CAP_NEXTPTR =8'hD0, + + //PM CAP + parameter PM_CAP_ON = "TRUE", + parameter [7:0] PM_BASE_PTR = 8'h40, + parameter [7:0] PM_CAP_NEXTPTR = 8'h50, + + //RBAR CAP + parameter RBAR_CAP_ON = "FALSE", + parameter [11:0] RBAR_BASE_PTR = 12'h000, + parameter [11:0] RBAR_CAP_NEXTPTR = 12'h000, + + //VC CAP + parameter VC_CAP_ON = "FALSE", + parameter [11:0] VC_BASE_PTR = 12'h140, + parameter [11:0] VC_CAP_NEXTPTR = 12'h160, + + //DSN CAP + parameter DSN_CAP_ON = "TRUE", + parameter [11:0] DSN_BASE_PTR = 12'h140, + parameter [11:0] DSN_CAP_NEXTPTR = 12'h000, + + //AER CAP + parameter AER_CAP_ON = "TRUE", + parameter [11:0] AER_BASE_PTR = 12'h100, + parameter [11:0] AER_CAP_NEXTPTR = 12'h140, + + //VSEC CAP + parameter VSEC_CAP_ON = "FALSE", + parameter [11:0] VSEC_BASE_PTR = 12'h000, + parameter [11:0] VSEC_CAP_NEXTPTR = 12'h000, + + + + //PM CAP + //parameter PM_CAP_ON = "TRUE", + //parameter [7:0] PM_BASE_PTR = 8'h40, + //parameter [7:0] PM_CAP_NEXTPTR = 8'h48, + parameter PM_CAP_VERSION = 3, + parameter PM_CAP_PME_CLOCK = "FALSE", + parameter PM_CAP_AUXCURRENT = 7, + parameter PM_CAP_D1SUPPORT = "TRUE", + parameter PM_CAP_D2SUPPORT = "TRUE", + parameter [4:0] PM_CAP_PMESUPPORT = 5'h1F, + + parameter [7:0] PM_CAP_ID = 8'h01, + + parameter PM_CSR_NOSOFTRST = "TRUE", + parameter PM_CAP_RSVD_04 = 0, + // GET THIS FROM DRVSCAN + parameter PM_CSR_BPCCEN = "FALSE", + parameter PM_CSR_B2B3 = "FALSE", + parameter PM_CAP_DSI = "FALSE", + + parameter [1:0] PM_DATA_SCALE0 = 2'h0, + parameter [1:0] PM_DATA_SCALE1 = 2'h0, + parameter [1:0] PM_DATA_SCALE2 = 2'h0, + parameter [1:0] PM_DATA_SCALE3 = 2'h0, + parameter [1:0] PM_DATA_SCALE4 = 2'h0, + parameter [1:0] PM_DATA_SCALE5 = 2'h0, + parameter [1:0] PM_DATA_SCALE6 = 2'h0, + parameter [1:0] PM_DATA_SCALE7 = 2'h0, + + parameter [7:0] PM_DATA0 = 8'h00, + parameter [7:0] PM_DATA1 = 8'h00, + parameter [7:0] PM_DATA2 = 8'h00, + parameter [7:0] PM_DATA3 = 8'h00, + parameter [7:0] PM_DATA4 = 8'h00, + parameter [7:0] PM_DATA5 = 8'h00, + parameter [7:0] PM_DATA6 = 8'h00, + parameter [7:0] PM_DATA7 = 8'h00, + + + //MSI CAP + //parameter MSI_CAP_ON = "TRUE", + //parameter [7:0] MSI_BASE_PTR = 8'h48, + //parameter [7:0] MSI_CAP_NEXTPTR = 8'h60, + + parameter MSI_CAP_MULTIMSGCAP = 0, + parameter MSI_CAP_MULTIMSG_EXTENSION = 0, + parameter MSI_CAP_64_BIT_ADDR_CAPABLE = "TRUE", + parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE = "FALSE", + + parameter [7:0] MSI_CAP_ID = 8'h05, + + + + //PCIE CAP + //parameter PCIE_CAP_ON = "TRUE", + //parameter [7:0] PCIE_BASE_PTR = 8'h60, + //parameter [7:0] PCIE_CAP_NEXTPTR = 8'h00, + + parameter [3:0] PCIE_CAP_CAPABILITY_VERSION = 4'h2, + parameter [3:0] PCIE_CAP_DEVICE_PORT_TYPE = 4'h0, + parameter PCIE_CAP_SLOT_IMPLEMENTED = "FALSE", + parameter PCIE_CAP_RSVD_15_14 = 0, + + parameter [7:0] PCIE_CAP_CAPABILITY_ID = 8'h10, + parameter PCIE_REVISION = 2, + + + //DEV CAP + parameter integer DEV_CAP_MAX_PAYLOAD_SUPPORTED = 0, + parameter integer DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT = 0, + parameter DEV_CAP_EXT_TAG_SUPPORTED = "FALSE", + parameter integer DEV_CAP_ENDPOINT_L0S_LATENCY = 1, + parameter integer DEV_CAP_ENDPOINT_L1_LATENCY = 1, + parameter DEV_CAP_RSVD_14_12 = 0, + parameter DEV_CAP_ROLE_BASED_ERROR = "TRUE", + parameter DEV_CAP_RSVD_17_16 = 0, + parameter [7:0] DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE = 8'h64, + parameter [1:0] DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE = 2'b01, + parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "FALSE", + parameter DEV_CAP_RSVD_31_29 = 0, + + //DEV CONTROL + parameter DEV_CONTROL_AUX_POWER_SUPPORTED = "FALSE", + parameter DEV_CONTROL_EXT_TAG_DEFAULT = "FALSE", + + + //LINK CAP + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1, + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h1, + parameter LINK_CAP_ASPM_SUPPORT = 3, + parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 3, + parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 3, + parameter LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 3, + parameter LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 3, + parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 6, + parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 6, + parameter LINK_CAP_L1_EXIT_LATENCY_GEN1 = 6, + parameter LINK_CAP_L1_EXIT_LATENCY_GEN2 = 6, + parameter LINK_CAP_CLOCK_POWER_MANAGEMENT = "TRUE", + parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE = "FALSE", + parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP = "FALSE", + parameter LINK_CAP_ASPM_OPTIONALITY = "FALSE", + parameter LINK_CAP_RSVD_23 = 0, + + parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP = "FALSE", + + parameter LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE", + + parameter LINK_CONTROL_RCB = 0, + + + //SLOT CAP + parameter SLOT_CAP_ATT_BUTTON_PRESENT = "FALSE", + parameter SLOT_CAP_ATT_INDICATOR_PRESENT = "FALSE", + parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT = "FALSE", + parameter SLOT_CAP_HOTPLUG_CAPABLE = "FALSE", + parameter SLOT_CAP_HOTPLUG_SURPRISE = "FALSE", + parameter SLOT_CAP_MRL_SENSOR_PRESENT = "FALSE", + parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT = "FALSE", + parameter [12:0] SLOT_CAP_PHYSICAL_SLOT_NUM = 13'h0000, + parameter SLOT_CAP_POWER_CONTROLLER_PRESENT = "FALSE", + parameter SLOT_CAP_POWER_INDICATOR_PRESENT = "FALSE", + parameter SLOT_CAP_SLOT_POWER_LIMIT_SCALE = 0, + parameter [7:0] SLOT_CAP_SLOT_POWER_LIMIT_VALUE = 8'h00, + + //ROOT CAP + parameter ROOT_CAP_CRS_SW_VISIBILITY = "FALSE", + + + //DEV CAP 2 + parameter DEV_CAP2_ARI_FORWARDING_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_CAS128_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING = "FALSE", + parameter DEV_CAP2_LTR_MECHANISM_SUPPORTED = "TRUE", + parameter [1:0] DEV_CAP2_TPH_COMPLETER_SUPPORTED = 2'b00, + parameter DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED = "FALSE", + parameter DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED = "FALSE", + parameter [1:0] DEV_CAP2_MAX_ENDEND_TLP_PREFIXES = 2'h0, + + + //LINK CONTROL2 CAP + parameter [3:0] LINK_CTRL2_TARGET_LINK_SPEED = 4'h0, + parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE = "FALSE", + parameter LINK_CTRL2_DEEMPHASIS = "FALSE", + + + + //MSIX CAP + //parameter MSIX_CAP_ON = "FALSE", + //parameter [7:0] MSIX_BASE_PTR = 8'h9C, + //parameter [7:0] MSIX_CAP_NEXTPTR =8'h00, + parameter [7:0] MSIX_CAP_ID = 8'h11, + parameter MSIX_CAP_PBA_BIR = 4, + parameter [28:0] MSIX_CAP_PBA_OFFSET = 29'h00000100, + parameter MSIX_CAP_TABLE_BIR = 4, + parameter [28:0] MSIX_CAP_TABLE_OFFSET = 29'h0, + parameter [10:0] MSIX_CAP_TABLE_SIZE = 11'h003, + + + //AER CAP + //parameter AER_CAP_ON = "FALSE", + //parameter [11:0] AER_BASE_PTR = 12'h000, + //parameter [11:0] AER_CAP_NEXTPTR = 12'h000, + parameter [15:0] AER_CAP_ID = 16'h0001, + parameter [3:0] AER_CAP_VERSION = 4'h1, + //CONTROL + parameter AER_CAP_ECRC_CHECK_CAPABLE = "TRUE", + parameter AER_CAP_ECRC_GEN_CAPABLE = "FALSE", + //UNDEFINED + parameter AER_CAP_MULTIHEADER = "FALSE", + parameter [23:0] AER_CAP_OPTIONAL_ERR_SUPPORT = 24'h000000, + parameter AER_CAP_PERMIT_ROOTERR_UPDATE = "FALSE", + + + + //VC CAP + //parameter VC_CAP_ON = "FALSE", + //parameter [11:0] VC_BASE_PTR = 12'h000, + //parameter [11:0] VC_CAP_NEXTPTR = 12'h000, + parameter [15:0] VC_CAP_ID = 16'h0002, + parameter [3:0] VC_CAP_VERSION = 4'h1, + //VC Resource Capability Register 0 + parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS = "FALSE", + + //DSN CAP + //parameter DSN_CAP_ON = "TRUE", + //parameter [11:0] DSN_BASE_PTR = 12'h100, + //parameter [11:0] DSN_CAP_NEXTPTR = 12'h10c, + parameter [15:0] DSN_CAP_ID = 16'h0003, + parameter [3:0] DSN_CAP_VERSION = 4'h1, + + + + //RBAR CAP + //parameter RBAR_CAP_ON = "FALSE", + //parameter [11:0] RBAR_BASE_PTR = 12'h000, + //parameter [11:0] RBAR_CAP_NEXTPTR = 12'h000, + parameter [15:0] RBAR_CAP_ID = 16'h0015, + parameter [3:0] RBAR_CAP_VERSION = 4'h1, + + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR0 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR1 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR2 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR3 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR4 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR5 = 5'h00, + parameter [2:0] RBAR_CAP_INDEX0 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX1 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX2 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX3 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX4 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX5 = 3'h0, + + parameter [31:0] RBAR_CAP_SUP0 = 32'h00001, + parameter [31:0] RBAR_CAP_SUP1 = 32'h00001, + parameter [31:0] RBAR_CAP_SUP2 = 32'h00001, + parameter [31:0] RBAR_CAP_SUP3 = 32'h00001, + parameter [31:0] RBAR_CAP_SUP4 = 32'h00001, + parameter [31:0] RBAR_CAP_SUP5 = 32'h00001, + parameter [2:0] RBAR_NUM = 3'h0, + + + //VSEC CAP + //parameter VSEC_CAP_ON = "FALSE", + //parameter [11:0] VSEC_BASE_PTR = 12'h000, + //parameter [11:0] VSEC_CAP_NEXTPTR = 12'h000, + parameter [15:0] VSEC_CAP_ID = 16'h000B, + parameter [3:0] VSEC_CAP_VERSION = 4'h1, + parameter [15:0] VSEC_CAP_HDR_ID = 16'h1234, + parameter [11:0] VSEC_CAP_HDR_LENGTH = 12'h018, + parameter [3:0] VSEC_CAP_HDR_REVISION = 4'h1, + parameter VSEC_CAP_IS_LINK_VISIBLE = "TRUE", + + + + parameter CMD_INTX_IMPLEMENTED = "TRUE", + + + + parameter DISABLE_LANE_REVERSAL = "TRUE", + parameter DISABLE_RX_POISONED_RESP = "FALSE", + parameter DISABLE_SCRAMBLING = "FALSE", + + parameter [10:0] ENABLE_MSG_ROUTE = 11'b00000000000, + parameter ENABLE_RX_TD_ECRC_TRIM = "FALSE", + + parameter [9:0] LAST_CONFIG_DWORD = 10'h3FF, + + parameter [14:0] LL_ACK_TIMEOUT = 15'h0000, + parameter LL_ACK_TIMEOUT_EN = "FALSE", + parameter integer LL_ACK_TIMEOUT_FUNC = 0, + parameter [14:0] LL_REPLAY_TIMEOUT = 15'h0000, + parameter LL_REPLAY_TIMEOUT_EN = "FALSE", + parameter integer LL_REPLAY_TIMEOUT_FUNC = 1, + parameter [5:0] LTSSM_MAX_LINK_WIDTH = 6'h1, + + + + parameter RECRC_CHK = 0, + parameter RECRC_CHK_TRIM = "FALSE", + parameter REF_CLK_FREQ = 0, // 0 - 100 MHz, 1 - 125 MHz, 2 - 250 MHz + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, + parameter KEEP_WIDTH = C_DATA_WIDTH / 8, + + parameter TL_RX_RAM_RADDR_LATENCY = 0, + parameter TL_RX_RAM_WRITE_LATENCY = 0, + parameter TL_TX_RAM_RADDR_LATENCY = 0, + parameter TL_TX_RAM_WRITE_LATENCY = 0, + parameter TL_RX_RAM_RDATA_LATENCY = 2, + parameter TL_TX_RAM_RDATA_LATENCY = 2, + parameter TRN_NP_FC = "TRUE", + parameter TRN_DW = "FALSE", + + parameter UPCONFIG_CAPABLE = "TRUE", + parameter UPSTREAM_FACING = "TRUE", + parameter UR_ATOMIC = "FALSE", + parameter UR_INV_REQ = "TRUE", + parameter UR_PRS_RESPONSE = "TRUE", + parameter USER_CLK_FREQ = 1, + parameter USER_CLK2_DIV2 = "FALSE", + + parameter VC0_CPL_INFINITE = "TRUE", + parameter [12:0] VC0_RX_RAM_LIMIT = 13'h7FF, + parameter VC0_TOTAL_CREDITS_CD = 850, + parameter VC0_TOTAL_CREDITS_CH = 72, + parameter VC0_TOTAL_CREDITS_NPH = 4, + parameter VC0_TOTAL_CREDITS_NPD = 8, + parameter VC0_TOTAL_CREDITS_PD = 64, + parameter VC0_TOTAL_CREDITS_PH = 4, + parameter VC0_TX_LASTPACKET = 29, + + parameter DISABLE_ASPM_L1_TIMER = "FALSE", + parameter DISABLE_BAR_FILTERING = "FALSE", + parameter DISABLE_ID_CHECK = "FALSE", + parameter DISABLE_RX_TC_FILTER = "FALSE", + parameter [7:0] DNSTREAM_LINK_NUM = 8'h00, + + parameter ENTER_RVRY_EI_L0 = "TRUE", + parameter [4:0] INFER_EI = 5'h00, + parameter IS_SWITCH = "FALSE", + + parameter N_FTS_COMCLK_GEN1 = 255, + parameter N_FTS_COMCLK_GEN2 = 255, + parameter N_FTS_GEN1 = 255, + parameter N_FTS_GEN2 = 255, + + parameter PL_AUTO_CONFIG = 0, + parameter PL_FAST_TRAIN = "FALSE", + parameter PCIE_EXT_CLK = "FALSE", + + parameter PCIE_EXT_GT_COMMON = "FALSE", + parameter EXT_CH_GT_DRP = "FALSE", + parameter TRANSCEIVER_CTRL_STATUS_PORTS = "FALSE", + parameter SHARED_LOGIC_IN_CORE = "FALSE", + + parameter SELECT_DLL_IF = "FALSE", + + parameter integer SPARE_BIT0 = 0, + parameter integer SPARE_BIT1 = 0, + parameter integer SPARE_BIT2 = 0, + parameter integer SPARE_BIT3 = 0, + parameter integer SPARE_BIT4 = 0, + parameter integer SPARE_BIT5 = 0, + parameter integer SPARE_BIT6 = 0, + parameter integer SPARE_BIT7 = 0, + parameter integer SPARE_BIT8 = 0, + parameter [7:0] SPARE_BYTE0 = 8'h00, + parameter [7:0] SPARE_BYTE1 = 8'h00, + parameter [7:0] SPARE_BYTE2 = 8'h00, + parameter [7:0] SPARE_BYTE3 = 8'h00, + parameter [31:0] SPARE_WORD0 = 32'h00000000, + parameter [31:0] SPARE_WORD1 = 32'h00000000, + parameter [31:0] SPARE_WORD2 = 32'h00000000, + parameter [31:0] SPARE_WORD3 = 32'h00000000, + + parameter TL_RBYPASS = "FALSE", + parameter TL_TFC_DISABLE = "FALSE", + parameter TL_TX_CHECKS_DISABLE = "FALSE", + parameter EXIT_LOOPBACK_ON_EI = "TRUE", + + parameter CFG_ECRC_ERR_CPLSTAT = 0, + parameter [6:0] CRM_MODULE_RSTS = 7'h00, + + parameter DISABLE_ERR_MSG = "FALSE", + parameter DISABLE_LOCKED_FILTER = "FALSE", + parameter DISABLE_PPM_FILTER = "FALSE", + parameter ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED = "FALSE", + parameter INTERRUPT_STAT_AUTO = "TRUE", + parameter [14:0] PM_ASPML0S_TIMEOUT = 15'h0000, + parameter PM_ASPML0S_TIMEOUT_EN = "FALSE", + parameter PM_ASPML0S_TIMEOUT_FUNC = 0, + parameter PM_ASPM_FASTEXIT = "FALSE", + parameter PM_MF = "FALSE", + + parameter [1:0] RP_AUTO_SPD = 2'h1, + parameter [4:0] RP_AUTO_SPD_LOOPCNT = 5'h1f, + parameter SIM_VERSION = "1.0", + parameter SSL_MESSAGE_AUTO = "FALSE", + parameter TECRC_EP_INV = "FALSE", + parameter UR_CFG1 = "TRUE", + parameter USE_RID_PINS = "FALSE", + parameter PCIE_USE_MODE = "1.0", + parameter PCIE_GT_DEVICE = "GTP", + parameter PCIE_CHAN_BOND = 1, + parameter PCIE_PLL_SEL = "CPLL", + parameter PCIE_ASYNC_EN = "FALSE", + parameter PCIE_TXBUF_EN = "FALSE", + parameter PL_INTERFACE = "TRUE", + parameter CFG_MGMT_IF = "TRUE", + parameter CFG_CTL_IF = "TRUE", + parameter CFG_STATUS_IF = "TRUE", + parameter RCV_MSG_IF = "FALSE", + parameter CFG_FC_IF = "FALSE", + parameter EXT_PIPE_INTERFACE = "FALSE", + + parameter TX_MARGIN_FULL_0 = 7'b1001111, + parameter TX_MARGIN_FULL_1 = 7'b1001110, + parameter TX_MARGIN_FULL_2 = 7'b1001101, + parameter TX_MARGIN_FULL_3 = 7'b1001100, + parameter TX_MARGIN_FULL_4 = 7'b1000011, + parameter TX_MARGIN_LOW_0 = 7'b1000101, + parameter TX_MARGIN_LOW_1 = 7'b1000110, + parameter TX_MARGIN_LOW_2 = 7'b1000011, + parameter TX_MARGIN_LOW_3 = 7'b1000010, + parameter TX_MARGIN_LOW_4 = 7'b1000000, + parameter ENABLE_JTAG_DBG = "FALSE", + parameter REDUCE_OOB_FREQ = "FALSE" +) +( + + //----------------------------------------------------------------------------------------------------------------// + // 1. PCI Express (pci_exp) Interface // + //----------------------------------------------------------------------------------------------------------------// + + // Tx + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_txn, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_txp, + + // Rx + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_rxn, + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_rxp, + + //----------------------------------------------------------------------------------------------------------------// + // 2. Clock & GT COMMON Sharing Interface // + //----------------------------------------------------------------------------------------------------------------// + + // Shared Logic Internal + output int_pclk_out_slave, + output int_pipe_rxusrclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH-1):0] int_rxoutclk_out, + output int_dclk_out, + output int_userclk1_out, + output int_userclk2_out, + output int_oobclk_out, + output int_mmcm_lock_out, + output [1:0] int_qplllock_out, + output [1:0] int_qplloutclk_out, + output [1:0] int_qplloutrefclk_out, + input [(LINK_CAP_MAX_LINK_WIDTH-1):0] int_pclk_sel_slave, + + // Shared Logic External - Clocks + input pipe_pclk_in, + input pipe_rxusrclk_in, + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_rxoutclk_in, + input pipe_dclk_in, + input pipe_userclk1_in, + input pipe_userclk2_in, + input pipe_oobclk_in, + input pipe_mmcm_lock_in, + + output pipe_txoutclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_rxoutclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_pclk_sel_out, + output pipe_gen3_out, + + // Shared Logic External - GT COMMON + + input [11:0] qpll_drp_crscode, + input [17:0] qpll_drp_fsm, + input [1:0] qpll_drp_done, + input [1:0] qpll_drp_reset, + input [1:0] qpll_qplllock, + input [1:0] qpll_qplloutclk, + input [1:0] qpll_qplloutrefclk, + output qpll_qplld, + output [1:0] qpll_qpllreset, + output qpll_drp_clk, + output qpll_drp_rst_n, + output qpll_drp_ovrd, + output qpll_drp_gen3, + output qpll_drp_start, + + //----------------------------------------------------------------------------------------------------------------// + // 3. AXI-S Interface // + //----------------------------------------------------------------------------------------------------------------// + + // Common + output user_clk_out, + output reg user_reset_out, + output user_lnk_up, + output wire user_app_rdy, + + // AXI TX + //----------- + output [5:0] tx_buf_av, + output tx_err_drop, + output tx_cfg_req, + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, + input s_axis_tx_tvalid, + output s_axis_tx_tready, + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, + input s_axis_tx_tlast, + input [3:0] s_axis_tx_tuser, + input tx_cfg_gnt, + + // AXI RX + //----------- + output [C_DATA_WIDTH-1:0] m_axis_rx_tdata, + output m_axis_rx_tvalid, + input m_axis_rx_tready, + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, + output m_axis_rx_tlast, + output [21:0] m_axis_rx_tuser, + input rx_np_ok, + input rx_np_req, + + // Flow Control + output [11:0] fc_cpld, + output [7:0] fc_cplh, + output [11:0] fc_npd, + output [7:0] fc_nph, + output [11:0] fc_pd, + output [7:0] fc_ph, + input [2:0] fc_sel, + + + //----------------------------------------------------------------------------------------------------------------// + // 4. Configuration (CFG) Interface // + //----------------------------------------------------------------------------------------------------------------// + + //------------------------------------------------// + // EP and RP // + //------------------------------------------------// + output wire [31:0] cfg_mgmt_do, + output wire cfg_mgmt_rd_wr_done, + + output wire [15:0] cfg_status, + output wire [15:0] cfg_command, + output wire [15:0] cfg_dstatus, + output wire [15:0] cfg_dcommand, + output wire [15:0] cfg_lstatus, + output wire [15:0] cfg_lcommand, + output wire [15:0] cfg_dcommand2, + output [2:0] cfg_pcie_link_state, + + output wire cfg_pmcsr_pme_en, + output wire [1:0] cfg_pmcsr_powerstate, + output wire cfg_pmcsr_pme_status, + output wire cfg_received_func_lvl_rst, + + // Management Interface + input wire [31:0] cfg_mgmt_di, + input wire [3:0] cfg_mgmt_byte_en, + input wire [9:0] cfg_mgmt_dwaddr, + input wire cfg_mgmt_wr_en, + input wire cfg_mgmt_rd_en, + input wire cfg_mgmt_wr_readonly, + + // Error Reporting Interface + input wire cfg_err_ecrc, + input wire cfg_err_ur, + input wire cfg_err_cpl_timeout, + input wire cfg_err_cpl_unexpect, + input wire cfg_err_cpl_abort, + input wire cfg_err_posted, + input wire cfg_err_cor, + input wire cfg_err_atomic_egress_blocked, + input wire cfg_err_internal_cor, + input wire cfg_err_malformed, + input wire cfg_err_mc_blocked, + input wire cfg_err_poisoned, + input wire cfg_err_norecovery, + input wire [47:0] cfg_err_tlp_cpl_header, + output wire cfg_err_cpl_rdy, + input wire cfg_err_locked, + input wire cfg_err_acs, + input wire cfg_err_internal_uncor, + + input wire cfg_trn_pending, + input wire cfg_pm_halt_aspm_l0s, + input wire cfg_pm_halt_aspm_l1, + input wire cfg_pm_force_state_en, + input wire [1:0] cfg_pm_force_state, + + input wire [63:0] cfg_dsn, + output cfg_msg_received, + output [15:0] cfg_msg_data, + + //------------------------------------------------// + // EP Only // + //------------------------------------------------// + + // Interrupt Interface Signals + input wire cfg_interrupt, + output wire cfg_interrupt_rdy, + input wire cfg_interrupt_assert, + input wire [7:0] cfg_interrupt_di, + output wire [7:0] cfg_interrupt_do, + output wire [2:0] cfg_interrupt_mmenable, + output wire cfg_interrupt_msienable, + output wire cfg_interrupt_msixenable, + output wire cfg_interrupt_msixfm, + input wire cfg_interrupt_stat, + input wire [4:0] cfg_pciecap_interrupt_msgnum, + + + output cfg_to_turnoff, + input wire cfg_turnoff_ok, + output wire [7:0] cfg_bus_number, + output wire [4:0] cfg_device_number, + output wire [2:0] cfg_function_number, + input wire cfg_pm_wake, + + output wire cfg_msg_received_pm_as_nak, + output wire cfg_msg_received_setslotpowerlimit, + + //------------------------------------------------// + // RP Only // + //------------------------------------------------// + input wire cfg_pm_send_pme_to, + input wire [7:0] cfg_ds_bus_number, + input wire [4:0] cfg_ds_device_number, + input wire [2:0] cfg_ds_function_number, + + input wire cfg_mgmt_wr_rw1c_as_rw, + + output wire cfg_bridge_serr_en, + output wire cfg_slot_control_electromech_il_ctl_pulse, + output wire cfg_root_control_syserr_corr_err_en, + output wire cfg_root_control_syserr_non_fatal_err_en, + output wire cfg_root_control_syserr_fatal_err_en, + output wire cfg_root_control_pme_int_en, + output wire cfg_aer_rooterr_corr_err_reporting_en, + output wire cfg_aer_rooterr_non_fatal_err_reporting_en, + output wire cfg_aer_rooterr_fatal_err_reporting_en, + output wire cfg_aer_rooterr_corr_err_received, + output wire cfg_aer_rooterr_non_fatal_err_received, + output wire cfg_aer_rooterr_fatal_err_received, + + output wire cfg_msg_received_err_cor, + output wire cfg_msg_received_err_non_fatal, + output wire cfg_msg_received_err_fatal, + output wire cfg_msg_received_pm_pme, + output wire cfg_msg_received_pme_to_ack, + output wire cfg_msg_received_assert_int_a, + output wire cfg_msg_received_assert_int_b, + output wire cfg_msg_received_assert_int_c, + output wire cfg_msg_received_assert_int_d, + output wire cfg_msg_received_deassert_int_a, + output wire cfg_msg_received_deassert_int_b, + output wire cfg_msg_received_deassert_int_c, + output wire cfg_msg_received_deassert_int_d, + + //----------------------------------------------------------------------------------------------------------------// + // 5. Physical Layer Control and Status (PL) Interface // + //----------------------------------------------------------------------------------------------------------------// + + //------------------------------------------------// + // EP and RP // + //------------------------------------------------// + input wire [1:0] pl_directed_link_change, + input wire [1:0] pl_directed_link_width, + input wire pl_directed_link_speed, + input wire pl_directed_link_auton, + input wire pl_upstream_prefer_deemph, + + + + output wire pl_sel_lnk_rate, + output wire [1:0] pl_sel_lnk_width, + output wire [5:0] pl_ltssm_state, + output wire [1:0] pl_lane_reversal_mode, + + output wire pl_phy_lnk_up, + output wire [2:0] pl_tx_pm_state, + output wire [1:0] pl_rx_pm_state, + + output wire pl_link_upcfg_cap, + output wire pl_link_gen2_cap, + output wire pl_link_partner_gen2_supported, + output wire [2:0] pl_initial_link_width, + + output wire pl_directed_change_done, + + //------------------------------------------------// + // EP Only // + //------------------------------------------------// + output wire pl_received_hot_rst, + + //------------------------------------------------// + // RP Only // + //------------------------------------------------// + input wire pl_transmit_hot_rst, + input wire pl_downstream_deemph_source, + + //----------------------------------------------------------------------------------------------------------------// + // 6. AER interface // + //----------------------------------------------------------------------------------------------------------------// + + input wire [127:0] cfg_err_aer_headerlog, + input wire [4:0] cfg_aer_interrupt_msgnum, + output wire cfg_err_aer_headerlog_set, + output wire cfg_aer_ecrc_check_en, + output wire cfg_aer_ecrc_gen_en, + + //----------------------------------------------------------------------------------------------------------------// + // 7. VC interface // + //----------------------------------------------------------------------------------------------------------------// + + output wire [6:0] cfg_vc_tcvc_map, + + //----------------------------------------------------------------------------------------------------------------// + // PCIe Fast Config: ICAP primitive Interface // + //----------------------------------------------------------------------------------------------------------------// + + input wire icap_clk, + input wire icap_csib, + input wire icap_rdwrb, + input wire [31:0] icap_i, + output wire [31:0] icap_o, + + + + input [ 2:0] pipe_txprbssel, + input [ 2:0] pipe_rxprbssel, + input pipe_txprbsforceerr, + input pipe_rxprbscntreset, + input [ 2:0] pipe_loopback, + + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_rxprbserr, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_txinhibit, + + + output [4:0] pipe_rst_fsm, + output [11:0] pipe_qrst_fsm, + output [(LINK_CAP_MAX_LINK_WIDTH*5)-1:0] pipe_rate_fsm, + output [(LINK_CAP_MAX_LINK_WIDTH*6)-1:0] pipe_sync_fsm_tx, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] pipe_sync_fsm_rx, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] pipe_drp_fsm, + + output pipe_rst_idle, + output pipe_qrst_idle, + output pipe_rate_idle, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_eyescandataerror, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] pipe_rxstatus, + output [(LINK_CAP_MAX_LINK_WIDTH*15)-1:0] pipe_dmonitorout, + + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_cpll_lock, + output [(LINK_CAP_MAX_LINK_WIDTH-1)>>2:0] pipe_qpll_lock, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxpmaresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] pipe_rxbufstatus, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txphaligndone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txphinitdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txdlysresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxphaligndone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxdlysresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxsyncdone, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] pipe_rxdisperr, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] pipe_rxnotintable, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxcommadet, + + output [LINK_CAP_MAX_LINK_WIDTH-1:0] gt_ch_drp_rdy, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_0, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_1, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_2, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_3, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_4, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_5, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_6, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_7, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_8, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_9, + output [31:0] pipe_debug, + + //--------------Channel DRP--------------------------------- + output ext_ch_gt_drpclk, + input [(LINK_CAP_MAX_LINK_WIDTH*9)-1:0] ext_ch_gt_drpaddr, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpen, + input [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0] ext_ch_gt_drpdi, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpwe, + + output [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0] ext_ch_gt_drpdo, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drprdy, + + + //----------------------------------------------------------------------------------------------------------------// + // PCIe Fast Config: STARTUP primitive Interface // + //----------------------------------------------------------------------------------------------------------------// + + // This input should be used when the startup block is generated exteranl to the PCI Express Core + input startup_eos_in, // 1-bit input: This signal should be driven by the EOS output of the STARTUP primitive. + // These inputs and outputs may be use when the startup block is generated internal to the PCI Express Core. + output startup_cfgclk, // 1-bit output: Configuration main clock output + output startup_cfgmclk, // 1-bit output: Configuration internal oscillator clock output + output startup_eos, // 1-bit output: Active high output signal indicating the End Of Startup + output startup_preq, // 1-bit output: PROGRAM request to fabric output + input startup_clk, // 1-bit input: User start-up clock input + input startup_gsr, // 1-bit input: Global Set/Reset input (GSR cannot be used for the port name) + input startup_gts, // 1-bit input: Global 3-state input (GTS cannot be used for the port name) + input startup_keyclearb, // 1-bit input: Clear AES Decrypter Key input from Battery-Backed RAM (BBRAM) + input startup_pack, // 1-bit input: PROGRAM acknowledge input + input startup_usrcclko, // 1-bit input: User CCLK input + input startup_usrcclkts, // 1-bit input: User CCLK 3-state enable input + input startup_usrdoneo, // 1-bit input: User DONE pin output control + input startup_usrdonets, // 1-bit input: User DONE 3-state enable output + + //----------------------------------------------------------------------------------------------------------------// + // 8. PCIe DRP (PCIe DRP) Interface // + //----------------------------------------------------------------------------------------------------------------// + + input wire pcie_drp_clk, + input wire pcie_drp_en, + input wire pcie_drp_we, + input wire [8:0] pcie_drp_addr, + input wire [15:0] pcie_drp_di, + output wire pcie_drp_rdy, + output wire [15:0] pcie_drp_do, + //----------------------------------------------------------------------------------------------------------------// + // PIPE PORTS to TOP Level For PIPE SIMULATION with 3rd Party IP/BFM/Xilinx BFM + //----------------------------------------------------------------------------------------------------------------// + input wire [11:0] common_commands_in, + input wire [24:0] pipe_rx_0_sigs, + input wire [24:0] pipe_rx_1_sigs, + input wire [24:0] pipe_rx_2_sigs, + input wire [24:0] pipe_rx_3_sigs, + input wire [24:0] pipe_rx_4_sigs, + input wire [24:0] pipe_rx_5_sigs, + input wire [24:0] pipe_rx_6_sigs, + input wire [24:0] pipe_rx_7_sigs, + + output wire [11:0] common_commands_out, + output wire [24:0] pipe_tx_0_sigs, + output wire [24:0] pipe_tx_1_sigs, + output wire [24:0] pipe_tx_2_sigs, + output wire [24:0] pipe_tx_3_sigs, + output wire [24:0] pipe_tx_4_sigs, + output wire [24:0] pipe_tx_5_sigs, + output wire [24:0] pipe_tx_6_sigs, + output wire [24:0] pipe_tx_7_sigs, + + //----------------------------------------------------------------------------------------------------------------// + // 9. PCIe ID Interface // + //----------------------------------------------------------------------------------------------------------------// + input wire [15:0] cfg_dev_id_pf0, + input wire [15:0] cfg_ven_id, + input wire [7:0] cfg_rev_id_pf0, + input wire [15:0] cfg_subsys_id_pf0, + input wire [15:0] cfg_subsys_ven_id, + + //----------------------------------------------------------------------------------------------------------------// + // 10. System(SYS) Interface // + //----------------------------------------------------------------------------------------------------------------// + + input wire pipe_mmcm_rst_n, // Async | Async + input wire sys_clk, + input wire sys_rst_n +); + + wire user_clk; + wire user_clk2; + wire pipe_clk; + + wire [15:0] cfg_vend_id_int; + wire [15:0] cfg_dev_id_int; + wire [7:0] cfg_rev_id_int; + wire [15:0] cfg_subsys_vend_id_int; + wire [15:0] cfg_subsys_id_int; + + assign cfg_vend_id_int = CFG_VEND_ID; + assign cfg_dev_id_int = CFG_DEV_ID; + assign cfg_rev_id_int = CFG_REV_ID; + assign cfg_subsys_vend_id_int = CFG_SUBSYS_VEND_ID; + assign cfg_subsys_id_int = CFG_SUBSYS_ID; + + // PIPE Interface Wires + wire phy_rdy_n; + wire pipe_rx0_polarity_gt; + wire pipe_rx1_polarity_gt; + wire pipe_rx2_polarity_gt; + wire pipe_rx3_polarity_gt; + wire pipe_rx4_polarity_gt; + wire pipe_rx5_polarity_gt; + wire pipe_rx6_polarity_gt; + wire pipe_rx7_polarity_gt; + wire pipe_tx_deemph_gt; + wire [2:0] pipe_tx_margin_gt; + wire pipe_tx_rate_gt; + wire pipe_tx_rcvr_det_gt; + wire [1:0] pipe_tx0_char_is_k_gt; + wire pipe_tx0_compliance_gt; + wire [15:0] pipe_tx0_data_gt; + wire pipe_tx0_elec_idle_gt; + wire [1:0] pipe_tx0_powerdown_gt; + wire [1:0] pipe_tx1_char_is_k_gt; + wire pipe_tx1_compliance_gt; + wire [15:0] pipe_tx1_data_gt; + wire pipe_tx1_elec_idle_gt; + wire [1:0] pipe_tx1_powerdown_gt; + wire [1:0] pipe_tx2_char_is_k_gt; + wire pipe_tx2_compliance_gt; + wire [15:0] pipe_tx2_data_gt; + wire pipe_tx2_elec_idle_gt; + wire [1:0] pipe_tx2_powerdown_gt; + wire [1:0] pipe_tx3_char_is_k_gt; + wire pipe_tx3_compliance_gt; + wire [15:0] pipe_tx3_data_gt; + wire pipe_tx3_elec_idle_gt; + wire [1:0] pipe_tx3_powerdown_gt; + wire [1:0] pipe_tx4_char_is_k_gt; + wire pipe_tx4_compliance_gt; + wire [15:0] pipe_tx4_data_gt; + wire pipe_tx4_elec_idle_gt; + wire [1:0] pipe_tx4_powerdown_gt; + wire [1:0] pipe_tx5_char_is_k_gt; + wire pipe_tx5_compliance_gt; + wire [15:0] pipe_tx5_data_gt; + wire pipe_tx5_elec_idle_gt; + wire [1:0] pipe_tx5_powerdown_gt; + wire [1:0] pipe_tx6_char_is_k_gt; + wire pipe_tx6_compliance_gt; + wire [15:0] pipe_tx6_data_gt; + wire pipe_tx6_elec_idle_gt; + wire [1:0] pipe_tx6_powerdown_gt; + wire [1:0] pipe_tx7_char_is_k_gt; + wire pipe_tx7_compliance_gt; + wire [15:0] pipe_tx7_data_gt; + wire pipe_tx7_elec_idle_gt; + wire [1:0] pipe_tx7_powerdown_gt; + + wire pipe_rx0_chanisaligned_gt; + wire [1:0] pipe_rx0_char_is_k_gt; + wire [15:0] pipe_rx0_data_gt; + wire pipe_rx0_elec_idle_gt; + wire pipe_rx0_phy_status_gt; + wire [2:0] pipe_rx0_status_gt; + wire pipe_rx0_valid_gt; + wire pipe_rx1_chanisaligned_gt; + wire [1:0] pipe_rx1_char_is_k_gt; + wire [15:0] pipe_rx1_data_gt; + wire pipe_rx1_elec_idle_gt; + wire pipe_rx1_phy_status_gt; + wire [2:0] pipe_rx1_status_gt; + wire pipe_rx1_valid_gt; + wire pipe_rx2_chanisaligned_gt; + wire [1:0] pipe_rx2_char_is_k_gt; + wire [15:0] pipe_rx2_data_gt; + wire pipe_rx2_elec_idle_gt; + wire pipe_rx2_phy_status_gt; + wire [2:0] pipe_rx2_status_gt; + wire pipe_rx2_valid_gt; + wire pipe_rx3_chanisaligned_gt; + wire [1:0] pipe_rx3_char_is_k_gt; + wire [15:0] pipe_rx3_data_gt; + wire pipe_rx3_elec_idle_gt; + wire pipe_rx3_phy_status_gt; + wire [2:0] pipe_rx3_status_gt; + wire pipe_rx3_valid_gt; + wire pipe_rx4_chanisaligned_gt; + wire [1:0] pipe_rx4_char_is_k_gt; + wire [15:0] pipe_rx4_data_gt; + wire pipe_rx4_elec_idle_gt; + wire pipe_rx4_phy_status_gt; + wire [2:0] pipe_rx4_status_gt; + wire pipe_rx4_valid_gt; + wire pipe_rx5_chanisaligned_gt; + wire [1:0] pipe_rx5_char_is_k_gt; + wire [15:0] pipe_rx5_data_gt; + wire pipe_rx5_elec_idle_gt; + wire pipe_rx5_phy_status_gt; + wire [2:0] pipe_rx5_status_gt; + wire pipe_rx5_valid_gt; + wire pipe_rx6_chanisaligned_gt; + wire [1:0] pipe_rx6_char_is_k_gt; + wire [15:0] pipe_rx6_data_gt; + wire pipe_rx6_elec_idle_gt; + wire pipe_rx6_phy_status_gt; + wire [2:0] pipe_rx6_status_gt; + wire pipe_rx6_valid_gt; + wire pipe_rx7_chanisaligned_gt; + wire [1:0] pipe_rx7_char_is_k_gt; + wire [15:0] pipe_rx7_data_gt; + wire pipe_rx7_elec_idle_gt; + wire pipe_rx7_phy_status_gt; + wire [2:0] pipe_rx7_status_gt; + wire pipe_rx7_valid_gt; + wire [3:0] cfg_link_status_negotiated_width; + wire [1:0] cfg_link_status_current_speed; + + + (* ASYNC_REG = "TRUE" *) reg user_lnk_up_mux; + (* KEEP = "TRUE", ASYNC_REG = "TRUE" *) reg user_lnk_up_int; + reg user_reset_int; + + reg bridge_reset_int; + reg bridge_reset_d; + wire user_rst_n; + reg pl_received_hot_rst_q; + wire pl_received_hot_rst_wire; + wire pl_received_hot_rst_sync; + reg pl_phy_lnk_up_q; + wire pl_phy_lnk_up_wire; + wire pl_phy_lnk_up_sync; + wire sys_or_hot_rst; + wire trn_lnk_up; + + wire [5:0] pl_ltssm_state_int; + wire user_app_rdy_req; + + localparam TCQ = 100; + localparam ENABLE_FAST_SIM_TRAINING = "TRUE"; + + assign user_lnk_up = user_lnk_up_int; + + + assign user_app_rdy = 1'b1; + assign pl_ltssm_state = pl_ltssm_state_int; + assign pl_phy_lnk_up = pl_phy_lnk_up_q; + assign pl_received_hot_rst = pl_received_hot_rst_q; + + // CDC on PCIe block outputs The source clock of these pins is in + // the pipe_clk domain. + xpm_cdc_single #( + .DEST_SYNC_FF (2), + .SRC_INPUT_REG (0) + ) phy_lnk_up_cdc ( + .src_clk (pipe_clk), + .src_in (pl_phy_lnk_up_wire), + .dest_clk (user_clk_out), + .dest_out (pl_phy_lnk_up_sync) + ); + xpm_cdc_single #( + .DEST_SYNC_FF (2), + .SRC_INPUT_REG (0) + ) pl_received_hot_rst_cdc ( + .src_clk (pipe_clk), + .src_in (pl_received_hot_rst_wire), + .dest_clk (user_clk_out), + .dest_out (pl_received_hot_rst_sync) + ); + + // Register block outputs pl_received_hot_rst and phy_lnk_up to ease timing on block output + assign sys_or_hot_rst = !sys_rst_n || pl_received_hot_rst_q; + always @(posedge user_clk_out) + begin + if (!sys_rst_n) begin + pl_received_hot_rst_q <= #TCQ 1'b0; + pl_phy_lnk_up_q <= #TCQ 1'b0; + end else begin + pl_received_hot_rst_q <= #TCQ pl_received_hot_rst_sync; + pl_phy_lnk_up_q <= #TCQ pl_phy_lnk_up_sync; + end + end + // Generate user_lnk_up_mux + always @(posedge user_clk_out) + begin + if (!sys_rst_n) begin + user_lnk_up_mux <= #TCQ 1'b0; + end else begin + user_lnk_up_mux <= #TCQ user_lnk_up_int; + end + end + + always @(posedge user_clk_out) + begin + if (!sys_rst_n) begin + user_lnk_up_int <= #TCQ 1'b0; + end else begin + user_lnk_up_int <= #TCQ trn_lnk_up; + end + end + + + // Generate user_reset_out // + // Once user reset output of PCIE and Phy Layer is active, de-assert reset // + // Only assert reset if system reset or hot reset is seen. Keep AXI backend/user application alive otherwise // + //------------------------------------------------------------------------------------------------------------------// + + always @(posedge user_clk_out or posedge sys_or_hot_rst) + begin + if (sys_or_hot_rst) begin + user_reset_int <= #TCQ 1'b1; + end else if (user_rst_n && pl_phy_lnk_up_q) begin + user_reset_int <= #TCQ 1'b0; + end + end + + // Invert active low reset to active high AXI reset + always @(posedge user_clk_out or posedge sys_or_hot_rst) + begin + if (sys_or_hot_rst) begin + user_reset_out <= #TCQ 1'b1; + end else begin + user_reset_out <= #TCQ user_reset_int; + end + end + always @(posedge user_clk_out or posedge sys_or_hot_rst) + begin + if (sys_or_hot_rst) begin + bridge_reset_int <= #TCQ 1'b1; + end else if (user_rst_n && pl_phy_lnk_up_q) begin + bridge_reset_int <= #TCQ 1'b0; + end + end + + // Invert active low reset to active high AXI reset + always @(posedge user_clk_out or posedge sys_or_hot_rst) + begin + if (sys_or_hot_rst) begin + bridge_reset_d <= #TCQ 1'b1; + end else begin + bridge_reset_d <= #TCQ bridge_reset_int; + end + end + + //------------------------------------------------------------------------------------------------------------------// + // **** PCI Express Core Wrapper **** // + // The PCI Express Core Wrapper includes the following: // + // 1) AXI Streaming Bridge // + // 2) PCIE 2_1 Hard Block // + // 3) PCIE PIPE Interface Pipeline // + //------------------------------------------------------------------------------------------------------------------// +pcie_7x_0_pcie_top # ( + .PIPE_PIPELINE_STAGES ( PIPE_PIPELINE_STAGES ), + .AER_BASE_PTR ( AER_BASE_PTR ), + .AER_CAP_ECRC_CHECK_CAPABLE ( AER_CAP_ECRC_CHECK_CAPABLE ), + .AER_CAP_ECRC_GEN_CAPABLE ( AER_CAP_ECRC_GEN_CAPABLE ), + .AER_CAP_ID ( AER_CAP_ID ), + .AER_CAP_MULTIHEADER ( AER_CAP_MULTIHEADER ), + .AER_CAP_NEXTPTR ( AER_CAP_NEXTPTR ), + .AER_CAP_ON ( AER_CAP_ON ), + .AER_CAP_OPTIONAL_ERR_SUPPORT ( AER_CAP_OPTIONAL_ERR_SUPPORT ), + .AER_CAP_PERMIT_ROOTERR_UPDATE ( AER_CAP_PERMIT_ROOTERR_UPDATE ), + .AER_CAP_VERSION ( AER_CAP_VERSION ), + .ALLOW_X8_GEN2 ( ALLOW_X8_GEN2 ), + .BAR0 ( BAR0 ), + .BAR1 ( BAR1 ), + .BAR2 ( BAR2 ), + .BAR3 ( BAR3 ), + .BAR4 ( BAR4 ), + .BAR5 ( BAR5 ), + .C_DATA_WIDTH ( C_DATA_WIDTH ), + .CAPABILITIES_PTR ( CAPABILITIES_PTR ), + .CARDBUS_CIS_POINTER ( CARDBUS_CIS_POINTER ), + .CFG_ECRC_ERR_CPLSTAT ( CFG_ECRC_ERR_CPLSTAT ), + .CLASS_CODE ( CLASS_CODE ), + .CMD_INTX_IMPLEMENTED ( CMD_INTX_IMPLEMENTED ), + .CPL_TIMEOUT_DISABLE_SUPPORTED ( CPL_TIMEOUT_DISABLE_SUPPORTED ), + .CPL_TIMEOUT_RANGES_SUPPORTED ( CPL_TIMEOUT_RANGES_SUPPORTED ), + .CRM_MODULE_RSTS ( CRM_MODULE_RSTS ), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ), + .DEV_CAP_ENDPOINT_L0S_LATENCY ( DEV_CAP_ENDPOINT_L0S_LATENCY ), + .DEV_CAP_ENDPOINT_L1_LATENCY ( DEV_CAP_ENDPOINT_L1_LATENCY ), + .DEV_CAP_EXT_TAG_SUPPORTED ( DEV_CAP_EXT_TAG_SUPPORTED ), + .DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ( DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ), + .DEV_CAP_MAX_PAYLOAD_SUPPORTED ( DEV_CAP_MAX_PAYLOAD_SUPPORTED ), + .DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ( DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ), + .DEV_CAP_ROLE_BASED_ERROR ( DEV_CAP_ROLE_BASED_ERROR ), + .DEV_CAP_RSVD_14_12 ( DEV_CAP_RSVD_14_12 ), + .DEV_CAP_RSVD_17_16 ( DEV_CAP_RSVD_17_16 ), + .DEV_CAP_RSVD_31_29 ( DEV_CAP_RSVD_31_29 ), + .DEV_CONTROL_AUX_POWER_SUPPORTED ( DEV_CONTROL_AUX_POWER_SUPPORTED ), + .DEV_CONTROL_EXT_TAG_DEFAULT ( DEV_CONTROL_EXT_TAG_DEFAULT ), + .DISABLE_ASPM_L1_TIMER ( DISABLE_ASPM_L1_TIMER ), + .DISABLE_BAR_FILTERING ( DISABLE_BAR_FILTERING ), + .DISABLE_ID_CHECK ( DISABLE_ID_CHECK ), + .DISABLE_LANE_REVERSAL ( DISABLE_LANE_REVERSAL ), + .DISABLE_RX_POISONED_RESP ( DISABLE_RX_POISONED_RESP ), + .DISABLE_RX_TC_FILTER ( DISABLE_RX_TC_FILTER ), + .DISABLE_SCRAMBLING ( DISABLE_SCRAMBLING ), + .DNSTREAM_LINK_NUM ( DNSTREAM_LINK_NUM ), + .DSN_BASE_PTR ( DSN_BASE_PTR ), + .DSN_CAP_ID ( DSN_CAP_ID ), + .DSN_CAP_NEXTPTR ( DSN_CAP_NEXTPTR ), + .DSN_CAP_ON ( DSN_CAP_ON ), + .DSN_CAP_VERSION ( DSN_CAP_VERSION ), + .DEV_CAP2_ARI_FORWARDING_SUPPORTED ( DEV_CAP2_ARI_FORWARDING_SUPPORTED ), + .DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED ( DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED ), + .DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED ( DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED ), + .DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED ( DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED ), + .DEV_CAP2_CAS128_COMPLETER_SUPPORTED ( DEV_CAP2_CAS128_COMPLETER_SUPPORTED ), + .DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED ( DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED ), + .DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED ( DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED ), + .DEV_CAP2_LTR_MECHANISM_SUPPORTED ( DEV_CAP2_LTR_MECHANISM_SUPPORTED ), + .DEV_CAP2_MAX_ENDEND_TLP_PREFIXES ( DEV_CAP2_MAX_ENDEND_TLP_PREFIXES ), + .DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING ( DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING ), + .DEV_CAP2_TPH_COMPLETER_SUPPORTED ( DEV_CAP2_TPH_COMPLETER_SUPPORTED ), + .DISABLE_ERR_MSG ( DISABLE_ERR_MSG ), + .DISABLE_LOCKED_FILTER ( DISABLE_LOCKED_FILTER ), + .DISABLE_PPM_FILTER ( DISABLE_PPM_FILTER ), + .ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED ( ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED ), + .ENABLE_MSG_ROUTE ( ENABLE_MSG_ROUTE ), + .ENABLE_RX_TD_ECRC_TRIM ( ENABLE_RX_TD_ECRC_TRIM ), + .ENTER_RVRY_EI_L0 ( ENTER_RVRY_EI_L0 ), + .EXIT_LOOPBACK_ON_EI ( EXIT_LOOPBACK_ON_EI ), + .EXPANSION_ROM ( EXPANSION_ROM ), + .EXT_CFG_CAP_PTR ( EXT_CFG_CAP_PTR ), + .EXT_CFG_XP_CAP_PTR ( EXT_CFG_XP_CAP_PTR ), + .HEADER_TYPE ( HEADER_TYPE ), + .INFER_EI ( INFER_EI ), + .INTERRUPT_PIN ( INTERRUPT_PIN ), + .INTERRUPT_STAT_AUTO ( INTERRUPT_STAT_AUTO ), + .IS_SWITCH ( IS_SWITCH ), + .LAST_CONFIG_DWORD ( LAST_CONFIG_DWORD ), + .LINK_CAP_ASPM_OPTIONALITY ( LINK_CAP_ASPM_OPTIONALITY ), + .LINK_CAP_ASPM_SUPPORT ( LINK_CAP_ASPM_SUPPORT ), + .LINK_CAP_CLOCK_POWER_MANAGEMENT ( LINK_CAP_CLOCK_POWER_MANAGEMENT ), + .LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ( LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_GEN2 ), + .LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP ( LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP ), + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .LINK_CAP_RSVD_23 ( LINK_CAP_RSVD_23 ), + .LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ( LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ), + .LINK_CONTROL_RCB ( LINK_CONTROL_RCB ), + .LINK_CTRL2_DEEMPHASIS ( LINK_CTRL2_DEEMPHASIS ), + .LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ( LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ), + .LINK_CTRL2_TARGET_LINK_SPEED ( LINK_CTRL2_TARGET_LINK_SPEED ), + .LINK_STATUS_SLOT_CLOCK_CONFIG ( LINK_STATUS_SLOT_CLOCK_CONFIG ), + .LL_ACK_TIMEOUT ( LL_ACK_TIMEOUT ), + .LL_ACK_TIMEOUT_EN ( LL_ACK_TIMEOUT_EN ), + .LL_ACK_TIMEOUT_FUNC ( LL_ACK_TIMEOUT_FUNC ), + .LL_REPLAY_TIMEOUT ( LL_REPLAY_TIMEOUT ), + .LL_REPLAY_TIMEOUT_EN ( LL_REPLAY_TIMEOUT_EN ), + .LL_REPLAY_TIMEOUT_FUNC ( LL_REPLAY_TIMEOUT_FUNC ), + .LTSSM_MAX_LINK_WIDTH ( LTSSM_MAX_LINK_WIDTH ), + .MPS_FORCE ( MPS_FORCE), + .MSI_BASE_PTR ( MSI_BASE_PTR ), + .MSI_CAP_ID ( MSI_CAP_ID ), + .MSI_CAP_MULTIMSGCAP ( MSI_CAP_MULTIMSGCAP ), + .MSI_CAP_MULTIMSG_EXTENSION ( MSI_CAP_MULTIMSG_EXTENSION ), + .MSI_CAP_NEXTPTR ( MSI_CAP_NEXTPTR ), + .MSI_CAP_ON ( MSI_CAP_ON ), + .MSI_CAP_PER_VECTOR_MASKING_CAPABLE ( MSI_CAP_PER_VECTOR_MASKING_CAPABLE ), + .MSI_CAP_64_BIT_ADDR_CAPABLE ( MSI_CAP_64_BIT_ADDR_CAPABLE ), + .MSIX_BASE_PTR ( MSIX_BASE_PTR ), + .MSIX_CAP_ID ( MSIX_CAP_ID ), + .MSIX_CAP_NEXTPTR ( MSIX_CAP_NEXTPTR ), + .MSIX_CAP_ON ( MSIX_CAP_ON ), + .MSIX_CAP_PBA_BIR ( MSIX_CAP_PBA_BIR ), + .MSIX_CAP_PBA_OFFSET ( MSIX_CAP_PBA_OFFSET ), + .MSIX_CAP_TABLE_BIR ( MSIX_CAP_TABLE_BIR ), + .MSIX_CAP_TABLE_OFFSET ( MSIX_CAP_TABLE_OFFSET ), + .MSIX_CAP_TABLE_SIZE ( MSIX_CAP_TABLE_SIZE ), + .N_FTS_COMCLK_GEN1 ( N_FTS_COMCLK_GEN1 ), + .N_FTS_COMCLK_GEN2 ( N_FTS_COMCLK_GEN2 ), + .N_FTS_GEN1 ( N_FTS_GEN1 ), + .N_FTS_GEN2 ( N_FTS_GEN2 ), + .PCIE_BASE_PTR ( PCIE_BASE_PTR ), + .PCIE_CAP_CAPABILITY_ID ( PCIE_CAP_CAPABILITY_ID ), + .PCIE_CAP_CAPABILITY_VERSION ( PCIE_CAP_CAPABILITY_VERSION ), + .PCIE_CAP_DEVICE_PORT_TYPE ( PCIE_CAP_DEVICE_PORT_TYPE ), + .PCIE_CAP_NEXTPTR ( PCIE_CAP_NEXTPTR ), + .PCIE_CAP_ON ( PCIE_CAP_ON ), + .PCIE_CAP_RSVD_15_14 ( PCIE_CAP_RSVD_15_14 ), + .PCIE_CAP_SLOT_IMPLEMENTED ( PCIE_CAP_SLOT_IMPLEMENTED ), + .PCIE_REVISION ( PCIE_REVISION ), + .PL_AUTO_CONFIG ( PL_AUTO_CONFIG ), + + // synthesis translate_off + .PL_FAST_TRAIN ( ENABLE_FAST_SIM_TRAINING ), + // synthesis translate_on + + .PM_ASPML0S_TIMEOUT ( PM_ASPML0S_TIMEOUT ), + .PM_ASPML0S_TIMEOUT_EN ( PM_ASPML0S_TIMEOUT_EN ), + .PM_ASPML0S_TIMEOUT_FUNC ( PM_ASPML0S_TIMEOUT_FUNC ), + .PM_ASPM_FASTEXIT ( PM_ASPM_FASTEXIT ), + .PM_BASE_PTR ( PM_BASE_PTR ), + .PM_CAP_AUXCURRENT ( PM_CAP_AUXCURRENT ), + .PM_CAP_D1SUPPORT ( PM_CAP_D1SUPPORT ), + .PM_CAP_D2SUPPORT ( PM_CAP_D2SUPPORT ), + .PM_CAP_DSI ( PM_CAP_DSI ), + .PM_CAP_ID ( PM_CAP_ID ), + .PM_CAP_NEXTPTR ( PM_CAP_NEXTPTR ), + .PM_CAP_ON ( PM_CAP_ON ), + .PM_CAP_PME_CLOCK ( PM_CAP_PME_CLOCK ), + .PM_CAP_PMESUPPORT ( PM_CAP_PMESUPPORT ), + .PM_CAP_RSVD_04 ( PM_CAP_RSVD_04 ), + .PM_CAP_VERSION ( PM_CAP_VERSION ), + .PM_CSR_B2B3 ( PM_CSR_B2B3 ), + .PM_CSR_BPCCEN ( PM_CSR_BPCCEN ), + .PM_CSR_NOSOFTRST ( PM_CSR_NOSOFTRST ), + .PM_DATA0 ( PM_DATA0 ), + .PM_DATA1 ( PM_DATA1 ), + .PM_DATA2 ( PM_DATA2 ), + .PM_DATA3 ( PM_DATA3 ), + .PM_DATA4 ( PM_DATA4 ), + .PM_DATA5 ( PM_DATA5 ), + .PM_DATA6 ( PM_DATA6 ), + .PM_DATA7 ( PM_DATA7 ), + .PM_DATA_SCALE0 ( PM_DATA_SCALE0 ), + .PM_DATA_SCALE1 ( PM_DATA_SCALE1 ), + .PM_DATA_SCALE2 ( PM_DATA_SCALE2 ), + .PM_DATA_SCALE3 ( PM_DATA_SCALE3 ), + .PM_DATA_SCALE4 ( PM_DATA_SCALE4 ), + .PM_DATA_SCALE5 ( PM_DATA_SCALE5 ), + .PM_DATA_SCALE6 ( PM_DATA_SCALE6 ), + .PM_DATA_SCALE7 ( PM_DATA_SCALE7 ), + .PM_MF ( PM_MF ), + .RBAR_BASE_PTR ( RBAR_BASE_PTR ), + .RBAR_CAP_CONTROL_ENCODEDBAR0 ( RBAR_CAP_CONTROL_ENCODEDBAR0 ), + .RBAR_CAP_CONTROL_ENCODEDBAR1 ( RBAR_CAP_CONTROL_ENCODEDBAR1 ), + .RBAR_CAP_CONTROL_ENCODEDBAR2 ( RBAR_CAP_CONTROL_ENCODEDBAR2 ), + .RBAR_CAP_CONTROL_ENCODEDBAR3 ( RBAR_CAP_CONTROL_ENCODEDBAR3 ), + .RBAR_CAP_CONTROL_ENCODEDBAR4 ( RBAR_CAP_CONTROL_ENCODEDBAR4 ), + .RBAR_CAP_CONTROL_ENCODEDBAR5 ( RBAR_CAP_CONTROL_ENCODEDBAR5 ), + .RBAR_CAP_ID ( RBAR_CAP_ID), + .RBAR_CAP_INDEX0 ( RBAR_CAP_INDEX0 ), + .RBAR_CAP_INDEX1 ( RBAR_CAP_INDEX1 ), + .RBAR_CAP_INDEX2 ( RBAR_CAP_INDEX2 ), + .RBAR_CAP_INDEX3 ( RBAR_CAP_INDEX3 ), + .RBAR_CAP_INDEX4 ( RBAR_CAP_INDEX4 ), + .RBAR_CAP_INDEX5 ( RBAR_CAP_INDEX5 ), + .RBAR_CAP_NEXTPTR ( RBAR_CAP_NEXTPTR ), + .RBAR_CAP_ON ( RBAR_CAP_ON ), + .RBAR_CAP_SUP0 ( RBAR_CAP_SUP0 ), + .RBAR_CAP_SUP1 ( RBAR_CAP_SUP1 ), + .RBAR_CAP_SUP2 ( RBAR_CAP_SUP2 ), + .RBAR_CAP_SUP3 ( RBAR_CAP_SUP3 ), + .RBAR_CAP_SUP4 ( RBAR_CAP_SUP4 ), + .RBAR_CAP_SUP5 ( RBAR_CAP_SUP5 ), + .RBAR_CAP_VERSION ( RBAR_CAP_VERSION ), + .RBAR_NUM ( RBAR_NUM ), + .RECRC_CHK ( RECRC_CHK ), + .RECRC_CHK_TRIM ( RECRC_CHK_TRIM ), + .ROOT_CAP_CRS_SW_VISIBILITY ( ROOT_CAP_CRS_SW_VISIBILITY ), + .RP_AUTO_SPD ( RP_AUTO_SPD ), + .RP_AUTO_SPD_LOOPCNT ( RP_AUTO_SPD_LOOPCNT ), + .SELECT_DLL_IF ( SELECT_DLL_IF ), + .SLOT_CAP_ATT_BUTTON_PRESENT ( SLOT_CAP_ATT_BUTTON_PRESENT ), + .SLOT_CAP_ATT_INDICATOR_PRESENT ( SLOT_CAP_ATT_INDICATOR_PRESENT ), + .SLOT_CAP_ELEC_INTERLOCK_PRESENT ( SLOT_CAP_ELEC_INTERLOCK_PRESENT ), + .SLOT_CAP_HOTPLUG_CAPABLE ( SLOT_CAP_HOTPLUG_CAPABLE ), + .SLOT_CAP_HOTPLUG_SURPRISE ( SLOT_CAP_HOTPLUG_SURPRISE ), + .SLOT_CAP_MRL_SENSOR_PRESENT ( SLOT_CAP_MRL_SENSOR_PRESENT ), + .SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ( SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ), + .SLOT_CAP_PHYSICAL_SLOT_NUM ( SLOT_CAP_PHYSICAL_SLOT_NUM ), + .SLOT_CAP_POWER_CONTROLLER_PRESENT ( SLOT_CAP_POWER_CONTROLLER_PRESENT ), + .SLOT_CAP_POWER_INDICATOR_PRESENT ( SLOT_CAP_POWER_INDICATOR_PRESENT ), + .SLOT_CAP_SLOT_POWER_LIMIT_SCALE ( SLOT_CAP_SLOT_POWER_LIMIT_SCALE ), + .SLOT_CAP_SLOT_POWER_LIMIT_VALUE ( SLOT_CAP_SLOT_POWER_LIMIT_VALUE ), + .SPARE_BIT0 ( SPARE_BIT0 ), + .SPARE_BIT1 ( SPARE_BIT1 ), + .SPARE_BIT2 ( SPARE_BIT2 ), + .SPARE_BIT3 ( SPARE_BIT3 ), + .SPARE_BIT4 ( SPARE_BIT4 ), + .SPARE_BIT5 ( SPARE_BIT5 ), + .SPARE_BIT6 ( SPARE_BIT6 ), + .SPARE_BIT7 ( SPARE_BIT7 ), + .SPARE_BIT8 ( SPARE_BIT8 ), + .SPARE_BYTE0 ( SPARE_BYTE0 ), + .SPARE_BYTE1 ( SPARE_BYTE1 ), + .SPARE_BYTE2 ( SPARE_BYTE2 ), + .SPARE_BYTE3 ( SPARE_BYTE3 ), + .SPARE_WORD0 ( SPARE_WORD0 ), + .SPARE_WORD1 ( SPARE_WORD1 ), + .SPARE_WORD2 ( SPARE_WORD2 ), + .SPARE_WORD3 ( SPARE_WORD3 ), + .SSL_MESSAGE_AUTO ( SSL_MESSAGE_AUTO ), + .TECRC_EP_INV ( TECRC_EP_INV ), + .TL_RBYPASS ( TL_RBYPASS ), + .TL_RX_RAM_RADDR_LATENCY ( TL_RX_RAM_RADDR_LATENCY ), + .TL_RX_RAM_RDATA_LATENCY ( TL_RX_RAM_RDATA_LATENCY ), + .TL_RX_RAM_WRITE_LATENCY ( TL_RX_RAM_WRITE_LATENCY ), + .TL_TFC_DISABLE ( TL_TFC_DISABLE ), + .TL_TX_CHECKS_DISABLE ( TL_TX_CHECKS_DISABLE ), + .TL_TX_RAM_RADDR_LATENCY ( TL_TX_RAM_RADDR_LATENCY ), + .TL_TX_RAM_RDATA_LATENCY ( TL_TX_RAM_RDATA_LATENCY ), + .TL_TX_RAM_WRITE_LATENCY ( TL_TX_RAM_WRITE_LATENCY ), + .TRN_DW ( TRN_DW ), + .TRN_NP_FC ( TRN_NP_FC ), + .UPCONFIG_CAPABLE ( UPCONFIG_CAPABLE ), + .UPSTREAM_FACING ( UPSTREAM_FACING ), + .UR_ATOMIC ( UR_ATOMIC ), + .UR_CFG1 ( UR_CFG1 ), + .UR_INV_REQ ( UR_INV_REQ ), + .UR_PRS_RESPONSE ( UR_PRS_RESPONSE ), + .USER_CLK2_DIV2 ( USER_CLK2_DIV2 ), + .USER_CLK_FREQ ( USER_CLK_FREQ ), + .USE_RID_PINS ( USE_RID_PINS ), + .VC0_CPL_INFINITE ( VC0_CPL_INFINITE ), + .VC0_RX_RAM_LIMIT ( VC0_RX_RAM_LIMIT ), + .VC0_TOTAL_CREDITS_CD ( VC0_TOTAL_CREDITS_CD ), + .VC0_TOTAL_CREDITS_CH ( VC0_TOTAL_CREDITS_CH ), + .VC0_TOTAL_CREDITS_NPD ( VC0_TOTAL_CREDITS_NPD), + .VC0_TOTAL_CREDITS_NPH ( VC0_TOTAL_CREDITS_NPH ), + .VC0_TOTAL_CREDITS_PD ( VC0_TOTAL_CREDITS_PD ), + .VC0_TOTAL_CREDITS_PH ( VC0_TOTAL_CREDITS_PH ), + .VC0_TX_LASTPACKET ( VC0_TX_LASTPACKET ), + .VC_BASE_PTR ( VC_BASE_PTR ), + .VC_CAP_ID ( VC_CAP_ID ), + .VC_CAP_NEXTPTR ( VC_CAP_NEXTPTR ), + .VC_CAP_ON ( VC_CAP_ON ), + .VC_CAP_REJECT_SNOOP_TRANSACTIONS ( VC_CAP_REJECT_SNOOP_TRANSACTIONS ), + .VC_CAP_VERSION ( VC_CAP_VERSION ), + .VSEC_BASE_PTR ( VSEC_BASE_PTR ), + .VSEC_CAP_HDR_ID ( VSEC_CAP_HDR_ID ), + .VSEC_CAP_HDR_LENGTH ( VSEC_CAP_HDR_LENGTH ), + .VSEC_CAP_HDR_REVISION ( VSEC_CAP_HDR_REVISION ), + .VSEC_CAP_ID ( VSEC_CAP_ID ), + .VSEC_CAP_IS_LINK_VISIBLE ( VSEC_CAP_IS_LINK_VISIBLE ), + .VSEC_CAP_NEXTPTR ( VSEC_CAP_NEXTPTR ), + .VSEC_CAP_ON ( VSEC_CAP_ON ), + .VSEC_CAP_VERSION ( VSEC_CAP_VERSION ) + // I/O + ) pcie_top_i ( + + // AXI Interface + .user_clk_out ( user_clk_out ), + .user_reset ( bridge_reset_d ), + .user_lnk_up ( user_lnk_up ), + + .user_rst_n ( user_rst_n ), + .trn_lnk_up ( trn_lnk_up ), + + .tx_buf_av ( tx_buf_av ), + .tx_err_drop ( tx_err_drop ), + .tx_cfg_req ( tx_cfg_req ), + .s_axis_tx_tready ( s_axis_tx_tready ), + .s_axis_tx_tdata ( s_axis_tx_tdata ), + .s_axis_tx_tkeep ( s_axis_tx_tkeep ), + .s_axis_tx_tuser ( s_axis_tx_tuser ), + .s_axis_tx_tlast ( s_axis_tx_tlast ), + .s_axis_tx_tvalid ( s_axis_tx_tvalid ), + .tx_cfg_gnt ( tx_cfg_gnt ), + + .m_axis_rx_tdata ( m_axis_rx_tdata ), + .m_axis_rx_tkeep ( m_axis_rx_tkeep ), + .m_axis_rx_tlast ( m_axis_rx_tlast ), + .m_axis_rx_tvalid ( m_axis_rx_tvalid ), + .m_axis_rx_tready ( m_axis_rx_tready ), + .m_axis_rx_tuser ( m_axis_rx_tuser ), + .rx_np_ok ( rx_np_ok ), + .rx_np_req ( rx_np_req ), + + .fc_cpld ( fc_cpld ), + .fc_cplh ( fc_cplh ), + .fc_npd ( fc_npd ), + .fc_nph ( fc_nph ), + .fc_pd ( fc_pd ), + .fc_ph ( fc_ph ), + .fc_sel ( fc_sel ), + .cfg_turnoff_ok ( cfg_turnoff_ok ), + .cfg_received_func_lvl_rst ( cfg_received_func_lvl_rst ), + + .cm_rst_n ( 1'b1 ), + .func_lvl_rst_n ( 1'b1 ), + .lnk_clk_en ( ), + .cfg_dev_id ( cfg_dev_id_int ), + .cfg_vend_id ( cfg_vend_id_int ), + .cfg_rev_id ( cfg_rev_id_int ), + .cfg_subsys_id ( cfg_subsys_id_int ), + .cfg_subsys_vend_id ( cfg_subsys_vend_id_int ), + .cfg_pciecap_interrupt_msgnum ( cfg_pciecap_interrupt_msgnum ), + + .cfg_bridge_serr_en ( cfg_bridge_serr_en ), + + .cfg_command_bus_master_enable ( ), + .cfg_command_interrupt_disable ( ), + .cfg_command_io_enable ( ), + .cfg_command_mem_enable ( ), + .cfg_command_serr_en ( ), + .cfg_dev_control_aux_power_en ( ), + .cfg_dev_control_corr_err_reporting_en ( ), + .cfg_dev_control_enable_ro ( ), + .cfg_dev_control_ext_tag_en ( ), + .cfg_dev_control_fatal_err_reporting_en ( ), + .cfg_dev_control_max_payload ( ), + .cfg_dev_control_max_read_req ( ), + .cfg_dev_control_non_fatal_reporting_en ( ), + .cfg_dev_control_no_snoop_en ( ), + .cfg_dev_control_phantom_en ( ), + .cfg_dev_control_ur_err_reporting_en ( ), + .cfg_dev_control2_cpl_timeout_dis ( ), + .cfg_dev_control2_cpl_timeout_val ( ), + .cfg_dev_control2_ari_forward_en ( ), + .cfg_dev_control2_atomic_requester_en ( ), + .cfg_dev_control2_atomic_egress_block ( ), + .cfg_dev_control2_ido_req_en ( ), + .cfg_dev_control2_ido_cpl_en ( ), + .cfg_dev_control2_ltr_en ( ), + .cfg_dev_control2_tlp_prefix_block ( ), + .cfg_dev_status_corr_err_detected ( ), + .cfg_dev_status_fatal_err_detected ( ), + .cfg_dev_status_non_fatal_err_detected ( ), + .cfg_dev_status_ur_detected ( ), + + .cfg_mgmt_do ( cfg_mgmt_do ), + .cfg_err_aer_headerlog_set ( cfg_err_aer_headerlog_set ), + .cfg_err_aer_headerlog ( cfg_err_aer_headerlog ), + .cfg_err_cpl_rdy ( cfg_err_cpl_rdy ), + .cfg_interrupt_do ( cfg_interrupt_do ), + .cfg_interrupt_mmenable ( cfg_interrupt_mmenable ), + .cfg_interrupt_msienable ( cfg_interrupt_msienable ), + .cfg_interrupt_msixenable ( cfg_interrupt_msixenable ), + .cfg_interrupt_msixfm ( cfg_interrupt_msixfm ), + .cfg_interrupt_rdy ( cfg_interrupt_rdy ), + .cfg_link_control_rcb ( ), + .cfg_link_control_aspm_control ( ), + .cfg_link_control_auto_bandwidth_int_en ( ), + .cfg_link_control_bandwidth_int_en ( ), + .cfg_link_control_clock_pm_en ( ), + .cfg_link_control_common_clock ( ), + .cfg_link_control_extended_sync ( ), + .cfg_link_control_hw_auto_width_dis ( ), + .cfg_link_control_link_disable ( ), + .cfg_link_control_retrain_link ( ), + .cfg_link_status_auto_bandwidth_status ( ), + .cfg_link_status_bandwidth_status ( ), + .cfg_link_status_current_speed ( cfg_link_status_current_speed ), + .cfg_link_status_dll_active ( ), + .cfg_link_status_link_training ( ), + .cfg_link_status_negotiated_width ( cfg_link_status_negotiated_width ), + .cfg_msg_data ( cfg_msg_data ), + .cfg_msg_received ( cfg_msg_received ), + .cfg_msg_received_assert_int_a ( cfg_msg_received_assert_int_a ), + .cfg_msg_received_assert_int_b ( cfg_msg_received_assert_int_b ), + .cfg_msg_received_assert_int_c ( cfg_msg_received_assert_int_c ), + .cfg_msg_received_assert_int_d ( cfg_msg_received_assert_int_d ), + .cfg_msg_received_deassert_int_a ( cfg_msg_received_deassert_int_a ), + .cfg_msg_received_deassert_int_b ( cfg_msg_received_deassert_int_b ), + .cfg_msg_received_deassert_int_c ( cfg_msg_received_deassert_int_c ), + .cfg_msg_received_deassert_int_d ( cfg_msg_received_deassert_int_d ), + .cfg_msg_received_err_cor ( cfg_msg_received_err_cor ), + .cfg_msg_received_err_fatal ( cfg_msg_received_err_fatal ), + .cfg_msg_received_err_non_fatal ( cfg_msg_received_err_non_fatal ), + .cfg_msg_received_pm_as_nak ( cfg_msg_received_pm_as_nak ), + .cfg_msg_received_pme_to ( ), + .cfg_msg_received_pme_to_ack ( cfg_msg_received_pme_to_ack ), + .cfg_msg_received_pm_pme ( cfg_msg_received_pm_pme ), + .cfg_msg_received_setslotpowerlimit ( cfg_msg_received_setslotpowerlimit ), + .cfg_msg_received_unlock ( ), + .cfg_to_turnoff ( cfg_to_turnoff ), + .cfg_status ( cfg_status ), + .cfg_command ( cfg_command ), + .cfg_dstatus ( cfg_dstatus ), + .cfg_dcommand ( cfg_dcommand ), + .cfg_lstatus ( cfg_lstatus ), + .cfg_lcommand ( cfg_lcommand ), + .cfg_dcommand2 ( cfg_dcommand2 ), + .cfg_pcie_link_state ( cfg_pcie_link_state ), + .cfg_pmcsr_pme_en ( cfg_pmcsr_pme_en ), + .cfg_pmcsr_powerstate ( cfg_pmcsr_powerstate ), + .cfg_pmcsr_pme_status ( cfg_pmcsr_pme_status ), + .cfg_pm_rcv_as_req_l1_n ( ), + .cfg_pm_rcv_enter_l1_n ( ), + .cfg_pm_rcv_enter_l23_n ( ), + .cfg_pm_rcv_req_ack_n ( ), + .cfg_mgmt_rd_wr_done ( cfg_mgmt_rd_wr_done ), + .cfg_slot_control_electromech_il_ctl_pulse ( cfg_slot_control_electromech_il_ctl_pulse ), + .cfg_root_control_syserr_corr_err_en ( cfg_root_control_syserr_corr_err_en ), + .cfg_root_control_syserr_non_fatal_err_en ( cfg_root_control_syserr_non_fatal_err_en ), + .cfg_root_control_syserr_fatal_err_en ( cfg_root_control_syserr_fatal_err_en ), + .cfg_root_control_pme_int_en ( cfg_root_control_pme_int_en), + .cfg_aer_ecrc_check_en ( cfg_aer_ecrc_check_en ), + .cfg_aer_ecrc_gen_en ( cfg_aer_ecrc_gen_en ), + .cfg_aer_rooterr_corr_err_reporting_en ( cfg_aer_rooterr_corr_err_reporting_en ), + .cfg_aer_rooterr_non_fatal_err_reporting_en ( cfg_aer_rooterr_non_fatal_err_reporting_en ), + .cfg_aer_rooterr_fatal_err_reporting_en ( cfg_aer_rooterr_fatal_err_reporting_en ), + .cfg_aer_rooterr_corr_err_received ( cfg_aer_rooterr_corr_err_received ), + .cfg_aer_rooterr_non_fatal_err_received ( cfg_aer_rooterr_non_fatal_err_received ), + .cfg_aer_rooterr_fatal_err_received ( cfg_aer_rooterr_fatal_err_received ), + .cfg_aer_interrupt_msgnum ( cfg_aer_interrupt_msgnum ), + .cfg_transaction ( ), + .cfg_transaction_addr ( ), + .cfg_transaction_type ( ), + .cfg_vc_tcvc_map ( cfg_vc_tcvc_map ), + .cfg_mgmt_byte_en_n ( ~cfg_mgmt_byte_en ), + .cfg_mgmt_di ( cfg_mgmt_di ), + .cfg_dsn ( cfg_dsn ), + .cfg_mgmt_dwaddr ( cfg_mgmt_dwaddr ), + .cfg_err_acs_n ( 1'b1 ), + .cfg_err_cor_n ( ~cfg_err_cor ), + .cfg_err_cpl_abort_n ( ~cfg_err_cpl_abort ), + .cfg_err_cpl_timeout_n ( ~cfg_err_cpl_timeout ), + .cfg_err_cpl_unexpect_n ( ~cfg_err_cpl_unexpect ), + .cfg_err_ecrc_n ( ~cfg_err_ecrc ), + .cfg_err_locked_n ( ~cfg_err_locked ), + .cfg_err_posted_n ( ~cfg_err_posted ), + .cfg_err_tlp_cpl_header ( cfg_err_tlp_cpl_header ), + .cfg_err_ur_n ( ~cfg_err_ur ), + .cfg_err_malformed_n ( ~cfg_err_malformed ), + .cfg_err_poisoned_n ( ~cfg_err_poisoned ), + .cfg_err_atomic_egress_blocked_n ( ~cfg_err_atomic_egress_blocked ), + .cfg_err_mc_blocked_n ( ~cfg_err_mc_blocked ), + .cfg_err_internal_uncor_n ( ~cfg_err_internal_uncor ), + .cfg_err_internal_cor_n ( ~cfg_err_internal_cor ), + .cfg_err_norecovery_n ( ~cfg_err_norecovery ), + + .cfg_interrupt_assert_n ( ~cfg_interrupt_assert ), + .cfg_interrupt_di ( cfg_interrupt_di ), + .cfg_interrupt_n ( ~cfg_interrupt ), + .cfg_interrupt_stat_n ( ~cfg_interrupt_stat ), + .cfg_bus_number ( cfg_bus_number ), + .cfg_device_number ( cfg_device_number ), + .cfg_function_number ( cfg_function_number ), + .cfg_ds_bus_number ( cfg_ds_bus_number ), + .cfg_ds_device_number ( cfg_ds_device_number ), + .cfg_ds_function_number ( cfg_ds_function_number ), + .cfg_pm_send_pme_to_n ( 1'b1 ), + .cfg_pm_wake_n ( ~cfg_pm_wake ), + .cfg_pm_halt_aspm_l0s_n ( ~cfg_pm_halt_aspm_l0s ), + .cfg_pm_halt_aspm_l1_n ( ~cfg_pm_halt_aspm_l1 ), + .cfg_pm_force_state_en_n ( ~cfg_pm_force_state_en), + .cfg_pm_force_state ( cfg_pm_force_state ), + .cfg_force_mps ( 3'b0 ), + .cfg_force_common_clock_off ( 1'b0 ), + .cfg_force_extended_sync_on ( 1'b0 ), + .cfg_port_number ( 8'b0 ), + .cfg_mgmt_rd_en_n ( ~cfg_mgmt_rd_en ), + .cfg_trn_pending ( cfg_trn_pending ), + .cfg_mgmt_wr_en_n ( ~cfg_mgmt_wr_en ), + .cfg_mgmt_wr_readonly_n ( ~cfg_mgmt_wr_readonly ), + .cfg_mgmt_wr_rw1c_as_rw_n ( ~cfg_mgmt_wr_rw1c_as_rw ), + + .pl_initial_link_width ( pl_initial_link_width ), + .pl_lane_reversal_mode ( pl_lane_reversal_mode ), + .pl_link_gen2_cap ( pl_link_gen2_cap ), + .pl_link_partner_gen2_supported ( pl_link_partner_gen2_supported ), + .pl_link_upcfg_cap ( pl_link_upcfg_cap ), + .pl_ltssm_state ( pl_ltssm_state_int ), + .pl_phy_lnk_up ( pl_phy_lnk_up_wire ), + .pl_received_hot_rst ( pl_received_hot_rst_wire ), + .pl_rx_pm_state ( pl_rx_pm_state ), + .pl_sel_lnk_rate ( pl_sel_lnk_rate ), + .pl_sel_lnk_width ( pl_sel_lnk_width ), + .pl_tx_pm_state ( pl_tx_pm_state ), + .pl_directed_link_auton ( pl_directed_link_auton ), + .pl_directed_link_change ( pl_directed_link_change ), + .pl_directed_link_speed ( pl_directed_link_speed ), + .pl_directed_link_width ( pl_directed_link_width ), + .pl_downstream_deemph_source ( pl_downstream_deemph_source ), + .pl_upstream_prefer_deemph ( pl_upstream_prefer_deemph ), + .pl_transmit_hot_rst ( pl_transmit_hot_rst ), + .pl_directed_ltssm_new_vld ( 1'b0 ), + .pl_directed_ltssm_new ( 6'b0 ), + .pl_directed_ltssm_stall ( 1'b0 ), + .pl_directed_change_done ( pl_directed_change_done ), + + .phy_rdy_n ( phy_rdy_n ), + .dbg_sclr_a ( ), + .dbg_sclr_b ( ), + .dbg_sclr_c ( ), + .dbg_sclr_d ( ), + .dbg_sclr_e ( ), + .dbg_sclr_f ( ), + .dbg_sclr_g ( ), + .dbg_sclr_h ( ), + .dbg_sclr_i ( ), + .dbg_sclr_j ( ), + .dbg_sclr_k ( ), + + .dbg_vec_a ( ), + .dbg_vec_b ( ), + .dbg_vec_c ( ), + .pl_dbg_vec ( ), + .trn_rdllp_data ( ), + .trn_rdllp_src_rdy ( ), + .dbg_mode ( 2'b0 ), + .dbg_sub_mode ( 1'b0 ), + .pl_dbg_mode ( 3'b0 ), + + .drp_clk ( pcie_drp_clk ), + .drp_do ( pcie_drp_do ), + .drp_rdy ( pcie_drp_rdy ), + .drp_addr ( pcie_drp_addr ), + .drp_en ( pcie_drp_en ), + .drp_di ( pcie_drp_di ), + .drp_we ( pcie_drp_we ), + + // Pipe Interface + + .pipe_clk ( pipe_clk ), + .user_clk ( user_clk ), + .user_clk2 ( user_clk2 ), + .pipe_rx0_polarity_gt ( pipe_rx0_polarity_gt ), + .pipe_rx1_polarity_gt ( pipe_rx1_polarity_gt ), + .pipe_rx2_polarity_gt ( pipe_rx2_polarity_gt ), + .pipe_rx3_polarity_gt ( pipe_rx3_polarity_gt ), + .pipe_rx4_polarity_gt ( pipe_rx4_polarity_gt ), + .pipe_rx5_polarity_gt ( pipe_rx5_polarity_gt ), + .pipe_rx6_polarity_gt ( pipe_rx6_polarity_gt ), + .pipe_rx7_polarity_gt ( pipe_rx7_polarity_gt ), + .pipe_tx_deemph_gt ( pipe_tx_deemph_gt ), + .pipe_tx_margin_gt ( pipe_tx_margin_gt ), + .pipe_tx_rate_gt ( pipe_tx_rate_gt ), + .pipe_tx_rcvr_det_gt ( pipe_tx_rcvr_det_gt ), + .pipe_tx0_char_is_k_gt ( pipe_tx0_char_is_k_gt ), + .pipe_tx0_compliance_gt ( pipe_tx0_compliance_gt ), + .pipe_tx0_data_gt ( pipe_tx0_data_gt ), + .pipe_tx0_elec_idle_gt ( pipe_tx0_elec_idle_gt ), + .pipe_tx0_powerdown_gt ( pipe_tx0_powerdown_gt ), + .pipe_tx1_char_is_k_gt ( pipe_tx1_char_is_k_gt ), + .pipe_tx1_compliance_gt ( pipe_tx1_compliance_gt ), + .pipe_tx1_data_gt ( pipe_tx1_data_gt ), + .pipe_tx1_elec_idle_gt ( pipe_tx1_elec_idle_gt ), + .pipe_tx1_powerdown_gt ( pipe_tx1_powerdown_gt ), + .pipe_tx2_char_is_k_gt ( pipe_tx2_char_is_k_gt ), + .pipe_tx2_compliance_gt ( pipe_tx2_compliance_gt ), + .pipe_tx2_data_gt ( pipe_tx2_data_gt ), + .pipe_tx2_elec_idle_gt ( pipe_tx2_elec_idle_gt ), + .pipe_tx2_powerdown_gt ( pipe_tx2_powerdown_gt ), + .pipe_tx3_char_is_k_gt ( pipe_tx3_char_is_k_gt ), + .pipe_tx3_compliance_gt ( pipe_tx3_compliance_gt ), + .pipe_tx3_data_gt ( pipe_tx3_data_gt ), + .pipe_tx3_elec_idle_gt ( pipe_tx3_elec_idle_gt ), + .pipe_tx3_powerdown_gt ( pipe_tx3_powerdown_gt ), + .pipe_tx4_char_is_k_gt ( pipe_tx4_char_is_k_gt ), + .pipe_tx4_compliance_gt ( pipe_tx4_compliance_gt ), + .pipe_tx4_data_gt ( pipe_tx4_data_gt ), + .pipe_tx4_elec_idle_gt ( pipe_tx4_elec_idle_gt ), + .pipe_tx4_powerdown_gt ( pipe_tx4_powerdown_gt ), + .pipe_tx5_char_is_k_gt ( pipe_tx5_char_is_k_gt ), + .pipe_tx5_compliance_gt ( pipe_tx5_compliance_gt ), + .pipe_tx5_data_gt ( pipe_tx5_data_gt ), + .pipe_tx5_elec_idle_gt ( pipe_tx5_elec_idle_gt ), + .pipe_tx5_powerdown_gt ( pipe_tx5_powerdown_gt ), + .pipe_tx6_char_is_k_gt ( pipe_tx6_char_is_k_gt ), + .pipe_tx6_compliance_gt ( pipe_tx6_compliance_gt ), + .pipe_tx6_data_gt ( pipe_tx6_data_gt ), + .pipe_tx6_elec_idle_gt ( pipe_tx6_elec_idle_gt ), + .pipe_tx6_powerdown_gt ( pipe_tx6_powerdown_gt ), + .pipe_tx7_char_is_k_gt ( pipe_tx7_char_is_k_gt ), + .pipe_tx7_compliance_gt ( pipe_tx7_compliance_gt ), + .pipe_tx7_data_gt ( pipe_tx7_data_gt ), + .pipe_tx7_elec_idle_gt ( pipe_tx7_elec_idle_gt ), + .pipe_tx7_powerdown_gt ( pipe_tx7_powerdown_gt ), + + .pipe_rx0_chanisaligned_gt ( pipe_rx0_chanisaligned_gt ), + .pipe_rx0_char_is_k_gt ( pipe_rx0_char_is_k_gt ), + .pipe_rx0_data_gt ( pipe_rx0_data_gt ), + .pipe_rx0_elec_idle_gt ( pipe_rx0_elec_idle_gt ), + .pipe_rx0_phy_status_gt ( pipe_rx0_phy_status_gt ), + .pipe_rx0_status_gt ( pipe_rx0_status_gt ), + .pipe_rx0_valid_gt ( pipe_rx0_valid_gt ), + .pipe_rx1_chanisaligned_gt ( pipe_rx1_chanisaligned_gt ), + .pipe_rx1_char_is_k_gt ( pipe_rx1_char_is_k_gt ), + .pipe_rx1_data_gt ( pipe_rx1_data_gt ), + .pipe_rx1_elec_idle_gt ( pipe_rx1_elec_idle_gt ), + .pipe_rx1_phy_status_gt ( pipe_rx1_phy_status_gt ), + .pipe_rx1_status_gt ( pipe_rx1_status_gt ), + .pipe_rx1_valid_gt ( pipe_rx1_valid_gt ), + .pipe_rx2_chanisaligned_gt ( pipe_rx2_chanisaligned_gt ), + .pipe_rx2_char_is_k_gt ( pipe_rx2_char_is_k_gt ), + .pipe_rx2_data_gt ( pipe_rx2_data_gt ), + .pipe_rx2_elec_idle_gt ( pipe_rx2_elec_idle_gt ), + .pipe_rx2_phy_status_gt ( pipe_rx2_phy_status_gt ), + .pipe_rx2_status_gt ( pipe_rx2_status_gt ), + .pipe_rx2_valid_gt ( pipe_rx2_valid_gt ), + .pipe_rx3_chanisaligned_gt ( pipe_rx3_chanisaligned_gt ), + .pipe_rx3_char_is_k_gt ( pipe_rx3_char_is_k_gt ), + .pipe_rx3_data_gt ( pipe_rx3_data_gt ), + .pipe_rx3_elec_idle_gt ( pipe_rx3_elec_idle_gt ), + .pipe_rx3_phy_status_gt ( pipe_rx3_phy_status_gt ), + .pipe_rx3_status_gt ( pipe_rx3_status_gt ), + .pipe_rx3_valid_gt ( pipe_rx3_valid_gt ), + .pipe_rx4_chanisaligned_gt ( pipe_rx4_chanisaligned_gt ), + .pipe_rx4_char_is_k_gt ( pipe_rx4_char_is_k_gt ), + .pipe_rx4_data_gt ( pipe_rx4_data_gt ), + .pipe_rx4_elec_idle_gt ( pipe_rx4_elec_idle_gt ), + .pipe_rx4_phy_status_gt ( pipe_rx4_phy_status_gt ), + .pipe_rx4_status_gt ( pipe_rx4_status_gt ), + .pipe_rx4_valid_gt ( pipe_rx4_valid_gt ), + .pipe_rx5_chanisaligned_gt ( pipe_rx5_chanisaligned_gt ), + .pipe_rx5_char_is_k_gt ( pipe_rx5_char_is_k_gt ), + .pipe_rx5_data_gt ( pipe_rx5_data_gt ), + .pipe_rx5_elec_idle_gt ( pipe_rx5_elec_idle_gt ), + .pipe_rx5_phy_status_gt ( pipe_rx5_phy_status_gt ), + .pipe_rx5_status_gt ( pipe_rx5_status_gt ), + .pipe_rx5_valid_gt ( pipe_rx5_valid_gt ), + .pipe_rx6_chanisaligned_gt ( pipe_rx6_chanisaligned_gt ), + .pipe_rx6_char_is_k_gt ( pipe_rx6_char_is_k_gt ), + .pipe_rx6_data_gt ( pipe_rx6_data_gt ), + .pipe_rx6_elec_idle_gt ( pipe_rx6_elec_idle_gt ), + .pipe_rx6_phy_status_gt ( pipe_rx6_phy_status_gt ), + .pipe_rx6_status_gt ( pipe_rx6_status_gt ), + .pipe_rx6_valid_gt ( pipe_rx6_valid_gt ), + .pipe_rx7_chanisaligned_gt ( pipe_rx7_chanisaligned_gt ), + .pipe_rx7_char_is_k_gt ( pipe_rx7_char_is_k_gt ), + .pipe_rx7_data_gt ( pipe_rx7_data_gt ), + .pipe_rx7_elec_idle_gt ( pipe_rx7_elec_idle_gt ), + .pipe_rx7_phy_status_gt ( pipe_rx7_phy_status_gt ), + .pipe_rx7_status_gt ( pipe_rx7_status_gt ), + .pipe_rx7_valid_gt ( pipe_rx7_valid_gt ) + + ); + assign common_commands_out = 12'b0; + assign pipe_tx_0_sigs = 25'b0; + assign pipe_tx_1_sigs = 25'b0; + assign pipe_tx_2_sigs = 25'b0; + assign pipe_tx_3_sigs = 25'b0; + assign pipe_tx_4_sigs = 25'b0; + assign pipe_tx_5_sigs = 25'b0; + assign pipe_tx_6_sigs = 25'b0; + assign pipe_tx_7_sigs = 25'b0; + + + //------------------------------------------------------------------------------------------------------------------// + // **** V7/K7/A7 GTX Wrapper **** // + // The 7-Series GTX Wrapper includes the following: // + // 1) Virtex-7 GTX // + // 2) Kintex-7 GTX // + // 3) Artix-7 GTP // + //------------------------------------------------------------------------------------------------------------------// +pcie_7x_0_gt_top #( + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .REF_CLK_FREQ ( REF_CLK_FREQ ), + .USER_CLK_FREQ ( USER_CLK_FREQ ), + .USER_CLK2_DIV2 ( USER_CLK2_DIV2 ), + + // synthesis translate_off + .PL_FAST_TRAIN ( ENABLE_FAST_SIM_TRAINING ), + // synthesis translate_on + + .PCIE_EXT_CLK ( PCIE_EXT_CLK ), + .PCIE_USE_MODE ( PCIE_USE_MODE ), + .PCIE_GT_DEVICE ( PCIE_GT_DEVICE ), + .PCIE_PLL_SEL ( PCIE_PLL_SEL ), + .PCIE_ASYNC_EN ( PCIE_ASYNC_EN ), + .PCIE_TXBUF_EN ( PCIE_TXBUF_EN ), + .PCIE_EXT_GT_COMMON ( PCIE_EXT_GT_COMMON ), + .EXT_CH_GT_DRP ( EXT_CH_GT_DRP ), + .TX_MARGIN_FULL_0 ( TX_MARGIN_FULL_0 ), + .TX_MARGIN_FULL_1 ( TX_MARGIN_FULL_1 ), + .TX_MARGIN_FULL_2 ( TX_MARGIN_FULL_2 ), + .TX_MARGIN_FULL_3 ( TX_MARGIN_FULL_3 ), + .TX_MARGIN_FULL_4 ( TX_MARGIN_FULL_4 ), + .TX_MARGIN_LOW_0 ( TX_MARGIN_LOW_0 ), + .TX_MARGIN_LOW_1 ( TX_MARGIN_LOW_1 ), + .TX_MARGIN_LOW_2 ( TX_MARGIN_LOW_2 ), + .TX_MARGIN_LOW_3 ( TX_MARGIN_LOW_3 ), + .TX_MARGIN_LOW_4 ( TX_MARGIN_LOW_4 ), + .PCIE_CHAN_BOND ( PCIE_CHAN_BOND ) + + ) gt_top_i ( + // pl ltssm + .pl_ltssm_state ( pl_ltssm_state_int ), + + // Pipe Common Signals + .pipe_tx_rcvr_det ( pipe_tx_rcvr_det_gt ), + .pipe_tx_reset ( 1'b0 ), + .pipe_tx_rate ( pipe_tx_rate_gt ), + .pipe_tx_deemph ( pipe_tx_deemph_gt ), + .pipe_tx_margin ( pipe_tx_margin_gt ), + .pipe_tx_swing ( 1'b0 ), + + // Pipe Per-Lane Signals - Lane 0 + .pipe_rx0_char_is_k ( pipe_rx0_char_is_k_gt), + .pipe_rx0_data ( pipe_rx0_data_gt ), + .pipe_rx0_valid ( pipe_rx0_valid_gt ), + .pipe_rx0_chanisaligned ( pipe_rx0_chanisaligned_gt ), + .pipe_rx0_status ( pipe_rx0_status_gt ), + .pipe_rx0_phy_status ( pipe_rx0_phy_status_gt ), + .pipe_rx0_elec_idle ( pipe_rx0_elec_idle_gt ), + .pipe_rx0_polarity ( pipe_rx0_polarity_gt ), + .pipe_tx0_compliance ( pipe_tx0_compliance_gt ), + .pipe_tx0_char_is_k ( pipe_tx0_char_is_k_gt ), + .pipe_tx0_data ( pipe_tx0_data_gt ), + .pipe_tx0_elec_idle ( pipe_tx0_elec_idle_gt ), + .pipe_tx0_powerdown ( pipe_tx0_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 1 + + .pipe_rx1_char_is_k ( pipe_rx1_char_is_k_gt), + .pipe_rx1_data ( pipe_rx1_data_gt ), + .pipe_rx1_valid ( pipe_rx1_valid_gt ), + .pipe_rx1_chanisaligned ( pipe_rx1_chanisaligned_gt ), + .pipe_rx1_status ( pipe_rx1_status_gt ), + .pipe_rx1_phy_status ( pipe_rx1_phy_status_gt ), + .pipe_rx1_elec_idle ( pipe_rx1_elec_idle_gt ), + .pipe_rx1_polarity ( pipe_rx1_polarity_gt ), + .pipe_tx1_compliance ( pipe_tx1_compliance_gt ), + .pipe_tx1_char_is_k ( pipe_tx1_char_is_k_gt ), + .pipe_tx1_data ( pipe_tx1_data_gt ), + .pipe_tx1_elec_idle ( pipe_tx1_elec_idle_gt ), + .pipe_tx1_powerdown ( pipe_tx1_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 2 + + .pipe_rx2_char_is_k ( pipe_rx2_char_is_k_gt), + .pipe_rx2_data ( pipe_rx2_data_gt ), + .pipe_rx2_valid ( pipe_rx2_valid_gt ), + .pipe_rx2_chanisaligned ( pipe_rx2_chanisaligned_gt ), + .pipe_rx2_status ( pipe_rx2_status_gt ), + .pipe_rx2_phy_status ( pipe_rx2_phy_status_gt ), + .pipe_rx2_elec_idle ( pipe_rx2_elec_idle_gt ), + .pipe_rx2_polarity ( pipe_rx2_polarity_gt ), + .pipe_tx2_compliance ( pipe_tx2_compliance_gt ), + .pipe_tx2_char_is_k ( pipe_tx2_char_is_k_gt ), + .pipe_tx2_data ( pipe_tx2_data_gt ), + .pipe_tx2_elec_idle ( pipe_tx2_elec_idle_gt ), + .pipe_tx2_powerdown ( pipe_tx2_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 3 + + .pipe_rx3_char_is_k ( pipe_rx3_char_is_k_gt), + .pipe_rx3_data ( pipe_rx3_data_gt ), + .pipe_rx3_valid ( pipe_rx3_valid_gt ), + .pipe_rx3_chanisaligned ( pipe_rx3_chanisaligned_gt ), + .pipe_rx3_status ( pipe_rx3_status_gt ), + .pipe_rx3_phy_status ( pipe_rx3_phy_status_gt ), + .pipe_rx3_elec_idle ( pipe_rx3_elec_idle_gt ), + .pipe_rx3_polarity ( pipe_rx3_polarity_gt ), + .pipe_tx3_compliance ( pipe_tx3_compliance_gt ), + .pipe_tx3_char_is_k ( pipe_tx3_char_is_k_gt ), + .pipe_tx3_data ( pipe_tx3_data_gt ), + .pipe_tx3_elec_idle ( pipe_tx3_elec_idle_gt ), + .pipe_tx3_powerdown ( pipe_tx3_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 4 + + .pipe_rx4_char_is_k ( pipe_rx4_char_is_k_gt), + .pipe_rx4_data ( pipe_rx4_data_gt ), + .pipe_rx4_valid ( pipe_rx4_valid_gt ), + .pipe_rx4_chanisaligned ( pipe_rx4_chanisaligned_gt ), + .pipe_rx4_status ( pipe_rx4_status_gt ), + .pipe_rx4_phy_status ( pipe_rx4_phy_status_gt ), + .pipe_rx4_elec_idle ( pipe_rx4_elec_idle_gt ), + .pipe_rx4_polarity ( pipe_rx4_polarity_gt ), + .pipe_tx4_compliance ( pipe_tx4_compliance_gt ), + .pipe_tx4_char_is_k ( pipe_tx4_char_is_k_gt ), + .pipe_tx4_data ( pipe_tx4_data_gt ), + .pipe_tx4_elec_idle ( pipe_tx4_elec_idle_gt ), + .pipe_tx4_powerdown ( pipe_tx4_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 5 + + .pipe_rx5_char_is_k ( pipe_rx5_char_is_k_gt), + .pipe_rx5_data ( pipe_rx5_data_gt ), + .pipe_rx5_valid ( pipe_rx5_valid_gt ), + .pipe_rx5_chanisaligned ( pipe_rx5_chanisaligned_gt ), + .pipe_rx5_status ( pipe_rx5_status_gt ), + .pipe_rx5_phy_status ( pipe_rx5_phy_status_gt ), + .pipe_rx5_elec_idle ( pipe_rx5_elec_idle_gt ), + .pipe_rx5_polarity ( pipe_rx5_polarity_gt ), + .pipe_tx5_compliance ( pipe_tx5_compliance_gt ), + .pipe_tx5_char_is_k ( pipe_tx5_char_is_k_gt ), + .pipe_tx5_data ( pipe_tx5_data_gt ), + .pipe_tx5_elec_idle ( pipe_tx5_elec_idle_gt ), + .pipe_tx5_powerdown ( pipe_tx5_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 6 + + .pipe_rx6_char_is_k ( pipe_rx6_char_is_k_gt), + .pipe_rx6_data ( pipe_rx6_data_gt ), + .pipe_rx6_valid ( pipe_rx6_valid_gt ), + .pipe_rx6_chanisaligned ( pipe_rx6_chanisaligned_gt ), + .pipe_rx6_status ( pipe_rx6_status_gt ), + .pipe_rx6_phy_status ( pipe_rx6_phy_status_gt ), + .pipe_rx6_elec_idle ( pipe_rx6_elec_idle_gt ), + .pipe_rx6_polarity ( pipe_rx6_polarity_gt ), + .pipe_tx6_compliance ( pipe_tx6_compliance_gt ), + .pipe_tx6_char_is_k ( pipe_tx6_char_is_k_gt ), + .pipe_tx6_data ( pipe_tx6_data_gt ), + .pipe_tx6_elec_idle ( pipe_tx6_elec_idle_gt ), + .pipe_tx6_powerdown ( pipe_tx6_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 7 + + .pipe_rx7_char_is_k ( pipe_rx7_char_is_k_gt), + .pipe_rx7_data ( pipe_rx7_data_gt ), + .pipe_rx7_valid ( pipe_rx7_valid_gt ), + .pipe_rx7_chanisaligned ( pipe_rx7_chanisaligned_gt ), + .pipe_rx7_status ( pipe_rx7_status_gt ), + .pipe_rx7_phy_status ( pipe_rx7_phy_status_gt ), + .pipe_rx7_elec_idle ( pipe_rx7_elec_idle_gt ), + .pipe_rx7_polarity ( pipe_rx7_polarity_gt ), + .pipe_tx7_compliance ( pipe_tx7_compliance_gt ), + .pipe_tx7_char_is_k ( pipe_tx7_char_is_k_gt ), + .pipe_tx7_data ( pipe_tx7_data_gt ), + .pipe_tx7_elec_idle ( pipe_tx7_elec_idle_gt ), + .pipe_tx7_powerdown ( pipe_tx7_powerdown_gt ), + + // PCI Express Signals + .pci_exp_txn ( pci_exp_txn ), + .pci_exp_txp ( pci_exp_txp ), + .pci_exp_rxn ( pci_exp_rxn ), + .pci_exp_rxp ( pci_exp_rxp ), + + // Non PIPE Signals + .sys_clk ( sys_clk ), + .sys_rst_n ( sys_rst_n ), + .PIPE_MMCM_RST_N ( pipe_mmcm_rst_n ), // Async | Async + .pipe_clk ( pipe_clk ), + + .user_clk ( user_clk ), + .user_clk2 ( user_clk2 ), + .phy_rdy_n ( phy_rdy_n ), + + // ---------- Shared Logic Internal------------------ + .INT_PCLK_OUT_SLAVE ( int_pclk_out_slave ), + .INT_RXUSRCLK_OUT ( int_pipe_rxusrclk_out ), + .INT_RXOUTCLK_OUT ( int_rxoutclk_out ), + .INT_DCLK_OUT ( int_dclk_out ), + .INT_USERCLK1_OUT ( int_userclk1_out ), + .INT_USERCLK2_OUT ( int_userclk2_out), + .INT_OOBCLK_OUT ( int_oobclk_out), + .INT_MMCM_LOCK_OUT ( int_mmcm_lock_out ), + .INT_QPLLLOCK_OUT ( int_qplllock_out ), + .INT_QPLLOUTCLK_OUT ( int_qplloutclk_out ), + .INT_QPLLOUTREFCLK_OUT ( int_qplloutrefclk_out ), + .INT_PCLK_SEL_SLAVE ( int_pclk_sel_slave ), + + // ---------- Shared Logic External------------------ + //External Clock Ports + .PIPE_PCLK_IN ( pipe_pclk_in ), + .PIPE_RXUSRCLK_IN ( pipe_rxusrclk_in ), + .PIPE_RXOUTCLK_IN ( pipe_rxoutclk_in ), + .PIPE_DCLK_IN ( pipe_dclk_in ), + .PIPE_USERCLK1_IN ( pipe_userclk1_in ), + .PIPE_USERCLK2_IN ( pipe_userclk2_in ), + .PIPE_OOBCLK_IN ( pipe_oobclk_in ), + .PIPE_MMCM_LOCK_IN ( pipe_mmcm_lock_in ), + + .PIPE_TXOUTCLK_OUT ( pipe_txoutclk_out ), + .PIPE_RXOUTCLK_OUT ( pipe_rxoutclk_out ), + .PIPE_PCLK_SEL_OUT ( pipe_pclk_sel_out ), + .PIPE_GEN3_OUT ( pipe_gen3_out ), + + //External GT COMMON Ports + + .qpll_drp_crscode ( qpll_drp_crscode ), + .qpll_drp_fsm ( qpll_drp_fsm ), + .qpll_drp_done ( qpll_drp_done ), + .qpll_drp_reset ( qpll_drp_reset ), + .qpll_qplllock ( qpll_qplllock ), + .qpll_qplloutclk ( qpll_qplloutclk ), + .qpll_qplloutrefclk ( qpll_qplloutrefclk ), + .qpll_qplld ( qpll_qplld ), + .qpll_qpllreset ( qpll_qpllreset ), + .qpll_drp_clk ( qpll_drp_clk ), + .qpll_drp_rst_n ( qpll_drp_rst_n ), + .qpll_drp_ovrd ( qpll_drp_ovrd ), + .qpll_drp_gen3 ( qpll_drp_gen3), + .qpll_drp_start ( qpll_drp_start ), + + //TRANSCEIVER DEBUG EOU + .ext_ch_gt_drpclk ( ext_ch_gt_drpclk ), + .ext_ch_gt_drpaddr ( ext_ch_gt_drpaddr ), + .ext_ch_gt_drpen ( ext_ch_gt_drpen ), + .ext_ch_gt_drpdi ( ext_ch_gt_drpdi ), + .ext_ch_gt_drpwe ( ext_ch_gt_drpwe ), + .ext_ch_gt_drpdo ( ext_ch_gt_drpdo ), + .ext_ch_gt_drprdy ( ext_ch_gt_drprdy ), + +//---------- PRBS/Loopback Ports ----------------------- + .PIPE_TXPRBSSEL ( pipe_txprbssel ), + .PIPE_RXPRBSSEL ( pipe_rxprbssel ), + .PIPE_TXPRBSFORCEERR ( pipe_txprbsforceerr ), + .PIPE_RXPRBSCNTRESET ( pipe_rxprbscntreset ), + .PIPE_LOOPBACK ( pipe_loopback ), + + .PIPE_RXPRBSERR ( pipe_rxprbserr ), + .PIPE_TXINHIBIT ( pipe_txinhibit ), + +//---------- Transceiver Debug FSM Ports --------------------------------- + .PIPE_RST_FSM ( pipe_rst_fsm ), + .PIPE_QRST_FSM ( pipe_qrst_fsm ), + .PIPE_RATE_FSM ( pipe_rate_fsm ), + .PIPE_SYNC_FSM_TX ( pipe_sync_fsm_tx ), + .PIPE_SYNC_FSM_RX ( pipe_sync_fsm_rx ), + .PIPE_DRP_FSM ( pipe_drp_fsm ), + + .PIPE_RST_IDLE ( pipe_rst_idle ), + .PIPE_QRST_IDLE ( pipe_qrst_idle ), + .PIPE_RATE_IDLE ( pipe_rate_idle ), + .PIPE_EYESCANDATAERROR ( pipe_eyescandataerror ), + .PIPE_RXSTATUS ( pipe_rxstatus ), + .PIPE_DMONITOROUT ( pipe_dmonitorout ), + + .PIPE_CPLL_LOCK ( pipe_cpll_lock ), + .PIPE_QPLL_LOCK ( pipe_qpll_lock ), + .PIPE_RXPMARESETDONE ( pipe_rxpmaresetdone ), + .PIPE_RXBUFSTATUS ( pipe_rxbufstatus ), + .PIPE_TXPHALIGNDONE ( pipe_txphaligndone ), + .PIPE_TXPHINITDONE ( pipe_txphinitdone ), + .PIPE_TXDLYSRESETDONE ( pipe_txdlysresetdone ), + .PIPE_RXPHALIGNDONE ( pipe_rxphaligndone ), + .PIPE_RXDLYSRESETDONE ( pipe_rxdlysresetdone ), + .PIPE_RXSYNCDONE ( pipe_rxsyncdone ), + .PIPE_RXDISPERR ( pipe_rxdisperr ), + .PIPE_RXNOTINTABLE ( pipe_rxnotintable ), + .PIPE_RXCOMMADET ( pipe_rxcommadet ), + //---------- JTAG Ports -------------------------------- + .PIPE_JTAG_RDY (gt_ch_drp_rdy ), + + + //---------- Debug Ports ------------------------------- + .PIPE_DEBUG_0 ( pipe_debug_0 ), + .PIPE_DEBUG_1 ( pipe_debug_1 ), + .PIPE_DEBUG_2 ( pipe_debug_2 ), + .PIPE_DEBUG_3 ( pipe_debug_3 ), + .PIPE_DEBUG_4 ( pipe_debug_4 ), + .PIPE_DEBUG_5 ( pipe_debug_5 ), + .PIPE_DEBUG_6 ( pipe_debug_6 ), + .PIPE_DEBUG_7 ( pipe_debug_7 ), + .PIPE_DEBUG_8 ( pipe_debug_8 ), + .PIPE_DEBUG_9 ( pipe_debug_9 ), + .PIPE_DEBUG ( pipe_debug ) + ); + + assign common_commands_out = 12'b0; + assign pipe_tx_0_sigs = 25'b0; + assign pipe_tx_1_sigs = 25'b0; + assign pipe_tx_2_sigs = 25'b0; + assign pipe_tx_3_sigs = 25'b0; + assign pipe_tx_4_sigs = 25'b0; + assign pipe_tx_5_sigs = 25'b0; + assign pipe_tx_6_sigs = 25'b0; + assign pipe_tx_7_sigs = 25'b0; + //------------------------------------------------------------------------------------------------------------------// + + // Tie-Off Unused Tandem Outputs + assign icap_o = 32'b0; + assign startup_cfgclk = 1'b0; + assign startup_cfgmclk = 1'b0; + assign startup_eos = 1'b0; + assign startup_preq = 1'b0; + +//////////////////////////////////////////////STORE_LTSSM////////////////////////////////////////////////// + + (* dont_touch = "true" *) wire store_ltssm; + reg [5:0] ltssm_reg0 = 6'b0; + reg [5:0] ltssm_reg1 = 6'b0; + reg [5:0] ltssm_reg2 = 6'b0; + + always@ (posedge pipe_clk) + begin + ltssm_reg0 <= pl_ltssm_state; + ltssm_reg1 <= ltssm_reg0; + ltssm_reg2 <= ltssm_reg1; + end + + assign store_ltssm = (ltssm_reg2 != pl_ltssm_state) ? 1'b1 : 1'b0; + +/////////////////////////////////////////////////////////////////////////////////////////////////////////// +//enable_jtag_dbg = FALSE + + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_common.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_common.v new file mode 100644 index 0000000000000000000000000000000000000000..e8f61e7b24af86fc38273b7277864fe643ecaa15 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_common.v @@ -0,0 +1,166 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gt_common.v +// Version : 3.3 +`timescale 1ns / 1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gt_common #( + +parameter PCIE_SIM_MODE = "FALSE", // PCIe sim mode +parameter PCIE_GT_DEVICE = "GTX", // PCIe GT device +parameter PCIE_USE_MODE = "2.1", // PCIe use mode +parameter PCIE_PLL_SEL = "CPLL", // PCIe PLL select for Gen1/Gen2 only +parameter PCIE_REFCLK_FREQ = 0 // PCIe reference clock frequency +) + +( +input CPLLPDREFCLK, +input PIPE_CLK, +input QPLL_QPLLPD, +input QPLL_QPLLRESET, +input QPLL_DRP_CLK, +input QPLL_DRP_RST_N, +input QPLL_DRP_OVRD, +input QPLL_DRP_GEN3, +input QPLL_DRP_START, +output [5:0] QPLL_DRP_CRSCODE, +output [8:0] QPLL_DRP_FSM, +output QPLL_DRP_DONE, +output QPLL_DRP_RESET, +output QPLL_QPLLLOCK, +output QPLL_QPLLOUTCLK, +output QPLL_QPLLOUTREFCLK +); + + //---------- QPLL DRP Module Output -------------------- + +wire [7:0] qpll_drp_addr; +wire qpll_drp_en; +wire [15:0] qpll_drp_di; +wire qpll_drp_we; + + //---------- QPLL Wrapper Output ----------------------- + +wire [15:0] qpll_drp_do; +wire qpll_drp_rdy; + + //---------- QPLL Resets ----------------------- + + + //---------- QPLL DRP Module --------------------------------------- + +pcie_7x_0_qpll_drp # + ( + + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_REFCLK_FREQ (PCIE_REFCLK_FREQ) // PCIe reference clock frequency + + ) + qpll_drp_i + ( + + //---------- Input ------------------------- + .DRP_CLK (QPLL_DRP_CLK), + .DRP_RST_N (!QPLL_DRP_RST_N), + .DRP_OVRD (QPLL_DRP_OVRD), + .DRP_GEN3 (&QPLL_DRP_GEN3), + .DRP_QPLLLOCK (QPLL_QPLLLOCK), + .DRP_START (QPLL_DRP_START), + .DRP_DO (qpll_drp_do), + .DRP_RDY (qpll_drp_rdy), + + //---------- Output ------------------------ + .DRP_ADDR (qpll_drp_addr), + .DRP_EN (qpll_drp_en), + .DRP_DI (qpll_drp_di), + .DRP_WE (qpll_drp_we), + .DRP_DONE (QPLL_DRP_DONE), + .DRP_QPLLRESET (QPLL_DRP_RESET), + .DRP_CRSCODE (QPLL_DRP_CRSCODE), + .DRP_FSM (QPLL_DRP_FSM) + ); + + + //---------- QPLL Wrapper ------------------------------------------ +pcie_7x_0_qpll_wrapper # + ( + .PCIE_SIM_MODE (PCIE_SIM_MODE), // PCIe sim mode + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_REFCLK_FREQ (PCIE_REFCLK_FREQ) // PCIe reference clock frequency + ) + qpll_wrapper_i + ( + //---------- QPLL Clock Ports -------------- + .QPLL_CPLLPDREFCLK (CPLLPDREFCLK), + .QPLL_GTGREFCLK (PIPE_CLK), + .QPLL_QPLLLOCKDETCLK (1'd0), + .QPLL_QPLLOUTCLK (QPLL_QPLLOUTCLK), + .QPLL_QPLLOUTREFCLK (QPLL_QPLLOUTREFCLK), + .QPLL_QPLLLOCK (QPLL_QPLLLOCK), + //---------- QPLL Reset Ports -------------- + .QPLL_QPLLPD (QPLL_QPLLPD), + .QPLL_QPLLRESET (QPLL_QPLLRESET), + //---------- QPLL DRP Ports ---------------- + .QPLL_DRPCLK (QPLL_DRP_CLK), + .QPLL_DRPADDR (qpll_drp_addr), + .QPLL_DRPEN (qpll_drp_en), + .QPLL_DRPDI (qpll_drp_di), + .QPLL_DRPWE (qpll_drp_we), + .QPLL_DRPDO (qpll_drp_do), + .QPLL_DRPRDY (qpll_drp_rdy) + ); + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v new file mode 100644 index 0000000000000000000000000000000000000000..7beb2b92ec43d0aa7c5cc9f9b9087c8f14fb2bd2 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v @@ -0,0 +1,285 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gt_rx_valid_filter_7x.v +// Version : 3.3 +//-- Description: GTX module for 7-series Integrated PCIe Block +//-- +//-- +//-- +//-------------------------------------------------------------------------------- + +`timescale 1ns / 1ns + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gt_rx_valid_filter_7x #( + + parameter CLK_COR_MIN_LAT = 28, + parameter TCQ = 1 + +) +( + output [1:0] USER_RXCHARISK, + output [15:0] USER_RXDATA, + output USER_RXVALID, + output USER_RXELECIDLE, + output [ 2:0] USER_RX_STATUS, + output USER_RX_PHY_STATUS, + input [1:0] GT_RXCHARISK, + input [15:0] GT_RXDATA, + input GT_RXVALID, + input GT_RXELECIDLE, + input [ 2:0] GT_RX_STATUS, + input GT_RX_PHY_STATUS, + + input PLM_IN_L0, + input PLM_IN_RS, + + input USER_CLK, + input RESET + +); + + + + localparam EIOS_DET_IDL = 5'b00001; + localparam EIOS_DET_NO_STR0 = 5'b00010; + localparam EIOS_DET_STR0 = 5'b00100; + localparam EIOS_DET_STR1 = 5'b01000; + localparam EIOS_DET_DONE = 5'b10000; + + localparam EIOS_COM = 8'hBC; + localparam EIOS_IDL = 8'h7C; + localparam FTSOS_COM = 8'hBC; + localparam FTSOS_FTS = 8'h3C; + + reg [4:0] reg_state_eios_det; + wire [4:0] state_eios_det; + + reg reg_eios_detected; + wire eios_detected; + + reg reg_symbol_after_eios; + wire symbol_after_eios; + + localparam USER_RXVLD_IDL = 4'b0001; + localparam USER_RXVLD_EI = 4'b0010; + localparam USER_RXVLD_EI_DB0 = 4'b0100; + localparam USER_RXVLD_EI_DB1 = 4'b1000; + + + reg [1:0] gt_rxcharisk_q; + reg [15:0] gt_rxdata_q; + reg gt_rxvalid_q; + reg gt_rxelecidle_q; + + reg [ 2:0] gt_rx_status_q; + reg gt_rx_phy_status_q; + reg gt_rx_is_skp0_q; + reg gt_rx_is_skp1_q; + + // EIOS detector + + always @(posedge USER_CLK) begin + + if (RESET) begin + + reg_eios_detected <= #TCQ 1'b0; + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + reg_symbol_after_eios <= #TCQ 1'b0; + gt_rxcharisk_q <= #TCQ 2'b00; + gt_rxdata_q <= #TCQ 16'h0; + gt_rxvalid_q <= #TCQ 1'b0; + gt_rxelecidle_q <= #TCQ 1'b0; + gt_rx_status_q <= #TCQ 3'b000; + gt_rx_phy_status_q <= #TCQ 1'b0; + gt_rx_is_skp0_q <= #TCQ 1'b0; + gt_rx_is_skp1_q <= #TCQ 1'b0; + + end else begin + reg_eios_detected <= #TCQ 1'b0; + reg_symbol_after_eios <= #TCQ 1'b0; + gt_rxcharisk_q <= #TCQ GT_RXCHARISK; + gt_rxelecidle_q <= #TCQ GT_RXELECIDLE; + gt_rxdata_q <= #TCQ GT_RXDATA; + gt_rx_phy_status_q <= #TCQ GT_RX_PHY_STATUS; + + //De-assert rx_valid signal when EIOS is detected on RXDATA + if(((reg_state_eios_det == 5'b10000)) && (PLM_IN_L0) + ) begin + + gt_rxvalid_q <= #TCQ 1'b0; + end + else if (GT_RXELECIDLE && !gt_rxvalid_q) begin + gt_rxvalid_q <= #TCQ 1'b0; + end + else begin + gt_rxvalid_q <= GT_RXVALID; + end + + if (gt_rxvalid_q) begin + gt_rx_status_q <= #TCQ GT_RX_STATUS; + + end + else if (!gt_rxvalid_q && PLM_IN_L0) begin + gt_rx_status_q <= #TCQ 3'b0; + end + else begin + gt_rx_status_q <= #TCQ GT_RX_STATUS; + end + + + + if (GT_RXCHARISK[0] && GT_RXDATA[7:0] == FTSOS_FTS) + gt_rx_is_skp0_q <= #TCQ 1'b1; + else + gt_rx_is_skp0_q <= #TCQ 1'b0; + + if (GT_RXCHARISK[1] && GT_RXDATA[15:8] == FTSOS_FTS) + gt_rx_is_skp1_q <= #TCQ 1'b1; + else + gt_rx_is_skp1_q <= #TCQ 1'b0; + + case ( state_eios_det ) + + EIOS_DET_IDL : begin + + if ((gt_rxcharisk_q[0]) && (gt_rxdata_q[7:0] == EIOS_COM) && + (gt_rxcharisk_q[1]) && (gt_rxdata_q[15:8] == EIOS_IDL)) begin + + reg_state_eios_det <= #TCQ EIOS_DET_NO_STR0; + reg_eios_detected <= #TCQ 1'b1; + // gt_rxvalid_q <= #TCQ 1'b0; + + end else if ((gt_rxcharisk_q[1]) && (gt_rxdata_q[15:8] == EIOS_COM)) + reg_state_eios_det <= #TCQ EIOS_DET_STR0; + else + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + + end + + EIOS_DET_NO_STR0 : begin + + if ((gt_rxcharisk_q[0] && (gt_rxdata_q[7:0] == EIOS_IDL)) && + (gt_rxcharisk_q[1] && (gt_rxdata_q[15:8] == EIOS_IDL))) + begin + reg_state_eios_det <= #TCQ EIOS_DET_DONE; + gt_rxvalid_q <= #TCQ 1'b0; + end + else if (gt_rxcharisk_q[0] && (gt_rxdata_q[7:0] == EIOS_IDL)) begin + + reg_state_eios_det <= #TCQ EIOS_DET_DONE; + gt_rxvalid_q <= #TCQ 1'b0; + end + else + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + + end + + EIOS_DET_STR0 : begin + + if ((gt_rxcharisk_q[0] && (gt_rxdata_q[7:0] == EIOS_IDL)) && + (gt_rxcharisk_q[1] && (gt_rxdata_q[15:8] == EIOS_IDL))) begin + + reg_state_eios_det <= #TCQ EIOS_DET_STR1; + reg_eios_detected <= #TCQ 1'b1; + gt_rxvalid_q <= #TCQ 1'b0; + reg_symbol_after_eios <= #TCQ 1'b1; + + end else + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + + end + + EIOS_DET_STR1 : begin + + if ((gt_rxcharisk_q[0]) && (gt_rxdata_q[7:0] == EIOS_IDL)) + begin + reg_state_eios_det <= #TCQ EIOS_DET_DONE; + gt_rxvalid_q <= #TCQ 1'b0; + end + else + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + + end + + EIOS_DET_DONE : begin + + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + + end + + endcase + + end + + end + assign state_eios_det = reg_state_eios_det; + assign eios_detected = reg_eios_detected; + assign symbol_after_eios = reg_symbol_after_eios; + /*SRL16E #(.INIT(0)) rx_elec_idle_delay (.Q(USER_RXELECIDLE), + .D(gt_rxelecidle_q), + .CLK(USER_CLK), + .CE(1'b1), .A3(1'b1),.A2(1'b1),.A1(1'b1),.A0(1'b1)); +*/ +wire rst_l = ~RESET; + + +assign USER_RXVALID = gt_rxvalid_q; +assign USER_RXCHARISK[0] = gt_rxvalid_q ? gt_rxcharisk_q[0] : 1'b0; +assign USER_RXCHARISK[1] = (gt_rxvalid_q && !symbol_after_eios) ? gt_rxcharisk_q[1] : 1'b0; +assign USER_RXDATA[7:0] = gt_rxdata_q[7:0]; +assign USER_RXDATA[15:8] = gt_rxdata_q[15:8]; +assign USER_RX_STATUS = gt_rx_status_q; +assign USER_RX_PHY_STATUS = gt_rx_phy_status_q; +assign USER_RXELECIDLE = gt_rxelecidle_q; + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_top.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_top.v new file mode 100644 index 0000000000000000000000000000000000000000..a7b0f0a13e2d09bbadee3c4c9a5305f424f01bea --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_top.v @@ -0,0 +1,1027 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gt_top.v +// Version : 3.3 +//-- Description: GTX module for 7-series Integrated PCIe Block +//-- +//-- +//-- +//-------------------------------------------------------------------------------- + +`timescale 1ns/1ns + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gt_top # +( + parameter LINK_CAP_MAX_LINK_WIDTH = 8, // 1 - x1 , 2 - x2 , 4 - x4 , 8 - x8 + parameter REF_CLK_FREQ = 0, // 0 - 100 MHz , 1 - 125 MHz , 2 - 250 MHz + parameter USER_CLK2_DIV2 = "FALSE", // "FALSE" => user_clk2 = user_clk + // "TRUE" => user_clk2 = user_clk/2, where user_clk = 500 or 250 MHz. + parameter integer USER_CLK_FREQ = 3, // 0 - 31.25 MHz , 1 - 62.5 MHz , 2 - 125 MHz , 3 - 250 MHz , 4 - 500Mhz + parameter PL_FAST_TRAIN = "FALSE", // Simulation Speedup + parameter PCIE_EXT_CLK = "FALSE", // Use External Clocking + parameter PCIE_USE_MODE = "1.0", // 1.0 = K325T IES, 1.1 = VX485T IES, 3.0 = K325T GES + parameter PCIE_GT_DEVICE = "GTX", // Select the GT to use (GTP for Artix-7, GTX for K7/V7) + parameter PCIE_PLL_SEL = "CPLL", // Select the PLL (CPLL or QPLL) + parameter PCIE_ASYNC_EN = "FALSE", // Asynchronous Clocking Enable + parameter PCIE_TXBUF_EN = "FALSE", // Use the Tansmit Buffer + parameter PCIE_EXT_GT_COMMON = "FALSE", + parameter EXT_CH_GT_DRP = "FALSE", + parameter TX_MARGIN_FULL_0 = 7'b1001111, // 1000 mV + parameter TX_MARGIN_FULL_1 = 7'b1001110, // 950 mV + parameter TX_MARGIN_FULL_2 = 7'b1001101, // 900 mV + parameter TX_MARGIN_FULL_3 = 7'b1001100, // 850 mV + parameter TX_MARGIN_FULL_4 = 7'b1000011, // 400 mV + parameter TX_MARGIN_LOW_0 = 7'b1000101, // 500 mV + parameter TX_MARGIN_LOW_1 = 7'b1000110, // 450 mV + parameter TX_MARGIN_LOW_2 = 7'b1000011, // 400 mV + parameter TX_MARGIN_LOW_3 = 7'b1000010, // 350 mV + parameter TX_MARGIN_LOW_4 = 7'b1000000, + + parameter PCIE_CHAN_BOND = 0, + parameter TCQ = 1 //synthesis warning solved: parameter declaration becomes local +) +( + //-----------------------------------------------------------------------------------------------------------------// + // pl ltssm + input wire [5:0] pl_ltssm_state , + // Pipe Per-Link Signals + input wire pipe_tx_rcvr_det , + input wire pipe_tx_reset , + input wire pipe_tx_rate , + input wire pipe_tx_deemph , + input wire [2:0] pipe_tx_margin , + input wire pipe_tx_swing , + + //-----------------------------------------------------------------------------------------------------------------// + // Pipe Per-Lane Signals // + //-----------------------------------------------------------------------------------------------------------------// + + + // Pipe Per-Lane Signals - Lane 0 + output wire [ 1:0] pipe_rx0_char_is_k , + output wire [15:0] pipe_rx0_data , + output wire pipe_rx0_valid , + output wire pipe_rx0_chanisaligned , + output wire [ 2:0] pipe_rx0_status , + output wire pipe_rx0_phy_status , + output wire pipe_rx0_elec_idle , + input wire pipe_rx0_polarity , + input wire pipe_tx0_compliance , + input wire [ 1:0] pipe_tx0_char_is_k , + input wire [15:0] pipe_tx0_data , + input wire pipe_tx0_elec_idle , + input wire [ 1:0] pipe_tx0_powerdown , + + // Pipe Per-Lane Signals - Lane 1 + output wire [ 1:0] pipe_rx1_char_is_k , + output wire [15:0] pipe_rx1_data , + output wire pipe_rx1_valid , + output wire pipe_rx1_chanisaligned , + output wire [ 2:0] pipe_rx1_status , + output wire pipe_rx1_phy_status , + output wire pipe_rx1_elec_idle , + input wire pipe_rx1_polarity , + input wire pipe_tx1_compliance , + input wire [ 1:0] pipe_tx1_char_is_k , + input wire [15:0] pipe_tx1_data , + input wire pipe_tx1_elec_idle , + input wire [ 1:0] pipe_tx1_powerdown , + + // Pipe Per-Lane Signals - Lane 2 + output wire [ 1:0] pipe_rx2_char_is_k , + output wire [15:0] pipe_rx2_data , + output wire pipe_rx2_valid , + output wire pipe_rx2_chanisaligned , + output wire [ 2:0] pipe_rx2_status , + output wire pipe_rx2_phy_status , + output wire pipe_rx2_elec_idle , + input wire pipe_rx2_polarity , + input wire pipe_tx2_compliance , + input wire [ 1:0] pipe_tx2_char_is_k , + input wire [15:0] pipe_tx2_data , + input wire pipe_tx2_elec_idle , + input wire [ 1:0] pipe_tx2_powerdown , + + // Pipe Per-Lane Signals - Lane 3 + output wire [ 1:0] pipe_rx3_char_is_k , + output wire [15:0] pipe_rx3_data , + output wire pipe_rx3_valid , + output wire pipe_rx3_chanisaligned , + output wire [ 2:0] pipe_rx3_status , + output wire pipe_rx3_phy_status , + output wire pipe_rx3_elec_idle , + input wire pipe_rx3_polarity , + input wire pipe_tx3_compliance , + input wire [ 1:0] pipe_tx3_char_is_k , + input wire [15:0] pipe_tx3_data , + input wire pipe_tx3_elec_idle , + input wire [ 1:0] pipe_tx3_powerdown , + + // Pipe Per-Lane Signals - Lane 4 + output wire [ 1:0] pipe_rx4_char_is_k , + output wire [15:0] pipe_rx4_data , + output wire pipe_rx4_valid , + output wire pipe_rx4_chanisaligned , + output wire [ 2:0] pipe_rx4_status , + output wire pipe_rx4_phy_status , + output wire pipe_rx4_elec_idle , + input wire pipe_rx4_polarity , + input wire pipe_tx4_compliance , + input wire [ 1:0] pipe_tx4_char_is_k , + input wire [15:0] pipe_tx4_data , + input wire pipe_tx4_elec_idle , + input wire [ 1:0] pipe_tx4_powerdown , + + // Pipe Per-Lane Signals - Lane 5 + output wire [ 1:0] pipe_rx5_char_is_k , + output wire [15:0] pipe_rx5_data , + output wire pipe_rx5_valid , + output wire pipe_rx5_chanisaligned , + output wire [ 2:0] pipe_rx5_status , + output wire pipe_rx5_phy_status , + output wire pipe_rx5_elec_idle , + input wire pipe_rx5_polarity , + input wire pipe_tx5_compliance , + input wire [ 1:0] pipe_tx5_char_is_k , + input wire [15:0] pipe_tx5_data , + input wire pipe_tx5_elec_idle , + input wire [ 1:0] pipe_tx5_powerdown , + + // Pipe Per-Lane Signals - Lane 6 + output wire [ 1:0] pipe_rx6_char_is_k , + output wire [15:0] pipe_rx6_data , + output wire pipe_rx6_valid , + output wire pipe_rx6_chanisaligned , + output wire [ 2:0] pipe_rx6_status , + output wire pipe_rx6_phy_status , + output wire pipe_rx6_elec_idle , + input wire pipe_rx6_polarity , + input wire pipe_tx6_compliance , + input wire [ 1:0] pipe_tx6_char_is_k , + input wire [15:0] pipe_tx6_data , + input wire pipe_tx6_elec_idle , + input wire [ 1:0] pipe_tx6_powerdown , + + // Pipe Per-Lane Signals - Lane 7 + output wire [ 1:0] pipe_rx7_char_is_k , + output wire [15:0] pipe_rx7_data , + output wire pipe_rx7_valid , + output wire pipe_rx7_chanisaligned , + output wire [ 2:0] pipe_rx7_status , + output wire pipe_rx7_phy_status , + output wire pipe_rx7_elec_idle , + input wire pipe_rx7_polarity , + input wire pipe_tx7_compliance , + input wire [ 1:0] pipe_tx7_char_is_k , + input wire [15:0] pipe_tx7_data , + input wire pipe_tx7_elec_idle , + input wire [ 1:0] pipe_tx7_powerdown , + + // PCI Express signals + output wire [ (LINK_CAP_MAX_LINK_WIDTH-1):0] pci_exp_txn , + output wire [ (LINK_CAP_MAX_LINK_WIDTH-1):0] pci_exp_txp , + input wire [ (LINK_CAP_MAX_LINK_WIDTH-1):0] pci_exp_rxn , + input wire [ (LINK_CAP_MAX_LINK_WIDTH-1):0] pci_exp_rxp , + + // Non PIPE signals + input wire sys_clk , + input wire sys_rst_n , + input wire PIPE_MMCM_RST_N , + output wire pipe_clk , + output wire user_clk , + output wire user_clk2 , + +//----------- Shared Logic Internal-------------------------------------- + + output INT_PCLK_OUT_SLAVE, // PCLK | PCLK + output INT_RXUSRCLK_OUT, // RXUSERCLK + output [(LINK_CAP_MAX_LINK_WIDTH-1):0] INT_RXOUTCLK_OUT, // RX recovered clock + output INT_DCLK_OUT, // DCLK | DCLK + output INT_USERCLK1_OUT, // Optional user clock + output INT_USERCLK2_OUT, // Optional user clock + output INT_OOBCLK_OUT, // OOB | OOB + output INT_MMCM_LOCK_OUT, // Async | Async + output [1:0] INT_QPLLLOCK_OUT, + output [1:0] INT_QPLLOUTCLK_OUT, + output [1:0] INT_QPLLOUTREFCLK_OUT, + input [(LINK_CAP_MAX_LINK_WIDTH-1):0] INT_PCLK_SEL_SLAVE, + + // Shared Logic External + + //---------- External GT COMMON Ports ---------------------- + input [11:0] qpll_drp_crscode, + input [17:0] qpll_drp_fsm, + input [1:0] qpll_drp_done, + input [1:0] qpll_drp_reset, + input [1:0] qpll_qplllock, + input [1:0] qpll_qplloutclk, + input [1:0] qpll_qplloutrefclk, + output qpll_qplld, + output [1:0] qpll_qpllreset, + output qpll_drp_clk, + output qpll_drp_rst_n, + output qpll_drp_ovrd, + output qpll_drp_gen3, + output qpll_drp_start, + + //---------- External Clock Ports ---------------------- + input PIPE_PCLK_IN, // PCLK | PCLK + input PIPE_RXUSRCLK_IN, // RXUSERCLK + input [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_RXOUTCLK_IN, // RX recovered clock + input PIPE_DCLK_IN, // DCLK | DCLK + input PIPE_USERCLK1_IN, // Optional user clock + input PIPE_USERCLK2_IN, // Optional user clock + input PIPE_OOBCLK_IN, // OOB | OOB + input PIPE_MMCM_LOCK_IN, // Async | Async + output PIPE_TXOUTCLK_OUT, // PCLK | PCLK + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_RXOUTCLK_OUT, // RX recovered clock (for debug only) + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_PCLK_SEL_OUT, // PCLK | PCLK + output PIPE_GEN3_OUT , // PCLK | PCLK + +//-----------TRANSCEIVER DEBUG-------------------------------- + + output [4:0] PIPE_RST_FSM, + output [11:0] PIPE_QRST_FSM, + output [(LINK_CAP_MAX_LINK_WIDTH*5)-1:0] PIPE_RATE_FSM, + output [(LINK_CAP_MAX_LINK_WIDTH*6)-1:0] PIPE_SYNC_FSM_TX, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] PIPE_SYNC_FSM_RX, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] PIPE_DRP_FSM, + + output PIPE_RST_IDLE, + output PIPE_QRST_IDLE, + output PIPE_RATE_IDLE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_EYESCANDATAERROR, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] PIPE_RXSTATUS, + output [(LINK_CAP_MAX_LINK_WIDTH*15)-1:0] PIPE_DMONITOROUT, + + //---------- Debug Ports ------------------------------- + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_CPLL_LOCK, + output [(LINK_CAP_MAX_LINK_WIDTH-1)>>2:0] PIPE_QPLL_LOCK, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_RXPMARESETDONE, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] PIPE_RXBUFSTATUS, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_TXPHALIGNDONE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_TXPHINITDONE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_TXDLYSRESETDONE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_RXPHALIGNDONE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_RXDLYSRESETDONE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_RXSYNCDONE, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] PIPE_RXDISPERR, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] PIPE_RXNOTINTABLE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_RXCOMMADET, + + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_0, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_1, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_2, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_3, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_4, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_5, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_6, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_7, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_8, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_9, + output [31:0] PIPE_DEBUG, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_JTAG_RDY, + + input [ 2:0] PIPE_TXPRBSSEL, + input [ 2:0] PIPE_RXPRBSSEL, + input PIPE_TXPRBSFORCEERR, + input PIPE_RXPRBSCNTRESET, + input [ 2:0] PIPE_LOOPBACK, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_RXPRBSERR, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_TXINHIBIT, + + //-----------Channel DRP---------------------------------------- + output ext_ch_gt_drpclk, + input [(LINK_CAP_MAX_LINK_WIDTH*9)-1:0] ext_ch_gt_drpaddr, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpen, + input [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0]ext_ch_gt_drpdi, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpwe, + + output [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0]ext_ch_gt_drpdo, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drprdy, + + output wire phy_rdy_n +); + + + localparam USERCLK2_FREQ = (USER_CLK2_DIV2 == "FALSE") ? USER_CLK_FREQ : + (USER_CLK_FREQ == 4) ? 3 : + (USER_CLK_FREQ == 3) ? 2 : + USER_CLK_FREQ; + + localparam PCIE_LPM_DFE = (PL_FAST_TRAIN == "TRUE") ? "DFE" : "LPM"; + localparam PCIE_LINK_SPEED = (PL_FAST_TRAIN == "TRUE") ? 2 : 3; + + // The parameter PCIE_OOBCLK_MODE_ENABLE value should be "0" for simulation and for synthesis it should be 1 + //localparam PCIE_OOBCLK_MODE_ENABLE = (PL_FAST_TRAIN == "TRUE") ? 0 : 1; + localparam PCIE_OOBCLK_MODE_ENABLE = 1; + + localparam PCIE_TX_EIDLE_ASSERT_DELAY = (PL_FAST_TRAIN == "TRUE") ? 3'd4 : 3'd2; + + wire [ 7:0] gt_rx_phy_status_wire ; + wire [ 7:0] gt_rxchanisaligned_wire ; + wire [ 31:0] gt_rx_data_k_wire ; + wire [255:0] gt_rx_data_wire ; + wire [ 7:0] gt_rx_elec_idle_wire ; + wire [ 23:0] gt_rx_status_wire ; + wire [ 7:0] gt_rx_valid_wire ; + wire [ 7:0] gt_rx_polarity ; + wire [ 15:0] gt_power_down ; + wire [ 7:0] gt_tx_char_disp_mode ; + wire [ 31:0] gt_tx_data_k ; + wire [255:0] gt_tx_data ; + wire gt_tx_detect_rx_loopback ; + wire [ 7:0] gt_tx_elec_idle ; + wire [ 7:0] gt_rx_elec_idle_reset ; + wire [LINK_CAP_MAX_LINK_WIDTH-1:0] phystatus_rst ; + wire clock_locked ; + + wire [ 7:0] gt_rx_phy_status_wire_filter ; + wire [ 31:0] gt_rx_data_k_wire_filter ; + wire [255:0] gt_rx_data_wire_filter ; + wire [ 7:0] gt_rx_elec_idle_wire_filter ; + wire [ 23:0] gt_rx_status_wire_filter ; + wire [ 7:0] gt_rx_valid_wire_filter ; + + wire [LINK_CAP_MAX_LINK_WIDTH-1:0] gt_eyescandataerror ; + wire pipe_clk_int; + reg phy_rdy_n_int; + + reg reg_clock_locked; + wire all_phystatus_rst; + +reg [5:0] pl_ltssm_state_q; + +always @(posedge pipe_clk_int or negedge clock_locked) begin + + if (!clock_locked) + pl_ltssm_state_q <= #TCQ 6'b0; + else + pl_ltssm_state_q <= #TCQ pl_ltssm_state; + +end + + assign pipe_clk = pipe_clk_int ; + + wire plm_in_l0 = (pl_ltssm_state_q == 6'h16); + wire plm_in_rl = (pl_ltssm_state_q == 6'h1c); + wire plm_in_dt = (pl_ltssm_state_q == 6'h2d); + wire plm_in_rs = (pl_ltssm_state_q == 6'h1f); + +//-------------RX FILTER Instantiation----------------------------------------------------------// +genvar i; +generate for (i=0; i= 2 ) ? gt_rx_phy_status_wire[1] : 1'b0; +assign pipe_rx2_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_phy_status_wire[2] : 1'b0; +assign pipe_rx3_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_phy_status_wire[3] : 1'b0; +assign pipe_rx4_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_phy_status_wire[4] : 1'b0; +assign pipe_rx5_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_phy_status_wire[5] : 1'b0; +assign pipe_rx6_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_phy_status_wire[6] : 1'b0; +assign pipe_rx7_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_phy_status_wire[7] : 1'b0; + +assign pipe_rx0_chanisaligned = gt_rxchanisaligned_wire[0]; +assign pipe_rx1_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 2 ) ? gt_rxchanisaligned_wire[1] : 1'b0 ; +assign pipe_rx2_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rxchanisaligned_wire[2] : 1'b0 ; +assign pipe_rx3_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rxchanisaligned_wire[3] : 1'b0 ; +assign pipe_rx4_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rxchanisaligned_wire[4] : 1'b0 ; +assign pipe_rx5_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rxchanisaligned_wire[5] : 1'b0 ; +assign pipe_rx6_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rxchanisaligned_wire[6] : 1'b0 ; +assign pipe_rx7_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rxchanisaligned_wire[7] : 1'b0 ; + +//<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< +//<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< + +generate + if (LINK_CAP_MAX_LINK_WIDTH == 1) + begin : rx_link_width_x1 + + assign pipe_rx0_char_is_k = {gt_rx_data_k_wire[1], gt_rx_data_k_wire[0]}; + assign pipe_rx1_char_is_k = 2'b0 ; + assign pipe_rx2_char_is_k = 2'b0 ; + assign pipe_rx3_char_is_k = 2'b0 ; + assign pipe_rx4_char_is_k = 2'b0 ; + assign pipe_rx5_char_is_k = 2'b0 ; + assign pipe_rx6_char_is_k = 2'b0 ; + assign pipe_rx7_char_is_k = 2'b0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_k_wire[3:2] = 2'b0; + assign gt_rx_data_k_wire[5:4] = 2'b0; + assign gt_rx_data_k_wire[7:6] = 2'b0; + assign gt_rx_data_k_wire[9:8] = 2'b0; + assign gt_rx_data_k_wire[11:10] = 2'b0; + assign gt_rx_data_k_wire[13:12] = 2'b0; + assign gt_rx_data_k_wire[15:14] = 2'b0; + assign gt_rx_data_k_wire[17:16] = 2'b0; + assign gt_rx_data_k_wire[19:18] = 2'b0; + assign gt_rx_data_k_wire[21:20] = 2'b0; + assign gt_rx_data_k_wire[23:22] = 2'b0; + assign gt_rx_data_k_wire[25:24] = 2'b0; + assign gt_rx_data_k_wire[27:26] = 2'b0; + assign gt_rx_data_k_wire[29:28] = 2'b0; + assign gt_rx_data_k_wire[31:30] = 2'b0; + + assign pipe_rx0_data = {gt_rx_data_wire[ 15: 8], gt_rx_data_wire[ 7: 0]}; + assign pipe_rx1_data = 16'h0 ; + assign pipe_rx2_data = 16'h0 ; + assign pipe_rx3_data = 16'h0 ; + assign pipe_rx4_data = 16'h0 ; + assign pipe_rx5_data = 16'h0 ; + assign pipe_rx6_data = 16'h0 ; + assign pipe_rx7_data = 16'h0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_wire[31:16] = 16'b0; + assign gt_rx_data_wire[47:32] = 16'b0; + assign gt_rx_data_wire[63:48] = 16'b0; + assign gt_rx_data_wire[79:64] = 16'b0; + assign gt_rx_data_wire[95:80] = 16'b0; + assign gt_rx_data_wire[111:96] = 16'b0; + assign gt_rx_data_wire[127:112] = 16'b0; + assign gt_rx_data_wire[143:128] = 16'b0; + assign gt_rx_data_wire[159:144] = 16'b0; + assign gt_rx_data_wire[175:160] = 16'b0; + assign gt_rx_data_wire[191:176] = 16'b0; + assign gt_rx_data_wire[207:192] = 16'b0; + assign gt_rx_data_wire[223:208] = 16'b0; + assign gt_rx_data_wire[239:224] = 16'b0; + assign gt_rx_data_wire[255:240] = 16'b0; + + end // rx_link_width_x1 + else if (LINK_CAP_MAX_LINK_WIDTH == 2) + begin : rx_link_width_x2 + + assign pipe_rx0_char_is_k = {gt_rx_data_k_wire[1], gt_rx_data_k_wire[0]}; + assign pipe_rx1_char_is_k = {gt_rx_data_k_wire[5], gt_rx_data_k_wire[4]}; + assign pipe_rx2_char_is_k = 2'b0 ; + assign pipe_rx3_char_is_k = 2'b0 ; + assign pipe_rx4_char_is_k = 2'b0 ; + assign pipe_rx5_char_is_k = 2'b0 ; + assign pipe_rx6_char_is_k = 2'b0 ; + assign pipe_rx7_char_is_k = 2'b0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_k_wire[3:2] = 2'b0; + assign gt_rx_data_k_wire[7:6] = 2'b0; + assign gt_rx_data_k_wire[9:8] = 2'b0; + assign gt_rx_data_k_wire[11:10] = 2'b0; + assign gt_rx_data_k_wire[13:12] = 2'b0; + assign gt_rx_data_k_wire[15:14] = 2'b0; + assign gt_rx_data_k_wire[17:16] = 2'b0; + assign gt_rx_data_k_wire[19:18] = 2'b0; + assign gt_rx_data_k_wire[21:20] = 2'b0; + assign gt_rx_data_k_wire[23:22] = 2'b0; + assign gt_rx_data_k_wire[25:24] = 2'b0; + assign gt_rx_data_k_wire[27:26] = 2'b0; + assign gt_rx_data_k_wire[29:28] = 2'b0; + assign gt_rx_data_k_wire[31:30] = 2'b0; + + assign pipe_rx0_data = {gt_rx_data_wire[15: 8], gt_rx_data_wire[ 7: 0]}; + assign pipe_rx1_data = {gt_rx_data_wire[47:40], gt_rx_data_wire[39:32]} ; + assign pipe_rx2_data = 16'h0 ; + assign pipe_rx3_data = 16'h0 ; + assign pipe_rx4_data = 16'h0 ; + assign pipe_rx5_data = 16'h0 ; + assign pipe_rx6_data = 16'h0 ; + assign pipe_rx7_data = 16'h0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_wire[31:16] = 16'b0; + assign gt_rx_data_wire[63:48] = 16'b0; + assign gt_rx_data_wire[79:64] = 16'b0; + assign gt_rx_data_wire[95:80] = 16'b0; + assign gt_rx_data_wire[111:96] = 16'b0; + assign gt_rx_data_wire[127:112] = 16'b0; + assign gt_rx_data_wire[143:128] = 16'b0; + assign gt_rx_data_wire[159:144] = 16'b0; + assign gt_rx_data_wire[175:160] = 16'b0; + assign gt_rx_data_wire[191:176] = 16'b0; + assign gt_rx_data_wire[207:192] = 16'b0; + assign gt_rx_data_wire[223:208] = 16'b0; + assign gt_rx_data_wire[239:224] = 16'b0; + assign gt_rx_data_wire[255:240] = 16'b0; + + end // rx_link_width_x2 + else if (LINK_CAP_MAX_LINK_WIDTH == 4) + begin : rx_link_width_x4 + + assign pipe_rx0_char_is_k = {gt_rx_data_k_wire[1], gt_rx_data_k_wire[0]}; + assign pipe_rx1_char_is_k = {gt_rx_data_k_wire[5], gt_rx_data_k_wire[4]}; + assign pipe_rx2_char_is_k = {gt_rx_data_k_wire[9], gt_rx_data_k_wire[8]}; + assign pipe_rx3_char_is_k = {gt_rx_data_k_wire[13], gt_rx_data_k_wire[12]}; + assign pipe_rx4_char_is_k = 2'b0 ; + assign pipe_rx5_char_is_k = 2'b0 ; + assign pipe_rx6_char_is_k = 2'b0 ; + assign pipe_rx7_char_is_k = 2'b0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_k_wire[3:2] = 2'b0; + assign gt_rx_data_k_wire[7:6] = 2'b0; + assign gt_rx_data_k_wire[11:10] = 2'b0; + assign gt_rx_data_k_wire[15:14] = 2'b0; + assign gt_rx_data_k_wire[17:16] = 2'b0; + assign gt_rx_data_k_wire[19:18] = 2'b0; + assign gt_rx_data_k_wire[21:20] = 2'b0; + assign gt_rx_data_k_wire[23:22] = 2'b0; + assign gt_rx_data_k_wire[25:24] = 2'b0; + assign gt_rx_data_k_wire[27:26] = 2'b0; + assign gt_rx_data_k_wire[29:28] = 2'b0; + assign gt_rx_data_k_wire[31:30] = 2'b0; + + assign pipe_rx0_data = {gt_rx_data_wire[15: 8], gt_rx_data_wire[ 7: 0]}; + assign pipe_rx1_data = {gt_rx_data_wire[47:40], gt_rx_data_wire[39:32]}; + assign pipe_rx2_data = {gt_rx_data_wire[79:72], gt_rx_data_wire[71:64]}; + assign pipe_rx3_data = {gt_rx_data_wire[111:104], gt_rx_data_wire[103:96]}; + assign pipe_rx4_data = 16'h0 ; + assign pipe_rx5_data = 16'h0 ; + assign pipe_rx6_data = 16'h0 ; + assign pipe_rx7_data = 16'h0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_wire[31:16] = 16'b0; + assign gt_rx_data_wire[63:48] = 16'b0; + assign gt_rx_data_wire[95:80] = 16'b0; + assign gt_rx_data_wire[127:112] = 16'b0; + assign gt_rx_data_wire[143:128] = 16'b0; + assign gt_rx_data_wire[159:144] = 16'b0; + assign gt_rx_data_wire[175:160] = 16'b0; + assign gt_rx_data_wire[191:176] = 16'b0; + assign gt_rx_data_wire[207:192] = 16'b0; + assign gt_rx_data_wire[223:208] = 16'b0; + assign gt_rx_data_wire[239:224] = 16'b0; + assign gt_rx_data_wire[255:240] = 16'b0; + + end // rx_link_width_x4 + else + begin : rx_link_width_x8 + + assign pipe_rx0_char_is_k = {gt_rx_data_k_wire[1], gt_rx_data_k_wire[0]}; + assign pipe_rx1_char_is_k = {gt_rx_data_k_wire[5], gt_rx_data_k_wire[4]}; + assign pipe_rx2_char_is_k = {gt_rx_data_k_wire[9], gt_rx_data_k_wire[8]}; + assign pipe_rx3_char_is_k = {gt_rx_data_k_wire[13], gt_rx_data_k_wire[12]}; + assign pipe_rx4_char_is_k = {gt_rx_data_k_wire[17], gt_rx_data_k_wire[16]}; + assign pipe_rx5_char_is_k = {gt_rx_data_k_wire[21], gt_rx_data_k_wire[20]}; + assign pipe_rx6_char_is_k = {gt_rx_data_k_wire[25], gt_rx_data_k_wire[24]}; + assign pipe_rx7_char_is_k = {gt_rx_data_k_wire[29], gt_rx_data_k_wire[28]}; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_k_wire[3:2] = 2'b0; + assign gt_rx_data_k_wire[7:6] = 2'b0; + assign gt_rx_data_k_wire[11:10] = 2'b0; + assign gt_rx_data_k_wire[15:14] = 2'b0; + assign gt_rx_data_k_wire[19:18] = 2'b0; + assign gt_rx_data_k_wire[23:22] = 2'b0; + assign gt_rx_data_k_wire[27:26] = 2'b0; + assign gt_rx_data_k_wire[31:30] = 2'b0; + + assign pipe_rx0_data = {gt_rx_data_wire[15: 8], gt_rx_data_wire[ 7: 0]}; + assign pipe_rx1_data = {gt_rx_data_wire[47:40], gt_rx_data_wire[39:32]}; + assign pipe_rx2_data = {gt_rx_data_wire[79:72], gt_rx_data_wire[71:64]}; + assign pipe_rx3_data = {gt_rx_data_wire[111:104], gt_rx_data_wire[103:96]}; + assign pipe_rx4_data = {gt_rx_data_wire[143:136], gt_rx_data_wire[135:128]}; + assign pipe_rx5_data = {gt_rx_data_wire[175:168], gt_rx_data_wire[167:160]}; + assign pipe_rx6_data = {gt_rx_data_wire[207:200], gt_rx_data_wire[199:192]}; + assign pipe_rx7_data = {gt_rx_data_wire[239:232], gt_rx_data_wire[231:224]}; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_wire[31:16] = 16'b0; + assign gt_rx_data_wire[63:48] = 16'b0; + assign gt_rx_data_wire[95:80] = 16'b0; + assign gt_rx_data_wire[127:112] = 16'b0; + assign gt_rx_data_wire[159:144] = 16'b0; + assign gt_rx_data_wire[191:176] = 16'b0; + assign gt_rx_data_wire[223:208] = 16'b0; + assign gt_rx_data_wire[255:240] = 16'b0; + + end // rx_link_width_x8 +endgenerate + +assign pipe_rx0_status = gt_rx_status_wire[ 2: 0]; +assign pipe_rx1_status = (LINK_CAP_MAX_LINK_WIDTH >= 2 ) ? gt_rx_status_wire[ 5: 3] : 3'b0 ; +assign pipe_rx2_status = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_status_wire[ 8: 6] : 3'b0 ; +assign pipe_rx3_status = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_status_wire[11: 9] : 3'b0 ; +assign pipe_rx4_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_status_wire[14:12] : 3'b0 ; +assign pipe_rx5_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_status_wire[17:15] : 3'b0 ; +assign pipe_rx6_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_status_wire[20:18] : 3'b0 ; +assign pipe_rx7_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_status_wire[23:21] : 3'b0 ; + +//<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< +//<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< + +assign pipe_rx0_elec_idle = gt_rx_elec_idle_wire[0]; +assign pipe_rx1_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 2 ) ? gt_rx_elec_idle_wire[1] : 1'b1 ; +assign pipe_rx2_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_elec_idle_wire[2] : 1'b1 ; +assign pipe_rx3_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_elec_idle_wire[3] : 1'b1 ; +assign pipe_rx4_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_elec_idle_wire[4] : 1'b1 ; +assign pipe_rx5_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_elec_idle_wire[5] : 1'b1 ; +assign pipe_rx6_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_elec_idle_wire[6] : 1'b1 ; +assign pipe_rx7_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_elec_idle_wire[7] : 1'b1 ; + +assign pipe_rx0_valid = gt_rx_valid_wire[0]; +assign pipe_rx1_valid = (LINK_CAP_MAX_LINK_WIDTH >= 2 ) ? gt_rx_valid_wire[1] : 1'b0 ; +assign pipe_rx2_valid = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_valid_wire[2] : 1'b0 ; +assign pipe_rx3_valid = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_valid_wire[3] : 1'b0 ; +assign pipe_rx4_valid = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_valid_wire[4] : 1'b0 ; +assign pipe_rx5_valid = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_valid_wire[5] : 1'b0 ; +assign pipe_rx6_valid = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_valid_wire[6] : 1'b0 ; +assign pipe_rx7_valid = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_valid_wire[7] : 1'b0 ; + +assign gt_rx_polarity[0] = pipe_rx0_polarity; +assign gt_rx_polarity[1] = pipe_rx1_polarity; +assign gt_rx_polarity[2] = pipe_rx2_polarity; +assign gt_rx_polarity[3] = pipe_rx3_polarity; +assign gt_rx_polarity[4] = pipe_rx4_polarity; +assign gt_rx_polarity[5] = pipe_rx5_polarity; +assign gt_rx_polarity[6] = pipe_rx6_polarity; +assign gt_rx_polarity[7] = pipe_rx7_polarity; + +assign gt_power_down[ 1: 0] = pipe_tx0_powerdown; +assign gt_power_down[ 3: 2] = pipe_tx1_powerdown; +assign gt_power_down[ 5: 4] = pipe_tx2_powerdown; +assign gt_power_down[ 7: 6] = pipe_tx3_powerdown; +assign gt_power_down[ 9: 8] = pipe_tx4_powerdown; +assign gt_power_down[11:10] = pipe_tx5_powerdown; +assign gt_power_down[13:12] = pipe_tx6_powerdown; +assign gt_power_down[15:14] = pipe_tx7_powerdown; + +assign gt_tx_char_disp_mode = {pipe_tx7_compliance, + pipe_tx6_compliance, + pipe_tx5_compliance, + pipe_tx4_compliance, + pipe_tx3_compliance, + pipe_tx2_compliance, + pipe_tx1_compliance, + pipe_tx0_compliance}; + + +assign gt_tx_data_k = {2'd0, + pipe_tx7_char_is_k, + 2'd0, + pipe_tx6_char_is_k, + 2'd0, + pipe_tx5_char_is_k, + 2'd0, + pipe_tx4_char_is_k, + 2'd0, + pipe_tx3_char_is_k, + 2'd0, + pipe_tx2_char_is_k, + 2'd0, + pipe_tx1_char_is_k, + 2'd0, + pipe_tx0_char_is_k}; + +assign gt_tx_data = {16'd0, + pipe_tx7_data, + 16'd0, + pipe_tx6_data, + 16'd0, + pipe_tx5_data, + 16'd0, + pipe_tx4_data, + 16'd0, + pipe_tx3_data, + 16'd0, + pipe_tx2_data, + 16'd0, + pipe_tx1_data, + 16'd0, + pipe_tx0_data}; + +assign gt_tx_detect_rx_loopback = pipe_tx_rcvr_det; + +assign gt_tx_elec_idle = {pipe_tx7_elec_idle, + pipe_tx6_elec_idle, + pipe_tx5_elec_idle, + pipe_tx4_elec_idle, + pipe_tx3_elec_idle, + pipe_tx2_elec_idle, + pipe_tx1_elec_idle, + pipe_tx0_elec_idle}; + +always @(posedge pipe_clk_int or negedge clock_locked) begin + if (!clock_locked) + reg_clock_locked <= #TCQ 1'b0; + else + reg_clock_locked <= #TCQ 1'b1; +end + +always @(posedge pipe_clk_int) begin + if (!reg_clock_locked) + phy_rdy_n_int <= #TCQ 1'b0; + else + phy_rdy_n_int <= #TCQ all_phystatus_rst; +end + +assign all_phystatus_rst = (&phystatus_rst[LINK_CAP_MAX_LINK_WIDTH-1:0]); +assign phy_rdy_n = phy_rdy_n_int; + +endmodule + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_wrapper.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_wrapper.v new file mode 100644 index 0000000000000000000000000000000000000000..2507de4b62b91c93d1d0f8151b37a74532e8ea52 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gt_wrapper.v @@ -0,0 +1,2369 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gt_wrapper.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : gt_wrapper.v +// Description : GT Wrapper Module for 7 Series Transceiver +// Version : 19.0 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- GT Wrapper -------------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gt_wrapper # +( + parameter PCIE_SIM_MODE = "FALSE", // PCIe sim mode + parameter PCIE_SIM_SPEEDUP = "FALSE", // PCIe sim speedup + parameter PCIE_SIM_TX_EIDLE_DRIVE_LEVEL = "1", // PCIe sim TX electrical idle drive level + parameter PCIE_GT_DEVICE = "GTX", // PCIe GT device + parameter PCIE_USE_MODE = "3.0", // PCIe use mode + parameter PCIE_PLL_SEL = "CPLL", // PCIe PLL select for Gen1/Gen2 + parameter PCIE_LPM_DFE = "LPM", // PCIe LPM or DFE mode for Gen1/Gen2 only + parameter PCIE_LPM_DFE_GEN3 = "DFE", // PCIe LPM or DFE mode for Gen3 only + parameter PCIE_ASYNC_EN = "FALSE", // PCIe async enable + parameter PCIE_TXBUF_EN = "FALSE", // PCIe TX buffer enable for Gen1/Gen2 only + parameter PCIE_TXSYNC_MODE = 0, // PCIe TX sync mode + parameter PCIE_RXSYNC_MODE = 0, // PCIe RX sync mode + parameter PCIE_CHAN_BOND = 0, // PCIe channel bonding mode + parameter PCIE_CHAN_BOND_EN = "TRUE", // PCIe channel bonding enable for Gen1/Gen2 only + parameter PCIE_LANE = 1, // PCIe number of lane + parameter PCIE_REFCLK_FREQ = 0, // PCIe reference clock frequency + parameter PCIE_TX_EIDLE_ASSERT_DELAY = 3'd4, // PCIe TX electrical idle assert delay + parameter PCIE_OOBCLK_MODE = 1, // PCIe OOB clock mode + parameter TX_MARGIN_FULL_0 = 7'b1001111, // 1000 mV + parameter TX_MARGIN_FULL_1 = 7'b1001110, // 950 mV + parameter TX_MARGIN_FULL_2 = 7'b1001101, // 900 mV + parameter TX_MARGIN_FULL_3 = 7'b1001100, // 850 mV + parameter TX_MARGIN_FULL_4 = 7'b1000011, // 400 mV + parameter TX_MARGIN_LOW_0 = 7'b1000101, // 500 mV + parameter TX_MARGIN_LOW_1 = 7'b1000110 , // 450 mV + parameter TX_MARGIN_LOW_2 = 7'b1000011, // 400 mV + parameter TX_MARGIN_LOW_3 = 7'b1000010 , // 350 mV + parameter TX_MARGIN_LOW_4 = 7'b1000000 , + parameter PCIE_DEBUG_MODE = 0 // PCIe debug mode +) + +( + //---------- GT User Ports ----------------------------- + input GT_MASTER, + input GT_GEN3, + input GT_RX_CONVERGE, + + //---------- GT Clock Ports ---------------------------- + input GT_GTREFCLK0, + input GT_QPLLCLK, + input GT_QPLLREFCLK, + input GT_TXUSRCLK, + input GT_RXUSRCLK, + input GT_TXUSRCLK2, + input GT_RXUSRCLK2, + input GT_OOBCLK, + input [ 1:0] GT_TXSYSCLKSEL, + input [ 1:0] GT_RXSYSCLKSEL, + input GT_CPLLPDREFCLK, + output GT_TXOUTCLK, + output GT_RXOUTCLK, + output GT_CPLLLOCK, + output GT_RXCDRLOCK, + + //---------- GT Reset Ports ---------------------------- + input GT_CPLLPD, + input GT_CPLLRESET, + input GT_TXUSERRDY, + input GT_RXUSERRDY, + input GT_RESETOVRD, + input GT_GTTXRESET, + input GT_GTRXRESET, + input GT_TXPMARESET, + input GT_RXPMARESET, + input GT_RXCDRRESET, + input GT_RXCDRFREQRESET, + input GT_RXDFELPMRESET, + input GT_EYESCANRESET, + input GT_TXPCSRESET, + input GT_RXPCSRESET, + input GT_RXBUFRESET, + + output GT_EYESCANDATAERROR, + output GT_TXRESETDONE, + output GT_RXRESETDONE, + output GT_RXPMARESETDONE, + + //---------- GT TX Data Ports -------------------------- + input [31:0] GT_TXDATA, + input [ 3:0] GT_TXDATAK, + + output GT_TXP, + output GT_TXN, + + //---------- GT RX Data Ports -------------------------- + input GT_RXN, + input GT_RXP, + + output [31:0] GT_RXDATA, + output [ 3:0] GT_RXDATAK, + + //---------- GT Command Ports -------------------------- + input GT_TXDETECTRX, + input GT_TXELECIDLE, + input GT_TXCOMPLIANCE, + input GT_RXPOLARITY, + input [ 1:0] GT_TXPOWERDOWN, + input [ 1:0] GT_RXPOWERDOWN, + input [ 2:0] GT_TXRATE, + input [ 2:0] GT_RXRATE, + + //---------- GT Electrical Command Ports --------------- + input [ 2:0] GT_TXMARGIN, + input GT_TXSWING, + input GT_TXDEEMPH, + input GT_TXINHIBIT, + input [ 4:0] GT_TXPRECURSOR, + input [ 6:0] GT_TXMAINCURSOR, + input [ 4:0] GT_TXPOSTCURSOR, + + //---------- GT Status Ports --------------------------- + output GT_RXVALID, + output GT_PHYSTATUS, + output GT_RXELECIDLE, + output [ 2:0] GT_RXSTATUS, + output [ 2:0] GT_RXBUFSTATUS, + output GT_TXRATEDONE, + output GT_RXRATEDONE, + + output [7:0] GT_RXDISPERR, + output [7:0] GT_RXNOTINTABLE, + + //---------- GT DRP Ports ------------------------------ + input GT_DRPCLK, + input [ 8:0] GT_DRPADDR, + input GT_DRPEN, + input [15:0] GT_DRPDI, + input GT_DRPWE, + + output [15:0] GT_DRPDO, + output GT_DRPRDY, + + //---------- GT TX Sync Ports -------------------------- + input GT_TXPHALIGN, + input GT_TXPHALIGNEN, + input GT_TXPHINIT, + input GT_TXDLYBYPASS, + input GT_TXDLYSRESET, + input GT_TXDLYEN, + + output GT_TXDLYSRESETDONE, + output GT_TXPHINITDONE, + output GT_TXPHALIGNDONE, + + input GT_TXPHDLYRESET, + input GT_TXSYNCMODE, // GTH + input GT_TXSYNCIN, // GTH + input GT_TXSYNCALLIN, // GTH + + output GT_TXSYNCOUT, // GTH + output GT_TXSYNCDONE, // GTH + + //---------- GT RX Sync Ports -------------------------- + input GT_RXPHALIGN, + input GT_RXPHALIGNEN, + input GT_RXDLYBYPASS, + input GT_RXDLYSRESET, + input GT_RXDLYEN, + input GT_RXDDIEN, + + output GT_RXDLYSRESETDONE, + output GT_RXPHALIGNDONE, + + input GT_RXSYNCMODE, // GTH + input GT_RXSYNCIN, // GTH + input GT_RXSYNCALLIN, // GTH + + output GT_RXSYNCOUT, // GTH + output GT_RXSYNCDONE, // GTH + + //---------- GT Comma Alignment Ports ------------------ + input GT_RXSLIDE, + + output GT_RXCOMMADET, + output [ 3:0] GT_RXCHARISCOMMA, + output GT_RXBYTEISALIGNED, + output GT_RXBYTEREALIGN, + + //---------- GT Channel Bonding Ports ------------------ + input GT_RXCHBONDEN, + input [ 4:0] GT_RXCHBONDI, + input [ 2:0] GT_RXCHBONDLEVEL, + input GT_RXCHBONDMASTER, + input GT_RXCHBONDSLAVE, + + output GT_RXCHANISALIGNED, + output [ 4:0] GT_RXCHBONDO, + + //---------- GT PRBS/Loopback Ports -------------------- + input [ 2:0] GT_TXPRBSSEL, + input [ 2:0] GT_RXPRBSSEL, + input GT_TXPRBSFORCEERR, + input GT_RXPRBSCNTRESET, + input [ 2:0] GT_LOOPBACK, + + output GT_RXPRBSERR, + + //---------- GT Debug Ports ---------------------------- + output [14:0] GT_DMONITOROUT + +); + + //---------- Internal Signals -------------------------- + wire [ 2:0] txoutclksel; + wire [ 2:0] rxoutclksel; + wire [63:0] rxdata; + wire [ 7:0] rxdatak; + wire [ 7:0] rxchariscomma; + wire rxlpmen; + wire [14:0] dmonitorout; + wire dmonitorclk; + + wire cpllpd; + wire cpllrst; + + //---------- Select CPLL and Clock Dividers ------------ + localparam CPLL_REFCLK_DIV = 1; + localparam CPLL_FBDIV_45 = 5; + localparam CPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) ? 2 : + (PCIE_REFCLK_FREQ == 1) ? 4 : 5; + localparam OUT_DIV = (PCIE_PLL_SEL == "QPLL") ? 4 : 2; + localparam CLK25_DIV = (PCIE_REFCLK_FREQ == 2) ? 10 : + (PCIE_REFCLK_FREQ == 1) ? 5 : 4; + + //---------- Select IES vs. GES ------------------------ + localparam CLKMUX_PD = ((PCIE_USE_MODE == "1.0") || (PCIE_USE_MODE == "1.1")) ? 1'd0 : 1'd1; + + //---------- Select GTP CPLL configuration ------------- + // PLL0/1_CFG[ 5:2] = CP1 : [ 8, 4, 2, 1] units + // PLL0/1_CFG[10:6] = CP2 : [16, 8, 4, 2, 1] units + // CP2/CP1 = 2 to 3 + // (8/4=2) = 27'h01F0210 = 0000_0001_1111_0000_0010_0001_0000 + // (9/3=3) = 27'h01F024C = 0000_0001_1111_0000_0010_0100_1100 + // (8/3=2.67) = 27'h01F020C = 0000_0001_1111_0000_0010_0000_1100 + // (7/3=2.33) = 27'h01F01CC = 0000_0001_1111_0000_0001_1100_1100 + // (6/3=2) = 27'h01F018C = 0000_0001_1111_0000_0001_1000_1100 + // (5/3=1.67) = 27'h01F014C = 0000_0001_1111_0000_0001_0100_1100 + // (6/2=3) = 27'h01F0188 = 0000_0001_1111_0000_0001_1000_1000 + //---------- Select GTX CPLL configuration ------------- + // CPLL_CFG[ 5: 2] = CP1 : [ 8, 4, 2, 1] units + // CPLL_CFG[22:18] = CP2 : [16, 8, 4, 2, 1] units + // CP2/CP1 = 2 to 3 + // (9/3=3) = 1010_0100_0000_0111_1100_1100 + //------------------------------------------------------ + localparam CPLL_CFG = ((PCIE_USE_MODE == "1.0") || (PCIE_USE_MODE == "1.1")) ? 24'hB407CC : 24'hA407CC; + + //---------- Select TX XCLK ---------------------------- + // TXOUT for TX Buffer Use + // TXUSR for TX Buffer Bypass + //------------------------------------------------------ + localparam TX_XCLK_SEL = (PCIE_TXBUF_EN == "TRUE") ? "TXOUT" : "TXUSR"; + + //---------- Select TX Receiver Detection Configuration + localparam TX_RXDETECT_CFG = (PCIE_REFCLK_FREQ == 2) ? 14'd250 : + (PCIE_REFCLK_FREQ == 1) ? 14'd125 : 14'd100; + localparam TX_RXDETECT_REF = (((PCIE_USE_MODE == "1.0") || (PCIE_USE_MODE == "1.1")) && (PCIE_SIM_MODE == "FALSE")) ? 3'b000 : 3'b011; + + //---------- Select PCS_RSVD_ATTR ---------------------- + // [0]: 1 = enable latch when bypassing TX buffer, 0 = disable latch when using TX buffer + // [1]: 1 = enable manual TX sync, 0 = enable auto TX sync + // [2]: 1 = enable manual RX sync, 0 = enable auto RX sync + // [3]: 1 = select external clock for OOB 0 = select reference clock for OOB + // [6]: 1 = enable DMON 0 = disable DMON + // [7]: 1 = filter stale TX[P/N] data when exiting TX electrical idle + // [8]: 1 = power up OOB 0 = power down OOB + //------------------------------------------------------ + localparam OOBCLK_SEL = (PCIE_OOBCLK_MODE == 0) ? 1'd0 : 1'd1; // GTX + localparam RXOOB_CLK_CFG = (PCIE_OOBCLK_MODE == 0) ? "PMA" : "FABRIC"; // GTH/GTP + + localparam PCS_RSVD_ATTR = ((PCIE_USE_MODE == "1.0") && (PCIE_TXBUF_EN == "FALSE")) ? {44'h0000000001C, OOBCLK_SEL, 3'd1} : + ((PCIE_USE_MODE == "1.0") && (PCIE_TXBUF_EN == "TRUE" )) ? {44'h0000000001C, OOBCLK_SEL, 3'd0} : + ((PCIE_RXSYNC_MODE == 0) && (PCIE_TXSYNC_MODE == 0) && (PCIE_TXBUF_EN == "FALSE")) ? {44'h0000000001C, OOBCLK_SEL, 3'd7} : + ((PCIE_RXSYNC_MODE == 0) && (PCIE_TXSYNC_MODE == 0) && (PCIE_TXBUF_EN == "TRUE" )) ? {44'h0000000001C, OOBCLK_SEL, 3'd6} : + ((PCIE_RXSYNC_MODE == 0) && (PCIE_TXSYNC_MODE == 1) && (PCIE_TXBUF_EN == "FALSE")) ? {44'h0000000001C, OOBCLK_SEL, 3'd5} : + ((PCIE_RXSYNC_MODE == 0) && (PCIE_TXSYNC_MODE == 1) && (PCIE_TXBUF_EN == "TRUE" )) ? {44'h0000000001C, OOBCLK_SEL, 3'd4} : + ((PCIE_RXSYNC_MODE == 1) && (PCIE_TXSYNC_MODE == 0) && (PCIE_TXBUF_EN == "FALSE")) ? {44'h0000000001C, OOBCLK_SEL, 3'd3} : + ((PCIE_RXSYNC_MODE == 1) && (PCIE_TXSYNC_MODE == 0) && (PCIE_TXBUF_EN == "TRUE" )) ? {44'h0000000001C, OOBCLK_SEL, 3'd2} : + ((PCIE_RXSYNC_MODE == 1) && (PCIE_TXSYNC_MODE == 1) && (PCIE_TXBUF_EN == "FALSE")) ? {44'h0000000001C, OOBCLK_SEL, 3'd1} : + ((PCIE_RXSYNC_MODE == 1) && (PCIE_TXSYNC_MODE == 1) && (PCIE_TXBUF_EN == "TRUE" )) ? {44'h0000000001C, OOBCLK_SEL, 3'd0} : {44'h0000000001C, OOBCLK_SEL, 3'd7}; + + //---------- Select RXCDR_CFG -------------------------- + + //---------- GTX Note ---------------------------------- + // For GTX PCIe Gen1/Gen2 with 8B/10B, the following CDR setting may provide more margin + // Async 72'h03_8000_23FF_1040_0020 + // Sync: 72'h03_0000_23FF_1040_0020 + //------------------------------------------------------ + + localparam RXCDR_CFG_GTX = ((PCIE_USE_MODE == "1.0") || (PCIE_USE_MODE == "1.1")) ? + ((PCIE_ASYNC_EN == "TRUE") ? 72'b0000_0010_0000_0111_1111_1110_0010_0000_0110_0000_0010_0001_0001_0000_0000000000010000 + : 72'h11_07FE_4060_0104_0000): // IES setting + ((PCIE_ASYNC_EN == "TRUE") ? 72'h03_8000_23FF_1020_0020 // + : 72'h03_0000_23FF_1020_0020); // optimized for GES silicon + + localparam RXCDR_CFG_GTH = (PCIE_USE_MODE == "2.0") ? + ((PCIE_ASYNC_EN == "TRUE") ? 83'h0_0011_07FE_4060_2104_1010 + : 83'h0_0011_07FE_4060_0104_1010): // Optimized for IES silicon + ((PCIE_ASYNC_EN == "TRUE") ? 83'h0_0020_07FE_2000_C208_8018 + : 83'h0_0020_07FE_2000_C208_0018); // Optimized for 1.2 silicon + + localparam RXCDR_CFG_GTP = ((PCIE_ASYNC_EN == "TRUE") ? 83'h0_0001_07FE_4060_2104_1010 + : 83'h0_0001_07FE_4060_0104_1010); // Optimized for IES silicon + + + + + //---------- Select TX and RX Sync Mode ---------------- + localparam TXSYNC_OVRD = (PCIE_TXSYNC_MODE == 1) ? 1'd0 : 1'd1; + localparam RXSYNC_OVRD = (PCIE_TXSYNC_MODE == 1) ? 1'd0 : 1'd1; + + localparam TXSYNC_MULTILANE = (PCIE_LANE == 1) ? 1'd0 : 1'd1; + localparam RXSYNC_MULTILANE = (PCIE_LANE == 1) ? 1'd0 : 1'd1; + + //---------- Select Clock Correction Min and Max Latency + // CLK_COR_MIN_LAT = Larger of (2 * RXCHBONDLEVEL + 13) or (CHAN_BOND_MAX_SKEW + 11) + // = 13 when PCIE_LANE = 1 + // CLK_COR_MAX_LAT = CLK_COR_MIN_LAT + CLK_COR_SEQ_LEN + 1 + // = CLK_COR_MIN_LAT + 2 + //------------------------------------------------------ + + //---------- CLK_COR_MIN_LAT Look-up Table ------------- + // Lane | One-Hop | Daisy-Chain | Binary-Tree + //------------------------------------------------------ + // 0 | 13 | 13 | 13 + // 1 | 15 to 18 | 15 to 18 | 15 to 18 + // 2 | 15 to 18 | 17 to 18 | 15 to 18 + // 3 | 15 to 18 | 19 | 17 to 18 + // 4 | 15 to 18 | 21 | 17 to 18 + // 5 | 15 to 18 | 23 | 19 + // 6 | 15 to 18 | 25 | 19 + // 7 | 15 to 18 | 27 | 21 + //------------------------------------------------------ + + localparam CLK_COR_MIN_LAT = ((PCIE_LANE == 8) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 27 : 21) : + ((PCIE_LANE == 7) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 25 : 19) : + ((PCIE_LANE == 6) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 23 : 19) : + ((PCIE_LANE == 5) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 21 : 18) : + ((PCIE_LANE == 4) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 19 : 18) : + ((PCIE_LANE == 3) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 18 : 18) : + ((PCIE_LANE == 2) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 18 : 18) : + ((PCIE_LANE == 1) || (PCIE_CHAN_BOND_EN == "FALSE")) ? 13 : 18; + + localparam CLK_COR_MAX_LAT = CLK_COR_MIN_LAT + 2; + + //---------- Simulation Speedup ------------------------ + //localparam CFOK_CFG_GTH = (PCIE_SIM_MODE == "TRUE") ? 42'h240_0004_0F80 : 42'h248_0004_0E80; // [8] : 1 = Skip CFOK + //localparam CFOK_CFG_GTP = (PCIE_SIM_MODE == "TRUE") ? 43'h000_0000_0000 : 43'h000_0000_0100; // [2] : 1 = Skip CFOK + + //---------- Select [TX/RX]OUTCLK ---------------------- + assign txoutclksel = GT_MASTER ? 3'd3 : 3'd0; + assign rxoutclksel = ((PCIE_DEBUG_MODE == 1) || ((PCIE_ASYNC_EN == "TRUE") && GT_MASTER)) ? 3'd2 : 3'd0; + + //---------- Select DFE vs. LPM ------------------------ + // Gen1/2 = Use LPM by default. Option to use DFE. + // Gen3 = Use DFE by default. Option to use LPM. + //------------------------------------------------------ + assign rxlpmen = GT_GEN3 ? ((PCIE_LPM_DFE_GEN3 == "LPM") ? 1'd1 : 1'd0) : ((PCIE_LPM_DFE == "LPM") ? 1'd1 : 1'd0); + + + +//---------- Generate DMONITOR Clock Buffer for Debug ------ +generate if (PCIE_DEBUG_MODE == 1) + + begin : dmonitorclk_i + //---------- DMONITOR CLK ------------------------------ + BUFG dmonitorclk_i + ( + //---------- Input --------------------------------- + .I (dmonitorout[7]), + //---------- Output -------------------------------- + .O (dmonitorclk) + ); + end + +else + + begin : dmonitorclk_i_disable + assign dmonitorclk = 1'd0; + end + +endgenerate + + +pcie_7x_0_gtx_cpllpd_ovrd cpllPDInst ( + .i_ibufds_gte2(GT_CPLLPDREFCLK), + .o_cpllpd_ovrd(cpllpd), + .o_cpllreset_ovrd(cpllrst)); + +//---------- Select GTX or GTH or GTP ------------------------------------------ +// Notes : Attributes that are commented out always use the GT default settings +//------------------------------------------------------------------------------ +generate if (PCIE_GT_DEVICE == "GTP") + + begin : gtp_channel + + //---------- GTP Channel Module -------------------------------------------- + GTPE2_CHANNEL # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_RESET_SPEEDUP (PCIE_SIM_SPEEDUP), // + .SIM_RECEIVER_DETECT_PASS ("TRUE"), // + .SIM_TX_EIDLE_DRIVE_LEVEL (PCIE_SIM_TX_EIDLE_DRIVE_LEVEL), // + .SIM_VERSION (PCIE_USE_MODE), // + + //---------- Clock Attributes ------------------------------------------ + .TXOUT_DIV (OUT_DIV), // + .RXOUT_DIV (OUT_DIV), // + .TX_CLK25_DIV (CLK25_DIV), // + .RX_CLK25_DIV (CLK25_DIV), // + //.TX_CLKMUX_EN ( 1'b1), // GTP rename + //.RX_CLKMUX_EN ( 1'b1), // GTP rename + .TX_XCLK_SEL (TX_XCLK_SEL), // TXOUT = use TX buffer, TXUSR = bypass TX buffer + .RX_XCLK_SEL ("RXREC"), // RXREC = use RX buffer, RXUSR = bypass RX buffer + //.OUTREFCLK_SEL_INV ( 2'b11), // + + //---------- Reset Attributes ------------------------------------------ + .TXPCSRESET_TIME ( 5'b00001), // + .RXPCSRESET_TIME ( 5'b00001), // + .TXPMARESET_TIME ( 5'b00011), // + .RXPMARESET_TIME ( 5'b00011), // Optimized for sim + //.RXISCANRESET_TIME ( 5'b00001), // + + //---------- TX Data Attributes ---------------------------------------- + .TX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + + //---------- RX Data Attributes ---------------------------------------- + .RX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + + //---------- Command Attributes ---------------------------------------- + .TX_RXDETECT_CFG (TX_RXDETECT_CFG), // + .TX_RXDETECT_REF ( 3'b011), // + .RX_CM_SEL ( 2'd3), // 0 = AVTT, 1 = GND, 2 = Float, 3 = Programmable + .RX_CM_TRIM ( 4'b1010), // Select 800mV, Changed from 3 to 4-bits, optimized for IES + .TX_EIDLE_ASSERT_DELAY (PCIE_TX_EIDLE_ASSERT_DELAY), // Optimized for sim + .TX_EIDLE_DEASSERT_DELAY ( 3'b010), // Optimized for sim + //.PD_TRANS_TIME_FROM_P2 (12'h03C), // + .PD_TRANS_TIME_NONE_P2 ( 8'h09), // + //.PD_TRANS_TIME_TO_P2 ( 8'h64), // + //.TRANS_TIME_RATE ( 8'h0E), // + + //---------- Electrical Command Attributes ----------------------------- + .TX_DRIVE_MODE ("PIPE"), // Gen1/Gen2 = PIPE, Gen3 = PIPEGEN3 + .TX_DEEMPH0 ( 5'b10100), // 6.0 dB + .TX_DEEMPH1 ( 5'b01011), // 3.5 dB + .TX_MARGIN_FULL_0 ( 7'b1001111), // 1000 mV + .TX_MARGIN_FULL_1 ( 7'b1001110), // 950 mV + .TX_MARGIN_FULL_2 ( 7'b1001101), // 900 mV + .TX_MARGIN_FULL_3 ( 7'b1001100), // 850 mV + .TX_MARGIN_FULL_4 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_0 ( 7'b1000101), // 500 mV + .TX_MARGIN_LOW_1 ( 7'b1000110), // 450 mV + .TX_MARGIN_LOW_2 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_3 ( 7'b1000010), // 350 mV + .TX_MARGIN_LOW_4 ( 7'b1000000), // 250 mV + .TX_MAINCURSOR_SEL ( 1'b0), // + .TX_PREDRIVER_MODE ( 1'b0), // GTP + + //---------- Status Attributes ----------------------------------------- + //.RX_SIG_VALID_DLY ( 4), // CHECK + + //---------- DRP Attributes -------------------------------------------- + + //---------- PCS Attributes -------------------------------------------- + .PCS_PCIE_EN ("TRUE"), // PCIe + .PCS_RSVD_ATTR (48'h0000_0000_0100), // [8] : 1 = OOB power-up + + //---------- PMA Attributes ------------------------------------------- + //.CLK_COMMON_SWING ( 1'b0), // GTP new + //.PMA_RSV (32'd0), // + .PMA_RSV2 (32'h00002040), // Optimized for GES + //.PMA_RSV3 ( 2'd0), // + //.PMA_RSV4 ( 4'd0), // Changed from 15 to 4-bits + //.PMA_RSV5 ( 1'd0), // Changed from 4 to 1-bit + //.PMA_RSV6 ( 1'd0), // GTP new + //.PMA_RSV7 ( 1'd0), // GTP new + .RX_BIAS_CFG (16'h0F33), // Optimized for IES + .TERM_RCAL_CFG (15'b100001000010000), // Optimized for IES + .TERM_RCAL_OVRD ( 3'b000), // Optimized for IES + + //---------- TX PI ---------------------------------------------------- + //.TXPI_CFG0 ( 2'd0), // + //.TXPI_CFG1 ( 2'd0), // + //.TXPI_CFG2 ( 2'd0), // + //.TXPI_CFG3 ( 1'd0), // + //.TXPI_CFG4 ( 1'd0), // + //.TXPI_CFG5 ( 3'd000), // + //.TXPI_GREY_SEL ( 1'd0), // + //.TXPI_INVSTROBE_SEL ( 1'd0), // + //.TXPI_PPMCLK_SEL ("TXUSRCLK2"), // + //.TXPI_PPM_CFG ( 8'd0), // + //.TXPI_SYNFREQ_PPM ( 3'd0), // + + //---------- RX PI ----------------------------------------------------- + .RXPI_CFG0 ( 3'd0), // Changed from 3 to 2-bits, Optimized for IES + .RXPI_CFG1 ( 1'd1), // Changed from 2 to 1-bits, Optimized for IES + .RXPI_CFG2 ( 1'd1), // Changed from 2 to 1-bits, Optimized for IES + + //---------- CDR Attributes --------------------------------------------- + //.RXCDR_CFG (72'b0000_001000000_11111_11111_001000000_011_0000111_000_001000_010000_100000000000000), // CHECK + .RXCDR_CFG (RXCDR_CFG_GTP), // Optimized for IES + .RXCDR_LOCK_CFG ( 6'b010101), // [5:3] Window Refresh, [2:1] Window Size, [0] Enable Detection (sensitive lock = 6'b111001) CHECK + .RXCDR_HOLD_DURING_EIDLE ( 1'd1), // Hold RX CDR on electrical idle for Gen1/Gen2 + .RXCDR_FR_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR frequency on electrical idle for Gen3 + .RXCDR_PH_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR phase on electrical idle for Gen3 + //.RXCDRFREQRESET_TIME ( 5'b00001), // + //.RXCDRPHRESET_TIME ( 5'b00001), // + + //---------- LPM Attributes -------------------------------------------- + //.RXLPMRESET_TIME ( 7'b0001111), // GTP new + //.RXLPM_BIAS_STARTUP_DISABLE ( 1'b0), // GTP new + .RXLPM_CFG ( 4'b0110), // GTP new, optimized for IES + //.RXLPM_CFG1 ( 1'b0), // GTP new + //.RXLPM_CM_CFG ( 1'b0), // GTP new + .RXLPM_GC_CFG ( 9'b111100010), // GTP new, optimized for IES + .RXLPM_GC_CFG2 ( 3'b001), // GTP new, optimized for IES + //.RXLPM_HF_CFG (14'b00001111110000), // + .RXLPM_HF_CFG2 ( 5'b01010), // GTP new + //.RXLPM_HF_CFG3 ( 4'b0000), // GTP new + .RXLPM_HOLD_DURING_EIDLE ( 1'b1), // GTP new + .RXLPM_INCM_CFG ( 1'b1), // GTP new, optimized for IES + .RXLPM_IPCM_CFG ( 1'b0), // GTP new, optimized for IES + //.RXLPM_LF_CFG (18'b000000001111110000), // + .RXLPM_LF_CFG2 ( 5'b01010), // GTP new, optimized for IES + .RXLPM_OSINT_CFG ( 3'b100), // GTP new, optimized for IES + + //---------- OS Attributes --------------------------------------------- + .RX_OS_CFG (13'h0080), // CHECK + .RXOSCALRESET_TIME (5'b00011), // Optimized for IES + .RXOSCALRESET_TIMEOUT (5'b00000), // Disable timeout, Optimized for IES + + //---------- Eye Scan Attributes --------------------------------------- + //.ES_CLK_PHASE_SEL ( 1'b0), // + //.ES_CONTROL ( 6'd0), // + //.ES_ERRDET_EN ("FALSE"), // + .ES_EYE_SCAN_EN ("FALSE"), // + //.ES_HORZ_OFFSET (12'd0), // + //.ES_PMA_CFG (10'd0), // + //.ES_PRESCALE ( 5'd0), // + //.ES_QUAL_MASK (80'd0), // + //.ES_QUALIFIER (80'd0), // + //.ES_SDATA_MASK (80'd0), // + //.ES_VERT_OFFSET ( 9'd0), // + + //---------- TX Buffer Attributes -------------------------------------- + .TXBUF_EN (PCIE_TXBUF_EN), // + .TXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + + //---------- RX Buffer Attributes -------------------------------------- + .RXBUF_EN ("TRUE"), // + //.RX_BUFFER_CFG ( 6'd0), // + .RX_DEFER_RESET_BUF_EN ("TRUE"), // + .RXBUF_ADDR_MODE ("FULL"), // + .RXBUF_EIDLE_HI_CNT ( 4'd4), // Optimized for sim + .RXBUF_EIDLE_LO_CNT ( 4'd0), // Optimized for sim + .RXBUF_RESET_ON_CB_CHANGE ("TRUE"), // + .RXBUF_RESET_ON_COMMAALIGN ("FALSE"), // + .RXBUF_RESET_ON_EIDLE ("TRUE"), // PCIe + .RXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + .RXBUF_THRESH_OVRD ("FALSE"), // + .RXBUF_THRESH_OVFLW (61), // + .RXBUF_THRESH_UNDFLW ( 4), // + //.RXBUFRESET_TIME ( 5'b00001), // + + //---------- TX Sync Attributes ---------------------------------------- + .TXPH_CFG (16'h0780), // + .TXPH_MONITOR_SEL ( 5'd0), // + .TXPHDLY_CFG (24'h084020), // [19] : 1 = full range, 0 = half range + .TXDLY_CFG (16'h001F), // + .TXDLY_LCFG ( 9'h030), // + .TXDLY_TAP_CFG (16'd0), // + + .TXSYNC_OVRD (TXSYNC_OVRD), // + .TXSYNC_MULTILANE (TXSYNC_MULTILANE), // + .TXSYNC_SKIP_DA (1'b0), // + + //---------- RX Sync Attributes ---------------------------------------- + .RXPH_CFG (24'd0), // + .RXPH_MONITOR_SEL ( 5'd0), // + .RXPHDLY_CFG (24'h004020), // [19] : 1 = full range, 0 = half range + .RXDLY_CFG (16'h001F), // + .RXDLY_LCFG ( 9'h030), // + .RXDLY_TAP_CFG (16'd0), // + .RX_DDI_SEL ( 6'd0), // + + .RXSYNC_OVRD (RXSYNC_OVRD), // + .RXSYNC_MULTILANE (RXSYNC_MULTILANE), // + .RXSYNC_SKIP_DA (1'b0), // + + //---------- Comma Alignment Attributes -------------------------------- + .ALIGN_COMMA_DOUBLE ("FALSE"), // + .ALIGN_COMMA_ENABLE (10'b1111111111), // PCIe + .ALIGN_COMMA_WORD ( 1), // + .ALIGN_MCOMMA_DET ("TRUE"), // + .ALIGN_MCOMMA_VALUE (10'b1010000011), // + .ALIGN_PCOMMA_DET ("TRUE"), // + .ALIGN_PCOMMA_VALUE (10'b0101111100), // + .DEC_MCOMMA_DETECT ("TRUE"), // + .DEC_PCOMMA_DETECT ("TRUE"), // + .DEC_VALID_COMMA_ONLY ("FALSE"), // PCIe + .SHOW_REALIGN_COMMA ("FALSE"), // PCIe + .RXSLIDE_AUTO_WAIT ( 7), // + .RXSLIDE_MODE ("PMA"), // PCIe + + //---------- Channel Bonding Attributes -------------------------------- + .CHAN_BOND_KEEP_ALIGN ("TRUE"), // PCIe + .CHAN_BOND_MAX_SKEW ( 7), // + .CHAN_BOND_SEQ_LEN ( 4), // PCIe + .CHAN_BOND_SEQ_1_ENABLE ( 4'b1111), // + .CHAN_BOND_SEQ_1_1 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_2 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_3 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_4 (10'b0110111100), // K28.5 (BC) - COM + .CHAN_BOND_SEQ_2_USE ("TRUE"), // PCIe + .CHAN_BOND_SEQ_2_ENABLE (4'b1111), // + .CHAN_BOND_SEQ_2_1 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_2 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_3 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_4 (10'b0110111100), // K28.5 (BC) - COM + .FTS_DESKEW_SEQ_ENABLE ( 4'b1111), // + .FTS_LANE_DESKEW_EN ("TRUE"), // PCIe + .FTS_LANE_DESKEW_CFG ( 4'b1111), // + + //---------- Clock Correction Attributes ------------------------------- + .CBCC_DATA_SOURCE_SEL ("DECODED"), // + .CLK_CORRECT_USE ("TRUE"), // + .CLK_COR_KEEP_IDLE ("TRUE"), // PCIe + .CLK_COR_MAX_LAT (CLK_COR_MAX_LAT), // + .CLK_COR_MIN_LAT (CLK_COR_MIN_LAT), // + .CLK_COR_PRECEDENCE ("TRUE"), // + .CLK_COR_REPEAT_WAIT ( 0), // + .CLK_COR_SEQ_LEN ( 1), // + .CLK_COR_SEQ_1_ENABLE ( 4'b1111), // + .CLK_COR_SEQ_1_1 (10'b0100011100), // K28.0 (1C) - SKP + .CLK_COR_SEQ_1_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_4 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_ENABLE ( 4'b0000), // Disabled + .CLK_COR_SEQ_2_USE ("FALSE"), // + .CLK_COR_SEQ_2_1 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_4 (10'b0000000000), // Disabled + + //---------- 8b10b Attributes ------------------------------------------ + .RX_DISPERR_SEQ_MATCH ("TRUE"), // + + //---------- 64b/66b & 64b/67b Attributes ------------------------------ + .GEARBOX_MODE ( 3'd0), // + .TXGEARBOX_EN ("FALSE"), // + .RXGEARBOX_EN ("FALSE"), // + + //---------- PRBS & Loopback Attributes --------------------------------- + .LOOPBACK_CFG ( 1'd0), // Enable latch when bypassing TX buffer, equivalent to GTX PCS_RSVD_ATTR[0] + .RXPRBS_ERR_LOOPBACK ( 1'd0), // + .TX_LOOPBACK_DRIVE_HIZ ("FALSE"), // + + //---------- OOB & SATA Attributes -------------------------------------- + .TXOOB_CFG ( 1'd1), // Filter stale TX data when exiting TX electrical idle, equivalent to GTX PCS_RSVD_ATTR[7] + //.RXOOB_CFG ( 7'b0000110), // + .RXOOB_CLK_CFG (RXOOB_CLK_CFG), // + //.SAS_MAX_COM (64), // + //.SAS_MIN_COM (36), // + //.SATA_BURST_SEQ_LEN ( 4'b1111), // + //.SATA_BURST_VAL ( 3'b100), // + //.SATA_PLL_CFG ("VCO_3000MHZ"), // + //.SATA_EIDLE_VAL ( 3'b100), // + //.SATA_MAX_BURST ( 8), // + //.SATA_MAX_INIT (21), // + //.SATA_MAX_WAKE ( 7), // + //.SATA_MIN_BURST ( 4), // + //.SATA_MIN_INIT (12), // + //.SATA_MIN_WAKE ( 4), // + + //---------- MISC ------------------------------------------------------ + .DMONITOR_CFG (24'h000B01), // + .RX_DEBUG_CFG (14'h0000), // Optimized for IES + //.TST_RSV (32'd0), // + //.UCODEER_CLR ( 1'd0) // + + //---------- GTP ------------------------------------------------------- + //.ACJTAG_DEBUG_MODE (1'd0), // + //.ACJTAG_MODE (1'd0), // + //.ACJTAG_RESET (1'd0), // + //.ADAPT_CFG0 (20'd0), // + .CFOK_CFG (43'h490_0004_0E80), // Changed from 42 to 43-bits, Optimized for IES + .CFOK_CFG2 ( 7'b010_0000), // Changed from 6 to 7-bits, Optimized for IES + .CFOK_CFG3 ( 7'b010_0000), // Changed from 6 to 7-bits, Optimized for IES + .CFOK_CFG4 ( 1'd0), // GTP new, Optimized for IES + .CFOK_CFG5 ( 2'd0), // GTP new, Optimized for IES + .CFOK_CFG6 ( 4'd0) // GTP new, Optimized for IES + + ) + gtpe2_channel_i + ( + + //---------- Clock ----------------------------------------------------- + .PLL0CLK (GT_QPLLCLK), // + .PLL1CLK (1'd0), // + .PLL0REFCLK (GT_QPLLREFCLK), // + .PLL1REFCLK (1'd0), // + .TXUSRCLK (GT_TXUSRCLK), // + .RXUSRCLK (GT_RXUSRCLK), // + .TXUSRCLK2 (GT_TXUSRCLK2), // + .RXUSRCLK2 (GT_RXUSRCLK2), // + .TXSYSCLKSEL (GT_TXSYSCLKSEL), // + .RXSYSCLKSEL (GT_RXSYSCLKSEL), // + .TXOUTCLKSEL (txoutclksel), // + .RXOUTCLKSEL (rxoutclksel), // + .CLKRSVD0 (1'd0), // + .CLKRSVD1 (1'd0), // + + .TXOUTCLK (GT_TXOUTCLK), // + .RXOUTCLK (GT_RXOUTCLK), // + .TXOUTCLKFABRIC (), // + .RXOUTCLKFABRIC (), // + .TXOUTCLKPCS (), // + .RXOUTCLKPCS (), // + .RXCDRLOCK (GT_RXCDRLOCK), // + + //---------- Reset ----------------------------------------------------- + .TXUSERRDY (GT_TXUSERRDY), // + .RXUSERRDY (GT_RXUSERRDY), // + .CFGRESET (1'd0), // + .GTRESETSEL (1'd0), // + .RESETOVRD (GT_RESETOVRD), // + .GTTXRESET (GT_GTTXRESET), // + .GTRXRESET (GT_GTRXRESET), // + + .TXRESETDONE (GT_TXRESETDONE), // + .RXRESETDONE (GT_RXRESETDONE), // + + //---------- TX Data --------------------------------------------------- + .TXDATA (GT_TXDATA), // + .TXCHARISK (GT_TXDATAK), // + + .GTPTXP (GT_TXP), // GTP + .GTPTXN (GT_TXN), // GTP + + //---------- RX Data --------------------------------------------------- + .GTPRXP (GT_RXP), // GTP + .GTPRXN (GT_RXN), // GTP + + .RXDATA (rxdata[31:0]), // + .RXCHARISK (rxdatak[3:0]), // + + //---------- Command --------------------------------------------------- + .TXDETECTRX (GT_TXDETECTRX), // + .TXPDELECIDLEMODE ( 1'd0), // + .RXELECIDLEMODE ( 2'd0), // + .TXELECIDLE (GT_TXELECIDLE), // + .TXCHARDISPMODE ({3'd0, GT_TXCOMPLIANCE}), // Changed from 8 to 4-bits + .TXCHARDISPVAL ( 4'd0), // Changed from 8 to 4-bits + .TXPOLARITY ( 1'b0), // + .RXPOLARITY (GT_RXPOLARITY), // + .TXPD (GT_TXPOWERDOWN), // + .RXPD (GT_RXPOWERDOWN), // + .TXRATE (GT_TXRATE), // + .RXRATE (GT_RXRATE), // + .TXRATEMODE (1'b0), // + .RXRATEMODE (1'b0), // + + //---------- Electrical Command ---------------------------------------- + .TXMARGIN (GT_TXMARGIN), // + .TXSWING (GT_TXSWING), // + .TXDEEMPH (GT_TXDEEMPH), // + .TXINHIBIT (GT_TXINHIBIT), // + .TXBUFDIFFCTRL (3'b100), // + .TXDIFFCTRL (4'b1100), // Select 850mV + .TXPRECURSOR (GT_TXPRECURSOR), // + .TXPRECURSORINV (1'd0), // + .TXMAINCURSOR (GT_TXMAINCURSOR), // + .TXPOSTCURSOR (GT_TXPOSTCURSOR), // + .TXPOSTCURSORINV (1'd0), // + + //---------- Status ---------------------------------------------------- + .RXVALID (GT_RXVALID), // + .PHYSTATUS (GT_PHYSTATUS), // + .RXELECIDLE (GT_RXELECIDLE), // + .RXSTATUS (GT_RXSTATUS), // + .TXRATEDONE (GT_TXRATEDONE), // + .RXRATEDONE (GT_RXRATEDONE), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (GT_DRPCLK), // + .DRPADDR (GT_DRPADDR), // + .DRPEN (GT_DRPEN), // + .DRPDI (GT_DRPDI), // + .DRPWE (GT_DRPWE), // + + .DRPDO (GT_DRPDO), // + .DRPRDY (GT_DRPRDY), // + + //---------- PMA ------------------------------------------------------- + .TXPMARESET (GT_TXPMARESET), // + .RXPMARESET (GT_RXPMARESET), // + .RXLPMRESET ( 1'd0), // GTP new + .RXLPMOSINTNTRLEN ( 1'd0), // GTP new + .RXLPMHFHOLD ( 1'd0), // + .RXLPMHFOVRDEN ( 1'd0), // + .RXLPMLFHOLD ( 1'd0), // + .RXLPMLFOVRDEN ( 1'd0), // + .PMARSVDIN0 ( 1'd0), // GTP new + .PMARSVDIN1 ( 1'd0), // GTP new + .PMARSVDIN2 ( 1'd0), // GTP new + .PMARSVDIN3 ( 1'd0), // GTP new + .PMARSVDIN4 ( 1'd0), // GTP new + .GTRSVD (16'd0), // + + .PMARSVDOUT0 (), // GTP new + .PMARSVDOUT1 (), // GTP new + .DMONITOROUT (dmonitorout), // GTP 15-bits + + //---------- PCS ------------------------------------------------------- + .TXPCSRESET (GT_TXPCSRESET), // + .RXPCSRESET (GT_RXPCSRESET), // + .PCSRSVDIN (16'd0), // [0]: 1 = TXRATE async, [1]: 1 = RXRATE async + + .PCSRSVDOUT (), // + + //---------- CDR ------------------------------------------------------- + .RXCDRRESET (GT_RXCDRRESET), // + .RXCDRRESETRSV (1'd0), // + .RXCDRFREQRESET (GT_RXCDRFREQRESET), // + .RXCDRHOLD (1'b0), // + .RXCDROVRDEN (1'd0), // + + //---------- PI -------------------------------------------------------- + .TXPIPPMEN (1'd0), // + .TXPIPPMOVRDEN (1'd0), // + .TXPIPPMPD (1'd0), // + .TXPIPPMSEL (1'd0), // + .TXPIPPMSTEPSIZE (5'd0), // + .TXPISOPD (1'd0), // GTP new + + //---------- DFE ------------------------------------------------------- + .RXDFEXYDEN (1'd0), // + + //---------- OS -------------------------------------------------------- + .RXOSHOLD (1'd0), // Optimized for IES + .RXOSOVRDEN (1'd0), // Optimized for IES + .RXOSINTEN (1'd1), // Optimized for IES + .RXOSINTHOLD (1'd0), // Optimized for IES + .RXOSINTNTRLEN (1'd0), // Optimized for IES + .RXOSINTOVRDEN (1'd0), // Optimized for IES + .RXOSINTPD (1'd0), // GTP new, Optimized for IES + .RXOSINTSTROBE (1'd0), // Optimized for IES + .RXOSINTTESTOVRDEN (1'd0), // Optimized for IES + .RXOSINTCFG (4'b0010), // Optimized for IES + .RXOSINTID0 (4'd0), // Optimized for IES + + .RXOSINTDONE (), // + .RXOSINTSTARTED (), // + .RXOSINTSTROBEDONE (), // + .RXOSINTSTROBESTARTED (), // + + //---------- Eye Scan -------------------------------------------------- + .EYESCANRESET (GT_EYESCANRESET), // + .EYESCANMODE (1'd0), // + .EYESCANTRIGGER (1'b0), // + + .EYESCANDATAERROR (GT_EYESCANDATAERROR), // + + //---------- TX Buffer ------------------------------------------------- + .TXBUFSTATUS (), // + + //---------- RX Buffer ------------------------------------------------- + .RXBUFRESET (GT_RXBUFRESET), // + + .RXBUFSTATUS (GT_RXBUFSTATUS), // + + //---------- TX Sync --------------------------------------------------- + .TXPHDLYRESET (GT_TXPHDLYRESET), // + .TXPHDLYTSTCLK (1'd0), // + .TXPHALIGN (GT_TXPHALIGN), // + .TXPHALIGNEN (GT_TXPHALIGNEN), // + .TXPHDLYPD (1'd0), // + .TXPHINIT (GT_TXPHINIT), // + .TXPHOVRDEN (1'd0), // + .TXDLYBYPASS (GT_TXDLYBYPASS), // + .TXDLYSRESET (GT_TXDLYSRESET), // + .TXDLYEN (GT_TXDLYEN), // + .TXDLYOVRDEN (1'd0), // + .TXDLYHOLD (1'd0), // + .TXDLYUPDOWN (1'd0), // + + .TXPHALIGNDONE (GT_TXPHALIGNDONE), // + .TXPHINITDONE (GT_TXPHINITDONE), // + .TXDLYSRESETDONE (GT_TXDLYSRESETDONE), // + + .TXSYNCMODE (GT_TXSYNCMODE), // + .TXSYNCIN (GT_TXSYNCIN), // + .TXSYNCALLIN (GT_TXSYNCALLIN), // + + .TXSYNCDONE (GT_TXSYNCDONE), // + .TXSYNCOUT (GT_TXSYNCOUT), // + + //---------- RX Sync --------------------------------------------------- + .RXPHDLYRESET (1'd0), // + .RXPHALIGN (GT_RXPHALIGN), // + .RXPHALIGNEN (GT_RXPHALIGNEN), // + .RXPHDLYPD (1'd0), // + .RXPHOVRDEN (1'd0), // + .RXDLYBYPASS (GT_RXDLYBYPASS), // + .RXDLYSRESET (GT_RXDLYSRESET), // + .RXDLYEN (GT_RXDLYEN), // + .RXDLYOVRDEN (1'd0), // + .RXDDIEN (GT_RXDDIEN), // + + .RXPHALIGNDONE (GT_RXPHALIGNDONE), // + .RXPHMONITOR (), // + .RXPHSLIPMONITOR (), // + .RXDLYSRESETDONE (GT_RXDLYSRESETDONE), // + + .RXSYNCMODE (GT_RXSYNCMODE), // + .RXSYNCIN (GT_RXSYNCIN), // + .RXSYNCALLIN (GT_RXSYNCALLIN), // + + .RXSYNCDONE (GT_RXSYNCDONE), // + .RXSYNCOUT (GT_RXSYNCOUT), // + + //---------- Comma Alignment ------------------------------------------- + .RXCOMMADETEN (1'd1), // + .RXMCOMMAALIGNEN (1'd1), // No Gen3 support in GTP + .RXPCOMMAALIGNEN (1'd1), // No Gen3 support in GTP + .RXSLIDE (GT_RXSLIDE), // + .RXCOMMADET (GT_RXCOMMADET), // + .RXCHARISCOMMA (rxchariscomma[3:0]), // + .RXBYTEISALIGNED (GT_RXBYTEISALIGNED), // + .RXBYTEREALIGN (GT_RXBYTEREALIGN), // + + //---------- Channel Bonding ------------------------------------------- + .RXCHBONDEN (GT_RXCHBONDEN), // + .RXCHBONDI (GT_RXCHBONDI[3:0]), // + .RXCHBONDLEVEL (GT_RXCHBONDLEVEL), // + .RXCHBONDMASTER (GT_RXCHBONDMASTER), // + .RXCHBONDSLAVE (GT_RXCHBONDSLAVE), // + + .RXCHANBONDSEQ (), // + .RXCHANISALIGNED (GT_RXCHANISALIGNED), // + .RXCHANREALIGN (), // + .RXCHBONDO (GT_RXCHBONDO[3:0]), // + + //---------- Clock Correction ----------------------------------------- + .RXCLKCORCNT (), // + + //---------- 8b10b ----------------------------------------------------- + .TX8B10BBYPASS (4'd0), // + .TX8B10BEN (1'b1), // No Gen3 support in GTP + .RX8B10BEN (1'b1), // No Gen3 support in GTP + + .RXDISPERR (GT_RXDISPERR[3:0]), // + .RXNOTINTABLE (GT_RXNOTINTABLE[3:0]), // + + //---------- 64b/66b & 64b/67b ----------------------------------------- + .TXHEADER (3'd0), // + .TXSEQUENCE (7'd0), // + .TXSTARTSEQ (1'd0), // + .RXGEARBOXSLIP (1'd0), // + + .TXGEARBOXREADY (), // + .RXDATAVALID (), // + .RXHEADER (), // + .RXHEADERVALID (), // + .RXSTARTOFSEQ (), // + + //---------- PRBS/Loopback --------------------------------------------- + .TXPRBSSEL (GT_TXPRBSSEL), // + .RXPRBSSEL (GT_RXPRBSSEL), // + .TXPRBSFORCEERR (GT_TXPRBSFORCEERR), // + .RXPRBSCNTRESET (GT_RXPRBSCNTRESET), // + .LOOPBACK (GT_LOOPBACK), // + + .RXPRBSERR (GT_RXPRBSERR), // + + //---------- OOB ------------------------------------------------------- + .SIGVALIDCLK (GT_OOBCLK), // Optimized for debug + .TXCOMINIT (1'd0), // + .TXCOMSAS (1'd0), // + .TXCOMWAKE (1'd0), // + .RXOOBRESET (1'd0), // + + .TXCOMFINISH (), // + .RXCOMINITDET (), // + .RXCOMSASDET (), // + .RXCOMWAKEDET (), // + + //---------- MISC ------------------------------------------------------ + .SETERRSTATUS ( 1'd0), // + .TXDIFFPD ( 1'd0), // + .TSTIN (20'hFFFFF), // + + //---------- GTP ------------------------------------------------------- + .RXADAPTSELTEST (14'd0), // + .DMONFIFORESET ( 1'd0), // + .DMONITORCLK (dmonitorclk), // + .RXOSCALRESET ( 1'd0), // + + .RXPMARESETDONE (GT_RXPMARESETDONE), // GTP + .TXPMARESETDONE () // + + ); + + assign GT_CPLLLOCK = 1'b0; + + end + +else if (PCIE_GT_DEVICE == "GTH") + + begin : gth_channel + + //---------- GTH Channel Module -------------------------------------------- + GTHE2_CHANNEL # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_CPLLREFCLK_SEL (3'b001), // + .SIM_RESET_SPEEDUP (PCIE_SIM_SPEEDUP), // + .SIM_RECEIVER_DETECT_PASS ("TRUE"), // + .SIM_TX_EIDLE_DRIVE_LEVEL (PCIE_SIM_TX_EIDLE_DRIVE_LEVEL), // + .SIM_VERSION ("2.0"), // + + //---------- Clock Attributes ------------------------------------------ + .CPLL_REFCLK_DIV (CPLL_REFCLK_DIV), // + .CPLL_FBDIV_45 (CPLL_FBDIV_45), // + .CPLL_FBDIV (CPLL_FBDIV), // + .TXOUT_DIV (OUT_DIV), // + .RXOUT_DIV (OUT_DIV), // + .TX_CLK25_DIV (CLK25_DIV), // + .RX_CLK25_DIV (CLK25_DIV), // + .TX_CLKMUX_PD ( 1'b1), // GTH + .RX_CLKMUX_PD ( 1'b1), // GTH + .TX_XCLK_SEL (TX_XCLK_SEL), // TXOUT = use TX buffer, TXUSR = bypass TX buffer + .RX_XCLK_SEL ("RXREC"), // RXREC = use RX buffer, RXUSR = bypass RX buffer + .OUTREFCLK_SEL_INV ( 2'b11), // + .CPLL_CFG (29'h00A407CC), // Changed from 24 to 29-bits, Optimized for PCIe PLL BW + .CPLL_INIT_CFG (24'h00001E), // Optimized for IES + .CPLL_LOCK_CFG (16'h01E8), // Optimized for IES + //.USE_PCS_CLK_PHASE_SEL ( 1'd0) // GTH new + + //---------- Reset Attributes ------------------------------------------ + .TXPCSRESET_TIME (5'b00001), // + .RXPCSRESET_TIME (5'b00001), // + .TXPMARESET_TIME (5'b00011), // + .RXPMARESET_TIME (5'b00011), // Optimized for sim and for DRP + //.RXISCANRESET_TIME (5'b00001), // + //.RESET_POWERSAVE_DISABLE ( 1'd0), // GTH new + + //---------- TX Data Attributes ---------------------------------------- + .TX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + .TX_INT_DATAWIDTH ( 0), // 2-byte internal datawidth for Gen1/Gen2 + + //---------- RX Data Attributes ---------------------------------------- + .RX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + .RX_INT_DATAWIDTH ( 0), // 2-byte internal datawidth for Gen1/Gen2 + + //---------- Command Attributes ---------------------------------------- + .TX_RXDETECT_CFG (TX_RXDETECT_CFG), // + .TX_RXDETECT_PRECHARGE_TIME (17'h00001), // GTH new, Optimized for sim + .TX_RXDETECT_REF ( 3'b011), // + .RX_CM_SEL ( 2'b11), // 0 = AVTT, 1 = GND, 2 = Float, 3 = Programmable, optimized for silicon + .RX_CM_TRIM ( 4'b1010), // Select 800mV, Changed from 3 to 4-bits, optimized for silicon + .TX_EIDLE_ASSERT_DELAY (PCIE_TX_EIDLE_ASSERT_DELAY), // Optimized for sim (3'd4) + .TX_EIDLE_DEASSERT_DELAY ( 3'b100), // Optimized for sim + //.PD_TRANS_TIME_FROM_P2 (12'h03C), // + .PD_TRANS_TIME_NONE_P2 ( 8'h09), // Optimized for sim + //.PD_TRANS_TIME_TO_P2 ( 8'h64), // + //.TRANS_TIME_RATE ( 8'h0E), // + + //---------- Electrical Command Attributes ----------------------------- + .TX_DRIVE_MODE ("PIPE"), // Gen1/Gen2 = PIPE, Gen3 = PIPEGEN3 + .TX_DEEMPH0 ( 6'b010100), // 6.0 dB, optimized for compliance, changed from 5 to 6-bits + .TX_DEEMPH1 ( 6'b001011), // 3.5 dB, optimized for compliance, changed from 5 to 6-bits + .TX_MARGIN_FULL_0 ( 7'b1001111), // 1000 mV + .TX_MARGIN_FULL_1 ( 7'b1001110), // 950 mV + .TX_MARGIN_FULL_2 ( 7'b1001101), // 900 mV + .TX_MARGIN_FULL_3 ( 7'b1001100), // 850 mV + .TX_MARGIN_FULL_4 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_0 ( 7'b1000101), // 500 mV + .TX_MARGIN_LOW_1 ( 7'b1000110), // 450 mV + .TX_MARGIN_LOW_2 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_3 ( 7'b1000010), // 350 mV + .TX_MARGIN_LOW_4 ( 7'b1000000), // 250 mV + .TX_MAINCURSOR_SEL ( 1'b0), // + .TX_QPI_STATUS_EN ( 1'b0), // + + //---------- Status Attributes ----------------------------------------- + .RX_SIG_VALID_DLY (4), // Optimized for sim + + //---------- DRP Attributes -------------------------------------------- + + //---------- PCS Attributes -------------------------------------------- + .PCS_PCIE_EN ("TRUE"), // PCIe + .PCS_RSVD_ATTR (48'h0000_0000_0140), // [8] : 1 = OOB power-up, [6] : 1 = DMON enable, Optimized for IES + + //---------- PMA Attributes -------------------------------------------- + .PMA_RSV (32'h00000080), // Optimized for IES + .PMA_RSV2 (32'h1C00000A), // Changed from 16 to 32-bits, Optimized for IES + //.PMA_RSV3 ( 2'h0), // + .PMA_RSV4 (15'h0008), // GTH new, Optimized for IES + //.PMA_RSV5 ( 4'h00), // GTH new + .RX_BIAS_CFG (24'h0C0010), // Changed from 12 to 24-bits, Optimized for IES + .TERM_RCAL_CFG (15'b100001000010000), // Changed from 5 to 15-bits, Optimized for IES + .TERM_RCAL_OVRD ( 3'b000), // Changed from 1 to 3-bits, Optimized for IES + + //---------- TX PI ----------------------------------------------------- + //.TXPI_CFG0 ( 2'd0), // GTH new + //.TXPI_CFG1 ( 2'd0), // GTH new + //.TXPI_CFG2 ( 2'd0), // GTH new + //.TXPI_CFG3 ( 1'd0), // GTH new + //.TXPI_CFG4 ( 1'd0), // GTH new + //.TXPI_CFG5 ( 3'b100), // GTH new + //.TXPI_GREY_SEL ( 1'd0), // GTH new + //.TXPI_INVSTROBE_SEL ( 1'd0), // GTH new + //.TXPI_PPMCLK_SEL ("TXUSRCLK2"), // GTH new + //.TXPI_PPM_CFG ( 8'd0), // GTH new + //.TXPI_SYNFREQ_PPM ( 3'd0), // GTH new + + //---------- RX PI ----------------------------------------------------- + .RXPI_CFG0 (2'b00), // GTH new + .RXPI_CFG1 (2'b11), // GTH new + .RXPI_CFG2 (2'b11), // GTH new + .RXPI_CFG3 (2'b11), // GTH new + .RXPI_CFG4 (1'b0), // GTH new + .RXPI_CFG5 (1'b0), // GTH new + .RXPI_CFG6 (3'b100), // GTH new + + //---------- CDR Attributes -------------------------------------------- + .RXCDR_CFG (RXCDR_CFG_GTH), // + //.RXCDR_CFG (83'h0_0011_07FE_4060_0104_1010), // A. Changed from 72 to 83-bits, optimized for IES div1 (Gen2), +/-000ppm, default, converted from GTX GES VnC,(2 Gen1) + //.RXCDR_CFG (83'h0_0011_07FE_4060_2104_1010), // B. Changed from 72 to 83-bits, optimized for IES div1 (Gen2), +/-300ppm, default, converted from GTX GES VnC,(2 Gen1) + //.RXCDR_CFG (83'h0_0011_07FE_2060_0104_1010), // C. Changed from 72 to 83-bits, optimized for IES div1 (Gen2), +/-000ppm, converted from GTX GES recommended, (3 Gen1) + //.RXCDR_CFG (83'h0_0011_07FE_2060_2104_1010), // D. Changed from 72 to 83-bits, optimized for IES div1 (Gen2), +/-300ppm, converted from GTX GES recommended, (3 Gen1) + //.RXCDR_CFG (83'h0_0001_07FE_1060_0110_1010), // E. Changed from 72 to 83-bits, optimized for IES div2 (Gen1), +/-000ppm, default, (3 Gen2) + //.RXCDR_CFG (83'h0_0001_07FE_1060_2110_1010), // F. Changed from 72 to 83-bits, optimized for IES div2 (Gen1), +/-300ppm, default, (3 Gen2) + //.RXCDR_CFG (83'h0_0011_07FE_1060_0110_1010), // G. Changed from 72 to 83-bits, optimized for IES div2 (Gen1), +/-000ppm, converted from GTX GES recommended, (3 Gen2) + //.RXCDR_CFG (83'h0_0011_07FE_1060_2110_1010), // H. Changed from 72 to 83-bits, optimized for IES div2 (Gen1), +/-300ppm, converted from GTX GES recommended, (2 Gen1) + .RXCDR_LOCK_CFG ( 6'b010101), // [5:3] Window Refresh, [2:1] Window Size, [0] Enable Detection (sensitive lock = 6'b111001) + .RXCDR_HOLD_DURING_EIDLE ( 1'd1), // Hold RX CDR on electrical idle for Gen1/Gen2 + .RXCDR_FR_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR frequency on electrical idle for Gen3 + .RXCDR_PH_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR phase on electrical idle for Gen3 + //.RXCDRFREQRESET_TIME ( 5'b00001), // optimized for IES + //.RXCDRPHRESET_TIME ( 5'b00001), // optimized for IES + + //---------- LPM Attributes -------------------------------------------- + .RXLPM_HF_CFG (14'h0200), // Optimized for IES + .RXLPM_LF_CFG (18'h09000), // Changed from 14 to 18-bits, Optimized for IES + + //---------- DFE Attributes -------------------------------------------- + .RXDFELPMRESET_TIME ( 7'h0F), // Optimized for IES + .RX_DFE_AGC_CFG0 ( 2'h0), // GTH new, optimized for IES + .RX_DFE_AGC_CFG1 ( 3'h4), // GTH new, optimized for IES, DFE + .RX_DFE_AGC_CFG2 ( 4'h0), // GTH new, optimized for IES + .RX_DFE_AGC_OVRDEN ( 1'h1), // GTH new, optimized for IES + .RX_DFE_GAIN_CFG (23'h0020C0), // Optimized for IES + .RX_DFE_H2_CFG (12'h000), // Optimized for IES + .RX_DFE_H3_CFG (12'h040), // Optimized for IES + .RX_DFE_H4_CFG (11'h0E0), // Optimized for IES + .RX_DFE_H5_CFG (11'h0E0), // Optimized for IES + .RX_DFE_H6_CFG (11'h020), // GTH new, optimized for IES + .RX_DFE_H7_CFG (11'h020), // GTH new, optimized for IES + .RX_DFE_KL_CFG (33'h000000310), // Changed from 13 to 33-bits, optimized for IES + .RX_DFE_KL_LPM_KH_CFG0 ( 2'h2), // GTH new, optimized for IES, DFE + .RX_DFE_KL_LPM_KH_CFG1 ( 3'h2), // GTH new, optimized for IES + .RX_DFE_KL_LPM_KH_CFG2 ( 4'h2), // GTH new, optimized for IES + .RX_DFE_KL_LPM_KH_OVRDEN ( 1'h1), // GTH new, optimized for IES + .RX_DFE_KL_LPM_KL_CFG0 ( 2'h2), // GTH new, optimized for IES, DFE + .RX_DFE_KL_LPM_KL_CFG1 ( 3'h2), // GTH new, optimized for IES + .RX_DFE_KL_LPM_KL_CFG2 ( 4'h2), // GTH new, optimized for IES + .RX_DFE_KL_LPM_KL_OVRDEN ( 1'b1), // GTH new, optimized for IES + .RX_DFE_LPM_CFG (16'h0080), // Optimized for IES + .RX_DFELPM_CFG0 ( 4'h6), // GTH new, optimized for IES + .RX_DFELPM_CFG1 ( 4'h0), // GTH new, optimized for IES + .RX_DFELPM_KLKH_AGC_STUP_EN ( 1'h1), // GTH new, optimized for IES + .RX_DFE_LPM_HOLD_DURING_EIDLE ( 1'h1), // PCIe use mode + .RX_DFE_ST_CFG (54'h00_C100_000C_003F), // GTH new, optimized for IES + .RX_DFE_UT_CFG (17'h03800), // Optimized for IES + .RX_DFE_VP_CFG (17'h03AA3), // Optimized for IES + + //---------- OS Attributes --------------------------------------------- + .RX_OS_CFG (13'h0080), // Optimized for IES + .A_RXOSCALRESET ( 1'd0), // GTH new, optimized for IES + .RXOSCALRESET_TIME ( 5'b00011), // GTH new, optimized for IES + .RXOSCALRESET_TIMEOUT ( 5'b00000), // GTH new, disable timeout, optimized for IES + + //---------- Eye Scan Attributes --------------------------------------- + //.ES_CLK_PHASE_SEL ( 1'd0), // GTH new + //.ES_CONTROL ( 6'd0), // + //.ES_ERRDET_EN ("FALSE"), // + .ES_EYE_SCAN_EN ("FALSE"), // Optimized for IES + .ES_HORZ_OFFSET (12'h000), // Optimized for IES + //.ES_PMA_CFG (10'd0), // + //.ES_PRESCALE ( 5'd0), // + //.ES_QUAL_MASK (80'd0), // + //.ES_QUALIFIER (80'd0), // + //.ES_SDATA_MASK (80'd0), // + //.ES_VERT_OFFSET ( 9'd0), // + + //---------- TX Buffer Attributes -------------------------------------- + .TXBUF_EN (PCIE_TXBUF_EN), // + .TXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + + //---------- RX Buffer Attributes -------------------------------------- + .RXBUF_EN ("TRUE"), // + //.RX_BUFFER_CFG ( 6'd0), // + .RX_DEFER_RESET_BUF_EN ("TRUE"), // + .RXBUF_ADDR_MODE ("FULL"), // + .RXBUF_EIDLE_HI_CNT ( 4'd4), // Optimized for sim + .RXBUF_EIDLE_LO_CNT ( 4'd0), // Optimized for sim + .RXBUF_RESET_ON_CB_CHANGE ("TRUE"), // + .RXBUF_RESET_ON_COMMAALIGN ("FALSE"), // + .RXBUF_RESET_ON_EIDLE ("TRUE"), // PCIe + .RXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + .RXBUF_THRESH_OVRD ("FALSE"), // + .RXBUF_THRESH_OVFLW (61), // + .RXBUF_THRESH_UNDFLW ( 4), // + //.RXBUFRESET_TIME ( 5'b00001), // + + //---------- TX Sync Attributes ---------------------------------------- + //.TXPH_CFG (16'h0780), // + .TXPH_MONITOR_SEL ( 5'd0), // + //.TXPHDLY_CFG (24'h084020), // [19] : 1 = full range, 0 = half range + //.TXDLY_CFG (16'h001F), // + //.TXDLY_LCFG ( 9'h030), // + //.TXDLY_TAP_CFG (16'd0), // + + .TXSYNC_OVRD (TXSYNC_OVRD), // GTH new + .TXSYNC_MULTILANE (TXSYNC_MULTILANE), // GTH new + .TXSYNC_SKIP_DA (1'b0), // GTH new + + //---------- RX Sync Attributes ---------------------------------------- + //.RXPH_CFG (24'd0), // + .RXPH_MONITOR_SEL ( 5'd0), // + .RXPHDLY_CFG (24'h004020), // [19] : 1 = full range, 0 = half range + //.RXDLY_CFG (16'h001F), // + //.RXDLY_LCFG ( 9'h030), // + //.RXDLY_TAP_CFG (16'd0), // + .RX_DDI_SEL ( 6'd0), // + + .RXSYNC_OVRD (RXSYNC_OVRD), // GTH new + .RXSYNC_MULTILANE (RXSYNC_MULTILANE), // GTH new + .RXSYNC_SKIP_DA (1'b0), // GTH new + + //---------- Comma Alignment Attributes -------------------------------- + .ALIGN_COMMA_DOUBLE ("FALSE"), // + .ALIGN_COMMA_ENABLE (10'b1111111111), // PCIe + .ALIGN_COMMA_WORD ( 1), // + .ALIGN_MCOMMA_DET ("TRUE"), // + .ALIGN_MCOMMA_VALUE (10'b1010000011), // + .ALIGN_PCOMMA_DET ("TRUE"), // + .ALIGN_PCOMMA_VALUE (10'b0101111100), // + .DEC_MCOMMA_DETECT ("TRUE"), // + .DEC_PCOMMA_DETECT ("TRUE"), // + .DEC_VALID_COMMA_ONLY ("FALSE"), // PCIe + .SHOW_REALIGN_COMMA ("FALSE"), // PCIe + .RXSLIDE_AUTO_WAIT ( 7), // + .RXSLIDE_MODE ("PMA"), // PCIe + + //---------- Channel Bonding Attributes -------------------------------- + .CHAN_BOND_KEEP_ALIGN ("TRUE"), // PCIe + .CHAN_BOND_MAX_SKEW ( 7), // + .CHAN_BOND_SEQ_LEN ( 4), // PCIe + .CHAN_BOND_SEQ_1_ENABLE ( 4'b1111), // + .CHAN_BOND_SEQ_1_1 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_2 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_3 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_4 (10'b0110111100), // K28.5 (BC) - COM + .CHAN_BOND_SEQ_2_USE ("TRUE"), // PCIe + .CHAN_BOND_SEQ_2_ENABLE ( 4'b1111), // + .CHAN_BOND_SEQ_2_1 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_2 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_3 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_4 (10'b0110111100), // K28.5 (BC) - COM + .FTS_DESKEW_SEQ_ENABLE ( 4'b1111), // + .FTS_LANE_DESKEW_EN ("TRUE"), // PCIe + .FTS_LANE_DESKEW_CFG ( 4'b1111), // + + //---------- Clock Correction Attributes ------------------------------- + .CBCC_DATA_SOURCE_SEL ("DECODED"), // + .CLK_CORRECT_USE ("TRUE"), // + .CLK_COR_KEEP_IDLE ("TRUE"), // PCIe + .CLK_COR_MAX_LAT (CLK_COR_MAX_LAT), // + .CLK_COR_MIN_LAT (CLK_COR_MIN_LAT), // + .CLK_COR_PRECEDENCE ("TRUE"), // + .CLK_COR_REPEAT_WAIT ( 0), // + .CLK_COR_SEQ_LEN ( 1), // + .CLK_COR_SEQ_1_ENABLE ( 4'b1111), // + .CLK_COR_SEQ_1_1 (10'b0100011100), // K28.0 (1C) - SKP + .CLK_COR_SEQ_1_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_4 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_ENABLE ( 4'b0000), // Disabled + .CLK_COR_SEQ_2_USE ("FALSE"), // + .CLK_COR_SEQ_2_1 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_4 (10'b0000000000), // Disabled + + //---------- 8b10b Attributes ------------------------------------------ + .RX_DISPERR_SEQ_MATCH ("TRUE"), // + + //---------- 64b/66b & 64b/67b Attributes ------------------------------ + .GEARBOX_MODE (3'd0), // + .TXGEARBOX_EN ("FALSE"), // + .RXGEARBOX_EN ("FALSE"), // + + //---------- PRBS & Loopback Attributes -------------------------------- + .LOOPBACK_CFG ( 1'd1), // GTH new, enable latch when bypassing TX buffer, equivalent to GTX PCS_RSVD_ATTR[0] + .RXPRBS_ERR_LOOPBACK ( 1'd0), // + .TX_LOOPBACK_DRIVE_HIZ ("FALSE"), // + + //---------- OOB & SATA Attributes ------------------------------------- + .TXOOB_CFG ( 1'd1), // GTH new, filter stale TX data when exiting TX electrical idle, equivalent to GTX PCS_RSVD_ATTR[7] + //.RXOOB_CFG ( 7'b0000110), // + .RXOOB_CLK_CFG (RXOOB_CLK_CFG), // GTH new + //.SAS_MAX_COM (64), // + //.SAS_MIN_COM (36), // + //.SATA_BURST_SEQ_LEN ( 4'b1111), // + //.SATA_BURST_VAL ( 3'b100), // + //.SATA_CPLL_CFG ("VCO_3000MHZ"), // + //.SATA_EIDLE_VAL ( 3'b100), // + //.SATA_MAX_BURST ( 8), // + //.SATA_MAX_INIT (21), // + //.SATA_MAX_WAKE ( 7), // + //.SATA_MIN_BURST ( 4), // + //.SATA_MIN_INIT (12), // + //.SATA_MIN_WAKE ( 4), // + + //---------- MISC ------------------------------------------------------ + .DMONITOR_CFG (24'h000AB1), // Optimized for debug; [7:4] : 1011 = AGC + //.DMONITOR_CFG (24'h000AB1), // Optimized for debug; [7:4] : 0000 = CDR FSM + .RX_DEBUG_CFG (14'b00000011000000), // Changed from 12 to 14-bits, optimized for IES + //.TST_RSV (32'd0), // + //.UCODEER_CLR ( 1'd0), // + + //---------- GTH ------------------------------------------------------- + //.ACJTAG_DEBUG_MODE ( 1'd0), // GTH new + //.ACJTAG_MODE ( 1'd0), // GTH new + //.ACJTAG_RESET ( 1'd0), // GTH new + .ADAPT_CFG0 (20'h00C10), // GTH new, optimized for IES + .CFOK_CFG (42'h248_0004_0E80), // GTH new, optimized for IES, [8] : 1 = Skip CFOK + .CFOK_CFG2 ( 6'b100000), // GTH new, optimized for IES + .CFOK_CFG3 ( 6'b100000) // GTH new, optimized for IES + + ) + gthe2_channel_i + ( + + //---------- Clock ----------------------------------------------------- + .GTGREFCLK (1'd0), // + .GTREFCLK0 (GT_GTREFCLK0), // + .GTREFCLK1 (1'd0), // + .GTNORTHREFCLK0 (1'd0), // + .GTNORTHREFCLK1 (1'd0), // + .GTSOUTHREFCLK0 (1'd0), // + .GTSOUTHREFCLK1 (1'd0), // + .QPLLCLK (GT_QPLLCLK), // + .QPLLREFCLK (GT_QPLLREFCLK), // + .TXUSRCLK (GT_TXUSRCLK), // + .RXUSRCLK (GT_RXUSRCLK), // + .TXUSRCLK2 (GT_TXUSRCLK2), // + .RXUSRCLK2 (GT_RXUSRCLK2), // + .TXSYSCLKSEL (GT_TXSYSCLKSEL), // + .RXSYSCLKSEL (GT_RXSYSCLKSEL), // + .TXOUTCLKSEL (txoutclksel), // + .RXOUTCLKSEL (rxoutclksel), // + .CPLLREFCLKSEL (3'd1), // + .CPLLLOCKDETCLK (1'd0), // + .CPLLLOCKEN (1'd1), // + .CLKRSVD0 (1'd0), // GTH + .CLKRSVD1 (1'd0), // GTH + + .TXOUTCLK (GT_TXOUTCLK), // + .RXOUTCLK (GT_RXOUTCLK), // + .TXOUTCLKFABRIC (), // + .RXOUTCLKFABRIC (), // + .TXOUTCLKPCS (), // + .RXOUTCLKPCS (), // + .CPLLLOCK (GT_CPLLLOCK), // + .CPLLREFCLKLOST (), // + .CPLLFBCLKLOST (), // + .RXCDRLOCK (GT_RXCDRLOCK), // + .GTREFCLKMONITOR (), // + + //---------- Reset ----------------------------------------------------- + .CPLLPD (cpllpd | GT_CPLLPD), // + .CPLLRESET (cpllrst | GT_CPLLRESET), // + .TXUSERRDY (GT_TXUSERRDY), // + .RXUSERRDY (GT_RXUSERRDY), // + .CFGRESET (1'd0), // + .GTRESETSEL (1'd0), // + .RESETOVRD (GT_RESETOVRD), // + .GTTXRESET (GT_GTTXRESET), // + .GTRXRESET (GT_GTRXRESET), // + + .TXRESETDONE (GT_TXRESETDONE), // + .RXRESETDONE (GT_RXRESETDONE), // + + //---------- TX Data --------------------------------------------------- + .TXDATA ({32'd0, GT_TXDATA}), // + .TXCHARISK ({ 4'd0, GT_TXDATAK}), // + + .GTHTXP (GT_TXP), // GTH + .GTHTXN (GT_TXN), // GTH + + //---------- RX Data --------------------------------------------------- + .GTHRXP (GT_RXP), // GTH + .GTHRXN (GT_RXN), // GTH + + .RXDATA (rxdata), // + .RXCHARISK (rxdatak), // + + //---------- Command --------------------------------------------------- + .TXDETECTRX (GT_TXDETECTRX), // + .TXPDELECIDLEMODE ( 1'd0), // + .RXELECIDLEMODE ( 2'd0), // + .TXELECIDLE (GT_TXELECIDLE), // + .TXCHARDISPMODE ({7'd0, GT_TXCOMPLIANCE}), // + .TXCHARDISPVAL ( 8'd0), // + .TXPOLARITY ( 1'b0), // + .RXPOLARITY (GT_RXPOLARITY), // + .TXPD (GT_TXPOWERDOWN), // + .RXPD (GT_RXPOWERDOWN), // + .TXRATE (GT_TXRATE), // + .RXRATE (GT_RXRATE), // + .TXRATEMODE (1'd0), // GTH + .RXRATEMODE (1'd0), // GTH + + //---------- Electrical Command ---------------------------------------- + .TXMARGIN (GT_TXMARGIN), // + .TXSWING (GT_TXSWING), // + .TXDEEMPH (GT_TXDEEMPH), // + .TXINHIBIT (GT_TXINHIBIT), // + .TXBUFDIFFCTRL (3'b100), // + .TXDIFFCTRL (4'b1111), // Select 850mV + .TXPRECURSOR (GT_TXPRECURSOR), // + .TXPRECURSORINV (1'd0), // + .TXMAINCURSOR (GT_TXMAINCURSOR), // + .TXPOSTCURSOR (GT_TXPOSTCURSOR), // + .TXPOSTCURSORINV (1'd0), // + + //---------- Status ---------------------------------------------------- + .RXVALID (GT_RXVALID), // + .PHYSTATUS (GT_PHYSTATUS), // + .RXELECIDLE (GT_RXELECIDLE), // + .RXSTATUS (GT_RXSTATUS), // + .TXRATEDONE (GT_TXRATEDONE), // + .RXRATEDONE (GT_RXRATEDONE), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (GT_DRPCLK), // + .DRPADDR (GT_DRPADDR), // + .DRPEN (GT_DRPEN), // + .DRPDI (GT_DRPDI), // + .DRPWE (GT_DRPWE), // + + .DRPDO (GT_DRPDO), // + .DRPRDY (GT_DRPRDY), // + + //---------- PMA ------------------------------------------------------- + .TXPMARESET (GT_TXPMARESET), // + .RXPMARESET (GT_RXPMARESET), // + .RXLPMEN (rxlpmen), // *** + .RXLPMHFHOLD (GT_RX_CONVERGE), // Set to 1 after convergence + .RXLPMHFOVRDEN ( 1'd0), // + .RXLPMLFHOLD (GT_RX_CONVERGE), // Set to 1 after convergence + .RXLPMLFKLOVRDEN ( 1'd0), // + .TXQPIBIASEN ( 1'd0), // + .TXQPISTRONGPDOWN ( 1'd0), // + .TXQPIWEAKPUP ( 1'd0), // + .RXQPIEN ( 1'd0), // Optimized for IES + .PMARSVDIN ( 5'd0), // + .GTRSVD (16'd0), // + + .TXQPISENP (), // + .TXQPISENN (), // + .RXQPISENP (), // + .RXQPISENN (), // + .DMONITOROUT (dmonitorout), // GTH 15-bits. + + //---------- PCS ------------------------------------------------------- + .TXPCSRESET (GT_TXPCSRESET), // + .RXPCSRESET (GT_RXPCSRESET), // + .PCSRSVDIN (16'd0), // [0]: 1 = TXRATE async, [1]: 1 = RXRATE async + .PCSRSVDIN2 ( 5'd0), // + + .PCSRSVDOUT (), // + + //---------- CDR ------------------------------------------------------- + .RXCDRRESET (GT_RXCDRRESET), // + .RXCDRRESETRSV (1'd0), // + .RXCDRFREQRESET (GT_RXCDRFREQRESET), // + .RXCDRHOLD (1'b0), // + .RXCDROVRDEN (1'd0), // + + //---------- PI -------------------------------------------------------- + .TXPIPPMEN (1'd0), // GTH new + .TXPIPPMOVRDEN (1'd0), // GTH new + .TXPIPPMPD (1'd0), // GTH new + .TXPIPPMSEL (1'd0), // GTH new + .TXPIPPMSTEPSIZE (5'd0), // GTH new + + //---------- DFE ------------------------------------------------------- + .RXDFELPMRESET (GT_RXDFELPMRESET), // + .RXDFEAGCTRL (5'b10000), // GTH new, optimized for IES + .RXDFECM1EN (1'd0), // + .RXDFEVSEN (1'd0), // + .RXDFETAP2HOLD (1'd0), // + .RXDFETAP2OVRDEN (1'd0), // + .RXDFETAP3HOLD (1'd0), // + .RXDFETAP3OVRDEN (1'd0), // + .RXDFETAP4HOLD (1'd0), // + .RXDFETAP4OVRDEN (1'd0), // + .RXDFETAP5HOLD (1'd0), // + .RXDFETAP5OVRDEN (1'd0), // + .RXDFETAP6HOLD (1'd0), // GTH new + .RXDFETAP6OVRDEN (1'd0), // GTH new + .RXDFETAP7HOLD (1'd0), // GTH new + .RXDFETAP7OVRDEN (1'd0), // GTH new + .RXDFEAGCHOLD (GT_RX_CONVERGE), // Set to 1 after convergence + .RXDFEAGCOVRDEN (rxlpmen), // + .RXDFELFHOLD (GT_RX_CONVERGE), // Set to 1 after convergence + .RXDFELFOVRDEN (1'd0), // + .RXDFEUTHOLD (1'd0), // + .RXDFEUTOVRDEN (1'd0), // + .RXDFEVPHOLD (1'd0), // + .RXDFEVPOVRDEN (1'd0), // + .RXDFEXYDEN (1'd1), // Optimized for IES + .RXMONITORSEL (2'd0), // + .RXDFESLIDETAP (5'd0), // GTH new + .RXDFESLIDETAPID (6'd0), // GTH new + .RXDFESLIDETAPHOLD (1'd0), // GTH new + .RXDFESLIDETAPOVRDEN (1'd0), // GTH new + .RXDFESLIDETAPADAPTEN (1'd0), // GTH new + .RXDFESLIDETAPINITOVRDEN (1'd0), // GTH new + .RXDFESLIDETAPONLYADAPTEN (1'd0), // GTH new + .RXDFESLIDETAPSTROBE (1'd0), // GTH new + + .RXMONITOROUT (), // + .RXDFESLIDETAPSTARTED (), // GTH new + .RXDFESLIDETAPSTROBEDONE (), // GTH new + .RXDFESLIDETAPSTROBESTARTED (), // GTH new + .RXDFESTADAPTDONE (), // GTH new + + //---------- OS -------------------------------------------------------- + .RXOSHOLD (1'd0), // optimized for IES + .RXOSOVRDEN (1'd0), // optimized for IES + .RXOSINTEN (1'd1), // GTH new, optimized for IES + .RXOSINTHOLD (1'd0), // GTH new, optimized for IES + .RXOSINTNTRLEN (1'd0), // GTH new, optimized for IES + .RXOSINTOVRDEN (1'd0), // GTH new, optimized for IES + .RXOSINTSTROBE (1'd0), // GTH new, optimized for IES + .RXOSINTTESTOVRDEN (1'd0), // GTH new, optimized for IES + .RXOSINTCFG (4'b0110), // GTH new, optimized for IES + .RXOSINTID0 (4'b0000), // GTH new, optimized for IES + .RXOSCALRESET ( 1'd0), // GTH, optimized for IES + + .RSOSINTDONE (), // GTH new + .RXOSINTSTARTED (), // GTH new + .RXOSINTSTROBEDONE (), // GTH new + .RXOSINTSTROBESTARTED (), // GTH new + + //---------- Eye Scan -------------------------------------------------- + .EYESCANRESET (GT_EYESCANRESET), // + .EYESCANMODE (1'd0), // + .EYESCANTRIGGER (1'b0), // + + .EYESCANDATAERROR (GT_EYESCANDATAERROR), // + + //---------- TX Buffer ------------------------------------------------- + .TXBUFSTATUS (), // + + //---------- RX Buffer ------------------------------------------------- + .RXBUFRESET (GT_RXBUFRESET), // + + .RXBUFSTATUS (GT_RXBUFSTATUS), // + + //---------- TX Sync --------------------------------------------------- + .TXPHDLYRESET (GT_TXPHDLYRESET), // + .TXPHDLYTSTCLK (1'd0), // + .TXPHALIGN (GT_TXPHALIGN), // + .TXPHALIGNEN (GT_TXPHALIGNEN), // + .TXPHDLYPD (1'd0), // + .TXPHINIT (GT_TXPHINIT), // + .TXPHOVRDEN (1'd0), // + .TXDLYBYPASS (GT_TXDLYBYPASS), // + .TXDLYSRESET (GT_TXDLYSRESET), // + .TXDLYEN (GT_TXDLYEN), // + .TXDLYOVRDEN (1'd0), // + .TXDLYHOLD (1'd0), // + .TXDLYUPDOWN (1'd0), // + + .TXPHALIGNDONE (GT_TXPHALIGNDONE), // + .TXPHINITDONE (GT_TXPHINITDONE), // + .TXDLYSRESETDONE (GT_TXDLYSRESETDONE), // + + .TXSYNCMODE (GT_TXSYNCMODE), // GTH + .TXSYNCIN (GT_TXSYNCIN), // GTH + .TXSYNCALLIN (GT_TXSYNCALLIN), // GTH + + .TXSYNCDONE (GT_TXSYNCDONE), // GTH + .TXSYNCOUT (GT_TXSYNCOUT), // GTH + + //---------- RX Sync --------------------------------------------------- + .RXPHDLYRESET (1'd0), // + .RXPHALIGN (GT_RXPHALIGN), // + .RXPHALIGNEN (GT_RXPHALIGNEN), // + .RXPHDLYPD (1'd0), // + .RXPHOVRDEN (1'd0), // + .RXDLYBYPASS (GT_RXDLYBYPASS), // + .RXDLYSRESET (GT_RXDLYSRESET), // + .RXDLYEN (GT_RXDLYEN), // + .RXDLYOVRDEN (1'd0), // + .RXDDIEN (GT_RXDDIEN), // + + .RXPHALIGNDONE (GT_RXPHALIGNDONE), // + .RXPHMONITOR (), // + .RXPHSLIPMONITOR (), // + .RXDLYSRESETDONE (GT_RXDLYSRESETDONE), // + + .RXSYNCMODE (GT_RXSYNCMODE), // GTH + .RXSYNCIN (GT_RXSYNCIN), // GTH + .RXSYNCALLIN (GT_RXSYNCALLIN), // GTH + + .RXSYNCDONE (GT_RXSYNCDONE), // GTH + .RXSYNCOUT (GT_RXSYNCOUT), // GTH + + //---------- Comma Alignment ------------------------------------------- + .RXCOMMADETEN ( 1'd1), // + .RXMCOMMAALIGNEN (!GT_GEN3), // 0 = disable comma alignment in Gen3 + .RXPCOMMAALIGNEN (!GT_GEN3), // 0 = disable comma alignment in Gen3 + .RXSLIDE ( GT_RXSLIDE), // + + .RXCOMMADET (GT_RXCOMMADET), // + .RXCHARISCOMMA (rxchariscomma), // + .RXBYTEISALIGNED (GT_RXBYTEISALIGNED), // + .RXBYTEREALIGN (GT_RXBYTEREALIGN), // + + //---------- Channel Bonding ------------------------------------------- + .RXCHBONDEN (GT_RXCHBONDEN), // + .RXCHBONDI (GT_RXCHBONDI), // + .RXCHBONDLEVEL (GT_RXCHBONDLEVEL), // + .RXCHBONDMASTER (GT_RXCHBONDMASTER), // + .RXCHBONDSLAVE (GT_RXCHBONDSLAVE), // + + .RXCHANBONDSEQ (), // + .RXCHANISALIGNED (GT_RXCHANISALIGNED), // + .RXCHANREALIGN (), // + .RXCHBONDO (GT_RXCHBONDO), // + + //---------- Clock Correction ----------------------------------------- + .RXCLKCORCNT (), // + + //---------- 8b10b ----------------------------------------------------- + .TX8B10BBYPASS (8'd0), // + .TX8B10BEN (!GT_GEN3), // 0 = disable TX 8b10b in Gen3 + .RX8B10BEN (!GT_GEN3), // 0 = disable RX 8b10b in Gen3 + + .RXDISPERR (GT_RXDISPERR), // + .RXNOTINTABLE (GT_RXNOTINTABLE), // + + //---------- 64b/66b & 64b/67b ----------------------------------------- + .TXHEADER (3'd0), // + .TXSEQUENCE (7'd0), // + .TXSTARTSEQ (1'd0), // + .RXGEARBOXSLIP (1'd0), // + + .TXGEARBOXREADY (), // + .RXDATAVALID (), // + .RXHEADER (), // + .RXHEADERVALID (), // + .RXSTARTOFSEQ (), // + + //---------- PRBS & Loopback ------------------------------------------- + .TXPRBSSEL (GT_TXPRBSSEL), // + .RXPRBSSEL (GT_RXPRBSSEL), // + .TXPRBSFORCEERR (GT_TXPRBSFORCEERR), // + .RXPRBSCNTRESET (GT_RXPRBSCNTRESET), // + .LOOPBACK (GT_LOOPBACK), // + + .RXPRBSERR (GT_RXPRBSERR), // + + //---------- OOB ------------------------------------------------------- + .SIGVALIDCLK (GT_OOBCLK), // GTH, optimized for debug + .TXCOMINIT (1'd0), // + .TXCOMSAS (1'd0), // + .TXCOMWAKE (1'd0), // + .RXOOBRESET (1'd0), // + + .TXCOMFINISH (), // + .RXCOMINITDET (), // + .RXCOMSASDET (), // + .RXCOMWAKEDET (), // + + //---------- MISC ------------------------------------------------------ + .SETERRSTATUS ( 1'd0), // + .TXDIFFPD ( 1'd0), // + .TXPISOPD ( 1'd0), // + .TSTIN (20'hFFFFF), // + + //---------- GTH ------------------------------------------------------- + .RXADAPTSELTEST (14'd0), // GTH new + .DMONFIFORESET ( 1'd0), // GTH + .DMONITORCLK (dmonitorclk), // GTH, optimized for debug + //.DMONITORCLK (GT_DRPCLK), // GTH, optimized for debug + + .RXPMARESETDONE (GT_RXPMARESETDONE), // GTH + .TXPMARESETDONE () // GTH + + ); + + end + +else + + begin : gtx_channel + + //---------- GTX Channel Module -------------------------------------------- + GTXE2_CHANNEL # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_CPLLREFCLK_SEL (3'b001), // + .SIM_RESET_SPEEDUP (PCIE_SIM_SPEEDUP), // + .SIM_RECEIVER_DETECT_PASS ("TRUE"), // + .SIM_TX_EIDLE_DRIVE_LEVEL (PCIE_SIM_TX_EIDLE_DRIVE_LEVEL), // + .SIM_VERSION (PCIE_USE_MODE), // + + //---------- Clock Attributes ------------------------------------------ + .CPLL_REFCLK_DIV (CPLL_REFCLK_DIV), // + .CPLL_FBDIV_45 (CPLL_FBDIV_45), // + .CPLL_FBDIV (CPLL_FBDIV), // + .TXOUT_DIV (OUT_DIV), // + .RXOUT_DIV (OUT_DIV), // + .TX_CLK25_DIV (CLK25_DIV), // + .RX_CLK25_DIV (CLK25_DIV), // + .TX_CLKMUX_PD (CLKMUX_PD), // GTX + .RX_CLKMUX_PD (CLKMUX_PD), // GTX + .TX_XCLK_SEL (TX_XCLK_SEL), // TXOUT = use TX buffer, TXUSR = bypass TX buffer + .RX_XCLK_SEL ("RXREC"), // RXREC = use RX buffer, RXUSR = bypass RX buffer + .OUTREFCLK_SEL_INV ( 2'b11), // + .CPLL_CFG (CPLL_CFG), // Optimized for silicon + //.CPLL_INIT_CFG (24'h00001E), // + //.CPLL_LOCK_CFG (16'h01E8), // + + //---------- Reset Attributes ------------------------------------------ + .TXPCSRESET_TIME (5'b00001), // + .RXPCSRESET_TIME (5'b00001), // + .TXPMARESET_TIME (5'b00011), // + .RXPMARESET_TIME (5'b00011), // Optimized for sim and for DRP + //.RXISCANRESET_TIME (5'b00001), // + + //---------- TX Data Attributes ---------------------------------------- + .TX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + .TX_INT_DATAWIDTH ( 0), // 2-byte internal datawidth for Gen1/Gen2 + + //---------- RX Data Attributes ---------------------------------------- + .RX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + .RX_INT_DATAWIDTH ( 0), // 2-byte internal datawidth for Gen1/Gen2 + + //---------- Command Attributes ---------------------------------------- + .TX_RXDETECT_CFG (TX_RXDETECT_CFG), // + .TX_RXDETECT_REF (TX_RXDETECT_REF), // + .RX_CM_SEL ( 2'd3), // 0 = AVTT, 1 = GND, 2 = Float, 3 = Programmable + .RX_CM_TRIM ( 3'b010), // Select 800mV + .TX_EIDLE_ASSERT_DELAY (PCIE_TX_EIDLE_ASSERT_DELAY), // Optimized for sim (3'd4) + .TX_EIDLE_DEASSERT_DELAY ( 3'b100), // Optimized for sim + //.PD_TRANS_TIME_FROM_P2 (12'h03C), // + .PD_TRANS_TIME_NONE_P2 ( 8'h09), // + //.PD_TRANS_TIME_TO_P2 ( 8'h64), // + //.TRANS_TIME_RATE ( 8'h0E), // + + //---------- Electrical Command Attributes ----------------------------- + .TX_DRIVE_MODE ("PIPE"), // Gen1/Gen2 = PIPE, Gen3 = PIPEGEN3 + .TX_DEEMPH0 ( 5'b10100), // 6.0 dB + .TX_DEEMPH1 ( 5'b01011), // 3.5 dB + .TX_MARGIN_FULL_0 ( 7'b1001111), // 1000 mV + .TX_MARGIN_FULL_1 ( 7'b1001110), // 950 mV + .TX_MARGIN_FULL_2 ( 7'b1001101), // 900 mV + .TX_MARGIN_FULL_3 ( 7'b1001100), // 850 mV + .TX_MARGIN_FULL_4 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_0 ( 7'b1000101), // 500 mV + .TX_MARGIN_LOW_1 ( 7'b1000110), // 450 mV + .TX_MARGIN_LOW_2 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_3 ( 7'b1000010), // 350 mV + .TX_MARGIN_LOW_4 ( 7'b1000000), // 250 mV + .TX_MAINCURSOR_SEL ( 1'b0), // + .TX_PREDRIVER_MODE ( 1'b0), // GTX + .TX_QPI_STATUS_EN ( 1'b0), // + + //---------- Status Attributes ----------------------------------------- + .RX_SIG_VALID_DLY (4), // Optimized for sim + + //---------- DRP Attributes -------------------------------------------- + + //---------- PCS Attributes -------------------------------------------- + .PCS_PCIE_EN ("TRUE"), // PCIe + .PCS_RSVD_ATTR (PCS_RSVD_ATTR), // + + //---------- PMA Attributes -------------------------------------------- + .PMA_RSV (32'h00018480), // Optimized for GES Gen1/Gen2 + .PMA_RSV2 (16'h2050), // Optimized for silicon, [4] RX_CM_TRIM[4], [5] = 1 Enable Eye Scan + //.PMA_RSV3 ( 2'd0), // + //.PMA_RSV4 (32'd0), // GTX 3.0 new + .RX_BIAS_CFG (12'b000000000100), // Optimized for GES + //.TERM_RCAL_CFG ( 5'b10000), // + //.TERM_RCAL_OVRD ( 1'd0), // + + //---------- CDR Attributes -------------------------------------------- + .RXCDR_CFG (RXCDR_CFG_GTX), // + .RXCDR_LOCK_CFG ( 6'b010101), // [5:3] Window Refresh, [2:1] Window Size, [0] Enable Detection (sensitive lock = 6'b111001) + .RXCDR_HOLD_DURING_EIDLE ( 1'd1), // Hold RX CDR on electrical idle for Gen1/Gen2 + .RXCDR_FR_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR frequency on electrical idle for Gen3 + .RXCDR_PH_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR phase on electrical idle for Gen3 + //.RXCDRFREQRESET_TIME ( 5'b00001), // + //.RXCDRPHRESET_TIME ( 5'b00001), // + + //---------- LPM Attributes -------------------------------------------- + .RXLPM_HF_CFG (14'h00F0), // Optimized for silicon + .RXLPM_LF_CFG (14'h00F0), // Optimized for silicon + + //---------- DFE Attributes -------------------------------------------- + //.RXDFELPMRESET_TIME ( 7'b0001111), // + .RX_DFE_GAIN_CFG (23'h020FEA), // Optimized for GES, IES = 23'h001F0A + .RX_DFE_H2_CFG (12'b000000000000), // Optimized for GES + .RX_DFE_H3_CFG (12'b000001000000), // Optimized for GES + .RX_DFE_H4_CFG (11'b00011110000), // Optimized for GES + .RX_DFE_H5_CFG (11'b00011100000), // Optimized for GES + .RX_DFE_KL_CFG (13'b0000011111110), // Optimized for GES + .RX_DFE_KL_CFG2 (32'h3290D86C), // Optimized for GES, GTX new, CTLE 3 3 5, default = 32'h3010D90C + .RX_DFE_LPM_CFG (16'h0954), // Optimized for GES + .RX_DFE_LPM_HOLD_DURING_EIDLE ( 1'd1), // Optimized for PCIe + .RX_DFE_UT_CFG (17'b10001111000000000), // Optimized for GES, IES = 17'h08F00 + .RX_DFE_VP_CFG (17'b00011111100000011), // Optimized for GES + .RX_DFE_XYD_CFG (13'h0000), // Optimized for 4.0 + + //---------- OS Attributes --------------------------------------------- + .RX_OS_CFG (13'b0000010000000), // Optimized for GES + + //---------- Eye Scan Attributes --------------------------------------- + //.ES_CONTROL ( 6'd0), // + //.ES_ERRDET_EN ("FALSE"), // + .ES_EYE_SCAN_EN ("FALSE"), // + .ES_HORZ_OFFSET (12'd0), // + //.ES_PMA_CFG (10'd0), // + //.ES_PRESCALE ( 5'd0), // + //.ES_QUAL_MASK (80'd0), // + //.ES_QUALIFIER (80'd0), // + //.ES_SDATA_MASK (80'd0), // + //.ES_VERT_OFFSET ( 9'd0), // + + //---------- TX Buffer Attributes -------------------------------------- + .TXBUF_EN (PCIE_TXBUF_EN), // + .TXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + + //---------- RX Buffer Attributes -------------------------------------- + .RXBUF_EN ("TRUE"), // + //.RX_BUFFER_CFG ( 6'd0), // + .RX_DEFER_RESET_BUF_EN ("TRUE"), // + .RXBUF_ADDR_MODE ("FULL"), // + .RXBUF_EIDLE_HI_CNT ( 4'd4), // Optimized for sim + .RXBUF_EIDLE_LO_CNT ( 4'd0), // Optimized for sim + .RXBUF_RESET_ON_CB_CHANGE ("TRUE"), // + .RXBUF_RESET_ON_COMMAALIGN ("FALSE"), // + .RXBUF_RESET_ON_EIDLE ("TRUE"), // PCIe + .RXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + .RXBUF_THRESH_OVRD ("FALSE"), // + .RXBUF_THRESH_OVFLW (61), // + .RXBUF_THRESH_UNDFLW ( 4), // + //.RXBUFRESET_TIME ( 5'b00001), // + + //---------- TX Sync Attributes ---------------------------------------- + //.TXPH_CFG (16'h0780), // + .TXPH_MONITOR_SEL ( 5'd0), // + //.TXPHDLY_CFG (24'h084020), // + //.TXDLY_CFG (16'h001F), // + //.TXDLY_LCFG ( 9'h030), // + //.TXDLY_TAP_CFG (16'd0), // + + //---------- RX Sync Attributes ---------------------------------------- + //.RXPH_CFG (24'd0), // + .RXPH_MONITOR_SEL ( 5'd0), // + .RXPHDLY_CFG (24'h004020), // Optimized for sim + //.RXDLY_CFG (16'h001F), // + //.RXDLY_LCFG ( 9'h030), // + //.RXDLY_TAP_CFG (16'd0), // + .RX_DDI_SEL ( 6'd0), // + + //---------- Comma Alignment Attributes -------------------------------- + .ALIGN_COMMA_DOUBLE ("FALSE"), // + .ALIGN_COMMA_ENABLE (10'b1111111111), // PCIe + .ALIGN_COMMA_WORD ( 1), // + .ALIGN_MCOMMA_DET ("TRUE"), // + .ALIGN_MCOMMA_VALUE (10'b1010000011), // + .ALIGN_PCOMMA_DET ("TRUE"), // + .ALIGN_PCOMMA_VALUE (10'b0101111100), // + .DEC_MCOMMA_DETECT ("TRUE"), // + .DEC_PCOMMA_DETECT ("TRUE"), // + .DEC_VALID_COMMA_ONLY ("FALSE"), // PCIe + .SHOW_REALIGN_COMMA ("FALSE"), // PCIe + .RXSLIDE_AUTO_WAIT ( 7), // + .RXSLIDE_MODE ("PMA"), // PCIe + + //---------- Channel Bonding Attributes -------------------------------- + .CHAN_BOND_KEEP_ALIGN ("TRUE"), // PCIe + .CHAN_BOND_MAX_SKEW ( 7), // + .CHAN_BOND_SEQ_LEN ( 4), // PCIe + .CHAN_BOND_SEQ_1_ENABLE ( 4'b1111), // + .CHAN_BOND_SEQ_1_1 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_2 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_3 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_4 (10'b0110111100), // K28.5 (BC) - COM + .CHAN_BOND_SEQ_2_USE ("TRUE"), // PCIe + .CHAN_BOND_SEQ_2_ENABLE ( 4'b1111), // + .CHAN_BOND_SEQ_2_1 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_2 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_3 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_4 (10'b0110111100), // K28.5 (BC) - COM + .FTS_DESKEW_SEQ_ENABLE ( 4'b1111), // + .FTS_LANE_DESKEW_EN ("TRUE"), // PCIe + .FTS_LANE_DESKEW_CFG ( 4'b1111), // + + //---------- Clock Correction Attributes ------------------------------- + .CBCC_DATA_SOURCE_SEL ("DECODED"), // + .CLK_CORRECT_USE ("TRUE"), // + .CLK_COR_KEEP_IDLE ("TRUE"), // PCIe + .CLK_COR_MAX_LAT (CLK_COR_MAX_LAT), // + .CLK_COR_MIN_LAT (CLK_COR_MIN_LAT), // + .CLK_COR_PRECEDENCE ("TRUE"), // + .CLK_COR_REPEAT_WAIT ( 0), // + .CLK_COR_SEQ_LEN ( 1), // + .CLK_COR_SEQ_1_ENABLE ( 4'b1111), // + .CLK_COR_SEQ_1_1 (10'b0100011100), // K28.0 (1C) - SKP + .CLK_COR_SEQ_1_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_4 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_ENABLE ( 4'b0000), // Disabled + .CLK_COR_SEQ_2_USE ("FALSE"), // + .CLK_COR_SEQ_2_1 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_4 (10'b0000000000), // Disabled + + //---------- 8b10b Attributes ------------------------------------------ + .RX_DISPERR_SEQ_MATCH ("TRUE"), // + + //---------- 64b/66b & 64b/67b Attributes ------------------------------ + .GEARBOX_MODE (3'd0), // + .TXGEARBOX_EN ("FALSE"), // + .RXGEARBOX_EN ("FALSE"), // + + //---------- PRBS & Loopback Attributes -------------------------------- + .RXPRBS_ERR_LOOPBACK (1'd0), // + .TX_LOOPBACK_DRIVE_HIZ ("FALSE"), // + + //---------- OOB & SATA Attributes ------------------------------------- + //.RXOOB_CFG ( 7'b0000110), // + //.SAS_MAX_COM (64), // + //.SAS_MIN_COM (36), // + //.SATA_BURST_SEQ_LEN ( 4'b1111), // + //.SATA_BURST_VAL ( 3'b100), // + //.SATA_CPLL_CFG ("VCO_3000MHZ"), // + //.SATA_EIDLE_VAL ( 3'b100), // + //.SATA_MAX_BURST ( 8), // + //.SATA_MAX_INIT (21), // + //.SATA_MAX_WAKE ( 7), // + //.SATA_MIN_BURST ( 4), // + //.SATA_MIN_INIT (12), // + //.SATA_MIN_WAKE ( 4), // + + //---------- MISC ------------------------------------------------------ + .DMONITOR_CFG (24'h000B01), // Optimized for debug + .RX_DEBUG_CFG (12'd0) // Optimized for GES + //.TST_RSV (32'd0), // + //.UCODEER_CLR ( 1'd0) // + + ) + gtxe2_channel_i + ( + + //---------- Clock ----------------------------------------------------- + .GTGREFCLK (1'd0), // + .GTREFCLK0 (GT_GTREFCLK0), // + .GTREFCLK1 (1'd0), // + .GTNORTHREFCLK0 (1'd0), // + .GTNORTHREFCLK1 (1'd0), // + .GTSOUTHREFCLK0 (1'd0), // + .GTSOUTHREFCLK1 (1'd0), // + .QPLLCLK (GT_QPLLCLK), // + .QPLLREFCLK (GT_QPLLREFCLK), // + .TXUSRCLK (GT_TXUSRCLK), // + .RXUSRCLK (GT_RXUSRCLK), // + .TXUSRCLK2 (GT_TXUSRCLK2), // + .RXUSRCLK2 (GT_RXUSRCLK2), // + .TXSYSCLKSEL (GT_TXSYSCLKSEL), // + .RXSYSCLKSEL (GT_RXSYSCLKSEL), // + .TXOUTCLKSEL (txoutclksel), // + .RXOUTCLKSEL (rxoutclksel), // + .CPLLREFCLKSEL (3'd1), // + .CPLLLOCKDETCLK (1'd0), // + .CPLLLOCKEN (1'd1), // + .CLKRSVD ({2'd0, dmonitorclk, GT_OOBCLK}), // Optimized for debug + + .TXOUTCLK (GT_TXOUTCLK), // + .RXOUTCLK (GT_RXOUTCLK), // + .TXOUTCLKFABRIC (), // + .RXOUTCLKFABRIC (), // + .TXOUTCLKPCS (), // + .RXOUTCLKPCS (), // + .CPLLLOCK (GT_CPLLLOCK), // + .CPLLREFCLKLOST (), // + .CPLLFBCLKLOST (), // + .RXCDRLOCK (GT_RXCDRLOCK), // + .GTREFCLKMONITOR (), // + + //---------- Reset ----------------------------------------------------- + .CPLLPD (cpllpd | GT_CPLLPD), // + .CPLLRESET (cpllrst | GT_CPLLRESET), // + .TXUSERRDY (GT_TXUSERRDY), // + .RXUSERRDY (GT_RXUSERRDY), // + .CFGRESET (1'd0), // + .GTRESETSEL (1'd0), // + .RESETOVRD (GT_RESETOVRD), // + .GTTXRESET (GT_GTTXRESET), // + .GTRXRESET (GT_GTRXRESET), // + + .TXRESETDONE (GT_TXRESETDONE), // + .RXRESETDONE (GT_RXRESETDONE), // + + //---------- TX Data --------------------------------------------------- + .TXDATA ({32'd0, GT_TXDATA}), // + .TXCHARISK ({ 4'd0, GT_TXDATAK}), // + + .GTXTXP (GT_TXP), // GTX + .GTXTXN (GT_TXN), // GTX + + //---------- RX Data --------------------------------------------------- + .GTXRXP (GT_RXP), // GTX + .GTXRXN (GT_RXN), // GTX + + .RXDATA (rxdata), // + .RXCHARISK (rxdatak), // + + //---------- Command --------------------------------------------------- + .TXDETECTRX (GT_TXDETECTRX), // + .TXPDELECIDLEMODE ( 1'd0), // + .RXELECIDLEMODE ( 2'd0), // + .TXELECIDLE (GT_TXELECIDLE), // + .TXCHARDISPMODE ({7'd0, GT_TXCOMPLIANCE}), // + .TXCHARDISPVAL ( 8'd0), // + .TXPOLARITY ( 1'b0), // + .RXPOLARITY (GT_RXPOLARITY), // + .TXPD (GT_TXPOWERDOWN), // + .RXPD (GT_RXPOWERDOWN), // + .TXRATE (GT_TXRATE), // + .RXRATE (GT_RXRATE), // + + //---------- Electrical Command ---------------------------------------- + .TXMARGIN (GT_TXMARGIN), // + .TXSWING (GT_TXSWING), // + .TXDEEMPH (GT_TXDEEMPH), // + .TXINHIBIT (GT_TXINHIBIT), // + .TXBUFDIFFCTRL (3'b100), // + .TXDIFFCTRL (4'b1100), // + .TXPRECURSOR (GT_TXPRECURSOR), // + .TXPRECURSORINV (1'd0), // + .TXMAINCURSOR (GT_TXMAINCURSOR), // + .TXPOSTCURSOR (GT_TXPOSTCURSOR), // + .TXPOSTCURSORINV (1'd0), // + + //---------- Status ---------------------------------------------------- + .RXVALID (GT_RXVALID), // + .PHYSTATUS (GT_PHYSTATUS), // + .RXELECIDLE (GT_RXELECIDLE), // + .RXSTATUS (GT_RXSTATUS), // + .TXRATEDONE (GT_TXRATEDONE), // + .RXRATEDONE (GT_RXRATEDONE), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (GT_DRPCLK), // + .DRPADDR (GT_DRPADDR), // + .DRPEN (GT_DRPEN), // + .DRPDI (GT_DRPDI), // + .DRPWE (GT_DRPWE), // + + .DRPDO (GT_DRPDO), // + .DRPRDY (GT_DRPRDY), // + + //---------- PMA ------------------------------------------------------- + .TXPMARESET (GT_TXPMARESET), // + .RXPMARESET (GT_RXPMARESET), // + .RXLPMEN (rxlpmen), // + .RXLPMHFHOLD ( 1'd0), // + .RXLPMHFOVRDEN ( 1'd0), // + .RXLPMLFHOLD ( 1'd0), // + .RXLPMLFKLOVRDEN ( 1'd0), // + .TXQPIBIASEN ( 1'd0), // + .TXQPISTRONGPDOWN ( 1'd0), // + .TXQPIWEAKPUP ( 1'd0), // + .RXQPIEN ( 1'd0), // + .PMARSVDIN ( 5'd0), // + .PMARSVDIN2 ( 5'd0), // GTX + .GTRSVD (16'd0), // + + .TXQPISENP (), // + .TXQPISENN (), // + .RXQPISENP (), // + .RXQPISENN (), // + .DMONITOROUT (dmonitorout[7:0]), // GTX 8-bits + + //---------- PCS ------------------------------------------------------- + .TXPCSRESET (GT_TXPCSRESET), // + .RXPCSRESET (GT_RXPCSRESET), // + .PCSRSVDIN (16'd0), // [0]: 1 = TXRATE async, [1]: 1 = RXRATE async + .PCSRSVDIN2 ( 5'd0), // + + .PCSRSVDOUT (), // + //---------- CDR ------------------------------------------------------- + .RXCDRRESET (GT_RXCDRRESET), // + .RXCDRRESETRSV (1'd0), // + .RXCDRFREQRESET (GT_RXCDRFREQRESET), // + .RXCDRHOLD (1'b0), // + .RXCDROVRDEN (1'd0), // + + //---------- DFE ------------------------------------------------------- + .RXDFELPMRESET (GT_RXDFELPMRESET), // + .RXDFECM1EN (1'd0), // + .RXDFEVSEN (1'd0), // + .RXDFETAP2HOLD (1'd0), // + .RXDFETAP2OVRDEN (1'd0), // + .RXDFETAP3HOLD (1'd0), // + .RXDFETAP3OVRDEN (1'd0), // + .RXDFETAP4HOLD (1'd0), // + .RXDFETAP4OVRDEN (1'd0), // + .RXDFETAP5HOLD (1'd0), // + .RXDFETAP5OVRDEN (1'd0), // + .RXDFEAGCHOLD (GT_RX_CONVERGE), // Optimized for GES, Set to 1 after convergence + .RXDFEAGCOVRDEN (1'd0), // + .RXDFELFHOLD (1'd0), // + .RXDFELFOVRDEN (1'd1), // Optimized for GES + .RXDFEUTHOLD (1'd0), // + .RXDFEUTOVRDEN (1'd0), // + .RXDFEVPHOLD (1'd0), // + .RXDFEVPOVRDEN (1'd0), // + .RXDFEXYDEN (1'd0), // + .RXDFEXYDHOLD (1'd0), // GTX + .RXDFEXYDOVRDEN (1'd0), // GTX + .RXMONITORSEL (2'd0), // + + .RXMONITOROUT (), // + + //---------- OS -------------------------------------------------------- + .RXOSHOLD (1'd0), // + .RXOSOVRDEN (1'd0), // + + //---------- Eye Scan -------------------------------------------------- + .EYESCANRESET (GT_EYESCANRESET), // + .EYESCANMODE (1'd0), // + .EYESCANTRIGGER (1'b0), // + + .EYESCANDATAERROR (GT_EYESCANDATAERROR), // + + //---------- TX Buffer ------------------------------------------------- + .TXBUFSTATUS (), // + + //---------- RX Buffer ------------------------------------------------- + .RXBUFRESET (GT_RXBUFRESET), // + + .RXBUFSTATUS (GT_RXBUFSTATUS), // + + //---------- TX Sync --------------------------------------------------- + .TXPHDLYRESET (1'd0), // + .TXPHDLYTSTCLK (1'd0), // + .TXPHALIGN (GT_TXPHALIGN), // + .TXPHALIGNEN (GT_TXPHALIGNEN), // + .TXPHDLYPD (1'd0), // + .TXPHINIT (GT_TXPHINIT), // + .TXPHOVRDEN (1'd0), // + .TXDLYBYPASS (GT_TXDLYBYPASS), // + .TXDLYSRESET (GT_TXDLYSRESET), // + .TXDLYEN (GT_TXDLYEN), // + .TXDLYOVRDEN (1'd0), // + .TXDLYHOLD (1'd0), // + .TXDLYUPDOWN (1'd0), // + + .TXPHALIGNDONE (GT_TXPHALIGNDONE), // + .TXPHINITDONE (GT_TXPHINITDONE), // + .TXDLYSRESETDONE (GT_TXDLYSRESETDONE), // + + //---------- RX Sync --------------------------------------------------- + .RXPHDLYRESET (1'd0), // + .RXPHALIGN (GT_RXPHALIGN), // + .RXPHALIGNEN (GT_RXPHALIGNEN), // + .RXPHDLYPD (1'd0), // + .RXPHOVRDEN (1'd0), // + .RXDLYBYPASS (GT_RXDLYBYPASS), // + .RXDLYSRESET (GT_RXDLYSRESET), // + .RXDLYEN (GT_RXDLYEN), // + .RXDLYOVRDEN (1'd0), // + .RXDDIEN (GT_RXDDIEN), // + + .RXPHALIGNDONE (GT_RXPHALIGNDONE), // + .RXPHMONITOR (), // + .RXPHSLIPMONITOR (), // + .RXDLYSRESETDONE (GT_RXDLYSRESETDONE), // + + //---------- Comma Alignment ------------------------------------------- + .RXCOMMADETEN ( 1'd1), // + .RXMCOMMAALIGNEN (!GT_GEN3), // 0 = disable comma alignment in Gen3 + .RXPCOMMAALIGNEN (!GT_GEN3), // 0 = disable comma alignment in Gen3 + .RXSLIDE ( GT_RXSLIDE), // + + .RXCOMMADET (GT_RXCOMMADET), // + .RXCHARISCOMMA (rxchariscomma), // + .RXBYTEISALIGNED (GT_RXBYTEISALIGNED), // + .RXBYTEREALIGN (GT_RXBYTEREALIGN), // + + //---------- Channel Bonding ------------------------------------------- + .RXCHBONDEN (GT_RXCHBONDEN), // + .RXCHBONDI (GT_RXCHBONDI), // + .RXCHBONDLEVEL (GT_RXCHBONDLEVEL), // + .RXCHBONDMASTER (GT_RXCHBONDMASTER), // + .RXCHBONDSLAVE (GT_RXCHBONDSLAVE), // + + .RXCHANBONDSEQ (), // + .RXCHANISALIGNED (GT_RXCHANISALIGNED), // + .RXCHANREALIGN (), // + .RXCHBONDO (GT_RXCHBONDO), // + + //---------- Clock Correction ----------------------------------------- + .RXCLKCORCNT (), // + + //---------- 8b10b ----------------------------------------------------- + .TX8B10BBYPASS (8'd0), // + .TX8B10BEN (!GT_GEN3), // 0 = disable TX 8b10b in Gen3 + .RX8B10BEN (!GT_GEN3), // 0 = disable RX 8b10b in Gen3 + + .RXDISPERR (GT_RXDISPERR), // + .RXNOTINTABLE (GT_RXNOTINTABLE), // + + //---------- 64b/66b & 64b/67b ----------------------------------------- + .TXHEADER (3'd0), // + .TXSEQUENCE (7'd0), // + .TXSTARTSEQ (1'd0), // + .RXGEARBOXSLIP (1'd0), // + + .TXGEARBOXREADY (), // + .RXDATAVALID (), // + .RXHEADER (), // + .RXHEADERVALID (), // + .RXSTARTOFSEQ (), // + + //---------- PRBS/Loopback --------------------------------------------- + .TXPRBSSEL (GT_TXPRBSSEL), // + .RXPRBSSEL (GT_RXPRBSSEL), // + .TXPRBSFORCEERR (GT_TXPRBSFORCEERR), // + .RXPRBSCNTRESET (GT_RXPRBSCNTRESET), // + .LOOPBACK (GT_LOOPBACK), // + + .RXPRBSERR (GT_RXPRBSERR), // + + //---------- OOB ------------------------------------------------------- + .TXCOMINIT (1'd0), // + .TXCOMSAS (1'd0), // + .TXCOMWAKE (1'd0), // + .RXOOBRESET (1'd0), // + + .TXCOMFINISH (), // + .RXCOMINITDET (), // + .RXCOMSASDET (), // + .RXCOMWAKEDET (), // + + //---------- MISC ------------------------------------------------------ + .SETERRSTATUS ( 1'd0), // + .TXDIFFPD ( 1'd0), // + .TXPISOPD ( 1'd0), // + .TSTIN (20'hFFFFF), // + + .TSTOUT () // GTX + + ); + + //---------- Default ------------------------------------------------------- + assign dmonitorout[14:8] = 7'd0; // GTH GTP + assign GT_TXSYNCOUT = 1'd0; // GTH GTP + assign GT_TXSYNCDONE = 1'd0; // GTH GTP + assign GT_RXSYNCOUT = 1'd0; // GTH GTP + assign GT_RXSYNCDONE = 1'd0; // GTH GTP + assign GT_RXPMARESETDONE = 1'd0; // GTH GTP + + end + +endgenerate + +//---------- GT Wrapper Outputs ------------------------------------------------ +assign GT_RXDATA = rxdata [31:0]; +assign GT_RXDATAK = rxdatak[ 3:0]; +assign GT_RXCHARISCOMMA = rxchariscomma[ 3:0]; +assign GT_DMONITOROUT = dmonitorout; + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v new file mode 100644 index 0000000000000000000000000000000000000000..7ae62bd26ad8f04ff579ade7b5469976a338907c --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v @@ -0,0 +1,68 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gtp_cpllpd_ovrd.v +// Version : 3.3 +`timescale 1ns / 1ps +module pcie_7x_0_gtp_cpllpd_ovrd ( + input i_ibufds_gte2, + output o_cpllpd_ovrd, + output o_cpllreset_ovrd + ); + (* equivalent_register_removal="no" *) reg [95:0] cpllpd_wait = 96'hFFFFFFFFFFFFFFFFFFFFFFFF; + (* equivalent_register_removal="no" *) reg [127:0] cpllreset_wait = 128'h000000000000000000000000000000FF; + always @(posedge i_ibufds_gte2) + begin + cpllpd_wait <= {cpllpd_wait[94:0], 1'b0}; + cpllreset_wait <= {cpllreset_wait[126:0], 1'b0}; + end + assign o_cpllpd_ovrd = cpllpd_wait[95]; + assign o_cpllreset_ovrd = cpllreset_wait[127]; +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_pipe_drp.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_pipe_drp.v new file mode 100644 index 0000000000000000000000000000000000000000..280067fc6abf73226726d0dab11b6293778773bd --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_pipe_drp.v @@ -0,0 +1,370 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gtp_pipe_drp.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : gtp_pipe_drp.v +// Description : GTP PIPE DRP Module for 7 Series Transceiver +// Version : 19.0 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- GTP PIPE DRP Module ----------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gtp_pipe_drp # +( + + parameter LOAD_CNT_MAX = 2'd1, // Load max count + parameter INDEX_MAX = 1'd0 // Index max count + +) + +( + + //---------- Input ------------------------------------- + input DRP_CLK, + input DRP_RST_N, + input DRP_X16, + input DRP_START, + input [15:0] DRP_DO, + input DRP_RDY, + + //---------- Output ------------------------------------ + output [ 8:0] DRP_ADDR, + output DRP_EN, + output [15:0] DRP_DI, + output DRP_WE, + output DRP_DONE, + output [ 2:0] DRP_FSM + +); + + //---------- Input Registers --------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg x16_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg start_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [15:0] do_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rdy_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg x16_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg start_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [15:0] do_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rdy_reg2; + + //---------- Internal Signals -------------------------- + reg [ 1:0] load_cnt = 2'd0; + reg [ 4:0] index = 5'd0; + reg [ 8:0] addr_reg = 9'd0; + reg [15:0] di_reg = 16'd0; + + //---------- Output Registers -------------------------- + reg done = 1'd0; + reg [ 2:0] fsm = 0; + + //---------- DRP Address ------------------------------- + localparam ADDR_RX_DATAWIDTH = 9'h011; + + //---------- DRP Mask ---------------------------------- + localparam MASK_RX_DATAWIDTH = 16'b1111011111111111; // Unmask bit [ 11] + + //---------- DRP Data for x16 -------------------------- + localparam X16_RX_DATAWIDTH = 16'b0000000000000000; // 2-byte (16-bit) internal data width + + //---------- DRP Data for x20 -------------------------- + localparam X20_RX_DATAWIDTH = 16'b0000100000000000; // 2-byte (20-bit) internal data width + + //---------- DRP Data ---------------------------------- + wire [15:0] data_rx_datawidth; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 0; + localparam FSM_LOAD = 1; + localparam FSM_READ = 2; + localparam FSM_RRDY = 3; + localparam FSM_WRITE = 4; + localparam FSM_WRDY = 5; + localparam FSM_DONE = 6; + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + //---------- 1st Stage FF -------------------------- + x16_reg1 <= 1'd0; + do_reg1 <= 16'd0; + rdy_reg1 <= 1'd0; + start_reg1 <= 1'd0; + //---------- 2nd Stage FF -------------------------- + x16_reg2 <= 1'd0; + do_reg2 <= 16'd0; + rdy_reg2 <= 1'd0; + start_reg2 <= 1'd0; + end + + else + begin + //---------- 1st Stage FF -------------------------- + x16_reg1 <= DRP_X16; + do_reg1 <= DRP_DO; + rdy_reg1 <= DRP_RDY; + start_reg1 <= DRP_START; + //---------- 2nd Stage FF -------------------------- + x16_reg2 <= x16_reg1; + do_reg2 <= do_reg1; + rdy_reg2 <= rdy_reg1; + start_reg2 <= start_reg1; + end + +end + + + +//---------- Select DRP Data --------------------------------------------------- +assign data_rx_datawidth = x16_reg2 ? X16_RX_DATAWIDTH : X20_RX_DATAWIDTH; + + + +//---------- Load Counter ------------------------------------------------------ +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + load_cnt <= 2'd0; + else + + //---------- Increment Load Counter ---------------- + if ((fsm == FSM_LOAD) && (load_cnt < LOAD_CNT_MAX)) + load_cnt <= load_cnt + 2'd1; + + //---------- Hold Load Counter --------------------- + else if ((fsm == FSM_LOAD) && (load_cnt == LOAD_CNT_MAX)) + load_cnt <= load_cnt; + + //---------- Reset Load Counter -------------------- + else + load_cnt <= 2'd0; + +end + + + +//---------- Update DRP Address and Data --------------------------------------- +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + addr_reg <= 9'd0; + di_reg <= 16'd0; + end + else + begin + + case (index) + + //-------------------------------------------------- + 1'd0 : + begin + addr_reg <= ADDR_RX_DATAWIDTH; + di_reg <= (do_reg2 & MASK_RX_DATAWIDTH) | data_rx_datawidth; + end + + //-------------------------------------------------- + default : + begin + addr_reg <= 9'd0; + di_reg <= 16'd0; + end + + endcase + + end + +end + + + +//---------- PIPE DRP FSM ------------------------------------------------------ +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + fsm <= FSM_IDLE; + index <= 5'd0; + done <= 1'd1; //Fix applied for GTP DRP issue + end + else + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + //---------- Reset or Rate Change -------------- + if (start_reg2) + begin + fsm <= FSM_LOAD; + index <= 5'd0; + done <= 1'd0; + end + //---------- Idle ------------------------------ + else + begin + fsm <= FSM_IDLE; + index <= 5'd0; + done <= 1'd1; + end + end + + //---------- Load DRP Address --------------------- + FSM_LOAD : + + begin + fsm <= (load_cnt == LOAD_CNT_MAX) ? FSM_READ : FSM_LOAD; + index <= index; + + done <= 1'd0; + end + + //---------- Read DRP ------------------------------ + FSM_READ : + + begin + fsm <= FSM_RRDY; + index <= index; + done <= 1'd0; + end + + //---------- Read DRP Ready ------------------------ + FSM_RRDY : + + begin + fsm <= rdy_reg2 ? FSM_WRITE : FSM_RRDY; + index <= index; + done <= 1'd0; + end + + + //---------- Write DRP ----------------------------- + FSM_WRITE : + + begin + fsm <= FSM_WRDY; + index <= index; + done <= 1'd0; + end + + //---------- Write DRP Ready ----------------------- + FSM_WRDY : + + begin + fsm <= rdy_reg2 ? FSM_DONE : FSM_WRDY; + index <= index; + done <= 1'd0; + end + + //---------- DRP Done ------------------------------ + FSM_DONE : + + begin + if (index == INDEX_MAX) + begin + fsm <= FSM_IDLE; + index <= 5'd0; + done <= 1'd1; //Fix applied for GTP DRP issue + end + else + begin + fsm <= FSM_LOAD; + index <= index + 5'd1; + done <= 1'd0; + end + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_IDLE; + index <= 5'd0; + done <= 1'd1; //Fix applied for GTP DRP issue + end + + endcase + + end + +end + + + +//---------- PIPE DRP Output --------------------------------------------------- +assign DRP_ADDR = addr_reg; +assign DRP_EN = (fsm == FSM_READ) || (fsm == FSM_WRITE); +assign DRP_DI = di_reg; +assign DRP_WE = (fsm == FSM_WRITE); +assign DRP_DONE = done; +assign DRP_FSM = fsm; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_pipe_rate.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_pipe_rate.v new file mode 100644 index 0000000000000000000000000000000000000000..51ae1112d6e1338c80e3321b2a952924bfc97b10 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_pipe_rate.v @@ -0,0 +1,461 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gtp_pipe_rate.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : gtp_pipe_rate.v +// Description : PIPE Rate Module for 7 Series Transceiver +// Version : 19.0 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- PIPE Rate Module -------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gtp_pipe_rate # +( + + parameter PCIE_SIM_SPEEDUP = "FALSE", // PCIe sim mode + parameter TXDATA_WAIT_MAX = 4'd15 // TXDATA wait max + +) + +( + + //---------- Input ------------------------------------- + input RATE_CLK, + input RATE_RST_N, + input [ 1:0] RATE_RATE_IN, + input RATE_DRP_DONE, + input RATE_RXPMARESETDONE, + input RATE_TXRATEDONE, + input RATE_RXRATEDONE, + input RATE_TXSYNC_DONE, + input RATE_PHYSTATUS, + + //---------- Output ------------------------------------ + output RATE_PCLK_SEL, + output RATE_DRP_START, + output RATE_DRP_X16, + output [ 2:0] RATE_RATE_OUT, + output RATE_TXSYNC_START, + output RATE_DONE, + output RATE_IDLE, + output [ 4:0] RATE_FSM + +); + + //---------- Input FF or Buffer ------------------------ +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 1:0] rate_in_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg drp_done_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rxpmaresetdone_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg txratedone_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rxratedone_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg phystatus_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg txsync_done_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 1:0] rate_in_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg drp_done_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rxpmaresetdone_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg txratedone_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rxratedone_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg phystatus_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg txsync_done_reg2; + + //---------- Internal Signals -------------------------- + wire [ 2:0] rate; + reg [ 3:0] txdata_wait_cnt = 4'd0; + reg txratedone = 1'd0; + reg rxratedone = 1'd0; + reg phystatus = 1'd0; + reg ratedone = 1'd0; + + //---------- Output FF or Buffer ----------------------- + reg pclk_sel = 1'd0; + reg [ 2:0] rate_out = 3'd0; + reg [ 3:0] fsm = 0; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 0; + localparam FSM_TXDATA_WAIT = 1; + localparam FSM_PCLK_SEL = 2; + localparam FSM_DRP_X16_START = 3; + localparam FSM_DRP_X16_DONE = 4; + localparam FSM_RATE_SEL = 5; + localparam FSM_RXPMARESETDONE = 6; + localparam FSM_DRP_X20_START = 7; + localparam FSM_DRP_X20_DONE = 8; + localparam FSM_RATE_DONE = 9; + localparam FSM_TXSYNC_START = 10; + localparam FSM_TXSYNC_DONE = 11; + localparam FSM_DONE = 12; // Must sync value to pipe_user.v + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge RATE_CLK) +begin + + if (!RATE_RST_N) + begin + //---------- 1st Stage FF -------------------------- + rate_in_reg1 <= 2'd0; + drp_done_reg1 <= 1'd0; + rxpmaresetdone_reg1 <= 1'd0; + txratedone_reg1 <= 1'd0; + rxratedone_reg1 <= 1'd0; + phystatus_reg1 <= 1'd0; + txsync_done_reg1 <= 1'd0; + //---------- 2nd Stage FF -------------------------- + rate_in_reg2 <= 2'd0; + drp_done_reg2 <= 1'd0; + rxpmaresetdone_reg2 <= 1'd0; + txratedone_reg2 <= 1'd0; + rxratedone_reg2 <= 1'd0; + phystatus_reg2 <= 1'd0; + txsync_done_reg2 <= 1'd0; + end + else + begin + //---------- 1st Stage FF -------------------------- + rate_in_reg1 <= RATE_RATE_IN; + drp_done_reg1 <= RATE_DRP_DONE; + rxpmaresetdone_reg1 <= RATE_RXPMARESETDONE; + txratedone_reg1 <= RATE_TXRATEDONE; + rxratedone_reg1 <= RATE_RXRATEDONE; + phystatus_reg1 <= RATE_PHYSTATUS; + txsync_done_reg1 <= RATE_TXSYNC_DONE; + //---------- 2nd Stage FF -------------------------- + rate_in_reg2 <= rate_in_reg1; + drp_done_reg2 <= drp_done_reg1; + rxpmaresetdone_reg2 <= rxpmaresetdone_reg1; + txratedone_reg2 <= txratedone_reg1; + rxratedone_reg2 <= rxratedone_reg1; + phystatus_reg2 <= phystatus_reg1; + txsync_done_reg2 <= txsync_done_reg1; + end + +end + + + +//---------- Select Rate ------------------------------------------------------- +// Gen1 : div 2 using [TX/RX]OUT_DIV = 2 +// Gen2 : div 1 using [TX/RX]RATE = 3'd1 +//------------------------------------------------------------------------------ +assign rate = (rate_in_reg2 == 2'd1) ? 3'd1 : 3'd0; + + + +//---------- TXDATA Wait Counter ----------------------------------------------- +always @ (posedge RATE_CLK) +begin + + if (!RATE_RST_N) + txdata_wait_cnt <= 4'd0; + else + + //---------- Increment Wait Counter ---------------- + if ((fsm == FSM_TXDATA_WAIT) && (txdata_wait_cnt < TXDATA_WAIT_MAX)) + txdata_wait_cnt <= txdata_wait_cnt + 4'd1; + + //---------- Hold Wait Counter --------------------- + else if ((fsm == FSM_TXDATA_WAIT) && (txdata_wait_cnt == TXDATA_WAIT_MAX)) + txdata_wait_cnt <= txdata_wait_cnt; + + //---------- Reset Wait Counter -------------------- + else + txdata_wait_cnt <= 4'd0; + +end + + + +//---------- Latch TXRATEDONE, RXRATEDONE, and PHYSTATUS ----------------------- +always @ (posedge RATE_CLK) +begin + + if (!RATE_RST_N) + begin + txratedone <= 1'd0; + rxratedone <= 1'd0; + phystatus <= 1'd0; + ratedone <= 1'd0; + end + else + begin + + if ((fsm == FSM_RATE_DONE) || (fsm == FSM_RXPMARESETDONE) || (fsm == FSM_DRP_X20_START) || (fsm == FSM_DRP_X20_DONE)) + + begin + + //---------- Latch TXRATEDONE ------------------ + if (txratedone_reg2) + txratedone <= 1'd1; + else + txratedone <= txratedone; + + //---------- Latch RXRATEDONE ------------------ + if (rxratedone_reg2) + rxratedone <= 1'd1; + else + rxratedone <= rxratedone; + + //---------- Latch PHYSTATUS ------------------- + if (phystatus_reg2) + phystatus <= 1'd1; + else + phystatus <= phystatus; + + //---------- Latch Rate Done ------------------- + if (rxratedone && txratedone && phystatus) + ratedone <= 1'd1; + else + ratedone <= ratedone; + + end + + else + + begin + txratedone <= 1'd0; + rxratedone <= 1'd0; + phystatus <= 1'd0; + ratedone <= 1'd0; + end + + end + +end + + + +//---------- PIPE Rate FSM ----------------------------------------------------- +always @ (posedge RATE_CLK) +begin + + if (!RATE_RST_N) + begin + fsm <= FSM_IDLE; + pclk_sel <= 1'd0; + rate_out <= 3'd0; + end + else + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + //---------- Detect Rate Change ---------------- + if (rate_in_reg2 != rate_in_reg1) + begin + fsm <= FSM_TXDATA_WAIT; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + else + begin + fsm <= FSM_IDLE; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + end + + //---------- Wait for TXDATA to TX[P/N] Latency ---- + FSM_TXDATA_WAIT : + + begin + fsm <= (txdata_wait_cnt == TXDATA_WAIT_MAX) ? FSM_PCLK_SEL : FSM_TXDATA_WAIT; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Select PCLK Frequency ----------------- + // Gen1 : PCLK = 125 MHz + // Gen2 : PCLK = 250 MHz + //-------------------------------------------------- + FSM_PCLK_SEL : + + begin + fsm <= (PCIE_SIM_SPEEDUP == "TRUE") ? FSM_RATE_SEL : FSM_DRP_X16_START; + pclk_sel <= (rate_in_reg2 == 2'd1); + rate_out <= rate_out; + end + + //---------- Start DRP x16 ------------------------- + FSM_DRP_X16_START : + + begin + fsm <= (!drp_done_reg2) ? FSM_DRP_X16_DONE : FSM_DRP_X16_START; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Wait for DRP x16 Done ----------------- + FSM_DRP_X16_DONE : + + begin + fsm <= drp_done_reg2 ? FSM_RATE_SEL : FSM_DRP_X16_DONE; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Select Rate --------------------------- + FSM_RATE_SEL : + + begin + fsm <= (PCIE_SIM_SPEEDUP == "TRUE") ? FSM_RATE_DONE : FSM_RXPMARESETDONE; + pclk_sel <= pclk_sel; + rate_out <= rate; // Update [TX/RX]RATE + end + + //---------- Wait for RXPMARESETDONE De-assertion -- + FSM_RXPMARESETDONE : + + begin + fsm <= (!rxpmaresetdone_reg2) ? FSM_DRP_X20_START : FSM_RXPMARESETDONE; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Start DRP x20 ------------------------- + FSM_DRP_X20_START : + + begin + fsm <= (!drp_done_reg2) ? FSM_DRP_X20_DONE : FSM_DRP_X20_START; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Wait for DRP x20 Done ----------------- + FSM_DRP_X20_DONE : + + begin + fsm <= drp_done_reg2 ? FSM_RATE_DONE : FSM_DRP_X20_DONE; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Wait for Rate Change Done ------------- + FSM_RATE_DONE : + + begin + if (ratedone) + fsm <= FSM_TXSYNC_START; + else + fsm <= FSM_RATE_DONE; + + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Start TX Sync ------------------------- + FSM_TXSYNC_START: + + begin + fsm <= (!txsync_done_reg2 ? FSM_TXSYNC_DONE : FSM_TXSYNC_START); + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Wait for TX Sync Done ----------------- + FSM_TXSYNC_DONE: + + begin + fsm <= (txsync_done_reg2 ? FSM_DONE : FSM_TXSYNC_DONE); + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Rate Change Done ---------------------- + FSM_DONE : + + begin + fsm <= FSM_IDLE; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_IDLE; + pclk_sel <= 1'd0; + rate_out <= 3'd0; + end + + endcase + + end + +end + + + +//---------- PIPE Rate Output -------------------------------------------------- +assign RATE_PCLK_SEL = pclk_sel; +assign RATE_DRP_START = (fsm == FSM_DRP_X16_START) || (fsm == FSM_DRP_X20_START); +assign RATE_DRP_X16 = (fsm == FSM_DRP_X16_START) || (fsm == FSM_DRP_X16_DONE); +assign RATE_RATE_OUT = rate_out; +assign RATE_TXSYNC_START = (fsm == FSM_TXSYNC_START); +assign RATE_DONE = (fsm == FSM_DONE); +assign RATE_IDLE = (fsm == FSM_IDLE); +assign RATE_FSM = {1'd0, fsm}; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_pipe_reset.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_pipe_reset.v new file mode 100644 index 0000000000000000000000000000000000000000..95fbecc4dfb564bfd4db306d0229b648c88804bd --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtp_pipe_reset.v @@ -0,0 +1,537 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gtp_pipe_reset.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : gtp_pipe_reset.v +// Description : GTP PIPE Reset Module for 7 Series Transceiver +// Version : 19.0 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- PIPE Reset Module ------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gtp_pipe_reset # +( + + //---------- Global ------------------------------------ + parameter PCIE_SIM_SPEEDUP = "FALSE", // PCIe sim speedup + parameter PCIE_LANE = 1, // PCIe number of lanes + //---------- Local ------------------------------------- + parameter CFG_WAIT_MAX = 6'd63, // Configuration wait max + parameter BYPASS_RXCDRLOCK = 1 // Bypass RXCDRLOCK + +) + +( + + //---------- Input ------------------------------------- + input RST_CLK, + input RST_RXUSRCLK, + input RST_DCLK, + input RST_RST_N, + input [PCIE_LANE-1:0] RST_DRP_DONE, + input [PCIE_LANE-1:0] RST_RXPMARESETDONE, + input RST_PLLLOCK, + input [PCIE_LANE-1:0] RST_RATE_IDLE, + input [PCIE_LANE-1:0] RST_RXCDRLOCK, + input RST_MMCM_LOCK, + input [PCIE_LANE-1:0] RST_RESETDONE, + input [PCIE_LANE-1:0] RST_PHYSTATUS, + input [PCIE_LANE-1:0] RST_TXSYNC_DONE, + + //---------- Output ------------------------------------ + output RST_CPLLRESET, + output RST_CPLLPD, + output reg RST_DRP_START, + output reg RST_DRP_X16, + output RST_RXUSRCLK_RESET, + output RST_DCLK_RESET, + output RST_GTRESET, + output RST_USERRDY, + output RST_TXSYNC_START, + output RST_IDLE, + output [ 4:0] RST_FSM + +); + + //---------- Input Register ---------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] drp_done_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rxpmaresetdone_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg plllock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rate_idle_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rxcdrlock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg mmcm_lock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] resetdone_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] phystatus_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] txsync_done_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] drp_done_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rxpmaresetdone_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg plllock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rate_idle_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rxcdrlock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg mmcm_lock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] resetdone_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] phystatus_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] txsync_done_reg2; + + //---------- Internal Signal --------------------------- + reg [ 5:0] cfg_wait_cnt = 6'd0; + + //---------- Output Register --------------------------- + reg pllreset = 1'd0; + reg pllpd = 1'd0; + reg rxusrclk_rst_reg1 = 1'd0; + reg rxusrclk_rst_reg2 = 1'd0; + reg dclk_rst_reg1 = 1'd0; + reg dclk_rst_reg2 = 1'd0; + reg gtreset = 1'd0; + reg userrdy = 1'd0; + reg [ 4:0] fsm = 5'h1; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 5'h0; + localparam FSM_CFG_WAIT = 5'h1; + localparam FSM_PLLRESET = 5'h2; + localparam FSM_DRP_X16_START = 5'h3; + localparam FSM_DRP_X16_DONE = 5'h4; + localparam FSM_PLLLOCK = 5'h5; + localparam FSM_GTRESET = 5'h6; + localparam FSM_RXPMARESETDONE_1 = 5'h7; + localparam FSM_RXPMARESETDONE_2 = 5'h8; + localparam FSM_DRP_X20_START = 5'h9; + localparam FSM_DRP_X20_DONE = 5'hA; + localparam FSM_MMCM_LOCK = 5'hB; + localparam FSM_RESETDONE = 5'hC; + localparam FSM_TXSYNC_START = 5'hD; + localparam FSM_TXSYNC_DONE = 5'hE; + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge RST_CLK) +begin + + if (!RST_RST_N) + begin + //---------- 1st Stage FF -------------------------- + drp_done_reg1 <= {PCIE_LANE{1'd0}}; + rxpmaresetdone_reg1 <= {PCIE_LANE{1'd0}}; + plllock_reg1 <= 1'd0; + rate_idle_reg1 <= {PCIE_LANE{1'd0}}; + rxcdrlock_reg1 <= {PCIE_LANE{1'd0}}; + mmcm_lock_reg1 <= 1'd0; + resetdone_reg1 <= {PCIE_LANE{1'd0}}; + phystatus_reg1 <= {PCIE_LANE{1'd0}}; + txsync_done_reg1 <= {PCIE_LANE{1'd0}}; + //---------- 2nd Stage FF -------------------------- + drp_done_reg2 <= {PCIE_LANE{1'd0}}; + rxpmaresetdone_reg2 <= {PCIE_LANE{1'd0}}; + plllock_reg2 <= 1'd0; + rate_idle_reg2 <= {PCIE_LANE{1'd0}}; + rxcdrlock_reg2 <= {PCIE_LANE{1'd0}}; + mmcm_lock_reg2 <= 1'd0; + resetdone_reg2 <= {PCIE_LANE{1'd0}}; + phystatus_reg2 <= {PCIE_LANE{1'd0}}; + txsync_done_reg2 <= {PCIE_LANE{1'd0}}; + end + else + begin + //---------- 1st Stage FF -------------------------- + drp_done_reg1 <= RST_DRP_DONE; + rxpmaresetdone_reg1 <= RST_RXPMARESETDONE; + plllock_reg1 <= RST_PLLLOCK; + rate_idle_reg1 <= RST_RATE_IDLE; + rxcdrlock_reg1 <= RST_RXCDRLOCK; + mmcm_lock_reg1 <= RST_MMCM_LOCK; + resetdone_reg1 <= RST_RESETDONE; + phystatus_reg1 <= RST_PHYSTATUS; + txsync_done_reg1 <= RST_TXSYNC_DONE; + //---------- 2nd Stage FF -------------------------- + drp_done_reg2 <= drp_done_reg1; + rxpmaresetdone_reg2 <= rxpmaresetdone_reg1; + plllock_reg2 <= plllock_reg1; + rate_idle_reg2 <= rate_idle_reg1; + rxcdrlock_reg2 <= rxcdrlock_reg1; + mmcm_lock_reg2 <= mmcm_lock_reg1; + resetdone_reg2 <= resetdone_reg1; + phystatus_reg2 <= phystatus_reg1; + txsync_done_reg2 <= txsync_done_reg1; + end + +end + + + +//---------- Configuration Reset Wait Counter ---------------------------------- +always @ (posedge RST_CLK) +begin + + if (!RST_RST_N) + cfg_wait_cnt <= 6'd0; + else + + //---------- Increment Configuration Reset Wait Counter + if ((fsm == FSM_CFG_WAIT) && (cfg_wait_cnt < CFG_WAIT_MAX)) + cfg_wait_cnt <= cfg_wait_cnt + 6'd1; + + //---------- Hold Configuration Reset Wait Counter - + else if ((fsm == FSM_CFG_WAIT) && (cfg_wait_cnt == CFG_WAIT_MAX)) + cfg_wait_cnt <= cfg_wait_cnt; + + //---------- Reset Configuration Reset Wait Counter + else + cfg_wait_cnt <= 6'd0; + +end + + + +//---------- PIPE Reset FSM ---------------------------------------------------- +always @ (posedge RST_CLK) +begin + + if (!RST_RST_N) + begin + fsm <= FSM_CFG_WAIT; + pllreset <= 1'd0; + pllpd <= 1'd0; + gtreset <= 1'd0; + userrdy <= 1'd0; + end + else + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + if (!RST_RST_N) + begin + fsm <= FSM_CFG_WAIT; + pllreset <= 1'd0; + pllpd <= 1'd0; + gtreset <= 1'd0; + userrdy <= 1'd0; + end + else + begin + fsm <= FSM_IDLE; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + end + + //---------- Wait for Configuration Reset Delay --- + FSM_CFG_WAIT : + + begin + fsm <= ((cfg_wait_cnt == CFG_WAIT_MAX) ? FSM_PLLRESET : FSM_CFG_WAIT); + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Hold PLL and GTP Channel in Reset ---- + FSM_PLLRESET : + + begin + fsm <= (((~plllock_reg2) && (&(~resetdone_reg2))) ? FSM_DRP_X16_START : FSM_PLLRESET); + pllreset <= 1'd1; + pllpd <= pllpd; + gtreset <= 1'd1; + userrdy <= userrdy; + end + + //---------- Start DRP x16 ------------------------- + FSM_DRP_X16_START : + + begin + fsm <= &(~drp_done_reg2) ? FSM_DRP_X16_DONE : FSM_DRP_X16_START; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for DRP x16 Done ----------------- + FSM_DRP_X16_DONE : + + begin + fsm <= (&drp_done_reg2) ? FSM_PLLLOCK : FSM_DRP_X16_DONE; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for PLL Lock -------------------- + FSM_PLLLOCK : + + begin + fsm <= (plllock_reg2 ? FSM_GTRESET : FSM_PLLLOCK); + pllreset <= 1'd0; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Release GTRESET ----------------------- + FSM_GTRESET : + + begin + fsm <= FSM_RXPMARESETDONE_1; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= 1'b0; + userrdy <= userrdy; + end + + //---------- Wait for RXPMARESETDONE Assertion ----- + FSM_RXPMARESETDONE_1 : + + begin + fsm <= (&rxpmaresetdone_reg2 || (PCIE_SIM_SPEEDUP == "TRUE")) ? FSM_RXPMARESETDONE_2 : FSM_RXPMARESETDONE_1; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for RXPMARESETDONE De-assertion -- + FSM_RXPMARESETDONE_2 : + + begin + fsm <= (&(~rxpmaresetdone_reg2) || (PCIE_SIM_SPEEDUP == "TRUE")) ? FSM_DRP_X20_START : FSM_RXPMARESETDONE_2; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Start DRP x20 ------------------------- + FSM_DRP_X20_START : + + begin + fsm <= &(~drp_done_reg2) ? FSM_DRP_X20_DONE : FSM_DRP_X20_START; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for DRP x20 Done ----------------- + FSM_DRP_X20_DONE : + + begin + fsm <= (&drp_done_reg2) ? FSM_MMCM_LOCK : FSM_DRP_X20_DONE; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for MMCM and RX CDR Lock --------- + FSM_MMCM_LOCK : + + begin + if (mmcm_lock_reg2 && (&rxcdrlock_reg2 || (BYPASS_RXCDRLOCK == 1))) + begin + fsm <= FSM_RESETDONE; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= 1'd1; + end + else + begin + fsm <= FSM_MMCM_LOCK; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= 1'd0; + end + end + + //---------- Wait for [TX/RX]RESETDONE and PHYSTATUS + FSM_RESETDONE : + + begin + fsm <= (&resetdone_reg2 && (&(~phystatus_reg2)) ? FSM_TXSYNC_START : FSM_RESETDONE); + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Start TX Sync ------------------------- + FSM_TXSYNC_START : + + begin + fsm <= (&(~txsync_done_reg2) ? FSM_TXSYNC_DONE : FSM_TXSYNC_START); + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for TX Sync Done ----------------- + FSM_TXSYNC_DONE : + + begin + fsm <= (&txsync_done_reg2 ? FSM_IDLE : FSM_TXSYNC_DONE); + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_CFG_WAIT; + pllreset <= 1'd0; + pllpd <= 1'd0; + gtreset <= 1'd0; + userrdy <= 1'd0; + end + + endcase + + end + +end + + + +//---------- RXUSRCLK Reset Synchronizer --------------------------------------- +always @ (posedge RST_RXUSRCLK) +begin + + if (pllreset) + begin + rxusrclk_rst_reg1 <= 1'd1; + rxusrclk_rst_reg2 <= 1'd1; + end + else + begin + rxusrclk_rst_reg1 <= 1'd0; + rxusrclk_rst_reg2 <= rxusrclk_rst_reg1; + end + +end + +//---------- DCLK Reset Synchronizer ------------------------------------------- +always @ (posedge RST_DCLK) +begin + + if (fsm == FSM_CFG_WAIT) + begin + dclk_rst_reg1 <= 1'd1; + dclk_rst_reg2 <= dclk_rst_reg1; + end + else + begin + dclk_rst_reg1 <= 1'd0; + dclk_rst_reg2 <= dclk_rst_reg1; + end + +end + + + +//---------- PIPE Reset Output ------------------------------------------------- +assign RST_CPLLRESET = pllreset; +assign RST_CPLLPD = pllpd; +assign RST_RXUSRCLK_RESET = rxusrclk_rst_reg2; +assign RST_DCLK_RESET = dclk_rst_reg2; +assign RST_GTRESET = gtreset; +assign RST_USERRDY = userrdy; +assign RST_TXSYNC_START = (fsm == FSM_TXSYNC_START); +assign RST_IDLE = (fsm == FSM_IDLE); +assign RST_FSM = fsm; + + + +//-------------------------------------------------------------------------------------------------- +// Register Output +//-------------------------------------------------------------------------------------------------- +always @ (posedge RST_CLK) +begin + + if (!RST_RST_N) + begin + RST_DRP_START <= 1'd0; + RST_DRP_X16 <= 1'd0; + end + else + begin + RST_DRP_START <= (fsm == FSM_DRP_X16_START) || (fsm == FSM_DRP_X20_START); + RST_DRP_X16 <= (fsm == FSM_DRP_X16_START) || (fsm == FSM_DRP_X16_DONE); + end + +end + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v new file mode 100644 index 0000000000000000000000000000000000000000..6463ab7f0133d1d61dbaae7e3d5603a3af8c1e07 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v @@ -0,0 +1,68 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gtx_cpllpd_ovrd.v +// Version : 3.3 +`timescale 1ns / 1ps +module pcie_7x_0_gtx_cpllpd_ovrd ( + input i_ibufds_gte2, + output o_cpllpd_ovrd, + output o_cpllreset_ovrd + ); + (* equivalent_register_removal="no" *) reg [95:0] cpllpd_wait = 96'hFFFFFFFFFFFFFFFFFFFFFFFF; + (* equivalent_register_removal="no" *) reg [127:0] cpllreset_wait = 128'h000000000000000000000000000000FF; + always @(posedge i_ibufds_gte2) + begin + cpllpd_wait <= {cpllpd_wait[94:0], 1'b0}; + cpllreset_wait <= {cpllreset_wait[126:0], 1'b0}; + end + assign o_cpllpd_ovrd = cpllpd_wait[95]; + assign o_cpllreset_ovrd = cpllreset_wait[127]; +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie2_top.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie2_top.v new file mode 100644 index 0000000000000000000000000000000000000000..5d5542171bcbaf2dc186a182964cb2da3f0b5793 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie2_top.v @@ -0,0 +1,1035 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie2_top.v +// Version : 3.3 + +//-------------------------------------------------------------------------------- + + +`timescale 1ns/1ps +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie2_top # ( +parameter c_component_name ="pcie_7x_v3_3_18", +parameter dev_port_type ="0000", +parameter c_dev_port_type ="0", +parameter c_header_type ="00", +parameter c_upstream_facing ="TRUE", +parameter max_lnk_wdt = "000100", +parameter max_lnk_spd = "1", +parameter c_gen1 = 1'b0, +parameter c_int_width = 64, +parameter pci_exp_int_freq = 2, +parameter c_pcie_fast_config = 0, +parameter bar_0 = "FFFFFF80", +parameter bar_1 = "00000000", +parameter bar_2 = "00000000", +parameter bar_3 = "00000000", +parameter bar_4 = "00000000", +parameter bar_5 = "00000000", +parameter xrom_bar = "00000000", +parameter cost_table = 1, +parameter ven_id = "10EE", +parameter dev_id = "7028", +parameter rev_id = "00", +parameter subsys_ven_id = "10EE", +parameter subsys_id = "0007", +parameter class_code = "058000", +parameter cardbus_cis_ptr = "00000000", +parameter cap_ver = "2", +parameter c_pcie_cap_slot_implemented = "FALSE", +parameter mps = "010", +parameter cmps = "2", +parameter ext_tag_fld_sup = "FALSE", +parameter c_dev_control_ext_tag_default = "FALSE", +parameter phantm_func_sup = "00", +parameter c_phantom_functions = "0", +parameter ep_l0s_accpt_lat = "000", +parameter c_ep_l0s_accpt_lat = "0", +parameter ep_l1_accpt_lat = "111", +parameter c_ep_l1_accpt_lat = "7", +parameter c_cpl_timeout_disable_sup = "FALSE", +parameter c_cpl_timeout_range = "0010", +parameter c_cpl_timeout_ranges_sup = "2", +parameter c_buf_opt_bma = "TRUE", +parameter c_perf_level_high = "TRUE", +parameter c_tx_last_tlp = "29", +parameter c_rx_ram_limit = "7FF", +parameter c_fc_ph = "32", +parameter c_fc_pd = "437", +parameter c_fc_nph = "12", +parameter c_fc_npd = "24", +parameter c_fc_cplh = "36", +parameter c_fc_cpld = "461", +parameter c_cpl_inf = "TRUE", +parameter c_cpl_infinite = "TRUE", +parameter c_surprise_dn_err_cap = "FALSE", +parameter c_dll_lnk_actv_cap = "FALSE", +parameter c_lnk_bndwdt_notif = "FALSE", +parameter c_external_clocking = "TRUE", +parameter c_trgt_lnk_spd = "0", +parameter c_hw_auton_spd_disable = "FALSE", +parameter c_de_emph = "FALSE", +parameter slot_clk = "TRUE", +parameter c_rcb = "0", +parameter c_root_cap_crs = "FALSE", +parameter c_slot_cap_attn_butn = "FALSE", +parameter c_slot_cap_attn_ind = "FALSE", +parameter c_slot_cap_pwr_ctrl = "FALSE", +parameter c_slot_cap_pwr_ind = "FALSE", +parameter c_slot_cap_hotplug_surprise = "FALSE", +parameter c_slot_cap_hotplug_cap = "FALSE", +parameter c_slot_cap_mrl = "FALSE", +parameter c_slot_cap_elec_interlock = "FALSE", +parameter c_slot_cap_no_cmd_comp_sup = "FALSE", +parameter c_slot_cap_pwr_limit_value = "0", +parameter c_slot_cap_pwr_limit_scale = "0", +parameter c_slot_cap_physical_slot_num = "0", +parameter intx = "TRUE", +parameter int_pin = "1", +parameter c_msi_cap_on = "TRUE", +parameter c_pm_cap_next_ptr = "48", +parameter c_msi_64b_addr = "TRUE", +parameter c_msi = "0", +parameter c_msi_mult_msg_extn = "0", +parameter c_msi_per_vctr_mask_cap = "FALSE", +parameter c_msix_cap_on = "FALSE", +parameter c_msix_next_ptr = "00", +parameter c_pcie_cap_next_ptr = "00", +parameter c_msix_table_size = "000", +parameter c_msix_table_offset = "0", +parameter c_msix_table_bir = "0", +parameter c_msix_pba_offset = "0", +parameter c_msix_pba_bir = "0", +parameter dsi = "0", +parameter c_dsi_bool = "FALSE", +parameter d1_sup = "0", +parameter c_d1_support = "FALSE", +parameter d2_sup = "0", +parameter c_d2_support = "FALSE", +parameter pme_sup = "0F", +parameter c_pme_support = "0F", +parameter no_soft_rst = "TRUE", +parameter pwr_con_d0_state = "00", +parameter con_scl_fctr_d0_state = "0", +parameter pwr_con_d1_state = "00", +parameter con_scl_fctr_d1_state = "0", +parameter pwr_con_d2_state = "00", +parameter con_scl_fctr_d2_state = "0", +parameter pwr_con_d3_state = "00", +parameter con_scl_fctr_d3_state = "0", +parameter pwr_dis_d0_state = "00", +parameter dis_scl_fctr_d0_state = "0", +parameter pwr_dis_d1_state = "00", +parameter dis_scl_fctr_d1_state = "0", +parameter pwr_dis_d2_state = "00", +parameter dis_scl_fctr_d2_state = "0", +parameter pwr_dis_d3_state = "00", +parameter dis_scl_fctr_d3_state = "0", +parameter c_dsn_cap_enabled = "TRUE", +parameter c_dsn_base_ptr = "100", +parameter c_vc_cap_enabled = "FALSE", +parameter c_vc_base_ptr = "000", +parameter c_vc_cap_reject_snoop = "FALSE", +parameter c_vsec_cap_enabled = "FALSE", +parameter c_vsec_base_ptr = "000", +parameter c_vsec_next_ptr = "000", +parameter c_dsn_next_ptr = "000", +parameter c_vc_next_ptr = "000", +parameter c_pci_cfg_space_addr = "3F", +parameter c_ext_pci_cfg_space_addr = "3FF", +parameter c_last_cfg_dw = "10C", +parameter c_enable_msg_route = "00000000000", +parameter bram_lat = "0", +parameter c_rx_raddr_lat = "0", +parameter c_rx_rdata_lat = "2", +parameter c_rx_write_lat = "0", +parameter c_tx_raddr_lat = "0", +parameter c_tx_rdata_lat = "2", +parameter c_tx_write_lat = "0", +parameter c_ll_ack_timeout_enable = "FALSE", +parameter c_ll_ack_timeout_function = "0", +parameter c_ll_ack_timeout = "0000", +parameter c_ll_replay_timeout_enable = "FALSE", +parameter c_ll_replay_timeout_func = "1", +parameter c_ll_replay_timeout = "0000", +parameter c_dis_lane_reverse = "TRUE", +parameter c_upconfig_capable = "TRUE", +parameter c_disable_scrambling = "FALSE", +parameter c_disable_tx_aspm_l0s = "0", +parameter c_rev_gt_order = "FALSE", +parameter c_pcie_dbg_ports = "FALSE", +parameter pci_exp_ref_freq = "0", +parameter c_xlnx_ref_board = "NONE", +parameter c_pcie_blk_locn = "0", +parameter c_ur_atomic = "FALSE", +parameter c_dev_cap2_atomicop32_completer_supported = "FALSE", +parameter c_dev_cap2_atomicop64_completer_supported = "FALSE", +parameter c_dev_cap2_cas128_completer_supported = "FALSE", +parameter c_dev_cap2_tph_completer_supported = "00", +parameter c_dev_cap2_ari_forwarding_supported = "FALSE", +parameter c_dev_cap2_atomicop_routing_supported = "FALSE", +parameter c_link_cap_aspm_optionality = "FALSE", +parameter c_aer_cap_on = "FALSE", +parameter c_aer_base_ptr = "000", +parameter c_aer_cap_nextptr = "000", +parameter c_aer_cap_ecrc_check_capable = "FALSE", +parameter c_aer_cap_multiheader = "FALSE", +parameter c_aer_cap_permit_rooterr_update = "FALSE", +parameter c_rbar_cap_on = "FALSE", +parameter c_rbar_base_ptr = "000", +parameter c_rbar_cap_nextptr = "000", +parameter c_rbar_num = "0", +parameter c_rbar_cap_sup0 = "00001", +parameter c_rbar_cap_index0 = "0", +parameter c_rbar_cap_control_encodedbar0 = "00", +parameter c_rbar_cap_sup1 = "00001", +parameter c_rbar_cap_index1 = "0", +parameter c_rbar_cap_control_encodedbar1 = "00", +parameter c_rbar_cap_sup2 = "00001", +parameter c_rbar_cap_index2 = "0", +parameter c_rbar_cap_control_encodedbar2 = "00", +parameter c_rbar_cap_sup3 = "00001", +parameter c_rbar_cap_index3 = "0", +parameter c_rbar_cap_control_encodedbar3 = "00", +parameter c_rbar_cap_sup4 = "00001", +parameter c_rbar_cap_index4 = "0", +parameter c_rbar_cap_control_encodedbar4 = "00", +parameter c_rbar_cap_sup5 = "00001", +parameter c_rbar_cap_index5 = "0", +parameter c_rbar_cap_control_encodedbar5 = "00", +parameter c_recrc_check = "0", +parameter c_recrc_check_trim = "FALSE", +parameter c_disable_rx_poisoned_resp = "FALSE", +parameter c_trn_np_fc = "TRUE", +parameter c_ur_inv_req = "TRUE", +parameter c_ur_prs_response = "TRUE", +parameter c_silicon_rev = "1", +parameter c_aer_cap_optional_err_support = "000000", +parameter PIPE_SIM = "FALSE", +parameter PCIE_EXT_CLK = "TRUE", +parameter PCIE_EXT_GT_COMMON = "FALSE", +parameter EXT_CH_GT_DRP = "TRUE", +parameter TRANSCEIVER_CTRL_STATUS_PORTS = "FALSE", +parameter SHARED_LOGIC_IN_CORE = "FALSE", +parameter PL_INTERFACE = "TRUE", +parameter CFG_MGMT_IF = "TRUE", +parameter CFG_CTL_IF = "TRUE", +parameter CFG_STATUS_IF = "TRUE", +parameter RCV_MSG_IF = "TRUE", +parameter CFG_FC_IF = "TRUE" , +parameter ERR_REPORTING_IF = "TRUE", +parameter c_aer_cap_ecrc_gen_capable = "FALSE", +parameter EXT_PIPE_INTERFACE = "FALSE", +parameter EXT_STARTUP_PRIMITIVE = "FALSE", +parameter integer LINK_CAP_MAX_LINK_WIDTH = 6'h8, +parameter integer C_DATA_WIDTH = 64, +parameter integer KEEP_WIDTH = C_DATA_WIDTH / 8, +parameter PCIE_ID_IF ="TRUE", +parameter PCIE_ASYNC_EN = "FALSE", +parameter ENABLE_JTAG_DBG = "FALSE", +parameter REDUCE_OOB_FREQ = "FALSE" +) +( + + //----------------------------------------------------------------------------------------------------------------// + // 1. PCI Express (pci_exp) Interface // + //----------------------------------------------------------------------------------------------------------------// + + // Tx + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_txn, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_txp, + + // Rx + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_rxn, + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_rxp, + + //----------------------------------------------------------------------------------------------------------------// + // 2. Clock & GT COMMON Sharing Interface // + //----------------------------------------------------------------------------------------------------------------// + // Shared Logic Internal + output int_pclk_out_slave, + output int_pipe_rxusrclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH-1):0] int_rxoutclk_out, + output int_dclk_out, + output int_userclk1_out, + output int_userclk2_out, + output int_oobclk_out, + output int_mmcm_lock_out, + output [1:0] int_qplllock_out, + output [1:0] int_qplloutclk_out, + output [1:0] int_qplloutrefclk_out, + input [(LINK_CAP_MAX_LINK_WIDTH-1):0] int_pclk_sel_slave, + + // Shared Logic External - Clocks + input pipe_pclk_in, + input pipe_rxusrclk_in, + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_rxoutclk_in, + input pipe_dclk_in, + input pipe_userclk1_in, + input pipe_userclk2_in, + input pipe_oobclk_in, + input pipe_mmcm_lock_in, + + output pipe_txoutclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_rxoutclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_pclk_sel_out, + output pipe_gen3_out, + + // Shared Logic External - GT COMMON + + input [11:0] qpll_drp_crscode, + input [17:0] qpll_drp_fsm, + input [1:0] qpll_drp_done, + input [1:0] qpll_drp_reset, + input [1:0] qpll_qplllock, + input [1:0] qpll_qplloutclk, + input [1:0] qpll_qplloutrefclk, + output qpll_qplld, + output [1:0] qpll_qpllreset, + output qpll_drp_clk, + output qpll_drp_rst_n, + output qpll_drp_ovrd, + output qpll_drp_gen3, + output qpll_drp_start, + + //----------------------------------------------------------------------------------------------------------------// + // 3. AXI-S Interface // + //----------------------------------------------------------------------------------------------------------------// + + // Common + output user_clk_out, + output user_reset_out, + output user_lnk_up, + output user_app_rdy, + + // AXI TX + //----------- + output [5:0] tx_buf_av, + output tx_err_drop, + output tx_cfg_req, + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, + input s_axis_tx_tvalid, + output s_axis_tx_tready, + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, + input s_axis_tx_tlast, + input [3:0] s_axis_tx_tuser, + input tx_cfg_gnt, + + // AXI RX + //----------- + output [C_DATA_WIDTH-1:0] m_axis_rx_tdata, + output m_axis_rx_tvalid, + input m_axis_rx_tready, + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, + output m_axis_rx_tlast, + output [21:0] m_axis_rx_tuser, + input rx_np_ok, + input rx_np_req, + + // Flow Control + output [11:0] fc_cpld, + output [7:0] fc_cplh, + output [11:0] fc_npd, + output [7:0] fc_nph, + output [11:0] fc_pd, + output [7:0] fc_ph, + input [2:0] fc_sel, + + + //----------------------------------------------------------------------------------------------------------------// + // 4. Configuration (CFG) Interface // + //----------------------------------------------------------------------------------------------------------------// + + //------------------------------------------------// + // EP and RP // + //------------------------------------------------// + output [31:0] cfg_mgmt_do, + output cfg_mgmt_rd_wr_done, + + output [15:0] cfg_status, + output [15:0] cfg_command, + output [15:0] cfg_dstatus, + output [15:0] cfg_dcommand, + output [15:0] cfg_lstatus, + output [15:0] cfg_lcommand, + output [15:0] cfg_dcommand2, + output [2:0] cfg_pcie_link_state, + + output cfg_pmcsr_pme_en, + output [1:0] cfg_pmcsr_powerstate, + output cfg_pmcsr_pme_status, + output cfg_received_func_lvl_rst, + + // Management Interface + input [31:0] cfg_mgmt_di, + input [3:0] cfg_mgmt_byte_en, + input [9:0] cfg_mgmt_dwaddr, + input cfg_mgmt_wr_en, + input cfg_mgmt_rd_en, + input cfg_mgmt_wr_readonly, + + // Error Reporting Interface + input cfg_err_ecrc, + input cfg_err_ur, + input cfg_err_cpl_timeout, + input cfg_err_cpl_unexpect, + input cfg_err_cpl_abort, + input cfg_err_posted, + input cfg_err_cor, + input cfg_err_atomic_egress_blocked, + input cfg_err_internal_cor, + input cfg_err_malformed, + input cfg_err_mc_blocked, + input cfg_err_poisoned, + input cfg_err_norecovery, + input [47:0] cfg_err_tlp_cpl_header, + output cfg_err_cpl_rdy, + input cfg_err_locked, + input cfg_err_acs, + input cfg_err_internal_uncor, + + input cfg_trn_pending, + input cfg_pm_halt_aspm_l0s, + input cfg_pm_halt_aspm_l1, + input cfg_pm_force_state_en, + input [1:0] cfg_pm_force_state, + + input [63:0] cfg_dsn, + output cfg_msg_received, + output [15:0] cfg_msg_data, + + //------------------------------------------------// + // EP Only // + //------------------------------------------------// + + // Interrupt Interface Signals + input cfg_interrupt, + output cfg_interrupt_rdy, + input cfg_interrupt_assert, + input [7:0] cfg_interrupt_di, + output [7:0] cfg_interrupt_do, + output [2:0] cfg_interrupt_mmenable, + output cfg_interrupt_msienable, + output cfg_interrupt_msixenable, + output cfg_interrupt_msixfm, + input cfg_interrupt_stat, + input [4:0] cfg_pciecap_interrupt_msgnum, + + + output cfg_to_turnoff, + input cfg_turnoff_ok, + output [7:0] cfg_bus_number, + output [4:0] cfg_device_number, + output [2:0] cfg_function_number, + input cfg_pm_wake, + + output cfg_msg_received_pm_as_nak, + output cfg_msg_received_setslotpowerlimit, + + //------------------------------------------------// + // RP Only // + //------------------------------------------------// + input cfg_pm_send_pme_to, + input [7:0] cfg_ds_bus_number, + input [4:0] cfg_ds_device_number, + input [2:0] cfg_ds_function_number, + + input cfg_mgmt_wr_rw1c_as_rw, + + output cfg_bridge_serr_en, + output cfg_slot_control_electromech_il_ctl_pulse, + output cfg_root_control_syserr_corr_err_en, + output cfg_root_control_syserr_non_fatal_err_en, + output cfg_root_control_syserr_fatal_err_en, + output cfg_root_control_pme_int_en, + output cfg_aer_rooterr_corr_err_reporting_en, + output cfg_aer_rooterr_non_fatal_err_reporting_en, + output cfg_aer_rooterr_fatal_err_reporting_en, + output cfg_aer_rooterr_corr_err_received, + output cfg_aer_rooterr_non_fatal_err_received, + output cfg_aer_rooterr_fatal_err_received, + + output cfg_msg_received_err_cor, + output cfg_msg_received_err_non_fatal, + output cfg_msg_received_err_fatal, + output cfg_msg_received_pm_pme, + output cfg_msg_received_pme_to_ack, + output cfg_msg_received_assert_int_a, + output cfg_msg_received_assert_int_b, + output cfg_msg_received_assert_int_c, + output cfg_msg_received_assert_int_d, + output cfg_msg_received_deassert_int_a, + output cfg_msg_received_deassert_int_b, + output cfg_msg_received_deassert_int_c, + output cfg_msg_received_deassert_int_d, + + //----------------------------------------------------------------------------------------------------------------// + // 5. Physical Layer Control and Status (PL) Interface // + //----------------------------------------------------------------------------------------------------------------// + + //------------------------------------------------// + // EP and RP // + //------------------------------------------------// + input [1:0] pl_directed_link_change, + input [1:0] pl_directed_link_width, + input pl_directed_link_speed, + input pl_directed_link_auton, + input pl_upstream_prefer_deemph, + + output pl_sel_lnk_rate, + output [1:0] pl_sel_lnk_width, + output [5:0] pl_ltssm_state, + output [1:0] pl_lane_reversal_mode, + + output pl_phy_lnk_up, + output [2:0] pl_tx_pm_state, + output [1:0] pl_rx_pm_state, + + output pl_link_upcfg_cap, + output pl_link_gen2_cap, + output pl_link_partner_gen2_supported, + output [2:0] pl_initial_link_width, + + output pl_directed_change_done, + + //------------------------------------------------// + // EP Only // + //------------------------------------------------// + output pl_received_hot_rst, + + //------------------------------------------------// + // RP Only // + //------------------------------------------------// + input pl_transmit_hot_rst, + input pl_downstream_deemph_source, + + //----------------------------------------------------------------------------------------------------------------// + // 6. AER interface // + //----------------------------------------------------------------------------------------------------------------// + + input [127:0] cfg_err_aer_headerlog, + input [4:0] cfg_aer_interrupt_msgnum, + output cfg_err_aer_headerlog_set, + output cfg_aer_ecrc_check_en, + output cfg_aer_ecrc_gen_en, + + //----------------------------------------------------------------------------------------------------------------// + // 7. VC interface // + //----------------------------------------------------------------------------------------------------------------// + + output [6:0] cfg_vc_tcvc_map, + + //----------------------------------------------------------------------------------------------------------------// + // 8. PCIe DRP (PCIe DRP) Interface // + //----------------------------------------------------------------------------------------------------------------// + + input pcie_drp_clk, + input pcie_drp_en, + input pcie_drp_we, + input [8:0] pcie_drp_addr, + input [15:0] pcie_drp_di, + output pcie_drp_rdy, + output [15:0] pcie_drp_do, + + //----------------------------------------------------------------------------------------------------------------// + // PCIe Fast Config: STARTUP primitive Interface - only used in Tandem configurations // + //----------------------------------------------------------------------------------------------------------------// + // This input should be used when the startup block is generated exteranl to the PCI Express Core + input startup_eos_in, // 1-bit input: This signal should be driven by the EOS output of the STARTUP primitive. + // These inputs and outputs may be use when the startup block is generated internal to the PCI Express Core. + output wire startup_cfgclk, // 1-bit output: Configuration main clock output + output wire startup_cfgmclk, // 1-bit output: Configuration internal oscillator clock output + output wire startup_eos, // 1-bit output: Active high output signal indicating the End Of Startup + output wire startup_preq, // 1-bit output: PROGRAM request to fabric output + input wire startup_clk, // 1-bit input: User start-up clock input + input wire startup_gsr, // 1-bit input: Global Set/Reset input (GSR cannot be used for the port name) + input wire startup_gts, // 1-bit input: Global 3-state input (GTS cannot be used for the port name) + input wire startup_keyclearb, // 1-bit input: Clear AES Decrypter Key input from Battery-Backed RAM (BBRAM) + input wire startup_pack, // 1-bit input: PROGRAM acknowledge input + input wire startup_usrcclko, // 1-bit input: User CCLK input + input wire startup_usrcclkts, // 1-bit input: User CCLK 3-state enable input + input wire startup_usrdoneo, // 1-bit input: User DONE pin output control + input wire startup_usrdonets, // 1-bit input: User DONE 3-state enable output + + //----------------------------------------------------------------------------------------------------------------// + // PCIe Fast Config: ICAP primitive Interface - only used in Tandem PCIe configuration // + //----------------------------------------------------------------------------------------------------------------// + input wire icap_clk, + input wire icap_csib, + input wire icap_rdwrb, + input wire [31:0] icap_i, + output wire [31:0] icap_o, + + + input [ 2:0] pipe_txprbssel, + input [ 2:0] pipe_rxprbssel, + input pipe_txprbsforceerr, + input pipe_rxprbscntreset, + input [ 2:0] pipe_loopback, + + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_rxprbserr, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_txinhibit, + + output [4:0] pipe_rst_fsm, + output [11:0] pipe_qrst_fsm, + output [(LINK_CAP_MAX_LINK_WIDTH*5)-1:0] pipe_rate_fsm, + output [(LINK_CAP_MAX_LINK_WIDTH*6)-1:0] pipe_sync_fsm_tx, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] pipe_sync_fsm_rx, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] pipe_drp_fsm, + + output pipe_rst_idle, + output pipe_qrst_idle, + output pipe_rate_idle, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_eyescandataerror, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] pipe_rxstatus, + output [(LINK_CAP_MAX_LINK_WIDTH*15)-1:0] pipe_dmonitorout, + + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_cpll_lock, + output [(LINK_CAP_MAX_LINK_WIDTH-1)>>2:0] pipe_qpll_lock, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxpmaresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] pipe_rxbufstatus, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txphaligndone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txphinitdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txdlysresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxphaligndone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxdlysresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxsyncdone, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] pipe_rxdisperr, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] pipe_rxnotintable, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxcommadet, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] gt_ch_drp_rdy, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_0, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_1, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_2, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_3, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_4, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_5, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_6, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_7, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_8, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_9, + output [31:0] pipe_debug, + + //--------------Channel DRP--------------------------------- + output ext_ch_gt_drpclk, + input [(LINK_CAP_MAX_LINK_WIDTH*9)-1:0] ext_ch_gt_drpaddr, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpen, + input [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0] ext_ch_gt_drpdi, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpwe, + + output [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0] ext_ch_gt_drpdo, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drprdy, + + //----------------------------------------------------------------------------------------------------------------// + // PIPE PORTS to TOP Level For PIPE SIMULATION with 3rd Party IP/BFM/Xilinx BFM + //----------------------------------------------------------------------------------------------------------------// + input wire [11:0] common_commands_in, + input wire [24:0] pipe_rx_0_sigs, + input wire [24:0] pipe_rx_1_sigs, + input wire [24:0] pipe_rx_2_sigs, + input wire [24:0] pipe_rx_3_sigs, + input wire [24:0] pipe_rx_4_sigs, + input wire [24:0] pipe_rx_5_sigs, + input wire [24:0] pipe_rx_6_sigs, + input wire [24:0] pipe_rx_7_sigs, + + output wire [11:0] common_commands_out, + output wire [24:0] pipe_tx_0_sigs, + output wire [24:0] pipe_tx_1_sigs, + output wire [24:0] pipe_tx_2_sigs, + output wire [24:0] pipe_tx_3_sigs, + output wire [24:0] pipe_tx_4_sigs, + output wire [24:0] pipe_tx_5_sigs, + output wire [24:0] pipe_tx_6_sigs, + output wire [24:0] pipe_tx_7_sigs, + + //----------------------------------------------------------------------------------------------------------------// + // PCIe ID Interface // + //----------------------------------------------------------------------------------------------------------------// + input wire [15:0] cfg_dev_id_pf0, + input wire [15:0] cfg_ven_id, + input wire [7:0] cfg_rev_id_pf0, + input wire [15:0] cfg_subsys_id_pf0, + input wire [15:0] cfg_subsys_ven_id, + + //----------------------------------------------------------------------------------------------------------------// + input wire pipe_mmcm_rst_n, // Async | Async + input wire sys_clk, + input wire sys_rst_n + +); + +pcie_7x_0_core_top # ( + .LINK_CAP_MAX_LINK_WIDTH (LINK_CAP_MAX_LINK_WIDTH), + .C_DATA_WIDTH (C_DATA_WIDTH), + .KEEP_WIDTH (KEEP_WIDTH) + ) inst + ( + .pci_exp_txn(pci_exp_txn), + .pci_exp_txp(pci_exp_txp), + .pci_exp_rxn(pci_exp_rxn), + .pci_exp_rxp(pci_exp_rxp), + .int_pclk_out_slave(int_pclk_out_slave), + .int_pipe_rxusrclk_out(int_pipe_rxusrclk_out), + .int_rxoutclk_out(int_rxoutclk_out), + .int_dclk_out(int_dclk_out), + .int_userclk1_out(int_userclk1_out), + .int_mmcm_lock_out(int_mmcm_lock_out), + .int_userclk2_out(int_userclk2_out), + .int_oobclk_out(int_oobclk_out), + .int_qplllock_out(int_qplllock_out), + .int_qplloutclk_out(int_qplloutclk_out), + .int_qplloutrefclk_out(int_qplloutrefclk_out), + .int_pclk_sel_slave(int_pclk_sel_slave), + .pipe_pclk_in(pipe_pclk_in), + .pipe_rxusrclk_in(pipe_rxusrclk_in), + .pipe_rxoutclk_in(pipe_rxoutclk_in), + .pipe_dclk_in(pipe_dclk_in), + .pipe_userclk1_in(pipe_userclk1_in), + .pipe_userclk2_in(pipe_userclk2_in), + .pipe_oobclk_in(pipe_oobclk_in), + .pipe_mmcm_lock_in(pipe_mmcm_lock_in), + .pipe_txoutclk_out(pipe_txoutclk_out), + .pipe_rxoutclk_out(pipe_rxoutclk_out), + .pipe_pclk_sel_out(pipe_pclk_sel_out), + .pipe_gen3_out(pipe_gen3_out), + .user_clk_out(user_clk_out), + .user_reset_out(user_reset_out), + .user_lnk_up(user_lnk_up), + .user_app_rdy(user_app_rdy), + .tx_buf_av(tx_buf_av), + .tx_err_drop(tx_err_drop), + .tx_cfg_req(tx_cfg_req), + .s_axis_tx_tready(s_axis_tx_tready), + .s_axis_tx_tdata(s_axis_tx_tdata), + .s_axis_tx_tkeep(s_axis_tx_tkeep), + .s_axis_tx_tuser(s_axis_tx_tuser), + .s_axis_tx_tlast(s_axis_tx_tlast), + .s_axis_tx_tvalid(s_axis_tx_tvalid), + .tx_cfg_gnt(tx_cfg_gnt), + .m_axis_rx_tdata(m_axis_rx_tdata), + .m_axis_rx_tkeep(m_axis_rx_tkeep), + .m_axis_rx_tlast(m_axis_rx_tlast), + .m_axis_rx_tvalid(m_axis_rx_tvalid), + .m_axis_rx_tready(m_axis_rx_tready), + .m_axis_rx_tuser(m_axis_rx_tuser), + .rx_np_ok(rx_np_ok), + .rx_np_req(rx_np_req), + .fc_cpld(fc_cpld), + .fc_cplh(fc_cplh), + .fc_npd(fc_npd), + .fc_nph(fc_nph), + .fc_pd(fc_pd), + .fc_ph(fc_ph), + .fc_sel(fc_sel), + .cfg_status(cfg_status), + .cfg_command(cfg_command), + .cfg_dstatus(cfg_dstatus), + .cfg_dcommand(cfg_dcommand), + .cfg_lstatus(cfg_lstatus), + .cfg_lcommand(cfg_lcommand), + .cfg_dcommand2(cfg_dcommand2), + .cfg_pcie_link_state(cfg_pcie_link_state), + .cfg_pmcsr_pme_en(cfg_pmcsr_pme_en), + .cfg_pmcsr_powerstate(cfg_pmcsr_powerstate), + .cfg_pmcsr_pme_status(cfg_pmcsr_pme_status), + .cfg_received_func_lvl_rst(cfg_received_func_lvl_rst), + .cfg_mgmt_do(cfg_mgmt_do), + .cfg_mgmt_rd_wr_done(cfg_mgmt_rd_wr_done), + .cfg_mgmt_di(cfg_mgmt_di), + .cfg_mgmt_byte_en(cfg_mgmt_byte_en), + .cfg_mgmt_dwaddr(cfg_mgmt_dwaddr), + .cfg_mgmt_wr_en(cfg_mgmt_wr_en), + .cfg_mgmt_rd_en(cfg_mgmt_rd_en), + .cfg_mgmt_wr_readonly(cfg_mgmt_wr_readonly), + .cfg_err_ecrc(cfg_err_ecrc), + .cfg_err_ur(cfg_err_ur), + .cfg_err_cpl_timeout(cfg_err_cpl_timeout), + .cfg_err_cpl_unexpect(cfg_err_cpl_unexpect), + .cfg_err_cpl_abort(cfg_err_cpl_abort), + .cfg_err_posted(cfg_err_posted), + .cfg_err_cor(cfg_err_cor), + .cfg_err_atomic_egress_blocked(cfg_err_atomic_egress_blocked), + .cfg_err_internal_cor(cfg_err_internal_cor), + .cfg_err_malformed(cfg_err_malformed), + .cfg_err_mc_blocked(cfg_err_mc_blocked), + .cfg_err_poisoned(cfg_err_poisoned), + .cfg_err_norecovery(cfg_err_norecovery), + .cfg_err_tlp_cpl_header(cfg_err_tlp_cpl_header), + .cfg_err_cpl_rdy(cfg_err_cpl_rdy), + .cfg_err_locked(cfg_err_locked), + .cfg_err_acs(cfg_err_acs), + .cfg_err_internal_uncor(cfg_err_internal_uncor), + .cfg_trn_pending(cfg_trn_pending), + .cfg_pm_halt_aspm_l0s(cfg_pm_halt_aspm_l0s), + .cfg_pm_halt_aspm_l1(cfg_pm_halt_aspm_l1), + .cfg_pm_force_state_en(cfg_pm_force_state_en), + .cfg_pm_force_state(cfg_pm_force_state), + .cfg_dsn(cfg_dsn), + .cfg_msg_received(cfg_msg_received), + .cfg_msg_data(cfg_msg_data), + .cfg_interrupt(cfg_interrupt), + .cfg_interrupt_rdy(cfg_interrupt_rdy), + .cfg_interrupt_assert(cfg_interrupt_assert), + .cfg_interrupt_di(cfg_interrupt_di), + .cfg_interrupt_do(cfg_interrupt_do), + .cfg_interrupt_mmenable(cfg_interrupt_mmenable), + .cfg_interrupt_msienable(cfg_interrupt_msienable), + .cfg_interrupt_msixenable(cfg_interrupt_msixenable), + .cfg_interrupt_msixfm(cfg_interrupt_msixfm), + .cfg_interrupt_stat(cfg_interrupt_stat), + .cfg_pciecap_interrupt_msgnum(cfg_pciecap_interrupt_msgnum), + .cfg_to_turnoff(cfg_to_turnoff), + .cfg_turnoff_ok(cfg_turnoff_ok), + .cfg_bus_number(cfg_bus_number), + .cfg_device_number(cfg_device_number), + .cfg_function_number(cfg_function_number), + .cfg_pm_wake(cfg_pm_wake), + .cfg_msg_received_setslotpowerlimit(cfg_msg_received_setslotpowerlimit), + .cfg_pm_send_pme_to(cfg_pm_send_pme_to), + .cfg_ds_bus_number(cfg_ds_bus_number), + .cfg_ds_device_number(cfg_ds_device_number), + .cfg_ds_function_number(cfg_ds_function_number), + .cfg_mgmt_wr_rw1c_as_rw(cfg_mgmt_wr_rw1c_as_rw), + .cfg_bridge_serr_en(cfg_bridge_serr_en), + .cfg_slot_control_electromech_il_ctl_pulse(cfg_slot_control_electromech_il_ctl_pulse), + .cfg_root_control_syserr_corr_err_en(cfg_root_control_syserr_corr_err_en), + .cfg_root_control_syserr_non_fatal_err_en(cfg_root_control_syserr_non_fatal_err_en), + .cfg_root_control_syserr_fatal_err_en(cfg_root_control_syserr_fatal_err_en), + .cfg_root_control_pme_int_en(cfg_root_control_pme_int_en), + .cfg_aer_rooterr_corr_err_reporting_en(cfg_aer_rooterr_corr_err_reporting_en), + .cfg_aer_rooterr_non_fatal_err_reporting_en(cfg_aer_rooterr_non_fatal_err_reporting_en), + .cfg_aer_rooterr_fatal_err_reporting_en(cfg_aer_rooterr_fatal_err_reporting_en), + .cfg_aer_rooterr_corr_err_received(cfg_aer_rooterr_corr_err_received), + .cfg_aer_rooterr_non_fatal_err_received(cfg_aer_rooterr_non_fatal_err_received), + .cfg_aer_rooterr_fatal_err_received(cfg_aer_rooterr_fatal_err_received), + .cfg_msg_received_err_cor(cfg_msg_received_err_cor), + .cfg_msg_received_err_non_fatal(cfg_msg_received_err_non_fatal), + .cfg_msg_received_err_fatal(cfg_msg_received_err_fatal), + .cfg_msg_received_pm_as_nak(cfg_msg_received_pm_as_nak), + .cfg_msg_received_pm_pme(cfg_msg_received_pm_pme), + .cfg_msg_received_pme_to_ack(cfg_msg_received_pme_to_ack), + .cfg_msg_received_assert_int_a(cfg_msg_received_assert_int_a), + .cfg_msg_received_assert_int_b(cfg_msg_received_assert_int_b), + .cfg_msg_received_assert_int_c(cfg_msg_received_assert_int_c), + .cfg_msg_received_assert_int_d(cfg_msg_received_assert_int_d), + .cfg_msg_received_deassert_int_a(cfg_msg_received_deassert_int_a), + .cfg_msg_received_deassert_int_b(cfg_msg_received_deassert_int_b), + .cfg_msg_received_deassert_int_c(cfg_msg_received_deassert_int_c), + .cfg_msg_received_deassert_int_d(cfg_msg_received_deassert_int_d), + .pl_directed_link_change(pl_directed_link_change), + .pl_directed_link_width(pl_directed_link_width), + .pl_directed_link_speed(pl_directed_link_speed), + .pl_directed_link_auton(pl_directed_link_auton), + .pl_upstream_prefer_deemph(pl_upstream_prefer_deemph), + .pl_sel_lnk_rate(pl_sel_lnk_rate), + .pl_sel_lnk_width(pl_sel_lnk_width), + .pl_ltssm_state(pl_ltssm_state), + .pl_lane_reversal_mode(pl_lane_reversal_mode), + .pl_phy_lnk_up(pl_phy_lnk_up), + .pl_tx_pm_state(pl_tx_pm_state), + .pl_rx_pm_state(pl_rx_pm_state), + .pl_link_upcfg_cap(pl_link_upcfg_cap), + .pl_link_gen2_cap(pl_link_gen2_cap), + .pl_link_partner_gen2_supported(pl_link_partner_gen2_supported), + .pl_initial_link_width(pl_initial_link_width), + .pl_directed_change_done(pl_directed_change_done), + .pl_received_hot_rst(pl_received_hot_rst), + .pl_transmit_hot_rst(pl_transmit_hot_rst), + .pl_downstream_deemph_source(pl_downstream_deemph_source), + .cfg_err_aer_headerlog(cfg_err_aer_headerlog), + .cfg_aer_interrupt_msgnum(cfg_aer_interrupt_msgnum), + .cfg_err_aer_headerlog_set(cfg_err_aer_headerlog_set), + .cfg_aer_ecrc_check_en(cfg_aer_ecrc_check_en), + .cfg_aer_ecrc_gen_en(cfg_aer_ecrc_gen_en), + .cfg_vc_tcvc_map(cfg_vc_tcvc_map), + .pcie_drp_clk(pcie_drp_clk), + .pcie_drp_en(pcie_drp_en), + .pcie_drp_we(pcie_drp_we), + .pcie_drp_addr(pcie_drp_addr), + .pcie_drp_di(pcie_drp_di), + .pcie_drp_rdy(pcie_drp_rdy), + .pcie_drp_do(pcie_drp_do), + + // STARTUP primitive interface - Can only be used with Tandem Configurations + // This input should be used when the startup block is generated exteranl to the PCI Express Core + .startup_eos_in(startup_eos_in), // 1-bit input: This signal should be driven by the EOS output of the STARTUP primitive. + // These inputs and outputs may be use when the startup block is generated internal to the PCI Express Core. + .startup_cfgclk(startup_cfgclk), // 1-bit output: Configuration main clock output + .startup_cfgmclk(startup_cfgmclk), // 1-bit output: Configuration internal oscillator clock output + .startup_eos(startup_eos), // 1-bit output: Active high output signal indicating the End Of Startup. + .startup_preq(startup_preq), // 1-bit output: PROGRAM request to fabric output + .startup_clk(startup_clk), // 1-bit input: User start-up clock input + .startup_gsr(startup_gsr), // 1-bit input: Global Set/Reset input (GSR cannot be used for the port name) + .startup_gts(startup_gts), // 1-bit input: Global 3-state input (GTS cannot be used for the port name) + .startup_keyclearb(startup_keyclearb), // 1-bit input: Clear AES Decrypter Key input from Battery-Backed RAM (BBRAM) + .startup_pack(startup_pack), // 1-bit input: PROGRAM acknowledge input + .startup_usrcclko(startup_usrcclko), // 1-bit input: User CCLK input + .startup_usrcclkts(startup_usrcclkts), // 1-bit input: User CCLK 3-state enable input + .startup_usrdoneo(startup_usrdoneo), // 1-bit input: User DONE pin output control + .startup_usrdonets(startup_usrdonets), // 1-bit input: User DONE 3-state enable output + + // ICAP primitive interface - Can only be used with Tandem PCIe Configuration + .icap_clk(icap_clk), + .icap_csib(icap_csib), + .icap_rdwrb(icap_rdwrb), + .icap_i(icap_i), + .icap_o(icap_o), + + //External GT COMMON Ports + + .qpll_drp_crscode ( qpll_drp_crscode ), + .qpll_drp_fsm ( qpll_drp_fsm ), + .qpll_drp_done ( qpll_drp_done ), + .qpll_drp_reset ( qpll_drp_reset ), + .qpll_qplllock ( qpll_qplllock ), + .qpll_qplloutclk ( qpll_qplloutclk ), + .qpll_qplloutrefclk ( qpll_qplloutrefclk ), + .qpll_qplld ( qpll_qplld ), + .qpll_qpllreset ( qpll_qpllreset ), + .qpll_drp_clk ( qpll_drp_clk ), + .qpll_drp_rst_n ( qpll_drp_rst_n ), + .qpll_drp_ovrd ( qpll_drp_ovrd ), + .qpll_drp_gen3 ( qpll_drp_gen3), + .qpll_drp_start ( qpll_drp_start ), + + //------------TRANSCEIVER DEBUG----------------------------------- + //Drive these inputs to 0s + .ext_ch_gt_drpclk (ext_ch_gt_drpclk), + .ext_ch_gt_drpaddr (ext_ch_gt_drpaddr), + .ext_ch_gt_drpen (ext_ch_gt_drpen), + .ext_ch_gt_drpdi (ext_ch_gt_drpdi), + .ext_ch_gt_drpwe (ext_ch_gt_drpwe), + .ext_ch_gt_drpdo (ext_ch_gt_drpdo), + .ext_ch_gt_drprdy (ext_ch_gt_drprdy ), + + .pipe_txprbssel (pipe_txprbssel), + .pipe_rxprbssel (pipe_rxprbssel), + .pipe_txprbsforceerr (pipe_txprbsforceerr), + .pipe_rxprbscntreset (pipe_rxprbscntreset), + .pipe_loopback (pipe_loopback ), + .pipe_rxprbserr (pipe_rxprbserr), + .pipe_txinhibit (pipe_txinhibit), + .pipe_rst_fsm (pipe_rst_fsm), + .pipe_qrst_fsm (pipe_qrst_fsm), + .pipe_rate_fsm (pipe_rate_fsm), + .pipe_sync_fsm_tx (pipe_sync_fsm_tx), + .pipe_sync_fsm_rx (pipe_sync_fsm_rx), + .pipe_drp_fsm (pipe_drp_fsm), + .pipe_rst_idle (pipe_rst_idle), + .pipe_qrst_idle (pipe_qrst_idle), + .pipe_rate_idle (pipe_rate_idle), + .pipe_eyescandataerror (pipe_eyescandataerror), + .pipe_rxstatus (pipe_rxstatus), + .pipe_dmonitorout (pipe_dmonitorout), + .pipe_cpll_lock ( pipe_cpll_lock ), + .pipe_qpll_lock ( pipe_qpll_lock ), + .pipe_rxpmaresetdone ( pipe_rxpmaresetdone ), + .pipe_rxbufstatus ( pipe_rxbufstatus ), + .pipe_txphaligndone ( pipe_txphaligndone ), + .pipe_txphinitdone ( pipe_txphinitdone ), + .pipe_txdlysresetdone ( pipe_txdlysresetdone ), + .pipe_rxphaligndone ( pipe_rxphaligndone ), + .pipe_rxdlysresetdone ( pipe_rxdlysresetdone ), + .pipe_rxsyncdone ( pipe_rxsyncdone ), + .pipe_rxdisperr ( pipe_rxdisperr ), + .pipe_rxnotintable ( pipe_rxnotintable ), + .pipe_rxcommadet ( pipe_rxcommadet ), + + //---------- CHANNEL DRP -------------------------------- + .gt_ch_drp_rdy (gt_ch_drp_rdy), + .pipe_debug_0 (pipe_debug_0), + .pipe_debug_1 (pipe_debug_1), + .pipe_debug_2 (pipe_debug_2), + .pipe_debug_3 (pipe_debug_3), + .pipe_debug_4 (pipe_debug_4), + .pipe_debug_5 (pipe_debug_5), + .pipe_debug_6 (pipe_debug_6), + .pipe_debug_7 (pipe_debug_7), + .pipe_debug_8 (pipe_debug_8), + .pipe_debug_9 (pipe_debug_9), + .pipe_debug (pipe_debug), + + .common_commands_in ( common_commands_in ), + .pipe_rx_0_sigs ( pipe_rx_0_sigs ), + .pipe_rx_1_sigs ( pipe_rx_1_sigs ), + .pipe_rx_2_sigs ( pipe_rx_2_sigs ), + .pipe_rx_3_sigs ( pipe_rx_3_sigs ), + .pipe_rx_4_sigs ( pipe_rx_4_sigs ), + .pipe_rx_5_sigs ( pipe_rx_5_sigs ), + .pipe_rx_6_sigs ( pipe_rx_6_sigs ), + .pipe_rx_7_sigs ( pipe_rx_7_sigs ), + + .common_commands_out ( common_commands_out ), + .pipe_tx_0_sigs ( pipe_tx_0_sigs ), + .pipe_tx_1_sigs ( pipe_tx_1_sigs ), + .pipe_tx_2_sigs ( pipe_tx_2_sigs ), + .pipe_tx_3_sigs ( pipe_tx_3_sigs ), + .pipe_tx_4_sigs ( pipe_tx_4_sigs ), + .pipe_tx_5_sigs ( pipe_tx_5_sigs ), + .pipe_tx_6_sigs ( pipe_tx_6_sigs ), + .pipe_tx_7_sigs ( pipe_tx_7_sigs ), + + .cfg_dev_id_pf0 ( cfg_dev_id_pf0 ), + .cfg_ven_id ( cfg_ven_id ), + .cfg_rev_id_pf0 ( cfg_rev_id_pf0 ), + .cfg_subsys_id_pf0 ( cfg_subsys_id_pf0 ), + .cfg_subsys_ven_id ( cfg_subsys_ven_id ), + + .pipe_mmcm_rst_n (pipe_mmcm_rst_n), // Async | Async + .sys_clk (sys_clk), + .sys_rst_n (sys_rst_n) + ); + +endmodule + + + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_7x.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_7x.v new file mode 100644 index 0000000000000000000000000000000000000000..f41b1c5613c65edb7118dd7ee8619e2c97eb96b3 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_7x.v @@ -0,0 +1,1634 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_7x.v +// Version : 3.3 +// +// Description: Solution wrapper for Virtex7 Hard Block for PCI Express +// +// +// +//-------------------------------------------------------------------------------- +`ifndef PCIE_2LM +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_7x # ( + // PCIE_2_1 params + parameter [11:0] AER_BASE_PTR = 12'h140, + parameter AER_CAP_ECRC_CHECK_CAPABLE = "FALSE", + parameter AER_CAP_ECRC_GEN_CAPABLE = "FALSE", + parameter [15:0] AER_CAP_ID = 16'h0001, + parameter AER_CAP_MULTIHEADER = "FALSE", + parameter [11:0] AER_CAP_NEXTPTR = 12'h178, + parameter AER_CAP_ON = "FALSE", + parameter [23:0] AER_CAP_OPTIONAL_ERR_SUPPORT = 24'h000000, + parameter AER_CAP_PERMIT_ROOTERR_UPDATE = "TRUE", + parameter [3:0] AER_CAP_VERSION = 4'h1, + parameter ALLOW_X8_GEN2 = "FALSE", + parameter [31:0] BAR0 = 32'hFFFFFF00, + parameter [31:0] BAR1 = 32'hFFFF0000, + parameter [31:0] BAR2 = 32'hFFFF000C, + parameter [31:0] BAR3 = 32'hFFFFFFFF, + parameter [31:0] BAR4 = 32'h00000000, + parameter [31:0] BAR5 = 32'h00000000, + parameter [7:0] CAPABILITIES_PTR = 8'h40, + parameter [31:0] CARDBUS_CIS_POINTER = 32'h00000000, + parameter CFG_ECRC_ERR_CPLSTAT = 0, + parameter [23:0] CLASS_CODE = 24'h000000, + parameter CMD_INTX_IMPLEMENTED = "TRUE", + parameter CPL_TIMEOUT_DISABLE_SUPPORTED = "FALSE", + parameter [3:0] CPL_TIMEOUT_RANGES_SUPPORTED = 4'h0, + parameter [6:0] CRM_MODULE_RSTS = 7'h00, + parameter C_DATA_WIDTH = 64, + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, + parameter KEEP_WIDTH = C_DATA_WIDTH / 8, + parameter DEV_CAP2_ARI_FORWARDING_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED = "FALSE", + parameter DEV_CAP2_CAS128_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED = "FALSE", + parameter DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED = "FALSE", + parameter DEV_CAP2_LTR_MECHANISM_SUPPORTED = "FALSE", + parameter [1:0] DEV_CAP2_MAX_ENDEND_TLP_PREFIXES = 2'h0, + parameter DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING = "FALSE", + parameter [1:0] DEV_CAP2_TPH_COMPLETER_SUPPORTED = 2'h0, + parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE = "TRUE", + parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE = "TRUE", + parameter integer DEV_CAP_ENDPOINT_L0S_LATENCY = 0, + parameter integer DEV_CAP_ENDPOINT_L1_LATENCY = 0, + parameter DEV_CAP_EXT_TAG_SUPPORTED = "TRUE", + parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "FALSE", + parameter integer DEV_CAP_MAX_PAYLOAD_SUPPORTED = 2, + parameter integer DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT = 0, + parameter DEV_CAP_ROLE_BASED_ERROR = "TRUE", + parameter integer DEV_CAP_RSVD_14_12 = 0, + parameter integer DEV_CAP_RSVD_17_16 = 0, + parameter integer DEV_CAP_RSVD_31_29 = 0, + parameter DEV_CONTROL_AUX_POWER_SUPPORTED = "FALSE", + parameter DEV_CONTROL_EXT_TAG_DEFAULT = "FALSE", + parameter DISABLE_ASPM_L1_TIMER = "FALSE", + parameter DISABLE_BAR_FILTERING = "FALSE", + parameter DISABLE_ERR_MSG = "FALSE", + parameter DISABLE_ID_CHECK = "FALSE", + parameter DISABLE_LANE_REVERSAL = "FALSE", + parameter DISABLE_LOCKED_FILTER = "FALSE", + parameter DISABLE_PPM_FILTER = "FALSE", + parameter DISABLE_RX_POISONED_RESP = "FALSE", + parameter DISABLE_RX_TC_FILTER = "FALSE", + parameter DISABLE_SCRAMBLING = "FALSE", + parameter [7:0] DNSTREAM_LINK_NUM = 8'h00, + parameter [11:0] DSN_BASE_PTR = 12'h100, + parameter [15:0] DSN_CAP_ID = 16'h0003, + parameter [11:0] DSN_CAP_NEXTPTR = 12'h10C, + parameter DSN_CAP_ON = "TRUE", + parameter [3:0] DSN_CAP_VERSION = 4'h1, + parameter [10:0] ENABLE_MSG_ROUTE = 11'h000, + parameter ENABLE_RX_TD_ECRC_TRIM = "FALSE", + parameter ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED = "FALSE", + parameter ENTER_RVRY_EI_L0 = "TRUE", + parameter EXIT_LOOPBACK_ON_EI = "TRUE", + parameter [31:0] EXPANSION_ROM = 32'hFFFFF001, + parameter [5:0] EXT_CFG_CAP_PTR = 6'h3F, + parameter [9:0] EXT_CFG_XP_CAP_PTR = 10'h3FF, + parameter [7:0] HEADER_TYPE = 8'h00, + parameter [4:0] INFER_EI = 5'h00, + parameter [7:0] INTERRUPT_PIN = 8'h01, + parameter INTERRUPT_STAT_AUTO = "TRUE", + parameter IS_SWITCH = "FALSE", + parameter [9:0] LAST_CONFIG_DWORD = 10'h3FF, + parameter LINK_CAP_ASPM_OPTIONALITY = "TRUE", + parameter integer LINK_CAP_ASPM_SUPPORT = 1, + parameter LINK_CAP_CLOCK_POWER_MANAGEMENT = "FALSE", + parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP = "FALSE", + parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN1 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN2 = 7, + parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP = "FALSE", + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1, + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08, + parameter integer LINK_CAP_RSVD_23 = 0, + parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE = "FALSE", + parameter integer LINK_CONTROL_RCB = 0, + parameter LINK_CTRL2_DEEMPHASIS = "FALSE", + parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE = "FALSE", + parameter [3:0] LINK_CTRL2_TARGET_LINK_SPEED = 4'h2, + parameter LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE", + parameter [14:0] LL_ACK_TIMEOUT = 15'h0000, + parameter LL_ACK_TIMEOUT_EN = "FALSE", + parameter integer LL_ACK_TIMEOUT_FUNC = 0, + parameter [14:0] LL_REPLAY_TIMEOUT = 15'h0000, + parameter LL_REPLAY_TIMEOUT_EN = "FALSE", + parameter integer LL_REPLAY_TIMEOUT_FUNC = 0, + parameter [5:0] LTSSM_MAX_LINK_WIDTH = 6'h01, + parameter MPS_FORCE = "FALSE", + parameter [7:0] MSIX_BASE_PTR = 8'h9C, + parameter [7:0] MSIX_CAP_ID = 8'h11, + parameter [7:0] MSIX_CAP_NEXTPTR = 8'h00, + parameter MSIX_CAP_ON = "FALSE", + parameter integer MSIX_CAP_PBA_BIR = 0, + parameter [28:0] MSIX_CAP_PBA_OFFSET = 29'h00000050, + parameter integer MSIX_CAP_TABLE_BIR = 0, + parameter [28:0] MSIX_CAP_TABLE_OFFSET = 29'h00000040, + parameter [10:0] MSIX_CAP_TABLE_SIZE = 11'h000, + parameter [7:0] MSI_BASE_PTR = 8'h48, + parameter MSI_CAP_64_BIT_ADDR_CAPABLE = "TRUE", + parameter [7:0] MSI_CAP_ID = 8'h05, + parameter integer MSI_CAP_MULTIMSGCAP = 0, + parameter integer MSI_CAP_MULTIMSG_EXTENSION = 0, + parameter [7:0] MSI_CAP_NEXTPTR = 8'h60, + parameter MSI_CAP_ON = "FALSE", + parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE = "TRUE", + parameter integer N_FTS_COMCLK_GEN1 = 255, + parameter integer N_FTS_COMCLK_GEN2 = 255, + parameter integer N_FTS_GEN1 = 255, + parameter integer N_FTS_GEN2 = 255, + parameter [7:0] PCIE_BASE_PTR = 8'h60, + parameter [7:0] PCIE_CAP_CAPABILITY_ID = 8'h10, + parameter [3:0] PCIE_CAP_CAPABILITY_VERSION = 4'h2, + parameter [3:0] PCIE_CAP_DEVICE_PORT_TYPE = 4'h0, + parameter [7:0] PCIE_CAP_NEXTPTR = 8'h9C, + parameter PCIE_CAP_ON = "TRUE", + parameter integer PCIE_CAP_RSVD_15_14 = 0, + parameter PCIE_CAP_SLOT_IMPLEMENTED = "FALSE", + parameter integer PCIE_REVISION = 2, + parameter integer PL_AUTO_CONFIG = 0, + parameter PL_FAST_TRAIN = "FALSE", + parameter [14:0] PM_ASPML0S_TIMEOUT = 15'h0000, + parameter PM_ASPML0S_TIMEOUT_EN = "FALSE", + parameter integer PM_ASPML0S_TIMEOUT_FUNC = 0, + parameter PM_ASPM_FASTEXIT = "FALSE", + parameter [7:0] PM_BASE_PTR = 8'h40, + parameter integer PM_CAP_AUXCURRENT = 0, + parameter PM_CAP_D1SUPPORT = "TRUE", + parameter PM_CAP_D2SUPPORT = "TRUE", + parameter PM_CAP_DSI = "FALSE", + parameter [7:0] PM_CAP_ID = 8'h01, + parameter [7:0] PM_CAP_NEXTPTR = 8'h48, + parameter PM_CAP_ON = "TRUE", + parameter [4:0] PM_CAP_PMESUPPORT = 5'h0F, + parameter PM_CAP_PME_CLOCK = "FALSE", + parameter integer PM_CAP_RSVD_04 = 0, + parameter integer PM_CAP_VERSION = 3, + parameter PM_CSR_B2B3 = "FALSE", + parameter PM_CSR_BPCCEN = "FALSE", + parameter PM_CSR_NOSOFTRST = "TRUE", + parameter [7:0] PM_DATA0 = 8'h01, + parameter [7:0] PM_DATA1 = 8'h01, + parameter [7:0] PM_DATA2 = 8'h01, + parameter [7:0] PM_DATA3 = 8'h01, + parameter [7:0] PM_DATA4 = 8'h01, + parameter [7:0] PM_DATA5 = 8'h01, + parameter [7:0] PM_DATA6 = 8'h01, + parameter [7:0] PM_DATA7 = 8'h01, + parameter [1:0] PM_DATA_SCALE0 = 2'h1, + parameter [1:0] PM_DATA_SCALE1 = 2'h1, + parameter [1:0] PM_DATA_SCALE2 = 2'h1, + parameter [1:0] PM_DATA_SCALE3 = 2'h1, + parameter [1:0] PM_DATA_SCALE4 = 2'h1, + parameter [1:0] PM_DATA_SCALE5 = 2'h1, + parameter [1:0] PM_DATA_SCALE6 = 2'h1, + parameter [1:0] PM_DATA_SCALE7 = 2'h1, + parameter PM_MF = "FALSE", + parameter [11:0] RBAR_BASE_PTR = 12'h178, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR0 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR1 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR2 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR3 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR4 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR5 = 5'h00, + parameter [15:0] RBAR_CAP_ID = 16'h0015, + parameter [2:0] RBAR_CAP_INDEX0 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX1 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX2 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX3 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX4 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX5 = 3'h0, + parameter [11:0] RBAR_CAP_NEXTPTR = 12'h000, + parameter RBAR_CAP_ON = "FALSE", + parameter [31:0] RBAR_CAP_SUP0 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP1 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP2 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP3 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP4 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP5 = 32'h00000000, + parameter [3:0] RBAR_CAP_VERSION = 4'h1, + parameter [2:0] RBAR_NUM = 3'h1, + parameter integer RECRC_CHK = 0, + parameter RECRC_CHK_TRIM = "FALSE", + parameter ROOT_CAP_CRS_SW_VISIBILITY = "FALSE", + parameter [1:0] RP_AUTO_SPD = 2'h1, + parameter [4:0] RP_AUTO_SPD_LOOPCNT = 5'h1f, + parameter SELECT_DLL_IF = "FALSE", + parameter SIM_VERSION = "1.0", + parameter SLOT_CAP_ATT_BUTTON_PRESENT = "FALSE", + parameter SLOT_CAP_ATT_INDICATOR_PRESENT = "FALSE", + parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT = "FALSE", + parameter SLOT_CAP_HOTPLUG_CAPABLE = "FALSE", + parameter SLOT_CAP_HOTPLUG_SURPRISE = "FALSE", + parameter SLOT_CAP_MRL_SENSOR_PRESENT = "FALSE", + parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT = "FALSE", + parameter [12:0] SLOT_CAP_PHYSICAL_SLOT_NUM = 13'h0000, + parameter SLOT_CAP_POWER_CONTROLLER_PRESENT = "FALSE", + parameter SLOT_CAP_POWER_INDICATOR_PRESENT = "FALSE", + parameter integer SLOT_CAP_SLOT_POWER_LIMIT_SCALE = 0, + parameter [7:0] SLOT_CAP_SLOT_POWER_LIMIT_VALUE = 8'h00, + parameter integer SPARE_BIT0 = 0, + parameter integer SPARE_BIT1 = 0, + parameter integer SPARE_BIT2 = 0, + parameter integer SPARE_BIT3 = 0, + parameter integer SPARE_BIT4 = 0, + parameter integer SPARE_BIT5 = 0, + parameter integer SPARE_BIT6 = 0, + parameter integer SPARE_BIT7 = 0, + parameter integer SPARE_BIT8 = 0, + parameter [7:0] SPARE_BYTE0 = 8'h00, + parameter [7:0] SPARE_BYTE1 = 8'h00, + parameter [7:0] SPARE_BYTE2 = 8'h00, + parameter [7:0] SPARE_BYTE3 = 8'h00, + parameter [31:0] SPARE_WORD0 = 32'h00000000, + parameter [31:0] SPARE_WORD1 = 32'h00000000, + parameter [31:0] SPARE_WORD2 = 32'h00000000, + parameter [31:0] SPARE_WORD3 = 32'h00000000, + parameter SSL_MESSAGE_AUTO = "FALSE", + parameter TECRC_EP_INV = "FALSE", + parameter TL_RBYPASS = "FALSE", + parameter integer TL_RX_RAM_RADDR_LATENCY = 0, + parameter integer TL_RX_RAM_RDATA_LATENCY = 2, + parameter integer TL_RX_RAM_WRITE_LATENCY = 0, + parameter TL_TFC_DISABLE = "FALSE", + parameter TL_TX_CHECKS_DISABLE = "FALSE", + parameter integer TL_TX_RAM_RADDR_LATENCY = 0, + parameter integer TL_TX_RAM_RDATA_LATENCY = 2, + parameter integer TL_TX_RAM_WRITE_LATENCY = 0, + parameter TRN_DW = "FALSE", + parameter TRN_NP_FC = "FALSE", + parameter UPCONFIG_CAPABLE = "TRUE", + parameter UPSTREAM_FACING = "TRUE", + parameter UR_ATOMIC = "TRUE", + parameter UR_CFG1 = "TRUE", + parameter UR_INV_REQ = "TRUE", + parameter UR_PRS_RESPONSE = "TRUE", + parameter USER_CLK2_DIV2 = "FALSE", + parameter integer USER_CLK_FREQ = 3, + parameter USE_RID_PINS = "FALSE", + parameter VC0_CPL_INFINITE = "TRUE", + parameter [12:0] VC0_RX_RAM_LIMIT = 13'h03FF, + parameter integer VC0_TOTAL_CREDITS_CD = 127, + parameter integer VC0_TOTAL_CREDITS_CH = 31, + parameter integer VC0_TOTAL_CREDITS_NPD = 24, + parameter integer VC0_TOTAL_CREDITS_NPH = 12, + parameter integer VC0_TOTAL_CREDITS_PD = 288, + parameter integer VC0_TOTAL_CREDITS_PH = 32, + parameter integer VC0_TX_LASTPACKET = 31, + parameter [11:0] VC_BASE_PTR = 12'h10C, + parameter [15:0] VC_CAP_ID = 16'h0002, + parameter [11:0] VC_CAP_NEXTPTR = 12'h000, + parameter VC_CAP_ON = "FALSE", + parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS = "FALSE", + parameter [3:0] VC_CAP_VERSION = 4'h1, + parameter [11:0] VSEC_BASE_PTR = 12'h128, + parameter [15:0] VSEC_CAP_HDR_ID = 16'h1234, + parameter [11:0] VSEC_CAP_HDR_LENGTH = 12'h018, + parameter [3:0] VSEC_CAP_HDR_REVISION = 4'h1, + parameter [15:0] VSEC_CAP_ID = 16'h000B, + parameter VSEC_CAP_IS_LINK_VISIBLE = "TRUE", + parameter [11:0] VSEC_CAP_NEXTPTR = 12'h140, + parameter VSEC_CAP_ON = "FALSE", + parameter [3:0] VSEC_CAP_VERSION = 4'h1, + parameter ENABLE_JTAG_DBG = "FALSE" +) +( + input wire [C_DATA_WIDTH-1:0] trn_td, + input wire [REM_WIDTH-1:0] trn_trem, + input wire trn_tsof, + input wire trn_teof, + input wire trn_tsrc_rdy, + input wire trn_tsrc_dsc, + input wire trn_terrfwd, + input wire trn_tecrc_gen, + input wire trn_tstr, + input wire trn_tcfg_gnt, + input wire trn_rdst_rdy, + input wire trn_rnp_req, + input wire trn_rfcp_ret, + input wire trn_rnp_ok, + input wire [2:0] trn_fc_sel, + input wire [31:0] trn_tdllp_data, + input wire trn_tdllp_src_rdy, + input wire ll2_tlp_rcv, + input wire ll2_send_enter_l1, + input wire ll2_send_enter_l23, + input wire ll2_send_as_req_l1, + input wire ll2_send_pm_ack, + input wire [4:0] pl2_directed_lstate, + input wire ll2_suspend_now, + input wire tl2_ppm_suspend_req, + input wire tl2_aspm_suspend_credit_check, + input wire [1:0] pl_directed_link_change, + input wire [1:0] pl_directed_link_width, + input wire pl_directed_link_speed, + input wire pl_directed_link_auton, + input wire pl_upstream_prefer_deemph, + input wire pl_downstream_deemph_source, + input wire pl_directed_ltssm_new_vld, + input wire [5:0] pl_directed_ltssm_new, + input wire pl_directed_ltssm_stall, + input wire [1:0] pipe_rx0_char_is_k, + input wire [1:0] pipe_rx1_char_is_k, + input wire [1:0] pipe_rx2_char_is_k, + input wire [1:0] pipe_rx3_char_is_k, + input wire [1:0] pipe_rx4_char_is_k, + input wire [1:0] pipe_rx5_char_is_k, + input wire [1:0] pipe_rx6_char_is_k, + input wire [1:0] pipe_rx7_char_is_k, + input wire pipe_rx0_valid, + input wire pipe_rx1_valid, + input wire pipe_rx2_valid, + input wire pipe_rx3_valid, + input wire pipe_rx4_valid, + input wire pipe_rx5_valid, + input wire pipe_rx6_valid, + input wire pipe_rx7_valid, + input wire [15:0] pipe_rx0_data, + input wire [15:0] pipe_rx1_data, + input wire [15:0] pipe_rx2_data, + input wire [15:0] pipe_rx3_data, + input wire [15:0] pipe_rx4_data, + input wire [15:0] pipe_rx5_data, + input wire [15:0] pipe_rx6_data, + input wire [15:0] pipe_rx7_data, + input wire pipe_rx0_chanisaligned, + input wire pipe_rx1_chanisaligned, + input wire pipe_rx2_chanisaligned, + input wire pipe_rx3_chanisaligned, + input wire pipe_rx4_chanisaligned, + input wire pipe_rx5_chanisaligned, + input wire pipe_rx6_chanisaligned, + input wire pipe_rx7_chanisaligned, + input wire [2:0] pipe_rx0_status, + input wire [2:0] pipe_rx1_status, + input wire [2:0] pipe_rx2_status, + input wire [2:0] pipe_rx3_status, + input wire [2:0] pipe_rx4_status, + input wire [2:0] pipe_rx5_status, + input wire [2:0] pipe_rx6_status, + input wire [2:0] pipe_rx7_status, + input wire pipe_rx0_phy_status, + input wire pipe_rx1_phy_status, + input wire pipe_rx2_phy_status, + input wire pipe_rx3_phy_status, + input wire pipe_rx4_phy_status, + input wire pipe_rx5_phy_status, + input wire pipe_rx6_phy_status, + input wire pipe_rx7_phy_status, + input wire pipe_rx0_elec_idle, + input wire pipe_rx1_elec_idle, + input wire pipe_rx2_elec_idle, + input wire pipe_rx3_elec_idle, + input wire pipe_rx4_elec_idle, + input wire pipe_rx5_elec_idle, + input wire pipe_rx6_elec_idle, + input wire pipe_rx7_elec_idle, + input wire pipe_clk, + input wire user_clk, + input wire user_clk2, + input wire user_clk_prebuf, + input wire user_clk_prebuf_en, +`ifdef B_TESTMODE + input wire scanmode_n, + input wire scanenable_n, + input wire edt_clk, + input wire edt_bypass, + input wire edt_update, + input wire edt_configuration, + input wire edt_single_bypass_chain, + input wire edt_channels_in1, + input wire edt_channels_in2, + input wire edt_channels_in3, + input wire edt_channels_in4, + input wire edt_channels_in5, + input wire edt_channels_in6, + input wire edt_channels_in7, + input wire edt_channels_in8, + input wire pmv_enable_n, + input wire [2:0] pmv_select, + input wire [1:0] pmv_divide, +`endif + input wire sys_rst_n, + input wire cm_rst_n, + input wire cm_sticky_rst_n, + input wire func_lvl_rst_n, + input wire tl_rst_n, + input wire dl_rst_n, + input wire pl_rst_n, + input wire pl_transmit_hot_rst, +// input wire cfg_reset, +// input wire gwe, +// input wire grestore, +// input wire ghigh, + input wire [31:0] cfg_mgmt_di, + input wire [3:0] cfg_mgmt_byte_en_n, + input wire [9:0] cfg_mgmt_dwaddr, + input wire cfg_mgmt_wr_rw1c_as_rw_n, + input wire cfg_mgmt_wr_readonly_n, + input wire cfg_mgmt_wr_en_n, + input wire cfg_mgmt_rd_en_n, + input wire cfg_err_malformed_n, + input wire cfg_err_cor_n, + input wire cfg_err_ur_n, + input wire cfg_err_ecrc_n, + input wire cfg_err_cpl_timeout_n, + input wire cfg_err_cpl_abort_n, + input wire cfg_err_cpl_unexpect_n, + input wire cfg_err_poisoned_n, + input wire cfg_err_acs_n, + input wire cfg_err_atomic_egress_blocked_n, + input wire cfg_err_mc_blocked_n, + input wire cfg_err_internal_uncor_n, + input wire cfg_err_internal_cor_n, + input wire cfg_err_posted_n, + input wire cfg_err_locked_n, + input wire cfg_err_norecovery_n, + input wire [127:0] cfg_err_aer_headerlog, + input wire [47:0] cfg_err_tlp_cpl_header, + input wire cfg_interrupt_n, + input wire [7:0] cfg_interrupt_di, + input wire cfg_interrupt_assert_n, + input wire cfg_interrupt_stat_n, + input wire [7:0] cfg_ds_bus_number, + input wire [4:0] cfg_ds_device_number, + input wire [2:0] cfg_ds_function_number, + input wire [7:0] cfg_port_number, + input wire cfg_pm_halt_aspm_l0s_n, + input wire cfg_pm_halt_aspm_l1_n, + input wire cfg_pm_force_state_en_n, + input wire [1:0] cfg_pm_force_state, + input wire cfg_pm_wake_n, + input wire cfg_pm_turnoff_ok_n, + input wire cfg_pm_send_pme_to_n, + input wire [4:0] cfg_pciecap_interrupt_msgnum, + input wire cfg_trn_pending_n, + input wire [2:0] cfg_force_mps, + input wire cfg_force_common_clock_off, + input wire cfg_force_extended_sync_on, + input wire [63:0] cfg_dsn, + input wire [4:0] cfg_aer_interrupt_msgnum, + input wire [15:0] cfg_dev_id, + input wire [15:0] cfg_vend_id, + input wire [7:0] cfg_rev_id, + input wire [15:0] cfg_subsys_id, + input wire [15:0] cfg_subsys_vend_id, + input wire drp_clk, + input wire drp_en, + input wire drp_we, + input wire [8:0] drp_addr, + input wire [15:0] drp_di, + input wire [1:0] dbg_mode, + input wire dbg_sub_mode, + input wire [2:0] pl_dbg_mode, + + output wire trn_clk, + + output wire trn_tdst_rdy, + output wire trn_terr_drop, + output wire [5:0] trn_tbuf_av, + output wire trn_tcfg_req, + + //output wire [C_DATA_WIDTH-1:0] trn_rd, + output wire [127:0] trn_rd, + + output wire [1:0] trn_rrem, + output wire trn_rsof, + output wire trn_reof, + output wire trn_rsrc_rdy, + output wire trn_rsrc_dsc, + output wire trn_recrc_err, + output wire trn_rerrfwd, + output wire [7:0] trn_rbar_hit, + output wire trn_lnk_up, + output wire [7:0] trn_fc_ph, + output wire [11:0] trn_fc_pd, + output wire [7:0] trn_fc_nph, + output wire [11:0] trn_fc_npd, + output wire [7:0] trn_fc_cplh, + output wire [11:0] trn_fc_cpld, + output wire trn_tdllp_dst_rdy, + output wire [63:0] trn_rdllp_data, + output wire [1:0] trn_rdllp_src_rdy, + output wire ll2_tfc_init1_seq, + output wire ll2_tfc_init2_seq, + output wire pl2_suspend_ok, + output wire pl2_recovery, + output wire pl2_rx_elec_idle, + output wire [1:0] pl2_rx_pm_state, + output wire pl2_l0_req, + output wire ll2_suspend_ok, + output wire ll2_tx_idle, + output wire [4:0] ll2_link_status, + output wire tl2_ppm_suspend_ok, + output wire tl2_aspm_suspend_req, + output wire tl2_aspm_suspend_credit_check_ok, + output wire pl2_link_up, + output wire pl2_receiver_err, + output wire ll2_receiver_err, + output wire ll2_protocol_err, + output wire ll2_bad_tlp_err, + output wire ll2_bad_dllp_err, + output wire ll2_replay_ro_err, + output wire ll2_replay_to_err, + output wire [63:0] tl2_err_hdr, + output wire tl2_err_malformed, + output wire tl2_err_rxoverflow, + output wire tl2_err_fcpe, + output wire pl_sel_lnk_rate, + output wire [1:0] pl_sel_lnk_width, + output wire [5:0] pl_ltssm_state, + output wire [1:0] pl_lane_reversal_mode, + output wire pl_phy_lnk_up_n, + output wire [2:0] pl_tx_pm_state, + output wire [1:0] pl_rx_pm_state, + output wire pl_link_upcfg_cap, + output wire pl_link_gen2_cap, + output wire pl_link_partner_gen2_supported, + output wire [2:0] pl_initial_link_width, + output wire pl_directed_change_done, + output wire pipe_tx_rcvr_det, + output wire pipe_tx_reset, + output wire pipe_tx_rate, + output wire pipe_tx_deemph, + output wire [2:0] pipe_tx_margin, + output wire pipe_rx0_polarity, + output wire pipe_rx1_polarity, + output wire pipe_rx2_polarity, + output wire pipe_rx3_polarity, + output wire pipe_rx4_polarity, + output wire pipe_rx5_polarity, + output wire pipe_rx6_polarity, + output wire pipe_rx7_polarity, + output wire pipe_tx0_compliance, + output wire pipe_tx1_compliance, + output wire pipe_tx2_compliance, + output wire pipe_tx3_compliance, + output wire pipe_tx4_compliance, + output wire pipe_tx5_compliance, + output wire pipe_tx6_compliance, + output wire pipe_tx7_compliance, + output wire [1:0] pipe_tx0_char_is_k, + output wire [1:0] pipe_tx1_char_is_k, + output wire [1:0] pipe_tx2_char_is_k, + output wire [1:0] pipe_tx3_char_is_k, + output wire [1:0] pipe_tx4_char_is_k, + output wire [1:0] pipe_tx5_char_is_k, + output wire [1:0] pipe_tx6_char_is_k, + output wire [1:0] pipe_tx7_char_is_k, + output wire [15:0] pipe_tx0_data, + output wire [15:0] pipe_tx1_data, + output wire [15:0] pipe_tx2_data, + output wire [15:0] pipe_tx3_data, + output wire [15:0] pipe_tx4_data, + output wire [15:0] pipe_tx5_data, + output wire [15:0] pipe_tx6_data, + output wire [15:0] pipe_tx7_data, + output wire pipe_tx0_elec_idle, + output wire pipe_tx1_elec_idle, + output wire pipe_tx2_elec_idle, + output wire pipe_tx3_elec_idle, + output wire pipe_tx4_elec_idle, + output wire pipe_tx5_elec_idle, + output wire pipe_tx6_elec_idle, + output wire pipe_tx7_elec_idle, + output wire [1:0] pipe_tx0_powerdown, + output wire [1:0] pipe_tx1_powerdown, + output wire [1:0] pipe_tx2_powerdown, + output wire [1:0] pipe_tx3_powerdown, + output wire [1:0] pipe_tx4_powerdown, + output wire [1:0] pipe_tx5_powerdown, + output wire [1:0] pipe_tx6_powerdown, + output wire [1:0] pipe_tx7_powerdown, +`ifdef B_TESTMODE + output wire pmv_out, +`endif + output wire user_rst_n, + output wire pl_received_hot_rst, + output wire received_func_lvl_rst_n, + output wire lnk_clk_en, + output wire [31:0] cfg_mgmt_do, + output wire cfg_mgmt_rd_wr_done_n, + output wire cfg_err_aer_headerlog_set_n, + output wire cfg_err_cpl_rdy_n, + output wire cfg_interrupt_rdy_n, + output wire [2:0] cfg_interrupt_mmenable, + output wire cfg_interrupt_msienable, + output wire [7:0] cfg_interrupt_do, + output wire cfg_interrupt_msixenable, + output wire cfg_interrupt_msixfm, + output wire cfg_msg_received, + output wire [15:0] cfg_msg_data, + output wire cfg_msg_received_err_cor, + output wire cfg_msg_received_err_non_fatal, + output wire cfg_msg_received_err_fatal, + output wire cfg_msg_received_assert_int_a, + output wire cfg_msg_received_deassert_int_a, + output wire cfg_msg_received_assert_int_b, + output wire cfg_msg_received_deassert_int_b, + output wire cfg_msg_received_assert_int_c, + output wire cfg_msg_received_deassert_int_c, + output wire cfg_msg_received_assert_int_d, + output wire cfg_msg_received_deassert_int_d, + output wire cfg_msg_received_pm_pme, + output wire cfg_msg_received_pme_to_ack, + output wire cfg_msg_received_pme_to, + output wire cfg_msg_received_setslotpowerlimit, + output wire cfg_msg_received_unlock, + output wire cfg_msg_received_pm_as_nak, + output wire [2:0] cfg_pcie_link_state, + output wire cfg_pm_rcv_as_req_l1_n, + output wire cfg_pm_rcv_enter_l1_n, + output wire cfg_pm_rcv_enter_l23_n, + output wire cfg_pm_rcv_req_ack_n, + output wire [1:0] cfg_pmcsr_powerstate, + output wire cfg_pmcsr_pme_en, + output wire cfg_pmcsr_pme_status, + output wire cfg_transaction, + output wire cfg_transaction_type, + output wire [6:0] cfg_transaction_addr, + output wire cfg_command_io_enable, + output wire cfg_command_mem_enable, + output wire cfg_command_bus_master_enable, + output wire cfg_command_interrupt_disable, + output wire cfg_command_serr_en, + output wire cfg_bridge_serr_en, + output wire cfg_dev_status_corr_err_detected, + output wire cfg_dev_status_non_fatal_err_detected, + output wire cfg_dev_status_fatal_err_detected, + output wire cfg_dev_status_ur_detected, + output wire cfg_dev_control_corr_err_reporting_en, + output wire cfg_dev_control_non_fatal_reporting_en, + output wire cfg_dev_control_fatal_err_reporting_en, + output wire cfg_dev_control_ur_err_reporting_en, + output wire cfg_dev_control_enable_ro, + output wire [2:0] cfg_dev_control_max_payload, + output wire cfg_dev_control_ext_tag_en, + output wire cfg_dev_control_phantom_en, + output wire cfg_dev_control_aux_power_en, + output wire cfg_dev_control_no_snoop_en, + output wire [2:0] cfg_dev_control_max_read_req, + output wire [1:0] cfg_link_status_current_speed, + output wire [3:0] cfg_link_status_negotiated_width, + output wire cfg_link_status_link_training, + output wire cfg_link_status_dll_active, + output wire cfg_link_status_bandwidth_status, + output wire cfg_link_status_auto_bandwidth_status, + output wire [1:0] cfg_link_control_aspm_control, + output wire cfg_link_control_rcb, + output wire cfg_link_control_link_disable, + output wire cfg_link_control_retrain_link, + output wire cfg_link_control_common_clock, + output wire cfg_link_control_extended_sync, + output wire cfg_link_control_clock_pm_en, + output wire cfg_link_control_hw_auto_width_dis, + output wire cfg_link_control_bandwidth_int_en, + output wire cfg_link_control_auto_bandwidth_int_en, + output wire [3:0] cfg_dev_control2_cpl_timeout_val, + output wire cfg_dev_control2_cpl_timeout_dis, + output wire cfg_dev_control2_ari_forward_en, + output wire cfg_dev_control2_atomic_requester_en, + output wire cfg_dev_control2_atomic_egress_block, + output wire cfg_dev_control2_ido_req_en, + output wire cfg_dev_control2_ido_cpl_en, + output wire cfg_dev_control2_ltr_en, + output wire cfg_dev_control2_tlp_prefix_block, + output wire cfg_slot_control_electromech_il_ctl_pulse, + output wire cfg_root_control_syserr_corr_err_en, + output wire cfg_root_control_syserr_non_fatal_err_en, + output wire cfg_root_control_syserr_fatal_err_en, + output wire cfg_root_control_pme_int_en, + output wire cfg_aer_ecrc_check_en, + output wire cfg_aer_ecrc_gen_en, + output wire cfg_aer_rooterr_corr_err_reporting_en, + output wire cfg_aer_rooterr_non_fatal_err_reporting_en, + output wire cfg_aer_rooterr_fatal_err_reporting_en, + output wire cfg_aer_rooterr_corr_err_received, + output wire cfg_aer_rooterr_non_fatal_err_received, + output wire cfg_aer_rooterr_fatal_err_received, + output wire [6:0] cfg_vc_tcvc_map, + output wire drp_rdy, + output wire [15:0] drp_do, + output wire [63:0] dbg_vec_a, + output wire [63:0] dbg_vec_b, + output wire [11:0] dbg_vec_c, + output wire dbg_sclr_a, + output wire dbg_sclr_b, + output wire dbg_sclr_c, + output wire dbg_sclr_d, + output wire dbg_sclr_e, + output wire dbg_sclr_f, + output wire dbg_sclr_g, + output wire dbg_sclr_h, + output wire dbg_sclr_i, + output wire dbg_sclr_j, + output wire dbg_sclr_k, + output wire [11:0] pl_dbg_vec +// output wire [18:0] xil_unconn_out +); + + localparam TCQ = 1; + + wire [3:0] trn_tdst_rdy_bus; + + // Assignments to outputs + assign trn_clk = user_clk2; + assign trn_tdst_rdy = trn_tdst_rdy_bus[0]; + + //----------------------------------------------------------------------// + // BRAM // + //----------------------------------------------------------------------// + + // transmit bram interface + wire mim_tx_wen; + wire [12:0] mim_tx_waddr; + wire [68:0] mim_tx_wdata; + wire mim_tx_ren; + wire mim_tx_rce; + wire [12:0] mim_tx_raddr; + wire [68:0] mim_tx_rdata; + wire [2:0] unused_mim_tx_rdata; + + // receive bram interface + wire mim_rx_wen; + wire [12:0] mim_rx_waddr; + wire [67:0] mim_rx_wdata; + wire mim_rx_ren; + wire mim_rx_rce; + wire [12:0] mim_rx_raddr; + wire [67:0] mim_rx_rdata; + wire [3:0] unused_mim_rx_rdata; + +pcie_7x_0_pcie_bram_top_7x #( + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .DEV_CAP_MAX_PAYLOAD_SUPPORTED ( DEV_CAP_MAX_PAYLOAD_SUPPORTED ), + .VC0_TX_LASTPACKET ( VC0_TX_LASTPACKET ), + .TL_TX_RAM_RADDR_LATENCY ( TL_TX_RAM_RADDR_LATENCY ), + .TL_TX_RAM_RDATA_LATENCY ( TL_TX_RAM_RDATA_LATENCY ), + .TL_TX_RAM_WRITE_LATENCY ( TL_TX_RAM_WRITE_LATENCY ), + .VC0_RX_RAM_LIMIT ( VC0_RX_RAM_LIMIT ), + .TL_RX_RAM_RADDR_LATENCY ( TL_RX_RAM_RADDR_LATENCY ), + .TL_RX_RAM_RDATA_LATENCY ( TL_RX_RAM_RDATA_LATENCY ), + .TL_RX_RAM_WRITE_LATENCY ( TL_RX_RAM_WRITE_LATENCY ) + ) pcie_bram_top ( + .user_clk_i ( user_clk ), + .reset_i ( 1'b0 ), + + .mim_tx_waddr ( mim_tx_waddr ), + .mim_tx_wen ( mim_tx_wen ), + .mim_tx_ren ( mim_tx_ren ), + .mim_tx_rce ( 1'b1 ), + .mim_tx_wdata ( {3'b0, mim_tx_wdata} ), + .mim_tx_raddr ( mim_tx_raddr ), + .mim_tx_rdata ( {unused_mim_tx_rdata, mim_tx_rdata} ), + + .mim_rx_waddr ( mim_rx_waddr ), + .mim_rx_wen ( mim_rx_wen ), + .mim_rx_ren ( mim_rx_ren ), + .mim_rx_rce ( 1'b1 ), + .mim_rx_wdata ( {4'b0, mim_rx_wdata} ), + .mim_rx_raddr ( mim_rx_raddr ), + .mim_rx_rdata ( {unused_mim_rx_rdata, mim_rx_rdata} ) + ); + + //------------------------------------------------------- + // Virtex7 PCI Express Block Module + //------------------------------------------------------- + + PCIE_2_1 #( // Verilog-2001 + .AER_BASE_PTR ( AER_BASE_PTR ), + .AER_CAP_ECRC_CHECK_CAPABLE ( AER_CAP_ECRC_CHECK_CAPABLE ), + .AER_CAP_ECRC_GEN_CAPABLE ( AER_CAP_ECRC_GEN_CAPABLE ), + .AER_CAP_ID ( AER_CAP_ID ), + .AER_CAP_MULTIHEADER ( AER_CAP_MULTIHEADER ), + .AER_CAP_NEXTPTR ( AER_CAP_NEXTPTR ), + .AER_CAP_ON ( AER_CAP_ON ), + .AER_CAP_OPTIONAL_ERR_SUPPORT ( AER_CAP_OPTIONAL_ERR_SUPPORT ), + .AER_CAP_PERMIT_ROOTERR_UPDATE ( AER_CAP_PERMIT_ROOTERR_UPDATE ), + .AER_CAP_VERSION ( AER_CAP_VERSION ), + .ALLOW_X8_GEN2 ( ALLOW_X8_GEN2 ), + .BAR0 ( BAR0 ), + .BAR1 ( BAR1 ), + .BAR2 ( BAR2 ), + .BAR3 ( BAR3 ), + .BAR4 ( BAR4 ), + .BAR5 ( BAR5 ), + .CAPABILITIES_PTR ( CAPABILITIES_PTR ), + .CARDBUS_CIS_POINTER ( CARDBUS_CIS_POINTER ), + .CFG_ECRC_ERR_CPLSTAT ( CFG_ECRC_ERR_CPLSTAT ), + .CLASS_CODE ( CLASS_CODE ), + .CMD_INTX_IMPLEMENTED ( CMD_INTX_IMPLEMENTED ), + .CPL_TIMEOUT_DISABLE_SUPPORTED ( CPL_TIMEOUT_DISABLE_SUPPORTED ), + .CPL_TIMEOUT_RANGES_SUPPORTED ( CPL_TIMEOUT_RANGES_SUPPORTED ), + .CRM_MODULE_RSTS ( CRM_MODULE_RSTS ), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ), + .DEV_CAP_ENDPOINT_L0S_LATENCY ( DEV_CAP_ENDPOINT_L0S_LATENCY ), + .DEV_CAP_ENDPOINT_L1_LATENCY ( DEV_CAP_ENDPOINT_L1_LATENCY ), + .DEV_CAP_EXT_TAG_SUPPORTED ( DEV_CAP_EXT_TAG_SUPPORTED ), + .DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ( DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ), + .DEV_CAP_MAX_PAYLOAD_SUPPORTED ( DEV_CAP_MAX_PAYLOAD_SUPPORTED ), + .DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ( DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ), + .DEV_CAP_ROLE_BASED_ERROR ( DEV_CAP_ROLE_BASED_ERROR ), + .DEV_CAP_RSVD_14_12 ( DEV_CAP_RSVD_14_12 ), + .DEV_CAP_RSVD_17_16 ( DEV_CAP_RSVD_17_16 ), + .DEV_CAP_RSVD_31_29 ( DEV_CAP_RSVD_31_29 ), + .DEV_CAP2_ARI_FORWARDING_SUPPORTED ( DEV_CAP2_ARI_FORWARDING_SUPPORTED ), + .DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED ( DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED ), + .DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED ( DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED ), + .DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED ( DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED ), + .DEV_CAP2_CAS128_COMPLETER_SUPPORTED ( DEV_CAP2_CAS128_COMPLETER_SUPPORTED ), + .DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED ( DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED ), + .DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED ( DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED ), + .DEV_CAP2_LTR_MECHANISM_SUPPORTED ( DEV_CAP2_LTR_MECHANISM_SUPPORTED ), + .DEV_CAP2_MAX_ENDEND_TLP_PREFIXES ( DEV_CAP2_MAX_ENDEND_TLP_PREFIXES ), + .DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING ( DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING ), + .DEV_CAP2_TPH_COMPLETER_SUPPORTED ( DEV_CAP2_TPH_COMPLETER_SUPPORTED ), + .DEV_CONTROL_AUX_POWER_SUPPORTED ( DEV_CONTROL_AUX_POWER_SUPPORTED ), + .DEV_CONTROL_EXT_TAG_DEFAULT ( DEV_CONTROL_EXT_TAG_DEFAULT ), + .DISABLE_ASPM_L1_TIMER ( DISABLE_ASPM_L1_TIMER ), + .DISABLE_BAR_FILTERING ( DISABLE_BAR_FILTERING ), + .DISABLE_ERR_MSG ( DISABLE_ERR_MSG ), + .DISABLE_ID_CHECK ( DISABLE_ID_CHECK ), + .DISABLE_LANE_REVERSAL ( DISABLE_LANE_REVERSAL ), + .DISABLE_LOCKED_FILTER ( DISABLE_LOCKED_FILTER ), + .DISABLE_PPM_FILTER ( DISABLE_PPM_FILTER ), + .DISABLE_RX_POISONED_RESP ( DISABLE_RX_POISONED_RESP ), + .DISABLE_RX_TC_FILTER ( DISABLE_RX_TC_FILTER ), + .DISABLE_SCRAMBLING ( DISABLE_SCRAMBLING ), + .DNSTREAM_LINK_NUM ( DNSTREAM_LINK_NUM ), + .DSN_BASE_PTR ( DSN_BASE_PTR ), + .DSN_CAP_ID ( DSN_CAP_ID ), + .DSN_CAP_NEXTPTR ( DSN_CAP_NEXTPTR ), + .DSN_CAP_ON ( DSN_CAP_ON ), + .DSN_CAP_VERSION ( DSN_CAP_VERSION ), + .ENABLE_MSG_ROUTE ( ENABLE_MSG_ROUTE ), + .ENABLE_RX_TD_ECRC_TRIM ( ENABLE_RX_TD_ECRC_TRIM ), + .ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED ( ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED ), + .ENTER_RVRY_EI_L0 ( ENTER_RVRY_EI_L0 ), + .EXIT_LOOPBACK_ON_EI ( EXIT_LOOPBACK_ON_EI ), + .EXPANSION_ROM ( EXPANSION_ROM ), + .EXT_CFG_CAP_PTR ( EXT_CFG_CAP_PTR ), + .EXT_CFG_XP_CAP_PTR ( EXT_CFG_XP_CAP_PTR ), + .HEADER_TYPE ( HEADER_TYPE ), + .INFER_EI ( INFER_EI ), + .INTERRUPT_PIN ( INTERRUPT_PIN ), + .INTERRUPT_STAT_AUTO ( INTERRUPT_STAT_AUTO ), + .IS_SWITCH ( IS_SWITCH ), + .LAST_CONFIG_DWORD ( LAST_CONFIG_DWORD ), + .LINK_CAP_ASPM_OPTIONALITY ( LINK_CAP_ASPM_OPTIONALITY ), + .LINK_CAP_ASPM_SUPPORT ( LINK_CAP_ASPM_SUPPORT ), + .LINK_CAP_CLOCK_POWER_MANAGEMENT ( LINK_CAP_CLOCK_POWER_MANAGEMENT ), + .LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ( LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ), + .LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP ( LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_GEN2 ), + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .LINK_CAP_RSVD_23 ( LINK_CAP_RSVD_23 ), + .LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ( LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ), + .LINK_CONTROL_RCB ( LINK_CONTROL_RCB ), + .LINK_CTRL2_DEEMPHASIS ( LINK_CTRL2_DEEMPHASIS ), + .LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ( LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ), + .LINK_CTRL2_TARGET_LINK_SPEED ( LINK_CTRL2_TARGET_LINK_SPEED ), + .LINK_STATUS_SLOT_CLOCK_CONFIG ( LINK_STATUS_SLOT_CLOCK_CONFIG ), + .LL_ACK_TIMEOUT ( LL_ACK_TIMEOUT ), + .LL_ACK_TIMEOUT_EN ( LL_ACK_TIMEOUT_EN ), + .LL_ACK_TIMEOUT_FUNC ( LL_ACK_TIMEOUT_FUNC ), + .LL_REPLAY_TIMEOUT ( LL_REPLAY_TIMEOUT ), + .LL_REPLAY_TIMEOUT_EN ( LL_REPLAY_TIMEOUT_EN ), + .LL_REPLAY_TIMEOUT_FUNC ( LL_REPLAY_TIMEOUT_FUNC ), + .LTSSM_MAX_LINK_WIDTH ( LTSSM_MAX_LINK_WIDTH ), + .MPS_FORCE ( MPS_FORCE ), + .MSI_BASE_PTR ( MSI_BASE_PTR ), + .MSI_CAP_ID ( MSI_CAP_ID ), + .MSI_CAP_MULTIMSG_EXTENSION ( MSI_CAP_MULTIMSG_EXTENSION ), + .MSI_CAP_MULTIMSGCAP ( MSI_CAP_MULTIMSGCAP ), + .MSI_CAP_NEXTPTR ( MSI_CAP_NEXTPTR ), + .MSI_CAP_ON ( MSI_CAP_ON ), + .MSI_CAP_PER_VECTOR_MASKING_CAPABLE ( MSI_CAP_PER_VECTOR_MASKING_CAPABLE ), + .MSI_CAP_64_BIT_ADDR_CAPABLE ( MSI_CAP_64_BIT_ADDR_CAPABLE ), + .MSIX_BASE_PTR ( MSIX_BASE_PTR ), + .MSIX_CAP_ID ( MSIX_CAP_ID ), + .MSIX_CAP_NEXTPTR ( MSIX_CAP_NEXTPTR ), + .MSIX_CAP_ON ( MSIX_CAP_ON ), + .MSIX_CAP_PBA_BIR ( MSIX_CAP_PBA_BIR ), + .MSIX_CAP_PBA_OFFSET ( MSIX_CAP_PBA_OFFSET ), + .MSIX_CAP_TABLE_BIR ( MSIX_CAP_TABLE_BIR ), + .MSIX_CAP_TABLE_OFFSET ( MSIX_CAP_TABLE_OFFSET ), + .MSIX_CAP_TABLE_SIZE ( MSIX_CAP_TABLE_SIZE ), + .N_FTS_COMCLK_GEN1 ( N_FTS_COMCLK_GEN1 ), + .N_FTS_COMCLK_GEN2 ( N_FTS_COMCLK_GEN2 ), + .N_FTS_GEN1 ( N_FTS_GEN1 ), + .N_FTS_GEN2 ( N_FTS_GEN2 ), + .PCIE_BASE_PTR ( PCIE_BASE_PTR ), + .PCIE_CAP_CAPABILITY_ID ( PCIE_CAP_CAPABILITY_ID ), + .PCIE_CAP_CAPABILITY_VERSION ( PCIE_CAP_CAPABILITY_VERSION ), + .PCIE_CAP_DEVICE_PORT_TYPE ( PCIE_CAP_DEVICE_PORT_TYPE ), + .PCIE_CAP_NEXTPTR ( PCIE_CAP_NEXTPTR ), + .PCIE_CAP_ON ( PCIE_CAP_ON ), + .PCIE_CAP_RSVD_15_14 ( PCIE_CAP_RSVD_15_14 ), + .PCIE_CAP_SLOT_IMPLEMENTED ( PCIE_CAP_SLOT_IMPLEMENTED ), + .PCIE_REVISION ( PCIE_REVISION ), + .PL_AUTO_CONFIG ( PL_AUTO_CONFIG ), + .PL_FAST_TRAIN ( PL_FAST_TRAIN ), + .PM_ASPML0S_TIMEOUT ( PM_ASPML0S_TIMEOUT ), + .PM_ASPML0S_TIMEOUT_EN ( PM_ASPML0S_TIMEOUT_EN ), + .PM_ASPML0S_TIMEOUT_FUNC ( PM_ASPML0S_TIMEOUT_FUNC ), + .PM_ASPM_FASTEXIT ( PM_ASPM_FASTEXIT ), + .PM_BASE_PTR ( PM_BASE_PTR ), + .PM_CAP_AUXCURRENT ( PM_CAP_AUXCURRENT ), + .PM_CAP_DSI ( PM_CAP_DSI ), + .PM_CAP_D1SUPPORT ( PM_CAP_D1SUPPORT ), + .PM_CAP_D2SUPPORT ( PM_CAP_D2SUPPORT ), + .PM_CAP_ID ( PM_CAP_ID ), + .PM_CAP_NEXTPTR ( PM_CAP_NEXTPTR ), + .PM_CAP_ON ( PM_CAP_ON ), + .PM_CAP_PME_CLOCK ( PM_CAP_PME_CLOCK ), + .PM_CAP_PMESUPPORT ( PM_CAP_PMESUPPORT ), + .PM_CAP_RSVD_04 ( PM_CAP_RSVD_04 ), + .PM_CAP_VERSION ( PM_CAP_VERSION ), + .PM_CSR_BPCCEN ( PM_CSR_BPCCEN ), + .PM_CSR_B2B3 ( PM_CSR_B2B3 ), + .PM_CSR_NOSOFTRST ( PM_CSR_NOSOFTRST ), + .PM_DATA_SCALE0 ( PM_DATA_SCALE0 ), + .PM_DATA_SCALE1 ( PM_DATA_SCALE1 ), + .PM_DATA_SCALE2 ( PM_DATA_SCALE2 ), + .PM_DATA_SCALE3 ( PM_DATA_SCALE3 ), + .PM_DATA_SCALE4 ( PM_DATA_SCALE4 ), + .PM_DATA_SCALE5 ( PM_DATA_SCALE5 ), + .PM_DATA_SCALE6 ( PM_DATA_SCALE6 ), + .PM_DATA_SCALE7 ( PM_DATA_SCALE7 ), + .PM_DATA0 ( PM_DATA0 ), + .PM_DATA1 ( PM_DATA1 ), + .PM_DATA2 ( PM_DATA2 ), + .PM_DATA3 ( PM_DATA3 ), + .PM_DATA4 ( PM_DATA4 ), + .PM_DATA5 ( PM_DATA5 ), + .PM_DATA6 ( PM_DATA6 ), + .PM_DATA7 ( PM_DATA7 ), + .PM_MF ( PM_MF ), + .RBAR_BASE_PTR ( RBAR_BASE_PTR ), + .RBAR_CAP_CONTROL_ENCODEDBAR0 ( RBAR_CAP_CONTROL_ENCODEDBAR0 ), + .RBAR_CAP_CONTROL_ENCODEDBAR1 ( RBAR_CAP_CONTROL_ENCODEDBAR1 ), + .RBAR_CAP_CONTROL_ENCODEDBAR2 ( RBAR_CAP_CONTROL_ENCODEDBAR2 ), + .RBAR_CAP_CONTROL_ENCODEDBAR3 ( RBAR_CAP_CONTROL_ENCODEDBAR3 ), + .RBAR_CAP_CONTROL_ENCODEDBAR4 ( RBAR_CAP_CONTROL_ENCODEDBAR4 ), + .RBAR_CAP_CONTROL_ENCODEDBAR5 ( RBAR_CAP_CONTROL_ENCODEDBAR5 ), + .RBAR_CAP_ID ( RBAR_CAP_ID ), + .RBAR_CAP_INDEX0 ( RBAR_CAP_INDEX0 ), + .RBAR_CAP_INDEX1 ( RBAR_CAP_INDEX1 ), + .RBAR_CAP_INDEX2 ( RBAR_CAP_INDEX2 ), + .RBAR_CAP_INDEX3 ( RBAR_CAP_INDEX3 ), + .RBAR_CAP_INDEX4 ( RBAR_CAP_INDEX4 ), + .RBAR_CAP_INDEX5 ( RBAR_CAP_INDEX5 ), + .RBAR_CAP_NEXTPTR ( RBAR_CAP_NEXTPTR ), + .RBAR_CAP_ON ( RBAR_CAP_ON ), + .RBAR_CAP_SUP0 ( RBAR_CAP_SUP0 ), + .RBAR_CAP_SUP1 ( RBAR_CAP_SUP1 ), + .RBAR_CAP_SUP2 ( RBAR_CAP_SUP2 ), + .RBAR_CAP_SUP3 ( RBAR_CAP_SUP3 ), + .RBAR_CAP_SUP4 ( RBAR_CAP_SUP4 ), + .RBAR_CAP_SUP5 ( RBAR_CAP_SUP5 ), + .RBAR_CAP_VERSION ( RBAR_CAP_VERSION ), + .RBAR_NUM ( RBAR_NUM ), + .RECRC_CHK ( RECRC_CHK ), + .RECRC_CHK_TRIM ( RECRC_CHK_TRIM ), + .ROOT_CAP_CRS_SW_VISIBILITY ( ROOT_CAP_CRS_SW_VISIBILITY ), + .RP_AUTO_SPD ( RP_AUTO_SPD ), + .RP_AUTO_SPD_LOOPCNT ( RP_AUTO_SPD_LOOPCNT ), + .SELECT_DLL_IF ( SELECT_DLL_IF ), + .SLOT_CAP_ATT_BUTTON_PRESENT ( SLOT_CAP_ATT_BUTTON_PRESENT ), + .SLOT_CAP_ATT_INDICATOR_PRESENT ( SLOT_CAP_ATT_INDICATOR_PRESENT ), + .SLOT_CAP_ELEC_INTERLOCK_PRESENT ( SLOT_CAP_ELEC_INTERLOCK_PRESENT ), + .SLOT_CAP_HOTPLUG_CAPABLE ( SLOT_CAP_HOTPLUG_CAPABLE ), + .SLOT_CAP_HOTPLUG_SURPRISE ( SLOT_CAP_HOTPLUG_SURPRISE ), + .SLOT_CAP_MRL_SENSOR_PRESENT ( SLOT_CAP_MRL_SENSOR_PRESENT ), + .SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ( SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ), + .SLOT_CAP_PHYSICAL_SLOT_NUM ( SLOT_CAP_PHYSICAL_SLOT_NUM ), + .SLOT_CAP_POWER_CONTROLLER_PRESENT ( SLOT_CAP_POWER_CONTROLLER_PRESENT ), + .SLOT_CAP_POWER_INDICATOR_PRESENT ( SLOT_CAP_POWER_INDICATOR_PRESENT ), + .SLOT_CAP_SLOT_POWER_LIMIT_SCALE ( SLOT_CAP_SLOT_POWER_LIMIT_SCALE ), + .SLOT_CAP_SLOT_POWER_LIMIT_VALUE ( SLOT_CAP_SLOT_POWER_LIMIT_VALUE ), + .SPARE_BIT0 ( SPARE_BIT0 ), + .SPARE_BIT1 ( SPARE_BIT1 ), + .SPARE_BIT2 ( SPARE_BIT2 ), + .SPARE_BIT3 ( SPARE_BIT3 ), + .SPARE_BIT4 ( SPARE_BIT4 ), + .SPARE_BIT5 ( SPARE_BIT5 ), + .SPARE_BIT6 ( SPARE_BIT6 ), + .SPARE_BIT7 ( SPARE_BIT7 ), + .SPARE_BIT8 ( SPARE_BIT8 ), + .SPARE_BYTE0 ( SPARE_BYTE0 ), + .SPARE_BYTE1 ( SPARE_BYTE1 ), + .SPARE_BYTE2 ( SPARE_BYTE2 ), + .SPARE_BYTE3 ( SPARE_BYTE3 ), + .SPARE_WORD0 ( SPARE_WORD0 ), + .SPARE_WORD1 ( SPARE_WORD1 ), + .SPARE_WORD2 ( SPARE_WORD2 ), + .SPARE_WORD3 ( SPARE_WORD3 ), + .SSL_MESSAGE_AUTO ( SSL_MESSAGE_AUTO ), + .TECRC_EP_INV ( TECRC_EP_INV ), + .TL_RBYPASS ( TL_RBYPASS ), + .TL_RX_RAM_RADDR_LATENCY ( TL_RX_RAM_RADDR_LATENCY ), + .TL_RX_RAM_RDATA_LATENCY ( TL_RX_RAM_RDATA_LATENCY ), + .TL_RX_RAM_WRITE_LATENCY ( TL_RX_RAM_WRITE_LATENCY ), + .TL_TFC_DISABLE ( TL_TFC_DISABLE ), + .TL_TX_CHECKS_DISABLE ( TL_TX_CHECKS_DISABLE ), + .TL_TX_RAM_RADDR_LATENCY ( TL_TX_RAM_RADDR_LATENCY ), + .TL_TX_RAM_RDATA_LATENCY ( TL_TX_RAM_RDATA_LATENCY ), + .TL_TX_RAM_WRITE_LATENCY ( TL_TX_RAM_WRITE_LATENCY ), + .TRN_DW ( TRN_DW ), + .TRN_NP_FC ( TRN_NP_FC ), + .UPCONFIG_CAPABLE ( UPCONFIG_CAPABLE ), + .UPSTREAM_FACING ( UPSTREAM_FACING ), + .UR_ATOMIC ( UR_ATOMIC ), + .UR_CFG1 ( UR_CFG1 ), + .UR_INV_REQ ( UR_INV_REQ ), + .UR_PRS_RESPONSE ( UR_PRS_RESPONSE ), + .USE_RID_PINS ( USE_RID_PINS ), + .USER_CLK_FREQ ( USER_CLK_FREQ ), + .USER_CLK2_DIV2 ( USER_CLK2_DIV2 ), + .VC_BASE_PTR ( VC_BASE_PTR ), + .VC_CAP_ID ( VC_CAP_ID ), + .VC_CAP_NEXTPTR ( VC_CAP_NEXTPTR ), + .VC_CAP_ON ( VC_CAP_ON ), + .VC_CAP_REJECT_SNOOP_TRANSACTIONS ( VC_CAP_REJECT_SNOOP_TRANSACTIONS ), + .VC_CAP_VERSION ( VC_CAP_VERSION ), + .VC0_CPL_INFINITE ( VC0_CPL_INFINITE ), + .VC0_RX_RAM_LIMIT ( VC0_RX_RAM_LIMIT ), + .VC0_TOTAL_CREDITS_CD ( VC0_TOTAL_CREDITS_CD ), + .VC0_TOTAL_CREDITS_CH ( VC0_TOTAL_CREDITS_CH ), + .VC0_TOTAL_CREDITS_NPD ( VC0_TOTAL_CREDITS_NPD ), + .VC0_TOTAL_CREDITS_NPH ( VC0_TOTAL_CREDITS_NPH ), + .VC0_TOTAL_CREDITS_PD ( VC0_TOTAL_CREDITS_PD ), + .VC0_TOTAL_CREDITS_PH ( VC0_TOTAL_CREDITS_PH ), + .VC0_TX_LASTPACKET ( VC0_TX_LASTPACKET ), + .VSEC_BASE_PTR ( VSEC_BASE_PTR ), + .VSEC_CAP_HDR_ID ( VSEC_CAP_HDR_ID ), + .VSEC_CAP_HDR_REVISION ( VSEC_CAP_HDR_REVISION ), + .VSEC_CAP_ID ( VSEC_CAP_ID ), + .VSEC_CAP_IS_LINK_VISIBLE ( VSEC_CAP_IS_LINK_VISIBLE ), + .VSEC_CAP_NEXTPTR ( VSEC_CAP_NEXTPTR ), + .VSEC_CAP_ON ( VSEC_CAP_ON ), + .VSEC_CAP_VERSION ( VSEC_CAP_VERSION ) +`ifdef B_TESTMODE + , + .TEST_MODE_PIN_CHAR ( TEST_MODE_PIN_CHAR ) +`endif + + ) + pcie_block_i ( + + .TRNTD ({{(128-C_DATA_WIDTH){1'b0}},trn_td} ), + .TRNTREM ({1'b0,trn_trem} ), + + + .TRNTSOF (trn_tsof ), + .TRNTEOF (trn_teof ), + .TRNTSRCRDY (trn_tsrc_rdy ), + .TRNTSRCDSC (trn_tsrc_dsc ), + .TRNTERRFWD (trn_terrfwd ), + .TRNTECRCGEN (trn_tecrc_gen ), + .TRNTSTR (trn_tstr ), + .TRNTCFGGNT (trn_tcfg_gnt ), + .TRNRDSTRDY (trn_rdst_rdy ), + .TRNRNPREQ (trn_rnp_req ), + .TRNRFCPRET (trn_rfcp_ret ), + .TRNRNPOK (trn_rnp_ok ), + .TRNFCSEL (trn_fc_sel ), + .MIMTXRDATA (mim_tx_rdata ), + .MIMRXRDATA (mim_rx_rdata ), + .TRNTDLLPDATA (trn_tdllp_data ), + .TRNTDLLPSRCRDY (trn_tdllp_src_rdy ), + .LL2TLPRCV (ll2_tlp_rcv ), + .LL2SENDENTERL1 (ll2_send_enter_l1 ), + .LL2SENDENTERL23 (ll2_send_enter_l23 ), + .LL2SENDASREQL1 (ll2_send_as_req_l1 ), + .LL2SENDPMACK (ll2_send_pm_ack ), + .PL2DIRECTEDLSTATE (pl2_directed_lstate ), + .LL2SUSPENDNOW (ll2_suspend_now ), + .TL2PPMSUSPENDREQ (tl2_ppm_suspend_req ), + .TL2ASPMSUSPENDCREDITCHECK (tl2_aspm_suspend_credit_check ), + .PLDIRECTEDLINKCHANGE (pl_directed_link_change ), + .PLDIRECTEDLINKWIDTH (pl_directed_link_width ), + .PLDIRECTEDLINKSPEED (pl_directed_link_speed ), + .PLDIRECTEDLINKAUTON (pl_directed_link_auton ), + .PLUPSTREAMPREFERDEEMPH (pl_upstream_prefer_deemph ), + .PLDOWNSTREAMDEEMPHSOURCE (pl_downstream_deemph_source ), + .PLDIRECTEDLTSSMNEW (pl_directed_ltssm_new ), + .PLDIRECTEDLTSSMNEWVLD (pl_directed_ltssm_new_vld ), + .PLDIRECTEDLTSSMSTALL (pl_directed_ltssm_stall ), + .PIPERX0CHARISK (pipe_rx0_char_is_k ), + .PIPERX1CHARISK (pipe_rx1_char_is_k ), + .PIPERX2CHARISK (pipe_rx2_char_is_k ), + .PIPERX3CHARISK (pipe_rx3_char_is_k ), + .PIPERX4CHARISK (pipe_rx4_char_is_k ), + .PIPERX5CHARISK (pipe_rx5_char_is_k ), + .PIPERX6CHARISK (pipe_rx6_char_is_k ), + .PIPERX7CHARISK (pipe_rx7_char_is_k ), + .PIPERX0VALID (pipe_rx0_valid ), + .PIPERX1VALID (pipe_rx1_valid ), + .PIPERX2VALID (pipe_rx2_valid ), + .PIPERX3VALID (pipe_rx3_valid ), + .PIPERX4VALID (pipe_rx4_valid ), + .PIPERX5VALID (pipe_rx5_valid ), + .PIPERX6VALID (pipe_rx6_valid ), + .PIPERX7VALID (pipe_rx7_valid ), + .PIPERX0DATA (pipe_rx0_data ), + .PIPERX1DATA (pipe_rx1_data ), + .PIPERX2DATA (pipe_rx2_data ), + .PIPERX3DATA (pipe_rx3_data ), + .PIPERX4DATA (pipe_rx4_data ), + .PIPERX5DATA (pipe_rx5_data ), + .PIPERX6DATA (pipe_rx6_data ), + .PIPERX7DATA (pipe_rx7_data ), + .PIPERX0CHANISALIGNED (pipe_rx0_chanisaligned ), + .PIPERX1CHANISALIGNED (pipe_rx1_chanisaligned ), + .PIPERX2CHANISALIGNED (pipe_rx2_chanisaligned ), + .PIPERX3CHANISALIGNED (pipe_rx3_chanisaligned ), + .PIPERX4CHANISALIGNED (pipe_rx4_chanisaligned ), + .PIPERX5CHANISALIGNED (pipe_rx5_chanisaligned ), + .PIPERX6CHANISALIGNED (pipe_rx6_chanisaligned ), + .PIPERX7CHANISALIGNED (pipe_rx7_chanisaligned ), + .PIPERX0STATUS (pipe_rx0_status ), + .PIPERX1STATUS (pipe_rx1_status ), + .PIPERX2STATUS (pipe_rx2_status ), + .PIPERX3STATUS (pipe_rx3_status ), + .PIPERX4STATUS (pipe_rx4_status ), + .PIPERX5STATUS (pipe_rx5_status ), + .PIPERX6STATUS (pipe_rx6_status ), + .PIPERX7STATUS (pipe_rx7_status ), + .PIPERX0PHYSTATUS (pipe_rx0_phy_status ), + .PIPERX1PHYSTATUS (pipe_rx1_phy_status ), + .PIPERX2PHYSTATUS (pipe_rx2_phy_status ), + .PIPERX3PHYSTATUS (pipe_rx3_phy_status ), + .PIPERX4PHYSTATUS (pipe_rx4_phy_status ), + .PIPERX5PHYSTATUS (pipe_rx5_phy_status ), + .PIPERX6PHYSTATUS (pipe_rx6_phy_status ), + .PIPERX7PHYSTATUS (pipe_rx7_phy_status ), + .PIPERX0ELECIDLE (pipe_rx0_elec_idle ), + .PIPERX1ELECIDLE (pipe_rx1_elec_idle ), + .PIPERX2ELECIDLE (pipe_rx2_elec_idle ), + .PIPERX3ELECIDLE (pipe_rx3_elec_idle ), + .PIPERX4ELECIDLE (pipe_rx4_elec_idle ), + .PIPERX5ELECIDLE (pipe_rx5_elec_idle ), + .PIPERX6ELECIDLE (pipe_rx6_elec_idle ), + .PIPERX7ELECIDLE (pipe_rx7_elec_idle ), + .PIPECLK (pipe_clk ), + .USERCLK (user_clk ), + .USERCLK2 (user_clk2 ), +`ifdef VALIDATION + .USERCLKPREBUF (user_clk_prebuf ), + .USERCLKPREBUFEN (user_clk_prebuf_en ), +`endif +`ifdef B_TESTMODE + .USERCLKPREBUF (user_clk_prebuf ), + .USERCLKPREBUFEN (user_clk_prebuf_en ), + .SCANMODEN (scanmode_n ), + .SCANENABLEN (scanenable_n ), + .EDTCLK (edt_clk ), + .EDTUPDATE (edt_update ), + .EDTBYPASS (edt_bypass ), + .EDTCONFIGURATION (edt_configuration ), + .EDTSINGLEBYPASSCHAIN (edt_single_bypass_chain ), + .EDTCHANNELSIN1 (edt_channels_in1 ), + .EDTCHANNELSIN2 (edt_channels_in2 ), + .EDTCHANNELSIN3 (edt_channels_in3 ), + .EDTCHANNELSIN4 (edt_channels_in4 ), + .EDTCHANNELSIN5 (edt_channels_in5 ), + .EDTCHANNELSIN6 (edt_channels_in6 ), + .EDTCHANNELSIN7 (edt_channels_in7 ), + .EDTCHANNELSIN8 (edt_channels_in8 ), + .PMVENABLEN (pmv_enable_n ), + .PMVSELECT (pmv_select ), + .PMVDIVIDE (pmv_divide ), +`endif +//`ifdef SECUREIP +// .GSR (gsr ), +//`endif + .SYSRSTN (sys_rst_n ), + .CMRSTN (cm_rst_n ), + .CMSTICKYRSTN (cm_sticky_rst_n ), + .FUNCLVLRSTN (func_lvl_rst_n ), + .TLRSTN (tl_rst_n ), + .DLRSTN (dl_rst_n ), + .PLRSTN (pl_rst_n ), + .PLTRANSMITHOTRST (pl_transmit_hot_rst ), + // Global pins not on Holistic model + //.CFGRESET (cfg_reset ), + //.GWE (gwe ), + //.GRESTORE (grestore ), + //.GHIGHB (ghigh_b ), + .CFGMGMTDI (cfg_mgmt_di ), + .CFGMGMTBYTEENN (cfg_mgmt_byte_en_n ), + .CFGMGMTDWADDR (cfg_mgmt_dwaddr ), + .CFGMGMTWRRW1CASRWN (cfg_mgmt_wr_rw1c_as_rw_n ), + .CFGMGMTWRREADONLYN (cfg_mgmt_wr_readonly_n ), + .CFGMGMTWRENN (cfg_mgmt_wr_en_n ), + .CFGMGMTRDENN (cfg_mgmt_rd_en_n ), + .CFGERRMALFORMEDN (cfg_err_malformed_n ), + .CFGERRCORN (cfg_err_cor_n ), + .CFGERRURN (cfg_err_ur_n ), + .CFGERRECRCN (cfg_err_ecrc_n ), + .CFGERRCPLTIMEOUTN (cfg_err_cpl_timeout_n ), + .CFGERRCPLABORTN (cfg_err_cpl_abort_n ), + .CFGERRCPLUNEXPECTN (cfg_err_cpl_unexpect_n ), + .CFGERRPOISONEDN (cfg_err_poisoned_n ), + .CFGERRACSN (cfg_err_acs_n ), + .CFGERRATOMICEGRESSBLOCKEDN (cfg_err_atomic_egress_blocked_n ), + .CFGERRMCBLOCKEDN (cfg_err_mc_blocked_n ), + .CFGERRINTERNALUNCORN (cfg_err_internal_uncor_n ), + .CFGERRINTERNALCORN (cfg_err_internal_cor_n ), + .CFGERRPOSTEDN (cfg_err_posted_n ), + .CFGERRLOCKEDN (cfg_err_locked_n ), + .CFGERRNORECOVERYN (cfg_err_norecovery_n ), + .CFGERRAERHEADERLOG (cfg_err_aer_headerlog ), + .CFGERRTLPCPLHEADER (cfg_err_tlp_cpl_header ), + .CFGINTERRUPTN (cfg_interrupt_n ), + .CFGINTERRUPTDI (cfg_interrupt_di ), + .CFGINTERRUPTASSERTN (cfg_interrupt_assert_n ), + .CFGINTERRUPTSTATN (cfg_interrupt_stat_n ), + .CFGDSBUSNUMBER (cfg_ds_bus_number ), + .CFGDSDEVICENUMBER (cfg_ds_device_number ), + .CFGDSFUNCTIONNUMBER (cfg_ds_function_number ), + .CFGPORTNUMBER (cfg_port_number ), + .CFGPMHALTASPML0SN (cfg_pm_halt_aspm_l0s_n ), + .CFGPMHALTASPML1N (cfg_pm_halt_aspm_l1_n ), + .CFGPMFORCESTATEENN (cfg_pm_force_state_en_n ), + .CFGPMFORCESTATE (cfg_pm_force_state ), + .CFGPMWAKEN (cfg_pm_wake_n ), + .CFGPMTURNOFFOKN (cfg_pm_turnoff_ok_n ), + .CFGPMSENDPMETON (cfg_pm_send_pme_to_n ), + .CFGPCIECAPINTERRUPTMSGNUM (cfg_pciecap_interrupt_msgnum ), + .CFGTRNPENDINGN (cfg_trn_pending_n ), + .CFGFORCEMPS (cfg_force_mps ), + .CFGFORCECOMMONCLOCKOFF (cfg_force_common_clock_off ), + .CFGFORCEEXTENDEDSYNCON (cfg_force_extended_sync_on ), + .CFGDSN (cfg_dsn ), + .CFGDEVID (cfg_dev_id ), + .CFGVENDID (cfg_vend_id ), + .CFGREVID (cfg_rev_id ), + .CFGSUBSYSID (cfg_subsys_id ), + .CFGSUBSYSVENDID (cfg_subsys_vend_id ), + .CFGAERINTERRUPTMSGNUM (cfg_aer_interrupt_msgnum ), + .DRPCLK (drp_clk ), + .DRPEN (drp_en ), + .DRPWE (drp_we ), + .DRPADDR (drp_addr ), + .DRPDI (drp_di ), + //.DRPREADPORT0 (drp_read_port_0 ), + //.DRPREADPORT1 (drp_read_port_1 ), + //.DRPREADPORT2 (drp_read_port_2 ), + //.DRPREADPORT3 (drp_read_port_3 ), + //.DRPREADPORT4 (drp_read_port_4 ), + //.DRPREADPORT5 (drp_read_port_5 ), + //.DRPREADPORT6 (drp_read_port_6 ), + //.DRPREADPORT7 (drp_read_port_7 ), + //.DRPREADPORT8 (drp_read_port_8 ), + //.DRPREADPORT9 (drp_read_port_9 ), + //.DRPREADPORT10 (drp_read_port_10 ), + //.DRPREADPORT11 (drp_read_port_11 ), + //.DRPREADPORT12 (drp_read_port_12 ), + .DBGMODE (dbg_mode ), + .DBGSUBMODE (dbg_sub_mode ), + .PLDBGMODE (pl_dbg_mode ), + + .TRNTDSTRDY (trn_tdst_rdy_bus ), + .TRNTERRDROP (trn_terr_drop ), + .TRNTBUFAV (trn_tbuf_av ), + .TRNTCFGREQ (trn_tcfg_req ), + .TRNRD (trn_rd ), + .TRNRREM (trn_rrem ), + .TRNRSOF (trn_rsof ), + .TRNREOF (trn_reof ), + .TRNRSRCRDY (trn_rsrc_rdy ), + .TRNRSRCDSC (trn_rsrc_dsc ), + .TRNRECRCERR (trn_recrc_err ), + .TRNRERRFWD (trn_rerrfwd ), + .TRNRBARHIT (trn_rbar_hit ), + .TRNLNKUP (trn_lnk_up ), + .TRNFCPH (trn_fc_ph ), + .TRNFCPD (trn_fc_pd ), + .TRNFCNPH (trn_fc_nph ), + .TRNFCNPD (trn_fc_npd ), + .TRNFCCPLH (trn_fc_cplh ), + .TRNFCCPLD (trn_fc_cpld ), + .MIMTXWDATA (mim_tx_wdata ), + .MIMTXWADDR (mim_tx_waddr ), + .MIMTXWEN (mim_tx_wen ), + .MIMTXRADDR (mim_tx_raddr ), + .MIMTXREN (mim_tx_ren ), + .MIMRXWDATA (mim_rx_wdata ), + .MIMRXWADDR (mim_rx_waddr ), + .MIMRXWEN (mim_rx_wen ), + .MIMRXRADDR (mim_rx_raddr ), + .MIMRXREN (mim_rx_ren ), + .TRNTDLLPDSTRDY (trn_tdllp_dst_rdy ), + .TRNRDLLPDATA (trn_rdllp_data ), + .TRNRDLLPSRCRDY (trn_rdllp_src_rdy ), + .LL2TFCINIT1SEQ (ll2_tfc_init1_seq ), + .LL2TFCINIT2SEQ (ll2_tfc_init2_seq ), + .PL2SUSPENDOK (pl2_suspend_ok ), + .PL2RECOVERY (pl2_recovery ), + .PL2RXELECIDLE (pl2_rx_elec_idle ), + .PL2RXPMSTATE (pl2_rx_pm_state ), + .PL2L0REQ (pl2_l0_req ), + .LL2SUSPENDOK (ll2_suspend_ok ), + .LL2TXIDLE (ll2_tx_idle ), + .LL2LINKSTATUS (ll2_link_status ), + .TL2PPMSUSPENDOK (tl2_ppm_suspend_ok ), + .TL2ASPMSUSPENDREQ (tl2_aspm_suspend_req ), + .TL2ASPMSUSPENDCREDITCHECKOK (tl2_aspm_suspend_credit_check_ok ), + .PL2LINKUP (pl2_link_up ), + .PL2RECEIVERERR (pl2_receiver_err ), + .LL2RECEIVERERR (ll2_receiver_err ), + .LL2PROTOCOLERR (ll2_protocol_err ), + .LL2BADTLPERR (ll2_bad_tlp_err ), + .LL2BADDLLPERR (ll2_bad_dllp_err ), + .LL2REPLAYROERR (ll2_replay_ro_err ), + .LL2REPLAYTOERR (ll2_replay_to_err ), + .TL2ERRHDR (tl2_err_hdr ), + .TL2ERRMALFORMED (tl2_err_malformed ), + .TL2ERRRXOVERFLOW (tl2_err_rxoverflow ), + .TL2ERRFCPE (tl2_err_fcpe ), + .PLSELLNKRATE (pl_sel_lnk_rate ), + .PLSELLNKWIDTH (pl_sel_lnk_width ), + .PLLTSSMSTATE (pl_ltssm_state ), + .PLLANEREVERSALMODE (pl_lane_reversal_mode ), + .PLPHYLNKUPN (pl_phy_lnk_up_n ), + .PLTXPMSTATE (pl_tx_pm_state ), + .PLRXPMSTATE (pl_rx_pm_state ), + .PLLINKUPCFGCAP (pl_link_upcfg_cap ), + .PLLINKGEN2CAP (pl_link_gen2_cap ), + .PLLINKPARTNERGEN2SUPPORTED (pl_link_partner_gen2_supported ), + .PLINITIALLINKWIDTH (pl_initial_link_width ), + .PLDIRECTEDCHANGEDONE (pl_directed_change_done ), + .PIPETXRCVRDET (pipe_tx_rcvr_det ), + .PIPETXRESET (pipe_tx_reset ), + .PIPETXRATE (pipe_tx_rate ), + .PIPETXDEEMPH (pipe_tx_deemph ), + .PIPETXMARGIN (pipe_tx_margin ), + .PIPERX0POLARITY (pipe_rx0_polarity ), + .PIPERX1POLARITY (pipe_rx1_polarity ), + .PIPERX2POLARITY (pipe_rx2_polarity ), + .PIPERX3POLARITY (pipe_rx3_polarity ), + .PIPERX4POLARITY (pipe_rx4_polarity ), + .PIPERX5POLARITY (pipe_rx5_polarity ), + .PIPERX6POLARITY (pipe_rx6_polarity ), + .PIPERX7POLARITY (pipe_rx7_polarity ), + .PIPETX0COMPLIANCE (pipe_tx0_compliance ), + .PIPETX1COMPLIANCE (pipe_tx1_compliance ), + .PIPETX2COMPLIANCE (pipe_tx2_compliance ), + .PIPETX3COMPLIANCE (pipe_tx3_compliance ), + .PIPETX4COMPLIANCE (pipe_tx4_compliance ), + .PIPETX5COMPLIANCE (pipe_tx5_compliance ), + .PIPETX6COMPLIANCE (pipe_tx6_compliance ), + .PIPETX7COMPLIANCE (pipe_tx7_compliance ), + .PIPETX0CHARISK (pipe_tx0_char_is_k ), + .PIPETX1CHARISK (pipe_tx1_char_is_k ), + .PIPETX2CHARISK (pipe_tx2_char_is_k ), + .PIPETX3CHARISK (pipe_tx3_char_is_k ), + .PIPETX4CHARISK (pipe_tx4_char_is_k ), + .PIPETX5CHARISK (pipe_tx5_char_is_k ), + .PIPETX6CHARISK (pipe_tx6_char_is_k ), + .PIPETX7CHARISK (pipe_tx7_char_is_k ), + .PIPETX0DATA (pipe_tx0_data ), + .PIPETX1DATA (pipe_tx1_data ), + .PIPETX2DATA (pipe_tx2_data ), + .PIPETX3DATA (pipe_tx3_data ), + .PIPETX4DATA (pipe_tx4_data ), + .PIPETX5DATA (pipe_tx5_data ), + .PIPETX6DATA (pipe_tx6_data ), + .PIPETX7DATA (pipe_tx7_data ), + .PIPETX0ELECIDLE (pipe_tx0_elec_idle ), + .PIPETX1ELECIDLE (pipe_tx1_elec_idle ), + .PIPETX2ELECIDLE (pipe_tx2_elec_idle ), + .PIPETX3ELECIDLE (pipe_tx3_elec_idle ), + .PIPETX4ELECIDLE (pipe_tx4_elec_idle ), + .PIPETX5ELECIDLE (pipe_tx5_elec_idle ), + .PIPETX6ELECIDLE (pipe_tx6_elec_idle ), + .PIPETX7ELECIDLE (pipe_tx7_elec_idle ), + .PIPETX0POWERDOWN (pipe_tx0_powerdown ), + .PIPETX1POWERDOWN (pipe_tx1_powerdown ), + .PIPETX2POWERDOWN (pipe_tx2_powerdown ), + .PIPETX3POWERDOWN (pipe_tx3_powerdown ), + .PIPETX4POWERDOWN (pipe_tx4_powerdown ), + .PIPETX5POWERDOWN (pipe_tx5_powerdown ), + .PIPETX6POWERDOWN (pipe_tx6_powerdown ), + .PIPETX7POWERDOWN (pipe_tx7_powerdown ), +`ifdef B_TESTMODE + .PMVOUT (pmv_out ), + .SCANOUT (scanout ), +`endif + .USERRSTN (user_rst_n ), + .PLRECEIVEDHOTRST (pl_received_hot_rst ), + .RECEIVEDFUNCLVLRSTN (received_func_lvl_rst_n ), + .LNKCLKEN (lnk_clk_en ), + .CFGMGMTDO (cfg_mgmt_do ), + .CFGMGMTRDWRDONEN (cfg_mgmt_rd_wr_done_n ), + .CFGERRAERHEADERLOGSETN (cfg_err_aer_headerlog_set_n ), + .CFGERRCPLRDYN (cfg_err_cpl_rdy_n ), + .CFGINTERRUPTRDYN (cfg_interrupt_rdy_n ), + .CFGINTERRUPTMMENABLE (cfg_interrupt_mmenable ), + .CFGINTERRUPTMSIENABLE (cfg_interrupt_msienable ), + .CFGINTERRUPTDO (cfg_interrupt_do ), + .CFGINTERRUPTMSIXENABLE (cfg_interrupt_msixenable ), + .CFGINTERRUPTMSIXFM (cfg_interrupt_msixfm ), + .CFGMSGRECEIVED (cfg_msg_received ), + .CFGMSGDATA (cfg_msg_data ), + .CFGMSGRECEIVEDERRCOR (cfg_msg_received_err_cor ), + .CFGMSGRECEIVEDERRNONFATAL (cfg_msg_received_err_non_fatal ), + .CFGMSGRECEIVEDERRFATAL (cfg_msg_received_err_fatal ), + .CFGMSGRECEIVEDASSERTINTA (cfg_msg_received_assert_int_a ), + .CFGMSGRECEIVEDDEASSERTINTA (cfg_msg_received_deassert_int_a ), + .CFGMSGRECEIVEDASSERTINTB (cfg_msg_received_assert_int_b ), + .CFGMSGRECEIVEDDEASSERTINTB (cfg_msg_received_deassert_int_b ), + .CFGMSGRECEIVEDASSERTINTC (cfg_msg_received_assert_int_c ), + .CFGMSGRECEIVEDDEASSERTINTC (cfg_msg_received_deassert_int_c ), + .CFGMSGRECEIVEDASSERTINTD (cfg_msg_received_assert_int_d ), + .CFGMSGRECEIVEDDEASSERTINTD (cfg_msg_received_deassert_int_d ), + .CFGMSGRECEIVEDPMPME (cfg_msg_received_pm_pme ), + .CFGMSGRECEIVEDPMETOACK (cfg_msg_received_pme_to_ack ), + .CFGMSGRECEIVEDPMETO (cfg_msg_received_pme_to ), + .CFGMSGRECEIVEDSETSLOTPOWERLIMIT (cfg_msg_received_setslotpowerlimit ), + .CFGMSGRECEIVEDUNLOCK (cfg_msg_received_unlock ), + .CFGMSGRECEIVEDPMASNAK (cfg_msg_received_pm_as_nak ), + .CFGPCIELINKSTATE (cfg_pcie_link_state ), + .CFGPMRCVASREQL1N (cfg_pm_rcv_as_req_l1_n ), + .CFGPMRCVREQACKN (cfg_pm_rcv_req_ack_n ), + .CFGPMRCVENTERL1N (cfg_pm_rcv_enter_l1_n ), + .CFGPMRCVENTERL23N (cfg_pm_rcv_enter_l23_n ), + .CFGPMCSRPOWERSTATE (cfg_pmcsr_powerstate ), + .CFGPMCSRPMEEN (cfg_pmcsr_pme_en ), + .CFGPMCSRPMESTATUS (cfg_pmcsr_pme_status ), + .CFGTRANSACTION (cfg_transaction ), + .CFGTRANSACTIONTYPE (cfg_transaction_type ), + .CFGTRANSACTIONADDR (cfg_transaction_addr ), + .CFGCOMMANDIOENABLE (cfg_command_io_enable ), + .CFGCOMMANDMEMENABLE (cfg_command_mem_enable ), + .CFGCOMMANDBUSMASTERENABLE (cfg_command_bus_master_enable ), + .CFGCOMMANDINTERRUPTDISABLE (cfg_command_interrupt_disable ), + .CFGCOMMANDSERREN (cfg_command_serr_en ), + .CFGBRIDGESERREN (cfg_bridge_serr_en ), + .CFGDEVSTATUSCORRERRDETECTED (cfg_dev_status_corr_err_detected ), + .CFGDEVSTATUSNONFATALERRDETECTED (cfg_dev_status_non_fatal_err_detected ), + .CFGDEVSTATUSFATALERRDETECTED (cfg_dev_status_fatal_err_detected ), + .CFGDEVSTATUSURDETECTED (cfg_dev_status_ur_detected ), + .CFGDEVCONTROLCORRERRREPORTINGEN (cfg_dev_control_corr_err_reporting_en ), + .CFGDEVCONTROLNONFATALREPORTINGEN (cfg_dev_control_non_fatal_reporting_en ), + .CFGDEVCONTROLFATALERRREPORTINGEN (cfg_dev_control_fatal_err_reporting_en ), + .CFGDEVCONTROLURERRREPORTINGEN (cfg_dev_control_ur_err_reporting_en ), + .CFGDEVCONTROLENABLERO (cfg_dev_control_enable_ro ), + .CFGDEVCONTROLMAXPAYLOAD (cfg_dev_control_max_payload ), + .CFGDEVCONTROLEXTTAGEN (cfg_dev_control_ext_tag_en ), + .CFGDEVCONTROLPHANTOMEN (cfg_dev_control_phantom_en ), + .CFGDEVCONTROLAUXPOWEREN (cfg_dev_control_aux_power_en ), + .CFGDEVCONTROLNOSNOOPEN (cfg_dev_control_no_snoop_en ), + .CFGDEVCONTROLMAXREADREQ (cfg_dev_control_max_read_req ), + .CFGLINKSTATUSCURRENTSPEED (cfg_link_status_current_speed ), + .CFGLINKSTATUSNEGOTIATEDWIDTH (cfg_link_status_negotiated_width ), + .CFGLINKSTATUSLINKTRAINING (cfg_link_status_link_training ), + .CFGLINKSTATUSDLLACTIVE (cfg_link_status_dll_active ), + .CFGLINKSTATUSBANDWIDTHSTATUS (cfg_link_status_bandwidth_status ), + .CFGLINKSTATUSAUTOBANDWIDTHSTATUS (cfg_link_status_auto_bandwidth_status ), + .CFGLINKCONTROLASPMCONTROL (cfg_link_control_aspm_control ), + .CFGLINKCONTROLRCB (cfg_link_control_rcb ), + .CFGLINKCONTROLLINKDISABLE (cfg_link_control_link_disable ), + .CFGLINKCONTROLRETRAINLINK (cfg_link_control_retrain_link ), + .CFGLINKCONTROLCOMMONCLOCK (cfg_link_control_common_clock ), + .CFGLINKCONTROLEXTENDEDSYNC (cfg_link_control_extended_sync ), + .CFGLINKCONTROLCLOCKPMEN (cfg_link_control_clock_pm_en ), + .CFGLINKCONTROLHWAUTOWIDTHDIS (cfg_link_control_hw_auto_width_dis ), + .CFGLINKCONTROLBANDWIDTHINTEN (cfg_link_control_bandwidth_int_en ), + .CFGLINKCONTROLAUTOBANDWIDTHINTEN (cfg_link_control_auto_bandwidth_int_en ), + .CFGDEVCONTROL2CPLTIMEOUTVAL (cfg_dev_control2_cpl_timeout_val ), + .CFGDEVCONTROL2CPLTIMEOUTDIS (cfg_dev_control2_cpl_timeout_dis ), + .CFGDEVCONTROL2ARIFORWARDEN (cfg_dev_control2_ari_forward_en ), + .CFGDEVCONTROL2ATOMICREQUESTEREN (cfg_dev_control2_atomic_requester_en ), + .CFGDEVCONTROL2ATOMICEGRESSBLOCK (cfg_dev_control2_atomic_egress_block ), + .CFGDEVCONTROL2IDOREQEN (cfg_dev_control2_ido_req_en ), + .CFGDEVCONTROL2IDOCPLEN (cfg_dev_control2_ido_cpl_en ), + .CFGDEVCONTROL2LTREN (cfg_dev_control2_ltr_en ), + .CFGDEVCONTROL2TLPPREFIXBLOCK (cfg_dev_control2_tlp_prefix_block ), + .CFGSLOTCONTROLELECTROMECHILCTLPULSE (cfg_slot_control_electromech_il_ctl_pulse ), + .CFGROOTCONTROLSYSERRCORRERREN (cfg_root_control_syserr_corr_err_en ), + .CFGROOTCONTROLSYSERRNONFATALERREN (cfg_root_control_syserr_non_fatal_err_en ), + .CFGROOTCONTROLSYSERRFATALERREN (cfg_root_control_syserr_fatal_err_en ), + .CFGROOTCONTROLPMEINTEN (cfg_root_control_pme_int_en ), + .CFGAERECRCCHECKEN (cfg_aer_ecrc_check_en ), + .CFGAERECRCGENEN (cfg_aer_ecrc_gen_en ), + .CFGAERROOTERRCORRERRREPORTINGEN (cfg_aer_rooterr_corr_err_reporting_en ), + .CFGAERROOTERRNONFATALERRREPORTINGEN (cfg_aer_rooterr_non_fatal_err_reporting_en ), + .CFGAERROOTERRFATALERRREPORTINGEN (cfg_aer_rooterr_fatal_err_reporting_en ), + .CFGAERROOTERRCORRERRRECEIVED (cfg_aer_rooterr_corr_err_received ), + .CFGAERROOTERRNONFATALERRRECEIVED (cfg_aer_rooterr_non_fatal_err_received ), + .CFGAERROOTERRFATALERRRECEIVED (cfg_aer_rooterr_fatal_err_received ), + .CFGVCTCVCMAP (cfg_vc_tcvc_map ), + .DRPRDY (drp_rdy ), + .DRPDO (drp_do ), + //.DRPWRITEEN (drp_write_en ), + //.DRPWRITEPORT0 (drp_write_port_0 ), + //.DRPWRITEPORT1 (drp_write_port_1 ), + //.DRPWRITEPORT2 (drp_write_port_2 ), + //.DRPWRITEPORT3 (drp_write_port_3 ), + //.DRPWRITEPORT4 (drp_write_port_4 ), + //.DRPWRITEPORT5 (drp_write_port_5 ), + //.DRPWRITEPORT6 (drp_write_port_6 ), + //.DRPWRITEPORT7 (drp_write_port_7 ), + //.DRPWRITEPORT8 (drp_write_port_8 ), + //.DRPWRITEPORT9 (drp_write_port_9 ), + //.DRPWRITEPORT10 (drp_write_port_10 ), + //.DRPWRITEPORT11 (drp_write_port_11 ), + //.DRPWRITEPORT12 (drp_write_port_12 ), + //.DRPREADADDR (drp_read_addr ), + .DBGVECA (dbg_vec_a ), + .DBGVECB (dbg_vec_b ), + .DBGVECC (dbg_vec_c ), + .DBGSCLRA (dbg_sclr_a ), + .DBGSCLRB (dbg_sclr_b ), + .DBGSCLRC (dbg_sclr_c ), + .DBGSCLRD (dbg_sclr_d ), + .DBGSCLRE (dbg_sclr_e ), + .DBGSCLRF (dbg_sclr_f ), + .DBGSCLRG (dbg_sclr_g ), + .DBGSCLRH (dbg_sclr_h ), + .DBGSCLRI (dbg_sclr_i ), + .DBGSCLRJ (dbg_sclr_j ), + .DBGSCLRK (dbg_sclr_k ), + .PLDBGVEC (pl_dbg_vec ) + //.XILUNCONNOUT (xil_unconn_out ) + ); + + + + +endmodule + +`endif // PCIE_2LM diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_bram_7x.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_bram_7x.v new file mode 100644 index 0000000000000000000000000000000000000000..58741298e45f115bfdd0a645237d15426b0b229e --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_bram_7x.v @@ -0,0 +1,212 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_bram_7x.v +// Version : 3.3 +// Description : single bram wrapper for the mb pcie block +// The bram A port is the write port +// the B port is the read port +// +// +//-----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_bram_7x + #( + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1, // PCIe Link Speed : 1 - 2.5 GT/s; 2 - 5.0 GT/s + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08, // PCIe Link Width : 1 / 2 / 4 / 8 + parameter IMPL_TARGET = "HARD", // the implementation target : HARD, SOFT + parameter DOB_REG = 0, // 1 - use the output register; + // 0 - don't use the output register + parameter WIDTH = 0 // supported WIDTH's : 4, 9, 18, 36 - uses RAMB36 + // 72 - uses RAMB36SDP + ) + ( + input user_clk_i,// user clock + input reset_i, // bram reset + + input wen_i, // write enable + input [12:0] waddr_i, // write address + input [WIDTH - 1:0] wdata_i, // write data + + input ren_i, // read enable + input rce_i, // output register clock enable + input [12:0] raddr_i, // read address + + output [WIDTH - 1:0] rdata_o // read data + ); + + // map the address bits + localparam ADDR_MSB = ((WIDTH == 4) ? 12 : + (WIDTH == 9) ? 11 : + (WIDTH == 18) ? 10 : + (WIDTH == 36) ? 9 : + 8 + ); + + // set the width of the tied off low address bits + localparam ADDR_LO_BITS = ((WIDTH == 4) ? 2 : + (WIDTH == 9) ? 3 : + (WIDTH == 18) ? 4 : + (WIDTH == 36) ? 5 : + 0 // for WIDTH 72 use RAMB36SDP + ); + + // map the data bits + localparam D_MSB = ((WIDTH == 4) ? 3 : + (WIDTH == 9) ? 7 : + (WIDTH == 18) ? 15 : + (WIDTH == 36) ? 31 : + 63 + ); + + // map the data parity bits + localparam DP_LSB = D_MSB + 1; + + localparam DP_MSB = ((WIDTH == 4) ? 4 : + (WIDTH == 9) ? 8 : + (WIDTH == 18) ? 17 : + (WIDTH == 36) ? 35 : + 71 + ); + + localparam DPW = DP_MSB - DP_LSB + 1; + localparam WRITE_MODE = ((WIDTH == 72) && (!((LINK_CAP_MAX_LINK_SPEED == 4'h2) && (LINK_CAP_MAX_LINK_WIDTH == 6'h08)))) ? "WRITE_FIRST" : + ((LINK_CAP_MAX_LINK_SPEED == 4'h2) && (LINK_CAP_MAX_LINK_WIDTH == 6'h08)) ? "WRITE_FIRST" : "NO_CHANGE"; + + localparam DEVICE = (IMPL_TARGET == "HARD") ? "7SERIES" : "VIRTEX6"; + localparam BRAM_SIZE = "36Kb"; + + localparam WE_WIDTH =(DEVICE == "VIRTEX5" || DEVICE == "VIRTEX6" || DEVICE == "7SERIES") ? + ((WIDTH <= 9) ? 1 : + (WIDTH > 9 && WIDTH <= 18) ? 2 : + (WIDTH > 18 && WIDTH <= 36) ? 4 : + (WIDTH > 36 && WIDTH <= 72) ? 8 : + (BRAM_SIZE == "18Kb") ? 4 : 8 ) : 8; + + //synthesis translate_off + initial begin + //$display("[%t] %m DOB_REG %0d WIDTH %0d ADDR_MSB %0d ADDR_LO_BITS %0d DP_MSB %0d DP_LSB %0d D_MSB %0d", + // $time, DOB_REG, WIDTH, ADDR_MSB, ADDR_LO_BITS, DP_MSB, DP_LSB, D_MSB); + + case (WIDTH) + 4,9,18,36,72:; + default: + begin + $display("[%t] %m Error WIDTH %0d not supported", $time, WIDTH); + $finish; + end + endcase // case (WIDTH) + end + //synthesis translate_on + + generate + if ((LINK_CAP_MAX_LINK_WIDTH == 6'h08 && LINK_CAP_MAX_LINK_SPEED == 4'h2) || (WIDTH == 72)) begin : use_sdp + BRAM_SDP_MACRO #( + .DEVICE (DEVICE), + .BRAM_SIZE (BRAM_SIZE), + .DO_REG (DOB_REG), + .READ_WIDTH (WIDTH), + .WRITE_WIDTH (WIDTH), + .WRITE_MODE (WRITE_MODE) + ) + ramb36sdp( + .DO (rdata_o[WIDTH-1:0]), + .DI (wdata_i[WIDTH-1:0]), + .RDADDR (raddr_i[ADDR_MSB:0]), + .RDCLK (user_clk_i), + .RDEN (ren_i), + .REGCE (rce_i), + .RST (reset_i), + .WE ({WE_WIDTH{1'b1}}), + .WRADDR (waddr_i[ADDR_MSB:0]), + .WRCLK (user_clk_i), + .WREN (wen_i) + ); + + end // block: use_sdp + else if (WIDTH <= 36) begin : use_tdp + // use RAMB36's if the width is 4, 9, 18, or 36 + BRAM_TDP_MACRO #( + .DEVICE (DEVICE), + .BRAM_SIZE (BRAM_SIZE), + .DOA_REG (0), + .DOB_REG (DOB_REG), + .READ_WIDTH_A (WIDTH), + .READ_WIDTH_B (WIDTH), + .WRITE_WIDTH_A (WIDTH), + .WRITE_WIDTH_B (WIDTH), + .WRITE_MODE_A (WRITE_MODE) + ) + ramb36( + .DOA (), + .DOB (rdata_o[WIDTH-1:0]), + .ADDRA (waddr_i[ADDR_MSB:0]), + .ADDRB (raddr_i[ADDR_MSB:0]), + .CLKA (user_clk_i), + .CLKB (user_clk_i), + .DIA (wdata_i[WIDTH-1:0]), + .DIB ({WIDTH{1'b0}}), + .ENA (wen_i), + .ENB (ren_i), + .REGCEA (1'b0), + .REGCEB (rce_i), + .RSTA (reset_i), + .RSTB (reset_i), + .WEA ({WE_WIDTH{1'b1}}), + .WEB ({WE_WIDTH{1'b0}}) + ); + end // block: use_tdp + endgenerate + +endmodule // pcie_bram_7x + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_bram_top_7x.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_bram_top_7x.v new file mode 100644 index 0000000000000000000000000000000000000000..9d87c1e7d82b82880c5b8cdf74bc1a5400f162b0 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_bram_top_7x.v @@ -0,0 +1,184 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_bram_top_7x.v +// Version : 3.3 +// Description : bram wrapper for Tx and Rx +// given the pcie block attributes calculate the number of brams +// and pipeline stages and instantiate the brams +// +// Hierarchy: +// pcie_bram_top top level +// pcie_brams pcie_bram instantiations, +// pipeline stages (if any), +// address decode logic (if any), +// datapath muxing (if any) +// pcie_bram bram library cell wrapper +// the pcie_bram module can have a paramter that +// specifies the family (V6, V5, V4) +// +//----------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_bram_top_7x +#( + parameter IMPL_TARGET = "HARD", // the implementation target : HARD, SOFT + parameter DEV_CAP_MAX_PAYLOAD_SUPPORTED = 0, // MPS Supported : 0 - 128 B, 1 - 256 B, 2 - 512 B, 3 - 1024 B + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1, // PCIe Link Speed : 1 - 2.5 GT/s; 2 - 5.0 GT/s + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08, // PCIe Link Width : 1 / 2 / 4 / 8 + + parameter VC0_TX_LASTPACKET = 31, // Number of Packets in Transmit + parameter TLM_TX_OVERHEAD = 24, // Overhead Bytes for Packets (Transmit) + parameter TL_TX_RAM_RADDR_LATENCY = 1, // BRAM Read Address Latency (Transmit) + parameter TL_TX_RAM_RDATA_LATENCY = 2, // BRAM Read Data Latency (Transmit) + parameter TL_TX_RAM_WRITE_LATENCY = 1, // BRAM Write Latency (Transmit) + + parameter VC0_RX_RAM_LIMIT = 'h1FFF, // RAM Size (Receive) + parameter TL_RX_RAM_RADDR_LATENCY = 1, // BRAM Read Address Latency (Receive) + parameter TL_RX_RAM_RDATA_LATENCY = 2, // BRAM Read Data Latency (Receive) + parameter TL_RX_RAM_WRITE_LATENCY = 1 // BRAM Write Latency (Receive) +) +( + input user_clk_i, // Clock input + input reset_i, // Reset input + + input mim_tx_wen, // Write Enable for Transmit path BRAM + input [12:0] mim_tx_waddr, // Write Address for Transmit path BRAM + input [71:0] mim_tx_wdata, // Write Data for Transmit path BRAM + input mim_tx_ren, // Read Enable for Transmit path BRAM + input mim_tx_rce, // Read Output Register Clock Enable for Transmit path BRAM + input [12:0] mim_tx_raddr, // Read Address for Transmit path BRAM + output [71:0] mim_tx_rdata, // Read Data for Transmit path BRAM + + input mim_rx_wen, // Write Enable for Receive path BRAM + input [12:0] mim_rx_waddr, // Write Enable for Receive path BRAM + input [71:0] mim_rx_wdata, // Write Enable for Receive path BRAM + input mim_rx_ren, // Read Enable for Receive path BRAM + input mim_rx_rce, // Read Output Register Clock Enable for Receive path BRAM + input [12:0] mim_rx_raddr, // Read Address for Receive path BRAM + output [71:0] mim_rx_rdata // Read Data for Receive path BRAM +); + + // TX calculations + localparam MPS_BYTES = ((DEV_CAP_MAX_PAYLOAD_SUPPORTED == 0) ? 128 : + (DEV_CAP_MAX_PAYLOAD_SUPPORTED == 1) ? 256 : + (DEV_CAP_MAX_PAYLOAD_SUPPORTED == 2) ? 512 : + 1024 ); + + localparam BYTES_TX = (VC0_TX_LASTPACKET + 1) * (MPS_BYTES + TLM_TX_OVERHEAD); + + localparam ROWS_TX = 1; + localparam COLS_TX = ((BYTES_TX <= 4096) ? 1 : + (BYTES_TX <= 8192) ? 2 : + (BYTES_TX <= 16384) ? 4 : + (BYTES_TX <= 32768) ? 8 : + 18 + ); + + // RX calculations + localparam ROWS_RX = 1; + + localparam COLS_RX = ((VC0_RX_RAM_LIMIT < 'h0200) ? 1 : + (VC0_RX_RAM_LIMIT < 'h0400) ? 2 : + (VC0_RX_RAM_LIMIT < 'h0800) ? 4 : + (VC0_RX_RAM_LIMIT < 'h1000) ? 8 : + 18 + ); + + initial begin + $display("[%t] %m ROWS_TX %0d COLS_TX %0d", $time, ROWS_TX, COLS_TX); + $display("[%t] %m ROWS_RX %0d COLS_RX %0d", $time, ROWS_RX, COLS_RX); + end + +pcie_7x_0_pcie_brams_7x #( + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .IMPL_TARGET ( IMPL_TARGET ), + .NUM_BRAMS ( COLS_TX ), + .RAM_RADDR_LATENCY ( TL_TX_RAM_RADDR_LATENCY ), + .RAM_RDATA_LATENCY ( TL_TX_RAM_RDATA_LATENCY ), + .RAM_WRITE_LATENCY ( TL_TX_RAM_WRITE_LATENCY ) + ) + pcie_brams_tx ( + .user_clk_i ( user_clk_i ), + .reset_i ( reset_i ), + .waddr ( mim_tx_waddr ), + .wen ( mim_tx_wen ), + .ren ( mim_tx_ren ), + .rce ( mim_tx_rce ), + .wdata ( mim_tx_wdata ), + .raddr ( mim_tx_raddr ), + .rdata ( mim_tx_rdata ) + ); + +pcie_7x_0_pcie_brams_7x #( + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .IMPL_TARGET ( IMPL_TARGET ), + .NUM_BRAMS ( COLS_RX ), + .RAM_RADDR_LATENCY ( TL_RX_RAM_RADDR_LATENCY ), + .RAM_RDATA_LATENCY ( TL_RX_RAM_RDATA_LATENCY ), + .RAM_WRITE_LATENCY ( TL_RX_RAM_WRITE_LATENCY ) + ) pcie_brams_rx ( + .user_clk_i ( user_clk_i ), + .reset_i ( reset_i ), + .waddr ( mim_rx_waddr ), + .wen ( mim_rx_wen ), + .ren ( mim_rx_ren ), + .rce ( mim_rx_rce ), + .wdata ( mim_rx_wdata ), + .raddr ( mim_rx_raddr ), + .rdata ( mim_rx_rdata ) + ); + +endmodule // pcie_bram_top + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_brams_7x.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_brams_7x.v new file mode 100644 index 0000000000000000000000000000000000000000..161b9b8e77cd23f3e6b1cbe610c72baecd099b14 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_brams_7x.v @@ -0,0 +1,296 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_brams_7x.v +// Version : 3.3 +// Description : pcie bram wrapper +// arrange and connect brams +// implement address decoding, datapath muxing and pipeline stages +// +// banks of brams are used for 1,2,4,8,18 brams +// brams are stacked for other values of NUM_BRAMS +// +//----------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_brams_7x +#( + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1, // PCIe Link Speed : 1 - 2.5 GT/s; 2 - 5.0 GT/s + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08, // PCIe Link Width : 1 / 2 / 4 / 8 + parameter IMPL_TARGET = "HARD", // the implementation target : HARD, SOFT + + // the number of BRAMs to use + // supported values are: + // 1,2,4,8,18 + parameter NUM_BRAMS = 0, + + // BRAM read address latency + // + // value meaning + // ==================================================== + // 0 BRAM read address port sample + // 1 BRAM read address port sample and a pipeline stage on the address port + parameter RAM_RADDR_LATENCY = 1, + + // BRAM read data latency + // + // value meaning + // ==================================================== + // 1 no BRAM OREG + // 2 use BRAM OREG + // 3 use BRAM OREG and a pipeline stage on the data port + parameter RAM_RDATA_LATENCY = 1, + + // BRAM write latency + // The BRAM write port is synchronous + // + // value meaning + // ==================================================== + // 0 BRAM write port sample + // 1 BRAM write port sample plus pipeline stage + parameter RAM_WRITE_LATENCY = 1, + parameter TCQ = 1 // synthesis warning removed: parameter declaration becomes local +) +( + input user_clk_i, + input reset_i, + + input wen, + input [12:0] waddr, + input [71:0] wdata, + input ren, + input rce, + input [12:0] raddr, + output [71:0] rdata + ); + + // turn on the bram output register + localparam DOB_REG = (RAM_RDATA_LATENCY > 1) ? 1 : 0; + + // calculate the data width of the individual brams + localparam [6:0] WIDTH = ((NUM_BRAMS == 1) ? 72 : + (NUM_BRAMS == 2) ? 36 : + (NUM_BRAMS == 4) ? 18 : + (NUM_BRAMS == 8) ? 9 : + 4 + ); + +// parameter TCQ = 1; + + wire wen_int; + wire [12:0] waddr_int; + wire [71:0] wdata_int; + + wire ren_int; + wire [12:0] raddr_int; + wire [71:0] rdata_int; + + //synthesis translate_off + initial + begin + $display("[%t] %m NUM_BRAMS %0d DOB_REG %0d WIDTH %0d RAM_WRITE_LATENCY %0d RAM_RADDR_LATENCY %0d RAM_RDATA_LATENCY %0d", + $time, NUM_BRAMS, DOB_REG, WIDTH, RAM_WRITE_LATENCY, RAM_RADDR_LATENCY, RAM_RDATA_LATENCY); + + case (NUM_BRAMS) + 1,2,4,8,18:; + default: + begin + $display("[%t] %m Error NUM_BRAMS %0d not supported", $time, NUM_BRAMS); + $finish; + end + endcase // case(NUM_BRAMS) + + case (RAM_RADDR_LATENCY) + 0,1:; + default: + begin + $display("[%t] %m Error RAM_READ_LATENCY %0d not supported", $time, RAM_RADDR_LATENCY); + $finish; + end + endcase // case (RAM_RADDR_LATENCY) + + case (RAM_RDATA_LATENCY) + 1,2,3:; + default: + begin + $display("[%t] %m Error RAM_READ_LATENCY %0d not supported", $time, RAM_RDATA_LATENCY); + $finish; + end + endcase // case (RAM_RDATA_LATENCY) + + case (RAM_WRITE_LATENCY) + 0,1:; + default: + begin + $display("[%t] %m Error RAM_WRITE_LATENCY %0d not supported", $time, RAM_WRITE_LATENCY); + $finish; + end + endcase // case(RAM_WRITE_LATENCY) + + end + //synthesis translate_on + + // model the delays for ram write latency + + generate if (RAM_WRITE_LATENCY == 1) begin : wr_lat_2 + reg wen_q; + reg [12:0] waddr_q; + reg [71:0] wdata_q; + + always @(posedge user_clk_i) begin + if (reset_i) + begin + wen_q <= #TCQ 1'b0; + waddr_q <= #TCQ 13'b0; + // Disable Reset on Data Path @ BRAM i/f as I/O come from PCIe HB. + // wdata_q <= #TCQ 72'b0; + end + else + begin + wen_q <= #TCQ wen; + waddr_q <= #TCQ waddr; + wdata_q <= #TCQ wdata; + end + end + + assign wen_int = wen_q; + assign waddr_int = waddr_q; + assign wdata_int = wdata_q; + end // if (RAM_WRITE_LATENCY == 1) + + else if (RAM_WRITE_LATENCY == 0) begin : wr_lat_1 + assign wen_int = wen; + assign waddr_int = waddr; + assign wdata_int = wdata; + end + endgenerate + + // model the delays for ram read latency + + generate if (RAM_RADDR_LATENCY == 1) begin : raddr_lat_2 + reg ren_q; + reg [12:0] raddr_q; + + always @(posedge user_clk_i) begin + if (reset_i) + begin + ren_q <= #TCQ 1'b0; + raddr_q <= #TCQ 13'b0; + end + else + begin + ren_q <= #TCQ ren; + raddr_q <= #TCQ raddr; + end // else: !if(reset_i) + end + + assign ren_int = ren_q; + assign raddr_int = raddr_q; + end // block: rd_lat_addr_2 + + else begin : raddr_lat_1 + assign ren_int = ren; + assign raddr_int = raddr; + end + endgenerate + + generate if (RAM_RDATA_LATENCY == 3) begin : rdata_lat_3 + reg [71:0] rdata_q; + + always @(posedge user_clk_i) begin + // Disable Reset on Data Path @ BRAM i/f as I/O come from PCIe HB. + //if (reset_i) + //begin + // rdata_q <= #TCQ 72'b0; + //end + //else + //begin + rdata_q <= #TCQ rdata_int; + //end // else: !if(reset_i) + end + + assign rdata = rdata_q; + + end // block: rd_lat_data_3 + + else begin : rdata_lat_1_2 + assign rdata = rdata_int; + end + endgenerate + + // instantiate the brams + generate + genvar ii; + for (ii = 0; ii < NUM_BRAMS; ii = ii + 1) begin : brams +pcie_7x_0_pcie_bram_7x #( + .LINK_CAP_MAX_LINK_WIDTH(LINK_CAP_MAX_LINK_WIDTH), + .LINK_CAP_MAX_LINK_SPEED(LINK_CAP_MAX_LINK_SPEED), + .IMPL_TARGET (IMPL_TARGET), + .DOB_REG (DOB_REG), + .WIDTH (WIDTH) + ) + ram ( + .user_clk_i(user_clk_i), + .reset_i(reset_i), + .wen_i(wen_int), + .waddr_i(waddr_int), + .wdata_i(wdata_int[(((ii + 1) * WIDTH) - 1): (ii * WIDTH)]), + .ren_i(ren_int), + .raddr_i(raddr_int), + .rdata_o(rdata_int[(((ii + 1) * WIDTH) - 1): (ii * WIDTH)]), + .rce_i(rce) + ); + end + endgenerate + +endmodule // pcie_brams_7x + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_pipe_lane.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_pipe_lane.v new file mode 100644 index 0000000000000000000000000000000000000000..5fb1db41640690abf8539a381daea90139d3c0dd --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_pipe_lane.v @@ -0,0 +1,328 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_pipe_lane.v +// Version : 3.3 +// +// Description: PIPE per lane module for 7-Series PCIe Block +// +// +// +//-------------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_pipe_lane # +( + parameter PIPE_PIPELINE_STAGES = 0, // 0 - 0 stages, 1 - 1 stage, 2 - 2 stages + parameter TCQ = 1 // synthesis warning solved : parameter declaration becomes local +) +( + output wire [ 1:0] pipe_rx_char_is_k_o , // Pipelined PIPE Rx Char Is K + output wire [15:0] pipe_rx_data_o , // Pipelined PIPE Rx Data + output wire pipe_rx_valid_o , // Pipelined PIPE Rx Data Valid + output wire pipe_rx_chanisaligned_o , // Pipelined PIPE Rx Chan Is Aligned + output wire [ 2:0] pipe_rx_status_o , // Pipelined PIPE Rx Status + output wire pipe_rx_phy_status_o , // Pipelined PIPE Rx Phy Status + output wire pipe_rx_elec_idle_o , // Pipelined PIPE Rx Electrical Idle + input wire pipe_rx_polarity_i , // PIPE Rx Polarity + input wire pipe_tx_compliance_i , // PIPE Tx Compliance + input wire [ 1:0] pipe_tx_char_is_k_i , // PIPE Tx Char Is K + input wire [15:0] pipe_tx_data_i , // PIPE Tx Data + input wire pipe_tx_elec_idle_i , // PIPE Tx Electrical Idle + input wire [ 1:0] pipe_tx_powerdown_i , // PIPE Tx Powerdown + + input wire [ 1:0] pipe_rx_char_is_k_i , // PIPE Rx Char Is K + input wire [15:0] pipe_rx_data_i , // PIPE Rx Data + input wire pipe_rx_valid_i , // PIPE Rx Data Valid + input wire pipe_rx_chanisaligned_i , // PIPE Rx Chan Is Aligned + input wire [ 2:0] pipe_rx_status_i , // PIPE Rx Status + input wire pipe_rx_phy_status_i , // PIPE Rx Phy Status + input wire pipe_rx_elec_idle_i , // PIPE Rx Electrical Idle + output wire pipe_rx_polarity_o , // Pipelined PIPE Rx Polarity + output wire pipe_tx_compliance_o , // Pipelined PIPE Tx Compliance + output wire [ 1:0] pipe_tx_char_is_k_o , // Pipelined PIPE Tx Char Is K + output wire [15:0] pipe_tx_data_o , // Pipelined PIPE Tx Data + output wire pipe_tx_elec_idle_o , // Pipelined PIPE Tx Electrical Idle + output wire [ 1:0] pipe_tx_powerdown_o , // Pipelined PIPE Tx Powerdown + + input wire pipe_clk , // PIPE Clock + input wire rst_n // Reset +); + + //******************************************************************// + // Reality check. // + //******************************************************************// + +// parameter TCQ = 1; // clock to out delay model + + generate + + if (PIPE_PIPELINE_STAGES == 0) begin : pipe_stages_0 + + assign pipe_rx_char_is_k_o = pipe_rx_char_is_k_i; + assign pipe_rx_data_o = pipe_rx_data_i; + assign pipe_rx_valid_o = pipe_rx_valid_i; + assign pipe_rx_chanisaligned_o = pipe_rx_chanisaligned_i; + assign pipe_rx_status_o = pipe_rx_status_i; + assign pipe_rx_phy_status_o = pipe_rx_phy_status_i; + assign pipe_rx_elec_idle_o = pipe_rx_elec_idle_i; + + assign pipe_rx_polarity_o = pipe_rx_polarity_i; + assign pipe_tx_compliance_o = pipe_tx_compliance_i; + assign pipe_tx_char_is_k_o = pipe_tx_char_is_k_i; + assign pipe_tx_data_o = pipe_tx_data_i; + assign pipe_tx_elec_idle_o = pipe_tx_elec_idle_i; + assign pipe_tx_powerdown_o = pipe_tx_powerdown_i; + + end // if (PIPE_PIPELINE_STAGES == 0) + else if (PIPE_PIPELINE_STAGES == 1) begin : pipe_stages_1 + + reg [ 1:0] pipe_rx_char_is_k_q ; + reg [15:0] pipe_rx_data_q ; + reg pipe_rx_valid_q ; + reg pipe_rx_chanisaligned_q ; + reg [ 2:0] pipe_rx_status_q ; + reg pipe_rx_phy_status_q ; + reg pipe_rx_elec_idle_q ; + + reg pipe_rx_polarity_q ; + reg pipe_tx_compliance_q ; + reg [ 1:0] pipe_tx_char_is_k_q ; + reg [15:0] pipe_tx_data_q ; + reg pipe_tx_elec_idle_q ; + reg [ 1:0] pipe_tx_powerdown_q ; + + always @(posedge pipe_clk) begin + + if (rst_n) + begin + + pipe_rx_char_is_k_q <= #TCQ 0; + pipe_rx_data_q <= #TCQ 0; + pipe_rx_valid_q <= #TCQ 0; + pipe_rx_chanisaligned_q <= #TCQ 0; + pipe_rx_status_q <= #TCQ 0; + pipe_rx_phy_status_q <= #TCQ 0; + pipe_rx_elec_idle_q <= #TCQ 0; + + pipe_rx_polarity_q <= #TCQ 0; + pipe_tx_compliance_q <= #TCQ 0; + pipe_tx_char_is_k_q <= #TCQ 0; + pipe_tx_data_q <= #TCQ 0; + pipe_tx_elec_idle_q <= #TCQ 1'b1; + pipe_tx_powerdown_q <= #TCQ 2'b10; + + end + else + begin + + pipe_rx_char_is_k_q <= #TCQ pipe_rx_char_is_k_i; + pipe_rx_data_q <= #TCQ pipe_rx_data_i; + pipe_rx_valid_q <= #TCQ pipe_rx_valid_i; + pipe_rx_chanisaligned_q <= #TCQ pipe_rx_chanisaligned_i; + pipe_rx_status_q <= #TCQ pipe_rx_status_i; + pipe_rx_phy_status_q <= #TCQ pipe_rx_phy_status_i; + pipe_rx_elec_idle_q <= #TCQ pipe_rx_elec_idle_i; + + pipe_rx_polarity_q <= #TCQ pipe_rx_polarity_i; + pipe_tx_compliance_q <= #TCQ pipe_tx_compliance_i; + pipe_tx_char_is_k_q <= #TCQ pipe_tx_char_is_k_i; + pipe_tx_data_q <= #TCQ pipe_tx_data_i; + pipe_tx_elec_idle_q <= #TCQ pipe_tx_elec_idle_i; + pipe_tx_powerdown_q <= #TCQ pipe_tx_powerdown_i; + + end + + end + + assign pipe_rx_char_is_k_o = pipe_rx_char_is_k_q; + assign pipe_rx_data_o = pipe_rx_data_q; + assign pipe_rx_valid_o = pipe_rx_valid_q; + assign pipe_rx_chanisaligned_o = pipe_rx_chanisaligned_q; + assign pipe_rx_status_o = pipe_rx_status_q; + assign pipe_rx_phy_status_o = pipe_rx_phy_status_q; + assign pipe_rx_elec_idle_o = pipe_rx_elec_idle_q; + + assign pipe_rx_polarity_o = pipe_rx_polarity_q; + assign pipe_tx_compliance_o = pipe_tx_compliance_q; + assign pipe_tx_char_is_k_o = pipe_tx_char_is_k_q; + assign pipe_tx_data_o = pipe_tx_data_q; + assign pipe_tx_elec_idle_o = pipe_tx_elec_idle_q; + assign pipe_tx_powerdown_o = pipe_tx_powerdown_q; + + end // if (PIPE_PIPELINE_STAGES == 1) + else if (PIPE_PIPELINE_STAGES == 2) begin : pipe_stages_2 + + reg [ 1:0] pipe_rx_char_is_k_q ; + reg [15:0] pipe_rx_data_q ; + reg pipe_rx_valid_q ; + reg pipe_rx_chanisaligned_q ; + reg [ 2:0] pipe_rx_status_q ; + reg pipe_rx_phy_status_q ; + reg pipe_rx_elec_idle_q ; + + reg pipe_rx_polarity_q ; + reg pipe_tx_compliance_q ; + reg [ 1:0] pipe_tx_char_is_k_q ; + reg [15:0] pipe_tx_data_q ; + reg pipe_tx_elec_idle_q ; + reg [ 1:0] pipe_tx_powerdown_q ; + + reg [ 1:0] pipe_rx_char_is_k_qq ; + reg [15:0] pipe_rx_data_qq ; + reg pipe_rx_valid_qq ; + reg pipe_rx_chanisaligned_qq; + reg [ 2:0] pipe_rx_status_qq ; + reg pipe_rx_phy_status_qq ; + reg pipe_rx_elec_idle_qq ; + + reg pipe_rx_polarity_qq ; + reg pipe_tx_compliance_qq ; + reg [ 1:0] pipe_tx_char_is_k_qq ; + reg [15:0] pipe_tx_data_qq ; + reg pipe_tx_elec_idle_qq ; + reg [ 1:0] pipe_tx_powerdown_qq ; + + always @(posedge pipe_clk) begin + + if (rst_n) + begin + + pipe_rx_char_is_k_q <= #TCQ 0; + pipe_rx_data_q <= #TCQ 0; + pipe_rx_valid_q <= #TCQ 0; + pipe_rx_chanisaligned_q <= #TCQ 0; + pipe_rx_status_q <= #TCQ 0; + pipe_rx_phy_status_q <= #TCQ 0; + pipe_rx_elec_idle_q <= #TCQ 0; + + pipe_rx_polarity_q <= #TCQ 0; + pipe_tx_compliance_q <= #TCQ 0; + pipe_tx_char_is_k_q <= #TCQ 0; + pipe_tx_data_q <= #TCQ 0; + pipe_tx_elec_idle_q <= #TCQ 1'b1; + pipe_tx_powerdown_q <= #TCQ 2'b10; + + pipe_rx_char_is_k_qq <= #TCQ 0; + pipe_rx_data_qq <= #TCQ 0; + pipe_rx_valid_qq <= #TCQ 0; + pipe_rx_chanisaligned_qq <= #TCQ 0; + pipe_rx_status_qq <= #TCQ 0; + pipe_rx_phy_status_qq <= #TCQ 0; + pipe_rx_elec_idle_qq <= #TCQ 0; + + pipe_rx_polarity_qq <= #TCQ 0; + pipe_tx_compliance_qq <= #TCQ 0; + pipe_tx_char_is_k_qq <= #TCQ 0; + pipe_tx_data_qq <= #TCQ 0; + pipe_tx_elec_idle_qq <= #TCQ 1'b1; + pipe_tx_powerdown_qq <= #TCQ 2'b10; + + end + else + begin + + pipe_rx_char_is_k_q <= #TCQ pipe_rx_char_is_k_i; + pipe_rx_data_q <= #TCQ pipe_rx_data_i; + pipe_rx_valid_q <= #TCQ pipe_rx_valid_i; + pipe_rx_chanisaligned_q <= #TCQ pipe_rx_chanisaligned_i; + pipe_rx_status_q <= #TCQ pipe_rx_status_i; + pipe_rx_phy_status_q <= #TCQ pipe_rx_phy_status_i; + pipe_rx_elec_idle_q <= #TCQ pipe_rx_elec_idle_i; + + pipe_rx_polarity_q <= #TCQ pipe_rx_polarity_i; + pipe_tx_compliance_q <= #TCQ pipe_tx_compliance_i; + pipe_tx_char_is_k_q <= #TCQ pipe_tx_char_is_k_i; + pipe_tx_data_q <= #TCQ pipe_tx_data_i; + pipe_tx_elec_idle_q <= #TCQ pipe_tx_elec_idle_i; + pipe_tx_powerdown_q <= #TCQ pipe_tx_powerdown_i; + + pipe_rx_char_is_k_qq <= #TCQ pipe_rx_char_is_k_q; + pipe_rx_data_qq <= #TCQ pipe_rx_data_q; + pipe_rx_valid_qq <= #TCQ pipe_rx_valid_q; + pipe_rx_chanisaligned_qq <= #TCQ pipe_rx_chanisaligned_q; + pipe_rx_status_qq <= #TCQ pipe_rx_status_q; + pipe_rx_phy_status_qq <= #TCQ pipe_rx_phy_status_q; + pipe_rx_elec_idle_qq <= #TCQ pipe_rx_elec_idle_q; + + pipe_rx_polarity_qq <= #TCQ pipe_rx_polarity_q; + pipe_tx_compliance_qq <= #TCQ pipe_tx_compliance_q; + pipe_tx_char_is_k_qq <= #TCQ pipe_tx_char_is_k_q; + pipe_tx_data_qq <= #TCQ pipe_tx_data_q; + pipe_tx_elec_idle_qq <= #TCQ pipe_tx_elec_idle_q; + pipe_tx_powerdown_qq <= #TCQ pipe_tx_powerdown_q; + + end + + end + + assign pipe_rx_char_is_k_o = pipe_rx_char_is_k_qq; + assign pipe_rx_data_o = pipe_rx_data_qq; + assign pipe_rx_valid_o = pipe_rx_valid_qq; + assign pipe_rx_chanisaligned_o = pipe_rx_chanisaligned_qq; + assign pipe_rx_status_o = pipe_rx_status_qq; + assign pipe_rx_phy_status_o = pipe_rx_phy_status_qq; + assign pipe_rx_elec_idle_o = pipe_rx_elec_idle_qq; + + assign pipe_rx_polarity_o = pipe_rx_polarity_qq; + assign pipe_tx_compliance_o = pipe_tx_compliance_qq; + assign pipe_tx_char_is_k_o = pipe_tx_char_is_k_qq; + assign pipe_tx_data_o = pipe_tx_data_qq; + assign pipe_tx_elec_idle_o = pipe_tx_elec_idle_qq; + assign pipe_tx_powerdown_o = pipe_tx_powerdown_qq; + + end // if (PIPE_PIPELINE_STAGES == 2) + + endgenerate + +endmodule + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_pipe_misc.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_pipe_misc.v new file mode 100644 index 0000000000000000000000000000000000000000..e48a1f05e99ea6fd819a23fe7b59adfb4bc6ea6a --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_pipe_misc.v @@ -0,0 +1,219 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_pipe_misc.v +// Version : 3.3 +// +// Description: Misc PIPE module for 7-Series PCIe Block +// +// +// +//-------------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_pipe_misc # +( + parameter PIPE_PIPELINE_STAGES = 0, // 0 - 0 stages, 1 - 1 stage, 2 - 2 stages + parameter TCQ = 1 // synthesis warning solved: parameter declaration becomes local +) +( + + input wire pipe_tx_rcvr_det_i , // PIPE Tx Receiver Detect + input wire pipe_tx_reset_i , // PIPE Tx Reset + input wire pipe_tx_rate_i , // PIPE Tx Rate + input wire pipe_tx_deemph_i , // PIPE Tx Deemphasis + input wire [2:0] pipe_tx_margin_i , // PIPE Tx Margin + input wire pipe_tx_swing_i , // PIPE Tx Swing + + output wire pipe_tx_rcvr_det_o , // Pipelined PIPE Tx Receiver Detect + output wire pipe_tx_reset_o , // Pipelined PIPE Tx Reset + output wire pipe_tx_rate_o , // Pipelined PIPE Tx Rate + output wire pipe_tx_deemph_o , // Pipelined PIPE Tx Deemphasis + output wire [2:0] pipe_tx_margin_o , // Pipelined PIPE Tx Margin + output wire pipe_tx_swing_o , // Pipelined PIPE Tx Swing + + input wire pipe_clk , // PIPE Clock + input wire rst_n // Reset +); + +//******************************************************************// +// Reality check. // +//******************************************************************// + +// parameter TCQ = 1; // clock to out delay model + + generate + + if (PIPE_PIPELINE_STAGES == 0) begin : pipe_stages_0 + + assign pipe_tx_rcvr_det_o = pipe_tx_rcvr_det_i; + assign pipe_tx_reset_o = pipe_tx_reset_i; + assign pipe_tx_rate_o = pipe_tx_rate_i; + assign pipe_tx_deemph_o = pipe_tx_deemph_i; + assign pipe_tx_margin_o = pipe_tx_margin_i; + assign pipe_tx_swing_o = pipe_tx_swing_i; + + end // if (PIPE_PIPELINE_STAGES == 0) + else if (PIPE_PIPELINE_STAGES == 1) begin : pipe_stages_1 + + reg pipe_tx_rcvr_det_q ; + reg pipe_tx_reset_q ; + reg pipe_tx_rate_q ; + reg pipe_tx_deemph_q ; + reg [2:0] pipe_tx_margin_q ; + reg pipe_tx_swing_q ; + + always @(posedge pipe_clk) begin + + if (rst_n) + begin + + pipe_tx_rcvr_det_q <= #TCQ 0; + pipe_tx_reset_q <= #TCQ 1'b1; + pipe_tx_rate_q <= #TCQ 0; + pipe_tx_deemph_q <= #TCQ 1'b1; + pipe_tx_margin_q <= #TCQ 0; + pipe_tx_swing_q <= #TCQ 0; + + end + else + begin + + pipe_tx_rcvr_det_q <= #TCQ pipe_tx_rcvr_det_i; + pipe_tx_reset_q <= #TCQ pipe_tx_reset_i; + pipe_tx_rate_q <= #TCQ pipe_tx_rate_i; + pipe_tx_deemph_q <= #TCQ pipe_tx_deemph_i; + pipe_tx_margin_q <= #TCQ pipe_tx_margin_i; + pipe_tx_swing_q <= #TCQ pipe_tx_swing_i; + + end + + end + + assign pipe_tx_rcvr_det_o = pipe_tx_rcvr_det_q; + assign pipe_tx_reset_o = pipe_tx_reset_q; + assign pipe_tx_rate_o = pipe_tx_rate_q; + assign pipe_tx_deemph_o = pipe_tx_deemph_q; + assign pipe_tx_margin_o = pipe_tx_margin_q; + assign pipe_tx_swing_o = pipe_tx_swing_q; + + end // if (PIPE_PIPELINE_STAGES == 1) + else if (PIPE_PIPELINE_STAGES == 2) begin : pipe_stages_2 + + reg pipe_tx_rcvr_det_q ; + reg pipe_tx_reset_q ; + reg pipe_tx_rate_q ; + reg pipe_tx_deemph_q ; + reg [2:0] pipe_tx_margin_q ; + reg pipe_tx_swing_q ; + + reg pipe_tx_rcvr_det_qq ; + reg pipe_tx_reset_qq ; + reg pipe_tx_rate_qq ; + reg pipe_tx_deemph_qq ; + reg [2:0] pipe_tx_margin_qq ; + reg pipe_tx_swing_qq ; + + always @(posedge pipe_clk) begin + + if (rst_n) + begin + + pipe_tx_rcvr_det_q <= #TCQ 0; + pipe_tx_reset_q <= #TCQ 1'b1; + pipe_tx_rate_q <= #TCQ 0; + pipe_tx_deemph_q <= #TCQ 1'b1; + pipe_tx_margin_q <= #TCQ 0; + pipe_tx_swing_q <= #TCQ 0; + + pipe_tx_rcvr_det_qq <= #TCQ 0; + pipe_tx_reset_qq <= #TCQ 1'b1; + pipe_tx_rate_qq <= #TCQ 0; + pipe_tx_deemph_qq <= #TCQ 1'b1; + pipe_tx_margin_qq <= #TCQ 0; + pipe_tx_swing_qq <= #TCQ 0; + + end + else + begin + + pipe_tx_rcvr_det_q <= #TCQ pipe_tx_rcvr_det_i; + pipe_tx_reset_q <= #TCQ pipe_tx_reset_i; + pipe_tx_rate_q <= #TCQ pipe_tx_rate_i; + pipe_tx_deemph_q <= #TCQ pipe_tx_deemph_i; + pipe_tx_margin_q <= #TCQ pipe_tx_margin_i; + pipe_tx_swing_q <= #TCQ pipe_tx_swing_i; + + pipe_tx_rcvr_det_qq <= #TCQ pipe_tx_rcvr_det_q; + pipe_tx_reset_qq <= #TCQ pipe_tx_reset_q; + pipe_tx_rate_qq <= #TCQ pipe_tx_rate_q; + pipe_tx_deemph_qq <= #TCQ pipe_tx_deemph_q; + pipe_tx_margin_qq <= #TCQ pipe_tx_margin_q; + pipe_tx_swing_qq <= #TCQ pipe_tx_swing_q; + + end + + end + + assign pipe_tx_rcvr_det_o = pipe_tx_rcvr_det_qq; + assign pipe_tx_reset_o = pipe_tx_reset_qq; + assign pipe_tx_rate_o = pipe_tx_rate_qq; + assign pipe_tx_deemph_o = pipe_tx_deemph_qq; + assign pipe_tx_margin_o = pipe_tx_margin_qq; + assign pipe_tx_swing_o = pipe_tx_swing_qq; + + end // if (PIPE_PIPELINE_STAGES == 2) + + endgenerate + +endmodule + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v new file mode 100644 index 0000000000000000000000000000000000000000..26294553bb3b20af6a8ea1197052b943f6bd0cce --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v @@ -0,0 +1,798 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_pipe_pipeline.v +// Version : 3.3 +// +// Description: PIPE module for Virtex7 PCIe Block +// +// +// +//-------------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_pipe_pipeline # +( + parameter LINK_CAP_MAX_LINK_WIDTH = 8, + parameter PIPE_PIPELINE_STAGES = 0 // 0 - 0 stages, 1 - 1 stage, 2 - 2 stages +) +( + // Pipe Per-Link Signals + input wire pipe_tx_rcvr_det_i , + input wire pipe_tx_reset_i , + input wire pipe_tx_rate_i , + input wire pipe_tx_deemph_i , + input wire [2:0] pipe_tx_margin_i , + input wire pipe_tx_swing_i , + + output wire pipe_tx_rcvr_det_o , + output wire pipe_tx_reset_o , + output wire pipe_tx_rate_o , + output wire pipe_tx_deemph_o , + output wire [2:0] pipe_tx_margin_o , + output wire pipe_tx_swing_o , + + // Pipe Per-Lane Signals - Lane 0 + output wire [ 1:0] pipe_rx0_char_is_k_o , + output wire [15:0] pipe_rx0_data_o , + output wire pipe_rx0_valid_o , + output wire pipe_rx0_chanisaligned_o , + output wire [ 2:0] pipe_rx0_status_o , + output wire pipe_rx0_phy_status_o , + output wire pipe_rx0_elec_idle_o , + input wire pipe_rx0_polarity_i , + input wire pipe_tx0_compliance_i , + input wire [ 1:0] pipe_tx0_char_is_k_i , + input wire [15:0] pipe_tx0_data_i , + input wire pipe_tx0_elec_idle_i , + input wire [ 1:0] pipe_tx0_powerdown_i , + + input wire [ 1:0] pipe_rx0_char_is_k_i , + input wire [15:0] pipe_rx0_data_i , + input wire pipe_rx0_valid_i , + input wire pipe_rx0_chanisaligned_i , + input wire [ 2:0] pipe_rx0_status_i , + input wire pipe_rx0_phy_status_i , + input wire pipe_rx0_elec_idle_i , + output wire pipe_rx0_polarity_o , + output wire pipe_tx0_compliance_o , + output wire [ 1:0] pipe_tx0_char_is_k_o , + output wire [15:0] pipe_tx0_data_o , + output wire pipe_tx0_elec_idle_o , + output wire [ 1:0] pipe_tx0_powerdown_o , + + // Pipe Per-Lane Signals - Lane 1 + output wire [ 1:0] pipe_rx1_char_is_k_o , + output wire [15:0] pipe_rx1_data_o , + output wire pipe_rx1_valid_o , + output wire pipe_rx1_chanisaligned_o , + output wire [ 2:0] pipe_rx1_status_o , + output wire pipe_rx1_phy_status_o , + output wire pipe_rx1_elec_idle_o , + input wire pipe_rx1_polarity_i , + input wire pipe_tx1_compliance_i , + input wire [ 1:0] pipe_tx1_char_is_k_i , + input wire [15:0] pipe_tx1_data_i , + input wire pipe_tx1_elec_idle_i , + input wire [ 1:0] pipe_tx1_powerdown_i , + + input wire [ 1:0] pipe_rx1_char_is_k_i , + input wire [15:0] pipe_rx1_data_i , + input wire pipe_rx1_valid_i , + input wire pipe_rx1_chanisaligned_i , + input wire [ 2:0] pipe_rx1_status_i , + input wire pipe_rx1_phy_status_i , + input wire pipe_rx1_elec_idle_i , + output wire pipe_rx1_polarity_o , + output wire pipe_tx1_compliance_o , + output wire [ 1:0] pipe_tx1_char_is_k_o , + output wire [15:0] pipe_tx1_data_o , + output wire pipe_tx1_elec_idle_o , + output wire [ 1:0] pipe_tx1_powerdown_o , + + // Pipe Per-Lane Signals - Lane 2 + output wire [ 1:0] pipe_rx2_char_is_k_o , + output wire [15:0] pipe_rx2_data_o , + output wire pipe_rx2_valid_o , + output wire pipe_rx2_chanisaligned_o , + output wire [ 2:0] pipe_rx2_status_o , + output wire pipe_rx2_phy_status_o , + output wire pipe_rx2_elec_idle_o , + input wire pipe_rx2_polarity_i , + input wire pipe_tx2_compliance_i , + input wire [ 1:0] pipe_tx2_char_is_k_i , + input wire [15:0] pipe_tx2_data_i , + input wire pipe_tx2_elec_idle_i , + input wire [ 1:0] pipe_tx2_powerdown_i , + + input wire [ 1:0] pipe_rx2_char_is_k_i , + input wire [15:0] pipe_rx2_data_i , + input wire pipe_rx2_valid_i , + input wire pipe_rx2_chanisaligned_i , + input wire [ 2:0] pipe_rx2_status_i , + input wire pipe_rx2_phy_status_i , + input wire pipe_rx2_elec_idle_i , + output wire pipe_rx2_polarity_o , + output wire pipe_tx2_compliance_o , + output wire [ 1:0] pipe_tx2_char_is_k_o , + output wire [15:0] pipe_tx2_data_o , + output wire pipe_tx2_elec_idle_o , + output wire [ 1:0] pipe_tx2_powerdown_o , + + // Pipe Per-Lane Signals - Lane 3 + output wire [ 1:0] pipe_rx3_char_is_k_o , + output wire [15:0] pipe_rx3_data_o , + output wire pipe_rx3_valid_o , + output wire pipe_rx3_chanisaligned_o , + output wire [ 2:0] pipe_rx3_status_o , + output wire pipe_rx3_phy_status_o , + output wire pipe_rx3_elec_idle_o , + input wire pipe_rx3_polarity_i , + input wire pipe_tx3_compliance_i , + input wire [ 1:0] pipe_tx3_char_is_k_i , + input wire [15:0] pipe_tx3_data_i , + input wire pipe_tx3_elec_idle_i , + input wire [ 1:0] pipe_tx3_powerdown_i , + + input wire [ 1:0] pipe_rx3_char_is_k_i , + input wire [15:0] pipe_rx3_data_i , + input wire pipe_rx3_valid_i , + input wire pipe_rx3_chanisaligned_i , + input wire [ 2:0] pipe_rx3_status_i , + input wire pipe_rx3_phy_status_i , + input wire pipe_rx3_elec_idle_i , + output wire pipe_rx3_polarity_o , + output wire pipe_tx3_compliance_o , + output wire [ 1:0] pipe_tx3_char_is_k_o , + output wire [15:0] pipe_tx3_data_o , + output wire pipe_tx3_elec_idle_o , + output wire [ 1:0] pipe_tx3_powerdown_o , + + // Pipe Per-Lane Signals - Lane 4 + output wire [ 1:0] pipe_rx4_char_is_k_o , + output wire [15:0] pipe_rx4_data_o , + output wire pipe_rx4_valid_o , + output wire pipe_rx4_chanisaligned_o , + output wire [ 2:0] pipe_rx4_status_o , + output wire pipe_rx4_phy_status_o , + output wire pipe_rx4_elec_idle_o , + input wire pipe_rx4_polarity_i , + input wire pipe_tx4_compliance_i , + input wire [ 1:0] pipe_tx4_char_is_k_i , + input wire [15:0] pipe_tx4_data_i , + input wire pipe_tx4_elec_idle_i , + input wire [ 1:0] pipe_tx4_powerdown_i , + + input wire [ 1:0] pipe_rx4_char_is_k_i , + input wire [15:0] pipe_rx4_data_i , + input wire pipe_rx4_valid_i , + input wire pipe_rx4_chanisaligned_i , + input wire [ 2:0] pipe_rx4_status_i , + input wire pipe_rx4_phy_status_i , + input wire pipe_rx4_elec_idle_i , + output wire pipe_rx4_polarity_o , + output wire pipe_tx4_compliance_o , + output wire [ 1:0] pipe_tx4_char_is_k_o , + output wire [15:0] pipe_tx4_data_o , + output wire pipe_tx4_elec_idle_o , + output wire [ 1:0] pipe_tx4_powerdown_o , + + // Pipe Per-Lane Signals - Lane 5 + output wire [ 1:0] pipe_rx5_char_is_k_o , + output wire [15:0] pipe_rx5_data_o , + output wire pipe_rx5_valid_o , + output wire pipe_rx5_chanisaligned_o , + output wire [ 2:0] pipe_rx5_status_o , + output wire pipe_rx5_phy_status_o , + output wire pipe_rx5_elec_idle_o , + input wire pipe_rx5_polarity_i , + input wire pipe_tx5_compliance_i , + input wire [ 1:0] pipe_tx5_char_is_k_i , + input wire [15:0] pipe_tx5_data_i , + input wire pipe_tx5_elec_idle_i , + input wire [ 1:0] pipe_tx5_powerdown_i , + + input wire [ 1:0] pipe_rx5_char_is_k_i , + input wire [15:0] pipe_rx5_data_i , + input wire pipe_rx5_valid_i , + input wire pipe_rx5_chanisaligned_i , + input wire [ 2:0] pipe_rx5_status_i , + input wire pipe_rx5_phy_status_i , + input wire pipe_rx5_elec_idle_i , + output wire pipe_rx5_polarity_o , + output wire pipe_tx5_compliance_o , + output wire [ 1:0] pipe_tx5_char_is_k_o , + output wire [15:0] pipe_tx5_data_o , + output wire pipe_tx5_elec_idle_o , + output wire [ 1:0] pipe_tx5_powerdown_o , + + // Pipe Per-Lane Signals - Lane 6 + output wire [ 1:0] pipe_rx6_char_is_k_o , + output wire [15:0] pipe_rx6_data_o , + output wire pipe_rx6_valid_o , + output wire pipe_rx6_chanisaligned_o , + output wire [ 2:0] pipe_rx6_status_o , + output wire pipe_rx6_phy_status_o , + output wire pipe_rx6_elec_idle_o , + input wire pipe_rx6_polarity_i , + input wire pipe_tx6_compliance_i , + input wire [ 1:0] pipe_tx6_char_is_k_i , + input wire [15:0] pipe_tx6_data_i , + input wire pipe_tx6_elec_idle_i , + input wire [ 1:0] pipe_tx6_powerdown_i , + + input wire [ 1:0] pipe_rx6_char_is_k_i , + input wire [15:0] pipe_rx6_data_i , + input wire pipe_rx6_valid_i , + input wire pipe_rx6_chanisaligned_i , + input wire [ 2:0] pipe_rx6_status_i , + input wire pipe_rx6_phy_status_i , + input wire pipe_rx6_elec_idle_i , + output wire pipe_rx6_polarity_o , + output wire pipe_tx6_compliance_o , + output wire [ 1:0] pipe_tx6_char_is_k_o , + output wire [15:0] pipe_tx6_data_o , + output wire pipe_tx6_elec_idle_o , + output wire [ 1:0] pipe_tx6_powerdown_o , + + // Pipe Per-Lane Signals - Lane 7 + output wire [ 1:0] pipe_rx7_char_is_k_o , + output wire [15:0] pipe_rx7_data_o , + output wire pipe_rx7_valid_o , + output wire pipe_rx7_chanisaligned_o , + output wire [ 2:0] pipe_rx7_status_o , + output wire pipe_rx7_phy_status_o , + output wire pipe_rx7_elec_idle_o , + input wire pipe_rx7_polarity_i , + input wire pipe_tx7_compliance_i , + input wire [ 1:0] pipe_tx7_char_is_k_i , + input wire [15:0] pipe_tx7_data_i , + input wire pipe_tx7_elec_idle_i , + input wire [ 1:0] pipe_tx7_powerdown_i , + + input wire [ 1:0] pipe_rx7_char_is_k_i , + input wire [15:0] pipe_rx7_data_i , + input wire pipe_rx7_valid_i , + input wire pipe_rx7_chanisaligned_i , + input wire [ 2:0] pipe_rx7_status_i , + input wire pipe_rx7_phy_status_i , + input wire pipe_rx7_elec_idle_i , + output wire pipe_rx7_polarity_o , + output wire pipe_tx7_compliance_o , + output wire [ 1:0] pipe_tx7_char_is_k_o , + output wire [15:0] pipe_tx7_data_o , + output wire pipe_tx7_elec_idle_o , + output wire [ 1:0] pipe_tx7_powerdown_o , + + // Non PIPE signals + input wire pipe_clk , + input wire rst_n +); + + //******************************************************************// + // Reality check. // + //******************************************************************// + + //synthesis translate_off + // initial begin + // $display("[%t] %m LINK_CAP_MAX_LINK_WIDTH %0d PIPE_PIPELINE_STAGES %0d", + // $time, LINK_CAP_MAX_LINK_WIDTH, PIPE_PIPELINE_STAGES); + // end + //synthesis translate_on + + generate + +pcie_7x_0_pcie_pipe_misc # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_misc_i ( + + .pipe_tx_rcvr_det_i(pipe_tx_rcvr_det_i), + .pipe_tx_reset_i(pipe_tx_reset_i), + .pipe_tx_rate_i(pipe_tx_rate_i), + .pipe_tx_deemph_i(pipe_tx_deemph_i), + .pipe_tx_margin_i(pipe_tx_margin_i), + .pipe_tx_swing_i(pipe_tx_swing_i), + + .pipe_tx_rcvr_det_o(pipe_tx_rcvr_det_o), + .pipe_tx_reset_o(pipe_tx_reset_o), + .pipe_tx_rate_o(pipe_tx_rate_o), + .pipe_tx_deemph_o(pipe_tx_deemph_o), + .pipe_tx_margin_o(pipe_tx_margin_o), + .pipe_tx_swing_o(pipe_tx_swing_o) , + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + ); + + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_0_i ( + + .pipe_rx_char_is_k_o(pipe_rx0_char_is_k_o), + .pipe_rx_data_o(pipe_rx0_data_o), + .pipe_rx_valid_o(pipe_rx0_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx0_chanisaligned_o), + .pipe_rx_status_o(pipe_rx0_status_o), + .pipe_rx_phy_status_o(pipe_rx0_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx0_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx0_polarity_i), + .pipe_tx_compliance_i(pipe_tx0_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx0_char_is_k_i), + .pipe_tx_data_i(pipe_tx0_data_i), + .pipe_tx_elec_idle_i(pipe_tx0_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx0_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx0_char_is_k_i), + .pipe_rx_data_i(pipe_rx0_data_i), + .pipe_rx_valid_i(pipe_rx0_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx0_chanisaligned_i), + .pipe_rx_status_i(pipe_rx0_status_i), + .pipe_rx_phy_status_i(pipe_rx0_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx0_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx0_polarity_o), + .pipe_tx_compliance_o(pipe_tx0_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx0_char_is_k_o), + .pipe_tx_data_o(pipe_tx0_data_o), + .pipe_tx_elec_idle_o(pipe_tx0_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx0_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + + if (LINK_CAP_MAX_LINK_WIDTH >= 2) begin : pipe_2_lane + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_1_i ( + + .pipe_rx_char_is_k_o(pipe_rx1_char_is_k_o), + .pipe_rx_data_o(pipe_rx1_data_o), + .pipe_rx_valid_o(pipe_rx1_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx1_chanisaligned_o), + .pipe_rx_status_o(pipe_rx1_status_o), + .pipe_rx_phy_status_o(pipe_rx1_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx1_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx1_polarity_i), + .pipe_tx_compliance_i(pipe_tx1_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx1_char_is_k_i), + .pipe_tx_data_i(pipe_tx1_data_i), + .pipe_tx_elec_idle_i(pipe_tx1_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx1_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx1_char_is_k_i), + .pipe_rx_data_i(pipe_rx1_data_i), + .pipe_rx_valid_i(pipe_rx1_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx1_chanisaligned_i), + .pipe_rx_status_i(pipe_rx1_status_i), + .pipe_rx_phy_status_i(pipe_rx1_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx1_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx1_polarity_o), + .pipe_tx_compliance_o(pipe_tx1_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx1_char_is_k_o), + .pipe_tx_data_o(pipe_tx1_data_o), + .pipe_tx_elec_idle_o(pipe_tx1_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx1_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + + end // if (LINK_CAP_MAX_LINK_WIDTH >= 2) + else + begin + assign pipe_rx1_char_is_k_o = 2'b00; + assign pipe_rx1_data_o = 16'h0000; + assign pipe_rx1_valid_o = 1'b0; + assign pipe_rx1_chanisaligned_o = 1'b0; + assign pipe_rx1_status_o = 3'b000; + assign pipe_rx1_phy_status_o = 1'b0; + assign pipe_rx1_elec_idle_o = 1'b1; + assign pipe_rx1_polarity_o = 1'b0; + assign pipe_tx1_compliance_o = 1'b0; + assign pipe_tx1_char_is_k_o = 2'b00; + assign pipe_tx1_data_o = 16'h0000; + assign pipe_tx1_elec_idle_o = 1'b1; + assign pipe_tx1_powerdown_o = 2'b00; + end // if !(LINK_CAP_MAX_LINK_WIDTH >= 2) + + if (LINK_CAP_MAX_LINK_WIDTH >= 4) begin : pipe_4_lane + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + ) + pipe_lane_2_i ( + + .pipe_rx_char_is_k_o(pipe_rx2_char_is_k_o), + .pipe_rx_data_o(pipe_rx2_data_o), + .pipe_rx_valid_o(pipe_rx2_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx2_chanisaligned_o), + .pipe_rx_status_o(pipe_rx2_status_o), + .pipe_rx_phy_status_o(pipe_rx2_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx2_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx2_polarity_i), + .pipe_tx_compliance_i(pipe_tx2_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx2_char_is_k_i), + .pipe_tx_data_i(pipe_tx2_data_i), + .pipe_tx_elec_idle_i(pipe_tx2_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx2_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx2_char_is_k_i), + .pipe_rx_data_i(pipe_rx2_data_i), + .pipe_rx_valid_i(pipe_rx2_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx2_chanisaligned_i), + .pipe_rx_status_i(pipe_rx2_status_i), + .pipe_rx_phy_status_i(pipe_rx2_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx2_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx2_polarity_o), + .pipe_tx_compliance_o(pipe_tx2_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx2_char_is_k_o), + .pipe_tx_data_o(pipe_tx2_data_o), + .pipe_tx_elec_idle_o(pipe_tx2_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx2_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_3_i ( + + .pipe_rx_char_is_k_o(pipe_rx3_char_is_k_o), + .pipe_rx_data_o(pipe_rx3_data_o), + .pipe_rx_valid_o(pipe_rx3_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx3_chanisaligned_o), + .pipe_rx_status_o(pipe_rx3_status_o), + .pipe_rx_phy_status_o(pipe_rx3_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx3_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx3_polarity_i), + .pipe_tx_compliance_i(pipe_tx3_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx3_char_is_k_i), + .pipe_tx_data_i(pipe_tx3_data_i), + .pipe_tx_elec_idle_i(pipe_tx3_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx3_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx3_char_is_k_i), + .pipe_rx_data_i(pipe_rx3_data_i), + .pipe_rx_valid_i(pipe_rx3_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx3_chanisaligned_i), + .pipe_rx_status_i(pipe_rx3_status_i), + .pipe_rx_phy_status_i(pipe_rx3_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx3_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx3_polarity_o), + .pipe_tx_compliance_o(pipe_tx3_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx3_char_is_k_o), + .pipe_tx_data_o(pipe_tx3_data_o), + .pipe_tx_elec_idle_o(pipe_tx3_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx3_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + + end // if (LINK_CAP_MAX_LINK_WIDTH >= 4) + else + begin + assign pipe_rx2_char_is_k_o = 2'b00; + assign pipe_rx2_data_o = 16'h0000; + assign pipe_rx2_valid_o = 1'b0; + assign pipe_rx2_chanisaligned_o = 1'b0; + assign pipe_rx2_status_o = 3'b000; + assign pipe_rx2_phy_status_o = 1'b0; + assign pipe_rx2_elec_idle_o = 1'b1; + assign pipe_rx2_polarity_o = 1'b0; + assign pipe_tx2_compliance_o = 1'b0; + assign pipe_tx2_char_is_k_o = 2'b00; + assign pipe_tx2_data_o = 16'h0000; + assign pipe_tx2_elec_idle_o = 1'b1; + assign pipe_tx2_powerdown_o = 2'b00; + + assign pipe_rx3_char_is_k_o = 2'b00; + assign pipe_rx3_data_o = 16'h0000; + assign pipe_rx3_valid_o = 1'b0; + assign pipe_rx3_chanisaligned_o = 1'b0; + assign pipe_rx3_status_o = 3'b000; + assign pipe_rx3_phy_status_o = 1'b0; + assign pipe_rx3_elec_idle_o = 1'b1; + assign pipe_rx3_polarity_o = 1'b0; + assign pipe_tx3_compliance_o = 1'b0; + assign pipe_tx3_char_is_k_o = 2'b00; + assign pipe_tx3_data_o = 16'h0000; + assign pipe_tx3_elec_idle_o = 1'b1; + assign pipe_tx3_powerdown_o = 2'b00; + end // if !(LINK_CAP_MAX_LINK_WIDTH >= 4) + + if (LINK_CAP_MAX_LINK_WIDTH >= 8) begin : pipe_8_lane + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_4_i ( + + .pipe_rx_char_is_k_o(pipe_rx4_char_is_k_o), + .pipe_rx_data_o(pipe_rx4_data_o), + .pipe_rx_valid_o(pipe_rx4_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx4_chanisaligned_o), + .pipe_rx_status_o(pipe_rx4_status_o), + .pipe_rx_phy_status_o(pipe_rx4_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx4_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx4_polarity_i), + .pipe_tx_compliance_i(pipe_tx4_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx4_char_is_k_i), + .pipe_tx_data_i(pipe_tx4_data_i), + .pipe_tx_elec_idle_i(pipe_tx4_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx4_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx4_char_is_k_i), + .pipe_rx_data_i(pipe_rx4_data_i), + .pipe_rx_valid_i(pipe_rx4_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx4_chanisaligned_i), + .pipe_rx_status_i(pipe_rx4_status_i), + .pipe_rx_phy_status_i(pipe_rx4_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx4_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx4_polarity_o), + .pipe_tx_compliance_o(pipe_tx4_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx4_char_is_k_o), + .pipe_tx_data_o(pipe_tx4_data_o), + .pipe_tx_elec_idle_o(pipe_tx4_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx4_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_5_i ( + + .pipe_rx_char_is_k_o(pipe_rx5_char_is_k_o), + .pipe_rx_data_o(pipe_rx5_data_o), + .pipe_rx_valid_o(pipe_rx5_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx5_chanisaligned_o), + .pipe_rx_status_o(pipe_rx5_status_o), + .pipe_rx_phy_status_o(pipe_rx5_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx5_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx5_polarity_i), + .pipe_tx_compliance_i(pipe_tx5_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx5_char_is_k_i), + .pipe_tx_data_i(pipe_tx5_data_i), + .pipe_tx_elec_idle_i(pipe_tx5_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx5_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx5_char_is_k_i), + .pipe_rx_data_i(pipe_rx5_data_i), + .pipe_rx_valid_i(pipe_rx5_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx5_chanisaligned_i), + .pipe_rx_status_i(pipe_rx5_status_i), + .pipe_rx_phy_status_i(pipe_rx5_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx5_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx5_polarity_o), + .pipe_tx_compliance_o(pipe_tx5_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx5_char_is_k_o), + .pipe_tx_data_o(pipe_tx5_data_o), + .pipe_tx_elec_idle_o(pipe_tx5_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx5_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_6_i ( + + .pipe_rx_char_is_k_o(pipe_rx6_char_is_k_o), + .pipe_rx_data_o(pipe_rx6_data_o), + .pipe_rx_valid_o(pipe_rx6_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx6_chanisaligned_o), + .pipe_rx_status_o(pipe_rx6_status_o), + .pipe_rx_phy_status_o(pipe_rx6_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx6_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx6_polarity_i), + .pipe_tx_compliance_i(pipe_tx6_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx6_char_is_k_i), + .pipe_tx_data_i(pipe_tx6_data_i), + .pipe_tx_elec_idle_i(pipe_tx6_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx6_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx6_char_is_k_i), + .pipe_rx_data_i(pipe_rx6_data_i), + .pipe_rx_valid_i(pipe_rx6_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx6_chanisaligned_i), + .pipe_rx_status_i(pipe_rx6_status_i), + .pipe_rx_phy_status_i(pipe_rx6_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx6_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx6_polarity_o), + .pipe_tx_compliance_o(pipe_tx6_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx6_char_is_k_o), + .pipe_tx_data_o(pipe_tx6_data_o), + .pipe_tx_elec_idle_o(pipe_tx6_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx6_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_7_i ( + + .pipe_rx_char_is_k_o(pipe_rx7_char_is_k_o), + .pipe_rx_data_o(pipe_rx7_data_o), + .pipe_rx_valid_o(pipe_rx7_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx7_chanisaligned_o), + .pipe_rx_status_o(pipe_rx7_status_o), + .pipe_rx_phy_status_o(pipe_rx7_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx7_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx7_polarity_i), + .pipe_tx_compliance_i(pipe_tx7_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx7_char_is_k_i), + .pipe_tx_data_i(pipe_tx7_data_i), + .pipe_tx_elec_idle_i(pipe_tx7_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx7_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx7_char_is_k_i), + .pipe_rx_data_i(pipe_rx7_data_i), + .pipe_rx_valid_i(pipe_rx7_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx7_chanisaligned_i), + .pipe_rx_status_i(pipe_rx7_status_i), + .pipe_rx_phy_status_i(pipe_rx7_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx7_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx7_polarity_o), + .pipe_tx_compliance_o(pipe_tx7_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx7_char_is_k_o), + .pipe_tx_data_o(pipe_tx7_data_o), + .pipe_tx_elec_idle_o(pipe_tx7_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx7_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + + end // if (LINK_CAP_MAX_LINK_WIDTH >= 8) + else + begin + assign pipe_rx4_char_is_k_o = 2'b00; + assign pipe_rx4_data_o = 16'h0000; + assign pipe_rx4_valid_o = 1'b0; + assign pipe_rx4_chanisaligned_o = 1'b0; + assign pipe_rx4_status_o = 3'b000; + assign pipe_rx4_phy_status_o = 1'b0; + assign pipe_rx4_elec_idle_o = 1'b1; + assign pipe_rx4_polarity_o = 1'b0; + assign pipe_tx4_compliance_o = 1'b0; + assign pipe_tx4_char_is_k_o = 2'b00; + assign pipe_tx4_data_o = 16'h0000; + assign pipe_tx4_elec_idle_o = 1'b1; + assign pipe_tx4_powerdown_o = 2'b00; + + assign pipe_rx5_char_is_k_o = 2'b00; + assign pipe_rx5_data_o = 16'h0000; + assign pipe_rx5_valid_o = 1'b0; + assign pipe_rx5_chanisaligned_o = 1'b0; + assign pipe_rx5_status_o = 3'b000; + assign pipe_rx5_phy_status_o = 1'b0; + assign pipe_rx5_elec_idle_o = 1'b1; + assign pipe_rx5_polarity_o = 1'b0; + assign pipe_tx5_compliance_o = 1'b0; + assign pipe_tx5_char_is_k_o = 2'b00; + assign pipe_tx5_data_o = 16'h0000; + assign pipe_tx5_elec_idle_o = 1'b1; + assign pipe_tx5_powerdown_o = 2'b00; + + assign pipe_rx6_char_is_k_o = 2'b00; + assign pipe_rx6_data_o = 16'h0000; + assign pipe_rx6_valid_o = 1'b0; + assign pipe_rx6_chanisaligned_o = 1'b0; + assign pipe_rx6_status_o = 3'b000; + assign pipe_rx6_phy_status_o = 1'b0; + assign pipe_rx6_elec_idle_o = 1'b1; + assign pipe_rx6_polarity_o = 1'b0; + assign pipe_tx6_compliance_o = 1'b0; + assign pipe_tx6_char_is_k_o = 2'b00; + assign pipe_tx6_data_o = 16'h0000; + assign pipe_tx6_elec_idle_o = 1'b1; + assign pipe_tx6_powerdown_o = 2'b00; + + assign pipe_rx7_char_is_k_o = 2'b00; + assign pipe_rx7_data_o = 16'h0000; + assign pipe_rx7_valid_o = 1'b0; + assign pipe_rx7_chanisaligned_o = 1'b0; + assign pipe_rx7_status_o = 3'b000; + assign pipe_rx7_phy_status_o = 1'b0; + assign pipe_rx7_elec_idle_o = 1'b1; + assign pipe_rx7_polarity_o = 1'b0; + assign pipe_tx7_compliance_o = 1'b0; + assign pipe_tx7_char_is_k_o = 2'b00; + assign pipe_tx7_data_o = 16'h0000; + assign pipe_tx7_elec_idle_o = 1'b1; + assign pipe_tx7_powerdown_o = 2'b00; + end // if !(LINK_CAP_MAX_LINK_WIDTH >= 8) + + endgenerate + +endmodule + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_top.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_top.v new file mode 100644 index 0000000000000000000000000000000000000000..d8f264b93cc1c5a2a456f9cff84873cf1a804e54 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pcie_top.v @@ -0,0 +1,2080 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_top.v +// Version : 3.3 +// Description: Solution wrapper for Virtex7 Hard Block for PCI Express +// +// +// +//-------------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_top # ( + // PCIE_2_1 params + parameter PIPE_PIPELINE_STAGES = 0, // 0 - 0 stages, 1 - 1 stage, 2 - 2 stages + parameter [11:0] AER_BASE_PTR = 12'h140, + parameter AER_CAP_ECRC_CHECK_CAPABLE = "FALSE", + parameter DEV_CAP_ROLE_BASED_ERROR = "TRUE", + parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE = "FALSE", + parameter AER_CAP_ECRC_GEN_CAPABLE = "FALSE", + parameter [15:0] AER_CAP_ID = 16'h0001, + parameter AER_CAP_MULTIHEADER = "FALSE", + parameter [11:0] AER_CAP_NEXTPTR = 12'h178, + parameter AER_CAP_ON = "FALSE", + parameter [23:0] AER_CAP_OPTIONAL_ERR_SUPPORT = 24'h000000, + parameter AER_CAP_PERMIT_ROOTERR_UPDATE = "TRUE", + parameter [3:0] AER_CAP_VERSION = 4'h1, + parameter ALLOW_X8_GEN2 = "FALSE", + parameter [31:0] BAR0 = 32'hFFFFFF00, + parameter [31:0] BAR1 = 32'hFFFF0000, + parameter [31:0] BAR2 = 32'hFFFF000C, + parameter [31:0] BAR3 = 32'hFFFFFFFF, + parameter [31:0] BAR4 = 32'h00000000, + parameter [31:0] BAR5 = 32'h00000000, + parameter C_DATA_WIDTH = 64, + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, + parameter KEEP_WIDTH = C_DATA_WIDTH / 8, + parameter [7:0] CAPABILITIES_PTR = 8'h40, + parameter [31:0] CARDBUS_CIS_POINTER = 32'h00000000, + parameter [23:0] CLASS_CODE = 24'h000000, + parameter CFG_ECRC_ERR_CPLSTAT = 0, + parameter CMD_INTX_IMPLEMENTED = "TRUE", + parameter CPL_TIMEOUT_DISABLE_SUPPORTED = "FALSE", + parameter [3:0] CPL_TIMEOUT_RANGES_SUPPORTED = 4'h0, + parameter [6:0] CRM_MODULE_RSTS = 7'h00, + parameter DEV_CAP2_ARI_FORWARDING_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED = "FALSE", + parameter DEV_CAP2_CAS128_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED = "FALSE", + parameter DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED = "FALSE", + parameter DEV_CAP2_LTR_MECHANISM_SUPPORTED = "FALSE", + parameter [1:0] DEV_CAP2_MAX_ENDEND_TLP_PREFIXES = 2'h0, + parameter DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING = "FALSE", + parameter [1:0] DEV_CAP2_TPH_COMPLETER_SUPPORTED = 2'h0, + parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE = "TRUE", + parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE = "TRUE", + parameter integer DEV_CAP_ENDPOINT_L0S_LATENCY = 0, + parameter integer DEV_CAP_ENDPOINT_L1_LATENCY = 0, + parameter DEV_CAP_EXT_TAG_SUPPORTED = "TRUE", + parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "FALSE", + parameter integer DEV_CAP_MAX_PAYLOAD_SUPPORTED = 2, + parameter integer DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT = 0, + parameter integer DEV_CAP_RSVD_14_12 = 0, + parameter integer DEV_CAP_RSVD_17_16 = 0, + parameter integer DEV_CAP_RSVD_31_29 = 0, + parameter DEV_CONTROL_AUX_POWER_SUPPORTED = "FALSE", + parameter DEV_CONTROL_EXT_TAG_DEFAULT = "FALSE", + parameter DISABLE_ASPM_L1_TIMER = "FALSE", + parameter DISABLE_BAR_FILTERING = "FALSE", + parameter DISABLE_ERR_MSG = "FALSE", + parameter DISABLE_ID_CHECK = "FALSE", + parameter DISABLE_LANE_REVERSAL = "FALSE", + parameter DISABLE_LOCKED_FILTER = "FALSE", + parameter DISABLE_PPM_FILTER = "FALSE", + parameter DISABLE_RX_POISONED_RESP = "FALSE", + parameter DISABLE_RX_TC_FILTER = "FALSE", + parameter DISABLE_SCRAMBLING = "FALSE", + parameter [7:0] DNSTREAM_LINK_NUM = 8'h00, + parameter [11:0] DSN_BASE_PTR = 12'h100, + parameter [15:0] DSN_CAP_ID = 16'h0003, + parameter [11:0] DSN_CAP_NEXTPTR = 12'h10C, + parameter DSN_CAP_ON = "TRUE", + parameter [3:0] DSN_CAP_VERSION = 4'h1, + parameter [10:0] ENABLE_MSG_ROUTE = 11'h000, + parameter ENABLE_RX_TD_ECRC_TRIM = "FALSE", + parameter ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED = "FALSE", + parameter ENTER_RVRY_EI_L0 = "TRUE", + parameter EXIT_LOOPBACK_ON_EI = "TRUE", + parameter [31:0] EXPANSION_ROM = 32'hFFFFF001, + parameter [5:0] EXT_CFG_CAP_PTR = 6'h3F, + parameter [9:0] EXT_CFG_XP_CAP_PTR = 10'h3FF, + parameter [7:0] HEADER_TYPE = 8'h00, + parameter [4:0] INFER_EI = 5'h00, + parameter [7:0] INTERRUPT_PIN = 8'h01, + parameter INTERRUPT_STAT_AUTO = "TRUE", + parameter IS_SWITCH = "FALSE", + parameter [9:0] LAST_CONFIG_DWORD = 10'h3FF, + parameter LINK_CAP_ASPM_OPTIONALITY = "TRUE", + parameter integer LINK_CAP_ASPM_SUPPORT = 1, + parameter LINK_CAP_CLOCK_POWER_MANAGEMENT = "FALSE", + parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP = "FALSE", + parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN1 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN2 = 7, + parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP = "FALSE", + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1, + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08, + parameter integer LINK_CAP_RSVD_23 = 0, + parameter integer LINK_CONTROL_RCB = 0, + parameter LINK_CTRL2_DEEMPHASIS = "FALSE", + parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE = "FALSE", + parameter [3:0] LINK_CTRL2_TARGET_LINK_SPEED = 4'h2, + parameter LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE", + parameter [14:0] LL_ACK_TIMEOUT = 15'h0000, + parameter LL_ACK_TIMEOUT_EN = "FALSE", + parameter integer LL_ACK_TIMEOUT_FUNC = 0, + parameter [14:0] LL_REPLAY_TIMEOUT = 15'h0000, + parameter LL_REPLAY_TIMEOUT_EN = "FALSE", + parameter integer LL_REPLAY_TIMEOUT_FUNC = 0, + parameter [5:0] LTSSM_MAX_LINK_WIDTH = 6'h01, + parameter MPS_FORCE = "FALSE", + parameter [7:0] MSIX_BASE_PTR = 8'h9C, + parameter [7:0] MSIX_CAP_ID = 8'h11, + parameter [7:0] MSIX_CAP_NEXTPTR = 8'h00, + parameter MSIX_CAP_ON = "FALSE", + parameter integer MSIX_CAP_PBA_BIR = 0, + parameter [28:0] MSIX_CAP_PBA_OFFSET = 29'h00000050, + parameter integer MSIX_CAP_TABLE_BIR = 0, + parameter [28:0] MSIX_CAP_TABLE_OFFSET = 29'h00000040, + parameter [10:0] MSIX_CAP_TABLE_SIZE = 11'h000, + parameter [7:0] MSI_BASE_PTR = 8'h48, + parameter MSI_CAP_64_BIT_ADDR_CAPABLE = "TRUE", + parameter [7:0] MSI_CAP_ID = 8'h05, + parameter integer MSI_CAP_MULTIMSGCAP = 0, + parameter integer MSI_CAP_MULTIMSG_EXTENSION = 0, + parameter [7:0] MSI_CAP_NEXTPTR = 8'h60, + parameter MSI_CAP_ON = "FALSE", + parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE = "TRUE", + parameter integer N_FTS_COMCLK_GEN1 = 255, + parameter integer N_FTS_COMCLK_GEN2 = 255, + parameter integer N_FTS_GEN1 = 255, + parameter integer N_FTS_GEN2 = 255, + parameter [7:0] PCIE_BASE_PTR = 8'h60, + parameter [7:0] PCIE_CAP_CAPABILITY_ID = 8'h10, + parameter [3:0] PCIE_CAP_CAPABILITY_VERSION = 4'h2, + parameter [3:0] PCIE_CAP_DEVICE_PORT_TYPE = 4'h0, + parameter [7:0] PCIE_CAP_NEXTPTR = 8'h9C, + parameter PCIE_CAP_ON = "TRUE", + parameter integer PCIE_CAP_RSVD_15_14 = 0, + parameter PCIE_CAP_SLOT_IMPLEMENTED = "FALSE", + parameter integer PCIE_REVISION = 2, + parameter integer PL_AUTO_CONFIG = 0, + parameter PL_FAST_TRAIN = "FALSE", + parameter [14:0] PM_ASPML0S_TIMEOUT = 15'h0000, + parameter PM_ASPML0S_TIMEOUT_EN = "FALSE", + parameter integer PM_ASPML0S_TIMEOUT_FUNC = 0, + parameter PM_ASPM_FASTEXIT = "FALSE", + parameter [7:0] PM_BASE_PTR = 8'h40, + parameter integer PM_CAP_AUXCURRENT = 0, + parameter PM_CAP_D1SUPPORT = "TRUE", + parameter PM_CAP_D2SUPPORT = "TRUE", + parameter PM_CAP_DSI = "FALSE", + parameter [7:0] PM_CAP_ID = 8'h01, + parameter [7:0] PM_CAP_NEXTPTR = 8'h48, + parameter PM_CAP_ON = "TRUE", + parameter [4:0] PM_CAP_PMESUPPORT = 5'h0F, + parameter PM_CAP_PME_CLOCK = "FALSE", + parameter integer PM_CAP_RSVD_04 = 0, + parameter integer PM_CAP_VERSION = 3, + parameter PM_CSR_B2B3 = "FALSE", + parameter PM_CSR_BPCCEN = "FALSE", + parameter PM_CSR_NOSOFTRST = "TRUE", + parameter [7:0] PM_DATA0 = 8'h01, + parameter [7:0] PM_DATA1 = 8'h01, + parameter [7:0] PM_DATA2 = 8'h01, + parameter [7:0] PM_DATA3 = 8'h01, + parameter [7:0] PM_DATA4 = 8'h01, + parameter [7:0] PM_DATA5 = 8'h01, + parameter [7:0] PM_DATA6 = 8'h01, + parameter [7:0] PM_DATA7 = 8'h01, + parameter [1:0] PM_DATA_SCALE0 = 2'h1, + parameter [1:0] PM_DATA_SCALE1 = 2'h1, + parameter [1:0] PM_DATA_SCALE2 = 2'h1, + parameter [1:0] PM_DATA_SCALE3 = 2'h1, + parameter [1:0] PM_DATA_SCALE4 = 2'h1, + parameter [1:0] PM_DATA_SCALE5 = 2'h1, + parameter [1:0] PM_DATA_SCALE6 = 2'h1, + parameter [1:0] PM_DATA_SCALE7 = 2'h1, + parameter PM_MF = "FALSE", + parameter [11:0] RBAR_BASE_PTR = 12'h178, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR0 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR1 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR2 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR3 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR4 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR5 = 5'h00, + parameter [15:0] RBAR_CAP_ID = 16'h0015, + parameter [2:0] RBAR_CAP_INDEX0 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX1 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX2 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX3 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX4 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX5 = 3'h0, + parameter [11:0] RBAR_CAP_NEXTPTR = 12'h000, + parameter RBAR_CAP_ON = "FALSE", + parameter [31:0] RBAR_CAP_SUP0 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP1 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP2 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP3 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP4 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP5 = 32'h00000000, + parameter [3:0] RBAR_CAP_VERSION = 4'h1, + parameter [2:0] RBAR_NUM = 3'h1, + parameter integer RECRC_CHK = 0, + parameter RECRC_CHK_TRIM = "FALSE", + parameter ROOT_CAP_CRS_SW_VISIBILITY = "FALSE", + parameter [1:0] RP_AUTO_SPD = 2'h1, + parameter [4:0] RP_AUTO_SPD_LOOPCNT = 5'h1f, + parameter SELECT_DLL_IF = "FALSE", + parameter SIM_VERSION = "1.0", + parameter SLOT_CAP_ATT_BUTTON_PRESENT = "FALSE", + parameter SLOT_CAP_ATT_INDICATOR_PRESENT = "FALSE", + parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT = "FALSE", + parameter SLOT_CAP_HOTPLUG_CAPABLE = "FALSE", + parameter SLOT_CAP_HOTPLUG_SURPRISE = "FALSE", + parameter SLOT_CAP_MRL_SENSOR_PRESENT = "FALSE", + parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT = "FALSE", + parameter [12:0] SLOT_CAP_PHYSICAL_SLOT_NUM = 13'h0000, + parameter SLOT_CAP_POWER_CONTROLLER_PRESENT = "FALSE", + parameter SLOT_CAP_POWER_INDICATOR_PRESENT = "FALSE", + parameter integer SLOT_CAP_SLOT_POWER_LIMIT_SCALE = 0, + parameter [7:0] SLOT_CAP_SLOT_POWER_LIMIT_VALUE = 8'h00, + parameter integer SPARE_BIT0 = 0, + parameter integer SPARE_BIT1 = 0, + parameter integer SPARE_BIT2 = 0, + parameter integer SPARE_BIT3 = 0, + parameter integer SPARE_BIT4 = 0, + parameter integer SPARE_BIT5 = 0, + parameter integer SPARE_BIT6 = 0, + parameter integer SPARE_BIT7 = 0, + parameter integer SPARE_BIT8 = 0, + parameter [7:0] SPARE_BYTE0 = 8'h00, + parameter [7:0] SPARE_BYTE1 = 8'h00, + parameter [7:0] SPARE_BYTE2 = 8'h00, + parameter [7:0] SPARE_BYTE3 = 8'h00, + parameter [31:0] SPARE_WORD0 = 32'h00000000, + parameter [31:0] SPARE_WORD1 = 32'h00000000, + parameter [31:0] SPARE_WORD2 = 32'h00000000, + parameter [31:0] SPARE_WORD3 = 32'h00000000, + parameter SSL_MESSAGE_AUTO = "FALSE", + parameter TECRC_EP_INV = "FALSE", + parameter TL_RBYPASS = "FALSE", + parameter integer TL_RX_RAM_RADDR_LATENCY = 0, + parameter integer TL_RX_RAM_RDATA_LATENCY = 2, + parameter integer TL_RX_RAM_WRITE_LATENCY = 0, + parameter TL_TFC_DISABLE = "FALSE", + parameter TL_TX_CHECKS_DISABLE = "FALSE", + parameter integer TL_TX_RAM_RADDR_LATENCY = 0, + parameter integer TL_TX_RAM_RDATA_LATENCY = 2, + parameter integer TL_TX_RAM_WRITE_LATENCY = 0, + parameter TRN_DW = "FALSE", + parameter TRN_NP_FC = "FALSE", + parameter UPCONFIG_CAPABLE = "TRUE", + parameter UPSTREAM_FACING = "TRUE", + parameter UR_ATOMIC = "TRUE", + parameter UR_CFG1 = "TRUE", + parameter UR_INV_REQ = "TRUE", + parameter UR_PRS_RESPONSE = "TRUE", + parameter USER_CLK2_DIV2 = "FALSE", + parameter integer USER_CLK_FREQ = 3, + parameter USE_RID_PINS = "FALSE", + parameter VC0_CPL_INFINITE = "TRUE", + parameter [12:0] VC0_RX_RAM_LIMIT = 13'h03FF, + parameter integer VC0_TOTAL_CREDITS_CD = 127, + parameter integer VC0_TOTAL_CREDITS_CH = 31, + parameter integer VC0_TOTAL_CREDITS_NPD = 24, + parameter integer VC0_TOTAL_CREDITS_NPH = 12, + parameter integer VC0_TOTAL_CREDITS_PD = 288, + parameter integer VC0_TOTAL_CREDITS_PH = 32, + parameter integer VC0_TX_LASTPACKET = 31, + parameter [11:0] VC_BASE_PTR = 12'h10C, + parameter [15:0] VC_CAP_ID = 16'h0002, + parameter [11:0] VC_CAP_NEXTPTR = 12'h000, + parameter VC_CAP_ON = "FALSE", + parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS = "FALSE", + parameter [3:0] VC_CAP_VERSION = 4'h1, + parameter [11:0] VSEC_BASE_PTR = 12'h128, + parameter [15:0] VSEC_CAP_HDR_ID = 16'h1234, + parameter [11:0] VSEC_CAP_HDR_LENGTH = 12'h018, + parameter [3:0] VSEC_CAP_HDR_REVISION = 4'h1, + parameter [15:0] VSEC_CAP_ID = 16'h000B, + parameter VSEC_CAP_IS_LINK_VISIBLE = "TRUE", + parameter [11:0] VSEC_CAP_NEXTPTR = 12'h140, + parameter VSEC_CAP_ON = "FALSE", + parameter [3:0] VSEC_CAP_VERSION = 4'h1, + parameter ENABLE_JTAG_DBG = "FALSE", + parameter REDUCE_OOB_FREQ = "FALSE" +) +( + + // wrapper input + // Common + output user_clk_out, + input user_reset, + input user_lnk_up, + + output trn_lnk_up, + output user_rst_n, + + // Tx + output [5:0] tx_buf_av, + output tx_err_drop, + output tx_cfg_req, + output s_axis_tx_tready, + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, + input [3:0] s_axis_tx_tuser, + input s_axis_tx_tlast, + input s_axis_tx_tvalid, + input tx_cfg_gnt, + + // Rx + output [C_DATA_WIDTH-1:0] m_axis_rx_tdata, + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, + output m_axis_rx_tlast, + output m_axis_rx_tvalid, + input m_axis_rx_tready, + output [21:0] m_axis_rx_tuser, + input rx_np_ok, + input rx_np_req, + + // Flow Control + output [11:0] fc_cpld, + output [7:0] fc_cplh, + output [11:0] fc_npd, + output [7:0] fc_nph, + output [11:0] fc_pd, + output [7:0] fc_ph, + input [2:0] fc_sel, + + input wire [1:0] pl_directed_link_change, + input wire [1:0] pl_directed_link_width, + input wire pl_directed_link_speed, + input wire pl_directed_link_auton, + input wire pl_upstream_prefer_deemph, + input wire pl_downstream_deemph_source, + input wire pl_directed_ltssm_new_vld, + input wire [5:0] pl_directed_ltssm_new, + input wire pl_directed_ltssm_stall, + + input wire cm_rst_n, + input wire func_lvl_rst_n, + input wire pl_transmit_hot_rst, + input wire [31:0] cfg_mgmt_di, + input wire [3:0] cfg_mgmt_byte_en_n, + input wire [9:0] cfg_mgmt_dwaddr, + input wire cfg_mgmt_wr_rw1c_as_rw_n, + input wire cfg_mgmt_wr_readonly_n, + input wire cfg_mgmt_wr_en_n, + input wire cfg_mgmt_rd_en_n, + input wire cfg_err_malformed_n, + input wire cfg_err_cor_n, + input wire cfg_err_ur_n, + input wire cfg_err_ecrc_n, + input wire cfg_err_cpl_timeout_n, + input wire cfg_err_cpl_abort_n, + input wire cfg_err_cpl_unexpect_n, + input wire cfg_err_poisoned_n, + input wire cfg_err_acs_n, + input wire cfg_err_atomic_egress_blocked_n, + input wire cfg_err_mc_blocked_n, + input wire cfg_err_internal_uncor_n, + input wire cfg_err_internal_cor_n, + input wire cfg_err_posted_n, + input wire cfg_err_locked_n, + input wire cfg_err_norecovery_n, + input wire [127:0] cfg_err_aer_headerlog, + input wire [47:0] cfg_err_tlp_cpl_header, + input wire cfg_interrupt_n, + input wire [7:0] cfg_interrupt_di, + input wire cfg_interrupt_assert_n, + input wire cfg_interrupt_stat_n, + input wire [7:0] cfg_ds_bus_number, + input wire [4:0] cfg_ds_device_number, + input wire [2:0] cfg_ds_function_number, + input wire [7:0] cfg_port_number, + input wire cfg_pm_halt_aspm_l0s_n, + input wire cfg_pm_halt_aspm_l1_n, + input wire cfg_pm_force_state_en_n, + input wire [1:0] cfg_pm_force_state, + input wire cfg_pm_wake_n, + input wire cfg_turnoff_ok, + input wire cfg_pm_send_pme_to_n, + input wire [4:0] cfg_pciecap_interrupt_msgnum, + input wire cfg_trn_pending, + input wire [2:0] cfg_force_mps, + input wire cfg_force_common_clock_off, + input wire cfg_force_extended_sync_on, + input wire [63:0] cfg_dsn, + input wire [4:0] cfg_aer_interrupt_msgnum, + input wire [15:0] cfg_dev_id, + input wire [15:0] cfg_vend_id, + input wire [7:0] cfg_rev_id, + input wire [15:0] cfg_subsys_id, + input wire [15:0] cfg_subsys_vend_id, + input wire drp_clk, + input wire drp_en, + input wire drp_we, + input wire [8:0] drp_addr, + input wire [15:0] drp_di, + input wire [1:0] dbg_mode, + input wire dbg_sub_mode, + input wire [2:0] pl_dbg_mode , + + output wire pl_sel_lnk_rate, + output wire [1:0] pl_sel_lnk_width, + output wire [5:0] pl_ltssm_state, + output wire [1:0] pl_lane_reversal_mode, + output wire pl_phy_lnk_up, + output wire [2:0] pl_tx_pm_state, + output wire [1:0] pl_rx_pm_state, + output wire pl_link_upcfg_cap, + output wire pl_link_gen2_cap, + output wire pl_link_partner_gen2_supported, + output wire [2:0] pl_initial_link_width, + output wire pl_directed_change_done, + output wire pl_received_hot_rst, + output wire lnk_clk_en, + output wire [31:0] cfg_mgmt_do, + output wire cfg_mgmt_rd_wr_done, + output wire cfg_err_aer_headerlog_set, + output wire cfg_err_cpl_rdy, + output wire cfg_interrupt_rdy, + output wire [2:0] cfg_interrupt_mmenable, + output wire cfg_interrupt_msienable, + output wire [7:0] cfg_interrupt_do, + output wire cfg_interrupt_msixenable, + output wire cfg_interrupt_msixfm, + output wire [7:0] cfg_bus_number, + output wire [4:0] cfg_device_number, + output wire [2:0] cfg_function_number, + output wire [15:0] cfg_status, + output wire [15:0] cfg_command, + output wire [15:0] cfg_dstatus, + output wire [15:0] cfg_dcommand, + output wire [15:0] cfg_lstatus, + output wire [15:0] cfg_lcommand, + output wire [15:0] cfg_dcommand2, + output wire cfg_received_func_lvl_rst, + output wire cfg_msg_received, + output wire [15:0] cfg_msg_data, + output wire cfg_msg_received_err_cor, + output wire cfg_msg_received_err_non_fatal, + output wire cfg_msg_received_err_fatal, + output wire cfg_msg_received_assert_int_a, + output wire cfg_msg_received_deassert_int_a, + output wire cfg_msg_received_assert_int_b, + output wire cfg_msg_received_deassert_int_b, + output wire cfg_msg_received_assert_int_c, + output wire cfg_msg_received_deassert_int_c, + output wire cfg_msg_received_assert_int_d, + output wire cfg_msg_received_deassert_int_d, + output wire cfg_msg_received_pm_pme, + output wire cfg_msg_received_pme_to_ack, + output wire cfg_msg_received_pme_to, + output wire cfg_msg_received_setslotpowerlimit, + output wire cfg_msg_received_unlock, + output wire cfg_msg_received_pm_as_nak, + output wire cfg_to_turnoff, + output wire [2:0] cfg_pcie_link_state, + output wire cfg_pm_rcv_as_req_l1_n, + output wire cfg_pm_rcv_enter_l1_n, + output wire cfg_pm_rcv_enter_l23_n, + output wire cfg_pm_rcv_req_ack_n, + output wire [1:0] cfg_pmcsr_powerstate, + output wire cfg_pmcsr_pme_en, + output wire cfg_pmcsr_pme_status, + output wire cfg_transaction, + output wire cfg_transaction_type, + output wire [6:0] cfg_transaction_addr, + output wire cfg_command_io_enable, + output wire cfg_command_mem_enable, + output wire cfg_command_bus_master_enable, + output wire cfg_command_interrupt_disable, + output wire cfg_command_serr_en, + output wire cfg_bridge_serr_en, + output wire cfg_dev_status_corr_err_detected, + output wire cfg_dev_status_non_fatal_err_detected, + output wire cfg_dev_status_fatal_err_detected, + output wire cfg_dev_status_ur_detected, + output wire cfg_dev_control_corr_err_reporting_en, + output wire cfg_dev_control_non_fatal_reporting_en, + output wire cfg_dev_control_fatal_err_reporting_en, + output wire cfg_dev_control_ur_err_reporting_en, + output wire cfg_dev_control_enable_ro, + output wire [2:0] cfg_dev_control_max_payload, + output wire cfg_dev_control_ext_tag_en, + output wire cfg_dev_control_phantom_en, + output wire cfg_dev_control_aux_power_en, + output wire cfg_dev_control_no_snoop_en, + output wire [2:0] cfg_dev_control_max_read_req, + output wire [1:0] cfg_link_status_current_speed, + output wire [3:0] cfg_link_status_negotiated_width, + output wire cfg_link_status_link_training, + output wire cfg_link_status_dll_active, + output wire cfg_link_status_bandwidth_status, + output wire cfg_link_status_auto_bandwidth_status, + output wire [1:0] cfg_link_control_aspm_control, + output wire cfg_link_control_rcb, + output wire cfg_link_control_link_disable, + output wire cfg_link_control_retrain_link, + output wire cfg_link_control_common_clock, + output wire cfg_link_control_extended_sync, + output wire cfg_link_control_clock_pm_en, + output wire cfg_link_control_hw_auto_width_dis, + output wire cfg_link_control_bandwidth_int_en, + output wire cfg_link_control_auto_bandwidth_int_en, + output wire [3:0] cfg_dev_control2_cpl_timeout_val, + output wire cfg_dev_control2_cpl_timeout_dis, + output wire cfg_dev_control2_ari_forward_en, + output wire cfg_dev_control2_atomic_requester_en, + output wire cfg_dev_control2_atomic_egress_block, + output wire cfg_dev_control2_ido_req_en, + output wire cfg_dev_control2_ido_cpl_en, + output wire cfg_dev_control2_ltr_en, + output wire cfg_dev_control2_tlp_prefix_block, + output wire cfg_slot_control_electromech_il_ctl_pulse, + output wire cfg_root_control_syserr_corr_err_en, + output wire cfg_root_control_syserr_non_fatal_err_en, + output wire cfg_root_control_syserr_fatal_err_en, + output wire cfg_root_control_pme_int_en, + output wire cfg_aer_ecrc_check_en, + output wire cfg_aer_ecrc_gen_en, + output wire cfg_aer_rooterr_corr_err_reporting_en, + output wire cfg_aer_rooterr_non_fatal_err_reporting_en, + output wire cfg_aer_rooterr_fatal_err_reporting_en, + output wire cfg_aer_rooterr_corr_err_received, + output wire cfg_aer_rooterr_non_fatal_err_received, + output wire cfg_aer_rooterr_fatal_err_received, + output wire [6:0] cfg_vc_tcvc_map, + output wire drp_rdy, + output wire [15:0] drp_do, + output wire [63:0] dbg_vec_a, + output wire [63:0] dbg_vec_b, + output wire [11:0] dbg_vec_c, + output wire dbg_sclr_a, + output wire dbg_sclr_b, + output wire dbg_sclr_c, + output wire dbg_sclr_d, + output wire dbg_sclr_e, + output wire dbg_sclr_f, + output wire dbg_sclr_g, + output wire dbg_sclr_h, + output wire dbg_sclr_i, + output wire dbg_sclr_j, + output wire dbg_sclr_k, + output wire [63:0] trn_rdllp_data, + output wire [1:0] trn_rdllp_src_rdy, + output wire [11:0] pl_dbg_vec, + + input phy_rdy_n, + input pipe_clk, + input user_clk, + input user_clk2, + output wire pipe_rx0_polarity_gt, + output wire pipe_rx1_polarity_gt, + output wire pipe_rx2_polarity_gt, + output wire pipe_rx3_polarity_gt, + output wire pipe_rx4_polarity_gt, + output wire pipe_rx5_polarity_gt, + output wire pipe_rx6_polarity_gt, + output wire pipe_rx7_polarity_gt, + output wire pipe_tx_deemph_gt, + output wire [2:0] pipe_tx_margin_gt, + output wire pipe_tx_rate_gt, + output wire pipe_tx_rcvr_det_gt, + output wire [1:0] pipe_tx0_char_is_k_gt, + output wire pipe_tx0_compliance_gt, + output wire [15:0] pipe_tx0_data_gt, + output wire pipe_tx0_elec_idle_gt, + output wire [1:0] pipe_tx0_powerdown_gt, + output wire [1:0] pipe_tx1_char_is_k_gt, + output wire pipe_tx1_compliance_gt, + output wire [15:0] pipe_tx1_data_gt, + output wire pipe_tx1_elec_idle_gt, + output wire [1:0] pipe_tx1_powerdown_gt, + output wire [1:0] pipe_tx2_char_is_k_gt, + output wire pipe_tx2_compliance_gt, + output wire [15:0] pipe_tx2_data_gt, + output wire pipe_tx2_elec_idle_gt, + output wire [1:0] pipe_tx2_powerdown_gt, + output wire [1:0] pipe_tx3_char_is_k_gt, + output wire pipe_tx3_compliance_gt, + output wire [15:0] pipe_tx3_data_gt, + output wire pipe_tx3_elec_idle_gt, + output wire [1:0] pipe_tx3_powerdown_gt, + output wire [1:0] pipe_tx4_char_is_k_gt, + output wire pipe_tx4_compliance_gt, + output wire [15:0] pipe_tx4_data_gt, + output wire pipe_tx4_elec_idle_gt, + output wire [1:0] pipe_tx4_powerdown_gt, + output wire [1:0] pipe_tx5_char_is_k_gt, + output wire pipe_tx5_compliance_gt, + output wire [15:0] pipe_tx5_data_gt, + output wire pipe_tx5_elec_idle_gt, + output wire [1:0] pipe_tx5_powerdown_gt, + output wire [1:0] pipe_tx6_char_is_k_gt, + output wire pipe_tx6_compliance_gt, + output wire [15:0] pipe_tx6_data_gt, + output wire pipe_tx6_elec_idle_gt, + output wire [1:0] pipe_tx6_powerdown_gt, + output wire [1:0] pipe_tx7_char_is_k_gt, + output wire pipe_tx7_compliance_gt, + output wire [15:0] pipe_tx7_data_gt, + output wire pipe_tx7_elec_idle_gt, + output wire [1:0] pipe_tx7_powerdown_gt, + + input wire pipe_rx0_chanisaligned_gt, + input wire [1:0] pipe_rx0_char_is_k_gt, + input wire [15:0] pipe_rx0_data_gt, + input wire pipe_rx0_elec_idle_gt, + input wire pipe_rx0_phy_status_gt, + input wire [2:0] pipe_rx0_status_gt, + input wire pipe_rx0_valid_gt, + input wire pipe_rx1_chanisaligned_gt, + input wire [1:0] pipe_rx1_char_is_k_gt, + input wire [15:0] pipe_rx1_data_gt, + input wire pipe_rx1_elec_idle_gt, + input wire pipe_rx1_phy_status_gt, + input wire [2:0] pipe_rx1_status_gt, + input wire pipe_rx1_valid_gt, + input wire pipe_rx2_chanisaligned_gt, + input wire [1:0] pipe_rx2_char_is_k_gt, + input wire [15:0] pipe_rx2_data_gt, + input wire pipe_rx2_elec_idle_gt, + input wire pipe_rx2_phy_status_gt, + input wire [2:0] pipe_rx2_status_gt, + input wire pipe_rx2_valid_gt, + input wire pipe_rx3_chanisaligned_gt, + input wire [1:0] pipe_rx3_char_is_k_gt, + input wire [15:0] pipe_rx3_data_gt, + input wire pipe_rx3_elec_idle_gt, + input wire pipe_rx3_phy_status_gt, + input wire [2:0] pipe_rx3_status_gt, + input wire pipe_rx3_valid_gt, + input wire pipe_rx4_chanisaligned_gt, + input wire [1:0] pipe_rx4_char_is_k_gt, + input wire [15:0] pipe_rx4_data_gt, + input wire pipe_rx4_elec_idle_gt, + input wire pipe_rx4_phy_status_gt, + input wire [2:0] pipe_rx4_status_gt, + input wire pipe_rx4_valid_gt, + input wire pipe_rx5_chanisaligned_gt, + input wire [1:0] pipe_rx5_char_is_k_gt, + input wire [15:0] pipe_rx5_data_gt, + input wire pipe_rx5_elec_idle_gt, + input wire pipe_rx5_phy_status_gt, + input wire [2:0] pipe_rx5_status_gt, + input wire pipe_rx5_valid_gt, + input wire pipe_rx6_chanisaligned_gt, + input wire [1:0] pipe_rx6_char_is_k_gt, + input wire [15:0] pipe_rx6_data_gt, + input wire pipe_rx6_elec_idle_gt, + input wire pipe_rx6_phy_status_gt, + input wire [2:0] pipe_rx6_status_gt, + input wire pipe_rx6_valid_gt, + input wire pipe_rx7_chanisaligned_gt, + input wire [1:0] pipe_rx7_char_is_k_gt, + input wire [15:0] pipe_rx7_data_gt, + input wire pipe_rx7_elec_idle_gt, + input wire pipe_rx7_phy_status_gt, + input wire [2:0] pipe_rx7_status_gt, + input wire pipe_rx7_valid_gt +); + + //wire declaration + + // TRN Interface + wire [C_DATA_WIDTH-1:0] trn_td; + wire [REM_WIDTH-1:0] trn_trem; + wire trn_tsof; + wire trn_teof; + wire trn_tsrc_rdy; + wire trn_tdst_rdy; + wire trn_tsrc_dsc; + wire trn_terrfwd; + wire trn_tecrc_gen; + wire trn_tstr; + wire trn_tcfg_gnt; + + + wire [127:0] trn_rd; + wire [1:0] trn_rrem; + wire trn_rdst_rdy; + wire trn_rsof; + wire trn_reof; + wire trn_rsrc_rdy; + wire trn_rsrc_dsc; + wire trn_rerrfwd; + wire trn_recrc_err; + wire [7:0] trn_rbar_hit; + + wire sys_reset_n_d; + wire [1:0] pipe_rx0_char_is_k; + wire [1:0] pipe_rx1_char_is_k; + wire [1:0] pipe_rx2_char_is_k; + wire [1:0] pipe_rx3_char_is_k; + wire [1:0] pipe_rx4_char_is_k; + wire [1:0] pipe_rx5_char_is_k; + wire [1:0] pipe_rx6_char_is_k; + wire [1:0] pipe_rx7_char_is_k; + wire pipe_rx0_valid; + wire pipe_rx1_valid; + wire pipe_rx2_valid; + wire pipe_rx3_valid; + wire pipe_rx4_valid; + wire pipe_rx5_valid; + wire pipe_rx6_valid; + wire pipe_rx7_valid; + wire [15:0] pipe_rx0_data; + wire [15:0] pipe_rx1_data; + wire [15:0] pipe_rx2_data; + wire [15:0] pipe_rx3_data; + wire [15:0] pipe_rx4_data; + wire [15:0] pipe_rx5_data; + wire [15:0] pipe_rx6_data; + wire [15:0] pipe_rx7_data; + wire pipe_rx0_chanisaligned; + wire pipe_rx1_chanisaligned; + wire pipe_rx2_chanisaligned; + wire pipe_rx3_chanisaligned; + wire pipe_rx4_chanisaligned; + wire pipe_rx5_chanisaligned; + wire pipe_rx6_chanisaligned; + wire pipe_rx7_chanisaligned; + wire [2:0] pipe_rx0_status; + wire [2:0] pipe_rx1_status; + wire [2:0] pipe_rx2_status; + wire [2:0] pipe_rx3_status; + wire [2:0] pipe_rx4_status; + wire [2:0] pipe_rx5_status; + wire [2:0] pipe_rx6_status; + wire [2:0] pipe_rx7_status; + wire pipe_rx0_phy_status; + wire pipe_rx1_phy_status; + wire pipe_rx2_phy_status; + wire pipe_rx3_phy_status; + wire pipe_rx4_phy_status; + wire pipe_rx5_phy_status; + wire pipe_rx6_phy_status; + wire pipe_rx7_phy_status; + + wire pipe_rx0_elec_idle; + wire pipe_rx1_elec_idle; + wire pipe_rx2_elec_idle; + wire pipe_rx3_elec_idle; + wire pipe_rx4_elec_idle; + wire pipe_rx5_elec_idle; + wire pipe_rx6_elec_idle; + wire pipe_rx7_elec_idle; + + + wire pipe_tx_reset; + wire pipe_tx_rcvr_det; + wire pipe_tx_rate; + wire pipe_tx_deemph; + wire [2:0] pipe_tx_margin; + wire pipe_rx0_polarity; + wire pipe_rx1_polarity; + wire pipe_rx2_polarity; + wire pipe_rx3_polarity; + wire pipe_rx4_polarity; + wire pipe_rx5_polarity; + wire pipe_rx6_polarity; + wire pipe_rx7_polarity; + wire pipe_tx0_compliance; + wire pipe_tx1_compliance; + wire pipe_tx2_compliance; + wire pipe_tx3_compliance; + wire pipe_tx4_compliance; + wire pipe_tx5_compliance; + wire pipe_tx6_compliance; + wire pipe_tx7_compliance; + wire [1:0] pipe_tx0_char_is_k; + wire [1:0] pipe_tx1_char_is_k; + wire [1:0] pipe_tx2_char_is_k; + wire [1:0] pipe_tx3_char_is_k; + wire [1:0] pipe_tx4_char_is_k; + wire [1:0] pipe_tx5_char_is_k; + wire [1:0] pipe_tx6_char_is_k; + wire [1:0] pipe_tx7_char_is_k; + wire [15:0] pipe_tx0_data; + wire [15:0] pipe_tx1_data; + wire [15:0] pipe_tx2_data; + wire [15:0] pipe_tx3_data; + wire [15:0] pipe_tx4_data; + wire [15:0] pipe_tx5_data; + wire [15:0] pipe_tx6_data; + wire [15:0] pipe_tx7_data; + wire pipe_tx0_elec_idle; + wire pipe_tx1_elec_idle; + wire pipe_tx2_elec_idle; + wire pipe_tx3_elec_idle; + wire pipe_tx4_elec_idle; + wire pipe_tx5_elec_idle; + wire pipe_tx6_elec_idle; + wire pipe_tx7_elec_idle; + wire [1:0] pipe_tx0_powerdown; + wire [1:0] pipe_tx1_powerdown; + wire [1:0] pipe_tx2_powerdown; + wire [1:0] pipe_tx3_powerdown; + wire [1:0] pipe_tx4_powerdown; + wire [1:0] pipe_tx5_powerdown; + wire [1:0] pipe_tx6_powerdown; + wire [1:0] pipe_tx7_powerdown; + + wire cfg_received_func_lvl_rst_n; + wire cfg_err_cpl_rdy_n; + wire cfg_interrupt_rdy_n; + reg [7:0] cfg_bus_number_d; + reg [4:0] cfg_device_number_d; + reg [2:0] cfg_function_number_d; + wire cfg_turnoff_ok_w; + + wire cfg_mgmt_rd_wr_done_n; + wire pl_phy_lnk_up_n; + wire cfg_err_aer_headerlog_set_n; + + assign cfg_received_func_lvl_rst = ~cfg_received_func_lvl_rst_n; + + assign cfg_err_cpl_rdy = ~cfg_err_cpl_rdy_n; + + assign cfg_interrupt_rdy = ~cfg_interrupt_rdy_n; + + assign cfg_mgmt_rd_wr_done = ~cfg_mgmt_rd_wr_done_n; + + assign pl_phy_lnk_up = ~pl_phy_lnk_up_n; + + assign cfg_err_aer_headerlog_set = ~cfg_err_aer_headerlog_set_n; + + assign cfg_to_turnoff = cfg_msg_received_pme_to; + + assign cfg_status = {16'b0}; + + assign cfg_command = {5'b0, + cfg_command_interrupt_disable, + 1'b0, + cfg_command_serr_en, + 5'b0, + cfg_command_bus_master_enable, + cfg_command_mem_enable, + cfg_command_io_enable}; + + assign cfg_dstatus = {10'h0, + cfg_trn_pending, + 1'b0, + cfg_dev_status_ur_detected, + cfg_dev_status_fatal_err_detected, + cfg_dev_status_non_fatal_err_detected, + cfg_dev_status_corr_err_detected}; + + assign cfg_dcommand = {1'b0, + cfg_dev_control_max_read_req, + cfg_dev_control_no_snoop_en, + cfg_dev_control_aux_power_en, + cfg_dev_control_phantom_en, + cfg_dev_control_ext_tag_en, + cfg_dev_control_max_payload, + cfg_dev_control_enable_ro, + cfg_dev_control_ur_err_reporting_en, + cfg_dev_control_fatal_err_reporting_en, + cfg_dev_control_non_fatal_reporting_en, + cfg_dev_control_corr_err_reporting_en }; + + assign cfg_lstatus = {cfg_link_status_auto_bandwidth_status, + cfg_link_status_bandwidth_status, + cfg_link_status_dll_active, + (LINK_STATUS_SLOT_CLOCK_CONFIG == "TRUE") ? 1'b1 : 1'b0, + cfg_link_status_link_training, + 1'b0, + {2'b00, cfg_link_status_negotiated_width}, + {2'b00, cfg_link_status_current_speed} }; + + assign cfg_lcommand = {4'b0, + cfg_link_control_auto_bandwidth_int_en, + cfg_link_control_bandwidth_int_en, + cfg_link_control_hw_auto_width_dis, + cfg_link_control_clock_pm_en, + cfg_link_control_extended_sync, + cfg_link_control_common_clock, + cfg_link_control_retrain_link, + cfg_link_control_link_disable, + cfg_link_control_rcb, + 1'b0, + cfg_link_control_aspm_control}; + + assign cfg_bus_number = cfg_bus_number_d; + + assign cfg_device_number = cfg_device_number_d; + + assign cfg_function_number = cfg_function_number_d; + + assign cfg_dcommand2 = {4'b0, + cfg_dev_control2_tlp_prefix_block, + cfg_dev_control2_ltr_en, + cfg_dev_control2_ido_cpl_en, + cfg_dev_control2_ido_req_en, + cfg_dev_control2_atomic_egress_block, + cfg_dev_control2_atomic_requester_en, + cfg_dev_control2_ari_forward_en, + cfg_dev_control2_cpl_timeout_dis, + cfg_dev_control2_cpl_timeout_val}; + + // Capture Bus/Device/Function number + + always @(posedge user_clk_out) begin + if (~user_lnk_up) + begin + cfg_bus_number_d <= 8'b0; + end // if (~user_lnk_up) + else if (~cfg_msg_received) + begin + cfg_bus_number_d <= cfg_msg_data[15:8]; + end // if (~cfg_msg_received) + end + + always @(posedge user_clk_out) begin + if (~user_lnk_up) + begin + cfg_device_number_d <= 5'b0; + end // if (~user_lnk_up) + else if (~cfg_msg_received) + begin + cfg_device_number_d <= cfg_msg_data[7:3]; + end // if (~cfg_msg_received) + end + + always @(posedge user_clk_out) begin + if (~user_lnk_up) + begin + cfg_function_number_d <= 3'b0; + end // if (~user_lnk_up) + else if (~cfg_msg_received) + begin + cfg_function_number_d <= cfg_msg_data[2:0]; + end // if (~cfg_msg_received) + end + +pcie_7x_0_axi_basic_top #( + .C_DATA_WIDTH (C_DATA_WIDTH), // RX/TX interface data width + .C_FAMILY ("X7"), // Targeted FPGA family + .C_ROOT_PORT ("FALSE"), // PCIe block is in root port mode + .C_PM_PRIORITY ("FALSE") // Disable TX packet boundary thrtl + + ) axi_basic_top ( + //---------------------------------------------// + // User Design I/O // + //---------------------------------------------// + + // AXI TX + //----------- + .s_axis_tx_tdata (s_axis_tx_tdata), // input + .s_axis_tx_tvalid (s_axis_tx_tvalid), // input + .s_axis_tx_tready (s_axis_tx_tready), // output + .s_axis_tx_tkeep (s_axis_tx_tkeep), // input + .s_axis_tx_tlast (s_axis_tx_tlast), // input + .s_axis_tx_tuser (s_axis_tx_tuser), // input + + // AXI RX + //----------- + .m_axis_rx_tdata (m_axis_rx_tdata), // output + .m_axis_rx_tvalid (m_axis_rx_tvalid), // output + .m_axis_rx_tready (m_axis_rx_tready), // input + .m_axis_rx_tkeep (m_axis_rx_tkeep), // output + .m_axis_rx_tlast (m_axis_rx_tlast), // output + .m_axis_rx_tuser (m_axis_rx_tuser), // output + + // User Misc. + //----------- + .user_turnoff_ok (cfg_turnoff_ok), // input + .user_tcfg_gnt (tx_cfg_gnt), // input + + //---------------------------------------------// + // PCIe Block I/O // + //---------------------------------------------// + + // TRN TX + //----------- + .trn_td (trn_td), // output + .trn_tsof (trn_tsof), // output + .trn_teof (trn_teof), // output + .trn_tsrc_rdy (trn_tsrc_rdy), // output + .trn_tdst_rdy (trn_tdst_rdy), // input + .trn_tsrc_dsc (trn_tsrc_dsc), // output + .trn_trem (trn_trem), // output + .trn_terrfwd (trn_terrfwd), // output + .trn_tstr (trn_tstr), // output + .trn_tbuf_av (tx_buf_av), // input + .trn_tecrc_gen (trn_tecrc_gen), // output + + // TRN RX + //----------- + .trn_rd (trn_rd), // input + .trn_rsof (trn_rsof), // input + .trn_reof (trn_reof), // input + .trn_rsrc_rdy (trn_rsrc_rdy), // input + .trn_rdst_rdy (trn_rdst_rdy), // output + .trn_rsrc_dsc (trn_rsrc_dsc), // input + .trn_rrem (trn_rrem), // input + .trn_rerrfwd (trn_rerrfwd), // input + .trn_rbar_hit (trn_rbar_hit[6:0]), // input + .trn_recrc_err (trn_recrc_err), // input + + // TRN Misc. + //----------- + .trn_tcfg_req ( tx_cfg_req ), // input + .trn_tcfg_gnt ( trn_tcfg_gnt), // output + .trn_lnk_up ( user_lnk_up), // input + + // Fuji3/Virtex6 PM + //----------- + .cfg_pcie_link_state (cfg_pcie_link_state), // input + + // Virtex6 PM + //----------- + .cfg_pm_send_pme_to (1'b0), // input NOT USED FOR EP + .cfg_pmcsr_powerstate (cfg_pmcsr_powerstate), // input + .trn_rdllp_data (32'b0), // input - Not used in 7-series + .trn_rdllp_src_rdy (1'b0), // input -- Not used in 7-series + + // Power Mgmt for S6/V6 + //----------- + .cfg_to_turnoff (cfg_to_turnoff), // input + .cfg_turnoff_ok (cfg_turnoff_ok_w), // output + + // System + //----------- + .user_clk (user_clk_out), // input + .user_rst (user_reset), // input + .np_counter () // output + + ); + + + //------------------------------------------------------- + // PCI Express Pipe Wrapper + //------------------------------------------------------- +pcie_7x_0_pcie_7x # ( + .AER_BASE_PTR ( AER_BASE_PTR ), + .AER_CAP_ECRC_CHECK_CAPABLE ( AER_CAP_ECRC_CHECK_CAPABLE ), + .AER_CAP_ECRC_GEN_CAPABLE( AER_CAP_ECRC_GEN_CAPABLE ), + .AER_CAP_ID ( AER_CAP_ID ), + .AER_CAP_MULTIHEADER ( AER_CAP_MULTIHEADER ), + .AER_CAP_NEXTPTR ( AER_CAP_NEXTPTR ), + .AER_CAP_ON ( AER_CAP_ON ), + .AER_CAP_OPTIONAL_ERR_SUPPORT ( AER_CAP_OPTIONAL_ERR_SUPPORT ), + .AER_CAP_PERMIT_ROOTERR_UPDATE ( AER_CAP_PERMIT_ROOTERR_UPDATE ), + .AER_CAP_VERSION ( AER_CAP_VERSION ), + .ALLOW_X8_GEN2 (ALLOW_X8_GEN2), + .BAR0 ( BAR0 ), + .BAR1 ( BAR1 ), + .BAR2 ( BAR2 ), + .BAR3 ( BAR3 ), + .BAR4 ( BAR4 ), + .BAR5 ( BAR5 ), + .C_DATA_WIDTH ( C_DATA_WIDTH ), + .CAPABILITIES_PTR( CAPABILITIES_PTR ), + .CFG_ECRC_ERR_CPLSTAT ( CFG_ECRC_ERR_CPLSTAT ), + .CARDBUS_CIS_POINTER ( CARDBUS_CIS_POINTER ), + .CLASS_CODE ( CLASS_CODE ), + .CMD_INTX_IMPLEMENTED ( CMD_INTX_IMPLEMENTED ), + .CPL_TIMEOUT_DISABLE_SUPPORTED ( CPL_TIMEOUT_DISABLE_SUPPORTED ), + .CPL_TIMEOUT_RANGES_SUPPORTED ( CPL_TIMEOUT_RANGES_SUPPORTED ), + .CRM_MODULE_RSTS (CRM_MODULE_RSTS), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ), + .DEV_CAP_ENDPOINT_L0S_LATENCY ( DEV_CAP_ENDPOINT_L0S_LATENCY ), + .DEV_CAP_ENDPOINT_L1_LATENCY ( DEV_CAP_ENDPOINT_L1_LATENCY ), + .DEV_CAP_EXT_TAG_SUPPORTED ( DEV_CAP_EXT_TAG_SUPPORTED ), + .DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ( DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ), + .DEV_CAP_MAX_PAYLOAD_SUPPORTED ( DEV_CAP_MAX_PAYLOAD_SUPPORTED ), + .DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ( DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ), + .DEV_CAP_ROLE_BASED_ERROR( DEV_CAP_ROLE_BASED_ERROR ), + .DEV_CAP_RSVD_14_12 ( DEV_CAP_RSVD_14_12 ), + .DEV_CAP_RSVD_17_16 ( DEV_CAP_RSVD_17_16 ), + .DEV_CAP_RSVD_31_29 ( DEV_CAP_RSVD_31_29 ), + .DEV_CONTROL_AUX_POWER_SUPPORTED ( DEV_CONTROL_AUX_POWER_SUPPORTED ), + .DEV_CONTROL_EXT_TAG_DEFAULT ( DEV_CONTROL_EXT_TAG_DEFAULT ), + .DISABLE_ASPM_L1_TIMER ( DISABLE_ASPM_L1_TIMER ), + .DISABLE_BAR_FILTERING ( DISABLE_BAR_FILTERING ), + .DISABLE_ID_CHECK( DISABLE_ID_CHECK ), + .DISABLE_LANE_REVERSAL ( DISABLE_LANE_REVERSAL ), + .DISABLE_RX_POISONED_RESP (DISABLE_RX_POISONED_RESP), + .DISABLE_RX_TC_FILTER ( DISABLE_RX_TC_FILTER ), + .DISABLE_SCRAMBLING ( DISABLE_SCRAMBLING ), + .DNSTREAM_LINK_NUM ( DNSTREAM_LINK_NUM ), + .DSN_BASE_PTR ( DSN_BASE_PTR ), + .DSN_CAP_ID ( DSN_CAP_ID ), + .DSN_CAP_NEXTPTR ( DSN_CAP_NEXTPTR ), + .DSN_CAP_ON ( DSN_CAP_ON ), + .DSN_CAP_VERSION ( DSN_CAP_VERSION ), + .DEV_CAP2_ARI_FORWARDING_SUPPORTED(DEV_CAP2_ARI_FORWARDING_SUPPORTED), + .DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED (DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED), + .DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED (DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED), + .DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED (DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED), + .DEV_CAP2_CAS128_COMPLETER_SUPPORTED (DEV_CAP2_CAS128_COMPLETER_SUPPORTED), + .DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED (DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED), + .DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED (DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED), + .DEV_CAP2_LTR_MECHANISM_SUPPORTED (DEV_CAP2_LTR_MECHANISM_SUPPORTED), + .DEV_CAP2_MAX_ENDEND_TLP_PREFIXES (DEV_CAP2_MAX_ENDEND_TLP_PREFIXES), + .DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING (DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING), + .DEV_CAP2_TPH_COMPLETER_SUPPORTED (DEV_CAP2_TPH_COMPLETER_SUPPORTED), + .DISABLE_ERR_MSG (DISABLE_ERR_MSG), + .DISABLE_LOCKED_FILTER (DISABLE_LOCKED_FILTER), + .DISABLE_PPM_FILTER (DISABLE_PPM_FILTER), + .ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED (ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED), + .ENABLE_MSG_ROUTE( ENABLE_MSG_ROUTE ), + .ENABLE_RX_TD_ECRC_TRIM ( ENABLE_RX_TD_ECRC_TRIM ), + .ENTER_RVRY_EI_L0( ENTER_RVRY_EI_L0 ), + .EXIT_LOOPBACK_ON_EI (EXIT_LOOPBACK_ON_EI), + .EXPANSION_ROM ( EXPANSION_ROM ), + .EXT_CFG_CAP_PTR ( EXT_CFG_CAP_PTR ), + .EXT_CFG_XP_CAP_PTR ( EXT_CFG_XP_CAP_PTR ), + .HEADER_TYPE ( HEADER_TYPE ), + .INFER_EI( INFER_EI ), + .INTERRUPT_PIN ( INTERRUPT_PIN ), + .INTERRUPT_STAT_AUTO (INTERRUPT_STAT_AUTO), + .IS_SWITCH ( IS_SWITCH ), + .LAST_CONFIG_DWORD ( LAST_CONFIG_DWORD ), + .LINK_CAP_ASPM_OPTIONALITY ( LINK_CAP_ASPM_OPTIONALITY ), + .LINK_CAP_ASPM_SUPPORT ( LINK_CAP_ASPM_SUPPORT ), + .LINK_CAP_CLOCK_POWER_MANAGEMENT ( LINK_CAP_CLOCK_POWER_MANAGEMENT ), + .LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ( LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_GEN2 ), + .LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP (LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP), + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .LINK_CAP_RSVD_23( LINK_CAP_RSVD_23 ), + .LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ( LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ), + .LINK_CONTROL_RCB( LINK_CONTROL_RCB ), + .LINK_CTRL2_DEEMPHASIS ( LINK_CTRL2_DEEMPHASIS ), + .LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ( LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ), + .LINK_CTRL2_TARGET_LINK_SPEED ( LINK_CTRL2_TARGET_LINK_SPEED ), + .LINK_STATUS_SLOT_CLOCK_CONFIG ( LINK_STATUS_SLOT_CLOCK_CONFIG ), + .LL_ACK_TIMEOUT ( LL_ACK_TIMEOUT ), + .LL_ACK_TIMEOUT_EN ( LL_ACK_TIMEOUT_EN ), + .LL_ACK_TIMEOUT_FUNC ( LL_ACK_TIMEOUT_FUNC ), + .LL_REPLAY_TIMEOUT ( LL_REPLAY_TIMEOUT ), + .LL_REPLAY_TIMEOUT_EN ( LL_REPLAY_TIMEOUT_EN ), + .LL_REPLAY_TIMEOUT_FUNC ( LL_REPLAY_TIMEOUT_FUNC ), + .LTSSM_MAX_LINK_WIDTH ( LTSSM_MAX_LINK_WIDTH ), + .MPS_FORCE (MPS_FORCE), + .MSI_BASE_PTR ( MSI_BASE_PTR ), + .MSI_CAP_ID ( MSI_CAP_ID ), + .MSI_CAP_MULTIMSGCAP ( MSI_CAP_MULTIMSGCAP ), + .MSI_CAP_MULTIMSG_EXTENSION ( MSI_CAP_MULTIMSG_EXTENSION ), + .MSI_CAP_NEXTPTR ( MSI_CAP_NEXTPTR ), + .MSI_CAP_ON ( MSI_CAP_ON ), + .MSI_CAP_PER_VECTOR_MASKING_CAPABLE ( MSI_CAP_PER_VECTOR_MASKING_CAPABLE ), + .MSI_CAP_64_BIT_ADDR_CAPABLE ( MSI_CAP_64_BIT_ADDR_CAPABLE ), + .MSIX_BASE_PTR ( MSIX_BASE_PTR ), + .MSIX_CAP_ID ( MSIX_CAP_ID ), + .MSIX_CAP_NEXTPTR( MSIX_CAP_NEXTPTR ), + .MSIX_CAP_ON ( MSIX_CAP_ON ), + .MSIX_CAP_PBA_BIR( MSIX_CAP_PBA_BIR ), + .MSIX_CAP_PBA_OFFSET ( MSIX_CAP_PBA_OFFSET ), + .MSIX_CAP_TABLE_BIR ( MSIX_CAP_TABLE_BIR ), + .MSIX_CAP_TABLE_OFFSET ( MSIX_CAP_TABLE_OFFSET ), + .MSIX_CAP_TABLE_SIZE ( MSIX_CAP_TABLE_SIZE ), + .N_FTS_COMCLK_GEN1 ( N_FTS_COMCLK_GEN1 ), + .N_FTS_COMCLK_GEN2 ( N_FTS_COMCLK_GEN2 ), + .N_FTS_GEN1 ( N_FTS_GEN1 ), + .N_FTS_GEN2 ( N_FTS_GEN2 ), + .PCIE_BASE_PTR ( PCIE_BASE_PTR ), + .PCIE_CAP_CAPABILITY_ID ( PCIE_CAP_CAPABILITY_ID ), + .PCIE_CAP_CAPABILITY_VERSION ( PCIE_CAP_CAPABILITY_VERSION ), + .PCIE_CAP_DEVICE_PORT_TYPE ( PCIE_CAP_DEVICE_PORT_TYPE ), + .PCIE_CAP_NEXTPTR( PCIE_CAP_NEXTPTR ), + .PCIE_CAP_ON ( PCIE_CAP_ON ), + .PCIE_CAP_RSVD_15_14 ( PCIE_CAP_RSVD_15_14 ), + .PCIE_CAP_SLOT_IMPLEMENTED ( PCIE_CAP_SLOT_IMPLEMENTED ), + .PCIE_REVISION ( PCIE_REVISION ), + .PL_AUTO_CONFIG ( PL_AUTO_CONFIG ), + .PL_FAST_TRAIN ( PL_FAST_TRAIN ), + .PM_ASPML0S_TIMEOUT ( PM_ASPML0S_TIMEOUT ), + .PM_ASPML0S_TIMEOUT_EN ( PM_ASPML0S_TIMEOUT_EN ), + .PM_ASPML0S_TIMEOUT_FUNC ( PM_ASPML0S_TIMEOUT_FUNC ), + .PM_ASPM_FASTEXIT ( PM_ASPM_FASTEXIT ), + .PM_BASE_PTR ( PM_BASE_PTR ), + .PM_CAP_AUXCURRENT ( PM_CAP_AUXCURRENT ), + .PM_CAP_D1SUPPORT( PM_CAP_D1SUPPORT ), + .PM_CAP_D2SUPPORT( PM_CAP_D2SUPPORT ), + .PM_CAP_DSI ( PM_CAP_DSI ), + .PM_CAP_ID ( PM_CAP_ID ), + .PM_CAP_NEXTPTR ( PM_CAP_NEXTPTR ), + .PM_CAP_ON ( PM_CAP_ON ), + .PM_CAP_PME_CLOCK( PM_CAP_PME_CLOCK ), + .PM_CAP_PMESUPPORT ( PM_CAP_PMESUPPORT ), + .PM_CAP_RSVD_04 ( PM_CAP_RSVD_04 ), + .PM_CAP_VERSION ( PM_CAP_VERSION ), + .PM_CSR_B2B3 ( PM_CSR_B2B3 ), + .PM_CSR_BPCCEN ( PM_CSR_BPCCEN ), + .PM_CSR_NOSOFTRST( PM_CSR_NOSOFTRST ), + .PM_DATA0( PM_DATA0 ), + .PM_DATA1( PM_DATA1 ), + .PM_DATA2( PM_DATA2 ), + .PM_DATA3( PM_DATA3 ), + .PM_DATA4( PM_DATA4 ), + .PM_DATA5( PM_DATA5 ), + .PM_DATA6( PM_DATA6 ), + .PM_DATA7( PM_DATA7 ), + .PM_DATA_SCALE0 ( PM_DATA_SCALE0 ), + .PM_DATA_SCALE1 ( PM_DATA_SCALE1 ), + .PM_DATA_SCALE2 ( PM_DATA_SCALE2 ), + .PM_DATA_SCALE3 ( PM_DATA_SCALE3 ), + .PM_DATA_SCALE4 ( PM_DATA_SCALE4 ), + .PM_DATA_SCALE5 ( PM_DATA_SCALE5 ), + .PM_DATA_SCALE6 ( PM_DATA_SCALE6 ), + .PM_DATA_SCALE7 ( PM_DATA_SCALE7 ), + .PM_MF (PM_MF), + .RBAR_BASE_PTR (RBAR_BASE_PTR), + .RBAR_CAP_CONTROL_ENCODEDBAR0 (RBAR_CAP_CONTROL_ENCODEDBAR0), + .RBAR_CAP_CONTROL_ENCODEDBAR1 (RBAR_CAP_CONTROL_ENCODEDBAR1), + .RBAR_CAP_CONTROL_ENCODEDBAR2 (RBAR_CAP_CONTROL_ENCODEDBAR2), + .RBAR_CAP_CONTROL_ENCODEDBAR3 (RBAR_CAP_CONTROL_ENCODEDBAR3), + .RBAR_CAP_CONTROL_ENCODEDBAR4 (RBAR_CAP_CONTROL_ENCODEDBAR4), + .RBAR_CAP_CONTROL_ENCODEDBAR5 (RBAR_CAP_CONTROL_ENCODEDBAR5), + .RBAR_CAP_ID (RBAR_CAP_ID), + .RBAR_CAP_INDEX0 (RBAR_CAP_INDEX0), + .RBAR_CAP_INDEX1 (RBAR_CAP_INDEX1), + .RBAR_CAP_INDEX2 (RBAR_CAP_INDEX2), + .RBAR_CAP_INDEX3 (RBAR_CAP_INDEX3), + .RBAR_CAP_INDEX4 (RBAR_CAP_INDEX4), + .RBAR_CAP_INDEX5 (RBAR_CAP_INDEX5), + .RBAR_CAP_NEXTPTR (RBAR_CAP_NEXTPTR), + .RBAR_CAP_ON (RBAR_CAP_ON), + .RBAR_CAP_SUP0 (RBAR_CAP_SUP0), + .RBAR_CAP_SUP1 (RBAR_CAP_SUP1), + .RBAR_CAP_SUP2 (RBAR_CAP_SUP2), + .RBAR_CAP_SUP3 (RBAR_CAP_SUP3), + .RBAR_CAP_SUP4 (RBAR_CAP_SUP4), + .RBAR_CAP_SUP5 (RBAR_CAP_SUP5), + .RBAR_CAP_VERSION (RBAR_CAP_VERSION), + .RBAR_NUM (RBAR_NUM), + .RECRC_CHK (RECRC_CHK), + .RECRC_CHK_TRIM (RECRC_CHK_TRIM), + .ROOT_CAP_CRS_SW_VISIBILITY ( ROOT_CAP_CRS_SW_VISIBILITY ), + .RP_AUTO_SPD ( RP_AUTO_SPD ), + .RP_AUTO_SPD_LOOPCNT ( RP_AUTO_SPD_LOOPCNT ), + .SELECT_DLL_IF ( SELECT_DLL_IF ), + .SLOT_CAP_ATT_BUTTON_PRESENT ( SLOT_CAP_ATT_BUTTON_PRESENT ), + .SLOT_CAP_ATT_INDICATOR_PRESENT ( SLOT_CAP_ATT_INDICATOR_PRESENT ), + .SLOT_CAP_ELEC_INTERLOCK_PRESENT ( SLOT_CAP_ELEC_INTERLOCK_PRESENT ), + .SLOT_CAP_HOTPLUG_CAPABLE( SLOT_CAP_HOTPLUG_CAPABLE ), + .SLOT_CAP_HOTPLUG_SURPRISE ( SLOT_CAP_HOTPLUG_SURPRISE ), + .SLOT_CAP_MRL_SENSOR_PRESENT ( SLOT_CAP_MRL_SENSOR_PRESENT ), + .SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ( SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ), + .SLOT_CAP_PHYSICAL_SLOT_NUM ( SLOT_CAP_PHYSICAL_SLOT_NUM ), + .SLOT_CAP_POWER_CONTROLLER_PRESENT ( SLOT_CAP_POWER_CONTROLLER_PRESENT ), + .SLOT_CAP_POWER_INDICATOR_PRESENT( SLOT_CAP_POWER_INDICATOR_PRESENT ), + .SLOT_CAP_SLOT_POWER_LIMIT_SCALE ( SLOT_CAP_SLOT_POWER_LIMIT_SCALE ), + .SLOT_CAP_SLOT_POWER_LIMIT_VALUE ( SLOT_CAP_SLOT_POWER_LIMIT_VALUE ), + .SPARE_BIT0 ( SPARE_BIT0 ), + .SPARE_BIT1 ( SPARE_BIT1 ), + .SPARE_BIT2 ( SPARE_BIT2 ), + .SPARE_BIT3 ( SPARE_BIT3 ), + .SPARE_BIT4 ( SPARE_BIT4 ), + .SPARE_BIT5 ( SPARE_BIT5 ), + .SPARE_BIT6 ( SPARE_BIT6 ), + .SPARE_BIT7 ( SPARE_BIT7 ), + .SPARE_BIT8 ( SPARE_BIT8 ), + .SPARE_BYTE0 ( SPARE_BYTE0 ), + .SPARE_BYTE1 ( SPARE_BYTE1 ), + .SPARE_BYTE2 ( SPARE_BYTE2 ), + .SPARE_BYTE3 ( SPARE_BYTE3 ), + .SPARE_WORD0 ( SPARE_WORD0 ), + .SPARE_WORD1 ( SPARE_WORD1 ), + .SPARE_WORD2 ( SPARE_WORD2 ), + .SPARE_WORD3 ( SPARE_WORD3 ), + .SSL_MESSAGE_AUTO (SSL_MESSAGE_AUTO), + .TECRC_EP_INV ( TECRC_EP_INV ), + .TL_RBYPASS(TL_RBYPASS), + .TL_RX_RAM_RADDR_LATENCY ( TL_RX_RAM_RADDR_LATENCY ), + .TL_RX_RAM_RDATA_LATENCY ( TL_RX_RAM_RDATA_LATENCY ), + .TL_RX_RAM_WRITE_LATENCY ( TL_RX_RAM_WRITE_LATENCY ), + .TL_TFC_DISABLE ( TL_TFC_DISABLE ), + .TL_TX_CHECKS_DISABLE ( TL_TX_CHECKS_DISABLE ), + .TL_TX_RAM_RADDR_LATENCY ( TL_TX_RAM_RADDR_LATENCY ), + .TL_TX_RAM_RDATA_LATENCY ( TL_TX_RAM_RDATA_LATENCY ), + .TL_TX_RAM_WRITE_LATENCY ( TL_TX_RAM_WRITE_LATENCY ), + .TRN_DW (TRN_DW), + .TRN_NP_FC (TRN_NP_FC), + .UPCONFIG_CAPABLE( UPCONFIG_CAPABLE ), + .UPSTREAM_FACING ( UPSTREAM_FACING ), + .UR_ATOMIC (UR_ATOMIC), + .UR_CFG1 (UR_CFG1), + .UR_INV_REQ(UR_INV_REQ), + .UR_PRS_RESPONSE (UR_PRS_RESPONSE), + .USER_CLK2_DIV2 (USER_CLK2_DIV2), + .USER_CLK_FREQ ( USER_CLK_FREQ ), + .USE_RID_PINS (USE_RID_PINS), + .VC0_CPL_INFINITE( VC0_CPL_INFINITE ), + .VC0_RX_RAM_LIMIT( VC0_RX_RAM_LIMIT ), + .VC0_TOTAL_CREDITS_CD ( VC0_TOTAL_CREDITS_CD ), + .VC0_TOTAL_CREDITS_CH ( VC0_TOTAL_CREDITS_CH ), + .VC0_TOTAL_CREDITS_NPD (VC0_TOTAL_CREDITS_NPD), + .VC0_TOTAL_CREDITS_NPH ( VC0_TOTAL_CREDITS_NPH ), + .VC0_TOTAL_CREDITS_PD ( VC0_TOTAL_CREDITS_PD ), + .VC0_TOTAL_CREDITS_PH ( VC0_TOTAL_CREDITS_PH ), + .VC0_TX_LASTPACKET ( VC0_TX_LASTPACKET ), + .VC_BASE_PTR ( VC_BASE_PTR ), + .VC_CAP_ID ( VC_CAP_ID ), + .VC_CAP_NEXTPTR ( VC_CAP_NEXTPTR ), + .VC_CAP_ON ( VC_CAP_ON ), + .VC_CAP_REJECT_SNOOP_TRANSACTIONS( VC_CAP_REJECT_SNOOP_TRANSACTIONS ), + .VC_CAP_VERSION ( VC_CAP_VERSION ), + .VSEC_BASE_PTR ( VSEC_BASE_PTR ), + .VSEC_CAP_HDR_ID ( VSEC_CAP_HDR_ID ), + .VSEC_CAP_HDR_LENGTH ( VSEC_CAP_HDR_LENGTH ), + .VSEC_CAP_HDR_REVISION ( VSEC_CAP_HDR_REVISION ), + .VSEC_CAP_ID ( VSEC_CAP_ID ), + .VSEC_CAP_IS_LINK_VISIBLE( VSEC_CAP_IS_LINK_VISIBLE ), + .VSEC_CAP_NEXTPTR( VSEC_CAP_NEXTPTR ), + .VSEC_CAP_ON ( VSEC_CAP_ON ), + .VSEC_CAP_VERSION( VSEC_CAP_VERSION ), + .ENABLE_JTAG_DBG ( ENABLE_JTAG_DBG ) + ) pcie_7x_i ( + .trn_lnk_up ( trn_lnk_up ), + .trn_clk ( user_clk_out ), + .lnk_clk_en ( lnk_clk_en), + .user_rst_n ( user_rst_n ), + .received_func_lvl_rst_n ( cfg_received_func_lvl_rst_n ), + .sys_rst_n (~phy_rdy_n), + .pl_rst_n ( 1'b1 ), + .dl_rst_n ( 1'b1 ), + .tl_rst_n ( 1'b1 ), + .cm_sticky_rst_n ( 1'b1 ), + + .func_lvl_rst_n ( func_lvl_rst_n ), + .cm_rst_n ( cm_rst_n ), + .trn_rbar_hit ( trn_rbar_hit ), + .trn_rd ( trn_rd ), + .trn_recrc_err ( trn_recrc_err ), + .trn_reof ( trn_reof ), + .trn_rerrfwd ( trn_rerrfwd ), + .trn_rrem ( trn_rrem ), + .trn_rsof ( trn_rsof ), + .trn_rsrc_dsc ( trn_rsrc_dsc ), + .trn_rsrc_rdy ( trn_rsrc_rdy ), + .trn_rdst_rdy ( trn_rdst_rdy ), + .trn_rnp_ok ( rx_np_ok ), + .trn_rnp_req ( rx_np_req ), + .trn_rfcp_ret ( 1'b1 ), + .trn_tbuf_av ( tx_buf_av ), + .trn_tcfg_req ( tx_cfg_req ), + .trn_tdllp_dst_rdy ( ), + .trn_tdst_rdy ( trn_tdst_rdy ), + .trn_terr_drop ( tx_err_drop ), + .trn_tcfg_gnt ( trn_tcfg_gnt ), + .trn_td ( trn_td ), + .trn_tdllp_data ( 32'b0 ), + .trn_tdllp_src_rdy ( 1'b0 ), + .trn_tecrc_gen ( trn_tecrc_gen ), + .trn_teof ( trn_teof ), + .trn_terrfwd ( trn_terrfwd ), + .trn_trem ( trn_trem), + .trn_tsof ( trn_tsof ), + .trn_tsrc_dsc ( trn_tsrc_dsc ), + .trn_tsrc_rdy ( trn_tsrc_rdy ), + .trn_tstr ( trn_tstr ), + + .trn_fc_cpld ( fc_cpld ), + .trn_fc_cplh ( fc_cplh ), + .trn_fc_npd ( fc_npd ), + .trn_fc_nph ( fc_nph ), + .trn_fc_pd ( fc_pd ), + .trn_fc_ph ( fc_ph ), + .trn_fc_sel ( fc_sel ), + + .cfg_dev_id (cfg_dev_id), + .cfg_vend_id (cfg_vend_id), + .cfg_rev_id (cfg_rev_id), + .cfg_subsys_id (cfg_subsys_id), + .cfg_subsys_vend_id (cfg_subsys_vend_id), + .cfg_pciecap_interrupt_msgnum (cfg_pciecap_interrupt_msgnum), + + .cfg_bridge_serr_en (cfg_bridge_serr_en), + + .cfg_command_bus_master_enable ( cfg_command_bus_master_enable ), + .cfg_command_interrupt_disable ( cfg_command_interrupt_disable ), + .cfg_command_io_enable ( cfg_command_io_enable ), + .cfg_command_mem_enable ( cfg_command_mem_enable ), + .cfg_command_serr_en ( cfg_command_serr_en ), + .cfg_dev_control_aux_power_en ( cfg_dev_control_aux_power_en ), + .cfg_dev_control_corr_err_reporting_en ( cfg_dev_control_corr_err_reporting_en ), + .cfg_dev_control_enable_ro ( cfg_dev_control_enable_ro ), + .cfg_dev_control_ext_tag_en ( cfg_dev_control_ext_tag_en ), + .cfg_dev_control_fatal_err_reporting_en ( cfg_dev_control_fatal_err_reporting_en ), + .cfg_dev_control_max_payload ( cfg_dev_control_max_payload ), + .cfg_dev_control_max_read_req ( cfg_dev_control_max_read_req ), + .cfg_dev_control_non_fatal_reporting_en ( cfg_dev_control_non_fatal_reporting_en ), + .cfg_dev_control_no_snoop_en ( cfg_dev_control_no_snoop_en ), + .cfg_dev_control_phantom_en ( cfg_dev_control_phantom_en ), + .cfg_dev_control_ur_err_reporting_en ( cfg_dev_control_ur_err_reporting_en ), + .cfg_dev_control2_cpl_timeout_dis ( cfg_dev_control2_cpl_timeout_dis ), + .cfg_dev_control2_cpl_timeout_val ( cfg_dev_control2_cpl_timeout_val ), + .cfg_dev_control2_ari_forward_en ( cfg_dev_control2_ari_forward_en), + .cfg_dev_control2_atomic_requester_en ( cfg_dev_control2_atomic_requester_en), + .cfg_dev_control2_atomic_egress_block ( cfg_dev_control2_atomic_egress_block), + .cfg_dev_control2_ido_req_en ( cfg_dev_control2_ido_req_en), + .cfg_dev_control2_ido_cpl_en ( cfg_dev_control2_ido_cpl_en), + .cfg_dev_control2_ltr_en ( cfg_dev_control2_ltr_en), + .cfg_dev_control2_tlp_prefix_block ( cfg_dev_control2_tlp_prefix_block), + .cfg_dev_status_corr_err_detected ( cfg_dev_status_corr_err_detected ), + .cfg_dev_status_fatal_err_detected ( cfg_dev_status_fatal_err_detected ), + .cfg_dev_status_non_fatal_err_detected ( cfg_dev_status_non_fatal_err_detected ), + .cfg_dev_status_ur_detected ( cfg_dev_status_ur_detected ), + + .cfg_mgmt_do ( cfg_mgmt_do ), + .cfg_err_aer_headerlog_set_n ( cfg_err_aer_headerlog_set_n), + .cfg_err_aer_headerlog ( cfg_err_aer_headerlog), + .cfg_err_cpl_rdy_n ( cfg_err_cpl_rdy_n ), + .cfg_interrupt_do ( cfg_interrupt_do ), + .cfg_interrupt_mmenable ( cfg_interrupt_mmenable ), + .cfg_interrupt_msienable ( cfg_interrupt_msienable ), + .cfg_interrupt_msixenable ( cfg_interrupt_msixenable ), + .cfg_interrupt_msixfm ( cfg_interrupt_msixfm ), + .cfg_interrupt_rdy_n ( cfg_interrupt_rdy_n ), + .cfg_link_control_rcb ( cfg_link_control_rcb ), + .cfg_link_control_aspm_control ( cfg_link_control_aspm_control ), + .cfg_link_control_auto_bandwidth_int_en ( cfg_link_control_auto_bandwidth_int_en ), + .cfg_link_control_bandwidth_int_en ( cfg_link_control_bandwidth_int_en ), + .cfg_link_control_clock_pm_en ( cfg_link_control_clock_pm_en ), + .cfg_link_control_common_clock ( cfg_link_control_common_clock ), + .cfg_link_control_extended_sync ( cfg_link_control_extended_sync ), + .cfg_link_control_hw_auto_width_dis ( cfg_link_control_hw_auto_width_dis ), + .cfg_link_control_link_disable ( cfg_link_control_link_disable ), + .cfg_link_control_retrain_link ( cfg_link_control_retrain_link ), + .cfg_link_status_auto_bandwidth_status ( cfg_link_status_auto_bandwidth_status ), + .cfg_link_status_bandwidth_status ( cfg_link_status_bandwidth_status ), + .cfg_link_status_current_speed ( cfg_link_status_current_speed ), + .cfg_link_status_dll_active ( cfg_link_status_dll_active ), + .cfg_link_status_link_training ( cfg_link_status_link_training ), + .cfg_link_status_negotiated_width ( cfg_link_status_negotiated_width), + .cfg_msg_data ( cfg_msg_data ), + .cfg_msg_received ( cfg_msg_received ), + .cfg_msg_received_assert_int_a ( cfg_msg_received_assert_int_a), + .cfg_msg_received_assert_int_b ( cfg_msg_received_assert_int_b), + .cfg_msg_received_assert_int_c ( cfg_msg_received_assert_int_c), + .cfg_msg_received_assert_int_d ( cfg_msg_received_assert_int_d), + .cfg_msg_received_deassert_int_a ( cfg_msg_received_deassert_int_a), + .cfg_msg_received_deassert_int_b ( cfg_msg_received_deassert_int_b), + .cfg_msg_received_deassert_int_c ( cfg_msg_received_deassert_int_c), + .cfg_msg_received_deassert_int_d ( cfg_msg_received_deassert_int_d), + .cfg_msg_received_err_cor ( cfg_msg_received_err_cor), + .cfg_msg_received_err_fatal ( cfg_msg_received_err_fatal), + .cfg_msg_received_err_non_fatal ( cfg_msg_received_err_non_fatal), + .cfg_msg_received_pm_as_nak ( cfg_msg_received_pm_as_nak), + .cfg_msg_received_pme_to ( cfg_msg_received_pme_to ), + .cfg_msg_received_pme_to_ack ( cfg_msg_received_pme_to_ack), + .cfg_msg_received_pm_pme ( cfg_msg_received_pm_pme), + .cfg_msg_received_setslotpowerlimit ( cfg_msg_received_setslotpowerlimit), + .cfg_msg_received_unlock ( cfg_msg_received_unlock), + .cfg_pcie_link_state ( cfg_pcie_link_state ), + .cfg_pmcsr_pme_en ( cfg_pmcsr_pme_en), + .cfg_pmcsr_powerstate ( cfg_pmcsr_powerstate), + .cfg_pmcsr_pme_status ( cfg_pmcsr_pme_status), + .cfg_pm_rcv_as_req_l1_n ( cfg_pm_rcv_as_req_l1_n), + .cfg_pm_rcv_enter_l1_n ( cfg_pm_rcv_enter_l1_n), + .cfg_pm_rcv_enter_l23_n ( cfg_pm_rcv_enter_l23_n), + + .cfg_pm_rcv_req_ack_n ( cfg_pm_rcv_req_ack_n), + .cfg_mgmt_rd_wr_done_n ( cfg_mgmt_rd_wr_done_n ), + .cfg_slot_control_electromech_il_ctl_pulse (cfg_slot_control_electromech_il_ctl_pulse), + .cfg_root_control_syserr_corr_err_en ( cfg_root_control_syserr_corr_err_en), + .cfg_root_control_syserr_non_fatal_err_en ( cfg_root_control_syserr_non_fatal_err_en), + .cfg_root_control_syserr_fatal_err_en ( cfg_root_control_syserr_fatal_err_en), + .cfg_root_control_pme_int_en ( cfg_root_control_pme_int_en ), + .cfg_aer_ecrc_check_en ( cfg_aer_ecrc_check_en ), + .cfg_aer_ecrc_gen_en ( cfg_aer_ecrc_gen_en ), + .cfg_aer_rooterr_corr_err_reporting_en ( cfg_aer_rooterr_corr_err_reporting_en), + .cfg_aer_rooterr_non_fatal_err_reporting_en( cfg_aer_rooterr_non_fatal_err_reporting_en), + .cfg_aer_rooterr_fatal_err_reporting_en ( cfg_aer_rooterr_fatal_err_reporting_en), + .cfg_aer_rooterr_corr_err_received ( cfg_aer_rooterr_corr_err_received), + .cfg_aer_rooterr_non_fatal_err_received ( cfg_aer_rooterr_non_fatal_err_received), + .cfg_aer_rooterr_fatal_err_received ( cfg_aer_rooterr_fatal_err_received), + .cfg_aer_interrupt_msgnum ( cfg_aer_interrupt_msgnum ), + .cfg_transaction ( cfg_transaction), + .cfg_transaction_addr ( cfg_transaction_addr), + .cfg_transaction_type ( cfg_transaction_type), + .cfg_vc_tcvc_map ( cfg_vc_tcvc_map), + .cfg_mgmt_byte_en_n ( cfg_mgmt_byte_en_n ), + .cfg_mgmt_di ( cfg_mgmt_di ), + .cfg_ds_bus_number ( cfg_ds_bus_number ), + .cfg_ds_device_number ( cfg_ds_device_number ), + .cfg_ds_function_number ( cfg_ds_function_number ), + .cfg_dsn ( cfg_dsn ), + .cfg_mgmt_dwaddr ( cfg_mgmt_dwaddr ), + .cfg_err_acs_n ( 1'b1 ), + .cfg_err_cor_n ( cfg_err_cor_n ), + .cfg_err_cpl_abort_n ( cfg_err_cpl_abort_n ), + .cfg_err_cpl_timeout_n ( cfg_err_cpl_timeout_n ), + .cfg_err_cpl_unexpect_n ( cfg_err_cpl_unexpect_n ), + .cfg_err_ecrc_n ( cfg_err_ecrc_n ), + .cfg_err_locked_n ( cfg_err_locked_n ), + .cfg_err_posted_n ( cfg_err_posted_n ), + .cfg_err_tlp_cpl_header ( cfg_err_tlp_cpl_header ), + .cfg_err_ur_n ( cfg_err_ur_n ), + .cfg_err_malformed_n ( cfg_err_malformed_n ), + .cfg_err_poisoned_n ( cfg_err_poisoned_n), + .cfg_err_atomic_egress_blocked_n ( cfg_err_atomic_egress_blocked_n ), + .cfg_err_mc_blocked_n ( cfg_err_mc_blocked_n ), + .cfg_err_internal_uncor_n ( cfg_err_internal_uncor_n ), + .cfg_err_internal_cor_n ( cfg_err_internal_cor_n ), + .cfg_err_norecovery_n ( cfg_err_norecovery_n ), + + .cfg_interrupt_assert_n ( cfg_interrupt_assert_n ), + .cfg_interrupt_di ( cfg_interrupt_di ), + .cfg_interrupt_n ( cfg_interrupt_n ), + .cfg_interrupt_stat_n ( cfg_interrupt_stat_n), + .cfg_pm_send_pme_to_n ( cfg_pm_send_pme_to_n ), + .cfg_pm_turnoff_ok_n ( cfg_turnoff_ok_w ), + .cfg_pm_wake_n ( cfg_pm_wake_n ), + .cfg_pm_halt_aspm_l0s_n ( cfg_pm_halt_aspm_l0s_n ), + .cfg_pm_halt_aspm_l1_n ( cfg_pm_halt_aspm_l1_n ), + .cfg_pm_force_state_en_n ( cfg_pm_force_state_en_n ), + .cfg_pm_force_state ( cfg_pm_force_state ), + .cfg_force_mps ( cfg_force_mps ), + .cfg_force_common_clock_off ( cfg_force_common_clock_off ), + .cfg_force_extended_sync_on ( cfg_force_extended_sync_on ), + .cfg_port_number ( cfg_port_number ), + .cfg_mgmt_rd_en_n ( cfg_mgmt_rd_en_n ), + .cfg_trn_pending_n ( ~cfg_trn_pending ), + .cfg_mgmt_wr_en_n ( cfg_mgmt_wr_en_n ), + .cfg_mgmt_wr_readonly_n ( cfg_mgmt_wr_readonly_n ), + .cfg_mgmt_wr_rw1c_as_rw_n ( cfg_mgmt_wr_rw1c_as_rw_n ), + + .pl_initial_link_width ( pl_initial_link_width ), + .pl_lane_reversal_mode ( pl_lane_reversal_mode ), + .pl_link_gen2_cap ( pl_link_gen2_cap ), + .pl_link_partner_gen2_supported ( pl_link_partner_gen2_supported ), + .pl_link_upcfg_cap ( pl_link_upcfg_cap ), + .pl_ltssm_state ( pl_ltssm_state ), + .pl_phy_lnk_up_n ( pl_phy_lnk_up_n ), + .pl_received_hot_rst ( pl_received_hot_rst ), + .pl_rx_pm_state ( pl_rx_pm_state ), + .pl_sel_lnk_rate ( pl_sel_lnk_rate), + .pl_sel_lnk_width ( pl_sel_lnk_width ), + .pl_tx_pm_state ( pl_tx_pm_state ), + .pl_directed_link_auton ( pl_directed_link_auton ), + .pl_directed_link_change ( pl_directed_link_change ), + .pl_directed_link_speed ( pl_directed_link_speed ), + .pl_directed_link_width ( pl_directed_link_width ), + .pl_downstream_deemph_source ( pl_downstream_deemph_source ), + .pl_upstream_prefer_deemph ( pl_upstream_prefer_deemph ), + .pl_transmit_hot_rst ( pl_transmit_hot_rst ), + .pl_directed_ltssm_new_vld ( pl_directed_ltssm_new_vld ), + .pl_directed_ltssm_new ( pl_directed_ltssm_new ), + .pl_directed_ltssm_stall ( pl_directed_ltssm_stall ), + .pl_directed_change_done ( pl_directed_change_done ), + + .dbg_sclr_a ( dbg_sclr_a ), + .dbg_sclr_b ( dbg_sclr_b ), + .dbg_sclr_c ( dbg_sclr_c ), + .dbg_sclr_d ( dbg_sclr_d ), + .dbg_sclr_e ( dbg_sclr_e ), + .dbg_sclr_f ( dbg_sclr_f ), + .dbg_sclr_g ( dbg_sclr_g ), + .dbg_sclr_h ( dbg_sclr_h ), + .dbg_sclr_i ( dbg_sclr_i ), + .dbg_sclr_j ( dbg_sclr_j ), + .dbg_sclr_k ( dbg_sclr_k ), + + .dbg_vec_a ( dbg_vec_a ), + .dbg_vec_b ( dbg_vec_b ), + .dbg_vec_c ( dbg_vec_c ), + .pl_dbg_vec ( pl_dbg_vec ), + .dbg_mode ( dbg_mode ), + .dbg_sub_mode ( dbg_sub_mode ), + .pl_dbg_mode ( pl_dbg_mode ), + + .drp_do ( drp_do ), + .drp_rdy ( drp_rdy ), + .drp_clk ( drp_clk ), + .drp_addr ( drp_addr ), + .drp_en ( drp_en ), + .drp_di ( drp_di ), + .drp_we ( drp_we ), + + .ll2_tlp_rcv ( 1'b0 ), + .ll2_send_enter_l1 ( 1'b0 ), + .ll2_send_enter_l23 ( 1'b0 ), + .ll2_send_as_req_l1 ( 1'b0 ), + .ll2_send_pm_ack ( 1'b0 ), + .ll2_suspend_now ( 1'b0 ), + .ll2_tfc_init1_seq ( ), + .ll2_tfc_init2_seq ( ), + .ll2_suspend_ok ( ), + .ll2_tx_idle ( ), + .ll2_link_status ( ), + .ll2_receiver_err ( ), + .ll2_protocol_err ( ), + .ll2_bad_tlp_err ( ), + .ll2_bad_dllp_err ( ), + .ll2_replay_ro_err ( ), + .ll2_replay_to_err ( ), + .tl2_ppm_suspend_req ( 1'b0 ), + .tl2_aspm_suspend_credit_check ( 1'b0 ), + .tl2_ppm_suspend_ok ( ), + .tl2_aspm_suspend_req ( ), + .tl2_aspm_suspend_credit_check_ok ( ), + .tl2_err_hdr ( ), + .tl2_err_malformed ( ), + .tl2_err_rxoverflow ( ), + .tl2_err_fcpe ( ), + .pl2_directed_lstate ( 5'b0 ), + .pl2_suspend_ok ( ), + .pl2_recovery ( ), + .pl2_rx_elec_idle ( ), + .pl2_rx_pm_state ( ), + .pl2_l0_req ( ), + .pl2_link_up ( ), + .pl2_receiver_err ( ), + + .trn_rdllp_data (trn_rdllp_data ), + .trn_rdllp_src_rdy (trn_rdllp_src_rdy ), + + .pipe_clk ( pipe_clk ), + .user_clk2 ( user_clk2 ), + .user_clk ( user_clk ), + .user_clk_prebuf ( 1'b0 ), + .user_clk_prebuf_en ( 1'b0 ), + + .pipe_rx0_polarity ( pipe_rx0_polarity ), + .pipe_rx1_polarity ( pipe_rx1_polarity ), + .pipe_rx2_polarity ( pipe_rx2_polarity ), + .pipe_rx3_polarity ( pipe_rx3_polarity ), + .pipe_rx4_polarity ( pipe_rx4_polarity ), + .pipe_rx5_polarity ( pipe_rx5_polarity ), + .pipe_rx6_polarity ( pipe_rx6_polarity ), + .pipe_rx7_polarity ( pipe_rx7_polarity ), + .pipe_tx0_compliance ( pipe_tx0_compliance ), + .pipe_tx1_compliance ( pipe_tx1_compliance ), + .pipe_tx2_compliance ( pipe_tx2_compliance ), + .pipe_tx3_compliance ( pipe_tx3_compliance ), + .pipe_tx4_compliance ( pipe_tx4_compliance ), + .pipe_tx5_compliance ( pipe_tx5_compliance ), + .pipe_tx6_compliance ( pipe_tx6_compliance ), + .pipe_tx7_compliance ( pipe_tx7_compliance ), + .pipe_tx0_char_is_k ( pipe_tx0_char_is_k ), + .pipe_tx1_char_is_k ( pipe_tx1_char_is_k ), + .pipe_tx2_char_is_k ( pipe_tx2_char_is_k ), + .pipe_tx3_char_is_k ( pipe_tx3_char_is_k ), + .pipe_tx4_char_is_k ( pipe_tx4_char_is_k ), + .pipe_tx5_char_is_k ( pipe_tx5_char_is_k ), + .pipe_tx6_char_is_k ( pipe_tx6_char_is_k ), + .pipe_tx7_char_is_k ( pipe_tx7_char_is_k ), + .pipe_tx0_data ( pipe_tx0_data ), + .pipe_tx1_data ( pipe_tx1_data ), + .pipe_tx2_data ( pipe_tx2_data ), + .pipe_tx3_data ( pipe_tx3_data ), + .pipe_tx4_data ( pipe_tx4_data ), + .pipe_tx5_data ( pipe_tx5_data ), + .pipe_tx6_data ( pipe_tx6_data ), + .pipe_tx7_data ( pipe_tx7_data ), + .pipe_tx0_elec_idle ( pipe_tx0_elec_idle ), + .pipe_tx1_elec_idle ( pipe_tx1_elec_idle ), + .pipe_tx2_elec_idle ( pipe_tx2_elec_idle ), + .pipe_tx3_elec_idle ( pipe_tx3_elec_idle ), + .pipe_tx4_elec_idle ( pipe_tx4_elec_idle ), + .pipe_tx5_elec_idle ( pipe_tx5_elec_idle ), + .pipe_tx6_elec_idle ( pipe_tx6_elec_idle ), + .pipe_tx7_elec_idle ( pipe_tx7_elec_idle ), + .pipe_tx0_powerdown ( pipe_tx0_powerdown ), + .pipe_tx1_powerdown ( pipe_tx1_powerdown ), + .pipe_tx2_powerdown ( pipe_tx2_powerdown ), + .pipe_tx3_powerdown ( pipe_tx3_powerdown ), + .pipe_tx4_powerdown ( pipe_tx4_powerdown ), + .pipe_tx5_powerdown ( pipe_tx5_powerdown ), + .pipe_tx6_powerdown ( pipe_tx6_powerdown ), + .pipe_tx7_powerdown ( pipe_tx7_powerdown ), + + .pipe_rx0_char_is_k ( pipe_rx0_char_is_k ), + .pipe_rx1_char_is_k ( pipe_rx1_char_is_k ), + .pipe_rx2_char_is_k ( pipe_rx2_char_is_k ), + .pipe_rx3_char_is_k ( pipe_rx3_char_is_k ), + .pipe_rx4_char_is_k ( pipe_rx4_char_is_k ), + .pipe_rx5_char_is_k ( pipe_rx5_char_is_k ), + .pipe_rx6_char_is_k ( pipe_rx6_char_is_k ), + .pipe_rx7_char_is_k ( pipe_rx7_char_is_k ), + .pipe_rx0_valid ( pipe_rx0_valid ), + .pipe_rx1_valid ( pipe_rx1_valid ), + .pipe_rx2_valid ( pipe_rx2_valid ), + .pipe_rx3_valid ( pipe_rx3_valid ), + .pipe_rx4_valid ( pipe_rx4_valid ), + .pipe_rx5_valid ( pipe_rx5_valid ), + .pipe_rx6_valid ( pipe_rx6_valid ), + .pipe_rx7_valid ( pipe_rx7_valid ), + .pipe_rx0_data ( pipe_rx0_data ), + .pipe_rx1_data ( pipe_rx1_data ), + .pipe_rx2_data ( pipe_rx2_data ), + .pipe_rx3_data ( pipe_rx3_data ), + .pipe_rx4_data ( pipe_rx4_data ), + .pipe_rx5_data ( pipe_rx5_data ), + .pipe_rx6_data ( pipe_rx6_data ), + .pipe_rx7_data ( pipe_rx7_data ), + .pipe_rx0_chanisaligned ( pipe_rx0_chanisaligned ), + .pipe_rx1_chanisaligned ( pipe_rx1_chanisaligned ), + .pipe_rx2_chanisaligned ( pipe_rx2_chanisaligned ), + .pipe_rx3_chanisaligned ( pipe_rx3_chanisaligned ), + .pipe_rx4_chanisaligned ( pipe_rx4_chanisaligned ), + .pipe_rx5_chanisaligned ( pipe_rx5_chanisaligned ), + .pipe_rx6_chanisaligned ( pipe_rx6_chanisaligned ), + .pipe_rx7_chanisaligned ( pipe_rx7_chanisaligned ), + .pipe_rx0_status ( pipe_rx0_status ), + .pipe_rx1_status ( pipe_rx1_status ), + .pipe_rx2_status ( pipe_rx2_status ), + .pipe_rx3_status ( pipe_rx3_status ), + .pipe_rx4_status ( pipe_rx4_status ), + .pipe_rx5_status ( pipe_rx5_status ), + .pipe_rx6_status ( pipe_rx6_status ), + .pipe_rx7_status ( pipe_rx7_status ), + .pipe_rx0_phy_status ( pipe_rx0_phy_status ), + .pipe_rx1_phy_status ( pipe_rx1_phy_status ), + .pipe_rx2_phy_status ( pipe_rx2_phy_status ), + .pipe_rx3_phy_status ( pipe_rx3_phy_status ), + .pipe_rx4_phy_status ( pipe_rx4_phy_status ), + .pipe_rx5_phy_status ( pipe_rx5_phy_status ), + .pipe_rx6_phy_status ( pipe_rx6_phy_status ), + .pipe_rx7_phy_status ( pipe_rx7_phy_status ), + .pipe_tx_deemph ( pipe_tx_deemph ), + .pipe_tx_margin ( pipe_tx_margin ), + .pipe_tx_reset ( pipe_tx_reset ), + .pipe_tx_rcvr_det ( pipe_tx_rcvr_det ), + .pipe_tx_rate ( pipe_tx_rate ), + + .pipe_rx0_elec_idle ( pipe_rx0_elec_idle ), + .pipe_rx1_elec_idle ( pipe_rx1_elec_idle ), + .pipe_rx2_elec_idle ( pipe_rx2_elec_idle ), + .pipe_rx3_elec_idle ( pipe_rx3_elec_idle ), + .pipe_rx4_elec_idle ( pipe_rx4_elec_idle ), + .pipe_rx5_elec_idle ( pipe_rx5_elec_idle ), + .pipe_rx6_elec_idle ( pipe_rx6_elec_idle ), + .pipe_rx7_elec_idle ( pipe_rx7_elec_idle ) + ); + + //------------------------------------------------------------------------------------------------------------------// + // PIPE Interface PIPELINE Module // + //------------------------------------------------------------------------------------------------------------------// +pcie_7x_0_pcie_pipe_pipeline # ( + + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .PIPE_PIPELINE_STAGES ( PIPE_PIPELINE_STAGES ) + + ) + pcie_pipe_pipeline_i ( + + // Pipe Per-Link Signals + .pipe_tx_rcvr_det_i (pipe_tx_rcvr_det), + .pipe_tx_reset_i (1'b0), //MV? + .pipe_tx_rate_i (pipe_tx_rate), + .pipe_tx_deemph_i (pipe_tx_deemph), + .pipe_tx_margin_i (pipe_tx_margin), + .pipe_tx_swing_i (1'b0), + + .pipe_tx_rcvr_det_o (pipe_tx_rcvr_det_gt), + .pipe_tx_reset_o ( ), + .pipe_tx_rate_o (pipe_tx_rate_gt), + .pipe_tx_deemph_o (pipe_tx_deemph_gt), + .pipe_tx_margin_o (pipe_tx_margin_gt), + .pipe_tx_swing_o ( ), + + // Pipe Per-Lane Signals - Lane 0 + + .pipe_rx0_char_is_k_o (pipe_rx0_char_is_k ), + .pipe_rx0_data_o (pipe_rx0_data ), + .pipe_rx0_valid_o (pipe_rx0_valid ), + .pipe_rx0_chanisaligned_o (pipe_rx0_chanisaligned ), + .pipe_rx0_status_o (pipe_rx0_status ), + .pipe_rx0_phy_status_o (pipe_rx0_phy_status ), + .pipe_rx0_elec_idle_i (pipe_rx0_elec_idle_gt ), + .pipe_rx0_polarity_i (pipe_rx0_polarity ), + .pipe_tx0_compliance_i (pipe_tx0_compliance ), + .pipe_tx0_char_is_k_i (pipe_tx0_char_is_k ), + .pipe_tx0_data_i (pipe_tx0_data ), + .pipe_tx0_elec_idle_i (pipe_tx0_elec_idle ), + .pipe_tx0_powerdown_i (pipe_tx0_powerdown ), + + .pipe_rx0_char_is_k_i (pipe_rx0_char_is_k_gt ), + .pipe_rx0_data_i (pipe_rx0_data_gt ), + .pipe_rx0_valid_i (pipe_rx0_valid_gt ), + .pipe_rx0_chanisaligned_i (pipe_rx0_chanisaligned_gt), + .pipe_rx0_status_i (pipe_rx0_status_gt ), + .pipe_rx0_phy_status_i (pipe_rx0_phy_status_gt ), + .pipe_rx0_elec_idle_o (pipe_rx0_elec_idle ), + .pipe_rx0_polarity_o (pipe_rx0_polarity_gt ), + .pipe_tx0_compliance_o (pipe_tx0_compliance_gt ), + .pipe_tx0_char_is_k_o (pipe_tx0_char_is_k_gt ), + .pipe_tx0_data_o (pipe_tx0_data_gt ), + .pipe_tx0_elec_idle_o (pipe_tx0_elec_idle_gt ), + .pipe_tx0_powerdown_o (pipe_tx0_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 1 + + .pipe_rx1_char_is_k_o (pipe_rx1_char_is_k ), + .pipe_rx1_data_o (pipe_rx1_data ), + .pipe_rx1_valid_o (pipe_rx1_valid ), + .pipe_rx1_chanisaligned_o (pipe_rx1_chanisaligned ), + .pipe_rx1_status_o (pipe_rx1_status ), + .pipe_rx1_phy_status_o (pipe_rx1_phy_status ), + .pipe_rx1_elec_idle_i (pipe_rx1_elec_idle_gt ), + .pipe_rx1_polarity_i (pipe_rx1_polarity ), + .pipe_tx1_compliance_i (pipe_tx1_compliance ), + .pipe_tx1_char_is_k_i (pipe_tx1_char_is_k ), + .pipe_tx1_data_i (pipe_tx1_data ), + .pipe_tx1_elec_idle_i (pipe_tx1_elec_idle ), + .pipe_tx1_powerdown_i (pipe_tx1_powerdown ), + + .pipe_rx1_char_is_k_i (pipe_rx1_char_is_k_gt ), + .pipe_rx1_data_i (pipe_rx1_data_gt ), + .pipe_rx1_valid_i (pipe_rx1_valid_gt ), + .pipe_rx1_chanisaligned_i (pipe_rx1_chanisaligned_gt), + .pipe_rx1_status_i (pipe_rx1_status_gt ), + .pipe_rx1_phy_status_i (pipe_rx1_phy_status_gt ), + .pipe_rx1_elec_idle_o (pipe_rx1_elec_idle ), + .pipe_rx1_polarity_o (pipe_rx1_polarity_gt ), + .pipe_tx1_compliance_o (pipe_tx1_compliance_gt ), + .pipe_tx1_char_is_k_o (pipe_tx1_char_is_k_gt ), + .pipe_tx1_data_o (pipe_tx1_data_gt ), + .pipe_tx1_elec_idle_o (pipe_tx1_elec_idle_gt ), + .pipe_tx1_powerdown_o (pipe_tx1_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 2 + + .pipe_rx2_char_is_k_o (pipe_rx2_char_is_k ), + .pipe_rx2_data_o (pipe_rx2_data ), + .pipe_rx2_valid_o (pipe_rx2_valid ), + .pipe_rx2_chanisaligned_o (pipe_rx2_chanisaligned ), + .pipe_rx2_status_o (pipe_rx2_status ), + .pipe_rx2_phy_status_o (pipe_rx2_phy_status ), + .pipe_rx2_elec_idle_i (pipe_rx2_elec_idle_gt ), + .pipe_rx2_polarity_i (pipe_rx2_polarity ), + .pipe_tx2_compliance_i (pipe_tx2_compliance ), + .pipe_tx2_char_is_k_i (pipe_tx2_char_is_k ), + .pipe_tx2_data_i (pipe_tx2_data ), + .pipe_tx2_elec_idle_i (pipe_tx2_elec_idle ), + .pipe_tx2_powerdown_i (pipe_tx2_powerdown ), + + .pipe_rx2_char_is_k_i (pipe_rx2_char_is_k_gt ), + .pipe_rx2_data_i (pipe_rx2_data_gt ), + .pipe_rx2_valid_i (pipe_rx2_valid_gt ), + .pipe_rx2_chanisaligned_i (pipe_rx2_chanisaligned_gt), + .pipe_rx2_status_i (pipe_rx2_status_gt ), + .pipe_rx2_phy_status_i (pipe_rx2_phy_status_gt ), + .pipe_rx2_elec_idle_o (pipe_rx2_elec_idle ), + .pipe_rx2_polarity_o (pipe_rx2_polarity_gt ), + .pipe_tx2_compliance_o (pipe_tx2_compliance_gt ), + .pipe_tx2_char_is_k_o (pipe_tx2_char_is_k_gt ), + .pipe_tx2_data_o (pipe_tx2_data_gt ), + .pipe_tx2_elec_idle_o (pipe_tx2_elec_idle_gt ), + .pipe_tx2_powerdown_o (pipe_tx2_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 3 + + .pipe_rx3_char_is_k_o (pipe_rx3_char_is_k ), + .pipe_rx3_data_o (pipe_rx3_data ), + .pipe_rx3_valid_o (pipe_rx3_valid ), + .pipe_rx3_chanisaligned_o (pipe_rx3_chanisaligned ), + .pipe_rx3_status_o (pipe_rx3_status ), + .pipe_rx3_phy_status_o (pipe_rx3_phy_status ), + .pipe_rx3_elec_idle_i (pipe_rx3_elec_idle_gt ), + .pipe_rx3_polarity_i (pipe_rx3_polarity ), + .pipe_tx3_compliance_i (pipe_tx3_compliance ), + .pipe_tx3_char_is_k_i (pipe_tx3_char_is_k ), + .pipe_tx3_data_i (pipe_tx3_data ), + .pipe_tx3_elec_idle_i (pipe_tx3_elec_idle ), + .pipe_tx3_powerdown_i (pipe_tx3_powerdown ), + + .pipe_rx3_char_is_k_i (pipe_rx3_char_is_k_gt ), + .pipe_rx3_data_i (pipe_rx3_data_gt ), + .pipe_rx3_valid_i (pipe_rx3_valid_gt ), + .pipe_rx3_chanisaligned_i (pipe_rx3_chanisaligned_gt), + .pipe_rx3_status_i (pipe_rx3_status_gt ), + .pipe_rx3_phy_status_i (pipe_rx3_phy_status_gt ), + .pipe_rx3_elec_idle_o (pipe_rx3_elec_idle ), + .pipe_rx3_polarity_o (pipe_rx3_polarity_gt ), + .pipe_tx3_compliance_o (pipe_tx3_compliance_gt ), + .pipe_tx3_char_is_k_o (pipe_tx3_char_is_k_gt ), + .pipe_tx3_data_o (pipe_tx3_data_gt ), + .pipe_tx3_elec_idle_o (pipe_tx3_elec_idle_gt ), + .pipe_tx3_powerdown_o (pipe_tx3_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 4 + + .pipe_rx4_char_is_k_o (pipe_rx4_char_is_k ), + .pipe_rx4_data_o (pipe_rx4_data ), + .pipe_rx4_valid_o (pipe_rx4_valid ), + .pipe_rx4_chanisaligned_o (pipe_rx4_chanisaligned ), + .pipe_rx4_status_o (pipe_rx4_status ), + .pipe_rx4_phy_status_o (pipe_rx4_phy_status ), + .pipe_rx4_elec_idle_i (pipe_rx4_elec_idle_gt ), + .pipe_rx4_polarity_i (pipe_rx4_polarity ), + .pipe_tx4_compliance_i (pipe_tx4_compliance ), + .pipe_tx4_char_is_k_i (pipe_tx4_char_is_k ), + .pipe_tx4_data_i (pipe_tx4_data ), + .pipe_tx4_elec_idle_i (pipe_tx4_elec_idle ), + .pipe_tx4_powerdown_i (pipe_tx4_powerdown ), + .pipe_rx4_char_is_k_i (pipe_rx4_char_is_k_gt ), + .pipe_rx4_data_i (pipe_rx4_data_gt ), + .pipe_rx4_valid_i (pipe_rx4_valid_gt ), + .pipe_rx4_chanisaligned_i (pipe_rx4_chanisaligned_gt), + .pipe_rx4_status_i (pipe_rx4_status_gt ), + .pipe_rx4_phy_status_i (pipe_rx4_phy_status_gt ), + .pipe_rx4_elec_idle_o (pipe_rx4_elec_idle ), + .pipe_rx4_polarity_o (pipe_rx4_polarity_gt ), + .pipe_tx4_compliance_o (pipe_tx4_compliance_gt ), + .pipe_tx4_char_is_k_o (pipe_tx4_char_is_k_gt ), + .pipe_tx4_data_o (pipe_tx4_data_gt ), + .pipe_tx4_elec_idle_o (pipe_tx4_elec_idle_gt ), + .pipe_tx4_powerdown_o (pipe_tx4_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 5 + + .pipe_rx5_char_is_k_o (pipe_rx5_char_is_k ), + .pipe_rx5_data_o (pipe_rx5_data ), + .pipe_rx5_valid_o (pipe_rx5_valid ), + .pipe_rx5_chanisaligned_o (pipe_rx5_chanisaligned ), + .pipe_rx5_status_o (pipe_rx5_status ), + .pipe_rx5_phy_status_o (pipe_rx5_phy_status ), + .pipe_rx5_elec_idle_i (pipe_rx5_elec_idle_gt ), + .pipe_rx5_polarity_i (pipe_rx5_polarity ), + .pipe_tx5_compliance_i (pipe_tx5_compliance ), + .pipe_tx5_char_is_k_i (pipe_tx5_char_is_k ), + .pipe_tx5_data_i (pipe_tx5_data ), + .pipe_tx5_elec_idle_i (pipe_tx5_elec_idle ), + .pipe_tx5_powerdown_i (pipe_tx5_powerdown ), + .pipe_rx5_char_is_k_i (pipe_rx5_char_is_k_gt ), + .pipe_rx5_data_i (pipe_rx5_data_gt ), + .pipe_rx5_valid_i (pipe_rx5_valid_gt ), + .pipe_rx5_chanisaligned_i (pipe_rx5_chanisaligned_gt), + .pipe_rx5_status_i (pipe_rx5_status_gt ), + .pipe_rx5_phy_status_i (pipe_rx5_phy_status_gt ), + .pipe_rx5_elec_idle_o (pipe_rx5_elec_idle ), + .pipe_rx5_polarity_o (pipe_rx5_polarity_gt ), + .pipe_tx5_compliance_o (pipe_tx5_compliance_gt ), + .pipe_tx5_char_is_k_o (pipe_tx5_char_is_k_gt ), + .pipe_tx5_data_o (pipe_tx5_data_gt ), + .pipe_tx5_elec_idle_o (pipe_tx5_elec_idle_gt ), + .pipe_tx5_powerdown_o (pipe_tx5_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 6 + + .pipe_rx6_char_is_k_o (pipe_rx6_char_is_k ), + .pipe_rx6_data_o (pipe_rx6_data ), + .pipe_rx6_valid_o (pipe_rx6_valid ), + .pipe_rx6_chanisaligned_o (pipe_rx6_chanisaligned ), + .pipe_rx6_status_o (pipe_rx6_status ), + .pipe_rx6_phy_status_o (pipe_rx6_phy_status ), + .pipe_rx6_elec_idle_i (pipe_rx6_elec_idle_gt ), + .pipe_rx6_polarity_i (pipe_rx6_polarity ), + .pipe_tx6_compliance_i (pipe_tx6_compliance ), + .pipe_tx6_char_is_k_i (pipe_tx6_char_is_k ), + .pipe_tx6_data_i (pipe_tx6_data ), + .pipe_tx6_elec_idle_i (pipe_tx6_elec_idle ), + .pipe_tx6_powerdown_i (pipe_tx6_powerdown ), + .pipe_rx6_char_is_k_i (pipe_rx6_char_is_k_gt ), + .pipe_rx6_data_i (pipe_rx6_data_gt ), + .pipe_rx6_valid_i (pipe_rx6_valid_gt ), + .pipe_rx6_chanisaligned_i (pipe_rx6_chanisaligned_gt), + .pipe_rx6_status_i (pipe_rx6_status_gt ), + .pipe_rx6_phy_status_i (pipe_rx6_phy_status_gt ), + .pipe_rx6_elec_idle_o (pipe_rx6_elec_idle ), + .pipe_rx6_polarity_o (pipe_rx6_polarity_gt ), + .pipe_tx6_compliance_o (pipe_tx6_compliance_gt ), + .pipe_tx6_char_is_k_o (pipe_tx6_char_is_k_gt ), + .pipe_tx6_data_o (pipe_tx6_data_gt ), + .pipe_tx6_elec_idle_o (pipe_tx6_elec_idle_gt ), + .pipe_tx6_powerdown_o (pipe_tx6_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 7 + + .pipe_rx7_char_is_k_o (pipe_rx7_char_is_k ), + .pipe_rx7_data_o (pipe_rx7_data ), + .pipe_rx7_valid_o (pipe_rx7_valid ), + .pipe_rx7_chanisaligned_o (pipe_rx7_chanisaligned ), + .pipe_rx7_status_o (pipe_rx7_status ), + .pipe_rx7_phy_status_o (pipe_rx7_phy_status ), + .pipe_rx7_elec_idle_i (pipe_rx7_elec_idle_gt ), + .pipe_rx7_polarity_i (pipe_rx7_polarity ), + .pipe_tx7_compliance_i (pipe_tx7_compliance ), + .pipe_tx7_char_is_k_i (pipe_tx7_char_is_k ), + .pipe_tx7_data_i (pipe_tx7_data ), + .pipe_tx7_elec_idle_i (pipe_tx7_elec_idle ), + .pipe_tx7_powerdown_i (pipe_tx7_powerdown ), + .pipe_rx7_char_is_k_i (pipe_rx7_char_is_k_gt ), + .pipe_rx7_data_i (pipe_rx7_data_gt ), + .pipe_rx7_valid_i (pipe_rx7_valid_gt ), + .pipe_rx7_chanisaligned_i (pipe_rx7_chanisaligned_gt), + .pipe_rx7_status_i (pipe_rx7_status_gt ), + .pipe_rx7_phy_status_i (pipe_rx7_phy_status_gt ), + .pipe_rx7_elec_idle_o (pipe_rx7_elec_idle ), + .pipe_rx7_polarity_o (pipe_rx7_polarity_gt ), + .pipe_tx7_compliance_o (pipe_tx7_compliance_gt ), + .pipe_tx7_char_is_k_o (pipe_tx7_char_is_k_gt ), + .pipe_tx7_data_o (pipe_tx7_data_gt ), + .pipe_tx7_elec_idle_o (pipe_tx7_elec_idle_gt ), + .pipe_tx7_powerdown_o (pipe_tx7_powerdown_gt ), + + // Non PIPE signals + .pipe_clk (pipe_clk ), + .rst_n (phy_rdy_n ) + ); + + + +endmodule + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pipe_clock.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pipe_clock.v new file mode 100644 index 0000000000000000000000000000000000000000..24db3f2106f68e370f762f807f5c9a796c0504de --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_pipe_clock.v @@ -0,0 +1,613 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pipe_clock.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : pipe_clock.v +// Description : PIPE Clock Module for 7 Series Transceiver +// Version : 15.3 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- PIPE Clock Module ------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pipe_clock # +( + + parameter PCIE_ASYNC_EN = "FALSE", // PCIe async enable + parameter PCIE_TXBUF_EN = "FALSE", // PCIe TX buffer enable for Gen1/Gen2 only + parameter PCIE_CLK_SHARING_EN= "FALSE", // Enable Clock Sharing + parameter PCIE_LANE = 1, // PCIe number of lanes + parameter PCIE_LINK_SPEED = 3, // PCIe link speed + parameter PCIE_REFCLK_FREQ = 0, // PCIe reference clock frequency + parameter PCIE_USERCLK1_FREQ = 2, // PCIe user clock 1 frequency + parameter PCIE_USERCLK2_FREQ = 2, // PCIe user clock 2 frequency + parameter PCIE_OOBCLK_MODE = 1, // PCIe oob clock mode + parameter PCIE_DEBUG_MODE = 0 // PCIe Debug mode + +) + +( + + //---------- Input ------------------------------------- + input CLK_CLK, + input CLK_TXOUTCLK, + input [PCIE_LANE-1:0] CLK_RXOUTCLK_IN, + input CLK_RST_N, + input [PCIE_LANE-1:0] CLK_PCLK_SEL, + input [PCIE_LANE-1:0] CLK_PCLK_SEL_SLAVE, + input CLK_GEN3, + + //---------- Output ------------------------------------ + output CLK_PCLK, + output CLK_PCLK_SLAVE, + output CLK_RXUSRCLK, + output [PCIE_LANE-1:0] CLK_RXOUTCLK_OUT, + output CLK_DCLK, + output CLK_OOBCLK, + output CLK_USERCLK1, + output CLK_USERCLK2, + output CLK_MMCM_LOCK + +); + + //---------- Select Clock Divider ---------------------- + localparam DIVCLK_DIVIDE = (PCIE_REFCLK_FREQ == 2) ? 1 : + (PCIE_REFCLK_FREQ == 1) ? 1 : 1; + + localparam CLKFBOUT_MULT_F = (PCIE_REFCLK_FREQ == 2) ? 4 : + (PCIE_REFCLK_FREQ == 1) ? 8 : 10; + + localparam CLKIN1_PERIOD = (PCIE_REFCLK_FREQ == 2) ? 4 : + (PCIE_REFCLK_FREQ == 1) ? 8 : 10; + + localparam CLKOUT0_DIVIDE_F = 8; + + localparam CLKOUT1_DIVIDE = 4; + + localparam CLKOUT2_DIVIDE = (PCIE_USERCLK1_FREQ == 5) ? 2 : + (PCIE_USERCLK1_FREQ == 4) ? 4 : + (PCIE_USERCLK1_FREQ == 3) ? 8 : + (PCIE_USERCLK1_FREQ == 1) ? 32 : 16; + + localparam CLKOUT3_DIVIDE = (PCIE_USERCLK2_FREQ == 5) ? 2 : + (PCIE_USERCLK2_FREQ == 4) ? 4 : + (PCIE_USERCLK2_FREQ == 3) ? 8 : + (PCIE_USERCLK2_FREQ == 1) ? 32 : 16; + + localparam CLKOUT4_DIVIDE = 20; + + localparam PCIE_GEN1_MODE = 1'b0; // PCIe link speed is GEN1 only + + + //---------- Input Registers --------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] pclk_sel_reg1 = {PCIE_LANE{1'd0}}; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] pclk_sel_slave_reg1 = {PCIE_LANE{1'd0}}; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg gen3_reg1 = 1'd0; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] pclk_sel_reg2 = {PCIE_LANE{1'd0}}; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] pclk_sel_slave_reg2 = {PCIE_LANE{1'd0}}; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg gen3_reg2 = 1'd0; + + //---------- Internal Signals -------------------------- + wire refclk; + wire mmcm_fb; + wire clk_125mhz; + wire clk_125mhz_buf; + wire clk_250mhz; + wire userclk1; + wire userclk2; + wire oobclk; + reg pclk_sel = 1'd0; + reg pclk_sel_slave = 1'd0; + + //---------- Output Registers -------------------------- + wire pclk_1; + wire pclk; + wire userclk1_1; + wire userclk2_1; + wire mmcm_lock; + + //---------- Generate Per-Lane Signals ----------------- + genvar i; // Index for per-lane signals + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge pclk) +begin + + if (!CLK_RST_N) + begin + //---------- 1st Stage FF -------------------------- + pclk_sel_reg1 <= {PCIE_LANE{1'd0}}; + pclk_sel_slave_reg1 <= {PCIE_LANE{1'd0}}; + gen3_reg1 <= 1'd0; + //---------- 2nd Stage FF -------------------------- + pclk_sel_reg2 <= {PCIE_LANE{1'd0}}; + pclk_sel_slave_reg2 <= {PCIE_LANE{1'd0}}; + gen3_reg2 <= 1'd0; + end + else + begin + //---------- 1st Stage FF -------------------------- + pclk_sel_reg1 <= CLK_PCLK_SEL; + pclk_sel_slave_reg1 <= CLK_PCLK_SEL_SLAVE; + gen3_reg1 <= CLK_GEN3; + //---------- 2nd Stage FF -------------------------- + pclk_sel_reg2 <= pclk_sel_reg1; + pclk_sel_slave_reg2 <= pclk_sel_slave_reg1; + gen3_reg2 <= gen3_reg1; + end + +end + + + +//---------- Select Reference clock or TXOUTCLK -------------------------------- +generate if ((PCIE_TXBUF_EN == "TRUE") && (PCIE_LINK_SPEED != 3)) + + begin : refclk_i + + //---------- Select Reference Clock ---------------------------------------- + BUFG refclk_i + ( + + //---------- Input ------------------------------------- + .I (CLK_CLK), + //---------- Output ------------------------------------ + .O (refclk) + + ); + + end + +else + + begin : txoutclk_i + + //---------- Select TXOUTCLK ----------------------------------------------- + BUFG txoutclk_i + ( + + //---------- Input ------------------------------------- + .I (CLK_TXOUTCLK), + //---------- Output ------------------------------------ + .O (refclk) + + ); + + end + +endgenerate + + + +//---------- MMCM -------------------------------------------------------------- +MMCME2_ADV # +( + + .BANDWIDTH ("OPTIMIZED"), + .CLKOUT4_CASCADE ("FALSE"), + .COMPENSATION ("ZHOLD"), + .STARTUP_WAIT ("FALSE"), + .DIVCLK_DIVIDE (DIVCLK_DIVIDE), + .CLKFBOUT_MULT_F (CLKFBOUT_MULT_F), + .CLKFBOUT_PHASE (0.000), + .CLKFBOUT_USE_FINE_PS ("FALSE"), + .CLKOUT0_DIVIDE_F (CLKOUT0_DIVIDE_F), + .CLKOUT0_PHASE (0.000), + .CLKOUT0_DUTY_CYCLE (0.500), + .CLKOUT0_USE_FINE_PS ("FALSE"), + .CLKOUT1_DIVIDE (CLKOUT1_DIVIDE), + .CLKOUT1_PHASE (0.000), + .CLKOUT1_DUTY_CYCLE (0.500), + .CLKOUT1_USE_FINE_PS ("FALSE"), + .CLKOUT2_DIVIDE (CLKOUT2_DIVIDE), + .CLKOUT2_PHASE (0.000), + .CLKOUT2_DUTY_CYCLE (0.500), + .CLKOUT2_USE_FINE_PS ("FALSE"), + .CLKOUT3_DIVIDE (CLKOUT3_DIVIDE), + .CLKOUT3_PHASE (0.000), + .CLKOUT3_DUTY_CYCLE (0.500), + .CLKOUT3_USE_FINE_PS ("FALSE"), + .CLKOUT4_DIVIDE (CLKOUT4_DIVIDE), + .CLKOUT4_PHASE (0.000), + .CLKOUT4_DUTY_CYCLE (0.500), + .CLKOUT4_USE_FINE_PS ("FALSE"), + .CLKIN1_PERIOD (CLKIN1_PERIOD), + .REF_JITTER1 (0.010) + +) +mmcm_i +( + + //---------- Input ------------------------------------ + .CLKIN1 (refclk), + .CLKIN2 (1'd0), // not used, comment out CLKIN2 if it cause implementation issues + //.CLKIN2 (refclk), // not used, comment out CLKIN2 if it cause implementation issues + .CLKINSEL (1'd1), + .CLKFBIN (mmcm_fb), + .RST (!CLK_RST_N), + .PWRDWN (1'd0), + + //---------- Output ------------------------------------ + .CLKFBOUT (mmcm_fb), + .CLKFBOUTB (), + .CLKOUT0 (clk_125mhz), + .CLKOUT0B (), + .CLKOUT1 (clk_250mhz), + .CLKOUT1B (), + .CLKOUT2 (userclk1), + .CLKOUT2B (), + .CLKOUT3 (userclk2), + .CLKOUT3B (), + .CLKOUT4 (oobclk), + .CLKOUT5 (), + .CLKOUT6 (), + .LOCKED (mmcm_lock), + + //---------- Dynamic Reconfiguration ------------------- + .DCLK ( 1'd0), + .DADDR ( 7'd0), + .DEN ( 1'd0), + .DWE ( 1'd0), + .DI (16'd0), + .DO (), + .DRDY (), + + //---------- Dynamic Phase Shift ----------------------- + .PSCLK (1'd0), + .PSEN (1'd0), + .PSINCDEC (1'd0), + .PSDONE (), + + //---------- Status ------------------------------------ + .CLKINSTOPPED (), + .CLKFBSTOPPED () + +); + + + +//---------- Select PCLK MUX --------------------------------------------------- +generate if (PCIE_LINK_SPEED != 1) + + begin : pclk_i1_bufgctrl + //---------- PCLK Mux ---------------------------------- + BUFGCTRL pclk_i1 + ( + //---------- Input --------------------------------- + .CE0 (1'd1), + .CE1 (1'd1), + .I0 (clk_125mhz), + .I1 (clk_250mhz), + .IGNORE0 (1'd0), + .IGNORE1 (1'd0), + .S0 (~pclk_sel), + .S1 ( pclk_sel), + //---------- Output -------------------------------- + .O (pclk_1) + ); + end + +else + + //---------- Select PCLK Buffer ------------------------ + begin : pclk_i1_bufg + //---------- PCLK Buffer ------------------------------- + BUFG pclk_i1 + ( + //---------- Input --------------------------------- + .I (clk_125mhz), + //---------- Output -------------------------------- + .O (clk_125mhz_buf) + ); + assign pclk_1 = clk_125mhz_buf; + end + +endgenerate + +//---------- Select PCLK MUX for Slave--------------------------------------------------- +generate if(PCIE_CLK_SHARING_EN == "FALSE") + //---------- PCLK MUX for Slave------------------// + begin : pclk_slave_disable + assign CLK_PCLK_SLAVE = 1'b0; + end + +else if (PCIE_LINK_SPEED != 1) + + begin : pclk_slave_bufgctrl + //---------- PCLK Mux ---------------------------------- + BUFGCTRL pclk_slave + ( + //---------- Input --------------------------------- + .CE0 (1'd1), + .CE1 (1'd1), + .I0 (clk_125mhz), + .I1 (clk_250mhz), + .IGNORE0 (1'd0), + .IGNORE1 (1'd0), + .S0 (~pclk_sel_slave), + .S1 ( pclk_sel_slave), + //---------- Output -------------------------------- + .O (CLK_PCLK_SLAVE) + ); + end + +else + + //---------- Select PCLK Buffer ------------------------ + begin : pclk_slave_bufg + //---------- PCLK Buffer ------------------------------- + BUFG pclk_slave + ( + //---------- Input --------------------------------- + .I (clk_125mhz), + //---------- Output -------------------------------- + .O (CLK_PCLK_SLAVE) + ); + end + +endgenerate + + + +//---------- Generate RXOUTCLK Buffer for Debug -------------------------------- +generate if ((PCIE_DEBUG_MODE == 1) || (PCIE_ASYNC_EN == "TRUE")) + + begin : rxoutclk_per_lane + //---------- Generate per Lane ------------------------- + for (i=0; i>2:0]PIPE_QPLL_LOCK, // Async | Async + output PIPE_PCLK_LOCK, // Async | Async + output [PCIE_LANE-1:0] PIPE_RXCDRLOCK, // Async | Async + output PIPE_USERCLK1, // Optional user clock + output PIPE_USERCLK2, // Optional user clock + output PIPE_RXUSRCLK, // RXUSRCLK + // Equivalent to PCLK in Gen1/Gen2 + // Equivalent to RXOUTCLK[0] in Gen3 + output [PCIE_LANE-1:0] PIPE_RXOUTCLK, // RX recovered clock (for debug only) + output [PCIE_LANE-1:0] PIPE_TXSYNC_DONE, // PCLK | PCLK + output [PCIE_LANE-1:0] PIPE_RXSYNC_DONE, // PCLK | PCLK + output [PCIE_LANE-1:0] PIPE_GEN3_RDY, // PCLK | RXUSRCLK + output [PCIE_LANE-1:0] PIPE_RXCHANISALIGNED, + output [PCIE_LANE-1:0] PIPE_ACTIVE_LANE, + +// Shared Logic Internal + output INT_PCLK_OUT_SLAVE, // PCLK | PCLK + output INT_RXUSRCLK_OUT, // RXUSERCLK + output [PCIE_LANE-1:0 ] INT_RXOUTCLK_OUT, // RX recovered clock + output INT_DCLK_OUT, // DCLK | DCLK + output INT_USERCLK1_OUT, // Optional user clock + output INT_USERCLK2_OUT, // Optional user clock + output INT_OOBCLK_OUT, // OOB | OOB + output INT_MMCM_LOCK_OUT, // Async | Async + output [1:0] INT_QPLLLOCK_OUT, + output [1:0] INT_QPLLOUTCLK_OUT, + output [1:0] INT_QPLLOUTREFCLK_OUT, + input [PCIE_LANE-1:0] INT_PCLK_SEL_SLAVE, + + + // Shared Logic External + + //---------- External Clock Ports ---------------------- + input PIPE_PCLK_IN, // PCLK | PCLK + input PIPE_RXUSRCLK_IN, // RXUSERCLK + // Equivalent to PCLK in Gen1/Gen2 + // Equivalent to RXOUTCLK[0] in Gen3 + input [PCIE_LANE-1:0] PIPE_RXOUTCLK_IN, // RX recovered clock + input PIPE_DCLK_IN, // DCLK | DCLK + input PIPE_USERCLK1_IN, // Optional user clock + input PIPE_USERCLK2_IN, // Optional user clock + input PIPE_OOBCLK_IN, // OOB | OOB + input PIPE_MMCM_LOCK_IN, // Async | Async + + output PIPE_TXOUTCLK_OUT, // PCLK | PCLK + output [PCIE_LANE-1:0] PIPE_RXOUTCLK_OUT, // RX recovered clock (for debug only) + output [PCIE_LANE-1:0] PIPE_PCLK_SEL_OUT, // PCLK | PCLK + output PIPE_GEN3_OUT, // PCLK | PCLK + //---------- External GT COMMON Ports ---------------------- + input [11:0] QPLL_DRP_CRSCODE, + input [17:0] QPLL_DRP_FSM, + input [1:0] QPLL_DRP_DONE, + input [1:0] QPLL_DRP_RESET, + input [1:0] QPLL_QPLLLOCK, + input [1:0] QPLL_QPLLOUTCLK, + input [1:0] QPLL_QPLLOUTREFCLK, + output QPLL_QPLLPD, + output [1:0] QPLL_QPLLRESET, + output QPLL_DRP_CLK, + output QPLL_DRP_RST_N, + output QPLL_DRP_OVRD, + output QPLL_DRP_GEN3, + output QPLL_DRP_START, + + //---------- TRANSCEIVER DEBUG ----------------------- + input [ 2:0] PIPE_TXPRBSSEL, // PCLK | PCLK + input [ 2:0] PIPE_RXPRBSSEL, // PCLK | PCLK + input PIPE_TXPRBSFORCEERR, // PCLK | PCLK + input PIPE_RXPRBSCNTRESET, // PCLK | PCLK + input [ 2:0] PIPE_LOOPBACK, // PCLK | PCLK + + output [PCIE_LANE-1:0] PIPE_RXPRBSERR, // PCLK | PCLK + input [PCIE_LANE-1:0] PIPE_TXINHIBIT, // PCLK | PCLK + + //---------- FSM Ports --------------------------------- + output [4:0] PIPE_RST_FSM, // PCLK | PCLK + output [11:0] PIPE_QRST_FSM, // PCLK | PCLK + output [(PCIE_LANE*5)-1:0] PIPE_RATE_FSM, // PCLK | PCLK + output [(PCIE_LANE*6)-1:0] PIPE_SYNC_FSM_TX, // PCLK | PCLK + output [(PCIE_LANE*7)-1:0] PIPE_SYNC_FSM_RX, // PCLK | PCLK + output [(PCIE_LANE*7)-1:0] PIPE_DRP_FSM, // DCLK | DCLK + output [(PCIE_LANE*6)-1:0] PIPE_TXEQ_FSM, // PCLK | PCLK + output [(PCIE_LANE*6)-1:0] PIPE_RXEQ_FSM, // PCLK | PCLK + output [((((PCIE_LANE-1)>>2)+1)*9)-1:0]PIPE_QDRP_FSM, // DCLK | DCLK + + output PIPE_RST_IDLE, // PCLK | PCLK + output PIPE_QRST_IDLE, // PCLK | PCLK + output PIPE_RATE_IDLE, // PCLK | PCLK + + //----------- Channel DRP---------------------------- + output EXT_CH_GT_DRPCLK, + input [(PCIE_LANE*9)-1:0] EXT_CH_GT_DRPADDR, + input [PCIE_LANE-1:0] EXT_CH_GT_DRPEN, + input [(PCIE_LANE*16)-1:0]EXT_CH_GT_DRPDI, + input [PCIE_LANE-1:0] EXT_CH_GT_DRPWE, + + output [(PCIE_LANE*16)-1:0]EXT_CH_GT_DRPDO, + output [PCIE_LANE-1:0] EXT_CH_GT_DRPRDY, + + //---------- JTAG Ports -------------------------------- + input PIPE_JTAG_EN, // DCLK | DCLK + output [PCIE_LANE-1:0] PIPE_JTAG_RDY, // DCLK | DCLK + + //---------- Debug Ports ------------------------------- + output [PCIE_LANE-1:0] PIPE_DEBUG_0, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_1, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_2, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_3, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_4, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_5, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_6, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_7, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_8, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_9, // Async | Async + output [31:0] PIPE_DEBUG, // Async | Async + + output [(PCIE_LANE*15)-1:0] PIPE_DMONITOROUT // DMONITORCLK + +); + + //---------- Input Registers --------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg reset_n_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg reset_n_reg2; + + //---------- PIPE Clock Module Output ------------------ + wire clk_pclk; + wire clk_rxusrclk; + wire [PCIE_LANE-1:0] clk_rxoutclk; + wire clk_dclk; + wire clk_oobclk; + wire clk_mmcm_lock; + + //---------- PIPE Reset Module Output ------------------ + wire rst_cpllreset; + wire rst_cpllpd; + wire rst_rxusrclk_reset; + wire rst_dclk_reset; + wire rst_gtreset; + wire rst_drp_start; + wire rst_drp_x16x20_mode; + wire rst_drp_x16; + wire rst_userrdy; + wire rst_txsync_start; + wire rst_idle; + wire [4:0] rst_fsm; + + //------------------------------------------------------ + wire gtp_rst_qpllreset; // GTP + wire gtp_rst_qpllpd; // GTP + + //------------------------------------------------------ + wire [(PCIE_LANE-1)>>2:0]qpllreset; + wire qpllpd; + + //---------- QPLL Reset Module Output ------------------ + wire qrst_ovrd; + wire qrst_drp_start; + wire qrst_qpllreset; + wire qrst_qpllpd; + wire qrst_idle; + wire [3:0] qrst_fsm; + + //---------- PIPE_JTAG Master Module Output ------------ + wire [(PCIE_LANE*37)-1:0] jtag_sl_iport; + wire [(PCIE_LANE*17)-1:0] jtag_sl_oport; + + //---------- PIPE User Module Output ------------------- + wire [PCIE_LANE-1:0] gt_txpmareset_i; + wire [PCIE_LANE-1:0] gt_rxpmareset_i; + + wire [PCIE_LANE-1:0] user_oobclk; + wire [PCIE_LANE-1:0] user_resetovrd; + wire [PCIE_LANE-1:0] user_txpmareset; + wire [PCIE_LANE-1:0] user_rxpmareset; + wire [PCIE_LANE-1:0] user_rxcdrreset; + wire [PCIE_LANE-1:0] user_rxcdrfreqreset; + wire [PCIE_LANE-1:0] user_rxdfelpmreset; + wire [PCIE_LANE-1:0] user_eyescanreset; + wire [PCIE_LANE-1:0] user_txpcsreset; + wire [PCIE_LANE-1:0] user_rxpcsreset; + wire [PCIE_LANE-1:0] user_rxbufreset; + wire [PCIE_LANE-1:0] user_resetovrd_done; + wire [PCIE_LANE-1:0] user_active_lane; + wire [PCIE_LANE-1:0] user_resetdone /* synthesis syn_keep=1 */; + wire [PCIE_LANE-1:0] user_rxcdrlock; + wire [PCIE_LANE-1:0] user_rx_converge; + wire [PCIE_LANE-1:0] PIPE_RXEQ_CONVERGE; + + //---------- PIPE Rate Module Output ------------------- + wire [PCIE_LANE-1:0] rate_cpllpd; + wire [PCIE_LANE-1:0] rate_qpllpd; + wire [PCIE_LANE-1:0] rate_cpllreset; + wire [PCIE_LANE-1:0] rate_qpllreset; + wire [PCIE_LANE-1:0] rate_txpmareset; + wire [PCIE_LANE-1:0] rate_rxpmareset; + wire [(PCIE_LANE*2)-1:0] rate_sysclksel; + wire [PCIE_LANE-1:0] rate_pclk_sel; + wire [PCIE_LANE-1:0] rate_drp_start; + wire [PCIE_LANE-1:0] rate_drp_x16x20_mode; + wire [PCIE_LANE-1:0] rate_drp_x16; + wire [PCIE_LANE-1:0] rate_gen3; + wire [(PCIE_LANE*3)-1:0] rate_rate; + wire [PCIE_LANE-1:0] rate_resetovrd_start; + wire [PCIE_LANE-1:0] rate_txsync_start; + wire [PCIE_LANE-1:0] rate_done; + wire [PCIE_LANE-1:0] rate_rxsync_start; + wire [PCIE_LANE-1:0] rate_rxsync; + wire [PCIE_LANE-1:0] rate_idle; + wire [(PCIE_LANE*5)-1:0] rate_fsm; + + //---------- PIPE Sync Module Output ------------------- + wire [PCIE_LANE-1:0] sync_txphdlyreset; + wire [PCIE_LANE-1:0] sync_txphalign; + wire [PCIE_LANE-1:0] sync_txphalignen; + wire [PCIE_LANE-1:0] sync_txphinit; + wire [PCIE_LANE-1:0] sync_txdlybypass; + wire [PCIE_LANE-1:0] sync_txdlysreset; + wire [PCIE_LANE-1:0] sync_txdlyen; + wire [PCIE_LANE-1:0] sync_txsync_done; + wire [(PCIE_LANE*6)-1:0] sync_fsm_tx; + + wire [PCIE_LANE-1:0] sync_rxphalign; + wire [PCIE_LANE-1:0] sync_rxphalignen; + wire [PCIE_LANE-1:0] sync_rxdlybypass; + wire [PCIE_LANE-1:0] sync_rxdlysreset; + wire [PCIE_LANE-1:0] sync_rxdlyen; + wire [PCIE_LANE-1:0] sync_rxddien; + wire [PCIE_LANE-1:0] sync_rxsync_done; + wire [PCIE_LANE-1:0] sync_rxsync_donem; + wire [(PCIE_LANE*7)-1:0] sync_fsm_rx; + + wire [PCIE_LANE-1:0] txdlysresetdone; + wire [PCIE_LANE-1:0] txphaligndone; + wire [PCIE_LANE-1:0] rxdlysresetdone; + wire [PCIE_LANE-1:0] rxphaligndone_s; + + wire txsyncallin; // GTH + wire rxsyncallin; // GTH + + //---------- PIPE DRP Module Output -------------------- + wire [(PCIE_LANE*9)-1:0] drp_addr; + wire [PCIE_LANE-1:0] drp_en; + wire [(PCIE_LANE*16)-1:0]drp_di; + wire [PCIE_LANE-1:0] drp_we; + wire [PCIE_LANE-1:0] drp_done; + wire [(PCIE_LANE*3)-1:0] drp_fsm; + + //---------- PIPE JTAG Slave Module Output-------------- + wire [(PCIE_LANE*17)-1:0]jtag_sl_addr; + wire [PCIE_LANE-1:0] jtag_sl_den; + wire [PCIE_LANE-1:0] jtag_sl_en; + wire [(PCIE_LANE*16)-1:0]jtag_sl_di; + wire [PCIE_LANE-1:0] jtag_sl_we; + + //---------- PIPE DRP MUX Output ----------------------- + wire [(PCIE_LANE*9)-1:0] drp_mux_addr; + wire [PCIE_LANE-1:0] drp_mux_en; + wire [(PCIE_LANE*16)-1:0]drp_mux_di; + wire [PCIE_LANE-1:0] drp_mux_we; + + //---------- PIPE EQ Module Output --------------------- + wire [PCIE_LANE-1:0] eq_txeq_deemph; + wire [(PCIE_LANE*5)-1:0] eq_txeq_precursor; + wire [(PCIE_LANE*7)-1:0] eq_txeq_maincursor; + wire [(PCIE_LANE*5)-1:0] eq_txeq_postcursor; + + wire [PCIE_LANE-1:0] eq_rxeq_adapt_done; + + //---------- PIPE DRP Module Output -------------------- + wire [((((PCIE_LANE-1)>>2)+1)*8)-1:0] qdrp_addr; + wire [(PCIE_LANE-1)>>2:0] qdrp_en; + wire [((((PCIE_LANE-1)>>2)+1)*16)-1:0] qdrp_di; + wire [(PCIE_LANE-1)>>2:0] qdrp_we; + wire [(PCIE_LANE-1)>>2:0] qdrp_done; + wire [(PCIE_LANE-1)>>2:0] qdrp_qpllreset; + wire [((((PCIE_LANE-1)>>2)+1)*6)-1:0] qdrp_crscode; + wire [((((PCIE_LANE-1)>>2)+1)*9)-1:0] qdrp_fsm; + + //---------- QPLL Wrapper Output ----------------------- + wire [(PCIE_LANE-1)>>2:0] qpll_qplloutclk; + wire [(PCIE_LANE-1)>>2:0] qpll_qplloutrefclk; + wire [(PCIE_LANE-1)>>2:0] qpll_qplllock; + wire [((((PCIE_LANE-1)>>2)+1)*16)-1:0] qpll_do; + wire [(PCIE_LANE-1)>>2:0] qpll_rdy; + + //---------- GTX Wrapper Output ------------------------ + wire [PCIE_LANE-1:0] gt_txoutclk; + wire [PCIE_LANE-1:0] gt_rxoutclk; + wire [PCIE_LANE-1:0] gt_cplllock; + wire [PCIE_LANE-1:0] gt_rxcdrlock; + wire [PCIE_LANE-1:0] gt_txresetdone; + wire [PCIE_LANE-1:0] gt_rxresetdone; + wire [PCIE_LANE-1:0] gt_eyescandataerror; + wire [PCIE_LANE-1:0] gt_rxpmaresetdone; + wire [(PCIE_LANE*8)-1:0] gt_rxdisperr; + wire [(PCIE_LANE*8)-1:0] gt_rxnotintable; + wire [PCIE_LANE-1:0] gt_rxvalid; + wire [PCIE_LANE-1:0] gt_phystatus; + wire [(PCIE_LANE*3)-1:0] gt_rxstatus; + wire [(PCIE_LANE*3)-1:0] gt_rxbufstatus; + wire [PCIE_LANE-1:0] gt_rxelecidle; +//#SE, add +//- + wire [PCIE_LANE-1:0] gt_rxelecidle_i; + reg [PCIE_LANE-1:0] gt_rxrcvrdet_c; + wire [PCIE_LANE-1:0] gt_txratedone; + wire [PCIE_LANE-1:0] gt_rxratedone; + wire [(PCIE_LANE*16)-1:0]gt_do; + wire [PCIE_LANE-1:0] gt_rdy; + wire [PCIE_LANE-1:0] gt_txphinitdone; + wire [PCIE_LANE-1:0] gt_txdlysresetdone; + wire [PCIE_LANE-1:0] gt_txphaligndone; + wire [PCIE_LANE-1:0] gt_rxdlysresetdone; + wire [PCIE_LANE:0] gt_rxphaligndone; // Custom width for calculation + wire [PCIE_LANE-1:0] gt_txsyncout; // GTH + wire [PCIE_LANE-1:0] gt_txsyncdone; // GTH + wire [PCIE_LANE-1:0] gt_rxsyncout; // GTH + wire [PCIE_LANE-1:0] gt_rxsyncdone; // GTH + wire [PCIE_LANE-1:0] gt_rxcommadet; + wire [(PCIE_LANE*4)-1:0] gt_rxchariscomma; + wire [PCIE_LANE-1:0] gt_rxbyteisaligned; + wire [PCIE_LANE-1:0] gt_rxbyterealign; + wire [ 4:0] gt_rxchbondi [PCIE_LANE:0]; + wire [(PCIE_LANE*3)-1:0] gt_rxchbondlevel; + wire [ 4:0] gt_rxchbondo [PCIE_LANE:0]; + + wire [PCIE_LANE-1:0] rxchbonden; + wire [PCIE_LANE-1:0] rxchbondmaster; + wire [PCIE_LANE-1:0] rxchbondslave; + wire [PCIE_LANE-1:0] oobclk; + + //---------- TX EQ ------------------------------------- + localparam TXEQ_FS = 6'd40; // TX equalization full swing + localparam TXEQ_LF = 6'd15; // TX equalization low frequency + + //---------- Select JTAG Slave Type ---------------------------------------- + localparam GC_XSDB_SLAVE_TYPE = (PCIE_GT_DEVICE == "GTP") ? 16'h0400 : (PCIE_GT_DEVICE == "GTH") ? 16'h004A : 16'h0046; + + //---------- Generate Per-Lane Signals ----------------- + genvar i; // Index for per-lane signals + + + +//---------- Assignments ------------------------------------------------------- +assign gt_rxchbondo[0] = 5'd0; // Initialize rxchbond for lane 0 +assign gt_rxphaligndone[PCIE_LANE] = 1'd1; // Mot used +assign txsyncallin = &(gt_txphaligndone | (~user_active_lane)); +assign rxsyncallin = &(gt_rxphaligndone | (~user_active_lane)); + +//---------- Reset Synchronizer ------------------------------------------------ +always @ (posedge clk_pclk or negedge PIPE_RESET_N) +begin + + if (!PIPE_RESET_N) + begin + reset_n_reg1 <= 1'd0; + reset_n_reg2 <= 1'd0; + end + else + begin + reset_n_reg1 <= 1'd1; + reset_n_reg2 <= reset_n_reg1; + end +end + + +//---------- PIPE Clock Module ------------------------------------------------- +generate + + begin : pipe_clock_int +pcie_7x_0_pipe_clock # + ( + + .PCIE_ASYNC_EN (PCIE_ASYNC_EN), // PCIe async enable + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_LANE (PCIE_LANE), // PCIe number of lanes + .PCIE_LINK_SPEED (PCIE_LINK_SPEED), // PCIe link speed + .PCIE_REFCLK_FREQ (PCIE_REFCLK_FREQ), // PCIe reference clock frequency + .PCIE_USERCLK1_FREQ (PCIE_USERCLK1_FREQ), // PCIe user clock 1 frequency + .PCIE_USERCLK2_FREQ (PCIE_USERCLK2_FREQ), // PCIe user clock 2 frequency + .PCIE_OOBCLK_MODE (PCIE_OOBCLK_MODE), // PCIe OOB clock mode + .PCIE_DEBUG_MODE (PCIE_DEBUG_MODE) // PCIe debug mode + + ) + pipe_clock_i + ( + + //---------- Input ------------------------------------- + .CLK_CLK (PIPE_CLK), + .CLK_TXOUTCLK (gt_txoutclk[0]), // Reference clock from lane 0 + .CLK_RXOUTCLK_IN (gt_rxoutclk), + //.CLK_RST_N (1'b1), + .CLK_RST_N (PIPE_MMCM_RST_N), // Allow system reset for error recovery + .CLK_PCLK_SEL (rate_pclk_sel), + .CLK_PCLK_SEL_SLAVE (INT_PCLK_SEL_SLAVE ), + .CLK_GEN3 (rate_gen3[0]), + + //---------- Output ------------------------------------ + .CLK_PCLK (clk_pclk), + .CLK_PCLK_SLAVE (INT_PCLK_OUT_SLAVE), + .CLK_RXUSRCLK (clk_rxusrclk), + .CLK_RXOUTCLK_OUT (clk_rxoutclk), + .CLK_DCLK (clk_dclk), + .CLK_USERCLK1 (PIPE_USERCLK1), + .CLK_USERCLK2 (PIPE_USERCLK2), + .CLK_OOBCLK (clk_oobclk), + .CLK_MMCM_LOCK (clk_mmcm_lock) + + ); + + assign INT_RXUSRCLK_OUT = clk_rxusrclk; + assign INT_RXOUTCLK_OUT = clk_rxoutclk; + assign INT_DCLK_OUT = clk_dclk; + assign INT_USERCLK1_OUT = PIPE_USERCLK1; + assign INT_USERCLK2_OUT = PIPE_USERCLK2; + assign INT_OOBCLK_OUT = clk_oobclk; + assign INT_MMCM_LOCK_OUT = clk_mmcm_lock; + end +endgenerate + + + + +//---------- PIPE Reset Module ------------------------------------------------- +generate + + if (PCIE_GT_DEVICE == "GTP") + + begin : gtp_pipe_reset + + //---------- GTP PIPE Reset Module ------------------------------------- +pcie_7x_0_gtp_pipe_reset # + ( + + .PCIE_SIM_SPEEDUP (PCIE_SIM_SPEEDUP), // PCIe sim mode + //.PCIE_PLL_SEL (PCIE_PLL_SEL), // removed for GTP + //.PCIE_POWER_SAVING (PCIE_POWER_SAVING), // removed for GTP + //.PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_LANE (PCIE_LANE) // PCIe number of lanes + + ) + gtp_pipe_reset_i + ( + + //---------- Input ----------------------------- + .RST_CLK (clk_pclk), + .RST_RXUSRCLK (clk_rxusrclk), + .RST_DCLK (clk_dclk), + .RST_RST_N (reset_n_reg2), + .RST_DRP_DONE (drp_done), + .RST_RXPMARESETDONE (gt_rxpmaresetdone), + .RST_PLLLOCK (&qpll_qplllock), + //.RST_QPLL_IDLE (qrst_idle), // removed for GTP + .RST_RATE_IDLE (rate_idle), + .RST_RXCDRLOCK (user_rxcdrlock), + .RST_MMCM_LOCK (clk_mmcm_lock), + .RST_RESETDONE (user_resetdone), + .RST_PHYSTATUS (gt_phystatus), + .RST_TXSYNC_DONE (sync_txsync_done), + + //---------- Output ---------------------------- + .RST_CPLLRESET (rst_cpllreset), + .RST_CPLLPD (rst_cpllpd), + .RST_RXUSRCLK_RESET (rst_rxusrclk_reset), + .RST_DCLK_RESET (rst_dclk_reset), + .RST_GTRESET (rst_gtreset), + .RST_DRP_START (rst_drp_start), + .RST_DRP_X16 (rst_drp_x16), + .RST_USERRDY (rst_userrdy), + .RST_TXSYNC_START (rst_txsync_start), + .RST_IDLE (rst_idle), + .RST_FSM (rst_fsm) + + ); + + //---------- Default --------------------------------------------------- + assign gtp_rst_qpllreset = rst_cpllreset; + assign gtp_rst_qpllpd = rst_cpllpd; + + end + + else + + begin : pipe_reset + + //---------- PIPE Reset Module ----------------------------------------- +pcie_7x_0_pipe_reset # + ( + + .PCIE_SIM_SPEEDUP (PCIE_SIM_SPEEDUP), // PCIe sim mode + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT Device + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_POWER_SAVING (PCIE_POWER_SAVING), // PCIe power saving + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_LANE (PCIE_LANE) // PCIe number of lanes + + ) + pipe_reset_i + ( + + //---------- Input ----------------------------- + .RST_CLK (clk_pclk), + .RST_RXUSRCLK (clk_rxusrclk), + .RST_DCLK (clk_dclk), + .RST_RST_N (reset_n_reg2), + .RST_DRP_DONE (drp_done), + .RST_RXPMARESETDONE (gt_rxpmaresetdone), + .RST_CPLLLOCK (gt_cplllock), + .RST_QPLL_IDLE (qrst_idle), + .RST_RATE_IDLE (rate_idle), + .RST_RXCDRLOCK (user_rxcdrlock), + .RST_MMCM_LOCK (clk_mmcm_lock), + .RST_RESETDONE (user_resetdone), + .RST_PHYSTATUS (gt_phystatus), + .RST_TXSYNC_DONE (sync_txsync_done), + + //---------- Output ---------------------------- + .RST_CPLLRESET (rst_cpllreset), + .RST_CPLLPD (rst_cpllpd), + .RST_RXUSRCLK_RESET (rst_rxusrclk_reset), + .RST_DCLK_RESET (rst_dclk_reset), + .RST_GTRESET (rst_gtreset), + .RST_DRP_START (rst_drp_start), + .RST_DRP_X16X20_MODE (rst_drp_x16x20_mode), + .RST_DRP_X16 (rst_drp_x16), + .RST_USERRDY (rst_userrdy), + .RST_TXSYNC_START (rst_txsync_start), + .RST_IDLE (rst_idle), + .RST_FSM (rst_fsm[4:0]) + + ); + + //---------- Default --------------------------------------------------- + assign gtp_rst_qpllreset = 1'd0; + assign gtp_rst_qpllpd = 1'd0; + + end + +endgenerate + + + +//---------- QPLL Reset Module ------------------------------------------------- +generate + + if ((PCIE_LINK_SPEED == 3) || (PCIE_PLL_SEL == "QPLL")) + + begin : qpll_reset + +pcie_7x_0_qpll_reset # + ( + + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_POWER_SAVING (PCIE_POWER_SAVING),// PCIe power saving + .PCIE_LANE (PCIE_LANE) // PCIe number of lanes + + ) + qpll_reset_i + ( + + //---------- Input --------------------------------- + .QRST_CLK (clk_pclk), + .QRST_RST_N (reset_n_reg2), + .QRST_MMCM_LOCK (clk_mmcm_lock), + .QRST_CPLLLOCK (gt_cplllock), + .QRST_DRP_DONE (qdrp_done), + .QRST_QPLLLOCK (qpll_qplllock), + .QRST_RATE (PIPE_RATE), + .QRST_QPLLRESET_IN (rate_qpllreset), + .QRST_QPLLPD_IN (rate_qpllpd), + + //---------- Output -------------------------------- + .QRST_OVRD (qrst_ovrd), + .QRST_DRP_START (qrst_drp_start), + .QRST_QPLLRESET_OUT (qrst_qpllreset), + .QRST_QPLLPD_OUT (qrst_qpllpd), + .QRST_IDLE (qrst_idle), + .QRST_FSM (qrst_fsm) + + ); + + end + + else + + //---------- QPLL Reset Defaults --------------------------------------- + begin : qpll_reset_disable + assign qrst_ovrd = 1'd0; + assign qrst_drp_start = 1'd0; + assign qrst_qpllreset = 1'd0; + assign qrst_qpllpd = 1'd0; + assign qrst_idle = 1'd0; + assign qrst_fsm = 1; + end + +endgenerate + +assign jtag_sl_iport = {PCIE_LANE{37'd0}}; + +//Reference Clock for CPLLPD Fix + +wire gt_cpllpdrefclk; + +BUFG cpllpd_refclk_inst (.I (PIPE_CLK), .O (gt_cpllpdrefclk)); + +//---------- Generate PIPE Lane ------------------------------------------------ +generate for (i=0; i>2]) // removed for GTP + //.RATE_MMCM_LOCK (clk_mmcm_lock), // removed for GTP + .RATE_DRP_DONE (drp_done[i]), + .RATE_RXPMARESETDONE (gt_rxpmaresetdone[i]), + //.RATE_TXRESETDONE (gt_txresetdone[i]), // removed for GTP + //.RATE_RXRESETDONE (gt_rxresetdone[i]), // removed for GTP + .RATE_TXRATEDONE (gt_txratedone[i]), + .RATE_RXRATEDONE (gt_rxratedone[i]), + .RATE_PHYSTATUS (gt_phystatus[i]), + //.RATE_RESETOVRD_DONE (user_resetovrd_done[i]), // removed for GTP + .RATE_TXSYNC_DONE (sync_txsync_done[i]), + //.RATE_RXSYNC_DONE (sync_rxsync_done[i]), // removed for GTP + + //---------- Output ---------------------------- + //.RATE_CPLLPD (rate_cpllpd[i]), // removed for GTP + //.RATE_QPLLPD (rate_qpllpd[i]), // removed for GTP + //.RATE_CPLLRESET (rate_cpllreset[i]), // removed for GTP + //.RATE_QPLLRESET (rate_qpllreset[i]), // removed for GTP + //.RATE_TXPMARESET (rate_txpmareset[i]), // removed for GTP + //.RATE_RXPMARESET (rate_rxpmareset[i]), // removed for GTP + //.RATE_SYSCLKSEL (rate_sysclksel[(2*i)+1:(2*i)]), // removed for GTP + .RATE_DRP_START (rate_drp_start[i]), + .RATE_DRP_X16 (rate_drp_x16[i]), + .RATE_PCLK_SEL (rate_pclk_sel[i]), + //.RATE_GEN3 (rate_gen3[i]), // removed for GTP + .RATE_RATE_OUT (rate_rate[(3*i)+2:(3*i)]), + //.RATE_RESETOVRD_START (rate_resetovrd_start[i]), // removed for GTP + .RATE_TXSYNC_START (rate_txsync_start[i]), + .RATE_DONE (rate_done[i]), + //.RATE_RXSYNC_START (rate_rxsync_start[i]), // removed for GTP + //.RATE_RXSYNC (rate_rxsync[i]), // removed for GTP + .RATE_IDLE (rate_idle[i]), + .RATE_FSM (rate_fsm[(5*i)+4:(5*i)]) + ); + + //---------- Default for GTP ----------------------- + assign rate_cpllpd[i] = 1'd0; + assign rate_qpllpd[i] = 1'd0; + assign rate_cpllreset[i] = 1'd0; + assign rate_qpllreset[i] = 1'd0; + assign rate_txpmareset[i] = 1'd0; + assign rate_rxpmareset[i] = 1'd0; + assign rate_sysclksel[(2*i)+1:(2*i)] = 2'b0; + assign rate_gen3[i] = 1'd0; + assign rate_resetovrd_start[i] = 1'd0; + assign rate_rxsync_start[i] = 1'd0; + assign rate_rxsync[i] = 1'd0; + + end + + else + + begin : pipe_rate + + //---------- PIPE Rate Module ---------------------------------------------- +pcie_7x_0_pipe_rate # + ( + + .PCIE_SIM_SPEEDUP (PCIE_SIM_SPEEDUP), // PCIe sim speedup + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_POWER_SAVING (PCIE_POWER_SAVING),// PCIe power saving + .PCIE_ASYNC_EN (PCIE_ASYNC_EN), // PCIe async enable + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_RXBUF_EN (PCIE_RXBUF_EN) // PCIe RX buffer enable for Gen3 only + + ) + pipe_rate_i + ( + + //---------- Input --------------------------------- + .RATE_CLK (clk_pclk), + .RATE_RST_N (!rst_cpllreset), + .RATE_RST_IDLE (rst_idle), + .RATE_ACTIVE_LANE (user_active_lane[i]), + .RATE_RATE_IN (PIPE_RATE), + .RATE_CPLLLOCK (gt_cplllock[i]), + .RATE_QPLLLOCK (qpll_qplllock[i>>2]), + .RATE_MMCM_LOCK (clk_mmcm_lock), + .RATE_DRP_DONE (drp_done[i]), + .RATE_RXPMARESETDONE (gt_rxpmaresetdone[i]), + .RATE_TXRESETDONE (gt_txresetdone[i]), + .RATE_RXRESETDONE (gt_rxresetdone[i]), + .RATE_TXRATEDONE (gt_txratedone[i]), + .RATE_RXRATEDONE (gt_rxratedone[i]), + .RATE_PHYSTATUS (gt_phystatus[i]), + .RATE_RESETOVRD_DONE (user_resetovrd_done[i]), + .RATE_TXSYNC_DONE (sync_txsync_done[i]), + .RATE_RXSYNC_DONE (sync_rxsync_done[i]), + + //---------- Output -------------------------------- + .RATE_CPLLPD (rate_cpllpd[i]), + .RATE_QPLLPD (rate_qpllpd[i]), + .RATE_CPLLRESET (rate_cpllreset[i]), + .RATE_QPLLRESET (rate_qpllreset[i]), + .RATE_TXPMARESET (rate_txpmareset[i]), + .RATE_RXPMARESET (rate_rxpmareset[i]), + .RATE_SYSCLKSEL (rate_sysclksel[(2*i)+1:(2*i)]), + .RATE_DRP_START (rate_drp_start[i]), + .RATE_DRP_X16X20_MODE (rate_drp_x16x20_mode[i]), + .RATE_DRP_X16 (rate_drp_x16[i]), + .RATE_PCLK_SEL (rate_pclk_sel[i]), + .RATE_GEN3 (rate_gen3[i]), + .RATE_RATE_OUT (rate_rate[(3*i)+2:(3*i)]), + .RATE_RESETOVRD_START (rate_resetovrd_start[i]), + .RATE_TXSYNC_START (rate_txsync_start[i]), + .RATE_DONE (rate_done[i]), + .RATE_RXSYNC_START (rate_rxsync_start[i]), + .RATE_RXSYNC (rate_rxsync[i]), + .RATE_IDLE (rate_idle[i]), + .RATE_FSM (rate_fsm[(5*i)+4:(5*i)]) + + ); + + end + + + + //---------- PIPE Sync Module ---------------------------------------------- +pcie_7x_0_pipe_sync # + ( + + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT Device + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_RXBUF_EN (PCIE_RXBUF_EN), // PCIe RX buffer enable for Gen3 only + .PCIE_TXSYNC_MODE (PCIE_TXSYNC_MODE), // PCIe TX sync mode + .PCIE_RXSYNC_MODE (PCIE_RXSYNC_MODE), // PCIe RX sync mode + .PCIE_LANE (PCIE_LANE), // PCIe lane + .PCIE_LINK_SPEED (PCIE_LINK_SPEED) // PCIe link speed + + ) + pipe_sync_i + ( + + //---------- Input --------------------------------- + .SYNC_CLK (clk_pclk), + .SYNC_RST_N (!rst_cpllreset), + .SYNC_SLAVE (i > 0), + .SYNC_GEN3 (rate_gen3[i]), + .SYNC_RATE_IDLE (rate_idle[i]), + .SYNC_MMCM_LOCK (clk_mmcm_lock), +//#SE, mod +// .SYNC_RXELECIDLE (gt_rxelecidle[i]), + .SYNC_RXELECIDLE (gt_rxelecidle_i[i]), + .SYNC_RXCDRLOCK (user_rxcdrlock[i]), + .SYNC_ACTIVE_LANE (user_active_lane[i]), + + .SYNC_TXSYNC_START (rate_txsync_start[i] || rst_txsync_start), + .SYNC_TXPHINITDONE (&(gt_txphinitdone | (~user_active_lane))), + .SYNC_TXDLYSRESETDONE (txdlysresetdone[i]), + .SYNC_TXPHALIGNDONE (txphaligndone[i]), + .SYNC_TXSYNCDONE (gt_txsyncdone[i]), // GTH + + .SYNC_RXSYNC_START (rate_rxsync_start[i]), + .SYNC_RXDLYSRESETDONE (rxdlysresetdone[i]), + .SYNC_RXPHALIGNDONE_M (gt_rxphaligndone[0]), + .SYNC_RXPHALIGNDONE_S (rxphaligndone_s[i]), + .SYNC_RXSYNC_DONEM_IN (sync_rxsync_donem[0]), + .SYNC_RXSYNCDONE (gt_rxsyncdone[i]), // GTH + + //---------- Output -------------------------------- + .SYNC_TXPHDLYRESET (sync_txphdlyreset[i]), + .SYNC_TXPHALIGN (sync_txphalign[i]), + .SYNC_TXPHALIGNEN (sync_txphalignen[i]), + .SYNC_TXPHINIT (sync_txphinit[i]), + .SYNC_TXDLYBYPASS (sync_txdlybypass[i]), + .SYNC_TXDLYSRESET (sync_txdlysreset[i]), + .SYNC_TXDLYEN (sync_txdlyen[i]), + .SYNC_TXSYNC_DONE (sync_txsync_done[i]), + .SYNC_FSM_TX (sync_fsm_tx[(6*i)+5:(6*i)]), + + .SYNC_RXPHALIGN (sync_rxphalign[i]), + .SYNC_RXPHALIGNEN (sync_rxphalignen[i]), + .SYNC_RXDLYBYPASS (sync_rxdlybypass[i]), + .SYNC_RXDLYSRESET (sync_rxdlysreset[i]), + .SYNC_RXDLYEN (sync_rxdlyen[i]), + .SYNC_RXDDIEN (sync_rxddien[i]), + .SYNC_RXSYNC_DONEM_OUT (sync_rxsync_donem[i]), + .SYNC_RXSYNC_DONE (sync_rxsync_done[i]), + .SYNC_FSM_RX (sync_fsm_rx[(7*i)+6:(7*i)]) + + ); + + //---------- PIPE Sync Assignments ----------------------------------------- + assign txdlysresetdone[i] = (PCIE_TXSYNC_MODE == 1) ? gt_txdlysresetdone[i] : >_txdlysresetdone; + assign txphaligndone[i] = (PCIE_TXSYNC_MODE == 1) ? gt_txphaligndone[i] : &(gt_txphaligndone | (~user_active_lane)); + assign rxdlysresetdone[i] = (PCIE_RXSYNC_MODE == 1) ? gt_rxdlysresetdone[i] : >_rxdlysresetdone; + assign rxphaligndone_s[i] = (PCIE_LANE == 1) ? 1'd0 : >_rxphaligndone[PCIE_LANE:1]; + + + //---------- GTP PIPE DRP Module ------------------------------------------- + if (PCIE_GT_DEVICE == "GTP") + + begin : gtp_pipe_drp + + //---------- GTP PIPE DRP Module --------------------------------------- +pcie_7x_0_gtp_pipe_drp + gtp_pipe_drp_i + ( + + //---------- Input --------------------------------- + .DRP_CLK (clk_dclk), + .DRP_RST_N (!rst_dclk_reset), + .DRP_X16 (rst_drp_x16 || rate_drp_x16[i]), + .DRP_START (rst_drp_start || rate_drp_start[i]), + .DRP_DO (gt_do[(16*i)+15:(16*i)]), + .DRP_RDY (gt_rdy[i]), + + //---------- Output -------------------------------- + .DRP_ADDR (drp_addr[(9*i)+8:(9*i)]), + .DRP_EN (drp_en[i]), + .DRP_DI (drp_di[(16*i)+15:(16*i)]), + .DRP_WE (drp_we[i]), + .DRP_DONE (drp_done[i]), + .DRP_FSM (drp_fsm[(3*i)+2:(3*i)]) + + ); + + end + + else + + begin : pipe_drp + + //---------- PIPE DRP Module ------------------------------------------- +pcie_7x_0_pipe_drp # + ( + + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_AUX_CDR_GEN3_EN (PCIE_AUX_CDR_GEN3_EN), // PCIe AUX CDR Gen3 enable + .PCIE_ASYNC_EN (PCIE_ASYNC_EN), // PCIe async enable + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_RXBUF_EN (PCIE_RXBUF_EN), // PCIe RX buffer enable for Gen3 only + .PCIE_TXSYNC_MODE (PCIE_TXSYNC_MODE), // PCIe TX sync mode + .PCIE_RXSYNC_MODE (PCIE_RXSYNC_MODE) // PCIe RX sync mode + + ) + pipe_drp_i + ( + + //---------- Input --------------------------------- + .DRP_CLK (clk_dclk), + .DRP_RST_N (!rst_dclk_reset), + .DRP_GTXRESET (rst_gtreset), + .DRP_RATE (PIPE_RATE), + .DRP_X16X20_MODE (rst_drp_x16x20_mode || rate_drp_x16x20_mode[i]), + .DRP_X16 (rst_drp_x16 || rate_drp_x16[i]), + .DRP_START (rst_drp_start || rate_drp_start[i]), + .DRP_DO (gt_do[(16*i)+15:(16*i)]), + .DRP_RDY (gt_rdy[i]), + + //---------- Output -------------------------------- + .DRP_ADDR (drp_addr[(9*i)+8:(9*i)]), + .DRP_EN (drp_en[i]), + .DRP_DI (drp_di[(16*i)+15:(16*i)]), + .DRP_WE (drp_we[i]), + .DRP_DONE (drp_done[i]), + .DRP_FSM (drp_fsm[(3*i)+2:(3*i)]) + + ); + + end + + + assign jtag_sl_oport[((i+1)*17)-1 : (i*17)] = 17'd0; + assign jtag_sl_addr[(17*i)+16:(17*i)] = 17'd0; + assign jtag_sl_den[i] = 1'd0; + assign jtag_sl_di[(16*i)+15:(16*i)] = 16'd0; + assign jtag_sl_we[i] = 1'd0; + + //---------- Generate DRP MUX ---------------------------------------------- + assign PIPE_JTAG_RDY[i] = (drp_fsm[(3*i)+2:(3*i)] == 3'b000); + assign jtag_sl_en[i] = (jtag_sl_addr[(17*i)+16:(17*i)+9] == 8'd0) ? jtag_sl_den[i] : 1'd0; + + // Channel DRP + assign drp_mux_en[i] = (PIPE_JTAG_RDY[i] && EXT_CH_GT_DRP) ? EXT_CH_GT_DRPEN[i] : drp_en[i]; + assign drp_mux_di[(16*i)+15:(16*i)] = (PIPE_JTAG_RDY[i] && EXT_CH_GT_DRP) ? EXT_CH_GT_DRPDI[(16*i)+15:(16*i)] : drp_di[(16*i)+15:(16*i)]; + assign drp_mux_addr[(9*i)+8:(9*i)] = (PIPE_JTAG_RDY[i] && EXT_CH_GT_DRP) ? EXT_CH_GT_DRPADDR[(9*i)+8:(9*i)] : drp_addr[(9*i)+8:(9*i)]; + assign drp_mux_we[i] = (PIPE_JTAG_RDY[i] && EXT_CH_GT_DRP) ? EXT_CH_GT_DRPWE[i] : drp_we[i]; + + //---------- Generate PIPE EQ ---------------------------------------------- + if (PCIE_LINK_SPEED == 3) + + begin : pipe_eq + + //---------- PIPE EQ Module -------------------------------------------- +pcie_7x_0_pipe_eq # + ( + .PCIE_SIM_MODE (PCIE_SIM_MODE), // PCIe sim mode + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), + .PCIE_RXEQ_MODE_GEN3 (PCIE_RXEQ_MODE_GEN3) // PCIe RX equalization mode + ) + pipe_eq_i + ( + + //---------- Input ----------------------------- + .EQ_CLK (clk_pclk), + .EQ_RST_N (!rst_cpllreset), + .EQ_GEN3 (rate_gen3[i]), + + .EQ_TXEQ_CONTROL (PIPE_TXEQ_CONTROL[(2*i)+1:(2*i)]), + .EQ_TXEQ_PRESET (PIPE_TXEQ_PRESET[(4*i)+3:(4*i)]), + .EQ_TXEQ_PRESET_DEFAULT (PIPE_TXEQ_PRESET_DEFAULT[(4*i)+3:(4*i)]), + .EQ_TXEQ_DEEMPH_IN (PIPE_TXEQ_DEEMPH[(6*i)+5:(6*i)]), // renamed + + .EQ_RXEQ_CONTROL (PIPE_RXEQ_CONTROL[(2*i)+1:(2*i)]), + .EQ_RXEQ_PRESET (PIPE_RXEQ_PRESET[(3*i)+2:(3*i)]), + .EQ_RXEQ_LFFS (PIPE_RXEQ_LFFS[(6*i)+5:(6*i)]), + .EQ_RXEQ_TXPRESET (PIPE_RXEQ_TXPRESET[(4*i)+3:(4*i)]), + .EQ_RXEQ_USER_EN (PIPE_RXEQ_USER_EN[i]), + .EQ_RXEQ_USER_TXCOEFF (PIPE_RXEQ_USER_TXCOEFF[(18*i)+17:(18*i)]), + .EQ_RXEQ_USER_MODE (PIPE_RXEQ_USER_MODE[i]), + + //---------- Output ---------------------------- + .EQ_TXEQ_DEEMPH (eq_txeq_deemph[i]), + .EQ_TXEQ_PRECURSOR (eq_txeq_precursor[(5*i)+4:(5*i)]), + .EQ_TXEQ_MAINCURSOR (eq_txeq_maincursor[(7*i)+6:(7*i)]), + .EQ_TXEQ_POSTCURSOR (eq_txeq_postcursor[(5*i)+4:(5*i)]), + .EQ_TXEQ_DEEMPH_OUT (PIPE_TXEQ_COEFF[(18*i)+17:(18*i)]),// renamed + .EQ_TXEQ_DONE (PIPE_TXEQ_DONE[i]), + .EQ_TXEQ_FSM (PIPE_TXEQ_FSM[(6*i)+5:(6*i)]), + + .EQ_RXEQ_NEW_TXCOEFF (PIPE_RXEQ_NEW_TXCOEFF[(18*i)+17:(18*i)]), + .EQ_RXEQ_LFFS_SEL (PIPE_RXEQ_LFFS_SEL[i]), + .EQ_RXEQ_ADAPT_DONE (eq_rxeq_adapt_done[i]), + .EQ_RXEQ_DONE (PIPE_RXEQ_DONE[i]), + .EQ_RXEQ_FSM (PIPE_RXEQ_FSM[(6*i)+5:(6*i)]) + + ); + + end + + else + + //---------- PIPE EQ Defaults ------------------------------------------ + begin : pipe_eq_disable + assign eq_txeq_deemph[i] = 1'd0; + assign eq_txeq_precursor[(5*i)+4:(5*i)] = 5'h00; + assign eq_txeq_maincursor[(7*i)+6:(7*i)] = 7'h00; + assign eq_txeq_postcursor[(5*i)+4:(5*i)] = 5'h00; + assign eq_rxeq_adapt_done[i] = 1'd0; + assign PIPE_TXEQ_COEFF[(18*i)+17:(18*i)] = 18'd0; + assign PIPE_TXEQ_DONE[i] = 1'd0; + assign PIPE_TXEQ_FSM[(6*i)+5:(6*i)] = 6'd0; + + assign PIPE_RXEQ_NEW_TXCOEFF[(18*i)+17:(18*i)] = 18'd0; + assign PIPE_RXEQ_LFFS_SEL[i] = 1'd0; + assign PIPE_RXEQ_ADAPT_DONE[i] = 1'd0; + assign PIPE_RXEQ_DONE[i] = 1'd0; + assign PIPE_RXEQ_FSM[(6*i)+5:(6*i)] = 6'd0; + end + + //---------- Generate PIPE Common Per Quad for Gen3 ------------------------ + if ((i%4)==0) + + begin : pipe_quad + + //---------- Generate QPLL Powerdown and Reset ------------------------- + assign qpllpd = (PCIE_GT_DEVICE == "GTP") ? gtp_rst_qpllpd : qrst_qpllpd; + assign qpllreset[i>>2] = (PCIE_GT_DEVICE == "GTP") ? gtp_rst_qpllreset : (qrst_qpllreset || qdrp_qpllreset[i>>2]); + + if ((PCIE_LINK_SPEED == 3) || (PCIE_PLL_SEL == "QPLL") || (PCIE_GT_DEVICE == "GTP")) + + begin : gt_common_enabled + + if (PCIE_EXT_GT_COMMON == "FALSE") + + begin : gt_common_int + + //---------- GT COMMON INTERNAL Module --------------------------------------- +pcie_7x_0_gt_common # + ( + + .PCIE_SIM_MODE (PCIE_SIM_MODE), // PCIe sim mode + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_REFCLK_FREQ (PCIE_REFCLK_FREQ) // PCIe reference clock frequency + + ) + gt_common_i + ( + + //---------- Input ------------------------- + .CPLLPDREFCLK (gt_cpllpdrefclk), + .PIPE_CLK (PIPE_CLK), + .QPLL_QPLLPD (qpllpd), + .QPLL_QPLLRESET (qpllreset[i>>2]), + .QPLL_DRP_CLK (clk_dclk), + .QPLL_DRP_RST_N (rst_dclk_reset), + .QPLL_DRP_OVRD (qrst_ovrd), + .QPLL_DRP_GEN3 (&rate_gen3), + .QPLL_DRP_START (qrst_drp_start), + + .QPLL_DRP_CRSCODE (qdrp_crscode[(6*(i>>2))+5:(6*(i>>2))]), + .QPLL_DRP_FSM (qdrp_fsm[(9*(i>>2))+8:(9*(i>>2))]), + .QPLL_DRP_DONE (qdrp_done[i>>2]), + .QPLL_DRP_RESET (qdrp_qpllreset[i>>2]), + .QPLL_QPLLOUTCLK (qpll_qplloutclk[i>>2]), + .QPLL_QPLLOUTREFCLK (qpll_qplloutrefclk[i>>2]), + .QPLL_QPLLLOCK (qpll_qplllock[i>>2]) + ); + assign QPLL_QPLLPD = 1'b0; + assign QPLL_QPLLRESET[i>>2] = 1'b0; + assign QPLL_DRP_CLK = 1'b0; + assign QPLL_DRP_RST_N = 1'b0; + assign QPLL_DRP_OVRD = 1'b0; + assign QPLL_DRP_GEN3 = 1'b0; + assign QPLL_DRP_START = 1'b0; + assign INT_QPLLLOCK_OUT[i>>2] = qpll_qplllock[i>>2] ; + assign INT_QPLLOUTREFCLK_OUT[i>>2] = qpll_qplloutrefclk[i>>2]; + assign INT_QPLLOUTCLK_OUT[i>>2] = qpll_qplloutclk[i>>2]; + end + else + begin : gt_common_ext + assign qdrp_done[i>>2] = QPLL_DRP_DONE[i>>2]; + assign qdrp_qpllreset[i>>2] = QPLL_DRP_RESET[i>>2]; + assign qdrp_crscode[(6*(i>>2))+5:(6*(i>>2))] = QPLL_DRP_CRSCODE[(6*(i>>2))+5:(6*(i>>2))]; + assign qdrp_fsm[(9*(i>>2))+8:(9*(i>>2))] = QPLL_DRP_FSM[(9*(i>>2))+8:(9*(i>>2))]; + assign qpll_qplloutclk[i>>2] = QPLL_QPLLOUTCLK[i>>2]; + assign qpll_qplloutrefclk[i>>2] = QPLL_QPLLOUTREFCLK[i>>2]; + assign qpll_qplllock[i>>2] = QPLL_QPLLLOCK[i>>2]; + assign QPLL_QPLLPD = qpllpd; + assign QPLL_QPLLRESET[i>>2] = qpllreset[i>>2]; + assign QPLL_DRP_CLK = clk_dclk; + assign QPLL_DRP_RST_N = rst_dclk_reset; + assign QPLL_DRP_OVRD = qrst_ovrd; + assign QPLL_DRP_GEN3 = &rate_gen3; + assign QPLL_DRP_START = qrst_drp_start; + assign INT_QPLLLOCK_OUT[i>>2] = 1'b0; + assign INT_QPLLOUTCLK_OUT[i>>2] = 1'b0; + assign INT_QPLLOUTREFCLK_OUT[i>>2] = 1'b0; + end + end + else + + //---------- PIPE Common Defaults ---------------------------------- + begin : gt_common_disabled + assign qdrp_done[i>>2] = 1'd0; + assign qdrp_crscode[(6*(i>>2))+5:(6*(i>>2))] = 6'd0; + assign qdrp_fsm[(9*(i>>2))+8:(9*(i>>2))] = 9'd0; + assign qpll_qplloutclk[i>>2] = 1'd0; + assign qpll_qplloutrefclk[i>>2] = 1'd0; + assign qpll_qplllock[i>>2] = 1'd0; + assign QPLL_QPLLPD = 1'b0; + assign QPLL_QPLLRESET[i>>2] = 1'b0; + assign QPLL_DRP_CLK = 1'b0; + assign QPLL_DRP_RST_N = 1'b0; + assign QPLL_DRP_OVRD = 1'b0; + assign QPLL_DRP_GEN3 = 1'b0; + assign QPLL_DRP_START = 1'b0; + assign INT_QPLLLOCK_OUT[i>>2] = 1'b0; + assign INT_QPLLOUTCLK_OUT[i>>2] = 1'b0; + assign INT_QPLLOUTREFCLK_OUT[i>>2] = 1'b0; + end + end + + //---------- GT Wrapper ---------------------------------------------------- + assign gt_txpmareset_i[i] = (user_txpmareset[i] || rate_txpmareset[i]); + assign gt_rxpmareset_i[i] = (user_rxpmareset[i] || rate_rxpmareset[i]); + +pcie_7x_0_gt_wrapper # + ( + + .PCIE_SIM_MODE (PCIE_SIM_MODE), // PCIe sim mode + .PCIE_SIM_SPEEDUP (PCIE_SIM_SPEEDUP), // PCIe sim speedup + .PCIE_SIM_TX_EIDLE_DRIVE_LEVEL (PCIE_SIM_TX_EIDLE_DRIVE_LEVEL), // PCIe sim TX electrical idle drive level + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_LPM_DFE (PCIE_LPM_DFE), // PCIe LPM or DFE mode for Gen1/Gen2 only + .PCIE_LPM_DFE_GEN3 (PCIE_LPM_DFE_GEN3), // PCIe LPM or DFE mode for Gen3 only + .PCIE_ASYNC_EN (PCIE_ASYNC_EN), // PCIe async enable + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_TXSYNC_MODE (PCIE_TXSYNC_MODE), // PCIe TX sync mode + .PCIE_RXSYNC_MODE (PCIE_RXSYNC_MODE), // PCIe RX sync mode + .PCIE_CHAN_BOND (PCIE_CHAN_BOND), // PCIe Channel bonding mode + .PCIE_CHAN_BOND_EN (PCIE_CHAN_BOND_EN), // PCIe Channel bonding enable for Gen1/Gen2 only + .PCIE_LANE (PCIE_LANE), // PCIe number of lane + .PCIE_REFCLK_FREQ (PCIE_REFCLK_FREQ), // PCIe reference clock frequency + .PCIE_TX_EIDLE_ASSERT_DELAY (PCIE_TX_EIDLE_ASSERT_DELAY), // PCIe TX electrical idle assert delay + .PCIE_OOBCLK_MODE (PCIE_OOBCLK_MODE), // PCIe OOB clock mode + .TX_MARGIN_FULL_0 (TX_MARGIN_FULL_0), + .TX_MARGIN_FULL_1 (TX_MARGIN_FULL_1), + .TX_MARGIN_FULL_2 (TX_MARGIN_FULL_2), + .TX_MARGIN_FULL_3 (TX_MARGIN_FULL_3), + .TX_MARGIN_FULL_4 (TX_MARGIN_FULL_4), + .TX_MARGIN_LOW_0 (TX_MARGIN_LOW_0), + .TX_MARGIN_LOW_1 (TX_MARGIN_LOW_1), + .TX_MARGIN_LOW_2 (TX_MARGIN_LOW_2), + .TX_MARGIN_LOW_3 (TX_MARGIN_LOW_3), + .TX_MARGIN_LOW_4 (TX_MARGIN_LOW_4), + + .PCIE_DEBUG_MODE (PCIE_DEBUG_MODE) // PCIe debug mode + ) + gt_wrapper_i + ( + + //---------- GT User Ports ------------------------- + .GT_MASTER (i == 0), + .GT_GEN3 (rate_gen3[i]), + .GT_RX_CONVERGE (&user_rx_converge), + + //---------- GT Clock Ports ------------------------ + .GT_GTREFCLK0 (PIPE_CLK), + .GT_QPLLCLK (qpll_qplloutclk[i>>2]), + .GT_QPLLREFCLK (qpll_qplloutrefclk[i>>2]), + .GT_TXUSRCLK (clk_pclk), + .GT_RXUSRCLK (clk_rxusrclk), + .GT_TXUSRCLK2 (clk_pclk), + .GT_RXUSRCLK2 (clk_rxusrclk), + .GT_OOBCLK (oobclk[i]), + .GT_TXSYSCLKSEL (rate_sysclksel[(2*i)+1:(2*i)]), + .GT_RXSYSCLKSEL (rate_sysclksel[(2*i)+1:(2*i)]), + .GT_CPLLPDREFCLK (gt_cpllpdrefclk), + + .GT_TXOUTCLK (gt_txoutclk[i]), + .GT_RXOUTCLK (gt_rxoutclk[i]), + .GT_CPLLLOCK (gt_cplllock[i]), + .GT_RXCDRLOCK (gt_rxcdrlock[i]), + + //---------- GT Reset Ports ------------------------ + .GT_CPLLPD (rst_cpllpd || rate_cpllpd[i]), + .GT_CPLLRESET (rst_cpllreset || rate_cpllreset[i]), + .GT_TXUSERRDY (rst_userrdy), + .GT_RXUSERRDY (rst_userrdy), + .GT_RESETOVRD (user_resetovrd[i]), + .GT_GTTXRESET (rst_gtreset), + .GT_GTRXRESET (rst_gtreset), + .GT_TXPMARESET (gt_txpmareset_i[i]), // (user_txpmareset[i] || rate_txpmareset[i]), + .GT_RXPMARESET (gt_rxpmareset_i[i]), // (user_rxpmareset[i] || rate_rxpmareset[i]), + .GT_RXCDRRESET (user_rxcdrreset[i]), + .GT_RXCDRFREQRESET (user_rxcdrfreqreset[i]), + .GT_RXDFELPMRESET (user_rxdfelpmreset[i]), + .GT_EYESCANRESET (user_eyescanreset[i]), + .GT_TXPCSRESET (user_txpcsreset[i]), + .GT_RXPCSRESET (user_rxpcsreset[i]), + .GT_RXBUFRESET (user_rxbufreset[i]), + + .GT_EYESCANDATAERROR (gt_eyescandataerror[i]), + .GT_TXRESETDONE (gt_txresetdone[i]), + .GT_RXRESETDONE (gt_rxresetdone[i]), + .GT_RXPMARESETDONE (gt_rxpmaresetdone[i]), + + //---------- GT TX Data Ports ---------------------- + .GT_TXDATA (PIPE_TXDATA[(32*i)+31:(32*i)]), + .GT_TXDATAK (PIPE_TXDATAK[(4*i)+3:(4*i)]), + + .GT_TXP (PIPE_TXP[i]), + .GT_TXN (PIPE_TXN[i]), + + //---------- GT RX Data Ports ---------------------- + .GT_RXP (PIPE_RXP[i]), + .GT_RXN (PIPE_RXN[i]), + + .GT_RXDATA (PIPE_RXDATA[(32*i)+31:(32*i)]), + .GT_RXDATAK (PIPE_RXDATAK[(4*i)+3:(4*i)]), + + //---------- GT Command Ports ---------------------- + .GT_TXDETECTRX (PIPE_TXDETECTRX), + .GT_TXELECIDLE (PIPE_TXELECIDLE[i]), + .GT_TXCOMPLIANCE (PIPE_TXCOMPLIANCE[i]), + .GT_RXPOLARITY (PIPE_RXPOLARITY[i]), + .GT_TXPOWERDOWN (PIPE_POWERDOWN[(2*i)+1:(2*i)]), + .GT_RXPOWERDOWN (PIPE_POWERDOWN[(2*i)+1:(2*i)]), + .GT_TXRATE (rate_rate[(3*i)+2:(3*i)]), + .GT_RXRATE (rate_rate[(3*i)+2:(3*i)]), + + //---------- GT Electrical Command Ports ----------- + .GT_TXMARGIN (PIPE_TXMARGIN), + .GT_TXSWING (PIPE_TXSWING), + .GT_TXDEEMPH (PIPE_TXDEEMPH[i]), + .GT_TXINHIBIT (PIPE_TXINHIBIT[i]), + .GT_TXPRECURSOR (eq_txeq_precursor[(5*i)+4:(5*i)]), + .GT_TXMAINCURSOR (eq_txeq_maincursor[(7*i)+6:(7*i)]), + .GT_TXPOSTCURSOR (eq_txeq_postcursor[(5*i)+4:(5*i)]), + + //---------- GT Status Ports ----------------------- + .GT_RXVALID (gt_rxvalid[i]), + .GT_PHYSTATUS (gt_phystatus[i]), +//#SE, mod +// .GT_RXELECIDLE (gt_rxelecidle[i]), + .GT_RXELECIDLE (gt_rxelecidle_i[i]), + .GT_RXSTATUS (gt_rxstatus[(3*i)+2:(3*i)]), + .GT_RXBUFSTATUS (gt_rxbufstatus[(3*i)+2:(3*i)]), + .GT_TXRATEDONE (gt_txratedone[i]), + .GT_RXRATEDONE (gt_rxratedone[i]), + .GT_RXDISPERR (gt_rxdisperr[(8*i)+7:(8*i)]), + .GT_RXNOTINTABLE (gt_rxnotintable[(8*i)+7:(8*i)]), + + //---------- GT DRP Ports -------------------------- + .GT_DRPCLK (clk_dclk), + .GT_DRPADDR (drp_mux_addr[(9*i)+8:(9*i)]), + .GT_DRPEN (drp_mux_en[i]), + .GT_DRPDI (drp_mux_di[(16*i)+15:(16*i)]), + .GT_DRPWE (drp_mux_we[i]), + + .GT_DRPDO (gt_do[(16*i)+15:(16*i)]), + .GT_DRPRDY (gt_rdy[i]), + + //---------- GT TX Sync Ports ---------------------- + .GT_TXPHALIGN (sync_txphalign[i]), + .GT_TXPHALIGNEN (sync_txphalignen[i]), + .GT_TXPHINIT (sync_txphinit[i]), + .GT_TXDLYBYPASS (sync_txdlybypass[i]), + .GT_TXDLYSRESET (sync_txdlysreset[i]), + .GT_TXDLYEN (sync_txdlyen[i]), + + .GT_TXDLYSRESETDONE (gt_txdlysresetdone[i]), + .GT_TXPHINITDONE (gt_txphinitdone[i]), + .GT_TXPHALIGNDONE (gt_txphaligndone[i]), + + .GT_TXPHDLYRESET (sync_txphdlyreset[i]), + .GT_TXSYNCMODE (i == 0), // GTH, GTP + .GT_TXSYNCIN (gt_txsyncout[0]), // GTH, GTP + .GT_TXSYNCALLIN (txsyncallin), // GTH, GTP + + .GT_TXSYNCOUT (gt_txsyncout[i]), // GTH, GTP + .GT_TXSYNCDONE (gt_txsyncdone[i]), // GTH, GTP + + //---------- GT RX Sync Ports ---------------------- + .GT_RXPHALIGN (sync_rxphalign[i]), + .GT_RXPHALIGNEN (sync_rxphalignen[i]), + .GT_RXDLYBYPASS (sync_rxdlybypass[i]), + .GT_RXDLYSRESET (sync_rxdlysreset[i]), + .GT_RXDLYEN (sync_rxdlyen[i]), + .GT_RXDDIEN (sync_rxddien[i]), + + .GT_RXDLYSRESETDONE (gt_rxdlysresetdone[i]), + .GT_RXPHALIGNDONE (gt_rxphaligndone[i]), + + .GT_RXSYNCMODE (i == 0), // GTH + .GT_RXSYNCIN (gt_rxsyncout[0]), // GTH + .GT_RXSYNCALLIN (rxsyncallin), // GTH + + .GT_RXSYNCOUT (gt_rxsyncout[i]), // GTH + .GT_RXSYNCDONE (gt_rxsyncdone[i]), // GTH + + //---------- GT Comma Alignment Ports -------------- + .GT_RXSLIDE (PIPE_RXSLIDE[i]), + + .GT_RXCOMMADET (gt_rxcommadet[i]), + .GT_RXCHARISCOMMA (gt_rxchariscomma[(4*i)+3:(4*i)]), + .GT_RXBYTEISALIGNED (gt_rxbyteisaligned[i]), + .GT_RXBYTEREALIGN (gt_rxbyterealign[i]), + + //---------- GT Channel Bonding Ports -------------- + .GT_RXCHANISALIGNED (PIPE_RXCHANISALIGNED[i]), + .GT_RXCHBONDEN (rxchbonden[i]), + .GT_RXCHBONDI (gt_rxchbondi[i]), + .GT_RXCHBONDLEVEL (gt_rxchbondlevel[(3*i)+2:(3*i)]), + .GT_RXCHBONDMASTER (rxchbondmaster[i]), + .GT_RXCHBONDSLAVE (rxchbondslave[i]), + .GT_RXCHBONDO (gt_rxchbondo[i+1]), + + //---------- GT PRBS/Loopback Ports ---------------- + .GT_TXPRBSSEL (PIPE_TXPRBSSEL), + .GT_RXPRBSSEL (PIPE_RXPRBSSEL), + .GT_TXPRBSFORCEERR (PIPE_TXPRBSFORCEERR), + .GT_RXPRBSCNTRESET (PIPE_RXPRBSCNTRESET), + .GT_LOOPBACK (PIPE_LOOPBACK), + + .GT_RXPRBSERR (PIPE_RXPRBSERR[i]), + + //---------- GT Debug Port ------------------------- + .GT_DMONITOROUT (PIPE_DMONITOROUT[(15*i)+14:(15*i)]) + ); + +//#SE, mod +//- + always @(posedge clk_rxusrclk) + begin + if (PIPE_TXDETECTRX && gt_phystatus[i] && (gt_rxstatus[(3*i)+2:(3*i)] == 3'h3)) + gt_rxrcvrdet_c[i] <= 1'b1; + else + if (PIPE_TXDETECTRX && gt_phystatus[i] && (gt_rxstatus[(3*i)+2:(3*i)] != 3'h3)) + gt_rxrcvrdet_c[i] <= 1'b0; + end + + initial + gt_rxrcvrdet_c[i] = 1'b0; + + //assign gt_rxelecidle[i] = (gt_rxrcvrdet_c) ? gt_rxelecidle_i[i] : 1'b1; + assign gt_rxelecidle[i] = gt_rxelecidle_i[i]; +//- + + //---------- GT Wrapper Assignments ---------------------------------------- + assign oobclk[i] = (PCIE_OOBCLK_MODE == 1) ? user_oobclk[i] : clk_oobclk; + + //---------- Channel Bonding Master Slave Enable --------------------------- + if (PCIE_CHAN_BOND_EN == "FALSE") + begin : channel_bonding_ms_disable + assign rxchbonden[i] = 1'd0; + assign rxchbondmaster[i] = 1'd0; + assign rxchbondslave[i] = 1'd0; + end + else + begin : channel_bonding_ms_enable + assign rxchbonden[i] = (PCIE_LANE > 1) && (PCIE_CHAN_BOND_EN == "TRUE") ? !rate_gen3[i] : 1'd0; + assign rxchbondmaster[i] = rate_gen3[i] ? 1'd0 : (i == 0); + assign rxchbondslave[i] = rate_gen3[i] ? 1'd0 : (i > 0); + end + + //---------- Channel Bonding Input Connection ------------------------------ + if (PCIE_CHAN_BOND_EN == "FALSE") + begin : channel_bonding_in_disable + assign gt_rxchbondi[i] = 5'd0; + assign gt_rxchbondlevel[(3*i)+2:(3*i)] = 3'd0; + end + else + begin : channel_bonding_in_enable + + //---------- Channel Bonding (2: Binary-Tree) -------------------------- + if (PCIE_CHAN_BOND == 2) + + begin : channel_bonding_a + + case (i) + + //---------- Lane 0 -------------------------------- + 0 : + begin + assign gt_rxchbondi[0] = gt_rxchbondo[0]; + assign gt_rxchbondlevel[2:0] = (PCIE_LANE == 4'd8) ? 3'd4 : + (PCIE_LANE > 4'd5) ? 3'd3 : + (PCIE_LANE > 4'd3) ? 3'd2 : + (PCIE_LANE > 4'd1) ? 3'd1 : 3'd0; + end + //---------- Lane 1 -------------------------------- + 1 : + begin + assign gt_rxchbondi[1] = gt_rxchbondo[1]; + assign gt_rxchbondlevel[5:3] = (PCIE_LANE == 4'd8) ? 3'd3 : + (PCIE_LANE > 4'd5) ? 3'd2 : + (PCIE_LANE > 4'd3) ? 3'd1 : 3'd0; + end + //---------- Lane 2 -------------------------------- + 2 : + begin + assign gt_rxchbondi[2] = gt_rxchbondo[1]; + assign gt_rxchbondlevel[8:6] = (PCIE_LANE == 4'd8) ? 3'd3 : + (PCIE_LANE > 4'd5) ? 3'd2 : + (PCIE_LANE > 4'd3) ? 3'd1 : 3'd0; + end + //---------- Lane 3 -------------------------------- + 3 : + begin + assign gt_rxchbondi[3] = gt_rxchbondo[3]; + assign gt_rxchbondlevel[11:9] = (PCIE_LANE == 4'd8) ? 3'd2 : + (PCIE_LANE > 4'd5) ? 3'd1 : 3'd0; + end + //---------- Lane 4 -------------------------------- + 4 : + begin + assign gt_rxchbondi[4] = gt_rxchbondo[3]; + assign gt_rxchbondlevel[14:12] = (PCIE_LANE == 4'd8) ? 3'd2 : + (PCIE_LANE > 4'd5) ? 3'd1 : 3'd0; + end + //---------- Lane 5 -------------------------------- + 5 : + begin + assign gt_rxchbondi[5] = gt_rxchbondo[5]; + assign gt_rxchbondlevel[17:15] = (PCIE_LANE == 4'd8) ? 3'd1 : 3'd0; + end + //---------- Lane 6 -------------------------------- + 6 : + begin + assign gt_rxchbondi[6] = gt_rxchbondo[5]; + assign gt_rxchbondlevel[20:18] = (PCIE_LANE == 4'd8) ? 3'd1 : 3'd0; + end + //---------- Lane 7 -------------------------------- + 7 : + begin + assign gt_rxchbondi[7] = gt_rxchbondo[7]; + assign gt_rxchbondlevel[23:21] = 3'd0; + end + //---------- Default ------------------------------- + default : + begin + assign gt_rxchbondi[i] = gt_rxchbondo[7]; + assign gt_rxchbondlevel[(3*i)+2:(3*i)] = 3'd0; + end + + endcase + + end + + //---------- Channel Bonding (0: One-Hop, 1: Daisy Chain) -------------- + else + + begin : channel_bonding_b + assign gt_rxchbondi[i] = (PCIE_CHAN_BOND == 1) ? gt_rxchbondo[i] : ((i == 0) ? gt_rxchbondo[0] : gt_rxchbondo[1]); + assign gt_rxchbondlevel[(3*i)+2:(3*i)] = (PCIE_CHAN_BOND == 1) ? (PCIE_LANE-1)-i : ((PCIE_LANE > 1) && (i == 0)); + end + + end + + end + +endgenerate + + + +//---------- PIPE Wrapper Output ----------------------------------------------- +assign PIPE_TXEQ_FS = 0;//TXEQ_FS; +assign PIPE_TXEQ_LF = 0;//TXEQ_LF; +assign PIPE_RXELECIDLE = gt_rxelecidle; +assign PIPE_RXSTATUS = gt_rxstatus; + +assign PIPE_RXDISPERR = gt_rxdisperr; +assign PIPE_RXNOTINTABLE = gt_rxnotintable; +assign PIPE_RXPMARESETDONE = gt_rxpmaresetdone; +assign PIPE_RXBUFSTATUS = gt_rxbufstatus; +assign PIPE_TXPHALIGNDONE = gt_txphaligndone; +assign PIPE_TXPHINITDONE = gt_txphinitdone; +assign PIPE_TXDLYSRESETDONE = gt_txdlysresetdone; +assign PIPE_RXPHALIGNDONE = gt_rxphaligndone; +assign PIPE_RXDLYSRESETDONE = gt_rxdlysresetdone; +assign PIPE_RXSYNCDONE = gt_rxsyncdone; +assign PIPE_RXCOMMADET = gt_rxcommadet; +assign PIPE_QPLL_LOCK = qpll_qplllock; +assign PIPE_CPLL_LOCK = gt_cplllock; + +assign PIPE_PCLK = clk_pclk; +assign PIPE_PCLK_LOCK = clk_mmcm_lock; +assign PIPE_RXCDRLOCK = 0;//user_rxcdrlock; +assign PIPE_RXUSRCLK = 0;//clk_rxusrclk; +assign PIPE_RXOUTCLK = 0;//clk_rxoutclk; +assign PIPE_TXSYNC_DONE = 0;//sync_txsync_done; +assign PIPE_RXSYNC_DONE = 0;//sync_rxsync_done; +assign PIPE_ACTIVE_LANE = 0;//user_active_lane; + +assign PIPE_TXOUTCLK_OUT = gt_txoutclk[0]; +assign PIPE_RXOUTCLK_OUT = gt_rxoutclk; +assign PIPE_PCLK_SEL_OUT = rate_pclk_sel; +assign PIPE_GEN3_OUT = rate_gen3[0]; + +assign PIPE_RXEQ_CONVERGE = user_rx_converge; +assign PIPE_RXEQ_ADAPT_DONE = (PCIE_GT_DEVICE == "GTP") ? {PCIE_LANE{1'd0}} : eq_rxeq_adapt_done; + +assign PIPE_EYESCANDATAERROR = gt_eyescandataerror; +assign PIPE_RST_FSM = rst_fsm; +assign PIPE_QRST_FSM = qrst_fsm; +assign PIPE_RATE_FSM = rate_fsm; +assign PIPE_SYNC_FSM_TX = sync_fsm_tx; +assign PIPE_SYNC_FSM_RX = sync_fsm_rx; +assign PIPE_DRP_FSM = drp_fsm; +assign PIPE_QDRP_FSM = 0;//qdrp_fsm; + +assign PIPE_RST_IDLE = &rst_idle; +assign PIPE_QRST_IDLE = &qrst_idle; +assign PIPE_RATE_IDLE = &rate_idle; + +assign EXT_CH_GT_DRPDO = gt_do[(PCIE_LANE*16)-1:0]; +assign EXT_CH_GT_DRPRDY = gt_rdy[(PCIE_LANE-1):0]; +assign EXT_CH_GT_DRPCLK = clk_dclk; + +assign PIPE_DEBUG_0 = (PCIE_DEBUG_MODE == 1) ? gt_txresetdone : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_1 = (PCIE_DEBUG_MODE == 1) ? gt_rxresetdone : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_2 = (PCIE_DEBUG_MODE == 1) ? gt_phystatus : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_3 = (PCIE_DEBUG_MODE == 1) ? gt_rxvalid : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_4 = (PCIE_DEBUG_MODE == 1) ? clk_dclk : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_5 = (PCIE_DEBUG_MODE == 1) ? drp_mux_en : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_6 = (PCIE_DEBUG_MODE == 1) ? drp_mux_we : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_7 = (PCIE_DEBUG_MODE == 1) ? gt_rdy : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_8 = (PCIE_DEBUG_MODE == 1) ? user_rx_converge : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_9 = (PCIE_DEBUG_MODE == 1) ? PIPE_TXELECIDLE : {PCIE_LANE{1'b0}}; + +assign PIPE_DEBUG[ 1:0] = (PCIE_DEBUG_MODE == 1) ? PIPE_TXEQ_CONTROL[1:0] : 2'd0; +assign PIPE_DEBUG[ 5:2] = (PCIE_DEBUG_MODE == 1) ? PIPE_TXEQ_PRESET[3:0] : 4'd0; +assign PIPE_DEBUG[31:6] = 26'd0; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_qpll_drp.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_qpll_drp.v new file mode 100644 index 0000000000000000000000000000000000000000..c5bc9c909d451b58d4a10b6900bf354363ee755f --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_qpll_drp.v @@ -0,0 +1,550 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_qpll_drp.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : qpll_drp.v +// Description : QPLL DRP Module for 7 Series Transceiver +// Version : 18.2 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- QPLL DRP Module --------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_qpll_drp # +( + + parameter PCIE_GT_DEVICE = "GTX", // PCIe GT device + parameter PCIE_USE_MODE = "3.0", // PCIe use mode + parameter PCIE_PLL_SEL = "CPLL", // PCIe PLL select for Gen1/Gen2 only + parameter PCIE_REFCLK_FREQ = 0, // PCIe reference clock frequency + parameter LOAD_CNT_MAX = 2'd3, // Load max count + parameter INDEX_MAX = 3'd6 // Index max count + +) + +( + + //---------- Input ------------------------------------- + input DRP_CLK, + input DRP_RST_N, + input DRP_OVRD, + input DRP_GEN3, + input DRP_QPLLLOCK, + input DRP_START, + input [15:0] DRP_DO, + input DRP_RDY, + + //---------- Output ------------------------------------ + output [ 7:0] DRP_ADDR, + output DRP_EN, + output [15:0] DRP_DI, + output DRP_WE, + output DRP_DONE, + output DRP_QPLLRESET, + output [ 5:0] DRP_CRSCODE, + output [ 8:0] DRP_FSM + +); + + //---------- Input Registers --------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg ovrd_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg gen3_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg qplllock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg start_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [15:0] do_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rdy_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg ovrd_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg gen3_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg qplllock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg start_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [15:0] do_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rdy_reg2; + + //---------- Internal Signals -------------------------- + reg [ 1:0] load_cnt = 2'd0; + reg [ 2:0] index = 3'd0; + reg mode = 1'd0; + reg [ 5:0] crscode = 6'd0; + + //---------- Output Registers -------------------------- + reg [ 7:0] addr = 8'd0; + reg [15:0] di = 16'd0; + reg done = 1'd0; + reg [ 8:0] fsm = 7'd1; + + //---------- DRP Address ------------------------------- + localparam ADDR_QPLL_FBDIV = 8'h36; + localparam ADDR_QPLL_CFG = 8'h32; + localparam ADDR_QPLL_LPF = 8'h31; + localparam ADDR_CRSCODE = 8'h88; + localparam ADDR_QPLL_COARSE_FREQ_OVRD = 8'h35; + localparam ADDR_QPLL_COARSE_FREQ_OVRD_EN = 8'h36; + localparam ADDR_QPLL_LOCK_CFG = 8'h34; + + //---------- DRP Mask ---------------------------------- + localparam MASK_QPLL_FBDIV = 16'b1111110000000000; // Unmask bit [ 9: 0] + localparam MASK_QPLL_CFG = 16'b1111111110111111; // Unmask bit [ 6] + localparam MASK_QPLL_LPF = 16'b1000011111111111; // Unmask bit [14:11] + localparam MASK_QPLL_COARSE_FREQ_OVRD = 16'b0000001111111111; // Unmask bit [15:10] + localparam MASK_QPLL_COARSE_FREQ_OVRD_EN = 16'b1111011111111111; // Unmask bit [ 11] + localparam MASK_QPLL_LOCK_CFG = 16'b1110011111111111; // Unmask bit [12:11] + + //---------- DRP Data for Normal QPLLLOCK Mode --------- + localparam NORM_QPLL_COARSE_FREQ_OVRD = 16'b0000000000000000; // Coarse freq value + localparam NORM_QPLL_COARSE_FREQ_OVRD_EN = 16'b0000000000000000; // Normal QPLL lock + localparam NORM_QPLL_LOCK_CFG = 16'b0000000000000000; // Normal QPLL lock config + + //---------- DRP Data for Optimize QPLLLOCK Mode ------- + localparam OVRD_QPLL_COARSE_FREQ_OVRD = 16'b0000000000000000; // Coarse freq value + localparam OVRD_QPLL_COARSE_FREQ_OVRD_EN = 16'b0000100000000000; // Override QPLL lock + localparam OVRD_QPLL_LOCK_CFG = 16'b0000000000000000; // Override QPLL lock config + + //---------- Select QPLL Feedback Divider -------------- + // N = 100 for 100 MHz ref clk and 10Gb/s line rate + // N = 80 for 125 MHz ref clk and 10Gb/s line rate + // N = 40 for 250 MHz ref clk and 10Gb/s line rate + //------------------------------------------------------ + // N = 80 for 100 MHz ref clk and 8Gb/s line rate + // N = 64 for 125 MHz ref clk and 8Gb/s line rate + // N = 32 for 250 MHz ref clk and 8Gb/s line rate + //------------------------------------------------------ + localparam QPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) && (PCIE_PLL_SEL == "QPLL") ? 16'b0000000010000000 : + (PCIE_REFCLK_FREQ == 1) && (PCIE_PLL_SEL == "QPLL") ? 16'b0000000100100000 : + (PCIE_REFCLK_FREQ == 0) && (PCIE_PLL_SEL == "QPLL") ? 16'b0000000101110000 : + (PCIE_REFCLK_FREQ == 2) && (PCIE_PLL_SEL == "CPLL") ? 16'b0000000001100000 : + (PCIE_REFCLK_FREQ == 1) && (PCIE_PLL_SEL == "CPLL") ? 16'b0000000011100000 : 16'b0000000100100000; + + localparam GEN12_QPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) ? 16'b0000000010000000 : + (PCIE_REFCLK_FREQ == 1) ? 16'b0000000100100000 : 16'b0000000101110000; + + localparam GEN3_QPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) ? 16'b0000000001100000 : + (PCIE_REFCLK_FREQ == 1) ? 16'b0000000011100000 : 16'b0000000100100000; + + //---------- Select QPLL Configuration --------------------------- + // QPLL_CFG[6] = 0 for upper band + // = 1 for lower band + //---------------------------------------------------------------- + localparam GEN12_QPLL_CFG = (PCIE_PLL_SEL == "QPLL") ? 16'b0000000000000000 : 16'b0000000001000000; + localparam GEN3_QPLL_CFG = 16'b0000000001000000; + + //---------- Select QPLL LPF ------------------------------------- + localparam GEN12_QPLL_LPF = (PCIE_PLL_SEL == "QPLL") ? 16'b0_0100_00000000000 : 16'b0_1101_00000000000; + localparam GEN3_QPLL_LPF = 16'b0_1101_00000000000; + + + + //---------- DRP Data ---------------------------------- + wire [15:0] data_qpll_fbdiv; + wire [15:0] data_qpll_cfg; + wire [15:0] data_qpll_lpf; + wire [15:0] data_qpll_coarse_freq_ovrd; + wire [15:0] data_qpll_coarse_freq_ovrd_en; + wire [15:0] data_qpll_lock_cfg; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 9'b000000001; + localparam FSM_LOAD = 9'b000000010; + localparam FSM_READ = 9'b000000100; + localparam FSM_RRDY = 9'b000001000; + localparam FSM_WRITE = 9'b000010000; + localparam FSM_WRDY = 9'b000100000; + localparam FSM_DONE = 9'b001000000; + localparam FSM_QPLLRESET = 9'b010000000; + localparam FSM_QPLLLOCK = 9'b100000000; + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + //---------- 1st Stage FF -------------------------- + ovrd_reg1 <= 1'd0; + gen3_reg1 <= 1'd0; + qplllock_reg1 <= 1'd0; + start_reg1 <= 1'd0; + do_reg1 <= 16'd0; + rdy_reg1 <= 1'd0; + //---------- 2nd Stage FF -------------------------- + ovrd_reg2 <= 1'd0; + gen3_reg2 <= 1'd0; + qplllock_reg2 <= 1'd0; + start_reg2 <= 1'd0; + do_reg2 <= 16'd0; + rdy_reg2 <= 1'd0; + end + + else + begin + //---------- 1st Stage FF -------------------------- + ovrd_reg1 <= DRP_OVRD; + gen3_reg1 <= DRP_GEN3; + qplllock_reg1 <= DRP_QPLLLOCK; + start_reg1 <= DRP_START; + do_reg1 <= DRP_DO; + rdy_reg1 <= DRP_RDY; + //---------- 2nd Stage FF -------------------------- + ovrd_reg2 <= ovrd_reg1; + gen3_reg2 <= gen3_reg1; + qplllock_reg2 <= qplllock_reg1; + start_reg2 <= start_reg1; + do_reg2 <= do_reg1; + rdy_reg2 <= rdy_reg1; + end + +end + + + +//---------- Select DRP Data --------------------------------------------------- +assign data_qpll_fbdiv = (gen3_reg2) ? GEN3_QPLL_FBDIV : GEN12_QPLL_FBDIV; +assign data_qpll_cfg = (gen3_reg2) ? GEN3_QPLL_CFG : GEN12_QPLL_CFG; +assign data_qpll_lpf = (gen3_reg2) ? GEN3_QPLL_LPF : GEN12_QPLL_LPF; +assign data_qpll_coarse_freq_ovrd = NORM_QPLL_COARSE_FREQ_OVRD; +assign data_qpll_coarse_freq_ovrd_en = (ovrd_reg2) ? OVRD_QPLL_COARSE_FREQ_OVRD_EN : NORM_QPLL_COARSE_FREQ_OVRD_EN; +assign data_qpll_lock_cfg = (ovrd_reg2) ? OVRD_QPLL_LOCK_CFG : NORM_QPLL_LOCK_CFG; + + +//---------- Load Counter ------------------------------------------------------ +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + load_cnt <= 2'd0; + else + + //---------- Increment Load Counter ---------------- + if ((fsm == FSM_LOAD) && (load_cnt < LOAD_CNT_MAX)) + load_cnt <= load_cnt + 2'd1; + + //---------- Hold Load Counter --------------------- + else if ((fsm == FSM_LOAD) && (load_cnt == LOAD_CNT_MAX)) + load_cnt <= load_cnt; + + //---------- Reset Load Counter -------------------- + else + load_cnt <= 2'd0; + +end + + + +//---------- Update DRP Address and Data --------------------------------------- +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + addr <= 8'd0; + di <= 16'd0; + crscode <= 6'd0; + end + else + begin + + case (index) + + //-------------------------------------------------- + 3'd0 : + begin + addr <= ADDR_QPLL_FBDIV; + di <= (do_reg2 & MASK_QPLL_FBDIV) | (mode ? data_qpll_fbdiv : QPLL_FBDIV); + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd1 : + begin + addr <= ADDR_QPLL_CFG; + if (PCIE_GT_DEVICE == "GTX") + di <= (do_reg2 & MASK_QPLL_CFG) | data_qpll_cfg; + else + di <= (do_reg2 & 16'hFFFF) | data_qpll_cfg; + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd2 : + begin + addr <= ADDR_QPLL_LPF; + if (PCIE_GT_DEVICE == "GTX") + di <= (do_reg2 & MASK_QPLL_LPF) | data_qpll_lpf; + else + di <= (do_reg2 & 16'hFFFF) | data_qpll_lpf; + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd3 : + begin + addr <= ADDR_CRSCODE; + di <= do_reg2; + + //---------- Latch CRS Code -------------------- + if (ovrd_reg2) + crscode <= do_reg2[6:1]; + else + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd4 : + begin + addr <= ADDR_QPLL_COARSE_FREQ_OVRD; + di <= (do_reg2 & MASK_QPLL_COARSE_FREQ_OVRD) | {(crscode - 6'd1), data_qpll_coarse_freq_ovrd[9:0]}; + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd5 : + begin + addr <= ADDR_QPLL_COARSE_FREQ_OVRD_EN; + di <= (do_reg2 & MASK_QPLL_COARSE_FREQ_OVRD_EN) | data_qpll_coarse_freq_ovrd_en; + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd6 : + begin + addr <= ADDR_QPLL_LOCK_CFG; + di <= (do_reg2 & MASK_QPLL_LOCK_CFG) | data_qpll_lock_cfg; + crscode <= crscode; + end + + //-------------------------------------------------- + default : + begin + addr <= 8'd0; + di <= 16'd0; + crscode <= 6'd0; + end + + endcase + + end + +end + + + +//---------- QPLL DRP FSM ------------------------------------------------------ +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + fsm <= FSM_IDLE; + index <= 3'd0; + mode <= 1'd0; + done <= 1'd0; + end + else + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + if (start_reg2) + begin + fsm <= FSM_LOAD; + index <= 3'd0; + mode <= 1'd0; + done <= 1'd0; + end + else if ((gen3_reg2 != gen3_reg1) && (PCIE_PLL_SEL == "QPLL")) + begin + fsm <= FSM_LOAD; + index <= 3'd0; + mode <= 1'd1; + done <= 1'd0; + end + else + begin + fsm <= FSM_IDLE; + index <= 3'd0; + mode <= 1'd0; + done <= 1'd1; + end + end + + //---------- Load DRP Address --------------------- + FSM_LOAD : + + begin + fsm <= (load_cnt == LOAD_CNT_MAX) ? FSM_READ : FSM_LOAD; + index <= index; + mode <= mode; + done <= 1'd0; + end + + //---------- Read DRP ------------------------------ + FSM_READ : + + begin + fsm <= FSM_RRDY; + index <= index; + mode <= mode; + done <= 1'd0; + end + + //---------- Read DRP Ready ------------------------ + FSM_RRDY : + + begin + fsm <= (rdy_reg2 ? FSM_WRITE : FSM_RRDY); + index <= index; + mode <= mode; + done <= 1'd0; + end + + //---------- Write DRP ----------------------------- + FSM_WRITE : + + begin + fsm <= FSM_WRDY; + index <= index; + mode <= mode; + done <= 1'd0; + end + + //---------- Write DRP Ready ----------------------- + FSM_WRDY : + + begin + fsm <= (rdy_reg2 ? FSM_DONE : FSM_WRDY); + index <= index; + mode <= mode; + done <= 1'd0; + end + + //---------- DRP Done ------------------------------ + FSM_DONE : + + begin + if ((index == INDEX_MAX) || (mode && (index == 3'd2))) + begin + fsm <= mode ? FSM_QPLLRESET : FSM_IDLE; + index <= 3'd0; + mode <= mode; + done <= 1'd0; + end + else + begin + fsm <= FSM_LOAD; + index <= index + 3'd1; + mode <= mode; + done <= 1'd0; + end + end + + //---------- QPLL Reset ---------------------------- + FSM_QPLLRESET : + + begin + fsm <= !qplllock_reg2 ? FSM_QPLLLOCK : FSM_QPLLRESET; + index <= 3'd0; + mode <= mode; + done <= 1'd0; + end + + //---------- QPLL Reset ---------------------------- + FSM_QPLLLOCK : + + begin + fsm <= qplllock_reg2 ? FSM_IDLE : FSM_QPLLLOCK; + index <= 3'd0; + mode <= mode; + done <= 1'd0; + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_IDLE; + index <= 3'd0; + mode <= 1'd0; + done <= 1'd0; + end + + endcase + + end + +end + + + +//---------- QPLL DRP Output --------------------------------------------------- +assign DRP_ADDR = addr; +assign DRP_EN = (fsm == FSM_READ) || (fsm == FSM_WRITE); +assign DRP_DI = di; +assign DRP_WE = (fsm == FSM_WRITE); // || (fsm == FSM_WRDY); +assign DRP_DONE = done; +assign DRP_QPLLRESET = (fsm == FSM_QPLLRESET); +assign DRP_CRSCODE = crscode; +assign DRP_FSM = fsm; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_qpll_reset.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_qpll_reset.v new file mode 100644 index 0000000000000000000000000000000000000000..329f95319de106fed00db21ee480d2c5cf8de803 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_qpll_reset.v @@ -0,0 +1,370 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_qpll_reset.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : qpll_reset.v +// Description : QPLL Reset Module for 7 Series Transceiver +// Version : 11.4 +//------------------------------------------------------------------------------ + + +`timescale 1ns / 1ps + + + +//---------- QPLL Reset Module -------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_qpll_reset # +( + + //---------- Global ------------------------------------ + parameter PCIE_PLL_SEL = "CPLL", // PCIe PLL select for Gen1/Gen2 only + parameter PCIE_POWER_SAVING = "TRUE", // PCIe power saving + parameter PCIE_LANE = 1, // PCIe number of lanes + parameter BYPASS_COARSE_OVRD = 1 // Bypass coarse frequency override + +) + +( + + //---------- Input ------------------------------------- + input QRST_CLK, + input QRST_RST_N, + input QRST_MMCM_LOCK, + input [PCIE_LANE-1:0] QRST_CPLLLOCK, + input [(PCIE_LANE-1)>>2:0]QRST_DRP_DONE, + input [(PCIE_LANE-1)>>2:0]QRST_QPLLLOCK, + input [ 1:0] QRST_RATE, + input [PCIE_LANE-1:0] QRST_QPLLRESET_IN, + input [PCIE_LANE-1:0] QRST_QPLLPD_IN, + + //---------- Output ------------------------------------ + output QRST_OVRD, + output QRST_DRP_START, + output QRST_QPLLRESET_OUT, + output QRST_QPLLPD_OUT, + output QRST_IDLE, + output [3:0] QRST_FSM + +); + + //---------- Input Register ---------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg mmcm_lock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] cplllock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [(PCIE_LANE-1)>>2:0]drp_done_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [(PCIE_LANE-1)>>2:0]qplllock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 1:0] rate_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] qpllreset_in_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] qpllpd_in_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg mmcm_lock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] cplllock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [(PCIE_LANE-1)>>2:0]drp_done_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [(PCIE_LANE-1)>>2:0]qplllock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 1:0] rate_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] qpllreset_in_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] qpllpd_in_reg2; + + //---------- Output Register -------------------------- + reg ovrd = 1'd0; + reg qpllreset = 1'd1; + reg qpllpd = 1'd0; + reg [3:0] fsm = 2; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 1;//12'b000000000001; + localparam FSM_WAIT_LOCK = 2;//12'b000000000010; + localparam FSM_MMCM_LOCK = 3;//12'b000000000100; + localparam FSM_DRP_START_NOM = 4;//12'b000000001000; + localparam FSM_DRP_DONE_NOM = 5;//12'b000000010000; + localparam FSM_QPLLLOCK = 6;//12'b000000100000; + localparam FSM_DRP_START_OPT = 7;//12'b000001000000; + localparam FSM_DRP_DONE_OPT = 8;//12'b000010000000; + localparam FSM_QPLL_RESET = 9;//12'b000100000000; + localparam FSM_QPLLLOCK2 = 10;//12'b001000000000; + localparam FSM_QPLL_PDRESET = 11;//12'b010000000000; + localparam FSM_QPLL_PD = 12;//12'b100000000000; + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge QRST_CLK) +begin + + if (!QRST_RST_N) + begin + //---------- 1st Stage FF -------------------------- + mmcm_lock_reg1 <= 1'd0; + cplllock_reg1 <= {PCIE_LANE{1'd1}}; + drp_done_reg1 <= {(((PCIE_LANE-1)>>2)+1){1'd0}}; + qplllock_reg1 <= {(((PCIE_LANE-1)>>2)+1){1'd0}}; + rate_reg1 <= 2'd0; + qpllreset_in_reg1 <= {PCIE_LANE{1'd1}}; + qpllpd_in_reg1 <= {PCIE_LANE{1'd0}}; + //---------- 2nd Stage FF -------------------------- + mmcm_lock_reg2 <= 1'd0; + cplllock_reg2 <= {PCIE_LANE{1'd1}}; + drp_done_reg2 <= {(((PCIE_LANE-1)>>2)+1){1'd0}}; + qplllock_reg2 <= {(((PCIE_LANE-1)>>2)+1){1'd0}}; + rate_reg2 <= 2'd0; + qpllreset_in_reg2 <= {PCIE_LANE{1'd1}}; + qpllpd_in_reg2 <= {PCIE_LANE{1'd0}}; + end + else + begin + //---------- 1st Stage FF -------------------------- + mmcm_lock_reg1 <= QRST_MMCM_LOCK; + cplllock_reg1 <= QRST_CPLLLOCK; + drp_done_reg1 <= QRST_DRP_DONE; + qplllock_reg1 <= QRST_QPLLLOCK; + rate_reg1 <= QRST_RATE; + qpllreset_in_reg1 <= QRST_QPLLRESET_IN; + qpllpd_in_reg1 <= QRST_QPLLPD_IN; + //---------- 2nd Stage FF -------------------------- + mmcm_lock_reg2 <= mmcm_lock_reg1; + cplllock_reg2 <= cplllock_reg1; + drp_done_reg2 <= drp_done_reg1; + qplllock_reg2 <= qplllock_reg1; + rate_reg2 <= rate_reg1; + qpllreset_in_reg2 <= qpllreset_in_reg1; + qpllpd_in_reg2 <= qpllpd_in_reg1; + end + +end + + + +//---------- QPLL Reset FSM ---------------------------------------------------- +always @ (posedge QRST_CLK) +begin + + if (!QRST_RST_N) + begin + fsm <= FSM_WAIT_LOCK; + ovrd <= 1'd0; + qpllreset <= 1'd1; + qpllpd <= 1'd0; + end + else + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + if (!QRST_RST_N) + begin + fsm <= FSM_WAIT_LOCK; + ovrd <= 1'd0; + qpllreset <= 1'd1; + qpllpd <= 1'd0; + end + else + begin + fsm <= FSM_IDLE; + ovrd <= ovrd; + qpllreset <= &qpllreset_in_reg2; + qpllpd <= &qpllpd_in_reg2; + end + end + + //---------- Wait for CPLL and QPLL to Lose Lock --- + FSM_WAIT_LOCK : + + begin + fsm <= ((&(~cplllock_reg2)) && (&(~qplllock_reg2)) ? FSM_MMCM_LOCK : FSM_WAIT_LOCK); + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + + //---------- Wait for MMCM and CPLL Lock ----------- + FSM_MMCM_LOCK : + + begin + fsm <= ((mmcm_lock_reg2 && (&cplllock_reg2)) ? FSM_DRP_START_NOM : FSM_MMCM_LOCK); + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + + //---------- Start QPLL DRP for Normal QPLL Lock Mode + FSM_DRP_START_NOM: + + begin + fsm <= (&(~drp_done_reg2) ? FSM_DRP_DONE_NOM : FSM_DRP_START_NOM); + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + + //---------- Wait for QPLL DRP Done ---------------- + FSM_DRP_DONE_NOM : + + begin + fsm <= (&drp_done_reg2 ? FSM_QPLLLOCK : FSM_DRP_DONE_NOM); + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + + //---------- Wait for QPLL Lock -------------------- + FSM_QPLLLOCK : + + begin + fsm <= (&qplllock_reg2 ? ((BYPASS_COARSE_OVRD == 1) ? FSM_QPLL_PDRESET : FSM_DRP_START_OPT) : FSM_QPLLLOCK); + ovrd <= ovrd; + qpllreset <= 1'd0; + qpllpd <= qpllpd; + end + + //---------- Start QPLL DRP for Optimized QPLL Lock Mode + FSM_DRP_START_OPT: + + begin + fsm <= (&(~drp_done_reg2) ? FSM_DRP_DONE_OPT : FSM_DRP_START_OPT); + ovrd <= 1'd1; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + + //---------- Wait for QPLL DRP Done ---------------- + FSM_DRP_DONE_OPT : + + begin + if (&drp_done_reg2) + begin + fsm <= ((PCIE_PLL_SEL == "QPLL") ? FSM_QPLL_RESET : FSM_QPLL_PDRESET); + ovrd <= ovrd; + qpllreset <= (PCIE_PLL_SEL == "QPLL"); + qpllpd <= qpllpd; + end + else + begin + fsm <= FSM_DRP_DONE_OPT; + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + end + + //---------- Reset QPLL ---------------------------- + FSM_QPLL_RESET : + + begin + fsm <= (&(~qplllock_reg2) ? FSM_QPLLLOCK2 : FSM_QPLL_RESET); + ovrd <= ovrd; + qpllreset <= 1'd1; + qpllpd <= 1'd0; + end + + //---------- Wait for QPLL Lock -------------------- + FSM_QPLLLOCK2 : + + begin + fsm <= (&qplllock_reg2 ? FSM_IDLE : FSM_QPLLLOCK2); + ovrd <= ovrd; + qpllreset <= 1'd0; + qpllpd <= 1'd0; + end + + //---------- Hold QPLL in Reset -------------------- + FSM_QPLL_PDRESET : + + begin + fsm <= FSM_QPLL_PD; + ovrd <= ovrd; + qpllreset <= (PCIE_PLL_SEL == "CPLL") ? (rate_reg2 != 2'd2) : 1'd0; + qpllpd <= qpllpd; + end + + //---------- Power-down QPLL ----------------------- + FSM_QPLL_PD : + + begin + fsm <= FSM_IDLE; + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= (PCIE_PLL_SEL == "CPLL") ? (rate_reg2 != 2'd2) : 1'd0; + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_WAIT_LOCK; + ovrd <= 1'd0; + qpllreset <= 1'd0; + qpllpd <= 1'd0; + end + + endcase + + end + +end + + + +//---------- QPLL Lock Output -------------------------------------------------- +assign QRST_OVRD = ovrd; +assign QRST_DRP_START = (fsm == FSM_DRP_START_NOM) || (fsm == FSM_DRP_START_OPT); +assign QRST_QPLLRESET_OUT = qpllreset; +assign QRST_QPLLPD_OUT = ((PCIE_POWER_SAVING == "FALSE") ? 1'd0 : qpllpd); +assign QRST_IDLE = (fsm == FSM_IDLE); +assign QRST_FSM = fsm; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_qpll_wrapper.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_qpll_wrapper.v new file mode 100644 index 0000000000000000000000000000000000000000..ef5649d9fd76c97225732b61c36375afe96cc0bc --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_qpll_wrapper.v @@ -0,0 +1,439 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_qpll_wrapper.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : qpll_wrapper.v +// Description : QPLL Wrapper Module for 7 Series Transceiver +// Version : 18.1 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- QPLL Wrapper ---------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_qpll_wrapper # +( + + parameter PCIE_SIM_MODE = "FALSE", // PCIe sim mode + parameter PCIE_GT_DEVICE = "GTX", // PCIe GT device + parameter PCIE_USE_MODE = "3.0", // PCIe use mode + parameter PCIE_PLL_SEL = "CPLL", // PCIe PLL select for Gen1/Gen2 only + parameter PCIE_REFCLK_FREQ = 0 // PCIe reference clock frequency + +) + +( + + //---------- QPLL Clock Ports -------------------------- + input QPLL_CPLLPDREFCLK, + input QPLL_GTGREFCLK, + input QPLL_QPLLLOCKDETCLK, + + output QPLL_QPLLOUTCLK, + output QPLL_QPLLOUTREFCLK, + output QPLL_QPLLLOCK, + + //---------- QPLL Reset Ports -------------------------- + input QPLL_QPLLPD, + input QPLL_QPLLRESET, + + //---------- QPLL DRP Ports ---------------------------- + input QPLL_DRPCLK, + input [ 7:0] QPLL_DRPADDR, + input QPLL_DRPEN, + input [15:0] QPLL_DRPDI, + input QPLL_DRPWE, + + output [15:0] QPLL_DRPDO, + output QPLL_DRPRDY + +); + + + + //---------- Select QPLL Feedback Divider -------------- + // N = 100 for 100 MHz ref clk and 10Gb/s line rate + // N = 80 for 125 MHz ref clk and 10Gb/s line rate + // N = 40 for 250 MHz ref clk and 10Gb/s line rate + //------------------------------------------------------ + // N = 80 for 100 MHz ref clk and 8Gb/s line rate + // N = 64 for 125 MHz ref clk and 8Gb/s line rate + // N = 32 for 250 MHz ref clk and 8Gb/s line rate + //------------------------------------------------------ + localparam QPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) && (PCIE_PLL_SEL == "QPLL") ? 10'b0010000000 : + (PCIE_REFCLK_FREQ == 1) && (PCIE_PLL_SEL == "QPLL") ? 10'b0100100000 : + (PCIE_REFCLK_FREQ == 0) && (PCIE_PLL_SEL == "QPLL") ? 10'b0101110000 : + (PCIE_REFCLK_FREQ == 2) && (PCIE_PLL_SEL == "CPLL") ? 10'b0001100000 : + (PCIE_REFCLK_FREQ == 1) && (PCIE_PLL_SEL == "CPLL") ? 10'b0011100000 : 10'b0100100000; + + //---------- Select GTP QPLL Feedback Divider ---------- + localparam GTP_QPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) ? 3'd2 : + (PCIE_REFCLK_FREQ == 1) ? 3'd4 : 3'd5; + + //---------- Select BIAS_CFG --------------------------- + localparam BIAS_CFG = ((PCIE_USE_MODE == "1.0") && (PCIE_PLL_SEL == "CPLL")) ? 64'h0000042000001000 : 64'h0000040000001000; + + + wire cpllpd; + wire cpllrst; + +//---------- Select GTX or GTH or GTP ------------------------------------------ +// Notes : Attributes that are commented out uses the GT default settings +//------------------------------------------------------------------------------ +generate if (PCIE_GT_DEVICE == "GTP") + + //---------- GTP Common ---------------------------------------------------- + begin : gtp_common + + //---------- GTP Common Module --------------------------------------------- + GTPE2_COMMON # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_PLL0REFCLK_SEL (3'b001), // + .SIM_PLL1REFCLK_SEL (3'b001), // + .SIM_RESET_SPEEDUP (PCIE_SIM_MODE), // + .SIM_VERSION (PCIE_USE_MODE), // + + //---------- Clock Attributes ------------------------------------------ + .PLL0_CFG (27'h01F024C), // Optimized for IES + .PLL1_CFG (27'h01F024C), // Optimized for IES + .PLL_CLKOUT_CFG (8'd0), // Optimized for IES + .PLL0_DMON_CFG (1'b0), // Optimized for IES + .PLL1_DMON_CFG (1'b0), // Optimized for IES + .PLL0_FBDIV (GTP_QPLL_FBDIV), // Optimized for IES + .PLL1_FBDIV (GTP_QPLL_FBDIV), // Optimized for IES + .PLL0_FBDIV_45 (5), // Optimized for IES + .PLL1_FBDIV_45 (5), // Optimized for IES + .PLL0_INIT_CFG (24'h00001E), // Optimized for IES + .PLL1_INIT_CFG (24'h00001E), // Optimized for IES + .PLL0_LOCK_CFG ( 9'h1E8), // Optimized for IES + .PLL1_LOCK_CFG ( 9'h1E8), // Optimized for IES + .PLL0_REFCLK_DIV (1), // Optimized for IES + .PLL1_REFCLK_DIV (1), // Optimized for IES + + //---------- MISC ------------------------------------------------------ + .BIAS_CFG (64'h0000000000050001), // Optimized for GES + //.COMMON_CFG (32'd0), // + .RSVD_ATTR0 (16'd0), // + .RSVD_ATTR1 (16'd0) // + + ) + gtpe2_common_i + ( + + //---------- Clock ----------------------------------------------------- + .GTGREFCLK0 ( 1'd0), // + .GTGREFCLK1 ( 1'd0), // + .GTREFCLK0 (QPLL_GTGREFCLK), // + .GTREFCLK1 ( 1'd0), // + .GTEASTREFCLK0 ( 1'd0), // + .GTEASTREFCLK1 ( 1'd0), // + .GTWESTREFCLK0 ( 1'd0), // + .GTWESTREFCLK1 ( 1'd0), // + .PLL0LOCKDETCLK (QPLL_QPLLLOCKDETCLK), // + .PLL1LOCKDETCLK (QPLL_QPLLLOCKDETCLK), // + .PLL0LOCKEN ( 1'd1), // + .PLL1LOCKEN ( 1'd1), // + .PLL0REFCLKSEL ( 3'd1), // Optimized for IES + .PLL1REFCLKSEL ( 3'd1), // Optimized for IES + .PLLRSVD1 (16'd0), // Optimized for IES + .PLLRSVD2 ( 5'd0), // Optimized for IES + + .PLL0OUTCLK (QPLL_QPLLOUTCLK), // + .PLL1OUTCLK (), // + .PLL0OUTREFCLK (QPLL_QPLLOUTREFCLK), // + .PLL1OUTREFCLK (), // + .PLL0LOCK (QPLL_QPLLLOCK), // + .PLL1LOCK (), // + .PLL0FBCLKLOST (), // + .PLL1FBCLKLOST (), // + .PLL0REFCLKLOST (), // + .PLL1REFCLKLOST (), // + .DMONITOROUT (), // + + //---------- Reset ----------------------------------------------------- + .PLL0PD (cpllpd | QPLL_QPLLPD), // + .PLL1PD ( 1'd1), // + .PLL0RESET (cpllrst | QPLL_QPLLRESET), // + .PLL1RESET ( 1'd1), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (QPLL_DRPCLK), // + .DRPADDR (QPLL_DRPADDR), // + .DRPEN (QPLL_DRPEN), // + .DRPDI (QPLL_DRPDI), // + .DRPWE (QPLL_DRPWE), // + + .DRPDO (QPLL_DRPDO), // + .DRPRDY (QPLL_DRPRDY), // + + //---------- Band Gap -------------------------------------------------- + .BGBYPASSB ( 1'd1), // Optimized for IES + .BGMONITORENB ( 1'd1), // Optimized for IES + .BGPDB ( 1'd1), // Optimized for IES + .BGRCALOVRD ( 5'd31), // Optimized for IES + .BGRCALOVRDENB ( 1'd1), // Optimized for IES + + //---------- MISC ------------------------------------------------------ + .PMARSVD ( 8'd0), // + .RCALENB ( 1'd1), // Optimized for IES + + .REFCLKOUTMONITOR0 (), // + .REFCLKOUTMONITOR1 (), // + .PMARSVDOUT () // + + ); + + end + +else if (PCIE_GT_DEVICE == "GTH") + + //---------- GTH Common ---------------------------------------------------- + begin : gth_common + + //---------- GTX Common Module --------------------------------------------- + GTHE2_COMMON # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_QPLLREFCLK_SEL (3'b001), // + .SIM_RESET_SPEEDUP (PCIE_SIM_MODE), // + .SIM_VERSION ("2.0"), // + + //---------- Clock Attributes ------------------------------------------ + .QPLL_CFG (27'h04801C7), // QPLL for Gen3, optimized for GES + .QPLL_CLKOUT_CFG ( 4'b1111), // Optimized for GES + .QPLL_COARSE_FREQ_OVRD ( 6'b010000), // + .QPLL_COARSE_FREQ_OVRD_EN ( 1'd0), // + .QPLL_CP (10'h0FF), // * Optimized for IES and PCIe PLL BW + .QPLL_CP_MONITOR_EN ( 1'd0), // + .QPLL_DMONITOR_SEL ( 1'd0), // + .QPLL_FBDIV (QPLL_FBDIV), // + .QPLL_FBDIV_MONITOR_EN ( 1'd0), // + .QPLL_FBDIV_RATIO ( 1'd1), // Optimized + .QPLL_INIT_CFG (24'h000006), // + .QPLL_LOCK_CFG (16'h05E8), // Optimized for IES + .QPLL_LPF ( 4'hD), // Optimized for IES, [1:0] = 2'b00 (13.3 KOhm), [1:0] = 2'b01 (57.0 KOhm) + .QPLL_REFCLK_DIV ( 1), // + .QPLL_RP_COMP ( 1'd0), // GTH new + .QPLL_VTRL_RESET ( 2'd0), // GTH new + + //---------- MISC ------------------------------------------------------ + .BIAS_CFG (64'h0000040000001050), // Optimized for GES + .COMMON_CFG (32'd0), // + .RCAL_CFG ( 2'b00), // GTH new + .RSVD_ATTR0 (16'd0), // GTH + .RSVD_ATTR1 (16'd0) // GTH + ) + gthe2_common_i + ( + + //---------- Clock ----------------------------------------------------- + .GTGREFCLK ( 1'd0), // + .GTREFCLK0 (QPLL_GTGREFCLK), // + .GTREFCLK1 ( 1'd0), // + .GTNORTHREFCLK0 ( 1'd0), // + .GTNORTHREFCLK1 ( 1'd0), // + .GTSOUTHREFCLK0 ( 1'd0), // + .GTSOUTHREFCLK1 ( 1'd0), // + .QPLLLOCKDETCLK (QPLL_QPLLLOCKDETCLK), // + .QPLLLOCKEN ( 1'd1), // + .QPLLREFCLKSEL ( 3'd1), // + .QPLLRSVD1 (16'd0), // + .QPLLRSVD2 ( 5'b11111), // + + .QPLLOUTCLK (QPLL_QPLLOUTCLK), // + .QPLLOUTREFCLK (QPLL_QPLLOUTREFCLK), // + .QPLLLOCK (QPLL_QPLLLOCK), // + .QPLLFBCLKLOST (), // + .QPLLREFCLKLOST (), // + .QPLLDMONITOR (), // + + //---------- Reset ----------------------------------------------------- + .QPLLPD (QPLL_QPLLPD), // + .QPLLRESET (QPLL_QPLLRESET), // + .QPLLOUTRESET ( 1'd0), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (QPLL_DRPCLK), // + .DRPADDR (QPLL_DRPADDR), // + .DRPEN (QPLL_DRPEN), // + .DRPDI (QPLL_DRPDI), // + .DRPWE (QPLL_DRPWE), // + + .DRPDO (QPLL_DRPDO), // + .DRPRDY (QPLL_DRPRDY), // + + //---------- Band Gap -------------------------------------------------- + .BGBYPASSB ( 1'd1), // Optimized for IES + .BGMONITORENB ( 1'd1), // Optimized for IES + .BGPDB ( 1'd1), // Optimized for IES + .BGRCALOVRD ( 5'd31), // Optimized for IES + .BGRCALOVRDENB ( 1'd1), // GTH, Optimized for IES + + //---------- MISC ------------------------------------------------------ + .PMARSVD ( 8'd0), // + .RCALENB ( 1'd1), // Optimized for IES + + .REFCLKOUTMONITOR (), // + .PMARSVDOUT () // GTH + + ); + + end + +else + + //---------- GTX Common ---------------------------------------------------- + begin : gtx_common + + //---------- GTX Common Module --------------------------------------------- + GTXE2_COMMON # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_QPLLREFCLK_SEL ( 3'b001), // + .SIM_RESET_SPEEDUP (PCIE_SIM_MODE), // + .SIM_VERSION (PCIE_USE_MODE), // + + //---------- Clock Attributes ------------------------------------------ + .QPLL_CFG (27'h06801C1), // QPLL for Gen3, Optimized for silicon, + //.QPLL_CLKOUT_CFG ( 4'd0), // + .QPLL_COARSE_FREQ_OVRD ( 6'b010000), // + .QPLL_COARSE_FREQ_OVRD_EN ( 1'd0), // + .QPLL_CP (10'h01F), // Optimized for Gen3 compliance (Gen1/Gen2 = 10'h1FF) + .QPLL_CP_MONITOR_EN ( 1'd0), // + .QPLL_DMONITOR_SEL ( 1'd0), // + .QPLL_FBDIV (QPLL_FBDIV), // + .QPLL_FBDIV_MONITOR_EN ( 1'd0), // + .QPLL_FBDIV_RATIO ( 1'd1), // Optimized for silicon + //.QPLL_INIT_CFG (24'h000006), // + .QPLL_LOCK_CFG (16'h21E8), // Optimized for silicon, IES = 16'h01D0, GES 16'h21D0 + .QPLL_LPF ( 4'hD), // Optimized for silicon, [1:0] = 2'b00 (13.3 KOhm), [1:0] = 2'b01 (57.0 KOhm) + .QPLL_REFCLK_DIV (1), // + + //---------- MISC ------------------------------------------------------ + .BIAS_CFG (BIAS_CFG) // Optimized for silicon + //.COMMON_CFG (32'd0) // + + ) + gtxe2_common_i + ( + + //---------- Clock ----------------------------------------------------- + .GTGREFCLK ( 1'd0), // + .GTREFCLK0 (QPLL_GTGREFCLK), // + .GTREFCLK1 ( 1'd0), // + .GTNORTHREFCLK0 ( 1'd0), // + .GTNORTHREFCLK1 ( 1'd0), // + .GTSOUTHREFCLK0 ( 1'd0), // + .GTSOUTHREFCLK1 ( 1'd0), // + .QPLLLOCKDETCLK (QPLL_QPLLLOCKDETCLK), // + .QPLLLOCKEN ( 1'd1), // + .QPLLREFCLKSEL ( 3'd1), // + .QPLLRSVD1 (16'd0), // + .QPLLRSVD2 ( 5'b11111), // + + .QPLLOUTCLK (QPLL_QPLLOUTCLK), // + .QPLLOUTREFCLK (QPLL_QPLLOUTREFCLK), // + .QPLLLOCK (QPLL_QPLLLOCK), // + .QPLLFBCLKLOST (), // + .QPLLREFCLKLOST (), // + .QPLLDMONITOR (), // + + //---------- Reset ----------------------------------------------------- + .QPLLPD (QPLL_QPLLPD), // + .QPLLRESET (QPLL_QPLLRESET), // + .QPLLOUTRESET ( 1'd0), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (QPLL_DRPCLK), // + .DRPADDR (QPLL_DRPADDR), // + .DRPEN (QPLL_DRPEN), // + .DRPDI (QPLL_DRPDI), // + .DRPWE (QPLL_DRPWE), // + + .DRPDO (QPLL_DRPDO), // + .DRPRDY (QPLL_DRPRDY), // + + //---------- Band Gap -------------------------------------------------- + .BGBYPASSB ( 1'd1), // + .BGMONITORENB ( 1'd1), // + .BGPDB ( 1'd1), // + .BGRCALOVRD ( 5'd31), // + + //---------- MISC ------------------------------------------------------ + .PMARSVD ( 8'd0), // + .RCALENB ( 1'd1), // Optimized for GES + + .REFCLKOUTMONITOR () // + + ); + + end + +endgenerate + +pcie_7x_0_gtp_cpllpd_ovrd cpllPDInst ( + .i_ibufds_gte2(QPLL_CPLLPDREFCLK), + .o_cpllpd_ovrd(cpllpd), + .o_cpllreset_ovrd(cpllrst)); + + +endmodule + + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_rxeq_scan.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_rxeq_scan.v new file mode 100644 index 0000000000000000000000000000000000000000..bb355a46e89e81f4f64b81086679027e169ecc2b --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/pcie_7x_0_rxeq_scan.v @@ -0,0 +1,366 @@ +//----------------------------------------------------------------------------- +// +// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of Xilinx, Inc. and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// Xilinx, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) Xilinx shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or Xilinx had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// Xilinx products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of Xilinx products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_rxeq_scan.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : rxeq_scan.v +// Description : PIPE RX Equalization Eye Scan Module for 7 Series Transceiver +// Version : 18.0 +//------------------------------------------------------------------------------ + + +`timescale 1ns / 1ps + + + +//---------- RXEQ Eye Scan Module ---------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_rxeq_scan # +( + + parameter PCIE_SIM_MODE = "FALSE", // PCIe sim mode + parameter PCIE_GT_DEVICE = "GTX", // PCIe GT device + parameter PCIE_RXEQ_MODE_GEN3 = 1, // PCIe RX equalization mode + parameter CONVERGE_MAX = 22'd3125000, // Convergence max count (12ms) + parameter CONVERGE_MAX_BYPASS = 22'd2083333 // Convergence max count for phase2/3 bypass mode (8ms) +) + +( + + //---------- Input ------------------------------------- + input RXEQSCAN_CLK, + input RXEQSCAN_RST_N, + + input [ 1:0] RXEQSCAN_CONTROL, + input [ 2:0] RXEQSCAN_PRESET, + input RXEQSCAN_PRESET_VALID, + input [ 3:0] RXEQSCAN_TXPRESET, + input [17:0] RXEQSCAN_TXCOEFF, + input RXEQSCAN_NEW_TXCOEFF_REQ, + input [ 5:0] RXEQSCAN_FS, + input [ 5:0] RXEQSCAN_LF, + + + //---------- Output ------------------------------------ + output RXEQSCAN_PRESET_DONE, + output [17:0] RXEQSCAN_NEW_TXCOEFF, + output RXEQSCAN_NEW_TXCOEFF_DONE, + output RXEQSCAN_LFFS_SEL, + output RXEQSCAN_ADAPT_DONE + +); + + //---------- Input Register ---------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 2:0] preset_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg preset_valid_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 3:0] txpreset_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [17:0] txcoeff_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg new_txcoeff_req_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 5:0] fs_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 5:0] lf_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 2:0] preset_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg preset_valid_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 3:0] txpreset_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [17:0] txcoeff_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg new_txcoeff_req_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 5:0] fs_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 5:0] lf_reg2; + + //---------- Internal Signals -------------------------- + reg adapt_done_cnt = 1'd0; + + //---------- Output Register --------------------------- + reg preset_done = 1'd0; + reg [21:0] converge_cnt = 22'd0; + reg [17:0] new_txcoeff = 18'd0; + reg new_txcoeff_done = 1'd0; + reg lffs_sel = 1'd0; + reg adapt_done = 1'd0; + reg [ 3:0] fsm = 4'd0; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 4'b0001; + localparam FSM_PRESET = 4'b0010; + localparam FSM_CONVERGE = 4'b0100; + localparam FSM_NEW_TXCOEFF_REQ = 4'b1000; + + //---------- Simulation Speedup ------------------------ + // Gen3: 32 bits / PCLK : 1 million bits / X PCLK + // X = + //------------------------------------------------------ + localparam converge_max_cnt = (PCIE_SIM_MODE == "TRUE") ? 22'd1000 : CONVERGE_MAX; + localparam converge_max_bypass_cnt = (PCIE_SIM_MODE == "TRUE") ? 22'd1000 : CONVERGE_MAX_BYPASS; + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge RXEQSCAN_CLK) +begin + + if (!RXEQSCAN_RST_N) + begin + //---------- 1st Stage FF -------------------------- + preset_reg1 <= 3'd0; + preset_valid_reg1 <= 1'd0; + txpreset_reg1 <= 4'd0; + txcoeff_reg1 <= 18'd0; + new_txcoeff_req_reg1 <= 1'd0; + fs_reg1 <= 6'd0; + lf_reg1 <= 6'd0; + //---------- 2nd Stage FF -------------------------- + preset_reg2 <= 3'd0; + preset_valid_reg2 <= 1'd0; + txpreset_reg2 <= 4'd0; + txcoeff_reg2 <= 18'd0; + new_txcoeff_req_reg2 <= 1'd0; + fs_reg2 <= 6'd0; + lf_reg2 <= 6'd0; + end + else + begin + //---------- 1st Stage FF -------------------------- + preset_reg1 <= RXEQSCAN_PRESET; + preset_valid_reg1 <= RXEQSCAN_PRESET_VALID; + txpreset_reg1 <= RXEQSCAN_TXPRESET; + txcoeff_reg1 <= RXEQSCAN_TXCOEFF; + new_txcoeff_req_reg1 <= RXEQSCAN_NEW_TXCOEFF_REQ; + fs_reg1 <= RXEQSCAN_FS; + lf_reg1 <= RXEQSCAN_LF; + //---------- 2nd Stage FF -------------------------- + preset_reg2 <= preset_reg1; + preset_valid_reg2 <= preset_valid_reg1; + txpreset_reg2 <= txpreset_reg1; + txcoeff_reg2 <= txcoeff_reg1; + new_txcoeff_req_reg2 <= new_txcoeff_req_reg1; + fs_reg2 <= fs_reg1; + lf_reg2 <= lf_reg1; + end + +end + + + +//---------- Eye Scan ---------------------------------------------------------- +always @ (posedge RXEQSCAN_CLK) +begin + + if (!RXEQSCAN_RST_N) + begin + fsm <= FSM_IDLE; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= 18'd0; + new_txcoeff_done <= 1'd0; + lffs_sel <= 1'd0; + adapt_done <= 1'd0; + adapt_done_cnt <= 1'd0; + end + else + + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + + //---------- Process RXEQ Preset --------------- + if (preset_valid_reg2) + begin + fsm <= FSM_PRESET; + preset_done <= 1'd1; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= 1'd0; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + //---------- Request New TX Coefficient -------- + else if (new_txcoeff_req_reg2) + begin + fsm <= FSM_CONVERGE; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + //new_txcoeff <= (PCIE_RXEQ_MODE_GEN3 == 0) ? txcoeff_reg2 : 18'd4; // Default + new_txcoeff <= (PCIE_RXEQ_MODE_GEN3 == 0) ? txcoeff_reg2 : (PCIE_GT_DEVICE == "GTX") ? 18'd5 : 18'd4; // Optimized for Gen3 RX JTOL + new_txcoeff_done <= 1'd0; + lffs_sel <= (PCIE_RXEQ_MODE_GEN3 == 0) ? 1'd0 : 1'd1; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + //---------- Default --------------------------- + else + begin + fsm <= FSM_IDLE; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= 1'd0; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + + end + + //---------- Process RXEQ Preset ------------------- + FSM_PRESET : + + begin + fsm <= (!preset_valid_reg2) ? FSM_IDLE : FSM_PRESET; + preset_done <= 1'd1; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= 1'd0; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + + //---------- Wait for Convergence ------------------ + FSM_CONVERGE : + + begin + if ((adapt_done_cnt == 1'd0) && (RXEQSCAN_CONTROL == 2'd2)) + begin + fsm <= FSM_NEW_TXCOEFF_REQ; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= lffs_sel; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + else + begin + + //---------- Phase2/3 ---------------------- + if (RXEQSCAN_CONTROL == 2'd2) + fsm <= (converge_cnt == converge_max_cnt) ? FSM_NEW_TXCOEFF_REQ : FSM_CONVERGE; + //---------- Phase2/3 Bypass --------------- + else + fsm <= (converge_cnt == converge_max_bypass_cnt) ? FSM_NEW_TXCOEFF_REQ : FSM_CONVERGE; + + preset_done <= 1'd0; + converge_cnt <= converge_cnt + 1'd1; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= lffs_sel; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + end + + //---------- Request New TX Coefficient ------------ + FSM_NEW_TXCOEFF_REQ : + + begin + if (!new_txcoeff_req_reg2) + begin + fsm <= FSM_IDLE; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= lffs_sel; + adapt_done <= 1'd0; + adapt_done_cnt <= (RXEQSCAN_CONTROL == 2'd3) ? 1'd0 : adapt_done_cnt + 1'd1; + end + else + begin + fsm <= FSM_NEW_TXCOEFF_REQ; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd1; + lffs_sel <= lffs_sel; + adapt_done <= (adapt_done_cnt == 1'd1) || (RXEQSCAN_CONTROL == 2'd3); + adapt_done_cnt <= adapt_done_cnt; + end + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_IDLE; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= 18'd0; + new_txcoeff_done <= 1'd0; + lffs_sel <= 1'd0; + adapt_done <= 1'd0; + adapt_done_cnt <= 1'd0; + end + + endcase + + end + +end + + + +//---------- RXEQ Eye Scan Output ---------------------------------------------- +assign RXEQSCAN_PRESET_DONE = preset_done; +assign RXEQSCAN_NEW_TXCOEFF = new_txcoeff; +assign RXEQSCAN_NEW_TXCOEFF_DONE = new_txcoeff_done; +assign RXEQSCAN_LFFS_SEL = lffs_sel; +assign RXEQSCAN_ADAPT_DONE = adapt_done; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0.v new file mode 100644 index 0000000000000000000000000000000000000000..422021b45e2ee050199a06dc80257ef841530e55 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0.v @@ -0,0 +1,923 @@ +// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. +// (c) Copyright 2022-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and international copyright +// and other intellectual property laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +// DO NOT MODIFY THIS FILE. + + +// IP VLNV: xilinx.com:ip:pcie_7x:3.3 +// IP Revision: 20 + +`timescale 1ns/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0 ( + pci_exp_txp, + pci_exp_txn, + pci_exp_rxp, + pci_exp_rxn, + user_clk_out, + user_reset_out, + user_lnk_up, + user_app_rdy, + tx_buf_av, + tx_cfg_req, + tx_err_drop, + s_axis_tx_tready, + s_axis_tx_tdata, + s_axis_tx_tkeep, + s_axis_tx_tlast, + s_axis_tx_tvalid, + s_axis_tx_tuser, + tx_cfg_gnt, + m_axis_rx_tdata, + m_axis_rx_tkeep, + m_axis_rx_tlast, + m_axis_rx_tvalid, + m_axis_rx_tready, + m_axis_rx_tuser, + rx_np_ok, + rx_np_req, + cfg_mgmt_do, + cfg_mgmt_rd_wr_done, + cfg_status, + cfg_command, + cfg_dstatus, + cfg_dcommand, + cfg_lstatus, + cfg_lcommand, + cfg_dcommand2, + cfg_pcie_link_state, + cfg_pmcsr_pme_en, + cfg_pmcsr_powerstate, + cfg_pmcsr_pme_status, + cfg_received_func_lvl_rst, + cfg_mgmt_di, + cfg_mgmt_byte_en, + cfg_mgmt_dwaddr, + cfg_mgmt_wr_en, + cfg_mgmt_rd_en, + cfg_mgmt_wr_readonly, + cfg_trn_pending, + cfg_pm_halt_aspm_l0s, + cfg_pm_halt_aspm_l1, + cfg_pm_force_state_en, + cfg_pm_force_state, + cfg_dsn, + cfg_interrupt, + cfg_interrupt_rdy, + cfg_interrupt_assert, + cfg_interrupt_di, + cfg_interrupt_do, + cfg_interrupt_mmenable, + cfg_interrupt_msienable, + cfg_interrupt_msixenable, + cfg_interrupt_msixfm, + cfg_interrupt_stat, + cfg_pciecap_interrupt_msgnum, + cfg_to_turnoff, + cfg_turnoff_ok, + cfg_bus_number, + cfg_device_number, + cfg_function_number, + cfg_pm_wake, + cfg_pm_send_pme_to, + cfg_ds_bus_number, + cfg_ds_device_number, + cfg_ds_function_number, + cfg_mgmt_wr_rw1c_as_rw, + cfg_bridge_serr_en, + cfg_slot_control_electromech_il_ctl_pulse, + cfg_root_control_syserr_corr_err_en, + cfg_root_control_syserr_non_fatal_err_en, + cfg_root_control_syserr_fatal_err_en, + cfg_root_control_pme_int_en, + cfg_aer_rooterr_corr_err_reporting_en, + cfg_aer_rooterr_non_fatal_err_reporting_en, + cfg_aer_rooterr_fatal_err_reporting_en, + cfg_aer_rooterr_corr_err_received, + cfg_aer_rooterr_non_fatal_err_received, + cfg_aer_rooterr_fatal_err_received, + pl_directed_link_change, + pl_directed_link_width, + pl_directed_link_speed, + pl_directed_link_auton, + pl_upstream_prefer_deemph, + pl_sel_lnk_rate, + pl_sel_lnk_width, + pl_ltssm_state, + pl_lane_reversal_mode, + pl_phy_lnk_up, + pl_tx_pm_state, + pl_rx_pm_state, + pl_link_upcfg_cap, + pl_link_gen2_cap, + pl_link_partner_gen2_supported, + pl_initial_link_width, + pl_directed_change_done, + pl_received_hot_rst, + pl_transmit_hot_rst, + pl_downstream_deemph_source, + cfg_vc_tcvc_map, + sys_clk, + sys_rst_n, + pcie_drp_clk, + pcie_drp_en, + pcie_drp_we, + pcie_drp_addr, + pcie_drp_di, + pcie_drp_do, + pcie_drp_rdy +); + +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_7x_mgt txp" *) +output wire [3 : 0] pci_exp_txp; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_7x_mgt txn" *) +output wire [3 : 0] pci_exp_txn; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_7x_mgt rxp" *) +input wire [3 : 0] pci_exp_rxp; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_7x_mgt:1.0 pcie_7x_mgt rxn" *) +input wire [3 : 0] pci_exp_rxn; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME CLK.user_clk_out, ASSOCIATED_BUSIF m_axis_rx:s_axis_tx, FREQ_HZ 125000000, ASSOCIATED_RESET user_reset_out, FREQ_TOLERANCE_HZ 0, PHASE 0.0, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 CLK.user_clk_out CLK" *) +output wire user_clk_out; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME RST.user_reset_out, POLARITY ACTIVE_HIGH, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:signal:reset:1.0 RST.user_reset_out RST" *) +output wire user_reset_out; +output wire user_lnk_up; +output wire user_app_rdy; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status tx_buf_av" *) +output wire [5 : 0] tx_buf_av; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status tx_cfg_req" *) +output wire tx_cfg_req; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status tx_err_drop" *) +output wire tx_err_drop; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TREADY" *) +output wire s_axis_tx_tready; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TDATA" *) +input wire [127 : 0] s_axis_tx_tdata; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TKEEP" *) +input wire [15 : 0] s_axis_tx_tkeep; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TLAST" *) +input wire s_axis_tx_tlast; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TVALID" *) +input wire s_axis_tx_tvalid; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME s_axis_tx, TDATA_NUM_BYTES 16, TDEST_WIDTH 0, TID_WIDTH 0, TUSER_WIDTH 4, HAS_TREADY 1, HAS_TSTRB 0, HAS_TKEEP 1, HAS_TLAST 1, FREQ_HZ 100000000, PHASE 0.0, LAYERED_METADATA undef, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axis_tx TUSER" *) +input wire [3 : 0] s_axis_tx_tuser; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control tx_cfg_gnt" *) +input wire tx_cfg_gnt; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TDATA" *) +output wire [127 : 0] m_axis_rx_tdata; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TKEEP" *) +output wire [15 : 0] m_axis_rx_tkeep; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TLAST" *) +output wire m_axis_rx_tlast; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TVALID" *) +output wire m_axis_rx_tvalid; +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TREADY" *) +input wire m_axis_rx_tready; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME m_axis_rx, TDATA_NUM_BYTES 16, TDEST_WIDTH 0, TID_WIDTH 0, TUSER_WIDTH 22, HAS_TREADY 1, HAS_TSTRB 0, HAS_TKEEP 1, HAS_TLAST 1, FREQ_HZ 100000000, PHASE 0.0, LAYERED_METADATA undef, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 m_axis_rx TUSER" *) +output wire [21 : 0] m_axis_rx_tuser; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control rx_np_ok" *) +input wire rx_np_ok; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control rx_np_req" *) +input wire rx_np_req; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt READ_DATA" *) +output wire [31 : 0] cfg_mgmt_do; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt READ_WRITE_DONE" *) +output wire cfg_mgmt_rd_wr_done; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status status" *) +output wire [15 : 0] cfg_status; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status command" *) +output wire [15 : 0] cfg_command; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status dstatus" *) +output wire [15 : 0] cfg_dstatus; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status dcommand" *) +output wire [15 : 0] cfg_dcommand; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status lstatus" *) +output wire [15 : 0] cfg_lstatus; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status lcommand" *) +output wire [15 : 0] cfg_lcommand; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status dcommand2" *) +output wire [15 : 0] cfg_dcommand2; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status pcie_link_state" *) +output wire [2 : 0] cfg_pcie_link_state; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status pmcsr_pme_en" *) +output wire cfg_pmcsr_pme_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status pmcsr_powerstate" *) +output wire [1 : 0] cfg_pmcsr_powerstate; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status pmcsr_pme_status" *) +output wire cfg_pmcsr_pme_status; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status received_func_lvl_rst" *) +output wire cfg_received_func_lvl_rst; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt WRITE_DATA" *) +input wire [31 : 0] cfg_mgmt_di; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt BYTE_EN" *) +input wire [3 : 0] cfg_mgmt_byte_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt ADDR" *) +input wire [9 : 0] cfg_mgmt_dwaddr; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt WRITE_EN" *) +input wire cfg_mgmt_wr_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt READ_EN" *) +input wire cfg_mgmt_rd_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt READONLY" *) +input wire cfg_mgmt_wr_readonly; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control trn_pending" *) +input wire cfg_trn_pending; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_halt_aspm_l0s" *) +input wire cfg_pm_halt_aspm_l0s; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_halt_aspm_l1" *) +input wire cfg_pm_halt_aspm_l1; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_force_state_en" *) +input wire cfg_pm_force_state_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_force_state" *) +input wire [1 : 0] cfg_pm_force_state; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control dsn" *) +input wire [63 : 0] cfg_dsn; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt interrupt" *) +input wire cfg_interrupt; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt rdy" *) +output wire cfg_interrupt_rdy; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt assert" *) +input wire cfg_interrupt_assert; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt write_data" *) +input wire [7 : 0] cfg_interrupt_di; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt read_data" *) +output wire [7 : 0] cfg_interrupt_do; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt mmenable" *) +output wire [2 : 0] cfg_interrupt_mmenable; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt msienable" *) +output wire cfg_interrupt_msienable; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt msixenable" *) +output wire cfg_interrupt_msixenable; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt msixfm" *) +output wire cfg_interrupt_msixfm; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt stat" *) +input wire cfg_interrupt_stat; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_interrupt:1.0 pcie2_cfg_interrupt pciecap_interrupt_msgnum" *) +input wire [4 : 0] cfg_pciecap_interrupt_msgnum; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status turnoff" *) +output wire cfg_to_turnoff; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control turnoff_ok" *) +input wire cfg_turnoff_ok; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status bus_number" *) +output wire [7 : 0] cfg_bus_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status device_number" *) +output wire [4 : 0] cfg_device_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status function_number" *) +output wire [2 : 0] cfg_function_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_wake" *) +input wire cfg_pm_wake; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control pm_send_pme_to" *) +input wire cfg_pm_send_pme_to; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control ds_bus_number" *) +input wire [7 : 0] cfg_ds_bus_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control ds_device_number" *) +input wire [4 : 0] cfg_ds_device_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_control:1.0 pcie2_cfg_control ds_function_number" *) +input wire [2 : 0] cfg_ds_function_number; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie_cfg_mgmt:1.0 pcie_cfg_mgmt TYPE1_CFG_REG_ACCESS" *) +input wire cfg_mgmt_wr_rw1c_as_rw; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status bridge_serr_en" *) +output wire cfg_bridge_serr_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status slot_control_electromech_il_ctl_pulse" *) +output wire cfg_slot_control_electromech_il_ctl_pulse; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status root_control_syserr_corr_err_en" *) +output wire cfg_root_control_syserr_corr_err_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status root_control_syserr_non_fatal_err_en" *) +output wire cfg_root_control_syserr_non_fatal_err_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status root_control_syserr_fatal_err_en" *) +output wire cfg_root_control_syserr_fatal_err_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status root_control_pme_int_en" *) +output wire cfg_root_control_pme_int_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_corr_err_reporting_en" *) +output wire cfg_aer_rooterr_corr_err_reporting_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_non_fatal_err_reporting_en" *) +output wire cfg_aer_rooterr_non_fatal_err_reporting_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_fatal_err_reporting_en" *) +output wire cfg_aer_rooterr_fatal_err_reporting_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_corr_err_received" *) +output wire cfg_aer_rooterr_corr_err_received; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_non_fatal_err_received" *) +output wire cfg_aer_rooterr_non_fatal_err_received; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status aer_rooterr_fatal_err_received" *) +output wire cfg_aer_rooterr_fatal_err_received; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl directed_link_change" *) +input wire [1 : 0] pl_directed_link_change; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl directed_link_width" *) +input wire [1 : 0] pl_directed_link_width; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl directed_link_speed" *) +input wire pl_directed_link_speed; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl directed_link_auton" *) +input wire pl_directed_link_auton; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl upstream_prefer_deemph" *) +input wire pl_upstream_prefer_deemph; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl sel_lnk_rate" *) +output wire pl_sel_lnk_rate; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl sel_lnk_width" *) +output wire [1 : 0] pl_sel_lnk_width; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl ltssm_state" *) +output wire [5 : 0] pl_ltssm_state; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl lane_reversal_mode" *) +output wire [1 : 0] pl_lane_reversal_mode; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl phy_lnk_up" *) +output wire pl_phy_lnk_up; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl tx_pm_state" *) +output wire [2 : 0] pl_tx_pm_state; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl rx_pm_state" *) +output wire [1 : 0] pl_rx_pm_state; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl link_upcfg_cap" *) +output wire pl_link_upcfg_cap; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl link_gen2_cap" *) +output wire pl_link_gen2_cap; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl link_partner_gen2_supported" *) +output wire pl_link_partner_gen2_supported; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl initial_link_width" *) +output wire [2 : 0] pl_initial_link_width; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl directed_change_done" *) +output wire pl_directed_change_done; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl received_hot_rst" *) +output wire pl_received_hot_rst; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl transmit_hot_rst" *) +input wire pl_transmit_hot_rst; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_pl:1.0 pcie2_pl downstream_deemph_source" *) +input wire pl_downstream_deemph_source; +(* X_INTERFACE_INFO = "xilinx.com:interface:pcie2_cfg_status:1.0 pcie2_cfg_status vc_tcvc_map" *) +output wire [6 : 0] cfg_vc_tcvc_map; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME CLK.sys_clk, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 CLK.sys_clk CLK" *) +input wire sys_clk; +(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME RST.sys_rst_n, POLARITY ACTIVE_LOW, INSERT_VIP 0" *) +(* X_INTERFACE_INFO = "xilinx.com:signal:reset:1.0 RST.sys_rst_n RST" *) +input wire sys_rst_n; +input wire pcie_drp_clk; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DEN" *) +input wire pcie_drp_en; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DWE" *) +input wire pcie_drp_we; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DADDR" *) +input wire [8 : 0] pcie_drp_addr; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DI" *) +input wire [15 : 0] pcie_drp_di; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DO" *) +output wire [15 : 0] pcie_drp_do; +(* X_INTERFACE_INFO = "xilinx.com:interface:drp:1.0 drp DRDY" *) +output wire pcie_drp_rdy; + + pcie_7x_0_pcie2_top #( + .PCIE_ID_IF("FALSE"), + .c_component_name("pcie_7x_0"), + .dev_port_type("0000"), + .c_dev_port_type("0"), + .c_header_type("00"), + .c_upstream_facing("TRUE"), + .max_lnk_wdt("000100"), + .max_lnk_spd("2"), + .c_gen1(1'B1), + .pci_exp_int_freq(2), + .c_pcie_fast_config(0), + .bar_0("FFFFF000"), + .bar_1("00000000"), + .bar_2("00000000"), + .bar_3("00000000"), + .bar_4("00000000"), + .bar_5("00000000"), + .xrom_bar("00000000"), + .cost_table(1), + .ven_id("10EE"), + .dev_id("0666"), + .rev_id("02"), + .subsys_ven_id("10EE"), + .subsys_id("0007"), + .class_code("020000"), + .cardbus_cis_ptr("00000000"), + .cap_ver("2"), + .c_pcie_cap_slot_implemented("FALSE"), + .mps("010"), + .cmps("2"), + .ext_tag_fld_sup("TRUE"), + .c_dev_control_ext_tag_default("TRUE"), + .phantm_func_sup("00"), + .c_phantom_functions("0"), + .ep_l0s_accpt_lat("111"), + .c_ep_l0s_accpt_lat("7"), + .ep_l1_accpt_lat("111"), + .c_ep_l1_accpt_lat("7"), + .c_cpl_timeout_disable_sup("FALSE"), + .c_cpl_timeout_range("0010"), + .c_cpl_timeout_ranges_sup("2"), + .c_buf_opt_bma("FALSE"), + .c_perf_level_high("TRUE"), + .c_tx_last_tlp("29"), + .c_rx_ram_limit("7FF"), + .c_fc_ph("4"), + .c_fc_pd("64"), + .c_fc_nph("4"), + .c_fc_npd("8"), + .c_fc_cplh("72"), + .c_fc_cpld("850"), + .c_cpl_inf("TRUE"), + .c_cpl_infinite("TRUE"), + .c_dll_lnk_actv_cap("FALSE"), + .c_trgt_lnk_spd("2"), + .c_hw_auton_spd_disable("FALSE"), + .c_de_emph("FALSE"), + .slot_clk("TRUE"), + .c_rcb("0"), + .c_root_cap_crs("FALSE"), + .c_slot_cap_attn_butn("FALSE"), + .c_slot_cap_attn_ind("FALSE"), + .c_slot_cap_pwr_ctrl("FALSE"), + .c_slot_cap_pwr_ind("FALSE"), + .c_slot_cap_hotplug_surprise("FALSE"), + .c_slot_cap_hotplug_cap("FALSE"), + .c_slot_cap_mrl("FALSE"), + .c_slot_cap_elec_interlock("FALSE"), + .c_slot_cap_no_cmd_comp_sup("FALSE"), + .c_slot_cap_pwr_limit_value("0"), + .c_slot_cap_pwr_limit_scale("0"), + .c_slot_cap_physical_slot_num("0"), + .intx("TRUE"), + .int_pin("1"), + .c_msi_cap_on("TRUE"), + .c_pm_cap_next_ptr("48"), + .c_msi_64b_addr("TRUE"), + .c_msi("0"), + .c_msi_mult_msg_extn("0"), + .c_msi_per_vctr_mask_cap("FALSE"), + .c_msix_cap_on("FALSE"), + .c_msix_next_ptr("00"), + .c_pcie_cap_next_ptr("00"), + .c_msix_table_size("000"), + .c_msix_table_offset("0"), + .c_msix_table_bir("0"), + .c_msix_pba_offset("0"), + .c_msix_pba_bir("0"), + .dsi("0"), + .c_dsi_bool("FALSE"), + .d1_sup("0"), + .c_d1_support("FALSE"), + .d2_sup("0"), + .c_d2_support("FALSE"), + .pme_sup("0F"), + .c_pme_support("0F"), + .no_soft_rst("TRUE"), + .pwr_con_d0_state("00"), + .con_scl_fctr_d0_state("0"), + .pwr_con_d1_state("00"), + .con_scl_fctr_d1_state("0"), + .pwr_con_d2_state("00"), + .con_scl_fctr_d2_state("0"), + .pwr_con_d3_state("00"), + .con_scl_fctr_d3_state("0"), + .pwr_dis_d0_state("00"), + .dis_scl_fctr_d0_state("0"), + .pwr_dis_d1_state("00"), + .dis_scl_fctr_d1_state("0"), + .pwr_dis_d2_state("00"), + .dis_scl_fctr_d2_state("0"), + .pwr_dis_d3_state("00"), + .dis_scl_fctr_d3_state("0"), + .c_dsn_cap_enabled("TRUE"), + .c_dsn_base_ptr("100"), + .c_vc_cap_enabled("FALSE"), + .c_vc_base_ptr("000"), + .c_vc_cap_reject_snoop("FALSE"), + .c_vsec_cap_enabled("FALSE"), + .c_vsec_base_ptr("000"), + .c_vsec_next_ptr("000"), + .c_dsn_next_ptr("10c"), + .c_vc_next_ptr("000"), + .c_pci_cfg_space_addr("2A"), + .c_ext_pci_cfg_space_addr("043"), + .c_last_cfg_dw("10C"), + .c_enable_msg_route("00000000000"), + .bram_lat("0"), + .c_rx_raddr_lat("0"), + .c_rx_rdata_lat("2"), + .c_rx_write_lat("0"), + .c_tx_raddr_lat("0"), + .c_tx_rdata_lat("2"), + .c_tx_write_lat("0"), + .c_ll_ack_timeout_enable("FALSE"), + .c_ll_ack_timeout_function("0"), + .c_ll_ack_timeout("0000"), + .c_ll_replay_timeout_enable("FALSE"), + .c_ll_replay_timeout_func("1"), + .c_ll_replay_timeout("0000"), + .c_dis_lane_reverse("FALSE"), + .c_upconfig_capable("TRUE"), + .c_disable_scrambling("FALSE"), + .c_disable_tx_aspm_l0s("FALSE"), + .c_pcie_dbg_ports("TRUE"), + .pci_exp_ref_freq("0"), + .c_xlnx_ref_board("NONE"), + .c_pcie_blk_locn("0"), + .c_ur_atomic("FALSE"), + .c_dev_cap2_atomicop32_completer_supported("FALSE"), + .c_dev_cap2_atomicop64_completer_supported("FALSE"), + .c_dev_cap2_cas128_completer_supported("FALSE"), + .c_dev_cap2_tph_completer_supported("00"), + .c_dev_cap2_ari_forwarding_supported("FALSE"), + .c_dev_cap2_atomicop_routing_supported("FALSE"), + .c_link_cap_aspm_optionality("FALSE"), + .c_aer_cap_on("FALSE"), + .c_aer_base_ptr("000"), + .c_aer_cap_nextptr("000"), + .c_aer_cap_ecrc_check_capable("FALSE"), + .c_aer_cap_ecrc_gen_capable("FALSE"), + .c_aer_cap_multiheader("FALSE"), + .c_aer_cap_permit_rooterr_update("FALSE"), + .c_rbar_cap_on("FALSE"), + .c_rbar_base_ptr("000"), + .c_rbar_cap_nextptr("000"), + .c_rbar_num("0"), + .c_rbar_cap_sup0("00001"), + .c_rbar_cap_index0("0"), + .c_rbar_cap_control_encodedbar0("00"), + .c_rbar_cap_sup1("00001"), + .c_rbar_cap_index1("0"), + .c_rbar_cap_control_encodedbar1("00"), + .c_rbar_cap_sup2("00001"), + .c_rbar_cap_index2("0"), + .c_rbar_cap_control_encodedbar2("00"), + .c_rbar_cap_sup3("00001"), + .c_rbar_cap_index3("0"), + .c_rbar_cap_control_encodedbar3("00"), + .c_rbar_cap_sup4("00001"), + .c_rbar_cap_index4("0"), + .c_rbar_cap_control_encodedbar4("00"), + .c_rbar_cap_sup5("00001"), + .c_rbar_cap_index5("0"), + .c_rbar_cap_control_encodedbar5("00"), + .c_recrc_check("0"), + .c_recrc_check_trim("FALSE"), + .c_disable_rx_poisoned_resp("FALSE"), + .c_trn_np_fc("TRUE"), + .c_ur_inv_req("TRUE"), + .c_ur_prs_response("TRUE"), + .c_silicon_rev("2"), + .c_aer_cap_optional_err_support("000000"), + .LINK_CAP_MAX_LINK_WIDTH(4), + .C_DATA_WIDTH(128), + .PIPE_SIM("FALSE"), + .PCIE_EXT_CLK("FALSE"), + .PCIE_EXT_GT_COMMON("FALSE"), + .EXT_CH_GT_DRP("FALSE"), + .TRANSCEIVER_CTRL_STATUS_PORTS("FALSE"), + .SHARED_LOGIC_IN_CORE("FALSE"), + .ERR_REPORTING_IF("FALSE"), + .PL_INTERFACE("TRUE"), + .CFG_MGMT_IF("TRUE"), + .CFG_CTL_IF("TRUE"), + .CFG_STATUS_IF("TRUE"), + .RCV_MSG_IF("FALSE"), + .CFG_FC_IF("FALSE"), + .EXT_PIPE_INTERFACE("FALSE"), + .EXT_STARTUP_PRIMITIVE("FALSE"), + .KEEP_WIDTH(16), + .PCIE_ASYNC_EN("FALSE"), + .ENABLE_JTAG_DBG("FALSE"), + .REDUCE_OOB_FREQ("FALSE") + ) inst ( + .cfg_subsys_ven_id(16'H10EE), + .cfg_ven_id(16'H10EE), + .cfg_dev_id_pf0(16'H0007), + .cfg_rev_id_pf0(8'H00), + .cfg_subsys_id_pf0(16'H0007), + .pci_exp_txp(pci_exp_txp), + .pci_exp_txn(pci_exp_txn), + .pci_exp_rxp(pci_exp_rxp), + .pci_exp_rxn(pci_exp_rxn), + .int_pclk_out_slave(), + .int_pipe_rxusrclk_out(), + .int_rxoutclk_out(), + .int_dclk_out(), + .int_mmcm_lock_out(), + .int_userclk1_out(), + .int_userclk2_out(), + .int_oobclk_out(), + .int_qplllock_out(), + .int_qplloutclk_out(), + .int_qplloutrefclk_out(), + .int_pclk_sel_slave(4'B0), + .pipe_pclk_in(1'B0), + .pipe_rxusrclk_in(1'B0), + .pipe_rxoutclk_in(4'B0), + .pipe_dclk_in(1'B0), + .pipe_userclk1_in(1'B1), + .pipe_userclk2_in(1'B0), + .pipe_oobclk_in(1'B0), + .pipe_mmcm_lock_in(1'B1), + .pipe_txoutclk_out(), + .pipe_rxoutclk_out(), + .pipe_pclk_sel_out(), + .pipe_gen3_out(), + .user_clk_out(user_clk_out), + .user_reset_out(user_reset_out), + .user_lnk_up(user_lnk_up), + .user_app_rdy(user_app_rdy), + .tx_buf_av(tx_buf_av), + .tx_cfg_req(tx_cfg_req), + .tx_err_drop(tx_err_drop), + .s_axis_tx_tready(s_axis_tx_tready), + .s_axis_tx_tdata(s_axis_tx_tdata), + .s_axis_tx_tkeep(s_axis_tx_tkeep), + .s_axis_tx_tlast(s_axis_tx_tlast), + .s_axis_tx_tvalid(s_axis_tx_tvalid), + .s_axis_tx_tuser(s_axis_tx_tuser), + .tx_cfg_gnt(tx_cfg_gnt), + .m_axis_rx_tdata(m_axis_rx_tdata), + .m_axis_rx_tkeep(m_axis_rx_tkeep), + .m_axis_rx_tlast(m_axis_rx_tlast), + .m_axis_rx_tvalid(m_axis_rx_tvalid), + .m_axis_rx_tready(m_axis_rx_tready), + .m_axis_rx_tuser(m_axis_rx_tuser), + .rx_np_ok(rx_np_ok), + .rx_np_req(rx_np_req), + .fc_cpld(), + .fc_cplh(), + .fc_npd(), + .fc_nph(), + .fc_pd(), + .fc_ph(), + .fc_sel(3'B0), + .cfg_mgmt_do(cfg_mgmt_do), + .cfg_mgmt_rd_wr_done(cfg_mgmt_rd_wr_done), + .cfg_status(cfg_status), + .cfg_command(cfg_command), + .cfg_dstatus(cfg_dstatus), + .cfg_dcommand(cfg_dcommand), + .cfg_lstatus(cfg_lstatus), + .cfg_lcommand(cfg_lcommand), + .cfg_dcommand2(cfg_dcommand2), + .cfg_pcie_link_state(cfg_pcie_link_state), + .cfg_pmcsr_pme_en(cfg_pmcsr_pme_en), + .cfg_pmcsr_powerstate(cfg_pmcsr_powerstate), + .cfg_pmcsr_pme_status(cfg_pmcsr_pme_status), + .cfg_received_func_lvl_rst(cfg_received_func_lvl_rst), + .cfg_mgmt_di(cfg_mgmt_di), + .cfg_mgmt_byte_en(cfg_mgmt_byte_en), + .cfg_mgmt_dwaddr(cfg_mgmt_dwaddr), + .cfg_mgmt_wr_en(cfg_mgmt_wr_en), + .cfg_mgmt_rd_en(cfg_mgmt_rd_en), + .cfg_mgmt_wr_readonly(cfg_mgmt_wr_readonly), + .cfg_err_ecrc(1'B0), + .cfg_err_ur(1'B0), + .cfg_err_cpl_timeout(1'B0), + .cfg_err_cpl_unexpect(1'B0), + .cfg_err_cpl_abort(1'B0), + .cfg_err_posted(1'B0), + .cfg_err_cor(1'B0), + .cfg_err_atomic_egress_blocked(1'B0), + .cfg_err_internal_cor(1'B0), + .cfg_err_malformed(1'B0), + .cfg_err_mc_blocked(1'B0), + .cfg_err_poisoned(1'B0), + .cfg_err_norecovery(1'B0), + .cfg_err_tlp_cpl_header(48'B0), + .cfg_err_cpl_rdy(), + .cfg_err_locked(1'B0), + .cfg_err_acs(1'B0), + .cfg_err_internal_uncor(1'B0), + .cfg_trn_pending(cfg_trn_pending), + .cfg_pm_halt_aspm_l0s(cfg_pm_halt_aspm_l0s), + .cfg_pm_halt_aspm_l1(cfg_pm_halt_aspm_l1), + .cfg_pm_force_state_en(cfg_pm_force_state_en), + .cfg_pm_force_state(cfg_pm_force_state), + .cfg_dsn(cfg_dsn), + .cfg_interrupt(cfg_interrupt), + .cfg_interrupt_rdy(cfg_interrupt_rdy), + .cfg_interrupt_assert(cfg_interrupt_assert), + .cfg_interrupt_di(cfg_interrupt_di), + .cfg_interrupt_do(cfg_interrupt_do), + .cfg_interrupt_mmenable(cfg_interrupt_mmenable), + .cfg_interrupt_msienable(cfg_interrupt_msienable), + .cfg_interrupt_msixenable(cfg_interrupt_msixenable), + .cfg_interrupt_msixfm(cfg_interrupt_msixfm), + .cfg_interrupt_stat(cfg_interrupt_stat), + .cfg_pciecap_interrupt_msgnum(cfg_pciecap_interrupt_msgnum), + .cfg_to_turnoff(cfg_to_turnoff), + .cfg_turnoff_ok(cfg_turnoff_ok), + .cfg_bus_number(cfg_bus_number), + .cfg_device_number(cfg_device_number), + .cfg_function_number(cfg_function_number), + .cfg_pm_wake(cfg_pm_wake), + .cfg_pm_send_pme_to(cfg_pm_send_pme_to), + .cfg_ds_bus_number(cfg_ds_bus_number), + .cfg_ds_device_number(cfg_ds_device_number), + .cfg_ds_function_number(cfg_ds_function_number), + .cfg_mgmt_wr_rw1c_as_rw(cfg_mgmt_wr_rw1c_as_rw), + .cfg_msg_received(), + .cfg_msg_data(), + .cfg_bridge_serr_en(cfg_bridge_serr_en), + .cfg_slot_control_electromech_il_ctl_pulse(cfg_slot_control_electromech_il_ctl_pulse), + .cfg_root_control_syserr_corr_err_en(cfg_root_control_syserr_corr_err_en), + .cfg_root_control_syserr_non_fatal_err_en(cfg_root_control_syserr_non_fatal_err_en), + .cfg_root_control_syserr_fatal_err_en(cfg_root_control_syserr_fatal_err_en), + .cfg_root_control_pme_int_en(cfg_root_control_pme_int_en), + .cfg_aer_rooterr_corr_err_reporting_en(cfg_aer_rooterr_corr_err_reporting_en), + .cfg_aer_rooterr_non_fatal_err_reporting_en(cfg_aer_rooterr_non_fatal_err_reporting_en), + .cfg_aer_rooterr_fatal_err_reporting_en(cfg_aer_rooterr_fatal_err_reporting_en), + .cfg_aer_rooterr_corr_err_received(cfg_aer_rooterr_corr_err_received), + .cfg_aer_rooterr_non_fatal_err_received(cfg_aer_rooterr_non_fatal_err_received), + .cfg_aer_rooterr_fatal_err_received(cfg_aer_rooterr_fatal_err_received), + .cfg_msg_received_err_cor(), + .cfg_msg_received_err_non_fatal(), + .cfg_msg_received_err_fatal(), + .cfg_msg_received_pm_as_nak(), + .cfg_msg_received_pm_pme(), + .cfg_msg_received_pme_to_ack(), + .cfg_msg_received_assert_int_a(), + .cfg_msg_received_assert_int_b(), + .cfg_msg_received_assert_int_c(), + .cfg_msg_received_assert_int_d(), + .cfg_msg_received_deassert_int_a(), + .cfg_msg_received_deassert_int_b(), + .cfg_msg_received_deassert_int_c(), + .cfg_msg_received_deassert_int_d(), + .cfg_msg_received_setslotpowerlimit(), + .pl_directed_link_change(pl_directed_link_change), + .pl_directed_link_width(pl_directed_link_width), + .pl_directed_link_speed(pl_directed_link_speed), + .pl_directed_link_auton(pl_directed_link_auton), + .pl_upstream_prefer_deemph(pl_upstream_prefer_deemph), + .pl_sel_lnk_rate(pl_sel_lnk_rate), + .pl_sel_lnk_width(pl_sel_lnk_width), + .pl_ltssm_state(pl_ltssm_state), + .pl_lane_reversal_mode(pl_lane_reversal_mode), + .pl_phy_lnk_up(pl_phy_lnk_up), + .pl_tx_pm_state(pl_tx_pm_state), + .pl_rx_pm_state(pl_rx_pm_state), + .pl_link_upcfg_cap(pl_link_upcfg_cap), + .pl_link_gen2_cap(pl_link_gen2_cap), + .pl_link_partner_gen2_supported(pl_link_partner_gen2_supported), + .pl_initial_link_width(pl_initial_link_width), + .pl_directed_change_done(pl_directed_change_done), + .pl_received_hot_rst(pl_received_hot_rst), + .pl_transmit_hot_rst(pl_transmit_hot_rst), + .pl_downstream_deemph_source(pl_downstream_deemph_source), + .cfg_err_aer_headerlog(128'B0), + .cfg_aer_interrupt_msgnum(5'B0), + .cfg_err_aer_headerlog_set(), + .cfg_aer_ecrc_check_en(), + .cfg_aer_ecrc_gen_en(), + .cfg_vc_tcvc_map(cfg_vc_tcvc_map), + .sys_clk(sys_clk), + .sys_rst_n(sys_rst_n), + .pipe_mmcm_rst_n(1'B1), + .startup_eos_in(1'B0), + .startup_cfgclk(), + .startup_cfgmclk(), + .startup_eos(), + .startup_preq(), + .startup_clk(1'B0), + .startup_gsr(1'B0), + .startup_gts(1'B0), + .startup_keyclearb(1'B1), + .startup_pack(1'B0), + .startup_usrcclko(1'B1), + .startup_usrcclkts(1'B0), + .startup_usrdoneo(1'B0), + .startup_usrdonets(1'B1), + .icap_clk(1'B0), + .icap_csib(1'B0), + .icap_rdwrb(1'B0), + .icap_i(32'B0), + .icap_o(), + .qpll_drp_crscode(12'B0), + .qpll_drp_fsm(18'B0), + .qpll_drp_done(2'B0), + .qpll_drp_reset(2'B0), + .qpll_qplllock(2'B0), + .qpll_qplloutclk(2'B0), + .qpll_qplloutrefclk(2'B0), + .qpll_qplld(), + .qpll_qpllreset(), + .qpll_drp_clk(), + .qpll_drp_rst_n(), + .qpll_drp_ovrd(), + .qpll_drp_gen3(), + .qpll_drp_start(), + .pipe_txprbssel(3'B0), + .pipe_rxprbssel(3'B0), + .pipe_txprbsforceerr(1'B0), + .pipe_rxprbscntreset(1'B0), + .pipe_loopback(3'B0), + .pipe_rxprbserr(), + .pipe_txinhibit(4'B0), + .pipe_rst_fsm(), + .pipe_qrst_fsm(), + .pipe_rate_fsm(), + .pipe_sync_fsm_tx(), + .pipe_sync_fsm_rx(), + .pipe_drp_fsm(), + .pipe_rst_idle(), + .pipe_qrst_idle(), + .pipe_rate_idle(), + .pipe_eyescandataerror(), + .pipe_rxstatus(), + .pipe_dmonitorout(), + .pipe_cpll_lock(), + .pipe_qpll_lock(), + .pipe_rxpmaresetdone(), + .pipe_rxbufstatus(), + .pipe_txphaligndone(), + .pipe_txphinitdone(), + .pipe_txdlysresetdone(), + .pipe_rxphaligndone(), + .pipe_rxdlysresetdone(), + .pipe_rxsyncdone(), + .pipe_rxdisperr(), + .pipe_rxnotintable(), + .pipe_rxcommadet(), + .gt_ch_drp_rdy(), + .pipe_debug_0(), + .pipe_debug_1(), + .pipe_debug_2(), + .pipe_debug_3(), + .pipe_debug_4(), + .pipe_debug_5(), + .pipe_debug_6(), + .pipe_debug_7(), + .pipe_debug_8(), + .pipe_debug_9(), + .pipe_debug(), + .ext_ch_gt_drpclk(), + .ext_ch_gt_drpaddr(36'B0), + .ext_ch_gt_drpen(4'B0), + .ext_ch_gt_drpdi(64'B0), + .ext_ch_gt_drpwe(4'B0), + .ext_ch_gt_drpdo(), + .ext_ch_gt_drprdy(), + .pcie_drp_clk(pcie_drp_clk), + .pcie_drp_en(pcie_drp_en), + .pcie_drp_we(pcie_drp_we), + .pcie_drp_addr(pcie_drp_addr), + .pcie_drp_di(pcie_drp_di), + .pcie_drp_do(pcie_drp_do), + .pcie_drp_rdy(pcie_drp_rdy), + .common_commands_in(12'B0), + .pipe_rx_0_sigs(25'B0), + .pipe_rx_1_sigs(25'B0), + .pipe_rx_2_sigs(25'B0), + .pipe_rx_3_sigs(25'B0), + .pipe_rx_4_sigs(25'B0), + .pipe_rx_5_sigs(25'B0), + .pipe_rx_6_sigs(25'B0), + .pipe_rx_7_sigs(25'B0), + .common_commands_out(), + .pipe_tx_0_sigs(), + .pipe_tx_1_sigs(), + .pipe_tx_2_sigs(), + .pipe_tx_3_sigs(), + .pipe_tx_4_sigs(), + .pipe_tx_5_sigs(), + .pipe_tx_6_sigs(), + .pipe_tx_7_sigs() + ); +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_rx.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_rx.v new file mode 100644 index 0000000000000000000000000000000000000000..75e5afc707d2af746a6a6cc8083d5976194abef6 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_rx.v @@ -0,0 +1,213 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_rx.v +// Version : 3.3 +// // +// Description: // +// TRN to AXI RX module. Instantiates pipeline and null generator RX // +// submodules. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_rx // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_rx #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_FAMILY = "X7", // Targeted FPGA family + parameter C_ROOT_PORT = "FALSE", // PCIe block is in root port mode + parameter C_PM_PRIORITY = "FALSE", // Disable TX packet boundary thrtl + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, // trem/rrem width + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + //---------------------------------------------// + // User Design I/O // + //---------------------------------------------// + + // AXI RX + //----------- + output [C_DATA_WIDTH-1:0] m_axis_rx_tdata, // RX data to user + output m_axis_rx_tvalid, // RX data is valid + input m_axis_rx_tready, // RX ready for data + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, // RX strobe byte enables + output m_axis_rx_tlast, // RX data is last + output [21:0] m_axis_rx_tuser, // RX user signals + + //---------------------------------------------// + // PCIe Block I/O // + //---------------------------------------------// + + // TRN RX + //----------- + input [C_DATA_WIDTH-1:0] trn_rd, // RX data from block + input trn_rsof, // RX start of packet + input trn_reof, // RX end of packet + input trn_rsrc_rdy, // RX source ready + output trn_rdst_rdy, // RX destination ready + input trn_rsrc_dsc, // RX source discontinue + input [REM_WIDTH-1:0] trn_rrem, // RX remainder + input trn_rerrfwd, // RX error forward + input [6:0] trn_rbar_hit, // RX BAR hit + input trn_recrc_err, // RX ECRC error + + // System + //----------- + output [2:0] np_counter, // Non-posted counter + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +// Wires +wire null_rx_tvalid; +wire null_rx_tlast; +wire [KEEP_WIDTH-1:0] null_rx_tkeep; +wire null_rdst_rdy; +wire [4:0] null_is_eof; + +//---------------------------------------------// +// RX Data Pipeline // +//---------------------------------------------// + +pcie_7x_0_axi_basic_rx_pipeline #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .C_FAMILY( C_FAMILY ), + .TCQ( TCQ ), + + .REM_WIDTH( REM_WIDTH ), + .KEEP_WIDTH( KEEP_WIDTH ) + +) rx_pipeline_inst ( + + // Outgoing AXI TX + //----------- + .m_axis_rx_tdata( m_axis_rx_tdata ), + .m_axis_rx_tvalid( m_axis_rx_tvalid ), + .m_axis_rx_tready( m_axis_rx_tready ), + .m_axis_rx_tkeep( m_axis_rx_tkeep ), + .m_axis_rx_tlast( m_axis_rx_tlast ), + .m_axis_rx_tuser( m_axis_rx_tuser ), + + // Incoming TRN RX + //----------- + .trn_rd( trn_rd ), + .trn_rsof( trn_rsof ), + .trn_reof( trn_reof ), + .trn_rsrc_rdy( trn_rsrc_rdy ), + .trn_rdst_rdy( trn_rdst_rdy ), + .trn_rsrc_dsc( trn_rsrc_dsc ), + .trn_rrem( trn_rrem ), + .trn_rerrfwd( trn_rerrfwd ), + .trn_rbar_hit( trn_rbar_hit ), + .trn_recrc_err( trn_recrc_err ), + + // Null Inputs + //----------- + .null_rx_tvalid( null_rx_tvalid ), + .null_rx_tlast( null_rx_tlast ), + .null_rx_tkeep( null_rx_tkeep ), + .null_rdst_rdy( null_rdst_rdy ), + .null_is_eof( null_is_eof ), + + // System + //----------- + .np_counter( np_counter ), + .user_clk( user_clk ), + .user_rst( user_rst ) +); + + + //---------------------------------------------// + // RX Null Packet Generator // + //---------------------------------------------// + +pcie_7x_0_axi_basic_rx_null_gen #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .TCQ( TCQ ), + + .KEEP_WIDTH( KEEP_WIDTH ) + + ) rx_null_gen_inst ( + + // Inputs + //----------- + .m_axis_rx_tdata( m_axis_rx_tdata ), + .m_axis_rx_tvalid( m_axis_rx_tvalid ), + .m_axis_rx_tready( m_axis_rx_tready ), + .m_axis_rx_tlast( m_axis_rx_tlast ), + .m_axis_rx_tuser( m_axis_rx_tuser ), + + // Null Outputs + //----------- + .null_rx_tvalid( null_rx_tvalid ), + .null_rx_tlast( null_rx_tlast ), + .null_rx_tkeep( null_rx_tkeep ), + .null_rdst_rdy( null_rdst_rdy ), + .null_is_eof( null_is_eof ), + + // System + //----------- + .user_clk( user_clk ), + .user_rst( user_rst ) + ); + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_rx_null_gen.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_rx_null_gen.v new file mode 100644 index 0000000000000000000000000000000000000000..28c06569819a60d7075a0f5ca41e2ab07c9b42f1 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_rx_null_gen.v @@ -0,0 +1,384 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_rx_null_gen.v +// Version : 3.3 +// // +// Description: // +// TRN to AXI RX null generator. Generates null packets for use in // +// discontinue situations. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_rx // +// axi_basic_rx_null_gen // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_rx_null_gen # ( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + + // AXI RX + //----------- + input [C_DATA_WIDTH-1:0] m_axis_rx_tdata, // RX data to user + input m_axis_rx_tvalid, // RX data is valid + input m_axis_rx_tready, // RX ready for data + input m_axis_rx_tlast, // RX data is last + input [21:0] m_axis_rx_tuser, // RX user signals + + // Null Inputs + //----------- + output null_rx_tvalid, // NULL generated tvalid + output null_rx_tlast, // NULL generated tlast + output [KEEP_WIDTH-1:0] null_rx_tkeep, // NULL generated tkeep + output null_rdst_rdy, // NULL generated rdst_rdy + output reg [4:0] null_is_eof, // NULL generated is_eof + + // System + //----------- + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +localparam INTERFACE_WIDTH_DWORDS = (C_DATA_WIDTH == 128) ? 11'd4 : + (C_DATA_WIDTH == 64) ? 11'd2 : 11'd1; + +//----------------------------------------------------------------------------// +// NULL packet generator state machine // +// This state machine shadows the AXI RX interface, tracking each packet as // +// it's passed to the AXI user. When a multi-cycle packet is detected, the // +// state machine automatically generates a "null" packet. In the event of a // +// discontinue, the RX pipeline can switch over to this null packet as // +// necessary. // +//----------------------------------------------------------------------------// + +// State machine variables and states +localparam IDLE = 0; +localparam IN_PACKET = 1; +reg cur_state; +reg next_state; + +// Signals for tracking a packet on the AXI interface +reg [11:0] reg_pkt_len_counter; +reg [11:0] pkt_len_counter; +wire [11:0] pkt_len_counter_dec; +wire pkt_done; + +// Calculate packet fields, which are needed to determine total packet length. +wire [11:0] new_pkt_len; +wire [9:0] payload_len; +wire [1:0] packet_fmt; +wire packet_td; +reg [3:0] packet_overhead; + +// Misc. +wire [KEEP_WIDTH-1:0] eof_tkeep; +wire straddle_sof; +wire eof; + + +// Create signals to detect sof and eof situations. These signals vary depending +// on data width. +assign eof = m_axis_rx_tuser[21]; +generate + if(C_DATA_WIDTH == 128) begin : sof_eof_128 + assign straddle_sof = (m_axis_rx_tuser[14:13] == 2'b11); + end + else begin : sof_eof_64_32 + assign straddle_sof = 1'b0; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Calculate the length of the packet being presented on the RX interface. To // +// do so, we need the relevent packet fields that impact total packet length. // +// These are: // +// - Header length: obtained from bit 1 of FMT field in 1st DWORD of header // +// - Payload length: obtained from LENGTH field in 1st DWORD of header // +// - TLP digest: obtained from TD field in 1st DWORD of header // +// - Current data: the number of bytes that have already been presented // +// on the data interface // +// // +// packet length = header + payload + tlp digest - # of DWORDS already // +// transmitted // +// // +// packet_overhead is where we calculate everything except payload. // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : len_calc_128 + assign packet_fmt = straddle_sof ? + m_axis_rx_tdata[94:93] : m_axis_rx_tdata[30:29]; + assign packet_td = straddle_sof ? + m_axis_rx_tdata[79] : m_axis_rx_tdata[15]; + assign payload_len = packet_fmt[1] ? + (straddle_sof ? m_axis_rx_tdata[73:64] : m_axis_rx_tdata[9:0]) : 10'h0; + + always @(*) begin + // In 128-bit mode, the amount of data currently on the interface + // depends on whether we're straddling or not. If so, 2 DWORDs have been + // seen. If not, 4 DWORDs. + case({packet_fmt[0], packet_td, straddle_sof}) + // Header + TD - Data currently on interface + 3'b0_0_0: packet_overhead = 4'd3 + 4'd0 - 4'd4; + 3'b0_0_1: packet_overhead = 4'd3 + 4'd0 - 4'd2; + 3'b0_1_0: packet_overhead = 4'd3 + 4'd1 - 4'd4; + 3'b0_1_1: packet_overhead = 4'd3 + 4'd1 - 4'd2; + 3'b1_0_0: packet_overhead = 4'd4 + 4'd0 - 4'd4; + 3'b1_0_1: packet_overhead = 4'd4 + 4'd0 - 4'd2; + 3'b1_1_0: packet_overhead = 4'd4 + 4'd1 - 4'd4; + 3'b1_1_1: packet_overhead = 4'd4 + 4'd1 - 4'd2; + endcase + end +assign new_pkt_len = + {{9{packet_overhead[3]}}, packet_overhead[2:0]} + {2'b0, payload_len}; + end + else if(C_DATA_WIDTH == 64) begin : len_calc_64 + assign packet_fmt = m_axis_rx_tdata[30:29]; + assign packet_td = m_axis_rx_tdata[15]; + assign payload_len = packet_fmt[1] ? m_axis_rx_tdata[9:0] : 10'h0; + + always @(*) begin + // 64-bit mode: no straddling, so always 2 DWORDs + case({packet_fmt[0], packet_td}) + // Header + TD - Data currently on interface + 2'b0_0: packet_overhead[1:0] = 2'b01 ;//4'd3 + 4'd0 - 4'd2; // 1 + 2'b0_1: packet_overhead[1:0] = 2'b10 ;//4'd3 + 4'd1 - 4'd2; // 2 + 2'b1_0: packet_overhead[1:0] = 2'b10 ;//4'd4 + 4'd0 - 4'd2; // 2 + 2'b1_1: packet_overhead[1:0] = 2'b11 ;//4'd4 + 4'd1 - 4'd2; // 3 + endcase + end +assign new_pkt_len = + {{10{1'b0}}, packet_overhead[1:0]} + {2'b0, payload_len}; + end + else begin : len_calc_32 + assign packet_fmt = m_axis_rx_tdata[30:29]; + assign packet_td = m_axis_rx_tdata[15]; + assign payload_len = packet_fmt[1] ? m_axis_rx_tdata[9:0] : 10'h0; + + always @(*) begin + // 32-bit mode: no straddling, so always 1 DWORD + case({packet_fmt[0], packet_td}) + // Header + TD - Data currently on interface + 2'b0_0: packet_overhead = 4'd3 + 4'd0 - 4'd1; + 2'b0_1: packet_overhead = 4'd3 + 4'd1 - 4'd1; + 2'b1_0: packet_overhead = 4'd4 + 4'd0 - 4'd1; + 2'b1_1: packet_overhead = 4'd4 + 4'd1 - 4'd1; + endcase + end +assign new_pkt_len = + {{9{packet_overhead[3]}}, packet_overhead[2:0]} + {2'b0, payload_len}; + end +endgenerate + +// Now calculate actual packet length, adding the packet overhead and the +// payload length. This is signed math, so sign-extend packet_overhead. +// NOTE: a payload length of zero means 1024 DW in the PCIe spec, but this +// behavior isn't supported in our block. +//assign new_pkt_len = +// {{9{packet_overhead[3]}}, packet_overhead[2:0]} + {2'b0, payload_len}; + + +// Math signals needed in the state machine below. These are seperate wires to +// help ensure synthesis tools sre smart about optimizing them. +assign pkt_len_counter_dec = reg_pkt_len_counter - INTERFACE_WIDTH_DWORDS; +assign pkt_done = (reg_pkt_len_counter <= INTERFACE_WIDTH_DWORDS); + +//----------------------------------------------------------------------------// +// Null generator Mealy state machine. Determine outputs based on: // +// 1) current st // +// 2) current inp // +//----------------------------------------------------------------------------// +always @(*) begin + case (cur_state) + + // IDLE state: the interface is IDLE and we're waiting for a packet to + // start. If a packet starts, move to state IN_PACKET and begin tracking + // it as long as it's NOT a single cycle packet (indicated by assertion of + // eof at packet start) + IDLE: begin + if(m_axis_rx_tvalid && m_axis_rx_tready && !eof) begin + next_state = IN_PACKET; + end + else begin + next_state = IDLE; + end + + pkt_len_counter = new_pkt_len; + end + + // IN_PACKET: a mutli-cycle packet is in progress and we're tracking it. We + // are in lock-step with the AXI interface decrementing our packet length + // tracking reg, and waiting for the packet to finish. + // + // * If packet finished and a new one starts, this is a straddle situation. + // Next state is IN_PACKET (128-bit only). + // * If the current packet is done, next state is IDLE. + // * Otherwise, next state is IN_PACKET. + IN_PACKET: begin + // Straddle packet + if((C_DATA_WIDTH == 128) && straddle_sof && m_axis_rx_tvalid) begin + pkt_len_counter = new_pkt_len; + next_state = IN_PACKET; + end + + // Current packet finished + else if(m_axis_rx_tready && pkt_done) + begin + pkt_len_counter = new_pkt_len; + next_state = IDLE; + end + + // Packet in progress + else begin + if(m_axis_rx_tready) begin + // Not throttled + pkt_len_counter = pkt_len_counter_dec; + end + else begin + // Throttled + pkt_len_counter = reg_pkt_len_counter; + end + + next_state = IN_PACKET; + end + end + + default: begin + pkt_len_counter = reg_pkt_len_counter; + next_state = IDLE; + end + endcase +end + + +// Synchronous NULL packet generator state machine logic +always @(posedge user_clk) begin + if(user_rst) begin + cur_state <= #TCQ IDLE; + reg_pkt_len_counter <= #TCQ 12'h0; + end + else begin + cur_state <= #TCQ next_state; + reg_pkt_len_counter <= #TCQ pkt_len_counter; + end +end + + +// Generate tkeep/is_eof for an end-of-packet situation. +generate + if(C_DATA_WIDTH == 128) begin : strb_calc_128 + always @(*) begin + // Assign null_is_eof depending on how many DWORDs are left in the + // packet. + case(pkt_len_counter) + 10'd1: null_is_eof = 5'b10011; + 10'd2: null_is_eof = 5'b10111; + 10'd3: null_is_eof = 5'b11011; + 10'd4: null_is_eof = 5'b11111; + default: null_is_eof = 5'b00011; + endcase + end + + // tkeep not used in 128-bit interface + assign eof_tkeep = {KEEP_WIDTH{1'b0}}; + end + else if(C_DATA_WIDTH == 64) begin : strb_calc_64 + always @(*) begin + // Assign null_is_eof depending on how many DWORDs are left in the + // packet. + case(pkt_len_counter) + 10'd1: null_is_eof = 5'b10011; + 10'd2: null_is_eof = 5'b10111; + default: null_is_eof = 5'b00011; + endcase + end + + // Assign tkeep to 0xFF or 0x0F depending on how many DWORDs are left in + // the current packet. + assign eof_tkeep = { ((pkt_len_counter == 12'd2) ? 4'hF:4'h0), 4'hF }; + end + else begin : strb_calc_32 + always @(*) begin + // is_eof is either on or off for 32-bit + if(pkt_len_counter == 12'd1) begin + null_is_eof = 5'b10011; + end + else begin + null_is_eof = 5'b00011; + end + end + + // The entire DWORD is always valid in 32-bit mode, so tkeep is always 0xF + assign eof_tkeep = 4'hF; + end +endgenerate + + +// Finally, use everything we've generated to calculate our NULL outputs +assign null_rx_tvalid = 1'b1; +assign null_rx_tlast = (pkt_len_counter <= INTERFACE_WIDTH_DWORDS); +assign null_rx_tkeep = null_rx_tlast ? eof_tkeep : {KEEP_WIDTH{1'b1}}; +assign null_rdst_rdy = null_rx_tlast; + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_rx_pipeline.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_rx_pipeline.v new file mode 100644 index 0000000000000000000000000000000000000000..6eae366425d01005f64f884f6151f191630f317c --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_rx_pipeline.v @@ -0,0 +1,624 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_rx_pipeline.v +// Version : 3.3 +// // +// Description: // +// TRN to AXI RX pipeline. Converts received data from TRN protocol to AXI. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_rx // +// axi_basic_rx_pipeline // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_rx_pipeline #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_FAMILY = "X7", // Targeted FPGA family + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, // trem/rrem width + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + + // AXI RX + //----------- + output reg [C_DATA_WIDTH-1:0] m_axis_rx_tdata, // RX data to user + output reg m_axis_rx_tvalid, // RX data is valid + input m_axis_rx_tready, // RX ready for data + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, // RX strobe byte enables + output m_axis_rx_tlast, // RX data is last + output reg [21:0] m_axis_rx_tuser, // RX user signals + + // TRN RX + //----------- + input [C_DATA_WIDTH-1:0] trn_rd, // RX data from block + input trn_rsof, // RX start of packet + input trn_reof, // RX end of packet + input trn_rsrc_rdy, // RX source ready + output reg trn_rdst_rdy, // RX destination ready + input trn_rsrc_dsc, // RX source discontinue + input [REM_WIDTH-1:0] trn_rrem, // RX remainder + input trn_rerrfwd, // RX error forward + input [6:0] trn_rbar_hit, // RX BAR hit + input trn_recrc_err, // RX ECRC error + + // Null Inputs + //----------- + input null_rx_tvalid, // NULL generated tvalid + input null_rx_tlast, // NULL generated tlast + input [KEEP_WIDTH-1:0] null_rx_tkeep, // NULL generated tkeep + input null_rdst_rdy, // NULL generated rdst_rdy + input [4:0] null_is_eof, // NULL generated is_eof + + // System + //----------- + output [2:0] np_counter, // Non-posted counter + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +// Wires and regs for creating AXI signals +wire [4:0] is_sof; +wire [4:0] is_sof_prev; + +wire [4:0] is_eof; +wire [4:0] is_eof_prev; + +reg [KEEP_WIDTH-1:0] reg_tkeep; +wire [KEEP_WIDTH-1:0] tkeep; +wire [KEEP_WIDTH-1:0] tkeep_prev; + +reg reg_tlast; +wire rsrc_rdy_filtered; + +// Wires and regs for previous value buffer +wire [C_DATA_WIDTH-1:0] trn_rd_DW_swapped; +reg [C_DATA_WIDTH-1:0] trn_rd_prev; + +wire data_hold; +reg data_prev; + +reg trn_reof_prev; +reg [REM_WIDTH-1:0] trn_rrem_prev; +reg trn_rsrc_rdy_prev; +reg trn_rsrc_dsc_prev; +reg trn_rsof_prev; +reg [6:0] trn_rbar_hit_prev; +reg trn_rerrfwd_prev; +reg trn_recrc_err_prev; + +// Null packet handling signals +reg null_mux_sel; +reg trn_in_packet; +wire dsc_flag; +wire dsc_detect; +reg reg_dsc_detect; +reg trn_rsrc_dsc_d; + + +// Create "filtered" version of rsrc_rdy, where discontinued SOFs are removed. +assign rsrc_rdy_filtered = trn_rsrc_rdy && + (trn_in_packet || (trn_rsof && !trn_rsrc_dsc)); + +//----------------------------------------------------------------------------// +// Previous value buffer // +// --------------------- // +// We are inserting a pipeline stage in between TRN and AXI, which causes // +// some issues with handshaking signals m_axis_rx_tready/trn_rdst_rdy. The // +// added cycle of latency in the path causes the user design to fall behind // +// the TRN interface whenever it throttles. // +// // +// To avoid loss of data, we must keep the previous value of all trn_r* // +// signals in case the user throttles. // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + trn_rd_prev <= #TCQ {C_DATA_WIDTH{1'b0}}; + trn_rsof_prev <= #TCQ 1'b0; + trn_rrem_prev <= #TCQ {REM_WIDTH{1'b0}}; + trn_rsrc_rdy_prev <= #TCQ 1'b0; + trn_rbar_hit_prev <= #TCQ 7'h00; + trn_rerrfwd_prev <= #TCQ 1'b0; + trn_recrc_err_prev <= #TCQ 1'b0; + trn_reof_prev <= #TCQ 1'b0; + trn_rsrc_dsc_prev <= #TCQ 1'b0; + end + else begin + // prev buffer works by checking trn_rdst_rdy. When trn_rdst_rdy is + // asserted, a new value is present on the interface. + if(trn_rdst_rdy) begin + trn_rd_prev <= #TCQ trn_rd_DW_swapped; + trn_rsof_prev <= #TCQ trn_rsof; + trn_rrem_prev <= #TCQ trn_rrem; + trn_rbar_hit_prev <= #TCQ trn_rbar_hit; + trn_rerrfwd_prev <= #TCQ trn_rerrfwd; + trn_recrc_err_prev <= #TCQ trn_recrc_err; + trn_rsrc_rdy_prev <= #TCQ rsrc_rdy_filtered; + trn_reof_prev <= #TCQ trn_reof; + trn_rsrc_dsc_prev <= #TCQ trn_rsrc_dsc || dsc_flag; + end + end +end + + +//----------------------------------------------------------------------------// +// Create TDATA // +//----------------------------------------------------------------------------// + +// Convert TRN data format to AXI data format. AXI is DWORD swapped from TRN +// 128-bit: 64-bit: 32-bit: +// TRN DW0 maps to AXI DW3 TRN DW0 maps to AXI DW1 TNR DW0 maps to AXI DW0 +// TRN DW1 maps to AXI DW2 TRN DW1 maps to AXI DW0 +// TRN DW2 maps to AXI DW1 +// TRN DW3 maps to AXI DW0 +generate + if(C_DATA_WIDTH == 128) begin : rd_DW_swap_128 + assign trn_rd_DW_swapped = {trn_rd[31:0], + trn_rd[63:32], + trn_rd[95:64], + trn_rd[127:96]}; + end + else if(C_DATA_WIDTH == 64) begin : rd_DW_swap_64 + assign trn_rd_DW_swapped = {trn_rd[31:0], trn_rd[63:32]}; + end + else begin : rd_DW_swap_32 + assign trn_rd_DW_swapped = trn_rd; + end +endgenerate + + +// Create special buffer which locks in the proper value of TDATA depending +// on whether the user is throttling or not. This buffer has three states: +// +// HOLD state: TDATA maintains its current value +// - the user has throttled the PCIe block +// PREVIOUS state: the buffer provides the previous value on trn_rd +// - the user has finished throttling, and is a little behind +// the PCIe block +// CURRENT state: the buffer passes the current value on trn_rd +// - the user is caught up and ready to receive the latest +// data from the PCIe block +always @(posedge user_clk) begin + if(user_rst) begin + m_axis_rx_tdata <= #TCQ {C_DATA_WIDTH{1'b0}}; + end + else begin + if(!data_hold) begin + // PREVIOUS state + if(data_prev) begin + m_axis_rx_tdata <= #TCQ trn_rd_prev; + end + + // CURRENT state + else begin + m_axis_rx_tdata <= #TCQ trn_rd_DW_swapped; + end + end + // else HOLD state + end +end + +// Logic to instruct pipeline to hold its value +assign data_hold = (!m_axis_rx_tready && m_axis_rx_tvalid); + +// Logic to instruct pipeline to use previous bus values. Always use previous +// value after holding a value. +always @(posedge user_clk) begin + if(user_rst) begin + data_prev <= #TCQ 1'b0; + end + else begin + data_prev <= #TCQ data_hold; + end +end + + +//----------------------------------------------------------------------------// +// Create TVALID, TLAST, tkeep, TUSER // +// ----------------------------------- // +// Use the same strategy for these signals as for TDATA, except here we need // +// an extra provision for null packets. // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + m_axis_rx_tvalid <= #TCQ 1'b0; + reg_tlast <= #TCQ 1'b0; + reg_tkeep <= #TCQ {KEEP_WIDTH{1'b1}}; + m_axis_rx_tuser <= #TCQ 22'h0; + end + else begin + if(!data_hold) begin + // If in a null packet, use null generated value + if(null_mux_sel) begin + m_axis_rx_tvalid <= #TCQ null_rx_tvalid; + reg_tlast <= #TCQ null_rx_tlast; + reg_tkeep <= #TCQ null_rx_tkeep; + m_axis_rx_tuser <= #TCQ {null_is_eof, 17'h0000}; + end + + // PREVIOUS state + else if(data_prev) begin + m_axis_rx_tvalid <= #TCQ (trn_rsrc_rdy_prev || dsc_flag); + reg_tlast <= #TCQ trn_reof_prev; + reg_tkeep <= #TCQ tkeep_prev; + m_axis_rx_tuser <= #TCQ {is_eof_prev, // TUSER bits [21:17] + 2'b00, // TUSER bits [16:15] + is_sof_prev, // TUSER bits [14:10] + 1'b0, // TUSER bit [9] + trn_rbar_hit_prev, // TUSER bits [8:2] + trn_rerrfwd_prev, // TUSER bit [1] + trn_recrc_err_prev}; // TUSER bit [0] + end + + // CURRENT state + else begin + m_axis_rx_tvalid <= #TCQ (rsrc_rdy_filtered || dsc_flag); + reg_tlast <= #TCQ trn_reof; + reg_tkeep <= #TCQ tkeep; + m_axis_rx_tuser <= #TCQ {is_eof, // TUSER bits [21:17] + 2'b00, // TUSER bits [16:15] + is_sof, // TUSER bits [14:10] + 1'b0, // TUSER bit [9] + trn_rbar_hit, // TUSER bits [8:2] + trn_rerrfwd, // TUSER bit [1] + trn_recrc_err}; // TUSER bit [0] + end + end + // else HOLD state + end +end + +// Hook up TLAST and tkeep depending on interface width +generate + // For 128-bit interface, don't pass TLAST and tkeep to user (is_eof and + // is_data passed to user instead). reg_tlast is still used internally. + if(C_DATA_WIDTH == 128) begin : tlast_tkeep_hookup_128 + assign m_axis_rx_tlast = 1'b0; + assign m_axis_rx_tkeep = {KEEP_WIDTH{1'b1}}; + end + + // For 64/32-bit interface, pass TLAST to user. + else begin : tlast_tkeep_hookup_64_32 + assign m_axis_rx_tlast = reg_tlast; + assign m_axis_rx_tkeep = reg_tkeep; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Create tkeep // +// ------------ // +// Convert RREM to STRB. Here, we are converting the encoding method for the // +// location of the EOF from TRN flavor (rrem) to AXI (tkeep). // +// // +// NOTE: for each configuration, we need two values of tkeep, the current and // +// previous values. The need for these two values is described below. // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : rrem_to_tkeep_128 + // TLAST and tkeep not used in 128-bit interface. is_sof and is_eof used + // instead. + assign tkeep = 16'h0000; + assign tkeep_prev = 16'h0000; + end + else if(C_DATA_WIDTH == 64) begin : rrem_to_tkeep_64 + // 64-bit interface: contains 2 DWORDs per cycle, for a total of 8 bytes + // - tkeep has only two possible values here, 0xFF or 0x0F + assign tkeep = trn_rrem ? 8'hFF : 8'h0F; + assign tkeep_prev = trn_rrem_prev ? 8'hFF : 8'h0F; + end + else begin : rrem_to_tkeep_32 + // 32-bit interface: contains 1 DWORD per cycle, for a total of 4 bytes + // - tkeep is always 0xF in this case, due to the nature of the PCIe block + assign tkeep = 4'hF; + assign tkeep_prev = 4'hF; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Create is_sof // +// ------------- // +// is_sof is a signal to the user indicating the location of SOF in TDATA . // +// Due to inherent 64-bit alignment of packets from the block, the only // +// possible values are: // +// Value Valid data widths // +// 5'b11000 (sof @ byte 8) 128 // +// 5'b10000 (sof @ byte 0) 128, 64, 32 // +// 5'b00000 (sof not present) 128, 64, 32 // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : is_sof_128 + assign is_sof = {(trn_rsof && !trn_rsrc_dsc), // bit 4: enable + (trn_rsof && !trn_rrem[1]), // bit 3: sof @ byte 8? + 3'b000}; // bit 2-0: hardwired 0 + + assign is_sof_prev = {(trn_rsof_prev && !trn_rsrc_dsc_prev), // bit 4 + (trn_rsof_prev && !trn_rrem_prev[1]), // bit 3 + 3'b000}; // bit 2-0 + end + else begin : is_sof_64_32 + assign is_sof = {(trn_rsof && !trn_rsrc_dsc), // bit 4: enable + 4'b0000}; // bit 3-0: hardwired 0 + + assign is_sof_prev = {(trn_rsof_prev && !trn_rsrc_dsc_prev), // bit 4 + 4'b0000}; // bit 3-0 + end +endgenerate + + +//----------------------------------------------------------------------------// +// Create is_eof // +// ------------- // +// is_eof is a signal to the user indicating the location of EOF in TDATA . // +// Due to DWORD granularity of packets from the block, the only // +// possible values are: // +// Value Valid data widths // +// 5'b11111 (eof @ byte 15) 128 // +// 5'b11011 (eof @ byte 11) 128 // +// 5'b10111 (eof @ byte 7) 128, 64 // +// 5'b10011 (eof @ byte 3)` 128, 64, 32 // +// 5'b00011 (eof not present) 128, 64, 32 // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : is_eof_128 + assign is_eof = {trn_reof, // bit 4: enable + trn_rrem, // bit 3-2: encoded eof loc rom block + 2'b11}; // bit 1-0: hardwired 1 + + assign is_eof_prev = {trn_reof_prev, // bit 4: enable + trn_rrem_prev, // bit 3-2: encoded eof loc from block + 2'b11}; // bit 1-0: hardwired 1 + end + else if(C_DATA_WIDTH == 64) begin : is_eof_64 + assign is_eof = {trn_reof, // bit 4: enable + 1'b0, // bit 3: hardwired 0 + trn_rrem, // bit 2: encoded eof loc from block + 2'b11}; // bit 1-0: hardwired 1 + + assign is_eof_prev = {trn_reof_prev, // bit 4: enable + 1'b0, // bit 3: hardwired 0 + trn_rrem_prev, // bit 2: encoded eof loc from block + 2'b11}; // bit 1-0: hardwired 1 + end + else begin : is_eof_32 + assign is_eof = {trn_reof, // bit 4: enable + 4'b0011}; // bit 3-0: hardwired to byte 3 + + assign is_eof_prev = {trn_reof_prev, // bit 4: enable + 4'b0011}; // bit 3-0: hardwired to byte 3 + end +endgenerate + + + +//----------------------------------------------------------------------------// +// Create trn_rdst_rdy // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + trn_rdst_rdy <= #TCQ 1'b0; + end + else begin + // If in a null packet, use null generated value + if(null_mux_sel && m_axis_rx_tready) begin + trn_rdst_rdy <= #TCQ null_rdst_rdy; + end + + // If a discontinue needs to be serviced, throttle the block until we are + // ready to pad out the packet. + else if(dsc_flag) begin + trn_rdst_rdy <= #TCQ 1'b0; + end + + // If in a packet, pass user back-pressure directly to block + else if(m_axis_rx_tvalid) begin + trn_rdst_rdy <= #TCQ m_axis_rx_tready; + end + + // If idle, default to no back-pressure. We need to default to the + // "ready to accept data" state to make sure we catch the first + // clock of data of a new packet. + else begin + trn_rdst_rdy <= #TCQ 1'b1; + end + end +end + +//----------------------------------------------------------------------------// +// Create null_mux_sel // +// null_mux_sel is the signal used to detect a discontinue situation and // +// mux in the null packet generated in rx_null_gen. Only mux in null data // +// when not at the beginningof a packet. SOF discontinues do not require // +// padding, as the whole packet is simply squashed instead. // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + null_mux_sel <= #TCQ 1'b0; + end + else begin + // NULL packet done + if(null_mux_sel && null_rx_tlast && m_axis_rx_tready) + begin + null_mux_sel <= #TCQ 1'b0; + end + + // Discontinue detected and we're in packet, so switch to NULL packet + else if(dsc_flag && !data_hold) begin + null_mux_sel <= #TCQ 1'b1; + end + end +end + + +//----------------------------------------------------------------------------// +// Create discontinue tracking signals // +//----------------------------------------------------------------------------// +// Create signal trn_in_packet, which is needed to validate trn_rsrc_dsc. We +// should ignore trn_rsrc_dsc when it's asserted out-of-packet. +always @(posedge user_clk) begin + if(user_rst) begin + trn_in_packet <= #TCQ 1'b0; + end + else begin + if(trn_rsof && !trn_reof && rsrc_rdy_filtered && trn_rdst_rdy) + begin + trn_in_packet <= #TCQ 1'b1; + end + else if(trn_rsrc_dsc) begin + trn_in_packet <= #TCQ 1'b0; + end + else if(trn_reof && !trn_rsof && trn_rsrc_rdy && trn_rdst_rdy) begin + trn_in_packet <= #TCQ 1'b0; + end + end +end + + +// Create dsc_flag, which identifies and stores mid-packet discontinues that +// require null packet padding. This signal is edge sensitive to trn_rsrc_dsc, +// to make sure we don't service the same dsc twice in the event that +// trn_rsrc_dsc stays asserted for longer than it takes to pad out the packet. +assign dsc_detect = trn_rsrc_dsc && !trn_rsrc_dsc_d && trn_in_packet && + (!trn_rsof || trn_reof) && !(trn_rdst_rdy && trn_reof); + +always @(posedge user_clk) begin + if(user_rst) begin + reg_dsc_detect <= #TCQ 1'b0; + trn_rsrc_dsc_d <= #TCQ 1'b0; + end + else begin + if(dsc_detect) begin + reg_dsc_detect <= #TCQ 1'b1; + end + else if(null_mux_sel) begin + reg_dsc_detect <= #TCQ 1'b0; + end + + trn_rsrc_dsc_d <= #TCQ trn_rsrc_dsc; + end +end + +assign dsc_flag = dsc_detect || reg_dsc_detect; + + + +//----------------------------------------------------------------------------// +// Create np_counter (V6 128-bit only). This counter tells the V6 128-bit // +// interface core how many NP packets have left the RX pipeline. The V6 // +// 128-bit interface uses this count to perform rnp_ok modulation. // +//----------------------------------------------------------------------------// +generate + if(C_FAMILY == "V6" && C_DATA_WIDTH == 128) begin : np_cntr_to_128_enabled + reg [2:0] reg_np_counter; + + // Look for NP packets beginning on lower (i.e. unaligned) start + wire mrd_lower = (!(|m_axis_rx_tdata[92:88]) && !m_axis_rx_tdata[94]); + wire mrd_lk_lower = (m_axis_rx_tdata[92:88] == 5'b00001); + wire io_rdwr_lower = (m_axis_rx_tdata[92:88] == 5'b00010); + wire cfg_rdwr_lower = (m_axis_rx_tdata[92:89] == 4'b0010); + wire atomic_lower = ((&m_axis_rx_tdata[91:90]) && m_axis_rx_tdata[94]); + + wire np_pkt_lower = (mrd_lower || + mrd_lk_lower || + io_rdwr_lower || + cfg_rdwr_lower || + atomic_lower) && m_axis_rx_tuser[13]; + + // Look for NP packets beginning on upper (i.e. aligned) start + wire mrd_upper = (!(|m_axis_rx_tdata[28:24]) && !m_axis_rx_tdata[30]); + wire mrd_lk_upper = (m_axis_rx_tdata[28:24] == 5'b00001); + wire io_rdwr_upper = (m_axis_rx_tdata[28:24] == 5'b00010); + wire cfg_rdwr_upper = (m_axis_rx_tdata[28:25] == 4'b0010); + wire atomic_upper = ((&m_axis_rx_tdata[27:26]) && m_axis_rx_tdata[30]); + + wire np_pkt_upper = (mrd_upper || + mrd_lk_upper || + io_rdwr_upper || + cfg_rdwr_upper || + atomic_upper) && !m_axis_rx_tuser[13]; + + wire pkt_accepted = + m_axis_rx_tuser[14] && m_axis_rx_tready && m_axis_rx_tvalid; + + // Increment counter whenever an NP packet leaves the RX pipeline + always @(posedge user_clk) begin + if (user_rst) begin + reg_np_counter <= #TCQ 0; + end + else begin + if((np_pkt_lower || np_pkt_upper) && pkt_accepted) + begin + reg_np_counter <= #TCQ reg_np_counter + 3'h1; + end + end + end + + assign np_counter = reg_np_counter; + end + else begin : np_cntr_to_128_disabled + assign np_counter = 3'h0; + end +endgenerate + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_top.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_top.v new file mode 100644 index 0000000000000000000000000000000000000000..410b76f8f42ba5bcaec8c4ff749b16aefecae003 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_top.v @@ -0,0 +1,283 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_top.v +// Version : 3.3 +// // +// Description: // +// TRN/AXI4-S Bridge top level module. Instantiates RX and TX modules. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_top #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_FAMILY = "X7", // Targeted FPGA family + parameter C_ROOT_PORT = "FALSE", // PCIe block is in root port mode + parameter C_PM_PRIORITY = "FALSE", // Disable TX packet boundary thrtl + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, // trem/rrem width + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + //---------------------------------------------// + // User Design I/O // + //---------------------------------------------// + + // AXI TX + //----------- + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, // TX data from user + input s_axis_tx_tvalid, // TX data is valid + output s_axis_tx_tready, // TX ready for data + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, // TX strobe byte enables + input s_axis_tx_tlast, // TX data is last + input [3:0] s_axis_tx_tuser, // TX user signals + + // AXI RX + //----------- + output [C_DATA_WIDTH-1:0] m_axis_rx_tdata, // RX data to user + output m_axis_rx_tvalid, // RX data is valid + input m_axis_rx_tready, // RX ready for data + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, // RX strobe byte enables + output m_axis_rx_tlast, // RX data is last + output [21:0] m_axis_rx_tuser, // RX user signals + + // User Misc. + //----------- + input user_turnoff_ok, // Turnoff OK from user + input user_tcfg_gnt, // Send cfg OK from user + + //---------------------------------------------// + // PCIe Block I/O // + //---------------------------------------------// + + // TRN TX + //----------- + output [C_DATA_WIDTH-1:0] trn_td, // TX data from block + output trn_tsof, // TX start of packet + output trn_teof, // TX end of packet + output trn_tsrc_rdy, // TX source ready + input trn_tdst_rdy, // TX destination ready + output trn_tsrc_dsc, // TX source discontinue + output [REM_WIDTH-1:0] trn_trem, // TX remainder + output trn_terrfwd, // TX error forward + output trn_tstr, // TX streaming enable + input [5:0] trn_tbuf_av, // TX buffers available + output trn_tecrc_gen, // TX ECRC generate + + // TRN RX + //----------- + input [127:0] trn_rd, // RX data from block + input trn_rsof, // RX start of packet + input trn_reof, // RX end of packet + input trn_rsrc_rdy, // RX source ready + output trn_rdst_rdy, // RX destination ready + input trn_rsrc_dsc, // RX source discontinue + input [1:0] trn_rrem, // RX remainder + input trn_rerrfwd, // RX error forward + input [6:0] trn_rbar_hit, // RX BAR hit + input trn_recrc_err, // RX ECRC error + + // TRN Misc. + //----------- + input trn_tcfg_req, // TX config request + output trn_tcfg_gnt, // RX config grant + input trn_lnk_up, // PCIe link up + + // 7 Series/Virtex6 PM + //----------- + input [2:0] cfg_pcie_link_state, // Encoded PCIe link state + + // Virtex6 PM + //----------- + input cfg_pm_send_pme_to, // PM send PME turnoff msg + input [1:0] cfg_pmcsr_powerstate, // PMCSR power state + input [31:0] trn_rdllp_data, // RX DLLP data + input trn_rdllp_src_rdy, // RX DLLP source ready + + // Virtex6/Spartan6 PM + //----------- + input cfg_to_turnoff, // Turnoff request + output cfg_turnoff_ok, // Turnoff grant + + // System + //----------- + output [2:0] np_counter, // Non-posted counter + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +//---------------------------------------------// +// RX Data Pipeline // +//---------------------------------------------// + +pcie_7x_0_axi_basic_rx #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .C_FAMILY( C_FAMILY ), + + .TCQ( TCQ ), + .REM_WIDTH( REM_WIDTH ), + .KEEP_WIDTH( KEEP_WIDTH ) +) rx_inst ( + + // Outgoing AXI TX + //----------- + .m_axis_rx_tdata( m_axis_rx_tdata ), + .m_axis_rx_tvalid( m_axis_rx_tvalid ), + .m_axis_rx_tready( m_axis_rx_tready ), + .m_axis_rx_tkeep( m_axis_rx_tkeep ), + .m_axis_rx_tlast( m_axis_rx_tlast ), + .m_axis_rx_tuser( m_axis_rx_tuser ), + + // Incoming TRN RX + //----------- + .trn_rd( trn_rd[C_DATA_WIDTH-1:0] ), + .trn_rsof( trn_rsof ), + .trn_reof( trn_reof ), + .trn_rsrc_rdy( trn_rsrc_rdy ), + .trn_rdst_rdy( trn_rdst_rdy ), + .trn_rsrc_dsc( trn_rsrc_dsc ), + .trn_rrem( trn_rrem[REM_WIDTH-1:0] ), + .trn_rerrfwd( trn_rerrfwd ), + .trn_rbar_hit( trn_rbar_hit ), + .trn_recrc_err( trn_recrc_err ), + + // System + //----------- + .np_counter( np_counter ), + .user_clk( user_clk ), + .user_rst( user_rst ) +); + + + +//---------------------------------------------// +// TX Data Pipeline // +//---------------------------------------------// + +pcie_7x_0_axi_basic_tx #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .C_FAMILY( C_FAMILY ), + .C_ROOT_PORT( C_ROOT_PORT ), + .C_PM_PRIORITY( C_PM_PRIORITY ), + + .TCQ( TCQ ), + .REM_WIDTH( REM_WIDTH ), + .KEEP_WIDTH( KEEP_WIDTH ) +) tx_inst ( + + // Incoming AXI RX + //----------- + .s_axis_tx_tdata( s_axis_tx_tdata ), + .s_axis_tx_tvalid( s_axis_tx_tvalid ), + .s_axis_tx_tready( s_axis_tx_tready ), + .s_axis_tx_tkeep( s_axis_tx_tkeep ), + .s_axis_tx_tlast( s_axis_tx_tlast ), + .s_axis_tx_tuser( s_axis_tx_tuser ), + + // User Misc. + //----------- + .user_turnoff_ok( user_turnoff_ok ), + .user_tcfg_gnt( user_tcfg_gnt ), + + // Outgoing TRN TX + //----------- + .trn_td( trn_td ), + .trn_tsof( trn_tsof ), + .trn_teof( trn_teof ), + .trn_tsrc_rdy( trn_tsrc_rdy ), + .trn_tdst_rdy( trn_tdst_rdy ), + .trn_tsrc_dsc( trn_tsrc_dsc ), + .trn_trem( trn_trem ), + .trn_terrfwd( trn_terrfwd ), + .trn_tstr( trn_tstr ), + .trn_tbuf_av( trn_tbuf_av ), + .trn_tecrc_gen( trn_tecrc_gen ), + + // TRN Misc. + //----------- + .trn_tcfg_req( trn_tcfg_req ), + .trn_tcfg_gnt( trn_tcfg_gnt ), + .trn_lnk_up( trn_lnk_up ), + + // 7 Series/Virtex6 PM + //----------- + .cfg_pcie_link_state( cfg_pcie_link_state ), + + // Virtex6 PM + //----------- + .cfg_pm_send_pme_to( cfg_pm_send_pme_to ), + .cfg_pmcsr_powerstate( cfg_pmcsr_powerstate ), + .trn_rdllp_data( trn_rdllp_data ), + .trn_rdllp_src_rdy( trn_rdllp_src_rdy ), + + // Spartan6 PM + //----------- + .cfg_to_turnoff( cfg_to_turnoff ), + .cfg_turnoff_ok( cfg_turnoff_ok ), + + // System + //----------- + .user_clk( user_clk ), + .user_rst( user_rst ) +); + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_tx.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_tx.v new file mode 100644 index 0000000000000000000000000000000000000000..45807c233733eb98ad6907b63c72d7dc87ace6d3 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_tx.v @@ -0,0 +1,261 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_tx.v +// Version : 3.3 +// // +// Description: // +// AXI to TRN TX module. Instantiates pipeline and throttle control TX // +// submodules. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_tx // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_tx #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_FAMILY = "X7", // Targeted FPGA family + parameter C_ROOT_PORT = "FALSE", // PCIe block is in root port mode + parameter C_PM_PRIORITY = "FALSE", // Disable TX packet boundary thrtl + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, // trem/rrem width + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + //---------------------------------------------// + // User Design I/O // + //---------------------------------------------// + + // AXI TX + //----------- + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, // TX data from user + input s_axis_tx_tvalid, // TX data is valid + output s_axis_tx_tready, // TX ready for data + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, // TX strobe byte enables + input s_axis_tx_tlast, // TX data is last + input [3:0] s_axis_tx_tuser, // TX user signals + + // User Misc. + //----------- + input user_turnoff_ok, // Turnoff OK from user + input user_tcfg_gnt, // Send cfg OK from user + + //---------------------------------------------// + // PCIe Block I/O // + //---------------------------------------------// + + // TRN TX + //----------- + output [C_DATA_WIDTH-1:0] trn_td, // TX data from block + output trn_tsof, // TX start of packet + output trn_teof, // TX end of packet + output trn_tsrc_rdy, // TX source ready + input trn_tdst_rdy, // TX destination ready + output trn_tsrc_dsc, // TX source discontinue + output [REM_WIDTH-1:0] trn_trem, // TX remainder + output trn_terrfwd, // TX error forward + output trn_tstr, // TX streaming enable + input [5:0] trn_tbuf_av, // TX buffers available + output trn_tecrc_gen, // TX ECRC generate + + // TRN Misc. + //----------- + input trn_tcfg_req, // TX config request + output trn_tcfg_gnt, // RX config grant + input trn_lnk_up, // PCIe link up + + // 7 Series/Virtex6 PM + //----------- + input [2:0] cfg_pcie_link_state, // Encoded PCIe link state + + // Virtex6 PM + //----------- + input cfg_pm_send_pme_to, // PM send PME turnoff msg + input [1:0] cfg_pmcsr_powerstate, // PMCSR power state + input [31:0] trn_rdllp_data, // RX DLLP data + input trn_rdllp_src_rdy, // RX DLLP source ready + + // Virtex6/Spartan6 PM + //----------- + input cfg_to_turnoff, // Turnoff request + output cfg_turnoff_ok, // Turnoff grant + + // System + //----------- + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +wire tready_thrtl; + +//---------------------------------------------// +// TX Data Pipeline // +//---------------------------------------------// + +pcie_7x_0_axi_basic_tx_pipeline #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .C_PM_PRIORITY( C_PM_PRIORITY ), + .TCQ( TCQ ), + + .REM_WIDTH( REM_WIDTH ), + .KEEP_WIDTH( KEEP_WIDTH ) +) tx_pipeline_inst ( + + // Incoming AXI RX + //----------- + .s_axis_tx_tdata( s_axis_tx_tdata ), + .s_axis_tx_tready( s_axis_tx_tready ), + .s_axis_tx_tvalid( s_axis_tx_tvalid ), + .s_axis_tx_tkeep( s_axis_tx_tkeep ), + .s_axis_tx_tlast( s_axis_tx_tlast ), + .s_axis_tx_tuser( s_axis_tx_tuser ), + + // Outgoing TRN TX + //----------- + .trn_td( trn_td ), + .trn_tsof( trn_tsof ), + .trn_teof( trn_teof ), + .trn_tsrc_rdy( trn_tsrc_rdy ), + .trn_tdst_rdy( trn_tdst_rdy ), + .trn_tsrc_dsc( trn_tsrc_dsc ), + .trn_trem( trn_trem ), + .trn_terrfwd( trn_terrfwd ), + .trn_tstr( trn_tstr ), + .trn_tecrc_gen( trn_tecrc_gen ), + .trn_lnk_up( trn_lnk_up ), + + // System + //----------- + .tready_thrtl( tready_thrtl ), + .user_clk( user_clk ), + .user_rst( user_rst ) +); + + +//---------------------------------------------// +// TX Throttle Controller // +//---------------------------------------------// + +generate + if(C_PM_PRIORITY == "FALSE") begin : thrtl_ctl_enabled +pcie_7x_0_axi_basic_tx_thrtl_ctl #( + .C_DATA_WIDTH( C_DATA_WIDTH ), + .C_FAMILY( C_FAMILY ), + .C_ROOT_PORT( C_ROOT_PORT ), + .TCQ( TCQ ) + + ) tx_thrl_ctl_inst ( + + // Outgoing AXI TX + //----------- + .s_axis_tx_tdata( s_axis_tx_tdata ), + .s_axis_tx_tvalid( s_axis_tx_tvalid ), + .s_axis_tx_tuser( s_axis_tx_tuser ), + .s_axis_tx_tlast( s_axis_tx_tlast ), + + // User Misc. + //----------- + .user_turnoff_ok( user_turnoff_ok ), + .user_tcfg_gnt( user_tcfg_gnt ), + + // Incoming TRN RX + //----------- + .trn_tbuf_av( trn_tbuf_av ), + .trn_tdst_rdy( trn_tdst_rdy ), + + // TRN Misc. + //----------- + .trn_tcfg_req( trn_tcfg_req ), + .trn_tcfg_gnt( trn_tcfg_gnt ), + .trn_lnk_up( trn_lnk_up ), + + // 7 Seriesq/Virtex6 PM + //----------- + .cfg_pcie_link_state( cfg_pcie_link_state ), + + // Virtex6 PM + //----------- + .cfg_pm_send_pme_to( cfg_pm_send_pme_to ), + .cfg_pmcsr_powerstate( cfg_pmcsr_powerstate ), + .trn_rdllp_data( trn_rdllp_data ), + .trn_rdllp_src_rdy( trn_rdllp_src_rdy ), + + // Spartan6 PM + //----------- + .cfg_to_turnoff( cfg_to_turnoff ), + .cfg_turnoff_ok( cfg_turnoff_ok ), + + // System + //----------- + .tready_thrtl( tready_thrtl ), + .user_clk( user_clk ), + .user_rst( user_rst ) + ); + end + else begin : thrtl_ctl_disabled + assign tready_thrtl = 1'b0; + + assign cfg_turnoff_ok = user_turnoff_ok; + assign trn_tcfg_gnt = user_tcfg_gnt; + end +endgenerate + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_tx_pipeline.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_tx_pipeline.v new file mode 100644 index 0000000000000000000000000000000000000000..b9caeb66b5e5cdc4bb2f43e749a879e2c1d348ba --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_tx_pipeline.v @@ -0,0 +1,544 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_tx_pipeline.v +// Version : 3.3 +// // +// Description: // +// AXI to TRN TX pipeline. Converts transmitted data from AXI protocol to // +// TRN. // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_tx // +// axi_basic_tx_pipeline // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_tx_pipeline #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_PM_PRIORITY = "FALSE", // Disable TX packet boundary thrtl + parameter TCQ = 1, // Clock to Q time + + // Do not override parameters below this line + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, // trem/rrem width + parameter KEEP_WIDTH = C_DATA_WIDTH / 8 // KEEP width + ) ( + //---------------------------------------------// + // User Design I/O // + //---------------------------------------------// + + // AXI TX + //----------- + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, // TX data from user + input s_axis_tx_tvalid, // TX data is valid + output s_axis_tx_tready, // TX ready for data + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, // TX strobe byte enables + input s_axis_tx_tlast, // TX data is last + input [3:0] s_axis_tx_tuser, // TX user signals + + //---------------------------------------------// + // PCIe Block I/O // + //---------------------------------------------// + + // TRN TX + //----------- + output [C_DATA_WIDTH-1:0] trn_td, // TX data from block + output trn_tsof, // TX start of packet + output trn_teof, // TX end of packet + output trn_tsrc_rdy, // TX source ready + input trn_tdst_rdy, // TX destination ready + output trn_tsrc_dsc, // TX source discontinue + output [REM_WIDTH-1:0] trn_trem, // TX remainder + output trn_terrfwd, // TX error forward + output trn_tstr, // TX streaming enable + output trn_tecrc_gen, // TX ECRC generate + input trn_lnk_up, // PCIe link up + + // System + //----------- + input tready_thrtl, // TREADY from thrtl ctl + input user_clk, // user clock from block + input user_rst // user reset from block +); + + +// Input register stage +reg [C_DATA_WIDTH-1:0] reg_tdata; +reg reg_tvalid; +reg [KEEP_WIDTH-1:0] reg_tkeep; +reg [3:0] reg_tuser; +reg reg_tlast; +reg reg_tready; + +// Pipeline utility signals +reg trn_in_packet; +reg axi_in_packet; +reg flush_axi; +wire disable_trn; +reg reg_disable_trn; + +wire axi_beat_live = s_axis_tx_tvalid && s_axis_tx_tready; +wire axi_end_packet = axi_beat_live && s_axis_tx_tlast; + + +//----------------------------------------------------------------------------// +// Convert TRN data format to AXI data format. AXI is DWORD swapped from TRN. // +// 128-bit: 64-bit: 32-bit: // +// TRN DW0 maps to AXI DW3 TRN DW0 maps to AXI DW1 TNR DW0 maps to AXI DW0 // +// TRN DW1 maps to AXI DW2 TRN DW1 maps to AXI DW0 // +// TRN DW2 maps to AXI DW1 // +// TRN DW3 maps to AXI DW0 // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : td_DW_swap_128 + assign trn_td = {reg_tdata[31:0], + reg_tdata[63:32], + reg_tdata[95:64], + reg_tdata[127:96]}; + end + else if(C_DATA_WIDTH == 64) begin : td_DW_swap_64 + assign trn_td = {reg_tdata[31:0], reg_tdata[63:32]}; + end + else begin : td_DW_swap_32 + assign trn_td = reg_tdata; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Create trn_tsof. If we're not currently in a packet and TVALID goes high, // +// assert TSOF. // +//----------------------------------------------------------------------------// +assign trn_tsof = reg_tvalid && !trn_in_packet; + + +//----------------------------------------------------------------------------// +// Create trn_in_packet. This signal tracks if the TRN interface is currently // +// in the middle of a packet, which is needed to generate trn_tsof // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + trn_in_packet <= #TCQ 1'b0; + end + else begin + if(trn_tsof && trn_tsrc_rdy && trn_tdst_rdy && !trn_teof) begin + trn_in_packet <= #TCQ 1'b1; + end + else if((trn_in_packet && trn_teof && trn_tsrc_rdy) || !trn_lnk_up) begin + trn_in_packet <= #TCQ 1'b0; + end + end +end + + +//----------------------------------------------------------------------------// +// Create axi_in_packet. This signal tracks if the AXI interface is currently // +// in the middle of a packet, which is needed in case the link goes down. // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + axi_in_packet <= #TCQ 1'b0; + end + else begin + if(axi_beat_live && !s_axis_tx_tlast) begin + axi_in_packet <= #TCQ 1'b1; + end + else if(axi_beat_live) begin + axi_in_packet <= #TCQ 1'b0; + end + end +end + + +//----------------------------------------------------------------------------// +// Create disable_trn. This signal asserts when the link goes down and // +// triggers the deassertiong of trn_tsrc_rdy. The deassertion of disable_trn // +// depends on C_PM_PRIORITY, as described below. // +//----------------------------------------------------------------------------// +generate + // In the C_PM_PRIORITY pipeline, we disable the TRN interfacefrom the time + // the link goes down until the the AXI interface is ready to accept packets + // again (via assertion of TREADY). By waiting for TREADY, we allow the + // previous value buffer to fill, so we're ready for any throttling by the + // user or the block. + if(C_PM_PRIORITY == "TRUE") begin : pm_priority_trn_flush + always @(posedge user_clk) begin + if(user_rst) begin + reg_disable_trn <= #TCQ 1'b1; + end + else begin + // When the link goes down, disable the TRN interface. + if(!trn_lnk_up) + begin + reg_disable_trn <= #TCQ 1'b1; + end + + // When the link comes back up and the AXI interface is ready, we can + // release the pipeline and return to normal operation. + else if(!flush_axi && s_axis_tx_tready) begin + reg_disable_trn <= #TCQ 1'b0; + end + end + end + + assign disable_trn = reg_disable_trn; + end + + // In the throttle-controlled pipeline, we don't have a previous value buffer. + // The throttle control mechanism handles TREADY, so all we need to do is + // detect when the link goes down and disable the TRN interface until the link + // comes back up and the AXI interface is finished flushing any packets. + else begin : thrtl_ctl_trn_flush + always @(posedge user_clk) begin + if(user_rst) begin + reg_disable_trn <= #TCQ 1'b0; + end + else begin + // If the link is down and AXI is in packet, disable TRN and look for + // the end of the packet + if(axi_in_packet && !trn_lnk_up && !axi_end_packet) + begin + reg_disable_trn <= #TCQ 1'b1; + end + + // AXI packet is ending, so we're done flushing + else if(axi_end_packet) begin + reg_disable_trn <= #TCQ 1'b0; + end + end + end + + // Disable the TRN interface if link is down or we're still flushing the AXI + // interface. + assign disable_trn = reg_disable_trn || !trn_lnk_up; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Convert STRB to RREM. Here, we are converting the encoding method for the // +// location of the EOF from AXI (tkeep) to TRN flavor (rrem). // +//----------------------------------------------------------------------------// +generate + if(C_DATA_WIDTH == 128) begin : tkeep_to_trem_128 + //---------------------------------------// + // Conversion table: // + // trem | tkeep // + // [1] [0] | [15:12] [11:8] [7:4] [3:0] // + // ------------------------------------- // + // 1 1 | D3 D2 D1 D0 // + // 1 0 | -- D2 D1 D0 // + // 0 1 | -- -- D1 D0 // + // 0 0 | -- -- -- D0 // + //---------------------------------------// + + wire axi_DW_1 = reg_tkeep[7]; + wire axi_DW_2 = reg_tkeep[11]; + wire axi_DW_3 = reg_tkeep[15]; + assign trn_trem[1] = axi_DW_2; + assign trn_trem[0] = axi_DW_3 || (axi_DW_1 && !axi_DW_2); + end + else if(C_DATA_WIDTH == 64) begin : tkeep_to_trem_64 + assign trn_trem = reg_tkeep[7]; + end + else begin : tkeep_to_trem_32 + assign trn_trem = 1'b0; + end +endgenerate + + +//----------------------------------------------------------------------------// +// Create remaining TRN signals // +//----------------------------------------------------------------------------// +assign trn_teof = reg_tlast; +assign trn_tecrc_gen = reg_tuser[0]; +assign trn_terrfwd = reg_tuser[1]; +assign trn_tstr = reg_tuser[2]; +assign trn_tsrc_dsc = reg_tuser[3]; + + +//----------------------------------------------------------------------------// +// Pipeline stage // +//----------------------------------------------------------------------------// +// We need one of two approaches for the pipeline stage depending on the +// C_PM_PRIORITY parameter. +generate + reg reg_tsrc_rdy; + + // If set to FALSE, that means the user wants to use the TX packet boundary + // throttling feature. Since all Block throttling will now be predicted, we + // can use a simple straight-through pipeline. + if(C_PM_PRIORITY == "FALSE") begin : throttle_ctl_pipeline + always @(posedge user_clk) begin + if(user_rst) begin + reg_tdata <= #TCQ {C_DATA_WIDTH{1'b0}}; + reg_tvalid <= #TCQ 1'b0; + reg_tkeep <= #TCQ {KEEP_WIDTH{1'b0}}; + reg_tlast <= #TCQ 1'b0; + reg_tuser <= #TCQ 4'h0; + reg_tsrc_rdy <= #TCQ 1'b0; + end + else begin + reg_tdata <= #TCQ s_axis_tx_tdata; + reg_tvalid <= #TCQ s_axis_tx_tvalid; + reg_tkeep <= #TCQ s_axis_tx_tkeep; + reg_tlast <= #TCQ s_axis_tx_tlast; + reg_tuser <= #TCQ s_axis_tx_tuser; + + // Hold trn_tsrc_rdy low when flushing a packet. + reg_tsrc_rdy <= #TCQ axi_beat_live && !disable_trn; + end + end + + assign trn_tsrc_rdy = reg_tsrc_rdy; + + // With TX packet boundary throttling, TREADY is pipelined in + // axi_basic_tx_thrtl_ctl and wired through here. + assign s_axis_tx_tready = tready_thrtl; + end + + //**************************************************************************// + + // If C_PM_PRIORITY is set to TRUE, that means the user prefers to have all PM + // functionality intact isntead of TX packet boundary throttling. Now the + // Block could back-pressure at any time, which creates the standard problem + // of potential data loss due to the handshaking latency. Here we need a + // previous value buffer, just like the RX data path. + else begin : pm_prioity_pipeline + reg [C_DATA_WIDTH-1:0] tdata_prev; + reg tvalid_prev; + reg [KEEP_WIDTH-1:0] tkeep_prev; + reg tlast_prev; + reg [3:0] tuser_prev; + reg reg_tdst_rdy; + + wire data_hold; + reg data_prev; + + + //------------------------------------------------------------------------// + // Previous value buffer // + // --------------------- // + // We are inserting a pipeline stage in between AXI and TRN, which causes // + // some issues with handshaking signals trn_tsrc_rdy/s_axis_tx_tready. // + // The added cycle of latency in the path causes the Block to fall behind // + // the AXI interface whenever it throttles. // + // // + // To avoid loss of data, we must keep the previous value of all // + // s_axis_tx_* signals in case the Block throttles. // + //------------------------------------------------------------------------// + always @(posedge user_clk) begin + if(user_rst) begin + tdata_prev <= #TCQ {C_DATA_WIDTH{1'b0}}; + tvalid_prev <= #TCQ 1'b0; + tkeep_prev <= #TCQ {KEEP_WIDTH{1'b0}}; + tlast_prev <= #TCQ 1'b0; + tuser_prev <= #TCQ 4'h 0; + end + else begin + // prev buffer works by checking s_axis_tx_tready. When + // s_axis_tx_tready is asserted, a new value is present on the + // interface. + if(!s_axis_tx_tready) begin + tdata_prev <= #TCQ tdata_prev; + tvalid_prev <= #TCQ tvalid_prev; + tkeep_prev <= #TCQ tkeep_prev; + tlast_prev <= #TCQ tlast_prev; + tuser_prev <= #TCQ tuser_prev; + end + else begin + tdata_prev <= #TCQ s_axis_tx_tdata; + tvalid_prev <= #TCQ s_axis_tx_tvalid; + tkeep_prev <= #TCQ s_axis_tx_tkeep; + tlast_prev <= #TCQ s_axis_tx_tlast; + tuser_prev <= #TCQ s_axis_tx_tuser; + end + end + end + + // Create special buffer which locks in the proper value of TDATA depending + // on whether the user is throttling or not. This buffer has three states: + // + // HOLD state: TDATA maintains its current value + // - the Block has throttled the PCIe block + // PREVIOUS state: the buffer provides the previous value on TDATA + // - the Block has finished throttling, and is a little + // behind the user + // CURRENT state: the buffer passes the current value on TDATA + // - the Block is caught up and ready to receive the + // latest data from the user + always @(posedge user_clk) begin + if(user_rst) begin + reg_tdata <= #TCQ {C_DATA_WIDTH{1'b0}}; + reg_tvalid <= #TCQ 1'b0; + reg_tkeep <= #TCQ {KEEP_WIDTH{1'b0}}; + reg_tlast <= #TCQ 1'b0; + reg_tuser <= #TCQ 4'h0; + + reg_tdst_rdy <= #TCQ 1'b0; + end + else begin + reg_tdst_rdy <= #TCQ trn_tdst_rdy; + + if(!data_hold) begin + // PREVIOUS state + if(data_prev) begin + reg_tdata <= #TCQ tdata_prev; + reg_tvalid <= #TCQ tvalid_prev; + reg_tkeep <= #TCQ tkeep_prev; + reg_tlast <= #TCQ tlast_prev; + reg_tuser <= #TCQ tuser_prev; + end + + // CURRENT state + else begin + reg_tdata <= #TCQ s_axis_tx_tdata; + reg_tvalid <= #TCQ s_axis_tx_tvalid; + reg_tkeep <= #TCQ s_axis_tx_tkeep; + reg_tlast <= #TCQ s_axis_tx_tlast; + reg_tuser <= #TCQ s_axis_tx_tuser; + end + end + // else HOLD state + end + end + + + // Logic to instruct pipeline to hold its value + assign data_hold = trn_tsrc_rdy && !trn_tdst_rdy; + + + // Logic to instruct pipeline to use previous bus values. Always use + // previous value after holding a value. + always @(posedge user_clk) begin + if(user_rst) begin + data_prev <= #TCQ 1'b0; + end + else begin + data_prev <= #TCQ data_hold; + end + end + + + //------------------------------------------------------------------------// + // Create trn_tsrc_rdy. If we're flushing the TRN hold trn_tsrc_rdy low. // + //------------------------------------------------------------------------// + assign trn_tsrc_rdy = reg_tvalid && !disable_trn; + + + //------------------------------------------------------------------------// + // Create TREADY // + //------------------------------------------------------------------------// + always @(posedge user_clk) begin + if(user_rst) begin + reg_tready <= #TCQ 1'b0; + end + else begin + // If the link went down and we need to flush a packet in flight, hold + // TREADY high + if(flush_axi && !axi_end_packet) begin + reg_tready <= #TCQ 1'b1; + end + + // If the link is up, TREADY is as follows: + // TREADY = 1 when trn_tsrc_rdy == 0 + // - While idle, keep the pipeline primed and ready for the next + // packet + // + // TREADY = trn_tdst_rdy when trn_tsrc_rdy == 1 + // - While in packet, throttle pipeline based on state of TRN + else if(trn_lnk_up) begin + reg_tready <= #TCQ trn_tdst_rdy || !trn_tsrc_rdy; + end + + // If the link is down and we're not flushing a packet, hold TREADY low + // wait for link to come back up + else begin + reg_tready <= #TCQ 1'b0; + end + end + end + + assign s_axis_tx_tready = reg_tready; + end + + + //--------------------------------------------------------------------------// + // Create flush_axi. This signal detects if the link goes down while the // + // AXI interface is in packet. In this situation, we need to flush the // + // packet through the AXI interface and discard it. // + //--------------------------------------------------------------------------// + always @(posedge user_clk) begin + if(user_rst) begin + flush_axi <= #TCQ 1'b0; + end + else begin + // If the AXI interface is in packet and the link goes down, purge it. + if(axi_in_packet && !trn_lnk_up && !axi_end_packet) begin + flush_axi <= #TCQ 1'b1; + end + + // The packet is finished, so we're done flushing. + else if(axi_end_packet) begin + flush_axi <= #TCQ 1'b0; + end + end + end +endgenerate + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_tx_thrtl_ctl.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_tx_thrtl_ctl.v new file mode 100644 index 0000000000000000000000000000000000000000..5c6b3ea3c198685adcecb538bf0f7c312a8e0026 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_axi_basic_tx_thrtl_ctl.v @@ -0,0 +1,785 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_axi_basic_tx_thrtl_ctl.v +// Version : 3.3 +// // +// Description: // +// TX throttle controller. Anticipates back-pressure from PCIe block and // +// preemptively back-pressures user design (packet boundary throttling). // +// // +// Notes: // +// Optional notes section. // +// // +// Hierarchical: // +// axi_basic_top // +// axi_basic_tx // +// axi_basic_tx_thrtl_ctl // +// // +//----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_axi_basic_tx_thrtl_ctl #( + parameter C_DATA_WIDTH = 128, // RX/TX interface data width + parameter C_FAMILY = "X7", // Targeted FPGA family + parameter C_ROOT_PORT = "FALSE", // PCIe block is in root port mode + parameter TCQ = 1 // Clock to Q time + ) ( + + // AXI TX + //----------- + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, // TX data from user + input s_axis_tx_tvalid, // TX data is valid + input [3:0] s_axis_tx_tuser, // TX user signals + input s_axis_tx_tlast, // TX data is last + + // User Misc. + //----------- + input user_turnoff_ok, // Turnoff OK from user + input user_tcfg_gnt, // Send cfg OK from user + + // TRN TX + //----------- + input [5:0] trn_tbuf_av, // TX buffers available + input trn_tdst_rdy, // TX destination ready + + // TRN Misc. + //----------- + input trn_tcfg_req, // TX config request + output trn_tcfg_gnt, // TX config grant + input trn_lnk_up, // PCIe link up + + // 7 Series/Virtex6 PM + //----------- + input [2:0] cfg_pcie_link_state, // Encoded PCIe link state + + // Virtex6 PM + //----------- + input cfg_pm_send_pme_to, // PM send PME turnoff msg + input [1:0] cfg_pmcsr_powerstate, // PMCSR power state + input [31:0] trn_rdllp_data, // RX DLLP data + input trn_rdllp_src_rdy, // RX DLLP source ready + + // Virtex6/Spartan6 PM + //----------- + input cfg_to_turnoff, // Turnoff request + output reg cfg_turnoff_ok, // Turnoff grant + + // System + //----------- + output reg tready_thrtl, // TREADY to pipeline + input user_clk, // user clock from block + input user_rst // user reset from block +); + +// Thrtl user when TBUF hits this val +localparam TBUF_AV_MIN = (C_DATA_WIDTH == 128) ? 5 : + (C_DATA_WIDTH == 64) ? 1 : 0; + +// Pause user when TBUF hits this val +localparam TBUF_AV_GAP = TBUF_AV_MIN + 1; + +// GAP pause time - the latency from the time a packet is accepted on the TRN +// interface to the time trn_tbuf_av from the Block will decrement. +localparam TBUF_GAP_TIME = (C_DATA_WIDTH == 128) ? 4 : 1; + +// Latency time from when tcfg_gnt is asserted to when PCIe block will throttle +localparam TCFG_LATENCY_TIME = 2'd2; + +// Number of pipeline stages to delay trn_tcfg_gnt. For V6 128-bit only +localparam TCFG_GNT_PIPE_STAGES = 3; + +// Throttle condition registers and constants +reg lnk_up_thrtl; +wire lnk_up_trig; +wire lnk_up_exit; + +reg tbuf_av_min_thrtl; +wire tbuf_av_min_trig; + +reg tbuf_av_gap_thrtl; +reg [2:0] tbuf_gap_cnt; +wire tbuf_av_gap_trig; +wire tbuf_av_gap_exit; +wire gap_trig_tlast; +wire gap_trig_decr; +wire gap_trig_tcfg; +reg [5:0] tbuf_av_d; + +reg tcfg_req_thrtl; +reg [1:0] tcfg_req_cnt; +reg trn_tdst_rdy_d; +wire tcfg_req_trig; +wire tcfg_req_exit; +reg tcfg_gnt_log; + +wire pre_throttle; +wire reg_throttle; +wire exit_crit; +reg reg_tcfg_gnt; +reg trn_tcfg_req_d; +reg tcfg_gnt_pending; +wire wire_to_turnoff; +reg reg_turnoff_ok; + +reg tready_thrtl_mux; + +localparam LINKSTATE_L0 = 3'b000; +localparam LINKSTATE_PPM_L1 = 3'b001; +localparam LINKSTATE_PPM_L1_TRANS = 3'b101; +localparam LINKSTATE_PPM_L23R_TRANS = 3'b110; +localparam PM_ENTER_L1 = 8'h20; +localparam POWERSTATE_D0 = 2'b00; + +reg ppm_L1_thrtl; +wire ppm_L1_trig; +wire ppm_L1_exit; +reg [2:0] cfg_pcie_link_state_d; +reg trn_rdllp_src_rdy_d; + +reg ppm_L23_thrtl; +wire ppm_L23_trig; +reg cfg_turnoff_ok_pending; + +reg reg_tlast; + +// Throttle control state machine states and registers +localparam IDLE = 0; +localparam THROTTLE = 1; +reg cur_state; +reg next_state; + +reg reg_axi_in_pkt; +wire axi_in_pkt; +wire axi_pkt_ending; +wire axi_throttled; +wire axi_thrtl_ok; +wire tx_ecrc_pause; + +//----------------------------------------------------------------------------// +// THROTTLE REASON: PCIe link is down // +// - When to throttle: trn_lnk_up deasserted // +// - When to stop: trn_tdst_rdy assesrted // +//----------------------------------------------------------------------------// +assign lnk_up_trig = !trn_lnk_up; +assign lnk_up_exit = trn_tdst_rdy; + +always @(posedge user_clk) begin + if(user_rst) begin + lnk_up_thrtl <= #TCQ 1'b1; + end + else begin + if(lnk_up_trig) begin + lnk_up_thrtl <= #TCQ 1'b1; + end + else if(lnk_up_exit) begin + lnk_up_thrtl <= #TCQ 1'b0; + end + end +end + + +//----------------------------------------------------------------------------// +// THROTTLE REASON: Transmit buffers depleted // +// - When to throttle: trn_tbuf_av falls to 0 // +// - When to stop: trn_tbuf_av rises above 0 again // +//----------------------------------------------------------------------------// +assign tbuf_av_min_trig = (trn_tbuf_av <= TBUF_AV_MIN); + +always @(posedge user_clk) begin + if(user_rst) begin + tbuf_av_min_thrtl <= #TCQ 1'b0; + end + else begin + if(tbuf_av_min_trig) begin + tbuf_av_min_thrtl <= #TCQ 1'b1; + end + + // The exit condition for tbuf_av_min_thrtl is !tbuf_av_min_trig + else begin + tbuf_av_min_thrtl <= #TCQ 1'b0; + end + end +end + + +//----------------------------------------------------------------------------// +// THROTTLE REASON: Transmit buffers getting low // +// - When to throttle: trn_tbuf_av falls below "gap" threshold TBUF_AV_GAP // +// - When to stop: after TBUF_GAP_TIME cycles elapse // +// // +// If we're about to run out of transmit buffers, throttle the user for a // +// few clock cycles to give the PCIe block time to catch up. This is // +// needed to compensate for latency in decrementing trn_tbuf_av in the PCIe // +// Block transmit path. // +//----------------------------------------------------------------------------// + +// Detect two different scenarios for buffers getting low: +// 1) If we see a TLAST. a new packet has been inserted into the buffer, and +// we need to pause and let that packet "soak in" +assign gap_trig_tlast = (trn_tbuf_av <= TBUF_AV_GAP) && + s_axis_tx_tvalid && tready_thrtl && s_axis_tx_tlast; + +// 2) Any time tbug_avail decrements to the TBUF_AV_GAP threshold, we need to +// pause and make sure no other packets are about to soak in and cause the +// buffer availability to drop further. +assign gap_trig_decr = (trn_tbuf_av == (TBUF_AV_GAP)) && + (tbuf_av_d == (TBUF_AV_GAP+1)); + +assign gap_trig_tcfg = (tcfg_req_thrtl && tcfg_req_exit); +assign tbuf_av_gap_trig = gap_trig_tlast || gap_trig_decr || gap_trig_tcfg; +assign tbuf_av_gap_exit = (tbuf_gap_cnt == 0); + +always @(posedge user_clk) begin + if(user_rst) begin + tbuf_av_gap_thrtl <= #TCQ 1'b0; + tbuf_gap_cnt <= #TCQ 3'h0; + tbuf_av_d <= #TCQ 6'h00; + end + else begin + if(tbuf_av_gap_trig) begin + tbuf_av_gap_thrtl <= #TCQ 1'b1; + end + else if(tbuf_av_gap_exit) begin + tbuf_av_gap_thrtl <= #TCQ 1'b0; + end + + // tbuf gap counter: + // This logic controls the length of the throttle condition when tbufs are + // getting low. + if(tbuf_av_gap_thrtl && (cur_state == THROTTLE)) begin + if(tbuf_gap_cnt > 0) begin + tbuf_gap_cnt <= #TCQ tbuf_gap_cnt - 3'd1; + end + end + else begin + tbuf_gap_cnt <= #TCQ TBUF_GAP_TIME; + end + + tbuf_av_d <= #TCQ trn_tbuf_av; + end +end + + +//----------------------------------------------------------------------------// +// THROTTLE REASON: Block needs to send a CFG response // +// - When to throttle: trn_tcfg_req and user_tcfg_gnt asserted // +// - When to stop: after trn_tdst_rdy transitions to unasserted // +// // +// If the block needs to send a response to a CFG packet, this will cause // +// the subsequent deassertion of trn_tdst_rdy. When the user design permits, // +// grant permission to the block to service request and throttle the user. // +//----------------------------------------------------------------------------// +assign tcfg_req_trig = trn_tcfg_req && reg_tcfg_gnt; +assign tcfg_req_exit = (tcfg_req_cnt == 2'd0) && !trn_tdst_rdy_d && + trn_tdst_rdy; +always @(posedge user_clk) begin + if(user_rst) begin + tcfg_req_thrtl <= #TCQ 1'b0; + trn_tcfg_req_d <= #TCQ 1'b0; + trn_tdst_rdy_d <= #TCQ 1'b1; + reg_tcfg_gnt <= #TCQ 1'b0; + tcfg_req_cnt <= #TCQ 2'd0; + tcfg_gnt_pending <= #TCQ 1'b0; + end + else begin + if(tcfg_req_trig) begin + tcfg_req_thrtl <= #TCQ 1'b1; + end + else if(tcfg_req_exit) begin + tcfg_req_thrtl <= #TCQ 1'b0; + end + + // We need to wait the appropriate amount of time for the tcfg_gnt to + // "sink in" to the PCIe block. After that, we know that the PCIe block will + // not reassert trn_tdst_rdy until the CFG request has been serviced. If a + // new request is being service (tcfg_gnt_log == 1), then reset the timer. + if((trn_tcfg_req && !trn_tcfg_req_d) || tcfg_gnt_pending) begin + tcfg_req_cnt <= #TCQ TCFG_LATENCY_TIME; + end + else begin + if(tcfg_req_cnt > 0) begin + tcfg_req_cnt <= #TCQ tcfg_req_cnt - 2'd1; + end + end + + // Make sure tcfg_gnt_log pulses once for one clock cycle for every + // cfg packet request. + if(trn_tcfg_req && !trn_tcfg_req_d) begin + tcfg_gnt_pending <= #TCQ 1'b1; + end + else if(tcfg_gnt_log) begin + tcfg_gnt_pending <= #TCQ 1'b0; + end + + trn_tcfg_req_d <= #TCQ trn_tcfg_req; + trn_tdst_rdy_d <= #TCQ trn_tdst_rdy; + reg_tcfg_gnt <= #TCQ user_tcfg_gnt; + end +end + + +//----------------------------------------------------------------------------// +// THROTTLE REASON: Block needs to transition to low power state PPM L1 // +// - When to throttle: appropriate low power state signal asserted // +// (architecture dependent) // +// - When to stop: cfg_pcie_link_state goes to proper value (C_ROOT_PORT // +// dependent) // +// // +// If the block needs to transition to PM state PPM L1, we need to finish // +// up what we're doing and throttle immediately. // +//----------------------------------------------------------------------------// +generate + // PPM L1 signals for 7 Series in RC mode + if((C_FAMILY == "X7") && (C_ROOT_PORT == "TRUE")) begin : x7_L1_thrtl_rp + assign ppm_L1_trig = (cfg_pcie_link_state_d == LINKSTATE_L0) && + (cfg_pcie_link_state == LINKSTATE_PPM_L1_TRANS); + assign ppm_L1_exit = cfg_pcie_link_state == LINKSTATE_PPM_L1; + end + + // PPM L1 signals for 7 Series in EP mode + else if((C_FAMILY == "X7") && (C_ROOT_PORT == "FALSE")) begin : x7_L1_thrtl_ep + assign ppm_L1_trig = (cfg_pcie_link_state_d == LINKSTATE_L0) && + (cfg_pcie_link_state == LINKSTATE_PPM_L1_TRANS); + assign ppm_L1_exit = cfg_pcie_link_state == LINKSTATE_L0; + end + + // PPM L1 signals for V6 in RC mode + else if((C_FAMILY == "V6") && (C_ROOT_PORT == "TRUE")) begin : v6_L1_thrtl_rp + assign ppm_L1_trig = (trn_rdllp_data[31:24] == PM_ENTER_L1) && + trn_rdllp_src_rdy && !trn_rdllp_src_rdy_d; + assign ppm_L1_exit = cfg_pcie_link_state == LINKSTATE_PPM_L1; + end + + // PPM L1 signals for V6 in EP mode + else if((C_FAMILY == "V6") && (C_ROOT_PORT == "FALSE")) begin : v6_L1_thrtl_ep + assign ppm_L1_trig = (cfg_pmcsr_powerstate != POWERSTATE_D0); + assign ppm_L1_exit = cfg_pcie_link_state == LINKSTATE_L0; + end + + // PPM L1 detection not supported for S6 + else begin : s6_L1_thrtl + assign ppm_L1_trig = 1'b0; + assign ppm_L1_exit = 1'b1; + end +endgenerate + +always @(posedge user_clk) begin + if(user_rst) begin + ppm_L1_thrtl <= #TCQ 1'b0; + cfg_pcie_link_state_d <= #TCQ 3'b0; + trn_rdllp_src_rdy_d <= #TCQ 1'b0; + end + else begin + if(ppm_L1_trig) begin + ppm_L1_thrtl <= #TCQ 1'b1; + end + else if(ppm_L1_exit) begin + ppm_L1_thrtl <= #TCQ 1'b0; + end + cfg_pcie_link_state_d <= #TCQ cfg_pcie_link_state; + trn_rdllp_src_rdy_d <= #TCQ trn_rdllp_src_rdy; + end +end + + +//----------------------------------------------------------------------------// +// THROTTLE REASON: Block needs to transition to low power state PPM L2/3 // +// - When to throttle: appropriate PM signal indicates a transition to // +// L2/3 is pending or in progress (family and role dependent) // +// - When to stop: never (the only path out of L2/3 is a full reset) // +// // +// If the block needs to transition to PM state PPM L2/3, we need to finish // +// up what we're doing and throttle when the user gives permission. // +//----------------------------------------------------------------------------// +generate + // PPM L2/3 signals for 7 Series in RC mode + if((C_FAMILY == "X7") && (C_ROOT_PORT == "TRUE")) begin : x7_L23_thrtl_rp + assign ppm_L23_trig = (cfg_pcie_link_state_d == LINKSTATE_PPM_L23R_TRANS); + assign wire_to_turnoff = 1'b0; + end + + // PPM L2/3 signals for V6 in RC mode + else if((C_FAMILY == "V6") && (C_ROOT_PORT == "TRUE")) begin : v6_L23_thrtl_rp + assign ppm_L23_trig = cfg_pm_send_pme_to; + assign wire_to_turnoff = 1'b0; + end + + // PPM L2/3 signals in EP mode + else begin : L23_thrtl_ep + assign ppm_L23_trig = wire_to_turnoff && reg_turnoff_ok; + + // PPM L2/3 signals for 7 Series in EP mode + // For 7 Series, cfg_to_turnoff pulses once when a turnoff request is + // outstanding, so we need a "sticky" register that grabs the request. + if(C_FAMILY == "X7") begin : x7_L23_thrtl_ep + reg reg_to_turnoff; + + always @(posedge user_clk) begin + if(user_rst) begin + reg_to_turnoff <= #TCQ 1'b0; + end + else begin + if(cfg_to_turnoff) begin + reg_to_turnoff <= #TCQ 1'b1; + end + end + end + + assign wire_to_turnoff = reg_to_turnoff; + end + + // PPM L2/3 signals for V6/S6 in EP mode + // In V6 and S6, the to_turnoff signal asserts and remains asserted until + // turnoff_ok is asserted, so a sticky reg is not necessary. + else begin : v6_s6_L23_thrtl_ep + assign wire_to_turnoff = cfg_to_turnoff; + end + + always @(posedge user_clk) begin + if(user_rst) begin + reg_turnoff_ok <= #TCQ 1'b0; + end + else begin + reg_turnoff_ok <= #TCQ user_turnoff_ok; + end + end + end +endgenerate + +always @(posedge user_clk) begin + if(user_rst) begin + ppm_L23_thrtl <= #TCQ 1'b0; + cfg_turnoff_ok_pending <= #TCQ 1'b0; + end + else begin + if(ppm_L23_trig) begin + ppm_L23_thrtl <= #TCQ 1'b1; + end + + // Make sure cfg_turnoff_ok pulses once for one clock cycle for every + // turnoff request. + if(ppm_L23_trig && !ppm_L23_thrtl) begin + cfg_turnoff_ok_pending <= #TCQ 1'b1; + end + else if(cfg_turnoff_ok) begin + cfg_turnoff_ok_pending <= #TCQ 1'b0; + end + end +end + + +//----------------------------------------------------------------------------// +// Create axi_thrtl_ok. This signal determines if it's OK to throttle the // +// user design on the AXI interface. Since TREADY is registered, this signal // +// needs to assert on the cycle ~before~ we actually intend to throttle. // +// The only time it's OK to throttle when TVALID is asserted is on the first // +// beat of a new packet. Therefore, assert axi_thrtl_ok if one of the // +// is true: // +// 1) The user is not in a packet and is not starting one // +// 2) The user is just finishing a packet // +// 3) We're already throttled, so it's OK to continue throttling // +//----------------------------------------------------------------------------// +always @(posedge user_clk) begin + if(user_rst) begin + reg_axi_in_pkt <= #TCQ 1'b0; + end + else begin + if(s_axis_tx_tvalid && s_axis_tx_tlast) begin + reg_axi_in_pkt <= #TCQ 1'b0; + end + else if(tready_thrtl && s_axis_tx_tvalid) begin + reg_axi_in_pkt <= #TCQ 1'b1; + end + end +end + +assign axi_in_pkt = s_axis_tx_tvalid || reg_axi_in_pkt; +assign axi_pkt_ending = s_axis_tx_tvalid && s_axis_tx_tlast; +assign axi_throttled = !tready_thrtl; +assign axi_thrtl_ok = !axi_in_pkt || axi_pkt_ending || axi_throttled; + + +//----------------------------------------------------------------------------// +// Throttle CTL State Machine: // +// Throttle user design when a throttle trigger (or triggers) occur. // +// Keep user throttled until all exit criteria have been met. // +//----------------------------------------------------------------------------// + +// Immediate throttle signal. Used to "pounce" on a throttle opportunity when +// we're seeking one +assign pre_throttle = tbuf_av_min_trig || tbuf_av_gap_trig || lnk_up_trig + || tcfg_req_trig || ppm_L1_trig || ppm_L23_trig; + + +// Registered throttle signals. Used to control throttle state machine +assign reg_throttle = tbuf_av_min_thrtl || tbuf_av_gap_thrtl || lnk_up_thrtl + || tcfg_req_thrtl || ppm_L1_thrtl || ppm_L23_thrtl; + +assign exit_crit = !tbuf_av_min_thrtl && !tbuf_av_gap_thrtl && !lnk_up_thrtl + && !tcfg_req_thrtl && !ppm_L1_thrtl && !ppm_L23_thrtl; + +always @(*) begin + case(cur_state) + // IDLE: in this state we're waiting for a trigger event to occur. As + // soon as an event occurs and the user isn't transmitting a packet, we + // throttle the PCIe block and the user and next state is THROTTLE. + IDLE: begin + if(reg_throttle && axi_thrtl_ok) begin + // Throttle user + tready_thrtl_mux = 1'b0; + next_state = THROTTLE; + + // Assert appropriate grant signal depending on the throttle type. + if(tcfg_req_thrtl) begin + tcfg_gnt_log = 1'b1; // For cfg request, grant the request + cfg_turnoff_ok = 1'b0; // + end + else if(ppm_L23_thrtl) begin + tcfg_gnt_log = 1'b0; // + cfg_turnoff_ok = 1'b1; // For PM request, permit transition + end + else begin + tcfg_gnt_log = 1'b0; // Otherwise do nothing + cfg_turnoff_ok = 1'b0; // + end + end + + // If there's not throttle event, do nothing + else begin + // Throttle user as soon as possible + tready_thrtl_mux = !(axi_thrtl_ok && pre_throttle); + next_state = IDLE; + + tcfg_gnt_log = 1'b0; + cfg_turnoff_ok = 1'b0; + end + end + + // THROTTLE: in this state the user is throttle and we're waiting for + // exit criteria, which tells us that the throttle event is over. When + // the exit criteria is satisfied, de-throttle the user and next state + // is IDLE. + THROTTLE: begin + if(exit_crit) begin + // Dethrottle user + tready_thrtl_mux = !pre_throttle; + next_state = IDLE; + end + else begin + // Throttle user + tready_thrtl_mux = 1'b0; + next_state = THROTTLE; + end + + // Assert appropriate grant signal depending on the throttle type. + if(tcfg_req_thrtl && tcfg_gnt_pending) begin + tcfg_gnt_log = 1'b1; // For cfg request, grant the request + cfg_turnoff_ok = 1'b0; // + end + else if(cfg_turnoff_ok_pending) begin + tcfg_gnt_log = 1'b0; // + cfg_turnoff_ok = 1'b1; // For PM request, permit transition + end + else begin + tcfg_gnt_log = 1'b0; // Otherwise do nothing + cfg_turnoff_ok = 1'b0; // + end + end + + default: begin + tready_thrtl_mux = 1'b0; + next_state = IDLE; + tcfg_gnt_log = 1'b0; + cfg_turnoff_ok = 1'b0; + end + endcase +end + +// Synchronous logic +always @(posedge user_clk) begin + if(user_rst) begin + // Throttle user by default until link comes up + cur_state <= #TCQ THROTTLE; + + reg_tlast <= #TCQ 1'b0; + + tready_thrtl <= #TCQ 1'b0; + end + else begin + cur_state <= #TCQ next_state; + + tready_thrtl <= #TCQ tready_thrtl_mux && !tx_ecrc_pause; + reg_tlast <= #TCQ s_axis_tx_tlast; + end +end + +// For X7, the PCIe block will generate the ECRC for a packet if trn_tecrc_gen +// is asserted at SOF. In this case, the Block needs an extra data beat to +// calculate the ECRC, but only if the following conditions are met: +// 1) there is no empty DWORDS at the end of the packet +// (i.e. packet length % C_DATA_WIDTH == 0) +// +// 2) There isn't a ECRC in the TLP already, as indicated by the TD bit in the +// TLP header +// +// If both conditions are met, the Block will stall the TRN interface for one +// data beat after EOF. We need to predict this stall and preemptively stall the +// User for one beat. +generate + if(C_FAMILY == "X7") begin : ecrc_pause_enabled + wire tx_ecrc_pkt; + reg reg_tx_ecrc_pkt; + + wire [1:0] packet_fmt; + wire packet_td; + wire [2:0] header_len; + wire [9:0] payload_len; + wire [13:0] packet_len; + wire pause_needed; + + // Grab necessary packet fields + assign packet_fmt = s_axis_tx_tdata[30:29]; + assign packet_td = s_axis_tx_tdata[15]; + + // Calculate total packet length + assign header_len = packet_fmt[0] ? 3'd4 : 3'd3; + assign payload_len = packet_fmt[1] ? s_axis_tx_tdata[9:0] : 10'h0; + assign packet_len = {10'h000, header_len} + {4'h0, payload_len}; + + + // Determine if packet a ECRC pause is needed + if(C_DATA_WIDTH == 128) begin : packet_len_check_128 + assign pause_needed = (packet_len[1:0] == 2'b00) && !packet_td; + end + else begin : packet_len_check_64 + assign pause_needed = (packet_len[0] == 1'b0) && !packet_td; + end + + + // Create flag to alert TX pipeline to insert a stall + assign tx_ecrc_pkt = s_axis_tx_tuser[0] && pause_needed && + tready_thrtl && s_axis_tx_tvalid && !reg_axi_in_pkt; + + always @(posedge user_clk) begin + if(user_rst) begin + reg_tx_ecrc_pkt <= #TCQ 1'b0; + end + else begin + if(tx_ecrc_pkt && !s_axis_tx_tlast) begin + reg_tx_ecrc_pkt <= #TCQ 1'b1; + end + else if(tready_thrtl && s_axis_tx_tvalid && s_axis_tx_tlast) begin + reg_tx_ecrc_pkt <= #TCQ 1'b0; + end + end + end + + + // Insert the stall now + assign tx_ecrc_pause = ((tx_ecrc_pkt || reg_tx_ecrc_pkt) && + s_axis_tx_tlast && s_axis_tx_tvalid && tready_thrtl); + + end + else begin : ecrc_pause_disabled + assign tx_ecrc_pause = 1'b0; + end +endgenerate + + +// Logic for 128-bit single cycle bug fix. +// This tcfg_gnt pipeline addresses an issue with 128-bit V6 designs where a +// single cycle packet transmitted simultaneously with an assertion of tcfg_gnt +// from AXI Basic causes the packet to be dropped. The packet drop occurs +// because the 128-bit shim doesn't know about the tcfg_req/gnt, and therefor +// isn't expecting trn_tdst_rdy to go low. Since the 128-bit shim does throttle +// prediction just as we do, it ignores the value of trn_tdst_rdy, and +// ultimately drops the packet when transmitting the packet to the block. +generate + if(C_DATA_WIDTH == 128 && C_FAMILY == "V6") begin : tcfg_gnt_pipeline + genvar stage; + reg tcfg_gnt_pipe [TCFG_GNT_PIPE_STAGES:0]; + + // Create a configurable depth FF delay pipeline + for(stage = 0; stage < TCFG_GNT_PIPE_STAGES; stage = stage + 1) + begin : tcfg_gnt_pipeline_stage + + always @(posedge user_clk) begin + if(user_rst) begin + tcfg_gnt_pipe[stage] <= #TCQ 1'b0; + end + else begin + // For stage 0, insert the actual tcfg_gnt signal from logic + if(stage == 0) begin + tcfg_gnt_pipe[stage] <= #TCQ tcfg_gnt_log; + end + + // For stages 1+, chain together + else begin + tcfg_gnt_pipe[stage] <= #TCQ tcfg_gnt_pipe[stage - 1]; + end + end + end + + // tcfg_gnt output to block assigned the last pipeline stage + assign trn_tcfg_gnt = tcfg_gnt_pipe[TCFG_GNT_PIPE_STAGES-1]; + end + end + else begin : tcfg_gnt_no_pipeline + + // For all other architectures, no pipeline delay needed for tcfg_gnt + assign trn_tcfg_gnt = tcfg_gnt_log; + end +endgenerate + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_core_top.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_core_top.v new file mode 100644 index 0000000000000000000000000000000000000000..d8a86be7677a3622bf6b0948b4286d18d86c8017 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_core_top.v @@ -0,0 +1,2171 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_core_top.v +// Version : 3.3 +// +// Description: 7-series solution wrapper : Endpoint for PCI Express +// +// +// +//-------------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* CORE_GENERATION_INFO = "pcie_7x_0,pcie_7x_v3_3_20,{LINK_CAP_MAX_LINK_SPEED=2,LINK_CAP_MAX_LINK_WIDTH=4,PCIE_CAP_DEVICE_PORT_TYPE=0000,DEV_CAP_MAX_PAYLOAD_SUPPORTED=2,USER_CLK_FREQ=3,REF_CLK_FREQ=0,MSI_CAP_ON=TRUE,MSI_CAP_MULTIMSGCAP=0,MSI_CAP_MULTIMSG_EXTENSION=0,MSIX_CAP_ON=FALSE,TL_TX_RAM_RADDR_LATENCY=0,TL_TX_RAM_RDATA_LATENCY=2,TL_RX_RAM_RADDR_LATENCY=0,TL_RX_RAM_RDATA_LATENCY=2,TL_RX_RAM_WRITE_LATENCY=0,\ +VC0_TX_LASTPACKET=29,VC0_RX_RAM_LIMIT=7FF,VC0_TOTAL_CREDITS_PH=4,VC0_TOTAL_CREDITS_PD=64,VC0_TOTAL_CREDITS_NPH=4,VC0_TOTAL_CREDITS_NPD=8,VC0_TOTAL_CREDITS_CH=72,VC0_TOTAL_CREDITS_CD=850,VC0_CPL_INFINITE=TRUE,DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT=0,DEV_CAP_EXT_TAG_SUPPORTED=TRUE,LINK_STATUS_SLOT_CLOCK_CONFIG=TRUE,DISABLE_LANE_REVERSAL=FALSE,DISABLE_SCRAMBLING=FALSE,DSN_CAP_ON=TRUE,REVISION_ID=02,VC_CAP_ON=FALSE}" *) +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_core_top # ( + parameter CFG_VEND_ID = 16'h168C, + parameter CFG_DEV_ID = 16'h002E, + parameter CFG_REV_ID = 8'h01, + parameter CFG_SUBSYS_VEND_ID = 16'h168C, + parameter CFG_SUBSYS_ID = 16'h30A4, + parameter PCIE_ID_IF ="TRUE", + + parameter EXT_PIPE_SIM = "FALSE", + + parameter ALLOW_X8_GEN2 = "FALSE", + parameter PIPE_PIPELINE_STAGES = 1, + parameter [11:0] AER_BASE_PTR = 12'h000, + parameter AER_CAP_ECRC_CHECK_CAPABLE = "FALSE", + parameter AER_CAP_ECRC_GEN_CAPABLE = "FALSE", + parameter AER_CAP_MULTIHEADER = "FALSE", + parameter [11:0] AER_CAP_NEXTPTR = 12'h000, + parameter [23:0] AER_CAP_OPTIONAL_ERR_SUPPORT = 24'h000000, + parameter AER_CAP_ON = "FALSE", + parameter AER_CAP_PERMIT_ROOTERR_UPDATE = "FALSE", + + parameter [31:0] BAR0 = 32'hFFE00000, + parameter [31:0] BAR1 = 32'h00000000, + parameter [31:0] BAR2 = 32'h00000000, + parameter [31:0] BAR3 = 32'h00000000, + parameter [31:0] BAR4 = 32'h00000000, + parameter [31:0] BAR5 = 32'h00000000, + + parameter C_DATA_WIDTH = 128, + parameter [31:0] CARDBUS_CIS_POINTER = 32'h00000000, + parameter [23:0] CLASS_CODE = 24'h028000, + parameter CMD_INTX_IMPLEMENTED = "TRUE", + parameter CPL_TIMEOUT_DISABLE_SUPPORTED = "FALSE", + parameter [3:0] CPL_TIMEOUT_RANGES_SUPPORTED = 4'h2, + + parameter integer DEV_CAP_ENDPOINT_L0S_LATENCY = 3, + parameter integer DEV_CAP_ENDPOINT_L1_LATENCY = 6, + parameter DEV_CAP_EXT_TAG_SUPPORTED = "FALSE", + parameter integer DEV_CAP_MAX_PAYLOAD_SUPPORTED = 0, + parameter integer DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT = 0, + + parameter DEV_CAP2_ARI_FORWARDING_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED = "FALSE", + parameter DEV_CAP2_CAS128_COMPLETER_SUPPORTED = "FALSE", + parameter [1:0] DEV_CAP2_TPH_COMPLETER_SUPPORTED = 2'b00, + parameter DEV_CONTROL_EXT_TAG_DEFAULT = "TRUE", + + parameter DISABLE_LANE_REVERSAL = "FALSE", + parameter DISABLE_RX_POISONED_RESP = "FALSE", + parameter DISABLE_SCRAMBLING = "FALSE", + parameter [11:0] DSN_BASE_PTR = 12'h100, + parameter [11:0] DSN_CAP_NEXTPTR = 12'h140, + parameter DSN_CAP_ON = "TRUE", + + parameter [10:0] ENABLE_MSG_ROUTE = 11'b00000000000, + parameter ENABLE_RX_TD_ECRC_TRIM = "FALSE", + parameter [31:0] EXPANSION_ROM = 32'h00000000, + parameter [5:0] EXT_CFG_CAP_PTR = 6'h3F, + parameter [9:0] EXT_CFG_XP_CAP_PTR = 10'h3FF, + parameter [7:0] HEADER_TYPE = 8'h00, + parameter [7:0] INTERRUPT_PIN = 8'h1, + + parameter [9:0] LAST_CONFIG_DWORD = 10'h3FF, + parameter LINK_CAP_ASPM_OPTIONALITY = "FALSE", + parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP = "FALSE", + parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP = "FALSE", + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h2, + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h4, + + parameter LINK_CTRL2_DEEMPHASIS = "FALSE", + parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE = "FALSE", + parameter [3:0] LINK_CTRL2_TARGET_LINK_SPEED = 4'h2, + parameter LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE", + + parameter [14:0] LL_ACK_TIMEOUT = 15'h0000, + parameter LL_ACK_TIMEOUT_EN = "FALSE", + parameter integer LL_ACK_TIMEOUT_FUNC = 0, + parameter [14:0] LL_REPLAY_TIMEOUT = 15'h0000, + parameter LL_REPLAY_TIMEOUT_EN = "FALSE", + parameter integer LL_REPLAY_TIMEOUT_FUNC = 1, + + parameter [5:0] LTSSM_MAX_LINK_WIDTH = 6'h4, + parameter MSI_CAP_MULTIMSGCAP = 0, + parameter MSI_CAP_MULTIMSG_EXTENSION = 0, + parameter MSI_CAP_ON = "TRUE", + parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE = "FALSE", + parameter MSI_CAP_64_BIT_ADDR_CAPABLE = "FALSE", + + parameter MSIX_CAP_ON = "FALSE", + parameter MSIX_CAP_PBA_BIR = 0, + parameter [28:0] MSIX_CAP_PBA_OFFSET = 29'h0, + parameter MSIX_CAP_TABLE_BIR = 0, + parameter [28:0] MSIX_CAP_TABLE_OFFSET = 29'h0, + parameter [10:0] MSIX_CAP_TABLE_SIZE = 11'h000, + + parameter [3:0] PCIE_CAP_DEVICE_PORT_TYPE = 4'h0, + parameter [7:0] PCIE_CAP_NEXTPTR = 8'h00, + + parameter PM_CAP_DSI = "FALSE", + parameter PM_CAP_D1SUPPORT = "TRUE", + parameter PM_CAP_D2SUPPORT = "FALSE", + parameter [7:0] PM_CAP_NEXTPTR = 8'h50, + parameter [4:0] PM_CAP_PMESUPPORT = 5'h0B, + parameter PM_CSR_NOSOFTRST = "TRUE", + + parameter [1:0] PM_DATA_SCALE0 = 2'h0, + parameter [1:0] PM_DATA_SCALE1 = 2'h0, + parameter [1:0] PM_DATA_SCALE2 = 2'h0, + parameter [1:0] PM_DATA_SCALE3 = 2'h0, + parameter [1:0] PM_DATA_SCALE4 = 2'h0, + parameter [1:0] PM_DATA_SCALE5 = 2'h0, + parameter [1:0] PM_DATA_SCALE6 = 2'h0, + parameter [1:0] PM_DATA_SCALE7 = 2'h0, + + parameter [7:0] PM_DATA0 = 8'h00, + parameter [7:0] PM_DATA1 = 8'h00, + parameter [7:0] PM_DATA2 = 8'h00, + parameter [7:0] PM_DATA3 = 8'h00, + parameter [7:0] PM_DATA4 = 8'h00, + parameter [7:0] PM_DATA5 = 8'h00, + parameter [7:0] PM_DATA6 = 8'h00, + parameter [7:0] PM_DATA7 = 8'h00, + + parameter [11:0] RBAR_BASE_PTR = 12'h000, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR0 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR1 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR2 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR3 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR4 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR5 = 5'h00, + parameter [2:0] RBAR_CAP_INDEX0 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX1 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX2 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX3 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX4 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX5 = 3'h0, + parameter RBAR_CAP_ON = "FALSE", + parameter [31:0] RBAR_CAP_SUP0 = 32'h00001, + parameter [31:0] RBAR_CAP_SUP1 = 32'h00001, + parameter [31:0] RBAR_CAP_SUP2 = 32'h00001, + parameter [31:0] RBAR_CAP_SUP3 = 32'h00001, + parameter [31:0] RBAR_CAP_SUP4 = 32'h00001, + parameter [31:0] RBAR_CAP_SUP5 = 32'h00001, + parameter [2:0] RBAR_NUM = 3'h0, + + parameter RECRC_CHK = 0, + parameter RECRC_CHK_TRIM = "FALSE", + parameter REF_CLK_FREQ = 0, // 0 - 100 MHz, 1 - 125 MHz, 2 - 250 MHz + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, + parameter KEEP_WIDTH = C_DATA_WIDTH / 8, + + parameter TL_RX_RAM_RADDR_LATENCY = 0, + parameter TL_RX_RAM_WRITE_LATENCY = 0, + parameter TL_TX_RAM_RADDR_LATENCY = 0, + parameter TL_TX_RAM_WRITE_LATENCY = 0, + parameter TL_RX_RAM_RDATA_LATENCY = 2, + parameter TL_TX_RAM_RDATA_LATENCY = 2, + parameter TRN_NP_FC = "TRUE", + parameter TRN_DW = "TRUE", + + parameter UPCONFIG_CAPABLE = "TRUE", + parameter UPSTREAM_FACING = "TRUE", + parameter UR_ATOMIC = "FALSE", + parameter UR_INV_REQ = "TRUE", + parameter UR_PRS_RESPONSE = "TRUE", + parameter USER_CLK_FREQ = 3, + parameter USER_CLK2_DIV2 = "TRUE", + + parameter [11:0] VC_BASE_PTR = 12'h000, + parameter [11:0] VC_CAP_NEXTPTR = 12'h000, + parameter VC_CAP_ON = "FALSE", + parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS = "FALSE", + + parameter VC0_CPL_INFINITE = "TRUE", + parameter [12:0] VC0_RX_RAM_LIMIT = 13'h7FF, + parameter VC0_TOTAL_CREDITS_CD = 850, + parameter VC0_TOTAL_CREDITS_CH = 72, + parameter VC0_TOTAL_CREDITS_NPH = 4, + parameter VC0_TOTAL_CREDITS_NPD = 8, + parameter VC0_TOTAL_CREDITS_PD = 64, + parameter VC0_TOTAL_CREDITS_PH = 4, + parameter VC0_TX_LASTPACKET = 29, + + parameter [11:0] VSEC_BASE_PTR = 12'h000, + parameter [11:0] VSEC_CAP_NEXTPTR = 12'h000, + parameter VSEC_CAP_ON = "FALSE", + + parameter DISABLE_ASPM_L1_TIMER = "FALSE", + parameter DISABLE_BAR_FILTERING = "FALSE", + parameter DISABLE_ID_CHECK = "FALSE", + parameter DISABLE_RX_TC_FILTER = "FALSE", + parameter [7:0] DNSTREAM_LINK_NUM = 8'h00, + + parameter [15:0] DSN_CAP_ID = 16'h0001, + parameter [3:0] DSN_CAP_VERSION = 4'h1, + parameter ENTER_RVRY_EI_L0 = "TRUE", + parameter [4:0] INFER_EI = 5'h00, + parameter IS_SWITCH = "FALSE", + + parameter LINK_CAP_ASPM_SUPPORT = 3, + parameter LINK_CAP_CLOCK_POWER_MANAGEMENT = "FALSE", + parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 3, + parameter LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 3, + parameter LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 3, + parameter LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 3, + parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 6, + parameter LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 6, + parameter LINK_CAP_L1_EXIT_LATENCY_GEN1 = 6, + parameter LINK_CAP_L1_EXIT_LATENCY_GEN2 = 6, + parameter LINK_CAP_RSVD_23 = 0, + parameter LINK_CONTROL_RCB = 0, + + parameter [7:0] MSI_BASE_PTR = 8'h50, + parameter [7:0] MSI_CAP_ID = 8'h05, + parameter [7:0] MSI_CAP_NEXTPTR = 8'h60, + parameter [7:0] MSIX_BASE_PTR = 8'h9C, + parameter [7:0] MSIX_CAP_ID = 8'h11, + parameter [7:0] MSIX_CAP_NEXTPTR =8'h00, + + parameter N_FTS_COMCLK_GEN1 = 255, + parameter N_FTS_COMCLK_GEN2 = 255, + parameter N_FTS_GEN1 = 255, + parameter N_FTS_GEN2 = 255, + + parameter [7:0] PCIE_BASE_PTR = 8'h60, + parameter [7:0] PCIE_CAP_CAPABILITY_ID = 8'h10, + parameter [3:0] PCIE_CAP_CAPABILITY_VERSION = 4'h2, + parameter PCIE_CAP_ON = "TRUE", + parameter PCIE_CAP_RSVD_15_14 = 0, + parameter PCIE_CAP_SLOT_IMPLEMENTED = "FALSE", + parameter PCIE_REVISION = 2, + + parameter PL_AUTO_CONFIG = 0, + parameter PL_FAST_TRAIN = "FALSE", + parameter PCIE_EXT_CLK = "FALSE", + + parameter PCIE_EXT_GT_COMMON = "FALSE", + parameter EXT_CH_GT_DRP = "FALSE", + parameter TRANSCEIVER_CTRL_STATUS_PORTS = "FALSE", + parameter SHARED_LOGIC_IN_CORE = "FALSE", + + parameter [7:0] PM_BASE_PTR = 8'h40, + parameter PM_CAP_AUXCURRENT = 7, + parameter [7:0] PM_CAP_ID = 8'h01, + parameter PM_CAP_ON = "TRUE", + parameter PM_CAP_PME_CLOCK = "FALSE", + parameter PM_CAP_RSVD_04 = 0, + parameter PM_CAP_VERSION = 3, + parameter PM_CSR_BPCCEN = "FALSE", + parameter PM_CSR_B2B3 = "FALSE", + + parameter ROOT_CAP_CRS_SW_VISIBILITY = "FALSE", + parameter SELECT_DLL_IF = "FALSE", + parameter SLOT_CAP_ATT_BUTTON_PRESENT = "FALSE", + parameter SLOT_CAP_ATT_INDICATOR_PRESENT = "FALSE", + parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT = "FALSE", + parameter SLOT_CAP_HOTPLUG_CAPABLE = "FALSE", + parameter SLOT_CAP_HOTPLUG_SURPRISE = "FALSE", + parameter SLOT_CAP_MRL_SENSOR_PRESENT = "FALSE", + parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT = "FALSE", + parameter [12:0] SLOT_CAP_PHYSICAL_SLOT_NUM = 13'h0000, + parameter SLOT_CAP_POWER_CONTROLLER_PRESENT = "FALSE", + parameter SLOT_CAP_POWER_INDICATOR_PRESENT = "FALSE", + parameter SLOT_CAP_SLOT_POWER_LIMIT_SCALE = 0, + parameter [7:0] SLOT_CAP_SLOT_POWER_LIMIT_VALUE = 8'h100, + + parameter integer SPARE_BIT0 = 0, + + parameter integer SPARE_BIT1 = 0, + parameter integer SPARE_BIT2 = 0, + parameter integer SPARE_BIT3 = 0, + parameter integer SPARE_BIT4 = 0, + parameter integer SPARE_BIT5 = 0, + parameter integer SPARE_BIT6 = 0, + parameter integer SPARE_BIT7 = 0, + parameter integer SPARE_BIT8 = 0, + parameter [7:0] SPARE_BYTE0 = 8'h00, + parameter [7:0] SPARE_BYTE1 = 8'h00, + parameter [7:0] SPARE_BYTE2 = 8'h00, + parameter [7:0] SPARE_BYTE3 = 8'h00, + parameter [31:0] SPARE_WORD0 = 32'h00000000, + parameter [31:0] SPARE_WORD1 = 32'h00000000, + parameter [31:0] SPARE_WORD2 = 32'h00000000, + parameter [31:0] SPARE_WORD3 = 32'h00000000, + + parameter TL_RBYPASS = "FALSE", + parameter TL_TFC_DISABLE = "FALSE", + parameter TL_TX_CHECKS_DISABLE = "FALSE", + parameter EXIT_LOOPBACK_ON_EI = "TRUE", + + parameter CFG_ECRC_ERR_CPLSTAT = 0, + parameter [7:0] CAPABILITIES_PTR = 8'h40, + parameter [6:0] CRM_MODULE_RSTS = 7'h00, + parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE = "TRUE", + parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE = "TRUE", + parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "FALSE", + parameter DEV_CAP_ROLE_BASED_ERROR = "TRUE", + parameter DEV_CAP_RSVD_14_12 = 0, + parameter DEV_CAP_RSVD_17_16 = 0, + parameter DEV_CAP_RSVD_31_29 = 0, + parameter DEV_CONTROL_AUX_POWER_SUPPORTED = "FALSE", + + parameter [15:0] VC_CAP_ID = 16'h0002, + parameter [3:0] VC_CAP_VERSION = 4'h1, + parameter [15:0] VSEC_CAP_HDR_ID = 16'h1234, + parameter [11:0] VSEC_CAP_HDR_LENGTH = 12'h018, + parameter [3:0] VSEC_CAP_HDR_REVISION = 4'h1, + parameter [15:0] VSEC_CAP_ID = 16'h000B, + parameter VSEC_CAP_IS_LINK_VISIBLE = "TRUE", + parameter [3:0] VSEC_CAP_VERSION = 4'h1, + + parameter DISABLE_ERR_MSG = "FALSE", + parameter DISABLE_LOCKED_FILTER = "FALSE", + parameter DISABLE_PPM_FILTER = "FALSE", + parameter ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED = "FALSE", + parameter INTERRUPT_STAT_AUTO = "TRUE", + parameter MPS_FORCE = "FALSE", + parameter [14:0] PM_ASPML0S_TIMEOUT = 15'h0000, + parameter PM_ASPML0S_TIMEOUT_EN = "FALSE", + parameter PM_ASPML0S_TIMEOUT_FUNC = 0, + parameter PM_ASPM_FASTEXIT = "FALSE", + parameter PM_MF = "FALSE", + + parameter [1:0] RP_AUTO_SPD = 2'h1, + parameter [4:0] RP_AUTO_SPD_LOOPCNT = 5'h1f, + parameter SIM_VERSION = "1.0", + parameter SSL_MESSAGE_AUTO = "FALSE", + parameter TECRC_EP_INV = "FALSE", + parameter UR_CFG1 = "TRUE", + parameter USE_RID_PINS = "FALSE", + +// New Parameters + parameter DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED = "FALSE", + parameter DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED = "FALSE", + parameter DEV_CAP2_LTR_MECHANISM_SUPPORTED = "FALSE", + parameter [1:0] DEV_CAP2_MAX_ENDEND_TLP_PREFIXES = 2'h0, + parameter DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING = "FALSE", + + parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE = "FALSE", + + parameter [15:0] AER_CAP_ID = 16'h0001, + parameter [3:0] AER_CAP_VERSION = 4'h1, + + parameter [15:0] RBAR_CAP_ID = 16'h0015, + parameter [11:0] RBAR_CAP_NEXTPTR = 12'h000, + parameter [3:0] RBAR_CAP_VERSION = 4'h1, + parameter PCIE_USE_MODE = "1.0", + parameter PCIE_GT_DEVICE = "GTP", + parameter PCIE_CHAN_BOND = 1, + parameter PCIE_PLL_SEL = "CPLL", + parameter PCIE_ASYNC_EN = "FALSE", + parameter PCIE_TXBUF_EN = "FALSE", + parameter PL_INTERFACE = "TRUE", + parameter CFG_MGMT_IF = "TRUE", + parameter CFG_CTL_IF = "TRUE", + parameter CFG_STATUS_IF = "TRUE", + parameter RCV_MSG_IF = "FALSE", + parameter CFG_FC_IF = "FALSE", + parameter EXT_PIPE_INTERFACE = "FALSE", + + parameter TX_MARGIN_FULL_0 = 7'b1001111, + parameter TX_MARGIN_FULL_1 = 7'b1001110, + parameter TX_MARGIN_FULL_2 = 7'b1001101, + parameter TX_MARGIN_FULL_3 = 7'b1001100, + parameter TX_MARGIN_FULL_4 = 7'b1000011, + parameter TX_MARGIN_LOW_0 = 7'b1000101, + parameter TX_MARGIN_LOW_1 = 7'b1000110, + parameter TX_MARGIN_LOW_2 = 7'b1000011, + parameter TX_MARGIN_LOW_3 = 7'b1000010, + parameter TX_MARGIN_LOW_4 = 7'b1000000, + parameter ENABLE_JTAG_DBG = "FALSE", + parameter REDUCE_OOB_FREQ = "FALSE" +) +( + + //----------------------------------------------------------------------------------------------------------------// + // 1. PCI Express (pci_exp) Interface // + //----------------------------------------------------------------------------------------------------------------// + + // Tx + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_txn, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_txp, + + // Rx + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_rxn, + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_rxp, + + //----------------------------------------------------------------------------------------------------------------// + // 2. Clock & GT COMMON Sharing Interface // + //----------------------------------------------------------------------------------------------------------------// + + // Shared Logic Internal + output int_pclk_out_slave, + output int_pipe_rxusrclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH-1):0] int_rxoutclk_out, + output int_dclk_out, + output int_userclk1_out, + output int_userclk2_out, + output int_oobclk_out, + output int_mmcm_lock_out, + output [1:0] int_qplllock_out, + output [1:0] int_qplloutclk_out, + output [1:0] int_qplloutrefclk_out, + input [(LINK_CAP_MAX_LINK_WIDTH-1):0] int_pclk_sel_slave, + + // Shared Logic External - Clocks + input pipe_pclk_in, + input pipe_rxusrclk_in, + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_rxoutclk_in, + input pipe_dclk_in, + input pipe_userclk1_in, + input pipe_userclk2_in, + input pipe_oobclk_in, + input pipe_mmcm_lock_in, + + output pipe_txoutclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_rxoutclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_pclk_sel_out, + output pipe_gen3_out, + + // Shared Logic External - GT COMMON + + input [11:0] qpll_drp_crscode, + input [17:0] qpll_drp_fsm, + input [1:0] qpll_drp_done, + input [1:0] qpll_drp_reset, + input [1:0] qpll_qplllock, + input [1:0] qpll_qplloutclk, + input [1:0] qpll_qplloutrefclk, + output qpll_qplld, + output [1:0] qpll_qpllreset, + output qpll_drp_clk, + output qpll_drp_rst_n, + output qpll_drp_ovrd, + output qpll_drp_gen3, + output qpll_drp_start, + + //----------------------------------------------------------------------------------------------------------------// + // 3. AXI-S Interface // + //----------------------------------------------------------------------------------------------------------------// + + // Common + output user_clk_out, + output reg user_reset_out, + output user_lnk_up, + output wire user_app_rdy, + + // AXI TX + //----------- + output [5:0] tx_buf_av, + output tx_err_drop, + output tx_cfg_req, + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, + input s_axis_tx_tvalid, + output s_axis_tx_tready, + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, + input s_axis_tx_tlast, + input [3:0] s_axis_tx_tuser, + input tx_cfg_gnt, + + // AXI RX + //----------- + output [C_DATA_WIDTH-1:0] m_axis_rx_tdata, + output m_axis_rx_tvalid, + input m_axis_rx_tready, + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, + output m_axis_rx_tlast, + output [21:0] m_axis_rx_tuser, + input rx_np_ok, + input rx_np_req, + + // Flow Control + output [11:0] fc_cpld, + output [7:0] fc_cplh, + output [11:0] fc_npd, + output [7:0] fc_nph, + output [11:0] fc_pd, + output [7:0] fc_ph, + input [2:0] fc_sel, + + + //----------------------------------------------------------------------------------------------------------------// + // 4. Configuration (CFG) Interface // + //----------------------------------------------------------------------------------------------------------------// + + //------------------------------------------------// + // EP and RP // + //------------------------------------------------// + output wire [31:0] cfg_mgmt_do, + output wire cfg_mgmt_rd_wr_done, + + output wire [15:0] cfg_status, + output wire [15:0] cfg_command, + output wire [15:0] cfg_dstatus, + output wire [15:0] cfg_dcommand, + output wire [15:0] cfg_lstatus, + output wire [15:0] cfg_lcommand, + output wire [15:0] cfg_dcommand2, + output [2:0] cfg_pcie_link_state, + + output wire cfg_pmcsr_pme_en, + output wire [1:0] cfg_pmcsr_powerstate, + output wire cfg_pmcsr_pme_status, + output wire cfg_received_func_lvl_rst, + + // Management Interface + input wire [31:0] cfg_mgmt_di, + input wire [3:0] cfg_mgmt_byte_en, + input wire [9:0] cfg_mgmt_dwaddr, + input wire cfg_mgmt_wr_en, + input wire cfg_mgmt_rd_en, + input wire cfg_mgmt_wr_readonly, + + // Error Reporting Interface + input wire cfg_err_ecrc, + input wire cfg_err_ur, + input wire cfg_err_cpl_timeout, + input wire cfg_err_cpl_unexpect, + input wire cfg_err_cpl_abort, + input wire cfg_err_posted, + input wire cfg_err_cor, + input wire cfg_err_atomic_egress_blocked, + input wire cfg_err_internal_cor, + input wire cfg_err_malformed, + input wire cfg_err_mc_blocked, + input wire cfg_err_poisoned, + input wire cfg_err_norecovery, + input wire [47:0] cfg_err_tlp_cpl_header, + output wire cfg_err_cpl_rdy, + input wire cfg_err_locked, + input wire cfg_err_acs, + input wire cfg_err_internal_uncor, + + input wire cfg_trn_pending, + input wire cfg_pm_halt_aspm_l0s, + input wire cfg_pm_halt_aspm_l1, + input wire cfg_pm_force_state_en, + input wire [1:0] cfg_pm_force_state, + + input wire [63:0] cfg_dsn, + output cfg_msg_received, + output [15:0] cfg_msg_data, + + //------------------------------------------------// + // EP Only // + //------------------------------------------------// + + // Interrupt Interface Signals + input wire cfg_interrupt, + output wire cfg_interrupt_rdy, + input wire cfg_interrupt_assert, + input wire [7:0] cfg_interrupt_di, + output wire [7:0] cfg_interrupt_do, + output wire [2:0] cfg_interrupt_mmenable, + output wire cfg_interrupt_msienable, + output wire cfg_interrupt_msixenable, + output wire cfg_interrupt_msixfm, + input wire cfg_interrupt_stat, + input wire [4:0] cfg_pciecap_interrupt_msgnum, + + + output cfg_to_turnoff, + input wire cfg_turnoff_ok, + output wire [7:0] cfg_bus_number, + output wire [4:0] cfg_device_number, + output wire [2:0] cfg_function_number, + input wire cfg_pm_wake, + + output wire cfg_msg_received_pm_as_nak, + output wire cfg_msg_received_setslotpowerlimit, + + //------------------------------------------------// + // RP Only // + //------------------------------------------------// + input wire cfg_pm_send_pme_to, + input wire [7:0] cfg_ds_bus_number, + input wire [4:0] cfg_ds_device_number, + input wire [2:0] cfg_ds_function_number, + + input wire cfg_mgmt_wr_rw1c_as_rw, + + output wire cfg_bridge_serr_en, + output wire cfg_slot_control_electromech_il_ctl_pulse, + output wire cfg_root_control_syserr_corr_err_en, + output wire cfg_root_control_syserr_non_fatal_err_en, + output wire cfg_root_control_syserr_fatal_err_en, + output wire cfg_root_control_pme_int_en, + output wire cfg_aer_rooterr_corr_err_reporting_en, + output wire cfg_aer_rooterr_non_fatal_err_reporting_en, + output wire cfg_aer_rooterr_fatal_err_reporting_en, + output wire cfg_aer_rooterr_corr_err_received, + output wire cfg_aer_rooterr_non_fatal_err_received, + output wire cfg_aer_rooterr_fatal_err_received, + + output wire cfg_msg_received_err_cor, + output wire cfg_msg_received_err_non_fatal, + output wire cfg_msg_received_err_fatal, + output wire cfg_msg_received_pm_pme, + output wire cfg_msg_received_pme_to_ack, + output wire cfg_msg_received_assert_int_a, + output wire cfg_msg_received_assert_int_b, + output wire cfg_msg_received_assert_int_c, + output wire cfg_msg_received_assert_int_d, + output wire cfg_msg_received_deassert_int_a, + output wire cfg_msg_received_deassert_int_b, + output wire cfg_msg_received_deassert_int_c, + output wire cfg_msg_received_deassert_int_d, + + //----------------------------------------------------------------------------------------------------------------// + // 5. Physical Layer Control and Status (PL) Interface // + //----------------------------------------------------------------------------------------------------------------// + + //------------------------------------------------// + // EP and RP // + //------------------------------------------------// + input wire [1:0] pl_directed_link_change, + input wire [1:0] pl_directed_link_width, + input wire pl_directed_link_speed, + input wire pl_directed_link_auton, + input wire pl_upstream_prefer_deemph, + + + + output wire pl_sel_lnk_rate, + output wire [1:0] pl_sel_lnk_width, + output wire [5:0] pl_ltssm_state, + output wire [1:0] pl_lane_reversal_mode, + + output wire pl_phy_lnk_up, + output wire [2:0] pl_tx_pm_state, + output wire [1:0] pl_rx_pm_state, + + output wire pl_link_upcfg_cap, + output wire pl_link_gen2_cap, + output wire pl_link_partner_gen2_supported, + output wire [2:0] pl_initial_link_width, + + output wire pl_directed_change_done, + + //------------------------------------------------// + // EP Only // + //------------------------------------------------// + output wire pl_received_hot_rst, + + //------------------------------------------------// + // RP Only // + //------------------------------------------------// + input wire pl_transmit_hot_rst, + input wire pl_downstream_deemph_source, + + //----------------------------------------------------------------------------------------------------------------// + // 6. AER interface // + //----------------------------------------------------------------------------------------------------------------// + + input wire [127:0] cfg_err_aer_headerlog, + input wire [4:0] cfg_aer_interrupt_msgnum, + output wire cfg_err_aer_headerlog_set, + output wire cfg_aer_ecrc_check_en, + output wire cfg_aer_ecrc_gen_en, + + //----------------------------------------------------------------------------------------------------------------// + // 7. VC interface // + //----------------------------------------------------------------------------------------------------------------// + + output wire [6:0] cfg_vc_tcvc_map, + + //----------------------------------------------------------------------------------------------------------------// + // PCIe Fast Config: ICAP primitive Interface // + //----------------------------------------------------------------------------------------------------------------// + + input wire icap_clk, + input wire icap_csib, + input wire icap_rdwrb, + input wire [31:0] icap_i, + output wire [31:0] icap_o, + + + + input [ 2:0] pipe_txprbssel, + input [ 2:0] pipe_rxprbssel, + input pipe_txprbsforceerr, + input pipe_rxprbscntreset, + input [ 2:0] pipe_loopback, + + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_rxprbserr, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_txinhibit, + + + output [4:0] pipe_rst_fsm, + output [11:0] pipe_qrst_fsm, + output [(LINK_CAP_MAX_LINK_WIDTH*5)-1:0] pipe_rate_fsm, + output [(LINK_CAP_MAX_LINK_WIDTH*6)-1:0] pipe_sync_fsm_tx, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] pipe_sync_fsm_rx, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] pipe_drp_fsm, + + output pipe_rst_idle, + output pipe_qrst_idle, + output pipe_rate_idle, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_eyescandataerror, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] pipe_rxstatus, + output [(LINK_CAP_MAX_LINK_WIDTH*15)-1:0] pipe_dmonitorout, + + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_cpll_lock, + output [(LINK_CAP_MAX_LINK_WIDTH-1)>>2:0] pipe_qpll_lock, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxpmaresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] pipe_rxbufstatus, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txphaligndone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txphinitdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txdlysresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxphaligndone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxdlysresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxsyncdone, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] pipe_rxdisperr, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] pipe_rxnotintable, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxcommadet, + + output [LINK_CAP_MAX_LINK_WIDTH-1:0] gt_ch_drp_rdy, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_0, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_1, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_2, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_3, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_4, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_5, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_6, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_7, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_8, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_9, + output [31:0] pipe_debug, + + //--------------Channel DRP--------------------------------- + output ext_ch_gt_drpclk, + input [(LINK_CAP_MAX_LINK_WIDTH*9)-1:0] ext_ch_gt_drpaddr, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpen, + input [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0] ext_ch_gt_drpdi, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpwe, + + output [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0] ext_ch_gt_drpdo, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drprdy, + + + //----------------------------------------------------------------------------------------------------------------// + // PCIe Fast Config: STARTUP primitive Interface // + //----------------------------------------------------------------------------------------------------------------// + + // This input should be used when the startup block is generated exteranl to the PCI Express Core + input startup_eos_in, // 1-bit input: This signal should be driven by the EOS output of the STARTUP primitive. + // These inputs and outputs may be use when the startup block is generated internal to the PCI Express Core. + output startup_cfgclk, // 1-bit output: Configuration main clock output + output startup_cfgmclk, // 1-bit output: Configuration internal oscillator clock output + output startup_eos, // 1-bit output: Active high output signal indicating the End Of Startup + output startup_preq, // 1-bit output: PROGRAM request to fabric output + input startup_clk, // 1-bit input: User start-up clock input + input startup_gsr, // 1-bit input: Global Set/Reset input (GSR cannot be used for the port name) + input startup_gts, // 1-bit input: Global 3-state input (GTS cannot be used for the port name) + input startup_keyclearb, // 1-bit input: Clear AES Decrypter Key input from Battery-Backed RAM (BBRAM) + input startup_pack, // 1-bit input: PROGRAM acknowledge input + input startup_usrcclko, // 1-bit input: User CCLK input + input startup_usrcclkts, // 1-bit input: User CCLK 3-state enable input + input startup_usrdoneo, // 1-bit input: User DONE pin output control + input startup_usrdonets, // 1-bit input: User DONE 3-state enable output + + //----------------------------------------------------------------------------------------------------------------// + // 8. PCIe DRP (PCIe DRP) Interface // + //----------------------------------------------------------------------------------------------------------------// + + input wire pcie_drp_clk, + input wire pcie_drp_en, + input wire pcie_drp_we, + input wire [8:0] pcie_drp_addr, + input wire [15:0] pcie_drp_di, + output wire pcie_drp_rdy, + output wire [15:0] pcie_drp_do, + //----------------------------------------------------------------------------------------------------------------// + // PIPE PORTS to TOP Level For PIPE SIMULATION with 3rd Party IP/BFM/Xilinx BFM + //----------------------------------------------------------------------------------------------------------------// + input wire [11:0] common_commands_in, + input wire [24:0] pipe_rx_0_sigs, + input wire [24:0] pipe_rx_1_sigs, + input wire [24:0] pipe_rx_2_sigs, + input wire [24:0] pipe_rx_3_sigs, + input wire [24:0] pipe_rx_4_sigs, + input wire [24:0] pipe_rx_5_sigs, + input wire [24:0] pipe_rx_6_sigs, + input wire [24:0] pipe_rx_7_sigs, + + output wire [11:0] common_commands_out, + output wire [24:0] pipe_tx_0_sigs, + output wire [24:0] pipe_tx_1_sigs, + output wire [24:0] pipe_tx_2_sigs, + output wire [24:0] pipe_tx_3_sigs, + output wire [24:0] pipe_tx_4_sigs, + output wire [24:0] pipe_tx_5_sigs, + output wire [24:0] pipe_tx_6_sigs, + output wire [24:0] pipe_tx_7_sigs, + + //----------------------------------------------------------------------------------------------------------------// + // 9. PCIe ID Interface // + //----------------------------------------------------------------------------------------------------------------// + input wire [15:0] cfg_dev_id_pf0, + input wire [15:0] cfg_ven_id, + input wire [7:0] cfg_rev_id_pf0, + input wire [15:0] cfg_subsys_id_pf0, + input wire [15:0] cfg_subsys_ven_id, + + //----------------------------------------------------------------------------------------------------------------// + // 10. System(SYS) Interface // + //----------------------------------------------------------------------------------------------------------------// + + input wire pipe_mmcm_rst_n, // Async | Async + input wire sys_clk, + input wire sys_rst_n +); + + wire user_clk; + wire user_clk2; + wire pipe_clk; + + wire [15:0] cfg_vend_id_int; + wire [15:0] cfg_dev_id_int; + wire [7:0] cfg_rev_id_int; + wire [15:0] cfg_subsys_vend_id_int; + wire [15:0] cfg_subsys_id_int; + + assign cfg_vend_id_int = CFG_VEND_ID; + assign cfg_dev_id_int = CFG_DEV_ID; + assign cfg_rev_id_int = CFG_REV_ID; + assign cfg_subsys_vend_id_int = CFG_SUBSYS_VEND_ID; + assign cfg_subsys_id_int = CFG_SUBSYS_ID; + + // PIPE Interface Wires + wire phy_rdy_n; + wire pipe_rx0_polarity_gt; + wire pipe_rx1_polarity_gt; + wire pipe_rx2_polarity_gt; + wire pipe_rx3_polarity_gt; + wire pipe_rx4_polarity_gt; + wire pipe_rx5_polarity_gt; + wire pipe_rx6_polarity_gt; + wire pipe_rx7_polarity_gt; + wire pipe_tx_deemph_gt; + wire [2:0] pipe_tx_margin_gt; + wire pipe_tx_rate_gt; + wire pipe_tx_rcvr_det_gt; + wire [1:0] pipe_tx0_char_is_k_gt; + wire pipe_tx0_compliance_gt; + wire [15:0] pipe_tx0_data_gt; + wire pipe_tx0_elec_idle_gt; + wire [1:0] pipe_tx0_powerdown_gt; + wire [1:0] pipe_tx1_char_is_k_gt; + wire pipe_tx1_compliance_gt; + wire [15:0] pipe_tx1_data_gt; + wire pipe_tx1_elec_idle_gt; + wire [1:0] pipe_tx1_powerdown_gt; + wire [1:0] pipe_tx2_char_is_k_gt; + wire pipe_tx2_compliance_gt; + wire [15:0] pipe_tx2_data_gt; + wire pipe_tx2_elec_idle_gt; + wire [1:0] pipe_tx2_powerdown_gt; + wire [1:0] pipe_tx3_char_is_k_gt; + wire pipe_tx3_compliance_gt; + wire [15:0] pipe_tx3_data_gt; + wire pipe_tx3_elec_idle_gt; + wire [1:0] pipe_tx3_powerdown_gt; + wire [1:0] pipe_tx4_char_is_k_gt; + wire pipe_tx4_compliance_gt; + wire [15:0] pipe_tx4_data_gt; + wire pipe_tx4_elec_idle_gt; + wire [1:0] pipe_tx4_powerdown_gt; + wire [1:0] pipe_tx5_char_is_k_gt; + wire pipe_tx5_compliance_gt; + wire [15:0] pipe_tx5_data_gt; + wire pipe_tx5_elec_idle_gt; + wire [1:0] pipe_tx5_powerdown_gt; + wire [1:0] pipe_tx6_char_is_k_gt; + wire pipe_tx6_compliance_gt; + wire [15:0] pipe_tx6_data_gt; + wire pipe_tx6_elec_idle_gt; + wire [1:0] pipe_tx6_powerdown_gt; + wire [1:0] pipe_tx7_char_is_k_gt; + wire pipe_tx7_compliance_gt; + wire [15:0] pipe_tx7_data_gt; + wire pipe_tx7_elec_idle_gt; + wire [1:0] pipe_tx7_powerdown_gt; + + wire pipe_rx0_chanisaligned_gt; + wire [1:0] pipe_rx0_char_is_k_gt; + wire [15:0] pipe_rx0_data_gt; + wire pipe_rx0_elec_idle_gt; + wire pipe_rx0_phy_status_gt; + wire [2:0] pipe_rx0_status_gt; + wire pipe_rx0_valid_gt; + wire pipe_rx1_chanisaligned_gt; + wire [1:0] pipe_rx1_char_is_k_gt; + wire [15:0] pipe_rx1_data_gt; + wire pipe_rx1_elec_idle_gt; + wire pipe_rx1_phy_status_gt; + wire [2:0] pipe_rx1_status_gt; + wire pipe_rx1_valid_gt; + wire pipe_rx2_chanisaligned_gt; + wire [1:0] pipe_rx2_char_is_k_gt; + wire [15:0] pipe_rx2_data_gt; + wire pipe_rx2_elec_idle_gt; + wire pipe_rx2_phy_status_gt; + wire [2:0] pipe_rx2_status_gt; + wire pipe_rx2_valid_gt; + wire pipe_rx3_chanisaligned_gt; + wire [1:0] pipe_rx3_char_is_k_gt; + wire [15:0] pipe_rx3_data_gt; + wire pipe_rx3_elec_idle_gt; + wire pipe_rx3_phy_status_gt; + wire [2:0] pipe_rx3_status_gt; + wire pipe_rx3_valid_gt; + wire pipe_rx4_chanisaligned_gt; + wire [1:0] pipe_rx4_char_is_k_gt; + wire [15:0] pipe_rx4_data_gt; + wire pipe_rx4_elec_idle_gt; + wire pipe_rx4_phy_status_gt; + wire [2:0] pipe_rx4_status_gt; + wire pipe_rx4_valid_gt; + wire pipe_rx5_chanisaligned_gt; + wire [1:0] pipe_rx5_char_is_k_gt; + wire [15:0] pipe_rx5_data_gt; + wire pipe_rx5_elec_idle_gt; + wire pipe_rx5_phy_status_gt; + wire [2:0] pipe_rx5_status_gt; + wire pipe_rx5_valid_gt; + wire pipe_rx6_chanisaligned_gt; + wire [1:0] pipe_rx6_char_is_k_gt; + wire [15:0] pipe_rx6_data_gt; + wire pipe_rx6_elec_idle_gt; + wire pipe_rx6_phy_status_gt; + wire [2:0] pipe_rx6_status_gt; + wire pipe_rx6_valid_gt; + wire pipe_rx7_chanisaligned_gt; + wire [1:0] pipe_rx7_char_is_k_gt; + wire [15:0] pipe_rx7_data_gt; + wire pipe_rx7_elec_idle_gt; + wire pipe_rx7_phy_status_gt; + wire [2:0] pipe_rx7_status_gt; + wire pipe_rx7_valid_gt; + wire [3:0] cfg_link_status_negotiated_width; + wire [1:0] cfg_link_status_current_speed; + + + (* ASYNC_REG = "TRUE" *) reg user_lnk_up_mux; + (* KEEP = "TRUE", ASYNC_REG = "TRUE" *) reg user_lnk_up_int; + reg user_reset_int; + + reg bridge_reset_int; + reg bridge_reset_d; + wire user_rst_n; + reg pl_received_hot_rst_q; + wire pl_received_hot_rst_wire; + wire pl_received_hot_rst_sync; + reg pl_phy_lnk_up_q; + wire pl_phy_lnk_up_wire; + wire pl_phy_lnk_up_sync; + wire sys_or_hot_rst; + wire trn_lnk_up; + + wire [5:0] pl_ltssm_state_int; + wire user_app_rdy_req; + + localparam TCQ = 100; + localparam ENABLE_FAST_SIM_TRAINING = "TRUE"; + + assign user_lnk_up = user_lnk_up_int; + + + assign user_app_rdy = 1'b1; + assign pl_ltssm_state = pl_ltssm_state_int; + assign pl_phy_lnk_up = pl_phy_lnk_up_q; + assign pl_received_hot_rst = pl_received_hot_rst_q; + + // CDC on PCIe block outputs The source clock of these pins is in + // the pipe_clk domain. + xpm_cdc_single #( + .DEST_SYNC_FF (2), + .SRC_INPUT_REG (0) + ) phy_lnk_up_cdc ( + .src_clk (pipe_clk), + .src_in (pl_phy_lnk_up_wire), + .dest_clk (user_clk_out), + .dest_out (pl_phy_lnk_up_sync) + ); + xpm_cdc_single #( + .DEST_SYNC_FF (2), + .SRC_INPUT_REG (0) + ) pl_received_hot_rst_cdc ( + .src_clk (pipe_clk), + .src_in (pl_received_hot_rst_wire), + .dest_clk (user_clk_out), + .dest_out (pl_received_hot_rst_sync) + ); + + // Register block outputs pl_received_hot_rst and phy_lnk_up to ease timing on block output + assign sys_or_hot_rst = !sys_rst_n || pl_received_hot_rst_q; + always @(posedge user_clk_out) + begin + if (!sys_rst_n) begin + pl_received_hot_rst_q <= #TCQ 1'b0; + pl_phy_lnk_up_q <= #TCQ 1'b0; + end else begin + pl_received_hot_rst_q <= #TCQ pl_received_hot_rst_sync; + pl_phy_lnk_up_q <= #TCQ pl_phy_lnk_up_sync; + end + end + // Generate user_lnk_up_mux + always @(posedge user_clk_out) + begin + if (!sys_rst_n) begin + user_lnk_up_mux <= #TCQ 1'b0; + end else begin + user_lnk_up_mux <= #TCQ user_lnk_up_int; + end + end + + always @(posedge user_clk_out) + begin + if (!sys_rst_n) begin + user_lnk_up_int <= #TCQ 1'b0; + end else begin + user_lnk_up_int <= #TCQ trn_lnk_up; + end + end + + + // Generate user_reset_out // + // Once user reset output of PCIE and Phy Layer is active, de-assert reset // + // Only assert reset if system reset or hot reset is seen. Keep AXI backend/user application alive otherwise // + //------------------------------------------------------------------------------------------------------------------// + + always @(posedge user_clk_out or posedge sys_or_hot_rst) + begin + if (sys_or_hot_rst) begin + user_reset_int <= #TCQ 1'b1; + end else if (user_rst_n && pl_phy_lnk_up_q) begin + user_reset_int <= #TCQ 1'b0; + end + end + + // Invert active low reset to active high AXI reset + always @(posedge user_clk_out or posedge sys_or_hot_rst) + begin + if (sys_or_hot_rst) begin + user_reset_out <= #TCQ 1'b1; + end else begin + user_reset_out <= #TCQ user_reset_int; + end + end + always @(posedge user_clk_out or posedge sys_or_hot_rst) + begin + if (sys_or_hot_rst) begin + bridge_reset_int <= #TCQ 1'b1; + end else if (user_rst_n && pl_phy_lnk_up_q) begin + bridge_reset_int <= #TCQ 1'b0; + end + end + + // Invert active low reset to active high AXI reset + always @(posedge user_clk_out or posedge sys_or_hot_rst) + begin + if (sys_or_hot_rst) begin + bridge_reset_d <= #TCQ 1'b1; + end else begin + bridge_reset_d <= #TCQ bridge_reset_int; + end + end + + //------------------------------------------------------------------------------------------------------------------// + // **** PCI Express Core Wrapper **** // + // The PCI Express Core Wrapper includes the following: // + // 1) AXI Streaming Bridge // + // 2) PCIE 2_1 Hard Block // + // 3) PCIE PIPE Interface Pipeline // + //------------------------------------------------------------------------------------------------------------------// +pcie_7x_0_pcie_top # ( + .PIPE_PIPELINE_STAGES ( PIPE_PIPELINE_STAGES ), + .AER_BASE_PTR ( AER_BASE_PTR ), + .AER_CAP_ECRC_CHECK_CAPABLE ( AER_CAP_ECRC_CHECK_CAPABLE ), + .AER_CAP_ECRC_GEN_CAPABLE ( AER_CAP_ECRC_GEN_CAPABLE ), + .AER_CAP_ID ( AER_CAP_ID ), + .AER_CAP_MULTIHEADER ( AER_CAP_MULTIHEADER ), + .AER_CAP_NEXTPTR ( AER_CAP_NEXTPTR ), + .AER_CAP_ON ( AER_CAP_ON ), + .AER_CAP_OPTIONAL_ERR_SUPPORT ( AER_CAP_OPTIONAL_ERR_SUPPORT ), + .AER_CAP_PERMIT_ROOTERR_UPDATE ( AER_CAP_PERMIT_ROOTERR_UPDATE ), + .AER_CAP_VERSION ( AER_CAP_VERSION ), + .ALLOW_X8_GEN2 ( ALLOW_X8_GEN2 ), + .BAR0 ( BAR0 ), + .BAR1 ( BAR1 ), + .BAR2 ( BAR2 ), + .BAR3 ( BAR3 ), + .BAR4 ( BAR4 ), + .BAR5 ( BAR5 ), + .C_DATA_WIDTH ( C_DATA_WIDTH ), + .CAPABILITIES_PTR ( CAPABILITIES_PTR ), + .CARDBUS_CIS_POINTER ( CARDBUS_CIS_POINTER ), + .CFG_ECRC_ERR_CPLSTAT ( CFG_ECRC_ERR_CPLSTAT ), + .CLASS_CODE ( CLASS_CODE ), + .CMD_INTX_IMPLEMENTED ( CMD_INTX_IMPLEMENTED ), + .CPL_TIMEOUT_DISABLE_SUPPORTED ( CPL_TIMEOUT_DISABLE_SUPPORTED ), + .CPL_TIMEOUT_RANGES_SUPPORTED ( CPL_TIMEOUT_RANGES_SUPPORTED ), + .CRM_MODULE_RSTS ( CRM_MODULE_RSTS ), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ), + .DEV_CAP_ENDPOINT_L0S_LATENCY ( DEV_CAP_ENDPOINT_L0S_LATENCY ), + .DEV_CAP_ENDPOINT_L1_LATENCY ( DEV_CAP_ENDPOINT_L1_LATENCY ), + .DEV_CAP_EXT_TAG_SUPPORTED ( DEV_CAP_EXT_TAG_SUPPORTED ), + .DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ( DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ), + .DEV_CAP_MAX_PAYLOAD_SUPPORTED ( DEV_CAP_MAX_PAYLOAD_SUPPORTED ), + .DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ( DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ), + .DEV_CAP_ROLE_BASED_ERROR ( DEV_CAP_ROLE_BASED_ERROR ), + .DEV_CAP_RSVD_14_12 ( DEV_CAP_RSVD_14_12 ), + .DEV_CAP_RSVD_17_16 ( DEV_CAP_RSVD_17_16 ), + .DEV_CAP_RSVD_31_29 ( DEV_CAP_RSVD_31_29 ), + .DEV_CONTROL_AUX_POWER_SUPPORTED ( DEV_CONTROL_AUX_POWER_SUPPORTED ), + .DEV_CONTROL_EXT_TAG_DEFAULT ( DEV_CONTROL_EXT_TAG_DEFAULT ), + .DISABLE_ASPM_L1_TIMER ( DISABLE_ASPM_L1_TIMER ), + .DISABLE_BAR_FILTERING ( DISABLE_BAR_FILTERING ), + .DISABLE_ID_CHECK ( DISABLE_ID_CHECK ), + .DISABLE_LANE_REVERSAL ( DISABLE_LANE_REVERSAL ), + .DISABLE_RX_POISONED_RESP ( DISABLE_RX_POISONED_RESP ), + .DISABLE_RX_TC_FILTER ( DISABLE_RX_TC_FILTER ), + .DISABLE_SCRAMBLING ( DISABLE_SCRAMBLING ), + .DNSTREAM_LINK_NUM ( DNSTREAM_LINK_NUM ), + .DSN_BASE_PTR ( DSN_BASE_PTR ), + .DSN_CAP_ID ( DSN_CAP_ID ), + .DSN_CAP_NEXTPTR ( DSN_CAP_NEXTPTR ), + .DSN_CAP_ON ( DSN_CAP_ON ), + .DSN_CAP_VERSION ( DSN_CAP_VERSION ), + .DEV_CAP2_ARI_FORWARDING_SUPPORTED ( DEV_CAP2_ARI_FORWARDING_SUPPORTED ), + .DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED ( DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED ), + .DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED ( DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED ), + .DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED ( DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED ), + .DEV_CAP2_CAS128_COMPLETER_SUPPORTED ( DEV_CAP2_CAS128_COMPLETER_SUPPORTED ), + .DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED ( DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED ), + .DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED ( DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED ), + .DEV_CAP2_LTR_MECHANISM_SUPPORTED ( DEV_CAP2_LTR_MECHANISM_SUPPORTED ), + .DEV_CAP2_MAX_ENDEND_TLP_PREFIXES ( DEV_CAP2_MAX_ENDEND_TLP_PREFIXES ), + .DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING ( DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING ), + .DEV_CAP2_TPH_COMPLETER_SUPPORTED ( DEV_CAP2_TPH_COMPLETER_SUPPORTED ), + .DISABLE_ERR_MSG ( DISABLE_ERR_MSG ), + .DISABLE_LOCKED_FILTER ( DISABLE_LOCKED_FILTER ), + .DISABLE_PPM_FILTER ( DISABLE_PPM_FILTER ), + .ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED ( ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED ), + .ENABLE_MSG_ROUTE ( ENABLE_MSG_ROUTE ), + .ENABLE_RX_TD_ECRC_TRIM ( ENABLE_RX_TD_ECRC_TRIM ), + .ENTER_RVRY_EI_L0 ( ENTER_RVRY_EI_L0 ), + .EXIT_LOOPBACK_ON_EI ( EXIT_LOOPBACK_ON_EI ), + .EXPANSION_ROM ( EXPANSION_ROM ), + .EXT_CFG_CAP_PTR ( EXT_CFG_CAP_PTR ), + .EXT_CFG_XP_CAP_PTR ( EXT_CFG_XP_CAP_PTR ), + .HEADER_TYPE ( HEADER_TYPE ), + .INFER_EI ( INFER_EI ), + .INTERRUPT_PIN ( INTERRUPT_PIN ), + .INTERRUPT_STAT_AUTO ( INTERRUPT_STAT_AUTO ), + .IS_SWITCH ( IS_SWITCH ), + .LAST_CONFIG_DWORD ( LAST_CONFIG_DWORD ), + .LINK_CAP_ASPM_OPTIONALITY ( LINK_CAP_ASPM_OPTIONALITY ), + .LINK_CAP_ASPM_SUPPORT ( LINK_CAP_ASPM_SUPPORT ), + .LINK_CAP_CLOCK_POWER_MANAGEMENT ( LINK_CAP_CLOCK_POWER_MANAGEMENT ), + .LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ( LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_GEN2 ), + .LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP ( LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP ), + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .LINK_CAP_RSVD_23 ( LINK_CAP_RSVD_23 ), + .LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ( LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ), + .LINK_CONTROL_RCB ( LINK_CONTROL_RCB ), + .LINK_CTRL2_DEEMPHASIS ( LINK_CTRL2_DEEMPHASIS ), + .LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ( LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ), + .LINK_CTRL2_TARGET_LINK_SPEED ( LINK_CTRL2_TARGET_LINK_SPEED ), + .LINK_STATUS_SLOT_CLOCK_CONFIG ( LINK_STATUS_SLOT_CLOCK_CONFIG ), + .LL_ACK_TIMEOUT ( LL_ACK_TIMEOUT ), + .LL_ACK_TIMEOUT_EN ( LL_ACK_TIMEOUT_EN ), + .LL_ACK_TIMEOUT_FUNC ( LL_ACK_TIMEOUT_FUNC ), + .LL_REPLAY_TIMEOUT ( LL_REPLAY_TIMEOUT ), + .LL_REPLAY_TIMEOUT_EN ( LL_REPLAY_TIMEOUT_EN ), + .LL_REPLAY_TIMEOUT_FUNC ( LL_REPLAY_TIMEOUT_FUNC ), + .LTSSM_MAX_LINK_WIDTH ( LTSSM_MAX_LINK_WIDTH ), + .MPS_FORCE ( MPS_FORCE), + .MSI_BASE_PTR ( MSI_BASE_PTR ), + .MSI_CAP_ID ( MSI_CAP_ID ), + .MSI_CAP_MULTIMSGCAP ( MSI_CAP_MULTIMSGCAP ), + .MSI_CAP_MULTIMSG_EXTENSION ( MSI_CAP_MULTIMSG_EXTENSION ), + .MSI_CAP_NEXTPTR ( MSI_CAP_NEXTPTR ), + .MSI_CAP_ON ( MSI_CAP_ON ), + .MSI_CAP_PER_VECTOR_MASKING_CAPABLE ( MSI_CAP_PER_VECTOR_MASKING_CAPABLE ), + .MSI_CAP_64_BIT_ADDR_CAPABLE ( MSI_CAP_64_BIT_ADDR_CAPABLE ), + .MSIX_BASE_PTR ( MSIX_BASE_PTR ), + .MSIX_CAP_ID ( MSIX_CAP_ID ), + .MSIX_CAP_NEXTPTR ( MSIX_CAP_NEXTPTR ), + .MSIX_CAP_ON ( MSIX_CAP_ON ), + .MSIX_CAP_PBA_BIR ( MSIX_CAP_PBA_BIR ), + .MSIX_CAP_PBA_OFFSET ( {3'b000,MSIX_CAP_PBA_OFFSET[28:3]} ), + .MSIX_CAP_TABLE_BIR ( MSIX_CAP_TABLE_BIR ), + .MSIX_CAP_TABLE_OFFSET ( {3'b000,MSIX_CAP_TABLE_OFFSET[28:3]} ), + .MSIX_CAP_TABLE_SIZE ( MSIX_CAP_TABLE_SIZE ), + .N_FTS_COMCLK_GEN1 ( N_FTS_COMCLK_GEN1 ), + .N_FTS_COMCLK_GEN2 ( N_FTS_COMCLK_GEN2 ), + .N_FTS_GEN1 ( N_FTS_GEN1 ), + .N_FTS_GEN2 ( N_FTS_GEN2 ), + .PCIE_BASE_PTR ( PCIE_BASE_PTR ), + .PCIE_CAP_CAPABILITY_ID ( PCIE_CAP_CAPABILITY_ID ), + .PCIE_CAP_CAPABILITY_VERSION ( PCIE_CAP_CAPABILITY_VERSION ), + .PCIE_CAP_DEVICE_PORT_TYPE ( PCIE_CAP_DEVICE_PORT_TYPE ), + .PCIE_CAP_NEXTPTR ( PCIE_CAP_NEXTPTR ), + .PCIE_CAP_ON ( PCIE_CAP_ON ), + .PCIE_CAP_RSVD_15_14 ( PCIE_CAP_RSVD_15_14 ), + .PCIE_CAP_SLOT_IMPLEMENTED ( PCIE_CAP_SLOT_IMPLEMENTED ), + .PCIE_REVISION ( PCIE_REVISION ), + .PL_AUTO_CONFIG ( PL_AUTO_CONFIG ), + + // synthesis translate_off + .PL_FAST_TRAIN ( ENABLE_FAST_SIM_TRAINING ), + // synthesis translate_on + + .PM_ASPML0S_TIMEOUT ( PM_ASPML0S_TIMEOUT ), + .PM_ASPML0S_TIMEOUT_EN ( PM_ASPML0S_TIMEOUT_EN ), + .PM_ASPML0S_TIMEOUT_FUNC ( PM_ASPML0S_TIMEOUT_FUNC ), + .PM_ASPM_FASTEXIT ( PM_ASPM_FASTEXIT ), + .PM_BASE_PTR ( PM_BASE_PTR ), + .PM_CAP_AUXCURRENT ( PM_CAP_AUXCURRENT ), + .PM_CAP_D1SUPPORT ( PM_CAP_D1SUPPORT ), + .PM_CAP_D2SUPPORT ( PM_CAP_D2SUPPORT ), + .PM_CAP_DSI ( PM_CAP_DSI ), + .PM_CAP_ID ( PM_CAP_ID ), + .PM_CAP_NEXTPTR ( PM_CAP_NEXTPTR ), + .PM_CAP_ON ( PM_CAP_ON ), + .PM_CAP_PME_CLOCK ( PM_CAP_PME_CLOCK ), + .PM_CAP_PMESUPPORT ( PM_CAP_PMESUPPORT ), + .PM_CAP_RSVD_04 ( PM_CAP_RSVD_04 ), + .PM_CAP_VERSION ( PM_CAP_VERSION ), + .PM_CSR_B2B3 ( PM_CSR_B2B3 ), + .PM_CSR_BPCCEN ( PM_CSR_BPCCEN ), + .PM_CSR_NOSOFTRST ( PM_CSR_NOSOFTRST ), + .PM_DATA0 ( PM_DATA0 ), + .PM_DATA1 ( PM_DATA1 ), + .PM_DATA2 ( PM_DATA2 ), + .PM_DATA3 ( PM_DATA3 ), + .PM_DATA4 ( PM_DATA4 ), + .PM_DATA5 ( PM_DATA5 ), + .PM_DATA6 ( PM_DATA6 ), + .PM_DATA7 ( PM_DATA7 ), + .PM_DATA_SCALE0 ( PM_DATA_SCALE0 ), + .PM_DATA_SCALE1 ( PM_DATA_SCALE1 ), + .PM_DATA_SCALE2 ( PM_DATA_SCALE2 ), + .PM_DATA_SCALE3 ( PM_DATA_SCALE3 ), + .PM_DATA_SCALE4 ( PM_DATA_SCALE4 ), + .PM_DATA_SCALE5 ( PM_DATA_SCALE5 ), + .PM_DATA_SCALE6 ( PM_DATA_SCALE6 ), + .PM_DATA_SCALE7 ( PM_DATA_SCALE7 ), + .PM_MF ( PM_MF ), + .RBAR_BASE_PTR ( RBAR_BASE_PTR ), + .RBAR_CAP_CONTROL_ENCODEDBAR0 ( RBAR_CAP_CONTROL_ENCODEDBAR0 ), + .RBAR_CAP_CONTROL_ENCODEDBAR1 ( RBAR_CAP_CONTROL_ENCODEDBAR1 ), + .RBAR_CAP_CONTROL_ENCODEDBAR2 ( RBAR_CAP_CONTROL_ENCODEDBAR2 ), + .RBAR_CAP_CONTROL_ENCODEDBAR3 ( RBAR_CAP_CONTROL_ENCODEDBAR3 ), + .RBAR_CAP_CONTROL_ENCODEDBAR4 ( RBAR_CAP_CONTROL_ENCODEDBAR4 ), + .RBAR_CAP_CONTROL_ENCODEDBAR5 ( RBAR_CAP_CONTROL_ENCODEDBAR5 ), + .RBAR_CAP_ID ( RBAR_CAP_ID), + .RBAR_CAP_INDEX0 ( RBAR_CAP_INDEX0 ), + .RBAR_CAP_INDEX1 ( RBAR_CAP_INDEX1 ), + .RBAR_CAP_INDEX2 ( RBAR_CAP_INDEX2 ), + .RBAR_CAP_INDEX3 ( RBAR_CAP_INDEX3 ), + .RBAR_CAP_INDEX4 ( RBAR_CAP_INDEX4 ), + .RBAR_CAP_INDEX5 ( RBAR_CAP_INDEX5 ), + .RBAR_CAP_NEXTPTR ( RBAR_CAP_NEXTPTR ), + .RBAR_CAP_ON ( RBAR_CAP_ON ), + .RBAR_CAP_SUP0 ( RBAR_CAP_SUP0 ), + .RBAR_CAP_SUP1 ( RBAR_CAP_SUP1 ), + .RBAR_CAP_SUP2 ( RBAR_CAP_SUP2 ), + .RBAR_CAP_SUP3 ( RBAR_CAP_SUP3 ), + .RBAR_CAP_SUP4 ( RBAR_CAP_SUP4 ), + .RBAR_CAP_SUP5 ( RBAR_CAP_SUP5 ), + .RBAR_CAP_VERSION ( RBAR_CAP_VERSION ), + .RBAR_NUM ( RBAR_NUM ), + .RECRC_CHK ( RECRC_CHK ), + .RECRC_CHK_TRIM ( RECRC_CHK_TRIM ), + .ROOT_CAP_CRS_SW_VISIBILITY ( ROOT_CAP_CRS_SW_VISIBILITY ), + .RP_AUTO_SPD ( RP_AUTO_SPD ), + .RP_AUTO_SPD_LOOPCNT ( RP_AUTO_SPD_LOOPCNT ), + .SELECT_DLL_IF ( SELECT_DLL_IF ), + .SLOT_CAP_ATT_BUTTON_PRESENT ( SLOT_CAP_ATT_BUTTON_PRESENT ), + .SLOT_CAP_ATT_INDICATOR_PRESENT ( SLOT_CAP_ATT_INDICATOR_PRESENT ), + .SLOT_CAP_ELEC_INTERLOCK_PRESENT ( SLOT_CAP_ELEC_INTERLOCK_PRESENT ), + .SLOT_CAP_HOTPLUG_CAPABLE ( SLOT_CAP_HOTPLUG_CAPABLE ), + .SLOT_CAP_HOTPLUG_SURPRISE ( SLOT_CAP_HOTPLUG_SURPRISE ), + .SLOT_CAP_MRL_SENSOR_PRESENT ( SLOT_CAP_MRL_SENSOR_PRESENT ), + .SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ( SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ), + .SLOT_CAP_PHYSICAL_SLOT_NUM ( SLOT_CAP_PHYSICAL_SLOT_NUM ), + .SLOT_CAP_POWER_CONTROLLER_PRESENT ( SLOT_CAP_POWER_CONTROLLER_PRESENT ), + .SLOT_CAP_POWER_INDICATOR_PRESENT ( SLOT_CAP_POWER_INDICATOR_PRESENT ), + .SLOT_CAP_SLOT_POWER_LIMIT_SCALE ( SLOT_CAP_SLOT_POWER_LIMIT_SCALE ), + .SLOT_CAP_SLOT_POWER_LIMIT_VALUE ( SLOT_CAP_SLOT_POWER_LIMIT_VALUE ), + .SPARE_BIT0 ( SPARE_BIT0 ), + .SPARE_BIT1 ( SPARE_BIT1 ), + .SPARE_BIT2 ( SPARE_BIT2 ), + .SPARE_BIT3 ( SPARE_BIT3 ), + .SPARE_BIT4 ( SPARE_BIT4 ), + .SPARE_BIT5 ( SPARE_BIT5 ), + .SPARE_BIT6 ( SPARE_BIT6 ), + .SPARE_BIT7 ( SPARE_BIT7 ), + .SPARE_BIT8 ( SPARE_BIT8 ), + .SPARE_BYTE0 ( SPARE_BYTE0 ), + .SPARE_BYTE1 ( SPARE_BYTE1 ), + .SPARE_BYTE2 ( SPARE_BYTE2 ), + .SPARE_BYTE3 ( SPARE_BYTE3 ), + .SPARE_WORD0 ( SPARE_WORD0 ), + .SPARE_WORD1 ( SPARE_WORD1 ), + .SPARE_WORD2 ( SPARE_WORD2 ), + .SPARE_WORD3 ( SPARE_WORD3 ), + .SSL_MESSAGE_AUTO ( SSL_MESSAGE_AUTO ), + .TECRC_EP_INV ( TECRC_EP_INV ), + .TL_RBYPASS ( TL_RBYPASS ), + .TL_RX_RAM_RADDR_LATENCY ( TL_RX_RAM_RADDR_LATENCY ), + .TL_RX_RAM_RDATA_LATENCY ( TL_RX_RAM_RDATA_LATENCY ), + .TL_RX_RAM_WRITE_LATENCY ( TL_RX_RAM_WRITE_LATENCY ), + .TL_TFC_DISABLE ( TL_TFC_DISABLE ), + .TL_TX_CHECKS_DISABLE ( TL_TX_CHECKS_DISABLE ), + .TL_TX_RAM_RADDR_LATENCY ( TL_TX_RAM_RADDR_LATENCY ), + .TL_TX_RAM_RDATA_LATENCY ( TL_TX_RAM_RDATA_LATENCY ), + .TL_TX_RAM_WRITE_LATENCY ( TL_TX_RAM_WRITE_LATENCY ), + .TRN_DW ( TRN_DW ), + .TRN_NP_FC ( TRN_NP_FC ), + .UPCONFIG_CAPABLE ( UPCONFIG_CAPABLE ), + .UPSTREAM_FACING ( UPSTREAM_FACING ), + .UR_ATOMIC ( UR_ATOMIC ), + .UR_CFG1 ( UR_CFG1 ), + .UR_INV_REQ ( UR_INV_REQ ), + .UR_PRS_RESPONSE ( UR_PRS_RESPONSE ), + .USER_CLK2_DIV2 ( USER_CLK2_DIV2 ), + .USER_CLK_FREQ ( USER_CLK_FREQ ), + .USE_RID_PINS ( USE_RID_PINS ), + .VC0_CPL_INFINITE ( VC0_CPL_INFINITE ), + .VC0_RX_RAM_LIMIT ( VC0_RX_RAM_LIMIT ), + .VC0_TOTAL_CREDITS_CD ( VC0_TOTAL_CREDITS_CD ), + .VC0_TOTAL_CREDITS_CH ( VC0_TOTAL_CREDITS_CH ), + .VC0_TOTAL_CREDITS_NPD ( VC0_TOTAL_CREDITS_NPD), + .VC0_TOTAL_CREDITS_NPH ( VC0_TOTAL_CREDITS_NPH ), + .VC0_TOTAL_CREDITS_PD ( VC0_TOTAL_CREDITS_PD ), + .VC0_TOTAL_CREDITS_PH ( VC0_TOTAL_CREDITS_PH ), + .VC0_TX_LASTPACKET ( VC0_TX_LASTPACKET ), + .VC_BASE_PTR ( VC_BASE_PTR ), + .VC_CAP_ID ( VC_CAP_ID ), + .VC_CAP_NEXTPTR ( VC_CAP_NEXTPTR ), + .VC_CAP_ON ( VC_CAP_ON ), + .VC_CAP_REJECT_SNOOP_TRANSACTIONS ( VC_CAP_REJECT_SNOOP_TRANSACTIONS ), + .VC_CAP_VERSION ( VC_CAP_VERSION ), + .VSEC_BASE_PTR ( VSEC_BASE_PTR ), + .VSEC_CAP_HDR_ID ( VSEC_CAP_HDR_ID ), + .VSEC_CAP_HDR_LENGTH ( VSEC_CAP_HDR_LENGTH ), + .VSEC_CAP_HDR_REVISION ( VSEC_CAP_HDR_REVISION ), + .VSEC_CAP_ID ( VSEC_CAP_ID ), + .VSEC_CAP_IS_LINK_VISIBLE ( VSEC_CAP_IS_LINK_VISIBLE ), + .VSEC_CAP_NEXTPTR ( VSEC_CAP_NEXTPTR ), + .VSEC_CAP_ON ( VSEC_CAP_ON ), + .VSEC_CAP_VERSION ( VSEC_CAP_VERSION ) + // I/O + ) pcie_top_i ( + + // AXI Interface + .user_clk_out ( user_clk_out ), + .user_reset ( bridge_reset_d ), + .user_lnk_up ( user_lnk_up ), + + .user_rst_n ( user_rst_n ), + .trn_lnk_up ( trn_lnk_up ), + + .tx_buf_av ( tx_buf_av ), + .tx_err_drop ( tx_err_drop ), + .tx_cfg_req ( tx_cfg_req ), + .s_axis_tx_tready ( s_axis_tx_tready ), + .s_axis_tx_tdata ( s_axis_tx_tdata ), + .s_axis_tx_tkeep ( s_axis_tx_tkeep ), + .s_axis_tx_tuser ( s_axis_tx_tuser ), + .s_axis_tx_tlast ( s_axis_tx_tlast ), + .s_axis_tx_tvalid ( s_axis_tx_tvalid ), + .tx_cfg_gnt ( tx_cfg_gnt ), + + .m_axis_rx_tdata ( m_axis_rx_tdata ), + .m_axis_rx_tkeep ( m_axis_rx_tkeep ), + .m_axis_rx_tlast ( m_axis_rx_tlast ), + .m_axis_rx_tvalid ( m_axis_rx_tvalid ), + .m_axis_rx_tready ( m_axis_rx_tready ), + .m_axis_rx_tuser ( m_axis_rx_tuser ), + .rx_np_ok ( rx_np_ok ), + .rx_np_req ( rx_np_req ), + + .fc_cpld ( fc_cpld ), + .fc_cplh ( fc_cplh ), + .fc_npd ( fc_npd ), + .fc_nph ( fc_nph ), + .fc_pd ( fc_pd ), + .fc_ph ( fc_ph ), + .fc_sel ( fc_sel ), + .cfg_turnoff_ok ( cfg_turnoff_ok ), + .cfg_received_func_lvl_rst ( cfg_received_func_lvl_rst ), + + .cm_rst_n ( 1'b1 ), + .func_lvl_rst_n ( 1'b1 ), + .lnk_clk_en ( ), + .cfg_dev_id ( cfg_dev_id_int ), + .cfg_vend_id ( cfg_vend_id_int ), + .cfg_rev_id ( cfg_rev_id_int ), + .cfg_subsys_id ( cfg_subsys_id_int ), + .cfg_subsys_vend_id ( cfg_subsys_vend_id_int ), + .cfg_pciecap_interrupt_msgnum ( cfg_pciecap_interrupt_msgnum ), + + .cfg_bridge_serr_en ( cfg_bridge_serr_en ), + + .cfg_command_bus_master_enable ( ), + .cfg_command_interrupt_disable ( ), + .cfg_command_io_enable ( ), + .cfg_command_mem_enable ( ), + .cfg_command_serr_en ( ), + .cfg_dev_control_aux_power_en ( ), + .cfg_dev_control_corr_err_reporting_en ( ), + .cfg_dev_control_enable_ro ( ), + .cfg_dev_control_ext_tag_en ( ), + .cfg_dev_control_fatal_err_reporting_en ( ), + .cfg_dev_control_max_payload ( ), + .cfg_dev_control_max_read_req ( ), + .cfg_dev_control_non_fatal_reporting_en ( ), + .cfg_dev_control_no_snoop_en ( ), + .cfg_dev_control_phantom_en ( ), + .cfg_dev_control_ur_err_reporting_en ( ), + .cfg_dev_control2_cpl_timeout_dis ( ), + .cfg_dev_control2_cpl_timeout_val ( ), + .cfg_dev_control2_ari_forward_en ( ), + .cfg_dev_control2_atomic_requester_en ( ), + .cfg_dev_control2_atomic_egress_block ( ), + .cfg_dev_control2_ido_req_en ( ), + .cfg_dev_control2_ido_cpl_en ( ), + .cfg_dev_control2_ltr_en ( ), + .cfg_dev_control2_tlp_prefix_block ( ), + .cfg_dev_status_corr_err_detected ( ), + .cfg_dev_status_fatal_err_detected ( ), + .cfg_dev_status_non_fatal_err_detected ( ), + .cfg_dev_status_ur_detected ( ), + + .cfg_mgmt_do ( cfg_mgmt_do ), + .cfg_err_aer_headerlog_set ( cfg_err_aer_headerlog_set ), + .cfg_err_aer_headerlog ( cfg_err_aer_headerlog ), + .cfg_err_cpl_rdy ( cfg_err_cpl_rdy ), + .cfg_interrupt_do ( cfg_interrupt_do ), + .cfg_interrupt_mmenable ( cfg_interrupt_mmenable ), + .cfg_interrupt_msienable ( cfg_interrupt_msienable ), + .cfg_interrupt_msixenable ( cfg_interrupt_msixenable ), + .cfg_interrupt_msixfm ( cfg_interrupt_msixfm ), + .cfg_interrupt_rdy ( cfg_interrupt_rdy ), + .cfg_link_control_rcb ( ), + .cfg_link_control_aspm_control ( ), + .cfg_link_control_auto_bandwidth_int_en ( ), + .cfg_link_control_bandwidth_int_en ( ), + .cfg_link_control_clock_pm_en ( ), + .cfg_link_control_common_clock ( ), + .cfg_link_control_extended_sync ( ), + .cfg_link_control_hw_auto_width_dis ( ), + .cfg_link_control_link_disable ( ), + .cfg_link_control_retrain_link ( ), + .cfg_link_status_auto_bandwidth_status ( ), + .cfg_link_status_bandwidth_status ( ), + .cfg_link_status_current_speed ( cfg_link_status_current_speed ), + .cfg_link_status_dll_active ( ), + .cfg_link_status_link_training ( ), + .cfg_link_status_negotiated_width ( cfg_link_status_negotiated_width ), + .cfg_msg_data ( cfg_msg_data ), + .cfg_msg_received ( cfg_msg_received ), + .cfg_msg_received_assert_int_a ( cfg_msg_received_assert_int_a ), + .cfg_msg_received_assert_int_b ( cfg_msg_received_assert_int_b ), + .cfg_msg_received_assert_int_c ( cfg_msg_received_assert_int_c ), + .cfg_msg_received_assert_int_d ( cfg_msg_received_assert_int_d ), + .cfg_msg_received_deassert_int_a ( cfg_msg_received_deassert_int_a ), + .cfg_msg_received_deassert_int_b ( cfg_msg_received_deassert_int_b ), + .cfg_msg_received_deassert_int_c ( cfg_msg_received_deassert_int_c ), + .cfg_msg_received_deassert_int_d ( cfg_msg_received_deassert_int_d ), + .cfg_msg_received_err_cor ( cfg_msg_received_err_cor ), + .cfg_msg_received_err_fatal ( cfg_msg_received_err_fatal ), + .cfg_msg_received_err_non_fatal ( cfg_msg_received_err_non_fatal ), + .cfg_msg_received_pm_as_nak ( cfg_msg_received_pm_as_nak ), + .cfg_msg_received_pme_to ( ), + .cfg_msg_received_pme_to_ack ( cfg_msg_received_pme_to_ack ), + .cfg_msg_received_pm_pme ( cfg_msg_received_pm_pme ), + .cfg_msg_received_setslotpowerlimit ( cfg_msg_received_setslotpowerlimit ), + .cfg_msg_received_unlock ( ), + .cfg_to_turnoff ( cfg_to_turnoff ), + .cfg_status ( cfg_status ), + .cfg_command ( cfg_command ), + .cfg_dstatus ( cfg_dstatus ), + .cfg_dcommand ( cfg_dcommand ), + .cfg_lstatus ( cfg_lstatus ), + .cfg_lcommand ( cfg_lcommand ), + .cfg_dcommand2 ( cfg_dcommand2 ), + .cfg_pcie_link_state ( cfg_pcie_link_state ), + .cfg_pmcsr_pme_en ( cfg_pmcsr_pme_en ), + .cfg_pmcsr_powerstate ( cfg_pmcsr_powerstate ), + .cfg_pmcsr_pme_status ( cfg_pmcsr_pme_status ), + .cfg_pm_rcv_as_req_l1_n ( ), + .cfg_pm_rcv_enter_l1_n ( ), + .cfg_pm_rcv_enter_l23_n ( ), + .cfg_pm_rcv_req_ack_n ( ), + .cfg_mgmt_rd_wr_done ( cfg_mgmt_rd_wr_done ), + .cfg_slot_control_electromech_il_ctl_pulse ( cfg_slot_control_electromech_il_ctl_pulse ), + .cfg_root_control_syserr_corr_err_en ( cfg_root_control_syserr_corr_err_en ), + .cfg_root_control_syserr_non_fatal_err_en ( cfg_root_control_syserr_non_fatal_err_en ), + .cfg_root_control_syserr_fatal_err_en ( cfg_root_control_syserr_fatal_err_en ), + .cfg_root_control_pme_int_en ( cfg_root_control_pme_int_en), + .cfg_aer_ecrc_check_en ( cfg_aer_ecrc_check_en ), + .cfg_aer_ecrc_gen_en ( cfg_aer_ecrc_gen_en ), + .cfg_aer_rooterr_corr_err_reporting_en ( cfg_aer_rooterr_corr_err_reporting_en ), + .cfg_aer_rooterr_non_fatal_err_reporting_en ( cfg_aer_rooterr_non_fatal_err_reporting_en ), + .cfg_aer_rooterr_fatal_err_reporting_en ( cfg_aer_rooterr_fatal_err_reporting_en ), + .cfg_aer_rooterr_corr_err_received ( cfg_aer_rooterr_corr_err_received ), + .cfg_aer_rooterr_non_fatal_err_received ( cfg_aer_rooterr_non_fatal_err_received ), + .cfg_aer_rooterr_fatal_err_received ( cfg_aer_rooterr_fatal_err_received ), + .cfg_aer_interrupt_msgnum ( cfg_aer_interrupt_msgnum ), + .cfg_transaction ( ), + .cfg_transaction_addr ( ), + .cfg_transaction_type ( ), + .cfg_vc_tcvc_map ( cfg_vc_tcvc_map ), + .cfg_mgmt_byte_en_n ( ~cfg_mgmt_byte_en ), + .cfg_mgmt_di ( cfg_mgmt_di ), + .cfg_dsn ( cfg_dsn ), + .cfg_mgmt_dwaddr ( cfg_mgmt_dwaddr ), + .cfg_err_acs_n ( 1'b1 ), + .cfg_err_cor_n ( ~cfg_err_cor ), + .cfg_err_cpl_abort_n ( ~cfg_err_cpl_abort ), + .cfg_err_cpl_timeout_n ( ~cfg_err_cpl_timeout ), + .cfg_err_cpl_unexpect_n ( ~cfg_err_cpl_unexpect ), + .cfg_err_ecrc_n ( ~cfg_err_ecrc ), + .cfg_err_locked_n ( ~cfg_err_locked ), + .cfg_err_posted_n ( ~cfg_err_posted ), + .cfg_err_tlp_cpl_header ( cfg_err_tlp_cpl_header ), + .cfg_err_ur_n ( ~cfg_err_ur ), + .cfg_err_malformed_n ( ~cfg_err_malformed ), + .cfg_err_poisoned_n ( ~cfg_err_poisoned ), + .cfg_err_atomic_egress_blocked_n ( ~cfg_err_atomic_egress_blocked ), + .cfg_err_mc_blocked_n ( ~cfg_err_mc_blocked ), + .cfg_err_internal_uncor_n ( ~cfg_err_internal_uncor ), + .cfg_err_internal_cor_n ( ~cfg_err_internal_cor ), + .cfg_err_norecovery_n ( ~cfg_err_norecovery ), + + .cfg_interrupt_assert_n ( ~cfg_interrupt_assert ), + .cfg_interrupt_di ( cfg_interrupt_di ), + .cfg_interrupt_n ( ~cfg_interrupt ), + .cfg_interrupt_stat_n ( ~cfg_interrupt_stat ), + .cfg_bus_number ( cfg_bus_number ), + .cfg_device_number ( cfg_device_number ), + .cfg_function_number ( cfg_function_number ), + .cfg_ds_bus_number ( cfg_ds_bus_number ), + .cfg_ds_device_number ( cfg_ds_device_number ), + .cfg_ds_function_number ( cfg_ds_function_number ), + .cfg_pm_send_pme_to_n ( 1'b1 ), + .cfg_pm_wake_n ( ~cfg_pm_wake ), + .cfg_pm_halt_aspm_l0s_n ( ~cfg_pm_halt_aspm_l0s ), + .cfg_pm_halt_aspm_l1_n ( ~cfg_pm_halt_aspm_l1 ), + .cfg_pm_force_state_en_n ( ~cfg_pm_force_state_en), + .cfg_pm_force_state ( cfg_pm_force_state ), + .cfg_force_mps ( 3'b0 ), + .cfg_force_common_clock_off ( 1'b0 ), + .cfg_force_extended_sync_on ( 1'b0 ), + .cfg_port_number ( 8'b0 ), + .cfg_mgmt_rd_en_n ( ~cfg_mgmt_rd_en ), + .cfg_trn_pending ( cfg_trn_pending ), + .cfg_mgmt_wr_en_n ( ~cfg_mgmt_wr_en ), + .cfg_mgmt_wr_readonly_n ( ~cfg_mgmt_wr_readonly ), + .cfg_mgmt_wr_rw1c_as_rw_n ( ~cfg_mgmt_wr_rw1c_as_rw ), + + .pl_initial_link_width ( pl_initial_link_width ), + .pl_lane_reversal_mode ( pl_lane_reversal_mode ), + .pl_link_gen2_cap ( pl_link_gen2_cap ), + .pl_link_partner_gen2_supported ( pl_link_partner_gen2_supported ), + .pl_link_upcfg_cap ( pl_link_upcfg_cap ), + .pl_ltssm_state ( pl_ltssm_state_int ), + .pl_phy_lnk_up ( pl_phy_lnk_up_wire ), + .pl_received_hot_rst ( pl_received_hot_rst_wire ), + .pl_rx_pm_state ( pl_rx_pm_state ), + .pl_sel_lnk_rate ( pl_sel_lnk_rate ), + .pl_sel_lnk_width ( pl_sel_lnk_width ), + .pl_tx_pm_state ( pl_tx_pm_state ), + .pl_directed_link_auton ( pl_directed_link_auton ), + .pl_directed_link_change ( pl_directed_link_change ), + .pl_directed_link_speed ( pl_directed_link_speed ), + .pl_directed_link_width ( pl_directed_link_width ), + .pl_downstream_deemph_source ( pl_downstream_deemph_source ), + .pl_upstream_prefer_deemph ( pl_upstream_prefer_deemph ), + .pl_transmit_hot_rst ( pl_transmit_hot_rst ), + .pl_directed_ltssm_new_vld ( 1'b0 ), + .pl_directed_ltssm_new ( 6'b0 ), + .pl_directed_ltssm_stall ( 1'b0 ), + .pl_directed_change_done ( pl_directed_change_done ), + + .phy_rdy_n ( phy_rdy_n ), + .dbg_sclr_a ( ), + .dbg_sclr_b ( ), + .dbg_sclr_c ( ), + .dbg_sclr_d ( ), + .dbg_sclr_e ( ), + .dbg_sclr_f ( ), + .dbg_sclr_g ( ), + .dbg_sclr_h ( ), + .dbg_sclr_i ( ), + .dbg_sclr_j ( ), + .dbg_sclr_k ( ), + + .dbg_vec_a ( ), + .dbg_vec_b ( ), + .dbg_vec_c ( ), + .pl_dbg_vec ( ), + .trn_rdllp_data ( ), + .trn_rdllp_src_rdy ( ), + .dbg_mode ( 2'b0 ), + .dbg_sub_mode ( 1'b0 ), + .pl_dbg_mode ( 3'b0 ), + + .drp_clk ( pcie_drp_clk ), + .drp_do ( pcie_drp_do ), + .drp_rdy ( pcie_drp_rdy ), + .drp_addr ( pcie_drp_addr ), + .drp_en ( pcie_drp_en ), + .drp_di ( pcie_drp_di ), + .drp_we ( pcie_drp_we ), + + // Pipe Interface + + .pipe_clk ( pipe_clk ), + .user_clk ( user_clk ), + .user_clk2 ( user_clk2 ), + .pipe_rx0_polarity_gt ( pipe_rx0_polarity_gt ), + .pipe_rx1_polarity_gt ( pipe_rx1_polarity_gt ), + .pipe_rx2_polarity_gt ( pipe_rx2_polarity_gt ), + .pipe_rx3_polarity_gt ( pipe_rx3_polarity_gt ), + .pipe_rx4_polarity_gt ( pipe_rx4_polarity_gt ), + .pipe_rx5_polarity_gt ( pipe_rx5_polarity_gt ), + .pipe_rx6_polarity_gt ( pipe_rx6_polarity_gt ), + .pipe_rx7_polarity_gt ( pipe_rx7_polarity_gt ), + .pipe_tx_deemph_gt ( pipe_tx_deemph_gt ), + .pipe_tx_margin_gt ( pipe_tx_margin_gt ), + .pipe_tx_rate_gt ( pipe_tx_rate_gt ), + .pipe_tx_rcvr_det_gt ( pipe_tx_rcvr_det_gt ), + .pipe_tx0_char_is_k_gt ( pipe_tx0_char_is_k_gt ), + .pipe_tx0_compliance_gt ( pipe_tx0_compliance_gt ), + .pipe_tx0_data_gt ( pipe_tx0_data_gt ), + .pipe_tx0_elec_idle_gt ( pipe_tx0_elec_idle_gt ), + .pipe_tx0_powerdown_gt ( pipe_tx0_powerdown_gt ), + .pipe_tx1_char_is_k_gt ( pipe_tx1_char_is_k_gt ), + .pipe_tx1_compliance_gt ( pipe_tx1_compliance_gt ), + .pipe_tx1_data_gt ( pipe_tx1_data_gt ), + .pipe_tx1_elec_idle_gt ( pipe_tx1_elec_idle_gt ), + .pipe_tx1_powerdown_gt ( pipe_tx1_powerdown_gt ), + .pipe_tx2_char_is_k_gt ( pipe_tx2_char_is_k_gt ), + .pipe_tx2_compliance_gt ( pipe_tx2_compliance_gt ), + .pipe_tx2_data_gt ( pipe_tx2_data_gt ), + .pipe_tx2_elec_idle_gt ( pipe_tx2_elec_idle_gt ), + .pipe_tx2_powerdown_gt ( pipe_tx2_powerdown_gt ), + .pipe_tx3_char_is_k_gt ( pipe_tx3_char_is_k_gt ), + .pipe_tx3_compliance_gt ( pipe_tx3_compliance_gt ), + .pipe_tx3_data_gt ( pipe_tx3_data_gt ), + .pipe_tx3_elec_idle_gt ( pipe_tx3_elec_idle_gt ), + .pipe_tx3_powerdown_gt ( pipe_tx3_powerdown_gt ), + .pipe_tx4_char_is_k_gt ( pipe_tx4_char_is_k_gt ), + .pipe_tx4_compliance_gt ( pipe_tx4_compliance_gt ), + .pipe_tx4_data_gt ( pipe_tx4_data_gt ), + .pipe_tx4_elec_idle_gt ( pipe_tx4_elec_idle_gt ), + .pipe_tx4_powerdown_gt ( pipe_tx4_powerdown_gt ), + .pipe_tx5_char_is_k_gt ( pipe_tx5_char_is_k_gt ), + .pipe_tx5_compliance_gt ( pipe_tx5_compliance_gt ), + .pipe_tx5_data_gt ( pipe_tx5_data_gt ), + .pipe_tx5_elec_idle_gt ( pipe_tx5_elec_idle_gt ), + .pipe_tx5_powerdown_gt ( pipe_tx5_powerdown_gt ), + .pipe_tx6_char_is_k_gt ( pipe_tx6_char_is_k_gt ), + .pipe_tx6_compliance_gt ( pipe_tx6_compliance_gt ), + .pipe_tx6_data_gt ( pipe_tx6_data_gt ), + .pipe_tx6_elec_idle_gt ( pipe_tx6_elec_idle_gt ), + .pipe_tx6_powerdown_gt ( pipe_tx6_powerdown_gt ), + .pipe_tx7_char_is_k_gt ( pipe_tx7_char_is_k_gt ), + .pipe_tx7_compliance_gt ( pipe_tx7_compliance_gt ), + .pipe_tx7_data_gt ( pipe_tx7_data_gt ), + .pipe_tx7_elec_idle_gt ( pipe_tx7_elec_idle_gt ), + .pipe_tx7_powerdown_gt ( pipe_tx7_powerdown_gt ), + + .pipe_rx0_chanisaligned_gt ( pipe_rx0_chanisaligned_gt ), + .pipe_rx0_char_is_k_gt ( pipe_rx0_char_is_k_gt ), + .pipe_rx0_data_gt ( pipe_rx0_data_gt ), + .pipe_rx0_elec_idle_gt ( pipe_rx0_elec_idle_gt ), + .pipe_rx0_phy_status_gt ( pipe_rx0_phy_status_gt ), + .pipe_rx0_status_gt ( pipe_rx0_status_gt ), + .pipe_rx0_valid_gt ( pipe_rx0_valid_gt ), + .pipe_rx1_chanisaligned_gt ( pipe_rx1_chanisaligned_gt ), + .pipe_rx1_char_is_k_gt ( pipe_rx1_char_is_k_gt ), + .pipe_rx1_data_gt ( pipe_rx1_data_gt ), + .pipe_rx1_elec_idle_gt ( pipe_rx1_elec_idle_gt ), + .pipe_rx1_phy_status_gt ( pipe_rx1_phy_status_gt ), + .pipe_rx1_status_gt ( pipe_rx1_status_gt ), + .pipe_rx1_valid_gt ( pipe_rx1_valid_gt ), + .pipe_rx2_chanisaligned_gt ( pipe_rx2_chanisaligned_gt ), + .pipe_rx2_char_is_k_gt ( pipe_rx2_char_is_k_gt ), + .pipe_rx2_data_gt ( pipe_rx2_data_gt ), + .pipe_rx2_elec_idle_gt ( pipe_rx2_elec_idle_gt ), + .pipe_rx2_phy_status_gt ( pipe_rx2_phy_status_gt ), + .pipe_rx2_status_gt ( pipe_rx2_status_gt ), + .pipe_rx2_valid_gt ( pipe_rx2_valid_gt ), + .pipe_rx3_chanisaligned_gt ( pipe_rx3_chanisaligned_gt ), + .pipe_rx3_char_is_k_gt ( pipe_rx3_char_is_k_gt ), + .pipe_rx3_data_gt ( pipe_rx3_data_gt ), + .pipe_rx3_elec_idle_gt ( pipe_rx3_elec_idle_gt ), + .pipe_rx3_phy_status_gt ( pipe_rx3_phy_status_gt ), + .pipe_rx3_status_gt ( pipe_rx3_status_gt ), + .pipe_rx3_valid_gt ( pipe_rx3_valid_gt ), + .pipe_rx4_chanisaligned_gt ( pipe_rx4_chanisaligned_gt ), + .pipe_rx4_char_is_k_gt ( pipe_rx4_char_is_k_gt ), + .pipe_rx4_data_gt ( pipe_rx4_data_gt ), + .pipe_rx4_elec_idle_gt ( pipe_rx4_elec_idle_gt ), + .pipe_rx4_phy_status_gt ( pipe_rx4_phy_status_gt ), + .pipe_rx4_status_gt ( pipe_rx4_status_gt ), + .pipe_rx4_valid_gt ( pipe_rx4_valid_gt ), + .pipe_rx5_chanisaligned_gt ( pipe_rx5_chanisaligned_gt ), + .pipe_rx5_char_is_k_gt ( pipe_rx5_char_is_k_gt ), + .pipe_rx5_data_gt ( pipe_rx5_data_gt ), + .pipe_rx5_elec_idle_gt ( pipe_rx5_elec_idle_gt ), + .pipe_rx5_phy_status_gt ( pipe_rx5_phy_status_gt ), + .pipe_rx5_status_gt ( pipe_rx5_status_gt ), + .pipe_rx5_valid_gt ( pipe_rx5_valid_gt ), + .pipe_rx6_chanisaligned_gt ( pipe_rx6_chanisaligned_gt ), + .pipe_rx6_char_is_k_gt ( pipe_rx6_char_is_k_gt ), + .pipe_rx6_data_gt ( pipe_rx6_data_gt ), + .pipe_rx6_elec_idle_gt ( pipe_rx6_elec_idle_gt ), + .pipe_rx6_phy_status_gt ( pipe_rx6_phy_status_gt ), + .pipe_rx6_status_gt ( pipe_rx6_status_gt ), + .pipe_rx6_valid_gt ( pipe_rx6_valid_gt ), + .pipe_rx7_chanisaligned_gt ( pipe_rx7_chanisaligned_gt ), + .pipe_rx7_char_is_k_gt ( pipe_rx7_char_is_k_gt ), + .pipe_rx7_data_gt ( pipe_rx7_data_gt ), + .pipe_rx7_elec_idle_gt ( pipe_rx7_elec_idle_gt ), + .pipe_rx7_phy_status_gt ( pipe_rx7_phy_status_gt ), + .pipe_rx7_status_gt ( pipe_rx7_status_gt ), + .pipe_rx7_valid_gt ( pipe_rx7_valid_gt ) + + ); + assign common_commands_out = 12'b0; + assign pipe_tx_0_sigs = 25'b0; + assign pipe_tx_1_sigs = 25'b0; + assign pipe_tx_2_sigs = 25'b0; + assign pipe_tx_3_sigs = 25'b0; + assign pipe_tx_4_sigs = 25'b0; + assign pipe_tx_5_sigs = 25'b0; + assign pipe_tx_6_sigs = 25'b0; + assign pipe_tx_7_sigs = 25'b0; + + + //------------------------------------------------------------------------------------------------------------------// + // **** V7/K7/A7 GTX Wrapper **** // + // The 7-Series GTX Wrapper includes the following: // + // 1) Virtex-7 GTX // + // 2) Kintex-7 GTX // + // 3) Artix-7 GTP // + //------------------------------------------------------------------------------------------------------------------// +pcie_7x_0_gt_top #( + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .REF_CLK_FREQ ( REF_CLK_FREQ ), + .USER_CLK_FREQ ( USER_CLK_FREQ ), + .USER_CLK2_DIV2 ( USER_CLK2_DIV2 ), + + // synthesis translate_off + .PL_FAST_TRAIN ( ENABLE_FAST_SIM_TRAINING ), + // synthesis translate_on + + .PCIE_EXT_CLK ( PCIE_EXT_CLK ), + .PCIE_USE_MODE ( PCIE_USE_MODE ), + .PCIE_GT_DEVICE ( PCIE_GT_DEVICE ), + .PCIE_PLL_SEL ( PCIE_PLL_SEL ), + .PCIE_ASYNC_EN ( PCIE_ASYNC_EN ), + .PCIE_TXBUF_EN ( PCIE_TXBUF_EN ), + .PCIE_EXT_GT_COMMON ( PCIE_EXT_GT_COMMON ), + .EXT_CH_GT_DRP ( EXT_CH_GT_DRP ), + .TX_MARGIN_FULL_0 ( TX_MARGIN_FULL_0 ), + .TX_MARGIN_FULL_1 ( TX_MARGIN_FULL_1 ), + .TX_MARGIN_FULL_2 ( TX_MARGIN_FULL_2 ), + .TX_MARGIN_FULL_3 ( TX_MARGIN_FULL_3 ), + .TX_MARGIN_FULL_4 ( TX_MARGIN_FULL_4 ), + .TX_MARGIN_LOW_0 ( TX_MARGIN_LOW_0 ), + .TX_MARGIN_LOW_1 ( TX_MARGIN_LOW_1 ), + .TX_MARGIN_LOW_2 ( TX_MARGIN_LOW_2 ), + .TX_MARGIN_LOW_3 ( TX_MARGIN_LOW_3 ), + .TX_MARGIN_LOW_4 ( TX_MARGIN_LOW_4 ), + .PCIE_CHAN_BOND ( PCIE_CHAN_BOND ) + + ) gt_top_i ( + // pl ltssm + .pl_ltssm_state ( pl_ltssm_state_int ), + + // Pipe Common Signals + .pipe_tx_rcvr_det ( pipe_tx_rcvr_det_gt ), + .pipe_tx_reset ( 1'b0 ), + .pipe_tx_rate ( pipe_tx_rate_gt ), + .pipe_tx_deemph ( pipe_tx_deemph_gt ), + .pipe_tx_margin ( pipe_tx_margin_gt ), + .pipe_tx_swing ( 1'b0 ), + + // Pipe Per-Lane Signals - Lane 0 + .pipe_rx0_char_is_k ( pipe_rx0_char_is_k_gt), + .pipe_rx0_data ( pipe_rx0_data_gt ), + .pipe_rx0_valid ( pipe_rx0_valid_gt ), + .pipe_rx0_chanisaligned ( pipe_rx0_chanisaligned_gt ), + .pipe_rx0_status ( pipe_rx0_status_gt ), + .pipe_rx0_phy_status ( pipe_rx0_phy_status_gt ), + .pipe_rx0_elec_idle ( pipe_rx0_elec_idle_gt ), + .pipe_rx0_polarity ( pipe_rx0_polarity_gt ), + .pipe_tx0_compliance ( pipe_tx0_compliance_gt ), + .pipe_tx0_char_is_k ( pipe_tx0_char_is_k_gt ), + .pipe_tx0_data ( pipe_tx0_data_gt ), + .pipe_tx0_elec_idle ( pipe_tx0_elec_idle_gt ), + .pipe_tx0_powerdown ( pipe_tx0_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 1 + + .pipe_rx1_char_is_k ( pipe_rx1_char_is_k_gt), + .pipe_rx1_data ( pipe_rx1_data_gt ), + .pipe_rx1_valid ( pipe_rx1_valid_gt ), + .pipe_rx1_chanisaligned ( pipe_rx1_chanisaligned_gt ), + .pipe_rx1_status ( pipe_rx1_status_gt ), + .pipe_rx1_phy_status ( pipe_rx1_phy_status_gt ), + .pipe_rx1_elec_idle ( pipe_rx1_elec_idle_gt ), + .pipe_rx1_polarity ( pipe_rx1_polarity_gt ), + .pipe_tx1_compliance ( pipe_tx1_compliance_gt ), + .pipe_tx1_char_is_k ( pipe_tx1_char_is_k_gt ), + .pipe_tx1_data ( pipe_tx1_data_gt ), + .pipe_tx1_elec_idle ( pipe_tx1_elec_idle_gt ), + .pipe_tx1_powerdown ( pipe_tx1_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 2 + + .pipe_rx2_char_is_k ( pipe_rx2_char_is_k_gt), + .pipe_rx2_data ( pipe_rx2_data_gt ), + .pipe_rx2_valid ( pipe_rx2_valid_gt ), + .pipe_rx2_chanisaligned ( pipe_rx2_chanisaligned_gt ), + .pipe_rx2_status ( pipe_rx2_status_gt ), + .pipe_rx2_phy_status ( pipe_rx2_phy_status_gt ), + .pipe_rx2_elec_idle ( pipe_rx2_elec_idle_gt ), + .pipe_rx2_polarity ( pipe_rx2_polarity_gt ), + .pipe_tx2_compliance ( pipe_tx2_compliance_gt ), + .pipe_tx2_char_is_k ( pipe_tx2_char_is_k_gt ), + .pipe_tx2_data ( pipe_tx2_data_gt ), + .pipe_tx2_elec_idle ( pipe_tx2_elec_idle_gt ), + .pipe_tx2_powerdown ( pipe_tx2_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 3 + + .pipe_rx3_char_is_k ( pipe_rx3_char_is_k_gt), + .pipe_rx3_data ( pipe_rx3_data_gt ), + .pipe_rx3_valid ( pipe_rx3_valid_gt ), + .pipe_rx3_chanisaligned ( pipe_rx3_chanisaligned_gt ), + .pipe_rx3_status ( pipe_rx3_status_gt ), + .pipe_rx3_phy_status ( pipe_rx3_phy_status_gt ), + .pipe_rx3_elec_idle ( pipe_rx3_elec_idle_gt ), + .pipe_rx3_polarity ( pipe_rx3_polarity_gt ), + .pipe_tx3_compliance ( pipe_tx3_compliance_gt ), + .pipe_tx3_char_is_k ( pipe_tx3_char_is_k_gt ), + .pipe_tx3_data ( pipe_tx3_data_gt ), + .pipe_tx3_elec_idle ( pipe_tx3_elec_idle_gt ), + .pipe_tx3_powerdown ( pipe_tx3_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 4 + + .pipe_rx4_char_is_k ( pipe_rx4_char_is_k_gt), + .pipe_rx4_data ( pipe_rx4_data_gt ), + .pipe_rx4_valid ( pipe_rx4_valid_gt ), + .pipe_rx4_chanisaligned ( pipe_rx4_chanisaligned_gt ), + .pipe_rx4_status ( pipe_rx4_status_gt ), + .pipe_rx4_phy_status ( pipe_rx4_phy_status_gt ), + .pipe_rx4_elec_idle ( pipe_rx4_elec_idle_gt ), + .pipe_rx4_polarity ( pipe_rx4_polarity_gt ), + .pipe_tx4_compliance ( pipe_tx4_compliance_gt ), + .pipe_tx4_char_is_k ( pipe_tx4_char_is_k_gt ), + .pipe_tx4_data ( pipe_tx4_data_gt ), + .pipe_tx4_elec_idle ( pipe_tx4_elec_idle_gt ), + .pipe_tx4_powerdown ( pipe_tx4_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 5 + + .pipe_rx5_char_is_k ( pipe_rx5_char_is_k_gt), + .pipe_rx5_data ( pipe_rx5_data_gt ), + .pipe_rx5_valid ( pipe_rx5_valid_gt ), + .pipe_rx5_chanisaligned ( pipe_rx5_chanisaligned_gt ), + .pipe_rx5_status ( pipe_rx5_status_gt ), + .pipe_rx5_phy_status ( pipe_rx5_phy_status_gt ), + .pipe_rx5_elec_idle ( pipe_rx5_elec_idle_gt ), + .pipe_rx5_polarity ( pipe_rx5_polarity_gt ), + .pipe_tx5_compliance ( pipe_tx5_compliance_gt ), + .pipe_tx5_char_is_k ( pipe_tx5_char_is_k_gt ), + .pipe_tx5_data ( pipe_tx5_data_gt ), + .pipe_tx5_elec_idle ( pipe_tx5_elec_idle_gt ), + .pipe_tx5_powerdown ( pipe_tx5_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 6 + + .pipe_rx6_char_is_k ( pipe_rx6_char_is_k_gt), + .pipe_rx6_data ( pipe_rx6_data_gt ), + .pipe_rx6_valid ( pipe_rx6_valid_gt ), + .pipe_rx6_chanisaligned ( pipe_rx6_chanisaligned_gt ), + .pipe_rx6_status ( pipe_rx6_status_gt ), + .pipe_rx6_phy_status ( pipe_rx6_phy_status_gt ), + .pipe_rx6_elec_idle ( pipe_rx6_elec_idle_gt ), + .pipe_rx6_polarity ( pipe_rx6_polarity_gt ), + .pipe_tx6_compliance ( pipe_tx6_compliance_gt ), + .pipe_tx6_char_is_k ( pipe_tx6_char_is_k_gt ), + .pipe_tx6_data ( pipe_tx6_data_gt ), + .pipe_tx6_elec_idle ( pipe_tx6_elec_idle_gt ), + .pipe_tx6_powerdown ( pipe_tx6_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 7 + + .pipe_rx7_char_is_k ( pipe_rx7_char_is_k_gt), + .pipe_rx7_data ( pipe_rx7_data_gt ), + .pipe_rx7_valid ( pipe_rx7_valid_gt ), + .pipe_rx7_chanisaligned ( pipe_rx7_chanisaligned_gt ), + .pipe_rx7_status ( pipe_rx7_status_gt ), + .pipe_rx7_phy_status ( pipe_rx7_phy_status_gt ), + .pipe_rx7_elec_idle ( pipe_rx7_elec_idle_gt ), + .pipe_rx7_polarity ( pipe_rx7_polarity_gt ), + .pipe_tx7_compliance ( pipe_tx7_compliance_gt ), + .pipe_tx7_char_is_k ( pipe_tx7_char_is_k_gt ), + .pipe_tx7_data ( pipe_tx7_data_gt ), + .pipe_tx7_elec_idle ( pipe_tx7_elec_idle_gt ), + .pipe_tx7_powerdown ( pipe_tx7_powerdown_gt ), + + // PCI Express Signals + .pci_exp_txn ( pci_exp_txn ), + .pci_exp_txp ( pci_exp_txp ), + .pci_exp_rxn ( pci_exp_rxn ), + .pci_exp_rxp ( pci_exp_rxp ), + + // Non PIPE Signals + .sys_clk ( sys_clk ), + .sys_rst_n ( sys_rst_n ), + .PIPE_MMCM_RST_N ( pipe_mmcm_rst_n ), // Async | Async + .pipe_clk ( pipe_clk ), + + .user_clk ( user_clk ), + .user_clk2 ( user_clk2 ), + .phy_rdy_n ( phy_rdy_n ), + + // ---------- Shared Logic Internal------------------ + .INT_PCLK_OUT_SLAVE ( int_pclk_out_slave ), + .INT_RXUSRCLK_OUT ( int_pipe_rxusrclk_out ), + .INT_RXOUTCLK_OUT ( int_rxoutclk_out ), + .INT_DCLK_OUT ( int_dclk_out ), + .INT_USERCLK1_OUT ( int_userclk1_out ), + .INT_USERCLK2_OUT ( int_userclk2_out), + .INT_OOBCLK_OUT ( int_oobclk_out), + .INT_MMCM_LOCK_OUT ( int_mmcm_lock_out ), + .INT_QPLLLOCK_OUT ( int_qplllock_out ), + .INT_QPLLOUTCLK_OUT ( int_qplloutclk_out ), + .INT_QPLLOUTREFCLK_OUT ( int_qplloutrefclk_out ), + .INT_PCLK_SEL_SLAVE ( int_pclk_sel_slave ), + + // ---------- Shared Logic External------------------ + //External Clock Ports + .PIPE_PCLK_IN ( pipe_pclk_in ), + .PIPE_RXUSRCLK_IN ( pipe_rxusrclk_in ), + .PIPE_RXOUTCLK_IN ( pipe_rxoutclk_in ), + .PIPE_DCLK_IN ( pipe_dclk_in ), + .PIPE_USERCLK1_IN ( pipe_userclk1_in ), + .PIPE_USERCLK2_IN ( pipe_userclk2_in ), + .PIPE_OOBCLK_IN ( pipe_oobclk_in ), + .PIPE_MMCM_LOCK_IN ( pipe_mmcm_lock_in ), + + .PIPE_TXOUTCLK_OUT ( pipe_txoutclk_out ), + .PIPE_RXOUTCLK_OUT ( pipe_rxoutclk_out ), + .PIPE_PCLK_SEL_OUT ( pipe_pclk_sel_out ), + .PIPE_GEN3_OUT ( pipe_gen3_out ), + + //External GT COMMON Ports + + .qpll_drp_crscode ( qpll_drp_crscode ), + .qpll_drp_fsm ( qpll_drp_fsm ), + .qpll_drp_done ( qpll_drp_done ), + .qpll_drp_reset ( qpll_drp_reset ), + .qpll_qplllock ( qpll_qplllock ), + .qpll_qplloutclk ( qpll_qplloutclk ), + .qpll_qplloutrefclk ( qpll_qplloutrefclk ), + .qpll_qplld ( qpll_qplld ), + .qpll_qpllreset ( qpll_qpllreset ), + .qpll_drp_clk ( qpll_drp_clk ), + .qpll_drp_rst_n ( qpll_drp_rst_n ), + .qpll_drp_ovrd ( qpll_drp_ovrd ), + .qpll_drp_gen3 ( qpll_drp_gen3), + .qpll_drp_start ( qpll_drp_start ), + + //TRANSCEIVER DEBUG EOU + .ext_ch_gt_drpclk ( ext_ch_gt_drpclk ), + .ext_ch_gt_drpaddr ( ext_ch_gt_drpaddr ), + .ext_ch_gt_drpen ( ext_ch_gt_drpen ), + .ext_ch_gt_drpdi ( ext_ch_gt_drpdi ), + .ext_ch_gt_drpwe ( ext_ch_gt_drpwe ), + .ext_ch_gt_drpdo ( ext_ch_gt_drpdo ), + .ext_ch_gt_drprdy ( ext_ch_gt_drprdy ), + +//---------- PRBS/Loopback Ports ----------------------- + .PIPE_TXPRBSSEL ( pipe_txprbssel ), + .PIPE_RXPRBSSEL ( pipe_rxprbssel ), + .PIPE_TXPRBSFORCEERR ( pipe_txprbsforceerr ), + .PIPE_RXPRBSCNTRESET ( pipe_rxprbscntreset ), + .PIPE_LOOPBACK ( pipe_loopback ), + + .PIPE_RXPRBSERR ( pipe_rxprbserr ), + .PIPE_TXINHIBIT ( pipe_txinhibit ), + +//---------- Transceiver Debug FSM Ports --------------------------------- + .PIPE_RST_FSM ( pipe_rst_fsm ), + .PIPE_QRST_FSM ( pipe_qrst_fsm ), + .PIPE_RATE_FSM ( pipe_rate_fsm ), + .PIPE_SYNC_FSM_TX ( pipe_sync_fsm_tx ), + .PIPE_SYNC_FSM_RX ( pipe_sync_fsm_rx ), + .PIPE_DRP_FSM ( pipe_drp_fsm ), + + .PIPE_RST_IDLE ( pipe_rst_idle ), + .PIPE_QRST_IDLE ( pipe_qrst_idle ), + .PIPE_RATE_IDLE ( pipe_rate_idle ), + .PIPE_EYESCANDATAERROR ( pipe_eyescandataerror ), + .PIPE_RXSTATUS ( pipe_rxstatus ), + .PIPE_DMONITOROUT ( pipe_dmonitorout ), + + .PIPE_CPLL_LOCK ( pipe_cpll_lock ), + .PIPE_QPLL_LOCK ( pipe_qpll_lock ), + .PIPE_RXPMARESETDONE ( pipe_rxpmaresetdone ), + .PIPE_RXBUFSTATUS ( pipe_rxbufstatus ), + .PIPE_TXPHALIGNDONE ( pipe_txphaligndone ), + .PIPE_TXPHINITDONE ( pipe_txphinitdone ), + .PIPE_TXDLYSRESETDONE ( pipe_txdlysresetdone ), + .PIPE_RXPHALIGNDONE ( pipe_rxphaligndone ), + .PIPE_RXDLYSRESETDONE ( pipe_rxdlysresetdone ), + .PIPE_RXSYNCDONE ( pipe_rxsyncdone ), + .PIPE_RXDISPERR ( pipe_rxdisperr ), + .PIPE_RXNOTINTABLE ( pipe_rxnotintable ), + .PIPE_RXCOMMADET ( pipe_rxcommadet ), + //---------- JTAG Ports -------------------------------- + .PIPE_JTAG_RDY (gt_ch_drp_rdy ), + + + //---------- Debug Ports ------------------------------- + .PIPE_DEBUG_0 ( pipe_debug_0 ), + .PIPE_DEBUG_1 ( pipe_debug_1 ), + .PIPE_DEBUG_2 ( pipe_debug_2 ), + .PIPE_DEBUG_3 ( pipe_debug_3 ), + .PIPE_DEBUG_4 ( pipe_debug_4 ), + .PIPE_DEBUG_5 ( pipe_debug_5 ), + .PIPE_DEBUG_6 ( pipe_debug_6 ), + .PIPE_DEBUG_7 ( pipe_debug_7 ), + .PIPE_DEBUG_8 ( pipe_debug_8 ), + .PIPE_DEBUG_9 ( pipe_debug_9 ), + .PIPE_DEBUG ( pipe_debug ) + ); + + assign common_commands_out = 12'b0; + assign pipe_tx_0_sigs = 25'b0; + assign pipe_tx_1_sigs = 25'b0; + assign pipe_tx_2_sigs = 25'b0; + assign pipe_tx_3_sigs = 25'b0; + assign pipe_tx_4_sigs = 25'b0; + assign pipe_tx_5_sigs = 25'b0; + assign pipe_tx_6_sigs = 25'b0; + assign pipe_tx_7_sigs = 25'b0; + //------------------------------------------------------------------------------------------------------------------// + + // Tie-Off Unused Tandem Outputs + assign icap_o = 32'b0; + assign startup_cfgclk = 1'b0; + assign startup_cfgmclk = 1'b0; + assign startup_eos = 1'b0; + assign startup_preq = 1'b0; + +//////////////////////////////////////////////STORE_LTSSM////////////////////////////////////////////////// + + (* dont_touch = "true" *) wire store_ltssm; + reg [5:0] ltssm_reg0 = 6'b0; + reg [5:0] ltssm_reg1 = 6'b0; + reg [5:0] ltssm_reg2 = 6'b0; + + always@ (posedge pipe_clk) + begin + ltssm_reg0 <= pl_ltssm_state; + ltssm_reg1 <= ltssm_reg0; + ltssm_reg2 <= ltssm_reg1; + end + + assign store_ltssm = (ltssm_reg2 != pl_ltssm_state) ? 1'b1 : 1'b0; + +/////////////////////////////////////////////////////////////////////////////////////////////////////////// +//enable_jtag_dbg = FALSE + + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_common.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_common.v new file mode 100644 index 0000000000000000000000000000000000000000..2039031914de3ed7377b016edaba6e97118373d5 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_common.v @@ -0,0 +1,167 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gt_common.v +// Version : 3.3 +`timescale 1ns / 1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gt_common #( + +parameter PCIE_SIM_MODE = "FALSE", // PCIe sim mode +parameter PCIE_GT_DEVICE = "GTX", // PCIe GT device +parameter PCIE_USE_MODE = "2.1", // PCIe use mode +parameter PCIE_PLL_SEL = "CPLL", // PCIe PLL select for Gen1/Gen2 only +parameter PCIE_REFCLK_FREQ = 0 // PCIe reference clock frequency +) + +( +input CPLLPDREFCLK, +input PIPE_CLK, +input QPLL_QPLLPD, +input QPLL_QPLLRESET, +input QPLL_DRP_CLK, +input QPLL_DRP_RST_N, +input QPLL_DRP_OVRD, +input QPLL_DRP_GEN3, +input QPLL_DRP_START, +output [5:0] QPLL_DRP_CRSCODE, +output [8:0] QPLL_DRP_FSM, +output QPLL_DRP_DONE, +output QPLL_DRP_RESET, +output QPLL_QPLLLOCK, +output QPLL_QPLLOUTCLK, +output QPLL_QPLLOUTREFCLK +); + + //---------- QPLL DRP Module Output -------------------- + +wire [7:0] qpll_drp_addr; +wire qpll_drp_en; +wire [15:0] qpll_drp_di; +wire qpll_drp_we; + + //---------- QPLL Wrapper Output ----------------------- + +wire [15:0] qpll_drp_do; +wire qpll_drp_rdy; + + //---------- QPLL Resets ----------------------- + + + //---------- QPLL DRP Module --------------------------------------- + +pcie_7x_0_qpll_drp # + ( + + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_REFCLK_FREQ (PCIE_REFCLK_FREQ) // PCIe reference clock frequency + + ) + qpll_drp_i + ( + + //---------- Input ------------------------- + .DRP_CLK (QPLL_DRP_CLK), + .DRP_RST_N (!QPLL_DRP_RST_N), + .DRP_OVRD (QPLL_DRP_OVRD), + .DRP_GEN3 (&QPLL_DRP_GEN3), + .DRP_QPLLLOCK (QPLL_QPLLLOCK), + .DRP_START (QPLL_DRP_START), + .DRP_DO (qpll_drp_do), + .DRP_RDY (qpll_drp_rdy), + + //---------- Output ------------------------ + .DRP_ADDR (qpll_drp_addr), + .DRP_EN (qpll_drp_en), + .DRP_DI (qpll_drp_di), + .DRP_WE (qpll_drp_we), + .DRP_DONE (QPLL_DRP_DONE), + .DRP_QPLLRESET (QPLL_DRP_RESET), + .DRP_CRSCODE (QPLL_DRP_CRSCODE), + .DRP_FSM (QPLL_DRP_FSM) + ); + + + //---------- QPLL Wrapper ------------------------------------------ +pcie_7x_0_qpll_wrapper # + ( + .PCIE_SIM_MODE (PCIE_SIM_MODE), // PCIe sim mode + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_REFCLK_FREQ (PCIE_REFCLK_FREQ) // PCIe reference clock frequency + ) + qpll_wrapper_i + ( + //---------- QPLL Clock Ports -------------- + .QPLL_CPLLPDREFCLK (CPLLPDREFCLK), + .QPLL_GTGREFCLK (PIPE_CLK), + .QPLL_QPLLLOCKDETCLK (1'd0), + .QPLL_QPLLOUTCLK (QPLL_QPLLOUTCLK), + .QPLL_QPLLOUTREFCLK (QPLL_QPLLOUTREFCLK), + .QPLL_QPLLLOCK (QPLL_QPLLLOCK), + //---------- QPLL Reset Ports -------------- + .QPLL_QPLLPD (QPLL_QPLLPD), + .QPLL_QPLLRESET (QPLL_QPLLRESET), + //---------- QPLL DRP Ports ---------------- + .QPLL_DRPCLK (QPLL_DRP_CLK), + .QPLL_DRPADDR (qpll_drp_addr), + .QPLL_DRPEN (qpll_drp_en), + .QPLL_DRPDI (qpll_drp_di), + .QPLL_DRPWE (qpll_drp_we), + .QPLL_DRPDO (qpll_drp_do), + .QPLL_DRPRDY (qpll_drp_rdy) + ); + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_rx_valid_filter_7x.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_rx_valid_filter_7x.v new file mode 100644 index 0000000000000000000000000000000000000000..f2a9aa9c7bd8b568ba8fc13fff604c180ff3f4c9 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_rx_valid_filter_7x.v @@ -0,0 +1,286 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gt_rx_valid_filter_7x.v +// Version : 3.3 +//-- Description: GTX module for 7-series Integrated PCIe Block +//-- +//-- +//-- +//-------------------------------------------------------------------------------- + +`timescale 1ns / 1ns + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gt_rx_valid_filter_7x #( + + parameter CLK_COR_MIN_LAT = 28, + parameter TCQ = 1 + +) +( + output [1:0] USER_RXCHARISK, + output [15:0] USER_RXDATA, + output USER_RXVALID, + output USER_RXELECIDLE, + output [ 2:0] USER_RX_STATUS, + output USER_RX_PHY_STATUS, + input [1:0] GT_RXCHARISK, + input [15:0] GT_RXDATA, + input GT_RXVALID, + input GT_RXELECIDLE, + input [ 2:0] GT_RX_STATUS, + input GT_RX_PHY_STATUS, + + input PLM_IN_L0, + input PLM_IN_RS, + + input USER_CLK, + input RESET + +); + + + + localparam EIOS_DET_IDL = 5'b00001; + localparam EIOS_DET_NO_STR0 = 5'b00010; + localparam EIOS_DET_STR0 = 5'b00100; + localparam EIOS_DET_STR1 = 5'b01000; + localparam EIOS_DET_DONE = 5'b10000; + + localparam EIOS_COM = 8'hBC; + localparam EIOS_IDL = 8'h7C; + localparam FTSOS_COM = 8'hBC; + localparam FTSOS_FTS = 8'h3C; + + reg [4:0] reg_state_eios_det; + wire [4:0] state_eios_det; + + reg reg_eios_detected; + wire eios_detected; + + reg reg_symbol_after_eios; + wire symbol_after_eios; + + localparam USER_RXVLD_IDL = 4'b0001; + localparam USER_RXVLD_EI = 4'b0010; + localparam USER_RXVLD_EI_DB0 = 4'b0100; + localparam USER_RXVLD_EI_DB1 = 4'b1000; + + + reg [1:0] gt_rxcharisk_q; + reg [15:0] gt_rxdata_q; + reg gt_rxvalid_q; + reg gt_rxelecidle_q; + + reg [ 2:0] gt_rx_status_q; + reg gt_rx_phy_status_q; + reg gt_rx_is_skp0_q; + reg gt_rx_is_skp1_q; + + // EIOS detector + + always @(posedge USER_CLK) begin + + if (RESET) begin + + reg_eios_detected <= #TCQ 1'b0; + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + reg_symbol_after_eios <= #TCQ 1'b0; + gt_rxcharisk_q <= #TCQ 2'b00; + gt_rxdata_q <= #TCQ 16'h0; + gt_rxvalid_q <= #TCQ 1'b0; + gt_rxelecidle_q <= #TCQ 1'b0; + gt_rx_status_q <= #TCQ 3'b000; + gt_rx_phy_status_q <= #TCQ 1'b0; + gt_rx_is_skp0_q <= #TCQ 1'b0; + gt_rx_is_skp1_q <= #TCQ 1'b0; + + end else begin + reg_eios_detected <= #TCQ 1'b0; + reg_symbol_after_eios <= #TCQ 1'b0; + gt_rxcharisk_q <= #TCQ GT_RXCHARISK; + gt_rxelecidle_q <= #TCQ GT_RXELECIDLE; + gt_rxdata_q <= #TCQ GT_RXDATA; + gt_rx_phy_status_q <= #TCQ GT_RX_PHY_STATUS; + + //De-assert rx_valid signal when EIOS is detected on RXDATA + if(((reg_state_eios_det == 5'b10000)) && (PLM_IN_L0) + ) begin + + gt_rxvalid_q <= #TCQ 1'b0; + end + else if (GT_RXELECIDLE && !gt_rxvalid_q) begin + gt_rxvalid_q <= #TCQ 1'b0; + end + else begin + gt_rxvalid_q <= GT_RXVALID; + end + + if (gt_rxvalid_q) begin + gt_rx_status_q <= #TCQ GT_RX_STATUS; + + end + else if (!gt_rxvalid_q && PLM_IN_L0) begin + gt_rx_status_q <= #TCQ 3'b0; + end + else begin + gt_rx_status_q <= #TCQ GT_RX_STATUS; + end + + + + if (GT_RXCHARISK[0] && GT_RXDATA[7:0] == FTSOS_FTS) + gt_rx_is_skp0_q <= #TCQ 1'b1; + else + gt_rx_is_skp0_q <= #TCQ 1'b0; + + if (GT_RXCHARISK[1] && GT_RXDATA[15:8] == FTSOS_FTS) + gt_rx_is_skp1_q <= #TCQ 1'b1; + else + gt_rx_is_skp1_q <= #TCQ 1'b0; + + case ( state_eios_det ) + + EIOS_DET_IDL : begin + + if ((gt_rxcharisk_q[0]) && (gt_rxdata_q[7:0] == EIOS_COM) && + (gt_rxcharisk_q[1]) && (gt_rxdata_q[15:8] == EIOS_IDL)) begin + + reg_state_eios_det <= #TCQ EIOS_DET_NO_STR0; + reg_eios_detected <= #TCQ 1'b1; + // gt_rxvalid_q <= #TCQ 1'b0; + + end else if ((gt_rxcharisk_q[1]) && (gt_rxdata_q[15:8] == EIOS_COM)) + reg_state_eios_det <= #TCQ EIOS_DET_STR0; + else + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + + end + + EIOS_DET_NO_STR0 : begin + + if ((gt_rxcharisk_q[0] && (gt_rxdata_q[7:0] == EIOS_IDL)) && + (gt_rxcharisk_q[1] && (gt_rxdata_q[15:8] == EIOS_IDL))) + begin + reg_state_eios_det <= #TCQ EIOS_DET_DONE; + gt_rxvalid_q <= #TCQ 1'b0; + end + else if (gt_rxcharisk_q[0] && (gt_rxdata_q[7:0] == EIOS_IDL)) begin + + reg_state_eios_det <= #TCQ EIOS_DET_DONE; + gt_rxvalid_q <= #TCQ 1'b0; + end + else + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + + end + + EIOS_DET_STR0 : begin + + if ((gt_rxcharisk_q[0] && (gt_rxdata_q[7:0] == EIOS_IDL)) && + (gt_rxcharisk_q[1] && (gt_rxdata_q[15:8] == EIOS_IDL))) begin + + reg_state_eios_det <= #TCQ EIOS_DET_STR1; + reg_eios_detected <= #TCQ 1'b1; + gt_rxvalid_q <= #TCQ 1'b0; + reg_symbol_after_eios <= #TCQ 1'b1; + + end else + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + + end + + EIOS_DET_STR1 : begin + + if ((gt_rxcharisk_q[0]) && (gt_rxdata_q[7:0] == EIOS_IDL)) + begin + reg_state_eios_det <= #TCQ EIOS_DET_DONE; + gt_rxvalid_q <= #TCQ 1'b0; + end + else + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + + end + + EIOS_DET_DONE : begin + + reg_state_eios_det <= #TCQ EIOS_DET_IDL; + + end + + endcase + + end + + end + assign state_eios_det = reg_state_eios_det; + assign eios_detected = reg_eios_detected; + assign symbol_after_eios = reg_symbol_after_eios; + /*SRL16E #(.INIT(0)) rx_elec_idle_delay (.Q(USER_RXELECIDLE), + .D(gt_rxelecidle_q), + .CLK(USER_CLK), + .CE(1'b1), .A3(1'b1),.A2(1'b1),.A1(1'b1),.A0(1'b1)); +*/ +wire rst_l = ~RESET; + + +assign USER_RXVALID = gt_rxvalid_q; +assign USER_RXCHARISK[0] = gt_rxvalid_q ? gt_rxcharisk_q[0] : 1'b0; +assign USER_RXCHARISK[1] = (gt_rxvalid_q && !symbol_after_eios) ? gt_rxcharisk_q[1] : 1'b0; +assign USER_RXDATA[7:0] = gt_rxdata_q[7:0]; +assign USER_RXDATA[15:8] = gt_rxdata_q[15:8]; +assign USER_RX_STATUS = gt_rx_status_q; +assign USER_RX_PHY_STATUS = gt_rx_phy_status_q; +assign USER_RXELECIDLE = gt_rxelecidle_q; + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_top.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_top.v new file mode 100644 index 0000000000000000000000000000000000000000..bfccc546ffa1f4734fe98bfb4ab1050b7badeefa --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_top.v @@ -0,0 +1,1028 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gt_top.v +// Version : 3.3 +//-- Description: GTX module for 7-series Integrated PCIe Block +//-- +//-- +//-- +//-------------------------------------------------------------------------------- + +`timescale 1ns/1ns + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gt_top # +( + parameter LINK_CAP_MAX_LINK_WIDTH = 8, // 1 - x1 , 2 - x2 , 4 - x4 , 8 - x8 + parameter REF_CLK_FREQ = 0, // 0 - 100 MHz , 1 - 125 MHz , 2 - 250 MHz + parameter USER_CLK2_DIV2 = "FALSE", // "FALSE" => user_clk2 = user_clk + // "TRUE" => user_clk2 = user_clk/2, where user_clk = 500 or 250 MHz. + parameter integer USER_CLK_FREQ = 3, // 0 - 31.25 MHz , 1 - 62.5 MHz , 2 - 125 MHz , 3 - 250 MHz , 4 - 500Mhz + parameter PL_FAST_TRAIN = "FALSE", // Simulation Speedup + parameter PCIE_EXT_CLK = "FALSE", // Use External Clocking + parameter PCIE_USE_MODE = "1.0", // 1.0 = K325T IES, 1.1 = VX485T IES, 3.0 = K325T GES + parameter PCIE_GT_DEVICE = "GTX", // Select the GT to use (GTP for Artix-7, GTX for K7/V7) + parameter PCIE_PLL_SEL = "CPLL", // Select the PLL (CPLL or QPLL) + parameter PCIE_ASYNC_EN = "FALSE", // Asynchronous Clocking Enable + parameter PCIE_TXBUF_EN = "FALSE", // Use the Tansmit Buffer + parameter PCIE_EXT_GT_COMMON = "FALSE", + parameter EXT_CH_GT_DRP = "FALSE", + parameter TX_MARGIN_FULL_0 = 7'b1001111, // 1000 mV + parameter TX_MARGIN_FULL_1 = 7'b1001110, // 950 mV + parameter TX_MARGIN_FULL_2 = 7'b1001101, // 900 mV + parameter TX_MARGIN_FULL_3 = 7'b1001100, // 850 mV + parameter TX_MARGIN_FULL_4 = 7'b1000011, // 400 mV + parameter TX_MARGIN_LOW_0 = 7'b1000101, // 500 mV + parameter TX_MARGIN_LOW_1 = 7'b1000110, // 450 mV + parameter TX_MARGIN_LOW_2 = 7'b1000011, // 400 mV + parameter TX_MARGIN_LOW_3 = 7'b1000010, // 350 mV + parameter TX_MARGIN_LOW_4 = 7'b1000000, + + parameter PCIE_CHAN_BOND = 0, + parameter TCQ = 1 //synthesis warning solved: parameter declaration becomes local +) +( + //-----------------------------------------------------------------------------------------------------------------// + // pl ltssm + input wire [5:0] pl_ltssm_state , + // Pipe Per-Link Signals + input wire pipe_tx_rcvr_det , + input wire pipe_tx_reset , + input wire pipe_tx_rate , + input wire pipe_tx_deemph , + input wire [2:0] pipe_tx_margin , + input wire pipe_tx_swing , + + //-----------------------------------------------------------------------------------------------------------------// + // Pipe Per-Lane Signals // + //-----------------------------------------------------------------------------------------------------------------// + + + // Pipe Per-Lane Signals - Lane 0 + output wire [ 1:0] pipe_rx0_char_is_k , + output wire [15:0] pipe_rx0_data , + output wire pipe_rx0_valid , + output wire pipe_rx0_chanisaligned , + output wire [ 2:0] pipe_rx0_status , + output wire pipe_rx0_phy_status , + output wire pipe_rx0_elec_idle , + input wire pipe_rx0_polarity , + input wire pipe_tx0_compliance , + input wire [ 1:0] pipe_tx0_char_is_k , + input wire [15:0] pipe_tx0_data , + input wire pipe_tx0_elec_idle , + input wire [ 1:0] pipe_tx0_powerdown , + + // Pipe Per-Lane Signals - Lane 1 + output wire [ 1:0] pipe_rx1_char_is_k , + output wire [15:0] pipe_rx1_data , + output wire pipe_rx1_valid , + output wire pipe_rx1_chanisaligned , + output wire [ 2:0] pipe_rx1_status , + output wire pipe_rx1_phy_status , + output wire pipe_rx1_elec_idle , + input wire pipe_rx1_polarity , + input wire pipe_tx1_compliance , + input wire [ 1:0] pipe_tx1_char_is_k , + input wire [15:0] pipe_tx1_data , + input wire pipe_tx1_elec_idle , + input wire [ 1:0] pipe_tx1_powerdown , + + // Pipe Per-Lane Signals - Lane 2 + output wire [ 1:0] pipe_rx2_char_is_k , + output wire [15:0] pipe_rx2_data , + output wire pipe_rx2_valid , + output wire pipe_rx2_chanisaligned , + output wire [ 2:0] pipe_rx2_status , + output wire pipe_rx2_phy_status , + output wire pipe_rx2_elec_idle , + input wire pipe_rx2_polarity , + input wire pipe_tx2_compliance , + input wire [ 1:0] pipe_tx2_char_is_k , + input wire [15:0] pipe_tx2_data , + input wire pipe_tx2_elec_idle , + input wire [ 1:0] pipe_tx2_powerdown , + + // Pipe Per-Lane Signals - Lane 3 + output wire [ 1:0] pipe_rx3_char_is_k , + output wire [15:0] pipe_rx3_data , + output wire pipe_rx3_valid , + output wire pipe_rx3_chanisaligned , + output wire [ 2:0] pipe_rx3_status , + output wire pipe_rx3_phy_status , + output wire pipe_rx3_elec_idle , + input wire pipe_rx3_polarity , + input wire pipe_tx3_compliance , + input wire [ 1:0] pipe_tx3_char_is_k , + input wire [15:0] pipe_tx3_data , + input wire pipe_tx3_elec_idle , + input wire [ 1:0] pipe_tx3_powerdown , + + // Pipe Per-Lane Signals - Lane 4 + output wire [ 1:0] pipe_rx4_char_is_k , + output wire [15:0] pipe_rx4_data , + output wire pipe_rx4_valid , + output wire pipe_rx4_chanisaligned , + output wire [ 2:0] pipe_rx4_status , + output wire pipe_rx4_phy_status , + output wire pipe_rx4_elec_idle , + input wire pipe_rx4_polarity , + input wire pipe_tx4_compliance , + input wire [ 1:0] pipe_tx4_char_is_k , + input wire [15:0] pipe_tx4_data , + input wire pipe_tx4_elec_idle , + input wire [ 1:0] pipe_tx4_powerdown , + + // Pipe Per-Lane Signals - Lane 5 + output wire [ 1:0] pipe_rx5_char_is_k , + output wire [15:0] pipe_rx5_data , + output wire pipe_rx5_valid , + output wire pipe_rx5_chanisaligned , + output wire [ 2:0] pipe_rx5_status , + output wire pipe_rx5_phy_status , + output wire pipe_rx5_elec_idle , + input wire pipe_rx5_polarity , + input wire pipe_tx5_compliance , + input wire [ 1:0] pipe_tx5_char_is_k , + input wire [15:0] pipe_tx5_data , + input wire pipe_tx5_elec_idle , + input wire [ 1:0] pipe_tx5_powerdown , + + // Pipe Per-Lane Signals - Lane 6 + output wire [ 1:0] pipe_rx6_char_is_k , + output wire [15:0] pipe_rx6_data , + output wire pipe_rx6_valid , + output wire pipe_rx6_chanisaligned , + output wire [ 2:0] pipe_rx6_status , + output wire pipe_rx6_phy_status , + output wire pipe_rx6_elec_idle , + input wire pipe_rx6_polarity , + input wire pipe_tx6_compliance , + input wire [ 1:0] pipe_tx6_char_is_k , + input wire [15:0] pipe_tx6_data , + input wire pipe_tx6_elec_idle , + input wire [ 1:0] pipe_tx6_powerdown , + + // Pipe Per-Lane Signals - Lane 7 + output wire [ 1:0] pipe_rx7_char_is_k , + output wire [15:0] pipe_rx7_data , + output wire pipe_rx7_valid , + output wire pipe_rx7_chanisaligned , + output wire [ 2:0] pipe_rx7_status , + output wire pipe_rx7_phy_status , + output wire pipe_rx7_elec_idle , + input wire pipe_rx7_polarity , + input wire pipe_tx7_compliance , + input wire [ 1:0] pipe_tx7_char_is_k , + input wire [15:0] pipe_tx7_data , + input wire pipe_tx7_elec_idle , + input wire [ 1:0] pipe_tx7_powerdown , + + // PCI Express signals + output wire [ (LINK_CAP_MAX_LINK_WIDTH-1):0] pci_exp_txn , + output wire [ (LINK_CAP_MAX_LINK_WIDTH-1):0] pci_exp_txp , + input wire [ (LINK_CAP_MAX_LINK_WIDTH-1):0] pci_exp_rxn , + input wire [ (LINK_CAP_MAX_LINK_WIDTH-1):0] pci_exp_rxp , + + // Non PIPE signals + input wire sys_clk , + input wire sys_rst_n , + input wire PIPE_MMCM_RST_N , + output wire pipe_clk , + output wire user_clk , + output wire user_clk2 , + +//----------- Shared Logic Internal-------------------------------------- + + output INT_PCLK_OUT_SLAVE, // PCLK | PCLK + output INT_RXUSRCLK_OUT, // RXUSERCLK + output [(LINK_CAP_MAX_LINK_WIDTH-1):0] INT_RXOUTCLK_OUT, // RX recovered clock + output INT_DCLK_OUT, // DCLK | DCLK + output INT_USERCLK1_OUT, // Optional user clock + output INT_USERCLK2_OUT, // Optional user clock + output INT_OOBCLK_OUT, // OOB | OOB + output INT_MMCM_LOCK_OUT, // Async | Async + output [1:0] INT_QPLLLOCK_OUT, + output [1:0] INT_QPLLOUTCLK_OUT, + output [1:0] INT_QPLLOUTREFCLK_OUT, + input [(LINK_CAP_MAX_LINK_WIDTH-1):0] INT_PCLK_SEL_SLAVE, + + // Shared Logic External + + //---------- External GT COMMON Ports ---------------------- + input [11:0] qpll_drp_crscode, + input [17:0] qpll_drp_fsm, + input [1:0] qpll_drp_done, + input [1:0] qpll_drp_reset, + input [1:0] qpll_qplllock, + input [1:0] qpll_qplloutclk, + input [1:0] qpll_qplloutrefclk, + output qpll_qplld, + output [1:0] qpll_qpllreset, + output qpll_drp_clk, + output qpll_drp_rst_n, + output qpll_drp_ovrd, + output qpll_drp_gen3, + output qpll_drp_start, + + //---------- External Clock Ports ---------------------- + input PIPE_PCLK_IN, // PCLK | PCLK + input PIPE_RXUSRCLK_IN, // RXUSERCLK + input [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_RXOUTCLK_IN, // RX recovered clock + input PIPE_DCLK_IN, // DCLK | DCLK + input PIPE_USERCLK1_IN, // Optional user clock + input PIPE_USERCLK2_IN, // Optional user clock + input PIPE_OOBCLK_IN, // OOB | OOB + input PIPE_MMCM_LOCK_IN, // Async | Async + output PIPE_TXOUTCLK_OUT, // PCLK | PCLK + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_RXOUTCLK_OUT, // RX recovered clock (for debug only) + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_PCLK_SEL_OUT, // PCLK | PCLK + output PIPE_GEN3_OUT , // PCLK | PCLK + +//-----------TRANSCEIVER DEBUG-------------------------------- + + output [4:0] PIPE_RST_FSM, + output [11:0] PIPE_QRST_FSM, + output [(LINK_CAP_MAX_LINK_WIDTH*5)-1:0] PIPE_RATE_FSM, + output [(LINK_CAP_MAX_LINK_WIDTH*6)-1:0] PIPE_SYNC_FSM_TX, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] PIPE_SYNC_FSM_RX, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] PIPE_DRP_FSM, + + output PIPE_RST_IDLE, + output PIPE_QRST_IDLE, + output PIPE_RATE_IDLE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_EYESCANDATAERROR, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] PIPE_RXSTATUS, + output [(LINK_CAP_MAX_LINK_WIDTH*15)-1:0] PIPE_DMONITOROUT, + + //---------- Debug Ports ------------------------------- + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_CPLL_LOCK, + output [(LINK_CAP_MAX_LINK_WIDTH-1)>>2:0] PIPE_QPLL_LOCK, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_RXPMARESETDONE, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] PIPE_RXBUFSTATUS, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_TXPHALIGNDONE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_TXPHINITDONE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_TXDLYSRESETDONE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_RXPHALIGNDONE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_RXDLYSRESETDONE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_RXSYNCDONE, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] PIPE_RXDISPERR, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] PIPE_RXNOTINTABLE, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] PIPE_RXCOMMADET, + + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_0, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_1, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_2, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_3, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_4, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_5, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_6, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_7, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_8, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_DEBUG_9, + output [31:0] PIPE_DEBUG, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_JTAG_RDY, + + input [ 2:0] PIPE_TXPRBSSEL, + input [ 2:0] PIPE_RXPRBSSEL, + input PIPE_TXPRBSFORCEERR, + input PIPE_RXPRBSCNTRESET, + input [ 2:0] PIPE_LOOPBACK, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_RXPRBSERR, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] PIPE_TXINHIBIT, + + //-----------Channel DRP---------------------------------------- + output ext_ch_gt_drpclk, + input [(LINK_CAP_MAX_LINK_WIDTH*9)-1:0] ext_ch_gt_drpaddr, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpen, + input [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0]ext_ch_gt_drpdi, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpwe, + + output [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0]ext_ch_gt_drpdo, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drprdy, + + output wire phy_rdy_n +); + + + localparam USERCLK2_FREQ = (USER_CLK2_DIV2 == "FALSE") ? USER_CLK_FREQ : + (USER_CLK_FREQ == 4) ? 3 : + (USER_CLK_FREQ == 3) ? 2 : + USER_CLK_FREQ; + + localparam PCIE_LPM_DFE = (PL_FAST_TRAIN == "TRUE") ? "DFE" : "LPM"; + localparam PCIE_LINK_SPEED = (PL_FAST_TRAIN == "TRUE") ? 2 : 3; + + // The parameter PCIE_OOBCLK_MODE_ENABLE value should be "0" for simulation and for synthesis it should be 1 + //localparam PCIE_OOBCLK_MODE_ENABLE = (PL_FAST_TRAIN == "TRUE") ? 0 : 1; + localparam PCIE_OOBCLK_MODE_ENABLE = 1; + + localparam PCIE_TX_EIDLE_ASSERT_DELAY = (PL_FAST_TRAIN == "TRUE") ? 3'd4 : 3'd2; + + wire [ 7:0] gt_rx_phy_status_wire ; + wire [ 7:0] gt_rxchanisaligned_wire ; + wire [ 31:0] gt_rx_data_k_wire ; + wire [255:0] gt_rx_data_wire ; + wire [ 7:0] gt_rx_elec_idle_wire ; + wire [ 23:0] gt_rx_status_wire ; + wire [ 7:0] gt_rx_valid_wire ; + wire [ 7:0] gt_rx_polarity ; + wire [ 15:0] gt_power_down ; + wire [ 7:0] gt_tx_char_disp_mode ; + wire [ 31:0] gt_tx_data_k ; + wire [255:0] gt_tx_data ; + wire gt_tx_detect_rx_loopback ; + wire [ 7:0] gt_tx_elec_idle ; + wire [ 7:0] gt_rx_elec_idle_reset ; + wire [LINK_CAP_MAX_LINK_WIDTH-1:0] phystatus_rst ; + wire clock_locked ; + + wire [ 7:0] gt_rx_phy_status_wire_filter ; + wire [ 31:0] gt_rx_data_k_wire_filter ; + wire [255:0] gt_rx_data_wire_filter ; + wire [ 7:0] gt_rx_elec_idle_wire_filter ; + wire [ 23:0] gt_rx_status_wire_filter ; + wire [ 7:0] gt_rx_valid_wire_filter ; + + wire [LINK_CAP_MAX_LINK_WIDTH-1:0] gt_eyescandataerror ; + wire pipe_clk_int; + reg phy_rdy_n_int; + + reg reg_clock_locked; + wire all_phystatus_rst; + +reg [5:0] pl_ltssm_state_q; + +always @(posedge pipe_clk_int or negedge clock_locked) begin + + if (!clock_locked) + pl_ltssm_state_q <= #TCQ 6'b0; + else + pl_ltssm_state_q <= #TCQ pl_ltssm_state; + +end + + assign pipe_clk = pipe_clk_int ; + + wire plm_in_l0 = (pl_ltssm_state_q == 6'h16); + wire plm_in_rl = (pl_ltssm_state_q == 6'h1c); + wire plm_in_dt = (pl_ltssm_state_q == 6'h2d); + wire plm_in_rs = (pl_ltssm_state_q == 6'h1f); + +//-------------RX FILTER Instantiation----------------------------------------------------------// +genvar i; +generate for (i=0; i= 2 ) ? gt_rx_phy_status_wire[1] : 1'b0; +assign pipe_rx2_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_phy_status_wire[2] : 1'b0; +assign pipe_rx3_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_phy_status_wire[3] : 1'b0; +assign pipe_rx4_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_phy_status_wire[4] : 1'b0; +assign pipe_rx5_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_phy_status_wire[5] : 1'b0; +assign pipe_rx6_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_phy_status_wire[6] : 1'b0; +assign pipe_rx7_phy_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_phy_status_wire[7] : 1'b0; + +assign pipe_rx0_chanisaligned = gt_rxchanisaligned_wire[0]; +assign pipe_rx1_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 2 ) ? gt_rxchanisaligned_wire[1] : 1'b0 ; +assign pipe_rx2_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rxchanisaligned_wire[2] : 1'b0 ; +assign pipe_rx3_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rxchanisaligned_wire[3] : 1'b0 ; +assign pipe_rx4_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rxchanisaligned_wire[4] : 1'b0 ; +assign pipe_rx5_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rxchanisaligned_wire[5] : 1'b0 ; +assign pipe_rx6_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rxchanisaligned_wire[6] : 1'b0 ; +assign pipe_rx7_chanisaligned = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rxchanisaligned_wire[7] : 1'b0 ; + +//<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< +//<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< + +generate + if (LINK_CAP_MAX_LINK_WIDTH == 1) + begin : rx_link_width_x1 + + assign pipe_rx0_char_is_k = {gt_rx_data_k_wire[1], gt_rx_data_k_wire[0]}; + assign pipe_rx1_char_is_k = 2'b0 ; + assign pipe_rx2_char_is_k = 2'b0 ; + assign pipe_rx3_char_is_k = 2'b0 ; + assign pipe_rx4_char_is_k = 2'b0 ; + assign pipe_rx5_char_is_k = 2'b0 ; + assign pipe_rx6_char_is_k = 2'b0 ; + assign pipe_rx7_char_is_k = 2'b0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_k_wire[3:2] = 2'b0; + assign gt_rx_data_k_wire[5:4] = 2'b0; + assign gt_rx_data_k_wire[7:6] = 2'b0; + assign gt_rx_data_k_wire[9:8] = 2'b0; + assign gt_rx_data_k_wire[11:10] = 2'b0; + assign gt_rx_data_k_wire[13:12] = 2'b0; + assign gt_rx_data_k_wire[15:14] = 2'b0; + assign gt_rx_data_k_wire[17:16] = 2'b0; + assign gt_rx_data_k_wire[19:18] = 2'b0; + assign gt_rx_data_k_wire[21:20] = 2'b0; + assign gt_rx_data_k_wire[23:22] = 2'b0; + assign gt_rx_data_k_wire[25:24] = 2'b0; + assign gt_rx_data_k_wire[27:26] = 2'b0; + assign gt_rx_data_k_wire[29:28] = 2'b0; + assign gt_rx_data_k_wire[31:30] = 2'b0; + + assign pipe_rx0_data = {gt_rx_data_wire[ 15: 8], gt_rx_data_wire[ 7: 0]}; + assign pipe_rx1_data = 16'h0 ; + assign pipe_rx2_data = 16'h0 ; + assign pipe_rx3_data = 16'h0 ; + assign pipe_rx4_data = 16'h0 ; + assign pipe_rx5_data = 16'h0 ; + assign pipe_rx6_data = 16'h0 ; + assign pipe_rx7_data = 16'h0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_wire[31:16] = 16'b0; + assign gt_rx_data_wire[47:32] = 16'b0; + assign gt_rx_data_wire[63:48] = 16'b0; + assign gt_rx_data_wire[79:64] = 16'b0; + assign gt_rx_data_wire[95:80] = 16'b0; + assign gt_rx_data_wire[111:96] = 16'b0; + assign gt_rx_data_wire[127:112] = 16'b0; + assign gt_rx_data_wire[143:128] = 16'b0; + assign gt_rx_data_wire[159:144] = 16'b0; + assign gt_rx_data_wire[175:160] = 16'b0; + assign gt_rx_data_wire[191:176] = 16'b0; + assign gt_rx_data_wire[207:192] = 16'b0; + assign gt_rx_data_wire[223:208] = 16'b0; + assign gt_rx_data_wire[239:224] = 16'b0; + assign gt_rx_data_wire[255:240] = 16'b0; + + end // rx_link_width_x1 + else if (LINK_CAP_MAX_LINK_WIDTH == 2) + begin : rx_link_width_x2 + + assign pipe_rx0_char_is_k = {gt_rx_data_k_wire[1], gt_rx_data_k_wire[0]}; + assign pipe_rx1_char_is_k = {gt_rx_data_k_wire[5], gt_rx_data_k_wire[4]}; + assign pipe_rx2_char_is_k = 2'b0 ; + assign pipe_rx3_char_is_k = 2'b0 ; + assign pipe_rx4_char_is_k = 2'b0 ; + assign pipe_rx5_char_is_k = 2'b0 ; + assign pipe_rx6_char_is_k = 2'b0 ; + assign pipe_rx7_char_is_k = 2'b0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_k_wire[3:2] = 2'b0; + assign gt_rx_data_k_wire[7:6] = 2'b0; + assign gt_rx_data_k_wire[9:8] = 2'b0; + assign gt_rx_data_k_wire[11:10] = 2'b0; + assign gt_rx_data_k_wire[13:12] = 2'b0; + assign gt_rx_data_k_wire[15:14] = 2'b0; + assign gt_rx_data_k_wire[17:16] = 2'b0; + assign gt_rx_data_k_wire[19:18] = 2'b0; + assign gt_rx_data_k_wire[21:20] = 2'b0; + assign gt_rx_data_k_wire[23:22] = 2'b0; + assign gt_rx_data_k_wire[25:24] = 2'b0; + assign gt_rx_data_k_wire[27:26] = 2'b0; + assign gt_rx_data_k_wire[29:28] = 2'b0; + assign gt_rx_data_k_wire[31:30] = 2'b0; + + assign pipe_rx0_data = {gt_rx_data_wire[15: 8], gt_rx_data_wire[ 7: 0]}; + assign pipe_rx1_data = {gt_rx_data_wire[47:40], gt_rx_data_wire[39:32]} ; + assign pipe_rx2_data = 16'h0 ; + assign pipe_rx3_data = 16'h0 ; + assign pipe_rx4_data = 16'h0 ; + assign pipe_rx5_data = 16'h0 ; + assign pipe_rx6_data = 16'h0 ; + assign pipe_rx7_data = 16'h0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_wire[31:16] = 16'b0; + assign gt_rx_data_wire[63:48] = 16'b0; + assign gt_rx_data_wire[79:64] = 16'b0; + assign gt_rx_data_wire[95:80] = 16'b0; + assign gt_rx_data_wire[111:96] = 16'b0; + assign gt_rx_data_wire[127:112] = 16'b0; + assign gt_rx_data_wire[143:128] = 16'b0; + assign gt_rx_data_wire[159:144] = 16'b0; + assign gt_rx_data_wire[175:160] = 16'b0; + assign gt_rx_data_wire[191:176] = 16'b0; + assign gt_rx_data_wire[207:192] = 16'b0; + assign gt_rx_data_wire[223:208] = 16'b0; + assign gt_rx_data_wire[239:224] = 16'b0; + assign gt_rx_data_wire[255:240] = 16'b0; + + end // rx_link_width_x2 + else if (LINK_CAP_MAX_LINK_WIDTH == 4) + begin : rx_link_width_x4 + + assign pipe_rx0_char_is_k = {gt_rx_data_k_wire[1], gt_rx_data_k_wire[0]}; + assign pipe_rx1_char_is_k = {gt_rx_data_k_wire[5], gt_rx_data_k_wire[4]}; + assign pipe_rx2_char_is_k = {gt_rx_data_k_wire[9], gt_rx_data_k_wire[8]}; + assign pipe_rx3_char_is_k = {gt_rx_data_k_wire[13], gt_rx_data_k_wire[12]}; + assign pipe_rx4_char_is_k = 2'b0 ; + assign pipe_rx5_char_is_k = 2'b0 ; + assign pipe_rx6_char_is_k = 2'b0 ; + assign pipe_rx7_char_is_k = 2'b0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_k_wire[3:2] = 2'b0; + assign gt_rx_data_k_wire[7:6] = 2'b0; + assign gt_rx_data_k_wire[11:10] = 2'b0; + assign gt_rx_data_k_wire[15:14] = 2'b0; + assign gt_rx_data_k_wire[17:16] = 2'b0; + assign gt_rx_data_k_wire[19:18] = 2'b0; + assign gt_rx_data_k_wire[21:20] = 2'b0; + assign gt_rx_data_k_wire[23:22] = 2'b0; + assign gt_rx_data_k_wire[25:24] = 2'b0; + assign gt_rx_data_k_wire[27:26] = 2'b0; + assign gt_rx_data_k_wire[29:28] = 2'b0; + assign gt_rx_data_k_wire[31:30] = 2'b0; + + assign pipe_rx0_data = {gt_rx_data_wire[15: 8], gt_rx_data_wire[ 7: 0]}; + assign pipe_rx1_data = {gt_rx_data_wire[47:40], gt_rx_data_wire[39:32]}; + assign pipe_rx2_data = {gt_rx_data_wire[79:72], gt_rx_data_wire[71:64]}; + assign pipe_rx3_data = {gt_rx_data_wire[111:104], gt_rx_data_wire[103:96]}; + assign pipe_rx4_data = 16'h0 ; + assign pipe_rx5_data = 16'h0 ; + assign pipe_rx6_data = 16'h0 ; + assign pipe_rx7_data = 16'h0 ; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_wire[31:16] = 16'b0; + assign gt_rx_data_wire[63:48] = 16'b0; + assign gt_rx_data_wire[95:80] = 16'b0; + assign gt_rx_data_wire[127:112] = 16'b0; + assign gt_rx_data_wire[143:128] = 16'b0; + assign gt_rx_data_wire[159:144] = 16'b0; + assign gt_rx_data_wire[175:160] = 16'b0; + assign gt_rx_data_wire[191:176] = 16'b0; + assign gt_rx_data_wire[207:192] = 16'b0; + assign gt_rx_data_wire[223:208] = 16'b0; + assign gt_rx_data_wire[239:224] = 16'b0; + assign gt_rx_data_wire[255:240] = 16'b0; + + end // rx_link_width_x4 + else + begin : rx_link_width_x8 + + assign pipe_rx0_char_is_k = {gt_rx_data_k_wire[1], gt_rx_data_k_wire[0]}; + assign pipe_rx1_char_is_k = {gt_rx_data_k_wire[5], gt_rx_data_k_wire[4]}; + assign pipe_rx2_char_is_k = {gt_rx_data_k_wire[9], gt_rx_data_k_wire[8]}; + assign pipe_rx3_char_is_k = {gt_rx_data_k_wire[13], gt_rx_data_k_wire[12]}; + assign pipe_rx4_char_is_k = {gt_rx_data_k_wire[17], gt_rx_data_k_wire[16]}; + assign pipe_rx5_char_is_k = {gt_rx_data_k_wire[21], gt_rx_data_k_wire[20]}; + assign pipe_rx6_char_is_k = {gt_rx_data_k_wire[25], gt_rx_data_k_wire[24]}; + assign pipe_rx7_char_is_k = {gt_rx_data_k_wire[29], gt_rx_data_k_wire[28]}; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_k_wire[3:2] = 2'b0; + assign gt_rx_data_k_wire[7:6] = 2'b0; + assign gt_rx_data_k_wire[11:10] = 2'b0; + assign gt_rx_data_k_wire[15:14] = 2'b0; + assign gt_rx_data_k_wire[19:18] = 2'b0; + assign gt_rx_data_k_wire[23:22] = 2'b0; + assign gt_rx_data_k_wire[27:26] = 2'b0; + assign gt_rx_data_k_wire[31:30] = 2'b0; + + assign pipe_rx0_data = {gt_rx_data_wire[15: 8], gt_rx_data_wire[ 7: 0]}; + assign pipe_rx1_data = {gt_rx_data_wire[47:40], gt_rx_data_wire[39:32]}; + assign pipe_rx2_data = {gt_rx_data_wire[79:72], gt_rx_data_wire[71:64]}; + assign pipe_rx3_data = {gt_rx_data_wire[111:104], gt_rx_data_wire[103:96]}; + assign pipe_rx4_data = {gt_rx_data_wire[143:136], gt_rx_data_wire[135:128]}; + assign pipe_rx5_data = {gt_rx_data_wire[175:168], gt_rx_data_wire[167:160]}; + assign pipe_rx6_data = {gt_rx_data_wire[207:200], gt_rx_data_wire[199:192]}; + assign pipe_rx7_data = {gt_rx_data_wire[239:232], gt_rx_data_wire[231:224]}; + + //synthesis warning solved: for nets below does not have driver; --assigned remaining bits of net gt_rx_data_wire to '0' + assign gt_rx_data_wire[31:16] = 16'b0; + assign gt_rx_data_wire[63:48] = 16'b0; + assign gt_rx_data_wire[95:80] = 16'b0; + assign gt_rx_data_wire[127:112] = 16'b0; + assign gt_rx_data_wire[159:144] = 16'b0; + assign gt_rx_data_wire[191:176] = 16'b0; + assign gt_rx_data_wire[223:208] = 16'b0; + assign gt_rx_data_wire[255:240] = 16'b0; + + end // rx_link_width_x8 +endgenerate + +assign pipe_rx0_status = gt_rx_status_wire[ 2: 0]; +assign pipe_rx1_status = (LINK_CAP_MAX_LINK_WIDTH >= 2 ) ? gt_rx_status_wire[ 5: 3] : 3'b0 ; +assign pipe_rx2_status = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_status_wire[ 8: 6] : 3'b0 ; +assign pipe_rx3_status = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_status_wire[11: 9] : 3'b0 ; +assign pipe_rx4_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_status_wire[14:12] : 3'b0 ; +assign pipe_rx5_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_status_wire[17:15] : 3'b0 ; +assign pipe_rx6_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_status_wire[20:18] : 3'b0 ; +assign pipe_rx7_status = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_status_wire[23:21] : 3'b0 ; + +//<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< +//<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< + +assign pipe_rx0_elec_idle = gt_rx_elec_idle_wire[0]; +assign pipe_rx1_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 2 ) ? gt_rx_elec_idle_wire[1] : 1'b1 ; +assign pipe_rx2_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_elec_idle_wire[2] : 1'b1 ; +assign pipe_rx3_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_elec_idle_wire[3] : 1'b1 ; +assign pipe_rx4_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_elec_idle_wire[4] : 1'b1 ; +assign pipe_rx5_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_elec_idle_wire[5] : 1'b1 ; +assign pipe_rx6_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_elec_idle_wire[6] : 1'b1 ; +assign pipe_rx7_elec_idle = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_elec_idle_wire[7] : 1'b1 ; + +assign pipe_rx0_valid = gt_rx_valid_wire[0]; +assign pipe_rx1_valid = (LINK_CAP_MAX_LINK_WIDTH >= 2 ) ? gt_rx_valid_wire[1] : 1'b0 ; +assign pipe_rx2_valid = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_valid_wire[2] : 1'b0 ; +assign pipe_rx3_valid = (LINK_CAP_MAX_LINK_WIDTH >= 4 ) ? gt_rx_valid_wire[3] : 1'b0 ; +assign pipe_rx4_valid = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_valid_wire[4] : 1'b0 ; +assign pipe_rx5_valid = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_valid_wire[5] : 1'b0 ; +assign pipe_rx6_valid = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_valid_wire[6] : 1'b0 ; +assign pipe_rx7_valid = (LINK_CAP_MAX_LINK_WIDTH >= 8 ) ? gt_rx_valid_wire[7] : 1'b0 ; + +assign gt_rx_polarity[0] = pipe_rx0_polarity; +assign gt_rx_polarity[1] = pipe_rx1_polarity; +assign gt_rx_polarity[2] = pipe_rx2_polarity; +assign gt_rx_polarity[3] = pipe_rx3_polarity; +assign gt_rx_polarity[4] = pipe_rx4_polarity; +assign gt_rx_polarity[5] = pipe_rx5_polarity; +assign gt_rx_polarity[6] = pipe_rx6_polarity; +assign gt_rx_polarity[7] = pipe_rx7_polarity; + +assign gt_power_down[ 1: 0] = pipe_tx0_powerdown; +assign gt_power_down[ 3: 2] = pipe_tx1_powerdown; +assign gt_power_down[ 5: 4] = pipe_tx2_powerdown; +assign gt_power_down[ 7: 6] = pipe_tx3_powerdown; +assign gt_power_down[ 9: 8] = pipe_tx4_powerdown; +assign gt_power_down[11:10] = pipe_tx5_powerdown; +assign gt_power_down[13:12] = pipe_tx6_powerdown; +assign gt_power_down[15:14] = pipe_tx7_powerdown; + +assign gt_tx_char_disp_mode = {pipe_tx7_compliance, + pipe_tx6_compliance, + pipe_tx5_compliance, + pipe_tx4_compliance, + pipe_tx3_compliance, + pipe_tx2_compliance, + pipe_tx1_compliance, + pipe_tx0_compliance}; + + +assign gt_tx_data_k = {2'd0, + pipe_tx7_char_is_k, + 2'd0, + pipe_tx6_char_is_k, + 2'd0, + pipe_tx5_char_is_k, + 2'd0, + pipe_tx4_char_is_k, + 2'd0, + pipe_tx3_char_is_k, + 2'd0, + pipe_tx2_char_is_k, + 2'd0, + pipe_tx1_char_is_k, + 2'd0, + pipe_tx0_char_is_k}; + +assign gt_tx_data = {16'd0, + pipe_tx7_data, + 16'd0, + pipe_tx6_data, + 16'd0, + pipe_tx5_data, + 16'd0, + pipe_tx4_data, + 16'd0, + pipe_tx3_data, + 16'd0, + pipe_tx2_data, + 16'd0, + pipe_tx1_data, + 16'd0, + pipe_tx0_data}; + +assign gt_tx_detect_rx_loopback = pipe_tx_rcvr_det; + +assign gt_tx_elec_idle = {pipe_tx7_elec_idle, + pipe_tx6_elec_idle, + pipe_tx5_elec_idle, + pipe_tx4_elec_idle, + pipe_tx3_elec_idle, + pipe_tx2_elec_idle, + pipe_tx1_elec_idle, + pipe_tx0_elec_idle}; + +always @(posedge pipe_clk_int or negedge clock_locked) begin + if (!clock_locked) + reg_clock_locked <= #TCQ 1'b0; + else + reg_clock_locked <= #TCQ 1'b1; +end + +always @(posedge pipe_clk_int) begin + if (!reg_clock_locked) + phy_rdy_n_int <= #TCQ 1'b0; + else + phy_rdy_n_int <= #TCQ all_phystatus_rst; +end + +assign all_phystatus_rst = (&phystatus_rst[LINK_CAP_MAX_LINK_WIDTH-1:0]); +assign phy_rdy_n = phy_rdy_n_int; + +endmodule + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_wrapper.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_wrapper.v new file mode 100644 index 0000000000000000000000000000000000000000..f621a176f8f0abe7567f9701c6863a0fed9f5a7d --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gt_wrapper.v @@ -0,0 +1,2370 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gt_wrapper.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : gt_wrapper.v +// Description : GT Wrapper Module for 7 Series Transceiver +// Version : 19.0 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- GT Wrapper -------------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gt_wrapper # +( + parameter PCIE_SIM_MODE = "FALSE", // PCIe sim mode + parameter PCIE_SIM_SPEEDUP = "FALSE", // PCIe sim speedup + parameter PCIE_SIM_TX_EIDLE_DRIVE_LEVEL = "1", // PCIe sim TX electrical idle drive level + parameter PCIE_GT_DEVICE = "GTX", // PCIe GT device + parameter PCIE_USE_MODE = "3.0", // PCIe use mode + parameter PCIE_PLL_SEL = "CPLL", // PCIe PLL select for Gen1/Gen2 + parameter PCIE_LPM_DFE = "LPM", // PCIe LPM or DFE mode for Gen1/Gen2 only + parameter PCIE_LPM_DFE_GEN3 = "DFE", // PCIe LPM or DFE mode for Gen3 only + parameter PCIE_ASYNC_EN = "FALSE", // PCIe async enable + parameter PCIE_TXBUF_EN = "FALSE", // PCIe TX buffer enable for Gen1/Gen2 only + parameter PCIE_TXSYNC_MODE = 0, // PCIe TX sync mode + parameter PCIE_RXSYNC_MODE = 0, // PCIe RX sync mode + parameter PCIE_CHAN_BOND = 0, // PCIe channel bonding mode + parameter PCIE_CHAN_BOND_EN = "TRUE", // PCIe channel bonding enable for Gen1/Gen2 only + parameter PCIE_LANE = 1, // PCIe number of lane + parameter PCIE_REFCLK_FREQ = 0, // PCIe reference clock frequency + parameter PCIE_TX_EIDLE_ASSERT_DELAY = 3'd4, // PCIe TX electrical idle assert delay + parameter PCIE_OOBCLK_MODE = 1, // PCIe OOB clock mode + parameter TX_MARGIN_FULL_0 = 7'b1001111, // 1000 mV + parameter TX_MARGIN_FULL_1 = 7'b1001110, // 950 mV + parameter TX_MARGIN_FULL_2 = 7'b1001101, // 900 mV + parameter TX_MARGIN_FULL_3 = 7'b1001100, // 850 mV + parameter TX_MARGIN_FULL_4 = 7'b1000011, // 400 mV + parameter TX_MARGIN_LOW_0 = 7'b1000101, // 500 mV + parameter TX_MARGIN_LOW_1 = 7'b1000110 , // 450 mV + parameter TX_MARGIN_LOW_2 = 7'b1000011, // 400 mV + parameter TX_MARGIN_LOW_3 = 7'b1000010 , // 350 mV + parameter TX_MARGIN_LOW_4 = 7'b1000000 , + parameter PCIE_DEBUG_MODE = 0 // PCIe debug mode +) + +( + //---------- GT User Ports ----------------------------- + input GT_MASTER, + input GT_GEN3, + input GT_RX_CONVERGE, + + //---------- GT Clock Ports ---------------------------- + input GT_GTREFCLK0, + input GT_QPLLCLK, + input GT_QPLLREFCLK, + input GT_TXUSRCLK, + input GT_RXUSRCLK, + input GT_TXUSRCLK2, + input GT_RXUSRCLK2, + input GT_OOBCLK, + input [ 1:0] GT_TXSYSCLKSEL, + input [ 1:0] GT_RXSYSCLKSEL, + input GT_CPLLPDREFCLK, + output GT_TXOUTCLK, + output GT_RXOUTCLK, + output GT_CPLLLOCK, + output GT_RXCDRLOCK, + + //---------- GT Reset Ports ---------------------------- + input GT_CPLLPD, + input GT_CPLLRESET, + input GT_TXUSERRDY, + input GT_RXUSERRDY, + input GT_RESETOVRD, + input GT_GTTXRESET, + input GT_GTRXRESET, + input GT_TXPMARESET, + input GT_RXPMARESET, + input GT_RXCDRRESET, + input GT_RXCDRFREQRESET, + input GT_RXDFELPMRESET, + input GT_EYESCANRESET, + input GT_TXPCSRESET, + input GT_RXPCSRESET, + input GT_RXBUFRESET, + + output GT_EYESCANDATAERROR, + output GT_TXRESETDONE, + output GT_RXRESETDONE, + output GT_RXPMARESETDONE, + + //---------- GT TX Data Ports -------------------------- + input [31:0] GT_TXDATA, + input [ 3:0] GT_TXDATAK, + + output GT_TXP, + output GT_TXN, + + //---------- GT RX Data Ports -------------------------- + input GT_RXN, + input GT_RXP, + + output [31:0] GT_RXDATA, + output [ 3:0] GT_RXDATAK, + + //---------- GT Command Ports -------------------------- + input GT_TXDETECTRX, + input GT_TXELECIDLE, + input GT_TXCOMPLIANCE, + input GT_RXPOLARITY, + input [ 1:0] GT_TXPOWERDOWN, + input [ 1:0] GT_RXPOWERDOWN, + input [ 2:0] GT_TXRATE, + input [ 2:0] GT_RXRATE, + + //---------- GT Electrical Command Ports --------------- + input [ 2:0] GT_TXMARGIN, + input GT_TXSWING, + input GT_TXDEEMPH, + input GT_TXINHIBIT, + input [ 4:0] GT_TXPRECURSOR, + input [ 6:0] GT_TXMAINCURSOR, + input [ 4:0] GT_TXPOSTCURSOR, + + //---------- GT Status Ports --------------------------- + output GT_RXVALID, + output GT_PHYSTATUS, + output GT_RXELECIDLE, + output [ 2:0] GT_RXSTATUS, + output [ 2:0] GT_RXBUFSTATUS, + output GT_TXRATEDONE, + output GT_RXRATEDONE, + + output [7:0] GT_RXDISPERR, + output [7:0] GT_RXNOTINTABLE, + + //---------- GT DRP Ports ------------------------------ + input GT_DRPCLK, + input [ 8:0] GT_DRPADDR, + input GT_DRPEN, + input [15:0] GT_DRPDI, + input GT_DRPWE, + + output [15:0] GT_DRPDO, + output GT_DRPRDY, + + //---------- GT TX Sync Ports -------------------------- + input GT_TXPHALIGN, + input GT_TXPHALIGNEN, + input GT_TXPHINIT, + input GT_TXDLYBYPASS, + input GT_TXDLYSRESET, + input GT_TXDLYEN, + + output GT_TXDLYSRESETDONE, + output GT_TXPHINITDONE, + output GT_TXPHALIGNDONE, + + input GT_TXPHDLYRESET, + input GT_TXSYNCMODE, // GTH + input GT_TXSYNCIN, // GTH + input GT_TXSYNCALLIN, // GTH + + output GT_TXSYNCOUT, // GTH + output GT_TXSYNCDONE, // GTH + + //---------- GT RX Sync Ports -------------------------- + input GT_RXPHALIGN, + input GT_RXPHALIGNEN, + input GT_RXDLYBYPASS, + input GT_RXDLYSRESET, + input GT_RXDLYEN, + input GT_RXDDIEN, + + output GT_RXDLYSRESETDONE, + output GT_RXPHALIGNDONE, + + input GT_RXSYNCMODE, // GTH + input GT_RXSYNCIN, // GTH + input GT_RXSYNCALLIN, // GTH + + output GT_RXSYNCOUT, // GTH + output GT_RXSYNCDONE, // GTH + + //---------- GT Comma Alignment Ports ------------------ + input GT_RXSLIDE, + + output GT_RXCOMMADET, + output [ 3:0] GT_RXCHARISCOMMA, + output GT_RXBYTEISALIGNED, + output GT_RXBYTEREALIGN, + + //---------- GT Channel Bonding Ports ------------------ + input GT_RXCHBONDEN, + input [ 4:0] GT_RXCHBONDI, + input [ 2:0] GT_RXCHBONDLEVEL, + input GT_RXCHBONDMASTER, + input GT_RXCHBONDSLAVE, + + output GT_RXCHANISALIGNED, + output [ 4:0] GT_RXCHBONDO, + + //---------- GT PRBS/Loopback Ports -------------------- + input [ 2:0] GT_TXPRBSSEL, + input [ 2:0] GT_RXPRBSSEL, + input GT_TXPRBSFORCEERR, + input GT_RXPRBSCNTRESET, + input [ 2:0] GT_LOOPBACK, + + output GT_RXPRBSERR, + + //---------- GT Debug Ports ---------------------------- + output [14:0] GT_DMONITOROUT + +); + + //---------- Internal Signals -------------------------- + wire [ 2:0] txoutclksel; + wire [ 2:0] rxoutclksel; + wire [63:0] rxdata; + wire [ 7:0] rxdatak; + wire [ 7:0] rxchariscomma; + wire rxlpmen; + wire [14:0] dmonitorout; + wire dmonitorclk; + + wire cpllpd; + wire cpllrst; + + //---------- Select CPLL and Clock Dividers ------------ + localparam CPLL_REFCLK_DIV = 1; + localparam CPLL_FBDIV_45 = 5; + localparam CPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) ? 2 : + (PCIE_REFCLK_FREQ == 1) ? 4 : 5; + localparam OUT_DIV = (PCIE_PLL_SEL == "QPLL") ? 4 : 2; + localparam CLK25_DIV = (PCIE_REFCLK_FREQ == 2) ? 10 : + (PCIE_REFCLK_FREQ == 1) ? 5 : 4; + + //---------- Select IES vs. GES ------------------------ + localparam CLKMUX_PD = ((PCIE_USE_MODE == "1.0") || (PCIE_USE_MODE == "1.1")) ? 1'd0 : 1'd1; + + //---------- Select GTP CPLL configuration ------------- + // PLL0/1_CFG[ 5:2] = CP1 : [ 8, 4, 2, 1] units + // PLL0/1_CFG[10:6] = CP2 : [16, 8, 4, 2, 1] units + // CP2/CP1 = 2 to 3 + // (8/4=2) = 27'h01F0210 = 0000_0001_1111_0000_0010_0001_0000 + // (9/3=3) = 27'h01F024C = 0000_0001_1111_0000_0010_0100_1100 + // (8/3=2.67) = 27'h01F020C = 0000_0001_1111_0000_0010_0000_1100 + // (7/3=2.33) = 27'h01F01CC = 0000_0001_1111_0000_0001_1100_1100 + // (6/3=2) = 27'h01F018C = 0000_0001_1111_0000_0001_1000_1100 + // (5/3=1.67) = 27'h01F014C = 0000_0001_1111_0000_0001_0100_1100 + // (6/2=3) = 27'h01F0188 = 0000_0001_1111_0000_0001_1000_1000 + //---------- Select GTX CPLL configuration ------------- + // CPLL_CFG[ 5: 2] = CP1 : [ 8, 4, 2, 1] units + // CPLL_CFG[22:18] = CP2 : [16, 8, 4, 2, 1] units + // CP2/CP1 = 2 to 3 + // (9/3=3) = 1010_0100_0000_0111_1100_1100 + //------------------------------------------------------ + localparam CPLL_CFG = ((PCIE_USE_MODE == "1.0") || (PCIE_USE_MODE == "1.1")) ? 24'hB407CC : 24'hA407CC; + + //---------- Select TX XCLK ---------------------------- + // TXOUT for TX Buffer Use + // TXUSR for TX Buffer Bypass + //------------------------------------------------------ + localparam TX_XCLK_SEL = (PCIE_TXBUF_EN == "TRUE") ? "TXOUT" : "TXUSR"; + + //---------- Select TX Receiver Detection Configuration + localparam TX_RXDETECT_CFG = (PCIE_REFCLK_FREQ == 2) ? 14'd250 : + (PCIE_REFCLK_FREQ == 1) ? 14'd125 : 14'd100; + localparam TX_RXDETECT_REF = (((PCIE_USE_MODE == "1.0") || (PCIE_USE_MODE == "1.1")) && (PCIE_SIM_MODE == "FALSE")) ? 3'b000 : 3'b011; + + //---------- Select PCS_RSVD_ATTR ---------------------- + // [0]: 1 = enable latch when bypassing TX buffer, 0 = disable latch when using TX buffer + // [1]: 1 = enable manual TX sync, 0 = enable auto TX sync + // [2]: 1 = enable manual RX sync, 0 = enable auto RX sync + // [3]: 1 = select external clock for OOB 0 = select reference clock for OOB + // [6]: 1 = enable DMON 0 = disable DMON + // [7]: 1 = filter stale TX[P/N] data when exiting TX electrical idle + // [8]: 1 = power up OOB 0 = power down OOB + //------------------------------------------------------ + localparam OOBCLK_SEL = (PCIE_OOBCLK_MODE == 0) ? 1'd0 : 1'd1; // GTX + localparam RXOOB_CLK_CFG = (PCIE_OOBCLK_MODE == 0) ? "PMA" : "FABRIC"; // GTH/GTP + + localparam PCS_RSVD_ATTR = ((PCIE_USE_MODE == "1.0") && (PCIE_TXBUF_EN == "FALSE")) ? {44'h0000000001C, OOBCLK_SEL, 3'd1} : + ((PCIE_USE_MODE == "1.0") && (PCIE_TXBUF_EN == "TRUE" )) ? {44'h0000000001C, OOBCLK_SEL, 3'd0} : + ((PCIE_RXSYNC_MODE == 0) && (PCIE_TXSYNC_MODE == 0) && (PCIE_TXBUF_EN == "FALSE")) ? {44'h0000000001C, OOBCLK_SEL, 3'd7} : + ((PCIE_RXSYNC_MODE == 0) && (PCIE_TXSYNC_MODE == 0) && (PCIE_TXBUF_EN == "TRUE" )) ? {44'h0000000001C, OOBCLK_SEL, 3'd6} : + ((PCIE_RXSYNC_MODE == 0) && (PCIE_TXSYNC_MODE == 1) && (PCIE_TXBUF_EN == "FALSE")) ? {44'h0000000001C, OOBCLK_SEL, 3'd5} : + ((PCIE_RXSYNC_MODE == 0) && (PCIE_TXSYNC_MODE == 1) && (PCIE_TXBUF_EN == "TRUE" )) ? {44'h0000000001C, OOBCLK_SEL, 3'd4} : + ((PCIE_RXSYNC_MODE == 1) && (PCIE_TXSYNC_MODE == 0) && (PCIE_TXBUF_EN == "FALSE")) ? {44'h0000000001C, OOBCLK_SEL, 3'd3} : + ((PCIE_RXSYNC_MODE == 1) && (PCIE_TXSYNC_MODE == 0) && (PCIE_TXBUF_EN == "TRUE" )) ? {44'h0000000001C, OOBCLK_SEL, 3'd2} : + ((PCIE_RXSYNC_MODE == 1) && (PCIE_TXSYNC_MODE == 1) && (PCIE_TXBUF_EN == "FALSE")) ? {44'h0000000001C, OOBCLK_SEL, 3'd1} : + ((PCIE_RXSYNC_MODE == 1) && (PCIE_TXSYNC_MODE == 1) && (PCIE_TXBUF_EN == "TRUE" )) ? {44'h0000000001C, OOBCLK_SEL, 3'd0} : {44'h0000000001C, OOBCLK_SEL, 3'd7}; + + //---------- Select RXCDR_CFG -------------------------- + + //---------- GTX Note ---------------------------------- + // For GTX PCIe Gen1/Gen2 with 8B/10B, the following CDR setting may provide more margin + // Async 72'h03_8000_23FF_1040_0020 + // Sync: 72'h03_0000_23FF_1040_0020 + //------------------------------------------------------ + + localparam RXCDR_CFG_GTX = ((PCIE_USE_MODE == "1.0") || (PCIE_USE_MODE == "1.1")) ? + ((PCIE_ASYNC_EN == "TRUE") ? 72'b0000_0010_0000_0111_1111_1110_0010_0000_0110_0000_0010_0001_0001_0000_0000000000010000 + : 72'h11_07FE_4060_0104_0000): // IES setting + ((PCIE_ASYNC_EN == "TRUE") ? 72'h03_8000_23FF_1020_0020 // + : 72'h03_0000_23FF_1020_0020); // optimized for GES silicon + + localparam RXCDR_CFG_GTH = (PCIE_USE_MODE == "2.0") ? + ((PCIE_ASYNC_EN == "TRUE") ? 83'h0_0011_07FE_4060_2104_1010 + : 83'h0_0011_07FE_4060_0104_1010): // Optimized for IES silicon + ((PCIE_ASYNC_EN == "TRUE") ? 83'h0_0020_07FE_2000_C208_8018 + : 83'h0_0020_07FE_2000_C208_0018); // Optimized for 1.2 silicon + + localparam RXCDR_CFG_GTP = ((PCIE_ASYNC_EN == "TRUE") ? 83'h0_0001_07FE_4060_2104_1010 + : 83'h0_0001_07FE_4060_0104_1010); // Optimized for IES silicon + + + + + //---------- Select TX and RX Sync Mode ---------------- + localparam TXSYNC_OVRD = (PCIE_TXSYNC_MODE == 1) ? 1'd0 : 1'd1; + localparam RXSYNC_OVRD = (PCIE_TXSYNC_MODE == 1) ? 1'd0 : 1'd1; + + localparam TXSYNC_MULTILANE = (PCIE_LANE == 1) ? 1'd0 : 1'd1; + localparam RXSYNC_MULTILANE = (PCIE_LANE == 1) ? 1'd0 : 1'd1; + + //---------- Select Clock Correction Min and Max Latency + // CLK_COR_MIN_LAT = Larger of (2 * RXCHBONDLEVEL + 13) or (CHAN_BOND_MAX_SKEW + 11) + // = 13 when PCIE_LANE = 1 + // CLK_COR_MAX_LAT = CLK_COR_MIN_LAT + CLK_COR_SEQ_LEN + 1 + // = CLK_COR_MIN_LAT + 2 + //------------------------------------------------------ + + //---------- CLK_COR_MIN_LAT Look-up Table ------------- + // Lane | One-Hop | Daisy-Chain | Binary-Tree + //------------------------------------------------------ + // 0 | 13 | 13 | 13 + // 1 | 15 to 18 | 15 to 18 | 15 to 18 + // 2 | 15 to 18 | 17 to 18 | 15 to 18 + // 3 | 15 to 18 | 19 | 17 to 18 + // 4 | 15 to 18 | 21 | 17 to 18 + // 5 | 15 to 18 | 23 | 19 + // 6 | 15 to 18 | 25 | 19 + // 7 | 15 to 18 | 27 | 21 + //------------------------------------------------------ + + localparam CLK_COR_MIN_LAT = ((PCIE_LANE == 8) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 27 : 21) : + ((PCIE_LANE == 7) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 25 : 19) : + ((PCIE_LANE == 6) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 23 : 19) : + ((PCIE_LANE == 5) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 21 : 18) : + ((PCIE_LANE == 4) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 19 : 18) : + ((PCIE_LANE == 3) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 18 : 18) : + ((PCIE_LANE == 2) && (PCIE_CHAN_BOND != 0) && (PCIE_CHAN_BOND_EN == "TRUE")) ? ((PCIE_CHAN_BOND == 1) ? 18 : 18) : + ((PCIE_LANE == 1) || (PCIE_CHAN_BOND_EN == "FALSE")) ? 13 : 18; + + localparam CLK_COR_MAX_LAT = CLK_COR_MIN_LAT + 2; + + //---------- Simulation Speedup ------------------------ + //localparam CFOK_CFG_GTH = (PCIE_SIM_MODE == "TRUE") ? 42'h240_0004_0F80 : 42'h248_0004_0E80; // [8] : 1 = Skip CFOK + //localparam CFOK_CFG_GTP = (PCIE_SIM_MODE == "TRUE") ? 43'h000_0000_0000 : 43'h000_0000_0100; // [2] : 1 = Skip CFOK + + //---------- Select [TX/RX]OUTCLK ---------------------- + assign txoutclksel = GT_MASTER ? 3'd3 : 3'd0; + assign rxoutclksel = ((PCIE_DEBUG_MODE == 1) || ((PCIE_ASYNC_EN == "TRUE") && GT_MASTER)) ? 3'd2 : 3'd0; + + //---------- Select DFE vs. LPM ------------------------ + // Gen1/2 = Use LPM by default. Option to use DFE. + // Gen3 = Use DFE by default. Option to use LPM. + //------------------------------------------------------ + assign rxlpmen = GT_GEN3 ? ((PCIE_LPM_DFE_GEN3 == "LPM") ? 1'd1 : 1'd0) : ((PCIE_LPM_DFE == "LPM") ? 1'd1 : 1'd0); + + + +//---------- Generate DMONITOR Clock Buffer for Debug ------ +generate if (PCIE_DEBUG_MODE == 1) + + begin : dmonitorclk_i + //---------- DMONITOR CLK ------------------------------ + BUFG dmonitorclk_i + ( + //---------- Input --------------------------------- + .I (dmonitorout[7]), + //---------- Output -------------------------------- + .O (dmonitorclk) + ); + end + +else + + begin : dmonitorclk_i_disable + assign dmonitorclk = 1'd0; + end + +endgenerate + + +pcie_7x_0_gtx_cpllpd_ovrd cpllPDInst ( + .i_ibufds_gte2(GT_CPLLPDREFCLK), + .o_cpllpd_ovrd(cpllpd), + .o_cpllreset_ovrd(cpllrst)); + +//---------- Select GTX or GTH or GTP ------------------------------------------ +// Notes : Attributes that are commented out always use the GT default settings +//------------------------------------------------------------------------------ +generate if (PCIE_GT_DEVICE == "GTP") + + begin : gtp_channel + + //---------- GTP Channel Module -------------------------------------------- + GTPE2_CHANNEL # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_RESET_SPEEDUP (PCIE_SIM_SPEEDUP), // + .SIM_RECEIVER_DETECT_PASS ("TRUE"), // + .SIM_TX_EIDLE_DRIVE_LEVEL (PCIE_SIM_TX_EIDLE_DRIVE_LEVEL), // + .SIM_VERSION (PCIE_USE_MODE), // + + //---------- Clock Attributes ------------------------------------------ + .TXOUT_DIV (OUT_DIV), // + .RXOUT_DIV (OUT_DIV), // + .TX_CLK25_DIV (CLK25_DIV), // + .RX_CLK25_DIV (CLK25_DIV), // + //.TX_CLKMUX_EN ( 1'b1), // GTP rename + //.RX_CLKMUX_EN ( 1'b1), // GTP rename + .TX_XCLK_SEL (TX_XCLK_SEL), // TXOUT = use TX buffer, TXUSR = bypass TX buffer + .RX_XCLK_SEL ("RXREC"), // RXREC = use RX buffer, RXUSR = bypass RX buffer + //.OUTREFCLK_SEL_INV ( 2'b11), // + + //---------- Reset Attributes ------------------------------------------ + .TXPCSRESET_TIME ( 5'b00001), // + .RXPCSRESET_TIME ( 5'b00001), // + .TXPMARESET_TIME ( 5'b00011), // + .RXPMARESET_TIME ( 5'b00011), // Optimized for sim + //.RXISCANRESET_TIME ( 5'b00001), // + + //---------- TX Data Attributes ---------------------------------------- + .TX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + + //---------- RX Data Attributes ---------------------------------------- + .RX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + + //---------- Command Attributes ---------------------------------------- + .TX_RXDETECT_CFG (TX_RXDETECT_CFG), // + .TX_RXDETECT_REF ( 3'b011), // + .RX_CM_SEL ( 2'd3), // 0 = AVTT, 1 = GND, 2 = Float, 3 = Programmable + .RX_CM_TRIM ( 4'b1010), // Select 800mV, Changed from 3 to 4-bits, optimized for IES + .TX_EIDLE_ASSERT_DELAY (PCIE_TX_EIDLE_ASSERT_DELAY), // Optimized for sim + .TX_EIDLE_DEASSERT_DELAY ( 3'b010), // Optimized for sim + //.PD_TRANS_TIME_FROM_P2 (12'h03C), // + .PD_TRANS_TIME_NONE_P2 ( 8'h09), // + //.PD_TRANS_TIME_TO_P2 ( 8'h64), // + //.TRANS_TIME_RATE ( 8'h0E), // + + //---------- Electrical Command Attributes ----------------------------- + .TX_DRIVE_MODE ("PIPE"), // Gen1/Gen2 = PIPE, Gen3 = PIPEGEN3 + .TX_DEEMPH0 ( 5'b10100), // 6.0 dB + .TX_DEEMPH1 ( 5'b01011), // 3.5 dB + .TX_MARGIN_FULL_0 ( 7'b1001111), // 1000 mV + .TX_MARGIN_FULL_1 ( 7'b1001110), // 950 mV + .TX_MARGIN_FULL_2 ( 7'b1001101), // 900 mV + .TX_MARGIN_FULL_3 ( 7'b1001100), // 850 mV + .TX_MARGIN_FULL_4 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_0 ( 7'b1000101), // 500 mV + .TX_MARGIN_LOW_1 ( 7'b1000110), // 450 mV + .TX_MARGIN_LOW_2 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_3 ( 7'b1000010), // 350 mV + .TX_MARGIN_LOW_4 ( 7'b1000000), // 250 mV + .TX_MAINCURSOR_SEL ( 1'b0), // + .TX_PREDRIVER_MODE ( 1'b0), // GTP + + //---------- Status Attributes ----------------------------------------- + //.RX_SIG_VALID_DLY ( 4), // CHECK + + //---------- DRP Attributes -------------------------------------------- + + //---------- PCS Attributes -------------------------------------------- + .PCS_PCIE_EN ("TRUE"), // PCIe + .PCS_RSVD_ATTR (48'h0000_0000_0100), // [8] : 1 = OOB power-up + + //---------- PMA Attributes ------------------------------------------- + //.CLK_COMMON_SWING ( 1'b0), // GTP new + //.PMA_RSV (32'd0), // + .PMA_RSV2 (32'h00002040), // Optimized for GES + //.PMA_RSV3 ( 2'd0), // + //.PMA_RSV4 ( 4'd0), // Changed from 15 to 4-bits + //.PMA_RSV5 ( 1'd0), // Changed from 4 to 1-bit + //.PMA_RSV6 ( 1'd0), // GTP new + //.PMA_RSV7 ( 1'd0), // GTP new + .RX_BIAS_CFG (16'h0F33), // Optimized for IES + .TERM_RCAL_CFG (15'b100001000010000), // Optimized for IES + .TERM_RCAL_OVRD ( 3'b000), // Optimized for IES + + //---------- TX PI ---------------------------------------------------- + //.TXPI_CFG0 ( 2'd0), // + //.TXPI_CFG1 ( 2'd0), // + //.TXPI_CFG2 ( 2'd0), // + //.TXPI_CFG3 ( 1'd0), // + //.TXPI_CFG4 ( 1'd0), // + //.TXPI_CFG5 ( 3'd000), // + //.TXPI_GREY_SEL ( 1'd0), // + //.TXPI_INVSTROBE_SEL ( 1'd0), // + //.TXPI_PPMCLK_SEL ("TXUSRCLK2"), // + //.TXPI_PPM_CFG ( 8'd0), // + //.TXPI_SYNFREQ_PPM ( 3'd0), // + + //---------- RX PI ----------------------------------------------------- + .RXPI_CFG0 ( 3'd0), // Changed from 3 to 2-bits, Optimized for IES + .RXPI_CFG1 ( 1'd1), // Changed from 2 to 1-bits, Optimized for IES + .RXPI_CFG2 ( 1'd1), // Changed from 2 to 1-bits, Optimized for IES + + //---------- CDR Attributes --------------------------------------------- + //.RXCDR_CFG (72'b0000_001000000_11111_11111_001000000_011_0000111_000_001000_010000_100000000000000), // CHECK + .RXCDR_CFG (RXCDR_CFG_GTP), // Optimized for IES + .RXCDR_LOCK_CFG ( 6'b010101), // [5:3] Window Refresh, [2:1] Window Size, [0] Enable Detection (sensitive lock = 6'b111001) CHECK + .RXCDR_HOLD_DURING_EIDLE ( 1'd1), // Hold RX CDR on electrical idle for Gen1/Gen2 + .RXCDR_FR_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR frequency on electrical idle for Gen3 + .RXCDR_PH_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR phase on electrical idle for Gen3 + //.RXCDRFREQRESET_TIME ( 5'b00001), // + //.RXCDRPHRESET_TIME ( 5'b00001), // + + //---------- LPM Attributes -------------------------------------------- + //.RXLPMRESET_TIME ( 7'b0001111), // GTP new + //.RXLPM_BIAS_STARTUP_DISABLE ( 1'b0), // GTP new + .RXLPM_CFG ( 4'b0110), // GTP new, optimized for IES + //.RXLPM_CFG1 ( 1'b0), // GTP new + //.RXLPM_CM_CFG ( 1'b0), // GTP new + .RXLPM_GC_CFG ( 9'b111100010), // GTP new, optimized for IES + .RXLPM_GC_CFG2 ( 3'b001), // GTP new, optimized for IES + //.RXLPM_HF_CFG (14'b00001111110000), // + .RXLPM_HF_CFG2 ( 5'b01010), // GTP new + //.RXLPM_HF_CFG3 ( 4'b0000), // GTP new + .RXLPM_HOLD_DURING_EIDLE ( 1'b1), // GTP new + .RXLPM_INCM_CFG ( 1'b1), // GTP new, optimized for IES + .RXLPM_IPCM_CFG ( 1'b0), // GTP new, optimized for IES + //.RXLPM_LF_CFG (18'b000000001111110000), // + .RXLPM_LF_CFG2 ( 5'b01010), // GTP new, optimized for IES + .RXLPM_OSINT_CFG ( 3'b100), // GTP new, optimized for IES + + //---------- OS Attributes --------------------------------------------- + .RX_OS_CFG (13'h0080), // CHECK + .RXOSCALRESET_TIME (5'b00011), // Optimized for IES + .RXOSCALRESET_TIMEOUT (5'b00000), // Disable timeout, Optimized for IES + + //---------- Eye Scan Attributes --------------------------------------- + //.ES_CLK_PHASE_SEL ( 1'b0), // + //.ES_CONTROL ( 6'd0), // + //.ES_ERRDET_EN ("FALSE"), // + .ES_EYE_SCAN_EN ("FALSE"), // + //.ES_HORZ_OFFSET (12'd0), // + //.ES_PMA_CFG (10'd0), // + //.ES_PRESCALE ( 5'd0), // + //.ES_QUAL_MASK (80'd0), // + //.ES_QUALIFIER (80'd0), // + //.ES_SDATA_MASK (80'd0), // + //.ES_VERT_OFFSET ( 9'd0), // + + //---------- TX Buffer Attributes -------------------------------------- + .TXBUF_EN (PCIE_TXBUF_EN), // + .TXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + + //---------- RX Buffer Attributes -------------------------------------- + .RXBUF_EN ("TRUE"), // + //.RX_BUFFER_CFG ( 6'd0), // + .RX_DEFER_RESET_BUF_EN ("TRUE"), // + .RXBUF_ADDR_MODE ("FULL"), // + .RXBUF_EIDLE_HI_CNT ( 4'd4), // Optimized for sim + .RXBUF_EIDLE_LO_CNT ( 4'd0), // Optimized for sim + .RXBUF_RESET_ON_CB_CHANGE ("TRUE"), // + .RXBUF_RESET_ON_COMMAALIGN ("FALSE"), // + .RXBUF_RESET_ON_EIDLE ("TRUE"), // PCIe + .RXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + .RXBUF_THRESH_OVRD ("FALSE"), // + .RXBUF_THRESH_OVFLW (61), // + .RXBUF_THRESH_UNDFLW ( 4), // + //.RXBUFRESET_TIME ( 5'b00001), // + + //---------- TX Sync Attributes ---------------------------------------- + .TXPH_CFG (16'h0780), // + .TXPH_MONITOR_SEL ( 5'd0), // + .TXPHDLY_CFG (24'h084020), // [19] : 1 = full range, 0 = half range + .TXDLY_CFG (16'h001F), // + .TXDLY_LCFG ( 9'h030), // + .TXDLY_TAP_CFG (16'd0), // + + .TXSYNC_OVRD (TXSYNC_OVRD), // + .TXSYNC_MULTILANE (TXSYNC_MULTILANE), // + .TXSYNC_SKIP_DA (1'b0), // + + //---------- RX Sync Attributes ---------------------------------------- + .RXPH_CFG (24'd0), // + .RXPH_MONITOR_SEL ( 5'd0), // + .RXPHDLY_CFG (24'h004020), // [19] : 1 = full range, 0 = half range + .RXDLY_CFG (16'h001F), // + .RXDLY_LCFG ( 9'h030), // + .RXDLY_TAP_CFG (16'd0), // + .RX_DDI_SEL ( 6'd0), // + + .RXSYNC_OVRD (RXSYNC_OVRD), // + .RXSYNC_MULTILANE (RXSYNC_MULTILANE), // + .RXSYNC_SKIP_DA (1'b0), // + + //---------- Comma Alignment Attributes -------------------------------- + .ALIGN_COMMA_DOUBLE ("FALSE"), // + .ALIGN_COMMA_ENABLE (10'b1111111111), // PCIe + .ALIGN_COMMA_WORD ( 1), // + .ALIGN_MCOMMA_DET ("TRUE"), // + .ALIGN_MCOMMA_VALUE (10'b1010000011), // + .ALIGN_PCOMMA_DET ("TRUE"), // + .ALIGN_PCOMMA_VALUE (10'b0101111100), // + .DEC_MCOMMA_DETECT ("TRUE"), // + .DEC_PCOMMA_DETECT ("TRUE"), // + .DEC_VALID_COMMA_ONLY ("FALSE"), // PCIe + .SHOW_REALIGN_COMMA ("FALSE"), // PCIe + .RXSLIDE_AUTO_WAIT ( 7), // + .RXSLIDE_MODE ("PMA"), // PCIe + + //---------- Channel Bonding Attributes -------------------------------- + .CHAN_BOND_KEEP_ALIGN ("TRUE"), // PCIe + .CHAN_BOND_MAX_SKEW ( 7), // + .CHAN_BOND_SEQ_LEN ( 4), // PCIe + .CHAN_BOND_SEQ_1_ENABLE ( 4'b1111), // + .CHAN_BOND_SEQ_1_1 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_2 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_3 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_4 (10'b0110111100), // K28.5 (BC) - COM + .CHAN_BOND_SEQ_2_USE ("TRUE"), // PCIe + .CHAN_BOND_SEQ_2_ENABLE (4'b1111), // + .CHAN_BOND_SEQ_2_1 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_2 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_3 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_4 (10'b0110111100), // K28.5 (BC) - COM + .FTS_DESKEW_SEQ_ENABLE ( 4'b1111), // + .FTS_LANE_DESKEW_EN ("TRUE"), // PCIe + .FTS_LANE_DESKEW_CFG ( 4'b1111), // + + //---------- Clock Correction Attributes ------------------------------- + .CBCC_DATA_SOURCE_SEL ("DECODED"), // + .CLK_CORRECT_USE ("TRUE"), // + .CLK_COR_KEEP_IDLE ("TRUE"), // PCIe + .CLK_COR_MAX_LAT (CLK_COR_MAX_LAT), // + .CLK_COR_MIN_LAT (CLK_COR_MIN_LAT), // + .CLK_COR_PRECEDENCE ("TRUE"), // + .CLK_COR_REPEAT_WAIT ( 0), // + .CLK_COR_SEQ_LEN ( 1), // + .CLK_COR_SEQ_1_ENABLE ( 4'b1111), // + .CLK_COR_SEQ_1_1 (10'b0100011100), // K28.0 (1C) - SKP + .CLK_COR_SEQ_1_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_4 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_ENABLE ( 4'b0000), // Disabled + .CLK_COR_SEQ_2_USE ("FALSE"), // + .CLK_COR_SEQ_2_1 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_4 (10'b0000000000), // Disabled + + //---------- 8b10b Attributes ------------------------------------------ + .RX_DISPERR_SEQ_MATCH ("TRUE"), // + + //---------- 64b/66b & 64b/67b Attributes ------------------------------ + .GEARBOX_MODE ( 3'd0), // + .TXGEARBOX_EN ("FALSE"), // + .RXGEARBOX_EN ("FALSE"), // + + //---------- PRBS & Loopback Attributes --------------------------------- + .LOOPBACK_CFG ( 1'd0), // Enable latch when bypassing TX buffer, equivalent to GTX PCS_RSVD_ATTR[0] + .RXPRBS_ERR_LOOPBACK ( 1'd0), // + .TX_LOOPBACK_DRIVE_HIZ ("FALSE"), // + + //---------- OOB & SATA Attributes -------------------------------------- + .TXOOB_CFG ( 1'd1), // Filter stale TX data when exiting TX electrical idle, equivalent to GTX PCS_RSVD_ATTR[7] + //.RXOOB_CFG ( 7'b0000110), // + .RXOOB_CLK_CFG (RXOOB_CLK_CFG), // + //.SAS_MAX_COM (64), // + //.SAS_MIN_COM (36), // + //.SATA_BURST_SEQ_LEN ( 4'b1111), // + //.SATA_BURST_VAL ( 3'b100), // + //.SATA_PLL_CFG ("VCO_3000MHZ"), // + //.SATA_EIDLE_VAL ( 3'b100), // + //.SATA_MAX_BURST ( 8), // + //.SATA_MAX_INIT (21), // + //.SATA_MAX_WAKE ( 7), // + //.SATA_MIN_BURST ( 4), // + //.SATA_MIN_INIT (12), // + //.SATA_MIN_WAKE ( 4), // + + //---------- MISC ------------------------------------------------------ + .DMONITOR_CFG (24'h000B01), // + .RX_DEBUG_CFG (14'h0000), // Optimized for IES + //.TST_RSV (32'd0), // + //.UCODEER_CLR ( 1'd0) // + + //---------- GTP ------------------------------------------------------- + //.ACJTAG_DEBUG_MODE (1'd0), // + //.ACJTAG_MODE (1'd0), // + //.ACJTAG_RESET (1'd0), // + //.ADAPT_CFG0 (20'd0), // + .CFOK_CFG (43'h490_0004_0E80), // Changed from 42 to 43-bits, Optimized for IES + .CFOK_CFG2 ( 7'b010_0000), // Changed from 6 to 7-bits, Optimized for IES + .CFOK_CFG3 ( 7'b010_0000), // Changed from 6 to 7-bits, Optimized for IES + .CFOK_CFG4 ( 1'd0), // GTP new, Optimized for IES + .CFOK_CFG5 ( 2'd0), // GTP new, Optimized for IES + .CFOK_CFG6 ( 4'd0) // GTP new, Optimized for IES + + ) + gtpe2_channel_i + ( + + //---------- Clock ----------------------------------------------------- + .PLL0CLK (GT_QPLLCLK), // + .PLL1CLK (1'd0), // + .PLL0REFCLK (GT_QPLLREFCLK), // + .PLL1REFCLK (1'd0), // + .TXUSRCLK (GT_TXUSRCLK), // + .RXUSRCLK (GT_RXUSRCLK), // + .TXUSRCLK2 (GT_TXUSRCLK2), // + .RXUSRCLK2 (GT_RXUSRCLK2), // + .TXSYSCLKSEL (GT_TXSYSCLKSEL), // + .RXSYSCLKSEL (GT_RXSYSCLKSEL), // + .TXOUTCLKSEL (txoutclksel), // + .RXOUTCLKSEL (rxoutclksel), // + .CLKRSVD0 (1'd0), // + .CLKRSVD1 (1'd0), // + + .TXOUTCLK (GT_TXOUTCLK), // + .RXOUTCLK (GT_RXOUTCLK), // + .TXOUTCLKFABRIC (), // + .RXOUTCLKFABRIC (), // + .TXOUTCLKPCS (), // + .RXOUTCLKPCS (), // + .RXCDRLOCK (GT_RXCDRLOCK), // + + //---------- Reset ----------------------------------------------------- + .TXUSERRDY (GT_TXUSERRDY), // + .RXUSERRDY (GT_RXUSERRDY), // + .CFGRESET (1'd0), // + .GTRESETSEL (1'd0), // + .RESETOVRD (GT_RESETOVRD), // + .GTTXRESET (GT_GTTXRESET), // + .GTRXRESET (GT_GTRXRESET), // + + .TXRESETDONE (GT_TXRESETDONE), // + .RXRESETDONE (GT_RXRESETDONE), // + + //---------- TX Data --------------------------------------------------- + .TXDATA (GT_TXDATA), // + .TXCHARISK (GT_TXDATAK), // + + .GTPTXP (GT_TXP), // GTP + .GTPTXN (GT_TXN), // GTP + + //---------- RX Data --------------------------------------------------- + .GTPRXP (GT_RXP), // GTP + .GTPRXN (GT_RXN), // GTP + + .RXDATA (rxdata[31:0]), // + .RXCHARISK (rxdatak[3:0]), // + + //---------- Command --------------------------------------------------- + .TXDETECTRX (GT_TXDETECTRX), // + .TXPDELECIDLEMODE ( 1'd0), // + .RXELECIDLEMODE ( 2'd0), // + .TXELECIDLE (GT_TXELECIDLE), // + .TXCHARDISPMODE ({3'd0, GT_TXCOMPLIANCE}), // Changed from 8 to 4-bits + .TXCHARDISPVAL ( 4'd0), // Changed from 8 to 4-bits + .TXPOLARITY ( 1'b0), // + .RXPOLARITY (GT_RXPOLARITY), // + .TXPD (GT_TXPOWERDOWN), // + .RXPD (GT_RXPOWERDOWN), // + .TXRATE (GT_TXRATE), // + .RXRATE (GT_RXRATE), // + .TXRATEMODE (1'b0), // + .RXRATEMODE (1'b0), // + + //---------- Electrical Command ---------------------------------------- + .TXMARGIN (GT_TXMARGIN), // + .TXSWING (GT_TXSWING), // + .TXDEEMPH (GT_TXDEEMPH), // + .TXINHIBIT (GT_TXINHIBIT), // + .TXBUFDIFFCTRL (3'b100), // + .TXDIFFCTRL (4'b1100), // Select 850mV + .TXPRECURSOR (GT_TXPRECURSOR), // + .TXPRECURSORINV (1'd0), // + .TXMAINCURSOR (GT_TXMAINCURSOR), // + .TXPOSTCURSOR (GT_TXPOSTCURSOR), // + .TXPOSTCURSORINV (1'd0), // + + //---------- Status ---------------------------------------------------- + .RXVALID (GT_RXVALID), // + .PHYSTATUS (GT_PHYSTATUS), // + .RXELECIDLE (GT_RXELECIDLE), // + .RXSTATUS (GT_RXSTATUS), // + .TXRATEDONE (GT_TXRATEDONE), // + .RXRATEDONE (GT_RXRATEDONE), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (GT_DRPCLK), // + .DRPADDR (GT_DRPADDR), // + .DRPEN (GT_DRPEN), // + .DRPDI (GT_DRPDI), // + .DRPWE (GT_DRPWE), // + + .DRPDO (GT_DRPDO), // + .DRPRDY (GT_DRPRDY), // + + //---------- PMA ------------------------------------------------------- + .TXPMARESET (GT_TXPMARESET), // + .RXPMARESET (GT_RXPMARESET), // + .RXLPMRESET ( 1'd0), // GTP new + .RXLPMOSINTNTRLEN ( 1'd0), // GTP new + .RXLPMHFHOLD ( 1'd0), // + .RXLPMHFOVRDEN ( 1'd0), // + .RXLPMLFHOLD ( 1'd0), // + .RXLPMLFOVRDEN ( 1'd0), // + .PMARSVDIN0 ( 1'd0), // GTP new + .PMARSVDIN1 ( 1'd0), // GTP new + .PMARSVDIN2 ( 1'd0), // GTP new + .PMARSVDIN3 ( 1'd0), // GTP new + .PMARSVDIN4 ( 1'd0), // GTP new + .GTRSVD (16'd0), // + + .PMARSVDOUT0 (), // GTP new + .PMARSVDOUT1 (), // GTP new + .DMONITOROUT (dmonitorout), // GTP 15-bits + + //---------- PCS ------------------------------------------------------- + .TXPCSRESET (GT_TXPCSRESET), // + .RXPCSRESET (GT_RXPCSRESET), // + .PCSRSVDIN (16'd0), // [0]: 1 = TXRATE async, [1]: 1 = RXRATE async + + .PCSRSVDOUT (), // + + //---------- CDR ------------------------------------------------------- + .RXCDRRESET (GT_RXCDRRESET), // + .RXCDRRESETRSV (1'd0), // + .RXCDRFREQRESET (GT_RXCDRFREQRESET), // + .RXCDRHOLD (1'b0), // + .RXCDROVRDEN (1'd0), // + + //---------- PI -------------------------------------------------------- + .TXPIPPMEN (1'd0), // + .TXPIPPMOVRDEN (1'd0), // + .TXPIPPMPD (1'd0), // + .TXPIPPMSEL (1'd0), // + .TXPIPPMSTEPSIZE (5'd0), // + .TXPISOPD (1'd0), // GTP new + + //---------- DFE ------------------------------------------------------- + .RXDFEXYDEN (1'd0), // + + //---------- OS -------------------------------------------------------- + .RXOSHOLD (1'd0), // Optimized for IES + .RXOSOVRDEN (1'd0), // Optimized for IES + .RXOSINTEN (1'd1), // Optimized for IES + .RXOSINTHOLD (1'd0), // Optimized for IES + .RXOSINTNTRLEN (1'd0), // Optimized for IES + .RXOSINTOVRDEN (1'd0), // Optimized for IES + .RXOSINTPD (1'd0), // GTP new, Optimized for IES + .RXOSINTSTROBE (1'd0), // Optimized for IES + .RXOSINTTESTOVRDEN (1'd0), // Optimized for IES + .RXOSINTCFG (4'b0010), // Optimized for IES + .RXOSINTID0 (4'd0), // Optimized for IES + + .RXOSINTDONE (), // + .RXOSINTSTARTED (), // + .RXOSINTSTROBEDONE (), // + .RXOSINTSTROBESTARTED (), // + + //---------- Eye Scan -------------------------------------------------- + .EYESCANRESET (GT_EYESCANRESET), // + .EYESCANMODE (1'd0), // + .EYESCANTRIGGER (1'b0), // + + .EYESCANDATAERROR (GT_EYESCANDATAERROR), // + + //---------- TX Buffer ------------------------------------------------- + .TXBUFSTATUS (), // + + //---------- RX Buffer ------------------------------------------------- + .RXBUFRESET (GT_RXBUFRESET), // + + .RXBUFSTATUS (GT_RXBUFSTATUS), // + + //---------- TX Sync --------------------------------------------------- + .TXPHDLYRESET (GT_TXPHDLYRESET), // + .TXPHDLYTSTCLK (1'd0), // + .TXPHALIGN (GT_TXPHALIGN), // + .TXPHALIGNEN (GT_TXPHALIGNEN), // + .TXPHDLYPD (1'd0), // + .TXPHINIT (GT_TXPHINIT), // + .TXPHOVRDEN (1'd0), // + .TXDLYBYPASS (GT_TXDLYBYPASS), // + .TXDLYSRESET (GT_TXDLYSRESET), // + .TXDLYEN (GT_TXDLYEN), // + .TXDLYOVRDEN (1'd0), // + .TXDLYHOLD (1'd0), // + .TXDLYUPDOWN (1'd0), // + + .TXPHALIGNDONE (GT_TXPHALIGNDONE), // + .TXPHINITDONE (GT_TXPHINITDONE), // + .TXDLYSRESETDONE (GT_TXDLYSRESETDONE), // + + .TXSYNCMODE (GT_TXSYNCMODE), // + .TXSYNCIN (GT_TXSYNCIN), // + .TXSYNCALLIN (GT_TXSYNCALLIN), // + + .TXSYNCDONE (GT_TXSYNCDONE), // + .TXSYNCOUT (GT_TXSYNCOUT), // + + //---------- RX Sync --------------------------------------------------- + .RXPHDLYRESET (1'd0), // + .RXPHALIGN (GT_RXPHALIGN), // + .RXPHALIGNEN (GT_RXPHALIGNEN), // + .RXPHDLYPD (1'd0), // + .RXPHOVRDEN (1'd0), // + .RXDLYBYPASS (GT_RXDLYBYPASS), // + .RXDLYSRESET (GT_RXDLYSRESET), // + .RXDLYEN (GT_RXDLYEN), // + .RXDLYOVRDEN (1'd0), // + .RXDDIEN (GT_RXDDIEN), // + + .RXPHALIGNDONE (GT_RXPHALIGNDONE), // + .RXPHMONITOR (), // + .RXPHSLIPMONITOR (), // + .RXDLYSRESETDONE (GT_RXDLYSRESETDONE), // + + .RXSYNCMODE (GT_RXSYNCMODE), // + .RXSYNCIN (GT_RXSYNCIN), // + .RXSYNCALLIN (GT_RXSYNCALLIN), // + + .RXSYNCDONE (GT_RXSYNCDONE), // + .RXSYNCOUT (GT_RXSYNCOUT), // + + //---------- Comma Alignment ------------------------------------------- + .RXCOMMADETEN (1'd1), // + .RXMCOMMAALIGNEN (1'd1), // No Gen3 support in GTP + .RXPCOMMAALIGNEN (1'd1), // No Gen3 support in GTP + .RXSLIDE (GT_RXSLIDE), // + .RXCOMMADET (GT_RXCOMMADET), // + .RXCHARISCOMMA (rxchariscomma[3:0]), // + .RXBYTEISALIGNED (GT_RXBYTEISALIGNED), // + .RXBYTEREALIGN (GT_RXBYTEREALIGN), // + + //---------- Channel Bonding ------------------------------------------- + .RXCHBONDEN (GT_RXCHBONDEN), // + .RXCHBONDI (GT_RXCHBONDI[3:0]), // + .RXCHBONDLEVEL (GT_RXCHBONDLEVEL), // + .RXCHBONDMASTER (GT_RXCHBONDMASTER), // + .RXCHBONDSLAVE (GT_RXCHBONDSLAVE), // + + .RXCHANBONDSEQ (), // + .RXCHANISALIGNED (GT_RXCHANISALIGNED), // + .RXCHANREALIGN (), // + .RXCHBONDO (GT_RXCHBONDO[3:0]), // + + //---------- Clock Correction ----------------------------------------- + .RXCLKCORCNT (), // + + //---------- 8b10b ----------------------------------------------------- + .TX8B10BBYPASS (4'd0), // + .TX8B10BEN (1'b1), // No Gen3 support in GTP + .RX8B10BEN (1'b1), // No Gen3 support in GTP + + .RXDISPERR (GT_RXDISPERR[3:0]), // + .RXNOTINTABLE (GT_RXNOTINTABLE[3:0]), // + + //---------- 64b/66b & 64b/67b ----------------------------------------- + .TXHEADER (3'd0), // + .TXSEQUENCE (7'd0), // + .TXSTARTSEQ (1'd0), // + .RXGEARBOXSLIP (1'd0), // + + .TXGEARBOXREADY (), // + .RXDATAVALID (), // + .RXHEADER (), // + .RXHEADERVALID (), // + .RXSTARTOFSEQ (), // + + //---------- PRBS/Loopback --------------------------------------------- + .TXPRBSSEL (GT_TXPRBSSEL), // + .RXPRBSSEL (GT_RXPRBSSEL), // + .TXPRBSFORCEERR (GT_TXPRBSFORCEERR), // + .RXPRBSCNTRESET (GT_RXPRBSCNTRESET), // + .LOOPBACK (GT_LOOPBACK), // + + .RXPRBSERR (GT_RXPRBSERR), // + + //---------- OOB ------------------------------------------------------- + .SIGVALIDCLK (GT_OOBCLK), // Optimized for debug + .TXCOMINIT (1'd0), // + .TXCOMSAS (1'd0), // + .TXCOMWAKE (1'd0), // + .RXOOBRESET (1'd0), // + + .TXCOMFINISH (), // + .RXCOMINITDET (), // + .RXCOMSASDET (), // + .RXCOMWAKEDET (), // + + //---------- MISC ------------------------------------------------------ + .SETERRSTATUS ( 1'd0), // + .TXDIFFPD ( 1'd0), // + .TSTIN (20'hFFFFF), // + + //---------- GTP ------------------------------------------------------- + .RXADAPTSELTEST (14'd0), // + .DMONFIFORESET ( 1'd0), // + .DMONITORCLK (dmonitorclk), // + .RXOSCALRESET ( 1'd0), // + + .RXPMARESETDONE (GT_RXPMARESETDONE), // GTP + .TXPMARESETDONE () // + + ); + + assign GT_CPLLLOCK = 1'b0; + + end + +else if (PCIE_GT_DEVICE == "GTH") + + begin : gth_channel + + //---------- GTH Channel Module -------------------------------------------- + GTHE2_CHANNEL # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_CPLLREFCLK_SEL (3'b001), // + .SIM_RESET_SPEEDUP (PCIE_SIM_SPEEDUP), // + .SIM_RECEIVER_DETECT_PASS ("TRUE"), // + .SIM_TX_EIDLE_DRIVE_LEVEL (PCIE_SIM_TX_EIDLE_DRIVE_LEVEL), // + .SIM_VERSION ("2.0"), // + + //---------- Clock Attributes ------------------------------------------ + .CPLL_REFCLK_DIV (CPLL_REFCLK_DIV), // + .CPLL_FBDIV_45 (CPLL_FBDIV_45), // + .CPLL_FBDIV (CPLL_FBDIV), // + .TXOUT_DIV (OUT_DIV), // + .RXOUT_DIV (OUT_DIV), // + .TX_CLK25_DIV (CLK25_DIV), // + .RX_CLK25_DIV (CLK25_DIV), // + .TX_CLKMUX_PD ( 1'b1), // GTH + .RX_CLKMUX_PD ( 1'b1), // GTH + .TX_XCLK_SEL (TX_XCLK_SEL), // TXOUT = use TX buffer, TXUSR = bypass TX buffer + .RX_XCLK_SEL ("RXREC"), // RXREC = use RX buffer, RXUSR = bypass RX buffer + .OUTREFCLK_SEL_INV ( 2'b11), // + .CPLL_CFG (29'h00A407CC), // Changed from 24 to 29-bits, Optimized for PCIe PLL BW + .CPLL_INIT_CFG (24'h00001E), // Optimized for IES + .CPLL_LOCK_CFG (16'h01E8), // Optimized for IES + //.USE_PCS_CLK_PHASE_SEL ( 1'd0) // GTH new + + //---------- Reset Attributes ------------------------------------------ + .TXPCSRESET_TIME (5'b00001), // + .RXPCSRESET_TIME (5'b00001), // + .TXPMARESET_TIME (5'b00011), // + .RXPMARESET_TIME (5'b00011), // Optimized for sim and for DRP + //.RXISCANRESET_TIME (5'b00001), // + //.RESET_POWERSAVE_DISABLE ( 1'd0), // GTH new + + //---------- TX Data Attributes ---------------------------------------- + .TX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + .TX_INT_DATAWIDTH ( 0), // 2-byte internal datawidth for Gen1/Gen2 + + //---------- RX Data Attributes ---------------------------------------- + .RX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + .RX_INT_DATAWIDTH ( 0), // 2-byte internal datawidth for Gen1/Gen2 + + //---------- Command Attributes ---------------------------------------- + .TX_RXDETECT_CFG (TX_RXDETECT_CFG), // + .TX_RXDETECT_PRECHARGE_TIME (17'h00001), // GTH new, Optimized for sim + .TX_RXDETECT_REF ( 3'b011), // + .RX_CM_SEL ( 2'b11), // 0 = AVTT, 1 = GND, 2 = Float, 3 = Programmable, optimized for silicon + .RX_CM_TRIM ( 4'b1010), // Select 800mV, Changed from 3 to 4-bits, optimized for silicon + .TX_EIDLE_ASSERT_DELAY (PCIE_TX_EIDLE_ASSERT_DELAY), // Optimized for sim (3'd4) + .TX_EIDLE_DEASSERT_DELAY ( 3'b100), // Optimized for sim + //.PD_TRANS_TIME_FROM_P2 (12'h03C), // + .PD_TRANS_TIME_NONE_P2 ( 8'h09), // Optimized for sim + //.PD_TRANS_TIME_TO_P2 ( 8'h64), // + //.TRANS_TIME_RATE ( 8'h0E), // + + //---------- Electrical Command Attributes ----------------------------- + .TX_DRIVE_MODE ("PIPE"), // Gen1/Gen2 = PIPE, Gen3 = PIPEGEN3 + .TX_DEEMPH0 ( 6'b010100), // 6.0 dB, optimized for compliance, changed from 5 to 6-bits + .TX_DEEMPH1 ( 6'b001011), // 3.5 dB, optimized for compliance, changed from 5 to 6-bits + .TX_MARGIN_FULL_0 ( 7'b1001111), // 1000 mV + .TX_MARGIN_FULL_1 ( 7'b1001110), // 950 mV + .TX_MARGIN_FULL_2 ( 7'b1001101), // 900 mV + .TX_MARGIN_FULL_3 ( 7'b1001100), // 850 mV + .TX_MARGIN_FULL_4 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_0 ( 7'b1000101), // 500 mV + .TX_MARGIN_LOW_1 ( 7'b1000110), // 450 mV + .TX_MARGIN_LOW_2 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_3 ( 7'b1000010), // 350 mV + .TX_MARGIN_LOW_4 ( 7'b1000000), // 250 mV + .TX_MAINCURSOR_SEL ( 1'b0), // + .TX_QPI_STATUS_EN ( 1'b0), // + + //---------- Status Attributes ----------------------------------------- + .RX_SIG_VALID_DLY (4), // Optimized for sim + + //---------- DRP Attributes -------------------------------------------- + + //---------- PCS Attributes -------------------------------------------- + .PCS_PCIE_EN ("TRUE"), // PCIe + .PCS_RSVD_ATTR (48'h0000_0000_0140), // [8] : 1 = OOB power-up, [6] : 1 = DMON enable, Optimized for IES + + //---------- PMA Attributes -------------------------------------------- + .PMA_RSV (32'h00000080), // Optimized for IES + .PMA_RSV2 (32'h1C00000A), // Changed from 16 to 32-bits, Optimized for IES + //.PMA_RSV3 ( 2'h0), // + .PMA_RSV4 (15'h0008), // GTH new, Optimized for IES + //.PMA_RSV5 ( 4'h00), // GTH new + .RX_BIAS_CFG (24'h0C0010), // Changed from 12 to 24-bits, Optimized for IES + .TERM_RCAL_CFG (15'b100001000010000), // Changed from 5 to 15-bits, Optimized for IES + .TERM_RCAL_OVRD ( 3'b000), // Changed from 1 to 3-bits, Optimized for IES + + //---------- TX PI ----------------------------------------------------- + //.TXPI_CFG0 ( 2'd0), // GTH new + //.TXPI_CFG1 ( 2'd0), // GTH new + //.TXPI_CFG2 ( 2'd0), // GTH new + //.TXPI_CFG3 ( 1'd0), // GTH new + //.TXPI_CFG4 ( 1'd0), // GTH new + //.TXPI_CFG5 ( 3'b100), // GTH new + //.TXPI_GREY_SEL ( 1'd0), // GTH new + //.TXPI_INVSTROBE_SEL ( 1'd0), // GTH new + //.TXPI_PPMCLK_SEL ("TXUSRCLK2"), // GTH new + //.TXPI_PPM_CFG ( 8'd0), // GTH new + //.TXPI_SYNFREQ_PPM ( 3'd0), // GTH new + + //---------- RX PI ----------------------------------------------------- + .RXPI_CFG0 (2'b00), // GTH new + .RXPI_CFG1 (2'b11), // GTH new + .RXPI_CFG2 (2'b11), // GTH new + .RXPI_CFG3 (2'b11), // GTH new + .RXPI_CFG4 (1'b0), // GTH new + .RXPI_CFG5 (1'b0), // GTH new + .RXPI_CFG6 (3'b100), // GTH new + + //---------- CDR Attributes -------------------------------------------- + .RXCDR_CFG (RXCDR_CFG_GTH), // + //.RXCDR_CFG (83'h0_0011_07FE_4060_0104_1010), // A. Changed from 72 to 83-bits, optimized for IES div1 (Gen2), +/-000ppm, default, converted from GTX GES VnC,(2 Gen1) + //.RXCDR_CFG (83'h0_0011_07FE_4060_2104_1010), // B. Changed from 72 to 83-bits, optimized for IES div1 (Gen2), +/-300ppm, default, converted from GTX GES VnC,(2 Gen1) + //.RXCDR_CFG (83'h0_0011_07FE_2060_0104_1010), // C. Changed from 72 to 83-bits, optimized for IES div1 (Gen2), +/-000ppm, converted from GTX GES recommended, (3 Gen1) + //.RXCDR_CFG (83'h0_0011_07FE_2060_2104_1010), // D. Changed from 72 to 83-bits, optimized for IES div1 (Gen2), +/-300ppm, converted from GTX GES recommended, (3 Gen1) + //.RXCDR_CFG (83'h0_0001_07FE_1060_0110_1010), // E. Changed from 72 to 83-bits, optimized for IES div2 (Gen1), +/-000ppm, default, (3 Gen2) + //.RXCDR_CFG (83'h0_0001_07FE_1060_2110_1010), // F. Changed from 72 to 83-bits, optimized for IES div2 (Gen1), +/-300ppm, default, (3 Gen2) + //.RXCDR_CFG (83'h0_0011_07FE_1060_0110_1010), // G. Changed from 72 to 83-bits, optimized for IES div2 (Gen1), +/-000ppm, converted from GTX GES recommended, (3 Gen2) + //.RXCDR_CFG (83'h0_0011_07FE_1060_2110_1010), // H. Changed from 72 to 83-bits, optimized for IES div2 (Gen1), +/-300ppm, converted from GTX GES recommended, (2 Gen1) + .RXCDR_LOCK_CFG ( 6'b010101), // [5:3] Window Refresh, [2:1] Window Size, [0] Enable Detection (sensitive lock = 6'b111001) + .RXCDR_HOLD_DURING_EIDLE ( 1'd1), // Hold RX CDR on electrical idle for Gen1/Gen2 + .RXCDR_FR_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR frequency on electrical idle for Gen3 + .RXCDR_PH_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR phase on electrical idle for Gen3 + //.RXCDRFREQRESET_TIME ( 5'b00001), // optimized for IES + //.RXCDRPHRESET_TIME ( 5'b00001), // optimized for IES + + //---------- LPM Attributes -------------------------------------------- + .RXLPM_HF_CFG (14'h0200), // Optimized for IES + .RXLPM_LF_CFG (18'h09000), // Changed from 14 to 18-bits, Optimized for IES + + //---------- DFE Attributes -------------------------------------------- + .RXDFELPMRESET_TIME ( 7'h0F), // Optimized for IES + .RX_DFE_AGC_CFG0 ( 2'h0), // GTH new, optimized for IES + .RX_DFE_AGC_CFG1 ( 3'h4), // GTH new, optimized for IES, DFE + .RX_DFE_AGC_CFG2 ( 4'h0), // GTH new, optimized for IES + .RX_DFE_AGC_OVRDEN ( 1'h1), // GTH new, optimized for IES + .RX_DFE_GAIN_CFG (23'h0020C0), // Optimized for IES + .RX_DFE_H2_CFG (12'h000), // Optimized for IES + .RX_DFE_H3_CFG (12'h040), // Optimized for IES + .RX_DFE_H4_CFG (11'h0E0), // Optimized for IES + .RX_DFE_H5_CFG (11'h0E0), // Optimized for IES + .RX_DFE_H6_CFG (11'h020), // GTH new, optimized for IES + .RX_DFE_H7_CFG (11'h020), // GTH new, optimized for IES + .RX_DFE_KL_CFG (33'h000000310), // Changed from 13 to 33-bits, optimized for IES + .RX_DFE_KL_LPM_KH_CFG0 ( 2'h2), // GTH new, optimized for IES, DFE + .RX_DFE_KL_LPM_KH_CFG1 ( 3'h2), // GTH new, optimized for IES + .RX_DFE_KL_LPM_KH_CFG2 ( 4'h2), // GTH new, optimized for IES + .RX_DFE_KL_LPM_KH_OVRDEN ( 1'h1), // GTH new, optimized for IES + .RX_DFE_KL_LPM_KL_CFG0 ( 2'h2), // GTH new, optimized for IES, DFE + .RX_DFE_KL_LPM_KL_CFG1 ( 3'h2), // GTH new, optimized for IES + .RX_DFE_KL_LPM_KL_CFG2 ( 4'h2), // GTH new, optimized for IES + .RX_DFE_KL_LPM_KL_OVRDEN ( 1'b1), // GTH new, optimized for IES + .RX_DFE_LPM_CFG (16'h0080), // Optimized for IES + .RX_DFELPM_CFG0 ( 4'h6), // GTH new, optimized for IES + .RX_DFELPM_CFG1 ( 4'h0), // GTH new, optimized for IES + .RX_DFELPM_KLKH_AGC_STUP_EN ( 1'h1), // GTH new, optimized for IES + .RX_DFE_LPM_HOLD_DURING_EIDLE ( 1'h1), // PCIe use mode + .RX_DFE_ST_CFG (54'h00_C100_000C_003F), // GTH new, optimized for IES + .RX_DFE_UT_CFG (17'h03800), // Optimized for IES + .RX_DFE_VP_CFG (17'h03AA3), // Optimized for IES + + //---------- OS Attributes --------------------------------------------- + .RX_OS_CFG (13'h0080), // Optimized for IES + .A_RXOSCALRESET ( 1'd0), // GTH new, optimized for IES + .RXOSCALRESET_TIME ( 5'b00011), // GTH new, optimized for IES + .RXOSCALRESET_TIMEOUT ( 5'b00000), // GTH new, disable timeout, optimized for IES + + //---------- Eye Scan Attributes --------------------------------------- + //.ES_CLK_PHASE_SEL ( 1'd0), // GTH new + //.ES_CONTROL ( 6'd0), // + //.ES_ERRDET_EN ("FALSE"), // + .ES_EYE_SCAN_EN ("FALSE"), // Optimized for IES + .ES_HORZ_OFFSET (12'h000), // Optimized for IES + //.ES_PMA_CFG (10'd0), // + //.ES_PRESCALE ( 5'd0), // + //.ES_QUAL_MASK (80'd0), // + //.ES_QUALIFIER (80'd0), // + //.ES_SDATA_MASK (80'd0), // + //.ES_VERT_OFFSET ( 9'd0), // + + //---------- TX Buffer Attributes -------------------------------------- + .TXBUF_EN (PCIE_TXBUF_EN), // + .TXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + + //---------- RX Buffer Attributes -------------------------------------- + .RXBUF_EN ("TRUE"), // + //.RX_BUFFER_CFG ( 6'd0), // + .RX_DEFER_RESET_BUF_EN ("TRUE"), // + .RXBUF_ADDR_MODE ("FULL"), // + .RXBUF_EIDLE_HI_CNT ( 4'd4), // Optimized for sim + .RXBUF_EIDLE_LO_CNT ( 4'd0), // Optimized for sim + .RXBUF_RESET_ON_CB_CHANGE ("TRUE"), // + .RXBUF_RESET_ON_COMMAALIGN ("FALSE"), // + .RXBUF_RESET_ON_EIDLE ("TRUE"), // PCIe + .RXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + .RXBUF_THRESH_OVRD ("FALSE"), // + .RXBUF_THRESH_OVFLW (61), // + .RXBUF_THRESH_UNDFLW ( 4), // + //.RXBUFRESET_TIME ( 5'b00001), // + + //---------- TX Sync Attributes ---------------------------------------- + //.TXPH_CFG (16'h0780), // + .TXPH_MONITOR_SEL ( 5'd0), // + //.TXPHDLY_CFG (24'h084020), // [19] : 1 = full range, 0 = half range + //.TXDLY_CFG (16'h001F), // + //.TXDLY_LCFG ( 9'h030), // + //.TXDLY_TAP_CFG (16'd0), // + + .TXSYNC_OVRD (TXSYNC_OVRD), // GTH new + .TXSYNC_MULTILANE (TXSYNC_MULTILANE), // GTH new + .TXSYNC_SKIP_DA (1'b0), // GTH new + + //---------- RX Sync Attributes ---------------------------------------- + //.RXPH_CFG (24'd0), // + .RXPH_MONITOR_SEL ( 5'd0), // + .RXPHDLY_CFG (24'h004020), // [19] : 1 = full range, 0 = half range + //.RXDLY_CFG (16'h001F), // + //.RXDLY_LCFG ( 9'h030), // + //.RXDLY_TAP_CFG (16'd0), // + .RX_DDI_SEL ( 6'd0), // + + .RXSYNC_OVRD (RXSYNC_OVRD), // GTH new + .RXSYNC_MULTILANE (RXSYNC_MULTILANE), // GTH new + .RXSYNC_SKIP_DA (1'b0), // GTH new + + //---------- Comma Alignment Attributes -------------------------------- + .ALIGN_COMMA_DOUBLE ("FALSE"), // + .ALIGN_COMMA_ENABLE (10'b1111111111), // PCIe + .ALIGN_COMMA_WORD ( 1), // + .ALIGN_MCOMMA_DET ("TRUE"), // + .ALIGN_MCOMMA_VALUE (10'b1010000011), // + .ALIGN_PCOMMA_DET ("TRUE"), // + .ALIGN_PCOMMA_VALUE (10'b0101111100), // + .DEC_MCOMMA_DETECT ("TRUE"), // + .DEC_PCOMMA_DETECT ("TRUE"), // + .DEC_VALID_COMMA_ONLY ("FALSE"), // PCIe + .SHOW_REALIGN_COMMA ("FALSE"), // PCIe + .RXSLIDE_AUTO_WAIT ( 7), // + .RXSLIDE_MODE ("PMA"), // PCIe + + //---------- Channel Bonding Attributes -------------------------------- + .CHAN_BOND_KEEP_ALIGN ("TRUE"), // PCIe + .CHAN_BOND_MAX_SKEW ( 7), // + .CHAN_BOND_SEQ_LEN ( 4), // PCIe + .CHAN_BOND_SEQ_1_ENABLE ( 4'b1111), // + .CHAN_BOND_SEQ_1_1 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_2 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_3 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_4 (10'b0110111100), // K28.5 (BC) - COM + .CHAN_BOND_SEQ_2_USE ("TRUE"), // PCIe + .CHAN_BOND_SEQ_2_ENABLE ( 4'b1111), // + .CHAN_BOND_SEQ_2_1 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_2 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_3 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_4 (10'b0110111100), // K28.5 (BC) - COM + .FTS_DESKEW_SEQ_ENABLE ( 4'b1111), // + .FTS_LANE_DESKEW_EN ("TRUE"), // PCIe + .FTS_LANE_DESKEW_CFG ( 4'b1111), // + + //---------- Clock Correction Attributes ------------------------------- + .CBCC_DATA_SOURCE_SEL ("DECODED"), // + .CLK_CORRECT_USE ("TRUE"), // + .CLK_COR_KEEP_IDLE ("TRUE"), // PCIe + .CLK_COR_MAX_LAT (CLK_COR_MAX_LAT), // + .CLK_COR_MIN_LAT (CLK_COR_MIN_LAT), // + .CLK_COR_PRECEDENCE ("TRUE"), // + .CLK_COR_REPEAT_WAIT ( 0), // + .CLK_COR_SEQ_LEN ( 1), // + .CLK_COR_SEQ_1_ENABLE ( 4'b1111), // + .CLK_COR_SEQ_1_1 (10'b0100011100), // K28.0 (1C) - SKP + .CLK_COR_SEQ_1_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_4 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_ENABLE ( 4'b0000), // Disabled + .CLK_COR_SEQ_2_USE ("FALSE"), // + .CLK_COR_SEQ_2_1 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_4 (10'b0000000000), // Disabled + + //---------- 8b10b Attributes ------------------------------------------ + .RX_DISPERR_SEQ_MATCH ("TRUE"), // + + //---------- 64b/66b & 64b/67b Attributes ------------------------------ + .GEARBOX_MODE (3'd0), // + .TXGEARBOX_EN ("FALSE"), // + .RXGEARBOX_EN ("FALSE"), // + + //---------- PRBS & Loopback Attributes -------------------------------- + .LOOPBACK_CFG ( 1'd1), // GTH new, enable latch when bypassing TX buffer, equivalent to GTX PCS_RSVD_ATTR[0] + .RXPRBS_ERR_LOOPBACK ( 1'd0), // + .TX_LOOPBACK_DRIVE_HIZ ("FALSE"), // + + //---------- OOB & SATA Attributes ------------------------------------- + .TXOOB_CFG ( 1'd1), // GTH new, filter stale TX data when exiting TX electrical idle, equivalent to GTX PCS_RSVD_ATTR[7] + //.RXOOB_CFG ( 7'b0000110), // + .RXOOB_CLK_CFG (RXOOB_CLK_CFG), // GTH new + //.SAS_MAX_COM (64), // + //.SAS_MIN_COM (36), // + //.SATA_BURST_SEQ_LEN ( 4'b1111), // + //.SATA_BURST_VAL ( 3'b100), // + //.SATA_CPLL_CFG ("VCO_3000MHZ"), // + //.SATA_EIDLE_VAL ( 3'b100), // + //.SATA_MAX_BURST ( 8), // + //.SATA_MAX_INIT (21), // + //.SATA_MAX_WAKE ( 7), // + //.SATA_MIN_BURST ( 4), // + //.SATA_MIN_INIT (12), // + //.SATA_MIN_WAKE ( 4), // + + //---------- MISC ------------------------------------------------------ + .DMONITOR_CFG (24'h000AB1), // Optimized for debug; [7:4] : 1011 = AGC + //.DMONITOR_CFG (24'h000AB1), // Optimized for debug; [7:4] : 0000 = CDR FSM + .RX_DEBUG_CFG (14'b00000011000000), // Changed from 12 to 14-bits, optimized for IES + //.TST_RSV (32'd0), // + //.UCODEER_CLR ( 1'd0), // + + //---------- GTH ------------------------------------------------------- + //.ACJTAG_DEBUG_MODE ( 1'd0), // GTH new + //.ACJTAG_MODE ( 1'd0), // GTH new + //.ACJTAG_RESET ( 1'd0), // GTH new + .ADAPT_CFG0 (20'h00C10), // GTH new, optimized for IES + .CFOK_CFG (42'h248_0004_0E80), // GTH new, optimized for IES, [8] : 1 = Skip CFOK + .CFOK_CFG2 ( 6'b100000), // GTH new, optimized for IES + .CFOK_CFG3 ( 6'b100000) // GTH new, optimized for IES + + ) + gthe2_channel_i + ( + + //---------- Clock ----------------------------------------------------- + .GTGREFCLK (1'd0), // + .GTREFCLK0 (GT_GTREFCLK0), // + .GTREFCLK1 (1'd0), // + .GTNORTHREFCLK0 (1'd0), // + .GTNORTHREFCLK1 (1'd0), // + .GTSOUTHREFCLK0 (1'd0), // + .GTSOUTHREFCLK1 (1'd0), // + .QPLLCLK (GT_QPLLCLK), // + .QPLLREFCLK (GT_QPLLREFCLK), // + .TXUSRCLK (GT_TXUSRCLK), // + .RXUSRCLK (GT_RXUSRCLK), // + .TXUSRCLK2 (GT_TXUSRCLK2), // + .RXUSRCLK2 (GT_RXUSRCLK2), // + .TXSYSCLKSEL (GT_TXSYSCLKSEL), // + .RXSYSCLKSEL (GT_RXSYSCLKSEL), // + .TXOUTCLKSEL (txoutclksel), // + .RXOUTCLKSEL (rxoutclksel), // + .CPLLREFCLKSEL (3'd1), // + .CPLLLOCKDETCLK (1'd0), // + .CPLLLOCKEN (1'd1), // + .CLKRSVD0 (1'd0), // GTH + .CLKRSVD1 (1'd0), // GTH + + .TXOUTCLK (GT_TXOUTCLK), // + .RXOUTCLK (GT_RXOUTCLK), // + .TXOUTCLKFABRIC (), // + .RXOUTCLKFABRIC (), // + .TXOUTCLKPCS (), // + .RXOUTCLKPCS (), // + .CPLLLOCK (GT_CPLLLOCK), // + .CPLLREFCLKLOST (), // + .CPLLFBCLKLOST (), // + .RXCDRLOCK (GT_RXCDRLOCK), // + .GTREFCLKMONITOR (), // + + //---------- Reset ----------------------------------------------------- + .CPLLPD (cpllpd | GT_CPLLPD), // + .CPLLRESET (cpllrst | GT_CPLLRESET), // + .TXUSERRDY (GT_TXUSERRDY), // + .RXUSERRDY (GT_RXUSERRDY), // + .CFGRESET (1'd0), // + .GTRESETSEL (1'd0), // + .RESETOVRD (GT_RESETOVRD), // + .GTTXRESET (GT_GTTXRESET), // + .GTRXRESET (GT_GTRXRESET), // + + .TXRESETDONE (GT_TXRESETDONE), // + .RXRESETDONE (GT_RXRESETDONE), // + + //---------- TX Data --------------------------------------------------- + .TXDATA ({32'd0, GT_TXDATA}), // + .TXCHARISK ({ 4'd0, GT_TXDATAK}), // + + .GTHTXP (GT_TXP), // GTH + .GTHTXN (GT_TXN), // GTH + + //---------- RX Data --------------------------------------------------- + .GTHRXP (GT_RXP), // GTH + .GTHRXN (GT_RXN), // GTH + + .RXDATA (rxdata), // + .RXCHARISK (rxdatak), // + + //---------- Command --------------------------------------------------- + .TXDETECTRX (GT_TXDETECTRX), // + .TXPDELECIDLEMODE ( 1'd0), // + .RXELECIDLEMODE ( 2'd0), // + .TXELECIDLE (GT_TXELECIDLE), // + .TXCHARDISPMODE ({7'd0, GT_TXCOMPLIANCE}), // + .TXCHARDISPVAL ( 8'd0), // + .TXPOLARITY ( 1'b0), // + .RXPOLARITY (GT_RXPOLARITY), // + .TXPD (GT_TXPOWERDOWN), // + .RXPD (GT_RXPOWERDOWN), // + .TXRATE (GT_TXRATE), // + .RXRATE (GT_RXRATE), // + .TXRATEMODE (1'd0), // GTH + .RXRATEMODE (1'd0), // GTH + + //---------- Electrical Command ---------------------------------------- + .TXMARGIN (GT_TXMARGIN), // + .TXSWING (GT_TXSWING), // + .TXDEEMPH (GT_TXDEEMPH), // + .TXINHIBIT (GT_TXINHIBIT), // + .TXBUFDIFFCTRL (3'b100), // + .TXDIFFCTRL (4'b1111), // Select 850mV + .TXPRECURSOR (GT_TXPRECURSOR), // + .TXPRECURSORINV (1'd0), // + .TXMAINCURSOR (GT_TXMAINCURSOR), // + .TXPOSTCURSOR (GT_TXPOSTCURSOR), // + .TXPOSTCURSORINV (1'd0), // + + //---------- Status ---------------------------------------------------- + .RXVALID (GT_RXVALID), // + .PHYSTATUS (GT_PHYSTATUS), // + .RXELECIDLE (GT_RXELECIDLE), // + .RXSTATUS (GT_RXSTATUS), // + .TXRATEDONE (GT_TXRATEDONE), // + .RXRATEDONE (GT_RXRATEDONE), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (GT_DRPCLK), // + .DRPADDR (GT_DRPADDR), // + .DRPEN (GT_DRPEN), // + .DRPDI (GT_DRPDI), // + .DRPWE (GT_DRPWE), // + + .DRPDO (GT_DRPDO), // + .DRPRDY (GT_DRPRDY), // + + //---------- PMA ------------------------------------------------------- + .TXPMARESET (GT_TXPMARESET), // + .RXPMARESET (GT_RXPMARESET), // + .RXLPMEN (rxlpmen), // *** + .RXLPMHFHOLD (GT_RX_CONVERGE), // Set to 1 after convergence + .RXLPMHFOVRDEN ( 1'd0), // + .RXLPMLFHOLD (GT_RX_CONVERGE), // Set to 1 after convergence + .RXLPMLFKLOVRDEN ( 1'd0), // + .TXQPIBIASEN ( 1'd0), // + .TXQPISTRONGPDOWN ( 1'd0), // + .TXQPIWEAKPUP ( 1'd0), // + .RXQPIEN ( 1'd0), // Optimized for IES + .PMARSVDIN ( 5'd0), // + .GTRSVD (16'd0), // + + .TXQPISENP (), // + .TXQPISENN (), // + .RXQPISENP (), // + .RXQPISENN (), // + .DMONITOROUT (dmonitorout), // GTH 15-bits. + + //---------- PCS ------------------------------------------------------- + .TXPCSRESET (GT_TXPCSRESET), // + .RXPCSRESET (GT_RXPCSRESET), // + .PCSRSVDIN (16'd0), // [0]: 1 = TXRATE async, [1]: 1 = RXRATE async + .PCSRSVDIN2 ( 5'd0), // + + .PCSRSVDOUT (), // + + //---------- CDR ------------------------------------------------------- + .RXCDRRESET (GT_RXCDRRESET), // + .RXCDRRESETRSV (1'd0), // + .RXCDRFREQRESET (GT_RXCDRFREQRESET), // + .RXCDRHOLD (1'b0), // + .RXCDROVRDEN (1'd0), // + + //---------- PI -------------------------------------------------------- + .TXPIPPMEN (1'd0), // GTH new + .TXPIPPMOVRDEN (1'd0), // GTH new + .TXPIPPMPD (1'd0), // GTH new + .TXPIPPMSEL (1'd0), // GTH new + .TXPIPPMSTEPSIZE (5'd0), // GTH new + + //---------- DFE ------------------------------------------------------- + .RXDFELPMRESET (GT_RXDFELPMRESET), // + .RXDFEAGCTRL (5'b10000), // GTH new, optimized for IES + .RXDFECM1EN (1'd0), // + .RXDFEVSEN (1'd0), // + .RXDFETAP2HOLD (1'd0), // + .RXDFETAP2OVRDEN (1'd0), // + .RXDFETAP3HOLD (1'd0), // + .RXDFETAP3OVRDEN (1'd0), // + .RXDFETAP4HOLD (1'd0), // + .RXDFETAP4OVRDEN (1'd0), // + .RXDFETAP5HOLD (1'd0), // + .RXDFETAP5OVRDEN (1'd0), // + .RXDFETAP6HOLD (1'd0), // GTH new + .RXDFETAP6OVRDEN (1'd0), // GTH new + .RXDFETAP7HOLD (1'd0), // GTH new + .RXDFETAP7OVRDEN (1'd0), // GTH new + .RXDFEAGCHOLD (GT_RX_CONVERGE), // Set to 1 after convergence + .RXDFEAGCOVRDEN (rxlpmen), // + .RXDFELFHOLD (GT_RX_CONVERGE), // Set to 1 after convergence + .RXDFELFOVRDEN (1'd0), // + .RXDFEUTHOLD (1'd0), // + .RXDFEUTOVRDEN (1'd0), // + .RXDFEVPHOLD (1'd0), // + .RXDFEVPOVRDEN (1'd0), // + .RXDFEXYDEN (1'd1), // Optimized for IES + .RXMONITORSEL (2'd0), // + .RXDFESLIDETAP (5'd0), // GTH new + .RXDFESLIDETAPID (6'd0), // GTH new + .RXDFESLIDETAPHOLD (1'd0), // GTH new + .RXDFESLIDETAPOVRDEN (1'd0), // GTH new + .RXDFESLIDETAPADAPTEN (1'd0), // GTH new + .RXDFESLIDETAPINITOVRDEN (1'd0), // GTH new + .RXDFESLIDETAPONLYADAPTEN (1'd0), // GTH new + .RXDFESLIDETAPSTROBE (1'd0), // GTH new + + .RXMONITOROUT (), // + .RXDFESLIDETAPSTARTED (), // GTH new + .RXDFESLIDETAPSTROBEDONE (), // GTH new + .RXDFESLIDETAPSTROBESTARTED (), // GTH new + .RXDFESTADAPTDONE (), // GTH new + + //---------- OS -------------------------------------------------------- + .RXOSHOLD (1'd0), // optimized for IES + .RXOSOVRDEN (1'd0), // optimized for IES + .RXOSINTEN (1'd1), // GTH new, optimized for IES + .RXOSINTHOLD (1'd0), // GTH new, optimized for IES + .RXOSINTNTRLEN (1'd0), // GTH new, optimized for IES + .RXOSINTOVRDEN (1'd0), // GTH new, optimized for IES + .RXOSINTSTROBE (1'd0), // GTH new, optimized for IES + .RXOSINTTESTOVRDEN (1'd0), // GTH new, optimized for IES + .RXOSINTCFG (4'b0110), // GTH new, optimized for IES + .RXOSINTID0 (4'b0000), // GTH new, optimized for IES + .RXOSCALRESET ( 1'd0), // GTH, optimized for IES + + .RSOSINTDONE (), // GTH new + .RXOSINTSTARTED (), // GTH new + .RXOSINTSTROBEDONE (), // GTH new + .RXOSINTSTROBESTARTED (), // GTH new + + //---------- Eye Scan -------------------------------------------------- + .EYESCANRESET (GT_EYESCANRESET), // + .EYESCANMODE (1'd0), // + .EYESCANTRIGGER (1'b0), // + + .EYESCANDATAERROR (GT_EYESCANDATAERROR), // + + //---------- TX Buffer ------------------------------------------------- + .TXBUFSTATUS (), // + + //---------- RX Buffer ------------------------------------------------- + .RXBUFRESET (GT_RXBUFRESET), // + + .RXBUFSTATUS (GT_RXBUFSTATUS), // + + //---------- TX Sync --------------------------------------------------- + .TXPHDLYRESET (GT_TXPHDLYRESET), // + .TXPHDLYTSTCLK (1'd0), // + .TXPHALIGN (GT_TXPHALIGN), // + .TXPHALIGNEN (GT_TXPHALIGNEN), // + .TXPHDLYPD (1'd0), // + .TXPHINIT (GT_TXPHINIT), // + .TXPHOVRDEN (1'd0), // + .TXDLYBYPASS (GT_TXDLYBYPASS), // + .TXDLYSRESET (GT_TXDLYSRESET), // + .TXDLYEN (GT_TXDLYEN), // + .TXDLYOVRDEN (1'd0), // + .TXDLYHOLD (1'd0), // + .TXDLYUPDOWN (1'd0), // + + .TXPHALIGNDONE (GT_TXPHALIGNDONE), // + .TXPHINITDONE (GT_TXPHINITDONE), // + .TXDLYSRESETDONE (GT_TXDLYSRESETDONE), // + + .TXSYNCMODE (GT_TXSYNCMODE), // GTH + .TXSYNCIN (GT_TXSYNCIN), // GTH + .TXSYNCALLIN (GT_TXSYNCALLIN), // GTH + + .TXSYNCDONE (GT_TXSYNCDONE), // GTH + .TXSYNCOUT (GT_TXSYNCOUT), // GTH + + //---------- RX Sync --------------------------------------------------- + .RXPHDLYRESET (1'd0), // + .RXPHALIGN (GT_RXPHALIGN), // + .RXPHALIGNEN (GT_RXPHALIGNEN), // + .RXPHDLYPD (1'd0), // + .RXPHOVRDEN (1'd0), // + .RXDLYBYPASS (GT_RXDLYBYPASS), // + .RXDLYSRESET (GT_RXDLYSRESET), // + .RXDLYEN (GT_RXDLYEN), // + .RXDLYOVRDEN (1'd0), // + .RXDDIEN (GT_RXDDIEN), // + + .RXPHALIGNDONE (GT_RXPHALIGNDONE), // + .RXPHMONITOR (), // + .RXPHSLIPMONITOR (), // + .RXDLYSRESETDONE (GT_RXDLYSRESETDONE), // + + .RXSYNCMODE (GT_RXSYNCMODE), // GTH + .RXSYNCIN (GT_RXSYNCIN), // GTH + .RXSYNCALLIN (GT_RXSYNCALLIN), // GTH + + .RXSYNCDONE (GT_RXSYNCDONE), // GTH + .RXSYNCOUT (GT_RXSYNCOUT), // GTH + + //---------- Comma Alignment ------------------------------------------- + .RXCOMMADETEN ( 1'd1), // + .RXMCOMMAALIGNEN (!GT_GEN3), // 0 = disable comma alignment in Gen3 + .RXPCOMMAALIGNEN (!GT_GEN3), // 0 = disable comma alignment in Gen3 + .RXSLIDE ( GT_RXSLIDE), // + + .RXCOMMADET (GT_RXCOMMADET), // + .RXCHARISCOMMA (rxchariscomma), // + .RXBYTEISALIGNED (GT_RXBYTEISALIGNED), // + .RXBYTEREALIGN (GT_RXBYTEREALIGN), // + + //---------- Channel Bonding ------------------------------------------- + .RXCHBONDEN (GT_RXCHBONDEN), // + .RXCHBONDI (GT_RXCHBONDI), // + .RXCHBONDLEVEL (GT_RXCHBONDLEVEL), // + .RXCHBONDMASTER (GT_RXCHBONDMASTER), // + .RXCHBONDSLAVE (GT_RXCHBONDSLAVE), // + + .RXCHANBONDSEQ (), // + .RXCHANISALIGNED (GT_RXCHANISALIGNED), // + .RXCHANREALIGN (), // + .RXCHBONDO (GT_RXCHBONDO), // + + //---------- Clock Correction ----------------------------------------- + .RXCLKCORCNT (), // + + //---------- 8b10b ----------------------------------------------------- + .TX8B10BBYPASS (8'd0), // + .TX8B10BEN (!GT_GEN3), // 0 = disable TX 8b10b in Gen3 + .RX8B10BEN (!GT_GEN3), // 0 = disable RX 8b10b in Gen3 + + .RXDISPERR (GT_RXDISPERR), // + .RXNOTINTABLE (GT_RXNOTINTABLE), // + + //---------- 64b/66b & 64b/67b ----------------------------------------- + .TXHEADER (3'd0), // + .TXSEQUENCE (7'd0), // + .TXSTARTSEQ (1'd0), // + .RXGEARBOXSLIP (1'd0), // + + .TXGEARBOXREADY (), // + .RXDATAVALID (), // + .RXHEADER (), // + .RXHEADERVALID (), // + .RXSTARTOFSEQ (), // + + //---------- PRBS & Loopback ------------------------------------------- + .TXPRBSSEL (GT_TXPRBSSEL), // + .RXPRBSSEL (GT_RXPRBSSEL), // + .TXPRBSFORCEERR (GT_TXPRBSFORCEERR), // + .RXPRBSCNTRESET (GT_RXPRBSCNTRESET), // + .LOOPBACK (GT_LOOPBACK), // + + .RXPRBSERR (GT_RXPRBSERR), // + + //---------- OOB ------------------------------------------------------- + .SIGVALIDCLK (GT_OOBCLK), // GTH, optimized for debug + .TXCOMINIT (1'd0), // + .TXCOMSAS (1'd0), // + .TXCOMWAKE (1'd0), // + .RXOOBRESET (1'd0), // + + .TXCOMFINISH (), // + .RXCOMINITDET (), // + .RXCOMSASDET (), // + .RXCOMWAKEDET (), // + + //---------- MISC ------------------------------------------------------ + .SETERRSTATUS ( 1'd0), // + .TXDIFFPD ( 1'd0), // + .TXPISOPD ( 1'd0), // + .TSTIN (20'hFFFFF), // + + //---------- GTH ------------------------------------------------------- + .RXADAPTSELTEST (14'd0), // GTH new + .DMONFIFORESET ( 1'd0), // GTH + .DMONITORCLK (dmonitorclk), // GTH, optimized for debug + //.DMONITORCLK (GT_DRPCLK), // GTH, optimized for debug + + .RXPMARESETDONE (GT_RXPMARESETDONE), // GTH + .TXPMARESETDONE () // GTH + + ); + + end + +else + + begin : gtx_channel + + //---------- GTX Channel Module -------------------------------------------- + GTXE2_CHANNEL # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_CPLLREFCLK_SEL (3'b001), // + .SIM_RESET_SPEEDUP (PCIE_SIM_SPEEDUP), // + .SIM_RECEIVER_DETECT_PASS ("TRUE"), // + .SIM_TX_EIDLE_DRIVE_LEVEL (PCIE_SIM_TX_EIDLE_DRIVE_LEVEL), // + .SIM_VERSION (PCIE_USE_MODE), // + + //---------- Clock Attributes ------------------------------------------ + .CPLL_REFCLK_DIV (CPLL_REFCLK_DIV), // + .CPLL_FBDIV_45 (CPLL_FBDIV_45), // + .CPLL_FBDIV (CPLL_FBDIV), // + .TXOUT_DIV (OUT_DIV), // + .RXOUT_DIV (OUT_DIV), // + .TX_CLK25_DIV (CLK25_DIV), // + .RX_CLK25_DIV (CLK25_DIV), // + .TX_CLKMUX_PD (CLKMUX_PD), // GTX + .RX_CLKMUX_PD (CLKMUX_PD), // GTX + .TX_XCLK_SEL (TX_XCLK_SEL), // TXOUT = use TX buffer, TXUSR = bypass TX buffer + .RX_XCLK_SEL ("RXREC"), // RXREC = use RX buffer, RXUSR = bypass RX buffer + .OUTREFCLK_SEL_INV ( 2'b11), // + .CPLL_CFG (CPLL_CFG), // Optimized for silicon + //.CPLL_INIT_CFG (24'h00001E), // + //.CPLL_LOCK_CFG (16'h01E8), // + + //---------- Reset Attributes ------------------------------------------ + .TXPCSRESET_TIME (5'b00001), // + .RXPCSRESET_TIME (5'b00001), // + .TXPMARESET_TIME (5'b00011), // + .RXPMARESET_TIME (5'b00011), // Optimized for sim and for DRP + //.RXISCANRESET_TIME (5'b00001), // + + //---------- TX Data Attributes ---------------------------------------- + .TX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + .TX_INT_DATAWIDTH ( 0), // 2-byte internal datawidth for Gen1/Gen2 + + //---------- RX Data Attributes ---------------------------------------- + .RX_DATA_WIDTH (20), // 2-byte external datawidth for Gen1/Gen2 + .RX_INT_DATAWIDTH ( 0), // 2-byte internal datawidth for Gen1/Gen2 + + //---------- Command Attributes ---------------------------------------- + .TX_RXDETECT_CFG (TX_RXDETECT_CFG), // + .TX_RXDETECT_REF (TX_RXDETECT_REF), // + .RX_CM_SEL ( 2'd3), // 0 = AVTT, 1 = GND, 2 = Float, 3 = Programmable + .RX_CM_TRIM ( 3'b010), // Select 800mV + .TX_EIDLE_ASSERT_DELAY (PCIE_TX_EIDLE_ASSERT_DELAY), // Optimized for sim (3'd4) + .TX_EIDLE_DEASSERT_DELAY ( 3'b100), // Optimized for sim + //.PD_TRANS_TIME_FROM_P2 (12'h03C), // + .PD_TRANS_TIME_NONE_P2 ( 8'h09), // + //.PD_TRANS_TIME_TO_P2 ( 8'h64), // + //.TRANS_TIME_RATE ( 8'h0E), // + + //---------- Electrical Command Attributes ----------------------------- + .TX_DRIVE_MODE ("PIPE"), // Gen1/Gen2 = PIPE, Gen3 = PIPEGEN3 + .TX_DEEMPH0 ( 5'b10100), // 6.0 dB + .TX_DEEMPH1 ( 5'b01011), // 3.5 dB + .TX_MARGIN_FULL_0 ( 7'b1001111), // 1000 mV + .TX_MARGIN_FULL_1 ( 7'b1001110), // 950 mV + .TX_MARGIN_FULL_2 ( 7'b1001101), // 900 mV + .TX_MARGIN_FULL_3 ( 7'b1001100), // 850 mV + .TX_MARGIN_FULL_4 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_0 ( 7'b1000101), // 500 mV + .TX_MARGIN_LOW_1 ( 7'b1000110), // 450 mV + .TX_MARGIN_LOW_2 ( 7'b1000011), // 400 mV + .TX_MARGIN_LOW_3 ( 7'b1000010), // 350 mV + .TX_MARGIN_LOW_4 ( 7'b1000000), // 250 mV + .TX_MAINCURSOR_SEL ( 1'b0), // + .TX_PREDRIVER_MODE ( 1'b0), // GTX + .TX_QPI_STATUS_EN ( 1'b0), // + + //---------- Status Attributes ----------------------------------------- + .RX_SIG_VALID_DLY (4), // Optimized for sim + + //---------- DRP Attributes -------------------------------------------- + + //---------- PCS Attributes -------------------------------------------- + .PCS_PCIE_EN ("TRUE"), // PCIe + .PCS_RSVD_ATTR (PCS_RSVD_ATTR), // + + //---------- PMA Attributes -------------------------------------------- + .PMA_RSV (32'h00018480), // Optimized for GES Gen1/Gen2 + .PMA_RSV2 (16'h2050), // Optimized for silicon, [4] RX_CM_TRIM[4], [5] = 1 Enable Eye Scan + //.PMA_RSV3 ( 2'd0), // + //.PMA_RSV4 (32'd0), // GTX 3.0 new + .RX_BIAS_CFG (12'b000000000100), // Optimized for GES + //.TERM_RCAL_CFG ( 5'b10000), // + //.TERM_RCAL_OVRD ( 1'd0), // + + //---------- CDR Attributes -------------------------------------------- + .RXCDR_CFG (RXCDR_CFG_GTX), // + .RXCDR_LOCK_CFG ( 6'b010101), // [5:3] Window Refresh, [2:1] Window Size, [0] Enable Detection (sensitive lock = 6'b111001) + .RXCDR_HOLD_DURING_EIDLE ( 1'd1), // Hold RX CDR on electrical idle for Gen1/Gen2 + .RXCDR_FR_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR frequency on electrical idle for Gen3 + .RXCDR_PH_RESET_ON_EIDLE ( 1'd0), // Reset RX CDR phase on electrical idle for Gen3 + //.RXCDRFREQRESET_TIME ( 5'b00001), // + //.RXCDRPHRESET_TIME ( 5'b00001), // + + //---------- LPM Attributes -------------------------------------------- + .RXLPM_HF_CFG (14'h00F0), // Optimized for silicon + .RXLPM_LF_CFG (14'h00F0), // Optimized for silicon + + //---------- DFE Attributes -------------------------------------------- + //.RXDFELPMRESET_TIME ( 7'b0001111), // + .RX_DFE_GAIN_CFG (23'h020FEA), // Optimized for GES, IES = 23'h001F0A + .RX_DFE_H2_CFG (12'b000000000000), // Optimized for GES + .RX_DFE_H3_CFG (12'b000001000000), // Optimized for GES + .RX_DFE_H4_CFG (11'b00011110000), // Optimized for GES + .RX_DFE_H5_CFG (11'b00011100000), // Optimized for GES + .RX_DFE_KL_CFG (13'b0000011111110), // Optimized for GES + .RX_DFE_KL_CFG2 (32'h3290D86C), // Optimized for GES, GTX new, CTLE 3 3 5, default = 32'h3010D90C + .RX_DFE_LPM_CFG (16'h0954), // Optimized for GES + .RX_DFE_LPM_HOLD_DURING_EIDLE ( 1'd1), // Optimized for PCIe + .RX_DFE_UT_CFG (17'b10001111000000000), // Optimized for GES, IES = 17'h08F00 + .RX_DFE_VP_CFG (17'b00011111100000011), // Optimized for GES + .RX_DFE_XYD_CFG (13'h0000), // Optimized for 4.0 + + //---------- OS Attributes --------------------------------------------- + .RX_OS_CFG (13'b0000010000000), // Optimized for GES + + //---------- Eye Scan Attributes --------------------------------------- + //.ES_CONTROL ( 6'd0), // + //.ES_ERRDET_EN ("FALSE"), // + .ES_EYE_SCAN_EN ("FALSE"), // + .ES_HORZ_OFFSET (12'd0), // + //.ES_PMA_CFG (10'd0), // + //.ES_PRESCALE ( 5'd0), // + //.ES_QUAL_MASK (80'd0), // + //.ES_QUALIFIER (80'd0), // + //.ES_SDATA_MASK (80'd0), // + //.ES_VERT_OFFSET ( 9'd0), // + + //---------- TX Buffer Attributes -------------------------------------- + .TXBUF_EN (PCIE_TXBUF_EN), // + .TXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + + //---------- RX Buffer Attributes -------------------------------------- + .RXBUF_EN ("TRUE"), // + //.RX_BUFFER_CFG ( 6'd0), // + .RX_DEFER_RESET_BUF_EN ("TRUE"), // + .RXBUF_ADDR_MODE ("FULL"), // + .RXBUF_EIDLE_HI_CNT ( 4'd4), // Optimized for sim + .RXBUF_EIDLE_LO_CNT ( 4'd0), // Optimized for sim + .RXBUF_RESET_ON_CB_CHANGE ("TRUE"), // + .RXBUF_RESET_ON_COMMAALIGN ("FALSE"), // + .RXBUF_RESET_ON_EIDLE ("TRUE"), // PCIe + .RXBUF_RESET_ON_RATE_CHANGE ("TRUE"), // + .RXBUF_THRESH_OVRD ("FALSE"), // + .RXBUF_THRESH_OVFLW (61), // + .RXBUF_THRESH_UNDFLW ( 4), // + //.RXBUFRESET_TIME ( 5'b00001), // + + //---------- TX Sync Attributes ---------------------------------------- + //.TXPH_CFG (16'h0780), // + .TXPH_MONITOR_SEL ( 5'd0), // + //.TXPHDLY_CFG (24'h084020), // + //.TXDLY_CFG (16'h001F), // + //.TXDLY_LCFG ( 9'h030), // + //.TXDLY_TAP_CFG (16'd0), // + + //---------- RX Sync Attributes ---------------------------------------- + //.RXPH_CFG (24'd0), // + .RXPH_MONITOR_SEL ( 5'd0), // + .RXPHDLY_CFG (24'h004020), // Optimized for sim + //.RXDLY_CFG (16'h001F), // + //.RXDLY_LCFG ( 9'h030), // + //.RXDLY_TAP_CFG (16'd0), // + .RX_DDI_SEL ( 6'd0), // + + //---------- Comma Alignment Attributes -------------------------------- + .ALIGN_COMMA_DOUBLE ("FALSE"), // + .ALIGN_COMMA_ENABLE (10'b1111111111), // PCIe + .ALIGN_COMMA_WORD ( 1), // + .ALIGN_MCOMMA_DET ("TRUE"), // + .ALIGN_MCOMMA_VALUE (10'b1010000011), // + .ALIGN_PCOMMA_DET ("TRUE"), // + .ALIGN_PCOMMA_VALUE (10'b0101111100), // + .DEC_MCOMMA_DETECT ("TRUE"), // + .DEC_PCOMMA_DETECT ("TRUE"), // + .DEC_VALID_COMMA_ONLY ("FALSE"), // PCIe + .SHOW_REALIGN_COMMA ("FALSE"), // PCIe + .RXSLIDE_AUTO_WAIT ( 7), // + .RXSLIDE_MODE ("PMA"), // PCIe + + //---------- Channel Bonding Attributes -------------------------------- + .CHAN_BOND_KEEP_ALIGN ("TRUE"), // PCIe + .CHAN_BOND_MAX_SKEW ( 7), // + .CHAN_BOND_SEQ_LEN ( 4), // PCIe + .CHAN_BOND_SEQ_1_ENABLE ( 4'b1111), // + .CHAN_BOND_SEQ_1_1 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_2 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_3 (10'b0001001010), // D10.2 (4A) - TS1 + .CHAN_BOND_SEQ_1_4 (10'b0110111100), // K28.5 (BC) - COM + .CHAN_BOND_SEQ_2_USE ("TRUE"), // PCIe + .CHAN_BOND_SEQ_2_ENABLE ( 4'b1111), // + .CHAN_BOND_SEQ_2_1 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_2 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_3 (10'b0001000101), // D5.2 (45) - TS2 + .CHAN_BOND_SEQ_2_4 (10'b0110111100), // K28.5 (BC) - COM + .FTS_DESKEW_SEQ_ENABLE ( 4'b1111), // + .FTS_LANE_DESKEW_EN ("TRUE"), // PCIe + .FTS_LANE_DESKEW_CFG ( 4'b1111), // + + //---------- Clock Correction Attributes ------------------------------- + .CBCC_DATA_SOURCE_SEL ("DECODED"), // + .CLK_CORRECT_USE ("TRUE"), // + .CLK_COR_KEEP_IDLE ("TRUE"), // PCIe + .CLK_COR_MAX_LAT (CLK_COR_MAX_LAT), // + .CLK_COR_MIN_LAT (CLK_COR_MIN_LAT), // + .CLK_COR_PRECEDENCE ("TRUE"), // + .CLK_COR_REPEAT_WAIT ( 0), // + .CLK_COR_SEQ_LEN ( 1), // + .CLK_COR_SEQ_1_ENABLE ( 4'b1111), // + .CLK_COR_SEQ_1_1 (10'b0100011100), // K28.0 (1C) - SKP + .CLK_COR_SEQ_1_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_1_4 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_ENABLE ( 4'b0000), // Disabled + .CLK_COR_SEQ_2_USE ("FALSE"), // + .CLK_COR_SEQ_2_1 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_2 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_3 (10'b0000000000), // Disabled + .CLK_COR_SEQ_2_4 (10'b0000000000), // Disabled + + //---------- 8b10b Attributes ------------------------------------------ + .RX_DISPERR_SEQ_MATCH ("TRUE"), // + + //---------- 64b/66b & 64b/67b Attributes ------------------------------ + .GEARBOX_MODE (3'd0), // + .TXGEARBOX_EN ("FALSE"), // + .RXGEARBOX_EN ("FALSE"), // + + //---------- PRBS & Loopback Attributes -------------------------------- + .RXPRBS_ERR_LOOPBACK (1'd0), // + .TX_LOOPBACK_DRIVE_HIZ ("FALSE"), // + + //---------- OOB & SATA Attributes ------------------------------------- + //.RXOOB_CFG ( 7'b0000110), // + //.SAS_MAX_COM (64), // + //.SAS_MIN_COM (36), // + //.SATA_BURST_SEQ_LEN ( 4'b1111), // + //.SATA_BURST_VAL ( 3'b100), // + //.SATA_CPLL_CFG ("VCO_3000MHZ"), // + //.SATA_EIDLE_VAL ( 3'b100), // + //.SATA_MAX_BURST ( 8), // + //.SATA_MAX_INIT (21), // + //.SATA_MAX_WAKE ( 7), // + //.SATA_MIN_BURST ( 4), // + //.SATA_MIN_INIT (12), // + //.SATA_MIN_WAKE ( 4), // + + //---------- MISC ------------------------------------------------------ + .DMONITOR_CFG (24'h000B01), // Optimized for debug + .RX_DEBUG_CFG (12'd0) // Optimized for GES + //.TST_RSV (32'd0), // + //.UCODEER_CLR ( 1'd0) // + + ) + gtxe2_channel_i + ( + + //---------- Clock ----------------------------------------------------- + .GTGREFCLK (1'd0), // + .GTREFCLK0 (GT_GTREFCLK0), // + .GTREFCLK1 (1'd0), // + .GTNORTHREFCLK0 (1'd0), // + .GTNORTHREFCLK1 (1'd0), // + .GTSOUTHREFCLK0 (1'd0), // + .GTSOUTHREFCLK1 (1'd0), // + .QPLLCLK (GT_QPLLCLK), // + .QPLLREFCLK (GT_QPLLREFCLK), // + .TXUSRCLK (GT_TXUSRCLK), // + .RXUSRCLK (GT_RXUSRCLK), // + .TXUSRCLK2 (GT_TXUSRCLK2), // + .RXUSRCLK2 (GT_RXUSRCLK2), // + .TXSYSCLKSEL (GT_TXSYSCLKSEL), // + .RXSYSCLKSEL (GT_RXSYSCLKSEL), // + .TXOUTCLKSEL (txoutclksel), // + .RXOUTCLKSEL (rxoutclksel), // + .CPLLREFCLKSEL (3'd1), // + .CPLLLOCKDETCLK (1'd0), // + .CPLLLOCKEN (1'd1), // + .CLKRSVD ({2'd0, dmonitorclk, GT_OOBCLK}), // Optimized for debug + + .TXOUTCLK (GT_TXOUTCLK), // + .RXOUTCLK (GT_RXOUTCLK), // + .TXOUTCLKFABRIC (), // + .RXOUTCLKFABRIC (), // + .TXOUTCLKPCS (), // + .RXOUTCLKPCS (), // + .CPLLLOCK (GT_CPLLLOCK), // + .CPLLREFCLKLOST (), // + .CPLLFBCLKLOST (), // + .RXCDRLOCK (GT_RXCDRLOCK), // + .GTREFCLKMONITOR (), // + + //---------- Reset ----------------------------------------------------- + .CPLLPD (cpllpd | GT_CPLLPD), // + .CPLLRESET (cpllrst | GT_CPLLRESET), // + .TXUSERRDY (GT_TXUSERRDY), // + .RXUSERRDY (GT_RXUSERRDY), // + .CFGRESET (1'd0), // + .GTRESETSEL (1'd0), // + .RESETOVRD (GT_RESETOVRD), // + .GTTXRESET (GT_GTTXRESET), // + .GTRXRESET (GT_GTRXRESET), // + + .TXRESETDONE (GT_TXRESETDONE), // + .RXRESETDONE (GT_RXRESETDONE), // + + //---------- TX Data --------------------------------------------------- + .TXDATA ({32'd0, GT_TXDATA}), // + .TXCHARISK ({ 4'd0, GT_TXDATAK}), // + + .GTXTXP (GT_TXP), // GTX + .GTXTXN (GT_TXN), // GTX + + //---------- RX Data --------------------------------------------------- + .GTXRXP (GT_RXP), // GTX + .GTXRXN (GT_RXN), // GTX + + .RXDATA (rxdata), // + .RXCHARISK (rxdatak), // + + //---------- Command --------------------------------------------------- + .TXDETECTRX (GT_TXDETECTRX), // + .TXPDELECIDLEMODE ( 1'd0), // + .RXELECIDLEMODE ( 2'd0), // + .TXELECIDLE (GT_TXELECIDLE), // + .TXCHARDISPMODE ({7'd0, GT_TXCOMPLIANCE}), // + .TXCHARDISPVAL ( 8'd0), // + .TXPOLARITY ( 1'b0), // + .RXPOLARITY (GT_RXPOLARITY), // + .TXPD (GT_TXPOWERDOWN), // + .RXPD (GT_RXPOWERDOWN), // + .TXRATE (GT_TXRATE), // + .RXRATE (GT_RXRATE), // + + //---------- Electrical Command ---------------------------------------- + .TXMARGIN (GT_TXMARGIN), // + .TXSWING (GT_TXSWING), // + .TXDEEMPH (GT_TXDEEMPH), // + .TXINHIBIT (GT_TXINHIBIT), // + .TXBUFDIFFCTRL (3'b100), // + .TXDIFFCTRL (4'b1100), // + .TXPRECURSOR (GT_TXPRECURSOR), // + .TXPRECURSORINV (1'd0), // + .TXMAINCURSOR (GT_TXMAINCURSOR), // + .TXPOSTCURSOR (GT_TXPOSTCURSOR), // + .TXPOSTCURSORINV (1'd0), // + + //---------- Status ---------------------------------------------------- + .RXVALID (GT_RXVALID), // + .PHYSTATUS (GT_PHYSTATUS), // + .RXELECIDLE (GT_RXELECIDLE), // + .RXSTATUS (GT_RXSTATUS), // + .TXRATEDONE (GT_TXRATEDONE), // + .RXRATEDONE (GT_RXRATEDONE), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (GT_DRPCLK), // + .DRPADDR (GT_DRPADDR), // + .DRPEN (GT_DRPEN), // + .DRPDI (GT_DRPDI), // + .DRPWE (GT_DRPWE), // + + .DRPDO (GT_DRPDO), // + .DRPRDY (GT_DRPRDY), // + + //---------- PMA ------------------------------------------------------- + .TXPMARESET (GT_TXPMARESET), // + .RXPMARESET (GT_RXPMARESET), // + .RXLPMEN (rxlpmen), // + .RXLPMHFHOLD ( 1'd0), // + .RXLPMHFOVRDEN ( 1'd0), // + .RXLPMLFHOLD ( 1'd0), // + .RXLPMLFKLOVRDEN ( 1'd0), // + .TXQPIBIASEN ( 1'd0), // + .TXQPISTRONGPDOWN ( 1'd0), // + .TXQPIWEAKPUP ( 1'd0), // + .RXQPIEN ( 1'd0), // + .PMARSVDIN ( 5'd0), // + .PMARSVDIN2 ( 5'd0), // GTX + .GTRSVD (16'd0), // + + .TXQPISENP (), // + .TXQPISENN (), // + .RXQPISENP (), // + .RXQPISENN (), // + .DMONITOROUT (dmonitorout[7:0]), // GTX 8-bits + + //---------- PCS ------------------------------------------------------- + .TXPCSRESET (GT_TXPCSRESET), // + .RXPCSRESET (GT_RXPCSRESET), // + .PCSRSVDIN (16'd0), // [0]: 1 = TXRATE async, [1]: 1 = RXRATE async + .PCSRSVDIN2 ( 5'd0), // + + .PCSRSVDOUT (), // + //---------- CDR ------------------------------------------------------- + .RXCDRRESET (GT_RXCDRRESET), // + .RXCDRRESETRSV (1'd0), // + .RXCDRFREQRESET (GT_RXCDRFREQRESET), // + .RXCDRHOLD (1'b0), // + .RXCDROVRDEN (1'd0), // + + //---------- DFE ------------------------------------------------------- + .RXDFELPMRESET (GT_RXDFELPMRESET), // + .RXDFECM1EN (1'd0), // + .RXDFEVSEN (1'd0), // + .RXDFETAP2HOLD (1'd0), // + .RXDFETAP2OVRDEN (1'd0), // + .RXDFETAP3HOLD (1'd0), // + .RXDFETAP3OVRDEN (1'd0), // + .RXDFETAP4HOLD (1'd0), // + .RXDFETAP4OVRDEN (1'd0), // + .RXDFETAP5HOLD (1'd0), // + .RXDFETAP5OVRDEN (1'd0), // + .RXDFEAGCHOLD (GT_RX_CONVERGE), // Optimized for GES, Set to 1 after convergence + .RXDFEAGCOVRDEN (1'd0), // + .RXDFELFHOLD (1'd0), // + .RXDFELFOVRDEN (1'd1), // Optimized for GES + .RXDFEUTHOLD (1'd0), // + .RXDFEUTOVRDEN (1'd0), // + .RXDFEVPHOLD (1'd0), // + .RXDFEVPOVRDEN (1'd0), // + .RXDFEXYDEN (1'd0), // + .RXDFEXYDHOLD (1'd0), // GTX + .RXDFEXYDOVRDEN (1'd0), // GTX + .RXMONITORSEL (2'd0), // + + .RXMONITOROUT (), // + + //---------- OS -------------------------------------------------------- + .RXOSHOLD (1'd0), // + .RXOSOVRDEN (1'd0), // + + //---------- Eye Scan -------------------------------------------------- + .EYESCANRESET (GT_EYESCANRESET), // + .EYESCANMODE (1'd0), // + .EYESCANTRIGGER (1'b0), // + + .EYESCANDATAERROR (GT_EYESCANDATAERROR), // + + //---------- TX Buffer ------------------------------------------------- + .TXBUFSTATUS (), // + + //---------- RX Buffer ------------------------------------------------- + .RXBUFRESET (GT_RXBUFRESET), // + + .RXBUFSTATUS (GT_RXBUFSTATUS), // + + //---------- TX Sync --------------------------------------------------- + .TXPHDLYRESET (1'd0), // + .TXPHDLYTSTCLK (1'd0), // + .TXPHALIGN (GT_TXPHALIGN), // + .TXPHALIGNEN (GT_TXPHALIGNEN), // + .TXPHDLYPD (1'd0), // + .TXPHINIT (GT_TXPHINIT), // + .TXPHOVRDEN (1'd0), // + .TXDLYBYPASS (GT_TXDLYBYPASS), // + .TXDLYSRESET (GT_TXDLYSRESET), // + .TXDLYEN (GT_TXDLYEN), // + .TXDLYOVRDEN (1'd0), // + .TXDLYHOLD (1'd0), // + .TXDLYUPDOWN (1'd0), // + + .TXPHALIGNDONE (GT_TXPHALIGNDONE), // + .TXPHINITDONE (GT_TXPHINITDONE), // + .TXDLYSRESETDONE (GT_TXDLYSRESETDONE), // + + //---------- RX Sync --------------------------------------------------- + .RXPHDLYRESET (1'd0), // + .RXPHALIGN (GT_RXPHALIGN), // + .RXPHALIGNEN (GT_RXPHALIGNEN), // + .RXPHDLYPD (1'd0), // + .RXPHOVRDEN (1'd0), // + .RXDLYBYPASS (GT_RXDLYBYPASS), // + .RXDLYSRESET (GT_RXDLYSRESET), // + .RXDLYEN (GT_RXDLYEN), // + .RXDLYOVRDEN (1'd0), // + .RXDDIEN (GT_RXDDIEN), // + + .RXPHALIGNDONE (GT_RXPHALIGNDONE), // + .RXPHMONITOR (), // + .RXPHSLIPMONITOR (), // + .RXDLYSRESETDONE (GT_RXDLYSRESETDONE), // + + //---------- Comma Alignment ------------------------------------------- + .RXCOMMADETEN ( 1'd1), // + .RXMCOMMAALIGNEN (!GT_GEN3), // 0 = disable comma alignment in Gen3 + .RXPCOMMAALIGNEN (!GT_GEN3), // 0 = disable comma alignment in Gen3 + .RXSLIDE ( GT_RXSLIDE), // + + .RXCOMMADET (GT_RXCOMMADET), // + .RXCHARISCOMMA (rxchariscomma), // + .RXBYTEISALIGNED (GT_RXBYTEISALIGNED), // + .RXBYTEREALIGN (GT_RXBYTEREALIGN), // + + //---------- Channel Bonding ------------------------------------------- + .RXCHBONDEN (GT_RXCHBONDEN), // + .RXCHBONDI (GT_RXCHBONDI), // + .RXCHBONDLEVEL (GT_RXCHBONDLEVEL), // + .RXCHBONDMASTER (GT_RXCHBONDMASTER), // + .RXCHBONDSLAVE (GT_RXCHBONDSLAVE), // + + .RXCHANBONDSEQ (), // + .RXCHANISALIGNED (GT_RXCHANISALIGNED), // + .RXCHANREALIGN (), // + .RXCHBONDO (GT_RXCHBONDO), // + + //---------- Clock Correction ----------------------------------------- + .RXCLKCORCNT (), // + + //---------- 8b10b ----------------------------------------------------- + .TX8B10BBYPASS (8'd0), // + .TX8B10BEN (!GT_GEN3), // 0 = disable TX 8b10b in Gen3 + .RX8B10BEN (!GT_GEN3), // 0 = disable RX 8b10b in Gen3 + + .RXDISPERR (GT_RXDISPERR), // + .RXNOTINTABLE (GT_RXNOTINTABLE), // + + //---------- 64b/66b & 64b/67b ----------------------------------------- + .TXHEADER (3'd0), // + .TXSEQUENCE (7'd0), // + .TXSTARTSEQ (1'd0), // + .RXGEARBOXSLIP (1'd0), // + + .TXGEARBOXREADY (), // + .RXDATAVALID (), // + .RXHEADER (), // + .RXHEADERVALID (), // + .RXSTARTOFSEQ (), // + + //---------- PRBS/Loopback --------------------------------------------- + .TXPRBSSEL (GT_TXPRBSSEL), // + .RXPRBSSEL (GT_RXPRBSSEL), // + .TXPRBSFORCEERR (GT_TXPRBSFORCEERR), // + .RXPRBSCNTRESET (GT_RXPRBSCNTRESET), // + .LOOPBACK (GT_LOOPBACK), // + + .RXPRBSERR (GT_RXPRBSERR), // + + //---------- OOB ------------------------------------------------------- + .TXCOMINIT (1'd0), // + .TXCOMSAS (1'd0), // + .TXCOMWAKE (1'd0), // + .RXOOBRESET (1'd0), // + + .TXCOMFINISH (), // + .RXCOMINITDET (), // + .RXCOMSASDET (), // + .RXCOMWAKEDET (), // + + //---------- MISC ------------------------------------------------------ + .SETERRSTATUS ( 1'd0), // + .TXDIFFPD ( 1'd0), // + .TXPISOPD ( 1'd0), // + .TSTIN (20'hFFFFF), // + + .TSTOUT () // GTX + + ); + + //---------- Default ------------------------------------------------------- + assign dmonitorout[14:8] = 7'd0; // GTH GTP + assign GT_TXSYNCOUT = 1'd0; // GTH GTP + assign GT_TXSYNCDONE = 1'd0; // GTH GTP + assign GT_RXSYNCOUT = 1'd0; // GTH GTP + assign GT_RXSYNCDONE = 1'd0; // GTH GTP + assign GT_RXPMARESETDONE = 1'd0; // GTH GTP + + end + +endgenerate + +//---------- GT Wrapper Outputs ------------------------------------------------ +assign GT_RXDATA = rxdata [31:0]; +assign GT_RXDATAK = rxdatak[ 3:0]; +assign GT_RXCHARISCOMMA = rxchariscomma[ 3:0]; +assign GT_DMONITOROUT = dmonitorout; + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_cpllpd_ovrd.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_cpllpd_ovrd.v new file mode 100644 index 0000000000000000000000000000000000000000..e3ac2595fee503f6ddff30e8c2d4ed9b51a79dd8 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_cpllpd_ovrd.v @@ -0,0 +1,69 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gtp_cpllpd_ovrd.v +// Version : 3.3 +`timescale 1ns / 1ps +module pcie_7x_0_gtp_cpllpd_ovrd ( + input i_ibufds_gte2, + output o_cpllpd_ovrd, + output o_cpllreset_ovrd + ); + (* equivalent_register_removal="no" *) reg [95:0] cpllpd_wait = 96'hFFFFFFFFFFFFFFFFFFFFFFFF; + (* equivalent_register_removal="no" *) reg [127:0] cpllreset_wait = 128'h000000000000000000000000000000FF; + always @(posedge i_ibufds_gte2) + begin + cpllpd_wait <= {cpllpd_wait[94:0], 1'b0}; + cpllreset_wait <= {cpllreset_wait[126:0], 1'b0}; + end + assign o_cpllpd_ovrd = cpllpd_wait[95]; + assign o_cpllreset_ovrd = cpllreset_wait[127]; +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_pipe_drp.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_pipe_drp.v new file mode 100644 index 0000000000000000000000000000000000000000..377c00976912f4f3b2f22467486c2ce08a4a4311 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_pipe_drp.v @@ -0,0 +1,371 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gtp_pipe_drp.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : gtp_pipe_drp.v +// Description : GTP PIPE DRP Module for 7 Series Transceiver +// Version : 19.0 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- GTP PIPE DRP Module ----------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gtp_pipe_drp # +( + + parameter LOAD_CNT_MAX = 2'd1, // Load max count + parameter INDEX_MAX = 1'd0 // Index max count + +) + +( + + //---------- Input ------------------------------------- + input DRP_CLK, + input DRP_RST_N, + input DRP_X16, + input DRP_START, + input [15:0] DRP_DO, + input DRP_RDY, + + //---------- Output ------------------------------------ + output [ 8:0] DRP_ADDR, + output DRP_EN, + output [15:0] DRP_DI, + output DRP_WE, + output DRP_DONE, + output [ 2:0] DRP_FSM + +); + + //---------- Input Registers --------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg x16_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg start_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [15:0] do_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rdy_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg x16_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg start_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [15:0] do_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rdy_reg2; + + //---------- Internal Signals -------------------------- + reg [ 1:0] load_cnt = 2'd0; + reg [ 4:0] index = 5'd0; + reg [ 8:0] addr_reg = 9'd0; + reg [15:0] di_reg = 16'd0; + + //---------- Output Registers -------------------------- + reg done = 1'd0; + reg [ 2:0] fsm = 0; + + //---------- DRP Address ------------------------------- + localparam ADDR_RX_DATAWIDTH = 9'h011; + + //---------- DRP Mask ---------------------------------- + localparam MASK_RX_DATAWIDTH = 16'b1111011111111111; // Unmask bit [ 11] + + //---------- DRP Data for x16 -------------------------- + localparam X16_RX_DATAWIDTH = 16'b0000000000000000; // 2-byte (16-bit) internal data width + + //---------- DRP Data for x20 -------------------------- + localparam X20_RX_DATAWIDTH = 16'b0000100000000000; // 2-byte (20-bit) internal data width + + //---------- DRP Data ---------------------------------- + wire [15:0] data_rx_datawidth; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 0; + localparam FSM_LOAD = 1; + localparam FSM_READ = 2; + localparam FSM_RRDY = 3; + localparam FSM_WRITE = 4; + localparam FSM_WRDY = 5; + localparam FSM_DONE = 6; + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + //---------- 1st Stage FF -------------------------- + x16_reg1 <= 1'd0; + do_reg1 <= 16'd0; + rdy_reg1 <= 1'd0; + start_reg1 <= 1'd0; + //---------- 2nd Stage FF -------------------------- + x16_reg2 <= 1'd0; + do_reg2 <= 16'd0; + rdy_reg2 <= 1'd0; + start_reg2 <= 1'd0; + end + + else + begin + //---------- 1st Stage FF -------------------------- + x16_reg1 <= DRP_X16; + do_reg1 <= DRP_DO; + rdy_reg1 <= DRP_RDY; + start_reg1 <= DRP_START; + //---------- 2nd Stage FF -------------------------- + x16_reg2 <= x16_reg1; + do_reg2 <= do_reg1; + rdy_reg2 <= rdy_reg1; + start_reg2 <= start_reg1; + end + +end + + + +//---------- Select DRP Data --------------------------------------------------- +assign data_rx_datawidth = x16_reg2 ? X16_RX_DATAWIDTH : X20_RX_DATAWIDTH; + + + +//---------- Load Counter ------------------------------------------------------ +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + load_cnt <= 2'd0; + else + + //---------- Increment Load Counter ---------------- + if ((fsm == FSM_LOAD) && (load_cnt < LOAD_CNT_MAX)) + load_cnt <= load_cnt + 2'd1; + + //---------- Hold Load Counter --------------------- + else if ((fsm == FSM_LOAD) && (load_cnt == LOAD_CNT_MAX)) + load_cnt <= load_cnt; + + //---------- Reset Load Counter -------------------- + else + load_cnt <= 2'd0; + +end + + + +//---------- Update DRP Address and Data --------------------------------------- +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + addr_reg <= 9'd0; + di_reg <= 16'd0; + end + else + begin + + case (index) + + //-------------------------------------------------- + 1'd0 : + begin + addr_reg <= ADDR_RX_DATAWIDTH; + di_reg <= (do_reg2 & MASK_RX_DATAWIDTH) | data_rx_datawidth; + end + + //-------------------------------------------------- + default : + begin + addr_reg <= 9'd0; + di_reg <= 16'd0; + end + + endcase + + end + +end + + + +//---------- PIPE DRP FSM ------------------------------------------------------ +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + fsm <= FSM_IDLE; + index <= 5'd0; + done <= 1'd1; //Fix applied for GTP DRP issue + end + else + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + //---------- Reset or Rate Change -------------- + if (start_reg2) + begin + fsm <= FSM_LOAD; + index <= 5'd0; + done <= 1'd0; + end + //---------- Idle ------------------------------ + else + begin + fsm <= FSM_IDLE; + index <= 5'd0; + done <= 1'd1; + end + end + + //---------- Load DRP Address --------------------- + FSM_LOAD : + + begin + fsm <= (load_cnt == LOAD_CNT_MAX) ? FSM_READ : FSM_LOAD; + index <= index; + + done <= 1'd0; + end + + //---------- Read DRP ------------------------------ + FSM_READ : + + begin + fsm <= FSM_RRDY; + index <= index; + done <= 1'd0; + end + + //---------- Read DRP Ready ------------------------ + FSM_RRDY : + + begin + fsm <= rdy_reg2 ? FSM_WRITE : FSM_RRDY; + index <= index; + done <= 1'd0; + end + + + //---------- Write DRP ----------------------------- + FSM_WRITE : + + begin + fsm <= FSM_WRDY; + index <= index; + done <= 1'd0; + end + + //---------- Write DRP Ready ----------------------- + FSM_WRDY : + + begin + fsm <= rdy_reg2 ? FSM_DONE : FSM_WRDY; + index <= index; + done <= 1'd0; + end + + //---------- DRP Done ------------------------------ + FSM_DONE : + + begin + if (index == INDEX_MAX) + begin + fsm <= FSM_IDLE; + index <= 5'd0; + done <= 1'd1; //Fix applied for GTP DRP issue + end + else + begin + fsm <= FSM_LOAD; + index <= index + 5'd1; + done <= 1'd0; + end + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_IDLE; + index <= 5'd0; + done <= 1'd1; //Fix applied for GTP DRP issue + end + + endcase + + end + +end + + + +//---------- PIPE DRP Output --------------------------------------------------- +assign DRP_ADDR = addr_reg; +assign DRP_EN = (fsm == FSM_READ) || (fsm == FSM_WRITE); +assign DRP_DI = di_reg; +assign DRP_WE = (fsm == FSM_WRITE); +assign DRP_DONE = done; +assign DRP_FSM = fsm; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_pipe_rate.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_pipe_rate.v new file mode 100644 index 0000000000000000000000000000000000000000..7a605de8a33dfe605048236cb8bef1772c49a10b --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_pipe_rate.v @@ -0,0 +1,462 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gtp_pipe_rate.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : gtp_pipe_rate.v +// Description : PIPE Rate Module for 7 Series Transceiver +// Version : 19.0 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- PIPE Rate Module -------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gtp_pipe_rate # +( + + parameter PCIE_SIM_SPEEDUP = "FALSE", // PCIe sim mode + parameter TXDATA_WAIT_MAX = 4'd15 // TXDATA wait max + +) + +( + + //---------- Input ------------------------------------- + input RATE_CLK, + input RATE_RST_N, + input [ 1:0] RATE_RATE_IN, + input RATE_DRP_DONE, + input RATE_RXPMARESETDONE, + input RATE_TXRATEDONE, + input RATE_RXRATEDONE, + input RATE_TXSYNC_DONE, + input RATE_PHYSTATUS, + + //---------- Output ------------------------------------ + output RATE_PCLK_SEL, + output RATE_DRP_START, + output RATE_DRP_X16, + output [ 2:0] RATE_RATE_OUT, + output RATE_TXSYNC_START, + output RATE_DONE, + output RATE_IDLE, + output [ 4:0] RATE_FSM + +); + + //---------- Input FF or Buffer ------------------------ +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 1:0] rate_in_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg drp_done_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rxpmaresetdone_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg txratedone_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rxratedone_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg phystatus_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg txsync_done_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 1:0] rate_in_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg drp_done_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rxpmaresetdone_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg txratedone_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rxratedone_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg phystatus_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg txsync_done_reg2; + + //---------- Internal Signals -------------------------- + wire [ 2:0] rate; + reg [ 3:0] txdata_wait_cnt = 4'd0; + reg txratedone = 1'd0; + reg rxratedone = 1'd0; + reg phystatus = 1'd0; + reg ratedone = 1'd0; + + //---------- Output FF or Buffer ----------------------- + reg pclk_sel = 1'd0; + reg [ 2:0] rate_out = 3'd0; + reg [ 3:0] fsm = 0; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 0; + localparam FSM_TXDATA_WAIT = 1; + localparam FSM_PCLK_SEL = 2; + localparam FSM_DRP_X16_START = 3; + localparam FSM_DRP_X16_DONE = 4; + localparam FSM_RATE_SEL = 5; + localparam FSM_RXPMARESETDONE = 6; + localparam FSM_DRP_X20_START = 7; + localparam FSM_DRP_X20_DONE = 8; + localparam FSM_RATE_DONE = 9; + localparam FSM_TXSYNC_START = 10; + localparam FSM_TXSYNC_DONE = 11; + localparam FSM_DONE = 12; // Must sync value to pipe_user.v + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge RATE_CLK) +begin + + if (!RATE_RST_N) + begin + //---------- 1st Stage FF -------------------------- + rate_in_reg1 <= 2'd0; + drp_done_reg1 <= 1'd0; + rxpmaresetdone_reg1 <= 1'd0; + txratedone_reg1 <= 1'd0; + rxratedone_reg1 <= 1'd0; + phystatus_reg1 <= 1'd0; + txsync_done_reg1 <= 1'd0; + //---------- 2nd Stage FF -------------------------- + rate_in_reg2 <= 2'd0; + drp_done_reg2 <= 1'd0; + rxpmaresetdone_reg2 <= 1'd0; + txratedone_reg2 <= 1'd0; + rxratedone_reg2 <= 1'd0; + phystatus_reg2 <= 1'd0; + txsync_done_reg2 <= 1'd0; + end + else + begin + //---------- 1st Stage FF -------------------------- + rate_in_reg1 <= RATE_RATE_IN; + drp_done_reg1 <= RATE_DRP_DONE; + rxpmaresetdone_reg1 <= RATE_RXPMARESETDONE; + txratedone_reg1 <= RATE_TXRATEDONE; + rxratedone_reg1 <= RATE_RXRATEDONE; + phystatus_reg1 <= RATE_PHYSTATUS; + txsync_done_reg1 <= RATE_TXSYNC_DONE; + //---------- 2nd Stage FF -------------------------- + rate_in_reg2 <= rate_in_reg1; + drp_done_reg2 <= drp_done_reg1; + rxpmaresetdone_reg2 <= rxpmaresetdone_reg1; + txratedone_reg2 <= txratedone_reg1; + rxratedone_reg2 <= rxratedone_reg1; + phystatus_reg2 <= phystatus_reg1; + txsync_done_reg2 <= txsync_done_reg1; + end + +end + + + +//---------- Select Rate ------------------------------------------------------- +// Gen1 : div 2 using [TX/RX]OUT_DIV = 2 +// Gen2 : div 1 using [TX/RX]RATE = 3'd1 +//------------------------------------------------------------------------------ +assign rate = (rate_in_reg2 == 2'd1) ? 3'd1 : 3'd0; + + + +//---------- TXDATA Wait Counter ----------------------------------------------- +always @ (posedge RATE_CLK) +begin + + if (!RATE_RST_N) + txdata_wait_cnt <= 4'd0; + else + + //---------- Increment Wait Counter ---------------- + if ((fsm == FSM_TXDATA_WAIT) && (txdata_wait_cnt < TXDATA_WAIT_MAX)) + txdata_wait_cnt <= txdata_wait_cnt + 4'd1; + + //---------- Hold Wait Counter --------------------- + else if ((fsm == FSM_TXDATA_WAIT) && (txdata_wait_cnt == TXDATA_WAIT_MAX)) + txdata_wait_cnt <= txdata_wait_cnt; + + //---------- Reset Wait Counter -------------------- + else + txdata_wait_cnt <= 4'd0; + +end + + + +//---------- Latch TXRATEDONE, RXRATEDONE, and PHYSTATUS ----------------------- +always @ (posedge RATE_CLK) +begin + + if (!RATE_RST_N) + begin + txratedone <= 1'd0; + rxratedone <= 1'd0; + phystatus <= 1'd0; + ratedone <= 1'd0; + end + else + begin + + if ((fsm == FSM_RATE_DONE) || (fsm == FSM_RXPMARESETDONE) || (fsm == FSM_DRP_X20_START) || (fsm == FSM_DRP_X20_DONE)) + + begin + + //---------- Latch TXRATEDONE ------------------ + if (txratedone_reg2) + txratedone <= 1'd1; + else + txratedone <= txratedone; + + //---------- Latch RXRATEDONE ------------------ + if (rxratedone_reg2) + rxratedone <= 1'd1; + else + rxratedone <= rxratedone; + + //---------- Latch PHYSTATUS ------------------- + if (phystatus_reg2) + phystatus <= 1'd1; + else + phystatus <= phystatus; + + //---------- Latch Rate Done ------------------- + if (rxratedone && txratedone && phystatus) + ratedone <= 1'd1; + else + ratedone <= ratedone; + + end + + else + + begin + txratedone <= 1'd0; + rxratedone <= 1'd0; + phystatus <= 1'd0; + ratedone <= 1'd0; + end + + end + +end + + + +//---------- PIPE Rate FSM ----------------------------------------------------- +always @ (posedge RATE_CLK) +begin + + if (!RATE_RST_N) + begin + fsm <= FSM_IDLE; + pclk_sel <= 1'd0; + rate_out <= 3'd0; + end + else + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + //---------- Detect Rate Change ---------------- + if (rate_in_reg2 != rate_in_reg1) + begin + fsm <= FSM_TXDATA_WAIT; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + else + begin + fsm <= FSM_IDLE; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + end + + //---------- Wait for TXDATA to TX[P/N] Latency ---- + FSM_TXDATA_WAIT : + + begin + fsm <= (txdata_wait_cnt == TXDATA_WAIT_MAX) ? FSM_PCLK_SEL : FSM_TXDATA_WAIT; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Select PCLK Frequency ----------------- + // Gen1 : PCLK = 125 MHz + // Gen2 : PCLK = 250 MHz + //-------------------------------------------------- + FSM_PCLK_SEL : + + begin + fsm <= (PCIE_SIM_SPEEDUP == "TRUE") ? FSM_RATE_SEL : FSM_DRP_X16_START; + pclk_sel <= (rate_in_reg2 == 2'd1); + rate_out <= rate_out; + end + + //---------- Start DRP x16 ------------------------- + FSM_DRP_X16_START : + + begin + fsm <= (!drp_done_reg2) ? FSM_DRP_X16_DONE : FSM_DRP_X16_START; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Wait for DRP x16 Done ----------------- + FSM_DRP_X16_DONE : + + begin + fsm <= drp_done_reg2 ? FSM_RATE_SEL : FSM_DRP_X16_DONE; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Select Rate --------------------------- + FSM_RATE_SEL : + + begin + fsm <= (PCIE_SIM_SPEEDUP == "TRUE") ? FSM_RATE_DONE : FSM_RXPMARESETDONE; + pclk_sel <= pclk_sel; + rate_out <= rate; // Update [TX/RX]RATE + end + + //---------- Wait for RXPMARESETDONE De-assertion -- + FSM_RXPMARESETDONE : + + begin + fsm <= (!rxpmaresetdone_reg2) ? FSM_DRP_X20_START : FSM_RXPMARESETDONE; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Start DRP x20 ------------------------- + FSM_DRP_X20_START : + + begin + fsm <= (!drp_done_reg2) ? FSM_DRP_X20_DONE : FSM_DRP_X20_START; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Wait for DRP x20 Done ----------------- + FSM_DRP_X20_DONE : + + begin + fsm <= drp_done_reg2 ? FSM_RATE_DONE : FSM_DRP_X20_DONE; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Wait for Rate Change Done ------------- + FSM_RATE_DONE : + + begin + if (ratedone) + fsm <= FSM_TXSYNC_START; + else + fsm <= FSM_RATE_DONE; + + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Start TX Sync ------------------------- + FSM_TXSYNC_START: + + begin + fsm <= (!txsync_done_reg2 ? FSM_TXSYNC_DONE : FSM_TXSYNC_START); + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Wait for TX Sync Done ----------------- + FSM_TXSYNC_DONE: + + begin + fsm <= (txsync_done_reg2 ? FSM_DONE : FSM_TXSYNC_DONE); + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Rate Change Done ---------------------- + FSM_DONE : + + begin + fsm <= FSM_IDLE; + pclk_sel <= pclk_sel; + rate_out <= rate_out; + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_IDLE; + pclk_sel <= 1'd0; + rate_out <= 3'd0; + end + + endcase + + end + +end + + + +//---------- PIPE Rate Output -------------------------------------------------- +assign RATE_PCLK_SEL = pclk_sel; +assign RATE_DRP_START = (fsm == FSM_DRP_X16_START) || (fsm == FSM_DRP_X20_START); +assign RATE_DRP_X16 = (fsm == FSM_DRP_X16_START) || (fsm == FSM_DRP_X16_DONE); +assign RATE_RATE_OUT = rate_out; +assign RATE_TXSYNC_START = (fsm == FSM_TXSYNC_START); +assign RATE_DONE = (fsm == FSM_DONE); +assign RATE_IDLE = (fsm == FSM_IDLE); +assign RATE_FSM = {1'd0, fsm}; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_pipe_reset.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_pipe_reset.v new file mode 100644 index 0000000000000000000000000000000000000000..6fbec6109690c150b69b5f98f9348b21ac7ed135 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtp_pipe_reset.v @@ -0,0 +1,538 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gtp_pipe_reset.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : gtp_pipe_reset.v +// Description : GTP PIPE Reset Module for 7 Series Transceiver +// Version : 19.0 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- PIPE Reset Module ------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_gtp_pipe_reset # +( + + //---------- Global ------------------------------------ + parameter PCIE_SIM_SPEEDUP = "FALSE", // PCIe sim speedup + parameter PCIE_LANE = 1, // PCIe number of lanes + //---------- Local ------------------------------------- + parameter CFG_WAIT_MAX = 6'd63, // Configuration wait max + parameter BYPASS_RXCDRLOCK = 1 // Bypass RXCDRLOCK + +) + +( + + //---------- Input ------------------------------------- + input RST_CLK, + input RST_RXUSRCLK, + input RST_DCLK, + input RST_RST_N, + input [PCIE_LANE-1:0] RST_DRP_DONE, + input [PCIE_LANE-1:0] RST_RXPMARESETDONE, + input RST_PLLLOCK, + input [PCIE_LANE-1:0] RST_RATE_IDLE, + input [PCIE_LANE-1:0] RST_RXCDRLOCK, + input RST_MMCM_LOCK, + input [PCIE_LANE-1:0] RST_RESETDONE, + input [PCIE_LANE-1:0] RST_PHYSTATUS, + input [PCIE_LANE-1:0] RST_TXSYNC_DONE, + + //---------- Output ------------------------------------ + output RST_CPLLRESET, + output RST_CPLLPD, + output reg RST_DRP_START, + output reg RST_DRP_X16, + output RST_RXUSRCLK_RESET, + output RST_DCLK_RESET, + output RST_GTRESET, + output RST_USERRDY, + output RST_TXSYNC_START, + output RST_IDLE, + output [ 4:0] RST_FSM + +); + + //---------- Input Register ---------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] drp_done_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rxpmaresetdone_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg plllock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rate_idle_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rxcdrlock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg mmcm_lock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] resetdone_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] phystatus_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] txsync_done_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] drp_done_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rxpmaresetdone_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg plllock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rate_idle_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] rxcdrlock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg mmcm_lock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] resetdone_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] phystatus_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] txsync_done_reg2; + + //---------- Internal Signal --------------------------- + reg [ 5:0] cfg_wait_cnt = 6'd0; + + //---------- Output Register --------------------------- + reg pllreset = 1'd0; + reg pllpd = 1'd0; + reg rxusrclk_rst_reg1 = 1'd0; + reg rxusrclk_rst_reg2 = 1'd0; + reg dclk_rst_reg1 = 1'd0; + reg dclk_rst_reg2 = 1'd0; + reg gtreset = 1'd0; + reg userrdy = 1'd0; + reg [ 4:0] fsm = 5'h1; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 5'h0; + localparam FSM_CFG_WAIT = 5'h1; + localparam FSM_PLLRESET = 5'h2; + localparam FSM_DRP_X16_START = 5'h3; + localparam FSM_DRP_X16_DONE = 5'h4; + localparam FSM_PLLLOCK = 5'h5; + localparam FSM_GTRESET = 5'h6; + localparam FSM_RXPMARESETDONE_1 = 5'h7; + localparam FSM_RXPMARESETDONE_2 = 5'h8; + localparam FSM_DRP_X20_START = 5'h9; + localparam FSM_DRP_X20_DONE = 5'hA; + localparam FSM_MMCM_LOCK = 5'hB; + localparam FSM_RESETDONE = 5'hC; + localparam FSM_TXSYNC_START = 5'hD; + localparam FSM_TXSYNC_DONE = 5'hE; + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge RST_CLK) +begin + + if (!RST_RST_N) + begin + //---------- 1st Stage FF -------------------------- + drp_done_reg1 <= {PCIE_LANE{1'd0}}; + rxpmaresetdone_reg1 <= {PCIE_LANE{1'd0}}; + plllock_reg1 <= 1'd0; + rate_idle_reg1 <= {PCIE_LANE{1'd0}}; + rxcdrlock_reg1 <= {PCIE_LANE{1'd0}}; + mmcm_lock_reg1 <= 1'd0; + resetdone_reg1 <= {PCIE_LANE{1'd0}}; + phystatus_reg1 <= {PCIE_LANE{1'd0}}; + txsync_done_reg1 <= {PCIE_LANE{1'd0}}; + //---------- 2nd Stage FF -------------------------- + drp_done_reg2 <= {PCIE_LANE{1'd0}}; + rxpmaresetdone_reg2 <= {PCIE_LANE{1'd0}}; + plllock_reg2 <= 1'd0; + rate_idle_reg2 <= {PCIE_LANE{1'd0}}; + rxcdrlock_reg2 <= {PCIE_LANE{1'd0}}; + mmcm_lock_reg2 <= 1'd0; + resetdone_reg2 <= {PCIE_LANE{1'd0}}; + phystatus_reg2 <= {PCIE_LANE{1'd0}}; + txsync_done_reg2 <= {PCIE_LANE{1'd0}}; + end + else + begin + //---------- 1st Stage FF -------------------------- + drp_done_reg1 <= RST_DRP_DONE; + rxpmaresetdone_reg1 <= RST_RXPMARESETDONE; + plllock_reg1 <= RST_PLLLOCK; + rate_idle_reg1 <= RST_RATE_IDLE; + rxcdrlock_reg1 <= RST_RXCDRLOCK; + mmcm_lock_reg1 <= RST_MMCM_LOCK; + resetdone_reg1 <= RST_RESETDONE; + phystatus_reg1 <= RST_PHYSTATUS; + txsync_done_reg1 <= RST_TXSYNC_DONE; + //---------- 2nd Stage FF -------------------------- + drp_done_reg2 <= drp_done_reg1; + rxpmaresetdone_reg2 <= rxpmaresetdone_reg1; + plllock_reg2 <= plllock_reg1; + rate_idle_reg2 <= rate_idle_reg1; + rxcdrlock_reg2 <= rxcdrlock_reg1; + mmcm_lock_reg2 <= mmcm_lock_reg1; + resetdone_reg2 <= resetdone_reg1; + phystatus_reg2 <= phystatus_reg1; + txsync_done_reg2 <= txsync_done_reg1; + end + +end + + + +//---------- Configuration Reset Wait Counter ---------------------------------- +always @ (posedge RST_CLK) +begin + + if (!RST_RST_N) + cfg_wait_cnt <= 6'd0; + else + + //---------- Increment Configuration Reset Wait Counter + if ((fsm == FSM_CFG_WAIT) && (cfg_wait_cnt < CFG_WAIT_MAX)) + cfg_wait_cnt <= cfg_wait_cnt + 6'd1; + + //---------- Hold Configuration Reset Wait Counter - + else if ((fsm == FSM_CFG_WAIT) && (cfg_wait_cnt == CFG_WAIT_MAX)) + cfg_wait_cnt <= cfg_wait_cnt; + + //---------- Reset Configuration Reset Wait Counter + else + cfg_wait_cnt <= 6'd0; + +end + + + +//---------- PIPE Reset FSM ---------------------------------------------------- +always @ (posedge RST_CLK) +begin + + if (!RST_RST_N) + begin + fsm <= FSM_CFG_WAIT; + pllreset <= 1'd0; + pllpd <= 1'd0; + gtreset <= 1'd0; + userrdy <= 1'd0; + end + else + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + if (!RST_RST_N) + begin + fsm <= FSM_CFG_WAIT; + pllreset <= 1'd0; + pllpd <= 1'd0; + gtreset <= 1'd0; + userrdy <= 1'd0; + end + else + begin + fsm <= FSM_IDLE; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + end + + //---------- Wait for Configuration Reset Delay --- + FSM_CFG_WAIT : + + begin + fsm <= ((cfg_wait_cnt == CFG_WAIT_MAX) ? FSM_PLLRESET : FSM_CFG_WAIT); + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Hold PLL and GTP Channel in Reset ---- + FSM_PLLRESET : + + begin + fsm <= (((~plllock_reg2) && (&(~resetdone_reg2))) ? FSM_DRP_X16_START : FSM_PLLRESET); + pllreset <= 1'd1; + pllpd <= pllpd; + gtreset <= 1'd1; + userrdy <= userrdy; + end + + //---------- Start DRP x16 ------------------------- + FSM_DRP_X16_START : + + begin + fsm <= &(~drp_done_reg2) ? FSM_DRP_X16_DONE : FSM_DRP_X16_START; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for DRP x16 Done ----------------- + FSM_DRP_X16_DONE : + + begin + fsm <= (&drp_done_reg2) ? FSM_PLLLOCK : FSM_DRP_X16_DONE; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for PLL Lock -------------------- + FSM_PLLLOCK : + + begin + fsm <= (plllock_reg2 ? FSM_GTRESET : FSM_PLLLOCK); + pllreset <= 1'd0; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Release GTRESET ----------------------- + FSM_GTRESET : + + begin + fsm <= FSM_RXPMARESETDONE_1; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= 1'b0; + userrdy <= userrdy; + end + + //---------- Wait for RXPMARESETDONE Assertion ----- + FSM_RXPMARESETDONE_1 : + + begin + fsm <= (&rxpmaresetdone_reg2 || (PCIE_SIM_SPEEDUP == "TRUE")) ? FSM_RXPMARESETDONE_2 : FSM_RXPMARESETDONE_1; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for RXPMARESETDONE De-assertion -- + FSM_RXPMARESETDONE_2 : + + begin + fsm <= (&(~rxpmaresetdone_reg2) || (PCIE_SIM_SPEEDUP == "TRUE")) ? FSM_DRP_X20_START : FSM_RXPMARESETDONE_2; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Start DRP x20 ------------------------- + FSM_DRP_X20_START : + + begin + fsm <= &(~drp_done_reg2) ? FSM_DRP_X20_DONE : FSM_DRP_X20_START; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for DRP x20 Done ----------------- + FSM_DRP_X20_DONE : + + begin + fsm <= (&drp_done_reg2) ? FSM_MMCM_LOCK : FSM_DRP_X20_DONE; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for MMCM and RX CDR Lock --------- + FSM_MMCM_LOCK : + + begin + if (mmcm_lock_reg2 && (&rxcdrlock_reg2 || (BYPASS_RXCDRLOCK == 1))) + begin + fsm <= FSM_RESETDONE; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= 1'd1; + end + else + begin + fsm <= FSM_MMCM_LOCK; + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= 1'd0; + end + end + + //---------- Wait for [TX/RX]RESETDONE and PHYSTATUS + FSM_RESETDONE : + + begin + fsm <= (&resetdone_reg2 && (&(~phystatus_reg2)) ? FSM_TXSYNC_START : FSM_RESETDONE); + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Start TX Sync ------------------------- + FSM_TXSYNC_START : + + begin + fsm <= (&(~txsync_done_reg2) ? FSM_TXSYNC_DONE : FSM_TXSYNC_START); + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Wait for TX Sync Done ----------------- + FSM_TXSYNC_DONE : + + begin + fsm <= (&txsync_done_reg2 ? FSM_IDLE : FSM_TXSYNC_DONE); + pllreset <= pllreset; + pllpd <= pllpd; + gtreset <= gtreset; + userrdy <= userrdy; + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_CFG_WAIT; + pllreset <= 1'd0; + pllpd <= 1'd0; + gtreset <= 1'd0; + userrdy <= 1'd0; + end + + endcase + + end + +end + + + +//---------- RXUSRCLK Reset Synchronizer --------------------------------------- +always @ (posedge RST_RXUSRCLK) +begin + + if (pllreset) + begin + rxusrclk_rst_reg1 <= 1'd1; + rxusrclk_rst_reg2 <= 1'd1; + end + else + begin + rxusrclk_rst_reg1 <= 1'd0; + rxusrclk_rst_reg2 <= rxusrclk_rst_reg1; + end + +end + +//---------- DCLK Reset Synchronizer ------------------------------------------- +always @ (posedge RST_DCLK) +begin + + if (fsm == FSM_CFG_WAIT) + begin + dclk_rst_reg1 <= 1'd1; + dclk_rst_reg2 <= dclk_rst_reg1; + end + else + begin + dclk_rst_reg1 <= 1'd0; + dclk_rst_reg2 <= dclk_rst_reg1; + end + +end + + + +//---------- PIPE Reset Output ------------------------------------------------- +assign RST_CPLLRESET = pllreset; +assign RST_CPLLPD = pllpd; +assign RST_RXUSRCLK_RESET = rxusrclk_rst_reg2; +assign RST_DCLK_RESET = dclk_rst_reg2; +assign RST_GTRESET = gtreset; +assign RST_USERRDY = userrdy; +assign RST_TXSYNC_START = (fsm == FSM_TXSYNC_START); +assign RST_IDLE = (fsm == FSM_IDLE); +assign RST_FSM = fsm; + + + +//-------------------------------------------------------------------------------------------------- +// Register Output +//-------------------------------------------------------------------------------------------------- +always @ (posedge RST_CLK) +begin + + if (!RST_RST_N) + begin + RST_DRP_START <= 1'd0; + RST_DRP_X16 <= 1'd0; + end + else + begin + RST_DRP_START <= (fsm == FSM_DRP_X16_START) || (fsm == FSM_DRP_X20_START); + RST_DRP_X16 <= (fsm == FSM_DRP_X16_START) || (fsm == FSM_DRP_X16_DONE); + end + +end + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtx_cpllpd_ovrd.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtx_cpllpd_ovrd.v new file mode 100644 index 0000000000000000000000000000000000000000..97e42404dce357e35f22ab1b8f18d2144c04c8da --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_gtx_cpllpd_ovrd.v @@ -0,0 +1,69 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_gtx_cpllpd_ovrd.v +// Version : 3.3 +`timescale 1ns / 1ps +module pcie_7x_0_gtx_cpllpd_ovrd ( + input i_ibufds_gte2, + output o_cpllpd_ovrd, + output o_cpllreset_ovrd + ); + (* equivalent_register_removal="no" *) reg [95:0] cpllpd_wait = 96'hFFFFFFFFFFFFFFFFFFFFFFFF; + (* equivalent_register_removal="no" *) reg [127:0] cpllreset_wait = 128'h000000000000000000000000000000FF; + always @(posedge i_ibufds_gte2) + begin + cpllpd_wait <= {cpllpd_wait[94:0], 1'b0}; + cpllreset_wait <= {cpllreset_wait[126:0], 1'b0}; + end + assign o_cpllpd_ovrd = cpllpd_wait[95]; + assign o_cpllreset_ovrd = cpllreset_wait[127]; +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie2_top.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie2_top.v new file mode 100644 index 0000000000000000000000000000000000000000..a12f5b99c07a90f389db1e774009ca9642686f04 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie2_top.v @@ -0,0 +1,1036 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie2_top.v +// Version : 3.3 + +//-------------------------------------------------------------------------------- + + +`timescale 1ns/1ps +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie2_top # ( +parameter c_component_name ="pcie_7x_v3_3_20", +parameter dev_port_type ="0000", +parameter c_dev_port_type ="0", +parameter c_header_type ="00", +parameter c_upstream_facing ="TRUE", +parameter max_lnk_wdt = "000100", +parameter max_lnk_spd = "1", +parameter c_gen1 = 1'b0, +parameter c_int_width = 64, +parameter pci_exp_int_freq = 2, +parameter c_pcie_fast_config = 0, +parameter bar_0 = "FFFFFF80", +parameter bar_1 = "00000000", +parameter bar_2 = "00000000", +parameter bar_3 = "00000000", +parameter bar_4 = "00000000", +parameter bar_5 = "00000000", +parameter xrom_bar = "00000000", +parameter cost_table = 1, +parameter ven_id = "10EE", +parameter dev_id = "7028", +parameter rev_id = "00", +parameter subsys_ven_id = "10EE", +parameter subsys_id = "0007", +parameter class_code = "058000", +parameter cardbus_cis_ptr = "00000000", +parameter cap_ver = "2", +parameter c_pcie_cap_slot_implemented = "FALSE", +parameter mps = "010", +parameter cmps = "2", +parameter ext_tag_fld_sup = "FALSE", +parameter c_dev_control_ext_tag_default = "FALSE", +parameter phantm_func_sup = "00", +parameter c_phantom_functions = "0", +parameter ep_l0s_accpt_lat = "000", +parameter c_ep_l0s_accpt_lat = "0", +parameter ep_l1_accpt_lat = "111", +parameter c_ep_l1_accpt_lat = "7", +parameter c_cpl_timeout_disable_sup = "FALSE", +parameter c_cpl_timeout_range = "0010", +parameter c_cpl_timeout_ranges_sup = "2", +parameter c_buf_opt_bma = "TRUE", +parameter c_perf_level_high = "TRUE", +parameter c_tx_last_tlp = "29", +parameter c_rx_ram_limit = "7FF", +parameter c_fc_ph = "32", +parameter c_fc_pd = "437", +parameter c_fc_nph = "12", +parameter c_fc_npd = "24", +parameter c_fc_cplh = "36", +parameter c_fc_cpld = "461", +parameter c_cpl_inf = "TRUE", +parameter c_cpl_infinite = "TRUE", +parameter c_surprise_dn_err_cap = "FALSE", +parameter c_dll_lnk_actv_cap = "FALSE", +parameter c_lnk_bndwdt_notif = "FALSE", +parameter c_external_clocking = "TRUE", +parameter c_trgt_lnk_spd = "0", +parameter c_hw_auton_spd_disable = "FALSE", +parameter c_de_emph = "FALSE", +parameter slot_clk = "TRUE", +parameter c_rcb = "0", +parameter c_root_cap_crs = "FALSE", +parameter c_slot_cap_attn_butn = "FALSE", +parameter c_slot_cap_attn_ind = "FALSE", +parameter c_slot_cap_pwr_ctrl = "FALSE", +parameter c_slot_cap_pwr_ind = "FALSE", +parameter c_slot_cap_hotplug_surprise = "FALSE", +parameter c_slot_cap_hotplug_cap = "FALSE", +parameter c_slot_cap_mrl = "FALSE", +parameter c_slot_cap_elec_interlock = "FALSE", +parameter c_slot_cap_no_cmd_comp_sup = "FALSE", +parameter c_slot_cap_pwr_limit_value = "0", +parameter c_slot_cap_pwr_limit_scale = "0", +parameter c_slot_cap_physical_slot_num = "0", +parameter intx = "TRUE", +parameter int_pin = "1", +parameter c_msi_cap_on = "TRUE", +parameter c_pm_cap_next_ptr = "48", +parameter c_msi_64b_addr = "TRUE", +parameter c_msi = "0", +parameter c_msi_mult_msg_extn = "0", +parameter c_msi_per_vctr_mask_cap = "FALSE", +parameter c_msix_cap_on = "FALSE", +parameter c_msix_next_ptr = "00", +parameter c_pcie_cap_next_ptr = "00", +parameter c_msix_table_size = "000", +parameter c_msix_table_offset = "0", +parameter c_msix_table_bir = "0", +parameter c_msix_pba_offset = "0", +parameter c_msix_pba_bir = "0", +parameter dsi = "0", +parameter c_dsi_bool = "FALSE", +parameter d1_sup = "0", +parameter c_d1_support = "FALSE", +parameter d2_sup = "0", +parameter c_d2_support = "FALSE", +parameter pme_sup = "0F", +parameter c_pme_support = "0F", +parameter no_soft_rst = "TRUE", +parameter pwr_con_d0_state = "00", +parameter con_scl_fctr_d0_state = "0", +parameter pwr_con_d1_state = "00", +parameter con_scl_fctr_d1_state = "0", +parameter pwr_con_d2_state = "00", +parameter con_scl_fctr_d2_state = "0", +parameter pwr_con_d3_state = "00", +parameter con_scl_fctr_d3_state = "0", +parameter pwr_dis_d0_state = "00", +parameter dis_scl_fctr_d0_state = "0", +parameter pwr_dis_d1_state = "00", +parameter dis_scl_fctr_d1_state = "0", +parameter pwr_dis_d2_state = "00", +parameter dis_scl_fctr_d2_state = "0", +parameter pwr_dis_d3_state = "00", +parameter dis_scl_fctr_d3_state = "0", +parameter c_dsn_cap_enabled = "TRUE", +parameter c_dsn_base_ptr = "100", +parameter c_vc_cap_enabled = "FALSE", +parameter c_vc_base_ptr = "000", +parameter c_vc_cap_reject_snoop = "FALSE", +parameter c_vsec_cap_enabled = "FALSE", +parameter c_vsec_base_ptr = "000", +parameter c_vsec_next_ptr = "000", +parameter c_dsn_next_ptr = "000", +parameter c_vc_next_ptr = "000", +parameter c_pci_cfg_space_addr = "3F", +parameter c_ext_pci_cfg_space_addr = "3FF", +parameter c_last_cfg_dw = "10C", +parameter c_enable_msg_route = "00000000000", +parameter bram_lat = "0", +parameter c_rx_raddr_lat = "0", +parameter c_rx_rdata_lat = "2", +parameter c_rx_write_lat = "0", +parameter c_tx_raddr_lat = "0", +parameter c_tx_rdata_lat = "2", +parameter c_tx_write_lat = "0", +parameter c_ll_ack_timeout_enable = "FALSE", +parameter c_ll_ack_timeout_function = "0", +parameter c_ll_ack_timeout = "0000", +parameter c_ll_replay_timeout_enable = "FALSE", +parameter c_ll_replay_timeout_func = "1", +parameter c_ll_replay_timeout = "0000", +parameter c_dis_lane_reverse = "TRUE", +parameter c_upconfig_capable = "TRUE", +parameter c_disable_scrambling = "FALSE", +parameter c_disable_tx_aspm_l0s = "0", +parameter c_rev_gt_order = "FALSE", +parameter c_pcie_dbg_ports = "FALSE", +parameter pci_exp_ref_freq = "0", +parameter c_xlnx_ref_board = "NONE", +parameter c_pcie_blk_locn = "0", +parameter c_ur_atomic = "FALSE", +parameter c_dev_cap2_atomicop32_completer_supported = "FALSE", +parameter c_dev_cap2_atomicop64_completer_supported = "FALSE", +parameter c_dev_cap2_cas128_completer_supported = "FALSE", +parameter c_dev_cap2_tph_completer_supported = "00", +parameter c_dev_cap2_ari_forwarding_supported = "FALSE", +parameter c_dev_cap2_atomicop_routing_supported = "FALSE", +parameter c_link_cap_aspm_optionality = "FALSE", +parameter c_aer_cap_on = "FALSE", +parameter c_aer_base_ptr = "000", +parameter c_aer_cap_nextptr = "000", +parameter c_aer_cap_ecrc_check_capable = "FALSE", +parameter c_aer_cap_multiheader = "FALSE", +parameter c_aer_cap_permit_rooterr_update = "FALSE", +parameter c_rbar_cap_on = "FALSE", +parameter c_rbar_base_ptr = "000", +parameter c_rbar_cap_nextptr = "000", +parameter c_rbar_num = "0", +parameter c_rbar_cap_sup0 = "00001", +parameter c_rbar_cap_index0 = "0", +parameter c_rbar_cap_control_encodedbar0 = "00", +parameter c_rbar_cap_sup1 = "00001", +parameter c_rbar_cap_index1 = "0", +parameter c_rbar_cap_control_encodedbar1 = "00", +parameter c_rbar_cap_sup2 = "00001", +parameter c_rbar_cap_index2 = "0", +parameter c_rbar_cap_control_encodedbar2 = "00", +parameter c_rbar_cap_sup3 = "00001", +parameter c_rbar_cap_index3 = "0", +parameter c_rbar_cap_control_encodedbar3 = "00", +parameter c_rbar_cap_sup4 = "00001", +parameter c_rbar_cap_index4 = "0", +parameter c_rbar_cap_control_encodedbar4 = "00", +parameter c_rbar_cap_sup5 = "00001", +parameter c_rbar_cap_index5 = "0", +parameter c_rbar_cap_control_encodedbar5 = "00", +parameter c_recrc_check = "0", +parameter c_recrc_check_trim = "FALSE", +parameter c_disable_rx_poisoned_resp = "FALSE", +parameter c_trn_np_fc = "TRUE", +parameter c_ur_inv_req = "TRUE", +parameter c_ur_prs_response = "TRUE", +parameter c_silicon_rev = "1", +parameter c_aer_cap_optional_err_support = "000000", +parameter PIPE_SIM = "FALSE", +parameter PCIE_EXT_CLK = "TRUE", +parameter PCIE_EXT_GT_COMMON = "FALSE", +parameter EXT_CH_GT_DRP = "TRUE", +parameter TRANSCEIVER_CTRL_STATUS_PORTS = "FALSE", +parameter SHARED_LOGIC_IN_CORE = "FALSE", +parameter PL_INTERFACE = "TRUE", +parameter CFG_MGMT_IF = "TRUE", +parameter CFG_CTL_IF = "TRUE", +parameter CFG_STATUS_IF = "TRUE", +parameter RCV_MSG_IF = "TRUE", +parameter CFG_FC_IF = "TRUE" , +parameter ERR_REPORTING_IF = "TRUE", +parameter c_aer_cap_ecrc_gen_capable = "FALSE", +parameter EXT_PIPE_INTERFACE = "FALSE", +parameter EXT_STARTUP_PRIMITIVE = "FALSE", +parameter integer LINK_CAP_MAX_LINK_WIDTH = 6'h8, +parameter integer C_DATA_WIDTH = 64, +parameter integer KEEP_WIDTH = C_DATA_WIDTH / 8, +parameter PCIE_ID_IF ="TRUE", +parameter PCIE_ASYNC_EN = "FALSE", +parameter ENABLE_JTAG_DBG = "FALSE", +parameter REDUCE_OOB_FREQ = "FALSE" +) +( + + //----------------------------------------------------------------------------------------------------------------// + // 1. PCI Express (pci_exp) Interface // + //----------------------------------------------------------------------------------------------------------------// + + // Tx + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_txn, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_txp, + + // Rx + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_rxn, + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pci_exp_rxp, + + //----------------------------------------------------------------------------------------------------------------// + // 2. Clock & GT COMMON Sharing Interface // + //----------------------------------------------------------------------------------------------------------------// + // Shared Logic Internal + output int_pclk_out_slave, + output int_pipe_rxusrclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH-1):0] int_rxoutclk_out, + output int_dclk_out, + output int_userclk1_out, + output int_userclk2_out, + output int_oobclk_out, + output int_mmcm_lock_out, + output [1:0] int_qplllock_out, + output [1:0] int_qplloutclk_out, + output [1:0] int_qplloutrefclk_out, + input [(LINK_CAP_MAX_LINK_WIDTH-1):0] int_pclk_sel_slave, + + // Shared Logic External - Clocks + input pipe_pclk_in, + input pipe_rxusrclk_in, + input [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_rxoutclk_in, + input pipe_dclk_in, + input pipe_userclk1_in, + input pipe_userclk2_in, + input pipe_oobclk_in, + input pipe_mmcm_lock_in, + + output pipe_txoutclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_rxoutclk_out, + output [(LINK_CAP_MAX_LINK_WIDTH - 1) : 0] pipe_pclk_sel_out, + output pipe_gen3_out, + + // Shared Logic External - GT COMMON + + input [11:0] qpll_drp_crscode, + input [17:0] qpll_drp_fsm, + input [1:0] qpll_drp_done, + input [1:0] qpll_drp_reset, + input [1:0] qpll_qplllock, + input [1:0] qpll_qplloutclk, + input [1:0] qpll_qplloutrefclk, + output qpll_qplld, + output [1:0] qpll_qpllreset, + output qpll_drp_clk, + output qpll_drp_rst_n, + output qpll_drp_ovrd, + output qpll_drp_gen3, + output qpll_drp_start, + + //----------------------------------------------------------------------------------------------------------------// + // 3. AXI-S Interface // + //----------------------------------------------------------------------------------------------------------------// + + // Common + output user_clk_out, + output user_reset_out, + output user_lnk_up, + output user_app_rdy, + + // AXI TX + //----------- + output [5:0] tx_buf_av, + output tx_err_drop, + output tx_cfg_req, + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, + input s_axis_tx_tvalid, + output s_axis_tx_tready, + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, + input s_axis_tx_tlast, + input [3:0] s_axis_tx_tuser, + input tx_cfg_gnt, + + // AXI RX + //----------- + output [C_DATA_WIDTH-1:0] m_axis_rx_tdata, + output m_axis_rx_tvalid, + input m_axis_rx_tready, + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, + output m_axis_rx_tlast, + output [21:0] m_axis_rx_tuser, + input rx_np_ok, + input rx_np_req, + + // Flow Control + output [11:0] fc_cpld, + output [7:0] fc_cplh, + output [11:0] fc_npd, + output [7:0] fc_nph, + output [11:0] fc_pd, + output [7:0] fc_ph, + input [2:0] fc_sel, + + + //----------------------------------------------------------------------------------------------------------------// + // 4. Configuration (CFG) Interface // + //----------------------------------------------------------------------------------------------------------------// + + //------------------------------------------------// + // EP and RP // + //------------------------------------------------// + output [31:0] cfg_mgmt_do, + output cfg_mgmt_rd_wr_done, + + output [15:0] cfg_status, + output [15:0] cfg_command, + output [15:0] cfg_dstatus, + output [15:0] cfg_dcommand, + output [15:0] cfg_lstatus, + output [15:0] cfg_lcommand, + output [15:0] cfg_dcommand2, + output [2:0] cfg_pcie_link_state, + + output cfg_pmcsr_pme_en, + output [1:0] cfg_pmcsr_powerstate, + output cfg_pmcsr_pme_status, + output cfg_received_func_lvl_rst, + + // Management Interface + input [31:0] cfg_mgmt_di, + input [3:0] cfg_mgmt_byte_en, + input [9:0] cfg_mgmt_dwaddr, + input cfg_mgmt_wr_en, + input cfg_mgmt_rd_en, + input cfg_mgmt_wr_readonly, + + // Error Reporting Interface + input cfg_err_ecrc, + input cfg_err_ur, + input cfg_err_cpl_timeout, + input cfg_err_cpl_unexpect, + input cfg_err_cpl_abort, + input cfg_err_posted, + input cfg_err_cor, + input cfg_err_atomic_egress_blocked, + input cfg_err_internal_cor, + input cfg_err_malformed, + input cfg_err_mc_blocked, + input cfg_err_poisoned, + input cfg_err_norecovery, + input [47:0] cfg_err_tlp_cpl_header, + output cfg_err_cpl_rdy, + input cfg_err_locked, + input cfg_err_acs, + input cfg_err_internal_uncor, + + input cfg_trn_pending, + input cfg_pm_halt_aspm_l0s, + input cfg_pm_halt_aspm_l1, + input cfg_pm_force_state_en, + input [1:0] cfg_pm_force_state, + + input [63:0] cfg_dsn, + output cfg_msg_received, + output [15:0] cfg_msg_data, + + //------------------------------------------------// + // EP Only // + //------------------------------------------------// + + // Interrupt Interface Signals + input cfg_interrupt, + output cfg_interrupt_rdy, + input cfg_interrupt_assert, + input [7:0] cfg_interrupt_di, + output [7:0] cfg_interrupt_do, + output [2:0] cfg_interrupt_mmenable, + output cfg_interrupt_msienable, + output cfg_interrupt_msixenable, + output cfg_interrupt_msixfm, + input cfg_interrupt_stat, + input [4:0] cfg_pciecap_interrupt_msgnum, + + + output cfg_to_turnoff, + input cfg_turnoff_ok, + output [7:0] cfg_bus_number, + output [4:0] cfg_device_number, + output [2:0] cfg_function_number, + input cfg_pm_wake, + + output cfg_msg_received_pm_as_nak, + output cfg_msg_received_setslotpowerlimit, + + //------------------------------------------------// + // RP Only // + //------------------------------------------------// + input cfg_pm_send_pme_to, + input [7:0] cfg_ds_bus_number, + input [4:0] cfg_ds_device_number, + input [2:0] cfg_ds_function_number, + + input cfg_mgmt_wr_rw1c_as_rw, + + output cfg_bridge_serr_en, + output cfg_slot_control_electromech_il_ctl_pulse, + output cfg_root_control_syserr_corr_err_en, + output cfg_root_control_syserr_non_fatal_err_en, + output cfg_root_control_syserr_fatal_err_en, + output cfg_root_control_pme_int_en, + output cfg_aer_rooterr_corr_err_reporting_en, + output cfg_aer_rooterr_non_fatal_err_reporting_en, + output cfg_aer_rooterr_fatal_err_reporting_en, + output cfg_aer_rooterr_corr_err_received, + output cfg_aer_rooterr_non_fatal_err_received, + output cfg_aer_rooterr_fatal_err_received, + + output cfg_msg_received_err_cor, + output cfg_msg_received_err_non_fatal, + output cfg_msg_received_err_fatal, + output cfg_msg_received_pm_pme, + output cfg_msg_received_pme_to_ack, + output cfg_msg_received_assert_int_a, + output cfg_msg_received_assert_int_b, + output cfg_msg_received_assert_int_c, + output cfg_msg_received_assert_int_d, + output cfg_msg_received_deassert_int_a, + output cfg_msg_received_deassert_int_b, + output cfg_msg_received_deassert_int_c, + output cfg_msg_received_deassert_int_d, + + //----------------------------------------------------------------------------------------------------------------// + // 5. Physical Layer Control and Status (PL) Interface // + //----------------------------------------------------------------------------------------------------------------// + + //------------------------------------------------// + // EP and RP // + //------------------------------------------------// + input [1:0] pl_directed_link_change, + input [1:0] pl_directed_link_width, + input pl_directed_link_speed, + input pl_directed_link_auton, + input pl_upstream_prefer_deemph, + + output pl_sel_lnk_rate, + output [1:0] pl_sel_lnk_width, + output [5:0] pl_ltssm_state, + output [1:0] pl_lane_reversal_mode, + + output pl_phy_lnk_up, + output [2:0] pl_tx_pm_state, + output [1:0] pl_rx_pm_state, + + output pl_link_upcfg_cap, + output pl_link_gen2_cap, + output pl_link_partner_gen2_supported, + output [2:0] pl_initial_link_width, + + output pl_directed_change_done, + + //------------------------------------------------// + // EP Only // + //------------------------------------------------// + output pl_received_hot_rst, + + //------------------------------------------------// + // RP Only // + //------------------------------------------------// + input pl_transmit_hot_rst, + input pl_downstream_deemph_source, + + //----------------------------------------------------------------------------------------------------------------// + // 6. AER interface // + //----------------------------------------------------------------------------------------------------------------// + + input [127:0] cfg_err_aer_headerlog, + input [4:0] cfg_aer_interrupt_msgnum, + output cfg_err_aer_headerlog_set, + output cfg_aer_ecrc_check_en, + output cfg_aer_ecrc_gen_en, + + //----------------------------------------------------------------------------------------------------------------// + // 7. VC interface // + //----------------------------------------------------------------------------------------------------------------// + + output [6:0] cfg_vc_tcvc_map, + + //----------------------------------------------------------------------------------------------------------------// + // 8. PCIe DRP (PCIe DRP) Interface // + //----------------------------------------------------------------------------------------------------------------// + + input pcie_drp_clk, + input pcie_drp_en, + input pcie_drp_we, + input [8:0] pcie_drp_addr, + input [15:0] pcie_drp_di, + output pcie_drp_rdy, + output [15:0] pcie_drp_do, + + //----------------------------------------------------------------------------------------------------------------// + // PCIe Fast Config: STARTUP primitive Interface - only used in Tandem configurations // + //----------------------------------------------------------------------------------------------------------------// + // This input should be used when the startup block is generated exteranl to the PCI Express Core + input startup_eos_in, // 1-bit input: This signal should be driven by the EOS output of the STARTUP primitive. + // These inputs and outputs may be use when the startup block is generated internal to the PCI Express Core. + output wire startup_cfgclk, // 1-bit output: Configuration main clock output + output wire startup_cfgmclk, // 1-bit output: Configuration internal oscillator clock output + output wire startup_eos, // 1-bit output: Active high output signal indicating the End Of Startup + output wire startup_preq, // 1-bit output: PROGRAM request to fabric output + input wire startup_clk, // 1-bit input: User start-up clock input + input wire startup_gsr, // 1-bit input: Global Set/Reset input (GSR cannot be used for the port name) + input wire startup_gts, // 1-bit input: Global 3-state input (GTS cannot be used for the port name) + input wire startup_keyclearb, // 1-bit input: Clear AES Decrypter Key input from Battery-Backed RAM (BBRAM) + input wire startup_pack, // 1-bit input: PROGRAM acknowledge input + input wire startup_usrcclko, // 1-bit input: User CCLK input + input wire startup_usrcclkts, // 1-bit input: User CCLK 3-state enable input + input wire startup_usrdoneo, // 1-bit input: User DONE pin output control + input wire startup_usrdonets, // 1-bit input: User DONE 3-state enable output + + //----------------------------------------------------------------------------------------------------------------// + // PCIe Fast Config: ICAP primitive Interface - only used in Tandem PCIe configuration // + //----------------------------------------------------------------------------------------------------------------// + input wire icap_clk, + input wire icap_csib, + input wire icap_rdwrb, + input wire [31:0] icap_i, + output wire [31:0] icap_o, + + + input [ 2:0] pipe_txprbssel, + input [ 2:0] pipe_rxprbssel, + input pipe_txprbsforceerr, + input pipe_rxprbscntreset, + input [ 2:0] pipe_loopback, + + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_rxprbserr, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_txinhibit, + + output [4:0] pipe_rst_fsm, + output [11:0] pipe_qrst_fsm, + output [(LINK_CAP_MAX_LINK_WIDTH*5)-1:0] pipe_rate_fsm, + output [(LINK_CAP_MAX_LINK_WIDTH*6)-1:0] pipe_sync_fsm_tx, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] pipe_sync_fsm_rx, + output [(LINK_CAP_MAX_LINK_WIDTH*7)-1:0] pipe_drp_fsm, + + output pipe_rst_idle, + output pipe_qrst_idle, + output pipe_rate_idle, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_eyescandataerror, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] pipe_rxstatus, + output [(LINK_CAP_MAX_LINK_WIDTH*15)-1:0] pipe_dmonitorout, + + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_cpll_lock, + output [(LINK_CAP_MAX_LINK_WIDTH-1)>>2:0] pipe_qpll_lock, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxpmaresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH*3)-1:0] pipe_rxbufstatus, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txphaligndone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txphinitdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_txdlysresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxphaligndone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxdlysresetdone, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxsyncdone, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] pipe_rxdisperr, + output [(LINK_CAP_MAX_LINK_WIDTH*8)-1:0] pipe_rxnotintable, + output [(LINK_CAP_MAX_LINK_WIDTH)-1:0] pipe_rxcommadet, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] gt_ch_drp_rdy, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_0, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_1, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_2, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_3, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_4, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_5, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_6, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_7, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_8, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] pipe_debug_9, + output [31:0] pipe_debug, + + //--------------Channel DRP--------------------------------- + output ext_ch_gt_drpclk, + input [(LINK_CAP_MAX_LINK_WIDTH*9)-1:0] ext_ch_gt_drpaddr, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpen, + input [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0] ext_ch_gt_drpdi, + input [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drpwe, + + output [(LINK_CAP_MAX_LINK_WIDTH*16)-1:0] ext_ch_gt_drpdo, + output [LINK_CAP_MAX_LINK_WIDTH-1:0] ext_ch_gt_drprdy, + + //----------------------------------------------------------------------------------------------------------------// + // PIPE PORTS to TOP Level For PIPE SIMULATION with 3rd Party IP/BFM/Xilinx BFM + //----------------------------------------------------------------------------------------------------------------// + input wire [11:0] common_commands_in, + input wire [24:0] pipe_rx_0_sigs, + input wire [24:0] pipe_rx_1_sigs, + input wire [24:0] pipe_rx_2_sigs, + input wire [24:0] pipe_rx_3_sigs, + input wire [24:0] pipe_rx_4_sigs, + input wire [24:0] pipe_rx_5_sigs, + input wire [24:0] pipe_rx_6_sigs, + input wire [24:0] pipe_rx_7_sigs, + + output wire [11:0] common_commands_out, + output wire [24:0] pipe_tx_0_sigs, + output wire [24:0] pipe_tx_1_sigs, + output wire [24:0] pipe_tx_2_sigs, + output wire [24:0] pipe_tx_3_sigs, + output wire [24:0] pipe_tx_4_sigs, + output wire [24:0] pipe_tx_5_sigs, + output wire [24:0] pipe_tx_6_sigs, + output wire [24:0] pipe_tx_7_sigs, + + //----------------------------------------------------------------------------------------------------------------// + // PCIe ID Interface // + //----------------------------------------------------------------------------------------------------------------// + input wire [15:0] cfg_dev_id_pf0, + input wire [15:0] cfg_ven_id, + input wire [7:0] cfg_rev_id_pf0, + input wire [15:0] cfg_subsys_id_pf0, + input wire [15:0] cfg_subsys_ven_id, + + //----------------------------------------------------------------------------------------------------------------// + input wire pipe_mmcm_rst_n, // Async | Async + input wire sys_clk, + input wire sys_rst_n + +); + +pcie_7x_0_core_top # ( + .LINK_CAP_MAX_LINK_WIDTH (LINK_CAP_MAX_LINK_WIDTH), + .C_DATA_WIDTH (C_DATA_WIDTH), + .KEEP_WIDTH (KEEP_WIDTH) + ) inst + ( + .pci_exp_txn(pci_exp_txn), + .pci_exp_txp(pci_exp_txp), + .pci_exp_rxn(pci_exp_rxn), + .pci_exp_rxp(pci_exp_rxp), + .int_pclk_out_slave(int_pclk_out_slave), + .int_pipe_rxusrclk_out(int_pipe_rxusrclk_out), + .int_rxoutclk_out(int_rxoutclk_out), + .int_dclk_out(int_dclk_out), + .int_userclk1_out(int_userclk1_out), + .int_mmcm_lock_out(int_mmcm_lock_out), + .int_userclk2_out(int_userclk2_out), + .int_oobclk_out(int_oobclk_out), + .int_qplllock_out(int_qplllock_out), + .int_qplloutclk_out(int_qplloutclk_out), + .int_qplloutrefclk_out(int_qplloutrefclk_out), + .int_pclk_sel_slave(int_pclk_sel_slave), + .pipe_pclk_in(pipe_pclk_in), + .pipe_rxusrclk_in(pipe_rxusrclk_in), + .pipe_rxoutclk_in(pipe_rxoutclk_in), + .pipe_dclk_in(pipe_dclk_in), + .pipe_userclk1_in(pipe_userclk1_in), + .pipe_userclk2_in(pipe_userclk2_in), + .pipe_oobclk_in(pipe_oobclk_in), + .pipe_mmcm_lock_in(pipe_mmcm_lock_in), + .pipe_txoutclk_out(pipe_txoutclk_out), + .pipe_rxoutclk_out(pipe_rxoutclk_out), + .pipe_pclk_sel_out(pipe_pclk_sel_out), + .pipe_gen3_out(pipe_gen3_out), + .user_clk_out(user_clk_out), + .user_reset_out(user_reset_out), + .user_lnk_up(user_lnk_up), + .user_app_rdy(user_app_rdy), + .tx_buf_av(tx_buf_av), + .tx_err_drop(tx_err_drop), + .tx_cfg_req(tx_cfg_req), + .s_axis_tx_tready(s_axis_tx_tready), + .s_axis_tx_tdata(s_axis_tx_tdata), + .s_axis_tx_tkeep(s_axis_tx_tkeep), + .s_axis_tx_tuser(s_axis_tx_tuser), + .s_axis_tx_tlast(s_axis_tx_tlast), + .s_axis_tx_tvalid(s_axis_tx_tvalid), + .tx_cfg_gnt(tx_cfg_gnt), + .m_axis_rx_tdata(m_axis_rx_tdata), + .m_axis_rx_tkeep(m_axis_rx_tkeep), + .m_axis_rx_tlast(m_axis_rx_tlast), + .m_axis_rx_tvalid(m_axis_rx_tvalid), + .m_axis_rx_tready(m_axis_rx_tready), + .m_axis_rx_tuser(m_axis_rx_tuser), + .rx_np_ok(rx_np_ok), + .rx_np_req(rx_np_req), + .fc_cpld(fc_cpld), + .fc_cplh(fc_cplh), + .fc_npd(fc_npd), + .fc_nph(fc_nph), + .fc_pd(fc_pd), + .fc_ph(fc_ph), + .fc_sel(fc_sel), + .cfg_status(cfg_status), + .cfg_command(cfg_command), + .cfg_dstatus(cfg_dstatus), + .cfg_dcommand(cfg_dcommand), + .cfg_lstatus(cfg_lstatus), + .cfg_lcommand(cfg_lcommand), + .cfg_dcommand2(cfg_dcommand2), + .cfg_pcie_link_state(cfg_pcie_link_state), + .cfg_pmcsr_pme_en(cfg_pmcsr_pme_en), + .cfg_pmcsr_powerstate(cfg_pmcsr_powerstate), + .cfg_pmcsr_pme_status(cfg_pmcsr_pme_status), + .cfg_received_func_lvl_rst(cfg_received_func_lvl_rst), + .cfg_mgmt_do(cfg_mgmt_do), + .cfg_mgmt_rd_wr_done(cfg_mgmt_rd_wr_done), + .cfg_mgmt_di(cfg_mgmt_di), + .cfg_mgmt_byte_en(cfg_mgmt_byte_en), + .cfg_mgmt_dwaddr(cfg_mgmt_dwaddr), + .cfg_mgmt_wr_en(cfg_mgmt_wr_en), + .cfg_mgmt_rd_en(cfg_mgmt_rd_en), + .cfg_mgmt_wr_readonly(cfg_mgmt_wr_readonly), + .cfg_err_ecrc(cfg_err_ecrc), + .cfg_err_ur(cfg_err_ur), + .cfg_err_cpl_timeout(cfg_err_cpl_timeout), + .cfg_err_cpl_unexpect(cfg_err_cpl_unexpect), + .cfg_err_cpl_abort(cfg_err_cpl_abort), + .cfg_err_posted(cfg_err_posted), + .cfg_err_cor(cfg_err_cor), + .cfg_err_atomic_egress_blocked(cfg_err_atomic_egress_blocked), + .cfg_err_internal_cor(cfg_err_internal_cor), + .cfg_err_malformed(cfg_err_malformed), + .cfg_err_mc_blocked(cfg_err_mc_blocked), + .cfg_err_poisoned(cfg_err_poisoned), + .cfg_err_norecovery(cfg_err_norecovery), + .cfg_err_tlp_cpl_header(cfg_err_tlp_cpl_header), + .cfg_err_cpl_rdy(cfg_err_cpl_rdy), + .cfg_err_locked(cfg_err_locked), + .cfg_err_acs(cfg_err_acs), + .cfg_err_internal_uncor(cfg_err_internal_uncor), + .cfg_trn_pending(cfg_trn_pending), + .cfg_pm_halt_aspm_l0s(cfg_pm_halt_aspm_l0s), + .cfg_pm_halt_aspm_l1(cfg_pm_halt_aspm_l1), + .cfg_pm_force_state_en(cfg_pm_force_state_en), + .cfg_pm_force_state(cfg_pm_force_state), + .cfg_dsn(cfg_dsn), + .cfg_msg_received(cfg_msg_received), + .cfg_msg_data(cfg_msg_data), + .cfg_interrupt(cfg_interrupt), + .cfg_interrupt_rdy(cfg_interrupt_rdy), + .cfg_interrupt_assert(cfg_interrupt_assert), + .cfg_interrupt_di(cfg_interrupt_di), + .cfg_interrupt_do(cfg_interrupt_do), + .cfg_interrupt_mmenable(cfg_interrupt_mmenable), + .cfg_interrupt_msienable(cfg_interrupt_msienable), + .cfg_interrupt_msixenable(cfg_interrupt_msixenable), + .cfg_interrupt_msixfm(cfg_interrupt_msixfm), + .cfg_interrupt_stat(cfg_interrupt_stat), + .cfg_pciecap_interrupt_msgnum(cfg_pciecap_interrupt_msgnum), + .cfg_to_turnoff(cfg_to_turnoff), + .cfg_turnoff_ok(cfg_turnoff_ok), + .cfg_bus_number(cfg_bus_number), + .cfg_device_number(cfg_device_number), + .cfg_function_number(cfg_function_number), + .cfg_pm_wake(cfg_pm_wake), + .cfg_msg_received_setslotpowerlimit(cfg_msg_received_setslotpowerlimit), + .cfg_pm_send_pme_to(cfg_pm_send_pme_to), + .cfg_ds_bus_number(cfg_ds_bus_number), + .cfg_ds_device_number(cfg_ds_device_number), + .cfg_ds_function_number(cfg_ds_function_number), + .cfg_mgmt_wr_rw1c_as_rw(cfg_mgmt_wr_rw1c_as_rw), + .cfg_bridge_serr_en(cfg_bridge_serr_en), + .cfg_slot_control_electromech_il_ctl_pulse(cfg_slot_control_electromech_il_ctl_pulse), + .cfg_root_control_syserr_corr_err_en(cfg_root_control_syserr_corr_err_en), + .cfg_root_control_syserr_non_fatal_err_en(cfg_root_control_syserr_non_fatal_err_en), + .cfg_root_control_syserr_fatal_err_en(cfg_root_control_syserr_fatal_err_en), + .cfg_root_control_pme_int_en(cfg_root_control_pme_int_en), + .cfg_aer_rooterr_corr_err_reporting_en(cfg_aer_rooterr_corr_err_reporting_en), + .cfg_aer_rooterr_non_fatal_err_reporting_en(cfg_aer_rooterr_non_fatal_err_reporting_en), + .cfg_aer_rooterr_fatal_err_reporting_en(cfg_aer_rooterr_fatal_err_reporting_en), + .cfg_aer_rooterr_corr_err_received(cfg_aer_rooterr_corr_err_received), + .cfg_aer_rooterr_non_fatal_err_received(cfg_aer_rooterr_non_fatal_err_received), + .cfg_aer_rooterr_fatal_err_received(cfg_aer_rooterr_fatal_err_received), + .cfg_msg_received_err_cor(cfg_msg_received_err_cor), + .cfg_msg_received_err_non_fatal(cfg_msg_received_err_non_fatal), + .cfg_msg_received_err_fatal(cfg_msg_received_err_fatal), + .cfg_msg_received_pm_as_nak(cfg_msg_received_pm_as_nak), + .cfg_msg_received_pm_pme(cfg_msg_received_pm_pme), + .cfg_msg_received_pme_to_ack(cfg_msg_received_pme_to_ack), + .cfg_msg_received_assert_int_a(cfg_msg_received_assert_int_a), + .cfg_msg_received_assert_int_b(cfg_msg_received_assert_int_b), + .cfg_msg_received_assert_int_c(cfg_msg_received_assert_int_c), + .cfg_msg_received_assert_int_d(cfg_msg_received_assert_int_d), + .cfg_msg_received_deassert_int_a(cfg_msg_received_deassert_int_a), + .cfg_msg_received_deassert_int_b(cfg_msg_received_deassert_int_b), + .cfg_msg_received_deassert_int_c(cfg_msg_received_deassert_int_c), + .cfg_msg_received_deassert_int_d(cfg_msg_received_deassert_int_d), + .pl_directed_link_change(pl_directed_link_change), + .pl_directed_link_width(pl_directed_link_width), + .pl_directed_link_speed(pl_directed_link_speed), + .pl_directed_link_auton(pl_directed_link_auton), + .pl_upstream_prefer_deemph(pl_upstream_prefer_deemph), + .pl_sel_lnk_rate(pl_sel_lnk_rate), + .pl_sel_lnk_width(pl_sel_lnk_width), + .pl_ltssm_state(pl_ltssm_state), + .pl_lane_reversal_mode(pl_lane_reversal_mode), + .pl_phy_lnk_up(pl_phy_lnk_up), + .pl_tx_pm_state(pl_tx_pm_state), + .pl_rx_pm_state(pl_rx_pm_state), + .pl_link_upcfg_cap(pl_link_upcfg_cap), + .pl_link_gen2_cap(pl_link_gen2_cap), + .pl_link_partner_gen2_supported(pl_link_partner_gen2_supported), + .pl_initial_link_width(pl_initial_link_width), + .pl_directed_change_done(pl_directed_change_done), + .pl_received_hot_rst(pl_received_hot_rst), + .pl_transmit_hot_rst(pl_transmit_hot_rst), + .pl_downstream_deemph_source(pl_downstream_deemph_source), + .cfg_err_aer_headerlog(cfg_err_aer_headerlog), + .cfg_aer_interrupt_msgnum(cfg_aer_interrupt_msgnum), + .cfg_err_aer_headerlog_set(cfg_err_aer_headerlog_set), + .cfg_aer_ecrc_check_en(cfg_aer_ecrc_check_en), + .cfg_aer_ecrc_gen_en(cfg_aer_ecrc_gen_en), + .cfg_vc_tcvc_map(cfg_vc_tcvc_map), + .pcie_drp_clk(pcie_drp_clk), + .pcie_drp_en(pcie_drp_en), + .pcie_drp_we(pcie_drp_we), + .pcie_drp_addr(pcie_drp_addr), + .pcie_drp_di(pcie_drp_di), + .pcie_drp_rdy(pcie_drp_rdy), + .pcie_drp_do(pcie_drp_do), + + // STARTUP primitive interface - Can only be used with Tandem Configurations + // This input should be used when the startup block is generated exteranl to the PCI Express Core + .startup_eos_in(startup_eos_in), // 1-bit input: This signal should be driven by the EOS output of the STARTUP primitive. + // These inputs and outputs may be use when the startup block is generated internal to the PCI Express Core. + .startup_cfgclk(startup_cfgclk), // 1-bit output: Configuration main clock output + .startup_cfgmclk(startup_cfgmclk), // 1-bit output: Configuration internal oscillator clock output + .startup_eos(startup_eos), // 1-bit output: Active high output signal indicating the End Of Startup. + .startup_preq(startup_preq), // 1-bit output: PROGRAM request to fabric output + .startup_clk(startup_clk), // 1-bit input: User start-up clock input + .startup_gsr(startup_gsr), // 1-bit input: Global Set/Reset input (GSR cannot be used for the port name) + .startup_gts(startup_gts), // 1-bit input: Global 3-state input (GTS cannot be used for the port name) + .startup_keyclearb(startup_keyclearb), // 1-bit input: Clear AES Decrypter Key input from Battery-Backed RAM (BBRAM) + .startup_pack(startup_pack), // 1-bit input: PROGRAM acknowledge input + .startup_usrcclko(startup_usrcclko), // 1-bit input: User CCLK input + .startup_usrcclkts(startup_usrcclkts), // 1-bit input: User CCLK 3-state enable input + .startup_usrdoneo(startup_usrdoneo), // 1-bit input: User DONE pin output control + .startup_usrdonets(startup_usrdonets), // 1-bit input: User DONE 3-state enable output + + // ICAP primitive interface - Can only be used with Tandem PCIe Configuration + .icap_clk(icap_clk), + .icap_csib(icap_csib), + .icap_rdwrb(icap_rdwrb), + .icap_i(icap_i), + .icap_o(icap_o), + + //External GT COMMON Ports + + .qpll_drp_crscode ( qpll_drp_crscode ), + .qpll_drp_fsm ( qpll_drp_fsm ), + .qpll_drp_done ( qpll_drp_done ), + .qpll_drp_reset ( qpll_drp_reset ), + .qpll_qplllock ( qpll_qplllock ), + .qpll_qplloutclk ( qpll_qplloutclk ), + .qpll_qplloutrefclk ( qpll_qplloutrefclk ), + .qpll_qplld ( qpll_qplld ), + .qpll_qpllreset ( qpll_qpllreset ), + .qpll_drp_clk ( qpll_drp_clk ), + .qpll_drp_rst_n ( qpll_drp_rst_n ), + .qpll_drp_ovrd ( qpll_drp_ovrd ), + .qpll_drp_gen3 ( qpll_drp_gen3), + .qpll_drp_start ( qpll_drp_start ), + + //------------TRANSCEIVER DEBUG----------------------------------- + //Drive these inputs to 0s + .ext_ch_gt_drpclk (ext_ch_gt_drpclk), + .ext_ch_gt_drpaddr (ext_ch_gt_drpaddr), + .ext_ch_gt_drpen (ext_ch_gt_drpen), + .ext_ch_gt_drpdi (ext_ch_gt_drpdi), + .ext_ch_gt_drpwe (ext_ch_gt_drpwe), + .ext_ch_gt_drpdo (ext_ch_gt_drpdo), + .ext_ch_gt_drprdy (ext_ch_gt_drprdy ), + + .pipe_txprbssel (pipe_txprbssel), + .pipe_rxprbssel (pipe_rxprbssel), + .pipe_txprbsforceerr (pipe_txprbsforceerr), + .pipe_rxprbscntreset (pipe_rxprbscntreset), + .pipe_loopback (pipe_loopback ), + .pipe_rxprbserr (pipe_rxprbserr), + .pipe_txinhibit (pipe_txinhibit), + .pipe_rst_fsm (pipe_rst_fsm), + .pipe_qrst_fsm (pipe_qrst_fsm), + .pipe_rate_fsm (pipe_rate_fsm), + .pipe_sync_fsm_tx (pipe_sync_fsm_tx), + .pipe_sync_fsm_rx (pipe_sync_fsm_rx), + .pipe_drp_fsm (pipe_drp_fsm), + .pipe_rst_idle (pipe_rst_idle), + .pipe_qrst_idle (pipe_qrst_idle), + .pipe_rate_idle (pipe_rate_idle), + .pipe_eyescandataerror (pipe_eyescandataerror), + .pipe_rxstatus (pipe_rxstatus), + .pipe_dmonitorout (pipe_dmonitorout), + .pipe_cpll_lock ( pipe_cpll_lock ), + .pipe_qpll_lock ( pipe_qpll_lock ), + .pipe_rxpmaresetdone ( pipe_rxpmaresetdone ), + .pipe_rxbufstatus ( pipe_rxbufstatus ), + .pipe_txphaligndone ( pipe_txphaligndone ), + .pipe_txphinitdone ( pipe_txphinitdone ), + .pipe_txdlysresetdone ( pipe_txdlysresetdone ), + .pipe_rxphaligndone ( pipe_rxphaligndone ), + .pipe_rxdlysresetdone ( pipe_rxdlysresetdone ), + .pipe_rxsyncdone ( pipe_rxsyncdone ), + .pipe_rxdisperr ( pipe_rxdisperr ), + .pipe_rxnotintable ( pipe_rxnotintable ), + .pipe_rxcommadet ( pipe_rxcommadet ), + + //---------- CHANNEL DRP -------------------------------- + .gt_ch_drp_rdy (gt_ch_drp_rdy), + .pipe_debug_0 (pipe_debug_0), + .pipe_debug_1 (pipe_debug_1), + .pipe_debug_2 (pipe_debug_2), + .pipe_debug_3 (pipe_debug_3), + .pipe_debug_4 (pipe_debug_4), + .pipe_debug_5 (pipe_debug_5), + .pipe_debug_6 (pipe_debug_6), + .pipe_debug_7 (pipe_debug_7), + .pipe_debug_8 (pipe_debug_8), + .pipe_debug_9 (pipe_debug_9), + .pipe_debug (pipe_debug), + + .common_commands_in ( common_commands_in ), + .pipe_rx_0_sigs ( pipe_rx_0_sigs ), + .pipe_rx_1_sigs ( pipe_rx_1_sigs ), + .pipe_rx_2_sigs ( pipe_rx_2_sigs ), + .pipe_rx_3_sigs ( pipe_rx_3_sigs ), + .pipe_rx_4_sigs ( pipe_rx_4_sigs ), + .pipe_rx_5_sigs ( pipe_rx_5_sigs ), + .pipe_rx_6_sigs ( pipe_rx_6_sigs ), + .pipe_rx_7_sigs ( pipe_rx_7_sigs ), + + .common_commands_out ( common_commands_out ), + .pipe_tx_0_sigs ( pipe_tx_0_sigs ), + .pipe_tx_1_sigs ( pipe_tx_1_sigs ), + .pipe_tx_2_sigs ( pipe_tx_2_sigs ), + .pipe_tx_3_sigs ( pipe_tx_3_sigs ), + .pipe_tx_4_sigs ( pipe_tx_4_sigs ), + .pipe_tx_5_sigs ( pipe_tx_5_sigs ), + .pipe_tx_6_sigs ( pipe_tx_6_sigs ), + .pipe_tx_7_sigs ( pipe_tx_7_sigs ), + + .cfg_dev_id_pf0 ( cfg_dev_id_pf0 ), + .cfg_ven_id ( cfg_ven_id ), + .cfg_rev_id_pf0 ( cfg_rev_id_pf0 ), + .cfg_subsys_id_pf0 ( cfg_subsys_id_pf0 ), + .cfg_subsys_ven_id ( cfg_subsys_ven_id ), + + .pipe_mmcm_rst_n (pipe_mmcm_rst_n), // Async | Async + .sys_clk (sys_clk), + .sys_rst_n (sys_rst_n) + ); + +endmodule + + + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_7x.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_7x.v new file mode 100644 index 0000000000000000000000000000000000000000..6327e773090a29aa95480865118fca98d3902762 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_7x.v @@ -0,0 +1,1635 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_7x.v +// Version : 3.3 +// +// Description: Solution wrapper for Virtex7 Hard Block for PCI Express +// +// +// +//-------------------------------------------------------------------------------- +`ifndef PCIE_2LM +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_7x # ( + // PCIE_2_1 params + parameter [11:0] AER_BASE_PTR = 12'h140, + parameter AER_CAP_ECRC_CHECK_CAPABLE = "FALSE", + parameter AER_CAP_ECRC_GEN_CAPABLE = "FALSE", + parameter [15:0] AER_CAP_ID = 16'h0001, + parameter AER_CAP_MULTIHEADER = "FALSE", + parameter [11:0] AER_CAP_NEXTPTR = 12'h178, + parameter AER_CAP_ON = "FALSE", + parameter [23:0] AER_CAP_OPTIONAL_ERR_SUPPORT = 24'h000000, + parameter AER_CAP_PERMIT_ROOTERR_UPDATE = "TRUE", + parameter [3:0] AER_CAP_VERSION = 4'h1, + parameter ALLOW_X8_GEN2 = "FALSE", + parameter [31:0] BAR0 = 32'hFFFFFF00, + parameter [31:0] BAR1 = 32'hFFFF0000, + parameter [31:0] BAR2 = 32'hFFFF000C, + parameter [31:0] BAR3 = 32'hFFFFFFFF, + parameter [31:0] BAR4 = 32'h00000000, + parameter [31:0] BAR5 = 32'h00000000, + parameter [7:0] CAPABILITIES_PTR = 8'h40, + parameter [31:0] CARDBUS_CIS_POINTER = 32'h00000000, + parameter CFG_ECRC_ERR_CPLSTAT = 0, + parameter [23:0] CLASS_CODE = 24'h000000, + parameter CMD_INTX_IMPLEMENTED = "TRUE", + parameter CPL_TIMEOUT_DISABLE_SUPPORTED = "FALSE", + parameter [3:0] CPL_TIMEOUT_RANGES_SUPPORTED = 4'h0, + parameter [6:0] CRM_MODULE_RSTS = 7'h00, + parameter C_DATA_WIDTH = 64, + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, + parameter KEEP_WIDTH = C_DATA_WIDTH / 8, + parameter DEV_CAP2_ARI_FORWARDING_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED = "FALSE", + parameter DEV_CAP2_CAS128_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED = "FALSE", + parameter DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED = "FALSE", + parameter DEV_CAP2_LTR_MECHANISM_SUPPORTED = "FALSE", + parameter [1:0] DEV_CAP2_MAX_ENDEND_TLP_PREFIXES = 2'h0, + parameter DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING = "FALSE", + parameter [1:0] DEV_CAP2_TPH_COMPLETER_SUPPORTED = 2'h0, + parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE = "TRUE", + parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE = "TRUE", + parameter integer DEV_CAP_ENDPOINT_L0S_LATENCY = 0, + parameter integer DEV_CAP_ENDPOINT_L1_LATENCY = 0, + parameter DEV_CAP_EXT_TAG_SUPPORTED = "TRUE", + parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "FALSE", + parameter integer DEV_CAP_MAX_PAYLOAD_SUPPORTED = 2, + parameter integer DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT = 0, + parameter DEV_CAP_ROLE_BASED_ERROR = "TRUE", + parameter integer DEV_CAP_RSVD_14_12 = 0, + parameter integer DEV_CAP_RSVD_17_16 = 0, + parameter integer DEV_CAP_RSVD_31_29 = 0, + parameter DEV_CONTROL_AUX_POWER_SUPPORTED = "FALSE", + parameter DEV_CONTROL_EXT_TAG_DEFAULT = "FALSE", + parameter DISABLE_ASPM_L1_TIMER = "FALSE", + parameter DISABLE_BAR_FILTERING = "FALSE", + parameter DISABLE_ERR_MSG = "FALSE", + parameter DISABLE_ID_CHECK = "FALSE", + parameter DISABLE_LANE_REVERSAL = "FALSE", + parameter DISABLE_LOCKED_FILTER = "FALSE", + parameter DISABLE_PPM_FILTER = "FALSE", + parameter DISABLE_RX_POISONED_RESP = "FALSE", + parameter DISABLE_RX_TC_FILTER = "FALSE", + parameter DISABLE_SCRAMBLING = "FALSE", + parameter [7:0] DNSTREAM_LINK_NUM = 8'h00, + parameter [11:0] DSN_BASE_PTR = 12'h100, + parameter [15:0] DSN_CAP_ID = 16'h0003, + parameter [11:0] DSN_CAP_NEXTPTR = 12'h10C, + parameter DSN_CAP_ON = "TRUE", + parameter [3:0] DSN_CAP_VERSION = 4'h1, + parameter [10:0] ENABLE_MSG_ROUTE = 11'h000, + parameter ENABLE_RX_TD_ECRC_TRIM = "FALSE", + parameter ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED = "FALSE", + parameter ENTER_RVRY_EI_L0 = "TRUE", + parameter EXIT_LOOPBACK_ON_EI = "TRUE", + parameter [31:0] EXPANSION_ROM = 32'hFFFFF001, + parameter [5:0] EXT_CFG_CAP_PTR = 6'h3F, + parameter [9:0] EXT_CFG_XP_CAP_PTR = 10'h3FF, + parameter [7:0] HEADER_TYPE = 8'h00, + parameter [4:0] INFER_EI = 5'h00, + parameter [7:0] INTERRUPT_PIN = 8'h01, + parameter INTERRUPT_STAT_AUTO = "TRUE", + parameter IS_SWITCH = "FALSE", + parameter [9:0] LAST_CONFIG_DWORD = 10'h3FF, + parameter LINK_CAP_ASPM_OPTIONALITY = "TRUE", + parameter integer LINK_CAP_ASPM_SUPPORT = 1, + parameter LINK_CAP_CLOCK_POWER_MANAGEMENT = "FALSE", + parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP = "FALSE", + parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN1 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN2 = 7, + parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP = "FALSE", + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1, + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08, + parameter integer LINK_CAP_RSVD_23 = 0, + parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE = "FALSE", + parameter integer LINK_CONTROL_RCB = 0, + parameter LINK_CTRL2_DEEMPHASIS = "FALSE", + parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE = "FALSE", + parameter [3:0] LINK_CTRL2_TARGET_LINK_SPEED = 4'h2, + parameter LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE", + parameter [14:0] LL_ACK_TIMEOUT = 15'h0000, + parameter LL_ACK_TIMEOUT_EN = "FALSE", + parameter integer LL_ACK_TIMEOUT_FUNC = 0, + parameter [14:0] LL_REPLAY_TIMEOUT = 15'h0000, + parameter LL_REPLAY_TIMEOUT_EN = "FALSE", + parameter integer LL_REPLAY_TIMEOUT_FUNC = 0, + parameter [5:0] LTSSM_MAX_LINK_WIDTH = 6'h01, + parameter MPS_FORCE = "FALSE", + parameter [7:0] MSIX_BASE_PTR = 8'h9C, + parameter [7:0] MSIX_CAP_ID = 8'h11, + parameter [7:0] MSIX_CAP_NEXTPTR = 8'h00, + parameter MSIX_CAP_ON = "FALSE", + parameter integer MSIX_CAP_PBA_BIR = 0, + parameter [28:0] MSIX_CAP_PBA_OFFSET = 29'h00000050, + parameter integer MSIX_CAP_TABLE_BIR = 0, + parameter [28:0] MSIX_CAP_TABLE_OFFSET = 29'h00000040, + parameter [10:0] MSIX_CAP_TABLE_SIZE = 11'h000, + parameter [7:0] MSI_BASE_PTR = 8'h48, + parameter MSI_CAP_64_BIT_ADDR_CAPABLE = "TRUE", + parameter [7:0] MSI_CAP_ID = 8'h05, + parameter integer MSI_CAP_MULTIMSGCAP = 0, + parameter integer MSI_CAP_MULTIMSG_EXTENSION = 0, + parameter [7:0] MSI_CAP_NEXTPTR = 8'h60, + parameter MSI_CAP_ON = "FALSE", + parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE = "TRUE", + parameter integer N_FTS_COMCLK_GEN1 = 255, + parameter integer N_FTS_COMCLK_GEN2 = 255, + parameter integer N_FTS_GEN1 = 255, + parameter integer N_FTS_GEN2 = 255, + parameter [7:0] PCIE_BASE_PTR = 8'h60, + parameter [7:0] PCIE_CAP_CAPABILITY_ID = 8'h10, + parameter [3:0] PCIE_CAP_CAPABILITY_VERSION = 4'h2, + parameter [3:0] PCIE_CAP_DEVICE_PORT_TYPE = 4'h0, + parameter [7:0] PCIE_CAP_NEXTPTR = 8'h9C, + parameter PCIE_CAP_ON = "TRUE", + parameter integer PCIE_CAP_RSVD_15_14 = 0, + parameter PCIE_CAP_SLOT_IMPLEMENTED = "FALSE", + parameter integer PCIE_REVISION = 2, + parameter integer PL_AUTO_CONFIG = 0, + parameter PL_FAST_TRAIN = "FALSE", + parameter [14:0] PM_ASPML0S_TIMEOUT = 15'h0000, + parameter PM_ASPML0S_TIMEOUT_EN = "FALSE", + parameter integer PM_ASPML0S_TIMEOUT_FUNC = 0, + parameter PM_ASPM_FASTEXIT = "FALSE", + parameter [7:0] PM_BASE_PTR = 8'h40, + parameter integer PM_CAP_AUXCURRENT = 0, + parameter PM_CAP_D1SUPPORT = "TRUE", + parameter PM_CAP_D2SUPPORT = "TRUE", + parameter PM_CAP_DSI = "FALSE", + parameter [7:0] PM_CAP_ID = 8'h01, + parameter [7:0] PM_CAP_NEXTPTR = 8'h48, + parameter PM_CAP_ON = "TRUE", + parameter [4:0] PM_CAP_PMESUPPORT = 5'h0F, + parameter PM_CAP_PME_CLOCK = "FALSE", + parameter integer PM_CAP_RSVD_04 = 0, + parameter integer PM_CAP_VERSION = 3, + parameter PM_CSR_B2B3 = "FALSE", + parameter PM_CSR_BPCCEN = "FALSE", + parameter PM_CSR_NOSOFTRST = "TRUE", + parameter [7:0] PM_DATA0 = 8'h01, + parameter [7:0] PM_DATA1 = 8'h01, + parameter [7:0] PM_DATA2 = 8'h01, + parameter [7:0] PM_DATA3 = 8'h01, + parameter [7:0] PM_DATA4 = 8'h01, + parameter [7:0] PM_DATA5 = 8'h01, + parameter [7:0] PM_DATA6 = 8'h01, + parameter [7:0] PM_DATA7 = 8'h01, + parameter [1:0] PM_DATA_SCALE0 = 2'h1, + parameter [1:0] PM_DATA_SCALE1 = 2'h1, + parameter [1:0] PM_DATA_SCALE2 = 2'h1, + parameter [1:0] PM_DATA_SCALE3 = 2'h1, + parameter [1:0] PM_DATA_SCALE4 = 2'h1, + parameter [1:0] PM_DATA_SCALE5 = 2'h1, + parameter [1:0] PM_DATA_SCALE6 = 2'h1, + parameter [1:0] PM_DATA_SCALE7 = 2'h1, + parameter PM_MF = "FALSE", + parameter [11:0] RBAR_BASE_PTR = 12'h178, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR0 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR1 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR2 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR3 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR4 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR5 = 5'h00, + parameter [15:0] RBAR_CAP_ID = 16'h0015, + parameter [2:0] RBAR_CAP_INDEX0 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX1 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX2 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX3 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX4 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX5 = 3'h0, + parameter [11:0] RBAR_CAP_NEXTPTR = 12'h000, + parameter RBAR_CAP_ON = "FALSE", + parameter [31:0] RBAR_CAP_SUP0 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP1 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP2 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP3 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP4 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP5 = 32'h00000000, + parameter [3:0] RBAR_CAP_VERSION = 4'h1, + parameter [2:0] RBAR_NUM = 3'h1, + parameter integer RECRC_CHK = 0, + parameter RECRC_CHK_TRIM = "FALSE", + parameter ROOT_CAP_CRS_SW_VISIBILITY = "FALSE", + parameter [1:0] RP_AUTO_SPD = 2'h1, + parameter [4:0] RP_AUTO_SPD_LOOPCNT = 5'h1f, + parameter SELECT_DLL_IF = "FALSE", + parameter SIM_VERSION = "1.0", + parameter SLOT_CAP_ATT_BUTTON_PRESENT = "FALSE", + parameter SLOT_CAP_ATT_INDICATOR_PRESENT = "FALSE", + parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT = "FALSE", + parameter SLOT_CAP_HOTPLUG_CAPABLE = "FALSE", + parameter SLOT_CAP_HOTPLUG_SURPRISE = "FALSE", + parameter SLOT_CAP_MRL_SENSOR_PRESENT = "FALSE", + parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT = "FALSE", + parameter [12:0] SLOT_CAP_PHYSICAL_SLOT_NUM = 13'h0000, + parameter SLOT_CAP_POWER_CONTROLLER_PRESENT = "FALSE", + parameter SLOT_CAP_POWER_INDICATOR_PRESENT = "FALSE", + parameter integer SLOT_CAP_SLOT_POWER_LIMIT_SCALE = 0, + parameter [7:0] SLOT_CAP_SLOT_POWER_LIMIT_VALUE = 8'h00, + parameter integer SPARE_BIT0 = 0, + parameter integer SPARE_BIT1 = 0, + parameter integer SPARE_BIT2 = 0, + parameter integer SPARE_BIT3 = 0, + parameter integer SPARE_BIT4 = 0, + parameter integer SPARE_BIT5 = 0, + parameter integer SPARE_BIT6 = 0, + parameter integer SPARE_BIT7 = 0, + parameter integer SPARE_BIT8 = 0, + parameter [7:0] SPARE_BYTE0 = 8'h00, + parameter [7:0] SPARE_BYTE1 = 8'h00, + parameter [7:0] SPARE_BYTE2 = 8'h00, + parameter [7:0] SPARE_BYTE3 = 8'h00, + parameter [31:0] SPARE_WORD0 = 32'h00000000, + parameter [31:0] SPARE_WORD1 = 32'h00000000, + parameter [31:0] SPARE_WORD2 = 32'h00000000, + parameter [31:0] SPARE_WORD3 = 32'h00000000, + parameter SSL_MESSAGE_AUTO = "FALSE", + parameter TECRC_EP_INV = "FALSE", + parameter TL_RBYPASS = "FALSE", + parameter integer TL_RX_RAM_RADDR_LATENCY = 0, + parameter integer TL_RX_RAM_RDATA_LATENCY = 2, + parameter integer TL_RX_RAM_WRITE_LATENCY = 0, + parameter TL_TFC_DISABLE = "FALSE", + parameter TL_TX_CHECKS_DISABLE = "FALSE", + parameter integer TL_TX_RAM_RADDR_LATENCY = 0, + parameter integer TL_TX_RAM_RDATA_LATENCY = 2, + parameter integer TL_TX_RAM_WRITE_LATENCY = 0, + parameter TRN_DW = "FALSE", + parameter TRN_NP_FC = "FALSE", + parameter UPCONFIG_CAPABLE = "TRUE", + parameter UPSTREAM_FACING = "TRUE", + parameter UR_ATOMIC = "TRUE", + parameter UR_CFG1 = "TRUE", + parameter UR_INV_REQ = "TRUE", + parameter UR_PRS_RESPONSE = "TRUE", + parameter USER_CLK2_DIV2 = "FALSE", + parameter integer USER_CLK_FREQ = 3, + parameter USE_RID_PINS = "FALSE", + parameter VC0_CPL_INFINITE = "TRUE", + parameter [12:0] VC0_RX_RAM_LIMIT = 13'h03FF, + parameter integer VC0_TOTAL_CREDITS_CD = 127, + parameter integer VC0_TOTAL_CREDITS_CH = 31, + parameter integer VC0_TOTAL_CREDITS_NPD = 24, + parameter integer VC0_TOTAL_CREDITS_NPH = 12, + parameter integer VC0_TOTAL_CREDITS_PD = 288, + parameter integer VC0_TOTAL_CREDITS_PH = 32, + parameter integer VC0_TX_LASTPACKET = 31, + parameter [11:0] VC_BASE_PTR = 12'h10C, + parameter [15:0] VC_CAP_ID = 16'h0002, + parameter [11:0] VC_CAP_NEXTPTR = 12'h000, + parameter VC_CAP_ON = "FALSE", + parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS = "FALSE", + parameter [3:0] VC_CAP_VERSION = 4'h1, + parameter [11:0] VSEC_BASE_PTR = 12'h128, + parameter [15:0] VSEC_CAP_HDR_ID = 16'h1234, + parameter [11:0] VSEC_CAP_HDR_LENGTH = 12'h018, + parameter [3:0] VSEC_CAP_HDR_REVISION = 4'h1, + parameter [15:0] VSEC_CAP_ID = 16'h000B, + parameter VSEC_CAP_IS_LINK_VISIBLE = "TRUE", + parameter [11:0] VSEC_CAP_NEXTPTR = 12'h140, + parameter VSEC_CAP_ON = "FALSE", + parameter [3:0] VSEC_CAP_VERSION = 4'h1, + parameter ENABLE_JTAG_DBG = "FALSE" +) +( + input wire [C_DATA_WIDTH-1:0] trn_td, + input wire [REM_WIDTH-1:0] trn_trem, + input wire trn_tsof, + input wire trn_teof, + input wire trn_tsrc_rdy, + input wire trn_tsrc_dsc, + input wire trn_terrfwd, + input wire trn_tecrc_gen, + input wire trn_tstr, + input wire trn_tcfg_gnt, + input wire trn_rdst_rdy, + input wire trn_rnp_req, + input wire trn_rfcp_ret, + input wire trn_rnp_ok, + input wire [2:0] trn_fc_sel, + input wire [31:0] trn_tdllp_data, + input wire trn_tdllp_src_rdy, + input wire ll2_tlp_rcv, + input wire ll2_send_enter_l1, + input wire ll2_send_enter_l23, + input wire ll2_send_as_req_l1, + input wire ll2_send_pm_ack, + input wire [4:0] pl2_directed_lstate, + input wire ll2_suspend_now, + input wire tl2_ppm_suspend_req, + input wire tl2_aspm_suspend_credit_check, + input wire [1:0] pl_directed_link_change, + input wire [1:0] pl_directed_link_width, + input wire pl_directed_link_speed, + input wire pl_directed_link_auton, + input wire pl_upstream_prefer_deemph, + input wire pl_downstream_deemph_source, + input wire pl_directed_ltssm_new_vld, + input wire [5:0] pl_directed_ltssm_new, + input wire pl_directed_ltssm_stall, + input wire [1:0] pipe_rx0_char_is_k, + input wire [1:0] pipe_rx1_char_is_k, + input wire [1:0] pipe_rx2_char_is_k, + input wire [1:0] pipe_rx3_char_is_k, + input wire [1:0] pipe_rx4_char_is_k, + input wire [1:0] pipe_rx5_char_is_k, + input wire [1:0] pipe_rx6_char_is_k, + input wire [1:0] pipe_rx7_char_is_k, + input wire pipe_rx0_valid, + input wire pipe_rx1_valid, + input wire pipe_rx2_valid, + input wire pipe_rx3_valid, + input wire pipe_rx4_valid, + input wire pipe_rx5_valid, + input wire pipe_rx6_valid, + input wire pipe_rx7_valid, + input wire [15:0] pipe_rx0_data, + input wire [15:0] pipe_rx1_data, + input wire [15:0] pipe_rx2_data, + input wire [15:0] pipe_rx3_data, + input wire [15:0] pipe_rx4_data, + input wire [15:0] pipe_rx5_data, + input wire [15:0] pipe_rx6_data, + input wire [15:0] pipe_rx7_data, + input wire pipe_rx0_chanisaligned, + input wire pipe_rx1_chanisaligned, + input wire pipe_rx2_chanisaligned, + input wire pipe_rx3_chanisaligned, + input wire pipe_rx4_chanisaligned, + input wire pipe_rx5_chanisaligned, + input wire pipe_rx6_chanisaligned, + input wire pipe_rx7_chanisaligned, + input wire [2:0] pipe_rx0_status, + input wire [2:0] pipe_rx1_status, + input wire [2:0] pipe_rx2_status, + input wire [2:0] pipe_rx3_status, + input wire [2:0] pipe_rx4_status, + input wire [2:0] pipe_rx5_status, + input wire [2:0] pipe_rx6_status, + input wire [2:0] pipe_rx7_status, + input wire pipe_rx0_phy_status, + input wire pipe_rx1_phy_status, + input wire pipe_rx2_phy_status, + input wire pipe_rx3_phy_status, + input wire pipe_rx4_phy_status, + input wire pipe_rx5_phy_status, + input wire pipe_rx6_phy_status, + input wire pipe_rx7_phy_status, + input wire pipe_rx0_elec_idle, + input wire pipe_rx1_elec_idle, + input wire pipe_rx2_elec_idle, + input wire pipe_rx3_elec_idle, + input wire pipe_rx4_elec_idle, + input wire pipe_rx5_elec_idle, + input wire pipe_rx6_elec_idle, + input wire pipe_rx7_elec_idle, + input wire pipe_clk, + input wire user_clk, + input wire user_clk2, + input wire user_clk_prebuf, + input wire user_clk_prebuf_en, +`ifdef B_TESTMODE + input wire scanmode_n, + input wire scanenable_n, + input wire edt_clk, + input wire edt_bypass, + input wire edt_update, + input wire edt_configuration, + input wire edt_single_bypass_chain, + input wire edt_channels_in1, + input wire edt_channels_in2, + input wire edt_channels_in3, + input wire edt_channels_in4, + input wire edt_channels_in5, + input wire edt_channels_in6, + input wire edt_channels_in7, + input wire edt_channels_in8, + input wire pmv_enable_n, + input wire [2:0] pmv_select, + input wire [1:0] pmv_divide, +`endif + input wire sys_rst_n, + input wire cm_rst_n, + input wire cm_sticky_rst_n, + input wire func_lvl_rst_n, + input wire tl_rst_n, + input wire dl_rst_n, + input wire pl_rst_n, + input wire pl_transmit_hot_rst, +// input wire cfg_reset, +// input wire gwe, +// input wire grestore, +// input wire ghigh, + input wire [31:0] cfg_mgmt_di, + input wire [3:0] cfg_mgmt_byte_en_n, + input wire [9:0] cfg_mgmt_dwaddr, + input wire cfg_mgmt_wr_rw1c_as_rw_n, + input wire cfg_mgmt_wr_readonly_n, + input wire cfg_mgmt_wr_en_n, + input wire cfg_mgmt_rd_en_n, + input wire cfg_err_malformed_n, + input wire cfg_err_cor_n, + input wire cfg_err_ur_n, + input wire cfg_err_ecrc_n, + input wire cfg_err_cpl_timeout_n, + input wire cfg_err_cpl_abort_n, + input wire cfg_err_cpl_unexpect_n, + input wire cfg_err_poisoned_n, + input wire cfg_err_acs_n, + input wire cfg_err_atomic_egress_blocked_n, + input wire cfg_err_mc_blocked_n, + input wire cfg_err_internal_uncor_n, + input wire cfg_err_internal_cor_n, + input wire cfg_err_posted_n, + input wire cfg_err_locked_n, + input wire cfg_err_norecovery_n, + input wire [127:0] cfg_err_aer_headerlog, + input wire [47:0] cfg_err_tlp_cpl_header, + input wire cfg_interrupt_n, + input wire [7:0] cfg_interrupt_di, + input wire cfg_interrupt_assert_n, + input wire cfg_interrupt_stat_n, + input wire [7:0] cfg_ds_bus_number, + input wire [4:0] cfg_ds_device_number, + input wire [2:0] cfg_ds_function_number, + input wire [7:0] cfg_port_number, + input wire cfg_pm_halt_aspm_l0s_n, + input wire cfg_pm_halt_aspm_l1_n, + input wire cfg_pm_force_state_en_n, + input wire [1:0] cfg_pm_force_state, + input wire cfg_pm_wake_n, + input wire cfg_pm_turnoff_ok_n, + input wire cfg_pm_send_pme_to_n, + input wire [4:0] cfg_pciecap_interrupt_msgnum, + input wire cfg_trn_pending_n, + input wire [2:0] cfg_force_mps, + input wire cfg_force_common_clock_off, + input wire cfg_force_extended_sync_on, + input wire [63:0] cfg_dsn, + input wire [4:0] cfg_aer_interrupt_msgnum, + input wire [15:0] cfg_dev_id, + input wire [15:0] cfg_vend_id, + input wire [7:0] cfg_rev_id, + input wire [15:0] cfg_subsys_id, + input wire [15:0] cfg_subsys_vend_id, + input wire drp_clk, + input wire drp_en, + input wire drp_we, + input wire [8:0] drp_addr, + input wire [15:0] drp_di, + input wire [1:0] dbg_mode, + input wire dbg_sub_mode, + input wire [2:0] pl_dbg_mode, + + output wire trn_clk, + + output wire trn_tdst_rdy, + output wire trn_terr_drop, + output wire [5:0] trn_tbuf_av, + output wire trn_tcfg_req, + + //output wire [C_DATA_WIDTH-1:0] trn_rd, + output wire [127:0] trn_rd, + + output wire [1:0] trn_rrem, + output wire trn_rsof, + output wire trn_reof, + output wire trn_rsrc_rdy, + output wire trn_rsrc_dsc, + output wire trn_recrc_err, + output wire trn_rerrfwd, + output wire [7:0] trn_rbar_hit, + output wire trn_lnk_up, + output wire [7:0] trn_fc_ph, + output wire [11:0] trn_fc_pd, + output wire [7:0] trn_fc_nph, + output wire [11:0] trn_fc_npd, + output wire [7:0] trn_fc_cplh, + output wire [11:0] trn_fc_cpld, + output wire trn_tdllp_dst_rdy, + output wire [63:0] trn_rdllp_data, + output wire [1:0] trn_rdllp_src_rdy, + output wire ll2_tfc_init1_seq, + output wire ll2_tfc_init2_seq, + output wire pl2_suspend_ok, + output wire pl2_recovery, + output wire pl2_rx_elec_idle, + output wire [1:0] pl2_rx_pm_state, + output wire pl2_l0_req, + output wire ll2_suspend_ok, + output wire ll2_tx_idle, + output wire [4:0] ll2_link_status, + output wire tl2_ppm_suspend_ok, + output wire tl2_aspm_suspend_req, + output wire tl2_aspm_suspend_credit_check_ok, + output wire pl2_link_up, + output wire pl2_receiver_err, + output wire ll2_receiver_err, + output wire ll2_protocol_err, + output wire ll2_bad_tlp_err, + output wire ll2_bad_dllp_err, + output wire ll2_replay_ro_err, + output wire ll2_replay_to_err, + output wire [63:0] tl2_err_hdr, + output wire tl2_err_malformed, + output wire tl2_err_rxoverflow, + output wire tl2_err_fcpe, + output wire pl_sel_lnk_rate, + output wire [1:0] pl_sel_lnk_width, + output wire [5:0] pl_ltssm_state, + output wire [1:0] pl_lane_reversal_mode, + output wire pl_phy_lnk_up_n, + output wire [2:0] pl_tx_pm_state, + output wire [1:0] pl_rx_pm_state, + output wire pl_link_upcfg_cap, + output wire pl_link_gen2_cap, + output wire pl_link_partner_gen2_supported, + output wire [2:0] pl_initial_link_width, + output wire pl_directed_change_done, + output wire pipe_tx_rcvr_det, + output wire pipe_tx_reset, + output wire pipe_tx_rate, + output wire pipe_tx_deemph, + output wire [2:0] pipe_tx_margin, + output wire pipe_rx0_polarity, + output wire pipe_rx1_polarity, + output wire pipe_rx2_polarity, + output wire pipe_rx3_polarity, + output wire pipe_rx4_polarity, + output wire pipe_rx5_polarity, + output wire pipe_rx6_polarity, + output wire pipe_rx7_polarity, + output wire pipe_tx0_compliance, + output wire pipe_tx1_compliance, + output wire pipe_tx2_compliance, + output wire pipe_tx3_compliance, + output wire pipe_tx4_compliance, + output wire pipe_tx5_compliance, + output wire pipe_tx6_compliance, + output wire pipe_tx7_compliance, + output wire [1:0] pipe_tx0_char_is_k, + output wire [1:0] pipe_tx1_char_is_k, + output wire [1:0] pipe_tx2_char_is_k, + output wire [1:0] pipe_tx3_char_is_k, + output wire [1:0] pipe_tx4_char_is_k, + output wire [1:0] pipe_tx5_char_is_k, + output wire [1:0] pipe_tx6_char_is_k, + output wire [1:0] pipe_tx7_char_is_k, + output wire [15:0] pipe_tx0_data, + output wire [15:0] pipe_tx1_data, + output wire [15:0] pipe_tx2_data, + output wire [15:0] pipe_tx3_data, + output wire [15:0] pipe_tx4_data, + output wire [15:0] pipe_tx5_data, + output wire [15:0] pipe_tx6_data, + output wire [15:0] pipe_tx7_data, + output wire pipe_tx0_elec_idle, + output wire pipe_tx1_elec_idle, + output wire pipe_tx2_elec_idle, + output wire pipe_tx3_elec_idle, + output wire pipe_tx4_elec_idle, + output wire pipe_tx5_elec_idle, + output wire pipe_tx6_elec_idle, + output wire pipe_tx7_elec_idle, + output wire [1:0] pipe_tx0_powerdown, + output wire [1:0] pipe_tx1_powerdown, + output wire [1:0] pipe_tx2_powerdown, + output wire [1:0] pipe_tx3_powerdown, + output wire [1:0] pipe_tx4_powerdown, + output wire [1:0] pipe_tx5_powerdown, + output wire [1:0] pipe_tx6_powerdown, + output wire [1:0] pipe_tx7_powerdown, +`ifdef B_TESTMODE + output wire pmv_out, +`endif + output wire user_rst_n, + output wire pl_received_hot_rst, + output wire received_func_lvl_rst_n, + output wire lnk_clk_en, + output wire [31:0] cfg_mgmt_do, + output wire cfg_mgmt_rd_wr_done_n, + output wire cfg_err_aer_headerlog_set_n, + output wire cfg_err_cpl_rdy_n, + output wire cfg_interrupt_rdy_n, + output wire [2:0] cfg_interrupt_mmenable, + output wire cfg_interrupt_msienable, + output wire [7:0] cfg_interrupt_do, + output wire cfg_interrupt_msixenable, + output wire cfg_interrupt_msixfm, + output wire cfg_msg_received, + output wire [15:0] cfg_msg_data, + output wire cfg_msg_received_err_cor, + output wire cfg_msg_received_err_non_fatal, + output wire cfg_msg_received_err_fatal, + output wire cfg_msg_received_assert_int_a, + output wire cfg_msg_received_deassert_int_a, + output wire cfg_msg_received_assert_int_b, + output wire cfg_msg_received_deassert_int_b, + output wire cfg_msg_received_assert_int_c, + output wire cfg_msg_received_deassert_int_c, + output wire cfg_msg_received_assert_int_d, + output wire cfg_msg_received_deassert_int_d, + output wire cfg_msg_received_pm_pme, + output wire cfg_msg_received_pme_to_ack, + output wire cfg_msg_received_pme_to, + output wire cfg_msg_received_setslotpowerlimit, + output wire cfg_msg_received_unlock, + output wire cfg_msg_received_pm_as_nak, + output wire [2:0] cfg_pcie_link_state, + output wire cfg_pm_rcv_as_req_l1_n, + output wire cfg_pm_rcv_enter_l1_n, + output wire cfg_pm_rcv_enter_l23_n, + output wire cfg_pm_rcv_req_ack_n, + output wire [1:0] cfg_pmcsr_powerstate, + output wire cfg_pmcsr_pme_en, + output wire cfg_pmcsr_pme_status, + output wire cfg_transaction, + output wire cfg_transaction_type, + output wire [6:0] cfg_transaction_addr, + output wire cfg_command_io_enable, + output wire cfg_command_mem_enable, + output wire cfg_command_bus_master_enable, + output wire cfg_command_interrupt_disable, + output wire cfg_command_serr_en, + output wire cfg_bridge_serr_en, + output wire cfg_dev_status_corr_err_detected, + output wire cfg_dev_status_non_fatal_err_detected, + output wire cfg_dev_status_fatal_err_detected, + output wire cfg_dev_status_ur_detected, + output wire cfg_dev_control_corr_err_reporting_en, + output wire cfg_dev_control_non_fatal_reporting_en, + output wire cfg_dev_control_fatal_err_reporting_en, + output wire cfg_dev_control_ur_err_reporting_en, + output wire cfg_dev_control_enable_ro, + output wire [2:0] cfg_dev_control_max_payload, + output wire cfg_dev_control_ext_tag_en, + output wire cfg_dev_control_phantom_en, + output wire cfg_dev_control_aux_power_en, + output wire cfg_dev_control_no_snoop_en, + output wire [2:0] cfg_dev_control_max_read_req, + output wire [1:0] cfg_link_status_current_speed, + output wire [3:0] cfg_link_status_negotiated_width, + output wire cfg_link_status_link_training, + output wire cfg_link_status_dll_active, + output wire cfg_link_status_bandwidth_status, + output wire cfg_link_status_auto_bandwidth_status, + output wire [1:0] cfg_link_control_aspm_control, + output wire cfg_link_control_rcb, + output wire cfg_link_control_link_disable, + output wire cfg_link_control_retrain_link, + output wire cfg_link_control_common_clock, + output wire cfg_link_control_extended_sync, + output wire cfg_link_control_clock_pm_en, + output wire cfg_link_control_hw_auto_width_dis, + output wire cfg_link_control_bandwidth_int_en, + output wire cfg_link_control_auto_bandwidth_int_en, + output wire [3:0] cfg_dev_control2_cpl_timeout_val, + output wire cfg_dev_control2_cpl_timeout_dis, + output wire cfg_dev_control2_ari_forward_en, + output wire cfg_dev_control2_atomic_requester_en, + output wire cfg_dev_control2_atomic_egress_block, + output wire cfg_dev_control2_ido_req_en, + output wire cfg_dev_control2_ido_cpl_en, + output wire cfg_dev_control2_ltr_en, + output wire cfg_dev_control2_tlp_prefix_block, + output wire cfg_slot_control_electromech_il_ctl_pulse, + output wire cfg_root_control_syserr_corr_err_en, + output wire cfg_root_control_syserr_non_fatal_err_en, + output wire cfg_root_control_syserr_fatal_err_en, + output wire cfg_root_control_pme_int_en, + output wire cfg_aer_ecrc_check_en, + output wire cfg_aer_ecrc_gen_en, + output wire cfg_aer_rooterr_corr_err_reporting_en, + output wire cfg_aer_rooterr_non_fatal_err_reporting_en, + output wire cfg_aer_rooterr_fatal_err_reporting_en, + output wire cfg_aer_rooterr_corr_err_received, + output wire cfg_aer_rooterr_non_fatal_err_received, + output wire cfg_aer_rooterr_fatal_err_received, + output wire [6:0] cfg_vc_tcvc_map, + output wire drp_rdy, + output wire [15:0] drp_do, + output wire [63:0] dbg_vec_a, + output wire [63:0] dbg_vec_b, + output wire [11:0] dbg_vec_c, + output wire dbg_sclr_a, + output wire dbg_sclr_b, + output wire dbg_sclr_c, + output wire dbg_sclr_d, + output wire dbg_sclr_e, + output wire dbg_sclr_f, + output wire dbg_sclr_g, + output wire dbg_sclr_h, + output wire dbg_sclr_i, + output wire dbg_sclr_j, + output wire dbg_sclr_k, + output wire [11:0] pl_dbg_vec +// output wire [18:0] xil_unconn_out +); + + localparam TCQ = 1; + + wire [3:0] trn_tdst_rdy_bus; + + // Assignments to outputs + assign trn_clk = user_clk2; + assign trn_tdst_rdy = trn_tdst_rdy_bus[0]; + + //----------------------------------------------------------------------// + // BRAM // + //----------------------------------------------------------------------// + + // transmit bram interface + wire mim_tx_wen; + wire [12:0] mim_tx_waddr; + wire [68:0] mim_tx_wdata; + wire mim_tx_ren; + wire mim_tx_rce; + wire [12:0] mim_tx_raddr; + wire [68:0] mim_tx_rdata; + wire [2:0] unused_mim_tx_rdata; + + // receive bram interface + wire mim_rx_wen; + wire [12:0] mim_rx_waddr; + wire [67:0] mim_rx_wdata; + wire mim_rx_ren; + wire mim_rx_rce; + wire [12:0] mim_rx_raddr; + wire [67:0] mim_rx_rdata; + wire [3:0] unused_mim_rx_rdata; + +pcie_7x_0_pcie_bram_top_7x #( + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .DEV_CAP_MAX_PAYLOAD_SUPPORTED ( DEV_CAP_MAX_PAYLOAD_SUPPORTED ), + .VC0_TX_LASTPACKET ( VC0_TX_LASTPACKET ), + .TL_TX_RAM_RADDR_LATENCY ( TL_TX_RAM_RADDR_LATENCY ), + .TL_TX_RAM_RDATA_LATENCY ( TL_TX_RAM_RDATA_LATENCY ), + .TL_TX_RAM_WRITE_LATENCY ( TL_TX_RAM_WRITE_LATENCY ), + .VC0_RX_RAM_LIMIT ( VC0_RX_RAM_LIMIT ), + .TL_RX_RAM_RADDR_LATENCY ( TL_RX_RAM_RADDR_LATENCY ), + .TL_RX_RAM_RDATA_LATENCY ( TL_RX_RAM_RDATA_LATENCY ), + .TL_RX_RAM_WRITE_LATENCY ( TL_RX_RAM_WRITE_LATENCY ) + ) pcie_bram_top ( + .user_clk_i ( user_clk ), + .reset_i ( 1'b0 ), + + .mim_tx_waddr ( mim_tx_waddr ), + .mim_tx_wen ( mim_tx_wen ), + .mim_tx_ren ( mim_tx_ren ), + .mim_tx_rce ( 1'b1 ), + .mim_tx_wdata ( {3'b0, mim_tx_wdata} ), + .mim_tx_raddr ( mim_tx_raddr ), + .mim_tx_rdata ( {unused_mim_tx_rdata, mim_tx_rdata} ), + + .mim_rx_waddr ( mim_rx_waddr ), + .mim_rx_wen ( mim_rx_wen ), + .mim_rx_ren ( mim_rx_ren ), + .mim_rx_rce ( 1'b1 ), + .mim_rx_wdata ( {4'b0, mim_rx_wdata} ), + .mim_rx_raddr ( mim_rx_raddr ), + .mim_rx_rdata ( {unused_mim_rx_rdata, mim_rx_rdata} ) + ); + + //------------------------------------------------------- + // Virtex7 PCI Express Block Module + //------------------------------------------------------- + + PCIE_2_1 #( // Verilog-2001 + .AER_BASE_PTR ( AER_BASE_PTR ), + .AER_CAP_ECRC_CHECK_CAPABLE ( AER_CAP_ECRC_CHECK_CAPABLE ), + .AER_CAP_ECRC_GEN_CAPABLE ( AER_CAP_ECRC_GEN_CAPABLE ), + .AER_CAP_ID ( AER_CAP_ID ), + .AER_CAP_MULTIHEADER ( AER_CAP_MULTIHEADER ), + .AER_CAP_NEXTPTR ( AER_CAP_NEXTPTR ), + .AER_CAP_ON ( AER_CAP_ON ), + .AER_CAP_OPTIONAL_ERR_SUPPORT ( AER_CAP_OPTIONAL_ERR_SUPPORT ), + .AER_CAP_PERMIT_ROOTERR_UPDATE ( AER_CAP_PERMIT_ROOTERR_UPDATE ), + .AER_CAP_VERSION ( AER_CAP_VERSION ), + .ALLOW_X8_GEN2 ( ALLOW_X8_GEN2 ), + .BAR0 ( BAR0 ), + .BAR1 ( BAR1 ), + .BAR2 ( BAR2 ), + .BAR3 ( BAR3 ), + .BAR4 ( BAR4 ), + .BAR5 ( BAR5 ), + .CAPABILITIES_PTR ( CAPABILITIES_PTR ), + .CARDBUS_CIS_POINTER ( CARDBUS_CIS_POINTER ), + .CFG_ECRC_ERR_CPLSTAT ( CFG_ECRC_ERR_CPLSTAT ), + .CLASS_CODE ( CLASS_CODE ), + .CMD_INTX_IMPLEMENTED ( CMD_INTX_IMPLEMENTED ), + .CPL_TIMEOUT_DISABLE_SUPPORTED ( CPL_TIMEOUT_DISABLE_SUPPORTED ), + .CPL_TIMEOUT_RANGES_SUPPORTED ( CPL_TIMEOUT_RANGES_SUPPORTED ), + .CRM_MODULE_RSTS ( CRM_MODULE_RSTS ), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ), + .DEV_CAP_ENDPOINT_L0S_LATENCY ( DEV_CAP_ENDPOINT_L0S_LATENCY ), + .DEV_CAP_ENDPOINT_L1_LATENCY ( DEV_CAP_ENDPOINT_L1_LATENCY ), + .DEV_CAP_EXT_TAG_SUPPORTED ( DEV_CAP_EXT_TAG_SUPPORTED ), + .DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ( DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ), + .DEV_CAP_MAX_PAYLOAD_SUPPORTED ( DEV_CAP_MAX_PAYLOAD_SUPPORTED ), + .DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ( DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ), + .DEV_CAP_ROLE_BASED_ERROR ( DEV_CAP_ROLE_BASED_ERROR ), + .DEV_CAP_RSVD_14_12 ( DEV_CAP_RSVD_14_12 ), + .DEV_CAP_RSVD_17_16 ( DEV_CAP_RSVD_17_16 ), + .DEV_CAP_RSVD_31_29 ( DEV_CAP_RSVD_31_29 ), + .DEV_CAP2_ARI_FORWARDING_SUPPORTED ( DEV_CAP2_ARI_FORWARDING_SUPPORTED ), + .DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED ( DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED ), + .DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED ( DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED ), + .DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED ( DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED ), + .DEV_CAP2_CAS128_COMPLETER_SUPPORTED ( DEV_CAP2_CAS128_COMPLETER_SUPPORTED ), + .DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED ( DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED ), + .DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED ( DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED ), + .DEV_CAP2_LTR_MECHANISM_SUPPORTED ( DEV_CAP2_LTR_MECHANISM_SUPPORTED ), + .DEV_CAP2_MAX_ENDEND_TLP_PREFIXES ( DEV_CAP2_MAX_ENDEND_TLP_PREFIXES ), + .DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING ( DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING ), + .DEV_CAP2_TPH_COMPLETER_SUPPORTED ( DEV_CAP2_TPH_COMPLETER_SUPPORTED ), + .DEV_CONTROL_AUX_POWER_SUPPORTED ( DEV_CONTROL_AUX_POWER_SUPPORTED ), + .DEV_CONTROL_EXT_TAG_DEFAULT ( DEV_CONTROL_EXT_TAG_DEFAULT ), + .DISABLE_ASPM_L1_TIMER ( DISABLE_ASPM_L1_TIMER ), + .DISABLE_BAR_FILTERING ( DISABLE_BAR_FILTERING ), + .DISABLE_ERR_MSG ( DISABLE_ERR_MSG ), + .DISABLE_ID_CHECK ( DISABLE_ID_CHECK ), + .DISABLE_LANE_REVERSAL ( DISABLE_LANE_REVERSAL ), + .DISABLE_LOCKED_FILTER ( DISABLE_LOCKED_FILTER ), + .DISABLE_PPM_FILTER ( DISABLE_PPM_FILTER ), + .DISABLE_RX_POISONED_RESP ( DISABLE_RX_POISONED_RESP ), + .DISABLE_RX_TC_FILTER ( DISABLE_RX_TC_FILTER ), + .DISABLE_SCRAMBLING ( DISABLE_SCRAMBLING ), + .DNSTREAM_LINK_NUM ( DNSTREAM_LINK_NUM ), + .DSN_BASE_PTR ( DSN_BASE_PTR ), + .DSN_CAP_ID ( DSN_CAP_ID ), + .DSN_CAP_NEXTPTR ( DSN_CAP_NEXTPTR ), + .DSN_CAP_ON ( DSN_CAP_ON ), + .DSN_CAP_VERSION ( DSN_CAP_VERSION ), + .ENABLE_MSG_ROUTE ( ENABLE_MSG_ROUTE ), + .ENABLE_RX_TD_ECRC_TRIM ( ENABLE_RX_TD_ECRC_TRIM ), + .ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED ( ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED ), + .ENTER_RVRY_EI_L0 ( ENTER_RVRY_EI_L0 ), + .EXIT_LOOPBACK_ON_EI ( EXIT_LOOPBACK_ON_EI ), + .EXPANSION_ROM ( EXPANSION_ROM ), + .EXT_CFG_CAP_PTR ( EXT_CFG_CAP_PTR ), + .EXT_CFG_XP_CAP_PTR ( EXT_CFG_XP_CAP_PTR ), + .HEADER_TYPE ( HEADER_TYPE ), + .INFER_EI ( INFER_EI ), + .INTERRUPT_PIN ( INTERRUPT_PIN ), + .INTERRUPT_STAT_AUTO ( INTERRUPT_STAT_AUTO ), + .IS_SWITCH ( IS_SWITCH ), + .LAST_CONFIG_DWORD ( LAST_CONFIG_DWORD ), + .LINK_CAP_ASPM_OPTIONALITY ( LINK_CAP_ASPM_OPTIONALITY ), + .LINK_CAP_ASPM_SUPPORT ( LINK_CAP_ASPM_SUPPORT ), + .LINK_CAP_CLOCK_POWER_MANAGEMENT ( LINK_CAP_CLOCK_POWER_MANAGEMENT ), + .LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ( LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ), + .LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP ( LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_GEN2 ), + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .LINK_CAP_RSVD_23 ( LINK_CAP_RSVD_23 ), + .LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ( LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ), + .LINK_CONTROL_RCB ( LINK_CONTROL_RCB ), + .LINK_CTRL2_DEEMPHASIS ( LINK_CTRL2_DEEMPHASIS ), + .LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ( LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ), + .LINK_CTRL2_TARGET_LINK_SPEED ( LINK_CTRL2_TARGET_LINK_SPEED ), + .LINK_STATUS_SLOT_CLOCK_CONFIG ( LINK_STATUS_SLOT_CLOCK_CONFIG ), + .LL_ACK_TIMEOUT ( LL_ACK_TIMEOUT ), + .LL_ACK_TIMEOUT_EN ( LL_ACK_TIMEOUT_EN ), + .LL_ACK_TIMEOUT_FUNC ( LL_ACK_TIMEOUT_FUNC ), + .LL_REPLAY_TIMEOUT ( LL_REPLAY_TIMEOUT ), + .LL_REPLAY_TIMEOUT_EN ( LL_REPLAY_TIMEOUT_EN ), + .LL_REPLAY_TIMEOUT_FUNC ( LL_REPLAY_TIMEOUT_FUNC ), + .LTSSM_MAX_LINK_WIDTH ( LTSSM_MAX_LINK_WIDTH ), + .MPS_FORCE ( MPS_FORCE ), + .MSI_BASE_PTR ( MSI_BASE_PTR ), + .MSI_CAP_ID ( MSI_CAP_ID ), + .MSI_CAP_MULTIMSG_EXTENSION ( MSI_CAP_MULTIMSG_EXTENSION ), + .MSI_CAP_MULTIMSGCAP ( MSI_CAP_MULTIMSGCAP ), + .MSI_CAP_NEXTPTR ( MSI_CAP_NEXTPTR ), + .MSI_CAP_ON ( MSI_CAP_ON ), + .MSI_CAP_PER_VECTOR_MASKING_CAPABLE ( MSI_CAP_PER_VECTOR_MASKING_CAPABLE ), + .MSI_CAP_64_BIT_ADDR_CAPABLE ( MSI_CAP_64_BIT_ADDR_CAPABLE ), + .MSIX_BASE_PTR ( MSIX_BASE_PTR ), + .MSIX_CAP_ID ( MSIX_CAP_ID ), + .MSIX_CAP_NEXTPTR ( MSIX_CAP_NEXTPTR ), + .MSIX_CAP_ON ( MSIX_CAP_ON ), + .MSIX_CAP_PBA_BIR ( MSIX_CAP_PBA_BIR ), + .MSIX_CAP_PBA_OFFSET ( MSIX_CAP_PBA_OFFSET ), + .MSIX_CAP_TABLE_BIR ( MSIX_CAP_TABLE_BIR ), + .MSIX_CAP_TABLE_OFFSET ( MSIX_CAP_TABLE_OFFSET ), + .MSIX_CAP_TABLE_SIZE ( MSIX_CAP_TABLE_SIZE ), + .N_FTS_COMCLK_GEN1 ( N_FTS_COMCLK_GEN1 ), + .N_FTS_COMCLK_GEN2 ( N_FTS_COMCLK_GEN2 ), + .N_FTS_GEN1 ( N_FTS_GEN1 ), + .N_FTS_GEN2 ( N_FTS_GEN2 ), + .PCIE_BASE_PTR ( PCIE_BASE_PTR ), + .PCIE_CAP_CAPABILITY_ID ( PCIE_CAP_CAPABILITY_ID ), + .PCIE_CAP_CAPABILITY_VERSION ( PCIE_CAP_CAPABILITY_VERSION ), + .PCIE_CAP_DEVICE_PORT_TYPE ( PCIE_CAP_DEVICE_PORT_TYPE ), + .PCIE_CAP_NEXTPTR ( PCIE_CAP_NEXTPTR ), + .PCIE_CAP_ON ( PCIE_CAP_ON ), + .PCIE_CAP_RSVD_15_14 ( PCIE_CAP_RSVD_15_14 ), + .PCIE_CAP_SLOT_IMPLEMENTED ( PCIE_CAP_SLOT_IMPLEMENTED ), + .PCIE_REVISION ( PCIE_REVISION ), + .PL_AUTO_CONFIG ( PL_AUTO_CONFIG ), + .PL_FAST_TRAIN ( PL_FAST_TRAIN ), + .PM_ASPML0S_TIMEOUT ( PM_ASPML0S_TIMEOUT ), + .PM_ASPML0S_TIMEOUT_EN ( PM_ASPML0S_TIMEOUT_EN ), + .PM_ASPML0S_TIMEOUT_FUNC ( PM_ASPML0S_TIMEOUT_FUNC ), + .PM_ASPM_FASTEXIT ( PM_ASPM_FASTEXIT ), + .PM_BASE_PTR ( PM_BASE_PTR ), + .PM_CAP_AUXCURRENT ( PM_CAP_AUXCURRENT ), + .PM_CAP_DSI ( PM_CAP_DSI ), + .PM_CAP_D1SUPPORT ( PM_CAP_D1SUPPORT ), + .PM_CAP_D2SUPPORT ( PM_CAP_D2SUPPORT ), + .PM_CAP_ID ( PM_CAP_ID ), + .PM_CAP_NEXTPTR ( PM_CAP_NEXTPTR ), + .PM_CAP_ON ( PM_CAP_ON ), + .PM_CAP_PME_CLOCK ( PM_CAP_PME_CLOCK ), + .PM_CAP_PMESUPPORT ( PM_CAP_PMESUPPORT ), + .PM_CAP_RSVD_04 ( PM_CAP_RSVD_04 ), + .PM_CAP_VERSION ( PM_CAP_VERSION ), + .PM_CSR_BPCCEN ( PM_CSR_BPCCEN ), + .PM_CSR_B2B3 ( PM_CSR_B2B3 ), + .PM_CSR_NOSOFTRST ( PM_CSR_NOSOFTRST ), + .PM_DATA_SCALE0 ( PM_DATA_SCALE0 ), + .PM_DATA_SCALE1 ( PM_DATA_SCALE1 ), + .PM_DATA_SCALE2 ( PM_DATA_SCALE2 ), + .PM_DATA_SCALE3 ( PM_DATA_SCALE3 ), + .PM_DATA_SCALE4 ( PM_DATA_SCALE4 ), + .PM_DATA_SCALE5 ( PM_DATA_SCALE5 ), + .PM_DATA_SCALE6 ( PM_DATA_SCALE6 ), + .PM_DATA_SCALE7 ( PM_DATA_SCALE7 ), + .PM_DATA0 ( PM_DATA0 ), + .PM_DATA1 ( PM_DATA1 ), + .PM_DATA2 ( PM_DATA2 ), + .PM_DATA3 ( PM_DATA3 ), + .PM_DATA4 ( PM_DATA4 ), + .PM_DATA5 ( PM_DATA5 ), + .PM_DATA6 ( PM_DATA6 ), + .PM_DATA7 ( PM_DATA7 ), + .PM_MF ( PM_MF ), + .RBAR_BASE_PTR ( RBAR_BASE_PTR ), + .RBAR_CAP_CONTROL_ENCODEDBAR0 ( RBAR_CAP_CONTROL_ENCODEDBAR0 ), + .RBAR_CAP_CONTROL_ENCODEDBAR1 ( RBAR_CAP_CONTROL_ENCODEDBAR1 ), + .RBAR_CAP_CONTROL_ENCODEDBAR2 ( RBAR_CAP_CONTROL_ENCODEDBAR2 ), + .RBAR_CAP_CONTROL_ENCODEDBAR3 ( RBAR_CAP_CONTROL_ENCODEDBAR3 ), + .RBAR_CAP_CONTROL_ENCODEDBAR4 ( RBAR_CAP_CONTROL_ENCODEDBAR4 ), + .RBAR_CAP_CONTROL_ENCODEDBAR5 ( RBAR_CAP_CONTROL_ENCODEDBAR5 ), + .RBAR_CAP_ID ( RBAR_CAP_ID ), + .RBAR_CAP_INDEX0 ( RBAR_CAP_INDEX0 ), + .RBAR_CAP_INDEX1 ( RBAR_CAP_INDEX1 ), + .RBAR_CAP_INDEX2 ( RBAR_CAP_INDEX2 ), + .RBAR_CAP_INDEX3 ( RBAR_CAP_INDEX3 ), + .RBAR_CAP_INDEX4 ( RBAR_CAP_INDEX4 ), + .RBAR_CAP_INDEX5 ( RBAR_CAP_INDEX5 ), + .RBAR_CAP_NEXTPTR ( RBAR_CAP_NEXTPTR ), + .RBAR_CAP_ON ( RBAR_CAP_ON ), + .RBAR_CAP_SUP0 ( RBAR_CAP_SUP0 ), + .RBAR_CAP_SUP1 ( RBAR_CAP_SUP1 ), + .RBAR_CAP_SUP2 ( RBAR_CAP_SUP2 ), + .RBAR_CAP_SUP3 ( RBAR_CAP_SUP3 ), + .RBAR_CAP_SUP4 ( RBAR_CAP_SUP4 ), + .RBAR_CAP_SUP5 ( RBAR_CAP_SUP5 ), + .RBAR_CAP_VERSION ( RBAR_CAP_VERSION ), + .RBAR_NUM ( RBAR_NUM ), + .RECRC_CHK ( RECRC_CHK ), + .RECRC_CHK_TRIM ( RECRC_CHK_TRIM ), + .ROOT_CAP_CRS_SW_VISIBILITY ( ROOT_CAP_CRS_SW_VISIBILITY ), + .RP_AUTO_SPD ( RP_AUTO_SPD ), + .RP_AUTO_SPD_LOOPCNT ( RP_AUTO_SPD_LOOPCNT ), + .SELECT_DLL_IF ( SELECT_DLL_IF ), + .SLOT_CAP_ATT_BUTTON_PRESENT ( SLOT_CAP_ATT_BUTTON_PRESENT ), + .SLOT_CAP_ATT_INDICATOR_PRESENT ( SLOT_CAP_ATT_INDICATOR_PRESENT ), + .SLOT_CAP_ELEC_INTERLOCK_PRESENT ( SLOT_CAP_ELEC_INTERLOCK_PRESENT ), + .SLOT_CAP_HOTPLUG_CAPABLE ( SLOT_CAP_HOTPLUG_CAPABLE ), + .SLOT_CAP_HOTPLUG_SURPRISE ( SLOT_CAP_HOTPLUG_SURPRISE ), + .SLOT_CAP_MRL_SENSOR_PRESENT ( SLOT_CAP_MRL_SENSOR_PRESENT ), + .SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ( SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ), + .SLOT_CAP_PHYSICAL_SLOT_NUM ( SLOT_CAP_PHYSICAL_SLOT_NUM ), + .SLOT_CAP_POWER_CONTROLLER_PRESENT ( SLOT_CAP_POWER_CONTROLLER_PRESENT ), + .SLOT_CAP_POWER_INDICATOR_PRESENT ( SLOT_CAP_POWER_INDICATOR_PRESENT ), + .SLOT_CAP_SLOT_POWER_LIMIT_SCALE ( SLOT_CAP_SLOT_POWER_LIMIT_SCALE ), + .SLOT_CAP_SLOT_POWER_LIMIT_VALUE ( SLOT_CAP_SLOT_POWER_LIMIT_VALUE ), + .SPARE_BIT0 ( SPARE_BIT0 ), + .SPARE_BIT1 ( SPARE_BIT1 ), + .SPARE_BIT2 ( SPARE_BIT2 ), + .SPARE_BIT3 ( SPARE_BIT3 ), + .SPARE_BIT4 ( SPARE_BIT4 ), + .SPARE_BIT5 ( SPARE_BIT5 ), + .SPARE_BIT6 ( SPARE_BIT6 ), + .SPARE_BIT7 ( SPARE_BIT7 ), + .SPARE_BIT8 ( SPARE_BIT8 ), + .SPARE_BYTE0 ( SPARE_BYTE0 ), + .SPARE_BYTE1 ( SPARE_BYTE1 ), + .SPARE_BYTE2 ( SPARE_BYTE2 ), + .SPARE_BYTE3 ( SPARE_BYTE3 ), + .SPARE_WORD0 ( SPARE_WORD0 ), + .SPARE_WORD1 ( SPARE_WORD1 ), + .SPARE_WORD2 ( SPARE_WORD2 ), + .SPARE_WORD3 ( SPARE_WORD3 ), + .SSL_MESSAGE_AUTO ( SSL_MESSAGE_AUTO ), + .TECRC_EP_INV ( TECRC_EP_INV ), + .TL_RBYPASS ( TL_RBYPASS ), + .TL_RX_RAM_RADDR_LATENCY ( TL_RX_RAM_RADDR_LATENCY ), + .TL_RX_RAM_RDATA_LATENCY ( TL_RX_RAM_RDATA_LATENCY ), + .TL_RX_RAM_WRITE_LATENCY ( TL_RX_RAM_WRITE_LATENCY ), + .TL_TFC_DISABLE ( TL_TFC_DISABLE ), + .TL_TX_CHECKS_DISABLE ( TL_TX_CHECKS_DISABLE ), + .TL_TX_RAM_RADDR_LATENCY ( TL_TX_RAM_RADDR_LATENCY ), + .TL_TX_RAM_RDATA_LATENCY ( TL_TX_RAM_RDATA_LATENCY ), + .TL_TX_RAM_WRITE_LATENCY ( TL_TX_RAM_WRITE_LATENCY ), + .TRN_DW ( TRN_DW ), + .TRN_NP_FC ( TRN_NP_FC ), + .UPCONFIG_CAPABLE ( UPCONFIG_CAPABLE ), + .UPSTREAM_FACING ( UPSTREAM_FACING ), + .UR_ATOMIC ( UR_ATOMIC ), + .UR_CFG1 ( UR_CFG1 ), + .UR_INV_REQ ( UR_INV_REQ ), + .UR_PRS_RESPONSE ( UR_PRS_RESPONSE ), + .USE_RID_PINS ( USE_RID_PINS ), + .USER_CLK_FREQ ( USER_CLK_FREQ ), + .USER_CLK2_DIV2 ( USER_CLK2_DIV2 ), + .VC_BASE_PTR ( VC_BASE_PTR ), + .VC_CAP_ID ( VC_CAP_ID ), + .VC_CAP_NEXTPTR ( VC_CAP_NEXTPTR ), + .VC_CAP_ON ( VC_CAP_ON ), + .VC_CAP_REJECT_SNOOP_TRANSACTIONS ( VC_CAP_REJECT_SNOOP_TRANSACTIONS ), + .VC_CAP_VERSION ( VC_CAP_VERSION ), + .VC0_CPL_INFINITE ( VC0_CPL_INFINITE ), + .VC0_RX_RAM_LIMIT ( VC0_RX_RAM_LIMIT ), + .VC0_TOTAL_CREDITS_CD ( VC0_TOTAL_CREDITS_CD ), + .VC0_TOTAL_CREDITS_CH ( VC0_TOTAL_CREDITS_CH ), + .VC0_TOTAL_CREDITS_NPD ( VC0_TOTAL_CREDITS_NPD ), + .VC0_TOTAL_CREDITS_NPH ( VC0_TOTAL_CREDITS_NPH ), + .VC0_TOTAL_CREDITS_PD ( VC0_TOTAL_CREDITS_PD ), + .VC0_TOTAL_CREDITS_PH ( VC0_TOTAL_CREDITS_PH ), + .VC0_TX_LASTPACKET ( VC0_TX_LASTPACKET ), + .VSEC_BASE_PTR ( VSEC_BASE_PTR ), + .VSEC_CAP_HDR_ID ( VSEC_CAP_HDR_ID ), + .VSEC_CAP_HDR_REVISION ( VSEC_CAP_HDR_REVISION ), + .VSEC_CAP_ID ( VSEC_CAP_ID ), + .VSEC_CAP_IS_LINK_VISIBLE ( VSEC_CAP_IS_LINK_VISIBLE ), + .VSEC_CAP_NEXTPTR ( VSEC_CAP_NEXTPTR ), + .VSEC_CAP_ON ( VSEC_CAP_ON ), + .VSEC_CAP_VERSION ( VSEC_CAP_VERSION ) +`ifdef B_TESTMODE + , + .TEST_MODE_PIN_CHAR ( TEST_MODE_PIN_CHAR ) +`endif + + ) + pcie_block_i ( + + .TRNTD (trn_td ), + .TRNTREM (trn_trem ), + + + .TRNTSOF (trn_tsof ), + .TRNTEOF (trn_teof ), + .TRNTSRCRDY (trn_tsrc_rdy ), + .TRNTSRCDSC (trn_tsrc_dsc ), + .TRNTERRFWD (trn_terrfwd ), + .TRNTECRCGEN (trn_tecrc_gen ), + .TRNTSTR (trn_tstr ), + .TRNTCFGGNT (trn_tcfg_gnt ), + .TRNRDSTRDY (trn_rdst_rdy ), + .TRNRNPREQ (trn_rnp_req ), + .TRNRFCPRET (trn_rfcp_ret ), + .TRNRNPOK (trn_rnp_ok ), + .TRNFCSEL (trn_fc_sel ), + .MIMTXRDATA (mim_tx_rdata ), + .MIMRXRDATA (mim_rx_rdata ), + .TRNTDLLPDATA (trn_tdllp_data ), + .TRNTDLLPSRCRDY (trn_tdllp_src_rdy ), + .LL2TLPRCV (ll2_tlp_rcv ), + .LL2SENDENTERL1 (ll2_send_enter_l1 ), + .LL2SENDENTERL23 (ll2_send_enter_l23 ), + .LL2SENDASREQL1 (ll2_send_as_req_l1 ), + .LL2SENDPMACK (ll2_send_pm_ack ), + .PL2DIRECTEDLSTATE (pl2_directed_lstate ), + .LL2SUSPENDNOW (ll2_suspend_now ), + .TL2PPMSUSPENDREQ (tl2_ppm_suspend_req ), + .TL2ASPMSUSPENDCREDITCHECK (tl2_aspm_suspend_credit_check ), + .PLDIRECTEDLINKCHANGE (pl_directed_link_change ), + .PLDIRECTEDLINKWIDTH (pl_directed_link_width ), + .PLDIRECTEDLINKSPEED (pl_directed_link_speed ), + .PLDIRECTEDLINKAUTON (pl_directed_link_auton ), + .PLUPSTREAMPREFERDEEMPH (pl_upstream_prefer_deemph ), + .PLDOWNSTREAMDEEMPHSOURCE (pl_downstream_deemph_source ), + .PLDIRECTEDLTSSMNEW (pl_directed_ltssm_new ), + .PLDIRECTEDLTSSMNEWVLD (pl_directed_ltssm_new_vld ), + .PLDIRECTEDLTSSMSTALL (pl_directed_ltssm_stall ), + .PIPERX0CHARISK (pipe_rx0_char_is_k ), + .PIPERX1CHARISK (pipe_rx1_char_is_k ), + .PIPERX2CHARISK (pipe_rx2_char_is_k ), + .PIPERX3CHARISK (pipe_rx3_char_is_k ), + .PIPERX4CHARISK (pipe_rx4_char_is_k ), + .PIPERX5CHARISK (pipe_rx5_char_is_k ), + .PIPERX6CHARISK (pipe_rx6_char_is_k ), + .PIPERX7CHARISK (pipe_rx7_char_is_k ), + .PIPERX0VALID (pipe_rx0_valid ), + .PIPERX1VALID (pipe_rx1_valid ), + .PIPERX2VALID (pipe_rx2_valid ), + .PIPERX3VALID (pipe_rx3_valid ), + .PIPERX4VALID (pipe_rx4_valid ), + .PIPERX5VALID (pipe_rx5_valid ), + .PIPERX6VALID (pipe_rx6_valid ), + .PIPERX7VALID (pipe_rx7_valid ), + .PIPERX0DATA (pipe_rx0_data ), + .PIPERX1DATA (pipe_rx1_data ), + .PIPERX2DATA (pipe_rx2_data ), + .PIPERX3DATA (pipe_rx3_data ), + .PIPERX4DATA (pipe_rx4_data ), + .PIPERX5DATA (pipe_rx5_data ), + .PIPERX6DATA (pipe_rx6_data ), + .PIPERX7DATA (pipe_rx7_data ), + .PIPERX0CHANISALIGNED (pipe_rx0_chanisaligned ), + .PIPERX1CHANISALIGNED (pipe_rx1_chanisaligned ), + .PIPERX2CHANISALIGNED (pipe_rx2_chanisaligned ), + .PIPERX3CHANISALIGNED (pipe_rx3_chanisaligned ), + .PIPERX4CHANISALIGNED (pipe_rx4_chanisaligned ), + .PIPERX5CHANISALIGNED (pipe_rx5_chanisaligned ), + .PIPERX6CHANISALIGNED (pipe_rx6_chanisaligned ), + .PIPERX7CHANISALIGNED (pipe_rx7_chanisaligned ), + .PIPERX0STATUS (pipe_rx0_status ), + .PIPERX1STATUS (pipe_rx1_status ), + .PIPERX2STATUS (pipe_rx2_status ), + .PIPERX3STATUS (pipe_rx3_status ), + .PIPERX4STATUS (pipe_rx4_status ), + .PIPERX5STATUS (pipe_rx5_status ), + .PIPERX6STATUS (pipe_rx6_status ), + .PIPERX7STATUS (pipe_rx7_status ), + .PIPERX0PHYSTATUS (pipe_rx0_phy_status ), + .PIPERX1PHYSTATUS (pipe_rx1_phy_status ), + .PIPERX2PHYSTATUS (pipe_rx2_phy_status ), + .PIPERX3PHYSTATUS (pipe_rx3_phy_status ), + .PIPERX4PHYSTATUS (pipe_rx4_phy_status ), + .PIPERX5PHYSTATUS (pipe_rx5_phy_status ), + .PIPERX6PHYSTATUS (pipe_rx6_phy_status ), + .PIPERX7PHYSTATUS (pipe_rx7_phy_status ), + .PIPERX0ELECIDLE (pipe_rx0_elec_idle ), + .PIPERX1ELECIDLE (pipe_rx1_elec_idle ), + .PIPERX2ELECIDLE (pipe_rx2_elec_idle ), + .PIPERX3ELECIDLE (pipe_rx3_elec_idle ), + .PIPERX4ELECIDLE (pipe_rx4_elec_idle ), + .PIPERX5ELECIDLE (pipe_rx5_elec_idle ), + .PIPERX6ELECIDLE (pipe_rx6_elec_idle ), + .PIPERX7ELECIDLE (pipe_rx7_elec_idle ), + .PIPECLK (pipe_clk ), + .USERCLK (user_clk ), + .USERCLK2 (user_clk2 ), +`ifdef VALIDATION + .USERCLKPREBUF (user_clk_prebuf ), + .USERCLKPREBUFEN (user_clk_prebuf_en ), +`endif +`ifdef B_TESTMODE + .USERCLKPREBUF (user_clk_prebuf ), + .USERCLKPREBUFEN (user_clk_prebuf_en ), + .SCANMODEN (scanmode_n ), + .SCANENABLEN (scanenable_n ), + .EDTCLK (edt_clk ), + .EDTUPDATE (edt_update ), + .EDTBYPASS (edt_bypass ), + .EDTCONFIGURATION (edt_configuration ), + .EDTSINGLEBYPASSCHAIN (edt_single_bypass_chain ), + .EDTCHANNELSIN1 (edt_channels_in1 ), + .EDTCHANNELSIN2 (edt_channels_in2 ), + .EDTCHANNELSIN3 (edt_channels_in3 ), + .EDTCHANNELSIN4 (edt_channels_in4 ), + .EDTCHANNELSIN5 (edt_channels_in5 ), + .EDTCHANNELSIN6 (edt_channels_in6 ), + .EDTCHANNELSIN7 (edt_channels_in7 ), + .EDTCHANNELSIN8 (edt_channels_in8 ), + .PMVENABLEN (pmv_enable_n ), + .PMVSELECT (pmv_select ), + .PMVDIVIDE (pmv_divide ), +`endif +//`ifdef SECUREIP +// .GSR (gsr ), +//`endif + .SYSRSTN (sys_rst_n ), + .CMRSTN (cm_rst_n ), + .CMSTICKYRSTN (cm_sticky_rst_n ), + .FUNCLVLRSTN (func_lvl_rst_n ), + .TLRSTN (tl_rst_n ), + .DLRSTN (dl_rst_n ), + .PLRSTN (pl_rst_n ), + .PLTRANSMITHOTRST (pl_transmit_hot_rst ), + // Global pins not on Holistic model + //.CFGRESET (cfg_reset ), + //.GWE (gwe ), + //.GRESTORE (grestore ), + //.GHIGHB (ghigh_b ), + .CFGMGMTDI (cfg_mgmt_di ), + .CFGMGMTBYTEENN (cfg_mgmt_byte_en_n ), + .CFGMGMTDWADDR (cfg_mgmt_dwaddr ), + .CFGMGMTWRRW1CASRWN (cfg_mgmt_wr_rw1c_as_rw_n ), + .CFGMGMTWRREADONLYN (cfg_mgmt_wr_readonly_n ), + .CFGMGMTWRENN (cfg_mgmt_wr_en_n ), + .CFGMGMTRDENN (cfg_mgmt_rd_en_n ), + .CFGERRMALFORMEDN (cfg_err_malformed_n ), + .CFGERRCORN (cfg_err_cor_n ), + .CFGERRURN (cfg_err_ur_n ), + .CFGERRECRCN (cfg_err_ecrc_n ), + .CFGERRCPLTIMEOUTN (cfg_err_cpl_timeout_n ), + .CFGERRCPLABORTN (cfg_err_cpl_abort_n ), + .CFGERRCPLUNEXPECTN (cfg_err_cpl_unexpect_n ), + .CFGERRPOISONEDN (cfg_err_poisoned_n ), + .CFGERRACSN (cfg_err_acs_n ), + .CFGERRATOMICEGRESSBLOCKEDN (cfg_err_atomic_egress_blocked_n ), + .CFGERRMCBLOCKEDN (cfg_err_mc_blocked_n ), + .CFGERRINTERNALUNCORN (cfg_err_internal_uncor_n ), + .CFGERRINTERNALCORN (cfg_err_internal_cor_n ), + .CFGERRPOSTEDN (cfg_err_posted_n ), + .CFGERRLOCKEDN (cfg_err_locked_n ), + .CFGERRNORECOVERYN (cfg_err_norecovery_n ), + .CFGERRAERHEADERLOG (cfg_err_aer_headerlog ), + .CFGERRTLPCPLHEADER (cfg_err_tlp_cpl_header ), + .CFGINTERRUPTN (cfg_interrupt_n ), + .CFGINTERRUPTDI (cfg_interrupt_di ), + .CFGINTERRUPTASSERTN (cfg_interrupt_assert_n ), + .CFGINTERRUPTSTATN (cfg_interrupt_stat_n ), + .CFGDSBUSNUMBER (cfg_ds_bus_number ), + .CFGDSDEVICENUMBER (cfg_ds_device_number ), + .CFGDSFUNCTIONNUMBER (cfg_ds_function_number ), + .CFGPORTNUMBER (cfg_port_number ), + .CFGPMHALTASPML0SN (cfg_pm_halt_aspm_l0s_n ), + .CFGPMHALTASPML1N (cfg_pm_halt_aspm_l1_n ), + .CFGPMFORCESTATEENN (cfg_pm_force_state_en_n ), + .CFGPMFORCESTATE (cfg_pm_force_state ), + .CFGPMWAKEN (cfg_pm_wake_n ), + .CFGPMTURNOFFOKN (cfg_pm_turnoff_ok_n ), + .CFGPMSENDPMETON (cfg_pm_send_pme_to_n ), + .CFGPCIECAPINTERRUPTMSGNUM (cfg_pciecap_interrupt_msgnum ), + .CFGTRNPENDINGN (cfg_trn_pending_n ), + .CFGFORCEMPS (cfg_force_mps ), + .CFGFORCECOMMONCLOCKOFF (cfg_force_common_clock_off ), + .CFGFORCEEXTENDEDSYNCON (cfg_force_extended_sync_on ), + .CFGDSN (cfg_dsn ), + .CFGDEVID (cfg_dev_id ), + .CFGVENDID (cfg_vend_id ), + .CFGREVID (cfg_rev_id ), + .CFGSUBSYSID (cfg_subsys_id ), + .CFGSUBSYSVENDID (cfg_subsys_vend_id ), + .CFGAERINTERRUPTMSGNUM (cfg_aer_interrupt_msgnum ), + .DRPCLK (drp_clk ), + .DRPEN (drp_en ), + .DRPWE (drp_we ), + .DRPADDR (drp_addr ), + .DRPDI (drp_di ), + //.DRPREADPORT0 (drp_read_port_0 ), + //.DRPREADPORT1 (drp_read_port_1 ), + //.DRPREADPORT2 (drp_read_port_2 ), + //.DRPREADPORT3 (drp_read_port_3 ), + //.DRPREADPORT4 (drp_read_port_4 ), + //.DRPREADPORT5 (drp_read_port_5 ), + //.DRPREADPORT6 (drp_read_port_6 ), + //.DRPREADPORT7 (drp_read_port_7 ), + //.DRPREADPORT8 (drp_read_port_8 ), + //.DRPREADPORT9 (drp_read_port_9 ), + //.DRPREADPORT10 (drp_read_port_10 ), + //.DRPREADPORT11 (drp_read_port_11 ), + //.DRPREADPORT12 (drp_read_port_12 ), + .DBGMODE (dbg_mode ), + .DBGSUBMODE (dbg_sub_mode ), + .PLDBGMODE (pl_dbg_mode ), + + .TRNTDSTRDY (trn_tdst_rdy_bus ), + .TRNTERRDROP (trn_terr_drop ), + .TRNTBUFAV (trn_tbuf_av ), + .TRNTCFGREQ (trn_tcfg_req ), + .TRNRD (trn_rd ), + .TRNRREM (trn_rrem ), + .TRNRSOF (trn_rsof ), + .TRNREOF (trn_reof ), + .TRNRSRCRDY (trn_rsrc_rdy ), + .TRNRSRCDSC (trn_rsrc_dsc ), + .TRNRECRCERR (trn_recrc_err ), + .TRNRERRFWD (trn_rerrfwd ), + .TRNRBARHIT (trn_rbar_hit ), + .TRNLNKUP (trn_lnk_up ), + .TRNFCPH (trn_fc_ph ), + .TRNFCPD (trn_fc_pd ), + .TRNFCNPH (trn_fc_nph ), + .TRNFCNPD (trn_fc_npd ), + .TRNFCCPLH (trn_fc_cplh ), + .TRNFCCPLD (trn_fc_cpld ), + .MIMTXWDATA (mim_tx_wdata ), + .MIMTXWADDR (mim_tx_waddr ), + .MIMTXWEN (mim_tx_wen ), + .MIMTXRADDR (mim_tx_raddr ), + .MIMTXREN (mim_tx_ren ), + .MIMRXWDATA (mim_rx_wdata ), + .MIMRXWADDR (mim_rx_waddr ), + .MIMRXWEN (mim_rx_wen ), + .MIMRXRADDR (mim_rx_raddr ), + .MIMRXREN (mim_rx_ren ), + .TRNTDLLPDSTRDY (trn_tdllp_dst_rdy ), + .TRNRDLLPDATA (trn_rdllp_data ), + .TRNRDLLPSRCRDY (trn_rdllp_src_rdy ), + .LL2TFCINIT1SEQ (ll2_tfc_init1_seq ), + .LL2TFCINIT2SEQ (ll2_tfc_init2_seq ), + .PL2SUSPENDOK (pl2_suspend_ok ), + .PL2RECOVERY (pl2_recovery ), + .PL2RXELECIDLE (pl2_rx_elec_idle ), + .PL2RXPMSTATE (pl2_rx_pm_state ), + .PL2L0REQ (pl2_l0_req ), + .LL2SUSPENDOK (ll2_suspend_ok ), + .LL2TXIDLE (ll2_tx_idle ), + .LL2LINKSTATUS (ll2_link_status ), + .TL2PPMSUSPENDOK (tl2_ppm_suspend_ok ), + .TL2ASPMSUSPENDREQ (tl2_aspm_suspend_req ), + .TL2ASPMSUSPENDCREDITCHECKOK (tl2_aspm_suspend_credit_check_ok ), + .PL2LINKUP (pl2_link_up ), + .PL2RECEIVERERR (pl2_receiver_err ), + .LL2RECEIVERERR (ll2_receiver_err ), + .LL2PROTOCOLERR (ll2_protocol_err ), + .LL2BADTLPERR (ll2_bad_tlp_err ), + .LL2BADDLLPERR (ll2_bad_dllp_err ), + .LL2REPLAYROERR (ll2_replay_ro_err ), + .LL2REPLAYTOERR (ll2_replay_to_err ), + .TL2ERRHDR (tl2_err_hdr ), + .TL2ERRMALFORMED (tl2_err_malformed ), + .TL2ERRRXOVERFLOW (tl2_err_rxoverflow ), + .TL2ERRFCPE (tl2_err_fcpe ), + .PLSELLNKRATE (pl_sel_lnk_rate ), + .PLSELLNKWIDTH (pl_sel_lnk_width ), + .PLLTSSMSTATE (pl_ltssm_state ), + .PLLANEREVERSALMODE (pl_lane_reversal_mode ), + .PLPHYLNKUPN (pl_phy_lnk_up_n ), + .PLTXPMSTATE (pl_tx_pm_state ), + .PLRXPMSTATE (pl_rx_pm_state ), + .PLLINKUPCFGCAP (pl_link_upcfg_cap ), + .PLLINKGEN2CAP (pl_link_gen2_cap ), + .PLLINKPARTNERGEN2SUPPORTED (pl_link_partner_gen2_supported ), + .PLINITIALLINKWIDTH (pl_initial_link_width ), + .PLDIRECTEDCHANGEDONE (pl_directed_change_done ), + .PIPETXRCVRDET (pipe_tx_rcvr_det ), + .PIPETXRESET (pipe_tx_reset ), + .PIPETXRATE (pipe_tx_rate ), + .PIPETXDEEMPH (pipe_tx_deemph ), + .PIPETXMARGIN (pipe_tx_margin ), + .PIPERX0POLARITY (pipe_rx0_polarity ), + .PIPERX1POLARITY (pipe_rx1_polarity ), + .PIPERX2POLARITY (pipe_rx2_polarity ), + .PIPERX3POLARITY (pipe_rx3_polarity ), + .PIPERX4POLARITY (pipe_rx4_polarity ), + .PIPERX5POLARITY (pipe_rx5_polarity ), + .PIPERX6POLARITY (pipe_rx6_polarity ), + .PIPERX7POLARITY (pipe_rx7_polarity ), + .PIPETX0COMPLIANCE (pipe_tx0_compliance ), + .PIPETX1COMPLIANCE (pipe_tx1_compliance ), + .PIPETX2COMPLIANCE (pipe_tx2_compliance ), + .PIPETX3COMPLIANCE (pipe_tx3_compliance ), + .PIPETX4COMPLIANCE (pipe_tx4_compliance ), + .PIPETX5COMPLIANCE (pipe_tx5_compliance ), + .PIPETX6COMPLIANCE (pipe_tx6_compliance ), + .PIPETX7COMPLIANCE (pipe_tx7_compliance ), + .PIPETX0CHARISK (pipe_tx0_char_is_k ), + .PIPETX1CHARISK (pipe_tx1_char_is_k ), + .PIPETX2CHARISK (pipe_tx2_char_is_k ), + .PIPETX3CHARISK (pipe_tx3_char_is_k ), + .PIPETX4CHARISK (pipe_tx4_char_is_k ), + .PIPETX5CHARISK (pipe_tx5_char_is_k ), + .PIPETX6CHARISK (pipe_tx6_char_is_k ), + .PIPETX7CHARISK (pipe_tx7_char_is_k ), + .PIPETX0DATA (pipe_tx0_data ), + .PIPETX1DATA (pipe_tx1_data ), + .PIPETX2DATA (pipe_tx2_data ), + .PIPETX3DATA (pipe_tx3_data ), + .PIPETX4DATA (pipe_tx4_data ), + .PIPETX5DATA (pipe_tx5_data ), + .PIPETX6DATA (pipe_tx6_data ), + .PIPETX7DATA (pipe_tx7_data ), + .PIPETX0ELECIDLE (pipe_tx0_elec_idle ), + .PIPETX1ELECIDLE (pipe_tx1_elec_idle ), + .PIPETX2ELECIDLE (pipe_tx2_elec_idle ), + .PIPETX3ELECIDLE (pipe_tx3_elec_idle ), + .PIPETX4ELECIDLE (pipe_tx4_elec_idle ), + .PIPETX5ELECIDLE (pipe_tx5_elec_idle ), + .PIPETX6ELECIDLE (pipe_tx6_elec_idle ), + .PIPETX7ELECIDLE (pipe_tx7_elec_idle ), + .PIPETX0POWERDOWN (pipe_tx0_powerdown ), + .PIPETX1POWERDOWN (pipe_tx1_powerdown ), + .PIPETX2POWERDOWN (pipe_tx2_powerdown ), + .PIPETX3POWERDOWN (pipe_tx3_powerdown ), + .PIPETX4POWERDOWN (pipe_tx4_powerdown ), + .PIPETX5POWERDOWN (pipe_tx5_powerdown ), + .PIPETX6POWERDOWN (pipe_tx6_powerdown ), + .PIPETX7POWERDOWN (pipe_tx7_powerdown ), +`ifdef B_TESTMODE + .PMVOUT (pmv_out ), + .SCANOUT (scanout ), +`endif + .USERRSTN (user_rst_n ), + .PLRECEIVEDHOTRST (pl_received_hot_rst ), + .RECEIVEDFUNCLVLRSTN (received_func_lvl_rst_n ), + .LNKCLKEN (lnk_clk_en ), + .CFGMGMTDO (cfg_mgmt_do ), + .CFGMGMTRDWRDONEN (cfg_mgmt_rd_wr_done_n ), + .CFGERRAERHEADERLOGSETN (cfg_err_aer_headerlog_set_n ), + .CFGERRCPLRDYN (cfg_err_cpl_rdy_n ), + .CFGINTERRUPTRDYN (cfg_interrupt_rdy_n ), + .CFGINTERRUPTMMENABLE (cfg_interrupt_mmenable ), + .CFGINTERRUPTMSIENABLE (cfg_interrupt_msienable ), + .CFGINTERRUPTDO (cfg_interrupt_do ), + .CFGINTERRUPTMSIXENABLE (cfg_interrupt_msixenable ), + .CFGINTERRUPTMSIXFM (cfg_interrupt_msixfm ), + .CFGMSGRECEIVED (cfg_msg_received ), + .CFGMSGDATA (cfg_msg_data ), + .CFGMSGRECEIVEDERRCOR (cfg_msg_received_err_cor ), + .CFGMSGRECEIVEDERRNONFATAL (cfg_msg_received_err_non_fatal ), + .CFGMSGRECEIVEDERRFATAL (cfg_msg_received_err_fatal ), + .CFGMSGRECEIVEDASSERTINTA (cfg_msg_received_assert_int_a ), + .CFGMSGRECEIVEDDEASSERTINTA (cfg_msg_received_deassert_int_a ), + .CFGMSGRECEIVEDASSERTINTB (cfg_msg_received_assert_int_b ), + .CFGMSGRECEIVEDDEASSERTINTB (cfg_msg_received_deassert_int_b ), + .CFGMSGRECEIVEDASSERTINTC (cfg_msg_received_assert_int_c ), + .CFGMSGRECEIVEDDEASSERTINTC (cfg_msg_received_deassert_int_c ), + .CFGMSGRECEIVEDASSERTINTD (cfg_msg_received_assert_int_d ), + .CFGMSGRECEIVEDDEASSERTINTD (cfg_msg_received_deassert_int_d ), + .CFGMSGRECEIVEDPMPME (cfg_msg_received_pm_pme ), + .CFGMSGRECEIVEDPMETOACK (cfg_msg_received_pme_to_ack ), + .CFGMSGRECEIVEDPMETO (cfg_msg_received_pme_to ), + .CFGMSGRECEIVEDSETSLOTPOWERLIMIT (cfg_msg_received_setslotpowerlimit ), + .CFGMSGRECEIVEDUNLOCK (cfg_msg_received_unlock ), + .CFGMSGRECEIVEDPMASNAK (cfg_msg_received_pm_as_nak ), + .CFGPCIELINKSTATE (cfg_pcie_link_state ), + .CFGPMRCVASREQL1N (cfg_pm_rcv_as_req_l1_n ), + .CFGPMRCVREQACKN (cfg_pm_rcv_req_ack_n ), + .CFGPMRCVENTERL1N (cfg_pm_rcv_enter_l1_n ), + .CFGPMRCVENTERL23N (cfg_pm_rcv_enter_l23_n ), + .CFGPMCSRPOWERSTATE (cfg_pmcsr_powerstate ), + .CFGPMCSRPMEEN (cfg_pmcsr_pme_en ), + .CFGPMCSRPMESTATUS (cfg_pmcsr_pme_status ), + .CFGTRANSACTION (cfg_transaction ), + .CFGTRANSACTIONTYPE (cfg_transaction_type ), + .CFGTRANSACTIONADDR (cfg_transaction_addr ), + .CFGCOMMANDIOENABLE (cfg_command_io_enable ), + .CFGCOMMANDMEMENABLE (cfg_command_mem_enable ), + .CFGCOMMANDBUSMASTERENABLE (cfg_command_bus_master_enable ), + .CFGCOMMANDINTERRUPTDISABLE (cfg_command_interrupt_disable ), + .CFGCOMMANDSERREN (cfg_command_serr_en ), + .CFGBRIDGESERREN (cfg_bridge_serr_en ), + .CFGDEVSTATUSCORRERRDETECTED (cfg_dev_status_corr_err_detected ), + .CFGDEVSTATUSNONFATALERRDETECTED (cfg_dev_status_non_fatal_err_detected ), + .CFGDEVSTATUSFATALERRDETECTED (cfg_dev_status_fatal_err_detected ), + .CFGDEVSTATUSURDETECTED (cfg_dev_status_ur_detected ), + .CFGDEVCONTROLCORRERRREPORTINGEN (cfg_dev_control_corr_err_reporting_en ), + .CFGDEVCONTROLNONFATALREPORTINGEN (cfg_dev_control_non_fatal_reporting_en ), + .CFGDEVCONTROLFATALERRREPORTINGEN (cfg_dev_control_fatal_err_reporting_en ), + .CFGDEVCONTROLURERRREPORTINGEN (cfg_dev_control_ur_err_reporting_en ), + .CFGDEVCONTROLENABLERO (cfg_dev_control_enable_ro ), + .CFGDEVCONTROLMAXPAYLOAD (cfg_dev_control_max_payload ), + .CFGDEVCONTROLEXTTAGEN (cfg_dev_control_ext_tag_en ), + .CFGDEVCONTROLPHANTOMEN (cfg_dev_control_phantom_en ), + .CFGDEVCONTROLAUXPOWEREN (cfg_dev_control_aux_power_en ), + .CFGDEVCONTROLNOSNOOPEN (cfg_dev_control_no_snoop_en ), + .CFGDEVCONTROLMAXREADREQ (cfg_dev_control_max_read_req ), + .CFGLINKSTATUSCURRENTSPEED (cfg_link_status_current_speed ), + .CFGLINKSTATUSNEGOTIATEDWIDTH (cfg_link_status_negotiated_width ), + .CFGLINKSTATUSLINKTRAINING (cfg_link_status_link_training ), + .CFGLINKSTATUSDLLACTIVE (cfg_link_status_dll_active ), + .CFGLINKSTATUSBANDWIDTHSTATUS (cfg_link_status_bandwidth_status ), + .CFGLINKSTATUSAUTOBANDWIDTHSTATUS (cfg_link_status_auto_bandwidth_status ), + .CFGLINKCONTROLASPMCONTROL (cfg_link_control_aspm_control ), + .CFGLINKCONTROLRCB (cfg_link_control_rcb ), + .CFGLINKCONTROLLINKDISABLE (cfg_link_control_link_disable ), + .CFGLINKCONTROLRETRAINLINK (cfg_link_control_retrain_link ), + .CFGLINKCONTROLCOMMONCLOCK (cfg_link_control_common_clock ), + .CFGLINKCONTROLEXTENDEDSYNC (cfg_link_control_extended_sync ), + .CFGLINKCONTROLCLOCKPMEN (cfg_link_control_clock_pm_en ), + .CFGLINKCONTROLHWAUTOWIDTHDIS (cfg_link_control_hw_auto_width_dis ), + .CFGLINKCONTROLBANDWIDTHINTEN (cfg_link_control_bandwidth_int_en ), + .CFGLINKCONTROLAUTOBANDWIDTHINTEN (cfg_link_control_auto_bandwidth_int_en ), + .CFGDEVCONTROL2CPLTIMEOUTVAL (cfg_dev_control2_cpl_timeout_val ), + .CFGDEVCONTROL2CPLTIMEOUTDIS (cfg_dev_control2_cpl_timeout_dis ), + .CFGDEVCONTROL2ARIFORWARDEN (cfg_dev_control2_ari_forward_en ), + .CFGDEVCONTROL2ATOMICREQUESTEREN (cfg_dev_control2_atomic_requester_en ), + .CFGDEVCONTROL2ATOMICEGRESSBLOCK (cfg_dev_control2_atomic_egress_block ), + .CFGDEVCONTROL2IDOREQEN (cfg_dev_control2_ido_req_en ), + .CFGDEVCONTROL2IDOCPLEN (cfg_dev_control2_ido_cpl_en ), + .CFGDEVCONTROL2LTREN (cfg_dev_control2_ltr_en ), + .CFGDEVCONTROL2TLPPREFIXBLOCK (cfg_dev_control2_tlp_prefix_block ), + .CFGSLOTCONTROLELECTROMECHILCTLPULSE (cfg_slot_control_electromech_il_ctl_pulse ), + .CFGROOTCONTROLSYSERRCORRERREN (cfg_root_control_syserr_corr_err_en ), + .CFGROOTCONTROLSYSERRNONFATALERREN (cfg_root_control_syserr_non_fatal_err_en ), + .CFGROOTCONTROLSYSERRFATALERREN (cfg_root_control_syserr_fatal_err_en ), + .CFGROOTCONTROLPMEINTEN (cfg_root_control_pme_int_en ), + .CFGAERECRCCHECKEN (cfg_aer_ecrc_check_en ), + .CFGAERECRCGENEN (cfg_aer_ecrc_gen_en ), + .CFGAERROOTERRCORRERRREPORTINGEN (cfg_aer_rooterr_corr_err_reporting_en ), + .CFGAERROOTERRNONFATALERRREPORTINGEN (cfg_aer_rooterr_non_fatal_err_reporting_en ), + .CFGAERROOTERRFATALERRREPORTINGEN (cfg_aer_rooterr_fatal_err_reporting_en ), + .CFGAERROOTERRCORRERRRECEIVED (cfg_aer_rooterr_corr_err_received ), + .CFGAERROOTERRNONFATALERRRECEIVED (cfg_aer_rooterr_non_fatal_err_received ), + .CFGAERROOTERRFATALERRRECEIVED (cfg_aer_rooterr_fatal_err_received ), + .CFGVCTCVCMAP (cfg_vc_tcvc_map ), + .DRPRDY (drp_rdy ), + .DRPDO (drp_do ), + //.DRPWRITEEN (drp_write_en ), + //.DRPWRITEPORT0 (drp_write_port_0 ), + //.DRPWRITEPORT1 (drp_write_port_1 ), + //.DRPWRITEPORT2 (drp_write_port_2 ), + //.DRPWRITEPORT3 (drp_write_port_3 ), + //.DRPWRITEPORT4 (drp_write_port_4 ), + //.DRPWRITEPORT5 (drp_write_port_5 ), + //.DRPWRITEPORT6 (drp_write_port_6 ), + //.DRPWRITEPORT7 (drp_write_port_7 ), + //.DRPWRITEPORT8 (drp_write_port_8 ), + //.DRPWRITEPORT9 (drp_write_port_9 ), + //.DRPWRITEPORT10 (drp_write_port_10 ), + //.DRPWRITEPORT11 (drp_write_port_11 ), + //.DRPWRITEPORT12 (drp_write_port_12 ), + //.DRPREADADDR (drp_read_addr ), + .DBGVECA (dbg_vec_a ), + .DBGVECB (dbg_vec_b ), + .DBGVECC (dbg_vec_c ), + .DBGSCLRA (dbg_sclr_a ), + .DBGSCLRB (dbg_sclr_b ), + .DBGSCLRC (dbg_sclr_c ), + .DBGSCLRD (dbg_sclr_d ), + .DBGSCLRE (dbg_sclr_e ), + .DBGSCLRF (dbg_sclr_f ), + .DBGSCLRG (dbg_sclr_g ), + .DBGSCLRH (dbg_sclr_h ), + .DBGSCLRI (dbg_sclr_i ), + .DBGSCLRJ (dbg_sclr_j ), + .DBGSCLRK (dbg_sclr_k ), + .PLDBGVEC (pl_dbg_vec ) + //.XILUNCONNOUT (xil_unconn_out ) + ); + + + + +endmodule + +`endif // PCIE_2LM diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_bram_7x.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_bram_7x.v new file mode 100644 index 0000000000000000000000000000000000000000..d5aefec2a45dd66eb2ab43025ff6c28b7c821fdd --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_bram_7x.v @@ -0,0 +1,213 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_bram_7x.v +// Version : 3.3 +// Description : single bram wrapper for the mb pcie block +// The bram A port is the write port +// the B port is the read port +// +// +//-----------------------------------------------------------------------------// + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_bram_7x + #( + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1, // PCIe Link Speed : 1 - 2.5 GT/s; 2 - 5.0 GT/s + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08, // PCIe Link Width : 1 / 2 / 4 / 8 + parameter IMPL_TARGET = "HARD", // the implementation target : HARD, SOFT + parameter DOB_REG = 0, // 1 - use the output register; + // 0 - don't use the output register + parameter WIDTH = 0 // supported WIDTH's : 4, 9, 18, 36 - uses RAMB36 + // 72 - uses RAMB36SDP + ) + ( + input user_clk_i,// user clock + input reset_i, // bram reset + + input wen_i, // write enable + input [12:0] waddr_i, // write address + input [WIDTH - 1:0] wdata_i, // write data + + input ren_i, // read enable + input rce_i, // output register clock enable + input [12:0] raddr_i, // read address + + output [WIDTH - 1:0] rdata_o // read data + ); + + // map the address bits + localparam ADDR_MSB = ((WIDTH == 4) ? 12 : + (WIDTH == 9) ? 11 : + (WIDTH == 18) ? 10 : + (WIDTH == 36) ? 9 : + 8 + ); + + // set the width of the tied off low address bits + localparam ADDR_LO_BITS = ((WIDTH == 4) ? 2 : + (WIDTH == 9) ? 3 : + (WIDTH == 18) ? 4 : + (WIDTH == 36) ? 5 : + 0 // for WIDTH 72 use RAMB36SDP + ); + + // map the data bits + localparam D_MSB = ((WIDTH == 4) ? 3 : + (WIDTH == 9) ? 7 : + (WIDTH == 18) ? 15 : + (WIDTH == 36) ? 31 : + 63 + ); + + // map the data parity bits + localparam DP_LSB = D_MSB + 1; + + localparam DP_MSB = ((WIDTH == 4) ? 4 : + (WIDTH == 9) ? 8 : + (WIDTH == 18) ? 17 : + (WIDTH == 36) ? 35 : + 71 + ); + + localparam DPW = DP_MSB - DP_LSB + 1; + localparam WRITE_MODE = ((WIDTH == 72) && (!((LINK_CAP_MAX_LINK_SPEED == 4'h2) && (LINK_CAP_MAX_LINK_WIDTH == 6'h08)))) ? "WRITE_FIRST" : + ((LINK_CAP_MAX_LINK_SPEED == 4'h2) && (LINK_CAP_MAX_LINK_WIDTH == 6'h08)) ? "WRITE_FIRST" : "NO_CHANGE"; + + localparam DEVICE = (IMPL_TARGET == "HARD") ? "7SERIES" : "VIRTEX6"; + localparam BRAM_SIZE = "36Kb"; + + localparam WE_WIDTH =(DEVICE == "VIRTEX5" || DEVICE == "VIRTEX6" || DEVICE == "7SERIES") ? + ((WIDTH <= 9) ? 1 : + (WIDTH > 9 && WIDTH <= 18) ? 2 : + (WIDTH > 18 && WIDTH <= 36) ? 4 : + (WIDTH > 36 && WIDTH <= 72) ? 8 : + (BRAM_SIZE == "18Kb") ? 4 : 8 ) : 8; + + //synthesis translate_off + initial begin + //$display("[%t] %m DOB_REG %0d WIDTH %0d ADDR_MSB %0d ADDR_LO_BITS %0d DP_MSB %0d DP_LSB %0d D_MSB %0d", + // $time, DOB_REG, WIDTH, ADDR_MSB, ADDR_LO_BITS, DP_MSB, DP_LSB, D_MSB); + + case (WIDTH) + 4,9,18,36,72:; + default: + begin + $display("[%t] %m Error WIDTH %0d not supported", $time, WIDTH); + $finish; + end + endcase // case (WIDTH) + end + //synthesis translate_on + + generate + if ((LINK_CAP_MAX_LINK_WIDTH == 6'h08 && LINK_CAP_MAX_LINK_SPEED == 4'h2) || (WIDTH == 72)) begin : use_sdp + BRAM_SDP_MACRO #( + .DEVICE (DEVICE), + .BRAM_SIZE (BRAM_SIZE), + .DO_REG (DOB_REG), + .READ_WIDTH (WIDTH), + .WRITE_WIDTH (WIDTH), + .WRITE_MODE (WRITE_MODE) + ) + ramb36sdp( + .DO (rdata_o[WIDTH-1:0]), + .DI (wdata_i[WIDTH-1:0]), + .RDADDR (raddr_i[ADDR_MSB:0]), + .RDCLK (user_clk_i), + .RDEN (ren_i), + .REGCE (rce_i), + .RST (reset_i), + .WE ({WE_WIDTH{1'b1}}), + .WRADDR (waddr_i[ADDR_MSB:0]), + .WRCLK (user_clk_i), + .WREN (wen_i) + ); + + end // block: use_sdp + else if (WIDTH <= 36) begin : use_tdp + // use RAMB36's if the width is 4, 9, 18, or 36 + BRAM_TDP_MACRO #( + .DEVICE (DEVICE), + .BRAM_SIZE (BRAM_SIZE), + .DOA_REG (0), + .DOB_REG (DOB_REG), + .READ_WIDTH_A (WIDTH), + .READ_WIDTH_B (WIDTH), + .WRITE_WIDTH_A (WIDTH), + .WRITE_WIDTH_B (WIDTH), + .WRITE_MODE_A (WRITE_MODE) + ) + ramb36( + .DOA (), + .DOB (rdata_o[WIDTH-1:0]), + .ADDRA (waddr_i[ADDR_MSB:0]), + .ADDRB (raddr_i[ADDR_MSB:0]), + .CLKA (user_clk_i), + .CLKB (user_clk_i), + .DIA (wdata_i[WIDTH-1:0]), + .DIB ({WIDTH{1'b0}}), + .ENA (wen_i), + .ENB (ren_i), + .REGCEA (1'b0), + .REGCEB (rce_i), + .RSTA (reset_i), + .RSTB (reset_i), + .WEA ({WE_WIDTH{1'b1}}), + .WEB ({WE_WIDTH{1'b0}}) + ); + end // block: use_tdp + endgenerate + +endmodule // pcie_bram_7x + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_bram_top_7x.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_bram_top_7x.v new file mode 100644 index 0000000000000000000000000000000000000000..b5943e7c8770e63157fcd16dc7b9e04f3c509785 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_bram_top_7x.v @@ -0,0 +1,185 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_bram_top_7x.v +// Version : 3.3 +// Description : bram wrapper for Tx and Rx +// given the pcie block attributes calculate the number of brams +// and pipeline stages and instantiate the brams +// +// Hierarchy: +// pcie_bram_top top level +// pcie_brams pcie_bram instantiations, +// pipeline stages (if any), +// address decode logic (if any), +// datapath muxing (if any) +// pcie_bram bram library cell wrapper +// the pcie_bram module can have a paramter that +// specifies the family (V6, V5, V4) +// +//----------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_bram_top_7x +#( + parameter IMPL_TARGET = "HARD", // the implementation target : HARD, SOFT + parameter DEV_CAP_MAX_PAYLOAD_SUPPORTED = 0, // MPS Supported : 0 - 128 B, 1 - 256 B, 2 - 512 B, 3 - 1024 B + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1, // PCIe Link Speed : 1 - 2.5 GT/s; 2 - 5.0 GT/s + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08, // PCIe Link Width : 1 / 2 / 4 / 8 + + parameter VC0_TX_LASTPACKET = 31, // Number of Packets in Transmit + parameter TLM_TX_OVERHEAD = 24, // Overhead Bytes for Packets (Transmit) + parameter TL_TX_RAM_RADDR_LATENCY = 1, // BRAM Read Address Latency (Transmit) + parameter TL_TX_RAM_RDATA_LATENCY = 2, // BRAM Read Data Latency (Transmit) + parameter TL_TX_RAM_WRITE_LATENCY = 1, // BRAM Write Latency (Transmit) + + parameter VC0_RX_RAM_LIMIT = 'h1FFF, // RAM Size (Receive) + parameter TL_RX_RAM_RADDR_LATENCY = 1, // BRAM Read Address Latency (Receive) + parameter TL_RX_RAM_RDATA_LATENCY = 2, // BRAM Read Data Latency (Receive) + parameter TL_RX_RAM_WRITE_LATENCY = 1 // BRAM Write Latency (Receive) +) +( + input user_clk_i, // Clock input + input reset_i, // Reset input + + input mim_tx_wen, // Write Enable for Transmit path BRAM + input [12:0] mim_tx_waddr, // Write Address for Transmit path BRAM + input [71:0] mim_tx_wdata, // Write Data for Transmit path BRAM + input mim_tx_ren, // Read Enable for Transmit path BRAM + input mim_tx_rce, // Read Output Register Clock Enable for Transmit path BRAM + input [12:0] mim_tx_raddr, // Read Address for Transmit path BRAM + output [71:0] mim_tx_rdata, // Read Data for Transmit path BRAM + + input mim_rx_wen, // Write Enable for Receive path BRAM + input [12:0] mim_rx_waddr, // Write Enable for Receive path BRAM + input [71:0] mim_rx_wdata, // Write Enable for Receive path BRAM + input mim_rx_ren, // Read Enable for Receive path BRAM + input mim_rx_rce, // Read Output Register Clock Enable for Receive path BRAM + input [12:0] mim_rx_raddr, // Read Address for Receive path BRAM + output [71:0] mim_rx_rdata // Read Data for Receive path BRAM +); + + // TX calculations + localparam MPS_BYTES = ((DEV_CAP_MAX_PAYLOAD_SUPPORTED == 0) ? 128 : + (DEV_CAP_MAX_PAYLOAD_SUPPORTED == 1) ? 256 : + (DEV_CAP_MAX_PAYLOAD_SUPPORTED == 2) ? 512 : + 1024 ); + + localparam BYTES_TX = (VC0_TX_LASTPACKET + 1) * (MPS_BYTES + TLM_TX_OVERHEAD); + + localparam ROWS_TX = 1; + localparam COLS_TX = ((BYTES_TX <= 4096) ? 1 : + (BYTES_TX <= 8192) ? 2 : + (BYTES_TX <= 16384) ? 4 : + (BYTES_TX <= 32768) ? 8 : + 18 + ); + + // RX calculations + localparam ROWS_RX = 1; + + localparam COLS_RX = ((VC0_RX_RAM_LIMIT < 'h0200) ? 1 : + (VC0_RX_RAM_LIMIT < 'h0400) ? 2 : + (VC0_RX_RAM_LIMIT < 'h0800) ? 4 : + (VC0_RX_RAM_LIMIT < 'h1000) ? 8 : + 18 + ); + + initial begin + $display("[%t] %m ROWS_TX %0d COLS_TX %0d", $time, ROWS_TX, COLS_TX); + $display("[%t] %m ROWS_RX %0d COLS_RX %0d", $time, ROWS_RX, COLS_RX); + end + +pcie_7x_0_pcie_brams_7x #( + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .IMPL_TARGET ( IMPL_TARGET ), + .NUM_BRAMS ( COLS_TX ), + .RAM_RADDR_LATENCY ( TL_TX_RAM_RADDR_LATENCY ), + .RAM_RDATA_LATENCY ( TL_TX_RAM_RDATA_LATENCY ), + .RAM_WRITE_LATENCY ( TL_TX_RAM_WRITE_LATENCY ) + ) + pcie_brams_tx ( + .user_clk_i ( user_clk_i ), + .reset_i ( reset_i ), + .waddr ( mim_tx_waddr ), + .wen ( mim_tx_wen ), + .ren ( mim_tx_ren ), + .rce ( mim_tx_rce ), + .wdata ( mim_tx_wdata ), + .raddr ( mim_tx_raddr ), + .rdata ( mim_tx_rdata ) + ); + +pcie_7x_0_pcie_brams_7x #( + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .IMPL_TARGET ( IMPL_TARGET ), + .NUM_BRAMS ( COLS_RX ), + .RAM_RADDR_LATENCY ( TL_RX_RAM_RADDR_LATENCY ), + .RAM_RDATA_LATENCY ( TL_RX_RAM_RDATA_LATENCY ), + .RAM_WRITE_LATENCY ( TL_RX_RAM_WRITE_LATENCY ) + ) pcie_brams_rx ( + .user_clk_i ( user_clk_i ), + .reset_i ( reset_i ), + .waddr ( mim_rx_waddr ), + .wen ( mim_rx_wen ), + .ren ( mim_rx_ren ), + .rce ( mim_rx_rce ), + .wdata ( mim_rx_wdata ), + .raddr ( mim_rx_raddr ), + .rdata ( mim_rx_rdata ) + ); + +endmodule // pcie_bram_top + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_brams_7x.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_brams_7x.v new file mode 100644 index 0000000000000000000000000000000000000000..b8726a3fe607d615be1e9d489c4ad8582ce92de0 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_brams_7x.v @@ -0,0 +1,297 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_brams_7x.v +// Version : 3.3 +// Description : pcie bram wrapper +// arrange and connect brams +// implement address decoding, datapath muxing and pipeline stages +// +// banks of brams are used for 1,2,4,8,18 brams +// brams are stacked for other values of NUM_BRAMS +// +//----------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_brams_7x +#( + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1, // PCIe Link Speed : 1 - 2.5 GT/s; 2 - 5.0 GT/s + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08, // PCIe Link Width : 1 / 2 / 4 / 8 + parameter IMPL_TARGET = "HARD", // the implementation target : HARD, SOFT + + // the number of BRAMs to use + // supported values are: + // 1,2,4,8,18 + parameter NUM_BRAMS = 0, + + // BRAM read address latency + // + // value meaning + // ==================================================== + // 0 BRAM read address port sample + // 1 BRAM read address port sample and a pipeline stage on the address port + parameter RAM_RADDR_LATENCY = 1, + + // BRAM read data latency + // + // value meaning + // ==================================================== + // 1 no BRAM OREG + // 2 use BRAM OREG + // 3 use BRAM OREG and a pipeline stage on the data port + parameter RAM_RDATA_LATENCY = 1, + + // BRAM write latency + // The BRAM write port is synchronous + // + // value meaning + // ==================================================== + // 0 BRAM write port sample + // 1 BRAM write port sample plus pipeline stage + parameter RAM_WRITE_LATENCY = 1, + parameter TCQ = 1 // synthesis warning removed: parameter declaration becomes local +) +( + input user_clk_i, + input reset_i, + + input wen, + input [12:0] waddr, + input [71:0] wdata, + input ren, + input rce, + input [12:0] raddr, + output [71:0] rdata + ); + + // turn on the bram output register + localparam DOB_REG = (RAM_RDATA_LATENCY > 1) ? 1 : 0; + + // calculate the data width of the individual brams + localparam [6:0] WIDTH = ((NUM_BRAMS == 1) ? 72 : + (NUM_BRAMS == 2) ? 36 : + (NUM_BRAMS == 4) ? 18 : + (NUM_BRAMS == 8) ? 9 : + 4 + ); + +// parameter TCQ = 1; + + wire wen_int; + wire [12:0] waddr_int; + wire [71:0] wdata_int; + + wire ren_int; + wire [12:0] raddr_int; + wire [71:0] rdata_int; + + //synthesis translate_off + initial + begin + $display("[%t] %m NUM_BRAMS %0d DOB_REG %0d WIDTH %0d RAM_WRITE_LATENCY %0d RAM_RADDR_LATENCY %0d RAM_RDATA_LATENCY %0d", + $time, NUM_BRAMS, DOB_REG, WIDTH, RAM_WRITE_LATENCY, RAM_RADDR_LATENCY, RAM_RDATA_LATENCY); + + case (NUM_BRAMS) + 1,2,4,8,18:; + default: + begin + $display("[%t] %m Error NUM_BRAMS %0d not supported", $time, NUM_BRAMS); + $finish; + end + endcase // case(NUM_BRAMS) + + case (RAM_RADDR_LATENCY) + 0,1:; + default: + begin + $display("[%t] %m Error RAM_READ_LATENCY %0d not supported", $time, RAM_RADDR_LATENCY); + $finish; + end + endcase // case (RAM_RADDR_LATENCY) + + case (RAM_RDATA_LATENCY) + 1,2,3:; + default: + begin + $display("[%t] %m Error RAM_READ_LATENCY %0d not supported", $time, RAM_RDATA_LATENCY); + $finish; + end + endcase // case (RAM_RDATA_LATENCY) + + case (RAM_WRITE_LATENCY) + 0,1:; + default: + begin + $display("[%t] %m Error RAM_WRITE_LATENCY %0d not supported", $time, RAM_WRITE_LATENCY); + $finish; + end + endcase // case(RAM_WRITE_LATENCY) + + end + //synthesis translate_on + + // model the delays for ram write latency + + generate if (RAM_WRITE_LATENCY == 1) begin : wr_lat_2 + reg wen_q; + reg [12:0] waddr_q; + reg [71:0] wdata_q; + + always @(posedge user_clk_i) begin + if (reset_i) + begin + wen_q <= #TCQ 1'b0; + waddr_q <= #TCQ 13'b0; + // Disable Reset on Data Path @ BRAM i/f as I/O come from PCIe HB. + // wdata_q <= #TCQ 72'b0; + end + else + begin + wen_q <= #TCQ wen; + waddr_q <= #TCQ waddr; + wdata_q <= #TCQ wdata; + end + end + + assign wen_int = wen_q; + assign waddr_int = waddr_q; + assign wdata_int = wdata_q; + end // if (RAM_WRITE_LATENCY == 1) + + else if (RAM_WRITE_LATENCY == 0) begin : wr_lat_1 + assign wen_int = wen; + assign waddr_int = waddr; + assign wdata_int = wdata; + end + endgenerate + + // model the delays for ram read latency + + generate if (RAM_RADDR_LATENCY == 1) begin : raddr_lat_2 + reg ren_q; + reg [12:0] raddr_q; + + always @(posedge user_clk_i) begin + if (reset_i) + begin + ren_q <= #TCQ 1'b0; + raddr_q <= #TCQ 13'b0; + end + else + begin + ren_q <= #TCQ ren; + raddr_q <= #TCQ raddr; + end // else: !if(reset_i) + end + + assign ren_int = ren_q; + assign raddr_int = raddr_q; + end // block: rd_lat_addr_2 + + else begin : raddr_lat_1 + assign ren_int = ren; + assign raddr_int = raddr; + end + endgenerate + + generate if (RAM_RDATA_LATENCY == 3) begin : rdata_lat_3 + reg [71:0] rdata_q; + + always @(posedge user_clk_i) begin + // Disable Reset on Data Path @ BRAM i/f as I/O come from PCIe HB. + //if (reset_i) + //begin + // rdata_q <= #TCQ 72'b0; + //end + //else + //begin + rdata_q <= #TCQ rdata_int; + //end // else: !if(reset_i) + end + + assign rdata = rdata_q; + + end // block: rd_lat_data_3 + + else begin : rdata_lat_1_2 + assign rdata = rdata_int; + end + endgenerate + + // instantiate the brams + generate + genvar ii; + for (ii = 0; ii < NUM_BRAMS; ii = ii + 1) begin : brams +pcie_7x_0_pcie_bram_7x #( + .LINK_CAP_MAX_LINK_WIDTH(LINK_CAP_MAX_LINK_WIDTH), + .LINK_CAP_MAX_LINK_SPEED(LINK_CAP_MAX_LINK_SPEED), + .IMPL_TARGET (IMPL_TARGET), + .DOB_REG (DOB_REG), + .WIDTH (WIDTH) + ) + ram ( + .user_clk_i(user_clk_i), + .reset_i(reset_i), + .wen_i(wen_int), + .waddr_i(waddr_int), + .wdata_i(wdata_int[(((ii + 1) * WIDTH) - 1): (ii * WIDTH)]), + .ren_i(ren_int), + .raddr_i(raddr_int), + .rdata_o(rdata_int[(((ii + 1) * WIDTH) - 1): (ii * WIDTH)]), + .rce_i(rce) + ); + end + endgenerate + +endmodule // pcie_brams_7x + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_pipe_lane.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_pipe_lane.v new file mode 100644 index 0000000000000000000000000000000000000000..a7bc5df22036a6fe37d3c0c38e2b6ab54a7bb397 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_pipe_lane.v @@ -0,0 +1,329 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_pipe_lane.v +// Version : 3.3 +// +// Description: PIPE per lane module for 7-Series PCIe Block +// +// +// +//-------------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_pipe_lane # +( + parameter PIPE_PIPELINE_STAGES = 0, // 0 - 0 stages, 1 - 1 stage, 2 - 2 stages + parameter TCQ = 1 // synthesis warning solved : parameter declaration becomes local +) +( + output wire [ 1:0] pipe_rx_char_is_k_o , // Pipelined PIPE Rx Char Is K + output wire [15:0] pipe_rx_data_o , // Pipelined PIPE Rx Data + output wire pipe_rx_valid_o , // Pipelined PIPE Rx Data Valid + output wire pipe_rx_chanisaligned_o , // Pipelined PIPE Rx Chan Is Aligned + output wire [ 2:0] pipe_rx_status_o , // Pipelined PIPE Rx Status + output wire pipe_rx_phy_status_o , // Pipelined PIPE Rx Phy Status + output wire pipe_rx_elec_idle_o , // Pipelined PIPE Rx Electrical Idle + input wire pipe_rx_polarity_i , // PIPE Rx Polarity + input wire pipe_tx_compliance_i , // PIPE Tx Compliance + input wire [ 1:0] pipe_tx_char_is_k_i , // PIPE Tx Char Is K + input wire [15:0] pipe_tx_data_i , // PIPE Tx Data + input wire pipe_tx_elec_idle_i , // PIPE Tx Electrical Idle + input wire [ 1:0] pipe_tx_powerdown_i , // PIPE Tx Powerdown + + input wire [ 1:0] pipe_rx_char_is_k_i , // PIPE Rx Char Is K + input wire [15:0] pipe_rx_data_i , // PIPE Rx Data + input wire pipe_rx_valid_i , // PIPE Rx Data Valid + input wire pipe_rx_chanisaligned_i , // PIPE Rx Chan Is Aligned + input wire [ 2:0] pipe_rx_status_i , // PIPE Rx Status + input wire pipe_rx_phy_status_i , // PIPE Rx Phy Status + input wire pipe_rx_elec_idle_i , // PIPE Rx Electrical Idle + output wire pipe_rx_polarity_o , // Pipelined PIPE Rx Polarity + output wire pipe_tx_compliance_o , // Pipelined PIPE Tx Compliance + output wire [ 1:0] pipe_tx_char_is_k_o , // Pipelined PIPE Tx Char Is K + output wire [15:0] pipe_tx_data_o , // Pipelined PIPE Tx Data + output wire pipe_tx_elec_idle_o , // Pipelined PIPE Tx Electrical Idle + output wire [ 1:0] pipe_tx_powerdown_o , // Pipelined PIPE Tx Powerdown + + input wire pipe_clk , // PIPE Clock + input wire rst_n // Reset +); + + //******************************************************************// + // Reality check. // + //******************************************************************// + +// parameter TCQ = 1; // clock to out delay model + + generate + + if (PIPE_PIPELINE_STAGES == 0) begin : pipe_stages_0 + + assign pipe_rx_char_is_k_o = pipe_rx_char_is_k_i; + assign pipe_rx_data_o = pipe_rx_data_i; + assign pipe_rx_valid_o = pipe_rx_valid_i; + assign pipe_rx_chanisaligned_o = pipe_rx_chanisaligned_i; + assign pipe_rx_status_o = pipe_rx_status_i; + assign pipe_rx_phy_status_o = pipe_rx_phy_status_i; + assign pipe_rx_elec_idle_o = pipe_rx_elec_idle_i; + + assign pipe_rx_polarity_o = pipe_rx_polarity_i; + assign pipe_tx_compliance_o = pipe_tx_compliance_i; + assign pipe_tx_char_is_k_o = pipe_tx_char_is_k_i; + assign pipe_tx_data_o = pipe_tx_data_i; + assign pipe_tx_elec_idle_o = pipe_tx_elec_idle_i; + assign pipe_tx_powerdown_o = pipe_tx_powerdown_i; + + end // if (PIPE_PIPELINE_STAGES == 0) + else if (PIPE_PIPELINE_STAGES == 1) begin : pipe_stages_1 + + reg [ 1:0] pipe_rx_char_is_k_q ; + reg [15:0] pipe_rx_data_q ; + reg pipe_rx_valid_q ; + reg pipe_rx_chanisaligned_q ; + reg [ 2:0] pipe_rx_status_q ; + reg pipe_rx_phy_status_q ; + reg pipe_rx_elec_idle_q ; + + reg pipe_rx_polarity_q ; + reg pipe_tx_compliance_q ; + reg [ 1:0] pipe_tx_char_is_k_q ; + reg [15:0] pipe_tx_data_q ; + reg pipe_tx_elec_idle_q ; + reg [ 1:0] pipe_tx_powerdown_q ; + + always @(posedge pipe_clk) begin + + if (rst_n) + begin + + pipe_rx_char_is_k_q <= #TCQ 0; + pipe_rx_data_q <= #TCQ 0; + pipe_rx_valid_q <= #TCQ 0; + pipe_rx_chanisaligned_q <= #TCQ 0; + pipe_rx_status_q <= #TCQ 0; + pipe_rx_phy_status_q <= #TCQ 0; + pipe_rx_elec_idle_q <= #TCQ 0; + + pipe_rx_polarity_q <= #TCQ 0; + pipe_tx_compliance_q <= #TCQ 0; + pipe_tx_char_is_k_q <= #TCQ 0; + pipe_tx_data_q <= #TCQ 0; + pipe_tx_elec_idle_q <= #TCQ 1'b1; + pipe_tx_powerdown_q <= #TCQ 2'b10; + + end + else + begin + + pipe_rx_char_is_k_q <= #TCQ pipe_rx_char_is_k_i; + pipe_rx_data_q <= #TCQ pipe_rx_data_i; + pipe_rx_valid_q <= #TCQ pipe_rx_valid_i; + pipe_rx_chanisaligned_q <= #TCQ pipe_rx_chanisaligned_i; + pipe_rx_status_q <= #TCQ pipe_rx_status_i; + pipe_rx_phy_status_q <= #TCQ pipe_rx_phy_status_i; + pipe_rx_elec_idle_q <= #TCQ pipe_rx_elec_idle_i; + + pipe_rx_polarity_q <= #TCQ pipe_rx_polarity_i; + pipe_tx_compliance_q <= #TCQ pipe_tx_compliance_i; + pipe_tx_char_is_k_q <= #TCQ pipe_tx_char_is_k_i; + pipe_tx_data_q <= #TCQ pipe_tx_data_i; + pipe_tx_elec_idle_q <= #TCQ pipe_tx_elec_idle_i; + pipe_tx_powerdown_q <= #TCQ pipe_tx_powerdown_i; + + end + + end + + assign pipe_rx_char_is_k_o = pipe_rx_char_is_k_q; + assign pipe_rx_data_o = pipe_rx_data_q; + assign pipe_rx_valid_o = pipe_rx_valid_q; + assign pipe_rx_chanisaligned_o = pipe_rx_chanisaligned_q; + assign pipe_rx_status_o = pipe_rx_status_q; + assign pipe_rx_phy_status_o = pipe_rx_phy_status_q; + assign pipe_rx_elec_idle_o = pipe_rx_elec_idle_q; + + assign pipe_rx_polarity_o = pipe_rx_polarity_q; + assign pipe_tx_compliance_o = pipe_tx_compliance_q; + assign pipe_tx_char_is_k_o = pipe_tx_char_is_k_q; + assign pipe_tx_data_o = pipe_tx_data_q; + assign pipe_tx_elec_idle_o = pipe_tx_elec_idle_q; + assign pipe_tx_powerdown_o = pipe_tx_powerdown_q; + + end // if (PIPE_PIPELINE_STAGES == 1) + else if (PIPE_PIPELINE_STAGES == 2) begin : pipe_stages_2 + + reg [ 1:0] pipe_rx_char_is_k_q ; + reg [15:0] pipe_rx_data_q ; + reg pipe_rx_valid_q ; + reg pipe_rx_chanisaligned_q ; + reg [ 2:0] pipe_rx_status_q ; + reg pipe_rx_phy_status_q ; + reg pipe_rx_elec_idle_q ; + + reg pipe_rx_polarity_q ; + reg pipe_tx_compliance_q ; + reg [ 1:0] pipe_tx_char_is_k_q ; + reg [15:0] pipe_tx_data_q ; + reg pipe_tx_elec_idle_q ; + reg [ 1:0] pipe_tx_powerdown_q ; + + reg [ 1:0] pipe_rx_char_is_k_qq ; + reg [15:0] pipe_rx_data_qq ; + reg pipe_rx_valid_qq ; + reg pipe_rx_chanisaligned_qq; + reg [ 2:0] pipe_rx_status_qq ; + reg pipe_rx_phy_status_qq ; + reg pipe_rx_elec_idle_qq ; + + reg pipe_rx_polarity_qq ; + reg pipe_tx_compliance_qq ; + reg [ 1:0] pipe_tx_char_is_k_qq ; + reg [15:0] pipe_tx_data_qq ; + reg pipe_tx_elec_idle_qq ; + reg [ 1:0] pipe_tx_powerdown_qq ; + + always @(posedge pipe_clk) begin + + if (rst_n) + begin + + pipe_rx_char_is_k_q <= #TCQ 0; + pipe_rx_data_q <= #TCQ 0; + pipe_rx_valid_q <= #TCQ 0; + pipe_rx_chanisaligned_q <= #TCQ 0; + pipe_rx_status_q <= #TCQ 0; + pipe_rx_phy_status_q <= #TCQ 0; + pipe_rx_elec_idle_q <= #TCQ 0; + + pipe_rx_polarity_q <= #TCQ 0; + pipe_tx_compliance_q <= #TCQ 0; + pipe_tx_char_is_k_q <= #TCQ 0; + pipe_tx_data_q <= #TCQ 0; + pipe_tx_elec_idle_q <= #TCQ 1'b1; + pipe_tx_powerdown_q <= #TCQ 2'b10; + + pipe_rx_char_is_k_qq <= #TCQ 0; + pipe_rx_data_qq <= #TCQ 0; + pipe_rx_valid_qq <= #TCQ 0; + pipe_rx_chanisaligned_qq <= #TCQ 0; + pipe_rx_status_qq <= #TCQ 0; + pipe_rx_phy_status_qq <= #TCQ 0; + pipe_rx_elec_idle_qq <= #TCQ 0; + + pipe_rx_polarity_qq <= #TCQ 0; + pipe_tx_compliance_qq <= #TCQ 0; + pipe_tx_char_is_k_qq <= #TCQ 0; + pipe_tx_data_qq <= #TCQ 0; + pipe_tx_elec_idle_qq <= #TCQ 1'b1; + pipe_tx_powerdown_qq <= #TCQ 2'b10; + + end + else + begin + + pipe_rx_char_is_k_q <= #TCQ pipe_rx_char_is_k_i; + pipe_rx_data_q <= #TCQ pipe_rx_data_i; + pipe_rx_valid_q <= #TCQ pipe_rx_valid_i; + pipe_rx_chanisaligned_q <= #TCQ pipe_rx_chanisaligned_i; + pipe_rx_status_q <= #TCQ pipe_rx_status_i; + pipe_rx_phy_status_q <= #TCQ pipe_rx_phy_status_i; + pipe_rx_elec_idle_q <= #TCQ pipe_rx_elec_idle_i; + + pipe_rx_polarity_q <= #TCQ pipe_rx_polarity_i; + pipe_tx_compliance_q <= #TCQ pipe_tx_compliance_i; + pipe_tx_char_is_k_q <= #TCQ pipe_tx_char_is_k_i; + pipe_tx_data_q <= #TCQ pipe_tx_data_i; + pipe_tx_elec_idle_q <= #TCQ pipe_tx_elec_idle_i; + pipe_tx_powerdown_q <= #TCQ pipe_tx_powerdown_i; + + pipe_rx_char_is_k_qq <= #TCQ pipe_rx_char_is_k_q; + pipe_rx_data_qq <= #TCQ pipe_rx_data_q; + pipe_rx_valid_qq <= #TCQ pipe_rx_valid_q; + pipe_rx_chanisaligned_qq <= #TCQ pipe_rx_chanisaligned_q; + pipe_rx_status_qq <= #TCQ pipe_rx_status_q; + pipe_rx_phy_status_qq <= #TCQ pipe_rx_phy_status_q; + pipe_rx_elec_idle_qq <= #TCQ pipe_rx_elec_idle_q; + + pipe_rx_polarity_qq <= #TCQ pipe_rx_polarity_q; + pipe_tx_compliance_qq <= #TCQ pipe_tx_compliance_q; + pipe_tx_char_is_k_qq <= #TCQ pipe_tx_char_is_k_q; + pipe_tx_data_qq <= #TCQ pipe_tx_data_q; + pipe_tx_elec_idle_qq <= #TCQ pipe_tx_elec_idle_q; + pipe_tx_powerdown_qq <= #TCQ pipe_tx_powerdown_q; + + end + + end + + assign pipe_rx_char_is_k_o = pipe_rx_char_is_k_qq; + assign pipe_rx_data_o = pipe_rx_data_qq; + assign pipe_rx_valid_o = pipe_rx_valid_qq; + assign pipe_rx_chanisaligned_o = pipe_rx_chanisaligned_qq; + assign pipe_rx_status_o = pipe_rx_status_qq; + assign pipe_rx_phy_status_o = pipe_rx_phy_status_qq; + assign pipe_rx_elec_idle_o = pipe_rx_elec_idle_qq; + + assign pipe_rx_polarity_o = pipe_rx_polarity_qq; + assign pipe_tx_compliance_o = pipe_tx_compliance_qq; + assign pipe_tx_char_is_k_o = pipe_tx_char_is_k_qq; + assign pipe_tx_data_o = pipe_tx_data_qq; + assign pipe_tx_elec_idle_o = pipe_tx_elec_idle_qq; + assign pipe_tx_powerdown_o = pipe_tx_powerdown_qq; + + end // if (PIPE_PIPELINE_STAGES == 2) + + endgenerate + +endmodule + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_pipe_misc.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_pipe_misc.v new file mode 100644 index 0000000000000000000000000000000000000000..9332ffbe8fba8706a9a09e720c6c2523747daf61 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_pipe_misc.v @@ -0,0 +1,220 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_pipe_misc.v +// Version : 3.3 +// +// Description: Misc PIPE module for 7-Series PCIe Block +// +// +// +//-------------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_pipe_misc # +( + parameter PIPE_PIPELINE_STAGES = 0, // 0 - 0 stages, 1 - 1 stage, 2 - 2 stages + parameter TCQ = 1 // synthesis warning solved: parameter declaration becomes local +) +( + + input wire pipe_tx_rcvr_det_i , // PIPE Tx Receiver Detect + input wire pipe_tx_reset_i , // PIPE Tx Reset + input wire pipe_tx_rate_i , // PIPE Tx Rate + input wire pipe_tx_deemph_i , // PIPE Tx Deemphasis + input wire [2:0] pipe_tx_margin_i , // PIPE Tx Margin + input wire pipe_tx_swing_i , // PIPE Tx Swing + + output wire pipe_tx_rcvr_det_o , // Pipelined PIPE Tx Receiver Detect + output wire pipe_tx_reset_o , // Pipelined PIPE Tx Reset + output wire pipe_tx_rate_o , // Pipelined PIPE Tx Rate + output wire pipe_tx_deemph_o , // Pipelined PIPE Tx Deemphasis + output wire [2:0] pipe_tx_margin_o , // Pipelined PIPE Tx Margin + output wire pipe_tx_swing_o , // Pipelined PIPE Tx Swing + + input wire pipe_clk , // PIPE Clock + input wire rst_n // Reset +); + +//******************************************************************// +// Reality check. // +//******************************************************************// + +// parameter TCQ = 1; // clock to out delay model + + generate + + if (PIPE_PIPELINE_STAGES == 0) begin : pipe_stages_0 + + assign pipe_tx_rcvr_det_o = pipe_tx_rcvr_det_i; + assign pipe_tx_reset_o = pipe_tx_reset_i; + assign pipe_tx_rate_o = pipe_tx_rate_i; + assign pipe_tx_deemph_o = pipe_tx_deemph_i; + assign pipe_tx_margin_o = pipe_tx_margin_i; + assign pipe_tx_swing_o = pipe_tx_swing_i; + + end // if (PIPE_PIPELINE_STAGES == 0) + else if (PIPE_PIPELINE_STAGES == 1) begin : pipe_stages_1 + + reg pipe_tx_rcvr_det_q ; + reg pipe_tx_reset_q ; + reg pipe_tx_rate_q ; + reg pipe_tx_deemph_q ; + reg [2:0] pipe_tx_margin_q ; + reg pipe_tx_swing_q ; + + always @(posedge pipe_clk) begin + + if (rst_n) + begin + + pipe_tx_rcvr_det_q <= #TCQ 0; + pipe_tx_reset_q <= #TCQ 1'b1; + pipe_tx_rate_q <= #TCQ 0; + pipe_tx_deemph_q <= #TCQ 1'b1; + pipe_tx_margin_q <= #TCQ 0; + pipe_tx_swing_q <= #TCQ 0; + + end + else + begin + + pipe_tx_rcvr_det_q <= #TCQ pipe_tx_rcvr_det_i; + pipe_tx_reset_q <= #TCQ pipe_tx_reset_i; + pipe_tx_rate_q <= #TCQ pipe_tx_rate_i; + pipe_tx_deemph_q <= #TCQ pipe_tx_deemph_i; + pipe_tx_margin_q <= #TCQ pipe_tx_margin_i; + pipe_tx_swing_q <= #TCQ pipe_tx_swing_i; + + end + + end + + assign pipe_tx_rcvr_det_o = pipe_tx_rcvr_det_q; + assign pipe_tx_reset_o = pipe_tx_reset_q; + assign pipe_tx_rate_o = pipe_tx_rate_q; + assign pipe_tx_deemph_o = pipe_tx_deemph_q; + assign pipe_tx_margin_o = pipe_tx_margin_q; + assign pipe_tx_swing_o = pipe_tx_swing_q; + + end // if (PIPE_PIPELINE_STAGES == 1) + else if (PIPE_PIPELINE_STAGES == 2) begin : pipe_stages_2 + + reg pipe_tx_rcvr_det_q ; + reg pipe_tx_reset_q ; + reg pipe_tx_rate_q ; + reg pipe_tx_deemph_q ; + reg [2:0] pipe_tx_margin_q ; + reg pipe_tx_swing_q ; + + reg pipe_tx_rcvr_det_qq ; + reg pipe_tx_reset_qq ; + reg pipe_tx_rate_qq ; + reg pipe_tx_deemph_qq ; + reg [2:0] pipe_tx_margin_qq ; + reg pipe_tx_swing_qq ; + + always @(posedge pipe_clk) begin + + if (rst_n) + begin + + pipe_tx_rcvr_det_q <= #TCQ 0; + pipe_tx_reset_q <= #TCQ 1'b1; + pipe_tx_rate_q <= #TCQ 0; + pipe_tx_deemph_q <= #TCQ 1'b1; + pipe_tx_margin_q <= #TCQ 0; + pipe_tx_swing_q <= #TCQ 0; + + pipe_tx_rcvr_det_qq <= #TCQ 0; + pipe_tx_reset_qq <= #TCQ 1'b1; + pipe_tx_rate_qq <= #TCQ 0; + pipe_tx_deemph_qq <= #TCQ 1'b1; + pipe_tx_margin_qq <= #TCQ 0; + pipe_tx_swing_qq <= #TCQ 0; + + end + else + begin + + pipe_tx_rcvr_det_q <= #TCQ pipe_tx_rcvr_det_i; + pipe_tx_reset_q <= #TCQ pipe_tx_reset_i; + pipe_tx_rate_q <= #TCQ pipe_tx_rate_i; + pipe_tx_deemph_q <= #TCQ pipe_tx_deemph_i; + pipe_tx_margin_q <= #TCQ pipe_tx_margin_i; + pipe_tx_swing_q <= #TCQ pipe_tx_swing_i; + + pipe_tx_rcvr_det_qq <= #TCQ pipe_tx_rcvr_det_q; + pipe_tx_reset_qq <= #TCQ pipe_tx_reset_q; + pipe_tx_rate_qq <= #TCQ pipe_tx_rate_q; + pipe_tx_deemph_qq <= #TCQ pipe_tx_deemph_q; + pipe_tx_margin_qq <= #TCQ pipe_tx_margin_q; + pipe_tx_swing_qq <= #TCQ pipe_tx_swing_q; + + end + + end + + assign pipe_tx_rcvr_det_o = pipe_tx_rcvr_det_qq; + assign pipe_tx_reset_o = pipe_tx_reset_qq; + assign pipe_tx_rate_o = pipe_tx_rate_qq; + assign pipe_tx_deemph_o = pipe_tx_deemph_qq; + assign pipe_tx_margin_o = pipe_tx_margin_qq; + assign pipe_tx_swing_o = pipe_tx_swing_qq; + + end // if (PIPE_PIPELINE_STAGES == 2) + + endgenerate + +endmodule + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_pipe_pipeline.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_pipe_pipeline.v new file mode 100644 index 0000000000000000000000000000000000000000..0647986479eafe149986cbed93e810143dd6ca68 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_pipe_pipeline.v @@ -0,0 +1,799 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_pipe_pipeline.v +// Version : 3.3 +// +// Description: PIPE module for Virtex7 PCIe Block +// +// +// +//-------------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_pipe_pipeline # +( + parameter LINK_CAP_MAX_LINK_WIDTH = 8, + parameter PIPE_PIPELINE_STAGES = 0 // 0 - 0 stages, 1 - 1 stage, 2 - 2 stages +) +( + // Pipe Per-Link Signals + input wire pipe_tx_rcvr_det_i , + input wire pipe_tx_reset_i , + input wire pipe_tx_rate_i , + input wire pipe_tx_deemph_i , + input wire [2:0] pipe_tx_margin_i , + input wire pipe_tx_swing_i , + + output wire pipe_tx_rcvr_det_o , + output wire pipe_tx_reset_o , + output wire pipe_tx_rate_o , + output wire pipe_tx_deemph_o , + output wire [2:0] pipe_tx_margin_o , + output wire pipe_tx_swing_o , + + // Pipe Per-Lane Signals - Lane 0 + output wire [ 1:0] pipe_rx0_char_is_k_o , + output wire [15:0] pipe_rx0_data_o , + output wire pipe_rx0_valid_o , + output wire pipe_rx0_chanisaligned_o , + output wire [ 2:0] pipe_rx0_status_o , + output wire pipe_rx0_phy_status_o , + output wire pipe_rx0_elec_idle_o , + input wire pipe_rx0_polarity_i , + input wire pipe_tx0_compliance_i , + input wire [ 1:0] pipe_tx0_char_is_k_i , + input wire [15:0] pipe_tx0_data_i , + input wire pipe_tx0_elec_idle_i , + input wire [ 1:0] pipe_tx0_powerdown_i , + + input wire [ 1:0] pipe_rx0_char_is_k_i , + input wire [15:0] pipe_rx0_data_i , + input wire pipe_rx0_valid_i , + input wire pipe_rx0_chanisaligned_i , + input wire [ 2:0] pipe_rx0_status_i , + input wire pipe_rx0_phy_status_i , + input wire pipe_rx0_elec_idle_i , + output wire pipe_rx0_polarity_o , + output wire pipe_tx0_compliance_o , + output wire [ 1:0] pipe_tx0_char_is_k_o , + output wire [15:0] pipe_tx0_data_o , + output wire pipe_tx0_elec_idle_o , + output wire [ 1:0] pipe_tx0_powerdown_o , + + // Pipe Per-Lane Signals - Lane 1 + output wire [ 1:0] pipe_rx1_char_is_k_o , + output wire [15:0] pipe_rx1_data_o , + output wire pipe_rx1_valid_o , + output wire pipe_rx1_chanisaligned_o , + output wire [ 2:0] pipe_rx1_status_o , + output wire pipe_rx1_phy_status_o , + output wire pipe_rx1_elec_idle_o , + input wire pipe_rx1_polarity_i , + input wire pipe_tx1_compliance_i , + input wire [ 1:0] pipe_tx1_char_is_k_i , + input wire [15:0] pipe_tx1_data_i , + input wire pipe_tx1_elec_idle_i , + input wire [ 1:0] pipe_tx1_powerdown_i , + + input wire [ 1:0] pipe_rx1_char_is_k_i , + input wire [15:0] pipe_rx1_data_i , + input wire pipe_rx1_valid_i , + input wire pipe_rx1_chanisaligned_i , + input wire [ 2:0] pipe_rx1_status_i , + input wire pipe_rx1_phy_status_i , + input wire pipe_rx1_elec_idle_i , + output wire pipe_rx1_polarity_o , + output wire pipe_tx1_compliance_o , + output wire [ 1:0] pipe_tx1_char_is_k_o , + output wire [15:0] pipe_tx1_data_o , + output wire pipe_tx1_elec_idle_o , + output wire [ 1:0] pipe_tx1_powerdown_o , + + // Pipe Per-Lane Signals - Lane 2 + output wire [ 1:0] pipe_rx2_char_is_k_o , + output wire [15:0] pipe_rx2_data_o , + output wire pipe_rx2_valid_o , + output wire pipe_rx2_chanisaligned_o , + output wire [ 2:0] pipe_rx2_status_o , + output wire pipe_rx2_phy_status_o , + output wire pipe_rx2_elec_idle_o , + input wire pipe_rx2_polarity_i , + input wire pipe_tx2_compliance_i , + input wire [ 1:0] pipe_tx2_char_is_k_i , + input wire [15:0] pipe_tx2_data_i , + input wire pipe_tx2_elec_idle_i , + input wire [ 1:0] pipe_tx2_powerdown_i , + + input wire [ 1:0] pipe_rx2_char_is_k_i , + input wire [15:0] pipe_rx2_data_i , + input wire pipe_rx2_valid_i , + input wire pipe_rx2_chanisaligned_i , + input wire [ 2:0] pipe_rx2_status_i , + input wire pipe_rx2_phy_status_i , + input wire pipe_rx2_elec_idle_i , + output wire pipe_rx2_polarity_o , + output wire pipe_tx2_compliance_o , + output wire [ 1:0] pipe_tx2_char_is_k_o , + output wire [15:0] pipe_tx2_data_o , + output wire pipe_tx2_elec_idle_o , + output wire [ 1:0] pipe_tx2_powerdown_o , + + // Pipe Per-Lane Signals - Lane 3 + output wire [ 1:0] pipe_rx3_char_is_k_o , + output wire [15:0] pipe_rx3_data_o , + output wire pipe_rx3_valid_o , + output wire pipe_rx3_chanisaligned_o , + output wire [ 2:0] pipe_rx3_status_o , + output wire pipe_rx3_phy_status_o , + output wire pipe_rx3_elec_idle_o , + input wire pipe_rx3_polarity_i , + input wire pipe_tx3_compliance_i , + input wire [ 1:0] pipe_tx3_char_is_k_i , + input wire [15:0] pipe_tx3_data_i , + input wire pipe_tx3_elec_idle_i , + input wire [ 1:0] pipe_tx3_powerdown_i , + + input wire [ 1:0] pipe_rx3_char_is_k_i , + input wire [15:0] pipe_rx3_data_i , + input wire pipe_rx3_valid_i , + input wire pipe_rx3_chanisaligned_i , + input wire [ 2:0] pipe_rx3_status_i , + input wire pipe_rx3_phy_status_i , + input wire pipe_rx3_elec_idle_i , + output wire pipe_rx3_polarity_o , + output wire pipe_tx3_compliance_o , + output wire [ 1:0] pipe_tx3_char_is_k_o , + output wire [15:0] pipe_tx3_data_o , + output wire pipe_tx3_elec_idle_o , + output wire [ 1:0] pipe_tx3_powerdown_o , + + // Pipe Per-Lane Signals - Lane 4 + output wire [ 1:0] pipe_rx4_char_is_k_o , + output wire [15:0] pipe_rx4_data_o , + output wire pipe_rx4_valid_o , + output wire pipe_rx4_chanisaligned_o , + output wire [ 2:0] pipe_rx4_status_o , + output wire pipe_rx4_phy_status_o , + output wire pipe_rx4_elec_idle_o , + input wire pipe_rx4_polarity_i , + input wire pipe_tx4_compliance_i , + input wire [ 1:0] pipe_tx4_char_is_k_i , + input wire [15:0] pipe_tx4_data_i , + input wire pipe_tx4_elec_idle_i , + input wire [ 1:0] pipe_tx4_powerdown_i , + + input wire [ 1:0] pipe_rx4_char_is_k_i , + input wire [15:0] pipe_rx4_data_i , + input wire pipe_rx4_valid_i , + input wire pipe_rx4_chanisaligned_i , + input wire [ 2:0] pipe_rx4_status_i , + input wire pipe_rx4_phy_status_i , + input wire pipe_rx4_elec_idle_i , + output wire pipe_rx4_polarity_o , + output wire pipe_tx4_compliance_o , + output wire [ 1:0] pipe_tx4_char_is_k_o , + output wire [15:0] pipe_tx4_data_o , + output wire pipe_tx4_elec_idle_o , + output wire [ 1:0] pipe_tx4_powerdown_o , + + // Pipe Per-Lane Signals - Lane 5 + output wire [ 1:0] pipe_rx5_char_is_k_o , + output wire [15:0] pipe_rx5_data_o , + output wire pipe_rx5_valid_o , + output wire pipe_rx5_chanisaligned_o , + output wire [ 2:0] pipe_rx5_status_o , + output wire pipe_rx5_phy_status_o , + output wire pipe_rx5_elec_idle_o , + input wire pipe_rx5_polarity_i , + input wire pipe_tx5_compliance_i , + input wire [ 1:0] pipe_tx5_char_is_k_i , + input wire [15:0] pipe_tx5_data_i , + input wire pipe_tx5_elec_idle_i , + input wire [ 1:0] pipe_tx5_powerdown_i , + + input wire [ 1:0] pipe_rx5_char_is_k_i , + input wire [15:0] pipe_rx5_data_i , + input wire pipe_rx5_valid_i , + input wire pipe_rx5_chanisaligned_i , + input wire [ 2:0] pipe_rx5_status_i , + input wire pipe_rx5_phy_status_i , + input wire pipe_rx5_elec_idle_i , + output wire pipe_rx5_polarity_o , + output wire pipe_tx5_compliance_o , + output wire [ 1:0] pipe_tx5_char_is_k_o , + output wire [15:0] pipe_tx5_data_o , + output wire pipe_tx5_elec_idle_o , + output wire [ 1:0] pipe_tx5_powerdown_o , + + // Pipe Per-Lane Signals - Lane 6 + output wire [ 1:0] pipe_rx6_char_is_k_o , + output wire [15:0] pipe_rx6_data_o , + output wire pipe_rx6_valid_o , + output wire pipe_rx6_chanisaligned_o , + output wire [ 2:0] pipe_rx6_status_o , + output wire pipe_rx6_phy_status_o , + output wire pipe_rx6_elec_idle_o , + input wire pipe_rx6_polarity_i , + input wire pipe_tx6_compliance_i , + input wire [ 1:0] pipe_tx6_char_is_k_i , + input wire [15:0] pipe_tx6_data_i , + input wire pipe_tx6_elec_idle_i , + input wire [ 1:0] pipe_tx6_powerdown_i , + + input wire [ 1:0] pipe_rx6_char_is_k_i , + input wire [15:0] pipe_rx6_data_i , + input wire pipe_rx6_valid_i , + input wire pipe_rx6_chanisaligned_i , + input wire [ 2:0] pipe_rx6_status_i , + input wire pipe_rx6_phy_status_i , + input wire pipe_rx6_elec_idle_i , + output wire pipe_rx6_polarity_o , + output wire pipe_tx6_compliance_o , + output wire [ 1:0] pipe_tx6_char_is_k_o , + output wire [15:0] pipe_tx6_data_o , + output wire pipe_tx6_elec_idle_o , + output wire [ 1:0] pipe_tx6_powerdown_o , + + // Pipe Per-Lane Signals - Lane 7 + output wire [ 1:0] pipe_rx7_char_is_k_o , + output wire [15:0] pipe_rx7_data_o , + output wire pipe_rx7_valid_o , + output wire pipe_rx7_chanisaligned_o , + output wire [ 2:0] pipe_rx7_status_o , + output wire pipe_rx7_phy_status_o , + output wire pipe_rx7_elec_idle_o , + input wire pipe_rx7_polarity_i , + input wire pipe_tx7_compliance_i , + input wire [ 1:0] pipe_tx7_char_is_k_i , + input wire [15:0] pipe_tx7_data_i , + input wire pipe_tx7_elec_idle_i , + input wire [ 1:0] pipe_tx7_powerdown_i , + + input wire [ 1:0] pipe_rx7_char_is_k_i , + input wire [15:0] pipe_rx7_data_i , + input wire pipe_rx7_valid_i , + input wire pipe_rx7_chanisaligned_i , + input wire [ 2:0] pipe_rx7_status_i , + input wire pipe_rx7_phy_status_i , + input wire pipe_rx7_elec_idle_i , + output wire pipe_rx7_polarity_o , + output wire pipe_tx7_compliance_o , + output wire [ 1:0] pipe_tx7_char_is_k_o , + output wire [15:0] pipe_tx7_data_o , + output wire pipe_tx7_elec_idle_o , + output wire [ 1:0] pipe_tx7_powerdown_o , + + // Non PIPE signals + input wire pipe_clk , + input wire rst_n +); + + //******************************************************************// + // Reality check. // + //******************************************************************// + + //synthesis translate_off + // initial begin + // $display("[%t] %m LINK_CAP_MAX_LINK_WIDTH %0d PIPE_PIPELINE_STAGES %0d", + // $time, LINK_CAP_MAX_LINK_WIDTH, PIPE_PIPELINE_STAGES); + // end + //synthesis translate_on + + generate + +pcie_7x_0_pcie_pipe_misc # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_misc_i ( + + .pipe_tx_rcvr_det_i(pipe_tx_rcvr_det_i), + .pipe_tx_reset_i(pipe_tx_reset_i), + .pipe_tx_rate_i(pipe_tx_rate_i), + .pipe_tx_deemph_i(pipe_tx_deemph_i), + .pipe_tx_margin_i(pipe_tx_margin_i), + .pipe_tx_swing_i(pipe_tx_swing_i), + + .pipe_tx_rcvr_det_o(pipe_tx_rcvr_det_o), + .pipe_tx_reset_o(pipe_tx_reset_o), + .pipe_tx_rate_o(pipe_tx_rate_o), + .pipe_tx_deemph_o(pipe_tx_deemph_o), + .pipe_tx_margin_o(pipe_tx_margin_o), + .pipe_tx_swing_o(pipe_tx_swing_o) , + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + ); + + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_0_i ( + + .pipe_rx_char_is_k_o(pipe_rx0_char_is_k_o), + .pipe_rx_data_o(pipe_rx0_data_o), + .pipe_rx_valid_o(pipe_rx0_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx0_chanisaligned_o), + .pipe_rx_status_o(pipe_rx0_status_o), + .pipe_rx_phy_status_o(pipe_rx0_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx0_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx0_polarity_i), + .pipe_tx_compliance_i(pipe_tx0_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx0_char_is_k_i), + .pipe_tx_data_i(pipe_tx0_data_i), + .pipe_tx_elec_idle_i(pipe_tx0_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx0_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx0_char_is_k_i), + .pipe_rx_data_i(pipe_rx0_data_i), + .pipe_rx_valid_i(pipe_rx0_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx0_chanisaligned_i), + .pipe_rx_status_i(pipe_rx0_status_i), + .pipe_rx_phy_status_i(pipe_rx0_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx0_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx0_polarity_o), + .pipe_tx_compliance_o(pipe_tx0_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx0_char_is_k_o), + .pipe_tx_data_o(pipe_tx0_data_o), + .pipe_tx_elec_idle_o(pipe_tx0_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx0_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + + if (LINK_CAP_MAX_LINK_WIDTH >= 2) begin : pipe_2_lane + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_1_i ( + + .pipe_rx_char_is_k_o(pipe_rx1_char_is_k_o), + .pipe_rx_data_o(pipe_rx1_data_o), + .pipe_rx_valid_o(pipe_rx1_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx1_chanisaligned_o), + .pipe_rx_status_o(pipe_rx1_status_o), + .pipe_rx_phy_status_o(pipe_rx1_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx1_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx1_polarity_i), + .pipe_tx_compliance_i(pipe_tx1_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx1_char_is_k_i), + .pipe_tx_data_i(pipe_tx1_data_i), + .pipe_tx_elec_idle_i(pipe_tx1_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx1_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx1_char_is_k_i), + .pipe_rx_data_i(pipe_rx1_data_i), + .pipe_rx_valid_i(pipe_rx1_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx1_chanisaligned_i), + .pipe_rx_status_i(pipe_rx1_status_i), + .pipe_rx_phy_status_i(pipe_rx1_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx1_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx1_polarity_o), + .pipe_tx_compliance_o(pipe_tx1_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx1_char_is_k_o), + .pipe_tx_data_o(pipe_tx1_data_o), + .pipe_tx_elec_idle_o(pipe_tx1_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx1_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + + end // if (LINK_CAP_MAX_LINK_WIDTH >= 2) + else + begin + assign pipe_rx1_char_is_k_o = 2'b00; + assign pipe_rx1_data_o = 16'h0000; + assign pipe_rx1_valid_o = 1'b0; + assign pipe_rx1_chanisaligned_o = 1'b0; + assign pipe_rx1_status_o = 3'b000; + assign pipe_rx1_phy_status_o = 1'b0; + assign pipe_rx1_elec_idle_o = 1'b1; + assign pipe_rx1_polarity_o = 1'b0; + assign pipe_tx1_compliance_o = 1'b0; + assign pipe_tx1_char_is_k_o = 2'b00; + assign pipe_tx1_data_o = 16'h0000; + assign pipe_tx1_elec_idle_o = 1'b1; + assign pipe_tx1_powerdown_o = 2'b00; + end // if !(LINK_CAP_MAX_LINK_WIDTH >= 2) + + if (LINK_CAP_MAX_LINK_WIDTH >= 4) begin : pipe_4_lane + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + ) + pipe_lane_2_i ( + + .pipe_rx_char_is_k_o(pipe_rx2_char_is_k_o), + .pipe_rx_data_o(pipe_rx2_data_o), + .pipe_rx_valid_o(pipe_rx2_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx2_chanisaligned_o), + .pipe_rx_status_o(pipe_rx2_status_o), + .pipe_rx_phy_status_o(pipe_rx2_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx2_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx2_polarity_i), + .pipe_tx_compliance_i(pipe_tx2_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx2_char_is_k_i), + .pipe_tx_data_i(pipe_tx2_data_i), + .pipe_tx_elec_idle_i(pipe_tx2_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx2_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx2_char_is_k_i), + .pipe_rx_data_i(pipe_rx2_data_i), + .pipe_rx_valid_i(pipe_rx2_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx2_chanisaligned_i), + .pipe_rx_status_i(pipe_rx2_status_i), + .pipe_rx_phy_status_i(pipe_rx2_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx2_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx2_polarity_o), + .pipe_tx_compliance_o(pipe_tx2_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx2_char_is_k_o), + .pipe_tx_data_o(pipe_tx2_data_o), + .pipe_tx_elec_idle_o(pipe_tx2_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx2_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_3_i ( + + .pipe_rx_char_is_k_o(pipe_rx3_char_is_k_o), + .pipe_rx_data_o(pipe_rx3_data_o), + .pipe_rx_valid_o(pipe_rx3_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx3_chanisaligned_o), + .pipe_rx_status_o(pipe_rx3_status_o), + .pipe_rx_phy_status_o(pipe_rx3_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx3_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx3_polarity_i), + .pipe_tx_compliance_i(pipe_tx3_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx3_char_is_k_i), + .pipe_tx_data_i(pipe_tx3_data_i), + .pipe_tx_elec_idle_i(pipe_tx3_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx3_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx3_char_is_k_i), + .pipe_rx_data_i(pipe_rx3_data_i), + .pipe_rx_valid_i(pipe_rx3_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx3_chanisaligned_i), + .pipe_rx_status_i(pipe_rx3_status_i), + .pipe_rx_phy_status_i(pipe_rx3_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx3_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx3_polarity_o), + .pipe_tx_compliance_o(pipe_tx3_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx3_char_is_k_o), + .pipe_tx_data_o(pipe_tx3_data_o), + .pipe_tx_elec_idle_o(pipe_tx3_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx3_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + + end // if (LINK_CAP_MAX_LINK_WIDTH >= 4) + else + begin + assign pipe_rx2_char_is_k_o = 2'b00; + assign pipe_rx2_data_o = 16'h0000; + assign pipe_rx2_valid_o = 1'b0; + assign pipe_rx2_chanisaligned_o = 1'b0; + assign pipe_rx2_status_o = 3'b000; + assign pipe_rx2_phy_status_o = 1'b0; + assign pipe_rx2_elec_idle_o = 1'b1; + assign pipe_rx2_polarity_o = 1'b0; + assign pipe_tx2_compliance_o = 1'b0; + assign pipe_tx2_char_is_k_o = 2'b00; + assign pipe_tx2_data_o = 16'h0000; + assign pipe_tx2_elec_idle_o = 1'b1; + assign pipe_tx2_powerdown_o = 2'b00; + + assign pipe_rx3_char_is_k_o = 2'b00; + assign pipe_rx3_data_o = 16'h0000; + assign pipe_rx3_valid_o = 1'b0; + assign pipe_rx3_chanisaligned_o = 1'b0; + assign pipe_rx3_status_o = 3'b000; + assign pipe_rx3_phy_status_o = 1'b0; + assign pipe_rx3_elec_idle_o = 1'b1; + assign pipe_rx3_polarity_o = 1'b0; + assign pipe_tx3_compliance_o = 1'b0; + assign pipe_tx3_char_is_k_o = 2'b00; + assign pipe_tx3_data_o = 16'h0000; + assign pipe_tx3_elec_idle_o = 1'b1; + assign pipe_tx3_powerdown_o = 2'b00; + end // if !(LINK_CAP_MAX_LINK_WIDTH >= 4) + + if (LINK_CAP_MAX_LINK_WIDTH >= 8) begin : pipe_8_lane + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_4_i ( + + .pipe_rx_char_is_k_o(pipe_rx4_char_is_k_o), + .pipe_rx_data_o(pipe_rx4_data_o), + .pipe_rx_valid_o(pipe_rx4_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx4_chanisaligned_o), + .pipe_rx_status_o(pipe_rx4_status_o), + .pipe_rx_phy_status_o(pipe_rx4_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx4_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx4_polarity_i), + .pipe_tx_compliance_i(pipe_tx4_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx4_char_is_k_i), + .pipe_tx_data_i(pipe_tx4_data_i), + .pipe_tx_elec_idle_i(pipe_tx4_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx4_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx4_char_is_k_i), + .pipe_rx_data_i(pipe_rx4_data_i), + .pipe_rx_valid_i(pipe_rx4_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx4_chanisaligned_i), + .pipe_rx_status_i(pipe_rx4_status_i), + .pipe_rx_phy_status_i(pipe_rx4_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx4_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx4_polarity_o), + .pipe_tx_compliance_o(pipe_tx4_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx4_char_is_k_o), + .pipe_tx_data_o(pipe_tx4_data_o), + .pipe_tx_elec_idle_o(pipe_tx4_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx4_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_5_i ( + + .pipe_rx_char_is_k_o(pipe_rx5_char_is_k_o), + .pipe_rx_data_o(pipe_rx5_data_o), + .pipe_rx_valid_o(pipe_rx5_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx5_chanisaligned_o), + .pipe_rx_status_o(pipe_rx5_status_o), + .pipe_rx_phy_status_o(pipe_rx5_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx5_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx5_polarity_i), + .pipe_tx_compliance_i(pipe_tx5_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx5_char_is_k_i), + .pipe_tx_data_i(pipe_tx5_data_i), + .pipe_tx_elec_idle_i(pipe_tx5_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx5_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx5_char_is_k_i), + .pipe_rx_data_i(pipe_rx5_data_i), + .pipe_rx_valid_i(pipe_rx5_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx5_chanisaligned_i), + .pipe_rx_status_i(pipe_rx5_status_i), + .pipe_rx_phy_status_i(pipe_rx5_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx5_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx5_polarity_o), + .pipe_tx_compliance_o(pipe_tx5_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx5_char_is_k_o), + .pipe_tx_data_o(pipe_tx5_data_o), + .pipe_tx_elec_idle_o(pipe_tx5_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx5_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_6_i ( + + .pipe_rx_char_is_k_o(pipe_rx6_char_is_k_o), + .pipe_rx_data_o(pipe_rx6_data_o), + .pipe_rx_valid_o(pipe_rx6_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx6_chanisaligned_o), + .pipe_rx_status_o(pipe_rx6_status_o), + .pipe_rx_phy_status_o(pipe_rx6_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx6_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx6_polarity_i), + .pipe_tx_compliance_i(pipe_tx6_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx6_char_is_k_i), + .pipe_tx_data_i(pipe_tx6_data_i), + .pipe_tx_elec_idle_i(pipe_tx6_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx6_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx6_char_is_k_i), + .pipe_rx_data_i(pipe_rx6_data_i), + .pipe_rx_valid_i(pipe_rx6_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx6_chanisaligned_i), + .pipe_rx_status_i(pipe_rx6_status_i), + .pipe_rx_phy_status_i(pipe_rx6_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx6_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx6_polarity_o), + .pipe_tx_compliance_o(pipe_tx6_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx6_char_is_k_o), + .pipe_tx_data_o(pipe_tx6_data_o), + .pipe_tx_elec_idle_o(pipe_tx6_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx6_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + +pcie_7x_0_pcie_pipe_lane # ( + + .PIPE_PIPELINE_STAGES(PIPE_PIPELINE_STAGES) + + ) + pipe_lane_7_i ( + + .pipe_rx_char_is_k_o(pipe_rx7_char_is_k_o), + .pipe_rx_data_o(pipe_rx7_data_o), + .pipe_rx_valid_o(pipe_rx7_valid_o), + .pipe_rx_chanisaligned_o(pipe_rx7_chanisaligned_o), + .pipe_rx_status_o(pipe_rx7_status_o), + .pipe_rx_phy_status_o(pipe_rx7_phy_status_o), + .pipe_rx_elec_idle_o(pipe_rx7_elec_idle_o), + .pipe_rx_polarity_i(pipe_rx7_polarity_i), + .pipe_tx_compliance_i(pipe_tx7_compliance_i), + .pipe_tx_char_is_k_i(pipe_tx7_char_is_k_i), + .pipe_tx_data_i(pipe_tx7_data_i), + .pipe_tx_elec_idle_i(pipe_tx7_elec_idle_i), + .pipe_tx_powerdown_i(pipe_tx7_powerdown_i), + + .pipe_rx_char_is_k_i(pipe_rx7_char_is_k_i), + .pipe_rx_data_i(pipe_rx7_data_i), + .pipe_rx_valid_i(pipe_rx7_valid_i), + .pipe_rx_chanisaligned_i(pipe_rx7_chanisaligned_i), + .pipe_rx_status_i(pipe_rx7_status_i), + .pipe_rx_phy_status_i(pipe_rx7_phy_status_i), + .pipe_rx_elec_idle_i(pipe_rx7_elec_idle_i), + .pipe_rx_polarity_o(pipe_rx7_polarity_o), + .pipe_tx_compliance_o(pipe_tx7_compliance_o), + .pipe_tx_char_is_k_o(pipe_tx7_char_is_k_o), + .pipe_tx_data_o(pipe_tx7_data_o), + .pipe_tx_elec_idle_o(pipe_tx7_elec_idle_o), + .pipe_tx_powerdown_o(pipe_tx7_powerdown_o), + + .pipe_clk(pipe_clk), + .rst_n(rst_n) + + ); + + end // if (LINK_CAP_MAX_LINK_WIDTH >= 8) + else + begin + assign pipe_rx4_char_is_k_o = 2'b00; + assign pipe_rx4_data_o = 16'h0000; + assign pipe_rx4_valid_o = 1'b0; + assign pipe_rx4_chanisaligned_o = 1'b0; + assign pipe_rx4_status_o = 3'b000; + assign pipe_rx4_phy_status_o = 1'b0; + assign pipe_rx4_elec_idle_o = 1'b1; + assign pipe_rx4_polarity_o = 1'b0; + assign pipe_tx4_compliance_o = 1'b0; + assign pipe_tx4_char_is_k_o = 2'b00; + assign pipe_tx4_data_o = 16'h0000; + assign pipe_tx4_elec_idle_o = 1'b1; + assign pipe_tx4_powerdown_o = 2'b00; + + assign pipe_rx5_char_is_k_o = 2'b00; + assign pipe_rx5_data_o = 16'h0000; + assign pipe_rx5_valid_o = 1'b0; + assign pipe_rx5_chanisaligned_o = 1'b0; + assign pipe_rx5_status_o = 3'b000; + assign pipe_rx5_phy_status_o = 1'b0; + assign pipe_rx5_elec_idle_o = 1'b1; + assign pipe_rx5_polarity_o = 1'b0; + assign pipe_tx5_compliance_o = 1'b0; + assign pipe_tx5_char_is_k_o = 2'b00; + assign pipe_tx5_data_o = 16'h0000; + assign pipe_tx5_elec_idle_o = 1'b1; + assign pipe_tx5_powerdown_o = 2'b00; + + assign pipe_rx6_char_is_k_o = 2'b00; + assign pipe_rx6_data_o = 16'h0000; + assign pipe_rx6_valid_o = 1'b0; + assign pipe_rx6_chanisaligned_o = 1'b0; + assign pipe_rx6_status_o = 3'b000; + assign pipe_rx6_phy_status_o = 1'b0; + assign pipe_rx6_elec_idle_o = 1'b1; + assign pipe_rx6_polarity_o = 1'b0; + assign pipe_tx6_compliance_o = 1'b0; + assign pipe_tx6_char_is_k_o = 2'b00; + assign pipe_tx6_data_o = 16'h0000; + assign pipe_tx6_elec_idle_o = 1'b1; + assign pipe_tx6_powerdown_o = 2'b00; + + assign pipe_rx7_char_is_k_o = 2'b00; + assign pipe_rx7_data_o = 16'h0000; + assign pipe_rx7_valid_o = 1'b0; + assign pipe_rx7_chanisaligned_o = 1'b0; + assign pipe_rx7_status_o = 3'b000; + assign pipe_rx7_phy_status_o = 1'b0; + assign pipe_rx7_elec_idle_o = 1'b1; + assign pipe_rx7_polarity_o = 1'b0; + assign pipe_tx7_compliance_o = 1'b0; + assign pipe_tx7_char_is_k_o = 2'b00; + assign pipe_tx7_data_o = 16'h0000; + assign pipe_tx7_elec_idle_o = 1'b1; + assign pipe_tx7_powerdown_o = 2'b00; + end // if !(LINK_CAP_MAX_LINK_WIDTH >= 8) + + endgenerate + +endmodule + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_top.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_top.v new file mode 100644 index 0000000000000000000000000000000000000000..ca83be2c8e661ca22aae69a4e75b8a357ec27139 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pcie_top.v @@ -0,0 +1,2081 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pcie_top.v +// Version : 3.3 +// Description: Solution wrapper for Virtex7 Hard Block for PCI Express +// +// +// +//-------------------------------------------------------------------------------- + +`timescale 1ps/1ps + +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pcie_top # ( + // PCIE_2_1 params + parameter PIPE_PIPELINE_STAGES = 0, // 0 - 0 stages, 1 - 1 stage, 2 - 2 stages + parameter [11:0] AER_BASE_PTR = 12'h140, + parameter AER_CAP_ECRC_CHECK_CAPABLE = "FALSE", + parameter DEV_CAP_ROLE_BASED_ERROR = "TRUE", + parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE = "FALSE", + parameter AER_CAP_ECRC_GEN_CAPABLE = "FALSE", + parameter [15:0] AER_CAP_ID = 16'h0001, + parameter AER_CAP_MULTIHEADER = "FALSE", + parameter [11:0] AER_CAP_NEXTPTR = 12'h178, + parameter AER_CAP_ON = "FALSE", + parameter [23:0] AER_CAP_OPTIONAL_ERR_SUPPORT = 24'h000000, + parameter AER_CAP_PERMIT_ROOTERR_UPDATE = "TRUE", + parameter [3:0] AER_CAP_VERSION = 4'h1, + parameter ALLOW_X8_GEN2 = "FALSE", + parameter [31:0] BAR0 = 32'hFFFFFF00, + parameter [31:0] BAR1 = 32'hFFFF0000, + parameter [31:0] BAR2 = 32'hFFFF000C, + parameter [31:0] BAR3 = 32'hFFFFFFFF, + parameter [31:0] BAR4 = 32'h00000000, + parameter [31:0] BAR5 = 32'h00000000, + parameter C_DATA_WIDTH = 64, + parameter REM_WIDTH = (C_DATA_WIDTH == 128) ? 2 : 1, + parameter KEEP_WIDTH = C_DATA_WIDTH / 8, + parameter [7:0] CAPABILITIES_PTR = 8'h40, + parameter [31:0] CARDBUS_CIS_POINTER = 32'h00000000, + parameter [23:0] CLASS_CODE = 24'h000000, + parameter CFG_ECRC_ERR_CPLSTAT = 0, + parameter CMD_INTX_IMPLEMENTED = "TRUE", + parameter CPL_TIMEOUT_DISABLE_SUPPORTED = "FALSE", + parameter [3:0] CPL_TIMEOUT_RANGES_SUPPORTED = 4'h0, + parameter [6:0] CRM_MODULE_RSTS = 7'h00, + parameter DEV_CAP2_ARI_FORWARDING_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED = "FALSE", + parameter DEV_CAP2_CAS128_COMPLETER_SUPPORTED = "FALSE", + parameter DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED = "FALSE", + parameter DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED = "FALSE", + parameter DEV_CAP2_LTR_MECHANISM_SUPPORTED = "FALSE", + parameter [1:0] DEV_CAP2_MAX_ENDEND_TLP_PREFIXES = 2'h0, + parameter DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING = "FALSE", + parameter [1:0] DEV_CAP2_TPH_COMPLETER_SUPPORTED = 2'h0, + parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE = "TRUE", + parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE = "TRUE", + parameter integer DEV_CAP_ENDPOINT_L0S_LATENCY = 0, + parameter integer DEV_CAP_ENDPOINT_L1_LATENCY = 0, + parameter DEV_CAP_EXT_TAG_SUPPORTED = "TRUE", + parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "FALSE", + parameter integer DEV_CAP_MAX_PAYLOAD_SUPPORTED = 2, + parameter integer DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT = 0, + parameter integer DEV_CAP_RSVD_14_12 = 0, + parameter integer DEV_CAP_RSVD_17_16 = 0, + parameter integer DEV_CAP_RSVD_31_29 = 0, + parameter DEV_CONTROL_AUX_POWER_SUPPORTED = "FALSE", + parameter DEV_CONTROL_EXT_TAG_DEFAULT = "FALSE", + parameter DISABLE_ASPM_L1_TIMER = "FALSE", + parameter DISABLE_BAR_FILTERING = "FALSE", + parameter DISABLE_ERR_MSG = "FALSE", + parameter DISABLE_ID_CHECK = "FALSE", + parameter DISABLE_LANE_REVERSAL = "FALSE", + parameter DISABLE_LOCKED_FILTER = "FALSE", + parameter DISABLE_PPM_FILTER = "FALSE", + parameter DISABLE_RX_POISONED_RESP = "FALSE", + parameter DISABLE_RX_TC_FILTER = "FALSE", + parameter DISABLE_SCRAMBLING = "FALSE", + parameter [7:0] DNSTREAM_LINK_NUM = 8'h00, + parameter [11:0] DSN_BASE_PTR = 12'h100, + parameter [15:0] DSN_CAP_ID = 16'h0003, + parameter [11:0] DSN_CAP_NEXTPTR = 12'h10C, + parameter DSN_CAP_ON = "TRUE", + parameter [3:0] DSN_CAP_VERSION = 4'h1, + parameter [10:0] ENABLE_MSG_ROUTE = 11'h000, + parameter ENABLE_RX_TD_ECRC_TRIM = "FALSE", + parameter ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED = "FALSE", + parameter ENTER_RVRY_EI_L0 = "TRUE", + parameter EXIT_LOOPBACK_ON_EI = "TRUE", + parameter [31:0] EXPANSION_ROM = 32'hFFFFF001, + parameter [5:0] EXT_CFG_CAP_PTR = 6'h3F, + parameter [9:0] EXT_CFG_XP_CAP_PTR = 10'h3FF, + parameter [7:0] HEADER_TYPE = 8'h00, + parameter [4:0] INFER_EI = 5'h00, + parameter [7:0] INTERRUPT_PIN = 8'h01, + parameter INTERRUPT_STAT_AUTO = "TRUE", + parameter IS_SWITCH = "FALSE", + parameter [9:0] LAST_CONFIG_DWORD = 10'h3FF, + parameter LINK_CAP_ASPM_OPTIONALITY = "TRUE", + parameter integer LINK_CAP_ASPM_SUPPORT = 1, + parameter LINK_CAP_CLOCK_POWER_MANAGEMENT = "FALSE", + parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP = "FALSE", + parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 7, + parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN1 = 7, + parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN2 = 7, + parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP = "FALSE", + parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1, + parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08, + parameter integer LINK_CAP_RSVD_23 = 0, + parameter integer LINK_CONTROL_RCB = 0, + parameter LINK_CTRL2_DEEMPHASIS = "FALSE", + parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE = "FALSE", + parameter [3:0] LINK_CTRL2_TARGET_LINK_SPEED = 4'h2, + parameter LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE", + parameter [14:0] LL_ACK_TIMEOUT = 15'h0000, + parameter LL_ACK_TIMEOUT_EN = "FALSE", + parameter integer LL_ACK_TIMEOUT_FUNC = 0, + parameter [14:0] LL_REPLAY_TIMEOUT = 15'h0000, + parameter LL_REPLAY_TIMEOUT_EN = "FALSE", + parameter integer LL_REPLAY_TIMEOUT_FUNC = 0, + parameter [5:0] LTSSM_MAX_LINK_WIDTH = 6'h01, + parameter MPS_FORCE = "FALSE", + parameter [7:0] MSIX_BASE_PTR = 8'h9C, + parameter [7:0] MSIX_CAP_ID = 8'h11, + parameter [7:0] MSIX_CAP_NEXTPTR = 8'h00, + parameter MSIX_CAP_ON = "FALSE", + parameter integer MSIX_CAP_PBA_BIR = 0, + parameter [28:0] MSIX_CAP_PBA_OFFSET = 29'h00000050, + parameter integer MSIX_CAP_TABLE_BIR = 0, + parameter [28:0] MSIX_CAP_TABLE_OFFSET = 29'h00000040, + parameter [10:0] MSIX_CAP_TABLE_SIZE = 11'h000, + parameter [7:0] MSI_BASE_PTR = 8'h48, + parameter MSI_CAP_64_BIT_ADDR_CAPABLE = "TRUE", + parameter [7:0] MSI_CAP_ID = 8'h05, + parameter integer MSI_CAP_MULTIMSGCAP = 0, + parameter integer MSI_CAP_MULTIMSG_EXTENSION = 0, + parameter [7:0] MSI_CAP_NEXTPTR = 8'h60, + parameter MSI_CAP_ON = "FALSE", + parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE = "TRUE", + parameter integer N_FTS_COMCLK_GEN1 = 255, + parameter integer N_FTS_COMCLK_GEN2 = 255, + parameter integer N_FTS_GEN1 = 255, + parameter integer N_FTS_GEN2 = 255, + parameter [7:0] PCIE_BASE_PTR = 8'h60, + parameter [7:0] PCIE_CAP_CAPABILITY_ID = 8'h10, + parameter [3:0] PCIE_CAP_CAPABILITY_VERSION = 4'h2, + parameter [3:0] PCIE_CAP_DEVICE_PORT_TYPE = 4'h0, + parameter [7:0] PCIE_CAP_NEXTPTR = 8'h9C, + parameter PCIE_CAP_ON = "TRUE", + parameter integer PCIE_CAP_RSVD_15_14 = 0, + parameter PCIE_CAP_SLOT_IMPLEMENTED = "FALSE", + parameter integer PCIE_REVISION = 2, + parameter integer PL_AUTO_CONFIG = 0, + parameter PL_FAST_TRAIN = "FALSE", + parameter [14:0] PM_ASPML0S_TIMEOUT = 15'h0000, + parameter PM_ASPML0S_TIMEOUT_EN = "FALSE", + parameter integer PM_ASPML0S_TIMEOUT_FUNC = 0, + parameter PM_ASPM_FASTEXIT = "FALSE", + parameter [7:0] PM_BASE_PTR = 8'h40, + parameter integer PM_CAP_AUXCURRENT = 0, + parameter PM_CAP_D1SUPPORT = "TRUE", + parameter PM_CAP_D2SUPPORT = "TRUE", + parameter PM_CAP_DSI = "FALSE", + parameter [7:0] PM_CAP_ID = 8'h01, + parameter [7:0] PM_CAP_NEXTPTR = 8'h48, + parameter PM_CAP_ON = "TRUE", + parameter [4:0] PM_CAP_PMESUPPORT = 5'h0F, + parameter PM_CAP_PME_CLOCK = "FALSE", + parameter integer PM_CAP_RSVD_04 = 0, + parameter integer PM_CAP_VERSION = 3, + parameter PM_CSR_B2B3 = "FALSE", + parameter PM_CSR_BPCCEN = "FALSE", + parameter PM_CSR_NOSOFTRST = "TRUE", + parameter [7:0] PM_DATA0 = 8'h01, + parameter [7:0] PM_DATA1 = 8'h01, + parameter [7:0] PM_DATA2 = 8'h01, + parameter [7:0] PM_DATA3 = 8'h01, + parameter [7:0] PM_DATA4 = 8'h01, + parameter [7:0] PM_DATA5 = 8'h01, + parameter [7:0] PM_DATA6 = 8'h01, + parameter [7:0] PM_DATA7 = 8'h01, + parameter [1:0] PM_DATA_SCALE0 = 2'h1, + parameter [1:0] PM_DATA_SCALE1 = 2'h1, + parameter [1:0] PM_DATA_SCALE2 = 2'h1, + parameter [1:0] PM_DATA_SCALE3 = 2'h1, + parameter [1:0] PM_DATA_SCALE4 = 2'h1, + parameter [1:0] PM_DATA_SCALE5 = 2'h1, + parameter [1:0] PM_DATA_SCALE6 = 2'h1, + parameter [1:0] PM_DATA_SCALE7 = 2'h1, + parameter PM_MF = "FALSE", + parameter [11:0] RBAR_BASE_PTR = 12'h178, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR0 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR1 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR2 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR3 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR4 = 5'h00, + parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR5 = 5'h00, + parameter [15:0] RBAR_CAP_ID = 16'h0015, + parameter [2:0] RBAR_CAP_INDEX0 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX1 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX2 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX3 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX4 = 3'h0, + parameter [2:0] RBAR_CAP_INDEX5 = 3'h0, + parameter [11:0] RBAR_CAP_NEXTPTR = 12'h000, + parameter RBAR_CAP_ON = "FALSE", + parameter [31:0] RBAR_CAP_SUP0 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP1 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP2 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP3 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP4 = 32'h00000000, + parameter [31:0] RBAR_CAP_SUP5 = 32'h00000000, + parameter [3:0] RBAR_CAP_VERSION = 4'h1, + parameter [2:0] RBAR_NUM = 3'h1, + parameter integer RECRC_CHK = 0, + parameter RECRC_CHK_TRIM = "FALSE", + parameter ROOT_CAP_CRS_SW_VISIBILITY = "FALSE", + parameter [1:0] RP_AUTO_SPD = 2'h1, + parameter [4:0] RP_AUTO_SPD_LOOPCNT = 5'h1f, + parameter SELECT_DLL_IF = "FALSE", + parameter SIM_VERSION = "1.0", + parameter SLOT_CAP_ATT_BUTTON_PRESENT = "FALSE", + parameter SLOT_CAP_ATT_INDICATOR_PRESENT = "FALSE", + parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT = "FALSE", + parameter SLOT_CAP_HOTPLUG_CAPABLE = "FALSE", + parameter SLOT_CAP_HOTPLUG_SURPRISE = "FALSE", + parameter SLOT_CAP_MRL_SENSOR_PRESENT = "FALSE", + parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT = "FALSE", + parameter [12:0] SLOT_CAP_PHYSICAL_SLOT_NUM = 13'h0000, + parameter SLOT_CAP_POWER_CONTROLLER_PRESENT = "FALSE", + parameter SLOT_CAP_POWER_INDICATOR_PRESENT = "FALSE", + parameter integer SLOT_CAP_SLOT_POWER_LIMIT_SCALE = 0, + parameter [7:0] SLOT_CAP_SLOT_POWER_LIMIT_VALUE = 8'h00, + parameter integer SPARE_BIT0 = 0, + parameter integer SPARE_BIT1 = 0, + parameter integer SPARE_BIT2 = 0, + parameter integer SPARE_BIT3 = 0, + parameter integer SPARE_BIT4 = 0, + parameter integer SPARE_BIT5 = 0, + parameter integer SPARE_BIT6 = 0, + parameter integer SPARE_BIT7 = 0, + parameter integer SPARE_BIT8 = 0, + parameter [7:0] SPARE_BYTE0 = 8'h00, + parameter [7:0] SPARE_BYTE1 = 8'h00, + parameter [7:0] SPARE_BYTE2 = 8'h00, + parameter [7:0] SPARE_BYTE3 = 8'h00, + parameter [31:0] SPARE_WORD0 = 32'h00000000, + parameter [31:0] SPARE_WORD1 = 32'h00000000, + parameter [31:0] SPARE_WORD2 = 32'h00000000, + parameter [31:0] SPARE_WORD3 = 32'h00000000, + parameter SSL_MESSAGE_AUTO = "FALSE", + parameter TECRC_EP_INV = "FALSE", + parameter TL_RBYPASS = "FALSE", + parameter integer TL_RX_RAM_RADDR_LATENCY = 0, + parameter integer TL_RX_RAM_RDATA_LATENCY = 2, + parameter integer TL_RX_RAM_WRITE_LATENCY = 0, + parameter TL_TFC_DISABLE = "FALSE", + parameter TL_TX_CHECKS_DISABLE = "FALSE", + parameter integer TL_TX_RAM_RADDR_LATENCY = 0, + parameter integer TL_TX_RAM_RDATA_LATENCY = 2, + parameter integer TL_TX_RAM_WRITE_LATENCY = 0, + parameter TRN_DW = "FALSE", + parameter TRN_NP_FC = "FALSE", + parameter UPCONFIG_CAPABLE = "TRUE", + parameter UPSTREAM_FACING = "TRUE", + parameter UR_ATOMIC = "TRUE", + parameter UR_CFG1 = "TRUE", + parameter UR_INV_REQ = "TRUE", + parameter UR_PRS_RESPONSE = "TRUE", + parameter USER_CLK2_DIV2 = "FALSE", + parameter integer USER_CLK_FREQ = 3, + parameter USE_RID_PINS = "FALSE", + parameter VC0_CPL_INFINITE = "TRUE", + parameter [12:0] VC0_RX_RAM_LIMIT = 13'h03FF, + parameter integer VC0_TOTAL_CREDITS_CD = 127, + parameter integer VC0_TOTAL_CREDITS_CH = 31, + parameter integer VC0_TOTAL_CREDITS_NPD = 24, + parameter integer VC0_TOTAL_CREDITS_NPH = 12, + parameter integer VC0_TOTAL_CREDITS_PD = 288, + parameter integer VC0_TOTAL_CREDITS_PH = 32, + parameter integer VC0_TX_LASTPACKET = 31, + parameter [11:0] VC_BASE_PTR = 12'h10C, + parameter [15:0] VC_CAP_ID = 16'h0002, + parameter [11:0] VC_CAP_NEXTPTR = 12'h000, + parameter VC_CAP_ON = "FALSE", + parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS = "FALSE", + parameter [3:0] VC_CAP_VERSION = 4'h1, + parameter [11:0] VSEC_BASE_PTR = 12'h128, + parameter [15:0] VSEC_CAP_HDR_ID = 16'h1234, + parameter [11:0] VSEC_CAP_HDR_LENGTH = 12'h018, + parameter [3:0] VSEC_CAP_HDR_REVISION = 4'h1, + parameter [15:0] VSEC_CAP_ID = 16'h000B, + parameter VSEC_CAP_IS_LINK_VISIBLE = "TRUE", + parameter [11:0] VSEC_CAP_NEXTPTR = 12'h140, + parameter VSEC_CAP_ON = "FALSE", + parameter [3:0] VSEC_CAP_VERSION = 4'h1, + parameter ENABLE_JTAG_DBG = "FALSE", + parameter REDUCE_OOB_FREQ = "FALSE" +) +( + + // wrapper input + // Common + output user_clk_out, + input user_reset, + input user_lnk_up, + + output trn_lnk_up, + output user_rst_n, + + // Tx + output [5:0] tx_buf_av, + output tx_err_drop, + output tx_cfg_req, + output s_axis_tx_tready, + input [C_DATA_WIDTH-1:0] s_axis_tx_tdata, + input [KEEP_WIDTH-1:0] s_axis_tx_tkeep, + input [3:0] s_axis_tx_tuser, + input s_axis_tx_tlast, + input s_axis_tx_tvalid, + input tx_cfg_gnt, + + // Rx + output [C_DATA_WIDTH-1:0] m_axis_rx_tdata, + output [KEEP_WIDTH-1:0] m_axis_rx_tkeep, + output m_axis_rx_tlast, + output m_axis_rx_tvalid, + input m_axis_rx_tready, + output [21:0] m_axis_rx_tuser, + input rx_np_ok, + input rx_np_req, + + // Flow Control + output [11:0] fc_cpld, + output [7:0] fc_cplh, + output [11:0] fc_npd, + output [7:0] fc_nph, + output [11:0] fc_pd, + output [7:0] fc_ph, + input [2:0] fc_sel, + + input wire [1:0] pl_directed_link_change, + input wire [1:0] pl_directed_link_width, + input wire pl_directed_link_speed, + input wire pl_directed_link_auton, + input wire pl_upstream_prefer_deemph, + input wire pl_downstream_deemph_source, + input wire pl_directed_ltssm_new_vld, + input wire [5:0] pl_directed_ltssm_new, + input wire pl_directed_ltssm_stall, + + input wire cm_rst_n, + input wire func_lvl_rst_n, + input wire pl_transmit_hot_rst, + input wire [31:0] cfg_mgmt_di, + input wire [3:0] cfg_mgmt_byte_en_n, + input wire [9:0] cfg_mgmt_dwaddr, + input wire cfg_mgmt_wr_rw1c_as_rw_n, + input wire cfg_mgmt_wr_readonly_n, + input wire cfg_mgmt_wr_en_n, + input wire cfg_mgmt_rd_en_n, + input wire cfg_err_malformed_n, + input wire cfg_err_cor_n, + input wire cfg_err_ur_n, + input wire cfg_err_ecrc_n, + input wire cfg_err_cpl_timeout_n, + input wire cfg_err_cpl_abort_n, + input wire cfg_err_cpl_unexpect_n, + input wire cfg_err_poisoned_n, + input wire cfg_err_acs_n, + input wire cfg_err_atomic_egress_blocked_n, + input wire cfg_err_mc_blocked_n, + input wire cfg_err_internal_uncor_n, + input wire cfg_err_internal_cor_n, + input wire cfg_err_posted_n, + input wire cfg_err_locked_n, + input wire cfg_err_norecovery_n, + input wire [127:0] cfg_err_aer_headerlog, + input wire [47:0] cfg_err_tlp_cpl_header, + input wire cfg_interrupt_n, + input wire [7:0] cfg_interrupt_di, + input wire cfg_interrupt_assert_n, + input wire cfg_interrupt_stat_n, + input wire [7:0] cfg_ds_bus_number, + input wire [4:0] cfg_ds_device_number, + input wire [2:0] cfg_ds_function_number, + input wire [7:0] cfg_port_number, + input wire cfg_pm_halt_aspm_l0s_n, + input wire cfg_pm_halt_aspm_l1_n, + input wire cfg_pm_force_state_en_n, + input wire [1:0] cfg_pm_force_state, + input wire cfg_pm_wake_n, + input wire cfg_turnoff_ok, + input wire cfg_pm_send_pme_to_n, + input wire [4:0] cfg_pciecap_interrupt_msgnum, + input wire cfg_trn_pending, + input wire [2:0] cfg_force_mps, + input wire cfg_force_common_clock_off, + input wire cfg_force_extended_sync_on, + input wire [63:0] cfg_dsn, + input wire [4:0] cfg_aer_interrupt_msgnum, + input wire [15:0] cfg_dev_id, + input wire [15:0] cfg_vend_id, + input wire [7:0] cfg_rev_id, + input wire [15:0] cfg_subsys_id, + input wire [15:0] cfg_subsys_vend_id, + input wire drp_clk, + input wire drp_en, + input wire drp_we, + input wire [8:0] drp_addr, + input wire [15:0] drp_di, + input wire [1:0] dbg_mode, + input wire dbg_sub_mode, + input wire [2:0] pl_dbg_mode , + + output wire pl_sel_lnk_rate, + output wire [1:0] pl_sel_lnk_width, + output wire [5:0] pl_ltssm_state, + output wire [1:0] pl_lane_reversal_mode, + output wire pl_phy_lnk_up, + output wire [2:0] pl_tx_pm_state, + output wire [1:0] pl_rx_pm_state, + output wire pl_link_upcfg_cap, + output wire pl_link_gen2_cap, + output wire pl_link_partner_gen2_supported, + output wire [2:0] pl_initial_link_width, + output wire pl_directed_change_done, + output wire pl_received_hot_rst, + output wire lnk_clk_en, + output wire [31:0] cfg_mgmt_do, + output wire cfg_mgmt_rd_wr_done, + output wire cfg_err_aer_headerlog_set, + output wire cfg_err_cpl_rdy, + output wire cfg_interrupt_rdy, + output wire [2:0] cfg_interrupt_mmenable, + output wire cfg_interrupt_msienable, + output wire [7:0] cfg_interrupt_do, + output wire cfg_interrupt_msixenable, + output wire cfg_interrupt_msixfm, + output wire [7:0] cfg_bus_number, + output wire [4:0] cfg_device_number, + output wire [2:0] cfg_function_number, + output wire [15:0] cfg_status, + output wire [15:0] cfg_command, + output wire [15:0] cfg_dstatus, + output wire [15:0] cfg_dcommand, + output wire [15:0] cfg_lstatus, + output wire [15:0] cfg_lcommand, + output wire [15:0] cfg_dcommand2, + output wire cfg_received_func_lvl_rst, + output wire cfg_msg_received, + output wire [15:0] cfg_msg_data, + output wire cfg_msg_received_err_cor, + output wire cfg_msg_received_err_non_fatal, + output wire cfg_msg_received_err_fatal, + output wire cfg_msg_received_assert_int_a, + output wire cfg_msg_received_deassert_int_a, + output wire cfg_msg_received_assert_int_b, + output wire cfg_msg_received_deassert_int_b, + output wire cfg_msg_received_assert_int_c, + output wire cfg_msg_received_deassert_int_c, + output wire cfg_msg_received_assert_int_d, + output wire cfg_msg_received_deassert_int_d, + output wire cfg_msg_received_pm_pme, + output wire cfg_msg_received_pme_to_ack, + output wire cfg_msg_received_pme_to, + output wire cfg_msg_received_setslotpowerlimit, + output wire cfg_msg_received_unlock, + output wire cfg_msg_received_pm_as_nak, + output wire cfg_to_turnoff, + output wire [2:0] cfg_pcie_link_state, + output wire cfg_pm_rcv_as_req_l1_n, + output wire cfg_pm_rcv_enter_l1_n, + output wire cfg_pm_rcv_enter_l23_n, + output wire cfg_pm_rcv_req_ack_n, + output wire [1:0] cfg_pmcsr_powerstate, + output wire cfg_pmcsr_pme_en, + output wire cfg_pmcsr_pme_status, + output wire cfg_transaction, + output wire cfg_transaction_type, + output wire [6:0] cfg_transaction_addr, + output wire cfg_command_io_enable, + output wire cfg_command_mem_enable, + output wire cfg_command_bus_master_enable, + output wire cfg_command_interrupt_disable, + output wire cfg_command_serr_en, + output wire cfg_bridge_serr_en, + output wire cfg_dev_status_corr_err_detected, + output wire cfg_dev_status_non_fatal_err_detected, + output wire cfg_dev_status_fatal_err_detected, + output wire cfg_dev_status_ur_detected, + output wire cfg_dev_control_corr_err_reporting_en, + output wire cfg_dev_control_non_fatal_reporting_en, + output wire cfg_dev_control_fatal_err_reporting_en, + output wire cfg_dev_control_ur_err_reporting_en, + output wire cfg_dev_control_enable_ro, + output wire [2:0] cfg_dev_control_max_payload, + output wire cfg_dev_control_ext_tag_en, + output wire cfg_dev_control_phantom_en, + output wire cfg_dev_control_aux_power_en, + output wire cfg_dev_control_no_snoop_en, + output wire [2:0] cfg_dev_control_max_read_req, + output wire [1:0] cfg_link_status_current_speed, + output wire [3:0] cfg_link_status_negotiated_width, + output wire cfg_link_status_link_training, + output wire cfg_link_status_dll_active, + output wire cfg_link_status_bandwidth_status, + output wire cfg_link_status_auto_bandwidth_status, + output wire [1:0] cfg_link_control_aspm_control, + output wire cfg_link_control_rcb, + output wire cfg_link_control_link_disable, + output wire cfg_link_control_retrain_link, + output wire cfg_link_control_common_clock, + output wire cfg_link_control_extended_sync, + output wire cfg_link_control_clock_pm_en, + output wire cfg_link_control_hw_auto_width_dis, + output wire cfg_link_control_bandwidth_int_en, + output wire cfg_link_control_auto_bandwidth_int_en, + output wire [3:0] cfg_dev_control2_cpl_timeout_val, + output wire cfg_dev_control2_cpl_timeout_dis, + output wire cfg_dev_control2_ari_forward_en, + output wire cfg_dev_control2_atomic_requester_en, + output wire cfg_dev_control2_atomic_egress_block, + output wire cfg_dev_control2_ido_req_en, + output wire cfg_dev_control2_ido_cpl_en, + output wire cfg_dev_control2_ltr_en, + output wire cfg_dev_control2_tlp_prefix_block, + output wire cfg_slot_control_electromech_il_ctl_pulse, + output wire cfg_root_control_syserr_corr_err_en, + output wire cfg_root_control_syserr_non_fatal_err_en, + output wire cfg_root_control_syserr_fatal_err_en, + output wire cfg_root_control_pme_int_en, + output wire cfg_aer_ecrc_check_en, + output wire cfg_aer_ecrc_gen_en, + output wire cfg_aer_rooterr_corr_err_reporting_en, + output wire cfg_aer_rooterr_non_fatal_err_reporting_en, + output wire cfg_aer_rooterr_fatal_err_reporting_en, + output wire cfg_aer_rooterr_corr_err_received, + output wire cfg_aer_rooterr_non_fatal_err_received, + output wire cfg_aer_rooterr_fatal_err_received, + output wire [6:0] cfg_vc_tcvc_map, + output wire drp_rdy, + output wire [15:0] drp_do, + output wire [63:0] dbg_vec_a, + output wire [63:0] dbg_vec_b, + output wire [11:0] dbg_vec_c, + output wire dbg_sclr_a, + output wire dbg_sclr_b, + output wire dbg_sclr_c, + output wire dbg_sclr_d, + output wire dbg_sclr_e, + output wire dbg_sclr_f, + output wire dbg_sclr_g, + output wire dbg_sclr_h, + output wire dbg_sclr_i, + output wire dbg_sclr_j, + output wire dbg_sclr_k, + output wire [63:0] trn_rdllp_data, + output wire [1:0] trn_rdllp_src_rdy, + output wire [11:0] pl_dbg_vec, + + input phy_rdy_n, + input pipe_clk, + input user_clk, + input user_clk2, + output wire pipe_rx0_polarity_gt, + output wire pipe_rx1_polarity_gt, + output wire pipe_rx2_polarity_gt, + output wire pipe_rx3_polarity_gt, + output wire pipe_rx4_polarity_gt, + output wire pipe_rx5_polarity_gt, + output wire pipe_rx6_polarity_gt, + output wire pipe_rx7_polarity_gt, + output wire pipe_tx_deemph_gt, + output wire [2:0] pipe_tx_margin_gt, + output wire pipe_tx_rate_gt, + output wire pipe_tx_rcvr_det_gt, + output wire [1:0] pipe_tx0_char_is_k_gt, + output wire pipe_tx0_compliance_gt, + output wire [15:0] pipe_tx0_data_gt, + output wire pipe_tx0_elec_idle_gt, + output wire [1:0] pipe_tx0_powerdown_gt, + output wire [1:0] pipe_tx1_char_is_k_gt, + output wire pipe_tx1_compliance_gt, + output wire [15:0] pipe_tx1_data_gt, + output wire pipe_tx1_elec_idle_gt, + output wire [1:0] pipe_tx1_powerdown_gt, + output wire [1:0] pipe_tx2_char_is_k_gt, + output wire pipe_tx2_compliance_gt, + output wire [15:0] pipe_tx2_data_gt, + output wire pipe_tx2_elec_idle_gt, + output wire [1:0] pipe_tx2_powerdown_gt, + output wire [1:0] pipe_tx3_char_is_k_gt, + output wire pipe_tx3_compliance_gt, + output wire [15:0] pipe_tx3_data_gt, + output wire pipe_tx3_elec_idle_gt, + output wire [1:0] pipe_tx3_powerdown_gt, + output wire [1:0] pipe_tx4_char_is_k_gt, + output wire pipe_tx4_compliance_gt, + output wire [15:0] pipe_tx4_data_gt, + output wire pipe_tx4_elec_idle_gt, + output wire [1:0] pipe_tx4_powerdown_gt, + output wire [1:0] pipe_tx5_char_is_k_gt, + output wire pipe_tx5_compliance_gt, + output wire [15:0] pipe_tx5_data_gt, + output wire pipe_tx5_elec_idle_gt, + output wire [1:0] pipe_tx5_powerdown_gt, + output wire [1:0] pipe_tx6_char_is_k_gt, + output wire pipe_tx6_compliance_gt, + output wire [15:0] pipe_tx6_data_gt, + output wire pipe_tx6_elec_idle_gt, + output wire [1:0] pipe_tx6_powerdown_gt, + output wire [1:0] pipe_tx7_char_is_k_gt, + output wire pipe_tx7_compliance_gt, + output wire [15:0] pipe_tx7_data_gt, + output wire pipe_tx7_elec_idle_gt, + output wire [1:0] pipe_tx7_powerdown_gt, + + input wire pipe_rx0_chanisaligned_gt, + input wire [1:0] pipe_rx0_char_is_k_gt, + input wire [15:0] pipe_rx0_data_gt, + input wire pipe_rx0_elec_idle_gt, + input wire pipe_rx0_phy_status_gt, + input wire [2:0] pipe_rx0_status_gt, + input wire pipe_rx0_valid_gt, + input wire pipe_rx1_chanisaligned_gt, + input wire [1:0] pipe_rx1_char_is_k_gt, + input wire [15:0] pipe_rx1_data_gt, + input wire pipe_rx1_elec_idle_gt, + input wire pipe_rx1_phy_status_gt, + input wire [2:0] pipe_rx1_status_gt, + input wire pipe_rx1_valid_gt, + input wire pipe_rx2_chanisaligned_gt, + input wire [1:0] pipe_rx2_char_is_k_gt, + input wire [15:0] pipe_rx2_data_gt, + input wire pipe_rx2_elec_idle_gt, + input wire pipe_rx2_phy_status_gt, + input wire [2:0] pipe_rx2_status_gt, + input wire pipe_rx2_valid_gt, + input wire pipe_rx3_chanisaligned_gt, + input wire [1:0] pipe_rx3_char_is_k_gt, + input wire [15:0] pipe_rx3_data_gt, + input wire pipe_rx3_elec_idle_gt, + input wire pipe_rx3_phy_status_gt, + input wire [2:0] pipe_rx3_status_gt, + input wire pipe_rx3_valid_gt, + input wire pipe_rx4_chanisaligned_gt, + input wire [1:0] pipe_rx4_char_is_k_gt, + input wire [15:0] pipe_rx4_data_gt, + input wire pipe_rx4_elec_idle_gt, + input wire pipe_rx4_phy_status_gt, + input wire [2:0] pipe_rx4_status_gt, + input wire pipe_rx4_valid_gt, + input wire pipe_rx5_chanisaligned_gt, + input wire [1:0] pipe_rx5_char_is_k_gt, + input wire [15:0] pipe_rx5_data_gt, + input wire pipe_rx5_elec_idle_gt, + input wire pipe_rx5_phy_status_gt, + input wire [2:0] pipe_rx5_status_gt, + input wire pipe_rx5_valid_gt, + input wire pipe_rx6_chanisaligned_gt, + input wire [1:0] pipe_rx6_char_is_k_gt, + input wire [15:0] pipe_rx6_data_gt, + input wire pipe_rx6_elec_idle_gt, + input wire pipe_rx6_phy_status_gt, + input wire [2:0] pipe_rx6_status_gt, + input wire pipe_rx6_valid_gt, + input wire pipe_rx7_chanisaligned_gt, + input wire [1:0] pipe_rx7_char_is_k_gt, + input wire [15:0] pipe_rx7_data_gt, + input wire pipe_rx7_elec_idle_gt, + input wire pipe_rx7_phy_status_gt, + input wire [2:0] pipe_rx7_status_gt, + input wire pipe_rx7_valid_gt +); + + //wire declaration + + // TRN Interface + wire [C_DATA_WIDTH-1:0] trn_td; + wire [REM_WIDTH-1:0] trn_trem; + wire trn_tsof; + wire trn_teof; + wire trn_tsrc_rdy; + wire trn_tdst_rdy; + wire trn_tsrc_dsc; + wire trn_terrfwd; + wire trn_tecrc_gen; + wire trn_tstr; + wire trn_tcfg_gnt; + + + wire [127:0] trn_rd; + wire [1:0] trn_rrem; + wire trn_rdst_rdy; + wire trn_rsof; + wire trn_reof; + wire trn_rsrc_rdy; + wire trn_rsrc_dsc; + wire trn_rerrfwd; + wire trn_recrc_err; + wire [7:0] trn_rbar_hit; + + wire sys_reset_n_d; + wire [1:0] pipe_rx0_char_is_k; + wire [1:0] pipe_rx1_char_is_k; + wire [1:0] pipe_rx2_char_is_k; + wire [1:0] pipe_rx3_char_is_k; + wire [1:0] pipe_rx4_char_is_k; + wire [1:0] pipe_rx5_char_is_k; + wire [1:0] pipe_rx6_char_is_k; + wire [1:0] pipe_rx7_char_is_k; + wire pipe_rx0_valid; + wire pipe_rx1_valid; + wire pipe_rx2_valid; + wire pipe_rx3_valid; + wire pipe_rx4_valid; + wire pipe_rx5_valid; + wire pipe_rx6_valid; + wire pipe_rx7_valid; + wire [15:0] pipe_rx0_data; + wire [15:0] pipe_rx1_data; + wire [15:0] pipe_rx2_data; + wire [15:0] pipe_rx3_data; + wire [15:0] pipe_rx4_data; + wire [15:0] pipe_rx5_data; + wire [15:0] pipe_rx6_data; + wire [15:0] pipe_rx7_data; + wire pipe_rx0_chanisaligned; + wire pipe_rx1_chanisaligned; + wire pipe_rx2_chanisaligned; + wire pipe_rx3_chanisaligned; + wire pipe_rx4_chanisaligned; + wire pipe_rx5_chanisaligned; + wire pipe_rx6_chanisaligned; + wire pipe_rx7_chanisaligned; + wire [2:0] pipe_rx0_status; + wire [2:0] pipe_rx1_status; + wire [2:0] pipe_rx2_status; + wire [2:0] pipe_rx3_status; + wire [2:0] pipe_rx4_status; + wire [2:0] pipe_rx5_status; + wire [2:0] pipe_rx6_status; + wire [2:0] pipe_rx7_status; + wire pipe_rx0_phy_status; + wire pipe_rx1_phy_status; + wire pipe_rx2_phy_status; + wire pipe_rx3_phy_status; + wire pipe_rx4_phy_status; + wire pipe_rx5_phy_status; + wire pipe_rx6_phy_status; + wire pipe_rx7_phy_status; + + wire pipe_rx0_elec_idle; + wire pipe_rx1_elec_idle; + wire pipe_rx2_elec_idle; + wire pipe_rx3_elec_idle; + wire pipe_rx4_elec_idle; + wire pipe_rx5_elec_idle; + wire pipe_rx6_elec_idle; + wire pipe_rx7_elec_idle; + + + wire pipe_tx_reset; + wire pipe_tx_rcvr_det; + wire pipe_tx_rate; + wire pipe_tx_deemph; + wire [2:0] pipe_tx_margin; + wire pipe_rx0_polarity; + wire pipe_rx1_polarity; + wire pipe_rx2_polarity; + wire pipe_rx3_polarity; + wire pipe_rx4_polarity; + wire pipe_rx5_polarity; + wire pipe_rx6_polarity; + wire pipe_rx7_polarity; + wire pipe_tx0_compliance; + wire pipe_tx1_compliance; + wire pipe_tx2_compliance; + wire pipe_tx3_compliance; + wire pipe_tx4_compliance; + wire pipe_tx5_compliance; + wire pipe_tx6_compliance; + wire pipe_tx7_compliance; + wire [1:0] pipe_tx0_char_is_k; + wire [1:0] pipe_tx1_char_is_k; + wire [1:0] pipe_tx2_char_is_k; + wire [1:0] pipe_tx3_char_is_k; + wire [1:0] pipe_tx4_char_is_k; + wire [1:0] pipe_tx5_char_is_k; + wire [1:0] pipe_tx6_char_is_k; + wire [1:0] pipe_tx7_char_is_k; + wire [15:0] pipe_tx0_data; + wire [15:0] pipe_tx1_data; + wire [15:0] pipe_tx2_data; + wire [15:0] pipe_tx3_data; + wire [15:0] pipe_tx4_data; + wire [15:0] pipe_tx5_data; + wire [15:0] pipe_tx6_data; + wire [15:0] pipe_tx7_data; + wire pipe_tx0_elec_idle; + wire pipe_tx1_elec_idle; + wire pipe_tx2_elec_idle; + wire pipe_tx3_elec_idle; + wire pipe_tx4_elec_idle; + wire pipe_tx5_elec_idle; + wire pipe_tx6_elec_idle; + wire pipe_tx7_elec_idle; + wire [1:0] pipe_tx0_powerdown; + wire [1:0] pipe_tx1_powerdown; + wire [1:0] pipe_tx2_powerdown; + wire [1:0] pipe_tx3_powerdown; + wire [1:0] pipe_tx4_powerdown; + wire [1:0] pipe_tx5_powerdown; + wire [1:0] pipe_tx6_powerdown; + wire [1:0] pipe_tx7_powerdown; + + wire cfg_received_func_lvl_rst_n; + wire cfg_err_cpl_rdy_n; + wire cfg_interrupt_rdy_n; + reg [7:0] cfg_bus_number_d; + reg [4:0] cfg_device_number_d; + reg [2:0] cfg_function_number_d; + wire cfg_turnoff_ok_w; + + wire cfg_mgmt_rd_wr_done_n; + wire pl_phy_lnk_up_n; + wire cfg_err_aer_headerlog_set_n; + + assign cfg_received_func_lvl_rst = ~cfg_received_func_lvl_rst_n; + + assign cfg_err_cpl_rdy = ~cfg_err_cpl_rdy_n; + + assign cfg_interrupt_rdy = ~cfg_interrupt_rdy_n; + + assign cfg_mgmt_rd_wr_done = ~cfg_mgmt_rd_wr_done_n; + + assign pl_phy_lnk_up = ~pl_phy_lnk_up_n; + + assign cfg_err_aer_headerlog_set = ~cfg_err_aer_headerlog_set_n; + + assign cfg_to_turnoff = cfg_msg_received_pme_to; + + assign cfg_status = {16'b0}; + + assign cfg_command = {5'b0, + cfg_command_interrupt_disable, + 1'b0, + cfg_command_serr_en, + 5'b0, + cfg_command_bus_master_enable, + cfg_command_mem_enable, + cfg_command_io_enable}; + + assign cfg_dstatus = {10'h0, + cfg_trn_pending, + 1'b0, + cfg_dev_status_ur_detected, + cfg_dev_status_fatal_err_detected, + cfg_dev_status_non_fatal_err_detected, + cfg_dev_status_corr_err_detected}; + + assign cfg_dcommand = {1'b0, + cfg_dev_control_max_read_req, + cfg_dev_control_no_snoop_en, + cfg_dev_control_aux_power_en, + cfg_dev_control_phantom_en, + cfg_dev_control_ext_tag_en, + cfg_dev_control_max_payload, + cfg_dev_control_enable_ro, + cfg_dev_control_ur_err_reporting_en, + cfg_dev_control_fatal_err_reporting_en, + cfg_dev_control_non_fatal_reporting_en, + cfg_dev_control_corr_err_reporting_en }; + + assign cfg_lstatus = {cfg_link_status_auto_bandwidth_status, + cfg_link_status_bandwidth_status, + cfg_link_status_dll_active, + (LINK_STATUS_SLOT_CLOCK_CONFIG == "TRUE") ? 1'b1 : 1'b0, + cfg_link_status_link_training, + 1'b0, + {2'b00, cfg_link_status_negotiated_width}, + {2'b00, cfg_link_status_current_speed} }; + + assign cfg_lcommand = {4'b0, + cfg_link_control_auto_bandwidth_int_en, + cfg_link_control_bandwidth_int_en, + cfg_link_control_hw_auto_width_dis, + cfg_link_control_clock_pm_en, + cfg_link_control_extended_sync, + cfg_link_control_common_clock, + cfg_link_control_retrain_link, + cfg_link_control_link_disable, + cfg_link_control_rcb, + 1'b0, + cfg_link_control_aspm_control}; + + assign cfg_bus_number = cfg_bus_number_d; + + assign cfg_device_number = cfg_device_number_d; + + assign cfg_function_number = cfg_function_number_d; + + assign cfg_dcommand2 = {4'b0, + cfg_dev_control2_tlp_prefix_block, + cfg_dev_control2_ltr_en, + cfg_dev_control2_ido_cpl_en, + cfg_dev_control2_ido_req_en, + cfg_dev_control2_atomic_egress_block, + cfg_dev_control2_atomic_requester_en, + cfg_dev_control2_ari_forward_en, + cfg_dev_control2_cpl_timeout_dis, + cfg_dev_control2_cpl_timeout_val}; + + // Capture Bus/Device/Function number + + always @(posedge user_clk_out) begin + if (~user_lnk_up) + begin + cfg_bus_number_d <= 8'b0; + end // if (~user_lnk_up) + else if (~cfg_msg_received) + begin + cfg_bus_number_d <= cfg_msg_data[15:8]; + end // if (~cfg_msg_received) + end + + always @(posedge user_clk_out) begin + if (~user_lnk_up) + begin + cfg_device_number_d <= 5'b0; + end // if (~user_lnk_up) + else if (~cfg_msg_received) + begin + cfg_device_number_d <= cfg_msg_data[7:3]; + end // if (~cfg_msg_received) + end + + always @(posedge user_clk_out) begin + if (~user_lnk_up) + begin + cfg_function_number_d <= 3'b0; + end // if (~user_lnk_up) + else if (~cfg_msg_received) + begin + cfg_function_number_d <= cfg_msg_data[2:0]; + end // if (~cfg_msg_received) + end + +pcie_7x_0_axi_basic_top #( + .C_DATA_WIDTH (C_DATA_WIDTH), // RX/TX interface data width + .C_FAMILY ("X7"), // Targeted FPGA family + .C_ROOT_PORT ("FALSE"), // PCIe block is in root port mode + .C_PM_PRIORITY ("FALSE") // Disable TX packet boundary thrtl + + ) axi_basic_top ( + //---------------------------------------------// + // User Design I/O // + //---------------------------------------------// + + // AXI TX + //----------- + .s_axis_tx_tdata (s_axis_tx_tdata), // input + .s_axis_tx_tvalid (s_axis_tx_tvalid), // input + .s_axis_tx_tready (s_axis_tx_tready), // output + .s_axis_tx_tkeep (s_axis_tx_tkeep), // input + .s_axis_tx_tlast (s_axis_tx_tlast), // input + .s_axis_tx_tuser (s_axis_tx_tuser), // input + + // AXI RX + //----------- + .m_axis_rx_tdata (m_axis_rx_tdata), // output + .m_axis_rx_tvalid (m_axis_rx_tvalid), // output + .m_axis_rx_tready (m_axis_rx_tready), // input + .m_axis_rx_tkeep (m_axis_rx_tkeep), // output + .m_axis_rx_tlast (m_axis_rx_tlast), // output + .m_axis_rx_tuser (m_axis_rx_tuser), // output + + // User Misc. + //----------- + .user_turnoff_ok (cfg_turnoff_ok), // input + .user_tcfg_gnt (tx_cfg_gnt), // input + + //---------------------------------------------// + // PCIe Block I/O // + //---------------------------------------------// + + // TRN TX + //----------- + .trn_td (trn_td), // output + .trn_tsof (trn_tsof), // output + .trn_teof (trn_teof), // output + .trn_tsrc_rdy (trn_tsrc_rdy), // output + .trn_tdst_rdy (trn_tdst_rdy), // input + .trn_tsrc_dsc (trn_tsrc_dsc), // output + .trn_trem (trn_trem), // output + .trn_terrfwd (trn_terrfwd), // output + .trn_tstr (trn_tstr), // output + .trn_tbuf_av (tx_buf_av), // input + .trn_tecrc_gen (trn_tecrc_gen), // output + + // TRN RX + //----------- + .trn_rd (trn_rd), // input + .trn_rsof (trn_rsof), // input + .trn_reof (trn_reof), // input + .trn_rsrc_rdy (trn_rsrc_rdy), // input + .trn_rdst_rdy (trn_rdst_rdy), // output + .trn_rsrc_dsc (trn_rsrc_dsc), // input + .trn_rrem (trn_rrem), // input + .trn_rerrfwd (trn_rerrfwd), // input + .trn_rbar_hit (trn_rbar_hit[6:0]), // input + .trn_recrc_err (trn_recrc_err), // input + + // TRN Misc. + //----------- + .trn_tcfg_req ( tx_cfg_req ), // input + .trn_tcfg_gnt ( trn_tcfg_gnt), // output + .trn_lnk_up ( user_lnk_up), // input + + // Fuji3/Virtex6 PM + //----------- + .cfg_pcie_link_state (cfg_pcie_link_state), // input + + // Virtex6 PM + //----------- + .cfg_pm_send_pme_to (1'b0), // input NOT USED FOR EP + .cfg_pmcsr_powerstate (cfg_pmcsr_powerstate), // input + .trn_rdllp_data (32'b0), // input - Not used in 7-series + .trn_rdllp_src_rdy (1'b0), // input -- Not used in 7-series + + // Power Mgmt for S6/V6 + //----------- + .cfg_to_turnoff (cfg_to_turnoff), // input + .cfg_turnoff_ok (cfg_turnoff_ok_w), // output + + // System + //----------- + .user_clk (user_clk_out), // input + .user_rst (user_reset), // input + .np_counter () // output + + ); + + + //------------------------------------------------------- + // PCI Express Pipe Wrapper + //------------------------------------------------------- +pcie_7x_0_pcie_7x # ( + .AER_BASE_PTR ( AER_BASE_PTR ), + .AER_CAP_ECRC_CHECK_CAPABLE ( AER_CAP_ECRC_CHECK_CAPABLE ), + .AER_CAP_ECRC_GEN_CAPABLE( AER_CAP_ECRC_GEN_CAPABLE ), + .AER_CAP_ID ( AER_CAP_ID ), + .AER_CAP_MULTIHEADER ( AER_CAP_MULTIHEADER ), + .AER_CAP_NEXTPTR ( AER_CAP_NEXTPTR ), + .AER_CAP_ON ( AER_CAP_ON ), + .AER_CAP_OPTIONAL_ERR_SUPPORT ( AER_CAP_OPTIONAL_ERR_SUPPORT ), + .AER_CAP_PERMIT_ROOTERR_UPDATE ( AER_CAP_PERMIT_ROOTERR_UPDATE ), + .AER_CAP_VERSION ( AER_CAP_VERSION ), + .ALLOW_X8_GEN2 (ALLOW_X8_GEN2), + .BAR0 ( BAR0 ), + .BAR1 ( BAR1 ), + .BAR2 ( BAR2 ), + .BAR3 ( BAR3 ), + .BAR4 ( BAR4 ), + .BAR5 ( BAR5 ), + .C_DATA_WIDTH ( C_DATA_WIDTH ), + .CAPABILITIES_PTR( CAPABILITIES_PTR ), + .CFG_ECRC_ERR_CPLSTAT ( CFG_ECRC_ERR_CPLSTAT ), + .CARDBUS_CIS_POINTER ( CARDBUS_CIS_POINTER ), + .CLASS_CODE ( CLASS_CODE ), + .CMD_INTX_IMPLEMENTED ( CMD_INTX_IMPLEMENTED ), + .CPL_TIMEOUT_DISABLE_SUPPORTED ( CPL_TIMEOUT_DISABLE_SUPPORTED ), + .CPL_TIMEOUT_RANGES_SUPPORTED ( CPL_TIMEOUT_RANGES_SUPPORTED ), + .CRM_MODULE_RSTS (CRM_MODULE_RSTS), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE ), + .DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ( DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE ), + .DEV_CAP_ENDPOINT_L0S_LATENCY ( DEV_CAP_ENDPOINT_L0S_LATENCY ), + .DEV_CAP_ENDPOINT_L1_LATENCY ( DEV_CAP_ENDPOINT_L1_LATENCY ), + .DEV_CAP_EXT_TAG_SUPPORTED ( DEV_CAP_EXT_TAG_SUPPORTED ), + .DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ( DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE ), + .DEV_CAP_MAX_PAYLOAD_SUPPORTED ( DEV_CAP_MAX_PAYLOAD_SUPPORTED ), + .DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ( DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT ), + .DEV_CAP_ROLE_BASED_ERROR( DEV_CAP_ROLE_BASED_ERROR ), + .DEV_CAP_RSVD_14_12 ( DEV_CAP_RSVD_14_12 ), + .DEV_CAP_RSVD_17_16 ( DEV_CAP_RSVD_17_16 ), + .DEV_CAP_RSVD_31_29 ( DEV_CAP_RSVD_31_29 ), + .DEV_CONTROL_AUX_POWER_SUPPORTED ( DEV_CONTROL_AUX_POWER_SUPPORTED ), + .DEV_CONTROL_EXT_TAG_DEFAULT ( DEV_CONTROL_EXT_TAG_DEFAULT ), + .DISABLE_ASPM_L1_TIMER ( DISABLE_ASPM_L1_TIMER ), + .DISABLE_BAR_FILTERING ( DISABLE_BAR_FILTERING ), + .DISABLE_ID_CHECK( DISABLE_ID_CHECK ), + .DISABLE_LANE_REVERSAL ( DISABLE_LANE_REVERSAL ), + .DISABLE_RX_POISONED_RESP (DISABLE_RX_POISONED_RESP), + .DISABLE_RX_TC_FILTER ( DISABLE_RX_TC_FILTER ), + .DISABLE_SCRAMBLING ( DISABLE_SCRAMBLING ), + .DNSTREAM_LINK_NUM ( DNSTREAM_LINK_NUM ), + .DSN_BASE_PTR ( DSN_BASE_PTR ), + .DSN_CAP_ID ( DSN_CAP_ID ), + .DSN_CAP_NEXTPTR ( DSN_CAP_NEXTPTR ), + .DSN_CAP_ON ( DSN_CAP_ON ), + .DSN_CAP_VERSION ( DSN_CAP_VERSION ), + .DEV_CAP2_ARI_FORWARDING_SUPPORTED(DEV_CAP2_ARI_FORWARDING_SUPPORTED), + .DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED (DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED), + .DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED (DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED), + .DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED (DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED), + .DEV_CAP2_CAS128_COMPLETER_SUPPORTED (DEV_CAP2_CAS128_COMPLETER_SUPPORTED), + .DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED (DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED), + .DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED (DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED), + .DEV_CAP2_LTR_MECHANISM_SUPPORTED (DEV_CAP2_LTR_MECHANISM_SUPPORTED), + .DEV_CAP2_MAX_ENDEND_TLP_PREFIXES (DEV_CAP2_MAX_ENDEND_TLP_PREFIXES), + .DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING (DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING), + .DEV_CAP2_TPH_COMPLETER_SUPPORTED (DEV_CAP2_TPH_COMPLETER_SUPPORTED), + .DISABLE_ERR_MSG (DISABLE_ERR_MSG), + .DISABLE_LOCKED_FILTER (DISABLE_LOCKED_FILTER), + .DISABLE_PPM_FILTER (DISABLE_PPM_FILTER), + .ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED (ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED), + .ENABLE_MSG_ROUTE( ENABLE_MSG_ROUTE ), + .ENABLE_RX_TD_ECRC_TRIM ( ENABLE_RX_TD_ECRC_TRIM ), + .ENTER_RVRY_EI_L0( ENTER_RVRY_EI_L0 ), + .EXIT_LOOPBACK_ON_EI (EXIT_LOOPBACK_ON_EI), + .EXPANSION_ROM ( EXPANSION_ROM ), + .EXT_CFG_CAP_PTR ( EXT_CFG_CAP_PTR ), + .EXT_CFG_XP_CAP_PTR ( EXT_CFG_XP_CAP_PTR ), + .HEADER_TYPE ( HEADER_TYPE ), + .INFER_EI( INFER_EI ), + .INTERRUPT_PIN ( INTERRUPT_PIN ), + .INTERRUPT_STAT_AUTO (INTERRUPT_STAT_AUTO), + .IS_SWITCH ( IS_SWITCH ), + .LAST_CONFIG_DWORD ( LAST_CONFIG_DWORD ), + .LINK_CAP_ASPM_OPTIONALITY ( LINK_CAP_ASPM_OPTIONALITY ), + .LINK_CAP_ASPM_SUPPORT ( LINK_CAP_ASPM_SUPPORT ), + .LINK_CAP_CLOCK_POWER_MANAGEMENT ( LINK_CAP_CLOCK_POWER_MANAGEMENT ), + .LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ( LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN1 ( LINK_CAP_L0S_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L0S_EXIT_LATENCY_GEN2 ( LINK_CAP_L0S_EXIT_LATENCY_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN1 ( LINK_CAP_L1_EXIT_LATENCY_GEN1 ), + .LINK_CAP_L1_EXIT_LATENCY_GEN2 ( LINK_CAP_L1_EXIT_LATENCY_GEN2 ), + .LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP (LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP), + .LINK_CAP_MAX_LINK_SPEED ( LINK_CAP_MAX_LINK_SPEED ), + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .LINK_CAP_RSVD_23( LINK_CAP_RSVD_23 ), + .LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ( LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE ), + .LINK_CONTROL_RCB( LINK_CONTROL_RCB ), + .LINK_CTRL2_DEEMPHASIS ( LINK_CTRL2_DEEMPHASIS ), + .LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ( LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE ), + .LINK_CTRL2_TARGET_LINK_SPEED ( LINK_CTRL2_TARGET_LINK_SPEED ), + .LINK_STATUS_SLOT_CLOCK_CONFIG ( LINK_STATUS_SLOT_CLOCK_CONFIG ), + .LL_ACK_TIMEOUT ( LL_ACK_TIMEOUT ), + .LL_ACK_TIMEOUT_EN ( LL_ACK_TIMEOUT_EN ), + .LL_ACK_TIMEOUT_FUNC ( LL_ACK_TIMEOUT_FUNC ), + .LL_REPLAY_TIMEOUT ( LL_REPLAY_TIMEOUT ), + .LL_REPLAY_TIMEOUT_EN ( LL_REPLAY_TIMEOUT_EN ), + .LL_REPLAY_TIMEOUT_FUNC ( LL_REPLAY_TIMEOUT_FUNC ), + .LTSSM_MAX_LINK_WIDTH ( LTSSM_MAX_LINK_WIDTH ), + .MPS_FORCE (MPS_FORCE), + .MSI_BASE_PTR ( MSI_BASE_PTR ), + .MSI_CAP_ID ( MSI_CAP_ID ), + .MSI_CAP_MULTIMSGCAP ( MSI_CAP_MULTIMSGCAP ), + .MSI_CAP_MULTIMSG_EXTENSION ( MSI_CAP_MULTIMSG_EXTENSION ), + .MSI_CAP_NEXTPTR ( MSI_CAP_NEXTPTR ), + .MSI_CAP_ON ( MSI_CAP_ON ), + .MSI_CAP_PER_VECTOR_MASKING_CAPABLE ( MSI_CAP_PER_VECTOR_MASKING_CAPABLE ), + .MSI_CAP_64_BIT_ADDR_CAPABLE ( MSI_CAP_64_BIT_ADDR_CAPABLE ), + .MSIX_BASE_PTR ( MSIX_BASE_PTR ), + .MSIX_CAP_ID ( MSIX_CAP_ID ), + .MSIX_CAP_NEXTPTR( MSIX_CAP_NEXTPTR ), + .MSIX_CAP_ON ( MSIX_CAP_ON ), + .MSIX_CAP_PBA_BIR( MSIX_CAP_PBA_BIR ), + .MSIX_CAP_PBA_OFFSET ( MSIX_CAP_PBA_OFFSET ), + .MSIX_CAP_TABLE_BIR ( MSIX_CAP_TABLE_BIR ), + .MSIX_CAP_TABLE_OFFSET ( MSIX_CAP_TABLE_OFFSET ), + .MSIX_CAP_TABLE_SIZE ( MSIX_CAP_TABLE_SIZE ), + .N_FTS_COMCLK_GEN1 ( N_FTS_COMCLK_GEN1 ), + .N_FTS_COMCLK_GEN2 ( N_FTS_COMCLK_GEN2 ), + .N_FTS_GEN1 ( N_FTS_GEN1 ), + .N_FTS_GEN2 ( N_FTS_GEN2 ), + .PCIE_BASE_PTR ( PCIE_BASE_PTR ), + .PCIE_CAP_CAPABILITY_ID ( PCIE_CAP_CAPABILITY_ID ), + .PCIE_CAP_CAPABILITY_VERSION ( PCIE_CAP_CAPABILITY_VERSION ), + .PCIE_CAP_DEVICE_PORT_TYPE ( PCIE_CAP_DEVICE_PORT_TYPE ), + .PCIE_CAP_NEXTPTR( PCIE_CAP_NEXTPTR ), + .PCIE_CAP_ON ( PCIE_CAP_ON ), + .PCIE_CAP_RSVD_15_14 ( PCIE_CAP_RSVD_15_14 ), + .PCIE_CAP_SLOT_IMPLEMENTED ( PCIE_CAP_SLOT_IMPLEMENTED ), + .PCIE_REVISION ( PCIE_REVISION ), + .PL_AUTO_CONFIG ( PL_AUTO_CONFIG ), + .PL_FAST_TRAIN ( PL_FAST_TRAIN ), + .PM_ASPML0S_TIMEOUT ( PM_ASPML0S_TIMEOUT ), + .PM_ASPML0S_TIMEOUT_EN ( PM_ASPML0S_TIMEOUT_EN ), + .PM_ASPML0S_TIMEOUT_FUNC ( PM_ASPML0S_TIMEOUT_FUNC ), + .PM_ASPM_FASTEXIT ( PM_ASPM_FASTEXIT ), + .PM_BASE_PTR ( PM_BASE_PTR ), + .PM_CAP_AUXCURRENT ( PM_CAP_AUXCURRENT ), + .PM_CAP_D1SUPPORT( PM_CAP_D1SUPPORT ), + .PM_CAP_D2SUPPORT( PM_CAP_D2SUPPORT ), + .PM_CAP_DSI ( PM_CAP_DSI ), + .PM_CAP_ID ( PM_CAP_ID ), + .PM_CAP_NEXTPTR ( PM_CAP_NEXTPTR ), + .PM_CAP_ON ( PM_CAP_ON ), + .PM_CAP_PME_CLOCK( PM_CAP_PME_CLOCK ), + .PM_CAP_PMESUPPORT ( PM_CAP_PMESUPPORT ), + .PM_CAP_RSVD_04 ( PM_CAP_RSVD_04 ), + .PM_CAP_VERSION ( PM_CAP_VERSION ), + .PM_CSR_B2B3 ( PM_CSR_B2B3 ), + .PM_CSR_BPCCEN ( PM_CSR_BPCCEN ), + .PM_CSR_NOSOFTRST( PM_CSR_NOSOFTRST ), + .PM_DATA0( PM_DATA0 ), + .PM_DATA1( PM_DATA1 ), + .PM_DATA2( PM_DATA2 ), + .PM_DATA3( PM_DATA3 ), + .PM_DATA4( PM_DATA4 ), + .PM_DATA5( PM_DATA5 ), + .PM_DATA6( PM_DATA6 ), + .PM_DATA7( PM_DATA7 ), + .PM_DATA_SCALE0 ( PM_DATA_SCALE0 ), + .PM_DATA_SCALE1 ( PM_DATA_SCALE1 ), + .PM_DATA_SCALE2 ( PM_DATA_SCALE2 ), + .PM_DATA_SCALE3 ( PM_DATA_SCALE3 ), + .PM_DATA_SCALE4 ( PM_DATA_SCALE4 ), + .PM_DATA_SCALE5 ( PM_DATA_SCALE5 ), + .PM_DATA_SCALE6 ( PM_DATA_SCALE6 ), + .PM_DATA_SCALE7 ( PM_DATA_SCALE7 ), + .PM_MF (PM_MF), + .RBAR_BASE_PTR (RBAR_BASE_PTR), + .RBAR_CAP_CONTROL_ENCODEDBAR0 (RBAR_CAP_CONTROL_ENCODEDBAR0), + .RBAR_CAP_CONTROL_ENCODEDBAR1 (RBAR_CAP_CONTROL_ENCODEDBAR1), + .RBAR_CAP_CONTROL_ENCODEDBAR2 (RBAR_CAP_CONTROL_ENCODEDBAR2), + .RBAR_CAP_CONTROL_ENCODEDBAR3 (RBAR_CAP_CONTROL_ENCODEDBAR3), + .RBAR_CAP_CONTROL_ENCODEDBAR4 (RBAR_CAP_CONTROL_ENCODEDBAR4), + .RBAR_CAP_CONTROL_ENCODEDBAR5 (RBAR_CAP_CONTROL_ENCODEDBAR5), + .RBAR_CAP_ID (RBAR_CAP_ID), + .RBAR_CAP_INDEX0 (RBAR_CAP_INDEX0), + .RBAR_CAP_INDEX1 (RBAR_CAP_INDEX1), + .RBAR_CAP_INDEX2 (RBAR_CAP_INDEX2), + .RBAR_CAP_INDEX3 (RBAR_CAP_INDEX3), + .RBAR_CAP_INDEX4 (RBAR_CAP_INDEX4), + .RBAR_CAP_INDEX5 (RBAR_CAP_INDEX5), + .RBAR_CAP_NEXTPTR (RBAR_CAP_NEXTPTR), + .RBAR_CAP_ON (RBAR_CAP_ON), + .RBAR_CAP_SUP0 (RBAR_CAP_SUP0), + .RBAR_CAP_SUP1 (RBAR_CAP_SUP1), + .RBAR_CAP_SUP2 (RBAR_CAP_SUP2), + .RBAR_CAP_SUP3 (RBAR_CAP_SUP3), + .RBAR_CAP_SUP4 (RBAR_CAP_SUP4), + .RBAR_CAP_SUP5 (RBAR_CAP_SUP5), + .RBAR_CAP_VERSION (RBAR_CAP_VERSION), + .RBAR_NUM (RBAR_NUM), + .RECRC_CHK (RECRC_CHK), + .RECRC_CHK_TRIM (RECRC_CHK_TRIM), + .ROOT_CAP_CRS_SW_VISIBILITY ( ROOT_CAP_CRS_SW_VISIBILITY ), + .RP_AUTO_SPD ( RP_AUTO_SPD ), + .RP_AUTO_SPD_LOOPCNT ( RP_AUTO_SPD_LOOPCNT ), + .SELECT_DLL_IF ( SELECT_DLL_IF ), + .SLOT_CAP_ATT_BUTTON_PRESENT ( SLOT_CAP_ATT_BUTTON_PRESENT ), + .SLOT_CAP_ATT_INDICATOR_PRESENT ( SLOT_CAP_ATT_INDICATOR_PRESENT ), + .SLOT_CAP_ELEC_INTERLOCK_PRESENT ( SLOT_CAP_ELEC_INTERLOCK_PRESENT ), + .SLOT_CAP_HOTPLUG_CAPABLE( SLOT_CAP_HOTPLUG_CAPABLE ), + .SLOT_CAP_HOTPLUG_SURPRISE ( SLOT_CAP_HOTPLUG_SURPRISE ), + .SLOT_CAP_MRL_SENSOR_PRESENT ( SLOT_CAP_MRL_SENSOR_PRESENT ), + .SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ( SLOT_CAP_NO_CMD_COMPLETED_SUPPORT ), + .SLOT_CAP_PHYSICAL_SLOT_NUM ( SLOT_CAP_PHYSICAL_SLOT_NUM ), + .SLOT_CAP_POWER_CONTROLLER_PRESENT ( SLOT_CAP_POWER_CONTROLLER_PRESENT ), + .SLOT_CAP_POWER_INDICATOR_PRESENT( SLOT_CAP_POWER_INDICATOR_PRESENT ), + .SLOT_CAP_SLOT_POWER_LIMIT_SCALE ( SLOT_CAP_SLOT_POWER_LIMIT_SCALE ), + .SLOT_CAP_SLOT_POWER_LIMIT_VALUE ( SLOT_CAP_SLOT_POWER_LIMIT_VALUE ), + .SPARE_BIT0 ( SPARE_BIT0 ), + .SPARE_BIT1 ( SPARE_BIT1 ), + .SPARE_BIT2 ( SPARE_BIT2 ), + .SPARE_BIT3 ( SPARE_BIT3 ), + .SPARE_BIT4 ( SPARE_BIT4 ), + .SPARE_BIT5 ( SPARE_BIT5 ), + .SPARE_BIT6 ( SPARE_BIT6 ), + .SPARE_BIT7 ( SPARE_BIT7 ), + .SPARE_BIT8 ( SPARE_BIT8 ), + .SPARE_BYTE0 ( SPARE_BYTE0 ), + .SPARE_BYTE1 ( SPARE_BYTE1 ), + .SPARE_BYTE2 ( SPARE_BYTE2 ), + .SPARE_BYTE3 ( SPARE_BYTE3 ), + .SPARE_WORD0 ( SPARE_WORD0 ), + .SPARE_WORD1 ( SPARE_WORD1 ), + .SPARE_WORD2 ( SPARE_WORD2 ), + .SPARE_WORD3 ( SPARE_WORD3 ), + .SSL_MESSAGE_AUTO (SSL_MESSAGE_AUTO), + .TECRC_EP_INV ( TECRC_EP_INV ), + .TL_RBYPASS(TL_RBYPASS), + .TL_RX_RAM_RADDR_LATENCY ( TL_RX_RAM_RADDR_LATENCY ), + .TL_RX_RAM_RDATA_LATENCY ( TL_RX_RAM_RDATA_LATENCY ), + .TL_RX_RAM_WRITE_LATENCY ( TL_RX_RAM_WRITE_LATENCY ), + .TL_TFC_DISABLE ( TL_TFC_DISABLE ), + .TL_TX_CHECKS_DISABLE ( TL_TX_CHECKS_DISABLE ), + .TL_TX_RAM_RADDR_LATENCY ( TL_TX_RAM_RADDR_LATENCY ), + .TL_TX_RAM_RDATA_LATENCY ( TL_TX_RAM_RDATA_LATENCY ), + .TL_TX_RAM_WRITE_LATENCY ( TL_TX_RAM_WRITE_LATENCY ), + .TRN_DW (TRN_DW), + .TRN_NP_FC (TRN_NP_FC), + .UPCONFIG_CAPABLE( UPCONFIG_CAPABLE ), + .UPSTREAM_FACING ( UPSTREAM_FACING ), + .UR_ATOMIC (UR_ATOMIC), + .UR_CFG1 (UR_CFG1), + .UR_INV_REQ(UR_INV_REQ), + .UR_PRS_RESPONSE (UR_PRS_RESPONSE), + .USER_CLK2_DIV2 (USER_CLK2_DIV2), + .USER_CLK_FREQ ( USER_CLK_FREQ ), + .USE_RID_PINS (USE_RID_PINS), + .VC0_CPL_INFINITE( VC0_CPL_INFINITE ), + .VC0_RX_RAM_LIMIT( VC0_RX_RAM_LIMIT ), + .VC0_TOTAL_CREDITS_CD ( VC0_TOTAL_CREDITS_CD ), + .VC0_TOTAL_CREDITS_CH ( VC0_TOTAL_CREDITS_CH ), + .VC0_TOTAL_CREDITS_NPD (VC0_TOTAL_CREDITS_NPD), + .VC0_TOTAL_CREDITS_NPH ( VC0_TOTAL_CREDITS_NPH ), + .VC0_TOTAL_CREDITS_PD ( VC0_TOTAL_CREDITS_PD ), + .VC0_TOTAL_CREDITS_PH ( VC0_TOTAL_CREDITS_PH ), + .VC0_TX_LASTPACKET ( VC0_TX_LASTPACKET ), + .VC_BASE_PTR ( VC_BASE_PTR ), + .VC_CAP_ID ( VC_CAP_ID ), + .VC_CAP_NEXTPTR ( VC_CAP_NEXTPTR ), + .VC_CAP_ON ( VC_CAP_ON ), + .VC_CAP_REJECT_SNOOP_TRANSACTIONS( VC_CAP_REJECT_SNOOP_TRANSACTIONS ), + .VC_CAP_VERSION ( VC_CAP_VERSION ), + .VSEC_BASE_PTR ( VSEC_BASE_PTR ), + .VSEC_CAP_HDR_ID ( VSEC_CAP_HDR_ID ), + .VSEC_CAP_HDR_LENGTH ( VSEC_CAP_HDR_LENGTH ), + .VSEC_CAP_HDR_REVISION ( VSEC_CAP_HDR_REVISION ), + .VSEC_CAP_ID ( VSEC_CAP_ID ), + .VSEC_CAP_IS_LINK_VISIBLE( VSEC_CAP_IS_LINK_VISIBLE ), + .VSEC_CAP_NEXTPTR( VSEC_CAP_NEXTPTR ), + .VSEC_CAP_ON ( VSEC_CAP_ON ), + .VSEC_CAP_VERSION( VSEC_CAP_VERSION ), + .ENABLE_JTAG_DBG ( ENABLE_JTAG_DBG ) + ) pcie_7x_i ( + .trn_lnk_up ( trn_lnk_up ), + .trn_clk ( user_clk_out ), + .lnk_clk_en ( lnk_clk_en), + .user_rst_n ( user_rst_n ), + .received_func_lvl_rst_n ( cfg_received_func_lvl_rst_n ), + .sys_rst_n (~phy_rdy_n), + .pl_rst_n ( 1'b1 ), + .dl_rst_n ( 1'b1 ), + .tl_rst_n ( 1'b1 ), + .cm_sticky_rst_n ( 1'b1 ), + + .func_lvl_rst_n ( func_lvl_rst_n ), + .cm_rst_n ( cm_rst_n ), + .trn_rbar_hit ( trn_rbar_hit ), + .trn_rd ( trn_rd ), + .trn_recrc_err ( trn_recrc_err ), + .trn_reof ( trn_reof ), + .trn_rerrfwd ( trn_rerrfwd ), + .trn_rrem ( trn_rrem ), + .trn_rsof ( trn_rsof ), + .trn_rsrc_dsc ( trn_rsrc_dsc ), + .trn_rsrc_rdy ( trn_rsrc_rdy ), + .trn_rdst_rdy ( trn_rdst_rdy ), + .trn_rnp_ok ( rx_np_ok ), + .trn_rnp_req ( rx_np_req ), + .trn_rfcp_ret ( 1'b1 ), + .trn_tbuf_av ( tx_buf_av ), + .trn_tcfg_req ( tx_cfg_req ), + .trn_tdllp_dst_rdy ( ), + .trn_tdst_rdy ( trn_tdst_rdy ), + .trn_terr_drop ( tx_err_drop ), + .trn_tcfg_gnt ( trn_tcfg_gnt ), + .trn_td ( trn_td ), + .trn_tdllp_data ( 32'b0 ), + .trn_tdllp_src_rdy ( 1'b0 ), + .trn_tecrc_gen ( trn_tecrc_gen ), + .trn_teof ( trn_teof ), + .trn_terrfwd ( trn_terrfwd ), + .trn_trem ( trn_trem), + .trn_tsof ( trn_tsof ), + .trn_tsrc_dsc ( trn_tsrc_dsc ), + .trn_tsrc_rdy ( trn_tsrc_rdy ), + .trn_tstr ( trn_tstr ), + + .trn_fc_cpld ( fc_cpld ), + .trn_fc_cplh ( fc_cplh ), + .trn_fc_npd ( fc_npd ), + .trn_fc_nph ( fc_nph ), + .trn_fc_pd ( fc_pd ), + .trn_fc_ph ( fc_ph ), + .trn_fc_sel ( fc_sel ), + + .cfg_dev_id (cfg_dev_id), + .cfg_vend_id (cfg_vend_id), + .cfg_rev_id (cfg_rev_id), + .cfg_subsys_id (cfg_subsys_id), + .cfg_subsys_vend_id (cfg_subsys_vend_id), + .cfg_pciecap_interrupt_msgnum (cfg_pciecap_interrupt_msgnum), + + .cfg_bridge_serr_en (cfg_bridge_serr_en), + + .cfg_command_bus_master_enable ( cfg_command_bus_master_enable ), + .cfg_command_interrupt_disable ( cfg_command_interrupt_disable ), + .cfg_command_io_enable ( cfg_command_io_enable ), + .cfg_command_mem_enable ( cfg_command_mem_enable ), + .cfg_command_serr_en ( cfg_command_serr_en ), + .cfg_dev_control_aux_power_en ( cfg_dev_control_aux_power_en ), + .cfg_dev_control_corr_err_reporting_en ( cfg_dev_control_corr_err_reporting_en ), + .cfg_dev_control_enable_ro ( cfg_dev_control_enable_ro ), + .cfg_dev_control_ext_tag_en ( cfg_dev_control_ext_tag_en ), + .cfg_dev_control_fatal_err_reporting_en ( cfg_dev_control_fatal_err_reporting_en ), + .cfg_dev_control_max_payload ( cfg_dev_control_max_payload ), + .cfg_dev_control_max_read_req ( cfg_dev_control_max_read_req ), + .cfg_dev_control_non_fatal_reporting_en ( cfg_dev_control_non_fatal_reporting_en ), + .cfg_dev_control_no_snoop_en ( cfg_dev_control_no_snoop_en ), + .cfg_dev_control_phantom_en ( cfg_dev_control_phantom_en ), + .cfg_dev_control_ur_err_reporting_en ( cfg_dev_control_ur_err_reporting_en ), + .cfg_dev_control2_cpl_timeout_dis ( cfg_dev_control2_cpl_timeout_dis ), + .cfg_dev_control2_cpl_timeout_val ( cfg_dev_control2_cpl_timeout_val ), + .cfg_dev_control2_ari_forward_en ( cfg_dev_control2_ari_forward_en), + .cfg_dev_control2_atomic_requester_en ( cfg_dev_control2_atomic_requester_en), + .cfg_dev_control2_atomic_egress_block ( cfg_dev_control2_atomic_egress_block), + .cfg_dev_control2_ido_req_en ( cfg_dev_control2_ido_req_en), + .cfg_dev_control2_ido_cpl_en ( cfg_dev_control2_ido_cpl_en), + .cfg_dev_control2_ltr_en ( cfg_dev_control2_ltr_en), + .cfg_dev_control2_tlp_prefix_block ( cfg_dev_control2_tlp_prefix_block), + .cfg_dev_status_corr_err_detected ( cfg_dev_status_corr_err_detected ), + .cfg_dev_status_fatal_err_detected ( cfg_dev_status_fatal_err_detected ), + .cfg_dev_status_non_fatal_err_detected ( cfg_dev_status_non_fatal_err_detected ), + .cfg_dev_status_ur_detected ( cfg_dev_status_ur_detected ), + + .cfg_mgmt_do ( cfg_mgmt_do ), + .cfg_err_aer_headerlog_set_n ( cfg_err_aer_headerlog_set_n), + .cfg_err_aer_headerlog ( cfg_err_aer_headerlog), + .cfg_err_cpl_rdy_n ( cfg_err_cpl_rdy_n ), + .cfg_interrupt_do ( cfg_interrupt_do ), + .cfg_interrupt_mmenable ( cfg_interrupt_mmenable ), + .cfg_interrupt_msienable ( cfg_interrupt_msienable ), + .cfg_interrupt_msixenable ( cfg_interrupt_msixenable ), + .cfg_interrupt_msixfm ( cfg_interrupt_msixfm ), + .cfg_interrupt_rdy_n ( cfg_interrupt_rdy_n ), + .cfg_link_control_rcb ( cfg_link_control_rcb ), + .cfg_link_control_aspm_control ( cfg_link_control_aspm_control ), + .cfg_link_control_auto_bandwidth_int_en ( cfg_link_control_auto_bandwidth_int_en ), + .cfg_link_control_bandwidth_int_en ( cfg_link_control_bandwidth_int_en ), + .cfg_link_control_clock_pm_en ( cfg_link_control_clock_pm_en ), + .cfg_link_control_common_clock ( cfg_link_control_common_clock ), + .cfg_link_control_extended_sync ( cfg_link_control_extended_sync ), + .cfg_link_control_hw_auto_width_dis ( cfg_link_control_hw_auto_width_dis ), + .cfg_link_control_link_disable ( cfg_link_control_link_disable ), + .cfg_link_control_retrain_link ( cfg_link_control_retrain_link ), + .cfg_link_status_auto_bandwidth_status ( cfg_link_status_auto_bandwidth_status ), + .cfg_link_status_bandwidth_status ( cfg_link_status_bandwidth_status ), + .cfg_link_status_current_speed ( cfg_link_status_current_speed ), + .cfg_link_status_dll_active ( cfg_link_status_dll_active ), + .cfg_link_status_link_training ( cfg_link_status_link_training ), + .cfg_link_status_negotiated_width ( cfg_link_status_negotiated_width), + .cfg_msg_data ( cfg_msg_data ), + .cfg_msg_received ( cfg_msg_received ), + .cfg_msg_received_assert_int_a ( cfg_msg_received_assert_int_a), + .cfg_msg_received_assert_int_b ( cfg_msg_received_assert_int_b), + .cfg_msg_received_assert_int_c ( cfg_msg_received_assert_int_c), + .cfg_msg_received_assert_int_d ( cfg_msg_received_assert_int_d), + .cfg_msg_received_deassert_int_a ( cfg_msg_received_deassert_int_a), + .cfg_msg_received_deassert_int_b ( cfg_msg_received_deassert_int_b), + .cfg_msg_received_deassert_int_c ( cfg_msg_received_deassert_int_c), + .cfg_msg_received_deassert_int_d ( cfg_msg_received_deassert_int_d), + .cfg_msg_received_err_cor ( cfg_msg_received_err_cor), + .cfg_msg_received_err_fatal ( cfg_msg_received_err_fatal), + .cfg_msg_received_err_non_fatal ( cfg_msg_received_err_non_fatal), + .cfg_msg_received_pm_as_nak ( cfg_msg_received_pm_as_nak), + .cfg_msg_received_pme_to ( cfg_msg_received_pme_to ), + .cfg_msg_received_pme_to_ack ( cfg_msg_received_pme_to_ack), + .cfg_msg_received_pm_pme ( cfg_msg_received_pm_pme), + .cfg_msg_received_setslotpowerlimit ( cfg_msg_received_setslotpowerlimit), + .cfg_msg_received_unlock ( cfg_msg_received_unlock), + .cfg_pcie_link_state ( cfg_pcie_link_state ), + .cfg_pmcsr_pme_en ( cfg_pmcsr_pme_en), + .cfg_pmcsr_powerstate ( cfg_pmcsr_powerstate), + .cfg_pmcsr_pme_status ( cfg_pmcsr_pme_status), + .cfg_pm_rcv_as_req_l1_n ( cfg_pm_rcv_as_req_l1_n), + .cfg_pm_rcv_enter_l1_n ( cfg_pm_rcv_enter_l1_n), + .cfg_pm_rcv_enter_l23_n ( cfg_pm_rcv_enter_l23_n), + + .cfg_pm_rcv_req_ack_n ( cfg_pm_rcv_req_ack_n), + .cfg_mgmt_rd_wr_done_n ( cfg_mgmt_rd_wr_done_n ), + .cfg_slot_control_electromech_il_ctl_pulse (cfg_slot_control_electromech_il_ctl_pulse), + .cfg_root_control_syserr_corr_err_en ( cfg_root_control_syserr_corr_err_en), + .cfg_root_control_syserr_non_fatal_err_en ( cfg_root_control_syserr_non_fatal_err_en), + .cfg_root_control_syserr_fatal_err_en ( cfg_root_control_syserr_fatal_err_en), + .cfg_root_control_pme_int_en ( cfg_root_control_pme_int_en ), + .cfg_aer_ecrc_check_en ( cfg_aer_ecrc_check_en ), + .cfg_aer_ecrc_gen_en ( cfg_aer_ecrc_gen_en ), + .cfg_aer_rooterr_corr_err_reporting_en ( cfg_aer_rooterr_corr_err_reporting_en), + .cfg_aer_rooterr_non_fatal_err_reporting_en( cfg_aer_rooterr_non_fatal_err_reporting_en), + .cfg_aer_rooterr_fatal_err_reporting_en ( cfg_aer_rooterr_fatal_err_reporting_en), + .cfg_aer_rooterr_corr_err_received ( cfg_aer_rooterr_corr_err_received), + .cfg_aer_rooterr_non_fatal_err_received ( cfg_aer_rooterr_non_fatal_err_received), + .cfg_aer_rooterr_fatal_err_received ( cfg_aer_rooterr_fatal_err_received), + .cfg_aer_interrupt_msgnum ( cfg_aer_interrupt_msgnum ), + .cfg_transaction ( cfg_transaction), + .cfg_transaction_addr ( cfg_transaction_addr), + .cfg_transaction_type ( cfg_transaction_type), + .cfg_vc_tcvc_map ( cfg_vc_tcvc_map), + .cfg_mgmt_byte_en_n ( cfg_mgmt_byte_en_n ), + .cfg_mgmt_di ( cfg_mgmt_di ), + .cfg_ds_bus_number ( cfg_ds_bus_number ), + .cfg_ds_device_number ( cfg_ds_device_number ), + .cfg_ds_function_number ( cfg_ds_function_number ), + .cfg_dsn ( cfg_dsn ), + .cfg_mgmt_dwaddr ( cfg_mgmt_dwaddr ), + .cfg_err_acs_n ( 1'b1 ), + .cfg_err_cor_n ( cfg_err_cor_n ), + .cfg_err_cpl_abort_n ( cfg_err_cpl_abort_n ), + .cfg_err_cpl_timeout_n ( cfg_err_cpl_timeout_n ), + .cfg_err_cpl_unexpect_n ( cfg_err_cpl_unexpect_n ), + .cfg_err_ecrc_n ( cfg_err_ecrc_n ), + .cfg_err_locked_n ( cfg_err_locked_n ), + .cfg_err_posted_n ( cfg_err_posted_n ), + .cfg_err_tlp_cpl_header ( cfg_err_tlp_cpl_header ), + .cfg_err_ur_n ( cfg_err_ur_n ), + .cfg_err_malformed_n ( cfg_err_malformed_n ), + .cfg_err_poisoned_n ( cfg_err_poisoned_n), + .cfg_err_atomic_egress_blocked_n ( cfg_err_atomic_egress_blocked_n ), + .cfg_err_mc_blocked_n ( cfg_err_mc_blocked_n ), + .cfg_err_internal_uncor_n ( cfg_err_internal_uncor_n ), + .cfg_err_internal_cor_n ( cfg_err_internal_cor_n ), + .cfg_err_norecovery_n ( cfg_err_norecovery_n ), + + .cfg_interrupt_assert_n ( cfg_interrupt_assert_n ), + .cfg_interrupt_di ( cfg_interrupt_di ), + .cfg_interrupt_n ( cfg_interrupt_n ), + .cfg_interrupt_stat_n ( cfg_interrupt_stat_n), + .cfg_pm_send_pme_to_n ( cfg_pm_send_pme_to_n ), + .cfg_pm_turnoff_ok_n ( cfg_turnoff_ok_w ), + .cfg_pm_wake_n ( cfg_pm_wake_n ), + .cfg_pm_halt_aspm_l0s_n ( cfg_pm_halt_aspm_l0s_n ), + .cfg_pm_halt_aspm_l1_n ( cfg_pm_halt_aspm_l1_n ), + .cfg_pm_force_state_en_n ( cfg_pm_force_state_en_n ), + .cfg_pm_force_state ( cfg_pm_force_state ), + .cfg_force_mps ( cfg_force_mps ), + .cfg_force_common_clock_off ( cfg_force_common_clock_off ), + .cfg_force_extended_sync_on ( cfg_force_extended_sync_on ), + .cfg_port_number ( cfg_port_number ), + .cfg_mgmt_rd_en_n ( cfg_mgmt_rd_en_n ), + .cfg_trn_pending_n ( ~cfg_trn_pending ), + .cfg_mgmt_wr_en_n ( cfg_mgmt_wr_en_n ), + .cfg_mgmt_wr_readonly_n ( cfg_mgmt_wr_readonly_n ), + .cfg_mgmt_wr_rw1c_as_rw_n ( cfg_mgmt_wr_rw1c_as_rw_n ), + + .pl_initial_link_width ( pl_initial_link_width ), + .pl_lane_reversal_mode ( pl_lane_reversal_mode ), + .pl_link_gen2_cap ( pl_link_gen2_cap ), + .pl_link_partner_gen2_supported ( pl_link_partner_gen2_supported ), + .pl_link_upcfg_cap ( pl_link_upcfg_cap ), + .pl_ltssm_state ( pl_ltssm_state ), + .pl_phy_lnk_up_n ( pl_phy_lnk_up_n ), + .pl_received_hot_rst ( pl_received_hot_rst ), + .pl_rx_pm_state ( pl_rx_pm_state ), + .pl_sel_lnk_rate ( pl_sel_lnk_rate), + .pl_sel_lnk_width ( pl_sel_lnk_width ), + .pl_tx_pm_state ( pl_tx_pm_state ), + .pl_directed_link_auton ( pl_directed_link_auton ), + .pl_directed_link_change ( pl_directed_link_change ), + .pl_directed_link_speed ( pl_directed_link_speed ), + .pl_directed_link_width ( pl_directed_link_width ), + .pl_downstream_deemph_source ( pl_downstream_deemph_source ), + .pl_upstream_prefer_deemph ( pl_upstream_prefer_deemph ), + .pl_transmit_hot_rst ( pl_transmit_hot_rst ), + .pl_directed_ltssm_new_vld ( pl_directed_ltssm_new_vld ), + .pl_directed_ltssm_new ( pl_directed_ltssm_new ), + .pl_directed_ltssm_stall ( pl_directed_ltssm_stall ), + .pl_directed_change_done ( pl_directed_change_done ), + + .dbg_sclr_a ( dbg_sclr_a ), + .dbg_sclr_b ( dbg_sclr_b ), + .dbg_sclr_c ( dbg_sclr_c ), + .dbg_sclr_d ( dbg_sclr_d ), + .dbg_sclr_e ( dbg_sclr_e ), + .dbg_sclr_f ( dbg_sclr_f ), + .dbg_sclr_g ( dbg_sclr_g ), + .dbg_sclr_h ( dbg_sclr_h ), + .dbg_sclr_i ( dbg_sclr_i ), + .dbg_sclr_j ( dbg_sclr_j ), + .dbg_sclr_k ( dbg_sclr_k ), + + .dbg_vec_a ( dbg_vec_a ), + .dbg_vec_b ( dbg_vec_b ), + .dbg_vec_c ( dbg_vec_c ), + .pl_dbg_vec ( pl_dbg_vec ), + .dbg_mode ( dbg_mode ), + .dbg_sub_mode ( dbg_sub_mode ), + .pl_dbg_mode ( pl_dbg_mode ), + + .drp_do ( drp_do ), + .drp_rdy ( drp_rdy ), + .drp_clk ( drp_clk ), + .drp_addr ( drp_addr ), + .drp_en ( drp_en ), + .drp_di ( drp_di ), + .drp_we ( drp_we ), + + .ll2_tlp_rcv ( 1'b0 ), + .ll2_send_enter_l1 ( 1'b0 ), + .ll2_send_enter_l23 ( 1'b0 ), + .ll2_send_as_req_l1 ( 1'b0 ), + .ll2_send_pm_ack ( 1'b0 ), + .ll2_suspend_now ( 1'b0 ), + .ll2_tfc_init1_seq ( ), + .ll2_tfc_init2_seq ( ), + .ll2_suspend_ok ( ), + .ll2_tx_idle ( ), + .ll2_link_status ( ), + .ll2_receiver_err ( ), + .ll2_protocol_err ( ), + .ll2_bad_tlp_err ( ), + .ll2_bad_dllp_err ( ), + .ll2_replay_ro_err ( ), + .ll2_replay_to_err ( ), + .tl2_ppm_suspend_req ( 1'b0 ), + .tl2_aspm_suspend_credit_check ( 1'b0 ), + .tl2_ppm_suspend_ok ( ), + .tl2_aspm_suspend_req ( ), + .tl2_aspm_suspend_credit_check_ok ( ), + .tl2_err_hdr ( ), + .tl2_err_malformed ( ), + .tl2_err_rxoverflow ( ), + .tl2_err_fcpe ( ), + .pl2_directed_lstate ( 5'b0 ), + .pl2_suspend_ok ( ), + .pl2_recovery ( ), + .pl2_rx_elec_idle ( ), + .pl2_rx_pm_state ( ), + .pl2_l0_req ( ), + .pl2_link_up ( ), + .pl2_receiver_err ( ), + + .trn_rdllp_data (trn_rdllp_data ), + .trn_rdllp_src_rdy (trn_rdllp_src_rdy ), + + .pipe_clk ( pipe_clk ), + .user_clk2 ( user_clk2 ), + .user_clk ( user_clk ), + .user_clk_prebuf ( 1'b0 ), + .user_clk_prebuf_en ( 1'b0 ), + + .pipe_rx0_polarity ( pipe_rx0_polarity ), + .pipe_rx1_polarity ( pipe_rx1_polarity ), + .pipe_rx2_polarity ( pipe_rx2_polarity ), + .pipe_rx3_polarity ( pipe_rx3_polarity ), + .pipe_rx4_polarity ( pipe_rx4_polarity ), + .pipe_rx5_polarity ( pipe_rx5_polarity ), + .pipe_rx6_polarity ( pipe_rx6_polarity ), + .pipe_rx7_polarity ( pipe_rx7_polarity ), + .pipe_tx0_compliance ( pipe_tx0_compliance ), + .pipe_tx1_compliance ( pipe_tx1_compliance ), + .pipe_tx2_compliance ( pipe_tx2_compliance ), + .pipe_tx3_compliance ( pipe_tx3_compliance ), + .pipe_tx4_compliance ( pipe_tx4_compliance ), + .pipe_tx5_compliance ( pipe_tx5_compliance ), + .pipe_tx6_compliance ( pipe_tx6_compliance ), + .pipe_tx7_compliance ( pipe_tx7_compliance ), + .pipe_tx0_char_is_k ( pipe_tx0_char_is_k ), + .pipe_tx1_char_is_k ( pipe_tx1_char_is_k ), + .pipe_tx2_char_is_k ( pipe_tx2_char_is_k ), + .pipe_tx3_char_is_k ( pipe_tx3_char_is_k ), + .pipe_tx4_char_is_k ( pipe_tx4_char_is_k ), + .pipe_tx5_char_is_k ( pipe_tx5_char_is_k ), + .pipe_tx6_char_is_k ( pipe_tx6_char_is_k ), + .pipe_tx7_char_is_k ( pipe_tx7_char_is_k ), + .pipe_tx0_data ( pipe_tx0_data ), + .pipe_tx1_data ( pipe_tx1_data ), + .pipe_tx2_data ( pipe_tx2_data ), + .pipe_tx3_data ( pipe_tx3_data ), + .pipe_tx4_data ( pipe_tx4_data ), + .pipe_tx5_data ( pipe_tx5_data ), + .pipe_tx6_data ( pipe_tx6_data ), + .pipe_tx7_data ( pipe_tx7_data ), + .pipe_tx0_elec_idle ( pipe_tx0_elec_idle ), + .pipe_tx1_elec_idle ( pipe_tx1_elec_idle ), + .pipe_tx2_elec_idle ( pipe_tx2_elec_idle ), + .pipe_tx3_elec_idle ( pipe_tx3_elec_idle ), + .pipe_tx4_elec_idle ( pipe_tx4_elec_idle ), + .pipe_tx5_elec_idle ( pipe_tx5_elec_idle ), + .pipe_tx6_elec_idle ( pipe_tx6_elec_idle ), + .pipe_tx7_elec_idle ( pipe_tx7_elec_idle ), + .pipe_tx0_powerdown ( pipe_tx0_powerdown ), + .pipe_tx1_powerdown ( pipe_tx1_powerdown ), + .pipe_tx2_powerdown ( pipe_tx2_powerdown ), + .pipe_tx3_powerdown ( pipe_tx3_powerdown ), + .pipe_tx4_powerdown ( pipe_tx4_powerdown ), + .pipe_tx5_powerdown ( pipe_tx5_powerdown ), + .pipe_tx6_powerdown ( pipe_tx6_powerdown ), + .pipe_tx7_powerdown ( pipe_tx7_powerdown ), + + .pipe_rx0_char_is_k ( pipe_rx0_char_is_k ), + .pipe_rx1_char_is_k ( pipe_rx1_char_is_k ), + .pipe_rx2_char_is_k ( pipe_rx2_char_is_k ), + .pipe_rx3_char_is_k ( pipe_rx3_char_is_k ), + .pipe_rx4_char_is_k ( pipe_rx4_char_is_k ), + .pipe_rx5_char_is_k ( pipe_rx5_char_is_k ), + .pipe_rx6_char_is_k ( pipe_rx6_char_is_k ), + .pipe_rx7_char_is_k ( pipe_rx7_char_is_k ), + .pipe_rx0_valid ( pipe_rx0_valid ), + .pipe_rx1_valid ( pipe_rx1_valid ), + .pipe_rx2_valid ( pipe_rx2_valid ), + .pipe_rx3_valid ( pipe_rx3_valid ), + .pipe_rx4_valid ( pipe_rx4_valid ), + .pipe_rx5_valid ( pipe_rx5_valid ), + .pipe_rx6_valid ( pipe_rx6_valid ), + .pipe_rx7_valid ( pipe_rx7_valid ), + .pipe_rx0_data ( pipe_rx0_data ), + .pipe_rx1_data ( pipe_rx1_data ), + .pipe_rx2_data ( pipe_rx2_data ), + .pipe_rx3_data ( pipe_rx3_data ), + .pipe_rx4_data ( pipe_rx4_data ), + .pipe_rx5_data ( pipe_rx5_data ), + .pipe_rx6_data ( pipe_rx6_data ), + .pipe_rx7_data ( pipe_rx7_data ), + .pipe_rx0_chanisaligned ( pipe_rx0_chanisaligned ), + .pipe_rx1_chanisaligned ( pipe_rx1_chanisaligned ), + .pipe_rx2_chanisaligned ( pipe_rx2_chanisaligned ), + .pipe_rx3_chanisaligned ( pipe_rx3_chanisaligned ), + .pipe_rx4_chanisaligned ( pipe_rx4_chanisaligned ), + .pipe_rx5_chanisaligned ( pipe_rx5_chanisaligned ), + .pipe_rx6_chanisaligned ( pipe_rx6_chanisaligned ), + .pipe_rx7_chanisaligned ( pipe_rx7_chanisaligned ), + .pipe_rx0_status ( pipe_rx0_status ), + .pipe_rx1_status ( pipe_rx1_status ), + .pipe_rx2_status ( pipe_rx2_status ), + .pipe_rx3_status ( pipe_rx3_status ), + .pipe_rx4_status ( pipe_rx4_status ), + .pipe_rx5_status ( pipe_rx5_status ), + .pipe_rx6_status ( pipe_rx6_status ), + .pipe_rx7_status ( pipe_rx7_status ), + .pipe_rx0_phy_status ( pipe_rx0_phy_status ), + .pipe_rx1_phy_status ( pipe_rx1_phy_status ), + .pipe_rx2_phy_status ( pipe_rx2_phy_status ), + .pipe_rx3_phy_status ( pipe_rx3_phy_status ), + .pipe_rx4_phy_status ( pipe_rx4_phy_status ), + .pipe_rx5_phy_status ( pipe_rx5_phy_status ), + .pipe_rx6_phy_status ( pipe_rx6_phy_status ), + .pipe_rx7_phy_status ( pipe_rx7_phy_status ), + .pipe_tx_deemph ( pipe_tx_deemph ), + .pipe_tx_margin ( pipe_tx_margin ), + .pipe_tx_reset ( pipe_tx_reset ), + .pipe_tx_rcvr_det ( pipe_tx_rcvr_det ), + .pipe_tx_rate ( pipe_tx_rate ), + + .pipe_rx0_elec_idle ( pipe_rx0_elec_idle ), + .pipe_rx1_elec_idle ( pipe_rx1_elec_idle ), + .pipe_rx2_elec_idle ( pipe_rx2_elec_idle ), + .pipe_rx3_elec_idle ( pipe_rx3_elec_idle ), + .pipe_rx4_elec_idle ( pipe_rx4_elec_idle ), + .pipe_rx5_elec_idle ( pipe_rx5_elec_idle ), + .pipe_rx6_elec_idle ( pipe_rx6_elec_idle ), + .pipe_rx7_elec_idle ( pipe_rx7_elec_idle ) + ); + + //------------------------------------------------------------------------------------------------------------------// + // PIPE Interface PIPELINE Module // + //------------------------------------------------------------------------------------------------------------------// +pcie_7x_0_pcie_pipe_pipeline # ( + + .LINK_CAP_MAX_LINK_WIDTH ( LINK_CAP_MAX_LINK_WIDTH ), + .PIPE_PIPELINE_STAGES ( PIPE_PIPELINE_STAGES ) + + ) + pcie_pipe_pipeline_i ( + + // Pipe Per-Link Signals + .pipe_tx_rcvr_det_i (pipe_tx_rcvr_det), + .pipe_tx_reset_i (1'b0), //MV? + .pipe_tx_rate_i (pipe_tx_rate), + .pipe_tx_deemph_i (pipe_tx_deemph), + .pipe_tx_margin_i (pipe_tx_margin), + .pipe_tx_swing_i (1'b0), + + .pipe_tx_rcvr_det_o (pipe_tx_rcvr_det_gt), + .pipe_tx_reset_o ( ), + .pipe_tx_rate_o (pipe_tx_rate_gt), + .pipe_tx_deemph_o (pipe_tx_deemph_gt), + .pipe_tx_margin_o (pipe_tx_margin_gt), + .pipe_tx_swing_o ( ), + + // Pipe Per-Lane Signals - Lane 0 + + .pipe_rx0_char_is_k_o (pipe_rx0_char_is_k ), + .pipe_rx0_data_o (pipe_rx0_data ), + .pipe_rx0_valid_o (pipe_rx0_valid ), + .pipe_rx0_chanisaligned_o (pipe_rx0_chanisaligned ), + .pipe_rx0_status_o (pipe_rx0_status ), + .pipe_rx0_phy_status_o (pipe_rx0_phy_status ), + .pipe_rx0_elec_idle_i (pipe_rx0_elec_idle_gt ), + .pipe_rx0_polarity_i (pipe_rx0_polarity ), + .pipe_tx0_compliance_i (pipe_tx0_compliance ), + .pipe_tx0_char_is_k_i (pipe_tx0_char_is_k ), + .pipe_tx0_data_i (pipe_tx0_data ), + .pipe_tx0_elec_idle_i (pipe_tx0_elec_idle ), + .pipe_tx0_powerdown_i (pipe_tx0_powerdown ), + + .pipe_rx0_char_is_k_i (pipe_rx0_char_is_k_gt ), + .pipe_rx0_data_i (pipe_rx0_data_gt ), + .pipe_rx0_valid_i (pipe_rx0_valid_gt ), + .pipe_rx0_chanisaligned_i (pipe_rx0_chanisaligned_gt), + .pipe_rx0_status_i (pipe_rx0_status_gt ), + .pipe_rx0_phy_status_i (pipe_rx0_phy_status_gt ), + .pipe_rx0_elec_idle_o (pipe_rx0_elec_idle ), + .pipe_rx0_polarity_o (pipe_rx0_polarity_gt ), + .pipe_tx0_compliance_o (pipe_tx0_compliance_gt ), + .pipe_tx0_char_is_k_o (pipe_tx0_char_is_k_gt ), + .pipe_tx0_data_o (pipe_tx0_data_gt ), + .pipe_tx0_elec_idle_o (pipe_tx0_elec_idle_gt ), + .pipe_tx0_powerdown_o (pipe_tx0_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 1 + + .pipe_rx1_char_is_k_o (pipe_rx1_char_is_k ), + .pipe_rx1_data_o (pipe_rx1_data ), + .pipe_rx1_valid_o (pipe_rx1_valid ), + .pipe_rx1_chanisaligned_o (pipe_rx1_chanisaligned ), + .pipe_rx1_status_o (pipe_rx1_status ), + .pipe_rx1_phy_status_o (pipe_rx1_phy_status ), + .pipe_rx1_elec_idle_i (pipe_rx1_elec_idle_gt ), + .pipe_rx1_polarity_i (pipe_rx1_polarity ), + .pipe_tx1_compliance_i (pipe_tx1_compliance ), + .pipe_tx1_char_is_k_i (pipe_tx1_char_is_k ), + .pipe_tx1_data_i (pipe_tx1_data ), + .pipe_tx1_elec_idle_i (pipe_tx1_elec_idle ), + .pipe_tx1_powerdown_i (pipe_tx1_powerdown ), + + .pipe_rx1_char_is_k_i (pipe_rx1_char_is_k_gt ), + .pipe_rx1_data_i (pipe_rx1_data_gt ), + .pipe_rx1_valid_i (pipe_rx1_valid_gt ), + .pipe_rx1_chanisaligned_i (pipe_rx1_chanisaligned_gt), + .pipe_rx1_status_i (pipe_rx1_status_gt ), + .pipe_rx1_phy_status_i (pipe_rx1_phy_status_gt ), + .pipe_rx1_elec_idle_o (pipe_rx1_elec_idle ), + .pipe_rx1_polarity_o (pipe_rx1_polarity_gt ), + .pipe_tx1_compliance_o (pipe_tx1_compliance_gt ), + .pipe_tx1_char_is_k_o (pipe_tx1_char_is_k_gt ), + .pipe_tx1_data_o (pipe_tx1_data_gt ), + .pipe_tx1_elec_idle_o (pipe_tx1_elec_idle_gt ), + .pipe_tx1_powerdown_o (pipe_tx1_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 2 + + .pipe_rx2_char_is_k_o (pipe_rx2_char_is_k ), + .pipe_rx2_data_o (pipe_rx2_data ), + .pipe_rx2_valid_o (pipe_rx2_valid ), + .pipe_rx2_chanisaligned_o (pipe_rx2_chanisaligned ), + .pipe_rx2_status_o (pipe_rx2_status ), + .pipe_rx2_phy_status_o (pipe_rx2_phy_status ), + .pipe_rx2_elec_idle_i (pipe_rx2_elec_idle_gt ), + .pipe_rx2_polarity_i (pipe_rx2_polarity ), + .pipe_tx2_compliance_i (pipe_tx2_compliance ), + .pipe_tx2_char_is_k_i (pipe_tx2_char_is_k ), + .pipe_tx2_data_i (pipe_tx2_data ), + .pipe_tx2_elec_idle_i (pipe_tx2_elec_idle ), + .pipe_tx2_powerdown_i (pipe_tx2_powerdown ), + + .pipe_rx2_char_is_k_i (pipe_rx2_char_is_k_gt ), + .pipe_rx2_data_i (pipe_rx2_data_gt ), + .pipe_rx2_valid_i (pipe_rx2_valid_gt ), + .pipe_rx2_chanisaligned_i (pipe_rx2_chanisaligned_gt), + .pipe_rx2_status_i (pipe_rx2_status_gt ), + .pipe_rx2_phy_status_i (pipe_rx2_phy_status_gt ), + .pipe_rx2_elec_idle_o (pipe_rx2_elec_idle ), + .pipe_rx2_polarity_o (pipe_rx2_polarity_gt ), + .pipe_tx2_compliance_o (pipe_tx2_compliance_gt ), + .pipe_tx2_char_is_k_o (pipe_tx2_char_is_k_gt ), + .pipe_tx2_data_o (pipe_tx2_data_gt ), + .pipe_tx2_elec_idle_o (pipe_tx2_elec_idle_gt ), + .pipe_tx2_powerdown_o (pipe_tx2_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 3 + + .pipe_rx3_char_is_k_o (pipe_rx3_char_is_k ), + .pipe_rx3_data_o (pipe_rx3_data ), + .pipe_rx3_valid_o (pipe_rx3_valid ), + .pipe_rx3_chanisaligned_o (pipe_rx3_chanisaligned ), + .pipe_rx3_status_o (pipe_rx3_status ), + .pipe_rx3_phy_status_o (pipe_rx3_phy_status ), + .pipe_rx3_elec_idle_i (pipe_rx3_elec_idle_gt ), + .pipe_rx3_polarity_i (pipe_rx3_polarity ), + .pipe_tx3_compliance_i (pipe_tx3_compliance ), + .pipe_tx3_char_is_k_i (pipe_tx3_char_is_k ), + .pipe_tx3_data_i (pipe_tx3_data ), + .pipe_tx3_elec_idle_i (pipe_tx3_elec_idle ), + .pipe_tx3_powerdown_i (pipe_tx3_powerdown ), + + .pipe_rx3_char_is_k_i (pipe_rx3_char_is_k_gt ), + .pipe_rx3_data_i (pipe_rx3_data_gt ), + .pipe_rx3_valid_i (pipe_rx3_valid_gt ), + .pipe_rx3_chanisaligned_i (pipe_rx3_chanisaligned_gt), + .pipe_rx3_status_i (pipe_rx3_status_gt ), + .pipe_rx3_phy_status_i (pipe_rx3_phy_status_gt ), + .pipe_rx3_elec_idle_o (pipe_rx3_elec_idle ), + .pipe_rx3_polarity_o (pipe_rx3_polarity_gt ), + .pipe_tx3_compliance_o (pipe_tx3_compliance_gt ), + .pipe_tx3_char_is_k_o (pipe_tx3_char_is_k_gt ), + .pipe_tx3_data_o (pipe_tx3_data_gt ), + .pipe_tx3_elec_idle_o (pipe_tx3_elec_idle_gt ), + .pipe_tx3_powerdown_o (pipe_tx3_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 4 + + .pipe_rx4_char_is_k_o (pipe_rx4_char_is_k ), + .pipe_rx4_data_o (pipe_rx4_data ), + .pipe_rx4_valid_o (pipe_rx4_valid ), + .pipe_rx4_chanisaligned_o (pipe_rx4_chanisaligned ), + .pipe_rx4_status_o (pipe_rx4_status ), + .pipe_rx4_phy_status_o (pipe_rx4_phy_status ), + .pipe_rx4_elec_idle_i (pipe_rx4_elec_idle_gt ), + .pipe_rx4_polarity_i (pipe_rx4_polarity ), + .pipe_tx4_compliance_i (pipe_tx4_compliance ), + .pipe_tx4_char_is_k_i (pipe_tx4_char_is_k ), + .pipe_tx4_data_i (pipe_tx4_data ), + .pipe_tx4_elec_idle_i (pipe_tx4_elec_idle ), + .pipe_tx4_powerdown_i (pipe_tx4_powerdown ), + .pipe_rx4_char_is_k_i (pipe_rx4_char_is_k_gt ), + .pipe_rx4_data_i (pipe_rx4_data_gt ), + .pipe_rx4_valid_i (pipe_rx4_valid_gt ), + .pipe_rx4_chanisaligned_i (pipe_rx4_chanisaligned_gt), + .pipe_rx4_status_i (pipe_rx4_status_gt ), + .pipe_rx4_phy_status_i (pipe_rx4_phy_status_gt ), + .pipe_rx4_elec_idle_o (pipe_rx4_elec_idle ), + .pipe_rx4_polarity_o (pipe_rx4_polarity_gt ), + .pipe_tx4_compliance_o (pipe_tx4_compliance_gt ), + .pipe_tx4_char_is_k_o (pipe_tx4_char_is_k_gt ), + .pipe_tx4_data_o (pipe_tx4_data_gt ), + .pipe_tx4_elec_idle_o (pipe_tx4_elec_idle_gt ), + .pipe_tx4_powerdown_o (pipe_tx4_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 5 + + .pipe_rx5_char_is_k_o (pipe_rx5_char_is_k ), + .pipe_rx5_data_o (pipe_rx5_data ), + .pipe_rx5_valid_o (pipe_rx5_valid ), + .pipe_rx5_chanisaligned_o (pipe_rx5_chanisaligned ), + .pipe_rx5_status_o (pipe_rx5_status ), + .pipe_rx5_phy_status_o (pipe_rx5_phy_status ), + .pipe_rx5_elec_idle_i (pipe_rx5_elec_idle_gt ), + .pipe_rx5_polarity_i (pipe_rx5_polarity ), + .pipe_tx5_compliance_i (pipe_tx5_compliance ), + .pipe_tx5_char_is_k_i (pipe_tx5_char_is_k ), + .pipe_tx5_data_i (pipe_tx5_data ), + .pipe_tx5_elec_idle_i (pipe_tx5_elec_idle ), + .pipe_tx5_powerdown_i (pipe_tx5_powerdown ), + .pipe_rx5_char_is_k_i (pipe_rx5_char_is_k_gt ), + .pipe_rx5_data_i (pipe_rx5_data_gt ), + .pipe_rx5_valid_i (pipe_rx5_valid_gt ), + .pipe_rx5_chanisaligned_i (pipe_rx5_chanisaligned_gt), + .pipe_rx5_status_i (pipe_rx5_status_gt ), + .pipe_rx5_phy_status_i (pipe_rx5_phy_status_gt ), + .pipe_rx5_elec_idle_o (pipe_rx5_elec_idle ), + .pipe_rx5_polarity_o (pipe_rx5_polarity_gt ), + .pipe_tx5_compliance_o (pipe_tx5_compliance_gt ), + .pipe_tx5_char_is_k_o (pipe_tx5_char_is_k_gt ), + .pipe_tx5_data_o (pipe_tx5_data_gt ), + .pipe_tx5_elec_idle_o (pipe_tx5_elec_idle_gt ), + .pipe_tx5_powerdown_o (pipe_tx5_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 6 + + .pipe_rx6_char_is_k_o (pipe_rx6_char_is_k ), + .pipe_rx6_data_o (pipe_rx6_data ), + .pipe_rx6_valid_o (pipe_rx6_valid ), + .pipe_rx6_chanisaligned_o (pipe_rx6_chanisaligned ), + .pipe_rx6_status_o (pipe_rx6_status ), + .pipe_rx6_phy_status_o (pipe_rx6_phy_status ), + .pipe_rx6_elec_idle_i (pipe_rx6_elec_idle_gt ), + .pipe_rx6_polarity_i (pipe_rx6_polarity ), + .pipe_tx6_compliance_i (pipe_tx6_compliance ), + .pipe_tx6_char_is_k_i (pipe_tx6_char_is_k ), + .pipe_tx6_data_i (pipe_tx6_data ), + .pipe_tx6_elec_idle_i (pipe_tx6_elec_idle ), + .pipe_tx6_powerdown_i (pipe_tx6_powerdown ), + .pipe_rx6_char_is_k_i (pipe_rx6_char_is_k_gt ), + .pipe_rx6_data_i (pipe_rx6_data_gt ), + .pipe_rx6_valid_i (pipe_rx6_valid_gt ), + .pipe_rx6_chanisaligned_i (pipe_rx6_chanisaligned_gt), + .pipe_rx6_status_i (pipe_rx6_status_gt ), + .pipe_rx6_phy_status_i (pipe_rx6_phy_status_gt ), + .pipe_rx6_elec_idle_o (pipe_rx6_elec_idle ), + .pipe_rx6_polarity_o (pipe_rx6_polarity_gt ), + .pipe_tx6_compliance_o (pipe_tx6_compliance_gt ), + .pipe_tx6_char_is_k_o (pipe_tx6_char_is_k_gt ), + .pipe_tx6_data_o (pipe_tx6_data_gt ), + .pipe_tx6_elec_idle_o (pipe_tx6_elec_idle_gt ), + .pipe_tx6_powerdown_o (pipe_tx6_powerdown_gt ), + + // Pipe Per-Lane Signals - Lane 7 + + .pipe_rx7_char_is_k_o (pipe_rx7_char_is_k ), + .pipe_rx7_data_o (pipe_rx7_data ), + .pipe_rx7_valid_o (pipe_rx7_valid ), + .pipe_rx7_chanisaligned_o (pipe_rx7_chanisaligned ), + .pipe_rx7_status_o (pipe_rx7_status ), + .pipe_rx7_phy_status_o (pipe_rx7_phy_status ), + .pipe_rx7_elec_idle_i (pipe_rx7_elec_idle_gt ), + .pipe_rx7_polarity_i (pipe_rx7_polarity ), + .pipe_tx7_compliance_i (pipe_tx7_compliance ), + .pipe_tx7_char_is_k_i (pipe_tx7_char_is_k ), + .pipe_tx7_data_i (pipe_tx7_data ), + .pipe_tx7_elec_idle_i (pipe_tx7_elec_idle ), + .pipe_tx7_powerdown_i (pipe_tx7_powerdown ), + .pipe_rx7_char_is_k_i (pipe_rx7_char_is_k_gt ), + .pipe_rx7_data_i (pipe_rx7_data_gt ), + .pipe_rx7_valid_i (pipe_rx7_valid_gt ), + .pipe_rx7_chanisaligned_i (pipe_rx7_chanisaligned_gt), + .pipe_rx7_status_i (pipe_rx7_status_gt ), + .pipe_rx7_phy_status_i (pipe_rx7_phy_status_gt ), + .pipe_rx7_elec_idle_o (pipe_rx7_elec_idle ), + .pipe_rx7_polarity_o (pipe_rx7_polarity_gt ), + .pipe_tx7_compliance_o (pipe_tx7_compliance_gt ), + .pipe_tx7_char_is_k_o (pipe_tx7_char_is_k_gt ), + .pipe_tx7_data_o (pipe_tx7_data_gt ), + .pipe_tx7_elec_idle_o (pipe_tx7_elec_idle_gt ), + .pipe_tx7_powerdown_o (pipe_tx7_powerdown_gt ), + + // Non PIPE signals + .pipe_clk (pipe_clk ), + .rst_n (phy_rdy_n ) + ); + + + +endmodule + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pipe_clock.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pipe_clock.v new file mode 100644 index 0000000000000000000000000000000000000000..9d9916c9ead18f62925d83d675c8ddfe3e57432d --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_pipe_clock.v @@ -0,0 +1,614 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_pipe_clock.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : pipe_clock.v +// Description : PIPE Clock Module for 7 Series Transceiver +// Version : 15.3 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- PIPE Clock Module ------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_pipe_clock # +( + + parameter PCIE_ASYNC_EN = "FALSE", // PCIe async enable + parameter PCIE_TXBUF_EN = "FALSE", // PCIe TX buffer enable for Gen1/Gen2 only + parameter PCIE_CLK_SHARING_EN= "FALSE", // Enable Clock Sharing + parameter PCIE_LANE = 1, // PCIe number of lanes + parameter PCIE_LINK_SPEED = 3, // PCIe link speed + parameter PCIE_REFCLK_FREQ = 0, // PCIe reference clock frequency + parameter PCIE_USERCLK1_FREQ = 2, // PCIe user clock 1 frequency + parameter PCIE_USERCLK2_FREQ = 2, // PCIe user clock 2 frequency + parameter PCIE_OOBCLK_MODE = 1, // PCIe oob clock mode + parameter PCIE_DEBUG_MODE = 0 // PCIe Debug mode + +) + +( + + //---------- Input ------------------------------------- + input CLK_CLK, + input CLK_TXOUTCLK, + input [PCIE_LANE-1:0] CLK_RXOUTCLK_IN, + input CLK_RST_N, + input [PCIE_LANE-1:0] CLK_PCLK_SEL, + input [PCIE_LANE-1:0] CLK_PCLK_SEL_SLAVE, + input CLK_GEN3, + + //---------- Output ------------------------------------ + output CLK_PCLK, + output CLK_PCLK_SLAVE, + output CLK_RXUSRCLK, + output [PCIE_LANE-1:0] CLK_RXOUTCLK_OUT, + output CLK_DCLK, + output CLK_OOBCLK, + output CLK_USERCLK1, + output CLK_USERCLK2, + output CLK_MMCM_LOCK + +); + + //---------- Select Clock Divider ---------------------- + localparam DIVCLK_DIVIDE = (PCIE_REFCLK_FREQ == 2) ? 1 : + (PCIE_REFCLK_FREQ == 1) ? 1 : 1; + + localparam CLKFBOUT_MULT_F = (PCIE_REFCLK_FREQ == 2) ? 4 : + (PCIE_REFCLK_FREQ == 1) ? 8 : 10; + + localparam CLKIN1_PERIOD = (PCIE_REFCLK_FREQ == 2) ? 4 : + (PCIE_REFCLK_FREQ == 1) ? 8 : 10; + + localparam CLKOUT0_DIVIDE_F = 8; + + localparam CLKOUT1_DIVIDE = 4; + + localparam CLKOUT2_DIVIDE = (PCIE_USERCLK1_FREQ == 5) ? 2 : + (PCIE_USERCLK1_FREQ == 4) ? 4 : + (PCIE_USERCLK1_FREQ == 3) ? 8 : + (PCIE_USERCLK1_FREQ == 1) ? 32 : 16; + + localparam CLKOUT3_DIVIDE = (PCIE_USERCLK2_FREQ == 5) ? 2 : + (PCIE_USERCLK2_FREQ == 4) ? 4 : + (PCIE_USERCLK2_FREQ == 3) ? 8 : + (PCIE_USERCLK2_FREQ == 1) ? 32 : 16; + + localparam CLKOUT4_DIVIDE = 20; + + localparam PCIE_GEN1_MODE = 1'b0; // PCIe link speed is GEN1 only + + + //---------- Input Registers --------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] pclk_sel_reg1 = {PCIE_LANE{1'd0}}; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] pclk_sel_slave_reg1 = {PCIE_LANE{1'd0}}; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg gen3_reg1 = 1'd0; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] pclk_sel_reg2 = {PCIE_LANE{1'd0}}; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] pclk_sel_slave_reg2 = {PCIE_LANE{1'd0}}; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg gen3_reg2 = 1'd0; + + //---------- Internal Signals -------------------------- + wire refclk; + wire mmcm_fb; + wire clk_125mhz; + wire clk_125mhz_buf; + wire clk_250mhz; + wire userclk1; + wire userclk2; + wire oobclk; + reg pclk_sel = 1'd0; + reg pclk_sel_slave = 1'd0; + + //---------- Output Registers -------------------------- + wire pclk_1; + wire pclk; + wire userclk1_1; + wire userclk2_1; + wire mmcm_lock; + + //---------- Generate Per-Lane Signals ----------------- + genvar i; // Index for per-lane signals + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge pclk) +begin + + if (!CLK_RST_N) + begin + //---------- 1st Stage FF -------------------------- + pclk_sel_reg1 <= {PCIE_LANE{1'd0}}; + pclk_sel_slave_reg1 <= {PCIE_LANE{1'd0}}; + gen3_reg1 <= 1'd0; + //---------- 2nd Stage FF -------------------------- + pclk_sel_reg2 <= {PCIE_LANE{1'd0}}; + pclk_sel_slave_reg2 <= {PCIE_LANE{1'd0}}; + gen3_reg2 <= 1'd0; + end + else + begin + //---------- 1st Stage FF -------------------------- + pclk_sel_reg1 <= CLK_PCLK_SEL; + pclk_sel_slave_reg1 <= CLK_PCLK_SEL_SLAVE; + gen3_reg1 <= CLK_GEN3; + //---------- 2nd Stage FF -------------------------- + pclk_sel_reg2 <= pclk_sel_reg1; + pclk_sel_slave_reg2 <= pclk_sel_slave_reg1; + gen3_reg2 <= gen3_reg1; + end + +end + + + +//---------- Select Reference clock or TXOUTCLK -------------------------------- +generate if ((PCIE_TXBUF_EN == "TRUE") && (PCIE_LINK_SPEED != 3)) + + begin : refclk_i + + //---------- Select Reference Clock ---------------------------------------- + BUFG refclk_i + ( + + //---------- Input ------------------------------------- + .I (CLK_CLK), + //---------- Output ------------------------------------ + .O (refclk) + + ); + + end + +else + + begin : txoutclk_i + + //---------- Select TXOUTCLK ----------------------------------------------- + BUFG txoutclk_i + ( + + //---------- Input ------------------------------------- + .I (CLK_TXOUTCLK), + //---------- Output ------------------------------------ + .O (refclk) + + ); + + end + +endgenerate + + + +//---------- MMCM -------------------------------------------------------------- +MMCME2_ADV # +( + + .BANDWIDTH ("OPTIMIZED"), + .CLKOUT4_CASCADE ("FALSE"), + .COMPENSATION ("ZHOLD"), + .STARTUP_WAIT ("FALSE"), + .DIVCLK_DIVIDE (DIVCLK_DIVIDE), + .CLKFBOUT_MULT_F (CLKFBOUT_MULT_F), + .CLKFBOUT_PHASE (0.000), + .CLKFBOUT_USE_FINE_PS ("FALSE"), + .CLKOUT0_DIVIDE_F (CLKOUT0_DIVIDE_F), + .CLKOUT0_PHASE (0.000), + .CLKOUT0_DUTY_CYCLE (0.500), + .CLKOUT0_USE_FINE_PS ("FALSE"), + .CLKOUT1_DIVIDE (CLKOUT1_DIVIDE), + .CLKOUT1_PHASE (0.000), + .CLKOUT1_DUTY_CYCLE (0.500), + .CLKOUT1_USE_FINE_PS ("FALSE"), + .CLKOUT2_DIVIDE (CLKOUT2_DIVIDE), + .CLKOUT2_PHASE (0.000), + .CLKOUT2_DUTY_CYCLE (0.500), + .CLKOUT2_USE_FINE_PS ("FALSE"), + .CLKOUT3_DIVIDE (CLKOUT3_DIVIDE), + .CLKOUT3_PHASE (0.000), + .CLKOUT3_DUTY_CYCLE (0.500), + .CLKOUT3_USE_FINE_PS ("FALSE"), + .CLKOUT4_DIVIDE (CLKOUT4_DIVIDE), + .CLKOUT4_PHASE (0.000), + .CLKOUT4_DUTY_CYCLE (0.500), + .CLKOUT4_USE_FINE_PS ("FALSE"), + .CLKIN1_PERIOD (CLKIN1_PERIOD), + .REF_JITTER1 (0.010) + +) +mmcm_i +( + + //---------- Input ------------------------------------ + .CLKIN1 (refclk), + .CLKIN2 (1'd0), // not used, comment out CLKIN2 if it cause implementation issues + //.CLKIN2 (refclk), // not used, comment out CLKIN2 if it cause implementation issues + .CLKINSEL (1'd1), + .CLKFBIN (mmcm_fb), + .RST (!CLK_RST_N), + .PWRDWN (1'd0), + + //---------- Output ------------------------------------ + .CLKFBOUT (mmcm_fb), + .CLKFBOUTB (), + .CLKOUT0 (clk_125mhz), + .CLKOUT0B (), + .CLKOUT1 (clk_250mhz), + .CLKOUT1B (), + .CLKOUT2 (userclk1), + .CLKOUT2B (), + .CLKOUT3 (userclk2), + .CLKOUT3B (), + .CLKOUT4 (oobclk), + .CLKOUT5 (), + .CLKOUT6 (), + .LOCKED (mmcm_lock), + + //---------- Dynamic Reconfiguration ------------------- + .DCLK ( 1'd0), + .DADDR ( 7'd0), + .DEN ( 1'd0), + .DWE ( 1'd0), + .DI (16'd0), + .DO (), + .DRDY (), + + //---------- Dynamic Phase Shift ----------------------- + .PSCLK (1'd0), + .PSEN (1'd0), + .PSINCDEC (1'd0), + .PSDONE (), + + //---------- Status ------------------------------------ + .CLKINSTOPPED (), + .CLKFBSTOPPED () + +); + + + +//---------- Select PCLK MUX --------------------------------------------------- +generate if (PCIE_LINK_SPEED != 1) + + begin : pclk_i1_bufgctrl + //---------- PCLK Mux ---------------------------------- + BUFGCTRL pclk_i1 + ( + //---------- Input --------------------------------- + .CE0 (1'd1), + .CE1 (1'd1), + .I0 (clk_125mhz), + .I1 (clk_250mhz), + .IGNORE0 (1'd0), + .IGNORE1 (1'd0), + .S0 (~pclk_sel), + .S1 ( pclk_sel), + //---------- Output -------------------------------- + .O (pclk_1) + ); + end + +else + + //---------- Select PCLK Buffer ------------------------ + begin : pclk_i1_bufg + //---------- PCLK Buffer ------------------------------- + BUFG pclk_i1 + ( + //---------- Input --------------------------------- + .I (clk_125mhz), + //---------- Output -------------------------------- + .O (clk_125mhz_buf) + ); + assign pclk_1 = clk_125mhz_buf; + end + +endgenerate + +//---------- Select PCLK MUX for Slave--------------------------------------------------- +generate if(PCIE_CLK_SHARING_EN == "FALSE") + //---------- PCLK MUX for Slave------------------// + begin : pclk_slave_disable + assign CLK_PCLK_SLAVE = 1'b0; + end + +else if (PCIE_LINK_SPEED != 1) + + begin : pclk_slave_bufgctrl + //---------- PCLK Mux ---------------------------------- + BUFGCTRL pclk_slave + ( + //---------- Input --------------------------------- + .CE0 (1'd1), + .CE1 (1'd1), + .I0 (clk_125mhz), + .I1 (clk_250mhz), + .IGNORE0 (1'd0), + .IGNORE1 (1'd0), + .S0 (~pclk_sel_slave), + .S1 ( pclk_sel_slave), + //---------- Output -------------------------------- + .O (CLK_PCLK_SLAVE) + ); + end + +else + + //---------- Select PCLK Buffer ------------------------ + begin : pclk_slave_bufg + //---------- PCLK Buffer ------------------------------- + BUFG pclk_slave + ( + //---------- Input --------------------------------- + .I (clk_125mhz), + //---------- Output -------------------------------- + .O (CLK_PCLK_SLAVE) + ); + end + +endgenerate + + + +//---------- Generate RXOUTCLK Buffer for Debug -------------------------------- +generate if ((PCIE_DEBUG_MODE == 1) || (PCIE_ASYNC_EN == "TRUE")) + + begin : rxoutclk_per_lane + //---------- Generate per Lane ------------------------- + for (i=0; i>2:0]PIPE_QPLL_LOCK, // Async | Async + output PIPE_PCLK_LOCK, // Async | Async + output [PCIE_LANE-1:0] PIPE_RXCDRLOCK, // Async | Async + output PIPE_USERCLK1, // Optional user clock + output PIPE_USERCLK2, // Optional user clock + output PIPE_RXUSRCLK, // RXUSRCLK + // Equivalent to PCLK in Gen1/Gen2 + // Equivalent to RXOUTCLK[0] in Gen3 + output [PCIE_LANE-1:0] PIPE_RXOUTCLK, // RX recovered clock (for debug only) + output [PCIE_LANE-1:0] PIPE_TXSYNC_DONE, // PCLK | PCLK + output [PCIE_LANE-1:0] PIPE_RXSYNC_DONE, // PCLK | PCLK + output [PCIE_LANE-1:0] PIPE_GEN3_RDY, // PCLK | RXUSRCLK + output [PCIE_LANE-1:0] PIPE_RXCHANISALIGNED, + output [PCIE_LANE-1:0] PIPE_ACTIVE_LANE, + +// Shared Logic Internal + output INT_PCLK_OUT_SLAVE, // PCLK | PCLK + output INT_RXUSRCLK_OUT, // RXUSERCLK + output [PCIE_LANE-1:0 ] INT_RXOUTCLK_OUT, // RX recovered clock + output INT_DCLK_OUT, // DCLK | DCLK + output INT_USERCLK1_OUT, // Optional user clock + output INT_USERCLK2_OUT, // Optional user clock + output INT_OOBCLK_OUT, // OOB | OOB + output INT_MMCM_LOCK_OUT, // Async | Async + output [1:0] INT_QPLLLOCK_OUT, + output [1:0] INT_QPLLOUTCLK_OUT, + output [1:0] INT_QPLLOUTREFCLK_OUT, + input [PCIE_LANE-1:0] INT_PCLK_SEL_SLAVE, + + + // Shared Logic External + + //---------- External Clock Ports ---------------------- + input PIPE_PCLK_IN, // PCLK | PCLK + input PIPE_RXUSRCLK_IN, // RXUSERCLK + // Equivalent to PCLK in Gen1/Gen2 + // Equivalent to RXOUTCLK[0] in Gen3 + input [PCIE_LANE-1:0] PIPE_RXOUTCLK_IN, // RX recovered clock + input PIPE_DCLK_IN, // DCLK | DCLK + input PIPE_USERCLK1_IN, // Optional user clock + input PIPE_USERCLK2_IN, // Optional user clock + input PIPE_OOBCLK_IN, // OOB | OOB + input PIPE_MMCM_LOCK_IN, // Async | Async + + output PIPE_TXOUTCLK_OUT, // PCLK | PCLK + output [PCIE_LANE-1:0] PIPE_RXOUTCLK_OUT, // RX recovered clock (for debug only) + output [PCIE_LANE-1:0] PIPE_PCLK_SEL_OUT, // PCLK | PCLK + output PIPE_GEN3_OUT, // PCLK | PCLK + //---------- External GT COMMON Ports ---------------------- + input [11:0] QPLL_DRP_CRSCODE, + input [17:0] QPLL_DRP_FSM, + input [1:0] QPLL_DRP_DONE, + input [1:0] QPLL_DRP_RESET, + input [1:0] QPLL_QPLLLOCK, + input [1:0] QPLL_QPLLOUTCLK, + input [1:0] QPLL_QPLLOUTREFCLK, + output QPLL_QPLLPD, + output [1:0] QPLL_QPLLRESET, + output QPLL_DRP_CLK, + output QPLL_DRP_RST_N, + output QPLL_DRP_OVRD, + output QPLL_DRP_GEN3, + output QPLL_DRP_START, + + //---------- TRANSCEIVER DEBUG ----------------------- + input [ 2:0] PIPE_TXPRBSSEL, // PCLK | PCLK + input [ 2:0] PIPE_RXPRBSSEL, // PCLK | PCLK + input PIPE_TXPRBSFORCEERR, // PCLK | PCLK + input PIPE_RXPRBSCNTRESET, // PCLK | PCLK + input [ 2:0] PIPE_LOOPBACK, // PCLK | PCLK + + output [PCIE_LANE-1:0] PIPE_RXPRBSERR, // PCLK | PCLK + input [PCIE_LANE-1:0] PIPE_TXINHIBIT, // PCLK | PCLK + + //---------- FSM Ports --------------------------------- + output [4:0] PIPE_RST_FSM, // PCLK | PCLK + output [11:0] PIPE_QRST_FSM, // PCLK | PCLK + output [(PCIE_LANE*5)-1:0] PIPE_RATE_FSM, // PCLK | PCLK + output [(PCIE_LANE*6)-1:0] PIPE_SYNC_FSM_TX, // PCLK | PCLK + output [(PCIE_LANE*7)-1:0] PIPE_SYNC_FSM_RX, // PCLK | PCLK + output [(PCIE_LANE*7)-1:0] PIPE_DRP_FSM, // DCLK | DCLK + output [(PCIE_LANE*6)-1:0] PIPE_TXEQ_FSM, // PCLK | PCLK + output [(PCIE_LANE*6)-1:0] PIPE_RXEQ_FSM, // PCLK | PCLK + output [((((PCIE_LANE-1)>>2)+1)*9)-1:0]PIPE_QDRP_FSM, // DCLK | DCLK + + output PIPE_RST_IDLE, // PCLK | PCLK + output PIPE_QRST_IDLE, // PCLK | PCLK + output PIPE_RATE_IDLE, // PCLK | PCLK + + //----------- Channel DRP---------------------------- + output EXT_CH_GT_DRPCLK, + input [(PCIE_LANE*9)-1:0] EXT_CH_GT_DRPADDR, + input [PCIE_LANE-1:0] EXT_CH_GT_DRPEN, + input [(PCIE_LANE*16)-1:0]EXT_CH_GT_DRPDI, + input [PCIE_LANE-1:0] EXT_CH_GT_DRPWE, + + output [(PCIE_LANE*16)-1:0]EXT_CH_GT_DRPDO, + output [PCIE_LANE-1:0] EXT_CH_GT_DRPRDY, + + //---------- JTAG Ports -------------------------------- + input PIPE_JTAG_EN, // DCLK | DCLK + output [PCIE_LANE-1:0] PIPE_JTAG_RDY, // DCLK | DCLK + + //---------- Debug Ports ------------------------------- + output [PCIE_LANE-1:0] PIPE_DEBUG_0, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_1, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_2, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_3, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_4, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_5, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_6, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_7, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_8, // Async | Async + output [PCIE_LANE-1:0] PIPE_DEBUG_9, // Async | Async + output [31:0] PIPE_DEBUG, // Async | Async + + output [(PCIE_LANE*15)-1:0] PIPE_DMONITOROUT // DMONITORCLK + +); + + //---------- Input Registers --------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg reset_n_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg reset_n_reg2; + + //---------- PIPE Clock Module Output ------------------ + wire clk_pclk; + wire clk_rxusrclk; + wire [PCIE_LANE-1:0] clk_rxoutclk; + wire clk_dclk; + wire clk_oobclk; + wire clk_mmcm_lock; + + //---------- PIPE Reset Module Output ------------------ + wire rst_cpllreset; + wire rst_cpllpd; + wire rst_rxusrclk_reset; + wire rst_dclk_reset; + wire rst_gtreset; + wire rst_drp_start; + wire rst_drp_x16x20_mode; + wire rst_drp_x16; + wire rst_userrdy; + wire rst_txsync_start; + wire rst_idle; + wire [4:0] rst_fsm; + + //------------------------------------------------------ + wire gtp_rst_qpllreset; // GTP + wire gtp_rst_qpllpd; // GTP + + //------------------------------------------------------ + wire [(PCIE_LANE-1)>>2:0]qpllreset; + wire qpllpd; + + //---------- QPLL Reset Module Output ------------------ + wire qrst_ovrd; + wire qrst_drp_start; + wire qrst_qpllreset; + wire qrst_qpllpd; + wire qrst_idle; + wire [3:0] qrst_fsm; + + //---------- PIPE_JTAG Master Module Output ------------ + wire [(PCIE_LANE*37)-1:0] jtag_sl_iport; + wire [(PCIE_LANE*17)-1:0] jtag_sl_oport; + + //---------- PIPE User Module Output ------------------- + wire [PCIE_LANE-1:0] gt_txpmareset_i; + wire [PCIE_LANE-1:0] gt_rxpmareset_i; + + wire [PCIE_LANE-1:0] user_oobclk; + wire [PCIE_LANE-1:0] user_resetovrd; + wire [PCIE_LANE-1:0] user_txpmareset; + wire [PCIE_LANE-1:0] user_rxpmareset; + wire [PCIE_LANE-1:0] user_rxcdrreset; + wire [PCIE_LANE-1:0] user_rxcdrfreqreset; + wire [PCIE_LANE-1:0] user_rxdfelpmreset; + wire [PCIE_LANE-1:0] user_eyescanreset; + wire [PCIE_LANE-1:0] user_txpcsreset; + wire [PCIE_LANE-1:0] user_rxpcsreset; + wire [PCIE_LANE-1:0] user_rxbufreset; + wire [PCIE_LANE-1:0] user_resetovrd_done; + wire [PCIE_LANE-1:0] user_active_lane; + wire [PCIE_LANE-1:0] user_resetdone /* synthesis syn_keep=1 */; + wire [PCIE_LANE-1:0] user_rxcdrlock; + wire [PCIE_LANE-1:0] user_rx_converge; + wire [PCIE_LANE-1:0] PIPE_RXEQ_CONVERGE; + + //---------- PIPE Rate Module Output ------------------- + wire [PCIE_LANE-1:0] rate_cpllpd; + wire [PCIE_LANE-1:0] rate_qpllpd; + wire [PCIE_LANE-1:0] rate_cpllreset; + wire [PCIE_LANE-1:0] rate_qpllreset; + wire [PCIE_LANE-1:0] rate_txpmareset; + wire [PCIE_LANE-1:0] rate_rxpmareset; + wire [(PCIE_LANE*2)-1:0] rate_sysclksel; + wire [PCIE_LANE-1:0] rate_pclk_sel; + wire [PCIE_LANE-1:0] rate_drp_start; + wire [PCIE_LANE-1:0] rate_drp_x16x20_mode; + wire [PCIE_LANE-1:0] rate_drp_x16; + wire [PCIE_LANE-1:0] rate_gen3; + wire [(PCIE_LANE*3)-1:0] rate_rate; + wire [PCIE_LANE-1:0] rate_resetovrd_start; + wire [PCIE_LANE-1:0] rate_txsync_start; + wire [PCIE_LANE-1:0] rate_done; + wire [PCIE_LANE-1:0] rate_rxsync_start; + wire [PCIE_LANE-1:0] rate_rxsync; + wire [PCIE_LANE-1:0] rate_idle; + wire [(PCIE_LANE*5)-1:0] rate_fsm; + + //---------- PIPE Sync Module Output ------------------- + wire [PCIE_LANE-1:0] sync_txphdlyreset; + wire [PCIE_LANE-1:0] sync_txphalign; + wire [PCIE_LANE-1:0] sync_txphalignen; + wire [PCIE_LANE-1:0] sync_txphinit; + wire [PCIE_LANE-1:0] sync_txdlybypass; + wire [PCIE_LANE-1:0] sync_txdlysreset; + wire [PCIE_LANE-1:0] sync_txdlyen; + wire [PCIE_LANE-1:0] sync_txsync_done; + wire [(PCIE_LANE*6)-1:0] sync_fsm_tx; + + wire [PCIE_LANE-1:0] sync_rxphalign; + wire [PCIE_LANE-1:0] sync_rxphalignen; + wire [PCIE_LANE-1:0] sync_rxdlybypass; + wire [PCIE_LANE-1:0] sync_rxdlysreset; + wire [PCIE_LANE-1:0] sync_rxdlyen; + wire [PCIE_LANE-1:0] sync_rxddien; + wire [PCIE_LANE-1:0] sync_rxsync_done; + wire [PCIE_LANE-1:0] sync_rxsync_donem; + wire [(PCIE_LANE*7)-1:0] sync_fsm_rx; + + wire [PCIE_LANE-1:0] txdlysresetdone; + wire [PCIE_LANE-1:0] txphaligndone; + wire [PCIE_LANE-1:0] rxdlysresetdone; + wire [PCIE_LANE-1:0] rxphaligndone_s; + + wire txsyncallin; // GTH + wire rxsyncallin; // GTH + + //---------- PIPE DRP Module Output -------------------- + wire [(PCIE_LANE*9)-1:0] drp_addr; + wire [PCIE_LANE-1:0] drp_en; + wire [(PCIE_LANE*16)-1:0]drp_di; + wire [PCIE_LANE-1:0] drp_we; + wire [PCIE_LANE-1:0] drp_done; + wire [(PCIE_LANE*3)-1:0] drp_fsm; + + //---------- PIPE JTAG Slave Module Output-------------- + wire [(PCIE_LANE*17)-1:0]jtag_sl_addr; + wire [PCIE_LANE-1:0] jtag_sl_den; + wire [PCIE_LANE-1:0] jtag_sl_en; + wire [(PCIE_LANE*16)-1:0]jtag_sl_di; + wire [PCIE_LANE-1:0] jtag_sl_we; + + //---------- PIPE DRP MUX Output ----------------------- + wire [(PCIE_LANE*9)-1:0] drp_mux_addr; + wire [PCIE_LANE-1:0] drp_mux_en; + wire [(PCIE_LANE*16)-1:0]drp_mux_di; + wire [PCIE_LANE-1:0] drp_mux_we; + + //---------- PIPE EQ Module Output --------------------- + wire [PCIE_LANE-1:0] eq_txeq_deemph; + wire [(PCIE_LANE*5)-1:0] eq_txeq_precursor; + wire [(PCIE_LANE*7)-1:0] eq_txeq_maincursor; + wire [(PCIE_LANE*5)-1:0] eq_txeq_postcursor; + + wire [PCIE_LANE-1:0] eq_rxeq_adapt_done; + + //---------- PIPE DRP Module Output -------------------- + wire [((((PCIE_LANE-1)>>2)+1)*8)-1:0] qdrp_addr; + wire [(PCIE_LANE-1)>>2:0] qdrp_en; + wire [((((PCIE_LANE-1)>>2)+1)*16)-1:0] qdrp_di; + wire [(PCIE_LANE-1)>>2:0] qdrp_we; + wire [(PCIE_LANE-1)>>2:0] qdrp_done; + wire [(PCIE_LANE-1)>>2:0] qdrp_qpllreset; + wire [((((PCIE_LANE-1)>>2)+1)*6)-1:0] qdrp_crscode; + wire [((((PCIE_LANE-1)>>2)+1)*9)-1:0] qdrp_fsm; + + //---------- QPLL Wrapper Output ----------------------- + wire [(PCIE_LANE-1)>>2:0] qpll_qplloutclk; + wire [(PCIE_LANE-1)>>2:0] qpll_qplloutrefclk; + wire [(PCIE_LANE-1)>>2:0] qpll_qplllock; + wire [((((PCIE_LANE-1)>>2)+1)*16)-1:0] qpll_do; + wire [(PCIE_LANE-1)>>2:0] qpll_rdy; + + //---------- GTX Wrapper Output ------------------------ + wire [PCIE_LANE-1:0] gt_txoutclk; + wire [PCIE_LANE-1:0] gt_rxoutclk; + wire [PCIE_LANE-1:0] gt_cplllock; + wire [PCIE_LANE-1:0] gt_rxcdrlock; + wire [PCIE_LANE-1:0] gt_txresetdone; + wire [PCIE_LANE-1:0] gt_rxresetdone; + wire [PCIE_LANE-1:0] gt_eyescandataerror; + wire [PCIE_LANE-1:0] gt_rxpmaresetdone; + wire [(PCIE_LANE*8)-1:0] gt_rxdisperr; + wire [(PCIE_LANE*8)-1:0] gt_rxnotintable; + wire [PCIE_LANE-1:0] gt_rxvalid; + wire [PCIE_LANE-1:0] gt_phystatus; + wire [(PCIE_LANE*3)-1:0] gt_rxstatus; + wire [(PCIE_LANE*3)-1:0] gt_rxbufstatus; + wire [PCIE_LANE-1:0] gt_rxelecidle; +//#SE, add +//- + wire [PCIE_LANE-1:0] gt_rxelecidle_i; + reg [PCIE_LANE-1:0] gt_rxrcvrdet_c; + wire [PCIE_LANE-1:0] gt_txratedone; + wire [PCIE_LANE-1:0] gt_rxratedone; + wire [(PCIE_LANE*16)-1:0]gt_do; + wire [PCIE_LANE-1:0] gt_rdy; + wire [PCIE_LANE-1:0] gt_txphinitdone; + wire [PCIE_LANE-1:0] gt_txdlysresetdone; + wire [PCIE_LANE-1:0] gt_txphaligndone; + wire [PCIE_LANE-1:0] gt_rxdlysresetdone; + wire [PCIE_LANE:0] gt_rxphaligndone; // Custom width for calculation + wire [PCIE_LANE-1:0] gt_txsyncout; // GTH + wire [PCIE_LANE-1:0] gt_txsyncdone; // GTH + wire [PCIE_LANE-1:0] gt_rxsyncout; // GTH + wire [PCIE_LANE-1:0] gt_rxsyncdone; // GTH + wire [PCIE_LANE-1:0] gt_rxcommadet; + wire [(PCIE_LANE*4)-1:0] gt_rxchariscomma; + wire [PCIE_LANE-1:0] gt_rxbyteisaligned; + wire [PCIE_LANE-1:0] gt_rxbyterealign; + wire [ 4:0] gt_rxchbondi [PCIE_LANE:0]; + wire [(PCIE_LANE*3)-1:0] gt_rxchbondlevel; + wire [ 4:0] gt_rxchbondo [PCIE_LANE:0]; + + wire [PCIE_LANE-1:0] rxchbonden; + wire [PCIE_LANE-1:0] rxchbondmaster; + wire [PCIE_LANE-1:0] rxchbondslave; + wire [PCIE_LANE-1:0] oobclk; + + //---------- TX EQ ------------------------------------- + localparam TXEQ_FS = 6'd40; // TX equalization full swing + localparam TXEQ_LF = 6'd15; // TX equalization low frequency + + //---------- Select JTAG Slave Type ---------------------------------------- + localparam GC_XSDB_SLAVE_TYPE = (PCIE_GT_DEVICE == "GTP") ? 16'h0400 : (PCIE_GT_DEVICE == "GTH") ? 16'h004A : 16'h0046; + + //---------- Generate Per-Lane Signals ----------------- + genvar i; // Index for per-lane signals + + + +//---------- Assignments ------------------------------------------------------- +assign gt_rxchbondo[0] = 5'd0; // Initialize rxchbond for lane 0 +assign gt_rxphaligndone[PCIE_LANE] = 1'd1; // Mot used +assign txsyncallin = &(gt_txphaligndone | (~user_active_lane)); +assign rxsyncallin = &(gt_rxphaligndone | (~user_active_lane)); + +//---------- Reset Synchronizer ------------------------------------------------ +always @ (posedge clk_pclk or negedge PIPE_RESET_N) +begin + + if (!PIPE_RESET_N) + begin + reset_n_reg1 <= 1'd0; + reset_n_reg2 <= 1'd0; + end + else + begin + reset_n_reg1 <= 1'd1; + reset_n_reg2 <= reset_n_reg1; + end +end + + +//---------- PIPE Clock Module ------------------------------------------------- +generate + + begin : pipe_clock_int +pcie_7x_0_pipe_clock # + ( + + .PCIE_ASYNC_EN (PCIE_ASYNC_EN), // PCIe async enable + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_LANE (PCIE_LANE), // PCIe number of lanes + .PCIE_LINK_SPEED (PCIE_LINK_SPEED), // PCIe link speed + .PCIE_REFCLK_FREQ (PCIE_REFCLK_FREQ), // PCIe reference clock frequency + .PCIE_USERCLK1_FREQ (PCIE_USERCLK1_FREQ), // PCIe user clock 1 frequency + .PCIE_USERCLK2_FREQ (PCIE_USERCLK2_FREQ), // PCIe user clock 2 frequency + .PCIE_OOBCLK_MODE (PCIE_OOBCLK_MODE), // PCIe OOB clock mode + .PCIE_DEBUG_MODE (PCIE_DEBUG_MODE) // PCIe debug mode + + ) + pipe_clock_i + ( + + //---------- Input ------------------------------------- + .CLK_CLK (PIPE_CLK), + .CLK_TXOUTCLK (gt_txoutclk[0]), // Reference clock from lane 0 + .CLK_RXOUTCLK_IN (gt_rxoutclk), + //.CLK_RST_N (1'b1), + .CLK_RST_N (PIPE_MMCM_RST_N), // Allow system reset for error recovery + .CLK_PCLK_SEL (rate_pclk_sel), + .CLK_PCLK_SEL_SLAVE (INT_PCLK_SEL_SLAVE ), + .CLK_GEN3 (rate_gen3[0]), + + //---------- Output ------------------------------------ + .CLK_PCLK (clk_pclk), + .CLK_PCLK_SLAVE (INT_PCLK_OUT_SLAVE), + .CLK_RXUSRCLK (clk_rxusrclk), + .CLK_RXOUTCLK_OUT (clk_rxoutclk), + .CLK_DCLK (clk_dclk), + .CLK_USERCLK1 (PIPE_USERCLK1), + .CLK_USERCLK2 (PIPE_USERCLK2), + .CLK_OOBCLK (clk_oobclk), + .CLK_MMCM_LOCK (clk_mmcm_lock) + + ); + + assign INT_RXUSRCLK_OUT = clk_rxusrclk; + assign INT_RXOUTCLK_OUT = clk_rxoutclk; + assign INT_DCLK_OUT = clk_dclk; + assign INT_USERCLK1_OUT = PIPE_USERCLK1; + assign INT_USERCLK2_OUT = PIPE_USERCLK2; + assign INT_OOBCLK_OUT = clk_oobclk; + assign INT_MMCM_LOCK_OUT = clk_mmcm_lock; + end +endgenerate + + + + +//---------- PIPE Reset Module ------------------------------------------------- +generate + + if (PCIE_GT_DEVICE == "GTP") + + begin : gtp_pipe_reset + + //---------- GTP PIPE Reset Module ------------------------------------- +pcie_7x_0_gtp_pipe_reset # + ( + + .PCIE_SIM_SPEEDUP (PCIE_SIM_SPEEDUP), // PCIe sim mode + //.PCIE_PLL_SEL (PCIE_PLL_SEL), // removed for GTP + //.PCIE_POWER_SAVING (PCIE_POWER_SAVING), // removed for GTP + //.PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_LANE (PCIE_LANE) // PCIe number of lanes + + ) + gtp_pipe_reset_i + ( + + //---------- Input ----------------------------- + .RST_CLK (clk_pclk), + .RST_RXUSRCLK (clk_rxusrclk), + .RST_DCLK (clk_dclk), + .RST_RST_N (reset_n_reg2), + .RST_DRP_DONE (drp_done), + .RST_RXPMARESETDONE (gt_rxpmaresetdone), + .RST_PLLLOCK (&qpll_qplllock), + //.RST_QPLL_IDLE (qrst_idle), // removed for GTP + .RST_RATE_IDLE (rate_idle), + .RST_RXCDRLOCK (user_rxcdrlock), + .RST_MMCM_LOCK (clk_mmcm_lock), + .RST_RESETDONE (user_resetdone), + .RST_PHYSTATUS (gt_phystatus), + .RST_TXSYNC_DONE (sync_txsync_done), + + //---------- Output ---------------------------- + .RST_CPLLRESET (rst_cpllreset), + .RST_CPLLPD (rst_cpllpd), + .RST_RXUSRCLK_RESET (rst_rxusrclk_reset), + .RST_DCLK_RESET (rst_dclk_reset), + .RST_GTRESET (rst_gtreset), + .RST_DRP_START (rst_drp_start), + .RST_DRP_X16 (rst_drp_x16), + .RST_USERRDY (rst_userrdy), + .RST_TXSYNC_START (rst_txsync_start), + .RST_IDLE (rst_idle), + .RST_FSM (rst_fsm) + + ); + + //---------- Default --------------------------------------------------- + assign gtp_rst_qpllreset = rst_cpllreset; + assign gtp_rst_qpllpd = rst_cpllpd; + + end + + else + + begin : pipe_reset + + //---------- PIPE Reset Module ----------------------------------------- +pcie_7x_0_pipe_reset # + ( + + .PCIE_SIM_SPEEDUP (PCIE_SIM_SPEEDUP), // PCIe sim mode + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT Device + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_POWER_SAVING (PCIE_POWER_SAVING), // PCIe power saving + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_LANE (PCIE_LANE) // PCIe number of lanes + + ) + pipe_reset_i + ( + + //---------- Input ----------------------------- + .RST_CLK (clk_pclk), + .RST_RXUSRCLK (clk_rxusrclk), + .RST_DCLK (clk_dclk), + .RST_RST_N (reset_n_reg2), + .RST_DRP_DONE (drp_done), + .RST_RXPMARESETDONE (gt_rxpmaresetdone), + .RST_CPLLLOCK (gt_cplllock), + .RST_QPLL_IDLE (qrst_idle), + .RST_RATE_IDLE (rate_idle), + .RST_RXCDRLOCK (user_rxcdrlock), + .RST_MMCM_LOCK (clk_mmcm_lock), + .RST_RESETDONE (user_resetdone), + .RST_PHYSTATUS (gt_phystatus), + .RST_TXSYNC_DONE (sync_txsync_done), + + //---------- Output ---------------------------- + .RST_CPLLRESET (rst_cpllreset), + .RST_CPLLPD (rst_cpllpd), + .RST_RXUSRCLK_RESET (rst_rxusrclk_reset), + .RST_DCLK_RESET (rst_dclk_reset), + .RST_GTRESET (rst_gtreset), + .RST_DRP_START (rst_drp_start), + .RST_DRP_X16X20_MODE (rst_drp_x16x20_mode), + .RST_DRP_X16 (rst_drp_x16), + .RST_USERRDY (rst_userrdy), + .RST_TXSYNC_START (rst_txsync_start), + .RST_IDLE (rst_idle), + .RST_FSM (rst_fsm[4:0]) + + ); + + //---------- Default --------------------------------------------------- + assign gtp_rst_qpllreset = 1'd0; + assign gtp_rst_qpllpd = 1'd0; + + end + +endgenerate + + + +//---------- QPLL Reset Module ------------------------------------------------- +generate + + if ((PCIE_LINK_SPEED == 3) || (PCIE_PLL_SEL == "QPLL")) + + begin : qpll_reset + +pcie_7x_0_qpll_reset # + ( + + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_POWER_SAVING (PCIE_POWER_SAVING),// PCIe power saving + .PCIE_LANE (PCIE_LANE) // PCIe number of lanes + + ) + qpll_reset_i + ( + + //---------- Input --------------------------------- + .QRST_CLK (clk_pclk), + .QRST_RST_N (reset_n_reg2), + .QRST_MMCM_LOCK (clk_mmcm_lock), + .QRST_CPLLLOCK (gt_cplllock), + .QRST_DRP_DONE (qdrp_done), + .QRST_QPLLLOCK (qpll_qplllock), + .QRST_RATE (PIPE_RATE), + .QRST_QPLLRESET_IN (rate_qpllreset), + .QRST_QPLLPD_IN (rate_qpllpd), + + //---------- Output -------------------------------- + .QRST_OVRD (qrst_ovrd), + .QRST_DRP_START (qrst_drp_start), + .QRST_QPLLRESET_OUT (qrst_qpllreset), + .QRST_QPLLPD_OUT (qrst_qpllpd), + .QRST_IDLE (qrst_idle), + .QRST_FSM (qrst_fsm) + + ); + + end + + else + + //---------- QPLL Reset Defaults --------------------------------------- + begin : qpll_reset_disable + assign qrst_ovrd = 1'd0; + assign qrst_drp_start = 1'd0; + assign qrst_qpllreset = 1'd0; + assign qrst_qpllpd = 1'd0; + assign qrst_idle = 1'd0; + assign qrst_fsm = 1; + end + +endgenerate + +assign jtag_sl_iport = {PCIE_LANE{37'd0}}; + +//Reference Clock for CPLLPD Fix + +wire gt_cpllpdrefclk; + +BUFG cpllpd_refclk_inst (.I (PIPE_CLK), .O (gt_cpllpdrefclk)); + +//---------- Generate PIPE Lane ------------------------------------------------ +generate for (i=0; i>2]) // removed for GTP + //.RATE_MMCM_LOCK (clk_mmcm_lock), // removed for GTP + .RATE_DRP_DONE (drp_done[i]), + .RATE_RXPMARESETDONE (gt_rxpmaresetdone[i]), + //.RATE_TXRESETDONE (gt_txresetdone[i]), // removed for GTP + //.RATE_RXRESETDONE (gt_rxresetdone[i]), // removed for GTP + .RATE_TXRATEDONE (gt_txratedone[i]), + .RATE_RXRATEDONE (gt_rxratedone[i]), + .RATE_PHYSTATUS (gt_phystatus[i]), + //.RATE_RESETOVRD_DONE (user_resetovrd_done[i]), // removed for GTP + .RATE_TXSYNC_DONE (sync_txsync_done[i]), + //.RATE_RXSYNC_DONE (sync_rxsync_done[i]), // removed for GTP + + //---------- Output ---------------------------- + //.RATE_CPLLPD (rate_cpllpd[i]), // removed for GTP + //.RATE_QPLLPD (rate_qpllpd[i]), // removed for GTP + //.RATE_CPLLRESET (rate_cpllreset[i]), // removed for GTP + //.RATE_QPLLRESET (rate_qpllreset[i]), // removed for GTP + //.RATE_TXPMARESET (rate_txpmareset[i]), // removed for GTP + //.RATE_RXPMARESET (rate_rxpmareset[i]), // removed for GTP + //.RATE_SYSCLKSEL (rate_sysclksel[(2*i)+1:(2*i)]), // removed for GTP + .RATE_DRP_START (rate_drp_start[i]), + .RATE_DRP_X16 (rate_drp_x16[i]), + .RATE_PCLK_SEL (rate_pclk_sel[i]), + //.RATE_GEN3 (rate_gen3[i]), // removed for GTP + .RATE_RATE_OUT (rate_rate[(3*i)+2:(3*i)]), + //.RATE_RESETOVRD_START (rate_resetovrd_start[i]), // removed for GTP + .RATE_TXSYNC_START (rate_txsync_start[i]), + .RATE_DONE (rate_done[i]), + //.RATE_RXSYNC_START (rate_rxsync_start[i]), // removed for GTP + //.RATE_RXSYNC (rate_rxsync[i]), // removed for GTP + .RATE_IDLE (rate_idle[i]), + .RATE_FSM (rate_fsm[(5*i)+4:(5*i)]) + ); + + //---------- Default for GTP ----------------------- + assign rate_cpllpd[i] = 1'd0; + assign rate_qpllpd[i] = 1'd0; + assign rate_cpllreset[i] = 1'd0; + assign rate_qpllreset[i] = 1'd0; + assign rate_txpmareset[i] = 1'd0; + assign rate_rxpmareset[i] = 1'd0; + assign rate_sysclksel[(2*i)+1:(2*i)] = 2'b0; + assign rate_gen3[i] = 1'd0; + assign rate_resetovrd_start[i] = 1'd0; + assign rate_rxsync_start[i] = 1'd0; + assign rate_rxsync[i] = 1'd0; + + end + + else + + begin : pipe_rate + + //---------- PIPE Rate Module ---------------------------------------------- +pcie_7x_0_pipe_rate # + ( + + .PCIE_SIM_SPEEDUP (PCIE_SIM_SPEEDUP), // PCIe sim speedup + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_POWER_SAVING (PCIE_POWER_SAVING),// PCIe power saving + .PCIE_ASYNC_EN (PCIE_ASYNC_EN), // PCIe async enable + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_RXBUF_EN (PCIE_RXBUF_EN) // PCIe RX buffer enable for Gen3 only + + ) + pipe_rate_i + ( + + //---------- Input --------------------------------- + .RATE_CLK (clk_pclk), + .RATE_RST_N (!rst_cpllreset), + .RATE_RST_IDLE (rst_idle), + .RATE_ACTIVE_LANE (user_active_lane[i]), + .RATE_RATE_IN (PIPE_RATE), + .RATE_CPLLLOCK (gt_cplllock[i]), + .RATE_QPLLLOCK (qpll_qplllock[i>>2]), + .RATE_MMCM_LOCK (clk_mmcm_lock), + .RATE_DRP_DONE (drp_done[i]), + .RATE_RXPMARESETDONE (gt_rxpmaresetdone[i]), + .RATE_TXRESETDONE (gt_txresetdone[i]), + .RATE_RXRESETDONE (gt_rxresetdone[i]), + .RATE_TXRATEDONE (gt_txratedone[i]), + .RATE_RXRATEDONE (gt_rxratedone[i]), + .RATE_PHYSTATUS (gt_phystatus[i]), + .RATE_RESETOVRD_DONE (user_resetovrd_done[i]), + .RATE_TXSYNC_DONE (sync_txsync_done[i]), + .RATE_RXSYNC_DONE (sync_rxsync_done[i]), + + //---------- Output -------------------------------- + .RATE_CPLLPD (rate_cpllpd[i]), + .RATE_QPLLPD (rate_qpllpd[i]), + .RATE_CPLLRESET (rate_cpllreset[i]), + .RATE_QPLLRESET (rate_qpllreset[i]), + .RATE_TXPMARESET (rate_txpmareset[i]), + .RATE_RXPMARESET (rate_rxpmareset[i]), + .RATE_SYSCLKSEL (rate_sysclksel[(2*i)+1:(2*i)]), + .RATE_DRP_START (rate_drp_start[i]), + .RATE_DRP_X16X20_MODE (rate_drp_x16x20_mode[i]), + .RATE_DRP_X16 (rate_drp_x16[i]), + .RATE_PCLK_SEL (rate_pclk_sel[i]), + .RATE_GEN3 (rate_gen3[i]), + .RATE_RATE_OUT (rate_rate[(3*i)+2:(3*i)]), + .RATE_RESETOVRD_START (rate_resetovrd_start[i]), + .RATE_TXSYNC_START (rate_txsync_start[i]), + .RATE_DONE (rate_done[i]), + .RATE_RXSYNC_START (rate_rxsync_start[i]), + .RATE_RXSYNC (rate_rxsync[i]), + .RATE_IDLE (rate_idle[i]), + .RATE_FSM (rate_fsm[(5*i)+4:(5*i)]) + + ); + + end + + + + //---------- PIPE Sync Module ---------------------------------------------- +pcie_7x_0_pipe_sync # + ( + + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT Device + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_RXBUF_EN (PCIE_RXBUF_EN), // PCIe RX buffer enable for Gen3 only + .PCIE_TXSYNC_MODE (PCIE_TXSYNC_MODE), // PCIe TX sync mode + .PCIE_RXSYNC_MODE (PCIE_RXSYNC_MODE), // PCIe RX sync mode + .PCIE_LANE (PCIE_LANE), // PCIe lane + .PCIE_LINK_SPEED (PCIE_LINK_SPEED) // PCIe link speed + + ) + pipe_sync_i + ( + + //---------- Input --------------------------------- + .SYNC_CLK (clk_pclk), + .SYNC_RST_N (!rst_cpllreset), + .SYNC_SLAVE (i > 0), + .SYNC_GEN3 (rate_gen3[i]), + .SYNC_RATE_IDLE (rate_idle[i]), + .SYNC_MMCM_LOCK (clk_mmcm_lock), +//#SE, mod +// .SYNC_RXELECIDLE (gt_rxelecidle[i]), + .SYNC_RXELECIDLE (gt_rxelecidle_i[i]), + .SYNC_RXCDRLOCK (user_rxcdrlock[i]), + .SYNC_ACTIVE_LANE (user_active_lane[i]), + + .SYNC_TXSYNC_START (rate_txsync_start[i] || rst_txsync_start), + .SYNC_TXPHINITDONE (&(gt_txphinitdone | (~user_active_lane))), + .SYNC_TXDLYSRESETDONE (txdlysresetdone[i]), + .SYNC_TXPHALIGNDONE (txphaligndone[i]), + .SYNC_TXSYNCDONE (gt_txsyncdone[i]), // GTH + + .SYNC_RXSYNC_START (rate_rxsync_start[i]), + .SYNC_RXDLYSRESETDONE (rxdlysresetdone[i]), + .SYNC_RXPHALIGNDONE_M (gt_rxphaligndone[0]), + .SYNC_RXPHALIGNDONE_S (rxphaligndone_s[i]), + .SYNC_RXSYNC_DONEM_IN (sync_rxsync_donem[0]), + .SYNC_RXSYNCDONE (gt_rxsyncdone[i]), // GTH + + //---------- Output -------------------------------- + .SYNC_TXPHDLYRESET (sync_txphdlyreset[i]), + .SYNC_TXPHALIGN (sync_txphalign[i]), + .SYNC_TXPHALIGNEN (sync_txphalignen[i]), + .SYNC_TXPHINIT (sync_txphinit[i]), + .SYNC_TXDLYBYPASS (sync_txdlybypass[i]), + .SYNC_TXDLYSRESET (sync_txdlysreset[i]), + .SYNC_TXDLYEN (sync_txdlyen[i]), + .SYNC_TXSYNC_DONE (sync_txsync_done[i]), + .SYNC_FSM_TX (sync_fsm_tx[(6*i)+5:(6*i)]), + + .SYNC_RXPHALIGN (sync_rxphalign[i]), + .SYNC_RXPHALIGNEN (sync_rxphalignen[i]), + .SYNC_RXDLYBYPASS (sync_rxdlybypass[i]), + .SYNC_RXDLYSRESET (sync_rxdlysreset[i]), + .SYNC_RXDLYEN (sync_rxdlyen[i]), + .SYNC_RXDDIEN (sync_rxddien[i]), + .SYNC_RXSYNC_DONEM_OUT (sync_rxsync_donem[i]), + .SYNC_RXSYNC_DONE (sync_rxsync_done[i]), + .SYNC_FSM_RX (sync_fsm_rx[(7*i)+6:(7*i)]) + + ); + + //---------- PIPE Sync Assignments ----------------------------------------- + assign txdlysresetdone[i] = (PCIE_TXSYNC_MODE == 1) ? gt_txdlysresetdone[i] : >_txdlysresetdone; + assign txphaligndone[i] = (PCIE_TXSYNC_MODE == 1) ? gt_txphaligndone[i] : &(gt_txphaligndone | (~user_active_lane)); + assign rxdlysresetdone[i] = (PCIE_RXSYNC_MODE == 1) ? gt_rxdlysresetdone[i] : >_rxdlysresetdone; + assign rxphaligndone_s[i] = (PCIE_LANE == 1) ? 1'd0 : >_rxphaligndone[PCIE_LANE:1]; + + + //---------- GTP PIPE DRP Module ------------------------------------------- + if (PCIE_GT_DEVICE == "GTP") + + begin : gtp_pipe_drp + + //---------- GTP PIPE DRP Module --------------------------------------- +pcie_7x_0_gtp_pipe_drp + gtp_pipe_drp_i + ( + + //---------- Input --------------------------------- + .DRP_CLK (clk_dclk), + .DRP_RST_N (!rst_dclk_reset), + .DRP_X16 (rst_drp_x16 || rate_drp_x16[i]), + .DRP_START (rst_drp_start || rate_drp_start[i]), + .DRP_DO (gt_do[(16*i)+15:(16*i)]), + .DRP_RDY (gt_rdy[i]), + + //---------- Output -------------------------------- + .DRP_ADDR (drp_addr[(9*i)+8:(9*i)]), + .DRP_EN (drp_en[i]), + .DRP_DI (drp_di[(16*i)+15:(16*i)]), + .DRP_WE (drp_we[i]), + .DRP_DONE (drp_done[i]), + .DRP_FSM (drp_fsm[(3*i)+2:(3*i)]) + + ); + + end + + else + + begin : pipe_drp + + //---------- PIPE DRP Module ------------------------------------------- +pcie_7x_0_pipe_drp # + ( + + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_AUX_CDR_GEN3_EN (PCIE_AUX_CDR_GEN3_EN), // PCIe AUX CDR Gen3 enable + .PCIE_ASYNC_EN (PCIE_ASYNC_EN), // PCIe async enable + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_RXBUF_EN (PCIE_RXBUF_EN), // PCIe RX buffer enable for Gen3 only + .PCIE_TXSYNC_MODE (PCIE_TXSYNC_MODE), // PCIe TX sync mode + .PCIE_RXSYNC_MODE (PCIE_RXSYNC_MODE) // PCIe RX sync mode + + ) + pipe_drp_i + ( + + //---------- Input --------------------------------- + .DRP_CLK (clk_dclk), + .DRP_RST_N (!rst_dclk_reset), + .DRP_GTXRESET (rst_gtreset), + .DRP_RATE (PIPE_RATE), + .DRP_X16X20_MODE (rst_drp_x16x20_mode || rate_drp_x16x20_mode[i]), + .DRP_X16 (rst_drp_x16 || rate_drp_x16[i]), + .DRP_START (rst_drp_start || rate_drp_start[i]), + .DRP_DO (gt_do[(16*i)+15:(16*i)]), + .DRP_RDY (gt_rdy[i]), + + //---------- Output -------------------------------- + .DRP_ADDR (drp_addr[(9*i)+8:(9*i)]), + .DRP_EN (drp_en[i]), + .DRP_DI (drp_di[(16*i)+15:(16*i)]), + .DRP_WE (drp_we[i]), + .DRP_DONE (drp_done[i]), + .DRP_FSM (drp_fsm[(3*i)+2:(3*i)]) + + ); + + end + + + assign jtag_sl_oport[((i+1)*17)-1 : (i*17)] = 17'd0; + assign jtag_sl_addr[(17*i)+16:(17*i)] = 17'd0; + assign jtag_sl_den[i] = 1'd0; + assign jtag_sl_di[(16*i)+15:(16*i)] = 16'd0; + assign jtag_sl_we[i] = 1'd0; + + //---------- Generate DRP MUX ---------------------------------------------- + assign PIPE_JTAG_RDY[i] = (drp_fsm[(3*i)+2:(3*i)] == 3'b000); + assign jtag_sl_en[i] = (jtag_sl_addr[(17*i)+16:(17*i)+9] == 8'd0) ? jtag_sl_den[i] : 1'd0; + + // Channel DRP + assign drp_mux_en[i] = (PIPE_JTAG_RDY[i] && EXT_CH_GT_DRP) ? EXT_CH_GT_DRPEN[i] : drp_en[i]; + assign drp_mux_di[(16*i)+15:(16*i)] = (PIPE_JTAG_RDY[i] && EXT_CH_GT_DRP) ? EXT_CH_GT_DRPDI[(16*i)+15:(16*i)] : drp_di[(16*i)+15:(16*i)]; + assign drp_mux_addr[(9*i)+8:(9*i)] = (PIPE_JTAG_RDY[i] && EXT_CH_GT_DRP) ? EXT_CH_GT_DRPADDR[(9*i)+8:(9*i)] : drp_addr[(9*i)+8:(9*i)]; + assign drp_mux_we[i] = (PIPE_JTAG_RDY[i] && EXT_CH_GT_DRP) ? EXT_CH_GT_DRPWE[i] : drp_we[i]; + + //---------- Generate PIPE EQ ---------------------------------------------- + if (PCIE_LINK_SPEED == 3) + + begin : pipe_eq + + //---------- PIPE EQ Module -------------------------------------------- +pcie_7x_0_pipe_eq # + ( + .PCIE_SIM_MODE (PCIE_SIM_MODE), // PCIe sim mode + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), + .PCIE_RXEQ_MODE_GEN3 (PCIE_RXEQ_MODE_GEN3) // PCIe RX equalization mode + ) + pipe_eq_i + ( + + //---------- Input ----------------------------- + .EQ_CLK (clk_pclk), + .EQ_RST_N (!rst_cpllreset), + .EQ_GEN3 (rate_gen3[i]), + + .EQ_TXEQ_CONTROL (PIPE_TXEQ_CONTROL[(2*i)+1:(2*i)]), + .EQ_TXEQ_PRESET (PIPE_TXEQ_PRESET[(4*i)+3:(4*i)]), + .EQ_TXEQ_PRESET_DEFAULT (PIPE_TXEQ_PRESET_DEFAULT[(4*i)+3:(4*i)]), + .EQ_TXEQ_DEEMPH_IN (PIPE_TXEQ_DEEMPH[(6*i)+5:(6*i)]), // renamed + + .EQ_RXEQ_CONTROL (PIPE_RXEQ_CONTROL[(2*i)+1:(2*i)]), + .EQ_RXEQ_PRESET (PIPE_RXEQ_PRESET[(3*i)+2:(3*i)]), + .EQ_RXEQ_LFFS (PIPE_RXEQ_LFFS[(6*i)+5:(6*i)]), + .EQ_RXEQ_TXPRESET (PIPE_RXEQ_TXPRESET[(4*i)+3:(4*i)]), + .EQ_RXEQ_USER_EN (PIPE_RXEQ_USER_EN[i]), + .EQ_RXEQ_USER_TXCOEFF (PIPE_RXEQ_USER_TXCOEFF[(18*i)+17:(18*i)]), + .EQ_RXEQ_USER_MODE (PIPE_RXEQ_USER_MODE[i]), + + //---------- Output ---------------------------- + .EQ_TXEQ_DEEMPH (eq_txeq_deemph[i]), + .EQ_TXEQ_PRECURSOR (eq_txeq_precursor[(5*i)+4:(5*i)]), + .EQ_TXEQ_MAINCURSOR (eq_txeq_maincursor[(7*i)+6:(7*i)]), + .EQ_TXEQ_POSTCURSOR (eq_txeq_postcursor[(5*i)+4:(5*i)]), + .EQ_TXEQ_DEEMPH_OUT (PIPE_TXEQ_COEFF[(18*i)+17:(18*i)]),// renamed + .EQ_TXEQ_DONE (PIPE_TXEQ_DONE[i]), + .EQ_TXEQ_FSM (PIPE_TXEQ_FSM[(6*i)+5:(6*i)]), + + .EQ_RXEQ_NEW_TXCOEFF (PIPE_RXEQ_NEW_TXCOEFF[(18*i)+17:(18*i)]), + .EQ_RXEQ_LFFS_SEL (PIPE_RXEQ_LFFS_SEL[i]), + .EQ_RXEQ_ADAPT_DONE (eq_rxeq_adapt_done[i]), + .EQ_RXEQ_DONE (PIPE_RXEQ_DONE[i]), + .EQ_RXEQ_FSM (PIPE_RXEQ_FSM[(6*i)+5:(6*i)]) + + ); + + end + + else + + //---------- PIPE EQ Defaults ------------------------------------------ + begin : pipe_eq_disable + assign eq_txeq_deemph[i] = 1'd0; + assign eq_txeq_precursor[(5*i)+4:(5*i)] = 5'h00; + assign eq_txeq_maincursor[(7*i)+6:(7*i)] = 7'h00; + assign eq_txeq_postcursor[(5*i)+4:(5*i)] = 5'h00; + assign eq_rxeq_adapt_done[i] = 1'd0; + assign PIPE_TXEQ_COEFF[(18*i)+17:(18*i)] = 18'd0; + assign PIPE_TXEQ_DONE[i] = 1'd0; + assign PIPE_TXEQ_FSM[(6*i)+5:(6*i)] = 6'd0; + + assign PIPE_RXEQ_NEW_TXCOEFF[(18*i)+17:(18*i)] = 18'd0; + assign PIPE_RXEQ_LFFS_SEL[i] = 1'd0; + assign PIPE_RXEQ_ADAPT_DONE[i] = 1'd0; + assign PIPE_RXEQ_DONE[i] = 1'd0; + assign PIPE_RXEQ_FSM[(6*i)+5:(6*i)] = 6'd0; + end + + //---------- Generate PIPE Common Per Quad for Gen3 ------------------------ + if ((i%4)==0) + + begin : pipe_quad + + //---------- Generate QPLL Powerdown and Reset ------------------------- + assign qpllpd = (PCIE_GT_DEVICE == "GTP") ? gtp_rst_qpllpd : qrst_qpllpd; + assign qpllreset[i>>2] = (PCIE_GT_DEVICE == "GTP") ? gtp_rst_qpllreset : (qrst_qpllreset || qdrp_qpllreset[i>>2]); + + if ((PCIE_LINK_SPEED == 3) || (PCIE_PLL_SEL == "QPLL") || (PCIE_GT_DEVICE == "GTP")) + + begin : gt_common_enabled + + if (PCIE_EXT_GT_COMMON == "FALSE") + + begin : gt_common_int + + //---------- GT COMMON INTERNAL Module --------------------------------------- +pcie_7x_0_gt_common # + ( + + .PCIE_SIM_MODE (PCIE_SIM_MODE), // PCIe sim mode + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_REFCLK_FREQ (PCIE_REFCLK_FREQ) // PCIe reference clock frequency + + ) + gt_common_i + ( + + //---------- Input ------------------------- + .CPLLPDREFCLK (gt_cpllpdrefclk), + .PIPE_CLK (PIPE_CLK), + .QPLL_QPLLPD (qpllpd), + .QPLL_QPLLRESET (qpllreset[i>>2]), + .QPLL_DRP_CLK (clk_dclk), + .QPLL_DRP_RST_N (rst_dclk_reset), + .QPLL_DRP_OVRD (qrst_ovrd), + .QPLL_DRP_GEN3 (&rate_gen3), + .QPLL_DRP_START (qrst_drp_start), + + .QPLL_DRP_CRSCODE (qdrp_crscode[(6*(i>>2))+5:(6*(i>>2))]), + .QPLL_DRP_FSM (qdrp_fsm[(9*(i>>2))+8:(9*(i>>2))]), + .QPLL_DRP_DONE (qdrp_done[i>>2]), + .QPLL_DRP_RESET (qdrp_qpllreset[i>>2]), + .QPLL_QPLLOUTCLK (qpll_qplloutclk[i>>2]), + .QPLL_QPLLOUTREFCLK (qpll_qplloutrefclk[i>>2]), + .QPLL_QPLLLOCK (qpll_qplllock[i>>2]) + ); + assign QPLL_QPLLPD = 1'b0; + assign QPLL_QPLLRESET[i>>2] = 1'b0; + assign QPLL_DRP_CLK = 1'b0; + assign QPLL_DRP_RST_N = 1'b0; + assign QPLL_DRP_OVRD = 1'b0; + assign QPLL_DRP_GEN3 = 1'b0; + assign QPLL_DRP_START = 1'b0; + assign INT_QPLLLOCK_OUT[i>>2] = qpll_qplllock[i>>2] ; + assign INT_QPLLOUTREFCLK_OUT[i>>2] = qpll_qplloutrefclk[i>>2]; + assign INT_QPLLOUTCLK_OUT[i>>2] = qpll_qplloutclk[i>>2]; + end + else + begin : gt_common_ext + assign qdrp_done[i>>2] = QPLL_DRP_DONE[i>>2]; + assign qdrp_qpllreset[i>>2] = QPLL_DRP_RESET[i>>2]; + assign qdrp_crscode[(6*(i>>2))+5:(6*(i>>2))] = QPLL_DRP_CRSCODE[(6*(i>>2))+5:(6*(i>>2))]; + assign qdrp_fsm[(9*(i>>2))+8:(9*(i>>2))] = QPLL_DRP_FSM[(9*(i>>2))+8:(9*(i>>2))]; + assign qpll_qplloutclk[i>>2] = QPLL_QPLLOUTCLK[i>>2]; + assign qpll_qplloutrefclk[i>>2] = QPLL_QPLLOUTREFCLK[i>>2]; + assign qpll_qplllock[i>>2] = QPLL_QPLLLOCK[i>>2]; + assign QPLL_QPLLPD = qpllpd; + assign QPLL_QPLLRESET[i>>2] = qpllreset[i>>2]; + assign QPLL_DRP_CLK = clk_dclk; + assign QPLL_DRP_RST_N = rst_dclk_reset; + assign QPLL_DRP_OVRD = qrst_ovrd; + assign QPLL_DRP_GEN3 = &rate_gen3; + assign QPLL_DRP_START = qrst_drp_start; + assign INT_QPLLLOCK_OUT[i>>2] = 1'b0; + assign INT_QPLLOUTCLK_OUT[i>>2] = 1'b0; + assign INT_QPLLOUTREFCLK_OUT[i>>2] = 1'b0; + end + end + else + + //---------- PIPE Common Defaults ---------------------------------- + begin : gt_common_disabled + assign qdrp_done[i>>2] = 1'd0; + assign qdrp_crscode[(6*(i>>2))+5:(6*(i>>2))] = 6'd0; + assign qdrp_fsm[(9*(i>>2))+8:(9*(i>>2))] = 9'd0; + assign qpll_qplloutclk[i>>2] = 1'd0; + assign qpll_qplloutrefclk[i>>2] = 1'd0; + assign qpll_qplllock[i>>2] = 1'd0; + assign QPLL_QPLLPD = 1'b0; + assign QPLL_QPLLRESET[i>>2] = 1'b0; + assign QPLL_DRP_CLK = 1'b0; + assign QPLL_DRP_RST_N = 1'b0; + assign QPLL_DRP_OVRD = 1'b0; + assign QPLL_DRP_GEN3 = 1'b0; + assign QPLL_DRP_START = 1'b0; + assign INT_QPLLLOCK_OUT[i>>2] = 1'b0; + assign INT_QPLLOUTCLK_OUT[i>>2] = 1'b0; + assign INT_QPLLOUTREFCLK_OUT[i>>2] = 1'b0; + end + end + + //---------- GT Wrapper ---------------------------------------------------- + assign gt_txpmareset_i[i] = (user_txpmareset[i] || rate_txpmareset[i]); + assign gt_rxpmareset_i[i] = (user_rxpmareset[i] || rate_rxpmareset[i]); + +pcie_7x_0_gt_wrapper # + ( + + .PCIE_SIM_MODE (PCIE_SIM_MODE), // PCIe sim mode + .PCIE_SIM_SPEEDUP (PCIE_SIM_SPEEDUP), // PCIe sim speedup + .PCIE_SIM_TX_EIDLE_DRIVE_LEVEL (PCIE_SIM_TX_EIDLE_DRIVE_LEVEL), // PCIe sim TX electrical idle drive level + .PCIE_GT_DEVICE (PCIE_GT_DEVICE), // PCIe GT device + .PCIE_USE_MODE (PCIE_USE_MODE), // PCIe use mode + .PCIE_PLL_SEL (PCIE_PLL_SEL), // PCIe PLL select for Gen1/Gen2 only + .PCIE_LPM_DFE (PCIE_LPM_DFE), // PCIe LPM or DFE mode for Gen1/Gen2 only + .PCIE_LPM_DFE_GEN3 (PCIE_LPM_DFE_GEN3), // PCIe LPM or DFE mode for Gen3 only + .PCIE_ASYNC_EN (PCIE_ASYNC_EN), // PCIe async enable + .PCIE_TXBUF_EN (PCIE_TXBUF_EN), // PCIe TX buffer enable for Gen1/Gen2 only + .PCIE_TXSYNC_MODE (PCIE_TXSYNC_MODE), // PCIe TX sync mode + .PCIE_RXSYNC_MODE (PCIE_RXSYNC_MODE), // PCIe RX sync mode + .PCIE_CHAN_BOND (PCIE_CHAN_BOND), // PCIe Channel bonding mode + .PCIE_CHAN_BOND_EN (PCIE_CHAN_BOND_EN), // PCIe Channel bonding enable for Gen1/Gen2 only + .PCIE_LANE (PCIE_LANE), // PCIe number of lane + .PCIE_REFCLK_FREQ (PCIE_REFCLK_FREQ), // PCIe reference clock frequency + .PCIE_TX_EIDLE_ASSERT_DELAY (PCIE_TX_EIDLE_ASSERT_DELAY), // PCIe TX electrical idle assert delay + .PCIE_OOBCLK_MODE (PCIE_OOBCLK_MODE), // PCIe OOB clock mode + .TX_MARGIN_FULL_0 (TX_MARGIN_FULL_0), + .TX_MARGIN_FULL_1 (TX_MARGIN_FULL_1), + .TX_MARGIN_FULL_2 (TX_MARGIN_FULL_2), + .TX_MARGIN_FULL_3 (TX_MARGIN_FULL_3), + .TX_MARGIN_FULL_4 (TX_MARGIN_FULL_4), + .TX_MARGIN_LOW_0 (TX_MARGIN_LOW_0), + .TX_MARGIN_LOW_1 (TX_MARGIN_LOW_1), + .TX_MARGIN_LOW_2 (TX_MARGIN_LOW_2), + .TX_MARGIN_LOW_3 (TX_MARGIN_LOW_3), + .TX_MARGIN_LOW_4 (TX_MARGIN_LOW_4), + + .PCIE_DEBUG_MODE (PCIE_DEBUG_MODE) // PCIe debug mode + ) + gt_wrapper_i + ( + + //---------- GT User Ports ------------------------- + .GT_MASTER (i == 0), + .GT_GEN3 (rate_gen3[i]), + .GT_RX_CONVERGE (&user_rx_converge), + + //---------- GT Clock Ports ------------------------ + .GT_GTREFCLK0 (PIPE_CLK), + .GT_QPLLCLK (qpll_qplloutclk[i>>2]), + .GT_QPLLREFCLK (qpll_qplloutrefclk[i>>2]), + .GT_TXUSRCLK (clk_pclk), + .GT_RXUSRCLK (clk_rxusrclk), + .GT_TXUSRCLK2 (clk_pclk), + .GT_RXUSRCLK2 (clk_rxusrclk), + .GT_OOBCLK (oobclk[i]), + .GT_TXSYSCLKSEL (rate_sysclksel[(2*i)+1:(2*i)]), + .GT_RXSYSCLKSEL (rate_sysclksel[(2*i)+1:(2*i)]), + .GT_CPLLPDREFCLK (gt_cpllpdrefclk), + + .GT_TXOUTCLK (gt_txoutclk[i]), + .GT_RXOUTCLK (gt_rxoutclk[i]), + .GT_CPLLLOCK (gt_cplllock[i]), + .GT_RXCDRLOCK (gt_rxcdrlock[i]), + + //---------- GT Reset Ports ------------------------ + .GT_CPLLPD (rst_cpllpd || rate_cpllpd[i]), + .GT_CPLLRESET (rst_cpllreset || rate_cpllreset[i]), + .GT_TXUSERRDY (rst_userrdy), + .GT_RXUSERRDY (rst_userrdy), + .GT_RESETOVRD (user_resetovrd[i]), + .GT_GTTXRESET (rst_gtreset), + .GT_GTRXRESET (rst_gtreset), + .GT_TXPMARESET (gt_txpmareset_i[i]), // (user_txpmareset[i] || rate_txpmareset[i]), + .GT_RXPMARESET (gt_rxpmareset_i[i]), // (user_rxpmareset[i] || rate_rxpmareset[i]), + .GT_RXCDRRESET (user_rxcdrreset[i]), + .GT_RXCDRFREQRESET (user_rxcdrfreqreset[i]), + .GT_RXDFELPMRESET (user_rxdfelpmreset[i]), + .GT_EYESCANRESET (user_eyescanreset[i]), + .GT_TXPCSRESET (user_txpcsreset[i]), + .GT_RXPCSRESET (user_rxpcsreset[i]), + .GT_RXBUFRESET (user_rxbufreset[i]), + + .GT_EYESCANDATAERROR (gt_eyescandataerror[i]), + .GT_TXRESETDONE (gt_txresetdone[i]), + .GT_RXRESETDONE (gt_rxresetdone[i]), + .GT_RXPMARESETDONE (gt_rxpmaresetdone[i]), + + //---------- GT TX Data Ports ---------------------- + .GT_TXDATA (PIPE_TXDATA[(32*i)+31:(32*i)]), + .GT_TXDATAK (PIPE_TXDATAK[(4*i)+3:(4*i)]), + + .GT_TXP (PIPE_TXP[i]), + .GT_TXN (PIPE_TXN[i]), + + //---------- GT RX Data Ports ---------------------- + .GT_RXP (PIPE_RXP[i]), + .GT_RXN (PIPE_RXN[i]), + + .GT_RXDATA (PIPE_RXDATA[(32*i)+31:(32*i)]), + .GT_RXDATAK (PIPE_RXDATAK[(4*i)+3:(4*i)]), + + //---------- GT Command Ports ---------------------- + .GT_TXDETECTRX (PIPE_TXDETECTRX), + .GT_TXELECIDLE (PIPE_TXELECIDLE[i]), + .GT_TXCOMPLIANCE (PIPE_TXCOMPLIANCE[i]), + .GT_RXPOLARITY (PIPE_RXPOLARITY[i]), + .GT_TXPOWERDOWN (PIPE_POWERDOWN[(2*i)+1:(2*i)]), + .GT_RXPOWERDOWN (PIPE_POWERDOWN[(2*i)+1:(2*i)]), + .GT_TXRATE (rate_rate[(3*i)+2:(3*i)]), + .GT_RXRATE (rate_rate[(3*i)+2:(3*i)]), + + //---------- GT Electrical Command Ports ----------- + .GT_TXMARGIN (PIPE_TXMARGIN), + .GT_TXSWING (PIPE_TXSWING), + .GT_TXDEEMPH (PIPE_TXDEEMPH[i]), + .GT_TXINHIBIT (PIPE_TXINHIBIT[i]), + .GT_TXPRECURSOR (eq_txeq_precursor[(5*i)+4:(5*i)]), + .GT_TXMAINCURSOR (eq_txeq_maincursor[(7*i)+6:(7*i)]), + .GT_TXPOSTCURSOR (eq_txeq_postcursor[(5*i)+4:(5*i)]), + + //---------- GT Status Ports ----------------------- + .GT_RXVALID (gt_rxvalid[i]), + .GT_PHYSTATUS (gt_phystatus[i]), +//#SE, mod +// .GT_RXELECIDLE (gt_rxelecidle[i]), + .GT_RXELECIDLE (gt_rxelecidle_i[i]), + .GT_RXSTATUS (gt_rxstatus[(3*i)+2:(3*i)]), + .GT_RXBUFSTATUS (gt_rxbufstatus[(3*i)+2:(3*i)]), + .GT_TXRATEDONE (gt_txratedone[i]), + .GT_RXRATEDONE (gt_rxratedone[i]), + .GT_RXDISPERR (gt_rxdisperr[(8*i)+7:(8*i)]), + .GT_RXNOTINTABLE (gt_rxnotintable[(8*i)+7:(8*i)]), + + //---------- GT DRP Ports -------------------------- + .GT_DRPCLK (clk_dclk), + .GT_DRPADDR (drp_mux_addr[(9*i)+8:(9*i)]), + .GT_DRPEN (drp_mux_en[i]), + .GT_DRPDI (drp_mux_di[(16*i)+15:(16*i)]), + .GT_DRPWE (drp_mux_we[i]), + + .GT_DRPDO (gt_do[(16*i)+15:(16*i)]), + .GT_DRPRDY (gt_rdy[i]), + + //---------- GT TX Sync Ports ---------------------- + .GT_TXPHALIGN (sync_txphalign[i]), + .GT_TXPHALIGNEN (sync_txphalignen[i]), + .GT_TXPHINIT (sync_txphinit[i]), + .GT_TXDLYBYPASS (sync_txdlybypass[i]), + .GT_TXDLYSRESET (sync_txdlysreset[i]), + .GT_TXDLYEN (sync_txdlyen[i]), + + .GT_TXDLYSRESETDONE (gt_txdlysresetdone[i]), + .GT_TXPHINITDONE (gt_txphinitdone[i]), + .GT_TXPHALIGNDONE (gt_txphaligndone[i]), + + .GT_TXPHDLYRESET (sync_txphdlyreset[i]), + .GT_TXSYNCMODE (i == 0), // GTH, GTP + .GT_TXSYNCIN (gt_txsyncout[0]), // GTH, GTP + .GT_TXSYNCALLIN (txsyncallin), // GTH, GTP + + .GT_TXSYNCOUT (gt_txsyncout[i]), // GTH, GTP + .GT_TXSYNCDONE (gt_txsyncdone[i]), // GTH, GTP + + //---------- GT RX Sync Ports ---------------------- + .GT_RXPHALIGN (sync_rxphalign[i]), + .GT_RXPHALIGNEN (sync_rxphalignen[i]), + .GT_RXDLYBYPASS (sync_rxdlybypass[i]), + .GT_RXDLYSRESET (sync_rxdlysreset[i]), + .GT_RXDLYEN (sync_rxdlyen[i]), + .GT_RXDDIEN (sync_rxddien[i]), + + .GT_RXDLYSRESETDONE (gt_rxdlysresetdone[i]), + .GT_RXPHALIGNDONE (gt_rxphaligndone[i]), + + .GT_RXSYNCMODE (i == 0), // GTH + .GT_RXSYNCIN (gt_rxsyncout[0]), // GTH + .GT_RXSYNCALLIN (rxsyncallin), // GTH + + .GT_RXSYNCOUT (gt_rxsyncout[i]), // GTH + .GT_RXSYNCDONE (gt_rxsyncdone[i]), // GTH + + //---------- GT Comma Alignment Ports -------------- + .GT_RXSLIDE (PIPE_RXSLIDE[i]), + + .GT_RXCOMMADET (gt_rxcommadet[i]), + .GT_RXCHARISCOMMA (gt_rxchariscomma[(4*i)+3:(4*i)]), + .GT_RXBYTEISALIGNED (gt_rxbyteisaligned[i]), + .GT_RXBYTEREALIGN (gt_rxbyterealign[i]), + + //---------- GT Channel Bonding Ports -------------- + .GT_RXCHANISALIGNED (PIPE_RXCHANISALIGNED[i]), + .GT_RXCHBONDEN (rxchbonden[i]), + .GT_RXCHBONDI (gt_rxchbondi[i]), + .GT_RXCHBONDLEVEL (gt_rxchbondlevel[(3*i)+2:(3*i)]), + .GT_RXCHBONDMASTER (rxchbondmaster[i]), + .GT_RXCHBONDSLAVE (rxchbondslave[i]), + .GT_RXCHBONDO (gt_rxchbondo[i+1]), + + //---------- GT PRBS/Loopback Ports ---------------- + .GT_TXPRBSSEL (PIPE_TXPRBSSEL), + .GT_RXPRBSSEL (PIPE_RXPRBSSEL), + .GT_TXPRBSFORCEERR (PIPE_TXPRBSFORCEERR), + .GT_RXPRBSCNTRESET (PIPE_RXPRBSCNTRESET), + .GT_LOOPBACK (PIPE_LOOPBACK), + + .GT_RXPRBSERR (PIPE_RXPRBSERR[i]), + + //---------- GT Debug Port ------------------------- + .GT_DMONITOROUT (PIPE_DMONITOROUT[(15*i)+14:(15*i)]) + ); + +//#SE, mod +//- + always @(posedge clk_rxusrclk) + begin + if (PIPE_TXDETECTRX && gt_phystatus[i] && (gt_rxstatus[(3*i)+2:(3*i)] == 3'h3)) + gt_rxrcvrdet_c[i] <= 1'b1; + else + if (PIPE_TXDETECTRX && gt_phystatus[i] && (gt_rxstatus[(3*i)+2:(3*i)] != 3'h3)) + gt_rxrcvrdet_c[i] <= 1'b0; + end + + initial + gt_rxrcvrdet_c[i] = 1'b0; + + //assign gt_rxelecidle[i] = (gt_rxrcvrdet_c) ? gt_rxelecidle_i[i] : 1'b1; + assign gt_rxelecidle[i] = gt_rxelecidle_i[i]; +//- + + //---------- GT Wrapper Assignments ---------------------------------------- + assign oobclk[i] = (PCIE_OOBCLK_MODE == 1) ? user_oobclk[i] : clk_oobclk; + + //---------- Channel Bonding Master Slave Enable --------------------------- + if (PCIE_CHAN_BOND_EN == "FALSE") + begin : channel_bonding_ms_disable + assign rxchbonden[i] = 1'd0; + assign rxchbondmaster[i] = 1'd0; + assign rxchbondslave[i] = 1'd0; + end + else + begin : channel_bonding_ms_enable + assign rxchbonden[i] = (PCIE_LANE > 1) && (PCIE_CHAN_BOND_EN == "TRUE") ? !rate_gen3[i] : 1'd0; + assign rxchbondmaster[i] = rate_gen3[i] ? 1'd0 : (i == 0); + assign rxchbondslave[i] = rate_gen3[i] ? 1'd0 : (i > 0); + end + + //---------- Channel Bonding Input Connection ------------------------------ + if (PCIE_CHAN_BOND_EN == "FALSE") + begin : channel_bonding_in_disable + assign gt_rxchbondi[i] = 5'd0; + assign gt_rxchbondlevel[(3*i)+2:(3*i)] = 3'd0; + end + else + begin : channel_bonding_in_enable + + //---------- Channel Bonding (2: Binary-Tree) -------------------------- + if (PCIE_CHAN_BOND == 2) + + begin : channel_bonding_a + + case (i) + + //---------- Lane 0 -------------------------------- + 0 : + begin + assign gt_rxchbondi[0] = gt_rxchbondo[0]; + assign gt_rxchbondlevel[2:0] = (PCIE_LANE == 4'd8) ? 3'd4 : + (PCIE_LANE > 4'd5) ? 3'd3 : + (PCIE_LANE > 4'd3) ? 3'd2 : + (PCIE_LANE > 4'd1) ? 3'd1 : 3'd0; + end + //---------- Lane 1 -------------------------------- + 1 : + begin + assign gt_rxchbondi[1] = gt_rxchbondo[1]; + assign gt_rxchbondlevel[5:3] = (PCIE_LANE == 4'd8) ? 3'd3 : + (PCIE_LANE > 4'd5) ? 3'd2 : + (PCIE_LANE > 4'd3) ? 3'd1 : 3'd0; + end + //---------- Lane 2 -------------------------------- + 2 : + begin + assign gt_rxchbondi[2] = gt_rxchbondo[1]; + assign gt_rxchbondlevel[8:6] = (PCIE_LANE == 4'd8) ? 3'd3 : + (PCIE_LANE > 4'd5) ? 3'd2 : + (PCIE_LANE > 4'd3) ? 3'd1 : 3'd0; + end + //---------- Lane 3 -------------------------------- + 3 : + begin + assign gt_rxchbondi[3] = gt_rxchbondo[3]; + assign gt_rxchbondlevel[11:9] = (PCIE_LANE == 4'd8) ? 3'd2 : + (PCIE_LANE > 4'd5) ? 3'd1 : 3'd0; + end + //---------- Lane 4 -------------------------------- + 4 : + begin + assign gt_rxchbondi[4] = gt_rxchbondo[3]; + assign gt_rxchbondlevel[14:12] = (PCIE_LANE == 4'd8) ? 3'd2 : + (PCIE_LANE > 4'd5) ? 3'd1 : 3'd0; + end + //---------- Lane 5 -------------------------------- + 5 : + begin + assign gt_rxchbondi[5] = gt_rxchbondo[5]; + assign gt_rxchbondlevel[17:15] = (PCIE_LANE == 4'd8) ? 3'd1 : 3'd0; + end + //---------- Lane 6 -------------------------------- + 6 : + begin + assign gt_rxchbondi[6] = gt_rxchbondo[5]; + assign gt_rxchbondlevel[20:18] = (PCIE_LANE == 4'd8) ? 3'd1 : 3'd0; + end + //---------- Lane 7 -------------------------------- + 7 : + begin + assign gt_rxchbondi[7] = gt_rxchbondo[7]; + assign gt_rxchbondlevel[23:21] = 3'd0; + end + //---------- Default ------------------------------- + default : + begin + assign gt_rxchbondi[i] = gt_rxchbondo[7]; + assign gt_rxchbondlevel[(3*i)+2:(3*i)] = 3'd0; + end + + endcase + + end + + //---------- Channel Bonding (0: One-Hop, 1: Daisy Chain) -------------- + else + + begin : channel_bonding_b + assign gt_rxchbondi[i] = (PCIE_CHAN_BOND == 1) ? gt_rxchbondo[i] : ((i == 0) ? gt_rxchbondo[0] : gt_rxchbondo[1]); + assign gt_rxchbondlevel[(3*i)+2:(3*i)] = (PCIE_CHAN_BOND == 1) ? (PCIE_LANE-1)-i : ((PCIE_LANE > 1) && (i == 0)); + end + + end + + end + +endgenerate + + + +//---------- PIPE Wrapper Output ----------------------------------------------- +assign PIPE_TXEQ_FS = 0;//TXEQ_FS; +assign PIPE_TXEQ_LF = 0;//TXEQ_LF; +assign PIPE_RXELECIDLE = gt_rxelecidle; +assign PIPE_RXSTATUS = gt_rxstatus; + +assign PIPE_RXDISPERR = gt_rxdisperr; +assign PIPE_RXNOTINTABLE = gt_rxnotintable; +assign PIPE_RXPMARESETDONE = gt_rxpmaresetdone; +assign PIPE_RXBUFSTATUS = gt_rxbufstatus; +assign PIPE_TXPHALIGNDONE = gt_txphaligndone; +assign PIPE_TXPHINITDONE = gt_txphinitdone; +assign PIPE_TXDLYSRESETDONE = gt_txdlysresetdone; +assign PIPE_RXPHALIGNDONE = gt_rxphaligndone; +assign PIPE_RXDLYSRESETDONE = gt_rxdlysresetdone; +assign PIPE_RXSYNCDONE = gt_rxsyncdone; +assign PIPE_RXCOMMADET = gt_rxcommadet; +assign PIPE_QPLL_LOCK = qpll_qplllock; +assign PIPE_CPLL_LOCK = gt_cplllock; + +assign PIPE_PCLK = clk_pclk; +assign PIPE_PCLK_LOCK = clk_mmcm_lock; +assign PIPE_RXCDRLOCK = 0;//user_rxcdrlock; +assign PIPE_RXUSRCLK = 0;//clk_rxusrclk; +assign PIPE_RXOUTCLK = 0;//clk_rxoutclk; +assign PIPE_TXSYNC_DONE = 0;//sync_txsync_done; +assign PIPE_RXSYNC_DONE = 0;//sync_rxsync_done; +assign PIPE_ACTIVE_LANE = 0;//user_active_lane; + +assign PIPE_TXOUTCLK_OUT = gt_txoutclk[0]; +assign PIPE_RXOUTCLK_OUT = gt_rxoutclk; +assign PIPE_PCLK_SEL_OUT = rate_pclk_sel; +assign PIPE_GEN3_OUT = rate_gen3[0]; + +assign PIPE_RXEQ_CONVERGE = user_rx_converge; +assign PIPE_RXEQ_ADAPT_DONE = (PCIE_GT_DEVICE == "GTP") ? {PCIE_LANE{1'd0}} : eq_rxeq_adapt_done; + +assign PIPE_EYESCANDATAERROR = gt_eyescandataerror; +assign PIPE_RST_FSM = rst_fsm; +assign PIPE_QRST_FSM = qrst_fsm; +assign PIPE_RATE_FSM = rate_fsm; +assign PIPE_SYNC_FSM_TX = sync_fsm_tx; +assign PIPE_SYNC_FSM_RX = sync_fsm_rx; +assign PIPE_DRP_FSM = drp_fsm; +assign PIPE_QDRP_FSM = 0;//qdrp_fsm; + +assign PIPE_RST_IDLE = &rst_idle; +assign PIPE_QRST_IDLE = &qrst_idle; +assign PIPE_RATE_IDLE = &rate_idle; + +assign EXT_CH_GT_DRPDO = gt_do[(PCIE_LANE*16)-1:0]; +assign EXT_CH_GT_DRPRDY = gt_rdy[(PCIE_LANE-1):0]; +assign EXT_CH_GT_DRPCLK = clk_dclk; + +assign PIPE_DEBUG_0 = (PCIE_DEBUG_MODE == 1) ? gt_txresetdone : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_1 = (PCIE_DEBUG_MODE == 1) ? gt_rxresetdone : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_2 = (PCIE_DEBUG_MODE == 1) ? gt_phystatus : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_3 = (PCIE_DEBUG_MODE == 1) ? gt_rxvalid : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_4 = (PCIE_DEBUG_MODE == 1) ? clk_dclk : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_5 = (PCIE_DEBUG_MODE == 1) ? drp_mux_en : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_6 = (PCIE_DEBUG_MODE == 1) ? drp_mux_we : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_7 = (PCIE_DEBUG_MODE == 1) ? gt_rdy : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_8 = (PCIE_DEBUG_MODE == 1) ? user_rx_converge : {PCIE_LANE{1'b0}}; +assign PIPE_DEBUG_9 = (PCIE_DEBUG_MODE == 1) ? PIPE_TXELECIDLE : {PCIE_LANE{1'b0}}; + +assign PIPE_DEBUG[ 1:0] = (PCIE_DEBUG_MODE == 1) ? PIPE_TXEQ_CONTROL[1:0] : 2'd0; +assign PIPE_DEBUG[ 5:2] = (PCIE_DEBUG_MODE == 1) ? PIPE_TXEQ_PRESET[3:0] : 4'd0; +assign PIPE_DEBUG[31:6] = 26'd0; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_qpll_drp.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_qpll_drp.v new file mode 100644 index 0000000000000000000000000000000000000000..54dc99a90dc978707a2ec16d4534a5a737b1d8e8 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_qpll_drp.v @@ -0,0 +1,551 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_qpll_drp.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : qpll_drp.v +// Description : QPLL DRP Module for 7 Series Transceiver +// Version : 18.2 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- QPLL DRP Module --------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_qpll_drp # +( + + parameter PCIE_GT_DEVICE = "GTX", // PCIe GT device + parameter PCIE_USE_MODE = "3.0", // PCIe use mode + parameter PCIE_PLL_SEL = "CPLL", // PCIe PLL select for Gen1/Gen2 only + parameter PCIE_REFCLK_FREQ = 0, // PCIe reference clock frequency + parameter LOAD_CNT_MAX = 2'd3, // Load max count + parameter INDEX_MAX = 3'd6 // Index max count + +) + +( + + //---------- Input ------------------------------------- + input DRP_CLK, + input DRP_RST_N, + input DRP_OVRD, + input DRP_GEN3, + input DRP_QPLLLOCK, + input DRP_START, + input [15:0] DRP_DO, + input DRP_RDY, + + //---------- Output ------------------------------------ + output [ 7:0] DRP_ADDR, + output DRP_EN, + output [15:0] DRP_DI, + output DRP_WE, + output DRP_DONE, + output DRP_QPLLRESET, + output [ 5:0] DRP_CRSCODE, + output [ 8:0] DRP_FSM + +); + + //---------- Input Registers --------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg ovrd_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg gen3_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg qplllock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg start_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [15:0] do_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rdy_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg ovrd_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg gen3_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg qplllock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg start_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [15:0] do_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg rdy_reg2; + + //---------- Internal Signals -------------------------- + reg [ 1:0] load_cnt = 2'd0; + reg [ 2:0] index = 3'd0; + reg mode = 1'd0; + reg [ 5:0] crscode = 6'd0; + + //---------- Output Registers -------------------------- + reg [ 7:0] addr = 8'd0; + reg [15:0] di = 16'd0; + reg done = 1'd0; + reg [ 8:0] fsm = 7'd1; + + //---------- DRP Address ------------------------------- + localparam ADDR_QPLL_FBDIV = 8'h36; + localparam ADDR_QPLL_CFG = 8'h32; + localparam ADDR_QPLL_LPF = 8'h31; + localparam ADDR_CRSCODE = 8'h88; + localparam ADDR_QPLL_COARSE_FREQ_OVRD = 8'h35; + localparam ADDR_QPLL_COARSE_FREQ_OVRD_EN = 8'h36; + localparam ADDR_QPLL_LOCK_CFG = 8'h34; + + //---------- DRP Mask ---------------------------------- + localparam MASK_QPLL_FBDIV = 16'b1111110000000000; // Unmask bit [ 9: 0] + localparam MASK_QPLL_CFG = 16'b1111111110111111; // Unmask bit [ 6] + localparam MASK_QPLL_LPF = 16'b1000011111111111; // Unmask bit [14:11] + localparam MASK_QPLL_COARSE_FREQ_OVRD = 16'b0000001111111111; // Unmask bit [15:10] + localparam MASK_QPLL_COARSE_FREQ_OVRD_EN = 16'b1111011111111111; // Unmask bit [ 11] + localparam MASK_QPLL_LOCK_CFG = 16'b1110011111111111; // Unmask bit [12:11] + + //---------- DRP Data for Normal QPLLLOCK Mode --------- + localparam NORM_QPLL_COARSE_FREQ_OVRD = 16'b0000000000000000; // Coarse freq value + localparam NORM_QPLL_COARSE_FREQ_OVRD_EN = 16'b0000000000000000; // Normal QPLL lock + localparam NORM_QPLL_LOCK_CFG = 16'b0000000000000000; // Normal QPLL lock config + + //---------- DRP Data for Optimize QPLLLOCK Mode ------- + localparam OVRD_QPLL_COARSE_FREQ_OVRD = 16'b0000000000000000; // Coarse freq value + localparam OVRD_QPLL_COARSE_FREQ_OVRD_EN = 16'b0000100000000000; // Override QPLL lock + localparam OVRD_QPLL_LOCK_CFG = 16'b0000000000000000; // Override QPLL lock config + + //---------- Select QPLL Feedback Divider -------------- + // N = 100 for 100 MHz ref clk and 10Gb/s line rate + // N = 80 for 125 MHz ref clk and 10Gb/s line rate + // N = 40 for 250 MHz ref clk and 10Gb/s line rate + //------------------------------------------------------ + // N = 80 for 100 MHz ref clk and 8Gb/s line rate + // N = 64 for 125 MHz ref clk and 8Gb/s line rate + // N = 32 for 250 MHz ref clk and 8Gb/s line rate + //------------------------------------------------------ + localparam QPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) && (PCIE_PLL_SEL == "QPLL") ? 16'b0000000010000000 : + (PCIE_REFCLK_FREQ == 1) && (PCIE_PLL_SEL == "QPLL") ? 16'b0000000100100000 : + (PCIE_REFCLK_FREQ == 0) && (PCIE_PLL_SEL == "QPLL") ? 16'b0000000101110000 : + (PCIE_REFCLK_FREQ == 2) && (PCIE_PLL_SEL == "CPLL") ? 16'b0000000001100000 : + (PCIE_REFCLK_FREQ == 1) && (PCIE_PLL_SEL == "CPLL") ? 16'b0000000011100000 : 16'b0000000100100000; + + localparam GEN12_QPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) ? 16'b0000000010000000 : + (PCIE_REFCLK_FREQ == 1) ? 16'b0000000100100000 : 16'b0000000101110000; + + localparam GEN3_QPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) ? 16'b0000000001100000 : + (PCIE_REFCLK_FREQ == 1) ? 16'b0000000011100000 : 16'b0000000100100000; + + //---------- Select QPLL Configuration --------------------------- + // QPLL_CFG[6] = 0 for upper band + // = 1 for lower band + //---------------------------------------------------------------- + localparam GEN12_QPLL_CFG = (PCIE_PLL_SEL == "QPLL") ? 16'b0000000000000000 : 16'b0000000001000000; + localparam GEN3_QPLL_CFG = 16'b0000000001000000; + + //---------- Select QPLL LPF ------------------------------------- + localparam GEN12_QPLL_LPF = (PCIE_PLL_SEL == "QPLL") ? 16'b0_0100_00000000000 : 16'b0_1101_00000000000; + localparam GEN3_QPLL_LPF = 16'b0_1101_00000000000; + + + + //---------- DRP Data ---------------------------------- + wire [15:0] data_qpll_fbdiv; + wire [15:0] data_qpll_cfg; + wire [15:0] data_qpll_lpf; + wire [15:0] data_qpll_coarse_freq_ovrd; + wire [15:0] data_qpll_coarse_freq_ovrd_en; + wire [15:0] data_qpll_lock_cfg; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 9'b000000001; + localparam FSM_LOAD = 9'b000000010; + localparam FSM_READ = 9'b000000100; + localparam FSM_RRDY = 9'b000001000; + localparam FSM_WRITE = 9'b000010000; + localparam FSM_WRDY = 9'b000100000; + localparam FSM_DONE = 9'b001000000; + localparam FSM_QPLLRESET = 9'b010000000; + localparam FSM_QPLLLOCK = 9'b100000000; + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + //---------- 1st Stage FF -------------------------- + ovrd_reg1 <= 1'd0; + gen3_reg1 <= 1'd0; + qplllock_reg1 <= 1'd0; + start_reg1 <= 1'd0; + do_reg1 <= 16'd0; + rdy_reg1 <= 1'd0; + //---------- 2nd Stage FF -------------------------- + ovrd_reg2 <= 1'd0; + gen3_reg2 <= 1'd0; + qplllock_reg2 <= 1'd0; + start_reg2 <= 1'd0; + do_reg2 <= 16'd0; + rdy_reg2 <= 1'd0; + end + + else + begin + //---------- 1st Stage FF -------------------------- + ovrd_reg1 <= DRP_OVRD; + gen3_reg1 <= DRP_GEN3; + qplllock_reg1 <= DRP_QPLLLOCK; + start_reg1 <= DRP_START; + do_reg1 <= DRP_DO; + rdy_reg1 <= DRP_RDY; + //---------- 2nd Stage FF -------------------------- + ovrd_reg2 <= ovrd_reg1; + gen3_reg2 <= gen3_reg1; + qplllock_reg2 <= qplllock_reg1; + start_reg2 <= start_reg1; + do_reg2 <= do_reg1; + rdy_reg2 <= rdy_reg1; + end + +end + + + +//---------- Select DRP Data --------------------------------------------------- +assign data_qpll_fbdiv = (gen3_reg2) ? GEN3_QPLL_FBDIV : GEN12_QPLL_FBDIV; +assign data_qpll_cfg = (gen3_reg2) ? GEN3_QPLL_CFG : GEN12_QPLL_CFG; +assign data_qpll_lpf = (gen3_reg2) ? GEN3_QPLL_LPF : GEN12_QPLL_LPF; +assign data_qpll_coarse_freq_ovrd = NORM_QPLL_COARSE_FREQ_OVRD; +assign data_qpll_coarse_freq_ovrd_en = (ovrd_reg2) ? OVRD_QPLL_COARSE_FREQ_OVRD_EN : NORM_QPLL_COARSE_FREQ_OVRD_EN; +assign data_qpll_lock_cfg = (ovrd_reg2) ? OVRD_QPLL_LOCK_CFG : NORM_QPLL_LOCK_CFG; + + +//---------- Load Counter ------------------------------------------------------ +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + load_cnt <= 2'd0; + else + + //---------- Increment Load Counter ---------------- + if ((fsm == FSM_LOAD) && (load_cnt < LOAD_CNT_MAX)) + load_cnt <= load_cnt + 2'd1; + + //---------- Hold Load Counter --------------------- + else if ((fsm == FSM_LOAD) && (load_cnt == LOAD_CNT_MAX)) + load_cnt <= load_cnt; + + //---------- Reset Load Counter -------------------- + else + load_cnt <= 2'd0; + +end + + + +//---------- Update DRP Address and Data --------------------------------------- +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + addr <= 8'd0; + di <= 16'd0; + crscode <= 6'd0; + end + else + begin + + case (index) + + //-------------------------------------------------- + 3'd0 : + begin + addr <= ADDR_QPLL_FBDIV; + di <= (do_reg2 & MASK_QPLL_FBDIV) | (mode ? data_qpll_fbdiv : QPLL_FBDIV); + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd1 : + begin + addr <= ADDR_QPLL_CFG; + if (PCIE_GT_DEVICE == "GTX") + di <= (do_reg2 & MASK_QPLL_CFG) | data_qpll_cfg; + else + di <= (do_reg2 & 16'hFFFF) | data_qpll_cfg; + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd2 : + begin + addr <= ADDR_QPLL_LPF; + if (PCIE_GT_DEVICE == "GTX") + di <= (do_reg2 & MASK_QPLL_LPF) | data_qpll_lpf; + else + di <= (do_reg2 & 16'hFFFF) | data_qpll_lpf; + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd3 : + begin + addr <= ADDR_CRSCODE; + di <= do_reg2; + + //---------- Latch CRS Code -------------------- + if (ovrd_reg2) + crscode <= do_reg2[6:1]; + else + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd4 : + begin + addr <= ADDR_QPLL_COARSE_FREQ_OVRD; + di <= (do_reg2 & MASK_QPLL_COARSE_FREQ_OVRD) | {(crscode - 6'd1), data_qpll_coarse_freq_ovrd[9:0]}; + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd5 : + begin + addr <= ADDR_QPLL_COARSE_FREQ_OVRD_EN; + di <= (do_reg2 & MASK_QPLL_COARSE_FREQ_OVRD_EN) | data_qpll_coarse_freq_ovrd_en; + crscode <= crscode; + end + + //-------------------------------------------------- + 3'd6 : + begin + addr <= ADDR_QPLL_LOCK_CFG; + di <= (do_reg2 & MASK_QPLL_LOCK_CFG) | data_qpll_lock_cfg; + crscode <= crscode; + end + + //-------------------------------------------------- + default : + begin + addr <= 8'd0; + di <= 16'd0; + crscode <= 6'd0; + end + + endcase + + end + +end + + + +//---------- QPLL DRP FSM ------------------------------------------------------ +always @ (posedge DRP_CLK) +begin + + if (!DRP_RST_N) + begin + fsm <= FSM_IDLE; + index <= 3'd0; + mode <= 1'd0; + done <= 1'd0; + end + else + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + if (start_reg2) + begin + fsm <= FSM_LOAD; + index <= 3'd0; + mode <= 1'd0; + done <= 1'd0; + end + else if ((gen3_reg2 != gen3_reg1) && (PCIE_PLL_SEL == "QPLL")) + begin + fsm <= FSM_LOAD; + index <= 3'd0; + mode <= 1'd1; + done <= 1'd0; + end + else + begin + fsm <= FSM_IDLE; + index <= 3'd0; + mode <= 1'd0; + done <= 1'd1; + end + end + + //---------- Load DRP Address --------------------- + FSM_LOAD : + + begin + fsm <= (load_cnt == LOAD_CNT_MAX) ? FSM_READ : FSM_LOAD; + index <= index; + mode <= mode; + done <= 1'd0; + end + + //---------- Read DRP ------------------------------ + FSM_READ : + + begin + fsm <= FSM_RRDY; + index <= index; + mode <= mode; + done <= 1'd0; + end + + //---------- Read DRP Ready ------------------------ + FSM_RRDY : + + begin + fsm <= (rdy_reg2 ? FSM_WRITE : FSM_RRDY); + index <= index; + mode <= mode; + done <= 1'd0; + end + + //---------- Write DRP ----------------------------- + FSM_WRITE : + + begin + fsm <= FSM_WRDY; + index <= index; + mode <= mode; + done <= 1'd0; + end + + //---------- Write DRP Ready ----------------------- + FSM_WRDY : + + begin + fsm <= (rdy_reg2 ? FSM_DONE : FSM_WRDY); + index <= index; + mode <= mode; + done <= 1'd0; + end + + //---------- DRP Done ------------------------------ + FSM_DONE : + + begin + if ((index == INDEX_MAX) || (mode && (index == 3'd2))) + begin + fsm <= mode ? FSM_QPLLRESET : FSM_IDLE; + index <= 3'd0; + mode <= mode; + done <= 1'd0; + end + else + begin + fsm <= FSM_LOAD; + index <= index + 3'd1; + mode <= mode; + done <= 1'd0; + end + end + + //---------- QPLL Reset ---------------------------- + FSM_QPLLRESET : + + begin + fsm <= !qplllock_reg2 ? FSM_QPLLLOCK : FSM_QPLLRESET; + index <= 3'd0; + mode <= mode; + done <= 1'd0; + end + + //---------- QPLL Reset ---------------------------- + FSM_QPLLLOCK : + + begin + fsm <= qplllock_reg2 ? FSM_IDLE : FSM_QPLLLOCK; + index <= 3'd0; + mode <= mode; + done <= 1'd0; + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_IDLE; + index <= 3'd0; + mode <= 1'd0; + done <= 1'd0; + end + + endcase + + end + +end + + + +//---------- QPLL DRP Output --------------------------------------------------- +assign DRP_ADDR = addr; +assign DRP_EN = (fsm == FSM_READ) || (fsm == FSM_WRITE); +assign DRP_DI = di; +assign DRP_WE = (fsm == FSM_WRITE); // || (fsm == FSM_WRDY); +assign DRP_DONE = done; +assign DRP_QPLLRESET = (fsm == FSM_QPLLRESET); +assign DRP_CRSCODE = crscode; +assign DRP_FSM = fsm; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_qpll_reset.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_qpll_reset.v new file mode 100644 index 0000000000000000000000000000000000000000..bf3e510702d3d5fa5e14746b1e4bf043958d9728 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_qpll_reset.v @@ -0,0 +1,371 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_qpll_reset.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : qpll_reset.v +// Description : QPLL Reset Module for 7 Series Transceiver +// Version : 11.4 +//------------------------------------------------------------------------------ + + +`timescale 1ns / 1ps + + + +//---------- QPLL Reset Module -------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_qpll_reset # +( + + //---------- Global ------------------------------------ + parameter PCIE_PLL_SEL = "CPLL", // PCIe PLL select for Gen1/Gen2 only + parameter PCIE_POWER_SAVING = "TRUE", // PCIe power saving + parameter PCIE_LANE = 1, // PCIe number of lanes + parameter BYPASS_COARSE_OVRD = 1 // Bypass coarse frequency override + +) + +( + + //---------- Input ------------------------------------- + input QRST_CLK, + input QRST_RST_N, + input QRST_MMCM_LOCK, + input [PCIE_LANE-1:0] QRST_CPLLLOCK, + input [(PCIE_LANE-1)>>2:0]QRST_DRP_DONE, + input [(PCIE_LANE-1)>>2:0]QRST_QPLLLOCK, + input [ 1:0] QRST_RATE, + input [PCIE_LANE-1:0] QRST_QPLLRESET_IN, + input [PCIE_LANE-1:0] QRST_QPLLPD_IN, + + //---------- Output ------------------------------------ + output QRST_OVRD, + output QRST_DRP_START, + output QRST_QPLLRESET_OUT, + output QRST_QPLLPD_OUT, + output QRST_IDLE, + output [3:0] QRST_FSM + +); + + //---------- Input Register ---------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg mmcm_lock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] cplllock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [(PCIE_LANE-1)>>2:0]drp_done_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [(PCIE_LANE-1)>>2:0]qplllock_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 1:0] rate_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] qpllreset_in_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] qpllpd_in_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg mmcm_lock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] cplllock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [(PCIE_LANE-1)>>2:0]drp_done_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [(PCIE_LANE-1)>>2:0]qplllock_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 1:0] rate_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] qpllreset_in_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [PCIE_LANE-1:0] qpllpd_in_reg2; + + //---------- Output Register -------------------------- + reg ovrd = 1'd0; + reg qpllreset = 1'd1; + reg qpllpd = 1'd0; + reg [3:0] fsm = 2; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 1;//12'b000000000001; + localparam FSM_WAIT_LOCK = 2;//12'b000000000010; + localparam FSM_MMCM_LOCK = 3;//12'b000000000100; + localparam FSM_DRP_START_NOM = 4;//12'b000000001000; + localparam FSM_DRP_DONE_NOM = 5;//12'b000000010000; + localparam FSM_QPLLLOCK = 6;//12'b000000100000; + localparam FSM_DRP_START_OPT = 7;//12'b000001000000; + localparam FSM_DRP_DONE_OPT = 8;//12'b000010000000; + localparam FSM_QPLL_RESET = 9;//12'b000100000000; + localparam FSM_QPLLLOCK2 = 10;//12'b001000000000; + localparam FSM_QPLL_PDRESET = 11;//12'b010000000000; + localparam FSM_QPLL_PD = 12;//12'b100000000000; + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge QRST_CLK) +begin + + if (!QRST_RST_N) + begin + //---------- 1st Stage FF -------------------------- + mmcm_lock_reg1 <= 1'd0; + cplllock_reg1 <= {PCIE_LANE{1'd1}}; + drp_done_reg1 <= {(((PCIE_LANE-1)>>2)+1){1'd0}}; + qplllock_reg1 <= {(((PCIE_LANE-1)>>2)+1){1'd0}}; + rate_reg1 <= 2'd0; + qpllreset_in_reg1 <= {PCIE_LANE{1'd1}}; + qpllpd_in_reg1 <= {PCIE_LANE{1'd0}}; + //---------- 2nd Stage FF -------------------------- + mmcm_lock_reg2 <= 1'd0; + cplllock_reg2 <= {PCIE_LANE{1'd1}}; + drp_done_reg2 <= {(((PCIE_LANE-1)>>2)+1){1'd0}}; + qplllock_reg2 <= {(((PCIE_LANE-1)>>2)+1){1'd0}}; + rate_reg2 <= 2'd0; + qpllreset_in_reg2 <= {PCIE_LANE{1'd1}}; + qpllpd_in_reg2 <= {PCIE_LANE{1'd0}}; + end + else + begin + //---------- 1st Stage FF -------------------------- + mmcm_lock_reg1 <= QRST_MMCM_LOCK; + cplllock_reg1 <= QRST_CPLLLOCK; + drp_done_reg1 <= QRST_DRP_DONE; + qplllock_reg1 <= QRST_QPLLLOCK; + rate_reg1 <= QRST_RATE; + qpllreset_in_reg1 <= QRST_QPLLRESET_IN; + qpllpd_in_reg1 <= QRST_QPLLPD_IN; + //---------- 2nd Stage FF -------------------------- + mmcm_lock_reg2 <= mmcm_lock_reg1; + cplllock_reg2 <= cplllock_reg1; + drp_done_reg2 <= drp_done_reg1; + qplllock_reg2 <= qplllock_reg1; + rate_reg2 <= rate_reg1; + qpllreset_in_reg2 <= qpllreset_in_reg1; + qpllpd_in_reg2 <= qpllpd_in_reg1; + end + +end + + + +//---------- QPLL Reset FSM ---------------------------------------------------- +always @ (posedge QRST_CLK) +begin + + if (!QRST_RST_N) + begin + fsm <= FSM_WAIT_LOCK; + ovrd <= 1'd0; + qpllreset <= 1'd1; + qpllpd <= 1'd0; + end + else + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + if (!QRST_RST_N) + begin + fsm <= FSM_WAIT_LOCK; + ovrd <= 1'd0; + qpllreset <= 1'd1; + qpllpd <= 1'd0; + end + else + begin + fsm <= FSM_IDLE; + ovrd <= ovrd; + qpllreset <= &qpllreset_in_reg2; + qpllpd <= &qpllpd_in_reg2; + end + end + + //---------- Wait for CPLL and QPLL to Lose Lock --- + FSM_WAIT_LOCK : + + begin + fsm <= ((&(~cplllock_reg2)) && (&(~qplllock_reg2)) ? FSM_MMCM_LOCK : FSM_WAIT_LOCK); + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + + //---------- Wait for MMCM and CPLL Lock ----------- + FSM_MMCM_LOCK : + + begin + fsm <= ((mmcm_lock_reg2 && (&cplllock_reg2)) ? FSM_DRP_START_NOM : FSM_MMCM_LOCK); + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + + //---------- Start QPLL DRP for Normal QPLL Lock Mode + FSM_DRP_START_NOM: + + begin + fsm <= (&(~drp_done_reg2) ? FSM_DRP_DONE_NOM : FSM_DRP_START_NOM); + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + + //---------- Wait for QPLL DRP Done ---------------- + FSM_DRP_DONE_NOM : + + begin + fsm <= (&drp_done_reg2 ? FSM_QPLLLOCK : FSM_DRP_DONE_NOM); + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + + //---------- Wait for QPLL Lock -------------------- + FSM_QPLLLOCK : + + begin + fsm <= (&qplllock_reg2 ? ((BYPASS_COARSE_OVRD == 1) ? FSM_QPLL_PDRESET : FSM_DRP_START_OPT) : FSM_QPLLLOCK); + ovrd <= ovrd; + qpllreset <= 1'd0; + qpllpd <= qpllpd; + end + + //---------- Start QPLL DRP for Optimized QPLL Lock Mode + FSM_DRP_START_OPT: + + begin + fsm <= (&(~drp_done_reg2) ? FSM_DRP_DONE_OPT : FSM_DRP_START_OPT); + ovrd <= 1'd1; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + + //---------- Wait for QPLL DRP Done ---------------- + FSM_DRP_DONE_OPT : + + begin + if (&drp_done_reg2) + begin + fsm <= ((PCIE_PLL_SEL == "QPLL") ? FSM_QPLL_RESET : FSM_QPLL_PDRESET); + ovrd <= ovrd; + qpllreset <= (PCIE_PLL_SEL == "QPLL"); + qpllpd <= qpllpd; + end + else + begin + fsm <= FSM_DRP_DONE_OPT; + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= qpllpd; + end + end + + //---------- Reset QPLL ---------------------------- + FSM_QPLL_RESET : + + begin + fsm <= (&(~qplllock_reg2) ? FSM_QPLLLOCK2 : FSM_QPLL_RESET); + ovrd <= ovrd; + qpllreset <= 1'd1; + qpllpd <= 1'd0; + end + + //---------- Wait for QPLL Lock -------------------- + FSM_QPLLLOCK2 : + + begin + fsm <= (&qplllock_reg2 ? FSM_IDLE : FSM_QPLLLOCK2); + ovrd <= ovrd; + qpllreset <= 1'd0; + qpllpd <= 1'd0; + end + + //---------- Hold QPLL in Reset -------------------- + FSM_QPLL_PDRESET : + + begin + fsm <= FSM_QPLL_PD; + ovrd <= ovrd; + qpllreset <= (PCIE_PLL_SEL == "CPLL") ? (rate_reg2 != 2'd2) : 1'd0; + qpllpd <= qpllpd; + end + + //---------- Power-down QPLL ----------------------- + FSM_QPLL_PD : + + begin + fsm <= FSM_IDLE; + ovrd <= ovrd; + qpllreset <= qpllreset; + qpllpd <= (PCIE_PLL_SEL == "CPLL") ? (rate_reg2 != 2'd2) : 1'd0; + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_WAIT_LOCK; + ovrd <= 1'd0; + qpllreset <= 1'd0; + qpllpd <= 1'd0; + end + + endcase + + end + +end + + + +//---------- QPLL Lock Output -------------------------------------------------- +assign QRST_OVRD = ovrd; +assign QRST_DRP_START = (fsm == FSM_DRP_START_NOM) || (fsm == FSM_DRP_START_OPT); +assign QRST_QPLLRESET_OUT = qpllreset; +assign QRST_QPLLPD_OUT = ((PCIE_POWER_SAVING == "FALSE") ? 1'd0 : qpllpd); +assign QRST_IDLE = (fsm == FSM_IDLE); +assign QRST_FSM = fsm; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_qpll_wrapper.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_qpll_wrapper.v new file mode 100644 index 0000000000000000000000000000000000000000..9224c9fe46c78db72fbf83ac65c9c75846774edf --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_qpll_wrapper.v @@ -0,0 +1,440 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_qpll_wrapper.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : qpll_wrapper.v +// Description : QPLL Wrapper Module for 7 Series Transceiver +// Version : 18.1 +//------------------------------------------------------------------------------ + + + +`timescale 1ns / 1ps + + + +//---------- QPLL Wrapper ---------------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_qpll_wrapper # +( + + parameter PCIE_SIM_MODE = "FALSE", // PCIe sim mode + parameter PCIE_GT_DEVICE = "GTX", // PCIe GT device + parameter PCIE_USE_MODE = "3.0", // PCIe use mode + parameter PCIE_PLL_SEL = "CPLL", // PCIe PLL select for Gen1/Gen2 only + parameter PCIE_REFCLK_FREQ = 0 // PCIe reference clock frequency + +) + +( + + //---------- QPLL Clock Ports -------------------------- + input QPLL_CPLLPDREFCLK, + input QPLL_GTGREFCLK, + input QPLL_QPLLLOCKDETCLK, + + output QPLL_QPLLOUTCLK, + output QPLL_QPLLOUTREFCLK, + output QPLL_QPLLLOCK, + + //---------- QPLL Reset Ports -------------------------- + input QPLL_QPLLPD, + input QPLL_QPLLRESET, + + //---------- QPLL DRP Ports ---------------------------- + input QPLL_DRPCLK, + input [ 7:0] QPLL_DRPADDR, + input QPLL_DRPEN, + input [15:0] QPLL_DRPDI, + input QPLL_DRPWE, + + output [15:0] QPLL_DRPDO, + output QPLL_DRPRDY + +); + + + + //---------- Select QPLL Feedback Divider -------------- + // N = 100 for 100 MHz ref clk and 10Gb/s line rate + // N = 80 for 125 MHz ref clk and 10Gb/s line rate + // N = 40 for 250 MHz ref clk and 10Gb/s line rate + //------------------------------------------------------ + // N = 80 for 100 MHz ref clk and 8Gb/s line rate + // N = 64 for 125 MHz ref clk and 8Gb/s line rate + // N = 32 for 250 MHz ref clk and 8Gb/s line rate + //------------------------------------------------------ + localparam QPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) && (PCIE_PLL_SEL == "QPLL") ? 10'b0010000000 : + (PCIE_REFCLK_FREQ == 1) && (PCIE_PLL_SEL == "QPLL") ? 10'b0100100000 : + (PCIE_REFCLK_FREQ == 0) && (PCIE_PLL_SEL == "QPLL") ? 10'b0101110000 : + (PCIE_REFCLK_FREQ == 2) && (PCIE_PLL_SEL == "CPLL") ? 10'b0001100000 : + (PCIE_REFCLK_FREQ == 1) && (PCIE_PLL_SEL == "CPLL") ? 10'b0011100000 : 10'b0100100000; + + //---------- Select GTP QPLL Feedback Divider ---------- + localparam GTP_QPLL_FBDIV = (PCIE_REFCLK_FREQ == 2) ? 3'd2 : + (PCIE_REFCLK_FREQ == 1) ? 3'd4 : 3'd5; + + //---------- Select BIAS_CFG --------------------------- + localparam BIAS_CFG = ((PCIE_USE_MODE == "1.0") && (PCIE_PLL_SEL == "CPLL")) ? 64'h0000042000001000 : 64'h0000040000001000; + + + wire cpllpd; + wire cpllrst; + +//---------- Select GTX or GTH or GTP ------------------------------------------ +// Notes : Attributes that are commented out uses the GT default settings +//------------------------------------------------------------------------------ +generate if (PCIE_GT_DEVICE == "GTP") + + //---------- GTP Common ---------------------------------------------------- + begin : gtp_common + + //---------- GTP Common Module --------------------------------------------- + GTPE2_COMMON # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_PLL0REFCLK_SEL (3'b001), // + .SIM_PLL1REFCLK_SEL (3'b001), // + .SIM_RESET_SPEEDUP (PCIE_SIM_MODE), // + .SIM_VERSION (PCIE_USE_MODE), // + + //---------- Clock Attributes ------------------------------------------ + .PLL0_CFG (27'h01F024C), // Optimized for IES + .PLL1_CFG (27'h01F024C), // Optimized for IES + .PLL_CLKOUT_CFG (8'd0), // Optimized for IES + .PLL0_DMON_CFG (1'b0), // Optimized for IES + .PLL1_DMON_CFG (1'b0), // Optimized for IES + .PLL0_FBDIV (GTP_QPLL_FBDIV), // Optimized for IES + .PLL1_FBDIV (GTP_QPLL_FBDIV), // Optimized for IES + .PLL0_FBDIV_45 (5), // Optimized for IES + .PLL1_FBDIV_45 (5), // Optimized for IES + .PLL0_INIT_CFG (24'h00001E), // Optimized for IES + .PLL1_INIT_CFG (24'h00001E), // Optimized for IES + .PLL0_LOCK_CFG ( 9'h1E8), // Optimized for IES + .PLL1_LOCK_CFG ( 9'h1E8), // Optimized for IES + .PLL0_REFCLK_DIV (1), // Optimized for IES + .PLL1_REFCLK_DIV (1), // Optimized for IES + + //---------- MISC ------------------------------------------------------ + .BIAS_CFG (64'h0000000000050001), // Optimized for GES + //.COMMON_CFG (32'd0), // + .RSVD_ATTR0 (16'd0), // + .RSVD_ATTR1 (16'd0) // + + ) + gtpe2_common_i + ( + + //---------- Clock ----------------------------------------------------- + .GTGREFCLK0 ( 1'd0), // + .GTGREFCLK1 ( 1'd0), // + .GTREFCLK0 (QPLL_GTGREFCLK), // + .GTREFCLK1 ( 1'd0), // + .GTEASTREFCLK0 ( 1'd0), // + .GTEASTREFCLK1 ( 1'd0), // + .GTWESTREFCLK0 ( 1'd0), // + .GTWESTREFCLK1 ( 1'd0), // + .PLL0LOCKDETCLK (QPLL_QPLLLOCKDETCLK), // + .PLL1LOCKDETCLK (QPLL_QPLLLOCKDETCLK), // + .PLL0LOCKEN ( 1'd1), // + .PLL1LOCKEN ( 1'd1), // + .PLL0REFCLKSEL ( 3'd1), // Optimized for IES + .PLL1REFCLKSEL ( 3'd1), // Optimized for IES + .PLLRSVD1 (16'd0), // Optimized for IES + .PLLRSVD2 ( 5'd0), // Optimized for IES + + .PLL0OUTCLK (QPLL_QPLLOUTCLK), // + .PLL1OUTCLK (), // + .PLL0OUTREFCLK (QPLL_QPLLOUTREFCLK), // + .PLL1OUTREFCLK (), // + .PLL0LOCK (QPLL_QPLLLOCK), // + .PLL1LOCK (), // + .PLL0FBCLKLOST (), // + .PLL1FBCLKLOST (), // + .PLL0REFCLKLOST (), // + .PLL1REFCLKLOST (), // + .DMONITOROUT (), // + + //---------- Reset ----------------------------------------------------- + .PLL0PD (cpllpd | QPLL_QPLLPD), // + .PLL1PD ( 1'd1), // + .PLL0RESET (cpllrst | QPLL_QPLLRESET), // + .PLL1RESET ( 1'd1), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (QPLL_DRPCLK), // + .DRPADDR (QPLL_DRPADDR), // + .DRPEN (QPLL_DRPEN), // + .DRPDI (QPLL_DRPDI), // + .DRPWE (QPLL_DRPWE), // + + .DRPDO (QPLL_DRPDO), // + .DRPRDY (QPLL_DRPRDY), // + + //---------- Band Gap -------------------------------------------------- + .BGBYPASSB ( 1'd1), // Optimized for IES + .BGMONITORENB ( 1'd1), // Optimized for IES + .BGPDB ( 1'd1), // Optimized for IES + .BGRCALOVRD ( 5'd31), // Optimized for IES + .BGRCALOVRDENB ( 1'd1), // Optimized for IES + + //---------- MISC ------------------------------------------------------ + .PMARSVD ( 8'd0), // + .RCALENB ( 1'd1), // Optimized for IES + + .REFCLKOUTMONITOR0 (), // + .REFCLKOUTMONITOR1 (), // + .PMARSVDOUT () // + + ); + + end + +else if (PCIE_GT_DEVICE == "GTH") + + //---------- GTH Common ---------------------------------------------------- + begin : gth_common + + //---------- GTX Common Module --------------------------------------------- + GTHE2_COMMON # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_QPLLREFCLK_SEL (3'b001), // + .SIM_RESET_SPEEDUP (PCIE_SIM_MODE), // + .SIM_VERSION ("2.0"), // + + //---------- Clock Attributes ------------------------------------------ + .QPLL_CFG (27'h04801C7), // QPLL for Gen3, optimized for GES + .QPLL_CLKOUT_CFG ( 4'b1111), // Optimized for GES + .QPLL_COARSE_FREQ_OVRD ( 6'b010000), // + .QPLL_COARSE_FREQ_OVRD_EN ( 1'd0), // + .QPLL_CP (10'h0FF), // * Optimized for IES and PCIe PLL BW + .QPLL_CP_MONITOR_EN ( 1'd0), // + .QPLL_DMONITOR_SEL ( 1'd0), // + .QPLL_FBDIV (QPLL_FBDIV), // + .QPLL_FBDIV_MONITOR_EN ( 1'd0), // + .QPLL_FBDIV_RATIO ( 1'd1), // Optimized + .QPLL_INIT_CFG (24'h000006), // + .QPLL_LOCK_CFG (16'h05E8), // Optimized for IES + .QPLL_LPF ( 4'hD), // Optimized for IES, [1:0] = 2'b00 (13.3 KOhm), [1:0] = 2'b01 (57.0 KOhm) + .QPLL_REFCLK_DIV ( 1), // + .QPLL_RP_COMP ( 1'd0), // GTH new + .QPLL_VTRL_RESET ( 2'd0), // GTH new + + //---------- MISC ------------------------------------------------------ + .BIAS_CFG (64'h0000040000001050), // Optimized for GES + .COMMON_CFG (32'd0), // + .RCAL_CFG ( 2'b00), // GTH new + .RSVD_ATTR0 (16'd0), // GTH + .RSVD_ATTR1 (16'd0) // GTH + ) + gthe2_common_i + ( + + //---------- Clock ----------------------------------------------------- + .GTGREFCLK ( 1'd0), // + .GTREFCLK0 (QPLL_GTGREFCLK), // + .GTREFCLK1 ( 1'd0), // + .GTNORTHREFCLK0 ( 1'd0), // + .GTNORTHREFCLK1 ( 1'd0), // + .GTSOUTHREFCLK0 ( 1'd0), // + .GTSOUTHREFCLK1 ( 1'd0), // + .QPLLLOCKDETCLK (QPLL_QPLLLOCKDETCLK), // + .QPLLLOCKEN ( 1'd1), // + .QPLLREFCLKSEL ( 3'd1), // + .QPLLRSVD1 (16'd0), // + .QPLLRSVD2 ( 5'b11111), // + + .QPLLOUTCLK (QPLL_QPLLOUTCLK), // + .QPLLOUTREFCLK (QPLL_QPLLOUTREFCLK), // + .QPLLLOCK (QPLL_QPLLLOCK), // + .QPLLFBCLKLOST (), // + .QPLLREFCLKLOST (), // + .QPLLDMONITOR (), // + + //---------- Reset ----------------------------------------------------- + .QPLLPD (QPLL_QPLLPD), // + .QPLLRESET (QPLL_QPLLRESET), // + .QPLLOUTRESET ( 1'd0), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (QPLL_DRPCLK), // + .DRPADDR (QPLL_DRPADDR), // + .DRPEN (QPLL_DRPEN), // + .DRPDI (QPLL_DRPDI), // + .DRPWE (QPLL_DRPWE), // + + .DRPDO (QPLL_DRPDO), // + .DRPRDY (QPLL_DRPRDY), // + + //---------- Band Gap -------------------------------------------------- + .BGBYPASSB ( 1'd1), // Optimized for IES + .BGMONITORENB ( 1'd1), // Optimized for IES + .BGPDB ( 1'd1), // Optimized for IES + .BGRCALOVRD ( 5'd31), // Optimized for IES + .BGRCALOVRDENB ( 1'd1), // GTH, Optimized for IES + + //---------- MISC ------------------------------------------------------ + .PMARSVD ( 8'd0), // + .RCALENB ( 1'd1), // Optimized for IES + + .REFCLKOUTMONITOR (), // + .PMARSVDOUT () // GTH + + ); + + end + +else + + //---------- GTX Common ---------------------------------------------------- + begin : gtx_common + + //---------- GTX Common Module --------------------------------------------- + GTXE2_COMMON # + ( + + //---------- Simulation Attributes ------------------------------------- + .SIM_QPLLREFCLK_SEL ( 3'b001), // + .SIM_RESET_SPEEDUP (PCIE_SIM_MODE), // + .SIM_VERSION (PCIE_USE_MODE), // + + //---------- Clock Attributes ------------------------------------------ + .QPLL_CFG (27'h06801C1), // QPLL for Gen3, Optimized for silicon, + //.QPLL_CLKOUT_CFG ( 4'd0), // + .QPLL_COARSE_FREQ_OVRD ( 6'b010000), // + .QPLL_COARSE_FREQ_OVRD_EN ( 1'd0), // + .QPLL_CP (10'h01F), // Optimized for Gen3 compliance (Gen1/Gen2 = 10'h1FF) + .QPLL_CP_MONITOR_EN ( 1'd0), // + .QPLL_DMONITOR_SEL ( 1'd0), // + .QPLL_FBDIV (QPLL_FBDIV), // + .QPLL_FBDIV_MONITOR_EN ( 1'd0), // + .QPLL_FBDIV_RATIO ( 1'd1), // Optimized for silicon + //.QPLL_INIT_CFG (24'h000006), // + .QPLL_LOCK_CFG (16'h21E8), // Optimized for silicon, IES = 16'h01D0, GES 16'h21D0 + .QPLL_LPF ( 4'hD), // Optimized for silicon, [1:0] = 2'b00 (13.3 KOhm), [1:0] = 2'b01 (57.0 KOhm) + .QPLL_REFCLK_DIV (1), // + + //---------- MISC ------------------------------------------------------ + .BIAS_CFG (BIAS_CFG) // Optimized for silicon + //.COMMON_CFG (32'd0) // + + ) + gtxe2_common_i + ( + + //---------- Clock ----------------------------------------------------- + .GTGREFCLK ( 1'd0), // + .GTREFCLK0 (QPLL_GTGREFCLK), // + .GTREFCLK1 ( 1'd0), // + .GTNORTHREFCLK0 ( 1'd0), // + .GTNORTHREFCLK1 ( 1'd0), // + .GTSOUTHREFCLK0 ( 1'd0), // + .GTSOUTHREFCLK1 ( 1'd0), // + .QPLLLOCKDETCLK (QPLL_QPLLLOCKDETCLK), // + .QPLLLOCKEN ( 1'd1), // + .QPLLREFCLKSEL ( 3'd1), // + .QPLLRSVD1 (16'd0), // + .QPLLRSVD2 ( 5'b11111), // + + .QPLLOUTCLK (QPLL_QPLLOUTCLK), // + .QPLLOUTREFCLK (QPLL_QPLLOUTREFCLK), // + .QPLLLOCK (QPLL_QPLLLOCK), // + .QPLLFBCLKLOST (), // + .QPLLREFCLKLOST (), // + .QPLLDMONITOR (), // + + //---------- Reset ----------------------------------------------------- + .QPLLPD (QPLL_QPLLPD), // + .QPLLRESET (QPLL_QPLLRESET), // + .QPLLOUTRESET ( 1'd0), // + + //---------- DRP ------------------------------------------------------- + .DRPCLK (QPLL_DRPCLK), // + .DRPADDR (QPLL_DRPADDR), // + .DRPEN (QPLL_DRPEN), // + .DRPDI (QPLL_DRPDI), // + .DRPWE (QPLL_DRPWE), // + + .DRPDO (QPLL_DRPDO), // + .DRPRDY (QPLL_DRPRDY), // + + //---------- Band Gap -------------------------------------------------- + .BGBYPASSB ( 1'd1), // + .BGMONITORENB ( 1'd1), // + .BGPDB ( 1'd1), // + .BGRCALOVRD ( 5'd31), // + + //---------- MISC ------------------------------------------------------ + .PMARSVD ( 8'd0), // + .RCALENB ( 1'd1), // Optimized for GES + + .REFCLKOUTMONITOR () // + + ); + + end + +endgenerate + +pcie_7x_0_gtp_cpllpd_ovrd cpllPDInst ( + .i_ibufds_gte2(QPLL_CPLLPDREFCLK), + .o_cpllpd_ovrd(cpllpd), + .o_cpllreset_ovrd(cpllrst)); + + +endmodule + + diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_rxeq_scan.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_rxeq_scan.v new file mode 100644 index 0000000000000000000000000000000000000000..b87bfdae58ad978c97d499d3f3343a99235661a4 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/pcie_7x/zdma/pcie_7x_0_rxeq_scan.v @@ -0,0 +1,367 @@ + +//----------------------------------------------------------------------------- +// +// (c) Copyright 2020-2024 Advanced Micro Devices, Inc. All rights reserved. +// +// This file contains confidential and proprietary information +// of AMD and is protected under U.S. and +// international copyright and other intellectual property +// laws. +// +// DISCLAIMER +// This disclaimer is not a license and does not grant any +// rights to the materials distributed herewith. Except as +// otherwise provided in a valid license issued to you by +// AMD, and to the maximum extent permitted by applicable +// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES +// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +// (2) AMD shall not be liable (whether in contract or tort, +// including negligence, or under any other theory of +// liability) for any loss or damage of any kind or nature +// related to, arising under or in connection with these +// materials, including for any direct, or any indirect, +// special, incidental, or consequential loss or damage +// (including loss of data, profits, goodwill, or any type of +// loss or damage suffered as a result of any action brought +// by a third party) even if such damage or loss was +// reasonably foreseeable or AMD had been advised of the +// possibility of the same. +// +// CRITICAL APPLICATIONS +// AMD products are not designed or intended to be fail- +// safe, or for use in any application requiring fail-safe +// performance, such as life-support or safety devices or +// systems, Class III medical devices, nuclear facilities, +// applications related to the deployment of airbags, or any +// other applications that could lead to death, personal +// injury, or severe property or environmental damage +// (individually and collectively, "Critical +// Applications"). Customer assumes the sole risk and +// liability of any use of AMD products in Critical +// Applications, subject only to applicable laws and +// regulations governing limitations on product liability. +// +// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +// PART OF THIS FILE AT ALL TIMES. +// +//----------------------------------------------------------------------------- +// Project : Series-7 Integrated Block for PCI Express +// File : pcie_7x_0_rxeq_scan.v +// Version : 3.3 +//------------------------------------------------------------------------------ +// Filename : rxeq_scan.v +// Description : PIPE RX Equalization Eye Scan Module for 7 Series Transceiver +// Version : 18.0 +//------------------------------------------------------------------------------ + + +`timescale 1ns / 1ps + + + +//---------- RXEQ Eye Scan Module ---------------------------------------------- +(* DowngradeIPIdentifiedWarnings = "yes" *) +module pcie_7x_0_rxeq_scan # +( + + parameter PCIE_SIM_MODE = "FALSE", // PCIe sim mode + parameter PCIE_GT_DEVICE = "GTX", // PCIe GT device + parameter PCIE_RXEQ_MODE_GEN3 = 1, // PCIe RX equalization mode + parameter CONVERGE_MAX = 22'd3125000, // Convergence max count (12ms) + parameter CONVERGE_MAX_BYPASS = 22'd2083333 // Convergence max count for phase2/3 bypass mode (8ms) +) + +( + + //---------- Input ------------------------------------- + input RXEQSCAN_CLK, + input RXEQSCAN_RST_N, + + input [ 1:0] RXEQSCAN_CONTROL, + input [ 2:0] RXEQSCAN_PRESET, + input RXEQSCAN_PRESET_VALID, + input [ 3:0] RXEQSCAN_TXPRESET, + input [17:0] RXEQSCAN_TXCOEFF, + input RXEQSCAN_NEW_TXCOEFF_REQ, + input [ 5:0] RXEQSCAN_FS, + input [ 5:0] RXEQSCAN_LF, + + + //---------- Output ------------------------------------ + output RXEQSCAN_PRESET_DONE, + output [17:0] RXEQSCAN_NEW_TXCOEFF, + output RXEQSCAN_NEW_TXCOEFF_DONE, + output RXEQSCAN_LFFS_SEL, + output RXEQSCAN_ADAPT_DONE + +); + + //---------- Input Register ---------------------------- +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 2:0] preset_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg preset_valid_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 3:0] txpreset_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [17:0] txcoeff_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg new_txcoeff_req_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 5:0] fs_reg1; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 5:0] lf_reg1; + +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 2:0] preset_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg preset_valid_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 3:0] txpreset_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [17:0] txcoeff_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg new_txcoeff_req_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 5:0] fs_reg2; +(* ASYNC_REG = "TRUE", SHIFT_EXTRACT = "NO" *) reg [ 5:0] lf_reg2; + + //---------- Internal Signals -------------------------- + reg adapt_done_cnt = 1'd0; + + //---------- Output Register --------------------------- + reg preset_done = 1'd0; + reg [21:0] converge_cnt = 22'd0; + reg [17:0] new_txcoeff = 18'd0; + reg new_txcoeff_done = 1'd0; + reg lffs_sel = 1'd0; + reg adapt_done = 1'd0; + reg [ 3:0] fsm = 4'd0; + + //---------- FSM --------------------------------------- + localparam FSM_IDLE = 4'b0001; + localparam FSM_PRESET = 4'b0010; + localparam FSM_CONVERGE = 4'b0100; + localparam FSM_NEW_TXCOEFF_REQ = 4'b1000; + + //---------- Simulation Speedup ------------------------ + // Gen3: 32 bits / PCLK : 1 million bits / X PCLK + // X = + //------------------------------------------------------ + localparam converge_max_cnt = (PCIE_SIM_MODE == "TRUE") ? 22'd1000 : CONVERGE_MAX; + localparam converge_max_bypass_cnt = (PCIE_SIM_MODE == "TRUE") ? 22'd1000 : CONVERGE_MAX_BYPASS; + + + +//---------- Input FF ---------------------------------------------------------- +always @ (posedge RXEQSCAN_CLK) +begin + + if (!RXEQSCAN_RST_N) + begin + //---------- 1st Stage FF -------------------------- + preset_reg1 <= 3'd0; + preset_valid_reg1 <= 1'd0; + txpreset_reg1 <= 4'd0; + txcoeff_reg1 <= 18'd0; + new_txcoeff_req_reg1 <= 1'd0; + fs_reg1 <= 6'd0; + lf_reg1 <= 6'd0; + //---------- 2nd Stage FF -------------------------- + preset_reg2 <= 3'd0; + preset_valid_reg2 <= 1'd0; + txpreset_reg2 <= 4'd0; + txcoeff_reg2 <= 18'd0; + new_txcoeff_req_reg2 <= 1'd0; + fs_reg2 <= 6'd0; + lf_reg2 <= 6'd0; + end + else + begin + //---------- 1st Stage FF -------------------------- + preset_reg1 <= RXEQSCAN_PRESET; + preset_valid_reg1 <= RXEQSCAN_PRESET_VALID; + txpreset_reg1 <= RXEQSCAN_TXPRESET; + txcoeff_reg1 <= RXEQSCAN_TXCOEFF; + new_txcoeff_req_reg1 <= RXEQSCAN_NEW_TXCOEFF_REQ; + fs_reg1 <= RXEQSCAN_FS; + lf_reg1 <= RXEQSCAN_LF; + //---------- 2nd Stage FF -------------------------- + preset_reg2 <= preset_reg1; + preset_valid_reg2 <= preset_valid_reg1; + txpreset_reg2 <= txpreset_reg1; + txcoeff_reg2 <= txcoeff_reg1; + new_txcoeff_req_reg2 <= new_txcoeff_req_reg1; + fs_reg2 <= fs_reg1; + lf_reg2 <= lf_reg1; + end + +end + + + +//---------- Eye Scan ---------------------------------------------------------- +always @ (posedge RXEQSCAN_CLK) +begin + + if (!RXEQSCAN_RST_N) + begin + fsm <= FSM_IDLE; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= 18'd0; + new_txcoeff_done <= 1'd0; + lffs_sel <= 1'd0; + adapt_done <= 1'd0; + adapt_done_cnt <= 1'd0; + end + else + + begin + + case (fsm) + + //---------- Idle State ---------------------------- + FSM_IDLE : + + begin + + //---------- Process RXEQ Preset --------------- + if (preset_valid_reg2) + begin + fsm <= FSM_PRESET; + preset_done <= 1'd1; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= 1'd0; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + //---------- Request New TX Coefficient -------- + else if (new_txcoeff_req_reg2) + begin + fsm <= FSM_CONVERGE; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + //new_txcoeff <= (PCIE_RXEQ_MODE_GEN3 == 0) ? txcoeff_reg2 : 18'd4; // Default + new_txcoeff <= (PCIE_RXEQ_MODE_GEN3 == 0) ? txcoeff_reg2 : (PCIE_GT_DEVICE == "GTX") ? 18'd5 : 18'd4; // Optimized for Gen3 RX JTOL + new_txcoeff_done <= 1'd0; + lffs_sel <= (PCIE_RXEQ_MODE_GEN3 == 0) ? 1'd0 : 1'd1; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + //---------- Default --------------------------- + else + begin + fsm <= FSM_IDLE; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= 1'd0; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + + end + + //---------- Process RXEQ Preset ------------------- + FSM_PRESET : + + begin + fsm <= (!preset_valid_reg2) ? FSM_IDLE : FSM_PRESET; + preset_done <= 1'd1; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= 1'd0; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + + //---------- Wait for Convergence ------------------ + FSM_CONVERGE : + + begin + if ((adapt_done_cnt == 1'd0) && (RXEQSCAN_CONTROL == 2'd2)) + begin + fsm <= FSM_NEW_TXCOEFF_REQ; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= lffs_sel; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + else + begin + + //---------- Phase2/3 ---------------------- + if (RXEQSCAN_CONTROL == 2'd2) + fsm <= (converge_cnt == converge_max_cnt) ? FSM_NEW_TXCOEFF_REQ : FSM_CONVERGE; + //---------- Phase2/3 Bypass --------------- + else + fsm <= (converge_cnt == converge_max_bypass_cnt) ? FSM_NEW_TXCOEFF_REQ : FSM_CONVERGE; + + preset_done <= 1'd0; + converge_cnt <= converge_cnt + 1'd1; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= lffs_sel; + adapt_done <= 1'd0; + adapt_done_cnt <= adapt_done_cnt; + end + end + + //---------- Request New TX Coefficient ------------ + FSM_NEW_TXCOEFF_REQ : + + begin + if (!new_txcoeff_req_reg2) + begin + fsm <= FSM_IDLE; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd0; + lffs_sel <= lffs_sel; + adapt_done <= 1'd0; + adapt_done_cnt <= (RXEQSCAN_CONTROL == 2'd3) ? 1'd0 : adapt_done_cnt + 1'd1; + end + else + begin + fsm <= FSM_NEW_TXCOEFF_REQ; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= new_txcoeff; + new_txcoeff_done <= 1'd1; + lffs_sel <= lffs_sel; + adapt_done <= (adapt_done_cnt == 1'd1) || (RXEQSCAN_CONTROL == 2'd3); + adapt_done_cnt <= adapt_done_cnt; + end + end + + //---------- Default State ------------------------- + default : + + begin + fsm <= FSM_IDLE; + preset_done <= 1'd0; + converge_cnt <= 22'd0; + new_txcoeff <= 18'd0; + new_txcoeff_done <= 1'd0; + lffs_sel <= 1'd0; + adapt_done <= 1'd0; + adapt_done_cnt <= 1'd0; + end + + endcase + + end + +end + + + +//---------- RXEQ Eye Scan Output ---------------------------------------------- +assign RXEQSCAN_PRESET_DONE = preset_done; +assign RXEQSCAN_NEW_TXCOEFF = new_txcoeff; +assign RXEQSCAN_NEW_TXCOEFF_DONE = new_txcoeff_done; +assign RXEQSCAN_LFFS_SEL = lffs_sel; +assign RXEQSCAN_ADAPT_DONE = adapt_done; + + + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_com.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_com.sv new file mode 100644 index 0000000000000000000000000000000000000000..8731ddc777f51a3aef1b1769655abc5392b23f6f --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_com.sv @@ -0,0 +1,248 @@ +// +// PCILeech Buffered Communication Core for either: +// - FT601 USB3. +// - FPGA RMII ETHERNET. +// +// +// (c) Ulf Frisk, 2019-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps +//`define ENABLE_ETH +`define ENABLE_FT601 + +module pcileech_com ( + // SYS + input clk, // 100MHz SYSTEM CLK + input clk_com, // COMMUNICATION CORE CLK + input rst, + output led_state_txdata, + input led_state_invert, + + // TO/FROM FIFO + IfComToFifo.mp_com dfifo, + +`ifdef ENABLE_FT601 + // FT601 + inout [31:0] ft601_data, + output [3:0] ft601_be, + input ft601_rxf_n, + input ft601_txe_n, + output ft601_wr_n, + output ft601_siwu_n, + output ft601_rd_n, + output ft601_oe_n +`endif /* ENABLE_FT601 */ +`ifdef ENABLE_ETH + // ETH + output eth_clk50, + output eth_rst_n, + input [1:0] eth_rx_data, + input eth_crs_dv, + output eth_tx_en, + output [1:0] eth_tx_data, + output eth_mdc, + inout eth_mdio, + input eth_rx_err, + input [31:0] eth_cfg_static_addr, + input eth_cfg_static_force, + input [15:0] eth_cfg_port, + output eth_led_state_red, + output eth_led_state_green +`endif /* ENABLE_ETH */ + ); + + // ---------------------------------------------------------------------------- + // COMMUNICATION CORE INITIAL ON-BOARD DEFAULT RX-DATA + // Sometimes there is a need to perform actions - such as setting DRP-related + // values before the PCIe core is brought online. This is possible by specify + // "virtual" COM-core initial transmitted values below. + // ---------------------------------------------------------------------------- + + bit [63:0] initial_rx [5] = '{ + // Modify data below to set own actions - examples: + // - send some initial TLP on core startup. + // - set initial VID/PID if PCIe core has been modified. + // - write to DRP memory space to alter the core. + // replace / expand on dummy values below - for syntax of each 64-bit word + // please consult sources and also device_fpga.c in the LeechCore project. + 64'h00000000_00000000, + 64'h00000000_00000000, + 64'h00000000_00000000, + 64'h00000000_00000000, + + // Bring the PCIe core online from initial hot-reset state. This is done by + // setting control bit in PCIleech FIFO CMD register. This should ideally be + // done after DRP&Config actions are completed - but before sending PCIe TLPs. + 64'h00000003_80182377 + }; + + time tickcount64 = 0; + always @ ( posedge clk ) + tickcount64 <= rst ? 0 : tickcount64 + 1; + + time tickcount64_com = 0; + always @ ( posedge clk_com ) + tickcount64_com <= rst ? 0 : tickcount64_com + 1; + + wire initial_rx_valid = ~rst & (tickcount64 >= 16) & (tickcount64 < $size(initial_rx) + 16); + wire [63:0] initial_rx_data = initial_rx_valid ? initial_rx[tickcount64 - 16] : 64'h0; + + // ---------------------------------------------------------------------------- + // COMMUNICATION CORE RX DATA BELOW: + // 1: convert 32-bit signal into 64-bit signal using logic. + // 2: change clock domain from clk_com to clk using a very shallow fifo. + // due to previous 32->64 conversion this will be fine if: 2*clk_com < clk. + // ---------------------------------------------------------------------------- + + wire [31:0] com_rx_data32; + wire com_rx_valid32; + reg [63:0] com_rx_data64; + reg [1:0] com_rx_valid64_dw; + wire com_rx_valid64 = com_rx_valid64_dw[0] & com_rx_valid64_dw[1]; + wire [63:0] com_rx_dout; + wire com_rx_valid; + + always @ ( posedge clk_com ) + if ( rst | (~com_rx_valid32 & com_rx_valid64_dw[0] & com_rx_valid64_dw[1]) ) + com_rx_valid64_dw <= 2'b00; + else if ( com_rx_valid32 && (com_rx_data32 == 32'h66665555) && (com_rx_data64[31:0] == 32'h66665555) ) + // resync logic to allow the host to send resync data that will + // allow bitstream to sync to proper 32->64-bit sequence in case + // it should have happen to get out of sync at startup/shutdown. + com_rx_valid64_dw <= 2'b00; + else if ( com_rx_valid32 ) + begin + com_rx_data64 <= (com_rx_data64 << 32) | com_rx_data32; + com_rx_valid64_dw <= (com_rx_valid64_dw == 2'b01) ? 2'b11 : 2'b01; + end + + fifo_64_64_clk2_comrx i_fifo_64_64_clk2_comrx( + .rst ( rst | (tickcount64_com<2) ), + .wr_clk ( clk_com ), + .rd_clk ( clk ), + .din ( com_rx_data64 ), + .wr_en ( com_rx_valid64 ), + .rd_en ( 1'b1 ), + .dout ( com_rx_dout ), + .full ( ), + .empty ( ), + .valid ( com_rx_valid ) + ); + + assign dfifo.com_dout = initial_rx_valid ? initial_rx_data : com_rx_dout; + assign dfifo.com_dout_valid = initial_rx_valid | com_rx_valid; + + // ---------------------------------------------------------------------------- + // COMMUNICATION CORE TX DATA BELOW: + // ---------------------------------------------------------------------------- + + wire [31:0] core_din; + wire core_din_empty; + wire core_din_wr_en; + wire core_din_ready; + + wire [31:0] com_tx_data; + wire com_tx_wr_en; + wire com_tx_almost_full; + wire com_tx_prog_full; + wire com_tx_prog_empty; + + wire out_buffer1_almost_full; + + assign dfifo.com_din_ready = ~out_buffer1_almost_full; + assign led_state_txdata = com_tx_prog_full ^ led_state_invert; + + fifo_32_32_clk1_comtx i_fifo_32_32_clk2_comtx( + .clk ( clk_com ), + .srst ( rst ), + .din ( com_tx_data ), + .wr_en ( com_tx_wr_en ), + .rd_en ( core_din_ready ), + .dout ( core_din ), + .full ( ), + .almost_full ( com_tx_almost_full ), + .empty ( core_din_empty ), + .prog_empty ( com_tx_prog_empty ), // threshold = 3 + .prog_full ( com_tx_prog_full ), // threshold = 6 + .valid ( core_din_wr_en ) + ); + fifo_256_32_clk2_comtx i_fifo_256_32_clk2_comtx( + .rd_clk ( clk_com ), + .wr_clk ( clk ), + .rst ( rst ), + .din ( dfifo.com_din ), + .wr_en ( dfifo.com_din_wr_en ), + .rd_en ( ~com_tx_almost_full ), + .dout ( com_tx_data ), + .full ( ), + .almost_full ( out_buffer1_almost_full ), + .empty ( ), + .valid ( com_tx_wr_en ) + ); + + // ---------------------------------------------------- + // FT601 USB3 BELOW: + // ---------------------------------------------------- +`ifdef ENABLE_FT601 + + pcileech_ft601 i_pcileech_ft601( + // SYS + .clk ( clk_com ), + .rst ( rst ), + // TO/FROM FT601 PADS + .FT601_DATA ( ft601_data ), + .FT601_BE ( ft601_be ), + .FT601_TXE_N ( ft601_txe_n ), + .FT601_RXF_N ( ft601_rxf_n ), + .FT601_SIWU_N ( ft601_siwu_n ), + .FT601_WR_N ( ft601_wr_n ), + .FT601_RD_N ( ft601_rd_n ), + .FT601_OE_N ( ft601_oe_n ), + // TO/FROM FIFO + .dout ( com_rx_data32 ), // -> [31:0] + .dout_valid ( com_rx_valid32 ), // -> + .din ( core_din ), // <- [31:0] + .din_wr_en ( core_din_wr_en ), // <- + .din_req_data ( core_din_ready ) // -> + ); +`endif /* ENABLE_FT601 */ + + // ---------------------------------------------------- + // UDP Ethernet Below: + // ---------------------------------------------------- +`ifdef ENABLE_ETH + + pcileech_eth i_pcileech_eth( + // SYS + .clk ( clk_com ), + .rst ( rst ), + // MAC/RMII + .eth_clk50 ( eth_clk50 ), + .eth_rst_n ( eth_rst_n ), + .eth_crs_dv ( eth_crs_dv ), + .eth_rx_data ( eth_rx_data ), + .eth_rx_err ( eth_rx_err ), + .eth_tx_en ( eth_tx_en ), + .eth_tx_data ( eth_tx_data ), + .eth_mdc ( eth_mdc ), + .eth_mdio ( eth_mdio ), + // CFG + .cfg_static_addr ( eth_cfg_static_addr ), // <- [31:0] + .cfg_static_force ( eth_cfg_static_force ), // <- + .cfg_port ( eth_cfg_port ), // <- [15:0] + // State and Activity LEDs + .led_state_red ( eth_led_state_red ), // -> + .led_state_green ( eth_led_state_green ), // -> + // TO/FROM FIFO + .dout ( com_rx_data32 ), // -> [31:0] + .dout_valid ( com_rx_valid32 ), // -> + .din ( core_din ), // <- [31:0] + .din_empty ( core_din_empty ), // <- + .din_wr_en ( core_din_wr_en ), // <- + .din_ready ( core_din_ready ) // -> + ); +`endif /* ENABLE_ETH */ + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_com_e.v b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_com_e.v new file mode 100644 index 0000000000000000000000000000000000000000..2ea706d0d1e7cb24c488f7a487d9df252183525b --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_com_e.v @@ -0,0 +1,38360 @@ +// Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. +// Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. +// -------------------------------------------------------------------------------- +// Tool Version: Vivado v.2023.2 (win64) Build 4029153 Fri Oct 13 20:14:34 MDT 2023 +// Date : Sat Jan 20 23:33:41 2024 +// Host : AD-VIVADO running 64-bit major release (build 9200) +// Command : write_verilog -force ./pcileech_com_e.v +// Design : pcileech_com +// Purpose : This is a Verilog netlist of the current design or from a specific cell of the design. The output is an +// IEEE 1364-2001 compliant Verilog HDL file that contains netlist information obtained from the input +// design files. +// Device : xc7a100tfgg484-2 +// -------------------------------------------------------------------------------- +`timescale 1 ps / 1 ps + +(* DEV_W = "5" *) (* SYS_W = "5" *) (* core_generation_info = "ip1,selectio_wiz_v5_1_17,{component_name=ip1,bus_dir=INPUTS,bus_sig_type=SINGLE,bus_io_std=LVCMOS18,use_serialization=false,use_phase_detector=false,serialization_factor=4,enable_bitslip=false,enable_train=false,system_data_width=5,bus_in_delay=NONE,bus_out_delay=NONE,clk_sig_type=SINGLE,clk_io_std=LVCMOS18,clk_buf=BUFIO2,active_edge=RISING,clk_delay=NONE,selio_bus_in_delay=NONE,selio_bus_out_delay=NONE,selio_clk_buf=MMCM,selio_active_edge=SDR,selio_ddr_alignment=SAME_EDGE_PIPELINED,selio_oddr_alignment=SAME_EDGE,ddr_alignment=C0,selio_interface_type=NETWORKING,interface_type=NETWORKING,selio_bus_in_tap=0,selio_bus_out_tap=0,selio_clk_io_std=LVCMOS18,selio_clk_sig_type=SINGLE}" *) +module ip1 + (data_in_from_pins, + data_in_to_device, + clk_in, + io_reset); + input [4:0]data_in_from_pins; + output [4:0]data_in_to_device; + input clk_in; + input io_reset; + + wire clk_in; + wire [4:0]data_in_from_pins; + wire [4:0]data_in_to_device; + wire io_reset; + + (* DEV_W = "5" *) + (* SYS_W = "5" *) + ip1_selectio_wiz inst + (.clk_in(clk_in), + .data_in_from_pins(data_in_from_pins), + .data_in_to_device(data_in_to_device), + .io_reset(io_reset)); +endmodule + +(* DEV_W = "5" *) (* SYS_W = "5" *) +module ip1_selectio_wiz + (data_in_from_pins, + data_in_to_device, + clk_in, + io_reset); + input [4:0]data_in_from_pins; + output [4:0]data_in_to_device; + input clk_in; + input io_reset; + + wire \ ; + wire clk_in; + wire [4:0]data_in_from_pins; + wire [4:0]data_in_from_pins_int; + wire [4:0]data_in_to_device; + wire io_reset; + + VCC VCC + (.P(\ )); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[0].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[0]), + .Q(data_in_to_device[0]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[0].ibuf_inst + (.I(data_in_from_pins[0]), + .O(data_in_from_pins_int[0])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[1].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[1]), + .Q(data_in_to_device[1]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[1].ibuf_inst + (.I(data_in_from_pins[1]), + .O(data_in_from_pins_int[1])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[2].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[2]), + .Q(data_in_to_device[2]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[2].ibuf_inst + (.I(data_in_from_pins[2]), + .O(data_in_from_pins_int[2])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[3].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[3]), + .Q(data_in_to_device[3]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[3].ibuf_inst + (.I(data_in_from_pins[3]), + .O(data_in_from_pins_int[3])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[4].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[4]), + .Q(data_in_to_device[4]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[4].ibuf_inst + (.I(data_in_from_pins[4]), + .O(data_in_from_pins_int[4])); +endmodule + +(* DEV_W = "16" *) (* SYS_W = "16" *) (* core_generation_info = "ip2,selectio_wiz_v5_1_17,{component_name=ip2,bus_dir=INPUTS,bus_sig_type=SINGLE,bus_io_std=LVCMOS18,use_serialization=false,use_phase_detector=false,serialization_factor=4,enable_bitslip=false,enable_train=false,system_data_width=16,bus_in_delay=NONE,bus_out_delay=NONE,clk_sig_type=SINGLE,clk_io_std=LVCMOS18,clk_buf=BUFIO2,active_edge=RISING,clk_delay=NONE,selio_bus_in_delay=NONE,selio_bus_out_delay=NONE,selio_clk_buf=MMCM,selio_active_edge=SDR,selio_ddr_alignment=SAME_EDGE_PIPELINED,selio_oddr_alignment=SAME_EDGE,ddr_alignment=C0,selio_interface_type=NETWORKING,interface_type=NETWORKING,selio_bus_in_tap=0,selio_bus_out_tap=0,selio_clk_io_std=LVCMOS18,selio_clk_sig_type=SINGLE}" *) +module ip2 + (data_in_from_pins, + data_in_to_device, + clk_in, + io_reset); + input [15:0]data_in_from_pins; + output [15:0]data_in_to_device; + input clk_in; + input io_reset; + + wire clk_in; + wire [15:0]data_in_from_pins; + wire [15:0]data_in_to_device; + wire io_reset; + + (* DEV_W = "16" *) + (* SYS_W = "16" *) + ip2_selectio_wiz inst + (.clk_in(clk_in), + .data_in_from_pins(data_in_from_pins), + .data_in_to_device(data_in_to_device), + .io_reset(io_reset)); +endmodule + +(* DEV_W = "16" *) (* SYS_W = "16" *) +module ip2_selectio_wiz + (data_in_from_pins, + data_in_to_device, + clk_in, + io_reset); + input [15:0]data_in_from_pins; + output [15:0]data_in_to_device; + input clk_in; + input io_reset; + + wire \ ; + wire clk_in; + wire [15:0]data_in_from_pins; + wire [15:0]data_in_from_pins_int; + wire [15:0]data_in_to_device; + wire io_reset; + + VCC VCC + (.P(\ )); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[0].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[0]), + .Q(data_in_to_device[0]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[0].ibuf_inst + (.I(data_in_from_pins[0]), + .O(data_in_from_pins_int[0])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[10].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[10]), + .Q(data_in_to_device[10]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[10].ibuf_inst + (.I(data_in_from_pins[10]), + .O(data_in_from_pins_int[10])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[11].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[11]), + .Q(data_in_to_device[11]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[11].ibuf_inst + (.I(data_in_from_pins[11]), + .O(data_in_from_pins_int[11])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[12].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[12]), + .Q(data_in_to_device[12]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[12].ibuf_inst + (.I(data_in_from_pins[12]), + .O(data_in_from_pins_int[12])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[13].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[13]), + .Q(data_in_to_device[13]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[13].ibuf_inst + (.I(data_in_from_pins[13]), + .O(data_in_from_pins_int[13])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[14].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[14]), + .Q(data_in_to_device[14]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[14].ibuf_inst + (.I(data_in_from_pins[14]), + .O(data_in_from_pins_int[14])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[15].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[15]), + .Q(data_in_to_device[15]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[15].ibuf_inst + (.I(data_in_from_pins[15]), + .O(data_in_from_pins_int[15])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[1].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[1]), + .Q(data_in_to_device[1]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[1].ibuf_inst + (.I(data_in_from_pins[1]), + .O(data_in_from_pins_int[1])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[2].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[2]), + .Q(data_in_to_device[2]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[2].ibuf_inst + (.I(data_in_from_pins[2]), + .O(data_in_from_pins_int[2])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[3].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[3]), + .Q(data_in_to_device[3]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[3].ibuf_inst + (.I(data_in_from_pins[3]), + .O(data_in_from_pins_int[3])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[4].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[4]), + .Q(data_in_to_device[4]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[4].ibuf_inst + (.I(data_in_from_pins[4]), + .O(data_in_from_pins_int[4])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[5].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[5]), + .Q(data_in_to_device[5]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[5].ibuf_inst + (.I(data_in_from_pins[5]), + .O(data_in_from_pins_int[5])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[6].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[6]), + .Q(data_in_to_device[6]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[6].ibuf_inst + (.I(data_in_from_pins[6]), + .O(data_in_from_pins_int[6])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[7].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[7]), + .Q(data_in_to_device[7]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[7].ibuf_inst + (.I(data_in_from_pins[7]), + .O(data_in_from_pins_int[7])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[8].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[8]), + .Q(data_in_to_device[8]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[8].ibuf_inst + (.I(data_in_from_pins[8]), + .O(data_in_from_pins_int[8])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[9].fdre_in_inst + (.C(clk_in), + .CE(\ ), + .D(data_in_from_pins_int[9]), + .Q(data_in_to_device[9]), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* IBUF_DELAY_VALUE = "0" *) + (* IFD_DELAY_VALUE = "AUTO" *) + (* box_type = "PRIMITIVE" *) + IBUF \pins[9].ibuf_inst + (.I(data_in_from_pins[9]), + .O(data_in_from_pins_int[9])); +endmodule + +(* DEV_W = "5" *) (* SYS_W = "5" *) (* core_generation_info = "ip3,selectio_wiz_v5_1_17,{component_name=ip3,bus_dir=OUTPUTS,bus_sig_type=SINGLE,bus_io_std=LVCMOS18,use_serialization=false,use_phase_detector=false,serialization_factor=4,enable_bitslip=false,enable_train=false,system_data_width=5,bus_in_delay=NONE,bus_out_delay=NONE,clk_sig_type=SINGLE,clk_io_std=LVCMOS18,clk_buf=BUFIO2,active_edge=RISING,clk_delay=NONE,selio_bus_in_delay=NONE,selio_bus_out_delay=NONE,selio_clk_buf=MMCM,selio_active_edge=SDR,selio_ddr_alignment=SAME_EDGE_PIPELINED,selio_oddr_alignment=SAME_EDGE,ddr_alignment=C0,selio_interface_type=NETWORKING,interface_type=NETWORKING,selio_bus_in_tap=0,selio_bus_out_tap=0,selio_clk_io_std=LVCMOS18,selio_clk_sig_type=SINGLE}" *) +module ip3 + (data_out_from_device, + data_out_to_pins, + clk_in, + io_reset); + input [4:0]data_out_from_device; + output [4:0]data_out_to_pins; + input clk_in; + input io_reset; + + wire clk_in; + wire [4:0]data_out_from_device; + wire [4:0]data_out_to_pins; + wire io_reset; + + (* DEV_W = "5" *) + (* SYS_W = "5" *) + ip3_selectio_wiz inst + (.clk_in(clk_in), + .data_out_from_device(data_out_from_device), + .data_out_to_pins(data_out_to_pins), + .io_reset(io_reset)); +endmodule + +(* DEV_W = "5" *) (* SYS_W = "5" *) +module ip3_selectio_wiz + (data_out_from_device, + data_out_to_pins, + clk_in, + io_reset); + input [4:0]data_out_from_device; + output [4:0]data_out_to_pins; + input clk_in; + input io_reset; + + wire \ ; + wire clk_in; + wire [4:0]data_out_from_device; + wire [4:0]data_out_to_pins; + wire io_reset; + wire \pins[0].data_out_from_device_q ; + wire \pins[1].data_out_from_device_q ; + wire \pins[2].data_out_from_device_q ; + wire \pins[3].data_out_from_device_q ; + wire \pins[4].data_out_from_device_q ; + + VCC VCC + (.P(\ )); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[0].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[0]), + .Q(\pins[0].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[0].obuf_inst + (.I(\pins[0].data_out_from_device_q ), + .O(data_out_to_pins[0])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[1].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[1]), + .Q(\pins[1].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[1].obuf_inst + (.I(\pins[1].data_out_from_device_q ), + .O(data_out_to_pins[1])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[2].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[2]), + .Q(\pins[2].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[2].obuf_inst + (.I(\pins[2].data_out_from_device_q ), + .O(data_out_to_pins[2])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[3].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[3]), + .Q(\pins[3].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[3].obuf_inst + (.I(\pins[3].data_out_from_device_q ), + .O(data_out_to_pins[3])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[4].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[4]), + .Q(\pins[4].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[4].obuf_inst + (.I(\pins[4].data_out_from_device_q ), + .O(data_out_to_pins[4])); +endmodule + +(* DEV_W = "16" *) (* SYS_W = "16" *) (* core_generation_info = "ip4,selectio_wiz_v5_1_17,{component_name=ip4,bus_dir=OUTPUTS,bus_sig_type=SINGLE,bus_io_std=LVCMOS18,use_serialization=false,use_phase_detector=false,serialization_factor=4,enable_bitslip=false,enable_train=false,system_data_width=16,bus_in_delay=NONE,bus_out_delay=NONE,clk_sig_type=SINGLE,clk_io_std=LVCMOS18,clk_buf=BUFIO2,active_edge=RISING,clk_delay=NONE,selio_bus_in_delay=NONE,selio_bus_out_delay=NONE,selio_clk_buf=MMCM,selio_active_edge=SDR,selio_ddr_alignment=SAME_EDGE_PIPELINED,selio_oddr_alignment=SAME_EDGE,ddr_alignment=C0,selio_interface_type=NETWORKING,interface_type=NETWORKING,selio_bus_in_tap=0,selio_bus_out_tap=0,selio_clk_io_std=LVCMOS18,selio_clk_sig_type=SINGLE}" *) +module ip4 + (data_out_from_device, + data_out_to_pins, + clk_in, + io_reset); + input [15:0]data_out_from_device; + output [15:0]data_out_to_pins; + input clk_in; + input io_reset; + + wire clk_in; + wire [15:0]data_out_from_device; + wire [15:0]data_out_to_pins; + wire io_reset; + + (* DEV_W = "16" *) + (* SYS_W = "16" *) + ip4_selectio_wiz inst + (.clk_in(clk_in), + .data_out_from_device(data_out_from_device), + .data_out_to_pins(data_out_to_pins), + .io_reset(io_reset)); +endmodule + +(* DEV_W = "16" *) (* SYS_W = "16" *) +module ip4_selectio_wiz + (data_out_from_device, + data_out_to_pins, + clk_in, + io_reset); + input [15:0]data_out_from_device; + output [15:0]data_out_to_pins; + input clk_in; + input io_reset; + + wire \ ; + wire clk_in; + wire [15:0]data_out_from_device; + wire [15:0]data_out_to_pins; + wire io_reset; + wire \pins[0].data_out_from_device_q ; + wire \pins[10].data_out_from_device_q ; + wire \pins[11].data_out_from_device_q ; + wire \pins[12].data_out_from_device_q ; + wire \pins[13].data_out_from_device_q ; + wire \pins[14].data_out_from_device_q ; + wire \pins[15].data_out_from_device_q ; + wire \pins[1].data_out_from_device_q ; + wire \pins[2].data_out_from_device_q ; + wire \pins[3].data_out_from_device_q ; + wire \pins[4].data_out_from_device_q ; + wire \pins[5].data_out_from_device_q ; + wire \pins[6].data_out_from_device_q ; + wire \pins[7].data_out_from_device_q ; + wire \pins[8].data_out_from_device_q ; + wire \pins[9].data_out_from_device_q ; + + VCC VCC + (.P(\ )); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[0].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[0]), + .Q(\pins[0].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[0].obuf_inst + (.I(\pins[0].data_out_from_device_q ), + .O(data_out_to_pins[0])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[10].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[10]), + .Q(\pins[10].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[10].obuf_inst + (.I(\pins[10].data_out_from_device_q ), + .O(data_out_to_pins[10])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[11].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[11]), + .Q(\pins[11].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[11].obuf_inst + (.I(\pins[11].data_out_from_device_q ), + .O(data_out_to_pins[11])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[12].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[12]), + .Q(\pins[12].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[12].obuf_inst + (.I(\pins[12].data_out_from_device_q ), + .O(data_out_to_pins[12])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[13].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[13]), + .Q(\pins[13].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[13].obuf_inst + (.I(\pins[13].data_out_from_device_q ), + .O(data_out_to_pins[13])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[14].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[14]), + .Q(\pins[14].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[14].obuf_inst + (.I(\pins[14].data_out_from_device_q ), + .O(data_out_to_pins[14])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[15].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[15]), + .Q(\pins[15].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[15].obuf_inst + (.I(\pins[15].data_out_from_device_q ), + .O(data_out_to_pins[15])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[1].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[1]), + .Q(\pins[1].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[1].obuf_inst + (.I(\pins[1].data_out_from_device_q ), + .O(data_out_to_pins[1])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[2].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[2]), + .Q(\pins[2].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[2].obuf_inst + (.I(\pins[2].data_out_from_device_q ), + .O(data_out_to_pins[2])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[3].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[3]), + .Q(\pins[3].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[3].obuf_inst + (.I(\pins[3].data_out_from_device_q ), + .O(data_out_to_pins[3])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[4].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[4]), + .Q(\pins[4].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[4].obuf_inst + (.I(\pins[4].data_out_from_device_q ), + .O(data_out_to_pins[4])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[5].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[5]), + .Q(\pins[5].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[5].obuf_inst + (.I(\pins[5].data_out_from_device_q ), + .O(data_out_to_pins[5])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[6].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[6]), + .Q(\pins[6].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[6].obuf_inst + (.I(\pins[6].data_out_from_device_q ), + .O(data_out_to_pins[6])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[7].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[7]), + .Q(\pins[7].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[7].obuf_inst + (.I(\pins[7].data_out_from_device_q ), + .O(data_out_to_pins[7])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[8].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[8]), + .Q(\pins[8].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[8].obuf_inst + (.I(\pins[8].data_out_from_device_q ), + .O(data_out_to_pins[8])); + (* IOB = "TRUE" *) + (* box_type = "PRIMITIVE" *) + FDRE #( + .INIT(1'b0), + .IS_C_INVERTED(1'b0), + .IS_D_INVERTED(1'b0), + .IS_R_INVERTED(1'b0)) + \pins[9].fdre_out_inst + (.C(clk_in), + .CE(\ ), + .D(data_out_from_device[9]), + .Q(\pins[9].data_out_from_device_q ), + .R(io_reset)); + (* CAPACITANCE = "DONT_CARE" *) + (* box_type = "PRIMITIVE" *) + OBUF \pins[9].obuf_inst + (.I(\pins[9].data_out_from_device_q ), + .O(data_out_to_pins[9])); +endmodule + +module ip5 + (wr_en, + Q, + BUS_DO, + CLK, + rst_IBUF); + output wr_en; + output [63:0]Q; + input [36:0]BUS_DO; + input CLK; + input rst_IBUF; + + wire \ ; + wire \ ; + wire [36:0]BUS_DO; + wire CLK; + wire [63:0]Q; + wire [31:0]data32_temp__0; + wire data32_temp_n_0; + wire [31:0]data32in; + wire [4:0]data32in_valid; + wire dout_n_0; + wire [31:0]iodata32in; + wire [4:0]iodata32in_valid; + wire rst_IBUF; + wire wr_en; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + LUT5 #( + .INIT(32'h00000020)) + data32_temp + (.I0(data32in_valid[0]), + .I1(data32in_valid[2]), + .I2(data32in_valid[4]), + .I3(data32in_valid[3]), + .I4(data32in_valid[1]), + .O(data32_temp_n_0)); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[0] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[0]), + .Q(data32_temp__0[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[10] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[10]), + .Q(data32_temp__0[10]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[11] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[11]), + .Q(data32_temp__0[11]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[12] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[12]), + .Q(data32_temp__0[12]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[13] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[13]), + .Q(data32_temp__0[13]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[14] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[14]), + .Q(data32_temp__0[14]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[15] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[15]), + .Q(data32_temp__0[15]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[16] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[16]), + .Q(data32_temp__0[16]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[17] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[17]), + .Q(data32_temp__0[17]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[18] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[18]), + .Q(data32_temp__0[18]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[19] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[19]), + .Q(data32_temp__0[19]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[1] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[1]), + .Q(data32_temp__0[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[20] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[20]), + .Q(data32_temp__0[20]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[21] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[21]), + .Q(data32_temp__0[21]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[22] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[22]), + .Q(data32_temp__0[22]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[23] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[23]), + .Q(data32_temp__0[23]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[24] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[24]), + .Q(data32_temp__0[24]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[25] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[25]), + .Q(data32_temp__0[25]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[26] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[26]), + .Q(data32_temp__0[26]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[27] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[27]), + .Q(data32_temp__0[27]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[28] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[28]), + .Q(data32_temp__0[28]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[29] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[29]), + .Q(data32_temp__0[29]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[2] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[2]), + .Q(data32_temp__0[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[30] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[30]), + .Q(data32_temp__0[30]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[31] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[31]), + .Q(data32_temp__0[31]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[3] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[3]), + .Q(data32_temp__0[3]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[4] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[4]), + .Q(data32_temp__0[4]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[5] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[5]), + .Q(data32_temp__0[5]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[6] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[6]), + .Q(data32_temp__0[6]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[7] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[7]), + .Q(data32_temp__0[7]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[8] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[8]), + .Q(data32_temp__0[8]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32_temp_reg[9] + (.C(CLK), + .CE(data32_temp_n_0), + .D(data32in[9]), + .Q(data32_temp__0[9]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[0] + (.C(CLK), + .CE(\ ), + .D(iodata32in[0]), + .Q(data32in[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[10] + (.C(CLK), + .CE(\ ), + .D(iodata32in[10]), + .Q(data32in[10]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[11] + (.C(CLK), + .CE(\ ), + .D(iodata32in[11]), + .Q(data32in[11]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[12] + (.C(CLK), + .CE(\ ), + .D(iodata32in[12]), + .Q(data32in[12]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[13] + (.C(CLK), + .CE(\ ), + .D(iodata32in[13]), + .Q(data32in[13]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[14] + (.C(CLK), + .CE(\ ), + .D(iodata32in[14]), + .Q(data32in[14]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[15] + (.C(CLK), + .CE(\ ), + .D(iodata32in[15]), + .Q(data32in[15]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[16] + (.C(CLK), + .CE(\ ), + .D(iodata32in[16]), + .Q(data32in[16]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[17] + (.C(CLK), + .CE(\ ), + .D(iodata32in[17]), + .Q(data32in[17]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[18] + (.C(CLK), + .CE(\ ), + .D(iodata32in[18]), + .Q(data32in[18]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[19] + (.C(CLK), + .CE(\ ), + .D(iodata32in[19]), + .Q(data32in[19]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[1] + (.C(CLK), + .CE(\ ), + .D(iodata32in[1]), + .Q(data32in[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[20] + (.C(CLK), + .CE(\ ), + .D(iodata32in[20]), + .Q(data32in[20]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[21] + (.C(CLK), + .CE(\ ), + .D(iodata32in[21]), + .Q(data32in[21]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[22] + (.C(CLK), + .CE(\ ), + .D(iodata32in[22]), + .Q(data32in[22]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[23] + (.C(CLK), + .CE(\ ), + .D(iodata32in[23]), + .Q(data32in[23]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[24] + (.C(CLK), + .CE(\ ), + .D(iodata32in[24]), + .Q(data32in[24]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[25] + (.C(CLK), + .CE(\ ), + .D(iodata32in[25]), + .Q(data32in[25]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[26] + (.C(CLK), + .CE(\ ), + .D(iodata32in[26]), + .Q(data32in[26]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[27] + (.C(CLK), + .CE(\ ), + .D(iodata32in[27]), + .Q(data32in[27]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[28] + (.C(CLK), + .CE(\ ), + .D(iodata32in[28]), + .Q(data32in[28]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[29] + (.C(CLK), + .CE(\ ), + .D(iodata32in[29]), + .Q(data32in[29]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[2] + (.C(CLK), + .CE(\ ), + .D(iodata32in[2]), + .Q(data32in[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[30] + (.C(CLK), + .CE(\ ), + .D(iodata32in[30]), + .Q(data32in[30]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[31] + (.C(CLK), + .CE(\ ), + .D(iodata32in[31]), + .Q(data32in[31]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[3] + (.C(CLK), + .CE(\ ), + .D(iodata32in[3]), + .Q(data32in[3]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[4] + (.C(CLK), + .CE(\ ), + .D(iodata32in[4]), + .Q(data32in[4]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[5] + (.C(CLK), + .CE(\ ), + .D(iodata32in[5]), + .Q(data32in[5]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[6] + (.C(CLK), + .CE(\ ), + .D(iodata32in[6]), + .Q(data32in[6]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[7] + (.C(CLK), + .CE(\ ), + .D(iodata32in[7]), + .Q(data32in[7]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[8] + (.C(CLK), + .CE(\ ), + .D(iodata32in[8]), + .Q(data32in[8]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_reg[9] + (.C(CLK), + .CE(\ ), + .D(iodata32in[9]), + .Q(data32in[9]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_valid_reg[0] + (.C(CLK), + .CE(\ ), + .D(iodata32in_valid[0]), + .Q(data32in_valid[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_valid_reg[1] + (.C(CLK), + .CE(\ ), + .D(iodata32in_valid[1]), + .Q(data32in_valid[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_valid_reg[2] + (.C(CLK), + .CE(\ ), + .D(iodata32in_valid[2]), + .Q(data32in_valid[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_valid_reg[3] + (.C(CLK), + .CE(\ ), + .D(iodata32in_valid[3]), + .Q(data32in_valid[3]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \data32in_valid_reg[4] + (.C(CLK), + .CE(\ ), + .D(iodata32in_valid[4]), + .Q(data32in_valid[4]), + .R(\ )); + LUT5 #( + .INIT(32'h00000020)) + dout + (.I0(data32in_valid[1]), + .I1(data32in_valid[2]), + .I2(data32in_valid[4]), + .I3(data32in_valid[3]), + .I4(data32in_valid[0]), + .O(dout_n_0)); + FDRE #( + .INIT(1'b0)) + \dout_reg[0] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[24]), + .Q(Q[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[10] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[18]), + .Q(Q[10]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[11] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[19]), + .Q(Q[11]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[12] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[20]), + .Q(Q[12]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[13] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[21]), + .Q(Q[13]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[14] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[22]), + .Q(Q[14]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[15] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[23]), + .Q(Q[15]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[16] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[8]), + .Q(Q[16]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[17] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[9]), + .Q(Q[17]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[18] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[10]), + .Q(Q[18]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[19] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[11]), + .Q(Q[19]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[1] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[25]), + .Q(Q[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[20] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[12]), + .Q(Q[20]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[21] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[13]), + .Q(Q[21]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[22] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[14]), + .Q(Q[22]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[23] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[15]), + .Q(Q[23]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[24] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[0]), + .Q(Q[24]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[25] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[1]), + .Q(Q[25]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[26] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[2]), + .Q(Q[26]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[27] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[3]), + .Q(Q[27]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[28] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[4]), + .Q(Q[28]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[29] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[5]), + .Q(Q[29]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[2] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[26]), + .Q(Q[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[30] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[6]), + .Q(Q[30]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[31] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[7]), + .Q(Q[31]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[32] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[24]), + .Q(Q[32]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[33] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[25]), + .Q(Q[33]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[34] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[26]), + .Q(Q[34]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[35] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[27]), + .Q(Q[35]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[36] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[28]), + .Q(Q[36]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[37] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[29]), + .Q(Q[37]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[38] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[30]), + .Q(Q[38]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[39] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[31]), + .Q(Q[39]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[3] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[27]), + .Q(Q[3]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[40] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[16]), + .Q(Q[40]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[41] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[17]), + .Q(Q[41]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[42] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[18]), + .Q(Q[42]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[43] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[19]), + .Q(Q[43]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[44] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[20]), + .Q(Q[44]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[45] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[21]), + .Q(Q[45]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[46] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[22]), + .Q(Q[46]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[47] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[23]), + .Q(Q[47]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[48] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[8]), + .Q(Q[48]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[49] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[9]), + .Q(Q[49]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[4] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[28]), + .Q(Q[4]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[50] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[10]), + .Q(Q[50]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[51] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[11]), + .Q(Q[51]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[52] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[12]), + .Q(Q[52]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[53] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[13]), + .Q(Q[53]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[54] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[14]), + .Q(Q[54]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[55] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[15]), + .Q(Q[55]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[56] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[0]), + .Q(Q[56]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[57] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[1]), + .Q(Q[57]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[58] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[2]), + .Q(Q[58]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[59] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[3]), + .Q(Q[59]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[5] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[29]), + .Q(Q[5]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[60] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[4]), + .Q(Q[60]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[61] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[5]), + .Q(Q[61]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[62] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[6]), + .Q(Q[62]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[63] + (.C(CLK), + .CE(dout_n_0), + .D(data32in[7]), + .Q(Q[63]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[6] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[30]), + .Q(Q[6]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[7] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[31]), + .Q(Q[7]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[8] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[16]), + .Q(Q[8]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dout_reg[9] + (.C(CLK), + .CE(dout_n_0), + .D(data32_temp__0[17]), + .Q(Q[9]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + dout_valid_reg + (.C(CLK), + .CE(\ ), + .D(dout_n_0), + .Q(wr_en), + .R(\ )); + (* IMPORTED_FROM = "c:/Projects/Razeny/fpga0_tbx4-sg2-3-nl/pcileech_tbx4/pcileech_tbx4.gen/sources_1/ip/ip2/ip2.dcp" *) + (* IMPORTED_TYPE = "CHECKPOINT" *) + (* IS_IMPORTED *) + ip2 i7 + (.clk_in(CLK), + .data_in_from_pins(BUS_DO[15:0]), + .data_in_to_device(iodata32in[15:0]), + .io_reset(rst_IBUF)); + (* IMPORTED_FROM = "c:/Projects/Razeny/fpga0_tbx4-sg2-3-nl/pcileech_tbx4/pcileech_tbx4.gen/sources_1/ip/ip1/ip1.dcp" *) + (* IMPORTED_TYPE = "CHECKPOINT" *) + (* IS_IMPORTED *) + ip1 i8 + (.clk_in(CLK), + .data_in_from_pins(BUS_DO[20:16]), + .data_in_to_device(iodata32in_valid), + .io_reset(rst_IBUF)); + (* IMPORTED_FROM = "c:/Projects/Razeny/fpga0_tbx4-sg2-3-nl/pcileech_tbx4/pcileech_tbx4.gen/sources_1/ip/ip2/ip2.dcp" *) + (* IMPORTED_TYPE = "CHECKPOINT" *) + (* IS_IMPORTED *) + ip2 i9 + (.clk_in(CLK), + .data_in_from_pins(BUS_DO[36:21]), + .data_in_to_device(iodata32in[31:16]), + .io_reset(rst_IBUF)); +endmodule + +module ip6 + (BUS_DI, + rd_en, + CLK, + rst_IBUF, + out, + .BUS_DI_68_sp_1(BUS_DI_68_sn_1), + BUS_DI_PROG_FULL_IBUF); + output [68:0]BUS_DI; + output rd_en; + input CLK; + input rst_IBUF; + input [255:0]out; + input BUS_DI_PROG_FULL_IBUF; + input BUS_DI_68_sn_1; + + wire \ ; + wire \ ; + wire [68:0]BUS_DI; + wire BUS_DI_68_sn_1; + wire BUS_DI_PROG_FULL_IBUF; + wire CLK; + wire fifo_almost_full; + wire [67:0]fifo_dout; + wire fifo_valid; + wire i6_i_1_n_0; + wire [255:0]out; + wire rd_en; + wire rst_IBUF; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* IMPORTED_FROM = "c:/Projects/Razeny/fpga0_tbx4-sg2-3-nl/pcileech_tbx4/pcileech_tbx4.gen/sources_1/ip/ip4/ip4.dcp" *) + (* IMPORTED_TYPE = "CHECKPOINT" *) + (* IS_IMPORTED *) + ip4 i1 + (.clk_in(CLK), + .data_out_from_device(fifo_dout[15:0]), + .data_out_to_pins(BUS_DI[15:0]), + .io_reset(rst_IBUF)); + LUT2 #( + .INIT(4'h1)) + i10_i_1 + (.I0(fifo_almost_full), + .I1(BUS_DI_PROG_FULL_IBUF), + .O(rd_en)); + (* IMPORTED_FROM = "c:/Projects/Razeny/fpga0_tbx4-sg2-3-nl/pcileech_tbx4/pcileech_tbx4.gen/sources_1/ip/ip4/ip4.dcp" *) + (* IMPORTED_TYPE = "CHECKPOINT" *) + (* IS_IMPORTED *) + ip4 i2 + (.clk_in(CLK), + .data_out_from_device(fifo_dout[31:16]), + .data_out_to_pins(BUS_DI[31:16]), + .io_reset(rst_IBUF)); + (* IMPORTED_FROM = "c:/Projects/Razeny/fpga0_tbx4-sg2-3-nl/pcileech_tbx4/pcileech_tbx4.gen/sources_1/ip/ip4/ip4.dcp" *) + (* IMPORTED_TYPE = "CHECKPOINT" *) + (* IS_IMPORTED *) + ip4 i3 + (.clk_in(CLK), + .data_out_from_device(fifo_dout[47:32]), + .data_out_to_pins(BUS_DI[47:32]), + .io_reset(rst_IBUF)); + (* IMPORTED_FROM = "c:/Projects/Razeny/fpga0_tbx4-sg2-3-nl/pcileech_tbx4/pcileech_tbx4.gen/sources_1/ip/ip4/ip4.dcp" *) + (* IMPORTED_TYPE = "CHECKPOINT" *) + (* IS_IMPORTED *) + ip4 i4 + (.clk_in(CLK), + .data_out_from_device(fifo_dout[63:48]), + .data_out_to_pins(BUS_DI[63:48]), + .io_reset(rst_IBUF)); + (* IMPORTED_FROM = "c:/Projects/Razeny/fpga0_tbx4-sg2-3-nl/pcileech_tbx4/pcileech_tbx4.gen/sources_1/ip/ip3/ip3.dcp" *) + (* IMPORTED_TYPE = "CHECKPOINT" *) + (* IS_IMPORTED *) + ip3 i5 + (.clk_in(CLK), + .data_out_from_device({fifo_valid,fifo_dout[67:64]}), + .data_out_to_pins(BUS_DI[68:64]), + .io_reset(rst_IBUF)); + (* IMPORTED_FROM = "c:/Projects/Razeny/fpga0_tbx4-sg2-3-nl/pcileech_tbx4/pcileech_tbx4.gen/sources_1/ip/ip9/ip9.dcp" *) + (* IMPORTED_TYPE = "CHECKPOINT" *) + (* IS_IMPORTED *) + (* x_core_info = "fifo_generator_v13_2_9,Vivado 2023.2" *) + ip9 i6 + (.almost_full(fifo_almost_full), + .clk(CLK), + .din({\ ,\ ,\ ,\ ,out[255:192],\ ,\ ,\ ,\ ,out[191:128],\ ,\ ,\ ,\ ,out[127:64],\ ,\ ,\ ,\ ,out[63:0]}), + .dout(fifo_dout), + .rd_en(i6_i_1_n_0), + .srst(rst_IBUF), + .valid(fifo_valid), + .wr_en(BUS_DI_68_sn_1)); + LUT1 #( + .INIT(2'h1)) + i6_i_1 + (.I0(BUS_DI_PROG_FULL_IBUF), + .O(i6_i_1_n_0)); +endmodule + +(* CHECK_LICENSE_TYPE = "ip7,fifo_generator_v13_2_9,{}" *) (* core_generation_info = "ip7,fifo_generator_v13_2_9,{x_ipProduct=Vivado 2023.2,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=fifo_generator,x_ipVersion=13.2,x_ipCoreRevision=9,x_ipLanguage=VERILOG,x_ipSimLanguage=MIXED,C_COMMON_CLOCK=0,C_SELECT_XPM=0,C_COUNT_TYPE=0,C_DATA_COUNT_WIDTH=4,C_DEFAULT_VALUE=BlankString,C_DIN_WIDTH=64,C_DOUT_RST_VAL=0,C_DOUT_WIDTH=64,C_ENABLE_RLOCS=0,C_FAMILY=artix7,C_FULL_FLAGS_RST_VAL=1,C_HAS_ALMOST_EMPTY=0,C_HAS_ALMOST_FULL=0,C_HAS_BACKUP=0,C_HAS_DATA_COUNT=0,C_HAS_INT_CLK=0,C_HAS_MEMINIT_FILE=0,C_HAS_OVERFLOW=0,C_HAS_RD_DATA_COUNT=0,C_HAS_RD_RST=0,C_HAS_RST=1,C_HAS_SRST=0,C_HAS_UNDERFLOW=0,C_HAS_VALID=1,C_HAS_WR_ACK=0,C_HAS_WR_DATA_COUNT=0,C_HAS_WR_RST=0,C_IMPLEMENTATION_TYPE=2,C_INIT_WR_PNTR_VAL=0,C_MEMORY_TYPE=2,C_MIF_FILE_NAME=BlankString,C_OPTIMIZATION_MODE=0,C_OVERFLOW_LOW=0,C_PRELOAD_LATENCY=1,C_PRELOAD_REGS=0,C_PRIM_FIFO_TYPE=512x72,C_PROG_EMPTY_THRESH_ASSERT_VAL=2,C_PROG_EMPTY_THRESH_NEGATE_VAL=3,C_PROG_EMPTY_TYPE=0,C_PROG_FULL_THRESH_ASSERT_VAL=13,C_PROG_FULL_THRESH_NEGATE_VAL=12,C_PROG_FULL_TYPE=0,C_RD_DATA_COUNT_WIDTH=4,C_RD_DEPTH=16,C_RD_FREQ=1,C_RD_PNTR_WIDTH=4,C_UNDERFLOW_LOW=0,C_USE_DOUT_RST=1,C_USE_ECC=0,C_USE_EMBEDDED_REG=0,C_USE_PIPELINE_REG=0,C_POWER_SAVING_MODE=0,C_USE_FIFO16_FLAGS=0,C_USE_FWFT_DATA_COUNT=0,C_VALID_LOW=0,C_WR_ACK_LOW=0,C_WR_DATA_COUNT_WIDTH=4,C_WR_DEPTH=16,C_WR_FREQ=1,C_WR_PNTR_WIDTH=4,C_WR_RESPONSE_LATENCY=1,C_MSGON_VAL=1,C_ENABLE_RST_SYNC=1,C_EN_SAFETY_CKT=0,C_ERROR_INJECTION_TYPE=0,C_SYNCHRONIZER_STAGE=2,C_INTERFACE_TYPE=0,C_AXI_TYPE=1,C_HAS_AXI_WR_CHANNEL=1,C_HAS_AXI_RD_CHANNEL=1,C_HAS_SLAVE_CE=0,C_HAS_MASTER_CE=0,C_ADD_NGC_CONSTRAINT=0,C_USE_COMMON_OVERFLOW=0,C_USE_COMMON_UNDERFLOW=0,C_USE_DEFAULT_SETTINGS=0,C_AXI_ID_WIDTH=1,C_AXI_ADDR_WIDTH=32,C_AXI_DATA_WIDTH=64,C_AXI_LEN_WIDTH=8,C_AXI_LOCK_WIDTH=1,C_HAS_AXI_ID=0,C_HAS_AXI_AWUSER=0,C_HAS_AXI_WUSER=0,C_HAS_AXI_BUSER=0,C_HAS_AXI_ARUSER=0,C_HAS_AXI_RUSER=0,C_AXI_ARUSER_WIDTH=1,C_AXI_AWUSER_WIDTH=1,C_AXI_WUSER_WIDTH=1,C_AXI_BUSER_WIDTH=1,C_AXI_RUSER_WIDTH=1,C_HAS_AXIS_TDATA=1,C_HAS_AXIS_TID=0,C_HAS_AXIS_TDEST=0,C_HAS_AXIS_TUSER=1,C_HAS_AXIS_TREADY=1,C_HAS_AXIS_TLAST=0,C_HAS_AXIS_TSTRB=0,C_HAS_AXIS_TKEEP=0,C_AXIS_TDATA_WIDTH=8,C_AXIS_TID_WIDTH=1,C_AXIS_TDEST_WIDTH=1,C_AXIS_TUSER_WIDTH=4,C_AXIS_TSTRB_WIDTH=1,C_AXIS_TKEEP_WIDTH=1,C_WACH_TYPE=0,C_WDCH_TYPE=0,C_WRCH_TYPE=0,C_RACH_TYPE=0,C_RDCH_TYPE=0,C_AXIS_TYPE=0,C_IMPLEMENTATION_TYPE_WACH=1,C_IMPLEMENTATION_TYPE_WDCH=1,C_IMPLEMENTATION_TYPE_WRCH=1,C_IMPLEMENTATION_TYPE_RACH=1,C_IMPLEMENTATION_TYPE_RDCH=1,C_IMPLEMENTATION_TYPE_AXIS=1,C_APPLICATION_TYPE_WACH=0,C_APPLICATION_TYPE_WDCH=0,C_APPLICATION_TYPE_WRCH=0,C_APPLICATION_TYPE_RACH=0,C_APPLICATION_TYPE_RDCH=0,C_APPLICATION_TYPE_AXIS=0,C_PRIM_FIFO_TYPE_WACH=512x36,C_PRIM_FIFO_TYPE_WDCH=1kx36,C_PRIM_FIFO_TYPE_WRCH=512x36,C_PRIM_FIFO_TYPE_RACH=512x36,C_PRIM_FIFO_TYPE_RDCH=1kx36,C_PRIM_FIFO_TYPE_AXIS=1kx18,C_USE_ECC_WACH=0,C_USE_ECC_WDCH=0,C_USE_ECC_WRCH=0,C_USE_ECC_RACH=0,C_USE_ECC_RDCH=0,C_USE_ECC_AXIS=0,C_ERROR_INJECTION_TYPE_WACH=0,C_ERROR_INJECTION_TYPE_WDCH=0,C_ERROR_INJECTION_TYPE_WRCH=0,C_ERROR_INJECTION_TYPE_RACH=0,C_ERROR_INJECTION_TYPE_RDCH=0,C_ERROR_INJECTION_TYPE_AXIS=0,C_DIN_WIDTH_WACH=1,C_DIN_WIDTH_WDCH=64,C_DIN_WIDTH_WRCH=2,C_DIN_WIDTH_RACH=32,C_DIN_WIDTH_RDCH=64,C_DIN_WIDTH_AXIS=1,C_WR_DEPTH_WACH=16,C_WR_DEPTH_WDCH=1024,C_WR_DEPTH_WRCH=16,C_WR_DEPTH_RACH=16,C_WR_DEPTH_RDCH=1024,C_WR_DEPTH_AXIS=1024,C_WR_PNTR_WIDTH_WACH=4,C_WR_PNTR_WIDTH_WDCH=10,C_WR_PNTR_WIDTH_WRCH=4,C_WR_PNTR_WIDTH_RACH=4,C_WR_PNTR_WIDTH_RDCH=10,C_WR_PNTR_WIDTH_AXIS=10,C_HAS_DATA_COUNTS_WACH=0,C_HAS_DATA_COUNTS_WDCH=0,C_HAS_DATA_COUNTS_WRCH=0,C_HAS_DATA_COUNTS_RACH=0,C_HAS_DATA_COUNTS_RDCH=0,C_HAS_DATA_COUNTS_AXIS=0,C_HAS_PROG_FLAGS_WACH=0,C_HAS_PROG_FLAGS_WDCH=0,C_HAS_PROG_FLAGS_WRCH=0,C_HAS_PROG_FLAGS_RACH=0,C_HAS_PROG_FLAGS_RDCH=0,C_HAS_PROG_FLAGS_AXIS=0,C_PROG_FULL_TYPE_WACH=0,C_PROG_FULL_TYPE_WDCH=0,C_PROG_FULL_TYPE_WRCH=0,C_PROG_FULL_TYPE_RACH=0,C_PROG_FULL_TYPE_RDCH=0,C_PROG_FULL_TYPE_AXIS=0,C_PROG_FULL_THRESH_ASSERT_VAL_WACH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_WDCH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_WRCH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_RACH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_RDCH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_AXIS=1023,C_PROG_EMPTY_TYPE_WACH=0,C_PROG_EMPTY_TYPE_WDCH=0,C_PROG_EMPTY_TYPE_WRCH=0,C_PROG_EMPTY_TYPE_RACH=0,C_PROG_EMPTY_TYPE_RDCH=0,C_PROG_EMPTY_TYPE_AXIS=0,C_PROG_EMPTY_THRESH_ASSERT_VAL_WACH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_WDCH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_WRCH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_RACH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_RDCH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_AXIS=1022,C_REG_SLICE_MODE_WACH=0,C_REG_SLICE_MODE_WDCH=0,C_REG_SLICE_MODE_WRCH=0,C_REG_SLICE_MODE_RACH=0,C_REG_SLICE_MODE_RDCH=0,C_REG_SLICE_MODE_AXIS=0}" *) (* downgradeipidentifiedwarnings = "yes" *) +(* x_core_info = "fifo_generator_v13_2_9,Vivado 2023.2" *) +module ip7 + (rst, + wr_clk, + rd_clk, + din, + wr_en, + rd_en, + dout, + full, + empty, + valid); + input rst; + (* x_interface_info = "xilinx.com:signal:clock:1.0 write_clk CLK" *) (* x_interface_parameter = "XIL_INTERFACENAME write_clk, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, INSERT_VIP 0" *) input wr_clk; + (* x_interface_info = "xilinx.com:signal:clock:1.0 read_clk CLK" *) (* x_interface_parameter = "XIL_INTERFACENAME read_clk, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, INSERT_VIP 0" *) input rd_clk; + (* x_interface_info = "xilinx.com:interface:fifo_write:1.0 FIFO_WRITE WR_DATA" *) input [63:0]din; + (* x_interface_info = "xilinx.com:interface:fifo_write:1.0 FIFO_WRITE WR_EN" *) input wr_en; + (* x_interface_info = "xilinx.com:interface:fifo_read:1.0 FIFO_READ RD_EN" *) input rd_en; + (* x_interface_info = "xilinx.com:interface:fifo_read:1.0 FIFO_READ RD_DATA" *) output [63:0]dout; + (* x_interface_info = "xilinx.com:interface:fifo_write:1.0 FIFO_WRITE FULL" *) output full; + (* x_interface_info = "xilinx.com:interface:fifo_read:1.0 FIFO_READ EMPTY" *) output empty; + output valid; + + wire \ ; + wire [63:0]din; + wire [63:0]dout; + wire empty; + wire full; + wire rd_clk; + wire rd_en; + wire rst; + wire valid; + wire wr_clk; + wire wr_en; + + GND GND + (.G(\ )); + (* C_ADD_NGC_CONSTRAINT = "0" *) + (* C_APPLICATION_TYPE_AXIS = "0" *) + (* C_APPLICATION_TYPE_RACH = "0" *) + (* C_APPLICATION_TYPE_RDCH = "0" *) + (* C_APPLICATION_TYPE_WACH = "0" *) + (* C_APPLICATION_TYPE_WDCH = "0" *) + (* C_APPLICATION_TYPE_WRCH = "0" *) + (* C_AXIS_TDATA_WIDTH = "8" *) + (* C_AXIS_TDEST_WIDTH = "1" *) + (* C_AXIS_TID_WIDTH = "1" *) + (* C_AXIS_TKEEP_WIDTH = "1" *) + (* C_AXIS_TSTRB_WIDTH = "1" *) + (* C_AXIS_TUSER_WIDTH = "4" *) + (* C_AXIS_TYPE = "0" *) + (* C_AXI_ADDR_WIDTH = "32" *) + (* C_AXI_ARUSER_WIDTH = "1" *) + (* C_AXI_AWUSER_WIDTH = "1" *) + (* C_AXI_BUSER_WIDTH = "1" *) + (* C_AXI_DATA_WIDTH = "64" *) + (* C_AXI_ID_WIDTH = "1" *) + (* C_AXI_LEN_WIDTH = "8" *) + (* C_AXI_LOCK_WIDTH = "1" *) + (* C_AXI_RUSER_WIDTH = "1" *) + (* C_AXI_TYPE = "1" *) + (* C_AXI_WUSER_WIDTH = "1" *) + (* C_COMMON_CLOCK = "0" *) + (* C_COUNT_TYPE = "0" *) + (* C_DATA_COUNT_WIDTH = "4" *) + (* C_DEFAULT_VALUE = "BlankString" *) + (* C_DIN_WIDTH = "64" *) + (* C_DIN_WIDTH_AXIS = "1" *) + (* C_DIN_WIDTH_RACH = "32" *) + (* C_DIN_WIDTH_RDCH = "64" *) + (* C_DIN_WIDTH_WACH = "1" *) + (* C_DIN_WIDTH_WDCH = "64" *) + (* C_DIN_WIDTH_WRCH = "2" *) + (* C_DOUT_RST_VAL = "0" *) + (* C_DOUT_WIDTH = "64" *) + (* C_ENABLE_RLOCS = "0" *) + (* C_ENABLE_RST_SYNC = "1" *) + (* C_EN_SAFETY_CKT = "0" *) + (* C_ERROR_INJECTION_TYPE = "0" *) + (* C_ERROR_INJECTION_TYPE_AXIS = "0" *) + (* C_ERROR_INJECTION_TYPE_RACH = "0" *) + (* C_ERROR_INJECTION_TYPE_RDCH = "0" *) + (* C_ERROR_INJECTION_TYPE_WACH = "0" *) + (* C_ERROR_INJECTION_TYPE_WDCH = "0" *) + (* C_ERROR_INJECTION_TYPE_WRCH = "0" *) + (* C_FAMILY = "artix7" *) + (* C_FULL_FLAGS_RST_VAL = "1" *) + (* C_HAS_ALMOST_EMPTY = "0" *) + (* C_HAS_ALMOST_FULL = "0" *) + (* C_HAS_AXIS_TDATA = "1" *) + (* C_HAS_AXIS_TDEST = "0" *) + (* C_HAS_AXIS_TID = "0" *) + (* C_HAS_AXIS_TKEEP = "0" *) + (* C_HAS_AXIS_TLAST = "0" *) + (* C_HAS_AXIS_TREADY = "1" *) + (* C_HAS_AXIS_TSTRB = "0" *) + (* C_HAS_AXIS_TUSER = "1" *) + (* C_HAS_AXI_ARUSER = "0" *) + (* C_HAS_AXI_AWUSER = "0" *) + (* C_HAS_AXI_BUSER = "0" *) + (* C_HAS_AXI_ID = "0" *) + (* C_HAS_AXI_RD_CHANNEL = "1" *) + (* C_HAS_AXI_RUSER = "0" *) + (* C_HAS_AXI_WR_CHANNEL = "1" *) + (* C_HAS_AXI_WUSER = "0" *) + (* C_HAS_BACKUP = "0" *) + (* C_HAS_DATA_COUNT = "0" *) + (* C_HAS_DATA_COUNTS_AXIS = "0" *) + (* C_HAS_DATA_COUNTS_RACH = "0" *) + (* C_HAS_DATA_COUNTS_RDCH = "0" *) + (* C_HAS_DATA_COUNTS_WACH = "0" *) + (* C_HAS_DATA_COUNTS_WDCH = "0" *) + (* C_HAS_DATA_COUNTS_WRCH = "0" *) + (* C_HAS_INT_CLK = "0" *) + (* C_HAS_MASTER_CE = "0" *) + (* C_HAS_MEMINIT_FILE = "0" *) + (* C_HAS_OVERFLOW = "0" *) + (* C_HAS_PROG_FLAGS_AXIS = "0" *) + (* C_HAS_PROG_FLAGS_RACH = "0" *) + (* C_HAS_PROG_FLAGS_RDCH = "0" *) + (* C_HAS_PROG_FLAGS_WACH = "0" *) + (* C_HAS_PROG_FLAGS_WDCH = "0" *) + (* C_HAS_PROG_FLAGS_WRCH = "0" *) + (* C_HAS_RD_DATA_COUNT = "0" *) + (* C_HAS_RD_RST = "0" *) + (* C_HAS_RST = "1" *) + (* C_HAS_SLAVE_CE = "0" *) + (* C_HAS_SRST = "0" *) + (* C_HAS_UNDERFLOW = "0" *) + (* C_HAS_VALID = "1" *) + (* C_HAS_WR_ACK = "0" *) + (* C_HAS_WR_DATA_COUNT = "0" *) + (* C_HAS_WR_RST = "0" *) + (* C_IMPLEMENTATION_TYPE = "2" *) + (* C_IMPLEMENTATION_TYPE_AXIS = "1" *) + (* C_IMPLEMENTATION_TYPE_RACH = "1" *) + (* C_IMPLEMENTATION_TYPE_RDCH = "1" *) + (* C_IMPLEMENTATION_TYPE_WACH = "1" *) + (* C_IMPLEMENTATION_TYPE_WDCH = "1" *) + (* C_IMPLEMENTATION_TYPE_WRCH = "1" *) + (* C_INIT_WR_PNTR_VAL = "0" *) + (* C_INTERFACE_TYPE = "0" *) + (* C_MEMORY_TYPE = "2" *) + (* C_MIF_FILE_NAME = "BlankString" *) + (* C_MSGON_VAL = "1" *) + (* C_OPTIMIZATION_MODE = "0" *) + (* C_OVERFLOW_LOW = "0" *) + (* C_POWER_SAVING_MODE = "0" *) + (* C_PRELOAD_LATENCY = "1" *) + (* C_PRELOAD_REGS = "0" *) + (* C_PRIM_FIFO_TYPE = "512x72" *) + (* C_PRIM_FIFO_TYPE_AXIS = "1kx18" *) + (* C_PRIM_FIFO_TYPE_RACH = "512x36" *) + (* C_PRIM_FIFO_TYPE_RDCH = "1kx36" *) + (* C_PRIM_FIFO_TYPE_WACH = "512x36" *) + (* C_PRIM_FIFO_TYPE_WDCH = "1kx36" *) + (* C_PRIM_FIFO_TYPE_WRCH = "512x36" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL = "2" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_AXIS = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_RACH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_RDCH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_WACH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_WDCH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_WRCH = "1022" *) + (* C_PROG_EMPTY_THRESH_NEGATE_VAL = "3" *) + (* C_PROG_EMPTY_TYPE = "0" *) + (* C_PROG_EMPTY_TYPE_AXIS = "0" *) + (* C_PROG_EMPTY_TYPE_RACH = "0" *) + (* C_PROG_EMPTY_TYPE_RDCH = "0" *) + (* C_PROG_EMPTY_TYPE_WACH = "0" *) + (* C_PROG_EMPTY_TYPE_WDCH = "0" *) + (* C_PROG_EMPTY_TYPE_WRCH = "0" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL = "13" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_AXIS = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_RACH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_RDCH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_WACH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_WDCH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_WRCH = "1023" *) + (* C_PROG_FULL_THRESH_NEGATE_VAL = "12" *) + (* C_PROG_FULL_TYPE = "0" *) + (* C_PROG_FULL_TYPE_AXIS = "0" *) + (* C_PROG_FULL_TYPE_RACH = "0" *) + (* C_PROG_FULL_TYPE_RDCH = "0" *) + (* C_PROG_FULL_TYPE_WACH = "0" *) + (* C_PROG_FULL_TYPE_WDCH = "0" *) + (* C_PROG_FULL_TYPE_WRCH = "0" *) + (* C_RACH_TYPE = "0" *) + (* C_RDCH_TYPE = "0" *) + (* C_RD_DATA_COUNT_WIDTH = "4" *) + (* C_RD_DEPTH = "16" *) + (* C_RD_FREQ = "1" *) + (* C_RD_PNTR_WIDTH = "4" *) + (* C_REG_SLICE_MODE_AXIS = "0" *) + (* C_REG_SLICE_MODE_RACH = "0" *) + (* C_REG_SLICE_MODE_RDCH = "0" *) + (* C_REG_SLICE_MODE_WACH = "0" *) + (* C_REG_SLICE_MODE_WDCH = "0" *) + (* C_REG_SLICE_MODE_WRCH = "0" *) + (* C_SELECT_XPM = "0" *) + (* C_SYNCHRONIZER_STAGE = "2" *) + (* C_UNDERFLOW_LOW = "0" *) + (* C_USE_COMMON_OVERFLOW = "0" *) + (* C_USE_COMMON_UNDERFLOW = "0" *) + (* C_USE_DEFAULT_SETTINGS = "0" *) + (* C_USE_DOUT_RST = "1" *) + (* C_USE_ECC = "0" *) + (* C_USE_ECC_AXIS = "0" *) + (* C_USE_ECC_RACH = "0" *) + (* C_USE_ECC_RDCH = "0" *) + (* C_USE_ECC_WACH = "0" *) + (* C_USE_ECC_WDCH = "0" *) + (* C_USE_ECC_WRCH = "0" *) + (* C_USE_EMBEDDED_REG = "0" *) + (* C_USE_FIFO16_FLAGS = "0" *) + (* C_USE_FWFT_DATA_COUNT = "0" *) + (* C_USE_PIPELINE_REG = "0" *) + (* C_VALID_LOW = "0" *) + (* C_WACH_TYPE = "0" *) + (* C_WDCH_TYPE = "0" *) + (* C_WRCH_TYPE = "0" *) + (* C_WR_ACK_LOW = "0" *) + (* C_WR_DATA_COUNT_WIDTH = "4" *) + (* C_WR_DEPTH = "16" *) + (* C_WR_DEPTH_AXIS = "1024" *) + (* C_WR_DEPTH_RACH = "16" *) + (* C_WR_DEPTH_RDCH = "1024" *) + (* C_WR_DEPTH_WACH = "16" *) + (* C_WR_DEPTH_WDCH = "1024" *) + (* C_WR_DEPTH_WRCH = "16" *) + (* C_WR_FREQ = "1" *) + (* C_WR_PNTR_WIDTH = "4" *) + (* C_WR_PNTR_WIDTH_AXIS = "10" *) + (* C_WR_PNTR_WIDTH_RACH = "4" *) + (* C_WR_PNTR_WIDTH_RDCH = "10" *) + (* C_WR_PNTR_WIDTH_WACH = "4" *) + (* C_WR_PNTR_WIDTH_WDCH = "10" *) + (* C_WR_PNTR_WIDTH_WRCH = "4" *) + (* C_WR_RESPONSE_LATENCY = "1" *) + (* is_du_within_envelope = "true" *) + ip7_fifo_generator_v13_2_9 U0 + (.axi_ar_injectdbiterr(\ ), + .axi_ar_injectsbiterr(\ ), + .axi_ar_prog_empty_thresh({\ ,\ ,\ ,\ }), + .axi_ar_prog_full_thresh({\ ,\ ,\ ,\ }), + .axi_aw_injectdbiterr(\ ), + .axi_aw_injectsbiterr(\ ), + .axi_aw_prog_empty_thresh({\ ,\ ,\ ,\ }), + .axi_aw_prog_full_thresh({\ ,\ ,\ ,\ }), + .axi_b_injectdbiterr(\ ), + .axi_b_injectsbiterr(\ ), + .axi_b_prog_empty_thresh({\ ,\ ,\ ,\ }), + .axi_b_prog_full_thresh({\ ,\ ,\ ,\ }), + .axi_r_injectdbiterr(\ ), + .axi_r_injectsbiterr(\ ), + .axi_r_prog_empty_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axi_r_prog_full_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axi_w_injectdbiterr(\ ), + .axi_w_injectsbiterr(\ ), + .axi_w_prog_empty_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axi_w_prog_full_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axis_injectdbiterr(\ ), + .axis_injectsbiterr(\ ), + .axis_prog_empty_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axis_prog_full_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .backup(\ ), + .backup_marker(\ ), + .clk(\ ), + .din(din), + .dout(dout), + .empty(empty), + .full(full), + .injectdbiterr(\ ), + .injectsbiterr(\ ), + .int_clk(\ ), + .m_aclk(\ ), + .m_aclk_en(\ ), + .m_axi_arready(\ ), + .m_axi_awready(\ ), + .m_axi_bid(\ ), + .m_axi_bresp({\ ,\ }), + .m_axi_buser(\ ), + .m_axi_bvalid(\ ), + .m_axi_rdata({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .m_axi_rid(\ ), + .m_axi_rlast(\ ), + .m_axi_rresp({\ ,\ }), + .m_axi_ruser(\ ), + .m_axi_rvalid(\ ), + .m_axi_wready(\ ), + .m_axis_tready(\ ), + .prog_empty_thresh({\ ,\ ,\ ,\ }), + .prog_empty_thresh_assert({\ ,\ ,\ ,\ }), + .prog_empty_thresh_negate({\ ,\ ,\ ,\ }), + .prog_full_thresh({\ ,\ ,\ ,\ }), + .prog_full_thresh_assert({\ ,\ ,\ ,\ }), + .prog_full_thresh_negate({\ ,\ ,\ ,\ }), + .rd_clk(rd_clk), + .rd_en(rd_en), + .rd_rst(\ ), + .rst(rst), + .s_aclk(\ ), + .s_aclk_en(\ ), + .s_aresetn(\ ), + .s_axi_araddr({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_arburst({\ ,\ }), + .s_axi_arcache({\ ,\ ,\ ,\ }), + .s_axi_arid(\ ), + .s_axi_arlen({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_arlock(\ ), + .s_axi_arprot({\ ,\ ,\ }), + .s_axi_arqos({\ ,\ ,\ ,\ }), + .s_axi_arregion({\ ,\ ,\ ,\ }), + .s_axi_arsize({\ ,\ ,\ }), + .s_axi_aruser(\ ), + .s_axi_arvalid(\ ), + .s_axi_awaddr({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_awburst({\ ,\ }), + .s_axi_awcache({\ ,\ ,\ ,\ }), + .s_axi_awid(\ ), + .s_axi_awlen({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_awlock(\ ), + .s_axi_awprot({\ ,\ ,\ }), + .s_axi_awqos({\ ,\ ,\ ,\ }), + .s_axi_awregion({\ ,\ ,\ ,\ }), + .s_axi_awsize({\ ,\ ,\ }), + .s_axi_awuser(\ ), + .s_axi_awvalid(\ ), + .s_axi_bready(\ ), + .s_axi_rready(\ ), + .s_axi_wdata({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_wid(\ ), + .s_axi_wlast(\ ), + .s_axi_wstrb({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_wuser(\ ), + .s_axi_wvalid(\ ), + .s_axis_tdata({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axis_tdest(\ ), + .s_axis_tid(\ ), + .s_axis_tkeep(\ ), + .s_axis_tlast(\ ), + .s_axis_tstrb(\ ), + .s_axis_tuser({\ ,\ ,\ ,\ }), + .s_axis_tvalid(\ ), + .sleep(\ ), + .srst(\ ), + .valid(valid), + .wr_clk(wr_clk), + .wr_en(wr_en), + .wr_rst(\ )); +endmodule + +(* DEF_VAL = "1'b0" *) (* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "0" *) +(* INV_DEF_VAL = "1'b1" *) (* ORIG_REF_NAME = "xpm_cdc_async_rst" *) (* RST_ACTIVE_HIGH = "1" *) +(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* core_generation_info = "xpm_cdc_async_rst,xpm_cdc_async_rst,{DEST_SYNC_FF=2,INIT_SYNC_FF=0,RST_ACTIVE_HIGH=1,VERSION=0,DEF_VAL=1'b0,INV_DEF_VAL=1'b1}" *) +(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "ASYNC_RST" *) +module ip7_xpm_cdc_async_rst + (src_arst, + dest_clk, + .dest_arst(arststages_ff[1])); + input src_arst; + input dest_clk; + output [1:0]arststages_ff; + + wire \ ; + wire \ ; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ASYNC_RST" *) wire [1:0]arststages_ff; + wire dest_clk; + wire src_arst; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "ASYNC_RST" *) + FDPE #( + .INIT(1'b0)) + \arststages_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(\ ), + .PRE(src_arst), + .Q(arststages_ff[0])); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "ASYNC_RST" *) + FDPE #( + .INIT(1'b0)) + \arststages_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(arststages_ff[0]), + .PRE(src_arst), + .Q(arststages_ff[1])); +endmodule + +(* DEF_VAL = "1'b0" *) (* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "0" *) +(* INV_DEF_VAL = "1'b1" *) (* ORIG_REF_NAME = "xpm_cdc_async_rst" *) (* RST_ACTIVE_HIGH = "1" *) +(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* core_generation_info = "xpm_cdc_async_rst,xpm_cdc_async_rst,{DEST_SYNC_FF=2,INIT_SYNC_FF=0,RST_ACTIVE_HIGH=1,VERSION=0,DEF_VAL=1'b0,INV_DEF_VAL=1'b1}" *) +(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "ASYNC_RST" *) +module ip7_xpm_cdc_async_rst__1 + (src_arst, + dest_clk, + .dest_arst(arststages_ff[1])); + input src_arst; + input dest_clk; + output [1:0]arststages_ff; + + wire \ ; + wire \ ; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "ASYNC_RST" *) wire [1:0]arststages_ff; + wire dest_clk; + wire src_arst; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "ASYNC_RST" *) + FDPE #( + .INIT(1'b0)) + \arststages_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(\ ), + .PRE(src_arst), + .Q(arststages_ff[0])); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "ASYNC_RST" *) + FDPE #( + .INIT(1'b0)) + \arststages_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(arststages_ff[0]), + .PRE(src_arst), + .Q(arststages_ff[1])); +endmodule + +(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_gray" *) +(* REG_OUTPUT = "1" *) (* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) +(* VERSION = "0" *) (* WIDTH = "4" *) (* XPM_MODULE = "TRUE" *) +(* core_generation_info = "xpm_cdc_gray,xpm_cdc_gray,{DEST_SYNC_FF=2,INIT_SYNC_FF=0,REG_OUTPUT=1,SIM_ASSERT_CHK=0,SIM_LOSSLESS_GRAY_CHK=0,VERSION=0,WIDTH=4}" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) +(* xpm_cdc = "GRAY" *) +module ip7_xpm_cdc_gray + (src_clk, + src_in_bin, + dest_clk, + dest_out_bin); + input src_clk; + input [3:0]src_in_bin; + input dest_clk; + output [3:0]dest_out_bin; + + wire \ ; + wire \ ; + wire [3:0]async_path; + wire [2:0]binval; + wire dest_clk; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [3:0]\dest_graysync_ff[0] ; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [3:0]\dest_graysync_ff[1] ; + wire [3:0]dest_out_bin; + wire [2:0]gray_enc; + wire src_clk; + wire [3:0]src_in_bin; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][0] + (.C(dest_clk), + .CE(\ ), + .D(async_path[0]), + .Q(\dest_graysync_ff[0] [0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][1] + (.C(dest_clk), + .CE(\ ), + .D(async_path[1]), + .Q(\dest_graysync_ff[0] [1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][2] + (.C(dest_clk), + .CE(\ ), + .D(async_path[2]), + .Q(\dest_graysync_ff[0] [2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][3] + (.C(dest_clk), + .CE(\ ), + .D(async_path[3]), + .Q(\dest_graysync_ff[0] [3]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][0] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [0]), + .Q(\dest_graysync_ff[1] [0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][1] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [1]), + .Q(\dest_graysync_ff[1] [1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][2] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [2]), + .Q(\dest_graysync_ff[1] [2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][3] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [3]), + .Q(\dest_graysync_ff[1] [3]), + .R(\ )); + LUT4 #( + .INIT(16'h6996)) + \dest_out_bin_ff[0]_i_1 + (.I0(\dest_graysync_ff[1] [0]), + .I1(\dest_graysync_ff[1] [2]), + .I2(\dest_graysync_ff[1] [3]), + .I3(\dest_graysync_ff[1] [1]), + .O(binval[0])); + LUT3 #( + .INIT(8'h96)) + \dest_out_bin_ff[1]_i_1 + (.I0(\dest_graysync_ff[1] [1]), + .I1(\dest_graysync_ff[1] [3]), + .I2(\dest_graysync_ff[1] [2]), + .O(binval[1])); + LUT2 #( + .INIT(4'h6)) + \dest_out_bin_ff[2]_i_1 + (.I0(\dest_graysync_ff[1] [2]), + .I1(\dest_graysync_ff[1] [3]), + .O(binval[2])); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(binval[0]), + .Q(dest_out_bin[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(binval[1]), + .Q(dest_out_bin[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[2] + (.C(dest_clk), + .CE(\ ), + .D(binval[2]), + .Q(dest_out_bin[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[3] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[1] [3]), + .Q(dest_out_bin[3]), + .R(\ )); + (* SOFT_HLUTNM = "soft_lutpair1" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[0]_i_1 + (.I0(src_in_bin[1]), + .I1(src_in_bin[0]), + .O(gray_enc[0])); + (* SOFT_HLUTNM = "soft_lutpair1" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[1]_i_1 + (.I0(src_in_bin[2]), + .I1(src_in_bin[1]), + .O(gray_enc[1])); + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[2]_i_1 + (.I0(src_in_bin[3]), + .I1(src_in_bin[2]), + .O(gray_enc[2])); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[0] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[0]), + .Q(async_path[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[1] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[1]), + .Q(async_path[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[2] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[2]), + .Q(async_path[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[3] + (.C(src_clk), + .CE(\ ), + .D(src_in_bin[3]), + .Q(async_path[3]), + .R(\ )); +endmodule + +(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_gray" *) +(* REG_OUTPUT = "1" *) (* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) +(* VERSION = "0" *) (* WIDTH = "4" *) (* XPM_MODULE = "TRUE" *) +(* core_generation_info = "xpm_cdc_gray,xpm_cdc_gray,{DEST_SYNC_FF=2,INIT_SYNC_FF=0,REG_OUTPUT=1,SIM_ASSERT_CHK=0,SIM_LOSSLESS_GRAY_CHK=0,VERSION=0,WIDTH=4}" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) +(* xpm_cdc = "GRAY" *) +module ip7_xpm_cdc_gray__2 + (src_clk, + src_in_bin, + dest_clk, + dest_out_bin); + input src_clk; + input [3:0]src_in_bin; + input dest_clk; + output [3:0]dest_out_bin; + + wire \ ; + wire \ ; + wire [3:0]async_path; + wire [2:0]binval; + wire dest_clk; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [3:0]\dest_graysync_ff[0] ; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [3:0]\dest_graysync_ff[1] ; + wire [3:0]dest_out_bin; + wire [2:0]gray_enc; + wire src_clk; + wire [3:0]src_in_bin; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][0] + (.C(dest_clk), + .CE(\ ), + .D(async_path[0]), + .Q(\dest_graysync_ff[0] [0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][1] + (.C(dest_clk), + .CE(\ ), + .D(async_path[1]), + .Q(\dest_graysync_ff[0] [1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][2] + (.C(dest_clk), + .CE(\ ), + .D(async_path[2]), + .Q(\dest_graysync_ff[0] [2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][3] + (.C(dest_clk), + .CE(\ ), + .D(async_path[3]), + .Q(\dest_graysync_ff[0] [3]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][0] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [0]), + .Q(\dest_graysync_ff[1] [0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][1] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [1]), + .Q(\dest_graysync_ff[1] [1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][2] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [2]), + .Q(\dest_graysync_ff[1] [2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][3] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [3]), + .Q(\dest_graysync_ff[1] [3]), + .R(\ )); + LUT4 #( + .INIT(16'h6996)) + \dest_out_bin_ff[0]_i_1 + (.I0(\dest_graysync_ff[1] [0]), + .I1(\dest_graysync_ff[1] [2]), + .I2(\dest_graysync_ff[1] [3]), + .I3(\dest_graysync_ff[1] [1]), + .O(binval[0])); + LUT3 #( + .INIT(8'h96)) + \dest_out_bin_ff[1]_i_1 + (.I0(\dest_graysync_ff[1] [1]), + .I1(\dest_graysync_ff[1] [3]), + .I2(\dest_graysync_ff[1] [2]), + .O(binval[1])); + LUT2 #( + .INIT(4'h6)) + \dest_out_bin_ff[2]_i_1 + (.I0(\dest_graysync_ff[1] [2]), + .I1(\dest_graysync_ff[1] [3]), + .O(binval[2])); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(binval[0]), + .Q(dest_out_bin[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(binval[1]), + .Q(dest_out_bin[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[2] + (.C(dest_clk), + .CE(\ ), + .D(binval[2]), + .Q(dest_out_bin[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[3] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[1] [3]), + .Q(dest_out_bin[3]), + .R(\ )); + (* SOFT_HLUTNM = "soft_lutpair0" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[0]_i_1 + (.I0(src_in_bin[1]), + .I1(src_in_bin[0]), + .O(gray_enc[0])); + (* SOFT_HLUTNM = "soft_lutpair0" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[1]_i_1 + (.I0(src_in_bin[2]), + .I1(src_in_bin[1]), + .O(gray_enc[1])); + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[2]_i_1 + (.I0(src_in_bin[3]), + .I1(src_in_bin[2]), + .O(gray_enc[2])); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[0] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[0]), + .Q(async_path[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[1] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[1]), + .Q(async_path[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[2] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[2]), + .Q(async_path[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[3] + (.C(src_clk), + .CE(\ ), + .D(src_in_bin[3]), + .Q(async_path[3]), + .R(\ )); +endmodule + +(* DEST_SYNC_FF = "4" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) +(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) +(* XPM_MODULE = "TRUE" *) (* core_generation_info = "xpm_cdc_single,xpm_cdc_single,{DEST_SYNC_FF=4,INIT_SYNC_FF=0,SIM_ASSERT_CHK=0,SRC_INPUT_REG=0,VERSION=0}" *) (* is_du_within_envelope = "true" *) +(* keep_hierarchy = "true" *) (* xpm_cdc = "SINGLE" *) +module ip7_xpm_cdc_single + (src_clk, + src_in, + dest_clk, + .dest_out(syncstages_ff[3])); + input src_clk; + input src_in; + input dest_clk; + output [3:0]syncstages_ff; + + wire \ ; + wire \ ; + wire dest_clk; + wire src_in; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [3:0]syncstages_ff; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(src_in), + .Q(syncstages_ff[0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[0]), + .Q(syncstages_ff[1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[2] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[1]), + .Q(syncstages_ff[2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[3] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[2]), + .Q(syncstages_ff[3]), + .R(\ )); +endmodule + +(* DEST_SYNC_FF = "4" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) +(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) +(* XPM_MODULE = "TRUE" *) (* core_generation_info = "xpm_cdc_single,xpm_cdc_single,{DEST_SYNC_FF=4,INIT_SYNC_FF=0,SIM_ASSERT_CHK=0,SRC_INPUT_REG=0,VERSION=0}" *) (* is_du_within_envelope = "true" *) +(* keep_hierarchy = "true" *) (* xpm_cdc = "SINGLE" *) +module ip7_xpm_cdc_single__2 + (src_clk, + src_in, + dest_clk, + .dest_out(syncstages_ff[3])); + input src_clk; + input src_in; + input dest_clk; + output [3:0]syncstages_ff; + + wire \ ; + wire \ ; + wire dest_clk; + wire src_in; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [3:0]syncstages_ff; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(src_in), + .Q(syncstages_ff[0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[0]), + .Q(syncstages_ff[1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[2] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[1]), + .Q(syncstages_ff[2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[3] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[2]), + .Q(syncstages_ff[3]), + .R(\ )); +endmodule + +(* CHECK_LICENSE_TYPE = "ip8,fifo_generator_v13_2_9,{}" *) (* core_generation_info = "ip8,fifo_generator_v13_2_9,{x_ipProduct=Vivado 2023.2,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=fifo_generator,x_ipVersion=13.2,x_ipCoreRevision=9,x_ipLanguage=VERILOG,x_ipSimLanguage=MIXED,C_COMMON_CLOCK=0,C_SELECT_XPM=0,C_COUNT_TYPE=0,C_DATA_COUNT_WIDTH=13,C_DEFAULT_VALUE=BlankString,C_DIN_WIDTH=256,C_DOUT_RST_VAL=0,C_DOUT_WIDTH=256,C_ENABLE_RLOCS=0,C_FAMILY=artix7,C_FULL_FLAGS_RST_VAL=1,C_HAS_ALMOST_EMPTY=0,C_HAS_ALMOST_FULL=1,C_HAS_BACKUP=0,C_HAS_DATA_COUNT=0,C_HAS_INT_CLK=0,C_HAS_MEMINIT_FILE=0,C_HAS_OVERFLOW=0,C_HAS_RD_DATA_COUNT=0,C_HAS_RD_RST=0,C_HAS_RST=1,C_HAS_SRST=0,C_HAS_UNDERFLOW=0,C_HAS_VALID=1,C_HAS_WR_ACK=0,C_HAS_WR_DATA_COUNT=0,C_HAS_WR_RST=0,C_IMPLEMENTATION_TYPE=2,C_INIT_WR_PNTR_VAL=0,C_MEMORY_TYPE=1,C_MIF_FILE_NAME=BlankString,C_OPTIMIZATION_MODE=0,C_OVERFLOW_LOW=0,C_PRELOAD_LATENCY=2,C_PRELOAD_REGS=1,C_PRIM_FIFO_TYPE=2kx18,C_PROG_EMPTY_THRESH_ASSERT_VAL=2,C_PROG_EMPTY_THRESH_NEGATE_VAL=3,C_PROG_EMPTY_TYPE=0,C_PROG_FULL_THRESH_ASSERT_VAL=8189,C_PROG_FULL_THRESH_NEGATE_VAL=8188,C_PROG_FULL_TYPE=0,C_RD_DATA_COUNT_WIDTH=13,C_RD_DEPTH=8192,C_RD_FREQ=1,C_RD_PNTR_WIDTH=13,C_UNDERFLOW_LOW=0,C_USE_DOUT_RST=1,C_USE_ECC=0,C_USE_EMBEDDED_REG=1,C_USE_PIPELINE_REG=0,C_POWER_SAVING_MODE=0,C_USE_FIFO16_FLAGS=0,C_USE_FWFT_DATA_COUNT=0,C_VALID_LOW=0,C_WR_ACK_LOW=0,C_WR_DATA_COUNT_WIDTH=13,C_WR_DEPTH=8192,C_WR_FREQ=1,C_WR_PNTR_WIDTH=13,C_WR_RESPONSE_LATENCY=1,C_MSGON_VAL=1,C_ENABLE_RST_SYNC=1,C_EN_SAFETY_CKT=1,C_ERROR_INJECTION_TYPE=0,C_SYNCHRONIZER_STAGE=2,C_INTERFACE_TYPE=0,C_AXI_TYPE=1,C_HAS_AXI_WR_CHANNEL=1,C_HAS_AXI_RD_CHANNEL=1,C_HAS_SLAVE_CE=0,C_HAS_MASTER_CE=0,C_ADD_NGC_CONSTRAINT=0,C_USE_COMMON_OVERFLOW=0,C_USE_COMMON_UNDERFLOW=0,C_USE_DEFAULT_SETTINGS=0,C_AXI_ID_WIDTH=1,C_AXI_ADDR_WIDTH=32,C_AXI_DATA_WIDTH=64,C_AXI_LEN_WIDTH=8,C_AXI_LOCK_WIDTH=1,C_HAS_AXI_ID=0,C_HAS_AXI_AWUSER=0,C_HAS_AXI_WUSER=0,C_HAS_AXI_BUSER=0,C_HAS_AXI_ARUSER=0,C_HAS_AXI_RUSER=0,C_AXI_ARUSER_WIDTH=1,C_AXI_AWUSER_WIDTH=1,C_AXI_WUSER_WIDTH=1,C_AXI_BUSER_WIDTH=1,C_AXI_RUSER_WIDTH=1,C_HAS_AXIS_TDATA=1,C_HAS_AXIS_TID=0,C_HAS_AXIS_TDEST=0,C_HAS_AXIS_TUSER=1,C_HAS_AXIS_TREADY=1,C_HAS_AXIS_TLAST=0,C_HAS_AXIS_TSTRB=0,C_HAS_AXIS_TKEEP=0,C_AXIS_TDATA_WIDTH=8,C_AXIS_TID_WIDTH=1,C_AXIS_TDEST_WIDTH=1,C_AXIS_TUSER_WIDTH=4,C_AXIS_TSTRB_WIDTH=1,C_AXIS_TKEEP_WIDTH=1,C_WACH_TYPE=0,C_WDCH_TYPE=0,C_WRCH_TYPE=0,C_RACH_TYPE=0,C_RDCH_TYPE=0,C_AXIS_TYPE=0,C_IMPLEMENTATION_TYPE_WACH=1,C_IMPLEMENTATION_TYPE_WDCH=1,C_IMPLEMENTATION_TYPE_WRCH=1,C_IMPLEMENTATION_TYPE_RACH=1,C_IMPLEMENTATION_TYPE_RDCH=1,C_IMPLEMENTATION_TYPE_AXIS=1,C_APPLICATION_TYPE_WACH=0,C_APPLICATION_TYPE_WDCH=0,C_APPLICATION_TYPE_WRCH=0,C_APPLICATION_TYPE_RACH=0,C_APPLICATION_TYPE_RDCH=0,C_APPLICATION_TYPE_AXIS=0,C_PRIM_FIFO_TYPE_WACH=512x36,C_PRIM_FIFO_TYPE_WDCH=1kx36,C_PRIM_FIFO_TYPE_WRCH=512x36,C_PRIM_FIFO_TYPE_RACH=512x36,C_PRIM_FIFO_TYPE_RDCH=1kx36,C_PRIM_FIFO_TYPE_AXIS=1kx18,C_USE_ECC_WACH=0,C_USE_ECC_WDCH=0,C_USE_ECC_WRCH=0,C_USE_ECC_RACH=0,C_USE_ECC_RDCH=0,C_USE_ECC_AXIS=0,C_ERROR_INJECTION_TYPE_WACH=0,C_ERROR_INJECTION_TYPE_WDCH=0,C_ERROR_INJECTION_TYPE_WRCH=0,C_ERROR_INJECTION_TYPE_RACH=0,C_ERROR_INJECTION_TYPE_RDCH=0,C_ERROR_INJECTION_TYPE_AXIS=0,C_DIN_WIDTH_WACH=1,C_DIN_WIDTH_WDCH=64,C_DIN_WIDTH_WRCH=2,C_DIN_WIDTH_RACH=32,C_DIN_WIDTH_RDCH=64,C_DIN_WIDTH_AXIS=1,C_WR_DEPTH_WACH=16,C_WR_DEPTH_WDCH=1024,C_WR_DEPTH_WRCH=16,C_WR_DEPTH_RACH=16,C_WR_DEPTH_RDCH=1024,C_WR_DEPTH_AXIS=1024,C_WR_PNTR_WIDTH_WACH=4,C_WR_PNTR_WIDTH_WDCH=10,C_WR_PNTR_WIDTH_WRCH=4,C_WR_PNTR_WIDTH_RACH=4,C_WR_PNTR_WIDTH_RDCH=10,C_WR_PNTR_WIDTH_AXIS=10,C_HAS_DATA_COUNTS_WACH=0,C_HAS_DATA_COUNTS_WDCH=0,C_HAS_DATA_COUNTS_WRCH=0,C_HAS_DATA_COUNTS_RACH=0,C_HAS_DATA_COUNTS_RDCH=0,C_HAS_DATA_COUNTS_AXIS=0,C_HAS_PROG_FLAGS_WACH=0,C_HAS_PROG_FLAGS_WDCH=0,C_HAS_PROG_FLAGS_WRCH=0,C_HAS_PROG_FLAGS_RACH=0,C_HAS_PROG_FLAGS_RDCH=0,C_HAS_PROG_FLAGS_AXIS=0,C_PROG_FULL_TYPE_WACH=0,C_PROG_FULL_TYPE_WDCH=0,C_PROG_FULL_TYPE_WRCH=0,C_PROG_FULL_TYPE_RACH=0,C_PROG_FULL_TYPE_RDCH=0,C_PROG_FULL_TYPE_AXIS=0,C_PROG_FULL_THRESH_ASSERT_VAL_WACH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_WDCH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_WRCH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_RACH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_RDCH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_AXIS=1023,C_PROG_EMPTY_TYPE_WACH=0,C_PROG_EMPTY_TYPE_WDCH=0,C_PROG_EMPTY_TYPE_WRCH=0,C_PROG_EMPTY_TYPE_RACH=0,C_PROG_EMPTY_TYPE_RDCH=0,C_PROG_EMPTY_TYPE_AXIS=0,C_PROG_EMPTY_THRESH_ASSERT_VAL_WACH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_WDCH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_WRCH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_RACH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_RDCH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_AXIS=1022,C_REG_SLICE_MODE_WACH=0,C_REG_SLICE_MODE_WDCH=0,C_REG_SLICE_MODE_WRCH=0,C_REG_SLICE_MODE_RACH=0,C_REG_SLICE_MODE_RDCH=0,C_REG_SLICE_MODE_AXIS=0}" *) (* downgradeipidentifiedwarnings = "yes" *) +(* x_core_info = "fifo_generator_v13_2_9,Vivado 2023.2" *) +module ip8 + (rst, + wr_clk, + rd_clk, + din, + wr_en, + rd_en, + dout, + full, + almost_full, + empty, + valid, + wr_rst_busy, + rd_rst_busy); + input rst; + (* x_interface_info = "xilinx.com:signal:clock:1.0 write_clk CLK" *) (* x_interface_parameter = "XIL_INTERFACENAME write_clk, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, INSERT_VIP 0" *) input wr_clk; + (* x_interface_info = "xilinx.com:signal:clock:1.0 read_clk CLK" *) (* x_interface_parameter = "XIL_INTERFACENAME read_clk, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, INSERT_VIP 0" *) input rd_clk; + (* x_interface_info = "xilinx.com:interface:fifo_write:1.0 FIFO_WRITE WR_DATA" *) input [255:0]din; + (* x_interface_info = "xilinx.com:interface:fifo_write:1.0 FIFO_WRITE WR_EN" *) input wr_en; + (* x_interface_info = "xilinx.com:interface:fifo_read:1.0 FIFO_READ RD_EN" *) input rd_en; + (* x_interface_info = "xilinx.com:interface:fifo_read:1.0 FIFO_READ RD_DATA" *) output [255:0]dout; + (* x_interface_info = "xilinx.com:interface:fifo_write:1.0 FIFO_WRITE FULL" *) output full; + (* x_interface_info = "xilinx.com:interface:fifo_write:1.0 FIFO_WRITE ALMOST_FULL" *) output almost_full; + (* x_interface_info = "xilinx.com:interface:fifo_read:1.0 FIFO_READ EMPTY" *) output empty; + output valid; + output wr_rst_busy; + output rd_rst_busy; + + wire \ ; + wire almost_full; + wire [255:0]din; + wire [255:0]dout; + wire empty; + wire full; + wire rd_clk; + wire rd_en; + wire rd_rst_busy; + wire rst; + wire valid; + wire wr_clk; + wire wr_en; + wire wr_rst_busy; + + GND GND + (.G(\ )); + (* C_ADD_NGC_CONSTRAINT = "0" *) + (* C_APPLICATION_TYPE_AXIS = "0" *) + (* C_APPLICATION_TYPE_RACH = "0" *) + (* C_APPLICATION_TYPE_RDCH = "0" *) + (* C_APPLICATION_TYPE_WACH = "0" *) + (* C_APPLICATION_TYPE_WDCH = "0" *) + (* C_APPLICATION_TYPE_WRCH = "0" *) + (* C_AXIS_TDATA_WIDTH = "8" *) + (* C_AXIS_TDEST_WIDTH = "1" *) + (* C_AXIS_TID_WIDTH = "1" *) + (* C_AXIS_TKEEP_WIDTH = "1" *) + (* C_AXIS_TSTRB_WIDTH = "1" *) + (* C_AXIS_TUSER_WIDTH = "4" *) + (* C_AXIS_TYPE = "0" *) + (* C_AXI_ADDR_WIDTH = "32" *) + (* C_AXI_ARUSER_WIDTH = "1" *) + (* C_AXI_AWUSER_WIDTH = "1" *) + (* C_AXI_BUSER_WIDTH = "1" *) + (* C_AXI_DATA_WIDTH = "64" *) + (* C_AXI_ID_WIDTH = "1" *) + (* C_AXI_LEN_WIDTH = "8" *) + (* C_AXI_LOCK_WIDTH = "1" *) + (* C_AXI_RUSER_WIDTH = "1" *) + (* C_AXI_TYPE = "1" *) + (* C_AXI_WUSER_WIDTH = "1" *) + (* C_COMMON_CLOCK = "0" *) + (* C_COUNT_TYPE = "0" *) + (* C_DATA_COUNT_WIDTH = "13" *) + (* C_DEFAULT_VALUE = "BlankString" *) + (* C_DIN_WIDTH = "256" *) + (* C_DIN_WIDTH_AXIS = "1" *) + (* C_DIN_WIDTH_RACH = "32" *) + (* C_DIN_WIDTH_RDCH = "64" *) + (* C_DIN_WIDTH_WACH = "1" *) + (* C_DIN_WIDTH_WDCH = "64" *) + (* C_DIN_WIDTH_WRCH = "2" *) + (* C_DOUT_RST_VAL = "0" *) + (* C_DOUT_WIDTH = "256" *) + (* C_ENABLE_RLOCS = "0" *) + (* C_ENABLE_RST_SYNC = "1" *) + (* C_EN_SAFETY_CKT = "1" *) + (* C_ERROR_INJECTION_TYPE = "0" *) + (* C_ERROR_INJECTION_TYPE_AXIS = "0" *) + (* C_ERROR_INJECTION_TYPE_RACH = "0" *) + (* C_ERROR_INJECTION_TYPE_RDCH = "0" *) + (* C_ERROR_INJECTION_TYPE_WACH = "0" *) + (* C_ERROR_INJECTION_TYPE_WDCH = "0" *) + (* C_ERROR_INJECTION_TYPE_WRCH = "0" *) + (* C_FAMILY = "artix7" *) + (* C_FULL_FLAGS_RST_VAL = "1" *) + (* C_HAS_ALMOST_EMPTY = "0" *) + (* C_HAS_ALMOST_FULL = "1" *) + (* C_HAS_AXIS_TDATA = "1" *) + (* C_HAS_AXIS_TDEST = "0" *) + (* C_HAS_AXIS_TID = "0" *) + (* C_HAS_AXIS_TKEEP = "0" *) + (* C_HAS_AXIS_TLAST = "0" *) + (* C_HAS_AXIS_TREADY = "1" *) + (* C_HAS_AXIS_TSTRB = "0" *) + (* C_HAS_AXIS_TUSER = "1" *) + (* C_HAS_AXI_ARUSER = "0" *) + (* C_HAS_AXI_AWUSER = "0" *) + (* C_HAS_AXI_BUSER = "0" *) + (* C_HAS_AXI_ID = "0" *) + (* C_HAS_AXI_RD_CHANNEL = "1" *) + (* C_HAS_AXI_RUSER = "0" *) + (* C_HAS_AXI_WR_CHANNEL = "1" *) + (* C_HAS_AXI_WUSER = "0" *) + (* C_HAS_BACKUP = "0" *) + (* C_HAS_DATA_COUNT = "0" *) + (* C_HAS_DATA_COUNTS_AXIS = "0" *) + (* C_HAS_DATA_COUNTS_RACH = "0" *) + (* C_HAS_DATA_COUNTS_RDCH = "0" *) + (* C_HAS_DATA_COUNTS_WACH = "0" *) + (* C_HAS_DATA_COUNTS_WDCH = "0" *) + (* C_HAS_DATA_COUNTS_WRCH = "0" *) + (* C_HAS_INT_CLK = "0" *) + (* C_HAS_MASTER_CE = "0" *) + (* C_HAS_MEMINIT_FILE = "0" *) + (* C_HAS_OVERFLOW = "0" *) + (* C_HAS_PROG_FLAGS_AXIS = "0" *) + (* C_HAS_PROG_FLAGS_RACH = "0" *) + (* C_HAS_PROG_FLAGS_RDCH = "0" *) + (* C_HAS_PROG_FLAGS_WACH = "0" *) + (* C_HAS_PROG_FLAGS_WDCH = "0" *) + (* C_HAS_PROG_FLAGS_WRCH = "0" *) + (* C_HAS_RD_DATA_COUNT = "0" *) + (* C_HAS_RD_RST = "0" *) + (* C_HAS_RST = "1" *) + (* C_HAS_SLAVE_CE = "0" *) + (* C_HAS_SRST = "0" *) + (* C_HAS_UNDERFLOW = "0" *) + (* C_HAS_VALID = "1" *) + (* C_HAS_WR_ACK = "0" *) + (* C_HAS_WR_DATA_COUNT = "0" *) + (* C_HAS_WR_RST = "0" *) + (* C_IMPLEMENTATION_TYPE = "2" *) + (* C_IMPLEMENTATION_TYPE_AXIS = "1" *) + (* C_IMPLEMENTATION_TYPE_RACH = "1" *) + (* C_IMPLEMENTATION_TYPE_RDCH = "1" *) + (* C_IMPLEMENTATION_TYPE_WACH = "1" *) + (* C_IMPLEMENTATION_TYPE_WDCH = "1" *) + (* C_IMPLEMENTATION_TYPE_WRCH = "1" *) + (* C_INIT_WR_PNTR_VAL = "0" *) + (* C_INTERFACE_TYPE = "0" *) + (* C_MEMORY_TYPE = "1" *) + (* C_MIF_FILE_NAME = "BlankString" *) + (* C_MSGON_VAL = "1" *) + (* C_OPTIMIZATION_MODE = "0" *) + (* C_OVERFLOW_LOW = "0" *) + (* C_POWER_SAVING_MODE = "0" *) + (* C_PRELOAD_LATENCY = "2" *) + (* C_PRELOAD_REGS = "1" *) + (* C_PRIM_FIFO_TYPE = "2kx18" *) + (* C_PRIM_FIFO_TYPE_AXIS = "1kx18" *) + (* C_PRIM_FIFO_TYPE_RACH = "512x36" *) + (* C_PRIM_FIFO_TYPE_RDCH = "1kx36" *) + (* C_PRIM_FIFO_TYPE_WACH = "512x36" *) + (* C_PRIM_FIFO_TYPE_WDCH = "1kx36" *) + (* C_PRIM_FIFO_TYPE_WRCH = "512x36" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL = "2" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_AXIS = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_RACH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_RDCH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_WACH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_WDCH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_WRCH = "1022" *) + (* C_PROG_EMPTY_THRESH_NEGATE_VAL = "3" *) + (* C_PROG_EMPTY_TYPE = "0" *) + (* C_PROG_EMPTY_TYPE_AXIS = "0" *) + (* C_PROG_EMPTY_TYPE_RACH = "0" *) + (* C_PROG_EMPTY_TYPE_RDCH = "0" *) + (* C_PROG_EMPTY_TYPE_WACH = "0" *) + (* C_PROG_EMPTY_TYPE_WDCH = "0" *) + (* C_PROG_EMPTY_TYPE_WRCH = "0" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL = "8189" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_AXIS = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_RACH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_RDCH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_WACH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_WDCH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_WRCH = "1023" *) + (* C_PROG_FULL_THRESH_NEGATE_VAL = "8188" *) + (* C_PROG_FULL_TYPE = "0" *) + (* C_PROG_FULL_TYPE_AXIS = "0" *) + (* C_PROG_FULL_TYPE_RACH = "0" *) + (* C_PROG_FULL_TYPE_RDCH = "0" *) + (* C_PROG_FULL_TYPE_WACH = "0" *) + (* C_PROG_FULL_TYPE_WDCH = "0" *) + (* C_PROG_FULL_TYPE_WRCH = "0" *) + (* C_RACH_TYPE = "0" *) + (* C_RDCH_TYPE = "0" *) + (* C_RD_DATA_COUNT_WIDTH = "13" *) + (* C_RD_DEPTH = "8192" *) + (* C_RD_FREQ = "1" *) + (* C_RD_PNTR_WIDTH = "13" *) + (* C_REG_SLICE_MODE_AXIS = "0" *) + (* C_REG_SLICE_MODE_RACH = "0" *) + (* C_REG_SLICE_MODE_RDCH = "0" *) + (* C_REG_SLICE_MODE_WACH = "0" *) + (* C_REG_SLICE_MODE_WDCH = "0" *) + (* C_REG_SLICE_MODE_WRCH = "0" *) + (* C_SELECT_XPM = "0" *) + (* C_SYNCHRONIZER_STAGE = "2" *) + (* C_UNDERFLOW_LOW = "0" *) + (* C_USE_COMMON_OVERFLOW = "0" *) + (* C_USE_COMMON_UNDERFLOW = "0" *) + (* C_USE_DEFAULT_SETTINGS = "0" *) + (* C_USE_DOUT_RST = "1" *) + (* C_USE_ECC = "0" *) + (* C_USE_ECC_AXIS = "0" *) + (* C_USE_ECC_RACH = "0" *) + (* C_USE_ECC_RDCH = "0" *) + (* C_USE_ECC_WACH = "0" *) + (* C_USE_ECC_WDCH = "0" *) + (* C_USE_ECC_WRCH = "0" *) + (* C_USE_EMBEDDED_REG = "1" *) + (* C_USE_FIFO16_FLAGS = "0" *) + (* C_USE_FWFT_DATA_COUNT = "0" *) + (* C_USE_PIPELINE_REG = "0" *) + (* C_VALID_LOW = "0" *) + (* C_WACH_TYPE = "0" *) + (* C_WDCH_TYPE = "0" *) + (* C_WRCH_TYPE = "0" *) + (* C_WR_ACK_LOW = "0" *) + (* C_WR_DATA_COUNT_WIDTH = "13" *) + (* C_WR_DEPTH = "8192" *) + (* C_WR_DEPTH_AXIS = "1024" *) + (* C_WR_DEPTH_RACH = "16" *) + (* C_WR_DEPTH_RDCH = "1024" *) + (* C_WR_DEPTH_WACH = "16" *) + (* C_WR_DEPTH_WDCH = "1024" *) + (* C_WR_DEPTH_WRCH = "16" *) + (* C_WR_FREQ = "1" *) + (* C_WR_PNTR_WIDTH = "13" *) + (* C_WR_PNTR_WIDTH_AXIS = "10" *) + (* C_WR_PNTR_WIDTH_RACH = "4" *) + (* C_WR_PNTR_WIDTH_RDCH = "10" *) + (* C_WR_PNTR_WIDTH_WACH = "4" *) + (* C_WR_PNTR_WIDTH_WDCH = "10" *) + (* C_WR_PNTR_WIDTH_WRCH = "4" *) + (* C_WR_RESPONSE_LATENCY = "1" *) + (* is_du_within_envelope = "true" *) + ip8_fifo_generator_v13_2_9 U0 + (.almost_full(almost_full), + .axi_ar_injectdbiterr(\ ), + .axi_ar_injectsbiterr(\ ), + .axi_ar_prog_empty_thresh({\ ,\ ,\ ,\ }), + .axi_ar_prog_full_thresh({\ ,\ ,\ ,\ }), + .axi_aw_injectdbiterr(\ ), + .axi_aw_injectsbiterr(\ ), + .axi_aw_prog_empty_thresh({\ ,\ ,\ ,\ }), + .axi_aw_prog_full_thresh({\ ,\ ,\ ,\ }), + .axi_b_injectdbiterr(\ ), + .axi_b_injectsbiterr(\ ), + .axi_b_prog_empty_thresh({\ ,\ ,\ ,\ }), + .axi_b_prog_full_thresh({\ ,\ ,\ ,\ }), + .axi_r_injectdbiterr(\ ), + .axi_r_injectsbiterr(\ ), + .axi_r_prog_empty_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axi_r_prog_full_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axi_w_injectdbiterr(\ ), + .axi_w_injectsbiterr(\ ), + .axi_w_prog_empty_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axi_w_prog_full_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axis_injectdbiterr(\ ), + .axis_injectsbiterr(\ ), + .axis_prog_empty_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axis_prog_full_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .backup(\ ), + .backup_marker(\ ), + .clk(\ ), + .din(din), + .dout(dout), + .empty(empty), + .full(full), + .injectdbiterr(\ ), + .injectsbiterr(\ ), + .int_clk(\ ), + .m_aclk(\ ), + .m_aclk_en(\ ), + .m_axi_arready(\ ), + .m_axi_awready(\ ), + .m_axi_bid(\ ), + .m_axi_bresp({\ ,\ }), + .m_axi_buser(\ ), + .m_axi_bvalid(\ ), + .m_axi_rdata({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .m_axi_rid(\ ), + .m_axi_rlast(\ ), + .m_axi_rresp({\ ,\ }), + .m_axi_ruser(\ ), + .m_axi_rvalid(\ ), + .m_axi_wready(\ ), + .m_axis_tready(\ ), + .prog_empty_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .prog_empty_thresh_assert({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .prog_empty_thresh_negate({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .prog_full_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .prog_full_thresh_assert({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .prog_full_thresh_negate({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .rd_clk(rd_clk), + .rd_en(rd_en), + .rd_rst(\ ), + .rd_rst_busy(rd_rst_busy), + .rst(rst), + .s_aclk(\ ), + .s_aclk_en(\ ), + .s_aresetn(\ ), + .s_axi_araddr({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_arburst({\ ,\ }), + .s_axi_arcache({\ ,\ ,\ ,\ }), + .s_axi_arid(\ ), + .s_axi_arlen({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_arlock(\ ), + .s_axi_arprot({\ ,\ ,\ }), + .s_axi_arqos({\ ,\ ,\ ,\ }), + .s_axi_arregion({\ ,\ ,\ ,\ }), + .s_axi_arsize({\ ,\ ,\ }), + .s_axi_aruser(\ ), + .s_axi_arvalid(\ ), + .s_axi_awaddr({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_awburst({\ ,\ }), + .s_axi_awcache({\ ,\ ,\ ,\ }), + .s_axi_awid(\ ), + .s_axi_awlen({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_awlock(\ ), + .s_axi_awprot({\ ,\ ,\ }), + .s_axi_awqos({\ ,\ ,\ ,\ }), + .s_axi_awregion({\ ,\ ,\ ,\ }), + .s_axi_awsize({\ ,\ ,\ }), + .s_axi_awuser(\ ), + .s_axi_awvalid(\ ), + .s_axi_bready(\ ), + .s_axi_rready(\ ), + .s_axi_wdata({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_wid(\ ), + .s_axi_wlast(\ ), + .s_axi_wstrb({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_wuser(\ ), + .s_axi_wvalid(\ ), + .s_axis_tdata({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axis_tdest(\ ), + .s_axis_tid(\ ), + .s_axis_tkeep(\ ), + .s_axis_tlast(\ ), + .s_axis_tstrb(\ ), + .s_axis_tuser({\ ,\ ,\ ,\ }), + .s_axis_tvalid(\ ), + .sleep(\ ), + .srst(\ ), + .valid(valid), + .wr_clk(wr_clk), + .wr_en(wr_en), + .wr_rst(\ ), + .wr_rst_busy(wr_rst_busy)); +endmodule + +(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_gray" *) +(* REG_OUTPUT = "1" *) (* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) +(* VERSION = "0" *) (* WIDTH = "13" *) (* XPM_MODULE = "TRUE" *) +(* core_generation_info = "xpm_cdc_gray,xpm_cdc_gray,{DEST_SYNC_FF=2,INIT_SYNC_FF=0,REG_OUTPUT=1,SIM_ASSERT_CHK=0,SIM_LOSSLESS_GRAY_CHK=0,VERSION=0,WIDTH=13}" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) +(* xpm_cdc = "GRAY" *) +module ip8_xpm_cdc_gray + (src_clk, + src_in_bin, + dest_clk, + dest_out_bin); + input src_clk; + input [12:0]src_in_bin; + input dest_clk; + output [12:0]dest_out_bin; + + wire \ ; + wire \ ; + wire [12:0]async_path; + wire [11:0]binval; + wire dest_clk; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [12:0]\dest_graysync_ff[0] ; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [12:0]\dest_graysync_ff[1] ; + wire [12:0]dest_out_bin; + wire [11:0]gray_enc; + wire src_clk; + wire [12:0]src_in_bin; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][0] + (.C(dest_clk), + .CE(\ ), + .D(async_path[0]), + .Q(\dest_graysync_ff[0] [0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][10] + (.C(dest_clk), + .CE(\ ), + .D(async_path[10]), + .Q(\dest_graysync_ff[0] [10]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][11] + (.C(dest_clk), + .CE(\ ), + .D(async_path[11]), + .Q(\dest_graysync_ff[0] [11]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][12] + (.C(dest_clk), + .CE(\ ), + .D(async_path[12]), + .Q(\dest_graysync_ff[0] [12]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][1] + (.C(dest_clk), + .CE(\ ), + .D(async_path[1]), + .Q(\dest_graysync_ff[0] [1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][2] + (.C(dest_clk), + .CE(\ ), + .D(async_path[2]), + .Q(\dest_graysync_ff[0] [2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][3] + (.C(dest_clk), + .CE(\ ), + .D(async_path[3]), + .Q(\dest_graysync_ff[0] [3]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][4] + (.C(dest_clk), + .CE(\ ), + .D(async_path[4]), + .Q(\dest_graysync_ff[0] [4]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][5] + (.C(dest_clk), + .CE(\ ), + .D(async_path[5]), + .Q(\dest_graysync_ff[0] [5]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][6] + (.C(dest_clk), + .CE(\ ), + .D(async_path[6]), + .Q(\dest_graysync_ff[0] [6]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][7] + (.C(dest_clk), + .CE(\ ), + .D(async_path[7]), + .Q(\dest_graysync_ff[0] [7]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][8] + (.C(dest_clk), + .CE(\ ), + .D(async_path[8]), + .Q(\dest_graysync_ff[0] [8]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][9] + (.C(dest_clk), + .CE(\ ), + .D(async_path[9]), + .Q(\dest_graysync_ff[0] [9]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][0] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [0]), + .Q(\dest_graysync_ff[1] [0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][10] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [10]), + .Q(\dest_graysync_ff[1] [10]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][11] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [11]), + .Q(\dest_graysync_ff[1] [11]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][12] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [12]), + .Q(\dest_graysync_ff[1] [12]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][1] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [1]), + .Q(\dest_graysync_ff[1] [1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][2] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [2]), + .Q(\dest_graysync_ff[1] [2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][3] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [3]), + .Q(\dest_graysync_ff[1] [3]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][4] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [4]), + .Q(\dest_graysync_ff[1] [4]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][5] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [5]), + .Q(\dest_graysync_ff[1] [5]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][6] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [6]), + .Q(\dest_graysync_ff[1] [6]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][7] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [7]), + .Q(\dest_graysync_ff[1] [7]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][8] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [8]), + .Q(\dest_graysync_ff[1] [8]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][9] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [9]), + .Q(\dest_graysync_ff[1] [9]), + .R(\ )); + LUT3 #( + .INIT(8'h96)) + \dest_out_bin_ff[0]_i_1 + (.I0(\dest_graysync_ff[1] [0]), + .I1(binval[2]), + .I2(\dest_graysync_ff[1] [1]), + .O(binval[0])); + LUT3 #( + .INIT(8'h96)) + \dest_out_bin_ff[10]_i_1 + (.I0(\dest_graysync_ff[1] [10]), + .I1(\dest_graysync_ff[1] [12]), + .I2(\dest_graysync_ff[1] [11]), + .O(binval[10])); + LUT2 #( + .INIT(4'h6)) + \dest_out_bin_ff[11]_i_1 + (.I0(\dest_graysync_ff[1] [11]), + .I1(\dest_graysync_ff[1] [12]), + .O(binval[11])); + LUT2 #( + .INIT(4'h6)) + \dest_out_bin_ff[1]_i_1 + (.I0(\dest_graysync_ff[1] [1]), + .I1(binval[2]), + .O(binval[1])); + LUT6 #( + .INIT(64'h6996966996696996)) + \dest_out_bin_ff[2]_i_1 + (.I0(\dest_graysync_ff[1] [2]), + .I1(\dest_graysync_ff[1] [4]), + .I2(\dest_graysync_ff[1] [6]), + .I3(binval[7]), + .I4(\dest_graysync_ff[1] [5]), + .I5(\dest_graysync_ff[1] [3]), + .O(binval[2])); + LUT5 #( + .INIT(32'h96696996)) + \dest_out_bin_ff[3]_i_1 + (.I0(\dest_graysync_ff[1] [3]), + .I1(\dest_graysync_ff[1] [5]), + .I2(binval[7]), + .I3(\dest_graysync_ff[1] [6]), + .I4(\dest_graysync_ff[1] [4]), + .O(binval[3])); + LUT4 #( + .INIT(16'h6996)) + \dest_out_bin_ff[4]_i_1 + (.I0(\dest_graysync_ff[1] [4]), + .I1(\dest_graysync_ff[1] [6]), + .I2(binval[7]), + .I3(\dest_graysync_ff[1] [5]), + .O(binval[4])); + LUT3 #( + .INIT(8'h96)) + \dest_out_bin_ff[5]_i_1 + (.I0(\dest_graysync_ff[1] [5]), + .I1(binval[7]), + .I2(\dest_graysync_ff[1] [6]), + .O(binval[5])); + LUT2 #( + .INIT(4'h6)) + \dest_out_bin_ff[6]_i_1 + (.I0(\dest_graysync_ff[1] [6]), + .I1(binval[7]), + .O(binval[6])); + LUT6 #( + .INIT(64'h6996966996696996)) + \dest_out_bin_ff[7]_i_1 + (.I0(\dest_graysync_ff[1] [7]), + .I1(\dest_graysync_ff[1] [9]), + .I2(\dest_graysync_ff[1] [11]), + .I3(\dest_graysync_ff[1] [12]), + .I4(\dest_graysync_ff[1] [10]), + .I5(\dest_graysync_ff[1] [8]), + .O(binval[7])); + LUT5 #( + .INIT(32'h96696996)) + \dest_out_bin_ff[8]_i_1 + (.I0(\dest_graysync_ff[1] [8]), + .I1(\dest_graysync_ff[1] [10]), + .I2(\dest_graysync_ff[1] [12]), + .I3(\dest_graysync_ff[1] [11]), + .I4(\dest_graysync_ff[1] [9]), + .O(binval[8])); + LUT4 #( + .INIT(16'h6996)) + \dest_out_bin_ff[9]_i_1 + (.I0(\dest_graysync_ff[1] [9]), + .I1(\dest_graysync_ff[1] [11]), + .I2(\dest_graysync_ff[1] [12]), + .I3(\dest_graysync_ff[1] [10]), + .O(binval[9])); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(binval[0]), + .Q(dest_out_bin[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[10] + (.C(dest_clk), + .CE(\ ), + .D(binval[10]), + .Q(dest_out_bin[10]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[11] + (.C(dest_clk), + .CE(\ ), + .D(binval[11]), + .Q(dest_out_bin[11]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[12] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[1] [12]), + .Q(dest_out_bin[12]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(binval[1]), + .Q(dest_out_bin[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[2] + (.C(dest_clk), + .CE(\ ), + .D(binval[2]), + .Q(dest_out_bin[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[3] + (.C(dest_clk), + .CE(\ ), + .D(binval[3]), + .Q(dest_out_bin[3]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[4] + (.C(dest_clk), + .CE(\ ), + .D(binval[4]), + .Q(dest_out_bin[4]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[5] + (.C(dest_clk), + .CE(\ ), + .D(binval[5]), + .Q(dest_out_bin[5]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[6] + (.C(dest_clk), + .CE(\ ), + .D(binval[6]), + .Q(dest_out_bin[6]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[7] + (.C(dest_clk), + .CE(\ ), + .D(binval[7]), + .Q(dest_out_bin[7]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[8] + (.C(dest_clk), + .CE(\ ), + .D(binval[8]), + .Q(dest_out_bin[8]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[9] + (.C(dest_clk), + .CE(\ ), + .D(binval[9]), + .Q(dest_out_bin[9]), + .R(\ )); + (* SOFT_HLUTNM = "soft_lutpair6" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[0]_i_1 + (.I0(src_in_bin[1]), + .I1(src_in_bin[0]), + .O(gray_enc[0])); + (* SOFT_HLUTNM = "soft_lutpair11" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[10]_i_1 + (.I0(src_in_bin[11]), + .I1(src_in_bin[10]), + .O(gray_enc[10])); + (* SOFT_HLUTNM = "soft_lutpair11" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[11]_i_1 + (.I0(src_in_bin[12]), + .I1(src_in_bin[11]), + .O(gray_enc[11])); + (* SOFT_HLUTNM = "soft_lutpair6" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[1]_i_1 + (.I0(src_in_bin[2]), + .I1(src_in_bin[1]), + .O(gray_enc[1])); + (* SOFT_HLUTNM = "soft_lutpair7" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[2]_i_1 + (.I0(src_in_bin[3]), + .I1(src_in_bin[2]), + .O(gray_enc[2])); + (* SOFT_HLUTNM = "soft_lutpair7" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[3]_i_1 + (.I0(src_in_bin[4]), + .I1(src_in_bin[3]), + .O(gray_enc[3])); + (* SOFT_HLUTNM = "soft_lutpair8" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[4]_i_1 + (.I0(src_in_bin[5]), + .I1(src_in_bin[4]), + .O(gray_enc[4])); + (* SOFT_HLUTNM = "soft_lutpair8" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[5]_i_1 + (.I0(src_in_bin[6]), + .I1(src_in_bin[5]), + .O(gray_enc[5])); + (* SOFT_HLUTNM = "soft_lutpair9" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[6]_i_1 + (.I0(src_in_bin[7]), + .I1(src_in_bin[6]), + .O(gray_enc[6])); + (* SOFT_HLUTNM = "soft_lutpair9" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[7]_i_1 + (.I0(src_in_bin[8]), + .I1(src_in_bin[7]), + .O(gray_enc[7])); + (* SOFT_HLUTNM = "soft_lutpair10" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[8]_i_1 + (.I0(src_in_bin[9]), + .I1(src_in_bin[8]), + .O(gray_enc[8])); + (* SOFT_HLUTNM = "soft_lutpair10" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[9]_i_1 + (.I0(src_in_bin[10]), + .I1(src_in_bin[9]), + .O(gray_enc[9])); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[0] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[0]), + .Q(async_path[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[10] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[10]), + .Q(async_path[10]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[11] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[11]), + .Q(async_path[11]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[12] + (.C(src_clk), + .CE(\ ), + .D(src_in_bin[12]), + .Q(async_path[12]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[1] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[1]), + .Q(async_path[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[2] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[2]), + .Q(async_path[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[3] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[3]), + .Q(async_path[3]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[4] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[4]), + .Q(async_path[4]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[5] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[5]), + .Q(async_path[5]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[6] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[6]), + .Q(async_path[6]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[7] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[7]), + .Q(async_path[7]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[8] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[8]), + .Q(async_path[8]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[9] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[9]), + .Q(async_path[9]), + .R(\ )); +endmodule + +(* DEST_SYNC_FF = "2" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_gray" *) +(* REG_OUTPUT = "1" *) (* SIM_ASSERT_CHK = "0" *) (* SIM_LOSSLESS_GRAY_CHK = "0" *) +(* VERSION = "0" *) (* WIDTH = "13" *) (* XPM_MODULE = "TRUE" *) +(* core_generation_info = "xpm_cdc_gray,xpm_cdc_gray,{DEST_SYNC_FF=2,INIT_SYNC_FF=0,REG_OUTPUT=1,SIM_ASSERT_CHK=0,SIM_LOSSLESS_GRAY_CHK=0,VERSION=0,WIDTH=13}" *) (* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) +(* xpm_cdc = "GRAY" *) +module ip8_xpm_cdc_gray__2 + (src_clk, + src_in_bin, + dest_clk, + dest_out_bin); + input src_clk; + input [12:0]src_in_bin; + input dest_clk; + output [12:0]dest_out_bin; + + wire \ ; + wire \ ; + wire [12:0]async_path; + wire [11:0]binval; + wire dest_clk; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [12:0]\dest_graysync_ff[0] ; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "GRAY" *) wire [12:0]\dest_graysync_ff[1] ; + wire [12:0]dest_out_bin; + wire [11:0]gray_enc; + wire src_clk; + wire [12:0]src_in_bin; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][0] + (.C(dest_clk), + .CE(\ ), + .D(async_path[0]), + .Q(\dest_graysync_ff[0] [0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][10] + (.C(dest_clk), + .CE(\ ), + .D(async_path[10]), + .Q(\dest_graysync_ff[0] [10]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][11] + (.C(dest_clk), + .CE(\ ), + .D(async_path[11]), + .Q(\dest_graysync_ff[0] [11]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][12] + (.C(dest_clk), + .CE(\ ), + .D(async_path[12]), + .Q(\dest_graysync_ff[0] [12]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][1] + (.C(dest_clk), + .CE(\ ), + .D(async_path[1]), + .Q(\dest_graysync_ff[0] [1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][2] + (.C(dest_clk), + .CE(\ ), + .D(async_path[2]), + .Q(\dest_graysync_ff[0] [2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][3] + (.C(dest_clk), + .CE(\ ), + .D(async_path[3]), + .Q(\dest_graysync_ff[0] [3]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][4] + (.C(dest_clk), + .CE(\ ), + .D(async_path[4]), + .Q(\dest_graysync_ff[0] [4]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][5] + (.C(dest_clk), + .CE(\ ), + .D(async_path[5]), + .Q(\dest_graysync_ff[0] [5]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][6] + (.C(dest_clk), + .CE(\ ), + .D(async_path[6]), + .Q(\dest_graysync_ff[0] [6]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][7] + (.C(dest_clk), + .CE(\ ), + .D(async_path[7]), + .Q(\dest_graysync_ff[0] [7]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][8] + (.C(dest_clk), + .CE(\ ), + .D(async_path[8]), + .Q(\dest_graysync_ff[0] [8]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[0][9] + (.C(dest_clk), + .CE(\ ), + .D(async_path[9]), + .Q(\dest_graysync_ff[0] [9]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][0] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [0]), + .Q(\dest_graysync_ff[1] [0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][10] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [10]), + .Q(\dest_graysync_ff[1] [10]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][11] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [11]), + .Q(\dest_graysync_ff[1] [11]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][12] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [12]), + .Q(\dest_graysync_ff[1] [12]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][1] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [1]), + .Q(\dest_graysync_ff[1] [1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][2] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [2]), + .Q(\dest_graysync_ff[1] [2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][3] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [3]), + .Q(\dest_graysync_ff[1] [3]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][4] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [4]), + .Q(\dest_graysync_ff[1] [4]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][5] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [5]), + .Q(\dest_graysync_ff[1] [5]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][6] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [6]), + .Q(\dest_graysync_ff[1] [6]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][7] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [7]), + .Q(\dest_graysync_ff[1] [7]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][8] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [8]), + .Q(\dest_graysync_ff[1] [8]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "GRAY" *) + FDRE #( + .INIT(1'b0)) + \dest_graysync_ff_reg[1][9] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[0] [9]), + .Q(\dest_graysync_ff[1] [9]), + .R(\ )); + LUT3 #( + .INIT(8'h96)) + \dest_out_bin_ff[0]_i_1 + (.I0(\dest_graysync_ff[1] [0]), + .I1(binval[2]), + .I2(\dest_graysync_ff[1] [1]), + .O(binval[0])); + LUT3 #( + .INIT(8'h96)) + \dest_out_bin_ff[10]_i_1 + (.I0(\dest_graysync_ff[1] [10]), + .I1(\dest_graysync_ff[1] [12]), + .I2(\dest_graysync_ff[1] [11]), + .O(binval[10])); + LUT2 #( + .INIT(4'h6)) + \dest_out_bin_ff[11]_i_1 + (.I0(\dest_graysync_ff[1] [11]), + .I1(\dest_graysync_ff[1] [12]), + .O(binval[11])); + LUT2 #( + .INIT(4'h6)) + \dest_out_bin_ff[1]_i_1 + (.I0(\dest_graysync_ff[1] [1]), + .I1(binval[2]), + .O(binval[1])); + LUT6 #( + .INIT(64'h6996966996696996)) + \dest_out_bin_ff[2]_i_1 + (.I0(\dest_graysync_ff[1] [2]), + .I1(\dest_graysync_ff[1] [4]), + .I2(\dest_graysync_ff[1] [6]), + .I3(binval[7]), + .I4(\dest_graysync_ff[1] [5]), + .I5(\dest_graysync_ff[1] [3]), + .O(binval[2])); + LUT5 #( + .INIT(32'h96696996)) + \dest_out_bin_ff[3]_i_1 + (.I0(\dest_graysync_ff[1] [3]), + .I1(\dest_graysync_ff[1] [5]), + .I2(binval[7]), + .I3(\dest_graysync_ff[1] [6]), + .I4(\dest_graysync_ff[1] [4]), + .O(binval[3])); + LUT4 #( + .INIT(16'h6996)) + \dest_out_bin_ff[4]_i_1 + (.I0(\dest_graysync_ff[1] [4]), + .I1(\dest_graysync_ff[1] [6]), + .I2(binval[7]), + .I3(\dest_graysync_ff[1] [5]), + .O(binval[4])); + LUT3 #( + .INIT(8'h96)) + \dest_out_bin_ff[5]_i_1 + (.I0(\dest_graysync_ff[1] [5]), + .I1(binval[7]), + .I2(\dest_graysync_ff[1] [6]), + .O(binval[5])); + LUT2 #( + .INIT(4'h6)) + \dest_out_bin_ff[6]_i_1 + (.I0(\dest_graysync_ff[1] [6]), + .I1(binval[7]), + .O(binval[6])); + LUT6 #( + .INIT(64'h6996966996696996)) + \dest_out_bin_ff[7]_i_1 + (.I0(\dest_graysync_ff[1] [7]), + .I1(\dest_graysync_ff[1] [9]), + .I2(\dest_graysync_ff[1] [11]), + .I3(\dest_graysync_ff[1] [12]), + .I4(\dest_graysync_ff[1] [10]), + .I5(\dest_graysync_ff[1] [8]), + .O(binval[7])); + LUT5 #( + .INIT(32'h96696996)) + \dest_out_bin_ff[8]_i_1 + (.I0(\dest_graysync_ff[1] [8]), + .I1(\dest_graysync_ff[1] [10]), + .I2(\dest_graysync_ff[1] [12]), + .I3(\dest_graysync_ff[1] [11]), + .I4(\dest_graysync_ff[1] [9]), + .O(binval[8])); + LUT4 #( + .INIT(16'h6996)) + \dest_out_bin_ff[9]_i_1 + (.I0(\dest_graysync_ff[1] [9]), + .I1(\dest_graysync_ff[1] [11]), + .I2(\dest_graysync_ff[1] [12]), + .I3(\dest_graysync_ff[1] [10]), + .O(binval[9])); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(binval[0]), + .Q(dest_out_bin[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[10] + (.C(dest_clk), + .CE(\ ), + .D(binval[10]), + .Q(dest_out_bin[10]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[11] + (.C(dest_clk), + .CE(\ ), + .D(binval[11]), + .Q(dest_out_bin[11]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[12] + (.C(dest_clk), + .CE(\ ), + .D(\dest_graysync_ff[1] [12]), + .Q(dest_out_bin[12]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(binval[1]), + .Q(dest_out_bin[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[2] + (.C(dest_clk), + .CE(\ ), + .D(binval[2]), + .Q(dest_out_bin[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[3] + (.C(dest_clk), + .CE(\ ), + .D(binval[3]), + .Q(dest_out_bin[3]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[4] + (.C(dest_clk), + .CE(\ ), + .D(binval[4]), + .Q(dest_out_bin[4]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[5] + (.C(dest_clk), + .CE(\ ), + .D(binval[5]), + .Q(dest_out_bin[5]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[6] + (.C(dest_clk), + .CE(\ ), + .D(binval[6]), + .Q(dest_out_bin[6]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[7] + (.C(dest_clk), + .CE(\ ), + .D(binval[7]), + .Q(dest_out_bin[7]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[8] + (.C(dest_clk), + .CE(\ ), + .D(binval[8]), + .Q(dest_out_bin[8]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \dest_out_bin_ff_reg[9] + (.C(dest_clk), + .CE(\ ), + .D(binval[9]), + .Q(dest_out_bin[9]), + .R(\ )); + (* SOFT_HLUTNM = "soft_lutpair0" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[0]_i_1 + (.I0(src_in_bin[1]), + .I1(src_in_bin[0]), + .O(gray_enc[0])); + (* SOFT_HLUTNM = "soft_lutpair5" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[10]_i_1 + (.I0(src_in_bin[11]), + .I1(src_in_bin[10]), + .O(gray_enc[10])); + (* SOFT_HLUTNM = "soft_lutpair5" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[11]_i_1 + (.I0(src_in_bin[12]), + .I1(src_in_bin[11]), + .O(gray_enc[11])); + (* SOFT_HLUTNM = "soft_lutpair0" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[1]_i_1 + (.I0(src_in_bin[2]), + .I1(src_in_bin[1]), + .O(gray_enc[1])); + (* SOFT_HLUTNM = "soft_lutpair1" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[2]_i_1 + (.I0(src_in_bin[3]), + .I1(src_in_bin[2]), + .O(gray_enc[2])); + (* SOFT_HLUTNM = "soft_lutpair1" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[3]_i_1 + (.I0(src_in_bin[4]), + .I1(src_in_bin[3]), + .O(gray_enc[3])); + (* SOFT_HLUTNM = "soft_lutpair2" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[4]_i_1 + (.I0(src_in_bin[5]), + .I1(src_in_bin[4]), + .O(gray_enc[4])); + (* SOFT_HLUTNM = "soft_lutpair2" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[5]_i_1 + (.I0(src_in_bin[6]), + .I1(src_in_bin[5]), + .O(gray_enc[5])); + (* SOFT_HLUTNM = "soft_lutpair3" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[6]_i_1 + (.I0(src_in_bin[7]), + .I1(src_in_bin[6]), + .O(gray_enc[6])); + (* SOFT_HLUTNM = "soft_lutpair3" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[7]_i_1 + (.I0(src_in_bin[8]), + .I1(src_in_bin[7]), + .O(gray_enc[7])); + (* SOFT_HLUTNM = "soft_lutpair4" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[8]_i_1 + (.I0(src_in_bin[9]), + .I1(src_in_bin[8]), + .O(gray_enc[8])); + (* SOFT_HLUTNM = "soft_lutpair4" *) + LUT2 #( + .INIT(4'h6)) + \src_gray_ff[9]_i_1 + (.I0(src_in_bin[10]), + .I1(src_in_bin[9]), + .O(gray_enc[9])); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[0] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[0]), + .Q(async_path[0]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[10] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[10]), + .Q(async_path[10]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[11] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[11]), + .Q(async_path[11]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[12] + (.C(src_clk), + .CE(\ ), + .D(src_in_bin[12]), + .Q(async_path[12]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[1] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[1]), + .Q(async_path[1]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[2] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[2]), + .Q(async_path[2]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[3] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[3]), + .Q(async_path[3]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[4] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[4]), + .Q(async_path[4]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[5] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[5]), + .Q(async_path[5]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[6] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[6]), + .Q(async_path[6]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[7] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[7]), + .Q(async_path[7]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[8] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[8]), + .Q(async_path[8]), + .R(\ )); + FDRE #( + .INIT(1'b0)) + \src_gray_ff_reg[9] + (.C(src_clk), + .CE(\ ), + .D(gray_enc[9]), + .Q(async_path[9]), + .R(\ )); +endmodule + +(* DEST_SYNC_FF = "5" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) +(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) +(* XPM_MODULE = "TRUE" *) (* core_generation_info = "xpm_cdc_single,xpm_cdc_single,{DEST_SYNC_FF=5,INIT_SYNC_FF=0,SIM_ASSERT_CHK=0,SRC_INPUT_REG=0,VERSION=0}" *) (* is_du_within_envelope = "true" *) +(* keep_hierarchy = "true" *) (* xpm_cdc = "SINGLE" *) +module ip8_xpm_cdc_single + (src_clk, + src_in, + dest_clk, + .dest_out(syncstages_ff[4])); + input src_clk; + input src_in; + input dest_clk; + output [4:0]syncstages_ff; + + wire \ ; + wire \ ; + wire dest_clk; + wire src_in; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [4:0]syncstages_ff; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(src_in), + .Q(syncstages_ff[0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[0]), + .Q(syncstages_ff[1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[2] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[1]), + .Q(syncstages_ff[2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[3] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[2]), + .Q(syncstages_ff[3]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[4] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[3]), + .Q(syncstages_ff[4]), + .R(\ )); +endmodule + +(* DEST_SYNC_FF = "5" *) (* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_single" *) +(* SIM_ASSERT_CHK = "0" *) (* SRC_INPUT_REG = "0" *) (* VERSION = "0" *) +(* XPM_MODULE = "TRUE" *) (* core_generation_info = "xpm_cdc_single,xpm_cdc_single,{DEST_SYNC_FF=5,INIT_SYNC_FF=0,SIM_ASSERT_CHK=0,SRC_INPUT_REG=0,VERSION=0}" *) (* is_du_within_envelope = "true" *) +(* keep_hierarchy = "true" *) (* xpm_cdc = "SINGLE" *) +module ip8_xpm_cdc_single__2 + (src_clk, + src_in, + dest_clk, + .dest_out(syncstages_ff[4])); + input src_clk; + input src_in; + input dest_clk; + output [4:0]syncstages_ff; + + wire \ ; + wire \ ; + wire dest_clk; + wire src_in; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SINGLE" *) wire [4:0]syncstages_ff; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(src_in), + .Q(syncstages_ff[0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[0]), + .Q(syncstages_ff[1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[2] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[1]), + .Q(syncstages_ff[2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[3] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[2]), + .Q(syncstages_ff[3]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SINGLE" *) + FDRE #( + .INIT(1'b0)) + \syncstages_ff_reg[4] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[3]), + .Q(syncstages_ff[4]), + .R(\ )); +endmodule + +(* DEF_VAL = "1'b1" *) (* DEST_SYNC_FF = "5" *) (* INIT = "1" *) +(* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_sync_rst" *) (* SIM_ASSERT_CHK = "0" *) +(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* core_generation_info = "xpm_cdc_sync_rst,xpm_cdc_sync_rst,{DEST_SYNC_FF=5,INIT=1,INIT_SYNC_FF=0,SIM_ASSERT_CHK=0,VERSION=0,DEF_VAL=1'b1}" *) +(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "SYNC_RST" *) +module ip8_xpm_cdc_sync_rst + (src_rst, + dest_clk, + .dest_rst(syncstages_ff[4])); + input src_rst; + input dest_clk; + output [4:0]syncstages_ff; + + wire \ ; + wire \ ; + wire dest_clk; + wire src_rst; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SYNC_RST" *) wire [4:0]syncstages_ff; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SYNC_RST" *) + FDRE #( + .INIT(1'b1)) + \syncstages_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(src_rst), + .Q(syncstages_ff[0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SYNC_RST" *) + FDRE #( + .INIT(1'b1)) + \syncstages_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[0]), + .Q(syncstages_ff[1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SYNC_RST" *) + FDRE #( + .INIT(1'b1)) + \syncstages_ff_reg[2] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[1]), + .Q(syncstages_ff[2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SYNC_RST" *) + FDRE #( + .INIT(1'b1)) + \syncstages_ff_reg[3] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[2]), + .Q(syncstages_ff[3]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SYNC_RST" *) + FDRE #( + .INIT(1'b1)) + \syncstages_ff_reg[4] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[3]), + .Q(syncstages_ff[4]), + .R(\ )); +endmodule + +(* DEF_VAL = "1'b1" *) (* DEST_SYNC_FF = "5" *) (* INIT = "1" *) +(* INIT_SYNC_FF = "0" *) (* ORIG_REF_NAME = "xpm_cdc_sync_rst" *) (* SIM_ASSERT_CHK = "0" *) +(* VERSION = "0" *) (* XPM_MODULE = "TRUE" *) (* core_generation_info = "xpm_cdc_sync_rst,xpm_cdc_sync_rst,{DEST_SYNC_FF=5,INIT=1,INIT_SYNC_FF=0,SIM_ASSERT_CHK=0,VERSION=0,DEF_VAL=1'b1}" *) +(* is_du_within_envelope = "true" *) (* keep_hierarchy = "true" *) (* xpm_cdc = "SYNC_RST" *) +module ip8_xpm_cdc_sync_rst__2 + (src_rst, + dest_clk, + .dest_rst(syncstages_ff[4])); + input src_rst; + input dest_clk; + output [4:0]syncstages_ff; + + wire \ ; + wire \ ; + wire dest_clk; + wire src_rst; + (* RTL_KEEP = "true" *) (* async_reg = "true" *) (* xpm_cdc = "SYNC_RST" *) wire [4:0]syncstages_ff; + + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SYNC_RST" *) + FDRE #( + .INIT(1'b1)) + \syncstages_ff_reg[0] + (.C(dest_clk), + .CE(\ ), + .D(src_rst), + .Q(syncstages_ff[0]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SYNC_RST" *) + FDRE #( + .INIT(1'b1)) + \syncstages_ff_reg[1] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[0]), + .Q(syncstages_ff[1]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SYNC_RST" *) + FDRE #( + .INIT(1'b1)) + \syncstages_ff_reg[2] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[1]), + .Q(syncstages_ff[2]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SYNC_RST" *) + FDRE #( + .INIT(1'b1)) + \syncstages_ff_reg[3] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[2]), + .Q(syncstages_ff[3]), + .R(\ )); + (* ASYNC_REG *) + (* KEEP = "true" *) + (* XPM_CDC = "SYNC_RST" *) + FDRE #( + .INIT(1'b1)) + \syncstages_ff_reg[4] + (.C(dest_clk), + .CE(\ ), + .D(syncstages_ff[3]), + .Q(syncstages_ff[4]), + .R(\ )); +endmodule + +(* CHECK_LICENSE_TYPE = "ip9,fifo_generator_v13_2_9,{}" *) (* core_generation_info = "ip9,fifo_generator_v13_2_9,{x_ipProduct=Vivado 2023.2,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=fifo_generator,x_ipVersion=13.2,x_ipCoreRevision=9,x_ipLanguage=VERILOG,x_ipSimLanguage=MIXED,C_COMMON_CLOCK=1,C_SELECT_XPM=0,C_COUNT_TYPE=0,C_DATA_COUNT_WIDTH=9,C_DEFAULT_VALUE=BlankString,C_DIN_WIDTH=272,C_DOUT_RST_VAL=0,C_DOUT_WIDTH=68,C_ENABLE_RLOCS=0,C_FAMILY=artix7,C_FULL_FLAGS_RST_VAL=0,C_HAS_ALMOST_EMPTY=0,C_HAS_ALMOST_FULL=1,C_HAS_BACKUP=0,C_HAS_DATA_COUNT=0,C_HAS_INT_CLK=0,C_HAS_MEMINIT_FILE=0,C_HAS_OVERFLOW=0,C_HAS_RD_DATA_COUNT=0,C_HAS_RD_RST=0,C_HAS_RST=0,C_HAS_SRST=1,C_HAS_UNDERFLOW=0,C_HAS_VALID=1,C_HAS_WR_ACK=0,C_HAS_WR_DATA_COUNT=0,C_HAS_WR_RST=0,C_IMPLEMENTATION_TYPE=0,C_INIT_WR_PNTR_VAL=0,C_MEMORY_TYPE=1,C_MIF_FILE_NAME=BlankString,C_OPTIMIZATION_MODE=0,C_OVERFLOW_LOW=0,C_PRELOAD_LATENCY=2,C_PRELOAD_REGS=1,C_PRIM_FIFO_TYPE=512x72,C_PROG_EMPTY_THRESH_ASSERT_VAL=2,C_PROG_EMPTY_THRESH_NEGATE_VAL=3,C_PROG_EMPTY_TYPE=0,C_PROG_FULL_THRESH_ASSERT_VAL=509,C_PROG_FULL_THRESH_NEGATE_VAL=508,C_PROG_FULL_TYPE=0,C_RD_DATA_COUNT_WIDTH=12,C_RD_DEPTH=2048,C_RD_FREQ=1,C_RD_PNTR_WIDTH=11,C_UNDERFLOW_LOW=0,C_USE_DOUT_RST=1,C_USE_ECC=0,C_USE_EMBEDDED_REG=2,C_USE_PIPELINE_REG=0,C_POWER_SAVING_MODE=0,C_USE_FIFO16_FLAGS=0,C_USE_FWFT_DATA_COUNT=1,C_VALID_LOW=0,C_WR_ACK_LOW=0,C_WR_DATA_COUNT_WIDTH=10,C_WR_DEPTH=512,C_WR_FREQ=1,C_WR_PNTR_WIDTH=9,C_WR_RESPONSE_LATENCY=1,C_MSGON_VAL=1,C_ENABLE_RST_SYNC=1,C_EN_SAFETY_CKT=0,C_ERROR_INJECTION_TYPE=0,C_SYNCHRONIZER_STAGE=2,C_INTERFACE_TYPE=0,C_AXI_TYPE=1,C_HAS_AXI_WR_CHANNEL=1,C_HAS_AXI_RD_CHANNEL=1,C_HAS_SLAVE_CE=0,C_HAS_MASTER_CE=0,C_ADD_NGC_CONSTRAINT=0,C_USE_COMMON_OVERFLOW=0,C_USE_COMMON_UNDERFLOW=0,C_USE_DEFAULT_SETTINGS=0,C_AXI_ID_WIDTH=1,C_AXI_ADDR_WIDTH=32,C_AXI_DATA_WIDTH=64,C_AXI_LEN_WIDTH=8,C_AXI_LOCK_WIDTH=1,C_HAS_AXI_ID=0,C_HAS_AXI_AWUSER=0,C_HAS_AXI_WUSER=0,C_HAS_AXI_BUSER=0,C_HAS_AXI_ARUSER=0,C_HAS_AXI_RUSER=0,C_AXI_ARUSER_WIDTH=1,C_AXI_AWUSER_WIDTH=1,C_AXI_WUSER_WIDTH=1,C_AXI_BUSER_WIDTH=1,C_AXI_RUSER_WIDTH=1,C_HAS_AXIS_TDATA=1,C_HAS_AXIS_TID=0,C_HAS_AXIS_TDEST=0,C_HAS_AXIS_TUSER=1,C_HAS_AXIS_TREADY=1,C_HAS_AXIS_TLAST=0,C_HAS_AXIS_TSTRB=0,C_HAS_AXIS_TKEEP=0,C_AXIS_TDATA_WIDTH=8,C_AXIS_TID_WIDTH=1,C_AXIS_TDEST_WIDTH=1,C_AXIS_TUSER_WIDTH=4,C_AXIS_TSTRB_WIDTH=1,C_AXIS_TKEEP_WIDTH=1,C_WACH_TYPE=0,C_WDCH_TYPE=0,C_WRCH_TYPE=0,C_RACH_TYPE=0,C_RDCH_TYPE=0,C_AXIS_TYPE=0,C_IMPLEMENTATION_TYPE_WACH=1,C_IMPLEMENTATION_TYPE_WDCH=1,C_IMPLEMENTATION_TYPE_WRCH=1,C_IMPLEMENTATION_TYPE_RACH=1,C_IMPLEMENTATION_TYPE_RDCH=1,C_IMPLEMENTATION_TYPE_AXIS=1,C_APPLICATION_TYPE_WACH=0,C_APPLICATION_TYPE_WDCH=0,C_APPLICATION_TYPE_WRCH=0,C_APPLICATION_TYPE_RACH=0,C_APPLICATION_TYPE_RDCH=0,C_APPLICATION_TYPE_AXIS=0,C_PRIM_FIFO_TYPE_WACH=512x36,C_PRIM_FIFO_TYPE_WDCH=1kx36,C_PRIM_FIFO_TYPE_WRCH=512x36,C_PRIM_FIFO_TYPE_RACH=512x36,C_PRIM_FIFO_TYPE_RDCH=1kx36,C_PRIM_FIFO_TYPE_AXIS=1kx18,C_USE_ECC_WACH=0,C_USE_ECC_WDCH=0,C_USE_ECC_WRCH=0,C_USE_ECC_RACH=0,C_USE_ECC_RDCH=0,C_USE_ECC_AXIS=0,C_ERROR_INJECTION_TYPE_WACH=0,C_ERROR_INJECTION_TYPE_WDCH=0,C_ERROR_INJECTION_TYPE_WRCH=0,C_ERROR_INJECTION_TYPE_RACH=0,C_ERROR_INJECTION_TYPE_RDCH=0,C_ERROR_INJECTION_TYPE_AXIS=0,C_DIN_WIDTH_WACH=1,C_DIN_WIDTH_WDCH=64,C_DIN_WIDTH_WRCH=2,C_DIN_WIDTH_RACH=32,C_DIN_WIDTH_RDCH=64,C_DIN_WIDTH_AXIS=1,C_WR_DEPTH_WACH=16,C_WR_DEPTH_WDCH=1024,C_WR_DEPTH_WRCH=16,C_WR_DEPTH_RACH=16,C_WR_DEPTH_RDCH=1024,C_WR_DEPTH_AXIS=1024,C_WR_PNTR_WIDTH_WACH=4,C_WR_PNTR_WIDTH_WDCH=10,C_WR_PNTR_WIDTH_WRCH=4,C_WR_PNTR_WIDTH_RACH=4,C_WR_PNTR_WIDTH_RDCH=10,C_WR_PNTR_WIDTH_AXIS=10,C_HAS_DATA_COUNTS_WACH=0,C_HAS_DATA_COUNTS_WDCH=0,C_HAS_DATA_COUNTS_WRCH=0,C_HAS_DATA_COUNTS_RACH=0,C_HAS_DATA_COUNTS_RDCH=0,C_HAS_DATA_COUNTS_AXIS=0,C_HAS_PROG_FLAGS_WACH=0,C_HAS_PROG_FLAGS_WDCH=0,C_HAS_PROG_FLAGS_WRCH=0,C_HAS_PROG_FLAGS_RACH=0,C_HAS_PROG_FLAGS_RDCH=0,C_HAS_PROG_FLAGS_AXIS=0,C_PROG_FULL_TYPE_WACH=0,C_PROG_FULL_TYPE_WDCH=0,C_PROG_FULL_TYPE_WRCH=0,C_PROG_FULL_TYPE_RACH=0,C_PROG_FULL_TYPE_RDCH=0,C_PROG_FULL_TYPE_AXIS=0,C_PROG_FULL_THRESH_ASSERT_VAL_WACH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_WDCH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_WRCH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_RACH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_RDCH=1023,C_PROG_FULL_THRESH_ASSERT_VAL_AXIS=1023,C_PROG_EMPTY_TYPE_WACH=0,C_PROG_EMPTY_TYPE_WDCH=0,C_PROG_EMPTY_TYPE_WRCH=0,C_PROG_EMPTY_TYPE_RACH=0,C_PROG_EMPTY_TYPE_RDCH=0,C_PROG_EMPTY_TYPE_AXIS=0,C_PROG_EMPTY_THRESH_ASSERT_VAL_WACH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_WDCH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_WRCH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_RACH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_RDCH=1022,C_PROG_EMPTY_THRESH_ASSERT_VAL_AXIS=1022,C_REG_SLICE_MODE_WACH=0,C_REG_SLICE_MODE_WDCH=0,C_REG_SLICE_MODE_WRCH=0,C_REG_SLICE_MODE_RACH=0,C_REG_SLICE_MODE_RDCH=0,C_REG_SLICE_MODE_AXIS=0}" *) (* downgradeipidentifiedwarnings = "yes" *) +(* x_core_info = "fifo_generator_v13_2_9,Vivado 2023.2" *) +module ip9 + (clk, + srst, + din, + wr_en, + rd_en, + dout, + full, + almost_full, + empty, + valid); + (* x_interface_info = "xilinx.com:signal:clock:1.0 core_clk CLK" *) (* x_interface_parameter = "XIL_INTERFACENAME core_clk, FREQ_HZ 100000000, FREQ_TOLERANCE_HZ 0, PHASE 0.0, INSERT_VIP 0" *) input clk; + input srst; + (* x_interface_info = "xilinx.com:interface:fifo_write:1.0 FIFO_WRITE WR_DATA" *) input [271:0]din; + (* x_interface_info = "xilinx.com:interface:fifo_write:1.0 FIFO_WRITE WR_EN" *) input wr_en; + (* x_interface_info = "xilinx.com:interface:fifo_read:1.0 FIFO_READ RD_EN" *) input rd_en; + (* x_interface_info = "xilinx.com:interface:fifo_read:1.0 FIFO_READ RD_DATA" *) output [67:0]dout; + (* x_interface_info = "xilinx.com:interface:fifo_write:1.0 FIFO_WRITE FULL" *) output full; + (* x_interface_info = "xilinx.com:interface:fifo_write:1.0 FIFO_WRITE ALMOST_FULL" *) output almost_full; + (* x_interface_info = "xilinx.com:interface:fifo_read:1.0 FIFO_READ EMPTY" *) output empty; + output valid; + + wire \ ; + wire almost_full; + wire clk; + wire [271:0]din; + wire [67:0]dout; + wire empty; + wire full; + wire rd_en; + wire srst; + wire valid; + wire wr_en; + + GND GND + (.G(\ )); + (* C_ADD_NGC_CONSTRAINT = "0" *) + (* C_APPLICATION_TYPE_AXIS = "0" *) + (* C_APPLICATION_TYPE_RACH = "0" *) + (* C_APPLICATION_TYPE_RDCH = "0" *) + (* C_APPLICATION_TYPE_WACH = "0" *) + (* C_APPLICATION_TYPE_WDCH = "0" *) + (* C_APPLICATION_TYPE_WRCH = "0" *) + (* C_AXIS_TDATA_WIDTH = "8" *) + (* C_AXIS_TDEST_WIDTH = "1" *) + (* C_AXIS_TID_WIDTH = "1" *) + (* C_AXIS_TKEEP_WIDTH = "1" *) + (* C_AXIS_TSTRB_WIDTH = "1" *) + (* C_AXIS_TUSER_WIDTH = "4" *) + (* C_AXIS_TYPE = "0" *) + (* C_AXI_ADDR_WIDTH = "32" *) + (* C_AXI_ARUSER_WIDTH = "1" *) + (* C_AXI_AWUSER_WIDTH = "1" *) + (* C_AXI_BUSER_WIDTH = "1" *) + (* C_AXI_DATA_WIDTH = "64" *) + (* C_AXI_ID_WIDTH = "1" *) + (* C_AXI_LEN_WIDTH = "8" *) + (* C_AXI_LOCK_WIDTH = "1" *) + (* C_AXI_RUSER_WIDTH = "1" *) + (* C_AXI_TYPE = "1" *) + (* C_AXI_WUSER_WIDTH = "1" *) + (* C_COMMON_CLOCK = "1" *) + (* C_COUNT_TYPE = "0" *) + (* C_DATA_COUNT_WIDTH = "9" *) + (* C_DEFAULT_VALUE = "BlankString" *) + (* C_DIN_WIDTH = "272" *) + (* C_DIN_WIDTH_AXIS = "1" *) + (* C_DIN_WIDTH_RACH = "32" *) + (* C_DIN_WIDTH_RDCH = "64" *) + (* C_DIN_WIDTH_WACH = "1" *) + (* C_DIN_WIDTH_WDCH = "64" *) + (* C_DIN_WIDTH_WRCH = "2" *) + (* C_DOUT_RST_VAL = "0" *) + (* C_DOUT_WIDTH = "68" *) + (* C_ENABLE_RLOCS = "0" *) + (* C_ENABLE_RST_SYNC = "1" *) + (* C_EN_SAFETY_CKT = "0" *) + (* C_ERROR_INJECTION_TYPE = "0" *) + (* C_ERROR_INJECTION_TYPE_AXIS = "0" *) + (* C_ERROR_INJECTION_TYPE_RACH = "0" *) + (* C_ERROR_INJECTION_TYPE_RDCH = "0" *) + (* C_ERROR_INJECTION_TYPE_WACH = "0" *) + (* C_ERROR_INJECTION_TYPE_WDCH = "0" *) + (* C_ERROR_INJECTION_TYPE_WRCH = "0" *) + (* C_FAMILY = "artix7" *) + (* C_FULL_FLAGS_RST_VAL = "0" *) + (* C_HAS_ALMOST_EMPTY = "0" *) + (* C_HAS_ALMOST_FULL = "1" *) + (* C_HAS_AXIS_TDATA = "1" *) + (* C_HAS_AXIS_TDEST = "0" *) + (* C_HAS_AXIS_TID = "0" *) + (* C_HAS_AXIS_TKEEP = "0" *) + (* C_HAS_AXIS_TLAST = "0" *) + (* C_HAS_AXIS_TREADY = "1" *) + (* C_HAS_AXIS_TSTRB = "0" *) + (* C_HAS_AXIS_TUSER = "1" *) + (* C_HAS_AXI_ARUSER = "0" *) + (* C_HAS_AXI_AWUSER = "0" *) + (* C_HAS_AXI_BUSER = "0" *) + (* C_HAS_AXI_ID = "0" *) + (* C_HAS_AXI_RD_CHANNEL = "1" *) + (* C_HAS_AXI_RUSER = "0" *) + (* C_HAS_AXI_WR_CHANNEL = "1" *) + (* C_HAS_AXI_WUSER = "0" *) + (* C_HAS_BACKUP = "0" *) + (* C_HAS_DATA_COUNT = "0" *) + (* C_HAS_DATA_COUNTS_AXIS = "0" *) + (* C_HAS_DATA_COUNTS_RACH = "0" *) + (* C_HAS_DATA_COUNTS_RDCH = "0" *) + (* C_HAS_DATA_COUNTS_WACH = "0" *) + (* C_HAS_DATA_COUNTS_WDCH = "0" *) + (* C_HAS_DATA_COUNTS_WRCH = "0" *) + (* C_HAS_INT_CLK = "0" *) + (* C_HAS_MASTER_CE = "0" *) + (* C_HAS_MEMINIT_FILE = "0" *) + (* C_HAS_OVERFLOW = "0" *) + (* C_HAS_PROG_FLAGS_AXIS = "0" *) + (* C_HAS_PROG_FLAGS_RACH = "0" *) + (* C_HAS_PROG_FLAGS_RDCH = "0" *) + (* C_HAS_PROG_FLAGS_WACH = "0" *) + (* C_HAS_PROG_FLAGS_WDCH = "0" *) + (* C_HAS_PROG_FLAGS_WRCH = "0" *) + (* C_HAS_RD_DATA_COUNT = "0" *) + (* C_HAS_RD_RST = "0" *) + (* C_HAS_RST = "0" *) + (* C_HAS_SLAVE_CE = "0" *) + (* C_HAS_SRST = "1" *) + (* C_HAS_UNDERFLOW = "0" *) + (* C_HAS_VALID = "1" *) + (* C_HAS_WR_ACK = "0" *) + (* C_HAS_WR_DATA_COUNT = "0" *) + (* C_HAS_WR_RST = "0" *) + (* C_IMPLEMENTATION_TYPE = "0" *) + (* C_IMPLEMENTATION_TYPE_AXIS = "1" *) + (* C_IMPLEMENTATION_TYPE_RACH = "1" *) + (* C_IMPLEMENTATION_TYPE_RDCH = "1" *) + (* C_IMPLEMENTATION_TYPE_WACH = "1" *) + (* C_IMPLEMENTATION_TYPE_WDCH = "1" *) + (* C_IMPLEMENTATION_TYPE_WRCH = "1" *) + (* C_INIT_WR_PNTR_VAL = "0" *) + (* C_INTERFACE_TYPE = "0" *) + (* C_MEMORY_TYPE = "1" *) + (* C_MIF_FILE_NAME = "BlankString" *) + (* C_MSGON_VAL = "1" *) + (* C_OPTIMIZATION_MODE = "0" *) + (* C_OVERFLOW_LOW = "0" *) + (* C_POWER_SAVING_MODE = "0" *) + (* C_PRELOAD_LATENCY = "2" *) + (* C_PRELOAD_REGS = "1" *) + (* C_PRIM_FIFO_TYPE = "512x72" *) + (* C_PRIM_FIFO_TYPE_AXIS = "1kx18" *) + (* C_PRIM_FIFO_TYPE_RACH = "512x36" *) + (* C_PRIM_FIFO_TYPE_RDCH = "1kx36" *) + (* C_PRIM_FIFO_TYPE_WACH = "512x36" *) + (* C_PRIM_FIFO_TYPE_WDCH = "1kx36" *) + (* C_PRIM_FIFO_TYPE_WRCH = "512x36" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL = "2" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_AXIS = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_RACH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_RDCH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_WACH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_WDCH = "1022" *) + (* C_PROG_EMPTY_THRESH_ASSERT_VAL_WRCH = "1022" *) + (* C_PROG_EMPTY_THRESH_NEGATE_VAL = "3" *) + (* C_PROG_EMPTY_TYPE = "0" *) + (* C_PROG_EMPTY_TYPE_AXIS = "0" *) + (* C_PROG_EMPTY_TYPE_RACH = "0" *) + (* C_PROG_EMPTY_TYPE_RDCH = "0" *) + (* C_PROG_EMPTY_TYPE_WACH = "0" *) + (* C_PROG_EMPTY_TYPE_WDCH = "0" *) + (* C_PROG_EMPTY_TYPE_WRCH = "0" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL = "509" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_AXIS = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_RACH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_RDCH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_WACH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_WDCH = "1023" *) + (* C_PROG_FULL_THRESH_ASSERT_VAL_WRCH = "1023" *) + (* C_PROG_FULL_THRESH_NEGATE_VAL = "508" *) + (* C_PROG_FULL_TYPE = "0" *) + (* C_PROG_FULL_TYPE_AXIS = "0" *) + (* C_PROG_FULL_TYPE_RACH = "0" *) + (* C_PROG_FULL_TYPE_RDCH = "0" *) + (* C_PROG_FULL_TYPE_WACH = "0" *) + (* C_PROG_FULL_TYPE_WDCH = "0" *) + (* C_PROG_FULL_TYPE_WRCH = "0" *) + (* C_RACH_TYPE = "0" *) + (* C_RDCH_TYPE = "0" *) + (* C_RD_DATA_COUNT_WIDTH = "12" *) + (* C_RD_DEPTH = "2048" *) + (* C_RD_FREQ = "1" *) + (* C_RD_PNTR_WIDTH = "11" *) + (* C_REG_SLICE_MODE_AXIS = "0" *) + (* C_REG_SLICE_MODE_RACH = "0" *) + (* C_REG_SLICE_MODE_RDCH = "0" *) + (* C_REG_SLICE_MODE_WACH = "0" *) + (* C_REG_SLICE_MODE_WDCH = "0" *) + (* C_REG_SLICE_MODE_WRCH = "0" *) + (* C_SELECT_XPM = "0" *) + (* C_SYNCHRONIZER_STAGE = "2" *) + (* C_UNDERFLOW_LOW = "0" *) + (* C_USE_COMMON_OVERFLOW = "0" *) + (* C_USE_COMMON_UNDERFLOW = "0" *) + (* C_USE_DEFAULT_SETTINGS = "0" *) + (* C_USE_DOUT_RST = "1" *) + (* C_USE_ECC = "0" *) + (* C_USE_ECC_AXIS = "0" *) + (* C_USE_ECC_RACH = "0" *) + (* C_USE_ECC_RDCH = "0" *) + (* C_USE_ECC_WACH = "0" *) + (* C_USE_ECC_WDCH = "0" *) + (* C_USE_ECC_WRCH = "0" *) + (* C_USE_EMBEDDED_REG = "2" *) + (* C_USE_FIFO16_FLAGS = "0" *) + (* C_USE_FWFT_DATA_COUNT = "1" *) + (* C_USE_PIPELINE_REG = "0" *) + (* C_VALID_LOW = "0" *) + (* C_WACH_TYPE = "0" *) + (* C_WDCH_TYPE = "0" *) + (* C_WRCH_TYPE = "0" *) + (* C_WR_ACK_LOW = "0" *) + (* C_WR_DATA_COUNT_WIDTH = "10" *) + (* C_WR_DEPTH = "512" *) + (* C_WR_DEPTH_AXIS = "1024" *) + (* C_WR_DEPTH_RACH = "16" *) + (* C_WR_DEPTH_RDCH = "1024" *) + (* C_WR_DEPTH_WACH = "16" *) + (* C_WR_DEPTH_WDCH = "1024" *) + (* C_WR_DEPTH_WRCH = "16" *) + (* C_WR_FREQ = "1" *) + (* C_WR_PNTR_WIDTH = "9" *) + (* C_WR_PNTR_WIDTH_AXIS = "10" *) + (* C_WR_PNTR_WIDTH_RACH = "4" *) + (* C_WR_PNTR_WIDTH_RDCH = "10" *) + (* C_WR_PNTR_WIDTH_WACH = "4" *) + (* C_WR_PNTR_WIDTH_WDCH = "10" *) + (* C_WR_PNTR_WIDTH_WRCH = "4" *) + (* C_WR_RESPONSE_LATENCY = "1" *) + (* is_du_within_envelope = "true" *) + ip9_fifo_generator_v13_2_9 U0 + (.almost_full(almost_full), + .axi_ar_injectdbiterr(\ ), + .axi_ar_injectsbiterr(\ ), + .axi_ar_prog_empty_thresh({\ ,\ ,\ ,\ }), + .axi_ar_prog_full_thresh({\ ,\ ,\ ,\ }), + .axi_aw_injectdbiterr(\ ), + .axi_aw_injectsbiterr(\ ), + .axi_aw_prog_empty_thresh({\ ,\ ,\ ,\ }), + .axi_aw_prog_full_thresh({\ ,\ ,\ ,\ }), + .axi_b_injectdbiterr(\ ), + .axi_b_injectsbiterr(\ ), + .axi_b_prog_empty_thresh({\ ,\ ,\ ,\ }), + .axi_b_prog_full_thresh({\ ,\ ,\ ,\ }), + .axi_r_injectdbiterr(\ ), + .axi_r_injectsbiterr(\ ), + .axi_r_prog_empty_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axi_r_prog_full_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axi_w_injectdbiterr(\ ), + .axi_w_injectsbiterr(\ ), + .axi_w_prog_empty_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axi_w_prog_full_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axis_injectdbiterr(\ ), + .axis_injectsbiterr(\ ), + .axis_prog_empty_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .axis_prog_full_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .backup(\ ), + .backup_marker(\ ), + .clk(clk), + .din(din), + .dout(dout), + .empty(empty), + .full(full), + .injectdbiterr(\ ), + .injectsbiterr(\ ), + .int_clk(\ ), + .m_aclk(\ ), + .m_aclk_en(\ ), + .m_axi_arready(\ ), + .m_axi_awready(\ ), + .m_axi_bid(\ ), + .m_axi_bresp({\ ,\ }), + .m_axi_buser(\ ), + .m_axi_bvalid(\ ), + .m_axi_rdata({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .m_axi_rid(\ ), + .m_axi_rlast(\ ), + .m_axi_rresp({\ ,\ }), + .m_axi_ruser(\ ), + .m_axi_rvalid(\ ), + .m_axi_wready(\ ), + .m_axis_tready(\ ), + .prog_empty_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .prog_empty_thresh_assert({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .prog_empty_thresh_negate({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .prog_full_thresh({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .prog_full_thresh_assert({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .prog_full_thresh_negate({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .rd_clk(\ ), + .rd_en(rd_en), + .rd_rst(\ ), + .rst(\ ), + .s_aclk(\ ), + .s_aclk_en(\ ), + .s_aresetn(\ ), + .s_axi_araddr({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_arburst({\ ,\ }), + .s_axi_arcache({\ ,\ ,\ ,\ }), + .s_axi_arid(\ ), + .s_axi_arlen({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_arlock(\ ), + .s_axi_arprot({\ ,\ ,\ }), + .s_axi_arqos({\ ,\ ,\ ,\ }), + .s_axi_arregion({\ ,\ ,\ ,\ }), + .s_axi_arsize({\ ,\ ,\ }), + .s_axi_aruser(\ ), + .s_axi_arvalid(\ ), + .s_axi_awaddr({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_awburst({\ ,\ }), + .s_axi_awcache({\ ,\ ,\ ,\ }), + .s_axi_awid(\ ), + .s_axi_awlen({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_awlock(\ ), + .s_axi_awprot({\ ,\ ,\ }), + .s_axi_awqos({\ ,\ ,\ ,\ }), + .s_axi_awregion({\ ,\ ,\ ,\ }), + .s_axi_awsize({\ ,\ ,\ }), + .s_axi_awuser(\ ), + .s_axi_awvalid(\ ), + .s_axi_bready(\ ), + .s_axi_rready(\ ), + .s_axi_wdata({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_wid(\ ), + .s_axi_wlast(\ ), + .s_axi_wstrb({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axi_wuser(\ ), + .s_axi_wvalid(\ ), + .s_axis_tdata({\ ,\ ,\ ,\ ,\ ,\ ,\ ,\ }), + .s_axis_tdest(\ ), + .s_axis_tid(\ ), + .s_axis_tkeep(\ ), + .s_axis_tlast(\ ), + .s_axis_tstrb(\ ), + .s_axis_tuser({\ ,\ ,\ ,\ }), + .s_axis_tvalid(\ ), + .sleep(\ ), + .srst(srst), + .valid(valid), + .wr_clk(\ ), + .wr_en(wr_en), + .wr_rst(\ )); +endmodule + +(* STRUCTURAL_NETLIST = "yes" *) +module pcileech_com + (clk, + clk_com, + rst, + BUS_DO, + BUS_DI, + BUS_DI_PROG_FULL, + com_dout, + com_dout_valid, + com_din_ready, + com_din, + com_din_wr_en); + input clk; + input clk_com; + input rst; + input [36:0]BUS_DO; + output [68:0]BUS_DI; + input BUS_DI_PROG_FULL; + output [63:0]com_dout; + output com_dout_valid; + output com_din_ready; + input [255:0]com_din; + input com_din_wr_en; + + wire \ ; + wire \ ; + (* DRIVE = "12" *) (* SLEW = "SLOW" *) wire [68:0]BUS_DI; + wire BUS_DI_PROG_FULL; + wire BUS_DI_PROG_FULL_IBUF; + (* IBUF_LOW_PWR *) wire [36:0]BUS_DO; + wire clk; + wire clk_IBUF; + wire clk_IBUF_BUFG; + wire clk_com; + wire clk_com_IBUF; + wire clk_com_IBUF_BUFG; + wire [255:0]com_din; + wire [255:0]com_din_IBUF; + wire com_din_ready; + wire com_din_ready_OBUF; + wire com_din_wr_en; + wire com_din_wr_en_IBUF; + wire [63:0]com_dout; + wire [63:0]com_dout_OBUF; + wire \com_dout_OBUF[63]_inst_i_100_n_0 ; + wire \com_dout_OBUF[63]_inst_i_101_n_0 ; + wire \com_dout_OBUF[63]_inst_i_102_n_0 ; + wire \com_dout_OBUF[63]_inst_i_103_n_0 ; + wire \com_dout_OBUF[63]_inst_i_104_n_0 ; + wire \com_dout_OBUF[63]_inst_i_105_n_0 ; + wire \com_dout_OBUF[63]_inst_i_106_n_0 ; + wire \com_dout_OBUF[63]_inst_i_107_n_0 ; + wire \com_dout_OBUF[63]_inst_i_108_n_0 ; + wire \com_dout_OBUF[63]_inst_i_109_n_0 ; + wire \com_dout_OBUF[63]_inst_i_10_n_0 ; + wire \com_dout_OBUF[63]_inst_i_110_n_0 ; + wire \com_dout_OBUF[63]_inst_i_111_n_0 ; + wire \com_dout_OBUF[63]_inst_i_112_n_0 ; + wire \com_dout_OBUF[63]_inst_i_113_n_0 ; + wire \com_dout_OBUF[63]_inst_i_114_n_0 ; + wire \com_dout_OBUF[63]_inst_i_115_n_0 ; + wire \com_dout_OBUF[63]_inst_i_11_n_0 ; + wire \com_dout_OBUF[63]_inst_i_12_n_0 ; + wire \com_dout_OBUF[63]_inst_i_13_n_0 ; + wire \com_dout_OBUF[63]_inst_i_14_n_0 ; + wire \com_dout_OBUF[63]_inst_i_15_n_0 ; + wire \com_dout_OBUF[63]_inst_i_16_n_0 ; + wire \com_dout_OBUF[63]_inst_i_17_n_0 ; + wire \com_dout_OBUF[63]_inst_i_18_n_0 ; + wire \com_dout_OBUF[63]_inst_i_18_n_1 ; + wire \com_dout_OBUF[63]_inst_i_18_n_2 ; + wire \com_dout_OBUF[63]_inst_i_18_n_3 ; + wire \com_dout_OBUF[63]_inst_i_19_n_0 ; + wire \com_dout_OBUF[63]_inst_i_20_n_0 ; + wire \com_dout_OBUF[63]_inst_i_21_n_0 ; + wire \com_dout_OBUF[63]_inst_i_22_n_0 ; + wire \com_dout_OBUF[63]_inst_i_23_n_0 ; + wire \com_dout_OBUF[63]_inst_i_23_n_1 ; + wire \com_dout_OBUF[63]_inst_i_23_n_2 ; + wire \com_dout_OBUF[63]_inst_i_23_n_3 ; + wire \com_dout_OBUF[63]_inst_i_24_n_0 ; + wire \com_dout_OBUF[63]_inst_i_25_n_0 ; + wire \com_dout_OBUF[63]_inst_i_26_n_0 ; + wire \com_dout_OBUF[63]_inst_i_27_n_0 ; + wire \com_dout_OBUF[63]_inst_i_28_n_0 ; + wire \com_dout_OBUF[63]_inst_i_29_n_0 ; + wire \com_dout_OBUF[63]_inst_i_2_n_0 ; + wire \com_dout_OBUF[63]_inst_i_2_n_1 ; + wire \com_dout_OBUF[63]_inst_i_2_n_2 ; + wire \com_dout_OBUF[63]_inst_i_2_n_3 ; + wire \com_dout_OBUF[63]_inst_i_30_n_0 ; + wire \com_dout_OBUF[63]_inst_i_31_n_0 ; + wire \com_dout_OBUF[63]_inst_i_32_n_0 ; + wire \com_dout_OBUF[63]_inst_i_32_n_1 ; + wire \com_dout_OBUF[63]_inst_i_32_n_2 ; + wire \com_dout_OBUF[63]_inst_i_32_n_3 ; + wire \com_dout_OBUF[63]_inst_i_33_n_0 ; + wire \com_dout_OBUF[63]_inst_i_34_n_0 ; + wire \com_dout_OBUF[63]_inst_i_35_n_0 ; + wire \com_dout_OBUF[63]_inst_i_36_n_0 ; + wire \com_dout_OBUF[63]_inst_i_37_n_0 ; + wire \com_dout_OBUF[63]_inst_i_37_n_1 ; + wire \com_dout_OBUF[63]_inst_i_37_n_2 ; + wire \com_dout_OBUF[63]_inst_i_37_n_3 ; + wire \com_dout_OBUF[63]_inst_i_38_n_0 ; + wire \com_dout_OBUF[63]_inst_i_39_n_0 ; + wire \com_dout_OBUF[63]_inst_i_3_n_0 ; + wire \com_dout_OBUF[63]_inst_i_3_n_1 ; + wire \com_dout_OBUF[63]_inst_i_3_n_2 ; + wire \com_dout_OBUF[63]_inst_i_3_n_3 ; + wire \com_dout_OBUF[63]_inst_i_40_n_0 ; + wire \com_dout_OBUF[63]_inst_i_41_n_0 ; + wire \com_dout_OBUF[63]_inst_i_42_n_0 ; + wire \com_dout_OBUF[63]_inst_i_43_n_0 ; + wire \com_dout_OBUF[63]_inst_i_44_n_0 ; + wire \com_dout_OBUF[63]_inst_i_45_n_0 ; + wire \com_dout_OBUF[63]_inst_i_46_n_0 ; + wire \com_dout_OBUF[63]_inst_i_46_n_1 ; + wire \com_dout_OBUF[63]_inst_i_46_n_2 ; + wire \com_dout_OBUF[63]_inst_i_46_n_3 ; + wire \com_dout_OBUF[63]_inst_i_47_n_0 ; + wire \com_dout_OBUF[63]_inst_i_48_n_0 ; + wire \com_dout_OBUF[63]_inst_i_49_n_0 ; + wire \com_dout_OBUF[63]_inst_i_4_n_0 ; + wire \com_dout_OBUF[63]_inst_i_4_n_1 ; + wire \com_dout_OBUF[63]_inst_i_4_n_2 ; + wire \com_dout_OBUF[63]_inst_i_4_n_3 ; + wire \com_dout_OBUF[63]_inst_i_50_n_0 ; + wire \com_dout_OBUF[63]_inst_i_51_n_0 ; + wire \com_dout_OBUF[63]_inst_i_51_n_1 ; + wire \com_dout_OBUF[63]_inst_i_51_n_2 ; + wire \com_dout_OBUF[63]_inst_i_51_n_3 ; + wire \com_dout_OBUF[63]_inst_i_52_n_0 ; + wire \com_dout_OBUF[63]_inst_i_53_n_0 ; + wire \com_dout_OBUF[63]_inst_i_54_n_0 ; + wire \com_dout_OBUF[63]_inst_i_55_n_0 ; + wire \com_dout_OBUF[63]_inst_i_56_n_0 ; + wire \com_dout_OBUF[63]_inst_i_57_n_0 ; + wire \com_dout_OBUF[63]_inst_i_58_n_0 ; + wire \com_dout_OBUF[63]_inst_i_59_n_0 ; + wire \com_dout_OBUF[63]_inst_i_5_n_0 ; + wire \com_dout_OBUF[63]_inst_i_60_n_0 ; + wire \com_dout_OBUF[63]_inst_i_60_n_1 ; + wire \com_dout_OBUF[63]_inst_i_60_n_2 ; + wire \com_dout_OBUF[63]_inst_i_60_n_3 ; + wire \com_dout_OBUF[63]_inst_i_61_n_0 ; + wire \com_dout_OBUF[63]_inst_i_62_n_0 ; + wire \com_dout_OBUF[63]_inst_i_63_n_0 ; + wire \com_dout_OBUF[63]_inst_i_64_n_0 ; + wire \com_dout_OBUF[63]_inst_i_65_n_0 ; + wire \com_dout_OBUF[63]_inst_i_65_n_1 ; + wire \com_dout_OBUF[63]_inst_i_65_n_2 ; + wire \com_dout_OBUF[63]_inst_i_65_n_3 ; + wire \com_dout_OBUF[63]_inst_i_66_n_0 ; + wire \com_dout_OBUF[63]_inst_i_67_n_0 ; + wire \com_dout_OBUF[63]_inst_i_68_n_0 ; + wire \com_dout_OBUF[63]_inst_i_69_n_0 ; + wire \com_dout_OBUF[63]_inst_i_6_n_0 ; + wire \com_dout_OBUF[63]_inst_i_70_n_0 ; + wire \com_dout_OBUF[63]_inst_i_71_n_0 ; + wire \com_dout_OBUF[63]_inst_i_72_n_0 ; + wire \com_dout_OBUF[63]_inst_i_73_n_0 ; + wire \com_dout_OBUF[63]_inst_i_74_n_0 ; + wire \com_dout_OBUF[63]_inst_i_74_n_1 ; + wire \com_dout_OBUF[63]_inst_i_74_n_2 ; + wire \com_dout_OBUF[63]_inst_i_74_n_3 ; + wire \com_dout_OBUF[63]_inst_i_75_n_0 ; + wire \com_dout_OBUF[63]_inst_i_76_n_0 ; + wire \com_dout_OBUF[63]_inst_i_77_n_0 ; + wire \com_dout_OBUF[63]_inst_i_78_n_0 ; + wire \com_dout_OBUF[63]_inst_i_79_n_0 ; + wire \com_dout_OBUF[63]_inst_i_79_n_1 ; + wire \com_dout_OBUF[63]_inst_i_79_n_2 ; + wire \com_dout_OBUF[63]_inst_i_79_n_3 ; + wire \com_dout_OBUF[63]_inst_i_7_n_0 ; + wire \com_dout_OBUF[63]_inst_i_80_n_0 ; + wire \com_dout_OBUF[63]_inst_i_81_n_0 ; + wire \com_dout_OBUF[63]_inst_i_82_n_0 ; + wire \com_dout_OBUF[63]_inst_i_83_n_0 ; + wire \com_dout_OBUF[63]_inst_i_84_n_0 ; + wire \com_dout_OBUF[63]_inst_i_85_n_0 ; + wire \com_dout_OBUF[63]_inst_i_86_n_0 ; + wire \com_dout_OBUF[63]_inst_i_87_n_0 ; + wire \com_dout_OBUF[63]_inst_i_88_n_0 ; + wire \com_dout_OBUF[63]_inst_i_88_n_1 ; + wire \com_dout_OBUF[63]_inst_i_88_n_2 ; + wire \com_dout_OBUF[63]_inst_i_88_n_3 ; + wire \com_dout_OBUF[63]_inst_i_89_n_0 ; + wire \com_dout_OBUF[63]_inst_i_8_n_0 ; + wire \com_dout_OBUF[63]_inst_i_90_n_0 ; + wire \com_dout_OBUF[63]_inst_i_91_n_0 ; + wire \com_dout_OBUF[63]_inst_i_92_n_0 ; + wire \com_dout_OBUF[63]_inst_i_93_n_0 ; + wire \com_dout_OBUF[63]_inst_i_93_n_1 ; + wire \com_dout_OBUF[63]_inst_i_93_n_2 ; + wire \com_dout_OBUF[63]_inst_i_93_n_3 ; + wire \com_dout_OBUF[63]_inst_i_94_n_0 ; + wire \com_dout_OBUF[63]_inst_i_95_n_0 ; + wire \com_dout_OBUF[63]_inst_i_96_n_0 ; + wire \com_dout_OBUF[63]_inst_i_97_n_0 ; + wire \com_dout_OBUF[63]_inst_i_98_n_0 ; + wire \com_dout_OBUF[63]_inst_i_99_n_0 ; + wire \com_dout_OBUF[63]_inst_i_9_n_0 ; + wire \com_dout_OBUF[63]_inst_i_9_n_1 ; + wire \com_dout_OBUF[63]_inst_i_9_n_2 ; + wire \com_dout_OBUF[63]_inst_i_9_n_3 ; + wire com_dout_valid; + wire com_dout_valid_OBUF; + wire [63:0]com_rx_data64; + wire [63:0]com_rx_dout; + wire com_rx_valid; + wire com_rx_valid64; + (* RTL_KEEP = "{true|false |soft}" *) wire [255:0]com_tx_data; + wire com_tx_fifo_almost_full; + (* RTL_KEEP = "{true|false |soft}" *) wire com_tx_valid; + wire i11_n_69; + wire [63:0]p_0_in; + wire rst; + wire rst_IBUF; + wire \tickcount64_reg[12]_i_1_n_0 ; + wire \tickcount64_reg[12]_i_1_n_1 ; + wire \tickcount64_reg[12]_i_1_n_2 ; + wire \tickcount64_reg[12]_i_1_n_3 ; + wire \tickcount64_reg[16]_i_1_n_0 ; + wire \tickcount64_reg[16]_i_1_n_1 ; + wire \tickcount64_reg[16]_i_1_n_2 ; + wire \tickcount64_reg[16]_i_1_n_3 ; + wire \tickcount64_reg[20]_i_1_n_0 ; + wire \tickcount64_reg[20]_i_1_n_1 ; + wire \tickcount64_reg[20]_i_1_n_2 ; + wire \tickcount64_reg[20]_i_1_n_3 ; + wire \tickcount64_reg[24]_i_1_n_0 ; + wire \tickcount64_reg[24]_i_1_n_1 ; + wire \tickcount64_reg[24]_i_1_n_2 ; + wire \tickcount64_reg[24]_i_1_n_3 ; + wire \tickcount64_reg[28]_i_1_n_0 ; + wire \tickcount64_reg[28]_i_1_n_1 ; + wire \tickcount64_reg[28]_i_1_n_2 ; + wire \tickcount64_reg[28]_i_1_n_3 ; + wire \tickcount64_reg[32]_i_1_n_0 ; + wire \tickcount64_reg[32]_i_1_n_1 ; + wire \tickcount64_reg[32]_i_1_n_2 ; + wire \tickcount64_reg[32]_i_1_n_3 ; + wire \tickcount64_reg[36]_i_1_n_0 ; + wire \tickcount64_reg[36]_i_1_n_1 ; + wire \tickcount64_reg[36]_i_1_n_2 ; + wire \tickcount64_reg[36]_i_1_n_3 ; + wire \tickcount64_reg[40]_i_1_n_0 ; + wire \tickcount64_reg[40]_i_1_n_1 ; + wire \tickcount64_reg[40]_i_1_n_2 ; + wire \tickcount64_reg[40]_i_1_n_3 ; + wire \tickcount64_reg[44]_i_1_n_0 ; + wire \tickcount64_reg[44]_i_1_n_1 ; + wire \tickcount64_reg[44]_i_1_n_2 ; + wire \tickcount64_reg[44]_i_1_n_3 ; + wire \tickcount64_reg[48]_i_1_n_0 ; + wire \tickcount64_reg[48]_i_1_n_1 ; + wire \tickcount64_reg[48]_i_1_n_2 ; + wire \tickcount64_reg[48]_i_1_n_3 ; + wire \tickcount64_reg[4]_i_1_n_0 ; + wire \tickcount64_reg[4]_i_1_n_1 ; + wire \tickcount64_reg[4]_i_1_n_2 ; + wire \tickcount64_reg[4]_i_1_n_3 ; + wire \tickcount64_reg[52]_i_1_n_0 ; + wire \tickcount64_reg[52]_i_1_n_1 ; + wire \tickcount64_reg[52]_i_1_n_2 ; + wire \tickcount64_reg[52]_i_1_n_3 ; + wire \tickcount64_reg[56]_i_1_n_0 ; + wire \tickcount64_reg[56]_i_1_n_1 ; + wire \tickcount64_reg[56]_i_1_n_2 ; + wire \tickcount64_reg[56]_i_1_n_3 ; + wire \tickcount64_reg[60]_i_1_n_0 ; + wire \tickcount64_reg[60]_i_1_n_1 ; + wire \tickcount64_reg[60]_i_1_n_2 ; + wire \tickcount64_reg[60]_i_1_n_3 ; + wire \tickcount64_reg[63]_i_1_n_2 ; + wire \tickcount64_reg[63]_i_1_n_3 ; + wire \tickcount64_reg[8]_i_1_n_0 ; + wire \tickcount64_reg[8]_i_1_n_1 ; + wire \tickcount64_reg[8]_i_1_n_2 ; + wire \tickcount64_reg[8]_i_1_n_3 ; + wire \tickcount64_reg_n_0_[0] ; + wire \tickcount64_reg_n_0_[10] ; + wire \tickcount64_reg_n_0_[11] ; + wire \tickcount64_reg_n_0_[12] ; + wire \tickcount64_reg_n_0_[13] ; + wire \tickcount64_reg_n_0_[14] ; + wire \tickcount64_reg_n_0_[15] ; + wire \tickcount64_reg_n_0_[16] ; + wire \tickcount64_reg_n_0_[17] ; + wire \tickcount64_reg_n_0_[18] ; + wire \tickcount64_reg_n_0_[19] ; + wire \tickcount64_reg_n_0_[1] ; + wire \tickcount64_reg_n_0_[20] ; + wire \tickcount64_reg_n_0_[21] ; + wire \tickcount64_reg_n_0_[22] ; + wire \tickcount64_reg_n_0_[23] ; + wire \tickcount64_reg_n_0_[24] ; + wire \tickcount64_reg_n_0_[25] ; + wire \tickcount64_reg_n_0_[26] ; + wire \tickcount64_reg_n_0_[27] ; + wire \tickcount64_reg_n_0_[28] ; + wire \tickcount64_reg_n_0_[29] ; + wire \tickcount64_reg_n_0_[2] ; + wire \tickcount64_reg_n_0_[30] ; + wire \tickcount64_reg_n_0_[31] ; + wire \tickcount64_reg_n_0_[32] ; + wire \tickcount64_reg_n_0_[33] ; + wire \tickcount64_reg_n_0_[34] ; + wire \tickcount64_reg_n_0_[35] ; + wire \tickcount64_reg_n_0_[36] ; + wire \tickcount64_reg_n_0_[37] ; + wire \tickcount64_reg_n_0_[38] ; + wire \tickcount64_reg_n_0_[39] ; + wire \tickcount64_reg_n_0_[3] ; + wire \tickcount64_reg_n_0_[40] ; + wire \tickcount64_reg_n_0_[41] ; + wire \tickcount64_reg_n_0_[42] ; + wire \tickcount64_reg_n_0_[43] ; + wire \tickcount64_reg_n_0_[44] ; + wire \tickcount64_reg_n_0_[45] ; + wire \tickcount64_reg_n_0_[46] ; + wire \tickcount64_reg_n_0_[47] ; + wire \tickcount64_reg_n_0_[48] ; + wire \tickcount64_reg_n_0_[49] ; + wire \tickcount64_reg_n_0_[4] ; + wire \tickcount64_reg_n_0_[50] ; + wire \tickcount64_reg_n_0_[51] ; + wire \tickcount64_reg_n_0_[52] ; + wire \tickcount64_reg_n_0_[53] ; + wire \tickcount64_reg_n_0_[54] ; + wire \tickcount64_reg_n_0_[55] ; + wire \tickcount64_reg_n_0_[56] ; + wire \tickcount64_reg_n_0_[57] ; + wire \tickcount64_reg_n_0_[58] ; + wire \tickcount64_reg_n_0_[59] ; + wire \tickcount64_reg_n_0_[5] ; + wire \tickcount64_reg_n_0_[60] ; + wire \tickcount64_reg_n_0_[61] ; + wire \tickcount64_reg_n_0_[62] ; + wire \tickcount64_reg_n_0_[63] ; + wire \tickcount64_reg_n_0_[6] ; + wire \tickcount64_reg_n_0_[7] ; + wire \tickcount64_reg_n_0_[8] ; + wire \tickcount64_reg_n_0_[9] ; + + IBUF BUS_DI_PROG_FULL_IBUF_inst + (.I(BUS_DI_PROG_FULL), + .O(BUS_DI_PROG_FULL_IBUF)); + GND GND + (.G(\ )); + VCC VCC + (.P(\ )); + BUFG clk_IBUF_BUFG_inst + (.I(clk_IBUF), + .O(clk_IBUF_BUFG)); + IBUF clk_IBUF_inst + (.I(clk), + .O(clk_IBUF)); + BUFG clk_com_IBUF_BUFG_inst + (.I(clk_com_IBUF), + .O(clk_com_IBUF_BUFG)); + IBUF clk_com_IBUF_inst + (.I(clk_com), + .O(clk_com_IBUF)); + IBUF \com_din_IBUF[0]_inst + (.I(com_din[0]), + .O(com_din_IBUF[0])); + IBUF \com_din_IBUF[100]_inst + (.I(com_din[100]), + .O(com_din_IBUF[100])); + IBUF \com_din_IBUF[101]_inst + (.I(com_din[101]), + .O(com_din_IBUF[101])); + IBUF \com_din_IBUF[102]_inst + (.I(com_din[102]), + .O(com_din_IBUF[102])); + IBUF \com_din_IBUF[103]_inst + (.I(com_din[103]), + .O(com_din_IBUF[103])); + IBUF \com_din_IBUF[104]_inst + (.I(com_din[104]), + .O(com_din_IBUF[104])); + IBUF \com_din_IBUF[105]_inst + (.I(com_din[105]), + .O(com_din_IBUF[105])); + IBUF \com_din_IBUF[106]_inst + (.I(com_din[106]), + .O(com_din_IBUF[106])); + IBUF \com_din_IBUF[107]_inst + (.I(com_din[107]), + .O(com_din_IBUF[107])); + IBUF \com_din_IBUF[108]_inst + (.I(com_din[108]), + .O(com_din_IBUF[108])); + IBUF \com_din_IBUF[109]_inst + (.I(com_din[109]), + .O(com_din_IBUF[109])); + IBUF \com_din_IBUF[10]_inst + (.I(com_din[10]), + .O(com_din_IBUF[10])); + IBUF \com_din_IBUF[110]_inst + (.I(com_din[110]), + .O(com_din_IBUF[110])); + IBUF \com_din_IBUF[111]_inst + (.I(com_din[111]), + .O(com_din_IBUF[111])); + IBUF \com_din_IBUF[112]_inst + (.I(com_din[112]), + .O(com_din_IBUF[112])); + IBUF \com_din_IBUF[113]_inst + (.I(com_din[113]), + .O(com_din_IBUF[113])); + IBUF \com_din_IBUF[114]_inst + (.I(com_din[114]), + .O(com_din_IBUF[114])); + IBUF \com_din_IBUF[115]_inst + (.I(com_din[115]), + .O(com_din_IBUF[115])); + IBUF \com_din_IBUF[116]_inst + (.I(com_din[116]), + .O(com_din_IBUF[116])); + IBUF \com_din_IBUF[117]_inst + (.I(com_din[117]), + .O(com_din_IBUF[117])); + IBUF \com_din_IBUF[118]_inst + (.I(com_din[118]), + .O(com_din_IBUF[118])); + IBUF \com_din_IBUF[119]_inst + (.I(com_din[119]), + .O(com_din_IBUF[119])); + IBUF \com_din_IBUF[11]_inst + (.I(com_din[11]), + .O(com_din_IBUF[11])); + IBUF \com_din_IBUF[120]_inst + (.I(com_din[120]), + .O(com_din_IBUF[120])); + IBUF \com_din_IBUF[121]_inst + (.I(com_din[121]), + .O(com_din_IBUF[121])); + IBUF \com_din_IBUF[122]_inst + (.I(com_din[122]), + .O(com_din_IBUF[122])); + IBUF \com_din_IBUF[123]_inst + (.I(com_din[123]), + .O(com_din_IBUF[123])); + IBUF \com_din_IBUF[124]_inst + (.I(com_din[124]), + .O(com_din_IBUF[124])); + IBUF \com_din_IBUF[125]_inst + (.I(com_din[125]), + .O(com_din_IBUF[125])); + IBUF \com_din_IBUF[126]_inst + (.I(com_din[126]), + .O(com_din_IBUF[126])); + IBUF \com_din_IBUF[127]_inst + (.I(com_din[127]), + .O(com_din_IBUF[127])); + IBUF \com_din_IBUF[128]_inst + (.I(com_din[128]), + .O(com_din_IBUF[128])); + IBUF \com_din_IBUF[129]_inst + (.I(com_din[129]), + .O(com_din_IBUF[129])); + IBUF \com_din_IBUF[12]_inst + (.I(com_din[12]), + .O(com_din_IBUF[12])); + IBUF \com_din_IBUF[130]_inst + (.I(com_din[130]), + .O(com_din_IBUF[130])); + IBUF \com_din_IBUF[131]_inst + (.I(com_din[131]), + .O(com_din_IBUF[131])); + IBUF \com_din_IBUF[132]_inst + (.I(com_din[132]), + .O(com_din_IBUF[132])); + IBUF \com_din_IBUF[133]_inst + (.I(com_din[133]), + .O(com_din_IBUF[133])); + IBUF \com_din_IBUF[134]_inst + (.I(com_din[134]), + .O(com_din_IBUF[134])); + IBUF \com_din_IBUF[135]_inst + (.I(com_din[135]), + .O(com_din_IBUF[135])); + IBUF \com_din_IBUF[136]_inst + (.I(com_din[136]), + .O(com_din_IBUF[136])); + IBUF \com_din_IBUF[137]_inst + (.I(com_din[137]), + .O(com_din_IBUF[137])); + IBUF \com_din_IBUF[138]_inst + (.I(com_din[138]), + .O(com_din_IBUF[138])); + IBUF \com_din_IBUF[139]_inst + (.I(com_din[139]), + .O(com_din_IBUF[139])); + IBUF \com_din_IBUF[13]_inst + (.I(com_din[13]), + .O(com_din_IBUF[13])); + IBUF \com_din_IBUF[140]_inst + (.I(com_din[140]), + .O(com_din_IBUF[140])); + IBUF \com_din_IBUF[141]_inst + (.I(com_din[141]), + .O(com_din_IBUF[141])); + IBUF \com_din_IBUF[142]_inst + (.I(com_din[142]), + .O(com_din_IBUF[142])); + IBUF \com_din_IBUF[143]_inst + (.I(com_din[143]), + .O(com_din_IBUF[143])); + IBUF \com_din_IBUF[144]_inst + (.I(com_din[144]), + .O(com_din_IBUF[144])); + IBUF \com_din_IBUF[145]_inst + (.I(com_din[145]), + .O(com_din_IBUF[145])); + IBUF \com_din_IBUF[146]_inst + (.I(com_din[146]), + .O(com_din_IBUF[146])); + IBUF \com_din_IBUF[147]_inst + (.I(com_din[147]), + .O(com_din_IBUF[147])); + IBUF \com_din_IBUF[148]_inst + (.I(com_din[148]), + .O(com_din_IBUF[148])); + IBUF \com_din_IBUF[149]_inst + (.I(com_din[149]), + .O(com_din_IBUF[149])); + IBUF \com_din_IBUF[14]_inst + (.I(com_din[14]), + .O(com_din_IBUF[14])); + IBUF \com_din_IBUF[150]_inst + (.I(com_din[150]), + .O(com_din_IBUF[150])); + IBUF \com_din_IBUF[151]_inst + (.I(com_din[151]), + .O(com_din_IBUF[151])); + IBUF \com_din_IBUF[152]_inst + (.I(com_din[152]), + .O(com_din_IBUF[152])); + IBUF \com_din_IBUF[153]_inst + (.I(com_din[153]), + .O(com_din_IBUF[153])); + IBUF \com_din_IBUF[154]_inst + (.I(com_din[154]), + .O(com_din_IBUF[154])); + IBUF \com_din_IBUF[155]_inst + (.I(com_din[155]), + .O(com_din_IBUF[155])); + IBUF \com_din_IBUF[156]_inst + (.I(com_din[156]), + .O(com_din_IBUF[156])); + IBUF \com_din_IBUF[157]_inst + (.I(com_din[157]), + .O(com_din_IBUF[157])); + IBUF \com_din_IBUF[158]_inst + (.I(com_din[158]), + .O(com_din_IBUF[158])); + IBUF \com_din_IBUF[159]_inst + (.I(com_din[159]), + .O(com_din_IBUF[159])); + IBUF \com_din_IBUF[15]_inst + (.I(com_din[15]), + .O(com_din_IBUF[15])); + IBUF \com_din_IBUF[160]_inst + (.I(com_din[160]), + .O(com_din_IBUF[160])); + IBUF \com_din_IBUF[161]_inst + (.I(com_din[161]), + .O(com_din_IBUF[161])); + IBUF \com_din_IBUF[162]_inst + (.I(com_din[162]), + .O(com_din_IBUF[162])); + IBUF \com_din_IBUF[163]_inst + (.I(com_din[163]), + .O(com_din_IBUF[163])); + IBUF \com_din_IBUF[164]_inst + (.I(com_din[164]), + .O(com_din_IBUF[164])); + IBUF \com_din_IBUF[165]_inst + (.I(com_din[165]), + .O(com_din_IBUF[165])); + IBUF \com_din_IBUF[166]_inst + (.I(com_din[166]), + .O(com_din_IBUF[166])); + IBUF \com_din_IBUF[167]_inst + (.I(com_din[167]), + .O(com_din_IBUF[167])); + IBUF \com_din_IBUF[168]_inst + (.I(com_din[168]), + .O(com_din_IBUF[168])); + IBUF \com_din_IBUF[169]_inst + (.I(com_din[169]), + .O(com_din_IBUF[169])); + IBUF \com_din_IBUF[16]_inst + (.I(com_din[16]), + .O(com_din_IBUF[16])); + IBUF \com_din_IBUF[170]_inst + (.I(com_din[170]), + .O(com_din_IBUF[170])); + IBUF \com_din_IBUF[171]_inst + (.I(com_din[171]), + .O(com_din_IBUF[171])); + IBUF \com_din_IBUF[172]_inst + (.I(com_din[172]), + .O(com_din_IBUF[172])); + IBUF \com_din_IBUF[173]_inst + (.I(com_din[173]), + .O(com_din_IBUF[173])); + IBUF \com_din_IBUF[174]_inst + (.I(com_din[174]), + .O(com_din_IBUF[174])); + IBUF \com_din_IBUF[175]_inst + (.I(com_din[175]), + .O(com_din_IBUF[175])); + IBUF \com_din_IBUF[176]_inst + (.I(com_din[176]), + .O(com_din_IBUF[176])); + IBUF \com_din_IBUF[177]_inst + (.I(com_din[177]), + .O(com_din_IBUF[177])); + IBUF \com_din_IBUF[178]_inst + (.I(com_din[178]), + .O(com_din_IBUF[178])); + IBUF \com_din_IBUF[179]_inst + (.I(com_din[179]), + .O(com_din_IBUF[179])); + IBUF \com_din_IBUF[17]_inst + (.I(com_din[17]), + .O(com_din_IBUF[17])); + IBUF \com_din_IBUF[180]_inst + (.I(com_din[180]), + .O(com_din_IBUF[180])); + IBUF \com_din_IBUF[181]_inst + (.I(com_din[181]), + .O(com_din_IBUF[181])); + IBUF \com_din_IBUF[182]_inst + (.I(com_din[182]), + .O(com_din_IBUF[182])); + IBUF \com_din_IBUF[183]_inst + (.I(com_din[183]), + .O(com_din_IBUF[183])); + IBUF \com_din_IBUF[184]_inst + (.I(com_din[184]), + .O(com_din_IBUF[184])); + IBUF \com_din_IBUF[185]_inst + (.I(com_din[185]), + .O(com_din_IBUF[185])); + IBUF \com_din_IBUF[186]_inst + (.I(com_din[186]), + .O(com_din_IBUF[186])); + IBUF \com_din_IBUF[187]_inst + (.I(com_din[187]), + .O(com_din_IBUF[187])); + IBUF \com_din_IBUF[188]_inst + (.I(com_din[188]), + .O(com_din_IBUF[188])); + IBUF \com_din_IBUF[189]_inst + (.I(com_din[189]), + .O(com_din_IBUF[189])); + IBUF \com_din_IBUF[18]_inst + (.I(com_din[18]), + .O(com_din_IBUF[18])); + IBUF \com_din_IBUF[190]_inst + (.I(com_din[190]), + .O(com_din_IBUF[190])); + IBUF \com_din_IBUF[191]_inst + (.I(com_din[191]), + .O(com_din_IBUF[191])); + IBUF \com_din_IBUF[192]_inst + (.I(com_din[192]), + .O(com_din_IBUF[192])); + IBUF \com_din_IBUF[193]_inst + (.I(com_din[193]), + .O(com_din_IBUF[193])); + IBUF \com_din_IBUF[194]_inst + (.I(com_din[194]), + .O(com_din_IBUF[194])); + IBUF \com_din_IBUF[195]_inst + (.I(com_din[195]), + .O(com_din_IBUF[195])); + IBUF \com_din_IBUF[196]_inst + (.I(com_din[196]), + .O(com_din_IBUF[196])); + IBUF \com_din_IBUF[197]_inst + (.I(com_din[197]), + .O(com_din_IBUF[197])); + IBUF \com_din_IBUF[198]_inst + (.I(com_din[198]), + .O(com_din_IBUF[198])); + IBUF \com_din_IBUF[199]_inst + (.I(com_din[199]), + .O(com_din_IBUF[199])); + IBUF \com_din_IBUF[19]_inst + (.I(com_din[19]), + .O(com_din_IBUF[19])); + IBUF \com_din_IBUF[1]_inst + (.I(com_din[1]), + .O(com_din_IBUF[1])); + IBUF \com_din_IBUF[200]_inst + (.I(com_din[200]), + .O(com_din_IBUF[200])); + IBUF \com_din_IBUF[201]_inst + (.I(com_din[201]), + .O(com_din_IBUF[201])); + IBUF \com_din_IBUF[202]_inst + (.I(com_din[202]), + .O(com_din_IBUF[202])); + IBUF \com_din_IBUF[203]_inst + (.I(com_din[203]), + .O(com_din_IBUF[203])); + IBUF \com_din_IBUF[204]_inst + (.I(com_din[204]), + .O(com_din_IBUF[204])); + IBUF \com_din_IBUF[205]_inst + (.I(com_din[205]), + .O(com_din_IBUF[205])); + IBUF \com_din_IBUF[206]_inst + (.I(com_din[206]), + .O(com_din_IBUF[206])); + IBUF \com_din_IBUF[207]_inst + (.I(com_din[207]), + .O(com_din_IBUF[207])); + IBUF \com_din_IBUF[208]_inst + (.I(com_din[208]), + .O(com_din_IBUF[208])); + IBUF \com_din_IBUF[209]_inst + (.I(com_din[209]), + .O(com_din_IBUF[209])); + IBUF \com_din_IBUF[20]_inst + (.I(com_din[20]), + .O(com_din_IBUF[20])); + IBUF \com_din_IBUF[210]_inst + (.I(com_din[210]), + .O(com_din_IBUF[210])); + IBUF \com_din_IBUF[211]_inst + (.I(com_din[211]), + .O(com_din_IBUF[211])); + IBUF \com_din_IBUF[212]_inst + (.I(com_din[212]), + .O(com_din_IBUF[212])); + IBUF \com_din_IBUF[213]_inst + (.I(com_din[213]), + .O(com_din_IBUF[213])); + IBUF \com_din_IBUF[214]_inst + (.I(com_din[214]), + .O(com_din_IBUF[214])); + IBUF \com_din_IBUF[215]_inst + (.I(com_din[215]), + .O(com_din_IBUF[215])); + IBUF \com_din_IBUF[216]_inst + (.I(com_din[216]), + .O(com_din_IBUF[216])); + IBUF \com_din_IBUF[217]_inst + (.I(com_din[217]), + .O(com_din_IBUF[217])); + IBUF \com_din_IBUF[218]_inst + (.I(com_din[218]), + .O(com_din_IBUF[218])); + IBUF \com_din_IBUF[219]_inst + (.I(com_din[219]), + .O(com_din_IBUF[219])); + IBUF \com_din_IBUF[21]_inst + (.I(com_din[21]), + .O(com_din_IBUF[21])); + IBUF \com_din_IBUF[220]_inst + (.I(com_din[220]), + .O(com_din_IBUF[220])); + IBUF \com_din_IBUF[221]_inst + (.I(com_din[221]), + .O(com_din_IBUF[221])); + IBUF \com_din_IBUF[222]_inst + (.I(com_din[222]), + .O(com_din_IBUF[222])); + IBUF \com_din_IBUF[223]_inst + (.I(com_din[223]), + .O(com_din_IBUF[223])); + IBUF \com_din_IBUF[224]_inst + (.I(com_din[224]), + .O(com_din_IBUF[224])); + IBUF \com_din_IBUF[225]_inst + (.I(com_din[225]), + .O(com_din_IBUF[225])); + IBUF \com_din_IBUF[226]_inst + (.I(com_din[226]), + .O(com_din_IBUF[226])); + IBUF \com_din_IBUF[227]_inst + (.I(com_din[227]), + .O(com_din_IBUF[227])); + IBUF \com_din_IBUF[228]_inst + (.I(com_din[228]), + .O(com_din_IBUF[228])); + IBUF \com_din_IBUF[229]_inst + (.I(com_din[229]), + .O(com_din_IBUF[229])); + IBUF \com_din_IBUF[22]_inst + (.I(com_din[22]), + .O(com_din_IBUF[22])); + IBUF \com_din_IBUF[230]_inst + (.I(com_din[230]), + .O(com_din_IBUF[230])); + IBUF \com_din_IBUF[231]_inst + (.I(com_din[231]), + .O(com_din_IBUF[231])); + IBUF \com_din_IBUF[232]_inst + (.I(com_din[232]), + .O(com_din_IBUF[232])); + IBUF \com_din_IBUF[233]_inst + (.I(com_din[233]), + .O(com_din_IBUF[233])); + IBUF \com_din_IBUF[234]_inst + (.I(com_din[234]), + .O(com_din_IBUF[234])); + IBUF \com_din_IBUF[235]_inst + (.I(com_din[235]), + .O(com_din_IBUF[235])); + IBUF \com_din_IBUF[236]_inst + (.I(com_din[236]), + .O(com_din_IBUF[236])); + IBUF \com_din_IBUF[237]_inst + (.I(com_din[237]), + .O(com_din_IBUF[237])); + IBUF \com_din_IBUF[238]_inst + (.I(com_din[238]), + .O(com_din_IBUF[238])); + IBUF \com_din_IBUF[239]_inst + (.I(com_din[239]), + .O(com_din_IBUF[239])); + IBUF \com_din_IBUF[23]_inst + (.I(com_din[23]), + .O(com_din_IBUF[23])); + IBUF \com_din_IBUF[240]_inst + (.I(com_din[240]), + .O(com_din_IBUF[240])); + IBUF \com_din_IBUF[241]_inst + (.I(com_din[241]), + .O(com_din_IBUF[241])); + IBUF \com_din_IBUF[242]_inst + (.I(com_din[242]), + .O(com_din_IBUF[242])); + IBUF \com_din_IBUF[243]_inst + (.I(com_din[243]), + .O(com_din_IBUF[243])); + IBUF \com_din_IBUF[244]_inst + (.I(com_din[244]), + .O(com_din_IBUF[244])); + IBUF \com_din_IBUF[245]_inst + (.I(com_din[245]), + .O(com_din_IBUF[245])); + IBUF \com_din_IBUF[246]_inst + (.I(com_din[246]), + .O(com_din_IBUF[246])); + IBUF \com_din_IBUF[247]_inst + (.I(com_din[247]), + .O(com_din_IBUF[247])); + IBUF \com_din_IBUF[248]_inst + (.I(com_din[248]), + .O(com_din_IBUF[248])); + IBUF \com_din_IBUF[249]_inst + (.I(com_din[249]), + .O(com_din_IBUF[249])); + IBUF \com_din_IBUF[24]_inst + (.I(com_din[24]), + .O(com_din_IBUF[24])); + IBUF \com_din_IBUF[250]_inst + (.I(com_din[250]), + .O(com_din_IBUF[250])); + IBUF \com_din_IBUF[251]_inst + (.I(com_din[251]), + .O(com_din_IBUF[251])); + IBUF \com_din_IBUF[252]_inst + (.I(com_din[252]), + .O(com_din_IBUF[252])); + IBUF \com_din_IBUF[253]_inst + (.I(com_din[253]), + .O(com_din_IBUF[253])); + IBUF \com_din_IBUF[254]_inst + (.I(com_din[254]), + .O(com_din_IBUF[254])); + IBUF \com_din_IBUF[255]_inst + (.I(com_din[255]), + .O(com_din_IBUF[255])); + IBUF \com_din_IBUF[25]_inst + (.I(com_din[25]), + .O(com_din_IBUF[25])); + IBUF \com_din_IBUF[26]_inst + (.I(com_din[26]), + .O(com_din_IBUF[26])); + IBUF \com_din_IBUF[27]_inst + (.I(com_din[27]), + .O(com_din_IBUF[27])); + IBUF \com_din_IBUF[28]_inst + (.I(com_din[28]), + .O(com_din_IBUF[28])); + IBUF \com_din_IBUF[29]_inst + (.I(com_din[29]), + .O(com_din_IBUF[29])); + IBUF \com_din_IBUF[2]_inst + (.I(com_din[2]), + .O(com_din_IBUF[2])); + IBUF \com_din_IBUF[30]_inst + (.I(com_din[30]), + .O(com_din_IBUF[30])); + IBUF \com_din_IBUF[31]_inst + (.I(com_din[31]), + .O(com_din_IBUF[31])); + IBUF \com_din_IBUF[32]_inst + (.I(com_din[32]), + .O(com_din_IBUF[32])); + IBUF \com_din_IBUF[33]_inst + (.I(com_din[33]), + .O(com_din_IBUF[33])); + IBUF \com_din_IBUF[34]_inst + (.I(com_din[34]), + .O(com_din_IBUF[34])); + IBUF \com_din_IBUF[35]_inst + (.I(com_din[35]), + .O(com_din_IBUF[35])); + IBUF \com_din_IBUF[36]_inst + (.I(com_din[36]), + .O(com_din_IBUF[36])); + IBUF \com_din_IBUF[37]_inst + (.I(com_din[37]), + .O(com_din_IBUF[37])); + IBUF \com_din_IBUF[38]_inst + (.I(com_din[38]), + .O(com_din_IBUF[38])); + IBUF \com_din_IBUF[39]_inst + (.I(com_din[39]), + .O(com_din_IBUF[39])); + IBUF \com_din_IBUF[3]_inst + (.I(com_din[3]), + .O(com_din_IBUF[3])); + IBUF \com_din_IBUF[40]_inst + (.I(com_din[40]), + .O(com_din_IBUF[40])); + IBUF \com_din_IBUF[41]_inst + (.I(com_din[41]), + .O(com_din_IBUF[41])); + IBUF \com_din_IBUF[42]_inst + (.I(com_din[42]), + .O(com_din_IBUF[42])); + IBUF \com_din_IBUF[43]_inst + (.I(com_din[43]), + .O(com_din_IBUF[43])); + IBUF \com_din_IBUF[44]_inst + (.I(com_din[44]), + .O(com_din_IBUF[44])); + IBUF \com_din_IBUF[45]_inst + (.I(com_din[45]), + .O(com_din_IBUF[45])); + IBUF \com_din_IBUF[46]_inst + (.I(com_din[46]), + .O(com_din_IBUF[46])); + IBUF \com_din_IBUF[47]_inst + (.I(com_din[47]), + .O(com_din_IBUF[47])); + IBUF \com_din_IBUF[48]_inst + (.I(com_din[48]), + .O(com_din_IBUF[48])); + IBUF \com_din_IBUF[49]_inst + (.I(com_din[49]), + .O(com_din_IBUF[49])); + IBUF \com_din_IBUF[4]_inst + (.I(com_din[4]), + .O(com_din_IBUF[4])); + IBUF \com_din_IBUF[50]_inst + (.I(com_din[50]), + .O(com_din_IBUF[50])); + IBUF \com_din_IBUF[51]_inst + (.I(com_din[51]), + .O(com_din_IBUF[51])); + IBUF \com_din_IBUF[52]_inst + (.I(com_din[52]), + .O(com_din_IBUF[52])); + IBUF \com_din_IBUF[53]_inst + (.I(com_din[53]), + .O(com_din_IBUF[53])); + IBUF \com_din_IBUF[54]_inst + (.I(com_din[54]), + .O(com_din_IBUF[54])); + IBUF \com_din_IBUF[55]_inst + (.I(com_din[55]), + .O(com_din_IBUF[55])); + IBUF \com_din_IBUF[56]_inst + (.I(com_din[56]), + .O(com_din_IBUF[56])); + IBUF \com_din_IBUF[57]_inst + (.I(com_din[57]), + .O(com_din_IBUF[57])); + IBUF \com_din_IBUF[58]_inst + (.I(com_din[58]), + .O(com_din_IBUF[58])); + IBUF \com_din_IBUF[59]_inst + (.I(com_din[59]), + .O(com_din_IBUF[59])); + IBUF \com_din_IBUF[5]_inst + (.I(com_din[5]), + .O(com_din_IBUF[5])); + IBUF \com_din_IBUF[60]_inst + (.I(com_din[60]), + .O(com_din_IBUF[60])); + IBUF \com_din_IBUF[61]_inst + (.I(com_din[61]), + .O(com_din_IBUF[61])); + IBUF \com_din_IBUF[62]_inst + (.I(com_din[62]), + .O(com_din_IBUF[62])); + IBUF \com_din_IBUF[63]_inst + (.I(com_din[63]), + .O(com_din_IBUF[63])); + IBUF \com_din_IBUF[64]_inst + (.I(com_din[64]), + .O(com_din_IBUF[64])); + IBUF \com_din_IBUF[65]_inst + (.I(com_din[65]), + .O(com_din_IBUF[65])); + IBUF \com_din_IBUF[66]_inst + (.I(com_din[66]), + .O(com_din_IBUF[66])); + IBUF \com_din_IBUF[67]_inst + (.I(com_din[67]), + .O(com_din_IBUF[67])); + IBUF \com_din_IBUF[68]_inst + (.I(com_din[68]), + .O(com_din_IBUF[68])); + IBUF \com_din_IBUF[69]_inst + (.I(com_din[69]), + .O(com_din_IBUF[69])); + IBUF \com_din_IBUF[6]_inst + (.I(com_din[6]), + .O(com_din_IBUF[6])); + IBUF \com_din_IBUF[70]_inst + (.I(com_din[70]), + .O(com_din_IBUF[70])); + IBUF \com_din_IBUF[71]_inst + (.I(com_din[71]), + .O(com_din_IBUF[71])); + IBUF \com_din_IBUF[72]_inst + (.I(com_din[72]), + .O(com_din_IBUF[72])); + IBUF \com_din_IBUF[73]_inst + (.I(com_din[73]), + .O(com_din_IBUF[73])); + IBUF \com_din_IBUF[74]_inst + (.I(com_din[74]), + .O(com_din_IBUF[74])); + IBUF \com_din_IBUF[75]_inst + (.I(com_din[75]), + .O(com_din_IBUF[75])); + IBUF \com_din_IBUF[76]_inst + (.I(com_din[76]), + .O(com_din_IBUF[76])); + IBUF \com_din_IBUF[77]_inst + (.I(com_din[77]), + .O(com_din_IBUF[77])); + IBUF \com_din_IBUF[78]_inst + (.I(com_din[78]), + .O(com_din_IBUF[78])); + IBUF \com_din_IBUF[79]_inst + (.I(com_din[79]), + .O(com_din_IBUF[79])); + IBUF \com_din_IBUF[7]_inst + (.I(com_din[7]), + .O(com_din_IBUF[7])); + IBUF \com_din_IBUF[80]_inst + (.I(com_din[80]), + .O(com_din_IBUF[80])); + IBUF \com_din_IBUF[81]_inst + (.I(com_din[81]), + .O(com_din_IBUF[81])); + IBUF \com_din_IBUF[82]_inst + (.I(com_din[82]), + .O(com_din_IBUF[82])); + IBUF \com_din_IBUF[83]_inst + (.I(com_din[83]), + .O(com_din_IBUF[83])); + IBUF \com_din_IBUF[84]_inst + (.I(com_din[84]), + .O(com_din_IBUF[84])); + IBUF \com_din_IBUF[85]_inst + (.I(com_din[85]), + .O(com_din_IBUF[85])); + IBUF \com_din_IBUF[86]_inst + (.I(com_din[86]), + .O(com_din_IBUF[86])); + IBUF \com_din_IBUF[87]_inst + (.I(com_din[87]), + .O(com_din_IBUF[87])); + IBUF \com_din_IBUF[88]_inst + (.I(com_din[88]), + .O(com_din_IBUF[88])); + IBUF \com_din_IBUF[89]_inst + (.I(com_din[89]), + .O(com_din_IBUF[89])); + IBUF \com_din_IBUF[8]_inst + (.I(com_din[8]), + .O(com_din_IBUF[8])); + IBUF \com_din_IBUF[90]_inst + (.I(com_din[90]), + .O(com_din_IBUF[90])); + IBUF \com_din_IBUF[91]_inst + (.I(com_din[91]), + .O(com_din_IBUF[91])); + IBUF \com_din_IBUF[92]_inst + (.I(com_din[92]), + .O(com_din_IBUF[92])); + IBUF \com_din_IBUF[93]_inst + (.I(com_din[93]), + .O(com_din_IBUF[93])); + IBUF \com_din_IBUF[94]_inst + (.I(com_din[94]), + .O(com_din_IBUF[94])); + IBUF \com_din_IBUF[95]_inst + (.I(com_din[95]), + .O(com_din_IBUF[95])); + IBUF \com_din_IBUF[96]_inst + (.I(com_din[96]), + .O(com_din_IBUF[96])); + IBUF \com_din_IBUF[97]_inst + (.I(com_din[97]), + .O(com_din_IBUF[97])); + IBUF \com_din_IBUF[98]_inst + (.I(com_din[98]), + .O(com_din_IBUF[98])); + IBUF \com_din_IBUF[99]_inst + (.I(com_din[99]), + .O(com_din_IBUF[99])); + IBUF \com_din_IBUF[9]_inst + (.I(com_din[9]), + .O(com_din_IBUF[9])); + OBUF com_din_ready_OBUF_inst + (.I(com_din_ready_OBUF), + .O(com_din_ready)); + LUT1 #( + .INIT(2'h1)) + com_din_ready_OBUF_inst_i_1 + (.I0(com_tx_fifo_almost_full), + .O(com_din_ready_OBUF)); + IBUF com_din_wr_en_IBUF_inst + (.I(com_din_wr_en), + .O(com_din_wr_en_IBUF)); + OBUF \com_dout_OBUF[0]_inst + (.I(com_dout_OBUF[0]), + .O(com_dout[0])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[0]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[0]), + .O(com_dout_OBUF[0])); + OBUF \com_dout_OBUF[10]_inst + (.I(com_dout_OBUF[10]), + .O(com_dout[10])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[10]_inst_i_1 + (.I0(com_rx_dout[10]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[10])); + OBUF \com_dout_OBUF[11]_inst + (.I(com_dout_OBUF[11]), + .O(com_dout[11])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[11]_inst_i_1 + (.I0(com_rx_dout[11]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[11])); + OBUF \com_dout_OBUF[12]_inst + (.I(com_dout_OBUF[12]), + .O(com_dout[12])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[12]_inst_i_1 + (.I0(com_rx_dout[12]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[12])); + OBUF \com_dout_OBUF[13]_inst + (.I(com_dout_OBUF[13]), + .O(com_dout[13])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[13]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[13]), + .O(com_dout_OBUF[13])); + OBUF \com_dout_OBUF[14]_inst + (.I(com_dout_OBUF[14]), + .O(com_dout[14])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[14]_inst_i_1 + (.I0(com_rx_dout[14]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[14])); + OBUF \com_dout_OBUF[15]_inst + (.I(com_dout_OBUF[15]), + .O(com_dout[15])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[15]_inst_i_1 + (.I0(com_rx_dout[15]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[15])); + OBUF \com_dout_OBUF[16]_inst + (.I(com_dout_OBUF[16]), + .O(com_dout[16])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[16]_inst_i_1 + (.I0(com_rx_dout[16]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[16])); + OBUF \com_dout_OBUF[17]_inst + (.I(com_dout_OBUF[17]), + .O(com_dout[17])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[17]_inst_i_1 + (.I0(com_rx_dout[17]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[17])); + OBUF \com_dout_OBUF[18]_inst + (.I(com_dout_OBUF[18]), + .O(com_dout[18])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[18]_inst_i_1 + (.I0(com_rx_dout[18]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[18])); + OBUF \com_dout_OBUF[19]_inst + (.I(com_dout_OBUF[19]), + .O(com_dout[19])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[19]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[19]), + .O(com_dout_OBUF[19])); + OBUF \com_dout_OBUF[1]_inst + (.I(com_dout_OBUF[1]), + .O(com_dout[1])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[1]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[1]), + .O(com_dout_OBUF[1])); + OBUF \com_dout_OBUF[20]_inst + (.I(com_dout_OBUF[20]), + .O(com_dout[20])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[20]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[20]), + .O(com_dout_OBUF[20])); + OBUF \com_dout_OBUF[21]_inst + (.I(com_dout_OBUF[21]), + .O(com_dout[21])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[21]_inst_i_1 + (.I0(com_rx_dout[21]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[21])); + OBUF \com_dout_OBUF[22]_inst + (.I(com_dout_OBUF[22]), + .O(com_dout[22])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[22]_inst_i_1 + (.I0(com_rx_dout[22]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[22])); + OBUF \com_dout_OBUF[23]_inst + (.I(com_dout_OBUF[23]), + .O(com_dout[23])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[23]_inst_i_1 + (.I0(com_rx_dout[23]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[23])); + OBUF \com_dout_OBUF[24]_inst + (.I(com_dout_OBUF[24]), + .O(com_dout[24])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[24]_inst_i_1 + (.I0(com_rx_dout[24]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[24])); + OBUF \com_dout_OBUF[25]_inst + (.I(com_dout_OBUF[25]), + .O(com_dout[25])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[25]_inst_i_1 + (.I0(com_rx_dout[25]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[25])); + OBUF \com_dout_OBUF[26]_inst + (.I(com_dout_OBUF[26]), + .O(com_dout[26])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[26]_inst_i_1 + (.I0(com_rx_dout[26]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[26])); + OBUF \com_dout_OBUF[27]_inst + (.I(com_dout_OBUF[27]), + .O(com_dout[27])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[27]_inst_i_1 + (.I0(com_rx_dout[27]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[27])); + OBUF \com_dout_OBUF[28]_inst + (.I(com_dout_OBUF[28]), + .O(com_dout[28])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[28]_inst_i_1 + (.I0(com_rx_dout[28]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[28])); + OBUF \com_dout_OBUF[29]_inst + (.I(com_dout_OBUF[29]), + .O(com_dout[29])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[29]_inst_i_1 + (.I0(com_rx_dout[29]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[29])); + OBUF \com_dout_OBUF[2]_inst + (.I(com_dout_OBUF[2]), + .O(com_dout[2])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[2]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[2]), + .O(com_dout_OBUF[2])); + OBUF \com_dout_OBUF[30]_inst + (.I(com_dout_OBUF[30]), + .O(com_dout[30])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[30]_inst_i_1 + (.I0(com_rx_dout[30]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[30])); + OBUF \com_dout_OBUF[31]_inst + (.I(com_dout_OBUF[31]), + .O(com_dout[31])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[31]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[31]), + .O(com_dout_OBUF[31])); + OBUF \com_dout_OBUF[32]_inst + (.I(com_dout_OBUF[32]), + .O(com_dout[32])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[32]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[32]), + .O(com_dout_OBUF[32])); + OBUF \com_dout_OBUF[33]_inst + (.I(com_dout_OBUF[33]), + .O(com_dout[33])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[33]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[33]), + .O(com_dout_OBUF[33])); + OBUF \com_dout_OBUF[34]_inst + (.I(com_dout_OBUF[34]), + .O(com_dout[34])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[34]_inst_i_1 + (.I0(com_rx_dout[34]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[34])); + OBUF \com_dout_OBUF[35]_inst + (.I(com_dout_OBUF[35]), + .O(com_dout[35])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[35]_inst_i_1 + (.I0(com_rx_dout[35]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[35])); + OBUF \com_dout_OBUF[36]_inst + (.I(com_dout_OBUF[36]), + .O(com_dout[36])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[36]_inst_i_1 + (.I0(com_rx_dout[36]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[36])); + OBUF \com_dout_OBUF[37]_inst + (.I(com_dout_OBUF[37]), + .O(com_dout[37])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[37]_inst_i_1 + (.I0(com_rx_dout[37]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[37])); + OBUF \com_dout_OBUF[38]_inst + (.I(com_dout_OBUF[38]), + .O(com_dout[38])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[38]_inst_i_1 + (.I0(com_rx_dout[38]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[38])); + OBUF \com_dout_OBUF[39]_inst + (.I(com_dout_OBUF[39]), + .O(com_dout[39])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[39]_inst_i_1 + (.I0(com_rx_dout[39]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[39])); + OBUF \com_dout_OBUF[3]_inst + (.I(com_dout_OBUF[3]), + .O(com_dout[3])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[3]_inst_i_1 + (.I0(com_rx_dout[3]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[3])); + OBUF \com_dout_OBUF[40]_inst + (.I(com_dout_OBUF[40]), + .O(com_dout[40])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[40]_inst_i_1 + (.I0(com_rx_dout[40]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[40])); + OBUF \com_dout_OBUF[41]_inst + (.I(com_dout_OBUF[41]), + .O(com_dout[41])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[41]_inst_i_1 + (.I0(com_rx_dout[41]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[41])); + OBUF \com_dout_OBUF[42]_inst + (.I(com_dout_OBUF[42]), + .O(com_dout[42])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[42]_inst_i_1 + (.I0(com_rx_dout[42]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[42])); + OBUF \com_dout_OBUF[43]_inst + (.I(com_dout_OBUF[43]), + .O(com_dout[43])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[43]_inst_i_1 + (.I0(com_rx_dout[43]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[43])); + OBUF \com_dout_OBUF[44]_inst + (.I(com_dout_OBUF[44]), + .O(com_dout[44])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[44]_inst_i_1 + (.I0(com_rx_dout[44]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[44])); + OBUF \com_dout_OBUF[45]_inst + (.I(com_dout_OBUF[45]), + .O(com_dout[45])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[45]_inst_i_1 + (.I0(com_rx_dout[45]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[45])); + OBUF \com_dout_OBUF[46]_inst + (.I(com_dout_OBUF[46]), + .O(com_dout[46])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[46]_inst_i_1 + (.I0(com_rx_dout[46]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[46])); + OBUF \com_dout_OBUF[47]_inst + (.I(com_dout_OBUF[47]), + .O(com_dout[47])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[47]_inst_i_1 + (.I0(com_rx_dout[47]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[47])); + OBUF \com_dout_OBUF[48]_inst + (.I(com_dout_OBUF[48]), + .O(com_dout[48])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[48]_inst_i_1 + (.I0(com_rx_dout[48]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[48])); + OBUF \com_dout_OBUF[49]_inst + (.I(com_dout_OBUF[49]), + .O(com_dout[49])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[49]_inst_i_1 + (.I0(com_rx_dout[49]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[49])); + OBUF \com_dout_OBUF[4]_inst + (.I(com_dout_OBUF[4]), + .O(com_dout[4])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[4]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[4]), + .O(com_dout_OBUF[4])); + OBUF \com_dout_OBUF[50]_inst + (.I(com_dout_OBUF[50]), + .O(com_dout[50])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[50]_inst_i_1 + (.I0(com_rx_dout[50]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[50])); + OBUF \com_dout_OBUF[51]_inst + (.I(com_dout_OBUF[51]), + .O(com_dout[51])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[51]_inst_i_1 + (.I0(com_rx_dout[51]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[51])); + OBUF \com_dout_OBUF[52]_inst + (.I(com_dout_OBUF[52]), + .O(com_dout[52])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[52]_inst_i_1 + (.I0(com_rx_dout[52]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[52])); + OBUF \com_dout_OBUF[53]_inst + (.I(com_dout_OBUF[53]), + .O(com_dout[53])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[53]_inst_i_1 + (.I0(com_rx_dout[53]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[53])); + OBUF \com_dout_OBUF[54]_inst + (.I(com_dout_OBUF[54]), + .O(com_dout[54])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[54]_inst_i_1 + (.I0(com_rx_dout[54]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[54])); + OBUF \com_dout_OBUF[55]_inst + (.I(com_dout_OBUF[55]), + .O(com_dout[55])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[55]_inst_i_1 + (.I0(com_rx_dout[55]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[55])); + OBUF \com_dout_OBUF[56]_inst + (.I(com_dout_OBUF[56]), + .O(com_dout[56])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[56]_inst_i_1 + (.I0(com_rx_dout[56]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[56])); + OBUF \com_dout_OBUF[57]_inst + (.I(com_dout_OBUF[57]), + .O(com_dout[57])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[57]_inst_i_1 + (.I0(com_rx_dout[57]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[57])); + OBUF \com_dout_OBUF[58]_inst + (.I(com_dout_OBUF[58]), + .O(com_dout[58])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[58]_inst_i_1 + (.I0(com_rx_dout[58]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[58])); + OBUF \com_dout_OBUF[59]_inst + (.I(com_dout_OBUF[59]), + .O(com_dout[59])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[59]_inst_i_1 + (.I0(com_rx_dout[59]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[59])); + OBUF \com_dout_OBUF[5]_inst + (.I(com_dout_OBUF[5]), + .O(com_dout[5])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[5]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[5]), + .O(com_dout_OBUF[5])); + OBUF \com_dout_OBUF[60]_inst + (.I(com_dout_OBUF[60]), + .O(com_dout[60])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[60]_inst_i_1 + (.I0(com_rx_dout[60]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[60])); + OBUF \com_dout_OBUF[61]_inst + (.I(com_dout_OBUF[61]), + .O(com_dout[61])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[61]_inst_i_1 + (.I0(com_rx_dout[61]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[61])); + OBUF \com_dout_OBUF[62]_inst + (.I(com_dout_OBUF[62]), + .O(com_dout[62])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[62]_inst_i_1 + (.I0(com_rx_dout[62]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[62])); + OBUF \com_dout_OBUF[63]_inst + (.I(com_dout_OBUF[63]), + .O(com_dout[63])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[63]_inst_i_1 + (.I0(com_rx_dout[63]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[63])); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_10 + (.I0(\tickcount64_reg_n_0_[62] ), + .I1(\tickcount64_reg_n_0_[63] ), + .O(\com_dout_OBUF[63]_inst_i_10_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_100 + (.I0(\tickcount64_reg_n_0_[10] ), + .I1(\tickcount64_reg_n_0_[11] ), + .O(\com_dout_OBUF[63]_inst_i_100_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_101 + (.I0(\tickcount64_reg_n_0_[8] ), + .I1(\tickcount64_reg_n_0_[9] ), + .O(\com_dout_OBUF[63]_inst_i_101_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_102 + (.I0(\tickcount64_reg_n_0_[4] ), + .I1(\tickcount64_reg_n_0_[5] ), + .O(\com_dout_OBUF[63]_inst_i_102_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_103 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\tickcount64_reg_n_0_[3] ), + .O(\com_dout_OBUF[63]_inst_i_103_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_104 + (.I0(\tickcount64_reg_n_0_[0] ), + .I1(\tickcount64_reg_n_0_[1] ), + .O(\com_dout_OBUF[63]_inst_i_104_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_105 + (.I0(\tickcount64_reg_n_0_[6] ), + .I1(\tickcount64_reg_n_0_[7] ), + .O(\com_dout_OBUF[63]_inst_i_105_n_0 )); + LUT2 #( + .INIT(4'h2)) + \com_dout_OBUF[63]_inst_i_106 + (.I0(\tickcount64_reg_n_0_[4] ), + .I1(\tickcount64_reg_n_0_[5] ), + .O(\com_dout_OBUF[63]_inst_i_106_n_0 )); + LUT2 #( + .INIT(4'h2)) + \com_dout_OBUF[63]_inst_i_107 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\tickcount64_reg_n_0_[3] ), + .O(\com_dout_OBUF[63]_inst_i_107_n_0 )); + LUT2 #( + .INIT(4'h2)) + \com_dout_OBUF[63]_inst_i_108 + (.I0(\tickcount64_reg_n_0_[0] ), + .I1(\tickcount64_reg_n_0_[1] ), + .O(\com_dout_OBUF[63]_inst_i_108_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_109 + (.I0(\tickcount64_reg_n_0_[6] ), + .I1(\tickcount64_reg_n_0_[7] ), + .O(\com_dout_OBUF[63]_inst_i_109_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_11 + (.I0(\tickcount64_reg_n_0_[60] ), + .I1(\tickcount64_reg_n_0_[61] ), + .O(\com_dout_OBUF[63]_inst_i_11_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_110 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\tickcount64_reg_n_0_[3] ), + .O(\com_dout_OBUF[63]_inst_i_110_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_111 + (.I0(\tickcount64_reg_n_0_[0] ), + .I1(\tickcount64_reg_n_0_[1] ), + .O(\com_dout_OBUF[63]_inst_i_111_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_112 + (.I0(\tickcount64_reg_n_0_[6] ), + .I1(\tickcount64_reg_n_0_[7] ), + .O(\com_dout_OBUF[63]_inst_i_112_n_0 )); + LUT2 #( + .INIT(4'h2)) + \com_dout_OBUF[63]_inst_i_113 + (.I0(\tickcount64_reg_n_0_[4] ), + .I1(\tickcount64_reg_n_0_[5] ), + .O(\com_dout_OBUF[63]_inst_i_113_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_114 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\tickcount64_reg_n_0_[3] ), + .O(\com_dout_OBUF[63]_inst_i_114_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_115 + (.I0(\tickcount64_reg_n_0_[0] ), + .I1(\tickcount64_reg_n_0_[1] ), + .O(\com_dout_OBUF[63]_inst_i_115_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_12 + (.I0(\tickcount64_reg_n_0_[58] ), + .I1(\tickcount64_reg_n_0_[59] ), + .O(\com_dout_OBUF[63]_inst_i_12_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_13 + (.I0(\tickcount64_reg_n_0_[56] ), + .I1(\tickcount64_reg_n_0_[57] ), + .O(\com_dout_OBUF[63]_inst_i_13_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_14 + (.I0(\tickcount64_reg_n_0_[62] ), + .I1(\tickcount64_reg_n_0_[63] ), + .O(\com_dout_OBUF[63]_inst_i_14_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_15 + (.I0(\tickcount64_reg_n_0_[60] ), + .I1(\tickcount64_reg_n_0_[61] ), + .O(\com_dout_OBUF[63]_inst_i_15_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_16 + (.I0(\tickcount64_reg_n_0_[58] ), + .I1(\tickcount64_reg_n_0_[59] ), + .O(\com_dout_OBUF[63]_inst_i_16_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_17 + (.I0(\tickcount64_reg_n_0_[56] ), + .I1(\tickcount64_reg_n_0_[57] ), + .O(\com_dout_OBUF[63]_inst_i_17_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_18 + (.CI(\com_dout_OBUF[63]_inst_i_32_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_18_n_0 ,\com_dout_OBUF[63]_inst_i_18_n_1 ,\com_dout_OBUF[63]_inst_i_18_n_2 ,\com_dout_OBUF[63]_inst_i_18_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .S({\com_dout_OBUF[63]_inst_i_33_n_0 ,\com_dout_OBUF[63]_inst_i_34_n_0 ,\com_dout_OBUF[63]_inst_i_35_n_0 ,\com_dout_OBUF[63]_inst_i_36_n_0 })); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_19 + (.I0(\tickcount64_reg_n_0_[54] ), + .I1(\tickcount64_reg_n_0_[55] ), + .O(\com_dout_OBUF[63]_inst_i_19_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_2 + (.CI(\com_dout_OBUF[63]_inst_i_4_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_2_n_0 ,\com_dout_OBUF[63]_inst_i_2_n_1 ,\com_dout_OBUF[63]_inst_i_2_n_2 ,\com_dout_OBUF[63]_inst_i_2_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .S({\com_dout_OBUF[63]_inst_i_5_n_0 ,\com_dout_OBUF[63]_inst_i_6_n_0 ,\com_dout_OBUF[63]_inst_i_7_n_0 ,\com_dout_OBUF[63]_inst_i_8_n_0 })); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_20 + (.I0(\tickcount64_reg_n_0_[52] ), + .I1(\tickcount64_reg_n_0_[53] ), + .O(\com_dout_OBUF[63]_inst_i_20_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_21 + (.I0(\tickcount64_reg_n_0_[50] ), + .I1(\tickcount64_reg_n_0_[51] ), + .O(\com_dout_OBUF[63]_inst_i_21_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_22 + (.I0(\tickcount64_reg_n_0_[48] ), + .I1(\tickcount64_reg_n_0_[49] ), + .O(\com_dout_OBUF[63]_inst_i_22_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_23 + (.CI(\com_dout_OBUF[63]_inst_i_37_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_23_n_0 ,\com_dout_OBUF[63]_inst_i_23_n_1 ,\com_dout_OBUF[63]_inst_i_23_n_2 ,\com_dout_OBUF[63]_inst_i_23_n_3 }), + .CYINIT(\ ), + .DI({\com_dout_OBUF[63]_inst_i_38_n_0 ,\com_dout_OBUF[63]_inst_i_39_n_0 ,\com_dout_OBUF[63]_inst_i_40_n_0 ,\com_dout_OBUF[63]_inst_i_41_n_0 }), + .S({\com_dout_OBUF[63]_inst_i_42_n_0 ,\com_dout_OBUF[63]_inst_i_43_n_0 ,\com_dout_OBUF[63]_inst_i_44_n_0 ,\com_dout_OBUF[63]_inst_i_45_n_0 })); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_24 + (.I0(\tickcount64_reg_n_0_[54] ), + .I1(\tickcount64_reg_n_0_[55] ), + .O(\com_dout_OBUF[63]_inst_i_24_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_25 + (.I0(\tickcount64_reg_n_0_[52] ), + .I1(\tickcount64_reg_n_0_[53] ), + .O(\com_dout_OBUF[63]_inst_i_25_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_26 + (.I0(\tickcount64_reg_n_0_[50] ), + .I1(\tickcount64_reg_n_0_[51] ), + .O(\com_dout_OBUF[63]_inst_i_26_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_27 + (.I0(\tickcount64_reg_n_0_[48] ), + .I1(\tickcount64_reg_n_0_[49] ), + .O(\com_dout_OBUF[63]_inst_i_27_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_28 + (.I0(\tickcount64_reg_n_0_[54] ), + .I1(\tickcount64_reg_n_0_[55] ), + .O(\com_dout_OBUF[63]_inst_i_28_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_29 + (.I0(\tickcount64_reg_n_0_[52] ), + .I1(\tickcount64_reg_n_0_[53] ), + .O(\com_dout_OBUF[63]_inst_i_29_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_3 + (.CI(\com_dout_OBUF[63]_inst_i_9_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_3_n_0 ,\com_dout_OBUF[63]_inst_i_3_n_1 ,\com_dout_OBUF[63]_inst_i_3_n_2 ,\com_dout_OBUF[63]_inst_i_3_n_3 }), + .CYINIT(\ ), + .DI({\com_dout_OBUF[63]_inst_i_10_n_0 ,\com_dout_OBUF[63]_inst_i_11_n_0 ,\com_dout_OBUF[63]_inst_i_12_n_0 ,\com_dout_OBUF[63]_inst_i_13_n_0 }), + .S({\com_dout_OBUF[63]_inst_i_14_n_0 ,\com_dout_OBUF[63]_inst_i_15_n_0 ,\com_dout_OBUF[63]_inst_i_16_n_0 ,\com_dout_OBUF[63]_inst_i_17_n_0 })); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_30 + (.I0(\tickcount64_reg_n_0_[50] ), + .I1(\tickcount64_reg_n_0_[51] ), + .O(\com_dout_OBUF[63]_inst_i_30_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_31 + (.I0(\tickcount64_reg_n_0_[48] ), + .I1(\tickcount64_reg_n_0_[49] ), + .O(\com_dout_OBUF[63]_inst_i_31_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_32 + (.CI(\com_dout_OBUF[63]_inst_i_46_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_32_n_0 ,\com_dout_OBUF[63]_inst_i_32_n_1 ,\com_dout_OBUF[63]_inst_i_32_n_2 ,\com_dout_OBUF[63]_inst_i_32_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .S({\com_dout_OBUF[63]_inst_i_47_n_0 ,\com_dout_OBUF[63]_inst_i_48_n_0 ,\com_dout_OBUF[63]_inst_i_49_n_0 ,\com_dout_OBUF[63]_inst_i_50_n_0 })); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_33 + (.I0(\tickcount64_reg_n_0_[46] ), + .I1(\tickcount64_reg_n_0_[47] ), + .O(\com_dout_OBUF[63]_inst_i_33_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_34 + (.I0(\tickcount64_reg_n_0_[44] ), + .I1(\tickcount64_reg_n_0_[45] ), + .O(\com_dout_OBUF[63]_inst_i_34_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_35 + (.I0(\tickcount64_reg_n_0_[42] ), + .I1(\tickcount64_reg_n_0_[43] ), + .O(\com_dout_OBUF[63]_inst_i_35_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_36 + (.I0(\tickcount64_reg_n_0_[40] ), + .I1(\tickcount64_reg_n_0_[41] ), + .O(\com_dout_OBUF[63]_inst_i_36_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_37 + (.CI(\com_dout_OBUF[63]_inst_i_51_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_37_n_0 ,\com_dout_OBUF[63]_inst_i_37_n_1 ,\com_dout_OBUF[63]_inst_i_37_n_2 ,\com_dout_OBUF[63]_inst_i_37_n_3 }), + .CYINIT(\ ), + .DI({\com_dout_OBUF[63]_inst_i_52_n_0 ,\com_dout_OBUF[63]_inst_i_53_n_0 ,\com_dout_OBUF[63]_inst_i_54_n_0 ,\com_dout_OBUF[63]_inst_i_55_n_0 }), + .S({\com_dout_OBUF[63]_inst_i_56_n_0 ,\com_dout_OBUF[63]_inst_i_57_n_0 ,\com_dout_OBUF[63]_inst_i_58_n_0 ,\com_dout_OBUF[63]_inst_i_59_n_0 })); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_38 + (.I0(\tickcount64_reg_n_0_[46] ), + .I1(\tickcount64_reg_n_0_[47] ), + .O(\com_dout_OBUF[63]_inst_i_38_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_39 + (.I0(\tickcount64_reg_n_0_[44] ), + .I1(\tickcount64_reg_n_0_[45] ), + .O(\com_dout_OBUF[63]_inst_i_39_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_4 + (.CI(\com_dout_OBUF[63]_inst_i_18_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_4_n_0 ,\com_dout_OBUF[63]_inst_i_4_n_1 ,\com_dout_OBUF[63]_inst_i_4_n_2 ,\com_dout_OBUF[63]_inst_i_4_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .S({\com_dout_OBUF[63]_inst_i_19_n_0 ,\com_dout_OBUF[63]_inst_i_20_n_0 ,\com_dout_OBUF[63]_inst_i_21_n_0 ,\com_dout_OBUF[63]_inst_i_22_n_0 })); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_40 + (.I0(\tickcount64_reg_n_0_[42] ), + .I1(\tickcount64_reg_n_0_[43] ), + .O(\com_dout_OBUF[63]_inst_i_40_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_41 + (.I0(\tickcount64_reg_n_0_[40] ), + .I1(\tickcount64_reg_n_0_[41] ), + .O(\com_dout_OBUF[63]_inst_i_41_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_42 + (.I0(\tickcount64_reg_n_0_[46] ), + .I1(\tickcount64_reg_n_0_[47] ), + .O(\com_dout_OBUF[63]_inst_i_42_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_43 + (.I0(\tickcount64_reg_n_0_[44] ), + .I1(\tickcount64_reg_n_0_[45] ), + .O(\com_dout_OBUF[63]_inst_i_43_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_44 + (.I0(\tickcount64_reg_n_0_[42] ), + .I1(\tickcount64_reg_n_0_[43] ), + .O(\com_dout_OBUF[63]_inst_i_44_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_45 + (.I0(\tickcount64_reg_n_0_[40] ), + .I1(\tickcount64_reg_n_0_[41] ), + .O(\com_dout_OBUF[63]_inst_i_45_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_46 + (.CI(\com_dout_OBUF[63]_inst_i_60_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_46_n_0 ,\com_dout_OBUF[63]_inst_i_46_n_1 ,\com_dout_OBUF[63]_inst_i_46_n_2 ,\com_dout_OBUF[63]_inst_i_46_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .S({\com_dout_OBUF[63]_inst_i_61_n_0 ,\com_dout_OBUF[63]_inst_i_62_n_0 ,\com_dout_OBUF[63]_inst_i_63_n_0 ,\com_dout_OBUF[63]_inst_i_64_n_0 })); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_47 + (.I0(\tickcount64_reg_n_0_[38] ), + .I1(\tickcount64_reg_n_0_[39] ), + .O(\com_dout_OBUF[63]_inst_i_47_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_48 + (.I0(\tickcount64_reg_n_0_[36] ), + .I1(\tickcount64_reg_n_0_[37] ), + .O(\com_dout_OBUF[63]_inst_i_48_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_49 + (.I0(\tickcount64_reg_n_0_[34] ), + .I1(\tickcount64_reg_n_0_[35] ), + .O(\com_dout_OBUF[63]_inst_i_49_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_5 + (.I0(\tickcount64_reg_n_0_[62] ), + .I1(\tickcount64_reg_n_0_[63] ), + .O(\com_dout_OBUF[63]_inst_i_5_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_50 + (.I0(\tickcount64_reg_n_0_[32] ), + .I1(\tickcount64_reg_n_0_[33] ), + .O(\com_dout_OBUF[63]_inst_i_50_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_51 + (.CI(\com_dout_OBUF[63]_inst_i_65_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_51_n_0 ,\com_dout_OBUF[63]_inst_i_51_n_1 ,\com_dout_OBUF[63]_inst_i_51_n_2 ,\com_dout_OBUF[63]_inst_i_51_n_3 }), + .CYINIT(\ ), + .DI({\com_dout_OBUF[63]_inst_i_66_n_0 ,\com_dout_OBUF[63]_inst_i_67_n_0 ,\com_dout_OBUF[63]_inst_i_68_n_0 ,\com_dout_OBUF[63]_inst_i_69_n_0 }), + .S({\com_dout_OBUF[63]_inst_i_70_n_0 ,\com_dout_OBUF[63]_inst_i_71_n_0 ,\com_dout_OBUF[63]_inst_i_72_n_0 ,\com_dout_OBUF[63]_inst_i_73_n_0 })); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_52 + (.I0(\tickcount64_reg_n_0_[38] ), + .I1(\tickcount64_reg_n_0_[39] ), + .O(\com_dout_OBUF[63]_inst_i_52_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_53 + (.I0(\tickcount64_reg_n_0_[36] ), + .I1(\tickcount64_reg_n_0_[37] ), + .O(\com_dout_OBUF[63]_inst_i_53_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_54 + (.I0(\tickcount64_reg_n_0_[34] ), + .I1(\tickcount64_reg_n_0_[35] ), + .O(\com_dout_OBUF[63]_inst_i_54_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_55 + (.I0(\tickcount64_reg_n_0_[32] ), + .I1(\tickcount64_reg_n_0_[33] ), + .O(\com_dout_OBUF[63]_inst_i_55_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_56 + (.I0(\tickcount64_reg_n_0_[38] ), + .I1(\tickcount64_reg_n_0_[39] ), + .O(\com_dout_OBUF[63]_inst_i_56_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_57 + (.I0(\tickcount64_reg_n_0_[36] ), + .I1(\tickcount64_reg_n_0_[37] ), + .O(\com_dout_OBUF[63]_inst_i_57_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_58 + (.I0(\tickcount64_reg_n_0_[34] ), + .I1(\tickcount64_reg_n_0_[35] ), + .O(\com_dout_OBUF[63]_inst_i_58_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_59 + (.I0(\tickcount64_reg_n_0_[32] ), + .I1(\tickcount64_reg_n_0_[33] ), + .O(\com_dout_OBUF[63]_inst_i_59_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_6 + (.I0(\tickcount64_reg_n_0_[60] ), + .I1(\tickcount64_reg_n_0_[61] ), + .O(\com_dout_OBUF[63]_inst_i_6_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_60 + (.CI(\com_dout_OBUF[63]_inst_i_74_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_60_n_0 ,\com_dout_OBUF[63]_inst_i_60_n_1 ,\com_dout_OBUF[63]_inst_i_60_n_2 ,\com_dout_OBUF[63]_inst_i_60_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .S({\com_dout_OBUF[63]_inst_i_75_n_0 ,\com_dout_OBUF[63]_inst_i_76_n_0 ,\com_dout_OBUF[63]_inst_i_77_n_0 ,\com_dout_OBUF[63]_inst_i_78_n_0 })); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_61 + (.I0(\tickcount64_reg_n_0_[30] ), + .I1(\tickcount64_reg_n_0_[31] ), + .O(\com_dout_OBUF[63]_inst_i_61_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_62 + (.I0(\tickcount64_reg_n_0_[28] ), + .I1(\tickcount64_reg_n_0_[29] ), + .O(\com_dout_OBUF[63]_inst_i_62_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_63 + (.I0(\tickcount64_reg_n_0_[26] ), + .I1(\tickcount64_reg_n_0_[27] ), + .O(\com_dout_OBUF[63]_inst_i_63_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_64 + (.I0(\tickcount64_reg_n_0_[24] ), + .I1(\tickcount64_reg_n_0_[25] ), + .O(\com_dout_OBUF[63]_inst_i_64_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_65 + (.CI(\com_dout_OBUF[63]_inst_i_79_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_65_n_0 ,\com_dout_OBUF[63]_inst_i_65_n_1 ,\com_dout_OBUF[63]_inst_i_65_n_2 ,\com_dout_OBUF[63]_inst_i_65_n_3 }), + .CYINIT(\ ), + .DI({\com_dout_OBUF[63]_inst_i_80_n_0 ,\com_dout_OBUF[63]_inst_i_81_n_0 ,\com_dout_OBUF[63]_inst_i_82_n_0 ,\com_dout_OBUF[63]_inst_i_83_n_0 }), + .S({\com_dout_OBUF[63]_inst_i_84_n_0 ,\com_dout_OBUF[63]_inst_i_85_n_0 ,\com_dout_OBUF[63]_inst_i_86_n_0 ,\com_dout_OBUF[63]_inst_i_87_n_0 })); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_66 + (.I0(\tickcount64_reg_n_0_[30] ), + .I1(\tickcount64_reg_n_0_[31] ), + .O(\com_dout_OBUF[63]_inst_i_66_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_67 + (.I0(\tickcount64_reg_n_0_[28] ), + .I1(\tickcount64_reg_n_0_[29] ), + .O(\com_dout_OBUF[63]_inst_i_67_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_68 + (.I0(\tickcount64_reg_n_0_[26] ), + .I1(\tickcount64_reg_n_0_[27] ), + .O(\com_dout_OBUF[63]_inst_i_68_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_69 + (.I0(\tickcount64_reg_n_0_[24] ), + .I1(\tickcount64_reg_n_0_[25] ), + .O(\com_dout_OBUF[63]_inst_i_69_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_7 + (.I0(\tickcount64_reg_n_0_[58] ), + .I1(\tickcount64_reg_n_0_[59] ), + .O(\com_dout_OBUF[63]_inst_i_7_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_70 + (.I0(\tickcount64_reg_n_0_[30] ), + .I1(\tickcount64_reg_n_0_[31] ), + .O(\com_dout_OBUF[63]_inst_i_70_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_71 + (.I0(\tickcount64_reg_n_0_[28] ), + .I1(\tickcount64_reg_n_0_[29] ), + .O(\com_dout_OBUF[63]_inst_i_71_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_72 + (.I0(\tickcount64_reg_n_0_[26] ), + .I1(\tickcount64_reg_n_0_[27] ), + .O(\com_dout_OBUF[63]_inst_i_72_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_73 + (.I0(\tickcount64_reg_n_0_[24] ), + .I1(\tickcount64_reg_n_0_[25] ), + .O(\com_dout_OBUF[63]_inst_i_73_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_74 + (.CI(\com_dout_OBUF[63]_inst_i_88_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_74_n_0 ,\com_dout_OBUF[63]_inst_i_74_n_1 ,\com_dout_OBUF[63]_inst_i_74_n_2 ,\com_dout_OBUF[63]_inst_i_74_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .S({\com_dout_OBUF[63]_inst_i_89_n_0 ,\com_dout_OBUF[63]_inst_i_90_n_0 ,\com_dout_OBUF[63]_inst_i_91_n_0 ,\com_dout_OBUF[63]_inst_i_92_n_0 })); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_75 + (.I0(\tickcount64_reg_n_0_[22] ), + .I1(\tickcount64_reg_n_0_[23] ), + .O(\com_dout_OBUF[63]_inst_i_75_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_76 + (.I0(\tickcount64_reg_n_0_[20] ), + .I1(\tickcount64_reg_n_0_[21] ), + .O(\com_dout_OBUF[63]_inst_i_76_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_77 + (.I0(\tickcount64_reg_n_0_[18] ), + .I1(\tickcount64_reg_n_0_[19] ), + .O(\com_dout_OBUF[63]_inst_i_77_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_78 + (.I0(\tickcount64_reg_n_0_[16] ), + .I1(\tickcount64_reg_n_0_[17] ), + .O(\com_dout_OBUF[63]_inst_i_78_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_79 + (.CI(\com_dout_OBUF[63]_inst_i_93_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_79_n_0 ,\com_dout_OBUF[63]_inst_i_79_n_1 ,\com_dout_OBUF[63]_inst_i_79_n_2 ,\com_dout_OBUF[63]_inst_i_79_n_3 }), + .CYINIT(\ ), + .DI({\com_dout_OBUF[63]_inst_i_94_n_0 ,\com_dout_OBUF[63]_inst_i_95_n_0 ,\com_dout_OBUF[63]_inst_i_96_n_0 ,\com_dout_OBUF[63]_inst_i_97_n_0 }), + .S({\com_dout_OBUF[63]_inst_i_98_n_0 ,\com_dout_OBUF[63]_inst_i_99_n_0 ,\com_dout_OBUF[63]_inst_i_100_n_0 ,\com_dout_OBUF[63]_inst_i_101_n_0 })); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_8 + (.I0(\tickcount64_reg_n_0_[56] ), + .I1(\tickcount64_reg_n_0_[57] ), + .O(\com_dout_OBUF[63]_inst_i_8_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_80 + (.I0(\tickcount64_reg_n_0_[22] ), + .I1(\tickcount64_reg_n_0_[23] ), + .O(\com_dout_OBUF[63]_inst_i_80_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_81 + (.I0(\tickcount64_reg_n_0_[20] ), + .I1(\tickcount64_reg_n_0_[21] ), + .O(\com_dout_OBUF[63]_inst_i_81_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_82 + (.I0(\tickcount64_reg_n_0_[18] ), + .I1(\tickcount64_reg_n_0_[19] ), + .O(\com_dout_OBUF[63]_inst_i_82_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_83 + (.I0(\tickcount64_reg_n_0_[16] ), + .I1(\tickcount64_reg_n_0_[17] ), + .O(\com_dout_OBUF[63]_inst_i_83_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_84 + (.I0(\tickcount64_reg_n_0_[22] ), + .I1(\tickcount64_reg_n_0_[23] ), + .O(\com_dout_OBUF[63]_inst_i_84_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_85 + (.I0(\tickcount64_reg_n_0_[20] ), + .I1(\tickcount64_reg_n_0_[21] ), + .O(\com_dout_OBUF[63]_inst_i_85_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_86 + (.I0(\tickcount64_reg_n_0_[18] ), + .I1(\tickcount64_reg_n_0_[19] ), + .O(\com_dout_OBUF[63]_inst_i_86_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_87 + (.I0(\tickcount64_reg_n_0_[16] ), + .I1(\tickcount64_reg_n_0_[17] ), + .O(\com_dout_OBUF[63]_inst_i_87_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_88 + (.CI(\ ), + .CO({\com_dout_OBUF[63]_inst_i_88_n_0 ,\com_dout_OBUF[63]_inst_i_88_n_1 ,\com_dout_OBUF[63]_inst_i_88_n_2 ,\com_dout_OBUF[63]_inst_i_88_n_3 }), + .CYINIT(\ ), + .DI({\ ,\com_dout_OBUF[63]_inst_i_102_n_0 ,\com_dout_OBUF[63]_inst_i_103_n_0 ,\com_dout_OBUF[63]_inst_i_104_n_0 }), + .S({\com_dout_OBUF[63]_inst_i_105_n_0 ,\com_dout_OBUF[63]_inst_i_106_n_0 ,\com_dout_OBUF[63]_inst_i_107_n_0 ,\com_dout_OBUF[63]_inst_i_108_n_0 })); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_89 + (.I0(\tickcount64_reg_n_0_[14] ), + .I1(\tickcount64_reg_n_0_[15] ), + .O(\com_dout_OBUF[63]_inst_i_89_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_9 + (.CI(\com_dout_OBUF[63]_inst_i_23_n_0 ), + .CO({\com_dout_OBUF[63]_inst_i_9_n_0 ,\com_dout_OBUF[63]_inst_i_9_n_1 ,\com_dout_OBUF[63]_inst_i_9_n_2 ,\com_dout_OBUF[63]_inst_i_9_n_3 }), + .CYINIT(\ ), + .DI({\com_dout_OBUF[63]_inst_i_24_n_0 ,\com_dout_OBUF[63]_inst_i_25_n_0 ,\com_dout_OBUF[63]_inst_i_26_n_0 ,\com_dout_OBUF[63]_inst_i_27_n_0 }), + .S({\com_dout_OBUF[63]_inst_i_28_n_0 ,\com_dout_OBUF[63]_inst_i_29_n_0 ,\com_dout_OBUF[63]_inst_i_30_n_0 ,\com_dout_OBUF[63]_inst_i_31_n_0 })); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_90 + (.I0(\tickcount64_reg_n_0_[12] ), + .I1(\tickcount64_reg_n_0_[13] ), + .O(\com_dout_OBUF[63]_inst_i_90_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_91 + (.I0(\tickcount64_reg_n_0_[10] ), + .I1(\tickcount64_reg_n_0_[11] ), + .O(\com_dout_OBUF[63]_inst_i_91_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_92 + (.I0(\tickcount64_reg_n_0_[8] ), + .I1(\tickcount64_reg_n_0_[9] ), + .O(\com_dout_OBUF[63]_inst_i_92_n_0 )); + (* COMPARATOR_THRESHOLD = "11" *) + CARRY4 \com_dout_OBUF[63]_inst_i_93 + (.CI(\ ), + .CO({\com_dout_OBUF[63]_inst_i_93_n_0 ,\com_dout_OBUF[63]_inst_i_93_n_1 ,\com_dout_OBUF[63]_inst_i_93_n_2 ,\com_dout_OBUF[63]_inst_i_93_n_3 }), + .CYINIT(\ ), + .DI({\com_dout_OBUF[63]_inst_i_109_n_0 ,\tickcount64_reg_n_0_[5] ,\com_dout_OBUF[63]_inst_i_110_n_0 ,\com_dout_OBUF[63]_inst_i_111_n_0 }), + .S({\com_dout_OBUF[63]_inst_i_112_n_0 ,\com_dout_OBUF[63]_inst_i_113_n_0 ,\com_dout_OBUF[63]_inst_i_114_n_0 ,\com_dout_OBUF[63]_inst_i_115_n_0 })); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_94 + (.I0(\tickcount64_reg_n_0_[14] ), + .I1(\tickcount64_reg_n_0_[15] ), + .O(\com_dout_OBUF[63]_inst_i_94_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_95 + (.I0(\tickcount64_reg_n_0_[12] ), + .I1(\tickcount64_reg_n_0_[13] ), + .O(\com_dout_OBUF[63]_inst_i_95_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_96 + (.I0(\tickcount64_reg_n_0_[10] ), + .I1(\tickcount64_reg_n_0_[11] ), + .O(\com_dout_OBUF[63]_inst_i_96_n_0 )); + LUT2 #( + .INIT(4'hE)) + \com_dout_OBUF[63]_inst_i_97 + (.I0(\tickcount64_reg_n_0_[8] ), + .I1(\tickcount64_reg_n_0_[9] ), + .O(\com_dout_OBUF[63]_inst_i_97_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_98 + (.I0(\tickcount64_reg_n_0_[14] ), + .I1(\tickcount64_reg_n_0_[15] ), + .O(\com_dout_OBUF[63]_inst_i_98_n_0 )); + LUT2 #( + .INIT(4'h1)) + \com_dout_OBUF[63]_inst_i_99 + (.I0(\tickcount64_reg_n_0_[12] ), + .I1(\tickcount64_reg_n_0_[13] ), + .O(\com_dout_OBUF[63]_inst_i_99_n_0 )); + OBUF \com_dout_OBUF[6]_inst + (.I(com_dout_OBUF[6]), + .O(com_dout[6])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[6]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[6]), + .O(com_dout_OBUF[6])); + OBUF \com_dout_OBUF[7]_inst + (.I(com_dout_OBUF[7]), + .O(com_dout[7])); + LUT4 #( + .INIT(16'h8AAA)) + \com_dout_OBUF[7]_inst_i_1 + (.I0(com_rx_dout[7]), + .I1(rst_IBUF), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .O(com_dout_OBUF[7])); + OBUF \com_dout_OBUF[8]_inst + (.I(com_dout_OBUF[8]), + .O(com_dout[8])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[8]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[8]), + .O(com_dout_OBUF[8])); + OBUF \com_dout_OBUF[9]_inst + (.I(com_dout_OBUF[9]), + .O(com_dout[9])); + LUT5 #( + .INIT(32'hFFBF0080)) + \com_dout_OBUF[9]_inst_i_1 + (.I0(\tickcount64_reg_n_0_[2] ), + .I1(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I3(rst_IBUF), + .I4(com_rx_dout[9]), + .O(com_dout_OBUF[9])); + OBUF com_dout_valid_OBUF_inst + (.I(com_dout_valid_OBUF), + .O(com_dout_valid)); + LUT4 #( + .INIT(16'hFF40)) + com_dout_valid_OBUF_inst_i_1 + (.I0(rst_IBUF), + .I1(\com_dout_OBUF[63]_inst_i_2_n_0 ), + .I2(\com_dout_OBUF[63]_inst_i_3_n_0 ), + .I3(com_rx_valid), + .O(com_dout_valid_OBUF)); + (* IMPORTED_FROM = "c:/Projects/Razeny/fpga0_tbx4-sg2-3-nl/pcileech_tbx4/pcileech_tbx4.gen/sources_1/ip/ip8/ip8.dcp" *) + (* IMPORTED_TYPE = "CHECKPOINT" *) + (* IS_IMPORTED *) + (* x_core_info = "fifo_generator_v13_2_9,Vivado 2023.2" *) + ip8 i10 + (.almost_full(com_tx_fifo_almost_full), + .din(com_din_IBUF), + .dout(com_tx_data), + .rd_clk(clk_com_IBUF_BUFG), + .rd_en(i11_n_69), + .rst(rst_IBUF), + .valid(com_tx_valid), + .wr_clk(clk_IBUF_BUFG), + .wr_en(com_din_wr_en_IBUF)); + ip6 i11 + (.BUS_DI(BUS_DI), + .BUS_DI_68_sp_1(com_tx_valid), + .BUS_DI_PROG_FULL_IBUF(BUS_DI_PROG_FULL_IBUF), + .CLK(clk_com_IBUF_BUFG), + .out(com_tx_data), + .rd_en(i11_n_69), + .rst_IBUF(rst_IBUF)); + (* IMPORTED_FROM = "c:/Projects/Razeny/fpga0_tbx4-sg2-3-nl/pcileech_tbx4/pcileech_tbx4.gen/sources_1/ip/ip7/ip7.dcp" *) + (* IMPORTED_TYPE = "CHECKPOINT" *) + (* IS_IMPORTED *) + (* x_core_info = "fifo_generator_v13_2_9,Vivado 2023.2" *) + ip7 i12 + (.din(com_rx_data64), + .dout(com_rx_dout), + .rd_clk(clk_IBUF_BUFG), + .rd_en(\ ), + .rst(rst_IBUF), + .valid(com_rx_valid), + .wr_clk(clk_com_IBUF_BUFG), + .wr_en(com_rx_valid64)); + ip5 i13 + (.BUS_DO(BUS_DO), + .CLK(clk_com_IBUF_BUFG), + .Q(com_rx_data64), + .rst_IBUF(rst_IBUF), + .wr_en(com_rx_valid64)); + IBUF rst_IBUF_inst + (.I(rst), + .O(rst_IBUF)); + LUT1 #( + .INIT(2'h1)) + \tickcount64[0]_i_1 + (.I0(\tickcount64_reg_n_0_[0] ), + .O(p_0_in[0])); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[0] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[0]), + .Q(\tickcount64_reg_n_0_[0] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[10] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[10]), + .Q(\tickcount64_reg_n_0_[10] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[11] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[11]), + .Q(\tickcount64_reg_n_0_[11] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[12] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[12]), + .Q(\tickcount64_reg_n_0_[12] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[12]_i_1 + (.CI(\tickcount64_reg[8]_i_1_n_0 ), + .CO({\tickcount64_reg[12]_i_1_n_0 ,\tickcount64_reg[12]_i_1_n_1 ,\tickcount64_reg[12]_i_1_n_2 ,\tickcount64_reg[12]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[12:9]), + .S({\tickcount64_reg_n_0_[12] ,\tickcount64_reg_n_0_[11] ,\tickcount64_reg_n_0_[10] ,\tickcount64_reg_n_0_[9] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[13] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[13]), + .Q(\tickcount64_reg_n_0_[13] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[14] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[14]), + .Q(\tickcount64_reg_n_0_[14] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[15] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[15]), + .Q(\tickcount64_reg_n_0_[15] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[16] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[16]), + .Q(\tickcount64_reg_n_0_[16] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[16]_i_1 + (.CI(\tickcount64_reg[12]_i_1_n_0 ), + .CO({\tickcount64_reg[16]_i_1_n_0 ,\tickcount64_reg[16]_i_1_n_1 ,\tickcount64_reg[16]_i_1_n_2 ,\tickcount64_reg[16]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[16:13]), + .S({\tickcount64_reg_n_0_[16] ,\tickcount64_reg_n_0_[15] ,\tickcount64_reg_n_0_[14] ,\tickcount64_reg_n_0_[13] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[17] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[17]), + .Q(\tickcount64_reg_n_0_[17] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[18] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[18]), + .Q(\tickcount64_reg_n_0_[18] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[19] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[19]), + .Q(\tickcount64_reg_n_0_[19] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[1] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[1]), + .Q(\tickcount64_reg_n_0_[1] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[20] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[20]), + .Q(\tickcount64_reg_n_0_[20] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[20]_i_1 + (.CI(\tickcount64_reg[16]_i_1_n_0 ), + .CO({\tickcount64_reg[20]_i_1_n_0 ,\tickcount64_reg[20]_i_1_n_1 ,\tickcount64_reg[20]_i_1_n_2 ,\tickcount64_reg[20]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[20:17]), + .S({\tickcount64_reg_n_0_[20] ,\tickcount64_reg_n_0_[19] ,\tickcount64_reg_n_0_[18] ,\tickcount64_reg_n_0_[17] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[21] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[21]), + .Q(\tickcount64_reg_n_0_[21] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[22] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[22]), + .Q(\tickcount64_reg_n_0_[22] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[23] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[23]), + .Q(\tickcount64_reg_n_0_[23] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[24] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[24]), + .Q(\tickcount64_reg_n_0_[24] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[24]_i_1 + (.CI(\tickcount64_reg[20]_i_1_n_0 ), + .CO({\tickcount64_reg[24]_i_1_n_0 ,\tickcount64_reg[24]_i_1_n_1 ,\tickcount64_reg[24]_i_1_n_2 ,\tickcount64_reg[24]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[24:21]), + .S({\tickcount64_reg_n_0_[24] ,\tickcount64_reg_n_0_[23] ,\tickcount64_reg_n_0_[22] ,\tickcount64_reg_n_0_[21] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[25] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[25]), + .Q(\tickcount64_reg_n_0_[25] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[26] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[26]), + .Q(\tickcount64_reg_n_0_[26] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[27] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[27]), + .Q(\tickcount64_reg_n_0_[27] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[28] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[28]), + .Q(\tickcount64_reg_n_0_[28] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[28]_i_1 + (.CI(\tickcount64_reg[24]_i_1_n_0 ), + .CO({\tickcount64_reg[28]_i_1_n_0 ,\tickcount64_reg[28]_i_1_n_1 ,\tickcount64_reg[28]_i_1_n_2 ,\tickcount64_reg[28]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[28:25]), + .S({\tickcount64_reg_n_0_[28] ,\tickcount64_reg_n_0_[27] ,\tickcount64_reg_n_0_[26] ,\tickcount64_reg_n_0_[25] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[29] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[29]), + .Q(\tickcount64_reg_n_0_[29] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[2] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[2]), + .Q(\tickcount64_reg_n_0_[2] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[30] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[30]), + .Q(\tickcount64_reg_n_0_[30] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[31] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[31]), + .Q(\tickcount64_reg_n_0_[31] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[32] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[32]), + .Q(\tickcount64_reg_n_0_[32] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[32]_i_1 + (.CI(\tickcount64_reg[28]_i_1_n_0 ), + .CO({\tickcount64_reg[32]_i_1_n_0 ,\tickcount64_reg[32]_i_1_n_1 ,\tickcount64_reg[32]_i_1_n_2 ,\tickcount64_reg[32]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[32:29]), + .S({\tickcount64_reg_n_0_[32] ,\tickcount64_reg_n_0_[31] ,\tickcount64_reg_n_0_[30] ,\tickcount64_reg_n_0_[29] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[33] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[33]), + .Q(\tickcount64_reg_n_0_[33] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[34] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[34]), + .Q(\tickcount64_reg_n_0_[34] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[35] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[35]), + .Q(\tickcount64_reg_n_0_[35] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[36] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[36]), + .Q(\tickcount64_reg_n_0_[36] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[36]_i_1 + (.CI(\tickcount64_reg[32]_i_1_n_0 ), + .CO({\tickcount64_reg[36]_i_1_n_0 ,\tickcount64_reg[36]_i_1_n_1 ,\tickcount64_reg[36]_i_1_n_2 ,\tickcount64_reg[36]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[36:33]), + .S({\tickcount64_reg_n_0_[36] ,\tickcount64_reg_n_0_[35] ,\tickcount64_reg_n_0_[34] ,\tickcount64_reg_n_0_[33] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[37] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[37]), + .Q(\tickcount64_reg_n_0_[37] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[38] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[38]), + .Q(\tickcount64_reg_n_0_[38] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[39] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[39]), + .Q(\tickcount64_reg_n_0_[39] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[3] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[3]), + .Q(\tickcount64_reg_n_0_[3] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[40] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[40]), + .Q(\tickcount64_reg_n_0_[40] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[40]_i_1 + (.CI(\tickcount64_reg[36]_i_1_n_0 ), + .CO({\tickcount64_reg[40]_i_1_n_0 ,\tickcount64_reg[40]_i_1_n_1 ,\tickcount64_reg[40]_i_1_n_2 ,\tickcount64_reg[40]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[40:37]), + .S({\tickcount64_reg_n_0_[40] ,\tickcount64_reg_n_0_[39] ,\tickcount64_reg_n_0_[38] ,\tickcount64_reg_n_0_[37] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[41] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[41]), + .Q(\tickcount64_reg_n_0_[41] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[42] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[42]), + .Q(\tickcount64_reg_n_0_[42] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[43] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[43]), + .Q(\tickcount64_reg_n_0_[43] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[44] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[44]), + .Q(\tickcount64_reg_n_0_[44] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[44]_i_1 + (.CI(\tickcount64_reg[40]_i_1_n_0 ), + .CO({\tickcount64_reg[44]_i_1_n_0 ,\tickcount64_reg[44]_i_1_n_1 ,\tickcount64_reg[44]_i_1_n_2 ,\tickcount64_reg[44]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[44:41]), + .S({\tickcount64_reg_n_0_[44] ,\tickcount64_reg_n_0_[43] ,\tickcount64_reg_n_0_[42] ,\tickcount64_reg_n_0_[41] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[45] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[45]), + .Q(\tickcount64_reg_n_0_[45] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[46] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[46]), + .Q(\tickcount64_reg_n_0_[46] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[47] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[47]), + .Q(\tickcount64_reg_n_0_[47] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[48] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[48]), + .Q(\tickcount64_reg_n_0_[48] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[48]_i_1 + (.CI(\tickcount64_reg[44]_i_1_n_0 ), + .CO({\tickcount64_reg[48]_i_1_n_0 ,\tickcount64_reg[48]_i_1_n_1 ,\tickcount64_reg[48]_i_1_n_2 ,\tickcount64_reg[48]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[48:45]), + .S({\tickcount64_reg_n_0_[48] ,\tickcount64_reg_n_0_[47] ,\tickcount64_reg_n_0_[46] ,\tickcount64_reg_n_0_[45] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[49] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[49]), + .Q(\tickcount64_reg_n_0_[49] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[4] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[4]), + .Q(\tickcount64_reg_n_0_[4] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[4]_i_1 + (.CI(\ ), + .CO({\tickcount64_reg[4]_i_1_n_0 ,\tickcount64_reg[4]_i_1_n_1 ,\tickcount64_reg[4]_i_1_n_2 ,\tickcount64_reg[4]_i_1_n_3 }), + .CYINIT(\tickcount64_reg_n_0_[0] ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[4:1]), + .S({\tickcount64_reg_n_0_[4] ,\tickcount64_reg_n_0_[3] ,\tickcount64_reg_n_0_[2] ,\tickcount64_reg_n_0_[1] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[50] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[50]), + .Q(\tickcount64_reg_n_0_[50] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[51] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[51]), + .Q(\tickcount64_reg_n_0_[51] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[52] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[52]), + .Q(\tickcount64_reg_n_0_[52] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[52]_i_1 + (.CI(\tickcount64_reg[48]_i_1_n_0 ), + .CO({\tickcount64_reg[52]_i_1_n_0 ,\tickcount64_reg[52]_i_1_n_1 ,\tickcount64_reg[52]_i_1_n_2 ,\tickcount64_reg[52]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[52:49]), + .S({\tickcount64_reg_n_0_[52] ,\tickcount64_reg_n_0_[51] ,\tickcount64_reg_n_0_[50] ,\tickcount64_reg_n_0_[49] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[53] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[53]), + .Q(\tickcount64_reg_n_0_[53] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[54] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[54]), + .Q(\tickcount64_reg_n_0_[54] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[55] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[55]), + .Q(\tickcount64_reg_n_0_[55] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[56] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[56]), + .Q(\tickcount64_reg_n_0_[56] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[56]_i_1 + (.CI(\tickcount64_reg[52]_i_1_n_0 ), + .CO({\tickcount64_reg[56]_i_1_n_0 ,\tickcount64_reg[56]_i_1_n_1 ,\tickcount64_reg[56]_i_1_n_2 ,\tickcount64_reg[56]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[56:53]), + .S({\tickcount64_reg_n_0_[56] ,\tickcount64_reg_n_0_[55] ,\tickcount64_reg_n_0_[54] ,\tickcount64_reg_n_0_[53] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[57] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[57]), + .Q(\tickcount64_reg_n_0_[57] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[58] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[58]), + .Q(\tickcount64_reg_n_0_[58] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[59] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[59]), + .Q(\tickcount64_reg_n_0_[59] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[5] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[5]), + .Q(\tickcount64_reg_n_0_[5] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[60] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[60]), + .Q(\tickcount64_reg_n_0_[60] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[60]_i_1 + (.CI(\tickcount64_reg[56]_i_1_n_0 ), + .CO({\tickcount64_reg[60]_i_1_n_0 ,\tickcount64_reg[60]_i_1_n_1 ,\tickcount64_reg[60]_i_1_n_2 ,\tickcount64_reg[60]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[60:57]), + .S({\tickcount64_reg_n_0_[60] ,\tickcount64_reg_n_0_[59] ,\tickcount64_reg_n_0_[58] ,\tickcount64_reg_n_0_[57] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[61] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[61]), + .Q(\tickcount64_reg_n_0_[61] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[62] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[62]), + .Q(\tickcount64_reg_n_0_[62] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[63] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[63]), + .Q(\tickcount64_reg_n_0_[63] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[63]_i_1 + (.CI(\tickcount64_reg[60]_i_1_n_0 ), + .CO({\tickcount64_reg[63]_i_1_n_2 ,\tickcount64_reg[63]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[63:61]), + .S({\ ,\tickcount64_reg_n_0_[63] ,\tickcount64_reg_n_0_[62] ,\tickcount64_reg_n_0_[61] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[6] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[6]), + .Q(\tickcount64_reg_n_0_[6] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[7] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[7]), + .Q(\tickcount64_reg_n_0_[7] ), + .R(rst_IBUF)); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[8] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[8]), + .Q(\tickcount64_reg_n_0_[8] ), + .R(rst_IBUF)); + (* ADDER_THRESHOLD = "35" *) + CARRY4 \tickcount64_reg[8]_i_1 + (.CI(\tickcount64_reg[4]_i_1_n_0 ), + .CO({\tickcount64_reg[8]_i_1_n_0 ,\tickcount64_reg[8]_i_1_n_1 ,\tickcount64_reg[8]_i_1_n_2 ,\tickcount64_reg[8]_i_1_n_3 }), + .CYINIT(\ ), + .DI({\ ,\ ,\ ,\ }), + .O(p_0_in[8:5]), + .S({\tickcount64_reg_n_0_[8] ,\tickcount64_reg_n_0_[7] ,\tickcount64_reg_n_0_[6] ,\tickcount64_reg_n_0_[5] })); + FDRE #( + .INIT(1'b0)) + \tickcount64_reg[9] + (.C(clk_IBUF_BUFG), + .CE(\ ), + .D(p_0_in[9]), + .Q(\tickcount64_reg_n_0_[9] ), + .R(rst_IBUF)); +endmodule +`pragma protect begin_protected +`pragma protect version = 1 +`pragma protect encrypt_agent = "XILINX" +`pragma protect encrypt_agent_info = "Xilinx Encryption Tool 2023.2" +`pragma protect key_keyowner="Synopsys", key_keyname="SNPS-VCS-RSA-2", key_method="rsa" +`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=128) +`pragma protect key_block +gcDjvJ18gZEH8C+LHMq/N7AaYWSyHgvjIQn585rdUOTVX2orO9n8j6LNiga3BYkS91+lbHAjAieW +oD/8serz9uvKt9uVuyMIE6oOFFScZR6q2wQk1d1Qzq717+8yPCwgBT9HIhfJIHLujHt+cA2l2L5t +tux9aNBdVKkk1MHv7yY= + +`pragma protect key_keyowner="Aldec", key_keyname="ALDEC15_001", key_method="rsa" +`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256) +`pragma protect key_block +exhH3ieiewq538XhQByQWj7PMh1Y+pzdDw+4bALHgOXUMTZleYL0Pvhip/E5VwYBOb3/5i/ElWf3 +Vm6OeE9b1Jj8xb7x10akeyRaNdCJYAtTqgb7gFS/crjXeoaYKJgLqCiyaB7LdWR9BiZOWqxEPSxe +/lr/8F8psti0kra2jACCbz94iU3qDIdZWH5kqd21Pp2/YczWpJBQzh+bBz9V+EuMAeZIzY3x2GZy +jOMZPemqiqFhSEcDf09mKK3xKEUxE+TPz82hd9ZrF5OjFst6mWMVye10lkzmY5Hmmx5Y/PVgPx3R +fN0tTAZfIDGH/YUu758U8UWOIcMzBHF6rytqmg== + +`pragma protect key_keyowner="Mentor Graphics Corporation", key_keyname="MGC-VELOCE-RSA", key_method="rsa" +`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=128) +`pragma protect key_block +Umfm0FNxPKfdryB9QccnkcrzqkPtalTpE+R0M3D9kxaXOa1YOGT+9jGc1TRZMLcN5NyGN3UIZcH4 +LWFVfGg80k9RmFHBDZaHzOXaomQhoPSO++ArXvmvO5zgttfCHEl7jypYkuPgwfQMfjK7YII9Deex +KOC8JtqORVWmhq47cpQ= + +`pragma protect key_keyowner="Mentor Graphics Corporation", key_keyname="MGC-VERIF-SIM-RSA-2", key_method="rsa" +`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256) +`pragma protect key_block +cm7WeJnXtFlUdJuJH7wHYfinJTaBhpglyFWD2YwmOuS4fmVA4nXbX0IMaU1F1WGO1VK25KlFf8Nm +w8L6BJ6ZpH12xPIl3J17rMT4/3KHv9tpBWqeC080GeV5nISo8JrhOpIKa4+HBHZ6lYLce8LBAu/Z +EiBmDqw22aLsAuPAzAMh9yuHT5rpX9ykD9u0uZ5UplK05S0TsvYMUqcHNQ2hijt/lbxvUxXHTa+W +GJ5RRQAdw98wG1mc65u16hfZPsLimnw4BHwpyNGOPadShqb78rQihc+YiBTn4lgN1HhquWRGqCYZ +ZEjBmtWOJm8WJSTWtcpFEkmPlOTDmNX82e9mnw== + +`pragma protect key_keyowner="Real Intent", key_keyname="RI-RSA-KEY-1", key_method="rsa" +`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256) +`pragma protect key_block +a1mMNsEVIHwFCxw3sHygQ6eU3z5whgDQI+YHUmPAwU6q4vqfu2NVxu0z42QL1rV1rCsm39SqZ078 +EGEqt7XUt6bdvI3yu4dU8gF+jou5njJ2UU34VmbOw/MQt48Hmi+hxtH1/zSlbNe2iOksDFEFTHmW +WGHgPS2bACG/KtAZMYK3gBtbnb9dtu+p5hxiQtwMOFnv9kQGBxcMaciN0yqy2TE5fygwKcNEua29 +jiGUF0qgPS1k6qN+zLrYWkaVT0amR1MFXpv0WcwL+xVkxj6bBQhe5D7t5xCIsfLR4xqa5WVpa0dN +FkxGlIoufL17G/cGRr4nV4QP0sqcDCCHYpRoIA== + +`pragma protect key_keyowner="Xilinx", key_keyname="xilinxt_2022_10", key_method="rsa" +`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256) +`pragma protect key_block +rPFWI49JcHqYFxRrTG2uFixmE4jeIWIero9KijBFo7+FOCC7hJeSlCuNlwb8mBsI0Up57fm7C8t9 +tb1l2QCfvy82JqTvEuH49UmS+8/GEnbK1QbVHsDIiv3/8cFn+0zw/VSuVeaN8L0yzeNIo8m59iAq +AQ9wOyqKFEhKKkbn+nVg+hQW3L/P25hisjV06sqmfsA0Rx4bYhFoxEvIw3A4x9LsBIIfDpgDsPzS +NICAEhfA7fWXKK6UsOmuq1NZLTDmFe2zEHijVMovzm/qqvHfu7fCt5POlGtLOPZhXGCDZi0v1yiq +VyT7JTUW5P/rcLgzkfyKToozq36lEkXd6VSaLg== + +`pragma protect key_keyowner="Metrics Technologies Inc.", key_keyname="DSim", key_method="rsa" +`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256) +`pragma protect key_block +T4EV2kKcg5a7rlvEGr4AG3uvv0JzSoc0NQb9aIeE2gsKGq0oLel4q0oZ7eO6He8noW5KEowgkY0O +xDnerk/R4qxdSePYeRRmUg3KZ7hAHVEQrHpQ2RbYwK5mUIpQLjxCWRWzBjeWOce2bh0dAMR/4OH6 +t95V8b9VWpgepcUXynGvLDv31tVgr+8LtXlgWTNBiJj2mTZ3gEVxpgGRwMGsampw9yKqBKoR+/hg +++FP8JJkrOSdB2bhnNaD4fZotMLkhYDrWvQm9z6rW7fwxA2oEI+oUqi+K+82oiLzeVWy7FhVyzgS +Y273uSE53DWk35UE9A6ebcI/xUl1iGqwdeZihA== + +`pragma protect key_keyowner="Atrenta", key_keyname="ATR-SG-RSA-1", key_method="rsa" +`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=384) +`pragma protect key_block +gZRrJLrBkbil4BLf1tia07NzGL28f+Pk9zyPElbTDf8NEXCsuwTum6RjR5lvY/odzAYHlcKxpG+6 +gwjafT2OV5gHqqtPXrRHcVU4p5LEzOOl5p3puqvK+1z2+YpHqxOZIIZPIH9kjtzNgcBmcU7S2sFN +zTxyAYuLL9sAN+AIQ9UrW4MXDWxUtdkwPaSyFIvuKoxOKUD5IXEY9NtBpz1zsABMKNHneOO8pAix +qg8S/uQ/XJ8Qggr+vE7HDUUMCsijNXvqbkLM3xf6dXFpOqanKxd6/GfTcob4sezm/hMOZ2xiXcfS +hsYUMRdO9H6fmhECfszoK2XMsMt6xM+vlLywWJ0I6u468qVFxROkf9vL+ZDq/tMiJOm7E1p+HDif +98f5v1OybtzlZJP9bDMwWYcsCqcDejCMQyYOgPCgg+2jTR1JezxuK7PpjyliT0rnu7FfI/0tRzbL +d5YqO79RN0byWVTTdIlTWzL/qBD8BLVqXzWs3M+up46dGPxbkzv44od4 + +`pragma protect key_keyowner="Cadence Design Systems.", key_keyname="CDS_RSA_KEY_VER_1", key_method="rsa" +`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256) +`pragma protect key_block +A79lFm/8JnoMxv1MOWkY+AtU24uc6/CeGf6bjoYWLJXkzzHQooKleg9l+jH7oajoC3oVQh/sMXdi +3QmwZ5SKMt6sb03SC5BW7xPky8zyP6w8FRMCI2Tz1/GhozqjIbgSstUfCaemxIgj3rG7GkRYZ/2k +ualG2mpYDNyaxz1lMYaHfm7stH/IQlkCh6HHMbi7ImYJ6pILa828Ls3VREjo7dtXPS2ZDFxreSIH +2SZ3NpLJO0/umchZaUkt1xN0bsxgtGdOzSqGDpTJrU/ltmclBX199pmrXQa5p/q0FSLj2WkB043l +l3x1Rdipn49DvChkvbVzJP9aej4kwSPhvxHnHQ== + +`pragma protect key_keyowner="Synplicity", key_keyname="SYNP15_1", key_method="rsa" +`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256) +`pragma protect key_block +GFpXmWYmUY46GvuVucUW1VOu3+gGtLxYW4Ho/p4wggZ+jWrpUVhz2RSAxu+ufiLHtM9oYgKPaSYT +DOeuIJGTnxGr20Vh6Nn3cc41TyKAf0vxN2fGISEQQWrjh9OOgNcBmJfaHsSq7+5dhCaIWlGrInVr +GD5TqclLzw6cHAuPGxMi2wD4rq16RkDJnQbPf8ptaskWz81NxZfyWAL4T2E24soybpln8+vuF+72 +IQYfLQh/dDDsNHKNKwTKAtGjpFS8eVSbYnS+k3Am4loN8JRflh0+c4yGUo4EkuRzUFiIBrJOKylp +qicgwQw7vdbe+yPl6moUlvA1U2CjJ87bsXk5CA== + +`pragma protect key_keyowner="Mentor Graphics Corporation", key_keyname="MGC-PREC-RSA", key_method="rsa" +`pragma protect encoding = (enctype="BASE64", line_length=76, bytes=256) +`pragma protect key_block +Hzklq501x4qEym07A6+Vh+O6T5Q1srpTjckVi/KQ8/P6I6xpFqHBBikoKASz9mkWuvFaf6aly934 +etGfnzZuPuKCoMPixevIcq9cgFblu43p0H0FR4BSbqN+A/K2utwAblPur01qwtH9nc1azxOtPedI +3KLsEBUN2ObidzkZIUbiQlQ72wru0lGZ5uN6iiNcLRnEhqjdjWiOHf5qGo+df2QyP6S5zRR7hGOd +N5h9/9towH2UQ++6hnOd4pjtl7PKHWlU92421M+LhruDkz4Bw6c7d7EVdbIcZ3ub+l/OnCyNwQsr +WUo2E+j4vd3zIVA0gzTA1oLX73BJ1oxwQdO3JA== + +`pragma protect data_method = "AES128-CBC" +`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 1666640) +`pragma protect data_block +qokwsMF7xOwy+hmvnDZQB1xh7gqcx/zMCTy7s85m8I2yl+YJkN+j3Fte7gmui60djmGY6bKhBTSI +vvahKq2vp40nnmdFDa3W/7UOKBHVb5XQYQ7XfzaqRp25ShOvKx7AbIBRlIFWPJbEnObCgS8L7/rr +ZNuYqzCVuorjP3xacxLmzhJX/9YYrbAmuzynvxDQ4zR8q+SFk/n3OREQ0BvcvBg7yxgbLEEawbfE +xYcfjJ7i6JMPGo2EDwFZRryZXWDzwKXNMTh3putBXiGDHn73i7NH8KeaM6TaSckL7QzyO8ScdD52 +WUItAw/EKEWg/iaduHjhNlOh310X1DbgeM1BGKUHSuvRPT8fK2wxHymxracbbvncIQ+EQnasI1Pp +EmHYVpyQRiyk3UXew5SMSMNCrnAYjoASK3v/y/R1gSiMIXMa/WeTyjn64VbHDNXIcRci1Nhn0+j3 +ANVBe9ToRrnxRTASkgl3kdQPXlHi+niDAD6LZbzr6CuTNQbOvwWZgCjfBu9o02vHXscQcwN1v/sr +vixIUfE10NNjz/oGlB+IhshUOTXej7NIFNo190hpFak4GXRetD+/MvaR/ajqGx1G5L4ARX7u3QCB +tNL2x7WyOQptZKWpWNueQngqG+LxfGKJX6q9k2FgWOSc6VcLr9LnZQvC8S/2k5bGNZiQqPi6xHzX +7SOw4zySHCAB9b1nv7aOwFK3/RuSXCfSpM2JF+8bT2lAG/cs3Ni1heoXxGdyYtXDmHnNy2X5PXPn +ALJblcfhopYy/z3zpFAXPbzlsbXvzHevojRd43t6BPQbrACpg3OEYyZSwtVgClN4ENHxjlWsA4Cf +xehgJ06GA6HDjtSchMx2hr4IDVRjIpoBE0qTEJnhgCWqdJNINPl0Twhn+Z1sreIG1EDEs9kIUp6E +Oypppx15D8afivKT/KIxCEDfCcP4HGSeFYNHygNPtp9OKS7o5TvWkSQYq3rewIA0ppzyvDUXJ/Im +/Xz+LEtmaAPXq+lqfGorD88OcCNjMQlzY1IRQwvE6WgaL81NY6eUsu6ovX/wwrze4qrHUvEg7Ssf +v0WD/+L7X7XGwIpjV9JhAmhFybbi0CWGZk+Nt4z7ASs64UWJhDggCqUwkgIj0KIvh4q0hxJMKX7D +ShgZv/kXAvua/zqPPJjmvY+r3i+Dhq13PKGSrAjZR4GK1tE4cJXb/PYjpJFdZor09/UBLEXsINlP +fqE5ai7OVZvgj1e7iKcid58LWahvYMmopj8CUXATe2sKHxRlPA2+Gg2WJpzTnhXtR96A3s7H0MRR +LuSn3quH7ZQpHAyyc4sL9FnGPMWo3rx2p4QowwMLEtQVO/q3DqDCORNLjsnMya9MQgymaoxVo9/X +1DpDGYV0qJpeI6XULDFEktThzYlAlsS/0/7Cv8rq0rMBgLBKvYEzllwEAA0ouvXQSJTpeFLhBxxB +B4p7hFjsUZnnpBDbmZJoMbwYEIgxsOqx5VKwUf1AFqvbeN0cr6P+1jMSMhColkOduI5patuKxzRJ +ZBuNWLFijuKkBK0TFwAUkd2IjN/KpnklZl8yFr0XcDZXz1Sp7ANpFOHxuPUhxTZKUZ6rsANIWjba +9RvmHStOoG4UjOrtAMAJ8XuPKVBf9EcbECzvZ1ZEYVCfQDjnyWFn32CPz3GOOJ6cbNXsnnGM5Ady +pP7noBYNsqax2qcBPgQzPmMYj5TzDd/8HFvU/GHLgJlzNUghzyX6bs3bUgFB8q0ELdT9WgCsWDT8 ++HPpB09xZUpIDiiOpjLMRHfHWSEeoOjlgeTk/auEar7GmHe3C41eNnLDvQVLpc0lFXHSqfKGiSr3 +GwCA2IjpR9iNs/kCAh7d3B1p7TfHgxljupmlwH53LQu1IvNuX743hqKeAuaYBA4RoPqcuLqPsynz +cwvCs0zjntZ6wCB6Uv7z1AAKeb6HPZ4UrvMB8ZlrzvFlLsxWoehu+t4MqoN1r01pIPtrgx00lTHD +tZ4AfYuO1s5ru8g1jCx2Bq9xyheWT6FDUVDpYk8jYWch9JkFePs++qlSOoUwRbTZNBj+9xWIaH/D +p3N2mXUMj9ByVWCDT4wmcroX9Aj7Rf9Vrh4AXjtgB7q0VFwZZBfrfeWLi4JHUyZwTMRaTPNp4w/d +ALfUA5G4KD/pHDtTVQE02ijPoYys69kB5Yl6jRBp1RIon5rvNULLBYBBMe5odF8Xfk+y7VXACW0q +6i+8G93Hr9ieWmDGtnQJ2+acJ5S6plI+czZMOl7PZI93iEpwno6mpyZ7CxlS0tzf489A4RyYvH/y +Pf4DjdC8FbeDZTC3Bbv/tJzagwzCd6/rEmQRVYSPrDFtQjpcYS92XnSOovsgnhokVYfmrmfoeK+E +ymS7CEbwohZ5iI9T5bm+4/l4+k/xSH9yD8KMQlMhI/qQlNQD4XGqHP7etiza86J6pdFEuyJew/rE +B9xyDw8zN3kAZT+j9A8gGmbxEs3RmdhmjPUa3QkjOhjpQJwTf5Ds4Q0ebZAcoWwPsEnafrwiDbDZ +WdNgvAdhR0YBSMVlL0tk8AoEjBlf9hbi3M7uYoS61OhsR4cPT60Y1LDCaQ3E8949CDetXnhYnzkF +GtsI2nBusaO9umna6ExQc/bc/F1HPN4mtijoqjCg/stmbKzP0kkuZ72DPWQ5T1Jlkccl/gHhZoQM +UDXS+lFo6uMIVYrlFNRYVOgzuP4C2I2pAh4aAJBe6W9BJP71wo77EOMNGY2vrOOXfM1vDQkxlY4q +Mt3OFpajRWPAJ+V5as2grxs9nH6hr+4OQFhrdVqIqUKx+lHxzXC4RCdx0qROvHCgaxQzYszfgkRt +iWyPXyHj8Ofxtwmj5qOCB+8M92a56cqgwiGvngKhqW8aECkKmSb+90YHCNRMWL7kyPL0hrpuUDUz +I9RTmpQPwmNP6D/yEd1rSecp7XdJNeVcBuidCHCOsGAIAtvNoJq3W2ZjnWrIDBtNEM4zv4IX4JFt +hrYES3xTGiURmGhCDj4+t2cqBahWkYLRY6jZ34CcQYTjUWeeomESh5wg7b/eYS2jMrYIuZkW+583 +/2kFYD6nGAcHp6psMlj2Fq/LYkfJTurB9vti9ka0HQFb3CPbEqBL5MKhsDtlga5/TLNQV7N7kVhe +qFGiwC/ZfXyzZY+hOtK7/BnU2FgHKvkYM1xbP0xxoQSmH0T9FqYDiYXGYdEux9lKekIy1/mW5fCx +bu6tXZ6FA64BR4OKnukng+t+5wqPBwU2b//IxfgVenD9vOZ5vu+JRnozK2brICN+TbaWIrSrF1JC +SG4XiK4t45Ri68JOEUjifWsXAOPAsn0uYX5j11+Kndo1KANCRKzDru2kOJGQ3vLVxgP9Yh5YWFso +43VB9EMrp5NQLOMD/Xyueb0DoN1jyraeqBpsFF2+7r8uCH5EvID7xJYBjOGRsk3opPC7ykXLOLvi +lCk5d2bYPJRzTVvfnqckaOyT0RAvN1sAnkz5ziMdjUL18BHQfXf4qE8JGghkUm6x6ULXFw57BlHG +jyXHutDBrFHpkNlvgq5JEqkK+EZwbV3Y3nzoouCF3I9kZtjRy0YgILh/tfQHhrb6kO7dJ7bJ78LJ +S9j232BF3XppGtgPbQH9DXHQSivzMstd49M3zD5b6GWJb1WxiIsfuCjWt8Z5INToAKN/tOfIiYo+ +SGKTefEPwQDywLEJ2tXh6Qvg/5kKcugKCLxD/fl8kQjpCwMfCMDxpb6Qm6AOuN+aobBLcTk3DUa9 +B2/PtdmGE9+ioNu+ey1wNrj5mHRB1vMU3VbNLXo1i2GYUW93fCoKFYcwmC55nJqhUyz7RwyNqUgg +gbmDC2bRruFc4a1JjILqw3M1wUZjGfVen1Cfi/Ewauvwszkelgq5vVvGqtzZO4sUKsoOrEXOfkbI +aJIZ2D8tbtW/3vgl34m7J9L1JWLwTuMfQskieOVquHfP7lbkqPZ93fSezvfeUuqHCD9ew3aWwzOW +XCITURC9cimCSRcqZ8yqMdlb20YkZnAMS2mIjTSjVfKs4Vh51o+NTF48T/RgpDFPkpjxKBZkEVe4 +XSHh0Gf/N/COtUiEiCf99tCgzColj/ea86ny5qAysVJJeXlqZTfnRTJoMr7zaS89obNNSNwdSbFw +yU2k5P0Iexh23+0lwxtV5ULIDOv64nU7EuRX2TqEA2pEv8imtVO0Wi25aCruJNk4MF6srfRFH9yg +VN7R3knIWA45DUVGdmG7idy46xg6leh7+b8SMb8XbquXgjXJeaVNTjh89wHAjBIeY33j5au4aVpA +dIJPEA8khKDmyBCitvGi1T1PU6PVDt6h2/yHozLTS+pOIdHUcadAljCHsCCpEpKcmEVIbOW4CKVj ++2NTVGmX84F00DHW9sEmsSvQ/vM7GaEai6pDhxdraca24piE1daIJgdm2cJXYeA52jGDC6cExg4U +38UXmStton8mUt+wAvd8oWC3RoGs64GQrXDAk4Vv1Pztq4kSxGjuN/rDUqUiBjJ3aCHfH6TclN1g +WKoT7br3NEA+8/Hp7dJ2IfSqONMh988qUnc9sczKglLnyi0nDgRJxD+a6j2nBZFJ1bOczXKqx9C6 +NSH/1xFEkDC7GJtlGJD0QlNSAahgelaQqvAsP7kiyqD6UkGPQm5H0uZiUFy8i8LPc+h2vAQo+ePp +vsKe8L8cyboP6yAgxzdW6o3gszY6cYhqX0+UzG2YcJ+3rg1sokPVDHfQNwB15hxu0CEogy1CkHJM +Xu1U6mX8iWX3QFOOtwUWPS0/8bKX5d7GM82oxbyZYBLKhZYbgz2x0UOH91sEQduR9aJ/R7A3Pmdz +4iuJ/c2slBbmDcA3zKMgVTfglfXy7UstepLOFMh9aEgwEgrAboGI+LdMXmW2PrXIt5b+U5YTcf/2 +3LLBvDUzgisogmSjfxbKNLNtmqpiEW9iQNlAT07mxnB081oqdr6zPojkS5ZZPgaog14M25cfoPHY +s5SCO5jqmfPMDa+8AavbQ5Q2i082II1Tn7oKs2V/ECee2qIJULe3coyJDsbmMztSsQVpA1U8Ws3t +okCFDevHcRNfS1UIZykyfdaeVH4PO1NPXbi5CYlC/BUrCMg36byiPKuhtwEnMRK2r9UuFgVY8YTO +plFsgpmLKn5IWqe7gk7wXdk1i/3TZuFlPoYzp+cyOdPLMZJzrFiUynJfKjR90HZiEapRc9B+ISVp +hb58YFdEw/UXTdgD/S7a+6foUiaUEJA0KHtIEOiWpEKFIWS9179/JO9ws/BRUxeaP8m9HuGTYIG2 +1iUIQy0+b8OL4DS8jZB+TEwdneB+K5vHWnW6ZzVL+zzU5atUxEA+Tu54uMWuh9B00zpg/fPvurIe +TAKMpKx2WudTdu00gwgAMC9HKsJqOed1opSdqeoFOa4wq7k4Ks57EYz56kQAh+obbvdvdF6eL7lV +reGPkTTxH7cXIVUKF9xnyCpadX/9pb4L9Af7uAWKOV2CkvUCHpELAiKgpAvAbl97HyLUk2rcPOXN +6hR3YaFELoj2XqFB8bOoPmI5TViO+zKU0BMYZQhKzRw582VDEJgx8xx54SvukPk1i6zPovsplhec +TUbxPzIE+VpvDMkEJ0dYb6xLiyPJtndWiSQXz5YQ24Dssi02dL1ecE3Fco22opu9gTKZ8rjVGhb8 +Kl1bokrLNJiLy+lyn6FcaU4MBCHqxdEMeHh5UiIpXS65aL3KeB7JYx931owfFhrqpidzkC05ToP8 +yOKBT5tc34Mnen+TrWllsmhI4amV/pxp0w/1JmWTEVqITaZRc0llt8TSpWie0Hnx+W8m2bDuW4Ye +k5PepDft7E2ccqzhF6LKOhxkzssPd9UpOD0rUw8wPb84RgSNomUovo3z750zdPpBGsvyubhYuAqe +M8VUCR3+IVpgi4xS1+OXvgoubZmRsuCUtMVui0p7t5OkqTfxj4gcMuUIT57cUUvcOPveMvb/ROqj +N7C/vb9nnGsd2y3pu/3Jvd2lYFLjQHlD1lXnEqi12bu2WhF5Z8pPuS3HqKIGrEvlE+E3JXltBJvl +GCKPAm4EqpTY9P07oAsY5kf1Nc8rug1MTgw9hBweLoEGcs5VjT/VYaFTS50BTT0fExLqfo5mrUE4 +XLJZUQAPsisiBk4OY45haC+xpXfTSUn8DZfGvWbK/divdxgmtgHo5vgh5A0GSorB7utzbYf1ovkA +V5ZIKB95NN9x4wdRBu2zaN3Q+mPNnnXVQFpsYthVyAylSfmCbc3GHENi3OVhLraAGC/6uJXXXs29 +Mg2oqUZ86Mn6v8luAWZ26FyY+v3lEMF+tQ4CBrsxiOadduQRSWGI2KiTIr5eGBXEnV19VOg8wX4M +TiKs11hs67rFHys5swP0ug3hs/0xfX3M+OS61/bWhWG+aFpswJcLCE8O69Vawdk1VY2INlw4hbM8 +AAgIE7EIE42Z4a5uSKWVExqCjtbOZ5NpaURFW6+uFg0YiDUX/YkS/uDt4ipJdzqCSy1K/pcqI4WH +8FuN8Kpw8jbkHQKyZKUN616iuIWbwX4BXRzZlbuhQzChsp1cEr9VBZh1f17JOrKKpzZVG1vwGjyM +3uO/YOxkR+sUvT9lLP6Cul5+SjAFewASEgP6wYyIfwW95oBihTpmipuAn52R7h24gq3hAbclnk9W +0H3xIGI7+boO9IlKirAzGg/98NvM2iQvHrVwdcjVL+DIVuHzLrlLByGZ1uTd9SjacduYh/dTd6u7 +KEXBIiVgAa7Xw2aFT4DTIUJCUkIER4uPnGD2MkSpYVspJxfE7HyTWLvaKT0L/G1+B/X+j4UNSE6z +SXKC8usHO/YQFoZEVFQwAqvS+nO8v6cu6wQfL/lOJBQ3alXScwOesm6VPLR+H2A7e4PjTyGU/KcI +CMEKQjL0cZ9JSjt6eVSMart0dILAJlTAWZ/VF7r+JW7JCkUECi6Z0H8PyTOOcdsmiOD6ARU5K43g +MG3/g5nfNTTATjeKlfWW6mvGlP5fnLZhllRcYNYvgtpsnauRkREjI3sK49Gljafb6IUOAeO7Xk33 +glX5THcVGKhG0Oo4LH1RIO1/wUaae3Ah7uBFMQhSR7MI6q+x19tslTtjRGgYaUZ+/MUzoCyh/wbB +VaLFIvYT5E4AOTteI6lWUM9R9mx9E6T/S1KWS33opuUdl6aIoMpwPJMSzwxSVFctBWqNHgCobDhi +PjQK2lRmQDYxNhvAMojJ/0Xjl7h8fS7zq/8hKs/kc6pvTRc6QhvsXR++z6fEqzJSCDnSYnE4xAIY +0HDY8HmNKCsfx0hxxlNpELDBcyiMJeMoZYctDD75bt+uV93ciZzQMv99pDUDWjt/KsPZdYFSN2ac +jpk55bwXAWLy16FMxoqSe5OZUD86JwOYksk2Gde+KLinPT8e5xDRGCrhZVQxCFFQi6Mz3BbiCBsD +NGDoVS/Gn9/6pikOhArHWc6xD2eYBvQr1lZ6vx6e3VBaur8CvPODKXey1EJcjl/Ygv2pqHiQ8FvL +Jj4624Nqgjq632WRyvGRxfn8hjSafdV4Ctx2V40DrE58OBJc8z+pr3mgNXqo4dSQ2tQL2b4iyHKT +GAHAbJPC31/z1+SpeHiNsxW9jdP/Y4J8Wg7M/EfP9A8qtc+84wCl5wqqhPP1+tsAIk/tdHQVozjr +v5a/WYpQF2eD1kRS09bFI/H0Ltqs1FH733uCooZXOIdf3mae03vycDkZLyJGMLs98+pe9HZm5nr5 +fmAJ2QMxaElqRk2I9Tgr6hVP8++vhaz80M+Fe8iS7Oo+ujmUYp1WBG9JTPBbK6RXFd9IMv8Ma4jh +xnZ82OFo6fxNEwin+DSIQ+YIL/SEXGwdALCTS10SsNjD4rr9fZW4irjRwRxPiGfrkWBvLoxhKLgZ +L++sxq+t0HGvIod+ZS0wons4Fqau6BddDs9ftrDH+0ZrruH0+6k/L/HCcJaQ3TH3uR67OTNVR2fe +iREgks+WvFKFR0IVa66kRyrHifh+RnMl9+gDESoqGWGLGUiadXpcH5jsfrKe7Hel9K/N/iRrPr0d +aupFb9ADjb29l1Pk9VakaWd+6v1H9CSG13F88qhnSspPXy+fzN4bCl3/L+6l9xU7tTy32MiiXTPm +wVTcb+llLdh8SVOhy6nq8lTYF7++MYHPtgrNacYmNfGkYcHIlYdwSNn2j6IWDfLJZT6xgJs/ruTJ +glOub6REo6tKO9Qwkjc9c9Bsw51HfTg4wOD9M9oQloeL2ikgfMw165Qxt27+C2nZ1AzdMKSrkYEE +eThqXpKfhUUIZp1EjtkKLaoJD1yPNkwVe/Ze533BLMytmTSSUtXS4qQaiKKF90kntSUwAUVE1N9K +pyjFwSxR8S+91f23cQ+k2EY9/rdXVHHR1QthDffjnR3GIX1Y5QvRaPU4BIPRww8sPlMcsji/LmAA +W6/y25NJswXywHdrja+rVEqkcbPqrWWrFUwq9wDm6gP/mmAF3nJ5YfVrzIfo1peC0gTibZfsXmwG +vX5+gEwGnWV93OMAT1fc6+fRaYXiautKmUjqjSUFdp0xSvAHGVHni8Ehho+nOje9LeouNkg9P46E +FlBD9nER3iFB/q7KiHFImU6YnILkvnlanEWiCt0/ixQAqg03jsWbhdFnSZibRdgoVJWk5YMsukJ9 +VxQu++ObBX9TTSwTaY8+DlLXD5UcKalcDw8sUVhBxj7PlAYujRXO+n3G3RPBr+SSLY7tZpfD/4n3 +3ITDKHLCfItflBUnXdDBftVtY3zm14LM+lQ2d8MTe8vK46X5/wdS8ePPW6eaSE/3srGsCgvLAS+j +Yb+JAuH6Y/4TYuvSMGE62hzogesxvobMsfNzSFNWuWKzQRJjqoEaVoB2svh4UJnuJgHCvZQoJizz +3aXpbnoddKd9EySr7eQUa+n9JjwIzwMd0Bn9t6I8N1RFh/p+ehgRRM8ALOwJep99YqDumFTcyKRB +8BNu5KzzDmzi2982r+ZJRTNYv48zoVZfpaBS8H+QsbIiv4bjBKMsD67JeKucGUuFBDYxB54xnMlO +1hbAwgwUQ0Mljq95z+RUNhy42Q4e5dwNcDk1gLV+zjAX8E4LT6yBXA/PDUFl02ECYs2HPTPwf/K3 +6tEEmvLaRz9yjBI6Jr1zclPulG6Q6ldvpTYgrbZtEOjlCrz58tm7yCfY/EK7RXGiIkUFNEGg8gRS +PUgKCIwEryirtraQuzgPL8jIDPBhFDb320q0ocM5/TVF2vZvcxjsuopYFbhN3i8+UK1OYxUA54Ir +RSD+jSpOSiZdGZYMPgYUTgkfr1t1P5Tx4LX845lUZ6IGrovl+WSDHl3de2VbAj4UeCz14Ar0ZF4i +3EWZuAv9M5m6OUasl3XPF9qoxZ4MiBjIGYTMIhO1bxr/CFdtgvMR6vkcutJ2BFqaFnMlynTe5Nn4 +LmIhbNgsgHOWdfyD2bjESlydvNUiWWZUfR2fqLVVAzZVFoNubUfw2Rygn85F/6IsNU30fmv20bTC +Ke55OnZJe5Fspl6rf6k9DsK/Vzj50KOOP9Rejf7645laZl1i1Ka4ssstJlvMi5LSqi8Ua7jWmDrW +CailUnigdtixZFiw2g2sshNPV7QFn0jxzgp140zTlmgSPdXDFiHpsojUgntsyhdkv3NFwsl8sKlL +XugnsHcbsvlCkwJGfkkhevEQXG0MoWoDv8CHVD0ELe6p2UODxF6qoEKx3RStaeIM8qR6T4/J+EIK +czmnzOevWb65LUgD/kI3+pzcPut47I7+vWxSFmy/rtbdxHI7Emaw2RnLFltXB3fBZIl64Gt9NdxD +lw/Ozg+iXoULcLyc2Jv3g7dyoBfNu6Wf3SQGxqnIU8PqbwdYfJBiMV8cHep/Eto2YP1Y0TuoM/1a +tA0rz63PFoRL/kv/uJveT4akeIZ461A/qzksleOgM+hTACmyEnyf38yqFzbBZFzSXY0V1LXZL6A4 +50eeCzB8vG54yBzlBabTE3S66gE1uMttNgTt76RIjTZJTAMJl8vkQGGDbvgAz1TzLTfvgEx0Wfh4 +cNYBj5BpF9kzCGSuAvVT2JvqkiaTksqTJidpvLPqMVwVjEK5FEK/s6ukw/EALldd93GEbBK95+Of +W6B60TXviuK4xB7BEU1N71MVKVbWR1efuQqdbDeyFTG6fA2FFLp1yvNeMUb9BPS58YNEEjDP6jps +JmiknDxPxGwmJyen9pBU9GUr9xoF0tcHnRMAxYVRzARqUIzNmygLIZkBMwswtxYuouMpxrM2uZCB +QJFKXzEOS+eW5pLfpqCoCm4mFCiZUV/LEKHFh4/ANsXhWbtlrOMP1mDChfShKMESShNJHmJKYMzQ +yseSMAELPXeZ7StGalE9SYtpRlO6bAJdcZeh3g885DrcKV1JhfQpKte6NBkW+sPmRknWH8GiziOU +dfUGKQ9Ak6W6Rm8gXL+T+85V7s4+yYntwVUb9EjhA6EpucnS7PryW2HorgpH7aB86jtqNVs+OCmP +kAkNiAYR4oW/vVKiKXaUQlznwPnDbSp9hHT0VjdroRLODkfnBJjPgCiXi886DU+qBrDjprKKJams +SxWvTgVf1jkiBPmDVL1vQRAI2z8300EWtwrZP3Hq+6ZsqJjCxRS1XPy8AzFqhOVXr0rm8+jSBMD4 +xYY2NNKKxi4bJ2IC11KfNQroF9r+kzeztmjB7cphqIVTYmIB/74Bdo6/4wIovGN7q9cqzSORxTvB +XVXezmE6gVyehFMYcf+ByjLy0XkEObuf128inTVvKWn2c0LlWJskFrZSdFcd/oTwDxDSOXlygLhQ +Or6V4wsGKZzbzvWpbwfexWN6X1QsayZuGAp0Mu67AgS4QeF8I8faFGnSze9e0P7pqVrP+PvaFiJ8 +g4d5EQcfYv8cotvUSuKUYZ+T500Mzklj+eHJqyw6yjDspNnqt8cwRUAZAvxGNFcRTxMbrUqKg8Ud +v/z/TRgTs5K56hPYAhpzqmMhzGebrAwijCpJqJxgS+Tb0psSPLmN9MZtFtCpB+PBcXesVEz1JiE1 +bqHvOPEU5GLt/jaIuH7XjvjXvGKlqPTWjfM07pFdgAYX12lFtenzDxQdATnB0kTxFXtVngDZlvpt +D8zc0Y+ThVhY3SQIYW3FDSXq7Lpl4+YVB+QKZ15J3F/TyMisNc141HJztW9/doNbYJMXEs/3YIfm +E+GkfLB1ydUOpMmni4lh6Wc14rC444eW6qevx+YLdlgnn579wa/s1u8DTRsoNeUlzSkdxY9/Autr +GeSee3Y+sqSX5jsk2Egp4KMLP0l+m+sBNJiv9waf3TyvUJvv79iN0GjYewkhDqcSNL2rRbYiwmnC +Rlndtlrr3lxICHM+hxpQkvIlyxgtBv0W60O+mkrJ75AU7ZvATBMQ1WuM2XDCwWB1JEllTauJ9pi5 +iXrg7JPDceqayI2iYFav7Dbkg6KH6Pp9vaNFwDrWJUhuqL1zrE12GMo2YPkrq3SP2XjM6RKB5YQR +N/F2IvOwao0NhjypHbXyEk17MArNchcS8PJYF84a3h/CaVPsoqYqgywi4poQpIW1rh4CbMNCjZ8E +GtB6JSYLy+Wn5098SFUCKPFfOS7vaRJ71pdL+9mHf1fCYA7BfvaRWgVHzobknXRNo6niJNArJs3T +C+n1xLfwMNO6E8q8D7oGNUnmjUnftlm2d612c+bg0ITsW7Wpmgj3/qRNnH0hnDRJxGSeIvC198ft +c7nrkkBE6+kwD+IvBkIXtFWVA4sQAj3fT9Akh712Oge4dymUsYgeEMvQDKxFSEvkF2US1RZ22cOc +Vl90uHTlpcgqNJwd7kg9QkRWrG+XPcAKBz+ZHjA4A2u1/F3s7Jgcz20uRSbJTq8ZKHIbtEpWf0HT +S7ggz4fWHE4F+tREp1XtQgDBo45whZibFAX6HSrWv+jmKGo65qr6yi0jbei6k3Q3+I4jgLubrhPy +j5xqIr4Ocy3tjemi6/eEXhsCPLIih7SFtXVVTOJgbtNnr+D5bY8QgNHLuATBbLzyJbXRnR5Yzf7p +w1+3hti3MX61u7tI0n9AkUtjdO/LnVNUeZqDCt1SN/vyDRZyHlygkMtuKHT7W9/PDpx0VAIGLhx6 +cwUtaucuaxvHkzzG9M+XoGYA1xpoamrrSMdBpZxcs+4MyOczb/IxUEBUksCQPu3T8+PqFqf9swh9 +oCzjzyglTz++oVgJx3nWeaAnNTwR+uhvVXgvT97as6oB6Fq7p39XsJgkFbqnN2+h40JCuyRhDRhQ +5sJHctVwTXXP64RA+tzjUjWPpqXSqXxioPKsMfyrnU/dEdFmiuzpQKB1KMKB6f/gLdZT35gc578t +eG88XHBxToub10DJG8BCWUTp3a/H88OMhh3EBDWS2wPNt27cQYJMIaYxsZj3aUvMASutftTOSKhk +/EPnP02v/Zfp/3Ni3389ZAq+1lDa/cER9npwyDBpPKZkBwZUfIlhRkguZmh4b/BPzbMOg6xfDNCL +XKW2A7LsBRk895S//3KyHnKcGArob7L80uQ5r4uuP1stwSDcA3F8pXdEqtTVZ74qv35u6zj7rH5G +sx9f65Tqaff7/VNB6NgGHj67vD+PpA8ODRqaXjoWqw7a9bF1gF9NK7YnV2dAO3q1wwft3VIBthUO +JgOKXPfSG/vbpsjWRfpXgeVZqOvNOEieWp5PLzsnMeTjCiOs1J1sJKcYjxycP+kQhuuewYc0SuI/ +J9zwBg6cN6WCYbNRCYD63ZAP0BGwaxlxmQsAeXhR1ghTFsCDTifKgrERQgJuTfr5BbCrPuHqrEhj +d830PlhxRKYgMQ1WWVX4q3STylliG24h0U19GNkf47ez1muR0N1ggl//09T+FYCbhRzcArWpyHbL +ZKfQ4Y0He4wljlqZoYenBDtJX350M1SP0oRLbmM174+pMpobJPHkUCI/0s8NQSaTai0Yh1puigsh +Zix98YHzpGJLPnA1rSWB9FwVAFcRACl13mrZjq0xPuFy9lGO+EoNxYVEU1372HCJp7y7RJcydBgH +VBuJxuj1KEQlwwX0R/RGFLgHCPsMpYQTp+p7VhwStJpwgUVRzJXK2ghWYBCTSc29XPHPhzm8q26g +1zH3ppTvNw5cRk7MlO9jGgvkVVdaMXEURAh8z4XcyAsvZyZHsd16OZu2TG+bALf78nFGp9SZFcBM +0XraBlQjAWA8NsTGzE4h0tr+NcwBkfpNfg8ONFui6xqbYmMz2muTtMx4twhgJL1xvkhkBV5X1M/B +LA+xEJcG3/2S82LKfRRfyEHvurC6bcvnDlYy59Lc+v3q7P1odkdII7kzf9vFLA55jLSsRgXkJsnU +S0clx/uOqO8h2tATvyEPxfNK9X5dczYGleflU2mrhqQN85oy3/baagbkFu+O6Ur4ngbcRkPILFHh +rHOJqme9OGMglrYJ5wpvunsZnd5ECRoxNtCultFF/gssD1srxux//0TxiIcgqqe3XvMxYdRYos8x +9OTeB1ItoJzrTgxxB5k1as3zchjyevbAGFiprJWchEo+w+8jkqypI1awWpgZcSX4AzHsnzFYPEhw +7QSLUwNlSpejCylgHZgjAuXTjC3y6Baziqav5gITFjoMV4I4O6SNnnns5V/+LbErvWGR/Z/alCyB +qpKIQ9ihUHtG6soFt1BL1+03Sb3K6KWrIMsP7OkyKhOEnUh4961Mp+EeRtwRAH0bdp7pNhmr7cWB +r1JY4yivbeFY4vlD8x2YKDmgbjJBT+ltwSG8KDtjFk7Ai6Kyg05VbfGXAGKCAllXmNwsnJdjlvdC +DsjVePAYy+1u/l/bndIiBTlZsSU8cuCAs243sFXw/7sINdR5/a/hnsZoZXOaOe42l0u9PwN0P56f +CZ0NaSciLKxSooZhL6DzCOrHfiLogN9htXca7fg1l2+D3mQHX5iFRzeMuCOwuUzUz/FD1Vn231R1 +FCbsS8oqeprShHmUNRuwgDpL6HuHGMIfd2OpxrmZU67+qN96bJeV/90T+ksIj67tn4VzMCi5m4fF +YKwlE8XaXainqsuHV9U6MkMDBhshQ77VMZyCHjBgJERlxwE6R2kR0a6gZi87p6PP++C/LtE8eb+s +k5B0lGWaIibFsaFT+XOvZU6tJe6cu0LANtClUVjXhz38MCeP8z8EXbU8q3ChIQEBYMPDx9plDiyU +Z3ANlQcGWRgk4EPfCxWhIlI/naQZwII2O38N7+zSfgl12G3yXJpc+LkDSsD7hpLWUs+QZyUHYfcL +jBLB6PMZJl8h9gdKFKXq4aOwoU1kD82TwvSh/7ZugQmBb6OKKwYp6VDfRFKq7mKhRYsKuH8jcCVn +qcSaeFfMlaa6A6hKyFBO3yXotaOYkGZbTFaWCU9T0q4Ff7JjnaBrBSokkZAVbVC+4TheUD0mNXGx +rJ02N1tP4Peea5Q9Oik4r6aZJGRF3yf4t4QScuaot9JlEbccv/mc7R24QIfKmRRcQm/vfaHlQfg/ +BL/tHTfikgFytELcylX3di0v9zgiLaBiyAptzn+IlLj3E8VO1wZPZQZhQe+uBKUhugkMwvVZ86XE +ST+OaWd1Cg+aJKs2WURJ3TEAyxw93OPQT/HjpP0kyBl+n2XqsnmY9/je0GfeBbzgSlNqDMBZ90eW +X7duVxWeZ9TvwMl43B5HBjeVrNeQV984yIZFq68yEXhBPrR7tfF9KFBd8CzJx3nn95GO5AXul6Na +9EpmZN2UqGBLJRgfIJ9T2BOOqYv+qvgFKJKyWwjbRCBTB+3KNYZYzEleMPlkeoXwHhhpmMRZxeuU +BATF/uO0MBvjtEITY5cNDyqkifz67sh42zRv2dij7wfy74axGeOtac5FxK2NCwk1bELCpQ0XPTyi +hwWzcarmVVdZm9O5ekzYYqqCu/WMH3xorCUBA9ipV5Zrv/RtyL12ykw4IrIdviOSDJkG9KYVqWl5 +UdqVVF9Ox9u9+JMxcYhtLxsUFYy8JUQWV6QJF9r/5q8Je3wYwrYWUDS1xfTuHrfnvMdSu/kgSbWr +KdLRaypuZd1xlGZabAIE81oouNm64rboLUgVjsr/COp8N9TdXaavIKkrqwDRARME7CxZoN+EZlMX +f4hjHoHxByzHHibH3XXhhmVBfe1Jse3GUiv3SERiy5FDtO2Wo9iB9Dx96ki1gFlkYcD6yS/eoaXN +5hnPKICxPOoWnleBwxWPfjjRXmW62nCircSP1icbr0TVboVyQHh6VN9p49oNioO14E1u5uRE8zqS +ye9yeVY56mx2LWKVBUEq6DKEsza2txuu10XVR+Hj0HNq6MCfpiF8dX+3fua/hfVuAjJWzVJ7kw0g +G/1M7OdA4l8PfFrX3h8iSNS/LfBnBSmy3SEcofhqXHjaUu3+LTn0kj081X6SjgewVJh1SZ+XkWPM +8RsBS4nTK2IgLPe+xIQZ8jt4FTD6Uwo0QJIohJI+moiI8QUZtwJlK5rl3rvHtuI9VK6mADS8PLio +8aEnS6gTXbM56fbJu5fjMAjrLVh0avunIGjvaZuRWqpfJcl71aLtQRMpklJxK7fB/EUGRJn8L8wH +38Z5aEBrAXgQo9duNTwU7Jvp6O3hQoKr4c8BjmjmSVImQXAQv0f30Yx2xgm1HZimgV2rOQTEIpmK +EeOQuitmgi9J0soN2QVVeNdQi2AAfYUjLQ7p5/0wbMtbIiFrn7wUMxEzUW1wg/FqHAwPtSqo0lWs +8nkKmg6TQoAC3UZuZe15MrRKumIFxY2MW0cc4aKHVJBst9bPSxCGkW8lsOVK9tmA32Af4aDuI7hQ +XomzCkVHsKa03bZngDYZGatnWMzSE5W+vksaHeFuT2tfXHBe3Gw3eH5hIJIkeyAeZ5umDdbUaZge +dF7VlvwM88xIlpnU0JFKAe8bBHmM9caWCddelt9ELTukdEu4CqlJO+rwKQZs5rDC8gByCdlUvjKR +18Rp6LOs6fN0xUdkbng6Szv8m5KoGz02B25Z2RkQDtIOB7Q0SWmhSZK8kJUpI2x1O5meMDkUHaWo +G9LHg5L/qDnvDJKT53L5ubvYksr3yiLfCS5/j69KShRl6d0q8Ze4Q8J97CKwiZYD1pAWOJgdshue +tUw0BMvyVVg/eBgvFqEjSnN1ju9cP0ptYmnx7Yn9AImZuNiLLfgZihlFajSVtA17jOa8JUwnG4Ij +dCakqFmmWizN1tt1uuonDpQP1DjHava1m2u5TM+zpwKY9S06QDeOLGjdGRRahbckh+69oKMb7Ehc +uD3auXPlexfFGIdrV6/J2NqySgXkooWorbyTd/MagQ1Ub/eYwgyLONQAc0kcPW8XF9IkCzsDAS1k +VGuuS8z6UpD5DAwdh0jgGO6r9kBUVOaN5ZozeSJjdSUgfdeBLIEqermuGPZKYVU3ZL/140mHp9zR +PM6G4L4VrJnMNhWS7KbfByABLYyvC07DAALdW4w23fqy3fGA4sHd7L1KaDfX7h0ec4piRWrKUnJY +cj0C0ahJUKrmrwtXtup+BH23C/abc4ztyENiLp6BPNPwk0jQmShkqhzZh0Z7DWxDVY5wHrFX3jZO +aU94pGKmNv3kS71gTfI67dft8zntVwU33t3yo5vZpJ92ml/1KbYvcsrv/ocaLPaqalX4xO/+jODD +igVaqorUshC+OybRwSCbYj2jxRsn6NpoHByAlP5LZj+4+228rLnRXiBGWRo8EA43Q8TEOn6bUvDE +/ObTwq67t1/vrpXs6RiM34tc3HTOLo+XQ/JLUdt4bhDuZZDnDmWB0odWEjyCw6mzrHOHiDCI1fbK +u8QU86fPeoJ1vWH6rkscIL3MdUisRwyPw5TdyU9hopE2pfa+5gUyn7CpmByW1ZD1Xr5OuqnzJXEs +a8J7gstaZoE1/fMJ2yRCrU/rkMnZDUIv8AqMIq0MRUwsdaIGmNB8XtLqT4AVPp+xO+3PKBQb5hBg +6qGCvmiBMKgIBxt16xHUuTtLuBVfkcBnalsEi+o9MDyws9SBwTCoHctTc4JnrUXy+l5KLIubdqy5 +XYZJKiRSjt8Nfmfyq7wZeJigwUGzTwYzT8j/MsQsLdxq4hN/E16vI0sS8jnpPR930NLRdYyx4sk3 +5pUWjEMTmTtrpwJzqIICJ4eVXi6cvpdz6wms/c92MboFQKbUbMmALNRtc2eqC1nuZQS3zWTc53eo +9A4lAf9/It4N78KjybNk+iLgLbVp+krizUBpb0+E2ywrMHE+S+T2qz15fv+Dp0SdtuLIfGYFT34/ +iqMitCHJ2XLibF9IIDrMPvEcjz9U1NXw140BWionBHd5fYtVADsUm1D+xE/RrNpdr+sW3QLNxBhP +CTxztjiIJZfmgxS9VUSmnsdJ5+bYh7WxN8r6z8EJWbmb4tsZXa74CVQGk4MGMP22CPfv2kXW6ehq +3MlEZK1KSKwgZImMHo2wJauvthreokQqhHYmMJhDZWeAOPp+hPFN4B+9I1fs+Uuuhm0EVbMJFurj +ImmV6EGbBnLJXX3RyGrk5Y/P9fyihYDIZODyx562jyEf1z+d50QyWunZ+wg7XzzAZ1siXb8R9cMK +glqwmf3lqj5yW+di6ju0kTNlnv8hHSELCAjsZzp9eT4yG+9VRMgwTXBAW6DdJfl01UPQ2A45p60I +slttZccWBbgiihfMyPI7ZcBsaGtUBtMlzvV9wUej7irp/e8VT3g/41KkXlMB+9CjconxKBMB7Knp +oOdKtTaZqvUPeyuZRTpX7fymkeQsvZBc514+tXfnC3LHHCZvr8D9CwzzmBNmtCJW3ALKW4Ef6Z5L +zi06ix4YOjvV/JzUDFxP6sKZwqh9C92/+o6TFuPXywlSKErn/bEPhaHt6neKVfdnbuSmqTb5MhwJ +FBp/2yN2c5EGUAXabjnj0+PTA0dZqCxwdmZLzBbE8aKscg0JbgvTu0GbousmKlnZscwy3qb+Tr4B +QKHvKlKVNzJLAGBDhkV9FoYd6a/rB9gxJk+4vTDh+ugF8ukrpvf9vMtag4ipC93uTc4mG08BkBf6 +Pca7xdl6JFH4kU4OkPR1FsMmEre4XYYnw7W6FJ9JHM7ubv4jS64G3ERtAI5fDgn/EkCGQZerIfvQ +S6ZRi+W4fTDIw4P2Aox1RhDSCQ7g+s+18k21vJgKM3FVu9SgJltpQAfES9C7OB63dnCjw5mT0iX4 +p7oIapx62I6SHFbju8bIjwCznVvNbIkNE9VxFtwJemXvYeZFzJlEQZfo2QM3+7e4jzIaFqfZcGyA ++EecQfNq9+mfOJlOhFFr7b9IliDZyhs49IDDgKxVHIL3HuSSUu83+3Fp1ZRZyMAhBn6TP2okdq3z +JqH/U8haBuE0KMpEkOOR4ys9bAVlQ1J0rY2rPsei8vvHaO3f88KlOTg6PT9L1/9GZI62FMSZzswU +YufcrX1CQICCjS4AzWrevhRZytCTnFxeA99iX5BQfd8BRKMYZkT1EHDaXSTIDhL8gT6l603hhwur +JFQ7UI76eHsilpmCzz9RW3PHVb5cHXV9gtaY+bRN5o5DgzSW6cdNGJunOlLOmilFT+TWtFK0a0XP +o/L6SVBV0mQRV+vKjvv8lf5fwGH17mPnYAShaSeJbJLMUnxJfc+uCh5tzFpsK3jufzcxsTFFKqza +ji4YVKnjjF9V/l7ycb8AB/dQ8lHblXOkBGfqY+PhM+y5mdeIE5xW75ygRRWG9NOtd21zMUwfDg9j +qWbtqfy0njXlYofNyNGfVhECYMF8Pkfu81qoKMxGyigdkJaVAoTbRISsQpiF+0wZgQ2myiQOrOuy +Vr1kwUcQbdEVNzNfDaXm3mZPNr7yJBId3hAfrrOjaYKlDEGOn5xAh8MqDtt6AmLgU+SITfvblxp2 +4AfT5Gc639KNT8eHa9q3MhUKFie5o5OTM617lxWKc5m2+MPRJCN/8JGCOnGkuIgbNpjIB3+SA8Pc +T4Gag/0h/MMjm+ClIPB2jbk9zCw0eyknABGPozeRFkIIpq82kgLvkqE1YnP/e+AdIO+1K6wTeqTW +uGZaMSbYLvEThwMYTu9QRc4GjTO1auF2/EkplF/94BlZG0+CLVTP8HTukXKV7bcU0wLHwWBCumKs ++zymPxDvtst/3qEeoiU4PryefVSIQn4DnEYun5OdaX7AbwjBeDjYZCb9dsODSZxwEnXobBrfmdf2 +a5tVSy0AcTTBGrv2ayU1tQeo3D59IQpv338w/qrVb+fhUlI69StvSDLpuBhAf1TlawjHvTa4xt8j +KOGZJotfuVjBm59DQxkB9+JHTJus2yxb9zlVqMDr4RpkimRoRN5fAmjgJKqZ4y00H90zqGeNh+b7 +BJkdk+74xuAU5IMnvz+tBZ7hmf/e2nCydFTF7TvG5D7ErDoHdACSs6gJ0Vy/NkL/ErE4NuAexNXD +VXybChodpeRNbtCUiozNV4g4RzVdZ4exshQ+0OJ6ErXlWY9nPXqVk8RYmRPM9x7RIC8sFetV4vzp +javIMR+0jnjqjZr2yt+Ch3PFL/jlqEWpnEOSk0NxpYMx5qmwgC+sFAoCA+pRtwlGiiKh5/AKPfp3 +qO/9HOe09Af+01oDvjm4YrE35licg7bVk9rXpv2GFJDKfgIqS4L8DPpsRL0xNbzdsUfb6SvWCb8L +ZoKYrmBI2eyBZY/p8cSfqTEVscRbopq7PGMzEf2xztm7NZ66hHY9SXdnl5xd7buaq9zpagDqR+Eh +JiYtt6xV7Dx14CeIcPl8LxV9wBAaXglTegDZwxkm6GsAgGwtLEsl7O+/FAQbuAkFtmqfIjbKm28L +VUzSD0lZ8sa1GCzMUmMXVQaVojb9ONNF518aMUqZtXlM6GbiJcnloltyMb8OxffEPN0xlVjH+as4 +CArLz2LYJ+sg5o3LGoCMiHYOgNuvGAzlz3ZKujkJq7mKRa9Yn36FG0Vi7t2SFkB0s0dXdd/kWcJH +15wOopdzjhIh/ocy6VTkig2Vyrl2l/Zf95aMBHzvOL2vxix7lFxhqmF7ig/qAp9OgCsvBBZNaxfj +S6syC6B2QXcxzpmV6FRWjk4PBxLojGyjgGr/ita5474DK+k1ceisZ/WBgX/totW8OK80vP8XfvQB +lG/gKsx/MRrKKzXkhh6qFB/+ROqoBf+u7SMGvZbJWVwwxSOVRBKr5KpCPXZxwE4JeZm7eq8bz01h +M+9ArDEAT0IzvdKl9smeNl8z90008who2AmMdJAW/ngJiUOpiExbePaVa8TDxgcma0Q9CXHXqXAo +ok8PLnHbadK890ji68kzuTK3sgCMAI7x4HYKqGdzJdhHQ77FUR4LmeerO2IOJylaFZnz0PYOoAyO +Ra/QcPFucqe/Dtf0KOSHsHN86iLo1m3J6/rUyqKj/Y6U7FI2YG8mBzM35+j0bFtetUH21ndKyfrw +Vc0qHXACQ5+xpjZEYrsPAKsN96TRRA6NTFari7A3hQhbgkx2z2ZLtEAYQwJpe2jbyet6FGIUjy9i +UT2fXoWaPSt35tbMpoFVDGt6Ecc5KC93nxhEbkUHt7Zrw4nayMh27r4KEjAFG0k5s9qBRPiMcGkW +tR0mnrhH1FNTxw3g/hOTYVVojmTyih3aWgNtNph48FBy1IryFiG8Dfj3DhAT7zaUywtlXw3Cf0pn +EC+Yxa95w0B8KVA4TGptriZ8YADFoCRj1fp6vkqOOA4fGgYWKEqmtWm3VH/NVWLbFNgucO5457TS +ChZg2vP6DflZ3BPd551JymxHBmpHzhjCivxB7won0OmNEShr1rFtkK/jDkK25MkCs3CGOG+K9ltc +nbVQBQBucv70OdRqhBOJl+C4fxYP3x/1HTpPDR+sQ3lx1RDkYBa565zr56sHcP8iJBH8GQ2aJqOq +2Xz8irTRaINueYcgqYWeD/ZRe4mcU0bc21WvkEkYE9IE0xnJ8l0CuSTQ8RzOJVfBK00O7V9GP7a4 +PFEthC7qH2K28h3GVqfDqP2HCc0pNcOLNzRDgJ8i0NJMvy+OXtketNetYd9kqWWe4VSMv3q9TcbB +HSTtTV2hgXHhOGZh9eStijqBdsNaSC1818gMq26e7f9F1xKJYRve4MBaZFFg8C2oChcu26OaM+Bf +aF+esw56Ow+qfW6LejHgYZpmnI9ZT0uxksJptbO+bW9Jsul7mw5Shee63L/MG+Vdn06cGMw46YJE +af+A1ivfIK15EgVC6avttyapqfb7FHFZBDpV7ofTdwYFEE0n9S+6wzi/0HVsb5SqUJYIxQkr8CSE +OIHqix9MRYfHaVTRyqIMMLgH8bHlcIOm977c7+uvFyTAcFcfvxLbSKRs7QWToRell2yczzX8+8c+ +D5uO2b6ut82gTyuPCerZVYiMgJk3a01oWKlCprlczJQaV4zpTZsmIEDigun3HYHCXtHL62k+s5Zx +pv2ABtpbLLZLETQNcPwUeWMefwNKD05Aydkcc/AMJwDKnugL5fypvWHrcPtK+2c9j4kb4q5d9Vau +IDCj9jpwGbSs8xEXtG+g8+p3jFQoK4MpZ8OB3P30eYRbfVE13t9bQSwA7+D2Hp0sk05SBY1CBXeR +8cIkq93edLm/h/Kpz1/hGSfzv1+iNPFAudTUCpEeGk8IMQQCL2b6HCnHe2iFv+ycMl8bvs7S90O7 +kFORoNzLb5aTVYUyvy3LeQbpUxmMEQuy2uK15QLSh2l/KfabNqhjBOGrIX4UzA2aH5qxWOuFQbwY +FYrJoUPBu5t0txlOvLEjrjYWNsNJ7TUNRRQDBSwA7Qy5xf1pmzewhguG55N8g5Kp8QxVkn9LeDzg +zmZMLBgivMYYAamGemnwec9KE9CV+jZ1BvuxTpJlnozPOLEauJFaADuZhwWG1SbgEbVmllNqoPnE +gnW4KOiN7O4/KHZe8NC0Dr9gveaRWafQueNcH0F4z5MbzTaNNLivhMwMkM/JTJZM9advaCcAQ10l +Ys27wBA0N059qyrBkjIYvh5UKU8Ne/VddRmL9l11t7RtJRTLSDDb++o2khYQWkvZI2GcsL3iNrXz +NqJRaVGEKq3f3C53goap69ZbU8oINB6mUFrmT27UacpaZ35brSuUydyKLwlX+OI2LAvV17tczFoI +UnK/KrwnNLRM6x89uIvee3/qAtQj6FrBZlSfhdxR4QzcD0iIN32N2WAh3wGAxl0BUAqImSgzd+Qe +bNZ3SMy0vAHMAzkfn9os/k+Inc2T5NBjaPI6TN4M8wQJJnhV0ojCjO8WZArQ+LPDsvUTUC2N/P2u +TUXPR68slWdVqCVO7yjY2crMeb9ou2vT2JiACSsPIMafsqnOMyaqT6Oas139BjQAfceyVRvkRUYf +NILE7sfO7df3/3YMrRj3Ud1vJiyiBEs5At9ntIA8GqtXEqAhlKjH1QRLlpJ8yUU6tuK0MnlJcsGB +R68LZ9CTywZQWG8ZVXLDfQqBnJRBTG44yfYqsc4l39XLNjBWEIT5LeG6HAPZldZFERhh74qKSWoL +zDZts/pscq7r1LFi8zfNVwdoB5BQMeDslVstUgFGMEge6xDjgzYhw0rI//ja+D0c3IAI/Gm3C8Li +H8hsYONvblGnywO3i3pAPGqcxQ0PmzC7dG95mG3MpKxzZXy8x0weo1EKDFoQt4lvWeWnOEqRdK5s +JFHnM76+y8U4Wwam9UinjYg9SfxjfqpmA1r0EjTJJgHkPSSCv94O1nazPBH4+Vl3QvKXuBxAGc11 +swMJYc62GAzZvikSvbAQIZYe2qR+EaE1kiSUA5/d/5bCTlfAElCD4yKS5poaM0+j+ePqtAfY4PMC +Iy9mxOe5WyybYK6PqZ98EMC7E9M1KxST7TqLc6OZCpziXPtRaSTXFZp1+mYLCtoCRWx6cJbrpYDg +mo+f0KJPWDisjiHEzIxyX4chehfops5kGRrSyNCQ80SKUWtZdqy34F30LIMINJNwQqkrWYfexMfS +u7ejtfBf04dl7oAZUrkMtVAKCw6obwRkjL344ZIeLu8I39wgCghIvzr57fqToXhyeQBVK8Dfy+Pz +7h64xJr6ZsSl5cBMEM2zURQgivs2UHt8cmz90kka/fBe5SCPVBXXrbuiTboFAzOxafNh+PtVlw42 +0cF3lQiHOBe6miNiAFXsy8JIHJf+nS/jJeKLVO8eu72b7JUSuLVx51qWL8DeeNedrfcQQRfP7it0 +tRFwhHEePbYQf1rL8sAiGjL0qHSvH00HHuOHegOfjGpJxcA8XXW2+xLLiClnDyrp0hjqdOC0X5F0 +7sLDuSzkBqGDNvjQf1vmfHEKgkm26jn5dEPzxK82OuBvICx///BKxAbmaYNazumYDCELz38ZTUJi +iQtRkAG2J/19VdNcF05PFVRxDEyV5Y84gDiEiC/Yz7B/hoduEbGfo6BJXPnjWE6yZFGEA4we7yCO +Fp8RRqQBcS55GM3DVpFWj3wXJZ070XJIUEJACBWcpOxJuqBe/xkKeh9Oq7P1nLAsYVwfZIn6+gqH +5nBWDx0mU4Mq13jSoZz8+R6UBcewazNKuGiZ0aTqmyRuH6+OIaUJ5cZbtPRKaKH5FHqLwGZmYDa8 +pGxjHVJBua4NUDNZeRN5Y85762nSDU5qHo+6FGnlj5iT3DnbT9uyrmANpzl871WJ8vvVC04nvwqf +IJlU0PJvTg6B4z5bGUMMDOlytlfJoi2yC3lNd9nLu3Gc9Fd5+1ruV54HPoSYEn6wlu8jEmpxZd2P +SYJuTvNXNNo0p3bpujjqobJcbDS4dHGAi/0/P2hgT05sj2QsghpOuNVu4Al/neZayA231iwjfv+j +Of8Tl/DwIF8fC9dWWBW4sgOe4hcLlZhfIJT2MZgMCODxV9zo3e5edbFva7Oa+FzTdm4ybkFdG1m2 +2j+6H9T0FEPdllvjxgXa0MOiqZdyntQjv6md+Z6XnitZfKS+9HP+cxBVbqRTGnsLoncZH9ce6vCT +IJ6woYh0IGW1ZQ8a9oHL9XeuPoDxRu95IBhS7Gznlrpg8+DNxX7Dppua+4860Q3LV0e33fRmTgzq +XKr5dNJDhW50KBvslZEIJQkUnFB9+I/x2SVtsK/R7R6Raed2rt33ossO0q8ErKfb4R0Oz91M8BVf +LxsZwvnpJmEuW/Wb00Pz9AiS1RDYMCWar9VnEZZPoVHt36FxMYF6CQq3Q6tJt5aCWlQAFxBo7kpx +yGATwCN8mF1OBjOJWDqd444/XsFVIodgwrRtuQw+7JODq+TvPPUGqTh1+ed5ki/iw3moi+YYRNu8 ++6FaAnqza1VBBQ8+AoNONclrCn2XR4iSvL/wLQHqwEhjfjscjj1Le20cg8pLFPygyEv1oQRZiLZp +Ua/MloOHh1jF+avJXHnwNC8T3spESateNlLRnDZX+PB1auMzxjOjMrDVNCtvW67vmoD8LCXcKKZG +zeXcY0/txwWVoNG73mwDvWR9OUGueaqXUeb/TXM8ywuC9fhfbhWcQrVnteIrGwe9+97eJIVsGFma +tWBYpf7M0SsKDjN6w4oqeVkn1Y12Xxi6PCknRL5GbQ7G3DYAXFRNFjhOsBuPRuOdeARHmJRLhP69 +UZmiJ2/7QkPbgdrf70uXOHoI9eQd5i8Bfeef7oe8rT3vR45Hmid+99BJQjMmxCVd8iz4VZUN3Cin +/M2ittvuffDkP2RP+OwJZElAhzNUe+mCxeNSIDyD3ajgNlJHA0ymMOQtl/Cxry/Znad5YoJpznMH +zdmDH9FwkTsUogU1l7W8i3OQHwPNHIGWteQq1DPT6vT0+MLf0qn4NeNbLEbnRnJLec0A0FSvQszA +lFO1vMqy6L7pJ7s80V+1JLKVfMJGK5jX1lcR0i4wUECZWspqjmWoiIiJRjPtVN2QFBlQSoU5Tm4z +yAOY6qb7x3DNipZvF9T+4NylKwQGX31Ckw0+slZX46nJxSRD9KYXDYtkJImB7RI90RCGo7Z7VRy0 +XK74GdulR9dd8nd9cyHxlBp9jZJvzjJE0fCDqtVZuch3Qch5Pcy/jE6baD2MaO/TQJe1uZnZlM6F +vnOOZyofasW/MKr3ivvu6wrE58auwZhdcCCkIxqikL1ZXEIak63mgchuENq+vJMwOGmLlBF8NAYs +rq560wGqQ24k1FXpVqhAV8txXK1PmpaK6xyKp0WXbCe2wmIKBTB29c2R7H/YUZrcf0hlEqBhUtJz +RU/aMLP18oVGER5DN2Nl7sfqTOSOzsyUQIVzbMBeKEMvUyOUQ2tycID2Y6qbGyzuyQhu2Od8ho2O +uLJTnTtHwtSqY/kQ0HvEKwPdnxxHdHwyT+xlpqctFQd4qQIs/nlsS1tgbSsuSgjPD/uEzfViHCk+ +05rd7ricSFmfu6tl2ihwh/VgKqim6Z4y1OoKc1rqwetI7bazpe2AONy9Nl77WmHzCSgasJY9opIs +LFmzZOLLZm1aJIcWunX20jX4dg6CNPasI9PZ7NGyN6Sm/NzqIgKYtULZXEmkSP0TTFv/MXrWHfgJ +P5EkhnTjJ2QekpfC5p1hsIkJWdP/Fnj2YKwBCafbfV6uNjM0tPlI2cQ6JjsYLnCS17a6Yi5CLlDR +MvgXieOuqYSm4MMGIM2AjSvjK79BhyZTdfrD8G76DaxGnyD1MFD0OlqghBvOvHsRwsnggT4keaG/ +Caw3gTctMpcS40aFD9+PPfSOj4mVEOhKWVE/aqRSPdJuU7bZ/QRZuBLATCS1HgyrqCphCWQACBuf +uJnQo7/D0QValCY0GW747GHzjtZcuRDGwvwC7wbh7CLCj84Qn3x2BMLQV6bG+kpdngeWpujI5IWY +mj+gCDQYoG/cpUU9AlkdO83wlsADn4uxjlcr926/yC+FIcIYQ7Pdc7lyNXY5ZlUGXGOu8gLqdV3Q +Qf+BwZsjSg6VYG922kepzeYb75TjWHhMA/xJKCMCFxpNqktdbKqL+LHl+EmMi+xThJRFOH6jfAZg +JNGbcD9GWldEgEZ+FbTB0EPF4Q3NeT8sa8RSqeTSfU4eS0lC+RprXfFavYKKO+w5OFz/+X5MOzqM +cATzDs87eVcq6ABUOD1HsH1my9m6yeIXJc4dbRvuFwMtLQB+2cqW+gBNVr55+MQRPbdeV9GtLZLl +KX4tvTPwliKvJSSuE8KiWfcZ/W+Ahs5K4qfJjiCr8hOD6oifKjr7M+kW9TkHcWTzQ2P5o+E9gAsH +qyVryPdOFeV1st8F9aamO9LM7tvqmY5/WDSoSq9MTBcil7azQWXmtGqq+p23eLOMifARhs8TJl3C +EXkBJBig4HCagVO3OBl75KerKKoMUT5uy8gyHq26i4Xm8ahrLyBs1DrEtKuGXpUHA3rQfMY8iy5r +WlNi10k9bX83wxmWQe75yqpl/AQxrcW0SJx/9n9qqdgyAnhSEgGGvA1fwHUhivOAMk12eqFvuZhK +hQ0OYK4NOHV0u7gC2tOzRIxbaNKpsPmujQqLnZ/FLpqsaYCVu6rF0HsMSQQ49KV459JGKVAXeiT7 +BSqQ/KExmuEtvdz5s5m7N2VSwY9us0gfWGRkp8q0srW1LNiDAxvnoezu1KI6ShBdEkmP7Pi6S3iE +ZJ0oXzZobLgG68d8tOAZC1OOkum/Y1vlI7xJEDcTUDtPRDpFY257mZq8b/F0lN4vMfFhRfjAaiZg +VBko3zv5PjL8KNwgTIWwyEO5V7Gnclb1WBQ/OL6wkXD167hnClY6W2ocWfOL56HCf07GmQTwDPTh +LU931mIhXAqdvGAFSwLuDAlKm/lGo79XzJSed0ZmrcdD/AaInP0QsIj1RkCvTIPlQ51TtbRbL25T +HuZzOdkzOOthbDladd1RU6F82LeQmONphqjNMbFh+IpwoK8ALTuVt0rEu/0Ca6ru005FvgWmMVaF +c4uQEv6BkYD6xq/BRfeAWO0HKzr45qPb7QJz9UuoTFa+XNKgX0HpTQn3rHJtqKqIK3s7XZKH3d5X +3xvZ7w/bYs8ENYDRoeui55GBM7NeOLYP528gZoXJYdRJp6MEsi3ZWHSQK07E5P8p8QJLtvImiwT6 +8dXCltu5NYErTjPyckEoYqqVMqgERT0YaW6naKtUZe/pjKqd8U8bMNo3pQzKWnxxLNggDy5uZY17 ++ceN0pkjZ95u7DJhhJJaPyMewt1yCMfDbmosGgC3GG961CKsUuvXfLO58x+e8H9OTy5XoXdjRlA1 +l+QUDjYz4mY2oCE5GF1Bz2UVRVn1trD7QNyIkSYSb83am+mjS3zC4uH1hoWvqPLIhcS8O63LOrrV +B0fsg8pMnZgN7nld3lAzgbme9VXtXOiO+j2iK6O4U/KQZskl3TDf//r/cljBt6kPZXsKp73FDrUv +swmBHpGHMUoFTHXHFXzR9HoEJUp6N+BfZLLRoT4gLX9OqC7E/W+TGWW2uJfGuwEVwI/6IH8FaHTU +vYMfXbAV9F+KOCxEmEsvO71lYBjCxY3NDWiUvscwwSHFq7b96VSXkT/aRs2s3MGUTzvC/v+WpRL0 +yFgqlbze7+utWMWw3ISBUMQv52/8+6jT2/JVKgrOPiw0E5nB+L9zLG/yknSfUe02qLaGb9m/fWSs +5MDjsYDsCJVCOtJ1SDhdGjO+zWBOEYTjI7iBqevKstrcKGR1sn8lSW3IUexFuMCwANmlmtlxnVuY +mF5JZQ+5xRo/vuVxaGwmAp49O+AWT/VhplZLEpDyHU9hd7hSavVCGUaph2e++nEfSbpqVysI4ZtM +ZAWu3lgeO/EQRS1FTvt8yYltWo5U3MJANSn/IwngXuqKgoH2lXh9nhdSVfgDMhwb/Fu+cth2zsyD +t0YLWGrEfIw0qrSCKQF0cSCQ5VCVM/Gi4mGJXxT6XmM+DHkkae12tSYVKJFA9xw3cGctF7AwBtaV +ZEPHdCX3//f797IRkLifa45mJxaAyq3exXZc8VZ2fzRrInFZjBnr6C0IoKLWWQkvfnP/JxsxZBUR +71gz7j5Qc8Gan56tv+GOWYMfs3Gi26IScmwtrGCtwgnrUP6T/jxWwVRnGKxHpnhyRDk1ct3sRKjR +QE8pBml3w5nhPa9yi6iXnRcx/jclNckEHEtGfiL6uVetshoXg409QlW3H+PdhnrcL6TNosaknyTA +9OuUtIkF9c4ixzV3dtG4uLgvhUucyMPxRjMXGPzvo2WlK2QJMt3zYfTM6jNjp5h9y3geolV1ppu7 +vpbbfVJ1AEQjchSMH5ywBJR0zw6vaUbiZAaDC4dJl3pX55GS9YbnAuJIb3sf7oEofwRagr5xC+Ki +oV/YG7XkxwfViXs9DevbL+839sUMOCupeMLawiXRpPKKyHYro7lfDbvHI3XkVhjHATdmK93C5Vel +SJxjwXz7L8+IUe6XZ2qE8xWc1OgxYGjb8bwuKHDxMRdl/BeXNxd9leyFXIGbh0g/V3FDVKtaRCOi +vcrHUyaYviGymVnZmP+0YhNOM1C/k1yZJyTLd1EcDw0OXsM4XDM9kY4vQlERrfs6fbJYByElWCwc +ahbOIZt/fS8nZXYfxqqwhMBYW6n1fhcFMiDyZPhhpItlIdcb9MvQvejB2R/Q02mpfKangS6cd88j +3u0grD016tJ6Cc2qpXJVWOvpJvOT9MOg6VS0mvooR/5lrE5ZpVUH0m1GIKagqw2SdbnWsji/OtEp +XIEYxJuWvErH389GT87U+bXC+ZV9Ur/3952mIl/KknPYzD73yTW0okM8MqGgYQQ6EobA95dzfGCJ +4iHRJzkBAt32a+gdfBRm2Kw6qbTX1d0PXb46sgaC9xs5VGoFb4A/4juenwG+fe1HYw9iJtF108in +PXHkU9ZNq7woiArXdUujjl97a1bM4SD+3u3V9CCf1ZyVYzOifKgsv5L2b18hs+AwLvsXBaLKPztX +DxfprC04vu+cP660xz4MHlF/vgK3ok8pMvOS3bywqc1qz7NfYJ/ez7+u4CvhIJweBekO3BvMrbvX +2+WuNHY2gUZ1mgY0Vb2LXKRFlQfFSh1vYJNKK+O/IKFFkogtYYXEt+2CPhfnRb8oXz2metXJpmkW +2y8AvkDwt8QEAc/EtZTitbwGiVj50nBBc5dxr55+9YHuCX1P5vUAjW5vhydkTqOByU4alWuCZHsU +Rh9KePJEqfaquLHZoTrnMt09NWs5KAxVtxoLB5IervTmGHMY/e0j/oJvbNAWkmxpjRHlZJhfwpwe +/am2x2rCvqomPIhSbc+LgY/Fm3D9jGjmYrh4NAsOGmht7irMDOnbbHZvV7bVqvvNcNJzuGIjiR6m +SeoDd57ZZ6fAobeK/Vt8WT5Ow96i7DlYS/l+3raASWLxSobAwpReJfQ04Ne3gZiQV+t8B22F3LBr +Fye0ZTX/MObxCtSjG7F2XoenTRX4FX20dksuBMCvbsoGKUX0vxEfzdCUjVrpJY23+/TXOupzIOMi +mjY0AaV6ACgIDkvbrhb5vR1vrOoCbqsa+G5M214ffcyRBAks/0bZWH+/3fji4NqwzaIMSw5yDApM +VfRzkUni3IHqdNe/K1f4lvP+xltNU6453bxB3N8BlFks7/BvTBoTbA8C0Y6X+M5tw2lThG1StYKU +Ru/XTQ7b+aG1dl0fmRwdYLZeQUSna79xkklIiYHKOgaCZonTGnaUhw016II3r1qU0RYQeM4neCZc +jbgONct4I5uUIIEr8ZcUqcBlGr7ocDT4NXtheGt+oK053fuFgwO0pxDKwqQUaP9pk+PPK5n7B/C5 +g8dEiMx5kY9/2gyNqFeWUFMV136OqbbHIZ6HYjVUCbRYqbnS6N7G9F1fInU/66p2+I4IqXJtvzNV +Th833hT/OWR5sa66iCmwuFXUZekCU3rn1rFPrgjcMiRDrogVhspXkZ7GVUghHgXXKakZ98/fHat4 +NGdeFbhxNYlHGWbBZ7G7UMgAaE0ivhIpzAyhbhJfpg0l//6bTUkNrp4j5/ff5xFKqGm/Ka+ZJ6N+ +yK3Eo5UkfD34WzPWl27UtiV8cJw9PWSKxYDyb/zzzxmPCUovBxsDvWIfGl1Kj/Yt2gwNHDps9Z9P +hlFuGkLrDpV7D7un8Eoq3pJIxZXS9pW/XdN14b6Utz4syof+MlkaUmeR3xgURa+bATye37TAuQ9V +cFCLEJPfxcRg2hB70m0jv9XP95SexHMxheqMLZrvAtwU+08aMlshphodih7kR1UxeLUnnrK2RXst +mIjUi1XRWXDUI+IIHppkvpHkY7l/EXbZk8Z+jlKZja1yLMgmuMHo7U59t04ZChuRX/n3cWMAXEzP +KnRpmxXKd3Rv4kWnh6GHGZXy4ySNVcviyLAXunYnTj7Lene0BHksSEK2p1vgGBsd05NFOH847/k6 +w6Eqyf5qaVyQ/gksgnQ879FdAkB1VUNexKDBMEhkdSKFy3d9Af+iHEFCEVBaztfSDgWIGzck6LbI +GWmFIIN59bFlMwc1epzOkg2HklY77TzWPeCeFuUjBtOAZ0erEzjREjQVJr7K5Qwh8rt39Dlvi9rw +RQTNQVn9umgbY8YU5whGA6W8ZyoYsMDi4+2yO7/tjltRz0Dpei49S0dIRITYFuUSqjgjRCvePKI/ +mGTsO/ow6Y2XZwC6ZruFE79niXfIFTpfGzb/+H7qruRvoVQCAGyPIX86BRtT7U1K39zb4ZjtI3rU +7m9ZNiGrh6jQz9+AWFTWBZTueQl6cqqdylmb7JknlzfmHh5DJQBaGkgBJERv23JZkXS/qejGUl0s +CKvISCeobMtAZo90eB9+NDzx/YLcbRg6v1BGZ62Kq05Vs4XUReQPkXyGRCeJDRnNBD185eBZdCKw +LS0HTNxpry8PnWg6Lj7vg7Q8/XgQcjKd09AHJjwu4rOw/M7PhmhXxomqRfDxPt0lh5DzzN/ynhf6 +1CCfgiHh03kkKBsDaA4zhRYomdIkDkFsTMY6NNajjQr4oWFgNau5XlMkdnZCwcEz30A7TSpZJ6c7 +gWeI3bd2Wd6yh1EoMtAuv+5G7c98hwp4L+I/0RqySZvO87v8kVaEtPZWc0Wh52T0VUE5nKWGger7 +cfZMWhL7RH2hAkAoR89mHNO1l457xUd6jWN6fAavK6U5ZApMYmL/QulvEJMhc+pLrS29uthG3C4r +QSt1kPSNxEVUTnfpulSRVM5CpgLucbwcf6elNC58vYr6s5zRhvOxaW2ZTOZW2Zs0KbIxPqDvoP6M +yEm3JYkWTLC7BUPADggprvaKpnojvXAXlTiAlysLVFbVHPZW48/qL0XaSV5Uey2UBDdFHMkfgS94 +rpFvKnCe7Tj7zJlq3r5WMg59PlxbBusWboT5fQmKnERzN+yyi8fcTvfTQId+bWQ4wawDWgobcGUs +MyH4zGPyMQV/X4OyaxxfBj6IRCvV3baejFFoNZ1be3+9X5HGVHZUQPFVit49RLcZyBK92fcSEKzl +P5fxgr4TZaSrx+v/PRd8z+UTxc6BjkmXFxck4w0JTPPpytPxJmsdmj+Si3huI2Z67zgZ0Ut9d0UH +cbL77ZNx8RbxwR5bM6POMrEg9u46UOjmUaBRwwhTXeKgXqbrpUMJyt0Qfxr0uS47+IqTnp3PPBWr +JP4EmJH81CVnjVXwYNBYivwJjor6geDvWmBiIjfMvjCdAey8EfOIyxGtYwPVKncEZ2TCilfnp6IX +4cL3LKqMqPW0c1LokJPhV+7Z3aM2jt0bK31/6uQZcLWTlzKcgRAo8ikszVox1ZbCwBr2gG0+G+hz +MPLq5BFvPkffv9703FfgcdmB8kpFHerEdG9Uzf1JofPPWzZic8BapAfMmb/bcGbuc94wAUHT+ecD ++KDlgg1/p3htNiwHwLCE+cp6gsK5My3Lon6lPVpA+xOHKM463htkYoufCkQz9VlzMStkAtRbtyd5 +A5eQ98hnsX6TmFQ6FboPlkg0ddQJCnMy1oMYsJ8fOE+iugOV5GJWJVjvmwU0AxDEP95tSAVsRtHH +UZYuKHpysFbzbmBnLZaylEF7Fosh/dgzqNc5vfxyZS8hdRuYQWi8wCzPfEHMlXelOFL4Ikj6w+VX +Hu7G4XIjfqqBk0baURmaHikBal/nLwNIIRmvgRIWT4psFiLQUebDfdvQbQ3CG2MejIAV3K4hxpuX +u6wWWfrHPX/OygmdJe2NxurwvwpeOA67eu4hrOKBvaYtD+SRBl7RMV8/3D2BP9xj4arQNzKgkBfp +duRg5pBZcIzSjFAeAO+D8+IEPyfCkEMoc0KklQbPlHQcV95weo1jPQRcqrbMvZHkpJrDwe2TdCtN +fD78lN3UME6WxZgwsWVrg1GgRXv/9jOrkemR5I3p2buqcnUycKtlQhc5RIioPvPvOAMwi8USWBH6 +5GtB4YOLVT1kazThEA/hIId4VoMflBNXdUiQNLZS1TUnuQJolPSq44cwZhwMK3e8CGWe5XnZmztp +PwK7+DIEHXBxQ7j6PZkD4FntFyyVhLlL2fqH1r0QbIn4s63Kr+M9lDcydS/p3ca7gBREcvnuZX/q +x81kWjgLZXOIY5lUJiCQuBDCDqSfJUp/Lf4lcaVuBiihADDinAZbMsAyI8BESg10w5wQRHlaA4jU +LVlQ0M5RyMbrLGgJGz/wqLV7KE/p3cvUaLND38hI8wKrdi93d9ujl2Nhv2xgEsDjpSOZQDdqTlvw +Kvo8Qxf3biytZa4L8c6GxJIBfaLhN6ZpJoiL808VgTfMibyAdV/sumxxxCB0QJcZZplHw55o7+dE +Fw2sTyTD3CcegdU2SH/lCTcP5pDVUbwhXnh8C394fYerLj933g/7CRmvpu7zM6bwouGVXJguCuK7 +WQhXWQRwCKu46FWPbamES6EVeDtWIzasC3KGNnvG2Ssuys7BtjqRC6tJVsUONQKH5Gb4fq0347ku +hDbkE9tLmShJEqMmqrFc+NSqEFtmNM/YyGtm3POrn2uQIzx84R0fCsnstxh4l9nO/sSaHq+EE+x8 +pswTg8C86+S43pHsz4XCB8pAUzRcCrkswbMUlAyremTXdn0XCbbwL71xTTAr51RWpghRCLwZRaD9 +E9kV1pBob0hP3MGOU9aOdYMjHSyZzOEBfAsm4DyJe5YnWJVq3soGocm8luefuX0MaLGN+GOtI7k6 +6mLwbBmRJl1tRHuPu+o3oyTXc5uuklQNvPrRrfsMS1aMp+A5FNgG+11bk0lS3z+fDVvBd4o3YY+X +9FmtquAJ8wugBUJ+ImPuV48vEgpAFFXvbWwaFvOASgtO1vg9td0nSUEvENDf8NN5H/wi+VSY0FTm +9lR/QhVR0pVPW8Wn6OI9MjA0aYCMt5JKM0KxL6FF7xlfkVmGiLCOi3MPA43lGz27v0JJ0iPNGnP6 +o7kipyR0AWTyh27eKyaFnXq6R9boLQn4vk/74PXzsF+E9OK5dCDBD5xxctugBntRPLr55fkl04Ey +Lwjc28D9B2kftP7H7AhUNyT6oII+gnxKpzhWetX/bMVkdidXRSOfd4TBskDssq9eLN7FfW3BGM3k +N/6E5FF3iftJF9xLjSW4Z6SBhLQskHVYQQJeicSpkZ7oHf2G0F3zv0XKPBrO7Heh3ZCTMSe7rMa5 +pd2LridxWzdbijKIkOU5LY8bSCjs7wYl6F7iFh6pXhx4Y0H68ALxlqiy0tpfbCU8/9HjYOu1NawI +VXWavgxu9MazS2quby2cjmBawhfEoq66pNVy9m/UMRSB+XQUOxr/GsPpu0icArlw2sSwv1py+ZGQ +jtAMiY9tjttAFnouxg5ud2Cmj0Z0bz6rcTBc52zM7Lk/Y6CdXkIeRLR4o80ieTsFT/TQZtiMSBcM +AdiMwWcpYPbggeTjnSWBBBGYd8pb+/2ndKGRTKczZ1IbrSLF+4z+13WTTNfHhZjW9aYNVetAZPLP +KHjbROlqsduPgp0HL7kOToYHFzlN9BrYCx7N7PtbFE6Cg7N+YefOj6Tx8h8VH7UCdtuPZzqD8jKb +iqaWr35sY/XI94SDeRUCW9YivdZAAsYTH3VETsNZvpYYB7Czu7YnNh7ws4RepvdgBMEAphxbGrch +AVGJtsh9PywsJIiwXSmJaEciUWwIYXijOg1coVWAOg5zfvM4np0JEsr/V063SA8tmYxfCTvqbsUq +LQXuzSK15gzl2nWkVB8+PwWfzLSBVn5y/z3Bv2zRFCxF7mYc3m7OYdwIPrFcKbw0u5oYSehHl1jh +lsfpr8hhzg4+rjKOJg/+X7QdUAGOz51eAn7Yd71yrM9YhLNegcD5chAXm4F02yqhyAyhjnPFJ0H1 +I4EoMs9U2QjrCu25e0BEj/ZTjp3Dao/0nceTgjau2ryY2k6ggXKT5IwhJ1B4rvHyUrwQ96SjgsUV +T8gdkM2wCYH7JtRd3dtJ6usgoYwMoHSB3Yc6l1e7SwGmMqLEOW2KX5+mRzmsLdQuKJCi0K3xYtJp +yxeJ5Q7r0UDCukTv4ZmM3XYq5zncssal4yL1nl3FLo0IUKH4QZqmpHu0OFw3KANEl3/Uz7kV+lpD +oxI8LAu0oLvUqvbtxfCyMEYHP4XRZ+Cjrw3BzKGHM2uiijV6L7wOL8TL6Zxb5O7JXZaognKvIB9b +oDXmiAeIPMCurf1eOU70TFM4nYxtbWbV4rluKVB3O9++K/Ex22ajLroRxe6NBr5oggMac8ZrbYJu +LvuTRJVJ2HXJqSR7X3uzbSLc/agtpqSyFCrledY0cD3gKLjJiIlMrAAWEJyRYuy16T/D5QqBxIxD +1Zu/lcGB3TJu3MCUxWK8fuRBzwRDW7wLrAo+DhNayfTF17uUvHKWqBT2waMM4wuR7p6a1SmhDd5s +mF8v6zbJ+LegAkWzAag8MsKL2uLbCRr6OwZ9Z7bMEqk+31oPoh5jSZW3/x2YbCZTGAMpEMOGw8Rs +V78vFkmX9XHxm8sm7QmIxEL2ZYS2RDi7WaOGuHViMlKsTCFXdq5HuyENJ5z/xaB/yHuF6nP1tLLi +SyQXLc3WL9NYLEvV5e4uyQ26lKatIxnVLpKc0NCQYCMM2i7kw3/NpDcKcM4H2qgIJvsY2Qd6Wtpd +2Fw0IG2xrpiONGYX4Dp5aV1GpK2U6R11lYtjM4U+OtycM+275y2vKPUW6QljTh/8z20B+VM2MwtD +yl8rN9X/k3AxOjsfmu8/rdflK8C80Rff4L+vWhnINBCdbkhA4SAJ4zJPYEj9EfqoGS8HbE+ncjuG +pOq1swbre79bDtA9BKn0qb8DxJY63iC6dci9wu0J7v1pj829d49cd6ifDpbzwT31FV8n6vMyjnv+ +GhJ9yAVb8T/R9ampbbArv0y9m/wESG8PfRxU9voZdJRIrOdUgp8RDRgBuyyPXmDaxK9ykFIBHMsG +IByc5DWk5GYlWYmU24KqWgKQSY0yC3Ej8x5Rb+/t1/RVrHFdCAwhMZ1qFvIEausHYwnT3VbXoiMi +FrIbg0DywzSWfxzRWGvF+3aKM+HpjBCBWA2Am2cw9atCDsOsDMDBdTHfZ/qt9iX3qwsvmwtPVF3C +fUrD8QAQpYcj2hfovcm7SyM2/JD+P4r2u5JNCg1d4M0q/O4l4TGYQYHpAnrUmGIVoLG+g6CFwadE +7Bzo6EpcKmx6+8PVhKIe8xgqS6bVA4Fh9aELwN9aqyfyghT9GZ+PkZSLY79BaJGv5OrC5tCBvjB6 +A1GS/+kyd/XHEsnygjGRui17yY/QLHYQ/k1B2g1dWziKIHCKRPAIoCVH3JkhQU4/jQqIDQmivylJ +9qToLQxOugq1fn71/FM1kWWMLXB6mGi395wQlBWHjbKS5BKZGF0qvzv6AAP4ji0qIrtRGInn+oxh +x6bSj76lyMCqNGAa4+mkAg9Y/u3u0yWyX+SplV0OdYwsVaBjFHLI4K+hsM5QYLn/5NQ/Qr09+Gl7 +uqCK8Pan/Gq986/roBBb7lITAyobnA9lEKwnox+tX36GXIgJOgkpKJczhDlgwqDrkd3bp/GPpsfT ++P9uzgLBMxmKQd5eLwCEdYVOU48GeQ4xmYHwUulE15A9flTWRpDug9y8jt3RXd8auf0y5nls/tpA +PbLc3KUZ8pmA2YZPh47C6VYgJhfPEb9+1GMbrY7VD+x7McK8lC2QpQWp3QBlpFptjUiZ4eY3kBey +oPSrETLN1WhcRe6Jk8mMEroyWO2Vx2fZHB7o5QjdSJ3+4J/odReMPxJmq4JEb0LmWOJVLqes1S3i +6xwuS85scTZoQMGnESl9383krAvu//+CkTfBcHc13Q1BqZHPpc2NwxkoaC2jMeWt1e5pTvJ5hzvP +YCSekIGhedBiiFzr3JCmni/oZOyF8Im2jt/Oza+vIrvuwz7wzPsHx4hAE4Q2wj6RjYlfXJ6uQdH5 +ppTQoWqTo1QbVXlsOIDPZUMyqssZJgJPd1O4g1pAD5q/kcdrDkGjb9H+aQ6gQj7fVVXCWFkWXHSv +v+QfRRMatI5XH5WRnrDtT9ZEcco55MpuWFlFpncI2OPHPHYNEx/KvaR7cMZBZUQfGksupEvoI4Zh +Ad5tezCBiDHjHfBeiPy7bnZQbK51F8ehijCMQyWr6s1oaKH+8iQtCrOPmqZp1SW9K7X9wM4UsZko ++Fd6kGn3DhVKZFIkxyoLSXXbyV7xLrBf0f9HTlnCY4DlcTAvRPDq5cy1FMUKlzbw/cbyDBJMN0HQ +qDz8XuIwLeZSoIV87W5L/Kw9ISHZ9lU6obqghr8ih1SKt0S/SEdCOZf33R+o5MGn4x5mY5IH9E8a +OK9ycISHWOcH4AL1Orag3yUEahYvZbwI1/jP1F6vBY5tZ5ag1h+yV0DDBgir6/gDwu+97QRffcUE +7/t+LHtbSAU1222oh3hxvIyy62p0ph1NnsdGK4VkOfFmpk2Zp+Bs2OV/4EbOVenUEdbq7M7OzW9F +k8BmKxpVXRRCyVSORQnqQvOxFO0Rhf5fOjdTiQYNcJbiCQa8LvjMMSK5CL+LNKWqGDv3Bh7lQPXZ +rDWQ0ES8Kz5eWawCjygMNUyjOydmSSopFeL63+KeNOiUd9feU6nkmONfhA2Bf5ViMLqbPCAmbKYt +bVN1CnBm9wcwrfZlkIBUr61FceY4zUrASiGpzs8DdzI0v8DEBEVgyMnrtc9y6MBTwrCLOP8I44tk +chQIiZZUTq3vuh3KpOy4LBve3VPt7HeuEiwdpo75Ra0bCef7xkQxg9ElpxR5wYvze2vce+Cx2sr0 +X19Lhd/fvZ1EUwCQyJLB0TukrrQbuQ2WccmCevFJ0OPkpRwai3A57pT8B0KJ5anZLS2zljU1QRLD +lSOogA52VOs1ApXUajpySJW05opiwhkYWvRxV2oRrYefQfEeAB45fdHdey+/cllSGR1um0oExOyU +K8Q/xZeQqWehD2z1YcTfVHIHizs7Lk1O5MVkRNYigGyeaGTIEGODwFlTtNgTdn6hr3QJAGTSB8xt +cNQ5l3tFkIYNtISSFLumU7uUrMLKNNnkE9baXeBeruvionrg2oHH1hr7LDRIhTATs+G9QL66F/4K +aIYRDI20gwDPHZ3PrNRz7ymjLgZDjCbXE8R83fB6k+MrbOUeyxjHE03iyr/+2fJecJtKE100WosL +ajOAghxL2T6OE0337QQZjFZbeWgiiaR5nXUdLlsduydycZp9AupLhP6SpBCG6u+K/TfcyrXrNd98 +k6d4flJjiDh0Sx2Fp40mtCC/aadsBiFfnkn2j8we1LmpzK+SGj0t95HcUhtkHXBAPeDQkV6dQTVf +LKLQsBCej07Eyk4jRFQ56iyDvO+hhxTxfvZORc9ORI0djDlniI6AU0pi1NEOwG9MDag7edqnfr3G +mqKhztBCYal4mqkIrp1mdI0zkERSsx5cSGVyYA1PNP2j9HZIO/m0fbXtLtxuSh6bKg9ba6K/ep0B +AAU0jvXsfiXTy+3XF2iviq0+Cg/QTeKCXgf1v/V/C4aYr3NER7G/yyO7lsywafL8wd1Nr/YLjJF1 +15n+LJe34SbNX6C765kUD2PXxiyDWfkoWZeVPkJFMX5avULcCfrK7O8Uo6ME8iw5i8uu7cQA5RvP +6kL19t78jpaJG6J/1+iXsEO6KK2JZZWVSGGzthiQktvTXW623hctjmr9faR6QwCObgEsv4yGqNFB +iql6STMFA3cNGkqSpfZ9+kuke5pOncrGpW9EBFaBLjiiPjohTetIU1d2E8ZdKeKpNf71JiqTLZmG +DlwSwTPpdCgLWdaj95QUgB7Tc3JtnWfPjh4h6f12eT/zHOySEsPOJ4B4qsI+Fq5yMJtBtxEIBc0e +g9SVWhgycPw/PqBmxWni4Q62LLmu57dmVoAe2AaF6Jn7I4zlVwp4Oqw5+eJ7kMpeQjcd5fmrVp5Z +TckOtc1U6UD1zmNep4rlWyG7Oena9J9ne6R2nSSfgtVziTO9O2BCKE7YT5+Q68p8aW6nhZ0+qr74 +w1ItNl5X4yH7GV+cYKbGzLX9Sh3GmJ/mQBZXXD/rJKwP+Mo85rib/Bv0H/0yaywgBioC6YKMntBl +RlxMUJxsy3Cac+2/qN43RtAmgA8lOjELlY/GR0uPbO6ei/qYdeciYDrrApACji59/VhreBOk1zeN +oZXzVyg0IkgpPVQ5i10rSkbjIMzLPqtVJSLXCgrjVnOW1vJcYpr+LEEFqPX4Ktoqm5TZk4bYw8y8 +QVCp4SQwbHIQ8H5+kbjpW1Ucj0+Q/j2aA878LnHVZIwfRLP3PsbNRLEyxwSB2ibK3AjwwQYlmhE6 +4FpkIbk5ucYOFjaO2sibuQNGZnBYbWutCdHnrbvPFMLjn+YGVsvdlL1jetmLGOXi4y6WXq0zyqsJ +kQ0qYqwYJxbXM2bcZrWbwzkXmTTGfHfB0JuF57ucvu7td9sGRbaqsqwDDDptCQ1kQJRYsldbyHXD +9n3sSRq8kslZ16GRIkdUXwYGUcxfNRICwdgzZHFWMmlXxuyCx+aHYNkJCOvJKnsW5z7na7H1frgu +cWfQagXUh9ZSyoMiCMGUlZK0WfeHbh3V4SyIke5+o6YgmiDlsiaS0sitI7aZ5f7HCgU4S4RTVKkE +AtDgeq14cH7+1RNfLqqcPd5ubJLFF8ocVHxbiZIcJrs/TThcBP6mXVhgWeJuCqsKnXBSL2qskzKT +u6WUOp2g+mRrmA6GNvGA2B59J56uBmQwcONLApgC/9yuNTIwuRD5HalpXjylVhJWO3hGrwk7NCfP +kyk4mLH0jY16n+th5do9YMpsD3YKHjrZh6IFFzbEZuxIQ1YFYu87xWWYJ5xywG/+EPFeTCnI7Zbk +QuMskWi4CyrxMdfoVI+fTNJenBqzTFxZsJxIm5sWlKXeUsaPetgbVc708mOa7Z5KNil61JhyGqGa +ovWTUwcbEDuBQItbJwqIhRYSDrWw4/Xxv/B/seddXF5oUlpQfcOl3Nbuy/jVaGThiXjBWhTtgyRQ +zJoeaZRiqoKbTTNue1wnldESDfiEsgb0QSN4sWMOT9r9Pn94hJzBjAjhBJ6pjAiu35pc1Ctxryi/ +azOtTC4KjiiXMyqAguskanXXieUxVkdlQtHZVX9Zhs/+eO1U0kuxy7FlYLlfuYFGPSjbBI3p8dRp +UYFam0FMtlrQ0yimE4S3G3jfJ8g126Z3mo3gZSbRJJ1KAWox+F3kZ+gFW+py0RTT7k/EWPblc/eN +o7Q8ZOBQJXjXOldjfr0I1hE+iMqpkZoTDJYpykiETzmQexx/jf/efR3/IkEzer3+WGqp0szsnohE +9ny38I/Yo9W3fTRm7ylaDANKLf4Fdk9XAC1doCzUJAb5wtPbdPFvZN1deanLoIwB1f04L8wl5R4L +2dP1KFdczCAAsIS7+QhiC6CVqD3AnqfbNCG0yb13dvjO0VHi9jMBQYAiA3oRaQx/ngukLjCELV4X +baDX8MivQILNC5cSiRZQkHhw4gSzKyLt3SpWpJnTIiGfiTyCv5gvwPO6Sovp1D/+obqEmLS/Tur+ +K8QhEwev/2PDcUqsCL/82y6aCBoYzb/0fx5TQH/RzuDUJfUN16wXbUZSmOn+qqGp/8tTU9Qjkop5 +6rpVnfg1cUsw2+7WywKwuLX3Ye12VRe7aXoKGY8igXqyMdH2/0mQ9f0Xh2BPwDfX7SXZr0jgHTtz +OJc2YRAaaiaNBdTpmSKaprEii9YoNhG0I231T+tonNnHEV3/OS6INZdALEwjpG13KzCdPsK6+ahJ +KBE1CVZFFD+H0Xm5oiJ/DY1rA7XL1FSIgRXMBWkq/84dvH2q+sFQAsdk+GqADazgq8oVGg/1mfi5 +dY+RBTG2eUVrcqdiRQts00ilCuAZzx26uJkQkrnSvBxVlGc7jbZ3GgrsA0kVGX2lv1bh937mZ9Ld +ivjgS/T4WTXHEhSTiVgP44NHHLptEasKCNsXIKYGyUVH6v/WSl2qKmyFAlF5WDTDFgIJPQQr58dY +MPZpQvdTRrc2yjnjS9A7YiWxtTamy6orET1oKFgle9X8afGBKmAYFsFkqOQFEVRa3T1RTY1UiigF +WGW/SeBjuFRjnnOFfMvoXqrV1lXqPGdQyKxvUSxIgQzwmmZe+6zjxM/crAEdW75iAtmgK2eEkY8n +HpMK6PAgywsxigTAtKq2YdN8hEIR6GvrnQ5kFgH5Mm6psG2adCkfMlM0hMSX3A7fBWIzoBwdrvCp +tK2LuylBqHqZjJNj0pp9C1f+uYP1C9tIvsWL44VHrGSXf21OrniuSFHJkECU+ZON0JlpeTakZkVJ +DiaEo0Rh2LVccxy5AEjpGNne7J9sH9lLICfg2CC7NLsMmAt50UzG+j4xJKDHCemQf7AdQ+dQU9AN +WwTmuQfzdSiZB4Y++zWQbcZxg/+NZV2cdF2Q9/BWvqCBWbmeDtAJLJEZqxHotaUyGm7PVNAkxNG5 +cg4MR4qsx5yycDjWAlDmmiT/JV6fe/L1OlU5J2sicH18YVNfW9Uzl18QwlmVExnHQwZQ98opAk+M +npOd6lv+/0cZwo9fnwJ4s7slzPLz1LztV0d0MJXYZaiKkRjcIaOzBv4raKNBZMDRQcs8/MKCUPZh +LDEnrbIyc/x4XE6YzSZlVsTvRx7my1Yab29B85oB4DB5ScvFLxRkpk/eTMzRd7HoW8lrBFI7sQ/+ +212yMl+WSbCvmYF+3V7gH1cxuHnqWPDCOTiFpnuDBcT+82jSs3f4SA8uskxG1IDJtQLxFMJIIU/j +UKGVSr0a2b6qkYAlZmldj5F+XwAZTXga7HXvw171mLS/5o/d0/34+XLijHQZ2y9wk3Y6b/I/pc2Z +NBpkJBEUGN2nSY+r3x3Qh5AlVFlv5NVXZ165RfyLnSIEMkMzx+NNmTwzU5CFeHTSDPhL+ekxZEnF +FQoqsF2ydL+AgCRTNbenONn+RhY0qC4ro8BubD9a+QXSm0U8aLUWKwvdC/FqCLMHaSq20Bx7CXqB +ZGLnHgHjt82pVdb9AUeIRp6LSdiOU6AfvWUojKw3ZOWXzFjtknF9SVsutNUVyqEGzr+z1FBNdrj3 +kW15Bqco+ON1NSckNcCy3lQmheExd19vXlcNTa+AjSHJNF0JUN6ld9vPeohy8j2pFHkmOlXzwtic +9jxb4x2J4OTL5kOjPYlB3TIdsztDPvBBp1r+C5QENgjlTEYIK2v/zJ/D6eP8iQJ4A9o5rjXOpNme +PGR3OXQ0B3t0e0rbZbLRWxV8uL0MBZZbnkpRkrKHaNDPXB1b1lqYCaWbIlSmG4uQfCu9fqadOZcF +0C8HoKeyt3NS6eOIy/NPxtOfWPfUdyOdFNoevt5tRSlxd0blNHTG1UMk2pwkTodarcwslu6REVuS +U+FI73dBO01iYEy2N73mrGXajNcYwhIrDG0iCx+MLmzPI2TuNnsPo308btvnw7M8e0jlSGYA7o6l +/WSgGPQncWoHlRT4sq+5BsSj4CxPZhbdmIKbKaikd/bJMuKP6oWtjhFgStuR1/KObEn7yWUXyI9R +NFmA+Qx556LimV1TdWLxSjfN2Ekq/33rplkR1Dn4V9bUZNMavCs+x5HX0chwQ0a2wTM2Ex9LBs1/ +C9rzfG3hi2f1KOKdewVdjpSBSN72UmaffFQzRIHDrTVn6MsH9hzF89SB6ZYbgabmFAOqdZeP56Nd +DYXjlZXr67rFLppF/5xkHVRgIyBGMqq4BijLMZPvEhdVk7ycVbG5CE5hn9TbVyvFRIgqZw0i0iG9 +6nq4sLdwNvdXmB47LvoaoxmxjidqwRBO6QEYhuyNgzcWODU7ODf1HJlPZK09n1Urg2t5VnJXrMc2 +2dGjDdZqj4a9xaUfJFQS2Sp00/+36zDCw9pKH0Iey78riy9MfkR26HbmaqBvceLdAoQXJ8Riz5hr +q54+Vc/YXEYLkK/4RFTaBgYzHH6WSwMk0ehsaILpiSGLIq77k5vlq6OJOUgT5finy0wxdNhjMUVx +C86x2nSTijK6D+855BgwF7FRw4r4ThobBWfpohk0vu5yVcoaWwldikwYq7fbsFYjZZgZge/XIbsV +QSm6QZe0y/ZHK8BzhlXCVIFA+dIT+wz1bCh3XyO8zGGQHqCBJGmsWeD3d+b40K2hB7V0EH0uiTJI +ily2uWdakXB9KPT1QtUuKTNBOcskefFdcZo9kU+HiBZ7J7kQqJCLjhybShtHcuhag8QZ8QwN1dDE +guU1H2lX3mWIvhfB/AUPhHcMjLDwW60UZYCWNMNj5LRg3rARm6iz89OJjFqk8RHxbZLBXxcP40BF +288ACccSb+THk367OpBJkJJI5Dd49w3C5WflUmFSOpY7r3cBf1sJVSpoKaudmssSWcByPbiTSdR2 +D0BQq0gG3E5CqdtSXbePTeSJbqM934G0AS+Uamk5kkarcrk0ZRE2NJ+sTcmXdXWEfLCVot/OdlxQ +zr2C1xXuJf9+e0EwGQOi+OlIWxZbYiE8SGJufe/D9GOx0+eWO5fZYbts+LuJgCcVdpJGppyhzCSY +zIo4S6sK4MeP0iFiJ079WLLUL3cN7RRKZLStPVRTl7CUIU+hI8M4zUDeYfWS8JxNeqr5kCVHkvWB +o5N5rzhhwGHIU8zin8NQycS4AnZGE3OzNHAso3+MKsjsknN35xuoaSlnuu7BuYMReNhYBW8D74F8 +QXr8fGEBXIuxGODx3N02U+F7KdWAbknZ8KWz49WFvvY7Uay8B9pSWVJomuTnZ43gBeBiDpIGAftZ +Sdgpfl99H8y4t7mQj66fmTzi88++IxQZxdMux9Z8PdcVzRi3MS0kY1v8edrAZbujZWi0GAF7ynkL +PPro+CSBmGt06MD5K58zRJ9U8bFDWFo3dfSZ6LApsw4xRolIfbHdnLC8TcbViC91TWoIA1bHQZQM +cNPQkAmlYz8G+Hw+pjIIRuxUcXkNUIUYMMtlFkCRWqFAbzyu+ENmrCuEp8P/B/zDkOWeq7dMkge5 +AxS8Hq9x7FbVNsuqC8VKZbzxnVXPYgUVxbTBe8BLpr72qzHuBmU/QYRZWaHzHOC1a3+XTje4UQ4e +1UjJlpCN+/CGpk3jKd1FEcuvjR88/vgF2VumE5EC3rcnPdY/HQzX0bv9ECI2uuKmzNg4jTS5k5jz +ZY5btF2ijYPgQCoApcnHs9C0GqvTXu1lCsR/3gLY8X7pZNr2Twed4JXhkr54mK/I7m74ZRYtwuqu +EnOfb4ydMkJi2eW8jUB3oMTQmE1xPRXCpWik4dEGlgqBe5SgPzG20RSPxHvTwVeVm/X5M2F8rpjt +0tlL9Z/ll6vdLmQFOQHEFGhcumvaW5gWAFhhxxg8DO5q5FA1S8r30ijiMDcZH8IAk8Uaiux2SmZ+ +/DHJyT/Pd6QQ2PB0xAu0l5rtoz/G2v/KN87ZbckrMBRb81ceKo1i2sKP4j/FB5jtSENN/H2cdmov +cvYcrerOZyOOumUh2ogWSzhibFD01dwxBPGqaF+81i/CQYhpT+8jg1Y7fLPzHDNPBiZcoWIerSv/ +USY9lR6PuUi+ritiJwBk+xpccsSWcHEflfK2kZK7IpucLo9dXDXqr8DDcIvsI9UolsAcijef0ITQ +WXasDKKuUvmLVJMbOvZCCVeZMdNkqLow8xfYJaqPiSSZCouBtoHS0bteRDfMRFROP8tY6ulf686D +ExdP8bbC1hdUPLyjU6+P80Net5LTJM3zhMfewpBHgxkwwLDLtBrLwTI2h+VRmkM2KMi+k74sibxY +MywKOsfE/LwGt0sPhNVBrjV7mUV9QfkGQQPT8XgqsRYGUGmMsiprgsaVXm4QS1IjyKC1MjwvaDmE +vte8JUCJD0m7bU3aC3h9UplXhT5VpOHAObeRj1p7m/9X3hRbUP8XAXMZ43ZtAYcE9ognkDy8h4HP +7fWaXO8F6edufK23TtuNAv3v5PF6txdC+TzQI2ONTWLwC8UQ5kKlgJ+AwmaLWBq08Fkc9P32CkjY +aGxQLZxJ0TQVtcPdsglWWXpn9vGoITrC7XBehl3XjDQKKlz5q4/0Ent281drPrf7ixFOCcDVufKh ++ox31CNc+Olcfx6skfQ7CSizSyfFq0hSOl3RuUsCPgcuNSpnrU81Lr0Kd1N/OlQ6VSu0XefnZJbg +G8odNf7s5y+wb1UQDR9wdZQosYu83gY2wZE039Ui6J1IbFdOCN7uGSMidxEBZWP4Gw3C+KC5ZDBg +A8bPp4JMPnenIvJJtl/AXqj4+nMmPHihh6MNjZ20M7haQwhaMtp59QlAoFZJBZRqE5A1TI1XRQ1/ +KqRTWBBf5Yo0jwjJi3S2IUdZEU/s36ry0Gxd91AqaUw3dCoJENosiMfAByiZaqnHllw0r21z9BNP +Aw/Zg7V6hQfGRwhyljqnVC+q2+yTs3f81+D1Y5L1TGm0HHEr7GvOnwuHDQT1cM8IXlmOm0LsXws/ +SxOtotNoCUUHkYNgDE8fpcCXo0An/qP/BVO0kg+eOqabLjQ0I7PIs3C0NUa2W6Lenx6w/M98zmsv +L11j1sDFUZLv/AtNAHoy1EMMiAu90abo8pLtLZ+3XKN4e+IByNNOvqmxqoAgungat6XR4dqQ2n/Z +Je66UWHWEppv2Jo+nqgx8HOeiJ5s3Z7MtT3M1EXbjS0FhgJqtfRjsGvyeuuY5KwhHU5L8uLAVR0c +p0jQniN6RFap6SRfONn/ndmcDBOSkBPQwS7LDLREJpQwPWQIJH6MXLxv/EYeXEMxZbynCbNqadE/ +PGcHuZjyPfgczL6uYu1zVh8WHDLvqvLg0KGseOcefMO2/lfsbdJ5fR8J6hOk/Srg3xIR1VfCzsZP +/lq7a9AxfN19/InRlmeHNEhSg4iHscKBm1fQEVv+NZQRU2Xujn9wGaKv5fNCVK4ucmr+GH2wEEu7 +mQoj6i5WIxjXMnoPet7NfUWf2XmZNbrF395BdJN91I9xqXOepYSS3BEG4Xnot+P+bTAH1NJZgLFj +GtH2AEu/e1IfSgAoqWArfOfVhq5xoV6dGG77MlrcKV1EfiIwrJSN57qYRzsuxOHTaApDAqeUNK0a +W5MKjcE0tGUmRrk2gykEoTwOZFSjhUZn+TxAjLkiGlP8/3QDW8ziYY5Xl2/t9UuWAKT/mozyRnqb +7VvS6benBYVmdjtn7EQUpRSi5Ft0kWe0fKwQkfOhxAzBb+1CUcq4+CXtV1LjvF2YvlC9Zjb3hk3A +jf7krVsAkp7ut1YUy74vpQLAA7yIeHVC23E4sZ0h1QfBn4xwktynq0yPUp32mppFvLgywc0LWXEf +IPR9Y235t1t0aaoC3OfEov0TPMhU8w5PW65upabY/pCBmrJ7E9fV+tct1rxRHevxbVHHYfPcru0+ +72WQC5BPnmdn5U+3Rb7AEEDOtWyVNrlsVV0bXsAcwm3N3dL3PsHpV7ckuYCdcE1wmswNByTw9H9b +QFDg3IZFhgXte4xpo6EHjjfxfAgJ6F4rWzzQdy56u3h/ATqWxPee1LPjRMWPkPKkjMh//cxbuxed +AOZbwwAc7MnYrYmEJYiLNyTSbWsy/dAqUovjveRtl++HNuUMjfQFQg4ja2ic15ZKmEbWfGb9FoXh +Dvnwct3oUZfqFdxVcRVYH1L+9zsA4cdNlBvjkqn1/4rpcoj3GdQN+5UkiT18mIpgDDABiR0BSh0K +VJwcDnEsvLv4SktLql8pa6zJJo/NrhV8+G1m+4cRqrp9bLvkf6h/Vxy1FOFFzOp0Ei1ycdul6jtJ +DpsbGad4Z9gOwpuO1HMMvXJzqX/xo3KBLBxG46zZ+EMUdgjuzknCzgAaf6yiXR/cDdDajrtrHJ/v +YWxl1NeAB3DPqmx8ln0mkFEgmwstZmDJN6PCN6tLTA44FCI4H/K54NSyNadOHXvDt05NoNpFxuze +HhETH8VqKMDb1VZVGdPUGhhUwjrH0lFbO1vjeUCQFNWrtnUun8+x7yiRc0Vs8sjhXHDDVlzzLhny +ssK7rfp+d0Tl/y5U7ul5/Tkz7wBj4Z2wLD0x8eZzGziQDipxGXvCCuADhYgQhebofsCOb9elwNfc +avTCz2oc3cPMKdSEeSatWkYrSzZ4rkucrxdW+UBxQXdsAdR4bx92pK+vGrKOG0vPYKKcynJfm6rP +OGKWgE+6PZnuRwUisR3rHjP336MTE7uCkDX7zituRULFm+4R5+NYfsTEBLsXgzIGnNeu0DJQ1O4Y +C3kuaTlAx42AdVW6FZuLmjQ4j/UWwSoJslUIR8+w5qodCEO/pt0g620CcFnu1OAazxCsJxFmGfv1 +UreO7WonBdv+qHtlm4Xmw/cNTFo6Dp6OthRnPTTvrBy5UMi37G21GEL4EfcA02W/3WWaZKMIC6Ge +qDovniByNLl3k77qAePwrUPVpn0hFxrRsa7PTPXBTGn/qTK013t1z0oLYmtaeyVno7dNYSAKAc7K +aE+8BbuN9ws3imt2Y/mgPcV0ZrC4sAj4/yBZp0XUx1HkxLAUdN5cNq01D+bJOUXtUt83W2+83V19 +hreKVvF79olObDQtSRUimG3ZwM6JcTpn4HewXejOxV3ev+F/6TCj+62CbV8EXj1pxraxbt2Kq1RQ +Ns3SvTaB3nAu+G7bFDo0bFryGmXp3L6YwykxbxSp1H/88MDq15KawZE4KvYdv5JWR5iu/ROapOr+ +nzoBWXFFsxK0qqmo5pXgRntSsUAmOxu6zshP8Z5QOhFxdZzoPgKaU0aZ3H0Nq0IWOmX3KZDek0le +uwjWes0IhT9o1SSfRadQIUIWPDf7LDoGOoyTbvQTqqp45NRL9AYDoM4hzhqd/uXD9BDyqpH1hObo +7vhdyYIkW6x/SIi0DUSW5SXMHU7ebewkslqEBEX5xRCt8pCLkly7jHD8DfScQD1bi8CpK4oswEmk +zZtaGHx+cs6gFQ4o7M7VwmsJjMCcRcGdAi0EzKIDxN88PdL82S5OJg/m+beNPv4Fx2H1BDc8K28l +yTlZKzeX4wHY0FzXFS9K8JiiSJffXmP+PR1cs6ruFJDglkoLoez5vttu3c7xckQj5ml5dU9A1Wz9 +tEEJx2lxESsguvkoHrg4QtdLbtN2kW0tOUjNH6HY4Rfflv4mCcYMiWsmnDz5QEdbG190wpbGaYA6 +7L/uas8LG4JZsn69jhG3Fy0C+gkp0PIW0BBIQSDT6mYeWPjNLgIMjlao5uQ8LEAMfqSEGU4CuY3g +Y4iMUIoJMOcmfiHF+Rz90CHn34FcHw0sRVIoXeJjKHtz5V2kxbFc1vodK+yJ8+5bmOsmgrFSdEEB +R6GlfQtVDAaOAhAQbnkWj0yMjdbNP46H5WSXSkYSI4YG+Fe6ACo3zkX4xWEu5BTL0+yGpgSwOhBl +UnyzbbgTk/9rM78qZvQ2IwooRV0ZOV1MBZP0v/CtB/ulqvt0CDiLvw/mGNiGEICzmPZ7+Qbr11fi +LaTfUJ/NA60ysoyYTyn6Zf6U4VonEajdwF8RLTts+yo7RO6fbKC3QSlNuZdHD+zEQ/pHLi5U4iNt +h6VheaT+/XEmeuAZtmUMCeTnCruGH2WWeF2irnR6O0/PLsyxB81Vy6J4UcVqaqh/DM0a4fEb82mB +4HL9vMznTttzGSsMAf/R2JrpfOLO5F9k3PXmfHs/KR0LqrKoeXh3q/vpQ6K9mapGuoTI0da187m9 +yIGV69Bp2z2S4eqC6gB/vLycYZbKNmMKBGFtZ3zR3aSceNykwo94eFV/wMS0FNkphgNUmXQFpaRS +ZCCz0GxP/6xf1gYvrahLXl2pFWdqADkmyJgTn8Ck15j6jZpdajritjSKpJHWUI6LFD0V3/KAIlyx +UM/AmkrRk52TOnpbi7EVzaMFgyVua5q6JN5VYuohvYNM20qpsVDdwZgZVvPWZYq92I4GFmegmkBM +zuT2O1l/5yk2BSVhYsrczuhadU4/9NxzunpLhEZmQp2ij1pjMnXkKfSQytpXG18pzIyUb+2SFhMB +GaNCLNshImdiJG2xAryTadyECmIOIsItDERJE2o+Qvu5FGJk0kzzYjDXpFdDzczKd0BVzsGlftbK +dgrp3x+/qFCjbQtMRPlWan2plYvDgs1ITm15gyLYHxYgNFNw6m9QCPUtCfDVe8XMoOPyBStGt6QV +is+q8lVG4zWPJTJRHfX25YixukJc38uiwPCzSNwnnOOKTb2lI/z4ad2/5mXo9ZMBE634Y6d7HbDL +x2QqIpYLa2jefTPDkFN6Ml3Y4ckMNTanhMowy8yF6+RrDpjZp0tDkwv7osEsRJ65jL1JsZFEJ0gA +hT/oUnK17yD5C0+/+otmbMKZwMtHC+TsyL0sg+EgK8PCeDSWNt7KUbSV2anXW43qBU/j65FHBtwb +PLeoaIdivkXWSQ06HWpq1JCy5wa3MypVF6fR3CxO2IInlKO9HzuJnZG/tfXrIhplKQZ+ZB1u5/HS +5WNYXYD/y+zBRSrR5hQbwGmCn0GjVwt0HX8CNUIqAM19u/VAbPocJ9sHX7YJAGJes5uaioBGX55W +IB0yVqEY45ySX3VlDRxivR0ukNhkj4QfY6ZNR7HDa+du8Ims3TPHDWdJah5NvZIjm37AGI1fPywi +hAEckqNqzkUKvKYvUnUmgQVGdWicZIgWR0WtF+urs8wpCLg05vzkOmI3LmHC+qC8KlqUjFPAlg/9 +JOn/DGPjSmJOr71ioXnSuc9UEHaawXUuNr3oyNTcP8i1CJuSGvdzCRvm6K9Tc27BpshB62kf7rsv +MFmHJ56MPGmKmaUsNr0cGWWbSPjRBjcadw8yspHcC4hOrw+F2wtn1OtsqvcCwyCF5HjERBDbe3Pn +dV4+ieEXZnUwI82K1RY8wUgy8sfld22ZAoiyJc4DLrPFftCj3UFTRXuVsHKrcm7DQfhdZBxkgHzk +YxHtRDHoSik6vPpjtef80GrxccEbGwT9fgRC5O+3BbZ8VKEWwHD6I1b8mQb8O3PmF2T69Pifxwts +dF5BBUSdfgo5l+BIfKNp5vLTVGXyZ9j/dgswVxfX1O0//JKrOcVHdj6N60woI78W7/RmBZYWCize +31nHikuKzqzmZyFojdN/KXhdUmg+tugoMoaYa4ErT+HJodc0wlyd7C5/rQCpL0glB4MX9bhq3jI4 +/H5mq7C/79i1K0NVpBb+V7425/LohEaGs2QbUZICL3aMlpw0JXgzGIjafXHjqTSXi5mEBgr+izXN +LMelIanVsl3Gy0ruBIcT3k0q9Wo4yuVGnyPLksGha4twEWkUyLW8aBe2hvGzPoWsFjK2ltP0g7J7 +C7Bfv1gm5Foz3wk0Tc74u7XsengFlMbDTq8VHSW6tW3d7wUN6ugPnDR9MdUG4bDUUOvDzaB/Hq8C +D9vN8/ThGlRMaA95eX3iHmEJumHQSoL5uFie/UCo3VAUlzjwR74QHj2umqJaUG3hTXBGjguL8rVc +/gYE2Gyi3DprFlyjmfhlppwc1oOFMrp1HhafkNFNpdKbD7LD5xjRMfGLZJ//Qodkzyml0uYu2uwt +eraIrrB+l96fpfWmA6u0IsG0vJhlHijONGON45VbiHR8Jr0cHNP5kTTkOSjw3BjKzPBHo4caR5AO +5obrVXzSNOk3d4RsXCutXN/g1NQ2oRpokWFGCXrK1Ee5UihRJ/rG6BxpxasPuFHrE5QFPEYWCH3T +LNgNRxs8TnvTz00fXMQXCA2K30OG3ffSRtD39vGQbkHO3MQPL5Ly+of1cXi6T/SimHzHSmXFewHR +6mCZHASEDcMJ0A4urs3Pa+hErDNGADurT3YHR8pofurMkVRTkrTaH6wmcC6+dvHIBkhuVLI4QkyK +I3hcgHvwmdPm50fYpN6DN1m0WBvTpbN0BvKzBrxJ77QggDZc9Wb9X9JMdvvOZSTGEKWARrvfGfNa +F7bX7r7dr9W3WcQOe6BooRu+qUagAykx7Rkg0Sq4+mJrjB9uhKiujKETYFwCK54hcoEAATnT6VTu +6WdIgfe77EAoTheYNxdEh+l/Hg9Zb0+sg2FTugnynLtnhChBaCW8RihE62qCS7otU6OJsgIsQPrT +ZJ95mqE/8wICkM65wDLstfT5hdTTUX72bLZ3dwc2u9IE8PWC8jFw7MGotzn7KCHtUUp6zhP3KoPG +4l8j4Y3RLRlHCUOEQW9epQm6ZpTkPbobQCpmy9s/5NPxkPpRZeji9y7T1vyMDzRQO2Du4/eCgnlM +YQ8XTAHCc/iK5vFE8dq69dey1LCv87kPW+tOl8BCtb7wPpCM1WIg2ktl6R/T/wJZ732E3A2zEsZI +hUMbj70G+ak1Jv6bKjcjRAAScejob2IQ75YJ5ez6a0U/roAS7+jfD+wiOUrXqUlEdVZYgygRhmQF +4Y7gNIG4g1lhr5TS8VRjOKyvS9OkRenT2UP0vj49iOAzo0L5d9K3eGwc/HnYJqPjGQnIhu7bHHSA +YCQUFeIfTikO9Rg/OCgJb2YcuYOeO2m5T2omEYf6lj1c6FeSS6bgQQQ0Nb4YTluZnVCQOSSIEkQn +hiPSVmOnLp5qOt3y1Ikatj5ottQZ/joX7eic2tnp01XMpBPNfsW6x7nQE+5rtreTST8Nuc72igcf +/srHFqry+m9YLw8PUGw2Zl9oCeQP2dXzFe04a8h/22Upl40MLUj9+J9XqqCdLaB0YgRYtiUohXp4 +LRCjY0VHyUjs5pMW4NwECtjVbzGQ54UWA3ltMV/ziQ3IYSw7tfcPHBc1CoEZi2osFXYvxKT3ErkV +APVCI8RRLQv+vqDDQDoKtDsCmgTmwBqAekZc4i59qzjTIPhwyL/NB+7Gyvsfd3PgIyMEhthLzfrI +tQq/X1kvsYBajjwCsxR/D8Rv8znRuCM78iBy71I85nwHuU/kwcBQTGQHNdBzqUNHyIMJgdUbMouf +yS+R1qb5w5D7zWhfCxzAo2EsRYMQHrLmXco++EjhDtXwLQtDLTk1DPHPUKcomkWr/MJQj7dgorxj +ew8hZwNLJV6PPhuPOPsBo0y2QrGPHdVVNQP1E3QsEv2GMiLNPl53d5gd66qWhaHBbj6Cuzd72nQ+ +bU130RjpIKucYOedYnhHkZBpiZUGgngmOIvGA+7eanYIvikhCQPPNs0HwYr/W0e2SzIw3qQPT0B/ +aGHwLCBLoJwHHxYXF2DAruWv1C3Kljz4DbuDtvfY+WjRUJdOdCifNmGL6gptK/JHs6/a8ovqWF4k +e2f9v4l0GMmdA1R+JWSRmv5Nck8RB53rYS8kE3qD/tHfrNlfzacOTlkE8b+DKFy/zYOe6r8q48ha +o2z/gr3/9zo0AJt+fTSiIfThPskAnfdOZtIyd/baaQTGqu6euVvkobTO8F8GFL1tYBM5JFsvcvkC +9OzIkd85qEYoY2R1B+HON0DSXLo9e5l5Q/5RjX7DnN2mz0R6TN/7KJpL9uc20dL4JN2ShkNUfTbR +OsB2kECBSPjJ8btKVQjqujKNbnjTeRr9EE/5q8gbyphlcgroj+HujA/EEnoNS1n9TYdbgjwh784X +qlf6o7RMsvmKG0iYQeL73HrjerTMFSys+x+VezoR5+R2YLysqjHgk6Xw5OBUwf4KtfjUrD9Q9K1Y +IBoesYe++sAKNZExmzZXYG5+V9pvcbtgk+9LTON0Vm1UUk72uIkHgnzQ+JVHY6/rkYJL4oD2gGR4 +MOJFGTh9KqZQegp3H3KnCbGwKw2POhdaLM35SZwNFYf0PZF2aA0WLJ2xFv9HnUzMqHfiwLYL+XIe +64raBq7+sDpreKPlwZ6x5qX9ZXPv7KPimpxITgk2gdNxaRmnT6NZqW91WzWqYqixSEUEmjWqOtxf +Y/7JJ9H0AgIJS3RCwpWtDwwCaE/EIGEmYxbZDW+HxlQ/NHCT5Jr80trIJLfZyp1l7sizkS4pbMI0 +QCihqU6wxkWnRmDEoAi7IS4Aa6CAVi22mJepNJXPe/pqPF3h+k835tGd/dB7pkG4z5DVMgTWy36Q +jq16eizwbeIMdQbTnfcSqgwNkueSPUWy+8QF0Ro9BRiiyEYioF0YB2GHBDB0an9jTA04cQYwtpXv +HcgUequOvXZPVBgmDjLX0eOvyaSb7LNnwtYko4arfE3Ug7QCwPfs8Iw0rF7RMU1j4O2nq8hmibed +GeU8uCjaJinJkz2qPnpqDYGdQGhM9vD1/ltTI9+otoubgtYiQl+JZSABXeaXjmpuewfDuLS9/8eC +Ujm00+otmt3WwvY7U/LA/py/8rioDfkhzn6yuqMa0Hi6jOjKqM1yqhf/gflIzVdvJbDmIGYtgFhY +RAabsTcFBCOjcn5u4sMHjhlXVpd+rD2Jm0nwqjdU5kRhCEqsvnwXdkc0tLwXtHrIVudscI8PAu+3 +nIQPt2OumBY5op7bcd7KZwwSSRTwKLho4c8T0y2QdQQxyUgDmgCWeYIeMuiPTBAtURiFOsGAO6rY +tSfRoSyywdrRmoPLC8jyJN5FYHn6i4tX7uh3AIKQGq6wPhORqPGk4yRVX9SAcF2iTb0ZYbeYj6AE ++38XYQ/qVXm2f6j7csXEQ+gvW813Lb074A4tKXTo5zOzkgdcbubWLhnrbXTk9BWHmJ/j4UvSbBG+ +xlvac2XEK++fjYtFZGH9SXjdI13yBqbfhr1LogukEegJg8olaVvSSG0fjGZi1OwFVy/PiXzvskHO +/o7rWdn/aPmN7lk2pyhZWWqwXHg8ZnqVR9n+gQBoNhRJBf0NdkN8NRec34lOdOErUXEOnsHXLs7R ++cEMKX3tZ9QyTuwgFlkG/qrJBxeqEd/tZCI679rmgMyIEs+ZY5q1w3hKan3IiOgXl0RhVNmGD2Ll +jy7WLrcMLaIfJ8w2QCZ2nHbFoRZ1OPXfe5/2krxFLRmL0AHjJ9cP2Pr1jzyvv8hYWsVvcSM6B5r5 +gyC1qHo2ZEvy5Rbh0NXV1yQlOukchhRS0sSpjfdCOJkk4oirs36wQQgupgyJJPXsLS+Zylyxpc31 +RbXn75f8FpkRkxs2umJYMIQ/3VlGLDRiwSeUlzaCQxVoJlsvz30lGQZm2a9o5d6/h5qUwobUwl6O +fT+Fsackf19gUeyk/d8rBAeh+sdpuP/aMs0yhQ2tvtiNw5THChGbAkBKazs5djMZYYdJOLvg+llM +aARiHP4sQBl9LxNj1GjTKoUcuLI8DtDfvkGxSLqVEOgyjVRfxshFmGwXj1C663SWZy55Y2hoRoeI +IhnLZPXQjHn0VI/Ps9qVmr8vi1zr75SJ+lKI1jH5EUMBduo8zzG0WtrZvB7jZRAriZ+axqKaQzpo +VpqBlosOVBerO0aSvsA64X0/kYKB6lDsQGkvTiXl2b1EdCpXdA8yc7+FpeyTPVzTQ08TXerNZrwT +POHHsDbajrX0HGhs3sGROUXp9yzo62ajhcSMWs9w3Dg4i0OW7zAnpobBkexU2BhlfWPJ+aCRAYzM +H6bGqc0xZGtYZcUxU8hGhIOwtwEkYtRQ80FTsWOVMz+Tv4jkGFJcM1G2piQrQBhHrbiT5UvQYDHM +S7+yJU1vN+8LrvwMdbgR2hTXzUgjzWbncv3DSBMSG9k+GMCa5GnYKYpitLpoX8OKrJEbaHgMJEkE +1w2+dV3bXTGeQhMpSOn2tCPMV5PGlQ0FY6t7+DkXaIYi7bD6eXQNIyn0klH0b4mOHG62d+WZTP+N +S13s95pcWkltyVsNtfA8GJzPgbe6QSH2u0gbGySj/qosVKPLrd2d+dIqum3Ivp1K5quOOHip2F0w +/jT//fvsITPlfHNQi5LW4NQA9Fte3teJOYmMCIw00690+Xv62gjcuTS0kqwULgFGKpasX2Wphxvn +KZfmw5aEeiprx7HUThKFy15rRXaXURwNQCvuqJb5JPLupI/fk5mh4rJpi3uoUP4qf51rbxKrbYKT +onNSAWIO6/67Yfos3m4vOoltTC9hlOBPZyOmq0xbs2vcJnsC55FsIWy5+EG5Vs0uhQNFK/2hf49U +pzo/A9AfunXwPxiFrqn3z5zoQCkzbfdt8+DaoPbwJC7ivBnxl2Kr5JSS9DTjEOaKps3n+VcOeQAB +YwC0mhLwbt4OWN/ECUdEZ0uJ6rZy4TpzyBv2Oaa7XRA/DVH4m2yP0bbv+FZDWIsAw1mdKp73JwD6 +1AbxEg38WQCRp0euwpwHX6FpsDZNLVwDx4gpKnAImukQPxVTt1c7Rt/tx/r+5GASKK9kqovhaBuT +rd2pEOMrKkzQ+Jo5M6maK3W2KFLzJxrhr/LGMbkOF1B+YxdOL3Iu0+x8nxSXKIiEPk+YvVKoSwjn +oPtAApkj3H7Wiat2q4Fldc0FzBYYRv8CtGQzxXvnOKjR3oSjKP6Cbm2f9qZbOxK6rVXU+Uay1man +50aOsUkuGp5hi814hPYcCMz3Vc5+Yn+gljJLsMcU6Z+NDV743x72uE5SKNzuTo8hixFiX93tmEii +nIpGsJRPQjqQMqcuUtnpu3BItQjg5nEAwWcvE9Yc6qHYb/G4J9y8AvldIJtw/aWjBKlISEHYFMA+ +bRIqKKrp/Z8yS+hBPcKf5iWg0xVOH8jcJkt1dTW3bNrUBcXtJ14aGW6VjYGO7CK+lpHXoEfwgPB0 +6g4Hf03YgclvKEFagsYDdy+qbPOzX53oK8/lSFigKfqP39aMRcCFIFIU1kD4soGKny1vf49RKoOo +bpgetic+wCA2qjeVihx01dNt6k2ulm58VzHQg+ZRZLFx+UjThZQUZZAsBIx/fX5CtDZxO9c2RpfW +cK/qRUi9djud1ItMx5L6GU6WY1ACC5TX989AGKKSZS+tHZ/5nhx9y55r+JWLNC192+TyKDq6NjRn +TdQhuwB0Zw0j90ouCEwrBr33vhylu0v3qt93VGmjw6VOSgOzHVoL5ItxQQVGmPSd4Wy/FigwcR8j +XZLQ/fDcGBODhhZSFGaGeueAgLu0NFSO/JryGW7u3HXMhBpCLJZlk4DF5HVm4m/nAVu++pgrUCi5 +tUJ3Nmife9Lv1Ftf5zE09KZrULSMlT7VnaG9V73x11fg9kprazlGJsNSQSfm3UefUdife/TgclEy +OxIVTcq5JLGKZouEm1HhnEQ3cWhw1h6tEpg/Ajv3e1uUELnN9l8ENIEdd3krn47VOrk9L0NkKEbo +44YrCXKH/+LM5DNOoKFDFPe4szF++5bylY+sYeYfE0Chxm1oAxzaOAJt3vScLnDeZggARCjPd8rK +G81WIwiBT7h3x745QoIhyZCys/69w7zOm/5Pn1WcC41g2PPB+fyKajpE6aey7Jld1QnkKA2s95dT +i6C9OTNRxQb/j6kEKU/2gSRZhELSuaWny49CEtZfDD2C6N2twQhSECJobdvv8JC3gUZh7b8TBrq6 +xjUemvFc6h0ebUZePrQ9FreVUdYL0voTJ0uAo7ZZAcwUeoy+qOrrZVOibhhF65ohp7pBz3Q+tr8x +5Gp9xHvjnZ9X29cNbBT3QqkdboEBCRe7CmGlR6IwEWn6/qnzOEgEosV/hl85rTB8MJbyxah7oMfz +zogAgVaOG58QVD51areIJDetTRcsfDg5NYb66XdTL5ZpY9LaZN3lSu9kB6iZu1z+Pa0qN7fiKDxm +wJZNTmuF3qGIvBQQdF2Qi8ZUmhIOljPHkPpt4hFeFtUt35AvHtbuNyUtTDes8GIPtQM0An8iu9C0 +yKyXf4AhT819RkRfh6VrLIrwMKtphwNWG7GHX1QQ1JkaWVWCR+to0OTuMlyO+Mgv2pOMoxp2o74V +/3kM3SJ+WptKopSLO343DPQTLdcdq56pTEQyR+plIISIt0x6liH10mbo+FZLnGlqbJBHjQo8+m2e +C2Fpmrrow4ENn5ep36AMyZYeWSqIuzkXp9dJxGDGp0yC+lRxXHhRnqJO/4r9PX4Kk931yQoJKvKX +G9RxiJvPtRx3VRpWbJ3JX93FZDiDJJi+iWG9A8BuyDsHgcUGHIUjIZi2+3uMMMFeNW1/UMT28WSv +gpoB7fXqyawMfx9B1pALcfo/xOATEoGFyZvXsdOK+aG1Ch/JPpOLO9Q5EnLjrVThTlLRCq9t1HKE +M8SjK+wR6tes1agV9A+Q/kgXCPrYtv+wqOEdJmg0RGXYbEXCAyp7ZoVW1cQwz4IEUu8RS310aXbf +Tc9aHf7Ku5N8CMNF1PI2FG0qalXjzOXO/H9OUAsya4rnqybCwev+TYXEHFY9mgBij/q7xynUAZMt +K47b9bp0SxPIIX/nwE5OK8sP2UKTKUezvVR0sdiMulXzgbaDWnJ/twDRWEH3WWgFrMV/bKRjzisG +vZw3ZNwsZWMLS8weKDJiOc+ZQOZyQMp14bTPqbKpfM/FOktfTe8oWr8tbO5An7PtMyXdoJnchk6e +GupHcZmVeCMruSilYBWWzrFS3o1E2fwVK41ZmEUHuY+L9/ycPD2w3VOzqBOidwp+m/zYMdNgw/J9 +CPOy7TRuRw8s3SMvZ628CkkFEJAO3ha4nVkkaWewUA08N3T7a5QcIKH6TdLMtguBIMjRCgcFklsj +W33E1aOR5kaVpo8xhR3vRpyVRD54Phwgr+PjG+kT/h7UIurg37KZadB3phHX6KggYzmsqFHD1TeW +jbT4BraFiXTUSmJ7LF33uzPytm9eM1pdjFKL4BcFQgusy39cXDoijtmqLuPMdwdSDrzh+qYuKNfM +k+LrRmZZwtCzB4cP9XUmQkWLeKE+jvqc3ksjkFnwpT+dkGv4B6p7DJVgZanXEYc79OaaTU2WecAl +2IP2QTSobW69rMe84Qu/Oa178gOMXezw67UPtu5JH6vb0NSMpv0OinwPHmp/Al4Rdk7ZEjRLqmtS +Hjg++IWGtKq+xSWRFDIC6AD1z+jtqN12JPfiQlvHgnmzb92M5JTUoYfOzXvwNn6RIZBthS+VkdVE +Kt39iPF/6rP/cNrJaiXG7yeA+eGMFPHE2Vsvc0NcjeiEpvDVCaebUnwf079/2WQGMuAD1a8oB7yf +5+SpeXqpWR3F1KtX6U+sbwHDuP2QtLdJHlGMG97Zz3gfDTdqjr3Pvu9+E844VP8ghuh9Wv3OyCpW +o65J8jti9WlBcdGXmQfkMGkgX1oJz/gFYggHIbImNn2059dR7Irx5fBW97ttW8RuUDXILzzEBwvp +cMnJxjo4DnB9WxPNUhQVhOgffHAAneC2rADSmBkVMxF94/gi7uiuDC0HKasb0XZE/RyxYbmLeaJn +N8iB10i6Qr4QNaPCm55WuT+cNanKoAoVsjpZjud1YXYo/z6LzA6Qs9ylEQ0/nVOqKy1/XcTH92e0 +xMRbXvkd7jS5xpM2irAG9uO0cNOtCYc4NdPo6Mb/8AqWBHFJZ01Tkfq0WNGR6hd3+TZ7nSB1WhAG +FzaLMZqvJyya7ePzLL0nSfBiPRaLeBTFOygrhVWkwwxAd+f4mSPDFIGcdVhkMRQMOJ+NLem4t2ej +fGOGz6DvaEwL7AK9KgEXUXnAWqj8XJV3j7E2QAbAmbfBiVLkOVl1elIurXQGgTZW3MOfFlMLk3ar +CvZrR12TozqkIegfM8gdK3kV7PGSq2h4n69tfcCgGkNqwDwiGbw2+V/ArBAq4cU9gC6rxXSOBCea +B3zDRicj4Z2YLMI0I8VJe72i23TUBavWIOgjysL1pjQQMWT94V1vxhM0zCVJNTe2zOsY5psgg5aL ++UrYWUbVZirhc16K/omGar26LzVa6+Vx24xYEIwApNzFeKFVXDaXCKB0YOibuVspkbpVgvAdu5y5 +njW5l/pRaI6d5nL/HOAXby1tT5GkESQbFhlvKzNV/nZrBZf6wCq4GSsKa+bZzEFrNrBXVRxBurhq +6cRsiJ+kq5O4CHB/4eSV0A7b3Xu6rXQiBQEP0JP3fUnPZZzI5+Ft4xqZgi3/04SFOkctFR/eRpxD +oaBbWnS0gzQ5Ekh5Bkw2uL99M6WHzbJ7jFTtNuQQaAbJlCIhMT0DrHWPBfwYr6+yIeFwawpwfzre +tcvwcVx0L+wTn8WxK17oykmsVZb8JfPYlmmSWpHvJgsxOPAQaWyGR8Hj4hjxJWJsG/yAgmwF/TJH +T8wbZbbW+4Nq2nVlAq1OJ09jOtohy76U9j3C+iVhMJW/tA7veZpUTEeJKcREd19Sp6RdkgzqdklR +4f9knljUsIEX3vLSDIP1voQaZ+Wc3/5yLC6ibVU7t+8IA4OhY93lYtj3UT9n6SmIkidAAxJFNZ/h +F+xDcQy95RPQoXLPfo9Q3MrQrNv4To+9a843frCPTb/PbE9XtYt/bln5jahu3ua5P9wGyMqQ0UaX +KdId5ALuV4U2EjB5g+2POYhU6hR7jVKewL8fm4j0dvt9Nw5XBmbb5mPvwG0mec6CFUSqPybLvL1l +/2urb8Fl4inraMamO8Q4yZ/A98kBU3gEixolJGsZrMly2oJ5LjClqUyZvPESl9M9QoFw0GpC1UDy +KffNuoV91ngsogmB4wHMOTVq/l9rGmnTHTUoBWPs8y2HeIFO5vn02oIqVDzeyy8ubebYADRcBEMl +jpKE+Eg3oZItZ23x3/7Jl4ID1eKVpigfDBDuXnh66BXRS3yf+5rxpDOYLU0C9Vj4s1MVOXVpIk32 +NBTUkqojJ/+Uw/tpnvtMbvQ/ZvLgUY8tl4WfFSYd8wjJ5/nDw82NNHylyLJNMvugLKYJFKH8o3OQ +1eYvOM8RjEUS0kfYlgLuK6BTdbGRgmTAOSJPQjO6w6jpKz7FHgpO0A6HhWRILnY00csl611vGcxX +F7WEnRZKAAgUNbjOs88Jkpj4B23h8DC3+BJRngAWrOI2WLH19pSeN5XlSsz6spo6ZLLnyijH3K5e +FXhwXxJ37AkkMt96jOfdkDs8GcNHxACCcHfwdf5KsQ+DblydzMBs7N2UIAXEk3nTKaZn6rJLnSBf +rlPSFWvxry0RaC+7s6V2SQTIbqpueni27x7bRMf0n3BPXYWf+0UEhBRayGxZHBZKdq71PNlqzLaC +BQ1eVsHbzjNodDuzUjAwfwQ5ZMX8Nm1tX4ryCjGPZIIKzgAZws5U2Yc64rPwpRYcFZ7awZ9w2MCR +007fE7lufEFcsLECcCrL4fNEqHw6vaylgn9IZGf02T2JPtMFo79Rpyiw5siaQNnmLyd2wTjG3SJ7 +5uNnWwSOCCEHvqb+LLBfY4L5cz49/fijg8r6K0ksM0hk6niCWdGmJZW0o41ooI9yAQ+GlXVyWTDg +BJPowNzRSST3Rf8D9i59QJmiyu+aaXhTfsbR+kz/JBNWR+KHK0vefWaDS1jP6mM/Ld+PfvI4iNQs +6jykysLCpDdBVlPYczhKhk+HudtxIlNIkYgysFRyHUKvv+uVJ3gDEY7AG+5i/1hZQQiCjkCMKTvq +0NUN/+VFVBpbqY3VqgCEjpwoxr4VnfpLVoPpJJfzD9RD5xhDY4P4JMeybYqdQl6EnrhaFSts7QNz +nAwAcJJJe2G2nVMRSbwfAjK+uKm3KoMvDShxQ/u+A/rs7s33Fs0IVKlp+jhVdTtkJoFjCuTlvvB2 +noYB0OxrpQxaU0OYp/MjEZGSpx8Bub4fh+Lc2nxkjYTIZS2JAcFlV/cOonZAV/UnCtVH7qsuHhaS +goq/lcv/3qy9SwfgPP4FnXNF7DjRy6orZJQjM2QgCq1xeNSPaDD1Eh+EypSuuPQoaG5RZAHr7qQ5 +yyGpo2CVubxlAGq63PQf76w8wZzAagvfMZDMwN8JB5f/hXVLy+LBqdtprJnjWiwRWZimi+NhdXnW ++qTVHsOTDPlm3CzpfgfB10VmXSmZ8UBd8QsmUht3fSEO+WPsa6gwUUlItq0Cb6f+pR5BEf3yUfti +tAwpuJVAD0VeORFcSe7Ge7BAUR/6yQaq924CDYtinRE/ep34QXIZjyhVU8b4ahL+uPRo5EqQFrxV +PzZwsZk4Y8G9SGB+aEXvB+NJDRt6LIdXC/NnyryrwImOSG753Zi1HkmrnV46Yu7t3IP9717ZpqI3 +LkV5wscrziWAZyfDGD2XQ+aE80JM2lNWimz1pMNXCDdZlF4lkB3XGkQWDZVxC2Ug5HqvTDTHf5Mr +hYZNUvhM8+smWLJak4naOHVyeU88vO/wGRBjFIHReTLE2pYRqf8RkytmVBtLvrGHmqVhb0qCVNi3 +4jtsCBxGoPkNw3E3zsQIufo6NG2j00QQDxH/fjrUj9dNIY2HJq3p4ZbpRL2+Wm+uRURlcfqp4byu +FEOxRNOKY/vtXprNcRfxC/BW8O3svm7oMZM7Hgg5vWx8GH3N6Jy1IkJfqxbCnueg48o7bKjK6sDz +kEHLIBgPMEMMjw4oD9brj4zFezJJ0HbHqEs+H7c0U5n3HIX532elkV+qiuxbT0oD60S6BRCiYsBm +BQciT8HeMUAOcRyXxcdzYJIGvoKzRLnzE7pevTBIJ4/z0tZSs44iWf0iO+x/6KFiu2BDoEt8f7B+ +SQUfdg3d47xS9pdTLbF0Ud0PFlkIu5jHNZbJ9ukj3SiREowo6SsOr3wNdV4g3zXUHK0eDqevKUbT +CIiKiptdw/pMJfJ1+7l4ExbvghFAi0ujQB5MUdNibcjlgDq+3fmgXmA0QqzViSlhd+qUEM2CB0fs +z7F3h2Tj10k0yrBQv6wbEJee8Cc+sZtBr0Q2TyejdCCHucKYb02coQXOJ4NM1CHTt/+gjMfVBsG/ +z69056HhJAxT9o4M38D4IvUK0QNQxxhX+j2bpe12D5WViWtSL3whPeJiT3rfnDdzqmfhqVNUZW6S +lZ46v/wEJ1dG5y5cM1QqbNuar2cl9U9fxP0PIidniEW1PFQtJ5HWG9Ga4fBA3Ti/0t77ucx4Xa7D +O+Mlts89i40CaREn3JVQw1m4AUqDgDprex2vpuvnagUMKk1IRv4KRQ1qakWj5UiuOstudQSLhl0g +yutIF0X+KWLE1ZefvBJW9e9jXBiVoVCX8sTW1XKSKlbmqCLhxcwgneMZ65fyPts2nF0IdsIcYxgp +/bN6kFbWhCK/lJ8ZjpU8nWVYMWQIrKiGP7w/bNysVbjrnV8aa5mmcAd10SO02NoeXB8rlsT+QODZ +Ok5ru2tpuiy32kbICVAfTnKhEMy+L/Hn+QNI5CweDodBTt6cZ0Wd0GeoQUk2J3hrX88vRP4V+ieZ +mT0J7W8fzV0twfYObfIoFfEpc2mkUBNy/d9WZBD5R7TL/WH7T4fVqc35eAIz9iBAi3cyy5O6/Rv6 +1hzyRqkFI8UWlOfN1WKalNrDiSuT7RdGStT4LLDTfHVvX+x5JXPdeLn1e8elTxhDE/zFMi+ydgIl +iiazuZBk12TlxgC+UDgOjjrCwu1vK5SH7CseT6yKZSeniQFmC/5cPcFkupKr+9EBzo+SxYIcedTR +mu9+bY/wcypFHxYQap+a6CJAkjivKhdEMZ0/zK6UeloAGmEnpRhMY8/pMWiQ7FlwxoNhazxQhKts +QZm0DhnfSsn50CnuYJh1eCnwxAS+U4VxHbXpnoQ0Ug8ioSZudul2ZvQko842qd8rTWXBggqEEhi5 +7Eo0dBPYBrqBk1uxlYsUQ1v/PgHWnofgIn334IFgKDGaCU2gbQ6YvSszP3bSpW7J11mkrrK+N9ja +EurM3cnMtv3eP3Ba2Bj40JxeqWdmRFsZnmHxnYq8WgoHSeLCpqVBtjIRIIe4SSau3ixwkjj2wMwr +fMBqQac6qePnFLQYwO+K/w6PZ59JesEnHdEIkgtH0FW7WMWFRzahkRTs9ttLZFvZVwyLSkr9+OLL +9zRWmIsxXFjKbxFhJkJHXO2Y6L8aW0Jgbvi/nu2YH6AUe7rqBu3EPxLP2UXrSxR20c9mv3Ppvbpd +EKrhANDVG0TiCzVLzAF+WRGifv02gVNT/jJhlq6gY6aKcnXSZUDPB/25JeXOVp+wg8LFCQ4MeJ7b +cZ/g153we2L7POksjlzeZEHzyH/0Z5NbtPjguBV+V5WJW4tNXZqkkoLfalCIKKOjmQkcOcx3ZxV9 +5THW3l/9uE4NUbU7EIqXOCuzKWMDE8D0YHuxmomSxmN3uBdgqQ/0oCh20zAqazaEE69dllqQFt8k +znUG3GFPm+mAIoSszjD+rlcFKcQ/Aayj+6iId9oE3US3G/jfh/ElB3+fPMlbjNFnZAfpwYue4xZa +PXXqhwctNT9899OjwrlxBac3Y7m6DdT3yZuirCrVLYZkr7IKnZsQxUWDvJtBNqC+B6mL4lJJRmmM +IKToF0RxI92F4ZX4hSPBQTC5bXmQsbC2POk1NoeuyHlECoyvrTymkWqnRlvKo+U6wSF/FS/gLPGQ +b7D7VxpxWCVSCpFsFR5uqyEkmtPldsPI4GbFNyrQg6R8ns7CwkV5MyuZBRkgq7XBUnyz9VehCYGB +yOOQDL8oCsJVvZkzyHgFh4PLAaMcgGOox17vvIA5EXYhfudr6BHkT2sc+Ug6maAZrLaEGwWbMShF +x1TTRoFtymZg+ALqtj4eW1kkxjpl2YzzmqMdJUqoG0cu8GuaHGhQ3G77hFmbwNMggsKmROXizGBD +/XwFpw7y7Tnn4xFTY0okKtPS54azQj6L3y0zvgMp35+WziGm7uAEVb6lVH4cO2QHQRlfwafhq/cu ++iQ92f4DTuQCYt7/8xzuuSc0jKNUvlkLwuFwteI6KRXYlTwATmTDMY5JlXD+0yXURr9f0IGCu34X +OzF1gRfPMwuCCaWEwn8ZG8s/bN0lFRd69xiAqpHC94iAoRUzyZA9nZZ/ddYf2twJKjQ6JAnkqef0 +uNff1Msh9huEBw7DEer787qA05u2WeeuRhf/wzVP8FP33ZFuL26Vp1Cz9JXhmk1BU2fzZO/6WpOc +t8+vVcdCAal/wAsRLlegpjcMGhVsqDOJJmeSA2f0eLqweRFQhokR5eC+/tnSmmZuZZRmafA8YPvy +dsmcl2v2kFgu3KB+O6E/YfKq03hcdoNnEYNutSdO/xkL+M1wGV6LdcYh58AQRzdalQpggjl9hIEj +6OiYU21pdfkY8pX3YHqiCVo2V7EnOWS7PEPCNJbHG8a2gC6fkRli16tyJIH6Nk/doaTj0gRZj+6/ +xHufTZHEUaODN9ZJhWg0kmT7pJUBS8+DtDHt+ZQdITNJc5oBm6mxte7QtikKgJZlRCFRBXITgA9m +G/xhnpoIY8OqHZnnY87Da1TOXunXRxMl8Td695gxCSbbbirLBVR45mlMGxpMKCgd7gqZ5iigoZkX +aCwYeJgzMn+m/JQuSRpLcsDGGF4GSTIGH/k8GH4oiYVd6wLTSMBJyU6OziU6lvinZB3vW0nBAguG +/hSiaofneDR6MFoMzRGayaCv9jh00PAm0LqwWy81LXp4KCOJnAxtufnBIT0NTyvdYvwewSLatUS3 +OmKvokenlEJXAt+bnV00VwOjV0+U2Ba9RjLYLZxJZUGk0ZjuE+haGwfAvZ0ZOdzaFe4hXQonCfXX +gwB5l5qQb9wTGKt4oo7e26TD5UQCvqCx1GcoS27p7fGyEfwiCtHeNSEKgk5qQ9E15S3eXJid5oUE +76ZOZzh2aS+qxImGB6dcChpSR2KjFqVhCzyE6mV1laHfCxMCas26pESaZVgKVAjacMwXRZhe+MA1 +y0qOiTSFfIoJHTv4+rhlxQ5Ke42PTavQHxUPWkEDiP3lCiAG43pkgMhSnNiw8+/o7K0DAA5FYJdX +hyOvcgKZNBiI4zIOa2JgYz3rda7u4Cpzun48CKqiN4t0PmHL0IVBgNluLuYCzD0TgH2uCHoAvsds +BU0ITqNvqNFX5qFUztTULSlL+RKEDaX6ZZAO0eO2e+UiizacbI53DbWhj9BKtLo3gpevqipJj5rd +O5qwBEteIHYVrc/hQh41dvWMIdL2jyX/+LUwmxGNPpBzMM5b3EMQwQVX5iMSn01ycP7DHvUGBMNz +RisiqgT9mXUW3zhr32eSFPeSXe2k68LZ7FPDSqx0OtEVco/C3+WuluifUlVUagW9TAwBlxZl37d4 +n294ksM9vss0z000hcvHE0Ed5yD8gvLWd1Sjbvfs3V92W1AQRHSckdR4rAfnU2mXyuI9koLRHpff +blF+VAhGjkd6iOQtV2WGUuxx2sUALChla0k6rFSr7rzX4OdM708V8i1GaziT5yGMOO6xG+EnMPn6 ++dblhEdVzG2x73HIIPtu+ogCq5fxCq/8dhA7ZLIVE74t5iLifK90nIQRBR6yjeIv+1AMOAav2Zfm +CXt7hKsfdNkQvU39raKEBaAbTgpDZKZRQMtRkpxz29o7DvmN82TCmPbjuBZ1NLFSl9VulCqgVWsN +ORf6cTJg0gqMcT9ArykqlNN+MpaR2+Jd7AoqdT1jhu47U1NypYLjqvAAcNlCEYWIUFRlbjdmS42Y +7BfNVn/7uV5UNpGKJx1PeFg2QOnfgUTXnBInV0ln+PnMW/GBBNqdR1Stc77rnQWrBIFLMOzc67Ns +ZvXB2zhN5JqemTqmmBNgIz+jC85hKrEmzcwaxrXH9Cd9Qfq7x5dDsUBHF5wJerFvZdgiOl3NLzsN +A+GE9uD7Kxv6b20g5hjSseCyGDtxC4R0Exa3ChBuf88orZXQY8kad5qXRjRUjWJEF/VZbN9gL6gg +Q2q1mVgY7RJnccTDGxu1XE0QwGxEvTz/210paGjYlEPxzOVGrW31a0LbKPnfowl7rF5H1udyTKOw +Vj+lJSwsZEegGfKLpRbAN3EL3MxW6xN+5TCDeT6HNtFcIYuUcy3dkXDMmhFS7U6FTWSNrq+5bK/3 +rwSF/qUBhIgrnG6wLEt7A1K2j5zkTLfLq9sZmAHijsPjagFcsTAEu8Kb2PoGkPbQrkDwRHMixZtn +H55ylP1wfAB8MzjQHxC1wjEWBILLN7wAgs/oBjR06J5B9bx8w10pOZot9RxBRsOt8p2zrcJD97Xh +Z/2ZAu4KSX3ded+dzctZ12TB+6GajrTDbGaw0z8zezoxnCVfV7ojqQFHRCw+hJ11WjICuWh6VPtJ +jG4tVS95N9VXPhg3c9WTqGA9eKrIVBF1ND3WRYn5/M1dUDR1eMD0YtBkJMSZCVhlAoMdDVYvWuJX +BthWZXEeaUD+JAq6486R3TVV8NqbMoWhXy10dYqSqkG2wv/oPY4m9VgSCYP6wDH6QTGGeGY5dpVx +xT/+v4DWOjMMUHm5FUFdnPxPV7YUNPEl5h0cUhsdzoskgZJjPog4/hTzv7i37JrJ9clR+eP7hwf+ +ZsPbxKVVrVNPI+Nma4Jhj5SqkfuDLzeP4KTNgIzfo8DWHnNjAfIrW/3+PIf7+PVRKYfRHT8MjHE3 +UVwV3WBVG1D1xOjhqpDUJavr4UGpe8jcOMifoTTJeoL+96OYVWgWRovdXnDGhIXnF3S8l4ic4U+e +up3vktegM90vl6UdhxeIqvUh2yzeWQ17YxONn8aTfXgCtT0aEkdkcuraXedALurmVXGM2gakhmkz +IKB0HlUMkSYZpUJtK7UW23ZYTQoVWyg0sb3h6FAGnWDdolKeiuOH1ReaFu4S1/IV6ABxGZWaupzD +9SRTh3myJR3v7cTnxsN+LdM588HyQr5hBvNFWpd5yDbAnR0lcLihL+aA+VvigvQKC8WBEzIpr8j8 +VWTuHUo4S7c0OKPcnyJeq3l6GWNa9aW2KUGhdplWUCi9Mw6qikkuWxVWtnKO41UM8Pp3Nwz8Su4M +xSJz2DrrI82NPHSTGcZvIG1ssWIpg7tLS07sndXt16NUhwxABREi7wTjwndRGY7dR20ckIKz8n/e +GkcSd7GweOxQXjImcf+/7wrwvVuz04tbNoFevQ4ipdLO5+wNXabqqQxddVU77o+Vya/CCN2Y9kB/ +yDksy81gtfFynFPKqzylogOuJEBkl3PlS5g/SADXW7ZX/3QiABGwsAOAcl3by939Fqo1HlsekWwQ +3ghQ5zixg+5dFhViPS8L3EQ2O006yv/3aV65jJ/pal7GMz2Dp02tdte02G2DnZ7z8W5eJ518PzuE +dOsOPFYS3AzzFQB8W8maNpcVYKaeTpyH9PCrP8ciGBTveanP1Q9O2vVw8FYEZuIefgiUrzswMVb+ +lLaiIAidPKir1HnUCdBodSxIGgT3uG5BQvKQpdy8OY+zU9lvA9wHPVCt5NHdTRnMV/WM4Yb3baMo +1Hu3RXdKh+GlMOo0E6obR5YX6rhrOae7WfcHJHGzIMd+lca1kaqOhgT+uquJ+xOnBIuLj3yBPFrv +x8xKsDHxiNuq+5vCy8jTH5leBt0QXW93TF0t78Jge991sMeA3ppa9guab7RWy1VG0R3lyE4wg1S8 +OjZJ9p4ItLjG/q3scR79f06yIO/IQ0zBMexVMTBXvtub/DFIiGs0tNEcgpbItWukbj01mQsCpBzF +QSn353QREG83tSzKdJwXMOoI0rJCTxvny+RfELHTcitDZ8o83cMoqcIEAhAZoAdutGgpOdhnmGli +nH8ZL+nL9ZyF0syvS00xn+ewjts8yVFLV0Mfxv1vAFA9KM4jr5XRjupCqR9MNfeyI2+Bi+2Y626F +7ei4q66qimZODw2ortUKT5B8/PSDOUrpuwiFazuFWPSJ9mbr+BD9NL66C0+5DbrAE9b2fykPL9iz +vSW+jvYbLqoZT3hfMIe1K0PeWgjQsMFAN0ZFlwlgO+qu1iP8joNgungG6p3EfivAxg8IRBcCERH2 +DoJiOCL5sGhbogtdOfvYObXaw8bVH7VHI+8WoKCD9rb5hv9WQ438y/Gri0lh4MLTM9uiSC21E90x +TyzvfmMAUt5VmtzqcOxHR4zngwuKJY33SMLeKPKuCfXarPOzEh/pYeniOLZTQ/ZGmafV6cUSq9hN +aISUcwqU8uCWym3smUag278R+4bqlpnVohtIF5S5DFZr6X01BjAI71H0ayu70UkeVVzhv7LYxAAw +o1h8vwN9Digei+bhv8M0dW0ChHeyAjWnd0hpzstkHCA1sAwTgjY2XkV3okwKgwaLGJtyzodHW8ei +pSXGqBbgG+HviGkOYuLqtzSY9SXvY5Pm2UZE4XBg/185/v12wywIQBy00E90fTV4XTePsj4WvJry +bSc3iu4Bt8y8zEf4dQkECeZ8EVJ3Y578yDAMK5kuBF3NjeKd2KyUUbek8aIlK4rr1mgg2oO0NL3K +ZTKdvoIL5uaoAo7i633ssPxHxiiao6BJw/czMKEuew6Wu58VHmChe0ZfJPfYBvhRQ4ycivF80/tN +XXoAq3BIpPhPEeOaeloDCIBFCjN7zhhRjIuNVMsNzzXt+/0W2leNPXAsRakntRtnd1lqdCyyy798 +/bRfuIlH5ry6YJpChgR74hr6XzcxvAZuE9knP9vah3Ru1P4S2kj5U7UInDJ1+1HEMRtZeSrSHK+n +GjT54/LjAhSTXwLrykWNGjnC/ZCGrMcOIP2KdL2U7CmmwiJMh6KI1Mj7XlRIabuuYJKvDaVl6z4r +z3HqaFZZM3jnoGfvdHDMpVEhmbxsrtlhigiYrO1s8ar7iHkRL7ArU7lPSPpnM7IedktxT/Hh3ndx +dSjXe85q53JMfc8cHPcrqFjSHBvLhUbJd9hiITrB0bKf6Fl+rq1m0Frup3IXczx3D+LYShG+shGk +FHFxOMajUGqG8pdvXTxjRHMgYxGlQrscCFq64oYTj+JzT0D9wFDx5MGrXI7nffrNPsNaKkRDU2Yd +a2yBEEet7kPaNIpkOrIDw1jnhZg676Iui0jPpqTJYav7EF2Bd+9A8NrttmDdxv5u7f+vW835I4rF +CqDB81rj+mZIr7OeXni945KKmBEWZ5vZJREWsoPsemhJjzRAgb/SnprEOSf0+I7CZ9ySVdJju2RQ +YVrh9xBSAiZpO8fFbq4JsabbNHFLiQjArrmFyhWCcSx+YSxBBAXb7vmsQfVlwD/agH10NCo+Pryb +aJd2nFjBfHHCabc0HcTxTZ0xA9JbpDcR86w9BSehBbhT5tNp19xUmer31/8dXf/WvtbUy9IqnWy7 +lkl/yAQUeKuRqtwapYv5BXfNrZtpnjo/y8E1/I4uiU7PZeQEi2EpDEevvkkBEgEIPGZpfshH/kEv +p2gm3TrW8mBGgQoefpa1FBrG9OcU/6JVSy/TPVptOYz0JeL6locTnHE2Vb7kCgBppNBOzU5QSEB5 +JYhlqQYV/FcaK9JWJrdAkD36hS9r3YfV7LWB4BY0pSw6gbnb+l0fE9EMzu7Yog9LCRnP0w7IR1o+ +UkbOqGP4sOf/KCQKFlHQmnYEipWKamdKeKiBG8OPpEMiACvyKxLBpY9WtAqqU4A9MY9iao85nf8P +4YHuo6xjCJmkuMn8ATLJtK0rRugZX+58+IYDpQOGLogEopSvpqvtvPQom9I3vG6cwJGaFmllny04 +Ht1+8O57qBOTH32z2bL4SniZFxgsdEbrvTtdDIDvUkhbGA8D4vlj5bZ0iJTAjT3d40YIzspIlCs2 +97TU0lcbHVXEWL/GiQWr4Iji02bBjak1EKykjmVo2KCzyR+cEr/Sv7fzpF8IBqmrUgu8i3r774pf +zH2td2pTVqrN4AXKNu22jXR6XdDO250bj7BRKdgm6t47qlOsAISgeibkd1vNQbNXCsOX9HW3Z3ff +gnh8+2mDWUS6AjQJGG7lF+nwSJN11gDNpN3Ogc1j7r1NQyQgudsLxhpdpkzBd8RtQ5r3nSaTr5bL +zRM+02mKxX3S2U7ERzi4D2TFSmgOLKI/rXUgWkO4lB7k3Z3biAiSrCi8B0VJkTRPgk6H+kGLUyvH +D1EXSwVvmHt0CyG4zxC++MG1ulNs8KnQmbyvFl9l4ZYR66pKwUfFhZ45ZwsGwhV6tO5McOH6RvrB +WyBPqmYnvto1J92t7GrSBkhev+j5auUnDj2yM7tS+/NR9UAJ2TAppK2Q2OsJ23OSH5Vr+ZjBEvCY +EUyMWEnX/Jyp/8Ic0NDB0ObEU5kiS6B3TkbB5/k2jx0eTIzeaupuBVZb11iaQlz8RG0FjpZAi5s8 +KBTijbmK53A+5e5QpxsuQMt6vEaD4yxO7gL6jQ2QuioH4poUhWmfYxWkJNP04aXeUIEqsMBYTSGm +EpJGka1Ojs50wq4E+aucxsCi/ikgeKHBV2PX3dwOVV+7py5yrHKxKQMFyXmhDO078RH6OILKklWD +lmXbuAw29XxQQaM7s+9Qmpa6j1J3sMX28UNFHgscB1PeQLk3S71XKD2XETslQIiBXn2rOLAwNP6e +tb4s2T2i0zIMSHJgVlW1FylI+B4ZuXc25BIMVxY/WcV3h1uPdmEXmabYdNvUGfCNj0HB+fwdJaeD +2QbrEzKaI6F8tbxl018AJlOCTaeMgmF06AF749H1JtAdIDuwOJVboYJAPVlTtJiIS6tKtmfFbLgG +XBgm0MOpcKJew0LRwYO8yhLgE8WdQ5jtpJbf3X2F8+gAiSINAORtCbg6Yxlr63oI67rheO3Opm+O +/6SExig13mAmQr0Julmg4zdyginM2iL/d+yLOa8AHaSHAkVNUY72tLkMVCZvgU+ebv8afweecF8D +NE8Y/HQ7lVZaWzC5iJjfDLnn+53nJhw/S/uuyc/1yACEzz0GOrEDXX3evBbj8EETrjO+6gARnt97 +grZtjWhzecw2sT3KrjAziFmZj9eahGWF/vNuGPvc13QxTGbY+hOYWuQ0nZ2g4idbV2wNWWOb1gpZ +Or5mJ/CKHm7iyW+8ktxscJHeBFWZsDICqYzH8ltkAejyBO//7DDrfVS3jSgWCKWsHzJGRgDN13qu +3vXg3y+v+oXLK6gpBJWXYO3QpKuCToTBb5Zu4qK6+AYP9Krf2cB9sFixVGeRUsQ81UIrDQ7qrTSv +ecvSyl1VjEJ2qxVZdAVYrI7NBEwR+k6zvjSJQG/d+uFDm14QZIPolRwbyJh0gIFy43OtiI+i9jbx +OpZo+pIrOiKymMdBVvpEF4IKNHT8A7kERDSePnFxCw5j5K3/6x65LWGovaLqjDJXaWe5w+wRFg3G +WabpABIIpLkNxdt2dEZNNIURZ6p9Rjr+q3OCE3hF4kZKOg2XeWW4ZY4JXv5GaxRZ5RL94ak4kvnL +jqEdowTfJqdXA8XVOIIjeNB1KU0aFrUWWnY3Az8+RdnXHGAwABiaCVqiDmcyuKpJ5Jt1djS35PBU +uxOo125Safp2/5/AqU3PrPm8ZeiXqoGh8AVY+0m7nP9cF9Zpbwq258d5W1WBYgaOB3opXDZhRa8B +zHQukl1iB5Tx+xu46SogNlxTl5Y6L6TudpeU4uJ4afRzsav6QKGflKfv12bIAGBN8jF4DbQRGIgo +X+8oViIsE/749ENRKqZtW9HkvnOL1pfZEKYvtM5netyIF6d4jWvtl+p+8hDACNEALbDr68Auva+W +mWf3OcQH+paj9XyUAOsS9pavaPYz3Eo8nPYCH/twpplO46aEhTiJ75TKSn79nHLUMxuiJPw4EWUd +FKtrinuT5U7iNsCOEAB5SK5NsIN+E81Z74OOhvp2Gx+Mvn/CVzNoJTkuXKdxGuvgixwHvH0R7yy3 +S8KrynDWfMbj988m13JQORfAvClKQxGvzGJukd/g/Wjtwr2M+F5GF21bmxe+tuQaWebgoaRJ9j1V +StMjr1UchrFCcSQSkgW/5EasPlFh5ir5pEQX1i6EfKmalhm3UEuNGJl6VcvRmp30FXWWsBeQ5M1I +laI/NJtRdXXxxc3nif8njHIPcR2JroRlha4ToIdAlOxJTlGa6Dzil0E6wDUUaudkMBVo58OoJLMC +IAmFMw/y6n4H16nP/m9xNGdoosYds0eE8BNI24ytEzYho8zSCGOfrm57DymlfXDbQojSgCNMuWjz +qZ49aNCCDQtkWSeSOy6mVd3l+NLUiA/gmA3paUkFOpvTdNk3XoSYd6lOJMVElYVjgbjp7GVuW1XV +lPgVging578TA6oH8fRcsnZ6+1BvT7eCtkEVKoVcrkf7Q+kyiCLGunORxgb5Gwl1Qaf+MrjBC4hN +bds/TDyg6Z+/1d+xqpx2fNEWUyGa5wgJwFCs8TmyNVoqEumszTKRUQqBWmhUJABnxmKFCfuXdgyn +uAUMUroAGotSwsS+gVbJ25RMVtr/lmlYvoZo17V43K2470RYEdpYoLyL6NFIYuBjKvvz4W4jveCr +XYJu2SHUpLlyTV9QQKwblnWwvTx+DnABqBU6CqhlGtAIhDzfJ4rQWf745rkzkK0TCdidGyJv5uhD +EJ408Ml64SJsGuc6eDX+nd9i4MMz3xyJyygk9jhFfMc26GUAVZY/PN3Z8QL1o15BaCvsDHftkfx9 +K27nBDnnRPt5LKLBaIWu+fnIwrqAWiGKx0uIjNLej4IAkElMBNyqhwKcjh1RsTAjzm/jsmjxvNfa +HdNE/33/zzbG2Rf7n7cictx58eygQuoLtZ6RdoIDUOkL//FL2OhdoAw9RucMYqlXUG8NaU1N74oq +VotnzJf26HPybHYbT2xVCV6yYaEufdWlbdNxybM/3vogB2UCoyhWzJajpb8FnAm/aXPs3ZTOs1Dx +MCLi3hyr1JIqDefrQefIpRS/4Kk6x9Pra4ZK/km0//WGoSqYoZtnvxLNQYgzNvMWCEuD3nKW8H4Z +gPA+x3gLhPInGGtZYdpKWZPOFYlrrTaiIL+gnrH7ZENUHcdTlVntEo8ntkx53pqNRYamC0ubMoSg +IOHk08ii50WR/jD6xgUIrpfADMBNl2A+byJ9AuwAz5jPklDP5SPp98DWQzSw5B2jmuFRVVhUJ7XI +Se8D3QA+PbQAlzwGjqCD7dbx8I66qfTgoBSO7koFqpY2567Aw61f3C45yOlWYuUIIKZUJVIsvYU9 +EuhAevd84QX+3w+TApmlAQ1kOCpOZxcYmXFx/ftSA3qSuo9+eAeB5v1pOnV0vjk3xfzOLtBh8EC8 +436BPPfqlNyCuWMwOCrhFQYlF9AipDt5eyfyTfsMa7ZTfItclWUsnngJOcJX0dHHXyd2e9t8Lz+o +OF7M9d3L7r4ORquXThgMToHPt3EDD/nfSr/z60sFS3TNNO9G59VRYMvrxliLbTySFa/NaUJu7RN2 +bNzruiJQLAfQI0JEKMuqrHMoSOH8vBqWJrL/UpmDCarmi0e8yv/k5mBq7xs+n5OjLfLBVcgWRQdq +q4paR3ICArmygd6bX42LxoRJxC9sdLbwn8iHb+K44B8VNOg285jnoz1KExJzJtbCUqNBfPUv1GTD +4pQ7xRsSLSgbDM9lIDb4LBlfOxjHC7v1huDiBSG1XdWzid73R64DfFIDEh0aKso4C6tM0xd45DHf +gvnbyHN6eG65lzumL6Nu0Id+plM/8l/aaeatUfTsTgKjmzJD2MnUgwwz2QB/t1oaiUpck1RaZxrp +VhRNRDKMNjOp0BtBtwBieUSaX6m54d8xk1E0Vjwo3d1/grUaseiQA5S0y7vIHmhsuFM4orlzPxAU ++kk/DAkXNi3+iFnZjq3oFK7mm2yW31eQNloQyYR7y5aBTZVjeLnakxNEUcWNM/RCU4rv4qVV8WRl +b6sfY0v3WUSr5lcBbWGQ/eiTRDfPrvUjfumvmzsMiGIKvg3R+uCdUkB375m8qal6jlRKbHXaWq5T +OP2GaVgqqyCcsWhnyruEcKGBzh+JeSXIy2RA/hNGyr++DRlTJCqP4Urb6DjMAnopkms1y2AvP9CL +ItOJI1psCp5BFJTsjAhZWuG9Ga+AeC2OFmfvBaO+hCtsQa4e8N1r4IBj0ITYRVm+3Xgqv/779nAN ++u3UUB5FKXcIpDnWiVP1yNjK5mAFiQP7CwkWZGJLwp6WHa11FE/p4Zsp10pfYDuI9iBxP0ILcQ2+ +da2d2l1ozvO/Yt1Twk0OtX5QcBVMHcpcPZbYW8H2SSEZCvPsY0s2mopUDY3mB0oVHtiu6PZn6p55 +/oEZpHUsDEInlqVUrrzvc67gfUtDBBtMZXGeMin48OISA9fDFIVcQHmO+hD/7vN+eUEjTrBBFtRj +HsjAizm+eQT5tV0QL0adCcI1aqBQHNq89f6N7Z1HryCSctxZTtEDmSsuABJOV82N2Y6uUOvITM2Z +waaJjS3Cvs0qkcRgJeJCCLN6Lw9k1vZMjIzHSZ0BrsC0LDBUjDY6bVCvVY6C38dy1YWakDC/wav7 +6/zWTm06YEO1z/VM/A9bc0LIY2HgdFb0M1OaIQ1WOGAUd4ZsgKT2qTqcmnsENDAXRqhBgrvHX6KZ +RU3g3TPAlpmfJwHa4nEZllCbZKqS/orJ+Oj6WGvG8Ul6c9HMA7HPhoMQCCXDhITzsqCZVwgJf3Oh +/3eJA2+KUsL7RHVLlS/JZGxsyoFK7Psx1r1LQbrFWKQQiD9EA6kln0ojQz6lu6lL5lA5W9UR28m+ +7I8tl5M52kb15Cde8sES8qhQBl9EIavOl0z1iiLE6j28QyxRfVUEa0TtzzYnE0kBmScTKTG7Hqfg +KkDfy447/qiLXlEIj4Bn4plGH4iwXDFEgV6i1UiLe69ZEgpWVUaoTX2TdpZJkFNmz1ks+7zd4XuC +SowPbmVj296iFz8TbljZUN7Pl9bWAHN5mrNOafQsEO6M5RlYRG26XCCk6JlxniYGfoAn3jQoJJuD +gpizXKEZNVjx/RTiWGyyoiuSv+qHaZa2o95y0Vc8uhS9pd/gMHiMjMF9nOB4PuEe2M1SB+JZQI/6 +5/owEFtmJvu+2f1mF0JTOsPund4FI59EmAENkYkdEp9279WgNnVreCVMpX3VZZYLbsW/W1yXow2q +hYjBGoP2vUikgULbZXjCYDtQfbEfOoTzl1iPi3jxlTh+FJMhObT9KCHpK4j+i6vtZgEqd02Z367M +GI+MTDD2KvlPEdEyNOjQDS6bZUNDpS8sIOx+xdDI618P5fBtD4TnR6Knb8QrebNc4MBLLfdIXrLB +6ytx77r2DC6krgzNYGHAGgfGKM7HJNtdyk6q5lbmUP1HTO+qiPfAtEMiqd64201mGy3J7OcMgMEe +RvZ2UMjpUKWaZULDX6re0sFanhk5u57jJyqZMewjpFN1WByGbyMuHbqa2Ct3DV22QAXL1oSCvvku +tGHzTfh856qrYKSvNQWLpuqfyR2fQMPYFJreXSsGDF6oln0/xLmUDJGCWUSZxaJrt9yULPNKf5Kf +f9chXYij37EXIkr5Rk0pwKjap+j5/Oj3RYtPV89++gzwg12hpVlbAj6MzRYLOOa9ss7JQJRyBMxL +1wnN04QoCz1Sn+Gyt9SeuKV/ZZB2YlbqEtwN+SCYsdDnlVsPWTiqAXyPbhkEUKKvytY7TR/lN5qB +LEu6zpoTMBhf+wMvbxXFscwu3e41MwAdzaILnCh/mz0fMt2p6HT0CAkJ1Jn6mYu20EvLFkGf9cqu +1rUL08MD8KXBr0CQ0ZVBfLh2yKyemz7pvXwe5F9JncipnWTbnksJ0DrCVtcCE/Bfpcti3/uXIMxM +z8tUb6XKCzO6+r6rxI5RCZ4xH2sEpB2xYEzchN94QfP1KBbx5TWDs3yCzDCjLn9FqBG8T+e938V2 +VCEirSlKUrW5uo4Ez/z4Lku6DnCKV4dUWTufQULU+wntQM2dImmGhmY7mB5AMbXwHmIJI/ocd6J/ +p2vJ0KiphSCTZOr/03/WITExuKYL3+T2pfahZBMnH84r78Kolph9HkWr2xvoSqXVpx+YhBR1lnA5 +2zllntlEcVYYlM1COnlRbyDX+nWONz/i+2odNEauRxI9aeEdFpnUILXkjgmaQ7kZe0eoBNJL+U+n +VQcWc6G3NbRMkjCg//ju8DOHdiX0kBWcu1RgEHMSMcNlhUmpB/iGkwvZyvCfJ/WodXvoDxYAAumk +vyGZrK3f6cIOYZPxnuAhWdc1gA+CC7F1mvUKyOXyQOk+YyKG4UjIgSJOB8eij22yolSHsbQfRKao +3cBmkUZmI4i1NCfoUINqK6k/7RWej0+TeGn9ZCiWGCMjsstouaYCfAbPdVSWzdFxYe41fFymiFlw +FyLr0smAMlOzeNI5iWF3X/duxul1+GG7vCSIadDEwLmR6GgSFnY7xLSjzhE+dYUj4dU8wUsox4SF +7AHvevxSCcRKk/nsVe4NAP+E16Sqvg7XNcQhU6NW3qRwyunbXQ5y1EYdXDT+milshJ4DdENOwZ9z +fCzLum1s+w9o5pH8naOq85j78cl84F1TSBm3fTAm+pmgrBO/gLsq0/f4Pvw2S1Torvlh4YZ8ksSF +H6fOY6NGWVAqb7bJTAq7wsOHTcbgeRzNgoUMzkdfLjQctPabwqINYbASXgB42UBEnFQ1la6Xtejd +8voutSMBMy6AQ6mVF9NQHqLb3vm4ux1Nk3S+Qmk8euVCD+18Xic05qoVcw+hfaiKEg1nftiSfpZ1 +OFkx0PFl5Q34vDvqv8yVj572UM2Ju92yW9f+BvnuI8Q6ST1vjkUbHSd/qJAlLDCxgIpLUrqjweGR +xj2Nu+QFCM2B1IlHiyf+1BUx7aUpruS0Kry0wMOQ8EhbTnllhvT2xh2n22xqybdZVlqAMVu5YYna +LqlZGGLlVsXEyweTMGg+fkC+eikzjV2eVxR+KoCUm3gvGHLxq8gYYBp4nJLHZAsm1RwPbo0CYrwS +mjpLPpQEblap0IAbiAM5Yeo0RoYGhOj0sbsDXjnvYSC1PDUg823GoCRrpjWfxpx5BxOv3f0hjRY7 +/Hng1ZcOaZKJwb3ouI/4T790Gp89OWQIKK0WmQt9zebXCpzJtC4s1CpmMNUhmMfUzjgUNcU6Y2JI +n6UIqWRSdPO2kKmQqWkpOyPmv9I7X7dMYjKDHYCB4MqHQPmz+2v7iJ9YqDHKoETLaQUkdwcvMBDd +Vbvh/rfSc38clTP8OZadw8KlsspDkGPD68yzpdI38tfZAOh6ZKDy6EkRD/Ospru8Znk+zG1hbIkf +rL8VYGLX60TlO+w60uwWAkgZ2p7KTMABer6kXWw2xGmtS0Ltm3ohgvpLl8mGfMEfyfXMJF80UmiV +SjyoKMSs5F51jZEAghiGsA21RLid4Am/j6VOme6YjpMyKh/OycjJ/jj89fgxax0Ut43frhUGsasK +iqpU3jnF6QfHRh14rwtd9qtOZaR/4Ywr8smrxAgCi9vkkHxLrkOpllE0kIqLR9EWw8RE/jQBjiVT +Gof7O39Mt1YdIzb9dcUSd0kGQdTx46gQ9XKdfA/Mc48rw5lhT0vnT7MyF/ld/2EpT/j9tR+MqUMk +VUPnf/ID2KU6Haa/VgxcbsdOA5o941UXpn5gbpzgyr/OHkOgDyKXTSPV+oB1Utx7Sbryut2J3IRe +bG+fdzue460XAajQQU093rfkAHrGKIXL9BIUZqlVeOl0tL85Jx6xeSSwoSW8GpffexNydvCuaxab +tRQImcpXNxLdXbvlZLqBk8VZ0eXdNqfrbRsj1CcmxWFuBjUHMU67KVpcBKcAxtveSb3qG5K+vCGr +OACQ8B86MEfZrF1CfiBmcFMnqr4a+/CgrSSXHVfWOgQ7PxYtsFLlApnATUFgmrkLPaw4B14rG+Gc +7R6uOdsnaVkgmVdZirzjGjav7E6WGSIf+9G+KKZatVZhEOOjFnFsCJpk9QrC/gywLPhdnn/ImFNN +frLtQdHNV2lrVYe81zvmIf6Ba2P6pkM2Gf1Amwrx7pA63ad5xh/vMCA/PvsayGpGzxOaZ5p2+R53 +jlUJVnpYcMMKOl0E5ykbB2X81M54j6mZCmjFJdB2EXQFMdCZ6CRB7+fAgqdGVWvq+GquyXG7weqZ +9aauAlhv9XTiGlxVqFElpRAUhndG/U+tt4E9NyUxQplsVUdnEvhZkI2aulsI/tZNVSQ+B0bRUsJ6 +KEchE9WTHle/K4JthrrGWwxkkW1xUEH31xfC1LsIRMSqxLIqY74OM4FX0az5i8MpkXb6Ql+Z6tDa +ACOrcOO0jokS2FQ5PFl53ifx4w1vi8d3iW/XLgHYvbQJnmsSwkv8GpGHdzzWiX0FneN17ywzuEWY +0WKFthpM4AOgccM1waf3hZFVnN97Z3q2qbrsdqavsCprAT85m2wXGg3AeXPMWOaCgsXWX5msDQ6e +INvsG3Zabhndxc7cjh8liAzBYgkBnGVItlDzVuGZGIb42YftkUO2W0IOQ7JVOATRXuXuByU6bpiK +0ZdVT0gq/cmNqwdzV7APpJZDfPYu4mJbZmjS5X3tf+KqBD6gNkVI+Cic6GrM3Ea/h/bSRwlFCW+d +r9Qngq1KLl8ZK0RCIe09Vz0zVLbWnkdfCfM6daX+OVttb0aNqRhRDxGaRv4IWPAjgCNhue8jzYM6 +fkILLKAfFUr0WQllaWbmAuN0ex6FnaaJ5hAPURwyK0qWfXnrpBlBlU9Jg39sC+wwCQRAQyPWI/kN +AqDrddkTnP7hxkThKZ5ooZtbmGLkywbp6hMEee/X56oUKHIifNuRiLXKeFMwxHHyZesy2dXXWyd8 ++C5+URXJeebv1nFjfPkBxmbtfc7KyALBUaX7wkNpTDbU1IW6vKqiKNRXPiGY5OZM3lB4AcI5Pnfq +f1NO/RroUDY1NKZRDH3oMwz4MMDLzYk+48uD/THYgwhccE9T/Uy7aSjrGEhXIDsx1QY/0pYsdipg +wACq8+b15EmwNWkQHNK+PPsS+KGnwetG6ENZrjAQC0spxbkiJTTIPnmyNwu7tcrvFBZq0iztZeay +SN09U5w/9umti7aVbh0OdtRKU6kYWm7ECXds8HHaWVkgDatZm4ift8kcvaRQv5XYspmtDOoajjGw +vmx0OCrvdLMY7KFpT+LNnM5etiNxkPazP6TVRG2j34hwlCJWA864sM+8FTTD+2iOMGcvIt63y6KP +IoIgn+7SQ5d2A1jPMXTCuQG4GoQCSl/RMqBQRoHdri9kQtFG2/aRGRMlrFmkwkT0Bu9TrwLtH+ST +l5ZVcXlykbAuSGBTrvG9r9CVWNGrUbeXliBctlvcfeSrGsR6tRd6TpvQqBJ77PgGx96mRFru7hbU +78UMDZphmiv/d0ug/8caZrfcNNqZH78JqeZmAJctktbHWAT4Icp7jliyeti485MXlqFLMGx20zzQ +TPk9t8Oxb/mu7NBMJn7Et+awfrfQxhwQnYPds57oC9Wq1ZPydFlvSlNbqoNCNXj+I9BGhCL0l7jC +XcG/5RK7iv55D4x3yQik4TGwwvlGfnnwx2yAGxv5MJuI8a9vjLyDv0xZBaglCvhVXIuJ/oKbkeXS +D7YFYZT7V98b4NB2AFiW5/Z4DatkTF+RS4h9aVvqMMgEXTNQl+A4IemAX/ELgXcBMAtCp79Pfy8Z +YVVjfYuPc992oI2cvUKtVR+e0vXgOa0rltaQdHhxmnYAlEuNLgZry+1jlChUxwVPvrbYhivvcF/h +3KDLwIzeo4wxGWzGPW+3B+GPF0rwqnLce6lMTakd2vU2w5sBv/J6HXMNKr+V0W6p/r3wF4+cUJIv +wyGtJ2/1z54IDkFRT6n1+KPk0zh1CZYBIAKvStOh5DSURAzrHzqai8xZIfOgtMwszENkUiRHISAI +XVATJoLAipFyHZZYQLGKJ69k2lpE9B2H+RxyrxoBkFNnO0BwbHDg2rZTUDV4DZLT/ZA3MCrDUUar +YkY0hW8R/Xyf7lTspDxGvdTw4FOCq2bePNM4BrnBKbKbkl2NiwCuAT2Z06mDkBpmmOrf5jf4WYuI +umAwg/evoQm/z0+8jzBk8kOg0B5ImqG48vXP8LT8xVH3CBWY3AYepmbOZ/eO0s1ubuLgpjXZaJux +yc+07BEYQ79pLmG7dE2hvFwfOfM7JDqtHs8wGkH/V0aOd+Gu4CxW7xRFPeXD+tmXQIqvoWRJDrqn +h4WaGhrIBAuhngwsbUTA7h9s/6RAHOevMQ1YoY1TLLhD/+JFLozJRS127FNazGL3TIN4J+sLXeYB +SdT875kQ1rB1QXtU8kPwdC6tw7H03rlRZV9RGboDKZ56BP9GUl3lWEw7v2Bd7SGygrNQks7u2TAB +D3i9jr31JQjxFdrSCVwuMOBq1BYbfkFn6xWNSjhdqA889jKHwB10MXflBMpwIIFr1F4/XQdYUHCv +MoWg1bcSKf75/MjOMMupFYo7c6lrP1wIrJb4uYsPoe7ssbFHqb2m4BvZffhzOVf+4jkbIVWkgiiI +FLcRw77O/u0dl1epdapv/VnRyBvlGaqkFLW7FKiLTA9LCdnR2U+qyNk2ZGjHrDFaPvLA1uChIQWk +h2FDRdFChfTnReC7lHvJ4pHOTwUB05EKn5HELjScUE+CFxfFmqESAa20LlalFcSSU84JUcDknuuI +pir+Rwfrpe5WQBT/4pCQKqV+KHEjSi657YN2qE5236mjOxQ5teudNp9EOBwmmSey9kd/cisJbO+S +Ihu9jggxP0XHiROQk52Ac/JcUiyZ51zssOQ6cl+pBfTbs1asnq8/ql+es9rQKnyrwu9ehhKhLrrq +64iQ5G++D4u/R1qJ6XYQd7HcwL5fhYHPh8et1dg9ZPlbsCRYMQ58cgtRtK5RPOMUXdXTaeIaNnaE +mxlzF1jBTItSqMYl+INGrkNfRt2XlLEtXPOjF1kg2YK67MjjrsLgAY7T59nKwcu6tHAfPiC4XiO6 +r69z/LqYmLOMLihv9Xra3iwSSrWDknn+hvI3EcY8VPrTxMScdHObF3eqShJ7T1I9rkdoAE4X+VoN +FF2I6cM62VB0UYmAzZFNjf4EiGOLyvc9Z3GuKfqcelZLTEY+llTl9UxoVE4LUSrlwTcRbr9I0NNO +1XlsFJVa1nD6LNzp0wthl0Ji6sxyVtMuCzChgK5JecwsZ2TMXpOW4Kv5Jeognf+9CvC0N3enGRZC +2cuz7s4wlzjBZLADvlbf0HDZEDCcV0Ll0Bg2K3XjNpHFL+MBkLh/cco9wGsgUNeOkqUdVoJMtmMC +HwjjcAUp9f9eJRJBdoDSUmHGbhRGQ/3kUq42JJT5x6mWJiohynez/Qry3ON71NOQ8DXYqaFngYY/ +U5AznBDMokgOShn1Y75F0P5E635qjLNG2MdFVJANQrj+iKOGC5chdB81K/ZtviOSVpnqg11JLLiS +zSmGiM0mo2N2tJHZbGQA9uW8h2gRdVpu3XRF96NqMTJSLP85HqWey47Qy6HlGXbfEPCkrFOk0+Qc +1a4u8BF8j77pcCzOoZlp6++gf8lLMsLb0msrsC1ukcsSAKeto7aKCKN1omBjzG7V/tNacMYNnqcx +iYl52RLj2CW+I4IFL5ZZIDblnaPTpXjrVnvDH4D7QliR6uQCCRi+PC2f0SptHaxVyCTl5HU+7Oo5 +EeBJW1xDn1deQO9ZxVx22sQGvKO3h7RCISKp+Bg4H3rkV3aT/3DqDrsWJNLrovjMt2bqmXanopOW +64+WtqTchFWXwURQ9hGD7MCkF5k8o6VNMd8rdvjk50LW2R5QlJJxZ59khprEaf27J7D19c766CKu +nl89TDkeWvWAJQSGXexctPuU6xejgCUDhmaU1320eM+8qi8gnLuUKpqShMQA2uRqcY2YhMBeZzc+ +EkeCrRPalyFz20nZuns29ik+mFTrl5nM6vT6rqX04GpT7RDitAG0k2OZqqfdPUjImIG81CyFaWpE +KfbysHdfOgwGZARejO01yfu3Rr3sccMQT3+SanvajrVT9KlbiAFllwaMCycBuyjajCiffSrJ9DkT +Z56bCIR1D8IHJM5+qizopoX+1g8p+5XUOIoEUo8/5j1PCoOgBl/QXBPgzdHby5GTcEsZnlr3TEhw +OsoHbvqQ3onrDSXB47xHfLiYS6P3Kj0fyHzlPJfPqlUxRxrITNwtb6pUxXEICIFN/Qk3BQlUkI7z +tpgFwAa9526bIMBS0jQl5Gvu0bIym9tOKuA4Qmb+OIIHKegG6Ly6t5Wq9PXGRGCvs6/wZT0kNGH1 +tDFhp8qHYrgiGUzP1NKtg5MBmJC1PhPFHZlAtXkpPitWI2XV0iCiivY5hWAgOsNV30WhiU8RoQFO +QgfsVL+dkDd89iVq6DfFrewz0PoQdMQAQp+XGHmUivB/35MSUDGzU8kQJ+an58cwilQDp1vesdXe +7ki28w6uV287KSyekF0W1G75VlmbTR3ZqPexHex6Qh2jZWKkNnm0vZlCUJwd1Q4bZoIPJ29ddnMm +ShI6XObcIcRjCVyQL0YQEzTLPWXLY22/6bC2JtvL+b5wI8xqffPjZe9LV7fertNdihZ1irA/Hkos +8yQUcBVtDR3kYDi24NzvTNhB0g1UfzOt+tMUIFdb46p3wOH/x8YBYdV8f41p1sNKT6s8LB9QZU3F +K/PA27aEQeUMfReCmy77fIC6xiEKKonMHQi+DmcTiROfYmX1DeZtrL4pn5w6trKWYmx81+0oD5E0 +xlNguRal3OQiVVJOAiwmmCTIAyb4tspZdb1XS5oqO5MwSd1r4LPvhoBawqKtfcxnNVLupxlj6vS6 +8piJN3LXkExalv9SmpDR91in2lI6VAP55SE/EdzwmFx+HMb57zDLXg0IvW/kn7dTq3UFqdA1iDYo +tG+7ns88i7utEbq6KXvvxoC/KF2UVyGnHA7uKoEkFLtSNEzxwOTWRrAyStK6Y/PL4IG+PQmNe3Ye ++OOLdR+xDCsG8Ds9qYRyTyo9YhEkdrDypdGVe9Y+6nMr5ICKDGx9xk8NvfnQmVRw4a8oVQXchSAF +Y2C2xykVBmDWaJFKJKLf9nSkPDirW+z0Hs8xedtIUA0G+N5Cbpy8GN+o8SkJetEmp7vRPfS8xvfE ++BQZca1LydJDi4bEzYnlXtoEmH+dhQtmdqo7FzJj8F+SKTHbNsohQlweEStx2pdViorjaIXx7lGJ +9YeZ4yA9mQhNyCoY7p7a2uMk/X2wXFI1DKPTfW0RjCI6Xt37mM0fcGzNO6R3Y3jC/zRR4RGTC3Cc +HW7iRT7yfKfnsss9OrpvlNowVKtiHDX6QfJMUTaTK/tiFydWq3k2IknI+DHzL/CyQpZH488s6gLS +fuBYSd/4uidPFtY/cJGDja1soV8/J9sTVX170zzPmhvX2Bc39qcvxJAw4n9d9g21JodfTZqCWcpA +Q8tAVkbBFwSzxiB8LcSEvwzh6A1KOTtt9ac84BiDMwlLfHL8NnnxB3ecCg0bwWxz22dgFvhPguP4 +LmeacIR1v/z2vJEiXFrVWgarIjiuZKQN+Oh9wBKphvmXomhDkIg5GvwYrR2nWHtrWm1+jZMhOHRI +Qzt3M0waBolEq0M4BejhnGGRvAKwGR8BhyCACRVGw693ONBpHmWKEE1iJ1pgO1v376MXsqE0Y9q2 +fUxuzGh2rejG1zzxIdTN5mvyI3lpSwWeB4DK/siP8V2yVi7rbP31bsB31wpxxcBAgOcPgt4qFcY9 +hdz5iq7ss8AsZ3LoDtDdcw9/72cwk1xtO7zP3rZxtLA5LueFJR1d4VwtzVzFdjrk2nX4feO3HmTr +y7UxPW/8fTdfCcEZPWVdrxyXCKO5rk/iExRm0JDuA4ChbtTmPhLTt7OZxbb4YsecIEXzYjxT2m3r +mNmONVocSAgfRljr8UJL1ig8hVZNT2qfA+WF6n+So3DI96Y9bH2YUSK0vOh9TM/DkDDKZjWmt+7v +nM7OlThhPOiCu3qW2Mu+AT7WU6xTfb+bPenYWWRJ0/RD0/IhMUar5vC662d3zGB7VTU1GGQ/iS83 +gecekI5mOoMw0Z/umaTOx9rp8jUOafU3SsL6QVlDOkYP2Wegs49zvf9o+mqZ09RKYUe1E+/dFNCY +IjquPEWwRSTPUzbd4urD4+5zm7CzacKMygZThzS2nN+rEC4vq06FsPaljsvEYw3O9KR3JegnNAM/ +7GlCvYoTAgysbBB8bvSryFXL9x9Ch6jJsaoevIUFt4AX0f09QzmL+ki1l4u8MRknTaEZ5CsY0lQ1 +Ay9n8dHvkAMZJPPtps0KJYVtt0zVqIKZMlhFShHTvmgx7nkaGtD3y+UqX4mRhdHlAUQaa5XA1vuT +41BdbBoZTpT0gmv8koR/hNItM0Q0HzVnqMI14xVywF9XW5aa4EVhKQ1EkdtX6iPegHkrJ6Z3GH7l +l/smIlZlGb18Lj/XlRzO3SxYRJ9hdkzz5lvDTuH+uoMuVsojCJrANxCE1cS05sCV5UG36jfw/wB2 +mZSvULdIfyWrPeDtb+QAwGF7vES8ln/ql3rAoq/R7jTTq4hoprW54KdkLJGbeGZVjrPce0NfQFD1 +2VuuyykhxbLoegv+msVzMTF9vsssMgKy74JA2Uzhmgqxx51PKyvjblj6+rrmni5cIgVFXXnKmIr6 +AneEMHgF/mio+qYrEk9jzSqaqffNqb4HSjZSQjAoy1xsSWQQaxhX+9kA52HSIr+v02ISyb0Z7zI+ +62xDvtpk0fitY77HrGzTs5MVmdxyWFWppYPCLnhbJI44IIRBy8gmatzyJdBlMd2uvbWB5T72AWkp +GrMw4PsRPcug5NuPxhqdpdd9OuPj93zS0I8Ect5Ed2TFreHkwFQ96K3W/+rbkxad++gDtGjKlqO/ +Kx9/0ecH9K7lJKrbPkdv4QR/eo+QHj1G6Xs2Z55jccffEtXeYfcARgA2Sho109WqxHksBSp9/mL5 +lR3h+MOGB2hdSo8Grlsw502GzGwilL9Bk7WyxXNtjU+PVjvyHoAjOp7rzJ9p707wHoq7kMG8i+Il +5LY6Nm1RXifUGBPvZUSUUpbEs1XMF3Lgn/bkfWDDDxVG3uDsYp8jnblZ1IWeSUqFM0BrvV3RfksY +jXi+kkMB5+4CdC05mfYdvWwSXeK7eH7ZqyMt7YuK45OQuWXFFx8VDDCHkZ8H1neyPDonsWKMhemM +cVI+b7cpUpeZrl5uyhABy1xgsEbLtL8yBzufmig8ViPp+JH9EgZjfc/eXMnafrN+75EAhZKnzY5g +S21BdHxIvQYu3QpwqBAl4qz9ZKuloaI+TvSV/8ZXkoIY3pzu/CqN8FvKx1+tOtEqXs4ZHLq+fa07 +ucKv69jXpfBTtLQhqhKqmZq7IoM5Lp+pp8B56+RmTOxs+iuT2VVw2DdCz6mNuyZKFYW41DVqRoYn +yQjUuTQLed0w+vceqtSj6AJ1x8rosqt0g12CbBzMA8zj8dUFA3UtHn/JlrbwgxQgYcOc/lKbkMXb +lbPBQhKMnD16bPWhfYDhbdQR/2BpTSbYgzDQsNrZrTQ3W+J8pcbnyQ4iYl9PjTJqUYwR0AqTyTl5 +900RlsWHoxj3TqcXNDiDBzf8f8gmCaMeoCsGwyxDjjPFX0dL0IwG4Wue+KixWjKt+tx3h9nk8c/o +tuj5XSxkfRoo3KqXE14yVzzHKwa4WgA+WewBRn52QSreXJ4tGApL2txxChacGaUO15xYgNDWLObZ +uV01c2Z0ks3iVjrdpT/7eJC6m1WgHVyKzC3yhKWR88p+jrR1JwpPRTAkjNO0GwEBptbciziij8E6 +XXuK6zuBN9UWw6q5nsCYcyjtoF6oyDB/Ol8u8qIClRMpVi39XkYJdFT9OKSZAZ4pQ9mrqRtgs5Yg +N6FfIW5M44+mCzUnuqmKa7PhrMyijAL1dHa/yKnlaxA5mUU+RA90F18jDD6JDYCiofaU0Z6WW9iR +Nv8PH1o8TrkPVurhSIcfNJcp6lX1H616dkk4Ek8RmuxbSCVxZa7a0qET1a/IHnAsh8pbZQei10OS +8j7oI6WD+UCyO9LdWwiEbAbF377kE5SBw09Rqtfbxwoz+k55GA9F9qqX7JS85M3p8z+yqUkV5bvl +/KAnqnXNa959p5vIlwIECJbeA/lp4iWPxERvQBlHNy6akkvPtQDGqkpXkCxmr/wKStUj8z5CH3k2 +bl8rv8MLBcLsGsGG8ylYnWD+ySOZDx7Av/0HTxEGaZ0nKj13kDMrFMdlCWHQo/V31uuX+C/O6Lfi +Y8iHoG+Fx/LG3Eqpe/QWXH94U9VULwJhow/HfoyzpUMfwGQRJDjag18mZjUwnCfkMtCZFKaSvQA4 +mSHhw9EOoHUfmqRrI3JWC4WFpGqQeZHfH7sHzzCZx8uxwtl8pRAM/IDtr+J9mbaGLWE7+GUXwSqD +mHMZTRjGP2Fu25Zn3JoWb9MDRHnYj+CLyFE0NFW8hMyMvvWCLt3iQqo9iseASVifLuGJN6KS1POq +9eDxsyI8Q5EET8TAx4gKpBo6T8d/0uyPYLXdO1eV01OuII8eMyiRgOo33og0t6B8/s1mE17HbSHl +NQmoCxgFfqiotOqZcUGqybotqKx/Xe1O4ra0z4C0yexeoAB0Ufc3n0T5BioC7BU1gczpG/RvGWo5 +kIgNCA1LMp1uVXa62iNrLIqejC/7fS6b0f/Y51NGNMOJIZhXFtigtAY9T30TkLYv8y9rmtQWAbSk +BmtT3dPbyyAchDZGU2W/iJOELJtB4uErkyBtw/9eIcr03D/yLw9kmKN36X5TjHleA6t9r7Sm99NC +OF2FaCT5wXZ8GRM/K+vco/NSNlxMAltvRmjbO7bwDT54D+NFq5Rzo9cbPySXa9Rayxm26acpa4kY +c+MWMtlAYVlLmMY2v6yuT+xxOgzTws08H8Nj8aaHxOy8cbPPBgbUZm52qrDaR63R8gGgXe2HARim +720WidrBvtpAsjV5fROpeWDM5M0iHpH4DGwCd1X0lxUc0IA0iUHWVkvvGW98nkS5XLKh2S5hL3ex +KE7LU5rnA6W4bPzMcsYJE3x0fjD+YdU13vF8Ef6lnTjJ6xcVuKzHE/1MQ2QJn+qmvkbFXQ9ZqmwX ++YzpsOtSZ2BjDOXqUK9wuyGBb1x/4rUXzUNxwlgX8m1hRJ58tBzEjYNWriON80cB0tKfmDRnTq02 +AnT6RZAcK5KoAkzL+nSFTaiIc7LKNMPTZ6y0WnHkllMBwJV9v3W/QrIqh+20PlTepr6J/b1J4W/T +dQbFKlR1aizBYCpsJ2HpE90nmQ8nllGsgnOtyCZ46pePaA020JahxtcXY1Lk2zjtvzAAtbNbPbuC +x/XI5sXPHG7V+vgzrFXEzkNKPiBfCoO8moVTTEefC5DlIDfrNduH388qJPpMl4pIStP1Txq2j6tx +0zAEcthM+7H1pDogKsRFP2bD0eVJz6JvO5zDOXEVBqGgJE7HctQRZt3rGB3cYHxNzNxkjK4moIya +gQIqvRiP8TF+i/dOccr+0WYtVyarYBmvUD2caMQZHvYP0H59zKISLdfcvqMK4ANEvf9Tia3sT3RF +eD5CU3Pw+twVT1n9D5BXiIxI68tDZ8L3GbFE0fH0Je6s34zChoRUgK7N79ZEb05DBZWoqyzziRTa +sCsywcwfidupRVE4UydCsw7liX+OYIiflyVE4Gq4+6FNDCexci528U8MMQlKdxSS2E2TRb7LUjSk +HTudpfvyd0AUn6AxiFYypiq5CeB+dYeOGVljxzsF92kvJw6FdM8XM7Uu2NW8Rj0zuojR2o/0tSTY +wswuwx12oaUAThimwbRmr6Ve3/ulbO6SW2eYkwRD+zk7oZseq77iK8UjMRP2PsPH2bf++Du2JRDc +YyCHkRze662KwNzvPWXQnQXnGoXww9n2+OoahuaGokUk9fBn+yhOTjxfCk8IBoBLF/NAkjXeKnef +w1Di5ASyYml/EWbyuXLjmTpnaIHXxJwkZ1Vddo7KOpa1/+cCyx4fH36MjLserzNUM8sisKJ6xRlp +Gv73qfpvagnZVfG8Vnb8zuDGr/QdI8l8XcsbMZZ+ITQy8RkXM5Ga9Y3LENua93mPc+F9U/3pUvLf +Nn+9yk432o5yGuNgThIIrXeZoHlx6WxpEh+4b5/D2znY9kSBBHe15g/snKxZvn3F4KLVQvgygM7Z +B1SqvEdWevsgw9yPMg2nq8g52Nq0+Cg5wZgQF4cx/n87oFsB9reykkcw++mggz1Hp4gSwRkIect/ +6Ek5hdJae3Z83/sy87xMCDhJG45SdQncfnRdf6iTVvSBYxquEls402njJ0VyDw0+tJ4WuCZwLF4H +P4bUC66KXcN4Cf3V50intE322dCCZLnGu96gSb/cYN+nfRf3+QJWXSyBGFkPHJ1xzKZY7GrE0I6r +WY2DtHZEM3K46pq4/V6j4cUWCTfx7MOACrduNgi3nQp2XJxC6b5mLSeIKdlU8G1lN7zVZZAGVLey +tWb2EnOeVojlMGkUoGuEVB3AFirik5yonh6Tm8nXbBpyh85S7E+Sxwt/EuhVMJQnRm2kzQ2v4tAN +6MXnuA9E1YZexHsSl6jhETG6yxJ2DoZ8xuMpQiRl2mbZxgTjWW6M0nRY0mPU5hpZ7HoYv8Wl7uTZ +Ky7BLP7BVPV6sUnZd5RhbAtxnaOTxD3d3DIGeaVLyCpTi9IN909lEvnvIgoZQaIQRMhgu7LoEOG7 +loU2Sjc9NhNGLv3FzgF+iK0zgQCT3n4VexSyvOnneIfKECQyLpRXVfmjcJTQx6LLIianRj4jn5Ao +chRW0RcMTzGzOitV2zGhNzA0FYd/N4CmVYfK9WMCoa4HoJEVUgjTFEmvTIsE9BA+DJAvmeFoL4Ji +Tf/dagrRkZ/zAccsYBhRPTMuSc25swYi2tJ8VXou3K943okAbaDbZIhSZjjvVp4eZOR28jBh4WUS +baOjui4vxxvU+oh2nDvyQUxpmHpVHI3xHaqvOtbqX78fQzrmsF9RqoQkfRaIVUprrfcwg8mnCVP3 +uVMl/An0wXs6fHZcA9f6o7U8PDqsTx5IEKylhU8T+qlKM/QB/KlNe3ydUwyNhveirga2jXRccX4Y +b4nYO2aipcHWH5HBX0P8wFk/HJk71VXYdv3aIdPFgi4uhvI0+R+n9KU3M8uz5Gnx+XLvocBacgAD +SZzRh4UOkRoogbkhWx16FAcgL4ITcL5gC5UdzzfX4zO5K0Vj1TGyhwAHoLdBCu8zMOX9M7z9zMrY +s+R9OUe+AVvvGYDRvibk4NvX84uymWTMbeeZ6ZWl5byFm5rUtqwi+vg3qyzeDCsy42aNNTlugS/O +b4UltfWwaoMzyjP2p/0+EzSkSGTuze0Vsabh7G5wAEiQdn0Bpni/YCaDBPDYM7jcGYR4E5pDqJd8 +8LCMzqh+iWV0M2tfbHpaiQdw2ycBNU1O6yzBTyaM+xLfndjAEkTqDwp+CuQvK/8I0z3rZT6GeKjD +KO/uUQRiRheeQavGKcdKFupIZs5hEfKba54KspXPpcqkhr2+YKcC5BrYiBtgcBqMI1fL8huLHb+r +Up/lbQwTAQti7T3AfFZLsPVUp2XYqQ3tshy2rkgvQDU9UZWr90XWUxRBe/MqlAHywpNeWjiqNxYK +dXeosGKdK9XTR80TxS45TORTECVaXqupQn6O200HVOoR2+JQn8m6yMjUmZmgmt8Ebslym4V6IhYw +HnIG+Oc1NZG+dWZwMK2wfUFpMFnj3AzbpR89W1xjs1haaqlyZGZYaKj4l6W7bICMhJi1f1DYbVAs +Y+dmJa9dX7ggrAPaqulGb69gsTb6HG1nAaduxoUvLmm01qlRQ53a/xa4s7gH5bz0kGqo8R3TBZ0k +iFUjVuV85mZg8qfzvgMvBSXvnJsvIz5szC9RNKaTaREf1sDkZEyUQwj/WyC60RVaLskAnJWoP3I4 +7XQtoOiiP62J9Ax5Y2NJwmfUS9ldQBDl7giu9+Un3w2qeHoOXLogILTfvAAk0X/gKA3IZYAbpiaW +rqQoRNDt/FIMrpKh8nQ72K0DMC0lqRKRz+PmSAlcFwvyY+m1R2KQ5oENEVMKSnainkhBjyD9zWHK +/mwO0cLFVJeZUM1SA3EC9C7Mu0y8d00jUr+vAPWJIkHQfOrxyxAN0vuXedrtFUy5gtIpF1OlilCq +Ni5zgTbxt+80ArL1Kk8WkqufatqNaVd69xmRskihY92AJhd0s52NmWWMQSA+tY8Rb+w9ZMOKEAjK +CROIznbty8qaTBnPh40inSAiXliB6BI5FPEOoLXJUYJtVeTBtPJSkSxHPxXrUwZrBvjBLDfqf3kq +SaXOK1J83KWENijj7xiBP01iINGXmUG8VcyIySxN7KG+ahF679u/cL/mkoD5U1k72ATbl01pN4bF +lK3+QjRSKOB9uxlU0rrwSBcU/jWf8m4MktIehGWqO5+41CvGGV9gH7q/5BoyXdHFK/GcsHSapYwf +ffqdZzJ1EBb9nuBZEq+ssmTIctyvevGenZ95qa3G2OTvecqGNA2Br7sLSVmFNxWDPIPvhnOWjUDo +fpZ7ucCcoIQtw+ApUkO0MW2qeBQ/iip1LtWKXhAVSVYQ3X5VtIgbf//+2BcSYe4qwrRH2DmZalUN +HxwnbNV4Tt/tZ1iN494AXNaRykjSpegZhf4/9f1SimXFVbL+HcOo/wIwMq85IyeSXa4NVs2Tv7so +3IJlpJ/c26E9OFr5jzUgBH9fsjRteCjowj831fNe+lXGg7OPhtiVExbMTOZXh1YWrzoGqjotg0d4 +WNERHu7JFiJMelauE8tEInJ+L8+bMVGo0d9oiDzSiPlJstxFCl28KkXOmsHEOK7hBBQ/ERh41TTp +jf+57pxxFDW6xZagow499sWCkB8zYkvZxmkq2nzDuyt1VECHE6DIawzn+l5WbLqMuGHYvICFaiaZ +2EgrrUfcxNJQNB1EefqSsQ5HyrT6OcIwpIIigvxw/z76rmF6+SKEjc2fNkyEpG2LHHyuowD8HyPZ +mrS7VH8ibf94u3p3GzVYqr50eRm+xkv3x71LMkUzDiVOpRLAP5vsK7NjOBz0pL5sV43kSNgEkoH5 +YU8Hi6RufU3LL2IDthA0NjdNbzXQB7XFSTkBZCc3TAg34OPgw3+zJjp999zHGQph+UYMx8tis0w7 +jHM4VORjMjfOtHKiuoCpvnHNxBl4MbwCrUG3Qf1nUaYt4syOAz1v1tk3WV/sNyFdlUa8b2xFDcVH +Z5NOYDtgkagssGiWd+C4m/LsOj6FORuXayER/QWo2v27y8lg1gPef7/jezrF6a3cLJHzXt7QEYYo +mnSoX0C1kUyCTkVVe8XZ5BX0/6iXy/OCq5Ed9977xl9+juJ6QzyYtfJ+x8vbVtLW3wOcC80t30W2 +1bcJ9OgpJMS16LJ01DlHzYP0fQGKGkYP1DAi8nk6KUe5wADT3tmAN2F5vtO4xdV5JkpagZgZRcz8 +beUsp0YqYYGNzhyeCW0JvGLpnYxPT23pD7rKv5ix3XLyjqu1PucQO1pV50PHXf4NG80R1EUNn0vt +xdVnSuGPYqDjxJ0TIqUIleWjZwER85NcXA/ySqY6BKbSbV2MnkbbZ0jIUYF+oWEsdd7y22jBKzdm +QB4JkMo37GHwJjZai3c5KuXv8uUD6ZTdEFsiZenvPuXpQloqgXFvvF/f3GDQC4XWxJXCfDUUkFo1 +2Gpu8Ms4nDANBGpj9TEtmIi8bUYy69CDCYykSDUxSDkI1OeX+ZzTTJvt3MDJzs6jH9odzQ8PPLG6 +CbJgBoXfD+tER8ufoRlWjCPpk3WE3R4nMEDFgG4EbdCYKYPVzCltjlK3xhStE/2OnuWb7B5cev3W +u9guhKYg4agwGr/CH6Jisf4o9pe4InA+3yIXBAABDK6MnH3uDqTGtjb/M1c2AzOJUPCiVKW0TTw3 +o1zmYrM6vxaN8LnhxwG/s89TSrTIUwPIUnzSTO0k4ncGWXEqB7wiIrP8tJaDPzmLbEw3jja19Zld +nv2rDLxAY3tqt5nEdw51XdKclKY1iGcY+CAc+55wvRSqbJm47KfJcpGW+ElkHENKJM/KfdjHeRNF +YApabE5OXfnQ4Pf2p08pUz2ObfIfRUHeaXjQSmS0VOyqVB5FExNWz06tqwEeAP7FVHYPNT6abm/r +0lQk/14b3F9bDXYzx7denTvSdIhcA+sFptd7T2ch41NwRO78pimHE0ETSWmBXLMbhm6cud9xMrzA +9i4lapupuXhVzKQUuNpy3UUDWYahQtJvfgxdBh7SRt1ii2AEqQCCltnbxnCFM3P9AFRgI/lrgW5f +3PIeWlygUalnpIMONM3aDbRzo4yW4S4HIM4V1xfWAoKaepCm+MNUI3gRHjiZRP+IM839E//y7pED +S9TgUUlPn/Cr3KkxqzOr2Hk0NA+P7i+YpykxWc9xBS6/tpnvC1nRhz0oilqiooZO0aqLCNu68m9q +5P7tBa1zMH9gxPcVDys90w/G0BhKPPQvbAy7azG4qzuWToN0FAhvhVr4m/MTfCoqdfFsi/XWmrhX +H+1ZUcOhzfmaOM3LZVz8F/efPO3Ak6f+uuzwLwKnW1sSOomhyXgYpiLRVA33rtrhjmxsyYJkMPoj +yqSiaTLq/n8/h7s5xNrodkiyFGyRLXA2wnjgyzoocy2b3XI4YvI8kxBTybIYdaSPgFTBUEaE+0k+ +pxC7TT7mskrvJ8jFn+3JccVYsubA8FPsCs11cmo5H5KOawjcGwp0DHTcVFq8XKpBG0iPh77i49ma +vfKa4QCxLhf/U7lzeZeJ/W1AlD11aG4AwuARElcclkwPmKRbzh5fVKHAMRRSWgOCD1YXdPFMbepk +nE9Qj77xsqTpdr7P5Q3J7//FeNAip4AszhWPm7rd+pqBia1O0zq3aHROnqhhoSjg/0OEGGeJC3qz +cVq6QKCixFB2RuABb1uKyQ7RXc7t4My/Poqw4kgRrZQ90B9Y0PGPGeHksxHfO3Gxo+zdOWNF/zT4 +lvty62hMgFAvPx8IsEHKVe77G0n26tVd0c6E+O3Oawap5X6WsJUJLiygjJw+7eQ42Ey8NTruUYry +gy3283m37wx12ZCg710CSRiETCtENmrzBwk+7kA3/EAUqwGP22T41V+8OdNLxgqjMvcLegdVZ3A6 +W6DzzEH64CDRR66LkSYjBet+HNOBmV1A9QeQY1dZf5n5QV4ilN3Lp92WpZ3EcrhOc/cDy75fDoQX +HSsnhBhD2BPmaNe1dQl2lIi/6YtP+iKNQbHqBxN+2tNT4FN0JU44vIMDlQ7olmzudFDqiJwadQos +0B/hN2jPujMZJ0lTsy0xH0Y1QRcrmcsXH+mIFjgBRs0TbUUclGLKslFbtF5V3UAEtB152DmfO7Jk +zF7B24Lday/L6L4Vz30+fkmDlv4/4KIrJx8yZtigbnI1c6OCF8d5FosSkE+kpUjY7RLtit8gmX0B +lmO/46qajVl6C5BiPugj5yxsV1Tsbr1M6nAdNZK4y3/wYes55gfGi+SP9wLZQhSBJ+eYJvMiukaG +RY4nn9xW1wvhSIHQlwjgrjZcXxV4gLKVaPODrCH04lqd+vvbs6CJKGy0hxyRUeF5n7K9X+zrJ29M +WrFMxLWaPMIwISWJistQwUEX41K3eyw5NqZDmwavxB8oPbMVT4scMFfnUv6rVRd6K3KU6Qf+KLFv +70rOx8dmQGEUgXdhjtpZcv9Hgvgj8JhjULLLBH9HX+fufC1SRNPsGAlfYKtvIlb6KHltumT6Fh0Q +wJW444eC7wIGxLBKmYOvUn9bD03EXurFQrG01dKYfdMKyfnp5Ug5znQi1zGQRzfXhhDSpKYumv+v +WsnaETI+8diA2ONQxUwODrN/60kQvfapTYclcHcM4Aef29p0ot+B1Q+aHD8QEQtoqV5ORiWqC0kW +Vi3OVtlH+IWClZwMbr3sCXIyoSdkJnOoaEjCKupOcjQa1QtCiB+nY9yqKj5A5luozbAppgKFzHoT +DAiQIsUbMCC0fxJok+xeFzTIej/anJCZrPzGUTnontAy/dN/nOqEhICx/oBvAw57sWsxCX/HKHe7 +pWWkvH+jszhk0ce1fMnaw6w3+CKb0JyQ4Wjz22V5dCaOwpx9MTYDo8FQPTkJyg4XAfmbq3Ach8rL +rykKX2tbmM1AUskNlxGURkUloLCZ5NxOCyrcQjJXNPtm1wA+oOeWOYbG9hnONs8mTfKvUilDuMwz +XRdupbR5jJVsXcKlVSBO52Q6G96dHmnkY2GlvVXnPZP+DMlixy/kaaLRvxAqvUJYTDHqUG7AKCGI ++h7mGNKppeYEy8O91g+w3DztsYxM9lKOK0EP41mBS03fKmhK14VETLbmyKk22N5YhBO14rZrSlL5 +vPc/F+Upnn+ulkYH/ld8vo8JYMANlLLHUtRP7CGwAv3seadxWiaVuJhQf654vHXc4Ys8c9hA7dJD +rNxqVLcAOOcERbqmTNiCzmcvrXGxf5hFj1hFejWP0imFx1Cp9fGCU7xofsKvjV+tq9+Nu3zJA/2l +0qfDQnqlGIQtfyWbz/tgliI2Yvz9R7bzOQzinwmLGbuELNBPx6oCr8QPKismq0BQ2lk2sNpRttIJ +NovLSVzAcHRVSzjgTzP63MtfaHtMcphCj5OZNYWmyc7atEXzs04Lf4OEYeRRb4v9qfs0x+fm+jMU +MgeycnJsU3/7wL1+OOVIbULG6rtTyGszOx30sf/3So0/6uhCZM/rH6eIRZJuxDasPe32cMZe+7/p +Dv9OdIDURq9re35DUP1EmsMbZLBWq/3BGldCKlMk/xweGraf32e2oLRPlOZE3BWwm0DekISmKSaA +BfaFVjV6+KSZMSX1LyN/tff5F8cYnKwGP09b8QYa/GI8ODaywDre5ikTBrgYRapZMHpgv3yIU3Vr +kpQ2KgzcjM6P/BknxgNY/DCVDlBvCzhYxVMInvAe1gmq69eDZbSm6JsiDmK17+YMHKxMn0vXfJWc +gnRIUCu9d5SVIUhPt2APXSjyHYJKtiPH1qvbnad+8Mhez1W/37x4rlM1TrG1g0Owe0Ht2hsu6m6v +k5G+f2QdYMwXJK/PHRJ5QoUk/fyJgj5f8qJATQ/16uJwuGsHfdj8G+GYeo1oY3if4boUOUmzrxJO +i5JwJ+/JT1G5Ig601iivyUKesOgbdaMxOvXCCatscSUkxLoo9tKFFc778zzQh3mCnkp1PiWrZmWi +TzwgyHoN9OcUiZMaKAbfs4rj8Jp2/p5Jdv6nfrWB0qODvnYbFaAg7UhoKAPRIKfU+tr/w3ubpIqb ++rnt4MEZscaGMOyT55nsClQOqhGsFb/Q4UJcgNDqfMlisnR1JXCtQTFnmNMPAGOJkPx6l6ieE6hE +c7UEAKrRdcxD7Ej6OEwokFhwx+il6yxTaRapNHx8/pV1rOtpzcQjPM+KUQZcFBvO2NEXFfXxwiA3 +Skwara+aFN4j4h9Tc4hBCbvQzoDEC1i2Iq2Dk2+uSuWEItp+prQ+zjyDW6jDqw1NMzk8Moh/0B4U ++hGWr7R50meHTl/yetHqWDC308eoHKIcArEES4wI1+6kWS8h10/+TbChjaLMbGkxp3xPgGq6ybi1 +GYVcAZuJsYPyJKNnK9oktv7RyEsYgl3AFGE9Ip3j90kJXDb/uv/tdXX4EMwzVgaFoGsoEpVxO63X +jAwzJyb1X+9Pp52gG/dDwJiLD98rx+B+wJr/spvc7TtgNpI2jKP1WxwPEh9CH7UEe91+gxNHSR3L +tC9qM1SH8CRr14fR/JfvIgz8jTfjGdoRP4eeqLRtAGqm3B2sgIg5/2Csm9e2gL0jtacse1NAgYi7 +vMDxZWo1LBkc77utxiE111M0KWVxyUthGMUBB7T5hugciyx9a60dRTTtncJ5DSvIwHu/CX5KFZov +6wDbSy2NSEyz7OTn1yWNFAjjshsKIRodtLMV9bxw4Owl/4hveYt/WMuyEgYfThmr0k4v+JJ4Wd4/ +RTfP/zSQY00ivvK4IPAuqbQ09AZLfysTb379LolILDuwlD7326OUPRCWZpV6u77zcEYre/4njzLs +cwOmW4qwlJEJREiQiQs0d6PDohZdq+fbawkhznmYBQuEOfotJHEOmTbZyRqOvH30eLRaAELqAG89 +oCuMsDYqIXqvrA3UcU3BxaCBX3KGRAG6XvnIMl1sL9LtfZf/HA0A9r6/KvbgyBg4qPKwYLGdPfrm +zdsn4YcnTNQu6UAxel2olzUIWgMGOla9SJ3Wy+zFYwWeIJXd3XzKIJUw0kmruNn5nx/+vsMbH2AM +0iEGvih5IZ2JfrfvLprkfmhF0OTAhK+1ogzB916h6a+VjgYmJbqVQL8gmHJwcQMiYnhNdDffIkHL +s7bdDxhyjyVFBJXqoxQsyqcP67q271KcgPMLuLF4s/Ebo0C1+/UTobMIWxUuAYx/hWacSwIPr3Hs +e0hcuIUClwcimGTF/mlglOuXAgqfiw9XG4ZMKtfBtY+GNw3V/xUHZHcmpZG549fa2h2X8U8Nlca1 +bDUR5ahmmvK6eQyqgS0FVT3Qhn/k1p8lnK2yC1UNfVGS1bx527BOSdUtcsphVhUYZmd3lp0eMmZ5 +PV8lXpXFCdUf99cqgnWeRcyR30zy+gtHyp5+NfroOGONz6NcgqC+NMeKyPRmtH9MAeg+GQ7oLZNn +cfcfuf33dT0wCbtbiAZN3g07z1VzGShGYK5nxxTy97wp7Liaksnobrv6n6q2K4R6oBHPz/xl0M7n ++5LEiZmpswiknDvuNxq69J/rwiKb2v3ay/2SrhEGcCbdJ+guNVJ7E8jpemAAqe9Jgu6ErK6BZ6pD +pTsfwdhXsw6fPemq2j8n2viaGMNwxV/dE69iqrLGu1+l6GxTx9HQEUBPII50hLPr5EhMH+OPwHfq +5l5CS2B12iz4Bj/dO/8/TIFMdX1McMjl7d25ssXPvVH6np0EJXcR+tuxI1w6Gz9jsxCZ3KkouRx7 +5/dcgZgEkSKUHhy14e6ImFmbLiejllfIYfaHZYdS0LHtCUoOrB1bGY77KFW0lE+1MixggLneKNVg +DkeTYgOVRa75gHGJiP/fpXLoQ6HQOW1BoqktN0TGxj1iWZ5CwEuCWiLpUbhjlOS50rQsipVqj0ZU +PhFNfLDFVzY1e0hZjEv7Z8vZVZZmtypzsKAAHS+pyUYFBZm/cbl66NwnbPGYTmp9zFy2ethL14BE +8Xg/W/0MKBZ7zNratIltQFlb+mfaozD9HKELiLlMJw6YJCj5P/oeja9Q+M+GgxieabYpXOyETW7a +sYArbytb7DGAlZBcR1rc53QJQce/BfGSDsp8LYSWoQ0TXB7A+e6nkEyFwNp6cmiUa3zhXpiirD7G +rW/vyYUNNoNYRIoAXHZteMWuQp3WnArXkrpuZ4cRqHyrjo9r3EJYW/NX7OCi9FocbCcJScVw3HP+ +CCbZFxYWcpAZ5/znULma+ne1sVe2ZdWDnPGtINY2P9no92PREb3KA7KeuZketLGEBd2b2msZIIxs +4AAG37NF42tTVAVwFx4+VVoZje0JjovZUkPPkr7k7E8dDeT/fJipRL+RQHZa23lvn/VjrXOdJWUF +gsv5nmmL5c99LguoDxc5wXDhXbg8hWI68+5Ts8mmJAu4bsqkPPLc00hCr8O0NQNd7GjjstzHB2CO +PpZevtXG4z9i1xw4oqmtKbVlcObtuzdhEDdT1nGUYmbgu8sILyANh4Vad7OyS1c6kXjpOkl7Q10f +YzbahIdSXvAlDRq0lZMw8pkEeoKKce7zOLl3WDgeiQOXtGzKG8LefpUdtHffk7dut28JT98rm0a3 +C0j+Hj8WX2vRC0DBc99qz6i4WEFzJKdufnS0sn1mRDPkdqmd0AbKkzdXRfE/7rBTm2JXZRN7Y2TO +nGqEVX9htyakzz14az/tCNSROM7V31HQIYXBnOLx4uI2klBRdgnINVbdAum9/gG6bq+fYhuVBruX +71/WA2GncOAT923MCsIbjTUZ52VZnog+Pop64VBnq9xGr8AKhFDLD5XrMu/FGG4ZPQbBlYP+4I20 +JEl+aK7mHSaPC+UOOe7BzQ2NZyAdi+fuikC/9E3SA8FyOBLAkFr8YFo0a0lw9UmLy86FFbzoTTwI +8o62SoFiV/Rp5PERk8A/g5vxoD8hiQH23ikwzjiiuhPW61VUlPX9+dXXf3kK2Foa60/JFw6VKsRO +UWriugeJ8SrNbkdRTNMfekUoBSkhcooghxTo/UMl96MrNa0swC9UqqMmuUT6V3JK8AKBoWDweB8D +tHxrrwQqvt5vH/O3ndDSEEzkjlXZdrBkUNe3/pGsBplBX5/IBSEoeewA9XbTvZOnSoSdccFj94ob +8+XKgEgYg86TwIC2OsLFUEl3NY/iR2WzhygpWwavGzF2sQqGIDPR3w8jMRx/iQcKuUxdT//cONqX +Lp/rVZjAo3fgY1MZvrUuAJYbIUU45Fv/45ZvsXYGFs0jTA1FHudoZ8QOqWKrJrMp0Tb3BxVQriqt +t82qV8XeRQtNWxs/tJr2KVj/uXO4v+UTqlM55nKJFT1ubYvm0ceL4Z2oESn2RkiIzxgjTva+QO2R +GPcRo0erqZmoSx4A5vZFBLVoJa/i7DS76L48fSVbR+HMAuiF1s1zuG9iwjw//79ChHh2Y2cbMoix +fALbzn+wqpao+cLxJek1N6uWJ+R8Zsm1bRbUx6K+X1SUDY5FaO2PJxfyY4bYogFl9wqEI7SFU2Xp +jvPafpIWquDFWJNuNxYIMJ0zlrGfxe24GxUtu9A+psOI858EJsNznm0eDgjt+4uQZe/5kvz9zQLj +Xg9EnD30EY+p5/GDmDUroMhtx5rzUvZAPTFBLz/wXv2w8LGXTy+GIxDW7bbYwpPtfwIUjxc3pFtk +nv8F2LObvu0fgUhPSRYNJTUIlgrDxad9IKYlv82e82ZIQK4oApJRMBzxGbB9Z1SMwpaWHk+E0WXd +9uX880fhNNfWd7MT1ubNJOLZaIRiXzOxOA4lZAIjSEAbrOlrQ/vvktZ6l/5q/xxokb7w+SSLhneI +PiiqmDx8tQSvS9YPz4xJJCrhzyViyir6jGfrqj/HKrlGqDeKJe524GVa6dcn9iwpXSKoECu7Fxfh +raMi3T1uAjlhpW92WrlLoNVZBXL25tWZkiif1MJZxDM1X//xsibXmY1wCWDg8QNRkmcVEmcx2fif +KG7tqnQ/1mPGimm5a2cbvkU40xOs5JnEosJfJhtudi45vmnf4TplQurEF9AFpuYMzFaraYylLQe3 +10Q3JTTedZKGo8t0jdyBVBkZt9NL+RIJcJ0kjQC1QKnFC+mUNatSQbf17GLu28FXOPIG1u6HXbmj +R9lsMqZ0+pwH0hiW+vyrt5rAmqFLhVxOYdPmboUoOxoF8OMzjI6sIY8vUetx2Sa6KGMAM5anKq7q +9UI2QHj0rWI6V3sHa+UIQOjiqwNUnfR3hGzNnUtpuavBd+6EBYmODWEgGJM7tw58Ve5UelkS3ePQ +mqpz1PNDdNeN+num6G5F1zl6aOfSwRKTKB3yyNOjtrONaR8BKPRXZh0tcOsxpMJqDNfS3EGkoZ7L +u619QfhAo4E1bpWFl6mDt7nnr8GVb/Cjrz8qVp+6TKsAa0uojaA9u0e6rZcWXj7Oint6J5WK+BaC +mF6ox+X/65ucYlPJ1CwSeOyvwYyqV05jLhEifuaWXlyLW1vP2qBRG1q6mJv2XsuBJ66QLyagv2zA +sYFcJCA/Kmx52tpd6Y/UoAUXUo8XRVqgYBNsd0bL29mpiKDWuW9zeuYzswQjDMig7m5FTSeYQRqn +kqih1Ntzq/HkhqNMxJY43GU3DmsZnRUMv8qkt+wDLl1VhYJT8W/LFkSJ5zs4hpqV1lG8y+HwuSFi +DTyBZVs484D+CLOpPEZ2v2eUy17h11c5PouQSrwyEz/WeB0yeatvqYKcU0pW/jEx+d2WTKSnJbXC +53RCELV3MjdAmuBRoFfVHdHBXCjmBQbct2Bc8I6ptqVbRnqz5oi4sDL6TlFcLtRyYPwrskCRisRS +g+YvGUp9UO9O3I1bMSTmTkLrxQxQ8bStNpr8jvcm8vqBgvQ4VYl9on9I3cR1LNZL14llSvxMKCJw +vipg2VF0vnDuMsKCiH0t7Ky89GwMySdWroRYDBm0hlqLKkbm8mcPl9vg9uv+bWIOUovf9xdm6Tg+ +aX9SBZqDlEGQxx7c5CnYxWJThcNOYXSrUOLTRElykpviT6pezxF6YrORMIqzUfmiS8izAMvZNtWN +m5XtpcHqdQ5NAppRjkD4qLB2Q14qxS2eQKTGl9FjPNuEQm21uTUn1TGTb23BJ8IERL7XH5qA00PQ +bqDs1NPiUmHWxgZ0bcq2Aeq3e+D0raluKynPpc5Tb9pY9ecmBlCarOv10WuPclyVNx+eYskC1ig3 +dIcEFVSoEHdZFO00gHdKywCs9//RvHDieQ2iuwKaNRMnJDeDZax5enbt+o35n6G/q9ATdryF3PcC +TRlE6xt2XXuidSjvw9NRGPclCgQ5AzzlEQPQ6TyYVVYbHnvBC2ARESPM7R0TVYmrV5FUnPH4UWTy +A3PHuvD6Z0PnQlmW+S8O15raykPryP6pzdDssUqD7iUY5T6QtLHOL9nHaK52/3GSZJeMntUQ8clo +JSk9mBL9xL+IACMKoxRa8I9bNUmKKK2d3aQo1qJHfadPYn8SODBjKtFL91enQK+GAXi3oBPZtyTM +F7G1khbkA5iNFQWEnmepnEkneAscj0opOsEwf1RFsG0aXmMcgHi0F5ky+C0JabZQfJ4vJKcOYhcX +1V8TMP0oebcWzkwCv/sIHWnwO7RD4KucyGcVYbW+CG3yvTZJpsXUjwYhcRb5HkA4wHDqaXvMnzMK +A7ayOSTCdWYZws/4H6+vyBTr4HCQSAzM+tXsbzw9/A/oCGdXa6haG7spWN1oDhprL4dogHzDsEaC +SwpQ3uoVyeMLmhlxYtbc7NrZuCMc4N3qCJlqEPnXfxBdA6SS2k1Bxg5c39PW20DXHZx2LqNO2hjn +gt/wN1543cJefTCq59gzSIFT6bXy+4cfrKJWTGydeiGfWzfp2IxSRK3HXVAw331aJhpnkjLVqqkv +tcNOx6N99d/kq7QfJBoP1GaFrKZMLLLwvoyWOqHdH61o8ssUhJ1e4f5FSk9PRX/u56iFBSherlUf +/dWl/s3S1bJeLadtziR5hjXyHnfZ6XLlvbN7eQFW7ss3PI3MmLccdz8Q9msSk70yd7FjqixMyj8G +A1wRkpJ52yApnivSFYB5SRV9F15RbLec56NxVFtS9TTqMNVLDc3mXx2S5BkvwBmhxboSA64clv2Y +t+nbSzm5NQK6iZtS4Upp3ru7qju7c4oxqeBA5S06A0m6MI0sTPG6az8CyzID1LA0w7TmvgLzMhvB +Yiqo+2mf8TheG6Z/R2ZPGa86QGuyf0ZzruqzSqetq0FuXl8potL4nBpPqA7tJoAQ7pWg1ZZQBxAU +lwu4MPsgzIPZNPS7RWnrToGm6gEb224RYdHg5M1LOb9t3FzJDvE+pJPT7zGNzXatzpaeiXenaHB4 +y6Hgv7Mrq6ixBFllRrOWpy39xJB4QbXpIN4l107G6+whzkh3m9dTsKWNrCRyQa21NlzkEDebQpPo +fmO6CBrxDR7EKUedwb4CwCPclMKNThZJztX4b5tYS5XnicbQBKggGd0e8nOQUDr0LXVajVRkQwKc +OaJMgR5ThamdZ3o/lcfSBCzXhAYEbXxBCtUTxlCcLfqxUVOq93mJgn1Xa2zig57dFn4e7nl7h5FJ +6QAK5oMz8XsiWd2fwPWdruZrqDfvpP41S+kaHZGolzKDQk1aENmTd2MAfqJCZVbtcHN4X9qAMSHC +3rYZDnBRfAxOnLC76aD+mzjEDPX6EQJnMu9wZSSEKMj2Sb0cCBuNpa9fOMVgjKZ9wi2ooNeOCxjn +VLX5HRx16Ge4u9TsWjrhKm0T5ie4hQkxdJhwMfu46LB0QGhsUsqzS7Ze9RY1OrJCRGmj+ZR1Rph1 +O/3JFvc0O7KJlRc851wsXWdc01JYa7Wu4dXxvjrqYZQlXDoTZVX4EsqxguBaCa8fsitm4witRF+j +yGgjExIbhfR7Wkveh+6dqGVdQu0q9ZP4/3eKXu6YGdNzJOQDvyozdGQlDD+tn3W7uEJiSWQdLCdX +3JgydlHpNdiEAlNqiCEdsbKd3n66YocOV5/d5kXZ+dJcKsNl9HWEXUV2N4Fltmy2QkMtKpPA2UTp +ogouZFnWpbkRVay4qitoZIYtTOaiETc6kXdli5vdbmMDC6vwOpi8PEmfL4pQfFKH6qBcjSfPncAo +cKhkb7KIByoVozVdy1QE3MwMN/KnW1gk4VUnN5IE6IG74zBrRbwMtusaM2MGRqwFs29+maqtGx4m +Jf7o/4HfuV6/BIk+u2V0hcFrTERkSrcqww7OP+Xxo77XxEUfYbNPlgVOzV7ttW/zfV+3WBTC/Ib6 +417sMTMWYlvbvp3715YesM4DTPlOAQ7EhsBtXk0e1owad61ZH2NPDmZm7gScQst+jjs29n1D2Jrm +2iGGK23a+QhsbL9qpVhwclEvc2RM1tPWscGBbG+ymSzJ54j8WArzOAbnGpYT5KZwZ1xP7BhzvwdY +vlZTrGpecjg2exmJyy24TlaGqywEd1AI+23GcPss6tucCfmPo0ir1hBxQZDNCihu2NhgtNhVlnED +QdOY/9jXmDrNMrLyXOfsGpc8PpbIm/IX3kym0qkbqzvPkxZVcK3mn0X1AjrdfvJAFPnjpC0oxV3k +KaM3CiM/ggT3VKO0vRtxlBmT/fZ0B9OrxEPsLDw0qDZliP/GiFzbwTau74Ec5eDzKAOIPu3iCVGu +uvcorMtyyZ/WnZ31TzuptGzbFVdeEn3HUqu08Zvl6luqmkPvOwSmIGUkyleMKyq/XCbJjsHGmwQC +jJAXwnnWIBLq4CQKWO24AQ7XcsgyKsOlS8FPuCr6AMjeXBOqmFY3iDrV9HrFs0r7HJQ4+NgSDijj +HEE02dkjkP487wQDLqnYh1Tt5x2fYS9TBKnSRwp7dX03BdmvonMujMShKap0RgbigGyhdX4aGt3l +RYMaClcU+3hLZo6/g5q91v+Ir/0Z3Y43q9cGs0Z8kGb7vzLVB50fylWc4OAx66BVRNGWE64wElFj +uO9jDQsq8QULuuKYNvmcaD/nS8xTuTqjJ89gPH/oLXZTX0/vAnYh8GtPY4RRkTXRKOA2Q1uGXuLc +8krCF0+LhZzSesvNmSh3QYPNAYoEOnmfRweP777Jp6G3TCKUbsmFwQnTi2aoty8XQJqf/xn/QKyy +P+dfcITNXTmeI9Inzh6mp7MG5LzEQtRa0SQCPhRtJ+d//R0sdQFKztNHdi5RNXy/fKHOrpsfQxzn +Ut9go3KyijjWs520Z1xS0xQsdDKzNivMz3/4K5XrG7j8c950MvY+Bh82sTif2ogzCWf8EhqjJpVz +lq5jeCqwt4EK0FqbnWL5cGhbINCMdI773E2joe/qD8stUyiZ2FrMypr6SfhpQX62A5XubkSCwscr +iyzHK9TxNirru9VBLnctLOPc6ZwdWSN/zlheLTSIoYpjp+GxOcuBpl91BWI9gCsb+YdLZniKbsjA +97gPyq4tqah0P9S2f9pgIuMj7yKzVkoxF1dBEKZUZqFA4gaWc1WTOI2IZCCx+TkESVweqQiN3gzC +josyWo5QAN0F+HEsr7tYRM5ou9AcNlSOzDPgkOaDraIVHaaWh+mijsHUuOBv27JoQwXo23/TlJ9g +xzVPNNjv4/364QRcZnxuJztSlmHfeMnPItlWXkMDJNrH0ecC1GPjglmbiK3sHmwnmPFc628U9N6r +XcFfhEYKFnI3kli7hWCQgktpbCdiGYpdsAeR4fJMuIm+qAv1ZzuSqo3nCt0KOhJvsu2Og5SCEiGu +RmaAguRkHC1/LZXwiivgUQtvfpV3Q19oeSICl6XUudSYv+9FZfu4prg8pHqCvEN+TWD3IPzx9J9N +ofZdvuWKCi3FFOzZFc5hbz+T8zY2d7NuXDLaOzb7lkCc7nvFjMd1uSeA+LgSJIb1x0+1D4k0PQGQ +eAt/QKW0F5/wcBqjcY1nzw3Nk3RBHaIJJsVLQbkkuWh39QOJYtLUGvvvwzk/i5+2TPabYT58Vpmp +QtOb8BRNyBiJkHsgB0vKKvQ1MCsEf1mfsbmtaGsR+rvWkouGOOf/LAqob3DoOsqmHdWQU9VU/iTU +9DiUWXtRe22aRguPDT9m0CgZOrGB3Ay60dF5sdikhZxWwchmV6Lvgws77jaLWIYTb8/CNQdqWOfH +ES2BoZ4vQ93wCa/SpnLeMrgpftDCvUF0vSLr8sHw5HQqclc5QPooInYjdWUk/uZc5NOwDyX/hSSV +OF1NplHBr1PAfP8pMrJ2QLc7KfYOPS2GWfS3Y+XSn8On9JmSKJEJvI5HkRIrYJYZLEiZorJ37hBY +YhUhR38Wl2QQC04Jjfdil8F0RBwQ/0hNx6swo1PVW1D02KPwPJV4wGbLyKsy2TD+l8QTK3GWwYMp +QfnbCuTeuMQ57yUi7MacaAUxnar37XvXndM+Cqqf9BGmUuv3BR/Dn0r/YDy21luRlItspYjxEQHU +b4vgnIvmjyG0OGQwQqVwPx8NLc4HNGgmClZK7CCpW5g2OoiiEPDSv/aautEABaixkW4OFyysPPIs +HzxgjsdihMgAG6r8/UphM7o+l5XiCdFxKJ+u11pa92cD/KRnugU+MK8wMGqPs0xxN6mbZdQeJYQ+ +1Eb5R78aIrXO4+kNBglDSqDwCNwRoXQFhfGIJZJTQ8Wmx930vq/7SLTJPVw6iiTRKj2nPC1vRKBv +nNQ2Efq29KLEKs0D4zrbHv/BaCMWqKRP46OMdfOzXpxAoAruaMLeQpI+JNaXd7/4gC5JPVz6Wsnn +2akLYhm6luom9ol5vV9Qr7e+OAyzaBEu+jjQjn7Usi9JGBqnspki10s6D9v8U0VT9Ty2EgyNq8NK +FmMSI8px9+KJNUORrE8ogtcQoSmYP+IR2aNe9tuKAS/mio05CMrNvFCSaMLHlKPMkjWz7NlDzqz8 +ZyR8Pei7IsJVXUsxjPBx5cyfEN0/eZt0zCtnehvA1LND502hF6W/9pkbTG+vvAtCAgSxhq/Bcbyh +F8L/YCWLzZaA3UH3wh9IJ6hEptC5pXRUOYLrQh9tDQ+LAVHykQ34rSdiMBEafDSXCIvkbFkFeko7 +3grZNGVZCQFtb1S5ujhqOKs4yUF7QooPFX0R9NzyMbE3e/AT6QEELCZzlokcE3AD72Qh8TIvd6RW +3RdwTOYZPT4ZvHvie7EQ90sD8ehFW8jy2Kqvklm9oItf5GXPBerCbfw4nravEKjOOS6LTGOUzJbi +5h73RjMA1+xh37AyaS2wfiiH5jCt6OP4Vpv0fSE52/0vczN+/7hcLiCB5D9f0IWCzAo1T3AUFOs4 +ssLOoeQUFVDCxQpyTZ04WuyejfWcSPgaTebtU4sGDQkCBpoykm0Izphnh9VON3srYhn56QALtH43 +ri+JQntibqsQ4VJmdlEVtqQO2uZqZs9rgV6k1EhAIquqUnCNHscqgrpqrmVIC6FUz4d8Pmf4YUpR +FQRSamm0uokYlVlfSh3dYya2woHKUUstgDwzniB6k4n8cI66xnX6CdUcpD4SE8nOP3MnuszaE3i9 +4RAc3sHY2wEZd53RVFNsO2Sc/Rx7+ye6dnZFoNd9nW57TvCub1zWuijtuQHZkJEOuE8Uv+W37Nlm +/wH9rwqyLeznxtCybDUju1PqrDYRpmiuTFOnnU+gOPRiws7rqwPrKnuHcHDMQCnteSwZpRmW1Nfa +aMNINLAK7CHae1fV5MQkHGoE3Ao93OzN5URAlRzXk2SyA77pXxwVRpYMZx2qHc+dT5cMPqocsHzh +XE4xm05KnnSJPuk+703UydnXAAxh8pw77pHxWhxgAtik5qS2xXGIlAYgWRgP9O6c+5lG7CMa4kWn +cgduimaX61GqTUghefKpLZImWef1tzwlzWWTEN5wvhcPP42ILHS3+xEIlMmJansI/N1xups+ZdGc +bV6A04jeOOuMl9OYfQ57dO7Q++FcWJjsNQHJEOmiJHSOvCGE1tS9DAW/EzAXMzuRTQJhrdmQ4s1a +zwFJGz62s4LoV/8zqlSJF80JQSxfEMReKEJTXFlAGwp44fwkHaSpyhfCJvp/RAPg6HdT9tF916rd +JMglSQWR8hfiYZJe/AQIeLXVe1iN35TtCLWq68co4MrFyZUtMIiO8C61IcWgSPLO9G0tkbn8cMGi +E0pKDQbmYZN6IxyGjzrc7aEYzylQzkjGEObNlmx5AlZXP0XL3EbwE2O36ygbKjhsreyn4EYlZdek +e5dGR6GP7IPT0BUtDaVxjdnsimH3f3v/4p4nrnNOM7ixbv0XcD5JT1Thqd5M4Z6DPyrbX6gA7q8g +qvGQKPzczs8Qfigti4zWiexWgFL/S3jnsaq9TkcGytKocgEDJxOX3vsRKfOGskN/5F1jIx0CvKzE +chyDA4VMexrXqkJ2GTweTqgjkj6fCHQmGDJC6mMFw+ZiC05OQUMc2JfLxDNYEiNAQBabLFIgQDlD +SVmLAsppKAcall4umN44mUv3dmpdhYnaGJ4HRwMn3qlNiOjyu2CKJ1nfvDv6I6I5rD3xn0lbicFb +PHMWwLDjsR27+XotkNb38bUuIqbYsOhAlfiWxSOp9HqknAb13KZNT7Iog4p4cpW23qwgJuHFHNeE +NWw9jz3UeKrlbUnMpZUHyXNh24dZsmKKJVZMmsEjTkjIKVeGbZnwWq+CN/fQM8xaWyDbrSjT4htY +x3yW9obm3CMDMphY32U/u+SF0Dfiti5MiaQiwt7OAnzQTcH3E1jmenLBNgPGyVH8y0qVPs+06k2V +HBPD70e+KNDGagJVLf0KF1NQPd3Q7vKuCikerjLGVGzzxlxJiGnCswVQiGpg1k4ey1hEZDX8lHco +nbExdxRzHNjEUfJR4ZTeB0as+qAQONh6heMP1HsuQ2O1ggeKVbevP5hBiZeXgkZy/E41oEFFqaLO +1jKAU03JMYY7/KTMOFYx113oZJ8IA4VdUzlCKuUBKiq0R9t6RLSUsh5JwM6LCpuFawAGFoLWUC3n +BkUyWRY3NrOwt5JlmOf51E3NNLi6QpXh2v1fY3I0XfCz4Jauf+jNyxzr2dTuWbvXjmfaiRaGTnW1 +GrYYw3g9a+H3qa9dqece7t4IRIArzcMrNsXtmvc4n0qohdpBL48fntks8zZvKNLMheGsldKFjR3l +VvvVRNDyxa/7nZGi4QIOx1h9LXyHmyt+9vtWuEfpHk2z7/xMzaAr952+5f5fcfnu2gFcG08RmD/f +cJm2XtEYo1AV8x7huTD8D/I+fwj28GwjGuVBqL/sL5pSlddt7bN0YfA4jz5y6cVmtQO8ZADpOku0 +chmVoSPvAXl8g1xlyK6ZeaWKc0oePQMh9BItEw0NXOuml2E0X0I+U1DD93UDUiaTAk/ySGthjsFh ++wQDV7UVLSuKeyzeHsU8w1l3y3n5kRnnO9sZ2lO7vBS7tKCgn7aZL099DsZdzNgy8vOmw8C44gyK +NKDsQZ5JMYT7Wo73F+4IWQrIYRShr5GkZeYBH+qUO+DsY564+QWx8iN+MvS/Vz89/WkEmSacwUtZ +jBop7bcL2ytc6kLgYwhN9menr2ctyeeGdAp/dgfs+P+m5U67HthhLIVVI49ozwhowTLkjfMpkONP +UACL1r/tHg50Gj8BFk82VIuSR0OliBl2aQeKHMxF0mjV0jO+8hG8UnCRVkWgwn6shWPgOU6uOG09 +E22NEKPxbHkfAs+QlAqXooUp5J2rI1AeYvQOZjs91P1PSTLD70oGvHqTznl+XCginav34na9ADIm +A9Qk+GMVUCpi1p0QrzXXMydBNE2nXKvSxwghXqEMCqpS7diiiMkc7JaIeztBdG/dlH6y/RYyS1ZD +Fpkv3sOfv7kr+eSC9oLe5VVUjq7m9Eg8Rte8l9+0eiYOBZKdiwnRFzbrk9myADkOpJlAe/vj7Zwd +gt/121Ma90IxBlTF2iuiT7c2T7CcJLbicElImfWAf3WM4NMCeh7mxCNHTcX5gsEi8CQOWtFojirm +9g34cPWQYJOq5YBKxBxwJca6QWexjjkw/UyF+ajnQBrT7iCpz/vRRXnQZn4KGibFoH5YKqv0sYZ1 +1UWwJEtAm8g38nqrZkokz8qUZEF7daYL339bvz6NCOk6ENNHenuD7dLHyOsW9XuHpcu2/+J2l2Jj +iiyq0w5551MvsSl7YYQCcM+ReeETBgLeAN4D/NCV92doarnmOLyr0grSvpSV534toNXk7AovVcnf +QInCjz8IJOmCfyq5svsZMG6vWsWH/8dGVH+nHNmLEIbKODlNMukV1x3OLaicwgDP7uNRHGaWVnWi +9Oynj68SqNiUX7/OaLeVshJFvZn9e4b3auptstJIJIhQ3uTov/PVOZ6q5F2CJpD8tnxb5jV3X5o7 +deJ9xev3NVUs4EUMFoH4pKdgzPqK3R/bM9obPZFiypDLSPdkxeQUG0v6DJDrpHdKhrIXSJyXVGRn +yNxU+F6wds1tpeT/XFSsH3zk2ckBDx+T9Xg+jQEF1PJp1r2+C6MqqSSGZTFXte1HGHBQY5PctY3u +A8Q0wuTxVNKP9M7Q4QLFbDEdCpHfIYGUOdO3gbkRnEDEUDtDot6ktxzIRvJgDQq6ejtIGnZDV07t +Bgk9HHt3z1jKP5z/6Ds/XSBl0ONRoVUfiVbqXd9C/6AtSnASUFLO3uDN6QJzSIQdL2fTri5lBrfP +pdqW4If/ngWBFmccpWQLMB/ThS4ncMYwWvUXXEfbZnkXz5Vd6TXY2Da20pLl8WlfAU2zEfRcp7Gf +iJ1qSGtfhCcY9WZRgO/tgtjIXqhfgKVuDCJKYFK9FAXP1cMrLMsecRoxo6kugDGPpzE/hBeDbbTW +vDNYMpkd0/amzjl5GtVG/stDdDzlxrf3WllTnPk2FpnwYT32lyyIx5+7FVys8GV+YZVn3MGqJAf1 +8oI0cHx3JoGqDIt2/GGzL8bKcd7U4WAhBhdTGkcRwiGND/dLZb0yscfsdaqzco2W1CcE18nOqWMb +H9V/45/GtAFbLYoXLxvGad/at1CKS5OPwsRYs8D8YFeOdhUhbgXuLj0va1dLaNPW6t43Do+v4JiA +vf5I3GpFVX4hD/aGIk+8mbJaSNi6YgO3s8OXmch2ieFmWaWDI74IpoUySqB05cFDLQF0WYlCLo+z +pMjQn9DvxuaUcQZEBM7pnYgPq0B2YvjTIbh1q8eXfmkkHI228pVoYXW3e3WOYvr3PanBzY+9CL0o +A7t7KbLWHGqWsh7eUr9ARGnPy0H+K1PQ9cjXm4JE5Qvlbete147GlGtyC3tTpRU+V9NrYngZGhMw +xrRjuLfKOspUj80cBqiTJKncPlEWclEcxv6fXQS40mBka2jnxZHMkH9e4tdF4+CHjwrZU7J4WsH5 +ZSvOMkbEtZCziSLsVSvN/5OdgzPI5M+dcWzq3Jtbe5aDOw+n33netd9mfj4roCfzSxtnoIOmrr+X +d4mPTbBntmygJRn/LGtR/cOt8XygKrCiXbg5ST+zM67j6FA5LfKSgr6Nx0WPgKhYcfhrPzkJEgTN +v2c9EYbqpRirB1VBQ3j1yO0UobTRVErSTmRGyOU2ZCfSqx/620wfiJVFc0azzryxXTvPhRmmFN5o +lirskMjB7kSbl/wnDyvkwGiBURriJ4TxFx/VRT0tlXNiI20caRaJprclOFbM6J2jQKBHw/ltrQ/7 +Gk2lyf3QR6w6yrmay2B/ebqzRbAyhm4CC7MGHMWxsQifxIenlysBXxNo1SdMEDeVNM3RxP9/w5AR +C6R5+AaCl2t9zgOu4ZgQmspqeCxMrqJGcNOu5vbTI7DlMgyjy8HrxmlaI8+FFrkKIkCVn3sWHic3 +iOzY+0bq7gZDVtTfPsC5QnpJ+8MBT2PKXmluWEOabyfiwT6MdMu24ZPnkMODRIYCUzVRdkWy+MZJ +nPr74LLPOkYNf6csicgzEHxnVe204WOS5g+A9OHEiqmu3O51faiBkwfiXZbFipfOsFNA79fYe8Za +wNIzPhdfDyp8O7fnnZaNpWzzfVFl6Jz6OfsP0okckn90/De0ya5fzCxbKbFVcFQPZmSOAiMv3pjj +a4I85APOXCGuMXgAVh1Kz92urEEkDFzO7+M4ya/zRzx7/4lchPmJ+uFlRyp5MLMQKJWeBNMQiFFA ++1n3jDzD1Ae9V0UuROnWad5I0VvU3cPhZQ0boPGiPXLSH6y9OtGp+Hro1YQGqOw/orJCFHGIawzW +tYBVgewwM2da4wXG3cBCFkMuaRaWJSXplfBVIML0RfJqSPHVcr9Itr6j7BwtQWJTXycfOCxGCRjA +5gl31DlWBvY/A9eN+QpcV5uCuI+AlRYuKMSM2yPe9FgSwF59aE6iEvjqYih2EVwecJxJ2CB/Bu+d +g25vV0xVt4S+V//LaR8tGQNHfLKu38HDkIqR8zQeBNDcqHtghuH8ryO6ZuTbetsAfLdtRv064UrH +jeVQzNBiZUn3/IoznRkFX/j7N+0KD3bQZ9ATdcuRBViKgSct96JWIQvEGWoBC++0shObok+xAY+y +5ZArw1ZKKKVogc5/w4q+WX7JZ/egZFdsK0DFdMXKjxRdNh0XLix+EGHThysPeP72+xkrt8MO7pU8 +vYzgnYCz8Psz+ZxZpe4Y3+oXV0yXVcbPGprIqnPMbADHeyC01mazVmvhIpE5SakO6iwyS9ewg/sJ +S36JbT498a3FkiHwxoupaX3ji5ACyWlS+VpVSMiO3nh9hAZ6Wolzrk/tB71EzUAoLnNXAJZ2Gx4d +7F7k5YfJc4NDWJRlQQ/YnhOgdHTofPu7Ig6vvZhFhb2e/OOh/d07phoSRgoNC4lZYsouKL3IaiYR +3usNfqKOSTGcvu9XaWKMuczG2KN9hiUFzylQNmPpjqiVFHJyFBjEe2xri5Za+qbJnb3VsYWG8Qz+ +6/kHwmjfGOOWSgbXVvn+arqobIVsvXTbnD5Ixld+MHmjJnQKPf4a8WQAjpUCw7+QE/VcjAxmCWxZ +YxbmKeZVM+T5qRAk9DEEuMleW+yZmS9cyYmsPDkxNcO8nSgU6Gxq+TYXUEIJ5ECor68e/HErVPQ7 +f6aR9w341FDR9IGaGno9KXehM9Na4wF4als3KVzbff5dStkrnHfsYZVYBV5YMlVAnBX69WgWTfcf +eLW30NNAu2Y7qvgNn1Iw5DVY/yEwCWzJRuT45ZHx1L0d6Zws8ji4ghHSoEyrdtKOzoudMh6ssUtI +1/Jvq8qSKhG9SGezJpK82IewCqmy1Emkq/YJ9PTfibE75N4SxXy9x6bff3UocA5KnzVe9F/ILG1r +g1pTT1mdtnqdF/Whq69c4lkNTWmmS2mcf9ga6Y4Whj+NtqHOzKu8ZbwoRidE4Tv0UTn05W7vlaKj +Ru/Mjv5EfgnOF7QUYr5C8GK05dI/lbutNLZuew4OxLmBvfDKu1vMZ9T4snNgLPSTXpztWfmk0TV8 ++PLhV/CGzURJZs53TsqqnXGmCc9p9V2wtv5G5nS2d0AvKpWFOubwcGWDPRFF4CxowdZSGJ/u88U8 +zC4xv7ooa88mq52qQhPvt0v5DIPqQm7i2eb/Xq9HkCgdaWcs7BQQZ3T1zLukSwGHCDROff8lHVY9 +DS0i3wau955YePAWJfLCjSOifJC0OTjiiLMm6OPfOdhc3RYQm910DkDm1jD+dayS3sCtBRFgRlQM +Bd5eHk5BTLltjw0r0ZbYci7LS+FHT1DQFIVwwDfgJvH71CUNCF6cSVzExmsLabCqtWM9i+l3kG7g +6US1LrVYimiZqgZwSgPdtXW9lX1QBfAyx34CzyXWCqDGmFqLYVWT+gKrT8V61KO3mRcHzTMNinE1 +GtR9r/Fx39BMqDDt3kjoJvWEUcobZ/svvIFZ+9oI3Df5f4R8yG7yEGAwTvxw/qdg4adQleaN/Pd2 +5ZG07mJvoKe9BnFQVSMyen6A2Cm9ajKY+5nQva6o7c0/U8SFdocKJCjIQdnsQQp5Lw7nS7JvfZ6d +7d2XVdfk9FY6404uIb1A2GxHnhV9b/4dJ3ad2g6EVRl2TDjgS/zg16R3RrHvc1fLBCU1F5vfbrPc +VuIhSru1IG8c3mSiwOGO2WjN9rQoV+wnJtnVdTPo/QRNBwLxSo83jVxtJW2RAhHrKpXXUh0QS76h +cFDZ+VeNxM/96NhlAy/OudkwvdHGmFrjhbCI3yEr//ni8+c58odgks5hsx1HGi3cMbhuNzyF2iiH +8ZGmPs6G8PxUK5CUdOG1AekW42nVHpZfEYZ/+lW3A4VKywqaZgKYm/DIw4ZhadwSx5YJ6doQcKlj +o8vtTIG4Hje1Fp1kX3uTIkCDbhBIBgBGj9k/ev5MDhynfDGyc6EF/9s/URczkm29M7sZi71Ys5ug +X8oZ/G1aQmYNEjvbHJYe0Gl9F2P9cWGaMMDAPi0yLKfudwbHgSrZdHNK0VUPfH3K5AudrZV5H3PX +BO/3p3YXlIQ6PIuOA7pHg8ratv4Ym/xzdO4GDv/jMsYhUmbzPbEZ/6JoTUqvKh4h2VsswosUTIcl +qT0L4fz0qbUfg6hXArc/SQpuJdDoxBEXW19nDIKLKzyepYOubd6/qTYsWBnFUFavo/dL3/talg+8 +PHoKvJGqYst/zudI5XtCgeuKIFaF2xR1e2jPTcsnOzYQBqEgXzGTBODX4XRep91Hr4UG5tJts0GU +Eqnj9bxk2kt6f7Vw7hI2RdvRP46jbDpLRo742XbIOtOFmHareTWUgCCXegIMda8IQFoVjIEQupCM +gNKufZB2nET2oWY+UEVsRCOuwbSt3Mid0wWrU40/yFqu27CJ+vL2dwtyUUvhwN4sP8LLM3moeEBe +MiZriDieFwzFwyJT3o7EMyJRtvikVU6XV7+u3aonu2tWyBtewt9vKhWzX54emxACw5vIp5mRsfMy +IWkV1YbA+LM5R9NUccPJLpg1cOTgYGUY4+83HyHghNa36OAvlrVitbDamPhAEaXayG3Mg03CXXYr +/ZcTZ3hvgySVNEWVJV46rCd9tFqVRWdZaJ4+eIKDwpuWK6kSP1KNaB33NRdY+AEIh2QHw/QVzplK +8rZzl4qWjT/NtPkJJ4JUWFwvAe82c8tAP2kzniLrd/qg7IWREEhEMWYA/yilAFT4a/iWBuofBhIc +UDMfiZRdOChaAbHEcWshfXMLNGpYjCsLrsAsBeE8BEb/TEwTjlunA/jRJq+0k11+Bs8/m3eZl5K9 +MgMwZOXO6y2Zi8M3vd4DoRp6u2D3dbCILsphwqth78DMvvHaXqYCtlcZ9LN5dl7D0eVGy3HLTZiy +SIyEGHfplje2Va6Ur1mjtbx/pJzac+cWc/W+xbKfh8SyMKl+JLgVEqVccKJSpf3PCHfh9X/M0QUs +/18oACixp14n7gVDaLb6Asm5GBo4AcdhQ+dAfXhjncJu+Q33F++JomxH3PyJah2e4PX55AjAJWv0 +vebfiQdBex/QCxiUupS2t4dKDJr/YGwtGww8jGuWlaBP77ujRBXDwycU/JLynrbOQ3pnGXazdHzZ +ruRGGKCIdQfU4q8O+oapv5TlLqpe4ot2h2ngRkXX4RmI3p7qRm9kh/J9D/XLRxoGyCx+84wQKvlb +Pk3kM2OMlkeeV+rhWCUp+sHuc0tF8dwBrudB81qPj5algh9hK/41GFGJr/+PXRmy2EBMmhrEYuog +iNaki5kzDwG1A9gVEEPu4Xgp/oTFrBnHXACpS7oGrmLcRXLKfJioiafBH9hV8GSAj3KgN5tjC3q4 +im1OPAtwoIKgyQaQBFImATpCKlJgUNalP9IZ2IiauZxTY/5qLqzx4VbIj9lwE5BUtoFmOjIVvTIA +vZLIwINy1+5bmXo36oJnC6N1aUxHw1scO5vpiHyS8wXEhbKmUQ/W3VihhIL4VyiVdbLT8i5yKE/P +15OLX+ikVKLG3asAn3HgfrnKCtHF2Bx8slDtUs2RifN1bWJm67WC8wY1DfX6H/RvnRA0jwBRKSsj +uPtLVvzRIGeYwlyzED/GQGcfSB6gEp8DBB0g9EZ7aLAKeIKo6VBw0r6ixLOx7iuj5e3zOehFc2DF +N/wBGkEi2qD9cUt/GroTu0rigG7w3zfT1V+BBHQDe2zvKzUNtwpqsCOmZvTn3ut4o/Ur+aBZ9ZwD +FBs6IrfswelsTR0Pi5gzWLbp0cPPKyGTDuU1pDbM6B/YfTMviEXtYXS0kVwQC7BGcxA+wuGnWPhW +UkC/wmwJLnQ/IF36GQhKkdPumIb4UBF7slH7fL6okFBU5Iu/PlzNR/ivyBLcmvlnWgj4wsx+8Qrm +3dP+hsFKpfEwCpZE1COoPPKZKUaCVKCEIFVPFPobTaKXCgU/OZQCkgWjnk3kypgziMra2XSuOCqD +nBU4yk3A8wQzDMvRC4nmu4Ho1emIroS90kTzDARbbQckkyjNUgAGbOBmPPJ2Mm0GwNF69DSInMlj +2MG/BPcUAXAO/OrGKFgCeJLr3OWTD952OR0PJ5nAwWJzyMTe79me1x+sBkgBrfcI0E7hCPzmpQRH +m1BQ/G4tAPiXFJkdT2bik5R+xC7Vq6Ce6t4iD+dk9y+chbim2Vm4ZF8ybXp97sQn8YN9XDdeN3JZ ++zVHXaUcrW0UBe1FO1PpMo5S4IDhGGmBP9Yk2VS82u3ZpWX6UiW17w/MfWNmTez4ibkbQhX/vd9x +kC+59Y3OQw4rStKQTO7IIVmq8X3kcwM0ow2Psf2U72G6Dl8p9VZd2gun78Bw3zoLyxabiUzsSCRM +GZmvCRr2vE8OoEEl21KvUwFyiMy13+O4URM80x1/G/b16u0wmL97AN6mBjKJEbCOdQZbQZ0EQaFt +aqXuYFFJnUDRb8GfTKh1C19BwEM1tfuHEGG2INHr4tOCDjTgwfef7lNQwkf/HSWkJOJ1RTo4dnD7 +fHE2vZ5iDEh31A5XquNDsggKyFCLiV2HeeHwKIhtGH0BiqDboQIXqYB4QHVQmTPs446MzYnmlqu9 +8jdyMkygoL2Hz1jkWCGIurTj1Uksx6DDg3xhOeZAlUqxwrc+RQZITl3Pfr7jTlun/yKH8FVy3fVU +KnAloMo39qbcjl9RFMNwpH2dJSBavK9xY02Ca60t79yBqozEQNDtqkeVk7seQGAPyIPaZtUMh+Ue +wySV1nYgGnXn6DitrQDTYPIbX3x1o7zlgYKpMrY+rSRTeLiCUHhXsj0B8zsl2D/CIjGc4HuE3HvJ +NcZ5GLhxBo8nLwldhtqwkqR2nzoRCEpEwEle0k69B3Ln9qqBNugReeh0bsNI0Fe1nVaitVAthtpT +s6C6t/t//1I3kuVMQCdP24WBIKdXuwAVaZmWic0vuI8N6cMQIoc8IMEZVJ7e9ZemVuFO3itDooDk +daIp2VEf9goFxsx1VII/durEb4WtspNInr5oe+BUrZGTTjJuyasmMqj9Yk49NlR7a0VZ7HFclYCs +GC6cwVf91czvk3QZuRJY20YicovEokRd50hwkFkrDLzUnaFwqBcPXKGzkhMei0JdGFur6GZ/JQn+ +pyEHhxgK5olV5dm2oxTtWwlEN8WjpW5BdtnziJX8GnIGbpVY2qrlXuc7dLwFyPBlCfxPBJiAknUh +VWOgaDVJenb5xa0IKf5Z47R//OOPNnX3mMAzbEHi+a7ThlOje1qhcn2kNsQc35BnQvXioht3mh9g +6MyD5vUkQ6I427WpH/MF5lBrrF+2WsCBAZcGOszaqkdk2Yj5wOgdCbT9NnfPa7UjZqV++yEtXI2g +ssg3Lul90I1UQxzvOi0UtZJ9plS19ln3YHmLQJ+SQKTgGaus91mTlP3JtSLTDkXclUz/wsE+qxuV +3b+s61RH1l6FQNhwPFzxPz6uCnTbfH2NjWYlxbo/50chlvbhYzUYo7Rp4QCKqPbNy57vyQJNiM89 +6gB1bckMoqqE6aWE/JlDhgcUnydXaaxtHSBK5GHn6xaQ9KlpLbz/fNrB5VZ+n7xzdu2L82YepvzD +KJITARbeJkH0x43AIvmHVDkAikxuqNT+A4+XwfEtK6gfDzdZ5uS3pegOd4AsQG89uueP3OJ3GcpK +YN8LrOUOxBQq3pFp7YUWvhuti/qhdkhI/xgWbQidhuffxRT8FThA47xl86U14POIKjI8FW/QnNZK +85aN51KE7e69KqFkccAYrs/YofWlXdvVEHDTQe+x+MlWGFjpQC7ymxxWmKlooJsVaPe/jEqDNgEl +BZ6pkkH0g0C+8iYdKYIMnxL+okmxtVwlzuJm2kLqTLMD41y4GVa4scHQwykUOLH4dsnXovOoNgXq +rRPn1QUjGfgWQtfoe/inuW+JrY+XbdZuzVqPPijh+/twozxkt55ezPnDl1cnwcYpgUU/XJa75U7y +UoaoraLwyepXTCjnEsNndNhsaR4s5W4zhcK88T9rkCCj5cqNof87G95ajbnt84xEX6Gzcw1ffoPb +Py0qHMMI65g44/5hOEQ9JI0AvUDSdh2qAUNc+DwafPPSOhdXXabK8PIbFHeeSDZqnb19NBXnURLO +gC2pocY5NVZ2ImtAmpO2wzde2h3GWqaxROsEWrepHECX5gIqK1AeTJA8aof5IUerJLBLqvtQ4cNJ +hknMvPPSBsDKJ51q7U8AdnIB9C6kGRSoFdmPHykcjwPDAfVGWFQgIJj+1DWGKoYGQyV/PN2lm2HT +0tzZ5yr/9ZbIgTK6q+HwXE/UnMZA5RS6AkClDCl71jrS/D9HqzrJp93ULUua3BFH4318P4BLy6j7 +nRdSPfyqRf7zGpgD2irI0loi7zI0ObRQfjCiVHqnn1sL2Q6dV7yquCq8HUHjLD0VHgtYpwawlg2w +K1SFBcKku471UnPZjghVie162c87V3oZTYANPvWYkkO2OG+18+SijBelm9PGrAvB7nBFh07OKYkV +7Ad4JNudme+ZfcaMuynfnvGwz1ZpBsvDTxxpPPjMsb2fqC0m4PtzYqxRek6VuhXYq5t3WyNbf2cA +jiECErAiXAoPAxXvApq1+vDRKPma48MNJpJY2WnPxD3uacSshfUkbsUKemnQiuFKe67ftiB9T2Ao +iajxHutkNxckoHU3TfHhSvgx5oR0e/MNNgRPeZRo1sFpiv0vdEHvzExyLGp0r3XsGkHaE2ZHnJuu +MuKHBaKxFgjyZRuChPBXjcXFHYG7j0rAOlpUbLo1FVn4KouWMkqqfaFBT/xOSX+VtYwOwE13pSnN +p221xO1sYPrPNmx7Q25eNu+GNY2V0sQRtKofqb6QbDqArhdFi9v1k91MLtvqhNgxFzQGIsZFJD1S +wZb7vhoqahXLCKVRcZ3AqMMxWuC5aqdqgGkriI0qzfvfg80sPBdE2qh4WK1FHolrJpfEU1VgC92M +79iCuZltf0IOO6PUdjCHMCzpWp5c8jInFX1SjUWAosxUxoVv5p/YzFNsTugRGh9dP7B33g3IHPhy +y3UWyp/7/rYZw3hPgL3cqtDb+XH4Ke9E8j36VTvEVYGws9hIdlEMpbz2Yoo90wxtmKI7X9/PHxMS +1V7zALf9sMomDAgrB/tBGO76ZvmDwLUUUCiKeu7L9wXjZw12NQIKKZsKWoaFbN+aO46qRzYLzPD6 +3eX+YMbU4wCzXoljrFysTfhyjQC5wIGTSzTVAYMSMKgeiaA9EHhOddMwZJj00mQ1Umbw4KiUeOYu +sqOSkZ/65UtwHCYnICSI2zcSDpdphl8oNQkflfJwpF+cCnrZ+4ZmzOLtcSha7F+k0rppO98rkjMo +ITskuBbJT4DG14UHnu3bqGuIbKOBldNld3NwLaFM1XxdcC1dhoP7PHnWIzAxOfxVqqCdG16V3TIQ +d8noQP8BFlczdO2q5F/lk1vjSiYZNsFsPAAsVZ9Rnmq9DBt4xZQfWgYJroXiMoYQn+zRQlhnoaXF +pYmx8Bqy3sKemS37e3g+gdNeYp6t+vB+2M7atJ9K4kyIVv+I1Tu/BhSrXKjmP7N3Fa+M2jvVU4qv +cYG31aUnEfFAoDYOa/NOTac30kk8ExXwm6QrY2CgkjJ4EJZmaG5YcFEK2LB5lokGlqrKJp4GuyVj +tL3OfU0ZriZIPXEyDiEGwjWW3Mr24RuAzGG/VOv4OkolNkhg7L01z6/LRkIZeQVBxdJvuyrlKRW+ +PYhP9gn3LbVCufqSv/gk9TTFG0Vv9SisF235tfiq9l3M9WX1/mdnq4ePrZFtgNE/QRiCfPNqzsPz +aXTqAaa+UjCM4NZyFcp146DDN6TrbPSFwFT5OuuLepz+fV8oL9dP46W3H5MevetU/0H5md/I1i6Y +7KgWWAZZDYuYyVe5I4xn5y+F1eZ1rzvGWfxK7udiqSATHBvDp61E7z6Kp85u4nxEr6RrDLKCpYVF +6t+4YWfBTgB7zrth+Vy1p/THUbMnT3wTntP/v8WtA5VIFdJ/J4WcU+mZxPSfyP4H1Jv5cM3MUstI +LPf1og7ST49GRHixapXCmJjoF8Cp7LJYMg15YYroj0RGlpf2NmIKwfFAwlWME4yN9wxn5PYFlPWd +U0i2ih+IeFANwTYMG3YxSnOjbcwerSg0NnnjVIQxUIKZibmB6qUr/bsspUZVdnGuwBpPbvDsOlfx +m2n5aT3U6Cx0Lo6A1nwexDkBadJAYJWsv4wOPBITcqeMYGsX3nUE6p7A3Rpoj2elrJJUxECiR64K +narItVe10wkPRbChSZmKv1jtydyFuGKTHQ03NxMNhJIvwdXocIk71xWIED9BYxltqvNos0pw3ENB +9DDYRlEWkSr0ytYbgezjTsRH/jRpqjhiMxegA6s6ZbBgWc8uhnVKj3vVzlgjkGfpRBoWNsAlr0bC +XSGTJYqkGBzGK+1nnB5eMzy+SzD5C+sHfJniim4GzcgRazMlcDMaBpXJvUUfvm+9zxfHlZyIW7LO +AOz9KDTLN5Nj8kapNiBvWXqOdDTbWLd8oo98QVWTFSAByFgT4K5kejIb8Ab3ey+iOxf9Uwhuigrb +hDVBWUfwrYJyscE+IQ+/DSewNLZxJ1BLUMlzLhcXkMRd4VLpHxTzVVrXN5R2SsJE2ON7rLYq3eWX +Nk8CWFNAhi2widX7fqZLI7fGabB3gEKH/a5F/I8sw4zVqmrFUfg5GZcQ0RXJE2tBrvH6f6CrxuD9 +2CnNPrajYFNVIHVwWu6ICjbiWETLEz45w+44WqWEfCWIFGw8+NSMQhDpN6mKz/DQnMszoszE77WF +iehN/EuyebUtebj80TniSnk7kOrKSG5AsFOlTiDxBJZ4zoxurxCL/x3o5fNEo97aEw39XFd/bDv2 +tciSA1LdVckpWDMn0h0FlUN3b/0lq2OFwNV3MhU3waG4cPKupODxMjUqwA/zTTm1bdvh+IHRMXH+ +rSUIsjYIk520zgn5XhEyZParyQ9vH4jRyOyNqI27eL379JctMWM/v52psEvGv72ZRBAnoeRFLIug +5jq3Pf/hEnM1c2xJ3lqdcXyCuDZlGxoBK9SZs8Hfmd5LswPsWN7DeD3Y0FTEb9Ydzac/LFx1SwuE +CADkUKdCxjYeL/JPEWnE7RKFi8qRQTao/PeBzpTDpnDHtljvu7sDIufR/DW32xV3DTZOADXAedte +Ops236/RWGlMMVPfATypfh/Q3m5PvRm05fXzkfY75VStnr8ch9xC9hW6nbMd6RcryXnKT9MhQThD +23bOR3HLfK/fRXkmkJfnKhgxvhaMaYjmnVwbuBtxyKEmFvpqv05DmRDUnV/2VHV3LsL6/KkKhmL4 +YfX6Lh2jlLzdSMVGM01D8MBWq/tYyve2lA1uf86URKR7O7/gyzNid8GFYKAWHd2igeuKAh5ejRgR +N5GVddPSMKWDTCYRmgR+HdPP+UKbQQlBVJfjnSK5xVfwumfM8y2+5OqfXMNX/HbDLUoGkjHSipnp +aqxGRFaibi05jNWG2JcIVAdZMlcrx/wAgL/6rzI6Oz8rGA9soWfTeboyp5OHVIoaQya/NdNJXUUi +Q7me4XMxQQww/+NUZDSwVH5hORUZ4MOK6ZsQFl2/ECzjaMyEC33DPrAJGkMoorNc1W3nGbYmJT1C +Nf1J2jD1GWliZl6shx15H8d0hpJTI4FfWlR77YY+pzSbHIKox91FIEl1/Tj+TnDu89bfWXjiALUh +/VHYrbC2c12qzORx+GpJ2wNQmOaXPDSQ7ZLWY0Rwctn/Gkq/u8us3JvI8IYh34SXRpcIIqMoe6DW +jym+dn1aNOaqkjBvKKE/OS+ujOQEWrPlv39lBvrmfBlDFUnnlMIZZHKdf84ItZdIGIRairIVcY45 +7esO5NS0OqWRdOgIftfsgL9TCAHMFfASiuYz3ufJx8uXrs5XWHpl5rdNKdaUvNJxQGzrNSK2p91r +OP94cnBhQsdsCEDekCfplew7zexWidqf5AE5gTXQ2/OFiOzVjVKUmViJ5ya4gEhsSUd0Fk6E0V8T +HSLwTH4kEjYX4xRcw3VB8BT5Tt6ZfW/lc4WHoGaNa1QC4GYxAxP0F02seXP+FK/+cHRAhRdL7z98 +Ma68y939/iba2Bt6sDD3E3oUF6lZZ1Sy3OjzoasvBkYPlSi57rPhYt+aWjLuFcQtea6ACBJ/pvEP +nKUw0d40T9zoJvug2J06abDw42CDurddlItm5Kju3vG7JIDgxujpQxN4bwZexVReYQD/VDkwkFlA +cY2YlqIlALq5VIV+Pkkpw8ipKKiXNcRr5Is/4bmVmjesKvZHubhlcVpOLNiP2WEKWHKEhJDTIwjF +ezGjvJXvWCmSLfft42kX7P40MnJOnGiF8HR+qSMn6aoNp6HoZ+B+nO8LirQhZtmVdS8PAc7miOSC +BOUmtd6JnaANgE+colRC3ghK9ARu2Tvf/OcNqC+173KE9TsXhn8/e1ADDAOyySUK2mIkYfYc4RB/ +qDWaj3bVY3SB/n1OOHx2VOxZiMWb8rjWNwUC5rIBAQCwuO4yYJ+d60MsfnLvfNsmoNpLquODRBWd +heyxJJp+iGjh+xrjZiAoPX9T6Dl3Rr9HvDZu0lgBUsQwjNp0nVhBaplDbyHHsTZeUF4+Ywlc91HZ +pW5LvNw3m4XI9dRIuJfOa6Vsq+pZf7/vBjiZZM5GU+zDRj9vuXvC7Fxv215eu3CTuxQ1edwSFOX2 +Mhlxbm5LvT2wzCfccOYj8gst4c336ZmPeTCSHfXQHtJq7t1PiYBb1qZYU+YpWaGyuY+QGdE/VW8g +0XcSbKuROazCIFKx83uDqSihV1cKLJ1Cs9OwPXh4t7DfPmMh9JqYC2f5aLgfxIgL4LOqRxb8bzN9 +jSDLsYKyzeVe6OpZwOIsEKyeLV5O+eYxNDWfWodDHhw3ZcN3f8xaHhXHRqCQFdpHGZ0k8uw0QFq/ +fQZyRip+WWOwdlyL4Loq4xN0pmOQq26yIPtC+icLA/ioY05l7IzO1PkSl7PCxDGFRNfzPiYO8ykF +KzgxqT+lkWDKtd0Ak/cSkuqlhFHn+yH3stggw12LMGC8WpyMNkTKpVCV7zra/yimfBs6uobz1DLx +WMY06/odG2kW+Ymwpyfto9E72+D4XKlOw6UwtDyxIZ4OiIb9rWkcxuv8u3ZgjeRHWV7KoK3iZhn4 +el0t/yzjazb9kl32+/CWdleee65z5IftKcO/GrTnWRP7fiL886XuJl307hEbit64/gSNUd/CNc0j +bM/dUDUC8iTtF9hk5Dmd/7o+LMUUWsULawt7ihEzbtx23Bkoi9mOOz9jjDBPhJTIvJO/VeobL/xi +SmWYde3Ofrx9pAPCc5xRhCs65m/Ti6a/PFFDCfWomUiRnKLf62Tg1TnbgEfMr0oI4OF3UIDV+waD +B5CkK9MvTccX7DSnxnRPcpJ8AktbQIV4GckGgR7tZgOUpUFw61n/OyCbXclVlHMi1qPDw54R3UXb +5TSztGqdLC2zNwR9u6skAJJC2U9wBSEwNZ9FAk8V0rHghcOmXmF6DU/pNok0qVIbrbwkIGQAPO73 +JSEjmJ9XqthUC0F//QehM3BxxB4OA2OYA9mdMJMFud8Le4BpMcI5CqofcwBXtwSi71bErQHaR464 +sAgS9V0QOHdubdxpyhvwMVFXYoDw/OcG8gt2oWjIZFufkhXTuuFbkqFYkLCrTPZZp1KG4Ia7WOPL +NkeC/FC6XoMWWBtdEa/MXtHCoWO8K4FG5VEG0Lit9tHS4l/qel+TsieMl55DfjdQx8OMKuor2sb9 +JkACDoBGO9gTK+DGnBfnR+IWrgm5BvA8QmjadlJcL5ehiQQ6avScLNeTRkXmDmCIpN+lvxJzCJVH +3rX1/totWTIwjxkUtdgNTWOJzasDJSOigTYuq9akQJ8ELD5JMD4OQfIUYVXyr2282zC+XmVfvpoc +RVJ+EYZFKBYjK1Htp2hrzPJa2D967stcJ7UCqczEvgc9aeY3wmWoQt8rjQjeS+kO4RzikuPIWXkA +i5qxsDUXt45dOkJy5uXFFCeGOAwpZ57I3LlmtrY11zZRP8lLDewr46FV1cJG3d835dUEyM/DSYI7 +7LQtg6/4KVHpsSM2Wp2Hu1FSG2dB51dH/yDWxaYlAwrcNj3iywrubNNDqzKXtkqp8Yv+6Bfs5ajX +UgI/JeI14FQUHvvbSUElYz3MoUs86EGdhDOXKPkgvWE+AVjfZgBRFTB48warX6GBa6o6fd4TQ0uI +kW400xc0FCyUfwA/v8H+9Ok9oLWZ/np4B7LoSloIcMzXyQJ+Ik8ohbTOmbrofdwcYPyAmlhNJt1e +d9U4+nCrCv8TSjkiHRExY2z8ip6njxUXPRiOXBDx7PJc764QyaZfEnH71V5oONTDGTHkGJHg/p9N +6mZuBvqrQB6dOe142mhWzmx58a5K0p12Pt+zPzVNBHyqMiEXVKha9fGuu0ThOgyV0waUUa/URhfs +4NFXd4kYhf+BapcXACw+ezm1MUZe+dHlgepwq8dLpR2jEVfsONtCBoRFHMM2gRk59786uLW1GiwQ +t6a58IfxxXhR0rogYmzBkoiQAGo7ZXCxY2GsOjYFkVcnWas3Wv9jqmwQY8vQGXL7NwzcEJADAGzF +MYytNffhDCRAuOO5lwGlX2fE/zGEbeaACbJeXsJqQrWwhvzVleVfxm4sS9aygWIO3LTzIgLbJysw +ftyXaWtCs8L6u4B6ew+2g/bAi9OGyjxEkr7Wnd9x8txIZsoM3ILgRTgarRfGtJxwNAb0oztphS88 +i3QuUv6LUApL99yBTOTzsvE0ZTMQUFP13fBvFXE4YZU7ZuQNJaPpW/dkhj6AmBZzgUe1JQ2zOyOP +SjVcpllyVrRdmqErQ1fy/LczzCZASLVO5PmbdZE6XvJ0VI2MbJOwPHBmZDM9eSF7atVMvl6T+XdB +cZLM10zpkmONVkaxD4eUxVsT9N3NK0365p/WZQMNANymDA1jMKovgXPaGAtywx10sqv/Zi+NAfN6 +Txa+c4ynqZ3LuaAUzlxQGjjvuGN7X8OLPMfoHx5HCdDIedNrmaz0y4gNzDex24EF8JNHKgJK4Few +Bnu8+VkrU4bPYug+oUpq+B+lmg+Jk7wjaFctLoSDBTi6keVsYO00MGcDnopSwvtKQbc47E1+XReE +KkMODQWxljAIfP8XzTu8rmaeK722/wpsflxbElXlYUvvj76+J/eMx6bS6NrjfU+Mr05rLyW2on8K +IF74MNGQuV4S6Ucwn/16+n0HVgW7ksYZfYnCcM8McmjRjQf5Cm10qU0HzEyeOTBIWtAc+T6uQZOv +PqPupMLDCJDDKeveMmKuGC+cJWpsYNNrnT6wF/IKq/rkY7hqsKUtpxlGHrgIXNCKPPYrP87HracN +5o6PoDJx0F10lCWbgkhGCWOh4X299ayZONFOcrRbjaHRjRSyhmh7z0D8yjlTBkWUUrg91ed8LdFZ +DooeBxmiv1gRnMqag1NraActkXWAMu8GRM2ex6aBQWZ5a7dozvaNr5oVx73S7nNCIl2eo7cn7WKy +/Oi47hLqcCPQe7wph38p4mVWilHeo0YEoYiPeFFEyHvgGpXW3lr6qzo9zkuPo7Ju0bQsj87K+Qrn +B7lxgVFem+mt8ardyvqtRo5KrecREO/J/s3ZrQ34XlDakIwm3RhPDIyUGjRpNPFInJvq/tHm3gyj +2U46WpBEFVjbFiQFwL2VVysF0nFoanOVeMgFS1gnnvzQsMr+qMxrEr5vfKtykn/JWMObIYgnW/2p +g0ATYk+Tcjr//WXTkL8xfoB6VJR4uL/jb0j+qXaJ7Eyd/lCnueFXHSoKP5hSBh+iLNCGmP02Ng/C +GBNjChtwtcGwLetsXf+GO1BIraHWPP1LesW0lHFysNTJvLRPtPa+Hy2f1YuiveyqUd5W+KGTOJmU +JrEhv0L3ezXlZ3iB51UDsdGhKr5HlFPhHmergbABg6nRqZsT/Am9K80Kp3+H1HLsEF3a9aeyLT26 +3lGfTPhc3pAdPZtm+fnr0Q4IVKhx+rsUwDks82EgC3ytYDt9g9jNR2kW50uTHVfYv5Y/Y/TV96S3 +BWtoE24mDER+Ctaw6opLFD8po1VkgEfQ9Jhjd+JRGXtWp6D8GgRRj1XBpW5TIzl8TatinP7X6zvA +neOy5SJfmBeH9bNJnpBwdpgFMr/ZPb+FOWGmV/+GQq2RKtrmLTZUww258dvu2NBmbn7Fr9DEZ1BT +QyVDyzYW+Uh6Iv0s9vBHbSzrl9kVXv5mk2/LYTDa74l9lPZnPs+pJ+Il3uMtYRKoDJDIUHn3RoB1 +/0qSHGBVsGQ4jmQXoC9X6igD6TX0jtJTLm/Ma0TCg+9AlQbFKXpB33TWxrUJkF9/eXaIa+zxnNke +6dnJv5FaRaFHls6FTb2145B6zVwAqFppm+JeWg1w+KdMPlsBPtSASfiaPa0AkYxfAqz72mSxY5Fq +sTeJ7YTsCYPMGnH1eLVqRHrXDQf/IFyuiJmwvzRMEjivrS3rAwHgZFhyvo71F88xluKbKAaS83/Q +E7D5PRYNTD1vTD7oNevHXqxxqXDCtFNB1OcuAgNTrZi2l4hV2XemXdKhgnqmR0EG39Jm/ruf52up +WeHJFyZwk8JqyqgoLMREIYEARECDwwOKd2v5421f+/K0gaOefN9oJbf+8HqUl81nd5h5XxC25Eoj +kk/a2I4r6C1snoeNJpB3CDmiqypWcUWxnV6gXnHDctj9fWScEpfS/9itcuBGIvduAW/fz3D3MRR3 +3iQVbOlS91b96hkseU6qbZFyACOLHO5zXPJ9elIlUgLfxkhs9SurdRaJkHoOwJqXHqqbUYl/Wxc6 +KWqdiUVRMzyDVDKqe+c9bcENY3acVqGZrPn1dlQuCl4Dxn/HzlINw/tK+mXAH74ii2HJgcYPm/rt +tBhgwdhulwULd/WUtrGtVRS1f01lAf/I+RreQnsol7FGJkMHd4lBddtH5Brq0E393Q70YsiRyHK/ +d1ZbI64b5R1NyZTJaDZ1uH6WjggK08zh9C18Z+c7WVXLK95NxdV/gqKff/gvjp3Dkoat7RctzqIi +A+H6lLjuuDonenrUULE4KqDgFEXS+ip2/0U34n7LRWstcOOhI4G0lWtDBt+Wv19G3ngPYjVMxOPM +1YWvdzO7T+JJrfUG54ULmqM6NfWA/0HV0fki6Nbs+w9y7IcbGhsZpfKZv2cDhJJEx2YVn1fIuhVX +d3MNszloLJstHqHUTbH8oKBCV4BIcN7l8SYBvgZfz9sxa1gpI1+Fgs6S30SJvtexcjDJI9e9PQv9 +TmoVKiyiAIaoGEi9LRfzMDYwApVPylPYVsTAdjv9ib/2RswE8C9LGCUeaZ229TOet1MhsNdJT8a7 +KGo8CehJjS5nSLnK8qenrHrnr90FZsHqAqEmWGevsCKyCw4hznXN/IOp7pLmNI5Pyo58WMISz4YD +AWMu0q4C4vnJyZuqXRAcUyma0hJ0l3jHVWEgtjqOBKGXcFcTwhmxXAkL7lfegyhrCwbBbL7WQ1+L +vy9w1b1VaPixGgDLx1gP2DyUfDHfbeSDpO92bpdsj7Omi+og8afUIVk1NAKoMQEMi7xEAdNwpcAx +Xe+dOIWYHspEkNvbhFDiOC0VZCIE2v9txpAylr6RW6OOurvl0AJJvTEqMYqfgK2TlXsLThqYXV7a +uq/svrMqYVWGgPb7TbngIN1pZEucFbZqIplzA1KXDn1G8L3D5ng/woelonCELo4v8ZiirPAuvjCG +kSp7+o7Re4gOQ2h5zOmEvoj9NDW+vY8N7V8yMDteaKD7ESPBajZpZbwx/wVfIEIHf1bRUsPdMgN7 +E822MDW6JvPoGxPEb9eEB3SIRubE2oV11mwil01ARImE7x6rnrngX9mCOOhD83n6gsRD+oLvwPrx +LnsYRhG89oVd7tjoA91ZiT7kL44/u3BTFTMofxiW4La4YA0D7La1NyEiit78Nm3srBvDHNH0EFzF +5lNPBzH3WdbNHhR4eDtukOTPzu96dWLBWpKoFogg8/B7Lg2EDDIdi0SSdwFh3hFKJ3ZK4WQtmuNI +/siAoL3ZwR1zrDCOqSaLNpEADzW8ZiL+B0n1Ct8WwNlXtgEJjvzPjFCgEguH9YEuRStx7gtNsWiB ++nngalq4ytLY89h8GOAsOMJKqeIRejXkWYtPnmyihLMJ/P1pGM1LSgAS2Wzm/7BdukSslpAJEzzn +8ul6nUD4NuEvkVExPS9xDrkepPYdEcGdh4pZGeTz2YpZcLJ6l9YiPaIUeevyOdyHskjwgMCzhB/4 +AxLMYcCf1lkpDwhJQh7bQBt/4HxB2UW98lENSA1W0+xFQCGzRPZO/o/24iFvaKqre82w3gHJDf8q +9Xl6Cp+RVYBCYosvlW32dQzdZ34UQIPYsnv8DP9piPuXzDyJcqGOUvcJVCoYYr8LxC44u73T2JAg +ITWWMUgSzHUx9t7ycFze/a6xpBFNsh/HPQr96LNTRVC1A4Erb7Pe+qgXPntq510ilmM2r6nPqcKG +hbsbZY6J/nsfWNpeTzawdrQniPUOXJlvqoB9A+H2SKpvbblWJJYlKqJ2cLjbC1v8WYJDSbT6bzoS +l2UM5blBwj3Imlj458+GWQCWHN1TcLOgZTUZEIVJohOCPUWwbHOYg9uw2fURJsXN7YQ+Vbec3UN4 +BZTl3bQLGAzGgY6xJ3dlT6THVKRVfkh5DSzSpcki+AHBLjYmvARBYvMGe0wUsXhd2OrKVsjNVIPI +hcAX3MZSPLloFvwMD1lbYACdy1+iUb1JRkxpsepPiDLjTFxvwX+ecrpLRsp5R9nM4m4lsIcQY3ze +3GNW5DO8hfLBnCjF08GInrnt/OpVIaFUC9OF12cfMPyNgxVWLjnj1IhAZvapYMMEMKLJC+d4EOv3 +o7Wo28yDvrC3NqFEEJkioUV4lyAMx6RYiOVGbeDWSksYsrn42In8P4n0+3dAx0yLGbpXqTO41KRN +y69VRzePIG7Y3bYz4KJQUIFAU7WFSqxEHqSGAy2Y9UXglV697+cTsof+/hw1q3KN2wgPi3Fc5tdL +loxf8TTNy4d6qdhg2wqOVizcScaMcoJaNQXbJ3EzAUFWM8RT0BNSfVPnfIzkECNkyIuIM4xvuhhO +hWg4N0UoSWpWMdZI2dAG+54dxrLxF8n9ctTpJH9qru7qag37ooiKGabGl1P+FYRezJhbSDK6TWyt +tYdvZBaxzVfLQLeXUhNNCWoUhSbhjy3Fs02Z1fYKaCJS+4/seKi02xoSfCWP6LxRzU7wf6FNgy6D +ggkLKIqpTLBYFk8W2mOCFCg4Bkh3a6Ai5iJitLX0SyfhMNgB5EMJFuAhfY1OaAhe43gETLLfHM9N +hfs5/9EDN6NBwX4XoYctW5g1bqwmyOjyYTGX55tduwK1D4dDZNnhwVCDmSXhATHg3SwjT+FA6u2H +QgqmkXtKXPMW3en9O9009mqNJ3h7OJx1mZHAw6Jh9MPR/7xgUer91sSXxqfOs/d3+Ml47n3icX4p +mS4kN/Y1ZIiY0So2uZAiKz2pqpPspIjZFnggid+SunaiGlxKIxpwDlKEYNQDxWbSB1ceovfDec7N +W7TTgR+PfnYR4t9k1Kb8wIrCGGRlweaWGtM/6N2qbJn+0zo/2nFVQi66vL8wgYRod7O8yhqdvOmb +tAEIbKH0Yfm7O1UNVXyr5cbuSZEfnTl9HcTPh5WrKeyIMpLMSHHNyPwEVOedfbP/cs622pdibmRk +FvAjPGbMCjNXTIWpGzjztWnujWsgRhiYqT7FWfc7NuC3UF8q3G/BqiDbH7TsIcpOwEP9GGTq9fbP +buUdYxLR2WnZ3q9+GSYe6xEokvqaRLD5VPXmoGX8TpG8JbdWZStaO67kUrBuIyD/CPzXG5T5QmNh +/F6+ba5HxXuu9WmqfxoaVAcV0ypy5FLmDX+HXABdU4fyGadIeP1ahCwqy9AMd9AuIXWyv/0wQzMc +JH3eHHng4CrcMqlSzYB4VvsJn4ysa8SWIx0Sp85d0yXqFPGZw/dudJBBVSzubYU2aoFEskpTqtDv +nKI7yFV3i+H7++WZuREUskxlg0wF8yggzCMduZGwsALIhC1nTzmAxL/6stXTbwDfzYV6uYw/x0LG +7rLqPbX7oBxYJRdBD9uaXZ/+cJG5VSZk8urhtYWkLeVV7g4Xeoj+Jo2tlGO2V/8xA8ZdYfz1zDpG +52vjMzRR2xczTLQNbY0IBI6F0e5AcImoXs9mwVOXbOYf91ov4zs4o/Jtu/wt+8irT9bGnH3pFp+u +AZ61foy+laOpiviXIWTPTEaLrmtM4CfCNSjsxAJR37OdI+p+OKfbcl/qUtcC+ti61RZ4xlD4z9vD +OmOVY83gssv1OHIEiy0YK10KMisqbhe8a+qgwGc70tHG24ES6jpTQ+TZ0mY6yr+f3lcd9mwaCzEE +MT9yfQyI7M4APOyx29eDG0W3zLxMRqRnzYPPTPvEp1WnFt6F+PUq413LuvDgNEll+IntYgm5vY6q +Fp/ri6v+5qwtomJh+38usqrzKSM4a/6/CC7UJnSoM5fmi+vrkdjgTjNrM8wwwrnll0EqMv00bkUw +n59kQsNYl7T9cJB1OMjJK7sKbkSEWC5pqELKpv6KXVcyuRuOht3y1AitU0xvJuRjPgZZ0v8xbGOB +7GBRqgfzmozxa0Z/tST81S1DH+AG2e8s73cWGnpC016r5O9x6HcfnyaV7LI3biqE5zAeZldsWX3A +6sBwdBCnS9CFnsk9RTylNZQ25oJKF5EAAXenKOKIk4eS2wvxR3kwf1N9NG7iYnQq0ZvsCSUthxhc +Q/vGlcnmDsZnDXh3ucOEq7/04PpWlnQGI9EcDH03vJ4PRdGsAVbAY8ng5+KmezMqT43nur1MgxRC +E7iiIGGRzRBADC/1j8gmMxqbSGn89zrhOR7TXOevErBfx8MUtRPa+22+UU1jXHCJeKSiEze+XrB1 +CAEYYGs+6EF+zjT3aNTsGrXka9yqXxMf8Hiq+VXLvn0UwmXoscw9Z+rhs7HVrBisomHWo3w1VNxN +oeeBQ4M9D6hM4JOEoi3K1CUU6aRB4kuPYCydZSyb06piXx9PfhhNt81h5WfmjEFyRCjT+SAXrn+k +HfYuLDJcx2MlmuqTj+WRFt7i4DpblCxWdhzgpFj0/6i6oyJbhTdiHJ0N5Xr144mmhUwAYR+ly6ra +/vZFPxFYmNxiZWXiaxKu+wE9ZhWoD/PgAsgPosFr3NczmWhFEOfTxv53W042VjHOgTIJqlu91K1Q +tI6CtOttpiGeBBfJpdOnC3tL5ONi3T3IP8iYz0N5BxzD8alfEvl3lBwWI2579jSIUjSY565RRtTx +f3JrqQBU4IiRJy5TR6X0/SVkwluURGtzmHfj3Gb6RdDXtNRTMc2ZhfW9ri0kMMboti6cfwRnp4hO +9B53K3FdpnDwZFOR961SlgfJcLmgXCGwkwGQV4NiDNshBSdXegSf4mpxS2eWBKhVkhyBoEQ8u0ke +XqLTElZisl+6w9J9sBDw7hzlve4ooyKRuzQ7k+BzjsYRK9fktzEO2yuVzznFTpEPnI9KWM1HyPQ6 +s13e3+NYmRmPbL1zfS48oEjVHTQHDki8zP7s+L0R85TQjbH8XEsB1iWqikRaM04xw14iv7fVkAVx +jdn0KcAZjDGKJJwhV40Cziv3Ke984ejuQiPQa50GyeOddvBKiEQcNI2q6/bBFiyJeVJdIdce1VHJ +RWm8y3SPZ0gwf5Xh3zAEmwcUYZjxXueuj0W8SyUTt9Yd6d2BYjmyHDXyT8f4cMEDqVC1Agrb6hAk +d/Qn8R9n67gdFQjaZNv11p5winVm6kVdkbimeC85lB6k4L8laksxUHs5vXVUVLp3fzzTGgXmibZk +DCschGwAE5Gg9SukUfRJ3oaEYhIN0VQd3DWtqme8iWW+/pd8fyuD90Ww+SSyISXbxoJAcwC/lRfD +xQDv+FHzgtCtvAR9HR7b68nQ1/7dWhFGLX0EKJn+PQUAuSKA+1C8PA9Y8Cd4fdRF2lF8FbJdl7lA +YZyBoCz0qzND+cE9dGOPv6/nUs63LYmYW3ZjpwHa6y8IwpJlPpMILChMFGJtckvtQ/b9Hz4GXkgn +4++ULGlNzpHdFBvS2D//JQFj1fmu2txnMhY0sRWYD7CgGWKVrAlwc3kGUF4mBMexBXuVIAOKate8 +86Cz7arh6f+mHAsh+jApmR0yz4d951Mxpz63Tl0hvJ6PBuDpF22MraAYeJIPkkaUq/HTe9ulLlmY +dnjtaBMGufOzvyeFMCSrRtvdsTydwai8BzHK538QZqHuoxJaiqfMei+WEWlIR65659Z9+jN9JqjX +1UdzV+Oz9OML4YDVBJrVmfREKSAio0Z4OneK6HL2VctNC04xh63QH/zMFOdVDaocAQJsG2j5WVit +wIQIkLvzEDCk1exuYQgXgLrqn3HUR0QaANKVVc0sZe3BcWO4c1OpecBVxN10eCKqlDieJOcKz204 +10vi2+sGqeev6dHMvjmFnFy3sBj91eKC/cCG66ERw7M6Lmy6tK8eGIQApnheGDoy/Sb5Gryy+SvP +doOer/Mt+6oBiYSVEMwXW8WjyYnYVMYACWv1UrtEEDj/IORW00hUgQ/kgyYZf/T3Nsp+4ABL+4Yp +zi/JQWqxd+vBlwg3bDo/KhBD8b+DH8SLHg5/BrHhHwTdXTbEtIeCVpkgBph6aFzq0vshZ2XnkWfX +vFT9IB67ntekZVrtD+ET12vNsn33s7/Hc3JIm2AgC14T58TzR8jOQWnJn0Ni4m2FrnQAMyFNQpbZ +0ZaCYA1N8cwGMM6Fo5cbtqGy/Etkohr9Ajca4Yc13i35FuG0UHvrK8tt0cHxKDfsxLX1Drqm9rQ3 +TdUIO1CAEawIU3HoSrD2dyy3IgNe8iGbV8l5eq/WEaFyYD2tpiFDwBI5m9M9KhrOZCACGtUrArDz +I2N2Grv6CpqXhoy9hr7DNOwEPO92SyASe742Mt+vlB9IOjRZoDBWEaRH79JXQgZaFO+R84+88Vsh +ga7UMQJ3JOMKvw8Br3hTrl3xsZz/Vdd1v7iymvj7X3Fq58XaJ1kl+HLfYWqnNrxaS60uuCh+4DYN +6r/SiHfB47r2vnvSA2czm10z9UL61MmsVwK6dGlO65fntHyqbBBtmMMYefhD3i+BquqtxYiJek+F +p+T68dTuVA539iYUdoP2HxR1hc1CWOHV358+eX4H2X1+fv4Fs4J1VS5Q0OOXZoOGUKcLNBSp4MpJ +EO80UMKTavBrwA7BXkkQBLh6FroKQhn5miJUJ0LJ4114nYGjLcrrN7SvQltPnTM/H8f3E2mSUNa1 +EZaO3HMaw9/MBfaJzwFZz5WctcdcYQot+am3LKvitCvf4nCfgZqYkxml5VIcp13pJkKWgfeF+HNC +XnR/dIZ6SQ0tWSXKqJOiqUuYt8I/LMmGj7bHoauJaugjk0SsvxEZhlQTWee8fHmBfNrlUFtyTnoX +4eUM0YQM+Kyv2hyTzxCUPjgHL+69+OvKPMX52yFpeuT0bDXtMSnwXGH4bh+8cjqrFPTMGAUcjIV5 +YqB0pGO7rAG8eCmApOSrGQXMMiG5uUJfw69GexEtHJB7naQ/JUw89utWneQGua2l4ND/cEbPPq7E +A0cnMQmOsrpPAPBP2JzuvLnQJa9y3gW+9RZLB/tztmIet8s+AoZhHbbjO9M9eWBM1onYEGIJHYxu +iR+vKYfHUiN+ZqIEJvS0TY9hwr3rO1hRV4tQG3ms55SatKK6niDfHzvHBZ8kkaY446sR2SzCeGBe +DLquYe93f4x+M1/qjseas8HlqGsEPMnBxTgC45k7+2Ul5ku2C8q/A9tWDPfJ7YT+YkxYf651Xu4k +GXPRbd8Ak2FzUY6ndfL3NQKkUBElqQsQindXul31DkkL36u4oyNnO1Oo/cUQg84Klzj6PEM85Xp+ +2f62pgWBHcs053/6sovuGcOYpMZH1nc2mwTjvwmNGAIt+CkimNhm8JmsZvWrMQg3vdDj0lfrLig/ +hp0Aj003ePziYdCU2gZpVip0gDGfgv/judRcc7R2lPEszX4EaR967OCN5nkSC2CgCjSIXzHQWNVs +GrZwUBMPOr3WUXSVpj02jsTk3zFPl9NkbxmAToWsAYCNfyGYZIQQ0yBoV9TMU2R8qe0EE6Mq31gF +LxmijQktt80qd4HH7WYGYWtEr9zW5FPWrYph1bRLpBF2OuMf5Dk01aVnrpF62yKX+L3ILkoOoxZG +/6MKjK5q5P0y3tz/cH1Bb+rcNEr/wD38+f5CLXPywT0cxMni2XqFi9KWdEOwgsMVKWp9eMicHMnz +DnL1ZAiTBEe+TUlxMGZ60ZTfUe90QCjbML2m6z4mDDIyoIYJ3mQrSezr6KNllmKruefZd4xff/Oe +fm3AEfr1nVWoE9JL0UOziJSuIOvBFGOcqShI2uTBEHC6tDCwUIadp38qKYNmPadnFZAMIDN84KHG +XEGW07vNpuMpNbe2gSSMvequioGgWwpdPYZkCXOBDilTnHrewAs5NDh78iizz5ZO8wCpi0PEDTls +6cCMaSJBxd0w397K37wfecr6Kw95DpD5c0yWuK3TMB4qB9m2O7A4oPeEEypwo+1RdEZkaPnd/VE6 +1mqEN6mzJjZ7/qCvF+uIbLASA8vwT7UIs5KVNfgiclp7JZxK76qB8fjN7nPGIbJCQnX8x02k7pbZ +w0VeVCn//zV7s0ANeN2VF06vcsXZJjdBz6aS6r7TRKjvUlwBtTZUWGRQauK7GV87hAT4GBEKKk1C +CWOt9rBJ9OR8QPsmX9241Q7q9YOwn34oj0VDJfXKlce+6L1oc1NYTWFdA4ZEwq6DNkkyMCCWLSRH +xcP0BbCC57FISbWU8SsVSNfmRJsPmx2kLW9VHquf643e6RBIDXuWbR0J7nmd0qm+EnPmVESklr95 +I/EEzqMXXngk3w7ENrG9xhrlcLsZMe8MB7GbNj25NBCaUwZai2nSpCymtVC1lnTgHQV8w4vv2AVy +/h8HZBN8bK/VOWn3AbpVcm5cm+D3YOhJzm1Otc/je2xM6GQO25F3lUzi0+lE9i+PbD41OWY6lteT +JQIpy8ETUhMEjZQGhDDUGrIPXfVxDxljHRbnqnqwKBI6x5Uc3/huPseyBh+x61i7tXare42XTuMm +2lrckYu5DS2MgLVre+vuCehceY3nXMdQFWRK9wqjE7/EC5BRPxrwsypXlyFTqMKIpYygzP/V5KA+ +tDKb4NnRiNisl70zaxB2pqcbqW8MAu5F3BMQtHULuNQ0/pbZK+n+20THj52KEe34bbn4VSYV2QMW +5gqUeogVhfHK1sQWtAvE9QxaUh4x7Gs9VvPZZX/Ch9uxIeTEC45hivcUWyLGDXDWNyaFgmPsfx4+ +oO758G5fskGIq7Yu2HjNn3iaXXEmSHiBiA98Q15zq0QIe1Q5dGhn8Q9L1uuKF3zKYK0KdIXEIujU +7wFGMENnsmQaV38sncW1EPMTRG3ahoh9T1k9TGNxJJHv2R4Rhg2Mu03CsU1UsxgESvIEJ4M2lTvN +MKEbC9U2EhuAfyRUPv0zaNZ0FJ25SqhT8hJzNttdGILeSMH1FwzpAE10e1pLvP/36f58/IkWlPIj +/cQJqUNKBCTPuFDTz0g9Ii3fm99nlCvDAiqdH80qVbFy/WbWqHqXlp1AyaInTT9vZW47PeuMQFUJ +Z8PTMq7RNVZGp9PArY78j2tbCta38z8y+GDDwEH0L/rtSs5xfWkApTYx9eTFdojNQHICVyHUTSWI +PLhsKty1X7LMRdn7XJlX2fDwTMOcxLIS9M6poOCWcCdLEqnJ7ZZIswvSS2aMUT3uYpdCrrDdl80t +EBJ0h/IYiFNDSeeEykgfObjzNckYX9oDeTJrktakXzy0eKvgfWfARlgJvPWalW6AUQWK05rCocf8 +VsbqfpjSbYHakLZEEQsERoK9c4fEo76gQta8s4oS1C4iunYWNd/MtiMhriKhQ+TiJ4RkI6B7P8GS +01keARb/iRw1neqpVxzYZsqVg8sBU1bTUgwlf0kZC1H7TmTzK/9mG0Jzq9V+w81YHv2v9Wv//MvQ +U7x/BV0GlGXeGx+cESvatm1GykmPI410sT8emn0WdDm/VNmQRnl8bQGXSFhCuXi3AQPfiHaf723w +SI7dVEUHUMkwifMz3kpEC7uh0nEO9n2Ch1Ls86vylDJwwLNSGFMwKYCl1mTfniePBydOBy9kRN6Z +5Wz+NIefQ5a2B8yA+IyM7jo4G05exryvDxEKz16tC1E6/OOXUcLPavK72yhZexiZLC555kQcgCAR +9zzKxgdFOGJICQHuu3Pih+UkebEI4QCVEO9KNoU4DXYW73QKaAid2Z2dcNtXJy0NiXXTgBqkEGz3 +Ere3PGiaJjSyxHP3+mN1GQUM0TuWj6D1IdqTnvAWcrvvDBk3IHcw0aTn+8RSAEo0b4de4GW1/tNC +2FUB+7HgDYdoqRy/CwitzRE2+eeWrnfszBmNfKQmoOa2VI+iXfCYDwSgTcZqWQTuhUfZK4jElEmB +0+7e1bu/2SIZbCDsJg6Ql8Y5jDCS2IzQspPoWq1GPdUc/NXcRfXjqx/9emQgbuFH2udC2SdSSvl7 +heYp3w4LIflP9TAcufA1snAWBoTGo1FK9sid5sE07addXJCrKGO19pK8u6ZqHtU31WQ8wYaVIneH +yFkJ8FnIpRSMxEjjTVXO5kXQGUllLGMMKaCM/ye6Mz8vmwJho+tnMpbSc/QDycMsFYjNgq2+v2wJ +X1GqnGXzc077lPsJm9Cv356q9XE6pSxbb7U6c8M+wh7Jip9GQnv0aB0q9q7PD7Ic6KAhP9oYIv8Y +Ve+jD4lp6NwTLLgvNtL5ca7wXrl/pYktLvrMcmOQr2WogyoLZbHks/dKlqbN53LlC98IHb0EcfGX +UuXV0gAw/NlV+kfPz4rHBBoPWbButKhJkvMbvVSzenpkFUiHQkRFJUSpU8maVb6wRXT0DM4xGlJ6 +YHZcuIvmWLAW2otisZeMrcaevl91gZ2qaH9Ovy3OpHxQa/VyStYz/+wurm0j2gEe2o/tgM4EwThx +IQ0PxqZn2Y0L+WDAWfEAGWqRnErXctO6h+VePGr+TgOl5JkRdwEd2FE7VMcr2vv4BFqxvCLI2L7U +cof+iVLh2iZ0OR19xrJ8kkNtEu8Az1KpVdwEhft+FDYlPrgy/DfP8tSFbPRmPyh69WzlTdNQwCAb +ZAWQRzumXI2/8Udd0O7YVIa/M5Bk6CQ9omlf02WROBUaj1JFUnPBFDvOkYCGLwgyQNlGRNqfkLg1 +JB/b5rq6GEbn/iHXz1XutQVdvTI4ISnuV90IHaS9gPAB8Wl5oECu1WCh4x9kiPgt+YiYM8sDytUq +AD6bG+geh9a10ywhU2AQwaOWsRw8sYaMtbIdozERFc4l02LPF+noXHjBkztsw/0M27dQNdxGXU8U +EueABwkGF4nWQYUCMBEBUlSHglMTw4lv6S7FsqxvOgnlSmNVLrq+4sh9RY0aVOaubcZsLfVbCu7E +Wz7IlN4qYxv4Mb0rBT1KczOXhB756pkDj6Mofv1y6ZQzGAV0EXnDuQmYTGJcshDoSmFp77vLN8KN +J2dYKHXHOLCQX6pw0p+BQ390RyxsF4vRlDV/sD/zUcmipv1DM1hUcY+sTo1vfCWgR02k0XZsJWCB +hzxGGhlB3T1D1R+qWqAGPgKm1j9swf/r/JDbZhNcjRYtEaa9I+yuYlLRsrAWFTWIaZSZggZIxWlk +Y/yiKaQX+OC/BXIcOpE0aLA1kMZDELuWMo/v+9dk7qPg86ZKDUjjdYV2mtFV1l+Kpiy+KIw0PzYH +9t6GJYFF9ay3/sAn7WG33xwj+K1JNrk8gAcgzGVtAFZmlic8xG/qSGgxWBbH8wc6dV8ZlKsB9+Qm +sLeQ3nlHc4gTGk8M0uYUxrcQ8ay1fiLWDCXb8WPf8mKR9Mi7KF0XOB3JrQChA2XfbcwztC6EJHyc +luUdtO9Iq1QKocMfo8M6e4bYZrr1bdWXsV3K46T1/ECB2ePABE5vN06lF0JuDjBTzc54dMtCUdq5 +vo2JClcKhYKmlFpq7BXtG+7mAQ95QO82MBrxq1Fz9j7+endq7NbCisGwADge16yXNAJfRvIjLxEb +jxs7BS/tPukaSSxi3btvS6wK4/t76cPwV06yqbinQBfJ6FqqDPw/tH9cce4+xv4h7zx1dbDzoB86 +VTIkMvTWfkAuAEUGIi1LAcQ2JRbhOQa5Gb/6YYjRCSq8zzLBdRmeLN/PoU316ttMdEmGU7hx8SN3 +ERwUTDOniENaROJ4IbPGQT6Aczasb86bgMsuO39MW+izT0ehK2XxkQLN4Pcbb+joAadaU8FC93Rk +TdpJMwCZWq8ZuVOhDi8j4nibUFnppIECe9wb4MvAuSVfPetse4LNWij8lyg1elA8q9cncM47Sxqj +dtgRoxWpDniU8BGZSvnt52TM7PTsoX2WkrepqiNQp/tTjY0822YBg32Vfe8RtdMvH4r8TIjZ/VcY +ODaYnMiVro68KlJh0Dhti0CSYscZn1dqaB40w11nZVUmzQG50Gh+i+u7VzP4QUXnXpyZL2pXdIRp +HMRnH3NxZgNTUUAZ5hgyusvw6/59KGBep5K3LZfMn/xCI1CQugIEqpmy3fpr+Fcoid1Z5uxhev1k +hPxyKa+cZ8pN3KYgX0cTaQtewkKiaB3qYg8LPWsDLhXbO+AJix/EVH0XwXwuaq3zUVpI4IN6iJFP +2uDL8BuuAZQgPveQRIO2iLXV4U310PxnQXmDIXl32ndbjAK5nilLNM4gU6D1lUGonoIDX4pbJ5KU +yewVm0TTbjuww1rhu9RNBOEdbFt+g/pci/mMjczjWdUGuiwtg+w85apvyKg/AXs9uXtFhaVi7dcT +LtD0cQI8ZcIWzWQd3EUKaoLlncOwDtvVf6pvChfqhTY55YmfP8REjaRJ0IetdLL1IjY3bso1NQtN +uftGN6Gll5utsEO6tmanjvQWZSvnXcbInH2uyeLyoyQ7eMJckoj9HV/3SgVxRLFRpud5LS3K6pS9 +QlS7O2mJPC3nL8+7XIpOXjjDQ8kprj72/Y3iW3+IosGoWPeE41jSt6SceCCJ49ysmrSJTBPd55CE +aObiEhoeeaRzuYDe1LnvUBxkHRXCLQin+YSDMQW5DoKQkC9s4XPkjCjSkVjlSyJexzuNsojnfReb +g347PAxwfioq5JTKimFkDnvegeJbi+18ZhBiUa5zQaCdc80RX/cD9/oNtluLErZSaFma1SOmUIHq ++z71h7qB5TAN/2XJDp0VN5F6XWCsG3F07OV3qTTBt0Wxf++L7fY5PZaTTwLlzywakkLkXGCiKb1r +eEQ2XqAU8yRHxPqVkKVQd3WWKdGR0SfUDqRkMHGxN44CIABwRma5/XVPR0d/uRS+YP5taY3uP6Kb +9G/ih4j2j5PFF5rJc+3bG7f64dBdmNuhgaDtDUlafVVCXIWzAxzatEsZbQfy80IAHga2tlG1Lkjd +VGfNTm/SJuBozvY7e+2QETHsPg8neoCn9YRX5Ud2WXpAiJVEqr2oIOGCdFY2tiaaioMPifReu1Qb +ikXjdut7f8y7moV9Rmfb0ZcxQYY7x0tQ+Jl2CE+KI11yQYrwKgWJjBgZiGju3gvEUw//dwZcr5Ne +oDW4h4HSUjzhpLWiXJbmwmc4SMt26EUqZrJKwwdKDOQQK6uqvH7lKBKbAAAJcalt6Vdyz74gY7Bc +HiDby7SoR4TuBIhiWuvA3e147AVGfT/Udkc1SWSXQeZ8o2RSMvQLTW0ke3MqMBKpoGuWvP3Y2fxw +V2tBl7uMmQtZmAaiz9/jC7SxO7EmoKNB+6ua8l3v3bwcAgsKnIG2tGARf8y8bnQEbCY+a01Gpzcw +lVGO4Xsh7irUgXST3BwU5kTb/PAfks3FSRtR/qy6XkEjD+MuYjHi6LT66R+vD16RKSVqEBfWF/aH +GLVrENZ8Ll//l4l145pelZGn9ktN2xK2m9E1pZykPdMsYfCSVXtU3Yv7Socrxyrxoy4FHoqorI3q +OqdCfR8GvLAN9JuT5tg+gOhfLUBApr8U4f8VCoz3+v5gD1mqJf1hs8UwZ1zV6x13ks35MFf8Hpzl +GsIfdJxOMuf+T6EhFotGlkEjRLS77KgoBxMwoCMfI6FtjQrI6wel++tO1AM34rd4CMJXGTQlYbrl +MIDm/5WaQcdLvs1kwZCBNN6P73HHFm2FBDkF+36Ad/InexpuxD3L9d1QDj1svXTnJ61u28Qy/7az +m3QmbfiQKC3yy98WaqnVkXBFGim2NQHFXVjjQlQC0vzkJTKRpkyAdo1BaQtztSu1NDFfUxpu9zxz +A7I+BzaGbMKVMip8WLe2sRG7KXP3EasjLoFGTE0Mz17mjsbSBT4Y3VU6bzCG05uOT51oWmv/NyD+ +JrGmuRoKrUlQT/sXq25eL8nxWk0g5WmZTWR2Joo125apXxQdvFlGPsPuE3uy837RoryBaoOjqUbl +kHxpcweEk2Mvry8wPRB0ahxwMIERmcGyu9g58MFi8y4a6fy+85iBmEDKWRlBt/iWpqwI6CexgC65 +UtGnoSOOSmNF+bENkDyd2oePSOeUK0pYt0NjGUYumqd8ReaLhnjkwEytgCpoAiiwMG/nr3mZnGku +MoiKZ8GTI7qFMRi6+y3EUC3+hP02gqzAlfrBISMt/JJUW94Z9qCWnY3Ilu7VX1FgNRvLcDzwEnsD +MESumWAOXYqAZGRPdnlVi/7e9IYNn43+eAZcwjNPl9H6QR/mzLDHnsw8gl1EG3RyPz6Abf/+QR0Q +pvbVZ0gEerxlMtNAh3OFUAD/5ywJepkUQ/zye7F/daH8Yv0Vh52sS9YTjLLLs336Tlxs3c2jhI+p +jbzqwCsQxgScn3g57RPZPtwVeNLrImue33SI2B2fk4udQHAJqf+MQWW9h1Y26LeWeI9ZCTvQ8rrZ +zZ8rWFv4Tn50ofaFFyGRxpt1l6g/GPdlErBfRS29EKL+UT1gGm1vLx65318/r3W1jEB6DZxvb7az +mWZXRGPNFbcXZs/aOcgex2FFeMPTKnuiu86JQWsxBZhAMJrp09CSqd0umJW9gFEaircY7YhUgjtX +pqPvaiTOKE68vng0OVjQC8dBLwdnfFO0kIAvBjgvdmeC1s3JTFsT346cUS/+jmD6PRPTdWKrMzBM +jNZqWG5Dt0OrpNS9bxLmc+Yuy0TWE37Jzt4UaHsZPvGWKM+W7X00GwFh/bVYA0fFrFAqX/no32kP +4gkOoYpPMa1OffRzMv4XCbbzdHKHFR1Tv8QqTrvL2/vTNDzUC8SGXyBNXxEtqs1g/gFExUz6ucSx +V1m/XQg20yn28i9BKZI6BX8+L/HeKBptK970uV+pNOx5iC2eUFOoWKhSbpvOeNWKqcaDCh9Srawl +46ATGpXOG3QEYHLZj3EzkSr3IYvHlCMN9qtzm8XNRCRaOoUqpc27lmc1jhSycOHf76w2xBRGAQ2I +7vLkTSu1Fam0UtdEQMnejlxrrzaH0jzAmqMowBn1AUAQH4LvwU8vkJp+G1LNxW4GCgBa9hcbQ4NA +GHnYHhVrqnt08IYmNCAwqPPAMkKkWVf82FFjFnMdqd0W/SZL3Hr+uq9XA7oh+yPjahXpVqlOnYEE +Vk6A1iIQwgATOZhTJkTUNq7ueoXfpBmeri7Z8UU9cNx6lxp97feQhXrHsHAku3Qu6H/pgMZnjFdn +PmxnxPghMyhFTzUVoKc8IEa65e4mn/9cSrO9sxmIgN7noUXRMpkhJIk74qHmoWeUrmqh8RmpTkPR +QACEQhT264nW78c2ULTe+hDCt+gG8Xlj8Y0PvZZ3Z+BcYanh0UrXBrVUe8nP9+ghhnYR+QGUd7u+ +FNwgy3abLvcG2yQlogQMFAu69xrGEAOG6s+K8AWdtSVet421VGV9xpk9jEN8Ltz3j8s+vCyXh3Nw ++hYt7ChhPK3g/6YGdzhfa8zyAStAtzDSo6/5EMDeUG1xm9/IeFnS0Lk/w4FQX3k3Xm8iYhMmwThT +fqQYqJfAUR8NdQ6jgAcWpycnsSwcD8DkLges798WJHOzo4rjRhliFhez3tUHoGqPVazoYpkxLw9l +W2iEQr+QXzIoVcIcBXOqL0ulhTl/qXZDtmYrnkVyzKuW5ebEnWITHk8r2MYBu16OgeyWLjqWUrqM +J9v0FcaL4L5kfzn8VZ1HN7l/muZDUII9/nOUwoWRJvOvAYZttzdZKt/799e9yLf9RpwH7KyciyPf +g3LqTcucRlde8b0S34oG7sMDY6daPoVClpc3nU9xWWfCxUtOU6jnrxBT4T5NY7AsULQgFBjGx3WQ +2O+9Yg59CBtElwp4H3SUvvpyP4nCyJNqHc2NFfDKIm3htVEUdld6GPp7NHgqn5VJcseZ5auOC6Gn +stBSB6uAiXN17ectG2duYMeSvc5TWKUZwLE1Q+IIs5KeykOEwBxux8ZW5BvII6WK4Zxmd8Bb2A71 +dmmLSBj7duMtDgnt37qquzm6SgLBHcRdnsWNu4QCFDG8yRKv4eGrNoQB3JVcSiXcQaPawIoEcbce +M6HPBXqjgizHKePWzCQQEZtToN0wLx3pIGCTLNOxHbIUvOv99AfU/66NM3+dUaC/ATJNf3rGqyFo +dfMfqfM2+Bd6gU/fZIFkX+nnXeU1WydJPhT4VnFdLaMfI8ZHqsYnh1lChpUIDGMrZjTcU5tgugBE +k3ZIf8LOqC8VMRgRPPPYtV+kVmk97i6YcU6BEVuxZgYX/LHgxYFfb7ig1Ed/LRwuZbwggZuTURW6 +kQjMOzaK2dVCX3XOqdZ23nQWXldxOEE1B2TaSmOM6AgZE++Quj13QMvLFI17wj4wbwE/8X81nCRc +QzqmRzNb6C59Fo6X2tpTjlMUAfxQY4vGoYjYurl3OAHztw0H4S5g6PEXl7F1pYDQkVXQ+sb77MYb +OfpkY8denR3uIQNaMHUs237/+jAgHKQ03j8JjJD6XgRvzvwC6sa7nSgCqG1RD25ifAS4eYvI62E/ +HlWaJMtYrzu05e1EAuVZ0zNmGhDn+0sn8wCWrDe2KF8nZeTx8IrjWcM4RJ03fw/BRFZOfTCa5N1o +IR9Gv2AMtgHv2i9Lr5eVPQUDrK186D+Vyj8bEZB2cxYTcyG5PUTM4T4Cgl4L++y6TawxoZ6/YboQ +IunKmUanr8SdOZiL2ReRtmmbLXvyWKcKqKsueMvetDQigMobqvv7ey7OvrwQ0Yd9+GMG8nar/Gu9 +tDW00Qv4yw03NgKnJjpyDkmbtV3/GHFQROGEAs6OYbblIpFYdHDXBjKeLH/0CIfLSFj4DfJSIQ0l +BhuMj5T0ldhn4B7N4MafLDrjfD1x15JnMUS9UI+Cht9mEhBBOwLdr2cycGJYB/j9+wFYaP0BVxjW +Q1603AgKlWPX2QAljSU1YuPBbMPpq17izBYdzBHlYFskHHXQd4LRaaBh9XHu3jwL9mJa+QztLEAs +r6Jno2bjHAVk5ENHwB5DoYNcCLUWQGVMuvk4XDN4ZV5/yPjDGECA0ZPaUJr6XY3tgIiG7tS78VzK +vVyspfjZBq70hB6tfVbmyLGAhEPudChx6Wi2IxNrJTujgEvFj+E/XPMtwQBRB9X/zdpix/6tt3cc +I4u5wvoHV3LLK9J7e7A2NiAjsfb0pc2F3EUugUTGWlqkbFXJyzEj2BxmIyhTUom0ZEVGgLagKHfU +eMgw/klXLeHcJZzI2e7YxSXL0D5IV6gL9DQkPZnIkOkw+hwF/nDCNXil056aqPHA3hj4lEt4jsYd +jMA+czpB0Dpff5dFwuxS0GKdzzJtiE8/1HAFpa5fH+gq5jA2NWO+EnWeKk3ifcgtNCDqY8eUUMLx +G1crTfQfIB1e/GhkBgmFfgfYflds0qAJtE+Gj6UvL4c16rojIxl1RUvSB/B8YTjz8nLSXPZ9q54H +EOPsLee7EhTgDpuluKlXA4Ct7EMRpQxIrk3/2NewyETOGotXFNFB0+04rlkoGhfMQkInkz2Rh8P3 +K4t+NzB7oXvc/NE4SF6xh3xbUX/pFrdy0Bt4t/bcZM/fojqIYVuCxvR5YSUfyZhgUxm+zUZ5Ob+D +0X4mQk1J6mLKi1EnoQ0o9pp2sNLtv9pWjn51xXqiTeBgvNQGdiWiPOXIGdw5Sj/EPghK/Fz7dxld +xAVU74MTIG/S4MLbiWaz+GuosNoJlkL4LNIBTU8La6cYlUwyoV7Ih+BUaF41V/k9RN7dtMICt31d +vuLcv4vRZHCXMM9zH033TbY/SjFAr9BgL3aUJ2RewhV3kir/ZKFcBFRB+5oYacdRi+XvmMMOZ0Qc +LsjvY+xOgYS7RW6VwIWQvlbjk2ywerYhzB7GQKr0rJIggjPFm5VIRJ1tsrCKvN8ABQ7MSurWfd1q +hCPuTnaB637QwOIyDy29KHZLdHGmfdkeq+G/KFvz//XPZZ9+l5HpqAvbH6QSdkz6UevM5LyDwRcR +oj+l1v3zi4jRYXOlnKer/FKUE3czZ3+uqQF5YIMdcWaLgfg0cerfc9O1kdLH8CAD+/M56/OiHJSW +dZmCVqr4ezIFQYxrg1//xfvVCjJIoTumeObgQOlclQrsTUZpM+B8b8VLjmO2z1ONN0svuUGHmDVW +bbabpWtqaReZQl/rHhEHSIdI83BzFudOCsmzHkwXU+UHdK0EG8Bo/u64mJnZ1lj1nfnfd8E0Osb9 +ZNBaoLHnF6lGI08JxR4EPvoAwnoK7jmBiL8uYZilnqzUqzPCaBZUSpqZCg4J6Fp9onzeaFd86X9e +1AuIyDbm2ZEeDpZ018OWOVMYVvLfSwcwuFjDw9pEyypfpVua5AQuHKmLPLf9Iv+pR3Vf41cEm39j +BIFUUMplSNuTEs1fO4zs5BZyq8baLKRBLP+zyhbHLyqYcjp9tCScZ0jYu1QiVwDAh4kHiE2H+Kg1 +EMwJd9f6parbTh79Qr9pNZVJzbotA43ojwXrfVf/gzuxXdgruquA9d/LO7r3I+qq+1ZAb6DEZd9Q +9GX6hL0uGC1tqkfb6GQ0onou7ocv1QhD8Cb2/7TMqSJUYQGCswZeOm3j4gP5+6RK4mEygrPA0VO3 +oWdQuBTUdCO5rkPXSzFtzUaRk08HlPM0RKUeOWKJKxp/v0yW1VdZQlVq3eWXEYy+YWDqBldlAfSw +rzuAvkzIrlwdCbL8E+zb1oju9JqgV3PB8ZTWtIVY+s5f7YRuKSWdsM7ffcE52sO+UXfd+VK6YX8W +ZIfrix06N6w7b8b4bKe1W5gn86S/Pwb2Inre3m/yTvHQe6No0+coodnNslo/rpCFniW2c/rWpkyb +JrJhAcBsrpN7FLkbLcUMrB7r5WUybFMd4NRtdQVLHEbno8AO3xWRZRFVZopCzLCUa3GL4DoiGjl5 +30dKtoPYoo4i/E4qq6xbDAr0doAadWCLvLrDaoJuxqqmNPAtNgRKywx0vU8wpWVQ51VR92ahUcrk +Qa/h9014MGuLA+GB5yJ8kbRMSVDaybs9IpRw/aVKvzWc2/VBzQyac5EGyDx3WUl+OBDsjtpWcWp+ +YS9SsigMtQsgqdZVm6QB0ioRk/zooBx6blIMNhUzJMnC5SQZYYKPFJxpfc7KiSGy61knYqYkjuKK ++YVDsveDAE+LR+gqc3sbx/ZRa9qRU/1aIRezam4o/Axn6PzGoNApZ5RRTGAvfZ0ya3kmAaZEud0D +KHXmEqIGlXguTADB+CxSXUCMVyVdEj17eoTnWVseWzJHqH3u2JK9Hq4cMGAZMNGqOFl76Hx5iBN/ ++6c5Y6s3TzX1kNgPDWVEtdqDcTLy1DrhpN6P5tucDUxffz6p+3+fmuWVdk7zwdFgZ+BXi49ap/4D +DWuawCjXiRfLI23hGO/OG2NLAeVw07eFNkW7Lvh9QAYGqel7iMSLWjq+ZAbL6gDhrTUg0oECfWXo +ldWg7KaQQk5BBAr5Wc4yHOVdd3l0fU9tcLPDmobeGzY8e5U1uv79Z9YVLxOkIAOyf8ht2bRb5XCm +M75x6Dcq1OlBrlV3XDNg8vpsoJuEvck5uSf/hN5gxnHt56/hiWizYoQtJhHPCIPLSdq7FuN9dFbb +YPyYTL7WwiRsgqKiImI/pxIhxmCmn4iqA0WARpDgYYqijM/pib6zTqrzArLz8M1UHALR+3AAUNE/ +qUUiSzGLAmrtJT61iDLWNga9VCHAagVO/dKfVXEqK6muSLiaSnjlrHsA+QSHuf907W9qww2nLVfI +IKUce5I+RDtWo8FucC/g6MzhtTyPJpmq6QYx9npgbyLsMlDQhIEkbQgin4hRW/8+VNJRqKr5HT9S +EdV8OTaSG7MOfalIbKFz7UPgF9tDwoWGyhu7cw1r5/QUn2LrOKgCKg0Y2Cou5ot8qdcxmHPrOKQb +29F6B9iSYn7IESpaHTj84fjMOyvgxR+j5W+UMmsdBKLNTZ0af05uNnxS146kLgIYw10K6nBJjDNO +7XZM5G1Bbwey2akM0Iy0J4Z13qpRzdxuzgqHMPc7rH5lYbiSWMS8mukacYwV8XreKlqOGpK+vPIO +aRloGjpF+G1SRuDrzRfwEi5yThCDdMa6IJa9+1PmaFfi27qJ+cnhW7RJIHNEDn4d9LSWQHHtyEw4 +7BLV+rRMl1YJ2YlLSSVblFnTcw0tEwVmexxv3sDziOO44lfORrwR9r7ehe/1zHZK+O//UIWRwdDE +nNPw0XTUrOP0cOy7/GbVYmYKtz5G9+vwe2fCYQmAa3V60SbXN/Lov1Zvg1wl5J5fNFeKkKsVL/Be +8Rr8XIr68eZAfaUmNjtgnNWza4vCv24Mm3rymXnynbOYBXwOG1g4jgl2+VGO2qqe9XTYJxkNxUZ5 +gkyd5pgfgPZ8Uwer7q8gxgwrDVlp2jg5yviXApVYsAY9vUaz9Y/L6+QqCHWLDuImSl414eOBDSmw +upG/+XuFrp70COXDDlmLAEo40KZ6hZZgl3XEVMXAI3BuLNCjG11Y2l0l0RucTILB+YPAl8QoooVt +ch+5szYH5k50uMFppeDS6Ydnc11TZBYYmzyuWHGPuS2ADYuJ8Q+Ib+nLzrdP9XXbW3KmprlC6s3H +N9BJgZaU6xEKY70R3YwmDkiircbo8+VyTxv1by0PcyPC5oJMXGJfIvbSUL8tcaej4ydeDUiGAyze +2P1j5+c4+kZqHgG/wKzZfw46DolUNRvFPkqs6M/nStleDT+/L8Izaa6VXtLl4JXAt0aRWRB4FROz +FkoXoWPT2VFYtH/H25nYvw+fbfBa0rZ/AE1Ri9cP3ayh62a7665iOIqODqyUEAEhhHy2q2QpOffq +pDtf10JLcgkOUU0mk+yqJ9cv3isksbJxh8bBaulgXByA1po0sbqCn50noCyuJDQiY1sBBmpzE4OO +rRDXgtmEbv5bXa4i0deCQI38+XBmG3TjRH18qC5sDg8lFDmlrY0ikXaII4eoJMYtdnpk6AEf4vAl +0O157fN/uC0kcKtTboBoO7fsV1gLd1LxjkjsyLwsloq+HO1srcqEks+mn7riPCpFVo3nTDhJaOk5 +mIftUCXIyuOBdL7GyQryua8/+J5P6IPIpfLwHF9oNpkBB7Id73hMFi1XtLwekcuhwYa+8N8xUHF6 +GKaXy6mz6SOJR0CttIJ4ng+06kUE6F389S+39aIig9MwzqMhDMBXElQ3wv1wcTayv0rLZRYoY6E1 +Alw+QMxKXEnRcSirxnVlPnxt72cdydlDyoYuatlgQFk3HKLs+dHtsSwUmDYBoVeMqws51ngi6qOA +huRbenRzFfbKpN34exQuoPgLyrNJNBn3YzfgcRPhSWdD2YGZ5t1uGOEd0ZoBneyCY3egmLMXcaXt +5zf6hwC4RHuzdsY6KBjN24LELugrwxssqjShfEYyFjbzm9/5EDMyJanKFCNgfX6A+qYmv+3km5HR +Tn1uH5uyT9D2GPRHM/tqfBAi2k1kOT5R1fL9vg5drKOGrmgELdXtZ1YuVhuiCC8Bf0T4wji4TtQh +OdV3Enin6FBDld+R5hY+f7B1rAVaJPGPdyAIkZmi7rTf6sjEKCD88HUeTSWSYw5qo6FoPwLSLbyn +2a2vxTxMnDfwgpY+lmnn4BI3dpHh8utfJyIabtpeJjN5E5NCVCL87r8X9ov5/3BUOD43bG8/4zVO +5bYv1RgvqITY/44hhhOsmcsLg6CQSOfzx98GvvVsmS7wbRWo2a5usFhAMYPx23wdNIoG49HOB9Mb +MavMrMciEllzIDpgJ1hWERj+RiyMzlwOArMXqO8kTg96h6QSOJ6S2/OSjKW6sDQnEcRxVeQlH7mD +DLqerwhLTkEPSfqbgkXMqujftvLqGASfCkU36bitHHQ54jMKaSfkDTrYJ7+hHY48kMAc9zygWq// +j1R7KAccqqZWddN7Aj5EEcB14VOzr145HBnyDLAgMrUN1BJOXEqh2Y7tihS2Dz+BrR17k4VQOddH +c5Pqx6dKdDI14htwewxCFpcBXEB+ySLshpjYp8GolCJBzQthOUWNbIvwhlfbbqT9YS+FTtHB1xlr +e2pLGdkI8o+rUoba/Dy9pj0+z00HGVIF2QeQ53h5/07MMjAy6Ih9mdGlIIb0YYLR9tH07tf0CR+S +L1aJpBaS9fOgI/l0j3klKMdIStt6YReEYmHVAOpxKBEznc7MUciHJ96CnOoKwZlCxWDZN7EQgiet +mBWF4tOQSfqombEw+6whSf7fmWtdLIkJU0KcI+WqLg45fTpbxxYij/WYGPoVELOSPRez37uuUt7b +QKbG4k8DkIKhFVkjyzxbziOfwCSGyTRBB7IB0sIvCNzSD3rrwRuaWzMLzucN3sPH9Yj3GYYgoPNs +LqZscEI8yzrGNYRg9qwSkn0v6Xt/nehtBFN14pAUPzwSihI1Sj/MD0P64Lzm3lcQHPpRzmtXi0+e +88D1Ue0lViiqzmxyduN8HHIjR2Bf0h7KpmnUjRy/dd1ooa9wJ7dxoJjhAIRqQTRVoG4aDTj/+j67 +bXAygPh/5n0SH+BFsNUR45q4yxAOpKeH5qH3sqcqEeDv0pP7zT3DxMUZhPhj44KQCaTiM9/xsASB +xsp9LcpC+KqwsdcA7DWuxdHCpahrmidQw5AiMMXrY04L3cqY4y7FcFXcoSw8gO0H0RbXGHGUEKlX +I3asSk8m8Y/kk9SYnN8dw3hXTX6yPh4KJEDxhIrypDasWriBL1hUt9IAnK4AGXeaSlUqUDShKtwT +UEK6RZA9UUJI7TpsPgHF7ott5H4xViG+/PfaaB4IvGqFWYLVGjt249JfssP+MmmlgRGu554RvAcX +Q3r54g3IwNkewpfLXzaIw1lCGJMf3PcrrmJD4KZvCKI0x/of56inxZO91O227ldQ8sJsltTSG+6/ +1Mf/rXi3qBhwidWct9eZ0fMIwtoylbwp3+VWgnB3k+ToeWrcscqziGv5khKXTOhCkkneveAGSMk6 +BxfrUKAGnsUHBY9eysonBJVXjzN09Dkoo3vaTsXoU9pudkAoK//MGxWL+WRbNsppsfEfqkuSumGI +si0yfFIW6WJiqPBQpu8UB7ZmhKt0l9De3ZZn+ik9XXMXNWVwFeYHesUMGc/nIQAIQk/ehhlVVLaS +/Gwi0fQYjzUEwSGByG1QqUBtclMLNgiGFJo0Ju+fdlUNRoEzqbLHFiCRm1cLZ8vZXwJjPIzp5t1/ +zJjfVNAXdyTpQ8EC8wNguwSv2xMCCOOyhBp2Ad1qnuZJ7tT5ntJCftNuUt3CbyGp2GkW2+myvHXr +TMXG3TH0kIwS73VQ5VOyRNMhUFzwVJ/a3RzGZQY28qqlZaM0FyVHrtm1Yja0V9XXGsviBP8Sx7Qi +B5wc8odzA5LaJCXJOff9gRs8DcsgyO3Nm4w1E33eYcSs0ipvsCwD7vN9IDVwlRwxvHgZGGsR7tuL +7Bz0ACRMBK+BWk09gVG8M3+6061CACH2ZyFSsGsWe6OWwnhr5qXyrWHmKT3i4/xV52S0lJWZ4Kcj +lmTKSgm0tiIIYxCGOkWKlYPsIPJq6B+mQooLCWAS+/aFDuq7cCeQ8IW3i5Ip6yZwN2pOVG0kh6q+ +wt/BUPDohQrCmL594TbuZUQh1PG9F8OREgS/jTVNbYUr0zMIM+HvYje+/MeQSykBrR+Uw5hkDTJf +syo9cpEvmCJvRspsI2UTQhVR1ut9Cht/x4HIiU2tAelD1I8ZG7Y12AGnGycl+X8gnhtEDFit2k+Z ++q1DeiB8az1PZh1ropZL5UdFGv+/GWKat0QohlukiHmSSbPCrg/bbQR0A+G3K7xHcTtSSVkIxMhY +WRbYrJCOtZNCfaDUHvTZ11Ly2U+RpY+bfNHny2CXlz3wTMkfihPmjTv9+q5Rd83CXrqlB1OvRMSN +IDA4Yt/xGr8MA7tEwD3ar/11VbI22fI9z3BSU5EVxQUbbCfTifkJ+h7tUzNcL46wrFpUqdMZi5Ea +4bjG1kEtSDFa80aYGLwSOMVp39pArnNy3OS3plu2MASaLZMQaSyYfkDIHKAm17uvFR68M8hqjorx +T+9K3a4IhJYcYW/EgVhyE/DlV2/zIN/cQ3kpj3oaecpqJOr2Qgcf66pDYxQ/+SgsNIEA37y6983F +s0G7QGXfQeDcOaGv2QrcTo7uRjXbtguIfNM/AROuDYwx3wQ2yhGPdkeS0MUqyNnmvKdwYfatm8Eb +ETpTnJ4Z6JkpTR4Lhm8OawnuUrvQuorUORgGrcLt4NG7jSb8zBk+EKlonLAaLUB9VHhjp6yA/krC +MJ9BVhUSxIAy93DLkYAhlU50tsuLtlUlvYYAhRv1HRYBcrhByRF9VsY+nMsZ/5RK+F7Ai9Mx3rKc +JrwqVhPXFQLph2HS940pnP0popE4xGvbfS8zL36x2inPevfy233JhcK3A7BIYGYPEC17smK4uyZT ++1/29KQwZRfA3yXHfD+4BGYjyGfwGGqOktkV0LwG/11nLgNh0pWFtchZDJ86v734ZgmitinG+yaW +vxasGQJQKuScA1nIYE2GgpZG4DVcYkI4XK63uJA0W3iG4wGWXoTi1lUDq0oWJPVYX5WeZIzmG5Z+ +cVIsTFqRtgC3pZjPWfSDOnYFj8blI2njyKSIvWBV/WauunW9FZ+iDCJlx1+/nLVEAicn6w7QNoII +Io3limgbPIMy7k0W4xBbvXEGZbL+jd0fp2CbFRSep6EDNCWZ8eJ3lYPHjPz8fIYGdgS1DJIviJz5 +UudBinr4Qdu1UqCP7eFaOGlqvELIFoHSbTtJTV+GvUslhk8SeRxoyamBakjpwC991Lb0zHcMdafL +vogp1+l5adm8njgAE1C96iMP3fWNaeZYa9awmAIsXhbexcFRNKnWiqqouAbShrIlftk/Oo6Cn0i7 +cJ7P85QIDoZ84ryA9nfCS0++fAD8jndmj18EeOrkbT5timLaOgqc+imWbyMzdyj/+phjDjSDG3uP +sn+eUsgojJyhV9dT+n3oJMaRC4zaq/TQapueeJVZZhwgez22+llC8IGOKyYE2od0iqSIlWaDX3bo +dfGo3eYELMqJGmI6ZOk82A0QhvBM7lJ6JsJTJMyrx//PxqSNJnHe78TM3CAF1nKS6GLIHzhJhxM8 +oLGF2pNgE6tSei0LUknmOSNTSN7r6ZAVvM/W6wTaCMkRJ+Na9knE4XEqdFOGLW2tY4Y9ykRnq00C +mTnpcGViMqWyPDrzue6loVqAbax3Y1uyY/NDdEguU9kdW0jh/sLZs7pqBaUVcRCLEMg1o3dGYqdq +/Aub/gaZuCBFlXvfBALNnTzTg6OoU7SIhIio42dmHNqvEHqvWZuILojQTlSLTvTKIwN1+PcDhUbs +MEHCpATZuPSuta9InrHrGnarifzwAcY01nr16Mvzi7GHv9YyklP0MWrO1+dq/0OQ+D3gj/8pKxn+ +jyaScBgL3vnzxWSL510k9u31c8/wLuKG28IS+CoWIk1UxrfM3x6hq2ATsA2M0khOHDOiPNXb65dt +XHf9QdibFRm3KqdVyP3Ctx1sF5Q58jJYcsKYQLsD58eOVouZbNVfw9m3Ux9m9uBEziZYrdWqxG0P +rSPk+667EXf5VmKTxiH1J90FHq2GGI1huPGj+28qn/qfkW7uoN6v2YxEU7XpqatefLxvbWj8IMB2 +LozXxjSifSe8KhgndBVqnxlcynFsNMi4qUBsMJc0Rozo5ewL/6Z9XG/eGLFEKA2BkcTLem4gsgLN +YbzJtOSIyQN1xWN47EOXOSdEISk5cZfVJKb/E7LuxSUSsgHv4QJaGY9Z+tti2AhnvD867F+LX4LR +SMM5kP2Kh1Thx/pGJ0LjnOSGZx0beXKgOHwgIC4XYFjR6bObkGK8tm9ugTzxiOnvGGhPGHRO6vSA +gBCRztNc9KgoUE2I0DCsprLZi1gRkgK9WGntzmZaX0+dhjlSFW/GcIMHLbhQop8F4ttp/oC4ip5F +r93czy/xeSG4w6rGjhc4x3tBs5wRfSptC90+weglOCH6djNy8IvB0Sxi1YMYLnlSiiwAIerYKFVy +aO25qWWxMdkGOv1McyEgthDbFB43MgLsHYYgFKHoICIOcndV/Mf0C9zAO+kY4F05tZBmy/ISMOwA +m+SENKHfngM0C2Fzo73ng2FG1UoNq1io5uGFj3WK+c1shnTji3rCmVIb2ASVUoJ6zoWCmkPpgKF4 +1j/4CRxPaLau6q8o6cVTC8yuopM7akDP09Yk7ih4dkuEvuV8AlxO9XWJAYdTVLkn3G0hGqmVnS0M +IFTVlWMyUcPCR8K5S7ZcTF8UpOdvrE6hJ0V358reaKqLqh5UYGNfL8JonKGaktykBI4BShU1merB +CRI0mrxVYWp9ssNvbb2A7R7Z5sMWlizCOP0xna9xpfGjMJd9SIm+wfyzA+2mDYVdRNyORBxurBzF +qKVgQ8wP0inHVe2pEttKRBpQhLFlSMP5FyvGJOpf2fxlhad700pr71LhHMMMVKzMq2f3qgItGsy3 +2cgSvWBJIBVpPerZkj/8Y+DA0Pz2X+9RW7n/7or0DCr1ldArGDCmghZbWk7djxXidhxYOtGrt48X +BepzAl+eymbov3FzJ+51rkR4/4TtjH3pKiGx119GohItccxWGi6m1+bt4BdBFxF+hDI7wK+Ef+18 +nTjLb0qBwLYuhkeZKJvUL6ha1QwFgLsvTJCOzVGg44u4cOMIlOAJeACXHxN2XJBOyiWL3Wf+jt6r +N76UbAEXI8XpoII/UHBQsCjH66WFVR3r/TnDbbPFeUogfu2RIwewxQqcWYbnluBppDBTuGpPt5Zy +x0+LCQa5tdPJtFni3+VwmWhxGU4u56bYK4DVgBB9+daDqeIK/xSWIVxUSWpncqAW02xffJNDZPFe +YQ6gjqCMRB8kpq0yfJZkKA9TLZDTJyLOoMOU9OPSNaiWUahKpJWgyvZw/IVsp2uySvEPQeAhivAS +ymFn2BseeGwTmcUvcxXTgg5SoDrWeK6Ni8mn5zf+UNNlYVc/LxERkxrdMoKj1QVb/yHcuMfglxoB +63gAUgo5Sm1nLw+s29q8jU9cl4eInPV1iOeBCa0sj69Flck2QSAjoobA0UN41x9dOUvOagr394+4 +96SCjH300LAE0fQupEKXgAwnunxa35pzLM0530u8q/OrpH65tBFFc98sT1WT1Dos/0iHOTN0jJgD +YId7RDJ24Ymyfl03R+Mjo3/B8hupfUBPAbmpZ6FqVWH8bdfIICnIXvCC/bsDUSNVNb5J8D3M/aHB +hjG7V9Ag+e3/yO63OfS2dzmErKbFaE/NRep8FCNeNbx4aCLC4UxJPCBhewtn4cInvxqDv9loH5oM +SVa9PHqxnM4qEHaFqwSjBoqEvSUE64IbcRjiaZQM76vVMJyLFZDV8fTKlJeD7XeGeceo9vZuYS25 +0wKS1SZ6Z75eDC7HU9rp91P6BSH5geu5DAWAwccDR95DDTED2VaRDWeYNpNi+BDtlVCAjfh33PF5 +rH6yBg1IITnn4x1AU0Xz5aYsKVIxKbaU4PeqXZPfT/GWyFvg/rSqr1HhEWb9D+rpQ1jNI34nGOy5 +nMXnOIn8Fd8ctL/IenQKppfKa9bEkkJ6NaSxiK9KrjjBLWzZVuuF/sKZnPBTs25AHsS3aLbZpeQN +bQQuSZ64kSi5p1SBrdVzdwTSVSMxgScrku8yh6b5ezBqqrCf8sBxMLNR5tn9CGNHrzJSYgxRVOds +2glGlM9xSJ0yrY3zvvzT1iMY9gerAKcvMENyqrL6zUz3eRQX9VH87c1Eecqk17EWT60w3Y33RWys +Zfnuyy5VVbgTjnMu5KjU42zyuPos+RARJuN0XsEGf1JvyldLFxopSXSyRRqG4KCsJc7h9NMOGefs +ostWYqm5xYXYe6MR4hTMRDziQ5Doyhd/hCBfzu+hV87nAyB2Omv+OQ1ZXL8eDrGNMEvTAyqomndd +qhst/E6KxG2rwPF0JJQT9geMCmYqiX8wS5uo1qzJIjdBydmh3lFmY1ECblEOC+Fi96rpdrPBzAJ+ +ERhOAc4lOsebqURqN712KmKwvnaJDFo3G4JL6xu37bOtrWqe05OxPpZJyzds7M/ADOzaKOnZp4Nw +H0vzxJdhLCAO11oTKT3cvS5TtXP0gHSAQXVLKwAejNOpntkV0l8p0gWlXzpz4jlGM+Ry7k+c3wHu +9zyiRMqMesQ0uYEfHnbVH5iISxDBFD7m7yMTgpTFtYg/viYXg9kEBHqmtkkYgF53a/4A/5uJqjy6 +Iu4l4wGgGVnaR/ClKTU6xvSEVtnPb9TOb+Dimjeac9htTW0/erD0Mdc20EYx0tAS3huitpVwVHfL +PdXbLGTnAFRdA6DQRxtxuE0fhjFVrb9ZfSnpntu18vxDtwQhRjljADv/mlyt44WcWoOqPhQSdhXt +YaINelYPreReHRtqyHQ2iDv8THYgBeNqfjSJUyZaQ5gczTPVdsXaRfTyaZ4EI5Dt1CvQukAD+HFZ +sGdlpBb3M/8C/HsarcqGSFVB2PBwlzs3QZ2cN+s8Vl+86LtjRYYpZGSuaOlES5BcT0tT1BaMfbYD +1MeZ5hDkCDxu196qIOqOvJ+t4xlztVdXmZ44hfxeDJAmFPjQJqE+ZHlOR+ulSCVHHyGOp7jriKMD +jsfID2h50QbmSQ4eoxWUyiV8lTrZX9EmoziqzS1bxKe34Z3CqtEnPiTM4tI2SEyyPowWVRzf7I0v +c3BJ+/3IIwWTbgdUTZisSxhkJWVPdwXvXAEt4t9uguHMY/O13wYxvFS5vWfFS1l0fm6tHpVFeMqd +SSYj+B7MmdSRb3biA9hcKC6KG760sY4zqu/0l7ZPXgyduSo48rH17QFfYHVu3lWmFTdQH9vOHQJH +dDcChlGIADk9rRET20bvTsFwA8JTw9ux2zvv4KAAFq9Zh7S86CVrA4rMD3M2WpnlfmhPkVZPxHvz +ThIMlqRdecEQBwHmQxOvxWS2syJKarI1Yk7cfoIM5mApNXuPUh3rCP3ca7+nj7f5BurV8mlhfDYr +oUXYMqZzDypxAeGBHkN28HBE1k85e4UYzhqhzj1+dW+FjbOYoPCSrmluLBxFuuGV/1ZCRm/5QWpk +Peo88Ud6uJkRp+Osc2Qf815KWQKP+9NhnjMyZBCEHv/P2tZiRMa+04EmpCkXpdGkGW/nj8521KPZ +BfsPRRykhwSiFXbnFgjRm+7bPav0StAKMXUzFJ1G5YUqq9Hgi7qCNeWJ9uUHJBcXY7mR6j4hznfj +m3FBgkpG0pHZGQcSTZMa+ksTAg5hG7Eu/LqVajt2k+7JtxGs0le9H0PFKc6F81YvNTt4LQZmmnEd +Fgh0eRm5eZqrWg808ciGkvgG/HhRfNifMVt+ZD9I0cAo0YWD7SFS60TjoqGbYYCb2ifzCzGjQXya +7zcfVYGxOq42Tr7avuauh5z5uOBpT31hEZxAt7Ik8FLUCHYjxKSeEfIXjt8gsZOdC/3d/4HAPt97 +mYXZBZk4yuCNFv/Nw+TCBWSgfDrluyN2ak3TItEwM3PzaxdrkBlBQaWHCGzjNsm+UXAzKbe2Kh9O +ncqS9c4Ok3NtECdOrBz4xu4XdJc3qTGZ9Di4SRNYao/s98Lh9zKyZSyu3tePosVR48a7THyCh/os +lojFMZOYG72U9Owksjwg+cekbVy3BSN7DhADsVvZKjHG4VwgKaHJeqfrHKFH3EXSbfm9hfcFm9QT +txDz/2xSF3yL7f5mmj/3AgK0F69n/PEqaup67QtuzGZlypU/uNXSPP4cDEM6ZV9yWe5qqmRILe8l +f0SuJ92pQgIBK7jnvCZ8cSVB9BukoblJfImX9GbJjJUH1wcbgo4dpinjMgHt+M1SHEetdnEuNRmj +jQwQdp1gGTUfrCsr+KYNSsjMlTusYmJ0O2O0xTv0/QiZu9aFp9KWdQLRrLSlbEVVwxnr73ZsUt1Q +skBlj10C77pWbMhCDdW8wFp283tYd7CKklTAh2TQseo842PpTC1bli4oVMDWTlSJHlYpcoUAoqgR +KES63PJnfqh3jXXb41B6TfBxU3gl8CZPeUoVFnKpNnulWDuhsVsO/Rna4+rPjRCliiluwiK1id9t +VuhDuhS8ad4UHUfmq3K56tuCel5JpWsSRj2WXoBMJhxEbiTNEDwQUa6nQdwcWpbM0Jv+hu9rq/j6 +VmyFIBUEjdDZESZn0hlx9F2XHFIHjFCnbvyGHX2BWXVMcm4e1cm9rbJFnmOfOTtoZqyZS36+iiYT +S2HRvH22fcpeP/H+91UoYIbBnXGrdKgmsrEDaQ8twV7oMCA9ctlofNxLnh5e3x0njTzi+uYvgYWM +uD61xsYQ+U4TkdGT4HzWVw0ofUT9Nf3DNDlr2jakWikIF7SyFXLocZfucBrY+6HXKw0yni/rBLat +LqtCCnihR4flsF37YRrymJpytBxCCJAr38xAamJGEGmNsUnROiLsJ2zmJHukMwRKlKGd4uvGBrGL +wqAp+JqW2B7gnzoYm8ofZVmwp0bnWX3OEmfIRpM/8kMQmiPncE/dMQwLYUiaIRGLa9JziT0oxlZ9 +p3SKwP/62PTwwVFsQ1cBBFE82TP6CRI0Wj91FN9if9Y1rX4+AegcrZQvr3Juu0vY5ErX49Zkt8RA +6MIiCJLiEqSOuTb0kVrXE7T6CUIRcHx1oEYX3bNX9IN9+AdCwyIcDXYofhpXOp7twKmmSqbnoeW5 +8BlgDuYDhzUS9kfFMKRil+AX14eY6AnRX0j9MEPoBhBuv0hksi2Sz1k0XT3Aisco1ryRsy5oSfoM +sLulMXpU0gNVEjkcfyez2rl8j9Dmgrgwg9zY0G7KESw/TD/64CoTblc1J6Hgc96TilPRFzSc1TLI +RSKMbvmEsB2Ib+QT2E6rB36FuLaSmvZ5+yCuJ4c5UHhnKhbQnuv3d0Rkg5MXHCKxfzm1EcOLZJmz +axL2TtKBj8mOpVtjO+JCqFpWLcCIAbm3p0GBI1DoYganPssnnHTBH57mX+T+eEzQ0sjM4qzyqehb +SDEjGU2IFZlzi3gaXSV0e9ysHSmkwD1GxaiYzTfPQnewN1rydySby7ZAavGg6gNm81+/yMiYYm0i +i4nk/UUp/vAiThf/vwvXgKJ8gbfH2SEq4I+6TLAkdmSCbSdIgTuZrlqO6BGTrDhYi9OPzk9aHZ5I +MYBXv/6feyzppw8FaF9a2HoJQsPcVCflRQ1fa6HRy7FsCXfahwpYKqYMckYaAMRuiRBY+uJSdns/ +aVPzfUeRuHAyq+NNWzUT57TqwAX4qzkNkLRylWEc+NRD3XVwPJRbOK2ZDYaUYcxrGWbbSbpFzAuu +ZEMV9UV9lBVlZoeqRArHA2XnHa+1RXSkQsgs8nu7PAFofwWgfh0Dq9cwXDr/7DXt5LIoeQTWbdl9 +kOB26Q4K1BREvIDhoUVuEdFDfWV6NRL44B0Tzj8kKvK2S1d9m9V5WCg89aHA7Qu+6dbOFVWn8Sm/ +gaa/sJ0LLyokhAyqCzBbp2EpqDLvMh+B1naV3OU1ftApKR2aQb10vYhg8PyRcMT/gAcmhaTkffRm +Mt/KMJ6WU6hQaNcFykmQwxZtnAKDhxr6bKfPgwXINeAW4FB0Bgv43iAF2ncMIcGCM2f8QBKx5xzm +njCOL0EprdYGCJrTp3EdtrYtrU8arcAp/NzA9jL5gG1MlR92bE5GNYrjb01xi54YfDn/JC1ZkRgU +ikMb4znxBTtAsz1AtfgivX8qFoMksfQQwEnRW4xDkgsZT31e6Z/hGC42Ri14eip5zFQ1k4KVNj4O +9X87uLamlV4Ew9d1IiKBgprq5ks+2wjS1VMbksawrZY5GrxzDZZHUl1BwohYClM4NeFRbvFLhOfv +HzjdDQijgrC8K57CaBbHQZTn8gMPLcgTpjftC9YY32QWHH1dLUGtbJ7HJOBAb37klQAXqVDR73n9 +6KMamHXyDHrpWXHw3OJWyxzf+mbGte780cMclWPhtTggSguEK6pIxcfjYPVfBGNAxK3eN3O1DBt5 +OSr0wq+U6eXo5IHrDDyQMql0PYjWAHm2aVao+AmgX3WtEb4spp9s6ebyhipwPeanroXIdbbaIZXW +r64YD5+7kcZ/yVTUKTqaSbxOaUadb+3AKEQx2Pjbd/9S4tnKGKE/zRvHjY9LeDTTRMN4K+sBkmhK +nPr345OHx58oFuF1bUZBFUi76MtiZkBCM+EXQutMMrvfT9dLLTCWNr6+6RUtyfvTxpe+QQ5i7LQN +nnYfYRnrPIocaCuvmlEN8MFahFXj4KqNgnZUNvgn3oHx5aUmIiPIznj/7+CDijxfFnSPKSpgREE5 +tujAESnKN9JEgiUoNXkqvpyl9RWzwiHAO2ArrS+vj/EsXsTR0MmVcDDzD6OrBdKHT/yO0UEPLCsk +oAQfMUPZMxF3YQsLm1xsXGzSq8Vbttnle5uRp6tqgi6T0rc67QeBuooUBxKUY5GNMjzCHroR/Sjf +pv4B6TXDUrp0qxVlwi2wUOP9wnqdOpJ0SoQyxznCrEG99wYqfau8E88GofG3WcSRKyRqrUTB67Xn +QV9ErpA1OX5TPKbyMxHn/vpbiywAj2SQ4uW22cMOOuA/E3YY5oZa7THO6b0KicNtvLdpqiqBtEE+ +PMptE1TrqoPqnhgXQ7ep/5bFSyrWXCwsHBQHyclx/vMb0vRZwU7p7qaCNQ1M4Rix3J/IQB7rbPf0 +tY8HKPMeKl0rSLhREurvX58ljgR41sIH1UlJPaMAE5aqHLus/k0fmmEDhFssmulagAKx9yomV/56 +NwCSczuqxWqcAOdNZVlkVwz+Scr78ywtLgfFbxNrMwI4Acy/foh0K2QcNKu0mOZwlqoiZG+ALW6S +5dOpLzOa5StjQZqsX42y4y5DzvozJUrKT+G2x9VhbAsI5iJro7T+K6/f1+bihb+0fFwy/LGwx4Fp +x60mfIlOSNouAT5yDvfkkTyQG0kEaotXocoITmGqpmvcgJmZ3PlVd5cCu5i7+lrjE0qG0iBwCowX +K/76x+kvCMCjeZYUZvZbHdJc5p7h4V96hOD8feKuc7wMnG9gdzgCskOz5XQNyoxqQ1PZWjtE5VJy +2FhnzK8J3wns6fOn2gxL+xAojgxLqE6CbtLQKJi5m/uDMjbLlDjba/A1slVuPHtE83E+WHW5jfD4 +pldv2TQVt949gOPXT4yoG3QwLgIB5622triiC9RAriVQ5SIvmmyRc8ug3Krk6DfjEQ6MEvHF1r1V +kkHuwZJ8mYsFBjX7JtETmthDyeqqPeZZmhBX0YKkd1a3qQt3DLW3wlpB7koZIFjmIbVHT0lcaGq0 +bd3K7FW7b23uA5bqR8N+W27UaZ01RMkBmQle1Wvg1xNSzklK7wypF6bT5t50hFFN0fFsXjKLfMbP ++VPPsMboVTNoy1XtjTfMTJj3oxNwj1DuqHl3+f/JLd4gyUQ881c/XtPwDm+x0DVgHcf4MJWlnHWe +nwLt9atjjijcylI6Ov8SNoIY9YTmFQtxZq8T1h9NH53Px/xhPFrKdzICKncmUf92mcSKc0PnUGJt +Yu1jhN9g3QJX/vD7z9tTJ7tqSW4Ucafo3WkdLW/2lJWIOjc3HxjFeFaxOZBxnVo06IHqPXf5WhLz +l3gZLBMJfcr+/TwRFSIu9jYruHYWwdJwv0Cf8Rm08B9DwzRW4YPxXfeXaxGolZhgVE0+KMt6m08Z +oLAyxcjd7h/4o1Kzrrz2IPqV8VMpjvrVUlC6aoV1E++WbRjdezmRx/IRvnhBDTKVTLAkEoZdkOB9 +EIbf9ayq1Riuor54b9mcu89B0nI1XHADJYyzGA1OFbD11nW566mJWGU0Mk1odQTeMUZo/l9pSdN9 +4SrTUtK5Z3wHht4YpbhsAaq/OX1qCOIaUpGLDx/FskB8Y/mCOxFM4ETmI9tzxGO9Wvmps0/lqDwX +pGRvRsdBN1Trlf8tTnH+acXj2zBG8Tl551rFGvAbsB8TUacxa+JqrXY/wTIHdZ9VT7G6Oy5fcoZr +awIfEqscGMt7oa+QTGbFqfwMTr+qgBfjickcYTYI2au0p15XbzkHe3ao+CRVDdfJu8GyBMtQOVya +5q/6X4Sz0GqWHwHhKKwHNUH12wBK3oxxH9hz4qX6regtxcRvaIv18ztb/LF8c3CBhK+jPn5XWOKC +WwnwY3qRhN0iLHAEyQlD8TgNY4acr9IMe68nEJbtZfUKDxTscbSiP6OXF6p7Hphm/uZeQCAxWPVC +EepIEy+goWeImRTGhzjKn4FNqaDoy9VqyBwt+tvk0apqeQ+vHl8MA56q+mLAQH+bybXsrFKYhuaT +4J3/EeSQIwhrG4Abf7palnJ8XrG1XAjr2pRo6CfhmVC7Uc13CTldekWHcAyrILV9xPxN4XYIGNGv ++el3crBazOC5F9C50TpIcK3O+M74JXgLY66RjXJxK39DvxB22xC25VeTVMZNZ+4L+2I/dGoO/YQi +n89C3OtDrT7Bghbz/7jT3TbGsfUHpnGf1PHSqdOFdr00+qm3iNpAWIsAbdNrKmFh0IK2YHPk0und +MSZ4ptF3lPDLOh/dUMjTaB0rftJOvOwWGCq1aIQLCFh1g09ZFx6KA5VcuqZCPOPICVb5/vy8Pvdu +SKykfmnY6d8Shu1APwYrYQeDfisFMl9KjUvvXmpAVU8lRT5Y426KYXQcjoXPnWYWttJCNQWaAukN +6SA/ThNZ8dQU4S6i6Ps45W9lAuredQ5yhJUPK3b/6EyNLLbMUPRdpIJbmrXGPPoN+8SStQik2gwy +QvKeO8RP8fOi47jjLfti/BsE65yYLor1Ow8xFUUlfoO2sOWXoffdFXwndsU0q15kSmDCVgeAy5TZ +ZbKshnpbVGy1cqV5ibZsfxOs0i0axa8HIxxoahb8Zx7gnr+DNdsXBPFY2/BpzRwoTtkz8yGVm7UE +J5AK4Mc1yEQdN+0fjEkcQw8GF3pUagCvLVQ05Nto6+LM0WmxJZ+goN/YZxaxs6lnsJc6LZThB0W8 +UsgtQe2yFyzJ3m0Ep5nt1p7utWYkklDOCDOctRyPB7VLEFcPLrYGvgzrNa3gC9VecOUkVNhwMYQX +SqvVC4tIE3Op+6pnTfYW68zPkkbwrGCB1XsmHFJLZrxZdAfCAokERrMurr2ZtRFUp2Q6gJJHyidp +1cvyiUlc/bnU1Oi3VqXay+erm+DiBVmLpolR0B8uuxoY0WQgsTLfzskmmU/iHYExWvXa5TAhutfc +EQgTtQZ8DzLLSThwB5Aax7pLZsR/V/05A8ZhQNhV4YVOgPwGSzlYzid6fFFmZcKgbD+qCn1LXGTB +k9GkLYOKP8BSO42R51c+Uyr8yGbYRK2Vsx7vUYY18Gg+aM6h3kpFUw1UKiZgprVqZHVz+cWUGQV1 +cIRCUeY4pFSQy/QhVywOrWf9JMcybfxnpHrHRBWYjFZZqvyq6lIb9UoOO8a9ubexy7kWxT3H8V0R +bO3p/tlgR1tGGKocUtzY/5wQ4cgVijkLAcb3VjELGQ4zdpncEcDLNZPQ6MqUtQqOCppC7rK4kc7I +VfOEBUx06WfPYGHv24jlW+cBDH1krMDHJy9r/mU6GOYKZBLg8Is+7m7hfdzn5aaVkK8jvYb2aTCN +Xl3CgAhU2nlNny2l6rqaY50imYkU7fMtJFMtL5CnmrQ/ag1C1UYT4k/xKB7+/yexZRp5XkuFUKL7 +9aNfud9Ux2fSPJLtqvZUyC4OB7m6hA7VNKSjotdj7zAH4hmr3C3yjLimlrz34BEI2xmj6ooXW13A +HV4pjiRPnpdP7Wo0bWvtDxwI6JY+3F/kAEAR3VB9VrOtfCx4bFUuCnHSy8MJRn7njKTU+2BK1xIU +o+IcoUApxIph85cuBu35O+nIvEzsTLxtwY2JlDMrl9W7a/UhWsm4IxdNfWeJv7AQOjchCcKLFjYt +O/ySsEXO3dn00CucemFuLjPDfa79/IysStEGNjP9SK1WZrfcBWlFqH4CWF3M/Pyvcm54NV1yq47Z +HYBUyW2LwGOD3Q+VcReaizm5MZf50ON5iXY8jg0WKxRiDvbiDg4bgyH7NZgmdqKlwDfED5+gKrWw +qvmV7eaTn5nEfI8qH1Iy/zAREeDebNSXbFwKvWqOmrUQKqkcgiWw0G0HzDlerFb4kMZBuwC8a5iM ++ngmeoe+bIdWgzflpZru7feKilv541ZXPgEEEOwuRM/hL3iXgn/+f7UN1UsC9ac72g2eVJKnpOfH +tYNx6i/5xinX//PVndC1FSgv5GsHTjkL3RJZPQ+FRtWXm6xBruuf21f7lTnMO7dIVr7Oarhf+hJ0 +dRASZj8m1oF1fJcorUuztEm5a2Sw2P1gf3McfYQ/0c8GL0xj4hrQLDn92saMLmI75HDMvcfhc/Rl +wBEwToWv5wyLn9Y9lIDQ+jktbAmDfrqrqLFkJUt5AjAxtDpQlxiaM91LXOs+oVvuuODQ1WmrdamJ +LW7cXfP6NjNKU5EqGABejIHx70Fxwlg1QWzOgXHzf0WAErIUTG1Kp5ru5odNVyWR2PseP+CmSZxG +m3F2XgJS5Egp/c6Jb0X30UvQkn4aQYQ/CrscUcktDaBPp9D+HLknHPfWGhpK+ZOvKU4NvbTMDwqb +RDuDn5KyH9U6uSiLV1uzCUYRZXu+Y4lH4llnJpsC+NRMuOZOPyNeRT1OgUU0av8Zcl3z+3+U0H7P +UN+uMePZ+IKRHl2IuySAKqnaxMuriZbrGmo97bkIlpiYHzeW6uBh8pHQUYDBJ1pI20PtD8GkWqrB +ix2FMrxL4TtR/3drmPYrd9LrHsmizbUtKpaCCq2zS7pTD/6q4d+akjaFjVDrLaJ6C5b3kVWwm4bn +YTSYeR+LtAeDP8ut75NgWc3w0jFK319fMi01gjzueEWbevgdOf8yDSFUlJGTSmxHcFD/8EOSmm/F +ckIe9miTVaPinhoeLLbiQ7tzHdNCH3gm6pr3+WirGdg8NlL6Tq9WrcsdWgDH8yl9McTZsY9kLjCh +Khajfj1RMJbXN7V+//dCYpdMVB7UD+ii5OBGAMenWx1Rzxgh9RqXNEt4ZWhikUALZc6D7Zq9Gdcs +936a5S3KSlbLSw4HFm6O84kpARzItO0l2/pR2u2UgMf556bvkMpMuplcZ+AUgW0hh6X+EKugVPAp +SyPeRBF8JMl1wqr6+3qxN7/5Na1QJA5RNX29r2EAE1wmIbYfVCd2MnZF+wZCx+KRCpspZGjLU19J +9nkKxUlvlN9Zb73LrLBPr+sZ+BfR7GQa3EcjxHb7ch6x9EgEjEhRzKRm+lDATptWmpEBbqdt0hxR +7L30SNQc7AboJN0vtNs1jfp/cPkImaGhUsKnNoF4NnhRGB6RkdPVScibmtEtuKegxG+/+KuP73lu +IYLef9sEwoVNIlZ5K1mc8qxV9SkaQZoesOlZDLKD97ysFZjpT3hF13o82/t0NLijrEW0ZEB0KvEB +DktulR2sX4TXOee4IeDATZl9B45LY860Q51eW29Mhw7Pk0UXj/F/O+eiKA6Oi8GMa1YBzsk38L3E +RmNYNXW/O74IJ9rNyxkkZORO0ETaxO00fs2Mg3KnK78r/m61GHWBXOn9gxg99H4WDCY0dvEC0XXM +CpECQ7yNT82GRfmYiB8wYMvItJujOwylPErSATXVwqtTTluB02JYcrGEyk8beiKSc+K97R8g/LMd +xkhGXvRY86XlF0mXrgHzIl6vkyGIcngFZDSv1HHzfxkIPwRockTigB70ac7TKx30Q67VyNfiQidn +9YIzZ5oY8f8TUy75n1FVFiAQ2aYOTr7q3G+l4RRYo5ztNf4enpkJDC+PmWpvU1Y0hppxFQ1ZQnjx +Wn9yJns85854OdW2KdzHRUPVWgCVqIdEylr+wKb2LMBKPyjV+/nA3RlbdBDvLbGoXxnc5g159aNg +nHW3Z9vlQTir1TmwvKcUe79mAR+3jgvRIaCSwNUJJDy2uvbQ6db8mXYeADsSSEhefH7Vr+VV6LrT +nKi4epb/IYX69CeupEkjUmzRAVnNWXI2h87otfg3I03IR8FD0au+XI4m2gw3rc71qzkD7tHRSsrH +2l1vqsMxIr7GK08g1CoB0xHaTK12TKHUUn2/WyNgxA0Y8OwhTToMRjqIgjy1n70WuAVUDrOArAjG +04EuF74p0fwoxFx7oZT+/NPtOrXEvRWUUrFvc7UXRNXGrKnA3NutNKvIXT2/GrfwHUB4IKl8fgGB +Npl2naQjpdEuw24P2MQzRypzmbNvCLFL0k6SrXf4d2ObSAU37+gHf6kbRlAx+Nhla5XVpsoTLBQJ +OG6PGjxxRB4vIF0L6ejv3SbtKhiljfoFgA4xfqL4CgWETh1ldwksPJMHckgE8beB1v6CrhEp5cyZ +X840Lhed+XeNBdCQCutq6T6gGLjr0tqyX2wfcZYI4LudKRaILpsxbNAa+a1jT/pLHJDIZAs977R6 +txmPxX/0thobvYkRzx8SzWRHLbLun1/r6o+o33D3VD+/nNHBumsfN+yl0Tw/5CTylI513OV+I0B0 +iFq551zUOT6yYX9/YsxU54FT/qieJtPXKcyMc+LIg4o7lvPSCNjSfn4M3m1O8QZMMKoEz7tg1vDX +h8Je6+d2rrF2VRl9at/ry03wkVcdQlfnQDolKks3AICXFq5nh0zJO+q8tToh22GNH/7aXg/aIDxg +cIXHfZbFnOsaz2CROu8l8vGh3Nb5FpJ2xkbK9G2oB0kPMPxDZ9uGuhYdzJRDXSwhYN+UM8JKZcfM +CSAh5NJh8lLGDICb+/EnqDXeTwIbPEe/C41ej0Qq/OoEyknzznEUS+984alHprjcHHQ1MJW1HF6N +tm198d+8n/8veQUL3bxsS2PE5D9a6JTsGZFD3L59Jqher3M5P6w8oSTtfxYMGj1f+dQewGal5Plu +CqWaBsumZKBJub1wbSj2RDkLOSrqRqDM7tA5rafqx300RWHMLotMKZg2tT0kVBohXXn8m/5645m6 +fb8n0C+APSurZyQJPmEBg1fJE5ik1neRVzyFasaMPRv+gPhqa7vzBqxqYqt6pSs+FZyuKozEWAsx +SMZ79DrNxddzZb7BLnKhMApZ52MCGPaxjjRiRu9mbWZgGH29r2pddNo30btmI/hF45mFYAfJ3k9+ +F7UqBzz13sIJCEb6ZAmEUe0A/k/rdpazXzBrK60xtw8BhbHgE8FOkZPMa0Z5CBuRtBxDlQV0lF0u +rAseMnO1m6VMlmUSt4Uc/l/ptw/qVzYCX/OpzkXbiaCzl+lIGozGRoZkgwfd3Jf7x0dHgSZCKavr +IxmY0WisPyC8CTUUaVXvghoBf0JiyJ44dJJN5cID1DB945Frd18nwxChMwR5WK1DB2+OWIWcTqP1 +edAYA0Uqr+7QhW7/P0PTqj6vixaWjh0+C85V+PWqAyMXU+6Pvj84wYxtUzhBgvV+MX5iSgobWgsh +EPt7nXQp2fsc4NZ1v6zXh+TzL34t/yNF5vlr5uKaibzJajr+ZQVwERdRZmdFdyePFQfmkxtoQLcH +n109aKANFRHbaUg+7SSXmjyu1r5aLS8cnN0yTaN3DGw0fGPhYGiUAQlqJwKUf+TmZeHxgB11Mogt +rU1oROfh+M8HWWKmGqCroAjcwS6hDONMtJ8kECbtrZyvR+RGNc2cYEdkzYMf157CE6LoB5Qa8Oh3 +y+Tg+SlT9gg8b7QS3ONXdLdIhSoAx1pPMnSsrKiJSwMAagjHgAeCF3GrAZ4ilhJUadAyzKV+oxsw +++DVNDnKUxw9OIDKIeS10YUNdmgDZoOMDEICNkDLKVAeI+sdYLZnkZZ/IWap6WXA8d5QbQ6jhyYX +OIKH+dY7V0wWtsEZN+C7r+CFU7J972cKO83v3qSsmcpPRmT/qBaLNqLsgIltg7Yxs/TyeiDijWM+ +Yxq/CvLlrsUDAq9tQYles8qaYNmvkOD68AqK/yKz5kfdIgvVSkUhx6JV/ZuR3EQ4u+gk/1+SC4k6 +qWYfXHx1E1C5Spzj3jCWpU76TaAKfTKqFtPl7Sb3L/Jhw5C6hRSGBtgXIjI4cXElXDJCHIjvMfSi +4hvEyRTTldkRbJEMaEGnO5ESOOU3NOWTD5H1ZJqqGpcA/9YRqSECGNZBM53U1RwVfXiR1p3JHlUz +bxvT5oQMJ06xawRIisLQzCbsbhEIxMg0KdNiB4q3PqKroz93tlxo+l+VZrkPi0pFNtVgA8DFjyWn +wRtBRIvhIpqDly+JSKgYqrT2f7TE1Yp2VnXr4txVo9EpIh4fQz1g25kbHga9HOG3UVGLIuw6DjS9 +meD9Xt+LZrJ5jjQJNXbeDcvjfhLBFM5xRpLcEdlG63c85nQYDGUTxTEwkAVF8FmqQegOVW6GVkJ6 +gIGatrLGyNKgQ7OOfp3F7I61i+uJwRtN+necfYLFXDTR8SzUT9rdY9xIRhyWucof2dsiwB5/ORQD +7EwOE2lhwONiCqyDlrXjQBkrEYuOfZ+snDUWzxEc2WghtOFI7AycS0RdbcX/qYZKZarfHTVJyK2F +J9KL9lzoTWqEnUI4Usyub/4YAaQxIPr8qc56vuZr9FlClijwCoXDn6Kh4UjOx12lGPCDyQ1Q9ifr +actcmuIblJSqJPlA+0DNJsWFsMlPglaPRewzToEGxlATcT98WwmBiNkADghAfykMDeMM4doTE9Rn +tmpuoXNpHLe7wTdHm9S4jt4UMoz1sMpHgNzm0uy2MDMHItvAOPHyzQiSvoX3RNsLPWPevpi7E+wq +eyLoijFKv7QvdiGaOnHg3UkmvD8f8pHzRIt8HDiYBW8Gsq/LsAVZuplZnc8cHS52iiZSot9A4Vr5 +mdD+qzzyxmKkCKcXdOpOkHzL/UHignVGLhGTEBF/T1svMO2XKs3BH3mlotmfIoa1Zrv+gd/o/DA7 +huubDCkZprYMhMxBx/eiUl4wMMk0b26iJxOgPewBVmfS79UDN85uTxU+dpFGexnsyTdHlP5OexOH +ontzNWMSjlrDhW7WAJHMNIB8wapVzhki6Msva/eSP1r4BNsOOm25W2jcajglBp8/xJ7SQbWCHXgL +wWzr06dYwp+oikrpAdWii5AmazLqkZJC3ETbFcOTYdzY6Xlk/e7iMr7Ptd6Q7RF8BJVF5IPdx/Fz +EcUjzBP2zkRnvX+GtAsNd+2lO6fZdNheaedcnWHp0uRVygQbnK64U1VZhqiZbyjVSOYlaaDfFaN/ +VwZsMuiVKzoAs+/xAlBq7kz5+DkRAbtpqAnruJS0qktsYvYvNVHbBo2b7JFR49QQuwJK/FnxTJsS +22g0AWeWmIOl8SfCBhq0pPfdOOMwl+5DhIWbiN2TeQhkMG+iFmNWX34hNbGRg3/T3dCkgVmP6Oot +NvEcAGrQbV8lP7TLgKeAW8DxmeM1Y63HpOnIlgAmIAZNqZGPp2sesFfeBfvyudOig97prTZGEuWs +lVhaTrV4hDpYIKv+DBZrgpGODmC+da3/QLVLh+6vn2XiSNci6z6AjMy1MInIVOUtGIwYXZw0GX35 +072xPap+4+tZ3pZDUyjcrudZ+PqiosjIbBjzZIp2epPgTDV8QJhTn2p3eMhSBhvFbjzFM72t2Q5P +/mXGRGWNvCvLJuViEU5Gyj22/xxzrde4lMMTQlpMqwcQKub5yJfnt+y40L14/oapQUAZIZnq81IJ +nBZbFJH/JGaBXcqbb7rR6fQ+1mp5y2i2tPPQHtuBhvrdOtm7BQRU+jRyNsh9sQPEFVV5f6HSFNwK +dIequ8ANCo4ZRIOeUfgBpydIIpJx99c8R8anSD/oKHJFoLWEtZlD20alEfamfMyf3iJjnKYRGSQE +ZkV3Gfvv+UoSNCGSEmanJuJPG3t5+OpfHWvC4dmIHSs+kQGAtYZHeSAonMrMhI7l1c/cQuwlOXpf +VR2GbLhUOjDP6jcBA0146bUT5aCep8qWH7zNaJFxHtcVEuKwol19RBNpPId+ElLbKqGZ+M6X7uZa +svlfhNZNL3N8glcwQhH0DWYWcCLma8fnLtLEuodh5ZC7uxI0fzMXtbopbGZhkac7knkP5Ozk0fWU +KxH6zGz0OjH2CfmfmeSmSCx5q0vbL4NDHc5FqSDOYTfNaW3OrHKE1R+VENEkpTClvgaPVIVi5FuO +0V6lJGvbJPSZbbXbXpnZtAe6MDVkiPBlTSaBezHouWvgBkyZmUwUMxoxoxrUE4o39noikmONvIzp +A0iLfPYcBdYaRNeh4426QaLSkOPGMBKpIAkrjW1kHhO3Uzu4UqXSpL6EQf6g285kYYzR+Ue15IKl +Z+Wh87rvLgMcuqq+b3B/oVerMiAv3nq4Q4y34kofbnmezC48VAHVb6ytu5PuhfAI9yTtOeJQCC8U +sF/hTNFdZBhSMUqBZSdJNI8WjxyNtgpHVqd89x1L73YyJFjWx+eidiQzEiMwe/8Efo6i2GbIths5 +qSLG4ocJkGsFOS0f7sg2QaPKZXu6GXgHIfsxRDSFR7VcoSjC75jBMsMjtQA/NwkI5rup6mNhbpxA +AStTsT6sLdCtDgOf7gfZsAVXe8KQ6iKQr0ZXAzKvp/4GpnCE2L3z9/RTGLpoydaCS/V67BMRqECr +tW9T6AnWajwnMuOBkItJHkUwaL52WOPvT1eRZsBuqZh6UgFZLYD3jXCgsZG3oklcawYCb7j5DEvK +5psNwTKtssY0jHGVcFo7jEpYpYO+wIq16tNWoKS/NM6Fqy3dyq/s28ZJ84hxTdbYtvOcmPMuGGAF +0sWMg7AlYwOZVm5zyqepkAGJFGVTyf1VhSLV2YCWNn/DiXXX3evZY07dLav0LD1tm6vLTKa4T3jU +XATabpPes7msoBc0oQLX8cSz1WECybtWdlqiwppita9vl6pNcx3mgtGeGJpRUCbLM//FtW6R9RCZ +O0r6pIAfsczB2z/s7+7gqJhqqxHRtU9KhcTIHl2H2B2o7rxlYS01Om4KnSwCB4xdClGSTIElpefd +H+8VfRH64AnTPsGm+W2mslCjyDvIsDL4rBgmG13azfSv2ZLLi1DvOZ31EgvTIPJWEwIZ1EpHZjhi +T5VeIwlIoOHn6YM3aTYGZP2F4UEHe7bXGpC2mJSqxLwx9Jp1LKa87h5oulTfUSeZv8t2T2dTk8bM +ZkDikxRHP8A5OoLtlHd9ccusPk/nWJM7cBflOj4f7A8+s47+qPlWVUWuk0bHOz70SoXKAb/+AYk8 +vbnsfGCEP/V0XDbgZK5WSCPpRRNbJhj2k2m1A5l6YVcavmSkii8SQCefvNv0PSn6vZSLc8qNicr8 +cNePYwGzCTAf1khCuEvhx1m2LGDhqvQY/WfZX/EzCrBBh9Ag9DY025aGVY4pV4EZ94rMx1yw9o+7 +BZ5tUJoQOfsb3eKuq3x4tdU7wfsp98ADiOKqQjYOPqcWHIeWh6mUbhCdR3zis9xozBdP1GqCB423 +wylcaPTs6ypNKFAheBQaydlRumbTAXqDbhx3W145fX5PVABd0N91jTKEvLuB8DC8U0g9wkk1Xvk/ +cl740wYoi55GZFZ1/3gNX7C5rl3ExoRDHKXVgNZL4fXz6X51e5mnJESVPJgQSIcsfdU+QlqD4OZu +SdmSq0fwAB4h0panUmZuw9NYLQLKqOLYm1g+X5ekdBGwK+M+yCpY0wWyiPbAZ/8+22YoyK9oQ9hf +Na6tt4UlpN1GT/gQrCpKgDzN9fcgj0HmEuIn/XzswDYplHLfWNZ5YGSmMGwmhbq+gzOhssDmyE9E +G62i+voNCFjD/bMhKtlQGx00HvHVoB9528v+29LfsxMLM6+tewW3wO7DfH0xaTkaaKZ7r8BN2Xvf +2nwWWKwIkYlRN/4nbM33T6Yx7UYElxZxLH3h18MrPX5b8pKS8+eN64Cs0rhUrP/n0dyZRaihXFwi +6ZA6CXvpZTVbKA2mpwDWJmJACV/5fQ7biriEUDRxw++kYbhY43Hbr4M27F3GZNwbP7hI5OwSiAXY +BDYRlgmtFtolAuT8o4UP3+Bo5QHUWiefmVR4YzLo335Bet3tUbjgWgEaN+mGLmF33XwV22ZkzOUD +cRBI/l/2tkWD/K542GBSoaDat1ZUv9z+ZOD5LRQBhjlI6F0mMZOHdrCoAUi7k8oJ80qO2JyYsrBm +PLgBMsRS45XOT8U8aKafQkU8BT++cuFE+bPhP7HcUz9aDfB52lXX/L/t2cW0AKrKdKOnISjkMlsb +oCRX/4ukKhL1OX69/fcmlvLHaU+qYeWYJvZQKDOT7FQnL5s9HIXdmtBrjjsfFSr836yzlzmZg+r5 +Imt01TEHUIqRURLqf+9Bv9VXu/OcRdttxD25DqTlG9Wg0uc2OGNnIgOZ9Is0JNQDjbTAd0iZvBXA +CecMZNJjfDF7EXMEXcVWBuIAyxHILmUjhFb9itXu7X0zn2fbCoptv9XE+rM5OLOQReQlN7+4IsRX +CM7zx4uyFnRDOrt6oPvQjA+xizQBWI3jkAH8p8/e/6pF2mOsJElKZLl2woFZ3WWYws4zqNq0cZw5 +8u45cBeeKOWIxitjRZsT4mCG4nHiYqnOtuoOK4xnnqHKLs2DV9r+k3BcdmLiFSjY/h4WjZWclThV +eUU/NEbaFUjZpdY+HGuTK8DTszoqo8qwrtcETOthyFxvCiU7ZvKVLw5jO785Zwaz7nK5XzwIXvZC +9SqtT75cbtZf5KtZg4XEZ1eDbsueU6nWZFFQe+EM1vIyI8EJ/EqW+llPc0wxTTCMyAxCeqo0dwu6 +Jbb9/4Qq6r0ROeeV94XPQ8VLO4KEe/UY81Z7g6IGYNzp8gw3jSLcaLrQawjy1O/i/TTd3rDq1Rwb +LvXK2tuU9go+U4580bjiWJ2M+4hiSRzB4/dEbhR5nxVzjW+KjgBv1w1CzLbpwoT2Hmrnjc/Sj55e +bj7FevSMW8jAUbOu1/8nRNbh+a72yQ+9r5b76lnsEfpAFqMtN2V4BnYPWIJycqmyMYOhrQT9RMR5 +yfqak5rHmYi0NWHZM7TM0SZM2lnzRnD77c3n68iY43rwRu5mPh6l9bnk5FvnVWR5HU7+5e+PeT2N +QG7E0pyvDlxYI9zSxwSSQgfQRmdlWP3YORTSjKcpdp8w0IQvJR3n19chZfxQJt+xqqAoOB2S5pft +eChH9kWCOu64lOL/CyDLdASydnXnMJE67/trcgs/b/6yLht+hGTv1pVljF1h3JesdMCorqC2siww +0NsE+Yk6sU8R6JiNpPi8MB5Eu9a75mnDacUjsIn3ApBleY+b3DO0VVPzpWttDhZN2URonvCcmji6 +ZYLiGrBTRBfgmhpnnPLgrEX3MZsRxdW3RYzfijXOusnrcd9uWxcVTFfi/eU5vb7YOF8m6nKyaBAU +yvz9Kks4qHKPhug51EwWxoeYELlyW+/VU/XE0MuiV8iJwPOr5jvAuvUnUMhgjGOwNSdXqFZbr+ir +PtB2gq7WM6A8CzMrAXMD2qXbj6UKn9ZmMm7lxwVfVT3/xZMUT6/kSkAWod/U9C0/yu69sQrEPKTS +LECB2pr7uwirdNxwKuWDCqJsDes5HpFv/n3CpwBJFeFpEWISubBsnVovYhRnNfM0V7l7BqNOLy18 +yr12DfmAwfnuZS75MbhJzpC3Gush/EbAFIGwRbXZ+QexQZzyFEgmCE+J4wwub1U5kOg1m6zowAdQ +dCAUpITR6ZyhdQ+fVKa5EAGoukp8vbJhpspbPx035R0ixPmOwU2rVdwA03EppOdl7IVGS2XjWdWy +yjYsFrj2yuSoSDZpDY39gomiFs+7FE+4ZPDFAth3kc4xpVr3GsA9yedvDLPo63XV+tc6pVeay117 +pNfPEGuggkeBe022t5UWVg27XRiD0RtlormVzOnC4zJyLpRJBnDGedW/1hGY0QWL1bCxAME4ZG6k +BWgBb95yko422pspqju0LtevSmekJe5D5dSpDn6PxOdq7xPlVpILGsvNSrKHqEE0eRlwQja7wEey +cVa6Wvd5XrORZOFgQgb+KLvQrCkB4Y3euHl9bdZXp8NEL4V2dY8qyaFyarzNRXTPT8GAP3N8B8zV +FF6EDr1QhIBEau7Dr7bHvWRgf8bBi51X6mP0GdbEWk2UMlxzIhq5Bg9yUPCJEdTIdJ1nCEaapAKj +teGyOj+LGO0Pdkda4pYgCKljrYiGxfNh2YmTdIHheKQb18m5DJ8VhE8xM5Q6J+tae9sNwsPA2ANY +JBn7MnPExqXeKg5e21KtaVzsyQewRNtlqcuSrU4Es/UiIbG6m+wfjou9p8mQxetNUHOT+HE9V+0B +h4CCKmh4w2S9Mzthf7jxUcp5HFU9aoW2aK3UaF5iRkA/dUHGkOwGntrO+TJ+tKaNFAlIug2pUIr4 +0Ra6YPahZDVMCLK5V7v+GwTpO9DsUgI5hkBhXglW7TOVbcXAx0lhSypnWJ2XVsasZkbKh4j0Kc1Y +1Dvr+jWweC+dgx5D8FQpwVQuk8rkJMOYSYXP/sdMtUzJ8NTZUbeFNHWKVv43SaCCztJjTp7vF7fA +D7awgK8cSiLjppShSSugRafgW5uua4Gi27UGhNOacS/7bsSR9F2lmiXbtUR5RFfcJ/1GKTKpof/Q +Cvt/6j5FsZWrJ3pV62vvtcscV4/baE5HGd0qrlHC7+ZPMky7SEU8dorDbQpGbvVZMVU3mp8fGkB0 +gRTX0wk0KfLwGsoYRzwh2axe033dreOWMMfwgqZ1Gg7BCJfiVuyM7CWfR+AUtrsqved/4Bb2bkcP +1Osh5k0SlX/Ud0tdtlwmDJ/PcLiByEXrZD1InrEoMo+mtsdhGtTSepToI46sXRZl5Gg/kXu7/6se +5qhrc7yJafCjyIG62rD0LAaCEYhA0Z6SDymetXhIAkdYaojdXuG0cGHYL4cAkvj8FxufnokWPIbr +SsewsjEPKSTVlLFqAXq0Gvqw7P4GVMSWbeBl8X4swLS36AAKa1eQT1WevXgJTH79Y58rWfOyW1+d +7ZeKGaEbxC61WqgVtk7xHxgIc/uP5r7pBQe/C21iqjXGCAM9qvjv/HXO6/ojDnWWOKDcOu/mw1hh +k8pLffdCS6MNfffUqH5ifHEeVGHERQLyOxiZtbnk/3e8zVOq34xXc6s67wuPieLe1bWVXRvCELqe +UGf/wcwabhdk6ooPjnJxjYVtaxRORr+KfDLDPixdUWSVWyYFnGTwQSIzlvxLFhsOr+eY4d4aPrxv +icCETHbwljiqqzTabTgaScE9lrgxWTgYvbFgleRC45RbWt+pvmn3z2cFKlO6qt5E55eiaDIXqvpU +lMDVQHd60LaDdGeHfrN1mngF6OgJ7f5fJtidiI9WcWI2ZQwRKV1lyaSd+OoteFVQdk0mkrjsa4xo +4EG6/K6XxTwYUUtXUCuxzhALkSdGxBGiZg+99YUsqQrl1rcf0LzML5UdOuSCo2+hCGpJVvVynluA +92DPcs9uCk4rNTK3+O/+9xcR3mthjJGgSK+qfhtxrZb2tut7PIvVxE0RZ95u61r6WVCGC9Hjgu2C +M+Y0ADcD+Si62eKuth5T/fmHCeWTgvqwYLgPJvDh7rNoyKmCYV93kP1CdvdA/u2DLVTkuntSvuwD +sQGP3OivGjUie2i27hH8SIGuSxxAwmFrh/QSX7K8DngO0A7izOh8V78bU0X2hoD085vbaY7hBmKP ++NFc2L+yqki22FjYOh331gu3LN917bIxdtg5C/PSj5yRGTKDOh755XgZupqv6OlXPp5HZ8Uwf7y4 +z6/kMMBckXKAe2qJTkS8+0Wuf6WTxPFx/P+LnyMxP+gn4vmil5CPnsn4t1q0tbMVAXBAa96SPaSA +UluPy9XsYGNaakrDQumPvv5mnXvR04Bw3nbXdd8jhyFQoZQirgYHkfn6u1vPJkBONyzm+YoiCUGm +aV30AdrtiIlr06PUJrb/PzaIZCdfI461k9DGvSga8hREu5VpAalbkiMWNdngqLzVjTkRbSWNydpI +F7x9cOFFb25LVjVMo5km/5FUelSAqXGhOAXNvNdCD1N2+AMwG57szfkD1FgpPQetlmm3tGQJRnF6 +gzLixMieSIALABgIRWb+ciminxrYjr0/Sf8B4/jzkkX2wKUjkYo51mkXPXZ5rKKmitRDvglkgqp+ +Q4JAC3Ln1/YfOGvcnfZ7G9ysJV+6Fkoyg9bSsDzEAfAZpc1e6fsrkIvtOW7nS0zMCwJkOlqZ8eaX +i5U+PlGo/T76SgJqU/u63pJwEWRbp9MQsVvrIbFxnT5Be2clvD93EN/fP11MRK8SPpEyQqvyaHl4 +uqGQ6ate2mFBkRO98UBF8bRH8Skn7iPuyqezNEWr5H1nDrBjd06o3uiHSRoEzRJfAumz5qxY05Wk +CW+6yRTkN0NDvgdsDcbtHh68ucOJoSzZ6yPPukFaMQl3+gMpjAOJkRcMfpY0npYHLdK4R0XB87gF +/+kOM2YO73yy94+vmtr0vM6JaKMQSx/uYmiYhV2Xlb9Big374UiZKbDvqvpbHOEYjvUHpJpkblga +BJ5y9u60LCo4JUVuguXVoAzAyKvV0+r9UNj+ZWzRuRHnV7mSBUiIbgF2Tph9xdxRBk2CNe3gaGOj +SgZgS2/MaWIsGw6tHFANJ6QmjTtTLj2O7nJXSG7oV3Qq88+PxQq+YAA3mAprh5+TtcRm1GjsPiI6 +Ndd5tX4trBHSJMDP5FqrbmhXS70m/RKKxWZIqyhGCHD2lWOSLbviAJUUsE9qU70fQ2zr60uMNzM7 +32NtEBwDVRN8KtJL5toMcf0ofsAyQ+txrbM1APehZg6/poJCaJGiXWqq6FSwKAMIKqaj+2EcScxc +boTmnsjBYeLMbHu9OEGcVyRyLBuxuy/Fwj9gQFH0RT9UL9qaND+L+I/CavfMEe310+OIJZghUI25 +Sx4foVEmoO6ggeOZTDnUyeiQ9J09wMBmR1JI2DBBZU9wRv9XFOiWbp3bGOKa5k4YzXUOkirhknH2 +2zsYwqgJwKYT4K8NWbCk9/bMmETm5Lw2IFRY5CeBbjRU6wSd0goNezcHO8GwN2gyY2IVKIePbtpT +aVXzED0Qyrw59w3LQKVNVj3rt/8Xa6hq/EVtOdcpSaGZ1C3F3J6XwlrenfPucaJnPUaivlqxQKIb +9Qc2acjpIh8v9etPEqV+k8p16Kz86fWoFQTRo+KYENMFLRQUPaTyyZD/4Yzcui8qP1ZiLbBRR1/v +jsNSus9zTbNYZva1sEfKzNBqJupewU0UyE6YGsfCgUq4ZCp31R3sITvxZud0L/U2yu3mK3w6+PoB +OLD+p59+QXJxS2QoGKstZcURjxajm05PAF6LgSJKgBTAOPweXSGvxzIYQplAGrxMpQPOzDEJ+U8y +B28r+spAYy8rEeEbT5Wuv6EIYFRA4wxqDsK1l5mt8OhAnnf6rSxWpc5D6/8NPZOzLiN2kfXH5Knq +q40DvT94AlvfkV54xNtntFNkAT9G+hKMxLnzAV9QnH2DiNl/MX/RZheBGiLqbj0GlKDNYIhGmaI4 +0WJKSZGhF/WuFH7Euk/G2t2B6VrQ0QwrerNfJVKrbJHJs45NgPwCH3wtduRnYzPo7A1yRydrVRn7 +Ekm/6Ae+sf/eFej0yjYXHZHMLzSI7oznZ29Q2F1HUkYOVLMcNsB+fjtKqLiDvwbo9x9BgP65Lm4B +w8DOlW6Y0vSza91r23Xa9OCjZo3v1rC+gDaws9jVwTcM+a50CZfYezKhBBP9yr7IeOGMW+ktcvEz +fQo+IreS5OPnOtAUJNxxbSJUVu9moLox+Aed6+YngREX45II239A6oRdhos2JAvomkOh/Jphbe7A +cF7On4egn1GOTimIvZqxXHYL4yNITjgaII+8Jb4aJVf984pY9+FUwGWsJy16Ap+WOxlJsAgQTgJ7 +xHPzIEhEPaZjj70hPRFIxPvoKwZdLHuF5WxB0bvnK9xEDNB34uTQ3lme3Wh71EqQGU3eeLmQnJ9R +W0E0KjtPJZIWVebIHFdqCOIulAUxrHD9KAX7okYLMnIE9D9OzYQQH41xJUlR8a2dzE+0d5pRuqaS +xOFZUO6c5L/3uhu8GowYN8wkGhrjYu1N/jhh6QAgtR6McuznmhZjVddxM4Apf8LUx3pNlYmuZ18J +e1o4+qAUpKtGyUq2js12vqkhCQjnlHl9CvuYI9Uw046QiZTN7249fTz17Sbd9Y5Thn1T837zag4w +37Pm/cudwQNPfnSRtK8H4n9paN3FzOcbs/k79RglolV21gSZo6vuvF2xhKmifQyINASjvCUmuryu +Q4WE78+8gyPKi/87GmEIHdXJ3dXyPX3kVbLTSERiCS6Y1/se3K8nkQyhqKTe/VnA9WbgaJFQ3xjH +haAp9VODgZpMc/xKxJbtjSBeEGjsqzl9EQUVnfaP8xSKs9IBRvuMr9lo2XFpZJttFSRLvDHdwoQw +3qPbGpA3HusGcEch/QZcoiIG16ZWQzKOthoRmX5avgIWAkFLDXGMdyoiFZrdNmv4PNJ36qXlCotc +Kazky5kNHLlgDQZNAaJ2MlDIon4xVHpr1+kqcInNIFrcJcF16LsxF3FfCAklP6COpX/HnbRJt4We +U3/zFCKGfXxHGbCWSTK4afSGnVqalrFN7h8utGT+Y06Hma8DHBSe63F0Ht0DQkPCaf6+4GZSGxg3 +E2lRmzLq+sBx0Pf8O4n9re9P7zGRUM8BFtmFvorJ1VWCPpqdAoaWyIVokxDWgvqko3M+2pRtDT0D +2c3nA/GDY9CX9Ekv7Ku1G+lSuyf1WHmsFUfg+FBYdiETwaxSZ8pico8vkw36lrwq/OYFe3HUsRJU +wPHJgPm76l22ypmTIwgtX9YGFK2FJWMYjlhHFqryhZGYMn7F37/lcpv2wD2JPQJkf8BaA91NCBbv +NOKIwDfTKcMg9fpcuWJyTfcQ4p2mnxyrMvX/sx9xMQT9qgEflyA0FsRxXZ/sJUvrqJLk+8SRK1wI +U5Ibii2TodUfic/jQcV9STmbKm6ycBaSh5/y3W9GRDHj9rfLCuJ4IuBYCaZ31mTXgwWyX1eFk8nY +0TH0AxDl9YsgaQD8FOkE8Ac8FHXQ5Xq9rNPBs9C6zw1LAP4IE0XJ2JKU6BwXLBNG8EmJhMJIvDOZ +yQ0BV5rr9a09X8dJofLcx2528ZRlSMuka8fcxMFblOBbQ/fH2ThUhFq6PCpRghP/AUph2ccK5eHW +VaJPjEByYMBEB2mgbgh3vio6IsAWCBAvhn/Qlp/3iwUCC9MIS3uZ8b+c53H+cM3oAqT4dvKrrZ/6 +Ynfn38BREirigFVABGAnwA37NDQlGfwuUON25mX3pZCmDALCZ08Qvo8c48W8LlLPCZD97hpmUwml +lszOzZ2XK9RvScOtCULo1Rd99i5kvCO0dq34ntmmjLxAwHGr36sHLqSIkS6a39mMGgFUtFvQuHs6 +Vjsoa3jgl3Nf39rNZFkEiP+OiR6Blcgq8LQYCzagKsTd03NZcq1Oizye2qHg1JXnawWvMeUv1cyI +s/pGkZdbqEimTV9tL3uAM1i2KIYgVQTAiJVDIkaICfWmRjXokvCDfdq0kkKjtlzcUsinqhVq9eLq +LujHrAOuYnJDOCdTIfuTqPVNE55VNj0Ias5oo9yACKNTbIv0njQqlwsjtdaOlVRJOfzrZ4X4Z1Kg +KYyukb2UVSMBaqFm0Rq0sRmCslLvtIrTA4mxhUOvvib16GtZcr8KPHmaDH7+pm36pM9NkiO9MbwC +NurRKoQiKUcdSVCIRKBM69bkjpD3HPgTFRuc4q5jiYURnhaGv2ooSJ5IFcAtD6Em++d1D01cHdfz +QCT54hAfffFyveO04AeHQgJk7BuYIZ6JXRgMJfiaEYG97D9oKqgJqko2W9n+QZlMcFvHkF5+88Mm +n4MECvxgi5zUXw/2uX/DjAxaODURyIM28ZqtgTj5b/gE1wGQcC6Rvc3uUnkHs1PZ3QdeGI9fK+59 +eKdcRPpobIWXTKsPreDlNNoChrEcnlzHYQa6CxZEdv9MeHlWlvfZGTuZrQJ1h7yCo4mRmpPMZLe4 +p7VomLXk0dRp2CiwfDyG0CgcmyJuYXnAQj/wIpDOFGrOOF4OxOu19cwmva3AHQs6bGs7wAWqkSth +EQbVhNsbHiBfHKfGRxgnjQgy3STBLKsBtN+dBAxWuaGm+1qQgkokXbIuODPK3/VoCxqemU32kxqr +B2nZb3zp3CCpJvvxDY5rbQe5OeTufW+g8wxUiUEvLFd/psnwtgoIJ1tGlI5q6Whyp51FAuVK9rBz +lASVZtG6T7QF8+lY9Q0V54cFO/LEEURwGOGzLEIbLaRw26PnkceWIuIG6Wpqv2XGxD8sU3coTTQC +VKLWvZ8hoz7D6HhT51oTYmtH+xqSrwnJ53iEhxDgyMY4mdIUVXpr7aUPe448xQ24KgIcGRXMchek +D4e4Bk5EkMqFJZiV8sJSsIfrV8VGkdt5b2OmgTOL/Jx06D5EijzgSgJrLDSu5we8bHTcSRod3Tx1 +dIWFNhecklFzi+kVJtOtmqkrPyRhH9F0Wu1/xcTtjXUbAMArC5E1rq0fPmojRmEk9LBAosgzuvSp +WpDvXgn3DOfYJAJ/XiVvTDX5pzavZIPSqU+McBB8lEP0M3FpZz39yM8ngB0FAXhAqWxDp8SMaWLK +oPNYNlaYz5W+mhNZdMJ//3V5ri5niv+elXxu3fMJS/lo9vU+K6hnGoiZ2v1cXmapXbxDKro3aB2g +wBaIHyAY1skULOgmAmNHeF4cz3ds5vLRwzHWmhvg5EIkTr5QU6EAf9N9ZVRYWP9C7CIovYx+Lm7p +OKX0QtNQFDS8D6DpZaQPdUyKRIlQ2VZz8/CWlYHEgXgRgMsEvlT572UvqY6CPrtyn9gHy6qXDVm7 +P7Y8cCrzZvd2VgNiLtOfnjo9iEmUKltZftQdjTk6hyq9YrAZZ3Gfb8YMSkUBi+U+DFGrqWpOomN8 +p148cGh9IpqA9owX/cxIdKaXQe4KMKpk2yvOsHNtG73dXB931MpK4Qp3WNqDFbVNN4gHRZ3dRqAr +j4p6MKGkYJC5hH7akuu1nyCiZkjjMFvPrijvjNPiSmEa4mk8G+dcZ1m8Qu4G6hn5ON8x/KnJvvi7 +0EaZhPr00H4K+mw6yu8bA6jJeIqQbqoinbuiFEh/9GdKMEX5v++X6QgKpHIAbfsHpFvlJemTFAf4 +sF4W4QOOaR0RSi4t/VlbGREB8J8ohlbpvkEFZJx2KJ7glxHcZ8qVEvAr5j6TtX05M6fy9DX/YV7w +hbhWal7Ss9nu4+R7QAEgMVeGbmtfcGH8QCH0y3km1tueY/rn0kLyXBFNbKnGA+80S/RMIFyU9j94 +v8A6XKt1BIu/Ed6Fq+PSPCqjHWv/+z56Atd+gw+IZcs+Wt9s1yqS1tPOEDpr+iulABoWaooBTiUx +wemKah0tLcEpec2FD65DvjtkIr3Xkpur5FK9rCluM/7xHY3V/XZW1CReKff/8+jXdMPrEgPRRO5l +FYuZd9+sZuC6g7DU0RfLObnFYJOs8/lhHF6FWXfUwn0v0FMCu9PaC0VURP+axe+j07xV0Zx09l54 +P5naYY/S5HTtPw6DFDpMKJDZh5HRDCXenmo4bK9oQWMyhRDxH5R5jvVM+uvMujq+OqLDelTxJazK +Mzz0LsnUO4fnbAs5FNUicBo/togLNkoTYPpGy3NWaoUDzU6Ui74BIJ4lKsMTuUee8ZorEGA8YBBk +LlwIm/nP83s6gyOhrEndr6sL0FKHRbXRL7lYc9/MM0fyLz0w1UITHAiz9wwUKYEafj05FiumctQx +nrwTtrhDVm666+2UJaS5HKTLhPp/40abLTNbxMLhaQECbTZV1rLt3FekiVZUNzDgpm3fu7TcE1kx +nlMkJfovnsYcTTpNRZ5R+X5thVSiY1xq9A+Prel8NfE9/Pe4CmpLZHhuvbsz4NtY2FtdLk/s3dEG +ONuGydT+VajkRHvjevArE2eEl+3LT+ne+eGyFgtO2C07pC6UaKyJwvbgP7+hH6El9a6KdT9ndPfT +egMyD4x+ccQ1QvIJDdq0fM64RzgFjzBvHG0JR1M09XGXiWiV96vWohs8+glWr84PovBw6UTELbBx +gTNQi37w2wWVHWWQzU+X9Hrp2szSyL/JFI4LdJlYWTc2P7aKOESyKr13mV5dHeI3Zw7lO72zZ02w +1Q1ByAXYZ5vZ+QC1VhWQ1AQiIBTPLaJJmo3lp8HcYUyeAjm2XHQ1xtpd9iVHWieYJCRDMceW+4nm +MlJ3mNTLjTDlDWNoEX5D2e06djcXnvhfO/yHSNDvuC9kS/bEb7zuJU6n7/DO5bQixxGe5p/wnd03 +1KsdKseA1dTjHgtzcpg8r8zV0yJqcKgwF6o94ouBzwJCCj6RJPgFbsDXuyeqS0obp3iotR9O9xim +PqmHqcDDOav7Os9p7sVlryqqpzSEFgYepdw8WuHkGZ67mWkEvKRFyfVjc0SPRJTnFTPPlKN5Iggy +pUmzcre16Q5eCLRaA9cla4V/hc9Xi5gFirPGtIYn+C0mgeXFdGklNciuRQOmnom9ktoW6vnoYaWW +qOiS4Xa3E2PH3e8JYVuabGSwWaHI/vsgQsqsnuxFdHqadsVfX3NeYI8eScVUBHdKCnstpVT8h2qI +amuBY773x7lbheCtPHOub3aZjWFFi9+lzeUP1EDpHmlpoTbeKmXujnvfAosZyr+m8RvqowjYs5l8 +n7uqlSJIfLV3+fO0eNlqBuS8BaYjZwJOnz+45Vj+HxDaf5xOx4++N4tX6Was7altzHS5Kf/CwHp0 +4RIBxZiFlkAGJ+kIB4gY0Z8QTTFuG4b7Yq3l84bI6WUc7hCxiu7EN/4R7cgfbqtT/zme/8LtMzvm +RNTW9f3mgdzUJUM/Wy9pnrdZ9bEfvncsjLmiFQ7zsfZiqaTI5cwoFstIXfO8yrL+4czzrTqDKEJ4 +g6JLRXaMb/c5p47xcW9BsZbyGa0YvSZSFJqTINePCvwE/HaWQOA76WcjoNZmaC1gywkBwerlXt1y +nSGwE/jVc1HwYBoYnvd8/dRK0oGOeUjq+KP8M0jQKt8y2SUj8sNYCCmbvj2d2Km3OKj8U1w/EJJo +uMI0xOIObMhZkCTcIhgB3v23sc6by47mix9kFF4dk/n5zO9qYk0xB35SW4fVO5LR5BTw+SqtD/Qk +3d6W/NwcCQJ2bA0+mc5cB++R3TumzuD9XA0uAeOiXtdtVTEmrAxRs4YYEVpYqU/+ZqNpuF8E5pat +eLboE9nfWd1unOTNjG565+zBJnz+UVY7y6yYL7ilF6Q9d5VRx8uP5lagIWDMG0AsOL7wY7zYgp7i +A/xVjgZdH2ZSMGesyHHZwGDtCBI8YxGS2qeCRNs3r7uoh1UMv3KgkgeL4+hL+caxfr4y2/DYfHda +uGv9mnPXyrC8ou4qrtDuSqbmv74kBn/Z8qp4ru1AZR/QsNC0XYj5gh1JLU8d4kEiLZM6jfUhluZE +W8qfZLMvcYqYggQe6d7TJ7ggYzVfvnpYmvOAcrNMhmN6++RCjrcZB6kOHYNANIQ1MSWTEDbxWybE +E+SRdOSPlWmxtptBgXQ45qCW1NqnVQqoFa6dvvL5P76+feUe+kcofiq2t++x1OJdagQMV94CxdlP +a6MQaXY8r8JmD2gRQSbBua1vT3Ad+RNUam3VinYZC4QLXnaZFOikLo5YWogwKS6vhR/kj0PuYN5J +qPKcYiAd8tn22RuZmsPatg91TF//mR9LxEPHzP/OsYUnNjVGmhJgSsLCGTl6BCgPg28N995WWmUG +So1FYW/PzLMaBghG3mSM+q0gP3TPMHfxByewYqNpBYRDDEszqYq19umv2RZNsrbpihWuaTn4nPzY +FcGqY4MLYmbkOeKgid12cjqmQFxnvJA4yD74Kvp673Yfj4+B+eWlyFfQ/QONkZ1ez1EEyXKKN9vx +J7xRZf5hpPtNCywDu6iiSy1P90NbHyRhVWYZRDDbF8NJVE38c0CEKQPW8MF1PpuFobn+K4xgqc6w +Gzd0dKMZILx+Fo1RNyDTS7vlGqj+XC9urByCu/7osduMnSs1ZCH9eP+9bBYwqlugtDdmfk7sAmgz +pDwNU41HeaNgsR5CiV4fcxSX2QCTcr9pL78QXflU9V6wCQ79phQfjgt2GjRqjWv3v3/lMHPsGtrv +podOwcD81gWqgSMo01Ox1CLaAaHpelL0EsfQojOI3lkn2b9aD1nmi3t6PTFQ55PHcpDZuHzrZPCB +F6IxrAVUtPVgzKHN0/ZdRlhEpWfDWC2K/HQAGq+m7ZLc51e/s7HbkWwtafKEefOil6o2U+L5xwcJ +uAyz7xfDoUn/UUTNiUAzhX6uld/BEi8L2w7Asv5m/xLOG+WEfmvQxlZDL8Jn6AwGMhcLrVPdTjdk +QYlguK1p3AB8IsuJU7bVI+V6OdVh0Lqh02E4I4LME/yDmFiooviKVTa4C8SWzs5zPqT1rBuJazcb +2Y7NjJ5hbBPuIBoD2B8HT49+QQNQK9Bi6x62dglA1vipUVTYE/OYO0Q1NSEYRjOcH9p4ggfEXMyi +h96jTB5GCE7iQVZjMCb61KV+DjzxtQH6ANegMrx03FVnDqm4ZBLIrv0P4zdedb5HWtiddMSAS/Ad +CdxyvvNlZ1BouXcwL9axsfcL3ugxHaOZxxTO361Ij2icbWi5q22ijQXZcfjVz33wJemp6wQvjlBY +hEYfBNsuaIDIhPt6ruzW/G7qx9VZuFQw6rVTjqVPGXNOk/KDEmDVHHpA7EOIyetrh4vgoS3NDveW +3cQGAz3G/7SU+KN+d7rCP59gBwLm0xcMy6BTuHFp3wKR69jRiNwmg9Bj6jrNq2kKKh00rZwivyHN +5GRvArYbALUKjdS1h42ES0xZ/plbo0J29VqaJjsI39RbUQE4YxAt/5XP0tOOBxFXRHkm4FF+3vlU +PGg+L89r2jjw0jbbq2njqAd8hjeOFuyDcFR7yz19Lgv4bnnQePccOMrDqEsXrBSepjRG+DJ9Z5o+ +W2bGg/yGTxxzDJBnAceZN5Zb8wsa1ckb6qF0GrR8awKz4tnGuQzM/NwjW4wXmQF+A29aQ59fuu7M +UTej0Y95ye3VB7CQdDORO8euNz4wolKuE6fPcXLb82P6CwRMJAeAOxUW9236raGa32xm/fK69sIB +kDedWa82lTNR/TVUpZnmCmlgEeJrmzVjTzmamvPRGABqM8HMohGriAIt1urQlS8R/FKvi6xi4nC4 +Gc3/hbg/HTLVazVUOnngt7AeXtAgGxUzGTmxMu0O0bQFtnW6XBFkGvXYO4/sWOuQd/iXpBNa9bTm +GTBJksieqpdEcIVVPzYYi4TJAh6eYL50yoB+UohiArEuX0OcZAJBEAFs8IRxHeMCu7LUhUzTRGHu +2M0RQrANtfT7BQr5svcwxq+YKkem41RHCU/2ubkQtIr0xKgqXBD7U0BYY76b/u8YzTgDdQGn69Sn +XXROCdBxKcauGrnZyyLfS0mK84sLURzppn9c2aPgydIZ7yDcHt1rABDT+q9PBYT7cFpwFcxyvn9t +MUF5qQN+ryVoWegiRwZLkflx8MFEbs3XZe79ab8i0iSSRu7i9UAWIA1edMYNXaeQ/8F0TnTvk1mC +cV4lB/omtbNgyKCKF/SHJiN0sre4r4Jw+iTVWVPG8jv651iTTlmG/5tIpgkK5Ik4AUPPGqhAUcUt +SUXmlyGIqAkAElm8/DzHPjqct/r0Vd9MYy9+e4C5/ziaUhOWlQT8ZvKwiMcjUVZxsh9CnkE43dVq +WubDcylXvJADNSt8sH0sQdvC7Eduzf5OWYoQH8G9Q+X5tgGkXUyMinTI0kyVaYeItST7vVMq+WQc +bAIuiTrEFplkKKpBFff5HS0HsmrmD+XURJMa4slVbRHlKNKZTRV+n/nCAlcHjM/Man7bey9AVLhx +Z38hfEcZ2tGUSoJt+Tt25YHiP0r16YZPjqzVkJIYPVb9lu5KvRf4xnjFmKJwJclCYP0S3O8YnbRt +sMSrgZ0S8DZ8RaYVUuiyZt88NYYq+e59UFIDqmYTyMv1duOfccowRuqsUveK8dmROvog1DRrpvEF +fVKQaKMOxU/3Ja736xAODIV2uwgD2hMsD8GjXrFKccC6of5N6dTS0Q36TEU/Ci0Cv0BkQ+YvS/sH +eZ2JT+K4wzX+Qd6V/ZWk0fWwfToroNQZh465inGGDHsnQ9hA2T+oPSalkPmOM+/EVU0nlfY6vyy6 +XQp0qZEpM8np5qsA4odF2z6hJWt2VySIRdiXlv5f3pPZlM+WnDo8MtCL1Tsxt1TM2VQ3mhgAYCa+ +2laKPOwMGoB3FhRAWlJuViGzBI96hs4o7jei0fI9MEH1KcpZ5omXOi/PitYqBlKqSk93n2NGuqZB +tjcZdPciVeCPwtJYBCL2oBKhSsidyuQtZC36OvAE3GBIiCeGPoQS4wXFISLUHgEewsijzaBzs23S +CiV+6JJ896MnRZ2hh2UigBF4ViFXwo8HWa0nJ+xVQI0jBsnIi2oHutsjK60hzhtIWp2hOaJV3eCW +20VG36UHcaVgENPMdUU343tNvptTicE6puo6cS+PvZiXEjm+rOnEvbM/Sg2n24Z6XmPJH/dsQcAl +SotsdlwZ+EftrlXHwCjD5lwzK/1qMFSEzBDJV2G+UalrmvbvslTkLfShxo5c8of5a5ScWQaCuyV4 +zIFbkshGdvf/CNFYLs/XnUMpNRa2tARnEXi9BJLoZtChQ+GQtIEhJ7WlSK5zvLwWuhnCdGHOOJ23 +aARdMz8Q4IFSs2JXIrnDEUzWBEutf07wodcW0iFWnBCCRlPhQs5ORaie+ksWbeStfX2pGMA/jVZS +JNI3JZden4tJ+U+aUOuC70fZC8C/4+Zpc7oH6bZOz6/gtbsLduPz9dI2oftUE5XWUPy6KXykzof0 +58O3l49uT3g+Djn6dyIveRIxHLB/e44ozuTV4VR39HsrjHuDm4uXDlr8yFpWu8Xc/Fekd5BS3Bv7 +vXXpqHq5VF2XOG4iJhrdwn14/pUkYo7ckGwbsQVS8k7lDbGXe5zdRP4+ZDYa8MW+8xLhn5eGUb6U +kT57L1Vxjrbhicma/O2jJyIeZx7fdxr4YCAN9Np8tHvwKOGgdtl3hMEk7SfIWeZqpE6cBRHaNfz/ +g17cAuvaFgzuoivY2reipxWPKJLh4cE2IEAC/Oikek+nK7KDuC0bVTxhJRrxQcYZdUej5z/C2uvq +aP65Mb7cHL1mkxWyUT0M1PJfkX6LkaY/0gO7yAtE3O2bpoDQ50MaX3WeN/ndfSrI4OTj8sWQr7/Y +iGjrgb3aOfEq6Y+oATR1LSUufXmTZ91GnN7vBgQnKoC8tTFKJoz2B9LVQNcbiMrAuC1l7ZdzUY0P +P36u0R9X4TptF2b/OPwCoEMExXSCGPvNUAPX3DPkNfJzdrS3BaEYwFAQY3ri6zWFBygdfLV4EWCd +xFsf+BkiPJwI1lV2iP1BRiyXoIqeC6KGojJIxnsjCb/A4xEOIMSE3XbfzCG0uRQG07NjFW1g/01l +2Gjyb/hfK+L+8Y7OlvmtpPBTov7DpJPHEfh5jp7gslhZUX5KOYK5H5lwNuXz9+KccLGxk2CNB/4H +UT09kKPz4itDZlKfVeslQZzytIQu+Nz5lBecwNMKOE+Q8xEdC2ZL6iXPfKHDjhMk0IBz1C1lJDWE +I4L4HF8Mz6dkj2sq7oN/cOtR/1+SwRhAbTxDWKjbiVbsQWGkcILNJVzAm7FD8Sze8EPqan4Mh9l8 +vqt0NUI6yXUgqel5AKgLIM9lJ2lgscZdpakhNJ7qJunss14KkHT0Q3jwZd6kkKuiLxyTF5oMP4vw +Km43I4HyNsYRcGiZ6Jg9+Y9ModEpRs91jMx4was3Qcdh3RQbwqn4j+K4uLJVLozo+qaVl70CfoPG +BtV55wSBF0r7Vyiuzl2z7GfnAchwJjSKMUxmZwopmanUjqZDe/f/1n+TkcbXjk1FTMlSkxGVn1sM +PoOBAMl4954Mu+ppJO03bkrJJTebL2UhlC9RarzEJSnkA5sbYhw/gfsfnMXI8YZS0u0rTj+qMvI2 +HJPiNjnygCj5JOpUGgV2Dimk5OhJrbUE+ygotIs1gVVjG4JxvUBTKSinXakwy4CjciOilFIIwm1F +FNBuxViOHvm/D4L/Yk2PMWF6idTM7QN8nhCO+oWz04w2YTwxmrCcADuwTFXkyraetGnKGJL3m0OR +h8PZApOXE0AigB781we2DEp0L+IJrNdDPVtU8uDqip4+xMbYvn2YvF45rD9kttKPJg+15116Nu0d +W1PP2AbcEH5abj5TlATuJETvjCZpsEHa2YViGS6PA4muhDKx31lufUYua+5MLVskYpyfXTP5uQp9 +sHbWUM3z62RNnbL0QF9+K4S7ZERYX4jrVhn1HJiEruIsdaQ+QQsKs1Se7cXrfvGO3fOcyhUTxMzs +eKBh+YILRBsKQY76uloHMox8ETkVG2LzDFYfPnlO5mwYEXdaOiZDfSJI1IqIZdT1wtkGnjCarRHo +tDeJ+7kpQlweb2uBPuEEXJbYwuxozOS+kmUQQQA58xDONYjMIC0o1G+Do2BCIyP8vAW1s8sB263U +ov2wYJOmc+hwLWsSiRtj+1z9YvJbU2qk9Q+7PUR2nBSTTaP6VFH7m+FuObkDwmykV6W2Qh3KVD7L +j92pcdvUgbMx/dwh8Jovrv2ZmTvTEmCuF75e0TXUONGugy03BKybnHYqZ+ZtULulJcb8NzT3UDw8 +4v0DUKyUuIj970QtO7ElTTulTzbyf2DLahBq79oKtymQr4L+nepJXfRA5Pw7pJpgZhk7SWHiNBly +Z3jhx/gW1hs4C6zifJNP1r/C0BJoGSSIqht0uVHEyCuNISsEGu2X0hWGOSXTgzPpA5sGplp3lhFN +nqU/SMBdkW3yb5LS9jBnPTacgYYEFB+cQii5BY0WiK3GAEGffyiRC1oa67u1uYeJvftHI7qpcNow +/1NZIW2eqhz8Mw2ucXwt6P8ldRa10LrxhonR/Em1CV2mj1N+hDxEPOtKxML5fQjoVAvC07fYNfgX +Iui4n/kqqE/tMHX114yjbzgknTceuWD04Qvw49X471UyBDWDXawMGJl28Tjth22k6zV7ljcyo/XE +K0L9tQ5iCanQSOpxqikVrL2cY2BvzGqrBNAN0ww9XVFijl5N+OB/Gka+519jUco6kn2zlwC16kJ7 +tJUwf/BMSNKroiBrlQtzmj/obF7QvR6ev0wJo60GnLG+1X8cHC219IM1HFsJX0NCQ13A4JEeiLxY +I3/L/22wChOcmwFxC3r1/YTT4/PfN3F6TMt3LFDE2yvVJCzC703l+qldZsADK3YJDVy+OpA67cHc +fy0j7T2byJqEUpxBfzq9pzSOM91aJkm5wVRCmOYsMPWK4O8hbWknngykKtWD0rR3LC0XTlt0idMY +gdOlu9A6I9BOftOPfKzwCHdy6RCJHPqXLVk0ct3ezuI+XgnWCMKeJalj8gJwa6YfMR3lf0fjceB/ +o+KI6hhGxcUE4clzrGEi5V/ldUxkBCsGeY8BDSbQoUBayGD1pbwvOzUFa3WxY+hFvEZWAvz2RBBX +kOtHx2BRCVTXZbQyCNyu2pc+nKj++cIzwI16i6WQe4up0SuAeyoP81BAPK/NnFlMDSz2jxNFyQhY +ci8QlP0LshLjNyS35vuqYfa4m9c4ThKITQhjBC3d0C0UlcLjdP11iyiphq7TrCkP1McuuCotifqG +KKYBwIbGWOF4O2x6PR7YGrjTxsKRur4wuZmZU9Gepk5pwJ013rbc2VfOGlWXdXEubCRyoSNtlfzx +AzdwjLxiw0bnEqHiAD796p+CWaXxdmHYO/tUbV/bAkpeGthxWqI/3WbtnKn4atwrdD94ij54xPpl +7CnWeBXIJ7/hU1dv15EuGuqj63a2Fz2P4gHuB4tBnKm4lASBzN2XIcZuSEQUDFRP5ywGW0aaqoVg +0g/m8RUma+FtcVLOZmHSlXtEYNXO4KVb7Ot4Yi9HQHSiZQQsRCsN8eM8xntB5BzMOOeICCPGkIkW +ld67CtCiL2aE6oiS6wjWjxLmYPxPoaaJBGAFBHv8z89PpIPqoAK/METXGKBvEqJHxRYgcvCazUa1 +CGal8L7kG+AAgYvVA0owM9a3evJBEE+4TCecfZFXzmXrNFfyc4GinLmKIn4Afu6bxhBDUay/OJdH +YWiDgkbxbAxjqNjLCEXAoyiOOm7qvWZrV9TymRrwRUWh+60y9lSADLhuhL6r2oois0vcHa7/96UO ++WkO33KXxU/szvCvu30XWMnAFtKK9FJuwzTl9HRInhl7teqwu11U/gZRWtUh/4oaamoNVYWH/32v +OZntLIH1M59fZ+I+piwYiH0/seXpuVAtiYePn35CcQmnqL05DWbmDc1857xm/jHwpRCflSNUR189 +5hOcoRMYzgF5OWp64WLkDTGeiN/Wuu7T4OnInGPVogqvNPJK0WSakJ5lxweZtu8Xw7MSUX9eZwAc +C+RtPJKhs0Hh88c8lMMzB0w2zwSc0WodY/KiY6GaDiQto2PfrvMFs3VCgbxuwiFYpxX4fRu878A0 +BK7ocyLm8w7gJstHi0x56FWmlb8wfnIBDdDlaNBzf35H8ZZX2uaLEFAnkeVY19PtIASYrUKRMy5N +9E8tCX30Wtfg6pPzDrixI8d+a4LJGXuZdDyxy5K2LoHk0LhvOLLNwvf7boX6tiR6lCe4Dej4LBxb +4GMFrZzOLy0/IWE77ni8ACWb/mOK/6nGnTRwhA+EziYwDdN5WWTsRqIm7HMUsad9q1PzhEY7Mfpx +byQ7OR8yLGqlUSZwRP5HhTMTIHdnooiOsUxPjsTUTdx2O/OiTlGjCCVgk4fcEvET0NoYvYyluQwo +jSE0fism1YNmat0pmP7n94Qvkdottkf24M4y5kzrSp4LJz4+8hKGmRdnfizJMtYskrZldNf2XgH8 +Jka2u/4mHRs4tyTebZAfjEyBAimnNEBCzdmfkCMwx7olkHTTQ2oi0dv/xTYqYluMuZeNWQetM7pF +8pd7JF1POfJS30AfDUoW9nURDHriyKIGOHhLcVhop8R7LT/8fxBmXuUztxIi2enSyI1W16/nYer6 +CnS2m3vV5cnUSWVz6F9AZzr4toX1SMTaxCU6bCNjZnEWm99MGaYysRLgiAGgJ4IgRPKS8Yxy27tK ++njmb7oPgG8mWfp+cMco3MzXnUBNVWKxyPLhqINcGz0U/7WKqFOUZYMC9J8nA31VwIcslg/QZ2KE +MKQjsM01pc3AM2o4jDLewStGpjE2o4V1PQDnIkrvs66Mda887rLBBEBvdLcuFLY1HkaoXfbBWAm2 +j+02Ag56gB+a4oQ2zco0K4DGAPmhimqhTcodlcRpwtrBFZF4iltCSMTEvNOnzXEszPc7h7KaphFi +Vf1nh9gkONTDsmTr6z92cfBypSs4Vy54Tk0oPel1x2KL4RkG+hb2B7GQJiYuTuIynWUX3gV1L+GC +7Ef7Eg2/CMRE1GEjxWcyTNWKPbV/PaUV0cV2rxSQsnK2FUJayeU7nORpUHVb8IMAN3oqbMFMZn52 +P//LpkGdbKgyZOuZs/WYokJ7ULXXbVoG2RXKvbBdOAwWPOZPDgNib5Zyfb+HUX5KBwHFEoPPLggU +zDi+GeitdsjoNIHqMCgPk1Wr6/lKhtz6OAA+PbhF/k5PiMpJSt4srlJGQFBr71V/zyFzETW0ZtsY +dcFTC8V9T7rp59t1sLa3J17p1fMtu5vYsMRLBFjgeoUNkEGz92ppIcuOZdgN5cLO7eWPC+OCqazn +QBR2nUHONBBPTfgoZGcgKhmtMOe6Gk2jVbLs05eFgvIZjPJLzrjx3QcwCJZBEhnATswzkNJY2cut +BFdGKWvNCWYIx1cDJVO2NH+SvXhCMgnyk54c7ssgexMEu5N2jBZ/g4TtCpRLaxPa2XDlSqdH/Ukg +QUtgJg/wG1vj76SV3ZdkCXHPD+O81pJoZ3qBJXtgf43LCYUF7cn1JqFN0IPoKHyqwloYb0m1cp+1 +0/Wua3aKOmBqszDWyHR+yNFJ9aIPTyWZ0N6AshcEy8ztm6EBKxplhiSSdJdf2MfHce2Kp6cR9CaT +gt6tEjGmgHZbNClei71F8jRLjoyXnHWyL9LJe7/0hBMpxHpCbY16T5Nr2c7KrpET5pqumbdE9h/x +E0DHfsNQroX0kd0SKReDMcLM344yd52yBbHCnh4g3SUAcGM/GqvWhLT5v2ESbM5iTjmhawaEgn+m +z2TQM9X+KcMmfgBLm34Cb6/GwohMucKFvm4oLyIq4vZB4hnhS6hWz+PR3hE9NVQbh0/WVh5ZzJEF +LQnDkshHM72Ta25OTXfs7UEO1HUe6U5fG3RqEJ0dJbZQ5RpfwxST13p+w7YgFTi6cJmYIyeqVxqb +GQ5xB2wG9qyt7S467FW9AoY9Ghk2yPJxUM5GJAbTPe0hqwyEe9Xrp1ey4k63OI9cFhvSIG0BOYZM +bFfNXX99RmnUh+WaRGrUEWisJ29p4ifkF8BwgSvCXSlB8oG4MfjluwHcU5CsdSeCsyJH0YOeKvUU +JP9npl8fQ455wGot4uWSU+zpX3x3E/mGhFq1BF31ixMYhDMWW1q8znOSNnK0IB+qlKXhdUczy/Q8 +6z9kwAwYD3BAWrhBQNsqQTpYXJebC0jRx623RSZBcB1nuSbfIYE8ADQMn8DJmEU3tffQ53i5xdPg +5Ws7h3HlUjtOqRU7Ers8fnrl4krXXLMS/mN1+fhD7NdwRi0vcrwsQD8bSgHQ+cXuVmN6xC5VFfdq +2EJ54Xwryee1OHQQchKBoYLiNMr3Gd95FxDMbfndLhI0DJfYCKdG2bacFAG1aoOxs2c7DON3Xv5Q +ptsGJwbS4mI+j3rk5MZJjPNla6i7jgjLoawoOC3rlCgWzdhK89/1Qr8+HCK/FFDS4nJ7RajxlgOK +JG+6KamvMf9ySMmpwD5DlZ3X748WaEnJTJ3hhFw5kTMtsNmMdt3r/5E9eQYJhPNiNlFiu4XFiJ+S +1f4INOKeMMrNqoaWtaE1YauJrEjegXJfUbevMnmel/6n/1ivk7EZkW43uXPzRXCkIPFgK7sfSBnw +hpclCozGQw/3sablCtcgmtqryOEYoP9wgBtpaT+FL58oNexOTHm6hBoG5yRXfVwCB+FfzbDEzUEG +mGgpOgqu3KdTSmXQgXxj0L080Imgnz5bDIUEHTF4WNIzca/V0KE3qTXrymHGU0doYPt/4561SrS6 +KOgrxp51scq8HMB7gZzQkEODcO7aNp81VzBJcNxWwv/2GU/bOpQiuMzdytyy9kJELhwtbAiuQSin +yYu74RB3sS0cedSb4l7J4Jr4BzNyTQE5d32zpWf6WCe+07Rmc+nRDUOBIawgy15cZ5CqMCZ41epd +lvwkRLDjTeW2uao7nd9SZ2/3KYtffU/Ht+Y4VG8HPUHf7I4AdBscZMuV2U/LKOm6FqKegkIW2TJf +23b0JiX15AH0eND/JoJBHZ63RN96MeGupnz44vUw18s09iK43EWKbRO+Eq2iX7yoi6GuoqbdKV5F +lRJtChqQlvm72UlpTykQiCsBvJJl6LBHkWlRvt9oyJclPDiUZI7Ndzg0a2u4o4XxGi4C7hYe0Acy +OVpfq6wS4UFfAQbZR+gMyeRo8IZxmSu21uXjKDOebtRgMi9XJQQDlEt4GVaizisn6gOqokwYBYtv ++jkMEW3MYw5J4QzVaR04Plw/NeHufNw9z8rIfdvl6oGjbAI+x89EMCPEKj21sReVR0OwyLmstxtj +XXQPD1kUrWGWhxyWvV33VkxYqHoH8zxWskkWKpK5k6+JT7ll/Psxlom3i1aR4YqXaCgEJwq1xLur +ZT4JQsuTYOgAUIIlTPVDN+3FgUhuKEGR+++uOEgTzExQqq7Y0lhmT6e63VMg7amKHqdG0QUW8ACJ +tezfZBzI+JwiXLth6EaFkg1CBdijCsbWS+C3y+sE8c/QCSyM2J49SiPwcrdLxLA287M4zZwVZ04i +IfAJW1IOmvCREXpp0ngMAGJBuwi38bUB20XSQsXOXB/wFVVzgZ+a9NUabyoHP3tomzB1TVx0bsKI +ZiiG/qsglfGVHN97K6nS0xPAvohwXaZkUXwQ6ONnyCmYKB5Ja/2S1dQyiPwiQjuVTuPjfHK14Hlb +LE2aXLiLpq76oUIcR+yxFNAgUtj/xoiWFhqfWdmIaMwLpi3PL75f0IA+tKMrxDwaM0yLzZL+7J2V +dWgAG4ppzKgrRHPTdpkMmJNTQ7HKtn38VOCw4QCM8LCeB6D9tcHrOH3HcDywHwWw3ALQVAufqwAm +xrYfqOlPuZVymOTK1Z5sT/Jjz57Ji9PpdIaPdxYIrCVmndq+tETfrX9FGk9vSIlhoHn6MfNZYSwp +7zfOM1C5E5wAVF68N34ddX8yW4YsEDzjnwL1b4svBM/a4AiOVwsGTIYlflrKuGeNGzaCSQKWmt6o +DQE0L4Bzc5ep1/pKI4S8VnNKNmymFqXuGw1tYGqbp4MuqSRKtXpFEZvckKUVUdH+cGI/JO0gmbDP +OVcprMeu4iM4FwsZqS+U7w3uMISpic9+RrbK0iceebN4RgjU+kT/dXJHdKjPAaTN2zYrGsL12gND +Gotem7HEvr4HOu/aW22fzO+LUpd8e36DOIKAnrRAzW+b+lOqtUxrcF13VWa+ooYPDR2dXjEUalFN +cBVuhb1cbSRLtC/R1UYTZkUJW3ARljfOENpt/XhXVvdpw8Mw7h6tSw8jZj4ck0VkQAxTTG37zc5t +QM7wv8vHE0S0z5ByIAr3wZpA7lk1/4SKXouABw5n/aVXV4748bkvdKXgawgc8kJI1Pg2M+M7qSco +srwTgjNmkH1BK/BYD6BeCgvEVOycaXPW6N6xc1PoNAlqfONrMoH8402BdaKW8Ibdd5BGyf1an9Ze +I9p7c65FqESgVNCMY2lV77Aq01lUwCYt85EhDD9ugcpxUoaXiCzjiHoIFN/nklzpqc5IMBPgkUd8 +MGriL4fCd3HgHJWx7SuLeLgc1OnmVGG4sqgU0WJp5r2miR6+EaefVs5CBzorT9hKFNtP/CbM2+ZK +QwpX9AB+MBk9sJIlad+r7kvLTOZ6DUOOqhYWBG++htEW99aYjaZnjpmKAeleCP2c+ON6Jhs2FWaw +/I+uVGzcji0OTIeZ0g/wOmGdpZeyYb84ObqSKrXSb+rE0B/1PuKH0c1qJGGt5tW61qoeldtpM11C +RGEiTKBbUP/yHC4smBL84g8kVjBmPeiBiFdGtQLyO5q01aZVInJFvcsL0Y3P4d/XbsonMDsQJKhw +aN4VIHTZzq1CnxBW7K07S0ZxDf7tj4QbJykydGh1euymHdnjdDYVmvMUB1N8a+yg01LNBmkvkL/q +3dS87dlt0d24szefSnoLpZFDq7EtV26Cv4D4Oru4ukNkawVLyDMHuM5icuMhVV8qDBTTf0/LFx32 +iJt4rO19fKFYA2hPP7DLcuOjMsGoDoepsf2dNeJU1PLIcVk7eXUq0AZAhxCdzzlniTPSErMefXxE +VGPUYT3jOlfocibn2AOnGwLPe0EDX/aCE6ETUzVWXhcF1WqXuJtytyWcRDT/YOswhYDyyLmSPsV3 +vFZzKyvvTyA0gIDLsMFfp/h3vlt5kt8zjADwgFVjbmdx4Gj3u8E9t+CsJT64IA4MJne64ANmocSC +/Lhs6ih1/AkXFC4S7bHHzS0y3xFXueEdmprr5oZQVZbcnsHeG84iOM7UMiZNb/wvBf0cJetk5Uf5 +odT1QsttJaaFAXpkERmiUcEH43v0xmtIuz5vbZfjlRDtc8ivbHOH55Iw+Uk8t33Z43jUNyiImBEa +x4BfeghBNXBRCAsheCnG+IurFoigGSiW0zn9+gNfhJutZcK5Maf0bc8G6ist9w+ogSwTThzcS4nx +O2O04z9IvHWDE/d5PfD6vqPLJQmttCAfNf2O2LGqpj7BJnUcefbp/i2NjGOMTH0gebJjC8GW4e82 +Kvtc691scKfZXqtdi9CiqXg8k4DA6WB2TXLZT/4rgszCYHDUikDYrl53qb5NJOc2vjSTYuoQ2vRo +Lj4jpxyxEu3a1wYxskCaicx7WpdDJlRPWDAI7OYEA206bHapRuMeUaVIx2+rOCvLDloBILHY8Zo+ +vHUKjmQE2aK10nQmlhmCgE8/LBlt/2+lXLzjXIHg4Bt2v4MqPV3FetCj8F67xPERW5Q6XKPqxMdg +N5tVVpSejwtihYZSsCWNJgcB/eWRfD+85O/reuMsO4PAMgMGsPQapQ2jCzqjrgeCsjurXKHgKWky +smzLoB7vPguxGufyoz54BZTm/54ggCkYbrLVL6qokovFuI5b+H4UkDS/siLaqKv8bLgqoyTbY4Jp +s0MHgEHp1A9jNsKnKZrVlo9sbhNnzNBYLNLzl6+u6vDN9sHXzjcYQJeXGYdGszQYBKcdwg1o4yX0 ++Em0KOLM3uYpEjNuIc/5cp484qQIjY/HK3J848k0UvQSY0+VbyvZ2nHPiYq5WoPXi22b0Vx3rQyD +QLlbF+ZC9p2MmvHbtZ9e3+GZ4Vf+dOnW6XyTBImMNqxKtsIr+omwm7x6OT81/Qa3k6nQ7ECFuluO +FNRTVjlXKWG4J+OYd6QjbMyHlfEqJXCcVykT5nJVNY7H46da7gze862BsSlU85XUOAu9cewKpAOl +l0WDwsct/hzJEZGzUwitQcApQE6t85NWqj9OFSoqebuVE3tIBZBpOh095WJJ/zvIcNBzA01+eURz +czZWPxoYJwxCIDUyonunPT7WAOQCTy1l3BR2T+3NICJf8ky5lEWdyiw2e+ZhsDPHTC3P5jQ7vKIu +5Sl59P/2BtbWViDCCV0aMDI+AT0TPF3jVnhOE7V4EdXZqUHEVXtsVQzok6ViEi6l5Ws+6qZx5XZK +yd8jdsZ8AxIWTNMllokX1RFyhi8vDaJON7BlOvUkWDnZJSEa0WMr0aHYB/r4u60HEEM2nciH7Xwd +Zng2bAa927+7OrwrjUIYbpXlvV7H82d1GzatVO5i/Iae4iyoJAVR3G+R7+SBk9ZN7q7QIf7Kiuid +oc4CkjmE3PHxiyQX+HdxG719C+pnfF2PWSb0DpC2LBfZaA8gOw/9mk4gUxUZjbbMs8v41tFsi6jS +fV4HDODiTs4RnLYTQEkDeNx85gdUa9Lu2TxwgKXRuPyekzVBwtU1D/BYOmEXxmd2txQ2wWpjebR5 +EEOFbVLsj82IBs1T+EB2l7+RI75jH6TCD3w7RL+OZGB+7Hn++fOgg95n1YIdpP8pAQV11M86lN9E +zrPQ+xSx727JhR8EOTGHMCuKr17YhKdjaa/CALrij8868LBeuEiF9t+imsABNmuHF2TTQj38MYds +CP/nEjKVhSppqe1D6RS+Z1Yoh1zWAlWbp3ST2eNYrcpewACD37FiAp6ZFoMzYQBqNJKDYx4dXuJc +ZfkjqoOjc6XTdMbeb9bJpRZHIkbUVTB973gVSPJchQ/HFBIRD2w70WJxLGub77s1UNdgs7yJX+gZ +DzDl9QGO2VvoM663S1qKhIVDxHLeipJ6IdKvH2MLBGYLT4cv59O4U9W+hVRTirAil5lMF/iVdvQA +3os53MBXE2fdN143CBm4ystIRYqWMXZhvpHCuJZorcrSRoVUvbtUh9nqrdqS2zlGOwOScdQAaGwJ +mV47tA5JaHkHKXgy5FbAqLuRGJxIb1QkR8JdmDHHmCjzysITMMvZjRTayptPIGlRXHYS2mH3Jwat +uThBlI6jfxsOQ7iz/dOb/8cxsu9CYPgjm9f5z1SAF0aYTkbhXbRD3uh/dGooPlfKnMuYvxrb0MQ1 +O9QJCamEe662ZkM4jUTwyxsFQnTn6TlJF0OxlG+6eF1aHoHXFvMin25DhxKIub5cqz4yhcUZu22R +7l01yxOKCnb8K+fTm/cIKUUX97V+fcprFLA69s62bkgxxcIxB5FKZRxz172VbOxwTbqBgG8eLDIA +wFfJQ8YEbJgJt2EdCMsJFtL9XuLlkgfbyCmJS2maHvTUzfg3CzIykXXfRIILR6HgoCdulH7HZRtG +AOpJ9hkuYE9nCkhKg2RKMnkymZMMrxA7VkWyPVM8314N3UKWXmYG9BsOCI54f7xjtA30K6efKWjx +2AkRW4B+qq+5L5Wc+DdHxCjJPje+J8JP9oQDhA9MpTUDzbw2i4nLI4/G0psr2RxR9DO4ylTEQnCW +6MXKWsT/v6H88Bcj0xhUXiVzJnnzxh8ycW6VF16s73vJuK/fsgdsTkZ5iAk8ZamuEt52EIqCRr9D +/TtBd2Ef2CuXDqidT1Qm5tB84IbthNrNOrOnpeJtmZlrEJocZf8iBqyeCw9wNfAv1G3RfOBn+V+w +DxIdImJvV300GkdL/sg5JZQ51wjmOWYm76W4NN+8jNUkn+vmlvLR2mD7yMqwc6PhWHCKWWxnoyiL +0vqmvQ7kOsDY6YsF7rwmxAp9pjUBeXPBEGGrvThPPD1SW2CqvmfKUTpxcgtwUNDEN7OOYvxQJ6GZ +2K31wytpTAI83ttQ3xWmioYdNP3JCiofmQ8Ttniopss9BKJbungAFeWvlCbPB16Zda7gB33owZFf +GT0AXRYFx7Csm0gMW4wtN8QCK3a5GBe053V19JybzMcIqsOcotxLfmIsnciwX17QxA6Xxhx/dZBq +F9mlEWNbmtPoFn1hK2npqG10njHbIrneolZYe76dMlop0yAlmHmVm+itFmZDCKTluBsrCSbY0h/e +WS4SLR5hvgWVLQHY/G5B1TC1uvloCZGBVuKkpBh5GlLhK4vtCHoFFn0UuhsNeFq41WQYGGya9Z5+ +tpKulwqLIHgQrMsXbuqJ4f69BvktYxGodhgg7Vt3VE1lJ75064Y9M41xt0rLJJR4Z4VH867UgMN1 +LIeBRHwO2dtb9XpYBKF4oc9LSSbdsDA5Y/AysbAARvvnmUqwdo8p2019jBSzn8KvWRUY0miWkIul +bRoPvoZ865xymvP5SKecxqT/VTMxRf/bx4Yn7IvkyLl99ShRpxGtbaxxd2vuy3LhluVEe1N9mw+G +r5wHza4uU4vfR2DfWiEO2bLVDEFZXXMkk57641T0t0tGLOryAPsfMluw6K8ozz1TgtT09va3Qq/H +I+JLZMwRbwMXO4x3tc949marQLJrWM05YZCbMbi7QdKoQVtcYXYrVD2Txn8ulDAWgPjJqjcmj7x2 +EKbNeUIU4XRaSAZwGi9iTeBuK2cVOAUv3mmzILhOsFqlBTulsoJHM3truriOHyDq67UIFfL85GMN +RJHG5xTTUuOEisJQ1ewk/Otc/i+l53DqJTyZrs2fPtsZGq7v8IRwS/3UqeyJ3RLj5FOX969ii5GL +SU9EZWMNGhoGmifFNTMw7Tb7CjPhPAAaRy5YMpSBG6UiNziZyJgtENFc3gx03/s2+gUzULnJll8E +exliLAj1m2gNdIvyxGz8VzeDo83mv65q0CusXn2aKjVrA4tx8aS9I1PyVsybTjDpHZ7E583wxsl9 +zqlVBA8jaA2efku14726uP2+MtCx9rVopNB7rWY6EqasuXPssL219dcLkmB3qqTsBdDCFjMVi+kM +tHriprHO5CtZaLNn6aKqmzYUxSJ5Cr+D4EqoCIX+15AhZ8UNReHVgjWFGeUMlIdefSOiF4LKmVCK +0wBpC8iLDSVXfIxlHlHHrHRIvcSo8NOBM5uvt8st2zrwmLL56jqCg/4PRuUhGJ4XGVUu12SQeJ1n +zr3T2/Uq2Xqqbz2RpRtOB1B03j8jemUL4rsJcJm6ovTPioFqFawLilx9zhE+Oo5sAH+UIE7lDm+H +DZsPBnaR+oFmRua5rvJvvZ9UmJmb90WSpeovhR78Lx0TjwzgJMGevE82q6ySTSVe2y9H03+lsriy +4sdNoRrWbpxSdOqdSFUGHv06iIGN/mdRDxDgATJ2NPGlfH9xOkD16LeavwNWznvBNbfVpWVImtJ0 +EUH7g3N6VuciW5tHwiaE3pApslhnzqiVxjfbrDC3EZLewnIVs3NeaDbTBttN4GUmq/UkHYVDiMCS +TDmV4ojglzZt6yZkGn01XKSsp2yXN4utsRJEAOCHfYCUBuj9rQ+/63XSfHCSYnmh/b6Z+JX4FNMu +n2/kpjfBUCjO07hDJFhOmnl0VNQkFobtxlzUnk17ZJsHCxofQHG8G5QIxwK7BvWA32Q3eIpZ+rt6 +6sXtG/h/atg2Q/kCDliz3IDc2JBSGxA7ZFU3gaVX4yPf606FXYds5fxIFjQuwN2tMmXqVbDnK2bw +GxCStbnniijxZ1l8sRQLNhQ5Mcv1nuyBRsY2HE0i2b9mKc/WWUwN/+DsoPYW3sQhI+/nOQWehw7c +cS0vMKgYqUok4gKhC4jAIh9YrIv46NVHVmzBQ+5wiiHyDcbprWW0Y8dkf+94ObrxdqLtOK0DLOPO +ldmCfUB+42g8KpiY8dVIe7hbT85J5qKqT6R3ianPe7KwwXfh6w8Fk7V753v27l7RV2Sp91ZTndLD +JjNCQ1qc8mPXv22vgRi0csaZUFCoxD5pxrbzjlFg52EakfLEmsD3yGQNvmnN+QjrA7Zykyonygsk +Az/KR8BNO9PMsU+z92GoPkGMrciGWHyTfZ+DUhrbCixQFYOoqBocogV8RHskparGnLexQ/veNNos +R9Usllop3dkxCtMpLSNv+KNHhTA4TUvtOG1Lv6g86IlCgVwdpZhQfdzfGsm0jlE8mPFW/w84pJ0j +eUugPA8fy8ZqTIVVrMuzXz1zGP5qTGkLRx/agHpBWZKKWNG5Sdj+NcZk7l6gMYOaWHMRjDEvzNBj +Bm7gpF3+OzOJitozOJziz1oy01ruw3SNVWxxaUBjyYJDwF4BlvSf25vq1bSox+4a7viLyE2hd8KZ +/4TODwesHQV+WC6PgWCrcvWjMgS1zNrjIgs4To43+T4xO91C8lvnnLR9jfTmWfXUjgIgwCtUPa3S +ksA13DL/QtTedlclEJoi3rR0ttn7PDFZOMs0r6wl/SvDcvaXKQ3rpmyUPqF1XUzZ59rlKjXKqxC9 +ZVu1BmePcHBfH83kK0fnt15wqKy+vO/S2/6+fz2Gln108yezrz8/ryoHckZr2VhiF42dORO27eM9 +XlMUrkhlf/URpAHify5vHeTwuXoP5/Hyw404TxUpR6LOv4N+9eYSw8YxHwEQx55t6rReyYdlvCGe +YmcE8KAtQodDsDWmP+A4lLorwp6bgLAmtdJMDdAHWXBVMFsAFi/C+Z+tOsRoD6dAkp7LxwudOaHH +VUnvXhIQtR4XHYe0IP3jzJSuSiPENOc0RnWPOF5DCgY3ePLcK62ohvyBLYxoVcPRHn13EVBmcD5I +8aVjNQzGVZMuynmuV6K9auIOxXvCA5vGUgR5qKAd/MzIURbo5xNEYg8qlOvBq0iq1xQVzHraFbt9 +J+sgr3I8/HistXlD7cvKtw+y1DHYneV5xAYFvThEyWA2SHCtcOhErlGut+cULKMnzRRA7UyW7YfT +dGEuT+rUcR01ryzbM5HRs9PLCeXiVMt0xeNtQXQdQletUZc4RyQFdm2+83ITxNtGE6+iLViNlaZb +wFJoPZcwGX/1xSKpkZYBMefi56h1OO2xRZ8DK89BmtZDJDQVrMxlX6VcyxotGdYYrzuPo7jL8Bha +ROmMA0X2730z7rVPCCNoXjZuoO0USDiVmTdKRfni8O5J6CI43UefLLDiXKHM45GZoUj4+gmHaqRC +VCkGfJ0IcOXl9vHjRsYA8Pb2GK6XHMXqkk340yBNDiSH4K4OqhkrIGdVUJkOCEGQ7h6uAo5npiAu +9j6yzIALRURR0Lxmd4rqzWvAcVyJXadSYol8KkElNVXUCeyuS6layCaY0kskmpLNr2QU58GD32LJ +f/49M6gfrS2BTsOid77CBy5xfoJ2yrzMGMeDaRPZEyHGKZ5cZtWJO+C5JhPLe5Jp+qQy3/VzeASB +mUYozpOIou4lklewHq5ob2wJRSJrBg6kREQo2ztkL4fqVwKlDLIhQYLAlUPQIH+8bfyHOkpu15Oc +Luj4zi7ZDECUQHesWiPS6BvUlbIs73i5hOqCRE/Qq98XWkHcJFKKZPyU2WaffgApyM6r5dvIjzL2 +NS5QyK7RiPgMu/0Ipyj9STWi8+BnU9T2xKa4aU+2RkLLBwQpLv4k4VUPwEhQ4s+h9B4XFcf6JmNp +jfp6uSq/CHMuqCyEurU7OP59MjqE83yFHftM83PYGqMHsAWArLNr39Iv+tT7jh5RSMRUh2wnbLB7 +2Ej3br2JPb1fKqCtywODS7g91UL6JIBuCa62FkG27HcBHRP8qagwPUuCfENtDzMWtBqvBdcWS21r +R4EGqPJ7gX5Q/Fz1Tdbteope+d3TyY64GB5lWCeYSTcbNlry5iEr3syrDkLx32F2lRnB2xOqXN// +XXFbvk4s/OFrefPrEiLvDqO+dLA81/g4yjEPzq6wJ+70r33U8itcZT7BuSS7bXdICOo9DGm/MeBq +ihIzI8K84hQ8UbX3xFQiX7A3NZkUprOHHQOUM4h0qarKeYDCo3YvQIp6eJ7ri9xq4R2yysu6K1UB +AOyik9l9noQhVncOsnDO8CfQO2JeEPlhZd1naKCrZS4wfPLq28IRWH9uRJYHwuUIhDbMp2XOyQZW +m2TbY6gWmVGV6OE7jZrmLDwLfpfQnfSOIuqVreE+jCHMi+3KyMLrxq90UuIMxkMyhGxgYbP8QaJP +cUwMs1DfhV5QoiT31U47AlxLpecTXEzqgQJcm/r1faD0Bj177Mj7JksIqE1sKu3t74UO5+xCsYaX +Uwv7Zv4tJr3lkGXhZnOPhFytxWVadPOPm1lBt4aL8Jmd8JlK9K9QlHn7rJak7vWgobonoxVmAYgQ +OybmCQ+bJSEnUTfatupBZjarVOKhPXCEnRa9stohpvn1iSgTCsyR3X9sKESF7c1wsxuieWYVrQPO +++CntTmLu1LYdzFmPfUhwcfHoFlN/9fF93EX57J0Gc2S+cplgD1adh2+vDZJQc3Jbl1eTYW0nUcO +iirOU/EztXKPadgUCDDtB9/S0WKwKowgjkAJ2quAfadAU9JB4ACz0ZlYaDlMnPxlwI+2F6O1JIiK +MasWFCe/FPaEWVUUFv4yefBd8ZLfdTPWD3m0/qlIhOGzL2zsWUBcc2HqCK8U1V3PnG9jJMYUn2hR +MncL4Xfpe/dRO2V9gORgxr+46Zc/+R4KNl6hLUiE7MxPKyVOVFUbVSllO9ajMj1+Wxvf3H2tuaFQ +A1MRuO+DzIeS+nEVVaze+aWKkoSAzo56lfoODF2AxDlfGXCSlgI4Y6H7vFZhxMPzbNmL3Czpv2Vm +wvxYYSQV2vGk2XrxWnTRMTADnGCWxtIqHslvDgBzI9i3KcSVjSZvmnsq8QWpno6NkJStrV8NhXiI +G1uieHEVyo+n1lJYsBj5n+lPZfP03/TCIF3N9fLREo1SLh6FnoLr/PLwyBKGOgqim/pxoSbP/Dz2 +l8KlrdbjlfdG+yT4ONY6zw8K4nFPFYFIAknHJ9D9hMSBx6K93zU8RVmSL84zEKm9r7iAT3FV+Ci7 +VOZPkpi8nwxo2fojKpS7Cg9aGVHAG8iKfs9zXPQ1qsIHIXnM/N/iIAkTVXwx1qvffxN6ST0xZGUo +qrDp/XMFwbr9KBZOK1P5Q/PfzxeocoOPEQvi+OAMa0W8fXhhwduho8zL1N/VeirkdfMeCXXjAkVL +gk0qyGc0rexyICzc9GAWQj9Qaq4rHAcUOazWnHThxilwnbTgPXeNmLT/tPYHHrWEn40NzJ2z4XqV +/omqdOx0Q8lGGRe1hYymQNtor/RepMJcTrAvPhM0KLX+RyFkz+XRrvHIx1OyMxgdlDtkVvkC00gE +4Fyu4OjJG8GtADdD9XcXeoa/vHcd33bvDsB9zU8qFihrqAhJ4nZ0NTSdargYx+Qz8Q8Vq9SdOFRt +aGZUrwZIj5Cll1w6inW6WURlrF+D5fGcLa3FOQdV9FFg/KreX1jeOETZDH7cTZaJR4cb6l0CkSMQ +HefokiCCCvgxHqMtMoVD5Amz1sDQ2v0SZtWDOt924CWACzHNH6071i15OwE/DdyD3jVyPlyZh+Rb +Op+KQl3xTQfdd38A9+Jdi6Uhh90SVFv/wP2IafGS0lC9vIBlPpMpEMVKcSeC9i+NkY9mLa6Pof7e +y8Dvb26FQOCkOeZV5FFcu6SJJitYf4+WOjsgYIcZSgfLsgJdRxLo4ss613bM3PxEmKKeDGSwNYge +cN63N0XtGgabSxbo5EzSI5P2Pk1a9SI1EYN8AMwPuCj3QRxtw8G1fpVBjudpifzX3WNHwPbO/iCV +t0NcHBYhqc5sMfvIfJbYSiviOB2Sz+7QtOIR7uy3NdBH+Ze7EzPAV0Fa+p7HLokOQFgiX0w04Tn0 +S9CZJklb1ObzvKE0GlHcIh6pO0QsIeKugt/tV3E7R8hW1yReHBHU3L4lxHGX5u6NxANOoeYUWFVD +RfIJNWbkAB0FyvLTlgOy6juxK2nf9CH+a43zC3Cty/zsRVvDWYLkyI/FS2sIWs6Y5jrQ0fYQcBfn +6aitUMSrMxr1ANns1R2IzEos4XZqPrwI71Y1WbqA+jjP3qOwSW6Ul+PQ4bd4MmVSWAKlejadCfyp +VtUfqsNqJtNpxaIPHwlCg/smnt/qVACT37yll+XzTCuIy/JXsHdvRmvyEKXOgfuFdS2bEUZDYSPX +sKA+0c9YGXQVyaWsOirMMNuqqbnenBkM30rQYwfV83QhfZeRPqQiaeJ0lj3RbDxXWP1NmhkBO/m1 +zD8mPqV/ZoDvPeHVixrmiRAA9vXtQppKHMSeHzgAZxIKvKtIScbl5353nARVxTzbdf6Xtf0P3iKA +2YWtTtF5/DmfYWSyqqN/7CDR+ryi9uhOk4nXm5I9ap0gjdmBIx/N5E5dDmT15w5Zn4P0vN4QJNat +t8zQlzJJHZmt7EG7//1uXcg2XxoUgHBn2PWPT5z7/11iI4CL36jgV013+ANsouPNTxcKDpLDN64M +NgbFas/dWqlxcUzJdFqtBY09s7nlkn7qPW1ojw4gdc9QHQxbFKZ1/i+OaZL3re5JSV3TBBDyP30v +YYiI7L4O6Xhl0XUQrgdSBynJlKS2toZ/9kPT95yS6X8z9dx7aeLIPJU7abpzrJhHBxEiTbgnx4c8 +w6T09cHawsSXDqxnQy1TnwbsarLP0ON36RqgEA0kD/M4h0f1eLPt73hwFelpWBmBSUq6VqbRftQE +XldwvdgXEEPMn9c33Bf1WzQ1+dOe5R9XC07zJuOvUjO2I6sHVuNf5q1VX/m3d4HUfLSYGQjLr+Is +j4owo76CviVHIGz3tSHsfU27nvGw35Iiamcrk/xBXgWjt0DAgTMIO5THhtACXtEjhRDKGOd0hVqZ +vCNCNEGi5whdUb/GwMmbNx5y0nj8UvSBeSWdbIcvA6USQE41jZWvOiZSrGaWboBkUjk15brbumrf +6imXULGXM5PxAknbwZONQhyjI8H7JQbnFzh+u+TzLKO6oHHMSK3eGErMn5IUUk6d8bwvUA8xgm82 +98gKmAdnwc2SSln87wKbKG0NMANeSAMp3NcjKvKnW/TO2hNZYW8Z8mSz92B6arATE2Z9BmzeAite +ajEXN7lYMosBnR56xmTVr19igRI7CQMUvoHHny9jp8tY7LZtos/OdnTwp3cAwnOLKbZKPt5f8NuD +pyk8izfxEwsdmgLKSEqxZLvrV2g2Oor1rN22ueex3rZ3EMja3hfOCgHNy65qvnLcUblzJbTtB8E/ +gdYZ8N15YScCDWo6KwC5RsBpBxaD5DspbgpnX7JgrTM9BaZO3jCr1SuKiw5tD6+c24czo/VpFMvb +GlaPd9snetY8FIFwyfDXVNq5GtgN7+ReA8Vq5RnFH/1jKIhSblipWhScEtaZgSDo7Vfk/uaK9z0X +IkLRSD35EHUH/GQHWgHXm4epXCfBhK7CVNqVYmiV1l38lyzW60GIKl1L48EPDfyrkTKofZDiKC+4 +qshsW7nB1jUJ4ZuwrkDk2xXpN0toeQnI5yw75XfjqIzHyy3DnxPf8m0OIohwmIMYVlK8FFfEUqRi +31Z1/Ctw+pMpBwch5S2tP2WhmC7TifF21qZl+RUruS4MCBf15SBkEESaHWslfsDd4/hcFCZkIbiz +Fun4rm/ZyI5UuLkPqOYPuMxdhRb1iEMAksMY1bwcjvv/AuSouCTv3C+YicISptW+YKAdyobKzwAv +1wvSLCTaj4pW3VKkvw+RnsHEiJnPTELjeeR6O0Alo07kWwRgdl5BK6gKQEBvd20x1daWb/7QwtIQ +cfacMsPo6fJ353VPpeEXo6do7j0vQSW787DmYEL8/7nCNQ68+n6PQmzjuNHclibSPrsoF5SPkVIs +Lq6iWnI9WvjBS/ae9thfATDlPPG751PBskcpdUhj0rxhnuWLyjPziJCeqdFycMTfWW86QHD9jAQL +TQUdigci/3pqJj4Qq7I/Iqws/2rTZZr5x7SoKO64GJ+FdocGgcuY3sjC4a3B/jEVfLxKuXEaMY/o +xnbZEQo0J+sj7ZS7E8n9u9HCjRmKlDiB2k3bd5M2FYLQ0IEU3W21uo8TQbJj6xGJvuNdGypa7lMa +g3nAoPxdfmIy9gqfbiJ7ahELA3Bzq0SC5YuVehi9ephfLNQ9n0O14GU4/IN4k2YFl/0/QxMVzudt +lwHGPMYmob/iEE+dbXrFrHGzVLFbDSuOCYy53lS5vz7EZ/+Xwv5mjh5g8AS4+TMH7WTH3HwJYxIj +OY/FHu/CByVh9plzvFftfHeiHCS64LL7obWiGy/zZvBytZDTCgefqiYt2sK/2X7xcaGNGco0062q +kIGVorNwp36+yrpC3g4RM8r6QwibQbF98m5uN8i/kAO4E6PhyQ4iZzA9GS9Vb2EFXNRnW01UNWF7 +RFRpPItduvwGzxsSqWU7CZbswq9XlCjWubV8Kp1twXind4XUu6hvmUzyJDZZ0zwPauJf3K0HV50h +n2l5uLKyIO8rJ7ltRjCQal9YfRDCBQoHI4crXY/YSLIYAVRcjDeP67tW5/ySW704MBQTQxjfCnvK +/aUG8Zag/264ZdmYWLIHzpa0bHSMOdfXr6hCQyJyl4j1JVUXJz6+bA02aK4yZC6Pn1nqnTXv13Dg +v16O+DkhCRMUYAcKkG+OYR6sJWdm0KyyC/O5js1RVvVr1aGNE7CyQ66v2ynNMbvrCUJXqBch3u7v +A5E9Aku1ybo8ywem3Wc3j2D3nLUj4/4KeMmOMwdvexeKFFc0t3N88606DCK0yYlNVnnr+dffDQWA +Z1INWktZ79N/15zjBJp5OqMipw4uw6vTeJBJ0NAJQURMxBNUAb6PgrhTYhS5kqir6C656sNyGFuw +o45hlaD4YS4Cgkf0hjvAW7mM+fl7xoa4pgP0dpc2NQOFAJmm6iMmv2LmR2XgicTlHBPS5pCqB2R2 +0u1G1OMNNuZxJTjdSZnmrYDBnfOSsdXS5gHreh/6g7weI91i6d+1YKchVkghPKsa47atp0s3Ud2f +RcSNat8B6L0plYXyp9QyChoxOeJ664oa7lznVKFrCGgVVk6m08JxGIOJcyAGt/Z3DoBEjy3lSI+6 +aneJX61yjZ5opMJZ47rXh719QEn8+YWryFjs2/1GQJorTOHPszer9STSqq0AQxUcB4aeP/ZH7b8X +6eF2UUW4WSs/oUOunpHcUROtuApwR3n/Xvma4+NA0PgUq9vWzawRM2Md2XwM/HzGDNcw1RpTW5VC +f1axnQSswCNjxgn/dyGsNWRTzCv5NdSjqVm5jj8Qg+pZw7n/TczbCZJT01NyiegVcUgxiexYStaC +UY3lxgFr+M0036UakjeSWdAi5c9oolboYYIH1+AGuEip+3haVNzDqk2CoQw5O4THo+Rxbbbk/uE1 +Eu7Ec+5AY+R9RAfy2noRaGiZu3nlV7NN3dItJ+bCvs/FnskR4Pp/GbcfRb7K6OHW2/DRC1MakncG +ky9vFQoQ8xDmPMOeo85zUe1+8SFCfblv6n9NVf/ZXWoVcJeuV1hL6wY1GW2pxgOmQ2zvBT+dQqqb +lKpdWck/koV59m2IUBuXkVLFGiHvBK6gclHWj1jL526l8ZEiku5kUk6ZgXodZ0Ko8xhMSyAjAXWX +w23nmP6e8uL/awfw4bbDmzog3mkuPlNaU9amjK6D7SVvnkkBx7tf100n/ZvR2P4cbZVmkp877XRn +WBBmIesWTHuFDWuyE/FalI87DKHfnnBuuvbN8gTGbdnEFlUhRPFBWN5AQ94WnmpT4rslbPm9GhwY +1S/QKd7KcTZ76zPUhUeXxORIsHsrsJs/JjID2QNCyh2H0sfS1HCZ/agQW3wtiVOpG1EoCHxrwU8M +vbipeTgvvYGtV2aKnec+k0QcDK+uP87nk9mEE9bvrBmckJWWodimLgEBkwOjp7uzrUrUDuI/Wm0r +w0EVAkYRfieUJLmPfgncHhRQeB3g+Rwr2oXKJYTAIVe4SC6HKfwyrtx2m4kiur/DhR6A/ObDRJfR +CqLBxoH81ItyIqyn/fv/07RWSi4gZU3v7LwGRh1+vGVxo6eV2x/VmggCkSU0qoU46hWrapH5csWM +h6k03Do4fDJ256b/OfZDWX/tjwJiQ+LLa++mLVxPCceJlwXtp100Beod3djUgyFzcr61KsF91pB2 +XnLd8PV7ep4bkX5ZLaZ6Ne0IA9Krk2w+GRYv1jkFA8pX9hQsXr7yD7h2CuexsO2BuXRJH/8ictE7 +abVNXKkfryf77yfKIP9U1+mc9ymlJv62kzuAe1kc5tuU/swmLjllWQNh7qqnQCa5SojixlIntVRi +Av+34n8+bdkJU/e8sQ1nl5xW22xYkJH6X+sgTxBsxmlq1eeUmekTHkCHbGyOKaRGip6H/gi4aHZz +tybkQBgHV584rCKoAacSWufypyFm/whqg+0EnvC8baYr3XwWJ7RiEkXP5/NB9QcB3knx0c/uEwC6 +xLgCLxxeBynUdMfz4QFlogVQRi2HMg+rQwNO3Y2p35bokAaqzawm3FevhjJsmfyExPWWW+z5E59H +sdD9MSLtt+JjRbsMv9wX+Az61dxa7uQvZ+X4qfpE+D4E7dz1bWU4B+lBV4Qt9Y2gQqGVx/fiYD/6 +q43xvdgSZ/2nrWMGu0ZI6Vh7j4AstBQitGi5co70LYMFdMsxZ9CMkQIsj2dS+ibRE+OcIqnnAkgm +VHeThwq+mjXTtSEv55V3kSNmDoJ8A19yOBKlzdFmdLcwi/Y6jPk41WdKGafBCBAOzrA5D+WGPEkh +QQpYWVcxRt3RrkAAGxVbRoVwUZCk+YKEeY6PXsnD3O+s4IuIhTDAx3gEoQz3T/Lo0hmLzmKBVt0X +MYQ7+zMKa5pN6NV1wWMl5TIAf1AXqMqqR5v/FGvH9XJpXjgsdQPku8YIIfZM0T4+zC8bq7CbiYMx +4jzusKycsQpEtBXI6QGF8K6pFsRIDJMhTBrq7f9D5rbaBds0QyRzvqyaYyf8emG6lxB7QgeihtLZ +G/4/Y1AUno4rkb1/4zBhRvjCOTiEZVSC9cthmfwbCCMmoEl/jE3oXval5RacrUlP9+b8XBjlMUIU +f/wX2nbzCCCh0xWdExrjRRJROEbgl1BrJox4m+YrvYs1TnEkw5YBAn5sPVPH+JOqxCChvGb0SYJe +52Vy3GjPuBdVyUCKF8BdcmVnY5Ihd1b2sgiwPrZlugx28lzUaIIL9ghE6nFjX0vgKsHGicRtM7L9 +Bn4sU+AJ05o81xU4WBnT3YQptwDgGiXcsN1TjccM4U/hjy64gWbZ218Z9vXJvOiEMmnEYn81mrnc +kTD9oBzeaaWAtcfD8Lcc6DxACo+p8UcT9QxOfbOV6t7569rbYOojmrtehrUit+ppI0p2pEqA9zlo +mGYKYf1AZCBvNt4c2Gn6BnscvPvjLi74QNW/ekD8l8GuZuqvmrOt+SgF3pmvsJbwGZprHkVxZb22 +gVKJB3mKvcvWqY0bej7RkscDxMTL07+jNGxxcfDz+CPTNVPG5mGhlzzxZW0HIsQaIF9tJU0Vk633 +sPEdnV9vtgJDU1wzL0Pr2LfKTK16f7kHwp+SxIuUZsjW+VrkpIGgE9VL5Q2tXmARBzr1tZMP/20s +LoJL4B7maAE0P2CmfO85ilEyk/ZUj5yruHEmDHxLl6geemJNqOvLpNm/uf4okfag1yBdgrVVp6py +g4WF+RYBS5Fh5w0ij3AB8FWh5ajLFm8lzBU1lwqQ+7x9P7rh7xFoNlnVWC2Q68ZbQ2qV7gMe92yE +05ZTe1nAibVyDJchagpTDc6RNH+11P5VrtgG39b8560QaGqVSAjEDxPMOjq3Z4if/6vN3wpwc6qs ++KAz1A3BjliPjGWdzViG1SPUcojLSvpK0hoEU50pcRfJpJ6ZyJVHFBXglcz7y6tuD+awzFR+I0WH +iHpQ9kPO/dHyvj0E/jqSHls3i44aEIBVPK4W4DsEppGl2FnQfzieWDehVcrtoUYQzoISr24KqP40 +seivOZgCF2Y+fhBbQasggYaW5PTpPyajaoZ8EGf5YeaPF6d+5uzOBCNWYDpsuNBj3eSHJkOT6TxA +2v2gvF/zeAwiDnijuV2bCPKoJRqI57vVXJ2uX511kfGRe5RQA30KmUG8+EOmfg5/zpJ5DmwVLMxS +OM6DxnU7WAPNhmbOOD12RmcFtw9Sc6Fw80Qv+f1oe5ygMFpB85myfVOuBMFRkzCYL8WdNjn/ZtRp +FP7hKzwXv0JBgWJuo2J8WKfOZYUBwf/xI+xHDvBXwYeW7GTmoi3mgVJt85zjzgPeZr9k+2IETv3n +HNFyZfYQ7uNejB4xlOnEnmxS61Muu0kwH3YXt3O8rXEf7eyuDuALyT9ExKISU5SJ8MlkboEl6Zga +jX0GqsyETcZtMS4Nx/7aSPge/5RXn6UauT8MmsAyEiwwD4JsPmuRoJ0NPSVEM8K+cr/y7mOGetWY +JS+VPZlaSBeKSXbYiIUpvpB0t1gjQQg/wYGLf4XcqchQLdWGfk4YhopyjvhYLeH4NsHHbnhMJO9C +iH86fsOryTgAVKa9XschV3Uck6mz0jWaGSLLrON49et7OQQeBR1NgWYGgjTK1TJXDL26FmWn+GGg +S3HOIVmFXZyZnj4StI/JMd5Ta0hePTExk+UdFyultYRNLxdu1G2vll8PZ/5V4nmRgEPklOBE26Hw +1AXDPAQZ8kGSWaaHPj/o3Z1Jkd9ciZU0rhymvlzkSZ7g6dmHRs9B6fw6fTw9wXT5txg2wDA4ru3E +OZS6C3VD/7lgW278+kYRd+q0w0BSuDZyO2qFGuAugMGoFDardFVHV8MpQSFoqsITcA7HjzF4I5g6 +Uv3FgEleNAY5WGumpW8r6Yf8D4p6Y5MmJju4IURCf51IK7++1YW5vAu3UrKEU1toGYeJkUJT1F9v +abNKMvGcMHMT/74cB+w+vX7dHJszyZcQvzuQJy8vI1hQ6nUJQ3m4+2wFYxV58ZAwLIg+/uMlTre3 +Zs9HEvSLDbEqBvmTwFtfQ7FAfxZ+7VI2Zxam729z4EbmANnblD/YzeFHnREewpXG7X/daZ07VZ0l +i/UYYKJIE89PDwjz51tXhvJJz5kfeUtWbAEVxvz9p8mFj9x81EYlF8gYx2HyfQ1IgXu+GgH0F6BI +Xce2bdq+iGc3R+rrBynIu2rGQ6mhjm74pXa+aRxxqts8ecJ5ZoWHzLVhZPQtANPc0Hn6JcpJxNe6 +CPfEVzkjvJem658QZnucmd3cKo8GOiEI5K8QDmDhhTxdMprctDhulxGoBGawqqYhG7kmtFxLJd0O +hGLo758RjOhfxlTg8X0GZj5G2+AhhDKmHBgLY2Mro2NEGBD76qoQr9h9rD+DvIasBDG5hQz9ltiH +MU3cZrNVaM+8dBFSmx7DZH/6dRz21ChswQIudRtllak84zxpASmQPnaFtGUSNEGLkabktgklpRHF +1Bq0n4i0RF6u121UDo/ZELHx3Y1JUu2cb7OthzTwFLvQDRVUM+yYRHnYWhzpID+W30tMxFk8dWFJ +U85KmsbfIJfE6B658prLy0g1FLV/MkM0eatO9Lk/xS6xoF6gP6yo/5uJNin16KzNngIImMcEK9IW +/jrwg/uK+FavNEJEfaZX2GnH3J2m9HhTfRkCeR9Nfe9iID/KAoiQPIPcVYAMNcDa/5EK6M4MU9ZK +swF0nATREUOx5vKb8wNVAHAwYoWhKnQRNRBOSKIRTkXrsaFAMCVTm6fnNUqzgJzTQrvgIZF5/dOf +4OlRyPVK4ritVI4E09qdrAE+HMaVweqjkpciixzC0eQSkvs1fSqmP/YKhIHu+F8Oh3Ae02OX/DZU +wMUhAUXiCa+u7HvbaavaHXxRKA84W9BH3nnJaNSuKXA9zGqSLlMsufpVUDna+c1IznFVTHOtv6cZ +Ux7zEntiB9cy7bCPs9RZzupEXeeSWvKPjN7hCPimjdljfA6dMx9W75PJEXNNJx/t1m8Euwnp1kx9 +r/pHquQN0N6utUUPNFoPh3qfeWyP3PdX8OKqSH9ddT7oQbY0N55rTxX8dROdj4L4Cg6M70WWfz6u +mOk0bkiUdTeR6lklFb7eh/BVBLqMJZmPabpwTw78i3IMk1is3+gRm/upCotCjHsvPn56wlFNkShi +h1eCMCuXjJqZH8X9gZRgFFiN8zs4TST5uCQNQubDwfX1e+I8Dy5FO0/fcklf8rNfPGwUGU97469f +fhKNSe/PqraVAoqum6DIHvqzCs17/XzqRP4RdJBO1+v6gbVx72nGItA3KpQrQmdvvF2WkDROOKV3 +QiOA/VW5w/u2ou9B7uZp6igKNNHZMU1FjNUQ8+su/Ki+E2fTydNZXAF+UdiUa0hqCs8qQKvyT7pA +SKhYnalKA044/L3AvlLhyHbS4qq6w6zGMXGQh5aB+NYTKouBJi/iMa9TUKc2tT9j+NKHybg8M173 +pUUxKM0o8dGY51JR5GwDyKqr1j6G/QOuxhIQSweZA+9xKy0+5PjivxBrp/bBqKLHzICHSaJPq19Q +YObOV8mS08xTPxbdSeTkNNkRwTUuU0XwqBoRAqeSRu18dYE30G0SuApJYXJ65mUV6cIDHB0dji+h +zqrvVRuyMwpHSx+Q8lBySDiSFaaDb9+VXOm+ovZaw5GH6fvexeHAwzmPg1tT+kWy0PJRMkY8X6NI +3GHql7IeS1NxrefQ//5tSWN8AaZz8/9OEkeapPLVmp4DJs0C7YjGQaZJN0DllSmwXFa2/hQ2vZYR +sAiis2yufU2GEppXqV9sGlxItuhqpwOB5m/aaeVt4u0zp0JG1SCGK/aL2kSaocuuHLT+pBez1ggs +26qK0V/TFlBo2nYe644QkwtifVwYEFKi6k73bOvCBTl7DbSO4O2P6vTDw/Fwm9c6bcCZ2EEtn4C2 +/jS4GdvqCpRAMk97+EbdYMoa41k0Bpde0gHHeXTuZ0qhCDHFciYiGs0cfVGVVeL+HcSprtX6mvuw +dJ7TCDRCRh4zVsp2qlLaQ/lLFFHSCDREUfaduam0niIq5O9hz0Eh93esff+sN23P73xUbL/n4/HC +mVHLeD/87xyaYN0VwG4mEnGJUx1dddSQhEMJg4qjDz4T5bPu0RHAhUa8LbwFg5qogaIIAvbU4WKr +urfGov4mZMi4dQZEgleoDFjfTiaC0x5iV7xC+xcSfonUwXUlUHoiuPfPQK5npc8Dx/XZVoefqcU3 +Kcu7pB+A1fYhebY5Z8XfyHkFvkcsPlYo2HWyrVR8DF7L8dzeiQ+1CzSOFl2Gs0/ORiKhtHwaumlU +BNC6MkjR/JzYeyw2hyT+VXoDLMzt/VkZRhHdkcNxBxADsThP6Vwu46Hj8CKys1v0D6u9cHSFmhTu +Wf2ny4pPKnsURI5m1NeMEv4CFGK/OfvbMhhflO12M0v0kguTQW+sMc7agUICmMb51KbB++SMzf1S +BDJn5LCMCCNCuvGQAscMcSbAsAm/t8KTBsv1zOcAcJzeCFBNQ/+A77LkE6e5cffGZ4rwB3Xmkh7y +P1L3df1cKCn8dn+IG7z5qT9Hmmyn5q551acA+t4aRBxC2QORXCNLz/kzKNU9nsChLm+1DbUqQGFq +tkhXmkz1bzZUbuK0Gir6tDsjo3xSnRjbhlP1zpz7+rQpe3zidQuqu6a2HwOpIlJVxc4/ikQ4t1G4 +WdGT274sQd2idddV9WB8GxpGiIAFURdOWSr+sw9Kkc2EKsd4vyP5G3RriG1Jr7kfRUU+/REHJzpU +ZKwRU2TYKgKgb4Jcg72tQONF9clanYmlgMkWUTRgVvj+k8PmepGN/4f3kFI80XS6YIq+wpi5yO8V +d+uAgIYvgBRbtPS97H0DOn1D2Ok+mCl7d4I/5JbwHhEjTvf7Lc1hLMStiVwYkD9epeNIrqsfyRU/ +RjZPqK92wRPkAWGQkHkEz78tMfSEQJs0qeEWlDJ9J3pppZm9jVmsG+jHUUmN/a7GCyFfCm2+bIX3 +w0w+ZB9AUoufwRYrxhkjphFPoUzmthuw8IWajmiUYxD7woSuzq0789bt6Sw6232pGcUoeXhTCsaW +n5gXFwX1pdaWmxUE6tXk3xxDKRLsYFhq4IVKo0YO8PjB2l/4DMW1Uu7zSCny7xq1Y+qwvRvOukw4 +IONVJ3B2x7KF0EwUsyur0ux5c00nvwgxR8RK7h4tksmJWyo2jQyoYWGUyaE+q7kt5slnyc5jGzYi +DvEfqZHIkhm00ZYidSA2RkKTjXj+pnvhheAwpswgBnpo7mm+nhe0VJhYyT1w58o1OPvik/2xtKsO +oIBHfNpp82QSvOg/0AIfc90CID7QM82hStVRP2ZCbmVQASPbTWVniT946fd1dD6wA97KXMZr6G8o +7zCCLMEEOoH5XYV2BL/d19ZnmgdV43YMa0h+rii4j0VKAtkbzHvEEJS+kRrT0T3HuM4PhL38tJSb +12R4xdUibUtHc9FfBZJTE58mgGsE3Pe7wvDN1cBAb1SGHA68ExjpC+wOb4I36q6dRukSLKaM+Yjl +cCy3pnoXsn9YPtFqoivgp9Og5sWVom1br1hcdZyPcOkKLJQvEUV6Vr4ncyuLrycUp8mmDEEwXSVT +Dqjejx2moKZ3cBimMcnTOeNl/N2itG9TmeMEq6eyo5hfs1PeCzLkMpWVS7ymNG3zgMnayimLloTL +v0QG7bhZEI/hvBlRbaTQ/DjzGCbmjYceBIumPx/+rO7jlhMBCqkvXn4U7BVxkNnfLFs2BX8KOUH7 +2I/34Yu6f1Ek86cPMTLSfDaS8MQHpd0qkgNlEV0RO4D6aSO5digMGo4CmwYdwmzn2Nzv3Q4SYg9X +vAJHvBIUrwTvRTWJsWcBvPTk2dd1cxvXpBIT5oHmb6WgU+u+0/pv2ix+CAwosooSQ1mGYy3HwmHk +hmXzrgcWo+cfNLWEiSiCyJC0HH4eYMTbGtfAuGBS1OunRIRopvfeDhcHYOyBytYl59NJjPguZpPq +ouxF49qJY0ILBRZm0o01B4IeQUqpCXqmjVVu7ahwiqMogEltvtEDUNq1NPW8bVrS7gZJIAmO6kDn +fHIKuGjlJQc6VLEYxK00baCW25mCjsOplWZKeMotaW9W0XZoVHm3MUwaoQHMw6sy4lqbiIXu9AvV +hmFKfiyBZLq36zmJlDTAHzrS2jGM1/wMpe3Ks5i47hnNf5NrBFg5EchMCYT/Mj5pOmJFz/FHy0r7 +XusuZXvhWuBbl6hA82nkZb3pdtFemMEVAHof+cF7nj6Q/v3YHUrm575/32ywBLwMTcmlmD0+GTOU +/XWUfjyDBOT1bHl21WBubvHpV3xJYsTTaG0vXMT/g4J/c1Uykn05OWg+EMa8HMsxfnAA1ItYrF5r +WqBJOvQQhueFaxNfDq310LBiLfM8CWvFLjavzF1lmOhUUdKGfGhEgI8KiugWkwR9WkVSSBhqaWrP +1rZ1E3bO8VTZmQNy930oc9mjoz5GVEP23GZmLADWgbc8NzKYyhWH/IdPUTujkU9V2z84GyQuodPF +CH3PHRryymTVCjbuaz98P64mWSOJVxa0RQ2SoM5k8STuOVR1/A4+QG1/J+SNNfLptI/z189J841o +VOIzL0O9Spr1gqrqAlhdFITeTqY2a850grQtlghY3O0iKmatJggocDvaR2oYUv6TGCvrPbqv5xMY +WGt5ydI0ysTySNfmbWLnReoDHtDeOR6Y1hzI6LeWevWOJrrTjWM1PVP/JsUvwadinsXnSlTeloqJ +9rI+KtvV3OZqqthwrRW0KsOz54cQ3s3Zme9njCnBmQNqWgyOvFcFkZprrYal67f5YCkc7AEvKAbR +2UjQ44mN/vKUr3NvEt5P63vDqVEQ8w+i0k6UJweuhmkAgoSphexCSlXQnsYx2vaF0GsrH1X42ciP +npT4DLNzUTT9VaYVUT3hVbF6CocDaPBqagS73d/T/ktvH4UKHfcVIAN65nWaZp2nWvWGBauWgP/l +vcA8+7KK2A7K9p/NTn4OgqD9Zd8PoPM55jT8nJdDm84x2SQBdmsOzzhqNSc5tA1YJ4QeWDhW8LzZ +FLDGUf389uo3KeencO9K0U2cTAmXPkvodOhTcaaF3jn4wM5fNrvBOmgP292U9zBEud1/dC6au53h +ETv/F3D66AjyPIIJLuLbag9eHnKupT0WQI0LZRMscONcZ9fYk83wM8Ji0B0exZuNa0MozOa2YC9C +nTvuVk646b6oXYxsjXt6bwyGfalHDL/TXFGO5QuK506C2QgVFkoo2tK2siDQg9dkMsj6F7QC95dK +zU9w14PVh7kgRd+8YLir6B8EI9OabwNXDFiyt8UWJBg6wHdi7MfBTWu0wwOm2CrZgwoFsLz5ibrl +8naTDJ/0X8Cu75+ZMjZG1Ae5CrutsFA/s6FPGgwAoZ2O4SnR76BX7e2dLA5517N+U31iiKU7Z3cM +EpniWeDGpSvYOoU22BKYIOyK2H/dZ5vTEKykpgYF14M3Ra7JGQRMOsFqd0t1nGTZNqyfeechcgcP +lCRp/XuUmbKyi5XkchscElwdur7xaPmbW/1APc4X8Xn0J1xQj5BQGO56QSKcC2Dzxe1RV5G3OMv8 +tx4bEHdySgZv61BxcdoNDoFJw+cPqlQRrscsp4rMFwFJd/Jr9mSz9nBbP5HSqfc898f4R5drCEyn +9h6l6fT9zcgtJyV4dsw9GiJ/2k4t5y/0zuF/UMK14200neAV31XoU0m+YYJMEtDhJMFCKkNR/Zw5 +RtIDmuNPGGL37rDIRe+VwhZQHRPnjfnlhRpoygmNBTuOh8/t8o/p/I0daijQO0WTEhE60OwzDBq0 +eKIduI4DWBBzD6sDHNxdyhIoiyVyKyIbsYlEDU1GTtYcXuC3oqzbqw4P7+k+4DKssimYyj+1aeff +7LeF2JBd3u2C9uV9xrW8wSorZFtFYfP2Cfc96IHP9Eh612O/E6takRTVn96PWG4gsOr9pyotPM7y +C4h7SxwHDO/jjXiATJfI7E+2Avo44La0B5FLhsg050fF6yW3oB1nd9Z5FYOYi3dcVAxknI1Jvfbs +rI4HRQkw/zwJvDxojDZmfgEKs7Jd1bNJjZIzsG/w3c2TLg2Fpo74Ci7xFfouVVhy8UA+lfcGaTAe +P5v7HFkYvUOdTwcsgLoWX7KTU+M8vDDO6Y/dUVJGTUDMMDfNHEz4/ntXOIZ8uuE8Hn7AXCfgSQ6V +tRWkeh0h9/0UcA7P1Wd6ImWGVPL5pISIr+Kw6zSyg2blfpkYQxzjVrsAp8tEN6YP+jUGRDiAAivB +krVW4bwjq+aF61LazRwt9K5Uo8pfYABlhoFalk2l6n6IOVa9IKK9L9gA7XNFU7OLn1vkQ43ZXfs7 +MW1a2+y7F5UjPFs3CH1wXLgsdOqiO0MorU491XuOE9N+HYLuupsiATmmpW3jsS2RJTR03WV2RNzJ +piU6eaFA8RMyEJifzSH5ad8PjWHWFoAhTS2G5wuDWDSYP0I8zW1M2NHoY0oG5amylbhIGxRLfW/v +Or6m3QU+CmQQn30bXZDKrJrm7x0qw6zjQNGL7xu45xxqPQil1DsDfuxEVgrL+GpBxpULvIoQTdav +eL91mYn/OU64hpyKR881pE4u/FijlugnlWJ8+O63UQmBYA39t6eFCj1VrzfcFB1bOrHt79ZPerLT +zJHarhOssEkiHM0HGEyGIrQbxn2ZxeEGxixAQeGAJNzgyHzQSR6bId1xrRpZlbLjmqnbL2ITwOdq +549JOKXBWx2b4kghjP6kzZ9bEEl7g/z5x1qhhkkTYPNICJ4bbjwIU9DW46RliqxMrxx3trknEZlP ++ZPXIU3/izh9LDDOP9VYtny2bJznlh64QPr3AwyOIRm8A+tJCPkZ/7olPWjwbHLpdII92WeQFwmo +QjKqgSVHr8kILcpoEzc9HfLGpgacMzpJDc553m6SoSdJWxqVQzuBs3GNrbqRA5W6PawdL8TZN0iw +tmjrhq1dnJLQcq4+bXEg9g/wqW1VS6rX4BPVU91W3g3noS20p4Acc3dgYvs78Eph8igDrYmYrlZ4 +PSLocRJsR8BOTdlaBkNz2AFBXKeKm+rltoRzsb6vVw80VqnhAzbFA2U92X6I0HVnqKbrDRIT7CRh +AZrRpN1F/epOrgysNA07Uytluy4VxJ2LG/nXAA4/46FBw2/lWaTtiL0cqeZPWyKp/gD2UYFrAVvF +KMQNWzTdNgMPJaHowZvtUnZaiPhpexae4hBbyMSXxenbnJ+pJ/HB2iDWrofJTTz2uhJ0PVdbOV6b +Kr2nEkS9D9SX6E8IrjaU9SvDGW87ispwQHA25ZzqFaJiTbnQjlg0mazA860rZ6LxyS3ymvni+PGU +z2c90HCgBG3/VaJVgTzANlGh6tH0Lv6IPtq5s5hnMl8On5IqDExtemeZO9frQCyFA7ANS4nbHLGy +SHkENUyNkIkLj9GMuJWAbYx9AyXozt3s/A7L5IKAxlbbTgOORR15Q47dWUGf67oN+gBMRiMskxhi +klsmiTMy+YnCs+yP/2n5jkWKoGKbnE16/WxFWe4cD6BanXZ9Z+/uuB8DxyRAKDvNQELNLaRT9Nd4 +3/Qjon6EcmI59mgTwmatPkNU8N+CW2v3y25De3AIAlEIa6omQWQCvO/b/hhAcGuCvwh02iwh97es +lpRvJc2Gajqlam83cWuoVxadWrmuqdAorrAuAhUSlqXy6nHvlnjbbjFr6+3HL8cfEI+KJ11HeHpv +5RfyV0k2/U8oBGdfn4flq3XZZfrpCuMEKI7TgIXgHQf6AR8JTawPym84BU69VvvItmWeyecRgDkd +bjUQqnJKSm2t+tfS8ggjfLT8I0SZqBpDt69hZQPYyrPOT6gDJHToxNkYCHphySoRgbbavzIvcYVv +iW8fcOK/MVSIntMydxNFB1HFu3PmhW+RpES3r+25VNoDV8dYF4bCw3t2lJnFPVaQCZFITwc5L/Bf +bIUy5sANF0nlyvGErUiDPhJYqjgE2v+WtiH8fPxF3gxc+drrfPzwYUw6NvC5RWqhliDgmwBcp6XS +jxGFrc6ueeoALvAH+cjKq1dnjcSX7fwVfhEFP+Go1GLiYz5PC1yfmBkvVaESG/aRQPrKDSieFkOc +49hLN4ECgxwqYENx7fvoEQ1qm1HaZoqriDkzKPWvuzdCZZ82NcbzyyMPTrCG9ZZI3vJBnD+jSdLY +09IUQRaqWxQMRyCKsbqxVOysl7hca9znf77CBoXhtb6Z9UmyDcFcD5YVRngqdcmZXJ2MDT3mFTsf +yNi2LlurYi3494JyiGpSdyUH6e3Zms4xcw3ajg/c6eCX67g6VfRzjBidA8rp5yePmJ9f+vqzrTSm +IcjQPab+nscmN9KgyLMVx8Uu7I+Mv1WyAqBTGyyhLaS72uKt9jwziggjtZ2v1xyDyTyQCUNTsEE5 +b/AYyCF8C+n9OjtrzfLxR8SmUpQ1AQh7neXnO3QrqsTL55tOimV8lbFSAMY5k2dLAzpJjAjbbh4y +Hr+mPDeC9lL6XC5A7HxXOaWyORK8JQzESVcE4ABJXBkxstL92Q2YFRDnkWRz/hVwyiTKSpPHH7Yt +RrosR/EZmut/C55Xh0vYHRab1SJWSkulzgGzmIh9o170A2te7cEZtnwoo6hJLxU+wYV5tZ1IRr++ +GvZ3dM8gv0dL5WBeFpCdUL/KZHLOS2g2iAawQ9NFfQOPp5ITIKCHs9oNvZUbRAjctERVNnqvZlAq +bGORxTGfoBUJhEu06MNTZYjO7eKzKESaN/L+aEdCwGJ/BqX94+4ANtLtt9Iq6YjoQcSHo0/csEYh +52b6qRgsCdAFCS3HGpRK9ZJl8Td6uDnsgXtDUEYHIny+Hv5p1iKFHV5u8PJewfoIoR6Zim1qwsH6 +7KbWYHg1s8u/FZFe6kOgD8xWbqoKYNyAuOEKM/LgBddp8on79+B34/kqwwWTEG418DDKlMQ7Qh4S +ZVBE6aZ5W+X+0N7nKRleZqgiQvlLeWntlHWiTueGPsdJTt3ZvqIUT0yHtsBmlSjzjDVr3zms+dSJ +X8ERM9W+9sgl5lyE0YS3ZmRYf61BJOOw+J/yExwhh9kQFe1rfiZEyHn+YTDjZNJYKv8/9Gx73/Dm +uXSIb4J9CLSndl8/pXZdNHJEKvhZdYgkRWbopWexLP+R2VC+7C6+bsQI9gjsmzq8iWYHDXDY6Dmu +w7uT1pFqfI06U8sOcF6htNzFlX/ZIVqYL1I4p9+LmePyw0X3zFAG1rr5jDDlyIliM/yzVZEI9wEq +LhvjjpTg7Wf99BgSscKjpe3aY43g47fVN0Kufaxf+EKwYmuzM3UHX0V0m5CQdsLCW0vJ3gjV4fh1 +ywVBmrPnPpFkenct/uOCAxmZ5psyJ9L6XIEifMsgSeLDLat5SzCvR1BGdDp56AaXRh26clwACVcp +SCE+0OOqbinIB1QLWr0iYSbkUcN9NvS6stg6YLZHLOE6XVRtWlDZkwP/mjpZ92tFufS9y1oQ1Hi0 +s/kZUXraRJXwvhu2xckDTbAK2Y2S55unqEW56iDTkx0x3sYZcyobZdZb9yMRLKVpTcKO1fTzIo+v +Ta2LLe0J5kw/2RqKCwXA7BbzZ40IUOtnLBIDz5/BQGbPu1nTS0qjVT5IX9AXwTbW/OcoMJVwjmR1 +lZJkb4iaOC9omaxMV7jpBM+qzz+0WVOIlXt0qfidEkUeYNInAaY78HqH5MbUdBLZMoMDO21oShfy ++Ckcc1ACSL/v8V2w3pW2UmlBW40+fUNi5tZ96zxIU45V4jK4NZ5czkLObju+/FXeK5DuiqMGD4PV +jp8GuYPAgxqcLeJ0VWCE5tEI2xFEp+xNSWR6kp/nSMGn3vGItKF9DiAWSxKDKn72zE/pSnvJa8Dh +z8NN5HwiN/BNqKthup++TsCV3mvQkS/gGdHGPMCRL2xg5v+eia7RQrcnYpZ39Rr/Myb/9I034v7p +jWdOLK894HyGBOf9FjOhayDUIsCeAZQLaRRWuTcwVUteEIS2uyW10SQRAzW1CIJ8jBJvV3ROM2ES +AXTpudcIMnK4hEIC9Xo5V8plySAe63p+po+2PCzeoyKiBTauTXolWdVn/I5vwAAugaHyOdVU/di6 +PEjNfZLP47jX7l6V2JKBeh4MEZPA4s9OZpO79IHhvcWgsKlm21btywvTIumHzXWmHmZzBs04eT6I +BvGg/b7dVCz7HOZO8bMxziGes2i9n/vqlFTZEpHax31+ZMhdpVa/RdnrP18lxZvtGJdgkcnhPPwN +xfNgQlFtMu9CFk8RMKvuEIa8jlFHuZlufGsKff3XZoO+JDd6LTIkWF2ZS6MQ5YZ/Ud5QRptZC/OB +nPemhgFLeYrzkgKUqYXEgJYjLAZs7lfIaQ60Vuv92m0nQ2j1baQvmThjh5zLy/14f7LtKEClwxQ3 +fVg9vnf4YpOq7dyb9rxp0RyO4cl2irWn5Q1Ks6XjFf1Jv9wgF/f+ovLPE87WJTth6b4GRZMs/nf2 +84GWJLpa6jMMjFyh8nCw3rIueFrByj+Bxhc1NtnjcdpdRLpes7xnfE8KoR6fY2uXpV/xkh/35QxH +kr3YwmASBKfS1NVJdfL88YGlYzM/m6LRLWUcArNjayxF88EeZuUV58PN/cneukksY9pAZy48bxGx +YE4BbGbjnbdavSBIueB2NrpzbjxxZz2Rx/Nb0pOE1HRau7GJckCpJl/uX9xvxKWdrRu+DRcOQgyH +KjGrRllw3MvIOJODuCYicdF8nmcAcAk4SjxER2Tv42wyDL8zf6z7G7gUXGtZ/bdAQ4NHeHmnCeTB +cEWIVEThjD8/ktLV/xnzYLc3qFVdxg4XcUqqV4yt2fV+PkoTS9dSvCRqUk8CbRyQx+vwQF8tkHfN +fC2C64uxtalHZbItg7ev7oIUDgbD4okTsn4qfJdNMvtK5wxxp4Mg/F/4vqdifEi/HrF8FzIUK7Yf +ViM2OiA/zkXNteEH+Mwnyr0uy1F5hbI+2Oek9s+CdEAhVFqRBwjune6MeIw4PrUSVgR7d4o8YXv8 +Jg1hU1IIO11MRL0xL+d69fW9l9LlwC/r1NN2E8AsAROVsCGf30UCI8rHqzsxm8DkBlVwYPeYu0IH +HfdI6Vq4tsUOdLmIJ4FIJiuuGcOY6W9vlKndmqHeUxiBTkT0nuMtTNsqjNaPIlqER8fcZEnx/ZRm +hbBqYgNgRBH08yYIcyEvgT1/oMb4l+4XjkdpYnSiq9iNoINTGffg44KydBXvUSO16CMfjOxRghUx +Wj6nuKGkZHKV9vtaWl1/Wq4xjYdIlbgvfDfHBGppLhU2ZSDtJhmnPVj3udqVSDkRLuDis9OuGVJO +LfIzdx8cj6MGi6oWSeHq9EyDdhk6I1Nr0XhcFRrNzs9MaL0Je7G4lnTPu4c0e9NOnnE2YKLiWTjP +I9u1U+39krCrj7D4h7oFjwIUQdHsMD/9NkrzNEJ4W1ZtWhEhDhwyTE+3FFGK2b9K3X3UE/b9s6/w +XMsrb6RVOrxtOrGcvfiE9pXDldkEAXyryfgOGruq+XSnZtaNzXkTPa9iK6ZhRYRFlB+vSsVlEfc4 +PouXXtj/r4ILlHZ9Gtk8AoN+36CDGUFB8oX6Avjp4TGunLmM5bI9xSHufYGS1Xkubj6q7uOR3aUx +d+hZUPeJtgrORrA1kddOvLhm9ckX4EUBF9sr4K/DT0h2zBwKoXqAaHzPrqOexi3dJlEPfv2GsPjd +zKpTUC+gwP+RZXHkQeAGDDaN+nnI/GN32GQDHOzidJAp7/K+r1N2DayxNLLxGy7oyDjkFqzzUHoR +Qj1a0yr5Zf/Cq2FxRPOzPX3ZEm00W51nBdCJKfdYukqSS+qkZxHt7JCY6RsAa53Ja43ftDED1plS +t0BO18nL82m1M7xQH4AvpGZBkc6paEiDTWRUFtRgOuTXG72bO45b5S3plONgezlYKBAZRpz7/Hjt +83VBYy7QRJ7Ph0Aq8i7XuMI9kgQa4VatMOzecdnMPS3j3TXsHtPoFioWpTbLZRe6qwsbNTX6dfGd +oSg8wS2e+0XtW5k/XLCMWR4ARHg7+TGhwFhaEME79LZTUg9+5xFzoSvXJkTlzEfGRA97LOTWSM/h +ufv/0OnAo8wy8l16jr4PCkA/W5HAsAq3Z5boFnTrrbQN4+kLxosM2h5j7M7tr6RKtNCfb9RS7Ib1 +xFypF2+vQLxC6wKNfqhmnimKupuEoxN0zHBh+tKiDDz0Esev1dn1i8/mmFbJUbf8huZp48e32vSB +FphgysVD358O9Kibo62VjPpyPcr/nIRc8PPv121srl7ig/tGjarFDKMRO7CVuY93wcvVBGBbsyzP +dHNNBz3YyazvChSEe/R14aLiD4OzOini4MyNOzxwMTeCNQZ7UCKaU/0OPTADyEr98moUV+SzR26R +XJlHXO5jqWyKuVaDOgMZfvZ5DHn+gkY4Y7aUaRHePsBOakl38/BVyRyENugC8yuEmptyqTs/4WEt +wqLFN8pyZje9W5Ai9ghLYZ+gmzBBTOofYbTz6y4d0gPzrxb80YPuilZjR0mzJKwBoZgKX1cgaMB1 +g+1CpSRwefTtud5TS/0Qrf+sWAHnROxoXTIftVFXo5WNpMIwATzcUpMLyGgqMl9Skx+5X7CMKJVp +qI+3iy9ej5R9uk+EnY2UslU8ubcD5ulfBw7XPMn6j6e9sLNI1STTSiu8hKY4LUpwzeOYratvDQQF +qgVdRD+dJUwqlqd9lChDlfZ3se7AMxU7Fcc94fqLOonrxqVBMjB0sqPr13QLLoELDb3YdiwRLRte +XU+AF3cuAsTNMUjmuajwEZzXrJqetCMekBmCOhuvnrFhhc8EyttugFdrCM+NxtDMjROhRLbTDvEb +QFvdlFTxwEgW7BClets6pr1SLX1myZp6vIRSniMLfEQMBPtAzh4siF+3ku5ZG290ElleEAoCvo6Q +LazJr1m0yg/B9WXzVENLL4eZ4KpmHuku+O34VEGwvX4MTmBoRYpNMWOfOh5LtpuLWXRFaLLUBIuS +jOmDJfEYLicxbP5Ljp9O5qjfIoJkO/8NbPUrExVXr5xSh99W/bMRyyhil7zQTnPcaS0hsJ5uadAR +pKUI0ronReh9o55Qgbs2JyJFXV0sEVkj199O6f5CjFkKfZc0uOUWHW2O+jZm5mOSGwf0STPztBD7 +sy+hm9M5tQHf+awDrcNUlXHCrKymWm03KUNiWOc+HcysGvvxUBsLOym3etpbnfppJiS7bHEQngwz +KsnfC7ayCARKA7NlhQdYWIjnpthq+itH4yzzLsUllqUf8fVu45Objj4bhDwqjzUm3ueqdlvkG0dw +v+Qg50GFRa6Fv5HOwVzymS5AY5DDBO/72p9M+LdTkpfGtrtiOEqMyP0JlEPJglvZKmAH2V/RwKFG +LW07b7/yTZEfLXEcXoA9SieE7KRTF+MoQ3kkbc2mlrCg33+0exZa9AcN2xrgiikmIy9ft7yxifw2 +uM1bOkwCGCNIuZjpUAMzou7QJ7EpaPqGJEtvePdf5nCs/fG8B0a7cpszNtAYxa72m+qd9xJv4e6v +d23GvNNIg1/FP0XC9Yn+nSY/fOySPFLH3IvQqd2dGuPBiRYhSoEIZKZub1Bl2fU/KUh+wIUdPFrH +SeNvimnwTPs6d4p/7tIFh/d+XkvPjNV3ZkRza2SGkq+YsnhTncPvCSYS42dPsJm5je/a2rDb2wwR +D187khzSCgVV6Dr/ajGECCMkAX/KuTKBk7UZXEYRUUVjjDV5Ytr6EDvyVj5WPOzNemTIoCWQ46If +zMaWyaNSINOKRT9r4VJp2ZPb5pRUff7wkL7Va13ShwaQGzcjkLwGg73r0Z++DTK1mIBHlCF6776I +zgyv6s1RTbPT+NYYuSNpz0YUEr5+yXGFLrY+6O4QP1McW/O0USn8izpzQvJl6Tjeh6ftywfZsO6n +iutQ5YVcyafPhDDq/NIy8XeGb5QTX+DmiErj8lmB4h6EIb33UVUrB72Y47gYvL6ROIao+DvznnJr +Uux6Uyczejv7hsHFUHy72DRE2p7NA4zT5Q35c+FU/GX4ggCi0/KJBYll6ISd8ZOsieNyO6IP66C9 +H1Y4yN15Wi04sg6xfeFfKi4JuP5ef0kb9meeub5rRyaM1TMnfXuf9LXkmkIbe73Pjj5Unap/NH+I +1xM7nSc255Eq26otZu6pIP7e2fFbwvLNoWg6v72pJj2xbteBWbPHGsTeCYM5SYL5kOaYAN3z/1/o +RNenpz6tT0ybeV3T68sKmL7aLhT8mzb0zD4c8wJhN+/dfPoF4/mygGC+JlJT2+tKCavF5MTtTlwM +eSeCq+nKas/NZXIF3Kas+F4hjxO+4GdYI1ZJ8kZ4we3mOkAae1h61Ko2W1UqbNmMe1LZSdAC6TgK +v0eq7QgIUACUUW4T6pMJsPfro8Pk5NmX/7FQ65NkWSPnBOor0h305qa33eelv8koTrQLxRfaTkuR +dL9S1DVe/awwkIoCpJLLsaeoSZgQNYo0zgKiY+fYT0XuYgYr5YMRswzyrMKN9EUX2qLkej4FqCrb +faWynLXoTdewyqT0bZbRy5Y85fsyauUpvRNmKZRfiU1ou/GYmD1Lase1lJpzljhMNceWxXNk26KG +1u9G4XpSbb8sQuLiTa5n58erK0j408VyxV9oY/aX5IrUaC3B3VmqyNRy+vbagw47W/JxF3+N2Izf +Fwe3aL/PTxxDEDkqcsW+Jjm8Nsm2doO7Guvpaznx/OYfl/YeQuMtl3p2YuTCUM9jpLY8f5AUB9ua +m6vsUdAisLjMClqyUUF4HJ/u1eAY4k/CCt+i0DA4yRn/jvJqdY3mrvQkTZisT6dD8+UAFB6fUY+/ +L2xFijIZjm9Kz99c9TX0E75Z4D6KC2IAY7DoikUQ128iO2WyUi2Ab/qNKZJ+FF/kDtJlDwh+8etS +mi6V0s9tZWIi2XO+2hWjYPHOiGYn7LCkAyXG8QgKFWVhsn45Y4AaTzreHIA+lYxrU5jN5u90Zygr +mOJY0RHBrXYHxpdwbMNMpv0k3RdnYFXdBolgEDenEY2BNnE9eXSmt2fq50ZWTMdqq9l59iCVCvNj +c1Oa+lZH+QC7Qfunk2ylB29yuYhs+0ipkMkU1EpGlnUoeb8XhQ3fmVc5gUVzlW3h+pPj32Q6+nt2 +mDOEwGb6gJ7D+6T0Lbs06pkddouJcmlx7o3WIjsKVleW/V4cP7D3/7FoGNtZ3DsAGY09DqwfvBec +YH041Nrq2ECEZUwgqV4H8/aOJ6L/FSXGnYGfxVlxLhHJZyvlnNy3oSdoxhoRqePgYalF+C1MRKue +mpZe0hIFD9jXxnconuXOUWnlZRS24SdHs/VAulWtrq7QTBJ1rHgQVns2p6a5D7HeH5xDgpZpUf7T +h8UCmj6k3o3PoudNpj8NrjqCUDXDH+wDvsyvLM3zIGurYD6sro3FSrOkUbkY49bObqLV7VS/HCcY +Sqf0E432NZikaet9eoBDLz3pEDTADlcgZ4MEAc0FHACrpWh31cCQgIHhEorROxvVYfq/Y5i7wtog +x2WnQOLFSbS7pImFxIYJ7tzBEJz9nijGVFzAqZ1OMMGN3Qh7vc0ib7FpsjNeO6uod/BQwCHkVROL +0Em1LQBaM+DZwj+szc4VL/P6XzX0PkwvrZqp+/uKjbWUrIoQ5eCDtADDc5R3t+cV6UBv4GeWnioz +ssk+rJZGwQ8kN1Uwha3PPGP08i1Iov+3LYXFecMsHpWDW5tN2j5JK2sAUsqtonKj3aoosRrdNuI0 +aiWbe4E3QAE+Lra/4InES65weLimUjj+vEnD1Q0dURTYnB+I3/uPwJOUALrHQ1wAjqdRLDDYjqgr +BJ99S3QFZ6SwztYFMpy/2rYEDJKv7nquCyB8qVcaUasSubMMa6XfDn5Fzgq6h8+byIuGaW9DeTQo +tBr+LK/mqbtAW+c8VaArkpjM2rv0/ySoNvLpX9aXKWo9a9/yD5OieLT0S0Lp2AcSr8ygVv/uHT8i +uaQ9Hhd7lKjfJyxj6guPqazQKDRWdfrmebGXZIikhfJ0xoDA50KcpzKkkD4apDPDVzuu9ksrzTBS +WVhGmam9dThZPcgWYXnyKhlZqJui+Jp+KgsOoJjhZl8TBpGKdy6HrPkO0KXTPazJH3NYqBHDKtqm +5SZ0CZJMR+ScBVl+rQ7LoEql0nVlKX6pzClyxlPuu2bWzzlRpkNqwkGX/Apew8lV1Cr3yWyTHibm +Yj2FVtt6HkeK6cqAqLGhkzu/r4jbSpd76C8+tpOvu5o6+HvQwKsjio8C7xXtBVAIaBxxXBFktAfG +0t0rVTJ1DI180zNHs95NlXAlDlfPgoWxAK7Fr/GKKSFvaDL5UGegGMUCAYc5BFBUYQzR6qC4UciH +RCX5HXOvKktnnW59pgkRfU+yoNa24V7SZ/uTUvqXwvHKo+stNoyPMfwaGV9x2v5CMSvfFba+uTmt +LWSB1SiHsT4MWzwgsuDDVWvVvsVG5OyhLKdhGbo8UBA+uB8fzgHPEsYQIPQj2eQ0QRUjYRDNJdeT +gu12O41IeYGxynh03dNpDV86yLTNim0pnN2CH9TWSLbzQFf7oYWauc9czi2KCUeM2EWVweGvCdwN +RggHcvjMQSO8LVrwCTshumTSUaPH3AZrBHz9yC++oC/amIVQ3osEsYC+IEYdyHfpkHBDbM11cZpl +VreW87pOWnuwkWq3xm6tTW0JRPRfHpu8bVu5LGgtVbaLTfpnEF4N4uvY18OGgsf8zoxk4LCpkMB8 +u5EoGOtx6DP28RNlwac8MbMfpw2rXwl+xFOYzZX3OiSXo+g6Q19qMzBdZ7mms1S0b281l7ti0C72 +FDSNS8jwtoh/7JoGcEfik/1PsmICYD/ZTjXnVJZkG1M8b3HgiFvum/Us7YkXmQNKaAZVysULcE4S +AxC86pOAeJMlArLVeFG+ehWKmmUNTYjdcNYmKcRVntKPhTxyXPztBQ1cpXr2pCYwF53jIssEeLhL +9kI0qTpVx4z8/rCVjBa9HNh+BNtk5tH/HJJx8Ed6XMFd3RZYomayR20kd/rH//lNQs3G/bJZCjgp +CLoA0bFKjfjVVeQmLIfSFgsk6lBsIg/oNut5lmpzVBspBECeQmXkYPpjjmOkVx2wez85pEob5GHP +yddEeLvP2jzcekgt7JiqbuZoslfflNKfcZ8bsGjstUnGLtpnBKEvxLfbtMqjxc8vRFA7nubgoYwh +ZD02TF+BXLv8nxxc55kzmdtkhullI0iJ8oMApcqg5ZBQ4lR5Y7U6udkWr93Bf5k7guAFJ9EnU/OD +JfosGeircvUSILofHhregMOKKypsadueZtEIONz6AK7RSmQN4SEinlVFzAdwoj6pI2ayu+qEHdfc +Z8SNwEmesjYkFGzRyOoWhA8KxZ91bgyQ5Cs6zR8tCF6GwQW5iyFBfgs+iy6sD+XUNrU3dYSCODxD +qDVDt0oK+kp3D9m1qPE3kvBcz2ZD59Jys2eWQQ9blvoy0YZ1TMn0E63/un4UQd5Np0XKaOsoJGua +As17pJLtQq1oBkgj+w0aiBETMALdLcR/FybkMw2nmNKwIqv139T7+1F9BktLtWCyl4i2LgLlRKNn +FFY9hV7XhOJON1+hEHIB1QWJ5Exz1r8tvlgUuz8miulgPt/1Y5y+m/KGekYhXn685YrhP2otphiG +k7g4QMlxjA+qOMNC8YN2bE8BtyPR7ltTIUvfayDzkj0MqqKoA/yc3MzPLEmZ83woopRaMP0uIt6B +Ob+jXTWaSWq4iPOdA6X3aaBjhaD16fI+VI3GcAkYtmsY0qrRc/SuIlDI4DKiTEfzYfkdlalA0rGG +AaLtIZ8ZvlKgJXOPmekNyX5wEHaP7nYB+LfZQRu9wrHpL++v0cagzy0Q/WQOMDUqqhFu5vUUlbwb +4INGt6fxWUiShRdlwJDA4LE5aB/ICqDmYW13u0/wTVdOpGndR3tRccphfXeoeSm64GeUFn7hry9y +sxLR4Oay0JzHIcNWYJVSw5H/PWOWn4fVuT9Qyq8Ze0xrD50583nLYo1P3Qd2krAXUhBDXzl+6Sq4 +RAQiDmhVn8hn4dJGDMjHBS+XpXFotDtSOCinvMF13O+8WjB6++9hSQqcTs5tZQcgTnUHGlz42B6S +Wbr0DiKjAymOKKF8bTbWVy5ZCRB7ETYU2ghAnUUJ2iGmmEMwt82fNqdVRNBIlAOizGEV9923c4ww +ZxQXB5S+P099aNSUPjhJfWiEqEW2YNe0pnzrwQtalUbhqJFW/VLCMtRnLZRU7IlYoI0z+W67Vkb4 +2zRv7zkOvxkJSQSx6yjtbIgfGpCmYwpEi7tfim+1QU0m7rXG9rk8Ipio6bfP/8hTCl9enrUDo7yC +WJUZ266Yiy2c2yXjJdf94SgHRd2/oTjgdTHDk2ILzb/00Wyz/Fv+n5dpBpH2gJhLMLkmn9TLGSzT +k/hUoCMSB4XgdwUEk/DsNn5g/8s++FNCYyTaWjLAZaxlpvWR60yw1bW2/EUaPEfPJyahpgFNUXpy +yxCSLKXAoK2yb+sWyHnBpVwj/cwYI03qyYRc2Kh4UzfX9Lz1va0eQWBtFMD78tQgYu5MRPKp3Pkw +DwaJEFFcfoaou+7ZqyesHFQLt4bRsyx40q+fkv+5vU1a2cBtohqb/KLFMVG/jitTz0ctxjG7M6xJ +htrKEZ/pvoNVwp30vg4zsLyKDbrRFqhFcEASJ4jud08U2pOR99l9/epcS+X8UODXNQTS3QPCQWaS +bpMvYYPOFxvBd6sgtAMjFXFsfNhm384sXR2+DjhEmtk0IiIX5VWI19MBynnEzB0HyxyK7IsOh8ms +m0LA3qykFhPj7ddpi32g8tCdlGm2e1IZIZh29QoeYBu8tyjUhpuqfKUwORgNzvEKNeyjBthC6RJn +TGWbQUNmjaK49VHJC1H4e+rEdZpOcDPL3BSHvZ5I8avspLkWpjbBaaflLgfUD0xggowcwFtNFzLk +edGgh1N78h/MIlY6geBZnpmZ+pV/TdrucIpLd01QEIAqhv5AhozucGY44OS9gVcjqVnBlEmOPdR2 +X1Io37QnUgfAovgbJrmjYbIGiaTkB/jZkwzE1+cWOS3GHt6ukxY6yWvjejb3Ni5IGSp8nv1vb/uw +4di8GWoMhkcBcNTRaIzSxwQFf4m8mH7sN0JUj5ZaNC9iy1G1tvRJENXGPn4kBzD+kPMST0B0eJJo +wfix+S7OIwEyzQIlfsmq3/AL+Ir7UlvpXXzn70grIJoiNNyut/ukSU2BXT8+XY1krluHGLl+Emal +P9uZNdw9aGn15u3ssvB7REd2TW/d+a1CCkezQOundEc9IABs3Zf2+rWb+GHzY108kcmivApcWxtI +EkSm/tJw4/b840D+MtUdaq6HF0rKUpkjEaRgx2CpUIKJ0CoIZ+2D1mr+pycLwqK2pR+6nvYoZvGu +/p1V2ibS4zB5BuhX8MgkGQsheJeJZmYL8KWmOXWp2ggmYTyKwKUE5MzD7kCrCBcowjO7Fx4f8dCJ +fX6ggKstdQae0PWRTVa1IPqXdKtC7CQO+YsDSNxUe+wgy98lgYaYGn48Ecxkb/tABeemBdldsF3x +W+9lQ7V58GX1yA3IEHdxst/ooGca59kVPUaAiaC+DJyNR7gEkm+0rmeqPm5ABtFlERjNKBNphYr9 +Mf3KQwYPnzh5cqO3bzdlVbjPVwnLhQdXP8EIOXxR5wkWS4VhtSR657ezJw8prNqgX++PGpIgDKIp +ZHpkxMAkBUdEhv8wphMMHdxZaPMpERlukK8BDdqfJ5FQ+j+lSplU3AtORJihzF8yVs9znphe9DfN +nXOzMq7U8PAQP9+7OmSv4fccod7SCRJLLIiivAmy92aqTG2SY4w5kBvCSAiB9+Iora0YwUUUNh2p +7jwxPJw3seCx4p9koYGc9YnqFpo3+2Uz5hb6d4IThBxiotkdgSeJrklxnVgzJ/FYKd+rCFVjGbgG +S5EQzvqGu5FKwn2/Ohcz9YHxWX1mPEekTB23ZjyQz21MrBth2tIp91IHsqUO5ttB+LDFv97cDLqM +bxJTF1tsGxifeavZ2gC4UkHomkDanV/oNm+KvzyJLxJYb23pvsnNNWkMkS7fB/DO4BmZ8adYajeY +guLMy/Z/ftQarZkNkhaBjwbrSmWC852MknIskoniq4wjUD2fTrWo6nGpWd2RqYKlhvptuhtAymbD +vLQZcT4Ak3PDebZtAuV5MZp6hejiOVZX76s+3Ier2t4cIfHTT6xmjmGJJ2CHo+PqjWORC2hXE7QM +O11j+SLYqJWmInpXlztyPjAgDNwtF+egd6d4OYnEVBJduhyWbXBEakKrz/YNPLImxNh+kG7wfcrZ +xoyQ60f2n2iDygcwQ2XmAeEIuhDGWaJTlMuqDAfcOhYjgrnhXs9UiqTrDd1xHVCxOjrFrMgr/CxB +9kbEtGO5vWzMCbMRDWVqviP1Acbidx5ifgARKhTRRWeMGXNQhfo1be/1F6DnMWokXx4dHbC8vo0j +7SegPHH2oKlfN7X7D9/IQg9gzDaKKzazHAEfD/bJltkTwM/p0Du1SOQSQfecF1zHxMThXUE5RK/d +FtVzp3gQD1P5liu0bJB65D8SH6ZuBTurooLtE+e5JPWK5hDBOze6h6ERiEe+FR3keM/BdFT0tiHx +JjVG3K4JaGrOUN6Z2S6Lz3ZVLeuCks53uZO6gG6aPnMdB+19JkMHzHlWEHR72CVr9FqCy3Q6vUNK +dNBcZAf8zIGnhPO3nLLIdgioamcEgrTY3WTKMCBFEOp86bBHnPR4eJi1eyMzI6VKS3h6N/1H4vac +4Z5JWwACAhV6m36XO74MTb2/YMGPGN/0hfoRhAytiGH+MDU1fnn1OVQ1OLWY4kEdguu8pWEeIAzr +JccU++5XdSQBWiFxM3UJKSq3R8BgAkdBB//PHOQiHGJRIRZuMfIdcwJSbMpmH2Udjr2rP0Z6ixk2 +aPtxD/Ebic7+P2LfWHvSnrZo53x3LTVocNWephUoDnvdjfz1mntWTzbW2cK8X/fAcbU0kysLXWLe +ATMSYCwmXOpU9jgqIHWPTOtnGqefq5Kamw2kTDp8nORqK4jrLcCqKoBza0ycmm7BqjnLhGaxoKck +tDf4S2wvI1y2gcA+9UfauZPKEHXfdcC7tm65dPPAZi3HXyksdrd1ZkA5zFbriHy1BpQ2zXPg9awV +l2sgLLc+HNJiZQFvRLKSiIjMz+ox4Q7hGIpkovhF+SzB27QpeA78i+EvJQdgXmKe5Si7Tvu7AkjU +tD3ytSd0Na9eQjAVq7LSbIqwbuCrqvdWwk3GvqGu7CTjoQRvEjnqdizjvXv119I6KgwQFQuvL1KH +ulcekfoCWCZn6JozUO2mhnnuWhkPy1bi4I+QA5Otpqv3J0dCBhi91hwYg0mkh5JOsJJkrng5FhuO +5mHokt4VHwyTinCWNskN3v0kxAO1zVWlVlJqvWQhstmVAuQtNVbpnVJqyGFVNFuxMBjiHnRF4DcR +XOUtKocW8/M+gag/n/Gog1HxbAZTsN3sdcCA4IZNviJh5Jb07dT8nLV3Ot4DG7byygeLL33nsUUW +NaXjaulBcsrh2vZA6nnEzAm90LLl+UBSPst292igs702PyfiZbWRjRBy6HOx/xvjweSKRwZVLhdg +z08OIQDdTrE12AFwvem49nT5Cn7LsrxYUjGOjERqJuJEOjLAAzLYziu9+Wk+vfleJXP7WHYiTx1z +YcESSsSqSe/GFkR5GPFUh/LsSfLe4WFxIh9wxNcfeqhYTkyIbaowKpb9uDxonkgwj67VGidBIgbo +ZilnyypsHxna4LUUX6/bvqV6qjb1aAkgobei5ibABsH/bgFQG3GY0isrCqxmFNz9pZwvR83G9lwl +PW+JhqxWqtiXQWMF8bjpYE7JbDfer4DmTDJJRy6MXGseHnjOklsFw0fd7VbWt0LOuAtmTuZnLHBV +y8YZf4jOLcEjqgDzlKB/Tr87ZoMFAKfHmQkuo3K4TsP5PoGE+iiFlWNnPqFaTbMCrXqemOdBRwra +nsu4CY7FNTUmM/WCksJNW5r6z3WSGU9zWubMQ5XmKSXtaS2RJzG/gc/zMu3Vnjxht7dLAUhd00ov +YI2Fm7UGFG0KnWdyTB2Tpl1KZpQ1zmdyI8zJzC/sF/BTDs7iKY7xsN3Y+yXxWXMF4uc7ggZ5i2Hp +BCbD3Z7VWVTtUz+CemYa3OcMG6S8o2QQtqfmrmTHf2DZiPrqmBUHSm1+tnJoNoUMAibwf6xMAzzC +VGq4N1dXxMAM97dKgbjkjgMw//X/UWFx5C7ewVJtchSiBPDg+J7HkQFW2AZzG1Kx+cOtGf3eRB55 +DP5qM3KeRmbZ9kyYEA0agFMDFWAmEVhHVIDuJpM0/nY8tIins3kHjJlmv0VnGVNQEzdSZA5W7plb +utM5WfvXAcht55qdtlu6aPwrVSRtvwF1DG3EAcnZlS+rH8xGoupnTcHDW41vidZV6muyO8TS/xd4 +8iLjBeNQ2kxUEflOCfRFc8i7bEVw9ddWrgQEhhd/6VsGsplKlB0lsjduEyNnm2XC/h0N4OA9r2EH +LMPxx9nJWeIWYik8EPyVNDho8hLfydbpQGn1QAze5GixHzoR6V0/IAF4cSpkhAWipimctiBgNaGc +S87bZTTuZ+JVw0MjvJpKWw3856m8f+I+S9/tet2VIczEJPR+/hL3qAunlxJm8rc84oiz9qZ22yvC +m9xp+JKdUG3l1McCqx5H14TFYl4tBTCaKmOhDOqlSXClQiXdNdnQgMj7APjIf/5FvbAf5Dcf/zk9 +liDmGkyIi6gw2lAga9ZMCvRix2oio7D92BiijF4f7Zo+9j//T3se7s3rCYwcJ+ffk4rv4xZEws7l +s6/KWsB7ckvwvdnBWmHtYAnrUghvlCpg60TeOWv2pqJE+m/6mCMKeLMoxhI0geW1X4qPPHTmlNWZ +VIWPlkFGnIdu0Gm41CaPsKVpYZva/o3ZeTbuhlUyfM/lJYu7g/mNWKFKU+VLmAx72eZH67XtzTmG +5EriHmMC//uvcG0c5xAG5ha6J1QjhQHCifPL/olfMpAm8HzU5JGSLUUDIo/qgH1DRc2w+FPMYUkH +RyT+KvFEZHzQR2m+RtHMmREZfDCdFW/742EFqoQWXUUZYJH9C3lY3Wfod89TCUNE35/wqd1FLgzp +3MPGL2Jxlfc8ya8dznUTVUWREj/DDuZZtJZ/WY0RUeq4tg2Jbw/RT4VZoH+5+T6dw/8uUmRfmZrG +V0+nXLBGcgrij4lBUbo4V5V1A5k0p30piQqINk+kjaGgMaVHmKh9eileGY7A53bdSH3DAExOtAay +0XbXdlyTClvbLoPX26VS3y+WdpuQzjKT0FsqG5HRUfl3aU6NtFgTYCFg/ETDKX4lq8l1zhpd+x8g +UocAehw6lsU3O1SfIR/XpMYTBTjwbyzTFBFXvWObX43nkOOsZssAFGPfWfSLBDm6GVAQ48GJc9TE +3C8GpgRoG4bRRTqPClUDRhjtblCiVThNEA55D5XWqH0HDLWFqNcHZeXlLD0ygiCr4/K0n0b0bn9y +o9cFWARGVNWA/HAYYKBLIPOUU7p9mh8UHY6bU5hA5/93rD+8UnP8BSfaXUrPdhEEi2qnklQDZ/x5 +1TTxIXPJ5P6denL6qC+/Gq4Wb3LU+6U3/CMT5q8vGxxvvpb9NklG4E+XwCgauHp6sI1EoeUuawGU +UDTzV/2wiDwURwn9nbGG8jVS8reed+ORIQj5Xe77TdYuBRCNTWl7U+h7Kw35B+1/RytPJCpFrH1a +53ZMLTp026A7Q9cPhX13YFN5QrV9CPtvZOsobFWd9JIntDNzvuu0JBl+xaTTlgg3K9XmX8bCYd5W +SF267F+Z3r5D6GUPV0RzCnuDCclzuxuVbO1af0/qXrjwWL8qxc2ua7Y7q8y1368rQLNeCvnuC90y +dAxIA1Hyqo8OpsDrB+81X6L7Mw/QQbsru0Zl+dl/4cBqdvJh1mb/dfZxmomOY3lMOSSzdYQBZpfB +XwU8eFvFhj8iOhO397X3YH0GMhU3VZcw6m1yZaJorVpiI6GRC+FBATNJ6+5p2MgYs8bCMC5oyCOh +KLxxQmPjiEtpQvDb67R3w1+6PUHRwp/ZLyY2xDC30OAoGxEzYOyUWg0HJRnrBgYPQ6nI8smCFMRW +yEqLEzqOpCYSaaOcBHp3T0XnPlQkyV8+BgR6CRgUxuwwcnQkJFbW1nx7IAMGAYNPvPQG26RPbJSd +n4JZbshgSgy9R9oD5DGb2Er5jFZ81Qve14zQf/37P4CbcLuyy7tZ9T1AnHKv/v/FKseIB9xINaMq +X9jurw36XqZX+B3UzFHnnUJQiIZ3oAO4+dXv0Nxj7zbfETPbgWVvDcCU38nQGPJgPHM02gtQRJqU +Wy3/yT911hiyN77Si4AgNx4ego8+w+mn67E+Bmu0ePTocaawNAGWFFaN+hP2Z3pcmgMwo/DTGgzk +YR1gpQ6Zq/D3dMJQvOQo8dSGM7yNzlwTOBu1Sepi2y1OVQUD3LJ542sLt2hNCkQWXtT+1mby3Onj +10GTQwNyDruO7twfd64dqtl7lmMw1X2lY+bupTqfWNMLSw25pOjIwkSmCsxTW2fdzRgzd9B94Feu +ni8VyMan37EnA1ffj05uxpJIub88K49j+ATXQE3s/vAcqcDsK4cHmNQ+hKXY38OMNovG0owVrCM9 +e2RfpV0O0z0H/dXG/fIqdph74WzizLPNGhSx5zZ4yXlMi9YL532lck6qo2r2e32SxFScX8OfYYRI +HN/HCIa2sG2bdjb1zzzjKVuq3lMC19fqI2lHlgx2qsrVnyQ7rvGxiZX73sXK4hbfk8v6n/jQkQN6 +IbSpnHLiq218BJ1IFTY4r0fFPkF/ZpeVzTBGKhZ4lbbc/lH9LU3qtGgHfzUIbPzRGxxuQ8gOhZvc +zQSy1GLuOfhm0DBbn7t22NymO/GgHLSPma6OoS0NVuVebbsj4tteGV24WpssOQD7ZjcDDC7DNUuf +DXeIDW1/fQY6S/rp66ollBaAdFBeOA9ng473RRSLjeX+7pGenMpshiIt7wEmC1amtdH5Yt3pPMR3 +08664fcf8jbi6FBC4uUdxhbg4kYanQxlZf0qAA8zM7qNOllKXX6oXF5z7Ifj9kDg97jeQ5Xmh7xX +Jvjamxte9Zh7snvi61RiEnlGJ6kQIKWQMgBeGhQ/LHWyDV/mp6aCh0H8jt/UaE1j7S2+vhOKNjCW ++HtK3Pr1xu4NOimnF+jaokLl1/uHBFF8HTiVSvraopdr9dW0/rwoC57bCK/QtWjBlgI9mt8BzTSU +0JrRK0aSfmXrMzZreYlSodR9LTXRylC+YdjnkWv2zyIvXaCfCMex0H0OzpvTfIlWJBA+oipqDXI6 +cn6XTphuvFSKkXyftP+l/YkyeCMNFC5/vF84miW2QD5mzwvG6r9q2OzqL3vQYJ2DwgLTXyqf5D5R +f7XzzLP0mdey5PiP6rRbaUvCZ1nzZtLw7kS+A5YbdH9IFal6Ll/CGB2geVj/f7dESFoG7f0WeAiC +/cFYoicP7f3WzrCgZS45v06dk8tejYPzgm1cJ5zB29zs1GPXVfOh8CwSObJHbzbK/5Wvo/zs2N/m +3Cdukf9HmohJI/qG/Yt1USw+lhlxXDldFVDMj05sNZkR5EfwPIZOzGy+ixt2A3tOOH3yfoYaSCRE +ReTLaZF7TFpZXFh3DePAZgBaZCI6a9jlwfyeDgqea9bXT0F28AdUa7xI4Elu3nM7Q1GeHaWlhYyc +xi96Z75rH5FALXx5ZnNq/4Orq+RSU7fFzk6R2lhrWW+8nKAf14sp9/Z35MliFjcMugtcLtT0dT2u +5HDrgC5eNNebls/owDPvjjPxtxq5ah8aXobCZ3DilkR2LwIkUlrcpJXNnEhgvKon3XvPhqQLH+LX +Xq3zAom3+uYqvjV0P+o/rSRV4r8ecqKsi7VhaEicIv21Sr/8woRGA2jnFusMsdSMj17rH/ruj2W2 +f0gBMRuSgvZjvSjIshi0/Ed2llLQtlCo+xowQO2OkppFnPJzVX6QTQBIqssTsitkamTLfP82KNhR +YBAqkVieXSDKubZTRKzS5NHaHHWcLMUxmgYvtKBL3T2m5bkPNNb/HJ5k+fNffkBVm0PI1o+oG65L +NqT9cP6urL+5uOlk/vxxcFmM3iGi9b81JIPpp2+mbp2ShNp5Ya/CUX2kL2zJxw2wZM4uOc9Rv3By +6f6pnV6FKmBmzA1aCUGvfCwl0gXcftniKz/4NNsEVeSQJjcaueNnMk/ladgKEObY5Bi6Li96wbd4 +REgNX4DFFh0lToeXxgC/8PLQzrP7WK60otjZurrGjo8GtkcTTzks614/fxaOxz3I8lcQF1VSxwzE +iFrS795r9Gn4jM6BS2HuIbFC5oGWtdrd2uc0l42jEx9sozEzRTjv1pgmOowv4lklait1rUqXcaEy +9yGStxYzV6MKTuFGuZXZWZ/Eep92wR3nlEsc2ibxPFdxvAWD2DHhKoic7LQ9R1TkPkNij54UQgxw +Xrkf12ve+B1PoVGghnR6VB/31CYR3AwM0ovTA+AhuKuf99Yi6pJgbyNuCc63hPltSx19TVuO+iI7 +SdnUEVR+uWYPPG3EiZcFQp40nsJgyfQY1V7vWdzf5UbRuMEf06Fe5TKALac+7CfRii13T/02YdhA +bf7ZW5EP6wcX1BBn8nOoHsT7XuabFb7mqur2a/86koSPfAvXUwRTJdPSFLjGs9Rs2GbBZikRSnc3 +xw03jmFbydUCxX/OyU2TuJaFCOKhBUc6IW8jvbTJP5UJm8S8cxHzUqCb9Hit190cfVeNGhXDFsX1 +cSgf1TtB0SP/cCs3gQhRhQ/lAjkEO24ooPWlk+q4JYVcDm7VLAPJuUVqAS7wYQVVocKkzW87pI7P +F1EehLnH0Zj4nZOfMbITuoNZpfCIZ5pkuG3jaFRpvGmrIsXgrfSUqMaOCnvKuEYEyGNPJUbqB8Xc +M3XicEwKhbr9kmtvSbd7wtitylG6y6PlXt6eyLKRQdicxQ0a23RXbWmfwnR3or8OnO6RFFv3Wowk +hZGEc16xjN/34O1JaB9HlAXeAquH2rFJvOP7bI93YZHn+xqsn3jyd58KvmhvVxwbcpk6ttV2pAb7 +CZN43Tfrns7cz1q8ErFEzuxzBjaYEVpw3BcgTqErTVChNzg5I8+50kzdRAC3KnvT95GHf0jcWhyn +PDFo9qvtUDL3ap1tSlGl3FsIEx1fbU9voDHxrXZ0cSl+CIHHIJM8b9zaGIcpgi/aqELCbujfJzAX +4vtaIFizeOA7BiqryyfDFXhfCbzl5g5VaHWhNOJ5VnlyaAMcTCq5uIkCqymxPAJWh7VBDN/bBG6f +k+cp61G69f1Nxn8ofxvWRvt0YXUZIuE8NA39OL3WwpAvAyKiTOHrt1CnUpSNkfafwiuUk8g2JyYv +fBI4zd3d6QAehgIfl9W8zpqwT+76aqXCL6D8znqQX0Xq+bJCNQ7rWARGKt1QtDiLMQObDki6RZmR +mrs0Um0tstqej8tmjujepx2/nCAI3mJcDXdu6OzKVLuyiDrAc/56jL2dYADSnyuOmy7NNLZOQLYy +1Lmkb1wTibUHBZUAwIZrfAyQ+YuqTT6pTnc7s8NzDSwWgt2SnGOm9FfdpFTHRQ8v2DIZdrvcOmiS +B5w0ZRqlIT0MIduJNYp/rzMRKYKghAU7F1guYbTzmidLqE0TA8ysxLytbqu9iS4ZkC7E3yeKpPwD +dL1AM4gW6ZJ2lGU8YcrMFAAagw1BUtaKVfqehoN2scA2Zy3RUMEg+csJ1lzKMXGQAHM1mRzlRUru +HRZN82nWZ5ERhkXMmaTX96QyfNsAo3H/q4gnduVAnJX6HnHylMDWAJDpnevT6HPc+wnJkmOe/tPQ +K7QT+K5lHN+ZAk/wdmeQxoegfaqi9qoDOcst93DvAQDdi8P/YXBmLJ9QruMZN0OZEsweidXwCdLn +n/k3twsQSaBATwip4TU/r+LPZNwL+Rv2RwK2hgy4p/Ud+GxVz5JTRWiW/JRvoAZ25IeKPcr7pUiJ +KBRwmtSkY1k4Z4HxUbi4MGgTTKwNwTpC5nZN3po3jz06bUeizbV8KUeZTF4+6YZfjZ1UMiMxjrkg +eQ14qjVXvCrdFNaSpVPhyPBJZV7qCQ4zkLONY69JweO4fJW9mJUVh/Cy+Gg/LCLZf+aLWWduAhFo +LlOmFoPpn+qF0t3PkNGbdNUiLMkPiS1raawkuplu5N+3FlEoaEEugnN89tEP6fkr1LBTsYPUdYFZ +rVLNo1Iy5I6RQoXyQowRdNHjIQ0oujfczxntpw8iDHb3Z3TKZd3PMGkvuN9LmgmNjo61n2JNMmGX +ZQ8z9Y/gBnObmsUqjU5x7yDc7GVr228RXL8fIP953JPOBkinyIzAdNFBMVZSoc2iabuCu4OsTJJ4 +hBySmvz9YHahHREsMuGOBECPS/KAnA6cJqXQD9twRIQV7WVB8A8+drHVq31A1rKMXDc2mLaND45a +VfnBeHf1l05sjVi8uulFpCiv3hO2W3Wc7E/hQhx2G7bvbMhZgOchhUFybIrYDelS/DWUEaTPit/j +ONUjVb5uvO7gWRwsYUO2CovMnaL/PgHgFgcH1sYxMCRZqDknSJDsdDC5tGjvyC/NX+5RNKa4VsaB +1tsBzDn1JO0ad30TILojUnzj8alVnAm8jYJiFFeKZQUtvrvEXMWSUdh+HlF3+/knZAOW6ZsfltfR +nqadr5XjMvHlTBHFB8u3tPN3p1dUxKxQvcLnvccdpCzTCUlUKgtNazMg0+wUavINDrCH5ozFGh6o +bVFA/cusmqQEbuomaEFCBsSjvkVXLAUhpg8YuoMw7ZUsk4LqiXVU3OvEFjxTYiZ8wkh4qGSFuPMQ +pqyQm70rt7D2WtjwOsDmXQNFvOFHeQA4NDUm1b7735wm3OPQPNlJ2FIifFo1CqG//zKqOGuQCEw3 +knHZ6bImNF1fAenYqSG5mqfRAqb/AuD/iGI6UbVlA/ZOU+4uZ5arr/ugASRLYA8e3bRBpWwplD/5 +T+fNhTwFNxzJQaHYZ03ymev43hwIueL4TDFI938QSJWNAMW9xjjy12XlRB3makKoVVMVgqZxMN1g +LOKVWVymT+M0pu/uHdDBJJ98rpfCCcZ510cheK8PsleDN0NVXaml/5eDcLowXTVOwT0zpRNNVR6R +XGFT+SzEexBe61Nq/QRy9tLqqbIWHxX1UObWFIVKv6V/N9Bgt+SoZEBkmpeVHSxUqeDqQw3ecs1K +sNIRmxgubLDExN+Wn7swnelXHXPkgOG0TO+zC2akOII/aRawOCq/46tyhkZewiwR84Lj+Y6DBCFO +V2u4pkPvwVMXCfLKm7fcdzf9MWbzYY9mSS76tbKnT0lQUxeeoAAQLbzwZOZE1atP5b/GJa8mnD3L +zyz0ElXJQfStmfJd5pR2AfsanA9ZAqMO0V3GlQNK76YJa7lFTCma4yFLgWjeaCASc5I0ndaBrOlt +J43gd8mQwJZ/EqBQOfNf4T2pYtgdjMHgP2mN/h2gpRlXFxIW/NVQtCHuYkGS4VFfwJRPTgvIqspu +6AcqGyJH4ycP7UqmYwfK0pihNTQfg0FUcZcYgWdYHSoZRlxfEdnwbU+7M+5XCaZY6o3KMllddHK7 +ziIlT9axP/ytKUxWb3ds5zRt6974wR+p4qWdJ52G+QUk20D/UHGSKcUdAOvgmCL3FoabUBOCUUyX +WBVSF2/y5O8Lbu74IVl2fERNjcnBLJWaxTLrFJHKTQojXLPe//Y1DGAlpnURTEqGxcY4emNl3efe +7qN0zSw2GNSNZijUA9o2Gdl7OX/6BqLUlHFCQniN7efdG8PUgYdy1QH9ApcUsfxCjmlVsg1cJAOw +UEPqD0MFU5Lng6tLu0wr5Ffl0laoVDZROa0eioxjdaGa2DH5BSE7DHwu6jkkp6tT8rWzRjnw/3nW +mpMngWyZnf+zvsF6j+Yp8ukCXfqNtvly/lg1+p6BuJxbx9jVL2WMoGQVK/SFUkFcnyeFLclE87is +zaS7uLHCqc9Rhb5X6CvS0NS4qr4pVGTZta/m9xAJYr9bwsqDMdQnWLk0AKi2WMavwgugOd8whila +AoHrDMPFarO09VHeUkftng2fmU0cdG/AeIhFbildW/jzfr00QvKUM4LJ07o/+nCoK4tODi9HFowr +jIF0I3K+R3EV5SDp40pFRo1WT91j2qvAXMasQJ2ZRugVuTVWkl0HsmWbIu/UXYWHWUnKEjTgq+s8 +zRklyZTtne2SWvS1N+C5kSEV3QYmX9iW1r+ByaROod1Q+dTJbfxu1STk4pk6ZeQKOrSQNk7pKNDX +boARIC+kHQWnHHNGmPLJRiq6anCBmJBG2CgfpWmZZfx73b+MlPRFbQIcjp7LR8WEQombw+HI6L+I +HrBe2cT34TNLoRx9P6GHK8r/AC3LErD5wbSmGQch0cdVjxn+E3knw8U78ydYRtRJGuA5Gg6FYnRY +yrWz2e0gCmeHoDHiTOtDnljaz867JLlq6F1ZPFmfvuQlJfjODVhrqumTMw64krv+RNavg7NHQtwM +g9OJU2gdcz8hA06Qd9FO991a/67CjxeQsDMVcPs2pbM6rInnxAdfY8fN+AaXTf047l/Mrm6DsjG9 +1SNbDurJb7OtO+ofVRJT0YwoGK2ttGHVN7jrcUUbAEfik30Z2cNK6oWqcoDhGCS2SkRuMOnLLgK6 +7Ay3J2d7Zfc/SX8K7DVTln7Y/HJ2ZQbfVcny5W5SWHNHtUk2erPNBoZN8tnLUKRoS+w8HMgskhf1 +vTWjoYZldFkFpBLTH2pshndq05pp7VH+vDWnuRErGAxpgJEIQAcwoLdAFzFgGkTk8S5sVhpUJ/3K ++t+WHlVBQGdWJnobyUf9rHGvAq+PdsxBOK87uNydk1wzVrV0ITqQ3a9Z2HlDHlPc4pDB0J03vwoJ +hKIuJKCGcZYH7g+XmSU01dBsHNLSFzgCFWKRqClcNNWaN3vhoCA0LsdRuICGC6MatuFXN0pxtKwV +Up+5om5q0ZHmBkPvKwwR42ctmG1aU91mXdaU9ykwgHywoUzY9+HlCjW/o5WOdkZotzfbuk+XqFzS +PB9EW5ThZ5v+ohAg1EcA5wm9YBtdUuPWSapmWz0VKi5z3B8boGdHm86PkyeUOx310pXs/mKEkgzK +VOsVUbWmD2C9sKhArnut24MA1LzMGXkO5GHKWYP4/GRlhTA2QaEJ4Jf/gKp/wUfB+NW68eHnG+uM +NIf+FK01IVw3TOXBk2vfi6cgS40K18udVsjHvBWixFCwGb0bgxWAoOqUfsXws8cWi25iIe3N2oZt +SDQM/GUkTHlXjpAE4imbh+Lm9guyIniY4Mr2G7znZL4FV8Dp/mCNYiwnb0rKcyVauuOrj/W/nHSb +1qNtsnlD3muEiNydsov6G1Zfn2+ZtIVwpaQVO9LqbyEitATNbpLwSdAzuN2EgByXw2aEgnyqQX1D +tA3c3s1BZJlPJy0gmSOe6dz128NKhxuMm+K7fwWSOhJEbg/aMl0FyHyw7WaJbUa4temhOo3hpoUh +H7TRUJ0aclnTS25XVk9VLuv2wdUYCJTaO8LQLJEq5EOy1489CroxwzmQHyYeE5V7FsT5QaDbCN+M +7HAln/0wXPqPBwSg0h+xFJFaqZgL4wja6uH7HOcensFtvFPbmlz+rjNUSXdKSW2NsErCuIXB8JLy +IYxAr2PRnXNe9vBya4641H/KDoTCoIgPY5pNj7OFyhIlXOfO9hH18yEhQlHB3+ygAWh61RmOFt7Y +kFFbhfWO8HrbJDoLOg0RuUPt5w2D/BYi/+wd0/tFnMFMaPBXIhUTcnKVYIb9bU/uNObZm0JC9gJS +SnyApCO7cDUb0Rlq8ZnB4T5zyYwJQAYMny5oUjVSGxbGgSd2mGuZ7xiHz4BofhgHGFEJz7YvVyyq +Bw6f00pWmRoZP4rnatHjS8fPHjcrqshhrSAbjPt/rxV18ZCeEPHqO5td7KFsyHv4WI2rSjUaT+Jd +5Yja4/XIZJGStYyufYjmBwBFHbprowijoy0OZjUjVsxI1wRHcGGu6EOcu+3rdDqvP+30h3flCpmZ +rVyUc2Yju/YBFJBSR7FjnCj+YXCY7b4oGc+9mJyxWFhi7/YA+uauKkQQA2vwsvRplQR6Hp+1eHMY +qBMyx3KY36uP2J4Ik6NvCSMR/zMKejE0qRGdQ6w03YLbQtdPiWoBtdKCd7wrKQ3g+32w7nHEmJbh +V9UbiyIZCOwpgnRVaaZld0KoQXgrwZPf0iNqFGo2+7m0iFTuIsi5nQkKOxnHKzO71PslVaR8wdxx ++WCJHcbBp+eXWk4ABkKK/O/AKwq0mZiPj46lJdKpnuiSVI9hM4u/Vvjld70zndYFHp8pnYNbYjZx +twpWT0bv83C9wG1JyPGz8gZ0hUnAjF//z5W47oHjft3DEJVPTrghd3vdHB77fsNdiTxyh8zbbOnU +2MlmT71U8HFODPeCRzxEuP99Ws9Ud/KrOoVvqcZweDNYjqIUSnsBLN+1D4tspXrbM9xBPdypGGw9 +7REhluA5YSUrFoxXJleE9p++5CMoi/dzy4h/pcO0sMmugbuch3U6b8Ci1J0gi8VjfDr/9vpFCMyw ++GzjnseWHeJYF2at3l07exGqweJKJP7zDMBkhO6DIlzqaeRH8FqUmzowwHyPqZu16Gt6uz9+JTMQ +3NKrMYmYQkS2urufW60wiTqFIAE4/3SnFJrffl3u4qpdOyBRiNNbp9w91ZY0vkw5MgT5CBz6nLrJ +5nA6HJlZ5j/Qp+llzRmQrVV8uT3Z6JKKsSRLCGuPN7bJlYe+17BqhgADP2ydSsQTYEsI52av8Iac +E1R325NcFCCQ1SRL/qDheXivuX56i6bgmoV0iM/XHcO3MgBvUmI3+ThJOIoNIcCdwgwk9LicmF6U +DoJGJD5Uh6UpY5bg6+6c2j8yPKqpYIcebiPNzy2MJcFIWCNjpINSoMAe0T2R0CPqkGPdNMajYOK6 +MJWWdUPYn0mQvhFn11uV5GYX7j9xZgOFnULp3tI6zcfKaRzEGsmz1SExnlW1U4q7vsQxsbXRHbdr +YEIz/mHMRrleEzeNcAHOBcPuwp9+B2MO9EEpQb+vvRVFOImUyXo/bt28AYVg6x+qzdU0DiNooRBp +KBGcNMtYL4TQKHrmjWVhS37yRvPyPQWUCeqKK15WDwoziUBPyM2dR2n1oVmdls85z2JXY4a4Hsiz +mrpQt0H4l07kyu7nFjj2o0hGY7ibkGMdySJr5XgwuRoEJ5O5yCNLzqbKY99bKem+axYuW25a2t23 +utHcRvnibRvyh7CjkbQRXMwsT+EXWTGjZXESaMK5Cv7VlNw2/2GF6TNkzZ5/agxuomCtvRzLV30H +a2x9dsIsfSS95FZ/sZaEIjqZHzeX/AIlVbhFm1TRKlSygKcw92AurO2++N3WfecTWSOaOxTwuEFV +nSQ7xlYz4Rnmu4W+xtYN6WrioYfBPhnyrdtqL7UxluYVtgUnnKmFLDSpabORtJHhjgv8Hi+IIi8x +aLXYGhgFQLyvsB10tF1DZUn+pROTSlO6106bAgZI73BIn3K4y3AtmE7ixrPbI2Ey8s1xuZLhC0FF +1gFRmYN5KD1D1Hwid6GcWhjjaYVh54yiiVBFNwnj6a+6rKXbEFY6WNhZ3veGe4ncCtf/NdvygcVn +pvYGxaBy9Ju1dxBw4gEuEu4FLs9ETIMzPAEKQU9AmsjdSgGntlWkLlaYSHww0NdWkq9gCHvFLjeG +FOTmBHC4fgfV8HOKHS05vqxoPn9SklPLv2AY7W13EFkymgk+S4b+lc8E6izEfWSyTZ2J5kfKDTUB +5w1oOL39S6tRAyMIJxt5GDRFg7kHh4657KCwPPx5iVTHqs8gHrXSy+k8XaFlf/i2uKpCz0H7KvVd +ZT7/XR428IqRScK+OzAtv6hkHE8AN++KVN3secNlC7qUy16QVfIjRJ8ARX3Ft4YOuOfMGSfv2e01 +1/G1Ot8PvPJwnTITBJzxNWsoZ8qAUyxE//a1lhLCDqUBVy+G9aPEpxZxPCEHBViEcCa6eJD3/Qu4 +gJcM5peaF4nFRcgMauYGLgkberlTnHcIXYQ6tPuUtNtd0wX3T8gmR0A+FC21DVM6ob2KSvUxUyvC +6PO0E2qeajcrg8Kifq5oKy0rkrEkHQ7AVdKYuOiCKXhncWUSH7xK30Tcc+DpAWgnLly5NA5MSkVW +uNwJA/Echb9jjmioQsgarBlNqXNupfmf8OEl8auR+8AqAGQ5uoa1OgmNU6BAMTuiW2vnEI4FuL9M +35m90BQVtib/jixxPbLk0cg7zAtWhr6Sejc1Y3/TQKqfJLQR5LDrD1D3i3gvCGw7kAoe2gtcdv7Z +eIOLPcUvgYzNgCcdVxqU1CeYMLj/ZBMxSloGlgyUa0AooBJFRqck04qEmtN1H1BkxZPRDx9E5n41 +2nALMambKRK3vWoxshvVnGEpNZuQ1JYZt/bE47/+O6ZZ9FOJjz+R9RfTQ4Ef3SQGMMzHsDQUZs38 +4jHYaCXldv3vQv2/P02Pv6W0UDQvbHyjGunxnyrHftW/RI5upYoSy5ACt8gbQiheUTnAVh8XvQc4 +SfpN42bfp3/HJQMUp80QjeiQm+fvfTt3KD21PF+fe4mXr4jvbydw8LWUfj7oSZ0i94ppiUt6HX/I +cCjr60gDcnZFFhgZDWZstRHC0cGo5Kp48/+0mqOaMmT1pTVelkjZeLpTN3SGcMEbikcAf0k5u/Cz +Q5XvbKw8SzUgKJyRnQ0hvTYnoghMeITpNL7rsiqC2+/62AOfGA/0jaiJ+91J2ePZKK4OFV99e1Fe +auUpkteQ9vNFR3574d/HBNEllUAVICeSrpMGnq+H44idmmik7wTpQcWlo1q9TRPqeoRL6fkJgFiy +hBjz+Wz+NwwIApqjCygadXWvnlxOi4xy1plUJdrd+1uXJ3rAL6rUEBQcTp80W6cTavm18BeeoNl6 +BPytNmw9vZ/bn4YlkXM+ogrLy5ilbbBXsinZkumfghzPHy9Gd2ElVhY9xw+WxkBAB1lBsQcEo87w +3WILaUs2yY0RmVTge+z8+YgCJK6oXSdfUwJeEi2+0wy0uWGgd9Lfy0dZGhmqk9mPqVZRacLGKBCB +LVH03GKEvADr0UR6iS1uJtYSs6vQ/vI2rPALLQANBMJghKYVVsfWVRDBuBidXhRs/v/pBeSPdQV8 +zDDXHFZw56wsygr/hwHoQxN3vEejbRtqOBhvRQ65YwqWMDcX1F3EtdDa4PgyEt/IPhx5ogt/24Mi +hcjB03ye+o0Q58JON2QCOOHaisXg41WGUktjFxTRGqkbBU3+DlEtNpesOAgqp0ryA4UnJuYzFazy +o9k9fi9fkUwIgxA6wXQbPMmuWn09KO0dCxJh09hIfNR4bcCwIS4uB1l8BS5HLy4fiKkSU4AhPvTz +elX2WZCDh5LuK+rrm9D5h4pH2rXmf95NtmxIUD04mQZV06Q8asu1tuYE5dXPOS7AyCwVc9EJlSm+ +TqwI3VGhibGFShAciVkNQFYOt+zpvcwzR4bPtUsxNsiTn0S0RHPPySD+kQbEMdq8AtSoRHFwuNBv +Tf0EPhyOGEJMs8vPFc0XJOsqo97f4AVqRuOSIHgBDdRgGnItRyBT1VMnhoSo6MVIig2/IqtGihuv +1X2TTcf00oGIHPC9DyPavReTgajWiGF55PkhWj7cYYMoFUZAtydY1FJoh9U8ZU+lrqs7wH2j+HTS +ENUHyHzmZlKnn+irjZmGq8DGu3ZdEpwR7ZmFGkQNWXJZU9EhQdfbWNlcXKkoC25ABp2kUjxynKgU +pSlcoMHzCpCPBtIjGt2Oq434j4krzC4USmoC5tuwQ3Ib4u4xK00kl+bHgIwB9uovx4WK1sOEtmsZ +Bv7+zh43d9R048BhsReNiCLwphQDjEN9l+liQIJpTn1U6WzkuXFDaKOr/e2PvDrygkH3zcRJVAFF +92tyygET+e5ZRiPJMtH6oApgmBlZV+rKDBAN3gcJvGrZV6OsmFWxKUOnZ46pV3BXAdSRlHEujJ6r +B9Vg05fY9sRSdzWZxLnUnK0Gi7npS0RdPCIY7mDxAsC5M76tj4d1aN5ZlYZjiHkZKiepkmZhW933 +1Ug6crNhLFnwlMiswOaKiaz2qcHUvog1KdPIQMSfl1j0xU5dJCd/OAvM0+R4v97jFcLdmb2BKdCv +40FoJsb8nAU9U3OZ5nn+pAnB+HBnAbWX/BYNRaj2xVE8P4SduozQHtG0TlELSkM+igAelHchZLk9 +yWuFQ/IuJ2+5g5ESe5Rl+zQD1UZEY8w/iIcXaNyTGQf+cLucYqmg4Uoox7/JG5w5Y3I4aqXaDHpo +yQFPjQQ6kZ5mX0WySLPG3WrVxG2hjvzgqelOhh77RfvMXLaNmqtTp5mauZcsVwa0d8uSuXIXV9Pk +Br1gsTn4QwyyPB/5a2LVSyksinF8bikAX2kuY+jqqLfh5CWu8bkYf6aKq9J9YBzKSZcJ16f9KGIn +r3U+f4R3DEDS+raWjOjjE6TedXW1caAQla/lPojhT5lza2Z8b+RnXK+v7wOAlkF8QrJtW6cTVmeO +WFgTbQedhc0xTXF6KVylRnaheMrgIFZFWgGEdna7qFuL8WsA82gFxxAgRTvi7j+Eb/4or9Xw3WZq +q2qjlgamFrqEbRYuQJDMO5bAj/gv7NSBvZJ2owwH5xoRxjjGK9ftZp8jvQ4ceX2Vtiy7Fwc/gpTm +rlDC5o6ggy0XQUaasM1YBdZPp+Dh220x/2BOcmXcPeOyru/m730dC14364qRzC1iQEXtrxcFSiIS +suHoiAOfok/HZbLgq7lrc9+HftpLB7kCPgo7enL3GTWbk+hMWC53RCoX+OaUG7flqGS3pYxDJIkz +GCExeiBFLOKcE6Q40jT2VGDI3h1kP9G6JKmyTLuTxhpYOXxf9FfpX4Wud5cQCwSbhOcQDQQCHW/e +lcz1N3ma8z0VZTBG+guPDEZUKLrn2Wbm80EG4eN5qEWCS9on7sCuQ+9/7HX83fw/2SqqXS4VaH0q +mTHnaVyhZP74EBrQnwD5Qn2vh2qVz1IppxMJ81Jfmlj4NYZmVQOBrSCrxAwVnNYkUJnvA/ton8e0 +gTPnhMTD0U4AFr7hqMnn5GYiuvKu6/04AExQkX8y8YXoLrQhnUIzhXV1GH8827J7v1dR2Bk0FuoZ +RtsF8fHnUeN7GechWEui2wEPQyO6Vj6rSIEGzFnLOoRiWxz1up1Hgbji+rFRYWUBoevhLomSCP48 +UCd1ZoPUhQqbrdMtGXT+RajzGJesTaVqey0hqgi6d0x8Ec4WC4ApihN3qhTNH2I4GOmBDj2FK3Yq +RROdMgXcgUCCfid84H3N8JtdU+/saLhlH5cFIjhP+QPO59zGWyq8owqv2RmTL9cTlEoVGeBQuQTJ +JzDt//4Hq7VWZk25I2eOTnV7FdsCFaKM6BAWTTtXztoXeASytEX3pO626M1iGifMEiQO1TUN2ETf +pwm9E9pHiH+h6gd2rz+FjEz1+VTw29ZhchECgQCb2IpZd68i6UocI7Fi7b4ChePaCeDrgps+1pJF +iVrilmzSFyoTIDFJ42HrqvpkFD5jsEl9XeWgGBWiF/gZoJvc4rDeUWabJeMDy/pVosuR9ZW6z1Zm +BeqFLC1ommlW5ToDO9A7p8Nk3DQXNATtR+bKSr0avw0CBkY+n2kpR5Ywax/QLKq6r+93c8rw6Y5h +wDXV+4euFMR7kOY2vK1EV8dB9+BlM846tNmhnCb22VaJql2NRUqfeJu+WZovRNfm3TdLR4roEz+e +FI+J7uh7NinZ9og4KfQ1wYjCZ0O4i1cl9HSDIw9c1jkiYSfh/kcX5rmuMeETCwOJ5jFCZ4/gmiIG +vqHhLh+v8pQrytHF9WOBp/7fx4US7qNwDnLt8cpOK+WCW2A0S+KzPwv8uEeEzzgNEhX772GrhsiD +TOIe9gMEECjsa/vfuguZapQIYOOO1RtP50d8c3ifS5gopFT1QfKxtU83qv78QLFcgwFMXrEppflQ +HXyjK7ibLKmCIUzbQf7PdWbTPqlAMqg3QIWw+iBlJkMmBpjG6FgEIxvEDHmpudnMON2Ver2H3xWQ +LC1DgCGyjw23sFQG4EV9Am9/rbxwN/VywMi2g2aIRy+isH2869FpthVOyiWtIQX4/HHgn0QrCoXW +E0V5AKpgRK0s63O/5dSyP623lMxPjcg0iMPFPGKAoQOtABi0jwDcGqoRCnOoH6eszzaAlE2mUh/C +G88wOmzz0lcjd9pnFO82Mz9wjCHVuU94C9+iPrEE+u3Br9BY9WVAexB6Q6xo/Zuipj4Q7KMisCxZ +tC8dNwNlB6HKB0NPd/FT/aMCZnQMJ2ZpVNhvm0ymV8zida8OnYJ96F2PytrqKSAoR/0abR949izM +hVYg/lo+1x2ZT2FaXFXqW1WkmBFJT73oNAAJfsHhPsn7v7/nT7i+68DPKxT3u/SIxbLsQ7JwjQ2B +4ycrP7WV9r2IJKEau90cetssgGopnb13ND6URO9xJ6KvTD4oxEbEe72xr6IRnEWGJXS4+RODx1H5 +/einzreoU+UIH+pWt/2noOH0a2eiL7KBfmztc80oTKhLeqwcb++mpHcbXyBOKT0hdxf2+tp7fPGL +Bg5jF8yTWw/681ht5MpZx9oKulYHoi7frXmJ6BJr/alMp0jaTmUQ4zgNdP/AZGEV7Aqp3MokQhzg +akj1qa+ExbSNyuvnn/3OqJ2YXCsKYMibM2AnT0kw4jy2C2jjEi6inutV2FTZlSslz36+G8DaPVfY +kz1dMNbJziyvjq5qq+dH+UnTMrtacPuh92hfvW7Egx4Dr5YCKGcNRpQvnI9xIY3vBhZwdj7xXGJT +jVIkC4A/ddk6Xku+v9gcwE5WZSck2REJ2YoteUOzOLsJZEZuDdBboNEPnVSG7dZ1V3sN33yJ/aZ3 ++/LKQvNY0wvBclL6JzsIgGQaeKdINIBj9aPO5/BXb9Ud3XJdm2oEzt//WOLv7ZLO7RTo69B9OB8+ +0CU8if8P5Q4E0ivYh4sed5MQOlEgki6DSTsh0olBunjbDyHZe8n5RM8HWGokixHUPSJvjUF54qYK +KbEoC7jfFLqxhKCscLSUqM2LUHllzkdWWEAaImtTB+Rwu2yW7Xk5oue205cP6jxMl+xm0p6FNuQW +cAioTnc9gna6q8eMocKVQzBMjMU1eIYmKwcuv8ErafeMrciTnlWtrqvrR3bwTjY+8uaOLeiwFX1A +9busKz4UW9E/N8g2dPQw6vVWWpap2EwEKhgMpyWxoPVdFcu04iTVAR8gUru6U2qRJ5bHoP/b4Ps7 +IMaRv422pnL8cc1vYi0WmDKnQ7uXDbFJ0g/1ubq8bWCQ6Fxvp9AdfCOftFLrTS95uDD8S9tqpjes +EGFSn3V66H34k/sX6OHQfsIbpeFHuGmGzNm79u/pV3Oz1WXkLoBm2EOXC1QJnQx4St53fMA4kNEr +fxDatneWMxogrh9U8mK2aPxZiefcHwNKyoJe2soaB5odoiMdKU804xSvufMHivMG/56hX9jHenAO +mDEItKlNvGV+azO0JIdtZ42afjnAUc5lFd2GBrNMUuAYY/+0nFPeKXLGcgy4utpXURwFILqJkIhY +in7GZ48XgGwOh7xZklfNSuFG9q6AApzDvH6pfRDZ9jRcmTKL9DDpN2G6I6VQL63CcQxyagL5aMVR +TkUNLskPCwX7dJMF/xLyfknEURLVvScrTLtJIZZD516wMkgg8EMMKpulr11mEQSfgUBxTahLjMzp +lR7C7twWLsikVoccFL9OttBliIGQLJIqognO5wLK6ot/LIeeDltIrSparTtHi70JpgSqmjAn8GnC +azn8QCfqls72u0x5tkfKBD+nJkO5TrmIK36YdL4/Dp1V0AyGx0brnJ2DTGMAkPV7dPmulMkWyegO +NiAI/60WaJU3YDL+rGv9z218qTldnMQmprTs+Cf00bWQNN3Td2SRt3q7t2qLIa5NSB4It9HGyxZM +3KAcA1tx2mSHXwnKDtGPS6dR09as/lmSYPUhyeYJESQMQ21HXShmXTPWnT5OkJF8Lgbs49yY3B+H +lPtSoBU4zR31D7phGJhfFnhDSMBqSwym6cEPw28uztjzAUuV0WfhWCz3tdilkpAO63+ArqmEmnHy +TqRsOACW9zRVYOyu4xHNIjzK3b+GL4utR8feSAhMGDcdoWJUmXbiXxRn64hK/MoGKzAKQrAOYoKf +yaJa/mfTTvYu+M+SQXXL9F++oDdCmIDMUfK1XlUONQD2yDvq8BZ2WrbQVCi/KwRDRnc1ceNbZZlB +7vpLRQjbkP2fy3EAHDrLI6Copd5FMGMPtb0ZefiF0i+0Ymmlp0Ww32l8xJxin1kx/oWyHmlXu/Eg +/5vXOcZ3Wb7PVdkVVVsQ7sicDuzyNGanTBzhSGU863HsqoAH7/c+gTTPjO2VQVkretMFwy8NGnwz +8L4Js8V0nGjhG7UIAcN/pjZ0eFhORFlCHEZyUZv0cjFk+IsalDz1hkP78K2cHVqL8jTggnEYqSN0 +IP0v+hKCBIA3ob55+U6Qr8ThGJt5JUv48qrtPOdUaURNtXRJ9C6bDsJgBRnViO6TLF1zYtazG6x9 +/aQwa++uPYO6YQwqdHr+DLwg8EA39kXIq32K/s+9vkz7SnD/Sks2sajTYUhok2X2JFacnkWI/s9r ++zE/0I6XBppoyVbINyUK45wUX4q2pwML7M8LTJxb4XpyCKk2m74/GQ++/gScsxLvtEJRFUK86aRs +zgM4V0FdhvX9gXtBZkfFP4hvIEWTjR/KBuGaLwTO8LDlD/7L+4q1vTN/IbO0OFK6YOb3dm1gfst7 +20t0arFdKaSRUdKkVGIRYaDaMADSBvmtV+qrLrB52Dae9b0Rsqkw68vk4XB5ZOJuI06KsUeJ1kCh +7/wbShTOLdOlbZeYEBzo2/9tOiy5V0yVjcarDX46+awAzPgiOa4olA3O1A6s7Ys9NUChBMWgBpU+ +ibMsNCpVFw66JPA2Qyb61jHFxPwDFfy46j9rKy4fIXTZSFISyp+yIYbfJrxU0NBe1bnjgbU4L0v8 +gKZHL8NJQ2CEuSUCz+0+bYuapFopbScDro+Xulf8kjsCqBP5vofRaOzrFXCei8vhj1CbAjLHdjKv +kXBjXu+m15VY1GDnn3XUdNQnVYxIbV4bmmzqUE+uwO2vw4efolJBW/CgLuQx9j4gnSyZyOepoV13 +YE9TQ3OR+wmwMEQDNM5PloH9e2mFyT7BRJZe4kPZRNFucECdHlyk+G6yGytX/1lxMI/q/n9ulaIH +W06FpvrWmF2SJ0z7neb2HXyEqZftpsIivxOt1jDoyxnYJQuZ8FStVmWDS4iDNaDGMHGD/wYIDkY6 +sBvwR9X3eF8Qjqt2qlMq1HLazyeCEDMc9JzGWU6D8nH0OyduII0Al4uTr55DM8eH15NZoHbWLGnF +Lb5FsawXrpbMlaj6rfuMkYd8iBEXQxEGqmL0Qz/K1abWoQtXXuguLOvCJmnIdAvTHa/JLRTHXaFy +7lg9vIn37m28bCgKUR+FAiQm7UGx6lOyi3WhQSDssp9PpXwjS5G7LMDRnr3rZvb2XRKQLKCsXfa2 +T7715alYZjDj87zLAINAWyBejx1JAcek268lJXCV523tkoyBFsb9PAyWBz5N/1PPThzEFEt0Og8d +iUtsWKkBGum630I9cvs8zIidEdXhFUH/HaHSwXOxUfgNPSZM27hL0/VfoFicQSqSDiL0FT3eKR09 ++sKKtuQRy27Hl+yQPo5QIaf/TS5fJxo2xrcV5wwYqQpFVGfihGTIL3dyob/K5fTsaS0be5xCm8KW +N37zTRJ65FhBetEl9PnJtsv1ZaWyOiIaOY95DsivSoIZDD16PXd+NRHxTtv/St6ACR2xm1w11qDC +tYWvfa3zZOi31v+lEd13UAXnwjJJw6eAu55JsN0F2X6Tid4eQ6bCLpdDcFE20cyJMmLSfCvwHyYZ +3Lj0NEeYZIXuKpZFAVWfc4EKVLHESgT5znavaMEW79fIAFhX5JrfzwIbHnZG1mNFOf/4HxXs4qhi +TySEiM+M5MRPmhLWt1VpRPn5tWlfZfb8TpWaTonnC2lDbr5C6VRXcEZKSKTcKoWIK2DYd9elANnm +gBp/ADiy8wyyMW9qGRouEiBsq1vRYjeF034lm/4JrVvgZW+j9Bm5JwQLOBT0Sz0Wbyt//8efBO/4 +HsgaIPSje9MROMwWyM07dTa+1OyjP68D9yiYXpdTFOmrolRVzYDWiJ+3lNbV3POlx+p+JglOu3j2 +1FqWIgsXtKLLA/e1LCq6yUmp0RzE6JKcq45zv5HljtfC9rZd9PpBIscVa3WT/aHXk+/FlsulYLh4 +MxtKeaCuwQwu+q7DA7Y0vRvTE1SjnC2gjXHNbd2UMw8Bl5dawrsRH+qJ7LCBkvgjEcCpGcjmCou/ +zi7cZjhF/8g+WsOx5Vsqkvc/zn54A/YZATBkJ7P+PSjevsBj6anUcQwDsmlRSbTMO9rLbb2ciN/y +lgLY61EU+BmKC3oBIrBNfGEeJAxeSs3rs00CfaVp4K4XHJErycdE6HbjwLWHwpLo5jRIwrlqZRFE +PjDCSigjatfj7zWfc0cdJPgBdxBnA322VKi7tCEt77UgrhnZbA+YY3zhY7FjTM2LQy7LW+LQ9x3q +FhNtD2ulLZYllbqN+clPq+5icCOid8eq5TDSGpjhbEWb/uV3DcTFndM6erhZxcN6eL6T+ReB0xFh +Vr/2uqlOwRmIQRvUnuojfmTiNTWTAMtRZXL2ZXWJrho5NGIq4UHnRc3F3GKceOi9jWYU90Y1ublS +IHSXWT2eTvZoVQqVjRbT7CPVPjtHP5oxy+wehQ5xNuQhr1LHAOf3Pa7Gc8O9lAbOulz0setxNAUx +CD4qJtg6ph78lkgsDa8PyLRTHSaPWgCrcaY/HvS4fZSOkvz2W80wkzSxJDFWMuHJ+NsJx0dvYLrF +O1XykgxFKHGe0zm6NGSS7XvT2eJicPob9/pfy0cTjbrM6+yn8YgyUninZZC/otUhnBc+WMREGz07 +NIA3NCOxYDo1IgULE25jrqIthR3XeQxqUZUpB1MC3eQPhTRymoVrnLlyIsYr7pHmPa2vf25p+V2l +U45e3xAysyzF3UvnUJ1QPRVeUWQRzFg1qPDx92DSHz6CYOkdMLiCL1Rs7kj8ob1bB4W8NtaLISSz +gxRYrKnMbAnacSkAKnOYtCecWsZ1gbk0bfuvYnLT0Gtx2LPXmVyYwobFBi3xec5t/Imtxsyanocy +oCeegF3AjBnIsVcYxDIUvIBe8/GfVy59QOE7x1RV0xeMqppVFdD3RmEDCjuegpxzyFTOYa+gGsMY +9iVV/DHfseytW1KI5O6GbOQ98lFy3zcdXQfeIZUX8nkF5cqXTYhDfk173YY8OrigJCz9jVzW4wMm ++MQu0spx0WQeZ0pBNuBvqaNFOLuQVJahlBiNUcG8SE7OtVnzN1HkR6h1hnGwYWZml5yHY3FyjdGh +EOugl/b1NKRo0YbBvKb46hbhS4M/8Bv4qWH2mUJa8Ws1/+hNuM31tYTaVrv5jE5JlsJOG5wgnvNN +AgMhtolVF4lv/hqoa+swf3e2uJBHaFtuKKK118ra9eVE0lrIiLecdTR92ST4Hfhtd51PFtuCMGZc +vep/99Q7bxKGDLarKmxvm9GT371U5obf2FNz05MwaeSQR9+qJTllGefGNmNz2x7IBBpYaYKD53Ys +osJxuic8FNaibmF4kVktPhGniz0PNTuHpOuF8mmi3Tw7kcxEPLmYBYTvYsYbpD+LmeIrO30ateZQ +2UxTwSJfRJ1SNglwv4UmLSnZJsZsAJ4/WFjEnSd81uti+Dl1JE6kY77Kysl+qQHyYn19vJKxWcI7 +Syg4/7XJqxL6aagMBZ6SQqqQnfIs3Av6OkrV+NkrAzqctSw2046ZFbAmmFRvyspWLNxffa0p6Xbd +tdSz6nS6XWjg3cvlbb7w01HZ2ZQlj13me6AmV2YjbW98JLeWZ0vMFDSmnxBpKgC7dAXtqnNwWRab +28VvNjl8AOFjz/HBFwODoc/Ap2vRQqTioePKDbDLdv+2pRRVckZOPdMfagQgVDMsKXZyx0JV1G+v +T7uUC1C9Ppv+0fxHIj48ZLzzchVpHwZEm7+CJQQ70j41Qq6LyxrkUxM/ozfx9CN++yiQpdP6ERNi +xYFuFl1wPlhnN9+WRvrhLeGMnnPORWqvvS37Btn8WJ4eJjRmPwmDuamh38OZO+H1MkD7yy4GrKZP +EGgVrUjZOK4qcwZ2Ihd/Ds9pQgUI8xtnWFjzpw4uCpun2Xxjj+y4WKTKaKh01aOn7uwPk6AWoG71 +jvjXM3GC1x8tngfx3laYK5sUN1TGFTVILb0mZBUtS2guIKFZ9iKu+xUUYr2Vqs/3HgdUlPcNVunk +5eT8cccb08G/sk3ta8sqnV8sEQSDyFM6yILez+I6+N828AAYD0oOGrlBtiM30etxZRX6MFBjghOD +taPAM96Qic6TImt5O/6hY0L/cKObMZYr9D5XGJFjB4P9ArcyU7QjBdj2wUu1IHOwMUPDA0yClAXd +yxnEKJTb8zMEI7aZE5f/02nGVWOc63742iLD6z3plrNlIQSwIuQ3sFNNNYXb7GCN6zsOL6NVkD+9 +yg6cx6ANXAwgoWmLWTvOLLK/bY/J/Uf0L3jQpU07+cKdAnHHq6ELFxTReKYNCX2oOjyRuUoI+bDA +C904sv4uplNSfP23Lo56gb61KG6sIi3k0koxuJ9IXKcnESBUhVd7eWkLXmEi3geobxaBqElOQwM9 +Gw9UUaQkRKSJtPRRXhwGguEZG2xs6+NF+UJuOP/k5xvdYTMZ+7b2tmNcQtTcEt0tJ4u1WxGiSTCv +I8Hgf+FxSIure3bRqZL5TMVzD43RCbX2ea0DMsRFgiYnSN6pLkoRmG0FWkcHJObmPBcPL7RN94vO +TRuWzrPQ7vh95iZq86vNdE5P8weyI0RVh0V0PdF2lwOXZ1j8DYJYbfGuuM94HI8zXwjeYSx/tkKG +a+zw4u4wUJpLsPzo0pbGW29edUSCSVwly2YX9H/q8tDezkXTnc8ZJaVfO8qwwzSnbiHMQDar2HOI +4XSFnIi/7GT+mYG+AffhH0U9nPkceC0ViTffgbZdbaqjzJQDbecvJccFDY6ULLa1NcHYbFQYM5pc +2jSv9Z9Y/tAMk90jh2A7drVOA1MOinjLqFLN8ep/IjFE3wyY7lTv2k/RSOPTNyYp3hiWqtQ7iTPB +qnOcvvL3BwSfj3LDHjrT2beixii3iTPC/WRWJorw/fIDOHYukvLB7W2FhCJKUJAdmRJYnGpUGPnA +4cOCk6ro2Y+9wi2g+cJptaYMpQ5hdz0OMULZZK/Rk+GiY5lCM1jZt+VQEBa5RvsAf9Iej/Pufw5+ +Iol7BoLZuuhBkVhptjRLoYK/wipLEXtfljOI/IBmmp9ISVPKO0v8op/vZPMxnpjyXGQ3cysidl85 +DC9TYvL4k907mXUPUYU1kuC3LshMkKWW2VC5FLoioR/7EmFjC0XUUhJ60v99CMuza6m6jJ9yzK1u +2knBTnykhFRi6CzOlCZXAMk0XBKKNUHih+POZ/ndBHIe1/dmYTw2gvOZpYg07HxMZw2rvzgLaM4O +r5/XLjzyBF+zLtejQmS7N6zV54SBaFI3GxoBZWoIOqvgGDpRjOhXH/jAtXH5I4jP2x8V4J2JjGLX +ff1orkAZCuE/3xxd2/hDCfRkBjzFCcbX3aU7OMmDTYVjA7HMJcCXWNdZ9lb/Mt8eSR9ggc+lYYLK +FruJqStW15MNWrIkssGVp8jfOlYSRhe5FPGRKFOK8uebfvSeGnmOtbfqrnotK3HtV+OarflFmHf0 +OTGenb45+D59XEFmc91Obngt0cO1PVu5Hb95YhfexDswN39XHEmqgzUdd1qASIRAryFAl12hWPYN +Th9EA2q8E+RbALFA0LNNF/tnNYS6pihrEIdvzRT1dv+qHlEJycjxH45+Z0KyCq48lXZYS3yjPH2t +YqXeUbv9g4Ivljuta3G0nfpmkLmOMvBDTgX9eb644YC2YOjrN8LbP9m6tiZs36x4T1qoeUIbg0Ul +9iI7F4nh8h2qmEnHLvqCMAdyBCAIWBK9CQ/H/8cfHr1MQfGmhtGic4kw1Ifql7r3K78CLKZueFPJ +x5r5xbfnVH/pqcroF5C5VhBd6e8Xq30z3LqH/EGU+KNL5yj0dkTd44NZxVpQto3zJ0UWztZPqbPA +baXl/vE682wrwICZHtG4Jn/qzoEp6jwicmzWYj3GdorkzP0h+nmlkqVl/D+3rO/KAnIckcXFRfoR +4JgjG3gYgBbRUj9MWwHaGBkdbfStK1XU/AizgIs4Y4PD0bGefgSC4sWxwVjb9R266M1tt4wVva16 +31olsQIFhfK+1ZjdZqv70Sk66Kj/9AcxZkrO9Xe6Jck8erwFSTaNTumM8KYIcRd2CNuDxZM295+M ++SwdWkao9Gtszx/mZKFUVfw9HohhX9fOs89dL0n9uh8ot2svuZJUF5DiZYSvQezjQP4ZEJS9mNv9 +6joJ6pp3Al4pxNQY42Mab6CaHcdrlDCuAocwbiWkje5Ra9sdSDqreoTAeY14AOsywN+acA1B01C2 +xEwgAKYIVlzpJFWzzD8eza58UGNiMay0X58BpefZn3uJqmhkx25dbucgU5vOdplCB1NbdCXLxV2C +LmO6LIeZvr3NbCdWVMTxqxaUstKIK4d4rJdlpMEBIfFabVDpev/BWIK9acUi3tCmoELNZwS7BqUG +c1lP0iOuycRiqL9N63LPKBV/BNVqSc/5moXB5B7nHP9bEP6Db5LgHDIM5cvdXzZFBwQgJKdP1y0Z +nAX7CfPOw6O7AE3nCDfAIn1ihw0e7GZReQ324prw8GFGFmQ99o11gVeFb0Z/1vZcBRTXMSPimMgH +dE5I2NCkhSCmVIc08+647rRRYZYunuZP9mrYSBpPYydOMGB+T4uF/RhekujVc6Hykm3jd/Nj3x+X +wrXBKuoNF5AoGTscfsOJgPKM/dlm74oACJ0RWNaedEBrVMqc2hD1Tv4n4aFbkluItdqsCLC0TxXO +9mo/9OoDfp3W23n1dGN7B6mKvyZBKb6jV56PXgv+11CxwQTWKXBQTRuqhb6wFV1NjnNdpxHqdxk4 +kims76HurGFVt/4iEuYofLvljxH1+ZHdPdQkorV3pq7rKkMNeuIq/7F3d5m3oTMlYbFWPQ+tw5FC +2+Ow0veWW3YBAvhhf9kGcYxbBAyDRMoy0GRoI/CzemwyYLIHvfz4Axr/VqSRTrQRhriLVvXtpvfT +W2A0OnMFxuK8gsTbqAuhN40PrT6e13ZzAsF/IvXOZg0vrm1lHlQlnePFOlUsUCEqVQLr0egTvY3a +YA04gDESfhspZMhqSfTMK/aZJ9HwSKY1mcjPDzsCOZFJWLD4GQ+oIC2hC53qho8r3DY6rZ52D+EJ +ZgdKJa8qlLdyifCvEjaWEk/2KfAYGQIwn0gHEmlJuTifcXLVIWvt6QBi8ieS4+LoQSNmilyPW6vM +vopXpDlsB2jAziFtYD2dkZV6ggLAYlHL4aH6niqot5vEQtzU1sx+CkDUfHzYYUaJ2gNfV+Q/LIa6 +t1L5ULZRxuC+eAVr2gmcygd/2aOE2zVGUoSfN4u53r64tCZp5A4M0zHnSxstr59fM8qeW/+S3Lx9 +1soWcBQY0GJYwhgS041RLqYzwAIaF46AX+fLMFMLiWEJ4G03qu3VFHjSc0am+Fzc5O2jBKz2CKhw +3ioJwixHZq4ye2fHtV41VR0Ge/KXhHffTjqhB9riVhWf5XteloVhqx92HY50vAvPIdk4fC2T9+cz +yXbM0ilOHao8Ia0zKeKNpVbyUWRLeh5FdvRP/kVIjx2NOwGK7luDvjiqw4cr0UzQ+EdIO5Mv1qTq +WR6QiOnI7CzFpPtocgqTuDwCz2uzYzv+JXa1EDGc5r42kWkkkGQC1n414Tav36Krbbbg5wSovxVk +Vzm8QfGzwikiLZQPKZRt3cZBRljAp5WtGWDxYw/0Wv6CyuJ2GQfHQi++kGVUkL9W7kQeBt1tZEp/ +NPXvrDzZPo6uROYTb//G2EwH5/AwqmLDFintP96nLUQ1YVP+R995m65w05cDuYieOR4P4sbvuP4G +aGHFpDynauf7J78N3roGCkMcA/sC3lBK3eXRQZLC5C8/ooYbU3ysKA1Ky6o4M5cfHpd44xl7zXyv +AXbxTVcZEgDfxUzkoc8L172P9gXbdMY+vsQOuKjWLBfA2rfPfqWs2ktpOb8ew0oTVdSqFUPD7VG9 +V2sb4oDmOoqJTkwtX+5XfKppgBYCaRr6P7M/qZpZflPkYSTosjhMOtoXnQ9FjZ7TOCTH8P9RjnNO +Qem3b3Z5EwzoUc31udebP+/TVY+7T/b22cE/q5BTnHRsQW5NixLq87XvIfSqULBFF/9JlPUAwlwp +rrr07bCUxvIgkAL9Zy09uwBiCXMvCN5GSUUV3HCT3GJ2pU4PP1Fh1+YyIZFHVNydCvlUUrGwq0A/ +tlInTY97zqmb5hbNO/hHlRrjsYSRCuo6xbQZfnCjRifQ1BN9bPKxHLDTdweHE78n6lKxYTizGauQ +FzJ8RWzXCr28H9gGTF9uzasJIrlhn3sV4mvvk4tbg50d8AOIfm7NSO9QqRa9YpFaxtya5czpgtn8 +G1cVv54TOS6swPVofTZOIsiHCI88p+nd7KbokHwuhoFlzQ30GV6K0XOIO/wo564nXbTVd0ZzDKHG +8XiEKhSGTtPWXSFTFVBM4SG6lLOpJVBUaNdsZhttwW1q53vEimGkt5OqzukPlHLt96Hd/SsQMqnF +FIguRBg5WH/RObev2/6gg9+55TfpUN+A5EsWZBRcY9SccBIxVdKdZTIRYy4GWX49wUhUmB/LcMYS +QpI9wACFzaYLe8oQfClnDegG/1iGBUwONwVhs/Tu973nN8iQ3ltR1pLxpISAnkQsJY+Krwdh2cR6 +sYqaPlulf0ytPBftesvaHIr0T0CltbVLOijrlXxchyq5HFR/IjQHY+YPUgJr42wugopU3Ir8/j0f +AssnwX8iuDuTLFNZRkpHKQuEJ1A0AN7TUcU2xV69KulAPTW5+ZBo6PZO7TTK8fdnogchoJ+cA/yq +avDo/IKQ+Z4WiOd5N/EEbkfxXyR1EaosCKpruaaS6wSpIwTYUOKHeP/PMXhTLoHm0EMAc8478rjX +npIFSeh6kJNSie8ZOuYFSlxJz9pxv/py57WlNghhIMOdGLa+gOO61hEuaVOL8XmninYSvzEd982X +R3yloYxAoKzR9QrD5om8QFJ4I1lKdXbXIt5JpSDZGXvw45QifvyOe+4Eyr4gpHMfpe+U8YQqtXIi ++EgkjBcUwCy2KBielMOYaUFcf1/haUqeJova6jLfdoLtS7EeP+ot7AIZBbR1O3VK/Q60yaOytQwn +DaXcJDYDsIDuTMK5KZUJ2/khuGtDNJdPp8HRplOe0h+BD0TMIwR6s454TFllO2Ic3lxGbOIsRptI +++9X/9NqHKdlORwsog540LFmADY3Wb7BmIyCFQ6ooA0XQDw0DFSKfJrmgoXZr3RkXxBK8us8Ap8V +hoKDqFvoLgLfegfYQzSk9VjfGdVy2RW7qerKq/Y4EPsgQkDx8cPNHz2njCCjYtrDk6k6gVPi4XnJ +TB2Iy/FEE+cn+bswOSjRtebnNl2fcXuhYaTvhYEvk1h5xAgun944HFKYBVgIA4uDAXLfhnjQs+bo +CtYXXrugpJfLibzElCglqDONd0r/9tbA5tzj1V7NapMGKGApI3RkZ6HNrTdbVCemNQXFVJA+Mwbe +f5+i0Z99EbLODjjRnFxR7RPgTz/Mc7p2Xk2zHr+2eFS8PPoFuxRAzF/jdYPWyHPlASMR5NYtOU51 +VWdMrbUY1tKvRT5O3Rk/MHLX1K70MQAbIQ+VodAEtMU7Rgi2bJBiT7hBhJGL/B7RlbdYcTUjZvBw +o658t19ByWI2cj38ApSk1WzDeqK5VVtchBHDTV8jKYhNqYF89XyVlQtF/bWmBIUaRI/LwagmwjOZ +vsA9nNRwD8UmQjFH0uVDHGz6VXVpfjfOiEauo/qSSVnIHGVJXgy2gFJ5QCO8nucqtsPE6DsKs5bw +GStcYsI9XAXgHGhv9DksmTCwRfIarklFe/q3J5Ka9CbrNFafd+6YSq5ALeHuKGHPCpi54jHLfnlP +5Fn5deNiRSvLICT+k8IJ9MNlhUwVRYK0hCKI+zq7fQv0RbZ2VXSsHLcQ1WeL4MbINxe0CgCToYAc +AgcSSUUrJJ50TAwqvVg/US/oEXIUDKOfjE9uuXx3hfUJr/hEBvRUMgi8xZUhVx7fSmtKs3Jy2Vbz +UbfihoHE6ZlPgNHi2TgXXSuR/TvdNjvvm0PewJLodVXFXowQs5PZV/gM6HkQ9JSkb1pTpHpCb+b/ +yXGatNHUnJvaTRlaht34nQanV+R1F7ko8776y2JvbhmjTlCjVoC0eHCP3/P8L0PUWsqHrfTes3zY +w0g1MKz4YWvZelxw9wmXgQQc+RYSOthlzlIRyenIIQzj2USH1UoVp3C1FxowaKWjWDGbALkga7KE +Z/3gxePNL8Ygg5+XERoAJEkiNBDaq56jSqFiKKmL0VNEcSWLFCxsq9gcT9RNLPWzuERPzw8M/H1G +RyDP+D46jqWbqbMhKogtHuF7GrWEZxwgsZShMjbDFTmGQvQTyByjyXXIOSmhPg/lTiVuhc1GjGnr +unpIkjHGS3SLXeBOGTdrL5li1egPRfJvDyr07iahKihRmOUC3IGX7rt6z7V1tkwCiOkXkdlJgvHp +u20My9YtCjVFHmDrkAdeq9rFXOUZXko9JRIes6/ysv+6KU0h7rbmK/d77wwmg66YinrWyZ3pCEoY +/I146R0Jng+bduUehIHUNxD8R7ScyjsXxlxOXHFLhWbzKAEyjw62jZxFdMQmfklVZ4u8Vx3icPkV +PUy6MrXglvJo2T2B0T4sy3d78h8sPJJa0bVCw51eVzA3qzjY25Ip1SNcuRDrJneeNJd9/u7NAyoU +G9xKSy/yKvPTMzd/dwaIXsWItQbK5LX68078P8gdCjvEAv+ucarNQu8OTYCBIzac6M6zJu5QF3+A +9KVwxTdgyEATxnA2+8nbqurKi7IrnRM0JAbOfa52rn+gkLks3Zom1Q2Luy2jXwRl6boK1jqBvSWT +FsianHu09VxuTq7874pNkFeUnER7rsHeu4QmM9oVuNagt8tJG1iVd4olMyuqRE+VLHaJIz/5NCo/ +P1avbmQ1e5v+nP/kz7AIgTHkyqKYUNG2/O/lHotGGWIRHWRXdmvGve2zO8L5g6pixrYmkQOY9Bhq +Ab32tovZ9uCYCnS9od2FXYsk8zpG3aB7RTnzkw/Qv7gM9wIXq7QwM2ReFdgjpxWeWGLaTFgYUi7T +GDcmr9GdWwjRhkF0HF80xAX03wih3cuegpOsYJl7aoHVpZmGLEGwzhCmrnPOpGecJOpWYxrOqKWg +3oKsyH34Uk2HcfQ/BJqsVw1deP+kMRichd2JM9emULa/q4IV/u+eiNRcbMP4PIF0rW7Own8/fDMi +VxfdoI4QA7asqhwFBeFfyBsgKJiDqKpF6QKxaIQcoBIXtZ016HpnWPJJxSl9zSvtVKisjwjprDGO +fGgxhk8nV+Xn9HEZDdj7GhdpLs755zfX+WaBlSgK3h0+yWgQ6ag25mo8lq6H+w1JD/UIPGC0uPR1 +3lQYPs8mU7bvqQ8KS3NOa8WkAZw3rXcM3nk0Zglj/RB5ocONBFWz1QYdKx6NRKMaAh98oF4ZGNuo +W6ec6ivoOb/QllpXOKli5iIWydF8/FPI0P0uwZYpXKybY9RW9Q4zciUGmYDnWM5M340vJLlSOiB1 +VD5QCPpl/GsbW3x4KA0Z8xwZqdmQbBo75y08ULpGSMAK07SNY9NzAXeUBPOCij+32nI0MZIm8Quc +VjVvwgfstQ7BkJu3YQgsdantXFFYHYUcX4COCDV7SbCwQdgjBQiNZvvrlXTY4/7feO7GHGQ1CMf8 +E1gYXGqCuVU2/O7nvB69E7B5xKviOzwsOrS8+wDtXD8bBvefxfbCRK4xITvq7RSYpWv+eA4uj4DK +CCJ5p1h5k8gBsD9tP9EB36CNFjjYE06cMKzeSXZGB5vSHKN9f0LcG5hHa6GdM2KiMNQcSgcEWNbo +B4Hax5OFe3wP/abRqhOMIeX1qPZhpL4XMc0BtZSTB0k3eeocKs2ANPOsTCZhNZ1hTb+/fOe+FTBE +5QfIgNcDBoq2ydKRQkUkdQC51SnWcRiGncYfaHJFgWUT4eB9wvfWwdHIXlW4W77ZcLtvAe3HH501 +JeHQOKNjKddcHs7AUEGT4KHL6lutozca1pgyiGR+nOCyCXIpoaya6Go96e8ziDQPSAeJ6A+JQZw7 +TKTV8zq4WlR8m/k6DSg034JW0jZ82+gOW8AlmSyN9gxopB+ysAscdjEYmGpywIvHtTPci3/SGzbk +SgtaUobYIIOmGAr2qEiPnzgLdabDnAQFRMIZMH5Is5+GnnEUge0waa7wQv12kmNC/iL0R1uzh9Ho +ZKVMi3J+Q2VHnD9PjDjqzqF+MdnT0GdpKMT6Eq++228+7Vc21P+JtEAvjec8u/7CMzH0inDNiu3o +sJ3Krqck/5PGBZ6IyK2QVZsJLvChuuYxvvKNBp/8qVFlURrlxYmizQ2heZAUO9k/6lGy0sEl8yCH +T0YG1GfXp9lm+xgg80dDcWpsoqKv+eROR4KOGu5C8RT+yFfj69wFA7ckef8AyDBQdkqsgqwek6aa +8qK67QiUFfwOMXQoUS7SQ7r/af9cro/LApX0gvCYYXJcmnkF7y/M3bXWxKT8ojS50tau7g9seMdE +WlCEuRoFvUNzh7RQGjNC4trZodP0NyJgXEf20cm49vElzCPXisrnwIx1uMg1IIntnGvY/pem82OK +zMf876Rxl4ixxUFMYBOOE3NsETTD73uvUfDT/b5RpWMNFTEPIerM0WGzJXRwcUoTq05bUZ0aNDDZ +KYKBhVEVLuTxXLdnSgn9DPguW40vD78RjYjJY1/Y3WcqJCy6nHBX66vBDD4wl6yAU4bdviL9o/GL +ZCK3bEPMkHVPIny4UE1eUVY37LYyPomXPuRu9udqanDVlMFnfOs3ZSVNENgwCNXH2A/TP9BvID/I +R3nPpO96XwVWcuTfvaXs64BvOspsXHgo9fjOHSt/NVveLQg+TywpBGSW8fgYMMrhBU0BvfGZI6Cn +zA4nYiy6FQ4VfLnBRvZG+YV9y6fqGYMHTEMG33d/9r38f0YadhVFVgplBbz2IIH7SKduBT+IXLun +Uem6txxk7hcUU6Z61LkGSRHVlu7d/9gz+rH4AHQWEi2SB2/9D7C8E/rbLcDUQEWTDFLZEvZPyPkx +ut+6j8V7xbJoaemVQyQTX4Tl5q0ANZuEbtdKFP2zCSKV3SE4fljiMtp0Dy0qJ7fLNuhPBmH9ohMs +byOLE72ns2V83WWHL+31VPBXAe10AJP6t+7dOyg65Zm8NaZ9ny2oiZHrKUBOUwD+ATaa4xikaBbq +0DEFgFl50aOphV1SfVp4O/rW6JLLmsHOOBlo0afcTzabq7bqX4J5eyENzLQqVIkHPsGhTozrwLg1 +n3E2cXCvfi7sV0FO1eBNWq/1eNt7/isCmB2eRoJAtop+bUALx8ob2BP7vDEXO91SJ5vQQ4n+M3z8 +PLnWhr2qNA61TMjxmawk8sm2WonCwsj0ndbzjN9qRlxIoqSfmn6f8wEeLeZzyGZ151ai/U75n18m +FzRB5VbTy0y8e4e3XSaidB0SHbRDoV3cSQiOwx7w6aAcoGEiIx0eFa9UarVaB1SindIjhnXGrFAX +a3t1NwfAUdLluyav56bsRX0z9YqkAk5/s68jLbWXPW6/KzuUF2gIq25Bd1smHeXbFBqr8RM3PGxb +wbsEUL9NFeLz0OnBvXNxhEuW3Mizzdj1pBmxgORCnD2fvILRHIT+GzhCDql3DaPZmAbVgtoIjJsB +2gghAgLVAyfRF2aQAstF0YdyB7FxBLIv75aDDbzP6b6rpf8F5FzEtKXJ0MDWDQsbcQPR05tJ5hbV +IMw7Bu2l44zd58vBVDaXixLzkVw0C7A7VKw2Lm84WUNBGbBbaYZmMFagZQbsuH8PS8A5y8hqyMi9 +8gLhntRQlmvuXAwmrD0m9IfQBaNpba704gHk1VgAxAx2QRcjmRzfgdIJMxzOyz55/BYcf8FF54Am +I4+YKaxk5MvhxoPLsWuvJRt3IeP8B5LROzZ/SHt10X4Na/Ne8li8HWaGmJrGCYlHaZRqymQNnmly +Vr/Tf4sWtJL1hn33jqGIv856tGXBACPzxkmjHT2rvMbBHyl7o/WYFkbTIQNSJZGTwvGXyIsYUQoq +c3D5UbzeB1xgWc5aX4drToYL0UWBD0G0YqdtvorfilIEWPMeHh8fSuGprHVCx0KKM2LjLHDsGstL +mxRCAdGfw4GEC/2K/eaFcgL79OhwQv4gcmIBJ6ymra8emInf0aooalI7Cs40flHsbiltlLVgEjsE +uGNOLYJZjyj24xABCL05tFYatqmoYhRde85Ywm1Hv7w4/rlXaMKQ1l8rXOPoVoPuyRxwNa20Wl07 +N9LfR1ao8aLpdem3981lAASLlX6HW9h8+lb9qi1PVJzvyAJQIMW/JJdCYJUFtf916EjEnZiswq1X +hLCTHktdWTovBPfKdQp7810Nrv1tVIXx42f9UXgw2GxCs8ED7zw/sD1FZsxHsCVqVlZmwf1JWVUx +Sy87I5xvpfGA+5m6iF6lw9v5ZxawTbnuSlQJo29X9hmXUGzVMwXSURqroN8peeUeE3ZCQ75hJ8nl +HHkE2CPadVpifmrsRJayLKdqAYBzH/qjwR82uHpR9lSpH5nIbZ2mNxtSKpB6qvoMN1N0xCPeO8sM +Eec9u0JottvyzqP0EKtBCJg3Qhg4zYMx4KT8Ri7x3phBperNExa8/TOmoun2b3EzPPvdjZ6+8b+b +EIX1hrbhYaxEbNxYst36bOO4fyQEsSEYirK6aBBZjQgjbrlncDyRFSzrzR7Y1iN32ljWG4C7P8xz +5+2cnDYpmRvttxXA6AHSO2+wARDrTYP2uLx63ypb4Xr51q+zuMQ5+PzMzcHKPffz8le/g4ggfF2s +wkm8oQAsojUoo7FLj3koQJYryYdovxiDtDDIPjH2zWn0opsXlUDev6N+odbZsUbe6DtG7ZeFUtqZ +6rIRUm718xIp8SAzuuWfmMM7rGXMKmdFE1tf2xacSgD/LuRFOB3IyUtJBcPpA0MgmLXELVtvqY07 +2rAjOOKEg/sAhlBdbZbZKA/TlP9EIXY5IrmexMyWetbnH9jkSWrESqoHSU2/qeKJYe7cfKPKzPAW +EtKiy9teWqtmmRv/M/brjBqVUhzmLl6nFZh8RQtM4cXpOd792eHD4KGUbDq3YGdzCfg9z1iaD1He +Qz+bps6YEocol09BV6Yq+rQoYAXW9ME/ENqMcD5a2RrxGrvRg3arOKEGU68cTykY3kp5P8YqThI/ +s/2RIsA1nKzMaYNuK5KMvqMqt5vPfGh8FIw1ei+jW+PjuJMotjuarmNZZEIlPicWLwH58CbhiWPm +ew7NT8GIxnM6XjhL3Ya5d7F9+ZeAHiEnG6aU671cfPsk59MXr6IkyxgVKJe+UyxRsDh5179ByqrF +PrVlk7qT7DhAVuD6ixY0EZwICEnkwjzpwRqjnHtEQOOOqHJ3TSbeqF6I40Yljp/1VdbZcwNwWsZy +ZiY4BFHk5KIcMNm+8D3AckZgI/zTKqMxGgcivjDUjAJwYoyhQy4yLWDX33xNZUSRxaTk+vlpILrx +N7dITdFMgA2RHId8sLwp5+mbk96U+lN7qT/+II+zzvHyTZw6QaNkhyCcUf+OirGzUZmjh6dlYRZT +DECYADbEhQP7aBuxJulwXjdV+mNp0jbq4MwTridGlEvof7USzzvp/U20eXU6QPotVwDNIaP+Pm5+ +9f1BAblmE5XFoqdWIvu/BZTCoaYNVdY4O63XupR+1GdvPWIDGHm+i0tv2b60WFIBBkXFkkYDnVkI +ec6e2qmFWRYkAicOu7+gSGDWt5oLL+4hPvnPt+6sE8Lg4hOcp/ssLm5QOOWwynEur4V0XQp4aQ63 +gUNd0zlvPD/31i54xNutBJwcJoTpPcjHN+aOKjGEemT2zEZm9KGB07E+a4u1VeB+Hlq4IztneO0g +vSz/jbK00c4TkOzb+9vk/gKf5eNAtejbaDvZzUUk9+JXScD1B8nw1rFw0K64fcJ/7cjy8ryV9u5e +hr9YPUoplFi3pasSUO0ae9v0kZT9eENBdkmKlzXU6AYPx6GFfI/VdHqlb3n9MLaOOANFq2cHRiAy ++zIJqJUOg+ayexM8lNEr0zoJ3A2mBYp+z3U49ALjpQyE05UOpD0oziFzkqWER0YygOTKj7hiae2j +a9SKgkXhI372N8fBf0Z+jxgl5w6NtQBR8eEwCwFH/sFVfwpwIo/Jz6n9wktxot1TLB749JUCM37o +tVsuDE0YfDlVsCkj+EVoyWLDMtvHL+wEJm1lKqMlbWzHzT9KCkaEl7Gst2vhD/zjghp02sSJVX9Q +ZzB6jVfjSP/lhdjzjQYC+yKHoVEOmfCDNUECqzlpqMEzPwqTfs6BMlPzjIvKX77DZVTIESlAqOGP +Yrm2EPoFFApF8Kral05oNUUY4rcmPNbagxJDm/6NkB6oCiSjGRrTtBA2C0XMfu3IOqkr8LMXx9+k +bOFFRREbe2R0Fl5BwXw3QNWsvCgNQUb7CDha8gwZMEsEjt2+d44T66VzLr0y218sRbTiTSkHnYco +8R1CndJro3C/9IdcXfZhQBK8sq8Z//ikSj4U5UXIKxx7ASvBQof9DsAlPpfd07sxo64rZXqvyyXp +IZo4vpEfPulnboRhkDEYbanwJRMLMWeZy6J+NoxOJRxjOh83nj+rYV6f1PQKMQuriZMIJml+zsEd +Oa2p1Qu2Vg23UeBLYMwaYcWGDWzorIxu3w9dn+iMee3Gwusia4MfunOwkd23APWo2CYipzFvFVU+ +ij/+dGYTQk3uj+PlE9coQOXb8oR5Yzqu2Jp3WNLqmd7v7NaEoVvrKvp9vYFI65OZRk2753CQm93P +m29HEJSJ1kA1yn6ZWjGNK6xjDR9cZblw5DoAM1sS4X1K2dfncIxGYD5ohft86wc+PrseFoQGgbHc +Jyvcs8MAn8UQcEVS58s90NR+DBUGYuIj0LN9f2C3J73InvbNNc0yp9dgBLBXBuUVp22SkDTrE2uK +YVVwzh+rtr0yvH3IQ5FVr+z3StFohqsMuFQp8iMQxiGrhDdb4hdD6pkoE6ou3rFPu4bh/AaZ9b69 +9nBnApI4okyOB6VcUmENusMmNrWhAwTabBvYu/c1n5v2gNt2ly3oxw6ptDRc1afFISAI1y/nmoV+ +kYOM0uclNroWpyKydfhWndcyEcsCN39kTqN0mC0DD/DfdZdXmgdqM1dQmzNkoqba9JTat9xS3Zxx +fJOtTcgXYKMCSP+83DdqTQyaly5wKo6e0NMXKFunwSDYquRm0ATgcRpmOcKrIZtcmSu1RND9mGes +rWUYZXHostNQ3yDFUzqGkpi//r3ePDj/Qa49cvi7KDQWlv6px/y5kWXA0Icr8hoSAOmHgDpxJq88 +PnWa9SFj9ec6tc0nkxL9rVxUxI3qYKTqGrQMqaUjp9J+gC5YoCBKBXLi7CA4k9Ue52BPtv0U7FmH +TAsgXMFQNgYX3i+/g/h/92f1h81mYcXRQW4hRTKsj/UFwWJT0JDaImCsha4Q66MfL/9J05fUppu2 +pgY1qx6YxPhan2gvYpXo5t9uFj3mjZEoNobh1eXfFAR/SSygKPyzzyI3Sm2d1P+areDi6PGJNPIF +9kndTvc+mGUIzQ0KwlzISqwmjwimMso2lB3MTjZccLdp8Jii6Alo60U8VkII/SQxmRq29q3qEYbd +MaBxNO8CK2hnGXznXiluMiYSJrp+VHECf7cS3mwT47zGLHLJAT1w4WD0PL33x08XyZfxuZ03x+on +qZIfEMXZdqkz0QuSi9st+tjykBew1N75v6OUxUeohsbO7NZBPxYWjCt2r4KTU7Gz1WGdJenF27JG +FXfLu3g+VjWzBVTxt3fh4oh2obP/MGywraFkyMlWFJ2B+8XyegQcblxnc+mVnAfnt+LVgt8PPVN7 +UjL6aM/qLSZoA7LnGOugCW9GWlxMCsV7WYK0p4WBcbRk9/TUEBwcpV+6kyEjTO3VLX1z34ciG6AV +npISNgmA04nS3tU6clVHietxX4ryyUZEacq/tFYmKvinIzj47qfQ/OUVKLb/Cp3QFDiMFbN8GsVN +6k94poPyfUicSiU0K3G8K/So1VqO+o8hDlPRazFGXWq+gMX28sHcQIRENn4oyKfxidJ4aggm7MBh +dST2OK22+3PA4+sVo+bF8Kn9T7juIY2UPcz46HsVb38bSZRYxGzwXz94kcFH2C/IeKk7rGzlsAeP +IxORx5hcXFKx6Ac8bfV143BIsh0wW6D246ns8Z4Q/OgZz0f/Nr2T1b9JDERSbwbfXZqmvzVTcX1T ++qeAQaJcs90niQTXG/G4Ya7e4p9U1AX3/2SmJc2YWPJP9d50PJRcVF2qD4pppPZKfnHhdqW6POYS +qX2KnHW2R7RJB0jXdz7KHHwMDADwdI5nyKSpciEUGRK/9e2gehoXZNknNgTV6ms/o8sMmskcq4iy +JjeckoHkA7PbvB5HbVyIHNDfRHnWw0GnoEEjJJl2rJWfnV4aAeCnWe8eBS9VgviIs1E7osVQACHy +e4dubIyYA0n2EkP3BibtuxGFznPD+GANgG90vlvoHauUJaR3qQy5FaOmZ0+JN0hB5X68BBgx56Na +os37KRckD5lt/rwm3IkPIUMNXN8mdNb3uApA+sNBwr54N56f5bVStJoBsoSzhH2t3HyP8tWr7aFm +Hj9FimLce4tzBwmPqNG5IvbtyOadnRTrA1k0R7boggVByrVcDL9I6vzC06RLTuls2iwXLyIFVHbI +C3qsp1BS+gtOS7CJ4GjHmiT1re1LDyjYsGKz9fyiQElPN4TCmyzGWVSdR8Ox/psbdrF2opEnZxx9 ++clMp9iaOk+bR0GjZG8wHI7NMb9xNP0JOVj/k+8XTyuhITavMoz4Muf26PjyeJUkDBzjb9Ij7Q0w +d3pK8nEdh+sUNWpwt0+xAUKsxq7lemvq7UtlqnPVlUkvlpVfAFYSgonTCSKPc8yv3L8P6uXg+yZF +wrNfm7ftzOaxcmom9Dl/ltzzZgA424hCFK/nOfspQU9DWpeaSFYyQerZGlx1gPrPweY9QJUBvd5H +7JsWcUhDpjA0fJK7ZnEf4P/BZ5CrXSXomRrJ3OI81xO83y2C/jQ8Exg/twbHPy/I4O7SD1x+WUMQ +NesA3ma2Cq+5R9/XAQO/4rNlRc/vQAiZQufU8yNkdNsEpTh2hjdisuZQjGLCaOSbMO+hOYUxZxb1 +9PsgE1oYpiWPMcXG1d3esFKxasC+e+ZLZV33l5zJZc80zkVk8NkLXrBJbCCNsB5WhIagaciRUy7w +NH3yNDKwIecHcF1Mg8AumuQPNTMv3WYIyh2jtLKGLebG0DIUuoEngjXzlW5+Gbh3LgzNms+8WFyZ +inBdk0t8B5AzxaT0o3UX4NKCB+7mL5kEG7vrhSfJknnU5nz++e18JPLGu/KK0SahIhSs3Gjps8UB +TMWjV+CS0wsxH1h1LEa7JKKKN+B9LKQsuCqE6bU5tWAixwgABhf8OtnwrayJYJG5yRqWkniv1tkL +IlR4rSyM3QnRJAqszmnusNBvzzkPjj8picTHxdVBByPXToDdBRn8nLeul+hSowNOPrH+AQqsx4HH +LfVSVL3MJwl1l4jywUqWwf70UGp8kQBDyzPhhOxT/Q/wzbTXViA85yVTdZI7RTcL3sHIyrD8WwUB +JWmgnR1bMmEsXp8hRO+LVhtwh+Nnpx2+wALqlxJlg7pioMYedrhNHIbLMnyX6Pw+5bE5r6IFmNU7 +Ghgi16eSPKR7VR4xqHoNKiTe0U/VhVUgcfgvjpQK/r29Ub+YoJCPS/FLcRW81tyTDLP46JDTMWkE +2ftUR+xiYhYTBIpe8GExmcrs0z8jBo7HgiEajMOoEYhd2xko1YrbmYPvvqmNr6/1rO/KugzeNJWm +VN1PSc7N0W9zOtnrGtgFAGXqlzoUKKfCHrnKv3Yi90kuEPIJJoafmRz3KeQM6IN0uRb+TZdOoSQF +to3VT9xziwoZtHMyWInAGoTDfuptZJ2H2B9FlSliuM3Vrg8vLYbdRqYn3ZG1wi4dnozVJDomTSue +FvrCVv2KmHth1LDfbGwSrJmFa8Tm0DHNGEhhcPF1XUIQbkzaxaK6WS2ifxz2b4SCxlIDfRn7NxEg ++/wJkWX/4X+UZuUBk1fkWgURTRC82EcIoeXBFSb1RQggu1pIwck4yGnLVHZjdowPylil8R4vKPh/ +S4cc69lziZ+DSD1mDrBCQnHSI+1iKy3vi+gPPMIx0/aLzaTV/gcYEZ1sOtAUiJcTmIbpEekWKHBP +f3TzoScuxgBHntSAQRQom5Ykttj2ajCuO5tXjkofgurLMHpoOihw3aGRlRZ521YJ86vwv6NdV2yd +X24jz8lfkl6a6pQ2bmhdH7jOLHPqC/q/dEVqGEc82ONE2xfm0VYvyI1JgLsQoWc0kDh74ef/E3QS +CvKeqaK7hkrik475ka1gIr/Hjuxm+fSvUbBbsKEBJ6tXlaLD3X45zctHY1YebajaNzfiLkQRBYW9 +i3oGRZe0v4Tlkzqb0FopwHMlPLx3fLBcpg8YV/N2xmEMa41SDggczZSL48ZokI4zTq2QcFbBZO75 +c2pFdCXs/Gaanz0oWckl1oOdKIgMlbKMTOQed6wjCXWluBRG/En3aCNpae5QBBWLwSJ61RwwBsZm +y1KcvTzYyLsVUCbDirOcM8v42Niignuh8E3GLSis43domnkHf7T6VbfRFbZax8L4eUwzYgrH3ljf +7EAnchnt1loQPrO14guckIb1Zf3HfuWevHkMEw9ue34dW5gnYirbViRVHAqgkePwhaP6XE0eIvZQ +9ilr3K0+jLlg4V1ASUiX2tN86o++vXgk7YNNPxVEyGfNSZJXo/1jsa057g7ijKH01KWXXq+DPR5R +METw9Rpz/OXuybFRZ7kX6uo5LccLUvHKTk9Fi8POIGxkQOb3FJ5j+zqYkUpsVbXhuqcfPEkn9BFF +o1s6DLcp1vEMKJkcJdwRXRuWrANwf2cs5SOsOweQolQGOm+kb/pSTerQJ0ORjJtIL8Dffgc4kSHK +K8L8R9gS2d7Q+KVmvtRGemNLpdvoPFK2tQkLC5ohFd6yqQvwqLLuocE2vNS7bMocXUB9daHCauS6 +bgqg4+YdRYIcFBY7JTZgro5J5VHRq5ZQgh7L1+Jf/nN19wGLYihsW9twD3jQoIn9OPGiWIX1mgdp +9sy2X5gk9DoQbvGenlu6SL4AW7cJlWwCO4PvrDKnyaZt/iUL8khGlF9OyXGLvBu/mbjiLy7WRaPb +8TsfBlbKc5Vvxp9xdqZRza9xjCsJpZUv31PFugiyBXcooz7dw8peYQELu6sqj9RSIUi+J8h6HqOf +KSkVqJVSzccnFWPnJ9IWJC2lFPeEdjZyCu3b9Ld8tYO6QO3WY9Q6uVIMp/mmuq+I38krMqDnH2F0 +V7AV6yLWYNgUpxcvefWHibOeFsZUtN8rSs5ejkskNlkQX6EprmDr1gb1GaqN+vUErU3uqThkl1RB +6WRR6WI59LUDwML8aooLOaiOQQit69pBxjkI2wBOINmIPRXL8b4WhqVUvzeBVyMaXWbWlMhuaj1Q +/V2z4SDTgtEaOXTsXhvsucvKxwXDJyGHsqrjWT9XPM3d9vNjupghpr4+vsC9MJDMLdWSehG5Z1eY +t6/+KECLqpkMNCCCR+4kXMmL+ksEdxWZunbjL0+hB4jFxoduQDUjmuTt5+LqihTNCm/Spaic45Dy +xDKRNm3cPrpTVfFJhRDDlEH8gWBce8wxr0fNc+G8j3xlsQcPpHvICnrCmNXuWbqjpz7eMv526k/n +RUmZp/vmLxO+Cn/176uz8L3VFuY3AaZwdS3AjJZ3I70Op0Am3lwigMmedlnN2f4/OGOYg4OYlnK/ +rGx2W3nI4BXraxsUZcQytWPJlKXK08kvMhg155tx186UTHSt6thFp3AWcn+CLFkQl+P1XOK9YpHo +wGLDSQa9MgTi8jUC8gI1fyV8CVBk/I/6hkc/2Y8U+wMeVZEz83/rRud57VL891CuqPKmTkB+k0Id +YLmQsAl7ZJwkv7PDhWOFS99DN3YAhAI3a0USCnbEY+Btb2/sR78DYymZgsnNKmsOlywc78SeUoqs +uT8fjIXLZPIFFkCJi692JTuDoq0LuCtIjOfY46ZLlymH9uYnnEaQKE6PtBMQHwjzoSP3nS5nvVna +sVlUjXbLpDknJYnAlgkdcWKI8hKqVDeoX3cMP5EHKuvFVJ9GpMYP2UnbfHgFWPXHXNN6HJrydkKf +ZOf3XsKcyIzuvtPFnmuKmhNgHX5dPS6GtjFxdHDqB9uNdtdIBXHdvhOBe/p2tNWMRMreiqpAmszr +MBZqIvkQ2t/wi1AmS2tpTBCRCbx33DHBept5hDKOdRCj3G02HeeDWlpGLOwlWxpG7Oge1mIIVx9e +j3mzLhiL8HJ0IApMe2STlAVVOGN+q59sd2Lk3MyeL6WbCDRlsVTYwyKA2nuJxwqhgGts+lWlntFP +0+qxFG5iR2Ke/BhaYNBb3AZaCBQdpWe/ygt5gEvT/d0obn69xvP5wliaU2fTycuCVnpSFG6xrHtr +NI8BFT8elP8+egCwL4ZIz3PP6gJXRq4oOMGLnOzqgC6os6S3tXG3C96yB6FNUpVsHhlwqjtv7RER +RJnLztXRmGCsp/5grLpiWEm2VxGQxtJ3+yMiP9eyDtdimWp2Fk5tLvUq4xkwvZ9jSKX5C0WWImKX +24mJjUo0t+YDSl24SBO8hZVXJBbT+8gBa1J19GGKmYs0iWOzGJnfkqFQPLMBa9FfSdiopoX9aGs2 +MKpL4hmsrnRZDP439ZkOccsTJoLzAMRRoDQz5TUWpj96DEFHOB6HScW557IxV2p4PdX9YlwqlK3t +HnLbua0C6w/EHY3FEEoDNnxyYVxKwY2wGrwlNgM7BykvkaGqg66w0ypTj5Q/9kCjp+QicU+CI5v+ +fKUq8MhxS9IvNIyhOSRciaHFooTwy1q3H3S9engaQWW+cZ8qGqpwNafP/AHAkkvPWSQtOJpgbkrG +NFBrgPeFXq8npbWk3rU2oSUR3GY+b4VxzwlOA/kN7ioJ+eANVKpwyhj4/7J382JLTDKIifd9gU5N +JHKP9S2VaS00V+U+vlCZmPnx6vii0lTgM7gCx8F4SjimbU9nweJ6uhXL13xQTEptd0yDf0ux1BFO +NEIlSOqnVREyi3eL8L707AXuypGuugHS87TRxLDtX+dqtHBmSLQyLYrPPgCo9tYdnYCnHKvqy0Ju +t/uQuJwbJJy2m0bha5PnEZNQEJA0YzldO0qDjDK4sVT9wegIEJ/E+qhIAwJRPRMXk9rFi4rOIYx+ +4hyODc9bKcBHk0pa0C9XYkIW7UGhlqBiNoDpoDx1RINx2dVB/t6s8hcqQXe4fyAo2v7C7frgsByW +lyrLLtEnkn2Z0XWpqvqWL0yRxxIgpNkimvVKSEUvc+Uob8ejBoQdGP1314KnauXwznCckxjLXyoc +o4QOHljjgel+ZHYujPyQA59vXAhSnI6g7gaR149o3ckLV3MbpTwsrHHQ0RNMVtY218zEmf+pb6bc +Ret0InPy6uxr0teFdIZ4NJJTQSHpmvmvC/c5SZ7SfwoKyrKDgm7Vo3kQtez0F226dJ3Rn7ZSeXBt +sDy8KtVe3tE5Etb6jmlFMVTlKyrtH27xYOyvY5aVk0H7/Y48NTdKMar8j6FIg18pfwy7/6PFFC5N +eDfR5c0DqNBIk+fO0LSPnrrbh5maoCYMazVhnDhiWVdpL5v6RDeD00VLjmoSxZVBCM9ICy0Z5g91 +3LtG0R/GmHJ+WCFAcBYBRdzhWBpyEIXAjpLsFw1XqxxLX0t1M+ssYN9ii1nCrbcI/XCguL+bmz5h +Jh2lzRgBvxkhMXy2nNag0ig4ZLF9MgfIWmTAjSQaVtKSltASYSk2y9a61gR5Km6nNidWACeTHu+K +PiHmZWIWa/g/t/2DHIW9l9loYblHShyOpae2MLRm9x7ff7WeJOjyRSNVdtgvr5DcH9EMfttbXVqk +oOaTtrzMBqxUhMm6R43gK++kZkPo9HXawhasRTAH4Q/Xp1oafmbo9nh+MxRT+OnwR0D9zUKRgH9j +akrO+kmYJF3qrmxis2sRaNU3Joj/tLrlwti+WM9pnD91rdZiN3Q6s1KuVzUP4LYVcv8whMOAk3jN +qj90eZ/OSdWW8B/JwMwmNJuZcje1C094qWd4k7dCPmowMVr9nfrEtQCY0gmNIY7pL9h0cesoBpzO +0gJM0nMMMmTAylu4G7duLkrgcsgiCLJvvWR/Eprzfg8/QgbwHupvgSBQClygpB7GAovnVQjqXyH5 +VZtGVT7aApzZycxTPEYrRpwbuHCgCExRz+P0+mTBOkVcnruLhYXEYAzT3TsFvuLUY0OELvwAnE0/ +XwZqnAOXZvqEJNJul0uqDJq+TS8QQ8pRztv9zHqm5iAQ7W8i787EVRlBvNxv2pFBRI6lu1T9ZEFF +6DVw9IfHMHnikgCs9VG2a5A1Iw0329QTrAwRwiC38Uk8tHwVYWHSVsNBSPeHuzd4iV0xPdoDXJMF +QzXP0g2FotucFfMuSAIjOtiNTK6lUHNFteCe2Qpvl/A7qbazO9gryYvhCR2u02XpJcHvcXshSHN3 +9KGpd4hxPOjHUNXDqGENVyEV5VseT7DyRqrQQ684o0xCABMoLRgY1wrblhX3LIqcyELoal7/iX5i +gTQvCzY6dEgGxoWsgrbcDR441ZJCJvroLyquu8qwESAfHG/Jsgw5ViTMuMqkwreVtt8t+DZi/pQX +Cex9r6Dtq6iCHfSMMXqdLIuB3/oNMvFJae6CD6Y+ugGkh9URH41bIFCMbF1xhEF4NotG3rTbf9Im +rH8O1KzaX1FILFKe8aNy3sWF4CgTJfk8PvM4zZ8tVeE9X/jvSmX2u90D5GkObFIdaHr8qqrPJC91 +cI7h5GAILosV/GPWME5PHy5aqhOmhETAo3Pivg8mt8TO1D2CwPxbUArmHD14UO4FROunGaeaL1BK +NkSxrCvW2oCoS5vo3m30P0g8jOThqIfR+romwT/jtC4EqXFeb6U2APEMw0BV07eEFpDguvBNcyTQ +wnju8KPxMuZQI9uzwQ2RD0EwCmqdhcfxdOmAnk9EgBQUaC8BwQVkUV3wmK8TblvlHfsClAa4fr8o +eaY6k2jS8YN+f22JsnslK/BXlHTYXYIxbwLTVuTzC3gyoXRxP5qtncOTa0gSaGI40+ozRg7819BJ +1TJdzAxBDtkMWOumzk/009CeYrsbjX3FeHMcKNnNpkEprbNMIY9veFNb8uVlyc2VgKaoHJzuZg6C +KrEnydFBF44bZMMV4xQa8xdmEGZU0GjBY1A0Z3xz2S0gSZn+aNplSRYrb6wTLjxnaLJewdfkyjoC +hEXmJgWd++FVX+ubDIgDHfnfaLhKiyqiOxoUEC7rtR30OIeBjYD/TNihzxTPb3xmU+cCK34sudCC +DeXEO/AxSBDwKh7xke45/ISTg8mKHQiBM5LbXw3tSKh33EhjqUMD33xumvMRybzp8CEY/xoqGIub +XIl2uCuFkM7h3CA0G8JkviUeS4zVuTOhiGRL0cxUcucnxI8GVZrGnbxN/KSl1UA3RKK1ZYBeXStK +zrzf1r/dYml8boS7bOllbahlRrs9cYUJ1LspAMfnxYCQGjLjP1A2a9ICzsquIbRIsW0CI0MJ/aI1 +XihPVZ/tMEdGZcXYadlDWz/7EiQMnDYK5ui5GBZIyXDK799MAtLWFgdjdMb7wYQmz0B/6kDM/u2M +vUKeeMvFIxTuj1FL5Ur9u8FIHKCk/xb7yWZtXM/VdNVFatVYfgN/wCuAdgk/ihtsJ7P1PAiGDsAn +SeH9r/mldVnUqS5TH2WGrAF15k7XtYb7kGLm6JM7kpifXstU5ByrFcnqv9Nm8TSnlM45tRzRIrt3 +FUl4WR/kxBDbN2GVI+aBiCOLm4rmIoUQmz2bd/AuA5LWt8kgdtg8isfUSyRLge0NTTSyWiUBPxGS +xgQMtuwAiNWkGU3oVh7rFKYDvtUl1BGOUMUZePpLKyAXWK47YDvw7ehqz5eFLjl6KYZK3cbX8ViJ +1Hq7SfmyS8trlGfjeOL57YoJK36LqLHubWTizbP9IGjQVH5aRz+seZbkXv2sSxEnRYXX338QHlhb +nroPsYojXb0BHc7Py1/Jn5XAqYoPpxJ6oQfsl52hymp75Lg8kCWn0b+zslI7WoAu/Zny2vYdiTjA +pDbYzM482UgjoQ+XcP1V0JFblIBQKsql3laKy1sQVdomn4imTC5faTshNjRHbcNRRCAuJC3pq8HT +yseVsH94TZGLYfBFoug4RNaYJgh1QwG+CbIni23JNwKN4+/7HhnKA56Wdb6VvP4ifKwB9GZv0xaK +H0Yxbe152OHuyXeIY3a4gl0Gz/kEjzpY80K84fD/KyCGT17LEze7JpWc5MwKWyyCcjZOfBdm0ebj +6Xu/wBLPZfPDUYoYTyKtqLwGT0Po5TjIf+TdNvvgeUhT7+UK1LC6Rw0iKJey5Fi3hVIxwQynDiDR +1/0r2kBWNqOsVqiBWnlPTeFwLpZCM1Ay8ctyWwSmMZxBxKVpJdz/3tZoksodstzkcU/4rPSacMjr +7PunEEmuapD0wDreguqeB2ZCfmDKUWnH5OrGlTCP96McJzfBt2/0jGAIIVRWmrM3L8Our/xqSr9v +oW+B1AM2WbU2ZsIpuSvU5bRofm09dzt8Kl3Hf4xwuR47qKN9T/l6roZup6Uc5yW48Tpv75nJwt6+ +VTYW2buq2sLwCJ72TJ9S93bzYHoeUhbPMvWCl0dG8/qvLWAk4828WeizDfsNmxJfCgEHL8KLVu8Q +oFk+R5ZZYsdQQQSDlkt0gwoHao5V0VzMJFN7HoKlKyPZlBMdx/ySmhFmd27q83rIf/u+vH8pPPvs +sz3RPJhwxxGaz4egt0ikyu+xad9he+qDkKCq6DYRIaw0IQrlBlQt3dBpbX3U6z4RN4tilzZ2kAVf +iqgWvlUhvawIg031nLXFpvPqXypQ61DfF7xo3k8td4pdrh38vbpzvXtH5h+ynRGJa4+UiuoqbZxQ +3WcBff3Yas6IRyHLcB7N3siV/8/Eax5vO0pfc6wCzJGHdzOkWuEcHtbMI49L57t5gpi5idAszTVJ +MFdgNWH08BxBG1m3fkRljQPZJUWcVR1CgmZUm8vPiYrNTmQwfK0VDakTkOIZLEF3A6XJJFJzS/BZ +rAj5u8f06ifMz0/rRAPJCl1ffJpx7lkvNVoHa2PI1xypxdL6wmfFSUVxIXDKpIr4ZYsmKaXZ6Lol +AeZyep12PwgXxA5J0rT5jO/Czw4YhP0G4SgIxeiQIBeQP5FLqNRlDdUHLeVXpCUAuf7sGx1R/hhJ +DsTXj0crJghhLWvVaJR2slKRwUK1I/Z450fztSkHWGXGePGTJtQbLKhzNAFqiV3VpzI72H843GM/ +945KJNaFFcY8IecE1RQLaxYofEJFINJpRGUCrWMRth529vorQbMvJ1k6U/Q+Sij82NWKa81Gk5JT +49acTU2b6T8BP+SIbtgA1QXBuKRcBLh8/S2/PLskxX0XBVp1pBkiInFrrDrJVED0SC9RSpbwNIze +JS+CCt0MOl6LlkVeLJ7FhUlyZnJGhTvg8AS3xM8vypFx+UuoepdEXvA8SER3X0plC75gMFED4fYj +ad+xXkXe2ePGpRgQzG+a064wURhbQmn400zySpbHWMoU3gljagwUsCifIKkRzQHULEnH/bDm4Wdk +LE8/YmnUbGoz4nZqGp3Ed5235mPxIdU380NXahDVCe6ZNAOn/AUIyMh9q5fBlyQjqT3ptDY1DnCV +zqdHNgMhzAav7aNgDgrsbWXVgRZdu+xg2ZuobLRQ5AXMJr7QioqIARbEOy8OP6Zi2dBtdH0uak/x +t4azw5zV/vbtoRpBqNnUg0SyOLgbhvaplp49ybz+AxD2+YtKECZAuYJHexr9VYporeLde5d/WX+w +E0WngvKnGTpJs+j1lyIBrMCT2WjJ3vwgLyi7hsvwlAJTXg26LnbQ391pgKW6sMcPfFqin4n17cba +j/AloOUCnXbc9ttWS0JWG5z0HV7LNxzTBas8eg9PRSXqsq1S/Spn37/4WAHKUOxkLPOO4H0/zOEa +XrSv7+S9vF9ao04fQDtMjdcVnoKHOA3/TtHM92YC6kUSNUX7KXrQYZMiBSY8T3Eb7Z68LaOq/lcY +n7h9NhksjxgqEbDDKGJ+gpb1r5YT22fkPMzwAoWx26rZe8n6kd8uLRjJCTV0mcbWt/4jZXDrztrz +ZfGR7xeN5DYnyk7qCJ9M7UwWvXg4m5l+ByOu03Ea/ztnT2BDkMM8pJfRNPIVzLiuiM0I6neJEwo6 +s3ADiXE11wff80me+eM9ysP3T8ksprChmPmqT6AdQPn1AoWKGpcUk2ErW0SvDF47NLUiihZmno6Y +gHaN1N7tbvlwFvIfGkyRBAHWqZ3td1AkroznBQaJDxwrO7QKjSdmIfF0m/T4gMrAVyQMAL3k4bq8 +m3Hlk40R3RA/XOLLXmqF9zOmF5zFKXZ8pXeZYpKdoNtCJY9loiS5vPnYqmtE9o3fZHenO8K79azs +CF5aCrgRpo658hKk+IpScWjWSuJtnaZeTGLKSJq0TXHhnD9RI9rZgwJLAFPHfyBbcV3YRBLiZcY5 +GzX9MrlU6oNbbRYWJbvcyKAH1aAVQdJvpfxqvVfBwZ/VldysV9kl34xBITgb6/8nBcmCbWnC0KVI +8i8ToULYHl7/3HbMS7kHLEr9z1D2FiM0RidMzhfZCWHRtb5YskH1UCyoG9t2N/NEggeKmP81W8rS ++ODxuoHHOXx/JqACG+/oCWmwwg12yGWB9AZhQWZcTrxUfiGuoyI6YuezzKg/b0E2amFu/jcYbax4 +FeHH5HGkMvcmd14sKR8BAJKFwlenQkv045nxBuN4M4kBRlOANvQHNeXB2tpLXokX7PUhXbbEvJEW +oSD3/ek52QXrzkF9ZdHGF6U+hAKDo1WZ59MHFOijOanIO/hGplM5Mda9XvmrW0ym5D3wl33x+644 +tM9U4RcS8P/Knw68cafOpHgwJzyf4nBYVaAyVDbhVrKOL2jwytZS26ab50+b1GG56bkmITPjxHGQ +4iStBmJISw3OLgHsT1otJRiutN+aqo0HxdNyV+mTN6iQMPhhQBqx2KmEyVng1zuSPGJSE7DBfu0/ +NFIAL8v0/ccJf06BK74zKsJof/sZojgicJH58LXg4e6Au4cDMvRKlhp1PA+rWj2Mr3IyhRSJBo4Q +D/S1h18CQMcjH4v8YGXK7/qprnz3neR+69CKdUb7e+Awz/ne9yrQ0W65IB2Zg2izT8qCoP+NjHZJ +wjWjURpKN23f1zookysfnKlNpQQuYc0CYjcBTBzLLeRpoLDWr0yYDkyFOvkt5Jx8kb2tTb+NbjIF +urnojdoEru7qlA7iqt3BF3l3aMXzy9YdOw65icQEf5TjLf+1QCqIy+xiX+o37j3UxNLyMpYBq8AW +53c4LtyYoYSYM+JGl7kA5E4kGh5lvnXFJD1yQto2lolp4Y2SpTUzGwplGqG5HmVKUS9CVA6IpBaw +YZpPkH7BTAQOvWwv7oWDtDu5KLEjdSlVnP9hbZiI4O/lltrUXKJEn2RT8AYTQCwn8rDI+0J+ilve +ALbnIuNKMQSZ/dVzntAD8Xs1T683gr2MFAWi6KBzgkfVFqxqgZZXdKtyf7EgDsgJmizIy9ef9xUm +pNQIJktusOvOVqLdXv6mxZoHj8rvac6nSChVT0AEN/JhrTLAnBrvyToR4jzJiIG9h1hphdGpaoh6 +4R79sIKOrvvRlBQguxRsIhgm32vR8CXx1AXsttLLSzCzYIX9j03NZWWBk35jhtEyTk6pkaKYu+JZ +G1w/uJRiCGXvvtOrfld58ioOG5a0cq+4g5PBhfAIwVim7Q9iYGHokEVbeJnspNs3Qz97Zr3wFxuL +4Jk9lGhtrsU0IdJ33WJwX5WdF22CmkHteOLWh/CXMB/dtmBplmv3WUd2ILE7n94OLvOzJuPnrJG2 +V5YAW0wBBdoc7bq/S99fjnxOd7h8nbR3wQiXJ1BKEFUn1oHFZK7a/uayKbZ4j6dHQoiBwOcRzpn7 +NeSPr1qkaxbi3e/tUSWlcWXNwVY+qmnK2qCkOdl+x5Jg8/VSSx0Xmo7WzwFAdKjYgqNL/LHu5yLO +FACgc6P0Elawjemf7mFc+su/yY0e6Vx8aPtXvBOoS1OXjP8eiIu+9QjWbJjjvj7FTU9YyyhKt9a2 +1Sd8vDMyg6ijIGHtO0lP1qXP6zgRKC12dDDCtmvEf3rkVUx6JaddCoD1MbgoV0TLGO1dbWPhmujF +4KoaShtTqE24xhjs36G30Pm0Z1Fag6N7ihlpueT6H9OS3X9PBYPXTapt7zAQObs3Pa37wsuXvpUQ +4M6F15+GmxkHJZLoQEJPTtHKefXT1nLvAYJ64uWVvCFQaZp/2i/5ApTHnPa3qx/8ERZIUPu16HZv +qk6F2Is2r4ddMw2cEgroc+ZkF+ArbhJLjvExkZrPG0rEutwwnfeWlTYJPlG8QpmSgtnFi0i59HxD ++Yp5k4tRSvOB8G/hhryq3+5kVUNEm813gJslEEj77D1k5r9v+d6MyS5A0AifWGGjp7+6mR366jVq +vnj4ujDk7IfcvOU4pO8MxbsR2cPrcgFf32AvjF5jEE+9ECKUR1YdH1Pndlz1dUr3YySzwQ1rYe9e +tPckzbPqZg5ARWHNNi6CqjUiKFUujRPrVsV94TRutIm+9OyRuS6XAN1n/ExFtA3Iv2LIVR/wczdf +NM/2C+57jVrP5QPCI+HylbE6S6jNw3Aos6IKwvwoA+ddg6QVAZbaaW3S+e19OKNDyYuOy2R2V6VP +CbLazfk5oefqMzlBKSXvSB7XNcqOeYnBLjVPYmv6Ul1HpkOMkiyO4jxuX1bDPpWLdEzaUbSM66ip +76r3IHuRQNybs0rPvHy8zdg2kK2hTy5C7UZ1WL+J7ch8FMcPT2XP2ELO5E74q5bJin+QvHXM6UMy +ihcSlffBVLW342a8acSyQNa8wHYHTtj92LKcowttqPJ+O/+3zFncbtEoLDqMzRnTSeWdXudirTYC +lIKyp8BNcrpD7w0wcZvuUCPG0lgEVm+o35Pfw7LMd4SG8e15jhW2Ml11PT/vz96d3sy/xujEKQAk +mCHK+F8cssy75MYwvPSGbQ9J242kaRZSyYTlgpOytnJChda9MCRuI5cNt6scbV3zKvgTZiJ5gWaN +SOMUcWdLXbqQX83j6OgrqK8PW2U+smAYQFRwFKP7E3mX84prLPp7LrkcAwg9WWNbplHy2V29dOO2 +sXX0hYLkrLTfivxIUZ9dE2zFVCUTaS4mYPz2lSXRw8Yq0PABqYSm4gtEzIVV1drH4z1OLwz6BpxC +gDKU88ryq+C/OmVwNaHxmYhTQqmFHDQgju9tJdeAcOVK61Iki3WddCfhSoZ4klUdkDsVFY8oN0/3 +LNv0SZdnyczbmvba3Io2ebXr6k2hRdvV57CMp4vOBMAjqY4I4OttC+HpdCJpdLJ+4F45JTFhcIaW +8y/wyiUYLg8kTbQQ7IW6aNnzs6mgEH7oca6QgGly16sMGlzVt5cvyd1KmgBWYxRX0GT739u9XuGm +k1Sly0Y51GQbxmR+YhDOVeyiscBxfDpQcNcKgRV/imwo5a6ncbFsfL78S4vSMlSMEswncnTlCxDq +eME+P1Jb/i8Dzr7dj6445R2WP91MGcmEyMUPs4TeYgh8XSgNFNcesMoyVms1dG63zaUDVUOHaiMy +eu5Xsm4ncEsPa1/8aMA4KCPS0O68NqGX6uGgXpay1S0v4L4AbAS5NiwJgej/9tbQkIbNL2B9l22X +QpzRu83i9Py9ypYHh6FuFPSIuGyLOoSg/Z8kswaZsdKhfMJwNhGlAR9N38g//vOptY3bKGByR58w +2/Bta0zcKhc/6sh1LaFOnk1aGdLRGmA2FThFGwbGldbk66hj2i/9C8aN0oIZGjHfPZJNtVGJfRWg +tiVVZvS1ZUvfZzUrInvGWk+KJbhHka9laRL/5BSeUoms0MuDlZy8o9uTzqbsiqJBwGYqx7gVMpYk +JKFPkD/Ejj4oLXJShMp/CkVLXdpn6tEzKMwgPJollPYIZOj4Fiw2HKKV/KXC65BP1cPPUe1K++iO +inkP+0QQifyzz55q/PMUCVlHT7OyfvYThYes/k1cb1zHB2cZH/yec84OmdG39wya5kvRHPKiDs6v +Cld9hc/u0xgWmg5/KGRq4/T1hj5TKcaBIdbWvOrsrEHA3hiDejLInW7e8675/7CpjBg2VAbjFT2B +0LJuytkdf8gDucoKgZ2/sfVGt4vQGIFo71Zv17aOClljs+olKMYv9flqfJHKGRyuuzWVLh9I1gm3 +5ZWG4DbBX6tVMSwC2yhuMlqdiTZYs8/OzhTw0fLN5uwF3y5+Fsg/GM7bFOGN/DWUERNreDmjP0yL +18ncXWmE8m9hi9724CjHz1xlXg0UU/9JJZdPs06sVMyHU//ZdD9xhGip+dmi1bxrN2gd2IHzYqaO +t3Lvjf0PYhL/JDs8X5As05KSqYw2sqddzYNQbeYU+wizhFhDxiLaaf3LQ76MQrgwDtXZicNXpPyh +3CyMucl916neRDhus7Dh6SnF/SHUEz4KNU5+ZCEM0HBcui3rFcnWfhjKl9yWblVDvbpcl7SXwfmq +1U9oo/5oCUSQzuI6QnYP29mPbGLA0hBPd44RpRqSohY3DlZxrBf0/qaqEXh9AuvJs/99bgtBUd0c +TDyGargtrEha0DjrgL0smfYSyLipw1lz78ScGTizb1lB2mJsU+y9etLE1GapypFoolgocEh+G9TW +WS82eM3EXbbdozCgFuscWaMbKkd2blaYSyvzT9PwjaZAvo6+J9EvuHorH37F5VSxTZt7dSwCwzNy +fyi+OeF6qwRBBEWZhuOkEpAQjVE52RaNRi08rr++UHBNL3qoxsnkWtlW3DvohRb8Yd4Q24tFHSFg +khfUPxjw50WqNibReED0ZcnQ6BJl5pbGOd6n1Cgh9ypKzrjLw4AEA77Cm03YwwmCJE9tM30lJP9U +OBLp61gLwYoimVDZMhLj5i6EPINPola/7KU3C4jMLRiLtRzcXWYoOsRE5OsWM8uOgFFGVdrCXQRG +i6LueeAi8rCcZ1KHtO0iUxvxyU0RAT6jShZaOcj0juGKSiLIkzLxwKejhn2hXyW5aCZzQ7Cj63uh +eGJeCKOW2WzXUxYa2EFdwFta3L8RLQOqP5JGQR1v0tDiKKMr7GVd4Jv+HxJMI0bZUCYbslvEQa7m +U6Aove7mWpSKT/M1R9U7BI5Vi0B4HfqysHC1WPaf5t0Si1NMs/TWz+btU2SGrtIzPJ4hmXprFFJ/ +5g1LZSJjkSJKYj/rfi2JYhWaltu2A0c6zjAeWx6oBFS8vBQ2ab/8+l4QbL5z8jcSaeppshNN43oB +gwHJlzHISLDEIdOOBsH9dwZONYJMDrHse+jIZYRe273tm5S90khAir0ASpSK6IfC52Kd4+hMItnl +NZ+HJt6YQsQiryYyxDdqdpBn00FnQMnXPgJknczpdWid6kmK2ERZyh8NrujkReDqoyAiUWwCSTwB +e/UVOzczlQwV35cr6cTXppHnswptmj0J7T3MWNx7WU9BLhU26rkJogVPDGHG4CGShygI+s9h03mQ +zX8LqN9jcA6EkeXrTz51aCDa5qCaXcKdzByENP4xv1KbPSzPObzOgxz7fuc1K3qW/0Z42KXtuy92 +EsqN06ZUXNWulolFxBA+yidf04ag3Pqls8y7M8jiY5I+rRae/bX/JgNOQqUsqdy1YviZ5D8mjbif +Vl4yj10dhy5jJAK2p0oxti8+EBGZcuT0+akCOmEwcTIeZyOp1FLtARuC91kha1vwk0g84SZBGHyU +bWHekbQB7X9Z0/SKpva9L1P66ghoLA/hx0sgf8jwj8KMDu0GWjoZRQ4iSMPW2b0oV0puyxR7X0c7 +VRrNXr50GM7H+sQPkoDNByVtlEyyxdUoP9pEXxK9uV0QWkf6cif/TfkXxw3vLbam70Rre3IqKnYj +YjxEltNOtgurL1ktHeCwmC5H7baWDcpk65Kr+3ezDKx7XTJYCYQ8lcBGd4mTnlbWhQEVz5xZvrRf +odVqRSeOKtsxaI02cgYTarBCyQ84XW5W9kRFXORuP8TbA5cJMHSX47dIl0TiH85ANN20Rm2zp9G8 +t9U6fowLd68WsaDl1tpmAG78rfxLkL0t8ZR9EizRRB32DrwoIFg83uvzCr0p17tkM34HechutZ8M +XoMGfN65Fh7ucOTB5N9qssoIXqiAbiDQebHL4hTKPeRwHmpkfyX67GNVNJdkAJVGyHOsE0XT8ulV +trnInlJVSGAQLfW1MH9WXqtHfty6cKHVlDRh3B2E1cS1XNSBdzeRemmSr34uUW5xdA78ifZjRwu1 +98SEsFAgK4TxMt/Zj6QNdfwe71PB8sL07cOjS30RdSXhIcBypdExU7Ovhc4ITjSQsZyw5Kvzo4+M +CpXHle8omu7Bp1RP/BPJKVljoQWxGVxJPcGCjQGM6ok3kydpEULRxC+JoepnZoty6RVjWNttwo69 +5BZ/ZNI3CyowPw/gxgNtLJ2igitsfsHEz754+uYgCcBAtzDbKMGEgiCDh6OQ3AslN21lTN4CtRUx +QaCskPX+3aefiZ/pfWt1cYrb+sUi9RWFx/+5EQfKrYQJFRGuyQODly9tUYwCh4LWSWUs+GOcfxc4 +Hm7LC2AjQ8fB1H1WmyxnP9Wid3NFDZbLxBB0siib8Z2FlXyVvVfeFrHZZDovTATHFuNlIF/vb74g +BkcvNIU27xJETtJDvaS7KdS9f7caKofVEMxu9cQ7OjgwAWYbuR+zPNp/OUKI2AMoXTwnfNm8gsML +96/5H19FxDqmlAOcHfKYDKGoJSCqgrJO4LF6kJXKGAw/7nbQzPGAW/Zc6rjPiJgo1BPnQ87oixpv +w+gXLTSa4EcGqZri3H6a0/QZdQATBzVKFlclB3eH+4pVDjjMt0abkhIXu0LPTc3zZro28/IgShPf +rY1yDtr3g++QVO1bAD95zlfnP4g5y4IdbY2n/qAUo30Av49+3aMNHOlXWULE028EEnA+tjybBB7w +s1zVUiCBSlMZwS0pKfKCHLRvHlRT0/EZ0DWssufGVDXQvrQGZ/jVXKAR5RlC+ALqZ4vaGkitDa7U +rIwl2Ep4hwlAUgtZB0a/ceYN2jpXDq0+pfY2UQC7TZxaXa8hmRltAzHjX39PhAehg112a0u4q5wV +SGRjObH60HaKxu8gcoDz1rqk7jAu49mQbD3lkUD6U1E7OOaPx+gcrh/uhrKxY8LdOc+DSOGNTjbH +F31bn9aDzakAbzYZIXbQxTaicxCiKTNi/STuxwbHu/GSk09q3KHDAPwbn7NloMGfLwf45pMJByFJ +Z7rVdfzJHfEdfOP9Y1DQR8K2eOCmYAPCW/UIIho9qpQJdaHa4KYZQnCXcPhgfDixfdbQPEiIHx/u +yyE8Dy7Tcv9NOb7vPCQb9HgQ6wEtwJCTTzCaEgiF0gzOgl3ibHxcQ9un/eqj+CaltaGbPUXdUBQe +G72B3creK7T3SVH70cv5swlWSODXGXSj+aDKFvnIEOOzf+r9y2l7mb6/Qn/qdLyRDRJi9quQvfo+ +X0+739iI/bk+OspeSTOv8TGe48Hw2YQMfBkzP4BfLHedzHhxYr1EPaYyvYno0wOSD02A1/p+2XFO +PP5TuRHkxif2zYhRvzwj0dHsuqHUrn+1J+5IyaSavgKBbDTuetxzGqlbTUSnxkupBeGX/DNqxUHH +LU0FqwkLYi4cfByP2Kgj45MnWDw0xgfmywZ+w5JC7/884ew1w+gEi4QLCmmc/Z0Y+63H0MBDxc+y +KA6HrJ0tefF6jFcbUAB3vKIwTH7XQisA63QZSLXByDwhJTTKkDxxxs5PvKg8kuL4xZYAmNohVDx7 +xVvnSnzGsrfzbezQK9F8Ldh+4PeAOLYO6LgkvrAADLniWZ5NAlECV3JjrloD5yvZ9a8zLU9LJ2bu +rlPAU5wDDt63iYKx8xm8iiPUfu9Kj3aqA5wGyF9aGkuyh0MJVfTyD10jzwE3BVqBDAnsbDFVWQDY +BTS28sxEpaCjwnjLwHKhVklf5biL5tufUQPE5CFFp8NIuKQ9OhqiOlHNF8t3n02k7V4D3p1+tx9d +gRVxbdUzy5q+su3e5Aguc9b9ymNlEfCOD8fuErLS7MMh1TdYH732v/oil3ZIa37DslduhjYAYrEk +VXK2t6MmdnzCrau4uLCIWJ37I4xdHi38X6MBhibObAEKf+5AFJByp/Blzi0qolD0SRtO/Pv5uKhD +HjGu0pRnGgCSr6xO9WdQzsrCMOmKSoT3C7LyvVPtFijYVe4WIKT84kztDnjBOPwwYjPA4qlOG96s +dw3nRn8CHQgfsYDCQh2OylpWjRUs4lbTjtHSt4icQsI/dRDfns2WbngMdMV8xzZgpVepctAKLp5u +a39Tx9w2O4RVELa6nkE2XUGaD/lt5Q7hh2LSuDz4nXKn7GOVigKjZo7tT2GCJ61O3v8/eijL+pmy +PUuaEe4pnkLtXlRgar8pYR85zVGB6bJZlxbqYvxSTSwKjdy9FoC1e/XMH+0rW76cCiY2VRxPJMf8 +KBERqT/RhiUfAmXxqwX3NOREQUJK7pMz4nw4mYmaF061sdzXXgi9Lf9XUhB1nnxrCPYn4Itcbf/h +VzNjAzDVASRCMne9CVtC7UJBJ4LM8fRjmJwmIZtjFDDA4RQ3WuYwc8trYv66quVX5Jq1VhD8rcNI +XYh33n5my/S0QkOQY7jcvcPw4h4KDkprRyx/mTf/7q9vEAX9gIcNFYQlpjBducMZeUl0KZg3+zJF +nSbSVE1tJ+LsPh/83dbrmVwaHcnQ2YHWFmgA/ye9sexRBPvboRcI+j1I02fjr3OkHdlU3WCyeQ6q +pxkp/Gson0hvpIUhRq9Cltw7/j37KhNf8kMjBgG0wj1bItcUg8q+f/32HpJenCeynYg9cU3uhNLt +KsBBbbvbZd+37fRrwY98T4MM9yqJyE3uDTGFpRaBA002gYLcXmCOJJUYWStm5ZEB0A94BAisTGIu +VbTlAhQjNyfQoiZQGeAZ0Gv3IUOoAQuoKlT24tuIgETNvUCuzADCOPl70Yoa0KBDvHtkHjURf9Rt +Z+68KWnAxVvoioAht89BSmtpXsmxmwnRb9c3M1GyEbzugU17+ARb1Fhj+IWm9IPGuHVfr2IdjojA +ixGNjHRhuf4/4v0N/yT7jHwkH4aKdjzh9KBmKQ5Vf+lv50cg62jnOQ/L8c2Iru+FeDGTqAAUAv0m +M9VDKXxRlDpACdmvTW1CZBxdBrUwbcFa60zf6GK5bwhzDDPNnOYj2G1w9+jGD/Xgyw7EgCUH7YFh +XO1WRcrAMJ/f5OHHDiI9XdmvBQCqVt+uRetEU0LzLBR1oIebufF+3SfwE9Eq/hjmP5MxTh9OnwP7 +hr34TUO4ua/ms7W6hWo3txGBF7hePe9RT+3kCL4mQPrHTBNkq1MEz3vBYu8D1x8z7SAF5JNP6iL1 +PcARiK1rlOfq0ti3GbSloOVkZ/QobNMGxjGihnqxtlXorQh/R/SxldZHnkOV+YXK4bL0ok7i0txL +zYFsRvy5QKFt1Ukry7j7Lz2uBE/PZMDEiK2ThN2MWWCGVhS5UGYWzWcNhu6tLQWQvttcu8cICxib +wu5Y8F8gUsRC5dsCoxrDplo7dZM6gjlJ/cuWUneYRz1LJbottHiJLNR+OMkysZtZl0B412S22EY6 +pf2jpt9v81c9VqCZycV/2kTbqTtp/I7qLuIDO2d13ZOMwbbSWhPHyqJ9LqFAfZ6CRVNQsH1/Fqdy +2suoSVYgQ1iLwNSiX7ndUhWNE6SWxtSS/4Vbti/cEFuzgyYS/jOeHkhLFSYGjlG1THxz8beVhexO +NkXTnXrg6RoVlzmZZ9rF+oNiNceD51Dfz66Go57IgQdVMFmPQGSa65jadoyWVL2Z0K8jjDYRvwRv +QnCv5M7QtNED5G1G2t+N47S1Lv6MPrIrj79Fp50PYlbPljNupMMNS9FPFl4R6HyJigGZnvX0DE4K +Cjo29MkLZHTjCUY8gMFVZSwXI28HQ7Ju8yrST9UfPc/ymBLscX1ZGrCw8qz0+T4+DurgF4iibG+e +QQ5XEr2wi1e8s9oRFFd22qxwkBqplFy7tXqHPmZMX7x0vdcFtS9Fyh/DAWzx2ILCtQjcCaNsB9Z8 +BluVTQm5x48BYSVMmN22s01I9fRUYid7c9L4I5h3sl9DsghCE9lKOnPoVAsNaGcvcF05byX9nlj3 +kPxHBiWPL3co6X4lZmwv0S77Cf2BnOE9nEBxWyKRnvnIatxLlgVRXvQLuxg+Fl/w3nul5GpPRuuo +vhPdTgFV0e9Axz2JZTI5KgIJ2m2qVwH4IeDrmdkwbgFSAYO0hqxfRQkrfY3aBT8IOmgyIiXSy2ma +x1lvufFMpPnymfFrWqNVK/t77vW8p455oPEhhd5kbZFSwPhpLbheKHadJWjwkz7GPWwsPUNzT2Rl +GOF1ZT00DfweBAWkksp7jLAgsrRHsnbvcpRJXJbm75+LN2rQxU0gOq4bz4Xd9jPA4GokCnqfcKje +u+R5w6fcNkaaH37iifNlKeJ9UuCK3Y40wcyrPTqU4loSIFv0s/02/Nj28ypW3kA3MjtXug1arbqJ +ylo3XifVDTLFz+wCHsJaIFcU6vQpJOq9G0App4JtObtc/WOtGMdhN5OeaQwjxr/fdz75fXbqtCU8 +kwIHen4h4BPpIByORyAlZ/Lwu+Hzdvupp3qelx6aCCELsTi54FJeOUXltFFynh1pO2oGK/4tvsQX +cXoN/V9cnRmwnVOqJFODTeWsfcPXbLhTZPJ9ZzHqmN+uch1vcc76F+VkS5SGZXPYCWV/6hY6ZSXB +nJqlSqbB6a6dyCBIazrQlHLutEs89gV8Z3x2telmZvZDJFhlccuxLAXD9Q4ypH3oU3ZvfGLVuHa7 +HEI+067uyjEUwH0CJwMUZ+KuUri1vNa0f193S0XwZYP8z0RmBaChv58ZCONdUN1x/t/nDro2xzLb +5D+L/fSrjHKJ73NV9PR0vw6juOjk6drq8YT6KditbCP45kr7QNLg77ahrBs9CzOpGDRX/rvVDECP +9nAJf9LHIQQvQPLauXNJ+4r96JLx/zqqiOV/ViEeUbEkzFGt74qM1EQLlcntdPHbq2eyJkJyWDIE +mhrtVWxdHfMyryZD4w4IRV+RHkI0qwko7uRafaQsakPw4y5FnQvJg4koGQokwK0Kn91zRKZE8yus +zyzhLWZqIRStbGnPnTNQnVPYWiHzVPkvpXmAafz/eTo3UBaeB9a+Alp00wNyFDcbznC9QqMfvy7V +8pCv9xOqCiNiigjEK2wja5cyCxUwBKEs4bFdlxNlszGLH5c2rX68u6+nX7X4jdMJfTQt+MrDSImK +NT9fHZY9xTfY+mTadxEse9NSX8iCVHw/bjVDnxfTeeN6cNSMqJa3cSgonMTf97yDt6L0DubP61AV +CutOUzlQKHRz7uRJappqgtYB1K/IbRwxOjPxmJjZQwOTLHrSuJcZel8iP6aGqh+ea2h3g/ZNc+8Z +1lNxsZ5TvnXFTIOgpUilIcHNu8fGIUYzCpKQM43oknK5g2rNRSSOTGlfbYG0tKOHGY4dNOpwAosc +SOvjMFs5m8ACqjlt2rh1jBdCC5zczSLqKZUDzs0mtMH3Ug6sXTg9PHvqAgsSPBor0AvM1gOR3jxu +5opT860Szb7D1D+R4On0DKXI9JDfHATZdULWyCrbo1mpWyZXoRl+ShrFgT5I1GZrtLZzQJ90ihHm +xjMnsBoM2aoqe92UV8LNxR4isOw92gQv4OIPXtGLuPNPB2ODqpsCO5H+aH7UkOiJNiAALBYjUv3e +q/WZHjVZ3IBXr9pyee96FVvwaXZdz3Zgj4n0yWi0N/dcfDYOr2E9oS4eI+2l6+QyZleFfv3A9fRJ +YfQOSoWFPV3+Cx0fM6gwOEukbv1FNxRYGv2s3T8BhRducHSYJovCe3oaCKxG/BjhUHhFOp1kyPHQ +ZuyrwI7Sh+ffHW0YAh/ZMLbIOq7P0i5JTO6TZo97qpbxzWK51xe995BE5tUricgq44aJK99wslG/ +A+1HE8VC8eewDc57V9LdetmW1aHYNYNo3APDyEX9yI5iyHr6iP/lJ7fmYuIZXzt/3yZdx/DtVZDT +Zmd59JE16s4kolood8HV9beUB08d6ou8VOP1rTCd+lcEoX+dU65zlY4knZfR+lpeU1V453sISrB4 +3b+5YmGmKD5biwQEH1pAx/HKzmwZjvkcOKP8B5uawlDWoiJDlePKWo/7nn5+lEl1myjE3uLnDo2l +OHunY9ZeydzCOTjuv5Li7fwX+WhUm6z3utfJpDuVdmzPlpeN+qbmzJ2y2IuUUykcwdnz8Tx0zbqZ +EAMcFCEpKnFZdBJ7NR5q518+h0VFmPMKTeJNUSOraELVNNUrNlOSqtmXYbMOOJ95OMEvsHZOhy90 +5vWYCs54bd6tNCganwR8zu0M4GzlodFCaKyGvIbKq7SbngL3m7OIXceZgm2hq0BKYglP3M/1mL/5 +qmZSn1MR3XOZs1FPwSL+fwd+BfCCERBtz9I3v7BRymhFKsS5nAh91fBmnqKQRPH5/7tQu8FcXjgc +0tnDqSnLzhuBqwoxvIDzt6GkPLtRo2LUV12u8f14XwfG/14LKTMcVord146xHA33Hbc/vCjlJo2R +eJOQYggV7pEXw0dLyYSb7HnnWeemYw9jFShOxge+5Tza3mT8sm92riX00P2wTFbFhh0aYPCcY+Lx +U8GDHTvaUghmnUTrg4Iw0EpRWNpo7TkS1YeXf3mQm3WJBw4piwgJPe43M1sQFLImjo2uBFimHpD7 +bGi6rxCFImLoeNFRty9cNLR+MEUOaWXbgADX71wgoz/JzoCeG2Ww81kdUwTXrdWOZzj2YKb9Csvu +xy7RRo7Jb1vLY7nKNWjUjmjmd1W9F4f2fHBsbwNNCh8nKDKywtn7c8LLgigf3+5XbpZgaOzOu2Ex +D8PAwXG6ZWCOa8HFdj6+3olFk2Y5youXffvHJO4Q7/mOzxlqKz5gIWaQKHlGUbM6lKdLLOVobAiC +ffwh0GCrtnxT/gJFF2v+lUa2kZcxeg32xEMWzQKz3IDSTFxAedC40OV3E97CqSBC7oxvBx3/OWJZ +beyevWORp7YSHboijdZIZ6JolKzwR62NV3GRCXCflUoMlf1BKHFjrxNmBatzJVUvfMO8ZT9cFs9C +i8oDXiKb50yXKj94C6PQOMhsM/0kaE0y9g8gUhGIYcHbcal1jl5DGsZiKDu4rGbV/hBRrI/uBLf4 +oWt9XVXMClhtXzbGcY9N5fvz60ZwUODAFo3Z9rWkkohnd3H22T9BTQCuEpzJdPt25PAD8cGztOsc +weo9f3Z8m9NR+dsv0VbxQGBAx1XqjVd857tXxHi73ror2vcknuE1IQZUQ/ezvjIf1Yq0JAT+9f+/ +eu+gcqcuIn6whqc3URmwc/ksXuopU5MO/CyUw1WNzOclsu3J64/DEnZrupcaaHoT4kKeEifPtb33 +GdDBIAc1Zg+/GYh3XyPPbWfZiAwEO5rV8e7idfA5m3qa/OiNKCps1k+hpe8Otz2gAALFKMeXoEM4 +slJOEXmlJDsZsscVs91XNBV9sCc8qnWghbBJL0YcZJljXP5332221LkK8nzlaUwQW+5gKKGXlDfe +igdKBTAzCC9SDL/C0bIR4zVT8zQ1k755/LAqbAA29TJe/GhHvgClW4bAVUSl/YCIFeM7E79MZfLK +BFDf6Zq41pdcmNMqaIkjXIzL+VhcQsVJQjcUYjJr05Ng9E6eHCXJI2nHgLb7+fmhwKTvFOia7veo +fpKZl7I5s4sBT+cb9OZIq/cwjwBkEjwz7MDMoBFjwaPmrnjJEBTuoLtjsVqo4JujJ2Kgp6+awAiu +RynxiPYmqFFnSnwA4qL9TIizq/11ys03+ZpfHCEYZmJ7XA3gMAeTpqXQTT9o6WvkQSD5y9uZUIi4 +SH3yShbIUWgpx0ijcsp4lspKYgI9zS1LJGZLDCzz9xIkgg3C69HH/MxWumdk/zyy9kaOTx2G2dyd +S8to6I3dO7xwzX8KuCQVwiI5S0vbYPPH17JIvLa4MMh5fOxH3rq+TcpLrElkdvHM+YM1wpdInCsd +63i5QGD2yzR/3DjIEGepGf4xyUDACRpd5kWwuRwWGZ9WrvYe/+c2E7Vc0dV2n9jYl04qjVVEbaI6 +mv9UDctuO5rd6vZU7Za0HTf68EhuX9vUFNWbe3w2SXNAtxp5TBVl9/2lUQ542gmJYSBkuYpqmTCc +ybLvNL4fk+Lmma0saSluv+EfLcoSJ5Or4J2JVtIe12fe5m/jimes2Qs7fEzqjeG7bXFjIWLrZEXM +KQ0PRo1TNGepqx1qpn7U/o3iu84soVhVNHdUMAWMgnKO87d8uchZ/cAHioGAYSIbh3JZE3ifvvc0 +lgExrvwzPCTszRccu49temQhj598avyYM87NCR4koMW1idy83zO3sOXva5QY6dXPpUsT18bAk1ls +Vp94K34nFOXEOAOfXNFGu0DVfDjxWDNBgKkMWIzvBLTaBAEvK+dabFJ7oReaczWgEP/EJpo3n0XZ +JiPtxE6v+XV34Khlf22PBVFxRe+2/a8CR7//Hbd3WKJVIxZZZvssSZdsQpHShcIK2lsbZdcsOiWK +QqlJxnUX3JD92QvdajKXHPD9JFsjT3M8TKufiZQVgDtIm4PHr5iXoFE1I9mDqiH2iN8lsBAyFyC0 +Ndh8cjwZq3Hb6pXKa6ay+ugdpDR86AXJJC0nMQkvg80v1mdzrlx2r5EFzl6wlWZ5LghB3xqpsQ53 +T6Y2y0Hp+R8F5SJQ3VsX75NG9heMQ1go1U7+hiVT14Ofpo4VCD+Q6YIH4eREc9zONQEaM7vB3aqD +kAHrlJo7IHFl1EzGxgH02Uq00iAqyPTM9ktyw3MqN8zmlWw52VbOYRKrtZc1d6HUBhotINmkVn5j +YRyKk97EPH/wUBOHnDFrBsKVv608tUkcN3wy+jnyL3XCz/2xCYoikaXw9KPPZcVWmbSMIffx1UyT +8Xz0gjBZGZW/INC/2qiitwO7ZSaYy8L+DPnFL4ANofIVx79VlpHElVucixBMHf6cN+Qs0HsBAMTS +QWTDk53IdPIlqTfvzFTpSybdf82F/J4bp4rKa9vui99axZ8Bbdm00c5KimYnM2y7LT6cOQ+lSsWD +fCB42n0TXl0AUq9hR/vZqM609/OcbVzj16MwZ2JhwuUcN34XEZ+HT6OIJOJGXx6tHqgGbv2MnBpK +m9OU9w4OAnVCpnvUQuAHedMGkXDtvIFWZ8ZYEEOWvHnD9EhmAQzkW/YYtCzSqiyQsQPreqveF4lF +eQ4wRL9FZAZ+qlxfzFcVTE+ZVWiqLZp2p2+OQ6euObwcpgHhgvVvIknZZssGLzt7p+hB7lPx/GK8 +a0L+Qdak4WuzEW61Dht4XywmpT2fGbuPg/QA/lK8HxK0yI1IYyTD9/akqGED49yS42Q/YYiXeOCp +59y+0FzEhRluoEP1abniMOS+qDe5PYZsQYHKvaeGwcDesus79rKh8DSr0FYLMcSfnpBZeAEySzav +kJzvslobUk2jzJiKq3Qp2zD5yusW5gdURU/xOn+lU/7xnS+x0XBy2vDWfQSjuQqKLHd3zMql0Rey +BvXS/mIphCc/jhC+cYidH52MVzW3sOXnJSFw+UeRGXq03thFCsXThXmCnKfa+pIwd1vjLFIuMYy2 +7l6lU3TlLgB+Fe5mcvRXbmNZ65gGLrvoJhUCCOo8TXWGDvWqQcp+0SPWZz3x/1Zn8kw4TQn7kj0F +x0bjDDtoYmd5rAp6jhT2EZVx5zyJqZTdCDzAbdLvXrCtw9QS14ZPRarJYCooVsqhK0ZrwqbdRyv0 +SZy2aqWX+c6ioTKtbnLTLTDKjNBHM10ITaF2XBWJlWrFCQmmDboP/q8Tvtbxxnp6eynJ0H8c8Y09 +eHwvIfAYCS50eKSrCRsTEMhdyRfBflkj4vG8zllVPHnDY9nVT9b51Bc494VMdFrVguxEq5GpluJb +GUcWw0TWcdzOaAaHrMcYaMK/783lYxOS5/13AAFHA+/Qbyayma6w5wX+xcXkS28TBX5R7yea9bM/ +36ZCUcTBb+mgSrDwoKMgZxJdUCI/mikZs25qwjIyFizZwH+tWSi+jrPeyV0zAhgqESf/PWzCtYJe +84QugZP3FRoQeBXWK+fMdcG54AKl5ZkpNjXCD4p8BDIttsiq7Oa13l9ukVstTD2W1UzRn7xMcI+7 +epUi3TlD0jGnn3PcKs3/FhrzW45x3ycsnkbExiSxrNXz9YjeL0kn3r/Semd1BkOQ/47RjPbMUB/A +tPREodhR33wk4AwLLKNcXMBLEykjJVMJfKEF9rm3gpvBdYLXP5lPz6guKiF3NaKl4cE7tpfIdJ+f +LrbtgCMDV0tLw5xfoO0Qope0JjD1uR1i1c5/28iVn2qb9Mpj+ZxU382igSZVZ1tqYNT1faJPuQjO +QE3YmYnRPeGWCSWiGsEtnPvwycMFnxz6HkdSbM4Wqa7CJWeIlLnk6jEQEG9zhvohd2dR5fwKEczh +CJksXma5R6B4raCzUVrcBs6o2V1uNt0qqtcfwHn4MLyYH9zGFgTP6ZhoaokexN/jpBjQAnWgFXip +56naHGndGpCOUWWFKvH0fso3Iuy7X21CWqDhIZLGKsYU+QVyZQKjWxKI1UY2E/LLg2frzQwII9MR +8yaomXnstYcOf+faHREIhivqvflgJ3y8UoKb6ijmO97AK38tW5hfpJR7UTW+ZZbGM437YPQEe0Hw +MVVdC2yAmAS5UUv7nSx/wt1yhWN3sP2yrCEGTrqSEFbht+Wr/gDJcKXdylcCniSE+i0hNuB3hnSa +OZgSUfGFR/U+vJ9038SpaLZOM24BBWyMKGh6xVnzP1m+2S9Ot2cJSget4uIMqtmJcZOFEr+p3b4j +rf93joFBTIjcPnw4mJKHdWPdw/CEDtRchVGz6hdmWZQJX/Yy83YoqPoJ+4b3uWuGRoKA4OFYF4sW +Yhwx5vFODM7+p0+KVEa5qOgiFif4pb5pKQqPfxq+okoNVpvTIeBC9kPL2/PvRvsHK1NMmNwRgR4/ +YlG+1mKR7CX9Xjr8DsYV5EPWmV/d8I3yJtGVEDgQ0JwB20lVWNGPdgD8UKaGtY6LJiegVBLm1yfx +AUUOT3MF25jguXdwcjmUXugDYwCPCKTVhRfI1/3L2UrvnBsMnUVdn6xZQij50gGdR+BEI3ZxPwi8 +g7kUfl/Sagq2QvjUjC92IPiSgtjm6NZj3AEB4wBFJ8Tz/jdaajPrNhqIewUbcGcKEKHgKM22MzD+ +rXM2a+OPlAIYDfpyamttaCo2zldquwtYNXnsSwlqdR0Cn1HxIsTuohqy3zNFxRX3gLW9mTXTxyNL +waUm2KwwzDyIhs2YhoP73LLFgsFxIILVJYF72UulLOy+LPHRYLoAxDvQeFjxjierfjK+ImG3TEE5 +E5EE46nlwa/lPORNHyxkix7NrhqHg2w9mGZFP+GHZh7DniMOngy82iUCgygQSP4xh8ROEILsE38r +yU72onSaeEmRXvBLRgZsJLYlYAKuNb/o2d7ZWrAiVFtuwMfnC3ATDz99KUbNPMG9amjpYBKnDviO +MjLdCg+4wWA2+lifVvjfBTOQSyOwlvaX/6wGB+2OOzNA6+nIDgaBvCNnI9tEDlQ72D9oLsZBezSE +173azDF9glDiklomwcnT9kJG8Lw7aUnkxXg3YRfj79v/7vWX/hyt0Fxcn25iLVZZGIMMxi9C0500 +eUjqPaKH3CJpKxSwxzNC5U8DZXLGbHmycWsrV/BtGdylWqDgU/BZIm9jlapDTN1gnyNQqUli4/YI +SOOTdsb9GnTGKWdDlbQHoOO1AyMxykiFEecPXSRjK02elQpTwqK6nKE7f8FvXwNMVGWv030GCxLg +iS2Txn91tZpzXwl9ealSuiEMFhTCuKdL66cNo5Ql9doXJUiiDaFQxtuI7/3wOBQ8kcNgAmjWNxVY +HWLlFAsJN3Vp6K/Z1RiJnDLHqlPDtgBCP6ypiWfoInonL28iVANymqK/MQMtdABMg52WzBtW0weg +m4cqFOgSpQchze6Xhmb9scIh2Y7tIWS2NbzUWCl/urDUSANVW4bT9K7nSvTSg5U6RKPsAYUon5N3 +nDwUFU62mHYTy2TDdXxEE+GnDR5RGNCYT+B4ByCG98X444T8hi9uLO2DTVA49k1a+jDZK2gnsg6H +38YeUOID7GE2hXIzHSurTxmBtW/ck3RWMB7eWm3MftHhiUxbQxaa+CNgbtei1PjT56XahRkOI8ZJ +55xR73JFMDBX7qPxT/jdNJQLCBnylfuAU094ZJwxaRtGneAYvZN4qPkS4ctH4VOptU8aEUwMKjnx +Ye2IZcprAb2dhAYNc/6GBZfzlSAm+QkcE72huIyoSNlBBgWrSn8UbvxvUzgoSHJdiQTMF1M5adHY +XHVOw6U2HVXk3jMouxkB/aq6jEFzqDRmbLfSaYR7xviqXnhRdGNyeeX5wJ7xjMdqm9BOzxeEoPqT +V9ZO4zWsKYGVMeiNTHwNFUcdjTQbYolBervii/G4BIKgBMZBnREXB3eFqD74e/WoEosrBGOWbj+2 +CUqbcUT0xDBtVsg21MQANzudo4B/dAZ4jZZSHeZvYtboN9w0kLiCarZzyhkHe56WJT/opUe1PEea +Fn6lJZnkzck/X7l+JQ6a6ccJiKMRdvLRzpEm9TcubQ8AwjkE9muBZb+YSJTkr0ZMtN4SeL0ZLVym +M+uG4SFI5Z5kEibDpJDIFKpzHYqJAexzHSRKQUJ9xh41DfdwonlCt/IMHhWMa2G/SoYhklqW6/XI +dygX147oYh31GLgORoVWJv7XpGWs8vCQq+CMspQUYt10KK8XiSEH2JcC+jfA+YuO5PWOnFs+1BSy +Sx4bZlR584DBo3ugjTeKj++kvGfPk4zuHSrjTiBRXlJ7MrNzmt+Tj2N7tQwnqcoUScVZqxb595QH +ZXPD2Fzwcza/kzPE7qQoBcRjh6pUBof899kFCVBuzrQ2a8efZWO2IAb8QmEA3hp6ZLinIewNW70w +pvswCQ1EO2adfvTUU47zl6uVosRY2E/3C6oKimVvBvyzEuu73LdPMbTVohMKHPg4ZFSAV2uAdTET +DBUEkcJMA48KTj8Os4CtNfB1Ho6qKmejMhmLakRwf/vSO++fy3WNnVpPW3YvvX7RpCQEGG3ugTXs +8UalJvLmB/9l0JXKtJZZnK9Pay6ffpTn3W2zTTamwbfrTUbFkR3KnOgox5MDW//DFBy/f95fMlBM +Z9E4uZWC+6sxWenPcxSIVgMQQ1xgkUuF1RpjnXqKXGTsDH1hqbcX1+IfDC+Go6yprIGS/WEXxdbj +ows1JUHI5Fcp7KhhKnf0Av/gkMjK0I2Qt3T690oM/74c84QaRlCY5Zo94UMi8L7+btiJWv9yGbYS +DXCuP5O0oJDgDaUGYoXmycY9yzCzF29Giv1k3UkRFicF0uJQ1GSY56fJD+AbiV3rTT46mEf7vMeC +ASqppOtTYkb3uvAkdfsLHtynasWAqiTX1N27f0D+p6djmGymHVO96mjEb+yul2exSrJWQr7vz+hO +dTUjYE0rIW2L2JaFfhR6YMOpGutc1BPLixq/xCnBmdd5T8lFtKCOTQ1u5gb9ze0E5ARzH4Fe2OvS +mgOrCXF2pNHEwjjaH9CyJwe+Yr9oVNqmeJBJ4aoIluetFlLPlbBRSLn3LLo25Tjw8Z1CJBF+ul0P +wnnxjWwDyjqVu6KWpysb5PnBIrzhW+Js39bFxkKZc6Ot4QbXlv1f4f6xl73x0GHqF2b6+Vu63+nw +zaJfxnwkE27Jp61JDBhTAJxy+UUNeXxN21vRSeoMDJsjxaFqVrIR5c1qh5JWZm9a9dd3gpHCabsc +jg4SUeiEhKhKCLMvlLln6cXrF+6w+0oIPOAN7+Qm92CKFFDittcBfdJhPfiJbQMNTlSquXoZRU5b +KV/+8EMjt6XROwaxX8LsIoPM53+NGFzaC3I6vUQQ8lPKr3MdPS/YH6ZuXrpj+2kSy9ZYaMkHkNT/ +ZxxGDerJTxUtm39mF5CAdlSY7SsX5InARQmbrBkhG2P8Vu2alBAuk9wb66GWRLNPTWriSZl3rWeJ +1GsFIUGTm8dWNpyhprDhFk7nltyhVHyu8DuI8PvniDNSAK12bG4CDKMlgcsDs/hxYjNuKEbNwJdn +Q0R2/pGngG4ArtvRkJ40bJ4JMkew1LXhqgzlljfiap/VMKD+cud5JweqLZQvl4fbE47sy9s6ifJo +BJLJ02lxrYLNNHojcNZq2zR+f7I+KCrJNwrXimsPzytHNtY2oTZ3xMV3rUm+/UdKxfzdYId4xT9h +Y+RuYXuIjNR/yZEslr7NCw7+T5qwOYqSlUfMxBtlfVcA9DxYuu8ZPB2Y/M9H8KjiYj/uly5xeuhx +OE9CCpYtkZV1mVcEi/nruGBBk4CxX8ysEs2mQNvirl8INjgCa9CQyWdABFvudd73YyGJ7yfvfOWh +ov+e6XjYuHr5Xy2jusYlFyTEeAgasuhX/kgX8sXcbO5i8s3TaBrJxrBtcYB49MMg3KaSRmDqGq1U +SjKs8V+Pv06Ce+g1xK2WVgSNsAbssWDthvTzVatwKKLShWoPdtTOE4F2OyG2HScZ7IFgAWwG9H4x +fWvRtBOaone0MMZ29bGVg9GT8vFQYb2FQNuMdT9DEL4RES+nl6CtjUA/cQUtAfMbCniHXYKx1rfL +kJGK8NaFolP7I4g0hYo2gewgtm5FuWg8rrSy+sY9y4CMSjM7pVAyWUbXO4FNYEv9wXrpbbd50uH9 +oT8Q8aoOr/HI06sHyKS78oQotrYAEwPFw2pq+gQfBoLXdk916Fr0J7uPRLTvyKLYuoPNoSw+sN9y +YLSou37cGGjK8W6TCjm8WV8KOBUiYKPxTzBBRRKfPWHbV86Z1CKX+M/gowOyQRU/ZXFF+lk2hFHY +G7btLLgqCM4tbXTwToZvckD47xaUMQOTIlH6ACbhF2/VuqGBEsB3v72W/SftaApMfjoOZ6aUin2B +bF0bWhNrN7F7AMzsXHqyQIMTIwGr9TY/CdTfo1fKAkVNb42NmeGAGdKpzhoD3xBrTLT3Rc/n64qq +UKnYFoJr6VCYllDpx8v2TY8I5Yi48fZiwyvQsPh3ngiKzmq54dHiTVGjGZ74tZwdlO7TMjAf22G7 +ByT0XEZ0B3YCR7QETcUaAcO56GjzKr9NTZKXzOOj6WsCg6gtpEjnqKNg7EWgKe5uq4sgiAtq06aw +lEYNPYgDSNAXAp6Esy8EbRZBqKgT55Ncpxrn2Q0oat7Hn9Qqnn/7YsM2GNQkuO3P7b2aIDWDlwNs +VF46MdDXr8v2bIcyd8F08Xcarn2eU1Y7u1+roEmamvjVhZ9pZ3WCxzu1atyfxJfXmyAey5+LmIBF +bWnFrAMe3IB4MaiNK70DB9m5d7EFQLj6wK9B8/J0QlrtCVCoEpiya0d2h+DWOdDZl7JTdIjzO8/T +78RwWxSN0tBVaRPhJZBp04/Li9eEXy+FCCD7ehABvY8SCnf3erOJpTxI7zotjjQFiVl6c36yPt+U +VUE622vG2gpBkiv15OuWdwUtInG9/Ct3TLQZTcCtupGfVMEhw8cTN2VjTfZOJ8GOMYJPKGHH0fyK +iQ/sK+sca1dN5OXU89YwErjWsml4LMvS9yvxrTSMg0q8Re8ouo1ZigI4m43qX/g2jzhMz4VnArwQ +XsAobt6d9MjenD9e1AhCpHLRlcmlEAtdY1ZBF8nQXBmx3WZ7SyypvceMaHcd6kSyHUXr+DsK3/10 +YyBo9LOYM50fC//C6DkSEDuLzMRTrvQSHpaZ0bp6dIR8MIzj6gbWLK/hNOwJIyQRkOKfBM6tpW4z +h7AVSdxozwKNT1baBlIfsKBvN+aHBp8JHWN54OCHEknvIK2XWjQrlXyFXbuxakMXa+HvomsDzVz4 +jUioWZsQ2VSm31U5xa3JYwcp1DEyeyJBjk138eFizScU61lEHTWCO+uMu0LIpUA9lJvu6com2Ia6 +kuN9DHEYBwKE9Dfbf/dbBjWVSoNjrmizkPqOziYG9YCNJdw+QaRw0ftuZHKXell4SdYMcJDmrTVX +D1s+JNfhIg496BAFlQc0Ch3gYtSF4D9BY3BkgUDDm25RUJnQhZCm4QVXretOpHY4/womVREzQulh +tpgJIIib6T9XC+VJU27hCw9gUqOFFsDSBIglbWKMj+zcMP0DYyy3cmvJ4Eu7XajWPqnozF+8uefW +fjD6gbu6XpcguQ3l3RpYDh/673NkigWpkKN/sZGP58a5fTfTOX3lJcAuV36uygupSX81+jEbiKTl +ADKLWziz3MuA1ejddHybCT+nKAABa9k35+uITGWerkpQeBrtdps6TK5jPoYLChngn6d0pLIx/Lb4 +MeLySzv4b2pdaCTPZ39tFyQjofd7SABdZo8rtreQ52nEwoAuNd0drRB/qM5EU3DMrXbWTSzobtLy +s2uzMm17YA9sLh/vwhr40zg6Iu4XU8gMUAms5EnQTFn+OR8/dpIs9dlXpG46qQKqG+5bR5ipT9aF +MmUG4bfAwm1dRjA3ANTA+UUbBiSP/5Y/11jPae/gM+aiUBoUM5T3M38JB9JhbenWhHQcJuuL+kGA +xZ7DQgrArsCIDB5FIPjwsk5n9ywEhE/OF5W2CQ9eAj+daXPf/v5d/xivwFIADWnqBmFNP/zH3Sx2 +VdbzkiZYEZ7ZdOlw5fi8Phpul/pGtwB6CW6N6u1jbNysu2uAljsn1GthA0I9Z6JZi/ej0NAXTBSE +a4I+ZhUrxohYuOvrMtwJifCkb0+L33oGoa1/PxaMI6xiguWgenN8Pk41JZa2YdJhX5CSwqE3uS3v +Kq+cYGY4BKHLBmL9nz/Cu0gKEH4dGa+LCVKfv2NFfSMk2gDBSgnsi4WrrLNP1s5ZjHXQFUQsV1Hu +bbqVvwXOvImR+yTxNzSKwtGHtD3bIcE3v+p5xQRef6pxCAA7rP4k+nbZvtCAcoFoURbfn5515ZJ5 +qd4VzC2LlxKMLl2NE+h6lI65XGAfOie0ld8ANlyi12kpfRa07ahD4JGxsNSWaFSdnAO/DoD5ay/N +dTzJr+egZ+3NY8do4IVylTTkcWE8IVXySQg1+IK31aMv7j1eoEp0nxJpkhBBF8Ir1YHtGQlmjssw +wg4RjzWmkRwsXZ1HPq0XDaVAOYcZTXDGBEBpyf8F2+2pbndAk8nBgmyed/5N8it4mx7W4xShY0Gv +j6WkcKoQxuZUmV84PwArm1L0T0b+JnC8NOqPjNp/LmheWv/klHS0qu7J17V2CciNPfaoolIeM3q4 +GNT48Nld6uGa8NF5QT0Fy5/RFKvukt3ybAW61Hgr5YjxwiH2raiPpxRVE6Iz5Ifx0lnm6nArQxZS +FUiiEcB19tXraH92ckiKQ88wSc+5L2XnuuefQjHZ4M5c1Dwm4jFlc/xW3ysyMAdjxD7+XE/qFp7v +4TsxLMtOwO0rsIXRh79o/cwbc8hjp/oqKt2M6yLtjEj0QYiWXCbfcPT6MEM3p0cAL0C6XAQWNtCs +mXrr2FdBq8+0QrXCGvOofQSxgis5iOBKIgtEiTzHMGEknBKdeoNssDSq3qaAfJlqrh8rcOGTdfuK +6EqFKMK9Njr16s+Z5RXrpiSY8yxRTjfkuOyDpfMdUCZ3n6CUl3/OKqm0q21kQF/vqjUF0+nAZbqe +2fTgDm20pMv6VnnuVgxyo2YovjOs8cZ4SBANOlWLgLoKGqCdGatpG+Xc4BCH/QbIuKfk6asBfkwO +aQb/E9vK+z7/Qfrj6ANSNxocQK3r5fwYJL5i4QxwXikGChLgf8yYZ5po3o8o8StczVLew9/4tPIX +Ts6ZaXT6rde9UFErBltVZWrANIYjOso6zyFb6J8XCXo1XSTXz7MLpbS66awan40ap7SdYwyDQhM9 +Jql8A2t+thRE2rE5kgSJ1FC7OJDbHc07sFGj7+R3b0dlh8UYxsxC4Ucm6fVntu3RJN7XR6nleYX3 +koRK5BS0Pv7RbiF2o1VWhUePVmpY8kxSe0O0EDPy+Wue13wdmAihrm5xw+8hi0+thpc1JjvukAs4 +uDWdXxUdj3Lq9VYWHfGDs1M3y4GxJjVmHC+6LChwsMax116/82+je7G06PevJd3TvPdVhiw6XWCJ +FHFXd4rET8Ur23HypmeVtOcBiVZiat0C40cZh4kFOzUR1ErEfNvfTnwrXny7Wh3k+cVjOYm5+VAI ++uhEC6LEo/Ci5x7L2XRpO0hPttNykcJl8mm/lnWbsFCJ1P5FnjbhS7EJOM/DUovUckMeEtMFO2h1 +IatWpoPOY9ERzGL+6oUAisK+8oFxhwb06tIdapRF93u5ZWBfxqGsE6CDvIVUEL5t13yQURPs9eSo +w0io0rcUV7IfgBcNLKO/C41qUTfwppA+M5XVAmug68oS9AMFrWE7oVB7jCqLjkGwX98NSRonROy5 +nnwLzaYtNyUA2Cv3frykWEf7Ly/CeW9Skm4OU/pMNovI2xq/UOWJIgDrbyrpVjBfy0xMDNc2yT/3 +9/qTnT9JKR9i7cLSM3Yc2zG2Nk2Mo4nvcJzTwcxROllKkRGUKNKQtF1JjIaGFfmhVgtJpgsYjjnx +NxmrJBw/80LCN4UEjT4sqaRzVimAGS8mTCltzUD+gJ+fzfIWCNBvhyPUBuEMtPXQOWfeCpiIcqGc +5x+FGKRhOkmUzjz3EkMFyG5GSBzBjuyMpPwcP7i7klrJkzxmpIzBRRrdc11f5JoBsZ/woVeWblRx +RqgMGwpcO+rttUNQeRI7J3n6TLSXss6Lad9fk/1B67NNEE3fsXPP8Mhmvn2DeIPq7Hw707+rDKA9 +XVBXKWt0kcBHd6akkUWLL7HI7Mek1tqQC51U5knh23k7Ew9kKV0LscfLlgnzvP1qIyXdHftZCeei +sNxqOYlPfawT9RxSe2L8KKdykjTEUzbn1RQV85f6KyB1nwdLdNebm41ycXk7PN0pp7t74KLYHaFa +DsYM/w4zKV77ngvKZQPAfsQNz0or7ieIW0QcWZ7jlILQl386JsCfOXxVQWTuO0qOxbA6/PlxDa/f +NaBdwQlqQEPC2g7lR2nySPU8ljLc/LZseoY9iqkDIeqDWl7VkxKZtAwGisGHr4Z8daBITDnlsiry +VgZZ28HcwBaLokts4kOy8LLlGo31KExY+pN5ovy5OAkVeHpC0YkjBlUDL//FFEfL7oHpM7dLR3ru +OLWgkvX3bO1Mgb2TpeCQXycV3+TayGNhMyEkg5spR0V4x3dAS9M4ZPvUVrdxTeLGPUxFBiRB1Df+ +jgWIPucI0aoPFQbNVQvUnmlae9kYHc4j2LA4O7Dvz1po1Z/NFcNVQl0KZiVoYNJ5Yz+n1pNBX8dH +rDwrJh45e54Tj1H45xuv803v3Lc3aKAM60uuOW3weN7+zgJ4wEkiMp1MtpI/siFLnNyhI+OI9eCF +N3estVOQnUA1HwfOeORvrmceMO9ZEtllcYCVGpa7oKauiI6smVAFjs1EbJO0ilGxa2seSVkAgkMf +9K07wmusqr2oo6iwhO/PhAWOGTcHAoCs9SAmbB7XPy5tTjMVL+Iirmh76mh73SBNBasuiqq13MeG +I1WY5kgxR2+sBTVLdWFMOuOfVtXeWaEd5PEb0guUuemfHYHs5ByyBdoSQq3Y6NG9ud0OdulDQF4S +JJj9dm6xNjgj97D5dZWS91GGf4qxInlpu0EwjuvzKj1kXOE5s8XmMZOsjhE49ENg0Zko07tnb7Q0 +T7xPND4WCJ9HJeUHWxqcXQeRj7PuqOW+8J4uZoICg1MmlILGCiIsv23NUDa4G00MbWPQ/fEYzPix +41kBY6EkQG8RmMEEDetz/4Z8M3+EG1vXMWb3c0cwKzO7szigL2EiYurKV8fDaNg+lmahm0eAC9Li ++4XMxWDTGS5zO66nD6alU5h/O0JLioICm+AkSI65RmhvehRrc3epYUvb0M2tWx9uMUXiS5t4FHKE +y+3kixEHSn6CslCbS6vTJd3CgAa6K1Hck5WfBVft5bF5GY2F9N9BC2YDIIBq7EBCMwDEXdy3+Hmi +KJtHjrGqC+YoMDMQx7leea1wZ0yoY2qTjP2OEjzupiKe0BIUmsliFjtdvZakucwJPYNkblQIy0bb +meLIEs2R0kKseqDLqFT7SqB+y5EPN5xU3yjeGPmCPmVXpHj2t6sZjqykgCF1mTlnIbrpANUAIklG +3MgV7ucW7b6LJm+MpyJCbD1bpsmPUlOEP6NvljUUPiVaAYsT4tJdQkGL1s065S3slDC5vsyjkDQK +wuuaexDW06uhIsuoKDVSrhVhsjcII0HmGcHEYgULBd5OabxcsZ1fXwyhA2ki7ey8239OKE4rpSzd +/YgVG8Pv927DfSiWjdzWxRsbc+lDAwq57swarj7q+NzRxOhd6QlJW+HrzcbYlK5PJnAkmlLhFWBv +LQLUKNa7+FrGNRU3JodeONxnfuCQKNIcW6q4R0xEy6l0JJ8TjQLzgEO54qU3EV8hipFGn++8/UFL +RsELh6C7XYEHIgXnRoYssqY1MTQC9XSGemK5ltlsbAVouiLjBCkVCExpnKccyc7a0Q+xr9vajGb7 +Obkwcd7WH8wQF3WoDNmG4B6PojagetcZpTICLP35b6YJRxs0EGhtdGEaky8zaxwnYORU+Z01kxG6 +pqFihn7CQDfEcmFnR6DtD1Og9KFhTt2IpOVDxKl99mjz6fTf4K4zInwFrj+Un4lECKmKAFJ2CuDt +tA/gz7ApaSRnRPjeJF8ENIwHF9j6Wkeyg+KhibcnTpREfhZhz+mckzgUYeA2NgMvbLOnfl5n1Fge +ZI7PVeFT6kJSKh5ubOoZNdZLvLF59TSD7b7cNmpCUkLk8i0ynvnK92rFRCMtxS59Z8QgAjMSLcNK +BTUwUUhHIrVv/3ORMC3aYj41sZnGSaQvWeSk6br3qCS8dkfaqMbixFpnQ95h900vybsu9fPlmURh +Vqrfgb1xFGjCtn+qfD0E5xzP9uLbsaTC8yc68ZIbo5q2M7wdnmwIXHhqzlNJS8nSvlxsc05rYlrv +gcQGfBFGHqVtx3OsfpkxrqExCLnN/2n1uYYFpjjfTBbhE8jxE/bh0yM4cTOyKGZAcwn2C4mJvVK3 +4BF0X5ckAdfz54RuzkwNzYYhtqvnKpKs0PkhxMe/1fTxRBQx/pk68zf+ncdlTbV3x0qxdpYvOGtY +QrkE3rRkAui5ElbivXWSu842krO4YsseL+PQK/+qCfPuhRNmrBZf0yqC7VNzhHVS5eowASivjmPU +defTwP6TjSzwUI0pZl2VWmnBOytqhnTs7mBKR++sJEUKcCxp3Qn7tSKIYBqYWMWwlmYdPsJeHLU+ +SVa9MBzpxJrzrjA86sezuldg8ScjudtdcTfJ6aIWxKQDBvH+/96yffzLt6Uic747+5wZJAPdHZDC +hf3gfBhcEehpiD553aLiAUKKQ2yqMJ+dNE+vDSstSCZeHaPkYc+zUB3b683d6QxfuP692yMViob3 +krrkziAGRTcZf9tA/hqWU1+rXItb6xYZEJS5b3ct9rl2c6hoDyvlcqAdvqqRKDb5eNKH2cBxSc12 +0+RQJn8zD5rNgPhEwCcFtzeXv7IotG4pyNziyIfFfFpRs4sx+HWP+y0wMcnq8fqAILswNSFhwLJ5 +erhKqP4wZiXXzuZq4K+IZ24zvxQ+yLQooyGto8a9NkCEprB5l6L1XWowoKV/uGJKWwibDUqMBFFl +2pRXOK0YOPeQ8jarA5ZIBrt2LVwOHkGdZl6vbclS1lS2+wc2Hr85Hqbg2nRPR/qOxe/C/1yvK/lB +j5qaW2DB1JwH3z+zEGrZQef5Y4YhTjebFo3Pvb6pa8HFfDEm0TJMc3YVmlAb1zdr2KuDTYTe6n3t +pjV3b48uoAG1JeNFIW94HRmjhW6ZktgSBmKUISZxEqd9lLIpmq7RtRPNQ+gcfAKOwTJI5aTirDkZ +H42hOCV0XZUAnk49jNrpNI4TQlf946nbvY0l/YMBO7w+M7Ib/RwEDOsSkU2Mlo0UkoOpCRgtO2xJ +rkmPjpYqYRJqURH00gPZLxLoXQVKiSvPJXO7tanaryWL2TDwnK+YYXnfdDUSv39ab+NmBQh7ItQl +X2znMqMdhOtWOB7GgyNCFpZyqSiNeYVgaeTqH8gBUR03oMxG/K1I3HWqsotbG+Sl7ecHzaFw4Caa +WYkeJ/PAQCVwcNUIqDZZ38dn2yVhcuFCqkeRkZpdzs2MLOjw3PDUbT38Ibp80EpparhiXKXIEEq1 ++JBM/54DnQ2IyI+1yuJIT/H2UZFSHcAkatH1muHdwO8sEv+k+DXmpLA6SUimRbDJ0swipqy8/NVD +5hRx+yckg6twS91MuQ6zI7uj0ugYwjFa9zTzMK1552UnFM5VfzLjN4jF6AkM7vhUzapzgLniG1F/ +CTmNISmeYvL1dF385RL35vbvSf+gX6QRSc+emokkzq6+xn76jnQ6CqjDfZoIvLKRE5oA6T2Sq2Xz +ORPthZaMPBRN2yj5Ao9o2UyBKcvMXgMrwJrvWiSg6XEscvd/GYoP9U1njNNe0UDdxPgQu8UZTYy+ +LZzHdH+uBWOjHAIQsJeqnUYBUrrHsU97wKo0oa3E5o1+V5G86wK/aFRr9vpOD94ns7yiKJoL0nCz +Detr4ktxrCWXzCn0KTfJthOQvlQx/z+bUESqp+xa18lJE4EU4pXLsfXHi7BK2TpZ3h5Gn9NDx7sE +GpUN4b6sO+s586SodyUQz5vx0P/IwoIA2OyqOPOpMHMubfIAwWGRpALwT9aFv5UJUniEHnuDT6Oj +ood87qp+MV08mvaX8UibiBkennsbWMMG2hMbQgumwGu9zNhApOrmOiBLRUdawx9vcnBafZD3wAYG +MmWy+7aElPJ7mJwNqzW0ADKesrTI+4XcvV6wJCWKkNuNJqa2sYqTJBCjtYxZSsxUh/Wh3Aicwzxa +bHJUuhxqSKtuYwWkOnf0ZfP7O54Fa5Tw1QwcB7gVhQTOnqj7dl9i4ZhpDFfYtURky28jL+XQcFCw +mNHqcG1a9n1FPhGE6LS6SukXDnF+7zEsMpwwTSRO8/kP0AxKhCQmvwwryjhRc6p/BRhDSCthMz3r +TNO6vfitFvGcYJrhm2F4DJYgxmb+CAU8lHLg3qFE4AiD/0ihL1gcKDdtF5sZtbiCcoDuU4AtdmHn +8Q667o9GZgxiPD+2MDwgHK1RuUHfzsnkNZcGBqmvx6zCnIObl4tRpSRIdA5XIQJmEZmeS8npVv22 +KWfWLUYEfeYX9a4WUuWYmbDzgyTkyhOAA3vMdyzeF6zId2Gyr+wyOj8xOY1v33vBEo138z+q0nUX +EGcNhm5eaOTZcuj/HN3tOaxvll0S65T9Ol1gNJ311qoEz4OH9NCqGAhZl2R7oAcBC9vZfsR8oOhM +8sHA+V7psoea1GTZjB5cyeLWA/qIE8kPxXmlZbsMzYcn2wfMXa5/iXiwdOaPjsSKMSOjbxco1+xT +b05UfKmWKWym2iMp4pAq/WGSh3SAZAxdqWgtjbJQ7J9JTZkL7y+bPIjeerGoSbie2wY73iShgATM +k1SJD2XAjBqB1M9ptcDq+IvB6ENcgomEdygxaqj6ExFd3kzBD1OOQWaD7LfTKIa+Wyo+5ryu/4cP +Jz3RwAF0FLD7vEUcuIzfTHqMmMpHIrXlrU3UWCdfYHCXLHvmcx8++94vknKohNw/rdciBSmUe4HO ++LVPnWi4O/uyXNmgFKs74NrKc+J6FR9S/tUj2UR/ybw/A/jpfVQQMNi3KDaAj1FuFq3rGss8fVJK +tZZggGOrJg5OtfQsaNM0H0V3Sl1ODQK+gveCXCLAR2dwz4Mu0b6AhnSlq6SfQzb6ARkyfyYlKlgl +IOXVltCd/9lU2zmm290KfOTl04dWBEa+RR4xUC5C/Tf+x9JsyLSl722ky8MFYxE50nqZRsjiyIRc +YjwU7XI6qQAIK+pCOa2L7uBuvNygSV6scbg0Zn90KJWMa55n/HSSXtdiXmysN+5yNWVRy55rtUYF +2ypwKmrVhOzAZWsO3SLiVTQ5NO0eo7wDAWX2qw2ikJ/+yWHtoOJN8F0QDdxtoOYOswpjFOIyA7FW +OGpx0EH5LcNL1NVUqTlRlktVBDn1XBJ0NAcFbp8Dlc3Mzh4FyV6R0YB9xuPegMvhuNZiQdnMhCNu +qnN6/ZC0JtC355TbjtFuwSz6dhOca6Q2xnSXONmIAIRmhnAnVnjFGmJK/LyPxEHLQq5opEFCCyDV +nLnOXZLTamOVcfcGqPNwT/pOIXMWK8s4F0PCGBH6HI3U5sshc+Rj9R8w5rlwf3jHW48OrAzayAOy +pjiUhc6Mdtn3afGIB94koTXG3yexfWaIlQ79vJv4Nu0Wa0JmY55HYa8FPocLsW6PqKDXe7Huek3/ +V3pOwMY3CyF8+vDJ+635CHfossilDJPmF5RjZcfcbFZkpNbgTk+8Lk7CS8Emc1pbenj3lrboJ43s +YubC2jVNdtM1tQ0SSdZv9kvi4TVQoJkE8twEvVqgqnNRD7j59JnTsW+b6MGooK/CCBh9JKTfB2hH +1VLaqXBhQCNg0zIs6S1hpAv0R/Gmoi+sCS6hjsGj1MmAC/frW0Jbc4CH1BLcnpQc8AW4FHk0dIik +FQcd4l3eP9IhNSailHk02RbyoJKOHYRKI910ELM7qdO8r6Fh2IenVekRZXhA7pS8jwVVG0DYKUsh +pd4VI9/gTtws2rl2YiXzFvNU1n8aPKY2UFm5Mx5JeYMsM/OQ8vuSxEgv+WNNLOm9zUAiQQNhgzMK +uWSEP2pVA9fKTipoJU+1K+BrAc30HtxvBrvabSYaLBB+1sH/0zoImun03BVxgANQluXHKH/iNBkO +8yERBMw7j19uK4sqfpwJ0dgdkvQJPyKr47plNsYE1TciLSAvQD4sPzOiMT6W41Dvgo0iJED039qW +ZLbtYfRsP7PkbyVYreUeofhB/S3Jh3YdBvZBwkblhHNZqVPoMN5soBs/zqVulXh2CsPsKLYYl+Ms +TrBtDvRADWxuy8C7L5KYsbJKjVVQOqhDps8FupZ9A1ZK2lIFIig+1t0vpwLRNk98/KVegPNR0qee +/ZZR/ZEdC93gRl8gOHrWNYjwG4dRBN6VaxbWXMRqt5qCJy7Y6Dugm4hFjpnOqVDCYXCGCRFZ3Erq +2HPmwzJIPrN3GK7sc9EksOU++LoC/HxMpKIwO2e6i3pHVN4XiFm636CtAmBzfXuUgpJ8Ux4BNk8I +h64b1xBYBv+8Ux4jr3mAJgEC2BW3ooICJEXgTKzl0G4w2TQ69iwuT0EoQZvIh5Qsi+cuqOMRV3mL +2+3LzptQ3VhjBgkf3mLGTHtH/mL8DAl8/wGPM94AQO7iu/0Ve/PJMAuzxwcFHU59buFocoI26B4Z +i1S2kQEAmFX9Ll+g/t9X6jn/UxG7PdmUdllhTEFrTpeaK6rRpwqszMIJHaPF0E8t/bIjtzdmBWXD +mzFcteshyAAFOU+ajfVSXfAOCN6aPlpGvq2WhWABPAVu2DkmrIZ8Wwt2vXBK39vfSwmocD6jqTgf +rh3vqJtqoEN8wx27+kuFS1GhqKfkslyvG2mfaSmM1L3myhDuDzrRESQSaP0o3ypQydK+xY5c1eG1 +bT83pWyukUF69OTAmve5kM3ZPj3MJHoMB27vw8o76qprEEzy1HSrxO0u4xW/Xn/28AwfaTB6DzRy ++zODEsjodOS7fUH5MqQq69uB7yLdEicTscP7ZdsMcPI223wSrYHGgDpGGVyXceMq/Mka+Uj4BzKJ +jUFD9YYdygWbjFlTDlubQK5sJNpVmvvSStfNfICTnUM/pvdwtaph/dCC+sdMT4Uu619fQxD6H3l/ +PkMNAfgsVwJEjTdb0YDE/7W+i6cuqh6fad1pusNpho/C5rjSvNMZl2EwaFErMKAZfs8KmrRdxDcb +2enSuTfb+NIUBBxBFCUkM+FXaKjKUWTrnjlihSlzoDJU536WlL34Sr9CKcYeG5w8ZXVOkFdSE5Uw +cFSwG1fwm2aZaBJvMdFW5A+8gQAmwliam3d3tYDMBn0wubIFe2bHVvBm3o2cxa1qjwKLwMYoBcr6 +PIEeqN/2ILl3hWdLnIalmjq7nTHJaCvpjf+Ky0EeHRHK/HH2ZWpC4t/ybjPck3ONqg9Kp5dpDH6D +vglQvR1Rqwl8QPcRW3xSvVwVyWvJvE1pUQc0Q9RwlGn124L5AJhcL858FuVOSxk51CqMA8INNlH2 +3QYdjJnIqnJE5LjdttA8gBYHrvX/ITYwrlXfQ4sM5q3JpRKMK3gjXHoH1NQpCaPwmHuZsjZXnTiL +xB0iYdFwZY5YEGG1R/6lJBSnYWpVtcCXRu7NIbe0I3m8Y1LoO6tFCK9dV6CnRTVkjX4cOnZIpSYQ +6YKMqqN5677Ql+V1ybiR0xnCNf1ooeBWi6mOIYscbzyF6DdleUmWkpe4+fQAtSFyLOEuN94M/3ty +ILo1ub9JDBw0QdE+PeLgg0ksydRBqwe7aqk3NoK2FhDgIIihXF/p7ScqG2JfRD34tgx4bw/WwWQp +dP05B07eS1a3kkueN6i+lBuJ48AEoZk7+VcIOvjeLfnULiBL7AREc05R9Vh3gK6vREkebh2ixuFG +q2ZeCIEnE/jhkCUhqMBwffnOFdiscyKedSGXf+kZ6pVCJNGrmaAAU7EdqK7bhpQENCB2o5TC3Euv +f1OxcP1Ucrewhv18eOo1euM4k8Bvn+rKUBff4npqwao16whRmixdyWtI4JDIk3XU/N6Olvs2eV0q +4YA4kwVzzX5a8emJptokZE1K2/BP3Y7vWzek0o3q0sC3qhp47xIpJmjjKLvgRqYbZsujxPjmHsHZ +121KW3BzMwayewS8wBeYXKMpDndwcJfAr+4zNfrLDYPqvL6UdDzuGOK//y9J8/TjdulgXrMOGGJu +q3W2u7iXz8gryKy0Fkx+mz20t1uzcNt7jZiBU6sO8NtTCYl2S3P9hampSc+FTxWWnVTD5b5/pdZh +Kmkf8+5Q7YkdJUSFXpJHLzLWqds9y6OfxWMCUJlb4VnlF0IKrF5iuM4QTpaIG9WKSCLBP5cYeRiM +897IekS1Uv16ly4Flt33RVEKXlP3rUkVTvK8frgp/L9YfyOZVTkRiJar3PiZ6ZImg4LAepgfbLL/ ++6NG4xmwqQd37B32Yj0YTevddbYP5t6CcT1q2g2xlGTfYSvYX71a/YqBCwmrnn9cQrVtF0GrqKob +eSEajZUnvVP1c8yn/5p9gDzTAyUI6xpzHdGGqAPA/BqeUnIAHn6w5UufAe4qCp3pVFk2AfRMjBP6 +7eJDkZNZKMR3h9ed8424C81B+odVNVOXW+lxB8wS5bYbPJtyldCFG8ypJ4tg8THe54KHt75XE3ku +lv+UsJuxPe9t9bijpYcjxSbTSzrUO1KoaT4TeIktrIlTSj2tfw8L33jqC2Q2xS52VdzIjhXFE1jk +iSUsCInnlshXmYcwB0ZqvCQsDcFd4nHSQxf1933rzqkJ7IUY1Qdlddw3ZAyOuw7Ll5vaO0OOwgcD +t5vqnlQ7SNI/4f36AcMqiytiQE5LphQ1oLj2nzplaD5gyXXgXmzygsGl9m4jnbE3XGoTGftCbQGg +29eCHmVDK0WBVdYqgol1j41kmUFhkSo1yA9050xxLuOnnNhKt6VtVvfURrplylh19IdXAUzqDKl+ +H2d8wAtCGT+XZ/Sy/l1xlgTgTMyLaOxvapYnUgA9tjQtCx2KT0VUQnXHxMQo5W+cz+sU3rLgF4yJ +CnBJA6+QqR+o+4OOP+aMmh7zRF5/vHpAu9ZGAurikk5YIcTDnlDflOIN2qZzPdQ7Yu2dicKPe3Cu +SQB5PZqwvWIJQcXgVjvp/ty1hvESGqoV6OMMC+hiOvoYH6Hm/v8HJ+88aZz1UiNz82mW/Iws6geU +DyuJc0l9qa+aVrf4RvuX+0xm7p6ClUliQvhck8jIg7AyJi6EB8sdzzSSAUf+51g723bMbd6m+DZ8 +FbytttrQV8/inMA9qzSOwOdSW6z9zOA7mBWq0DzjoBiz2cF6ff133xlMVI7E/G8p+jPwsmndoHLJ +3/D2K4jSyGBclvp+AMCICvWb/SXQV/jGMXMkfsVMU5oxLWyz4mgFCftEDKWGfhKwHVkmU3pw5NWt +ok1FspVBOCIz6LgKkdt7Loqe4Nv3HYhzhISPtZsUsUxtc9OQnysc5yuBKi1GRGub1qosjh4AEBg7 +44JUoNAytJQhuEd6w2/IGyLaOiNX5bjunFQVXT2wgmdiYIfFI0KouQjVACfn3vKt1Zw88U1YO7kC +8ex43ROXpUpddlX4LrfRe9Y9Xlbt9DqGd48O3XbMg2UITIy9d3wS/6GS7JH2h1z9NTdHlSTbJC4Q +J3QUpcoTedh4MALnroFTawcsnxT6Svyhc7Dxv26uZ8lfqnFxAGb3Cgp7qeEU5uuTB7Rx7TFM/oVx +N/lhyMydXaRcQnUMNO2LslLpShLoYEnqY2FbiE9IwGTq9tTMhzmDYiruwLb1v9QmrxxJpXhwJEKH +YfMVZ9belrMhAjZ23mc1q/PEFxw1jm5OiZyZKBxw0vsfygzo22IAeENGR9tpeD5Nx+j72EWJRJIW +PoLT85oioZ4lgE8AqYUk7ArxVscAW0Mikz2nuyrMW4pwXS2TYjqqRJ8LCMFR0jbdsQomgamed3dT +n5SsS7l5QFDhKsTwYyzff8i8bIi7vAu/LYpumRtntiTYoIjgCOXSL6Hy2eHvKyPWDpiMD0ZJK3YG +2TqOCnrw8DDIj+HYIOX8jxYoohJVa2Eik00fRg576o6dmBhgaieaTkDa2KAznhBKKgdIUgJw9rPH +KmUoDpS19hp3SJSYpVy080Qv1jZMnBQUznF6ozgYjHKn0NRDtRlILY9Qli7So9Gbh/USl6oUyCYq +yD0xX2UMQZukQ9Cp93ELk+CBztnhv2qbYIp7LfDs9i1iBkryqzUJm9H5lBpuF6YkZBclT76ef16S +A6uxJUXF1pJSl5xUgMhyTSSs48PMM46HdNYTJOVySO0GpoKcwuPOCYkLYY5OpInV5xm8h0Cnm8yU +FFhCbLUEQJJxrcwUW743aRcNVDhePgKP7eNttdJU0RcZxk3WN7IZWXP0AGnBuVTud9eqjxIe4Zpj +cLvKIutBFgZog9sxTjIbB9LnikvxOLoA5Q5ViPKKlCHRtQzj/3hRGuzY2tdVZf1sjSMNcE64AV1x +NjWUO/liX/lWrNAUtdy2fApIK0pCy3agw/8oeAtraS8NLdtzZmYG88w1SsKLI/AUSy5B20jXUjaZ +hm+EsVRVIYVuEMBGMXIj0D9tV26FeBW350ux/dmJMRPtKMzp9dtG6OrfZMq+72f6kkuaf0KZC592 +Opc0bHh2tQxGU+oZfpcvknXFoT3XXWwT4m8HySOxZGcICEsWi4ByOyzibFA++My3bvmRMRvyQB+T +4vgrdPpxO4n5BQaQ7IFxOfMhYdyQH53U06aCEGgqExgCpDaCeV6uRnuEnF3WWRI9JoZE0SlL2ERp +QRvSAeFacg4b1Z/ps/4eP+KxNjGtmupu4iXE7wC5VP4T010FFKE6fD362q0qVZaBWwjdiJbqWOEI +dmvPa3/n8Uc5N9fK23cvJA8V9S9wLVMuv2uS+B3emGgslmjPddtoLGq5E7WNTx5nrk0Mrjz8MlL0 +SPH86tkfHfJIIS4ZAt6cPCBtqDsAcsttxqpd6AOqR13ch8o+xgyVL2Jl/QhC3rIh1V5ztn94qcwW +EIk0O2Tx5/dgZD0lc/v6FbwQnFm+8W2xU0qVF3J7PehpwG3uCYqBk5DAg6ANTz8OS/0wImJ0NsLB +GldrLaI/bofaFmexulO25U0Dh23fxxkvtLZ1HTHQjgq5oI27cZfAWAjCTzTr2fm0g6slbQby59BR +ntLorEhmmhG5R7SO5KnuJsm5T1tuOeLHe+a5bdmvKw9KSIxP+TjPOKEOSm9B2coEeCVQM233W0vX +PQteZ7Otjl55pA5yeda4MLusH/abiLIlIZJZieTwguuM2uB3YSs7rAZAgEat1nSuEbkXaikzSocU +yJkWHbb7rRycdgEHQfIwfQymBo03FzPC2qtEW41j732b26kAMMsbWY7r8xg4lREzgWe8vYgPxK6x +1l2bBmiYipHtw8sIJn35AR9HrKMEJfEz3kMbG28PvNC8EZkblHL0PO9w6Gcf4ZYmBvylii0Yj6fi +Endd9R0rnjPK2mAeRmUNH1pcS71rXBqq5ISGAi5RMs6dlmwTHtnX0xUd1FLtLQBgLA+g2km7Zxaj +8m5pK+ONus8ewj4AJkRML6469FKvwHf5nvlLvZ1Fp4KN3WkFkg2eMxyAfO7l2Rz9/tUolte2AXh8 +b+QgFovlT1HIqn8N9QTC1UFTHDnl5V7heUM3GQr/YlijGB6zzihonQs5briTtjd4pOI+V2oky71K +euD7oXq4ZPZ8HL4Va2BFn/20WHwig96c9R1dTn+3KWlpIyeOtSwaO8TqYXHwGLlkPHTycQQW77ZF +6hxDTjCsj/bgJ+dawKj0Q+MJFBSiRJUpKFZAgKjeXSl8lV17ISXmh1by2t/LkABHxDFtQ+ZBhvnn +V9WOyz4mNZT6OEWqc0iY2yRfHK3YXwJdCY3h3+WoC2epBayaKW6araD8gzlADohpS0IyEoR/5ulL +QR9TlMo4KPGoKX3k0SmuWIa/l8xqK3CcJY7eHQeKr1/9lKiObynkNinYhD1XeQ3/AJLLERZgd/hV +eYhLaBrx7KaBnMM9ODpWuT9wHamSI4DQYAtOvuG+5l5LT+8RT8/oidd4NUTIa9xxebvqGlcj1DQA +8byfk3Eih4UfZ38TPA4XH/1C1LFstjtAr3Om6wFmRUNpt7abV06LKU9xTGn4s+AQEU0ZCdQUHMN+ +utDk1srqedaxlFToikh8DrvwW9GyxJHCavs6K+cWB7jN7kdfGJULtvoylggWtHx0DrEUENtR9DhS +WkopXI5B10zMqcQ9dsl/xu20pK/KGrOKc06q+RW63zQQh83JNch4gO5J1KQp4LTrT6ZohPhvaaHi +PQITGmOoXhtVu9AoU11d3cTZw+FxpAr+auNGqoHRPK1g0mkvxE/YKYcT+26h3r9MxGgNSrhGx0q5 +OZGk9hIY8zofD+dhgqBqmh501lpSdZg8ujvHYc0wLifd1PBk6vKw0736sC3GZImF2IwisOrNV5bm +P4z59keWNRLlyhzCNtq8WYm5hxMUAm6lY3mLsc7qUNyk2ghT3YwIP2gbUSTfvAVPFscO5XjejbWl +p50/xbAiXn8CjR8VxVZ092MyQbhE3WnceHXb83aqTrIwK4ScVAohfgGSwCwu/dLUkW3fQAq2yhkd +YizhQZXNICv6UwEb4AKqz/ETir4bX1qT2vte5StbBLWvl5WOap2YSFoUs7eoUQ+jKC/Ije491x6m +8hckaMvk1FyNG5P9KkAKYETSGGSSzL5zvGfrrnHN9eLlsUz+e3u7x4nrhooq5p6Btrbrti36IiUH +lKIPlubXtfaUl6BGvp75Uy4QUvw4AB0JadxjLc+OAyx6OZshF/YTMZ+gAVdpUHR1DRnZPrJwlZVi +VZ48l37dJclaHPBqy7+0sfaa0FgrAyRDfGcKGxD8ojtOehtg3hi0xDlP9kIXGTjo2uyWoJZbLSvI +oGkjhYyRIuhNE2Id7r+3CvCk1IfWEZlbpLBQ5vWyghYXSUDqniJ8fbopYfQ+X4Vj45HL6rFeo6O3 +wq6/x5NqKgjTZs2YaYBolD7isdsuV4UhD0YZWwwnl9jcodzex5yJtXVOl6oJj8knCHlSKmaob4rI +VO1R0Pq3rv4wgg5ykhsH9TW3kZq1C/ez4SmCaV+Vc7Q9AOwUBS3ajbRbPpXeixfapONEnFqU1Cdf +21745SacEL0PtpoyJut0myaUHQM1S/VATsVFtuBnCaBphx9XQe+dPpB2Y+H5Zx0LifQzPVYFPgH9 +iOjJEnzdmPpVCdSVIOaYI60R6j/3n6/bg+TdK7HJqIX3tkWkU5eVshQwzsvRUqDKB/hbQBJ94Ha/ +1KSQVZ59EKRgmyY7/3qkJdF11DNtW0y12hf85FIaDFdHcpmGXupFZyosa3wVa0suE5OzOYZQoUNO +ngFlqMD52IJ0fZ0mOkK532uSJKXk0Co1Z6AvyNaeaRjNPwMELut2GUu1Nng0SIuvXe+c4311K7yz +EB+fpqR5oRFuvNX6MQdOVAB+T9H//uHntw97mRZf/yix/4nJk7v9mTOjnEk5vB6SMCWeGHuE5Yev +f3BwqxY6CBlYBgKzs8/3J9nALPOpIF5RQFcDeAW3TL6IDmVUW4VhzDtSbheWjObpWI/h/0nhoJT3 +lB0aFTDbXXUAiVKhPwCt0uIccPuLieu4a72qRmUzY4eSyVCiHdwtuiAX/NY2Pll5cPKoA5WM+paT +4oXSOVdz5fH29Qs6dwtDQBRl+oWGWOyzqheYyi6iHh4E0XCxs5TxnmX0CSR8S+OwEJViTg6QZnl0 +/Uwkz5C/5m/t8auIoucVXPgxYMavu5b7JDdRlIkBopx8cDqyLRnTz2mHKKHyyc7OR5zrkJ/bcZvA +otjvdKEEmvBd4SZPXf1IfdgRv1Ubw6t/526OQYxSkRm0DaQ3q9TU9NYCOsIneAA5eJeGWMLqbbbR +1BjoMm6GQfKV1swLDXzboNOGlQzMt1P0DYRDxGngH9/tv0GayyXPQe08KXowAKO86JcdoAEQjOMH +CuMRk+8LkKNC9j+dXt6iPg726kYqFhR7YxDYGYrCWvw3YQKwaf1awHna1Sb+trtK2OqYTxEmVFsa +hrjSZbHfJV2kzjMrJCKisTLBFD7mu/xEcVLsD9TsB8zxb4MhSMQJc643B/8hQmMdtciylIM3Mp4M +ZtrdRlEdkfTY2xuPVJQa3ZrBV0ZFWOtMGDF2jjqurDivtrK1YZTqMScNuUlBot26k4CV/5A7AWnp +aXzvCnKgTP81b7ZKH+O4iygGybASDnlB6QxnWspK9E9wcGoGdNzLwnV4K73vBJjBapQ5a7PFMy5O +eI3UVrDbAj8WbF5Vs+zTGRFaSbGxg252CdMcA8ckMWAAXiR47u2UXt9t1CxY8He91k0a6DO5rnOF +NcnSr3SrNUHzNet8dcPZZ3zXcvHsQ9hs7hoNHhL3lBNNrY1yh2He8Aq6hYTBMX8gf4H3k8q1ji7q +rfIFa6aqmeDOLGaqIGY67DswzyzRBCFuYO6Ozs5da+KSyl7IKvVruHRDIZ7X3+Qlz7RIQEXSTkP1 +r0SuyF7CumGaqRUaiViTm3yvhVHPy/tN+2Sejrkb6dG1lXpKJdHd8Qpt4mfjU1H5ekdIhZawkKF2 +mbOCELwRmGPEiOX+ZopbMqdO3zhO1xv/41Q/pyfLoVSvviL5W7MeEl6Sa9peHrEfUM+v7OBjRDk4 +8fxSm871i66IYtDFiHZv8KhOjA5Ka67WxwFV06elg0uaudzAAMjf1cPu4twtwsizyYvFMKQVdiJe +aBW9jnmdqlj6BEXPoAKLQYq61C1mvDl1+s/mKmK0Suz8QRH4SMVHT5rlcAvZhVygapfbcFviMDFo +nKfN7GJ6gmNNrj1HfPicjR05CEHomPbupANPunaoaEEIO6N3ZSkOiDDSmKqKsAfhUTBx/w/Exzz+ +MLnqu6kHvTboAfx6aBp3M4nGfUYFAdpdQEnJqtdPeuJgsnTbnP85RnGZP8nVspcd33WQBkwCN3cT +hjK8uKRFN16KP6dlk4uuzKwTV4kNwbtvlXOuZ1ds4nrn6TopcrkhbRNRFNQdY99nGaV+NGdnGshr +5UMKG4CKm3WqS/8ObbSbKT4+y7RPWobBnyhXrK1AizThzHffaXdDRQXD6IjfMfVO0zHR4KS9nm1q +7ndWRGc0TgqP1x61n+SkW6eFXjMKORBLLRXHWWDgpkqcWrGAbjnPUqvtnE46925p1CHbor6fjt6u +CZHDYDjnoyXps1ovWxHLSAGj8jsmE9x0lBdCxjt7zknMxT/9yo3RF+CMX/5yIUdCqyU3SO4eWY0K +CnphMeIt4JnpcW9JbiC9nout1nnliKZg+pr1c9g7Km3zvzfO4O5n8XWi4EjOKf1foB8tIYYpvBfW +rtzBwSP6zwzrq81ZRBCzWISxboyoZW5qj2ouEOh/eziLceLF/hSHqBfoiVEvcqER4ITmXCS3C7u4 +uPX5/G/McCgCHMOmvzROYG1255RyoMVBCGIZnRCFpVpYcbs+wKM7qBiqfUHuZBE5HZ2tdT4nQwSC +5xZbnfWO5aBI68S6BafzTKZccS6GP0WmyHbsDmNSEc4C7wnL35puBEVvuV5jpV6rJyK/3UvqolAY ++E3iGmp9vJbsxhWQyk0GzLTKrbZv9KRFWpabCcCu3GO7YL7Gq2cDbqx/zBudy/tt42wjACFTVhQd +0egjDPEcsgI9NRVtha6hM4+5To3dreabZjw7y4I7WoCMWTdXdcVs3QNxGcujmhkJYKUtmg+9Ri6I +3FWog1TtFmsOwPlMVhGtZrxogntR9uEU9bu9hYaDAPEqQ3Uz1QfEq1tCoBizXOCjMTU5CSJ7GeQ8 +VBqpZacl2bdIP6vVWZeyhnSMHD5xA30mwn83FQlTxyZ2hjFGhtFOjMOaUt9ZAyPUiUyfyCnO9Kqq +X2kG2L3KpcN0sz9EiKqUTsxpnS6bslExm5reEoFL/aIm/xTswBRCmBBOtOEvTvdj/eRTgyGTDUcN +yXQvHNxNxNPVkqdxBsDeXfaf+P694I7vFiPiAi+uqrOMCGsMkSLhuBDe7rIBN20jdP+noCzTLPuh +jtLA66lJd6eGsRUcXpUAiRTT5tcO3nHWL6w3NJ8qj5OD9W1vGb3Ic1iZWA4C6u+zwOYyBClMp5id +n6+hOaVAmNzid0yYh8vs2MCmTY3mtVxg9qMzbQficoKxjPHciRGZ/DUIXKWmy9SFmiZAoeRxbJ3c +WfcCQk+cJMASj/F3FYwof9rP/sJ/UjnM7QcljFBRA1Ez5oa2CPGGq2j2Hrh3oQsTZQc7HdTK7jCr +1zyzB50+OeGWeXzxmn7WynVH+arM7X32vM39qMfrVU0ZuR360GWY+W4bNnc2k4DU+RI2jmZgEb3D +z0YZN4ISqcZIorsTqIYm2t+xvqnbTG4kuSWebohs75C3F9ymNDYL3V/4G404JFgDjJ6h0mSuFl5u +wRifMYNHPCSojWXFtR/7eIdWjNrHVjI2c5W0/Qvjf6ljhiFMJ/YjQxJPpqs5FeNb4JpNL3l7uCJ1 +KOptv5LPEH4hHage9A0y5ISzxgzEj5VhBrZBbf+CpjTlamLGBlXPKn/hTn601Qq1FeM2jCsr6cIk +AwetMtKx5cwcM6C6yJ6YUTODscEbBmef6orSI+TaYZ9fvyMpwZY/Y3j35p0MFAARO163mt3TmZLW +ScQk9CPH2CuwuGfxy26uI9LRCdS1AkSqwIu4T38IDz4W2EinhjhKbThVQ/ZXrbMjgQXJCVaWFhrd +LXcsGbAimlMsF1xwtDzugY5xdKNQVgSb/TgPTOu3zfeHjv6dnZH2pZc3vzJu7uynjjo2EDQGveXD +mNrTCYoG1z4poo+sg5FdSCnPwniEqRp2tzXS18/iJrczyumoDoXGkfifKEpcAaNQz5GPZmSYDH0P +HWPY9bJL4YFsNXBN52NuWCvjmk6zrynGFMJ7+zApv7srcxeps2RUDUFR2PU/b93d4WmYtjpz0S3+ +L9l3xM5LFgnfq2MeKHItiSOtkGMn1sQAC3C9h8dj6aOOIXLf9ZNmKUo6suDLqhcZgzpTg8I73bTw +snDT2y9vV4LVhQbqZEAI96FGCW2wdZ81jMaUbvU/cvsg8WmUuiFSNQOiSDh7mNwwg2Y5bIdJYcuY +UbtY/slhtzW02LqRY0JpsgJ9Rx/G0u/5o25tmENI6Hao5gpqo55ILNYJWiWzCiQEd3KUzIB9bO8P +IlKJtCFvnRH+ysDyG0NdPSdou6ir5zO1g0lLA+vPuPOB4VrXHoXg7W1/xn+LzkvoWvqUcWa/29vx +BEA/4oUGDuis9KSdE+CBBOBEN0Qp0amua4q1gdjoK1GtrOYCeO6mkui7gJuMUKwgUvNM9r6YuPUo +85LtJIylVsJmVFE6BFnHNO90IUsMp+G8KAXdjk33wYpU+rm6bSi0ATLz9IQ2egLovmigZYz4wKb5 +VLOOeyhoX5QhKz2wh5BYzkQsWYnpWSoJbDQ7bZB6gNrw3rG5EFBqKfxxCFvlBCUNwy4PiyiAWRcA +FR2gC0mmt10p9ZNAKOBAkfsX4ukWb0eYzjRjT5apw5KwJfnb/6GiAk6RZCt+gmSFoNtiqKKCFsFW +pCUfZI7uK0KDIRY9sP56Cbm++g9QQ1dksuqorrWzvC/9K+eAcfgcf0JXRL0srN1lX6iSInTSwotA +x2npwBkvNG+Mo436oGDaISD/LEOxAM5JYhImnrPCv+ML1ndp4+WbmWwFBVoY0h5u//a367skpLXr +SeU+l7AmOQTsoaDtVFL6TPlmblh6MOo2Gp+GhErXh+ZsdmSPHdoZS9QFKojYPuM8ym2LwGhsC5kk +FizSElh8f0biacetbp39GhXW6Vgwlif6cuQOqyXIcIE869b2eulZ0zsMiCJFwBXn4XTQw1LXsNy7 +XVzpZGIFf05I4UICq8A2r7CLOOPNWq/2a8zAFAjtv1ZWHVDShjL2OSR7wM2or5SZU8uqek5AJXZ2 +NX+P+CEAcl0+PCYjuGg85a4jjPhqP/RIBbZ6i9ChPyuf++r1XqOmasZ2OGPng94yqhdNRmKrUVkG +/CRv1X1yJGBYV4Jrh3s778N7dR45FWnYRTPVmS3nzkcW0rvvP/0eSWnBEAI33aEQBA7qN0A/z5hh +clKkH6/5foWIlIO59a9sm62jagdNLrBLlTNcv42lgGYc2trtcJCvTBcP6PgoTRLgM4Q0gl3VLfuV +xhox2kRRvbkqsbNW3EkjaF1KhewMUXdnAw5PSZaU3B7JY5w0fy9i5D/6ZddzNIZ8+6jz83QSf1Xc +lXi7rCTXGH24sA69BMFKRr9GvMMESkvFUZ4FN2hEefs4/30w2on7CUZCweak+uIIyafdTVrAbpI/ +Zg8VNALeBbRVASHLwE2m6tJU0Y+E5AVZd9vdkKXKlOxyr16Cx/c2Qc51NrjoxLekBBmbTon4j9zT +O37mKc709LzAsOR42v+hCGRsxjnaCOnLxvJRY8M1yXyj1Gt9FcLii0D6mNO1aLTe20aK6bEOUow/ +MbxLS9qgEormQX0A017bpsP0qJpbqg27JgB9Fmz4HQewubCY/201MhzUJRfHNDp+7VZhqsWXikr/ +ZoTR66TOSqVi9LXO3Tc+QNdrgVlfSOOMi3VgkEY9pC0DXiRHw6SAO9aP7k+iDy1EsXvH3kHNrv+6 +qKzz6xTmqasneSawYGsu8r8ks9v8rS6fmvIUXVv/QLLTcptq3Ek5a0FgnyPX4dN6wBevsNRnTXwM +/I27IM2jZcjOCNJkgIke05/2glWhcoWf0Rz2PnSbN5kyDuHZMZtPMssb3V+E5I8O46Ruia/I6T/H +S+nidhyZ4qYWq3c+PFz+mPHglwf+BO87JxVWG/EkN77GGAOlwSU4nMeIQZ4vnFXCgHudrhgcgMcz +zyJubSPARE3vVUKf4vJSYcctWKsLFsXT9oAysWPQtdSdJxaQcTGr7sKIh2iDWtdGEctsGt1WHUFo +y1ohwBQpqStuSWNRk9bXhrCHdCj+kjFj+Cb8NQQxaH8DRWj/SxZzQ34MIlP25794Fo48nN+/Edk8 +nSsWUx4kQXbGKBgV0toeagFAA/SiEw0qkPSF5iPKnuVvpUCMoBFCn1rUyqlCT/ll1r1zdpLjYrgD +sp3F02frDIywsHzoYB+UPcSatmRigggZrsF53K9JgsCN17h3BP5CV2SyJeeUJzsUZoEGUqA6iSLd +PS8UmU9br8r8QNvTaFcNMFoEbw6mF584Niw2Wzn3op+v6HsG46kk8QB4Zf2R+C3O7pYSOuoyU7mk +G/mfs2A2gq7slv3tTbY1gpzxutxy/oYaz5KVUv6cyHNzyMOfyYUXx+0jIq6tC+8sEzM7cGyMrtdF +CuYOmS+NDH82nYVsJCHCMb0OeJ9rqDvB3zN+0Rv5g+cdGgwXSzmRAWGD5IV91pax4hjEomcMdWWi +/5b/FNodbdy+V6Po6aWwssKw1f3ftEfwr/IzDZ4Ocs3ao23vEHlK4aEKiRMy4Q9zSyJL6lZHE99E +RXd+rOQ6PM53pkCxgDOGnxWAwCztx2ovo7j5OfNO9L8xbsPsaxJYAsIQvaOuU3QqKU5aJ511pIP3 +MA+y+EcsqllwMK/EG9ypZtjtMet9C20vqOZUi4tx0b3p6lRcsA6xi3gKvNHbh4hOGlo95bQnzwrz +8GGox4jmELDDlnPiSA66oj3pQU2vIJvFrKlxVg0ahZHqzIIS+j3lkzSe182/A177TYgYLsQK7zdJ +UMAETWc+YJN4n2OL5MQoZBVKmIjaOLe2f9bxz2coFp9xGK5DlKei4n4NZKuIN8fDB10V9RmsThWO +Jk7U5CaTLwwg/C//j4monojZiUgPkSKSswywzbi4JNCs306SU7KmrZ+McQ5uqmzTHrAO//htb+b+ +92a7Z+EqlLCIRev3RDGz5p2Rw251vAFVymV5YaWhe+1GYvMq8NbdX3Po9cb2gZtcczrwYJp7IVVy +qb1MkqkFj4Kx0WPNF/DkBjIEBjX6BkLd5GvgjoDTI+FAg7vp8HBxHV2rQJ9B73QnsiIn3k8MceOb +L64WcbxX/CH3xwIFziKWo9vax9JUClO36mgF8+1YTyzzxk+t8f6dTw3ttKmt8PAQcnwKHzKS7s+I +mCtmmzZHEKnRNh1ftHVZvtrirX1ZxAlSDGR9C7izFdApUZk42uj4ZWMvglrfS35fIjOnj8w4wQ4/ +V4w93kXu7FRxkSLSx5UlXHR+QxFdVSQxq5g0ZPaC8nyMgtmPo3ayrNcCQmmjlYzZ1JKE130QAbK8 +GDOA8LFouVLG8m0JeWV16npsEgqKM9MCXkX7T9CLV5Qsffmsq6SmONWKEBzLDejllztHwoZhGxns +6t3xOqNcssyrKy0KOcvMftCAf6mnLEgMnrw+9dJpWflbHvI5WM0HiD3T2XAx7ayuOT+M3Rda10vT +OpE4PAeMT15Z5v/89IQxlAh72sSqIwa2GcZyE8Y4dORUd5C6hQ2kC1rxIlGL5YdYphPVrY75n2i4 +K9GSryIEaRojbHlWFQeVs8F7VJBRe/rcr2QrDIFW6w62OwehqaCVc8rQTrxUqOZn+8Fk9UIqwbmG +DNKTDaN8yoORwPbokkmOR/puIJxBZK3r4NotzIUXy/w4Fp9IwV5MoWEa6B9N/wTmJE6o1GnEYn+M +QY2mckg8BU6DB4w2ZsixOGWBwk0lSaXu2zpnXueWT0Xfenzrp2BicIpVjG5K13WrstruyJKJOdOY +fuQF+fwBNZAxvwcXYYhFp3A1Zc8Ud6fHCgv6g9bOnNJ/CGelRCOGMm06E71eVY3063hsHUGcUhbQ +avGcANogctjrc7wHEtHAtBIzPXVm5yMULIKqBrWpT0PCSaYmCEcCwyHlwZ2tTplWeLKHpQ9SoHFk +MVadm5tbZLgf4nySA0n0bsgIM7X1S8/0dl7V3q9saEgp1H+siSyZNuM4UulDEvKG4y6ilFUb4kqs +8XDTkZAVR0mEh+waAEppjF+2L7cnMlIhfn9TmBgA72hYo0gndrqKBsBAghXLzC9CZjecun11PI4S +lmRI0r/PA7W7+v4LufZz1KtG7ZfWLJQJGP8sA1mk1hZKQiLGc+423mvPIVgefOfLBDpwdMHTKKaG +BY2IA1nUVzZFMhMicx9esMLBsG3AJgZhel9N8PatUE+lnHk3vWfPFC0D+b2U7JHKt9mt6nLcWTL8 +aZPwpA4Yl+1yb+ibGOKknIsYM7Nqrgy++kcGcLVa/RWJfA3gcgJtDVgPm9I6YZkj9Ximbyzq93Zv +/FVPav36EpswRue3vrjtLs4lYMvX47EXeSlWGnaiLRDNeheoTy/LM4dIIkAuokD1uW47dpH/e3zP +S+xeYrOMktRUnEUsTktvLmlVttuilq3K1L/ggbWI3wYE0etGLzJsKHP52uPOLZXIZRdX5tgNkAMm +0vC//ph5r8SlFomu0uz1e3XlvkFfYYVDpDdvw5xzR0b7hRv1qpRYIaMYEW30POqWDPOj2EPP/iFp +CCqfisf8fPIA53+7AVsih8w0aaEn0185oN/9Yt6A7QLgfUacZxHsc0jEdtv0PODzrC1MhCryZ5GV +r/rL8Oh6s2LZuVhi7w8BkHx5dDnXxL3roIhbm0r3pqtx6Avj6cFxhBNyECYV8sLEdJdD/0FEoaE1 +/tHSU1xy/PK2AojT0JRAKOOeff8uoNHcU9byXsj/xpD97Wnr41+QghqSs4l3uXoD5pJmqXn+WoS0 +Nytu2gQAnewyDWht6Gw5xm0i2M3GceC3kkRfsrE4w++oGJuHoPi+dJpkcE3azkPcpUY7bPF5MmdJ +/Fo5l7T3lYHxjVJ/NvGauygXdYBYKMirOPUEFVGQjUcyf24Z54nfmb2VwtG8uD94Ft6GSQVK83Sp ++eTk7EDDGZsVNnfIXIPkuTnhk6QE3ZOkVhBDby5+I+3Yu75w8wApaGT+T2x0s54QuQioVe0F2A6d +UwjzQ72pqFQT5ULYreYj4s7Cg5YjZJeaiMl5iVlTaHTmled1auD8KvuuHvLjHZf0Vv9Sgb8ILsVT +dO6LA8iD1ze8pVw5HWsFm6K4chz4bfFJf3+g5+4Pgsqc066P5GW13cT39ocqB2HSGsOivAFhYWy9 +85Vem6NN9r2TC5MOfrDwYrJO7qaIrEdp+fckFutKWfautQFgLYhhnuP8Q5w0Ap3UIx3FMz2esNiv +ParJkME2AlsspJHwDkYyotRHzVz9CnPzyP6AVxVGq0kRHjnQqEty7/rpXACgTIBpCkQgF7p7Y3IR +8ht+DaPLxrpRWfK7Sef/QBLPhbw8QCP/ui6BiO1JraOAcI9lLc5Lu0czNYZ3gpCWdlZAuEP/FSXO +FmG1QMMo0Xl1kHxsb5MWoAdhiEMMFui8JRCVq/7+Pj38ZLGjv6rnXrWryZcoz7SjPWQGTlKS5juN +fNTMM9nGqBs173YQMElIh175RTwV487istr8D+YGjPVTNvdZvPobt0l/VlkW03xCxVgT3L/tAihc +JNUmpBuyDfQpO02DH/dgSLKxBew9ulgtCEWq6R/ZAEOgeCta50nmUGhEBiQr/S6xAAZSUzyT4pFk +/U8yda+1C8YGsHFYH92e4rM4UeqQ/v1wEid3ahF21LJZUveu5qCr2rPni/NyFlGm/eYC4RmdGDGf +x4GyZwOs3xtI+kBWgKtvnJahGMTJk4DpDh5Ei/EcWduzQy9aXnpQOLzTKyW078qjB+dFPZ0IVY59 +KJ5jo5wK8cHUz8vN0OizCnwrBh5DROcPphN6U41rtx3gkSml2gZR1Ujy9WhtLEJEeARfNiND7HKS +ISmxAxoDFoboUzfkJvXjIJllql+HqwqgJ7d7Km37FA2oAXPfTMOZZPEZ406D1OhaGglZMQhP4mZy +wtouAn3zh4pL9doywlBrxiBVYv+TYSBkPNDGTrfEWyP3RjyEiD+lT/5nfU/DOaAChIzC78W3XIwp +lnxcq8zo4T1G9NI5vP75WwWZyIylhtjTceYSXdUV8sLaxUeKSGvYZv4lTzUXjpX9DO/TpSDvYEFf +sdjmZse8Ib/wqNE/gF279iMkT6h2SXkFH38sDVHheKg5V6GJe8jOjSiZQAEn6L7L1LIBVmn7HPD6 +Zmi6d+vd3W0d4J/jNDXPgKe2E7vnkwmD21gaVchFADUQUSW++1bGuRch/lH8CXmaQYmBDKAGEtKU +Hb/7kI47E1CZXtrV/8y2xyrVs2tzsZc9MILvu2JtjepslS7qQphiDFvdj2cfUtwpnxELvKj3vhJL +j/JfyNI9rBTH84bcBTkPq4TNJRq0mohwc7lolmVqIoVG5Two1olesI6aFfySW3zD4oLM6K8A+usR +9p9a/jOJtbw5I9amtOx2Ljzh9EqJZAwCNN1+/kJauPLEkZb4+e78jr4ur3W6jYqqVk/RSXbAb8gy +cENezWELQPHU5nvWqF0EFFjuYe5Vyw10Nl11cgHbgp/jzJMDNwrM7mfjifHcXbiNNrox5od4vJ+g +uegHLIxwSJoxQ9MoBVyTfRW+BtPRxr8W5aj97WdAWqVb7elQroGgZyEVEobYt7HqwCK4nWvGyIu0 +R/TSFqBTW43CJslay+UbAk53ycd1VDFt5kkfOwKJRKxCwiolpwzh2DZamh2mxm6kxoe5ZXrF+aFK +mFzzIeWjR8cb2LOwf3HzixfkGhA6GC+OT6Qy/2nnX8SzzwSwe85W8smZqiHokj3+2xe3Sv8RAJCy +KtFcJ3lA07poyjspYtpbfvzIEC7Ind+deOA9VofPYbQBIv7Qqu60zl8S180hs8C7Ul9DFYtUpymz +4d32X7MRf+UzB6v73YzC4XNsjOgPHY3K/ljeL3cWJNieJaOINQShd7GpGgMPxgf6F28BrYcGQ5v4 +eXb1vIjMj3bj04p/wA466jcMzUk9BBa2Bt2eY/3R61nL1RMCJXWbh53TKvCgddW22aVwqEyV/Tno +baQn8TK+KN/TA97XzXpdKicQoUADjbXtO/6KDcnjcn2VIwJVR8NvLQNsUCTV8P3c1viZwnoBeGyk +68kYr+2C+cI0R9AyV4lRPemJxWMvqjLdIS1BvQEbjGnqDSAaJQN25KeJxZanBd+3meednhaIkYbW +fpISWSce5a2MJUur3GOiVgOGoYqqAuf64mhQ4E53qsnmA5Woh2mHrYKYxrsaK7XCMn5sE7uv3Rp3 +A8uBHDSLAVBI94UNZSedwjdEDjA8KzuQWIgO1+cSK2I900pBAZowOEy2CSAW55myY0w89uFD1h92 +yr9Yqdzg/iKL+4VwbB46qHhtQGRssBQktR1KsPkteOLRUfV56NE/713PNt+1PA59Y91FrUPlzHRF +Px/Sp8WxcIuiqlm8SuhUqw1gRc249oSpX1W/lGIxnJCCXkp0Di4DgivryOufhFTtYTe01TFWd1cg +8brwMJ1tBlG7bNL85/O5I2NwgeEGGWBR7s1lFD0PXqWX44n71nTMmDz9Nl1s40WAlc5jwpQCZQ4t +InAzVLSnw+L0yx6Fpw13bfl7h6juXExZkRPRLBFJfpHI46uSLdEa48q8NHMwSgFtejQq8NxkFXya +/nc9B11hVLGU+Dh65uHiQAH9n6eWnfW/Be9bo0LOYI/uYRaHozbKb+Jxt+y2PFpnfaT9VObmTYJ+ +effCTcJAp4xzNBsAiKEviO1FW5Yp01/IDlekN31utyGgsZvDrm/fasG7VI0OGyZRWZ9TLahzXAaU +8L6zf/2pBwoYKHYXhPJNBgyLYzI/xvBhYWTjoRzontDkZI17JtzOUm/ESgkBTEeSN0lT6LVnMzi1 +jSb7UoEWxuxSm3a2vHoaTTXnsfXYUJmEYXWIyoNqwl0N4RA3kRaUu3f5H/QBS26D+xDXJLGLQOgh +P7Br4zeJ0JkaBxTYJ4uL8q+NyOHzwSDeFbW9yX001GyceLXPfPbfc91gesftt4MK4wN5n8XWUj50 +ONYKPxEgJQjoq+AQbTzdCYcETf6Dmk3DQdmpI/2O3ZDGT9C7W/Ngj39yd24UTgykL9nvBsnKpjqq +uTqCcCsO0680F3vl9589odDMut9EhXFtE9Ab38A0gcgHsc85R9GBS1SdqVrNGLXvH9Wal9KPQkzD +BT45vWe8Icgnfewu8LyeMxzkYVf+YOBw106SQA5qKdlAosJ2Ug61n8fmwLbdKeEnP3cJIQW8dIlL +X183G0fpMpY+7zOebeInBZR9GmwToIAzrNKYZBrLtvDFcYK30b+VqZErQ5lRalUW54pLQloQI169 +eDU3VbqJijhY8Yp9j0d9NGqCAziBivPbG8qBWBo1bk44ugx+WT6F1r40zqcY4ZzZby9WghsMfhk0 +Lo7R2p8M8cdC3EZ5CeozdbkEf+SiiywegEQroqIbzgZ0/lIZNEtZ5dpnhcSBwfdpXUIHmRf0M7zv +BQ/fOISyidUvn+82/NgYk6h9rRbr13mlZJszzp2rjaJhg0j7fiL6Oun1QUMXq9pECd1QyI54K7Ae +hAzTGaYbso3w9OaQQAKmc+i+6D5hRQrDe89gPyQBMIHE8sLQavM8igREnkO2EfBwa2mb1pvTsX/L +1vSXD73oQGxsN5sPu/xc/Gee821dT285a647B6Hk0kswIx0Stw9Y8Cd9ZvpB7c1UydvQinhJh/fy +pvl0+l49aym8Ioc56lHCoOySIUUuqOCfZVHq1ebA0yn+uqhAEn6OjYGiDfdmpN1+9OedudWGYKkG +sXOMGmrCXf+B8wk4ZzF6iRa+fy7Alu8+DnYoZAL9txc2fZg50vAFn80Twa+VySOdhQsydvRQy3N6 +nchPpGFeR/i9ODmXITbhR+Z8mI+pOdI8nnoG1sTUwbaojZLLuT8RYrb2HOV7OMWjMAUd85uYQ7Tn +xAZJx4PY+6s+GZJ3Rp4ACeVCHJf7RSmuYyReN5t/3bo/vBdmqJqlfHRIVAN94+kcpYMWDgHhey2j +u/CRMT7jZOFa5p12GoShg5PX0ILUwgVbGWPIslKxSrRtne6AipuFfw2VFncdqrS+693bpci2TcHP +DQsmfIVWoQt541oS3LzgQvkuzlP4CiNEXCBjn4pyGhBi0cNzOqJsQOUGoCBanEqJmyRoonr4trT6 +yhbnX692oTAFdrb/Hw+SbmC2yO71zxKC2Q2Npy7Au5tdThPO6bsTjbCgmf75VV5UQuGjV8BKPTZ8 +GKElzFfNbGv+b0q2eRZe5g3g30e+s7N5TIWnIySOgwzInvna18vSZDTITK2iKiTgudkeQWhVyB6P +gGpqIpryMPQYV74Jf5HnG6MTHDj/mpOuVHnEttaZEHZz4AlDTbmXgKDXyczoXxnLM64xQ+MBKrlr +tqaVDXvV2vejezwphlcOQc2yB8PHuC27UiJnXxoikKFJK9rtkOdt0mbQ+7plF7r4CuenscUTPxj4 +RfYX/QODTfLiKBG9UiAwh0oR0laP+zWu2z1QZVcdrVLlMlzC0jQU2y35451xun+uTZyNEQBmlG+k +S5dA63NN8QKNLjTsiq6RDL009UjFG3aRMDwGLCSdFG004nId4usJusZzGyB2jEuxYYTdqlMUBmGR +bHclOeUxBD/mnyIRvKl9ZhNleecjzRsGDChugS5P4UpdVFbngpvlsy6NrF7LHqQLxf34zFsqYpPM +IsneBCkSOj9UopUJhJUrGZtVNdQukLhtT+CfOfAKpehleuZDLEHIfDHyjvN7RKovhHavI0JGFHTA +GPq+7M04GRjzsPMCA4mJ6pgmeYKIAKZ5eDu7H0EK/TEjdmBQAophpXZ8wautmjijfn4knAIzixex +2u+ijYvLoSgm/yLS0Fp9mlz9oUWcE0ISgTaO44GUaTKT/AD+qI/G/xu+1SLOq2mvLZGK/sqqLS0o +ZbnW3nX00oX+eG8Sxz01HSiJwj0W+Cfqw99YS3aS16j5a/vYIi6Xt0q+hSKnDNtlhiePvYiCXSFx +evFkEU7lv98UZEPJSrTqUZ/pnWGAAL1yoMP8wtApmgvW0il9wM7yDkMI5Oh/qNd6/bnmwf8litJB +xe6YEgc8UHSJYIbTkSFSIiQzpGvf3ZcUTwIBrQ1GRe3VzOCbdMsCHxedaYnVCc63gsI4JAJ5GCJL +7orVBNXQvuNQxvKDUzSgf2LIV+sP1NujGfmypNtsq1ACe8mNhFcV/4JBG8xn8x/TpzhijA2E7Xcr +XKiV8z7RdLlCi9SL1cDD8S6Yt7kCmq4yOMxP66OTaAkx7Zq/MjxhHDA79KcAIi6bork2dCgGPGN6 +TNAmPm2eqczdIEcMQs69fAvjAAH+bik1fvLseABinQJbJ4srvGJ4skA8h0a3azbMxyTR+pbd3gPy +oFr3fUIdvSLfVrdvC694VB9bZNTKAxJpMBylml9HxMU9HW39XpDUPzrv8sdxQ5C59WfG5x/z1XiY +W9OZ5m/8fW3ZDreJETe0K9vzAhNSJP5s5IB/6tpAghDITyE2rWezP3vW/XJ8peamYQyHvdQi9D26 +dJHr0LTdXnZEK9Si+bnIi8lKhyDZfKWIXwUFvowqEQjemtHatrE1IEIeFnUHRGJ5OQj95XPOiKKV +Kg4ZKRYXQdXyBMkPGrUSEdKbZxOrvKr8BEukCAZthByu/4aehQ7dRW1ajc/PCEoRYbM4WSqbFWPf +QFvNSf7JAS9Sz5awsYfFhi25hNkp55jlS8Zcz+HpQGuska89FZROL6ppi7Ue6DByMa+ITGBkYVyZ +T5+ag6qmhQ8IdCFoLWv2c0nufNAe698aPi/mljvIjz/lVsr+1IiCla7woYee7+7zxZO35pPFPy1h +rBHt+yVdj0rTFbxNuwgANQLgrCx0E1Zk3ITIy4adfhRWQjHEeCWvFn00mUV0SIlKfHb+kACcCqeT +HcRqMP4VKsRcekUeei0kOMd+RYSIc5NLkNo2MJG8ebDhyMuqLd6QLcnQkgHxp++nnMpQRcs5awEb +ddRwaSHyaE8wsUfKW8QZO+/VLBN5GhJtW8pHDYNn8385ywRjK7s5cytyOQkCxnNAGEMTWH2+EWAg +KeVoccjL9M1EpEfmJ5kgc8q39oR6UlILJ3aglOFiKO777utBiqxbwjluZ4rZysDxRTPA0WwxfuAY +XdWFw6l6Vx9OKYGwd6qM83diwX/Bhr6bXA4DsTGvenSRetayaO2qxS5TlIhG8QC9RjCiyVrB+44j +SORu3VY0O0WCsVq+uW2mGF7c7coVBjpF8ElAld4NQ8XwZuHTfZV2MU3gid3Sjt520QuUMDOIuGnL +X3L1wqniyIzz4O/NYJVmD++yhtXkDnel/JZXX4ETrAFGvn5p2t9/gfUASTL7zSr3NLBdtTUCevW7 +yvVxUqozeo+ktgitM+zRjgM1lketIItVhhPbPqx8+YseznsEvbSwhlGNpGZ9Sb7Xd6EZCMdFYMPN +q3h9wKtAbgGflKiYJ0XKh9WhI6t7EridNMDuVGpK4sgFTomFRsxnp1fARbXMaTsoHhYuL38Ayn/c +ouIFk3dbNQSdSYf5IWPgb4T/cX3WLRsNymmB5czvWRh/ASAuXNvDJgBQEW/Nxbi+EcUKN8OfAYSu +8w6rqbijSBKEG9JZz90SW9/S20CYW7ALKwP0VZ3jlQW842m3MUIFCqwILv+M+NLGznWsH4IH6Dnl +BVPcSAUIj4mQRKoQCaCsflbp6cTxWrjnufAMpi5ZpkQ5GPeZ4R9clHilm317oG3oyS+0MiKdDcQc +lsPLGzT0WnuRlyNNzR4IhiyBMte/bM5+zrpT8UfgqvNXUAXxvOe8L6ECsjOJxUVardgzFaJUYFwU +x+TELk2Uzd0A18WYkAAAoMPpnP35FrCwXE+jrFigAsWzGtRIdIsTi6orFaUWBKYwSa5QR8pVDwOX +MMfoh9hau6faEYqIDT6OC9YVSfLpgJSuS5b2LMOU8fKDFCGXLQ8ftpL06ERhLxdynfqRP2NEnTK7 +mv9ZXhbVEYovvVj0THwsPLTqtomG1e0OjqoKk2fA/tl+OjN0+NUqp6IWLZAFgME0iSwTTC8ZnGiQ +51vmVjho23WadVavMEUd/qU7AmEtKpAqOkdGpzZFRa7wTeISfPO1M5mE3EUvg3Si2iiz6fOIun9i +mhFNWjpVmR75HK7G7pzApBOi/ixZ8zwZhdtFnIqUMadMCrT1vXyxyGlGO2OcKb305IaI6wCCr7/r +6e+nJ7j57Bh8/kr/p+ozzp2YUyIKjjrFKK2njbwCRrqJ/OvRJ24NoOHhjVWuPkUCgAbFUhuqadmS +p1k//bl8pM/HeZ5sDmosf3gW6pQDGAcmZC6vw2+EAygkg+gDPUd4f/tO0hu2RvStDCc1vHV9308d +x0vbbumhsoPJk0wCnNtRtalG3RLDGRW/jml/AZzQvhVbSmi1Gd5YCd/npP8BHn0HlJ7PgcYMFpck +s5/FSq8MAfNkZ4RDDm30PCtFqi1+Sbicl1ap/h2Wuf3AKNAgVqlH2RnnczmNC2dqrASM6PT5zbvp +ftdwPqcRmiSgSnTtWz7kVLHq45VFXM0Kn8KQWXvlaG2OLbATM4OR8sSAKKFT80x1DMZ6qrrXYMr6 +9MsvoAh4aG6y/tGRfsdfFABDA2GVde8SwvQsYuBTR9la2fTBR4JSHMk7chReobFixAEE8yvugW0U +O6O3smJiIOwujHVYe78qB/ndbTlaOWg4ZaQo4CbfdvL3PM2RYr9HPur7hC24ueuPyVcd8eN3L9wL +9rr8GukRdOcxaBfUNcc2SFmPfA/uoCz+xVsw5v4RFGoEobB6wzAeBm/msqPiaclXW7O0zIMGlL7y +aIzzuf+IH/45DZqo4XGE2ZxcMvsKRZfOEmHofz1UCLdSEMYKFfKKRpfoBcEtquPgU/Xp27SH1GYf +tZFpu76t8yvTt+QQ+I3fJrr0G8fh06VD5jdk9eczBV69QykiOZzMiUE5+j8EpAegUrKSEmutMgFc +e1K+0VKDsMwfJxUlx7GJM02FRP/5BuNNX1gJZjY6PEz7XyYZbcmRVCY9EoQ9AB+q/SxRt7AC0+ku +G3BTi+ZrVvKrvxYT+mPTcXbcImSXU5+kaoe2uF7Hhh9o9oIecxSOZB+nHLLQLq2xh9RZlUemGQqB +MQcxOV5g5yD6uSsg5v+YeUzpZbc7mOPLsry/+WtDrm+oWJUTXhTis7vthBGAoe9QDpPAV2PV8PMR +TIzphCGYTlt4rOjSfj+5qpBxsCrzzSPFacITj5ZlS8SfJqNFNuu+A86CBzbI6G5D9XRkUgY1uOet +bihxfLJO5aV05N6Y2SGdVpJqOlitiG7Qof5RoPYqXGl0QoeEVdQnf8Ds2c61zYmPjAHR+K6RYxqM +khgRWHQdmfkbfbfCMWJnAZ9R5JvPmuO5BteKEpvGDrRLT5mNTzQk1jzJAXJXHPzLzqUNiKmVRwqq +5DRLRH+7tLzwsj+qEZwQOsYvOKPgcSGnz/8Ng+j4kG7suy60bbK0wIAvWLv2QQeVIBjzL30Rdyw1 +rVd3wUm/Ao5hriC9IyUFqHdXbdZ/Br3Uaggt1e8/1dg4iDEJYcEMBOQmCxQqqk3FbBvsUgqAKMik +fPa6IeIYKyYIy4v4NHmxUFWALjhzA3mBXrr3xPKN8rCeug5N5dOPJAOVTzd/Be5icnxleO3+SRyH +pdzTPPMxa165pqz2GfXGS4ePXXgKHr26wd7oKWGgbiDko6uMpKFThKDC2Jwb0caOKpgtVFax9hGe +PKR+UpcfXKlbfosGJDA/VyMXI/k++qTTn+5Bu6VEltZRs3VFSAWNArZOIUVh1sz9/4ZpFYNLjnz8 +J5/c6/hRWOs3VxXgVrbpb/PjaQUup6Pw8o8euz2TGd3P74OD6nlAnKR4loPNcNENpyliArBsjTs6 +WTe2ByOhAxnAYMCcJBDDOts+7Q8F5WFXwCeY0yteh9IM2V2IjOu89IBPnNgH6PjVthbxMPwQHGlV +5i2Ljp4/9R9fvxsMPncw0RQ7UCqaU8ogULQ60XpL1Qddtlva2pPY2EIG+O8egtgHGLnjR97sKI7y +2CiN7mmBdJ/IP5DZrclwK24+fvMYdG3Q8OYBmotvpgcW4E6hu20DPfGY1QUKouS/ly28f6aa/VQT +NLhKEdY53hUTpGb6F6wCBX6Z7iyKzsGCHrIcU7DIWcI5yM99jYpo6RBRzjaHwocGc13LezKPd2xl +xi279XXlZzUerqX+h2C+qeIykNsLhFgaYSUUV0dKecOLXDeiB+VDQxhiYvZP1OT5fBeTm5QLiOYX +HtUKVgmiskoA9eqtq6pqvtnQk9gvKXjFqxqyYxCdIoDi0DX0YnjuhlQIT9LBEwmUEbnMidzHfjkX +LSdXzmHYMcuI7GHY2+q/NzGraraaxQsHeikcKCaC65F+oiIsaTDi9iewucwvOr0mVOsTXIPqwIMU +8mYe1A2IAk4t2DuzfgVy9/DPqf8cQaFdcNlHZ18d1+7MC7gRIpDr86mJ51VaY9I2n5v/UxQRqSNv +uPOC0xgO2iRJ+xFohPWcPLPMIhLrP/VD9ubzGR6yGDsZsgzSirdk1k3YlAYaWeALZM7p77JIDteL +6/Vfqpxqdpk8IwLaIX+p2JGX/p14EKsUZw5Y1RacTf3vTO/8rJdDqIUWJbnkR4ex/Jutkl6Wg69L +vj+2IeHVLD94+hC40oejXkvgs6m1OOdBIe4ZIP+Im0SLXkYLzsXQWaPo4fVEJBDvJwJYR0pDaJJP +LnN68FnK5r4sI/UwCm2RSThefOHr8O1h2uR8m3C3mTnlvLTaUjuuX5lxvpaqKYEEtP3BhXs6AAXi +O7E6tbf/a/K/IyZ/MhX+kHTWYJtcgH2kbHzZ91fBKQe6WT8KEUbDtcS+JKYjkgTkTgMZ8/ZqV6Oq +k2+fOU161BrYwUVoYxZ18yRFy4LAdsxKknrB4A6LPU6Nw3usUvOlx2bGRxg0kdRPacqof4Cj8ASI +8JpsyCEzp302c6gwzet4+PWPyjxWUifS/+FFV+mysJFa1ZtCpRWkGKa1EvwHT/WZsAeNCv5AxUmY +eSYPB1nrPH4OIfZCYh/yOKKgVtDa9JLtm4/6WsjiYIgnNXb7SwVXD7YrEU4P1KfrN4GvClXZD+f3 +21WBZ/RMqT8W7RQartYZKyWzsOjY3U+ZYoUbJ2D05cNGtEtvBGoEAx+KZfzv3KXQMyh2uyDFLGLD +mR4GK5f23wgaU9sde97PXDBMVyCgn8HFIva2gSFWE5/wQ9ThvD1l5qvvEpkQt8O+wMsCza3TY3qg +f/GBVhW4oENLC7YyP1OshANBfqIt8pE+RQGSmbHfRSoezqtSeNWN49TUQMG6ZM2LBmm1v9kCzraC ++tvckJP3oJWt8ixU/hjgUOJ8ptXbmb2lV6ZxrRluA5ZKSRgF5YOd5DJzgVkwk7cGa6ore2KBqy4P +ss+Ptu/VhzHHFPXVS3JADemhMfWiPWwVFtdyhwr+NV280bmbg/ouLFnP3Y3O8y5j5MaQC46AxvXO +93im6rG6s3Q97hAVDxxb9OV9L6RPy60wUT4M0pj1qt8dU0aN/wE2j0mTVv7jC12ada628MbKEv70 +BxZsVnmSLcmz1izPCsF9Ja2QNCfqhj0ns18OPe3mNknBjZApB48mkXsxbWPshF3TiJay0Bp8kvGg +igGPefqIN62Zf/iQ2oC2Lk7jeUEkB3Mjrr4MaBjGTeFI/p3Uii4I4jfYAzV/0ZfoZUo/etoPWx6Q +rErZr0EHL/lW7DiVQvr9M0yaYs48bbwQ8bopmTus+4jZl+lEE02NPHBlLIL75SPKkLr/C1uZHPHL +tScdi7ARlIWMXQtkjDxMOahDOlmqJrKfJoMO3aPtQKj9KFaV5JhesoUoO2T0M8uzUR4u9Qzlzuf1 +pqnWV+PnUKrj58De+A8WH665QN3N2hQ9hr7FJsNERGOoGwB4MEqHntG+rmlDNgim31uNDXHRQ7y6 +JJOUkguZHQm5CF8gg0kYhPUJFBVI+MVsx0IbfUX8CurSl0ozHxHupCj2lTgR9RUwwSlQAGhzh4cI +I42x4qqrTg0neGavqWJ6pPEY9PnXpEUFR9zhHpIb79S/9mLOtOT71Rfs9p1vgFhL6mog55uoZT8r +wHhDrc1yDFJ2WbFJBk2vd2f5dQO6O/c3kbQi5MYPT+TrtSsVrqWBxFEdcArB2fPY9mqo7OasIzE/ +SJMsWnrQg0oqqdvRDQ6sF2BdP4j3eqP72L9WH4D9opw+joplGFyrDQgdi7OWBl+O2s8B29K2w18U +VY9CkcldypOyO/GxL5PF/XdfoGl+WHDUzxd2ziKhyO00wzCITjBrsdfx05YT5Wv0Hmv02i/Fy7nn +3X+kKK93yPzKU6s66CwHJTA601jDHoBBYkgeiZ5CDxI6C0JrpH7yx726QJVYsvscBVXlkLeJgODY +fq+doKrew6rjNEzS6IEziQjq85qtKU4McheTUpVX1sSpdVs1YxvzzO3NrRdtPOT6b8zGUnwG0fWe +wvBH1tASqNEtLmziElb9O8bo7PLnieh72hci4XLzIJV7VYCmt8ZmL2JeGYvjDP5GK0mxLShCb59H ++rM4llMddNJGTBQRK8WpAY2XiUchLgjLKLsyxtkTd8Kae2ImbGBUekOap3Jz8Q8+LN5UfVGQXTUv +Irf2aYqZULDXKkvVOcPvQfxUDJwWWsJg/xACU6JgcUzSIP3qpgGp5zO6Usd35rkweYyrbzB929BS +tFpfyZoOuBjfInCqOL2wAWIN0n6fCOs9K4q8Esc+PC0xvxX01OhBsr1FxQ4F1hjunaEb9NzhWaCL +TESpM6/P1fVhw9ZPLfXCtuw/1y3oaz3yOg09pvxxtsqH9aGVCVm2d7tCT1JmoOvKVG6JnCgRd8Ao +8WpPK77CH/Yy1OvoZuBX9fghzUxNm8QmR5viviYjmGmK0uCxpvUDCPO4NFzOZQL8MqrNihw16fJ/ +tVLJepx8pHK5e4FHjdalX2HHw1F5nUP6rcOWXkiLB9ocE3YoT8dIylsOqR/S/Y9EPboclnYbBllG +S6UxpWQyX2JKTqR5UxX+MHNefpvUpPLyDb13h/htbYt4jEgelw9/Duz9bxnYVTYn2/GDmNGD8koB +Qxs/kiGiBrWkQrSK/nWDP0i2mcnOzngRgZbKwdI1tq8exDBAyZ5Mx4n3ieowAMmBmJTJsFIt2tF5 +VsqMu7/dO7l6C/1UOfrGP2r77UhxIQKL6ZACS6JgfFuA0ZMdXOwpr25S9ewO+bvtTGe4ITd3+xkn +7j+KsnnIbcaX5wEFfXBmFS0Ctj/cmCNkV2Nfpr34OVo6ZgVDSXW8voYKZpFeqp7r6HILfNLNu0Rd +EAWvkAMTUKnbYjOWlIoui9YaDGId7qI/biD53/W+vxVn123/MgX+7ociLEXGkT5+8ns4xgDx5+iH +wJhjeA876grgtDaHJ5F+5+Ag9Dl6GnafKmaAKZcV3zpJom1kKqPnvCTVIJKGHsPkJTW4DQOYP/5S +gzwFXB7FT++uWLe5GZC0KcskyGad6YeXDNi0uPvpI2WLIrBMa1+lA2maVjaNjr2OoNa0dONxc5OK +jsGOfXmyAEbrO/qT/kEm1ztDAPQ0fhJ4ie6NueCzOvnR9YC7lM0xa0WW06i988u3jdXj/eGxNx/R +qR7rBitYMJgAYG6EUV4UWMKWHNl/4Bl5neiC4lNMYmcdtwvX3PYfOrQ5r+HO/IzhmQu2chGmsxlz +WO64HrZjcQWVQhQR0vs8vNjQGHyvpeNxOc5/1LHz+agqKGB0yoCK5gMRkJgpSpS1CbvAJ8mdLRZ3 +FIiMWKBWXk+mFNJ9FXd2Iz0vNrXd9d9lCXl41hubmJp42eqsSOmzCFt4q+vrrs2wmC457f7QEfAj +AUOpv7YLi0UuCnZluCwwEIVp8fCYPr3tqnSnGC0b+XiGiAJSjPQeazu+1LOGnL+70LC0he5TLRH/ +hdwSdWeUa0HJ7q9fEMWhgzJ8RwkjWqpiUn1kiZJ9mvxpGdxDkyfIt/0PrXGJJYEEyRPwl+MgRf64 +wBJJTYILpmkYKyofzoMRptBBY4piPPf1/FRxAKBV4Giq1F7E9pn3cuCI4dB4Aq6o8n+IdZAf0S0i +S3E5dfyIg1wfH+J3IX2a6JMZATtCMqJC0ngH12k+7TszJcaoPplADsk2Rso/1noIcSJ1KNbe1ent +R/OfSOVP4E/YnQKMavw0d8g/hNaarJCqAoYo9rTl41lmErRFB3L8Szd6/QMjvo9WUNYt23lM6AOO +5EibRHegWkEkXLgmstb9/oBKPXM52ko+ZY88Malmi3E7rCIDw5NIM969vigVBgwsWGgdyeh6lNlh +cKdJ5sF5oo/qPFXvZRRCSoAifT4JtD9Vcq4mNojOvBT1fV3TUTOIN6Vj0CfZIBdx+nggcuTGYFdJ +gg5WmiiDMAn6dIq7Ch4zp5BRU2tTcFQPJoP8R806pyFwjh4Vm05w4gsd4RZ2a9o65064NPCRi8Pa +oG604+AacJo7vk/qOUpH8qdOpfn9Nxxh2cQfDw+DVYERvAJGfLGUUbLms93UP5Fy8FJpX00eK654 +FkHH6qxxJYbSey9PXV6Q/X0q02syb73MFWpZAeMEgsfdami1DXPzVwsfqVxdoFoSkUzo0rxpmCZ9 +t/b47vfeq9gpKzi0jGxMwSYyyPr1qB7gwGOtPB2LYoj7ZIbQIMw92E1SSaKT7Tv6fz0PCNECRwFX +SfOrijiyOpABLEFJbThDT25jbey/9E1L8vLl1XFnJ2dUXhE9HKH8i1YqQpNkIWZyt0rf7t0cNMKd +z5YGKbJBjj1NjY4OuPVNZjz5Kw/uyaas2lvtbk58q94tXEdt+6cid8fhauAiGvCTk+TFmxHWuGnE +s0PQ26VpTgEOJX4IZCbdbQ4LD2hFXK+JOGoxPHbsBRWZQoqPY/mvIfilFq3tpZgSAgEkQg/WxCs0 +Y0yo4yh2E3TA6y9mSqFGQkdtjVtQqmisdZlxstR6vLQW4FTSEmPKx+nB+TadOK/1rQDQlipmQ1Lb +NKB3WG6NBwlIUQTYy9ARZ9r1QF/MRpGjt20WyMChRzGScKO3LzelPOBsdx1FGTmrXXZkrM+BzF5n +h8VtdZzf+EWzpMR99RwZDqOAbR+QhaIM6PwQDKGmp0xU9BrSsf5FvCMvjd9A9eERa4IM30q1urCW +PQYDkrIq2Hn3otSvCLAB52xJ5PoErUd2n9qnwrxl4R0ACxgIsfo5cUR13lxTh8ZCf+RceHImJUi3 +F6EZ405OT/56/rOM1cttYuh9qxA+v8M32RXaGN4/54y2T3bjmRFHNEjO9J0IzeWmfCMdKa5zV8q4 +NJKxXOAI/bItc817HirbuuFb4RBSQHS0gPUbkPHPaoXyd3gnaonv3H+opS+9ssRM59TlUGLA9CDd +AwAipNhibcAJytGLogPWl3ABsd/ttaQ7Ml8jUAFqdOgukKjcQvY/yFo5f0EuvRGvJO9nFeet3F8F +uwtGXUukjqbcVpOBKnqSSf0IKf3S2fIWQsH3QrUgI7n6ucVDPIAsVPW+SXqqyM3/+lAW9xY+6Lge +DXmyzZGXCMtj4tUQ/sB3aNe3RuhvZF6kTIcPUAMpvi7CPWZjonxW299QH5pXn7CF3a7RaYDsjgvS +q6qAYp6Pt9JjF8bLgPEEL5GGdgioqSVqIzMGlRtyGeTTP05nHab3vmPYY/NlWpDq2QACxyaYfyll +2GxwV2ZU/zZfR9wp9Bzn7LA+67Rt30CzFjEgOFFaUSeicYHNM64dtPb9klx1l6JO6+GUYUFoMW7E +/a1wPG6aeIyrTXgyKIQ9XSYKDWWokLOHZbTN7hLyuaEq0bJFsQ2bbFwFue4T7UrBpbdwe4G2QuDV +dqqnvjv+gxJYippFiX+jusQRx9qWNwBR3qNraiVrX0X9KHxU7xClg9CEw5AfG5OesWrwA/k5+u36 +RkZhhu4bZv7l80o6nmE8MEuP+iYSB4ugnJ/3qMkxhSptMg/UcyX3+fZ0u3OThj82khk0TVZCvP/x +JzIKO9CSKp8WzCqwOrjF1u/XLyJ0c2G7BNR9To1VS0vUhc0CIVGask9mWhA3fkPO1kIGnVm6rsG4 +xNA4RGxgzht+1gPROnswP6/ApqpBag4Yl9szBtTzWEM48ZwFey7LodDsl2H9DOXH1kZ7AxsJCTZ+ +2mXKOacH9I+q6mYPU+vfQDE7X1hrv6PTjk7z7laOLaMss32MbHqWDeDsFAxcII4KGHWZUn59kBBp +5L5t8/5tLdpVrUkudQUoH8IRjR6belXSq4RHpw/Zotyimb1X8feDZI3XQKWn1W+PXrlqqWWQ+r87 +Kqa7Q252EPyq11snyfbZS+RcgCs3nZ0eRoAESn9ZzQy69NsgHjSngsgF/KrT8kLDLNxpLR5YSQa6 +4gm4op3Mq3/ezbu4A6XKEvLm/ZZ2XP948rsIkQfShDPGcAVsRYVtW0PuM+od1yxFxoOfBpcaMDFY +Q80kjGir/Zqqka2OZJK8i4bIKmeEHaQhG6KLEpqIzjvXj9Y3a//kVtqvXF9CbGELYdQPv3j50Eif +0PlwPpVeo4VEpI3WN4MY+qxAVssX/NE2YplSIF3S1a3AZeZBKH6gZ4Tzhnvo+pI7C2P2QKxby0cG +pVTUpnjwtGLi9tLLbVstIDkOH3HNVJitkXNZ5ITGspTik5/d6S+Ul0bBo52R158w/vQoP2E33iTb +DVYbmwy/ZxeIJT5PSdmYb7IaHJdUo0LmLo0RmnTLGqHLFlEO7cm3OSb5J7ISh3lze5K/c5LEetKN +6PbKWFfojx+0JHBifPrA9ac8vRdXqDCimhAvjO5O+uAOggq5c4UIEAa5KXM8ZRdJVbgBONTy1x+Z +BokQyVVLaFm5lKv5LmqwXjidjK5Ic7r6v5eoLDiA8Lu93/IKqWU9HMbX6g1llgndBBLnbrC28Ddh +FgIsMOfuFIiUuc0je6zgXnrmyEfLr0Ax7/6X9edZcKQoF1VzFmv9GxbAu5fAs6U6dDc3roGOvcDX +of71owacErT/7KoLai0kB0/sTa8FRiO+BpXdlB90FAYD0dB2AVXxj1gVZpwXEGSIJtcAcUAskhyL +a+YdBphzWScs0TvMidlFuojPDiATqcQsDNngpLPMNoU9fSWOUjGNUg1DDDI9vhE5LQd+Cb5pPyi3 +592cwbNHkt/yE/5ZqmTA22SNp+PqR6/eC93Z0I0wbNgTqRonBpmXie3y54KTcLCWLvYkUrjtNawz +a6sicFJ25Lc+qgrVNwBdY9tntzfMMGNjL6s2U1MASYMh5BO6tW2iOAV/OlT9fBrzTjI3AKb46RVd +zfBYL3i2QPpNFgJWkhzx0M+ZgSigr6IqaVdgepP3f2AEyF20YOqC94jHumYfoaVCeQmUM3psq/+J ++qrCOy5canslrnXWm0rmazmJukFRW57YigTQfAxNTJmV9mv+7MffkE9etF8RAe5UOD6GhWO8xSA+ +nemZ9qWDvDSN/LhoED9JWaUR/CM1P+dtR+2lpxMZOuptWqNSJz3BUnxDBxFTbJL5SWDHoF4z1aN0 +vcK1jBFH0hBixGk4J2C4QnhCbopnOi5r58Xz4PoX7PezSvd1HdV0f5ixz9yLTvscMmQ81rZhGZ6R ++JSjJ6lMR9kj5v5QcvZ77t3XV2sKgKmgGslN/abfjEt1B2pxylGR8PuAR9VnWMDY7vM70vIXkuzH +mtMTImSb+kSzWmAWUg2z5dPx3Ng2rfDtFXtTa4rMBmUBgSktHHpeNyWMAQJgBrXYb9bLXKoc5XRA +IJdHNm3PrhmrEPqjsHIHL7QCrbttv9TtN8gIBkrLm6twavPKHkxz9juDxFC2flGr/j8AOEvRFYdB +KrrwZRQjjMUlAYVMDCiQ4dWiPusUFDmZNp0KpjrwRj3vuOZqFXmmcy3KkEOZ1GwkNUvKIYnMNgAS +VlxtR3VbXBgYDSPpn1umDRjEXD47PvyBrJuBv4OoSuqzLCcwx++nZXi4TvC5benR8W5npHWENhEV +1rxy8VZOTrOP3JS7Mh393GaFg1th7lucO7BSx/sU7+L0JEOqWAYXUWct0qtKidKF6esFCnJaLfrV +9W8v1PqpPtXxdHBNau7VtapAB3cBSkf7OJLuQzfPIr1oIEp/HZ0H1GPTr8shoBVn5jBg5ouUMPv5 +mMSqMZ/vbCpWf38iOauB8GftlOoUcQNOq+gSQn7keZPPYAik+1iEyqgcOlQiO/EGC811I0Qklt4Z +OOWapJw97KexH1OpLbMJPzqnm47C2eDUiJEzvIGGu7ZuMzlDQktG6W+bIq5Fk8cviPO4wX1P7IFO +C65GIqeOwBt/KO21JWIv7wYzx8bdMwxKcq8GAdYKQG4/te/iD8y2WeB7IykM7Ea07hJ/iM/PrWkU +zDZTp17EJFDyzDNyZBChhQZpeessXXmySB/rPgO1COoO+gdUvQz1g0aQ7ETkZ470/3TI2XlovORi +ilPIyLYU7Mb8lPGMgYKTnIDvytjdLGcdmbO4JbJlW0uLyk2tWQ1dI8PArzHjZdQEsfD9EzksYFmf +JBmeYSV7U0fhXiax24PzLYoOv3ZWs79Cb8tAK77q81YiPddLxH0458PzE7FgEmgIgmjRhuIDVBh6 +KZI0e6ZfQUgRzeMOH+Frmy0//4Iq1bQISObmIg2c5YbC3cgL2NnwFX6miwup3iVphgiiGNla1iZs +gitCtJ7Ffr3B1mzrA+SLMybp5ghIDMLlZJOlYfDvsFks7f+RDslkfmoFtNXSjc6a7fzMoV1kfoum +v9pitIhOSxM9fqtMSVl5YC7xfDdIGRXvEgrbATlyJdBbkQGeJXs3R68//544Df16xkKnlEITyNC1 +7b2Ly10cL2QxrPm75HGuwxxqrcovlSshIY9bypBVkEwCzpPjpSDntah8XA6ZifGQlX5PHJ7qB6W2 +DhxeTBQzh6fcBs8ceBbaix4q8hinIYODQN2rMNn7JmnnGyoUH7SLf/dOGatjjElOiV0zrGte2DRo +OUdA+757Ig+9pVcaTkH1X0RIfz6cBvzObWCIh79p2DPa/VtRib/pihw0/twDHcMNgWmZ8Mzm6ar2 +1dVA0Vvq7g/JhqBzZ8KjALelAkB/0g2096MXrTs22cKeTheEp04HBVhqoUDBEG/QMgbVpLwnNVeY +Kmb3YwffSMphCA1HS4dLCPAq/kTaMbduRfJXMf4hQpvi+h+9TL3UVRrr1w8RQ30KGReoknxKSUoA +W9lbGBWxvats1fkQ8T3OpXldZ87EIl3431/QrfeZCnGoYIlIxTFieslO6nx7b9MT/ICsCfGQGRQ3 +4CXuoogJHSE2iq4gzAMQX55psHopICRVO6DnOiob6LF8xhnNid0RFEMsX/G36BUd5cOh335j/dg2 +hE6HK0cx54eqgEP7ppvQLaFpkjHAJ3+zMkSp1z/JB4jLoTkfqRvn0XxJnr1UnXywF/u81paveUIi +3Tm3gKLKN7MCFA1SxjlQuTaUQtYmFhZnU25sJYlfIc+wQO1adVwdeh3QbggkTVJsAjCJiQ4CKtcR +k79XK9EkNpteelfRIfZ+mrBnCCKmQ8OE1jFmW6Zh+zACrdcvkt5X+KXXPCNymOvFl1+5DLsWhyF+ +RaZqIbzo6qQ5Z4ME9+J5j+OGD9G+X4iTSUQ+bs7bFjJqs8+cHdG/110y24RCFatAaczfheHH4Ms4 +oQNQx7UMQQmommuaLWRnZC4FBxhKHZeHEObllpYXddFfBjQvFRRYnI4RUWuHl5nWjDNEIJz2kAES +C8A5lMUKWl318/vYozjhmRd5J5rlPUtp6g6lXJYebzhhmm78yCSfiQPBh7B/MWWxuBzoKdUV2m3C +2ITwtDcP5osrEAoUXrvOMvZ7nVZgLh5so1JpSYQUBoxk310J+XM5fEqrD5fxm4m2Jb9EKAI8+PPa +R9p1TTeDDZQVxBL7zCsNUL9pyZB+KWdmqS1fkvgZE8V2+zSSG86o/RkU9OEc33mC0ezhwZbxYWpB +5LkbUFyw5pZXQFM5FcGnFtmgFCH8SIJgNZda2kBwbZMvm56rLj5jx2BnsGadRQCnmbjyLBMXkclp +AgSFdtiLyyJJQkdytgEySy+Sh2o6XJb819PSG4DQAsHMrbcZHTshr+dW9XoFZxMW2stZRZumxRbP +e5EUupvu9NbQ7om5pJl4NVFIvP3ky5KiHTny15woHcXvxLiLlAydpZEu7mQTMr7mRmcfRYGJmgLY +Rip4GihfPeLjm/m13S+CmztjgB6y08rwsJKtTbLC2CvS9QNejjWNizgsBMpKsDAhchGOz7IysNsA +yz7Tz9A7Q3EQi4O1LCDzSTlB/5/ezhrUFeHIzBhO6yeYxueB7Ymfm9ZZGbA9J/3MwBI3bnnJ15mU +QE5kmGBmma0hURAnWL1sI/TepLZLBr+hlfRMxxlxBAmkRlHUFl4PLLYqRHAcxETtCTRBE2dCPYf3 +HSdqZ+QiM+X9GeqKcyXQOfF22HoQq4aN/kRf99tXJHlNsAYJNVFqhUiPpyofBsAAYWev727bf9IJ +zooYo+vkGFX0ItmR52YG2oxxSLh1rG9dK8sxOqbxHfekdCydh/YL4TDVwXn0PLul4teuM8qVb/sB +ODiSejz0Jscw2leCyCx2MPDmKeD/2pNI2e15uGUaKupv8FldNEIjAOdq8iWNitfr4BB4DXPD43IG +LKF9GMTRJpbJPCeruynBL4yhCOc0MZMjgp61jEoS82FPwjzbL3Ueva4w571mPv3C+2vMstmQBYGL ++HEMjqciCo1XABYlLNYa88gPh6WDHNFm3g+cd1df9DamBo/CtE1M1GYaGSUtlaHMEtHrejcnCFfG +Th+FAeMofHnVWRKfmAa254jdmkeQFKkglpfde8XXGoC9DECQMXhtI0Nkc2CmT+LznFCTwcivQXK9 +cVHG8TciKHvBHs2flq5+TTmB5zAvOUsJLeLUpa6An+7dUYSMI6AwD+Y+GLE5W1lDcWun0IB9inxE +8adkh6+kimx/DUD0SzQOEvVYQvxnnk3mr/kF6dkF0UGSKuxOJtwaHzARC49eQVyaABAfAdNXv82/ +Vp5u+zquILmqx4J8nCz6XHqoWBv6MdiosYWTSB1ZXbvAJ7UEgSiftYNl6rFIUF1v1rVMkJk/AQTo +feK8kklkK1pCPncx/Yog6pV/kciA9iJMwa6/UOjaxawBvksnUJKMCihszXXOu7LpZ2kB73HEeq0j +os7M5ZBE9a50/t7v7T91fYg5fHqFxBfIDm44kHCyYvppPDliPl8rdpjSqLQI7gPrY1J3EWxEmTrn +oWDlLYBB12TClrOLl+3LOZ0BN9QxEB0FVIuGnVmRgY7JFPmBvpfaHajb1UcLwG72CfjwNsXcjmjk +nkBdnLhKA2k7o7xj2W6Jv6cCXdlR3AAwp3Hy8ZjDuS55PqP8Q/BLvczM87tYU58t3GoVxZe35vNC +UMjzCQ1eO9GnRMsaV7WdrkXXThfIakZCSvYB0tnKvo2rnWRjJDVI/3I1R8laNn8wHD/DHQ2o7931 +NHiPa7CxpdZlI8JrQUC2ln8LzS9awk0IBpAvTNnNVActraejyGl3fYb3ysE9JN6uTCbSPuOdMCau +4PB3V1Ni+X4GlaKYWwYo6jaFgSJEEdGE6G6dwGtRWp0lQZS75rz/jby2b4+06G5Jrvbay/cQRNMR +jeI6xhJf0JvqQ+3qyMeBt1KYM5L36PYTyO5IKHAZMZcIjUlcyb2vBh0hO+JBer6yUF6b0gfq6+CU +MgdwTMi9CST6Ygs6+dkgzzSMmLyXFbfosZlfZKUZeP4XYlDNG5q8MgH9+Ori7HkekJkqpulAZ8Ni +HC98ajqD5/sXT1HcVj9UNtNbEIamBjmYun18cHF53wO6UUIiecbt3DrtABnJpnjyyaBzaNx5IVQp +J/UG9PlvcEDZuKj5q4KLnUIxzf1XpnjjeRQViGZ95sQWq0rB3CAvMbPLWfEBZi3DEUMIY7Gw30K7 +YRmhrqXeUnhzeYDiVxtDxMVc7EQd6Z9SH9m4/fBweNJdvGokY/Yrg8eA4eQuh1oUtVRzHTWB6Lsx +BTpLQd0GqBmO7eqw4XhJ+KmQIaK1gjFCKKIpuZGCL5codgE5ZsXWNuBs5yjHklX/t0oPXhC2cZmK +SwMUYJDAXPOczpHw/wuUTW8FGXb76GvTMYzaFGwn+P4RZSy4l0iFRkkPkfR8sm9LPKBSKIjr2iH9 +i6A20SngltiMXHDM7pGMpJC5bjrrvWTPzW1CWi3j7R0CF5629Up8IYhCxvF3tuJ0mcl1BKg1ldfH +DymhXuLEAj6enM3IF5+qE6pTF4nDgNf+z7W/xenle1tOXHOfudG2aR6HD2wTtVOIweU3FkZpOAXe +EMGlX42Xd10TKX2/UGJwpBArfIToIYtnAkm7VS9E8ZKrtVaiINUSYuAsykoGhpQmDam970JwBNJH +hRIyOByhaxGDuZP9SxL6d6WuB0LSrH5SDFKvmSKDKi334vvDuLorAI2ZoPzfj8FRQxEpo0bfJW1l +FCKYi0wvkS10LWw578A6zD4dYAzVI9L3jiWfqM+1ztWh0Hbb2kjTqcVEgomAoMwirfw9qh5cu7VK +It6cSw3Z2j3GLP4whXIH0nj0H7TRtBAooCgV5Zaw947KKTpq1F/HC/9XfvQ0V8CvdO2ciLEJFP5/ +jOa3o4sXQ2HLqaN/iCG7j2fe/IvEbqQQozkho6lSLz9FWvHIGM3W3ocB5tf1VwxkTK8zIfNaqrfl +BIuCu1l5QGwzNrK2bfCUXE+w6hRIBR/VGb4Fejg2gTWzh2jdGYW5qCj1OrzwVz3BIWoVt6M2+ecf +fXDQ2JEMXlQsN++JhhYbqx1U00kSSzJeQAB5eW47CNKqMY28JLNSzTETxeSi3RRySU4aBxM4hHRz +cNpXvbBrv0uwyb8Om8uEnxPtp0rZu7TMLAzrMWlgaYCM0uNlhPkbpIOZjaYXiiJqhy9/trhn6gMf +WlrqkCD2zMDc1EYOpi66h8/H9dCpM6zULP5/fuX4TZZNcMgaS65pTcQDUqh757cAgenm2i4XG2zj +OQGKZvC+Ga30oZBKPO3Lf85vIR/vwrPdFDpSLZVh/HlYt//VXOUW4YdizSeMlhYONqneNcDn6b7F +5GoSE3dW+JZhzyyyKZFQl6VhSAAN0zR9PRBFOR+g2x+0tcOCC3Z9ZEgoKvSKA0qNK03yZqM/i/vs +b39X/Oln4nw1A5TThJdhm7feyY/Hax/P6fs5oK3Gi4Dgh8bnBTuO48uYs3QwsrvEtSb1BRgCo0H7 +143HMNyR0Omidz5qlcgSDoVCL3fKfHzM20pjvkw3mKhFJ2/vHf4AmMxTyLo9pOOUgla99l+e5UVI +8dZFiaGOrqWjiSKWEK03zScn1L/jUpoBO/AzPa9s6GOTKfjW6ULJ1xQBVhAOIo4Cdgg6aLXHMm2L +ZrIsJKcgZ4E2mV0Lox1BvYAPYCC/CnLh5+L5pEgevOWzmF8Ph7nEXVbBumvYxhOjztGXA+InNWVn +oF0tsH2LZ352Mzkl4jEeFmTQguvsp1gaWcEhspGxVirNdpeSJiySEuQ/6fji14WYgB9H0rKJ+tsr +PhSV5FfV5BBMAnAraTnu1AfnVYwy5G3gMx605RP3X2u9NjwuF1wroY11oQR2uAd5GU+qSIHFrk/0 +byBrQtk7CSqH9S33WcK2dsiom3Ep7DeJLB0rtI0Wc2fmg5z4gOU1FcVQU5d2IRNJPuNWivks8RmK +SugEFzfSRB0FVuVMjyn8L3akgJC3s+Q8PFOOnR0ZolrjoSCZpLbDgPgZ6U/Su6DldPo7ZA+BUTTi +TkbWUbqeIbRejsmT0RS/htxIHizScGXT1Xk6roDnj8i5tgCYitcy0mgelOiVj1eHxYXfjuWkqQvs +k7F0qsb7MfQvTV+UmMXyuNH3GPSOEcZNG6O6kqq9/sHnQ6iC7oSPvBrZBfHC8sLzlzFcAK/41uvV +MGckkh4yf8ReLGYkWNcfnDoxsF7m7AMeuhknQKn+Qi2VZ3fC9euymP6tFbIDlbEATlZhSov0f7td +5HeryxmyZFcwlq/X8IVQwYxzr7h/ZB5QH0ZmoiuLUXWfI12hOypMnvqM6mnny9UST9epP8yDh4JM +Y+6QpHZ2jOBVxOmxYSLGCJsaOXu/z59Av3GnWrSe+qUtyALpUayzAkeUKZ0MHpL7PS8SdjlS9HDR +loCho4I4zTlsr08qqxa07XtL9aoxtijzGZ7RLFKDoZACGC1oLSXCuTvHozcn4vuYyzJb4cXdgcPO +mu8DhjuYTDqEYSHmE1t6nKgUVTt5uee6dVJ4Qj2ICiCGxuqddnQov/1Wgf5wFSt1AWF4PuSlYiFf +pKfmIg3LEssEp/17hvi19Rg4KCUbHKl48xNoQU9GzUxLcCqG9AUJmSDovQC/MejY/PIQGZNCHvmA +bd79rXgppatp/vIF1jnSVas5+QDeqMu9uwFgVWRu8dtFSijXNfrRa7Ib17WX9lRJv2dcEn+6fFD1 +W1v0pVW0HuZiJRl2R+IcDVkrQZfHfO8pdrvFZF18k5UcMSt2a/O3zVWBptk+Uj+MpgI8uohF3hAm +FSwxs/vw0DxpkiYnSmnkbASzFQkSxiyYXdQG8Mpoyf/D/xkYyUBV78dw4Gq1GIGBZl5OdDRX3TZh +L4ENYYB/ds4M8aVjCS9uA4wMws+Zkxhj7ocYilhhG+siSqPO9qQfcZ0b+JIyWAO1wjLSNHG0cyBA +DNFV5MGzXMkimto7Qyf5tDhCOwvNDDolfLT/08p2TfaANY+bSaqMAW2T8D6rT3aQpsLGE259xh26 +m82RbaXa9M9/+tUME0nMtpF8pEHKWJHzbWDqtLjv93bH9RFoMgEUS9FgI4l6FloXGcBQ+kfvVu/u +74itIMQiDDrotCPs4AtkfkfupaT/DEzaLXSR843q2w40SK+CwmHQhbFzDwuNcXcnZw2B13elMNHd +YrW3G7aSLod5xZCxHpWyM5xZmZBonfrlkq8zJpQx7xbsXptIRW5TvtyDt5XM6/gEPGLndq4KITID +YoalkaGfmMo6meFQQtubHs5qQBMXyhblSaPpmoWv44bRyBGapMPvT1x6u17JRAiqshv3a1MGMOnR +OpFDIKJy6fLr5V+9G+Kve0UYg7KW/nBtOQJTZTmqy/y6deyou1pI936hRJ8daejhKexKGyGjLDOp +VBvbA62W2sXQnGY0fhVpKlH2AFOOSmsdQNGsjp1mARrGZ/P6Js1c1ZpsXmUKp7LPsin5AmYH+u6I +wWJ9M0SN73XHqTA/GvQzZqkdfWSGIc7mGtdcbQZ8HBJGDndy4n7gVYZfN4M7YZTHjURE45om0PIa +v965lS22SKR+ISMR+j8LJ8/+xgND4Ivl+urbICSVqGlr7K1uovk8RMxC6mpS+PxkpcLMq6W5eRvZ +RSJUPllTbT9LbBxPb+S0f4B1vV5jgxB3YJcx34gcSoTJY9vslJRW6UHJsG8Xnw1t0QxnSJvjEGnp +qfgDiZEYm5q4CgE7gRDAbSg5sKXuoBK/cagXuG75U2FNf0t25evq1xdjhzRZOCT6Oqo/wMP2ZHuN +zUh6x4hRIoUfpyTWD43O6yFiyNh9I0RGAZSPsCCuyHeE9PIihhyDQrikVvRwewOgX8GoKoMZKmt9 +CgvM3nwbikm8KCFCAa+Kgr2gTp8ON5r0nxsICjImDqk9LwKw7R1RtF41PHQ65UHArSuIttLbjJ7t +gKjy2t5w2Mvn93o8EEQghsvItqc3hbwxZXjhKp0QTgaIvxf5eenKQhu0NeimBThBXtbWLgXVArwc +Bc+TKdd2avalSeFZ9na5P8QsdRF/vCPYH9OBKzYXEW7QAEtT84wu+jsgweaKPxkZBrEhHnU0fqMu +MqjEs/+CbcnW5KD6N/98sS7vfLwrBgLW9K24xqvlGKMIilPrBTRnYjhSgXbmESXYF+Wk00hZuqpl +Q0MkeSLqXJrVjdw8htUUMcSWv4rrWHdAXpk4k2XaoOJE/1GcD2JPC0KZ4ig8I92odMFtldmbGp9T +eLwJhfg3FGtLnj/KAIZC9x7zDpyvZh/TRMtZLh+SAlQm56BUyTaBlwCjiyT8TkeXrhaIguobVAFA +MAD+nguSx+UsqGINvIJfGI1pcOKKXHGlobm4UdhoHYBXggI8diUAxdKqxXhfKV5mnTebBLUnLHOf +ezhrcmFJcf+W671BC3c/EI+aww1AqVGiRNMxNVQp0y6scx0SlwCaqGBWPL4RWGus+aV89B6/LcWE +zVrF5KYaSLot7iHicpkjJTDzfzvXJnsJu7naXXoTfW4iUsMvF2p8M2wbRZzczhWUGvEzhfItNNly +tIs5q0AgGIEgMH2lzdKWRwOHNvbTbfCscaprI13yWn0U00K+lqYWXZeXHjGWLindFap4MYGKLdml +ubWAFk3bnELr9cx8q9/Plf9CJ3SoDsn2u2/XgwFqheWJlL1Ojlar+U6AjoC+TRq/CV9Mf7QW/LM9 +UlVtmMVt0VvCObYff5TT8zKzu/eE0WxTp+bNgb26sJk6kEMdz9+4mJZAiOFBNjfK8u1wSKMjV23R +ZP2CTpcX9ORB8LE0xCJgfUTLwMyCJ6dwLiWV4h5lPnxYW3RI7mrAWBYLNvH2BP8SC+kFeTM+CWd8 +WmUQSbuAyLn3qIxtKPIkpPvjf2lyVlBwjT3zfxTrSNUawDuFTy+1+Hs3Qu0JIp9+S/m6TeZgtG1J +Sm6iuUiwDTxEJcGnSNEAO0813SWVuARBvbGehfiQsPO9ug9BDhp44jMnHvYKpoZSOB0smNOza96r +FTvUNAic1+5aysDFHto8airKJznfa5n+W3tLh5aVUGxGlpATEGiUC+6BRwSi2u0NCZ2aYm0uLhJr +n1J5sl83YWqpV3dq8KEZkTb5PHpuCUEJI3AoYgRlXLf12L3JE3+BU5jHObp6VyQO9CzAfDZzUvDu +/utcinU5pc523bdYcBeJ3i3S+EEn5gO+uThh5DyQ6N9ohA5Binp8NH2Uc8pdCXGfx7EkMsUdDONo +GIlKWhGzw2EgYcOKcCbsmx8E9c+Z2QYAhyMBMp3By0WK3flzQ0ke/8BLCr6YtNg3x75W/SlTRNKO +e0KaSkDBNx59ns+COOVH+O/ESCOxvkJRKU6u465HwPh3rynE8pwl8WO+vToovmLtZTbH4xwIbZrJ +SutvZhBpFINd1iBUtj3b/FwLjmkCduqOjP7vVSvLpHLfnzZ0ByEa4tvLtuMC0Crw8kRcDHlIdUA7 +Dr8KmUavAguUvpSQm7EOUEDqJ0IN8AU8b4Fuh49hWubSX24X8ONvblj1mtcVOiLY9Q/20SHVCFV9 +TZX3N0sWrPH5T4rC+At636Gtkq8JEmFmIXqIizY4lr800eyIAAB714YD4MyLMbQTKs6TQCuomai+ +O5PS9dcAS1NoCCSoPEBihN6aycpl9jaqqH6ZnPtzzoaWVqQLbBB6k+6cdY5+icB/+Od6DUDtNnY0 +za426p4wkTlMYA6hk4u6YphFF/syTqFDQeQHNfLgWvdjgHnxZGAPkssYS5Pywu65FgehdIGOI0eE +lCrp2LVko8khboFilUXs6Yl1ajKn0Eveg9I5kXi/yRdS8WnTzOiYYL/XFt6k4xct+q/jgqwBvPAe +ar/dTIfYAK0dtqwT+GkqNZXaAiiafD1Qu3ysWKYD8oS4RASXBlrHKHLWrFlPzqFthE9bm850K6cJ +z/Eg82ZYYNAk+i0qpZ3J9lXka9Vb2bhi8GvY58Yq+ztitckJqSsIy2PSMae5pNNd7caFt0+YrBci +trcTu5u80sxtKxC2D80dmUjTdulewYR89kGMYjWulS06NknWaEqvKkYTmtrQhUiO7r8zhGf3z4yF +HRf/5Z6Qy/mpC7Ktt7no4PQXD7azcqZxe+qjhUabYArSyiXtKyKfMfy9da3jmDFfQ2f3RbzaFwvh +lY0MxBqVL+2bj/EUzgTZPv0+JW/Q6d7w1udBvbkZzDH7Mq7WaZgLC1BdL2IaawePSrdkWVYazN0a +Lqjuz9b4+JA81oQNk2nBiJhu5sZthD6kJzwNuMGKZ8wFV+q9MfMcmkv9SzmaBAdEAB0DOd6+ADsN +meVxhcwz0BjqFCf4RVgdirna9PyKgDfVJGOM3zaEMFTmc6LF0e5pgK5YxzoaT6mNeq67aJCGRkPh +Ng++vnvbStsWUSD+ZSGcY2J4Rs0PQjfeT8TOBnqZP5QpwjXr12TDro2QRPOpp75MrCdw8CurUy2C +Eh2Hu4oVhMSrk8gPPOfRdhg1j6w6TUYJUkSXf3cha0bBTHddMCYHXEa44aKI+J47iB9D9ZvTE3R2 +arh/Hvpc9u1GT3q0qY85AzsvZs0az39AXDND7h5fnSSUEHfCTL6zMD1q1bShX6eN9ipr9r0iRtNB +ECYU2QxrRnv5kE5aAIkXFFLVYYjX390SnpWb+qD8nPEWZnpu6QyBunKzOD9VIJWjAGNHCWmLO8ex +ZJRYz1ze2aAXaiJDlUT36mKbSdQ/daMQvbCaGXYhMLKFHjliRs5OTrpo3tsD24+HcL/Nu1JQHT2a +SF5Hr3dCoWEkPWrStVbuc0M4ZnVRl+2OTl6+MQe3Ko1zVXGMeE07kRO3kxqsIkwPLR8KNTaRTF47 +bOTAantf8xA0JZvQhbFud7db5Ct1xzLLgpuau9HiFSAYe+1uPr35AgSbVCdv2JkIP2b7kWeYwC3W +VDnLJyH/dtFBxyJYs4foLOUNvTRIoYZffH8XMZ1SAjO46h2tEpLniHLACU6lkj1Ncv378hSg6M+m +0FcMJWcvKiCEN2xQNTdviri0+zanmQNnXphBFQmdWE97tI3j72izhtv4xkFyZkDAd3mSkg9pSMSK +RaDjroD0Pl+Lc1ey8wgUA7q9lQ3zamh488GqbO+AS+mLXMc1KolsFs7RO13EzOiV+qYjYKOKXVJF +A2oRDlv7rQSw5g+zfbU8vbonkPE6LcP2nMBXqt67xnZf+jJupa56izOThxT3tJ0LhMZJaSCSx9eB +KyZTrvv6ZOjEFc6CIAYLjlWgV80vkh3ag0HPPUji5bJSqPmIZCTwFeZnsM7QGhW+9d5glrDnQMI5 +qd7g7QiTfpiMsPqVhcJZgaoroSOcWWovvPcvHMapcoz8xqH50MScoYwOkXggepREIOCch8zkqdDL +j/wmF5QYalc+yDiEDxrsUjG21BDkps8igzwTrZurp6mddg7CKfjm6SKL146PuK0L5qjffsB9SV4w +DXkIxOMPjs/X77YDdpyZcTagQBV/i8XsETGNYZ4ck/vjozKtebwzsNiM5yvKOSWxmXfvqv6WXje3 +3Qw6e68GP+TsJC9a6XH7pZHu0zgyqXdHNuM7kWpghxRC83hLbIlIG11QsDh4DHa3hPXV4JJPUkLg +ef04XHEDEoBte0Ybac1VBZcIYd/x2VpoPZOKZb+H8RtESmBjr3GqGpuei5/GOFi5OGrtQc3KKqSn +r9p8NEvtpx9umO0R+vSXxBBURGX1JZrNjsjSJvxO0gFtEh9YAZhqdMy6QVHwRUmvu68ge5RLYqfu +wg1mh7/hrLH/LP4jW4S2y2nc5K/Op7a+BTjS3ihX5Yccmvv0ByQEgg2LkG6sBxKHg+FdtleN9Mta +k2Tby4bJyr3QcZoffSF3kz3/GUODzFZjV+ySYNsmkea4emnY0kxFxoGQigYA8Pk1Z7R6G8ciick1 +Nb/AOP5L08/A1DraU/XgTcqDkDFXs8luxhbbdWXRS9g9dRK5f49nxT8Gls8xMZ4BRuPI439tc+ab +w8SzAuGzDASy1VhJKbpdo7bBeufOOTEdtt0jqF9lS9GUiWzinhzCUvOhXzyTZGgwn7dV5ymkga5S +anYWArjH3Jh0D+X9JZ6qXzAXXKG7Ihs8h4y3Sf8U/UuFH9aOwffNT6f01WIO/2QX4vbkPixC11HL +jZXZV/W6CXEwVdO8avPXAG4fwUMnNP0wnO5cyQZQ9BQ71xQJnwBi6gUtPADOCpQpGgTWjcL6pERj +zAxYHG1hhtGPT0kkcfaNgK1V/A4CWeMZNCLX9jCexDOdVvNsw0D6diQ1s/STiq/UYaAAcsbuIrtC +QCT+R6xQq/DWfteLcOtOw+SurX8NAaNHjbDkiedeyswlSiArUE6YcTpfuwz4zZe6zBtt0Tfwzk59 +u83LUmB3rs/YAe9jh4yoG2123ObF+Jg8rFpJRk49GiVb+my1ROM55ZwbScfelYWEjGDZgOBAwCn/ +2sl2p++1SbywNpjeTtIXY0+GdjD3xZifR8VW1Ur4TgsiNx0QfM9iBlKclouLGHOWXC13EHnJgqxc +nYGMdwRkIPmJ/1hwMlAsS9aRf5/hHANdMYY6O4usZtsWJQcJ4tA1AyhVEnHcNRYZ6EtpRxmYzjXA +c3Bsif0ivtW/lQiDJPrL8LcmSDmtAUdW4V1gijcPAvwEELwxbjLoQ+Fh5cbp29h1UXTBTqnvBDgD +smab069/HFQPz9d5botITOdH6zSoYbV7btLAlIemL2fzoDGv9mJrXlKNOUEexUcTSrpP2lkiUrW0 +OihuHyDWg5/BGfBqvWcvTHddiOReaPrJiwPmPk66L/yagL1fsuewD3HGZcSVFDaBTCJ7rqvlUnwd +3sfBdL8V5zmhEoJu5pVQIJQfonb3TL3Zh+feF8UJHtQsJNfOM5nIL9QjK4RruBjBMi2o1wiQHGCU +ZYvDwIROtRmxPEgHjKhCN+sQmPUwOAWWTQ9gqYnaXR91EjXWsB9NVsVqVQQF66UZm/8H23/jwyXC +SWtYBP+/9kXtTce/Q8E5j2a1DKsatamx5FmQPzs8Ls40f74AlKETHhDUz3AOCtqE+618RBluqrcg +rAxgTV//67mzZ2mJfJAuqdgfw4mocLAa89VWgWH3Bvvd/cSuZwGqFnPCt0adTI9l6qCrFEc+J3Wv +ZaNtN1BlMzU0qtts/M+rsXyipESuHW1XFi3iRcmCL9Fm0spbElJc1AbCEwuxRL6LgDrjLf1koyFx +umPYFiebzPfEoUdZRSPO1ZPJ0LSSp2GoL59mJlvbAZ4lA7bL/e4VDfqtMaWzBmwU1ErpGJLWUQ56 ++u5Mify4YZiuQTP2Ai+Z+BF/2njxoUGWYYCBFzSWOHCizeWth36Ddu1XJQT08pl7TALc/JKB2t2G +2JvLTi1qER8YHbtV5SCiakkfJMC6LSzTOWwvubwYmN/NPk/pGXE1Vt6proBUCx3jUMWMEDEWCNGc +sYyJEhZDYF6GfOrBDuOZswofN6nm67+WW8t9PsYQVkLg4b3vxEcPq0xO5UH1Yym+4SiNi1BDEvtk +dw/HWZMcvV5JlkRQ6w2rtcEWBzrg5+CKV3OFyD4BoD+l77qhwdzuu6+SPSKssldOk4nyVCLa8MKw +iAlCsfmS54w3hOSyBnhS/wbvPybMoeY9+1kWQ2+uuY9z7hzP8YpXgA75hE6jL7CQfMzQEo7p7+TL +fiKubPxd5xBXcGFMm5mI7ITNPVGnkMP4B6ZMp1T7STJDWOgPllKDLeYzZuIODovLSA2RdQfL62a7 +I2lzCpnBxCJb3q5qadP3i25LOFLtN6uGr2o8JQYm7UFXWrdUs2foleGmWPpaiNxMzeqTPtVrp3w2 +G7N703djh9lrHNO5wMDa5lroMWLKDKILyEoI+pZIBayBfNIeSrsEVk3r0Vvh8dqfXf4NcyfeSwPI +QdLkmwOnMCnOzgzgH8I0+FzBNicW71YNwyEXx1wGAgzBf8LqoEw0SxDTTVc/GRAgMTsFC9MCi1m4 +1JJAraMhPzmaVXGaGFBZU6GjZvgLIXtYlvHw5j8FeB4HIh5r6Ru22XIvi6MgCZYitFALLgMddbGP +hpiCYbCJ5NFo78HVepTtkPKNrMlWukrNqjL/2t99RRT5Faep91mxlIC3uxvhSCHxsybTJc2y+/yr +INQH6rRvbYoqGDUSELKfuY1IGXmlpXOGWN3r9A95kuQgycurnzncVZrW60a+mW4fv1LFZnf29Ked +DAQhDMJgmRvotdO45wJZmVkadB5ni+8BXHNfx52JyB1MlyqXtYMxbUrJVDx8YQqWXLOCMNJosG0r +6kY0meEZN2j2V9fNlzxezHVXVpF7fTbpJ/ECkkfhhfqmurvlLZrxcgxXTPy4j8NuTTsq3Lf6EvVL +mBSup5Pp5Nb+ShG1joU4G1bMYfjTN0VUELRc36pjh3snpwMNjlFTAr57CFO+IESKbnmv+mlbJQ82 +TxRYnefojHMZgqKvBJnb3THNBOTrLk6DhpAEHcrHk/LXg65C7tNUcz1hTgGohpxkHC0VqVdSTfzS +u7icMB46k8FNA9RN9uRx4WLHJMhhy5wPWDIfRCk2UU/bChDvdSPz+NjrF2EsnNjTqyR0bodE/oVL +TFCDs6FGnCDMtbiAXO+/ngKAKXWqoi18YnxLDoksZd44yoEEjI5VIXvb5frQpIBSDERZHYKiIeUL +UVocezcx1No+gRmYuyfQDx10OszOJRQdiuyc7FZFzpaMzZgQv5m5MRfGsIMQOw+hybSn7h0i1dSY +mKofneiBOxdF5gJ6fH9OM7LhToo6waOZsThO0wAUOU66MkJoyWTDEGDkSRfXomfELze6Tent4IgU +mKcskGJiX7JkdoRJRk1V6oTUrC3iAnqBtnIgRHeLiK0XfG8+2L9x/7VCqSftjFbvBDKAFnOnF5lf +mSkVJL9Y+8+Yx87tGa2PplkacCRU+A8aGihvukRmKlnXWiWIQEdUS1ZnRCIXGJr+KyGu5wf5yiV2 +lhN7ri8MzcYIQzgJCe32FhcmHVaxX6lNGRQlgEtw98PS3ncqEWk9//wG7PDrO192ArTYrlE8JXG4 +QYspIdKbYhWTAtsgZECRHrv9Wwq6zysn7+IqaeEK4axGw4Zp1fs7zPG22T0k5PoCkZXsM3uNXSZ7 +vZUnq/3klu8+nL2nKzl5KlnWGlIxMiL+ISbn1qm8YF224hh/kjhk9DbzzfiadfEMQxa1tMh67rsx +41YriF8qCxzt6ho0P7N94WiuK+X+wFoJnyBkQ9Yc4Mt9fpg2YBA5JMyU0UFvzS+fgShDi+X+9nvB +QfvrPfFcmkyn7Ee5PTbOxATlD2O+T/v+x3zMz04nXh3YrTuAfFBtwRK9HCIGifDiGO/CDQT/Z6N5 +PQWL5rNTTYnUTyvX/zqTMgWkmGPGHQHfmTk39JI9BVCerqiT5t2vxoRqOKqeTqLyDLFU1oLgt66Z +gVEpAU21jU0QEBKTkXA+XZAfbe3Un8CCASqKvb9vi5fCE6lCcm6hoE13q4YQOHjMEkBWKlAjEmqr +5sALlq4FNVMiJ8jSRkOjeOKllfmcV8sXUD11cG/1jv1X7WuYJGRRrxIIpSwg5bklZml9dXiWIMXP +6CeuGz9d4ZZt4+LmSIYg3hWpxsSl7jJjMu01VjLN512Fzx7J8JaLcgjqA7JPYGff4u2AtUPxypG6 +feCw3xSl8pjXdNHnfSS+y9ExDY5M3G2yHw6VGSYK0aqbOx4uBUi7QP/WAndfTmRXXHH90aJzCHbz +js/Ke+aAVww26xBYtMxsQqEIbsbAibV2hqW13WItCMNKo+xeFjCKHNv1CXOkCOdSLzmEToABkj8u +iTbSPC6Z2UXqj3UyqUoPnHuFcHwEGWh+PKCm91kqvwmiz6Ard+BS3nXjRlXztWMjuNOgrkydqOFR +JrbQ2OgZJZ7o4h9y1qiycORXY6Kd2LD6g7ab/9u/okz9W3aiWBITMZE6t+uZuqazjir0o6a3JeNG +NfW6CoerqAVnl3wWeE8n5lcGfuzRr063c+vBJbINif2lS7/bsngF5J9S+nWU76jg/w6WS7Kbz1jl +xG96O1x63M4j223KTndupi8J1BhZpUc7pGgeIFN2QZpVbkZTr7TVvHtNzscKVjdieD3f+O4i897T +LzDRvcZPBSo8xkQUp9N5kXUmo8gkxuWhXE2fYtvWOqoNvUQ8AkX8k+5FBTbXT2lcLsWo8dTtrHyj +GDrRnl7TozNRAKSC5HZzvtWwUK8Yc3vE0XPuWxlMSCpKh4+qUKHYyzHDMc20GL8Wo9fwADDCtDtg +ScboA0V7unPVRAJqRVGfY11lhAmHl/D4Icwg0xxrIMu2TjnJd8oANUqvZN8qYVK1l/tEjRBRg9W8 +wD4uBxWPpAsZrAt4kayBND9Lo4tPFPpYCbniqiMEXLNovDH5pgt8TzXXM9d4/LyVxGwzuODJ13yM ++DIfDs5e3HtECd7CJ4T/UGcbi+zqdvmdRqI97YBQpJBO9+PLd/k3BqK7nmO/E9i+sY+gv4Nkhj3S +0quYs9mnYhC1UYpRZWRzPPrcEK+xz7jecTVR9X3Qp5tOB2RUEe+idTH+yM/WLtduUIn+cHPu47+5 +pdDERblFRkjDb5s3IlreByfjF9rTgLqXlZzkyUbXJZcZRts+QhTjSF+vfzpOGrOMPuRNPH6Dq8Ys +lIeuq43Qb7UKiAwYj/iedxwhLj/KVK4Lc83jOuMS4llcXORi0aQyl8hltiNwNlBj1A0+Iz6LZC4I +cApIkVfsMXCKa4hFZ0rMP3xpHPy3m966b1VF8PtW9vSTZFRDrKxEbWVSxhnlsOHuunkmD5xYk9g9 +Wk2S5vuDK7lrkW3WMnz9QDtZUQe+cKy9RJJC8PZJ2rkEshSRuDyzLKR2DVFeQECozr9LQ1i92Q2D +iXocMYKnD/aeaZmCYcBXKf1//tZgLu8pkhDQGRtexLJjEZWpYyTrkWaoyR2D7lDZ0tbMexXSP4mp +mJHVD9I0x1Ymn6xGgukESMDXtOlAayVejM9cUeN0HpKhmVKU/hxZucdPXQE5L8PFfDgaVucADxoF +/Se1vl2Wz7CdklPVBujec+3ZojN4HISdE/+nV7ZsXeVojbfWeMJpBrds00rmK15cs//VWF6Uhs/E +7EyWxe2vUuEKyJJRHuPwSuRk65K4GvqvJkdlyalw/zeo0+0xJpyS3hcrXirNZhYjmOPcZRzQv4Tp +2gS1jvx/BZo7K0ylMKaObU4uSz810R1xMPYe2Ziz8JFb22v5pyARIP4knMwh0COj5ZvH1mKktTV8 +FvEMXxdfDLqYBcesurWbFQCdeI3SHewrPy9ISim122VgD5ozEn5flVMVNvSdzLszwsFOq/dlMZhS +LdlEJOiu1DeqZiTm7XxSHZ38eSoa3rrRxnKTRABIJTqfn5zdaJLofsOefS50g0UaCPHGQMCVjU5b +cVEDkYUwoIGi7KEA50qjnyLRhOJIjscQ9OB19DTMs2ufOsRTZkN5BilxJZDktHGrpsJFiKIpdEJ/ +ObgyvF6sCO72Vs3284kOBPdgDtNy1FLJSxceQY13tGRY4byORvL7/RQA4rycbap9ubhvq8/85wrx +LxURsFDiCtcS9YZ0abSThVCxCYI45u20l+wWae0JMjwl2E+bXG04BISULHfp8ER2X7mg3c5+EIxt +G0ukRJ/ohmGMcabmzY4KsrNCx3sYfk5EkDJYMiw5b9BnWUdOLC1QE1fnSkkGaS9OmGrC6SA7hBCy +5qNDObr3thfdiRS63H25u9A0PwviFapjCO1VKarQDZ51y+ABZkrLh83ywjwLamVZq9J+tVMp4Eoi +SCySllb7uImmPPKhux0ylRdsBawe+n0Y9P2iyj8xoXdoOo7rvRVpX1CaLVi+tukXmUCjr+wd4T60 +q6B/HH2SvGsqFuaFFDZh0DA2YDCUk5ICR0XJbT0A/1PH5UIpexT1g9qXAFBasV7n2/fTg431d/mw +Alkn0YO0/8EGw9gxjllqBiHUFhmJiGpgEoeacHM6amqN+kh6WxcDoFsZS7JBuWWdS4JokpId6TEK +0qJUY2yEwzO7bX9CwjVWo9Iz2OA4S1kjv1+JjbHfAM1y8ISBvONKM6bFowJIuF1Otjx0yjv8ikPZ +7MjlH+S/tqotjNa1wJLLCk6MDrZCFfHx7ziKc0k5eScivWK8CmXn4N0k5FkxYs5fopdYaDN/Cf/6 +687IWQEDD/9GB5zfmfDB/y76KW18DT9JrL+f5uCqnjFdnQhQ0t2KAkG+oaD7Lkbu04kS1kWoG7F/ +b9B69mi1f12WWBgkxmWIohtFm//Voqr+eLKHvoyA/8iUeMvC7WHrKiVXIf4lLMYX5yY1bVpJXCoG +mfVHG3/HaJ/Jtz9KsNwW6q9yXrlHj3AVFPWPA6JKPO23oPefLjWoPLHo9Sc/nCLvcAOl6B+Vw8G/ +QdNpmCOcLJxjSHb1lrFS4sd3m9fBwJq6PbBtm8a4RHn8qdThcJa3az9KYyqJK4cvK+yvH2O8bVHz +0eJpctsQrruoGwb9bybAXaBwtEseWnsPXOzQVR9zrnwm3NK77iqGUgpgSoNh9WQ5Kz62G5CQJ5db +GgadE13qz+il3I1R1NiLGIrq+/fc+oVkWORsLrNoWZ1XD/n+5vS174sT3tHLXLhN3HUINtLkCLJ7 +4CUeCQ0COboIaFcDEhNBrEelspVxOgmBaRwQ3/NnFB9/Q5JlgeKzmG3Xv8ji5BejAHHPBICwAisG +LKXdAHVJhnKCUDGqBR9uK1D3ZE5sF4ej0Bs6oQtyYGANeyxcIJ3/Jr0n3p2CGcL+mKLF2PVWdw85 +xJhN3DADaLLJouTk95V/UdP3dhvLMUCR3/eFxNjak+HfykEtKmFi/gtP2daYfjIqb4hkVGCGJe3V +wMSIxwyYIMUskr+9uWsNxq9VH/DJSz8agaWo624ygXT3lDLRJfLx/5oBGWQqEsGe9bNVxxlhznTW +ZvGF7s+v4IQOXL5C3CMJAVorXyJOh2u0NzZXv0zSBYQLCKJX1aWWdl0pjWzGjhBVmYF6gVkHhk+c +r9Dm2oWHC9puFXGIEvTbfohOBXvYsS9ylu222fyAtHg/OkmOQ8TTwQNH2FtP29+QxWm03QA//mFk +86szQX/v3uhjIdb5aYaz9HlpAfOxHDj+BgWmL+JDdbuyTaH9tRk0ixI0s9A1GbYZCa7bvO4o4XAF +5YdhPwkqs8FkbqHHbyBYzjTv3F/mPmT8DKRu/gLgUqvQNMfm32LBSklXZ3PJb+lV/BrBZUsA5zZx +y/7moQ0MTd4/WFhP/JxSrNOZJj9IZMUcdIGwfkTkJSaFXcucoTtJiWXatmUOULQHY7K2HgnTRSvN +1xg7sctLJQS0EHhLKJfXQVIqsEF+eHXxaewMQy9tuXLgGM8LBa1CQXmhX15mJkdAVekdxkuK15EO +ndq2ZAVeyTDBcLTVwbrtJWBAKETrv1RvUyyqKb68rjm0+H+i6N/x9spGP/1SXoVBHbNzF1vrWdv3 +3bAx1DSCgXnlCkqpyhHbFKbPntv1nmBAeJzvl/P3QnQPeBkhDv8ogQDfM75sqh0cJr7fMET2wZyR +DXP0O8rZsNKUpnjUcRyKk/0+2tyU7AXx8prIUKD0isJTsw8q1qysvYQ9wdo+/6p8icrJFkjuX28H +LcyzcpbtJpfvdmxZbtNYvp/JM1WD8XtnmOZn6txujNHmc8WKhWS2Mu1uYVVvhwcYjrsDTQr3iQ+R +7gTXaTQ2D2AcHwUWXoK0YQ0vrMLSHJR+ja1CW4A+ucATBd2l3QiG4PoH7cg7H8wW+n/VtyCOs+rO +u2OwG9OzVEEQV1VuEjbwigBAo8zBQ97naCBIAUp19z26R+n9nO+Tau+l1pLwN4a/entYcmgY/Okf +Lm6ViRt4ZlgajnoD/jLb+LCWa80NuwOc8X4I1DLfSIWcQoC+dqxh9wzKE11JthVs1z019f2Bxp9G +8VOHuTyhz/9QbNFzTIMyH3vY38ILRhPNCt2qPhVu25p5EPej42uTnyLi3GEvDP27Y1bi5nxfciXL +64MsW45uAdSHqimGsd+u4HUxlwMRJZljIW7KLtUca0z1NkJApiV6dQzlB9m75WYibriWpFB6Z9gX +FoRLzMsHGtccUOiIyVkSqTz8hr9Fkhvytp8bTHaRoDiILDyrqPMOaF5MAAsjf90UfkYF0lBA2llN +03MpehrisEDs7Na2nxjDtlbmV7wa15LsvnpnIPPzSUbnTKBdrXR63bI1QqRGr5GKok7QF6vRGSeI +VkKkEtrJLSe3t8I3+zQRQXsrYbuvyirVt8Ky+R4ARZ6MARBrNDjSUorYKL1lpWQzVuK8RgPEblve +bGIAwBBB3JVncT4qG6ij9hl8KBa9kNG4dFNE6pLojCTY7nbTVdZ0/z8VKotLf5RkIXn+Px271pOK +mTbw7/ohkOjnf1irI+cDnS8IsLHHYS0z7LHg1tG3fxTKG4vKmheSg9BVkrDIRnaCxZbkyMzekMNG +z3Xxh//g3KxmbC36v2CkzcScNiXzjI0/vjVe8qWNbKKKnJh4py/6navXYUzbr88ExROktuL4cYxH +hedw2ST0lcgMVYGcstyR+pZnmP6m2+w43GLd2ZKf7WMz9KkHceQHwkmF0J6lRxLbrx5T2/YskO+Q +d1/8gk7IVfJ68vYXgDeVbpXWoaLZfbKSGO63fx8OIwy2ErvbSoLPwnL4lOdlFYYSQPQNmuwVpOI7 +sBaAlVxL6WoWa/BLL5M6ugZJziemPAHpxSZxwY19CpV9FwEjKMCZdmUUt5fyHH8A+mT+tGHoJ0CC +n15+aMkcOJKsZdqq3Gw1Lnv39MfpDUNPc5XDYt7zXCnqMGGd0bTMrDYjjDeUcZiMHMV2eOCq4Dh1 +kou711hDVeYpjYgFwXwtbha181b1ZOVw4avCLq4kgTvUtRf8qbxl31I2ZYyTY7Lg071O1V3JPEas +iMN1pzS0wuqyNX4iGcFV4nZ5fk5dm8fwOJk867psE5B8xJsyrAUtAbuqQYWsZHkJBMMV8T6FDjas +I9VQsSRS/nBN/oT/NWmIhn3JI6G2SbanjHzmWO2K/CJexpHPf2Z9My2FXHxX2JHRoW4ll/XmVXh5 +NrgtiI1vF2Cw6NfO9rl7ne2PaMi91olfluP6dCydsGNGauie2zyz7mfABUFev6yTd6AAESJ/Gsd+ +43F12ZNDbzAqTWRM+hgHWQb1sRwI1EtBPLJGGLO09hLlWiEcESEoYwU5iTA0dkxNWGG/4yehWLCn +Bkouan/Dy5W9XGoCJwooAe65Q+u/T4kw44BWGc+LePWhuyPPugvgxrFyXQ1hFiLDQGh/TRiAHYOD +eXIm4xAUr3hRvCeXjInLvjqSGUCGaCMj8XPppkXwpRM+sE5udouM/XaP2jBDeq/T0vnXLNpN9/5G +PjhfV6p+W05JkPlGXQYPt7f0/hZu+nwhKZMzhcKMYYR8oMqmHLxY27LdOehASIbIjL+uvTIQJV08 +dcJsL0FwxrkRWn/D6H/hT5KGyVJzRMlb2t9ZFd/fwcdoK09iVqkStGxWwDUzDiXWV9ZOssj13Rwm +u37igCemXzzwp/M/oNsgS3fgT4TTewyMOKCSsbTwR59QaV42ax/rsTEt1sjpcPeuTon5AwlxOpTM +Az4tR3udzw2SDNX8m8W7syAFfZhDnZABQFParSNAOHgWXlYKYaqncfRB0BcCIAAVplfyUmlBV+b0 +II79TYW0CoHyFPObskdH4s3VKfY9efjiQHej6jP61G7PVVlH1zKAqd5+K0ro4JhbFxq3RRTuGTCN +pD/ji++WzQnlNfwvv3Bu361nNPtlvpn5Rkg+kGkm1TAfT1SFWzX0y/1aaZmo2NQzKeAtcqzzAZwL +2NiC+8FYdekoiPOzd+vTlvWK/dcdMd/K/tICuuNN3R9LTmdDcvRLahZU323MTF+VYXeWOEiFYywa +3F0oLOSkLyk+m7t4mLCgRS8/43JfYq8nEYoEEUmVde0RY733TL2E0VTJnYaR3NT2+FcE6VrRFJYI +sOLZY4e1CmGXm7Haj9vlHqhFEZ9eBDZINGhvMrNbqf6dahj39Tx3QNbvp/Sn/K0cNx5d8L/uFC2/ +mTkdN3P522LAPL7bi3NWvUlAqw2evlTv9126462t8na1LV/wqDHzPXQiR0SjxQ2b+w41liMl8SGZ +KQTr++ANT5I/xXfwlvMzW1ejmBlcK/O/5eiiGkJqasoz3Xe37rBNg9ZGihW+u8bw+HO8yZSKwo0U +fKau5T6GV1mtARRKkD0D82DCgKLbaPb+wsBvOj+eIrUDb3NWtfHVos5Bu8JgzDYl7IttDpeOn5yK +38lbLMtLY3ji50cEhpPS484vJiUtpXjzZCP6AKSjVJOAsry4pwcJ3unMyhQIVF/N5+IPDg1eQWyC +nzhgwP2NlflTHG78LxQXXgNeySHzg3ZIkB7PdV/OLtMI7hnH3dZWZHoJZaccmKOTc63H07fHEVkZ +Hl+A5ivC4EdLGuXgmlghXqgLXdqAcTDchoeSRo8YUd6nj34Ab7sg91c6eaaYOSiP29KX50E6gxn4 +guXI/EU8IdT883f3VPg+9piYFM751nCQgmpmk/ka1jAkNhCI2/b6Xykw1J/dKUT25b6U2yJ9zyu6 +c7D9QGZV8CRVdxW23hqjratqigIIG87VWQp+Yw0j93h2+QQyy+Hbgbs0r8RgJzJE5mNfOETzuPBp +HNj+r0s/zvzT5Z7hAGgXk7TKXHPrl/fo5mJw9Pkc6paGzYn9tJ4XhYVkBlJdzLb22GmsLvwPI9l9 +/i1nclZWD793fgzAEAEIWMGg/IpwslQLgGzW6FxhdWEbqvVF6FnjDL0zAmxjbLVC/LXfKB8kszoI +CfEbMJvFwBLY9Y3EUuuLpc01Rmx+tSSOWP8O1tBqd2SKwNZxZyB3Jy/dE4JiG/5GIP2iV5ODjutz +uoQwaOXuRI42cjI0U4TZgvE1z4QyVgMaCHDyDBZwE+n8ay99By5YmTBColP0uOu6ElPdSJqurF1S +0Sa7yw0VsWPZSEp5l7+uqeEF7g++CjGGiQW0ku7bQnK/oM11NAmYAuzUOfkN1FX2YZ5VVDfFHb71 +2QGa7La1Qu1X58EH1FsDs+ERaVkMarPc+YftsfsNcn3ZpDhIjx/L1dLbACl+oqyobX1gd5dfJoPo +xIY5pUnFOig9XrY7gzfJK7zCrE3kK5fIzsVyseB77eHRHNTKTNM7Q0xA98SMmwpU1bz/nULR874F +fVkAB+2dwq1HyQ1nTYDxBNWkMrPnPw1wKCc08fGICpsG7xFeNNDFVDdLGlT6/wM5TJpu25OIG/Xz +yISjk0BkWx3pw7IG18tv7j6UDoyhEG+xlDjoQCg3BJ5Z6xriTyUvqejjOQqITXemqKJeJ0zMbZij +s5+AHIpqIJ/P4hi9TR+t5IzpJPbm3JLyXmm0HAKgp0ymg8uzPMCL9Bk0rYvKndL+3lwRwn/1OvY/ +YhXf47bj7wO/65leaotYqYE/wFuv8OkuHFq7M4H3vjPe8cjZzFuML829wciPJFI99QfDw1iS+V9J +SJ63fPXQ8lSYQyg5HdSmNbzGMhmlLrNN8bFZr/tV1Ia51UzuTG4lPH/TMUYjrf8gJIKyOjotbNOX +cbkkqAwIpTNk2IGnw4lSTUKFTFZHi8kZOTfIRdusEpATQ85dqoJp+0Xqh8L1t7XchWRHJsfXMd27 +dxfroViTdBFvnZ9p2OY/ahHBvvJThzbiSuuxYcSlBdaBahqTT+9YCJ9ddYRjbHPio6PQKHzf2Sp5 +z97TbGBf52C4JqG/qmlTlGZRkQehEa2d8qrEme08oDfMSr2pnv+Zyir8jDLUe9wYPOXPXUtxPfr1 +kCEchUw84m74KclydAwFUkpHk9oBUNFwUntmS7o9k9+v8GEKjD4IHpzvpicTof2OtwkZ/O+1RXUc +MXAG+kubD08UuHhJnz55OVB2kOoTfWiynMQ8W4sWn6i3PAtkqve1vmMw0YW5DSvvHPFBNxyZhoCL +6fR1AyRJvC02QQMxiTGKh3Q6w9KRA9AzjjLHUW+Ygh3QL6sPYsbqUlY2WCwz0BGhBAneynLuRnZu +lXPSqEFxssia4xBgMTtim1oaiE/95wQZWos6llzwcIU81Ig3MDS55urznlvEd7j7SIb33hX1Assq +NouRwkvrwUPeOoqA6AeuxnpPkfFKZ3Ck0yXzZvnVJkU172aaaTS5MiS8fD9/wGVgwadjxdfoZWSd +0KmH28xsvQYN1cmYFV83F/ApvvGp1n0eKLWYvrwauJd1UkCBdOe3XLy4Kkvpw5Yf3kSvtAjzplYN +f0/ufHMuxItck2quOWkEuJ7l/JX9NxRSLP+Y+JUAXiyk/eA7SchfljDqNswMnsoI9UzP60zIhFWJ +lCB7nNXE2BP8+G/GpzD7CrV2GDTbPomrdU6U5BJBXnTtGu8wiBBi4oAQaGRHur5hgBUHpEAvXpPp +96RZ7A0OJApw0Bl4YzELRLjuHDTZtIC2OqVTy33eOgpjgc5V+l1lEA2tdpyx2loj4KGU3xX2riv6 +lho0ujI2L03CfTabFEXM9gS5qmoOmSl+yl8HjAUI2bYR0lvrKX/wBBMQRyiDrcVOQt53uCPGE0G9 +YrmkhtsMCs1KD14cUWEdRNWYVw6Eo/F3nj4xNko/wd/lWsZuKW1Vias8JvEx1ADXpsCeGzqdjmZM +dy+I3y7XZnfsu+Cx4mATofWr7xBfixTPYxeUX4qrMD2BWawpHaUr1ynIeQKLrF6hYeWzkNdsW6jm +TLcO6paVLFDgIYbVHm+GLL6Rc6jXy2s/+GExb+lxXumjMua6JpEepZz83wKkO1pCFHcrdfdNfcOq +ZxSk3ZidJcQ1/JPHJGOBbXfEfC1+QgIRwXq3pVbw0uNRtR1sNMuxbZd2fxEH6UgfV74Et8dpVVnj +Utx1d5WftHgTnQEMlRxRfhf8YZDEmNe7rQJhzh8tpvM4+bkh75epjEwugcQP1aOA2St0RoH808Us +7lreTLas2o/nenXnmXwWMdpQFiUAXGcsjVzI0W1DPazRSVBeohkHoFeMJpkxyAJcM/bwyXHLaSYd +550LHc+0i2cOfX8bZrxICEnSYlLlKSs7zPcFvSz90ZCiNUnQlPo0jVwslhCkaWTJ5qoMPBRREORY +AoyQdKbJarUAhsTIlgyITUYRYU0N1CIRMZIh26zzWG71U3AtWAU3FdtWnzfVjviXyyoi6JVXiABO +bwcmkdoJebG2TPHNSXgjNYNGbwu5TeK3FeUOJZQ8I6KrYuWLLLEY5SThQXmo/A7ogrrZ3Z7arKRP +THuWKkQVjen2NYjownSvlQermusMqDcGg+0DJBjk287aAfNeLJTs0S8PsrkHt65msMRZ2RxorW26 +PxjFiS/SPC+gNrhUbe3ex7EKcu9+PBnMivBNDXDZx7rshJr0wyneBdo5AKE+/ObKYrpBqRFBjuE8 +TuATseTbzSt/yXX92eeNyzH/ySxzRfbilYcUXpPrLE1q2gUqxgIjkf9pd4UXSPKssXwkl7DlnCVe +zYboy7FySpTAAgSWfURoVtRuxRcrDdPyOXRKbPPmooJTJ5bWmF3nymrXKHMVh8I7NFsxi3rCsvN+ +YbLpWdhlQQ1X/FJa4fq04QTxxFHTGeoCnNPaCRhO/GJ8INff50eTDjI+awUo5Pi/Z+8ELadsMTMS +SKO7geDnFHjmOg9Ut+XKjx0gxJFFSCT/sZQzqaCZ3mfXUhCif/BD0PzrUITZkuckzxy1qwg9Q19N ++c6ELSUPJnhf6UImY7+1Tr3NxduDnQs8ykEzW//KwMa6MlH+qtw0NjO7W+nRQEOK5QtOb1aIQShi +Ub+Vm4WYASRT4YfhZUD+5lO5PvZ+HEl9FZtMWyIAI7x/5YnJEUsvA7APvik66SGDj81JgKdRlTch +mrBO3rZfejS3gPMRunGArT/4pPQGif7dG7i85No/c3604J8v7qjuPgf+0bx9NnKlez5s948axXD5 +Qy2nUnPQxoETje6uHckX86wXSrXYl9xCavwH9GA0eKl+p30vyBffS/k6972uewSdmjb8bmFnEywY +nUZPhpcoGiJ5UMbfsv7vuJMyfNcHtnenazPlX6Xii8Ypf9Ut4wBZjG6wB1nBUGEGrd1ozvNGZqiW +EoADC41fWGZR0yIqfhVH8Ql+szF38IQEzFtzQLHWTVXtuSBe+t/IJ672LuWF/3kCmxfjIJnqwBTK +UTsfB1Y6NzHXk596Ijd5UClzIwJaLZw8pkUFaDzhMTTNFuLTsJLTxqReKawP1p/0STaGkY8Y1xSY +blV35HjOYTz+RtiDwOZxGcBg0qICtcdHZpQ0huTwPdoSY/G/TKL5YxOOXr1assSuK+5YQTXGLeQ1 +V2DAnrXt664xrku1EZhVWeRsdZe25eBgy3a1oXyn1yiu39+hi8YHkHBIi5+F1wg3KixcqLL9NoWn +rZdVAPvF4QD7AwuZRatQaNukqJQ/Bm4zVLw2vHAU8gGo6U34okBEXVPZ57gy0nnNa6lQ+mZXKDmf +LuWWtODa6zQ4p9DCM0mndhk99+gHqUIqCnVziY5o5/MUhrPUC8r0bnM57p58LjGoDrMbM4ICuVDJ +idjnPI1CBNNFmVJZSQknQrJM5XF5klgcphMOquFcrtowCOPM7eVxdIO875WzkZLPGj82aujS1/VD +S6cf8zUdLFb2AAoG9sLLhvLu6HDJ5pfq2d7WzE7dPasbDPk2V/qqp8kwV+1+emIfjXS0TC0OEpcj +3HsjV4JX2lkc/Ev3CQW+Ypzpb+L0n48G0v5IgevlDmv/OzqphITpswiRCoz4Xd8ku66h1gyeuICk +kuQl7/ixsG8L6UVYaHFtKnXCO4u3pMmg1XfzUt7we0FhQr65w3dQ7muYamdqtWn6edZ0V9/0jppv +1DRrV6a2dNz8uqaRtYmhXs2lxlekmO4MnUvpAoQPT2bV3pEo0DaOM+Slb22a8GFlMXWNZYW3PRdv +7vlJyMiDz74ib0NlT1svF0aXH5U1dn7cLCgIe0VMLZlL/AdDXswyxf9GSWcgfVGQkPyMLvSKaofo +F2syEWfK8sSUrysSnOQr+lkxkT3/ktXqFpOJz0yg1Dc8qQW6Wn5mm05gynNo8SbIVh3CIFl5GsE/ +4KfOSRUGxpsBnbYHr0lmW8YzgJHAeGpmj5BuqKKPBV1uFojW5Zt3iwm+kkOSqGiPLP0/CWmogZvL +MTGF6BiIa1JlNL6fFkMiJg6gxlhHj2gmyyqHX2qK5vV9qM7EdwqJJ9LgFsLSOc5ZKEYHBuHQnO+c +mIam8chJCK/dHgHsVlx740+R1JuIP7tlkcKkpW9yxd4Uv0QKjN2pzt0fhC9DM8itC8Xi1mPtdune +hB+UKFFoWuOxVIODAjkGvV5e6UsyMZtpXw64H8jx2blvfiAwtWOivsRpHUhZeiJLWt/ixrHa6sQK +VPGQjaNmqMQuQjeKVD1CLYK+4ZTd1K7DlixU6bVJpRu/W3pn0WuBggNa9jcOfxYiAdQa1M5jGTad +/mr/IMcNBGsU9ghyEuC23KSyfhDzLP/56lyWXWT4QqlHFSUsHbpdevztXFbNTyh2oo+TfiHssQtm +67dwr0Uyra2MuxFlX6TsUwEp2Dm3KaOCi6tWq9x+cgEI3Wi/1NLP4Qzsj/2yhWDuVZqrlwTmxtjR +fDinRbCmROQRCSZWxgfuv654rsOfoRxJYx/zk++6MrKCWdRSPnxnzTOAKY60mEEgPJEI6jjXoKGf +k5Rp4YVGKmxNeCV3c1nXpGVUZxyBDmdwUPVqByHQO9T9VUMe6ZcSovd8VIVBGlByp7VprXKtKH2J +QA69p3UQYMYsqqRPw6kr3+bZhLiaGJdVfADad0UKZFMZ2qhlnCLpOeIzgJbBoyg+JsFrWZaIyDYy +zSBlspJEW6UlOYiyGOAwnytQphDgDyvP7AG1cVYiM/K/an2QOHIMGKsSJ8LwyH/zx+7c+bqXb9UK +Cnm6GfaAOLR3yRKyKV3XXi3fKzkkSTzuS88MO3OmjtDrkQ+55RN0oZLn2TUGt7iBt3+Q4VZAfgVG +kporSDoWDSM05K8q0kBbiTfgMj1YZ/XqnJxCsdtqwz0iHulaI327FNxCpYZxo4x4kOx8W0Hvt8+F +RHKolVwYJivOcxwqjN18SX3G4W4SDJeja9Z5r4ieSJlFONgsZtifDCi5SsvhInAIyu/Nal9Q3uvM +NybtbmQfr5hJ2QtNw0UgdH+2vJJdGeoGDG32vHujbjlrmsn5chlB3w/6r/hTWqWzVNC+S5ERH8bW +Gj1hJWKpR25BMj72qztX3veR433in4mMDC/cQEd8abqyo3/Rg6mxIV/bU+ogFobSEAQHSQckck1Q +WdkS+sA1L9KAAjTmJjhMSdzKXbR0VWb3y0r9X51UDF4sJsk+ykqHSBrtWJN3TMINJrtwL1WSwsEX +UgD3uEXC/FXX9HU9CPcra/GrF9amy2gga9gkdlVl9f08vtVim8gohl1/40rDw0yIBL4CxeDMm951 +yNmrXEPbTjHJfc/McRFYOY22563KfOpEoSahXdI6Wz92Q911OcoV69Hd5slNbQeqZ7AGqJX/Bi+v +JaTm5bj7pkgk6CBJSerRlTst7blmLiEGu3emAX+3mSGWYJuR3JRElPpZZHV5ZGofj0jB7NAn1dGZ +weB4jybxbYIomWq3hE+S+O71Ews4O7Ug8Qd8b+6pYmG25/iCq34gAXsbiyvU3UaTngPZFDAbX4aV +0WXbut6L6Kl9tf0b3DsIGWQfNnjMve3BfhNRT2qKpZNdmEcRqcC40yH51Mt8lralZK7W9s4Z53k0 +8LsRmu4BxqfmVMLswWtM2o51p7+jFUP1ECnV/DmfIt2tn8Cq8BdzfEdNmG1Bwm1s+USlexmp7krn +mnVkkjlS4cILaGeaRZNkAolNT7Yf/CLYn8lahBA5Iu5sOEl7wMYvDPhQclm7FU2RFwknVKabF+4q +Wb6dblettGlfgt95ETq/5GL3tsSp0z08Ov6B7VHAf3JNotNG1OIhENlEd4DYKcAdPiCYY/CXEfel +uww5CHZFFStyj+pOqt9BEzRHgDloC/D2noxQVju7hg7TuYLmtH5BBX26NomWUX1bMPbH4pdTo0lk +t9qcK5IeBmFoXiar/CZLvd7th/vSHOpCPmy8HrjPf+abpb5sgzrfvCqv9vgU02/AX/f3knMKre5c +f+Hmtncg4ewCpyjFTXFj0XLNij5hHF4znO9QYx9f4VQ7grZ39DGVB5zHmPerBZDqrwud0x3UFELh +9zD3kf2RzuXPm0LZJNOIKTP7LouTtm7H4LuKn9x9zwD+Cqd75CLcwIZOIr+W/d9K0FHEy1PoLmUq +kp6LiTaPZqhhvMTGF+/0oye/dXvAteLjr+CBrjszhBssC7YFyFdgMOqfTrtoTeIUopb0N259p4LO +bhNK+SkCiIbMuGICVDPuwB98VkdQYSFHACcdF4wTql/wSO8i95lX38crrc6ynuUpurW7jKRVYzSl +ZncNaKzG784exQ5FolQf3Xv6Lqb4/SKoSZiUda0V5mpWN640f5z11AeX/L+bo2k3gxSRrvIapIKe +EEU6vl5vH0d6Z6QCAZuwugmn2kGSnQ6ONuUo7LKxLmOqzBD40n2q8ua+b4kRa+37Qh1jRfDsewlj +ccDT+PzjKb2X3OhgGZAu4oQ1PeTgQYDmyfXEY2FCZuPbELvN+wCiNBF81OK5OttCX2eZhPaaq31t +cSMAWRzAzElGz/3CEuOHfFU/45bMo55j7MWxxiTOvFpoh64HGkDNJ7DPm3fm8OahugVUcQz3b80q +tiQcBa+AJBbP+UARM2yR4VkXNGPj8zM1sKz5maUsCkCgvonk7qBZiWGtcQTxn/A/JBuRnEn682uV +mwyKb61vROC3SsXLGPFuqR5Os+qO3JWKUXqYetCsLSFWpYoNyfeoXtIIsQQlggUMykgu7hQUjzFm +0Yli8WqtvHB+7Ac2vMxKR/EBMyrFibEsaBr55TfY2JRjXEzOVT+pEK7H6QebMjjaeYIRwapDDaT9 +oz61t1T53C3s5uYI+IZ7rsqYxAI88iBNQEFc++V/0jLg9NtiVaAi4WV3BLZzCGD2PaMuBTtRQzsc +GA7H2aB+iWkOHTXeNkGAT79FdpFu+tUbSBpaSC1stTUoECsSIab2MqAWvOOtzZCn3812sds6/PrE +WDqRBnn7YXkddqBKS7U+M/5oQF6SrNCyKPDSi5uZD2A9wJdorHhuC53iSoIiz7tvQPrjzbE6YJJ4 +PVuXjB3hVY2jG86juVZADS+kdfnBWu7VDj7Guj+3ApZL5OLBpkJ5G8XG48CI8mtZLZDk0s+DxjNM +q2J0+UkfCtVawAShIovJaO31USU7ab08ShYeZsa0jJLGByw6ByJTXqONQ4xPlN8gkgNnSt+eb4PZ +KOL5OGS4u6DyJRgjcZef3TNAl35HelVvE1sVIROYIAzI6bgdZ2iIZdMLhOvOlQdVba/WKB4bB4R/ +/lKWsmnXKbiZNxKoaLOzjdaDFDrA900G8Pt2tNO9WOgApXT1crKt8jTIwUC2Dsttuyi0lSHtW4WA ++mmZJkCm92eyB+cwrwFDgktj2mffQMTdzzXevznM3j8YBo+rpLvvxSEZWAepLWJPzsZqM6WY7Ptf +CvS3YijO1KU+E6ZkIthhzFZhqpC7Nb+DmQWdqPnkuSshdGUqz6vgatKrvGEV5Il3C+mUychiJBaO +N4N5ZEX2f3W5XRt5SI/0YpJTev0ZwCAHdFoj9JJuNeqZINqyARjZhMlDxfGFQh6+vUADshDsC0TY +TDOdSy+/KvjInxTWDS3K/5jPyKCLF8j9OqFYyr5Lm0jIdR2kk8ui2kq1qane39yZ9uwccx0xG7I+ +q2IwGyC+arQC12igSGN4sSiEp9D0V8Rw+TEXNezVvaRkQhi46HdQfYEAQi5MHBQFB2+ERZT2WrcM +HdvvnOx/2lTksXuEAa0uOqGxOZvBwpfNQvKzR57/Xe8S2iTwu8O89EJDcFs+Hj0rcGS6HCeFTLT8 +gO9Lk/UvFhjx68RPBn0FAVNHmSThXlyatjZZrwo93jP4guF2UAqqagbgIZexXmPTfbd9v2IUrE78 +F7avglT+oxwGCLZOQ5pv4txFJaIALlKv5rzqY48zGjU5dyeTLhoswPOEqaix3SASvm4Df9nL4N0I +qhWwX+g48ufSJsQpCp5qaDUEnb18FfTIVJnj2yrydb5zioNWzBV2LK6y5p/U5qoE2F2xijH8z048 +7CnTYgtp/6SEggbB1Co2d4Kc69FzzMdk5fo7rplLKulIc35IFCD2DBdAi+9dfUNYAj4CNbikySn4 +wRRbkP/ILhrrXa4CXIEiEUO2IoZKR6Q1aEMl6B4JoGHxMr8a0ZnN8wjzbuVbl5mTTDZF8qcguztW +wfC0HabsRoJ2JZ2F/0awrgUoRbhHqJAquZTTdUexuEshTVVW4Xr8Jw+L62pWNQMZ45XwuhpNi1Vx +Uc2QTLN1WCeRXzFYJOKC+ufYYA0/jjnuq2jjhXLV4AYyaR7G/eLJl3qOD/MNTTYKGdG9WdSNFIyw +kCLRo3szJmZNZnkF1WhDKS9ZEKTBCkS7vHdRMVk828H9ND70G0n2g/Gyn82McfT9xMSafxVQ2izq +wEK76Zfrso33aYc5Edd2pCKabuxjpzkZGjKwLPa4wis21oH8S1pWQiREJnf0NK78wqkLYSZ1sAcb +3o1v86BMmUiL9qTaSkqP5j57X3uXezNPAyzy9ILRhzX8/pH67ql/pX/khoo4agATgotBUNaTRe6E +gydMj+hj+CY20JJzW8wYwU9wukJCcH68WU4+E0w0jGGyLEe75wBVRlX0Nzn2ahfFkUG2CC+XBpYL +MmrsFNjjU9oxEg90mWel02IIc8nrvDO79nd4aKkwIrNvYWwNgpbr5LtVIDDYAsYEzYu7A89YPbV9 +f7iDnSQWLbso+e54VEsEwDLBoKbGCQtJaOubz2aiQFN4+Sy8qS5xzhn9IIa0ez90RlZa6ar1REmo ++g/IEiK72NvZqna03Fn7bThPtO45TB8u8tjYlgMlZYtyb0hBZYwp5vizKY8SW3EzSuWfYnJtm9wG +5ToC2KZiNG2L3yiFo+/Pi7s7paCaeCAZF+mCgQ8wbx1VdvMLBMkaRXUhw6MuqzuHEdFQSTbyIJ3a +4pk9fWnXmXIhBjnE+Tcm9/vxOxWRHUhkM1AfMYBbu9EDc9lPkQ9zm/sfBBtTp8pWtoGXGBcPBrch +pn2UH45Wvv73H+jHkdBk4RBW8morQcvColq6jfwE4SbFPBmmAAlfOs/JFxq6qWyALFvs2WR1XicG +CM1pjZx4i1/17VGrXhKsrnPvHNsbg5PWPKjtldfVBO8Sbv+6lQCN5KxJjOaNDnwqn2cMkYJ3mnA3 +/ZgLfdOvyDJ5uQqmWDqshuvEIq4ORl0fvuyBvho4PR/NdEgG29cPQj0AtyAHqlaFF+GZR54x+E49 +L2V/DusvoYOucG53uSBUP4pHxd+BxA3XcMNx5pXY57tfFmZdhpioVijGJ6iM+SxXvtIKAigTIUjr +jOkvElPG+m02kemT/tUqDfSAkqRQB6Fvx8suUPn68ltk9vKpfly1iLOtNfyTw5tA1/5CBOKM1IPg +YdSHN6UCjYOmdzkMg70k4zu3NX7X3NMFws7JQhQ+zCJKV6Abp7a9bJknGknZToBJcEhD6aHCulc7 +OzTjuOdW2L/IyNL4bkale5UATiG1mi0QOocUQejihlAE5Q0egyF5OMmZgTfPl9XNrWwNVBqkRYFo +yB1s3UK+GNMxTDcoQSsVdNMhywsWFN7tJpTImn2UtVtfPQsh0jpAJ+YnC0Is3EGWILPwJfatDsl8 +3ZFz4UdNVzhnsJixG0+037K81dNCFW1KzMHBqGOuDVxzagxSflFCLLIR5VsntUC7eniBB3Wf4wuV +1oU8YhCZGmvg+5y7wwl/FvQ50AmPDirOBXZ76vGO0jpNnMIyRP45d5obWsLE6okh6TOIL7sU7QcX +MG/62ZKKMzQjiFeNEykz4aFG9eICKuRjCoOp8RNlQqO0HBEaiHsL450l14MsRsaemCe5rSM8qUUE +/BvXsOxqRAhUEtw49cEafmqLVH+9OOSHGn87K5NM9taWeSeEvqCQx1Sri64qOGI1qRt4JQ5P+Vm3 +tHDCsCkZNbNUjXMBVEaDwxoYJmG0GOYVCFCB8BeKdc7a2alaE4gR/+sE65CZfk6uJiI7Orq+176C +sT0K4joadLOdciIgWtehmnRhw2eAVIrnzCOphmew/qrFxcKQrxhjJNiJ4Hr6i+nHx5lVOA9d32bi +ffJLP+vA1Kj9+bRMRpIAHbaRdOjOu7V7S+p9Q7r9l9jUScfbj9qN5cput+Ic9iJk1/2lj1bfkXjt +iGX9FbuTsFOzAkkG+Qw66UQpkQzlvhUWxi9yvadffMbxdy3SYyJRZwffTI7s+WG7ZiBEO19EPVUz +7Q+k1zngypsokSSQ/JG//kN91xlXgEKANdhO4gT/LK02HeYmrqPocO7tn7V5587+EWe+m3bz5Cql +7Jhcu9G2OmqzZNqEH9O0Fdi2MHIfXdb/xWs/rs+NLtmLlLHbOOM9fhtHIxe+D/T+hpC85iRRWNlb +Y6kZShjPygWuA0NUji024TnB7wvrPeSMmozoXIsNAjr/rN0Oe0CvOS2U8zqpWDawXqVZ1/a13Mpx +wug+x2NaLlWnjJsYzX+vY09sYQb/qSz/FXeEtBBR5T35GcWJ3hoCEaKB26qunHakMB9rtKzLXoVt +GLKeHnyd8WC12Q5EhxBQnQ+E6thQ5TJ1DEfY+BBk2To4Fhry6FNvFvfx+y6JZ1lKh6n5OfI3xhM9 +HFk8qOOmdPLWMExls1wwHDBhUMU6tT4wmjWQt0MA/7pmZLCyLZFJBZv+pfsn5fpXe1vbKGaJUMEs +BtJ4Iq8tqQwDvte887CkN1Jc6sVA9St1L9kQcLYKq+wjVc3z/LBwkmMzPwxSqKEfbsRBvVnxELcB +AE/qFy/VDPJWL+RuYowTEO3XhJuW8uZ4+KS+LEU2jLAykvcY8soykayBy3qoJ+cM1PoJRaXhEmbq +mUTWsWdXz1Y4jH949S2DMZ7bCFwnj0utQT82n0QKi444ZiAsPrY+b8cLBykOGR3RLz+XCxl4Th6F +ngK1TM3ZdLJiXpwttTgWC+XxViKocsN2y3okzFNj2SzDs+5qyJxaaT2rPT+Bx+5rHROWGIfetm0d +enIi4Ez0ryaT4u8cClOenoGopzakGwG/I5w/2a8Wp/OJeleXHfI5Y+rWqAux3LyHILdo/SZU9T7a +aQaZMATztyupVuUjszHuxGzcX+8NKL2uUvXoLYZS2Uc8D0OetIBFbtpx90L3+C3uPZ5KHPhs714P +VX1vr/zqmok3S0Io5TJz27bdvC+jAR2nKbKx3HDjlmHY6i1TDkL9Zy17uB4vBVxRCSVBOoLuFPjw +EE2wbl+4OjNq9bwEZ2yX4oSPVBpEAUZuRu/Hl0KlUQOhhXn9HlBWisYNaBqAGiaenNOeVHSy0KS8 +mtaHcNiR/HFk4wbD/lF0+s8flMVS6+ejYI6Rn5ww0NJFgLNF5hmmwhyVyCA1kt16sQTwvMMtoV3C +qZU147mqYAcavfSpFoUJhYEz5MZ51eQYJhslQuI3Zb84bDGC0Zcc6h3MudsBSrsheA3jZOfx3Axx +Jbay5+INXLnxCB3wo0XDnHeMNCvA5wZBtqO/k75AA/i0YI/c1NFAtZ9Q/pRG0rpCFivwveqqTd2U +VkcAtMeqa2YmVS8KZSwZ+SGSrtbPY5t/X4L2yhF7lig0KgcatK3PXvX8xhRCUsC6+y0pD/0/zAu9 +tVspbYPVIAkY7udOtiyL+UA9sXAbSsnlbt4w3j37JGRH18Hm2QrSwMKLsfupsPMtZszu2qVbaj3n +zqiQXgxWHpvuIwR7+JKPiAOat7zlEal8ddBb/S5vLHgRQapFsJPN4fPmkxCpvyZrMT1GMTuW32qf +Vrl4ypOEJkZboJjeD0cFXx8pA1LeH2jASeBztMPCOycdrjL9/O4u1M8lhkHuhyX9YCoVQEV2J3Oq +OepaCM6Kr2EvWkh9xZItSY3ulwl5uvwncttzZi+uYg/2SNNDIIcKK6N1PONkdjot9H1kA+lS1Pi7 +JEgBR05vDWsBVLEfHarXLp7NbR7kOYPamt5r4VxbyrHpa4ZV6gpYsCaNFCwzQ5bZ/7r2m1yPQk0X +grekKVZvygi9mpbTlC2nB2OVhP/kAcQgtg9Y97HQJBgEHiMFNqT6hgNwe9jJFDQDt4K3vD8H/pTO +bP6vWC43NDzQ00cmUHKUII9k85/j3/t43vP/X2nwD84jubSd/HJ5In6U0EhhAsbZW4MzyOLtjOly +4FsuPlzxv6U7A8pOE4chFZR8lNTPwx0hvOYVoc0r6j50EhGiS/YznXv3PRWEn9W7IZo32ECd+RaI +lBEq35iHcYIBZ0U4l4hV1/mhuNFUqblJDgDXjE1QmmDEll1dXTMixx86UjZKgIIZEGZtZAyju5Ik +sDv9O/4VXQFA/uCrapKLDAw3XAL8Wz4njKIOxX4wBz5D26pknQa4S2PheNAVc8qnG5zd53rMO+qC +NyETXoAKROIzdVb4fu2lqQZQZSYrkKsr0DBKivEzzYYg0sYFpBWkHoZG4APMjBzUO8w7PT3gy3Um +5g/urg2dEGk15bTEdmmbvq6UJzrgemr12q4r2dLsdqxPoBKbxA5xnhLLQgRXhzA96O6Zk79oSW+9 +lEo4W5LrPdpW+WuvpImKt3oyG156qOjeeR2OJE2+YgVFoWAJ7fmpyEZcwIytH4c/kKIrCvZrBY1H +qSKWwTeYl6LUZBlLWzVA5AQr59q2HOrbxxQTxcTz8FowrfA2CPBqyASP4T09OMreuASf0EjHLwKY +7Hq6/bbC30mTnFY5dsNJiQNRCQxX1BtRHfR5MxEned7GS2wSGe0QuZGJaqe67ZXbra4QlgNGIztZ +dpJgkySTCizJqCKJa/4v/0PO1JxHqpl2+tQDzPB9+M16rJW8kS5mcIiT/5w/oYj54AWe7CQBcVkT +XpSqSKbaqb1hOoB9nqClppf4mmjMGxyZujYIFR9Nw2i4EjTPKpNfs0Su2VNWVYsR/tX7bH8M36s9 +fRseF6LzyyCe77JF42AxGa63mbjMfhVlR09v2A+qeiERUFJhOT2qmYWVma2fnAphXvslPa/kAAcg +Q7yoAcdC/cn/Tpd9jEzWTFGMsL2xqNO8IKTuUOMzsC99sDNPcK+iVbHRejtTDY4+mzaLUnOf7iR1 +EjoCNHCk25fSKZ8tzjGno7G9quFjpCBWzHH5ysIqKgNFMTBgsCECG8VJ9Wu6NnCNtklICbHL3mGN +oDLOC1Eutc52V3Lpil5Dkz9cKPSfnT18g4bt0uff+9w+XTsEwNUGBphKj7BM8IS1mu/G11FFXHCi +eTZ+hGftaNcsoltzMGxhy6IclU3/bCEv70uSBeYLuzxHOaEpzSwqllaasxcBu5InATKvyQFbec7y +zqPe6WapMLbspTiwvbgVCYzqkTxobEvza4P6CKGS4BzWz+UQ+BU8PH4iedtok4tuoOKt/s0a6zJs +WK4gbc1zaZRKUVQxcRfE2Dni4PSP8IW/r5dZjwH6e1dKwsoCC/s/r3cGzeoulGk1dRUj97FsPfk1 +OHZ50YydIjxwei2nDsuCvLEehiDiBD0M7YoM+xHw5oO2H/AwyIVSajediKkTbDpehdRikriy/2YG +zWd0DXIRrTaBSQeB4M1+STrkE+w83LWfcRIvAdkzkbdBoRVBC9/CMgrALBntkExI+Bo0IJ4Y0sp0 +ikKFvrK1e2ZkIfJt49d/N0Eu6cnyzO3VhBoj7QxJXmGrj4BgQwrlARnIVhXRHzilxoEoyS+gZC5V +vmT4K7ZB72sne31auTMgkNGf7XaRCbRmbjLvZhd6r+UewO450gQUmUFV+sjIjY1nwMqhUCVoCHmB +pwJXxLTU/TgkypVjyMsrteQecmxgk04ecEC0Tpg9Upln1Zgudiedl9tQ0YXtYSi4htg6ODRPRTpQ +i8DylSsRTekixGLN/Oc8whMO1gC02vnOzQkImiOlVBp0ALYVN/C9V6RUhRIetAAUUWYcy7Cb3ajv +O7JCWRHZZjuHsoSw4NMTVYZsqHBiR30+ui51+14QKh0HDgKdLIJbHelA1JFL41hziSpc0R5lgOfi +M5S+Tlqax0o26rby2f3x0AIS1w+dTPhVEjmP7kgfKhq/xXsbaH2BGyx+fsZ/bO73KsHOa95+658+ +Qp33YHEQEIbKMjYpvus+PRPzLJ0/I5eoW/PznAMM+gvyZVUuI+crNow74sCnj329Db3d52W8B4zq +QIxWQx+Gs8HjJOXIF2zyZabU6hXiJN6WaGjcpMBd7C625uw3Vi/BLNj5q2H4bmUX9PB9quE2XjC0 +ZYt9jAitFi/BDGPpkfXkiVfrCntVnXtitdThqeaK5ozW/ABrO/p8JuFGZafhg2rnLLFe5T7lXwnv +JrsN8jOa4l/mHErNXqpmE8q6ioOmcnsFF1Y0u9PueVxUvT6vT0+qwHZ2chBg3R8+5UgZXbUCtddt +1QwibfMrp2Bw+pQrloNSA7FpTe/6KGT19ZclRE2vcK/qX3jG/Lob5kmmskzQgBd88QT+LOgskFw1 +ZmCNdBMWMTxS9GTVrIiLWUrAv5vj2IA9XaX0BZXa7KOeRp/7C0P6rWy5aPEmW61ZOkN/TJ3O8Ufw +0E+2LkTAhiCsNFS3l+GT2kGAt5czhH0dysRcSGA1CgCrQN/2MZkfMcIaKANtWZFVObA79hUbR751 ++Dg65mCDrrmpk4TR/249lrB8xqlG9otBPdsBfHXe2Dfo/ssPwTqJNhUfaebRVB63YU9w3CcaKdBY +VBLEUuiYGaSdmWFR4QJzqdGwCy/ItGacYFmdCtd0m95OfOTgcPWNFVrA7On6uYGqNPVd0RJTyltf +EebCYw2V6e0dENy/GsMuJO+amaaGhu+jFn7nwjRW1oHkXXpYhaCqba7lNoVDrmpgfLNN0R16CGLW +RSgYJKSr9zVyWpVPM44Pmj5Hr9DPBWQQZjn1LSx6n/DjSojzef5FfWje311buRg5148SS28q2pUw +u+8U7tTaBUGvlwdGrk6jL84t926jXsnjmvqowFOlFeWncwvTKKQqQTpg247MfuqdFGYZVBAeDWql +WGtpnyvDpQ78bDBGZeszPdQLHt9X1uYIMu2yXPCq2ZpGT0n3W659D8xlZrHz/tC/Gn1n6X3dpIT2 +JwKsPYMShKQcz2drlHBZ9eYVNbHNvWfPwHuEpZY9wzsJIA1CCsUM3nCgbHrpFPQ0EJtxaBbQaeFB +niuu0xsgd7B8wF7gOIOvR0GroXUVCvNDbperUclSMmz3n/sFpiT5kWtFTTglUct84s4N+D6QJvKj +3ZsCwyBjucLjcgGNGBxznmi1iNrDo+9RVMldqzsGd/HkU0R2ZYcbg+w1teJ8mxfJ96SPSklgJ1U7 +YX6r5ufnGT19Vj8bnomreU5HVXbtqwUb+6EubBj1Eei2FNvVx4G5QvbDEd07/0TBKI9Ukm5d3SdD +thrGslhUeM28VH1kOpEDXjUe23k1n9lSc4x40rXETNr3oEHmuCjxivxa+KNvqJ8tDhuSZpONhd9Z +jXnQ85qep/yQKOB55o9v9dsPA+RU1OArHakw02HHOmsw2er+VUmQrIsU4887pX7YGzSXDgi4Ynsp +/OxYE1ih19vSDI0QiNoGaqnK2PzvdMhmbYgGHM6UEkaYXSTGjoueliKUVO5yPQxPapv8AqmDOph7 +5k+bTF8vi+hwvXOSnaymtux1DQoOcjAaiRINWSfZFgbNQuokc5NKuE+XShPxi7Hxugz1Chu1S/4x +Xl7b82xhJIHA8bolXxWOgkIqrLS3noS7vjCcc+xtvTRNpVoIimEmy7Jxuc1I7nnfZPwJIXj+WEtx +AgghbKsQ6QvxzGM1zio0DcJVxEWBVuQg8+IPcyjGOoFJNLKIPznrhfgHAM2hs1sL3hgHAq+Gm7E5 +NcIjNTMdA6PD/JydkXD5q2RHgXJz4k8nPZV5MRqpvH6Js8vjKXb2WObDiDiolrMG/tDXUXa2J2SW +EafforhMFsvRySly7I9I83HSTjEvhYNhWArEH7E4Rygp4qJCd9WI6m6UqLj6zdX8VQ10UTb5xP7g +TayWiNRsY88Rlz32VdVv5gg7Rn2kIq3cvwvvp+vQZ/c7f3KYJLcaWEv51vlmlj9SyV7RE/3p7oYq +10RK8OFCWoA/QaccJ53Ddn7xnhEBmJs+UM9vZvw25qX9n4aJ5DysBUU6TOVC08/2/QU3aJJhHVRp +J8JFOJS1UPcueNETe0fDGmsNWGPRzbZK0VfYy5V6xKNv1bNu1Uica1YslijC6veiADOFTozq/T2F +BHoqtnqCuZa9ZPY0fhIL/9Fp3aEllYnG9yLW6smpoSqc5yjlMsBgU5A5eFsf5E0t4eL5hE5wdNXm +uP9MpbYfTomoeGvEBRAkovPFX9SJR3bI41CGDpUYFrKX5+UiQuu5UVdZgw0/9r/P6Ie0EIJat/n3 +dugFDjAyYxTfsL5+1j0ssqzBCijCOFOFDfc1gPIAoBxUF7pMeS1qM1gxti+/P0d8ke9afwHjA7AW +wE8ge00h4h3/fzW1nWZkJHZWTI2nhifG84I0QndGbxDU1rdKTgCwb856TiBobE6IpwmlSA0rLxPX +lmvb16NBAaB3ADraCrKvHgmWCfQSqF2TE7o8PfQ+JuCViDX8FDqQIGQj8EnQIUVbRXtjChg69VvJ +oRTYPBv4tH78kgr6DFH32MDPb6qZQaHasLDcNxsQV02UJQAoNAS5XFITIOM0zmDAJ9AhxuLUaxEw +7W/gy96GLW3+i8u4rQb+2vJMboLQGDa76/E4mPEOweEcf8dE9T0xHOahbJgk4Ca6mLJ598F5VFI/ +nLcYbuNtIEqb+c4INtbh5SXyUwP2PXOc8D3rqhp1tiCuC8sWQeBJQoDbmMYvxcRXuJ/p7m82VV+8 +hHuDqLHyEBNzZmdlA+OVqPrw4k7q3BdUR88GpXJtuQx/hv83g4jGLBUC5lpetNMmD9hgAUEFM/eR +s1RBpq/Ia3KXBlT00hTyz2ryLrS2u6p17e6VkYPDX6EW7GLxNAuay4QSH/mXPbdo2FQjGeq0fsQe +og/zk2FQTlvP9pQYnYy0uOjgOc1U1a3mi1NAPQHCWvSLHH7pGxY6ynVO3uSyHcLReM+vOQSfP+Zj +SFweilp2Tyg55DANkjeD1poCdnt29yi0uXJ9V610L86ZMOtWdLRgiucB/Gn8phM0KOKrUjViF3xa +Bb0VSF3HF9/yR+H3I/UaPfOl07Xf4h9QHqJ6wu3o1YswWXLMN/8NdDFSxt08bCIJ79xFbXMox39z +DIN4yXb+/ybuGwAgQG/XBlHOeq5y3D7wKVa5sXc+j2WiqKw2efIlYDM0yBt2VYN4GKfV8pGBc07I +r1R2y0+T6r78MlVd1SQD3owQ0f/v/Q7LDsJzLYywBDlaEd/FICspuYNvYeEGihVJ322VHovrBlUK +rj/DurIwhOlutjhn1zDhOUienRWYCQm1wys/y1rqJcFOAK8cZ5G7zZwx6QYRdoG9v52lgO2FJTI5 +VumD0WyQ8UQgGjgfABL3zrwlJ2slvLyslQjIcYlHEHJaqoR/hx5bZSDOnalNZNxrda/XJWSqxJxT +Qmk1mydvsrnurrzOCAH0bpjRTq79ZjDEK5Lbs8PnatvvrzTzHT8l7I4oojVnSsEOiTMlmKNWimei +bcWWXhjoBRWgFb/TjkVCqabVfO+SmbP3ftu7A4cs4jHlAPdxiYUe8nqnOyxPxeIvwrBX3XbEFsmM +GYuWoVZPJmJFlfZdIBpub7jR1LMGLSZuCxwLEq++MONNa70MRSieX7KNTiAyGp6veWgmOp5+1X8P +JwoKD9HZVQmGTM+/6AJZkbAEbXL7jBNm3iaEeo+xdCoVoXvBixVNF2Bk+qPzN2f8w2BP9x8HTTk+ +baQTSkQKFbcYKCNSgeb/ZbquEM1T7ByCMA0dS/nSfze1Sfjp6m8lzmCc1SUF8zykdAZR75HDTe+Y +FG4vUHLuUjhg/RPGGjl7JlYEEL4uhaRElCtKJpb7VQuUOKKnB2or282OuohnIS7nslhkoABP94Ja +/nUw3mxyaKZjgoTHlYRqsngbggKf2WDHD5nXGtMavEs4U1BMEJJDhfs4l71OmNBSlVeYOh+AxQ5b +8H0vLFgOD/Ds63q5VPSI+Jtao6IOX3uFMEYHcK5il29LJARt9AdyVH6VRJAs01iomGwINgxmi/Ha +Ss6Pht1zfYFpLPRIoNLKzWe+jBS1hD2yHrECQvcIx6OgWLMruV8juCXjIi3cs91hk0/AXDzRI5O+ +4E5prla7uvj7QOwYx/u1el8BL3r4qAruG+cXIncLzX0Y/koXKKvb7IKKX7tLSPYG7T9zvZjhJXqv +i66454mXbimrrzPfpaQ11dos3AU+zqngH3qbdUwrLkcT+nMXytMuP+FMTQp/daI4D5TxNaqERVv2 +ewCCqaGmf4exXXUpsah4MydKg0QrBzJSqccVlToqexQrnE+1mAUAWLg293/nAmPVp6N5OQk2E/zn +Gag8dA9CZSi3rUCD7Hzd+E7JXeHox+h8bRO9G6MbXbzsZbTqNBj59BdNBVeCMhhy2X5pz50Mmv0L +wCjyTEn3UO64ftXEJGKDDpd1CwkXrxRcO730UNyK7OnRCs6VJjvLob8t1oEVUtC1+9g+9WQnuBwe +UuS20aWrudKCC5zyV8YWnvVWXHrSGI0QBbmffvrQAgfIc4aUY3l6h9hoXeqiTfQZE9zWyrkoe6yq +iDjK8tHlAefJYnx/bJ1qD2tJz9EQg19kf6bYmn/CFI85MvqyncQcTH6uXrlPIm9oTNL+RxCuowOo +qhUQP8INmyyoPnXT3pJT3QvhYLSeVvp4QkCmcAYkjeZi4sdzS99ktPzQe3K0JgdzyLtex7gX8RX7 +/LILJdnqkVpiYZ4ePCtNELeKb/AjiyEBI2B6VJkbxHNOiqC1txBslQe5bRBVmoCWAxRisLG1adEl +aYrm5BPyg1Vg3a2Rthat03bQNI8GOshLsCH/KyP8KcXzYTmTmmxaWas+P+/SRwVfRqJ1fhHblAID +IwEIbWj4z3WENxvXfQqFqR9qNisjZIMcGjHf6xot6E4jFxEJea7GxohAyHMNH2ztxJTvWblumumi +wN8rzMGif17mPe3qWCtsceqDTbvmLhbq12RuRxGZZNE8cgpkUpqpnYsULocDKdc3UEYZniJQPmys +OyAYMxOaT85dXPEIf4TVoaekzix/vaFt7HIrADESd1VB9ROP5ukMIyqtjm/HQ5TKxdlJQngY3slI +9BeEzZeQuwawffcKjRQx1nFC8YJqp1vSGIyFLbnT+YyWN1nfM/d4LHUr+8l+27ElF+2rBG6cbVd9 +9vKeBVcXj3RdRB+9rGqCn0YCDwPZ8riNhoS4nY1hkFdCkXeKsQSF6agoGPmaXKScBZwI6HPYDYG1 +13GStG9AVB61AaND2JaQQXyRepLDFcCkuq+zCXqt2KZLe05d6Dyjw4W5Ayc5Q2oSvms0rR/9dXxA +0bAvntKbRoMBpM45abv48XL9cys4eyOTkSWrT1B/oG5+YFusXmf3s15WZzq+++Ly1gKQp6A+K/NF +Qj6AcZs9Oo04W3FqjGFfSmEGLIQbbWsuKGXpmeSLs+S9+4jX8q6TeKDUIj4qfNk/VvdSs4nkMLhi +AIZ17fV9ErQO2TfjrmPjxoMaT0PES5poX6qAbhopbCcWmwXc9r3Q9mqwO8M0hVkTKpuZK7DhZrkD +pHkaeE/GoCvJfU63dIH4IqV4u/g7Nkpi5sj9O6JyjaM8jn06/kmdeGBWQ2zSwfNdxRbu2AtHvg1m +NWv4ypTCLtWyy6QySmeGNt6/fetCdig5CuNjDzq463UxVnPp0RYq1W7KrAxTA84yZyhdV6Xlrjl8 +BhjO365HXC2dm6cwn8S74ibs8XB/SIZn+xZRDl1UHfqtxN3kntp9cTONEWu0F+NEjP8JH9OivRoS +fKjS988qhql+GOCBarlnW4GdorCiYHqroAzK6HKMHgbp40KNsvxB8xI4Yyp07Ng71upKwoXeNLeB +y3P3y/uxaCfXADaedafGYdmSiR6RuyC5bK1iV2CT8YXPrVLteZe4jE0l/1Kh7BG3OdH4iHZRYDBD +G7+k9dDcXZ4wSDi9d9qPdFURDU4NNK3MJWUBkPS1IfnvGQqzHplidn+P+zdJDdEGe+5fI6OiECrt +kVQChCaPzSGXhIlpPmIjrnoXaEwjwg56QPSgM7Zy1LcnOIlgjSX9vxGEnigeZZayuptaFQUSv8by +xSU+a+oYkGW6wvDa/AXL+qeqJsiF9xk1b+KnmBrnxnR8STdxdvhzsdp+an6lwnHSukkeEgWHf0F+ +FZ3Cn92VdA6R5RPW0K6RlERro2XFAFFy2gA16S59chiEEz1o600tM97iJfFyVsM0Zg3RVq+xG6Ev +XrrgUxmG5tofe+V+YjJ8wcQ7MpfvxSOdtLx1WBr7lHPmrHJU23uV7huIS/Jnp9bSsOCW5m56ln8f +KzHwcJ08i1Skimbj0g5u7pKM5jIDXaqNILUEXFEEPrQ3Ys+77QeFfP4ZhVhKKjBdbdZdaJ0/SFLd +iqUyJRDnAwkyIhjUzmsiHJHfoi3RNQinpnF9tWJog6JiH9zVfqN49Qhs4jlFlwlg/BbB29cGewiU +n3PvsvZW5MgYagHx5O4j6N2LR7kTeMk4wPKMVCxEciMLPZcjIuMr/6YwOex0h8ZGIF6mQbt1x8gl +JZCyWZ6IKgPFdxv0QxKVeKpjrGT9k7l+Y/hGRqt8XySFdSHE7I6sIzufa7EwQxzdLe54r5MLrqkL ++Dd8eNklObj6ViZ7V0usKwXvojGkSTlgh5Ax7NggTNYm0OxhdxADMIYvv/dJ/52/bl9lHW2cd3Im +C+YUgODuRQLWbNaEhZKeFtyro7xKKlO2AFj26ZvWicELnEm+tB+hD55XqXjGQ3zwET2qSGF3mucE +2AM2KC/zjzbl/8+2/k44RbLO/owOMhGCG/UAk17n3072VALAJiNOHt3RVyMTXGKCw8X0qV+4lZMw +c076y+FWgFWDeiwp2LWdLkyElJfv17aEuXp6IpbVMTMJtGQOjyrnjlUH6f1IxVf6jbPlP3D8r0Kp +E7sk+zLeLoS1DCfT0NXU/xt7EHEsI6dFwpEEmT2ReZtl9HR2eI4TNKaoCabUzAd9Zu2w017qphaa +bQYZ46aKr6uGugym2MI7NOyYLjTss9TwVnNPGDKX7ESpVQ24Kj2pkhb1iOswbCpFGEt0xi+uH3jY +afvT7wJsVxsw6ZEBt9AsEEvuXr3opH81S/LR7JtkZGmkl+mLaUdy8cBypoAks/7zefdFUO+dCnQU +tXTQvEmjNdouilChenqg3RhxayMdmKROv5SFQIjU6e3ZlAMt83HF/aJAtexm0UJsBlSFpqtfzIwJ +AflO+ljp4+sqQwREswkmnsRiL/dnAt4tLTM7pLIB4oHjfThCrURmbHIbYxcyVG7IlSYweraVaIWj +CA6i91or07kZ9RmjH57/Q+ypnN3rA2PeSpyJmPrdZFSpEklDWsKDzBJ6qYNCf/+iaMZnnsOpNbcu +ZcnmJc98CKbgBR6sCzYaQM1MhonKwv+QokHbsB0Gqt/F62Fat+nAkMAzkgudEZE9G+4euXKrBX1P ++qXFWuLWy+oGevt8msxr/vPly2/+euFoQzoLfKkfFrV1wZW/36bMIJce0cOkRPxlHLauLRQP/T4s +WbS5tew6QuKTI/xeJPqkPdY9wfFaZDoGAFfhelqqTYw0fOeNJvcdFl7nQlFrYkvtvfX7LbckvfAz +G42xUPR5V3KJhpr6gXguB78hvHAXV55v+1nHIVlca3dJmS37yrzVPJGcErcKZi1YfpRtHScDZS4l +LIGoYLsFXE1fqLjlTadCkTyHHNu225NtZxWfJEPg+UnsH15dHf0uDKB9d0jG+sdyzMz7eNXjDTb9 ++GiONqBqdUy35eZzuCEBXDGXUnYUsAeeMXpG+a0S4pV0d2tMBb7WS+nvFaY9Vdz1m2VTVQ4Uv8i9 +ZVEUHeVzZbYEXDiuaZmt3A5NgzDt2Gr68YlqdBDPn/ovdbhe2IKDtf2cPO3U2S+PpwofqXn1Mt5q +XTV+aMaWx1Adexiwa3dBjT2UF/bReqTLVZf/5HkL6OkXD/o+tLish29bW9WeCfdMUnWy/l/npKhe +oRuI0k+yI8N3phuX9z+pjXqGHLVNJTj8k3gU98WnmounN6h85uJndGSLDSJeA+j+O+Fs06gJ+dQd +ZdtHOIqyS1BX+TaZWEfnFo4w4YRV9awdLvlEdWISfXjh3Utvg1546TgJAAVCTOxRe6F9iMLj67hT +mrhhIOuKnBN9BWBluBU8Dph+EJ7vxOEXSj4F332BnyDeWJ3Ecq8lrbU1perKdeJNrwtS65GO2Jrh +Q1u6RCQeuXj3g+chvWZg4gXb2FEtWn3Jw+FqdiF3CypZOaiv1/+B85KUO5CPlsQL23PtLx4E/CtI +zQfriWs+cf5jMWmMMOT2r5RjyYpsOajURadYEicFP7rSneojmwsdQlJ/iweJmLGjCsIyd2+DhWdg +4Btt5HdNsgh5vVx/1lLGgO1UHWp75dzFDRk+k7FuZBCuZx08JOn6VEGvxUJQ8qrri5lhgqZjuY/4 +bfn74aGQ6dhc27LUiKqCllMMf5KfBJnnGJ29MW7+fibyurRCk/HoYQZ0IqxWu3VC42p0lCgEf3DV +6ec5/6vaSslqeYaK9+DNOteAkRlyc5GyR4OEAggJq9y2lOWWD65raTyQk+rceJgFZN4MtoxvO41H +bgAHTqA+MJ/c2NTcMVHhZDBDJ3igPOVJz739dWVrX0Ex6YHyrj0FcM0YuyVslHw3TSvFcLDkFUxV +SeLsw08haaglXWDO09n5vedu8tI8m7qflWfr9CnlK1w61sxyG4xVa+/hGJcKOA+z0oRe3XHbDrTp +i/0QW0khpO+Qi58A5Z9d2dywr01uQL951Lxn3BF8Zf3rAeXMrG3T3FIdDQ4FQqmYM63172GuNqPD +tBjj0H36QPDQ1ev8GEGHRCK6ZJF+jmCGjbqadH6pKf4nKRDTZUV06Upq02uyjWhVVLb77TEWvzpK +JGyPKPTA1pi4I+aVYCZdElZlKSMCZS/HjcRmZzOjsqPQp4gdzGgtguz4atYmmRQLqYGbUT4jUvOG +M+SG/UF3fc00kT227a5L5LTr9VOssDfFsd9TnvJU6Y4HbSCQJvFfOWH4YMeUDLfShAdREM+VseNa +/Uk6Oe/stLRzqGnRxixi/7Z3JEYD1WqWPLfsti7ahHxdE98ctH38KYuiQaq+q/w9XzFLqSwt1mW3 +HzW/BXFfckhSTqbwKAHIUqcDtp37hfSLeed6aivDqOYLLwqKHGdBOgyQpl+6A2Ipa5/lktL6TCWt +JnJltuU8zG4PxQAdC6wbfnc+iCYvFzO1VMp8b1LyY0J8hBiHRpvTY8QRYULuvHPab8HFmng0fssM +KhN6SFKL0JM8Ov5qfaCIICNjLlHzMPik+sLo91MKGe1z35c5GgjSAfoYm1N5A8K1qudY15ioljea +nl6sJslcjvfkx5pnO7aSSkmfLADfp6LARjMxMbGECxaY2LlitdTVjGGLAJ4MSbTJMZHKIHMPSVxB +OXnb9tkWVTVfmXJ+trTilx5e4XW+cZ4PdrunKz7Wry6iao/mfTRPbdNeUMf5jWmghuKInhOINOHp +gL2KSX4cZXJQvc+JbhC9ftIDA4bPSi4Iz69gU37X3ItQSNRkfrCpVamQt+r5N9SfVOTx9yhrsvLV +B/xiTx/iTKW5ZiGb63zWiQCZN6FL0Jm/0m6GITGOQoeMMFljcExKueaxkWKZn3zygk6zjRH9ZEqp +AsHQCXxzTBza+eiyVekrMTNQwAm3zJjaIx94Oso6Ax58LpjXg0k0qbPe34A2CX/N0OXIxhPhcPcK +/r1nmDMOq+O9/x7fYA2YPovvEfAk7JHBH8wXCQFEhRnW2gNyH0JJfNqDJK8VTxZqYOGVmAVQnvOk +MlN3XRSmNWd8C2A2CaJeDpCihp4RoD/o/KmIa+pDDwFznRDn+8VklKgwDSNjblKj+t0b5A2v5zLU +oeuCNf3FP+t1GQMIWU3ACc+Scj8soFkrsWUPdqGHDBZRnHlDTZbFqiJKTjWkKLlyNpNjkXxgQYtI +eJrLoc3bSHGcX499o4EDKdm2JyJtWJWUu5CYeldXlVaDZJB8G8ysf/P3dJfIw9/20vRH1tH0eqcE +YWjGDZGhXb3SDikcZyXs9Jgea4bqDCpzZUx9YEVSpHKBUPzXd/dnmymDrWu4Eo9GprXZTqO2oMFp +Qvuf+vMY6JLg5aWwU0jEmOe+z0WdceTau1fUlveT0P7m56HIjJkZKGbn0xM57veNNPFVASzQUBgq ++rjlyJts86bY1EUOCwTsvBLTbKb6TpIOIZoi7bHa7WsVc3UfWiVsMv6E3iqtkwaW1scmL1r1o51u +hPbJ44y8vRIVu1YpXGQnlfGaRwQ6Ox97qIhT4TeHmm2NgI9E3K+Rybml9GfpPuqDLTMFCxPiIuUb +pXU8jUkVxtvsF/jTQkrl835G7WXIwgiztlrXTfN0pE0VKUWwlBkamSK/+Jjx/aFu+kioP+YJKJp+ +MmUaSbHYjr3ypSWNL59bjm++M6NqgT+vCJRLZMtREoZXCGVUCdHfV+ySDeQcDbPM70ZnZNaY2Lym +HPnih83bogSrgCaTwjy5vHxNN/R6WMepHw6m6KcIHge9O9/3zotS+ab5tei9bFbj75qjY9Wu3+/V +o8edr1OjlUPd4Tz4AGRn/KEjmZ/DuvumHsBBcx/GNaThr/gYr/8G52q2py8kyZstdKVoIO0CKp6k +6agzolkEEyaLfzLdvJiAXwKADZ5YV+lo3IrcgBlsuNxSfpAphFnD51nL+ZHhlH4QQAx2GG3cZqdL +6tpP71a3J55M5hkvFw6FRrgNDnCIVydGmqjRKGH4Qnogqwev1ZfVeSx0LlsqaacBSdsnduWKrvh3 +khG+BRXG7+gIbMUbs8iXAQcn4jdxGN/nARbomoi8t4AijyzsEZLY7nSXRxZkNeaxkgX/LlHaSGpA +Fvhdm+o4WeQxTpMHpIDTgo+Fenn5pDSxHBsgr+3qlFtQpBvmfYt4SFbBXm5GVRb+z+IQk8+IKvaa +v2i/RfzryNSb690wN2wQf/UdH2wuVEwL/18pnRcsJsHzJxa/ZXT2iWz4wb97XSlNzVYA5jb8vlDH +FL63R8y3IHYAeVjgYZoDB4qY8RNvmrrlpdgKj39aebozUbrybuvQ8kzPyuR74qFDtKsAxIGIHVps +AfFis4hdQMfu4aLOvt2Aq29GVBpv9weRgwi4dnVf9S3jXvN7hQnLXo5tHmX5WkUES1kPtaZ+evt9 +Pn19GMPcy261+yObuSDiL9Ag/xx9yH5/b8nYXnulnBgRSOE7Q0BtukipIESsWLAb2+Tv+4K0k5cy +Ud38uR4h6HWM7BiZZLOkBmaWXq/5uwbPK4UjJsZeba6h5YNlMaN3gmjRuWNJc2USoePsMv0eNomr +G//nhJ/68sBtXJt7/eSHJFIXLWeM9mPXx8lvOViUzRPo8V9/jDMmr2xDpmzWJm5lKKyANVs4+tKz +63wb1NA7i66vZFASxOFzY2Mu30xY9Ph9pqkDqZ4YSYYzUliU/AoN6q3XbLrYEwL9frclWbFCqxQM +q03Mby2t3vh8rzP/HzPpG7AfkbNe8jQlDzWV6VkkLh6WUBGgligrRGOF4zToDo1zjjYKDLO6d09U +xNdgF0UL9CjBMwdShfsh3riONFgis18j7/JmqDUNHgkuQrrGNTKs2gWz6X1h/hRguIAQzdr60roO +9ZXo4++khLzuB63Tf6VZ/eWcR7EU8RCPDNWg1+W7F6UqFdUxi9yuwYZC+dcSjorzTaXblewjjdIY +h8TZWn1ezBKRFA51ewNh/Ni169mQmC5XxmjtgNds7xb9qW1d286O9h6yXkb7grSFUKLtho6rQDXN +yPMaiNPIOWqR7dGfCcaDihFgTwYEkkGhmmKtePKX6JiidyBv0Yx4b3kRsUUkLdhMZWdx7sPs8+WE +c4OexfJiM3O+vaz75dxNIgQYgEfqMFszuVWQcL82A854Ojn12Iqf0TDCXItVctU0IpaU2KdmOXI/ +dEUSaZ45IVziCQLchcjbUBFwb+9E3kiir14LT3Ayyyt33IhZ4V2qQyPfHMW9NcnomlY7rbFoLOLl +nEWDrMLJUtsMfzudzMoG2NrjAJ85e+RWaEDorbNsB+3ZZrLJi+QvooEokRmXtuDvzWiqUYVJFjE6 +FF1lw3CKi/6ho4VVdivW5DaSYVoTmf4LX4z7JIjsn5FBAbIqummeUall9jo5zr63viwW3WTtKj6M +Ihm8ZZM3EEG9shkZcmFXQsqgoz3+6HoTv/C2+5UeDDxS+g0zheSvaaLNLz4BkErxnkrv8V3OUln3 +HWJrEE1nnI88LGG+XReE2lpVHmY81SX89vHr302wQPHhzmTSgfwP+t0IcHaJn7sfaGtDJm1azYrm +L55MwgNFIPZPe0OAqbasxSobhiHvYpjhodHaW2K4BloAA242HL5BieAPofbS/X7+k4j92nCobS5i +c0oxhIZJywrZK2LJFe9bAEozlH9jTDwun8m1c9eTq9GXQBnLMyw795YnFm8scjO8nzO3CeXkBqRZ +9Z+LztnDLeBLuObVbsmjlozfpNN6H72OdkoWOxNjyQBeY3ft6AsLw67+q2eYLbwWjr4Tgd2QKcuG +SYb9CkRPqPIi1YskIu/yKUeMMcz1WUKfDtdi8cUNWPUiOQEqkPcqEcNZs3iToBBwRM/jfaxLVhB6 +cJ93oYu5zHzx5l26d8+7Egw8Nek8F4lzO+dxMv4In0bh25AhmOiFjYVoq16/bdESk1j2ZTJPZDZo +XP6ibc5TjCjJZlxi+QW/wC22FGCzvFIa0OpWsrpEULNURjjkabHFZrLjoq99FSPnDKeq6wUqzCdi +bU1ob0Rq8gWIB0nxfhR3j2Y7YlfXsOWwwpxIphPX1O/pGpHHwVjHy5pdEJeBP/3cYLCisgDWtqk0 +PSQWBQ00RD9aKNHIG0F+BD9xxQvE7+ey1bs6BBgEE5RuhYpS/tLLvbgyE1CDsTX4GwFQ5f5SJ8il +YRoAJf371kTem6M6RWUSyZnCirp0kYsy1HF33eJBGxd3peStK96uRcC1PM2KAsVjrctQT5xF+rVu +ub/8XZUug/tSXg3CSEQFaplEhW/xXjj6yd+M3mZ27l/vrzlrhUxum+dYa5jgz8rfV26DJIBMwERe +75NgdF+QxjJMJhyC8OLvGVl2yyLJOLWWMEX7BhuidAp+dQKZs71tArk0pWqNG+QNE3G1rPEkm/rW +GIE2F1a9iB2hsogQZYlYhriFDd35Vt+4tkxEWm/ZtitU4MfKzS4WY6BjZMpijX8fM76/ZmoHpixH +tmDT0ivsGGYwOUOJV1ltyIO0P0x7o636lfI8BRksrszp/F+jXg1mSQCkvgB5LbT894iZVnvP3yFT +VwwEegONoFNk0Q7vmI15WXcld7S7o3g5QDQYJdt2+LXrbePP4IdSKQFruddnwtc6MqPTGxrNDgrn +vNZXPunoHmjaY9piSj14hjRULufbvIUT0yBqkVhAnC4Bcsx+FzhSOsHsK0Wm4FNkLVvrh4ee78OR +VqTpEPmoVJIvMu8tqBcVz1HEsr5ClFwMqqorOd2E+IJmYN8mylijk2z8KG2g9XCTVheYezuYiuQ0 +9nG+MOGbj1SNyCRl66dqburfSoDAusvTzT6RSnHOouTLzwTL2Sd0WL9qIk4rR3xA6WUsr0xdTTPP +GAV6t9gQNfzSBUEmEqWwEIU9unXu/LDJC5b6GTVGuwT86a0hQeDBRNcImYNlFWiDw1qRvjk+9yvq +vEEl2wkUAsk8bo2YcBzxfD42+A5lJ3564MpbLMfO71Sv4IZWszpk1+QuoTIIxd/sDVjJ7ziBSZLO +EvxM0ytH9PtWFklxudodfRN81rKk2NK0muu+z0i9n57LlmfP4KkPrTkNKIzjPQkvWtoooEutAL2Q +LL2ycxMERVPleRFR2f3lfw4hTSH3ZBKThKCMcRSr9120tf/xRstcxpgkXOnlwx/aIWTckqWPrApg +WTopp5Jxz7oQRWJx8gZ4yB+vYl1l1fNrhvDu4WKVm10Gl9AVY5KehIDrHL2FfGfOV8hXz+0/eJqh +AGxSHJ+A3gqGK9cm60y9UmZ1TOOI3I3hx9C0h4su6WaVWeNprL670YcV3iymWiP98UqdtfeAjHFv +doYBT06sjRu/QP8v5o6RgIc4pojr4E4EzHRN5Zu5k2qKuj67TI0mHHm+le4NEFVCIRVxxMpzoJOZ +cTCy1nAbByXoMpO5MgNmgkmD5hN4AR8I1ZgZiLSupm+YEwrvSVPx5mEYI190nmshxThU5Z0jcX7q +uiTfeqcgEBUFZP38+hoEalbe+CPURkJvZ36C9HWJSYCGrftcQycF9xu8WYZq4uLfI2MsWaPnTIyb +VFCfi3cQSNR6RcPZIMhMW2slJ5O5KOe/fIrfA1lMBHOb54Yw1q+IU0FdtywYbpbu05LkIbgiTWjq +FUXy7GRtry8yXK9VxNO1bLF91tgIMAnBZE57CYhHBl8Rclx2TBxMjXI2dUKBtDViO8XX+QvS8AO4 +CVu8XdgurhnI3HYRO0HLOVhd/HTUR5tNl876/j/mqGt1Ny2n81kZ+k2MWBi3w8uLFeATJbcJ2Yqz +fxl10F0zWzZKf7tVK9QUDPx0+CCeMOKKjEnpRBg9CuDP+r0yQswlf2npdbqe8FI1bJHanU7Kf0h5 +qxDGtzwgD5WJJyDmIK1bG4op0UfUKbcKgsK0ZeUUG3Yywx5g1j9PrPKgWNn9FowE4l17xd7zKDxr +2ZWpB2N5JSdCKwOU05TOexkR7TIXtBe3N4pCJByK73MksfFkcrw8hDgn4zT6gDE76+anqorvsd9k +ruwWBCzX/tisLil1Mduqishdo20zY9RFz0uyfmNxhPX/0jxAElyYfSZG03BGNT82nul7FEWiwleI +6kb3KKYAc10fjlHeABe2hL/fVg0guWRr5cLQKyN4pWuByu9hWdXEjiHTRhdNEMbwbqjredcievAd +pYuvPIeM59/dc3bB6F6i476m8p9YyBEUoSLWVNVlYsX6yRSewHyqjx0kktPuldblSg70qawfp1jU +muBLzlyx/De0dSQi2MMjtheZBJOAptGByRaXQPrVGBG2Z0ztV8ZNTegAu1Mb9lL9FxpLZPLh/ROu +PNsnEBD4MszGA/Up4gRizf8iBNEXigtQu8pDhXBfTzhNiAzV2NAIFPpvwcx551yvDDfvkd4flt5v +vAVAamyYloUWDTwoXGF2Ic/VeLtcydc0LpTLWTy5kmROClbDHLxBw5WlerQTCPakB6v/1Beh6tiD +3toQ655zWGREB0b731Wn62UxSBoYFpPlTTOtlGn2mcLRx9xZDoNfESFmVgBDI3TYGb+SZZmk8rRt +blNd6Pq2YtYEq6fUpfKlBrwpNbZfr5CBrAHxZWOFmf0Y0Q35YtKepA/rBbz6Gg4NZ3rzEPy8Q2GB +kqIBDapgqcMVpdonmh9xeLK+nDfUrFOQkUrApGdH7jv43TKy0/NOLqV0a2YDIoWiuE8jPySrfjfV +Emgc6dLABeCOxkvoMRxGQU4r2xholPQxtErjw1ryXW6f8pTb7ZfZHlp0ZCxNHcD4khw1mrn+TNfC +yKzqoQvl+iRNoDFp1j/uTiUH21b9IGT3E7T1R4TCnFgqmvMc0hAYFVt68NRFjp7q/for/MdkxlrN +p3xCFbVNphSMHwDfUUHGMrhnt4tqPYX0j3YLzErwwvGBMqc4eaMJ8h1+aE9xfV2vxlb7q1eQzhCx +j9+HNmw9Z0yGtkVOC8Q/Vk4+8GXyAmuywY+61TV06RBrFNLZKqyJsQ6bvCRc0oiMMSWxp6nDuz6H +Yk/IePg9j8H9ZJmgkmdnMmNjPpaVdHNDfHbNfM5BN4frlZoMlSF/f+HZpm1gy1+YJAEgn16jda83 +b55en9YeEJ+TzFSEZZpiqX4wibUrddyHIBbhRXU2ze131MXH1oGGycEe8o7d8fnTpQX1XywiL0p+ +YfUqvn0kqsHHEQ6IxQC5psV2RsPAA0NRhqw4pV/tgigwPhiIsZdVzsTem9xM7iu45lFjcE3pL8hn +OlMFnrq/wlFTsxVUJCCA6ZMNOKLjF4OmHY99Y12Qn2NUE/l9Kiv88RFTy4zz1GK1hcIn4V2rtrmK +1bzRCL8+fRSisWQznDJyVrBuW0aPgZLRxfJQNPu5vJCHaiSRLqMwNIp/yBbaOE3k+0MSGu7YMwP/ +21C7xhJLcRGB+5qGnCS3LvjNKbnT1Rt2Vx3P4LWLG6GsfL8OT1uF3j1TkjdoHSx3It+qakrzCd6k +QxZicxuBdVle8iUOS0ZZkOZ5MzV+jKOP+Jwoca/r1gk/quXORO74C9eAb01drg3bRD7JSZH7hOqR +eRC/inMJIw9uKcyYJvPxaXnJ9aDOnAMesin08LvI+d0jhcws4G7bqGEcDa8pJRaQDnwMq9jL0rnb +l9Yf9bWuXsF8Kwql+1i+Udz6hoT3+rJySB50md+IgqeJ+EfRrhIp15Hi/RN6VIRY9ywGKg+ykf53 +E7apKFq++nSMlS7E2+7EL5oJF68ctMbKxKobu0xWDWBJnyN548tK2c39tHACsxE738UdzOvgP1MG +mTBsSb/UrSFsFhLgzVo8q6u7d25qR3VoFHha6SpwIbyfAb0qri20195620JF9SYi+gyNA5CJtJND +8fr6IBa3276IcUyIDqusOC1E/GS4iwycfyDmiMJFE39hiIFZQDtQa+TCF0eXQBdTTiIYS+Fu70jh +/xfycns14fl7B44k728GObdY97hW8S/4pAOG0H5oQihyiGonOplnPZCr82QsfV1O5TXjxTqtDELH +1y5z+oamTi8OiFDTc/KHMXQFA3aBuq85I+A8bDk8ZbDzOhsIiiWRcv2lM1lcCrun4rV/Y8s+M96I +9pAzK9I3r/PNeonF4o5sYR5eJ32xs1wifCluraIHpZybCDi+z3krqSlpZ+qfjP3qS0ZoNUHkyQAG +RzA4294q/KfkwJoMiAOyZuS7pEIc/l1RguY8udxFr+HjQmhbO4+FtPcJU99UKkdQ2f1k13hW/Z+A +UGVQECjxgbbmlxiNbYUVG6vyTGzm206OloY08dis+ZseuXDLVLXX0TfgIpvzy7jZhr+2vysxCj37 +aNDiyYdkJ6mwpUqvKwyBHn13BVsj08uzYuuKUGdXNa0TD+L+eUDN/WSti3aMwhz844QmMFfb7d26 +LY93nJ3TWPPAnHumiZSbzu78BqlSoir5w/UxL01L8tsP/oxjyOHx/Dpl0fk7xhiT+uIqyg2bWvNp +0dL40jdTxhWPTp1Q5UW9h0+AOCbjA5lsVZVjhWi25zyxABkN6GjQTDa/xmenYk86m7sBp/g8/B+5 +crn7Wyb4NNyAINlpqbJXssGuethwV+C2WuqEtMLjwiLl68oaJg70FlfSLKOhN8FHtI6vMY7Eo+wZ +9hLA069XsdFYZh9kQGl61xQHxR7BUF3TXZkJ3KJARRRDFR5WKpBPNDM+DHnF4G87lnjBH2Fj0IAY +87NOkswv0U8dz8WKqMQ/ICLeCTgnsUP2BoYRqZtnNlmRLLy0bBo3onkrwDiXCLvjNwZE4kbdNfkT +yCIWG1rkfCC4n/yM/n8v1wRtQjwTb04S78mqAOlhYrt5f8CsLvW0z+ZOSKhlWDCvDkSO2aZmPevl +sKQGXA6W+vVTfguHuli8POi70XnkyspFSKqDu+6i8PY+obgoSsAhPsflWZoffmI6DHbi3APSCAxb +WJ6aRyxZ92bFZWTKRkJLkpcL1HUuHep11NCEHxGBK0AgwEbUR0TsK4J+aFuDyqGZoKZNVOZJjxQB +XEeL06FxmVhlsu3+miSVd4Ams+tXk75Es0b8xmQj8XaA4t71bkugr8SbnOxc6QBr8csTdyv3gMle +QY91r1eP5PDnPplnV8qli/WGa00fedmB6Zk+NW0YXyy6E5zKsKKIGPiU/aduXQmxMGgnSG4EuABm +2MuTtKQgNYXyKmuEYyVivdRTmO7Vsnq6BHdK5AJigObk91IH6Luienzgm38bNdKf6BgfxYyCd4yc +0BzP7n6xeKKL1hLxDBkKFX6gNjQxLn9kwUiSvwlMdeK9uqJa5aSR/Zw4Xv4AH04zXUBd+PSAH9tK +X/dsWgtXT06u9gMu4CaxWz444OVxq7UWFJFDXKJ04JmmLSDlMzcJfhK2GYtQQIjhba/5xi/ejahg +GU/esjJn2dm3TdNn8kVP5Tjsp1b6nXlCu7pdk8TU3/uqCaaNEZLqAStsOSfylTx2RMopy/YUWpc9 +CzoqonXVZGVOqEdo/xv7zqaatrZKyIAm8IX2nsinN3AKOe349dSDI/+3wg2m9Th1c3T66jrOZeSC +Y0PAYPc3/+ByBG0pgj0jd4DP+gEVy8d4bKVuYrOwvq5soFmibFO0YGZufYA0kDt01D0eQEZ91Ko1 +AC1hMncn7EhxFNSoGWU/eNlXZ3EgoW8mP5sph1/XUGyZFBsCx7yU+gBMcndah4+PS2Rp3QAOT7NM +BwL1015zxBRTollmTqERPKyqmYGonwN41pDtwiTJSru94ljRReoEU/H2GkPHIsWH9h8nsessMNYS +knBZ8Nzc+3NE/Ra8I/ykxI3nQSUsvXZtwqyPdUkaBBYNI3dKp2JcIT8hI2mo+QkWd1Xrlf8640Rv +JofUSZ1FCJX2erehg7dXuUb7YZ/MYsjlr86ZwzKDmk6qWX55XUwk0shERXbaeW+epjNZA4J4pyTO +Obvp3vc5z5D/WubRD3i7NUNz2euKqdZp5CKSkm0ciXEEO5CSXBILl5PsUf1t3E6FsYunDJ7xK9tc +iZH9CfFcNaWrt7lJHXkVa33R8X9LX9MHr40m++Vao5I+TZxp69HHkvlGbtiEe9laqr299fjyXf5w +CfFIhu8ybg5dviPK9qmsi7lc218fSiYeIMfAV9Y1d6htbn8aWba+/7st3/QL7gS1pIEVxX35Rjkz +9OR9Nxg/tuUMgtvTjjtHM50EG17oOYoL0Bvb6jAC9Ij7UPIt0aLcN88eBNIiLZ6CQzOADY80DSty +pq0mW2rtLqLnjiXKHI+psm0izR6UgUimKzzIWH89YwkXYaDsU4CInsKOpPySTtGIXEv9w5SV13dJ +kfik6z0mqX17XL5pxXLwWcrtqWyNsttcLj/oQX2Ce3dNEZkRxC43PxcIeP/Jr55ygydGPP2LOq47 +thC5u8PdcPe80y4DNdFuh07ZcT9uX5q3sVn0rasNja49VpecthtkvAR+W2QcBWbOIQBHqFpok4B/ +W5xj4/D/Zxa28i//cEpFtdTRoenaIfZQ/n5QnZ0bSGwirfF2XBISd3+PikSJAOljpThFwNCVvheg +13iLc90m6HoRTXMIM/SdnVs3y0jsEmm7TfDNoXnrCLn8JVmW2YhSwDxMCuDA93ORQ5FsAJPN7VIC +5bCr9Xa1gbDOQ64df3iyjcO6Y0kTVUR1sQuTb63aOmrJbp/x2c+I+XNnqrm0oqxo0Aa83Gz9vMux +xz2DhmNDt7V2OF6CnTECxx1g3Glg+MkIAg00Q7aUiN8d7akQSxSs0187YjJd2qO59JqCSVCHdBeu +X/QXEfDTfGpfH4kIEm7kCYJGMyCvXjl8n7+QM3+LBBDGTsRkZskn9Aix3X3Z0Gci9YV8hXQde+kT +XDSm91MhoOk7EzVwXotxZOapTeKqesE0SpZBKHZefmI7omLf54GU6Zk/muXftQg1JLBOIBohWbAP +ztcr4CdtYcWkqsBlndrpaU2iIe6qg6CccMnPkOBG+6aSz+O7cqsKNlC/EDJ4e0WqyjoWl8yrpG9d +wdKqgK6lJuC8O4KeU7baig1jImYrO0uEga2aeFewmJqVqaxFjsqpo+JQ+CVzQqcvqbJC59IIuqME +h+dVIIO4PBq7R61FWl6wSJh8LULV2OoIja4PN/nvc4c9gGyONH1+cnka3uy+3Kj+z5ZuLv5I3lRb +TDkMPemKlUC8nTGhPrXOYgRkVcLvIghIYzMi390wrT6Omwdzoqqk9g5BFLTq/InC0591iIXC+jxQ +k99JYDcLLuz93e92Kdd7AV4bgzWF8UGZDeqYz7AImrhr9ZvL5r65u7QFsd3P19gTA2g5Nl9amJfn +mHsH79acvaGw56moMSCo/+fcvCXP1DY02cp820+XKn+Of7DERnpIDjjWaxJN1HBRJ6uyowsUi+az +QbvfAWk8HUhHMwxXeaHinceeIBAfFgDyZMCl6gZ8SRQqC1tl3DGrxwFW3tPucLXGPaju9tdPbNbZ +VYIs91zC/YA7L2DIO6BkRhUSjx22q0r54zAuU60J6NfzB+LSFb6hQSEnbWViLYOCVjSWHqFtGleA +WTudDdEO0d0Fr2C3z/M78MiPqm9jQTvVuo/5E1cKypiIP2oDcu/FgsbWDtPHybwbjl843VIWnbJ7 +DDV7aLxSrInF7M1/dFOZ0HSM4Jivzdtk8cfhDX5c6tl7tZQoQJlDUgwLc32PslFtMNLGCMlfUHtf +0Ie6VdMNAii9vmfE9vzXFc02uWoBRt5O3bolJ+SOno+6k2uoscVfm+w0qaX6iJbUe99/fbg7eMPS +jviUgRSAcVjsSfIEsBxIbOY9/ffUlStKRhsBh7QV38pmXTO6XwKYZ1D1baLOWZqFnxwV9NY7lKyt +BAbtyj6dTXcac9LEC5rKg6OSQ8D8h1cC2LL/0MYDIeWBbhNgyIKSpjaa7Yri02xKFIPQXz6FnByH ++rjRmhPdvymjfgHvo33W+6zx1+WIqWF1crF4nZAAQJ4ymXIGgfhB0OZNcBYr0r/TuitK6ObWRN2T +LBn65XuVHqChfTLzKzdSraKPtmbw+XRju2q/VIzUFDl5ZHWm81hueIg+81x8jRYrhncxN/QuekA0 +VrITtqbsMiklp8Z8cjboQ6KTgWL2lo3+62FELuR2GDsTzT+5jiCMzJ6n0VTWKqmP+EcqnvCTailL +TXnSckCZckLR9jfr5zyOgvOugTaNdeFhv0Xulv+VfMTOC0F865S2ko3pFWAneIIzx4EUQKxNl1R+ +ct70/4cX1nmXsP9DClOlZ/dlxs9myCNlF5Z8DgPrl1lR+mhc3QzuOFYb7PV9kvSsaCv62t+fuThY +hjuPBqVEaLjIX2wWEkmoZG8/HvtjzQyUEP7+wnTjOy4BGVbxVL6LhZf8G8hTujlKLcjmmb2n89qK +AeSxkZqbyLefyNAdZNGo+a8MC9REQbwGLEB+ClSx1rqI7MvfvO4W2QdNTMrOIVN98QTVkwcCSBDl +EVzjx/Ep7n+IrDJ4cvXxQ8voFMG71/O2DpeVWTPbNGJGaRoCbu4QFZ7EY0DWAXkZVo1oEvszqn0Y +rEBYJtnCHyhwq5HJJ1+cTvQclIH6gKROLf+t07fwffSfDQyeoo7u0Behm8b3IdHeQmhjJ0wHivSq +qDMdh8f/zNrVoO6mHm2XGMGZggdYq5ooI2GNnLeJjzaEL1jzszeu8zr3NhmINl5KbqKR/R9ul1dU +1AwueMGF8XKDIioyu44vfvj2P/KjM0BdIJwU425mMekHqPBWE4VGgXm0yWGDO1WaSwdd6BLQozbd +js0dAdj0Icqn4hUMq8Wh2NHW8Bjf6Mp2J/jJdY4HXWYmQusjW0d5535CKkQPJqTQXc8aAsKmFmS4 +zqufWwpd5KC69cRqAnfQkIKtVTIi8Cmak4BXWjbSx38UYPIYwD8xoqtQIm+zaIJ+I4txqc7tmRVx +qgozCRsJXVRDd/Zmm1lSjsbxKxBf1NuUvtXjetaYjEmiY4u8dfVKAJ44NXdGKlkKaAjAp1VCO3gC +gBiKwTHdLJFDq1+MMWTe6SVsdLbB6GQG6mQiZuVzEJmwcsrbIyV4k79jt/eLV6z+TgTuP7cfdM7C +nicKO1f0rX8jKledEANWF+NFB1ittMofE5amQnH/R/TcqMzh1evq7GWx6nOAMWtrNTTBWJZ6s53U +ZSzPDAu1+GO93u9mtRQ3/+cYFcfH2WRaqckwkqg+c1m0Eg0jyllxN24SJwhDZd8EwIotG1WP7zor +rEX7OYLPxl0mlUoMeg3BF5heL4IX3Trk3J8ifnO0esnhB07iwxRAcUTX3BN62YJJjzVKJVygKTaf +GE3V5KZbVcpQAS+3nDnruADSrTvNcFhuzQJht34TZVZUgAKHA8yzDHEm5MIZiQloBxBVM1Yp+U0F +vSR9jTrB8woZ5BrIdLe78DAmRMrqAKoc1Jsc8fYhlodo1zmSfrNb9P7vq7OILDgFC3p2VFAdGxqo +BkkOLBsTSrC3/Y4fM4piYIYI8zxXKM8HtAC+jCExIVbEfMWJ1Km4oQcZHzIzgFEbI5bbHLT971k/ +OzXG2D/ORI+i5r5IBhkM+jA5k9AkK2XQGYrTqMk7Vu1Cikf0wluOPwxMO/4fnUx9JzNENYKz1Ga9 +cmjv5ch6/GJN6RIFha07BoGX4k1n9AHmFF70eOGGcZ/PKGJbhZ+NqmTvJsdQXMyMsG5oAoZxzA4R +ONMUThvFPZpNlTHUz75mmGttVUxvILITJmxH/L0ie+PvCU++nsfNBp3lTMmBALAoQSUutITFZ6Sw +SZ0Q9+V2d0RGt8f5BEaIUxXToi6yM3v4LTDAfb+zlk9PO6shdjl9y9kFd+Ur05QGfBkj0lO7QrkV +dKGJFkckZNl4QLJx0BrHp720avM+IHQBAn8J7Th5P7GNP8dmjfvivxqeG6ox3U4U24D1VAVlUwAX +KtJwz3tXT2cplvBSiEboD22K9Ob+nZX/dG8KuscxVtXvIOn8WSvwaPznKrIYhhMDC2rLPdxLYTt0 +2jTcG4oE0F99E9yVZ0FBDbGPjol7iuaQUyW53/C8Cr4ns8vXIA2/7W3ckNx0Y6QsgJ4HznYRaiMi +ADnsb20YIdwwSfETB4lPFxtt4Cc3zRdWeuwtbQNLV/0gmekj+vt6Y87BDAnJfc0nB3IdddGR68kO +Q8xZOATHRx6HqiCW2d1toRGa96E7eGZg/eFxXakxQkmqzymZqGPaBtM6K2F4QKmYoE9E27J24N+q +00x4GSI3geTFAqnk2/QIKVrHJZbKlbOdaJB0bwLt+6kbeaWwb2CgXWgL98zoSxFZWXCivP1YIWzd +doErcZtzgtEGPrlAvWjra6JSzVXDpRz3WHNW7nTpxJKkp9rvYimb9P5aPtGbji2Aj+BUM6s7kHI2 +25zufyKDB9Gv1gyz/PQXM0sv+P5xFqNIZP0PG99wSxGKGjVcxkmmV9VFahYG5bAzsnItDiJXkPNX +xdz3bANlbkA5/V+SltluRJlAKpiWx885mO8ku1lwaDyCGdeEbMlsyJmNruNVUqu5MsIUaGTbEUcm +5M9txNZfw+RNhAc0dxQ2ifolISdbzjZgyESv/8anwyeqiJiGpcCkoybc5nnQgJ60DPeOVfXqIVdA +SlySfnt7s8Mmt12ak5czYB8Nzy9QHT7qicQZzObux1hjJ6sFtpOrjMqP5BE+qCODr5t9sjsjJ5Rc +Ie0Mg4CQUS4X0MKcylSqGajE9/6aLf2twwAC0Bo3Wper8uhUYrNUk3wnFYyzajFC1/0SGPGJ+gXu +Ag16Zda6Mu4789mEHGUQMYN6Vkh834bIi6mSR3/aa48JXFj903sqfuNNUb/7RF7Z8a4nUFDtSvnF +Oa0AVcDN4uq0F5rf03R2HqivQieQdfzRbcdxz7lRRQ0G7+NheMFuoj0aVhVUeQ42JcW2UdYr0wEm +4PgwTGu9BOBj1DnWswccZuvVU/yGeLfv8l7p3Sc/RAHKM8tlEZFar4hl+4WWIpnTSvvn1YawyK3A +HMMwj/3hVFscT32wmbo2R8wrj8ShlHHltaTI29yEaaln/XRbB/UycIvkO+CRjmYWmO1jmMLLitGN +3VWUm6Xfl5NkrdEzKDPuVoDSqzDm84XzqE5PF0DvxWETZY8jxLk2+mcW8V8R8dEaleupek/x7Rz0 +B6Tse2od/1usDjzcV0Wy/GvtPh/4Ifbxowc6BKjWuV8HiyTaU74G8jrMXDxzMvjvsZDpsHnMpFC8 +DBnEPJkQH/AAQ/xx7lHDMoDgt438vz7jxLGhqUw0srHxVF9IWVviEq497AKxjd2bCKDsCZ8UDc4/ +iK6j862FZXWWQQOrOtNLE8BmoamhQD4KYSHPzaEuXZqEK7uBouEh9/iXjOgchFwpElXKO99S01cG +ZjH7Z+T1DnNzhtDwJ2DLafqUq0AMRDiHUcC5wZqiVTI57AhqevALbFxrdL6ZYS4ZakDz9FuH/hxI +DMK5asxy5Irwm/pRAwVYDojysu7U5Q+SV7Pph6l0vdhaueDKQgch99V85+moWAS0sfCdOh2IAbn4 +SVyiwPzoboA4fviW/w6JfEwn9OKSljy8y39zzmT+n3qrz5+pBUJuKETJzSjCNL+7SyFRX+zj1wwT +fcZ4IBmvhnyesK7p9FyREYf0Kjy/LvH+OMBzfSuxPNw2xtHeY08Y8GI63d8dmz6ZXAplXhW78Bd1 +urbeMNOZAHzWfgTkoX9Zsytx+g1KyymLlWXc4tk2tk+0dUjR6ipFMBGDfsy6LstVgqw+HtLtaxyD +bPOJUAIPkHU3v1JWgbcbkMmEAcH9B5t7L07kwijM72NHb1upWKtd8fmu9yJpzxH8lUaJokSRLlQc +3cRVeOSPLvlNiAUnT42mq6MewjAczxcv0Q86IIA7d4rnHSdphfRUj8aU1hZkoj4Ghj0wY7GyeCI7 +d3v6FC+CJRA6DSghTwiLZQLRfS9VtR9Zdo6ay4g4tp+aO2NfFdxRN9WrYbvM805s2tqAUC4wlVgH +mgL31ElF0O4FfN6p+GvMMilsl+7kVfEBpIySMt4fzh4VzcYSunL+7IrqDOLpS4Pv+pJ8d3nBBp8y +UxmJ85ezu6zM1kbTW35p8CnInRdxaHJlIafqgYXib4Sm7TPhkAHQKukLhZT9BfBbgoLOPdA6F49F +2JIeIRw2AQQ26xvS02l28H4BCGVdXl0b4MP9fgzmfpD+LWOnwUFCUlChOoIhOLe16Vy2r6aFWprx +xykqEwAbGdBacXsrljcLqMj8a+1BbT+n/KIQcuBm3Mddq6WGoSBXGQP09xX8zlBiDdroWx//is4e +YL4s3sVEozAYA6Ww1uqB+qO6MirCcrLpSVY/XankcSULuy7/nTGuAMfy8VXOQN0fGWIJu+31f7x/ +HkGIQPBQ7NpR1+vilrlmo6CklwxDkeOZA8G1heuYXbm0ev0uIov+0Ji1bY/YHo4J2ywTeEfKRTzt +iSQx28W2dU9N5w8/xLQFpu6+2Z/X1pLlBNdVT0VPmcg1pX648Rdqlg66yrsmUieI/SlAo9TkYeSK +G7T/IYXkxJpQod5Z7BuvXp4wY47DAgW3lSwV8de68DEieCA+jj4jG05twbsXiXFrWROMhe17a1WN +cCJPP+NaBkx/uPRhs75Jlw6kSkm2C666XQ1qiSRB1r5twNcjd7zIRdjrGa2sQYGctUP+7wDMSJTQ +OTgjzp61ll4DxUFawDeUlA2nrlfRs8SFKVjkPbufSX+0C20DPlOoIVmWVtCk6YeRXOBqJu0srL30 +aQ69MgDipiAiahOSJR8C3jfPoLGkjlebFTm+1Wapb1fp7F34XXkroOyGdsBdM2t/z9sN1kwhWRm+ +nD1Am9vXmgItSCXMBC5Um09rqEFdciFdHuWo3e8TaH2NkcsSOo0jlfxarfyB+hxK6VqUC2uRlY0z +Vcu1jFHeU33xFv1ZEK1CW8NlfisQlO+rT286pcu3IKjsaaLi+KBdav9zNOcVWJDrsly62zCbWN2l +pX0DQeybq5uUl/R3tgqO49zmc0JAFqr3pmsQVcT83M9Paeaq7X0TxXb5N3ugw6PbVIBO89L3e2I+ +VWo0t9Y8RGhw72onhFj8rEv1Z/ftXjEllgH816vJ0dmuzP0FwhctoJC9UO+lwV8lE8w568cmc7hq +edHRXFoHFGbVOkHnv9N0rKgqkP2z6ZQl7zm995Fsnx1XCPIVOJs+j9L2qoHIWsDzKNkCpJK8rtXV +HtepfRuoAtj2ozIb/A+tXmSyU+XNbwFgE4HGuj3IGVOSJ7bbTDLCWPn5WgKiFA8NZOKQY8SObnXh +s2FzH6qMU9m7NdZgpMA+5oi6g5EnyDUmpWNZ1wRjixB4IoCE0Vars1vi9zYck0q4/GYCGRfu7h3U +ZqiAHWtxmhsOgl3j/3PiLibjSWyKadcNcpPihzCi79+55NhMWceFhE3UTaHP0p2tFGtdmNmm++UP +zYL5n1UASglZZuqSkHo+mNYSJxxA4DQmx26rExnViGNlUOMWxjqjd+ZYJMG3blwqWN+7BANIeZq8 +Gd+tuIGQ5YlK7S+g/TWAg61ZaHCRrdpaH7ZfegmeOx22X9JUitsZ6QoyYGIVDBK33TecctdaHrV4 +7Elq82TefiIYv3O21h8C8cXYTw7RJOj4iJ9bSQa21Xh9LgsvtxJpxOOTaKVd8QP1Cy9Xj4FbxFKU +aL2zhaZlLXuIkbFfUd37nGDqBhA6DgGRKKpjpuoiJzYOe+jnfIgjd+DmbyTUzUp+UTRcm9oX9j7d +JxyDVKyHvwyL/cACwxWdqAgP3bHviaZ8Hky9TYUxWOFQBaZBNblLL+0245QItMCEqrrBG440mMBM +N8KBV1btp+mGoCCmczstfLIdEJ5w3yGLfW5UnQkxBa+sToJoYdGfZE/l9moB9Q6e0I7DAI1mKpzS +IpHrDxNPjMW3HvCV5hTrl4c2P1Xz6F/dKht+c96f8cmqcBEP6Cn2WPrE7wVSdvYJK4wcz3Y6+C4r +NMM1A8VcCkvgj8acUcyxWc3fHU0/VjOqAXkpMxlwZut/DO/DZXkODeuSrAY6ABMGOOfIzrkzU5TO +zCSYaFCgg8/G0SkYsBW2cEEL7ucYidhux3CbB1qeaOp8Wrr5adSvE4OavFsKrmlYzKtxC3LK/l7s +I6UKYKD/JIyjgx2OyBw2A5wuVq5CsfPZsJxqr4tM5oxkbQJsIvmf5SrP/CfSkvGM/FgVyYoyh5Nm +phB5Il7fjeyoGZUO5iQu96AHpL4C1NypvNyk1lOrb5Bwokry84szjyvcKZq4uzCHA3qZUz+Gnoh2 +AjPMmuy2zeTfPkjJS2Mt1WSPoQISAX0uoQvEwuzDXHxhiTFdSzkUKQ4qBQBoLrg7MMkZ78kHOaUs +0N4JgBOS2PHpraWN2fpWxql0kDesCIaB0cgJhjcPo5PumiMOKLT9skIjjec2Va+zOh4cJcjH/RV8 +iprk9kPDTJ+egz6v/XEthYxw8sPzvAlII9Vut13fw3F8Xms0msTYEJp2jIi40OhJEBwIJ+QGJ5b6 +Krb0EF3X8C1aBJ4MHrlh8my90I6K1aZlJzwEOx+z31aBs+2pYXj8iXu44J2J/RjgguM+WL1mcNRY +TSLZXdmPwGCfKUdnwzyc2sCKFOFcC7Mg475PrwebgLNU1pIdMB3hLx9OjzDbRZl5C5WYpPhV12Kn +oM7al2btD6VciiGXVPKIJipqlCcT/h4zpUL2DV0uK5bMhOb9AU1Jxy8h7WRy9cpXCR/PlqstUgHx +JkQo6lWeMRwQe2CkmgrIcNKuByeHkVOSW61glz8O2C6PfMhFNnY2Ld8H4Zu1oeb3BN6n9JWntuUK +MmkPfGbJ7VMHYZN8WkLktfUAYn8iBMzqjpiMlxmPRSGsjdmH2b2M+xf052fFfeUko3wLrYlkEzgZ +jVHXPjsyuYCJAJCWFtHIzWwx/8JyysQv0r2Rw8wJOn3T6X13aVzsoEmnNNtHpik79hxl6JWPcU73 +UHQ1XwKnA2Mz5dLsHI4HXOBH/mhZPqwdb7AQgzh7bvzXOovV0n2+5N+BoZ0tPyXos5EMBCph0tKf +SlciQJwJj/1b/rTgSJU7/melesz6yR5rFlLOwnfr6CMfcKaJ0M3n9V+6Yz5pCNw2IqduxT1YIWV/ +vFj2Tgn7UgrNh721ScGiEy0Zu/2GBATHjfL2Jfl1meLZpdiPaAzxsV8KnhrntZuiKLBpAY+JPtKX +S+icbPt4jo/aUefjvY2u5OzqLVuNKdd7RSFxndoImmzRnUA+qY25bzjmB7WtgYjAoy3Dnw3GYHXh +fmmlTenpZlAZEk/u0ZegCEvo8TuoC2z5zxgC6hWQUCtS1LrO5Z62s17OjrW/fI4JhvvLJGbeumAn +HnzfCWDbA18vkHMA3uQ37KyuEeEZ5lCd36hJFaRN5P393mQlpKqWZ3wxJpQERGEF7wultvyuUMxn +jweswnivnMTXbaGYMKVNDUhmSvx2iTvh4uIQCfekovHg41h7coRADThTD/J/lS+47XlbmMI/RV7N +dZ0rhUKIBF2TtvOF/HrJ5TYSQ4dk2sFQv7sJfDzmkPDG64Iou1oOA/6bPnzXOPHKkq0P6coVFUA8 +OS5vJWXbgcZgbaTtrwm0cl31nn8B4ZxJsC3JpzM1L0knn9kyoQf7dfX/jbv2Dv8tLSX1hxomzaRa +HHztRMZr3trd96D9wXIlnWni9FO3rNuvJNjl0tRwqjJ0dIkRpkKk+2K7K1X/p8YuYB502OLR9ihS +IosaToiz40OwhtC5d9ciwbCyQO+IvEPHXJ76hnDA5y2qgHtvuSow1c75nNLZRdZQ5RYblEg9ftZM +YqccrKPTmxQxtrsL0v8WxZiCGcpTHKXSq9RUk9NEt+ROa+w5RzxWgLeQCl0fGSgqLaf7Sr3y8TET +BqJs9CaX4mU+0XJA5xIaKDc/nkrAnrrtzyScEcfSxVXo9HuYk15hsibXXo2yCpQUYY0N1vVsslTB +kax+zAUJnjyzceC9Br9azQD/kpLnlevVkmkd/0cAos5ez0ruZvX1EAAnzdWXdVsLl+yNyxHWLBG+ +Cd9lvV3UxH/OrYLqasXam68qkDyrFeqrZmQk/Qq+kqajeb7Go+EXI1UVQ4/o1857awaVd9wk3C8D +9E6zp0yBrZCbn/AaISeJzRv90+OrTST0FHuW0XQ9d61j8cd3wiVV6cmYZIfYy0ZndnSgas/nNJE4 +PB5Rm0wbCkc5P9T+MOlwHnl2XO16NEblKJkhejMyNwbqMZOppgo8MgGWbpYS2pvrtWZpbV50dCEE +jAa+Sq2raDtD5FIVVji1rS7PtiD+uMv+ZF52sxBxXxCgOyPT+eHrjAIxkUnfxV+mxfwu6GYdAa+F +dA1+c18Fsx5sRJGDsZUY6JsLp056kOP5ADq20tmoP16MFDE6S7W5c7zRjcKt9D0C2n7TFCqm/2jU +IlptBbpx5Ztp3E/AaagWE01VwqBMH/n6gAAsqXCUv9Fccfq8rhDAQnnz4INNmgwwk26ENensEkhj +72ar9loY5yALgtHCuqiP2h1PhHlsOgqUNmUt7J4qh0hdXsedXTZwHtPuGL0u/41osWBeCNAMIfqW +MWxvj9QReCcFC3UwDQs72wa07XPYkIMhV/URf9a889tp+mqoUhwlISJrV1nHZ3A2Yf66UjeLN2hi +LuOgjEEZIhuNUF2bIDlB/ZJy1yUBW9EbMI0o0CHis31oF0XKCTxv2m7prg+WxC8y17HV7HgITNLg +GwNDyWsGe0cdKDLHWBOqqxp5ASAX/6LE1xat+upWIQD/q7umVH+/1u35UgFgE8Yc4C4aGA31AkiZ +dkwslz915Ok39QYs53/A6qQuKNYMnaYozxwwHFL1/DS2mqhDRrOfL63fOmRzQFay0tHqq2ylsEay +JqhMxo7tdkvPbIV5SV8P3o2yi9Fr4v/VWdfwGFZl75shKviUCdeFgsLbnV+/vsVhY5gSH8poGGFm +wNce9mt58xMggFG4C8CbM2+NpMlg5SBYNwj+cI+8bLaow8TZxz3skVXM796an+eC41tU2H1gQltU +70MPCxPBvUwscqQdgdG23ojulrh6+ohgMywa28Ra2U1vMuAld1sGEokYpqFlCzd9MXAueI/78JbR +rAsgAoO9wbyrFDp0EvMnaf0fDpF6Az3GOd60ign7EPlfla0HQ6VSiYTWMvAHtl0riVkXOHtvjRFg +mkce0pGCckJl+LTMv7coEIzk2tcnSwUsrRCh0DzYaB+tfjP3u3/Au5wO/h6U+HhgBBmy9iPIvnSt +qL/tsBgpBh4wA02H+W8c8BLUkrvMrl2wgTq/CWWR5+jRj2RMmUvUen7q66PmD7m6BMeK3eyVUYhl +8Is17DhbRhd4hhuq/pWmEm7nvNP5R4sYhC/EISxgvkQ5fCCNxD8xZEXFCl25NzdROjxL9FGEBFjx +j6xat1IUJ5o4Udi+gqP0FmQ85rqzMDSnCoxHRutJoBPgog2XrhlbVkZ/1ld5DhIkloYpE9jpAJDw +YDHN4ylfhsmXG24XChmRyRdRv0v6aLsWpv/3HbfrLfsnAZqhc7zkrfWpiHO5MRvIPHMvz5iOXsRg +/m7D71tGJpIht/ZHYiJhu6MzTMmzW00UFo9OODdhSkXWQQbImqJzBjoFx6Fv+xB+tVgzf5rubSic +Pa+sN1ywmcWbmVXG63g9v7XgHMtMJFM5gfBGc94VTI2BEKaFc9PkaHA6quIuvyWgWJ3AVPBQNQ/2 +zbE4+4DhjY827+hmGUHxOMXUugDAYpuGwx/0erPe64UIoxKMcEKNb+nP0qSqP8nF+jNhcUl0/UK6 +UhR6CJHOY7hykj0ladv9aWB7lxA3ia6ZsEpYyf2M6T3AtZ3aWHSV+hTRCY8HRmO6VJ3Agr+HY9Tl +gp0XeDlnW6Tr/9ivJI+vyVwc84MAw2Ii0hoeXS5z+M4NGJ6NXaCTMeif7PMYtHtV+xK+PIm8q0rC +3OgzBmQ2wEal9W2VT3ULfzK3u7NwhXbEiBanxnyAXk0+uiS+wSoJQMIPGyVgYMZv3XB87/P//fl9 +A1YHPNoiEmmtLNiIjU36LLK4RiFfLIU/0e9mD2aZvvHoAZf4GlwC9VwjsNFmJStXKaeIpSIFShsf +OqpMG+aXS1M9o4lUYiMlaBPF/n2VMpXI1pkaKTEnIFCc6m+KeRYWltlBEHQIrqLSM6BEzNBPM6de +XKxmmfK9Es93+JAWvOQu4K2VT/ELwHTPg4Bf5pVdh+G1iMgyYhYd3o21ZCfPKCWuEaIi6nKUEBLj +Yni7pVbfJLgt89jCHJBb6ybV3TBUZD/0sKjI7SzU+32EAU9HhglktohGZN6USPQUosnwSLqu8Ie6 +j4R54s95jHh8wP/JqILANSCQIyukCYXAMxanZzpjG6Hwf8Dy/5+/oTHetPZgpf2Bhd3mDo0z0lJ4 +Qq+sD3Q3oL+IYMdltD1J8/dwezSErwvNU1C0yIv2mDPdPE45UzXZb1bhWkowYh0VqsiaB6qckWAs +xxoP5wJuEZ+kFPGC0r5znGJpBDvnpHfRwKbNzg3V+gpZeYo91GVE5oyHY4HF38yD7fuAZq5joU9W +zPp4c6RfiNrrxpiixA5MrC1c2nhfHX4CCgt65GLay/j+v0vxNUP2g0MTDTaXjJvi1kwSBOQqip+a +pY0lQdKCDUlyvO29rpMNCBlBVxC/1uYU0pgJdv/nVRMTWJmq56ZaQg1tYa19Qxo6nK7WAPZ7z/fd +R/R0csgpk5b9C6IkSeSLaHJKKQKMct5y8MiqIXqSN0uehD/0RKTG2pAVEwUw6MoXHeQ8JtAN+AM+ +EZhpcq1DgSKk/S57kn3NQQuast79xsKEj6fPvSg1bfUJAzI2QM6Fre/76c6+SGp1bvY4WqWsJISs +v/FJF+Sud54Q/5kH6erH2TL5Boj5gmtK+m3zmT+7e8HbiRdeLpBIa6g1llJHQ/SzIu0Kd26EVNmV +Cl7zusRfdMfIeWBvmLaYjBYErtZ1AHwJ9LKC/eKhdISjzV635eTxef0S/FWgM2JDLNBrB5CnzBNw +qJ5gc21MP6oMXr1NT7ca/Uhdh/NLx3Twmk6RcZYJ8ZRWPSu/zYTsk44jcQw+b3G1SOjIlC7wvihU +A1xmeEBUF+QSJYHwgy0CruTaAV54cOhqYNBRb4ghSSIUv99B5CgPo5ADdN2+ETrqqLJeHqfx9gic +oee9ZEm6wPLAewfB5KAZ4qFCpK7ozhwJY/vjR8bvanGdbgUTNhAVHOvBrZULmfWSovPpOMn6p+la +HdtT1LolPjQsTycSr8vQwOB5MS8DjhJaiyYlceFGcZAzgPn+YLmDM4lpmJev/Nu8MPqzdPAJTLag +a4WNML3fHCKzIFPb3Tc03jpliTreCr3P1J8Sfk2C6O8Q0rCrk27hzTknDX9ZF7Cc9mCz95xMplsp +S98xo44bppnIdsHMmfJoLywOWDQRFbGuYe6vAEct5RoeqDHzWdOG6Qq3hXRhoDUldkJ1f/vzm9Ps +BRvUpslZiJyDFDC1H5W4a+uXFMvsnhGiHKHUFAY/yeXwdEHZECAzaSjLRN01jC0+UYnVGRYk1VF2 +pMd73OzQmrDqwQzfxqbywjV+CqKwehRC25D/k0ANR0/56PLzkDAaGL8Ik9+CwRD06GFTGAR5aBb5 +kvpC7/x2PxRfLNGr0KND++AQyu4BvpH7PpwZo4p4bMHoEg8Q7FdTIolTO3ykqWDTuRFRAM4WyEkJ +fiC0TOSEyR4Qkc20HETLqIFnVlZBT9rifS4QEU/Xd7Yospsu5p1cwwcEGfSV/VPTBhDQoqsEa17R +/yzbAdEZJjnI4yFMqsWknW9kKIupTh5RFOfNIhlOlvzPbsmcNPOLGmsST70rdot1qXrw9flBjSlV +mr7Av4KRZhM3sU5pgabYa8/yXyaRrmUV/imubMvETHqNV+zYUBhNadZKIbg4bS3mzGbu0p7ixRCI +och2d7KcH3vGk1YjhZzG/Mks8tdQ68JMxF5+Em+P7b3CRt+rFhmpdCaBzSeZpusgPJ3OkyV4DOOD +fLgpJXOWbDWdtaVjp+HLLMd1IzyxNf1WkFpXINKNh54+0ulWUeE15gafElR10mx8rncSXxXtfVU3 +RV1UVuxGsAOzZ/usR5EtCEgK68Aiiw0Xs3Xf3LV+8ozB9EdBsmb0kds0W4V2hdvCI5v61UxbS0E7 +U276BdZc5w3tQn5cLX1MS6fsi+a05DncVyqzeoESZOG4xlHRZhWowSr99QXlfMqwIyQruR5uEUcQ +WSvoMLVdXrC1Ph+TGlKN3fxFNa386pFWI+qbdYjR6ITgK1aBSbhjF1JWtdui1NvOGuPS5K8uTrPz +eTdUiENJ+s7SNPcu2i1BwU/S+klRQUC+/wemO2j7+jnguOM80WTcKM8b4cLiCu+MnutdJcyyNVaK +VTqt3SvailLLBy98oBuPxMS4sy97xtSBoi9bvGGYSrFlj7KRQu9ECq3TNds7v6rlCn9cwN15RhPZ +unF308K4w4H/SQzBu2HQ2Kws+uW8X7XbYnwXxCCR8lqRNAoVUa7pmmg+1pa5lsYX4y4sckNpUx5S +8/At0aW2xC1saqlbJuqA/3JiRfASiF85zKPFo9xET5UV85XO1Tp/d9X+KkR7UBfZ7v9X4ecGZNUT +lropaRZ+rK9soFC2cBFCj8gVx4NJVOW/Kv1kx0sHBB+DKZKNC9iOA+OPiutxjEAZw1Pt1nEHI1ZM +TVcVQNSC0Pua24qrSsZvaq/4vgEvIR6Z2CEXZ7gJl4R33Ak/PaSXhlyKyiBEoLrIwnNR5jVP8eLt +U/L+YQIuBlEp1jN+Ja7OpnAcvn2E+qhQS1XlC5jx1hmc//wOl4EwsHzW2QDhQrBlZfITHtIYBd/5 +QFMpqZ5cUp8RquiP1huzyhrh+L6F8ySBRGLMNaWk7q5Vgj2S04jkYXUh3DQ76/wSKiklN1Yxr6za +i2jVVf29hKfiE3DgMypE5rJ6dYqLo4AEwOpynTJJT7TiOQljVVhXQnm/kS7mCsJoxOsexU7UZN+A +d9X8baC4Y2PVvr0y3OJNQhhv0skwJEK70qIfuzCZvRpDy2Vy9Zcwj3dqPkoQQ6dlejECDw8eytYZ +N9yGeyo7DQOs6PR/Tc9u2BqdtsKZjNg2xf77Ub2+0FQVUfhP+N9ULQEDbJmziIq0r/tkhAndBxxV +Vb1JLG+wUTl1SnBbk2eTIEzuH7VPeeLm+g4Kqmw4zDvWQNKEYPcpSdhG+9o0fKVsR0pC3gQPbOve +jKwng3VdGugmRuXp5axYhOns4IahSRYGsN4TvoB6mROOHyefbVlAkWWfWKxfVAkcKhJ4Sz0gUVSN +OuGALgqP/0871RbobROZcYhybO4dPOR6cx8K1X7EbB7aMkedj50B8Spo4um9N0dWI+YdV4/Afewg +YtajMF7L+silAbFjfjjuDsdgSRgoaFyw6u07ISNYnBjtDDlVzsEBfGqp0HyyLNLc36s72cYn1hhE +03FSfzpmRxlTzndSbhZGf+AsjDPiZNKjrirVj8J3gGoQNGC7lzdAVXwR77es7tgkIoNk2DLYgtqr +PEOX8LN9B1m1+JO6TcDbVC5DaY270mH4nzWGEs8RG2mFm5eHeI3rLeu0osHyfQpxdEANIgA1QVDB +iJ7llKLj2e8hyGv/Yu0wK76NY9S4qcCzuwtkSCbmCR5/7U8nJZUqkgfDjWklbKBPakWPbnHd4yNu +6jr/FeNfLSik/bEzOWg/+Ew7lgk3Q/15sXUcXnJtg1fUWu2fvs0a7NNXDK5NZbEn6d0MQSgo/HIN +72ZbpYG4ZFjIN/jN4mNwXhFlR+tgA/UBu6Lri6vdHMzdH3sp3ivEHtiMQKNX4qkIZQRpUrYVswBT +GJlkz/lDigoDmzVB7pO5dW7wOc3X5GdOsYK6tL1QUzQk+lq2qV73zqd7vlNokrLPeZgue9t30IhY +ad26CZJ+JfGXuIzCL/zAspUCXsCKfbzTvsmM0P+W0eBsSvBFRtHtuKwe4hGQwQBd1XUVjQqIYO5Z +d9FBtgU/oa06KUFUIJZ9BAMJ/ZhMSQeL7wpxysnEmvIVHzv4UIOPjXOggLAj+umUU1dodbHSbtFH +bFLXRPeBVLJqglNlz7EBTuVCBAptw0ENMEluPb0yQUvrWq1zjlyeD99JXRGS+J8MzLUsqjTSf5+n +hIq4ypSKGFmZGitPa2MDuERi4JJCxAj/6ZXe6bbgoUyyyTkm0Lm/OaB2G5tBI5fuYjSyr5j8Gohv +ojlibrOJ0ES6fhp1zNEASpDaUd/qkWUwOJMGx89729Xh+erovFcpBC8p8OOeKYB6zXxDP+6sA8/G +HPOh5Rddhg8ZiWaDrPQs4xxW/m630ccLtLeY+DWrGQPlm5EDTJuZhBg0Sv4blsZOVBkbIqdF88OF +Dg8TCcI4olBxP1bjbowCn3bA8NqmdwFIvXrQpro6cb/IgMZ+AqIHz8GryUvqjFH2qPxvF9FBE7L5 +yxGsHizwxlxEtjorxhF1frX7x4aS+XsySUsRP18eVRbJUM0Q861ERMAuZYNnPDS6nKKCIVH6jnBE +HWlHjWfErKANnN3BcdDUNwCYiJkBg8w6ndn1srL1nADSqhv8JigFGPZxZJjxboCFRFhaq2xJlWWH +nA8MrplwKgpiTko5QqTTtbpf7Zyr5ZRn7+6xLhNUXZzAMBvZpSy59CC7Q20OyzK/Tp9It/NXdmfB +fS72wkza5tbY4iWl6pXwkzaZv8pv3GqqUenHducdRuH+UaeZL5oIHPkxmMUcGDxY5zNdhU/P66vU +s4/kcaFwxPRRbAfjnGN0VW4I7haNFG8oIxQnhhMysrJA8+gaREdSNkthuiKhTdNPRaCXXE/nC11E +yrjE6C3F6uDMLRZLZnCuUAsbU9arfADz56N9s0Im+I/xffTanJtqMYaOhK0XJ4LNyW/WIof9tSNH +4FbXD8O2ZJmGNS2t/anWTMSewdMUh1iJ7Ezbaf+lD6krju8Eh5Jgk8DHQ8CKqDZFLTLR5bKxH3GD ++YquWdK0FiybJ9g98h5vmn9I1kiQpwQmdDPXdOoH7XR5LfCOG7FExkbI09Ul9LHRGk31+OS+UXrH +99Im/xdiMthZ9qJYol0OjtltLCYZoomqoly4A6Y5kOGX8cj9f/wzHOXZ+hHlByqrFsmhq9of1nlD +pItmUG+F1QeEQ4uTEr3YVRyMQxm1GbX9RjuZOoJgPmtD6V4MIzQZQ0qBQKuzk50ZogrU5ms2lf60 +gVLLAP4dqg+9yhnfgCXbFuz54bJPxvFQnkVGW8ux7MIkUbv8y/Yp2y3W5l9e4E4QqB4MbpfZieiS +jpIdiDbQH9a5yRgrX8fXHfIk9e/oanKweZ2eqe3VDvcv3IZGOM1TyrRRXTONTwoJQ04reobBwzOs +ruxBMYNs9x5GlplllH2nqKVmnKIAyByhiKxzEeM1GClZQ/eo6J3nqvKaDNKYh/Q4YIGpC0OQX9f/ +maaiZB7TcGeu/zh1EYYNzGg9hCn/kNcaJs2x5PlfDB2nkBmX+uNNa4LdreyCXcRi1v9vzGuo+uTy +IbjJCZgaUcLG5JmRrXXGOoH3uxrCUAhR6wjkJuYRWAxQb7pC1TGoEM8gD8nwasg3vUwgWhtK7cdC +McEtkIK/PJJDBgNCoifvZ3BVxvOmKBOzZUDF9BGRiALlqFW2R38kRjTqD4zG5Ss4d/TDE2KyMrUB +zMqhCoqp512JwlZwjcdrjLMurLiQsFzNT667JRMf3UdpLDbFVdo2MNeItYR0nJR1qVCFwKBWIXNe +WAedNxUN7Ruq5wdkRc4f5pTrxv+iu500nm85eT5/kBX43IaffmB8alt4/Kz9L6zX2CYZZAo8ywfO +NkoOJxht8HOdS+bGyzNCeWhkb/a3YDaDHn7StGCxaFkApeSohf611fxsIWQccOzKAEXSiv0D8jim +1n8SwgwGDg/0V5lzTpLJBfdIy5MPCaXIikvG7CyR19XuxIG/6oPrFiz74ASd5IgvzBfe+A0ui34y +4gi7vt0ONYBTaanyl7ExOGrM1QkeCaqh64GY3xRiNu5424nw+a1fRvANer9IW+Nh7u+7Zt9WjCFv +mc0NDPha2yg2QgFEv1aGHvx8ZtADcXw0bgPNXp3DG81EXTeRSqlMprXUEZ7thdkj23hmA1GB4NWW +qPnjHoB3UAVdekNqvSGPOlOMjvIfXWzVsFWYD5xc93Ivg+O2CemnfQcvPl/tFbogAGXKDwOHLjZh +urCZKMagNUBt6Wrx3GTLogGfocBp4Wl2JFI7mSRQWfTAyfmSIKmX3xzc0evbrCqspSH6Cy453Tqb +ytOKfLOSpciEnw45ZtjniegBAb00FzYiOyCTtshCG+ifK+q2G/dw1I89Usi2BrH5gd06QJXxex+t +wfKQoTV+XNLyJwEZGOiHN9065yj6SNWcbOu/qAHVztvZq7CjbLssDzAhez3wqh6oCSvyAuQB9lzt +HWKbzn9A/MFH+jqKfoFRoJIkXTsRlPGkflNt/cDuvgH+tsYlqby3V6Jwaw5g/fK8tmC3l/CDE8ZD +YDcrReqSrpo9HyD6nUz8jsnnFtOdGMNkgCFwLGVWZsHt9syHmXZ4CxOaz43fLI4HcifY+8rrfFoJ +5efOqSKaZ5nNMiPVYvPgCnb0jFe2YtHCZkWOi5J787lqtG9Lor0BJ6MjR+ILlJokDL+3SfRHufOS +7HgT4NBdoaJPaS6ZlwsU+D6hOVSiGCkVN5cRKjN8znDG/zptH/uuQQchQbTCr7iDSytR9HfKfJP7 +dUR8y+DnXgYO4hJu04HZ/YFLiWYN3hMQCH7tA08EO32z5zCBg/ZoVviypbOHWB3QGDIqtOIFo3lg +unuJ3JYa1JukbQxKW3Sljmp2EF9hZlk54VDhJM9zUY3fK4UrcYgHYkygAqdhFoIbdyUy7HvPcxhx +Lm833CmvEZyNbXlgp7H+oitJ9wVCwRooDZuuCXeyZvcdvUrqddTyZpfUv8GPZz1gtSYG6PUFCMuP +GWJzN286OKn+k4X4lzDd92kyXuYzL0IaBxwmq3xF3YixUHHCuoVAqrBx9UDwqrNbQ2pbKsRh3cx2 +CK/3lfXb/5X0mCqa577OEwq169nelvaqdbsMC/WaFPjmZLuF9Yu862aW8kKQF1jaAyAZnzRgMOy2 +uIz7aT78MjTjt1JlDp5NVxXJ2izWdur43g3rtLvqGBji4JKgpHQum6bBnOdDzv3VAwek/hLu7b6n +lOcfwmczpzHsqWl+90EhCf5ZMBt7HvV/BnudaWpdZrYGs31urt8CasnDkRczKrWPFncEVgFkQi0Y +BtLK4KfOXvXVdE2D+QeZw8EqWTfBnrtJdPkAH79qp/cZXDJ5NCN1M44D3JugEexFPaVIZpnVA8ko +WEceKlWrjpRL3M5ZlcYTrajJrf0qcVp33V9cVNBzZX8jQa8SpIzLfe+Ljiq1fxpQZgbTs8QsBdbi +lPhEfBowt9NK2nIhrnb4yODEhDdpqMqxTJ8ijMImcQBp0o8EsF6W2ruL6XPGVo5CdIydtvZ4rrsy +WHLxkFDZY8qtNwLBoeB3OX4S+Yd2pJYOZIJbhlvwPacL/E2h+XJvuNM94s+AMZcHUlZk3ukcD6W9 +SaXVqWekkrlKVuXDon7PA8r3vzL4JlnGwsa69P/k4MTYFiyCNSR3SXk1VLTfAYqTnMLwkrTMuBWR +IyNNYlfY71315CHA/IOITuvISRbgXn319uV/Z1vfK9s0gISOfej+KjUSqI15TqPp34PCSuCYB65z ++vZDXPg8Rp1nIaqiZor5vL7MFZEkZEsS59zqJDiBPr0X8XiWhcZVCac/F18B6lpuro+xPWegr8bf +WEcxK/JIBX8qvjGiZtLkpQovTrxu0ertwDbcURYTMYfqvZ+pwX8vK+mRhM8cZQjQCECNzsS8Nc2T +MCa+q8q3JY2lJ8MwasZw90SaeiZ6nYJDLbKnXkSG0+mo5Io+6IdbYtLUp9/EwdHq+5FvfK4bVZ2X +QmbLMs0tArdNome677wz5C/xlTGNSoMASEeNUc4NiytP7BCnA7B46uBVwNuI1A/deRW2czVKcKl7 +BStxr4LPnS+FpbCuGl+GwT0Oma+0WryoDS527zMLctub+gFwKsUg58PV9gk3NbpWQwcDj0lIsSRr +eSmqqVh46H3uLbN6mSGAfyc3o2E7VtrwV2YKHAOROCK7R3SFOVM7ts6z3wAdOVdL3XFZ4SvKdd29 +3eYc7A/Z0oe9Q/5kqW2xZlXOYT6czSmbpcbyaqYdjGAw4BJzDSlhcuB9Dkg66sRX9zxjUzyW44P5 +m5OZCt42dOiXU4b+Awr1T9+JsobFKezBXl2dR5G2/51Mak85eNrJzat8fEspasgwiV4LjQduLTde +27+NGttsScSLUKvgyVGTCE6KXDeYia6aE5MFCXh+s8E5215xAQjmumZCV3fSMmfqJ6GEJq6om4gN +ntbsbp1cM1k7wQkHHoqKAz275i4crBzIISoQ2q1tKF5FuD6nlEhLlUnaNmbR1czjyJ5Rx4Nzbdw+ +DuewesKFsGKunsvwMMmW4R1wHcrOivxaOdddqh8fBKLn8XMz04oQJtQg+xH/iB5JXBsK9LLnati7 +ao4GRoYEDnJDSWQc9Rlrrg3WTjlkXcp4nZ9qjGN/UXPN2D+DCwQi6lhWh5t8J9SaX2AQxtHv2L1b +Z4YG7yCGUpvIP/Txf/AGNturktQCcp656uimYZr/lr9FnbkwBcwjscyzgZXNthxZtV212yChfHAY +8jXpp5xKe6SsWi4ZbCieGOe+QuXUCXsVuWD+BTZ7IW4zZl5WoiVJU8ZIvE6lEfo46WfIlQo8LoAe +bL8KLraLucVcVuldn30p4cTjV/LWGh3pdQSQLw0jGRre80gi1+EoKCzMWeR7e8IB6YQjDbpdIJim +NMLnLyDjwnHMgdkjW/vyLHqoWvFQSqoXwo9C05lw9UBV0Motls9/nrgzFy278gZpVS1zXtwBw1XV +PqRzO7FMkF+/DmlJu8yeu0skvNIGZyfi0v2P2kcF9wca4gIo0qhOkJLZR6k8QCUCmDFDfPtY0ik7 +x6W08PvM82SsZNQA0E1icS7oemnNdpDJoaTK2pmvFgOWwHyA6wqBk4MkXQ4b/BcFtTnSy0CEHXPs +k7mxU3lEVyvhB0thoLijzysj7cXkoZn99GCmxX6WoGQW3x94Qibpwvk+SDJ/T76JlwoyUT2efw+S +XuHnTHMd6RDTuNF1PVWmmoX8vgUC9ZoZjspdjYt7jBsRxd8j7F5uPks+Y3JAQlr47YWN5JSG57Qy +2eF6ucjsa1oqadfjYwqLyC28NUMi/1Y//BChI90Dopxcyq5M6zOkKKMZdxPtES8UL5ModKOJ78zi +dwk67nyVEx5qIxyLNe0YAPS30f2rtaZrAOnlTbe9VzJpfe/MRyvdmE8KEN1D/1Mk//LZ3OQ/YzSM +i26XGx8YKFbBbWZyVvqoV6ZujJsAKvWIYN/cECKgAFXSYH5yy8h9k7UPS+iGNcrZJbkeQRX/P885 +ac4jUCvQ2xmE4r/wnoL1m3LxkCx6+UHw6+VO6I6tFTu38p3UDShFDqijJhQ1StgYDz5+bt8/sAw4 ++yEbFB9023UXZOSL4SNyldCl+1x+ICpTQi6NRSQCkPgqo9UnxgJjVSVvPexD/xJhOwMYPzwQf7hw +lTPc9O8zVI4ss6vS33EaGjilDIZjxx4BUCusdwGnxGTDYThedo+sXbCS5gGaDDxB5/ymMEf/oURU +P5VXUdaIQr7kp+bF1tSKZlrmNq2YRzXevXk1/+JOlLUJJq9iOqyey+Q2LI5wpJ3eoNl+Rykdq0gW +bzorn0basF13I/smGCNjjDdaddw3EGFxGipg7ePV54mLGEj/4IYXaEnaX2MG41ptSyhglEX6khCq +mvN/ubjKMdRKUe+Q5HUyDZ/gen59bbrP1vki3lbT8x/8tYYLn0+EATiRzbVOfhEApucF8jAYtIn0 +LzpDXAxngyBokHfJpSKlASZrnceVdBHZKdNPO5OY9ZWHA8T+X4MTHM0gOejABIUrI9kYLpotxlpw +A6jq5hx0LN5AZ/viHDNZd9FUv2SN6QSMCkIwP9CWqKTlGR2Wc7UFdelfGt4frshqtJBX6N+AvYPF +7sQ573lbzWSHtMHAZIysymp1cV/NZTV9skf1j/RUO6uGsaNwoXDFUwX7U6BPcO+GD5PlrZb011pA +4rgebYOCI2HGMs0HGCu9qg6hkM9RL3fGbGYtl2wv6yMM9m0BdlCOzRfVHpDjzcKnIeX7zaD0EHOv +De7GOaWPJhbMs08c0soWsz5DUwvIwo5kyJaSZ0lA0wSVCGdwFPH52544exMutnVUFITuaSahf9xE +P5wkCygW9eFwueYsMiXZuF6OWFZ38xzixXmZiJW7cHI21H9GzCGnbZFl2FRAtYQOYEtEawJ+atgt +/AVVBXBncm8HCUO/JiI2f0KcX2elKdGYUE2wHeW1xJ4h0p97JIt5rocWMOJPgDeYJIt8+N8q77w4 +mAHo3QbDBB8rTVE3tQ1KKTzJnQaoF1GIwUjzKpVU3O/yeZy9gDp22151zGi6dXX+qg8//xvxE/Bp +23SSCcQn2qqhcY6pvB1W1vRz9PNOAFEf7hSK2x7jq2HEb6fA2D7Pz5lKFhkbEQG+ZnFbip1+KLrT +XsYrVm3hgBCnJQOte3YH6tHs0PG0TPlfISlCAB/fNUkXWdA99cu9xiLVwd6naUi1FYa7seLUozvX +Q3BuqeggS2e/reg6CSAenFlvUVfgnCv+EVCr63lLJW81iDeBcczC5PlZKXU1tsZGJw3/LJK8NGs+ +SCntpkj808AZxkfpMNK+3ytryBR2SebsaTIwN0o71g3v0FQJN4NOE9zrczj57YP7+1v34XdUxB7+ +uicCLS376XBB6Y1n5X3fDab/9c3RruyL2DYmEqPhf+G6tlcm3oNfCzlSgSsVPljcWypZLmwfJke+ +XL2zSp9GtF1UerBC8FO5sTcmSieSAky8v51vz7C5hULSj1Cbk0G/GJ6/QLJOg6KyPpoqYF2Bzg7F +HDmDql/D0MNd5MsB27PmT58sUtEzbKijl1f/QIq6mY0nN0CIYPcfSSIAKIewD6VGLfKaSmJazMN0 +H0Z1idYbg39+73iCxXd+AYA69So6zXA/zLaf90GoDV/jb+DZLtXxb21q3LSe/45ziRY6dTSXJAMC +9maN1953lQCpaPXIlt46SUOrAMyby2INhGlYnxCe4fiXdyU/GRNyeFNUSQsdb4+yPTiUFdzfZFhD +9OgDXKlV3+CNa33rP1wh/1VKFTXGgeCJd0xrPrxLR4MbAjvtKs2QlNV2Z/LhlQHxAfg5I9h7dcnx +z8ThVImLuIXipsYOe/Vkk3RAzAuVDNaOTqh/304CCgdsgcNhisy7F9UVoWfsDiODrMyQZ2qhQJEq +YsTvMTc7ngdFQLSNojpOCkJt9ZTcyfi8w2IHybseKLuX+38DNSfy2YuIHOvdQg+ZLt+EsJvMGJy0 +uNRWtbjM8J8YDFc4NU7RUxnoZHQJ9olf+WEmPk5COmzYbpXts5DZnE5uk2HwsIspQPapPKaCIN+Q +8DLsIRS11Jqb0eM9JGd9HcOeCnQ6ik3QsPTvkJ5a1RQ7cz3uHYmaGMVlFRK3oTKIJdUsRoPrR/yl +9oR7+8y4XWhgOnsfn4x59lif4wBkCx6WvSvv+O46tkTaq8S5G3qtzB5u2CEE5JtS3fqiasNQb8SX +cbyBoJGePtDwBZUXmPDDb4BsvJCVUU+n7fXj4PMqTH+DUO3Z3yjxZHJ/kHsuV5Es4u20n1vw14+J +N4nLvm4mWs+ZzzlRZUEFHnuFwM0Hl+pl0GUTPcyBDC5WKUgw/nq6fuHVTkZoXD50VXgZ0gzOQ2Xq +zXcyE2lpYFeW5hR67Y++FVvYa1MXS8O4Or125Oo2r9UTx5Nv3qLeu1cNIlFCQksyQjj5QsidqgZc +clIqAidpxJ/vjMjr6t8yFUOxfyg5fj6Oa54af2S4gcEka2z7bq8K3DQLN25gEJsA0dbbqVH+vpf+ +lTidUoKX3JdnMUmQpYM6MG2velWxguoQrGuWIoClF3bQa2s9ASvCkzEml5g6xNMf/rQOA9R9OpbE +XnylA8E1fOQd5Fo9U6hZ2mKiHe8YTQGpK/cpCDz7jcK8Z//UogUx/GP8Yjwe8qd2tatGmjfFFzGm +DSDlUIM6iZjbA/6NaJxll6dkp5TqKJlRI3sASkWh8V+wVxbWMcsr8k+Z0DDmlmLgKcPDNEAhFx2S +vvy4fWA6tANnobqhVibnT4kFMEivDY5YQ8QHXVH3BEer+rdtWvcIyNe2HaWtX6L9sMGcHtSjJI9w +f5YlYckmu7WJZ1JefZBBeA8SKyU+5pLGHXxPVOXjroHBkq0kZvjxBRcB7cZp2LmZGUDKM2GQXfY/ +ZVCK2ajrFgGBgH6xJ5h/Szy0WkN/Koin/cexYmCrmJUJZtJmdisPXvemuYjWbOC2Jt2dOmv648Wq +UVbGTB7gPBm56MgC8vFa0+W/C6Ijsn4HP1x0hZ/LKSccLvhCGuPN2rV1/bUsVeZKZd5CTnuaCy04 +X7Q7lwi2jcro9GmlXW4D86ti0kABeWpBDUQTiGlA6mwFlWy79OFSuJcrOo9QTuAc5KZOYY47/WjK +UQg2+0gwzxPM/7ol7EizBuv9a3ypBTyPiqJfuEvOM5bmsNFe4VRygnnhOUL6j/O+L3lRboubHTuH +mS2vkG3KEbhtGEylnASiFXzGLl+bQiRuDIbGMhQ51N7vBLzX+n2H5hewfI/nfQpokCIXi6lD2Q1V +N4fPTnw8uDecijcXulAgoH2RtVOAw8LNLBj/ebWghP6BQyztiGrMDnLqasgJ/2oJOefgaFVKLjQ5 +kMJ1Er1XBTovGlce2XZ29tvGAp3BihZQSWuHNe41uRzVMeckmFQ5laGmkDwBmWznLwidNJLMkPFT +gpVQbOz3b4NiV2FMjHhJIwVIEtt44rZzOdTcUZp5mRosSAdGuquYedfgBk4dWPWuTlRIAeYapxXj +6rz4YmTsu1z8uVMQ4dVzPQEXbuJPH5T7pzaGpE6zy5f9e+lAWpVCp78u4PwTH1fZYHTu5C5D+bsD +sIqrvDUIJuvwsRON8VTUyS9buN7I2j3ijc88cwzfwbUsGCu4Y//oXZWCvCPWJArsIEu0yiqzRhgn +cwDBUNaCzhdQQcSr9kmhwZIonrjKI485y7AAHK/jXFBIWTc5/6GH1Edg1CxX5LG5BZqWSDrOqhbw +isVl9nIGCGIIjhih2cCwUo1bhn2dK2EhcDVxo+Nnc03JgBTB/xlKs2Na6YslYcpo6uouhrq6Yafs +YHTc9NOoXq8ICcZ519NgUGtspV1uM/Oh62rW8Lj6mTMfbzxrq++0Ch4afAVf6zTvl2YH2Mxom9uy +2qQFvZzo/C1yZx7FwgLjmFHcOXJO5dv83ObrTC6qd4A9H/tcKLhfDMskOS5o1fwWFbMpMojLue5C +c3KWuelv0AKaBT8zCCuddk+M37JvKlfkEX1WRdKOvuxlYqU3kDS/7D6crPOFh4A7nFRBcNiEdrtv +ezQHIZIlHxarmNg4+VVmHtXqNOx5CP65WewwZC4ZHjq0ai39W/SYx1QrgQKsFG2A7zqHyx0MsTKY +MyXJ5KtufU3NSDppf/ctke0A8ll1+Dd77Sk9Q+RQEvmyjjsXsTtj47mh9OXvpffX+N2v20FfvkRD +L45+yboDp4ZlOmJVpHd7+I+Y75FujPEV0N7nYGsitEMGzFMlR2Za/heH+DqWKpVndWKcByDZoO0+ +Vt0P4+ItJ9801zecJr+ajLCRLcIgGgyB3xffGTEr7b+VFf4T3Ags+Bd4qQViARmouBS+vMRdXNqK +CXQ8ODWW9npT4d3e3YEopHspK+z3UH306bW0KkiymRYcbc2Hoj6h6gYups/KLZs4Z92fMKcM4pGi +NacPi6gYzsCq/bq8UwkJRF9jf9xN8361+FuCerkFcZO4ZGj/97Af5OgX83SpoSvKAUAjI+1lyNd4 +gTNobYPmr00On3IAv8qcZJvMVI1pLde/LM/rFxfKhVQgtcjPzOEEZzm+ISrOXJHkY08Fd2NPfli/ +NBfclnTp6Qf0XKb5CfbZuMlnJME92VwXAzHZYDtnL1kcTV2/DwDIpyrd1JwyCiS1sZtQQ/Yg6Y8l +YOVu/SciL3IWaLAZZYxq6bQFapLlMTxNdgput+13q8ymldGQvNAdBFWnRvivQNSj4tEnjTZq7DeP +dkirQ9IPPuVGGuTxhz4gOpkUXALh71bkthRB396ANdis5qNHB6Q0rf4g/t/k/reWDH5VRXYdtyyq +rsjGRWSKtyGcxNmQIk+9tHD0hYATIvz2iDbFgFjo/xv5gdt0PooTYP5xsJPYYHOufY2eaXHhqGd+ +1d4pzomYLxjwwBpbsx6PNvWXv6cHmM4QRQihN1w8r8KutNnJEGRLjtVH2XiHmW8+RP+MSN9SBkwV +m14X3Qa5XzYEqxwCpc1NgYLKJoa6XbqVzTvGkVSvd5nufBW5vLkzYKxFloFdcXZvVi8dVbiAhALr +G6PKs+djph83NT9gwUcVrvRKrHWwXfwjK1b+/RmJXpXdksT9emZC1WQi3vcY6AJd/dlMLZXdQ1M3 +zxK32Fb1gmzRrZdEsOF3BtrhuZvfVho+Wfjq7Gr6IsbUe53kmOOGBR/brnpejmKHVCpEx7MHujFi +Vmhd+Xqe7aVPDfSEv+rSz3JSFto2KqWKZZG2/qrIit20WuqZCpjd/KvcpQaUkvRBpej5p+jFtyg5 +pA7FmCKkkhubm9Af6p1ssyJF3/++dbCM93wiFoDDVIjVMWoZWeji1DDH934r37mByVfoxGFPVgac +NTdrfBHiV7GHlIGK+wpDsHI3WlIEVFBLF9ctwyOuQ0GMHZPDKUXgWLUQnQTxuL2Qoxh2UHYNL/r/ +ApTU5j2L8Zq59UlXSzseXIrQqYESykXX4FDbb80Ac18/sxlklsoQwXLgIJbxgY+URi9BgpMZ+qlW +QQ5mAUaub89qoP3YABoA0i4sb6/bcYcAYy3+RwtNXONZ2YJJiIs2KdITQfAKK1Remkytir+UJsuk +vz9HVqll7EoisDOtYEaB6Zo7XHoLK2kH6BheB8t6GNH6S3mWaeMVxTA8++iU1pXQ1Ee7UMRk1V5y +Nenke90LyvvGfa8W0AMCTRfR5UMzcjznin0kMMLC+Y0XhT2RLL/zEgTurdBb6uq0qeiNHnoByf/q +OwSR1lRRfUzdtyzqPxV0KiBsnFKaNm12SdIDbMuJW+CLcJxF813GxIOUgaDbDPixdHSYicVkvDWO +XVVG4MYXEZF0lWI4RJvAjpNHRNthHykoAR3nYm2jQ+lNefAsRZLCZ1d+A9NWt0E8OXyyTQKs8Bey +NB4BkEQNuQNxifHaJ9Py0nCAq+Gqsi2fClda4utKbG3zBnkvNUFZCLe7MDKg6S+wloLuNRguTZsA +FxfdFR/ZRZO+a9Xhd7sake/oF7d22wY3K3PDAqFLba4qJG42sk3SqM1Ly/TAc4jci/bf+pNhSYQZ +uHUeOAuJTqn8HqfdyORNc5/FK7iNbwn7P8RjHw4t1Y2JUOpjP9D41zOHoSnLQzGBRWLAO954Lv/C +28M0hsvrk4nYVpvZl0PjDGzqJURhECpxBGO7LktD3KIGz6z3tEHzTHZA0hmS6ohNygFQwSndoRV0 +1XXYj7e2+YZnF33YxYStnyDSBx2GFzjp0AwlWCrfFgZzrVcg+5r3FH6azxjmD/eslBBKzdzBiC6o +SdtL3XGjZY8RQhtMb8HwDxIwrrPmAWaRz9+bjRPOKyMBqzjpZZqjiZ56SiWuel2tqXngmnn4SgpS +9g9mq+obxeMWW7s0FRZlVPMNoqt34/2BrsrQSnFyz3k5Zj3I0Rfimp53TfTpke63KFK17KmXaGxr +bHcMu28j30s7o6usY0el/vogLoHdP20898DUrPKmLbT+dZFaXBsy0F61OAqjyDSiHsKxv9tLHltL +zJwQr1fz+cmEsIEO4RxZgVM9tZfNhY39w6Jz1SIUM+OI5A9Iih0H8XRm3cxofxoTWmbmsZW0NCZr +66wCZmvDS2XNORIKnLmkm0Jy3wDrtcNKajy8Mfe7IxHyD/CdS43pteQwc+PZc1rtI53hZHGHAdDe +o+M/SS/Cv74xMyzNOe5vzFnbdGCymLnczN0UDkkGjwG0e+UMfc674KkjuAFAhhw0CZ5HYPceg47e +rKvy6AfdHiDZhBaISYBxmHkkkEopsHlzbga3jFnZp2WqRvOWY5DV76OcSLx7VpuycPT4c1qM3vnK +/V9ZAMmbXt1j5jVy0WFM5IPPNHzGg3vddwxR762WnxY7aSxRs1kUudiBLiDBmKiEWQSUwGLKlWzb +qUMmPQgm0VlmAngZPXL65T9nCPFV6VhGhyUiTjHQZAD3aAiEUK0joCw/QUBJtZs1NXpHr13xPhP3 +RUw/4J8eTkiegb5uU6QCAKCiB630EkQXQdmq3dz1eTR5arbMr/NPAz9JT7kIPgMGr9yMGGnNhsdD +jFo+ocUIYpHPscJH0olx/0C9Xy9+2m7yTtgfsd03SFPnAjpAF1X3kQLIZiIk0e9cNgwVr+rJf78s +7kqV6GFOWqTw5TB4F3gOnsGg/bLbe0DCnBIMJ+xeUwaCoHmHIqPE7oUJY+wtSBCWdEfrBJ/NaYDJ +5lw9twB0t1MQ6y7mcTw6ejo0Eu37LalIqwJSypkaP2aHu/Ytmgv30k/s7q3YNb3WzrAYMX18xw5i +53Ne9fdTzRkx4L0gieTFgjiiglSzKlLDo4xAVXEV7id2eZqU5i4LXG1SxVfPZMbkOxo7QchG4x3M +38no0rnon2zXUHuGwwcqSTG/tfaSPuAvZOmHetS4748RMM7f/rcauY+9tLDbdhcfQcKIchBvu4Qu +3jl4LyiSpbcBR7XF3wa3rmEJDehzbYkbpde3cC8XjreNOQPfdGJXZb/fzq1PhyD8iHVtvMq5jt23 +8LrJCxa2O2g+dZfKrs4bLoolDxxjKvBfx6Wafy+sE5YsXaXt0mpHkJZk5cEZkywLDMpDtiY1bY1k +CF1uKUFERazfab43YcMlG1scx+2qy4dPkmUvbbxkszMONrguGcC88Wkdj69SB37UXXEfwFCCpYzc +pcQT6So80ggMo6/izoMGbWYmeRT+uBofxbc7GqjN08TSPaxOk+ULhHtHgbXQqax8JNsooCnkLxBm +jc6TqAJT8aaf4VN1jnKdCzEA32ce31OmfUHMABBQHGRN0XARhr0A6QeeVwoPWReLPLJDCgXhDCVc +rHCXjJSP0w2bvnn6quBOrF84szzl9ILGc3T38TcILHGb64dZMVc8Ms9rIcP9VShyAtjl9mh+zP3q +Z8YG7oEVNjEbzbkmy5/n71lZG0Gbmb6Fnup4mBRhWOsnTHVKo1GoffY4z/i1MW83E/pMo3K+f3iy +V+YB3ZCXtSk+lSjUIHsQ4ihurORVxKXnmv5eSZcX+uTRdUdLrue/l5i0jgreXzC2Gw7kebkwXgQS +g4a0X4TbvtnS85BFU0O/JTAAzQTlwXV/Z36f5whsWJmlsaebLdbGLbGkuLfNBenC7dJo4AyPL8Bo +8e1AscViJhTY/0WXlNDqHrouNwq2Sm3J4Si6IG4c98uxhK6BWkLVS0Bq0K5jKjk+3U7X+TkFtVC3 +RiGJ4GxbKrYQVtZwIbF5NsbGvrC95HJApRPSEPA2+/lA2pUGtokJgF6vx6DENed1x0hoNHNU7o2e +D3inNo+b6BEGYx1KOJDcsc2WmHyeV4m/lvFc7d4OKDIDrrCA2VMBkBag8apQ0HKxm/PtgKoU30at +01gp/ZMhq4ZYZ0xO9Ask22pOJM6tw1i+yYq74xf6PxvdbSfvtZBaL8173NJv8eGwwURKrqzi01Lv +SeC+awEu4K+9/CBxfysCOAoVHOSu9P35pmUpLzvG6xa+vsxzM4XtK7yklebF2yjf7ISyJISbzYRD +R5lsHzGZknm8UHsejUvUPw9ZOe7io4oEykpPCrakhBAltrtErrkmHU8uwAUOUZ/3MTimOuYXkdk5 +aOPK/1wBGJ19N45ix/zxv/RvabTRCNiJY6rcs5xnyGHSUy/PLk1Zo9GTwFFI4jtSqkS4fTPc81ZY +nRiehmRiGKGfJvrtdGWHu3Ihu182aoY6K/QROJivMORn6JeOP7qDuf+vUIKElBoFSqYViuT5mCpN +1yhcbkcHkazpzl+AM+tHpn0Jki41TABmpxf9DJI1QqV3LLJokUgmJL29sZ4jhwC5FZ083/r5+HAJ +y/lXv62Lz0lxXs6cfBPGO2cgEsIXwiTBDXqRrq6kbuBZelSSLxKBsSQQsSiqabEdD/Hg4B1CWFvJ +AZ3YfaiW96qXhB20LY0a2PilJZvbGi+6VRo7eNFBgIJPw9ZrtDpx+HNKNrLsV/IWs0jzJOmO9HT6 +3klZeu1Cxp/fpHoGN3ksqUC9ay0OuWCb+9QP4otpnVV0KdpoPOyfpL9zKlpXoVPI82FH/7bW+61z +FW4hBzZiBSLhUHblf2tP6534m4VFgzy0Owmsy2/CE3J6/wjyx60qY8iLAZP1gTE8GvaD32ceMBKd +CnEmYPSCsbnahZV0ZqhBDKvboTukQr92MmCdoo/j5l7NKmI+GFjTKM28CKasvbVLr8qSQ+Aq1VXY +fOSwt7Za/Idgl+3Zh9P4WOhNqFqDqQcJe0rgAVyf74eSqHR6f5XxSZ+alpLYTKzynlsXbJhAAmQK +QitT6JejUQC35t28bppc7n95jMk8TocQwRYFINhIkBrT7tt0sKjdOc26YmZVbTAp9swmqpaDvYon +TDaI0lgT5RmlxohqBiDimXkQYAanuYHUqhzQ6pB0YBxmbhYWc/8drj5+eHZFm45BlyecskEKiycL +mB0J0CotqWTly8NVGIU29c+9uDfuG2pPmowFqgeoPD/3rZrx0t423Io9/UrCVPTok+j84nhacQl6 +ZI5v34aCp2bLyrubZfRdde2zD62HKWUZ1keJLxx8eznpN81ANL1lqvvXJq3I89O7ch79UQMwPddJ +lS9ijuglNX4g2rzEFwy7FrrmtMKUkrAT4BS71rz+ZPPudoiV+LwXJRfD5Lyab+1i+oOVHw1PYSB8 +IEFtDsLZuT8JW8H4SmonhsnE6SGQflqmsyLGQ57KUuLyeML3q44ASmeuAqkYPrEsoBQugWuO395F +wnHZ8pMzEkX6A0C8hhXRt5SnD9GH03RjGxL59sl7cYFsm3XRM3fzO0Hr29yT0mruawG65ZVOZ68c +4dhLIcEjJtlO/HP+bBQTuSJYJyXKESZG/S0ig2Pam1FY2xZWt0UEWUsjer3PYAoXaXRwdTqtqxty +Bqx1d0nF1+rkb80I7yFzTqa+J+AkE34lIT9mwoXzCW7bDd1m8Lh3bGfAEFjZBlBdwm8YIq2TWv0i +gOfQ/dcQNOOlCUDd6RahusljrHh3YBT3EPQkex2TzG2WgEIQ4urK7k6+XVL90YJH7AqeSlTZ0eHD +r8Kf6nVAcCm8e+YJ0O+su9IgmSde1lU2rnnJCcmUro+2rxaLHBPSfL2ETmAQ1VCIdMxySDi0EPPN +AwL7TfEgPC2ZYoCJ1AP59P4uCyIut3uEGPH0nEQrlb/BER5qXAhPcDTVzFqGejyVPOQk/GJBiZ7/ +yiYFyL9lHbDOZ9v9Jfx4QgRLTshyNCo7fmXVU9O6YLJsonPglyeO/ACaJuzCPk2ERNMjJIiPb7Gf +a6VNu9WSm+dzQ05+20Vj/BlWgvhvrfM3IsL7HTUdAL1YAS2afVm4G1RSEcCsqMH+JP3/gH+ajf3J +RvMfnOgf7CZw/lS7xiQBqEsS0RHC0s7qkYE7Iakbw/2LYHDkAGR44DcM6zic2m3OF8wr/ABLEbCt +x8rLC3QgB80anvB+W7y6pIWGUhtBj8enrVo5cCfbFn7uDxnpCRn67GSthbLnAhYGUOuHMA2c/kM9 +ivQuuqxdCZYpj103Bn8dugdawarrxRznfmq566nh6v6BHoOOh62AbTnbpKNW5tjUfaFdlZtz+efM +5jFsS2LWVwp0fiOL3XpjpiJYdSiH1cYGQ2a/RPXbdfp+1dGKg5B5Ht1KdsSjhFuzye9BFL4KbxUa +w3gEv8PUkmJuqSsmNivgljKEsqKmtB1qFnuOgkaH6chPAB1bnaXnPByRy11gR9YFB1+T63ciEN8a +9zG1n45jzoYvkCrQvU0dBwDGI/4kSEzbB7wHKSeD275QwreilArPlMnfU2kQtaonwYCExjc+Zxy+ +9X+FIIbr4AMIHMoVrJo1jLrNEjMHLBSCCFzVdJmWrOyc9N82+UqpQrxXfJthdf1oJg3bUBK2fXTT +pYSIKLlMJAly89ad/KrgfnFWLXc9VdSTQjj0aKcu+e1ft305JZPuPhQqomMzNXC6JJ9z1NY09lmd +87+crngdpPT/wF9MKmikxWerbbGnk92/agCye0h0A/dM6rH+888HpcFFK/zgE1qzY79FGmzxWdY1 +09XwQkhnXVUIQSZ9FNaRP+Zf9Mlb7XAD00WmWrwzekpjNGcGgkK9tbT1yYKqSbH/qjq79EoDVHfI +Ryu4C5u5/lJjYQ5xvoIujoC329frgkdzXW6mAHIW18VreeoaUQqdvnlv6ThrE8Tvb1t7Dbh4wRWf +gMCM1/vsqQKOmTATycB2NI2jkJDU5s/v7mu1lvlJephdK6uTDsa6JY2F/+Xlf0xWaigKnJpex+Fb +M/46Wo6Kh8dBvP42XPfgVWnD0cVCA8wDmzPZj/pz18z03sOswbMTmmyUDsm8p9WzBnwEY6hM2c75 +R0U1WCDWlCvKk0hIGsT7fNQhAhdVQbszDQLNLjsG1iug4MNiYI0OtT+9c8SNK5PRk3opSBl+JSjy +2NzJJXbrMPxRCzcMvgws/QrxecpoPhyu/UVNhGLxpwm+lPCD4YcxRraBTPD4sDZ/m9+0eCYQK+8T +Gmu4XvoJot/5RXWHDVPsFt208fvhwoCrUrQQM9ZlXzqTcDRlWAHjt0gv3EV2PCKw+Hk2AdJK/57D +tSzFK3MuxBNuHU0X1AnD4AG1RD8UTBJUDPaHh4wCA9klYhKmYUGSxeaFpYq/8HpzXow30yzEF9kZ +LI0WqRtsFuPXu6NiTnvs40NamzP2K8yHzeMX7A9pjkfT7T57RVp8J5TKO+p12VIL44sm2Rn9+8Nc +pIr0tkR7ZgsroEPsaRGYc6HlcCqFjQWm52d+Ooe/YYYqacuw6frbxlh8oonP84C7vvFBotilrykN +lDaLVbvyECV390p0f8fL0exPvMW2B8WOC9FbeOwforqLQ1r5BRb6G7HOSOhdKUqUjKdSxRND9ZOQ +bVRyAC15JDlplF02JqZARtXZXSSDRbSAI49oszdMaN9UZG1HMyGrtfXmLFKzNzW0QtjA8hmW6Dsf +sqdVrFJW1OA3ugps6cemX4cb2gGEgWHXpiV63KWRzICVDY2nDqgbm6vuwKxH7BhvwUetDJWdh2jU +PRJ+gt1z2A0h8IMK4rFQnyswd5tcn+yOZTC3XN9o/e0pBrVdxF9DDH7IzsOxHXer58/o2lQPAPl1 +B67SlvAalMgdzt1/qSejpuLWjZP66qN+f/0Z8MU4Wp7Nn2USPT9cQrttw/9drcvr7FEkqzyApSXT +uQ/dNdBaFzvDtyGH/VDaZgga1FfDo1nDGBnq9Pufk+/2uZroNCNOvmmjl3vabRBm7ixFrzZkt2RD +GfWBV9dlexVwIuWuuR4f9EVqx76/wBY77zhwzP4gDD5KydmLs1gR60oqFth2PD4Dpgqh6Ps/2jUN +sk8dvdfjCauQme+D3/Dqh5VN3JA5LSxjYJuj8zCTcTZnovTcR1ACpmNG2U38lVST1A+5ATAkHJRK +7Epr88uRWj9BPUmyeaGc/V1jX5fddxFxzOX0fRZKQETO8wEh4Dm+6UQobFUoCLITZd8XUAg+WESW +SLbxrHCuW542FrqiAynrw+7S518eosSk0o/G1y24xtFB2EmwIv0Drk1YGbjmlcOaWhLmRChCCIZC +sj8a4jPMUW573K9QmMItd9+LpbAmzoEzLy0x60c43nkQ4wM6F8SNR7F3e6p/7EHp+ezQW81rlhEk +NJgEnvbFqEUGWQiXUW0X4Vl+rBoulf/yqeQgiUEgTScsDav8vmxfzJoFR5sVBZE/4OXiBcnW3Wdh +Vr1I0JYUT7POwkonk3IFBvI51OjjnjTYbpMo1hurFc3wFahTiB07Q8SIFBwvgdazSlJsVrrncfq+ +RkiGon6ylPxCwifKnRtVn2UdO3x0QU7I6/hLZBySmJi+7wsqz3f3jG0d0FiYvBquZrhINEIaU8Kf +RcvFRpdpOnptF9ee1GW8Wvlbq07Nm5tZZhYjz5yLz0mjBvbw9Vbb/nnqDWabw1UhUHyAe2sfJ4cc +tQm+sigt8lCEpaQ6E8DzZhuidnDD2mNdxO90hrz6UQ6waEuhUD125V5wJKBUVMOjyygEw8d8FywK +Yo6bSbP71mi+RhIzmEJO0l8N9ReveS8Cby6h60+/PJy0sLR3V0urmeSRPEamSL4xtV4TEjCnNuX4 +4bKf+qcEjBFa+6fb2ibX8f2Ec5uEti9iwG+MOjmCicHAflBJtv6FDBbaZ5F+hEwq9BEr/xgckYy+ +1qN/ZWelGUOlM+j2eyyTxAT8nfP8J3smGHbpVpYeGVE6m3oKu65RI8b6SOVge+7kw36Ne8qWPpo/ +9HzqxDJfehRVuAGvEaRGJT7khNfxj9cRAxDK0JJ4kvZkPas04ELWZ3NmZ1Qe31pwQZEVChXfz/7z +DIX0RXmeDsEaIf6Y4JusHJXn/5ATKLs9nzUKLbCeH9CCuSrMXMgvuH14y5TlDCiJbpOO+KBJtF1f +/czoS5IBiWsIXTDEXIji74oBk1Irq4pLgoE8bpEJ31fgyz77SPLDnrFKvsskRneYatVu06U9e2Jy +xiZkOO/ySWHJ2Y+kFGQsi7S5lypY+FtxRcwJci3MHV5uVf/tFGAqNnawyKy7X1Y1/CuLjQ0z2jqj +phEft9u8cPuv5KIXgwE63oaSPCUUnu6SW4JdsQmwClQ1ZBDwNa83Zad0cUxpdfSS6o4z1RGsNo55 +3eZCedRIz0+xyQNocn8nWUC814SoRMnFdi5/g+MUkuDP51/2wpI4iGkH0aop+c4+L0CDajPkiv/g ++DnOPiV0wYWg72XthgkkFFJ4e+3aoBSjIbitaSpve219h60kVJvC4EOXqCW5x21CJQSWUzpSBEfG +0zdguoODJENrILKerjPT2161JyinNpO+i7jtylQ6J/l55kNABtt/tF2h8CjBFUh6T6RqanAPj46N +FKUFZe3zUfAFP6xlhtrPIQn1f0UH72sDAcKIJAy1YA1zufQ63ylCJLO3OJkqZy6+4xopOvDmby/H +yX7XeLMoJWbmVGaZAElf0/ynuXyYjlYFrX5YNA33qqZRB6PEHPExiJZ9ASWtPnWceoDxvEAU2QHQ +r7D5WmfepJFuWYRe4C2ChQ1AVGgfZa35eDKmXI2RQCYaYAIzYkcuHW5rBWgxIVKsBxNTsZW41KHG +IffRvMKBWQ46mwoKtjtgItSHbpuys7hWIdE7fbSUW3xLfeD90PJnaS45NQCt/ERjxMdvXlMcGGkn +KK2FEgh0KGdXPrgUD4gSA9fNRGVTc7P9XZo+tzCMW+dybF4+MiSBiOcdx6EG1cslfxXHJLFpaH/b +JmZl+tL/0EScrjhXE7zmQ6mqJPQAr2pwWZlQ2fGjhXEfeGxZpgY9f+P8wz3Y9EsTMBMzhxDP/h0z +9ogdaJAh6czjwFKzu1xqQevpPZhXFk1MnKn5XDQzfK3CLIVv27HOseROLZeup4lmMHVms+nDDGOs +7RLa0FY9ogpuNv6t1b6dUs5VeM8ugfub3ROIuUI3CKnaSOYoHGg2meNF8etKEFI9wgs9gRA+KMxn +OjGhb1t7HPZ8zLg3KVxVL/W86gIdQA/BbqMqKrtdDKhbHMJtYaNOnzSzdThnbsbGyQBUw1Ho1LK/ +27CRmChYC3nXddP0hdA1FHhtd32L9X3gerWu3JWL0Bah2/IG7uyRm9oU7PKv4hYMgD+kkl5MOCyI +qeAdtVORrbv2/cKAMYalvxbeL7ooDfW1/pC3nyG4v+tjiN6MD+zVm+sRYN05dtfa5gGndI/cPOwt +afyCRsiWQEpK6A6sIUwVCfe8kpsJh/Bx8HgBEd12d6cKszFQIMqnw+HuuvyZPxKqvuk88Cn4qf9G +nQFsBtD3zfgWnNJa+CImFe8gl2mEi04212fDfiIqX2ljfIDNYnJZACOnrZ7RfXfZCuDLMMVWmTOi +aHIbE2qE4zcgbAbghoMy6j/iAx45+MI8SmoaTv6oFyXbZEDcu3DYtfUslRz3NPZGXT9PuqXcoif4 +N/20DZukW4F7NpLGKgh4rEDcsleMrpa0p6nq3sN1gRFSO9cy2KUXjuXBCNp3NDzf6IDWiyMx/drq +ibQpQ4NMt64JFJzJHkrI19vxCq4XoUMW+Jv7LwXfzUpdCo6bp5Ch8mY4jYzPbr9Mz5oF2xrTmonC +S8lea6ejcBmFE72x3gv2QUuvH6+3kzaQzXKlYeXYUNcGklTI5GTKvQbVWkpVTt2iFERmxg6z5BJs +Dxk9mIWbMgc1gFNFmiTAdwlgk1dpG2r1wK6Wl7WN3VP5WCWp36RTgd2csJzuqYw/8zE//ontmCvw +uiFvFtrL7I6wrK9bCF40dkQ51K6ZEQODLjsozJ8szAXlAB5Dbx22W6UclMzbKeSxBOZ3HazVc9XY +1RDUuxOvkK+obzdgL8GO7YJ6J4JAp4Z7qEScF2WImPkq0mpG80atRaF4LQGLVoqX3GKmuOctTgL6 +wd5LjMJujyEPJ+hH2mU+GNT56WKuwzZeCeDsIit/s+FchhYobzcTiEg2MpleUhzJsZK2KjeiSGip +3EKPWYGSFCQQ4t7Cc1z5F2ibgWPPFoU7cyQZ1yT9gneciymwNEuUL8e3bzVjF+Hc3ocJdCNZ/0Ea +HVwI55MyDjGv+LTWi4Vn/mmWhtyqlQJJaWjVu65gv+G/M0gwvlMnkVnrZC9quixOLFZubIEeAx58 +sE274d1Ft1Vjo8c0IHQEBoD7HuLd4S8sW3EuTrWPQAM/B1I3SlncE2BuEFlwzDIwVfnsymg/oQwM +nKXB6+l624vXezBZv/C/apnc7JoEhPDqJNFxfDg8AUeI7swV800S/H9u8E+YQCKeG+3NOkGTbw7q +klCl6KV+AMghYV8KBqFmFWwovbqe+0T81efgTmoJ5UT+RxNAhBpdgf4lRESUBw68O6uW5FkIcviS +3NHGEJn+XJVpZPizxob4Yd+WoKlU+2dVJ8/wK/qgfsN253UB+OSKycJID80PGEX7mZC0e2watNfK +Gjxhvl4I2jQJ7y+EFcBKq9p+ajy1PZnLgxoO9gOER0M7UHMIBdkplM9RdZJ38/Huvs8M47ZrQiOy +CmyvyEWH6q/VeG3fPOCVvCdWxYpixIteuckMhQpeyk3x/txufxWYbLf/R4phn1T+aeTE/rmJGUdX +gA69Nz8ea44FH7PjAP9HsSZ1af0e8DgqIQGyk8p0kbR9ydHViIHpOa+L/RQmuliGCSxd2pf36KYY +f7j0yMRkxWm3LEkfOZwytdo3woFxKyNWROsMtVRK3Fs4bxmhNDwzkr0Qac/QGhqm7pyZb5WBwbCf +1+H9S+cKWwCP9x143vmi5v5VesGvoegnWiCN2uK8kf6JkkPtfGXQ14YidRyfYcK/2CfYAj7HEFWv +jog3M3qsyVE1OrS5ujnYdHEuSzG/9deo+eP7uuvKP2+fN8Cw4wTIE0hwipe+zmbSeH2Y4JJc1wzh +ZYhswlZVLBQ4jMNJ57coHgmdJ6lV0O2Y7ULhKUac4DMnK3k/7XfnZ37/BqoEAgKVI2V5PNrX1sdz +PYTVEs63hpj6TTzWaC/VDviFacN9EJPviMiTIX3ztY1+LzzYozWNqJLa9n4VVOkCM5kbOmJ+ZxjF +IPXhtBDzHVhtK/Qnqkl/c9qCP78vzkwIbndwBmuGEFgmxP4EVSXdVQHX2uGCd9YmMt/wQwZAJAbV +BYvygwxZVVHToZHvfDDE4mQ1Q8atLOrCCYlejss18UFd+Bt3juXlMN5JVLvw/JqQgGMjDJsz/td+ +xee29CRmPC5REvigOyfpwbmALe0fr6xlsr3MfBKyijvwFyvehhxwbN7RI06+0+U9W2iP3OKEcyp2 +vQWt87ms+1XzLARIcnD6ZDYTSy61AxNnQHx1/Cr6GQvYsoaSozwIHRkrKhr+XEWFDXb67AzCeDIK +law2UU+tw2LbxOdeVQz3KDq8w5ZpSKaAY85B8WwoJP80iUlL3E0xaRvyZINtUOU54hPN/tIYXB3N +SpBZFmP9ErtA0dxmQIJiXRiBKFqPeGuapabm9zPRIXLDr0YTq7T6Y/Z76w5sTati5rLJ052FGTKz +vNWgUYL8RUEf7yPyDoM4oPLQYbw8InDRLKxByd4KwfkTb2FteOF8ZzKaDGvYf+t1+g9VYBmZjA9t +8rtN7h5KJDh8ZO6DSGEJo3dsP2qJz9H1QWb2e5LPSRZ5DAMZBslTDBzmUPHOuJj4Etda40dBY/Kk +pufzIxIytorxJf/qa4Mk6Cc4jheYKrKhiiGhwZiAP60pXQs0zqPvbXaL5z7ZUG+1Km2mCfMeIW/8 +zHLqz+glqrMIG7YkcjG+FsGGpv1ZU5whaoufMsHdEYHYh3+DvTYLeSFY0nTyEGjtgjTL+wXIpbrZ +VeahXER82fpMwm01qaUoaSXF8KsF9Ru3w2iwcQtbRP9Mwd7i02qKWHSqVGdAEq/GHbMdzu6i/674 +kjOub5Rl+pEYPVwSK1aVENI+MTr8e5qO18l80OnX4ci+h7Pqd4tu9rD8wgvtqekyya4dLh0d2fHz +9QFHvTuxKnMMyQ086R8RVyQTgcfM/xeCQNJAU0sMmNJqXqepUjulAYWgvQJ1v6uem7L4QyBWjl// +OOS9fgX+gGFFxoPuYUzAOEJ3O1Ukblg3bB3fqf9UCvr9D6y3nU4N9ivEHrEujDdQJPcHs2JyLYXu +/3ovcy7QgD6nKtuVaPzslVA/k1SNWmFFKltxcF4stYeic2/kqVD9Cjzi+qopqkll//VJYeIPobfH +78tM2KRVddUMjXoMu8N67n/3w1Mnx4x8Gug2IWKcf66IqfGqN4vjZVuZYsH6Cb7bPuiLTFKgqtfY +vdkaaLDFNQWtBPAHlSV3S3DWuhLyzxSuo2POb15UbMdmcW6laA9oA2ctLh0t50sVDBl9B7kn+4pE +w30rjqP0eIz6p+M2jBaADcwYkWoVr379vayWiNaknAioorM2Qz/XwfI5Ae7gv010AC8FRW8QMx2H +zKvz310HAYbRyGfU84aAV5t7IfUSDCGO0UUc++YIlk5byY9NdyMo1zocui11ZVzvEV1XmSRPlIiB +S+vgsTdmEww0FbLJpVRtzRxXH52mmyLAjR50thf9UX1G2I++W8WlhT6G9liEuGyfgF89yrhZxBKR +Sd0j2d8bsy6A1thX7IQ9bAn22pJei4H0gVBvlBgrvl2WULuzIE9Yx1jdoiF/Lqxxu5kBdwsSZS2y +WyWkJ0ALBc1PgZQrRH4lCS/65KVdRZBahbu/ve8yoDrlcI9WBMihzq5fHnKf86Tnqwx7mCKGkVhP +9hz6KLrZf3jl2SDaicBSvVKYYpNr1tzlAxJFoTVk3GnEH5ykLqsPP4x2z16csToCBIg8BD4wLVsQ +WIrYayiu+/kL0N8tXFUEx655roKpvLf06CWZjs48bWNqS4uMCu0Q0SB4m5Nusewf7siQKglsCh6G +xs4qCN5d/3jgySnwN9qmaQHmlyLh9/W6bF0HsrCWTvtJICsHZrbRQITF4Wd7saqHvSxWf5wClfRC +AOwoRlEJZ/oMrOwXpx6BCh24SguwbtUARancVcwu8ZQ+IsWVKuKqXaUZZUvzHpNSW4T+Tc408tqK +Oqazp42oOCifPDmLM0jM6kQQI6du+AhYTi1zx3UgkKc0wa7713ICRimAXV95HI43NO8VCG2wDiv5 +h51BmU3MI5l/S9NsNDIciEdEBlK0ROCB1Do/WkHiqHDuTcPF+SFDSkzcf5/1ISm2Wtrq7F6qbwcO +MrGA0TR9+IEKTUGU4W1cPYbJHMUm0syw6DRrkxqJNRDCG44or8BMAW8nOtzo5jn7by+Cmb6LrjHJ +/k3PwB3zfCpqb8CbdY8hsnGWqldxwp57FjnajcPkQ8Heupi9avpp0HfIPmdVpkyu/UklGlX3dZnP +I72HKJu/FZlQc/3DwYIBRY2b6DtKAVidjN9jd0H9DtCilsz3q3GluyiAKIo9wkrNP/qxEiEba8wJ +PHV28hqitq8JOxGcx0X1xc5fIQe/jUc2fhV9tyx7QNvymwGsJqhMC3OB97vbdaGc31HY3o3TgVhn ++2bI/SCjI4HqvMU888jsjLBhuYqlRr75i2z7ZpBpWEvACsf/ZERu5PVdxmF/Js9JsRn0/ja4nffn +H2+6jM6v0EugGHnfaeB91U9lirHhiOopuvhphHUeraJElRjpt+yw5Pdoix2JApQvuFy4E3ioeA+r +a1Ph9uBmP6smbPNz83sbkyTgRYISE9gyJ1p+Qzer0NIHVBHqeeQgzpL9QefKwYcmv5u3inUyFQx+ +14f0YGOWwKKzeyQaFKf3FnYPpwkaGUrCgnD2+gKzxAW/a6iDILo2mp+NLNiiNer9RqM1WOMUgt/q +bgXLMyhiEJeoQ+MeA8CzRLon+rC4b+WMkgnjXL67d3+TMkaFWNNwPfOz9EPYvQBOuCh1T4vGtiil +jSzLl4/LKMtbfaLkLzVT+b/oa7y+0cpmK4/6u8vA5kuc9TW6Kf/AGJGsE4ACGZlHE2gqoUnUfI9g +gGXJBtAs54XfUo2u/RiU2UyXKYl+jF8Mt6fU0Gsz3PJ6fL/xWt1D9kQUlx+OAp/jBlxtISPfHjkx +8CM4jmjKMLnM14aVec1VLVDYEXgZA+NtOmNrb44TytVjwtb2GwXxpFU9cadtbh4+A7GfxkvcizWW +o08+c76Eatz0BCccQup+l5VUjx3Q5BtY3x8FhPq28/Ur+xfFJF6vM3H9VNOc4A8/W90i3krtr7Am +m/J8n7mHTINlKMdJZ+SWB3+EiiMXuHriFIPQZ6PjBY4eWtXQCltLVmrXKEhVOCR9LhvOZIzmks3H +i87tKboW/PQbeoDLWR9/NgCJRX4TBuTXypNNaT/TIHdMBwF5+7Ifez5EE3Rrm0n7gxQsuGrsPFHh +t2CF8OkHlIW+cl8ZapzN1VeA0sqAkKZb5QjIRL3xtXSCIMibigY1o03lvp4o7XOaIe70Zipj61dI +yOzzRiu6F3/l/cHHqidXdp0q1mFsQYBkViqK+LvMPg/aYb79VJap0RkGr2nvOrnIG0ZSZpVBt2qH +543O6WE1/5zyVF8O9CrZ57s0f3Nqzp6MZgfXgqf12SsUSITQ5Nzst4F/YggfxTtPBrofbGdeGBHT +ZVA6FscNQ601B+Qz6Q1wkwHBzyHqZlLwbSHrmreK64XVMc5g1dklCbmCwKnVDfJbzlaAu5PbmuR3 +pCkWV0iQs3wSnab37A8S5Vnv5b+OPfIvujMU1K5as9iOXVOxH2TmL+0xfTbAJXjjWsUojgyzkJb3 +byXwoDCsmrGZmjpdGxRkX/j9JqKsqicVbFYoYaJW26/KQ+0gfIRtlpoASwm2WMywO4B82A8+e4+S +QxVpHtV/ZtuLTm416zNsHW+9E/KMnM2Q7UuPkAqOI03JttWO3XdGDGgCT2UzO0oNYnFkRCURD8FN +5OBjPkeFcUTsKMqV0br4Nn9SidRRe7kbPH5/dpGlKhuXxdcW6bGFJHBZoSt0xqQG5PlwA29zFOW+ +25k6vPRzF3fWZA51IZuONH09NPymy/AkOx1k1sd194K4L9amDEc9fUPfPGBCbzJeEQL/jBUNbIOE +2xOi/AQQ8+Q94NMbjEPppSR2MXfl9yuscAty5wMRBmq7U04mFj6kubrTTe1rBS3YlYRK2c2mhmg4 +AzVQFzNT4NGc9SNa265wSWZVWVNtabL0t7Cn1PMxeSYErHt3sf0RaTaRf8SwEdzws0R17jNfJ8Im +LY1MghtTjSpAP+MF3HajUwr4OO4vAw1unQXq7V95xUfODp7li23chGOT/JR224a9AGb1UkPwEF45 +TCgN96ioH4/JXA2X7ZOCgPBxFQ4PN2b7gFuZY+TCl1qeatZIdeP9CZgZIDr3yBE5WlKbWC6hl3AD +TAdCX3aY5Kh4ZhMoqgfSClajv1l2j/K0O5FT840V8bnsOeksfZuDvM6byHcllNoKs5RnklMYF044 +IK1eiQ5DFL1m/UFnjWQ/PyDUsstiCeCO4mHalJAIVZQAqdlDnJhR+t0zMCj3y4nP82RJqJQ34RIj +G4KgkNbXU7B4+S94BTBi/ZiEXzkEeJe0z82wDnON4tDk8rYXFFm6X/A5KadNOd+wKFRKrMn1MqDH +5qd92VHH8EuiKm1WyKQm3P+wz6AaP+rS6V57NYouY+smFnrLP0w0tjR/dcFN0m41Nn7xmqQuhzXx +WLLdLSE3Utdof50zjhHfrygcCzyBUCdGjY1mr9pPqUZzdzEpbiLfHZG/MspiN12EdMepWxOqMB0V +8Hxpcjo9cu2OJHZoaIidXdZPJTKz2T0q5FaFJFwiao89o8YRCyxpOVPNLxowgE38116ylOC9oD2Z +uz4uctYfM0RRC0DeP515eZb6Eh89EbcS+YN7L/gAz8Nm5rC6pdjtcSsQlnEiEIQ+7YKJmsKuk77S +1pdel0KCJGt/mm1ZaVvSM+ozojk5/aBUh3Q5EYQNu1Boa9mWHS8uul5uxZ/IE2uFxezekBf58Ary +5UYZip+XTq6lzWFfJu8Vfw/01H87FB8tS9MY9DaBWUhMz1XFiRQYV0YEwkfMjsAzqwbQHDO/R/Ac +g3tsXg9E/uo+abKsphft7cbGHJBDJiWdOxM39lxpbV1BVvkR4x+5UNIS3sss8ekPZpyivjuKAa2+ +XpS6hOfeJoNxmtz7J9WnKtF3O8KNx01cd+2guonWUxP2jzLcHnFBnECSc2A+LA5kBZoEnBOLmRNB +Szy4VTHhzw30lzHbDBj2lB3IhLoVZY02L5r7Aci8rtSjCDJYHMuXfjqKLvt32R1Pqp+FtKah4Veo +aMRqc2dLd7N/Jo+BZ5E4521DpsT7nwshRR7lWAnlSyKceAciEjsEcTqiZFg3lYqftFVszkNjJBJ8 +MmxA402yKlqo/zSwzAkntljKGeHV7MD/zQq8L2MWZ01Rdqfr5yfDIPwA+m2n2p9oiR4Bso/BreAI +fj4AG/28Rqlo42nF4D4NpRr4MYWkss8zlAQz5hed5xRrE1naBnBDbeiP86BjOc36cCcgU4QVF1+V +yIsKWy7/sCW6INd3aR0HFuwi3Herxb0eh7POW1h5PsVkhLhgUxO/VotmNRldqr+Ebzn2cgQ2iOCQ +PQzlrBJZM0uD6DE9K4VhthuQKJaLEh3srSuE7LxYuknaBZBD6FSNsNf6pifwCa6llkOCXy6Wi+sX +U0GJ14CVI07DLYeOLBe3d+S1cCF1pNXUoqv4A4PMa0YPy0Nx5HchyP4wfmy9Q3++gxH1X7T34sr+ +8THPaOdm80QMIh56HfSKXhDaAp71ypF3i8uYq3jzk8E7ChTeretV1FDlD1NCvQ9BYqr6CmZPBW/i +d3ruwoddF4Z0uPOf7kzREnWDuuRqT0JslGZx1F8Qb1tMivemA1QZ2+ZmTu5BUR+Wh7FsSUNJu4dS +ZAK53u1XaUYxhRqss/bTkMqDVxH+72fXsmSD6gfyO2w25sTffVAF3L/GYY5UMkGLQekQGQcZZHFi +rZxmdeikIs/MS4LXp73N5WCOLVLW4B/aZfKKjoRmk1R+uqZUKGdS/gbd6gKPK+iYF+XBn3Y88rpI +dQMZHaqdMUZlGH5LDNHatbzb0wnKvOoleDM9SQmdd3ja4awxIq0rzZz6yhC9Il9d6K9+Qf29P7vL +ve/tvTqfwdprIwt+WVEzgp5/x6X9bWh49oWpeJm7K6Hwmu6iQuESIWFZuOkNSoSWuhOHer45cdJm +WSXTwlLNjuPxJCGVQ4w1vzDtwomCOPzCh8trVDhi9kiw0UsRr8DZkGwU3NsddDX+w0Tluj85II8K +iHNLGRuVpAHFOEeZ1Fk+LV3ABL00zQdSg4zLSHeJwEwELkCwt/jYr3j7cpIjDrwvDn5RjgXN9Ivn +0DOvhwpKpwWniPY1isPCJhHjdaOLwp54MztbeRGuhO2istZaAENKvLwqBaq6B/+P9ezifI0+lkwe +u5BrdB0k9DnyAw5BpwFUL04G4ij1ag+MHhhKyx21sNmsw4elz4HWODxjgqe9tjdxww7KHKPFTNAM +egUvvqef+e079WcL7i4SXYCLbYxz7Q2HfAQfAkXcCrBUI0GH4hRk4GancVc4/8sDjA6DmOd7neYv +uwhJZC/na1iPXl9lUxM9tstkc7mtuPdcXPPfmzwqLnTdLUT0EZfs03x44YzP6Cr4Zj7kDCxbESfV +mxGhmA+H9OxXhhNvduDnvefHIKk3kXyjttMdFlRS/kEMCcOwR7dWThQ/AEBLOCrEq2ZHMxD9s8+v +m9bxFGyzb7hU4p3bb5z7ey+ha0QG+9emMh0FpFNksoTzlk/dgOn5n6r9k22iU0mec0mRNyfmaysO +CUU3lNEEg8ggRbVhAUucetpu4doWTafrbityRDypz5C73bRHIy41TF7nB+rKJBrW9EEoyNAUf6At +X1sQEoN8A9yGiTNwgl0pExavq10Fzv4vKexz4C5WshS8DlhcNcjAgWsl6yduF3qsnGXC4IaG5hOm +LpER9SxoHSyJOdkpf5SFHERIdCUUsO94xUWSTff4gUcvcUJ5E4FtJCkGcDHADRQvEwCWWHleewwb +rF1nv9+yFuvLQo/3EYsa020Ia7grMJXdAUseOdmOenCIZFLyLQRf+mZmPkEqteRimTHoNZHsm8Ls +A8wHNN3Q3phjovcypom/2g5Ve2AS+qm+fig9Gf/Bf3OQY9yxmpYihaD/CaJSRO8RFC7jUhxzKFQx +Na7sYSTuJ4eDWlrYZLQW67SZ2oUtNC1cRFGaT1B8q/CxvuQL7xB8NOpmKNiVPqsoH0RbHHQwcoMi +Sq+4+9G8Y8agJSlqK6537RXkCB9nQMP9ZB0EIu1bqDStSHLX8JF+W00uP1iCqF9bwSVwJUotiuJU +FJekxMYGHOSFT/a3iTrqMy4uiUJc1iBm+4Li0tN/I4HvwzhBCxqER0XNz4MgQollk/ouAIDOwSFl +mO1m1Eq6cyZRHXbjKQWmMVsPIzs8cM40KUC5OepaiBq3gxFG8GcZYuX/tn27MhAd9vVaL/70tZbT ++qfPMkP5mSphaDrdbwJaX45F9thIiqvSDvHT5mdb8eYxvkZos/Sq1s5yBeM8hnuoMy4U3EcE6jux +HNdC2NO9JZM6IGuTNYSbEAPcSHSi9ssmi+6iHnN8lAjG5dCDB4rZXPgMSyE8Z8t2rxSpHOU1eUtV +P4xLrucoDC2bAHN+ozBnQ5XWfizkQaBETQPe8y7a5sHujiMZ+2vNw7jeUrPXlBXEb2uz0LimhioN +8Bdi69jNdvDjOdHoKcD6gQasUTLaQXUIuI7w+QjxQboZfGLKKjvHzXjfeGYcQpAad4a9rUr1aFFh +3UQlXbtvv9f/A24aFRi1eb12yLeTLEM9279iTtpU9NRAt7W+P+ilT8e0meX/Id6kF00VlUixFY8o +XtX9fDJ4sFGmRnFnZ2qOKhjV33eQ6w7/Zdz7Di4pgpf2FOwgqQXr2n8ZrluI0uLEyOQK6ExhUnYR +ji3F8sXz2uwt8+SWo+4VNJjgEUIUoy8xwvB6O4tjbohGteLrqY8XycoAMNDjRUujxma8DFFPbWQP +7XJI4tbaES/WF1j7QvXhQ0ofHQ6rKafV4iysP/oL9/+xCiRy1XpIgihNLQT3m7X9OxE/ye7ebw1E +/JugDJrg1RhmzFeyH2a4ZazYaLbO1twwI9A88ta1ct639WuhBvlCNAcC8/RfVfgH5CkxvrN22hfN +T4E6CA0goHECtCQcmN5aVldQVGJjmoIovZMqWy3eQ7JYwJcAyNajsjU6xSCryA5/1tUlo1PMY2sv +zjPHRPyNTM19MINfKEvzTk4+A5EJv8D7FiS4YuwNUK7x3Aw6ziPPCk1UD4gXUadQiDi40WmozTN3 +NqGWKrFxQWTEN3DAvY3UT+zEXwlzs9k8mwpGP1YamXjLTso9HJOokyXLEkXJwPlH4fEGx6sBvyHR +fEtE5EdEZzFjtieu/yv/yFuILut+73EXk+xQ+w3aD0DaTw+Ls/6K413P0G85aziUs7PUwHJ6nK2V +9lGiZUBeeo1bQq7uH/obgaNt+yL4rsNzcHxNU5BWL+DudgyqHgxINXjfp43f5w2MsnYLIvqwpNDk +YWqUsVSsNZ5q7MjvaQyPAW5cibKw0cQhjUIjJ+lmUz28JoFcnVXpVNSLVctavxSwAYrLOZPqI5+Y +F1NTP3T6SiWGWdMepaLNZDjel/+S8OHjTiAROi7wMkUYXe1tUvX5/oQ9HBbuel7ia/JZ4w4KdXHT +rplZ7PKZJnvL/agTlWAv7HTgu+8qwX5eoARU+wKHp+gytRSSePP5P1VlffaWUZzz7vT1a72s/H38 +rzcavw1zU9t6N0IVrSWAZceLHSTbw3B6bGAI7ISGulmHuIkCizqXt3YS/pUhxkDjDaz2rYw6BVx0 +p/iDjnOnzPKqy6/79SqJz1y6bUfcVroyqq8BdhDkZO7mRJfsvyvhQK+QFtTssGz8r7c9NnQineYE +hIAser5h4THefu1KHdqkhQmzuKEevKPbDuMoxGKJhFk9b13nmpRim2ybmUbx9I6ntRZ9H10H/l8a +6gg1r5hgDLnXYoz9A+fuCBeej9Lu0HYmzIU32Aob18fcK0TI8x78/5YYzpMa6BIdAZGosuLFUJWa +5RNIuUy8rkJyhc2l/b4S69eZKuPY/LwffX14Cuwh29ULAHVObGxEDYGNwWspMnvmWnnbWlZAmCdS +RDTUpcydBaiv+Z0pBb4qGF6cMXkgIRxlZZ4p3jM3+rQI2s36dZSAK8hWle/4SuW0KhnFNj/xtv+W +fIkVI/rTDf1RMfonvjy9PWZuYlb90XNVjUdEUqs7BGTnyQ4b+09fMlBwLEhmfmuWDAl/gavR2Pp1 +iQV57r1sVXGklBqjWabBa+cFVINGDmBX44sSgJP/+cLKOfD9cYoD4fjqCc9OPbFOotaf7QD+4iE6 +/7mXLlSqJPEyH11jjcv9eIunX0oGQjUUeAUZQ/Tso6G/pxVucgvYrCoMj62faE/vBpw+FTKdtn+e +/2jxKR/15yCf5HmMoCZGlf/5vkxF/27SY8+FG20oDQ19s3t1umm0HfneraUBPt8UpdzvKnOQkbaS +TZ6g2Ci/u84ZDvuVlbj1UU5pWhgWYkk9KFkLhdSuSBIdnNXRkZ97xboyLELepmTwh6kmEtbtvLfM +NILqokBLp++i81u96tIotej/kOM289J7FFGpM+DAedDgOlSW27Uq4C/nG7Ly6dmcImNlXHWbduNe +laFa/Z4TXZk6bncXkorXXeY1iuBx5EuZGzXNSZtwgb+sxGyRhPfk3ai0vbTOnWLj4RGtkvybwjux +etEzMezGohQkJqabTQENGerqRlP4BZOB93Z90RSmRe462Wc7Ssw0HFzbhJwbUTrpn1fPUOngSkLD +E1nIxLA7sRqTY3RmMSGESv5JZX/iala9TT473s1cqnE++BKNjeIJMWdn7F+oMXH2yVkZdJ7pHA+4 +FW02J5LbP7SNZOsIVC+1tQkh6kMaSX9LVOdbNeW4KLnW+R11MmF95zwBCXcnmYQ7pgZPcerx6ngk +miQzjWuet9KCPE/ieJuLy738bQFaWyh5K2sYDWbIcLjFPl3cqTVc7tTKFvsQ3pjnW4HFNuk/iM/J +Vs+1tbjyDR4f/RQG9c4zFOtoW07ALn6Wa5ifAOf3S+DO/aRoHzoPGVZThBkEBtFNeCFxJnkm30Wu +cbStIpzGbNGpAEV1TadKmir0FRTxcTFb+wty4+seDMcy8gk9xnHciWijiSGG78BsaTRJRttvQ8dU +3324es/864SLWchCq2mHws+Xlz73GEyTvjp8iVBJuEnX25i4lw3Zr51pzs3f0J1OMKXtyV7iUBGg +kraTwnfG2lBVywj19rLyFo2XuIv9wcuUGgM7M+BDjE+/X1vFDE4zptmWvJjRvgoBTk7e1G0Iwo1R +8Rz1w4i2XRO0Jmx4U9To7+0fo1dNd54sJypY/eLZtn9N5PebuZ83BaviHDXEZVPpE8kHWTDLZUbk +aRwXRefUVunfUokvultERrD7E4Eui3cLeLltL5lVl1d8JeBi/5c/I5mvIzgC/TJUe5RgOdkF4eDS +/cOz2/FqvrvcVOt0XbhKUafSdUbWEwPc3LqxeVQVjSja2DcP8Fl17tuhDiLbk+g3yBKCMn3xf3pt +qduNWtJkmTc2iCrDcLdy8B8145XSc2ybCvHEMsidNfbGFykw9hmWuEEIG5cjco+a0rtm9MXDMf4J +lRgtCi/mS0K/sa+r5owS3Ygh4CLL862bHddDyGEqseJV4QwMrmHIdO4SQBdODGL4kL8Q1RQTmTOT +7GNNPaOK3o3jYCmoQ+YGKtJUdBjDU66495SbdTY5X0Fl4Cq+s/sIfi0mldODPVMoP84SiTbqbozT +crpfLedymTK6qO3Hv+ooFkW6TylmpDJ9fU2jmWzK/LRcnS460BLfzaWF1AsMhZXwnuuEDFtpl7PH +IEMbs8GmVoDN1wjpl+JhGmQlgRU6sF1AtZt7nLR1BiH91W+zs7WJcACPJLECP6vXzSW1RRunpcrV +BEukuMxiuzkqR26r65S6kkUtf2Euxd9FX/J49xM5cD8MFYCoF5OZpTcimTyUedzpbp2c1YycdGZ0 +e59tg5O+4nwRULJgmXdihMuKSCFE8xOM+r6RtHyNAc0ItKL0CyzFylALCCkcMZ1vA32LrDzRUmHz +0PY3NOBeOJAOuJ7CCcbnkcyf3VHfXLHfWIOUwcZH7eh7u7Dfcee62h9ugquTKJk+ExaMH+V9OSpi +B4uhtZlkiGj4lmj9cFL+Kow+1f0CMtjuJqthinT5BaBtmNqBmIFaGgl9O1JCyBWMLMtHUvdotb9i ++2abhYt8N8b8Kz+0nbK5JgXZJMtCsTE9c6KoTtjYKh6j+Fgme3LKnkbugBAxxJgQ9q0I42/27rdV +axpJye02yMTEHABywKyh03ND1GxHVQf7aG4oe/qJBWqoQrxie8VnLA3RVmo0kBaW8yB+uGK3fDlY +/9KUQS9O5ttpzfyizsdnbmTYmaSqrMldnJSuUMR7Nruq2TEy2JxcTgbDPxxsUCX2CZIy1GphuMJc +DJsK8tGoNhuAXww0qSsVj0k4yGI4AaHOqJESkNNG8w5Y9/yNZjqRJmO1/tSXo62gm0qEM9cuq1MI +VdKA7S8ynaejy+SkJ/dcYnukHOqvP0+yj4oav8stNxHCoyDGqvQlBR2bVKKzbWHlylYRzDukatFg +iI4OLqrfmii5/IWDV04ipGUSJ9htT6XrJmJYkURZrpAHXzhWkmFltRTZD8zfcLVtxcMgqCQg1oM9 +kj+L6+nLVm7Ql9K4bGQ3lGoUl72/mCZwmbNwzw3BjWZGTs7qyEwbMiVTwwrh7LiRITmikF1K07ul +FQ4EZUbB+K5zEldqC8B1v2Yq3MFIGSW6Ns6TpvZXDAp79c089l7oHvYyZhR87nl/qKudNDr6YFfg +WJUqvRWxCyg6NPYT58o6yWSvOI4yZQF+pk4zsFswkNMbK4EbBdRkM9pdTYxNpLPK1GwQc1MKI1g+ +yRTsLJRWeORxct0BZic792zoncK96VMsOYmQbuHl8ikSeVV4EL2jXs0PwKbzQuNQK8YlwqPeO6UH +sJCIYbMusVw6aoD3oacrtTSfjPh0z09LYYEvScWxOQ0BPIemdo2kfapER8Le6ps/9PfuAxQoxtKj +qbf/Cj3jMYZEOHRkyGQ4/JqavcSUC+apufXyRYfxozlxCC0ADhbXVCmiFrZ9n1DY8u4SPGl8lc/S +EQEsUvC/3eeUnWNtd0A0gfPGUO/NerYmP4Uy+7HH6vXtPSAhA3uXLvKjrRj3zg/NBsx8VD1Iuukf +0rLOuGzPBOw662Q4BF2ayyfDbLakk4tb75M8FHicVmboSd3j0Zbbi2+pOEWOkx8rjeo7I2sPxICd +6v6Ol89NVj2s7MwbggP7IOqgEwErRPVugY+w4LkGyMxOIRVvkyHjZHyGGAU24eCgvScTKaJiryfz +7TT92FfnluTsPDBMc0JsXIx4N4/KCc1sEVOOMT0JODUJu8d0ikcsRpNiOxMSyHdnbntDm+qvZGcR +mhTumy7dLT6wFYJ6UvnrPgIUcRLBJ7iyjJJ2LN+A3jFWxtSYeaVGXqp/8AZ1MJGF9a97vZl1VvVW +w3lEO6SpI95eavXrwxfpd2F4tR8Bs1a2BWBQ7ThCY2qYTDOMw7RBlKtIUnhwJ37elUpxTNOFHxrD +zp17WT+SvZm+KtEmqluAvrIBYVd2nDeTjGixhsG5H4v9PfGveV8Wx7X56f7UbEOSCHTP7PoR0NFi +DNfJMG1aXnM5Q+jaYn/YN8cJF2WyWkW0umWxs2olIcNJKGKy5Qjd/WUSUDafVAJQ0OjIaXGJmK4h +YbvWDJzw+yfJTkJbPO+jDOh/1J4XFqylGnhmqCA7C5H6rWz1+RfjjtIxOPA0kcIpZF/dgcN+v6zg +ziPA5Z7VhaF7afyzkgzebLDAw3oQuFGU9Gr6VQUhYLX4W9FzVrkkuvUpnG57byQamUOFpYJGKkYT +uNk4dClF4rYpF5cCodB4ozL4vs0F656fhvFKSjX4OquYUpbIhVlfzDSiSi60T0bFwMAsQcyrFKdi +C+kSfHcmcIV5tnkrTSERw6uM0FQAiAtEVkEKr8rAfN6URVOh3ITxBVrweNiw0YvJaSkI4x2/8nMB +0NXVME+QJBC1osO99WRjgWbhBQP0v1wc0DevAKtnGH50pb3fhlQF/vyKTfrc/i9/byPtCYkMYmo7 +syUPN29f/DiZ3jFUwTZ43xOdUrmd6Xp2nU2Krety/iq6D7OfwuWHwd6KakxhUWYbzVn7KDuQgcNp +oFqZhhsaD8XSXwIm/e4SkyxLC9QjQvgU/7gl0eKYCQ/fG9BUpjNKVyWdxB89wlRQ4EX0elw4pdej +YPRIpAzf13sJSnYcDtHkX98cIoZw/gIfqcM69uYrKM86lxZEbH+Z+e4MKrX96r9xl1uC2QcEDhIO +cv3MEv1BIf0XAG51ercfTeVPzNE7W08frt5SANu+onU5P+Xj7ZKurB1po3mxE/K8oOy20fdb30II ++1es2Xp4E1XKU083M0rV0TndIldYa+vnEAJ5XDxKK6Def4ZUBDp4RXkmxZoyM6wvI8dhmF3RR7tY +WFYftu+cD1hw7YsKLlSW+wQY+hjOFLoGvZl/C0fGuPA6Hep5X4XO3DZPOqm1TUvTLhs5g48vSeN/ +6sDZNCMDAez4ZufwvtrwBts3FZlwJLjbmHGrSXQRXPoQAJUty3h7G0g3A+Jflsv08+1tcTB5meib +8M5cHpq7YSZBywsjETaKLnWVvzdFFtD0MIoP1Iu9BMJV19yIHkj75HZCyGFiobAIvek7sYmWgICQ +17KgQwN6VgZP83oVT3YDh1+uGe5o+QBgeLLY7LN/5Xa08nleCstRdW05MJeRrKl88ygx0MI47yLd +Yn+aX5QsQqP50C38WKHj6XXon///VZ5WgowsaM9I2JuCqHHWtF0qQR4Hf4E3V+4aE3S5kKreSm9d ++vlEwHW5vRQala30bB3+BFn0D5XJlUtQclWSMFyxErLwfMvHI4d4L5tK6tWZj7eCg4tibmaXbBTa +wbdp06ZQ5IgW/CjEMO4UENznd6gMpVp3jK6cMma1XosCRz51wv7+mRAJYszuiXQge2qLOViZ5+mB +7ysmdUo3EJNOtm0HpJwkfLTVn/Yp7W6da3E2C9ddkpWufPUY9rBFcoS4DzWMNJkecUgwvOJjkwaI +tPZ9/R5CPOme36uV20/zEtBlOp5ffC+uKSQ5uJ7f8DFrLxFzuzLN74c7oq/v6VaVbz1j8qnoiOco +wJQmyqKIhiR1deQb0s+2vO8Zye7/DCCuuIAb85xmU42zHlaDaXRlN877oTH33xd2Kc8tYcaSHVOV +oVbuUKtV86HfOEyO0uM1aICQuvXDh9i29EBmr+WAPXZwYUnITBPvUz8/7nHIgVOJq/RsJXDxOrJ5 +XHN6yYVZQcNnanrEsBcj+DEDKHLkypLLa1w4Ad1V3XrWzFFgU7w21ftNHg4R9Ldbr42dPIelGLfB +dj6Ml/fmhzbXGJDy7TeDl7ieRU27O2SqwP7iGsfCqWGl5LKdq1IYytXOMJk2eZB/fu2QmLJPPH9f +AscPNuuOjlq7TVSY/dx0J1Xe7BMEOfNnE+gE8zqFIQfLeYb7OXCkq32whHgFOkCoK661fZq2swFU +l7aKNFKlR9Ilt53XloQTSVPNIcihZqADG4tQ5IXB7XSJzavNE3HGdbN2dj48tMEgtq+N764Fqygh +7AXMsiCI8tJYovrHnBRlJwJkxKYSJPZSyjbLwzUZDyZ9ezjc1gtlTEHf0IOpdxBvy8IevJelGxYV +hQujDBdweIxEIz+/rvtr5CzqfmzK10wUPDUrKRnSxO+nPT3oPdAha0HAOTxMNlN+j+E3yT2wm1xa +2Iw5DaLA+bEd0EFkxuA3Rv8YEul9zZxeJ/klH1qFVAvybr8i/VJscg2f3nMvXRhCNsrcdKEpOi/W +P83Ws7feszXDMkAM0kwRQvAs1DJgnWwEvrlOAU1fbSl1nmT6+k2dNWMnhW+ThplIR4dSI11Q6Nqz +HNHbgQwxHPhE2UbzW5bVldhL0S0sLmaHZw81S1qMAp8rTB+kYRttQ/rXxQQ33CKjE5acMH4CYyKy +/NB+o3/Mmu+5D28P249Uy+W9OT2gL0n43tSiL73xvTvORRmVXz/D7O+fthDQ5nuyJ40ixiKkdEeX +GngbDpsk7LA06EhqaRCyedLwPV9y4rTZcf2DHVELxIwFzektHdIjwICQkYtIiTcLIWhkqBUeB1pi +ZNo8PLY7CusK+GxdYO/jPXOtGCufJxXkndh05TXFVUS65rWnPE4qzkPDLzauK/FUOdVXJn7w2IPE +plwbSBwgCGkl8fSZeSfroWivh7cVBv5NPjX41unI8f3ne0f8VNonSfU0H90+P2iuo1FLct576lyD +rmzVJw8SczSYd8BLVlv0LppOnSmmmuf7UbB+EWBO84Cnw4mzkTlaZEva1DD3gNciVin2VTM8S37K +iNGbhRqzS7IxK2uSK8QWrjWdgypQ988ag1mEbb5k58aEGtIIAVe6PYs03fCTRGqGW05QfCwv82ds +/p4GkR7YulLNO3zbdisJvL0B0bXjkGushSMUXUMFztPkIyeq3U+6e94z5gWWUOTLw2Z0RLxV/Nm2 +7hkuAJlhHc7RE9jbMf7Uoqgg5rDhjPEfr7d8Pmoa06f0/lSj313tL0MQSl6i+ROb0TH2kpv2v3JA +GfQ2C0ku2MImc2PD3KymGUMkRApzCHwcSLgDDvmR3ii81f+LxaZ6URXIIeTGKcPjTfT4mABjjxRW +07fBcnwPfHpO6lfOuHO99uSEk27ebdfdeCxDn9aK8AR1BSR53MZ7tNSZINHBsxr9ufcEuTB9zznd +8MvkD/H5luVk/N7Xc7DDt/OtAeb/HT2Ur02R2/BByNrrdrXc15WTBxJb8XPTfxFy9nPRzMnldiDL +6ZaySiTj/6bbDwl9bJrl51wM64BDot7+LLpbmOtcGCz1K13DY78WFzCipI5hRPSUFhAby0McrDlF +peRTcK2P+wjljWlEb23zgvWKVzY6P3WaeMxzbo1N9Pe/6qyMVBvTkcOcv1oYfWARtqNnUJesAuJI +7Lf/cO/nbcagdhUg6TYuLF5ITe+acCfmfzq5nrxYt4BDj0VKxuH38C+oingLBLFMFjqgojEFZiL9 +mKgnybgmsfkBhLlijb67zKPbjWjFQPUyMLsd60TyCzbzzvzdu1Eix05+hP6HqJNIF75J3xUqaHi4 +W7mOf+2m5F2S5/I5NmklYmSUjbBMN/+/LXNY7RdBYFPurIuhyMxzjby57GHoASGjdB0rfxC7AWYB +dPxgZuygw7ekOOQ60l7zdOkMm/5uk8B8zVfR8m9mjRvt0LmkWWIuKiP1NIi1I3VfOasJIFQyfKVn +Y1WsoUKhdRlVnZsl0i86LFRoZ4oPNY9hVVgUx1yMiJcAzbQ4ZrMCBA7N4W0mIM3QbNECCgs20tGn +eg/rnMHtwSnLgJV3jTIUzCidgiBbYpR8JQNyN7wraWQC1GMslHSHEU12cpjTu41UMjdORytolJM6 +SwJWjY4QGcHzdC4K4NHtGImUnRt6pZRinOWVO5xSiViVtpeG56as39Pvu5a8nNfCEh8gXOHUJRn8 +anBu9WvSCBakEeZhNbzre9dBj0mj18/t54PSqZ9Rt72hVfc3RjRgYbYS3Xf/h6tnr4RQWIZ5J2OM +tEMzN2+bYkWcpyEMtBaxE6oMjIOr8tZNkulspHCLEnzZT8knXDlvUztx2cQokNvewE85HAJQeylr +FH3BjUXgOPwiUfvL8IFzFcknK1ofeIDjdoaXG/NEeDWchZLvjtrFpp6TEJ8tE0wnt+Qummr9pfn5 +vZAgBgO/yRraiofOpiz4FbhiAWS3Yrwrlh3OdRkr0dNeBt3r1pVjb5qEnNoM0SDKrQNTfUKc7tdf +Lzdnu5HrkpUeb+jfIQdRVVjb0qNXXWLa1CpzbV0gf3hdM8k6lHSKML78p/XBNxPDRP7hzuOxwrKz +oCkHRzMHZYaSE248V7k8hg7M63CXyP7duxLAET4bkwO5zK2WgDMWo7t4nBzgA6pLgWGaFW5FQjgn +Q5uXxvJmHNWmH+fSDZKmn3T10+LsOU0NXLgLn4gK7hDedDBNtQ8y6YI2zu0VLy7s1qTmUQeE86o8 +8+kkFsDRyDsmSBz8PfcJPZe9+Kv/xxP3Rmk4i9IgVr9iq84aoMYR3jHiwY04FjewY+HcfGoWAJrE +D0HyoJE1yaLSdWQ2Wb7ZApR8hZKPLz+bmqHCTUG1AJLwt6Cn8uekt3oDKpSmonMpb3MuCN/tJVh5 +j8RwyzF/+bcLsMMu3+1eY8+Xn2WQEp9mcv2dnOkjh88cz4bpP4A0zT1i5CpeOKBD7cuVb1opBKEo +MoxVNHVwDcHjC5mA8h9YZmLGj27GsfMWrf3FjYl4uEOVr8meEDSMarDU1XbQo1Zm2pwcwkJd5T6V +K6nrmFfHucPEIWmwaPlliBbQi3NL8L3jSYT/fxV7VICv8WKglrL4qEMpwrUL1tOkLKltNoJkyA0m +Yc7PjNGqxt0/SqBS2zZKKIyx+EDfhvUd5Z7LIRuR3cH+VBgH9AKGkrhCBkC7Ib5QO/WOSZR4VO4m +HYPDJd9yMA/5RpqmTiLAGzVGFiDHKor5DC7wpZNsKcXXGKAWgnO31HqUbbcje3P7NBXIrKSu3JJy +P5OXQ3NaPWAgSesc93Iu2ZsZ5IkwiGsQFCLTxBJR0rOmcBllQdj2bzkRMHzB8NQvJ7R6E+hUEE42 +b5iGTsrbyUTGG+QDI6N9O3AXEubrg1E7TS2xRuVmvsQ+5zCsYPbqlIbeVVb5V3wszCYqFATeGiMO +hymmIyBRnBA4yILBwtxFGhSETf8DeTkV/C60CO3M7iLZa++zkJFDTRAh57NpOz2krqorVCIq1ptP +1dWVfXnmWipVEl4zftfN9km0rWolwG9X4BOz7dM/2z/L5UwP5fljLA2PruDKtMLkCkpwOx8nCOsj +jWzX1RlwEbcLqHD1QkLkIHUskkPqPCAxzdWGq0tfYojRLfSrZbNj0PQ9OsbCGXt2uYnnTYecalLT +LTKCbGJ93+GE6NKLl3UeK5b98/NMVehMDSRxEXX6nzcB2eywuwJSF7D/9QN5f2QvKusYy8DdU8s2 +XLL/HtKPjgV0jpE+KJ498twAxxwt5naRQ/BLFF26da0uPj5haH+xaf0Sg6yy/hlIDgPCc0yNOTDO +H69N4n6Ns+kITSHxOgU9LdPP9VIOx0ctdJ+eGD2mzdG2URK/6B6atVpBz7tCzrh338U8BqsTlboq +rV43W5mzU8HA4WzXpdoRvFUDtwVB70EltUnPRFaFDNBZMNepUvqgrPn+rXYRIkB8NpNvh7P8WH4r +A2C7CRUVsQbsAEOSvcxeTGZzMUYQLm0npRDmDRL0+qTCF8yPvDUMwEtjRkK3WjLpCfuLLs6KKrTH +wNCoVhlQjEKHtrtpgfA16K2kxx32I/pqS7b95wrOiQ3gGGQPZIHfqdOfQWcjCmloNyTcUZn+sLeR +bXpFma3xD9YvImgaLaP/vCX8WZl7ajr5VyrZ81v4NuigQEuGVDEcWgGY72EI/EKhQD2L6YjN2l7E +5PQdWPX7wj391VqY9yuIOy95l77TO7tUV8Tav648RbyaHhgdtoJwt2gBEmU0n/FGbJH8+ny9L35l +pjEM3Fu6IbA/mWZIdm+0I4f+2TAMLRRW7PuQjkDnPJehvlbVuFl5KE/C2170dFP6yisf5tgiTYWe +4kGMKxvhnLTe1JXHoFDYVr6GIIduTGppBjixPvJSDQ4mpmI5u+6s0Di500DwackC++8UBSeWis2w +hJFr7/2QHZTgsMOzyG6+F6w9bnEGtt3//fL7rdUuHgUbKkG7lBN5PhVRXn9mF+mvlbFotR1VlCyn +R5YHSys/q54gjlYa1gJeMZdejH7QdtS3palbjtLCOXtkAWP8+DTej/jAAuPGfiE4kRzdEx1oNNVx +9f0WFDNxP/XsbDAfwvza3IK27sjjX9uxnsBW8Ls1Hwq8PfSyH+BGQDYGqdOyjRpHuYmQ46fQvDK5 +A7+94j2RxboOw2rDCc5wlWYLRO6OF2y3+TiDmBYqvJHERLtpIO5rIAaq0Mrsjq4eYnhqhOgvPnQ8 +2XppvfOvWGtKMdN5xgB6HwW4dIooxfq1Ksz648ASTW5JqSLuZ4pNiwArnYpGhbxmVHMrO2L0URnj +wk43AYK2lqcFu4NjqULoU6O1NjZePF7oDcdtEVcRyH388hdlTAJIXNtrCNfdYaaKDE2p08O3lzwp +9eM0WrH2whnwUaA1yLZkHnafktyGS4Ki1bDnZP+6ssjJ1iX6Gd9zsxMoyN2ysAGs79e0heN4qBNH +2seOH9+ZvjN7hYqRWsm6DZKFQ7NJyfqOYslU3zDBnlVESYcSemaID78vy4HcQUXOFBVmiU2y6Wpw +3AHy06gN0sDSVKcKtgAjuSVQsuChTT1rvRVx8k/PkbjOhir5/O0TYNECBgWV0SgqjqeVZIPECDQV +NV1Q8Hwk4UPcz5qD0wkh4X5PeV0Or93iUs8hLWAQ+oLyIHRg1p1w851s26koZCyvprbn5U/fM2hS +81Q2V1xtTmvwR+LV91xNrKzZK7RJf7EzD1s63jgkl/GZzFRZe7/DFHSB0zYNXEO7ZJ+mPkENItAx +fo335XsaSdh2Vgw3w+H1nSB62F1aWhzY8SHAcvDuYDbn5ILqhvsSD1mtvd6nYzt1sDoCbJlPoHXL +CtVhKCwJUEdLggYmj6RAw2PmVqgfU/g8WPFY99XIeKPRhltMoJNipOSDs61Pal0N12BXXLqwX/2r +VOF2E+Nil6+kcME7ltS/nzKGasfWpk2vtJTVqgiQrd9AxVwvqKx3kmHS8e7yVAEoj3mlDAdmLuRX +eYEbEXiObg+Ry3SaSPbjhLALnPm4Z9kDxWePSD204R4RMLpvj0d7v6KX3CGyFNIkUVPVABV5RaDC +ErL7Oau6cYsTziErCADsPPYWCKFklIAdYVb9gp/iwbXSpTCb1x2iNCX/YX2WdhFJn6Dy+xclYdnO +HSuGdAXklUYi9UNClcOQYm4+WC3B69fI/oGAq3xX+FnAAj3KOYi+KWyxOVqp8njDw3v+7okBjH28 +5wUcaBOZXFRqsZhfBAk8b/fjh8L6RGtsGDswf2qQRUC4aCzv370dqoIyaSFPciUPFmx2jUS4IAsB +PNViHvAZXJHbcHapaMFMQ11W8yjJuZoiM7yvKfCMtL/e+3wZYHdbJvErSMFRFtPwcINk6qRNM2Pg +1XpCh+Plz4kqi0J2u4lo1DJjo2WoDk6vgz8SggiYF8PGx3qVX3N2HH0bskZKRGd4nmxIBX9ml5hk +k4f7jGPoxFxZO59pfRkjtHOxzaJpL/XA1mU7/4hH0gnwjxR3oy2T+SfaDkW381E2wVV9fJ9pfbFy +zTdwxQHDTlkvoiKZQVEcDjuz542fUFldUxUs1yIKjfLY/JsZp1BYS4IrbLJBZMnlIkGcq8XZv3w9 +qPDCj9E1PsmJFNtjYA4jt2TbTRPehljnFJS25MTOEZOWoxfngm/8QY1Fgyw8+HeD2Q/U0RVkIADJ +ShOp2tDGqJKYeSEYvQnS0mUw7zkJ41YD05bRHLnBYMmt/yP2wBIFXoi03ZN0iXRrjso/OlilJa3R +BIXMGaL0V+LA/kjUA2nJmgateqWuQ1W3MjtjEzSKtZwPbqz0N9PwwJRCCbQStjpt74dIht1PtPYd +lL4pVqeoKMX+XNLSZ9ERWYamLtmTqC6xoEg21xUUZD1G/M8uyvhD6cgcAHVmH3KfcXjpL5SrT2z/ +iilgTOKXp64hbUpG6DRe+hc9O+5t1+yCyIJceKWUSZW3ZIUvfgtK/MIBDO+JVHQFTLmJae188xJC +2ohXF3hon+ZXKq0vUUZ1Lxk2ADWYY3cUnrqH2FtUrEjf+Xq/z9DRNLcTbnZlfKwbMrz0VCKIZuII +EOOfPaY4A50/+D8JAWrGEgRzTBmsFeakuIix4etv1zrXpWFlYMh3BuL7DzbY5zl+OSa0UNvpGD4B +95IrN4XkopzQ4QFSfdjW4X1Bx5OzhSpMs2vLkJxGfAwBHThVtT9nbajMflC6bbeAdurOX4KK6yGX +VhGFyDkfI3eQVoSRzBdfq+seeDbmPUhS2FRrFSdENydWRwgb40098+fEZ9Zwwp8kEJoKRyTM+JaC +ZLyhgQeOnovl8v/1T5vmCCrrXzk881Sx1mNTwMUOmv4QhlUT5d1qAX5Wu7x1v9VLWAhg3Sq6WXgT +qIqF90q5DwmrNiLXxU9yTFv6N2960j1d6IwZKh/J1qtL6ewxGbw51kqtCPDGRT5cn9zT5RQGByqq +q3I9EWqhn1rDKLttEputb7ryI9IDeioz6M51Edp8F9BgPNEuKCB0ketqQLdguK3nentbKy5qzH+i +4qWY6wl6d4W2rcNST9jdjpsWLhrinp0ERov69VQp9CvNi8QUf6PhS7HW7jqpYHpx27swl0AKPmYB +L+wVO+6kb8/aXpEdYWEd6pIzjRiDVVEvGjabG8YoSRFk+43ZNk3C0GDpDufdUuRlFXKwfOKdq6or +UznLhaalHC4/AjtG054nXR6syupgowKt+ulZXn3SQnl4xAGjCtUXBlTjBuyXw/3r5vXjSmfggilG +YgXgBTJiIYvx8bM7L85ZY4R6Wk09amA6W/JXsi5W0ninEX8gC5FiiHU9147GuAeT/BM1/nHu/l06 +eyWeQaiap6xpDe2RDP2fJzc5/gZmdjoraxuoNPFb5r+rctAplO/yy0H3r7YjWfUr0xNqydu67QjA +1QgNO2Pqd5udzmKxXnmLY71/o3nVU1Em2xlILedy7gxt9Z/4HjnlQrfy9JLCZPA5ja5IATGaEcNO +PD9z3vOIn9KLGHiUEnmbnmKVe6mqA1DUWTnDO1ip5BH6NGT+5nMQaKzQ2PcIfL/Rxqt2+TFjkRn4 +Qo2mjOuOXhqbYq7LO0EUMyNQxeaLfItcZFvjvwMvqVWOKXACMJX1zSim5jp+MOWLj0fMFcF3a9Re +1crwnc3aFERefjik0bsZfhYlY+iPCP43KTkTrOLgDoinpUj4X396L+0evkWUyBy7/RHuKGGWOXma ++2pu40cmvusA/xjhog8hIl8/UB84wvdK/XhNLBcQG8Q8o/JkLhOH0qEFC4JbTPh5CQVI/ce0Cdwe +mmUTgh+6vFH2f6TPn55mNmwNCwFXTXyRZMqTOwkEUywJxyWgeau/jQHCyqgMXthaLThvt2LzqCSR +sFXttPVH4e1SzW39Gv+VlBsGFx9oAJeA67GtAL8desShDw7vet7YxhYDdE66brvgYU5Zp5bS40vZ +DOYhj2gYyOHJxt9/59VXZgwASCEagMIJaNzbw0rLKQj2NNpWm3GqdzxRkbI+c9KY/hgxUTgOxAHa +kLyZulj7cD6N9oXOnHHzqMf+RxGkRJ5ca+rvp4XjaQkCds5N2vGj6ClbGVYKXJFOIGG3IwYEAi5C +u72NmtZ+YBIzBpS3WbVYey4K25jSwd8jsO+1/Y6Z3r/qjKAtolEcrwcSoMULNJ4Rf3I+SbMkqq2y ++06hQg2k0PXNce2WO0YaCF0KqiY+fBHXOzRV2ZQDi7nyHaseaYEx9B4zMqY7g6Ebk7hd3Xo+T+Ln +be6IIZobYDlemgdw7D9XnQWgSRr0nLGbw3f7P/z2GPo43ONEQGBj3dIq/910ZjjoxoaSB+hxDWau +QTIAQb0JFhAGhfHQMYGfgvjK7bSFEvDREgCmVGSdCqBhn3Szs3GpByrZePODghSsxwgwaKp9mqCB +rBypCBRcrPPqZl47sXUJOIpbrYaqtcrtYxUGFXAUxLxeFpSrXq5nmflSzW23LyIN6Ay4MHrLhkgU +guwWs+JaZLVl15OdMUqrnG5+p2ZK07VT4utfsnBtJspVCt8DfuHLHj2IPvHngzqa1LS+zKBLlv6a +FjaaCsClfadOaw9L4RgZsiD/IsYL8g/Ho46v0Vj/xH9qhpdVrhmTj2bSuyPQY2hnCBGGAXFgMt24 +64rjRLLvkV1i8PxClZNL9QzdonkgeyVGCNl0syCXGu8Ph5G2Sc10F6t/Jhb+zBixucIepLteWLuD +QYMbZFY9dYElWmCQ5ZT8HqHbIO29E5fe1dPSE7JhopWh9Jq1ReEd5R1CAfIrTSqplDzrSbTYH7KL +koOTyfnzN4RAvlqNWU37ukT7rAL1Q+pPLkFIQ8xSSOqOoEzkZDKvicMyW1It0KSFKtFXjbCEguUj +vXU/hXGTPUbxgLcNW6la5ie/cc3sAH7ruBdPmL3Gsxc2abr22Tv0oOUTIa1qxLeI70Fa+owD7rOU +p5NO+QeyLflLf/8JX30HWmYg/4QoY+GaRwFt6ydeUhvUrhux9mG07gwojlht1X/svYW01G2RaxGB +zHRCTs4EqIr1bLVLP4EN7PKWHaT1Me7rDOQl3Uw7SGbmMITM5g4fCj0K4deC0uCjutEJrvPCnyxH +kj2c1paF88Fvf9B3dFAkPRFt3zFr5pYdqpDSyaay4PplvHN0A7veGprGqm4CS3t4L+otvI0gD66U +jbiGF7T2u0nl9jImNZAni0DLa2C0DACckfDx5SljHVBA2AH8Gb/xCKDA48AB3PQeYIJSZXocIC/O +3G50DkmEJqeA6C4X033AZwNCNOxO7hkrPdAztJbVzLBJOjhgPXCzWZGOT5/bFknkVL0BSaHq8WpL +uPAOEBQyWomdHwgCL1Al/GWE92VLXYmEztNDOcanbgdGHgOWr2Uamvkfv/SQQzLXSrTWsSjZTgXL +r/Hw/R8vY3OXfO/ydphevzZPT+1+NZodlPjVNRtxo15jdyusTiQXkxHWZptej+9AMfxzQQcHZX9z +93gedl5DhbSl5MKG8RiqYOUOaG5hb1Z5VRVPWiAhbN6hnUKUCEPXOKggvKJVGAsrOIgRyRZq2w4D +NBHRP5Q/ufYZCQhDjLyY3L13lwfNiLiF2MvYRzibdQFT8iSafGvl8MxGy8+AU/+ufqV0e7m8UDem +9XNZilI0Y8lI3InkIfxg06wkqMIf/baxfm2MONpZk3f7hjEk87xj2G+54zo9wKfp0yAPCHW8nPm1 +mg9zzpbQ9tatOU/7Ozxtx5ZCHKDWJdUwcvBhWNQ71ILd7ioXRUzuWnTHAycD+jW8n+X+pC7eDj8U +NNNxfPX0ut12VEZ+goXIT6fEchSJQgJvzYe3z/K7RZvBFjySeE/S9sA/U2j7X3pTHRFeU5J9/4Ry +SfgNpj5Z5NaeMCuoAgpju9bah9J+UNoZKuVZrlT5z1gzP6jvfhTk4w/BfGPt7UI6awD7cgDwjfG3 +dBeEAwwB9I+3X3maeoLDy6q4NIMvWzNiCL9eLl5+o71dPGtyya/X1dCkr+9tk5r8XeJaaiBXoxvQ +8rx4SJPCGJMzp7RPy4M5WYGVz9Om5LprVQ/uFIQkGrIzBJ81leqjpuIElEWYGc3evlBejXuOGDRV +RvdSGyoTPW1AJCBVCpDRM9t1TWTCkww0hQssqQcbsyzb7LXIHoXze8EW8DHVjVvWuofCCRhSB2Tw +Lw0QKHSlNc2hLO0d0s+XoGdQvPuinBTXxgC0w/xiqDgLuN8HCzmETfJS3qstBlmZei9Bcx0Uc4Rt +CoSbmoMCYM15+8hbxLRimLsNm9zNjx2hwMrKJuy0xYzXRLTAf9ncjGp+o6ItPzwyM27rMxIYrnCM +3XrZpF468M6RN2LkikvaI9EOhoV0FtVr/XNOiL86z+xY/u9+dWsHfORhcTs0ZDNpwKdwV3IefZ8F +ooGQ2Ph9hGF5AuYKbuIFeZkQxcuhk0Rvck4uDQh7NB5DnNYRbUUeWXkxlt7uuiCBA43xxvv0MQiA +1iY0c2VaXm8Jjv6AQUnq3Jtr5r74DogVX8l0Luz5NZiPS1eVUCOfeS6fT24ZNQGfp3gBFhEoiUo+ +OX2KZAXtCdsao+h1ddSebxMk5VJfAA0GonLEsUFVZo4rJ7APpCut+sJRxGiU7tTzvwvEguqwIy0q +6Ui1A3O/spMjumCOg0qZE/8RZZJFR+l092gH2IcdfbGOWx+wRXJyJPnsuTlijQNF+1j2T71BqucF +uGFNBiGI01C0G39RVkYWi/5tsH8E26p+S4VC0W73IDcL65FhVqeWtTW/KHnVcHD2EiNBqrlU5Y/w +62ysA8UZqHQnow1pX8Jcq5bpghbNBO3vImqU7CTnI26pzhRUJpa6uV3v8P96TzraMmVfg0MZqfeg +R2HJba0yb0yQd+bCPHincgbY1pw3cBhHvrFTLnljboc4aBgyG/Aq3uhfeT7oCffwagzHb6JkvDxA +2dBWf1SmyXCsedrMkJqoUvD6R6w8BhgbS/ORpyAiFfCUizx6Wq4/ipTRxJzzt4gWD9W1U7KM6r8J +Q+2c91KFNA411zFMqm+pY2FvlCqEU2YjzusvvYiEVPrKEfWOd+qS2Kax+qgMpq8WLitRCeM/tZ2W +9E28rMckgmKwcCNjqc7WAyE9AnPmMx3O+6K2g83bs5gpap0uaZY6RHu6QISNI7oWz5dNYtv8GNZT +s/DcPk+opkPi4LEy6X8J+Z1wzH4/IhXzdCCUK5Uh3oloC7uECP7uRR4FtbuRqcAvpgzsTauSBEZb +Lhto3Kh0IswJsEWqJep8DsRX587P/EdPM0ykY+j4UaI7rW/a3hFHOKuXfuuZiE6hacuYhR+cdpQS +td8zjgHX6Np2UXK+TK5uJwd24J1KjZQt3F40Hrd73CQNzw0mpoWlse75m03/sosUNVDl+Xsg9Hqz +7PpjLfi1LflqLihREtNliZkL1WO1TIjwXTq+8oQKw5xE+24bTCR6WUAs2/3azVYArFiVltX1h78D +QIOzvsfkGfAUYWApCM8Q/3zHqJIlVYABlIEFYh4AO3Ttm8hhd8I9ja0r+sE64C033KZaM5xlzAWR +jZJmbXEw3AxJfDtFFDHzjcaQovdx8DaSR6l0tu4dR/UhJ/vjTfuPJ4iEFvYMwVW3+OtMSpLFBLYm +T+oNfG1bnxDf1Xo2sA0a+JOcxv8SmVXPLa3RyuInVhUeUVkTaXEFdM/lUuo0v8lYrko09qtZBik0 +2dbMPzBErbX3XKzX/s+wKsRg5v3aa/zW5y7L0rLapU3vsycSDvUZPPJvarrqQoiM5KE95Cin4RVM +7UCOVkvh2AYStggELCF9Rtv6BEdaUEILBS9pSIkVMGYDa+3OtAGFKelcT1ECafwffVE7x9qhgPmj +1x/5RENqNeEJpyV31gHkmTqsQAOxgaWHntLxyng9YlcLDNp5oLv+walSMOjwbEi+uKRVTgQVR4mC +gcrn5mMAuRt7FAedU14AiHn0niG8+fXXbMtccC/fZfXLlGoAGzq7qXrFb0LkbG4qQM6842/qOrlN +VXBhOHarjwLn11kfNe+/twz2To8dN+sndV0NWTHGhiREBlA5zkEVlNgQ7Zmv05CtbeHq0HZ3Qljx +IST2EDzipsJYloW7MipxKwIqRYHWTOu9mO5IhsudCf4rrN3m57ddhhilXketXFLRBFOyiCPCcJ2S +9iM3XscoL4D4/luCO7uT85SFfI2VkQSceY1hbxZoEo3G7lXz8NMzXfsulv/WcTcJx4pl5VyISpaO +TWEcJm22mJ04ms+ggjpNvqWWKKTznlcOhaChMh0CT16wNXMV98c+kCgpLm8SWTMEwibseeDdlEkp +vEmi1IKyN5Hd5hFEtSUO/aNglxS1A5d+4BiUmK1S/5qBhpu4Cb0ZTarhPkPN7ZHvNxtXHFZEy9KN +LDr9Ui1H4rgDTZtdA90hRp4t2nFehV9+3j4/qk9seSJU9U8zvspdFSnVT5W6IbEe0dJzD8n99YQ1 +9XM6hBFws/xajbe7fNW2Pz8PR/nltRavwjLcgB/P2VkZIZ/Ul0JRABbki4ywfSgYyydZ4dQS+jHf +Fnd27bitQfZc3IYM2Hnby+Mk/AqPjC9VHcqSlBz+LJwCXbeZUp3UaxPC958J1LSPvBYImzygWXQN +alzaRChFsdefVkg94a3y7psGOKV7nWi5gRUTk+LKZsyLk4BU1AeRadzxLNfIRu6AAci/dlSgNSsK +3N7wmgPnSKKUfuGSPk0I+xrPtYpGJ+F42TMlUYFeFuGFbUxWvFtXAyiRpRTb4UbbveUZD6QQxAX0 +M1Ed74aKdKuNjIjysOknC8j66KbV5w+bB5TVUgAidNSDwp/d6nwVYd/Qc5VsdqMuhrX3JBlNt+io +zkYFNYYVoAl0sWhqVl7zQx8iLjBY4QnbI1DC1d/JKSusN0Yw7XgGCKifPU1GxjAbxy3IrwvjoOYi +vuNW99DUhQtahcSpaWPb+CRCVw0dQiaW6ebdKrEwMcAmZYknqRxV6LLS4krqZwV3etoLWTHoJRKu +aSU7QMCcj66PY8r1mwGNP/udOxEpSbMT9YENvZcwNZtdqFdhvvi1FOOhh3UPsnhcVgI6Ep8aOy8I +u/Y0/61p3f1oPt2omjJctFvHQWR7y5rvpvdAXptmBKi7W/aTxFXLXJyc6xNWz4gDn2JVpXHSIVHa +HDfzCGBpI1W7IclxO3zTLzytkN+do829rOyRfJ4lOx6AmnRTHnh5/GTv0tZAygTXeDRG7fY0B/nw +Qa37S+qk+Cm7fIYdTupwc62t2eo1piTz29S8cy0Yl5ksUkOrj+XJ2b9Ycp3jqRULugSwSipmq2sl ++nT0r7yiaj9aEs65jDJXSb45hlOyy88TWDThZOrRW30JZ3OE7pSQV3SMLamuST6SS/x4dV/f7Yha +nsXIeosCWM1ZaNdHOZq9IqDhkidYYyoa/FIux6htyqZ6tL3NL+TDx7gfcdqnILLGPxlob4xYzJIT +O8kMgQ/OEY21VyYQJQV4r+gjKJ98RE7TuP+eD1GrFadZdF7e4XdJBvcJtejWnDINwsUu/fqZT13A +bJSoV3Cwj5Bdlrl2Wf5Z2ixnvxe7wHfcGVN9pJxPok+hNShZQkiOfO8xuVMuhGPhi+dnCCY0CuM2 +HoDu4D6fELKIplaKKjzfviut+MUwsH5XNDKMv270NJ/oI47eS7o5yVPjFb8iOVXaCMFpltdQKU4B +m2TwQdIE7Hzx7KXASUkgpz3B9aoIoAP5kWyIMOlng0OeU+C4n49VEO3wnPyrnXSe86st35mE02aV +C3eiU1SjSWk50hU36tndVKK/PeNaRVJHFFk9ySGZPCwDj2NPzCMyzCg2cQ8eyt70WtdkBFzcrZ3O +fDpU8i8WqYCnea7yIyvLC1boeTZX6kIiG+Zy7lz9vambzbK9t6FoN8yw6UxqeyHkPFra1lkomNGi +WcUO36UaA9D5geh1IED/wVQMkrCLkC5KqrcUDMQ+HpHFoI1DXGz+r41zzL8QBHi72jclmWEaYJ/J +QTQj0HNYWUuKYFG0Q2bnuAD/VXVAdMPGo5153Ivj/2B4Ttpc1/axgI299vS56jjJHuN016Xy0dLy +eNOyOwatK1a57kL7WIrie2cF0X8XLCSc5J2e5QOihzGGo1CIDUIShwlpSenNdNXWY4mOF+VOtUz5 +vPHO3oKGGC1i+il4sckPC3swLEGfvA7czamSiE/JaBBeZsc70SaUU2zzpf0vKRXAqzu7vJjvjl62 +xIn4zX8yk76dhXyRZjITj5rQF4w15LFzh0Ftgiq8nDxdMcXRyPKbO0N87aaXBZdBHxDWYa4ZOAif +wylmCQQ8m2zQUI7shybdzG/fQ0AntMx+930CiqqrhM8uvMrOcxLrHi6TLaGELrJoQpNlouIBA4/+ +DtxTWLwpY4+NqVXzTFUDqGITbpI5762ZCbTTOh6ZwHod5Y0s/WLGlzz2YSsXZym2n+tykSFotGba +3+Ryk94Qsc4OLLL/EvntRJd44dY/4yxCGtXbhQjyHF/IaryGzVr/0jNhZLR9M8KTfjgjU8Udp6Uj +7w6ZCpfTpxZlnK93HK/ehL7dRJsbhV4BK8ofDW1HSum1zpv3CblyY0uVJ9aCn/iiQz6GqwB21Z9o +V053MpL9q5rYjdSr9RrUBHio+0yUQYFKUtFwRb4NdUbwXUS1xjIiQpxZKoVzHc41dJRUKpMY2Ny2 +E6SQfRSDx3mp9AyixMrGLxJ+3W1M+ueMaPHBRuCMTHXnF5SccFoilU85mWeuUM5C1uMQ3kSzmxgv +D0tsd0l8Qitq50k47/3bMhFceZZyhjODJu2e632tJua89AwBhVBAn1ru8HOJr+Cl4FGrjGHqeRjR ++NQP/2Rsyvx+b2ubsIdfmudTePSfAf3r57K1orYR1KKG7VkjwXj45iubwZQIoDbyGsNWTh/OBYiS +9+nvJufQbMdPE5RRTJclNkefj6xWzGir2C2CW0pDq9iw1ZV4x7MHo0tIaWu9SKD3FvC4duwKkfbt +0PPTHC2JmoTfnDb/sseRo6SfCQhSwew/9+dcDHJzyRoh/I1gfw2732PbpYcwiF4CexzVbW+DIHZ6 +/8axbL1mUdxi5DyNnjvwP7kj+ataMz2ZxXOxTUTiX3Wk1ZbxrVLAFHZtysPU9N86zSnHoSbf+QNa +i0Pj125q/IURhb9fPlWLUlDxck7OCuJi5EHMEuD7dCT3eHwqCnH6Mf1TUgOTMGDHisePvUUbBFtu +6XBV4UsJfqYCJYqrHB5aN6qm+yaKYTjZ6rjapQqvxjQTccozEbr/D2sJoSipRnY+bxFgX64qtX6J +c8xKa8AIqJq0C7mIDx0hZed+DKyqAYTSXvJ6C3Ib/6/4HBD2cnITT7yJzjk/b4mgtgiz3BHTwjXT +f5d5cGoaKGLW60xadi5GeBW3IMu95A86N/wzDP8/nqtcsLMtcW/Q7pKEHXKYvHHT/xHfD0pueOc9 +JNIINS7urSMh7KVsYmdWFvKCDlKJ4PMLT0C9nGlcptDfHQTyoabqUB52ijYNSPTWFIy2lrAiAHfk +2tSx/rg3hI6vPozXc0bKgcCQCoi63zr6jTvLrGtWWvVEe79iPSOzO8rAX+FU0q98WuX7O1nLBU9e +2LRetFUS1j3Yp9wpiXyJstvjBr1MHLHaTekTHvKVlMMwt4m4+14jhQRSL3r9CruZMrVoyE/WyBOs +KUqkdkndNDxtzlpsg1QdYSlFmBNJ/rMuS0QwYosj3GdgQxNlMr12VYjjMVHEH/UlLzDPOROGzOmI +GROH2WBIRl/T/VNg9ghplG259tRLSLepz6pwJ42XrjrZ5K/ppSEihLoYOwDswonLNNrScCCjlVA+ +/1yS/Strc1rj9VVqP++Y09vsXjr7G+QK0/nMoF57LMUe7Pibr9ZCvhaRqzXWJW2UkSy3evCe/m9K +ufWTV2uROOJpJCCzS5Tf9xWeeNSc+QF3Csx5DzllIBrQqBjHZuK0Ql2DzZXGZPXwxxK1r7ucmrJG +lm9FQ0tFEEi2KHhJVOPWTakzgZ3TCEVuYlcavs4KPWN5J2ZrHnTiAPzdosafc2fCveHXevIljn+U +BQzuwrYan69A0YSFf6uV19tZFnlKE752OJQX+wAPRBDWyLGAeAPpVgoo4TWpCJiVvkOAX9OaQB/W +/Tm5N54Tlrx/jXkinWbrUCsOqSN+uJ6y+fiTV9IVTQ/0rP40TOWwzdUcUhQYip+91VbC5+NkBFuI +oxUSCIH7aDV7y260Kpv5493cECLCy1HQUQQoS6XwYL+o3K+4+uu+P/jN8a33V2mARNqXQO4Mvhzu +dZrt3vLQbOVZb0d5Oos3TmziAXNgo9OQUn7k3sG+fwP5fNPdd3V5JmeuTyOGMwcRJpevJyi6XcOb +70gZQdx6RuOI/06/GcsoqdA25T7XXuYJ5LS+OOtn/7vnqo2ptsUuomvhMOYIfJenK1kPIHGCPMg0 +o2+78VlJ3QcNjuCLFPpBgytYmK1CE+Y++ejWZ9teh006shGl8pDCCxA+P6FmNADUX8+/gw3ork1T +RQrvYenJvNteahy6n8gm6uMgMN3BmbQ1g42YlZyv6NF10z7EX8ccoOJbCkWmLvGHyraxhrytBWgx +0XCHZ3MdjLcEH7BGD4tVvmlHQuAY30J9bC3Ao473I7DzZBSklQpfPBZiFZePBnA0SP3kGPClio4h +QNEcoh31g//12gog1ChVn/8EZkZGDe6PuTtZBLkAfnWvFtEAd6i0xXKIJdIZIc8COfK+khzwiYW/ +mVoYkN8zU7nXfBBG7YTqLGA+dO4FJHycWO3u3y5IQHQQpwY+5OIq/FqNf1ORbQKVh9ZqwURM7boq +gp4TT3Fwp27nk1h+jZuTqn2L5P0vOnZLyGKlohade5mAfwvEVlxbFTVNqtHnjmLTQuuXhVk7HRIK +RyBi+EW2Aw2cXZF+VoATxMm3FSGysUtd0kvQvIbndOHQGSUsrSLoCQXpinuwChSjVTwEvZiYR4hT +jBUw8lWWug7YolqQqzCwJZHDk7mCG0apm7X8c+LqyU0Hfd/00Ojk7CxtwvOcs38U0m2qG5k72ZjA +xOJ8vmTc0d7abY1T8VEvdQZC+4RFpksFjaJfE5Kq8VN4baBiDHWL0a1pIuolH5GkSgRRCsEi2USY +AdPnwv+fjtGN4nwE9gZZy2qShzVEjVg1hQ1mZdCtkJkhD1KYUDenAHPf2QvFW8jjY2t4KZfj2pJF +UUwTyDVfEwY8cLuW6rWTvgc1Ona6i//dI7AUGMJC151KdYUqR9bdD+9gX9zz0+VYNSyYrFywOs/o +QBIes7UnR6nHb0c9KzBpHFvcd86k1Rfc1qVSsi5Ygk7rQOfqbm44cuUFScC9CLOY5hOVqfao7usk +vXT96Gk0Hj9DOmBW/CYg8bMdb1XB0RgHplx6Vr9jWcIGzUs7srz2P4OSmE+kWBaGV1vDHoEmzKU4 +PIn1kxxpFcEfpFLve+bc/L3Mt623ppivDXsXE9/kFNUqqrz6DxINENlwzu06QpKWmTu0noBiwjlY +08r5jqqHIkdhJgo5GRskWSYxuIVQm7f5JNSYVUN4GaZEgUF1HAxtKNCo9FBK27l6aJQSM6I+EIfa +U3KN+PMACHhdOoOKK34+nLDlj0VXd3vNwWE4NLInHYMM/Ua+bSAVkS1FIn5U4s5QOYgsmsD+kH36 +bJUZLyyL7VuBxnlwxXc+IXV7uDOhPa5ICWRzGyHNXVYbln6848NtTb71qd2y/qoxzLzTWL9X0WdD +/H+2C0lWZSQGD9piMkw6ubxE810sLIKWbceJeUVh9N83QFJEUeQ0ZVzPhhmW8UEgiFlue00/6Lic +qVBLF5UYWIKdFboSyG08Q5aY4Q24hOG3sh6qCaQPdtIBiDFLlHy3YP3k5skZr+SREFVUI7PmSBb+ +uohfVXrLhPvKlv95I1BsoHCLhw/5k5h/LoKo+4KFBD1V4dlLPFwNhkh3EJo9dVcA+BIWin2DATiG +NAsinTFAT5Kq9uBeYlO9krs6s6EtaZJC+Nifnx3VJtjD2TzEX4Xrf1UOUJdZiaTVhCyYvMpLyY6v +fSWisUiaXwhDfkD/qznjLa3hEF07alcSc5Z/o+jYfzS1Bw0Y9cdzQwdOs5ZZbAZIcxIyedjtCEpv +uwEChp6c9xV7ISSwd+9FA6ZgE1lTSDiDd+hTGxxIYVqhie9iBFS3B9x3728lXjhAHvdv9afFgElS +8+pfgKPXvS4kZSrW48ffhy6HH69JA4Vxf7QUZdgGawk/oJVJv4Q5Z50uorGZwTu4zTm2OpsMcxLX +I/PSwSx+m/qFypfaH41GPNjjYrvTogNNVna6NzjqP/HCMfLVTjtX3hGkhC2wdgX3oCkO9hIVUIoC +h7Bz0tlEiI0NV9woMWOSopec7XPYJvQkAspjzrqlUbM+TebvnFlo3Ucur6EBtjLo/LnW3t94zYmp +beB1dWWqPOJCTBGoSNoXPkRQzYLkf6D/MszukMraa0p/dZx4Xr4R8N13/+0rdFoVByS/joF71RpJ ++8eGtDwVuvxmDIlYPUI1zZGxeuyfsTMhg1m8FRn02UhjBzJZ5U76SIjTTqGF/UaK1m3punjE6zII +LRVPISgg61AVpstBRsPNS8W9mEe1tE6A0Smq4lSdvqf7nmcjGTsR6wfCE0siJxMgLGCR/a2JszWY +QocmdISuWzTwZLBntlhJsJ+bOc6ooqCyGNGmDGtFkpgTvy/lGhPs7FjGNpR2q0ySwSs1VIRnBFNw +a23nILz4hcvbyic2r2IgWdbzNrPFPRlYlm6NTpfaC4QYfDPgB5sZ8VGFxxaQo1hRq9L/BvDrVvE3 +oHoF7LEck4QYr2w6+jz5HixSMprTHnNbDnxSzoALel0XKnLDbkb0gOyb5GK+DUQmzGZohji6NGUG +eG9M38i0c2LkLjUzuXk2ybHqUFRxB1kJ18DnTOxx+pSWfYyEoffD6GON0WD+/J80fpUKQEYXJRCG +8nEnwn9xWu0c9mPqheidoB9mEzEVHv+96gTNpxvAjtOxLUVWkmVOVo+8ESR0KuWWwqvi7xte/fg4 +EAqhs71d/jNa/4Dv0240pMqUySy4M7i+GX1JQmkGH+8xdTIVBeWdq7AERRQcz6aLA0vXtNoxjyJO +CK4H4RDpwknfIormxPbLiN5F2dL58hnSduerdCCFexapUGtfOsjGZn2hmrVF0Rq5dL29ck8NT0SN ++o1YtCo9614Cxk08zPdCOMucyLDVj96ay64pZcZzRqpNoobdPT8S4PaNnPrJMU14PfsBxPvHX0w5 +k4gL/zs0vVRH948Df+FLbE3HfZpLaEQHP3lUPsgUk7KBWZD4QDj91v79XKr0ZKYkj4ypaeVYVul/ +zavjmPMCD8pJFW6cy2SDT6gqw/klkSJcYZ4v2EKx4l+zvNPMucvTv9qjLOJgShsLWYFU/1iiB3Sh +EmY4PrLfTYSWrYHmdwkykf2qn8sNIVBH5LrKB+/CzAAkA6dZQyl4us8vOM9WkM+ri2DCmy1pMz+4 +q6XX+qljFzrhJDLaPScZ+IEKmcnAQ5diZb4pMAHpQltEJQI6uKr109/9GD7QMP4eBS0swkcna6ho +lvCzK0KVbo5Mkw7ZJe1NukYSnmywIIBiAZQQvqCQTBE1/Idh8VKmEOlLVP/J9IO3gU1PeUtr/Pb4 +h+lZdgIrMlFl2Dj91/bH/49uuhYHY1Wfz+I74XPEAftsenmcPlloqhg7FgpC69SPcBGxHYptZK7f +SVW4hsfMunlmznZrqO8wiRFaGsDjTjyzMLQFG9T7WjhDVJHhh39xzgUqpeMcRv1A/3e0RMwU7Kbl +ffpiLeZ8ZBzsSZu4Ksc7jHZ9V5Pixw2I7/iTJu09Du12LFJD2vDyDJZ8er/uD9oLI3yfgnJdLfVM +WgEi1uAZV0GUgQ9V2qx+uF4JACauJ1Xa+7a56ruSdl3nVK6aTy0brzhA3VZ1UlROAadRPZdSciQ/ +BvSI+xnmTbRde6o1Fd6tx8g3N7ZLO9hp+bM5RKnQkkTt8VxHW8AIdIFqJqWpe9F67XOQT4hoEa5V +vQ1zLhJeJDmfXZHLsdoxzfu6eC6KgNRMwz8JBW6rzK2JMs7I9ifI5a4KjqVsC5746Jq0tUgbTMm5 +mCbLOcTi2w4Aa7KIVl/Zz9VrTEH5XS0Tdtb5hTBQ29ZX2blnap+JRB1TNHapFSftby0218/F9nnH +ONmf55cIPWRVYiHU5Y74JCyL2YtS44/lFm/rz9MuNEE+Xi787q2Zs3KcJ3CGZFzcOH2xxXFhLvSN +W3JPk2SBYdZYvIpfHJ29pTtyHNNyxDvGQnKNVgn28ubQfi4no7FPLVkEFAjn9vRLR1kk78zWM0l+ +i2bIjAMpKS1O3wgexJ+ueivPUau7O5NfRhfNzBFo+2mro1ghlWIw6HzQvSeAstwh0eT0tQZ2GGvs +MAMXH4MPjv22sPP9r1+FlzlFjWF/eQ2eNemVTtsBhLMbAT0AwIHCLNpBTXuKo6n1yzAUxw7kIvhB +n2wH08O2baQxfDFkyNgiJ2ewqN+fxGRxNY9jRwUQ64eIDZtSNHROeymcFL0gEQhjX7u1cojVCPvm +Can3Nk5T9ghGafhjv9ASb2C4pOyrfbyNqGhS/KaOhVRnccw1PqypLYsLfOTSSzzB9zmH+9ys0ufQ +QjiezLg2lgwMGwQIwESXng1rqejCA8NtZcLlBCVrQ+Gn7uP5+bSLDDWmRACP87sRvgyl5GroEtsG +7kMROsPPETSAE3XCChGxDiULXeiDdYpGRgI6CFhmtorw+2h3P/m6404fYVCB8Du7aP85UT5uk+kx +wOPWdfhGd9UK3qAsecgivBXZwoCiGoVjW0xisN9svdMBkCsdGH1/YgdQk2kJ2vCeFaSPRHetwAPF ++to9ObZbl8yRaIb3RMGdQv3jd/vAWAsYaBC/32s788WlZ+EgXz2O6x1O9AH+E88LfIzj0uaob1nI +bewjsHjS4uQZj21oEjcMSo99sgAcapQn75z2ZG0C8PU7RgNSwyT46nEhbCaulWND5Zfm1LQa03IR +coLO7nH35ElZ9nePvEC6rHK+BU+v2+30Nye6tkO2/hYVqUBl5HJWPKdfNiwN3/zOFIjbegj7hqoh +6dIbpyLrezDMNplxwdpw4T+t5zLjQRtTNHUBYRwGpI2za8saig078XMzoQtR+tTUP/p0bB2YmxZ6 +VsH4Rpd7SvKJAfJV0EgV1jRFPDUECJOjBORZukG42aefHHo4Jj6tEov7MXpE0V3Q1r+yDlG6H5R3 +gsHM1CmPy97vTb48iZf41/oZequvv9/hFCUA169wRlUBKt0eD7BUlT9Mn0uainxh3PL69fSXH9ww +PbGsKxc9C8YoURKeywVKjFcUeCEDX48hmH67LKqEKJSj0F8VmzgzNhSozjFNPKJDL7MRe1HlBxHN +bgHqhMGhViJy7AmA7jcfCN2Xsv4cK0IiQqHqhRUrETEqgARHIfHatxlJHInw9PdmArDwPF2JYi5/ +yPSdxZn7bRyDtCeljYQ6FGpA7E9uCO3eCzwNg++ttliACpnEDsThpCHbzZcQS0sIFAvVrOxWadVl +2NHRum0FrCyglIDLPS3axN3QjjXZ81swRLt0PiDurHZBaP0R/JxGhU9XGSh4fKBXsaFUgWuC6ZXX +OHpWRikwa4ukHSyrnoRESBxmSnEVmdUE72AMJC5m4k6xqTwaXQC3P3nL8vMI4FCVM4x2Fa4Jhzaa +Gjm0bfNRwTj5QcypwEiprf5kpBOgQmbAgGRbWC4t/Sg+kLPvkm2VWbEoQM793bkPj/3nfAbvRYtl +V1paw6KGRrjDjoay19iIGZsHsv1WC8Ob/8eQuh/jhhFTJU29DrTZKt3TjeyYvwQuNeccI6TKKcTG +FGMutryzcYpkX8d0oy7bJJPMFDphzDb4afCf81Eu0+MxzjxOniaa0buy1NFwrxDsnmfahpTTcTeF +GEJPi0NQGa/VBlXAtI5crgL29Ag37E8/lJ4gdgzmIVBHVuXqr1XEgyh7MgParKLdcCO7W+5Azmee +p7pCeLPSNdY9RWmiRQD/J2THcK16qZbd4hFiTQEF3ygMO8YB8P6M7/W3nQZlHLupGbkeHZFQNUx0 +JbftZcQuUTo0gHwtHIjFg4Q8a4LhVjSAnQDAn2ErHllieoPoSlon+Y0xL+LdW0EN2ai/KK1Z47Rt +2Aw2yWL/Axe1o59iVUd4atxo/qpUt1gx86wVRMjIHSb5VxeQslk6394KOUXHenWBOJBEqYYd/uEY +rlIZfjx9qmQSvddZvei9DKibqwZrgOi+cAqFuwRG4sx8eG7MYuaqEZvRd4qdThwxaJvEJNL+22M8 +XP/8P8J48o/04t9S6dSaGiVcx7S/DbHsq0CRlhnMHeoCFYi6OIeHl5/ZRTkbICaYGLOezAVfRbYF +TWBnP0Rm8/eizJAPd3YAsW7UcxbvTt2rKdAamD2aKqoOAqyHAtVkgMZxZtCf+MRs29QpzETTsZIe +3lZaI1QDSegNB2rto1NsM+Lmfvwsl/McBrrm8ANYGBweJFvWlNaR321A6fIwpjYTWdI1vnNYpPCX +qNrprtCeC8gTbm6F6kFWXiiOSiPUHDvJ/BYYvZ4GJNYJrFWfq7u6p8eBqdBIavJU5k7P/ViBGgch +G5A2HKibabSPtXeXCO1SkudzCvSALoqbme/kQ6xuKfmeRaz/IHGRRAUbNEM3JscVu+o7I0NZs6Sr +rnjllPFmBLKUwxnxE5Ju0jQTRj6fCi+Tb/q+Q1KgOByaYQ8X9jPpAovkvbt8sLZVnKpqdtXrx4jG +K6Dgb/aKKANOgcvnTV6008lTo5ZiIRmMdJGMgPGO0jDVG3hTedyx8iiU62hy54t8PykfboVMN3cz +n7K8+Cpr3CooX9w8tIz6p/8g74CiBI9DoHXOjUhhg3d5FyPGNDhbuwdpObKaFUyLK9m4g19fJ3k/ +/nZ8iB0rqS4KTbFLkd1nkl8Az112BVsGAaS6JgZU90tWMhKG2DNPr0hW+hEmP96Wo6axaA7xpC/C +4BNieqU+0AD5k2oNIwzF+rte9LZyWnxWFWdxe5VR8oPsVn2dLbyIM+MUf9yMcszBAtP8JyWTC+te +q2oXmOPQE30iKge9Vhyfh9mU7WLQGrxm+qXIyoC//CSRERNu8pj8MZYcZaiWXPRyrb6vLvjKTo9K +fhfv9z0N683ttwxJf+84zQ/22xlv79fpwS/lXerwUOqxqsBnsBmEwpPG2YxSDDN9mfiUJrO2L0JF +0b2Iix6qh4Q/Oqvl16bmhluS3RgSp2Y5H+M85xutkYjto3OCt6wP2bFfvmOONPmTOwEkj82Kokfh +8rmRQcQzpzOofFBXBJNzYs2drtHL0pCtXzBJbtWmu03PC462L3N7NKncT8uS77wmnAPnkhIQQQjZ +BuVNJgjTG77gb+fvjy6Mx03oGFc4D1MVWCrDN1AS95gPuxMaWooXVvYxHG2FuRI89xSZoPuY4rHj +rUADp3FaPcbh7a4jFPAh63mBDqCa40HuAHL3qu3cAt5/0OKkjZ4VcV8bi4C+C+Qgn5KZ5YpoHtq/ +hgVFz6R97BURWH2U33aHKYlfKfasSwkLdER3Maxx2TNSTLcIVbpKQCL48copfGgnFeaj6j3RDwU+ +JMB2CpwTdfqXNuqcbACxwVHtS2KYXEkwqet7Wzk4KcrRxRLV0MCh7BnzYih7UYQsHmrdjF2GP5rH +KRtuV9rcPqJnBUQXy2FgIw50pnqkYNIcS26urTeTb1BFU5Zkroq9GUHIuJ0cPkGb1yUybeY7UsGG +JqrZGWmVN+dME6W+OLjNJ9J7FBxDuJwwN+aX6e25JI57PrpvfKm7qoDGdDh6Ith4epWUd2g8MK8/ +5Sx8wSHb1dxNpSf1AG1+IUQA0iLl7dBjqHB8KFjfRBevXQ+iBKGU27giFDdBeMIqwRzHNxomniSg +cBqRNri4IMatCE8Pl5ZUi58ITPrx/zur8pHcDiIzVWCCcjRHP3ssHrgYBMj9HX0iAgWmhIVk5n/3 +FDhc7LsTIH7uVFy46KNddZ0aRgjWIZiY35sAjX5alzWy1DFwAt7nUb7VjfeCASHrE6TtXl0wZJPw +bGiaifnRtImO7O0l8OHPx2wumrl1ejXcRDmFH9Xpf5zjs90F3KXn59ib5VACZiZg5Z/O4AN0N8jo +H4viFG3TH/sr68UE6wJGnXj8IykI8i98doAncRrWGT8rfJS60rzX3B/CpNRsBm2TCIBcuvVDhOS0 +Pbfq4jBbxrLpu9ccm3UhgcLfQUUUu6c+anSYrV1/oMsK/tePDmvVSu4I3ykDTCEDDfEaZ+ilgpth +NCZQige3mujKPI6KjY3e/Wt3sQKnLsjRfruA9zEdRkob1Y6tgmkjgobCVO5zU7kM76recTuUUEmQ +2+YnCkcnY4GtH0Fq8zkXFQWYvqVX/AB65nJ9j7kOcdgL8NX6lTOkfPlMNY2k7vUdF07sMD+djIHp +cTC1ofnrAj39vCC1396i4+iq73pv3GTaCq+A9HRP8S98+Wag5SDhi2VXNsjvznNgh4Y32uSLcJXA +wGXb+wbEtMC9mbrFkHnPjO1RO13QzbuaPMW6X53INeZFxziEBA+/8TsM7uzgeOVBRgoWjVXdehtv +XugAxScRP4pcdY5/spjq1kRJVi2x2L9Sv5TEbtzHCAd0u/mSoJwmFtHoJ/7/9Md5irhWblMMjeL2 +Oc55og7OQKbYZAfJ9akcjHHni9GAHgruCCRu0TQMfINx8hSJIrpiXsaiMoiV8XO9Hl4VZf/MPubF +63Ea1sZO3eWBbfs76WRxjRvBYN4cTx4BOiuKCGnTjs0h8BJp2A868swCWJ91lv9DyTYHQlgedtoj +Iq8zUdizy6q2mWTJ6nLUcD2SQors/84H206UhmEGBuefV5NBbHePhQd3aAPyPgOSdvHa683SQjwQ +XGa7WzgYo2ZqLh3Ud1owG11yZS/nQv323pMHdKNeGIPChOmqkExNF9qU+QuXz+WgKAIUQMPSuC6h +ILEA4CeYhxhmC6Jmuh9F4serJaI8fdfdMxyYbF+vgXdV5nK/AX7LdI80sHTWAA2OO3Z7gjJolcx2 +KNP3OjEhb6DylXTci/pm1662Wx/JuEaLCk3vZ7Jh8jEFjvbDNqwZ+T8bQdZ2+luEFcHuGZF81KVO +CBkbLVXC6bW8IQmvGjLRNsK/y8RiBEs9VDtNGORXGBQRWNyPscXLIX+owYgGcwfKGirlchyIw6O2 +6uVkUKFImOAQXQNyeEmj5BGSrfJjT5yvuYT9n3vn/yctZS10R+Ly2fc09JxM4vZ6m6XYfmEdvBAZ +vldxcV/SssLra3dxtOTwRFFzKVwevLFolZIMTUXyG3AGuG/4liRiUOK6kitB+CbTbcglq/+jgFeo +Tfl7x/8ITBQ5RoN5jpYxfTS/00oQEw/QWcUBLwVuL1W9frI/Wz+nCCfjtemOzipY84KMxVcnyo4J +vd7FfuB4P5K7WUeZE5mNMZ8mNLy3wGoWEtqHXRBXYkL1z/v9gjqaxT5ovcnbOm1UkDELNoLB3UlK +5LkQJGrLKzvEXBEA8XsU4EzNEDxIwNGyimkfF8jXSmQiHDXbNdK1yaU59Byg6Qnj4zbcYys3BOaI +X8UjE2Fsu6+12pwXW46CyI5lKr0sJiKCgKwOHt1gFo/uRLdkplyWvqZwFBLLUHXP9m6leq+Sh6jv +5NPN1Dx2sSX11mqIaMIOSESf1fZgiwg/BYgL3D66TBqM8RLcDaUYn3lXGOoGgJZsnzDoxdp09rXH +84OF3asYd7qMRUFGf25wQygw858viEWo4yDnqRkcFPC1mhtc2phiKbuXUx0fyAI5NiMqJJDBjSzF +5Y13bP0zgbxuh98y2cLYzWM7cMj+NOZ0HNZZAQrIyC2ecAnSs0SDYOZtzAlj0InBTE7qtLPnmmMa +VAY8BXbtjGee1i+JSS2oKV3/z59k68bqqgluykXH8uM6Ebct9a9kqh+Oder2+/ZiSSBqdvOwEFPF +zTD2Rw2+upNgLXh1XYaCjwT9OR66jrXOpUT+9T0jOQsbnUw23Z4rNl5AyAa0v2zXATgXfJX+Bcwo +X34nYfSqwt84gx5A3XoJdacfFFEaUskp+GyzcIAShqgadGE+GIDwr0Uy8wj8ZzOIyRPDVaEOB95Z +paRD3jVbcc1HtthchqiZeHm0ZAesbZnRykxDlUKSSFMp26o/4g6WugGuZimTZ7NGoUbqlBfqsBOV +tKzyPnJAZOdRAkuPdobhhfGPRZOAQOleuS+XV6bHavgFNZhXjM9VhNTdV7tatjHuIiX9Un6X4ISE +3mCrxQmb2xCN1zXSyKRDGmrPhm91Ln1EE22CYjavvcVb2aFKs2Qqq1LPzww+zv1V09dWkTNucivx +Qe5CZkIwnaQXCrOOeN5BD5GUCJvtI5ENN7KrGJDG/o/84IwY7VfjwlqCgUTm6LPwGcu+fOV/jdnw +gvi097X+s7OJtEFk27pAMws02RE1t2doyf/xwTNzQ2YPOoLaoTNbKLrqT7tOb2FxYiI/i5jmhjiN +mJDn68mNeeqs6vqR/lKpFI7ogzk778xWq1uR6eQy7zADNOILx0lUWT82gVJ2H6YmraBrM5I+6tMa +D5z8KidSa88NkHKLgNdUiEGxbuc4GP82iuVfobcWH+YHLCIXW1JhLPdCrD8fVPB8atkajbmxF4xh +l7sB8jq2/Br/iLAPUE1YtcDh7x4MVqXLg4UmFp0ofcODDeGlpt1CR8WD6T5DM6Fp5WNgr07dVA/q +f8YpB4F48qfos3zZszv76oQ4xb5xVAHP8VkLjX+CdnnetCM0aqMYj+oqGmWp8YcSGcD6DeGMoEr7 +JQcHW2GOPkQo8r6NYZ99dkfY7xeu0WFPx4p4MXVLzbmSEdNfOfkc2+4Ue8prXH6Mc62LIqKD4U6c +hZ2R3hpHliimRv3YeZ65V+AF1T34cMDrWHSfDlyVQ41R+ZZ817JwBDmEIUbYmM1rAJtK9kY1ULRl +WBKkdNdZGF7Z52+zZrNvFaS88aAfqFQ08Fh1I4vxl/5NDZxNoTL7azREuCxosxfyry0u8erzE9rr +PwLP0Ohpi+g5oQFghHPPKn9b79p/b6mf8S904FBzj0lXZ7WpvLBfqnV+A5gYqwQsGwQErW95+19B +mRpo2q2ITgCkKVjp8H4FEbuK3669UVMY3O41huqPnW/CizshffFUMmUhPLU2Wewh8XI8GpHDf4m4 +Xo6XvsP8vPu50XdAbr2S/9ltAZpz+hmnStb86nT+j0vMAmgVmAmXx66jsyQVwuFUQ6CE8bObV89X +/c+CThFmYuoR+7Y8sFyBzAel9omd89oSYGDtM6fjxX40TOhpX0KrXi0/9oNFOC1IGiuunT+rS1kH +PX1Kf5C/s4A/bMXfkozhG4K5/OXLVedwRJs72xNdpGYu18916Owds0Pi5H7NI6Q5hOqyqnAYyRHg +l5zJbcQmA8P7LBiZnKxBGVBqYApe8r21wbgpRLXAMjx9bdwvCkkNGISpXvXmkZn/i4qDYi0V97WS +bOfMizxR+I3d7+pbtfvscwClolSNmP4RPitrcPtBlsGQNzFt0K8YvxHSHS3TWEhy6JkeiHEg9nF7 +OPUAfw6HA26VtydyqOI+QWD9u/rWwx0vYcsJRoMxAs+WXt5wg8XKzhsg/W8Al2KPmhRbUoNxKRL0 +4Nvy+kHarflM5JGAbMI8g0tWxxdQ5EZE8e2xZ+MTuQipzZaAMehCehuzgUTexpg6xBHKwkv4TWy4 +hmExF1IhaF1RtanUW4dtEOWeKTMBYo8wGZRW7c0AlYUXnIuNYIr8eBigEIibA9phKWMfRsEl3yR5 +ZHpDMn+P7jtPuM2taYOprPqaqB6r2qKognEeuSLbAtoEGP1lZvp9MQVguqcqdqYTSV8fINsd8R+8 +XDetb1jb8TspGMvCiXgba4t8nCqfSG4f/SsdBx7NKF8G/5GsfHUGa4iNe0MbzFCZJx5MBx7vjYoM +aEY/ml62TVRFn6QFg80BaixRujb5fCnHY9tDPKxSeFiDfK/q6Gz3c7i5O2zlSQrzU/7JnpvuPafY +vnC5dpfotQEmPpr53B3YrolUn8bOvzeVyGQfS4hIoY9CScaDQ5dvu71/+NzFIpH89ba8mZUnhrMF +rHbehPyXB4V4IOFeFmhBpZjnz/e/Nh1p1S9a/p1pKh0yVt9STZqX6KaHfYKwI3YTm5U6x3kv+nxM +5/sZj6I6AyeZdyzmbKz0cMxYA56FycScVrdTXpIrm/WPwkLqZ5jS3xRxd0yBGKl2v0r32gbmYtIH +QRXBn5IusXfxY0Tc4wfgkDJx7o9gSrKdOrLXyrEQIxiKWsyNBzyQbG1CMuqjZncbcsUk108v05vX +wThOmx3DPie1uvPtDAyjRcRNp1/cR87N30l7rLYVQmlShfYYz5OPud5j1s/9X2x54EqIwzRw0eoL +OMjCLGU1nDsxoA3vGc8rHupJkFXS/fXXguxy9e+bu9LAwICNG4fazlSYeuNf3vFF9AqHwBBuSPlA +7cELgiGtB6y6t/WIgRviJkGMA660hPt1woV6RzJr/OW/Lcs/5i/zt+rNbObiULKTRtbUFjJSK8pv +RlJ1RRIixMsZRdTOrH2KGaGQCu3Ev4kpYM2d/gJ84C6DNqAheZpBnOD7EjzbWozMZoTdChkr/BXo +qt1eVK11CAn+EYkXromO3qe4N7mF46BaTPueLHHDlwZuztEX/ztvFnL+toXlj7d63G7EFFjKJU46 +tEMkaT3c4bxbqr3B3U4b5xDYxflgHDV17XdQQXxZ/Ap9MIhc/t64zKWLob24JLbqCXbdXIQCP1dc +b/XzO706SEA5ieVyQXOzWcpP1ZKD350PoLK1inc4bQTj6qU+sLz5PrEPRH0t5QL+MyI7aWfyXxXR +gYNp/qclX2S4HwbEUbAtUV4CBPMBZf2yVHCou6JE+hEy45+8FBg0aPYWM0Yft56GpzEj7ubXGJBk +38BPhmhhWFlYS08x/mF1LTlgnvgGMNq0lnPgp2U/VV7w80Q/XaqpOsosuUPk9GMjLibgePFQ//Hg +bzybPbp0qqnOKCSQT0Ur+rU7W8OmND0peiDxnUSMrp0f31kPhUmnyhgN36tR2cHXl0AT9iLT1Bv0 +DGCGdobtNxOUN546XrWsXzAKywHIHCDNW8auVUBGsZU29n4g7R7hPDhTlcGovGxY5oZy3ZucUUt6 +n0pJAIJoLFyzqWWqOlLR8j/J7yhlid4TJykd/i25jvIC8oj4u49/AAy57RlGX0hfKjkVzswsDG71 +9Pw8qvh3rMH/eQW5Eq3cV57Wpi1oBUZXpwVWd8pkhw4tNQ05aaP6S8P69a+Mc2hRveko7gP0JYmJ +hZvvo608dygYxS68OGhesyEa5Proh4d0IWgbPwcTiRvQQail72+ivRl0clVVzsl6FPRREFXZYgur +DJfOJYFbg3AMLupfb4ZJZ7mVshKWcRcPJfoPE9bP13OG4AGh7fezQfliNJDGJUJr9Ivmf541rSaI +GVlsE/P73oZEZjeMnqTyKz7NQy2ATIe6A98Q0sUd7oy3+BHW7ohHqzoPU/FJSSxI69OFig3gBtc1 +ipORWk8mXGLgY3b1r+FX5LF0r8uJMtxj/0n3mtZ3IIDcZudldNfwdwseracSYBb4sDhBs5QP8eXi +TxdHzH27e0yaLxL9Gru+TlkrdsycD9Ydr22Aw3zR1Ms0CnPOsgtVdt4gFI77Pm6FlHgURsr75Iv9 +8NpSomwB8DK77Zj9bzh/khXXL5b2uI1K/2rCJpsyYvSST0Hku02pdRiS60kWt53hcWsqkzm+ATSH +ktMGAdAApbyfDxXT3Pt3mjpzsFHJPzeYjoPwwM1a9MU5Rf37gobrziwJm3smqyTWh5L4THs1Ujk6 +6kPIXHDp/S6UeuxA6oO+DLua0ChnfljkzBxQReJpobzXFP11q6Ia3SbvULQ96PuOfU3eZAl+i68+ +QLH+PHz8rCgqxIflzoG6ND1EN0mwANfRrHCjFK0n3JiWFPySvlHcbEQDAy71Gtz9sFMQFDBHtJW+ +237n5eds1bmlzQwpPKW7SSG/dhdRvFDWhmtmZWK/HN1m4ty1eB68hAFY6PINtWtrxU68ovnPrsWw +jF1pxxbSme92iHUaMlJJNnB5HPc3lD7cfC66VZ1BkM3YJK1Rw/yJOBVnfGBqMDvwUanvSRLX3mvi +e5VT2D0fykP4GK1NHoCk3grijcurY1Ad/Deruyjj4AlGZji6oeAtNHBIkWfNYcn3aisBEr6/V/il +//iSSndoQaBXO6bpX6OWSzI8RiJke0BUvIZmJk8SM3NxwczyVYbHSMtvJN2yonJ4dvQ1K2QDTKn4 +lTw0z7bgoA79+EBLb8bptKp6U2rb8PQ+1BFNs3LcCCM1OdW3adYz1JQxuKnMT8aotVCi7tGrusC0 +t/PBjRswYIjHMMneSoSwiksFeJaO7eZCBhZpE460jefBc5/zwPUp7Bo0mQdZnap8nYuj8OWD/5ix +kMUFnrwSCFzSghRFW+bgr5pCL18jl5tgGcjfMZQXSlnceoFAnNk7l6C6ummO8OqagNFLSm/8EaXF +BP1KKtmybLi+7djHvk5nsEY8KAQBcY2aEAybD+66rQ2dEKpdssYKCijceD2C1EYj9gZabBaCbjp5 +N9UnRmqvJ2GmflZMYU6KJAK5gDTDv28fstelvc+yXHvGH2lpPWS4egxiauuPb6TJ9eTBFrrWxT8l +ebJyLvxSPMX5I0XdNrnaCTH+4hsaxpjfeKvyAxbxBFVVERkRk7OMEE1+vy+GRIwA2FxzDXu0JmZh +mUyTF05Bn0qu65Z63T/Oq3P/WiF56Zl4+Em3aODCRexbSA2b4hrjoOu0FJ3lgGWR1hCHuZXsblc2 +zAxWX+EljDQ1suskhQ3H+g9bP9E9teTHxQhlRZDYPS97FDJBnvdMggX0wJACi35KGOXbJxkCUXk6 +/cJ7w4v28+3aXVY5/SWTcWuHbmtxWBnWidSCU4uvMd1Vle2JolwZHwISinFHm/gPtSKlHKGyownt +lzKhau4g4Eu4qJW0Wkue+sY4A7YuPcBspjIZGdiw4COPgag0sGheVhhyDrjtoaoQYzujCKrbDwwF +gf4aN3VFjbMeYqOHtfEBtWhX97aZDLvBb/LPNmkNXvakWBjezxmTuzrbYN1xxaJSC7BGGsim6hf1 +z10v82vPUYtw0eCV/aHQfo+WMf8RxmQNLD4TUV/DdxKs1zAu22kodtDPzw48ZRvo/PnnAuY+peJj +7smCl9WtSHEEqdeV6fjvc2uhCSie4ypclDzWLByDaKI+1v6RtVr1qO9OWJeCtmriADiLFZWHpGyw +1BvAZk+dHpPMtAxqu4BqVJopnawpIN8zaEot8nIJMigYPJFwZppT/ppXShI4ZjD1EKA3mHCXSGlB +759rBMPaE1c/dp16LAxkJe3/9iudXBM3z0JQkw5697besRC/RH+ZEPIcszMOSRFJXWllptCw+caD +hTDxz/PaVvqhjmNmXIInv/305STKspZt7E68MLotxi2/UDufRM5pXkvAWh0yGHlYNMsOYMzyy082 +c3jQkVTt1UqmZ027q+exZffHOLGLxCldIECV72iPZyXOvHtVdfx7q0B55azMaXW4JHnSmWGbm4QB +IgEHjQembUbfCE1+TWROMlu9vpkNaW3vMMwulo2kA11uVUDL6ooYToOCT55uKq+OPfwqheYGzh3B +a1LqfoeCr/41zL3WOLVa/t357Z/bukoHu4rjbYV6B0E8xbf4bsKhFQtd2pz9c+yT5X3sATE4XFgm +QMtPznz43+8OSUTW2c8cmsLo2Yzm2Ovvpek5/vTEWCZqmKw7CuU8lVc0gE6EovCMHt1L9CDXuBqc +uNfaUv7sXBJcn96cSMvQIJMqU37YKoDVHddOCEw3u/0+HtqWiVzlQgHd8QBW9ONPYUAGE6b6Fli+ +3RSrdrM4Xqk4MJrg6AYR43Ef3iv0jdfPdj5t6TFhE9A19PVnGbzovLhY9KdKRKo/WfQkFmq5VNU2 +eTPrBm5Pu7aW5ldt5nGs2xL0M7fkQoI/6GS9zszZCtEoEDzpXp9vT4Jgc57ErW3cG3GebMefMREb +tDJYL9PFCL8y/+exE5GCZw/bFGdOEDVuNwDrQxmHZbFNqJGViPZijcxGeTHlvhkfvgfvwi6OnGKs +47m24YsrS+gEsLsN80GgK3IW5PeGdmL9tsm4H63K2eOJGJedwkaFP7mKhzeucx5ltx7QoeWwV0kf +MBdeFyR2YjKRn4Mw8JMBLm8RzeFPmfK5NLbGyjKqeGcPO1l8yby1tP/Kg+ApMCWfSylfPrnaiPHZ +67SkpXd49b2afsmIrNaKcmBLZT0Atj9n8S/yoxBSZ0JnW3EJ+VI9jw5J6vUv6K40d80h9nfzxIKe +TVCGxrnid4hzOWR4+6UmqjAYoByxnoLQ6BVOJT+E7pibSojB0lCEwdfcBdOIvMulvgh75MXYGYpo +0K3VthaR5xohFqM6KAtkOBNvwRo/WtP74ZGRcfEyDYbboo4uOjFoyZ18+gmrZIPuLNu4bKTgHUO3 +CrCX0pnRT786yEMBtaSIwMnqVrr4LNnWDxzeC0m6q+PKo1n8HJqAacws8HifiQryUqkw1nQ2yPJP +3o7tkD/+E+Vb2olpzfEmGtu1o+9+QUD/9i50gp5JVUUl1YME8B21YazZwN6E+vPEOa/atcIlVCqp +OC+D7b9aKs6Nu+UA7hi4DqQ65YozE3fHTMH+61dOfNkabwdo7Htu/wglNWrmvHsqxQhLKtuxttHM +IsAFZFb97ydBFvya0nMfzy00frUun5F8nbRIYPCfz/CJtpjtPMoDwaN3EQBqJse77Zgm5Nrmsxhg +m64563OI8xtJiBQGCqivzxsnwPOw0dQlNor/n2s93iw7qnhr2DHyFzH63OOFvxF1Xrhn9/kFmCKn +8NHoxFHE3Dk8cFAW7Qi3k7Qm8nn84aKOShPbs7Rt1iw/3Ep2TIZjLj6c6l3025drOmWs0iSjqRd9 +2svgzviN5SQitv321I+ikJvqRRLMWguIweE5Z0Fp+9ixAFzf+HHXVSG1+vqV3us937/VnTyBEa4W +wsKmy5Yg6s3yXHoOP6jQKUzMHhN/MdTe4EwtWKCEqEsLm9xptR5oKl9IpTRmKWTB2VzGkde16ZN5 +7OUAXSYvX8PGj6BULvAcc+BMDj2rxGOISN8HONa+15pSfavUHhhizMg7tS8LREdHfIhF0b4Jjx5S +S+4OwIpwxX0kHt49+t65iJ0MfqNtK3+KMBfUrfmCaZZYl+UpX1M9nwHuiPQGUpWuhXM9i1vDE6M4 +EQT85Elo6T+dYDQdhM3RjRCcFzTfCewNWlGxEbYyN7hP1Kqc4ih9MQYFVusYC1ZfedIbl8lnGK0P +UbyZp3zzvYuiitwUrsqSVNOaAcH/kY8txFY0hrrmrqCGVSYdSmWbXLc2NJCYr6bTMg5f4mWa1FA1 +y7gb/ruSBtcTTuQbz4cpqIY5ocGg2GEg1inSWiOQavx37b/+YqqdEHTOQ7cVsJkgNSq7EVLMqVJP +AIWbBQ729IHMe+xB+07iambZ+PJK+IDy928+ioXW5r/GNDpf1BOy6Uh4fAIFkYkUpCrSg83JTFYJ +PHPB3ZmH9Aj3UiPXOzFewfy/I7kdxmrR+60rTcXYh8gvK+vr8sS9WIztLSxuc7QtkRKc0d5XOmEw +3B3ste5vn0UuggZE9ZjwpV7a16xz0CN7wj8Ctobwwua2ppZQOaBZMWwdDfsdGVr8MvD4cGZHVagV +9jonvEA5rzd0WZ8WYnCUhUjdAHzUtUy8SydhxjIgTTm7IcaCGNj7uKzwV9mJiVpY9BxLIzV1o89d +8AWfMsKLxuYIQotvfUJ9tsxdu2Da+qDB/fvototFN9HWcUXCe4Is5K/kSnwmKHstEQFsCJtO3LgI +nlJKQBusPRwGH5NkjaWXvbfRBOWSQDU+6p8XEtlChYR/6JYU8wtiMgW8SILu/LfsYHHqWX299jQW +lS2pB1G6V7B+F4YpeD0laLENg7GLNeh2EcvwaCgNgYjvj3QWnTZepLbw5eTI53+s9Zc9dWhftRjT +VynQKFHG/C+ViGCeIeEZdYbZjMUv8fac+ZHCrisqcj6qbM6qWFdo9xGzX4rKhdcwIsqtxPuif+nK +JzIb4TUjyob0N6BIJGUgSGCAsKiZ5DpYy71qp0L+dXFRLrzeTxWPskeJl6iECbSbVlXk39ONi3j+ +T2OdtKqvawaPxdr9WnwBZkEgpNiKukR0Uw/fa5YRrTi7JFrv8ZkSGKbip9xkBXShi+3750JxsWmK +R6AHl1PLeIY/2oVzJZzNxEYBWkRwYVhE6u+W2CsNaJT9i7hnZ5I66iHIlmLKjAmcUe8TleYuiUea +8BLMHxkgcV1joNRUVD9ArMw6BnD57TjEcLV4qqQgldOZOP0yv5LAZd7/oM0IQsXhViEeY/n6XW39 +W3NQfZtjJi49Syzr9gCOW8BqDd7WR/L2eCN+/M89uehcwesk3CUSyaF+euzzt7ku/xMmykPjspBY +J7/aLtbsfCOIfWF1sdE1KFPo0ajp68/Be0BqHGn1nfo1SWt8im8Aeg4wRn5kYdod6TlK1lWpwdGe +p68FpvXkd2KLA5lVWnWr4HeNVgOlCwFoVGoYGdvjvrZR+V/ieSvq58+G3XLem4RW+P1DwUmydV5R +5JbtydJJyM1EH4aBU+KXXYFSDC4NubBN6O4oWJHrTp8OoKRYKw1xIJePy+O1aVfFHqjXum46GXGU +jH99HVHdz/SfYoIsTZiZx96sWKdFLphc8wgBC1Gd2Mw2fOqMdABd82rRKgCdaAAlUlayqVF3/2f5 +D+kzP0p49D1JjozBOqV/HV06YFe+joYZj8qnfqUnvLT9hneE+KdRQjM4bohqWpxuLpj5aVVlKa7N +bBvwe6Xr6u6SajXVz0I8GI1LxGY5pL3NsWlQANMo1um8rag5GZcARfIWNddphFO/pOewiJNXvIIB +2HthiYiIOrp6usCGPeIr1Ea48HfqUg5d2yzXUFib+QuzzXRl2OLr+DcOxK4B5qpRHDWT7ZtU2O8j +tXfGCWTxiQexTWra07fu0ZYBQlSKEgojHQU5JtIOaj8RCZPz0SfeclBEH0dKr+jKyEjETZyPYtEz +hIamc7KkL2GWxNF3IvuA9NeFZ2Qvl45hC6R7iKQg2qEbx8Gk+IgrGpvt0EtyeOSyN5JxYrB19yoT +t9+/UHIDSyaeBVbt6KnF2f1JwA5kqeuDOXhtOWVJs8i5VFhdpBTdGwiIZi8aZZH2SF/gj3eIOzeZ +isMq8BwaLjt/7JllpXtooOhUl0Ay+8uPUag0VbEQKFv/ulwaQ9wDSnj3DHVrPrjUCYjP7Hmzz2T3 +BR7HOJvLkl1gY/DWbkv1lY2K+/Yt7+ikWuqN1TyLGFwP0f55UmEKJ1tgR8bLJWnRT1wJ8hEGFiO/ +Hc5PLu+i297fqavM28GzcWeqFFRAtgvu2FPE6xkzCIP6VavYTu7PQqYaqHIYzwVQre11JOymM5zv +lP/sEQhXqDiYL8dwxyWvNOVK+uYB0BZL7Nnvbft/D80oGa8FH/Th4gmHT+Bv8uGfFD4aMEYeQUFy +ZojTHg7LSWcK3XS30qST5LbGZ6NGQvClk0byy6aTgInwg7ox773mssr4dSIFZuwtKmNfIG7R5W5f +yJbhsump63oHJ7s5qOM3ZyaBmVJgfbZc/Tv6wqAXWl61muZCtI+I9c2oBcq6CY6yPaWZtu4wH2CX +Z+5oAIqbfDVz7iZQTNXka8hisLkDd36VyCoFz9IVAxkhGKvpfzPt9RbhGkVF7R0/YHDnK5YwwpvG +IsGXYxXEX23GpFyW+A0ZWtDZZRwSbPO2Q6gREkYUqPQKLGJ5XAgOJt3pZss04qjlGum5g4+T2Lb/ +sDcGDn5H56Rcx2p14kFlGM+MZ8M5aWsJXc6g/7alvlX7AC3lOKdBMiAwmEhGV1pf6l3ZFEG45h1u +gnPIiKk+GaEGOZ12/NLTQDLmKxPDzAemkzPfnkPhmurmFNu9QA1QvPmanli2WZ/9wst2k5CFyEbH +sXcjTdj8IWaySDv6J9LsJFajwC7bz2hk45rBEhIrU/LrD1RQVvXj2FS3xsDnJ1Hv6eQibsiXan9c +WX4HqzNBeSyCLTKVy7P3NRZ6wUwc9Px6QeYO+kgkflM1Sk16+pP50YXgxeWeEbzjBkVe3ajN/6M1 +LD6XzRUHrcH1pGwDhxFYRmP9KSYgFIOYWZB9S5a3hC6xR7D/xkw+bcAqleW7GFWwdU/7lQJd2rn6 +ZcNHSY9vaFSyV69poBaEG4YcGJ+gPS01GG8ufRablLs61c1JTiHI2AGno7wsEyYM1cUtV7oJZB2F +xdEMhoaeYgaKfU0AARLWklOOpKJVPDkBAs5wMjYE9lWn08ZPF9Jlm079fZ0X1WuP8m6HtF7lk6nh +SOOnmH4UYDR9/aFY/noCQWja/O+CV2tpjbbzAEMUjdckRiY86k8vanWw+MGTl6qr5Ywz156avJ/S +9WUhT+q8UhxH3UwrVZg90Zhk6EIf2KGQVWJxC2jX+5vT3dnOwvfZPpQv45NuUjPZx3xzQxMU9BA2 +RA95sy6AssScCTMjv3BQIhW72DP/gfJqZHhl4KPdBTTdALXXihgJr2ytUnP3toVTvlI3WQAhDbet +II4K1pW5Odj0Bpc+7Uz4HPZqL0OFpe2YDOkoMRlgBbzuWNBnlYsqlrHOD71WuovnhQhIvP+0igt+ +EUFLcntHivQJEZ1/QZh/27zBBbv7Ep29h4cEQbc9x9OOi6QYcY3PCWvrxvsbvHisE6nW6uqbs55z +GM59hvRpegETNCxMiBY8QHLDCU1+T0ufioK/7HinuArR8Ig4iS3oESeQY3qJDngn0PqGx4tIqk4Q +GELPGT0puiGXKgs/+LkjnXMx/FCOujdbHupRWpCoggiQ6w+r+saxTe+hRJJicwBPZMy7rhWmnmcx +8pYirnG9Ush5Cb0AhmbTNptzYKw3a25kLKBKWkvD4Qm2Eiz1ey0Y9cv6nX2oEtpGMR0rUERvEOVI +s5UatxQ7sRueBJsGSlzq7+ZMs0RzO2ZGr8f2Ci2qzs6jbxKrgTII8I5QSgRQEq2yxqG+aYJoqgLp +Zfh2sL/KDlXHM+dsUcsF8ZgGTN1QpNNlsdnhQcffy11XLVhMYJCxxcxsRH5pOmKyNDLGipzrzXz3 +LB7CaUMClpNHCoIJRXUj9q0ggqyADeLKI/ZgWqW1MIhP5Y4jMHgRlW0XMnNpeptBUfFSiHmXHn5s +HSWicSwTSl9D9L7FaWHy5/OIsSivmK63lQqdgZn22bLqhGJqJQ0fwBTTiN8RYPhYZGPEfvZFXPjH +QadSw9dQsJfdOn7u5pk+3FZTQh2YyMLLwxeIeDhFEneYSfwrvT2JtMr7gqznaZzUUV26Xj+ZFudX +jEAWWpcTovjnbL4N1XjCuMXaBk49SNAcAtI7lCTY2YmwiF6SuekBXexc7sWXnyNlURDbuCMRATiD +6TkO8+zDl18IgyovxcVKkILkC1V5xLuQHA9+RAKAEHSmLWTBo48NYnGu3+NLMKhwuiHrelNUJKzf +1wXaTqx3xGJaPJ3VxoP51MZYl7NiDR/UjCv27suDc/VeglGWzutih5I3YsG27ydaXJucZAHXKMby +e7bsVehSiqWjoNLkUhEhP/mTQINhCzhNMUAK9Jq3/p8s7ozuYd8qiCvwrxs1xK+/YXb+/ani6mVb +Ni3a/BquCfVhatS5D6jRNCP7NMbRTXxVwataCmFD1Htl1bS5IIsLMYNE9uVb4JI8DGRbpnIDtVrP +vA5V4QrGXg5mcBPq8B2h8FanSSxF094FxCCJJSX3ZW1VIR3r6l9g0XzM7eKUCSuUlmD9jPe+O5P7 +KGaFXvVqj3X3IEMb6XjeuQnJJcqlWqvwf1WCTwrOiu1Cv36Re6AreR2l7UtcejAfrYASGtfPSOaG +Q/XNhhGAw/YkFu0wLdort96q8okIW4SRL4w7qbNWXM4WAdihvk+U/TEAZ2HMoLeyZLL/hj6CaLN1 +PNSesFTGmt+qosSCpgA0O9AitN69aFdyCfDBfNGJZQPv5ap6+dOtuOAdmoxvvl/KzLRCQUjEGiCP +vgb5CPUv+d0dXlwfBRGsi0frhBL7/HhCLHl3Qd30g30OpBGYFMdY1Vuq9j77GNmnBwLs5VooBo+e +cRUaVWc93+bT6sr6e/GFcABOFLwgiIWONwdlQJDl3BO2AHiZICJ26eW7oArGp5M5t3AwIMa8hN49 +bAy6vUnAlIYU3sLU+lhCJytit2J74EArmkni2GDi/sHeT1V1hJ604mstonuXRBTKZwX+Ve2hwU/l ++la8c2KEmTAiI2uP9EKYQi0XDF0w7HnR8OAFI81TDxOjBkh/aem32oUlF2nPkvLzP0NqjSsM3iYJ +3RZGFjcMjSZ7h0k7ksUibiSMhwqtUckBUpUSHm1LV601IyryK4MGzBd05u28j4aZ/1VMFFRG8nKW +F30KSgYve+lRh6qWneLn6MiLdtkI1/SXd7FemNBZ/V8XTo1DIWBZXWQA0s2O74jDsPYMVA4isD7G +eT4mQroKczAN/2jEX6pGyncFs+vkfsqSzJWaMtfWYckEqNdRK2XB9N+7/2HCejeQNcytoXGZRPXp +wrVKIiiK7lPrbmie5Hm/1+TkxcHGNE2/ZYmZ4K3mwABy3/46SqRAzCGWiARpf2nvEDjimLnkbdRO +WUkDPBRSSe0/45rc9pZGlKFsYMYmyeUO5bMti1QmTEP54W8zNnjpl4lNSOnRbK8MR9VsrPM/pHdX +VMYO7n64ktZcYf7VhgObbJIFpYEXOJxyLcw0E+1GEyh6e/mbhSbgypxxMcPJmhXF/nKZPGQ2suMf +l4JsYCVsf1nFT5mDQx/ubaCA8/coa+YaQAVKGPNqi6xnpNvM5h7iyzDk+5BLLlMCQ77N64ZpaP4N +SjrFYgjF4ekErIvrTEkKxRFC/ZBcMedEcpIUdDyyD9vIVchcjFSAPtOqASjdGyLAGErESUZnd42p ++AHSiVcjk5i4zY73JvNWl4LK59G+AaL+Dwd6louUoPjoMtir4dYNtoFFoYADJ7OZXyJD8tVkk5VV +1cd1CLjy7iHuLCt09mwnkgNycAdlUe9FE0gJCGQHi8HciwvwFYTALd2z91x9Zp2QKoe6YSP4CJGD +DVgS0yU+K4clSHTWc11lzIcWgJScP1Q3//Ff12tWhKpxr9K6nryfHcR0MSDpQxQDUrUS5gz2IlZJ +lmlGWEl1QoL71i0tBDragPRfT2qJQ3OPbf1QwfPJNp4+nHNBwxn6rAhoSORosjP0ARSaA9mtDMJv +XuFHNGQqll3VIML27cVSy8VmkG8ZpB+fUyrBO34vvJf7ZqtfQNmTUMOrTbY/Q0m9L9dB1PmE7qHr +RUB2HvZ6IK3cU8Imyehstm5y1mmbcz5Ul0VaW1ZUzjZatYmkWirHAddoTJtkcBiK0DVo6hoP6SOt +71QDxGS/Kh5qbpD9bn87x+lk9XakWpK2t1Rb/sc82TXtl56KFo9OSpNTxrQ19SzvqOQ99hI7nD8S +2NJGSKe0cXUrSF2+hxrStO+Kwx9k9sP+XZAmu53inkSM4hvMzyRA0JKpfUD38zxkpuXnAVJhyyZv +WSRJZs4Xitt98B2a0E4CKzws2fAUlN9TbvVu/wJfpWiJftJ5V+3xD/LuBSjHMG1Uf6sFf9lOjq2N +zy4zebJFB+GejG/Q5net+upuWBN15h4ps+WuMiH384KTZxCMhOXUNG+zvAoSplfBnYsyTRYj7w1W +w49uq9P56Q/7M1DLQ13wrU8xvcGd8dlqSmEz7I57VABt/raQ5S4r2QaM+EWqsKnXYQRG54EBob3L +ruCr6HviQvtOzHS3QZ0fJ+rzPFZlx35+WLD6B5Yk1o8+4+/5BEnzmy4ePXvdJ+SjBC7LLGCobPST +i+du2bODhNqUCfI+v3/iG9Sk/AMFEFZyFc73l9j0PLWXGCZICJlXKBrYxNmCCinJoW5bCRje/0+v +f3LWq5wU3Q7MBMud53G0TAS6tJJRqLf8SbDq4WGMTUrvyzftzoZmPYs+/gY3kXnKTK90WF9yRFIF +206Eh3jUOXworP6IIq6RKk6j5Sk3D00EBZRJ4zu4e/qq0Zwes/G7l/wCAu+vZGYxXPZinzgP4VDU +glmGRgYwmcxyr2myCFTA2lDEqCdVMMOXatlVgjw7ySL7Mniy4gK05UOYh8xglF/HQxTCb0OOnpwN +A9ATooVkHs7jXyhKqeXjuhJ4UFU4+ZCgooDJnZ90WP9zREXVNeesMgrKnlnw9HfT/o7MOSaUd2Z/ +2UfsRNhUYCOl/zFMz/iZKfvp5T53Q/EOaOfOPDHNQBNHYj4zFO+y6NQ93PKYEhAD62OodndTzCEy +Ef/bCjBcFXlnpI+RzknElGwyok8fmZEltYf0I+TKHVC7bMj5Sc8VvZtvxjpwc7j1KrTvY4waMT9E +V6HoVVp+veNH5SaWGBuiZJH7AbvgO0y3tUr3p5PZLppVu2OLx1UzIztSC8XXaOolWRT3QTxb45t5 +/e6E4ZEKMDl1Ll9tq+FWLU4dwEXJKMUxSv+9a2ITxAX6j0h9tSpxm1TuVmjIzK0tmMDJ6+k8KqAb +USvNb3D2W2FTyU6CzwNgg2n8l6WR110envkGOFcn6gCZ2K1jNT6WIo0nQyaFLrv8S0koEHs0TajQ +GAjjf5UUWKNezRTrMR6vweGwrkaFoHmIhKtbbqbc6eQdBBbAmC9xtcPa0WWQKSjtTZ18AuwkHHaF +rXBUvQzmcMWEazJHBROtNA0V/sb2Ir/NwiK4JXXLxqN9byoTCPU2bQTUhf0jGBCf3cjL5482cQl4 +ZUZp94AaP9EKTXXgQBSajYbCKGtsMmjvnzAmOZV0tdcKXqdZOcfDCSGw8kNOwt20ZA55hLVGN3N9 +x7qP+sdnUw4YBcEUo9bcLv+QelQcbvru73PbhlCGnhxhYAb9BBRXqFXx8oClnKUCDnnlixGT2XWd +R1qYpS7cPI3+uBi5kuzIcKswxQppH8WngnQw71Q3XC6QF2LwYvqWNADU0w1tA7jbPDPN1T+zWmHD +ue4RIZGZmy5tKMwOikRbGdn2msksu0Y4Avg1KOxJQuWqocd1Uqdd/lyUCN6VrXa5V+SWQkLtny5a +GN+PuasZK9bKFfCDPxD1GHWa2KQ9OxYrfmZsV0t8YEmrqyfa9iJQtj+jYtwTMdz2u2/EeYNunXIT +qQqWAoFN5Krn/jFdtumDOLCd/K+n/u/d00Jo0px2UPJjWqr3GoO81PMMNP/1TEWhWVKoSdpZNOG2 +4Q+CZPjMfHSYqoYPg0ipKDxG7LjuydmG8REj2+slpKs8QdrXaH6DaEFwCvl7MNur0Y3iyERKtVjI +5n0JrWEkTWqeeQn6cjlEodSjfGJOGUSuENeqfnZaAVeysq6WTcB1grLdY8G9wl4/iIwQU0layEIP +ykbuDobySYZ29BUSOn6Xu1dnW9IQiTSdCm54Cj2nRMu5JPVMv3mm+6xNrL178qn1N01kzHm371P/ +hLmH2ouH3BbAhZXFC3tZ6L7O5saQaqczjApUv9zK9QGrpOjerO1ucSsnso0w5e5CmXI3l/mAfMF+ +29VbKG7E4wPWOUIa4KuTLxs2VCqSLzZ/GspMCNPpXwmKQLlG4Qq8+j/zCa9TLZmRNJLlik2EIX8h +xsGhKaXYzl+U5uCz8Rg30ZYtxykQQwK2QF4pvmugHGNR+NG+3OnasZRn8IjEcRshClWI0ElScJx1 +YG2p6m51LNaVuQ6aL28Kj6KhPRhjwmXL4jO92lPPUZGz30PAISLwbMQhduukJSs9gjwYKskEMOzi +waXMl7PL/2jlz2yALW+47xSoLZJnjPPGp/RoYAYhbGVGj3NeLetOXsdQ97aR2dUweDiCr8xQxFwX +VoLxWifyZQWP2Pcj9TfJYLlBmCc0/sx6dKojWpf7+1/S/ENIX1DYvIXbLD9Yl4p1/Ge3IN9L6SVS +PVgomEqEmg3uA6mqwIfA8mocIjX05uJSadJZkUF02Z/awbaZM+iY9/nFObqNz0x1tUSGElct+l0b +Jq60xe7RsgCOoziZNNbVSbuV5pzLBU8zN0pfVTHstNyW2IaQ18MLdag13nteJthZM2/vPPj6vso5 +jMDqvhw7QCjcVJRaE68KYDv1jr5LhNXlndZyMhHCnsh+pDLJAVbCiV2Vne8mwUSIi7rn2u1GVOck +zVjEjr18bBYuy1J06BUG6d08oRW5Mv9yHxstpFVMmhWdRG9L/54ds2K12Mrq9gWNifc3rToCglki +7Z8MObi2icXfLjeftHoq7I9D84U6POGkbmgEmzpMuC6E142FgkfM85iRuOP6LsmHBMC3d3tg9Vyt +7S55bl/TboPvz1lKKV/LiJAquqQN+fEvvPElt1PVNkKvVIvOYPQ85CjIMFgv/64L4q4mz5NknlEP +OO9qj9lMVoWe6eSfMNIFmzPQ5mym38WPL7nEIyHb+78C5XgmxgS+PkJB/xWHT6pV2hRVMfAg99ke +AbtO6QpzXNUcm162BrIUYIndr7EquxANJPm+qHrqh3OHiMsWvGFZT2VL6uKaNJ2dBwE+l0f8r08B +QOjMsaw5zD4pneLyXHqWeBFEVyu8J7BiwZfVqnOYRY7Kbn+s+Jz2GOSRKzJ4lt/2mUIwx4Y+9gJG +XBb5KbOdrSYGucU1GUqOosSDvOBQbX37LMY9vTNb3C/2vUULpFLhew9t9SlfLHomP3Riio/4Ojhc +JC6/amhp4zh1RamOjK8Fg1j5ec34KNiUtOYij33B542fL41NMSqMhW3p6BYwVpmlHEXNLfe9ZbBb +efSBqJV7WxZ2rWkfNOj9/XFvInqIjG7+l9OHLvaZe8FxQ92PZpSebCNGtXQLW3iBbbcN/JdP6nDr +roJ0d6IG5BLE+rsWIpM4FJSRGuJPC6Vc/aeUcYPHBaA/EN5xaE4weJgLKseMP5u5B6kMa7DgHiHb +hAPOTB2PeFpMtqccK7jxE0WJuupyjoXSaiSoWx8tAoOi2HVbEBJ0hO1eGgo5A0+CPBc+K1c51DCl +Q0sUp1q/UzYefYZv5lHnLon2/ktZtjwJEHkRL5K1G3zFgcMfbN8bw2oxCzED70ruO36zO313gP+8 +k9Z9h3u0eJgdlqRcIzxP/vhKSpRRb98g9SVYqbHQGB2M5mK2wchOMJpbKve+X7p1BrPw5kDUlPv9 +ByAUhEtRpacYXqsuJcDZ8+LwVO8MScOi+m1IE4l9jcaEHaDb3v78d0zbBpTiqCIo6BbsthySVDJ5 +enrxyjrNRD/I/AtcgpEN07mlpCSsd19ECfwwJzpvegso6WLMKt6p2wB/VTliSFHjfFx3TbplVx3t +xKzJuZE6auXeYNQMAX0N71PGmXi/+RwIQSx6l00ajChzRZ90r0Sjl6JEh2O9cCLnl3cwVzkJmhZr +MdLyMYJQRL0q+dVT64moxFmZnfBhtZBvdkgMPJJ/68IPlSAgzvhjyb4OOt+uE5nvCxZEDQsjCf0o +b7H2tkQo8SEstLnymW27J2vkxQpoGsvweN7CquHY5i9KHOMmce/qgGqcbqczx1/dzHeCkEyhdb83 +PvUBF5CABsJBsmVLGcJ3YaCuvywCmZicRFG/bg14N5oj0Ss1XF73wZU3+6LkGHBMqgH39X9Aki1K +GmHXtuN1tUJ0gWprKSLintT6q8P66se9xKAMXd8f9DY35r9+fhsOzzLS8g74j/kyyaVsZVMKXnwS +fqJs1FrGrqI1AzVafmUR+2YOFUthPWKiF/J7qZYap3DKhS38WUwrz6Qh9/GimCJAgIGnb8CRGUZq +GaxFJqCwluw0kdyDe9vWBZ5GLaYf+2u/l2KKHO5w4lM2uN89t3pxwutPP04bfphixzrf+otk4ujN +Alx2Ss36Vn7VJqwEZEU55Iv44n7Zm7NWYe+AH3S3fHEgEoTw+7CUDZtk/JacmeW+XhpZVe/Iwl2v +agT7Nnw2ZDVEoSP4JVwbzLLeVWwz/Wx983LWNn+D3tVZXz3mFYjgcnOp+nno6tM1pHzM7/czK+XP +tzL7HwcCft+wT9/jbPYpd8ZcNeqoJqcvGyWtvTB4cHYaiUH8Xlxe8YEZvrK3mA9BN5zlWuGyQn97 +qBGhZfkOTh5XGAd4EhsbeXOG8kfX4LLNidnK2GPvD2PjL/n2CvKV8BByh9HbG6YvjPHmpYvD8ejI +GBV+/PlCpJ12LtV8CULakI6nwhEyN2hXJEWPhMg+aUZSMbXrIxrG+ToO3HSS3pJasPpnUUsRUGP9 +vAzIMkYismC8HinnBCdXVmpH5bhkRtmWSv4e6KiKZswXyj/1Xj8RCz+3ZAh9U88V0OOYefmQGMiV +VGouXDP3GTSqCVl8scbDZpwEpyXtM/qb/YcBM7opIKAqh7YXVvpqbdLlT19xGnwYpMnPlwV99ctK +6RqBFuLxtwlBtp4OPfuJrQrj4VMsBC8mA66G5P7mfhxdpbmXcDAgRRXXZ8ZXaUBld1NV3prQ9oV7 +CMfKHM3CRGUGoRaJjlxa+TLA/S2UFgosDyHGV2MIY0maJoPyN+oJWGTpxQ0IuJouIQDi14bRY8M8 +XRmTad8QJ0xzV8CSNA3rFecteapbbwgwpZfcWE4M1b1DnH9JmLaRMNJ3csx3qDDFQWQQeyLOWg5h +MHuCoHpt+70q8iKOrJ3LTbxqLHWxflSG4mBjcTm/zcpLEXWq0+R/K8wPPW1ScIhWrOEPEdYh6DoU +QyY5Mu8RNKB6jFg33GS+N0TYnaq1+wnIWqEDAFIQz3dKdVCczgI0Xn5vvs5MEUV8vRv3FpDVdMc9 +hz1f8gE38L3Yj7OXCPE1/yW1cWBAOgSZBObaw7SjG1atBb0qFr/wZUV/sIB7sAAU8A28+bX7XuYG +MLA584b4Oe1FaYQyIoZMxxoWB/gPwm7pFFhsnZdKGHRCoyxmOC1J0lKdCkltWCZbH8CTnC/CA5NK +QO1mC5vTNZ0IZCEEJFwWJrl9qoYkfvhq4Sq2QdlsGLgOaJJw7OkB85gKPaxJAEIpa80K8PmJnAx+ +dHAM70FRkBP4ajr+r7GZYp8fgcjg6oh23hSYb2+VgIH6rN54aN10Mj/escQWPuOdjvRt6Xm2Gfvn +LXTfAP9gayye97n8ybx91XcfMpXVAqDJytRIXmCUvdl6AUJDA/H99LbPOTpw+ld2qSlcL9+wkzlt +tx7H2ycJO44rFqCY4FGRQL527xrIsg6b6+Ss+xhTC8ju7lRVzkaBgWFniw8x38Z1W4sSQ2S9D+FL +15RYMgraRV4wo4HNyo1CjLQGnCwapupHLzGwpP+YsYZ49fc3uXoxkvrX14IWh/VS7PJCehYUkUOE +G5dfyyiNMppWc3IY6hC8KENOrd47Sc6dPEmLz0n1GRM9yN7tWP7vSilGpAlpTZThSsS8aZCjqrlA +KM3KLe1ZPBk6EN+x2qrtP1o7CYzHCMdVuAJ664IERhK2FOL4J0BLfs/fMIQe4wGABVNiekL12166 +sbjd2Itfty43pHsSOCjG9AsuZZq01sNeb/6WgNiKyY15fw9jwloD+cFpEjOO9YlsL54YWyH65vJr +bxHxVH7oXLjENRXBrSB3EyIQ55UdkFsQQ8ziT4ODR3GyvAXi+e7y7ljL6TbBpD1guYp7/rrcv1QI +paptpq1/+s17dmJQHaHMEUt4mlqVYxvriUyS8lUywP8mZlo/iRK3IFK+YWctaIdiGf8oTxlnNKPP +7fTLxSYJYriOs24JjQ3Y1wxDymBm27kYYeDHqdlTcCZBhFcOrcLfBgJFM7mbzjYLVDk8WAqsyCh7 ++TymjONrPhVyr2zK2akfLofM5zGtYdNkVWcCZ6HtfVWNQqkt4V08QsmEZtuKbaTMtfCnnoRH2MUl +gvDZ4p9O6V2dRXxDj5U/Q5krWxCs7knAIHCnWuIkxglYYeOQAUAkSkj8Dcyj5DKjHARN4DdCg01v +AXsjHfL6U36UvtgCBdvuyXmIM7neojxL6uIU3UcrgXvQObpFROm8voya8Q3DUgh4lXr1x69uOx9Y +1EouRGbHZDtbE/ASyMkE+pdhLLJCGfeA5U232b81vkPzE470IQYvQgg0MBrQ8j2aF3nArB0BZ6s/ +ZeasVecg4Z8iEIJJNoHRCWfJrQy7IOrgfyMo/8Hb8n9GJ+d525+RdhFXMM7hfjOdj/62QV4M9tc3 +fV37bNjjd+vQiRlDHOrz4S7fj+2IuMs2zjyBw9xIwuUaEwAJRlP+mR4COn09A915HlhKz5+zU9fv +1FFzOLhNJMVPcXOGRO3xePhi0EyYiN950WFicmjfjY6qqTz4NFTvZzBGOVtdxaX39G/mCdHVQO7i +kuDspGpd7EXEc6RPbXPgtnA9hRls9VNQmR9GjyfCnHebadJtn12K7nilbJFrN9+lzox62jbpgxvW +i6pjUJQKbRFxn95Wku7BDLZnswx69wMfESR23GTj/VbpESSAOoK3pVnrMlBHloa1fYgzaRaYwADn +UzxCdi/Yxg9wGfYkS7hfVIaoHdlvJdWKMqvX6c/caDo5PuDfvgCLyvmjbiNeEY6+bmc3IPl5wySs +amaR0IWN5PEcR7XAnZ7RqAi+YG5HV3gIO7p11E1ijBKra8TOOLPJ5v0vgIwmmavyMm2cUr5yTckT +AGfxiHeBl3ERCMLUo3gXrzndzi3EDHBglwPo2MFLDnLbu4bnU276OjwjDUmqyoTVLG7509r7XE0Z +5ky6SJac1+ZhHlI/pnEy8nADgVKfoCWvZlP+kgqjzYmO711OweAJMIOUg5ZE/6D31LCBhUeNHBPY +YhV+PojZXSftaCdFkM9AEbzpeEiUNcjm6CzTybKV7tTtFeicLiUCEyP/QmNE6Q3ZBPtES99NH6EB +MAE4iK2CpB3xF9KnMpZULcNCZ1Qz1K0ddJMiw3OaixS7+UdDUtdACOX3mkntUMsbYNThWdSS47Pz +esktmv+KTjHQjpwWxh7Su7dWhw/TZJ1hMYROTtcurCxv7IEXsuupypV/566EXSrcNG7aQe8uGNgX +hTfbttJl+rCBZa91BXnN5VBNIHAO1lgomoOwjTqdJ0ZuMvOmTPxUaXpXQ90igklgPQohyMhj8XIq +lUmwjEJQps1eSZ0WpKTOTOXPDY/bAIXU9MyHiuf4X+WBp84Gabmuk+fgGgR2t61Mac3te4ROtilf +rXZe1/eC2ML8vwIXRzdORBEfmdD1Y9cpU6OBA76cxvGLwjDORcZx6GIud/1q34O4xJdWCanBS/Ia +9WY5ALj9ip4QYHOx4DAnFmupT8KzX27zotC4ezsEOqTXQVY+GLXka6i/DRicOCwALMDQSIh7+4XY +3sS7mthV2sfGzoc+XtB553DFG2sZVIIehAxm7n86Ofdyb4+kDGVE+jsV4jvxueUSee+wjyOnY1qh +w/nKbJbdYQqD+LwwiDfYdzNeRSMi9G0eSwZrS3uNCUmuHh2/BmaPnaSqoVSbqFnqEsoHArcfC1Mx +kiUxLr1b1xvTx8ST6Ww2W3RvicKMvLBfUJ9Db/QQRqFra+dOiIv4gay7eVyhikD8tI1E48s0C3BQ +0c3P01QLmEIVH1sbhppZx6Ko6lx36a+8zv7AF34hf6qTlL8ZC6qFu3BJ68fskL8fCnbkQotuArZG +Tni4Wa5qR+ujDxdLqqL+7Nn6hDGdH2ZtgjhS9p3Md8Efpq701aIabe3+FiLuhPc6EriPoSRLRklT +8SrFmL8hpxA8xMjA39jzQI0ztcvSxpNyJd3S40AoECDOPKBd9eF4V6vUIGVjT1PvzATDeTXvn9AY +1GEONiBip0FWqiD5k0Uhfh95iyFzlivPA6+A13qiN+pkU8NQiAqrb0d47UNKegqAXz4JpGBLxq3k +trVeKunOm5X5gbjXeaarSLszPEvA+iZtP5KOYkfKkRvjCmhtXZfvEBv8OQDQPTXTL+VLYzdsHRBx +KEWMr9YTZC9YI0WbD2JtVXE+Qyryit83/ySuBmwY/E2xv7OuFQSfD3z34q1mz0cXw/SShwtiQlbM +fLJTvKI2f4MSe3xPGF9sXlhv4VgVNSGTIgVTgNgxZ6IHHCTCZflqsx+0wJJykPhaGOx36Cdb7kna +dNaNLOuZWPjP0qwJs55kf7AVY3GpAhGAL5XFtfOqEoGm7QPK7eOtDee+sQcIYR4xV3P0+zu4pXZv +9g3GDoZrSHpqU/qPQ3mE7rsQWBqERr8XTCCPInJ2gbhzzu/+t5bN0NvX+kZSvofOOQ5/zcdyhH88 +c/7jbMxNGolAnxvJHA7LVJY/xy5HmsNdrs5kfaxN6RGG/4NxKJ2Lj2vOzWJxd0OvFKwKPXSnCz5y +q6JvnHLY/6LX2pUh/8yeXG9VVY3WRYvYquUsJEn/ZI5+KCik53XjM5C5hvdf17p7QIG1qU1ql5HP +2XRD4eVqERBS9pxAqbHXDKFIDpKJV+QnWoH1sIpMYrlMDfNEIBFr54hC9ElSFLxKoyL9aemwr4iU +C6WHvh3aiplko56ACu/ZiZhf0uIXVY5/IjK/VHkr7MXfGTlSUnQ0rfwBvWecAvN3KnharU2rnVC9 +bAiWHrHSr0xZqouuFMN2Ss5rL+ER351gzHi58od4HjV3QgwYx4l3hTOqgkJ4odG9de6yC26s65oj +P5cAkz5iT7nooytClMEJeXQ6e245pHuShuTF0QexzqxB+bRQ8gLotiavB7EXF5bVnJ8ed1ErcqE7 +W2kQ4NvyC5w4EIID5Q7SOJpcTE28dprcc30C3hRd9k45wlUwriCPReXsiHm1RUk1S5upKuAwSINU +tqDc0M0nmT0fIM3HIXfoKNRLKrCaQNgu7jV5lOqIEHBJbckuuiV7DTdXnItYb0mFvj4788MLerj9 +C1Fh4ZvuBmn6ja0YSiNYtTrZ6z/l/t+1haFM8fo+MVX+KlXk52EOCRdLHj+JxrvW26Pm8sVWOljv +UqrxbW+lp6DIv0LKsSj0fHpn6hVnIabsZs/USXZun2TV+iaZtLWgPIKpSpz7JCs8mwgaQhggjOL+ +pqZ2Y63Dg8FHZcLSdrZqxtG0mOose8LpfH3cbKU15vnME/Z9QPVN/oXR/U9Rvxsskrp3aOCvypGk +elcXQuY7ro5fanZdbPDfykiW/NKXp9ab4UlBvxPI/SR/qfJvF1K5coRTj4ZFMWo5GLSzJwmbtszZ +7G2sA1D3CCt810XruFbo8Po7asi/WN4RRZLfkBQOiaWhNMDZcTpzQXEDFL6LaxAQLUIDzaCyMreR +pXw7NoJhK/iJGlfipOaJo+bYvOrhwxIsVq/I8N4ucM41h/KWqNXgwukp0dEEb2fnLdbE6WDOSnS+ +Us/R9kbBisSkIs1o3kPeRMCcOCjYwAgCpcmP8EYjXyrL0oBDK3iZB0qlOpdpVBsC/Tu9T6Z4jYc4 +mU++h1ALRtDD7fkAXdGIBHl/aSJqei+LsOTtWagfdFKz+Wi8ZSZFRI3wpwq09Pghh3hR9tOzV8nS +KIiUCzd0FDEv1yhdBhyY9337OKW8RVdAqOdvkifs2tTTjwO7TpCMMEiAiyF3UmFcdWPx9thZV5Yu +P7c0Q/LZoqkS8LU38rVSoklzg8G9Gsq192o0sgnwUQbBN1tKvFSpPDeLMnAbdariC41Mdf2Va0pK +pEr7jjG1s3xkW05BQGJ5zWqU/kw6rL/vyGdYdHJiS2OWUhu0+MPqITSX30dBhU5Co26u+otfx6r3 +pwPKXuyl0Ot22Qaou9N3VHy5drwwPtWFJeYBLRzWSNMHhO2BAUEbROOV9gTYr1FGn0IrHFncCjX1 +FFBvhyO7NhcSAsfAEz9dHyxURfAvkRHpLlgQhjeneQYSHmKohsMYQm8mUI8VqMqf72eRl+r7xOUo +8Da5KQnzPRjNFMdP9qqgZ5Li1Chsl3etewBmcoyeHxMx/PDe7T1ExSlEXHN7VItbpB2ZaFxnXgQy +qH21Ui2GPLfgUIxp2IRCgTArpvDb7C1/JCvl9czoQP2Auz+3p9W1JtSAKJ9xtd1AJ/3eWfJ3oAtr +iAQBC7uRnoM/ItdSRbU0ev7c4hNHo18kQEsxJfxFQr08BFovHorqtwQyIa3YOYsXjGuqMgXUaa1d +5m9wPct4dZmygGsThzTJUfbU93SRZ7rF+Ojw420isGlnl6KNsjbj/uyYJXM4DSzVy14jPmA58H2a +XCf09YyKF1g9FHusmpjJqglqHWlrEmljWvd99v4BE0LlIfFFWrVRiyGsCR7xGHiqaZDGcxK+UfBb +UztDpkh588zNH+VDmIZrpD3nm2l3b0cIf0x8WtPqlJI1g5xiDFPwqJ24KCwOzyB3VSH1RLK7dH/I +0nfSlGN6yO4gOMMTu3a2saCkDxam7eWD4WiRJ2vWMWU7oeUIvHwI47ONhtktf5kM8kVEhVbNsP57 +MG+fvSKwecRoW6lFPMq3OAzFzygXUJVhttkHPWj6moX3lFssgpqWTGjk6eesX91VpK7MbHHTOE0w +LAyAHZP0hLmwZ3Em9BgpVFk3zogrPct7RFZY7NeZ8g69OKBsnGUAnzkCijC3KDSSV2ufm3lmja7N +I6y8fnaqC99FTw6wUjURQrWwx8hSEYlIshWSRn6K5qecKKXPAy/OJ2AsrTwks4M4Ur0irczqjs2b +wcTDuNcB9hMNH2wc5QAuqNJHi++ycMoTM9H9iBS4xpS4ZWRyDfzDi/JJymjwM48B5W7CnnuGe+DN +RqhwHtgeZ7fpW76+lfB0RtDsZvsSyM7gfQRBBq0mIwrEqUJYwgOKILX4JHF6yyzXdGEUweFTW/hV +bbbIst05TP9umedfcyjanOz/kOnuVEar6L+sMEjBhj1AtwQ66WZ4CE8vQ7/VMFITcdrcFubNEeL8 +dhQtgmlbkG+XI5L8VReWOOUeADDqdj+YCEDsDCSMPlEFbG1MN0CwDlzQLZcr1FL1pqxkmekthsA1 +OOwjHokmygd/EF4jGAG83dsypnWDJFDJgelU76ZCV2IEojdOV6QdzD75Wk/LdJWvdQdDv/JH2ofZ +MNsKUwNnvPKutett+LZq08KppqouhhReaVoj8kHoq2/jWZxqoUTKXl5tQ10zmQXjvX0MG3cm4Sqn +BUF7zlpx51cHgnSwDn1yKTBrru+GQ3MkmnKnGlsG6ADUB0pgc6/UcUWZI2hcwr6+ShUF78qeMnkt +lj21koY5iMoSzsmQa+RB2/TK2UazuYQTMnFlU2fWjRa0RxIHd+tqyaoOy60PAqGoYKizyfQrRKif +oGOaYeFYEkke0Yd+wVHcniaJABzsRm8d9c//hEgu5zmCs9dWFDEkvBJmPXOoF+d2fgCfKfRNOgKc +OTMyhX3rTkixykiTMxn0WzRRXfgwMMH2khE5VUOf1AubvEHbgCn84uEIIiXLHu1a3BIW6Iwq3+Zc +V0yO7ZoZ0MK9bOsphSQM83MBGlA/Qboo7rinXmmJU+XUSFjNo7CHFDtXTt7i/ntCM3fkJ2mZjteH +yryiE29JZUzUkXVM4zz/2wsPP4avBn8QlvOD5JUj/EMaZ/LxGSOF1pXlJLoflzE113OVJw9bqa9B +h/5Bo7nCsrjWfE7BdOI86HSfcqvqz+zPxCkM/0T/XyZ/+b+xYPHDda3a0mFjDYzMY/b6dRRMBSyO +km6mBiymHhCJbh8uLiCSZA54L58cqsuClfaduS933wTBpyjW4wlb5rKuIoBLxresfXAUaE1L+ooU +VZW8hBAxB5bMMwTF/W3e5DiZ3XvKPn8mn6T9Jba/cUmj54goIBxHVg1gzS0XHpFEvRYie1JcuQAU +vx62BjlUNyMKCRnoqjCI42nLWgRhbYgiEglXWgCdZjxLcZ8i8IwIOQRwK92zkXikvznKnGSl0xjw +saLNW2pDXTRw1sDl+MgiZDShtBsXqEmnpdWOkXrqjMTIP69GxrwFVPxdjCUAFOdft0sPANrhLcvA +9RfohNq+tVOnLIkWXRH7tuDkw+EHBcotgaO1RWkHj/ZKpRY7DJMiLPUXKhXF9MKR27FOKbPBlCDW +0Tryp3+OlBt/J6Sg0orqKEUQWdmlBxMjdDR0AFuzD0Ii1stxQDI2ardVNT7hW73yPRTy7drwl71u +0/HehJ/e9Ovxdxp54VY01FmrGWMIikMsL7ig6ias4mm2hluYTVYT/aIw4csPWWzaoiKzSprjGS6o +nsBkP+InNLwgBNA5nWRbV5qSCunCxmK5VoNFXX5kk5taCklR5w82FMHmE5MTs8YIvQPQw2pykrb3 +bVBaXsxjjfkYmllOh8OWi6MZHvBzxnIdiDebVt5pSCDY2gnGErbnmI76oCsj+XRUNiaBYhlBf7+5 +bGsi/qaaD5Q+HVfqXh7rOwEZiRbsP3BS5BA2/t+vQ0YgBz+uvQCo70BIwmdjHDiCKc+oKMP/+IzQ +sxP76AHcqOgjqGDJoaTsdEa7LczAA6+a9PezvASeYMOW0slYP214i9lQRg+bm+pV30FoQWwp8mAH +JK/jNiRgsW1sHFY3npe/CeU3hMzMYHrScevG2ZMdHbylOcq8Dkxw06SrgQNqhCA9ueWNShKlcGOr +vOmbdJMnGQdzw7UOBjueiFewdz/LuR7JBz2aEWzFTdiVsGEnaHKKUM52j/8awt9Jt2DWYaQgjli0 +iZPZ476vK6KuSc59AKeTE6mRpWPiNk1r34P3oief/xPDNh0VQZWHaEboRc4Jx4rGzmQ0gi3IC1Y4 +EgJLO5qIE1eE0hYCcemW+L6oG7nz1hVW5xzJzwCUIcn0/DR4QVFrlFo0T196XJyWvFr6IT4hSbeg +AuP/nwgN5Yr9P9OY3l3X9pbV8AqwARP8vse1HbcF78oASMFVf7l0s9ILbUiYth2ZotmrhsjN8aXW +Zmf1p9Zf/gUyupAQ5x8+Vlrs8b3I1f08YwNi3TeCZc9M0EufOlaH6lNaMW6+1XbNJEXRe3ERCnsy +ABAWWrHCUYtltfMS2mq7pf1KyRanh5MDqcDIoqPvJakGCL2hL18FQ2pDFfv6BToe7ke2pgMDkqVV +jQQFZgrcOkKT7YRIZl3FqnwZnesIgysa/s8HenhIigYNEtWS3+u8+FHbKRRhnhJcSFmIEZqNcclU +dtOHz46AF4eFZA10R8lhWeipH1oDUXz5Z9hZPGQTvrG8JP3Dn1QT+u/mPBps5Axt/nIVi6Nde9cY +2oojdvuV16RdC3lYkdFSEzqgAV9w56x5YGIr9AIRzaC1fBGEekvidCMGJhn5E7iKPwfQbGHTuBm4 +PSlJkFnf8g5OX0aXq8OOicFTN/tEkCt6Vp6Ve1FptJDv2vyPageeytQzVjE5fI0j8v0Y0Co3kI7w +wALlpaZW9xNteq9SJ+s09qtuck2gWHFtB/Mdn+8Es1LhfwrsGLF+ET0d9ZYZcNvN04FPssmRLwYn +MfYKRVdfpwJ5b81QkeSQHVsS8OpGn0zsOUi25JoVasJPprqi5MpQRx8V6wfvShjhWx5cDKCLCGQ/ +toV7uJri9ouooXR1KvTv4dM3Alk+lkPzx2Iml4g90InaggfPVlreKLSFKKiKK7yCytHMKq7dd2WD +XTTSPceHSZc1OOShqVbuj/oHyTcTHMNWocDVqzXpil+X7X/wfKtQc+0B/XAEwAaBVX3dq1u7c7z3 +nV0oZzH37q/AsLchLbSNqx69CEZbDnPu+tqM4pZjVrBVNrBZpzaltv7R8bgrrpf9Az0wvZ3J7k0r +CHgF42Pk4XwxlXQQe2LAqxrK5E25riQxwlvjCidDgQBwceXkJJqTVA48jD7FJbDANLk4USNX+Krp +9Xy5WUOFlZCTyzGEiraC8MQrJL4AMxZqc/OL5T2PD3EfF0Y/kwSJ4MmCbedi9xL9siy7KVeg/0HU +zpVmGuBrsZdp0psy0iuUriOBsP+BnW7FP/0lhsfGlKJ//hoNgbhT5jyyp/FBWSHexfTcD9c3IJn0 +BCG+PqCD0kXYXZWipWYYBE062/hy0ce5QsZDA6NWC0AYg9jmVCxGzDrRDev/zpA7tNSOX+Fr2XZ1 +CVy4DkF8PjEnX0TOc3DeLHeSb5R6Fd5q07kkLlwA23Xm97NdW/E5VgIGgDqvbzNSgxWlrEqueFhH +JSSPzVjz+FkPo84/XUXnuMl45K4wmwBCvdUs6VMUmIHYUV8tFX/PGKa9vW6pNeo4VcHQSxRtmz7J +jjq4BvQvnpEKv7RlK81uFbKDLu1HXG9r6acHTaIfrVvXpYS+ZdYcYHI256UeJ7+3CRxmEPfj3iHi +qT57phHd+fGNcfW6/S7YV+oEplGMSuIMDEfJEMiHZZmD7c7xEUSpxNv+PR8TSLfYHvnWiLWuOGLh +jxK/R4+qup4gtVnQiVaglHohH3Nu2JtuTmveMf7RYiTC/X7uFlmDieF+yOOGhx2UAnY550nhbd/K +DhGreemzqMcutQbecjoEnLv2XHVmyrlYp/ftjPP46pcHeNmFXGlddIkuv6UBDtz2FGGs+EoLyc0E +x179Xwms1zh3ktn3qvdR9dCohlTry3Vy/JItPhU3NoWJbIZxUvHQa4sjDFW6DyKwERgsqVlqMYvK +5E5CFId8Jm3aOoqhC1z1RbUBonVmBZbFy+FY1mcY2HT5NBF7UfotpDu6VrbwqkKZ8dSNv1q4g6g/ +ea8Af9mIfYCu4Pse7NLpsLte70dvSagvIxcpcCGeRhBa9id6odS/qKQbsKcQqCcPudjBw/5/kokm +AeQQrCHxCPVifWeXJpPdDwLGDn20KBD7R2wvUZgGPc8F98RadtxdnLUGwsj6DnKLOaR42HRp4/R/ +KBiwJu4KjYD5zR6T+DBapoVGUfsoKdBko6j0gQzLwGC1tC4LPIF8SU4kL+PoflpSR5pGuHhlC90O +2xdJIDPi0/AO+6BHVD7XbMEwpAxMoRG3HXZe7CjAfVVqJI9EBVy2LhKlUoC38qmHOZ7GremKjEGC +71Df667BHu76RWFznJdczdCzG1sxr8uuIXt/+9VgMVEP+zIywT25e34wHd56f2znwM90BqU43uZN +wJjODurzasE+0fKWD3F/eP5iVEr5RWnk4XZRkzmBS3bMa3rIO512SFA+oyrh7vhLP+mokjQ1rwhG +CJjManu4l6YHStws9uS/mFUajQJyemdDepnQisLHThvlaDL1veb3y9h81LfiVrlA7XTKIVPCpmsq +mr/Zec3+p5+piK5JAc9W76Frdi/7GcD4qUOCaw1BmqPRvkvISSHskC2i73GgsUmTKDIGViwx/TN3 +uwCCOTSMbN7gfts1RoK5oUXG+U25g5oi71cTlqxSkL2+/WDQ73JxZ8oaBMlfeEcekZeBgfhd62Dt +VbJroBJFkX6tV9ZgMB/roiveLtdlFADWjMgy/N4oqITiuy+JhIjGRnxtKD48CwLtySn/KOg2jE10 +Rx7NTkHpUxayywqELKgHqkge+yuo/rLSvXpku0MQs115YVSXPCJQyPaBchPiVpw9PDpUHu/M8A/r +dxyoehXR+06LEGL1nsfCgg7JHGe+TMlMVp1bqsszIBwKgdTKF+3loNiwS271EC7Jw8FMABzgO4vy +jF+EOALKmtu4U0uyZoyrLmnkzQfuSu/lWilS8ZlsCoNKSTxuJJTPlJYHS6RM3Rr7wOZRYtluzeNC +ULbr1//JdBMYDEGSnMmIaAfqgZ3sWNHA1wch5waM2g6mWOguW71f9axLr8B7rvHgT20/ZEu9z6ON +BxT16ETdFXaEBaTsjYmY3QngsKV2hGg7qDAsi6MjqZNzJEDrAGO98/GTupRPAQkxzPRwyBq05Jaz +5TWmzxpMBsdhuZ2ZIAxzzEGv4N2uzcAFxLu/OQRzATLBK6AVEEFkk2V1k/kCjHB1NcN0Th60FOdw +pT/pnLDEJ1DEud0Q9KPjWaGp38hrJEGMY7TAbsqO/Cg79Ng+LJIFv84Tw8g1rJd/6OFappRnAqQz +dfdACvETSfsxFc1kDC0RcnGBpJf7znd/Hl0ZqOsaWKAeNZdnJs8Q2CRYJzKloMckMrUNSmbM4BfG +NUyRrzlfhbSS1nD5WqxenLGCkZ2Dsla3qBpivqol69skJEUD0XMIDNsHDPZ5imdAL8EBJMhnnV3f +vSjuCET4ZG2FE7Wg2YerTeI9XGyoNHObfd3mALACBUA5pEGvkFs0eWM8pLtqCE/78yqXSTsnzYd9 +i87XORcVKN9xB6WQ5I1I/I75xOBVVPBDCbcAn5ltQpNCo5W9cP2phftB3GN/Yd9f9t17DzGm2Zpg +n91F/kMJeWY4TPx1mYlBb5QD6oT5A+fwkbTPQ08eDWtplKZTAUAXxEgK0oFkwdsKp7qkpdq0SMID +aGMs2c+fsvNUTKEZ3ZMaVm+hJTodNMeWsgllL+dvwekEOE7oYGMhlQ4OUauLGyhWZgdYiBFJeuxp +U/PttceA4zaL+T9Y+XNeRkR34Wnoy+dEscHl8S7V5gn4freE5wjpxjiV7EH3i5r+ZeMClGRK8Ir2 +fUA/jPc/81d8MQLd4u41brRSDdG+vwEIlLaAph8HB3t+QT4DBwIf6Yl/Qx8FSaAt1uP4MXI6Y+ps +G/5QNeLjHTDooddoH1mOcLc2IHFV8ZgpC3GZd5JIX/pq21IcdO7ynp/QKZ3Qr+yMCo9D4cg0qsET +1uhAqinsHMy/G6vmoKbx/jNGInMzxR5ry6R4MfY4sBi5dqBz3DaVdte7oHsgbkK18eyKZHJbagpe +pDFWX2v59fizrR54DFdYaYvdwKgFXakFxI2EZUrVCRX8Wd70OpyCyQRNbkv0IcBQZnjgUCdaHOaV +u5sbxUAAQf+3219rNA26keaFzbyJNrnrwXk2sdFP50MWgTHRVHoESSPe1ChExJjhbijtWb03+gu6 +675CcOReCs3U3s1H7/eQAPzlybjaKKh4xHHp+C0Nz9k/nWyNQB/qTGe0vyiOoovgQB8FYElO4YTJ +kLSi/KGK1CiZYTMSXpCTTQbZ4GtwleiIk+/0PL48hrZ0DSzZEd+RK7qHP3hq7FvFy3cbARiRTabL +JfqbFRbL8z/kd5/7vm8zdVubU4bqZTFYvZDKm1uHaydALVDIoaV9+4JhWnYGTFc/Wibe/LYOL428 +kwYRbFZFinsn0KIzUEonK4VVvT87kacq9l6kzoyKfAP/739XglQXCeBTtZiP8HnQQsKjTeeQCvbG +ncinG6Wrl4QIhycHh4cW1R4Q5PKclntrLQvKOXpl9TmPmRz/n3OcoFnVrKMB3q27kFPpzRAR85hd +GTDBv+epoCqOoJlOXFh9AHFGHk7JayWp1Tgop+H4PWsuKvA/XXep2xE7//bE5fdlzYNkxLgvxU6M +eMWdu3iVBOxQPYwpgwZoEpbquQVvA7XS49mgFB8H/AZA3HYrpyA4+PuOgnprISA/8y+Am7CZsmXo +SLd1tD6YvGQqw2VcmN4dbtHZKXWkgXVXtDvk7TePU/Qlqixnx01pjWpcMYC/O4WL46+0sFsT+uHW +4vfYXq2bWLWZhntf+F7B/GVsfjhuYiWp+ULfn9ewHriVb39HBpRDTPpo/zUfppdQMTTHQVuqSX+6 +M/zTeARM6hyqMMppP1/PhLvZtGVEvbXsIlD2CaR2Ly47SFY25tbiOQG4dM5KhMdu3Awmn2G7ytru +83tsJIaO5i1rCa2K1XSZw0GxLEZNZMWAdaM4UgX4OgJb7yW16J/JRKTZHJDgagcvGX5fYuhbrP9e +nOVu+5KxmvGmjKDpUlh98mXo0u4pGyH4LkdXmwVuiO8Ows1q4KsRS1r4RQhXjvcXiEeZQnHamT43 +0YAd/F9Ky3PHxMe9tA5mDG9cR2mIUTuj7BBWji0EDSUFGhleidynUh/vfsx8YHPN2o6p5YIXYwn6 +zwnsKl2VRm9sxtPCyaQMZixRu7KhoQUtFBDGYo8r/o0LqdSlKb4iNYJDrsFJ+NQ+O3g8tD7N/ofO +OdsolBkX0ms4HwhbmuHsMCSMPFvd3bH+DB+tpPdx8gKjPRAZBAyAPLrWIjfsbKp/CEflJedrH75e +xUVfu0MmtBh68mbksORufeBXjybyhw0RsPI+6LV+v+1jiqzNtGEvgkNv88oQPAQ8jgFQnfKnmdlI +mqvWuqY2ZHm/J4i82SSBKRT1Cg0NFV/HCp+UPreNrjH7DVnNUri1jldgipNXJdt0eTTWqJpRCd8t +oXdsCykKUTS0nt8tiVwseSHZG/d9cFz9ytYj1vrk0CP8tpNXvJf2ozVJylWZ36Z7iR9cg11lpYEr +vZIXW0s3MnZb5K/099IXydugZskrlrIo82G42cphf/0rXwdlWxQ+R+hrGus9tcD4z339RXpBTJEp +C5PsHVt3uPyMZTCj2eZWuMUQd52JRUpSGPPSmthqyhgv0RWqkY1ohJJKEyItosGg3DS7uyWofBJF +RmTQn+UjfgIFC9XA22EGRer/pUe4E6MwuT8j5AKWu5WH5cHtUpKgodIYMDSBEVbLqwTYT6pyFuul +psEhruQ8Dmyq4aWKdicgkFu24v7XUsQ/j+U7YyFHaqQeryEDG8RLOrYifxEe+L1P0zQxO5T2SCa/ +9ktHtYIzHGab/QzD1uTe8fzaaG2T5pUkj1Atot/HXE15ikrtSlUGTWKzwNEMn+zY9fx/mh/MWI55 +8ixiToCnZC/ONxNmx3EP5bKFPPd7ZZpvh09lixAWvjCKqteetyNNhvunN65JaxwSKnnEr60b+CdZ +WRKXQYMGFZcWGbbd9B0OcCAuTBNLTWspbvlYUrXi2dFxxGSinNarxKFkGT07/fpMxkxQx4BmRXgE +BozVkn1ykY3fRz8uZjXAIfPTYUxuQT2xDduQ19cJ/GE2ZDr3UPgXxxYgCoJl2asEQ0jieisxRlqo +eXOIw1X9C5yZ8W6yZ1eF0B+tTSFooFlCbBBwraK4db9gEOzwj3+RcDpeXykv3Yf0eX0u9YCcv7qc +/aoW50OPHKkyS9GQLX64oINj1Y737Bfp65o0YbqbhEe2AYAC1gd4dUnIn1yrZdX6uQpWvPUerQgr +5eXgt/cn/fRhUjxlXRKEcrt7wLVfgpTFVJgaAoQBAIKYgqz+LOuBeMCuD+wGyHPLC9SFUe3AvHfK +Bx1MAUNybB+XJec2YRuDdXPP2OHaB5rrkYFyypxErqG3ybHUj8ATmUIlkWit4jPnzfCPgWOBqk9C +cGfNnAOUdSSYX40KS7bo5TfAiVOoVowMoVg2VvinzGAROga1vPy9+lPXJzvMvOxSvyPcuBI/Tf2r +KONc6gqtNmy6HT3w/hUVn3Fq74VM4DB7uwiLN4cdMZwLZJPOzs3vZMk9zDzukGrj1yjfS/7TxMwc +Wfqlcq/d1ZhU8okrqXPB4F++/y1xLHFZukW0lGzpoOYJOyTKu4t5e8KSsHRlWSIC5p20iOxZAJcB +NLeLbP+Qggb+EUodJ4/71EkzyMMqwTtf7mOmXedFJAWAqI6ge42Hgm3l5EcFdOuV8X0xo/qJrxaQ +dO2CymvF+76Ew+JznZiAZhGKanvjFLTxhhNWBeBY87j6dW2h1GIcB+3mxtPyLKJ3iVYV1N5pBwS6 +ZfRwavIvR657L2s+GYUxnX1P6kkm+t/GZf2k7LSF/ssZcweLCndKhGPUSh8pjS32ZUJfZEBb2wyJ +pNZfSZHVGgQQhERPtLAAfakS4YPSnYbDPWS55qRUjT1Th72EdHtwj9u0+/qs90G1pZ6+l3ZT/HF4 +GZOfknJn+6v74fw/XK/ZV46k+ETlbT1peilSiBpCIyiDMWvQuxGHwBvq5YkVe35zg0xSfHY8L6Ni +6lRNqQcPSKMyTuesGeG/7YFCIQyId4obwJEYZK+dbjxeUFJp6YK8Di2/X/G1gRmFhO0XZDJopM75 +ZaCDJ5lM+u/KfGcZpMG9fWe5UEiD8Ci2+Q+bAy/GSEMkrwyNRfUcqHIf7vxAR1hmvgTl2aZ7h8Zv +6bXiePJNPTEnOBKCA1kWJLXngyhVOsZ49Z3D/+dyY55sQ32ePqFXx+EEEa3NHWnMztecSR3wZLoj +GkSehaeQen6PBGjA07ZycnoHcU7zNFUISgf84ou5yjNoGhmQE760SA2Np70uT+zfHDGjQyb42oYe +aNnmmAozPu8lYw3FYbuMxKmiG5kMoBPRfva0aq5lqblk3IGiZaUZkWuTr9LyPh2oNKvXC4U9V9cm +lSvxZNlEN4R59lwmwOyxJwzV6Gg3enDdpNX9kSv0jrIbVV74Xze+JsICjdKeGsSLyngEllHdEcSZ +gWcFM/CuopCLJIZI5pmSRN7nziHH7nhk/PCvNFdAUOl0HmoavFYkQFGuQCXMUa+LsWTjIf1eRQPX +6M5Q5Og0aJXg/mXkZSoYdONncHM4ZBrjB3RdrnuxdrQ0yOQR0GvRQTCgyOSEH9My2fVTinF20I48 +x81f33ZD5KgEazjngAtzqGYZaij7DmH52R+TwmDnTCLf6ljKTqki1s/Lo9JjEcRHovcALTG7vw4Z +1UCJEZ6sH71D3nAdgkiE2BbsFROl/2GQ47RjllVTwtvzMqy5JqO5OuXXwaca7mHQbrTuKP+0ElGT +Ykxzykw0+zI8PxIhfw+0Obpoa9aVsMdizAII3z6AGZiHE8z9341cC87mQQooZ+4En/tkrrib/hS/ +Uf4fcVkV+cUVBGuu+4IXqzCuAguwktJFGlCPZgSFIUnyXB7vU7OB4jy4f3tMpZShM51GozS3D4qp +aKQdbaskdBi6XllgNrsttZj2K6HagRef+k61fqImmQNoh0Oy/OZFAhmYoKNGBsGYO2NcFAhKlDLB +tFjLBb1FDV3QNeuRtXSchf02xr9+dwb1qTKac8DP1MAtZvubAxakZ/J5QE1G1kntXRKVOFtM65Ba +HEWn02WbmOWlu4lEd1/XQNN8fo1Lm1slo5VtUVF2yKqVKvGwNp3Uo/4h7shqJDG1YYvH4jUMA4Wv +jTDr+VlZrofh8nEAaIgOUaCqSO4loL/VYdCN6XDFHcMFm4QBQNjMexQvyZ4ga8CU59qh3PMkTxbi +Dk1osXC+Ks42bmlkKo6lzg8FLAx08cVbnW9rCukzO8LwgIMTilF3S4MLJ1ig0yyop4v2A2PWZlp7 +gZVfa2ztlgeoea2ansj8OdpTvg2j26TrNe++Pf5eFBkdbK1iYQQ86QACZG0Fuwj+t9Uc9Uuo2xVO +5SJAaFYgbtS8q8aBNPwaxs8C1WbAicm4HXwCc6hi/vWr/t8UCApa6CZ+HraHrMKYVhUhj9TDo60+ +bCpo/J1G9P10gYUF2hu6J5miFY2pbmYSP+CZTTIsCxwPx0QiDOqPvmbNXvrw1OarLwRg90nlr1bR +kg42pg6iiG75FLfqOqwNhB4MiAxLvxVPCJDXE8O3v8ARAtf9Mel8icBBJDkkHLmgqMB5u1PbLLGs +5lpSuZHAENk3c1eltEdBmywkGdvVaLo4N/0hOTzxxYwUXP9pLEHkypAhavX8bnZgukl9dj3jkH0E +gtCDc28ysu4AC0JZyBizpfLC/F26ceM5bg63TvtTYDmmkcbonMSIN98d6l12deL2dXwI7SqvAwrG +O0utFcdN8lBMlDV958/AN22bH5Lcfc4g70cxzrJu1VyqLOnx6hmu7rZSWHNGazflCMo8JtLCjvF8 +iRlHrXgiR4mITLSDUNOgEygE4XNdsUmSqU2tuThtVkryPL71xL8nCIr5amRox5ZCiJqOfACSMk+A +3i1Z2dh3O4s9taivZnatUmNn0ieY9DmELWiAC+ZwgyxQMDK9xgcxGNnM3Nv0X2vJYWqxzsK5JYk+ +d1LxbRCqUpMSsbFDEzZWhhdyHQL8m59kSoC13ZiCgnOeBQeX7xuKerLIXSnSa/sviyrV1PHFZyvm +0q5D4883e0PL3VtasQohDs87eHOUBKt7w7irVLg3GWuqclF5RMtTFoA+vBuDJ5cGO8YGrtcDzXGC +IQg59VqoTLAN/5qcpiaUU9hwBlSjeBxTsT7kIzalWiziRuXv83J3GJnEafkh+6nljBsKd+Mk/dH1 +SCWc/PVNRxnYjscNvVwcImd4+FSMdq9rj5JTuVI8+hI/re/ct5sSv8AaKyVu7FItgpvoKThCc0O1 +nsAe9Nhih/vXby1requpevDIcRd2fyQ/5ht7blTxBhXh3I4iLfgFcpAoNLmnPfM56XtD4U5VC4Oj +eaubmR9E/TqxwsWxPoEEGZtasQFUXrfjIbuLwbdByklAp67pBaa+E+t3sky8pZAGqoiIflKGjip0 +PP0f6yus3afPOdvbCuSngvAm0gD0R7i+ZVy7qxd43xF6hNMAYi8nKMox2YoDFkYwXvAlpNybZ5om +MZiHm4omx8qcNmrh+2Zp6HDtQu9BU8bwINAcVB5mJ6pL6/CXpIjbDan+SixryIOpEw9FVuaF88L9 +g/3ERr03sseXJLq84lbeQOhRCppY/xr6UGMcctBTjgQepXnRLvTTCFgmAbexQQnCrnRtbqo6SRWs +CnSg8KLd1ZWRYzAqKmyit59pKf0Wu0ELSIUUqlf/nlGbwWiX5nIQUIJtbqtXTDkH+21lAB0IyEOI +P/3xnjTgJIcQd1pVza2GmOmWQDcOnKpH6I7KBE2lLrbdOs37L4BSLVEuP9bw+EiddghDXglATABu +4nGFnFZkWV72pGrA0V2QzrO0y9tXf7ECqxNHNAXraHnDW0PbxtTo/n/bEJE67QnD+Lw4WrQeCxf9 +YKhiX+MlOMMaD3WWsYwOP2yeN7wZfXQeAyORCyidpg4iXUFDAm+ljNPRnygkAhPHIRBN1NCN5u4S +x69cd8pHMj6YAsfh/WdnORVO7U6QLxnwNv17ppuKm7v1colhRTzY7Gq1eujf+MonezypdqHm1S10 +4X2EgAF9ERr/cpmQQuzfWkIGfwPVUR48RI0io+r356Qu8OAVOVm/QykP0etJeBAlcGMiKB2kD0Qg +jbIMopLKQhOccLpQ9H6ds30iE2p0DTbMFbCbf5tWWrc9DKdD3xnNZ3QVowadVH6H+4zNV1PveJVF +skHZc6wikhvLff0t6TmECtPolm58qlTblq03Zkxo62JHb1UDd+XGbY8V7qMnGptB8Hl2/SJd6Icf +PHDI8QcSghmLp/OzOcJOcz0xOuhfnZfjvUpBFVdGqD7URqet02exCTbNTTLn74E1+XEhThXuXvYU +OLKFNMRmBg3ai7cHkW1IBVrC9X2Hal9wsMm817OeifUFGlI0m4WCTAhp+TcTN6BVni/yFT5t3MIY +lDMcNfFXp6KXS1dkH1AV/U0VyMjGzyRZn+wcwP1TpomZFOfm0BAROb/bhzu01iHbW08xvchKFVyM +IAF1d1NuFdaUFO8byPXCwNoH83ebnDnEMYExwEgl/Bk/MVhs44BzY0UJPr5UcZ3h9yU182kN5TJn +dIvw6lk6yFlXqbzFyIAPtBAPEp7UlU+wu2KOJYcGUJVnUazGuRqjmpo2rXSoP7S8RQ2Fi1GghGvl +d+3iSUkis60u7Zq4TrQligFgcJFkRjnIAjmjvW2HLKt3mX6HLjfUGbBKa3M18rudVcbJQRb30GZl +oCW25vVaoaOASZt3+cjSlCfJ6QBdLikslqonjTsrZJEs4yC6QOWssKXaaZVG+4VJzVB597XpLOQ8 +LVomzt+0Od/osrxgdhUIR6pVPXlbgIIPP2I3+hIMSUJsEIiEPC1dIL8ZiriOzmkVGPk7e7ZxYsJH +9AtmjPfeTi90k3rPwaFeDL252YxVm28NJsN9RpQ2xzQEYnoWfSkabQLoF2S/tK+UhOkCIdNDEJhf +C9AbcKoFX924/iDgGtDLsC9mh/u8giCKIZYBKfg9NOxaO7woVS0SUCibkMMiybA/QjaeF4gwVmBG +KuKiM7w6K5/uHjwlhgquCsNcI+JY6ebj5vdgJ+xC5zDskGGtgW6MisuPAckqQ/ZjGbJq9TRr7V2F +kBWJCF55J4xjb0TR/itWkGfA8Yv2Ve0BjQsqgxFxVk5pGy4dvHAoyWx9UriE6vPK0kxjtErKRWj9 +V0BmicvmIbdD2MVu85sDfc8ysKS2UDthzg/jZH/4vjh8thNWqaZ/0TxyTGbYP8eV6y3LXPwfkj8a +oe3te3A7rnDm5pg4HDUYHZXdv0Obqmuxjd1IAkPyAj2Pp2/8e4W+qTTwhJ9RTtou/ob2823zq0mg +4pWdRq4E5yjM76x7weE9nr/BPeUqqGbikNJtqJDC9uQaBRf2mrBdXccG3/O5Kk8KHUSRrVezUt5O +cbtMG0ZCYVVwZj+2qG2YogCa5jkivKIARp9yAqRir13Qvho2EciotCv/byID/RKe1Tyo0T7yMwHR +8CUqyRZA4/7GZYMtcIZbR5lOOXYsea+Z9dMQ/9zg51sKHmuTl6P1PjxxM2uQuLh0r/Ou5nGNpNjm +e4F8OkhCg5FPqrZ40sypZ1Ubfl4jO9EoMH+T2s1LKvrmjJ0IMVV6Cx+rMGt9BDGeTUoG4RoYFaoE +9qd6lnm2FElvJ1/2FT3WVcLucbzTZMuCcTHaLIdMvvPhyAimmcAaMdjTLA3kiZWje8cYdRC3PrwN +1h2FG42ebFgc3RS3NSZiUZ9Pfi8r7NdSmrTXGtViz0iYQn0kLckl6GmE+aMnVHzlclrEChObJgea ++7pn8Xw4tTsvp6FRjo6n+yRo6UaaLybujyB9Dd7mjo/6BuZUBbvm4F/nVNSiHWHKZmLR367JpavR +gntzZeOQ+zGMhraJhqDGwrq4Y6U6O5ZHwnasN1vXQkHDQnOYNBk4XLiMG1daMEunUhmCQnAz4Nps +vtkOthsufNNncw7xipYTU5kRn/pUqLGiuDUkhwCe07diK74vYW2ibP8XpAr7iXgu0Yq/IeYy+Dz4 +2tlf2z67m8UTIWc/7JdoeA5A8PbruffM53/GY2O5cYvfXSHC3otNXAdwJpKCCrCjtypm5GDSqqCA +SknqxVlX1QsfMl8qN66O7o0nnULelyGPrPsBr1x/ICxexpDpMTa8PZC7S+3AaVu5z9jVgekKorWr +RGTLHAyV6k46qld2NZtsPm8VCQb6+YJSOpDv3BC5JY71CwVfJLIxOGg3gwc77M6PezyhgoR5lvI5 +Q/puR3VAivRj8lFR/utC986VartXgx+DDcwtmqwllpgahE22sInUpJFhMc5IGsWCOGmkATcmgJNW +Idvay6VqRkzv+Dc4V0be+K0N4ZjuMO7X5dhmU/Rh2VlEi6qDum2N405I2Ra/DlOpbTI3w5PjnOIl +oaYxsHFe2fMLzk1L7gm0648rVWYRBbGXs4yNIJ2A24QpoBLa1Bsab+/28ND/ihuUc3+Co2oMe8/C +UNlJ8kHrgc06YK3EXQ1q8pZqCjchvYnmdQoM9Ryb2GvFDHnAL71geNwJAcD9KDabaI+gR3LZ/4Uw +IN7slGpXnRJ3dipGS4JY+XiRiDMZybM0/eF1YRpGxxa7kkAF++rDWwZQKNYZrPIdILmEhYB70fqu +yXrDFxgVXLckIz/Ro7N5/iFK4+Vs1B2I22YDatRawvmvC2psVMYCTdptEF9w8Vs4Cl0jV1qvCQKB ++voUu+M3XFDsbR1B5q8y+/qz9jiNg/WvyDXpyNs+tL3b2HV3C8ndjtzshvh8eJ0Z9nvk7rFLg82l +J+dqZ2oAxr03uzLDTaLCTglgGm2jpgtGzL1ODKEn3wY8MKBIsRDPrPCQlpFhRTEecwlv01/H7kip +ZPcspVoErpSH6oA5C9AFHP+ItZus8Or73ZuLE+JPJYBlghPGOgjSPdXfE25C4kBZSCBPb1fF4+tC +Z/xqf0t7tR3firU6FEq5EI2wIlLDzFJLOjbt5pOf+/L5n3OtQKJb5crTWCRvRvUhKRj5njkUOBOH +CvcComkSGqMBTGXXJLaZV2vt/IrL8gcHMrWxQQCkXlN04EmyLNHa9W3/ifMAmTRHBp2jKqB4jROF +/QHVpDfB6M5kR9NrVuklbt1fjZMI4aDilySsQZcGgIrBzNptQ+oSgzwPdIM/UUOey8MjNoEuS1hG +rgr2x8ONuFS0wPSe02+XdCGwqDLtyYwBNiQJ2IArYw+6uke+z0fFOIKaCttSpuxPyjDt8NCYXv0t +F0QzYz/ZMZp+LTKkXTJwMvG9qZw/GcU2TKammiTNTunLFUamVidjAJGGJ+fPjUNE9/u3XtBasfmv +tg77pBqecP61H30G3znJQyoF1TD5PNImO7Tz2Rkawj5kTPCLQ5sxQ8bcmjLBrqEvcgPtDH01iC6s +O54AVOdXdLxK3h4EbTf8xKjpGgu6KirVprJ34pY1rW6G28y5QYsIsDxa83dhNfw0Y04nXvS1JaV7 +oFrrXxgTCi9EvZCnHCzxq71PrUKZf3m+Mnd/78td8T1zE2P4Pn30Zjrqt4tUftZFn8XAYL3H7YJ3 +LV4RuxpDIB0Q4dOYb1fJYg7g34cKBdckuv5Pt21EXE2vNaUIbo8FeTBWoXJ1peiyPSuivwzd+QEs +hmAdEnN+aPYB3RGukH5mmZYJdq7/8TuTGRet8ToPsGs2mUQRtGubeuv4goepyyxrcJfGm/47yVvM +LI0ZAJSzIKAyVreTYwR4GALthLy3bOt0q+nsvkWPOgDlfwzUAn8OEajIaKfbaJi+xpXoy+yu2ICY +R2Djbyi0C6IvB4L6eLPDF+TdQjq3c/SWVFqIc21UDgAS/6GeBYlxMNoUZGIEy5hNqN2PMmu7DO+R +w5YfiQDHJdofT+jt4yUggLWhfhrrS+W3tJasdX2SsVquphy9sCc3oBL3yHLkGGow+IYlJBfh+zq6 +q+R4OrBT7OAJz894mlEXUtWiB/k5yUk0iFYZU9E3ykKHZ6kNWqmUfCZ4z4+iYsWdqsusvNkKxpvg +xN4VWeNT2FKNaYd9nWBX9L50rBjGbpvMpBrLkoG5lA0SeCHa05P2SFRg9fk87WpMJAiOBtw8vIM9 +sQ1pFJw26Wqy7oOc5sG1+2aeOVw/43WxvUYLKX7dVaCZRJsrGK5XGC3fO0DIeV3o7o7egOSHseQP +0E9u+JNEXEqDy1C5e3cTfB06IHKn+yB91Jsx3C2yBOcaM2Q8enJlEvRy/uWZ5AWaSy2qZjmenbqC +gKQKw1W9T/+RHhbkWTGpX7UT1n5CNkQFj8EgzWjl9neHbLFS+JqX+wPQQb3LkwhTHrimhsprStmt +91QmLKoYlbqay8LB7ydFiFd38lDRAFr3GfHCcFVn0p7cfjyj8W0dU9NWiajT1iimAiY9rHoiUdeV +QKBVjhLiv7QWFXl3LThimxOXA7xh3Ow5hG9s1fPGjMc8hWRzxtazpOukKftPY9Ce+GtytBSX2oTO +AEp3r70n9GQeopL87ZsVVIR4vsh3X1lIdIzt1D4zlihCOU5LKjpICoYUkKUkABNJDcNqXlHhzVa0 +WPt1WCJ4HpzwqQWFlcIANOIuKMgiJGuCHJG9g/uwW+QHUzM7O7mtz0rMPRC4JAbc/rKopg8xGjbv +hvWKBJ9oik1j1jvTTHkGGyE8t/r7NnsJL3hLia3MVlnIlSfiWyc6THQq2XaNW6aU+hnc7Lf9SA4A +2oWVvniIRkiLLLyis/L0JvadPbMrmZFUXlyvQyF8VR55JHoYXd55/EhQmqV/h/nRSFHqeBnhu5K4 +97abyiwVuQolvthi2xnymb8mbspnAJ0EQEdurtcS29KzhvcPef3Yiq9Kn2UW15W0TZfNcbqZdKBf +xC8NLtdCLfrKs6STTXQWS7FNpH81IRzafFbyeA1M8/141At0ts9MrpUxOcOeuYxzYZMCaybl48CC +wJ2ZvqDEbMfUSkR502fBehxKyoKuI4FwXz62c1uisCjOVDq4lHDgJxSwWKajBrhVHkFc6+XnnjJD +G8K61gp7jxMWIePbStlbIWk9aV4/lJhBmYlJPyGTBoS9WI7F0LFfuEH6A81sRLOUOgmyWjYN3arH +zF6f+O1TDh0ij+ByL5ddZllZ8cStqhDrqUfct8Kg3wnvUfiv8U1udGVRmUrr49dumrltLTMXJANj +DToEAMHo1subPkn4S8byz8NwrQKeYYExVDrl/vlI9e0YKFD2n5J3MZ43jXgePag15tyuq9SeftwX +MW5FBHqLMwheNABrJ+XyUfcuWz4ulcumyLzKHYZtdFx4Wd4nkMr2dhpvIeX8O2t9XE8RE6jOdXi+ +xI3NKjkBZFwvj0tgWOAriGj9xmlnWMlUUpDmc8en8cFCzU8+6d0tvxUpHv6dGzMxgmdTjtk/hiry +Us0x3ggK54NEwWnkaujqPoWxjWWk0fKxB06ozOKzmk+RMVDnZ+SGiB5roiYMPxhQ14mV94ni66hn +2Gw+Htnwyfe/S6rqjUn46/XxiDU8pggwRRvLF3O0ik0HqM/U9PQNNCVmCeBqiJysMHa+rvwuXr+f +bhqcELGt2HY6KGWWGetzBowigrgTdloqn8R6E6kpbsPx8mDxBfCqNzNOddePN4JDP9BYGo6Ocmeg +vu0GB5mUvF+cu1OKjn1/Zy6HOh23JXhHkOlCUxGyazmqRcQG6RKWAv1vX6LvTxjSOvr0o6FDJG18 +r6vKRph+UiG75B/usP27NFBQytYL1yqTU2NBYIOjRPBIKRFXee/OYC6/2597dsAAWfka7IBlP9Zh +gwx+Aw9u+f4bGfaqF1b3bQfXIftMoeCyfxdwCReKiCSW1RUBlfXHOk4UiFx+Yd+b9U6nlZ1E51+W +5Y0Y//4MNKIOkp0LOW1VNesrVeKeJGQQvyh7oMGrUQnL7GX7r2bZ3kGZB4TbWY0y75UFneJSMIzE +kANLP/K+KR27cwJIKrIsyFJpGRnjlIfhehZVmZnHZ+GUUn1sA/DeWeaQz7Xdwf+6evYs4/piwdRq +869nTIaZ4Wkw9D1TOimf+bdK7rL60i1L76DKQo7GyFr0ZnXIHhVevHewU/3masTwJqDLJFru0/nj +SciLSmI8R4aGfK0BrJcsumJAu7UEWgWv1Ngk4O6dga34uAcaqCGOokz/dPXLUmBkU6f35gzTwAC5 +Bf0OR9nDW8uSD+eQhObHK7U5R584mXacfa9mgQQmwl+9JONz1qPRvZorxOSh0+cJHPNuFzlz9jk6 +m1GQ/bi29y4NCxrPyKA1wBVsskE9yzGhTFW1GS7z6+Bn7jPnik6ves0xAJeRhH/6/AA4XWQkymKS +HM2EZrQtHp1TV5Gyz1h9pgaJYeHFUzLSTBn1Mk/j6bvGsvAFyTXmAcZ4rPOFwgHzK5sGmqMC+Odi +uioGMzXCfse/wIC2flo1gQ8o45paGhMxNeZU1JX2AteqZS6aRefumiQMGuOb3YKWqY+987IhQtQO +wbG2hobGbGdAba8Hr4yVtSw5IyXkMdTgHtTCr6PD1iuxyPWBEyVf7aJK+adr7v1UvAOFOM+ae6Kg +gy3llIbGqbPkUhKMpEEJl7zK4zqDD17RiN7F3+1nPkn/c7JF8NL3ITnpPv2wVjWH7lmyJu/4E+Y4 +8nq0jPMI3c7QPZGDJsVg3nz5mT8SSb0tsIg6QFCglQtdqi2YPOozdjyq/F86ndgQ/acdhnMgnbdl +FDSv2eDPZMtEG5zWzb3+KpcYyc6xgsKJCTkUFSdf1qgQXn1LpcrjCOUm6ZVZG14Q/6+araeZ+R+7 +FSvKgyWAdh+82mmPqhVC//mCJk+/YDGHHaOcVorpb4oNxLLJyTkI14fn5KnYfj/Vey4XAolHvwt8 +iMENPORm85wOjMGu9o83VTr1ypr/psXemyCeiwfj7quRhi4VrFdr6A+TdOrLKbkNN+/6Tvsb7DT7 +oaIXmeCsWA4TnTeAJMwP7eDhh2eCyY13XoOVaM8qyL4xWqZnK5ykPmG62WoqlLpzjtEa+O17ojro +XZVtdF8uFZoZUT9P3RHCPFCuwE2CCVjt9OFCLvtNR4Rcktkx5wYYFhqTlkw8JfV5JujjA9o8I6wa +0jIhSbWFBNW8TKSxR0+pBq9DQuwgnyfB+GFcgFX7xUY6y4faCAFsNJj3pMWFlt3GQa+M2R7na4Lp +7+aNLhpWt4Obhaxdqda2JQz7kUqkkQuT4R6hbkovoToxpvaQF6A4Q3681tsNmhGIAa/jsw2AStwv +AtW4/Kv++Y8VeoypIrxKCmQHuoBOXOuyFWA/ORM+dr/46+G8GtA+2rgBxNqjNnaCnZuETDVuSFaF +1IftzSBVkPYnKvGYdBqJjiZbSh6zWPRLZbKEwx4fcWnK5fxbwpA+VCXaaOyfzwq8p/jGZFGejS8Z +PFeIqcGFR6KzkxkfPquzxDfXY7QSoaAOgddojleE2y1z5KlSsMn25TZrNtg1Slt68s8sQ6ckkvMu +r6AFzFFoaMXhNOeHUTbqnQlG7ppq68TFkoO6Zyi3sEc7JiPGSZzhsZrmtDKk6noimGvN/T2WyRE2 +xe0Uu9XQB0YdGLIe/G3HgwRycphXAGk3FHLRnPu3tkYOKmopvbm1ocFe9eRbcuylUrYCSpXArxPj +r1S2sZF0CMUCE/wHxUNFjnbJfuFERxshBLOdgWWjjH67wKoEq7/7knod0Sgnu9B4Q4VWAix/yz+9 +oq8R5deeMM9cXVxwYKu+FnfF9z7PvjWY7gMkovFQqE3b7ldIL2TDVOFfLIDjJ0zRL06g8SjR0rS/ +Bo4KVMX++fC+HYbqJ3rBLQ7ZDEIN8EzGRcpZkpjQTD1uUNGnbCT100d3xcEazK88ekuGK5dpDzis +/yRisoUhnyqw/+CtaNQI3xMlv0LksRJela6/Ez6XDIPI9tOxZ2Tc+dlUVXmzKMyDm7mSHYFPpv88 +a5mtXi69QxQs6fnpqk8zR3NiwKZjxbyKi1jC7fDjcFCed5QUYMgYyh2ZZfp3SJ3MH/1LZWJnew4V +mLBiR8EBE8F5lMggR79msCGdUvEV7aWdHQBVgeMKTEqME+o+Jr+a96HibBdOxJ/iHMVNsZEjW4rL +vP4bkPXPXZfZ6sWtv7zpjAE2tWZcVmlDB6ihvzvDblhol0gXqxEPTmJdwFK4zQ3FBP1wY1qllWBW +ydDzGg4HNMdj0IxnmAvu5GksjND5FvfcVF/06WOjjq6GsCuekzbQ4asJv4vraRldU1yKRg8KQWQ3 +lUnZ8hLwgacOeXCwrXAvnWWUDtRecnz+MB6aP4kqfBYnA/Dg9sCvI88NLTlqifQO4/xtzTRZVKIL +3ZRbxTE+25H1gHC2nYqRAUKCM4/oTO6tGDcr2A0OcnOXNl1xgHIGPe2OQNuaDit3wY5aJR0LKpR0 +pBFfOk7ixCsB+2VHWewJliom5fhhHplMJWUUbI+wsz7OPhshXlruO676h6zP2NYdHECggObDqCSR +PGtXhlu3ukyzrBiav4v/mlezApwSU2Abb2ootah7GvHbUtLZo6dD+W30gDVwbWOFbZo5bMCwMXuw +1f3jJaKCEcl37xfeWU3X25VwHxbnhnTvwHaed9GKqAT3+HAfeo4yb2PyVZe9LpQoHiXPcRk7jbP7 +b5UvjJUHJJCSdAvQxRKERGltyxkCHlHCNQiCofRbqwKcnAba0bjlEzfbp+NYrXKAhBr6BUer3UPg +/DwkVRi94jh8RcKgJsEJJXsQAZcsWh2jD1EUL8TyM9zr9ySvzVxY5cMakY4l/LrtXGWo32QS/38w +hETn9NKAwUMGYNbwtjxf/9BztxBA0Mfs7x5Yj+51U6iVI2xTqLyo4sJcrumVZfyRNLHtcv7WvbAg +lvv0xoQ3dJ1756RBufApwsz9mfRHaMjUAC+i/Kn6e+kjusL2+NxfKb5hPIp1iqryiv7H56h+CvyB +kvpL3EqFZdfoSFJ3/8vTZ7hwPLaJsZzzUeOvq5UPNBvztU9R/r0BQtDTtaa+bdp1bTuqEM297cmV +uZJh8vjOcby7uS3CI/UaKFC7rkd+ZrlrA+YNLgKXl72atqkYN+x9TDXS7u7aTPya231uKBR9qAj2 +qEaJ+mTzBehMYq1E95soA9rUmzJiFSQy09CG822eoU2FiR7ZDW9Xbyar6Va1+5JOTdB1ElhCgs2U +lsUxJNTLkFWZ20I4nX33YFrsoOeGBCvy+hvaKrtRBtl/0SPyckBJoUz1rbMRlVyPR5ULHp9xp2g9 +4wYJ3q1BqF3Jy9cdrZsNtcd8zNJHDS43TxVUq7rbDTA9ophXh5TBioAdpkaJUp71QKwj6y+qKaki +l4lrDXHBCSwJeJgsIL+20tbu79YnIXOCNqWbE0SOXT29kxH52HiswHYnd4jne75AuIk9NqhoxVxn +/LpFWIbiv43cO9oq+hfIOvMTCEuXTVuW1409Pt7uLVncwGdrLeSztp/TPWmLK8wrW5pSAuut5eW/ +SLV3DSdHiF8TZZgsut1KPPmmv1ptIblay+5Wx2PBBkAxVrNcPJkbWeY6Kg7LUhGuK/lAkzzS1Mxi +cAnF/x2JJ72sDBbwrQDB5EVQYSYyOOghRyTq/hIttl3FCWEAGUuGNoVnl4FGoSTvzzp4sHRKV4g7 +Df6AYGSTCy4TxHg8vMYlGDiUO9zly5ptqKpZgTS1dne8BDz1oY2j5wyLOFuRgG5BasNgZetpb0V4 +LW0kV4oU4jQZvymnJjcaqsEJlFl09XWyXD7cabaYToUpBbquhpR3qUHqYZmvXaAthP7S535d4DrT +ZiND9DH8Un7S5LwW/2B349YQMnNjxnADIyxyJGwMuz3wfmDWyr1VJFvyMdXHVdsfzbL7IStWH/s8 +4/BM+gsUfgLnseSdWt3/M87tIetFP/c+Kxwk6clFwz6zj6EgVUpp2mXrh9MT1zNZTf6qNa+E9BCb +VbaImS93cjWw2XXHeELoE5L8uyt9JKn9ncfVcD0WUNvC69L2Ck6agcgvHHwRytvfRkAhufbWQssd +1p3gtJWjmDRjiuU22ZS2vGxQalkZpz8FWguuxSFMQX6jqZjPjDm4sURPnvJvYqPQqKGPaZRv+oYU +M4UTyJtzmVm736VKorBT8uIZcL7beyz/uFSREr6Ht2hMWHzWiwVyEv1j0F/KGs0NlXCJ0RQEElXo +38s5gaytDRIkLJYN2MIzPCIvH57vHQs+Hr7dzqVNaw6djl8Gma/E8u2zCq3E+rp1YO6vrBXjyDhE +eQGujHYuPPz1Nunw+XvL3gJ9FDeKGGpLNuaBNRrjIajXudAhCVbvwc5JivsS8MvjGl0uDY6IUDI6 +H7hAI2Yqe+ozW7kuOKRFdhnuV0YasXq9e8Qzyu7EcS0BUW6WwOsjYbY5BqyXlJd62i2G+Tc7s6Ld +ax+r+pH9tNTP7fH/o1SZDan5V1Os55q41FVb/k1GSDK3F+qSUWMfmqtWRiO2UnkVHVvI/jNhNlXI +/YnAJxytd5CYtmvmd7aq+p4re0lDqt9nlL0ybuuKp5Hvrf+uEBPdxTUlShuWx6sFOhnyjecnSwe4 +JpSrKDjlkpxXwNObdns8GcIZLsDJMZ5TC3PrQ7ZTr4axpGO00VUeWey/crcOVGQi3hoKCQ4y9ujs +m26HAFCxUu17ynDacpPZCJWsjwf/8ItVqEvmd5zmglKZxcfL0S8bMEG0Wrt22zjFMVED67pRS+Bm +NBD3gmkqhbVBp+1vd4S4MkrlGu7l32HEcYsYYx/ZEhLCp42pGdl2x+AypUcPR2ce8hE/h+Q4wBbx +f/9ePn71TQ3zlcl4s6M/scsvV8gQZIco4IbsbdEL9Oi/ZazuIT+zyhhLvPrjAJa/6GjjwVO0FFyY ++6ckj35bBs2NaVZeswcfMxhRwvdrMlEy8I3Vzu7mdU7mkLul0PA1rVOdRgq5vQ5QOohd3igYFPFf +SPOHZ7E6WBe+aLVBp4YlA+kFW/lcWxfaPualQBjjHsVevXsF9HHAGWd3IYSrUxuzSk+jPgkTIPW5 +BeHiiiJ+p44C1CmmDKKv/AmOzAXXzmVzhYZ83veO18PhsNIGEkwbXF4WUcFa+MC2MmarJ9aYsixK +VviyOXB1cxZU3D8uhjK3OB5BKDs+QRvwONIau2pOhn0TtDAQyBjfBqoq2jmXSgMdl40tOyUz5oEl +VCSowLadAccR2xGYxiNTb03kwN1ZzmAZexjDIWn2e1oGTSeLTG3oOc4kga6d1S2fhwMpnjFuzO+j +Tq09SkIortsYmitd01ir7vbwcwAF4fww7TZx9817MTpJtynh2YrexpuH+oE5n4+EP/9WsJiQfKwk +loCceHIWl0gGHDEgjbkNstT2Eq7soCJAEQz0et6PL6divIjK9K2rD0ca8tzlsNsvbrrcKmstD9A/ +Nc5W0ahJPSwVNWt0iyT5dt/BZ6SuXHOEWP/QlcVtnrzP+ZFhW2bJMVPAuDHcsPqhTY7G3quHuW6j +xNJUU0pRL2ir9qZBgsR89vpf2iCi4bVVhR9M8EhpQH5jCj88OdjA0aQsd/Y3IVqURjcTI1RiDPci +0M3oL3IGf+2j6icSbbC2KBcUvULTFlzGq8guDQdFIj4IzC1UoIIlInkOVXIBU3C+xagqtnPTFisn +UJZEtDBOsjJ0aytmDxA7MlLBGDZ65n+VRYTIbr9FJLdXwpeqgq6OgYFzPI4LkcrGwCxGexO5svrh +KXVusBwMWpxZT2AFlQqVxA/dUqdeuM8e4LUjQgCGnrdPsxsVR/l8DmJajK4gWZ7cv2/vrJ+/kvJX +VsbjR4jR6Wi7SDXvP1FramQbf9Wb26w3pW0Xbl7fDjNdU/GocZ3HSOBfwMuF8CiP+Mf7lzuxl+nf +6yBRdo/nfhq9hRpDtrfLx2MLMIULPJPltPk/x6F+WDg49PcH3FE6HpFxjaZiVzUsIxyxsGhG58FT +XW2JUNGndPOdnYw8JSTF7iOVU71Vc3bzycnEyIV75hBMJnY12AvSlcTWPJrl/hGtswJiwXRAY/0Y +85xmzeP59nsUZR+8SNtfj8jTEmJNf+cnC8xL+IlHqVJ7esGbA/wMOUC6bVgZn1PiMJ+jyaiToIE6 +HE7tR0mbvxfipKdL4zLj0dqyw35DvzN8kE9+CSOHOdmzhyLG/onxrBTZ0v+YFzxiwbSyv74l+LTI +0m78m0magdK5atNEgtBj1LnPsI7hnTMXXZJnWem5WX/uoTiaWHAaD85GRrqhdazkgQmm+kuPiBaI +WHr8vvhp7/s8VOUpF2LhIoObnYJfKiC8d4h8OsbaTQ3sGMI7aJ3g0PD95IOfr+8iEwzZ0ZUfDuS4 +mtrZPzV7piyDic3WGOVsnhptEZANGJgBYRPEHlcAmXdXxzoFNIfUEfEW6sSKdlc+/xWrr3KOEDSO +olcv8g3vDq+YiTRT0ZWHevEmQwn7Pz8gC50SHm3jyAanvCeQ67diSbdk1dFNTC5PFgmnPFRI0nJ5 +0b3SAjpPsbEhrrAF/nKySOeggPJrRrh7TESo97YpwVhMpvQKqJhBPw0Zpe5DZ/LfRCaQaTmv8QII +aMA8BOSVQG3L7/bjekwkeoQJQLBT17XGz5G2nNr0vEf/s50wyMFicTSdwiNcak2+A5AotZcaf72g +at8bZIl8D6w6xz2eh6AFYHn3juE5xuDUF+/5DFVrNJj8oqQmggCnRVxGT2LDhC9UREwN/wvUde6w +86O0L5iecBhuh+imXteW6KS3aPH3GM2Tt9pRQ9lsfRz3kU/px6lY/5lBw57ucjbScAFVRYWFZ2La +TCz43BoiMTQrHcHAXsrDJVXWDmvWrEQftuiLrVx9YbkwzgosD2ge4r1t6Tydmfsi8/jUfANfHvv4 +9XiMtKOrUUCITnybS73p2fooyHxjFAIBUdHfH8auWkz+obeI7jA5eaXDKEEAQomJPDtVnq86JixU +4Rpz6I4NG02zh6JhXOO2KjrlRAa+Cgc4YmgVeYKXUBK8l05cifYMOtinIvXTs0uFQSEmjCKPHMuJ +XDPyxGv1onR14ZqvUOYClpqn3NDX7lrewVNF8hxh7xLG4+3fT9+91do5IbbOh2iy4dRlPXBLMNH2 +ykfp0XXaLlFES4jTHF6Vlbyl6aNHXg9a0J4niqex1WjOsbQlTvVELt94UpMPwE238D70eHD7uYvi +tPD+PqlUhc3EHpZ3Bq4ELvVmB7Td+9fAisDiEEQ6T/sJlclxiZj1Y1moSsQO2b8hLPYAewoX8eQN ++Cjjqgo6BDdz4atfYOiV0VMjnK8cu1RW5qe8duGruplfXdcxitRNIyVKGhmbZ83hToMHppTdfxBm +ZjC7fgDIQ2YIZrlir5BCwOgHy8Ob6KHJ6pTqTNuXQ9eKFkERUCcVA1XCyi35v16BN4SyH8XQNFsl +zj5ef2UHxRg+Q/HjpiKqO8wOTzLLBLT6HKdA0L/yyfSfhIshKMCX9biX7y3bjo69pqDbc9cneLaz +mbRxDJMJyT1+dgJKMGVTKspcKucWRyBuyD48L8b5QAM36TA/QyHJbbEgDrQL3q4EGz6B/mT08Sq2 +OCnhXMFTPmpztGiRlSGHmQlOALqBCbPsD2Mg7gk0ziL1LjowdFXXpQJcQMq0+0TpNx962ZvJh4Cc +06ZdjM9D0t4B3lbZe0EiCI26EE82rk+MzL+7ZtbEllfJWSwKQlbbeN6T2wZeAS0CqWQJwx7prUfB +TN4D2eH6CKr2bcb0JSMzH10RJWDz44sxmocdZ8v624jzge2vDZKEazcX+ecyUyyRDE7Qo9akCi9e +VsqVAr2tm6YTzRjhiHVrc4gHZFASZlQyoQyh7itjIAHmnczUQ+9KTBE1NYn0AX1xNLfu5I+xfsVh +J12SqmPTyN/mcs4D4LkS8eSLts0k+t1LY2SB7z5RLj8/qI0iowqVyDhpXbl6/xaSnm/Q+tZZoKAA +qIZC5HCRrAtaB3DphOP2mGDU7qmPpZ9w/kiRK2TFSxnA8fDCuB+Er/kc8nOoo99mMACts0sR4Th7 +F9lW33cYb7ZUnkrIHkyicgIzmhoDnupOUwDjjIfdLcBpqxdfXJkp59mK8bHB2LzOzBBCNGI2y4/r +209uEr/OteQE3Zmq5cGbHhl19GQjFemPX4hDjxnozau4iwWqk3kD7bXiefUuGDefFAlj3roJP8Sl +Pxi1aQgmLPQTq5+5tUm3KBRd93xQM15wjbNIKNWlSYTHKxJBAyZRspCyPYVw5c0hOK32Pkl3Pisy +Gz8K0vt5uET0pzrep5wX2YATpwIeL4SeNwC4VaCPVleO0E0XBWn96Q6FxWxPGTGpkX+15OdrOJoY +6uKVddtsJpkLiFFT8a0Wiio11O1Y8ojlXJq+5z2j3hmyUAo+whq6Niy82waxU549LyHptsYH5i4j +cHeBzAD9yP+hw/nxK9bJNPSdzj2AN0OQemlNJfw9mMdxIALOmZfb9G9BEw8H1GaRb0x75mGNQbVk +PIZZ05Mx8W013zCwQRJ2f14NVOz6xrgED/F9wN3ErKi6ReWdhat7cgZgpkvB/MteT2vl1NkuM7SO +cHsuERP0f4e4gVREX5yaNnAZv1h9tI49rVkjRBqqwvrIeh2QsgQ6DKQi+MRiX72B6l+qTusdpPeA +BpujVKaJ76tyEkk6K6HDwhG8txsC26lVyaZZmDrEHkVUOPMXB2nFvvhzGukT9l0v+l3IlylivU35 +NXMiAhlSH3XiW1R1j3lTUSWiB5Plcpkn4FjxYjMzlEw+d0nC2I/aFiiUJqplNosBkIFIdUDjEdVr +2vnPiBQzXd3AunudILboacKYN1DTjDLnHmBxfevX9Za/lwnq4kSjZ3Z1Lh9ci+254dhD5+hNNTSm +49W0T9iz9OvN/r9hvaBRsEmStmyWBBnI4QU1CeyT2FHJ2epmMUatZ0BEyFPv81wTMbX5KWzLFW1s +k+oeApf+Ktxl0rHHt4ExBBRj+D6hszLSmpALkgCGTcKqdAnEUKIPRrJRgJaECgizwMpXA3Ms5xcf +w/i1FapH+lskgukVoBICtRoZE0/m3oc6Skhttlc0W/r9m+YpZE+7amEgY6Ge4wUcIS7zWTdLhRXw +RlOEVeyEYCs1BchyW1WrkjCWkgnZ6fbbi/GX6Kyg3Iz+8JhVy00haJcOsYhoK4wOSAj7Q0O/Wr0E +Xyg6Bi3Vh9bFNDJyprY68sG+jfeZfRTzofGJAH9bezFRaMp/NnEWV4Bjuih6bGZd1xEKPlYSiGY1 +UZBHN/DPC8Pkec7fDaE/Z0T/YRZBXqfiALqWES7Nq6L7fGZEsBbMvXuWax0yVsoXb0maZ5cQ9Ndg +tm6GZh1KKHV3xES327aaSR7mpDYZpMpfhkm86EsVgn2BrYnmZgTBIbYqC5qXaNcEllgRvMHsatHm +HrXnlJTL7ocLnD4WCunL3MsSLp5pPPoMEAxPmGjUk5cIV9A8c55SLDLN9Ipuozm7JMUJDaYN/VZJ +W+qXEflw1z77tXVfeinaNkCNnDbWRKfgY7SFQ/uS8QnSB5I48vrvGCA47DWPL4fsNd4zpszXEWVy +vpEMu8EdjXW3EqS9brPHZ5Wa/PzlA/+RRTnsw8LCWAi+goscgRgCnZ5hTyFMQcVqwHKZ1zS4sFV3 +wCA9RxZ76Im/GsYsoQnGh2MPKyBLay9TPUmtPr+u0HdiHxWFgv1Zkax2DwGlfW4eXMeKST1i1lOR +9517CXTMcZlmL0fbyixYMv2dNdpsnfCZZWvD/Y2/4/keoglfmZga2G9nkKCla9vsfysCBqQDVWqG +GzJxePmPqeb50OA9p/fE37yGqps5bXdmrUrcyKytWX5mpWyZcVkq4Ioeo5/DzoyT9k7yXt5TTU+R +jMv9LcDCLhftMK40SCep9YsFlX07q9SEGZ3GqWEjiNk2sS+amrpglQNPqYYQYSkh6IvvYmMgz6Tb +9MRm1l7lVv36XR3AIGEHO7RU4NpnXxBCECeTiCeRUEtLWwv9nu06usvytjz0ip6WncIu5nJy73Ab +CLOfbSUh37CpXl4ENpkpYelZzRd2CZCZ7eQVMlRTcISg63jhhoSTlSbVXQnSiLXf97UxsJDYvTmY +jm1b0/+s5LaOovmIqfvPpf1bJZZ9D+dNop98qkEUvV21RbtHGQbi3O3vSOoOi/t9o2jvhgc816BD +wwtWyc/NcoaYY4bTvatE9uWRfeMAFdkMcZ20A/NrRSRxro72qYxnlonOY6v/kvGXCjoeklndaKsd +iZKqFXw3cNdj6lzdSi7tO2VXXyn3+G/pCjGQaRjkjJyqUo7Bl56Edb1nohEgn1isWmbBkkRDv9cW +H7P6JD36qtiDt8ZRKFK17foVQXVKUJVlIl2uzfgevGuv6+04zff8kr3zrvXXQ2UpgxkvuXSGFNGD +D41v0m+1U1Siwpxv10Xm96C3bBFHGxl299sG5hbMkdGJWDSNsFI+8GEGJj2G5FX6gCigdh4hqGDL +A4Kfg4ZXWlQ27M55bjSOwH8DLL7/48Dy6ZydHFKQvmWCmxli7NaC08yk/Bf26N1fiF8qPlk8bzhC +Xwf3eAsBDgYtgYMh2RPfSVE6GLN7QA0nP/CQiRka0AIzOh2JCMh2/rxmwSgGd5M5hiwRuWLXdRXm ++zkTLihoXfz0sSWI9RJYeOxf3PFrIomZOfoWLEpwpdegNsojdctuqmL3CNMqzBFtwIgI/QV9uZ9L +c84XV+zDBa9ru4Beo04E7oiZKJ0WxGBP4t+H5uVf8D1crE7oOL3CxVfwDXMGtoTwqHjENkZxRZML +ErxDRVOKhltz8cziDwWVdbtxCGwUPN8e1zG239AhUVS/DhaY0JNbj64rmRXee8qKN3Gd3lyiKe2e ++n3I7UsxMaQkFebNUmqrLRRTex6V09+tXYwM25Dg6IYD681vBjRAVmNE7+EGik0dXvP+ameRa3Af +V5h+S9DBvhnR7jTmqS7bS3vjmBvp7nex2rUDAjx3XZ3fc35QDqLQmO0ePj0nMR/4zm8yw9DUEzxo +GNAyrny0/tLPRjc6TD4rvuLPk31Zyuw+GEVrqNnBr9FBb4sdsoZIosuJedzyWkceuqqo/YGpDR0t +J4yHsizanudMzi9YmjsiU1WTsWD+XejPcr4ZQwAn22xwtoaugI4JohQJnmO5Kk8uG8I1TsQ+vP4E +Yk4zyCLFg6blEDdDFkZGhMZPCYCbmoBE5a8uWmxh7Zsmb25ryIxdH9X3g339CXy/8V6VqsFclte7 +auD9ff1XYIW01Q0X/uSZxE+OBzvw//oVsEhALgiAPvmg/tfUAICNwfTD9WWM7s9CnP8FEsIa+dRy +0BmUlMvOuT0JOmK9q+leFlYovW/ASfl41QD/MpJVF9wE0COKEhpRoEbQydG15xsE1iDuGUCMR+60 +FM0c+rUY0y8z6pwde5NJhqXFp8gJst+WGxRG1ZBA6RrdaIm1jUuHYDWN7vDRP5zIrE/au4Eb7IDj +k1puyPJ6TJIxb1gytyLWKqQ1qbBpD56ckgdUyb/pHXk/VwByozvBxjfVxqKgkhnhJAAsdfxT+q4f +ZD1FSXbNyMCpp7MM25/BqSfOxwDNeYQ3ZsxGWgyG/Hm40PC+TpH/jrC32iZevOAQkvm+oTlaIVCc +5CSftDQZFibjD1J1LxYhW840Z43+v8+UpOjfG2kAJKYaLKBimOGlPcueiCBIELcCLCp3QRlA5q/C +D3VBITbCj4ybYGtZQzVSD3b+TmuPxWjiDGeXRtwCYcTlZ/asWWs4nnvLJENnUoBrV6g/Khn3sP7+ +7phv+CKbIzSmOBGcSQtUqkaxezDZa75HPJ1XdyuVuenkEta4LnS9cL4LhLkpugtm0aQ2sowG/aBW +XR9Zsn0Gnlv21DQqgsofBwcgQ37BZXGjCEZfiD4prw1wIbnuotZgdYATUNB2ZI3Jz6z8MZOd0Fop +Fz0aHd5nrjctLvvBgkEub02brqpYQPeahYQPEa35qQwmbty4YgTDY/RMSG8EK6vPd2txMtnnK9eN +eUc4/Sc0pZIaqmOQ6LLsQugdpZxI23ipspFmMeocUdshGqZKFFQMYxmOf/64IO5cQgvNLboRmxLI +/1nFfXcE53/FRljNP775vbQbOSyVQUsuDHlPyzTKUeA3BKrpV648WsD5WbZOsOAsqXqKHhDkbnaC +3mjQG6mKdRPZmcQBLyEfel8GIdk+VULVCKpVD4A8XhzBRjiP1QAbuib/sw+mo6Cz3rXk84BC3rwe +FCPr9CXRXRQ+tZZfSGo6RUsNUi/3T41zvOhmWAHMiDStLlcD/bnahzuvgBt3v9afOJQrPr0bYWc/ +0LTax9nnjaGCLWcDg345h90a6O468e4PWHNTKjcjGRhQIUEUUBMSFeolMaE9Zi7D9biGUwX9ao5O +nk13fFbLn2DcB30G5mpdd12LFQA2A8skABWA/A5S0Uk33ogl4EyKMC49ckwqMGq+xuxsImZbfVHj +ZS2wd15gi4hiwNK6HqMM179Fw5ww+BJE48iIC7PRLliwkifxGky3glpPHmS3mIG3xO1533a0xyhu +H3pJyIQRlxNDEuEbqMMzytFOU/8Rtq2pNQqLvfNrppdlLdgEIthtHUdXYFgH/HLex9BTxa+zkYwj +Cr2Sa2Lb60PaLtyriLLmcjIMnkuTkL5ckJDpsGtHhLULMH36ceF05V5llurKWIFi55OxegzyrNnr +z0R0AK83kF5AQDIPWbUxLYv5dgAWXks3MjoDxFUm5b6+FRhw0Xx21fZY4Mqdk2HbEyM6lv1tbwZB +Zx5TMcym6QRzlcksK+Yl+aLxkAFEEm/PL8E0Ac/J8LE+PXRbz3L7ZwTQACsWzz4gpq8qSuDjGg3X +TZD6oAdVAx9nW9j96MJ6Vk2Y6KzRMlHSM3QcbM0kEMDyFyUkvTE+VIdcBfQKvpYfUTxPQgSZGQnh +Q6zO1RweWk9Dm6wRf1Wj45DEJ5EXeIlZGzr1gCRhjnhvXAzdSFrJp9Z9AHru2r2Lwy/UkpXrG/Z2 +/NDDGaB0DNeTPlDnJ7vkLnmkkpegykkglnLyhOx8QaiZUQLU0MewxIM4JBUUQv4VJH8RaUlH9c4W +0Wn/BUEswyimzUiGfr54ee8tft9xaimyji3FVxRn5y4XghmlQFtiWC173M8Ac/zS1Vpt6sf0LHmg +AG3X3gLtVsISTAmoU0GlpyDYpDtzTc5uRNSCN9/VA5o65zg5JN8UkOKVDBZxCF5K/idUN1JcFuj8 +Vreqmjt0DwHqIQjEqojNevMpvWqZxVV4jBVH/JHB/rM84iJW6oOLlAQnjccCWQrK8cNVecWjsZow +qXs8TPFUVPBBFrF9liyXHN/3fb46kBJYRsQkisq+7EWxBzB3gI8x39is5PlOflkzVE+Lbk65RxtE +H2f5qAV3i8MzTwCJTE3J0+vencZPT2/iLY1f7s3jGpssOh8CPuO2CDodUSxRtCo+jS5GZTDqlP4d +Od6MeAQnq7se2EJ6GOJmncqpg3sgqSwLsl32ZbvgD47zuzsYcb3ZVu7z+sw1aFCly4OvqX8xuo+c +gNClbsVVQb3l1Rz7ph3WIY+g0ZdzM3ZZjZWfBv/QWoxofqU3/vzmiZT4i/HGNoVWaPHHpzAC7bim +btManCxadfJtPKX/Z0J5lzc66HjMWdEVhVeACbgqRNx5yxvgMdrU59YFjeLQyLFDFvIYBIzO8/sF +r323+jYt/HFygqbfnSiDxCYsXfO8y7RF4Fo22ewfsGGy8+3Mv3WstIyJKvcfOleu14XXkz8Y2dgK +NRWIHTMaFUYb13gPQEsvVInLFLwxbzMlP/EJaCXg7lKd/PCkHOJjz3P0BeS6LKxc/onHrVRnvi9T +hmixYjaw8MkJxNMIIMJ3P+x1XAUb/3NVhUiiEpRvluVpshn7BbQogqblNJ3hchDWhsF1NxEg/9At +FOqT24oX/zfKDXrq31aXT45Ee58MxzhpQ2gTa4di4utDdVaqidtJQFk8+H3G+mdmZHhu8vI/RrA4 +QOI/FUJLGERFtoBUdVuoS/IvMUh5mLkj7s1FmLrmg7w1xQt7W+U+2IKJyhTStYqUuEt86Yex1q6i +nlTHhvPYsr4bGXwQeJAb5PUqCWz7qxBO4YsNF7NNWtQa7C8aw7R6zLkW/pMBqZ8+uweP1g1CjNdy +Da3060vOsumkU5PQ/qQDNKyegsiTz8xilLFRhmBcFThfVd2/rt3vloYnytkHT8o0o+usA948WN5V +mot8bGYde3M21PiUVlZ990T/9wpytN83nRBZiJqqflvvF0mNhTG/OMKmZ+tjTeHCgF5TTlrzkA33 +aahGCh8oUOcdIDSAtRVQoJAB4fKn92uC0EoE5HVeqIlqZsteu7/c0c0TA8sfsKa+j4u2ikh/WBMn +DP2Lt1nhc5hQSOnaqNcQqVbq8gSoN49AwQuM2qtlzCqCKnoFTgAPZkWrAyGoqz4GP3tCMDpUS2B2 +9l/Z6Epjqwj5teS754VSibXAdW4yyzE2bIgUH90YMk0Wpk8yjFDfF22toBw7p6rDmLUMfdtGHwbW +Al2IZ+LvJ5xNtG/vQgf4OsgMD2A1rcT1mTBDL9hL3FdWmFH5n8sH8dPI9WicsVHXpHotQyrKdJ8m +IW8J6rJXdbR7OrMTg8bmLOafSZZHxnXGcRp5icgW3li7qTwiEK2Pz/SVt7kD7R0LuOc4XSv9WhZc +anf5arcz8XItg6RnNKnTJGOo3pR0rMskR9BmNYA7CmXWmNrCAoP031SBiCK9Qt/IpmUxRcRoM8rV +WoHvTNBHDMKqjRpPTYAMcRljH0+fUA12nCoNVYjEePFZ8vi0tz64VR8H0XwaUTo6ie7nfeXFZ74N +UiLZQGof66dh4YtE9MSzioT4+qsSr/JU0ABM2rb7QVf9xxxqHi2Ga4mokfq7urkbJxB8ly49Wcqq +7bQBN4AEM+FB4nHT5MO1upFWK0hxfJeZ6vx+ey1/nhWkqc9au04t/LEdbaFRO0s0rT79Mj44zsbi +CjlgChxo+xCrVMNRUn5sl9o3rz0QP190wp2+NALYBcFY+nf7kRQPt7dpitwKzUdKK3tcxd+mrXwp +EviAp5S6SYwY6f4MdG+hfIssqExYpdn5jrz3Ri9aS2KPYaogCiDNRQwi8eLoZEYaac37s1GssXeI +OL7/aAyTnfFXnlTC5mBSkzPqfJJeIboAKH4yDSH6LBsZ9heQTAV52UO2FJdg7Zq81YL0T1c+D+in +2iKi5R5PcTsSjtQk25HG78SMsdv1i4EYO0LwDjrfQX+z1scj0oagUuvktCDrjeo5QlSrfnowAMwC +NABIcJkPZUhrmrXPkk/4QcEf64AimHR19+se3BybEqTFFdV9+F2PfZWplCqRyhDHGaNFL0XxlLre +B/OTL5RF3YecjdoZYkbsMJx6Q+IcPXXA+6v/O7jKC+yVQU6UnsLHMo4OfVlGgN4zhWdZsp9ZokBf +74NWOIicwfPgO5vGW+88x1Sh7ofHAD0mCM4vwqufc5jkqbdPPjHwqtlYk2eqxQ9uuNmMxyUrNyVU +V1fzdP8dtC8xxis4R5Dnkt8LMfVQa72y7xQBc9dsO1oc/RORNsSgIThV8qcr6K9ynBcQvJjgkWJH +dfmXQdi8xUpfxYYndxu6i4hWp+gA60O+V2Y6ML+Mz39rpk0j9rXwndd2FrNsbb/U95S++cp2vYHg +7m7Of6Obs2VxxCGY7/aPl5gnnlBn64akA2Pq2c3sB0cR7ww3UHkFqAr1PotMBpJrBtz86vj9ldZ8 +KVtKaZWPqTL3hZ/VIX3sO5teP0NwU2mE7TuOkTxEjUOu07z3xDhDMSY1WbVx0Av6gBc34/lLI0Yw +MkEZ9VSnMc7xNaoAWbF46vQ6dm832Tn/78KLLw2ao3wCQ55XS3ygMlceN+cfrQ1eR/lKl9b+4sNS +B20pHjgc9RujJQcP9eAKNTA3pQRz7jytpZqTxq0maoz58KurAGpx7CVb1vUalrlVXpcYfkxU56vT +RxDceJ718WyVoLZCn8a0H4vug2k6b5nyZptBOb2gYmrFLWLDXEEkG70bokDO+bDvr1yl40lkdV5E +hvXWTGsvd7c/VaT0fQ9PY+RIDMgH5m0JehnM3RbIZdxpoqy+xU7HAdRu1acH213YbrMUBpnSTokW +Zv8H0mN5OPB6lzQppUmUyEo1QXq9uK0BaNWVCjV6SaQ+nbcJlbk2hIzsnqgV7ISy8X+pS8HFE2Su +XNp4vs0HZQjY4uitWFFgcm/5g0qBsShSWXWPoNEGTulg1pla8o9b+kk51J3305+ddy1cEh/t8Ft/ +v9S+FX0NW6n7/pzp0BTfl/EKRLhSCyBO6zxUxP0IJw/ezeiBGoKoo3uIvW1dweNDz7/e4j/nDr5x +Dz1fJjmBteAwLwIzdEZhznF77CN7M+msiqDb6YCEbzWAH3chW2jKyQbHLSpkH1bIV1yVMtn1JZY/ +ZH04nzGGd086S1fEQ6sNndHHWIOMuJ2ficcPzA9BfJXgWOJ90b+fhxyy3D6woQTedPDZoJjK+LcA +A8rIb1Q8/5TXx8Dh7boeX8HTJOp2dmv7p0bUbZH8PpraGST8o8jEhYvSDIzlwq4pwyms5K81SLxG +iU2bBDKovZ8MfkbX3raDEClJsjqnXMKI+aLLUBW6/skYi5zUXtQ6Md+MNiap799x64/xcKeOV0jV +8yH6SzpwxsA3HdKDr6kzVyrRRROo6hJ0KQIG9xitAErc3lQyHNXTYWfluFaUe/LsuCpwyS5tgCin +MV2SB26F+a9NW/71B4kTTLEwbn1z51LrVJfcJsF4U4mm6Tf0tIavR8XoQp4cKHdyfj7E09yqvYnF ++dG0+gKRUq4crl6VX990mjgKrJBG87cgASpxAdJwK2ZUpbYPfDEFst/YbVhjesnzBBtMiC3og6pe +Tua6Yb770qLUdYppqkIwfaehG5H1Xh9KzNoYPmNLSgRNdC/Ybgkvqv9/CPwM8pt8DumVDwcKyFS5 +OnWBFpYbTCnECWYzE3gwY8qJDz5HJqOA3MZoeJQi6tlwClT+6d+hSrTn9Gflxp5kvMNp/MsW95/n +IxvpGFvCcWdPL7dAhZKmidgsR2TBqZPk2H0WC69idC4It5oYcG9hLmgPe7gyhWI3xESNGBgXf33D +Mt7UiQ4N1NW0puSW3WqD6iySICi4WZmaDiWKpggTc+UwAA76pRKK9x8QHdnO98ugox/dEWre4BUL +JY3+ApimXmxcRMZHs9mdFX8MTO0uO1vZwE0O8hXq2M+CVqh/qSCuXXefZFHwhm4WTf5MbrovWSCE +Smo+uF4fb2wMB0D9VVMPZMfQrW2L1Gh5BjmdeQKvhQqTNNjORiWl0gcl+0JDawGEDE6Axw3ddREn +hnzPPLqbR4UmwGWtq/W6Xos+T/ASmCB1C3wA1gkAOXoWZUDi1t/tcUMifZckSvBlJF/JBn0HFI2L +LyS5AnW6wppiLQzuctcpgZ1BnJ7gIka2O+YW6kyrm7g3ONt91ipdR5vdhAEoIRQWgpkGFJvlTeC8 +vnPblJX/rTS2+wH7ST+SCa47O1GcK7FeWLstzRYllNGYB/2uYY8Mu2VRHKDYuczppscniIUaGxYS +jF5DfNzPrMpyQfizbEQm0TQhUHlUnHGmFct6UL5MeN4sKq2GCGGDpQkDO+RgC5Hc4NYwJEGhoFLP +VkKnCUN6FCnL5xo17KDc2XQKW/FjKK20DMOYQFGhJyMZ+vOwB+YjONPxVuDNe/GpOBScYlpaScjI +yx21G+vmyqDGbVJ4ZqbuQRbV7VCd/a29T6xiDRHiz0FqhkyxYc6YxPHYZnWKmmlepHvcTCbXMAZ5 +LjQrCrR2Br9CqvrwgbsCTpaoMnDMa8nLK7+3PI2/GNM56mU1UuvStqBV9i4pyBgO1L8KgO2atXBo +oNbvt67O8ZJRm0YSZwEhTFz0jxAm46UM2ty8Fkp9PK6xsZKn2XBiT0YkB72cTmfnz6jdNGhuD3Q5 +mOwTiN+Ujl+jit7+pMXZXFfQ9IfB8sJmOLgR+IjXWkpeIORYelDk3aeSK/6UVYyykS0RWAMWlttr +Eqps8ZJ3osJgnbFNPL7tmwSyTxBxzSNOJN7st6WmmJOU8xYr+gLluG6NE4xVwYN5eCq6lETTH3XI +v8OomVl64pyaKcSCzIlNYKbs36xaQfPFcVxZ2oNe11nzc0tUe6Z2bBxTXUaHeePwDcHhiSdtoslB +Gs1d7F0bA+gtuaUu+V0Udn9oxDug2ecq7Ra68s/7tVTpUB6decDwSU1qSW8ewRnRCfmjeZAoUE1Q +NyFV01N3wNcorbQ2o3C5zrigwoSKxY8wWS55i9cPlKFpYQes3qSAyTxlJsoMVfB7xSK4f4Op/qJa +Imz+jNCD+RAgeBHFi5t62rgSGuBCG5rB9Qb4dyMLawZzmbUyKubZXZbYX0eKkkP3bIgz39R+JI7v +re/JSjZEA5Gha0mKIy33nISsLlxPBBW/pcyRRdOZRYKUR34CpqQDSqEsI8hnTpIcSvNSo4/Fbumo +aC5QY70FKowXr1vY3B27i4lBbt6rymXyUknrfrypfIZtyEZGuFKx646XYGOlJqsan+Unwbb1V9RA +4zcjh9W02Wn7FYVxveWT76k/wIujJ7n7pjUxQGCwKcLovV/E1JtZqRG47Z/aeOxPiESYRfZ5U+/j +zQ3nTtFWgb/giHa+GS6f0W9LUikVOUyfin2hpZyYdIhENE8JIDOSAXAySk6/ClfQX1wbbcot19G0 +Qjw261EPAfVxXMN8S6zfExpD+WFr6S/RdrDr0dXlb4evplt75FIoEL4DnWrPKlJHpqdFrlZJsuyF +cIOM6WrJ9Vw4rvgrK1p7xCLEIDLQfKSRAqWZIXWsoFESMkwLKHhaIm6C4lrZBCSwkk15Ll8JWZ2i +YWZ9oiLcaAWVbWfPS0daOe6W2S2Z0TL9ML2zBR3z8eGy4r4OI92OslY5fwukUB6fcCYxDMaQhO35 +32H3Ot2oRq/Rg36eQS9iQMlRpEzCy+sdqcJfDW1qSnK1nNEOw34TpjxSkc5nLG92n01L347qrtfI +uc+qv25b6kv/CDMFIwst5qgn1Tg3I6urskDf/KLp6LswaEQ3omHKlGCRztnM+zBK1m4gVcpUwTEA +f6NaePYfYf2OleeMT1Ar8DHcjgVuc5T8yun2QrvqP2x3IIBWvlz3vYsaZ8n+3jEJOdUyhCWmTIAe +t5BWMlLG8fu3fTdnu0P/c3LDAzM5u7r7/664NScRxeI5/OS3NxmPd7unND65k1dUSLGAgQwanF6t +vLCCMKeSkxKHo6P4epkUmXfA+3kBtyQ1JdBsWEDQ8KayZ3fWkkrLG/mzujOCpoDa+HWnPQtIbwkx +d9rBJP9GNN+NGWkxr+vE8raRV2Rg5lyKIfWMXDfO7lQaR5xvWFBEnLcSdl2NU0ITaDbccSnniypC +sTOKSPr13RttTyQS64IHyCGdEUKBCdbdwOSBz/DiL7pQ1xEWbDvGVwv9cIodEH5fPlkwKnO7DQFQ +eXs74xKQkXdCV6HRsMGdmp1GGDd3rhNQv5N42kWpE2kklPUz7SfXbLrZvUsBoSGeQ9LqAaIVDkWS +uY5Jbodf/C3+sUKUD6cKf+Zb8XlwXwM2JKQfqTwBMb3Y1b3KhpskG3eUsnpv22SwtsDMLzwjJMcG +nvwLZaPSlDRnN58518TYHnUxvR4rPQ/bslmqMGA5tqBHQRjrrm2OWLgyq2GiL8Krx8HxdMckgwCs +m4x1USSxmpehfzri32PlsZP6IbGqPLpo96IYrmWjgVyhfnQC6L8G+U7aAGoUQ3P8SEi0jP4YIjlP +w7nJ9xV4VRMVf7Mesx/qwlgroBYFv30APtjsFTYWaZ7kr7rllzPKtE5cS/U4QWc1IyK+FLtJfIgy +0fz1uJ//ykKZb0WXSOE9xR8dI1ZItJBWRwYJDFh+SUJ3/KqHkhUN6FuFxo4B9JUAtMQoxlf5+skv +lz6qxtJY5UmXa7gT2YcadVbNEiJrOdVvM/9pwj7BJpNEuokiflBTMAwsnVSj5Ip8lpNAtbPcwxz3 +UY2CDqHaD6rimz2J05HbX0g1/VkGY9VMyNrcYap6R+Jm58v0HeY0j/Va93TK+vSeqHvriRMlVyhs +/H1HXhY4EdwglvUK+k78BR9nZYGSiY6uZxtrkM9GwFyJMTNFlE0+M6gZFUm5mMSTlC6Q5IPzBIn2 +1TZSOaKVDgO/ee/a+PxMJwvtG7aDWV1LwD91zBAwkOnvDGnYvkur+OZjhjeODUmhOBQyd6xZVs01 +pVxt9yIEewLseEc1AOoD9+sLb7hD1auh1cYKnr1U6eC0UzVUY3C80Xaq1zIvCDqKVi5YGaFB9uU5 +tBGIfcdBHQqA4zMd2Y6rakAuyvhfuPYsjct4ZRDMU9r6ANIJFxFnILlefGi2oj2wg3ZiznuDjsVz +cuumi3k9iR/ceDrBuoWFcLTuErfTGTxRWsok1NOpsRm9dnrTiG8Ht2gki2zBA3fuOxdOPJtA5VAV +PScWxJOO6d27cf3aefrbggBzz1bHz+yhE16gVPlJb0zFhdygKomYeUJ9Fmjtlbll2qjkkFDPRCFM +iNl0X5oG0PHwiFQH5DTOa85r3C1iNd3u8arTtIw2JS3INMm/eXl4Ln+ol4GsJHEk8vmwfIb1oKIE +1ySCqkSeMdS+g93grHCnmMpbpwQG+KZHfhdisz+L5Q0jMK9bVO8f9Rc3DeyMowSiLJ7IivdQTdw2 +psmE0pVizozJbaH9wh3v/8YEnRPXujiwO3Xz0vGoPSsVYn0In+K7fL4ewwMaWrwYsKCEMeclY+Z1 +iTWJdpNCd0LqoncYIQrNVTCcKxO6ZIG6SwtdLEDPaR8L7M3UEkag+XmVwm9tBO3Kdfy2Gws2nIll +IjXjS0mp/eMqKWx7nfoGsE00BLrQYmtb9evjYsi3VRfqnedtE6843qOFf7+KHSZ4bIYDFWt9qSPN +eOb1SswD2hOunEauPW7KjwOSJQs/sVcTjvlH9l7WchJsvtK7Fg4hGoQjjGIavdtrbven9GJ5c37V +m89FC5rlxwSSgyigNhAKMytWsieADMAeDWSUK0vMhFSN/W+yedngUwgUFvYLNY8Q0UM2U7CzXBh3 +N5L0aCzLsvnrs9qHIEsxv+23coYmty+r2YE+I1jK8KCwUQxh1pwNjbYvAA5EQvCcO9qt6OHlXlnG +5oAqqFpIaBPgNAGYSMUltUux4CMMy4+W5/FlpWa4RnvDigJY7F0PrThdv9cyk9wlA56+3pz8QFqa +vA8QTgJiLD0ic5qHD5IBzXhnXuMxn6Ut40VXPUNWqi2o5BlVp7Vk/JceSWkEHSAgiTXIfscnHB8j +LBIKL9ldeKMYXQdo41RfnKj1z1xBRtUI+A8hTl4j/JrvHRHzcEdLESj4X3pzhYZU8dCwZKkVe8U5 +mu+mj4Lb1i1il0maUV0FsOX3zBWwx/IVQIH4TYxx03uWS92GRVPPQBPnC8BWn6r7pyMvySoQET7F +eoyHBikLIU4rfWlLkrIja7MIB41tzgaiZeZih5BVL9xD24HsBdP6jed8eaCLJeIYtqMPahHRSplY +7Mq6buZJZAF2CNJj6aQF9z06z1Cim+cechvMbicL1WX5J/ZkS+r3+zUezKIw40l+cync69Jrd2nE +tpB4Pcc7pz1DTDgXtlGdtmCD3OWbMTODoL3wuixNUi7+ysh6jh4J8YryYSotAtjNWM5hIHEww+Pe +asgy38AVdZCbWi7VEilaOGeJBeO5uVToQaf0mMJchlnfIdGOQ8SjTDEKZEw5p/imGbOAiUFvnJ0R +hF1D6MymgleN4SdLtADsm63AQjfQOgGgBPfFTcbBcyiLBuwRNwD2CWWpxmqaHicpAktgMN1HlisV +7EgB3FFJTgFu0DVyCdXRYCMA58doTozCviXQFOjradVjnzr9yqtKDh1qOw0AW/qoHe5YR/2/EaXu +DnH1+VbXSLhoIKcHJJqqJt66fjJpTW1CRSZTb1AHWjA8l9ubF0SE0rexQgdkC15uUqMgzPV7ExiU +VJrwAB7ldmwYHgAt97mFORz1VCAcMsYweqfIar9ncawvLvdLvWuk2phHkCw2TJzs/q9/7XaZFaaL +1+3AD16egXJFKF+PrsawozvRisCAfMXyYCSMmTdfqAaJupnLNpWtIvlMd8JBN8pOWVB9zHAgM4yx +FlIYrO7Li9SKsEjjgQyeXVn0cij1XV3NTQNb94zxNmCvwE6ENFaG23z38X71PDSKNiUPpIkp1iPG +K45BNaSnerDpD/Ts42bOFRJPtQw5zaxzTsm/hBqEJtWvw7MP8H6SFEGeOGAx85oKMpUozSBeGnXC +TlNPmXxYgJD0Yy1QsN5E0gd4dpfk7h79NlJrdpWsi1leEESFDLa3NAHGbmc1ShBtuGCZC+1BUq1t +zDtaz3DiXTvY0Bky4T+c2a90Y3sfzmvTjITzTbo9DlRoNv3gw97GvcB6cMzBLSG8J7p3wtggrpa4 +R8P5QKdh/d2KhKOxAHCmrdt4L6Jp0nWEn0eqJp6HC91zFgYYXoz2GNNdDFLasOzzfs32VRQa1VsD +6xK1vrS16IWYyOim6PS5cHmjPdQ01L4X79WH5aHp45Xy9iYTwpwkXxRY+d8YyqVdAEZKiAZxThDa +omyvgy3iK6+9i5YeWskGZBs0NuIQUd8ud8NWqn5WV+9zh2kSPAWNH0hLZvJ1jl8K7iSuRDg/Fann +Tu2rtTiBgg5dsYKa3rCZnIkhhItwMXI4xPF81mgxwQgzLl3Xkjn/X2XJ94ygfqF0A8weEhd5SZHV +oeExTTrTBI+yjAxSLTIHY7iF3IM+tnjHNMzjFPs4r5n0XKEqh3Ul7bJzQlk052FDJSdo1ofvn4aj +6F6smbWKlmPU1JXyDq6q7q7UkeGqL62Xny3kO7oeU2W0WJzYleAeM1bW9vYPtLz9b/7s35cc0/Tx +5yTpDwi8SlC0ueOwFg2iAYFNg78pPIzot2YjMPWi3xhQ57wcrzqtmDIS9Bq2HJIyZzc3o9IU72Ns +F+M9rSyQhAq5pMUEf4U6BEY80V8YhNhfkoaY/RFUALJapc7JuXlwvH98n4QJrkBcWMBDsQTZ8cmU +5svcnlx7Ry+aj+yfIP4Cem+9+mF5p9FjtgMQaO2hN0mWmOd0YzSGQAGNOh/3tGXm/MNCch6Dq8RX +PnN3FRXmZFblfaZ9Iu7uhO4LbTqBUdfKneVcseAtWK5++BGi/CcFjYGJClIeQ+R0NWOwIMOc5sTC +fMnRXSRRRPjghwHzAygIV+R2GF6tSUANrTDfANfErB02LiD77vosJQWrazzAaMfCZJiIMTE60i7O +IWFgo5Xd91R7WyVG6wcX9V+4/xLfNqjrC8urhhY9UGOJZm+2SRO3L9nXcQexST6sV7ucrEEZqnQk +13dCVroilemonJCLWZ6qnVIHItL8dZ2V4ET3TiSrjZUs6M8K4FyAEEKpl11mufivxyLh6oKJu8I3 +t60kP77gMLjitDQDINWyCD0Ccb5VYZBTCyx1FseZlgeD7iAsocBrTpOXmQEiflQ9YrA+oYo9G5NC +RNzChrybGnXE4tkX6++Z701c3kUkV3Ak4p7i6FmKQ3VihxdGg3rcyucO1rYBahSJoGCMb9uwtabd +Z7iXq3NX8ZVoEQHVJ8fyxLemvWSaHKzDXmQNIVL5eNbpMba0aNSvWa7ebBrIkeBohCPmnDyqFZRo +OMV+09IV7jRx0kGQqCKGId/TWP+xgx8UpDFWFdD+zgso1iFpvMfx8dxQsxbCyvGcje0vNr+0uZe0 +UtzQ69gl+PYMYVzHmvFYOftrOOiMUEffGToX6Q8qkXR6O6QNgR0vhlzpU06KWNZoILUQ1RQY0LQm +mAy5+7R0rmWsmf4taMEYpeyOr9vDUyR+cZ++8xZUgMk6Mp0rH7qX7gHQmFCPLejF5q6YbcT39+Zo +IPcSqPwhhUX1wFk80CZWQ2tygcr9+zeQdk6v4Na9XTh9b7r+Nl6lJ5iGLHD7VhdTd+MrgAAK5i+P +rmNUsaFf64KGCvhav+F/VOT8pnY3f99ohMWDPBMYxJzY8vdtuN44kkpp+oIExqBuCWXCgrAPR8SY +6mASt4WbClUBUmmhHAu6Ga4H1cu0QkpbQW/avEHUhQLxU8t6THCnL7ARJb0IzuMQVjRVcRLlBfs4 +X/8nMr2AEJIUBku9IpyxVmrjfoA26E07nbyQ1UIsMrkp21eYEDygjTjS+LJEfkvBuK/i10+kd05C +8FQRvZrZZzcg2OfccDZEQyjCUN62KmDdlMp0mmbRdB1tUAQuyFNTPPS9IlgDN3tSWRaf2+m4Eoll +Z8l39gxVOP8N1Zjgw23fXEAFPMxucUiQzIvTvNgZuLW7Kl2n/36kdteTAd3ZrGNaaWpETsDLkyK4 +sTKyVIhkh4xgJdeLC+KDjiUw9nXiZtpyI8PeYBsSFfEixAftWv2B0pR1tfgavhjUnk094t8VJkLT +RMKuIyryLxKRGCb5nD0MHOc6vHFMbgn4h1V6XjiyV+3NZqYE7T39jVepmdgWuqkuBrmfiFVS3xPU +ye8g8vxmQLa2t0oRfzE1s46vH7LzUamNioi9vrxUte5D4YULG+Bw494E64zWZF9sCMQPGYO5AQeO +GBhiRfwXGaIqf2/FNesFZjIJbrsI0kwVxXrgOY6doY9QVPLZ6yBtZzXXRFAfU5gfZ6DtXBh9YJE0 +m94kvjYzvFm30TdbGHCGcoTE8LXjn4QUtbmApI8r8JrEXVBqv9FAlPTCGytqk/8y8AS0nfk2SVm4 +TJxqs2equUxDI/Mw4x+4gk1V4vAFzEYWTzbeghFerRfFit3+KqCCwTvlRVDL0N+vy6fkYAobXPQW +CUkiEaHI7kDpggMG82XKzfuuNOB8gA6lXE12XGlFyjGDsUc822gqVWNuiTsl1qhGVOT5XB5VfewD +/ms1pUnStF3MfNX/shBC+6mzvXP3tUAoxaE8OTZCg8TmNoukplZn4GDlNxXWCUDYvWrUaZphrz1u +XiRprgxF0DT+1pqum3Cm5gysZS+iSk2UCzX1eShBA9HuHsFUnDndAAZDOi6IamfrXOZ6OJRg/8En +GS7yzLuMbBQuBqCmFU9Zbfb14J4MMtkdA9z9Ua31PFBYtSDDqnNvZ4uKemNlLlka9rarGDlhypoM +g3b3USLx4A2fo071JGgb7joA8wMAjSYlKwH8ahHvz7BQhwH29I6hC9OUkmXetrgx3Zpy8R2aKEAK +ZWNDU0lU1O+SHn3xZQf5i4K8ARKEcRaXZWVyQJbFuDzIGtZ6WXOvgO/sjCX0A5cf21bHp/lHpzGj +eRx+SqhQdzIXDLDVpivvwxHMtFufby74I4lWBjGncxh87LKYQXSrG7hJ2FvRRP/dsKkj7tiZ5day +E3BCRlZYtRKS9gXiMjNGdin9tH/p3PWw/OX87r2HvAjnf8dkCiVMyOEDbv9XmMJoocqYiD1+suFT +UG3sB8bd/pRyD/g7BrD6gPUgYecqgQ8GhWDtpGyLx3SP5q8cSVzPNbQ2Q8QkSDT4oALXkMA1CIrF +Wj20gwxZWAJz0NqiCjel5YUJZK775ta8UwWjUh6rbB4jjrYEzRJ5fFteeo+pqLPGQ+rJKAxC4EYW +Nu3i16Bw7z1QwN1N73F8RU8+8h95nVl+AIgKMPciL7U9txsLSIT9sB1VrFPzUU/xznsRZZc9clZ+ +SW6wkKeeMrnDV4zYsis4ApwIP3bnrWw1crJVmpwuSjxjxXf8X7Qntg6ZSKSOvnw1PBA4yYtNLLaM +CQvQQ6wzhfv810AqDr0ZnYN66jSay8GZm6yarYspqc6Lr+sHrWoFXxrYAVrzq+V+1n35BYRI+VOW ++uSaftYhHeuTEN6uKHagMA81WFubHDwHMuXiUbHAUn3oJ0vAdUvI6shIIsaO6Tjo+uBNQsxgvB6y +DsyKrdQ3Gx4G+1p/R1GvOjz8bvSoUdO5l3mZ5SIn0xNkeFDUeo7xxmc3OpAq4MTeeTOQvxVx5Bze +neJ05L9yEx2m+99pXaQ8SKis4jcZKT4g3h+wtotK/b85zgGVc9xQ5fIgBZRxSv9nwjjkJOfRF141 +jSIz+peiHhXZc42G+r4/WyVm3sSYMJ/kmEKQlw8u/DWRZdXA4BnmOqz2xQD6XNhlMeXWFPU6ro5F +MKTZ2Ga9CrVNCXHxcQAjmDqgV57GOKg6uIZfHSQPJQ3ivlnC9rC1F3mXLVn3q9TG1B3dpooR63zr +XblIVgpcBwn1WwLkXbt1rPrBj2N9I4on75LGAwVtEx+gCxooc8hbSIuSIw7l+clL0Xuw231oggQi +e4pBqCHy0ate8A5zUW3NFF/DUr8aC3AKKNcr6xdVSYAhJmvDEvSm+09tuyirHEvoF1HDdov7hf88 +KocIkhBUvkqhsOvP+7z2sBkE/YuSGDYoENmzVkPLMLfzGmXFp+fP8zfd5/06F/iQNLtVsuuHhgPE +22JDqZWICT/Ej36u0pNuCW7euSvWmePzQU8Bf0I03qfjgMjISP+z8+rOPCRTXWdoAQRDGylW6Juc +g4L69qUix5IKJ7t2xVX604NO2AMABhK8sz7Dlrx08lTJ1Q2asoLQWjjIDskEfO3f3nRdOcGdAhkK +/9juipBVqdickMMgo6U/8qXtkcsPlYPVhGgudnupkj6RhghSIdMzyUsFFwxIiJxEsBqDINAaX6m/ +Olpq0v1yt/sxNy0Ypy9zzy0oZQld5LqTQoGKVGfseQgyFDoTdJDs21iYcte0XjHJts3b8peaidr/ +PS5q1Zk+YVZjaGvgO+pNtf3iHu4mMsODDVErJZIzff1iYUi/P4s12S1NdlozcTiG01AWxyMUPOTX +v6QBkgqPXIJO+p8sATccyZTp83ueoEYF2L9rLpOtowliENTxI+LjZJ4vCQSHSF1RgdIKl17SGFEg +k8AEvux4y8kvMT6OVXxg8cChrXGTzarZV3Asl0oU47UQ0T42P7T2t4AS05GGHwyCSxUsxnfbAYOk +QOcqsppGJ8gnY3nFOyDMD+bX74zZg2Zax6sHN5WXT6CPKh2WuIYDD0kWzlCz0bu46f+xN/kuVsDr +6W20GHFAUjHO7D6LXmMheZG79TeSfP5KUS9Yc8TyyAVLaeTALJDHM9l+PMTePGN7zED4aJTLFKT5 +bakABkjDF653Uk0s9sbQUz1DXKKq7Jd+7RS2GTC1h4XcgIdV4oqAX+0eIba1QN8qa9YTtBmPGONc +F7TN/KE9e5Ixb4vcNyjaMP1Bx6PxQ1TBOyAHi9H01s4jpDGu841O/N8HYDSIQX0qv1GcHdV4D1Jd +PdfhjIanZkBpsb4/AgiHVtRFqG3SvzoCTfMbO3v0Fj0aWREmw2fnyQHcnLvtDwPKOy4lfclpmFJY +zDaRgpDW0iQAPK1oIfcgnvJGzo3H5GvTCEXKmTJMNzvWhv1NOZQ+d1oTudDnQj5Q4eGeAsENb/dP +I3IMGYJJ6Vr/vGSZpIHH1pVWSjSfAYxDX1hyphda0xXTEZoWoSrISavdUT5VqKBzrKGVXrHmpF/C +SRu24DVp/fI8AXvK9xTv6IQIyhE7SKJXAjTTc3ODAV17TjsAXmn638iHEDRTDOc0tNpzxo2SxVeq +Sg/BJQIMHkUsv+XzZANIgtYX01dfqmlgz/KvpKGdwuiP9XMaxAn68SG9qzH+wzdGz2Kuboawkaf4 +8KCet/qWbtMbusdHren6fYWiMc1ljmOYo+zm16++ciBUuMKiITX9kbHUSFYjgSBYwDajVoTJxOm+ +x9QIQ/7792Tv6VC+4nMy6VzIrD6ib38Jhwv1gnDvLkGvKCGOw25Ge12JwqHXHo9c5owstmOaI9KZ +1TFeazgsIwzRysUA2x+NaiiZf+oNOl8cLvkcivJOZNhayOVhsdzaqyoAbb1VZrKRfdD3Ju/hLPUw +Gr/WB3p+B/RpiS4FDyYQtO9jmLpaFeUmfHbNb1QpUucDCLgXl3N3ic+AJ9WMRzyl+C/HN1T096AS +dycskmCahh/TNY3SOQHhdWoR0wW9lBsc/U9RlSzOkgS1wT4jkEW1zETIjwXznzXzAo+gJks2PH+1 +atUSwzJrvEQO21KWFneyQsbF2QuMNcvCsWm+r0MOt7sQHyY3f2LGghsklMk233pZ1CFxxGxIsgtI +GKUow/yjD3fSdghC+9BclohpJBcjXUf8w3oMYnxJF1tAd+9ygmjcSN02gT9gxdZEHV1CF3aSrT6b +vvxeiwRxWcrbfAFOFyALHxtqHtprs+/RWTQ8Wg1sSYrr6HmPDVdyXjz1i8vq9Mzxvmg9KqSydUn0 +TBqMHTbgo6t4nl3Ohofr2MiKBshR+xQdMdAS6NFGFuD8Ruwo9lWK6bkoZw+0coFbIJ6pfG86ge7N +JVP+1tJJ68MwNG+P1ZcjbMSW++9RqLLW2iC3Egk7/JPivVVXUXcFnAyRbJwwTCRRgg1vatMuQNZR +E7oH6ITccX4uGtoVwEn4cn4C9pCwQw2iuKzUYO3f7dhxM9sl0NkgzAQzCEq8aeZyxD0wyEzVs57e +FhNHqzN7DFIez3sFNQrf9fy+r7QTPnyxhdlPl9EIenxnY4FDfzCJ8IykVzE5LQtRI8fhLetuxIQ/ +Pzk4kig2u5X+XFNFs6+9guzpLtttV0Bh4I1iy2Goqj6qdcK3KV7dqSo9arP1GkvvI8AmaacLCnlr +iHsEKW1bcEOwNBq8D4VG6f8yXThuYO2iOKH6rbGb0XYC4sie0puAu3nHUSSIlbpmLKm5l9yMfCah +XGEwKuidI47m1tYNHt/IRQOSAYKoVL6WanCeVLEfZNwj6zxCsPKFI70Xwbf4PpJr2SrVV0UH5coq +k4iazxbYzpMs0MPTFj3RTFQGsZihun2uQWSvaXSOx7AL4E8u8blSIBfbGxRDyWSptYhrVr1jsjIG +wSh/ikUlVT61zXE0Eq1Fo0cTsk+470H3jOEB9OBkldoeQ/z7drcSLigYp5Lvv9TGGialnDoil8cq +a8RO8Se+TUYUeDHuuvk0+NQa3ouyrpFlfGU3352gQXMM++2kkMcdgROAI0Mud7t4Mw7RhFAaTa4n +lmd8qQkt0PBZBxX6lvrXvlnvhpjVI2c1G/saIXLNvPu6FOr2uNZwovEDzCOPrdWnlfWlXh6PM2IK +LWAyfJuNDtzSYZyeAwar3gtokZ32k5hQroUsIEyirXyaMaStdq/RNNZ4XKhTYFUmJrQ3fAGOoX1+ +b0nRQTNwrR08j+oRkCU6P48zJZGV0TFfpNXjb7F13YwimLVrEpPrHl0PuFUq/QeMb1ZPWq/WAlRJ +obecEKtBGklUs4KSl3teNrpJ361onFoaLMo7mjh3yYVdI4LPCjNVLTVBDwfov1K365d0HWCUuJ5k +eJq2pY72Pm0nVEHt9uPX5h5dlhjIubH2xRs4rbIlSzPJzcWd8UPWRElj//bl7ibtDUwju96basFu +sK4PhSBFviF/UrJjVAOGw+uOeP8LW1ZRdEJDNOZ8ejM/o6ESbBMlqvKyoTnzgyqH1/4ZPqxRTAYI +tgw0cbzcybI9GJ86Pe9bwIa7pgTGfUbypMKnlvGotmp8TkGTYwvg476KL58elNv9KZQsfMnbcP/z +osv9IS8NOdSwVQuUlW+ZNlydAnLwUnwOyrSMjtKjtm3Mc/aq+JRyPhpSNci9TQki9qy8G0LLZPf8 +m/0w2rYp8GNkeaIJd7tBNKHAgOp716fsJ4oAYtpr+muTTaXp18wM0mE3JrGETX2rRdLgWTPsqxAV +lSOr7TI7gNEDFmTF44V4imUXuJ5Dhy4026YPijaLwRMczbaNbodZu1yvrIrufu239LfixVK/FhJ4 +kvIGQYUjypkCwHpJd2KAU26JhM9wrFy2p2Xen+8AbpDueyjZ540KQacIQ3rJ2Tc8CuGA1m3UQG2J +VnQZdWS4EpJvcFd421VYUbjeXFKp3N6LwNoH77Nm2FtRbtYsKsn6gba79rivldsNN4O0dK18o4DJ +iCrs69dIGZgTQI0uREyLR64/Hp3+5gMetd63WBw8LDV3xvjlTCAmC3YiBMceReMQIWNhJ7nyauta +ADQdkptJFgqQDbYQGE3ltGUcYDswQBt2ZRvfZ7TfHVg1m9LQ9w6zcx/AxBF3o9rBfa9P1UBEHFXn +CO/EhdrpaGU/Qs/8Y0ISqOrWZgwjzGiRCfxoLbhIx25nfCeHTqr2dBMSrXY+359tU0h7vw/F49/M +VQB+kY/IlRkvnVWZeitT5X0RQJzBGhOjM6CWG9UC6VhyMAmb4ujhlEv/lcqih5g18XftnBEbkvq+ +PgkigYDmi2seYNAbLqQU3iz92yCTGYs+ry+auvXPePVwM6VFI/H0gWBox5Pn3SZsUKU25Td3VC4X +pZzTkuwJx5DkrTe6OeewtdCLFFKEsnyXTjbJq9FMSFkK/o3ShZcnBpU6udQ25F7KLum39xaJ1H2L +UnsnZugS7QQf1kOIGjJMzmxTgjL2uiUsXt4gDiUE40HJisS/LH5tv8TUInGdxWFmarnvGjkdXHTH +NMCJL+sEYDJPEBJir7idk75/9xY4M+OPxvNS/3pii58qsfWKVYIMsg9sDGiUVuyLXkZt3SqJTCJL +QXTZz2FdeCkGgAmsrtCT8I+o91MDqEvvbMeDLUndnMzuxdBIy79cBh/pr/yD0JMrvrvQcV1PfHW7 +BwMZpOxK2POeI1+P6PE3yZrTsGpkWXHsZKklfN0R8OJcJnblBwhmwppc0k3oB7ptpinn65JPMQFM +3s/kzkc+vBxYzsIkRpWoAT9T/RCgxAQa6OcDUaAhdMdESKJJytrSc3T9VBowfDnbunfHTdAFmpbN +BuCS+ReZvi2m6R/LEfmwUXlpp7xuA0vbTY+SKMKyynltpZUTfRH+upHuiwd93LgMJs4GyBhLcxIK +cmLeLo8F0EQQb/FeoZEByxg/fXtM31Idnnx6Y50UspMMf3+Kb15PecxSH0VD0rx8VwgAUSW+OpwG +xwhFjekazvH/7x1+2Yf6Uupc8OtblEjOa9qV3VUR/nxRo/83Ys3j+RMZY0/7LV29HqmIy7/OtPLI +fL7mF+0fyKIg0PqP5XQH4ALmqI+Y7w8RnsLVMFnwGFSylkIKW6DvT7PfEDjBPsQIdi9YLLZgUJBU +bcivw7JszeLSzQGKBr0rica7ZIUnsw1j35pjyNW2J04BRIwPtcfivypi+G0kjT5sHRhmjUDauRKe +gPyfi9D1m16Fswd58Zfv1pqluPSBVTMIkOzajECw7Gs5baqsgk3nPBE04lmAM6tGtdUAjtXQy5O8 +vxuK7Apn2e5pXD8aeapUPT3Lz6rCVbMN+lYt/XZx0RLpEpTxe9EOBeIoNbBk3zTfp7PHIv6QZigK +qZI1jGAUr5CRBqqCKlD7PGg1mFC64Nl7AYMlJBuWsw5hzU5n2qz9fSM4Y8C9RbHv/EpgLHwrkc4s +UmZZDrwqxah5Y+lFza+wGNWG2DyWlVwTkE6LNn/BHaRqg2lmHziwXw2HFstmQ9FZYaUXPwOWse7Y +p0W+vVICpoxdpHBA+FFXX+YlFd1C2U1dVZPS3RRZ23qA/O1iaZNAwh89SeaYcVXQBJcCo1gfVTnf +pfk+HD4AHCc4o2PxVMleDaFReGL2HgVfXfSfJxMP/JoTo343A36YB7KV9dSC/zFId1GwEF9mydgt +tX4Z8flPP+6R3waXy8qfPvyh7P17mHGK24qlfe6D4ZuN8tvfw62QwGCdx2JDARJhA0Z5+t2EIgFW +/zaLaEpw+uSegVJJkXN6c5XnexiaYq9/aZG8WqW0O67lrKNlIqlw1wqtCyEOrH3nOH8kV/ussIhC +HRSiFD+u35156YG/0JoS9jqo1FTgG8q3c6HUCUDuhDzWPDiBIHQavA4JxYvtSdnKxFIlQX5YO/b8 +fEplaDUTiFqDKfecXhcjvf8B/NIvJwAQ/n6qz+vpQxjvL0LC0YmliAJQk2PYi2WAbsJMWvIEmnqB +tEwPRyiM90O7POfozqdrY+BaYU6AAffpNvg3fRaeYHnCWQ8o8voQrh+WVRN5KFtGNXYLnAZ2Yoae +sTkdhJlxY0D/JlahbtxtUqPmDCWA7rGJZ6fhVrBmM4006Ufxp0bbsfJUPufp4K2e3AgsIpwpCVfe +ZIUbJ1dU5GeHB3usAsR+nZdTFs6vnF2C3URf5PKU17fDAW899pMR29tmTKN03TwzRU/vpvuywlQa +Ckw7kScEHCJoyCCYuJ2gzaPCOT465QKxv6bWadvKr1rDhMGZjpUeTiJLw9bQg3CzjPW7our85bGG +yqDY8xU/rDpHqgeLItzTfKzqNM6OB+QI9vgOel1Po8c94v68o9Bo9K3pjjCW8lOWsgJkL+NG3Luw +/XxU9IlsXz7BcGEYLQyhR6pS4fEKpQb5zy4HuZ0EQm5o2hCCBwWXpMqHpiNHJCY5pwHfmRWCpFms +cJZRF0Jc2t3IYk6dln2zw7t/Mkh0+x1tg9DjzH/xz886b9Na+O1o96DzQOlAUCnXnFNg/ty6RbA7 +Wa/dXkYVrJhUWSBDnB3YkC6DzxduMFbO1xYj50jE/l//c3ABEgGN+7T7MD5/r/YmoNf3dc8lg3oF +36mPkqWYV8HBcCATQ2LnvTjTd6a8c5eDHbCdvzXINi/+PxsLhWx2LrL7ew4+nJiLxasULE3gUnuM +/Yxp5hqUAVbYdS8AL7moAyVNvMsID4U20pw7fdFn8VBroC7cYCElJtJrRGL8O3jxcz58i9sc86EL +nr03cSYAXV7hxinsQGjWWd4GUeoRPYAP4kveHiga8RmLPnK6uReX7hCewxM1QgJLnDrpjHiVh0VK +loA+OHjL6m/9shMi/eSb3NAvNZiEJonvFkLy2mWvKBakkvZnUznTzRB7FwFgzBe2bKTp3v78l/89 +bnle2So1t/I+IzDoQYJ2l20ViZJ87L6pNuvdge8MwyCKipwjBDCvV7SDk5uhhfsdNaLhIxFWI215 +jz/zebNL6CZVhLoBaH9qXVDFcbf3kBQ+jiE1kKu7fRy+Pgsmfpgng6VeZFZpn5JvtnItHJRZSiv2 +pUWCxgxu7HMoTyTj4wfpnBSitijv+ARwMILykP1Ul+60ItzjInYMSShAf+W3inyaXcghHFAXchli +0NOi48WUrrnabN70lmtciBQiNVahBDYI/Q8ikmXP/qMeWGdCLxmold6AO9ZPxZ/AMVjiKBHff/gz +SYPEM91RF3lEoIBZpZCrqMbwChmC8IJ5PtmeibehjPWZTAEdfh0USQ2SRcX0l2DnVu4vWezaUH1u +usD1nzA/dp9yyrVE1hQlwAnQrutLFAXuvA20FH3BQnvcr4lkpxeHbbuX2i9cd6+Ho6dxWEvFrMoZ +QiVo3JjQUICGKu/Xvl+oi1JMGUCKzly6huheXvodBANJ10XjvKoKUhUd83+gh+f9TBf4xh1dzE7j +CNGUmQGrrlZCceM9HUXJkO1hF+QhDFKuoBgQkIr6SW+p7qUVH9py6Aq/ptmJJncHcG3UiAHyBmPq +JvRNNuPE0qVtavGhTKp02C4dpCBRBYRbn7+2eZctUleedb0YdL8WKVEtoFn8eymcl/lkETD0wIwK +ygXP2YggnAnQTm8+0MPLUE2Wj0qt0bTfaJdsKgSdfEVscDTzOKKIToBiEPmx5OvKcwSlRdaXlvu9 +pPLzqewo9nzO8+czeynvzs1lRS2Icf6orLio7QNzdOXqLxxLSznrNevqWK1DpL35raONNrYLXLhg +3wc4XmLCkDOJ3g98JqzNQsGnWwpTJqcKic/nisjWYsp5axmzH+/Uqcmkuj4sGfQtqp+s+poaHPlU +dPA/CktHpoPlJeCTZbGtsrqVUpCSqUHPNYv8CtyzjwkM+KlUOqzYlDexFST9P74HdCVtCxxKou9q +52afF4wXHNNLFXfsR6ohEAIVPu3rEcQH4hfyYOYPEYmhUPOoJDNbvKsXxrion7s6bI8QCrmhwz3D +vIG06ym520yfXB/qhldsXCMzsMvrmw1cyn3bQmbP+TaxA6/08aQK50x81CX6sYSlYKhUMzaYW1Ht +BrKbjyJvkzU/wR9x9fG/PA0tio+3OBWBo+7jjUPYRs6tYjI/FX8Z5se9yJcteYC+HFibwWbdNG1I +PWsCMMU/KJVGs1nJvYg4VAQemgddw4Y0tE/n/+LNn2F93NAodb93Dl8JHsswmQ5X4W6RKpKRPmmI +auWamqY8x5hXrRWuS9ASj4SXFlTnq23+E6DHQhmklvK4gjgLIy5EjDgPcEhIfOYSAtqOS5cHPLSE +fo6hZ5fPAdomxovC01VYkaZgBgVVEvus3zN0LsDc50vq5ygn9Ux3zBBvn5JtmeKRX/d9RqvSr9T0 +Loc/eaRd5VLa1NkzDohHRiPytToFv+pZENVDrwsV8/cwSld8Ji2jGrQPqc4YjIqbEGn7uQJys+or +Y4/6tJb/2ONK+ZWjBeGgbj1cmj6VgKiftdhzdw+aTwlUC68CazoKpwnB6P8L55u/+Rqr7CTrWzKl +EYKVA5slCvt2eWUK4vow3PXYVa+Lz7RqihpBKxlwu9zfc78RhCaxOLa1gXdY4OQbWpqPkByNbNQs +H5xEG4mb44eiyDJhKffWE1m2a1dgj7oCPW/mNUguk+w55klLcvsZyaek+MVy7btxxbOTvMuPlk2S +VtlXM3BQqvqsDtEckz1bgK7VO9amW0/Fjdbg9K/0/r5JRu+PjHkVRhXltQkHIw9K610OZ8QPSvgj ++0RDX2AUCuV43F7/QNLYOi5Elfi1sUbPTE8F9pCSBvQHAUohMsalQQibbUca0Mw3JPUM/5i/6ivz +VT6sz5UDefbcXjF7orlhjEgJ6yiHXGchNx3hKtgs6K+RtYeAFr1BKFPCvz4GNUTY+HPEBr27i+Uz +11bux+C68sW1Yd0QX53GrT27mv5uE+6QoMU6uHEPl9Zc+NRtQPbJJTgErUtR8plK8wKDMIeVYfK7 +r6Eb3eqhF2/HwcAFnCFeo1OikEGiqBQErCX6Tn+h+rhLPSOqMsEhAXb0LDTAtrcqb1OjWzrH2iYz +b9MYUalnSZg56olcrA964sTUNrEK8KIvYDOlv96b15Z9ZjOzDBHXrHuJYHrFqAb97hmVmiTC8PuC +G2jy9LEBntZoKGakFGx4CVQTkVHShSZX2JPBVv/gA1cAKvE750FrTQDqRYVmakHIhNis/ecM0pDM +EfPdFg8VyW6ZNRFy8tk+fb5Lxpuo0dOu/a7PGzjBKjQiCKKS1OYZdlivBYVb3ny/+pZWHhUAiheJ +YEPeEkHn3MdYU/ZSVMnBFcXDaNVGIL8+9ItOgxckoL8gzk5Pdq1JYXoJNJ9CK7e1NxVOEgVmfRgq +YCuKMZn5sEj2GHjKDq5F4gnxPIhep5qqlQoeISXbL+IQWExH8g5LsLUILOIARIx9JIV4rem/1x12 +kR1kX2IcD/sg8425bylzv4V5TRq3jE/rVgMCom5UFCPYahnfZ9uzCce3sOBdemSa1IozUgXBB3ox +6jLPwEEKHedH8Id6/Jcv/CsxhAJ/fntXgTXzblj/xvHDJzHNLjZZkFOD9EfN1BKFJzcXbMPh87fL +09vUMhIzEOkcTa/lVRuxtRK6RK+s4APaljE0YHMlYdF98Hzr+enmODpJiGBY6qYVD/7VP8I9oq/7 +HArtmA5SqF9kp6VVWpovcNFvZD+E71CaResDjq3oJ5O0T/ZIeRR6uWwRscxqe8IeSAkEaQRZHB1B +lnXSrsWtlwberlLHgJLLZNPWxEqh4pVSulD43P79SyqD9IhHXqK8xdIrUfhyr4w2UIeQldPVLwON +f9lc20tdxWlZ2kj4TK+OOGgpayOIPyVir3LHZpmiAiGbWtlgxfloJQr6J/pq+wlref0sKTFOKqrM +1y7Qs9j7zpLMFV0Efb65S1zdqM6C4XNIWwGIHjdELjuKSsIKs34TJhQG5MhsxR1EeOBcnVeJVpSF +eUQIaffCZ2c8QglAH5HG3wEIHL8N2pkcJcM0RqM/uZdrz5wj+zlw+Y3U3ATI3vfx65X6GT7Nl4cA +xj17R9aS7q7nfwxykl37S4NiDYHMrzkaF6IJ+bs4yhykbXFCs4AKlrYitpHvWuUGSPQQOfFGIoK1 +xLp28YkeFgPkpJdHQEeFzWiKcD/7pLdD5g9eSN8+CXyuS338nLhHnedKxfTiQtWlTxXTIs2ZVivs +0CFAd2yrVDzZMas77++Sc3D6/tG21KYaoMK6lUBaeB9k0Q082T8yG7EE95Jmkm+65I1ua6rNsX1X +IcQIf6r0KhlvwqMJom4X8iRMvPCyh2Q/h45kxV8WOq62c5SANX1ASraHJ15er36WF7b50jEyYxvc +iL/SvbE1sGdnKm5OOW3MDp40OJMzWQQ60Z5I63/Kc6g2Uz1qcmT/bsbvlvzVKmLPmd0XwraRy42v +XAsGGCDhW85VhvlNxq8twjBRRhFV2dFc7KHBZiav2ks/DlccMYtM1XQb/vCQfsf4ATo/uwIpD2rf +ikT+t6b7caT/rnqGzPHike74UeSgTlt0JJSjS0OrVTfw7nFaFA/Hq1hc4205VzWI/VYqBw6YoFXX +zayq/Wx4du1ffCTJbIfMF2ahk7Xg82+yDZcvJAfIPRFg2JYYUqUccfWhX2y3PzIRIyzmPvwxBZYZ +rvmtyx9B8v2XDyaGOGIjHVoByhOnXkvd7Jk0Qb7r41R5NIGGXj5+W0nxtp4tFy/RS2jL7iiUI+jD +qMYEZkGISyjr2mPTEYT/gIJ0PRM+5mrMYFHKQaR2V28x5allpFpcd4FG+Idbz/OBf9Lvgke5rLIX +3jBrn42DrCoYLFLEZZq9nTdqZ+M2Xdnp3ZAo8k8RIo9MiwprUqi9nxp/j84Gb66wxNk+I0iQw+rs +OI+qsuXisEYlPyzWCVND4ulK491RdYD0wdwp9b9adAqZvfM77YEm1DLRSODoLNWIYZ9yKlGytNG4 +A4awXElCTXfAjoRfxNSPIU5WcVgR9ZvRTEWKpt3yAdiwtS8FC2Y8H/flvb7r+As0IovguvVnBjSU +RxqNMQhQrnFJUu3D0qFsKHLbh0/MbkWq/mN56fkopIYEF1aG6wZKThKw1QytuooDHhhwgZsx8Mth +0PqxGey/+ZcweVAGsNzo9zoyegJQmv5+Mn0UeVxgKbZe6802ktk0lmcTF1KssSL0dFsDT13A1jeH +FGDFYfgJKQJOKOKOMXtSUl5GerX/ylLl+z7uBJP0HXCnxjQmraCp/rZnmRowIdEr7S/p7sR7iuLc +4mliWDMEde0jeueBGsvncW5pyLjydrJUBxbXsHgsDC60DRRO1cOo09fgN6JCY4Mj1QzL5h+zk3bL +8vpFQax86Uu3Kx/PHdFvDhVrR0lDnDXh2eOglNDseAySM4rWa0hol7sy+epN9jsePiqyKZ5QtEbL +CO3cuqJAcV7oc8oKrTM6EBoAoKpiESN1/iKc7LK6wGXB4RuQqkh3T4cWPAtQqduyHu5QlkBsDB1j +rV6G/IwHK18phATygjFIzZmC8taTiQtI5RKU2wwS57z0qR9OhrkDeqliUHFqBSUqEtplWE0XKWeE +sehkYQ8kZOqIEaHX2uq1rxzyoYiC4H073C/RrwltPiNnqwqp8wO1mDL501JvzMCKVrCzkvBerjMM +iyzdJyIbHZPZx5KaJPrHR39o6xoTCESKfjYjCRkWeWF6G8t+lj5iYrh5XGXOFBBoQfUMgLRifb59 +F+GVW5hPSS9ZY8GFQ0CW7mz4CFwNfSiG4BIjf+IANd7vyDqq8PYmBKbTbsHBOivaTjnPtHThQhXq +PqJ5pSomi0EJsut6oG197fkBFlhSJavVq7dWnfP4k1w1DKRZfjkmH62xdNDZcgDhFOrKg0R67+F/ +iCsDOS5tpXW5z7rKZVB6fHYnMyo8Jx1T8VGRAKBsMLSma4S6DIVhiw9VVqUfByIRyKDc/iv7m+U5 +SiGyWwMG1yyLIQueFkNWKPFYY4+GTefVb3DN67P5WydGFcMK1ySfQDSl4Semb1z4edRQTIjiCkh0 +zqxr9PD66WOM4dE2MPQVD7Thf/tJ5+O0ZnECIoTwrygw+9DbQUX7w2+oVDnoKvaz0ohCE6jpbe66 +Xk8zFaObFEF7r4wi2I5I4Qgt0FuqXIpKnsKZ1013l5sTiyRU+4pxiS41jYxMIZQFSh1F3MVK2Gvh +cFl0rvhmj/3lyGi4F53WYonUxYVRk/wzIROdwqsrP0XnPfhu1HJHNQFOrz90+HWW3YvP+ZW7szgC +dwD12B+NXrM7FTwN+nR5bMa2kDsv9fFDCcjyfFAOo9uRfIZMhRgu9kNOkr3UZTnU/E9HHjaBDYe3 +/w2dMAPhBH0Taju/Rm1yXdjYslPV5T5QvQSF+HrlAeFrRRxTzrQOfiUQuTZfogxhJBpImVU2XTOn +FhbOnYUyS010yRcos2RQin3yw1x8/6ec1LZyaqlXwzlWQ9FKi4rx06WxYzraV3L2iveIBRahoOZB +DqPdZFxlJy6A0yAscu15fVZGfYTFWA5t+z5B4gLMpgQdG9I0xI18Y8GDnuJeDFj/MCa9oJzMNWcg +lb2cbSBWLmGgOrv6EiLhDivejPMtHh3tVLh97bxAp06m5csDYJASxScgOhj+2comljp+gIWrPsjU +GNAJh3WDlBOubyxiRBOhmRJD7B05RIyhrqz2D63S9ND+DSj1pCLau/8YLqevqEUh3CqmPnJWktUd +5lh28d/oa//F5OQnCxVnK9iENAznzcgRLGvJWlPSjTHicyxl0j1GJ9lSLjFhJZiuPj2cfYv+hi78 +fukTylUuCSVA9eI7HL1KZCKWgFkvhvSFdIpUydxXkM5cDLau1cP/mx8e78BJQ1inb2DQZLK+wj+7 +eJB8MWomXzPyOgEv9MzuKqanjG/6v3f9SlVkqZ7xVjzV1Rj3o9RSYsiuvoFdTA5D7ukmt50M8/Sa +Z6A2flzQOjVCQhsXzLyp1SGhcEc/xEZtENRhsCO4VM0IwjhPFAKMPri/CPcL3wuX9mMqsTecwkD/ +Rip3JvrBw7LbYDG56gbyzpUPBm9b6t7dr10ZdY9jYFIZMW/c3usguZP5ODl9u15aQA83YRkIa7HW +bmb/OWUtwTaow4lNiZsTosLlpla/PSQ0/5d9qTfdoniqTmNFfLiv8MQQp+m7dSJqQqEv8/3TWFuO +F0PXwoLGKi5QyRGU4+dh1+dUSJ5UmisaLwSlp87FnJDC79IECypblDdwWipXmqlyvRIcPmpM+xlR +/LVZFNsl8aPs6pBCGv/H/X6uRrL1X3fm7Xc++fFA6Lj+czcUin9TK+GDiqpb0DaQvJzULtWeB3on +gfNHKuNnNJoqX6JevXI9W+/2DuCgzNBfPzz/5TVkzb2AocdxclGlBh9DaebFdOLzWLcatKhCnJxD +jj8FhdxE6dXI9WQ87F4xhDxXei4TETeaMNN21wcz13hDgiS3qpeWr15UmvQQeBKYrzZmVtnhNGVy +XRMCn6zZjWfANSPMNPNdpnpTGYsx+9KPzw/h3VQTdyWflwl87SEV+24wykB17GYtZALtyouR+ljX +6ha7m8k1Zem0Ani3Pq40mbZCZNvVSpSJ8h7cwH3a16kdHVTvf5JUmneowiAY+jZwHNjBsUGc4njo +soY/ztSReGaxEo7e08sXt0JXK1NLgQfrRBYsE+SmjcIuwUidZOHrre6gKVVzNOW4nr+XV9E8Hqzs +kds4gBbf/vuWUNPRtkfo+udNQA7b0qBWWU1ZSmYT6ycQwoLW9Csu9JCyYXCUyrOxxX869Yt5lHZa +etPBtpdhD8HzfvX1BI4dv8Hf5VLF9Oi7ZAM2r+duC12V85Xp3BVk5bJILhTtNyLaIOHG3KW6U1En +ztLLiFarBi7Z/e9iD3HumIJDu5j0G3/aUue2s6t+kGN+lxeYCUZdPSHJmHCpdTF7QSY8xYGYhtMa +m2YEQnNzOYEcnPvGZe76tnDatCVFbvchT6i2NQqNskzgVN5vkjnwXPyMLSPha/nQwZQ1D+r8zEhC +hfVBVNxYyXG8ePIXSgm8bjVg9zIhZv60VikLaufL9FdZWanrRmw8+bpa9jFkuGroIfeteNpKBXRY +XS9oldjPGQPu7HF6yaE/Lrl1MwBGSxk6wTSL+AGlYnbZseNYmfQUu2ApqlYeGpLllHfeazwIMdpO +t2LqLXit9o/cth1zh5fSpQpqAvYL5jGACfhnh5T6GlLOQZ++GVtcP9oofU89GgUA04Mhh45YDDkr +SvxB1ztGX+b8uqhzwr7w/5Ol8o0rCh/+cYE4+3My+3+txvNbTtK55x62JN4lmsVsOcBLRNH6cdBT +WU0CkwAcXr8NGcSsPs/WmHYjCMEpoCvULHuwduTbtnpAIuIdYvWXHayXCfidzIKVtdq9Rb3ZDugh +gXHew7wC5wye6/MrcD6gSzY+780FGY6/Ss23HIUJu8+0i+k4xKvBJQ2GIIGJPfbrnIpwD/rXErSt +aWDRTGPqMDUpMW0602UAPgd1wNDR+BVWb1zX+DbLbN8Hrglk4bPo8dyQTMIHGyUeNUPDRJTSo+wy +pE9J1zcg2nbKoboeCGg9XAujt9MQl53CXnDjBGJibT+mZ2OW7fqNkdZ0APCR72gpW5zOrFFKqgNT +Hk5wM2c7uz8JGBiVDQ4vusTOwTA5j59PZDgEL6VkeEtrEn97npyGRo8BSovfgOhwnQX9PgCU+Xyi +QheujTVo3ur3Ea/TsKtUljUbexI7Zc8eOqB5RFIpueK/g7IQG7y8w0aQz8zt25e572BaesDrPLao +4dNVTwQNo+lJeFgqet9gHFKVgRKobyfqoJpHW+ruuCeuUXXiD5GDKpJc/hGpehA3jOVAvigE7EtF +Au0UZcTieq7Ml4X5GufGYmDYMekfwwCPFO05EZjDCeSczu22uGkXnSFF1pYAi19WW/VD9L/LlKvb +dkc6j7e1QEGbFQAlNFVuQPhuGuyE3wRI7PI8ubEUi7TjZ18fu77y9QfJGEUn7jyeifbse4t+/iXH ++TKTtpAQzwLRj+bo3/bur/W/du2pD/e77T1h8mkTE9k2eK5fAaYkp9LSorJvkRwrGRSPSpVO5P7I +cN13L2ZlfvmiqNPdC9v7cJEMZKO564bDJk17fykjuIQEYd2ZAgOzBtJ2iWKn2zn6+kYG8z07iTqf +pVZzsH+LCWE2zjNgX6VoKaclNb7/Hiklrz0j5PB3e8zOrDoICTrMMHNrretpVnmssRlsQ6H6z/C+ +vGPxTnS9kS2aJtXJ8DsrlQvmnb7mS3DvN022nPIAVXFwNEUZgsGboNLDTvb/FTJ38QjpYa86FOtd +V18heDzPphalvCX5sHZOqwoW4tR2QS5vHdV53mTd7VsyVdNu28GrheReCUOEN/ZzNA46agux7S76 +J50LFNhk1K7XsqWh67pr6Fr3ZmdbVe/iZX0lc2RCl2QrBAfgiNwtg02uufdmYfmutDCtIsVuSe7O +VcNgS028I5G72aTli2+ZkrxM7V3MAm2/w30mx21mdpCCdyCjCwm8P9kQBhu6l2aIeWwxpIKocOJ6 +SRpFWWSmChMwFovTtspdTYJH+JKxQrfa1akza/4QYRsJ657DcOr+A/BDtiAFxWx21tET6IfZSDOx +JOygYOEnoLoUnurkekEetpncdlTWXmezyT9mp+aNHxE8Bvp/L00J/5hYaNalVEtHamvJpq7bhgSM +rCQ48s10iHswPIaadRSa8GzZ2Gtzj+bvoh17yAn+YnvbSt/1myVbE5goqNVeT5Xa3xK/53uvCb81 +k4Q0AxGLG7dHoeiovJgxm5/J6VB237c4NiYZNQIwYauKSDBwOQyzqBE6J5W0TghjjPQLmDFKnoII +IiUpNYJR3/YAMcA2GGr5LBoxl6BItr37CWuGlL0+GGLDLgfg3WEcho1DkQeGKl4sPcLJ9fkSzOeg +uHY7BjKgg7n7va2bZc6IFyekv4wwYiLbxQqY/B/ltfPAT9uQMRPvWMiyqWn52mGsoy7WyLmGTUuY +stZI+Zr9Faa/UFn4N/w93eoWY/+pEBbOQMsfj74nO3QXr/FOF09/3vVV7QG3YPphpAGT4ua8tfow +Di7PujuvkPdZC+vmxj8kVjVV66YtWOWCG77/k7CM1yYehCwjc8Q2JQX9faP+6abzTCBSuJScqNSl +aNbWxuNQ2xNLX41ooEfnLG2DJ9Vk78UqElpffFj2/3CGvvYarWcOZT9Md3u+3muUkPsRyvMXmTWI +gsC/PaSbGuoaJCstTHEZYCSddYiYzJ2anijVjwIsd9oQkpNWDC4QgW7jHN6kdPhKyjXVjUrj4fdx +hCfEM4NPCZAn7McP/RIIdeq78xzprJighL5pECrnPfXPaK7Hrb214O0J6h7DV/JKtNH5RoUk70iI +OMPuo1JPdgZS9GBbNa3+au8Hqa0oGGltyTAOfGEOCnL2Ru0x2EDagRYOoSU6KS1oM8trmhPBo1Uv +cRXNZukl8mC6M8POpC8jjC6+/l8bKrUcPAtSFITNDgEm+8Q7foRVd7dMJZMUmf85F7i4hc7uGOW2 +yaidYjos3Mr8jrJAMDPay21BPhi0CzKkrJK/Ps8YDcRO6/R7OYRMsLZ3/99wcZ9Xs0zHCDbV9ptq +zxMG6/3MhihQ6XN4oLldlbLQ4IhD+medmh8DJwVyQ9lQN6BKZErVSVyWc5ziSPNy+1c0FMi0v2K7 +07yCYhUXTu/ojuWJ0bU4kTN6CFFib91fLeZq0P7//sFZn7mcrMr1eTsvYQ8ff2KP4JkGqIG1wYOk +Zbbt2RsSw1ftVkBeWe8VRj7nu9TCBhI3CrbhPEnbXSo3AC7YOdKLp7U69L6Ifv4+EO7aw7Gd9mIn +vJBZlTFkYagNQi/sApJwNeANH58+rHOYimJ0KtueYxgbOKJvw6Vw4q2e2YltA/CPzldt1DkXhpoU +b95VzhRjA9iwWMIqeH2ZLcWSnKM/vzcJ/zezpQommYmihpuQCxYbn1iEgiPg6r5HJBqpfDXQlYAw +lwbTLEja4hHT9X2JBFCmGNR03G6cXZ1QrZG49ALUMX6ODedE3j6Cwt8WDgC1eAUEOaeaa9If16gp +8/uiYPGrYNkF6F/mtNTEGTIOLzFJ7Afiv+yPDdejblZzadm4jA71d0df2r9oOBqi/1JFAyoiWU5x +Lo41QPskvUSMBKmV77Z1imw4+l9xLGPrtK90dCIhmFOIQnwzXtFk6rbgmjcJI91JSzAznwDqo6be +XGz6NqzO5Ec5B3/jAtPbKqU+yzKKBKIPOBMbnMWNsgaRSVsrZjLEI4nW6XMhUfB0z/QSp3qiMWHx +aAHbme1j7/0PSCl8a2znMk4IcxEak5KTtIafWf3EOVXHzMA7iDLaMFPft3388EqFrSSkbxCynnPK +hq3z7ppsumRGIU7/04ls+6ACYxtDmnAAntf1CyRRvgBsk9bvUslc4aPeNPeaQT2phjgWdtFSiuTb +oQSFRfbxtwe11vpWPteko7dYeWJh3tW7Ln1YIapRf7nzY9AA7HvpAzIHW8C1c5PxB0PHxCJOV76l +8P053lunrLIbwv9YwNcczK/sdAoYdwPzB16bEBLMqVf0SeaHsPjU2tgOpti8ySCg8tfVmxrlPL0A +WCLUxZxA8Iccyc3y/4+IE/WOa/KM/s6r+uGHpWk1v4P6ffEUfwE6PFic97BLguDf4y+n163d+JXV +J8FacwK0GyDqgkRqXc9+26P0sVn48aCfpnnWr9zS3P9hCCLRDbiOP7NUlXq8Az01vOQ71hZViqqB +cmKiTghVp7rTqza9m2tOVK8rXHO3yFMImQK/4wkz+YQbWnahiqIvTMhPjNNNTMDpSpQ+SrhwJEbK +A4IfpcCRAzXCvjzIEls9dRvBbNE+WxFWPRJJEltKaFwyth1Z7dOuJNdOmh4jHUH3ozlGG0+fSKHW +Fsld+23e9HdFOzTstmCfbbYzrJXhJvvHXf88qAO3l35m1yDsozIPp2VfXLYsIoM7BISJV0+1lFYp +pj8HFG/KdGuip4p+bTb/eauxxncfFwQoH4plbDfbRqBXpQHq/8x6ZvujFvRpvaXDwDnOs3uzOJFq +Sxe/S59Y7mvalbSa2bfSofhtMB4wlK+HqUvh76uiSnVGotAd0TG8yZY/MZDY7NzLAzInUt53Y4lB +/xX2pQxNo0q4Ke3KhgBNB57RtbvvwoFs1LfD1SUhKJpVKUgBjIkfbRa0j8HOx2lL4SPWpuu/njJU +bGY2J6TFHrdiO19L0D7y4vt385N6oGPUNmojQytFi7hes+1oYpwE93Qffs+mBj48TOwn1+tl7Fpq +My1ol7P11yNDJT7Z9bJmpi2mK7nWzkL+igvwna+T0w6Wtj5NpAUInwCofGeUUZ6PMRaAJXV5faTg +0Wk7EnShQn39ge28Lp3GNq2EhcUvAhV2EagXf80zMbF6qG5sqrdyTM8/q6qG7oR51h9HzLlXyUaq +TjYpDUiiC7Ey09w0sPqS3APhk+3orEnFtQilFNBFqNgA1YJ5f+Nhv9zmH5zLh5jssHS0andTECMQ +KlVdncw/AWPIknlg7g9WZw+/QDygt3808pXMa/pH/+YmVFEK2Uebc3xiAyhrYuVi5WrpVar+aFLs +2OV36M3nR70lFlPmRUb5sJHFz3yj/0JmQPf1qvJyNaKOnyiZpcGDzJk7spjin/2TEalHtNX1GBl8 +GSk/HhiW2CC2Cc70zb6tbm9MxlZuEc4qPnEJxNp6n3V7EwqPTvcSXyjOS574MkSOhGipo++VT6Kw +2kli4H9ldphkW1Wlf7jhmTcDbHPydrvQ5A2WjkVgtQuU3inDHHxWFGKIfhjmWYj8jlvWXZNEgbqy +zt62P6ZTM3Dm0KnB58bUv3Fc5ENrv9b3N8b02O5yUdkxtvGZz1e3ye/YTsH7hDchRjwyiTQgYVb9 +SQUbsghJecWClVBl4EtIyJxq3aYJMOWjE7pX+AG8FnDSQTGcJelC9kA4NPEJmgw0X3dCiwI30gTm +Xc1hB49XoyhFCl8KhuplkZckuITxnMb8hMehJvBPG47L9rW6oy6+FYemeSDjmzb6nfLxMvv2es5j +aSQKum0zmoWHzRR3woHu63vtToq1fUHHQ1j3TeSBBS8lTpc9MxDk0n3OqI3LVnkwMWSl49UpPhFE +q0z+fx/OcVff3hLkHGE7GqGe61DcK7jWvvJ1wnhuQKZSNTF1rKQHhscXXnghwOqh/PpW6MM9RgTr +WXxvUaGSYZm2BTRRWWVTMnVZMCd8jgo1MzvPOk2Le5R2+jTFrkPZRz+rgiPeHaFay34ItpExMj63 +gozO0UXgHnwY22vk+lFpswtTsu+FBRblvqIVi3F8Q+NGgMSU/k/jFImAAKOcNtJEFkVFm02R5mwQ +BtKuh935tsX8BqoA7Av4kkXNHf6iqfM69w+PY2vi7wyt/VlF+mQXX/wH5SA5O9etUCiB8iwbQCOy +rxH3AZuVWR6M8/Kfz+vc4I8s0/wt21LHKAgiAoFNgaUY3iiYc6Yd8Wx2acDQxqU3ADZ/UfIAONHO +g+aLHuBdqwRsXDpatEQpZRp8NqAIKETHXWjeV4yPcBJZKp9UKHwFopTGPbpNYJA8qAuYeG//yCv6 +Yeyu/PX4vQOkzmTvIdnKHiMdCfuZl8Ogm0S42rreAOgAGbCa2bcpf9+u7Wzy9qduaY4xGAsGedne +kTIok9qFR4To0xgKUbqmvN/vq86z0Qf+7X3vYR0ud28Bf5aH5eKjCQMvOjPzgwHFd7eevKsWV20V +GMacz2VMpQuB1HlxEAGVWNc6Ri+4FhsNH6QLDs6+IZxkLqcCpg06AhNK2wilWiglzavosp39yiOU +w2+uhgPToRq9MNxy0Zhw89Ys1LE9yKyLsAMMBKWJ5M2Q2udInFvDY3HKU3WlOwREWD97VUFQp7aq +J5rD3F3A94lnVFIZOGh21YgylI7OOz7w73jU2mBUU8CBxR3flneaOCi3gendCmGTmy+x2JlkUWhl +TCHhK0huZdLrmy6Npy/wWX62pIZ2wPu0piVpJ52DM6blLSvK113qODBqW3EMpZ2gpKhdtbG94/2m +aufjxG5W5VVgQgqxbJ3vDWBeU2lNFMNtGw2ORj/sVXE4MGOdTuGCrEgtanhLkZk+e621DDbKgvqd +onVFJjzNQR2LDisOmvnBI5UftKSKBV2+BBdN16ymr1wVgPzECfxk+mPTItoZQXDKoMrsjvEbzJEd +XGHIOs7xUD+kTY2mkO4L0kIr3dKW0sgjbP+TIOk1nSitAbEi8H6wIXqVZkvXIUKrHmwmvtnOaEiZ +zWixfH+kuWCOr5ukd8aE25xe+dFOr6tdcxMZrN1tTJDH3Zo23+HZ/YYSVkROhqAycRJAghynYcws +Swsa6dgJnWv0n8z0aYSa4FyX0u48qEsXzIxMS1D5GIEsSQKl8J/wKhepmEwuJYmz6goo0LlCoNbZ +AWgmuBXuZUnT3KJh5+OAinYBdHAvYn1rC/sKIP+YeKcvaUOVA/Sn/Nr5eYVtoYF6Z/c9dR3sN1eO +LLVO6S7gUmsw97oC+BXNbsSr1go25SYqTn6WwM2P9y2cWcRQ28gq1Nc6p6qRJ6cLWLpuqVsTylkM +PFNDLa6e8vuiNvR4xcWHbJGFIbMXyP9L+tnyfjI/xoEwRSXQEX0o4S83cstmZr5cG9lt6Ao2G8uu +r0xcQsatmfGmJ3zcw1u+qmo2c5sz8tONIDY5FmU5HISZZFH35HRdQ2DZC5rON/+UDTHES5+tci+y +73sXt/EIwet2ScwXCIX2tXlECbWF5BcbGyZaOYWPKbg49PgOZra22ov61l1zbduwK5syYAUcuOYh +phBV7ks+EMZc0eO1OL+e6pzWDdt+zjCUnvOwS4/vjNG9PYUq511ymlC7rSvmh2eiiVARyk2ByEaW +8PZ9fSm1rhPz5PtpTylpAvKuIvfe9St/d9Jp3xKol8lShROAUDAQdw4Ag6mVo01QXI3z1pn3RxNI +yzO2I9QtI7B9b2Jd0GadzQlCsaiT7mbYNFmBL0vwNTQmej1HtZV5RvXP3jLl4s8uPFd/SlpJxQCa +GWnp3t/qsb/XIgQcRoBvpDuCp6N0QSKZmQt/YN7/leH/2/EkiK8yVn7vL2E3xo2vcX9iEeeKVoeW +AK+wHdn9rGcDUCfMeyP8FBM1UTCKTJ44VyL+58pXsAUrK0eiecDLPEsUzNy4k0Fg0jZnk9kzArrC +KFfTjDneyLhM6BbQwQ7hG6VIYcaTdctDdQenXYLxrGDRcTzgmh9nG8xEE1DJB7XHfyxwJgiq+2/K +wtCSxPvvobWlQpPYGa/FMveogv8yZqgkaJeXZdg+5EN+nQZpPsTtQ6N3Mvm2VIYTyj54Es+cFs96 +B2hJ27mqKBbfM4ok8D2XJt9sOnJFnIsj8a6KJx6y9iAVirlc7jqMz321DbcS+pOIjINenLJKFhwI +iW71dvFjYpZzuW5jUWPIBrej3Wqvt9zU2dYk8XsIwXs5HuCG69Zo9+YC4+ptAGigkmQFHnCDvPbU +VsfdEoUwWv5bVLmokwUTwl4sjdaiaGmYoJksrFa25RmcXGBVIaQxlXgFhEbfQDtw4LZU4pieHhH/ +3NfrWcy5SIs/zslDfKevCAgGuYjJ6CTRhOPBz+iKN/LG7fSgjR7878h3B/TMk2pPGdZwt+GheVn6 +zHT6Eb0mtm2wfEefenPmnlWZT4xUyV+GTs1duS/IEG1OTNFohhgPXlYqBkLoYeyqzD2n73DFMkbS +5C7v3CxyBi74p3Md1XfcoATp+IxUXrT/5XulULbX1PRLAXWhA/8M3CHl9NW8P50B/WNGoCAxvbTD +fhTRDC+YQZIRnhOj1QHBnPy4MwC6UfnBnPoeqByIAQRZcOl3s3yvPWyKNpHr9nJUjodrJRfxtgMK +On6Vd1yp5C65Xk7eR/IiVHL8RR4w7QeDnbeGk7gDIrO58xOesZ6dE0a4E7Zt7lHJ0t7C/L5j9NLR +N4bBo/Hf4b9YQ78jGsYI/JeYG4LBU0klY7VKADtBakJqFJi4osGfPhutn3kSMW1UNT2mRKJkNO3P +w4ue8jRV0oFKtymaQ+YeV0rduTxQMXcoOgheBCCOdQkYZe7iiZaIIttS0DVnfYUKuZjSpfZjhV6q +t0+wkdUWC6Y2NJej2T9iYuQJoYSquK4fJjQctf8qcALFVNxU5iDRAcqg+hG/NdsriqqOaYG/S0VZ +gQjlnIm2KLw0h4EXtdoaEdYUqjlriOmroiHGLKvXJqJdNiJNst72lVXWVWNqkswqSVZ2E7Pu1M9g +2hezCP6SkQjRzpaoOzkb1X/zW1zpfMPqXujOIfUHwAIHNGX4HyavL/1KjNLRBJtNh1d5ARBpPQXf +CuNfRut+12gkwgRBpcgIjNp+PCIRAm12FoaOElvBbGwpg7iABxyeqKkXsJQh93NG7i8f+c39pdku +F8umptkvqbsJLjNkXpgSq24Wrk/ebUn9lUqnvhQbTcRtKSSKj2J6SbyBhgwj3fKjk8ZxJxAs9Ekz +0yjH5tI7oFGDYzoEDmUtD+K1XINIvvBW9hurubZJMVRn+zqiNxKJGoHLoPOfCZcOB11NXzYcWpgB +TE7MsvCZC8bFqEmNZtBJth16HeKm8Go34XdI+RmxApDWLLBTckxxezRWSUNqOf77oMRIpbRKdEZo +UaNVIyTmPORLZXuec5XooX0Z6buZppHAeRwFP1CUzgj89dZm3yDZps0T6Cf6dCQYZMLM9HIQScu2 +5TRGdmGc0tEaU61N1KpYFlk0KmbPvXK7Yw9/IGjtTN1deIK3WUXnaEZ8hNVZpu/PLjVEx9z0z+TJ +5sQQfnbGCyTdYi7QeG4btOpPHnbT3b/OKJU6VZa5221FxQ9ePkZVy7Y/n6/GGKPBuSDyuLub1f6h +T0FdNCq8jlQHQ8xFEH40KsJHepkM4zgRhtWc6qnfeoPoNPb/1H0QA7TygrNnvue3p3zRU2fw9m1N +PAapi1t3jLjh7bD4jJSbG9gDHrE+vT/+hiMWUDo8XP4v9KFvyv2XyHSvALmtuuZEu8cxRh026MsZ +tW9KoGE/cYZWBvAGE4ThAQNyeJFApw1FDl0QSOroOZwf7eqvE1E5sVwoaKnIOiIgA/WfSreyHyv0 +Kc5EBJqqfb3Pey7YO1nf3hTqqXJxjzJbueWSClyKKN6DMRQt3y6iUbPW+P9BubX7J2RkL+RFVedt +CdtmZPlgj8BWafTUF2R3g6zUgrjVbC8TaVmLBQn2kAfVe1xLHARhLcIVNXh1y9fAw/5lozXLNLRj +xDAW3AADAM01bmKWU41J9FlO6lC9J6lkUvGRvCea85Qj0eerSRWS34USQAEQuwv2DJWA6aAjuqRG +4MYr867ndR1w9EVXP7m3XABlosmW5qe+BuUT51TLGfyxHx6PCWIxh+3syRvoNuHOFxZn43OtXku5 +vvoX1x3oSaXhiVccE07A97gsO28QI6uMZpVavaf1O/7Y996hM1KRIsxOtt5+6I+1yHgLcyZV8E8a ++e4ilerfs/doJCHd5n6TV5ABGAiaZKm/BNX3ew/WO5M0GWv4bE2KNN/sMQpHVg8B0viiKf17wVI2 +EZmrpgPgXhx/wju6yw3u/TODAMALIORHMGgy0fz54nvOy/keIgURu/RxW0udrwP8/kltRFq/I1YM +R+zLSEoGGKqrrknChKytke2c67E5s0mysjyepmZ6pSLlfMGDdTQlghDGstfTLWg7AB8ZHiy6pvDw +WJ5Dm+UUfn8cB1tpGdVgSPCRkOZtbRZdYJyv9iBR3jsLueN3gFJe9A97WXj+W1Ur1D9iMU/bLHf/ +hwtw4i1SKBUXOPFAwPxT7EojkM/JXMOBvh2U5V3uZoecWDtt2rfHWziuE55XMHNGL8JslJm+WtVH +geBo9yfk+63QOeCfZbxQ18ndCAhdDB6HnF1HJ0NGInYRqsrytD9nqbZDAL/zSGn3eL7WdSQVBHNw +RGAWbaN1PPG3j6h34AoE5E2fRt/+RqbC5BOnx7d4A6EXjEQwiaH+Jeta3mzh1sTPPvEMAQum0cbZ +dtfpQq2wfbTsm3ooM2Xt4g+GK/NNC49Dp77/9QHO8k5/5qwlGKWRWaVmxQP0FT6vjvilSp4/97NH +1csWXZg1qiShRIwP8j9CPMSIhk2ToIDi0HVYKeDhZj5tyyS8qCTxE24BpE5sFynPlK25HoWpVAUN +fcb955hEm17VBj8Il6hf3zREoHbNCDGbiOYdOm6vtLyEdcH891wO7oU63XDr1bwi8f6p75W+OqC0 +ea2l8bzhjardbOVTXX9n2oXYI479CVggnel/2TKNB9CQWKAc+VJTib+GaZW1fbvHdfiYXyVBTp/F +Mht21l87ReoyY09pa2sHrcQ5oYOn/5kZKHSnTn48guIOGBA5k21Mij2HtiyVkAP028iUL5Zepvjd +mkdAWWhCc6zJrgi38LVrEfeHNLIOS6vfhDWy8an2bw60mnLa6RHp1RGNeM9MRO5wSUa3vYo8NcG4 +E1d5/D5jv9fAfMehwWkIVcDzG/rByuHnVArswtfmBV37LnQqqFjQpOg+L9RupbB2c3bh/UtUNx/K +eTCbryFziEMKvjsBFNYtK2gtzhGeIypAxk4DnL8DPVimlFcVkGsiIdYkip+caKgrjrqGjkHI7+CU ++Zu5wUpMzZT2NBY3Vujd1vfI7nju+tu5WmD5gzAe4+kr9/jzNQJMyCdi9j8uhPF8czcywgZ0UZcD +80skwTYPhMV0rVku4TM0HdinYzEf73ii2QyZ8ptK2yOoq6EGdQ4GYoRjXKISJOUGzX1KHt38dYQh +Gds4UyJ03+bSTh7I0weoI7DQuIiNhi/Rbl+nQLbjl78vtLxEQynGLSf9PjAVkDqknM7oytTm+7Du +xHlt71FaANlzjRTcra9BO4u2ybgWJXJT/iNIabUPH8FqaHK0/n+bgUy2pUn968mL23FOu83rpC/Z +4Kzdp15jB3I6y37kRemI3MvM3tChQauAiO0Y9mFppY9nyfES0n5Q2ZjWlcbaBTttnDyL0zv1tuXB +3SXzkH1H30IopkmPb2RPfbco0cVbLMUtTW2VXcCoLhBP/VuMcdSaF7aY8NmsKE5OmWT0tFXp23g8 +SSgEBf9De0YLiy34FDVpfAfvm3rNhrfm5T8nEbVp/4xydf5kQFX88iVpWhNjvwpbaQN1V0Z0IvXr +9WRNqk2BNuVBhGAukJQ55qK9uhFoOAyZux3RzjARHwzNKoyzIpU8Letz5u6MbtlpjZvSohmYYqIQ +sq0JBlVNM9JG3b0XZ+084WP5emI+ft25m3IRLNO6Ka7N2C4bajl/6C5xETZYg/sE6oAjdIST9x2m +fqKiwUi+D7HlJi9oIDftPjUowKe2/kM5ruFQBCjHI66NtN5H+jzd2dUzKosdSHqljKrwvei7Whhq +/iXCOFW9WfViqc7f3GSFKo/djcnkx1JO7y/Jl2M80OTw6DUEM9ec09EHfDrj+xnqXGHI3bUzTgXF +D7/m5UkXydC3MIlYaQ7ujnCzQDqPwolpJ6V8W3wecTHvTIr79vItIhSZZGAhoZyL92dVhyo8xRKu +4DoVt2RdHZ8heds8ozXv2NNk4ly86mfLMOunSfmcex7mfoMPFcBtvzmMgzYN3CuNwAuhpatGXpCQ +uuZ9CIXChdMOi/Z1FPVDKwGExofuixDVbUL5OG8ZQJ88r8znZHLHyHfbXRBAJR4fdiHEQExqdfrY +P40NMdebsbklFhh7zVmniKsQdReNRroPMBuV67eyx6ymXU4/s8rtJJNBwz6fZ8+eF7CFupGFAnA5 +4RJECRKEpg0CF6tJyUtz01OGyg8DWE86DR6vwpS9O8Vc9bLfIsfEZnLhN3NaV4nNgIVhqPU2KgTl +Q9bFg+h32jKAQiant/A+Z6+OgxwZFtK/rQlJE6YLz8rQzVHT1w8ADC6p+rXTf8WlVtnneDfI2er8 +/slFhGavZfOr7eOawWizGoqiL3RnyuIcsJMy+Z9QsgRaEOEDmvt0MoUPd2SnfbwFG5cruXMjyJLr +5/kbhAJN82SdgKy1MhIaRg3EtXANA0jAQpEF8U7Uh4yYknYyd6qw8ZZDbBtSQCodqPyA2p/Yc8cc +LJks2yF8JGPltNoltYA8LOkN8Mxr2pcQKM0GZim4c9DjY9xvbs4EUcvzQbP4x+GX0Cb+LznvwkvN +a3KortnFJMH3si/qjNRA5qkGYIM6a7yEPIOlmalUENIDLLfyZfVqDTvlDqIiTEqIrdyx3Vfojixs +qXXegL0WoHR2go/Do73s5QiXeQi1lngY7qd7dyIBQ2LjhKSgR8STXd6nC777vUXhOFItrP4CFEmW +k8efyN1qzics8f0LkdjfjMDw/oZC9Ejdlg+UA00QetqFUDmHR8bz6fy+IQKQ0Fb26w4KfsoNtOPk +XeQ2D1C4ICtqQX9ulFzIEbhID9blSxx4MXVgnRXT0Zp6rAfei/jl032uLQd2F0bxh2a2tXY5HhOw +6b/oKVy0G7+flCkNaO6F4HPdlKJN72SVCiI0jTXXT4ts/MyAF/5jEf00R4sJZNH3XN8MrNEL82+0 +1DEGoATzUA0PtOunMbfiKErIw4nZdTa41+cZKL1e7RRVo3rzrJ5dPXBWF183sEAb3ZTaSYCgz2QU +yhjVUv7LO9tFoB1ULq6iNzroazsBS+O5K32Sr8+6g7t+aRqD16Vy3DeILeTvrXQxJIlyFdqG/A60 +ULTEIk61SuPgMEOnTxz18VCDAwnGt18Pkx4mqkwn9csiN5sNR++DxFvM/fPLstiq7V8XMOo5sRKd +PuczAhAtGISMMYeNOPN7B2Jhbgn5/9McKG7n6CTCN+rgYMS2w1aYXFVktR+hosefI43F1AODPcms +7pDTX9aOWCV97wRiCKWRhY2m6nfhD0ZSiPY4vz+Hg2sHUndD9kPWV3nPsTE3wO9I95Hyzl8pdkAi +Ad++K59fvvNnupAiAGw/Z2mw7MTa6nMG60tBxCs0V3ZbsnjZ9bReDd4G/1w4VjmeTx9AW1UVkJv7 +zLpFNq4jnBExQx2Or9KtJFstsyJ2PcDQlpmy0ua4sSDgwpGlIHiHQkdc1uAvt0LEfjTf6Lx5yFM4 +eDPotkSBFujFk0/9yfa/vJc3L716xESOh/tHHbE9F7dLFOnK/Fb9WwFDCV3v8OaICKIZVwB2vLl/ +5lc0wOuZkIgh2jqDO9XxtYlu8gYZ+BjkecmwoMpcvM5XqRn9xFYFWJSr5lgJ+rS6invlL3+fs1te +S4wVhN3E3/XvMjGegaCjueRcPsOB7R7lpUJUnQTuqqkxco28dFqYvtFg82gli8ISdtfH5hy45N/i +RSKPxteZe+h7IH2inbvcqMcfqoajyR4Bkt16SVJLrHcildKsI8gti8NCcrqAX7wL+6wLmftaVxK/ +cmJ6dpcdiLPW821nHUQ2MBxAAeGdYURSS1k+g/WrSkcjCTJhIuAe1FyFUB14mybdcJ2FfMrz1dyC +UhJM7XFogAOHcChuGayom11i8tjimUuHk6q7p8/vMrps25kcNHxaPSp8HYvZdRZLHpCYy65A3BVl +bnA3YV/sKf9oXJ4IaMJxrKcIzoigBlbW3jhbK9aZNBDSOZi3GnQnBgGiLv3r1nN688i7neVnHrid +8E2Aa9w1qOLpLylJCN7gjI9P0JtghQQQWu/DOqiEIlBG3LoCiHH18meDIEberP1FFfvGmsaJJLTN +cCu/gKCU3EA2qpXvoIGwqr1JUuc23vzb93R2PcoFmBoOCwjtQUwQ0IPddywVb533ak85cUM9+FQe +izSCzz1dQZP7paI8FxMHmZ5DPLE7LO0rNJ+mIUDxIj9g7Xa7v4LP6AVtyZv9ccHN0HAbMDwN/iGR +Ts3uonPoNTJo9VD4A++bG6JOVMHQ4sd9lscYH/TpXrblX6H1y0CbW44juID222UffaR1CmjFVBrZ +vB4CW20gtT/OiGmKn3Uh7ZA33+DAzqTDZryuLHkUXIhxzLvufU9HSmm/OlN1tO8gkDrngk8laQTk +ZAY+WMI5d53d86R6/sFL1rLHL7MSI1gFR+E/gija0KXki8ESRmTjIlm5p+jUCONUQmBixfDGyUt0 +rSnekSFU9ygfkSE5gBH8pwh/Q0ZFg//fvz42xPdBHnHe8lGxt9hyacrjj8F3EN7i4eDVdUNgg+t5 +xT/It2eOSIGzPlPE0/MdFT9ihj9DmIh3isI/7TO+CnBapsYwhiXmZIpttBcRIkYQO2TucoSW7Dw7 +Q3wXTe4ndcB7nc8rznVIbCgpQhaiWJTtAgMOS3rsU4Ll73/+k+ucNVeEUwAV+tdFNOVUvc/6VxtO +emJu5UhJ+AyByVzL9N5mtfiL/sqKTOB8TeO1ejAyzviBOM4Wk0skAFLAGFUVS71P+INqN2LqFuvW +2weqDJmwK3I0MqQJf6/lGWnRPGrI4v5T2+P6hLVbsCvMFc3pMVgkY+kwsBRcVZyqJycZfNFd9hZO +Cnrbr0BB8FjzLarkI1Vo42IV/gvq/JOy/doqlD+lBCeNJ5DLGPWvi9l3ZiO4GJD1Xlj6wjdTd9po +7qR9DxKcq9IHcc66yMJucxpERGccG/UOXNLFzaoerjyzy/aq09SYvB78O2eQK1hQOwAsjpXTeEgP +9XPqnT3SR3xjZc3nRcF3ipF1+VT/QfdBF3FoOnRbMdtcIRxWwW1dMbaDaW5Z0WNRQuGKNAMh3nuM +HSosOJVChZn4nc8RdIhuTUKsxdGmq8t1i39jkvgDiBeQX+vga2hnUi2vOK2L/A0+qcBO3z4Bpnyh +3zQ3KqkEA6Pnkf6ic3NFh5bbu34HGvu057dJh0M3sX0X2uX/RtWLSLtfCrj/monc6cj2AOSvQ57o +KsqvGMvEh8PRGriXewT2YVcIh2wlDYYyUplhF9WHz8EpmiqlQ8mP6TJTwFIzR+wcAsk4Zua0Xf5r +gs2JTgjL7GskrHDf1vQfs+69oepP8TGkADlUVwKhKRFa+XJwqTIujtiYv13bfTTPoWjqf86S7KES +Edb6OJDniAipuzwyLAROBEUR7EZ4sGdvKN9HrWaQLSyk69AN3LYJzlU1Vgfle20TRfII7IreEWkQ +nz99HrU0uYABM1j8wYmlyNWvykQ1Dm3Qw+utRgjwQSWUWj4lv+jppoVZ8F1/NakjFUGOYKdiFJmy +jQYTwZLoDwY3sX/4o5iweY497DNF/U29geZ11+Y7D6DGexcNywXnWz4/sdPvxeEZWkqKYS1nM/MJ +sLmYSGQctJbu2+Yr2Q6bAcFD/ZlmgBLWPlS8RyxCU/dMJGPlyeLJp9IxtDgR8pp6TJqmTZsS+Zvx +fO606dFT7uKtt4/K7bvI6LZ0tgnncwqKiL3XFIlyjQC3GrVhEJjGSD1QNb0P1RuxMZl9ium7FAcq +TUyPa/fKMh0i2yfpaS2ZlW3X4ihneZx1tn5teNEk9Amh97yOcnkJk60pZ1ztmVKy8kdcluynMXI3 +80WjGA9Nawm7OjfnPORB05XLbhcqdrmhjz7KhyANJdKkFtvKynXZ4xPrTsgXDAyaDOno7GK6Tg7B ++kipkdxk1zu6A/EwQ8NXRRXiOAjdG3FwaLB5l+9oxa3PZN9kC3jHylOVIpgSRg+MQJbveiHx5NB9 +8Hza9hf0dH56RbY1dBxJSOiqjtO/f/7zxxezNjEJiVhR8yeByhHnOYpS2OpZ5PZIxmHNnBJsRQPB +ieHZjgD4lRCyhbNQwVQFhFuVJw89GkzjDQ2pHudXDG6+FoC9HVezqpd+064p7+DCHYI1Jyo9CVny +ZxiNDu3H8SkFzfVHb3oTB97aptb9ayqnkyBG9DOvajIcaQKnYYt88okIOHDGTmJydkia+wgpHOAM ++PHrbdYloeBD5ufbNL/dlt6xLTA+e7WY0A1uqrhAMOYQvbdB6jOBVk5V2njttv6SEnxmOJxadUJL +4JD7s1b8nBckXJPOjnrPRnWKg0uFpJ3QWjTxeSkrK4Ww0GJUTtqSsL3BbL0AH8FTlKD6usW0lUjR +rSH8t3P3cVm5b8FMDd7XglRN8a5cZTuW0SWiwU353cBE9U9dkVYY0jCluhtDkui9SpOBHWp3DY3o +3yO8pIVh9oe6yIVl/gTr/Lm+qcDZzvuhTqcC06iaemv6etM+HEoV4H7Xxtik0oR0d6LBEn6ABRO7 +tjp22tSsp1O1IXN5YKSPBPAmSzt3C6v39MRHQjyNIZg1TFSvXvdgGDkcaBvCLunxWeuPbgVWSwvw +kptrJPHvl0mZaFr12rXGq3AWMS7oZ+J8OMX+q+xYiW15ZPRDL39Yl3plKbkHFSM9xUxrrpc10cmn +Lk+vdUJz4KcToMvA4FlptdGZxuLa2NtJZUn/rtLM6rmCzE32exLWozRn7Qeg4m7UhjcF26a5u0KA ++v/eRrsDn9ECf5ib1Yolt1MUHy8LwslX+8mjgyyRxDghK3HujzmllNv4JAyk+ey7jwtzoHy+r3aA +d2WTDCtHEgS5NeE00H6lhbueroXHifLagmqsB0BmD7xGgPTiiwXJusk1gK2156+ybfZ9kjfaGJxc +dkxtlhK7Qrfi2afu0vDg5YDAdLs7Ybs4MLOfg2IRip3wl8paL1uw46Q9T92ndq/gVgcjThlppxVx +F1VWU3csD3dkh8YcCMwOawxcxdOIEaoLF9XghT0Q3VxdYJxfRXyakesQXvVWIovsAlKrGfNfGMPg +bP8IAPByUwbPNokYlyanzfFn3oNTNrLXawrx7BdK/+ZEMyeXF3HyfWo2V6+jcWre8QmFo4ti7etJ +kkhNNq+a+/rgwTUyvxPPcjk7Wy1u/ry1HHRv3A0DsGMMTG1Jl5H3nz0ZdslIDk67I2eSNA2Cndo2 +XA9c0boYjTABXzG9EzWat5FUlbyD7vpkjTRFyfZitmrl3Fl6OUHGNNJkiGVsg36YlBs7OzKP089i +kyQ3fJGLfxy8qYOmDN/vxUq+Tv7G6KP2GTCZ+VYQxMuEHX+flRMn3nJBsSkTGQWItTkDwhhHXRvI +eBe3wMlb/SohtK3hW1/bcd672l0ZAc+PnxUfiHfbtsRlHJPAXlaeMP3xEF5aUX5GcJU0Z7OBbZeT +tVo6pXLsiS3i6KdaUlIPcF9UGBGVV/PWwTUJB70ouGAM2rlOeT1BoMIVhgS0uCvo4gulr6OAd9CS +pCAAnAtH02zbjG4GKo6KAmJwpfGtUZTGl3rRXuKCmZxOQK0rsw+F4bZSOq7p0rg3wEqDE24aSlr+ +i7VEoHDXd/xjwr+3G10+OngQPtP/UL6Kdrnm7Jru1oxFMoXUHs0lLHTwZgo5CvqKZ9CK+DXnjmSI +f/QRv70O6VtCc8EQz7RtCJcSdMyqpoL7Xu1zw3WgMBikCVDRgzzquXgvAj5X0k6MNlJVL7Dk3OjG +e7qTx4l+0weUJd/9eZTGSFcF4Rf0DmQrskOQidPNa62zvXoWPpQdDszLT5wbxtsvZsWjPl+ZgJUg +60gjmwmyJ92Njw38IsLa3ySbSN4uzzEDVYvXSrNFKY/V062PCorZZYk42vx6FadKKSd0F/9+syBq +qwm8eRd2n1pr/FtAL85cD0gyGgPZGGWKbgfZin0TeeDJ3p9Nq0cgip+/xp0XzUVzmUn+aorHkjl2 +XtxSeHY0Z3z8sG3VLw6YRQxML2agJPjRGWytZrkJO/7iEHxd6XSm+7ai1Niyk/JhAWOm33rAGF2x +SAm8EWXLCx15UycCfX4OBx93DkQ+umpNMx7xoeTGw1P9yRX33R5FYY4tbLOSz07mG1EFM2mXgVOs +B3k+kGzWQFR8ynSdSbpoMNaqXiLCPCrK1wnhwGLwnAJgUHlfqbN5V/3LFpkMecEDw/MBn47QjIrR +5/KErTqED253ESSUweCnf13FXa2kxd3lMaXpFZXKwZrL1CqMkFFVYLCoJKCIxXvO3aw3kd1Ze/zb +HhWiyStIBszfAsf6yJW7HjkndGetu0wqpvBOuz+icl/6K10QP/JiUacIr3+ebPk6bMpKeLhVkwcR +ivqrzruDONpETdE1kQuSwrMg7PUOJZ5Ncsapay6fPeah/bPYlGH/lb6bjXw8na5sVovZqXwqzCas +rnPMQzqYFBtdBONMufMZyRrTa8F71/C1tyrLIlgLCjPw2l4rTgwta/vbvWk/XssBTd6Z4qoaHfbb +ZpwpnZX4gCIw9mCF/SOLQ4p4k9hwm9Im82QbMtmbRTyPxzpOKRl+E9IGYVodevaQ3hxZ0fK48x+1 +jmLRw+05/wTEV6hKuLKd/WDz0Hdc96spMpyCT98oM3BkjqPaRAI5Jm+Ctk080yJ8N+LCnpE8eFX7 +4sD8CKPjQrjlhz3SB8kCIKoD7Qr5Ws06GZT+T9Q+hbricK4qhznMEeGUQbrRGDytC3TYYzkjZ0F5 +ikV8NXOnbwsP6LwfoMRsEFtTq5rErg/EAY+3XAaS1mWV2l/+zAptcJTKfbWf2tT6IDPIyzIfp4uQ +mbgGv3dl6mt+943zZlqzRiQ9E1Gs4SjButGXlnsfvg+XNgqPlWErcAG2s0vFkW+Zj4K/f502qPXg +Hxpn64nsVBpOigMAJadR/GL6fCVZJqCTaAnirNCHel56LDvNrFIcudpp3O1DBnsW++UevqP7QJaX +zIvf9xDJvXWSSEsDKi93x+mpQ40Tgs1InK5U5IBzyU1NDpZ1MtvpGGEOYmyekp3HeCow3t11CTj7 +mTty5mwPX+TgRL3rQG5EGSN/MNZw/caEA97FrJSA4ELMNseQdjoofISktRQ88H/kP0RIwMo2r25H +/6OPiwBKv7UQKnFK4JYxhTOpdDd7LzFoq0z2EWklNicYJPNfz1iD5ulU5BLM7QejJxL2Kp5s2pns +ZPr42p3zvnvwvlS8EAH7AQKMEFLJL5U+mIkCgX5odAoUQDaT0t0yZqoBOFOFgI3AODDOZdfdultf +bA7Hr+Os/QEla2lJS6UScDCjLSDFF3RmFuxa5mAOxptpFbW3PeuC8t0kEP5SGQTjeEECWnFsvnI/ +UHzG7MaMSIB+h6AX6gGOjVZN2eiF+Dks834kUFeq1gcTM6MaZ/hs1jDrwD45UphLTMfSMjsCjHqy +r5PekNFkMQ1pz7MCxhKuBWtJNzKSwtWirQQ8GCw+7MLapCKcTWAPItZfV3iQ/trsLFyX9JAZyk3w +KwEqbE4I9KJaoz3xduG6JOB6dQrPSTKhdPGfqzKDkgawsGm7vW9pOPCRTawJlq52MVS02AkjfZ4+ +oiXcnOSm7Wo8uflnItYqVZFICNb3vEpBoIWTd7gBLq5gl1MOLqpv1uhZ8bmZmYhDjNYtdrFmfiik +kN529w+eznUHg2K7tpXzlrm/P2UlZ2isMCoXL3hS/er7iuBqan3EjZxV2yTaJzuHaPHiBvPWVL/V +m/VicFdcEJVYZqvTxvKyzLB6pmG7LpJ2phXEzBv8l3w8t6JkabenpEtioxuLZ4GTOJmx6R9A+UEK +dLMiSExIcVcG2Hq3Z72cAp5YehjteVcM6Rp7ym9qnMYhkvK6gpJx4H2rM1M4yu9fkux+qihjoPp6 +Nt4GZmk5j2+nzuX/vpGH23BRDM5B0jJiqMnWX1nFHaDClFdEhRwSRs5mgQJatBA5j1J2J+yYUvDm +2+s8i+kk4CebBWftjlULwBp2hPkHtQ2L7invFz2MYiJOsDQB4x3OW/tiFIT5HpyciHXwQNBpHnWr +rqwgJflnbJPAAG9BoW/TueEZaD/T/AqTT1IA9L6rWHOyJoEmLPR28AUT8E3OUwLDwKvEAVJtPD0/ +GW68ksSA03LbNvDiVHpkdZTduvr4pAPo7TjIDRDXa8e/z48+1wQ8NoLBj5i6ZijTxO88gwAWHN7I +Q6K7jXvAGs78QB5QhiOvAa0GmChGffoScATXWFpbxibgmHWH/DvEGhte+0KuS3pMpiGk77Etw9D9 +A8T10xZrex9jWA+bCX4nuDGq1jbnEaLGytshbPvxhQ6XRYif8fRWzBmzjLhXUThLZP8XykNPUuwP +qv+VilTXXskY5EPWO5+EijnhYnPIGlusY4f3d+NtcMK64JD4b9B5p1/pNOMwb9KYoaO1xWOvH2Lp +HmxaMMqRC43QdhKedUZD+/USJjk21S+swgAy5MVjGqBnETCp8JZ7bD7/Sensp2MGsrnt4LuSHH80 +8nAOYJQ7X4f9TdVF+qz4tSlW9oFiF6WbCgeWok2gYykdtPDJwwUbAmbYBa76AAGSRjA9gYqbEfBs +cTN50p3cqRjtV/wHhpBSMe9WqFyCpA7GWQ5Z2jKBEqb6Hds1HkZ099x9NscQ1phZfXBz+VLKj7EX +BLMjZRxD61Aw4zqM1pzuy5uNOteFhEZgYPEtkcIcrddYH8B4eVPHVtWaE5D7UrceoqekPziOgPDp +yG+t2x04hSb1nkO+yuWnWP9Z20F1NmRY8nQnGG0NCuxOafdFP2bCLlmQeLNlQAPUxEWVzq5QG8M1 +dZQItxfcfGu6ZCzra7B0k9spQ/8LQ86E8XV8gm1e7H953HhDLmQqM1UywXqTdgOkMTcVVIEm9MjV +2e7byN8k7Rv12doM6BnV+1E+ZSTbiNZ/NDDyic6bN76ZBv3k4J/FEyWsLOBid1zOr8jaRl75beiH +dH51c34N/h6esji/OU1xWmAsNWdsvgTNIVvC0islnmIEDGS8BOfPR7hrUyEYsXcQEAEEMBYY+nvQ +rvhC65MJCv3E9mbrvhqKZ93P99/vpTjELJ4EA6ciADeFY6GWEPOMhKhFB7HazbWiQ6hOEtgazdX4 +lh5OHYqdpguoL4158fnJVsKlJjLixmD4x3yGGzhpXji9oCYfWeMmv57BLHOT4/bpyxTMnV3sIFXe +gCnVtlstx1NpDrgLxQjSLeV4Xa0F7Z2VbVjOn5mLoiHjsNZi3BqUEZFhm2Kxg8jIHlu0xOF83lDT +NyKiVjmYVrOuuxDA28QYaQDH/abO8uzU53V62CCBlRef1gO4EFsoUu+iXhW1rzXD+YQFEOOu60iC +1T+1OQjNmZjKPDSYtR+6pHTVdhzJ+1FeOr6PL8Tb/oQlBcauL1XFZExGkenQav7C0UW9VpBeIXhv +bTnRs9HqbfUdK4be+/x+RZYnBSWyz34VwZPpDHVWgDVoQVeJ6Ciikxvbm7Tw+hyMNJ8q8WqGWBhq +lAd2+2TgRcE3Q6dUXCEhc18e25awJHxtf8FspZFqhf+1C45okwO3fLLMo2MxF0hi5ELlcAeoIecl +IYGEv3xNtuI1WvHRqQdK6lqrdL42jJE/edQpimxBy8fVmKuE9xPHD4dCkLKJMw4hnCvYINBMHN4g +NNV7pdbQtAzf1F5sI8iAehrqx+5dFE54E3MnFHlCFRBF3KUGxgW+qMAu/zklrqPpgIrkrcH6S5+x +rYMhy1QhubpZvNOQ1YfQyF6SxVaDOBGP74f1BiKT/gWIumkc4stKr2X8cJuXfH8jUApqd58suhsn +cTAqdmHGqOkrIQcBr5CAA5x8ou7vaUJnCqWYQFFr5FbQs8tnioVxoZ4knwaZOF5yS25CFC6R/Bcf +B8/0acK8s0ePNc8wW1zYm52cYKOZra9yvDuwhw+dHB01CCxRMlZzSudy1O1904ZPxeBE6pzBKeY5 +RH8CgjcQI0cij5tMj290v8FeOSS1ydSBqhAOvtBzscthIV7LkHOKfDFuWsbEzzl6iYoofSs137fY +6/meRonpvVrPnMxp1fIVa4Q0602dwIYLkGCVzZishSPkzIqWss56YnnvyVYhwShAFO+ClJzpSa48 +ShWsctHPXpTehZ8qDk12ZJm74P9ziJpv6Ddt7BdGbiuKFT1Egd696tVJi+K2i6dqtOGau7+w3P1G +iMfOwfd1l6ZjPc6uhtSq+tszmQg+6M8fcWZBeCabPCi8ZHcY4g18/ihww2w3VkNnM+bPMWGhP5J8 +HpD89HW+UVv1ThUApr3M/oDsT5uw2NE5FPdob6k3DjFvxuISyh2WuvLHZmcf5OfoSnzQ0U8q8xlF +xVVeSRuIHldF8V2osDrEf3x9m42CxEh03laEyx4q913J0hJU8G2mE7Svy5ViKtYBYLrto5QOgZgj +SwB49k7jXmlx975eO13tG057+GCLnWLkPJp7i8yIqTDMQ2g7WDT4c12aGzbeZlM2dR3tCyboKi+I +jZZZGNKuG5sgxHwYDuDjIQGAj2SlB43CKvYiEOTvkCepgsm/am415XbRHbpMdVgbTbsoYR5jD6tZ +Tj2Rfrbbvu+mXCM5f+p5mIqFNTpFFZE1/UI0QJ4qsoa3t2sL1nH1Rz3gScwxeVgs5ClD47/dx/PI +NPXsGemgf9YzKQ26uhnACcjVZXnU5/8ECo287whL98AmB2OF6paZxTBVATrj3PeXQnE4Wdjl9xca +TAFjZj9DkHRX12bA3iU5b6PH805Q93qqk10RlBb445osJdJcccal+aw2Bv+bII2jNxLp4woej9fJ +SwbrYR+I6lU5NCTzUZTQVKP8NwMaOw8bqi78GjR+Wqst4LAnm9CiDl3xtjGsw7860zSvtnJKe9Ca +7ClSnueDJOqIFwPf8YR7oCgoEzxcBAOeMQDoSx/BUogu693y9C3tUg6KQl/pVinhqPL78PW7vxOF +8tl+3vHZ+tjDcs29q0xCz67WC2HrzhyINGIWw+ETMUxTODzaHsbhxSHEwkQgrLI1ZFsfrVbbQZbH +el3wF3Es4U8rFp5mSXrwLJ+9KXr/YgZ448FJOrslkoYOyj9p3dwfN07tZ6NB4dXgv9K5NciF4GtN +9vFE5/8/Yp6gyjcsGq8lwGcpVGSgTrHgnu6uuzt6iTyxPOxxP+pgXB8v6v8PPOT0Um9tcmNJutDN +ZEoDxvJO2LyvF3ksRergkr+3Eto3ifHDPuge9mvkIxXT++Yqd6vXMjeqHlxRLZgIHwcmUKKMZFzg +fXlhzAt2bd500Q7bcvqCGB9dWyulof2LxtkeuHvZzXuapqElU3l3MQFeZu+JVqs6+jgd0Bwwu3kM +uUbzI+g+1qV+KHdyPPeANJkFG0eUaXWPZVFORIZGh1w+wQ5iwx5F3RBTLtojlN/0pYtWbZCc2Shw +hjnInFVFdXhug8qtRhJ3lUHQHX91oFhziAJIFPUtTDbPgtYtt6BDov77mrGaIxIOCHTgPiJt9vYe +lf+JpIgPfzt/MuLs49Y2aGxFA0P1ii751j01N5PTM8Fnutn6oyjEI8bIbbCCtqKK4b8++KtyQBtZ +Dx/CeeOfo3baIQDA7oMMtCHczAEtaHAWVYinbCDMWNSpHUvNtevqItwNlB6sjiEO1mWcMixmiJQK +KI3RaOvq8CF+bvJjUHl2qmcLKonXLQ8WmonliUPmIuoXfIRu0UyfjHjDFYzwmmYpdLFRbytu1V2X +lt3Ith1HfYVynE8DHzb46jMd5JxEV3pYCTs1DRg5NnChrQK9e1hZLjK7BgkxPWH+XeYT+isHtUYM +sq0M5dXczSmeiDQcFECjzA6mhra1jtkOfCKsVzf2x7QX1aQTIb5vpjV/mkxqmsA/lYL92zija9z9 +Kf8KrXa3AizuifVlvxH/1Hy3Ru8HYhPlS3mIBJe3kIC/GaPAXWuAMlVFlqKOCLXIL3/Ib/2vkS7F +ubUk+iQIqpd64mjyZYoX2aqKEmQDb5r148vz4PSPNT9TKq5qu1Txrw6ulgBiuudCAj5ANyY8CMdw +Co42THnrjibxNRw1lqYOK5Q4G6DFwHseDnN1DgTGkeeOpkyzI9096S85MTC9iJoHMH1B8gjRzGR5 +A2DEiCHR0I8jQhsYa46V8djvy5qMC8veQFSs8gIpoYd5owuf9lmyjnIgBBZC/rdKWlq8GgFAV2QC +aSoY4tPIpOAWyCSuKNjJiWbZuNZbMGnva4TDddMrvxex9vEM981ib9EcvupIFwkOQBrlS1TRZ4Lf +jRytzXVGE0Ex7h1LQb60dufcJ2O7P8a3BtnwYdjPldl8GrHCxjfBTW5aMNfKv6uT3KyPC/yrkigM +SOE2EhU7HeLYl1N5o4Tl5iEXZLhEauqph6BrwwpJMU9eePRRpWeV7qK4wrWMC7FtMa9g7cvSDCuT +8WYmvilfpkBw8QkwQlA/SJLOeCp+f1pZBmIVw4C6cK3SDJEr+5NA9fpaVc7JaT17I7CO0AZ3zrrW +bGByMv6gBCyA6soaIZYCA3JU7xslBmN+PGPaTSyk64H+V+dCL1Ww41ox22ai+5/avNFR8YF+Vvd+ +qdv/U49BhJDLO0UAikx5rYZbL1OR/3WL/Rt34hpqgwmjAAuoecqqFjvKP9Q4fXbtZ+Ep2QKSlwZD +5aNxBDDme3KW+EsJZvp7k77RtWsdi3pD6x2ADvpicgaeydrkXxBS87LbKnG15cwUakmDyQHVzwDl +Wn97NO41BhH/AUoX1/MjWsxzAuQ4Z2dnYqBWj4txUiuaJX1xoUwcPpoX/1ROaNBNv4nRqW/D/FHD +3ZLRwYn/XjNkpLzdgCRPNEWiI+VlNXAicuxyoXDB34P5EOJ5JtBddmJcNmul9I34K2sBcSv7ibzn +yEmUoWS3bKGwXoFd9DS5pa19JGP+csGfRy8aDCjLInxl+ZTMJYJqL1WbdUu4RYHWrnLX2fPPZesH +oqlgctzGfLKaG/kKJGHIi6CHFf0O3/hqG0BaSVzSifC8DTpOtRhuRRj4FU5tyzpUjBWZmNwmYO9J +wDMtyFUaB1xmoR1BW1r16kmUE/dwREU/DHZLFzVRVmUlC5L8mCC9Y8QwShaYaSlo5cOPWZ4O2ftx +wfMlbAd4/+QnCPLVLIf8X3ay6Xax1AhNnC4P7+B6II7Jj8ABFqZr0aBK7wlBLjPpZo/rW8RzqiMF +mxTiYEH2ss6UJ/PB/ePHlSdzj+nfmRoks4zACL+aVWBH2CwAlIJEvyG5x9JnuzEtgklVydH3pzjf +QPVWmObcirgC+88B+vPnDeSRl52QTM58M5pu5yjXoQWQCob9ucrr0AJEYPKMVrBT4s6LYocO5PQ3 +aUXAue/XivpLOA7Sp8GiEaCyETLM7wv6cm2xZI/YP4cEcJ3GKD+StVXqBoTiui0sV3NpWvvLhv7m +GXIicd7AwdDfJyjN+GmjDNSme3Ycd4xf//Bu+YmX2D/JrVECBuXz9VDJc6l32vySNkKGs66o+ZR6 +keKdOVPkfxpfFPI0dXz90edFAz5m52NtDyQ0JdpxSSERlClu0e+SpQutb/8N8UzkAem/WgJ5eJJ6 +Ki/jMvvKqMp6+WwaiD1hd9e8aCSYDqqLCWV6LGCVf7sEz3okj8okhRIgyDHPgaq2FCC6Yu4yPnXW +5vXhjnPioSEVxG1vfcbClkrmGbIDCfhy7ZMUC8RsB3pjLWWAvwaSPhjoWm35OdKWHr0lKrFS6zDZ +Y0NwmxEwpL0pbBEWZqGCTFRYKkHDFn+L9bsQuEqn3HI9NSSMmyZMas+PRx8mwxHkqcrGz0qeEVDX +zuTJIUqbH+xeyPTIngUow7RCEIkLMf7g0hYtrsH2yJQBFz7jvj5VhCKf09G+3508gUuASfrmn0nr +3/Pw8E7nq23LQUjVOzpQu7keOE1swi3cqEPR2ukpA8fOt9YEH3J909JRekQs9NpChrhT07B4NH6P +PgCihlUQX6Kad3FAtUyMrixhmD3i1VMdLGKcMr4vM4CK/E/L7+ZpqJZhik94KKdU87HLHhyE4VTE +NxlPaFh8xdunP3bsVI4ry/FVFw7+VCtmxNAMWq/DcjoZ/4VBVFzgnt92YKs4wPXqj+JfmP8gdz3T +Yi0U5WzXZEhPhoT0fgLMopCVZgq9iMHRAtQgomJJuqlhZjzb2OsSO3HdZLsf1xKahITL+vIMyPGD +J1iBxInmb8rcKkvhqpnkU3xxlGi9budw13gxWgmK2C/48ZkdIqR1o4++vUce43GAZSkjJPiK03hI +AfHdFtNTwYh7spld2CzIcryIag8lWr19AyNMCrhDWkpQZwa9DKx7mVAqV24k1X9HIPZQ1rRVnXNO +opmusy1mLtw1FXSRWvwSRdDxiUCIOkLupLzSowVJAR5cMqPMaFav9MXjJLQBvLwlrEYgR9ey5smb +BLsoDNe8wkVe6a+nbodiqRpZLY5PJP8/JdobCO1LbXq5cZANwJUVfhPgu2ByvLcagnMsS0W2VG2U +tWrQiM0kaaR+YTyNDsQzfySC/itoQMQkXtlGIDZ+P4Eqg5+3vU9yc5yxIkRgovbFC5g1dkGDGovU +FnsqxN8mE4IAI5EkrKs2LyQkhKXLNd5fCUgdWYl2i4dCPAetJPbVleXM7a8bp4kgp3cK1wFOFSgJ +1FDqAkBHZgePpXtErNvBZtgy/2wn2nbau7VBkkzWMrLWg0hH+A3y77KPJgtR4fEPxos8iScJahKQ +KbbAkIgBA73Ady5GFWAw+4ULXmTPAH7dYRWfQy0H/d+Sdxt++luwxF+3actiL9BCxaJkSm05L3de +Zu8ToAXP1sw4XhAqb1ApEKckEU0CRPJYqDtToRf9oZEtIaSNif86Bc/9xt32C7BuY6Kove886CY1 +lfWr9e0HrfhSH3oWBkGMsT7mhAlBksXSsjIiG5PEHEdDF6gzoJr9Q3yc29WCx0r+3H80WASI6x6v +adHxxDW01kf5Y4d/wuL/sGQjVLduSzKAFDsnoPVN7+h8tDF842k5rfUzjosuei3qfMpwsIWa8prt +AFWibqFbF+8tqLf2GuzkktmqYPOFpKt70gLcAhh5ZA0gRup8gxzhOlePvJh46Ca1tf0Fw6qyWcvj +ubFDlVl4kIXePMaJSTrrdlW5p5uNwYb0JeCm1fxpfLIynZ2B2AA1XFya/TQeAv+sb/snOPmfJ4p7 +RApoPCbb9Yt2eMl7xZuLs3QxOpYoIm8MWUZ1nfivsSx4DktLVS4wBVZLGEfjrhb0NWqbPmQ3lmC5 +B2ztCY6MqVF1nWyr022hoSCN4Yh1gHn27NEvZifAhmT4CUfwRt+mMQHeBEOmTipp0QCf0Cway98d +CqICRsOuEcJGquCedRHK5pDGaRGT3QDFGPRZRsLafn3lmA2Qc8HQ/r+iGYQk0T8ZgN5if4XFKZsp +EO0L+2wPAfMCnCGIbPFL7g84Do1LAfa0aRWMjKblL+vwLiluY/I9AEOEWDSaUQTgjMV6Y6EFettf +ee6sLrOv3swfkSoZA3jZiI4jIVDvfHGOn2//v6SoBwvpV1adu59FmK60o21WqKR6IRgDpmeznG/V +owmr4zAoqaRoHAZpEK6EorSKVTC5Kh5DTGFuHuxoBy7xByMPPmBj4X4I2nb0l7+n/TbhW3oFn5LN +AAnPXwbdoaZytRUDER8O/c6B6ghBA93QvVFklm4dYaoZfO4v+f5yUIYEAefp4w7RgM3AERIpj6X1 +Gb/cPERcT+E2H+GSYNVFKnFOwNUe70KYj6D5z+7LkTv3hB9BXwYYSoTFVq7OP6CGvyGL3HJlokjO +t88axlA4d4skRGl23U9sG/U2LmHwiyURzaqIVxVKnUdtaEN2DZZ6potr8+n7p1x6LkUml+D0XykV +WZtstgj4ko8geramLza+oLU4erLCtmmTFH6Xj3W8TPRql8W/jyQKbRNMDez7uPEXGLcz0I62gVLV +JuPE/tXnhlU72l8DFaZrN6v5iApnRnPKD670egxGQ5R0j10iRKo8BKFRZlmpc/uU2gLaaPa736uK +r41D9+B1kCTDpL18DAshjU0B9d4EfAkOdNfztCRLdBSYKNXVJs14CYQOgDSNYEcwXVV6G8/1P5tF +QVkmcxwooLgcKtvOZkEx3nF73nbGmkG7vvWkadc56htGdCt8OS/KSTig0BP75KEQusUyI0SRxeWo +fa/C/vo7dDMK33et5LMo/1Lpaws0f5EE497LxTd52L2bK80tz+020zgM5/D8NwFwSdUYLCOa+cF5 +jt14jGsMGh5CGVyasof2q6Whxj+K42dCZ418Mb4Hw91Mpc7grA917VqBopypeAaVK3wPs4jnxtkK +MNeYDjDoA+hDRt7gMqaL7IM0db0GqOy3AmcO3Fv22zCkppxYzRdnIYudkTLUQsrolJXq0jY5p0DX +qhRDe6UzGWMbai3E8cTA6UDZvpnHMP4Xv5HnjNyvKAEtywEA90WJwJ0fu3d6hAIzXsYM0GJU/Nee +uiyVKO8Ky/1DmZ/IL0Ck8y151gDaNO8mhV7u0bpEQaNhV/sGRr2cNll8KOJRNg7CvG0NXJ7QxiFR +iiGZqIcJSrLZTc326KDI96nckvavQM2sBPu0I4uEUcBmI/4LHcrz8psjSgKZ29iBr+Vuh9NjySKj +RnXcj8WUaGzA3eKaUd99dRok5MsP+l97DIUvd2mKvIzNcVCJ/JUXrg9DMQzoPhUFXImf8OS2Y8BC +/ndXWJw+pzpsN9nXefGDmCcx6SrEUbkAW1K/H28T4fcStGRAe9WdFB6rm1dPzIG/ofIXLwiBQ5h6 +cSJ4RCQ9pMLsbaBHocV236J19p4IQNmW3RFrFA9JzIIQcwHT5AeSErB2WkWvXlS+ARdmgzo/wxgr +N2A1Rc8g0YAn+rEOCE+TapYp/4w2k7/qkvH6KcYaIGcXz9uWdXU7VQl97nO+8MtqPq6bNad5TE7r ++MSbJxeZo1jqBEe3EjXUMF+7etp3/PMushswzrF/w0PaOV+JuWdyj9e/7QCZpryhRbgpPcju2FTn +JUQYi2kGhUZmCnJqDkjoV7pX9HhM8Dd+Ywvp4HjPz2Wu6+N8b7Q1TX6NUV/1olvuodS+4VEizAg2 +VatwmVYWhPux3DhOpHWVQbeg3zK2/Ax02d2E4Jbn2+woKZ7AmQXTWL4IlN9EKMQebrXUNIxrMe8A +/s3r6URQ5+djD+UN0Tt49Tzf6brqpBmx5JJXpsGu7kFVLio+AXOqep6PLn4R1+T9x5ql51XxALgs +MILTmS8Ngz8pBIbSCOLcb3dvdV444+YiHJY3r8XQ/VFP6JGhK4gAHfcqBelJfHldMIGFmhRlybLO +Q6s6TK9FllegdsluUo9n0F/zjOhOy6NUYISmeHdtmO3mZvGZb+itf7f77jX/AozrBptxX+QnaVUZ +sXPcRQii9yKVtcoLtXXkjyRP2oT7+vj7hgTZzWcQpihHRZUYg66cTs/b82t8XLyeM9bKMi5XD2jR +kAvxokZ4A3cTaclIbgUdrlEHmrTeWozZ1W+KV5e5UcEcKyBvFFTT6zxJ0JnxFM3Hkd/2UfaRPWUy +ugC+awMZunoe5wmNxgV3V1V/OB7fxMOEgJgMOUI2HZfVT57LogH+a79Nxcvz7ftm61NCIdBu8WC8 +EZ2DygcREHQdisvGl/LRUGM24e6pgt9HBYXkMGF2MSt0MEzknLbAMlsdu6j5mBZjaDbwcOQEX7T8 +8W369rxNg4fxTc54Ng5MCFSItIoIGkuButhd+UjNN9Ay/zMhQTO/e5YhPStZS4GLtrpPKPs0It51 +Vp3gLzewjt/upV5yAy3t16UqnEWg1DY9HU+QL7+cg6yjIj3OvW4jUHl5PUx25NRT/Hki8loQ6Oti +mw/wEqw+tTE+ctgBpcUUg+W/gVDhu4bNmI92U6jS8pX0k7F+z87QfU0vf2W1e6Wn0+u4UbRAytQf +0Oz+5FRoAOAgzQD0kCrzdce6H87lNnjuIabWJChcLcRewKuHvurB/fmifLHvQtokJw7DPeThWu4i +C5FNcODsJtAfrS6GtyvAloDAVdn2eWsBszc8RnfxVAHO87rzZbRg17aPexHoXd9u+7KrIq1WNVYK ++fi4WUwo8d0gDAZWhtPlfrmjt52zlhGWKc+d6syXmvfu0s+hPF1cbpzqqNGTRZLnKa5MjxrxBpEE +Jau4qxj271qLxP8GlmSimVlDHKFiQYyILT0pjXZDza1BXz3gbbu/zszaNVuC4pxO/9GlZE+FTbBz +auHMVBpmJvlkiYTnkKZMHxDwph8gTg5SKhDreAV02FtkubCCGz+R+LSuFaWGEMqEeDpyYDYjnLOb +7+XXZJUnS4/gedFLq5dAhQyy98JpDVzQcJl1huUWmW/Yx4k5bnXtyN95qfkVF0xfRqtfLiOdwcJg +K5Eeng6O1Mx5yN2nRNv18n/4pz2RMmZotdsZ1KNPmFv3Xa/7FlBtOiqpWG1dKyTaeEhilO2BHItq +HVxwylkb01vYc8cCNmBS8c2b1sWGA1Bp3vTpVrgMcDi6Oar0Tr7DmhMdzsxsItzXWMyJNdiHz66E +CXE0W2FVuPTRpZgN9teCDLmg7HTd2j6V+gW2H4pIqjchjowOpNgzKK1nP4oZUxiLCASHR2v2DiLA +Xt+TZ2ybtNgSUrrbamQIrqSXboIPBFBX0K1aDR1GZYRcW05OVmmcv3w/GBkKi5VU9pz+42i0HWEg +pK2iDs+9qgUeks0oSI67H/iNSLOwKRbpsi2FhSIsslhRxzZybppi4kRtpL1Rlvjfm37HUDwKvpfR +l3g8EXhfvW9n0wtqyve72qhZa78CVX5wZn0+7w4rqstuKhvq62DYw4xSXGzrd37ZtQAJPiVzhACR +MRq7KY62nyh9bcQxN1VMVcSdRfLAnuE19pMUdjfBLse96NXf/zovAQJfhRNTxv7aRtLdsMUAT9pa +as7IHbnFXsqs6XaDNrnJgTC2zljyr3kZ9ni4YREPneWvEmYS5bNV3RVTr2RzJZUlb7UADsVtSbLP +zK48qezqudlJo9WhxXNR8CdMF5tvzb5MgpnOeoow5pX/XK6aazi0/UQzFPOT6H6f7MtsOc4jQqv0 +WBp67JopMKUl9yAdiilleNQm5vS1afBg/tgKognwWUj19OAEtonV5A6JHQnm6nLjgpJnKSAK2FDD +gG+MeUij9wFPQMGF/YqR1uXm/4KnJFz0Zj/I3aRe9JmeEGBp7OlFAWfYFIYBwFsKrDmqU2c6alv7 +8PSmnNodmiNeWjjBnfF3zTLE9n7geSmuecneNL5bHkyDa6i+hKzMM9DNUUq6XCIHw0r36oVRuHOl +1G7SYVu/jQqJL2r8/ZOURE4985830Eu8PbEcaovfT0vufKNyj4Qjqt8iWFzQqRX053JoRh/GoWbv +wvRHHQdpZrNzYnSEt4ySkLcGxSa5WYC8QyZ9kHI2xqxvDh5tZdTWl4Yw2yjOFcpjni4Q+banqvNO +Rf4jCjk5DAAx8jmyUhVgHw67/jX8F+Wt41VuOkFoLmUU8zRS9bCX9t5ZYw5eD1u5AmkQy4eVYBNN +ZKAn2Yhjm9mczHBJX/NTpRurVlh272wMbNwHLjM8DewumAm4Gx+en8FgUn8PK4xW9IQAc1H+PvWO +lFf+mWR041EzpAWajxXqlaWb9vayHXrq0i0X1z5oatAxwG7AwkqdeAYPrjHEuJclFCsb2VDzF2mw +KQsHXmQCFPN9Sl7CPf75xMSwji2NCCa3UfHSvu1dooxgwnu8MUtCjeL3R4x3fKXNZa8dM1OMepv3 +fyM8y6/2pytgLaIbRrrub68JcnvTEyaItfQEBQavbiu4tPTT/5TRDwQi520Tpuaf8wq1vJUEOjBy +Zy/NRM9/EbYDZTtkHcEoEAQjqMU6JnJmyMieq6e7yFdZ1xERZtGVpVaFx5BSB9qy4jia/cBXaaJq +qUU5hNMx6Z3nhqkwqe6Lzj+Fq5mNHirHdOr4eS2xaW5xyncmC3E80c63WqQlLLE1Xf3LzDoYr0fm +qb73C4F+GaTgXldrO1DbwjIkPVkhGyCvVQjjC7a6sC3e6XJ8M+87/n8Gyn6J3AT2tZXU/cyTnBQP +oIvKOm4TQrRsJ1VmqDDzh17GvA/v/l74MjVopJCg5hbmz47rmzaQwaoB6i0GEMs5bmku16FFEOEa +qSs55ryQ6CDQj/xy/BmASl+hrH/NayC5BPdi8l0/2T0/l7jD9fzihXCytEOqHSIC9OmgeXhpVAiR +mmss25U6OWJF9MtmP14MebhZdt3dZVl/RxIwIr7LHu21e2iUp8fXoXrCt+86wefWxzcyq1eAHwY0 +hoVuQ9FsQRcjHD1H+iYhVhcZN1W+ynn5GLIMM63fWmz+xetnQMzZ/lld8NVZgAYzWQpyp8TIVYMt +UwokcS+4ffUsOU/hj9P692uF4qMYVx5QF0hzcnobKE5lSC+hRy2/jjk/XY2kxKC/Hbkb1dKkysRr +G3RsO6TWjiUW6g3Pv5aMzrncjrnTtQPtLxSnbJ+flt5HLtURleauAbNBacvbFsQh4+S5XNDYAyJq +lfk8kFf34ADpwqI1HOEJ69mYvUOJORKPHDGN5ZAjj5EVRYba4LuhcNqkW7ao2ww7Wp6kJCa4CM5H +C7VsXRHYcUI/A9j8QTBNE+0vOXjUlftmkLUtPJvdS6smN0QTZF/K0C/HQ6/kx6Fq2xqIMApItH+2 +jf7U36cEtCbf7AJnqbvE8/mquW8KPa97lKye6AFeCYtnFgtd+BaA4sgLSXfV6kLUdBOpZgBy8QcH +fFEPpm9IB5gRTqqhClv7S9moQ90Pd2Wh4dT4zpGzJeyrQNF/Xwy5ZxTkoOToUGhqf+whTGAOBWWF +uxDaCVgcH/O+JKTVZxeSWLpr/tX56SmxETbiscoCHTjOBWcadMNgPEYCORfZxXa8tX6BZ9ysR9aO +G/01PUTsj7REV+YCrjuaDerS4kcWrwjmntMpMYI+Lw5CbvKYsFHazoITLQINGjKF6FDgY7Uip9KP +HrXuKbOVV1MqOahQ4aCBFULdobRRW6ybFhmu5+tA30HtAbEr+tN/JKUuKXw0/EIGEUwXfO6ZXhuo +cDYpBVsq5OK2tNFxuR/3HkBhLBu1ErWHkZxbKKL0xIssi/3DbSVtxNAFDGK6fazR8AXsXTF8hLbJ +k+VP60DRAEyttKunCeN8YAFkYuuEXhFF6Zw00z0OXJoQwidCWk+Adxd0qBSRZvOUlbXWN3qVyBVq +QDog3iEPiPbeQi3W7Nf8Fkm9EVl4luZ4cuvLL/AkKZOp5LlrIRsK6HhpKgp/l4Fe6IHXA4Rg24qb +YAF+maevfLKBQQzjAXr8rzcd9v+0RIi72e9H0yAV1yeF4WqdHReEJJMpOBu8LdnHpuIBOexUZhkn +JmlTMNPzxgdZbHKtkEHq4r08oGROAZ+gTVrxjbbQYiqS2O6F9LP6DgWUI6W/iG2yVL/w2PwqF+Yl +6fZxFzInu2vnyelS3cWd+ZnzhQS7aqQMcsJE7UdcRokRQ6R9Wn68eFB8HJ4p1e0QI314yQOkKZmJ +dl2c0noXZ9wd+Zy/EhL26Znc/MEcuduLLul4CDoMbn4ztDeiOYmc7FmiaIjw7J5bDwZ33nngf/z6 +nYtSePa9NRSefQaP+o1oROcOPQnRumtwqyo7wK2m0S1W6zyIcbeT7nhIn9IWdeBslZK4Ia1BjR8O +6uLOhP2XousvNBWVSRgD4Oq4bLBjfjcupmQbfhmo1IRij3NjdcoNa2nULqpRbqOryuzaEq73gW9X +GRXrGvifFYLLRE3GU6sYKUspMLcRVrlva+di5z1EQlrGf+Il2Vzq7LpvB0YyH5/YP83dQAXxaRB6 +MRuuVXwo/tBo2k0yHIF3HDbikv2XkCJmGaBZuOdNrUGA0XIyyoDk/7upegmF9HXM2fGaddHThLNS +YT9rnQFKfDpRnr7nVfcYlPFzLagNSyEO8T7fWS6cYLvtthxb0IuhrehqpgihhwtfiYAwSwX0Y0VS +ykFoP3w6p11B5m69WBsvFKMXX2rffZjFsmFV79q7P5p8NtpCJEr8DDOqonAELX2DJU0cekKkVCWk +9QiyUWTU5zBuconAT3yRWk5eRgO6y6oyNt3cK2ntItyAsrhqoF5nCwrI/msgRy8NXzebn5t002He +zxQRHNFbhtYA3f/ZN055KgnyerY3kW6y2RSme7YY0lV5U7VKsMXF9fhI6kr4hhtquOyerCmCC39U +TktxqZdMy+HQhUGL7DDjmTuTQEETOu3WGDXegw/pDV81d/W+rekRytKGdrK6UrelG8pAAcoAUIA+ +bdxsegqF5et0kCPsu106h+raWA45ut6+H1D2OvDMZ/haCQowGwRfPjsODIq/5tJhwafBdyr5PtBl +5NmpYXu8cBPi1L/C150naELOp1T/8Qth/2Itlr0VfAXQEMo4Tbtt/Wd0GLN+ZmjE0FgL3lbX8ict +GBmD4mm4yin0CtVJuMZA1C3vxdE1ctIxugi6qzUXIz7P25CFhnyn70khFavmVGTSB+w/5q2bCbmz +5B4HNhWueUM8OcXX5EJ9Qfp6m8fzsK7ya13m7TBuiISW8BChcqGDSu8KSxCt3avft+UsmyKhIGhU +972FU8uMTtoAvEJGD1whbZ/gkzCv6jTd7nBGOgymYRLK+sA/A3IU6r76niRAi0hO2VrSS+nhi3HD +OhSX3U1qNcWQgopQacDhcZqAyvwiSPxg91OE2lJum9pVXjc9MYSru8+g7k8QNGXj4LSL4X6JEl5V +axLLVQ6z6BOFARTRHf5Rb1whYyePoZbB7FpNR8IK72g/r0RjHBAI7fRCFJRfFQdGyv/Tnrh/eLHB +fjrY1WzdhF88UMlzca+28Jtl010t5hl1nZuc4IsVaz1rrJf0r5rZETbzIK6NKOnBtw1Lh7EZBSvp +Uhy8z6u6HfzlLvYnxGs/G+dv2/yBD5AInjkuDMhpNy9Crr2fWtOjDrFKTw8Bl+TqklSZEmzHImcc +5FYH7b0riETJskOScKeeiw3dA/a+4wFYdm4K6Y4bMvGs5ntRew1oA1JK+XWvdCipHNDyUic8WlpY +afGaesHYBFjIdAjk8p/tM0ddbyD/2m015Tkyr1uGEo9iYrhgN2KnDqXq6fC9heJtpwrTSeD/nYiv +kHB7WpRizrmZO2J8DgT4Z13/fPo6N+7JojclCE9ds2pODc21Uryopo7Gmv8gvCR1J5VGhDZHBroA +S+RK12KFVSyLh59GyaoE6tC3vhAy0Kw7Vez5sJKkhmWtfa3VvOB82TbwtBsjBR1uQ/UZgA5f1J+v +R4eq/RufijHKv+5e6dpRo3p925yTFwLnA+rneyx/hSGWM02UwW22mgWauZ5csWvR1NLYQCe9ex0I +W+9EKcBPMHZ1vogE/WkPLwDpfyyuoBBo2RF6Uc2p0i1gsOzTeHUnOGb7VXjVDS1+kOb3Yx2tApAa +sos+InL+HKn40rErmOVQ3HgxuCPVA3sxVGSSxthbhV7J5sdE1d1hPkrJfS3v+IR/SbYvocqh01ke +xzCt0IrrAnNDRkrJnTGDClyJTBSXbRgVwfkvjFfZHfkIgO6btMzdOq3czQq2B5i28HU/fwrC3NG2 +ztRRl12NqvldTGjH1213agzVhG/6MO1gQFc4JKbJIoemfhlBAplC7Uw5aWUtBRHPWNb7nUKrPWw6 +vMdUomsfdhsUH6xLwETWh1W+L5x23BMCWgt8suKI4NiRgKVNP4o9FAokefkvFrZdqwWw/QS0i0vQ +7iSq4I9BHO+MQGBO2oi2pY3ZeHJwzxllmfd3bGdE8v8g9JH+9VQ4yGRcIfd2y3XSM6AkuXd5MJOk +tCcpRWHUvPWtYlx4xRfsaMZBZR7HyZNapTAXZVHiGZnIOfD/m4ev23dtDBvorM44p67iSLLMzrar +BATSVnLtmf9vKDITZM59pV1DuOcDC5vUvZ23MpW6+RJqB360uvv7hlurocaQZLwapr4TiAecPwtO +TpdFXiW79zz2P6N+mQJMmYwAWEQfHVdxrALxPXNmFxOML7SMqEYwdCNa/j0jNs4RbPIC7zQBwqiO +gtRj8YfcuiD45t2pCuzwo+r/vAGLiiz/PWUTOvdjWKcKNVk8rToKm/ozlFLYZitJ/4Q2RPG7uant +LV6JEBxuA8B7ZaDKa1rFI5zjt9/X+qlntu80aUY7zIYdK4wKr7BYMg30cPJVfekQ/or2FVkx/wWF +fxVTUQLsxMzJ3tXWQfzMfB/B7kcDQ+pEe0TRfDFQrz2Njhvha2HANLYaPk5kn/X0erwQO+a6n9dX +Bg6fBVtDnp+ORpbZ4VN1DPi+CV2QG4kf+AKjiCwwU1NXtqO1mRkWZ7uKBa9GAM2G76fgK1nSlycI +mZLdSDMRvOfTPHx92l5JLwkePHzWs1Uu9GnJkfqOxSaQUfsg6NVL8EL/QND1p0fd+nfY4y77Fae7 +S76y6ddnRhaijE/UZxA5dI0k+9vfThFZnG02V0c1KIdzVeoR5MMw2RM9CM9k3KF0tJqpToYqDJV4 +cH9izkuy2r5ePmLfT47nsOgrk5jTVte2EgNUNE8BD9/i7BijiBD2XQzvEeuUEX+Lddd8yPZ6KLgs +p7eggHhgv3yAXTwlsFF12edBQiewTItGp7JdlHyOb2X/i05pxqPomiNvVs2O21DKCuPfz40ENE/M +wJBqxVWwiA8Ok6JIQQTp2B/McWwCzt4nM/zP9eHkVY3jnkHJuOe2FnJdtB3c542yDkXbMD8YGeMf +xbd56DPb9HhHdJbqC1JHektadJ6mXtG7FNWrBZo/2axgeW5nC5l6C4xtJoZm9cntkZ7U22khr7kx +vZlpbpOTGZ8QZoidwM/GhUW811bJyaDyYKcsyZ7iJh6EN1mVIiftObxESxttKsGYGRMTshgfRB1W +dFMElKa4hR9IJjvhcATwfxsQ9zWV/xW67/9UZ7Iqmrq+yjxoQp4YeeDkJkJzkIip4XfUdt74wwFT +JWbQYdkZXNsW7WsYz5j4oYmiywj1bBSXUmQuLl2h0Bqd2XE6mpYLXrbg9to29tX2u8eO115Fw2Gz +LPC0p9mm0+iHwdSGmV/+JjXDYrIkHYkKE+wX/3oJybl1Rur0e/sudsMC3KAG9hOnw/iHhyedbxR8 +btkCU2+Uvk1OrvV2DHeilFu/dBe2iL/sHOZPNvjULSDmRLhy2pOjYDtOeet0k6nizAumAFUJHWnY +yfmy9Zxo6rhHFuUJcwXWQp2hR3Kg44L0psJ9VS6xsKqwBcKtF0wHZoAwnNa7eVoVWU0h4Ec5L7t7 +HVW7Kq9ilVjxItZkHHSjVdfB6V7KnVjY/8CuFuAQ59ZcIcyXxzI6knxfwyZ31KevRo9FcKlpVGY0 +xc4TkJdoJvZpx1otXthpdmsawoh9+my8ytjkSlouWSfweZA0WG4PI+Dn/lH4rEj14zkVohO3psIP +4PPqWhGoOL4p3A8Ozim3aGMQBllfS9PD/uTFCSkVAdcNuYbF0EY7G9QBCpBCjYO7QRjEkb+NyOCa +8VwDn+exJ1tshWd0X9rIINWploEcer9m2ocn5bqZUwlOSjnUW6igHaj7zr35xOLmlolZFwR173v7 +ciYsaCmtWvjEZpvDZPHyDm4S6uVHRrZaneDhvD3tA7EZYPvs+i4oft1TRfe6AGX+JyaNAEnGAPnu +MotfpHr6GUmsHX/tz6J5hK13b4w0b9ZkL7YgirYxerNeuWh+VFC7M+gWd1Oepso7Cr0vihra4ZdY +Gffd8y9hty2qtptpN2VwsxTV0lb0tp6UshZQf9HVMWmAtffn324IVdQoLSEWHFkBv53fb8PXBYve +od9rJpIXu5DbUW7gMKgKoAbCbj47qb1uO/R7M8UhPljsGSmWirJE390GebSCQWZA5zqfMtT8dbBL +YF00+bDyI52imKO31esb+8+bYttm9d77mGZYwMwZDZ9x2BK0N3CrCEVCoCLOb9eduGnsgVpqy8bR +2Mj1JhSZMb6sGFMAHAIQfkObc5Nk5+hIheKLbZgunXuhprwHk/QxvIXVEGRQ1M94TiT04dWuooy3 +pPNs2t25Br3ITZ2Acl6hoZ0uBy9ikvVyo8ec35B4A9yGGzAT3hIY/8+Oz2tSlCFyYKB3L6k8xSed +jJvipyFnfE6WNBqGk54tH+JajnT5RiQ2hhcfSKRJ5bzJbLO67rAx0SE+SJF6DdurV7KT1+COfC3N +I8Xx+EB6nVGoeOrE+bbqzLnno0mwEmaQmQ9Ata0NQvqQXwcs48D2DlTTaZzlQ8FK6UWo2DdYpT+I +V/ew0ymJD2vS8q04T7mNCoF/1zOPLJ3LtfuVT9LaIWUHzYHIID0Jky3kKNoHTryi2L4gcdv327fz +N8Pzs9C0v3VAjittrNPziMQRTbVjD2wBHRUGqWqU8vwXw74xhTKgP917saY+EBwpsJrUYUvHYxdN +n1SSe2+8XKyKWPsrMEza68Rb38ygK+qV79+IdSYQ5PA/Hbo6Z1XCcCCeF39mZ9Bg3M0qHmVE7rCA +YkpXSrHZLJS0+pkmhnL0nCwycPI+oED+31RQXfrcyDzBVjha3HZOM9TPpiyu7o67E0bcuHsFXTtp +CZzcm0fI0RRKgWYg3yRLJsiCSy8xm+Y2rq+nFCHx267ytn1ni2vp/WXa8olhptvoLpQKtmrjyQM1 +JTdkE/eUYfDFoHaEDsPfM+WjmZWvQkvbHvYrijrpu4Wkdxd/gf6RJuc5IhoBRQ5l2d08uxT2zom7 +lbB121UAvpakgOfNeqefESX2mhu1kGNwuFaiS6P3e+GtAKeV85QutjO2NZ2SLIZPf5yybzzDcMpt +kAi9nEigPoxxMIws+/HUdhxQRi0in8NR4rvy3VSBzjzJmahlYNgY4gM3TNXH/LUHI8nKd6ppzJX4 +2kSYe3zBQHvl+fNTTF27TkIx1nY2360F2nT7UQkb0XMTWXaSB1nXTBeDPmlFFYTPZjBaRG9W1B/X +sjuzWhkQSxuPmyNZdygIsVFJnXWJh3WDgE+du87jt4XwTQqCbM39RGt7h565g3iEjOUGx9GJy3Dz +TCxd3fh89+MgXeX0Y98LX/LntGtJcgxkRDkH6fGOz7f2n2nImS7IQQjNiiET0TykwfeSbvJbRaDu +FeU00jROY5DzMZoPblrEVT0W5IWRYBWCwNNYvdotciJAWMvwav8gCgm21AF7f1Dm3MABHTQWuZWK ++C85bpXRitrgfadgUARmcUEvo1LoSEgB774+8+U8eFeGEFLMILmKyl84ZESv+VF6gfGEjK3AdMV+ +n9eQKPOadj0Uqdh6I4Tkf891loi7BbDE/cubiK98C8iJMtHJrmeAwqm4ER2GbjoN9lGFLAu4n5mh +z3+oPuzc25uaAoNXsHXaLhPe/bQWpwIldAnkXvax7VqWpTa5VXJ4kjVvpLoiHtvFqOW6oOU35rzL +Wi0GelVjUfJzownUA7rqlwlfM9zOJlc5TnAoGTYrPdpSzxKWMjB7g7F/HI98j+G+ONcrBllde+Nw +y8xgDrtJVKT6pJFDgyjKBX3H55o5UgShuOxez0I/9/4nRV8p9EOMYl8PVXnYXCvl8eiRMtRhl0Vk +BeJW9dMzPcnj089eH/5jQdzoFrwvLAXcowYkmBObbV2rYV/AQjz4U+OuPHNccqys2eFi0a/0I8wJ +ieS0ktw4nGBgA7W8ABB/5azXHgBBq0d7oDn1omEDetICf6Q+N9cuv/iv0q9YKXdutPDST760wV77 +k9f5zhPvnn8lz0HR4xt9y2vdtoWdmvLzB3FZB2RqOZ7F6dL2fkWxtWesDUftwFxBHuNf1Qwn1xTa +b19T4LtBgHo0yWLrAErNl1eaA8NQJeXOpVFEqm4oJ96QWyJMMAJRrKRJNLcb550+SWh/VD+H1cLu +8d80qZsoCTpLoKx4sMGkSUT/tFqShDo5IvaruWFZc4aCWEYjGNce0oIXOkRI0GsFH0YOAnjSQapO +f277b1/rA7HEsz+owL48Wb8PturHEItwqkX2+aJjXram53MsEP1P6yWzZGvqzplIbsfTJOgRoU+J +Svl30sXbcQdb4f8vh3txQz07MhSTo4pH+1mYl9Pdt3mz3UoZkZLmzRxQQ6cs7S0qg00pGjIkVesB +f9Z8hBG1WdeWhsOcUr5zjgeCZbry/HL5Ce5cB8mX8JO6EXq7kbJZ5kjK64Ol5zJ5pvvEepxH9bdq +EHlRIMYMwggESvU9OMQLY1akIHfiSKmCsu6D2oDTf/qC5vmxd5ClGxDt/yomJAtdQf7GQcY1ftVI +exny3khMuzMFRS7tWZX+sOw/eioP3oQq6XtXzGc2St1IBAEilj2xvjdxunlpqfaYFOiYmFPoKQeB +7tuVZ5+02fiyrpuZJZEr/zDO02wYexybqohUu+VZUzK9WqYSftWOC5zgCGKyUecFA9qV9LQFqglH +ewX8RVJ4Xrk9O3iRc9pz3jzsR6DTY+nfYhSbihoN+/zLz0JsgJQjQmlmUXawtgW++Y4Ql+4trnKU +unGEnNcoQfIG0FWKA66vUMoZxxw5giwzhSpbWQZTIlfUL6M/NZVGBioFkf2Y7LnDJCjwJ985wTnj +j96VtVXFrSWx4BUkK+Yvday07aBPGzU1TQdmazmNFVlyzWYVS+Iv4jlHglWCChlCu0qambFen9P0 +HTZXp4odTSYHC1RK0xx8DcfUhpjwszZwwhyllFFsEyHRUhw0j5i2lzNzAHBEmYhIyiU6JYbvUTk5 +u0tmj0QGk0BbwoVVGSpngYgA2C/jbqP4cUxCTK1xZTWEPYgP42fvJBXEXpo9B31n78fEXfEaYuyQ +u4Is8Wua5/F4rFUhXVZHiVwDVHWNyxRfIrHeOxOyAy/lKHGWAsh453+T5iMir7PM0ff4CmL8iJ3r +3yiGNfNmyNRwIEk+fibLEudMfW/Ozd5UoKTlDMC3k8fgZCcf7kb/+oevLVyv18vG+uk7HPMViH4I +IOtjglJ0YHn7ipNMrAISuUe6Ig8Py3vDM3jlcSU8gZwXtunQphyF0dpKpRdCM7kpPXOl1se0tAZc +S5Bfk8hW6FrmINuKfmKi64NFkuHeErlJQdEDtSmJDCbAjl1W+n58n3MDKj1QH+A8EHhCzA3N88oQ +60x6lqjLxzot85lqE8aSwisZSoU1k/1JITvAjl1JxL+yEr60naanauLLG55iR9ncJFkSosRWRQDJ +AasYP3yt5r1/DgKIRuRuX22wptirtn5Gnwdjyc2+vL9Dw+DOPmpeEIDrM0+OyEJiCZUyrNHWKnRM +d9JrTFiCalJGsujZxmVjwNRd8X6dlfMn0bl1aK0n1dJBesDdMOS5mZ2TXHIS/T/xcUyQt9/u/ASN +1MoP2zG9jvhAozY7Wd6kI1mKU+Nhy1eyZsmslEH8yfuDoke1e0lazo1bVNrakI0DZ8n71UEi6vnA +jJCX50htgZR9zH+eADUjaxYWrbXke7edySsvN8j/O2vsv7Y8g0pf/Zb/QL4vw3beRw4/fmoeKRfU +b4yKewv2doJpx03lK0BtQ4qlTtFjOVXrD71ouH8shsqDYz6QE+YzBMzlMDPQkWtEX6Jrc34xsyUA +3KhwNkAjHm+UmFG0gaLVP3urw1apPuJRIfzSKDtmXfp4gMMOXigW6IPkfnzU4f4aRNHODwUfWEHe +zN47zWGfDCf72l1pyPqU7EiTuerSOMuCTTRnCxzJLOBCz7acHYH+2X73iY14wL5A1pGF6DBNsNEI +j3WIpTN1C/32zVotHy43UTmUFOYr4ZvHefwAVSuWEnMZTmIAGY8wjUtmVDDnOGzN6t6/8Rq0a9Wo +SzKUvZXaGyXEWCy1WTJ9X2vXYjGS4w/SGDaGHe1s5/EaYlazTpaOnxQTTDu0o1DzoTScbq0WYL6G +uFw7bwzAK1vkRsQNXFKpmoRFhBlwJvr79v2/UT8Y4C98JxIf4EnY6U8A4NPGgHSvFq/CQxV8Jexe +D6BpoBx1gjBAS7OL8TFWqD5tmfPQoL/zW23v1LNun59VHQ+zREGJZCiO4nLOgLwQSIKfcamo+Pl4 +NMtHsvnq18LebeuQOPNH2L5WV6fth412Xp58EO0FJasF/xWTc0Qo2IG3erTNC1fYp+hCYr9GfIL8 +I21yTdmtOadQXaA6W+vOeRTyTsmM8wgIxkoagp0faAxa10C9HUK5rnlHfQfvOrEXj2/+0fiNSkGv +yHZcGpTqgL8QLB0LX/bHeK2qhNX/v8uw+iXitXMmNjZIkcNza4kRzWpEblJlkC0ZaERScf6NimHl +YaEtIuSC/Q7prVP5RIc/9lmuAaIs9TAaV/br2vBTJTUyepi9kXtcCPyTHYh4qjbduVkBmemTxLjN +/Nj70F/0yPdsJNjutPpYYHGI9ljyF6FqcQMNK+LZsS7mLAk7dyX/rjsZ6e5x3rbKijRtBiveSxoT +RJ7lzUC6kg7lh69jfQokoq+HT9XQzNfhmj8tXHQHOwIeC6JoMrr0YXTRHfgowBC4N0cbLjpKavPj +wAkwXkrDVWvKEaExPn0f3nCHgxMq+7I/929eq1yxDSdO7C22jk18jpd8lST0Zgy2hRG0ZelLbZji +CapD8o167k+vBZKmAcw2GPVQGbWecmjsNZritqlvAcGy6ME7BY4g+hYv3EDB2yl1pK7WX7XaoUnL +sjVgMXxTAYr3TkktpRN4B5rUepuE0M+la8BcRu5oMg6/CCaCbm1WV5KRm69LIA19z/rZnr87bSK4 +720Plw6HMSMqngZhW5xjANOhAP5V4qVPfm78RWWYdE/eHJRlxVF1yC0jBwKWnYKoUh+Dmyqsohmw +yBn8ZlVLaDfaAnFcN1au8/md34yBGs4HFZ4jzWH6ytERjrSFQgKrj5dogXI0PhHINgVbCfwJ911R +m6LeTM0LeVg2paFBCs94tG68szJwM8AE61e6dgvg6dU467no9EvZtAG4fZdbxnhBHWNTPIMlaYDM +/V6wqw3O7rV4uMcJSmeMKzOs73N2AlIRdCD1QWllsompvxxbeVRvlG7FAv0lpEpMZmm52ik1KVKO +jtwAJ1skwe5igwlk8op4alnMefq4RCDSXsU8suO4hdr7xqadLXA6H4NI0bS+GXqAMEGKnN28X53Y +SEHiCBH7B5bolTDsXzbQZGUfjMMrEsYsqZ/nTGvMcI5p07y/Eun+ffwK8yViZEZ9xOJ9Fhh1jL2p +NtXTRftWA9jrbBO++F23bbk1l2kjvoKHnnLg2z7mG1GAXWtjFtCr+RczkF8yx3GCVXJXdlU0DNEK +kcP++u5P5bFW6QadaqaGsUUNiirIY+Kk3HrsBsdfP4bP5WMmwC92BjXi+p1O+urILvc9z1FTEpGE +pPXGuzkKR6qlu5VaU3uEK8+KBpzftNzkPtT37cvC3CxyovYuxcQz19qgHxipnlvjCpy3E1DaB/r5 +Ou8kI1FpCsSss0qAx1KNb3g7E/2nKoPrXKj/dUXgRytFM0YFuXv1vQ2TNhbeZcc0x3wr5GJ2s5k3 +I4EV9+GD9M31AyPs2iFHvxxLThC40eTduPa6jJOrRN3Op522Qm2CWnRmwn10FR4sBTVcODZgJhKm +qjSojdSCuQanbSMXfx23Uc4teYC70i4Ok3zIHaGAUFfpj6/Wyu1cl419UiP4dC/wO0Oi1SC8PSOP +pe3aUCktYaFpsWVJmEsGi38KK0nArU63G1icGTlOLZIsd/xESOCu1OyQwrhvXt/tXg2W5MeLsQw2 +Jx7Hck097iMsuwBkh4W2tlmnjOSp+QHReTe1NxUf8aTU0DH1YmSLPVl7IYTjttDOgVBDGxwGKTC6 +NQFTwLOCvVI9rTYdb+VYl5ZjCSwQBn3fWZPfN2CuIkTYIeAtl7mxa9W1lS8VfUbFVxoPFMp43OLQ +0Lm+oY+z4J8iiPuvp3VJW33ObLyQsIbJy3HHiV5qSVVjPP4+2yRhdaXAVjkos2XbuIgumGer626z +uqyCFJiU+3XW9luA47E1jVWj7vkDDpi4JCEt/nJJd3OkgAiHSTEV6wR1+BE+6F+4CAGLLUInkdgw +GagyInRiQaFasadrIEPTp/9KhUNEhOTy86mh1AO+YxROVoxz7a5BFHbxnjOdlDonLAcvxZ9r0l4C +Q4JAp/XllKcvVn5jmoi9bF+2NneyK+smb49+olu/Rj/eGxtKjnXExKta6damjdp3rVTixm/uSdCt +uev7bOKrhkiVSIPTploxa5w5iW24sOH74eUDrGa53Mjh0jHOIVfoJy4+eaeFC3f7t3GXl9Fr0d99 +UNKlvod5WkwCBeeKRIzOUYABc/Ci8Vvvn9g/5ZZREnSVZJUdXTeHr/OpZt4SUaWB7DyIO9JI4s+k +fCBROWR7dFhR+YbZqecXtMDEHWWutirJfLNcpVxPLwAMCiZbvs0ueY0y3WhXknNjje94r6z4FM4r +PWoMSPggUXCIlzsMFyltdmss83b5Tin1frAeNzJpeFCpDAPJPFQ0uBT6j1/uojVe/iQERzOGHrH7 +XxC9aFS14Dit0X0wr5REpdhNYDR+tLWKggrMBfzApARiYll6z1rL1AUdfCXDOiTRFBnUPejHeucP +Z7zl8p26VK2w3cbEgDVTnaJaTHKd/1md1SwX065Bk2Wf+4C8WYuTFOvA/DfLro3RJ0JT60kfciNx +B6fvIaGYGhaJzNPKMgATE1LyyC3tM6BbcoUAsgaxe/5pyutEM2p8RZvJXmJILiFTLM5ly1bwzAY4 +ZTNoOCBUiR0n2UJ7861yajp9z59fmoGpDGen2qxnHsfx/RmQ2UK9ZrH3hN3SBK+uxk/9idU+SX5+ +juYHFvOSskp20pQeg11tre3JCQstKdHMZpOnP/B4XY+sdILxibxlu3FwatOi9wIcFke5UyysFVCv +oQxTOL1qKw3Po8Xrnzdnb5/0ZmGDIs1CrtVMm0gEh0p+NwGW3ZffLR4Mu5ORZX2lzS0kasuE8y9+ +9UU2XzbGdSuTKl/Pt1nL9N2sDMzn1mHsVqb60GKfKy1uK/XZZeH7n6blWDPJEjClzX/cZuE0/NVl +nLneOjX+r0rT1jFwcqANPbFoJosoZZkCLI+BZPhydriQHuzcDPNPClCmtIQqueM9s8YKtN46zTsX +xrTdzF/Vh6xlK1exR4VgaGzLMo6E8awuWkHioVVsV+LrKrGgRIytCDNH9NtgJUKInTb2suB+3+2Q +tfVY8Okw5FeM8D3+P9zIB6AWSrxLod0bn84kGYWtx4xwmigdCd/75K7gCg+4s/E/BOKkjUSG1xgL +yJj0z64DU0Sxcx7SzXY9rv+viPuTMeTG257MbNF881EZrdSSGRwxUNo6pRoOiqms7RoGgUal7Eml +bl+YPFyIVjQ2bAgvdeDveWwuvTf/W9q1YJmgbuF7Yq/hcZ5sXfzBedxrgAyNlqbJsJCSvkEGJ5fZ +lr3K8oMjDV+YD34TmKt5U9RMJTEra/LHadLW7l63k7fh4xT+YsVlz5q9eyL/rDPWHrE1aq/fojzc +51N0UJJ4G4dor9UmwG3zLGXT+aeBMSnOQmvscIK4pp3NDVIDuslE+l17PlCUy4kZ6+Hl0X1GDPLD +wPtG/8D7Sxmu994QdUpg6GZTI7rHC4vwUgGV3C+c0hgSFcXCY/Yd+sYFqBmLfueJnFEI+wdBQrTb +pedpR7YB0drqReVlaq2BZhWICOnpAA9Cj7hdnLSdr1/Xm3o7k9DRbMdOJxpOR0OCgfECIHMA27rE +p9QW8bKolphkNu/3ZjerE1L37gXwCoyJdu1WR2mDh1SbTNwEPmXqyYrY/YKXRVvvETmIR8+T4CuA +cgf4/1mRSJwvTP95DOPzNGjfloTDPef7QrpNqQ0A1GQFjoiOsWQypD8BTRmZM/kQH9Y7t2Pkl+HZ +tcb3vDJ+HO1tM6E4KanhyeDba7fcAyIFkxHLeHrRLkrmY8HnBEXKZGjG7xVmQ/UVoPj8SS/FforO +74gWRro53WXuvhTjXiAUb4W4cHDPdVfWOkN0oa8zlrJioCPNVjEjd9V+Y3knOWlbEA+7jngj9rGE +wVXrv8mLh8HP7VDFRbgiX6Fzb/IzRKZGDKnXKyP8AHqN62wdgjzOorZc/tCG7RZwXJGSfGqa+hnK +DBDP72mMt38qIg2q3Hi72WWvfuYnBJFerEHavrhr2J9jV3szVxtDl1WaWNmrmzA5XO3nNiEFjwct +5sJALG0OyZvkKsOAltGzKjaqo/Gs9YAHd4/r4fui3/73vNwdcXYnUY4b2E9tB0A4DGBANAo2umv2 +t3uQX3zQiINbEwR6x0DADagV87JR6XsKQTsVlfuiEM81fcvHmOZd6E3rbtoA0BW9R21tDWA1eSEp +q3JtO4v9G324gK4pMPQQgXZnO4cpveieb1KzwFbcdCLAigSj6yU/yu3yjaWaw09A2jqMTeeKXtdt +k1Oryq1WtkyJAkL4id1N8uPS/eDDpQewJHvnC8U641XY2s2qO5cfy4sODS5syUbxTntKmn//ci7a +sxE/ORiO/8ETxnAQuhB8+27SDADJBqn5nRtFghVge6H3ytA8MZYRXDa9yRIS3DDUSNQWq6ugpRNl +RSgW5Y03N46A6GGfbrclYUzKriJfxR0MKY8AA6K701x+QXVBrKKLm8+rwZ4jPCkw0cIveh29QnKW +9+NfFWmdhxiil8YpNs8c+dhoNNHZJqbvDFbIXfTdlO4MjV/u//S5i352mdUZ2QK5kvx20AqqJCKK +DNBFi+j0oO5C5GMK/j4LfJ/a9/hrRLlG+s0IsHmaqIf9+ipJeUig2mzTnnld0pwiJZ6MEoB1FwqY +1+Xygqc6tMXWU5RUgkBufwVuhAd+1mDtfo8rY/Jp01hySQLV/oJEbImeRJQnPzwtEbCrMkh0dMwl +rk9+qePrzFXRH4mFj94hKw2rlIkXetRkJOqnUxmdT4SxpbXbm16rzsQvY0kT3jAWVE+GbT/me8xi +Pzlvccg9WAUrBzb101MuSbrFoezBAF9zkWrJOu128I3v4749VEcVcBNVSkebh8l6YxJyWPVMRHS1 +SQbuL3M97tO7GfcL6z6IjV7hYnamG2MaFi321nLTVAwNm8yeQjhi3xiRqoO9OjIRqjeq7zKBhBaY +O7fQR52p42B3bxmd4SW18uyOoDdTSHaEL3OD054I6u4DojP4vUmCtGhWiAeYaflM9qI+OPslyAqL +eRnc5ArkghXbgCEYSvJEChHreNakjSjl+nmcfGvv6fKbflxJKCUcLPErJ70w2y4MtNK+SmcOhKSz +oFI9s8B7Gq//CGVhyPq65Ek7Ryxr3c7y37AI+IVpQ6gbSmuLSQxFngL5YkAxzb4W/2CXuI8ZSihF +es0FGDmF5hGIDQe/EwdfjbAbaK0i7tPpmMh9PLBdVAJukikKkNXsSLiwxgD4fQFebQ2sDN/xD7tL +5yZty538xxY7RfHe5YU8r7Q3OH0BoM03zSIbhsiPHNxH9zwqqHOsjDqDrcFKUd0HUGJIfUU1mT/a +Gbx5zopXBohF2mSdEzXv17a+gBVsQFwgMjhJZmPu2wmuIJQc6/M1d1te3jdOiTUNSSYbkbExUtIs +MlYkQ51RTT5LZjOxQQYD2rPkjCQT8kQnkFMC31XacOf67NOXw++kRESqZr6R6xlFLoHG/vyro4zM +EuaW0fl2DJpOtKMNRQR7niIEDt9ZpD9JIFbKCRucsWwEic7gUpK43s+ZpUnjPAXscDLLmbJKMJhL +omkdYbPPQwSZ4W/XB4oohoMT2/tVlg4JyF75rq9zCDUVfPSXbClxerZsykaMUR8zyMr7DhtGGlmf +Of0jS6JKYAZFLJ/kC8iNj8qrcmlW5mXyZbO1ZzMC72F2Cdsgno2CHsQdt9VSilXGQg92qvLE4L6r +PAnQfw6hUqzRzZ0/n8MoUoPrM4uc6XJeGqFhhEelmmU8SDs/VbWPq5E5ybgIzIko/Y0nZgc/ux1+ +XGgRxNTVRWMGX8MHWDasejyoUwSdAQ5LNLvzKfB04coAHlAJfwMD4dn4/bJedx9taKZfN3Gf4txd +Ah+ArYSnoWq5WiHgNpNCBdKFsN9gMbSsREdenLvXlQwlIizX7Iu9ZkkOVrord9LYOJvYXQ4vcAvZ +AKo+Ek6g7OfgAyx7vl828tMGB5A25KO3RjiMJytB5Qnm0wBEcxgCud/mtRX4gKmmKuGFHg3ty/AE +/vDM4UohulntnQYDUQOXt+ESOCrYJsBbvKdvCO8xDqL7lDSE/mpslF2xzdhAgoad3c/8VOiKqGJC +PCLP46nE5V4l6jferU7CJJ9ZaAehiahxAJCvKl04v8DjEjWx6dXYfj+TnisA1CEprCszFMk9es58 +khubBFnYxpKgbi0UyWO34dWiYXtctBqjlwkh2bCNx1I2VKeWgaLE+2yX4uAa+Q9jpfA/GNTkkWJ8 +9ag0T93RAYmI6krdTb5bazim8faR3bVVHmo/hdBakbP1hZGWyJTHUrMB3u2udQr9nI0HHIAQnABs +k+6kGGYVoEkoRp9oF4keC00EgMrYGhDs8vPJHabVeT+1pRzQzKeWm1ZpvL4xg6zm6BJq8dNayzgh +IFqbOjiLrdqdXwuycH1wn5wXR+wctm56/gINErSTTWR5iouwccur8ySrsigzHdEZKn+Lp0d7OXy7 +Cs3gkskki3iCE0dEcXynhE6ZHA19avSt7TbnFmsBco70hDk8nzbw9vS/4O7SQE/gjWKbLzJyysFy +PdxqoppgvCo2QnOcfSydjSuMhEJ57IMadmbGABjTkiIHs3mdcQCbIHxMDPHjfgUIQuA5ty602YJJ +usDQTK/EwWvCU6AzrADOhnCB7eoZb67Nu23chs8gQnaZKw/gKnCZ+Ler9MepqdUuNQ1hsPG6o3sx +SuA/shs0htKucJpK7c3315azYzPmrvz08nEhSC1WEK6tmsVGgTErxpYn+sJAu6s0n15r3ufJA7XY +EYH/P/dKXrRohXwkFUkp7VMRnHLn1yO3VZuLF9N+DBTQuhr3orTh8d8enTzeHKim6Uzqv7z7CMUv +vAxOtwfIGMXhz1OcYV3r8WE4dsAL3KmlaCm3D61klk+UxcT49zzdwx672aH+RSn6ECP5tbajuUNg +REgn7M+E3YjiPLl/ExS6AI4uvys2r93zv2jaY127hJH9hlApQAnmmIMJop66Bi4jlDP3uTjL4HTi +MbryQKtxNlNA9Edzd3aDMWK0khJo7yippG9CyE9lxtAXLIKWtyZZ0beXO/Ttd+EstsxtBRdh++sI +7CttEFnXpPC22mZBm9Cso20183UtZN0wXTijS3zczbsA1aSpjHTn1R/MThDiBwoG/GUTZTAxuOs4 +bKL9afIclqm4lsxG5Jv833acgl/9+tRqzBGcQtBMNsewboReU70QCMenEkY2UrsMbi3r481NKXpy +rFdrsa4utC2XXll3f0VcXeGPDTqF4eaot69vLi1L6WruprvHwCpePKxfbptYSzdxTNVkinDakEL5 +NeVcV8LxpLgRvbHCZ32hGbiV5T5z8U9aoY+xbfiBVS4t+qVMLRMC77wOLbJxK1yXy9sIUffjrpqb +UknzWv5FT8Hs4Ebqgjky7I1WDc/V7dbXOGJCjcVAZxwsgEQAhztpZgdYrhJATRYx7ih80DSAM4T3 +Awzk3AmsvlSEVq99qrshecRhrH2DVKUQT7gzsXSD84MiuyjBbpZH05ob6++sN1JDyG9EPpWqo0zm +/EpWinvPNMAurz9pYLmDB0fKOhUgoBrisnqm9Snqh5VDID3wXCtWPd70ES+F6v8bBbQuyNe5Fhze +etjfAbUSMtMlT6B7JAKsn4gkaFr2jt/IDDp1uMr8dQOcqs1DE7RU1zgtps9SlewKjVr2D/Hous8n +59xNH4zf3t8Lw5H16i93hDRCaLU248+No0Y7I3k7+wZ+RxRgSiYEzARhd6GM2ffunYdLgD+zCaqb +4wtgzSo92MT3scuoPH1hm8gk2eItDINTXIRjW1Q5YNpaZvkGLTDVRpzdkp+8GWr/Hpze10lkaZHe +IDlaUWXNCPjW9r7wPQ7wZnVzyRBdPUjyc7vcYs1mUOwkuax3hZzP7+TPPOd9ph6d9p3+EAH8NCAZ +AhOdQm0/6m7GZU7CmWZLDnMos0jfZAlOF3/eNddmya+45N/a652wJTT23L0TgUZsEYdqSOjo4rpW +qduRrUCfUk1Itl5dkMDxuOmYkJ6vtWPyMOk6f41bhOTcmNsAzh9M/bBfCa6ZXNw8/1WqYOAwzz4B +mzfTO21sXkrnz/14eVOHKdTzGciU94ov1Xk0wymrrFrDjk9ez6vk1j97+Rk63s2JAsalUPNzt5GB +N6fWudoHKON7Asf5tQpkX+duxzKRZDwotjJxBWxM8C2hvDoKZ6oIQWO4YJ7YGNrdZDnjr0bSfjjG +CKwRbY2w4jAiRFCPdzNGf7I4XZzqrrmMn3rogsFvslFpvLn0LcQo4MYYNwj7wpGb8rhBl1fDr8BG +KYc9P2n0w1JP6gBdfj0LrZDcGFeWw9vqtUes9rgFGUzO+HhfN0ZVdvg/zzf791VQSIZe75NFH+WS +cGGFWEJj7w1KxQYj2EJvkPRcYuP3uaU7CqGWWXavV4Cmt/stsObFBsLDOnX+Oi8AuxumxeUTmX8Y +IDV3MaNPm0UYcVtAypullDznVUYgAic13WhI0nJ3rtzwE4fFekKVGcAQ8S9lYFKtWqIyXxMD8k6/ +jWBTBcIHExdkBvW3tIQd2a52d3PJLcbNeOF+FdnNBW+spXVTb3b1ZSasDlMpkWkBwc+gfYvovobO +9Qc7P1cX4S0jJ+zBwkrQGPmS8svRSPkgWeuiX42QvcK9aERCxSbP5QN7f3YZqkx1q7TwsJ3oG6YH +Lp5V8mFE3zhvRIq+bIjhhzdxxLAAhtacF420Nrg1jdCa05L6UHRGRJwBKxuXtxpvSM71KaFZJVPB +Bnvj0X9xNHgoSOistcfxAmhN4uzKNwLRiRe8rf68BWTfxq5hIEJIGAga1ZLpncWKuZnVFo/Lh0lg +nG0kdPrRDlIwv8c97etszHh/36nOucUTS2AkPlDR+N40lw1401DHp5lpX4CXJYAGkYhJCbI+RREs +ryFA6W7szybmLeO0AqzicU7cVXkH3FvuLQg4c72xvoj3qw7/3xEUHXesYKqT9QwRZo+8fylPuUE1 +tARoD57rr18Fr9tf9gJo+1n2pxkPGAGoJfnuiOl0dBhsUXqsTtG4OplmVvWdsUJ+xmxn9AXT5xms +PrITYtZ091XoKviBoA8x9fgoPqEuqlXXLJGJ4MYy8V/UPHy2ExnsLbnxYckU6YIVCIbT1CDqhBha +m+7FF7/oKjfzKQGGSV1/TloP7mtXbcQCbWk7/gFIXIN2arZMNObSSA1kGsgO0lNs2qJrxJZBbUi5 +VgDi4B4Q7QDjFL+x5wgyyv+P2hBJ+lesSjpyCFti5TrXm2HUQeEzE2wDmE3lm5sg/mVYJI5qCqkj +U95ij7/qkl+7MXoQaJlwUgmZCj0VSc4aoFR5BtXrsBRFC0PpPeEbNqlxIF/3SdcucwVO0gSI3IA6 +Fd2AwDmVXOH9+UVo1J05Gnu3EEBcSFEMSep+Y+SxM/Law+tqSILCbzBaWhyHvpCbWfjNyqwbLT3a +y7o0IZGIvz36ldZnlmv2inUU10Jf64B7+KcKCI2DreDUNMulFpzsg7KbcOIyRvRM99oHooHrPvDO ++JnVPoY+BV24yZuYRYEuZjj1Z+e/ufvwAkXPsIIUL1LusKM/L9XSgqx6lgGZ7s8GEVWot1ChHA8Y +Zmm07iPyJs+4giGoWw7ZTSajyP7KghEJK5wiAXWRwgrRzI6DAZget5q/U9GKSSlW7cQNuYy71+kI +eXSvCPRlolK7hgsBKsxerhqkc/uAbteXdmSizb3qpJh5deSPVJd1zc+vw4n+8ggeLIOk4Q5rUUVW ++XQZ2cjBAQrENuZTdh2t78W1sEn1zXPkCSA3Dp7S/337/XSHdte+qeEUhv1YtfN8Y29ajK2SoiRd +BJ+SGGJM8Uf3mHY5ebdCcTPD1Kz5jgSuGxuKGSh0hc5aFmsdMl8xVtmd1JNzfHTgcN4rTL6k4RsB +b4Pov9Z3joywN9ZdpUuuQB0DDxoDSeqstaxGESwuZzWntavx8Q/o9II9wz7UiSZaWdWhHGkblR4M +x/QYxUQsN7Zzkoy3XmIvSQSZJr8KQ6n3cFueYP2Al9MhArDXJ+JO67nroi3Mm/ZLhut1D8Ivvuf5 +BJNg0/A/pT86JJLj43ElmnfVLrWCbJlFO+YPBt7n1NudOTSOTwk36tFsB1+H/8/X5i9m9VnSMxh7 +rcKkaKz3ju2yJWVmi9Q5hv9cZZ0w6JBFBbl8G5ds1bYiAvD4ME/imczYoLzTuss6AnIWjGLPf/9D +cLelZ9mZ/ca2EFBSB62m8hlsA/sb78W8iWHjfCVk7YC8SLO8M2qBgpe8x0JaEnVMaiLBhKFWxQRt +lqA30m3McrbF24nEd1iMLNpnnHoiYRMseYI7wx+QXNCQsTYEqGQ0k0fnqugJ3b799ndeUAdDftdj +ODLyOOnwsM3UUobevg76/4rQwoSSQ/bpHLlQ8FE1E9QKt/zw/lN0I/Zpd3zgg2AQ1Hv9N3JU2kjd +RTHR7nx5TNPMyvMhAsVug2e+u+bkMcLSj9FekH5TWPw05bzJTu/DKP8SYlPveetJDCyvstvVXF4S +DPgXYmiXbFjut333E8jmCBUiCjA/kf5TXR8lCj2u2UqoYNcoQNPewDSMZDUZlpBWBwrl2lq4azf8 +Ul1pU5/6VAAm/eKkh++5aRbiA3CtmzJ5r6eK52HMmuv3jncdwsb2TzC2BrWMNrzUn29lr8zbO3at +lcp8Qg7H7pRetpAjktZYdzgsd9VA9c5jjB7VBR6u15lttk2y0XM89Gyzi6VJCuAaa0veV4mXOnDI +GoyJIOuDRfskwYJAKuxFRunJgN8cTOdSrFVnRfof+6dojd/7LEzUr4aZyvcksZKdfUmz1MXjTI4O +XYWdckqNOP7Dw29PIS2HR2eShRFppVGMtgIrZtrhRu9juYrNWHaX4uHMBvV00i6TJYl4yHDaZPR3 +yGSChqUP4vkiAo+1VJJAKWAun5gCZBNuBdsOoS/TQsg4iUEre8gVHxDLp1hCbYII5tBrUiWa62/A +JibiWoAvXgl/wTi65pHfy8ETWFK8w/U7oG049C8O6gi/jMut04CjMHNPE+rY18dk7AwVxHbJklpB +UsLUsl95ZBSDMB1r71ibxrUJXl+yOwLX4l7lanjI/50aW8Gw6LgNRBLO4qsenrOr4FrQdRrBl9oW +IDkSKHi55EwV1pxmquiRZ1bzCcNoMKLfISp1LhI6uY2GHW+k41PX3W+1agXmLoY59K2hcrsA4771 +K2aYdB1T1M++StwYwDvtoc0RkkUHC3IKLettgKCfOEBGsWHKde8cgD7VyU0dIrF5x53Boex0br9k +dxJcDR4/u3EmUnMt2v+Plhgqjddusunw1ZHsYcL/IIpRl7MMXFzXOn70imi3tOMwh/WF6aQkWgiK +BF/SWN62SCNtko+dNKEWTEFAQrpn+Qog9icEd5+AX1p8UcqqfVTxpS9KL6S3XCUpVW2WOozv+ZlF +w9ofJNZD9g7ertaJ2E9wqr8YSQOPztPi7VNTL6JklMaJx2Ebwt1DPNTJ1kI4v0leL1n1qHTmBJRq +rvf6zh8D9FGkj3LEGQ121Scc/DrQVyVkCaA0p875HeRFGgXB0qGf7nn6xJmPRCoa34OJDf0eoXfy +BvZF14WExShBtkBFnSycL/sIgl1N9g05/Lgokr8/c86RtK+QSby//mTwEl4TASN4nV/DJ6Prf53T +LL2BnARmGOg9OokuF2HmENNloiI4zuq4Wt2gwOHKYRyp3g0/ItVtLRWbJdHANCR4QzTD3Eh/5XD8 +SQdI7vDXl2PHlzXvAw0T/5/dAzSD+TEtnUHrMX+Hep3iXgPDmYZEzrK2NlDOxRavTeqUy38DJOD1 +33W4+SAFY9J8iVHz4k/ivSBxpTKUifm3zm8YZXn6Vh4XVzu3ZNTUz2j34fGwxmziUhG9dve3481V +lyUsLoLBtLrSYI97Zz0gEbywmxwZTBoP17Y4pwpgGCngrc1+Dz6Jw7mViBVYA7WnwMapfQrGG/AF +IKljEHSHBZU3dabIKJWyz85NwUTtdgap7OhPXkeZ+qB/eFPfoQDDwfqA2Kl2YaHlgkis6O6IC+RA +TUZ77kDs1SYC21etakHw73GrsqDwioU2TXxQ+r9rPjS5Fl3ilhimdJfDV/R8jIU9GEAaYVjllFky +pQGhwGYl5GtMpZTdrK9oEDE8AJhMRtzQscT5TAaFPxhHmhvQV7Kpk4CVP3G1UhhBrUo6QmMepzac +JU4ckxNGKZyzpx72lIH9JYxT1p03F3YCAwpNEC1XLibGmekAbqXex8f1xfdcpfBt2EpCSh0kA2Qh +uUt/AFk4h+6DuWkqmJhap1UmV5pyr9ipd9YlDdi2O57RNz0OsL/usv9z2vJP6K2IQQkUHsLju56O +qVZVbVq+LrmnhI2SatoHCBjTpAwmaMt+8XzfVnyN71ztku/he+S6CWSPmu6sWIbEGc/oVqpsuLWZ +tscjmjkDzErSGErNWPATw4VhCtBMNP81+tp+U8tvy8BXSm8jQxeJoW2ZRnk2qutdQroZjUntWL3i +jLkch7GeLG7+a6fqFZOW4wsrn7YIMf758lHj4gcSx8OYxOaC75BJvXqI8at6zklSFHYlJlxqEO96 +nFl60m4RgH6ZcwXPf+GBuM/M/yTpZ3uoi3hSns458+25YaJ9raqTOTRAyqEsjouNH/LJ6k90aE7a +S8iMzIXKJ4Up5M1h01NehiCUVFVNojuzAkreH1hZOK/uuDhBrhTRmH6+IpO5XSnXa2Xx4qCkHgxp +tOVMuDwJ6vIbyhLOh5xgASkXxrIK8ORusCGtsFuyXvBPZiK2qTZ1rK7kZHlDdCNCX2APOZuyJ56z +6NmLfKoveSfTr7xRpuBzf+dvMTH3ZEc6i1HNW3sxMAjRXp/Vqo/pZjOWOXSdsLXBwxzSnztPIfCn +f7+T10QInkpXIGNJvw7WFfhItxjZ7P1S9dV5t+OCr6AF4mLLvFTSI/ok87Ytpm5LWbvqZ9J1oOOa +caPxVlzM4mj7mhxPLsD25/tzRIVBUKZfSq64/M6N1wlI1zYSQ6+TDwPpEMnKSMSPBv0WUgj6B9a6 +8rYtAauWTbgYcewJmqvUCzvug+fcLUXUkAgds5huijef2ObgwmffrtSQvtb+9IdftrfWBQSQLOyR +OeczWcfLo6y6YIGWVrozEb1LGLIDsTUPrweuNn1TyfNQN/AcjL25D+srCA/VXpZfWXUh5LBZxxFO +MJs5/hn1yxDyN7frbUaaZXwLDUMKKagvM2rmFh7ZPrcnkxWm9LrogU0wrx2v6wkbUnFEAGMFm/Hj +dQzvV6S40YMfhq3lSH660CIsyqptnzRz7lDZRIOo28kHRTtcpxbnVh+UHbqHuimuFl9cWjzfIBvI +b05filUkQA3qJpg0qVozWw+309OtX6y3YN3GvjdMMFNLaDaEfWR0cWytFN/S5KtAwY1VKcrOvZsH +8zkqv93CEmBE11hLKB518e7WatcuLgkLc0zqObrHabkjXysE8tvCQB1umKXFPducLSruD436oWmM +u1Y1y6XRpfXfYeznHDvi6JfmQBIIIXAPIID3dYhMGTMmWD2ikcONZmndVeIzbg2zysSMdS4mSTjl +V3vrKa30UUG+eVr5BbgBsDDif8giirrRPHaAJ2wALwXMXy6jECSAj1HjAAnIaIv6oM2EnMkYBST7 +vC+NHv7zlpGO3+QLRd9WColjB45xjug7e+8laRopsjc5pDSu/4zJu4Q+UULpRvisSQqeFlIZyztd +cjZY74tGxWv6oLgqrq0HJi9LniEP7xsGIXvp7+9myzF381kH/DS4Qh8cpm2Pl3XyCkDt0ntbjnA1 +i3EH4yQJs0VzpcSJTASCb6BMiYD7BeUf6l0zC0mCnpnbMfw5nBFLsv4q0EeYf2v6TAIrboYO0lxz +ymDp656z5T3vHC7BAEin3qaZWISIvjCTjXHB2fxZwPDkga0Qr6kkfZq3vQTmmNpQ3ciaxTBHwpf0 +vDMviaEoOnzChOUxoGZDfYaCDkLNbPwnQ64Rl8hZh9OjnpBcxZDlpL1v+Xej9tljMm1IyPCO77LB +Pnq8Nk3Fr4LzG9TxW5/anqtaGlIZty7VNoq9KJcPkPmVztgBXD8BP6cF0yWQYTxK5LssFFhjKfSS +Qocz8ZcleIHYkqqscvOve7HLW36+7an7nYfgSVzaTaa4vw750mvzx+RL7DXuDOz9AfawyiO2N5QH +0dKkzIeuVp3VG97++0/ig5hI0SyFKcp76y4+NiqiDWnLAgZNUMKIIkfVVty4lk0fITxdvTqDiSRn +oNTqdRZxoOlpxnbGJyoydvmL178jhVuTyGLn6dXwnaUTA56y7/vaLyNm6C0qtYlJFUd6Cpgzg71F +h6Tfnk4AdBb2+7Y6TMFc/7zx8nvMMRnctFPRCdVBN+8B20yHOYnz3Fh7X520ltmiBlRNF38oj7g3 +jydfWm7OAHua3hrHfmKwmoUejuCJH2mXVzJ2fxIvnjvzSrIMIOnZNDBbox4WN9AbthrnoQ+5T5sQ +YNFQxFJhxam/VyR+5+b7YfJF1BF+/lgqMWLVKpcSmMb2AAhrTFRTsy7Q0rdtzA8Gqbh0/nftll4z +UBz/c9scfW2bi6TVf8w84SiUnqRxgAd+HzYHdcMvfnsRdylwGrIZ9J1uCdTI5twrGplJUpOaCPvg +Sdblh6VRYphtmelzbWeiZBk0r0ofWrQlQrDr6yKvwceBLKpidVvdhk+jteOtlQO/lwy/mg8Cel0D +Wz6h64igFgJ767gSjqu3VwZBMfRxLXMznBGuIRpMVOOWdy75/RY8eqhZ3bETwgGWsKmAHXTpCPe/ +hkQsYTMTEJBnbJ7VENyPNqNkTUU6rid5ya3Hn8h2YenKI3VjhZnf3N7oYhu4vviaagc05IwEz3jV +uYL01WULnNmEuln7CeIDxJJiach8zwFpz/gd/RypfCtc3Wf1R1SBDI/oUS8oBewr4rGvbfWyz5ND +9+ivo2VQLH3TjFWCYgsBgnQoSFuriupcuHmkpoNRE9HBy60dLM+pnPASJS/EHCSOT7WO0KCW05qW +aHxAXbW3qhs0hLtGelE9ufS0tnXJ97YHkeHEw6950V8rsnpXq1y6uUDRsPmxVa4vX51gQGrBPaq9 +uvHEDdAmU5/YcuGW1zauwr5XNk2eT/2rXFZPP1aNcybRjW/R/JLjEho43OAJfKnZ/0mJJBfVcWvs +GSvQc3zA3/7IMuJ+dT+CuZFAQqcT9n83f7kXiURIAWRqUsvLDQCLMRpy4CtiH1Gvz+XT9Yt4YH0V +Olzlsal3q0pvi62vbxi4YLr1VXFqrgyuViKQf3KSf9A6cUUDlGFrlUSI8ALfTB2fqucgqD9zWoOT +7RanBjgMDAgBED3JHXdgtfUXw4LrH0nzDAvHTZDmxiYn6IJqf5yC2jlNFS06fvNv9y1on4HPrUht +4BAZnjOT1/4xHeY6QPMao0UDiTCJgAP8x3kyLcaJbftgVGgFtF5VUv2sWyua3wrHIdLG54ipvZMO +aN9yLmbAHkcFu02pw+R5Tqg5OJwIr/zeMv9upwWFBJIxlVsfZHKaBYmM/iOgcin2oHC6LMnKnjed +Ghjxf1k1C+A0B/yiW8CwxqTut9DmHER532KwJkgxIfBUiD+6MuxFnOlzOySH3VzGKD3GgZW5kv68 +8Ha1DOBk+cRqdnZFABAbIcoPfdkRQLPcgoXuOYF2SC4hUJZue4KHe0JQ2qoLZf3UZZYrU8evPY0o +tqVsSLUjzyKmjtzv4Z0GMGeXtkH9s9+ytLLFp1CwCPUSZxDDJyNT6FDy0uwIJMRSvpMDtaYEbSkO +GTKpeNEURXgBWaj9STSYZNPTNwCHLcYL5kZ7NyS3Ijrrs0XXsb0NamaeGPqgnHIwCCwesv5uCzOO ++YQ4MCTjrsHi/R/NjrmLaUj02zXdelimrKNNcenL8BS33fTue12Onxq8P+12TKhBet9G7afcqcwL +47VlG2tFtnhovQXc61Ct/uvvjJlVFZNvahq3XhnIOnA+hy/3sIiH472R5HePbBqsKPbC2F+2m6lF +ZIMvlfzjJGFU4iSEZdQuPhOS7VbDvcwOd06+4wyl0PZLmayVEiO1SIrdQ2OYmaGhgd5zBfAtVBWl +nDxF8K8VHLN6W1/avUUocj8f9mgKCtgcpE3F0x315q1rXhcQ6kqeR971b4HycaboMpUkP/P+X7sI +b6xwzoZRpoUPiibRWuPwClAzi2Tm8p35R8SAO8t2//oAHBnvaJf/hOZWVM8EVfRetU09qoOX+GBq +6slmJcyku+WcA8ZZnXh2aONg/fu6LINK8/ARDG55btHOiu3FZk8S8dRPWjYZC0On1ZPGIZwJfL7d ++QaKyeb/wByRjq4GCPeglb7U6cUEl+Qqg0OXfAIqN4+HN55NmE8gi7aCcV7yOmb/5xzEo+SYYJ9A +Faf8Jqp/Zh7MuWMOj25FURj5lfhNxhKfnnLSdzuql/xqpgAgOi8Ft69mRSoLJS9+mwGXZovq+Qqp +CIb/KYpheGbvyByHJWASy7B8F15uCdNcxwApwHHI0z5YJqpXl8RjdB0+HB1nOHlkgAQJrGmJRIa+ +4BKnRgKH7RgIQB0D99sIM6HS+S5emDCTAyB0GLVvAiScaQoBiNNYbGxvE5jCXrMkqIwuGuiG9JMd +CJaAIqtz0ETZC6Dc8XUfnKqeFYuGJEd6MdZOGkCDOmi3zgj59uxMldmfUBtly6qu0EnPOSwDc9D1 +XARzVEGL5cRBvsNENyXbBKn/mqL7nVyfe4e5t1vkrO0pxSMe0XTkR2meCXABzyChtG/7Y8t7Yf0w +G1eeRYDnN/7xOQcgmh3yeVRBln4FOhqvfTKiVnI0BTMc+F6SsEpZ1uHF5zCrsxOU/3DB5tzzfIxx +vXR79Jb5EI3NPVtPwGqyFqARriHKOGInhm0HS6R2OKkIk0I99iMM+HzwkkI+XPXdFcaMkmqseeu3 +IPBO9JqnkCWSO4dVyWlXFF24CMRO3zSTgzciFOMokFo0EIdLElHr6G0AbCWkrBJhtVLU2Kba1GfF +jhmic3LJMGqntZNVDNOkEw536DEc3cKiVkRxBUz9mnEb/mwp7012vqeCW54ALojGCJVyIbAgducc +R35ewDc8FZMpvfyWsmvf7+pqBYQPLQHiLr73iThx7qsQdgFFhQbpc7wIGInqKuC4dw4RFltqKKE7 +l11Nlx+0/ZW/xFvuCx8DQZHCEYgESLAPK1pMtvYKf1CEQ5Nwb9CCl6Al3h5ZNgfCZBthzu6mGIDi +FZwxo4cIyadB8GftuYw7R2K5yda+w//U596yHHQ1YiyI3XwYOrKLZpsdM6dgpOfmF4O4r4EnGje4 +VCv5JAdCHsYQrP0i6S3EW6EXote8XZxZW/fSMhaW3Xhldz0FO6AU45lezt+/QWwqAqcijZWU9IIs +rGHgZoLLqty5YEWokb/4MvqVac4zDWs7RiusW9QJRNUH0joEprlK23Nio8NRDDtj8tvmKr+dsGpA +eI2/JAhjFOD/RQ+6XaaplAlMOIUAFZkG4XdJUo9dwg25jmjAd1RHTI4z8KvEMC3tOeDAxwVB8c3L +oanp00JLVHyCOjUONDWOpw1k6YpDPak2T4/GUdVHhywJg7qV5vD9N9shvM7oszD6Uosyq5aUxQYI +PYExRxkPq1AdSLejlIsTB076ChiLCI0xMDcqLJCX7PMJ30abZOM9PrjKhioP0rwgVUDWFEGHAvsD +UpISoUMF0+bwerVRlGge93F0+f2Y669qSTUSlVjLqZP6kG4USHrlsqhqmrZqcWa/0g39wpG75c21 +yudLljhJlotoKyRQ4Vbpxi8i6+r/3SjoPiXySofHOPxljOnJW4P0hjeHxI+pDHVJXG1ta3uA8mQQ +QNqmJDOiSqbwxydRbEktB8ngG/Rqf5G22kmPT38hDeEr49vXQsDxRhh8t+acW7g1i+jeFZBBj/OS +SUFINH+cAU3qVZy/FmYlwYd/YUURCoEF6I9AilUq/EeNmwmgocZvZbgGFWqEpaetImiXCMmhp3Tc +wKNBTRAn4qfzVc3kwowdAknyFfkTTB12b9PiucCVXj2ygKkzoqjfHuShLiT6PLPtthQAmnNnSBeF +/qLPLZ8xYCx7YhYLD+I+A7yha0PgA3c1pzsl8RrhPJkfqbJYqINut8q+VKjKLQ2mOFMKiOFj6WZh +5+j7eohX1vAYzpJPGoFYF8d9CjVU4yibCVzS2WYIM/OJaq9yCJIkcNS85X6Wj+honBx3y9a7Yk2F ++GOOpcY9klDZkZvgVOKNORDOzD78bkmDhUG1JZBH2LYpG0wwYyAEnHjPCCIwmbHCzgLEpt+sPQ3i +D4EU50tTJ9T+VRc6YZaUrO0ThaxNQfa7H/i+kQHUr41t1zODvZzTQVvX8CXX7cFZ2Z24hWN3yD7z +kiGXJs9nbtJaA0IZHryyltzaobE8hnCtyVJqg8nd53dO4icH9SQo683cu4AqrwufReYkDaF9BgFa +jwR0sjDeK9ki1q93nflIAzqD093lr96+2o3ykQAK966JafZMQaYMY25Nu0dUUlhjJijJPfTHPBRA +lwxVKvthWgr2KMrfz8nuooywouS8Hdk6eGddSi4dEzSisO0e3rJfbxPxN/GiGIRhdEvYop6Jsc7g +EFVEEfgsfjSL5LkN7jn/3zR1ARmJLdNcALvHKB3Os3zBbTAAnqxrN3aWO8pSkdVvUyj4VyG4VAP9 +uPfp1SIB7aEhRqMUaQ+iUXR0nflm2FyGAaDUgWkQFEo4poRKwDam+Eyh9k16JATfzTRwpQkyc00B +UNV9EapTvBwkhxGQbM7SWeGicfSbHvW/LZZH1ZJKrX8Z9nCMHWAOvFXeiH6tz59cxhd3lE9OUN1Y +B2aUk0mUOA2S2WWUhWY3s2uFe0yrYjTETHI3KQOS6Vu0paNdX6qZhLooOQPWjrhExUnmbtQDcRHo +uavJfcTeAMqwtiokzyPmSu7HHLjctqkjZX1Q6OgsALABmvhGM1pp1JkMkKaiMUnu+gxJ5JNI5Ehi +krpZe1ZAJ2zJnjQz5NENP+t+11GTCC/7LS/ttBcBQKbwItQSKYRgOkIewTCr6+zXz2QcMpY3hXFA +2osnvIQAm0CBq/ZLfBGKzXjrQxunFiTHLhye+qz9p4OGhb/TgObnEx73qSUl5Uku6MiDx12BVsa+ +0M51aOgVioaNtk5JmOcAhGEVNLXY+oqcu2BKiefuMF08zG/ZIJd7ERFwUpRdh6yIo2hmM6CoEOOL +noYHWd+18k3juQ/H/XpoW4XM+Mbl9ofaP1Iny7qT5Gr24ObPwdqymGYQC/X3buFFuHZ5cjCzJSCH +cQktA1AaYS3/6R2icyaWYwrRGSPvdwRuqhbsBe768C8S9AxThN5Nd2C/tao3Dkef4qReV5dihmW5 +U8/VMXe2KNWkZZ51b1FbU8d/AWr68Caj2Sge49dTq9M39hODzyZKzWzTPU3G47zNtO/8e5x+SE72 +UaaOfmvPMhZpyADfxOugB9GEt9mYeOaa20rAMwuyoLIBWnGPH/2NMAeDMJZHBIWL5DImIyEFZkym +okWymGKJ93gc78kXNqt+V5DUKTCSbzZgvNiGKFmEcKovVm87lfhWg7dS6geg17sK9zliHOcH2B5c +xqhUB3FkDtUEq6eQ7sFSihLfoTU7/7GQLepyDiPCYGQsRVwbqWEub8a0lOLccuKwc1yJNsi6QK+i +lwebXbT60WcANsHfsBNnz4kfRSSamnq/0mY1BPh5zD5u9LYkrnl0T6VP165dyREKXNql37ZqQ644 +WZa3IbMO6LSkFIkbODAQAakXH4luz9nt7e4W72GWrjqzR514ACp8SY93ndsJv88RmVQ4DibsWB8J +z938uTNe/SPhzg2GAD2ih/vU0YnWkszpYFB+E90wINScftNrDN/qyWyw92kGXDxzvsTP0SKiK4D/ +CBUU80sk8CrghuSkvrkFP1lyCEiyQQwsdTkN0fjUMlmjZZW5+cXOF0KWULiKSz1F0WoiYdWeBSZi +/ySrTu5EcrLGZs4crT287LHcodzxQc7jL9zYtYxylyt7dPKKGjCI8GLqhJByZB80cdNv7IAWuEmw +AP0Wn1TXrSNgRNGSlBmmBGMlfxF/iRcmprGwANujy0FdKABrj54nDRm72BYHU5lmjYc1Rdu1LXiD +fcdI3Mm6PB1HQ8QzmUw1i7LJLGiY283UlRBpwbE8qB7qWCnMgUrZlA8PWurpFRY8DqPEeyRaATSh +YLBbLFgUe/dDUvvxxMzVkFu+jtFxdtiEuR6MNGyxqBNLtMjbrosTgBv0UQwNr/H3BXIogxhBH6WP +OmWMlVJpEWiH3VTVRuoObdyrM9kpUEi7AUvuT8E7CQxVPTZibU4+q6an+gn1RwGwwMgVX1Z43yZP +faUo8HQ+qVwyxPDzCpOFQDOfZHBEKDOPS3MESP1wMhjJcUvJbiTJgh+Dtiyv9wnIOeksmDh4wh/4 +EEFXwRIf/svBqYcxdavhX3CIktOAr6SGiAVTE2IQeC4KuoKetxstjZNLV6gN7+J2KAzz2O+nWxbz +WD4DFjtDkY7VQRfc2rdwnq2XxeFYFmHNRTE5XhDwPoXSbbWNfxYqIKV6Ug+iN2Ff+/gGFeidqcdO +z1QoM3y+tQf4oLDHvTK0AnsMhn/wdm3YFnsnVW559zoi/tdbKPC/qRByIQOeHblFD2Mm1E4Kg1aA +lhu0bFdBC9RWlyKDKZnkSE9Mj4T8XPt5CztDrA8nlNILwWNLDNnBqHjlMxrUszFVsP52GknQgTkl +6qkDN2OGG0FSHUZXZS57jabQpkmC9vSIqrv53u0X+ovKcOJidSlgqV2tyuGdWY+3wx/MMQbOio80 +uN4HDaX0nU6ALt//TNPfTveYUOhD6RRywlG8+ZbL3KS+kMwcbK+TaDmUE1Gq7PDx6hwmOHex8Oar +6y24RJlru/Cs8U6AthCStyQY1ImjwC/DXnBl/DJ0k7eEB8N7O081Wc+zgvcwGUfv2M4qBUeW4+et +8xT6Q9p54br4rZl+qMrFL5Gk93ecx9s3LE4kSqpeUPtouocTjNiIG9u9ZowvCblnj9UYPC5zHUgk +MDDuLPgmztVtJjL5owDGY64j5Evawti8ZnfNNBFoeywa0H7aUoNqNPTQiYJiko8Ol3DRi79iMHbI +BZBr0WsWVnZMP90jx8qmhyKE0jLZioYOnMsqbWjOX11hblawasEzWfi0kVLW/d9PYNaMkAFpXCjv +WOf4s/mlKdmr2uiUU/7QSzQNT5iGm9lKYnxoGhOt1hx7u+Z+07qGFsDHR0XXCLseAYu7s0JTJGSJ +zx8wf2P/vE7/wDJ0MVG2CcizDnigKLVwdom9jmsotkCy/8TL8SgxyHtQs6tpAFe0/ckcmUj/V6oC +rsPIlnGKQhhkxGx/1mIbUft2CuyJMTsWab3DGynTBHv09riDYT13uC+cI/oV4Yrmj6LhHM8CFD4W +ZB9aiiqelds4aaYPdjO6kXEcyvf73uacuaqRXomQ6fQSvhPF0G4n2swr9B2L1Kdiw4ZiKuR+QaqO +y30/sBbJ5JnsAO8klyYSil46iduGUSloJfIBrB8fV2Y4u56CtWu3gi7fDFw9QyyzxEz4V/KPOr3X +K5Rh20OGaDRTRIl4rDJkskWfxVTs+OKBeBPm5xicW3X7LY95NmyqRAY/pYkWQl0U/R8tt8u3wGDt +D2AkXDUF5gINOQWS2IfyqGYGXs2eGv5AJ+o/UtBzvSOKD14sLCoZWqrBAiJiEmLYwVf+QQUuIRl5 +hwfBXsE9+CvSRjWQaGcyqN5YZofpBRNF6B9UaZUT7p9j9Qy12XFKP7Z4rqIN0Kzyq3uzbTOQMZkp +QG5N/BrWd/vLrkPalODvFsz5W5fGCGsOu0iRlkmfoWbnsFAEvMcDaO9ZVei4wgK8dT4ORi3vsDYh +qCoQCKEC2b1mnPMQZ1WF6FSBQpvhPSKDNZljEfA6E8ESj7JsuxjHVd7teJg4BVcGcPPUY9PdWy6A +I8HEa4/TeFvvjI6SXLFmSftEH0aC9sBdyjQq9bcWBWAx30lz9xpUm/CEbSPjNTH/Tv3BKhsItpkx +uT/G20mvUX7c7fThPfijQY8P4YtOQB429JzroOpFPTWMvIKENbhZcJfHjG35qOW7mlQKw8T/JTZA +mlBj+Rg0OATG/d1K0dmZWJT/NGS+1Qsc7n7koVgqphE/88fPNrMoq110zn/sfuNVnUz+J/j3eUhV +cXBCpflRJ5heVnq9Bkh4oHVtaaXJ9hFQ5AGARCP+PfxkJAgpsizKSKyKSGabA4CVn9go0NwfZZql +U4DTUQD+X9X6XcDwCcLWoOjNVI9rolK+c/xpq52vochSGH9dp6vabQj/9qynfWqHJHKHXqnqYXQ7 +3qldLp1anMiQqDsM2ji3orOhRQpBjbEbt/zYUQ3Mj0xiH8bgko6Trb4hA06ttpI/qNtX2EIoLdi/ +vc766K0qpzKe4lfpBcPZW2xkH2mQeHWFcK3n0UJJoHIDND8OWib72E3fWjjb8Ax+UIHTMJTnlP5o +7alAaCHCG+fasQ7yg9OP9tG3GSd0Xamjs46J8+LDa0jHXot+SIrKk65+yhR6W/vKVNkz+xkdunHY +1WKqmfTFOLCN1gNz1NYJaY2Gv/eX2y0F1ZGfNan5o07Bu4fGCoMafwad8cP8eiIJ8Yf76wyj5EEK ++U0LwxLPnagbWeYimUz6/RszfHKcV8lYgqPLe9OVinGQsTcHpzrfkTV8IoqXVgt7exR1GrYdKMsX +mj2TfkXs9ms8V/TUTF7aOrlWDF88iEyce/mjWE5YYRrq0MTh7fQeSMXVrFQAXMTDXTZ4ZK1oeTK8 +iyllcmrogSLMFHoQycgCi+Hri8MI+GQqL9nScsLabyhuMj2hwoPCNlyOXoGe3YtVKgneOKvZxMiP +BhMcxlO9viUJmqH67LkRYtc84ERiciNpmdhgYaJJZQyhr1OE7Dz2hXEAykf3AoQOaYfdCT6olEXJ +jFUiF+5RGrXsd6jODtH8T/zmsepgVO8JDo6l1sN9ncjNFlmBn9OA6SpQNSvoc6XQqRUcq7KANsYW +WHkLAu7iZ30Ze4M0KNL92OusvDErNcVB0JTOsci9gId14X4iCWymIudA6x/WLIzb/38ipym+yMLm +KpJSmydxK4JsagJWbHfIRdRS+ygI2G0uiZsmcHnEDNpy0ynjssl3Xfcw/6eJiUJElnDDlNcYqfvw +hXVnHmL9+xtRjP/UVxZ7MPiyRI81479Qcn4xukLWU98CciInrrTXtGWyj/sMC5ED/sO84Cw6q/1Z +UshDJSSzSKXVfiaW85YvN6FApTEx7HLaH3EPYyW6hJTrULGPJUEjSDrkWFiBjeL9EVV8TdZyf00q +IZQfd7u8Lsv8r/dzTPBPYqBYhREHSzYvcgb73vhf+3PbfMB+dkbU1Ti9fB1QIO7M3Xz0ZBUYlb3Z +B7+PMVgBGiNuWOQDLD1XlQt3jIV4GGtXJCBlhaDPV2NfcrATJFXJPetrTPjUlmQk+EP5DIAUuNGy +yKQSFCeSw2ngIcE/adA2gVRHlEcP9ooJH7mUBuUyFr14jMS81Rn6U1jOQrU+mFgFGnj2UyRQJ6rL +kEQyCyrH5yF8+2wCDbP+nPswBkLjShqoKq2jLt/Rc1r6sKW+V7BBHB6U85UCEbxwYQWuuNMs0pEg +oTbgRgoM6SWVI6bkFSBIiTmsoqaDIN0fMJnfTNukg+4bWf5eZVps8OcrxVh1u/ZnKXnVoJnKtvEs +g55MJL5NibkhXNCg8gj4nXZ5ylTgDl05UJ0cPR6Q6LmFhO8KmM1allSL8q+4gjfIWOw5GL8ljJ4v +FK5H0pECfwcTnnjunubb35gcrqbhWdd7P2fn7cvxIRwpIMbOnbmTSZbk/SklCiLs/2cEqDbT83ue +YX7wIzK2DfFEs7htfakz6edw0ZKWiGKGPwZwZy8KQlwyn4aAsG4h+j/AKf42i+P+RwJyrpa3iYlV +JY1tFe2TYTJjxZaL1oLZEXc1x+SYc3Re6VjXeuHZonZRrAZEuj0oAk8ecOUoO/O0dNsDKy7osIG6 +BbXaIJ+z2rlJSmCobIdMMjzD6RxhaRYpoxOg+CU1QAd/xvyzQqFPI9bRaAGgYCxskkOR6MgQzDTx +G35pIgf3yJTFWRzhEhFFslRMMAw1ajYtrX/Lscu0xYC8KOErQ6VpscyOadrQnplYRAvcM6xiyY+T +/ofIDl3MATy0MkSM7qa2ryAOwvpmFeBsgdCcTpxzlbDFxxgI/aA3Ie7E2QOEOiGvA6C0RY6qYI1M +hx+CvHJoweJrJ1yFVCH0yDZCIJDas5lag4kojRw1Eq1MgvJmegO7/L4pVdkygc8xMje38YOZPkjc +vgFD71aoc1QWyiXpJ3GiN1mC2AIMbUSjz7ElBmFzeuH+MRppj1WqHYWzm0FUpAT8oprJAGviAs2w +uFEA5WOjbs/ZdZIYcmHb9UnWCTsjo4K7Wj4rzpkw0dtcxmMhwm9490KwcSi/I1NV1WwBsZHgaqcn +8YIx2tYCdJEURRIzCYBHyn6aGsj3C+OrWFJImhyYah88jebEWVlowRDJ2hxqfmNQ2IvEIal9GEwb +ThVEi7EChGO0sgIVIG+nO5eIYGLSYs06qbUc+0KbNzDMsX1pmtTb8tPjm6ZZB1W829HaYaiup/iO +SEjrd7DmNiGLbfMBvtihpCMcyF52HFfrPIc8v2gIIzhal1V+x0mkiwTJ2BpeSXRV3ipdrAneeROC +BBjw431ZdWggHhsAlCMd0a89FcrEsl4mpr9wx75SE1bp1R8befKeKp13DRrs6BlKCOUvdPPqfF/N ++IHVuJsBnexH4qCdWkbHaPO0LYtQ51SuME4tWYfNbuBng+O9QXJpIPCBbZsjwOOkmDHUDtRmRbHn +id0sMbGDqBE7my0m5oCx3KQdwvG9XlMufsIp1oW2zdiD8NtzY2x/BnseQQW+EQYqyknqt7C47cPe +K5OzcHrwpoxpyRCcZFZSaR24Y1bo99z7hdkuOAIKKVhcj7XiwofquAlgifb2R744hDvJZsi1DDwP +JQhJx9QzTPmu4sN3NwcmcM5KHOgUo5UBR0DIMsOOUc4a3VwNBClfQnvTxXWdWTiDsozz0BgvZ1UQ +uJ1NCjJXvzcKJNkA5ox3aB8E4psGb/JgWI1Mmg5/KhPoH90fcaTmbc2Luw8ExTbEJjg5Abyn5QoR +c2c5Ms5A1HWbq0D5ccywpAnPI2tsSDeaobCVEJ+7cbJpIniN+T2L6BY34VBwG/9Iij1WxytpwDYx +oJG1WqimBOHXJBgZ+qNHpGTg2QrDu1yEAaVu/ZeNSffE/wVWJ5FeL0t/PRqdczH/PeIJirTLIqHh +HhGbklVnXnkjgCQQLkG0A2OZpP84QeyIrt9xEJpRITAnL1LqyGY84z7tRzfCI4XcZaQEnMI1N05Z +6coOpshZR1BobCFr3W+WNe4M0hWI0kPEYh35c2K76nZebshGmAsweVnuR6BgX97H34C6nbYolCs9 +sVsQz+Y9BSCFJF6whUMVbgDBFLu2k/libwPswR390TSVdvVgMpjq5Ba20U2dCrQFsCSfgCJ3c0yH +0T0M8kaVhF/4cBbqfeL5fXQ1EOf4pLG9Ckl+BarRBPPTxfpMp8k5oL8Aq8U2o1eMZpc88xagjm+g +X0XZQibEgJptL2fql7KMKaeTHdcajBzELaWcFs/Z4dezc7eONEcqvcq0slWX0ZY/VLNt3sYOdopV +ou5ujsRUWgpr8tv9//k7OLiiVLF4qvtkD/v77CNpn+CP6eKA2txhjpe2eq33P6KFa7JmccUkiKWV +2XIVv5rmIx1kEp53sziabnPrt38lOth+Bxgz0FzPYliPW+c+OziH1Stq3kt1MGUmUjj9wa1Cwbyt +u+LKaen7Md92EFFIoPzWxnSJ/9ud+gtygSdSzCNH1Z33/Nv5VEGKx07u0mSmMN062GPK93SLKv+h +yXqiWvL798HhOUrUYH0uMesyQW5hk3e4OxcARS41NBJabdt9j2bIBY2iXYr2OBtJG4DLY4lHJmVl +K6lcrCp04cYmkydqYR23CkvjrzqElnz6Df1EsMO3IaUZ/MjGDmQqj/RFLJLHj20VDMUhCKfQvQmj +zMZ3hLPJKHP4no2fr5LWe1FU8JpfZkOj2AwyW3iuzR0jcWdU914WaebwjeR+LImVaV7RPm+MxfP8 +2Qor+ZCmXAW+0xvjWBZZb1VrEPX5ZIDuM914GiXrfzzG3j9i3svmpOx1pyNBP0kIikFaXLiVHK1c +hR5BVzOMbVk+kskfHDU7UJyYF6xW4bOYCsRUacitlhrL2/mhH0EPU0YY7ruRGKx6eNVQQcJsDh/z +JZJiq5dx7l6FyzeFpfddf9V53Pdk73wO5vtMNyoN29evAqVemEXzNf6cU6PAgzNB858hN+ZoQatd +xp7aHAeBMA6AlOvwZu5foRovl1BIHmlm4fVayHrizloNUl+CCH4PN5DTCeSJgjMVPQACuskJS8ZD +bkgRgDh0VeZ3HhJ91tSZYmWLyBxWoeTB7r7/2g2qWrdWn1gx5wr2UlkyCelDHDonjqxHnLC/GfyN ++EmVMSSnw1t70tfX1Q/QjpOc1k3Ayb8pY57XE58An6sjr98l30rLapTcCFXHRdnBsQIybpn1hUbE +ykuvVmBLHCEdiEPHaSxHsom5DuRNvaZFXBAXLJuYLzB/aiZcvHnYVxpc4j8IERXZVnmwgLDbkB1V +EDDlAGp3KRwe2qogexXTe4tSbgzIsPe6FGYcXCRk0Zf5k81VnqFJBT1Thg24Va58zSXC0iKyHM+v +ywKjXUkhUsfUJG0Tz4Jm7TeCnH/dIH6h3RbwZdtyJwxVGsNY1TkrsR+aYmKneUBQ53dnuGIEqO0t +F9FSan7yiGWSwn06qwh1pLuo95BPQ+NAb/JbX8OBOxNi3VjPCKM+FXB6hxaI1J4zlfBlsU+CCY8W +KGgYTUH6hf9V890b/9vKktRaSKjeYjvx0+nw26+/LijNWU+7DbDTXWRoy7Qne1RLcVfcwfT6vg7l +npr6Q0lD4KSDGKkLHvZ1hKea1wq5KnoDX4uLAu9l/iLNr5+joBucNs2+YN3W3aGPmiDteplr+vub +yWWt4hpLcC8FCSdNxmd/RIhAjot3CDJK9MSUmC853ajEEK1v4d34nx3CVIV+ZS5ut0DGXAKlm6Ih +6F4zo57RpUIS2LAY+EBmv8Ia0fBOF3h4bxTYOlmjCJy74+Z/0+daYfjtOCch2nucFOVHFem40gCA +X8dl/oD39yeiW6lntISm3rUYWYFeue85ffmIlRb/lRoU4Wf20zaxCrj6/nADc7Bl9Ou7b3ZvlNu/ +PPzOG4YqXL0HSawTl4GeggtFHKhl4CevwMEp7UEhP257aaZTKF3uH8PhX22+UPbEs0O8k5yDcZhi +pFp1e7N6MwICCM2kgKOlM4iVrRWSRSi6RVj5vgjP6Q8vJvXQ/EDQFLlNbk3j5UL2nxxRa8kuDVCh +7oPOl7HMaNUM4EKZGVNV47cO+3ZdqE8ofWWz0qPrfEEQ8qHu3IX8ghsUSfbe3CcTtWRQgfl1ArUb +ANbF+MGDDRAsjs8GMtVQooCDbycV897ZfoGvvp4+E3NWnaxGTk16cUnTJkIafRXW/xgjTy1ajDSB +CzSaJl7VsCCDx2BLO2KT5YzgQwEGovBxZV7INLwGZwSjgVXi3lKFlm65xUBZcIDUN1kK6+Z4RJVg +F9jmzuNGK2pZH7qSM4TyozXvPTClisp7us2jaTX9/GH/9YJzsxYMvoq4lnwzqDEKhkfzyeNocMIc +ASbJKtkXaZLx+nJaQwAFGNtp3y0mra+xhTV5FYyfDf/HCPpu3NHI71cyel/cCJa0BFidWOjIIW5w +w0mc3gFoHSh28nmRE065z2GZWUuT5Mu2m/MC0gGDqOUKkPIsdvMUGfB5A5BinV4rbT724/TeaK8p +KIse0i//jdjXnVPoP1xCyiivGbpkxyxmUsjkActZ9avKLoBSGho5l/O/4GY9yXdwT3yC+wzRhAIc +Bx7YGW8mPIxmXyABkNOOpn0W6VExkRkzyL7X1Og1SkEMzumUc72I70gBORzBqq/Gdmyj2CBDtTlQ +yYiTmm/2vntzK/kc0Z1BwRK3lXophIuGx+0/coeH3CsqWm7AopnSzWez5Qdw5Riiw8SjhOLvEcCz +59iLjQPxBhVSy17y5F4Ok5DzCD3cfj0Tu6IWX6GdH9NuBRN4s7DLdGIq17BPp2r1S4yH6cLjNICW +ZgpGmiDnM2RqBmUsuMUqajhyMRkcRTycwIxa7je/SAEtbqeJMZjsSduYeuCzacF3ck9AkWhzhmlA +LwXCDnY1LmCVpkM8tUkaoimI6CLC432VhOAzewRNgMOyxbgLqJkPFvaMUtyg87NXaiusrFa30h0c +Snav4rbb1wdQRxX4Wf5G+pm54mIviZ/XKVZ681EKd9XhfO1JRrFiEzKAWPaZ/+mQU5b3OPzyFhki +ZbROJDeWe4752+cnS2ECqEsqZ8uKOfNsZoQbttsmG4XcPUs8wl77tVtESHne2JuEwito9sDtIZfk +CuFc1842m7cXsNH6QBWaDEuA/2TJVVzgdCbT6dxG23UwwJyCjbC5XGGsFMO9TRlWHdujscQTnJab +encBxgc6HUkRSH6YjNBUlLTADaQwM9K17QR71vtIbry5Ij8SdDoaE8pN6dK1yvM3qDCMuUWYzAoh +3p/feXgfesbczJsHS+ABnCY8lpG9EtdDO+pbU3uKhuQ/xcKE88f8B19l4UxmLlxE12PDiXyROQXt +kGWeXYQFZ+h/eY01tvUi5fi5eNGKTuZgwsngNa+e570rhuW4Z37mbZkA7S7pTkZ20DxCAZtrw+PU +IcKtZDl64Yiugv5tUsVAo21msPbbz+3PHWqveQy11G0+2+dv0qpwCeMeqBGWe9e65zlTiu08skca +E+xc6395h0ZIZ81Btszs5yBU+tjTgZ6UKy1K77rycvmlKoXEzubhOFi0wpFq5s8cXsZtzBNHl/X9 +sg7UcB0H8zuqX/156mA28iDXq8uZ4aqxcdCaDt6tBsqEb4Pb1OZM8XCUDSE7BxGQU/R5+rMye4an +ppMlJzm1D2rjmiQLZzhsoe85ZH4VxuRg0kisQd3jqJFlhXW44YbkNo5lquIKlI5oIZSFX0IvrdHZ +5kRd9X6vE8jAmQ2ZH0NqWm9LCrm0PmaIsSaRlobIUcqn2TBTMu/EvTHcWMQTCwkD7JuJ1B+A0mxS +WlD2QrXkWoZQ0iTU6a5dRtoaBbVwtCcDUOKb9szvU5ho8lkOM0By43I/z7A2uI5J8De/Bd6K2NHo +4hJniY0EL8C2MHlw+uFI1fuR8ilwOdbTcBTXkM18+VXRloagXHLEC1GYWTVDDtmdclqTufa6Wx+G +1jQUPriV7VHd4ndicnsJy9rnngQ4HAFtm9fWDmBJyZ+CGctqyqn2h5RrOod3+lX7KAyFK7/vG1yM +LKLEjpP0kkVlfBL4pwvuILaNhrPTRe9n3SkIWCszBxE+Jg3JMewSzEX7u/xlw+8awS1cLpvIqAUQ +C5qtajfWLNEpBm4s6I0NeuIC2XeJZZxv1eremjkXcxIzIssHTKkMXHO97mahH7p+N8NF2zVaa8cG +/VP/Xbe0RN1G4cxGGkybl7g5dJSpOiPLlxwLoMTvaiaj0O0QsFynFNpcBYnSM+kfeoD8sj7q1Oh1 +fRFnI1Ao5I+Diwm5VbqE95g63HPzAgnkAbrTa5h50z/PiQdUrAAzwQAkPvglg75D0WWW8sATZ4Vj +HHmt+yrDHTpvhZaSNAxF8ZCCQlxa9RZuMWTB0rPVeP7YMKAao4Jvo83KTQsyfedTNoSqmrwf00s4 +7omCPNcZzv35snjcCQB8hFuNqcwSpLhVJW1AejfUV30y8ePwl1PfUqdaXwmImMukOV5o0MrjssxK +oe5O8mqM2HHgmwh9kXUBVqWTkAtNPnhR7/LgEql0Io322l48yftVDAWaLMGMwre5/xIHbe/vXrsB +jkRVomuH5InGtBbQQNVyDsfdP9iCgVtzQUpLAmvb5MwrpzwhDqhSYl3vRjpn97h5NAONiEP67gVJ +e4e6h7mKQFUGv/pc3GyiRoHEC204vt8uuDDRaF6ecr4e61u5VI5rc3H+dxsxhlvdLRR0dlcG91xt +s4cpP8aGlJUcJjlnj/oRDyDIy3jcmxJeG1RnacZflwdW2EpED0pXzt94rmwE2fitV7zKHjtfNr17 +iQvbJcQjc71Vx53jmkMSnXF4DLS/SFygKi44un1+cPxQwbONfwkNhc8B0ENJWpef7l2TWK6bZ76J +75CWbULLEsFlrx7Ft4sFHUvu6rmJyULuFyKqFXkRpoH+YZ4CAIZaZx+OWz5DKUy23jbpJniADBaz +zE+di1El0aDzd/+hbM36dlGqlzP9cpHGtNBJDBMINnYHxgXS7cKLDDRftLpSn1M5w2TH23ZFYt13 +wj7jEWwNhED/6OsAi4pmQQnj3zA2+OoHX3gBjgDZ14BItm+nLhN0kcslo6FMOhksM2Zv7XEDIf05 +4MoiK1BTuzbZBhpe6Bb1aGFn5eIkYaNQi5XBQp8lzMyMW+bYCqdDjF1S8e8qk1fLJUo8Pyk7saaP +vSbZuzdKElNH7DgWGm4M0JmM0FH8VNGSiccvul7V8nrMFClIUgUBsHwYKyXE76NrTant8H+h9x/1 +Uu3afy+DWDsovEvMVXF23AYG9ZT6Af8+08B+O1i0JbocMB8B28erNcGQj4HkaREfuq3tReyoU9aJ +kxzGrjNyV03taQsCPdpt45S16BBsHQqyL1Tc5UnW8f3rZuMF+ZupiDZR8YQf02wLAAdBv0FPET6l +wPtFsRiWVCxDmG2uu0w6QLVD388+O3cbkAJA3hl5OIPPCaLU+YxhbGnDb9umyijoxB+S+luzPYb7 +b9gQ5orMH0Lkw95Nj4mYaOZyraBoxeC6Jle8xa2uuyAwtybJSdb00vgN7VgcTo4lJ25hj04sef9p +M7E/zdWHrl1NLjeWjqzkGGUIj1qNKUKHJWsBYVx11SQqvjlYdPohjtZ99HDl5aQj4cPtU0XfBQdr +3APCFMwzNNMMf48swjE4YNnGpfznppKnuuaUcxuJfq1xBISL1zNuAXji+gU49n86a7S9mTlxrgJp +qfumCvu/FDgEOaFLYdaIhMfUC2boThSLhh6y5qhlp1HcfZNuB1mRpp8mzlxUn21BFYiXkoOzjfPK +rg+YFP+qROk6CegPw1uePEAkX/lXObKDiifNX/F9OinESxGwhtIJOCKDshV11aA6dV1EKZrBLcNJ +HjWj1MKk/tIRbrAM48xzWHnfFClViZe0AKciYT77c+LApxPjiztrPi5+FyHz4JDGAQqXTzXfqAaf +WEEPC94co3dAli42rEPenrQljRI/YNr1/wXHEhyPMRBtMbUnAk0uPQNwiXoFUo9/qbSAT9KFPTQC +4BcTEt7EcZmkU7Cf+6iYutP8r44qGw5Qf5HKBuSPcj2ZgIuN7+sKFOCfzU1XLz1uqgcYT250St7e +R06Hr3/wI2d7apHgpv+0J7+/dVH1qT1OpaGQcZ4wVvK7M/WskuXD6LDgiPTTzEodxVfhzs7vCTen +veIcuxxzotjFnDCe3NImf9eyC7iRpXGZCgrtInUiXWNRMAwZzeSgIdqBEsYTUUXCiKkt+uOtZnnn +ewR+YYv8rfuUxOJ5a9V4EyS/AHrK1fqrxqA8JyBWMbWuIWB3FPDqSQ177mu7sTCyu45tTct+0u5H +XMItV8Am583iWo22gh6Ubuee/YuAwPv//JFonm11jcGV318+R9hN4YRKErwZt7/daB/cZqhTjB6R +Pp8HgxElwkJ+oaDCfSei1YVOGjGigPxMa/OjyARYHneJA8mEQMzqMamNKuaKzghwIUA3JudI7Ifi +emPsCl7T3xUj8He0jmvSFnMRATbAgT3PhGv/Wj/ul14Zy63eoGmFjR8IezDoDRPufQFmAOnUY6Vt +Q3fxiErnG/U2QbUCayRU9YpyiL/s8xQNgPPh8LnRVArnivZRx+TjJrT3Cz/7owxaiky7Bqh0dLvS +KICbievtReoh6kL7NeBsnT4Ik/Q2Ji6KrCiFihee3AZ0Z5BxMRVSRdlRPX0t8Cctds9B8kk/wGSh +/SpOgT+WA+5ZAloIEjvSoZu1ApCHDlc3ZBtKoyvMJ0vs+uzmVUdfyj9I57yP/kR5Q0KLhezGhZml +j5Ds4BJYitEjkOlEorcIJ+6rG/p5a9ewfGtYi+qEl7BgyPi0niZQDAn9DhUNqTgv7MXkoR1w+NPO +iSYML2e/Vfjgi+wKVZqj/Xg4fkiaf0OcBKqe/egxrKkz9ph+RkWyAed7ru/pTHXP2afzaNymYPPx +mHSdhhnS1VvaPYBuPuPtnrDn/QAwOrXp8h8wlenCvCu1p0E3q1hIf+TpuQjjB67fyS4OQkcsU5Vg +rYjhale01vleLikjTolqMzEOlYF389nFbjGAlM0Lf9pV+ExSzoSA4/GxYIhynVf+CCofXxA3PdkB +M8BEwcTYiv2EatHFXQhj3wXypzygkMr+tGzVCKdxVLc8H0lZZeQv2cRHGHZTtk3b1r942sRFuVaY +GqQWF9Rk2v2anqJ7G8XzILfxpDBgAi1IueqjfQgqj8xc1mywvSpaQmv8eiUxBgMOJdpAlMtR+JSx +bwQmqOGA/QJn0NGY3vpZYqA2XQGYuK8BNMPRvfpoCGEmrZqqoZFDaaCoxsW1lGJtTUnkdPqeAiXk +c08f/6EWpB5uTFoTF/QprgVJ4AarqSpEFsAL++Q/N2w9l3gPj/ZId2o3qxZ6C3FbFnzfswHznZx6 +T0qWuBSeCBWRzR3W/GBoCkZ6kYicVXxAfCaGj9+cSbUhqLRjAE8p8DglNAu01i0iaWzNUFfbTDFr +sYxM5SJAJPJJl8w793sZgaco9Lq2GGSxrbn0LpL0XGrcLYyxViLBQ1/sP/zb3AJ1y7m8fCnCWK5K +97J4RyxroQhnTD4NXYFsOYxxGfzEp45DDPIzOlvzhnnouJR2Ta3f5yywrN5+UAyzPeYH442gazgF +46ZCYiBGpWKSJcNIAmHmHd6cPkjtTFGfGK26Ts32SZVnJdO14ql0SgZ3IoxxZBdNigU3e+dLyR21 +v9YsAHWHwHDI9a/Qj+FjqSA9k/eJD7qSeetodhgAdqR1vCA1mbXb1RUNNhKHEPmCMz6qtwtmaV6/ +BuLo7os114IxyF/xLXyqBatvjB0QDTb6bfkvWqo3cYCRMmF4JB3Ass5n2NFmCC6znfVauB2uCOxf +R+SXWot80W14kBE1IrsymwpURB38816kIw47b0lCPDJ4mntEb8K1+a/7EVvF59o/HIQm4sF+mhoJ +fuYpWNsc3PNBai63xwtakZLnI0yjg1GuNAQhbK/CZE3HEt2E/h/b9I4P8QVL/fnJvrkvYbJ+nr5L +16/+ucj03OPqIU6BRAWcdzyjDGPt2svZ92TQF3huTvhllna00A1jOQ4d0H+jeLSjpJlZNvIzYquz +7s7v5v5sUbrtpLCeufcoodSwchTlA70xOBTaq+AnZtAluAwJuTokiVWHZvYFUg2CMf7bx7pMqZ7S +Z7OLfslTr3m9SQPTNZ79QoObiIGDvvywfW+bpsg0SYQnJ+9SXLWpScOjeskzCfZoXPoMwkNdE3a8 +Fc1lHnCsXt1aoCyfpi0faj8f1yOZtDKtrGx0ep67aW3dPxHvqgb0QwGd3Cd+IZPLqBJNyNiNRZTG +vrajkbTUztdC2apAGcCKdc73MPWjGqkz+KwQZL/YD7U+UZ4EDoodJLXLoHf9VETJUkNBj2iIRZj1 +qcjPO3o+stIXKyUrQ/l0SJXRwUknjVNSrvn51AKt54iTtYngOKjoI8aQyMdT0qkFv6NvNtyByJ0D +vHWFGqI3cAMQRr2XvsrTBBKdXtCwac8pC9sHA1ij5Qoehn7JiaF/rAjTWNfhZb31e4nfsIr1YGC8 +2qED/WxN0eocqS9ed7/lxFjgrfNyGAjBrtXj3A7SYfmbzQNc7Ju1N9UVkT0L2WvrLWGm533nisEb +SNkzTIvsevwy4lbrkldeQNuxPDTzhLgMSOSulwq9pcxHgD/caDvztmC4rHdQlM2pMZDoy8bxxkmF +wC4CQNVVRYtrnmOreM/6Da6SmnZGKVONPGpfEYpVNwTrqEHw1uh1X81zx+pgMrgoxKCZVeRRsSeP +3GSFfmAlPzl9wjw7Fwj304rllXep1rfUNlWAkK9Vds7vmkN0+/AoU1mlfCIhT6SpBk/IrTKNZexB +LOBfhgroJrzXgCMWNT4DLnbKgpUmnFg8/ivfOXKYxiDwFzDVrohYezr7AHGRJ5mUqgS1UHIouHO1 +uxx6ycnDRBagDL6ZI0eRq+Q2vbUixvK5WG6eW9Rp/s8bpKmea5beJWl87av6rtnf0Eh9BECOEoUW +69msuP9szJjA4sT06sJ7X8UWo7+U7bnVfVUc8xsT9i1rVQJAUM2fhxHxcuhX3ad4xx9XmKnUXHmo +nm21L9qt1zuahUSo+jPRPhpZTyfhUXvIDfAZuwKaBjvE36fv4VF4lNY1VdTpRkdRWfgKQPLw446i +MSw1P0gI0tvswnqfwg5n00YbfuPJwrdYYFIVK7QhN4IMwilcvkA9WcqdpsYpNau6AVDu5W+IQaBb +JTI+Q9i7Hcf7mRPzvlZzgCogk2OfVCU3O7B0JXPVsiueghFYkK6550GA+zrWgS0+zDZJEcQagW3P +B/SqCBVtkbK6QO2xJvnDZendN8V8FV1s550kwgQRx7hX0cRIB3oEffTOP669ru4TxNXtSaBsWyok +Y9BnxbMF579JC+TRr6RcyTIzkGb4wO0KaibOS9PLvoZ35x4dLztrI4R7hkn6Ce4Uvuaoe+RzrMhL +NauWb5Ex+kZc6sIQNFYDsMCs0Yv3ffFQfm7ZaD4hwawOLTvZVUnzZmFhJYgfkATuu1mQxqRmaz2I +UKV+IssSRc7aoT9t1bFvP8AkTsY/Kuobw20rmpk5zm2vl0gIum0t+AnuRCDOuSYkRT4Hi5TaP61y +Z6+B5FVU7oF/IHknb423RousWSvDmYOpY1vi274goN3YPbPT2GLWLUkgwiVMF52wmOxq8EFcQqU0 +6tnn2VJOx7CijFOTL2iPLBqQd02Oz9BvYA4IvmYVfO4GExaosoqdQ2qz/RzjQYRVqDWOjHA3BrXT +0DhCpg2YjLNh4ya6JdUiEzJvxl55/8lqM2lI9nFpRv00XBVNbdG41KVhc0VznQyOmuN4rzF2IYMe +/S7mLy+h/AhpDvFi23bZBt+wYUmjKRanQGLkfFRV82jXNuI38BFYT9NpJiw2u7QqLmWqrN5SlEDy +rYZhyaoxxMMyis6ZpvxppqiB8FnjaolizShlxng3NXx8U5qgOwSVQ+Cnwm4Gu1eFXX7yExipPr3j +OCbKQB6ZZMm4PbOV0H9WJlTkKzXqYaSnhDcOthPtteaZS69WSmNmehfqZeha57zzV4RDKf19AI6M +PXSH6UdnhvWztakVJ7B7LQUA8M4wOvJjGsu65YnKXKWndQoQhmFRX+MiWJuyjJrF3D4DG6oLi7lo +qDegPwlitSkUAYOOXsUPzjya3tA4WSYGmx+fUaxsbgnINB0EOqh1w1mYOYieOKqI4HqEAmqZ38TY +ekZpYdf7FF2pINdU5ytZ9gscolMbjFvpBTlfx/WVmU2viWGLcvMpBr2bKooApgKQ8/POmemmG4ZA +yvBtvBYegqWzU4RCoI8NQ09pRcmRDN8U9u/QhnnahjDdj7lKrfuLRmxR7OTq3PaJLnP1eycjG0yp +9AcdwhEteRzVbeSn2NooV1afCDsLxpAR3aDksrxHa3Oya8qRFf65RwHXKBsdhs1Tdf/CXfRaWHMX +dxmIgu8A08KnFg5PaavyYXeYt8Qg/H0hv6WoBLeIrjwQO6zLQtA6Z/ui8fxk3zXmU76O+tzf3cii +83SXNgC5iJ+TVKnth6qt3+7+CO/ldEk+ymX1EwqcToPjTHF7gAMTAtmYInOJCk2w/8ldY2w+DtG9 +vBpBNxVUK/1dKd2WGRtw6NOTZsMUoJi7+jxtHRbZLBqqS3lnq9q88mizqicZSICOm9g0bBCiVAjm +60SVU0AlIcN/tpX38muiHpUrJ/7crWp1z/rfXW4pRFccwquneWzhvg77PTtR4jJEd+ooVBJjY36g +EfvpGDKjEoqwDZe3QTgNhL7vW6n1Wr6hWlunZjmJndzjxn/a1NjV5kJFFrhLwFUjPs9XeY70CCyD +hu/xWlx7bageUZ+7DokXI+Hrg62izA0vYUW/wrbXRI76S5+ri9Dak9Ft+EolViLD5eqy6xn/LzSq +3aN0Qxtnr2pJgLlQupLMLV75k/eDxnWVlc8frQA/q0i3CnQ7kq3cQ2kip7CWte3nlIZgTZXms+T7 +7wpnf3iQpeTuINS8wfhPyDHyF4pm7mjL7/cXfMFJFrhWv9ORUj9C5HGwtW61QqGgLl63vyWVXusG +xtFHhoQKmPIzMB9GzDV6iqiSMzoSJIaN2WY+fZ8cE1oB+y35/fVTbKoGOdQCVXxIPcnCUy0YVVIX +YBG09TbGx68ljRJ4Dfehb1Li5bNmN6oPClvPSKJqsQhnIk+sj7V61Fg98oggXvH+bqi7xkD9h1BU ++XCPrKfmoKitoJAfuZjCa4p/CkPCFWBUyjmTJ9NVBTBMPhuRU0pUgPcCRKtUyGLtwpoTPJYqpXb5 +3wkttVPCSQsKJcBAQGhte3k61q5dolxlnx17qhmR4d1pTHquAS6Tkw6rV7SujYntMeQWhA48FeKP +zf4Cadcdk27aQzrrmqDmm2d5naIYZ6lz7XmiHpOYDyNNhsKvWYp9LQ1XE3fUiKsFZDutHuTmGcDC +rl70H2h7QUHs4a+DMkWKnAaR8H4cWv2x+S7i6yUX/jlNCCcztg7NUrJGKHNysyqaD0bNEwXuPOLo +cLc/Ct/qVhUw+LcCRp7GS4PAIPFXfUT6LyX+CIf4gZgzSr/EXC2feGg9UCgXznzkqZfvWsc7FRPb +95Naz4FLenutb/lUMT3eJAjWhu822crfYol01Xe4VMbQgBveXPopGU35z/cJ4HNAosyNSHAXJCSR +NVaClOqwHTFgmcPggshcOHWvTaQBdJACcKfdaumlpX7fkFlBKz6PwlSjxxekLelHnDNb+Q+K7JWm +PLsFyymVrJCGv9w3xyyjCwHjRpAQG4NR/1S3cKXuXBoAQhdlAlT5ZF9Q4ImG41RuYrf24APTxFAP +Xo7rfnCYd/tFO/IOMO7HMY2pbgcwGxiJqOLQbAho7iAsiGfhiBleSOgaTuGTbTxZx2gktEw35IU1 +zKOBOsIakfeBKXK7ThJxHJNQRXq9Wwmo6zmjbelZWP20eC52GUHA9CBhEUiVa3WghtCdoeDwRk9Y +THDd7HfgxNWWCQqoFhc4Dbk7XH+qbJNNoXaLa0I6ocBlPinnvYZKo28xn+GPZgKziQ52EcfNaykq +1mZkURg7y5uGF9V02XsZeR260vjyfN0tIWwIBdDrlq5BQrNEhltkwRMFUuoNvJeM6cOIuFdmkr6R +yT3NL2Htndk6BGm8dZZgIId5QJHCtibqTRf3cjLSx7iapJlap2+XZYtToGeTpNbqUEdYXW6WD5WO +mXbTLY3nk+5AFN+fflcumK/noCkdiqI3bYOjZI7yF3m4bavNN5x/YZIrGP7fYVV605vuMTb9bYPL +1KonNqWB188zWd1C4Zwtzr2aCXI3LtO+WmJ5iUv5Y8wZZSi2YtdzkG5xwwNrrdSmeC6P4qKIVxaV +5PInq0q0kqsSo2nwiPMgtRDRgwnW6eKKiKpb+Q2ZGke7F26yX9xVo9A3s78uVq+9mqkWhU0aSv3M +hRDEFLzJatcnFJLVHA/gsbZcmcG/bq2Z46Nq26JFZ7QQ/aXpYThQey4J4jR3hNFBmcvLExhaORmE +LPwM8GEYZh9elcZsrrayXJ3ioY1qcsA4bnmK4eqz2EHvj1kn75LFvtocAE4vZRFyIH1AmLKS/NHi +bKCJnrVaLyQJvsvtqkQdvy+VvQi5kpLZsSkcEiq4feEc8jagOCNWJym2zWuLiRkcXoLe4qOu5Xvx +6xLd1FBRu+v+foVmfcKa5rI75Fb6W1faezP6wb9ueYvcqRvpB8KM1iHBfWBGQVDb5PTMawDbyz4d +KTToNg6i+34dv0KOijda9gJyOs4wH6WUkDtYBjWdwsK3MWnXS1NCB7Kzvq3nFM0MK0U1X0YbYGWk ++8lX+Mw6uatl5U9YKO+QhkWrja2doYx1J3JIry2/3cWOPO2M9NubmYpcWAWe5U9JIVrFgDspkvuX +3ucyI3oXOZ7uVF1Ld3Bjah+D+Bf0cJ2MoMoj6lpIQTGT8PonOJyVRLbj0KwsMdkn5YUu6FoI50Er +KRqqhLF10iy4lsbDkWkAKocc/rhtBXxqvgeX4+htK5iEL9e47pYV1FJXV/CT+KeAj799TJbLs/X5 +T2KohIAZn/LYUU3Xy3MJvv2QRA8omdtsFbsL3ulsFuOMO7WyBMrCArAgMWYATVjbU7dZec7ytQay +ppsTTd2Jbj90COBe1D2hwtIZlezWW36JIX9/IxBLUn44S5iMevbfp2M4+ZY23zzRNZgZFvKJUKyD +9V3wk9mVg7CKR3E32X33ae6cS6S7d4ll+ODJhdsiIbMP+dOrjeUXhM+n+7/LNwSNEXsX5oonBOvJ +l9JPFSi1qOWR9a9yM2ynIBhJ26RuuTgOK2wlp0ONqWRFBQChVv8w+RnI6X525IlaIeD2oZjOe8XQ +72enaItWohN0QHpTA9nKWzMeqsxIG3pEUosbuhXI2JGejunBW9MHpnkoCEwBRZzEJXrVETA1EtzY +TNHQMedopSyEucuaXhQm0IXAKWE9GS1KtoJkpoFeocqjtu9yZPKIRlvSBV/Z7vpE0ssof1yfZGlL +vlc//8y87iS2OdYErOcYHHRhzOXHHo0zbNB1RyybIlE5NW6zcYNnjWtLABB7c7j1A63UUKbchcLt +TUTgQFEeDUEqaE4hS/hCX1VROy4dlJ3FbGrrhILveykOyQxdfp2AH1iAzPdaQcI5KCrEY0v/OlIG +oyESl8wbak02X/ef89lKBXMt+wSZri1rkT2MPTMv9C+w9xYzTvkSfr65glqbcrZL8KI8Gkm2qJig +MjFXGG6Y2gTKcfuLqJ/9PBQbWw+rtxGdfPEKJPz2a7CFOe4Umsr0MdlVnYt2C4yxMRd69fBOpKpD +74syuy4QZ3tqhDsJPf0Uizg5TrG3jgAvF0re/xHj8IH5+xFICWJ0DyEZFF7vNKMgyaiTZgelnkOJ +k3bnp/1LBQY+FSdJEMyIyCThV2/SnZya9jlc1g22+UifTINbg47wqNuiT7526kkvwi9RLuv5cs0Z +oTE20P0ZJv6yxmaLCXekRrVznUZfNqZPbuJiyZToOvdI3y6lovfE6kJagSU5YhtnqnRvuchPablY +7vLUaluxEFyqmNzACpk8z/MqaclOPFcbxn9w6bfqTVUkscaeoBc9W8oU6w8ebL75EqTaXQW9M2NN +dISw66Ic0I5vNf5zC9vp3EiyFM/22ILNiugctkinVXRpXGWdMOhv+F+fzy8tUzeHuLMkq8VH/dOB +dF0u2lXcPkO9NLlKdrWLqUOAW9KR4Zk2kJAOV9yp1Ho+fM29iEef6JGwtA6QmNki+wNIjcSrMzxr +6CpYuXoXKw+Vk6I7ZvsByo5bUwH7nC6txC2UXswHxg0tTmQd0dRU/0m4VGcAZYgDrSKgjjWnhl1l +pdsUvh57Nv29EUPU6MhlwdpT3EkNEByYGcl9QA2if1NMOQ2KR18ORt0N/3RX6/jJAYyZrzjyriEN ++iO/hLKCzbTV7T8lpkQ6174KiCoQ1WNkYf9gNMyxzAQXhG4L+KNL7GGvWbkcB2sQ7JuBRfhuSrPG +ZtzXjInnBNDrqdRwHKflhGZ/e/gc7qYKT8Un5y6SZ7ILcVf9pmhYYgsG+TwvZmQVa3nUHLjqxsxR +KCHA/LXOpLOpPykN0tLHSzQvrvyffeoKJbnVSVBQoGscdV8ukjLN7cdqHFbJry/GSdnAfNeE2ts1 +Wq8bXdRourk9ZwX9hljNLhdYt0UfLNLrknWsTWnibNeosjl8bM1DQr1DwgAeP461Nx/g987IHa1k +xhLYjULnKgl2i3+u8ETTxTwV9ZGqZLzMBZyirmWiLwvOHxnDhACCgYjdTbk796c8rbKi2OO3BeCc +BWAxxwJVzkc05AkBJ2MUvwEgBBEN0E6n8Mw4gpzcH2Vdhg9xFSkRt7GlaUumiJvhyB8T88JpERVi +egpOMBCwguHGFPXSbVBJpHDVMZRZh+x3jvEUlHECEX872iCz8UeJKBdC62Zyyv0MD6qVrOYdxhGv +40lUs/kRtC924AUzwxF7DVtzPw0Lm5lTvBiz3KJtUDfDsm4RwyBtDu+kZVBoWvo5rEftNO7XbZG9 +0/3gkiWamVKAz1u9h46PVXOrr5RW3+chSW95IIC1smVG6KqCh/2CmkCiLgSNzykvDIuGz+uGc4lz +XVV3RE0sofiezrVoUFmnGqj1VbRZxxnX5qOw7uCcYFnCSgukqZQeKrTQAssUciztHyK5kp7WWhRw +D7zQieKQdsr9jZmpyHq75yffpKQffMhHOOd0paMVqoaPyPl/lx/TW1T/0RK3P+6jrXx7Ad6KuIGJ +Pb1R2NkmLhCmPRdXivoEaSOV2MsFR09iVDV4aeKX3O1j0dsAnz750PzabN/sA2btx4T4h3GMedvy +Lus2Hp9kKrSJ+qQq1cz1Kq4hHlVabBOGvoGsBQAsyCALkEmuIqzJgj4xJg5Pmc0cqJH5vjLMR718 +g/Y6ZV+EAsLDn/XpxKvtN0JXvCCFO31ari7AbzOau7zS4uYH02G1sEe6oJPMFurQwsdjuEHbdLFx +o4diDnyqpcUhn3q0LptfcJRiiVcY7yudNesA4OKpUb0VFvMx+/Dzzy+koo3jg1JFDgIsf3Aw2DEx +vhMGJQDvIo+Q88qIhfI43TGiw++oQc4XaOXk2i48FT9ORR13GTqhWRC4NJW2l+ZM1VXCItyJMrrc +Uvc0b5dIyWSmHMAFThvqYcefohBwZI3A91boQVPUjNiesba2X1Dc+2NBe/2E6qPjfnqWXuTzWUQo +/bJcXTicYFZlBv+ARIPu09QNdrhJvhTyklYUiwj3/3xqiI1MfmvB60elilHmVrmT0f/gCsbzEmll +mHl14TP/3buZOPzhKzBwoUiNwvTXaW/cvErlNR/3XfxWx6zDYwlZR+8zhpOJdl/wZ/7YNsFfYcEA +TIGKE3VXrpMBpKrRK1s+MfDk/L0rx2+8Af/c9x31BwqkTPUlct7o4PkcZhZDY2ZaPbRCwZTBE6J6 +Q1BC+838Db+rVJOfFu4rnJMoRqVH8J0V8fsirj7xWqeFcatBvmo11zUO+OzmWhvfLbU1EVqiz6Em +zg7aDi0irO/vhiuD2GTAMjXxasdcY4G9QT9aajLaESHoTI9FiRogp+hs56C77eiFKNUO6RSY6vxd +paGvjvZtzzTWpldh3hxWxEsa/yhCVT7butmnN4CcLR0rt+rupQ284YuquzeDIp8/VHO5+YRGQ4di +kHEZTF62o3ncerO3SGemLSwBqpGoOFaAK+dSit5q2sc9EdHBhcSaif3IS4QDp42d5d4tpK2xgCZQ +FrqJHPes+DgSkKQ5S8cmieylP2SOyVkfFYje4mWyygCmB1TBogpjPIZGT1sZSx591aTWfILYrEV4 +hOhHUSncnFoHfCXasxFQjkY0sM2L3Ci0ai5bII4GodmjulPT5DYZ5kfWgXOGhO6TGm6bOeWtQoPJ +FTjmELLtfG2GWGRP7DsHLYCLd2P9YeVJjEeKKDBHzxvc3Q0VUF/bIK/jzDd2ngEXBArI3dop2wwE +O3YNZqOLr3sEj++3S7fseHrrZIbi5Y3h5EJLJU3wOrmhFytMVzk1Sg3R9s8xdZHEW89KV2C/joeS +IgYevUgopLSJDl0fWUvYw5c4xiNyDAJcaLvxOvr6FPgfTvfmfcEGjMGUnwCibDV+Y4cIQ6BkOJFP +pLyv35O9EEV8POcep/IUAh/yUCK4z42WEdx4UsKfNMW6YduJ88rZG+mD48SfDXYTQsb2bG6Vdp9u +VARbFH5r0O3n/oHIbtFuMtNKjdw7ONdD7bUHNPoFL7LGyYS71Wa1igcOwopPNQMCtBdd5o4pLF/k +3vale4dcciVfUFDd2ows55PDZ4Ykpz4myy3U67qq7YuHGPXqybDVjkbjbMQKcJZy03qcCXqCQ9Q0 +IPzL5JsIWNVohGK33x8FitEO3ULcF2mB4MRrGaxumjWnmuFi4Z+h0P0zIrxC5dYHlyJ9OPCdYZ87 +wlS1979Ky6yMOB8G3606xYkRlAsgniMP4FlzU0v+1kHoHQWlWeeJLiXJ84XghOzrRQOQ7LbJLr8k +5XCTopQe+5kd3JH6xomInpMsGyYXhfuQdxbGFawGLQCE00pBD9maiHcw++P7gTR3zCIzq/wjpyYD +lFDhj2vVO46jTSbeILZ2ar7iB/b+O7lceD4SBJ3DFWnXztKqRxGQsrbCLgER0YXCf5F5vwB93Pnz +3uKD+GpSmQi42UhfJwcGcVrqS4gwWqLJsWFQTNMo4F9gdPrujkNbaDWwH6u5hWh4+r8yaDQQ/v7v +XqGIMQvBlIOJp4HN82g9CgXbeYBOkakJCDtSCdWuLI8pUP/N2IwtZ374531mJEeSMqtok+Xy8MB+ +MItrvYv6HtGcAgYe+zuQ0mRq0LXhTMeWYA0Rs5pf25gr/rASDMtAD4+9NTcLkiiMUPF/KQfAS4hn +KcRPE+WAzH0VsdOWct/+r5it0GrBl7jAQ2l63cadhx1VjVKFd90OqtR1An6LL+zZdnGCw5aik8Nj +hOvwsXEQ2jmqr9dndzvn7wf0mCERDaL/KFggHP6Kb3CtySltMomoeocAP+3cnoM8Xh7LbbIuRXbY +vPFh+u8rcu2j2eumRMvfuyaFg8k+waajCcbL4CS6ybneZewR3mhFXZj+wWY3Ja4HhOB7g6tUs0V6 +D8V/F7wDv2hT2UgZ2RluztquzLYRcjb4xic+yLo7itD+CE2ZcJY5yTGTTgx7MeyVBCL0PoXvuj7S +LOeyP8psZCyTu3RGQEctC3QZ1Mo6+hmAjzH+xKHOmtRmQTNWyuiNgFAqI3w6s+pL97h2CQ5Au/4i +vmvzwM2T8/zPupv/TBglpzKVdzfeCdaIuq+Bq8MwjGePiseqvZbuXQQohRYshrd2rA/VWiqTRE4o +436bzTKJ1u3+jtO9rjMjH6DBhzgYC2x2WH27+E2S0CBXKnIPwhAPELf3zprf6CPvZI66lfDn+cfl +xNYz6XhskNnIYftxaCdBT9Y4Klkh6HgPFsiIjNFIUOZa20Fm/JnLcluwBHylw9eN8KL9i7gWO9zA +st0V9hy9vTB5Cj7P4N9Srj8z7fUbEe7iVhkAPHh+xNGzJFGDCAAt5FJkH9wgfWJKPZfWYlnxUITz +lsDBnjNfd2q07mpKtqFy6psKwx7yyZ+bEf8NIU4AxOFqzEkY7Mb0rlpqnPGwSYwVgivIMRPF2Dd1 +0KE/5ckxuBIBweHxdFOvRB7QTp8j0PmC4KyIxwtw93+Ms3L1B/Mpap5T/rZa8WaAHSn1NOHwtDwL +ycdUag+PQ+lZdVGdlWqd27maEDAJBkkrBAiO6ozw/VnuDk5Y74GDlgXNtO5BDzzpTy4AOprmLraG +dxLjVvc6P8w1FiqCdYWz9il2chhCtp21I27rGku7SwmJCVizFy4JCOyKwlLUZvtFE2RFtn9+fyNX +0YSAYw2Dv11axVZVxARSvc6lqoSgeuaAE/lXzDqmF6A8kHaebU7j9+VqwTvjDlBeC3QSYKUXvWHN +Riq++OexjnEzrFVAfcx5wVqqACJ9I4VJKG6cyGrFczpF02akCrM+gt+6FL58CBpU3RDpOXCfkHQ9 +Nm9qjuo7KOUfl9Ec3ocVaKVKMHkk33QnBmgsuI0zfvF2M3B13r6nME/LRckUtb7bGHgKgPs7pKt8 +0hXeh17tooqvT3HcZwNbcWdtex2TVyRCmHCoe2qXh9lUZ4AJ0fIuKYi2h/4g9ZpTtdVMWGpJfhxq +HASp014krUvl8glwynZVNGH1GC+IorN/H/t6lTIHAuNY+d/i96si3/F7gj8KxVAL0uyIZVpzD6de +hCkeUVQxFRwdkdSnCPQbpXUgK2NUVtn0x7/IXELU917xpxuIOpPaymCfgNX1NO5cb1Ro4OeDlmRc +aSJIo9XsMByBWoIGnfuCa/nbYpucDyd7NhgHO4g8PCHoNKjpundt5hmob97RruYVO3xeP6FlIBB6 +jfr3Z/jDXLB2xF7qtfYXnPgBlZtvElOeSjfftXov/f1zrqw+PVIyM3kVWSkWpe/ACTntueevrp+z +s07J4hKIR28BtRJaqp0FUf/VgimRojij0w/aamsYV/J6BZGkbWsDmlXUq06WoujLMpyrwcds7Ymm +zGG3ZvOYO1exPQ+jd9dXODauyhKzj2QUrPz2nQ5HFaLCEh3Trx8xdh5UOyZFqwYMhnnodIsqT6sI +M0vmOApL7SWGgPsDnapvA+OJLe4OeDAM8xLdcue45OpAUqA0jLTX1LF9PQTN1IbJGxRulxR+TqQV +ZiuxsySAN+msI8IvVm7cTJEoA//3OyejyPwnuRp5DQzc0Sdo/aJ5tFxvdP726b/S6GPl+faAV+26 +186sNCY26XNO2fx+QjErp0xIssaq//t7KpCdrfhhVeJA9jy3oYvtmHownQB3v/lyWkerWXROv1Xi +tFZHt7ttvK26kY4+ySksOV8wU2lfuIJLfAE+t6ip03TveyGHl4ezcds2vUe62khcTyn1mf94ffSB +nRVpByj8lUEEvTtp4FXnDsFVauaub/X3BmSO5YERqXjVdweWfNyUoqnLanhvMKVO6YSSJs7RdQir +oai9bS+FkHE8TNh5N5j9m/MLEAO5wvx4pmtxPUycKMJh3RWzKPWVQEh/hE9dh94IgGYq5cY4Frdk +GRiY6XO3mdzjMf2MXX/vLf2igzBQn7Sh6VbtCTcQYJfvQGO4YQKOwinjTfb5cbpK4u6OdYe15sMV +AdnSaB7OKqLy13zcvuCHyHrZ0rSKheejkjGvIL+FI5tanMzvCzywGSALT5NpdRYD6kW2WDaMTnh8 +lTbmpcx7LVaTJPeLqf0wgKwttsqRtS3GTqq+N2t07Vk1CUnGsokSmRuNJO69ovHrvNqrVAe/vf/2 +SwuaUyuX/lSMZ3CojMgNH2Me3OL9rbZlrJ6v6p+TRWYyqt5h+6AnCQ4CE1NAyET7sE7xCH5DUkxX +jBWgQOmsGNYcminU2n++sonqomS/tKGyqfs9qCJTITA1Wl119w1/LZk6IS8W7MVUxerEVXC2J/vo +P6qXhlBXkwjFpYhPO28vUHKN0y852+p9h8/VTWcdQ+YpC7FhZNr6QWpgfBGMvYYfOsZlIyNRhVKB +pvIJnX/lK3n8iFmqzR+BzLzjTC6CvGzysPamCM0SGNCx/+UZmy5KucPc0ukmasXheLF7A6HERxdp +nY56hwtRJD4gwIK2te/h6eAbIx8fwX3sIJJvTYetEVTy/0R5v47FXAG1/2SNRHXPgJ5VBfyMnvvL +LnlFc8ylcx8rkpNZMptKuBEZOMRUSWlMd8ko/pT6mbz70APYSr7nAKIjs1aMtU0Stz7sW9TPhBEz +AGTmKVK+WuOx3Qq5yOyIe2MQm332lL/pKrLL4sQZ2ftKePbndQhu4rzbtkGYjDl2wj+2KEzOQJE1 +XqaCL72n0bC/PBQJ3nuGL/n+qddmMbVtndxFAHDoHMHOCbYyo4sjVXGhUe9xtla+BH0EtsPQLNsI +xc6QP1y9fl1PDj0ecZx2L+nZ2CVXfl7G7GjmBtfjNH5f5996pQe9RyxIAjqAOELFQBeTk0++fN+4 +SLM1kmBnA39E4fX4/nePNoVq+JlnLtlw9B594MQn3QdnjiOsWouQVIdLkkJDPPvs4TT8oQDqNRFS +670Fi6L+RJfo3n7miTdHrF4+y6vUCwQSju3KgeXabTzpf+xZBdYJUYVKgLxbFe4he/pqWPfWVe+f +akFYmC+PKibIPjDz17zZMtlvgeXSaY7VLEXhbvc778hElAFnayI4Cu6rai5Ks+Ex2eRIHV2PIckP +0kfLEBUJyWFhoETg5QHcNeZ3XBwyFbGfdjvsc5Hq8/MdM/oq/8jrjeAg9zTuRNQWKeskJnl7oahg +3DE6yg7jt0qVRzK20tDQBj4vIkYVzBeMJZEFM2QJKB3j4iHpc6XZue535+30vWNSj2yqwRYBo3Je +iPghKHYdxbxOL8GANm/NSuxOS4wiRSKbZwrWZSdahlk6U6zjJvp9wZ460Hqh/N2jvXhFj7U9xpK8 +HBCKn8ico3UgpeoiWTbVzw1OxTmTdRFwAbjjtjAJxCMaVxFdEZya2OWSappFhJrBVB8cfvRErfk+ +Vru1kI8xwDzQwW2j90tsNXRKAwNcOrtXPCgCJK6eY0tO9XUzhafs36CmRl7UdrOVgdsQ/4pl2SxZ +0vgX5oNVj5/Z4ffl8Izz35BMOJPkDjaefHnE5ZwSuLJOmSQQSuUwlGQzQ5IVX60hZpWaAqvcA6aR +7cYakBFHv4l8HHVGGDb8pK0/Vo9z3jxEnzA9BRAFZH3lZkWpiL49k855nTy/nEJh7U9o+3gsO873 +LzHs0cU8LzKFCsGDjZyAMqaKZYdxbL3hhyXstXfkDyHzkT1hJ5S7wXjig3Khi/K+SQ6lEG6F+iGJ +XTKZ3LgYZajZQJeqcJXScOpBQCjGpFYzn3M8WHIfX/nl1zVcEO2WkXGfn8v3mdijEOLJXs3UCxlj +9WpV5DW4MLHzianLAn4D0nYKnHv0VGmLAhPvNy6EDV9ZMNMls2tOMLPkkKhKZW+sftsSEKIZYalS +OR6BTSswg3dgylCdSjzF2pAqoAfZ1Gbc/64itnE1qlLJ7jMW4uMRCd9VTuzt8eIDr7Z2kQfOaVU7 +lUGHak6L1BPfDjcz6t03LzFHqoPtEcf1Xbac5EhATOgiA5lHHonuI5eCOWnMqavCYhIxVJyS0jtr +DOrjpQdPCAYFgynPEkHIjyU/PDmkYSCz4eNlZM6x0YnLaywCC19OqYU0sJu55C8lwI7FxxC/cRlX +2NDGdoi9YNRlCwa/Z7Wdam+3obCDjqsyaOFVXp4QIwe5cJScSzTLC3fy4nVq0JQpjyDe5C29VUWF +3H4/ZpzYLYFtTM3X7bLw3RN0qf783TOUwE8EnJ/O9EnubJq3JrNfTKb/0hCt5F/DlrJt0WPkeGji +2XvOMDBl+28ckbONMW0wIb1pN1quHUMwXT9sDVcSZAgspJA2GcEoFm6aWbqcjzsxJbPUY9gQFzye +xBHfMWmTNvogbseqR+Lz73/POXf7OwCL8zKNJjipRAxAD2ntABEDjvqlUwj29q6w4IvbhY582utL +1PGPgN+DtGYGcpyzGyK3LbZcSp7vATFoAonrlC+LXTVW+wGuSe5gKNmNeGU1yc0/ERr+YSAi23hq +okwfCz38xOPkyxTbTKZQqVZtdvm9BXSbMYG0lUkw+wFUdqXXYVq0iY1sFDougOP5A+24dudp7Fu7 +Wyi4d+YkrbKp2lU7ht16NnIx/uH9G6Y9h871cYy0pwS74wNvLr4e3UOryUsLrA2qYy5wFVE+5SMU +7DDDI79C5g3QlUExXSlVjefCHaAvLmy5fdAH1ynho+muEQz5AF2yMO7nB3jhau3/niMNFqyj/qe4 +hBs0tpq08Pwc088OzjpCK8WA9gPkEiS+vZGMDbBOxP2OfNwS9Mr5T456Z8NcN6vmlzPryhmmB8kx +G32thvmpVC2qxOuJJvRtBXna9eM6zgimAQBWWuSD7B/bCyIHFS3QNhG5aNGRVzIOH4RFBEgO7Pjy +YZvgmj+kKWMwtCyhmlCobosa2J2KoMXBZMHAToEoqyZbpWsDmmAtDfTsusCragk62fxh2TIWhYYI +zMXYMoyNtegvL1sR2ForLkvCQMuhDAmOHnp+lmbK/P0fTts/SVz1S/sng/FjuCo2+RgirpEp/mpy +goufzwuM5eyOGd2aWkMpCCjUaX2HsoI4Ox/QsQa/nfaX9PNsHtDuTBolq2as4r47//WgNJaYFOb6 +YNKcQGTiGT2VJBkwqatIrnCuglP6a8DoW7VZ/LbsOdx/PmUD8XhV58Orwfi31SPrdcmAvysnY11D +fAmjTOUWzjI3VytK74acT1t0NZV00iKa1+U6PGBfm/rHwa0LnEkTuAD/7gSJ4MEv61HrK3oD9Bs/ +I8zSCkE97E8X1pOPj/SkQRdKxYzjdlDrTWbhMkmqlZeyShnMVsXHa4oTOytxHbJ/FjZnuFb7iF16 +NJFcJvDN434+Ga/TMYs8v15V15NBzDW8M8rqv5FyftWerZIZpV3cCxkLO6yKdOAW3ZCt7/LpLdCG +Ova9B3iYVBPgY+Glbe9+dBIkhx37vA8KU11gxKZ6yrb49IuMRv1NV2F47GOpo65Q+5n84NznFbCh +Loks46wR58Z6crb/KZ1yJQ8JA5fkaMI8s2oi/dchJ86o+kRkDZy9Tri1bvqxuw6C7fwQDxfiAyYt +iaTiuTGgIH7dkESZu7pkJqzf8KW4uzcbhV/ZS63FaElI+9HUVQSs1mpzhrTyI0ke9Ur7JzyhSkV2 +dvO0ktQNFS8soVXCWqjdnhPjq8rIajmueEFw1MVY2ObsDX21MSxTf1iJxv0dqvb/obrhel4PQxIT +na5t0Y24hZjxFazFV67I3zdFP/9+Iatjqduutct3qn2U1HWtRcAUfoBApYo0jBvFLPIIgpRrMON4 +HI8gl06PCzyCodrutJzSNPG43aMw7xLfRwuWAx0V1WcnYGwty0sKzXtv5KER7vu7c9CqICTlIcLb +4z9/m6r7Xa/ORHdAp/3rRJiKAoNJKbbiQfyB3r2XwVYd76C5kKI33exowc0A9Z1xs9HhkBGvjqlz +AhVaysgiYd4DPbbdX1BDFcAnL5+95h5DZAJXG+Sm1VrcgBuR9CR6rzd0zEQEzWq3I/1M21MJT1SI +IvsPd4T1lmYhd2y7aavytv47KweuCbpem9fl+wDg6ErZxl/nT1iFK1mytrVR2y8TtWBLXaAOG6pq +SvmRS91KC/r+rA+KmJkAH9D1pjG6IrjuG+fjJ3UsQHLxBw/tCyuH2e7AiMkqSzqIEGjgu/nFwXZA +qtcRaZa3VdN1A7OrJduCjW8+Vp2odzNysD3EAltWlWo3reHUJxLU4j7a5IPOItBpNhTQ7uy8fuG+ +P+/8aq8KJGP4LX9OEqEx29EWdxwV7lDQYzrRmvkmwo+C/uKwrfQhsel2vnn5lDJUbdQpd3KrLDRe +/26FVnDCe2Fn+6pO6V2zvy9R+zJrPXLgwLMqt8MHcwpZRIB4aDlTA74lBKBdvCyEOgNHZam+QbwW +P79HGaEaGqdypb3/r3uaS1gvATPJbmvUMGsjoB6XXUSNEVol89Y1qCcNa0ym0/O8ti/i8SmTskfE +nEVYKyEhH3xwYbuYfCYPlIUWP84xw0tT6160WjJTLsjZvdSOOOK8t3/aVn+IhU21fe2ZiS5qQphN +gLVWaHK4nJ2ZKeD1HwpWVslVH+jOSUOkC0aZs74OcYBMcvLqqh9eRCsdNalFunPGMXY4LIRBYuVs +eTEu4quew/tM71qVlUP2fQ2uvcnIjVXO2MFlOyESL6wvFCjMQkvBxklhBHQsPNUqC3HgVm5hxcYa +DH1s2Qxma4arXAzOENdfSV9phz3riJlWUoxse8XX44KdLFuxWo6AbZeUtgYn0HUH1xOaMKPOSN8V +NyoxXBqh1ASrKWZ4k5/3nciKgPxQUz+v09YwMYbuTLxMS8U4NLflbIKJe7HRNUVt4+wOzd852UHv +ZuYHiDuojFGBnzvo8Yc83Qn8HiIRg4lN3LkH99rWX0V4HOBJybO3i40KH5jWkh8WoMdVFfjTMcs5 +Lc7dAEKZ3P2k3m7Eg7cBEUbns1XFGNKjOOpxCFgYAGLgNH2Xaq7YRdwYnpvo5pBQoSZl/qE9ojFY +UfgxziCQh/KQKLWoA36jysc3EgJqbxpAOiOObwGFbd6BefwCKYFTDujdRRNT4NmiBkA6+pmS8Bh8 +a6V+Z2MhmM7buD0ikZSuAJ+cWwbEyjnOFTOw+OuR365KEux9kk6fBbnm/946QnEaoTHiOKpzS1Eg +B+Uu0nvlxTziytV5Wdn8QmTaIvSZ2+/9OCq2iO44rMDKdW/lpxKpbT+iKVOoAGJ8XfM7zQEde5aG +LpYMKyCSsmaGd/T5Oztpdk8IXDODjIZIGZGdwUGxcGK2a5br055HO7FiQiHYDD+YVeYjo0KR664k +0M6SKpIBcQy23FLH8+es9Qkqbl0Xvb3u15tdx7xsuq8XqlhjPi6HlNMJgq1WSDvym0rDB8KewxgE +TUlzt44+A3l2Ibw7Yphq/jVcazpyioHCv9elnK+rlfXzjDsx4LY+nrkSZNaokmIol0z3JwWk71z3 +q5lHxiHoWscmEVUXqGHD/C6MHLAeRtkyXhb4im0GBPaawCAligr3j0vydz+cT6Ej7jQR1BoHqvpw +bPUJIXlmpSfnLl4RMwSmUtSzWPLC569sNAOhZXGWKFnS1064l5nNw7M0yoYnueMRftyFB5R98ZG2 +Q+mtF5LT+PX1bKWBoS7kMn1l/UVIlU1PHEM/SMz85xy4muCueVoB9RlXwm/x79BuimxZeMuYFSi9 +C6lquBJ6oK7owQ+V3JZhWRSc4dFyvKpkTiYUIKZPeK7TgGvTxb82Jb8iwl5/X0XlVViKadJhpNYF +EYoA9Lk1M+bZ20V0eFZeR5ZqsLwXsXrYY4CmDm/TZ4tqsDdgAmFlobSh7gQsGbL3K/04UZz7aRL7 +z3RQBB2S7YYqVlrTL+PGEjHf0yTLttlTXAylcRZN4MSeRBjU/mWkVlOEiWC52exXrtNY1g85gmRK +k9sxz0JAPA3kMV16lMLz5lENqa/YgcLo0B/QTM5z2WHtzWsiF14zFBcZLI81woDmPZQ2snq2rZoJ +YRR4gouasn6DhkSAx0+Rd1oO3Rz8xAWQeUq3Dd9NpC0K92xLX8LHjxwK/fHB2QnHyGoPvHwI3NxH +y6gbP/Rdc5rA91JDvPgaipjDpl3dSsu78fn1qUVNOSqHKBATdDyST1sLrKoLmFnRp1g0pNgTBaQ3 +CkDCjPgSgy5q6VREqU3HEQnCqgjeCcY8+9IfrtFDYQ6bptF9rokVn0jplRzVcn/LM1eZpK7vpeZh +4AEQJJMMgckAepojalaWnda0/B4orQrlfW1joajFSRO1CQ1y4AC7TKKcFCEd/OYB6g9WGiUxUIR5 +1c8Pqe5syvXJsR8Xl2wquFgL8LU4a9rU7OhLoik8X+sz+x06g0aKUUoqOLqQEEplrJYc4hefzD8B +rLSNdbXI16Pid9qFTcSa8FBew46tGSStwExcQ1xp5VnEnS/lWN5AbxYRJwsdKH4j2j4ao4ICfaQH +m7f+geXWFYp3puDrp7qpg19N9DLAllfkAx2KzHD/m56OOzME6XxCHtRWjHn+eDU0EJabCsdcl1cX +segge3/Ov4lGetz6M7/VTg+GQMZ9tE5i+vs1qyVWiMVwztE/M2C6aWr08NPANvBAINcBCP+KLsVS +jDsQ1W55TH3NIzXBX3HzdVtXgtClOPXYxHQVxzMKTbxMfjR5+1WpfycmpzVl7mDwesVZtHBJh4kk +SR7xosb1bqxft4LWnyI4yNWGjfMJQ4V219dXeV5Tp6J87ucLUmFWZpzITjMoo+eCFCN6b+w1rLza +g6xa6lRx1/0XSyZvvNn/w3SNapQy9eqO3Zpn77Q/q1wF+U5oglVURH5k/EyhvPqAV4nBKrh0Zjua +jBQNLSyP2CldPYOC/Eej1IGMpoHRU60bZ0qq3Y5utbzMQz+d924DiAzSpbkV7TYfzAfnn27oKSz1 +9NF64IVWOcE9k2ycgs3z2Pcb1PFvqvIxZfOYifN4vYgSRVq4oog7LnX1GfhZQDib9plTlzuEZKnD +hYL/KGh2FcMfK0UqqLhDvyKvh3PI0lWlfZ4+ovFH/KsL3DLJlDy2HtXdH7hZkIlUkILD7nFbb2mf +zgpYV9sJStAyN8/mq0eFlYJv32TLb+q0eEcNw5K8owLK6cwHgqkII+fHmTpkvnKGGLXCtO71kzAS +IAkpgxgYY55RSNGht/hVVnLxCgPnWWu3L1JJTpPj1aIvOaJ6Y2bgXfKwRfjlhWVmsOPfyjpAhtwL +bQd2zXkqyX9Ck3l6l1CUS4FLw15g2w8Jfs9IZlgH5MsE0Od+M8x1zhIYCDl8lWDiZP7ng99LYs9l +qxiUmgrV1m/KuoEaVYvfBamJLyQGepo4Vg4fKyk81e/KtI2hxXzkUifVujjIIrErmFHxmwTYewBs +358t1Xhwpqd4X2LPs0S+ptmxYRD9a5WX/qHIfLXb1xfBk6uyJYUCMfInHe7lbUPgO5pqxEcnyn8s +8sHORrfdd2lCpiNXNI+yX4O8TcqDDhuFOpAG8Rm5ril1z9bXXu+QXSUvrr8d/OzbTsK2AwEt7O9u +yKbboMDJhOf6Vb5+fVHhh+4GsuM9fZygWqx8pueB4MYTeXWQBZyuJ0iOLNUiWoi61rDYK/C34f3J +YpaLizntJIpcrnROZjO/jcbsNvCK1wG8+zjN7UYYVOW+njh7VFiA7lZcwJebg8JN7HEIP/Bq1KdU +GCNLPT7xz9sLp6xMpZUzln0IXyJKaza0JdtOPUCXw0y8c8B4LGa2zFg2loxD3fr4LezZFQtr1C7C +1gTq0tVCwz4Wl5OKwMTxmQwt1r33kEJQqms20Q0lxhSrbv+QUxKVk85vDBP7bTZjfBJdzxYX8wCp +zqqDUlzd5QKMd+Au7bYQXneWrdgrGhtbyeq3d+thqP+muXoQ7KKgX9uS7r6f+7rwe4g1M8+ZWKcg +eu1ZfFMbqtLJ+6fVXe5ojlzhVP/6PohAL9qNY1I5HZli307TAIsvppr0A72xy6vbseLqNi4diBNh +iw+ud2nn47Al8uMq79Ykcu85gOPfaDKE6Yv/MjHT4JKgQn3zY8uvQoLw3fhoeUyCHQ/J7EIqCF5X +UFjsT2DZQrSLkPOeC+AdeTzMqFJPFeW9GKom2wv+obXZPM/VID9L6fFZa01Xrn/dvOj0Cd6oo7jy +IfllFJ9gtnDlETOpThJmguOjCIldvMW0GyQ5Pw2uNhWBqBVghIWyJP6Qh8LuOmdrsQZY0p2OKcyQ +nsnu0udOEeukehZeON4MhcsWGtOWwYY79mvYdcPK0M/+cv3QohmYzBRe3GBbgGI+l9EVTPjuauxJ +uvcDGQWfWUvPlPiZXyv+Zb8axG7w43vcN71K+ySW09KrkH87hFTCIuOwoehp6b8SdP743IZH4bv9 +2RL4GayTxq3Ze7dm0Gyce46piqEt0pc7KBdh47SkJXY6ogUTcLSbyvRk9Id8ktY2UyJFzodQkU2W +VmgXOQKZanh1SWeII/k/nyY8Lso+dT68Y1xQXSV5+LmFu3FCv+VfSz/a6stV9MC5eqVSongkXsmv +eDne+T8n0kzPeM+gLMafEJ7TsKRuw1W6TGkmzEoA+h3HYv3X3PorjWo9747YuvruHXFf2MxOoAeT +sRA9mCa9RmKfWZUX4o0losRJGEyRvss9QYtAwbhspocbxr4VQ9/91qCzIHiVHPd8xEin1yejNtTm +TK+KgT1r0ppTVElMMyqSbHuMAK3Yx6hqzo8tnh8Vb2puU5tiv90PnrRjF4Wiu9ERjlhCD/Epr98D +nqy6KBSi+U2zcKPL7xbiHDjHiZEgO8rwuW+dfaSecZSzj9QR3R9kirms+J7qx2bolwat/+l1cKV6 +2RPpx04booExEsiu2IC2td3mJAUhDNJMgv2W+sw3S9w3HR906nMCSw/NgSWhN3IKTYSmiyvbe9PZ +kgFpiR3UOlRDh2YIeuSVL8gvP29rWUdorOFaMRUHNojtIWaRptnrI3Xjm1o1Dd+/m4KkE2etSumM +knSjuNupAgijvNWfC+OmpEPFbt4ZVun079MBwGregiCGRZoOG3z3eZGpT5OcXXQuM0+0tCZKmLbg +WFjISnIgjO4yNf4P3J7AMWA90qaTJdoGMrkalSi++FrCJJQrqlZ7KA64MJc/c/57jkup7AswoW5N +6UXNcaBGX/1uMQw78pHXPqYX3Y/cPvwpjoKQeFP2WAa7OfV6zqIpRMmRD2ukJu3ej2jMhckl4vEl +6QbcuCg1aFqtXdBYt4nUWLbU0sFtu7I0R3PiLB3T9qHeGV2WWXT0zsP88g6gaLWFUwidrZ6KCzkj +MttpML9lWOrVZJQUfr1nAUAK4epKDxgULMgY6fT6TMa3ILd1/xE7ddM+5/ccFoAbtVYZpVKoUPwr +Abo0QP7TbsP2DHBf80YS/4C8qxStCwD/7Ylu3Db9VLs02hhnPtcXkgirHOOwUpcgXvi3FLss3a0B +Kr2onaUWBzCv+cfCBex+qrGoUg8ln3sN2Edi+vjozE2IU2DDUpvvsbQP5sKWGBvjArIbr7m9RmDZ +SKkwezEJH8vx3zZX2rpFn3UVDKiwZ4Zu67xjd36FoiOLAxDkou9AIPd7Gz8gFx+Dx/tGI1nT7KTx +yYJyBXpyrKAQmDWQkUlewuaoGsaMyh+jU14IR1x+rTkhbnwn07/dog88A3gpIM9fm/iIkWLXtjhc +p1QdyekshFIuq1mOLVmgqPanFooxwU8RM4RmtY+0sa/ugp3404O/e5RLpwd98w3Z6w7Ui/gT5UNu +HW4gOabFR48BKefYkKPPEZgR7gQR1glboNIHcCvMtHKtPvJ9iMI9yCf7ZB+J6HqmwM+lFelDW7tY +wfIowJdZZ9mL/rZWy3PAU9f6G5X4zVVa0m2sDXqjGRBZqiPSrVgeSyu9YuteNLcP4b5iSOPujLnE +unH9sRBDr8kzDBtnOtcnvq3YB43eaoRgBNhYIoXP5bh+hHs395GvTgurWyYG3OcqyGb2cURIuChb +dUwfb3WcEmY/UbixpNhJ17sOFz5ZHvfCzbW/2RdpMSaBK3jnUVHf13wfgUD7nFOir6hfFw/cTRvc +cPgAd33AZ+jp+xd71xOon6wRA2ZvczlB4jBJ5Cpv6AvqUMm6DoYSOwoBEJ0z67QImVNan1CgZpV+ +8i8rKGYJDwf1CCUcS4ASxyhaeJqD8I/H6qAHLmgEm9kYnIU7+5Rqt+JPhzSWEFaC/gvI/GH3a/BC +BDti4aoPNr6tk2p0DNFThKlzsZbO8lV349O5NK0CVQtXKEoMEZgCbpLptXasa48e08mYCAew8NxP +fp/yFVEXoz13EatITfH6cO+Qdkwq+TednSA5rCXPX7HtV9YepYTs6MmJsIrQvt3X0+uwQO5oVccJ +nRDonbz2SuCO6M59fKf/yN2aF6hpwQdvFgpA8fk9+GWqWNJhFAdiJ2aPFaurv9O19EA1PLtMk2JP +a7c57KNTmneROEmVUYfPMN214tE1Qh0LdynisujXShOPdf5NEUjTV1U4/p6Modhv53UQSJO7IBMr +YvC6fRCRHKUxC0PtrA2USiNLKyrhDFubmSQh1VIxr4AbOkILATi+ZnsWWnvW37rZfunGFSQyTpUm +31tG5ao7LapdW1HmFizwUS0mHG2vw53Ifbmw7B6RifkTpeHC6EGlCoTCI1yYzvr5UKoWS9KXAItE +tl6I+jWyxHP254xWPgEaHdqnaqoESqWSLPF4iMEACiGvdO9Xhqd46V5+5QABVqHxWqQbDT7Sk78z +lsh8Uy44ldSjPWaLaLi7RBJX4VqqHG6axvL5k8uOXQRyM1LPQ6T5T5ov82M2OY8V7ru/KJZVZXgb +W9KS/gKWp02+vj4oHS+YnxsM8orOm/GM3DI9V8SjX9KlE9n9HKCuV0vtzfx3Q24ChyyDoWDyr3f9 +O3W3D9Cw2UJyJ6d+whV6pp4gHSCqci+qgKmIATZllnds9r4XvYk/aADLnpsSAGdGZ7br9c1e3DJG +wE8mXA82SBq0psaOrA2JEcQaqW1d+IHujO8cSYbg8sa/gR9PfBIqm+n55atn4V6PPEKqojuK8IUu +154bMqzINYuVGIpltDZ02dzDiJpGI4oyphHFZFA6q1mDGXfYgkWKeVo/jgu6M5wXvMHpdhtRXYoM +K2yKNTbZrI8zDJIG/BGxKP68aj4lbisHhLhPzPoIdybJGtb37CmXQQYlb8KBvx8uIR0Owz6Knw/F +f0hN5mPL+ALzHeP3e3n1SKkotZIAzMu2NVdNqMAZvNl17Jz48yuqg677H2cBzli0yc03y9BZB5n0 +NhU3MOhUsFWF0PJ/KELssqrkFsEUi51PBi0c7SAeE2yTA+Pa9vUsMm5O3OUgFLm2j23P/Y2mXnLv +fNsDm/qfm3Ert8UTmiPc/I9P8N78lElI2VolYNyKoNHQLr6fMCF64Ua24I5FmoUkPvouGkDtqrvb +mp70t2A+qHUQYk511b5+YiPtctgG3LUhAIyCjwJHEbEr8H9l8mfQr5CpznYyRaHjPlFA6Ldyyhuc +TMhHZ2RxwOCfRQMQpERm7zwKCJVFj1ulrdv493ILMBIu6c4QFGrajlcl8tDADHWCUU/o76u0/v2H +QaKCkvgLEWTptPqCFM31/mwh4s9AmhdyP0dCIA2YdF1l2gFUKroTOqCCfovNZ6C3i/vhTWosD+fU +VoT2qR6aY8MT4ENFJuL4Zky/WX4FAbylHuj9KpZ53419W1qmOHgG1T13N43TcFTm41PcKwQflQaT +L651WCiFNgcqTsMTOQmXXbR1huFDSV4EfHhQK1Ns/hHLEjWybd1xSAWJyKkwzm7+Y3r5qLQSfLI/ +zg3pf0Idfdo3g1RQYFNJNMjIeasm5an+9FlmnhILQaLoR8coi3Q7tbUk2DJrrQQvpzcG602J3qrN +/5S0IiCbR6iCOY1gS9JxJTgKcv6x8L/Vn5tDetSHsPF0jFwibA98TCP2jkgp/RDxI1TzQZyZwL44 +rp2/eLWIMXSyQVleRtVp1ki7+xAcSr/WyYGIWSM+RCmP5cVijI4uVgP8g4krW5ESs1ipIyyV0xLB +oU/5o9C8hbc/uma7/gYP/haUdf4sENowBdY3z6AuAki3+i9pSTfg2cUmw3IUTape/UU/QaIv4md6 +MfksKakgFF3KKkyGS08NjXYnY73dxZJ/EqK+PR/Rh9DXRU88woq4x63yQjXUUMIjVoOTF91QL18O +oHtsNO/l73RhwaSDLq3nap/KO9r/XSpYGkVWVoIuuoOjdMeanpZ0GZvHw+uHMO90zcZ46jdSic+L +0JmkY6wJ1OUvPyV2Jjpj4J3QYYYGOZF41fYFwEj1et7wdeT18ghuPXNO6mXOoWsIWqhoPhdjxzcc +KSwvfUiX1HfpdpSebST630XUxrALrwyTd3wuNYZIbQbO+P7jozGi66WTfE5YrZL2e05jXNmmlkGA +CKrYRLvyOC0VcUvG3CrAxRJ4lz+rwmukA/gZGfQvJNNDK+mjURTw0be5i0xDfQ6kVloLxapmoXS1 +kOWUJRu/eobrxkFnNWJbt8svtIUcxlbjAXa65KpUKxzafAkcft8P3UNKwQHWgpVys4s4Fu0zJQbC +eWzBqc8/rvc/QUIDANOuKzerNZ4SD+344VOKapNJQRS7k0Vken1kGvKcHzPsnqSvS8/Qj7Mv2fx1 +nwHLfWL5r968ms+LnU5K9w+tM6Te/6cSNIL1YAIcvydUZU/bTjsyfl/KyOVD9ENDALlIY+UPIWos +GoiW/iibdHrytGc5AIlUlKJdd9mGihxqXMG2x3dcmcIYV2aof3zIrivT1lGA68Yw8bUK2TrL8zXq +LSKlULXAkWdDjTCP6En5/ziWDJbVOTXCw3O+SSjl/HLurhu6a/tNkt10KbBCBMe1JXQHxXE/5+tB +ZkD7R4xK0+bVw3h0Ry2+hnAMuxS3BYZ9O42EBkpQZyL5JP9lQNja0wyjnHaixSCCYShrXHsI5fgQ +//zX1LAHqMWOJt55jyO9q3qJlKCPFZ18ADwnrRAZ6dPQAsYsMtSM9w7xFr573X30Rm2gb+r1ppLM +9bzhWGjz/m4EbF2rQVa5oVgD13T8vwuLgVmuTI7RJkcqshFZmHFWYG3ARXbdYr74DFMEmiXlr1Cb ++JkXojDfUIbeUvk7rbW/rqhZTU8Pru2YKnSxhToAdAypuH8CEU1RWGMQsqJ67fx1Q+JechLDZ2CR +YpD42hR2Cqjnbh+BRcPzdxTYCm6IDp2ZTMTD72pLYStxjFlQUh1ftj8W7g35DX/m4SQBm+59CvEb +fNTY2ZynYlDEk17Ex+XjaWU1XjVZJBOayIf87Zf00ZT1a/kbne/5UC/tdXB6SuT2jq4N24jU6Sq6 +QhRSJuMOJpopdVb5tD0BVWATAOyXhv239Tbd7dB1t144O+wAk4Y8Bv3bIqOe6Q+KHnjsK5YEUEqH +lNQJckT9dh34iQeP8uySZc/ZuUJS5RV+jXTdkwoGOFs70ivwObaRXOmytPGaa5QBoYT60dMitSNh +QwnZpINlcv+PAf8g9AqZvqjgxj/96lsEYUcUqa5c6g+68nr6kT9nX1IAjj9xekWsY5LmP3ZXm3jG +Rb+HF6PRxDMIwRy5fgohzPxcbVbFkpUjamianMSrDrNEPDGZw+P/5havXf552D2hba0MMXKy/6Kh +1N9+W/V4ZXWy87MFNoXA4y4MGEERp5JhHtYQ0YmFOkkYoLLvvGIGyLoqYHaDUlXrS3uOQy0baW5V +60Gobx/vlhXwzqcRhbv1MvsdimxTpF0J5ZLNnvgKft0I9nMe7rRnUmwtsB1ZJonf8Pe6zQ0r3Sla +7V9YM/WnhbD6ftKPAYhb8Xlcl8gR1YEsTw5B8gtTcQUJOe8QfTnwIZzr1GbO9OixnfL9TuRo1/14 +tbRFjiw3BWSYBxqL7xFIgJBxdTlEVIxicvWGHJ8PbMxPrl7oPExogM4UPKhzDiVym170AYSS6rsc +QlqqWo+ueDUZ7BzFweUT3jHWD8L+e/MWBwD4geoCB8Iq64c/nHIBVek4I5kK/1VbvX57RGsHhEuV +VRDYiTI1lfsg8N3H2ZSnCB5t24BDrr5vCoFnohwBdncgOzp6820J1Tbetbt53oTKStyh0CIe1nWn +VC26+2Lcd5hXfbpIpYP0tYUhtV4DFM77wMmHAbDdFGsIV66YHeHjwvnV0elkV1/tWPBNpY7EpobZ +6uxKVC2jbQuCWzUd+NtJzY1sHYN0+VJ7przxhkZw2iQHOTa+R7swXR2gQ49yfEIMj1Umx3tsBVpu +ZCd/0aLcCIgu/EVSK5TP1uX7+MHongsrqahcGK00A0o2Tlpx3ka8/QnZ1g7dtgs473DjTTtSb0OW +sX1Qtzeqx+NTf3+xtUEKPBzL6gCy54RdlZ7l1Hnv/t2HqT9dla3ZPW9lrhca76pWiS6m7d3M52Bx +gnQsleVaXgcjcNK1GKY5odaTk2LrxB0F0+Qa88xiAJ1S6pNWyhB1GvZ3lNQ6EfFV0VhiOVC/fzNi +xgfphbt4EE8j9GEIXTry++TSCR68hPFb93wyzoeOCvnd8NGxS8ceUt5WqmcUi41Zy7LHaIV7pkXl +Nmw+/4pb2dHlizuDuwLapUzkEaMsNAT/LFG68jP7lhN8pmHzOwMrwQzLMAn+r0bRIujA4f8QPSsW +W2i3BMAZkrmW7NMJII9nl3Czgo9+AI7X5RR9VHYr1/NEjk+1hqrnsgu0HRP4MQKuvEOTDQLS/PP/ +aw2m7UueXwXnSXiOHYszJUtUrrS8p9l19aJGT8bhfa+/v4KLTGCtsI5GG5ipKwJt7GecbgxDnHK6 +WA3QAcJU5T6JjxCkdOQJhvKW3fBB+7lrDVm5fpUYWM2MuAvHepLM4bICGzMpEJRhmgeR9A6u/pV/ +Yz6QnUAIFEFEMJ4zEcNEyyMwnO7LOW32E8VIEw5BYNO9qsR5UsllOtxtSJGXKrUHa/JeXrKO5Qq7 +CvKeMEQeOIiSoU2DHYEsZnj3CQ2GISnU/MngZ7DSMYpjJI5B1Dr3MLl2O2qubazM5iUQCoNvcZ/C +3a/6P6uqfiWO2aWQWwyY9DDV8Hoc27eqX1UxnPJsFJXWdw8hDZlrcB0TcUu1qMScXSGhD829aCIi +m4o543UeVwa0WOlGWcN28z4KfUrOGD7HGA2WzIkR4Gb0dCvI5z62MpOdSTgATb2ojEdXd/QyQnXJ +V8cCGS31+YdsrOL+TVfUDxr7MOajpGDE3nxyletB561KapkILuSE2F+GoBcfG8t/8eFeBZhpvecT +SJtA0ijjRwCvcND/iy3+t5JA64UfxUPKmhj/Yhjom8ftJ9rAvVFjGmuD0kmmdZ84XpEPBIS0JbI9 +ryViVQNoc6qfs7DFg6Zk1s2C2/TMocB0pqHvamBQyAazeI+/EAwO9dAfGwL26ijlTQqAnyLtRzgo +U+FDR6yTvNkotDL4Fx32AvlHWDV2w5Jb/m97OeYqjNtcmrrBQ2sjsJQtv47Csg6Z2Dou9kVVsW/w +Ip3+H0jvorGCi88hDQaoquesiTIbJng4W4PTqgJoYuw650MoUFvosCjXN+8skViiGnA49EpFAIqL +uuihbpRLTTgSpuiRZLMy+NcZWh8aVnVst4KHAhx0q+jNC6KU3iAWA7ltEFdQ7urFlgEggdNrvNba +AjBsFY/X2D2KYa2riIWkWZid5qs7TcL9aSvefh0g1SzutI64fYRP8GytErcKzrLCYg8PhSbBnCT9 +BaSsADoeLbU4zjGZrmhA64Nvh4NwJZwtzWbz/I2bm6otSjFSaTnHbmMqsY53QeG5X+GNpsqVkybg +fg2ZoQFk7zTEU36j9akgmBC+fYLV5WKPz/4IhxGM+Of/+wxaVyJOdp7MUHbAMKkWUt05oM4/vfrM +s8MUi8yT71ggwo0oe324UWuo+KgRiI3mS1pXyo8ZX9ZjaIl0w3eJ2TOkKF/rHWGdA6B9Ek5taa3m +pfDOW8cBMj/5b0Uk7HBjhNChigVmTDvPq3w6ppOcDFxPrI1fv8SuSc/6ECWM3U9nlzvcoluiGs7P +nhSISelD9u8yi7CxQtrU1frsp7I/m4Tx2CsmZ7O6fpoNMybe3QTpKPV8G2PUlvk17PoaX/AlHVBH +APl0TaVle+s+M1ro4NH2iKyWCXexvW/zWIkBuI3C44/3T7hzy++EGCzn4zfGyq++8vKPSMvq6E9N +CuMp1+DnR34v3OagCzu/e6DgCQnyuPnmALDhaHcZzdYXc61D+jqi3DS+Q9Lt2JMkTGrt6v/hPfGR +2ZajMcWuEQe1vFd/XppxqfdpveGlteWfA8N4BHqAvkQRxqTZe4DZDRrgyQTrpFnOH7hP9YIVd8WP +WIOWfhEQ3jneIbEXgCs4U7M6MNty5PQtHOT9nSJtLgg7UXgq1muS7smREAlBY3q46rFNuCdZgz82 +8pK6gEr2h20d5pgsDJPzlLGNLjHrRp61f5yzc8NQZ5HtKVNIId1/ARg4F2Fnpvvbz8Jsl7XCaYvL +Wmu1xBTYubyVVMNqKnesqVHCX+oGgCqCsKIqfRIVqNPauJHYklNgo2owBjWEXi1aOlClsYtJZx5/ +GwS1OWO/4/HxY1A/uE5Fg3bgyvi/qa2rBJ2cKmaggWGebbzQUTWRbFoX887GAVtRL003HkeFG6RK +O22THAKFiiW4DLzA7/zZL73MY97C8mgEwAOjmd2dRO1FZzjEB5k4AsICkfPijJtb2r/yN+IN3tYd +x080+meeva4Q3K6PYvwLz/wbmSZRPLoyZP6g3/4kILFnTgPqaH3ZHZ0PpGOm9ERl4OQHqxEFinuf +MOnOy4OW0p8jqSKczfnDB3tYLCxQrFhY99kOhxKC8vf2zxjxH111TFo0lVg1SLryZHuc373CZCj/ +rqvWrZSz2fSjHcVvI9+Mt8cN4ovHcKRQIY5mKqpvqK418aLxqxCAYSpUEmISZZfz6L2YX/GrYg1S +Oc2c4wrajys4/2fewrAj9O6fjdLZtszIb4vO/HVX71IqAw8eNcktr8VcMWpxgtHp45Uid+iT7nLV +teFH7xtFFqfKC7lomyQuk7XVy1UfWcv8oOjGRrWrcQ8ss1jP1OOWIXNDnAabyViTgYFJ1cS2gewH +9jWSuIOCgWgRbXlUYt+bgHX0Fa/FX6niQUjpxw93sad9DWGWqc7PcTorPk65MLJp//cnckjiEg0v +xBgKB2+IdH58rdRou64KpuHaraJ22voOO2V95qDU/5MJPEdCgcyPqREjIO466qcVKEN7RR2pNMUv +Jw8PDDhTzV7hLxHuDaWtwBBbXYtyldbqUES1yYNIutQBJCJZWKXWH3GW4d7Dy2PYVUF/e4P0tg9k +VChgx151NpyOwkVT48YKGQxD+ufeaX2PEuMjUO3HKAGsSIlG/r5zbJMqef1slIwuMIurHdb7iqVE +N+7dqYltvpA5pzKJBxbJqFPi+9QpTGcIO67BmQL5JFNBxsfDHHeJF9AgcwcleRYT/izeJHoybikp +gTBAFQ0gglH84Rnn5AAa/6FvSXBDzXzhQEigC0QnUAEekG6qZXG38VUiI8AQO3WkGRJLFIJOek/n +4YMJQOCzZgX6gnsPih4wkKbAx5uCNVvdUlLPtRNms4za60mq3LOWMm0B7WMF6bDIEYCXWe9Et+NB +AXv4ZQqkbaYaTGbmflixYWZQPfYRDUl3Ya/Rgbi81haCUReYLiCtBXHzt6NS3VcYwl3GdZ/C+UDa +gnJXs45t4V+wLWI9Kbin2mPmgAv8sY50fhL2hEALnbJFpqlohi8m6BJ0fg5kV2A2x9Lm+82Qx0SJ +ml2EqCfjuwr2KpmTKLOAeQ6d8cjVqGjnXRzczxfvjA58IhYCVEN6N9unRULby+GbjQW6XV5h+7xJ +ES+f5a38wFRoqDrPvRElmkedhcakc8VI5wrzP6bs0PmjNN1RMwSEjoPMKY7Oar9wqaN07un3dhj0 +pz5zOmGlV8zf3j1c4Z/0qleduZ9/wTUZdMIhqlR+8z4OEm90iBeoLAyHhnpffuJkRrCh5Nk9ERIa +2INnHDdt3GrvapDmIhj3u/vs8mA49HgNT8fWPXrY4Z9lOgkrFlRaN7VyACNmMUuitaD5QVsoDDep +trPPRjzhEcb3h4PWHiHI7wth6ttAM9avlLJxzAaYwS1uxvvxBgSDjcqnYRCp9/P/3pJBgT5brapk +dX8wSiyzLdr53UaNyxnAn5Qyj8wp8hCZIRB2fOF0dNHwBF5CwLLsyyh8y9Z2Za0UXfzZlH5RuQlQ ++9G2JyN35/L04UUGRwOkH6NNPaadn0MCv1nC7QO/SuFA/2XYqJfpwJ2bzf+APuzAMMvvTbaUWqdV +5dEtMd+dQGC142w1+C/3RW+tJzqY+9s67o17uExFEiRsnWIyC9an30amB/S13k7Pxf7C8ynW/6fw +7SgwECigG9IXF29XFTmF6Uxgkpm8g8pHbRdfef75ERbBkldirYX1gF8HWlHhaKC41TcW6W90Q0hc +ASLJIBFTIf6zMAWHrt0TMmtQdBt6Pv8lzRTf5FmMB4JGZ2zZSWXP99G88pFpJ5kDSFeGyV5lEMjU +A27PDWzNiWbWPrUaMWWvpcJl6fMpTcRHEwTolpkaOBS05CBUALNF8s3PtPz/p5LcGq6twRw9+MyQ +sn4rJ28wl0QKmgUQeHsL/CiTFcIzmYrw6l+NPFCjBlSAT5TRAJ00wcrZPwdQBOggcjgvvafLoasm +Yzf60fY7+7Aax0Q0rPG+m6j8pUGKLLtrViLZLx+Kkr51Eq11AOFhVwjxy/HWnrHtoy6dXk+4YVgI +UZ9qAMCtFkaLRjb+g01jZRvi/uZ4qrbkb/npni5SFgZrOydKcYQlwA5A73vS89rksm69ZkH6FpkT +8cAzaoYuDoI+wwbU6ZD0+ToLLWx/lyhJRn7KDb9n+BYi9mvXNRq8Cymbn+jvqWLNoc8gg0q8ZvVf +KmfrgZ0F8He5XShHIfidC3w9IARalexgbEtopoIahDEkFxSGDfsju0Q7+ry8KPW1HXdd5FHuxWmH +bc1CmL4f3Asba4UT9EKmrrLgxPVVApUmOoh6EcHzPbJoz93GPAErbRtJZxX2COb/8M5ZD8roSPNy +4tqL43lAgPOsYuXUc+jx1nt+C1VIii/muUPQdX/O4UpHSbkUmO6BeMWvS3rS8vQJPCPNBuEfL8Rq +ixOk4tvqWwZT0AJ8pyPh3FrV8G9hTdT6w/mxJUmePpzKBYiUA+vkxcPP7B0T1bZmL/QoyyF5UX/e +cbalL27QDiDEu5qGXdKbNXQrgXFq0hjE08SqSSXgPLPbwP5EyAcKtkD2DlWgzI0DUwe9+xFVEO0E +jZyHhEszYn8+/sn/SGUH0+5FimUjTa+kyfDP3s6Bp0hxUyxPg1uXU6yI4Fes17V1xnRGeLGM6KQv +DFiumMkG72vdcHWRxN3WF31PCCbqV+hSKzXsqQ1ble3+35LaoV1XSYi4jbVRSuSUiDBX9U8i+ygU +X4PNe5kmKuF87jkK2oT0+yDK3FAona9/KHhrPmIfDevi8FSIsRXL8vpm2xGXyUhBANBRbfKGnnvi +ZXwy4Hr+XNFkMWSjIwajv5dLqw2h9Zeo0Yz4JZj2jZ6vdIcTcgExe0AE/Ag/1OvJkTzfz9pUXWBj +BF3L2wfwuCyKioNNNo5tQj0XAUUXjI4+UMpUPd8kFhI/IbB8WLGtvgS2OIQfdDsPjqdKoDIpQ9km +WrN5njP0jcXSJ9VTM5OkC16fXe8kWQ5yCRZy4Cs0Wix4fbqpEv/sxLXKjmtfybjaombYkVD7Awij +aA6ZfmclREmYpFiWAra5QGf4ryVhs/hpyjiJVWvSGlBh6lKjD0ZqYvdIEIGUfM/VRcjMIBVFDql/ +SKwVrylia2VbwjBkViBBmKXQEyzjjthOJxnhPkTkoJ+yppTR5a2kpC1IOR0dfgzPyqeB56CjpIrC ++VhhFe4Dj5kvy09PscdoKjtAVVEU3lxAhtLPmIM+7Qxl6vBDTwbzoU6Xvk1oulodyqw5UidnAfbh +51Bon/Iewyk6BG/W4wORA0i15RUGmULHKAtFnIuvpqhsazCVI+oCHh2eUKQuZQgF8mM/d0phDcXB +l+aLIps4vubrS97cO2yrTY2iFtA8sn1mYN0Yqbve3qntARsl3zT/h7wMacluUwGYyuswpgvlpnJm +mbpsdQLGxy+iv6h1J0t5f9cDYlpV7uDry5/Hn7HeNkL96bT5LgH/JfuQRgegwj3mB4XFb0OJV7zp +fpWQghu4O1nr3c+pU6SS2K/LbFVKH+PDAF0V5HrwEPVmGlhIkPYeJW9Eos1OowtqZm35WaJOSkaB +GXx7QP0pbHvQ+J2I2Bx1fc3eBuE64U/0LY1DUGBsgYefycj1h/28mOr8iccchrwdXb8xXhqj2stT +3aaCE2zri0YAxkKjfaGL0t7qyKPWSFbr1Bgg7rhs/oBOD8Ago5seWtB/+HMomWA70XVll+a5PO0r +VcSG78sQoEguiXDYNKbE1U96Zp7fl1QRU2Y8ptS8tU3ONBqSLedQ8BvHo7aeelunPR0AB3uPwNUq +BwfluJjPEaE/Zi8uClqrFjDiX9D+qjYtyllBHGc/j6JIDvgXhoirpn/TB3xk/R/3UDWs5QzONAv/ +oK5gmSbx5TUwcU/IuoFACIbjKE26LmHoSHhaTldzUTGwnrmrV9yjeaeGuLN1i7G7kVURiRWmP7LJ +xSkkNm8VwBRe+NC4ae5XEHDP9WdRBMx2WhreG1xnpduKLJ6poQ35UPxuPADR4FJJHwFfGNgmQ0nF +S0N5sOOUPgv9PLzELbIDsHu5Wn/5pmjBEXiLMkpD8I2kiCzOgSHc8Hi2xH8m/IA8bjHPUVTyUg8N +7eOqtKFv17A8wx+BOX1nIDKNzirrEsDs/cEjUvvwb+ZbUzLNwmIJrOcd7NFJ2dhnU2bZ//JZtkb4 +ClqccOAjSB/a+TT8bYaENzQULioBxJA725h93fe5xwKlebUPS/k78vfl3qTKg/Zr1aGSADwWj1UR +SNdMLgN9N42KgxZ2RJ0ssCQ+33NVmwCkhyeZ9Y0LBTV/abvIYdIzhSjFCE4klgCiApDETOujBuMz +5AF+/CwIbKuPnziDffTvHwTzy8QOdktr1YfSqYRHU6pb7kFZpVSh5y0q75H9IT8wcqQ+uCFqE52Y +JpB0vnKYrRt/ZbnXbf53queSNkhUVf7YvEnHbXs+sTXNU5irzuZJTe+ob5/fN842NPy/Dvctp3Bd +7DbZl0HIo2PSRCYG1tQ21kb/Ml01cQY9trjwWqV5WXnUn/JytT5iqeGPi9YdXMHh3n2sxQJIgc6p +g44FtXL44NjD2+b2PDyhZZb4X96Dg8dDDFg6NmVf/u4osZSDyHR2lGyNbd0ysyZLMdjP9SbD7nC6 +i17ZuURu6F0gIrDjYxQbK/0g/nQKoxP7Ur1MeJNSDQoZu0XWC9+4d+Vh1qPXhoDVAdkS2I3jHj8T +vzBPC66e+Z6Znr4mJ5RyydT/H75pCYOVE/haFEoG5ba2deo73NQDJN4PQR5/RISM74x2FtFWxrxT +jc2T1+gxAJEiJZhNCWFEKjexxUHFJLnR8JjWz7p6AzXeZBY4vZHiEZuhxjcZ8VlGJsJ8o7rWPHhI +v5wr6iVnkcMQkQz4RCp8Sfl1NYAf9ADKSsaheUcLpMk0x+q5XXFI2Nn2RHl1XyOjCNQdY9rWol+D +SFhm27X5dTxj+upnJekntYKGDhh8Qmo74/RB2xGaZkjgtX27U/ytWFECIy2Gz/kf7vC/GPA/Ek0P +2wNcVy/B2iGQCW73WsA45jkcBw0ccyKLEINh6iIC00A2fCUoHBzLQGq2DBbq3TYQ/7Ub8DQwFrW8 +hiUo1GoqHM8ywAhfo5Y1sU1Skvfzoh/i6474GKqKXga5Y0LIsRRTlxwjezxTRhQY6LECqI6mg2CE +YeB35lSPLItjJWH3kTvJS5oZmzLAKnCQBK0CJPS8F+CLm4H3lR3MNHUcS3eo35xHpXIPKXGDI+Tj +Ijy5CQNBySG8kUWOffta52M5K3Ce7fsmZkcBgBYCwarZD2/YmfmYmiH62jNMsTXlL0vuJa740B4Y +qcmS0/dETPm0yutYfwdE5AC0NtkY4IRWJfsLcH988pPrqJbNA0ECyvd+RGDhIcP6HyE3r6Gw+BmR +O4RzcDiSl0II24qyCwavl4Puv4yXcdE0Tjco7kVLu69IHtzKKpzgTof9y0OayswqoJ0FpZuvn4iB +JMloipyk3Mn3RmBDBWKlyTl38mwmWLsOHls/S+KBaROQt8mr7gNjVyj/ZdslBP87/uyyhANtgWjA +7KzlhbcCaFGtv17Bsl+L+ssCi230EkApY5IWCFl1erw6KSedeArybZtvkvCpk/7yJtPuQ23yrHu9 +fp/pWYdvx4KxtESyTFZwRl/AcZ4GPIL+UJpJl1jlNL13iSIgQqYMBEQ1USVoSCzwBN1KxpuDoxka +x+qrNUXlTrADE8q7orrkUk03Nvew8ZQ1jXfqWnsvc3pRDNvSteQjTFuZWARWNXtGl4q/YVBzylOK +ORfKuJI7j+1odqUtgI6IHSjtyjNf+Jw1oXFPy0G/cAvxh6fxCmMamTER3Fop0Lmw1NxGudZ6NLMF +tq5JyvvkfGTDq/IkmQDtCeDzkceBedA2kBjUg4mkfZbGgYx/puhajFruePzXWQAmpnY81pHEKrDU +rNHlYsrC3GZEnbw2ONG/meY2caMNuuCfV8Q9xzQQJrKrhJj+oyS/A9JNjppH+Gjixjzn+6zlATfu +K/cRTlG5UfOi3pFq7OfB1jd7Tpk15BlxinHXie7rTMhnGilq4/ySJiia4pnna+/u+9FY8Dqd6T3i +Dbe88M/vYl6Y+N5891XRJ5arpxfgfQ0SXCV0U9vpe9tjPEcOq7V2PSUTG35+iOK8E5iFM1i9dWb0 +BC92CUWsaGcS73Uksvbxgc1WG31M+aixI5wD5qQvLk4/yY2BgvAc2ShOOi2EPxbe94l+9mPi+Ima +t8ev9hS6fcylNdxPSRCb/2ORaKjT/p7fLLImVjhno5gDHTLzTQlJ2nTLNkeAlL5eZPBiDsDFBSFk +G8ozBpGT5SjbpwDyM59TeV0/VIJtKgWWm32kSE0VeoOVkRo1gOL7OHSMIXLf6eOY36KaqcNS+8/s +ee4YTwy+B6upgVlEoU2VnCHiCCNJm88Q9VlstM65GUiv2GKaTXlUfeURL88V52/GLsVShA8GQpBf +d8jlCVkR7/LpjTZtKJlO4OJPSaP1Vpjt28Tb5rLUkmSOcT5aVbFbK2LfyjP/NCMFYjrdsls/lybf +35dyE7kbcoIaArxenQVzPzkyjFOYlVNVfh6MgmFBzdSm2soT4H6l3EP8/bb5v2/bA8CooI4mt5et +SSHtY1k1j+fT1XIfE6jQt8RuFf76tGhNjYPnaf2wQNFdoN37RfTz7OxAQVtRWdJ0+pT/UQNABha3 +0MplQ3Et1P2MTss+0EsO5/J7F6rhSE342drUlEBCVSxP7GDCgI1ek5DPW3KmtDeeZowDlcF1+rtZ +7wbi8RswRWiQ6GfcU7bwb9STQrbLQSEJzOud/ahmGnoGf+MmavGgLfwdnPwg6LW5W6OUIw3kg1Bp +AOJQjKwrXNJzi4ZSuWWxWACNWaQ4q4rjZ4cq8wTvzcg+iQv1W13FGybIbbB7avsyGLxt/VbsY209 +2dfqlr50apolOtQjRe0qVN235UcPgAru2O3aDkQge4l41WDyTHqgOkb1PwFB3neAbgR+a8cSxnlr +IXCZf6GVJVjHRcmzQZK9PFLnnhcL3CHF4gg1vMLMTTlAO0M/E7Z7/1rqABYVnTqL+1jm4ltZ2W89 +GHxNqjxm6LvKyEX7uFLelVytNx+So6xrTKxl0TecDvOmxNiekTI7gS1FcViAiZpLW86tjB12hyvQ +zSeXa8wNNBvZCydtC3EpbHzh6q9Sn3Ots4aFQkvkfiViGs0FI+fZCoaBpop8JLYhv4083uNVgmo/ +3/ENdMRFpQwIMgOLtEnp5m4XXMhBd5O/Mt5zC30I7V1qPZfEGqDG+lsxz6+qwKSORX/ye/IAKZxe +Wxj8yP4hUU5V949olol0waIFjDyCqXwEzsJ7sH/oA3Su6hm+IbutrhPahc/RSlTHDM0vM3FCvyXU +ojOo7qivDLzux0B+UyMMrqpHwK8OwjZc97y+e0F4S15Ap49zl6IaFo5KUnyPUK9V21gXTHX3SjaQ +jk7EM7JU5XDVyuOyZTrHM3TELSF9QS0XSfoFVxT4ZBb/cd5Vj/9nydqCg6hVQjMv1NAZV1Uover/ +Mz9WZx9gqdPRv1pTDfeJiLT1nhhcVq9FVhJiGYbANDQiTmfIbp+0GFwOLObHRXq7wfiq9KEojBjN +0+mZpzQE1Y9WXvZLRALecdIyAbrlsSAsMBvubQCNxtBA4AqraEcwI6pd3dHg9OKAzd1dMoEZWqXP +sOTproXkutkFlp9NBRZobnt0qur3pl1v6OcN7SNm8vrqqHJxnCeaMnuyGCmLTY8YdOuT9AHJ7qqB +8to0B2/1JDtHK85ZO4BZzvKV85MR1u2jaq1+VJMwUiYZTJpvuJLK5JKt2icykW7lND+4lX2HVHvV +fW6jhrXkS1XHmlRtXjZ8ucYIbfh1hD5PjT4qH45x8gy+rSeakoUlLvqe3eqD0mtbeMs7+G778Wqi +1bw1wV3XKY6sMhj3AaO+fb63wPaY773F04CbF9aFDnOlvOkS3ulLxQvn16Wmuy4OX4TgbtZCCF7o +YGbJ7PHPomHYMCu6UhA1A+Uh6OotgzlE9uXMQwqI1f6qUrikDG9jJUS1TLT/QUjK8i6bxgQTWcKc +ZeIWBscRlUvRiLbTYd1swCeyJmccI/yHIVdGQqIbexjYY4IGX9nFOHXwdsAs9GdAAaTBUtWRJRtU +20wEyKaVzt+wRZKUMlcBwaHwBV1RwxWFKNA/u/PDk3oWPENFEDJJyKLAST4EDDr16vXKWP/IGnb9 +aFfQ/oFRMr67azJ2UvMKgZUwnQ/PjXXO81RKjib0wLG0JLZ7DAMkOzJ7/ecVlSoWMgwkpoZ/QHfn +x5JRr1QKvF8Bh39Sl41MKuPkdxwGJ2vmuJM03vp3QYsgzHl881d9MVKrlpLHIGNIlJJNgcuRbYnw +ktpRh+DHdj50G/N9bxnjtokyClVxdTGCLEu6JPeHusUXptsjFJyyaGNevMXpt7/TCqEJB+i6VFhM +j3KiRRif77oAAroo2pzIdkUBphPbx5iFVLI5YVjC+RHj1qT+XCtEMF+iB+ckLoohXS4AGBUvLbUt +bcKcNVifqF8imNy1jFdXM7WZNJWMXQraFL7fec2U+gS2m/iXKwF7wfWgBlyrMe2YjnyTtQ4Pw0hv +0vBBspVzGJOraTrfErbHeosyoxQxHdHFyMvyIcId8UaNpmshK90E/5ZxfVFqGzJ/BEVAFQWFO19F +oAiDwYmBqvBKsE2+42NgLNPQycVNAe7XXpo3hSJ2Z026cLO1iqsa5VTowMDQx/uZzqU/e27eIM5l +rutcP1XZOJZ0k9dRvB/139FMs0iOaeMtmyeqaV8IYiu8dlDDeeE4aPCyu5yuleQ/WbwwU6rC0z25 +OQ+Kj0I7ytCkHFCHQ2R6Z8klQzP4talvuyUSoqB1rViftTBNYuejUK8JgVWMpA6hDGJerPJ7n8wu +fAP4IUzo8qpSFCNGEbENWjPLX98xHFf6TB3ERLkd7biCaRuISUzN7Yow7LKWYb64NOI5NczIVaYz +CnFOIfdbPnxAg/uj6P3gdXI6JNVhQcBtU3fN4N/ClHzvbUK3GxPoZg/yqJqUYgV6RgpxfYR2LyqP +eKyqBjhSBS/lPxRZVSJtXVb4xLO8EZGOQBF5qwlNYzfTiavd+nBGjdCj47kpf1vMC8hf9/vIogCh +BdP1y9JVqZobP7LzfU/lIwpOttyw2zIucGPdoqeV/9OW87uBdcUYxvG15+RVda+u0Sm1uzK1evuR +mQwLfnHe5/S/OpaMpCp3tSE5e3lG7LxC+fweC+rqNMmZSm8Ls8eOlrGYd8UrQQC3h7qxKfqsvZqF +0GmH9AcaWiOYT504/0pAVMP/zd9VIirGdgdGqC1XBjjNtU9AW4fCLXYvUKxDfP+RFBD8u+39IrjH +BvOSoJ+ek8ftBB9Qm6MEs0/ffqxzmwJuUoB//uDOhKiakwzWGbuE85/gSeQCb97xd7WReLbrRNcy +EGWlgyKIzbeFjo+Bd1hSCAxxXVRcN/jDA3L5VuPpPLaZv5afbo2HZSBDPmdlpr37epmSS8a7mjPU +MmqbaCcQnCguC1HHgPLYx03c4aW3Xlrqqwf3Z/vOgEyKeIiKL9hzNfLcwPBUeRmzMOqjVIxrgFTm +PmAeWzEz2NzgwNeK8aokMoABnqxjIspjerEIL9lSiQ/fDYG82APhsI7PH+Ut4DPRaydiWIXYtB44 +b3cow9dJZ4Xh5iD2Ut//qcX2kgPqHVzgGczbJgrePSPJONHXRx+c7YlEQ9T0FJE5HgP4mdvckFAP +c6heM1CvijhQdgCBl0nF968+LYlCOszdolODqGWkJmOSt+jf71LUnPysUcCG9GLjA60oStX2aqip +VbZD8FWGxrqM+jHYylBINdyYkVTIhaJgmN7d3aiObGTZc4sKEYj83SVmgbnw3d50nWAbd2OuXeIs +5ku8NyqCyzuav+jtL4Ky1tF99KolNEzOnLdXBmXKVtfzErzn1NhkD9rCJ82WmI/ywVVXlGRE1T8e +vyO9qMkX+X3A6nnDQyJlpNzR7kehc45tivkMbAw4a0+odYYXwflOAWxmFzvgDGqPY9ZY3Rv9mgkz +VUENprnL/DH+Yb8Qp2u9H5uQESbw5AkIbN7RHN8UenEw97eCg9pS9zEkJFffdDe0+YPU24HUKoGU +Sc5gjKP8/ZP54dUX6C8GZxpMfG3XMRqjPUStVlFTESORpJfi3UlqdTYqRC+nq+PzxR3nkhb+FFUX +Ja3y4u709pljWl9FQDiqURGN3x1ZAl+pxE6EdpNsF4hJmd6LF0rrbZVKFP9AHrZRhK3Ab/K6QAll +YlyH3ADlBeRNO0xIAGS4UMY9N69AiiSm66OkGk0+op4cAO6M7+vZd3Wyfj0SsQWNijbPQNfZnEL/ +xf/OK7gwPRBbzeOo7n6kvH+S94KrYr71Fq8AYY69XyXAP8wt3wr0FA+Nyen7c7P1nu+upBdmksUx +8psyelPWGEhMDzsQNIoXRwM+Ab5YA92KrYOs+lMspiquLutYDweUwsJFEvUhChI4pcj/PNLIFO1u +tYWqHtHclVTsjypy0rxx9UqGU/9QZc5jYD+GbNfDloYt4B2dQFMi27WB3LSJJleoBpgAPetNoWeT +fNF5mFITwjvGK9OMOzzYYRuP1CeaOK71j8ZNvtJS+e2Qtd+70mZewZrS/ob/n6RPgkELN4KaAjsW +FVD7p2n14a6O0aTPoQXMRxo0qr/jdAEh81FrvAIdK9k1z4iZ286+Uw7NHL6QSw4/hO47Ff27Ecpi +oHnLZhHIN0fw6dqM+Guwgkn101s12gfxXGm56aCZ/lRtwyy6ci90M1gYHHnNFi6GQYDDUsOtGOMA +o2OneqSgbDFp5oJhaWp7BWBUikOzvc6IGxhEl4yvOX2dW9VXLlyOl/RMHr36XKOyYoD4XzI5j/7G +rTRreUqA4cyxSWdCO7o/NtT73QuHu22+5kYDVSCv5NU5I+q+/aCo5/Pwcv9KIIIsuMf6gJFZtyU+ +kfR1NM9PhfEbXLdMh2k2wYsWswYvWXbqb3gBeq4GyQOj3bjccWpDqRSJR4I4pCGcZ2E1G9vuOMTm +247WGrnLW0FhWwUp5wb7KH3+r5+RHn4bMnUuwNnvPPTqOLkvzQ9UNYFOew+PxRFn8147HlqBncXl +ttMdU3GMQFn/6KHmbQBed7tRporzI0XOE3WlOt7/9GWgbxtF4qKTixnwqHVFKCWRo2u01WBGLrDy +4p7ujA21VbokU1ARbJMmpEVFWRepF9e/nzSuHm1R9YpDnQVixbdaYBXsUJLAntA0qDl1v+jbsu7T +lhJSwxWb29dIfWMhADc+J3WaASUYHm/F7lmVlxX06tyG+i6jcuTYd8NDI0QNlKlcJSgwLOnmWSoU +3B808HY1gjccXBhl9FnHo693U7VC12M4cdqz7Lv38jqmvjjfWkZugYdBV8aXLkSwkCPleKplZI0N +EPGQ5+tpRi7zvg++ww5YjQrwAAXoCpr8iuPTRQB9byaqhd0O4UZowDt1a7Z4+liAym3rsSuMikJs +mBA3xomSWTIvmfTSR232ejocXN9C9g67183G/VzDlTzYqxrlnPDuefd+d3ecdCp5k2vC+j8cRsWf +AIA82c9PijM+E7A1O1ArKKpZD9Ifnkpa2PQ0Udp+e7snKCNsbw9Ij0W03SHRUObRDtg6HqWm/xP/ +4ceqeQ90VwnlrEDAXLIqHTT+YShlc0jEujOVNLa4Nguq8XDTVgFLeG7b4kygoKBF8cCCBzf5uUw3 +kkNwnF93gfwlw0KwYIH61xnrKykqTkaUBTuDNJrZyzAdJzZIlhPni68TeAyJVAxMiE423QNcskWh +nq+bYEEuCAG+G2pNaIOA8yEvJF7W23qGD9PRBIeHFtzqLMzLvMVK3gWUNWPI+7M07tt4nn2EL2xx +398APt+r3EdW0a3v/4Vtb9DW+bqw9d6TQhP08EsZXKcO3gcHqZTpVsNq30mT+c5hIug/91iZlBU0 +wi/IGiO7jsCxYrCzTSGroXdqwryijMKuf01Mhpg7hKtNvjS5+fPXju68gCrBlq/xKayaYR+WFcTB +d8Vbx12M7SwA6+ezCZHPifttDNdlnJijrgYFQ6eEyrgArrYnNHX0aC853kx2fZDGfpi3xO2j8oVM +kJZBnEA/uuX+FKmYEiPfJtHl2GJT6uhzNQvwzcxLo9nGdVIUNMcxLQyV6k1m06eU24X3B6SRugfP +c5CSFaxs/ypV7zsjjBYhJMVgHh/r5UUaNCMzpLLn/Io4ZqQNbFFMmEj45aGQ5I4XSaZcb0VWJgpP +4XB9pfmS0vAvtZJ7mAQxymJFCvA6P0oxm/5JVmHtU/XkOTCY7+H3Ph+6Ne95LE2xQH4wQXf3gVVy +P6M/thSvQol8g83piNnirg5o0POAoWK2GFtAvGZKR5EzOTjTjtSazHZ4UVGBYZVE3SbPd+VtSven +pG0JW8Zx6Ts99xbzqTlKSx4d7ouaQgonKv5qb6dLC0v5UPluD2fT63T1kELhhTjqzxMQ6cmI1axG +1rR88z7PyF7pkA+P+x8CUabpO3lJoQ0lzAjyC9obQiYRzq7bK552fJVZQBj9qXI+ZDaQ0L9TeR4o +54LdflLW66z5hJ0g1lZsKTf/N2seqPtMDIZhX7BXp65W80KeG0GQY5QTkd8qDGYMT7VCDRgw5LNW +bPqps/nw3uz/TznUC4vzQRKCU20WMNmeGAu8zVMRTpEhii5TII/9gOC94LcLpVo3pnk2cAYSBus3 +QVP9nHoP5GuqP1cTfl8bSNoiMuLU/tw+c24ItzxQF0nQluXkcZlj0Tw/o2r6fuOTdeCfGD9cnGCu +cEz7gT1/xr6jvinV7/3WXpTqCn+kMrNpJQvFKsWW/pkGTPVqLSNcqaR2PwDXSgnpSsk1lDs8lhc8 +d06zdjIxM9E4/6r1KxpeA8nVxYIeGIbprszaTOZrg77A51tH5Ge0RLY0ghRdTWACzG5foJeu/437 +y0pC+zs2eB6dWCWWbiAQKVZoQgxjIapmUNlsv4kmGP+Lrqr33AbJD+FKYGDYexrU+kyjGtKLsG6o +jjB5oCmn9Jwl2r2OLzMWAeVewd/DeZC2VfStzS6Rky4Zb+LA+yi36M/5mHxdd6fuIdV8UkM/Uo0J +J0a6DGiPejRGI5zaTt2vYGa54kU421ojebEFj0oj6v3G2BSAwbr90Nq5UQKAxDrUat7pRqUg2Cuf +os7C+xwJs11y3OFLAmClrP2M9wNxBZ3tdPtpHR3W+KRE8UIa6er9aR2AKC3dZJINrjF6i0/IJH2i +PcAWsMuEl4oE0sG10ooW33mmIA1Ftqoe8jlZwFjL6WKpnymWWHk8vnB4gotavg7x+wXAGqYPqKWE +HGQIp27sqM2vL+s0ipg/9QaWo8ohDsSV598jwx59CPPMWBojFnFcEFUgZ7fvaddzvLLOktrQRErE +F4RGmek/5MEySQNujbwuQBK73XCrlnCUutu9oNNN8YMU79fNXan+bTIphDjTpy9gI8IdgoOZgeae +9aKRZI2K8osAJ+ou7e40t837V2T3wKRAxV+9hRMjwIPBEesI4BZ/NorsI8KoByishYAasVzt89m7 +0QY98WmlvmHFjAJTWxWBe31ksUU2uIBOybYKmPZ9C5nNxU0JXczJZXveSgW59kdGWSrP9cagV3sJ +CpBKPEVh25GA1UU4PJIDHTzLA6dTEtbUEBff9cTFVusYX//RuXEkL2ZsFUVfPnbJ5BxlZtEtGkJT +4Zd70xPCG6cMGRezRwlTB4l/zPQrQk/p6o4qaDTXc7VVA3sn7j5ND9RzSvdymArceiMwNA00GJ00 +2O8xoMtAZjQ6LfYulJe3AfLIKKI7MOwMkLX/pK3RjdKKvewAJM+9ZQ0fRcXdvKyXc99dbKbayZv3 +0OHH6Qr9qt6vDNROCmldwD9cjMaOt/vO/JH4+xeWojHDwNK/8ndibZWVsoJ4NrVQOuLLkCLTPLJz +NlO5vCuDc/Fo9sJjPrgwph4dqEvc3U/yZgntPk3vhHQsKcg4CyHYJS07VElJWnIB1yapSYJkQy2Q +28lFLLagSRKEkzjjO72Ff3UCv6Lu/+7OTCU3GkOToiK14ckI4x6ajhN8H9L2R5gsQXyzQDX3BLOC +RZSeIfEDdypWYqLY3pSCtUfVZodi6J7knii0Ep+RjFv+6yg0cniXR13rhXmLFENqVPb9n/jgH0aU +X7XpEzi3fsmZdUVbWtvRWOC14dHpchbvrN8lDLpuoWQ7XYNMR++QvZnXjMe6RH4hSYWz0zumzacm +g+LVD7+0lz7HpaJuV+7B+uJxPsaV1qEthsvMp+YzG+D5XeBz/su+agjkM2Xgk8dmFn3D8U4FD2vS +NwiZlumXcbpRYna3ViUpVgZTi43B55wLLGn5zHqveqc+DbLqYOXb9A2KmqVaiuiYQxlR/Wu/ObiL +yjY+xr2hiBz8jIcwneatYNN9s/0uhNAuK6iLKceEI/2VyVmQQh8e/4GifFhHGKyQm73oeqWEqZyg +PoVtw3KGJxzYiXzMzV3b/zFw8VjOTzlWk9NUQUtEmTUduSOSiZimPDy1hr7lHhYcx0DAZHV5xrzp +PVPfH4pyEs92CSjE82EEKgqqYyspWI6Hnyfnp22z3XxWgUSOZd+aW/GB/mB/NUlRexLRF7HMuBpC +avR0BLpmoQVbSfxQDBwMRjVwzjUApGkDC40WkRv+ueE5Wv8/1UTPhWQtJ+ond2QqEUvhOKjqgtS1 +MFhJtrPe1NqqYzs94CfpJd8Sruz5boQquTK6Z63Vx61rbiMcwuykLFLJzIl9u0ullGbsJDXUSe8y +8wFY4slh+ove93z5ePkPdSSkxl9447/BkRfsDxXsm0AJNZOskfVmy8Yut/Q+vUbHYr8AKaSflW7u +TEgJoNmJVE8R9FpP3oiQqXmj2hUNca9ygOcNMfwBlcKqgzd9d0GSKJEL9HlkbAY5Rc2JcuIJXSiZ +9ot6PKsf/NnB87u1tt7jozOmHxfwQzUY7fZg+ENA3MUAUM0cv28f7HwYs3GAo6GIkw0JmzWrBqRr +x8ucF7asHnqieATE6BlI7/f719so4qp1U8BnNtwxvAVTwbK6pb4lOwv1M5YLguiGf43qk8n0fPYx +IhNWnOHNjqrZL/Y6vMMdtzzJbzIw5pGYAUqX93ZrGce3bLMjQDQ0mefplI3nTKi9Rra7IgW8meU9 ++LDWvyb9KlvwQYtkz9XndEnSYgK7kThHlHcCls7bZiah9BOr7zTAy9UgUJiw3bzSD7JZOUvRo3ZN +5VbEblXh58bZUlTZKA2brckGKItFJcwN4Srw7iC/fJXajQZmKcXDp0+FA9Hnh9bkKGE0vqQyNkmF +0PH9THmoAhJYOzNbXwfm2Yes/HdiFTlIwISjkHBnGB8buy+mZVbn17/Jh4Iwk7wFyafvkcpEKyNm +wcUs8UgpS7hAJ5KzeQeMqZrefYetn5nV0oAMBZPuNO219MrLwrJy03nKJApZrHT4EGbGNvvKV8Cs +Vgo1XYHGPJXyACr6ipfxtYRzqHEC2fkoJ3qwkJwzaVMMOGK+ADPWD/4BxiR6eMMz0SSH5CY9H7uU +zCOlMt+gYPjMUrRqF7C23aTKJsiZ7PCwabeeJsYU4rtzxDrLuL7o2TGUXdR7+0hZAmEF6t7XBWPr +TFjdWVZkAJxnexvB05htc21GHQHLTYHlQwqTTC7yYNUdHWVMwDHWIGGEXifNGDzTfrRQ7Q8UbUOX +Ej4FDopYz9+PY0qScwUOJpBnhwSA8kGcgtdzK+tUL9OTSEOrGArWHTVTrbVJ7a9L2jKcebTQXegZ +fAB/+qlmXyGA3XzTpG7yFQVc/1YQdu+/bbJKwczpMO0VUIzUQmWkKLk7G/gsqjjxOux+4Mq07fei +VKwUAjD8x92tBYf+fHyVbkCVVvlDXCwB8x3Hd9H7bGdlSJp58QXtp9XleZbt6YbACYuLmMy38/d+ +9odyNsrosnKfsggGO1corVKdosrEYwT1vNXDCcow9NX/jqxuqjQkXtc47j4+A9GcgZj61ubs9sja +90WAVj8bsiFN4wFcIUF/m13wfhmeAPLcoNmFCOuTpKriMIoBcdnO6cNTwOZvSaN2ByDdDhn9qbyE +Mqzhe2uKc1DVvLz+2nzVmGXpwnhyFh5SlubIoUE2PrjBKKKVKWS2bUbXD/X7bEhAlPPIF7jA8hNl +ZyBSw3lYI0JFTYwcR57B9RS5n2OyJ+MkP0AiUAmYQrPtE1IohX+3+XHrKmuD9CIl3V3odIYMICLj +j9OO1stoAKN16ka7hjb0VJMqri8MNIOauJA2WcdY84qGf5h/h7wFhOXK9YmYt46M4TAn6PRyk20t +euzI+ZKlAoOme7U/y8JLN33Cj19y/uEFG4t37lBAopl7lA5tqkrXHgsok73GVUuIWLG9f0EiZgOQ +Z7VSzzElbQ+fuX2k6sMOOnX6+wB5oea/T1WrNJp4JnIYcbSLRAbzoTdU76RF6fF6V6hYhypzsx6U +nUw+1W8CXgj2cS/93bxrtc0kd7p7UhAi6ruHJhbD7UtsOi+cvkZVK1ZoOiHCwA8RYjskdYt5/EoL +vSwxcvIIMQLN+7olSUNpbviEwf3S34d/PpQvUW/RnRikFwD9CmXXH5AX0Dl/eDD70Xs9EBFIBRv7 ++5z3baPouNpJ29q9OwmTxKuDeI7kWb3gSM+ZPmVAtLrBtpCTNM5G39oO4g5u2XmvFJQ1gS3G7tpN +MzaoewOzFGc8QL9eqjDjCNqzx8rwEu3SwYcbuGQH8FfJXssQsefB02lMvFv1LzvK//bCZUwZIxBX +mEKWXp28AeeAT18DQhUowRrmZ4xBX8cG7bLMUb8OamDopjQ40f7ylp5o8BL/rVP0ZMFuUJmV4poG +n73ykCYvc0ia/vozIpZoR3DMOn2tkNayBDFnjiipuxLPwpuxb+hzh/WqHF/lcGnX9bETTWwv2HNO +jBBq44XBesR1JPLkG+fxBUhA0v8K2m/WYsqz9UcngVNK9JqCq13NfxnZoySq6t8GvAYloglPjQZx +i/JALL4EgMkgYtrSfTVmMNfIeZtPZ5vND35hozJtSnA8TuilviHP6O2z5w/KodmQVS3vbhyMBMik +GhN4/e4R24o0O131A7I8uK3geC/wGmOe1nHd1VKEt1WK1dh3ulNRelvanvh+eEc//YiFn6DMD+Jz +fhY7HggiblqaMCbzhX5+7aCr94mrNICFPFA74UcCj8/agyTK1nmC6GVwDn/fwvIG0dxIGwIaBVjc +LmhVLSvv3EZNZDhSogY823Svh98Po5AvN28buCbLkG8CIQeQDypvCi68W2kx0lcnOAzSxB5a8tKg +/B8dlenNOohWiZCjwlS9gYnrzFnUiu7qBvHni0Lqsk9QyTlcXonmPFD7WHItPITcYqsTi5q17WXc +3VRkQtjcIHG67rDSW7TqgUTmuHEPL7mA/JdRCKslSIn4pqWYk73ttm8m8aFXy27AqdAEPPhuskiO +gYQd1j2Dv9925WfWuBAy9xtPTCymlDt325tpOlOtVVg1ADBYDiuDofIxZCluS7Nf+wuanHvf0kFE +k0AbYyGYsq8OHzPSIjzrm8vqa2Z//4Q4PQMT7wYFkbMQRTSgG+6cx4uzyynj/BHo75Tl7+dbQ4Ty +ZmXge5Cdekx44BkdEoH1PJmOeOhA1yfSsixjopc68aYjkpXekiBG/jST0lMQwzysttW6IJqRt6kr +wWMQJP1b26F+6mcBAg1h3WW1priyWkQ7Bh6I+esudOX2/MZHRfEtbHOAnRql4ylkoRrblcF+8vaB +kmcrDtYpHV7LRyErlHBljNciAaN1YnuzG1ylmh/yshrS9rYHO/ydk+hsSS6iagqMfgILpGmv7U1w +lx2fmWYSvpEJxF8AR3aCKHUT2umgIncb2R41wCnupD15wg8jNxbcgaFSw3Ax2WYZ/RGsE/5LEjWg +RKfbS0xwQsT1nLDOrNcch1xMqUYCVs7uwWsHx0IDDUnyHWXDnRkVUfrgwitdciTTzn4OCuHrajMe +WDhIhdNZfZrxDz5gtZij4JfiewLH3bG9z8InIytOo+NW23rQxwJv9BGK/tE37yTy2zyD+hlOWO2C +Y0ccSHD9ykhsAe/xs0Oj2XbXaakbPuf+pOImpOu3SW+QsnNnpwecxEojg+BelO6QscKpFn8EkyEx +dWruXyOnu8eR+ULAV0RMUQQ8DUO2zGDEGnJ2d9hKJ8TPfR+SgYjN+sZ09DnH3ABCloc1aJuAiPV8 +xdew90Mx6MWDMz5fKgqB3IozUKlAud4Wgo97ORXqRTOvbfNTnFQTNQD2H2JWz66Ln3OMG/3kVolp +H5siAlZEdy3lNkhk3juChm2qYKD52yofjbK7X/5RXBjHBE6yS7usHkR+Lbk6/Us0UIVoLSUXwtyJ +YoLNFOHh9/8lb+VS2GiRGC70nSuUkuewjsSqCBqJm3OX/XxoFxNeBg99M0yUu6jusHUA56mE9MP7 +wVVFGt2mDVPSwYeStHENCE2gDEf6hbNHbCoU3nWFggIg9hqHgDpmh0aWYtxCZDKgPUnASofO/pKP +7jaUhrzmACR1p4NoBi4kic51Y8u6D47D17/n7ET/06B2nc7HkmOVvtfX9uJ2cgbRmGPdghCBtgph +1oCbRlybWGij1pnz1/JkLJXdzQM9JrJk1eAuZhrqHjmwdiqJtem39MKkluBhgOBBdEZ43ufzDXc6 +AD9gDAtU9o1cTAU/Cvzrlxl/v/oCDIzsIr5L5lxNBSbe+RFOxHBlsqsHK9ECHl6iZ2sjxX0iftzN +Q+qq8DfTpcVAynPKQ3nkUt4vdHAxv5r9BeWg53W0zQiq8/Kk5dySQOR5XPF+wqF8pqAgTPf13Nij +yO/xeDOjLHIi07dJubBmOzojvRq2zYimeOMsRX8P1jPYrRkGcJPFxcLXGclRFpYvT/gRwrh6eA0e +qur1vW4hnBGkr0g+mZW6gCuxLF4ejnATLT7CH0UbyfC6dAnDdRIsrdvQdr2Rz2oY471OPscs+WJ2 +xcnZO+P/fV8Tq8s+Mmzy8NGdTZKdmnEtpmWM5jND1hxE3QNa6kdZcrMiPdSM9Z+1HjZCT6x6itdw +MGEVHCjeWpsavp4fqPgEUxv7GtpWJE46fMkYGu1DgaXjjEHiQducRftgpPK7ofxSLktvXZWRW1Wh +D+MlWD6wgFDFQLTRgYgvSRuTB3+D5I5iseiy6LU+9mZF3Wr1oUAaNN9IcfsHHqZS8uLj4D9ggy2P +FC2tZifp1hncma8Ml2SajZo5guYQvr4cODKmwGg8KaeKHIxsPEQdEtxVHYiH7njrfbONeDku9aVK +JFHL/CTWbDCVcKL67FDw8/up8QZMb5Nww4kHOYIhDWBhzJVcFh13K9bHuerkvLxsrXXl3RPSZye8 +M6LpHXRG4EB8LVtvJgtBGQAmgmi6SDTbbDVdSs+eRIoV/ewlMiPzoocJrZzmORY9zJDttc+fqV7r +0DymXI8rMSXTMyEClbspK0OS5Kk2pxAv2rwx093ocV09f1JgtjjU9WtqU0636PHUTa2Ri7dhwjfr +RU+Ew4BrO5sFlCFapEruwDl4R+2GjWYDx/O+2XtIAeu3qZQbZ9a22UjgfK+87dkd+3otM3EB9uT7 +XDZJgcUOfbt2OUHSbAtKy8NTXWWlcPOFthY4NPczfx5cGYFiCQHytRwMKsquy+tA+HG9GvTE3T8P +cIYkaObQBlimj3WWjtWVWuweJRWiEBKZ910AphkgN0zANQ4fo8Rg8Il5lowoV1waP9o7BNCvFAiZ +23gSkHP4gw88bRiwNBVlhVw1Dr2u5v/bo9wyC1qNwNbpmuH+ZJRapxgNuxsseoTZ5mzLYfUzCjRM +hzMx1UjGZEvxa4Qf0F+kaiMmtBbo1OoY3vLPZbO3fSFOU5yegb9tNxHU79pOHFpakMH+DRTllDZb +yIP9cpWkwVTWEBXODxruoLmRtN3JWd4sTZFeFDhZjkQG32qAfzlG+y3BNvvtGJw78R1Kg8ebfraC +eRDGUCBup2HbQ6ZWMt+79X/h6fx30Nrzsepv0c5JH9pjZUxSagf2czdb14FoPLVwfOiS6v0IdMry +Q1sKY55lgfzyqy5r+Oazf5XKwwCbf0ZvV7SumrloOFgeyU1kUNq4FI7yzZKEj3lFyWo1Gnio8FpA +izK7N6NzGhNh/gtBBmGpMHU29Yo6xEPiYsjIv/tEhOlgu0PCp6RWxsaFbcUpe4W6h3hhK6ZOk5nc +2bJ3QzquZM/3mZFnVLsBAqz8t2qd052WFYUtCXwEfRVe111tyyXW1mZ1ZydTTO7q/LPaJe2ZY3a1 +JX7PPAtrQqnxwsEZikhX1Q/HIyEicg2X8yCoMjuu2o9CpdUy7Ls4A25eYUozUn1SXsgWPuL7l5dw +JfvRwpRbSUjLLFQZDrY79GumDu6aDAZy2Yld71g6rWsBKBhjFq6n2Mp9LaUI3ZjUl2xyDGpTSfZD +2C8DoNi+QRyTS1RpGAQcBGvgo8YG57IYTz86M3r34iYFWOttCgkwhC2NtxxI5Gw0zIZcU9+sEBZC +LZH/duEXnYQtke/Ly9Pxo4Mwg5lJdxl7WOXyj/BU41qF4V5/oAxvDrPIObiVK7wRn76e73hcX3YR +CzURkzdo9Z3kmwdBJNMDnkoZ6hOzmmnctmTLvL+QYjUk+rs2YtXo2Yd0R3i8iLtpQabzhr5Mg1fz +T4x9+j1Em348NwwhF/oR3alYQsfIseiiCuxAuPn6/Mk2x9MakKZZ0n5SYPsvZOv4Slv6iLinHfs3 +Sw/savfr3Vr+EWQkyhogwX6XjA8FX8wGgVChFZDvybI1n8IYbftCgmBDujNPT7AGsFbSLIEyDnMZ +RvfkG0LBvp6zFIW/ZMgji9tIuaxMvPYXX9VSnu86zVe1G7wuANRSg0Bq9ndqpemgdOAHMqwIDYVo +mwwoT/e1f7MgK61FWg8sV7leQOek195ICPukQJDmORrzjAFoziOjtuNGZ/gux9hYglHKfEbrMPYK +GrsS0GAFsXl7myzg0rrP4z9YSWdwzeT5j3GjLshGQKEhWVoDGiC2pMOfJ04UORflUSwmre8mVboQ +aSZxUawhlTw9k6QHyvcyL11O2mOLYu398UNwEybySTObmMxdachkfSOIPCYfsULKr/R1exe0yNkL +S8cwggii9TTV/OOVEQlhHDmj8gGZJfWRQQuTFbhqF3KtOTIz+rFhtyI3nBdPeHYJr7XkGp5Jx+LF +kUl2xe2Ch3Cv9Az4AfSu6WeIc0+MaMY9NBIH4W4Gso6ayGzm+X/4yceS5L4bufI/KhoKnr1KfuU7 +DknZFXuJu8nXNCDZMToZODaydJQWbAbjAMU1Y4XkoMbs0ytvRJv6MaGqrv1RLUzO8eoESiHVdLFJ +QCIRiID35+uXY7fMe8FKqEKKo08o2RyB/V7sGrQQr4AB3HuyUsVKVhviuaUc6OWFBc5jQtbDxso6 +sD/VXsN+HpumokB/MLsOXF2DTXhT/RqsZjiAIqL0N6Wx3r8md3mVXpvY8A7wv75Fh1h4fSnkC6hF +8y6TTQ6pe9WKjZrvlNy79XSm+ulONzPChw8KdJRCEk4KFePG+Cc3+hPp4V+vK7Ot7chzxJEpHihq +ZmPKyvAjSyAulbuMn5Z37h02p4CiS8OGz2JJtHBr5uZYcLkyEFP9hNxz1xCXaUiJo2n7S9sTPX7S +jxuIzDmyutjAAZoQzqIfsQtCAhGat93rIvPnL+ZsYX9xM/4XYhtlSr+cOqDtCyxQUMXsDhj6rAyn +Wjj8OMJ0zbc9kootJq4XReAGSSpzks22gwCLqUxQDE9+7Uvpd2NuuMjRI4S9pJcp0KynrHXp6rG9 ++lTnFCIuvw8oaERgYg0YsENv5qfdafhvL+vIPCIyhSeEVIQdGEIVDIxs413QXmmo1+W7NRfGgjC2 +bYwReLnPnKfaBz09w+kexXCe0S3m2GdE9JsM0CTYRveSGgbufM+sJhACyLca6JGkuDuPITsfGAPj +Az/H3LPYtjVo2ni5iYq+SWicynLbDAOeWAYwy7e853dOwpPY3ETg8YKAhLvavA+t7/yla9vYpx7C +hdWJS+G0J9n0Wt/qx+TwbH6YZ7bYy8SyxFjMLKBEkkmtkbWxGI/XrJ84OVPGVYLgDODq7dIi++89 +ombyBM1oL7SvK++mnTajqLkct+MdEsd25kumf2gI10hm5mkE628ZeD4HFHr1JhDDcJmYgWFhvg7p +O2trEv1xnXMzorliRGgWFRykovOC2s77Y9n4vGr6oforedHj97zf2EiK+pCA6gwXd+mHiSPoGU8y +Jpy/+gz6r2WpnnSXJ0vP7uDGSkKwYMjMLsN+rZoYPaaFchQTRhMwbJuuWFKx6I4xIGXJ4AyiKpFi +NpaqSUH2rdQWE7jwXPJ8MkvxsGe2W7gvxOqduZU+zSSqdy9e/pIwLNF2XK2xuLGxMrwlbpJQ7vzH +MxL3aaqAEpYtqZInxTmxDcmBzVAuvm4FLi+M7oIhLXYHeo24wmo0DlIQ/RN0Y8kICPpWb8LGW3mC +/iLXJoY6JtQSFLO8vRwGOg8a/zI3de1NmvymNU1sHgV1ero74KZvRwwRjNbPB3n7FEHb7lKD1Twj +M9jL6usDUbb3GbGsrktC2mmwWwcG5gYzdU69B9CeyZxWYCeJqikL8K67usJhpp8xUxewykj10KR5 +MrsnAn8oZZIUST4zCKVNI79GcTeTLvg9lobCC5Na68dOjrelNP+2X8ltPmXmyAZeRIQzFtzEL4sU +bQkH5wdDCp6grNvWMkEBwBcLX4rXTVWt2mMEq1BSRpHni3HAw6l325gnpgyUGtse+KjyZ/Q2eNnv +wjy1Rp6IjfJEwxihd2KQH4fIGeoQ4NUgW7o5PCxjsf6N9i/mIkO1jOnOcGWBXhv4l2GIY0mYObv7 +c2og7/xk+1DJF7wXthARNSM9tMXTUvDcXIPBLYmnFm044EZ4eLzSYfFv+7Chsjpif5VLbt8rMLQ9 +co7aZT99tEKtPBfzoohaO5F1uSsD7wfkK114UC1wTt4keQhJUFoY9NGx44QY2+aDPszCkC/oLTCZ +cXDhliHYRN9XTTJopKQKQzu4RKw/vP45KwJVkCYTQPVSkUzHXnKnbJy86ZM/9MTfX6OMYYJnrKnH +kraEf4X0qNaExo6e4wLLjXmaFuASJnJZp3cMpJCFQz3KHUs6dp2gEpJNkiSrRJXRNR796izOlRtI +59e41VpJV8vt7uY31rsKrmdDr10DUQNtIF7Uxs+Mw2INLTFTSlRY6rmM66eLrMBIPgR0MMx4wRHS +Ka3ZqBkRMhlRY9cJ0cEv6qcJ7tmil7M2Cfefo4pnLOJ/89br9g8ufP8x2wEF5BNqL61Hy70Vdpiv +WWtal/8iQRnrOgpaF4gULeQx3Zm28hqkGwdvb/L2IiunRS2zYhOslK6zmf2kfuqadT26eRNwzr1E +Ypbt/wzrFcw7JZXn+O65+q5qXUVCGiBYINykz4a4mGZVaMBptx36nOJNbfxzu47KDbA+JNHzHKXH +Aq88VMPd7GuFcV26/CtrydHCzibq6KRlC4wcBWMTyeBI878b59/H/8aalSaT8xwXryehnldSFIPt +NTC0DvjAL2LTJ3lRJK6kuxbh9EHgEXKb2HhEn0x42M375LR8Vp7jeZj04vzoTiK2FKWxBrn+Pvfu +Dn9u14nzo41FIoJsWfcDyFehJk9Si4Ve29Ljnkc0K/BroDVWmXesU8lsohn8ytk/LEHYzDDJZUi+ +zIPCFP2O4BB3DpZsYF9SpZxL10EHdlJs3syLp2PFdgT5lePRkV55nXSLqBB8fY7moToOqhYGifzK +356r8ykig4REvisTmeEznJn2BckLcLLAejbrlm7nzaJvq+kEfUG/evtC2kYAB5kTeR3Q+Vhu11yj +qM25UUNMnaoLvAwSz3yMn1ruI/IKllmWD5Y+8Ygf+JS1n1EtadNqjrnyyqm9w9lA1gzfhyV5WkhG +TdB/fZhNb9CcIOncM9jm4CPRHfg6opfWZa4aSXSvdyjzRIeCjAoyal5As5gh+qqRvB8vPDSxWdHs +ci+ktexg/xd7f0CENdsmTaEg4WOYVcW67uufRss2sWLNPFua+xQGZNRqCLxnZ3u7s6gAziW/cOhn +IVmjbbfxefo14OVltsLO8TZmDF1GmTcjrOV+bTu2my070j1pBwTEDik6Rl6sOpOTKNs/nfJoxe7b +8K6CbZZQfjPapwM36K0BqQw1k1nkqEcyjw08HKtFkdVKUZrT2wi2VTF02dZwSczequYvsQ2uB8I4 +iZPBogTxZse/rDxSRpLeU1VZSbdDtriKV8kmMlassaeCPqUngDejUMXYG/rALm1gzjisS+2h4aO9 +yUI9s8Js0qQaWtULTHML9mJ3/WroIwjGRLwIJB4MK+3e0SFRKRGLMvPJAzbURp5kKtB5Z4Eq6kUe +61kgsi0wO/PJuRnHDBiYuD+CJDQv3sT0vSovXCf7ICRz2Z0kGYzyjvsAjTxegGEMp+AOTira3cg3 +XQNBeUtZ5n2s29G7aPIgWDfuPo+THtcCC55468B19wgqxgAMvo64ZhotBY8Od7x5T4rAL88b+vAP +zFaekLlhM070AdWvTU0NBQCNFvlriccEd7R4fYiXPMTDRuLSg9i6vWwQohlHSpraaqnwiOQwYkpW +2rA+W+bNSRH0hr9mbo8XqTec6HDM+qe6SScndPTT5NW5MU7qDeYOiS2pA2YqwpgGZ3/rz5n5Qc/p +WT+13HviTK+tjqiBhwYKh83O7g1uWcZVW2Hxjo4s7RMQjjaP/xwOIy29eK0i1ndVdGV/lhxrKDDq +v0+QmGVLhJLUT1JEuAiBp5mZVfhXPoUGWGQ3dYQeW2CzONYwCdrN42P5BSMsGbfQLPk6HCf9VCYg +fwPFzU0BNLqDJ0AeJ8mayQZzVBhMNb6IuWPPRLr7sjV+1IvyInO8kLrg4VbBiwT6piv6zRbEaRD1 +wSJHHunYoUdiGClpU5HoGPyjInNiOLPBhfuH0mOT5mNh024WT54lEIripJAfxTErZXgts4m793IR +kSQj4ovY9O2iyDNpfWTAMPclNSmYTMCOLJ+w6XZNJQfbsU1zNLIyDDk9nHiDKu03gmGLlHalbWzV +Hza6hTDs9qSutV7CRc92lM9X9c0aapZGSN45GCKIwZKpz9LtWgHoUabYL1VV6/aRnhzNT0Kiu8nS +9yglSec43yuCvGLADon/mz+1iALoG+3Zir3mxa4B7dKgYzMZ4/9y0w11Yin1gJrtKboZWUdHIlEX +ZaBVV96tTPxsES1JSZwKbJtVcNcWAAibmVge6YcJzS8G1yvMP4tUPqgO3t2DJTAbvtkh/jNkOYsr +AH/EQetEOWKerX1Jb3qXr0CYMZIal7eOqJmGCLO5N8rQTvDRbL1gneXrlcMCXSoTRK/BQM6dPrsI +T/5H+E4RNV7gwGQZduNI6PJ5u0p8E+ipfPGz62MYAxfP0xC91MtPAl9Wc6CwpycLBAqhtkIiramS +sZ0eDq9cNDptQqiV3Z+xAM43T4EQdu0+p+ZF6Bt6Z6HNbGIbR85t7cCAv56Psec9+dc7p/sVVc9Q +N69Ffi0Jec/wYiLqiPkDtlbqHg/C5SvykNMiV7ePXQIaYt71WZDshGWKKh2xoZ5yq8oC9yBS5K9y +ufgLsZjXGhLZ1uAWi4y3h+p1Ty1FnwCq1cAh4oJjURBlNOpJtAgeJrlTay97pkzrlNTByxjxiNay +CqINgICa7npAaBKr+9zKDDoWy2OWv/8LiDq8pVJdAhRmxS5udftt6UBGFypmO4x1qegI4LCUyaK2 +YbUFwkN7laYHyIIy38jkccTXXGtampy4jXNfZCXX+boMLyjxZNYfubkfwuisb+xw4YC2V+SliUCr +lVD0SWGB74ya3nymFDRNke31DCZibBdJUQUfQ+4yULMVYiC7RqLVxzSuguvI9mDMIgYaZ+XBvjHh +bgM3+6zaP84pbhnwKxOODBbv0Jxm/3ya0DqsX/F6c0oqGBTcp/wN23qgVZGPjAotbtVca1BX/tiJ +qjLbpIWNz5EbnjCxr60fJIG1Rr5NaECyu9JmfmTEysIKr20aQci5aBd8owT5AH+TW9HOokn6B0tw +Wrp1apX+THu1Edc3tTf2rPVa37anRBPjms3JP9DdDbHkxf+KatcI0P5+FNgs0Fa6stUWBf2ARjzU +1phZZKI0AhO7w+DtPcnSUxqV7xmSc7RvjCsi1qYoH6XraItClIYc6mW1ACOjPQ5XpCNesl14jV7C +r/3+UX/US64qWniHvUSPRBVlSdGuZWbRxRPC7itlsLb++TlPCwvrFaMPNsgMvxb+7/VSyN9dNRKj +2JXOu3gPwK4ij0ok99XdnwWv88pm6pIhVDMCjGDTwF2nf4Gu7qn8h7SYOB1wUMX010GZdBWDvTYH +U5+H093aobVtcIV4FI1IJosmyPM208t9RJqSa+KLbdUq7VnMxuUj6AN7fqyHo9zobB03s/76WNQ9 +5jVXC4IIw+KzDKvmaOo8goV99bjO05bh8EVVe/4amBLb8dbCy2gxwHbxXvjW/TyVSIjZl+SB70fG +krmNDf1RgMUNtTUL61bjf+fWYZmUIkAYMX/iEMjJrXehVOXDHyk+I3XUD6tkK6tNPRuZArrDASWd +tb3ydjuyei3KmwfTkHOITQJa3E6Xb8yj8T+3Bz4DMsDtvTXmOE9i7GzAj8JDSdGwd5X6twaq1Vy+ +CL970kruGAEzGifZb7uT66CSGwAwM29YBqxTRZSLleB626JxYEtrfKtN04BxBpydNj+llUUyNiS2 +fWfXXAzVyAKtfuU7G9zBUzEXJO555KWwEhSA6Nwl0FnNqfc+NhZu0hhTS6AGo1zw7ZL8cJcfmzWM +UcN5wIPLEz3WfdbpwWQjmVnfcCax4Ia/1SysF+8se9H6hX7Gb57Mny9jVmxFXxQ01E/GfJzkN3Ud +rpCYamn9sbrey0f5S6JTKvT4HfqP3hAdEaoApE9oqqIE7/QwBHPns9W6hZWPVlZMy/LqEygE0dtd +SLbkYpKVN5ed9VKa5BfiUw9HCXrlK6t/5hlLlbQmsegp2ZbTeJHrJNvF5soYgVvk4chpAkjt6mAC +orQ7tHD7PMUSCGYtSDF76AR+6bsJBh8NzaStGoTU0DRMTptDF75euRRVG/enkLZt0oSnCFCP5gFV +QgaxjS0UrdEhTstPH4NgtZ6iZOM4qogYBvT09+RtXyXNfwgNTxrRruYfXrvyMnmA3N11ypADL7wm +UTZwc8fjgPdb6zjY+60D/SrUFl5wVP2EZgUV/VB7rnriwPmGAsrr/xHgf/Vx0H1J6v188LYnGgRg +mDsgv1yKSt273ajoetbe+vvI1M2S+JvGDzyCiTsR2rvKyDv1Vgyj+XsOcVgvzVDYkoIfUAfBU1aM +8VMspyV1tjAiI7JplOd67lxFjiP70QDrVVooQHpPC3zcpEwnJlR3+j+UY+YF4THvTMd2m1uLPFFe +rEqb1o2EpQQ5a0UQ9BDTjsPFnxhtbvP3b+PzUO7VYWCJSSNpt5a3jddK01vcNrxv5SSuHdC6/+yM +pKElMn/5coTNB4my0WWzCZxgAOtK44dGQbUZffrq3UqKMJXgAuyMucLZQnrYxpnKU9/Mz/C5pFDL +ouIcu0iDKpihA5nCUQKMlL+rCQVHa07huajDt8zcQL6bDqtC5qSmWUdc4lQLEw5CSRvI9Uoe0tM/ +kS1cOqc8on8/HUCtkzQ+nGcu0z4svTxeNcKkmI6i3jUTa79pDYo59oOc0+odjR1TwOwCu+yDSpW8 +nkE/5oEwy6GRv9EVJ79MdGZWb3SNZgVfAO1TpVJeCgSd+aU2erKvrIQ0UEihxNjglh7BKwlq+pID +zxlTlJATqv51MvNoYJEbFR2RMESrfBKJd8RIzD4w6CCv8qfh2k0r+ok03iDhfzOTHY4I3WvVsCe7 +UwHdxnm656Nnqskx4C/X0g0IbLvDmbSM6eLQKycPCta0KDQResRmhTRSmsfIPVGJzPNN2qOnvci2 +8r0Yp4p4SVHw+DJcmLnSjXumSUNUfnYFiEHi+X8ew4YW5eFHRlmKoI544R5U3GqnO6Tf1FR1epIj +scsGNU5pFoIxwstumEqa79/BblIcN95AXQZLSlkgNZ0w32uqDam9nf/5/wUklIkTsoHP0jOEcjSt +xqV+vtwxc7/FptDSra7gIBw1pPRYDsTRyByfy4gLWnRUAsEmrfwSdBTpUHVXi3HtuXj0EK+6km7v +o0M6k5QMVhdbus/2NnQqhYM89RTve5wox9Pd7UOKgG42vEBOZ/m71M9qnZ1QB/Fdgxnu2fG5HXJ5 +JL0cBRf1Y2pUJBbqbCpIfJry3r198VSFwKRbfYhJNrOWwpXdPfkwnt6e8PImGczY8RxmgsMj7snl +wvaxq1JL0BVv8nWvqTV/30namvDZ6TGMUrgsX6XOegkk9mHBY6OIJBOA3Ffrjv0ZAtvfbx1W5BDf +TAbBeXJYR5jsmAG5YgOAg1ZRy5AX8jLtjK22OsBVGqolX2tB91JUOLQ/wuoMuPsyDzSbABuatqbP +0W6AeFgFj7YiKPBf6RLzO6WJMcBiTceEuilTT+kmcZeApqkIK6hxatmdwXjGjOM1a7wsY8lSfEeX +CPPNLurQLZ50w2zqROyLa7F2/xYSZpD1i258h7Pu+3KuT7FjmUwNuVFfzeoU8Ox4TI359pRQITY6 +Ft2aJFZidGG2953Sh0M0ymYMbFUKmGfUU7iicvtZ6UFWkYAvCbkdSYURU2Xx9Md/BtDpcDmnJ/Fq +ZUeLE70p4SQctW+ciWHqegaH3hPy/cgm3fbNulkbjDTpxPDNTt1uwW4hid1i/L/Uq1orH1FDQdKv +aQsFKlSskSRwNXGj/J41TJGXywk+OMn72e2CsDjPg+XglP04dR98UpJ2Sjvotu77UzYmstf/yUlm +fOT57y+1VGz+Z8y0MfC5etfDiac1x0n1QrjZPpc0j70rbi6CrvTfrPiA9AOxtIBuXAO2FcjNIIdQ +R7zqOw9vHxoOP1EI3bs2pxhvRMEM8c9clBZdw9uhsgLPvw4qILXN5vC6IyaeN8USOWGr9ApFJPY5 +a9ZG9V3EzZDw/OXClnT960foVRZC1IfKYKnydq0tMRVH2K/Gj709emBLHulVGv3qti320pDRsfh0 ++r1T1hs3u7dDAYAxKGqhPi26++6xOic19ZCNw8fXtzb52f0qsJUAUaf3AbKvJYKVwVVXR1QTpRDc +Rjzdim+akFqUEuSakcqz2zwBpB89NMCsCiEDxQuoDbYkMmkYfwORuqNHIvxM6lijaQn36YUYPS1V +suhIcN4GwaxQyU4W4783imYUXFwYt18pTFoptg74DaM+QWclN6YAsFcasReNbaUg+ZEGZHl5Tcbo +ucKVYaKJU2kpzBdl+Uuoktydkw44NNUJ+5e+Sdzp16DSKBoWVBYfyEd4jY+s4PDmkQbZmv7uH7QP +EGA4kf8aNTRWnZvXkCwIo3svWdP1jpifk3gukcQKfj9OiC1aUK1yfPiTD0Wkfdv/wvSvX81y+20r +dWWwl1FPU0AfbBVvH/01DTjG5jNC5qh7sgmffQdUKyGh+qmv/Z4PzZsg9iw0FBg1PD4uvAiKdfw6 +RxbP07Sm6m53vQPb+A84xlKagVzOgpF3XH+ICbSNE35lLyhvBex6YjXANxb0cXKuEDBRXSIYo9n/ +62zHQrn2tLwt6Pn7J6MSKbVmvp2xFhzcTVz6sVgIG3VV+gpVM7E4a4oh58aJRbqBOHF22XI1ALbP +q6PHorsxCxDeOievnHgP42F+oNlTN7m/hPiqVPDkyiDr3BH6UnnMYn+r8yBJ4ok12Z7Lnplc19ba +ZhQRDlFBGNmZecD9JO60KDb3SZD/J9GNEW/9OEGxAUGkZscKG3J3pnAdBe+uhlhjBsV5EVzlf4hQ +zIE/MBrTDJ2nObNhU0p4KYzmHUSwcpFsA5GwIv1knwaAx/xjNWertIATTARR57fdbtN+q1XoNwub +gNT8diZVMXTgZuvhrsb/iPqo2aJI0580JoOtp/o32EhtYkonMtavMCfcpKR1c9nx90WqKLrEBkce +dXtdU40U2KoRSGBFb3fiZVPeCPbyuBlLphBIKT4BHQ0w/coI8NBAMddeNGAy/uN9yOkSYwh6ViIT +EkBtWXiAvnYrNSBC9ELp3DNR52i3NPcC8xgvZf60dN0YlR598FK6Dmrs63fU21lHy91pcvGi84Rq +muV4jihZ7oR0ppRrUs+8c2M9eoixWBhOk/LAGx3DLHTiacj3JKI6zjvctFjE0HcmzL2Q8mEGD7Yi +ZgO6N8w6/cFxP91RpWseRoaqrRdoOVdoPojve3l1tJbarLoDsC3BEqOKQi7ysF2ICMlAXbVO2iNr +Tk80PddYy1ITUH58F5Hx0tmQ5ac2eU7sprrC9lq3+zg/NgDR5tG4kumeAewh/Z1uJpye830DER97 +6f0NEpDG7JAMmDhmVCNfJRaYqGDcoy6+SL7uJHQzhdRHhx9BFHmo3eylEZTqQf99yClU33yq6MGs +wht6Uzq7Abfqpyjt58/tcDSVtv75pnzYSeYR9BlR8VC0y29i84pmPuaIkmb4TaIN1ccuvNbrwCsf +/io53GeCmAOMPmja7lZekXgPHSDSzWJ9e8QvUxCgNJMAqz1ydPFtp2uwcr7JBqPiH4gA6zoBITF4 +kNQrirXmfmUxVm5GlhR1VB+PNVGNTdRsp6WRAuZGCX8enOFH68HLTrAR3oxXCOTc/xrCCgzrFtQ/ +JPI0DhnM72a9oFJJF20JdsrWx+LZGjPlTxAhqXevGbn9S67nFe9dML/iiH+LKCgykUwJGBZSeITq +baaSBo1JxHheI/eObjdOAtk8CeB0kqmRyZlGY3bcWkWXleKIrWptF+kx7AoMECkVCle/QQbCqctV +6FxD3pgfbMSXIuX0aYjNVnK+xoe3rzFFerUTgb+SpcyjwOAJlfQjEqUVwLFTHcmUB+kZvuCYQwoe +BKkwu+jy3TQy9fWC/1Qn/AW/noNQwp8Y910cwfd/1CloJaN9SDIWhHC677dTZFn+jYyZP+T9DEVD +Rerv6vfjquj1LjVLPJYcQfneIcIs04zv36a/ImFTjDFhF5pEd/THDIYSJy1kIO4fXep7sKQKr9hO +9aZ9OZp80YZ8o097hEtluoO7+yh6Q99+Aj0stamZP5Q0ks1apPKjPMgddjlA9XCqK3CUP+4WT//S +xSx/xmuLXPrnZ2iNX48sMnkLMBSM50likSHOb/1Jip2MMpWby5xezqBAn9IxpC7Gp/tGxCO5p6By +X1vPsGm8ueIDQDanvRBQuAMtkHO/INCbLS6H1ZcTIJOd6JrcemrQdX4jqgeGKn04EevpBHebxMuC +D7VRLI4T+i6N8TW3Tk0HqY7Cf55RmpTfgSVC5Q3CVA29uqfbQWfdDzufuRQjMDtSDr6kRw7raRwQ +IqFMEwv8B7gFFMfZEAD9TvdfWM86ZtoutixfTPEsQKOo2+sqRWWJ3LadH2HlMxh7bCSLxhyqOX3D +buqeosK/Qv9pAP/0v+IUL2iw+7EhaQYwtFGxo2LNcrTNo/qT9xUuRpG3iAvPdeYqs+N6OwN3OHd7 +Fea1HHwd3IlMEmEwuHyTKfccpHyVXJQw0EqPGOE+khzhqFtHRNZeGpos99yXCx1seIICo4punW3S +mlcALHe+vAkgsHWpHjgCWsQfArEgfMvcSd8rizYZRQSL6XGBSzG9WJGzlUP/+54oRtiKpNij2hLw +L0pQcqNO4S/z2962Q+MUN+hjxOGEG2yofaTBOT26OzaukaoegnJbpXHXnARdOqyZP6BCVhejtgLK +80FxGTZFlK0dhsAUDZ2+DApSkjhG4w1//qgkxjzl9a4P7U+vdOif05TOXYwhVnyfGc83wVuVkwYA +24Dof9O5XZxmON3R4Vpow8U6uKA6Ptv8oAcivS/OF0YHqYl4oFlXuWqoP27ZLU/W65SMFQkg+svE +LghkRsDNXg4BVKqpClJEzlGlqZ7KKkDutTtwA+J2BCbgnNvMrCaD96TXSFRzybhFd6gTEytIJ6Cj +1L2aQgiO7TbQreMk/oQBOjoaq85yI4UVEvwfh6kfTVtN2aR/loxaF7XAejJyTx8ykuqALEhgPCPz +lr/B+/tFY+JEFRzKvF8KsVvpXsBtkCJfA2J/QlHpOq3WdGTDKOtFdElScVEh6DBtjSgtdU3QPX2q +Tl2duthTJmXfiwIzMa5xj7+bUPUsVTnn3yINiPgnt33wL4v0K8Y9HHnqZE0jjd/vjvLjVR7pXfD2 +x4k30XaDjM48i1bdadiDaoonhA1t4A0CYkS0GZVIegT+fkBbQOF3G1vTcKkTR/WFrDraLtXyPTcu +HeIPGytL+K5WE90NdvYOEkbGVYb0G4E1VtTukkkmNsgyl/2mRfRefnxcDrgmBzqDWQC8aEBNZamx +iQ/h/S7Cv6o9gb4WQUZESQMm8dpF+nnthiY5IKwSKiQhD46UrVvmaiJoXTQb1jLqLP2ZLmKLcehT +/voaY9+S+Y6L6beDjBWf3eZ61k/Ht34nLUM/+v1N2fwLi8++dcIGW8ECDbxxEZuUwUzx6V+FwkNR +mTrAz8kviJhvbZlOZ1U0ZS8VUAmASRAA00jtPJpzCQIJyeCqdozW8zDb8xgDg3kHNRiLaxWgSo00 +KY98+NomAb2RzU5IqlEMsPbk3AHW4eNmH7OwvIOpxW6cFqLHuCCTgHNbtSMqYURimta0wj4HL6EE +eowUbO4IDtN5kT5akvH0lYamDv1ga0Xeln0fc5JicaEbnLaASN+l4QJAA5zuqzlNjzXXew7pTAJ1 +1l7le+up7FJh8aTFI707R/mu7MyaKXIGHGdtEf3WJ0VM7feslljf2wGygoa+U8aKS9MY6KROlo1X +nmLX/jMRcAwwlHCPjCpb9Hgz9BzwxmFgsSkYxdoOO98iUjACigqRR1ZC/0CMUPDrf9DouWDTiKTC +izPBFmI+8n2e9Hl5FEY5ixveWa4obfDTi5D9OK98RZru/ho4TJ0afnSoybsxa01BuFc7yA/oj+U/ +4zHHwdspP2k5Pt2u9g3JrgsmkIHgSZSRr9Jh4ZjlUShqkeXbsB+YnfDiDwVVnbZjhmyUFCbEPp5b +Q9idNONzo7dgHc5jeXs9oPAHaY4rp6YFCckTc2WQSDMAzfUy/Ei5+79Jkkq//bDHMwcz800B1oUZ +wzHkPVpz82H927nFjh/B39oaqYdZ+9+r8rvZ48StgtfEU+LzHh2OylKc53DIDnOngJOrrpVIxVZF +QxX6lNUtREXN6W3KacW9FAag4K2ffZI5kw5NQC4+JPtvmgm8V55Ugyic2ao0ZfI9O6zi4YTLCvmO +bxCZLw5KH1e24+Jbf5Uc8dCfvDI1BSpd4LjkCEQ73EYbNziLcn17sb9WNSR34f7HhWk9Kxq1NPVb +XefL377xvy3AfX03DqXHzi1eZFxZNKh1Ll40OAHsTC+RGQBeyff2LUSQ9tnf38lZP6oynvj/0NAl +ah90LzpvPC51fhZ7w2GWdjikWMwvnyNeSAlmOWNvbAzszzyYe3rnGekJiBb9vccReAs5vXnNR0FB +Kpli80oewAd2RqwCzthCM4e+GyCOO2w3P+XXglrlsAK1J09xCT7529uoEa8ZeEvuy7YVxW/NY/ZW +qSHwDlNb1Sl5EY/2zn3V5fmKoDIVmWOGFG+cNkma3IF9LbyDngUjilYyZn5ujcVq+V8Q84wmX3aC +dPZc/IIKtIWGLVtTwt2AcyfyFx0rvkfqWQMaHZsYfb8i6Di+qR6emcqMulhc+tG6Sxhs7hkgBopC +m4pp9n0xPC001fVyURrXDOXAybiqoaJf6vz3/fchcdMPpi4nNAL+KWTpG1L5AfHSSEWrI3wLKfIX +0golmj3RBga55GCm193/fUexvKKJI3PiiqYxwQAdwCqnidpDxX49Cjn6f01qkIWicuhmUoN8VATs +912p3/ApbCjx9+791ahi+aH+0UjE51k2zxjMkO+Rg4z26JgUJFu6IrbZxfzwvvC2lV2dwQ8C7VxX +X8nP1TnyPrtXXNuv6Pygwt1GjMQstcHiOVktIi1ESXHAIiJhJc0FTrxqCSk59GV3jWK3AlaAik5r +iq+lNFc3Nq/W0P42OquAPuBcFWrv20JEXO3bXs0/JPn5hDmjri9MGsJCHqiWODMXBYRvEGkURG23 +DZzIehoAAgrhX9hQMDCdUIUtGN7Wvqq1YlpbuNzc4sxdcwGbqKiFf7kR7eiWzQDGyRlxG4Un9Ci1 +TsZXEYI4wChVNh9vDqVZDsyNr3HwaUZ6jghWXC0hYpWSV13FOazOM7PkFu5MXriRa9m37HcahtDO +51hqgraONllmPugJ9BRB010/5pBRLYcUPF/11Ek3S2IaQc0pAaZUjx6WxHefaOhnJahAKMCIjeij +WGglBBfcKyXsYKqr5A8puYcj6LKpzKvqylHY1pywZncLCqh/J+VQ/ff6V7/fFxoJ0kzw1pQDoXsG +4ELUXwtxs7sXI4By8zMD6Hzc6GdmmKVCoyV1s6qnPUFhLjZG+T5Ze0xcO9gilRuPMCdYG/YDTaVT +iGB/V6DCc54chfRei8udN9uH48qzYIlAEPq646lEbE0jrswQENWL07W11+rxb2ruZkTYxne1zZFS +yyElaBcJfmryhRj3odT+HjtzZ8jbYUMeTLl2h2vI2nDO7ox43KdnB0yDc9TS4SVY4saqEEsQwVsv +qaWpN3YumHOPGaexPn9FVZXKnFs854WclKBrK39tJXNX0wyKENNsIXEjccYBOAFKeU/fz+Hv2/83 +tBjU98NT4bXDTiNYvFK/HdWdvWtOvnTS1phNYWjmKNDAzF65lHO77pqMyhlyqpVCJc9+Yy4esKL3 +pA+fjjwddthJusFYaDGVDPJg0RPTbUq5Cm+PZbYTsPfZCsYDOVmOhbbG/1/6raAOM+yOEFSpI8YS +RoOduqQ43zrB4zDrmz+0mevXzrQIJ67Yb6LiQxTi23tVqqslc8S0xaXyy4UMfLh5llRhTcPZaqOH +4MX4neiGqgVB71NA1ZLxBgndAALdm/TBcZYATBduJYjSGgK7qArzXjxDmVDlzdluovWEZCVUPr97 +QYCjmfrDcyLNiFil37yurIgcrPK5ZhwszVQeWQTqTGSfpFJNPBOq2jXssk73NwaYXCnh+7lX92xr +W9rUZJaP37DdyTaBupYawL1btl8T3CYBAIaQ/8j8K0nXetu/sm+qsh5s6wL9Iu3AG85tT3imjVhX +0CR16YIOka0iROLMHTZ1Th/gr/bVLy+UTGDZddUlz9Q2JjU5ofGmWIzJfSuUegG0y4YVYAHqVZcR +E6dWPEeE8WxhAvZQh/bC9BTBmgiZY62vqGkwT5V4sPw3uozcmAmjfLGy7ImyKfR9cpJ+KxnjjzbV +vrWvQKw74CTxBRQgCfos9RNsX0lKSQ45MflNkYPJBuCaXwtD7cClXOScc0ivlRmwUXuNeR4Pb92a +0eQMLQCif+o2Dd31TnM019YiOWIYe3nBXm2pMZAgJuWZTc5RJSFvmc1Z923BDsxKypQOMuBCa0qh +ujFpqggFMRvaiwQq7LUJ5S1WRHj28a6dYuTlQZh9GAn8dHQ90bS3Nz7/IVEHRMEZGcbD52Bxkvx+ +m0jFdNo0zb1L+ESRoOuSrojiGhe2UjRjQ4MRf32A00e70Nf+HQcjgnhwVVtdUWyUQr0LMmpym9pX +RbZpZn+rG8HaA3AxAMxH3j2+vUX7a94AXfohemuaRWk3dQUM48+qyPo5ddxmiOh/jUQ+EBZ7uTSJ +OrvC+sD6ajH0R2kWGpzjc4E/e5xdojzdflXC5UGGRx1VtzLVs/8TezM/NEtkCSwryCx8qJwq+6vV +a7qWH42E5HLuG/2X90v1Qlayps6GkjtmX7QX6KHOjjHYlHkmK9iCEIm39ck3upw6fmJ/0JwleyZB +5lPoISd3RiFC4NBV/BtKPN7+8ISl9MruEWTZ0Y3Mz83zRPknGziIo9MLh3/OwS/Z84zyVKHoi17y +ZLb6+YDTWy8lKtp0/MSZjiESagVlNLZHiIxss9bNZ4IteiTtIrSusPU8xURj4sLGK/nF6AjJtbMG +gTjDGIt41XQj7AytXgH4cPLrqv7sHFoHfDAY6aTexXWOAFT59zceFHq/QOzZAm6RSB1FRB6WND6c +NHcFLyYRLsjnfvl93DkTLY1f/G0D/MjSeaIzZk0R+t1kwp6kOHtjxDnfLPU3+MGkhJYkkmNm4D5N +GOerkgmFHhj5Kr10NIStqAQFA+RNVBtkhOe1cBDXA3jDvnTe+kl0LNf6B1ADwrMQG+xYng/3UU3l +LDmH3mHFj85AnI5JF/+kDcL1gWObllmG0OXDlsrBLJCfuKdj6rj4jfr0w0oOpxP4ppneHguxDM4o +yf5t4Z5KDAHC89NzmwQy3ryi5nNMWmUBlTVke/HF18w+5lG8No+bRaBrlJ96pmAa7w93BOHfB4ne +RM7jbvUdTJ7+K76WRthNnbhASQKY2tty28eEarg32TThx+7XBMWxblIHTFtCggXZivjsLR6bZoB5 +kgcwKZogEvh+8HJfqS+7aQtV/flWgYLgn29qxukmJIKQQ0Yro8/PC0hrPE4EWNh/u1UxAuV1z0Av +EwF2E6MT7mZJ5eB6NZEn5LHJYt709ygkvIXUjSmVu4FoptfEhM01ZySRgYyrPGujCQflzb892NIv +m0aL36//EIRP86zxth/MlatVQzfTFzTvMIqWEVvMvpxEnCpXEeAFhGqKkA5lN3cZX7iD3Phh/P4M +YEtnP8AB6Vm0jvYwDBMw66odn28fjU3ZMPbKytRpSNaX3xtp1mLnvFbyXi7mebsi5MCfCEDNC72a +SI7MCKx8nGVwJlYArGgXGAtZf01LuIlqVkkUNqgqix1Tk3tm8YDQl13X0giPrvnA5AuXCXrmhfEO +KhKyJkF7Qf5N/cQbGyVl1g2Ommz7YyUviVNtmmonuHsfka8/kf62p6kesM5izb7YwoNRC3X3nkS5 +UU9896qSGWOH/+dwWmczAczu0CxhpkXavC+aQXafFgcIHyYlDln0+HpjO8Tbo46UMY8jOztlahTB +Wg9DQCM71orfcy4IfqlBUozTAUdRvcXpoZdX5Wok5Jvg7G/Lr3W68CaOELHe+fTYCXNLG4NQh116 +7GqPeqN6Y5/xzaptMj0D+0qqeDR0d1nnCXFhzgB6HZr8EvOZ9aOD2JHjYWugkxhWW17TVxkgb4au +0oHkiUvWC/12aqazlYTwuqx/qMV2gO5//yXSzDQ/M8MBlDR2ydgObdm+BG+2yeQ+DHuxjsc13qr7 +N2RQN+6A4BWDWOuIVD+Cmrr/jhYPhmg3ALCL1QOXzqt7Ec/yl4yU2dcMk4QoPBJj4IjumvlVCKbu +Uj+Gx9x0SZFTgHwX2MYhcVvEFYAm1u35YmKprlYCYDRmWFKJSGoEA+WRtFP+K+UI14b4x+kvmsH/ +9li94cvkWkrdB3fRmEP4vVk7Yo2TarRZvirwoTZwBR6t3B5avtrEDGwiKaeyA+21nJk/ODEh57H/ +JWi2UBmS2C3xd2T96O3vvzrR1VlDh+q6vAJ4SDAdc2YqbXXzTuHISvCQePMEmCht7+M6br2mR4LS +Im0xUr8tKw6hY5wbiC0ZUMSYOfTR2jsGcm8Q1Adjp/JhYs7jz4U3bWxmn8FR786Oo0nuylsYED4c +0FYwKyT+90kfeZiMdS3TCcLtnuG/jI32HUZJL9d4pfHXvzj5Zsyr54XfyJsza8z8xNia9wiZMOyj +9q/SU+FlnSd0p4ICD4a+SVE6xkzA2NcKaik1hhWQZV/QZzVX3VMguWHwHPKXKFhyTfhEHQyV7G/c +E4NGpFnN+MzjITvW73SFLF8GUfVI1tWJyX908ix2cW5VppWiQZu+bWnPup7JDD29ZBiAIkeVShUq +n1kiU99OgTCuHNBIbH3mpmdgMISyfh6MbhzrJZCywa5nWdyqvcONA45ThLIfWyKH/M76lPQ7HG2n +iLO8npGBO/wOeII2NTcpZXJ/hTmK//P7RkzaFS3AF21tfPN1INae2WUMOuyXIQKJ45z8dPIG2zSo +GSDNzcxDvJyTZR7dGFb7w6Ia8g0CgYyRRRLI6WnyuN6Qibw7O+G3wIDouBslQRXV8ZE1GZPKraZ+ +ppnC/Doe1tIhPtEo5FJ1XJVn8MfDXwFG3NltHP/TnRGanicyw1RdH3RcPmv8ck5i9AvDVBFxikOj +EmcA4EzzWQdNQLKohimJpC7eZFM36K1R6AEQ6QW0oXMQtvq6ED8dg86zDb8P+v5m9jg9YRcamrFV +UeSsec4d2nil0MAzUBO+QfyAHs2aFchhCctldRLNnJaMf+IvHMusmdEyGw/PYx/1516FsriIg2Km +2h6ePOjyPSYwpc0lDJzWTxkeLgKLJ5ZOALfVdbyX9WhzzE+odbjgVRIx7RLx2F5gS/vIDv0Ir8ij +ZZarr+wJuSwrDwSc1GRiykjV15WVheHV5z9m7XqtChPAbylmZcC7pGxsk6UMHepepOG48+0rFx/f +w9BYVdg9e+KW3ChQN4UThkirNhcaPSTRmjqbPbqFaW+SsVRXyvQbTaz8tifynm7Ki+ouBBxVheuu +ZqSfXhhzAfvMpfxHKgSuchCXKDGzHxcNmf+kE4u9E1NoCp1CxkoTy9yiRE6jdyCdnHL9xruy3Alu +qdiYwzJmz7H09OKEKmqobCiSm0n059FQGv1EKsu1kyiI6yNwqk3byPHo7cNzILYWG6WCMZeOeZzZ +jVjApTx5g52aPOYzMkcwJOJoWjbmiI7lFbhffo8YhoQjKt3eAaD6Tr0tQyirjD2fRl+QkOtlK7/p +V8ABptG6shEK0dJF22wjq44l+vKzKmN0Z47irzGXSwDCtCgyu5nBjs7KuL2ldEB1ixxVNJyJ2sS0 +fmUxtCYO7i/wyRU7bFJDV0IAJ75n4JbtToE+gr3uQYOq/2BTIwAhHE0QEJOIL1GHe3JW8qoypYgI +JYh6fbNBv7p5c5NoRKnyT4ey7y/Kb12/Yo4J9uTfjVfnfdwilCyWf8IFcG9Dz/5BDUYMfou/hQrl +ehZshSf+NYCUIeBoPbEH0XGTx38HYlbbdeafaEoefe4ZbUEDAaemn0zr742wU9plBOFe3LS8XFk6 +O9x2qw1D5cSPqHDbiJdG6iOh7LLHJPL4M5jg8Cbcvflt7ht74R5JvN5JfouLQmAqQW/B45x2pcNX +MM8WZFaSN2Z3yCV/D2JNBJ+Ez2GsFfFTn9TYGgwHdwpa9JSX+8wCAGeRjRsOBNBrkX0L8v5Q/n61 +mqJl0C07eVH2EkCWq5MHDWSLHDanqJj2g4OLrp4IK1DAvvSPYx/eFO5To1DoftbOBUtoFFixD0aG +vW3oCBFkzulQc6QBLEQjsPaq3B5UJ0XbxwlO8Hj/idEAMBGzFrMawSqcZSLTPXRduYsaD7+cKav5 +HxL8pjk92Xp9uguRxjBv51KFi7++A+J9zo7jDUWJRU1dGSP0yEoWmkmfXQu2EEcc1hQtJDDoco5B +lietzBlPnvILgRmlPgbLpxClQGWNRYZjbC9nLGUT66jqU4Gchhiyz+gxGQmcO26o2BNMwOeC5OZ/ +QtYm2Mgq/jnQtnprttBFDW+A1mMylArL1v5C1aas4n3GRxADHkcpBrKZxhJs41dLh10G+60I6rqN +hmNx0Kj1Z62XF528EwFATtiIxtOanADb2wvNRDRjg1k3OaegBWFM4PZENypR10Lg8uiK+Y81bQBF +2PcS5oxP1XVywsgeURBszb/oJml0xxtT7N0R2/tAz7xqToXTm15FU9u3qJFz3I2m8TEu60EKJ/CH +HRXOD5/YOmh8pO/GJb5pH13TbRhtVKIKAqBNe/5w8RKBmVCRst6rT3qa7x9nRGQRoXmbZkQfLyHq +U2FFNf1esFDmSjOtzSAw5vYHtOaEYIZXoErvd8mNCcAhd/gDkZYqdkEePj88b3aFBuK0KcKiiJHf +ZQ3R4o7985GZlVgFtwYh/yKOcY+khKbxqKLXMIFg+VE82FpuAD+LoClcMA00PI4Vu+wKGajD/kMp +AJg1uhxAyDbuh9K7pSrpeU3CPxnF8F0EZ+8vaHiX6OMRFavRY0BNmFgP5Q1WPJOFfxCN/3dxJ/w6 +dORjMUIoyj7mDhtMRThjHoVzwbwUDqvjYTEZS5ZqzxHPUK1ywwvIr+bpGTQ5HqPIPvxWp/szk862 +AANoRoImQ0Xh1wcn4dmSP3Z6BGjgZHjKIhjIJMbC6BgmyrtnHAeYHNkz+2siLDUJNPA0q/ceH7eT +8YP6bnaGGuJygugy87/Xa4Ov0ro2TNAUjZFfjYKOmGZ9M+3wJECNYLDtc5tQ8rcrVELlf4N9Lm/C +T4m1Bcpp3aqkgdtYteMuko6Vh2kn+ZSJaalojcCxEKe3ts2bsIOHdhSNwGNCJBHd4hv+03jYi/a6 +kjA1IorAHJ2sV3p3MYvC34byy/Wi96j9lZlX1wHyXhK0jD/X8b6MtN8J3EV6NIVJjyrpGds70mEI +nk0MjnmVeAU0e4jl6/h8D7MYdMuOcrG7LD/H1EKt9J3KJL5iNn/VdvAdD4rc49oDHsAQNOjoR0vl +3d/ubrLlmL6svXfnZt78iHYudjieq3hqDnAg2rwWNfEdudzCQQ1ajEbc9vrs8Y1riON385A4AFDz +XNstEYqPJUc0zfn7XqUKrDrB+0xngi4qrWz0okcgwmlQQu6vgnBN2m+l6YsNsMTSdDTfdxnSyVi/ +0Qo93RuNulLuZDLv5kLziVR8CH5CXqrNBLxCY2NvrlMLeOuyKwkcilfbOVqx6mRdo5kGPen22+uB +Qp7axXjg7YC/NuJFsMlMM71RVmKvxx4pD+j2jx+Ld42P4+VbcTSZguIl1HfnzjYPnunLsNk0PbSO +0OvUrHcKy133pMr/T01D14xRuDgkA+Xorz3D3YEWjir+FDrtWNSN6hsZSGTncagrRvzoeGRwAcIn +yHxjBIeilco1LOCl8UtjIH55PnUqFfVqsXAFdqEp/m0s80jrfttHN23ndkbOwhsEIISqwuezwFgr +i9mzwagK0OcPHkDngPa0/KzIMSM6x4Jk1My1yPnRZSmQRH96Q53AhYMsLZ11okVLmrS/tDxh+r3N +pfldD9Ji7b6VtoFomq5Kx5W25QNzWA1FgGoQUb4151txb8RV+F/7nR8lzy5YNjRegwAuiokDuVm7 +k0bORmbAD/jj08zMmYFKT/zRCALXfRYdlx+Fq2cGNvXf9M+yL6pf6Q/pbLjfG0Lfh7gXGDW/K46T +Rx+zoOybaIs8oEXRyDQj4OOtneaMMSWvueWfodw1YvMatd/5xsfuhAy/f8RZUCDcdJpCma4Y4wVy +BmWQqxQ6BP4e02HrGsKeLV/hobIZ16SoK87fU/qkT4vX71lamtIVGRcEH6QQ9MSYlCD0gs4kG3R2 +Eb7woA5huZS4uYdo2DYWQiP0UQdM/X/ItKNKuLWLRe8KioxaCcamo0OWNqVSWmwUnGCQX6j8Jr8i +GNnT77DrHrU1nyvnrN9+B68JzBJAiESbE6oY3enhH6iuTxSgt93pyf7yK8gnemOHjnru78x0MeU6 +g5/EI+s1cgNSneRIonnhPMd1js6uQzeh59MBisbQBSzO9z5YAkbXU0hf88aLgyKuCVy+9p7irS6O +SiQBjQc+E98ghi8c+9PtD9bBYHkQKGKpo5Sq+Lfx90dw8imvNqi7ZlgbGYVD80/9Ms368CSy1PEY +KfQj7IXQuDz3pP1aB40wPdjS/HeFQY0AQLrqtcY0iP+0EQelquIO/9lGRTZmQ/XKHAazmFBGZikk +anhtoNVtQ33U8t5HIsp77BhCjIBkK8a/h0Guw8TA3wT+AeNSQCTOZwWpG32fAtRXBVH62qi4oJVE +QrckGJsmR70I62KZOnTB8cW5NqT+g3501A9MXMbFMu08eE8XYcZZlEr3nwA3NuVqIepYkdukUccM +vvsNRvMaoffFLDosSjbammQHsADt/w/Tqn20SQDNU/T3oWjrJayej+QooehOmyqyLZDBWrYbh9OQ +M7t8vRviF5SgSF279Jk1aF1EHoWZrgCB6xRD4jFeiCrujsXV9Y21KKj6F7Y4jRHZ2e4wvfm6W/IL +hSKcI5OQKhwdNEuIEpVKhqEsC8HirONO4Z594SSwu0lRx35IDMsc+rl4oG3Yxfs2ReAfl0zWrJdr +QNNI3Jk8CrZweH/QrtF3f3itHtnlMFeW/xk9Tr8C6JnOFmIDJU9Yem7K5F4tZ3gbzhbkq51HJYuj +Ac4T0UwcPsXp6CFVj1tUnrhVU3T4J6XClM+0UlBcB1P0LcwYNC7epV2RjSwG2OkKWZDF4LwbsRPO +IjZT9sKB6YFox4hwup30rhqVF2yAulBwYxyjxfgKNYzmOREUUxI8C/HJbrTf+aTNN75ElFbfL8Qd +O4pfpKxyP8GvHqMpgZe4uM1vjpFmM68Jmln1nm8s6wxyzCviD3l/vNiB31lTgfPaIZr4TqduJ9ik +H5w5Ms9MW86OZe2v7fFlIuSVYWiqMpj02vAWrTir4+sir8yev8t/z7QITZE5YyPMQBZ9afkYc7Vz +UHLj5gk9Kc1925jUnY1N9VRpyTSADYvNhhXwtmyAmgxfWUVa2jKgknHm47dCNUK2XSx75Lc1swx9 +maLtDj9U8TubE+nQGXVWS6bmPAibdBy3RIr41AleNvTVgjjyMz7nEkTxt7Yro9N8dCG8MdVX3As0 +0ki23EyUqX6aCBbuUjvXJOkPRjP3vWBA0tH16eBRO5ckdRPRfjy/0JzB9zfNts9MHlBgXSdIHe0s +bm7lpB18oR61vngZKT9BWmGhG6mGoE6F7/4RAtoZ8WURKuG91nYocT980ZL6EL9riOzUCLsxY9HA +Es2uJSAK7OqxGkHjavbl86if5iApOBo4eYRqfm1gJJfUcma14zIO2CYW0t2IgfWiNbV+Uq8PSmnm +vDxIg+UoLU8EbjOcYJ4bfROtKG8TYQYeNDyOrni18zRv+REc5MQzyCZOjiLIF+qGfpDb87igUMf9 +tNUOXnO0NV9XXdu2Nrw4F9xxOv3wG/3LA9rMg3j64bFZnUjGQAr38lZ/0QnfQ/A8QyXByuwV5qam +0AD8tgjYQ3zDK3k3+bGmfrJvA03SwqladLVlhOzRSfcd7f/77P7NWf9ei7Zzcvkri7F9K0aF7Ax/ +Q95graom28EVmRNfLvo2Pnhy28LSVUnKbGC94iMVVNEFhIIrHA/P+l2V6hqYMZ1Jl2mLPd+CXXwY +CrNVENn1tlm/MVuMqZYT047c1JkC/oRUbj5vLz6lWiUXIXkGWQP9ZVgulS5Gt5/5OJc+zRWHa/61 +i+IPLKbd0ux+ktBm3BmKTy0XFpbWWxwsJsfcSIlEPzI7n170aGzXWRUd1MOCCvTniX1/x+BTM4Vz +Kj2rJiHSAzVhCEsxNjOau2BTZlRN5h8u7xG4N6GyNq3P6mULNaxOonDoJtkdJ8c+PJs/Uig/vp2C +qjf3u2+Ay9SFe+xkNGpBNWRlpUzwF6XE5RW6b6wVsvV6hvp18cor2xaU5VuVHZju86L5RFv6Gj3G +wVJ1LeIkPXfhrJAc5bcxidB6PiITu4pU6R4WHe3haFI7nK0Mh7dU1IAHsIH5BGxHhAn3w+1ySsR6 +CdPGivIvJfpiAtet5ID7Scq22WLRt/2XoDS7Vr40JSpykiiGnIiR1+6bMV677UBxPOGGsfq0/9sK +Al9Q6Me2SfDLpBD4KPBBFG4JtMn59z5GoRSAbrVo5Tc/bJh0qYPUHo7AaZAHNb525T3wqblvSWLv +wvC7QuKuKEo4Zr8GtBw/veHN/nS5oxaj7EavXE9Du20B1QbLM13gtNhv4rYaTBVteqBsBFfJ0LPx +9faDaHmyBJItWsfiFfWtVOBAcA4pLp3DMvOCYzuYrrvFtVPzpzST4yo55D4OvOr7s3LQBQ+g+tTj +CRY/N1TXRfym58A80qGTBdEoAEqxtdDZaEYUisy+9YlsTPhPqhLuXsD5tgTH2nJCDfXDmampRmwY +/LmOBxL52txhkvHwCTS88tMTZJ0zH5jbUKO41qcANudgwNzt1Dl9CFwqkOF7IPYg8HaBcZJZXM4P +2AwT5y5FXTPUY6aPqrJ6FY2/6YNk4CjgaI62FEIFuvWN5ysKEyrbUVbdnDemjfR2MRblybym26b7 +Fgq0xVLM9zxsqTNZwfwGXAsI8pfDtzkMj29Rd5CSOk6MCs3fn52cY69QFn7FfQnQbQ/jCcU93rJI +tHXmFPtSQ9G9qAnQ/k/MCPKFWh1I2rIBR/GfCaD5VAhDWBBdGyJi46O5C5HP+2Alvdl6lgneWMDF +iABLlH+unGwJrHeL8RoMdeg5HwfpCzPeK7tkGgurRQkA5KXmix6awLwdl7GPmaBeIbC25rEsnlpP +z4ilMXMV9MsK5GuCIuMTDl/WE9ETGpM6qASpNVSNc62dPlyjdpZ88EyTQsPrbq1d23GjTUO/vdJO +YJVO7vMK+dOwF5Hfh+mKIRYu3Qs1/AZsakrOD5WRXbE8Wz+rbhD072rn6eH+FzqXE0jMqfYi8ugl +3iEJ0r4TMQhTRO3gZwvU+6OcrVVFo0yMuZUONvRHt3X27hq44dFwJv3E5el40OlBbHV8URF1vNmG +rSmkn/S3zMREa5ZbUkGQg4MgcuPpdJbxqY2RUGeGu204rr5hRigTazvMAKX3g539ZNLo5BxpSd7E +ECppl6GjE0Js8DfIPJFF3PUP5cmYb1srxlvz3PJJuT76gIVplsFzFioDInQmh/hNf1RN4g66hnQ3 +SzmFX/oCQIHbQ3Bc7Ctulvn8MxgHdoaF8LmZChoQbdhnu5a5aSVJflgupp1QBWTvtiHv57xsnksq +ZukGcgkKhS/ZfjKrji26BGbCQ5UeZCpjh8+R+h7Cio+/s/KnTotXZQw/4OWvf3ivJqM2KfWgIoYY +SaptTnlS04jJnr8gmhJg69ChGFYYSMDOwYBShxyi71p0E52s0PVvXPUrqhAbZOVso8Q9s3LA+nVC +Qwa6A6wJ0y7iVyD0hd8rs3warDP86M1P97zDzS5o+7rNRZUwTtSslw2KjNqb1iQ4cspiUe/DZQQw +IDR83/pFMnh6mwwQJEaxaAg7Hvwg+8pWuWMABZAOdU7qn33WMapFMMgsrAzd+XVNW4ErtJ2Dv2aK +cNWDmzVzr0ZgRRGoF7Rv49Zr36UZyuaRfWYtKTPg2wiri3MIRPw535mGNTIg1Y/ZqqcYSNVFj9BA +8cQaCaT0wBb4WL4KYWuCBcTHras/mawkW6VOPTHD16rbHq401emjLpd7LiaNfWXDJeW7ZQFwS1DL +Mfd3WA1/+B5OFzGFCQlfUCLqeGMHhmbrxq49Hxf8BQ6VwMpf2ooNSpB3L60OJzz34/pIEXp0iOKZ +gEmDdjLsvF9HxN+sD1Ryhka7UX/C5gP4wePbbiNTxgye9DyB8RsBoCKHel8KV4bynwvCc5tVvwL6 +bsCdODBehVPHzdEjzpAW1s7lOjDDab6KvteDAvTO+TA59EatMnO4TWFvisP58Jt0eomPwSfs5wZ8 +p2/tTxBs2K17uYpwpwWl5QjaJwqhKaPxVaung1GnPgiMK27CwVwSNKAmF7X517DfDe5apJBFcRnR +h/S88WCRjDHRf7pk8q5Pw3dE3qDvJSCUhkKlAbd8Yh84mGke9e7MpRp58iYmVq9xEUUnfcxL2kKN +Ow+2lmsav5kZTbKp1vGtZCnoot6RImm8Z2awoAYzfVWkJ0g4iWIHmo8JyusTkogdXBjvLnFSr9Uj +VILf3SRhPFjqtm7CcxJaSizFTNB/CF2LlgCkdgkOoFa5etLGLLRrFEKXxjrV9L0/wuQvknw9U+Gk +6c4BFHkUgKJJb9RhmZ0YRPmfc8rweHfLGSf7H+SxGjU/CFhiThp79/B7fkAO3aTAaJIdLtP2M4k1 +Miw0K72cFUSJRC7HD9ZIQAq/vamFJdRJKJbrV/X4ENZtNbdgM+Bnmc4dfiXksdLxJLXb8eS70WEo +3GGcXQEEiW0YuS9BQ5oQIvCgRG6bg5/5Z1odHxy/Yu+axzJ9aCpSy72+a/PBitlh0krkbV3ejo8u +r9+/FXIbijU3Yb/1Ou1/V/XOUvY8fqCpgqu4Ku5zRg+ytqaiyhBYQKV0RiTZpD4GfsRkzTEXldEP +0G9nJdn5P0pzXOLKgI5crZ2qDY9x3OIaNnQ8kXIffcAiCWKN2yYjeQuedZ0dlFDhAKxDZF94jyTC +1rdRT6GLsdzvGulVPiJ5bY3BoQpIY2H5H+fnvuDeeZlOltekr3H6ea5FZPXhkVAhP14NrJu0ZjvU +EmwgqLh03CwQzSYe/eIARX5jYeBQafWEWla/iw3DurjxdKaRlYksF1DNAhtDZwWHGbqFjEi58shF +cL/fW16BnUPxj8laV9pd0+/UpgKIBXAOdxdGBN0U1EvvUPkeQbGhyDUO5S4MM48tG9LaZfUacmLD +VwZcjpDfopmdqQyp2C/HzxuYpnAVK4T5lOFpDCUEGf9zRbbtbwfvQk96Rx+F50Uaw2xAEKqw9uie +1OAzD4c1ok/Bea/1yHIW6KTfEXTAbbqdSVRZOVVgI7b4twZuf28FiBLqoptcN8WCOJAmy9MOVJ6s +yK1Wc85g7mb3dahPIyUY5erk0ShwqI+G+SGjGhZFXVtrA+wYLZY2d/6fgJOXCcP15gLsqY3Y4IvM +0o9bB98Pv2kIrU8coojjwpJZthLO3Ea8ubXmSHcA4KINroLd7fYNCCbulBrfWEbpDfMmvEIkcDui +hkMUJAD5zCFIpZK1/Elw1IDzjmR+MrXb+XqsXuO4pkB7Dc7ZnIbWFnRU9+faPWO8DEyqOu1pQZ9n +yizs1raV0NsLytKh9WGpqyoIMPPy3fplNV0ssDQYhpTnffyrUOFMo6XmzBZCiIexs8A7GaUd4QlM +M5tJISpBdgCAO+Ek0W1Hm9uEWr0vL2YtlWKEqwwW9iLXRY/O+4hZRBrOHfhmKuQKgRBbYQSqU76B +54N9VjSO5pgotun0VDmY2RDxQPdmdRDhOCuIC2CcNlixCHGHkUpzMqYrpvdt6QB7VIPl3NdX05E2 +k50CV0kNBmY2MTUtku87+hrsM4mjk63V+ZhbzG6ZxiATafmhNz/i6jrlq9CMZhvCxu7etlCXXZFZ +2LHJc2dVdpyRqXbhm2Knc+RuB16b1Z6V+8XzLD8ECF3WL2/zBPRAB2638biRkbjpLHpSmuJQqZWY +RySRmnORFwvee0GAMNTwImfT9VbvumnKmQV0AkCOr/7GwLniKnnJ5s6gk3MirskdndwALx1D+KwG +lNd380gDuZsLedT8PvWv37nJvsVPcz5Anc3/WTKAYXBVhzxn/qkNPufJ8iOUfY6Mu5ah381mVaEC +3FTM4jmCvc2kGDzFonW5Mui6pFCghyxpowrFgR9rrApbUX/3+qBuk/E8eej3H32HuTltvYrspjMz +834cQlOqvxx+DMGKTrpPwq9lmVKTIrI83XluHu10jgwoPuJYeB756b8w6Y9dzfalJsCjDF6bE6aT ++t7CU/iVbtiSSIsqIufSR4hSxM/qIKzjQFINc5evzy4YSHsJkDlxU+fn+xOrQqBWEMMxnaxRp0DF +wgY2piqr5ohw1JV//vRNYAo7/Ln3vD4PZ3KE9KbwazUl64PmX0swBY0yFt7OtBS0R9yJFDqoN0N0 +WCB2LFIbrKrJxROKl0jW0XOuXdEb3XhNy/vjkbkBXPQAR28fNxHojRQk4os5TC/phbr2iwGocuAR +PMKBtrUD7pzPH6HMTa8OfuOjcN32NI1zPDC2cKzfcNax2OylYt05ECouHWhRvkhyb59UaYrja0/P +wBddZlBQmUR2nA2+CdytrE45pZIx4+XrnkKiVvbe6NtFWVYC4O7e+7FNEI/1WdsebnZwxjZYteld +aq5Hc/TtmljDiwaErRPm1pkaj4mNInGGXz44LbuzVjv8aa9JQhgYYyYCdAYdUgFs/m1VIuTqKRu1 +K/6MOrRNx3Uzh4AxL+M46oehywgPzcNDNeQKBynNyEyVRNC2IoUsHNDOIZ9x1dCP42yok+c5SWd5 +h6Eji3wG3X+9kzPoi6KFprls0rV2jdhZ59HozR3aCmBGV/b0GEZbC2KhHnODff4xuuZH5TmMDe91 +pL0cDs6cj7H3Tq3TC5fn8u7MPBdM5bO8jMmB/yv1zyUVQvGtPfKhH62bgo0ifQ8H0cLViR0mkwIK +OQXYEZJdeBBpMjwgX4B6kVhyGhbkYQGKHrNjbg5AnCfQigS4Sm4fSWHOLt+CR3+uuFx5Uiq4hMWE +mhppy+Xhg+4RGs9LpLu2lgDBqHAD4EwexECzZqf7naIcodZbdIHr3TCRcSjdrdLhe+6YiL5yfq8b +SUUOE1tUITNTkIl5dfrAzW4fCg5feyeUKPFzQ/S2EWs8M8oEnPI1HBCrQfg0LpVUC1SQgxtla6YO +IoI3ovmkSkfivIMYf1VyhRbf4ZaQRVV7Tj7uuVr2Ey18cW/vWlYWAk9+jPZcyhwGm2j7lsiB8CvU +Skq7vbhLDxgUD9CFwe5dDY/x64FE/y4nV/Y/C1Se26EeWjHq+GUIzq+xQhy/Yo4wpMk+zqmA7qhz +sdWeDJvCpM0Vpz5slPp5UXsZSjc+8HLJs87YH+RmJJZ29xuKmC+Q9TEb578PEmi8ngtLuzA3uhpr +egoWVd6F+gBkqcMMybEgSMWUKj3a8Y1Z/n64QR08+O8oLAhQHOAU7o3ZoRbIhBIN0GhLlJ0nTyi4 +xTwq33xiJwSCKVWWbYoB2ABdbdatgrVQykZ+Wyu31adICUpx+mfVpFEReELdnS32x7Ror00vt9rE +5aKR7f6sHm4PiVe7nez6HJlWJMnOOYnOcPf9uuoK93t8why4mT8+/w4bUX1nUSo1bnVGftBqy7is +VIA2UxOSyx3owVasK9G66yHKSp9CnpgBPlPKAbbmp5XSivCOZgbZ1JgjGGd1F+Egz1/DCJ5mdwyc +8/EAr/QCv6mt/p4mLEAFxGb/7Ds3sje3Z/O/yr+lFw99w8re9hFeLqtGaq74vUAe4fZA0hbQwLRS +ohU5lkAsMrEq/vxdfiSHjV1PDlujnYxHAuK81NyANIMKDZDNbXe1Q2wvIUSB11nkE14u/izzbOf8 +OIhQ/Mnm93OcnpjDc/E5O6oC3W1E3Mk9ePfEFhZ4L4UwOEAEJ4dNIBo7sqFOG9mtHnNZTZF45jF0 +avqFZF6lssM8qQz18H/E5FGo217i3Ea/4lRzUZTDSABzd7Tm0vHGWTqONj2gdpoIXuX0SyVv6jDq +l0xVeaD5KXILhS5FiY4WNkxnUgqZkqE5SQdG46ax4dHBcADFRhoYVYsSNpZZLyl9FdefOdiJCkQP +fO+Wi1giNLgX719dbuQaK108kGfRG73nk6zw3NDtEdchjiAIEuEpD3mIwONUKH0DlZaS5Zoy8mT/ +307wZ9ObbIWORefQXqV0s8HFOIzAiGtF0fkyEVMV0f7sHte/JsFgXfznp00W8/X4nCmgHnfLp8uH +ZReUhrGTBWZFrX9I9wPlAiiQb/Rke+1w1mzVcGMFc0MRug3hYfH2SsYjOUEfqMPGt2MTPpdtFU1k +5Az2FaqsBTnSkkNyymDVI2joLcywRIthCHTVWiOdkhKkv4VJVrd7fgTSxB+fQfuKPKtI2FfcTtCd +2ldfkmFu4OuvesqsGBxNKxkpRL8bUF7UDYxD03P8XYi4HWmyOLX5x19DhiVGN56hlCC3MC4kz+q2 +LC4G8cZTjdrx/RJzlOyyyEsPiNPvRztacGOYCM5jO8hqiCmRtdq4GIoaWY8srsWO8SH36rJVjU+O +JHJnvTEUobPGyESkFDTknQurxcUt8uFi5AgGH5hpsC+aMsNtooKEcfKYGVrdudnYCfoEihMLhM8t +PKR0S3gcWvTPnRYtllnDGzdsytXsWp13VzcXDJj6n2BOcvEu2XPSaZwYjbRgGjDE/uLx7q6S56BB +0UPsc8mSfdBgOoujZ2hKqDI1muwjpunsqwGp7Xyny02D2zyzxgJ5nU3hqctqH7wiDME/BCTiQWXe +FPLJP310p3qrQBbMbdEyOcytOhk5g+H9AMDPUfMyU5AyS2viG6eKwamLoIH51viUNvw5VO1+1Nnc +Ip47aov0q2h38+fJY9dbOwwsT4Fuj8K85JNMBnn9IsfMUciORXwS4ST7ogXl7Sq628lW76q7VA7g +DIf2ujRuBzgINxi69ALDQ7Ui9IAaqEmUGI4bDCz64s+cr3TjLCX0lzx4+F9rijnCFcY7i/s+kXeF +PcyTbeFeCRMZsdU+wC150lpruVOBTt1xgPkkoWbSkv/IAvDaNzf4uJdgNHJGpJxbkw/4R4z4XHBi +njUK6BoGWl1phRL6VzmEuV/+WVtwP0LD5LXvBxFjzuXWytzaEYcg4HkJgvOxRoL0BDtiyQBqqQ66 +fkGNkNUXnOoWlKl/Fe13cKQCTfgjAw7mVWbnNdnX1oKGDzsaCDBuZioTeAQ395XtLWr99zdYWjIm +2+N2mVv4pXvrPtx5aD9KCzd8TFH6Baza9wmuE/JdZXgRW30Xlsi6GuSC4vW6laHdqcXRSh5YyyrC +j7UP28FJ/9w7RJFR9i5K3wGv0xpxwW6LcfIBTbx+jf0W28NlsHTYgsHvFDhaDKid+wn0MVxXlBgg +WpyLrLXUrvaYBMAKVoxxQzO44tyEo4x4lLheZwYg/dM3UrRbAwl+lyxvPE99wWVMU4+9JXWzVY1G +qxE2Hxyq60+FYRnlJgkl9rEpiXdLlwEF1viabaGvv+STJ77Ts6s674ezW6NkCVJ4ib//e5/e9sdb +dpMA7rAH7P3YAADQVqkR+8/BOg9qb8ii/Hhh3FIBu23XNAg90V7L42LjOaQlHErBRnY1QnEQHVng +W4RNrLgV/L396KGBX34GMNsgSFI+s6cB7r1vNTijzH6y1aWFcPctiOhak3F0bTe3v8w4kGbOYVMQ +1H0Hrx6tb/ehKtCKBSJd1Ci81Q7QEBcSuycedQLgpDRio9adiKtS+Q9Nvz/YSVA780mJXkavnIxM +/61L758xoLzY58CKfWY5aFVok4sfV9mqtkd/uszHz/4OU3jQnPNeEK6LcDQVEfkne3rS/AjfcHP8 +823swIxu1Vf54gnXT7567HbjN4/cMlcelv5tQ/xxPL1N7O//DCxTbQciuR0GPRXNKFiqF9ePlLtV +bdcGQ1s7kUadkL7e7DYJ8AWUmO+ywj9AH5RNz8QeISlbIcnSLxAVVW6bWzB2IvRJvLzIZ8k4Hrxt +Ver7pYSgnkw75z4shhR2PTIHWuZ4BmR2W8B7k3DBkgq24aRFjAcZV6vhlTUJahpUJQ5ixqcjnxNr +UTSlI+TZT2NNU7+Ax/fJ1xIXcZvnLx5L+MDtLmieRI1DywomckCy31o6x5TDkTeqVUCMssA7SyiK +/Tj++B/R6c7vbbqjSYi3AQ8C051ZXb8Z2Ubdv1JLCek6vh10jV1INbBqYCPaH2n2/mp6UctN+q/j +arZoTopq00ZnVRlQCsbQ3YB2HOAHC0iJWJgoybnwqTqVa6rYZpv2/kVHFu/F/Owhfg6a1bKrSRCe +svTH6DC3Xo1OBzNCfa5SZxiKmWbY6qKD9AL/b2v7FPZjy2IhLt0LXRiogHvo980tVMkAzTh6xNlH +U0TVnmsqe42+3CVi4jT0jqMrcA1VOk9zOmSVty8h7natiYmqI1EFCgv9mKPDEP9MEwlXq+196w8h +Z6RQqu8MPWz+OCvQ0vUHNZXaTFADPSfb7hd5qP7QRaTF5hDeCb7jG8brXx4mF2kGG5zeO4OfybV4 +YKIO65nw5/QPGrMCZmE+DDVey4w+LRos+GPGhoVA9FcpGQle5zjJ+BSR+oz2q8L3otqYRbmMsQCS +vSwiWslETmix+r9/5if+x71htn9E1d3XaEMxsxUf6Rz0Xpq/lov0kv6YA/8dz/N2x+pPrQHz4TEC +XFDC2iZamnhDF4CsfquLegoGUiggNzpYunpDWuxrjoIg3IZi3EI9waGW0oS8QAABLNaIOzHsk6wS +1Sao89UNVEZ1Bv6J60aNmyBkYA7kYXxcFGTN13NUCHtGDAI5xEpffoakY3dJYPmK/pyMDHKzfGNI +bMKwvKOWxxXTi1fK97V3CkyDn4Y37KmcDLX3NGcRcF9j3thg4URJ9nBXutlTfyNns/xQHRkQNpSv +1BBK3Bh3u9J4QO/pm3TUb2rlxLMwK++pXlZ/IfL8yWq0htEx5Ea39GzfrUyXRwZicMEBA2X9h1tf +m0YOA7WncHF+o9hSPJOpYXDkxcPO6bYVC0nGMocE0Ih7ia1Qn9wnWF+Y48RYOjAUaw+lwCC57mUv +n1KVWFIozz/yfbSU6VD3gH01ishcdmdmkV5nvDv5sMtV/kD0CBYQ72VQuvYhjXAJKK/TbpnVkN76 +zzHycRSQZ+yoEWQBVJ32SjpQEGXShriAEB8aQAgsW+vlcsWiIG0+D/UIHwvwaqBfighBSiblsIKP +p3aCQw1kCPzaXHoWOS/pyz3EJ2abZb5dT3vrYl5xEMS42RASiSAqltIvwblb1FJ53vHdpDB/xjW6 +eHxp1A+SbeTmzA7W2SSDW/8CsJhpvyLbnb/vpACJQ2DnePZv6kQEg8rU6HnIta3gl0le1hC9ufju +moQC8iG/kWg8dBapPkDTvDjinDBVkTEQpZuSQZG9TfpsyhDQh9pk/7jT/az+2QepRf3yFt4ye4qt +PlA+NaB2MHVoX/D063U/Zjfw9upWxmBMUYQbOVK1aMfawum6Dx2yzlvOp4mNf1P1sj0aDAjNNb8U +u7kfQo+y7e5AebY2diyJIR38F53j8ueuN2aQpKjQwuWmSW4IYhz41jKu1sYMQbY46oW1hdHuoVUS +xvigCWbs08m3ARx52fuVfcYXYx2096h7dQ9+UZz8ul9CT4Z2+H9yW//9tBy/QVI0u+t81ZK4+3Ik +4IGEBwyXUh92yq36xxg0Qbeak6tV1aIPWY2TzJDyPHEs6nu+Lig0Hm+WBu6O3lDpgeWcFreU7P/q +hXRhyfslDtNY/mIXfYxeiXdKa3IkOYoKL8fqLKW2JHXhvp5RVRw8GsQQ3ryvV+pj2hKLj1qGBoh2 +EpSU838ndVxly6DEtKpSxJQaii5va0eHTFGhq1wg5K1i83aEiBPGSLOX7vZuuWXTLAWSoFE6NDR7 +nwMlue9X7DasdOikxfLNLbfmZT6WXmSd0HyHnA1XUAWT2kWr+KciBrhXJCc8oMgjZNT73fprNn0B +3P8/Xyo2CsmWmbEU5eOp+HKpWddc0SHuH5h8C2YpwyVBYCwDo4zvNGXQwGi0f0xRsuNnPFfNKRbQ +puc278CwLW3WHQHAczicW2w4lBy10beTLmU9uqLF6zzAxDmpX5wtT8s5Q5Ow0WohA2slFl2lscGp +kwXhaFZIRFA/Ct4SAyc8oFstrTs7qdLLexPPjOVTDca10O+t0hgYQraxuL2iuEHMoMZDWbHMF+Oq +EFF8AYjcUCRDXjPsYcoY3ri8HxOKtIErvG5tmz3+x83zGRgTxWcgQFwKlifnWxNNqYLZS24HhqAz +FHF5RD++w7nSuas1KixvtPsDZn/L9pxRWnyKFSRHre4y2l31osB7AHd5Wa87diZGWSecWFFC53cN +eJC33nwRZgkMxfWA6TLMHwrDUye2J60JzcOTKxylQU0RoGuQe+o6iT2hKm5sg2JCWB+wnAAJzW2A +ESTk9UwgrIRBOgllA/gleEQ1m195EW7N8jyUF20Y0m9HCH3uZ4FLzeBSIjfW9Uhjr7rfaCHCcuiZ +E5jjL7IJlyGK8kUaNj8136JTZV9/W/kZehYCAR197N1qnlFW9hae+zemvjNErGDjk3JpYQxhQz5F +OaycRiQxbKQDKdL3CyXdvTi00E44kj5Jn4aQvaV0rtQ2pOfw+705Hx17JPmKH5+YrbI7cnnpFjwD +sXYoTKIU2EfZJddLngz988tf19OkglxJnM2CZCsOk3CdX8DjlUBwMsPZ/pjfrgsUJbX0NK7Zyqes +a/0kqwoob56IHDljDvr8c3Z9fNItSbL2nukQ8hxtGr9ULSgEA9tmh9wDfPN+qRSTdx3hMgGqvFXb +isjl/LV8c9EW0nFPnigRzMW/wgcpNQ9DajzwArJrBpU8oF5UmC/OInvyS6Boz7Bx4YGSNVemo+IN +BBvN7QWtaATXeVa312MZ3Zzas+LqLbmlLPF+l99+K9lu5CQs0Pip4kvmT+9XtrXRiNmARZRIyRBx +RiZF42pF0V32CpE2zDxIz8sxVldg2u9Tm9nQ2qIVWvmC/Qe1B5bcbxlutj0z5Yybtxo8TSifz3pn +X1U8DmeJyFyZ3oN6ZO1WO9jTfgW9jehGvI+r9KiBdKFSDjGHBr0xXXY3LyFrUjY8iiSxNoCNTRPd +899hGsThLQmRh5qjUagOVvZnCra10cJkvSTJ6cOwWvFMQmM5v4DPhMqs2v485OKvn3Em/5l9sQiJ +VDEmjgpWBDX1L+20/uUFzGTHhwYqSGCqIxaSI7Kld0SSZAAlWwxObDaE0MthW3jKFKOZlxQEIcE9 +vR3wx1+5Kgwlas6u0dEqRu9mhlyvIKLSoQsF5RDkL5OJ1y7/6oI2QYuiPXthPoevdBedPfog/l1W +j+1zCybQU21vL+oKf5d26PpP7jlzEvq3pQ1lhgf6R2XsQ6gAz99hpDgd2c1cM5XzoZjgR6ekNIyy +1tzC/3VXqkJaFwjsw5qjKbE+5osa/Zb3gbmKqAfSGqqoYIWtnQa34f6GIhbJ4IXnrlJHMDwlsJzX +u+HJhrZhp3bKKuDjpVxARMTAbTrucftrmyq/+REuG3QYoJMuAS9Ls2OkCNprcbRmSN5DjDXPLxxu +wkqIQxFIs4yfyrFc8Lp11nyMVrtiri7Op7jowuvrxIR9pWIzf+puwz7T/knB5l60UoEHUL1m+ZuX +djvl+j4tOG9OISEwS74tckYlCL/SrZwamfV/Hv64CAJHpjBGpvc24Xv1O6ARL1ox8zY9WfcUwnsZ +WR0srvHRfNltzTbx71I4mxkSGma6sSyg1gTFU39tQJCQdKdQ2JLQIgFz1q5SM+q14j3dGt3xBb5Z +x/e31kbgsbO8wuW3kvlmg256itjdOdErM65qm68fo/lALa7/4za8JYV3c91wCjDLQvwuAwjUyLBy +p2XkwERgADK7rkmXv5jDVWNovdEMDyrzKcwaplXqe8qib/CbgzXOH3a2p7XWYTG0kQtluZVyeQTu +PIcmxem6xU9YbA+Lu+5ETJhaEg30Y3tqqflxrdSe7/w0MeHZuksNALSaOnmdAul4MX2XEr+E2h6P +LQsZQVZRU/J7x4y26eqNt9TWQb4aOC0Z44vjdFfPKpkEd6mXCrIZxZk4SdBjOJrElMF/2ichgvmy +LThND65mWnI/Lyl0cFGVLMz6fgYZUfIzLIdYkYpBr9JyVc54ojL2o/GINCT+NEDRLLXCv53SVVGv +ThgVAYU+8jFNMMejIYLNaVbtEsT1pWCfevZh/393Y57dGySxDFn4RFYfJn2JhoCBwLNsxpTLOjJ9 +fp/Jr/441jUJ7VUPd9uhx9KMe4MAjiJHfAhJthLVr7n6higs4t3y6VhUSeywvy3TGqZx12ajN+sX +i2+zBMp0JQ2llR3XPa7Uflo+q+0FzVcs72tXdLuQJdtzthnOG+/fjwHaE8bZdxTS8hueuWZ2gBDE +wI6PRlRtewok/p1cWOrxpX7bxiV7hnQ2OYYYRqjSLwEmCZdu5cTLXyGBG8KE8O648jmA1Te8iVJF +wJZ4CTupLm0L0TmLi67Jdqi9B7Vr8cbohCPfhN5pFJhR0O/5Hs1iRfSOWr0IoUzv/81jRu0Uakg+ +PW/zTT2nzk4kpQdOWGFmxADblH1BBPyFGfS+FGT4eEAufez1pMFDKTj9qGWHvADKySMaeE7fwlFG +yhSfO1QL7JADtQLKwLAySTgU0hRIieN+ALOWJ1c7f7kjKxU5aOJDltVl6t+5xyckzJh8xiuU8I9H ++Oru3pfl61QxpMFiqlnLwOr89Rpy9Cm6p/UHuNMACmhbYS+ihmWDVY+6dtLdjI3PIRZhzhSFy1P4 +tjN67hf8eXUf4M/BqztIAyxHkp1vH9Mj1SiEfNimAOyjV7jCrdHKCxhXX+/+WTW5xHYOtZ769LMa +Notep5nNLpEHOLAVCyaUbc09SlpJKIdKIloE3pcWxlZkk8CUxBgzJSfE4jtpcfh9GOe9ZPsz0krG +QmH+7cV0XAqaL+zW4LWFYFRENY2qJDw0iYJ2Da3nhlHjXTPWMgS3V1xThqmsGlEfbw0v/e6lJ0Hu +Vl2m6Y7lNCOMuKSHo1FAg92AU473njTjYRiqT0GEKGXPeOM4Km8SAYzi/Kz2mhsCbAdHXg7/yQ0R +mW4LnC+DhS2RPZqqDulD8tv9szk0QKVmMOPGUwPp6MmpLJaCyPF4SYpm5FrE1pCnKmgZ3wBQe6pJ +0wDjuAIizWfitSYtz/+MZvkDdYbyltiZMtKqrI5enoqzgOwoZNanoS7iQine4jFF7ldGF7+wsHvT +q9BacIxYCgc1w0sx7PKERVbxSNyfMQxD+mE94YTfk1SExNHhPCx6gZ/mOjyYec46ROlZQVN6LOFf +CmBiiDfWxeBVNGyclnnGFiDj3vzFQAPkE4x6iR2onet9MmNO8RN2RO3FtWmxmjA6/TXGkazkg1p2 +kSzoplTi30vMf4vCjxxfXBpUFBs83jiKsIOQ6zZA2EVmV+pBpyxcqJKEzKSrl56shtk4ybaut4L/ +l2weTd5Em2Ww+SaEZAkOUyK9B4Dx+6Jn++W0d86H9FY6PJJpd6yqIycN8UMKZA2iBbGITDRVEopV +mn0iYmAmKMDtQljx3qE53TRV2QSFs5//vpTjDdr+3IPhCkCvCS9/wFK6icjLvSJg5fRwgp7PGPn3 +8UtvGvH/+wtKPwoU6z2kgF/2hF45Sx7W0zQqXaY9h+tv8cKrLRJHLN+IIrCpJnmYF6hySf6SDAi9 +Vxzbq+BWWVsKr0fWKIfA/CCEE6xSGYbvxo9leUXYIDwnulTs7MTtrf9JpsEfWjbFGLqoTeJhE5Rt +Gmm4PFvz0zWlArmp9k5znLcydrBOgH4BtyNkMA4Ch/eGVdmLjHRqvEH2l3fOxrV2pif4ipI6vM8M +P5j43LkLhYXLEdo5XPCgeTGJSHhlBi8stGrzOTiPjWKr0qwBIF0hZg2tkX8yP2a7Ky8q/dGJtIIc +xwZ3i+82Mj3SIkEvkjPPqyyXJ9ImDQ2Vq3GwNzvlC39SdN5QAn0uSYGZX9cyWh/qX+Cf4GW6YYJZ +SqRD+vU1mtikm0PaM+kWkURSVLWCB++yMm+FS1MctKdSKIsFxZklc2bDgiwAN+BpQbtIEUBSFjzy +hQSAQ95OmTI8fAk5/awhyJN9BTNbAO/DKDu0Jl+8kFC+iRyQiS43XrIkUtqMZC78EvEul6WRD0QS +waP5bYQiwPOOi47hR0dKV6x3k0MrRuABn//HYeNjzWLG05eXwS0YFbJVaVXyo8MXb33sOgZ3MaLP +TrzSgvrt5RsGQYRzYykiAzNvIDwkgMwucvY7ftEbK3+Xi2B/MH6lej+loLBNVC4ZEe/0oAfYxgME +uFgTBB/tV+/JSQTNWd3sivCy0qVXNn40EHw4FiIHaKvGezOensc4AN7ofGK94r58L1Pknlb4MrEy +PVUrNQ6k/YfVQtvGrsIPkydhVLhNKrlIhy9mo7RX54Mo9/3LGShouxt4hUiBQgL0oI2Yh1jC1gcu +yPLCbPlJf2q6Got3Xhv1WfOb7HkptyBVJk24bLDy+WYSYfOuTrKZWYSoi6VhEY1QYnQNS9MKEJSQ +q88PZdOZHVXuPqctCWvxWt+Wn6HYcxzPtaNetHgS92xtyLFdVYf3fajIVgj5US8n8xsiXnzJUIYm +ma/2l0komY0rjxun2YjePKVQv+E2sA6XVq+8T9odg+Z2IdKej9yLzdCxpa2X1IdcxEn/sV/Jubts +vxxOHpsgLGcWzeTYRoA/ptUkHmdyRTOJPoag/5kfNNHADOJzM7vrkEKudk4vRLLjjWC29cys0voo +VyP8WnWywsZ6tagXJ7q934f9Qsw/UrIxB0vKUitgmVarzKLP52UOlyKwB9xtd96Vte8q5aZNWenB +EKcpQiiZL6EMnQE25MaBY9eQG3YjMcusThDFrRqlR5rmM0/xJMfDOirkAKuHOOecdExjEdBMNo3A +FJnt3bj3jLH/XiBIhxt4STM9euKiEYxiB1zfwlAOxBbNyVbz3/hk6S1G4ymFyfjZCOOxrZmsgBM2 +awbmlWWyRKNcT0WCBMO2q5spYkIo/Do7hTtlMXlNJACb8NEHfF0xkDUrN7opuGhsV0JYNpUooVFK +wrwJObFm/5NbjJweT/LpNdUjQXRIR83OA2OpltsgATityVlWDlIk0/ubOPHn01HpNEv0NqtorU1L +ompmRBmERxpgFpuC2VhXd7q+MCG6Mftags2+BBDDKHb48C9IGxhXTAa6AmvFakrivYzbeX3pDgQK +eYCJcNbXocP4ip4YDESulnwPciEGxhcRI0oCeHSNTkmDWhkTesszy8QdP5u98xgvFxkQYnS2PgWj +oa+E39XWATAEr9GHH/qkMZkqXsjTiDFf8jp9VntJ3WsV0r+Ch8LcCoOv+Lm11QYn79owJfOPD3K5 +sxcG/s3F9LH3Cr3dPSsSxM8XlILMg8vgBd41RshdmfKClHpiArhIhzOfrfjkG8AnygSF1jEVNMKs +QOVmgEWgKn/+Ec/zQ5onsySBzdPJj7ln2QDOgJQPMMN/jERJJlecYGLjH+K1qiPkGzsZeEN1pEC7 +DvlKZ4syQNGX38UWr7Ane4l/mg9onPT3sSkf8CgPirUDHQfPPitOBwG3ECX0x7/4QgcVzuEKVWzA +iXrOR1tpRJJwPfWzLAeY1eiKWKviNSiRylukppGumGmI0Agrj3+XahJJq8TljRyasq66V17js3el +0kU3W9rvTWmvPaEQvsF0QDPiNDYkV8C/MsiGl7fWUmtvzNTkLg3PS7cfNTUoA5nwmhfuO/DTuegd +XNQdrCf4DJdgC14hK4vOVeVCEqz9eXqCLGJVyMbHGrgSZIXBCAsAtxFpab+pqhBzfr3Mf/NGnhaM +CL/PWXGJLcqCY0707lqBfOkj+EtwEMO31ICHrfvE+dC4pb7/1in9sjKWtJMYqdFjfUnKuyhRAqkE +sU8FMcBEHT2KC+op/BbfTxD58qgT6K4gTfJ8BIQimuB8QtJoZ1l0iw6ZOfiotaXBuwHBPs+xbgDX +DuSQWOyPXPmKYOIqTIA/tOyoc/6dIHz6xCOtJ09JQfhxaEo51IuZupzsxghcfe2HLIoCCXEVjvXQ +DnRjQJ+RiRX30+a2N0mIN3gdjgvpI6r8k+S7vmB0dJQFAH5ConhCE/1/kSA5ZrY5HXEeku+2qShw +eJb0CA3a3Y6zi0KdhlSLfvm22QiCAeUBAkeqhRuZXAW5CVK3vxR1DyPR+q8U7mHpGhawzh12WbvG +ARYvvtTL/wtkkACFUbOvoCKcEnXUI5DJnyOFawYI/nF2AFFsECqdYftRli2DOVPthYN5cqvI8vct +jMc5ErDbAPjMWD81fKuOx/FEF/aC6vx/NRBZXJpmPYG2eDx8w2DdPBuls3Og3rrN8rnxpqx8l94n +Ili1i5ryJKzPP1iGYp5oc3eRzhnjYSHVKM3pSs2iZ6cFujZ2gU8EmxSWWtW4JJaxG62MXOFg4lqE +7h7HTR1YxlthzsGPmg4qjUoi0GdQKtj+a/0tkPdMJrNPMr3d45nfrboh/J3S6q58kvkNWnUlk4Rm +KVHUVYwvxJNLXdFKuPTHFODP5gIf0Ag4NC8qvw71JOaW/L9acZHSzH850TW1UsVYZY4yxujHH/w9 +6xPzaI42JgKMzN9aAFhcLmYJOKHi7JrE2J4bxQbMQwSwkJHiOlt6P1gU14SEl12zpS6PL+FndPwM ++quRnS9WgrTHm+RgkcycgAnmezmWicxaiTwiwwTGlVbem0hYpsFW7SPPMILS9kHrDYVzyOvcmdLj +Hz3wRS55vCddL1US1Yiey5FOlhHNxYx/tWeODfbaUn6lAqMtWetHd6Zrm++0c3oOLsHfeE2yHUF0 +Es279j54yUu9QdXNO+idIjtVFxmrWDk00eHfkU85PGOJj1AubKQWBycuTZa/YGPQpdypebrjWMzy +v/uF/+ycleXxpHzu1FGxX7gTK9wlaVSaIeExMO0PjVBvZPmdmjP4O7yt5oTSnNxSlkybATtGHllx +7kmy70Ria5noqIcPPIznNZIbrCLrrWOaPMt30tkSJRQKFFWcafNNJxA/1++WI/5ZVu1j7LVvHsdv +Z1BKPifTm8mfoyqDuC8tPVMsYOTXemUqwqUfS42vDkK48T+1HIDOJDzKjjGnqImGNqMIpkj/Yl2V +pLhhlOzcjdUxufcY9GYeqHpj1TVfPZbuY3ZZSmD0sknuiE2oBBGRTrlzfpjH7oeHgYhmYL5d23Ch +5q9affKDlwWPsNeXkX2hc3szRwJs7lYI8faLkPKmLWEJ/fH6wwo8dAKBXPnrFPZYZaYv10saJS4S +bp4UGMer79oi58FDrj1BRPaccfaz0oPm0tXV+5hGoFUjnmJ9XMbNpG3s/HOaA+N4R7qB7wfY0HjA +sAH1nU4EPJGqInzE7Gck6yQH9CV7EBu3Dpf0f2KW7EHW89ZGfya5FAv+Jbbrb1Xqh2x+1q2CsLvR +n5ND1y/IRUHxoXpKaEtzDOc7LH5lOsJyZUFM0VKaOmtUNriAvLW3t9nB2UzoPrRxBvVfRFBDMYX6 +k0HgDx3c0mzptYdJzMBK0u0jDGKWrRBLpfNEvS+GP/HJRgGOMd6Y5qhL14EBmyglc0x9f/uR+/dg +YxjnpKuNP3wqcEXcwICF/mVxCWcO9q2MyD0t9LT7xBXFaYltOK8K8ChJl0nvPzoDj6TVWutY/tUv +rrxiyyFScgwHYpleO/zUIdZwSWGv1vWlMhKNkeb+/XNB6mc8ma8cFJ+8NhTaeUIJLDlp51rnnAZf +UyCNBAU7STgRyGGwrgF/wBUPTDPDDu1bt7C4QP3sd9vVOARQTnVTl4VQnumzOO6n32GAF4jpGxrZ +oVxJnuOnGMyl0Ciczv9i7lsajudgqxVV7uPnaVLrTjxiW8M3DPT1ErDWbnlNy0Q34/WoCuf7tgdx +ez+SYxy5QTxK2lXNqiOVMSlwoEmpn2ElWUFsULS20UsI9bgmkE9McVoV8m64Dw0M5CN7hNPtEVGK +mC5UJCyFrbJBaU8W3eTW0naRICYo5HQoFaqET2/tShxOV3LntkvZQ16CMxnAgQ7nsNx0HshDbikj +xIpPIPi4XCfgB46EnEoRxpumMJgHqDO/rb9OvlLv47+1RG+cLkgH9dk4xBBUbY2/UlQVRaFWy1hC +kohqMA0xEG5jPzYsIU2RULfXm+E5K01BzGZ6mQH8RreoDBmaFYrLKhDUrQuS/l84Nwq+iodhxS9U +bWA2858vOrBcpdIoNMyJmMHpctiXr/M65x85zMDj75RalltIVBNfuLTi9OMZBAOfdyx/R0ZfBE5+ +qeWB87YG91MXf6ztWSClPR8ZN5PUWQYb6KQcdXeFC3q8bt6RPCLKCIDcwgyZN9qsgX4mA4OEKamw +8F6CYms5uIz2NPTuqIK1popvyBZbEq1M9yz4ouKjzkWeH6szwOS7pClVsWmV5KGTUs4c/+bSAWn4 +cVyLfZotvhrFMKqsvqrfbJsikd2enk2Kjn+tzYzgvMEr8HRq1XiXIu5hUCS0IA8vZIuYP5Wvf6vG +mP0tMjzJdU3AfLcuPkgKE7q7/jC3rVKjhm/+zcIVdAbj+6krLNHA63DtCPFPPOx+jOUMwTx4xuzx +kykN/eqKSYjBC9aE0uu3FtBOz++KNcCp8jxVdIuMdGvdzUSKAq3DbvDwsRzlb2vPf80Gr1ICJatH +yO6XFww53lN7JJMCYW0ZfVCRZpZseUNMP6+x/5Ha24pRrYgWPeWonhGxdEHtW0u/JSFin1LxKOqg +z+WFYV/U53dEq1fzcQf8UnvCDlrl7Z86DKwL4L5cN4jy5UazGccexYkI0SWUW/2jARlwIbUB6KN8 +cnqcsLhVzE4EMKLPdUhhk/ceKedWhB0NdkjANNWJHTYLV3s2ohFPgHbwiIntXrMkHJTF1DXUWN8K +gSRq/qR2Xzh9Yam37VK0rmXpmucK7vsTkMlFZrbmZshlir+mPGFg84ECST5O0hxVsbmWmfQhdk49 +3olabMLvvCwTqN9tH91UdhJi/INdn64wLoF8TG0mQaT6wpqIrTxdqOnaeWam2sI5n3kTXQurdDhH +x953bCtcrpSyDxP5wuYxOGR6jIhE/XQHPkQ1goG1QNG8HEeqa9orPZ3afyPGYlhgAdaYt5ZgbBf3 +J4qH8/5s1OhM9KUc/oMDTZtZr7aLVgAgUf0F1kFhqgvQeJ6VW6HHFbQnT09AAcfZkqYJ8nVjuYkZ +Q7WcLFgoWSZTUf0Mg7q74K4Al2Ks3UBXxX01hPFYs/XAlN4HWr15rBGf24PokpfYTjlTWmcf6Boe +k/DXfO0OIANZZoWHGBKLB8echwvHKmIWFs+Od5CgpftkAWeC14WGiFT4/cOlQV+m1UixshFZIKD9 +y/qGq9dMHHB41oHkqMpwl7Dj3RAQTq/ZbZqgqRanNsf5Kr+B7WOjExjZUCjk15K8lrQANZ51y1qF +Esi7/39FtuFovA0EhZLW6l7u7+biCtM80nPW9tbv3kL0lDnSfYYtcwFdVygXee3awgBp7nqceSqy +OL+FhiHI/kOdbHdZ/ANljYtzGEtgEj5pHhaNPlnjmlngjoi2XcC0FfNRtbjLx/ZlYc/01koi+3Uf +BizFHgolOZNU5ex+oFikGdv519iL2vCc3Z6LYuViIWf0PCx6ONQe1kFYTRKwpdjck3ZXWf+C7U/J +9KAv0l0y69V5Y2MK4zh53O9i8BrVkFHaB5BrL3dDwGY4M9s+59RbQhpQ2QUnp7/3kTE8BfV8Fumk +QvtzSZt7ldMjhJZaeYisjdnArafyPJALQg+o9MTvbOjgTMDbJwi12eREc71MG4ZUet04PLnaKx1m +VZemsqUcAbJS+Sw+poqfdzln1N8/uzpcU4sqlpzBXbuFYcQFkmlPvWqgu1IWDCwES5KS9QvbCwrU +mgVXmXHYvERvck2ZXMrG1MRH+0/fW3xjF/+Jq5wkkkLIyhJkhUSPjMyJnWoN7fElE7rS79j5xDbP +tdvSIOPjBqTuLUlMsG6hU80mnQqT/cBYt08r7CFZOZpK8psr8DuZQ7RRMRWV6Ukxa6McFm1+DvZ5 +6C0+wAJ26oC2XgqcAI8mnM2GjqpL0dwlxuzXZhDnvhD5wC6GEqwcvAMY6qpTt65A6dcjMw1KOcxf +7/e2huiB2mOfVxw8c77QU1JXgcKhhkz+6Se/Pd0Pl52GJyyK2KyJClFEhqDhcJszwCCAm6glHHlx +HPJ9ZWGI9h/lytjiJwjZYJnqyrZp5crbrnfmwJafE4kfqHNdiIzW7vPMvXIoOM8Zn2o8adm0Zlk8 +cclhafqf/4eowwzpBLrogozb3d8p9CQUrPwTpKqpswvcqr8fJMqO+oMqE7rvPscdKdLJDj3RHeR9 +ZOUA7dWxc3sXp/H4UJP5gEn5TntKcZTVOmGXZR5J8IlxhS7jb9s5vDCHcZzL6Y0iyJmLUvQ1sBOU +irPlum/ORWuLifmBCJyNj002YEnmmbhhQi1Dp71QwKg3hC8cYxQOmFj/zg94BFBhIl9aBCc4nu3T +OMZAiEX/uhEYg5HJzVtNArrQbV+XSg8kbjw9vp0uKdPUla8O59pbqDZhsmKUrX63vZe1kwlPnuzH +7dniDkN2dDpvo7bZlapVMejPF372WmxjlNU98LExcrNyy9p9KpfvFvqXGDOC/Ji92s2tnPZzU7+O +I5AJ0i2yj0tBgslSePilaKqknoLljqMZM7w5hq+KXeRQk1AYCvteYf6jvIjmUl769GhurARSHtMp +ev4Aqf1IHWYWbGFPRvEpCLXfNUXgRMOoPi19i5y9fqVgr6AAy8XVHqqEMi0Bwoma6daKupUz3LPv +jMkR54nUpn8Dmks6N7KOUeqZT515lfJkTls1Tm4jxD3R9p2osRUKy1e8mEouSZ/89V3lb6YS3UjK +81piO8n/sE91Y3Q7Wz7JR4tr7w2C9MjoTWKj/ypP6l1/5sZCSkp0k0s2EB9KJNxYH/34lJf4s59W +sGDsks+voRrmuu2WdffajtuQb5w8XLqFNp5EEI4LcXo3cRebcVHpK0lCciqRxjYnCn1xAYszbIoy +aeiZ8nRt2Rt66rz8McXdJVFlbUF9ixvTZlilPwoKpuI+4Bn0bkFKgJQsUWY87+LGzgcm9Wvj7AGg +h+h144v8R0evbF2pL+xRRZzDeA9ZFTkbQeX5UpKMaxmjFxgZwJcoBvD/jlSdhTFp75Y6uo5PSCnw +ezo9aPLr+bifl0TBkMGMSjvXQUHSTYa+9J1QAVJZ0aLtVAz1TZuDxxpM+wHs7yAM36bgMvejmA1c +Xer5kHQNcDzlCeKhaP9ppilfUUw8pcBmC2mkSiSCD41aArOoSs3MaDPQVEq19q9kAMdmGf5unTIH +hJbm22TtF2o1gbXEc3CfxFv5jlz20ZENilQM+CJ6Ls73PDQaQ0zqpgiOyvb2DnTeir+8UMuutXcp +e2kGtDsTAHy+Z325c/MVIq/jpOo9xXKASFVv106LHMCReLIrIlwcK6QoM3NMXGwbi2aJotp7PiDU +1vhs3QG0dqeDx/KUEeyfczxwj1sMqyygRZnMudw7MJbRrDbhkkW5CezJ1fc4Mcek+lO2IiVXY2H8 +rYBXLsAVGG938pdIq3QByoEG8iJpRUrBRXWvDO6+sXwofKY28XCcw0OIbi92w97oERprAzyaKZcy +vGUCX7KCnbNoYL2xPI7AFLNgt3/nOz8gxkHIxWFBqp3aLi9EIlJrB6bleWJNfAwmTZc3Et+tF4xR +N1X/sshrdkiXVIypBBgC4rAiaI9BQXTeEY6X5C4nwcMFpXzE6B+kzHLXvoTQVgudB9/4M3ajNOq9 +UrhK721pa62KPWbF5v6Dml2LPDDowtiNaHMDeHbdqUqM99/XED28KcaXZqCXHa3SJNpkxtp1S0MC +9jEw4ZSGXd+za9koTIJCaZnFBXZxqtVtOf5OK3tYAnSRsJqM1yAC4JKDw2gM1DflULDcQb7KmQs5 +2GpC1MQvps8FjEoXxnctAsO6Pdnb10mJcBUJvqB0TAdjnEsHUpqm78M+mTqR0IHL3WwV6gyssW5Q +JCpIT+I6DPzGMPSleCLvBTn6SX3ZDqtrbmfErwwZlO4M+IdNUIQP5d5ZpjmUE+gxvAH84FRrA1t6 +PoiVL0gp4pQrm5SBoBkT+POiMUPDmTKe9HAOlBWIJEIl2PhYzqw3gFBg+aalvbKQhiUP0Ve/4YCQ +DJ/vS1I8tHkrLZoonOIc3ZM4U5j9XVT7IY79f75w5g1CgcC6SEYiY512VHj3q4WDZ4AY5jV+2N5L +p8w9MBWvVBjnf9zIQOa9Sru9yJXdrQD0g68LlaYg/ylhmekUkh95lrwbdwrv+NA03bItN3Bs4QwY +XBxI2FGtvaFx5KKGuStbjyrwK8Iu/N46KGN0uXOFqviGa9M+zMBFsyJoyCJQP64g0jlcPj9hr+ty +Ru5Q6vkaRZIuJ6EyPwkuLJLM6f+PSgFIY5pwSPq7teBBVQRgyLFEq+Y0ycvNnKqGsC/Jt81e6mLt +Dk+QregLdNt0EkP6gLoxg2F/w5pg1SBnIRj11yHoAvGxp4KvlkIkuySmlxvafytDcgtFep4xQtSS +WFcixie7Ea6YsYzcoIAHtm13bEKedZdQ/s7cmQjwfe4ecc8/LByRsw5y0WnrG3D1M+Nl9Cc+2cBo +mxiQ2/0jdnADetLiieaPgvXFPV9YvwWB/b/TuwyPBhrE7taN0S47zN7NJu95MU21fmRqAxkw4Oai +6WusxaXcZKVOfRidZWBasLSiJ1o9IgZOsH3aOpemMiSxeTfbDE6JrsRVVVjdN4UQg/QClwjUC534 +W1pN+bJatc6FRRR/Pp9do4sjdqLG17gqJ7lnTiD+IE9XhmDKkGn4Kv77SbfoxOtVk2DB3EYuCb3Q +5NDhmC7UNNdGo8ZcXoxqfxGuswG6wK8qfIIJIfBHBgey6G8r0LuA9mZqHrkmUaUbedsOo451pjOk +GEljjerC8g96chT6UCgKYpqYMI4mGcQ+ZyKqCNzS49/CXSj41+ALp6VREnZfHCOVvX0SUL3kjnEB +is5YAfAZ4WwSWjA5/RTI2aR1qrYnHkASfqUyqpVp1tM66qbmj8ovs6/rckB/wqh4I8y6Mev3wRgp +3rXSQ2XIQrBhDySeIH7PrAfJZbZAh/5pAZXsTc9IksZqWFebaFkTNLAwgPr5hZHfZpKBzwxTsYdG +fNcH/DAipdH+DCsrfVw4jNzw81fWaFgCld4zVygfHHxRXzEiJ0nQP+cof1nPTfG145SaW//7w/U1 +oq06U1233q8ZCtHjvDnhgolLxUplJ8zH+ihqY6rLbjbb0igRfTBCUbdegIYEqWhnmC6R6s9vs9F6 +onFK+8MhZLDpfvBgDFtqywwAGMSJmdrGmlENterliBNbyyXVYt7x+I60jFglVgokDyhHthi46nDe +NTQGxnb6mCuYdkJZbnNzRUHVjn6tJ+aeNspTygZlyk4DPRAX3PBPsZTss2XlglwCZcpbJFKt3jGp +2Wiqp5P88xUjN5BjdNyJVfpJnVzte9RlRxxZkvnh9+QI8jpEwPwH9vMhfLrMxVP6lLgk0EsHvsKg +Oulw9aQ0oH7aF4+8KYDeCBHKtpK9tk+xddW81O1XR8atfxnbr4QOQW3ilT4uscHWDLEwCEgBaLwS +ZwXHz6rvFQTBJ70AFKLKVwPRSVIN5FptAO0jHGiRP0O78fuW+utMZn9WQ9pVtefAKmWl5doNEaOU +WuZfp6NfCmwDD0aBNTt6yFU3nABdlzkZ718uPP5Rac7yb1ZicpQK6cYqWpVCKNAwzEuXUxKhtfDP +TS4MQIHLAOe/BeX8P3HVXaz7Sq+O6GmMxVJxg7RahTrkKe0kOtT6iIkhqjd+wHt40zPol45SfBEN +34/GzGGtxnmuy5AWBtvCggsMexJMu6z9GrX6MV7d7dWNI1hRQDpvvG0QFDLKUVx14jf8CTG5sa5o +McGIOJNb/PNrT2kIVj0qbQv7tvqBF5WXZ8zTyPWq6Tijfl0c7CPbDR/frBeRL4b+WZtvfagA6j+X +YIa2nbsmXBivOEeqkC9Z/OKIgbWdgm+v/Alz41qkUJzmbWzDJj5sXh+JNfxEalTZkqndviubTFzp +zdfJl7we1a5fxuH5LoxP7PWqsqWbMoSkIGxZQdIVCZ3Yv6MQACoaADGRoq1xMKjENa/BoJrp2u6P +3T2GTlVMs9c/CJKuKXXkAS267yuI58IRASYYVqQatw5jOvGltXkpmJE7vdkOfgCy2FNo0Kmf8VTe ++0pCFtBZU6tO0cu/h+W6Xup7LI86KAUewABeop17toXqNQRCTS9X0n3Id52wlQwl65APR1FDYKv9 +YlUpPd8+FfYaPYSJz0FBBHX6eeYKlcpGVxjLkJsdJ4WMOSxs85J7Dolalv6fWc5DTq8AlII+ZWLs +dvmn+RqAznG4xj1AuaAq5xgshxDzOIKK9dZefHb+RZlfyZth2I2Jz/Q4OEmXn0GILn1GL/ED186x +W/e7CMraFUdCcoG2AaHsNAhZIzOqpb4YdDdSwRMxxw5CCeKUvBWqjnCKyOW3F2FIVQL49SWZfZ1l +nQ+0STk2wXzGsLhhro9pwwgGWQ5Uis7ODgIGyPcjQMImCcjvuCNAtBDSSkpcprcyqgFCFKql6JwT +4+nPttgtCkMt/zXICTbJyC6jO7+EUcZI0SjicMzg1SrhHDgehKcwiA37FcMWPLExbKwJMVwihDdC +ChtOPZ3m4wqMv89JSY7v7ju/TuJPOkSlCrL1z1e2HrCJFmUWLeL1Xhs9bHjsnpIJwPzfVohoUL0d +bQ5pO+emJlnYeg/8AMnkWjHGdW4MOPUkVagtvVkhh+k5SV5ASDr1cGY54tw+Ez8sCl1vEYNxQhM7 +U6jRjyxNM+7TPb2Rxs9t7PjXkcv6m3XsmeCDCvKssVks4eLpCpm7gL9mumiBKVIaZ+rDsQ0mo1p/ +a6xgD2/4xUZg/AaM0D+gXWrVzJfbEo+3lLupeA7lWs8KL1kRixe16mKQVBp11AHLYkg6VRvyb5sG +eDZYv0tA53QjDKl7/LTCIqmMBgM+IuqaAmaxFshDNCHy6GSA6V3IHBLP8T/Fhv0a+zEi9mv5tFbW +we3RPrGn3+/bJCt9kVygnL2CEGlZDbVHYUhsv/SAWt98QQ15KmbmDSafzCPUWu5tABDSKhlKhNie +nT+xlR7k3vIDua4eqUflkoP0Hbs1/YwOhmfXw/ZV14Jyc8ufZ8k4vBlG1UwTlIMkF2wAxNAnneIo +VaNTS/+xczPdCX5SRghXJ/98dvGGzbBc+dXZfOMIAWgz5GKv0nKsH1Vo2EKKYnImI7PzwmWKI13+ +BmkAoc1u3I8+yxUwomT8k29AIKCTD9CO4FG4AZeFri1gDZShOe9rAq8FJTzxEuvlRvusUYLHl5Z2 +HtPzVsjpf9F1u1k80lICYbTQiMafi032/lVfmTp9sgViQ9q+nLqcorVD/HgFrtX3kfcBs0QXo8O0 +cATY9b2gsca29diY5QMTR+aeP/e/EOw9YKXIPag/qMt+cS0JIcTUiOY236Ngv2etuasYchJNWgaV +AI6KWZr4Avas/j4OyOyBElhZ7FQuFFeQhqE0KJJH3W9r4kyqZp/xupfhqeVuaWvlkfIKq9pKpqNP +9IllNm3u3vaet4eeoPk6zCQDYjmGLUPefE64E833KXZAZHGu5oUPJdKG0TLCJtjJK9op0ufptxqr +y29Y1X4qC5iKWay1BjeZ+abSYr3K0qUTvTav6RedybPELzTdCoYG2y/sovgN33xZB0CA0Y+Idv2x +WlNV16RgXg3b353GVhepSdQ+PRRIp3Qkhe30hLqQQbdjRqPCpQKhStSMMcBLQ7vfLCI321BwJorc +GtlndNSiH2TwhfRWVcSED3VwOHvgbZ2DqW07bKMgHxhMCUvrlBuHZSK6uVnwt7crY5g1NMjsFy0q +RI7qfhtsGTzGyvdmdxHMVfPK03HDBF+ofujXStfLHCOSDW0wRMYBMgrJbPlXgrJEuIgMUn/BP8Qt +25UyaaP5CTh2d6yRCRuIPWGdHf3QbR6g5UYJx6vfbGIa+3z3uUFx5HML5VSGxeBpkaOtgqweswNK +OdMaVzTazepQzekkodKvRrF5jzIgsNESo0r3ZMzPeCUFJDi4YnRKpOOdge1uB3shaIjro4sl31MV +lJPKxBJYzVpftVYFHvGrk3Z+X9PZwPFunEIhPKDUz7xEHHjIUoUQdl1gGV/Ejteq9oqyEJtwe79B +SaXISSGgGZhgoIsoRKkcrKnPkt9D4Bv8+Sksjl0JTvQQgwU+J5LA8LG2O9PRhacMjGVPuRkCfNIQ +olEGimIUoyliFZYAhJHVjchun46pkl9d+RJxIIzLXTgpEMwAvF3kY4KuSy9YUKWCNVshI5t410nY +VQMMvG9s6rDJQ7R6m5FTx9E4sEu+Ca6ZJVrB6X0NeddJKisNrSpB0Fb8M+LnEpVxBDTJcz/SIDzw +28PY86axvPhw4y2QJT1PksA67RS3G4V+4wnSV8WPVzqueWh1m7q8Ik8rWSyR09LTBGpNc+1sjWZw +5nPnZUysEaj+h6KZH+E8VgpxCcccWKjo1BWSmUC+TkLubM81Nq/EdjZbJmyIQRzUTtQxl6JWGkWE +qyBN/2Xpj7nb2SLl0mW3c86j/ieJF4Tj2iCLxdR1BZK+ZVFC3rTrYWL9Mk8gx9GbNH3TjCeXz/uq +5NUa6tFa3zToWBVrvEeAqW0iS6UjhIjYJZ1ediTBtzD6A8BDNbyvPsBIRmsngBQ73QX1PJpPi0Uw +oDq3G/nSJ/99aTl7W5VwTqljzh6UT9VNUz0eQqBlPZ3mpVUiQa8AD7S33OyjpqnXgnGosNfg9Uu6 +eoy04qdGKdMoCaI6hBEbWM4ou4J/1RvJHZi2ZQuIJ4UptikMYPNX1cD+2tUcSefLnU/3d4DRGezd +0Utt6zY14UnOJZEoXGRIMJXXITEefcCU/ZZzRc1/+rrCLl1Q0j7Zgm4p3VQjVYlU/THsAb009hlH +o6wMFO1td5H8GYPeGgghzHO5Agc1NU07bPTJIVI2a7PRn+9vygPp4mkvzwTboKQhrnYM6mK6/JoI +t4dmpGTvKL/XfZolblkM1Ju/r5sSodwkVNIO1/24YOS0eWaxFSVWTsnBQEUEkj4gO+B0tKLvWKVi +7/+LIwGNC6JotyEp1uY0DgluYTplac9WFZXdSfLjGkt4iw7TSUv1YNj9uqivhYRme0eN4AE+Ir8W +3LuDjgqg8FwCvyM60JISWj08wAnq3+LFG3FzBC6wVEpkBiM4j73sC1pTCjPF7JxQs58/PIiID4CN +4VG2kpx0vCCOkybzbezY0IudjSmHZFP5eML031hqiayYHOI55u3IFNix6T63DxYBODNI46mV6Zck +yy1H90WHpBx82JX8u6QEB2DQ8XQJnKYkJhvZJVnjc+5tLM3hOWRsrldWNfJEbTbAZbiY1HwpYpz/ +8PCqgGA/G8tzJqSDzhEs6XPkWYfqbVJffuTwKwAQSrB+qxXENtQp6ibsfjjzT8Dg5noQ3x9ftAU8 +eZZuSSQf8qFLP1v+uj7jy4STfr5vHTYt/h9m5QlW3KohRIU0C4IVPveqSoWBqD1ciYTkYXdb6gYX +e5kyIoVOTMajqxhqnIeII/c86xHIEPeT9Gt6iX1IWn338o77BIeSLIldCtxQ2agc24s/LG/8J5iI +CrxEuhHYenhEdJEdpV87fe/S5o57A57st5Vd1u8/z9NrGlYS4GgtBm90OL2yomS/R7lwP8zN9N5q ++lnA1fm9+xS79mR84rMR2hr9tITYYs3bTa/1nOnA07DBPoEONlWdqXUYM+rV86FZDgVZkaM3YbtB +cby+i0sf+v3dWE2/7mhfnhDAyOHXw68LlgO5Ea8YtPIHdUviDnLUGAF8pz1LMKPfNb5jaLQW4pNo +TDkh+20jb/l/9IxMXH44kl4fxJSTZPBusIADVgRzkOtbPbybvITiEVWiBj/DMQciaiiE8JfVSjdP +4agb7AX+JsC37mi/oQy4LZM3OkUfV/SseLNeaa7Z2YxP4Z1R/qTTDrIhnEk9Cm7P6QiUxmiAHIaD +8WP3f+2lT6reHKIKZSG5Nfu5U01lp7+xkmAiu0U/UXrkuhGywUcYzAbPH0/yWaLBX26INNyoeCVl +Gaf6KiK8jTK2P4Q45mZPM3WmP8YYkCifGD1YaOeVnBHG9H7VjhbVY/7fvxlX0gRjTta9SLFDEWLJ +bhcLQD4O5UrII5hC4jlS1P2vebhh/9JI1cRPs6cBOd2rFG8riJ8/ALoR/tp1snZPUW/VG/0FUMea +oixP/04PxpnH39pMyCBBhVefDgDnsjNEYwh2FcDpJKC2nvRO84pAnZi+lRJbl+mDr6mADX3RH0h7 +qbKsO1zfEatf2QEzsm1tqGgyyM22NaVX8LKubI990YPyGo8Zj0Q2XLAypPv7hYksShhc9aWrClWF +5orESrATTNohLvbXQR6JvtLJ+EJBqLaD3Fj5pA1KGca1VZXLsvNIaVciPfxl39xyToUtkWv4z7b0 +Vu+/JhFRAc5mRA+1BcIyMHt83jgq/Uw4nze+rQRqEEn046EAcbl3A9AgLAnbOowFLY3RC2/bzdiX +4pUMGv17zqd2efvRQgeFONukWNo7nZwNw4cn2Q7tMMiQsVZLmMq+pIxVKo2GMH6GRzHmACIr0qFY +6uo6qg52UZIz31xz0rsa2aM4YOns5VYkkuveg3YK93iI+4te/r4gQiuZ4NhLTeWPRxKr1MJfN9R0 +dY8zBkP1O3H7vHjBfiNjwgYFWONlJBV77BpmgTxVy9kn3/Qb3PBS0fBUlrE3haemLM/TxYfs7+J0 ++VNV8Mny73nNVJK1ueHmLkuZGoMXpkGn1UU7oE3K6IRhEeYXDElzonbw6PoMDSUSr8Kq/9eSD9ca +ZXh0a3y30UqZze0BTEl2aUtbNRQSEq332+vDJuyOAk6JT481tTKZ3JDy2XzUVMhUzybrwHB5LHql +KHZ2N63TNyiPsnZwmPxLi9GFTjCRz4exfaHnKdK2EEDc8XzO+pFmRibsQJJgM0/UHqI+aLQeFpIP +L7cE8SAncjS45TUv0Fq2sT6yJgyfTpk9GrdKGR/5W0X6tJcEud8IyxNHI/fYXn3DCwiqfynud4uR +YpYuBtoCKEjmfykCexKjF+5fN7sHZYNq44lpijN2LhnpywU8AmfZBEu2+rZFXVUw65t8EQ0XoHv3 +k5c2mMBlbA1iUsG/fSl2S/Irnwi+xetSS0/Qaekg87hPTdqhzy3Wgj4ohzuh0da4LSxas2TGDL5G +/UaMEwkyWIrQ+pw5peuM1ksJGbffCR8JDlsIo5qSLeB6LPSuOM1reuQAJ3LM8ZSWz0gE2f6PrpnN +lK73COoq7bQaDKv3i7DwSZBAX7530GpW+kuoGjpXatUR4m337GbdmYjz7eItXK+pXqN+suxp5YFf +YGRHw3OyRfpsrW9+42mWJ40Z7J+QH1TYtx4gtG3sTmmTVS+iUotLfyHCXGfuO+0KsTBfERizgxA8 +iikyhlgn5vRY8QnweeKKAgGONv/CJQCmuRV+ubIFo/FaQiV7Mkk8IFFckGqQLSTLBBtk41YyAr5c +IfNRaBN5+tm9KzLB+FZXUsyHFsoU9jX6psyaR4dB9ixG0/YjBwXji9B4VXvERjQ6kNX49JPqqevY +DU7fPyHwNUt7ktkIc0kVXEi04i5eaQhkindnDqgWZ9MP5+yl9DT5l4D4KvJvgtHSdDxwESsjDM/S +kUNIp1c7m8D/GWakINn/kNsk0kFLZkSe6rvoAwQ7Z/pD8dxAf4cHdc08wKK6fvjYJLXpuHe/TEoc +F6AitjPUFxmz5Vv26uwK828K08TW/5IAPLilgI0PNp7l3Aop0iArXWjsc6mdGG6FIKqRRqUZRk5Y +2pjPYA4w19pIweGh1+jb5gpWF6mW0qiLDsaUvEO8dc0ukafbgE72Wqd0t0SnqqEip1pyiK+GhnSZ +mVZX/Ew9jmru3gncT7Y/OcDNp1IKtRGYWu+FC8cu7Ur1RDz0OZDHPy1dDIOYS++CyDE/1JSzSzL+ +IwtTBvwCVRveHgYaL8OPCIiDOLD8dn04YkQcvi4wuSlrIeXLaX5zdJluiz3NvDdRWGLTzMmn6P7W +992t1W89P4nV8xu5CPFehtl1Uyd97k09TnmYA3hqc0m2UietQb4bsX2f13GT9vIDyBtu4ThEN1Z7 +6kqdVtYPKd8wDDaW1BvMbWdHGODNhaFkRNFxS/FY6+QUnjgNmNXGIf+YDyI9C/NVZk/SoseZVWSB +6Lpn7cpUCgDj83+rlzXbHkMEgIuCVxfS8DM/U+CYbTaKGfXwAS1Cc6MC0yWuDVfhYZwYOwL5tB3G +Q0hFKihN/XgKVEsQJT39czOkbtxp39zdHmHjOfsbb9epVAx9wNUlQrfYLqNATbWbgPQNidP6UZfu +RBx9vmMqfeE5e8l87K+3LI7e6zLsj/wMivkuHVbF55lMjjJ1yzhUS1+zJYHTXCd+EeY3PUly+U5F +rz9xlDKR6XCdnkQUNxo+dMvFjip9wNa21ac9DjrRMArMpr7ZnmhQdzHP/3aTBWUCW6P/+wT35miP +SUjMS0WXdau7v9pEL4xllMTl2hv2v50QH1IdhtYqIi10SGKUAUtpBK/hWt9eT7B/+ALAKZdy7jM/ +1lkcV7QY7NeY7yfP8/bpNhRgXX724S6nfq3DOsfpxM83t6xISLmsKVfW5dQKaQfedwtOCSV1E9/K +/7V9y4B1ttsVSpdWZKdLBQoVYLRzgPjf/cQHgykjtGHmPzSbhChaP0KPdyDuLYeDuahp7GQn7m2o +zqRkShe+BXgBZYwFoFXEEJxh6+ZYoF0Z/cu0gjHHhAMB9+7/qln0leX3jED6Fv1noT85bzX1VU8J +aEnSTfvR3Lwj4j/g86czoNOVF8jSht2f8jrqvTZVtlSOB23G++/dixKNFVJHzg3p8TDENEdpPlq9 +jMuD5THYt9Q+kY18k3kB1VYqEDzpRUbN4gmqA0XbFFM+fnfyFMR4dRaTAAw56JVNybu4VNZ4cEd0 +pwYsqpb3yhjI50lM555MRSnWNRzLu3ISRdnwfXZkcIoyYTAfY04YUqPzLgizS7y/xnA4qPQCTyq+ +ub55WTEABaJ9C/S8zBuMNdKNGtmsZAxuFgq3OL0gP5cwwKa38AqOVHmXeIPAkcxxJzF4XK/r320H +FY0Of/rnNujroAFuLkM2RqPA4Eknphv8Fv7ouxttVCm+85uGkcaqKpph0ofBB5FKG5O3gLgEMzI1 +dQ11KP1vseAYbTqa4BqFFxydZDtpH24hCsn16i/q/LbvRFjsUEU/JmCsVSB9U3QOaZtbBzVxvA8A +nIk0tlbDXrDHNOXGzedP4iugvXDAcJUYiy76zz1fMe0xn11PDZkIJEH7/THme1v8Ro2cL0NdbM0j +RfUArJxRYnWUPzWI4gIVVChpyZN03xpsZEA0mBJHkB4+J79fqcKULIJjEw1XaAv/dVJuIKU0iN/B +0aizaZlRKqx4DR4g8J8Yhw9k30qz5EwAkECnyFqmmcuNLwi6WBsdhp8/VlFkAroSlNR92uJugRsE +mezVn0W9ZWzCswnwHd63UkgtI0Q9TAHdBnRyUFyTebZ96AlFZ8Uz7zpGgqQO3ZabAveNBO3cF9yW +W0q6YF+HdtMzp7WRbGUPSaaKbISd+H0DdP83NI3UemLgdtheoMpnlNINNmzOf0aOKGvXWnyjKyZ+ +uahxZhroPfZY/i0E857IjZBXsWYJ+EV/wP9r3Q+K2MNOmxtbzW3TYle3Yc2NjhuTC5fI269RNAlG +170UyAKrPxGiegtWa/VwEOvxLPwA3j4196KX61RGP0CpOwYj8ZT/MA0xOrHkFqAdmOkUcCKdiAMD +BJ5MoeOpekQFVE1cIilgIAQKppZAp6+lFDkTqX+J4Wq0tWOkynzzQ2h6QuZJ6Kg0L+TbHP/JcZoB +8RMvWlKRxCDN4pEwwOYx+2gbbckUTiyGCPcPKofSBaviZvBEpTLZCEJ1NoxvjBdVRLUqSUnGOrN2 +VVm0GvZfGy/JIzV0s6UDAsMDsOVyoaYj7DutWv7vrH0xy/jSE3dPuRipWHTJwKwpcxZIuCB87brl +KQsh36qAHyOqETnAnXxB8lSm9OaDiuGd872/tAXS1zxTTjEXK0MUsANRj3bZTqsa0DFPhfv0U/Ev +v/tJQ62cJPougjpzWGJREB7/VJlIEQk6suAWCWj9dtFYMUts09QZyvh5CKY280uDij9YyYXVN+D2 +KOC7TuiuSsWW8O9mmRomy5M+kcLAbC6fYEHqgZZiQB8WLzit/ZlNqyfoafp2s24qD/8WvVXozK33 +HVLKc7mWxtvGu5I7v0Uy+5RfrQFcwN8aDMkJ6STwMal9nqhOieOwT7YuME5a+ok3gE9C9FdCphA7 ++Lo3vAUmGtndRVVPuyRbRQMXODTerivyFzarDYB34JSuBO/1WpvXEq5p9a/WmWTs2Yl4mGzPgEfF +EfL6fji/VhavLsv9UuBwY8XqixySuLjUew0iXwbFPXZUZsZkm7IyUXkchZznqNflToDnD7ygKqpY +PrdW8jRzX4RIFTDSOnLqa7Z1xcPcReVZgIyQbI2YIgUzlTPcSNrmMGa43to6fRwMY2VYBEwfPblm +kNjrUSs2bQ3MAl07VrvsfxvDxIcT46zCXEoVtE3qd7s0PxBRTaLG24W76bnqOYSfy/+d8AggTHn/ +pQxodaeqg3QtAp90jWuMNvwgERtvL4KHhKyle9rQ/97Zrie+SqD8PSCjbSAm0A0+CmSY1KGXrc1F +0T4Iao5NW824IuJ/TQs/o6pIFfdhxUtSUg46fW0i9of1J9rTWpBl0Ab2odNInX6L4J6D3i4UeY/+ +Q9eh77RCaVUHObYDRaZynrLh5yvwJZVVK4YPn1Btok554UCdm5CsOMaN2IHgNZATpmSm+oYAVVs2 +vidTOLo9aYHcdPyupU3xhZizo1QrPxEoMyoI1UPC3eiNCLZBdC3VQashkVdLtfEusiRMrpaE8zGu +Z1N7Pp5nWjWwePpwQZuGoHDNthU+3N243ezuS/4x+2fyARaE9xJxWCs+t3i9/i8CyUnXzwpvn2pl +Q/IGH2CPw0cAd+xbDN5+u7J9k2UFZHhT1gnfVJBRkaA9xbhAL3lWqM0mEMp+0pCyb5i38YNjmy4d +7sW1HjMkGkUF/pfQLa47PEvEg94iaWjYKkdqpw2EZDfjtqaMKRrD/1uezIisz3MZcJqWzV6oGR/l +b+spGKT9NDd2IK6vDJu7ojQa7uHGfTsjBuL+EQSpcFfJyEF4rgyaSiZy0WtT8JTl2rRF8fDEKDQC +zUgnLLzCYHsgJjAy/cAgE1aKEip/SzoBKck1H1j5PJL4E7wRGnDBl+y36KEIXX7iAOnZZqDAuOV8 +WsB8MZC04xXWXwOLMoHQEVdi8Lmu9AoLuIETRkCNCi0tnWagkwG1/8kd+s3UNRmScM76QB3tfJu4 +Tb1n+8sRmyN1tjTde72xsbUl+7h7QKEZOtLELHbsQOR3YVOunHqHpEvR2ekXZfaKjLgUpE14buXZ +YHfd6JOvWP/Z2j8O7eeXVUYQiItf7LNKk/98C7JpScEuuaRf1NEFtPArvJwvuTLFQwaJr6IqUg90 +Fa6GruUGPmVfnvnZVc3bfkZIc6QI1unWESCtXar6f6b7B4q4iM8kUiMLptY+ASvya7Mao+cM+8qY +05u/jA39V0Sr1DD6G/9qnacDZMEtfZ0dPnO0cjktwixt+1LKTv8FWF6MJIhR9VdXnYxulA/1i49b +7hvVyKg/SFW3J8+KMM/cDFD0qsNfACRyv3+5vrNErYQEhJFVjUF0hecmcbEY1mIw5RzKJ6vevDyd +d07EKp6Ooy9FfKpYhsWpiiFvPCA0mML0ELMjoZ4C4ZBIS/Sx5kuqEfwCUtpiEz97PkrEXjJaqjMU +GZujJG5agQaHmxyGpYkDH4EZXwSVLQY72pzXVPwKiNXjk14BbKYMQcdJa/GDqmIHbMdkx25gcO+l +AOEzu6JWdGEhfxPjomMAA+Bc8j0+7nB2CGkcYjGP6NckiubWfoDNFf7rklpKZvlxmBz2x9N3h/sF +4hangYRwbLg6eDHGR89EBqJ6gch1vHJmQyI84oRpOtRZlZwJFG6HOMlmOEm1ppVCPsUYA6xeBdQQ +0TJq3ZmSLmcjs9hKGXMotrww27eWxlfKC2etIR1fKQ/iKJGN2w4ENOxSaJvAfdhbBT4hWo1zJPiG +cUFpxNoJ4BxtMFSH/aqZ0+HSjixp7agNUBPu0uekCI7kO0I9GCg3Ol80NelXt9eLHBnKaVPEtd6g +gCMZB9C3dM2elGMgYjIsP+nFtCHXYsBE6xmWttaOpPcx3JI/cbk+Slh+8ydyYZJGTG77mSM5PVTd +UF+ufxZ6URQuGNdjRQx5jMJFXoavcr+joiObWWTw3PJiBBoT3eyCCVpnGYE7wDD0742R+eOuYVq/ +8YwtPbK5XBWtGeP5oaw6sZCgZHspxpPtnZnWvKtPkS6J+iNJ1TnDeFRPd3U3RnX4s1fqqHCxLjew +NQZrU7J0OxbB/qbqbUMPwhpE8/0LTKyvUTyWzW4kLH/z3msy0saUezfhavMhMFJx+aagT5B+MKK/ +0uvUjLf3Aop4pV2laMhIiBFdrFM8Nw13PHCtxIogns6WQOrjg7AjcgELAPUo/YoZijRn3tw1fHqa +3IFd4LNcdyPjOCdie+ZMkIcQ3O3dwW5Ed4nwlajpji1AsAkOL2v4l6UYV2IFetBj6nuMLrxrA/Y+ +V6Lv/bQ9JxVRmabwyC9CON+lTJ4t0zByLO8TMgrcuJqxHZaYUuikd+vquL6dyNnugAH5EypYkNj5 +AlEh7ZrZRoqYmEkNRD5jIUEDrK9KFHpDdPNeMACJClNTRG+lTuwkOCBc7SPUHs4o7kJeyyQRZWfb +T7dQEgIMkFU6iU64bCGY1PNPmdA6bEY5CI8EkuQ6oXH3IsyZrTWVXGfG1wdKqqOAxAjWHlniador +CQApVyw+VpXREaZPjRdShaadyqSYlSnj0erqrnI0lm4Dtkp+w1Yr0yrHItNGDbW61BR9c6aTx3Hj +6YRgzA/qHETC36wq4ql8vCMTU/a0wxVGXbdlw98rNq3Xa5vTeYmxCOSXG+OEltWwq3leNhC8OxzQ +RJgLDWkSUAENR0VcVeGeo421H8WZUkP83gGyHDv43dtNKw0bd4t5YHkxbJ+WVBgaD4lQkUc/vMS7 ++sNQz9+LP77y6SoDPhl5IVVZvVLpgsSBniCRRRjw+jy3xr9BOq1drsjRPh3tvhCJtMRCW/dbFBfh +Woz5p0Wb/9ojY02RWV73u4ZV6zm12iNwdSlVephp4Ig8mxTF58Nyvb/Lky9b21DEh2G7YxWn6/F3 +4YHvDb/lt7N7APOtBM1dQmon9F+RhlvwzwB3a0ATJvgICcuNVrq+sYdX/oFp3p6X9sn7D77SIt0G +hEdQdPM6IdcGc7dxQE9xF0QU0KM0TTjMGmX2b5JtBxfk5b2TbBCLfPJkbmFo5LXSwOYTGVKs27sE +3k+kZ7KCeOE0iotwBo+m9DxyF4tG2Jc/YhGnSW2JehjjJC4tdOHJEsSKzdRwhk6ETNUOkNJ87F0v +xsNd35jNWfTOWKg5JTdBAOfWx/E0uR7/dn38pCKxQqWr4e1J2jBIObwz0OyzO0p3ACASQZGHQqKl +9xxEbUodM0BVIdm+P0Jgq3TFfloX7+Hdt5gDEXD17eqFCGjBZHizZxojaBHoRr5xcCogPbAsCaXk +CZ0k3Ez575yb8tWR13W7vuWGdokxa6tRPdccCc4Lp/bQu4QCpjMnpDWf0HHZ3SUWellI8mCzVrFM +0LR6iPaOTI38PUDo9oS28mOTSquGkIHoXoDQdNhJYJPowh0cXYqtbciIPgOf7A7XOYLB8oB1ZtD/ +C8/8NyOXt6B4l5RcwML1zhm0lsulYBs57p09oR61ivDk3owDv/EyHwXuebUl2K4ep3oV06h1Oztu +Xi633ftiUVQIkdWi3lVL2R5oSL7ANyu5sKac/mapWOqMQpKX0Q5Tu/VqiU1xW1CbUduyJSYcpRrM +Ch5iUUcdQJ55SqQLKuL7TQZQ69OEWYFxVI3mjtRoQfTtQtbs5/uSzqOEng2FunpN3R4jVFwPWImA +0MLEwqNgfyCA879/ybsNCJz2F5xcz3Ui+r8mdGRBBDID9zENciGiZutfDT+uM2hK3rRQiiuUztPF +NCTgG1LJKxTr7gzlPMH0nAMG970DYyOV05fsT4z6KWiehJUrhkFuVt+XM5Inhqize7nLrfXDuf0D +dGfQcLeO58R7HdlfV5NVVZ1Y5DK90+Zff/EYKt6I3jvKiGkOSG9CJ5oSW0AhBb7bOnc87lBHPMEJ +SPNyke485pSmmycBxpgTqCe/r7mtlyioOy0yskvD3vWMf10a18DsXN7xEJHBQtEJ36hvtQzRCxaT +8dIFGZ1R1KhuqkXCdEhn//wS90k7x4qFVWPEjSIluzaxvxxwFckIZFiD/jwlKB0EHJo9bCbup+L1 +m5SPuF5bmNlANIpgdX4RXl1R7OyURlC7c2kzs2nx0qJgN+OGs/8dJ11pcieU5uXSGqSDGFipi1Np +F+Qjw/5FXDWPRM5zMkFPDm8+ZvAbhlSOREK0tl2680rOND4wahER2mIexCDgzteuzU8uQ01P8X4F +Cv8oHR0BotLV1MR3W+Yig7SBT/S8wBIPohkApA4n4wKYVmXlotu3rcJ3B+eaEzWOY0gp5j1vY5XE +kCWNvud8Dcm6hwEoPbA3SQhr6zpX3ULvxYUoFAFrLVINAHPLJMqwdODg/e5WsGQQVSFkAkT/mJ+q +Lehj3cERKJe/8rNSFeb54XgUrKEcXrPYR0Ac/Gh3F2rAHkFb2Z205Kh+p31WzA9y4RAz+vXNXphH +GLZFx7e9SWqd+JZV2graVDLMLgxpXkIK7e5fciuAm/YRnapBwbwcFm7uEOpnSg8+I48mnnfRz3vk +gmEjxOdPnBjqvgKyAY50Ke5Pyb1fuARZHpAH6sQdUdF57unLufdJ8pcM9MN+9DT8vRXYGhTVeb8X +WYlVjS6/BFHWrUKka6MDX4jlxnWmYMFh5m9AUq6FY3ZHmfL54C8J0+sv2w+e7n0gNuEAV2R6FaD5 +SNQM/lDD5JpA5BOGS9pVeu4K8fZtimyjNrgBJR72e34Zbe+v5ZliOXTAKR83nT0RtSr4NlVtrVKq +lLLDHFrL84RczMDo0DOmzbjw/vo84R5tNlVp3K/ZG2tLe5/uCnAMlB+lE9+t1EHKNEnn04lsYNBH +YiI5joZRqXv5xTY+3tm5HmVAUThPKDbDFAkaYdXZvQbofmqXGW1ODdxM8sPa4+RdWQ42shiFIQLG +86WcMab+HpAGggStsRCHbc5M36UjAFm3Fxqrc5SRktQwSJwe9Chwqtcx5MNSrQFpqbu7Ic7WyPAJ +MCk03iiLyCchFEaeM1O1KUjkGaagErsSgp4DrwaR+EVYcT0h/TjuKj2B3UVoJZnPWky4hqyrlbRl +Hb43SHHrLDrxP8poa4u+8WFXBEytMVRpQVCvzd6PtURjEt+q4neZqpr3WgP0r007gX3jlCNW5TwI +Yh+aEa4lrZUWnTeYRmc+OZf+FpOu5Dzd/v0qV8eT8gmkSzq1xxpLrf5sYwfcfKr5offMOHD9k/jK +ZzPyjKvERsmZTNVbmSKoMaecPltvTqnPjlXzME9vNGETE3l4IF9XOeF7y8SWOsYc7UkCoPKVfIIU +ZVvkOEU1O6ndUm2QRTnoKXhbh+XC7l6zCh/wkyJ0gMuKSb1+rwYuJ3/GTxn9sxSkLI2ZsAh3owhQ +6zF+4v1onN5s/UVykAbY3tkqymTbcbXbXqO2+0lLLUV0WwTvTki7VRlIlZFTzxPn40t1WdmZNc6Z +zx19HMoIIZfkNbs9evgnzuuutQj+Npt9bzdERDH1mr+cTli9JAqDMlxomHSQ6xODxQHKJLo3xbuD +KcEEeS8cEAZlE+YmJv4iiQm7sTRn1JSBnpd+JeiL7uNjveWBFwc7YyiSCJ9Bb7e7eAKrS1vcokJR +TyYwfn703EqSNbNnKjzp1oibb9xu0WMKkHUT9bkxsyKfB8Z+xmWuE/geoZYe1TLRXLAsHLiqOVWi +L2q6UpURhdarsvrXuXDmdRdZISeFeCPzvx+Bduqd6FLRgQjIwjwiR1rFo0KzUQK9qMEP0SxXjSkN +pnVKZOjszJF8mFn1I3K5V4kvtH2xyul6MEL97bafYloAmopTeKr26ryCzEPgrhjdLKRGEGTiSk38 +jFgu5JlB3A9SpveQOg9QRReJQ5lKI98YPOoUUvsjLCiIJ4HmT4eAHAhZ+q+hb+GGRayBPD1oxrRi ++rJM3lRAmzvHvcenBFbOFNA4CMRkMCqPpSnTnvXQ2veGtr4BsLBLHPOeG6j0VT2XxkCaHYwwuu/V +2ICIj1Bq91db9FcdKiJ3V6Ci2R9GjWJ7Edh09DyYYozxY1Is+8wwzbl0altdG5FM1eJk9xdGMJMf +GrxElD7c6Qisyx+5LE0vOFtOq97ii48Swwb9eRPJ2WgnS6x2Sb6OfSQ8AzC9ea6CqGn/eA1aZLDD +s6CeGrUv+Jqm1hCXl1yG+tV98qC5vNfCtRal1V+UDTMQcnvxuq8Kf3DkhgDn/uQckrGEj1m4957+ +UKsqno4bKT8e8jJd8ixGCDar7MTCWW/8Xzxwt6d9OipCkNK00Bwv+q7aSmVaAabykI5plFLWI1hb +J1VeB3d4QHO8nj4lbbMhrWtUvclq5zvX/jRDtZN3AiEBKX7RvHOcf4QPgWZvloxrWN1UYg2Vywje +kLcNKlE75bEBI28xnuiyOd6YU7U37PpJCDEUHbZPMsDgYt4jLSOuZSpap5Dj6wIMOsftG1ssXqid +x6YjTln4aUymxPS2WkTVCmE4PqjIldar1P822z8bUzZtd0qvEKpHbsQyGVJ6t7LUBctSfvBjlOg1 +7NdtT1ODFoRsbr1+FBawtjB8IYLV77N1pdMzVL1WCWxGCRMnlhK8yA92Hp+WicTr0cnU5eZyyrwc +DWxK6YLQn7nHeKdKgfRZMvj9pMjfFWxyTutlvL1QayohiGRr1XvcqSJMCjxoBxyFDiqtNcgdqiIM +e+uFfyjZvGk/swivSdHlGl+GTAIiC9yLT0apkKVIHYdJ7KdepodezWZnelRHXlwWvkY0sbrNxnX5 +4oHawHQC7xumaY5e6xXZ4Px7lfpMxD0hcBFi2OAjANNBl7p5zEphA6Jl8YWCmAo6NEnCHmhBe1D1 +vRjltrTr5sCfAQ/jdqpe3uB/y71Y3fXO08Ds1gLw3b/dSOrywLA/m//H+tpMYn6jbG4Ik/oWvVTs +KtyL2b0ws7FjRmw4cNOuiMYID8ETEsDpgPD1TiadSCjyc6Uwk5RAq9unlsvAG2VROwXXMbjL5KJq +/EigrRAQoYvcfvymhyRFkN46BMvCrMsevCFosdrF/Q0GPI+EeKYGpkqO84O3/inZXcBE19a+GFYZ +dAN6TJ1yqXcyFew5qSEHoto+e83bv3eyrNMBfNx+Y/HYmGl8bKWm/G7FatJHVtHySLEgbxkkiOsS +7Rg5CZHe+JAZ0otlugbYZw0sETr8L3RnR2Bv/HxDcA/LyJhzyu/LLfUQvW3dEG8R11VxjwGpG6XD +TATDtGEJ4SJAnFNOYFiobA8o1I2EJZ1Ra4erKsB72P2v5zWjSkm22mnYKH9uiP3nOmEY4JlHD1B8 +1+vJitRw9Zb2N4DQrE7wVzIwMOWG9XqG7/CQ33/9obBGQE7iruYBvuUG6sQdWZV7dm/Qp6brInTI +4VibOX54hm9YasdQPqV59Nbd2TxgrwJBJJtfMvUqftN4ol9ydqmjFIR/BEI2zA9PahktwrfYm2Oj +9OEmho9MtiL+IrJQfCthO10U016gynBuXpGTSO0tWadJzrmjQd2EPoFcjFHKJ+CNpODjvqQtIC4b +jO03wtMgOSduKwXBKAtpBKcO1Sri6a3w4vMhwENFjy2wGxAMfP5CeMcZuqxD5YQGrI8JH6odY/dY +wm9twAbr7xxQ9YUnIQeSWJFj8oR1ce4LkAAEEfDeJ9hYlKkb4g/tTxG5rsA3eXUvcs4T28CtX446 +Wckcp2WOpY4M9tpH+z8zvf7DnRbw+Ana794+Q8bxubVPeE54Z2kwKCFXedX6JkV625eDi1dIkLU/ +ljqmVYpdxDXzKBIz8tBUf7vXbkTPcE6vyRrqkqhM0UebXie1tSz9CpF0Ktk6AI5GcHnjUrOY25xp +Ji0CxJMMoTG/yWol2KVvOhc7cldkEEp01gHbIi8R1x97JwFrcUsSo+/+8rwof4cY1SN6Xnz6aWdq +6Lvg3Dzav2LcyVwus2tV7O1rDdf9b+Dv/q1M3+e6Zct8cmkxql7a/n8ux0SMhmJRFExdBNUDToAJ +CME0isdfWJclpnlh6ZwrmENwsUG9aZTMHyHSfAiBxHDKiGeC6rqQq6MfxY8IANOSITsc8hfPJetN +SBDMOs7zWbUJXB3GE3djB/xNE0tMZ9LhQ0snXFx3Ec00JUfiFdJ+ODx1IDwQFmFO/21Sr7BFPtD9 +n5CkOm9OUCIEBwO6KvK72UbbkG04Qegjn2N5e+vfD2mfg5jvXP1NtQ5QcW8Zd7M8rsVGYXzdaEax +I0DIIferBd+701+uez4o7rLGHJIkDxKzWzZVp0zwJXI7j12Uhzr0H8jY50KK2liDVRfnOhpW1eXp +gNtHolKJ7ONya3JJvRphU2+bkry8QfYCvik1fhg4mBXjscGKttiIVBbOuhBXqfpxVqEs2VV9rGmT +NIcNKn58A2N1gWuKhn2fSKa3qNSvV2VOAeShKnjgpZjlWRXqc4R6y8r4q2mt+BpJBdHfpqFmKfPH +GqjqND6oxMsTvqYeOl7s/AMhBLVDtUdg5cl94UH4p4Sb8L/E/tB+pC1qla1FmmvH2VYDc/WaTnVG +//QldyvZRWyxPqXi8scEvjfQUTZX8tU93FwhYaGsUgk5I24EbWm/LwHSHagenQQo0f4Edw7HOhG+ +OiapC+TtpD35DxFg7Zb7DOkK9ER5cEIsxPcudYFsYKZUEzQSLZ0GmLPUR3F7SyQQYAxYVILLD9SB +qaOWoQvE7NnfDDIj42VjxDZgurBSAG4Kc7MUjtQVI52qpCH1XH0CigttaGKo5DDIh0jU+9myvzja +vOJ5ruKTTPxzyogjKQLzIXIH5vz+rQseznMen9YRbCXTaMwdZXS8WFSq7rYSzAju8XIhY11hWgyL +zBra5A5/IAlKmLH0B9MtWtHSiblgs8GZZ3EpOPDf+D8WigH3e+OuWP97rlzyk9fgKDzdQAP9t84F +udq6NR/3BUSISl+SSiBGlmejMknEdffC9PV2OZdv8fAoKQUzzfa1sAs8DfZaJ08Pwr5yY/jYIf7W +ia+zQL4DU9xWNXdZH0tu4tU0g/xQxyLWV6XQcxLNhgCHuIo9PVXGeoq5DblQ0tmyxWnh4hzwWhLL +pELO9xf4pzRp6oObXqv89/pLfVdEM7cjjtruuKExLt3NXiE1OJv/pPqPQgYdRK4xtqU/vuuZrOB1 +LRtB2T2HtO9vMHc5Us7AhmL7QYSGg2+rbbsXMtfOr8S18C6FcLgcB9o6kWhpTPfKbfvSProqzwl9 +qgp2fc6VJX9+QaqFlkKc2g0U6fh/q06LenwWkD0YuDyo/0EcMd1aj74IWjZZTq+UV2tOsJLoVrBi +JGdcfQtgP5caCT7XULYtNFZkwkYSR4K+xU8TuqpZqJbpdDRJUbzefsccPVMkXJAf98VU2DbBTPOK +qrE5NGuG0hxmkdHZLVOLrV516kRh7Az0QC4S5t9rs2JIrvKK5zlVpLECW8J16SbD5huKiG8ejHDX +br3Tua1nS9AL8k4rgXOP98oC9fCEMtDdfRa23AHhayFv5B8CXYxqyJ9fUdtTf8Aa7PzI92drzRsh +qcMOW8eXts3kXePXq0eelxDNG+5Dnw8rDWmAigNV2Dll0Y9IJm7+bTS6L2WB3dMaworU8xxvm6u8 +gOZKpPLJlKmFzQ4KBQuIvkal4A8Xlr3rbB7ZyqE8kTQQB5bYWk5pHhYVE+0fPGkQrZ7u0crUuRgp +ufzQFCt01PajI2C2k/zkrh2Klu/v1bTjAJ9OlZVoQPK2s2TXjuYuH2nMoYGMF3X5i7ppRG1H3kqE +hx9TGJZQuhXXPvWF4hDJkq/M5xo4a63hEc0FESUJh87iJ+PIBhZ2yFlCGfvzWgAy7ShHZrykaNPn +JF+SO5DoM3xTrCTqTYuANPCQAT62h37nlf5Qr275ijjzLgCiecgzg7iXQI6zHvk43Ze66gek+jR8 +rK205/dYzRVXF0ONIa9zbUCTqXrtR+bpiCXvPcS6maskD2OD3Kj/+k/vIr2/NUAH9d9VD5PFOQ7V +YIrSpxYxGyz+rVrk22mxVAV/WmXR+cmrh+c9OqlgzdTcSEf6UEkf/YdwT8C1Wlw9mwFE2HGr2U/T +dgNCYfbJCCX+fG79aAn5CYHOIHB2EoIWfIJbt94kR4AW2HuSGxHzqREGmn0AI5G7DFIERu8vgIis +qP4wUBzAY8IJd5ahOI/0fLDR7/1qOetj5R5Y3EmsxC4swR7eyowSuMNi/1Aq12+CzD3lTrnJcWEP +rxo8nVhkcl2gJqdciyuzIOgWDHdicHkBjVrc2CYHPY+qdXHeq8roovG5IC9wvHueSzgAvXtQZkhq +nhbFnZms9speUNtzHF4WDORm1UAUBfTt0+OFsD5IhuzOHnQS5LG2ag1V/irPEYXOqq03vhhOuZtJ +50Xoo8cZRI1vU9O67hv9hT+2Gdc6n529HJTTxS7OQVyOB+CuCF/GHW361lW58eXKySfPH4iz6ob+ +0eYMTYoBoaixbd+MfsFU8eFdtRVmwrmCyVq2FDScWrhIdBBWO+9VFb/CCd+CecRHfEGtFliIRQT5 +BWSAzXMW3TAmv5U6vSB7R9O4WpqgEqPUt0J/yv7/G6CXWDkVG4LVdykeOOa7+gjPc5MJVPXUeYHp +QnEseRzrdkMZFocK0d4nLrpNIGXZpWa+yLR4sQCKfpMWsv/hKxXrweQF6Z5299QShtHNQpNbDYIj +LFnfAds860mfToi4cAVxvn/dtCUvQs7BKUSu1R0tcMe3JmgcxHN0poDPOsW600dy7UVe7jhmMeW7 +/aefeVYfKJ7DvzF/X8D08EvTb3xrYYG/ZTNklpTcqBEoZgLY3882J72mbj9iQyQs9FIl08PHoMOO +8/Sbol1SH1IEG420/VpOkVp3ZiKkmYV0/f9KfBjKQFRHHGJhpcqzVN4xmCejB0olN5593lJVrn04 +vu79R2/rORBGgTvpe7GMCS4ejkMwiyc3/YFh2we0ULJvtv5E3OSwtxE8ZVMXLUE9CTxfWyMkLN1r +lQ+mqTqcWI+bNdAEuIVHA6sZ2vPcT3QIZOFvWRnruSp4V/ZE4938fPpDq68pTvWkDHUmcNpG1mGY +5RrLujiEQza4SQIZYykVTJrOBdPmlWOc/450YMOtsECsXigOvCawdhtItJxflBDRzfNCA9gjFotF +bssebUEUO+3Ayr8Um/EvYB30sqVVrxMdOerDAnbYWgtcN4o23ORtgpEqms38JRqYtyqE6XBHxhDQ +o8IJeBRwOlSiCwOWdTQVW6PX4PHlb9STM4/N/P8uPrxyci1/uCzvxQjcWpEEietYVK9f6+TSQC0h +WrwMwWZBr8bvuxM0rblCKKEpF2OsgG5v+jp5LbpuqHL7gmbP67PxcFzMcDEmL+UiC9h3ZqRToPcC +8Xat1gfTMTyew8L96bgkC53t+RxrXx2g32Q1tGh5dzNJFux3sEI8zrBrQgs4pCx9PcPBLA+I1x92 +hzl4TyFviTSQrjgTKcj4fzPiVXrtF+PfZ66jAWGcOYW/aNjRcQMRePkLjdivqcLMRxKVBJ4MU0gu +4c0jgEyIci5o4pId3XBs1vIQYfltCZI+VAdIkDY4F8hIrLGzBl9AnIQ1ITHuQDkfo71fsr1tTSwU +9bKb8IitSSEejOtsH5A0o6WI2LThdNsuT6+eTAy7QSabURix6duKlgy57IW542sm9lKiTdJyrl7R +Hgwpct4tOSA4ArWWYEtTKYYktAx9Zm57phIQPOAEUOgDFXLs/ryLiHfqZDvcXaOvRIXZzPI1O3LY +TJ1s3INv0oBZnTxu3VYHgyjWljPtzfHcQ9ogDRKhdFqoOdvJHJ1gnXoe2TFfWWP8gbhsThrUcHQZ +UjrMNEYDQ2VmZhiYyAbekHHfakw3YovK+g+Ot30GVQKMkm6tLSM/KsqCi6p9WTme3aOYVB6pIlEL +PbWZQluQcZDsYs382wfePSsE9VNm/HUjDZI0B07i5cIMuohoRZNN6xwGsVH55Xps6GbLi5l2Rtrm +ykAiAg13rLgcqK9ckEGFT94Lb9UzC0HbrdkqLbXliroeOfmNF2ENuiINhA2w9nYYvRCwEwCwgjMV +a2Cqi5n42iP0GG+G7ZrnSL/zfhSQT8eCE+D5xiP8n6KfBeU5vFCJwtSkAw58Tbmf+oPq8YsdcIqf +Ue5DfzcwkHIkGIdZSmAt1e3PiUDxDWYdWe8md/UtaWGjGFNGAekkUUUCMSiYy0sx3lJNNKK+l2KF +3o3NOGEkfD4KGS3qkJb2qEjn1elTbJxgBaY2iRpl+c/+kkk0i1TFHJ63BuNbtCt6FVjTGe4vI5WJ +VdAgSV86lT4YslhvdYs9LbsSh6Us4yQmV5XS5t/pbZ3oHALt9oolKc6vc9ytowLxDJ3rHoQG6AkN +bRXUeckvuDjHUA8QPDpCvNDDt3z56rKq44YIW4rdY18dlOnZoQJJdPz5JhFiMlfJx3anr+z2dX0H +/0hpjT6P+XAP/JEIfP1Wi6ViK6j2tWmpewQzRRb2vrMd0uKWZ/EBXs74eZcev/QaSnoUCKaxTQkL +ahZsVVimKCZ0yPQGRfgATUm3RKRP2Y/VJO/tbK2lGFmkkWhqJagb8boFD6fJfwBOgDZ7oj+tI6Bs +gMT5HzlRgYg7giMmI/BYofHNdznv58se/jsltvUaBru68OLbdo2BqhvJspAd4iJjjgKLOQYWeqKs +dmWKwYf4ks47GUu+kFJwGBllkB49mGO3h5kHRbraOenxUMko3lN6sNKVOfM4mAWFrsJBiECqcVoc +TLAksNtgm8fbfWCvtzBYtZaYJlsFteNw0ZQCfV6cVsLA6YCbjRLlodgb02c1NgMaMVxwfEzRbNzr +jQTKRkYM+3AGRg0L2g7HE0bKYcDVxngKz8vmhkPklAO/hr5CMIdc1tmPg/UktF07rIWzW4gF8TZR +okdOAZuoqH4d3uCm/X+YQhEWirc+oydFm0LpTeQ5DnNLWZeqpgdTylZu6/llhxT4bVaLp5HBrNkE +7+E8yFb0JVHRBIWsH5/RI9DpiBzzcff23uJwcQ+SnJ4Y+efQfaUONwukWyCTJ0gRcB74tlRnDMgd +dGg8lMvnOmNsMBgrUwg8RQMxB7ql7vvFpG4llRfz4ZSxTv0EEwpVYjksUIAWrXtwfRcnYL24d8r1 +C+vLnWQHUqzvgl8KIRFtqK37Cz3gvoaBGPC3AcSfUfNH4YaflfQ3c/0fiGtOVklu7uPAkryuhCy3 +rG9zmB0Tz0Ux9YDj72sUIYtfwPudcJmorUeX7JqilscPjZeUFZcO/QhLpN8Y+YLJE1txs6YWcQT8 +4U00tijB3xnxHejVEOMinNeltGCJITi9EQiRkSO7ZsGrxAzNPWCPWIYFmiOze+ZyawsZg8uNPlsy +qaLhOgagHUcjtgLi1Sp1wzMs5LexrC8Hn177LEb8jdIjOjgQ0KaFf5knfUbMMcq7ALj33ZDCIOyW +eCbLa5plrQxD4V00NrPGzdMy6lx1ujTnmntRL//LBEGDuDax0Vusq6eMeZWE9lqpjpysi5P7SxMo +CEcywD5mg4urszBVdkQu8cjOKtx3LaOdcbSBun6uMD5ik1UK5XV23zPKOwaPEN387h0Izd9ZAzpV +UQwT/yZbmmsjBQ1q8DUiMvHRDll1PXfNmSsr9m6hZUzkbHD2k+M4fdgx+IE8JMAk2vpEu9sE6/KL +w/70BqoP2Z2uBYO4kOBHj2eWLLulxRkNhNqPoTTActhZkYDFOvepueTg3g5wUzCDCS1wzOW0OM4n +z+81qiCvUKg/Cjrp+1ddA4NC1OJDlMVoTmyPCiTM/Yt30wymoLXns4gjuyq/VcPTr+VcnJ3ui8Iw +laTMn23HaYrcOI5r3knv8aHVabbawhBV+9LDylYMhgIW20CxvOT+co0BlfQvRpDMnGKqKicPA/vw +rPt6truCJ13sm0yIaCWHTOWl/eDlTY9DwziK0CvXO7VCX8TuOOelimspPeD7qFcUVtL6bTp6mCot +Wm8ExIJc+PwefmkX/7cwe0n62/4l6Cjw5cxt5oSNmxZ0DzOK7Ywur5HbwRsL5at/LBVZKaimZHGe +FNjwSusV7e7BPrNIKRRY5In47QU89fPIDnh5swi9D4VryuOjDUxO8hAVPSgkS3oqvmYwUhXHPoPV +SidCrq/jFPryOOELDmB4WlV9RidNN2CW4espE4abon3pzltp9r6+VLc4W1W/7SSW8/P8XHZ5r1tc +hwfFnpmUNihAk45bAbfwiqZtbXOnhn7kHO2sK8ZACn5unChAW3nbiNYBfvQ2dRxXNszT2RzDAg36 +eT810XDsz1tDbgz9LQPfjPtZ5zb7sPROIP8bciErVt3ccFteATeiGbikNAfIQgx3sMOPZmD6PM/7 +wELuZl7ybXmyzNW3iQF99y9MP9ok5Vv+5R/ixFDLC38Fp549/ttW3mmTwj5vqfBZO1tIVRdEb2tx +Tb4chhg9hw1SVR/UYHQE/l+k8KaN4wACA+odMBzms7zsoFCSVz9M+MgJ4xkoWv17satqGioXrZEo +np3+J+1tvkWjv9j8iHo1mnUy8GHmHtkeJcQhSTGjR8hsUNLHL7PsEA3Jzv4rYrqgHa3WAfgE321b +RqQROVUsZ2OnBPi9D8dW/cZ7q3CbKk25fwvwHhG83rO18YNz/UZ66DiW7BesNjm7D+0CWIbkjK9J +RV4waGKRTa6v9+08esVWAwlzFx8zwX3Scmq79dAkq+8F9Lb8T4myIqZT/Rao/BQ5sF972CN0tj9x +8LuiZ54dPnQlSWAIdua6xk+1S4pciVwWlga+DF6v25ykgJf/q6TiVW0wwTOVYQFITOqkjMg+5cER +DFLdxCNID+vBkcVRUAazyOmPSY+0e+E4ImqXaOXvf3fClQBAqmlGD59qgjaiAFEPatIhFB/SHPcX +2aALFgpGT2jx9Dq3DRU/2nCbktmq0AN7lO4npUzJMSMARa7vp+4qgZlPnT/HBva9g7a2eWoUsIfk +yGUezy8KVG7/3BXA4CaQrtQA9YshrNRkEbTOPBxneB9qXQjOeqkglJb1nU2nxUQ5cjErzUVcBH/W +IiXqMcNBw1HAp2KCqWqVPwQ+E40vwgFOQY5O7I0tN6xpAPMN8Opov01ivoE2vefiHhPG2Wq2ohwn +7XH2MvDCX4/9u424qdn2mIPtNNetw0x851NkKKiUyT/eoLqsND2OgdYNzKP0yMPPojVm0bbdtVDi +Y2lBvMOQ7u9d+5KI6kWlGrMJ452gGrduh1MGiFUwZQ5fps2hTeHD6E9qprJwlMUcpvYAZOqChSe2 +SpvLMgeAjK7wb1569q/eMVSmPrunIpVucaiNajDobdr79tb+S2/LKPhL5L/Rsi90Qph7heXfpKoF +6z2ECeimaat3WPWI+5MxOcNEdHv5jg0rX1m2W9fBAcJJZIvHPuGUEfAcudd7e4IvuI6RfqmoTOA4 +T1G/37ZcA0bwg+5C/BYlgIj0p7riSi2C53Z3J6qJpXVqxJc6IIF4oBzZBvCp2u7oXvYGZjhFFGyS +qIYBtcZ6EBV0UgBjNh+J3rK3+wJbKGhWrmJEbLh6iJn2M+99ItplJJ2gl5lWOkbBKQCaKCDfJPkP +7YqtSP9VijZeSYA1+BVam271bSzZZP0G9d084JhF+TBrP+DuUrgOT3yn9hNu6iVjjskvgVBbpW7m +y7r1wlSPqkyWX6x+nyHgqZE+3v9C1bAdO3NraoKUrvPLdb3ptM9YykQ9/hhETYi/kSunxQuXdxav +9kBAHEsBg9HUbhtgyzDOed6j4QUc9SZuKMB0bDTgiczS8R+A7otRA+jeSBXk0dGOusfZg97M2BYB +33P2ix/Cu7iAHlFKqJ2AaFa9E1NZYsD1ljC9nrRInFxIL+HARa6iyVSmNcAyA04yIn3WKVB/XhsG +gZgwUBC74+EjlMS2BaNH4mmEMRwBLZNvvdp/yFKY8uwfwOrPhhbVkkQn3fUW7Ir20chLvcHpLmF8 +IOPGcavpKIaqxM1ScRCN/8Ec7QYyy7iowHm4Iwe1d3dG4T/nawYkZ6Cgz410xzsrycLBDutUC64r +xzVaJ8jNEYROpMrTZcIbHG5ABcKh/9ZiRKMlwxuSG0pBNRg+M78CK2X+3kJdksLccLubPnLmGXFb +n+1X25VyKhoqg5d3Uh0gkLkNqsd16opt4ItV5Lm8h+EUDYcA76XczW54Cbbqtba+H4C3I7f44Kuz +ubBKUTDMrJwwkCI74kBJi0yPQux7SEzZRPv/z6XXrBdz96N93PTMWNJsPsi/DjvBsodsjHkcYQnB +Z1qGvM6JGuuQuQ0z+g1fHfkgPnqGlejrWpV9odMpYg+Hkv8JAVNlx18MRP+mp9R1VeHY4ErpXeSg +37bchN8xHn8lFhRCsumleHQCN1oBHnM2Ed6Qsz68nwDG8jsmjmMl76/FDgWPgpTlvE+x/wuFAv2K +pgQr3xEByX6aXOlUWfg1VTljuuL/wLczd/ucPktHYYDIInWpYtVplIm+6KO1ZOOGOgBwTrmXMeKG +3xkHJ/LNumD9SG0+MAd3GB7or0XgLJ768vG1zp47PVC07/pmmWcbKVxzwyZTdquaH3G6zXfSB8iJ +rbecQKIddC7EbUGT0BCrP3XvsHbc1n6INErPUua5ki64PnXuv1EwCl4UvRhOF++g9j0aCAXW+lso +jmOACPS6WsOyJ0aA4ahLvg6MCaeDv/r44KImSLz5HbFKd+B4QBvBDmp/AuvuEOK8ssjeyNX5ub3b +CJR3QqB7bUPZwy+PJz2mxMc3LhEA8gST/AqSJUhf9OmyZXJRTB8A1/VmCXqGaxhEVc4hvd/M0Djb +zO5714GOAzVsrj6BchL1lGQLQkPmmAKjlKuUtS7Keh4yGvSsrkdonvDRhjuxCPkmMgUW6ozkejGC +NUksxiu33QR+MWpzx1KWpAk5hNbUIYIuyUw5heG379nYU1tVf+l9rOGhjs67+53yuw8Mjx4tKQhu +39AChQkvULQZGFBhSY/+EK9S7CAOIOLk0AH6EyQA+iQitz06LmDb5dU7r9E80z9HxWZ1bfvgJpQ9 +Uja4zrxQGCibpCeuLFOXSZ6YpeBDTBQvy8khAkgNJw0a19UEKXOZP6G8+gHCcTBsl24oT0aRYQv5 +A9ySkJyJ5wwL2LZhM+4h++rt9RN78XTQTGMK1pfsQL7u2z0xQuYJvNjE9V/5G9JSVKM+dmV2swtw +0mPKsDALa7RCvZsjHpTw+lDhtVk4FrlZgnKe2Nsm/PiHEs821XZ9t8WmXapBNEW6vzRXen6GvBJP +8yW434DP5OZyFoAnc0QxDgrRmnqVWZL25NU8aHullZAYpmcs3o1QnCxZnk2Hp/wWvPYt/6eRHYad +iNEIYtoDUoHkQDdd5lC5xR6tpmStxsQmuc7xV4BrVdEBYKo2nibfjnX/ofNNCSswWf0JeVSDoYvi +1Q++uDnOXfEzclJOyZWoX4JdEsjEaApfyZmSmBsrjAWnGRYjBq+ys/77a2/HFkj6sgpSTQ2HVw4L +Cq2Rmq5js4mLR3T0T3jWsT9cZlp6hmNeGTLIM0NbNe5PVr0kgMWgQgimnzok98KfvFCuFGjD+7Gr +CI0YT8jzxsVGD99wxhaw0yI4yJH6jwtNq6Slhx96tg0ZfhKrhqiXM43zLHrBfDtwcA2JPRaYLL4b +SYCf5yuybm7EesxDMjx9uji3ME4Q3uaEOGqjn9gwRq80iEu3DesBd61vcz9PlBgz2GYsLRK2lNE5 +gdWi1cTzN8hlpREpVNLAL9SOd6xBX+6YXBA8YwyHIKjOA9WfKaM5KRB/uwObP/ihgD0PT+fSA/Jv +FXbssBio3VqGEKr9lQMSvMlOMvHt+5DQ/PvTEUkjHx2F+fPSkPFesi/ZQrZft6EZv5pU+Gi64m/E +ADKgGVusDxKkT69NG8Ph4yFLo19km2B95Zc852ehoDA5b18xC4osAfI5jprnY/e/DyAxyg35SLN/ +IHVF8Www+Ym9/agwXZxr6wPKJ0AR3+3dEgCJkSjtp+mtWfpL1uHiZyAFQOJ6uspDIKcdqD0QUI4b +JHhmtY/RQxx9P/c27YqtdguJ3WqMWQdLkCbEOyc0cdRWhd8Yj76pUdfBWDOKXph6IWvCK2AG9dRu +7IsW26PVc0RSRZyas1ZF1O3oPD6MlD7vdtB8ZNlv0/w9RwzFTCSVyaQQw/BV4sO0P44AptPnuz5Z +kltzs33VU9OK2yURBSZhGmL5QSx9c269w5kUI+K+PJKhnH7zlj73iHRj3x0DGE416gkcGz/b6iiM +9AN5MHIhV3KmRqDIFXmpM9JDUX6vt6UqzgaZ7/FHfIgSlAdoMF97bBR2IjiZFMST2BkkTFt6JnSh +hHXThznxOmp/c/uQ773AnE5src5AE5dREfORbW5Dh4Sy8PkA/pKo44LK6TvM/LEfdtYIjutJdk5d +/T+epc9o23ZOGaK3qD1M7sswOHojQo+ENBqaxaFc4El960IR87+mHknnVLCKNs86oFVOOZWZIzxI +neD8k8RemenR89B6+RMklehjvPOyMXNjtQyT8DpjjoKOigTea5xlibSXLx7XPQZJ5gHQTysNxhQQ +VRrWIuvHk0TQA1vp5ijGGun9W438I5amS2zSC+K9AZXsDWgL0ujxM2eAWJvwh704FUxZ2Nccjrbv +QXY0WzlfjQ1V2PNZA5kzBcxTRnYvwVGmsAJokfqmQg62VzduwkFUFmvDl8R+/HkPdov5G1ScUaID +nnohYN41fSo2GCYmhw2GiPaqdlumCg8ViCdUI77us0yCUrMCkZ4/llMiYAXcKL4x/cMrXgzrBiV2 +ZYo9/BvFFjE+Wpjjgr/BSjXdN51aPGGMN4kuL73KkxLUza8strIImTjFYhGhY/2H/DGIaz8iJMtf +cM96ZPAdPImzBbD2SKwTb/48qmQtvVJjiUZ7MfXLWi0uwfRuFy0E2vZ+00gPHDDlzcv1lfDEa+Tt +JhQSPK91VsNxJfCKEUZsXfqixSgYe/wA7tQBVCHzZW5RZ3e2p0hcgxLDqHQovFIy7JGLYz49Kiku +MH5aJQHzeq7XPfWsoOxxvw14EQbPtc7mlmSo1b75fNJAT06ekPr++QLbMIctsRhJTDJj0p4wDfu9 +CDXyPPeme2d4pw84ZNbBkE2rs4TQQMYWne7YNZtJUdxevqARtYLvuqZTlmrUHTJy6Weca2nFGuUh +RiXCMLIF9sDPq/vQCnjXRk2xPa8rtfsOB1cD82ZvsRxZojvgaeCodOU7AyCgGrBghDSs9zhIB77w +EElHMd7MNWMHpMtwP3Ze6ywPeapbbxHxNQlXof/AvYH75/CPcEWZjcDVTUoxpRiEvSk0XajUpnC/ +Y/CFjAw5Z2A1Rb2DlQH9XLDwx0v8ILzuSrJuwOKyK/0aWhizNvKR7rOYcJy7O9qOXsGShO6YHU9d +Raty/v2ASZYYfH8YR9BcoXkyGe1EQgUaSY4qudmQCv2Iyd+plaIVmCULxJetFDnqlpXAHh9Uohgi +y4BsIs8IAQV/aWHLSJKKJIcdnLAYya1ztT+Hu9y9HZf3nEKX/BTp0dQ8d8L9uRZwgYcg1RYQyYoP +Je8E0QtZzNZYSlBWjyMc0sRkXgI4VC/5xGV+9VxY+Ab/BGQdBaTsmkajyoKkZzkpHG6RZ2dLolHS +tKC2vHs+QWzEiCUzfsvTOcTX0Bsaq6fARXjRb8VZRSpLVj0ga+kgOjqvylLcP7ycX5R59f+pLtYO +vDoi4qpYITomSZukab1byEx+sQJT0slKX+TPEL8bbSZ2AZ5WZErZnnfwOSdoBROEq+Y2EB2NQQLu +ExQruJoBitq7je+DvxSwEKMBFN7k85v/18D3YU9eSn/C1tsFJlKr7GisO6jMAbeEm4UfIs7GjGsy +hc97HcYYWRoMloXKOGQuKWLD4kEouXJpC4QTEPAu9iGT0SP474rESxXYo46xzCE11gCay5Zn53We +zQBtbn9h+OzuqJqoBJaALdYNErsq9Nf429tL3w9K+Qu8VxjdAOLDGCYrK37L0NG82Czv1DSvXoWi +iDPgjaOWUZiFBy3H1IMu8A1tH9lt+1Hhz8TEZ6aQEJvHXw81cyVCBSdgPzbZUoPehYa4uZwk73RJ +DT9UTPb6P3abzSJn9qJer3F68AHRwDCZWTFRvNlxRd8zXUf8NxfEgTFofO/RfIdJkrdyxCuiF0sQ +xwaaKXIlx1/iFLWi25QnvvqIvO/xuzSjuWRiJmnCGuMVhs8e/tpamGoqhDrkN32zZorY6lJf6mpW +feQXWFlQFNwzefoUxoQc7ObS+/pTf2U09Q/Ku16zDbQn+G1/qRckWGdwZAng5T5b06zgJ8QhG73Y +aBFvYWJ6UImopxsEh82NWu7e3I/TT+Fi9MTkDXT4FzDAurnHMK5srRSuZZRonDE1/N9UfL6TwECA +BfJvv1PLyDT2NBDQkOs05HvZNx/FmCDCUqktL7kkF6Ze+rT3TYPVtFezBUU62MUPxA2BjpxvBTPq +6q99RLhPaz0EoTbJwjzJ67ByVinSfNeQGbBAdTc5IAv4GtVLxqRew2NVYl3AyYkSmp6P6JiWXVzF ++bhrvUEOdPvAPKEqgmu8szJGSuy8wZ1jnKIMsuetyuvj0/+DlJ8X4j0pd3HW8juLuJR7EJzEqaUb +l5coTihYjHk1dvbVD+06AeqWSWi5TQICkwjNbfC/t5A0aHCWAA+ygFoMSstZJrnGQCgQqHcoPsu+ +BKM6x/iTVyvBPJOg+sszuuIyCZqUCyyE8AlOGj56ZSylb3ZzKYsfxlxU4LNESpsGcKhVnWGfjai7 +g7mF2ZWYuzOmUDq+IPrPjCCf3B0YZwASTc8JOUrNiPik2PKHkZbW08Y78Wr9GKjuZG3ADy+AlEex +QDqJL3eg4b3Cjt6rgHYVIu/DO5st1aCsKPoND3d3K27kSPRYtgLy3yZOMpUHRQ7wNkQVY7sKf5XE +4v11HHVOMhnXWBmg7D8L17AFGC0AynIX5xxm652KjISqguCnUoEKhdmWL6UJ5VlL+f7wpVcxbDG8 +JNTZeP9m3BCaxOrSVUMJPXvL0fAPE17z7anq77n7pnLRWd5+PTi0iop9Hlk4JzZ7m71/uU4myYSS +WIEg39fegQ/h05Rhult5Kn4DhntUT+PoLS4OhAvUWPgtBGZaab6Fu47EKRNewJY32gyNQd+/9IO5 +BDRH37PI7zRnyyVZ4TJoBVJW734BeGJWlcKLHxlXRHm5ApRhoKyRWUwRR5Pp4ocJIK7cxXlFY+6E +C+QKAqwzfkzz23yJLlLRXUkTXo0tjtXsWTx3klbBiSRQ7hW1X99CNNE88wXu8ny820iM8sfz+Q7D +v8Wd3ByD9JhvvzncPHCY2SL5uAW3dOm2sBhr3v5RWxsg7dKZzrnKMKizsJYYpPGECcVF63A0TgjS +Crxl56SSd1TDdqQsr9RMZztG9zeK874SfE87BtbZS73BRDMC3OUbqeEE+Sv2y2B/u2I3c5TLerZg +IrPXDWCUFJk41BIGijvqDqB274CQ15pJNVYqXd7w+LQx2EdKMTRwNbkWdvSAylJ/n+nnmzyMf1Pv +ZDdAbxxeVZQJQV2eIo8pD50+4V8RsF0EkriVNTW1K6BdbuaMKzmGxdETbs+AZUsxMrsv446MVcvP +zUwKKl81wPxONtp30sRcpyaYwBavb8O6tHYxQHAo+Sxz2MGNpztYH/83zSafomdbe1KUYPHs7a1Z +6o79+ZWtj9ZadyyPO8HY12vpaz4huocRWHiOC8VbBYxIA1C6hKl5LYxHDyr+sQBhsLOSV/uLc1Wz +8ikP2AG4GdHTHNEcbkluuCGJx0HABwpUozF2vg17EY+hbdjSbChLMFlFSTmAl317MsYMe4NBNPYE +UkkyNOqaeuyMa6JwNXPQ3YWI8C5O/9gDAbwkQ48aWNosnamVrw2+TXlT7ccrfkSUsKxT2hzB/HqR +rmX/jVfstD+iHjbINehX23QuD9ETeC7T516peeawgq1bItRHmaoMSJvm/BOiI7iibQOTmhF4N9T0 +/0rF6UJrLnQ4pd7gnV0P+c5qSmmM1VD8yWgagoD+6K9DE14o4ueeSeQ7OCVnQ2rrT1CFzFeru+gf +ZBUkyc70g+cM3KFsY0klFLjV1hURMBOmCiR3TP2Uni5gWuVezBvGzkFjzW6WI6ImRvnEqJP8iYtr +g26oGgLEATsQmnfJLtjvxgnQ2A1xrTXA4bUiFLyznQevwdphjjlkZmOxjpbOjDV2iatUIalEVBYT +rw2GHrgYuT8/BY6V2ic7kW5RKavF1Kb7m1Cf/XP7SgFkfmCtwGyHZRvev8rLNZ5PfdcBORWjxOJy ++sUCIx1QmLS4ORgkS3SCA2bsZrZFDwoBxFjS/e/xUii2STdlqD0Xu5y3cWIB+Tka9spbbmeDqkTx +cHqCviiNJ/QIta/zGBnqfKSSND48NR+cbAycjWuLu2948zvSxT+UIRnhzZKKg9TkzwcWpU74iKJX +1T9hI4wKjN/JdDbaxlyoVkKcB3hl4zdBVmJ4hQU/b+5eA2ahUSHDdsnR8D/obzIUt/9az7SQM0f1 +GM5eM3opiL9HES6kVL6qNnSREvAgQRrhIXGUD1JlHdj5tA/LoSINSnrl7KN/AikXo8ZEs3av1RpC +AXwZttwadZsMJH5quA39thJrm7FIE50cOpSRO6SBBKzPsvHfnzmTCQMeWiwEpKXX928oOtei+4lv +KItE1bDywEljrf4JBOsqjEEZPRjGNKvl/1bVMUFP8u+UytbCzBdvA1gmPCumOhzczkuhh2orRsXg +ztNBsNqtqWlnmp9As2u/9h0hx2V9wFxBxf0wRVDDyMstLFsg5NH2ujrlQlVGLgpjcDqeqpB4AMlz +SOwYZE9lP+3zdjoiHTthukxT5ntoR5FoU6Eo44HguVpjk5oMzXPG7pBrropBywHMq0OLbtXru6FD +kICLLdC2E/jyv7aXNVZi+STE0n/L8cYW51AUJbD7knd46+MLfwdO4pCjaQOkI/OVGwtesMqKi+lp +0ejzQbea4VrC0m7mZWDq5gFdaOOQ/0kVvyR4yvS4U9aHEFnVNcyctM6MmzKk2ifyLP1lHWeCf9VK +Q3eyyMRIMA4z5nbCNMk/8TR6umCpGUJEARPnfesXwVlLySUVodQk0pLiyCNZjQk10qARzm8Jy6hL +18qy4Zk8vXrR7o4bNWtKo4wTFD6DZV0VWIKib711wJ7ON4cP/WaMkIZxvV1IQaiU3Bxubcbl4EF2 +etyNlDk6gA4FqPmmXQKadGZ/el3JOJi7CKxnnOmt/KXGiYCHpTON7HCGnXaXw4PblJtZn559wWg2 +9Dco264/5ziQLIHBb4RQIxCU0Lvdp2UOjfaPgyverayNlGj+sL7jhwgot0ogNJsw1Ub583umKhCg +60I3YP9E4aruZgEJYb5FJ2GF/RGLkmJPuGFmZb0W1kESnOXSj10rPHrFMBEm65HkEAYBGpX8lurN +Z6Kf1tmlTNZzGTSYuBlL4YS4KKa6J0Xj3X09nEhDP3Rto/9wnZwwtsPS+wNbJ1accpl9MN10Qi32 +AwtxrDRwSmRPnOe38e/MF816QoApQUyi3DnjCiRD81plsqbFosAJ13K55YoNCmWIh5Qbih1rB/oF +gjk8FvKM7VBKnUPj+/wegwAaBGOfrTXeIW5cBTWPkf+ff4wg1vhPC23ULIF19wWo86D0k3o6P4WZ +l9P9N6QbEoOmnw7uj0O+ukPVj0tiEEtzWhwaSU8eGa3XbbhKLnUU6vwDuMMnh33AjWtTrn1KCAVq +s1SbeWlF3IR8zop6vzGk365RqUyuAEzmOjuyjD8EKJipk/qbvYMguhx2CInP409F1yVQdDuM5s0R +jMwkHrEWwuPHPkzzEKD0OPBjBS6KeT0eGordf34o+ntOfXPQFchvM9c21AZqlsAEmWU2BsvraT45 +XN54b/2Z3MVmR1RfGU1tUMtXQjgzTlTye9zCC+On2ShuOAVvF5u8fAz1BXrFGA1jQpYMhgCo2yTA +28RxjfqvgMM7tsHd/p7MldK4hxijqV8lJfPtN1KtjpHik7gsM7fmUqb3+m/0qydSY7IUXOkczfgd +RDD2QVm4GmgsrFyXy0qmXTNQxz+8xMdrweQIrQhlMAyxjcQYMPb4AWvV8BCC+thuAGyNzbL69BRg +xhWO5oojK1KhebgaVSGAnqMIHTWBj2tplVBSzBd7bFpI2wXdBWOc5o0B8ztk5RvNQOgs+RfzEUrq +vkymcBhLpIVDQhU4E/KWu2UVvZ3m6y6phzdKIXOTz/R5kLLKp55qiw/MbyL1BZ5Yj2DYenWX4ZD0 +ElIkxph0dTRY4YA8F7ydr4cliLZbwwj7QsMTUYV1FA4G0LlKpLULNm9OdUu7J28L5YEgYU2NqSzp +n0d9Rewi83ehso9TfGhog37+YcdMDCzuIrrP+8plz+rpsvdG2JWzimv8s2y27BV7F3i7BQXBZdTX +561zx+RS5m3qZajF49jK9osQBJ+xHvX4x/04QUItdnZrsep5DtVRfmO8CqCS1KQv4TizZnnMoZxd +ktM7qVPB/Z2NAQy4mnVWw4NTe3HrfrsAjvRFNU5eBiaDhx3jBTC6eqQ5gOk226o4Viv58i4GCRv6 +kegVWyDVlNTW/f2FSIll26sP1xiXEDUQ7QwbFPkNmobx/MrSNsWV7rjag0LSH34WudTkCzN14tFc +hr85Fo3ez7Y09CFksLlRjnB1KmlxK5qTxBGLhtnvWh+bPmB2WUOUj/ftzRzbFcp1L34Kl+ahuCJQ +RmjBOTL58G7aqiFFuUlhKcfh9AFiRdb2RCI7+M/owz2io12vRxFN46P3j4FtwGZbV3EXCnU1+7k8 +2JQS10nLq9nKo+UT4sZX+YuoE/GHca24hE5hQZ1so/O8k3AugmAU0x4I0Q/nzYaxQijrFkG5QlT5 +jpjqMwEbSjqOJkXzMJLCH33C6//mq8AsgLYqxcN0VTl+BQUOYd/wLUtaEgCwky92ZDPEXBqk3IkJ +TrUE3Hn3Wy9KqGrszuB/mihKHzjX0BCciBZjYVMFU3ooOQFQAZ35x0q1tV8dNlaW0LyAx+qwCg2w +0z7xdwpQ0eqsfxjpWJm/xEilWn08WSOwXNwK4bp2jdypFf86uEhQ8iEk2/MkuHZQ8fRNJ8h1HkBm +M4EoAXPS9nI3DfbEkXwE6OBNe9dS0yDkNZisU42vGVWdg2QUrOljUm9TCvPNDHgNUSs5rm8t8dZu +/qIq3PSlqhJZB00H3fNgpjkXBQ6s+3PQOS7nBsKFwWPeRwxb+sJ9bRrifV+OUTXLW4BjdJ1j1uiZ +OmyCXTK2gkp3m/7D8cCma1OsHXqt7hfxalx8lMlwuF6hrsXaP6S1Ir107POm6wf0CNfwkJphxXjE +y2rQFja1ZpWJcINax79t45M9HzebtYH+lgV4D4Yo1MxAmmbRba6BsYgHL41qkPgvdwg0Qthhdmi9 +IWxAQmo7nXzmxTYQV1wFM8vi9XzXyJgmpmowLr4b7OSxXpHwTcafiVP6zYzchNIs8HmURCpaQbf/ +yrObKl7stvOSytE38U9Mr5m6VUL3ftrVoZbxWBaYqUqQgs9gardInb+x7aRkuYrTnnW3kZW+JvvP +4YfQmytGYPVSII0h/9B3qeDjA4pAHY7uXGCjZhGetVot7yNKj3GJoDe3n9I5GvuA7giuI+pj2rO7 +JxAFtoZxADfQfC8RHIpvN4y1S5y5BHyJZHXvcDKMZ8Lpmjn80/AWEslOHqvYammaKMr7Nz+7QlRA +VWmXGdjF1GZpqyk9h6KJCI3+MVVethgODw0cXu44o0/ioHcvmPvXgtY4lexn+Dob+hXWhnzgsdsl +V7kZbbrm53F7CoArgee0hafB2XOBjOOmGWXsWGfwTFL1n5Dh4ExbHZuYMgyWerPKdcXtbBGMlWjC +B+SwIfZlI8hntbg+8uFbhjXGK7MTAk3oX6BBhed2p/Z/c15fYXSWxusUAvIaeGGLWGsBG28KTaYM +DvH7olB6VdulXY2z5BD0RM9sKN58TL51KTAdSqbosbgsNGqOYpf0MaG5MTO04ny3b5reHaAAyvNg +AvFmBwLKdhVcLqw9ApotuNHz7fWCoyIP9RzqngVymCu3pYBjo2l3zAs6ChsjImrRCNIjA3ceIZDU +1fkz4Op094Xunfppsvg+O10SZ4DIQlvEC5K4bnywvsd5nrostbP/Bg9XO7aOBUqY2O+h5+VJJ0D2 +vdhkwNNac8azBnE4QR/1hxuGSTGgFX4CUaoR1ruJ1WrpZM9qb0K/UZL2v3dqtanGS4Bx7juHimS9 +EposzQbENB4dvC7MoGRMcp3XUGqQiW4TKXXMkfQHHOsW6dUl2wz1lT9ONWyBfrov0YUT2mwEXekD +k7dmDpmQ1ZfmMli1K2Dz6ePSoNJxM5zemwLN6tVM9zJp26TXin1OnGVb6A7VMtN5GzTEvBDX+L8B +l4WgaR/mjtDSwmIuqyIQJ19mht0RJMNqRNfzICqNZPLEqDLZd5glO42t7LJ1Jmreg3adIfxUqi8w +97iUZmXMAOJCSm2vAlDlwTAISf+jyYKrjt83eCRF98a1v1YQo2pPqI46r4Am/Fk75kNVt9MvhxqK +2+Tsdni0sTFEipyRhJOGeqROGzz4ekuVzroFim+ujfolaLl02suc5vm1AGcAEYEkIOhKrQelQo0s +QUW4H3QsnaJXuIhAcl3CC10YsBGgFL1gFE2lzVtGv5n+XwLOoxluk0BERMAv6xR6myF0wWV2o8G8 +3H0Sf/SdJWAA1NyrpYeOeRsfc22olkWIqr/rYahvjRJB8LtgqBBAfeASfl5zfPArA3oHpWfqq9M6 +7fIinJb++LtZmcB6Yo5/b150O722FwOHP5DUd0sSpt6GpLwRAq6NDq2kxP5mv3E9lgPf3Ccw4fUu +SBbcV/P+aEe1a7VHd5QqsdnxDYm8f/2RNtjmwKfTFYBfgReywFL9v5TfSgXcC6MvZWyLEtBg7AbH +ZdcuAc8y7Xs3CmdR5GuWA8UtWJXadoHxxdZNqZU5GA5s+MuojD0nt168lKgN9BII06VP5HpAnfB3 +njnHr4yrm9RGuTaSy9cWsUDx7g4PWipsqvJZKNSanR0S0mYExSiGRHtqB2g4uHGM80T8sOaBiLDT +veDbkqRxXU1I9LoUXmKGRyhD2m18PmRCys4FusHsQtfcTeH4aMDted/KPK3rz7pPgCGITE4RKXEM ++5F0+LkZ0E2g2PB6CK68EHFVdF9ZpvRtdt93m6LSzZQmtPpJgu/ilM31CgrKg6hjADm9SMxzlZ7t +48C61co3KtNPCPHhYMXzbMQ1FGbRbPgnnVC9/pbnU3Z2lLwAwtzvECilvnJwQswmczqYRlYEvKAC +gQg8YKD2oiMrmxCJpvhyfHvdpY6UqtCR8ZixFJDmwIQtcOZBI4SXAiZOm2T37ZkNVYxX5qlCGcyP ++wsfkZpmncJ4XdtSKYixq6ewC6GfszJrrWGSrtQewWHGEvl/cc8tzV/o0XW2Xi33sknMDuME004U +FvvY+CyVr5F8BkFDoPEtPF0P16Pz3l9ROa3JzyIBOptpvt5h9ybmhMTDQSCc8i4+heZYi2P8E9Zr +5v786umN1JNNfnYhWKZfFtYSRoim6rk2gCk46faNvweXAbdAX7G57KAhYK364nVH7gg0HIJDlzb+ +WiG7WHOKuZLoGVthk3XasJVOkbZpUOVSGaYh+G3X1suOOz4DQKnQof8Jjx244ttniGkVxoJgLtXW +s+GekySRczWjbsaU7Za9xfCQVg3tyGZpDXkoF+TSKJa859iQinHeGKPpbKksTYYPh+E0YbsiS1pI +yjbyWJyKiCJqa6ps/+dUSx1WmO4PvX2Y1P5LqOicQlsCSeJix7OUoP6QbwPADR/weUWYUubx9pfj +hnmlI2jarkMBNGwlDJ56cRaXBbF3RPlT/3G7FFQx4uCsNUx4PZ/cDMNjHayMQQLz5A1D4lUjmHPO +QPkesstnQFKoFNbSZw9svYCIaSAojH2wTxeuwLTZKssfF74CRdsZ/LooFMESjzFLv81tQCrZsK9+ +uWAhGCTHsAfefwZJjV/9Y0tzpUbY610xGpTsl7GUr48ZahpLRVyfNqtm2hX2c8UPem+PdJ7cvhRk +TLdAp9i9t9hoXmdWMcviEcPma/YnmrXEeX2xiXJZWSfF8amHXhwZGOYNLqXw2u9PoJN7xOhg5So4 +1s9kt8LmzIqwmuKUC/vUXJ7KdClmhbXdZ9jJSkoKUZd7dADGdcj1pGUnADEqlXH9ioVTV896AGJV +Td35C5ofdKdmv274trRgMWfUcV1p0N+wxpVXshxIlmhguZfYnKfodQd1HRxc9q+sQEn/ayqrakhD +LBDu9CAOmAtrWnyMETGawbWu6ZB6UN1FUTQlSvp8rgLAXAMoBRO6fto/4xtnixjP2jDJhmQYqFRG +l822fAUastG9Shk2jo/yKXBYY4+e2KW9M1mF2439BRKkDwlVNB0g7h2BPy+9MgdvPHL8kBLnsKDh +PnxLGb/WBw1aRcGqT/E5M2XCgCqLyzyW03LMuQ33KvrnYvyPHujXHPNfdNie4kHJN97+MWgHQ2Jl +Qlue3UXMHP8aXyISkzVIQ4g6h9Lv4dKM2s3LGmzEwF4qf0vEag2bUcOMHlA7IO4Gi5IGq/r5gKnx +ii9gu6dbwun95aKjrz1gdRBeaCaPOt9s9Is3K/ZfdA+/tLAKV3Eb1BCZBw08zakUoVAmEZXaUxgK +0ZfLCNdsChAMILueHlANQ8mfbPs9NkqI8Rk0L2FZG/QOAUVv6CugMwwyWyaxLQSVmKo6oHwWOc86 +L6pSad2nFM0zQZKEkuDzjglNB5/9PGCU+2KmHbadjtk2XWubeLMDUlnRWb00xiP9eJKTcubAIXFz +qwAkxJIeI1JLROb3t0r+RuefTXqt+jSkTl+9VGBdMSoq7pc2P3P80/h/jGvPwCsTh0Ns9LSE/NpM +m+/lzfT8Sk0psbtvyDk1JE0Vby8hm38cHq+qaD6FbxVqRmkUHfZt42hrOmbHD2oh8Or91SBDuUSW +2V0H6vHU83iJWAa8brDX7EXGbL6x1fzoGiNjK5C+6DFZ/QDVZ3F3Qziy+2IfJzUawoIiCi73AY7/ +Dl6VWmQezSbo3qr1wEIMNhjkOOz8eApOsl7pFJ8hNZg8U1aYkVEDuq1VnDfM6LpbMjHVa4Rf1k8g +TpowtDKBFmHccDBM+IEwMxUh30S3a+qmjjRi41U/QJlMO/egSWsb7voQd5vPlCzlD5EmIs89uDrc +7jO0c+kpwoPPQUf6PDir8RK0o+F2+S6eL3mQWg1v1lWSlqpB4p/RhAzgAfgjoAgQWC7zA3Ve9QFL +S8EnNmc4VtqJ0H3L0WjkpUJRfW9YqIav/9MjsUXizi83PtlWJBJMaP+qmbV+ov1jWKo7tReOEL6g +4ooh42qL++laX/67+aE0P/jXt+7iSMQNh42iygJRR6L8kGkU3egqRnWpupRyka8FHnhUwdShrhpf +jDlEN2X1HZDJZuShDULICzJqmBudSjtCi7Lsjc1UaSgezO41GxuYAla9z8hGniWhPibYjo3s8iSt +1WYtWxaMJKlvSfa3jWoSbQdjjalYI71nOtZrALS4S7e/vCQqNYfTReFPuJk0pwqnmWHEofrrjzOK +g9r2TXb+ObIpN+JJhmI/R2JnljMg8o5VgAnS6jjlkv1s7cXHTA3qcgUabdRdIxgmcfS9grs5ycA8 +jxDoW85Sw69eTm2HefM4gZHHHa0rcMylAmHD4H5HmRRC5qPlENnEjDjFTp5vCF7dGO5HFw1jWN8r +uZl5Ev4Ta+EpTdmboGykscheGBYVT1s2b18awmZdCKc1ArL0+1/mqXih5YM8cP8y/bw6IkfIcxAH +8EG5wd1//EHNHz1ERBVz2cTh9suX8xR5tN8aAg5DxK9GXvr3yN60a624FMEIjAmf9yJ6u0VWI6jn +b611MaaT8xMvEqs+MIY3ZggQIiAKwKQMkTJ6dQzYr/4cDuulhNSgf9QoZGryizCjq47+m+d81yB4 +nhMBXkTxfZpORLaiXTDbaZiHvvF1O/8vaH4hXTm4OF+W6OGK8JygRPBm1FgMkSTO3fktt0zbg/wo +y3Rtbiz4MRla80wkrhdNL50VO0DGaW8SqPOfkSBwYv3i1smaKtWrziTW8NTANPzoJqMtiIXsRsq1 +7klqcG+tSQ+PIF+CmHA4vMUOd3a73/IciRuTR2AU11MsvCBwaOGUnw1mBy5xDvJEPP7nZZlahkYe +7nsSudJ2X8NLMV9pYyHYSI3CJEKSW4Cq9nUccKre26s+Hz485hTads8RNPVrVIUzPlzHCYlRoPms +jEtaDW0sz7RxV6Taa91Q7iXx9F2U2lsjqqiItlWkHQ1n31Kve9rikpBCeMTEx0d+3dSvEZN/Nzki +Ya4tzAQmoAoz+CM1ksAdBWXoTswv6FfDi/T+t8qCkLzcmA9fxKdLhk1RiMUdMrAASRMzje9Wxv+i +XOavyCeQFxWP+tXQZ4zImGcfOkU/vB1ILGZfhblp5FOBnlAjFkJHiaKbjdkXbiNedW57vY9Jgh3i +NNdIkxb6ti4UBPOj2BYTjnLcgdyXkr3g894YQNCXKDNj+tRNcsB/jXgcXbCLE7a81mUbdeGvPY+2 +v2ASY/s/CRjWoC+mH2luuAITkTJnfGbU8eetIOvlYaryQ6oJHhcHkz3n13K0gY1m5OFmD6WHVvom +flsSONT+9hf8Tc9b2YwXMEP/7+9gnoa/k5wbTDi1iDUtRMoCpF7IKHkwgxPS035dFseXabCLMXt6 +grjZIyBvla4M1wWDpM7dnuN+3b0tdlzDAUa3rgKPkxuVLpSKxLCTWcA4cGKxXm6WHcEkgL1Iyor7 +r/sfxqurz1+o7Yj9fZBcS5Ti8yZFzv80BLrxJOv/hAkpUjbJevdOW29CQpOnyYxwqm5s8praJZx6 +luWihIOjB0+lv/mj1cWlq6qd91VkjqRwseQv+GJ8/kvRV6fFcLPy0lCNGKoza6FwmnffzRfa7B5/ +1qLJ8Zq6fGU0nCDrbqG7uyxHtJ4Cv3PpFjLoXJdgSVN+BvILW731t6udbJv5+OtWOqOUuHABafOt +ZQcL0Ce7BjWhDeeIcqqKTctzyN3H1KyvZ+Opitg4lIm59hmVD0aiuJu4X/IycizxPP43PedykHSZ +KO7TFXhY6fZaz7T/em0JTUFFDAO+3lDE2Un6XnkJ9fSogWseK92sjqCaOaGg5XnKQQcG6r4rVXtz ++sVNctb/gVKHlZ4NEmtFMq6+zYOtHJpz0ym4DZTnDwN6uZBlEqsZM1xSu+OgZAR56ZAN4hF4/Zxv +YNPBvtT9FzyNnqVSAd7MGglSacvDENEYJGQPYHXd5mlIWNkLJwxIz8CEVh0byT2UdEMRCZuU1d1N +MFPo3Mvp3GJ2iI4jzHXu1dlboT/N6QZ2egDJ7y7kNSWTclh8sAJ7LvlpjanDm0pO3gDmPgPwXinm +Jf6Yt43xCe6LRAD3lfjTn0GwRJeZfEEA3XQCQNtK8l7o23NDsrBxgAhXMQ8lxDeDwy4wYVLxYbXM +tYd/5V3b0x6/1x5LRd4hpjd2Qx58tfh5ltruunZMwCG1rwQLnE/hwQi+Y/82QRdGelBm0IhEjy06 +sGsgpwibU5kPzDCFScLKUs5PR8Y+vQtebYRQUqgq6r51hJuEp3r4rAZE69nLK7+/uI5GlOhRWhvp +4CkQJwjCYZs5ndwt1TvidyUhBPwQBUffPS7oC0WUpIgWik91d97Jf1OIqtkZQGcVTuG4viaPrvNX +bWRamK6/he/9iekP3Hba8AZMcVELnBjzBHCRMQuWs3yTc51j10prTDgJLrgcJshqfQGr9Et/3xuY +2sQJ0rp+PFSpY3Zrz0bVtXCEVqLyDmU4/BN5pOfegAxztczYG86syyRHmsRwxBoeII64nWy7lckr +YuZ9fnuORaonlzkDtc2RaIff4Q0FZBXh1Z3babrgTm6nnmxnfR9S8xXC2+z8C95LJkXCIo00AQOC +o1Dcdi/bp5tPr9cDhqm6jd9F6VfqPzBEcTiPQXjRXPagS6SXPZHxG+Hp/yb1zV0UeUbXN4AyrzrM +BmRkUOMPW+15n1mk7jNMGIeFLeMfBYOEb/u+mlfrAJqHfLmUBm0gIfJy7sxGww7AeN9EaJO75SRZ +WYmNx/sGw/60Apoiels89sR5QxYn/T4bgZQJJQWv9bMO52NC9kvo0L01qcOYQFyvbx6r7aS5rXES +cQ0cyP8RYWFTdh/jc/Hu54VC8XBkLLiLZpOovzuzq0tvtYhpFEhZTT1QLkyR0x70maPJo+O+JVRy +pjbk/Tf4JhoIQPwO/nmV1rorxyqeFspJiIIeJooR+9CkC52w3pR5S8/S4rrSarSgIaq4ZMvh/ZBN +fnPLkfpWZ1ECOHNVPzg8mWBBs5BbgO/kvUmwJXlrHAOU1brFyz7ivm0KWATAT6em3aTvRP9DNiHM +x2yiNOrMFF/BK9LzyK/Eu6by1p5WJu0JxvXDtpcWT6QEwud6IP2UHyZq6HD4pMBhY+d2cDknbqcw +m8o+h02Kv4WHsjx3PtsfCcDHypyhNZjbfqw5inv3WlNPYuHwvqiyVR9ple97m6ZVUyhvrcYxL2J5 +eew9t4UbntC5dC3k+0ll5ektiG/wuCPQySRte2b5xJ9vpqYmEVePm9C5jKS8SM9YxbhMt8QomqVK +cDcGK6FGjevVIeYxAtRj0RnjQ3xriXIfj9zR527Ii7NYAk5zkM/91/K2kxYEW9hUFYRIeHJz1AT8 +00wW8kU4msTJYBfawIgOE9oK51mW5Fr/IBtr+9sCHdnk/mOrZPIs7+ByBVBPibNktf1IsPFGhXyV +k1oW3bYL5LyMyr47kHVzj/xL23qBx6ev5oa7z+bGLS6HT1weoTqEs7e6Q5IvTUUggiBwY7ull3Ey +8b6nrYky1ec2TfL0ASZwI542L+c1CeEDYV1BXuiT1Zvogc+hptokZbGhBEBk+hh8DP+SCnSZCbp3 +2kulJCy9tSfY71IBE3oqGga4/4l3k8wyhzlCUFY619BcROefGW7BuhGcZagocxalamlA5QNPlsUc +CCqKQtxSBRjjakdwJh6FEDRFr7iViMQvV8J5kWgKgCbF3f+kqrPHGrdv6Uf2Qj96QrR76seJU+yf +PB7SMz1zYwtThCQ8kwKDgnO4gWdoNqjNlIYaXp05eCGOh3Gb6czzyBNJImw9LmOAAxkdUcE5rVkN +ICsKx05+cRIj1LxJZLN1ggCTWUwSL0UAsaWBIFOoh3licrmtq1DE8L4ZhGBveolCNEJiizn+xdpl +bZqZhX1ap4PjLagcxEvjoLj8408YiMckmBmbjb9hGf/wryPtBAOvMMwShT29tYfk6yt9FrCwQyn6 +8qeFnn951X054fCH23Z9n0wW6DaV2yPJW9zrjYgLUNyzSofB++HgSrCBfNvAo3r4YtnU6Q+sMq4g +/nFKhiNOvs4yW1wSfF8rTuC30OJvwUyr3+0VcMVZufJ1sDzgQpUaRVC5w8JBU5NUJPBK+gtSoEJM +M8Zl3ugk130ZNOGo7T3MzGlcYG89EGGfGDWaG/1aLukmVwEQkMX5b1RazC5+wtN5wFd9FkOSPwxf +FGCwkTt3cTbjhmEuSZKMliWm7S2KHj0dVWG/9XCV5M3x7+aBC7ww2aa0fv6BPnVSefXbZUU5Kz/I +bWoHYvFWZKpeZOjNP6wStSDZtzWqKxLJrS2zzKw0XLXvp/6PSsOx5OBpKeliunDMPRfr7pL8VHb4 +4GyWW8ExLI6VdLK81efKWFdBOkog3kJMt88CxO7wMoODTpXRYn2UyGcqVMN4qdIcl+Voz7E5btvj +e14Q3bqiy52XBRu2lKVYaRh7zpy9pgX4+FQ3WFVtMI+QXWjhamEwK3uUImw5TKVxulLd7dTbOfF/ +u0BY9diP3i8aNFr3tePhHuBSUfUnT/Aozw/87HhNgyHBqojLJPJ/GR+5mK/934BepjeWmVmFE8qV +ujf+/TY4sb86A18xe2mRmKlnc4q2cd0sE7g3ny0APM9jmyWerBtx6C2DVyXFTzRZEVysQyQG3vFK +i4XGjO/CIpxksUwhf9z/Nfr31Pct5H7NhpsXVzPiTEMpiZh1JFzjEFaqDZgerAy01e5gtETtfWqF +MBcxsIfv5wedREnf4vUi2qw1o4fKJniSvebT9ZQD/gTg6FsaKd455kE1VRBABg8M+o/lc6KB/Qii +u48pIF6f2psKdSyOFIwD+5E6unRLdftWk8Wj8NNZHkzctT2w/Ow89VZcThQdW2Rcqq6EiLCcEC1F +LyBrzdwNFQhmpfrAOIQiWkTUJ8SU12usRNzg9tY20J+zqMCzV2yZcyBwzStt2idI7l8Jfg6rYuZA +f5vzQRJezITrIza9nt2asfmX6DLjELlCR8sUzOIeA/0RsGHY7YHPxES3WSaFRDRWRA23zc7xYLZk +DJ03xtw6X95pDuPccETm+rA1eGsqHp1rgtTGsl0Z2BSpo0gusKnjUK6slJhhdZSmE8nRCE++8ONG +rFsCyD2/vdZNYjxk+VHt0fBKHqZbe03iSJnWhsA3qvldR7xENz2ilBRzKT8yCZxHdoBebrBx6Wpj +ZFTYSkVYwelx1YtZ/RJ1eraDCa3QHJ5JvNa3KRcXIE3vaSfNSzE+vn2MDZciRwltEBznV57q12+A +6K1hJ798eLSL1yzR8nX01erxiQNv9s62xGQXb/fPeDcrXCFzc9xqTgqpK6x4xtnWnEQAZFM/ZvqS +vNnzMlafGPHh9FLLSFJEuw5MFgE2ffK5BMvQwAbR7amGL05RD4Py7dg+jh1bB6JvmiFi2Ic91Nrp +QtR2C2tW1rB9eHyQROg3e/RWJUYCmbgAqwZk86Sbt84yXQCjW8EYG7oja7ng9Nux+MvaCljBs1qw +KIjD7PSoZ3jcFu1k/TEJmuILNCrQ7ydoDNrt753aNjdzXEcaEaH5GqJ11WTXK8bJ8wzJLXpBuNv3 +BsxqCmy1FcgXL2+T1sFfG9mVujZugHtvClcNJQxMXyCpcCVrwpgjTa2I/y9n0j1xcnyUJamvRFbu +LO++YLiBQ/qBi8uymJcWVWdFKNxSLZLtnLzpJOLMqzRfX5HuxG74LzLZtewVrNNyZsS7Og+CRfBi +sMNpUBySKrQeMRvK/vAaRAI2dEp03ckePfhKX2fONFPosUaP3LGmG20ug7iP0pF/R5GHdz1PAC1b +ahBRD1qkAm2vycxd9kVQmliiXRBfdLMM2osz7WL+PDgIshm4yWmvk6GVYBk2ApLwfdCQcmUsuGNV +ixjjsewex3umtqPrsanVztaBavFVkKj6NT5zVzTUm7b0e6epwzVlaXDa33hJBiPIOGoNfGXBYOkL +b9aS2cDzxaDVguwKZpisXHaaq398NfOPs3km3BgPedYsRDnKFZ0NGYLxg4tuoiqBd+BsJJK9iKEk +4VMEoJBTmq7KNNlN57yXRDshY9fnJlX5CkyXZAx7SJ6nYDZhPZ678rzQxzj2hBbuE1RhBG2tzrXT +4ISpbsgLJaP4vd6qPoJ4sAkuRigjpOF9NP0zRorq17d0d4pddIRyQnrJLfr8IecxCDt7iraGoxZR +hfqsSGOtzHl6PCw5evyFMrRzvUbCrky+O8Ul9R8qUzRyL889QJyPJ04cbntXZNzl0PcJ1RyBdMAr +uD2ISr6fiyk1OkYKfG9HleNw8O6eHZ42xOg554xOhVCN9yIoT5sw//FIBGl5QbyrPITlyvK3+hwV +3sTuE/atP7BgfjOosIVWVBodSw8qeMKgftbtFwOc566DDrQFf/F4gNduTbtfgs/0sa2axHNVjomu +h5fak5bb07e5nxLkqdtA7F+lrtealj9mMGNa5wn1kGh3GvOhXeK/jEdefcjaFvadCFes7pXxEXWy +Ab2aoa8yZAjvCys9Wx/x2oz5U3SBlwHOEnrt8YrQkUW3L7lVEiowqlHmNALQA5u88I96DQUdr+a3 +1FyytxqqChl/84yYIhVaGzW+5ra8JPb2cBZpgig6V//kJtDLtircWCp3H2R2CmobFENvUpUlKcjC +aDcQr+CqADRbqUO/sbFR17UIF8n/M4hJB5irksn8qbj3uWAZ4SZpMgbOXp7qX5RFjpvvee8GeJa+ +cztCCyHChFvE2+KYzWQ3IF/1s5bdV4SKTXwtD79sCiGMimAzyj5732rseIHUKtgNJHbeOwbwijnM +KR3OZLMJjZkQUoJjdQ9B8uu+hiWAdXZO+2pWtrpAuoi63EjdiRrAr5C5IplyEqfdL3qcTVxtlhrQ +nq7D2dFC6lTYaYKpDiKDAPfEpOle6Np3N7vbtUlfQFzUDEos6/VVZOZ7rNLo0GPnIxXv+zONkQj2 +0kr3FhXwAO7T2ektTe4skzA9oAflpe0PhdwXgZMGFJqp+T3hybU2NJjemrWq95qy2njy6hpFSFLF +uH8nF2+CriNp8EyfJola9EVUVemTwPUyEuBjbebnG5iSOkiGDAE9oS9H61jqkJ/877RWPhI2lcwQ +JqPHNgxmgQQjH+gwiP9FyM6+BUzAkbmgMUo3o+x/omU9q8PMfIZo3HgU/rbAJPpl8Lm6A0vAZxgu +0eXx0XKJ4GyuBWdM6Yr3kmqVd72WyulgV/Qbyp+VSNDrhdsbLgBmSDo4aS3abyNNt7Sr7e8RYNwl +C3V+bV21MjGiiizQpgLsYImmw/mdbLoJe1Rg6ElFC5y/sNoQu/o3FBEuImmTiOlwR+mQ452h1cya +f1iS0JViNI1q2dr1sXlpWhjJ00ZUlcdbUW4n4fHbwbiJaipsGSHn+PiXUEMfJofpRY55OlaD7X83 +PKZd024tPhz0JuRQjeJsSHBG+gyhnpVevVCvFcaXyc/RxpyrskgF6cPywtWHJ2xXVlzo1tm6Z+3h +l7+1chKKCBcaryTLp8G6n7B5jw1NrBBPrE+xC8BY6YRW4PXQ6R9uS9DmwDWfHw7bwc5Zt4w9XiNx +FwSUP/ICBfxgtI/0YpplqwWb5SU6dKh3kF/lzyyqmNc33c96cjO5kgPK/l/Tdj59xKo14daZGWPV +H1DBMYY9XNk4k3yg5CVtMcctUFrI1wrovQlX6dX+0piEXQ/feWthDNfxJnwrWNPlTYwE6UPrydrt ++iaws9AH7MCR90w2Q1zBYJ4aE0q40+c7/rJXeT9NC5jOMDaJs0RjBgLc7C4kY2E3gax3c5TrAMUh +OomSAhM7DZ7fjm44Yd/SwJvGXdQPB2TlQ7KncvBtpmU2o891ZJqnVEmCk2nh+okH2vapgdbgrNJQ +HB7lio4KHIlwlYeetFfcboB9sk1J6xhWUesPGkeXaRuYOrgpoLeEPhQbEKBYKWCgZpdPc/XMHaW/ +qNpkd9/i/EaJbLDvgT6VnuyQqJYEbDgpK4flanextMeffyTaCeARZzLIDWVzWGB6e5/mmTYJJ/Mw +OlUz+TuXA3bm3fFG36r16XRPvAc6i7Doc+VRt/nebKRB113UWCoHPN7y+a/g85XoT9aTK1mGzzSS +JlMGQd3MhokD6m9CyEJtT4IxWPuIkJhnpGX4AjMMGBASewXMRHOsNoIaUdYZtqCjPw7aga0bztcr +J3q3dZgkBO2ieUMK3eRlj5Jer4UwkRVofl9CGo/u7TMEeuLQ0f5H8nWRdSaGZRBVK4Cs3kvsO3MC +hEFIqQc1i2QBI0cmbE4X0B3FguvTcorlt+7BF4OyHwSc3DQeX8fmqzbFyxrDglesVf1aCH13vbnY +JR8aGQ9VAtUJc4wgQlvnojkEp/ODNN8SDdmvtrks78BHNcrLWvX4HWAVAsEjJbNvPrq60HwMQwL1 +WdLeF3Z6/YmIpcwJ9CAhNq8ufva1lcK71wMPh5xCWnsyQ4CsEzVb7e3DViSpXXm9Y1N/Go3Xx+cC +AAtfuspCubj2Z8QJpkV2L9FxsFWq7HfItYkCkWKDQ6NNXtyRwnPjLea+ornrjw4UUgBgX9zRQx65 +wHcRxhxz/+p0Y1Alm172ZPzw+hcJgTF9Mv4Plx6llTh8hZcLPdXjHVYkLX23EzonWoJ7SIvhNbu7 +P+mPOBCIClTTfEUIRZKkpVKLI39m+ry1V8A/w9fsEAqexoZKc3Q6nQXwzGCSot0CAFf/E+WS4sGP +EEV0MK+hA/4CTf2AkrHsJ0VL27Mbvzgj7eZkMB9Zz7rQm+8688YV242YD0G7/L1kLgqL/UbyL2V2 +/2b5HKAHGa0YimB1Sa5WzTq2LyZh+O6WZURbRbrb3AaqjQMZXbfRyrCq7rwS03jqApkCj+f4V5PG +uyUpo0xGszxTvs1QhYbQoPCyA9+iOTojoPMV+y0VvvWxlFRHUjqKMuNu/Ae56XUxnYIf483Ht7EZ +o64dIIWgn7s9ieeLcG68gEY5AO89qnYlkkuLKH0jH1DppXa8a8c/a0haxOld0FxUDa0splcDuwsZ +LgIBl3VtOBXbf8J+BrsU4Yq5g17zZoUKFHJ6JyyryNsb5a7IV950A89d7urC6jE4uXjKCN2RzDUG +jZYd8D+xFvn8ErlsdTu+dqar5ApbF92povMXlbCIHNfTlYQfMTzxKhYOpPjoXeiISUHe7qj4xq2x +NFOsChPzvM113+/mA6ilsEarIBKZSW4O60HyY+RZqIxIyD9CsDnOep/Yik9ZA7S5Ld3LGrM9Mr8z +9hm0FihPCQMJ3p5WL9XbAQX7+UhFQNthCFH1ywHy9D6FT064gj+/Vxa4mQZ9TNpmG8NMoFwM5/YD +ibdXox0yYCRpGciy9Ua9Tf9Caq2nCgeOZC8azcvmDhDmXi1Z5yV8s270ogc0VDYTMduH8DZaK0ze +TuT4kvtGrzQaIHztbw+LnRxxYOefTJmeuaskng9fUylGjr/VEZZcVmhBA+30+WqpsO1cVpOoSYGH +ZJwJVxfeFSP0ZoQTsCSDHCxdbrgFfnfB/K9w9iRj6GNJe5SqwJ08/CD74/NQvMZoCJ8He4zYPMEI +G2A2ASNokAfnwoLpEGfstSEPhZeN+HEU744aaRtUQR6MaVpWPaWyKRzpAHgx1LVQwALE856VdgWX +olpVHUsF69qLGaf5BQunhKq7wLzf6bsxKxDHfSzXcjIVMmyMtHCIEGjvoXCJCBOLnW5ki94f8y6P +Ud0aJ/fZ4UBSTMF68lyVYRZPGXmuwSbCR34lzVLbE4fCSwh+fAvetQeIo67tIIs1m9aiLtzCqNqm +s1Sp0KaC3poQGs3OCZAUi5RJx18eqgnY/qfCWSausvHvPNWQXw7ayM1U//dU+GWA4CAKa1on6DS/ +lmTyqEs0hRt/jT9tQtWE1tLi/mNyU7JF3Vrdbm+V2wDxJkhuVrpTrtjJ8jnjlSD5oUYvw5z9wx7V +Cahkv5fFlW5T/CJQ4/jAS6Wex1HlveP/d3/edZHJAUq/7qYTUO9rPisfOfKcE9uUef/9YR51hZsV +ncE58LPl64x5fL/rIM9I5e4PLxZbbabAIBU4YihoRMJGENgI8R2MEM38kPpUgjMpMzoiyh0k6+3P +PfvsqhNtzgagjG4c6XWdN0f8SZLFSUg43qt4ZSD3sya9/6qmVe3T+StYTIuNrOkw9bx7IG7WE697 +M/Jbyc1YnLyY/P1UN5tBaGhkcTnMxRGDI3LYC9rQdIXzYIKajLkIbMV6ZQY+rAHs0SufwtnXZnlj +ib1DY77VXqPSRvqCZZaITBMoZnvnJhvmTqH5OqfICt8w6eytohJxQONfmnXYSspYlnhzJXjbWD1U +HvCrtRVnfleERArfNoatBJx+Vk7082FDozR5AHx6RS+FQyFK/J4xSysha/ZRhnqKp0bHWQa5NGOS +QV3lEL0cUP9LhKnT7c4gwhCBBhapn9nAydxz6tKm1fu6VI6oF/U8p8gwXCgeiF1i6OEmvJ1Uss+l +92AMr4uvpV7QMnkb99qIU7nDqoVAfBMAWufF+HfMi0PWMBtpcE7Q35mapNbyWrXwHe7b5OQhjbXC +YAmY9gWxWRwpDL368wqYPUe2iHJ9twCRqBkTQmxFu8U3LZAR0GOzwjiz28pQKrgugfNvwppdbOab +GAa6I2Nn09ucbCgflpz+8/kz3kURegHaiF0gJNYrIRlHS3MgzVevkqy/W3eIOOBpHhgMD7hRtBw2 +F4zXJLUTLxkTR44pK8QNxYfKZAXuo0Fy8lV9wP5pqEdiAp/MJYjKJleu0PKrI9c8vspbOHnBn5R4 +u/s3VdeMC0ZKmcAuUU6FS/e6luZfr/9BfV+JcqwKltI/5jfVGUw+tfQ/EELmXbzoiU6JsBWCAT/7 +/Tl1NR4CPtAOvUf6dB3Z3VEpZksi+d/JlXNEOY56fLEGDvqrZcFywbojxub6kHTzk3duSH6SyY/7 +/uanETeRkF4n4gt85LtiOpuQPQzXyfriLrIqbmVtvEt8p6IeJjARDVcGNhNh2CKkCqNWIMEubRjT +5e+NMr/eFx73eAmTVQbQ8sBupjUXKKRVJ6BpFtMGB43abu6cN2w0dTv1rJbCE/A6Unn+xN6ywnDI +yIo3Q6KhhOPWmQI2c7nGUQHSCdaTEBOb6kBXLpauwOQPU41uLhsD2CDGRtZGG74YbQp9SbqjJH+f +dlda/pbYqmDEY9uf2raUfZbQXoFewyrU+ihXqUBBp4c+NQYv8VzeqzIB5Uji3OhFc0vtnHf70zem +WPZ4/Xn+pLIK87zqqbU5apojbcnVLVlabVw3WBS9FM7KZ+XLnMwP/jtZJex0WsPnft2+JTEXo/9U +9RRuQdaH+VbBmgZYNqWzxfeq5qcwnp9c6LjV6T5Ux/fy7iwtB0EUOesYqBEtlIlBI+CoqovXVkom +tmAj7sHWnkn/k/zN8rZTIFpKb94DLNCjsU1hp/t/nEGuCEi87zqzGw85DuY+WQz+ePHiCQwIECfy +7Ufza/g4OA8hX05h+kmuAZic8IvEzPDF0opqlHsmq6Zgi7w1op5xCPULmJNDwNy7X4WULNpCgM5j +dg1vlqWMALTqllesgdWY0DPKYuavW2rU2Dqqra6D09xLyckXamcKvWwQwMKPYDSQ3rWl4/MEBoDq +xNGuxryenD6fk1wBudGjr8VAznjMe5yltwK234wLobISOoWbrssioBArObNBz+Byp+Alk1bUhkPL +WGjNfFhdiYVMtLe2DjCQKbvZ+5CyyFMFNVkG+wg1R54eL22qSURxk3lFHs01xDAfwa1opmbcTVPU +Whss8f+jZ66KOMtcr7kZdwuxJVptwePL6tUaDSvv69A3RHDZP0dEM2yAvLj0qT4EyHKILoJ9yehp +kHnPVAkzCnSOaf1rfA0ji3trdMfAFCa+J9mg3Fc1q02lk3azqzYc35Qa0Vk72K5tS5qFNNlFuGtd +Wu1Cy5zl53IdiBbQL5xJSuTr9uaDEtxNlPFNV3vKyTd94JuHWPRFOnCjpq01hG6NCOU3OmHPnw9O +WmEa4ALzKdfMDwuoKcgsNFGsW9f8as1ULC+zgU9Cw3hAoxYRu6u8R36DPFHQ0DqpPN6c3xUfErwf +ninLY424xRme1AfaIwDrb/Adr2pubBj5qI+2pMARcD7YIStK9tgcu8kRrDJiLh89fiDqLtI0xkqR +KwIUhnuoel+vLAO5LDMI9u4OtDL48pzAfVgOyVTYdmXjm2Fv5qspt8Mz/HZV30l/Cn6ZqCrJQNjq +TH5z/zE4VaW3lhI2pC1ae8E849EDBIhjc9/03Z12HmFwZS/AC8Gn3Qfzth0bSKN9/DJhWfHgYnxo +/fIf3CR1kqFy9uVSs9817HlxpVY88Wbmln66R60AgPFkEO/YCMIyRquB/9CyVFuzlcivgf9F2xEi +E2nt5jXA53nSufvX43fBGctJX2Dxea4mrZCguj0VXNvpeRhl2EMJthE3zw4EZwtF8BHOP4jifTe1 +dSpGxt/ij66TK8tUGPBMA8keP+o+ZjeovIMxVU1768R/XaERzjTyrc8u6U3+p///FJU4JPA+ZlsG +kHySV9P7xJ3AiUfjq8kGwlDwq9zv4jk9evH2QeX0GW5/ArA0v2xxvbi5V9l13pd4ji0CPVs1rEqQ +CaMgvS8BmIIoTGZ0wwSkP60SOWUXlNbJsTchUT6WXcDpdZuRF453CB4lZBe4qVBfr04q4f1pdO22 +fGrWyJnkR0V/yoATQ0mdGpOWij1vN5Liw6sXaM6Nv0DrbmAH/lvqtwLUmWStr6QId7cz9fpCInii +lK8f7aja/+d/ff/LzK/FqNKydVPt9s+e7IPxcziVCnosMA8qVhLVk/HLd8dlSOV+tCxcgOcUl3+g +gvz/+sd7IhA8K7pC1YjQa8PXQZtLip47PyV+wefeQYpgIloqmuc47FBjX/Xd9QAFd5rop7lAU53h +PDbQkEMfdSaojynr7W0PjhMVScS7S/6jMnNnZc1KY0vnvuaw+lTJdYvrnBcYDxneDfiOCRKNN3Qg +ZnTNt0kgr0XmcoKbnWlzmxLFDoKkA4llAjnPrIYFGG9hb2kseQKEH/epqC+501ko7PjyWBwyR9OP +21fuYCMu/rLuwbgSxLnOpfccYmCt/eDz0Y1mis+0lcmt2unodXsPGLVUMJkxfkHbvDgNK/ArVKfx +WC13YaNeuuEyv84cFpCUF6eUNOVgaKVfyy+OeH2m15x+E4zzHnn3TAuLkAmrcNhI83L/r14VZet2 +z09L/ypmBsV8kQtBDDklTa+YpHgDjbJS9Zq0t5AcUMQPwv8zwTFP48ax3Vzy3+tjtysnj7J3xawv +n3J+H3n0dBau7wS2M6CYhx6Zd3CFIh80JgC6WUw+OoFjcEsatbrWHneg0X1Sagg/3oqWtahlq+bB +dLdlh4cbXytlHHRIK/+hZdDvwr8YdtlBmGzgj9Y1mQHJRxzDt1/KcxjsbDgha4IE34qohtdO0i6w +MxEu01wENwVqW+o0JjXP4Wn3kCVfFEiqjuXynvYm7RbdNkcoPwvkkRXn1AqChsSgK0w7r+OaD7UR +i+/qXXpD6gOcYoHI4XAUpy07CU8r1tvTVTGPmnbpqJMEch4gyb5LtjmeTHCmaBLPn+1UKpx+QmSJ +MSgjcc0MV/GGchCVm5HVcBhr2wwGhXkj2XBnIHJCGl7Ct+xPKB315GKq7+BIJicWeoDL8RGkYug2 +syAkuwZpBRLaN6EKiM+G+oIYDNf9K1QEfiKg+AdlJRAT/r5BfrYonsh80AhUUFF+wH0gZw+NXbkV +tC/gWg74/Sp6BR3RtAZiD/ge5x7zag1UNduxen51erxv32MyFT6HNTS4zHHygAm5TcftKqh0iJsF +SWOeZ4jffHNx4JXL5E3tUnadkPrk4DhzIMuFUaBlAh6PEJz06BkuFMUTPdHDgyP2SLW6qKONvy+k +V75iyrHAoJIizH8V8ZFxLtdPRA6+BQojVdj4vsuV1NmaIDzWG35x+bssOSu8zqcLpiJ/yUWkINh6 +PHL2rLAdlphmcYFBBa8YWgOnZiPNZdpebu5KqE8Dvai/YKivIbuJ3fflmpa5k0C+bJU3FqJqPkl8 +JKMN+Mb054BFS682eFSWo2xX5ZygVAlZmuZtk6Jlua8+CVBkrx9zWddUbz31DRYL7hzfCCSv+WHI +131cYGwTKABsrlp9pbIvKAJWGVnUnvmwhwHP8rP6/ASLGkMY7JsIG/iy+WyipGdMxXfHnKYypI9X +ccnYV0jrFtC1/vZwViCp9C8HgbABKPEmVtNh5+NOhk2RD50TI3JOBg4pIHnEv+/+WdCpWURaSMJo +dELP3sH6BQixZdPMiMUABH7ZDqBsaooUMHHN/gIkNFx6bX6gPduoPDfH9EtRpRcSq4wCk9ZOLzNq +jWH6w+xpbGYPx1STKgtSBm+TX01QkqWK7oZNGX1D1SsL3U30X9c/AYliF8dVvVeJ3yXw8K5idvHd +SRkel3I/6e9ChK9BGimoskS9e+MLw41Wox02KpvipFsZ7MHqwmJYGO3Nt6+K+ac2UH+eYULkY9cr +QyQuwsKZyBS7llzLkvXaynGA6FZDrk+fV+Je1HgqmDDTuONw0/c+gfLSKnv5FdSs6i9j6ENOBEuo +QTEOOr/lsd4vH7/oJl2k+lOE+GqQFkj/CtQyrLoYZ9419TUHX/b/pYnoh9gBrOvZhnWawE1C4KO8 +y9O1l7G8ltcmR++HYTvHhMVryy/+74m5unm0fE5aUg3nICWadKfcAX7FhYNtiE8O1kU78Jf5bUoi +UZAkG13rLj+Th60gkfRtQaJ562phkW3ehKV6TkCFGZvbbkLqPZlVYbC6jmDaQH1ZyPSnitPar9vD +R7xNKI65L1j4D/WVanRBO/RYP1fQWe+YhInFZhv8n/uuEhQ3imPzqVMUDcuGEMmK++Tqa08eG7w3 +Vn6Vd+kq8l9bGxnkva1DluRfB/OsngTu21gluS9yd34Qb8Ce9i7smesjrIIY4Eu9/gq+TwmP3G7k +Nr1WrzJ/ftik97h2QaFdttZrdpq4r6URtsp+LYOCv2jMGXuijyl9FKgFioUZVP9WFCoLMsFsK1tt +WnPC12OFJifzaOpo5qIx92rAZPsXv/ImsLHuHpDWIvR7Y58jrGJIr/7NIymQW/6/hRkxofV0FbAd +kl9XCw9aX4LfxOkOe8qHiGjYWPwaqTgB+w/flKSEDnXrh08ZouuIurDKJ5tHNiWsm9tl/PvrxSNm +hIXABbvgrCo8cfDLM7VtgSUla9fsbz/hbm+LTR2VBt6sZmB5tg9UHCScxqHgXb3Yxl6oIp7FKXX2 +17U9uj2Ddrs1il3RRtCI/zptHpQL+rvpc0KsjkIuDzE3ljWA6IUcjRfxVOK78Q9oYU446MunNYir +L7EzDvZSph3KGahLz01LYZLBWzPa1JVkMpWXC6Dl5sqimSjWGScTKyOUJPnjYR4NY+rH1i7w8NAp +/+fYVxD09HXj4mWgFCPC8/qz+o16Hc3hwz3lWy4zi5680aEzUD28e2OfKW9Bxl+3LY4gUo1wmepZ +ypUKhwfUk23A+hp/10noKl8lYTuP2OnGJRV+/uhBs15STp0iy0rNwJQ/kZUeTgqusP7EwBtfJCvC +b4p07YVF1O49zzdx8h6q4hvWzJXFkpNbU5RXAGixzMzFuH8K3kjQZ9QryWP7F9kkNkhzmqZClY5J +URZTwsCjQW02HwwA3jjVD7Xobl6qvuXg2jpT4dR6zrVHRSxFQy1jD02qBmernVdxSKJbu57eqO+d +8mCbGbA2VGDIZQf85qie8zclM/TKC5pHacRn0h5wxqH6lhS1+OaIbqfJQM9gmATw7nR3tFBrcqfw +mOhODsFhEQcqf+MVPg8dBUtFgyAhSCUbWUjaNMo3CZ2c/kbx7VwUjqAFjtan8oljXL2X1RNPtCoU +T7hN6Wm/MYX39Mlw5244QjPnhySM/lEadh8Cyhvw6G6SMrRR1phBc4URpRmODRLHRREvTp/irmRQ +sHm1hGIA074hYAQbC3GNMQmUZdEET7PoFI+0jGlY7aeA521kumVkSgyqiV9hkIxHdi78MD6aOCt6 +YB0n3q95833TMhfKym7klSHZ9EbeepZ3GM87xLWfawZFAHPy+lU7fjUAiAm/5mW/sNurNJPZX2Y8 +fxBCevwg7NFJolbn7GGtFssIijq+/660mPIcFv+Xhgl0GmE8yaWbYmF38LV11EV1cPtJiVPcVgmL +J4ipUz0f4i18hUmsJMFKP7Lf0UOKAPxXafw7QNB8FvSMmm8A84szQqfamo/flUtCc1O58BwLD8Tz +u8Ubt5jwJrJ0VLPkaHDJIcDLJ/WLJ9eXAkm19RXeZPCgiUSZHAW6cGyFtGr58jeswoTHqciP6kMf +POz9rlgL+x2eaDV5//DxnBN2RsFN9i++RBv8nz4I5fEB7deMPzbcok2KBdfe1RADed1X/bvdI7Vu +rVRJYhteU/JvBCwYcBAcEOPzmAUjlsYNOegQTcgVAtmWoN6BaaRe146FeOM0s7qg5G2zR3Yei3RP +9yP58prIsDfa3cLdU9vK3XkYYEIqQp56jIVX3hmOgkRNfJ8VsEFMJsv+Lk9jeskrzFBlXw3ZCtXT +tockzShkxdyUtlnjBPJ2bGNpIqoaHJqZoM9SO8P17hjIBELIfalZ9oSb/JEddQmzNPEnUS4lXkZS +/dP8QRGuYroSjJx4/ESlyEhX79xTI3QUAEzwBTQJ+EPKssOCuT68RDERcnxekMFVqb/3kLHZg2SI +DEC8ql39Jj0OL8nyntmzOFsprzN7QbFPtw1Q3j2DTgiHplbm8SFn/thcKLsPmMLqifcPocLRKBzg +SoZWUSHFBYXsbibyBx/HSHht+ppykbjsv+ZM/2w64wkDzqrLNvL+Ka6cFGqkldy3K7c26nqVvUAu +jZhXoywthb6Mx37GhftS3ujs7aK0nr+TSd1EhXgKgJJuLuD+WPMSwJrqrl04mtgLGViP2FALn6sY +exEh//J0VCwMIpOigNW6cu9XgQiB1W95JWb1kzxtz8qTTwg7yWfJydqBK6zrPO2amiNChtQ/gPer +lwQykfxZe9F0Sa3IWvhFQ17KsYw7YTC96cU8O5XlkQJuouo1/FjwKpd1lHPepf5PAU17wHX+2OPu +JUQ1ZZkDBI4KOUJ7ywBSDLHKtAJh4oYePHqGYk5kOruUQ45pkDSAWTaH7bGv/MItOue5A7R63hSR +Zs24sgpLdTj2bZhr3ybIoV4VnvwuLOtcBkOhBEpI2P8UaCFN6q0P2uck2AJ+cGvi6GRGmcpjKx2z +USH1obDuU84OvMXowGi3cui1zpHezYYahi+3L23OYUFC3qhPHL6Jhs0uknozU3ojJZd+F+qR4xIf +df2DCYavAEuh/AfQCtFXKwNbEoAjHHaQ82ZL1Ds1FtXg+oJY5K4qkuUgMGtiPfG/ujE9btAP7cYf +SbVr/L7EAKrmB90SzcZnt8OevDnagOQ7mDVYOBiC8O9a1y0FGi/7Nw1jp0yWbeQvoDcSgHOTekw2 +tsgpc7Oi8WfFKWpolknLDEsWJGh4Si5iZvUvp7l3SZi/x1ogMn73AZhhI7E0/eHkURQWJRn4JLRl +GKj61QMdyszGZYT5c2OMXv88kGNR81fytJ0SS1U5sfo4eC8SVN04PWCBuLncLV2cOZxHmGV1o3rh +db+36ec1HDQVuPdjlfYQ0Z30IVyFF72Y7bVj5jKoLCljBwCrXkOLdfEI70HHCjZid8nU92hZohDb +Ao0wAGBrHxm1N6mHXy6vJb+CnfLNZiycEvYBIcGpHRRtDe8zkA1Ct976ROg4OQ9K0Ns8JpqCTBqb +YZUcdhHenP6LrnQ2QiqHK+GwzZZ+0gvkFbjEquYJQw8D6hzpDDo9PYBRDiNweZUVZawTNt4VUiMW +GPbFimDaueV/x3RtOUFsftuRMQHs4w6ecplUS4aUWnrkAyTPvXxEZTTfyuI4Z8Ua4RlMelINJqo1 +gDb6mJxS03e3b4mjLnWBJvE1pDMi3XlQDXXlA5XTAsEnk6xSp9b9fKC10NfZouI0gA6IBLKbK1aH +7l3+5bhW+Nx/hLdoMqIxARH6dowVXUX+G2S1ZTlUiYyekgrkg3Gq5hGv3Ygz7UiG6VohIeAXekst +wpEhiF8aBvSuKks2EDJCM+6o5KHC5+2EBDSIo4PKNjwL2MfBOtUgkA4OLfiUyyRzutLK2TcKIBIX +rwLBUgYIivwHPDq+VjfwIg8sFyZyE+M5x1/8DP92gyDxULcUmT24JYuH3KLAFC78gn9EQlDw4ikm +E28x4/8KwP8jJOcyuJN0J+nGNX2Rkd44g2UaCClgL8TtIf2kCkqGmsuITjp5N8B05zZyjaBq5LoH +yCFSADuP+g8728e97Xx5R8r+KlTGsJKrOhyAMoDF9nU0AJDqKw735d9cf8nBXmhhtqg0T5kRCOXi +5lDHlMQxK9eg94ZllbE8Xwp7vKmc8FbgJMP4PgzarUdz673rFj9IVrP5PDc4NRNstQF1Dnw7GO/C +vPEXJi2Jcuowu05zjAeuCEt44XGITQQD7d9XV2J8CO+/K2XggpUpaGMeTyf7HfAknCvwqviVp05y +StCjVKFo/6WvS1Po8ehHopYyNX/4zc1/WCwnDK8fZ/3ePZSF4Nm2z1VAisoQQII3jC4qxUKgoA8l +PCT2p/eIDW0NTEf2MzWM4HtaN2BqQL8eLVQ+ZXo6tXiKXAOv7DDmWDAUq5mLuvud1tgUNXaCBg2q +6fvaoEs2uIZUu37h6htlfOk0JKvoUkDWfrwuh7Rqso4mJGxowFCXrQ+gB7EPk5VQf6hOCZhL4tXz +VP+jd7K4vbeIeg+UAQ0bFiSy+QMhxYss68hbxGcSf3I+MPWMynR60pZKE7pTe3ia4JyNh+qwAygf +wYZfvhn2wMtgMjAhfaKaubuIo8mHjQcJn4izKMIyXXPVuUfDbVBHUuiiyeANIFDWfdNTw3HmK+sI +z4y+OcdOJxhs7cGJcdXZ35/Z49n9Vxt42qElQunRj7pY87yfweSz3Qcrui0Msb/QGqS6vVnayYW7 +0OzHovBegMzxG3bezO358536/280XvPZ1udQAdDJNtrU0X2UsD2FUx7e2DoEJ16wLYXGj/IL2czk +0wVwLN4EFCQmguIiyb3Xtw3jWoLZFIBnKaZueP29F3CMJaIWTCia/KWaVtM+SLofSfWysVaDomPt +BX99lJ7tyGGlW2LV4wPSPDwHQbBNzrzQPsHx1jPAkCh42x7caI2759Rkv3w+mQkApb8T87NOlxo0 +73BMj+FoafnqwIWxwSNmvCcpBi55GwIaJ9vO44Vfh+kuuXHKu39BhUtb1FC/ZjJ0XT3X+j4wgm9j +6UrYra7BOXD7pi7YDJZoKNslNgwctn/jgOnKRwJ/R7YXKUDG7JNYkyyhxIyJ0i3P/fqIkUb9hR6y +PJev/hgRRdQiNacxklhT74/1N7VzPBnpJD1c6tp08x39oxdooS1Vgn1DAb4SUCQsRMD85HHOlvvd +9Ln1jm72h2tZYNgz1Y44GGqCW62++UExSQhG4HWDH4O+zApoqvMmFh7SpJS5YSTXvIMRVNuuLYJe +F4Xs59nXLImvTmLhvLjZ4A5UwfVbS8YeZlCgqkrFrdhkFPgkuVPdNqllDNatQCBtekZ7DghLI4j3 +ZZr9XlVWSd+2/nCrikTx+Jt+vLXqox6ub40vg3Iy2ffVCWz56yeAHJfzGA5PMEa3Phd6J0JFsRbQ +DpDHwh6DEOZs39x3ziksWIq0MyyW9tQ4537hsRIHhEwVCYo18nuj36Qor0xBE1S1K7FAmgD57Men +a3rSVXvOr9iPwHG6N53WHsDsklafU6lQsZrWbbd/Aro+vpXKhQLFo/W8zWe9RziAIukvkSF2zqMo +kooYeMqVuDJjqrKmvtfulZSB73weboaX8UGQs6fe/b8FFqef3wvUZyzNlYC3gW1XZubgbYkMJMw8 +BExbFYo8o3E/iTWJp3NW0MPr+IJ6AQoD3Pmgjf8BDQ29WzONo6eA8ECQrlbLHOQuOuLTVsNk097q +XQ7SShIdNBF4Me3w6zYbE4I02HEw4ii2yL6ZrBaJV9vImONweGkwQ7fKJWIsy9bT4dSJl+0YFCbH +KIAM37DwFCBX9c/DgjnOc0jR3NMa6DuxS+dAS+WeIpw94sFPYRDIHHUfwh94MK0vkjbActS5Tgpn +QsMeJKJQS36mLxhzGXEBAItdV6U52RJTOWsYaKMBL9vO3JfODxHosTjuNuz7lHw9Cd2Yg03Dw77y +xsA6qN4lUeOCV+rSpKKD9LXgt0f/kUW4iz0BaCCOccmeA/IrGnxQfmbzIJnUZpkQqd3KvNtGp/kU +XlaXdIK1sYHRsvfZZLGJlb9cn15VacqhEnz83XnKipPs1DYlxrdgCM2HXWC6sMdWUBK3sXDnR2eZ +359g8u6KUcEN5p8s9DTHkB3Xgtc7HCLDnOxcRR2wcQth0goXcwmVhz3/YGZv9mJyB4KZ+Zgx6OkL +bA8M8YTY2SrPMjdT/ei/L9Tt1p0BwkQsDdStA7SQlIwDb5H71F2wcOZPyLYHXolJ+OV+yo2Wbwex +ZHZGNWYD2BW4dqV8VnWHKeV5kPh0DyMKqSYiZloEG/HQWl5jpe7iT6uU8mNOatZcH14/yfjNTqm5 +wSV+RrD5DYsMj4b9ZB4HCr63kRYAFifJWQm6Lcxl4Vcq1U5IxCiE7gqtoUTNZ3EhlsyklOhh9X1B +SwjEjHuhFTyA5k9OAk9sbgN7YD7RsPIhKvdhOnMoj7nKxgMGTHVmM+CLW61896iGTR8sv1x2MwQx +rsCP8xTQjqu1qLmhabyl3gpI2v584BWm9JcpnyndQN1kIhiVI5KkKFT8f1cb1lOlvG0PEAhYiWbX +ZgB9+G49W2bZi0Z+aQHsXOz3jwFCpgUDnC06GYnxL+cXlK/KDL0Uc9zXjQyUvwTBTSj3Hmwl4EW+ +96gpZBUlwgs4hYaQZ/oa5jCYjwbJrG65tZvMplHxz08oCLf9+oCywLEf4ni+LdyE1Oi+nxndR4CR +DMlaTy1r+6SQLv8FZYda01AxBLVQaJg0ZSyLLn6kdj6AqRhgM8v9dwO32L1k0r+hBeJGg614oIE5 +RSnFJdJVDcw9kmma5JdaJEDpy6YvO4wOCDFCkq3Vjkzx7MQkiOb4PcxpTl4DWx4bhS/Rz+C0+1h2 +GBvCU9/YL1tw3ipt4PlaB5OZ/grOD1B8bJDfzOBsw0dLm7TyLbIT+QdjRwhPVshz7tZJEgzNVBdo +nnLXZV+SQDnBdD4e/YMzjvQLvY1m6s9LWJVdE4BNQ7FdpBipe9t5HLm5BFyVyPuual/zRfJNKeZ7 +lzKCwlhtxO8AFioIT4hmi8oH/pMD9uWodbCOPPjW8JPqSAoBjwAcm2cjUfoJx50AyRup8ww+sOq1 +vs7uJ50tJSTrMbbDBGO4NVNFYpNHMO5xndhj1rsUCVGhVTQc1UVkI/KxF/qK/5i1bJWlm8e/OXzL +tUPBQe/Rhzore+RGTkAvEQBojX/BZNiTJrqu0OgZwYEZygx+ay/9Ap+acsHYwfByWE8lgHNcnFYj +CwWPnGUU4FrdCxLEnXD4nXWgAkn9iGmK6K7Kfgg0Kh1SzFTcwqoCcvrwmmZeXZL0TlGR7As8gmH4 +V9Z1CVWS5h+FyVTlAU4k88MO2Eqwug1Ocxo8fS/f0Gpw5+sZBUrvS4wZPhCzYD8Q3TIemULlItRd ++Z7fPfQTGoS6O1mTvBSJou8JEb2hfypfolwPWn9KOGPeUBsa8h8FdtnC74uxAYuOyO94g6f02QPr +AMFVrGHY7FN7iubsYwrGT6bYu0D53E/+KiqC/GsFGkAhJcAEqrK1CAjlU/dyI3W7QFVKasawmKrZ +31KWLFcg/fKIdSKq6E1qvGBj/HxVHxgenKjyBcugp2PqwaEn+6VnnXm9AXLS3B+JX0gvYMc3AOXM +Uwwhz8w69jekNeOrmlfwNT6Din4pVpv0B/qxYdHd2KylBJ46TXfysQJMh0mS8+pL3GIOSI8HhHoV +OrQorZ4tyxvvUjhR+c+AZ+LMvIwd0y0dKDYgkotcNUE9kDQ4gg1hw/tuvhiOGNiHrhnuCU8BL404 +gvjH5rpJ1pMjqa4sw96mH2nbICTdSsaV5CXzl9u+j4CAnexqtXlpi0ij8RYNEsNBi73qAth/u24s +w8cjvJV4ArvPqXiuU3Urep7+/XyRrB8WJIa4PUedJ9WO5U2PP7kI93ZykoSEutSsBwnH53cy+zvh +IhctqSfzLONUgiESasvM9eSZyjwMmQ/N0U87Y2Q9X4sSQZHCFl6YWY2KgscckTUyJakfLLy1ZWq2 +JFsCq3d/kezMUfu+6N3UXKTgUHaX4z5FhxeIoE7vVoYPF+ZcBKTmitCFq+3A5VmDKMQs6Z47ETak +Otn0Cwb6zKY4LnVdC6ULHDnzF1vRGuCw5ZfkmqroL4GuPGQtRW3PX7+TAJ2QtrvbF2LX8cCyeuKD +VFjw1RxAeRtiGqzAM+HCHiQMWVDzDUZcqafMQ2GfBvdfrDT9/Cc8mOBMr6UyVB1hj22a1u2PKlAz +STaJDlyovXI7yTtKfUyBLIQlnCebyi81u3ojDhKkLp3Oo4E2Sp8axU3O2RqEaSqRoMaPVQaIOtNj +WoqYaeZqAVD+hQDF8+sCKzOmRgKCDXDlYlKtXbfVXkDBztic3sqZEyqqaJLdPgGKoMfPwA9jHypa +E2Q38NepRCL75kpvtbmQYWvB2ZrIF8Oxp5SflCCtwxUvp4mKjFDSPhSxg15SUgLrz4Jxt3aZ7AlO +47jfsid9lWoe6ElGV/eCE4BpQ2w93u+s/Z0pq3AR6h0Yjj51XEoLV4Mimf0JUOkWeEQKsli2iumU +WifP72zCBuKt2HMxjcDzLtLPN+0MDSa0PzKI2SOa8IZu2gujc22QWhY/zIlzBnQefTkv8E3x+h6k +FD6TQJD0SkxP8Xzd35GBZgFfNc2759dBCBFseI7mfweKB/xKbFQshilPFmHYtTpqqPEM4bAMO5Fv +AoDG09eZ3Wj6Tr5x44L+RI0TMobHc0LdXq3r9FpbQwadLQjTGONkrOMpMlej2dzA7NMH6nLga2VT +uMznQ1E8p8nNwvDVPfkeb/muul36KER+SjWthDF7+Qi9jXTmujZ91/YUr7y7F/BpkLe1TV6auuym +qNjcmn6/3AaaqQ24DfN76ADXqQqOFDMCw4m4oDP3Zr5Ci4WmqyPYXuXKxZu0A89hUtGP8jxOU//z +Dum8bbBYW0Hz3S6V6ZaNegQ6GPPFdDhdNPMObCJHu1/R7EkQA1DpJntVprv64a+anapDJA3E233Y +yGTxsijsUfUAYQ05vArCgt/QrtKpoFvyE0/1i0hXfrs57Sal1oqgvkN3H6Rho/5tWnqHzAlOHtzb +baN/0lWc6AybdTl7NolfQi9DY/U7nzmFbrUcCllOb5iP0DgbbUZQ8hCYBEVIrOxBmlPCZQtV2pul +UhXYjarJKV/707dgQ02e0/MxXD2mf38xD7NnbuU+cKNeCGVRvme6rreytkMQjUv6eJUMag0D6oCF +UXlPPBNO8ZsJaARbSGTADaHsTQCcE4EzSp3VW0lCU9Huq3UeVDBFcMR1VGfNcurdB+iEu7MT9DV+ +ZeBYO7D7V9YlT/mG44WtgqG/5t3uRqEbFjw4EXmYw0fxM5ckKsmttbqvaAapKD9yWDuCJkFviDhK +iO2JQXpqZ/yzdr46+7DCCKbw7ztY2PdVPxY3AXotrsTbl0saqB4aNiCiVU+olaB7YDL5sfUq1S3A +1b4wZ3llbYVBDzubmHDsczuSkjy3DUGHxfn8V+9sd+MJ96Cui8bjCntDQe+dlNTYirUbg66Y/oLL +Vm5LQVLAGkKzmJrzvRza9IrDZMdqXWry1QTu8hj8P8Eqj2p/x6jz0dXGemEnPk9g3K2Gpt4XxU2y +oLpVFYtpk9lwIFDAix5J/UpMY8VYX5Ibemsk+1th/6aYKZUc4nGLHWAdrEvuvkvnjLIT567MotGK +aefTuNSacAWV2TMgCWJc+ZNZL135vCAdn6xiv7lEgzTaoN5dBSKmPS1y9Kv/dJnGmCgnSjRP5Phb +LNikgXRWD90fgC01sBfxeeg46l1EWpQhHbWFw6dbf4aBn6VGV/UT9xizknSULDuXstVT8Dd6kkgN +Cg6OGQ+yGjBOIw39JA0NWuSrcdzUBNpY/N3GIwoXxc8cdqLMzYe0EIjR7N5bP+hEvX06+hGH6rZK +6wnjYCDAl7gCbfeH0ryEsMT2ahP97cB/ZA9SfekH5GovwXkpkNNU4Mn4+1cBqgOvNf73KqWggGin +GHuHVtNen3iQMzfL9dKnSJlm5MkKg0kkhvExdcZ3ybrgxQ734gnLF3xbbYVN4DwuVs8m2T2037ze +VBPCB1tNmDLW/zwhLlLnu/1t04YghUHS2FpyAhjFxkZEb5zT1lFLQlxuliZB8wsBIPv3baPREd4f +OiFyC1XyD6yRNJGLZA5fQFxLQzBezcpEujl6Jai8Ej3AuAaVZ5rh1vYdB7PkguTp36otFLK3jywT +HZM3uHna6oaYb1O98jekGy80Nqj8enGoXxYVvTvuQFkZRMgMEQxgAPwtvVqJjJBGuriv4b2x7ZGQ +w9o+MFv5dG1XWkW6hUCl+d+4JOUITZAGSWgycf6hKU/Pa+JsWEwPNdE7YPMQLGyQeQDCdqObhMzz +8nhkrsXWL7Q1LJSJbKgRYLTxqc2DTfFxyb4Z9A5exryoL9/pflib/OCTfLpvlrNAIIlRQixR/kA3 +CNwbxx1pkfeKIDpPE7saZe7yqqqq90CzoFBCkwSwvNwb9iX2S121xP0BV2M//j+ZNc2W6MVgnqH4 +CpmwTmOlpognDfPzukNcRNP0kQ3Q+EI19xgpPKJ/0E7VZb7I3sD64xtQ6ya+06vQOcShBn80rdd3 +ygmM69zlHWxJvCmfLEkGHNNoZX8JONHDuRH63BM9qZlwwlw1XmpCvwouga8rXloYpr+SkQnRa+LA +Lqpu+Bcze04Evy6lR48HboKBh0Ll/T0PMGVqyyRmt6IsXf33cAgWZW9GDIRmBkxQxrwuNpvxPloH +mh1WG0KWB1c2J39kGT5W581qYEiC3JcDo1noXZFHXOmx16w/edZaiJtnx/mqqwXNjC3yjgdPjtqS +3lm6e1Hqmtm8dYJe2vDPUJdQ9XKga5aCYYcsNXnUo/q5z1XZv3dIVUkfPYJrcm6PJmJj276pixkM +tEIRubJUPUW9h5lMK8fGZx7igMlSnQhMyF5h9Z34Vg+u+0s9/8xFaJeQf+okMwZAuX28Pr+saMwA +LfU7Gvb7QD2gUagj8QFl5ZHbioXiyTQayrNj4hu7TIxRGx/5cSjCqGCSKFIXacHciw5rIVphBxcw +4pCIuswlakqGfGs3TwAOk7Ak0f4Ww23mT1q+ICz/yVvA+1G19jyV/iEFXIxhgaJTauBgPx+QfjpJ +VAxeUvmxIx6ALjqEuNnBi7Cinn95hpWo5YtcvBKAHNlmp23AtHladAzXtZy8XNIeaMS2sX9JzU15 +uf+lt7fea/VaN7EEdVzYNxsBX64eXZ/lbHCvB9hNHckkKgK70B1Zn7xIBtb9vKM9W0vucZVXx95R +/s7fF8aVlpM7dL5fF8omhQeouV74enGmrGw3yX9+528Hmm/WFeuzE1C1zpUYL3a1tW+/blqRVsxN +//J/ujGsmGUE11HyzA4Tg5I+aWzODDIRAFuioXfCy5Pplt8n0o9768iUB+9gYT+4YHvrT8o6ZtCx +icUf0DanDLvV+vJfnVoZeR7zhVG7GgkaM/PCiq2asulwIumMwrYaOnRTukpEtdfFdW7ru81gKcQ3 +JMDg57NOobGpAH0AiLqnhNSBZ6hWvWcdusGkvswPSoXJlEEr2H6IxI5lWWlhm14u/zq1aLwFbOxl +i+2NrdYYEw5Y9PlD2U4rFdIsKnipoLVZWW9XVIhi8lMI8tbsBccDiMTqLNMzKb5aMUTD0bWZBDBo +ThlLXfLbY+u+4jzpkUhG7yF1jocS+dol5Rs9vkIrfejv4scpz7fBk8nXvFF2EtaYLwrevhL2wvyn +3XbBnXlOepfmKQvBr30GTw7yDmNdyAIpwvCDvMAbFNP5aX6y760OE2wRB/MSZtbb0q5q/vWZWtnB +4wOvxri8CfeFEQ4rXs1SPzBvgRXgejcFi3UI+ZlIM90ezNY0cfbVmVN/LPUVLIR5uGZ4g52inkaM +dcr/fjMmWXEpdAwuRguaEF4yJcSxlm/u2GZffBw29H9zlmMPY4EPIedrLaI+bea/sUEuGWU1ZBLa +uANWQnaNhOE9DgWvx0lMkeQ9fO5Cjnb3ej83USU3ibz+6LMZKtyvpu33sY4jq/KXe4JgBbTQjV5A +182HiTRuy+IFtoZh+Zl8lo+y3WQCfrRNQeNufjzPRTSYuqXXALJECJH8noIcYN8/b2Bl+zzTeSwA +QnyB7Q4xQEv9DC26/aGa1e/boBj6AJ+gCBZbTkkjLoG1yl1E8Ul7wMTxjN2aCPmzyw6/1dPS15rN +vgRH2kv3AOBxyPW6zEjnyzDpy+YSPcOU7TWU3pdlqEXYqCuJZtlFCkOsfu/W06+QVUX8r0DYhYeu +AuQYpbkYTkGBoj5MthJZ5Ik8viI8JW7l890KEeHx1Ym1j1WtOsRh99ZNzTS6ek3XA5eeI/TZ3EH0 +nTK84ukOI+X9F7ZcSJsFbXIzuZYWdhVGeByTOc5b0pPWwHGTVLjaY75ef8Xsld3ysRnT9GdDos57 +5SFCbyCYfh9OK5U+bU2nSRy/UNoCD63EygaOXIQGseDxRlK5w0GFyMgYTrd0/Bh9PYoiVy4KAA7N +lGjGuA1PCIPylmCi+6PWuGzyiLG762eT+Dtre8Orz1CzsUKB2NmnEyhqS6K5EHauelS60oITyYl9 +igCeeQdf1NaaE0hvEpAOAHFVYQKs0r1AaDOuO2Z6t7sGwrJm+iqTJgZ/S9Ltnyh2z+1m4MGuGqLx +LtTX//8wvmomQcPNyUru237/5EMac49UOJgNuMC1BdJ0PNwClsluTyrv0MXDYxQEZIFsaCt/BFYs +rtaPVpRN6VeU3+yF3Qhs3edX7jfbmwKNC39AIcsB7oZItrwl38yCeBtgq7uQALsHRB1zruAAtRK8 +ofFhjw9HrjWFDg07JH5VaghBlRmVttr+A6f1nObSWOKDM6UUdNYS0fmsG1W/riUnd+9Yxgff7HiK +fj+F5xYbBjs7DAOmZigS615pVvUOskjA67+wNGEJb+X/Wwjq80LZ8iO4AAgKV4RflyBCGfnArGe3 +G9d2PXluwvHW6Ju0bGU0zVhHrHCu2tAAG8duWK0hJeB9nrFC36XQfZrisA738bdWSeInuW+rntaN +p5a7pBy6/+Fds7GciIqK3ajUdS7DJNK+9hLhgfry63HU1JJ2X5pqgn+xki8bmuI2Wi9BbWqQ878s +GnDwG1xiAEDu3NXG79Ea2yX6x4IVnN2jqeTSw0XhZIncYTYkoR3g+t63RIfIJx3j9TTzPiaNld7s +0Bm7CysXTdkead5FhYG+aOWSRuB1ZbE5baHQVd4UPcr1Qx/Xt1W5e14plVv4f2hcLGTf/CJ6Xebo +HcR82oj2Vx60HiXxkQKQRW8cIAMWR0RpdHj35HontSJQlB4TIeoXSfZgpP+oWM/QWJMiF8Md2WqQ +TGjWS1h89YCnCZZ0JAs2q2p0RRdfPdIJmDlEgOKx5agzBH/YcZZ91N3NDNxA4lEf/HKwfPR3Oc2W +jqfdE/MG1VHPUgYPDegGiDipej1CPX6yJS9JpNndZimFIu7vwYHla7Nc6RdNlwLsm3QYJ+tAwGpI +I7UU72wPrxFEBqeRWF49mykh7bAERxHPysT2Lj2ghVwaPGu7v5JrwtrE4oQyGFIv+l68YH+NBwoM +hCWstcGMWa/KigAXURR/6oaoRVVhlatyM8qciSiIExS5SwbaQqHZrsbyq/uQAgUaTlAn3j/H7C8S +xsv/L9vY1zw4CsD76AI/bRNo3k/mIzmV8G8S9q0Ypdlyhn4cjO43DSjo30vFJyS1vxin+YMz35gS +RhNMHWSWsSNtMW8punsi64CP/EcIfzZHSxiGg3zN52lBdHkuBiJ4Fxpruga76pRAcujN/BFVB9TM +w8QuqkI0FMoekmtFEbX10s4pfQLdIt547pijFB+BEzPqYr11VFgWcCqMlnjmuLAJ82kYCdblJlPd +uDxS/cHb7NYhvbu4K4sJay4jR0+rr1SnEd8TJN5KSe4tvXZFcLpp1p9txlTv/iEC67R4rPnLQHp1 +FQ3cD9vCKbmZsMFLW3Z+GTzfXyQ4ypIX3buuS+VN0G/km7y7Cj3RvERdyQq/SOMYqlFa4EMDSLWn +ibSvsFVY4vROLvnHf1bmwsayKyl2dloZBLpZAPRh5LK6Vzs+f7EznQjYcGlDScJkSdqT7dbLfNvx +dMrGziXBPqL8qDpeD447Aq+5d4rQL3Dhb6AAhDyDydXQAk/PemVPwBn+nAHfxm4BWlzdhhBLW5Jq +bftPtFdDiDPQA8slRHMADcV/IP4slOoO54iAgLhxTNydLWFxCYVY/188Tp77hmdHEX6PdUFyKcsM +N6U8Vz93cIRLBfwIU+Pc/YUEaMsLKcQT0bU4D01+q5x9Yr1QOAot/JS/nxBZHcPDMmfiQnhW/eBo +nyIJCRGID8y9JVfq9pFW/M5eXla1uNSdHu6F6a7NwdEYiwB3VYUydUUMwBLVgi46leOBcU3B8gZY +KdQACPNoKi6AIDaOutH/MSS7fA2bXf/8pV/r1at1+hOHw+rzEENU5XCvhAizgSZv+iexo4zZtUnv +yNximBpcbnqJmuum0CE78bDEzhdidI54yiQP0e3cBxftPskYeiyVahAgKLIRmkWz3Uvgu6hHQrur +u6oswrPCtN6oD2OI58CO/irUGQuXnJiRiX1xmn1e/uJ+daOnfEn21oreJRFIwTrngXun4ovWgDMw +IdGeogGtZjC9mwGGDwuBnP/seplbua6pFYesr/quh5XIbt9sY127ezLg3XZDppz+2a+m71CCBA7Z +BqPU+qv2kzk9e3X2zbE6uTDmiY3vkUfkVFD9wacxtlMQVRYwZy/0m4HovikY24JmThXeIJbwTidb +zrOv6pDp4dMY1t5e04AYIcQm6nhARNBfv3gAmXh0j93mYAdlhDiaJ1Ppvei0T/lXU+yGciDRTsnS +ARukt6bczXQj8/Zi3gJi8iLNdnsXfSY8QezXgYAhb+HFo+dzqdLWEDsHxgz0RYr+0PWW8i6H7Aat +HnMEucSEKyoYiTQPjmaGTzA0vydNI/eHW6PJPwrq3bWmy3wSb6KvRX283SYrn4rvp9EzWYLMN6to +XEWqBrLtecOkLIXr5OQ5R0VV5S5lr3vEYCgKUOVfpxFWEsHSKBdE/w92U5JqrQPIRIeFvsv+XyzK +Mb9Ix1NkbWhuXvVjCGxpIPPfavXmh84PBGteXEn7GjM+eFN1PJ8zYfeBo4GlsOopNq9iPOnDbkFx +DoOTG7w/UczP3+lUL/VHRZJl9AUTvhZxKpyheZ1RQ2D8SVQ6c6HFBqFvsMPyQRiMv57Mq2eCUT1P +eyhIxFFoAWLOUW8c/9xHs9uAQu7XL8oN/7EHhDQFRUh+7PPVlIrxuwl/neZPUuN50t7NPSuw5pHR +EoRkDPTDBE4luaBBKcia708Bo2gVq+cscXehmtfJ1FQP6K8RIRumtLjiGdq/mRtCeYDwgW5395OR +C8aeqHzt/F+tp/4gprkptPVlwwFn5DXb845QrnarVLGSxPDC2EzzjwFAqVHkEtDnA0m4atxV0pEC +jJh5NuCAPW+caX3xBD9GIoqpEiYU8oCoTOlW+d/uzgl6ddWNDsmTixrBBZN8sdMy1k1h5Ehq139b ++paJMFUWFL6+NrbxqYAqBgBeSPY0JvA3hw2fMxcnnS5ChBc20pSj6q1xe5UNHNg1KiO+nkPUPzfB +Ft52zKLI7J7Z0k9feVkMxCkHy+xS0HBXsRgJ2lWHTrOkELj0IYg7sLiKDU2++vJtR3YaRzCq3szP +L3XeGeZLNjy+dPy66DKfuCut7E5Gb+iT0SWc8BBp5j8g0NbqZWQU7stUc74v/UQLj6MuxC/rRD87 +vLghYpfQsARtr/FplnY17m95gIjUNSIyRDBrAfFz4ilqiKZE9PkC0BrUzNn8O0XRxaGeLvCVOjxT +G0/FN/USyd4+swvKzpPNseXqgHv1vL2ei0voPjfIsWLjCcSuvLgCaeMPNqbtqRqEwKcD7i9g95lm +t8+rlrki7HHdleJVSe7P80ypY1MWnapwooeCNgesrQf597YBMTCOZyhNx5n5Uvh9KgG2n64pwbTY +XPj04gjii0Y9oydNSFw/aBvJzeRwQcRZ9l6hEYahLrFosTpz2XrifXtlaamJ6rpl2iQ0+7QdSydY +Y29BiQVBBNtcNFMtPolIAHJufk0EbWRCSI9J3mRxe8DrJacWNctepeAhVDZjluma+oLvEXxHhtXo +ER6l0tfdtu3edseQxj58kyra4AQ7E3WaJuIjj0LH5pDEEoy4Sdlu1YL0TrD5tkPW488sUJ+dLjl0 +R+BBpW+yrEWlNAVcT0o8gkhRYYm/EXJLxp5DIcjbkeDjxWe4DLug4xww7dCsxGbSFR2HeZKXj5uR +RCR9atZenPp1P4H03syBAARaZPVHS9HyDaUR45xV07NApvNzwJO37pf0rIEl5c06zAcpuRnRWtd0 ++F184o1M1U1Kgol7V0Efo8uIe6/Iw6pK5V0aE3gXXiyfmrErgcyDsaeZ2mihqgWxTB6db6PH2eUQ +YSrRt9o4Y4OlIo2R4sHRLFtQHwpSZ6NsDZW+r4+ysGnFquC5gElpxhXfdec7FKEWBvtSBXP1c9Py +jNp9T7XNzDUJ0EqK3ErHwpsOCGpUZmFNXMSgMfQCsDLCZR0P0OzZniZpNwN/3od39c0euPPAkr00 +nQeuLvR0txvNSPnvEwONUZLS847QbkMMWBx/CS1iE14OnjzbGQtJZ31qcR8L2IUZzzvDwogH7Fit +lc++eE2/9qoayga6cTNYLGKgKdboMMOTGZ9van/wkvODgF1Ht89aHyqaQv9TgbGS3qffOnlem24O +wP+7sVLtafbhOeLGSQz0njVmt/DC/PiD6fdaA1T4cKX3bFdGhMBJmLVHUmZ7zzF8W4OLKy4KwVK4 +z0p9kujRWG5xahpbSsVTbrE6qsnR913p3IZVpDQnQbqIiW9WYgLDz/E/7mmnp3hZ4ntQX+GSNvKt +8Q/mDMH6RDNWL3jQZvIpxVXvlcPcA1WvXdOv77f6QJ8A22syt+JG3SLXq70pD3086EEpBjI3dfS9 +dGVd0omJ3UUO8vVZaTx2rc1V/fy2Gs3Ob/jameDm+iECFv3XyvxSoFU5n1eFkY2j8k7bHJS6cUkF +v0672YWpr0mYGN8xX6cD1GduVIJP6Q8w8IMBy9SX2IJXvU4vactyUQLA8JdtKq8bVRjMrFiJIQEK +NoY5xh/1My8R0RnH2FhHc6Zu+kMcpPKDJf4TLDM0DycrNZndZkr/fk8+2jCBYzsbUz04SAT9MM9w +D17oNMIFHwYakwqIluakRZMoPW9auhW3DiN7ol5vSAYS75aI/YNIova+Nl4es1dRAZP/0Yt/dxnn +YxyLCpcmFzeImADdUCUBoFX9yVd1VbaZMIkLUKsNP0lhosg9BhgTgBjX9lLQW3eqjnbKo6rWLjBH +nCRFbRyTmxGhpqW0Eze0HpkFzMytwTFQ1vpKOdAa0Lx9YkMIC1E17kuz3lsqmn519XvpI+ROoSR1 +mkvP0d7IwJvaaHoml77ZvIDl7fn5hSIk2SFVIQkHYRg3AhWo/XQ971JCqHDSnYIvNlg+XswNmYpg +rO+o/bvap7OPs9IF3c9SCqEPg9Bzgr0is3klCLZqO4z5jcnUKn1u4hJ4I3voPcf6NK5r8CrM150P +SWTM5i6eHXEoGHPcUSU1PZ8ftuVeTA0Qt5F/j14DaRvVFnTkpn/frM1DgyUNrDp/81gM3gfe7NGD +U57dcv0+/96H9k8BNOi0hNy+eQGi1uXbLobH4FYipn4T6GnmZ3tYRzNvJNq74qsjEnYZcSgETmve +lixMPmLn6dZdmcKWcvZP3jwTEr7pMiui2MWGviQ0lr9cWGUVV5inU1nIY8pvbu1Rs+rCsGSOqAlD ++fS1gsnhpnpz/dqBwu6WbYgliSTeZnY9PO+Iy2ZJFKe+MHM4qDzPxhSW85ieVnGq4UemTIBHhBio +xsEMt+5kmKsaL9w2iquBzTbaHePb49Qd6buyrJHuKBXhEA/Z8CoWAQ0jUTK6Bc0xM35uRG0xQ2q8 +8UfQdqr1z7yIGEd1Y9HEfhn4hgmXxDA93i7NmldzUEDIobp2XjzhmRjb13Es1MXKYcBcl+RGDfEp +EWGIX5h3elF+ca1GPBDaL0UIswzPZ7+jvNueXmnhRsKjBctw+0S1uFzbtk8nT6iItkbogNd4/6hD +8GnLbtEK5z/1xdrfoipp+Tp0f2LqO9/YjEP1ZKLZld/NXv5tpWD6yx7qSog5SXUBh9H/hkbj+8ZL +l44ZjXU2zX4fZq/AMgQOS1a7owsOlV96gwUjZwDWvKEkO0vn2dzUfILDfVC1pao4ay7/pUd894q9 ++NcJuwXWEZcIu/EXnQAAe8Qj8F/Y5rmvBjZt3A5836nIVk7HMPpsHOkumYt2n+rYBcZuZr2hvbca +iKSNPhJRVCein0XN6j3vBko/+zxKpW/q3vPOI+ipLzCRtNRjfQ9o1UMWG+z+piqh4WzD5eAA1ukb +avUSwei5RVsdLvCsSKNXxv1Nlj//xSUAv84aNNrFm/sCL3ELruz3iqXjymeR7kJVp0+W6XJlWFQP +HqNMoDuQom88WlnrSNQO0qDPzNcB0JmvbPQFAwwRAvM2cT6JxO5gIduMe3XdKidZuaZLkcWB3xMz +8RzQlClOhE4XDusE0GO3hrCLXg3/kr+C5L4MTK6Tge5dRdaoImkWjXVnorNTwtjW0A5zw1wxPwt7 +wr9lBQOf9t/6wSzvowIsI8250AvX1GEuNIVZesRqaMB+ZC0wjtnzmUuw7vO2DzHL6MYc7koqiRFO +Hp29cFxllDD70nTMcbgnhMEl1omrqZwZSQ7HWuGWTrjKMi/vQtE4jIBp0mDfYSjL8JhqNUJ6rCBK +R37VUUAfFY6RS+Jp2kchydlNBkFPwTRXBwZvYCtQuMQJ1nHcz1g6TZirnRacqOMog2lsX+GO1E/+ +/Ia60CcV/RzIe7qdIn+KUznvSuvkTl2gGBJkuptl8OCsfEpk/TQAbWwjBZZwZZ3nWAI2puqU2KWO +Mhy10sjbFqyY2AcVXDUCZY7FzXavVUs13wqGrU07cvOveAmyA1VTV9C7dMcgN2chkpU3rQ93LGSB +q4526cro8RsLdOLWa5zJw8hzB5Ul7UiRHmY7xxmSqQi26ZhXYjeim/V2O0dvDRnREEkpK0ax0kGN +9XHVl4bUuxjVWhUcMiqhVtXAjs17YBT35FIf7R5L7PoevSm5I/fKUA3IWTzCmaZqM+kydJbsldjo +VMhpEr5yl7THw7FHp1uG4FnA2hrWnDOxZD7d9sxq5LU0jQtabjVXmZ+uRCJU7eIGBNLrCdZ4Uhyj +blA8HFKqALamDhqlDd34qYR8YC2m1OUzX3XezZep45RHGkgB9X5u/L/127P/OhamLp9T6EDnAi9U +NpLPm5YTnFeutFrAEdgQbqy971DSViiqy8RLtoGJY4aSN37LLCv+FEtKWUxhOKANUbSSYHh2+dr7 +cSbxsZIUNVGVmlyCwoMOqz082ezI9UeAqUotmDV5g7O4zR5jeDoMppT+fZBnOuAVJKHRROhitDDy +cNu9kFgeiQZsm8TEeYpmlyB30WpXzs17yLma/wPJX042ELJKhkmZKmspClCGgLXGb+nffnM+l55r +33fe3mL4/b4oA4TR8TyNez/AayYZTnJk6fCxPTLZyTOgc2bfMVvtbodzCbBwvXnRzgnsy9DP318O +zc+V/etANlwiZHrBipNnX+aUCTWgRlubqk7UjEJ9pMlif5oxHFUwDZfJtXsHDfrmnX03Q1k3R66L +8riM4Dg2xTI8JWSyPNncrNgyk6TQ05tVaxYth4usgZDcwXiFVnL4IfDxQt/JjpmLCwm3snP7F3EV +O0jrJfnP+lXCkTKkKAfxhKgK52iaPCbWKBg8W0WV/RrptaC8LnskJ0fcTTM777Uwji7k2ETX9VnX +U2XnXW22vOq782CkCGlIztW1QySfGx4RNrKuawIAfcl32cGG/N5G0vFVDzIQKeETrWTodVjV3mXT +UGx7GesXKUyPI9Yb/ifvjBZulCd79je+TIyrFNONuFb2VNmefSsprxuG/SrcHXhrsTMpukAyjPLV +tsOq/pupdI3yiJHggUZ/jPT2BqwTSWaU9JKRpk9Az1xhPoh8cTgKW3vSaQIi4fVoUVFAlz/11CUX +cGY8gPDj3vsC8e2o3gFZuGHQemMyiCW6w5eMtSznvOs1EZfvq2jGCd+Apf/U00GvUUazB/6+hfxc +78gxCreB3IOk0F60RwTd/0OiqWfnc9ts09PWsFMqffve3M3Mmryk7zZh17kmS7t8IOkfmueUp1pE +skzpuDyJ1rz6Cjua/BBd2O4H/SlKXTxP44g19ouR0TEvMyp/dtvT7T11h4yNuLZtCCfFmY60UNAd +2jitH/V3VmcoHVpcGuAPkMofYj/bw6wqF9nXAwCLN0J9m/AE8HAJ+ACzFro2WSwtl3GNTMzKYZmk +AjJHB7m9cQUbh1xiKOMksobfARKHO4CnZCSNfmwMG2JRSCNTGllX/DONZqC+GX/ELQwGaXQbBM/y +LkvM7VGDxfCVphzMbidiz4UYsdhCQIzWnVNquwPj/ZTi/jNWFh/L15feDJrD8i6u3Vk/iYR1fz8s +FkEq5Gof0Yf37tX3S7GImLcVK0/d7RA/6+njKoQaMOM/JUuRXtwuGLSja5JGRpZTin9xIFN6/zzR +ppigw12XqX8DJXzZkCFnYA37UpCkoOag6lQslgEaxsqKGEtFb4FYEbMVu/8ychcdVEqJxEv4KMjI +8CkYGLbB/WdXZG0iM6Qrr5oS1hyXY24F+ghuaei+Dvhj6H509/hcrWn66PcdoZk84mA9VdTUn/uG +jVqJ69agUkP65+nY0b9S+/3H2T1QFRV2devRzXx/ZWLxsI7VSI9uFWYHEJRZoJiSWoOTr8/yMPAQ +j9iAM36kyK2RBpPCGthAY/TPxRAYxMOWSuOMh7tckJS02gKdjyGlJF5WXiYQVblUttV3RVsEm/49 +J7SmiMROcy4uhvrzcuoZzJgz/vY+DIMHbybz47cDrHQd6mLNV2xNYhoSr9TUIwPpbeieHyjCiXBU +wORsxPbPiCJQk3aH4hXzRweJTrG0TTsJPdeaC+EgAEhR5QTHdO2uDtGGKWwtoGBSpyt+WTY59/m6 +nyBJlxj8jfKtmJ0Y6DMasKp1NRHnGDR9ct7w9oK2+zkj3nHxHA+H1zL5xvuK2QnbM30D8vCHxuZN +qEeDQj7WdRE1gSwsPYGy0Z8I6dcJOME619TehsZCYioCEgqAixAt2U9/X44UV2lcCp8yfCStqdYq +6xrkIjAQ0kW2WCgeJWA0DydW0/uvkuCuwuvJDO0bmw9e6RAtx6ft4w4N3cDxNaMmXTauDLReFcfW +IUU9FdcxfCTbzoJdPKcQU4sEShH4twGBSQbCtZKX/AvOoSZQ90vVGIhZhNzXZ8P/t/Vr9Gs2clDt +IPxZC+dsHVISC27cRcRN2n0VKv043AlUnbgsQbLjCk9lj8sO2sGQY63pVhC+kKXjiBiCcGKpAZYg +oWszWUrRl3GJx1URVBqP1Y9ob2zUDFMR772JclhVGcYP+4hdpqcZ9GI6v3bRzC2z82gr1GSLP1IE +ZXqmEMkT1NdyiQJFeXY7of/zRx8UrsBVHIjFpUrEcmp2PRqeeLVo6mBszepJYdYtmxkf10ZODDvD +F8Qhhsf1U6wfFz9rjer5l1EZBbHCm29Z1wMICDkqkw7mWc9sei4gjtymJ15bZKHeoW9Zr1vS0fh1 +Tyg2YyV4k8XvTQ7uNZdq4t1bOW+GtbTobbJr2kv3e6MlusPNGBdUG2vI+yrSlOZOZYzprxgcEVfA +6MGhpRCuKFtBwY5k7vJwNKGo3zh4NsgL057PyDV/zZ5OFIr0ukBaJp0hbatMLGYrDO1FEqz2To2J +/k4butrXJeq4fH8h/DRoq3aWoTbpGInvlRCRsGrv4wEscsskWTZYhzCBPoxftlUG1us89SR06+/u +Vkz154zYyoIXC2qXf7FHqZf7xhNxOBZSXUYovw/arA+UmR5GVbTUaQVviqB7cPskEc9BGYz3exnb +NAHLKpubP14B7ScFyKIktFn7KCvGBq6DXNXZvvvyTwfHZutEfsvxqKgE7LZ2Bt82pNw4q1UbIT++ ++2hZ4SmSibg+xmmV/GvfGlUZdLvRRojsfg68R/52ypknlw8AVWg29VdIUVXNyDIrysu0Q4jzq8D5 +K9v7J9fC2/uXmlYIUI+PHf0xnrB3Y+OmHHegHWqBMZJIAAxWx/bTIHy0KyVMzgD28jyFaC/tLNot +QQTm069qYYTpLIw1xumYry8yHeju3kLkBR+mogv+GbgnfAXWS0N/zd/yRlYqmkhlNecr4IIS8g+4 +ZHD7pM+BwBW2zM+kVigjfMxoQ0vgEIv27tpkZO2bBCmHTDFmLE3O7cPWbEDWtH99pJ88xOPdZz32 +50K9hM2OAJK4xWCcVrl/HBfH9AvY3mhsqj6Ht6jNemOivMNDQ2WJxht9P+gMThVjywS0j7sQ4HeQ +q7IKqkE4DjZnvp/7iX8O7mzrerhHx9+t3LQx65z95u+5478YSZT9br1N/IR33f9SfPGNnQhsg0QJ +NjvvyzE7236ji/pFtADB1EzhdAW4eumu7zHwJDO8tAzPGM4/yKd4Qucke6EZjkjRZuAzZ/j9r58z +AG2VMRyPKdxVf7xV+ACPkfcR4nenb8X48yW368t+9F6g4PvjW9NrvDHLjNLvDwofJRDTrD1Oj7Li +GERodw+yZcywtfIDUiK9zJxnJ39Nb0UGRELGPA32FIfrc8Yq+tQ3yRI99H9N8OUSJx5wR/IEgtoP +pChKtpMWlcd3Cwt+DBe7O021Kh/7pUbSsSd8TnLLytC29oF6JlOSFXJX/47/n4Pz6tmnRmBHe3MS +P7uewgpEunUMR+K7cGM6O6WXfURnkuOAbX/mDUQqPcLh8SUOGiKEaYWnF6rqMm0kVkSsKlauC0g+ +W8tY9LguL40WHjVGC9CHUCpdUYMTJ2B1RpJpU27DbyM8vT6//uBm//R3kqNnDKweXnZfmlKoKrWw +mRp39fiuhgqB/d7I90ibIkWJl2yylghSrwi6Mbe58gNics2kjjEAdOR8oW9IwW2B1rhDPt9lYWwv +lXMozmhbO1+CiaEVwx+gzgdinqR/uQEwpO95k0TfLBAVtiXUyCuVyW1bRs42nmGeMol+rdARUZqF +PG1gLRi+iUxi4WjavAUbv2pPtzoDasgYsiJ7PAYCdK5/bzwVP09FCx6bF6oy++ifMhVaT1xSui7d +DsqGL02B6p0mpJdzGj89hKIKcBo0NOMZPv/vqoPWvMMgrWMMgYn5qwQjM5bMzRuEjJ4DLnTdxw8m +U/gKFLjcC3K9ajj4wF8u0pZH1jVmFYvIRYj0reuFEta9TNsRUEGwAFJActNa8m/dvP6WQ0h7qqA9 +Jf8dqlcPgXAtzWcr15+g3NUMJ/mPfS8+dzvd9yHR8T7jz2rRfl6OuSfYTMi+ue737YqFEMtV67Ab ++URiiAX9aR47bkTpeiklxStAWhOiCLgigoGyzd3bhdWaphM47b2/pHsuMIZK2FZhAcJMoAUNsT2R +0CJrj5lHRCp5/yTYNVFJII/qKsF20Z8rkRDVvKhm9XIbbetHw0u+GqfPH+1f5miO+2FiDfrUCmxf +hxAEZK9MKmW4vVTWnkeroxwaZQVrP7riCGIfKTN5nG5lwddnyJ883TIrD1cYym7v8guHDNXno/a5 +6oYkt+FFUfNWL5itDAa2fX8fEbYkE5DbQP2MiV3scIc4POAT8tZwR0uUfV/6LPyxkKg8pFk/KQCR +NAgtFNdxGw3LU1wkfyTz2HqPORBu/osI7OKgvCGlNr0CYfyDQJk6Lk5cJaBp2+AUaEn0vbkhu13H +tkQW3DPQPlGR/jKkJq4304Kd3RJavAiKmTBqiXU3tQSXm9LtRuV9g7pnceej2h19elFlwERBx70G +VentTDstUT9GvZ1PhqvDcu47+OEyzTj7RDYujyprF2RRV7gpUugxNW1CHKTagNUCTFWjDwrC+D3e +swB0F7s6AXzW7LDhrBENA8EM1gw3fNcAc1NOeg23ADgi/KhZc58oBob/q3lH8XRE3iDryxONPycA +0GoTuXHSp/yPxTR5Ltr2suLWEkKkgS2xL6BWOmfETCeQAHVYrGeyv6xX/ij5q+sRKokvruPXy7+c +Quk0LyEDKN8IRV+OB+SRj6/RmBRPheRDZSxK0w2yIl1wn4n8lg02AsqD4xg+n+y2hcuZ8D+wOT3u +5WkawT8kaH9yUckqj4iPy1ywJIy/DOt3RQZFcvNHNgNylqC82BjNGnXXi6gtcMXE1zfmR1tTV1OP +KrNfLiJ892DExBupwHIsN1VawTyMO69gpiFwMg2vk1+PUWhe3zndm8cSL/uvi54q3ZVwVGOADDLr +8i+JN+ElQJ704rYeK/gojxN5ihDcV7yebyhAuHUUn1iqjBj77iQWzILRYkUkb/BmZvjzMg1LtJCz +F+sr8tgNv0Q97Vnmbh3gZ9zgTsdtApNGuGzASOpXhiLeljf4AovQNYVbZHh9nXXf3fbvi8ws3wK9 +V8l6bVh4NrQ0XZlQc0btV2kZLlK8+pS8BTEFZXT+C4DUq/gKS/plASfKCQy2KMZ/gjKm8DFGgW+o +YYH3uwd73bfHk47usD4919YdRKjQSg8LMWDoH0GRnjO/RH7uuC6eAX2Y4NtECaCKNuMugJifs5gU +o3rc1vgh2+fWDQAydtBW2cz6esjrVGGitTv6gUyTKXnrtx3pCWc/r/a3Sb9zjpFdPW8DrtaBIVCv +RCHb6DJdA/HDTc2L+UhsEMg3VmHe7/fbcnJMbDovmr6CfhidKl64xATCLI9SFImhuBy4ZvCryQ8b +NOFwrr4F2A4ZyQbhfFkyu7XqE/sjuTfo0lldJeUWuQz90UrsR9qKQSoRAFakz0C1r4+W7b/W9+iO +gb6QMRY3x5NV1ioTdDkD+GLw3zWLSKofCkvU1+57fO2rMObZxZ5UTVkIJJWWpLDMYJGOowESPtZ6 +x+10I6aqldCOG2BEZ9IPjFUw8A097CNQkEHivhTDBhjCKvQij+DAwD0/bYtMbu63OXd2ULz6Yy/P +usaQwG99gHSqdtK2O2N8FjGikXha8ymikd74ZEQQ8EuCeZ+Mgq/X0f0qqzbfmxMk1vIEJfh/mm5b +kaYiie2b4u21RHuDxXQCPxAtnVJbs8fbqCmGna9TeSGwPgR6Z0ZPGVBF2xfV/pZLaIuSmASvsJnf +/sM81ohVawLEr9f6hMPzDz4xNWiGmYcGAtpsaEUzIigrsN6ntUF1yoOXWmOevnlj8WOT3CYIplIW +FrF6j6Zl+Mk0L0YZNLMsv17OrboPPRcqSBS0gENdk6AafCqD9eA5vuwu+sg4v2kibS3vIRRn1qSx +ZmrgL6kWZvEmUNymXtuV7+pSxQN3fW8cu3KEvZHvxIqkTuXk5hq2xjeSTpy67OpVtBUDZI0dAPNJ +9IWGOTwewiewzpXMpmuG3phhrhWv4edwOVepWOjKolD3RupmjBaz6x8uOgihrGXl20xVSgiNnVb0 +eJ+HOUjPSIq68gZRSHSxVFPK3G/ThoHPBxDNf302VzZkBF6SOU8mRmrDa4G1mXRdA20ilrMAPiEc +rBg0kFCT31tTPqcs8Lu9dhLsPS3tVqzr1FowiNYdbCrG4Ng/leRMI5Vz107SWQrpUdxoRLwqr7P4 +Ero5grF459Ps+Tsn6KAr+ivmLjUc2G+gO2U3jLRiVCxvaEanquX0suwC/510YQeis84ybDukgH2P +li9x3nsmV2KQ8pMPXRNdrr2J/VKkoV3xeYglyc62+Pi8ma7RRthWlfNdgQl7ywmZOKNe1wxaXBej +W0Pm7+yofW7XMT+x1fNTKB2DNq6ij08KqO0ZNdvGYt47Rva3kU2E+tOk2wuYCZwaiDxvIMMA8/lT +iK2uGkvRC7dIUSsaW8NEjEGEBEvTPwsZ3XkSw+jwLuPkW3Cg1MZ7uyla/Ip31xOU2XhYsyhTZ6fQ +EyXo0KfVZqbmWInv+a8sofbz8MP1WpUXi3Y0U25uN87hjN6001kqISsXnQ2DVEjb7I9C97ehq1Z+ +jMyLKuwUiimyM80kgfz6kzxnAwOjwkGU9hN2Y09MfL6Of3UqIERjj1ln8tRTliBVxgK9fIoTK+95 +EEJImTADTJZiKvZho30z2k7q06MDWEkvW+O3Za1CassHU5XLNnL3LaQR60V7bXI5FUHV8fh94yH3 +BM5Q9Ol5iC+3btfJcUtJwyF/ahMG4lFDG1nTEfUTP1/L1pI6ESB6p9q5TU2NpGuPqIREDV3AmqHA +o+0NLgzIE+Z0jV0sAoZeM1Gly/I3cH4St6PB4rRbUoL07ApOyKaKven+BGwaIShZY/bfucO79zte +CZ41BJVg5kMQnPy7vYA53tVOp0f38KypUBp+25rBxHAQRagQdZkvZLr/BJPPDfURDcmGkuPtvEUA +nnUYk9i5yZzp6FWcS6StAInTO9UvqzFajuSxtSFDqVnQo9UQolMyHRGdDPHl6lXn2XV5RJyqzwt1 +ZVkilollGZF5J8r573bNQ32XYhZWWBa0ia28n+L1MILs4xoCv9Cy8Pxn99q0c1ba/lMeK4omQ41/ +d/6iAZwQhLi//xt7c+mmZOiqb1sW4Qpml60cH4927HrO7SDkInhUlhiPFK2MLnEJvOnTWHMwKjJq +gt805J9BzVXVzQmdYSi5iqKjLHljGzOktQS1cGBbae3cmXBp4zotlP+ToSec5vW47FEN4yyylD0e +Whb+MygQYWw8X7sosGj7KW37UHheRawhHE78pWdFplHK1QHDuYchSdQlKAov6zL082tRuTDtuKfk +f+6Y4MyyzCCcC9tnWiv2Q+q58Z+EPNLvNyTFBcQMyyCGxQYZBjYses2Bb+oUKquMjqo07GN2ppYa +YQUREuYncP50MJ7g+YNiRdtJuyuiIp1du/ceNbREcZOYDFpey6NgZcupZ1ePQOkD+mJjxbWEydtU +ulx9qf9NKdmaFFvdaq19iM/br9sdwXUZz9DyQNXpddOLhAWUHR9Z87Vm9jH28kIzKweJcWg3zVnQ +WiomHzXrJwjWTNcFrLaIwZLz6VQWjFGh5vWwY6J6dvQyP7tlYB7d9XmG/Oi9H5efl5uRQlUG/t4s +zPSjV0evKIdaQNKNoF+8IkEZuSY1X98KDSt4OgFwr6rHGGI+xDrBlvldpdpu0Zx9z5tfO7WFqqT2 +YIV+Mx4FAE/uMC3Ycb/vCmTafFlOkum02pjYYVm+BnWhCQvwHTx6KKPH0I5FtCHWCX/tgnOHTeaE +tWHfkyQ1FVb6MHPx34ew/FEiaG0c19qmr+vvv/pD/EuitPS3Oa/3QWpsXs+JkNaC5Wbpyt4jzpOe +ScmX6WuRm24RUtNhOmHPnsgjLOeOTS+yxRv+sftMaKgMeViE27c88kGdf10LNWLQrNU21F8w6yDd +zJYJ7uxxL6hK2fuSfkZ4rmDpLeVd6BeW0kfAs7YxMtO4UugeDKx5CTFuWFxk6Q2AtXzcPsk5zWs0 +JXZzr+ok3PnBGg4mQ1DMLHEYudZlSyGkO2/+0oCbf2eA9OSTBKIplC5yVF5GrrLf7hDMGHLrtGya +onnsBK41Dadhe2LImWUCniw1ZmOa+jOb0JH19WBUiy69M3HAKpOVbuwcqY4+R0DRboamG1Xf90dh +Qd2bTMsGQCQiT5Xw8JCgX7nO6sZd3VHj7hOnr5ETdSiIVs/PlWolVpq2+E+P3OqTvzfqsxaNddY5 +3NyKukUfLDZRwnYIgl3pjHl8gS63B5AG9tHKaKlsCTqOxI9BMa6jo7GdX1LOZJr9NX+SmBseZFSA +KxS4f0+uax4s2SkTkFtOy2tSxg1X3VuwkzGfcEnJ3Wq/H2xxUvf8l0Drb+BuEzOLZ8VZTGopsBr4 +7qo4vYLqeLRKtnu1btBOQ4cC6qQO16gU08J+vRh/GP6yyjWJ65TZVEstdjt0VkWFp1wSv50xrS9l +oKbYi98iN7fQUBRnNC1Wwqy0ivRwhq19Y/4jECdYcUNugBk3T4/WwPXaPzQKRbDpDh36gPDMmM8G +8DWGEkCUIuuZF/MBkPhrWX+mtYMODGN/p6+72T1/I5kvJNOOqoft25QCN+BQ5sArMPxs+E2/RMHF +0xhZ1pebor28kouI3+02khLNsbBX/2z6F6kJyH3YhyUNzKklOFFtmk+o+uaEDOyDeyqucxKq3JOh +gdYeA0gGunuD5P/NJ0T0gCyiocfaCu7kBRnalXCtCsH0t4CVEm+OY8wiZgpx+lCog/hzivPM/gWf +uHKEpLlZViuP4EQKzb94LPGGY5IwiGXlFHZ3BYe3cw2Fm+/rauI6nyunEqCc0ghQiPo/JiTbsXmc +ux4vO8Oa7STY8mHftRxV8mBVlivDYfBtPe0SK+/Nuah/cfKqYCmMeTMTroe0UHGG9nE+u+Y2czsi +TBUyjx14ZtsCAeYNiHOQrvvtG3gQcZeTR0tfUSuCdRkDh9wfjfUNvsRk0U0BifaFWKRs6T0ruXDO +DMvdUnqsh/X3UgrTqpefeoKDhthGVBaK1q2i/9P/zFDv4TUVHRHfHRW00q7uNpGMId2iKjtmZsvO +s8E0xQ5EF3aqmRYa6N6RgpJCaAvu13+UH+RKWlNxBt+w5PDjJlcP2penxjQ2bjMqQ30XvHPhWmpH +CMTn2gqU9butD0AU2J3a2ESZ0kq8CpD9y7mPwnGdy6dRoQGkScPNjFPqgAoloorjeHoozhAr9KKr +jCYxUS6PoHMAGkC3MiItZrpe2p/5Z5BsuDCkKZ/8bQyx1blz5NlcuugJ2i/6VDFydYfDUo8wW0eQ +qcaCJ7OI+98ykRcgiOks6MDC74IhBXRR9P4xe6IJYc7SKldvwtQ0n/CP89UPjgRMGr4hRqe9uFg5 +m/bFsqNq6SFJIAQ9iXaDO49WVKwe3ebAgft0t5Qf6jwcUUbi5Rv0zwGCMDl9xUktEtN9rRufxcR+ +ZCiB0LHQStZDZJGydsHbFv9WyHM8O+yv5Dw5dBSAczqlQzf4ruTadz3htNxX/Bw3rjixLIDv+qEa +zmQbqWOeqFUaXJ9OGzfDsQOWAGVMjdGwS9wuqKo8zjw+cHr8nJ8S3ldlIR3PTo78KnAOsahhoR+i +UphYHnwZuVo2wcol236rddBEZkUJtuByHBM+uj9gvGHqQBYenyF+x3rGmXZuTx470INCDymFiRnS +gaF1a4YDdvrUI6vPb+T88coG+S/QnzqEFT0Oc8ZfONfOPM2yvvyAEVbesgIdfkr0+bOpRtxeYN7m +y/ppAGw9/Jva92JZpVK/vZ5PH5MTG3sUS2anOZ2qt0GhZom1cLQ7p6bsNU5DPZIM2qWnD9w7jhRc +AAq9VGI9LvD0ZJ5+BuTaY39TH4STz7p1jNlBdEpoQDL0e3kPayRusvKNFRzAK87sgwUT4MSa/jH4 +M9rdkjJgiSOwg1VRF47i1S4xinTj3eiD7ltQLk3UxomEzT2Zt+xnkez1c77ws3eKVmuI7gh0DSYS +hXAxpqo1NS4j4XCh6b+g/no4Mj+jEdq65ud4CSZ1JmpqanhD7pYLVuJGU9IrzuqTECqWK9e/niYH +VHstpqa2bt/zviBN25aVQ60LfO3fQrX4R5SMaHfWL755SfL5HgsTT8jF4wNJnqfhmsuKEUUkI/zx +jOjmV3lo+9tvshwh47UpRXVI/JjAorCYg3Rf0kNGOSNk5zw7qHhQRfnZkA9C2EFFykKNCOnsBuF2 +/AHeA+az4y0P3FTa9IZTteZNo+QT3rgjAfptdUMOPyC21HVr+iE7/m4waQ534bcSQrNPQo8WaKY3 +V9PxTIe6WJzNXOHF2OhMpYbE2D9ZW3neLo038AcwgNHbBxYTVGEPQOhC6ISKqnquhxESnMBjj2xs +RhL6EY6J+Cggh8ZOGBBk4OfYuKCQsjtjgFfJxQrXHTrSrylTHYasPM/vyZdVzFvYKqbsH9Gm4NUi +mNGjr9MB74dbvYXcB/4xk4SHTkb6vX1gzRa3mjmFakWW80qxS2cxn31NSwLjBc+hXUz1hmOZnpQm +m2cEU2mKcy9lMOCmIpGCfIRu+iEWz4QQ6j/pxo6ME4j6T7HudX6HUJOvRsC8alruXNRJaR/92cxQ +3yfOwYfTpJ3w6NMTLfTun3NQ6wwCc8uCgGX8GWvAKZxNZC3eLU3cvDqJa4qVOZUsmo4cDKqq0+zA +2cVbb8V3ZPLoFd9V9Bp1KKTkGS5Ay9GHU/7u7UIzygkCFiSIgZN9MctvSgHgJdL8uEUL14sKe75c +TVj8XmbbBR4L3Q0buI7URKQfNTRHJ3j1Xz7dSijQeqtlNzoV1c2K0nZB8cujLpq/L/QFv94KMa8e +7iWsuz5LodyNyWzNheoR5JwzpT6vPo01GboVrWm2ZxWiBuNymQJ3ruB+n1uoe4NTmUB3VzU8XZcp +KsR3bWL/8491ci1j8yO2VpmHaDEnk8bRbk5giQKo52eNH2yMT4Su3Gl0muIUgXovRjC+EAsEai08 +XafIGzz8ENmRXd3/BUPtM8zpjfpAWMqDwdFmGiAXqj58hwzauR6VEgsaQ0h07U0lzVLXL6fn/iqC +GVSpmsO2J5Xh7D23V9kt0EXV7zafiLVluC+65Wysc8GZDWrJBuQLHBokLo5zCq84I2gLnnlm5MfA +3WytLDiwIKEzucDc98fIBMr25aAIeg2tHJkmKlOr/JEMrgZqjgtfHd8OSKQVvw8eQzTwQa9pSoaK +IrVdzhlCXGOUBPhhvwc5aJrgJWbkjZ8lQfmIzBNxViVCYqtAWxo6gyQjvMFRCoUQsMvCC9SSdmcL +p4h7b3RR7u1bw94op67J8jACXy3pGUnVIavy1gdCPyl1g9ATmSgQAkGG+blSvrr2DY3/0ilg5Hhg +998OwEFS/9ReD1nzenHmCKUc+tzCr1PDL0DZRbEryaPJE7iSftLUDjvGNXwG8/WSwBGwC/WbzsDH +SmExTbp20BwY7XOBOpH/iTXazIjsti7kn9sEJCmpAs9rgd399jPfnjVSdOXISbat3pUd8gTKC8n+ +UxJRYrLdR1Mvz/57elxf9Ce3VKIQMC7oVUn/y62bKfWxIqCW/tMXk3YZXEXtTx8YMsxMDL+cXr33 +/y52Ziab0SrbOvjCs5oXZIUwK0ZqswPJYXLVua5ArRkPrdlEjLR0JCcpcYjlsVzt3ycMSCOMCsxr +gAEF2iIkp+o28qfZ9B1/G7TDgdO08op6gpeWPlDK6VnQhhPz8miJKHVfsUDx2YT7cE6Zybhb0Ysi +PbgElELK/x1PaHBqFnObAWV4aVoCZ/3xYigZM/RZIDUSywJi7o3RakKR+aOmE8AW4Q0GlIYn0dJX +zHdGP1BHD857dg0MHzgGNe3dHphYfAxfs9kzQDdBkzgc5ovuxgCvp4eunUTC5HzqnhSVmW1QPqgb +DvxwKRrTCw5jUctNS7rDEAHB1Y/w8J8lFhyGYTNNYU+Az8B/oGdJk7eZpboJFAv6SJUnJpOtPk8h +VLna2vrbJ1pcnOzwBSLRSV8x2p4Ybo8NYOGsER0n0ezkXEmmpq1L9P8wWz5ijj9LAtAFhYNgt8t7 +itMlQHxz571P8Y3XK5ld6Yl1c5uPtYG5euV+t1kME9XeORE8QFNnMs62FeM9xqlNfairNin3UUQW +NtlNK4TqNrLH7ZHTGYuvQnBmOUEkL56DY81ZNs7YY6z/PuXbQKVuQ7lMkaNWIrTCXUMBRV9PsMLA +AxKVbfYBr2B1LnGqrDZsXU+eTgRPIG8KAqsd9Q+BY8w2AzAAaurOoehJAn+v6jbaId0HxPDQ1ey0 +ncsU1P8HVU5ay4xvbJQjny+hypPkC3YCwL2h2Rrkg7zRPfHbcGFnwOOtFu6JIlIMfQ05ntEdDiwy +n6zCAWFk29Xw0QJY74Bh2AUei6Z3DcAmz7xlB3FoplDoJT4yzYfB02ZFBL/IO5s6l+Din5Nu1yCl +I53kf5/InPcnVm953jePjficRDGiDracpv1TUAwv69m62yRt5keZmbm+eiZ3Rl84EdmtqELl7HBl +KIKw4NKeQ496/TcImU2PjTqxYa34RDNi1f2VnqPUGddi2SUcmGZJjuPWoDqAX0Jrh+vcQVB7MDkD +T2cGJOTn4i2YJnKlt5YIFSOE2Rq2iMkFWXTW6/q976LZhQdf5EyOxcAi+ZS+vTlMEy7ThSBElc6d +eqwujIH+SO+MedvYN5dLf4VSaL49EkvBdTcW7ud0p29mDhdPINIm0DRyQCJ6ZXgR5mVtez9WZHN/ +wJoTKr8dMs53Mp33Xh8Ck16KjyeOKilX/6v2WFGa8jqT8BgYC3kj/UgotgHAOsXEidFyY4bjkinV +I/Fv6r7xZL8RDPzjRCJLf3A8qxhKZZtMBO3pnBf2pb0c3tm/6HcYf677Ns85/qXdaB80/BKqnm14 +Lzh1VP4oVQoIJhzYEp5H+h7cugzQh5usg6SsT0gE4BsZjVkrCrWur8HPigXf9EFFAOjZSxg3vTT0 +L/MPmYoGNsmxgBSpBcP8qtdthDvHHCoIQdnfzI309glHeW+oPn6pEqszxc6Te9C1y82gj07yQTtY +GRiWVoRfvqMaOZpsH1AjfOY4W2LuUVZBgwOfNB8uoV/Oi0N7sVvq2CvQg5uG4DZcu7CxQ6uETujR +0GFuyaINsqv/jns1RIjHG+CqJ3miKlXQQNrrOkSVbfN900JMWOo4wSvFZeW6ENtdnpcuPOmMeYaD +tD4alThkfmlKq96c3A10UDO5sX9gNsF10LNXzA6ZDnvmbPs1wzwwYca/x1Lvd5yjOlE5AKPRVKKi +uLH9KxNx5ZFwvOinD/ACaSKjs1mRxlPsZ9MYg2Gt33flYrrWuVl4V8tK7a/t2YMZ+cbqGIYJYiGF +xL2kXrXMR2PW3EhWdJijzS5stcxK9P3CEJnrMBhyjlQ3qb7rI6/+35P1oQ1j+woUuN6qhnrX9VX/ +4Zf11d2pVWZ9NfakHAB322N+jaWvJ5N4a4GJ1cSQ0wSUbj9MvAfiEi5lCfnSIiRprImqG0OQOF+Q +s5bb7OY1POsqrMGGKLC8dzqOIJxcKDIp8Jpt9PDfqARYVbKppniRJckZvD6Ookxefi1qC3HICJ7b +lVYJxb9j/liaPAFBvLez+0Oh2IbxMjloQUWcD7qUpWWxUZpC3U/5ac9a3F0DnGCwLc0rqU32Lqal +LTJdgq1/IK5BqCSYyUJ8lDfe1LtCzfuPyY/O5AF893Sa3s3q5cZZQLH5xGsbXUEc5uV9ilGwr+zs +TEeF6knD6Fue1RySs8GhvVyQVC+yQ1IOkL5dzB8Wa3MZtjkqluSHF6hLLO2gYUjzoWO2AGsK6JK0 +Jtn14vVJ9hmg3Y1wda0ymQf5G+C7n6v4Jpmfro00kNN69mwWk+q9XlLsR28I/36BJoDMH7+MCG8M +/6x9gRU9rDTW30FtiJvaXKz5okC/EhvkFTsGHLao0cpvXl8xxnFzxygcRH0zkqEfQb4LijMKn8jW +ZAO3gZ/mQV4A8c9/Rc6FtILOM9dTDnMEp8UA4U6GW4nr+S9K9F1eF2qnfxdXXdZqN6y0lRZQN7KB +1409Bry7gwaXse91KGCDaJOeGgumbE3bt8OjdEBvjqmwsfN++/9KTFwh0b+q8EiqjJi+bPKemiY8 +f6EFby4oWUukEdhI7c9tFwmXBNSt0EQmNFQ8wxYBLFp8haQCbQ+Sr79iG9/45Zo/7oSB9vuXeQ3K +KXauMjtlECEFGHLIF+uEQ+SLwUDeGyFzSfcFxAk+b3HPb7zaijyOhjEdU9Uy2BjRjeOExxKy1QJk +0klTmuIIaC+8mxgHG5jz1vkQ+v/VnJ2OCW5SAo4wvCwQB0713hXbL5azpdR3jvuAjZ1jwEcOkNOY +cAnKZ4wT4GBJesjhp/tDf7SZYxvdGyTO1DEpclqFkT8I2464GT9OzIYmdLaysGDfLvfjVBaxyTnl +ldUuHSGQnwrxXdZchsMgrYFmjWP8zrreSsKmKuf2L1vo0P4jYJ46VxpbjadEp+THcsDjTPIvMq0n +C/9MyVsVt4QTcJAOTVY951afwtz3hjDpmTfNtB55VqlxRVsBS4sfT7+zaFNc7cbMupHlqvciz8Em +CzBYQz9mlZNtj89AZc+VmX+phUXWNIBh2QY5y/joF21onUdX86OCyQa4XNA7CjFRx3i79RqPRt10 +YjwbAwIrHZlTAl/Qw2ZRyR2WizBSlF+Y+NE/rjHPdjIDw9K6iODpo+N3GVRtlBC5EDNb3oIkX2M6 +1qq59/cE2zB6wY/Z/ureHrS1jMmEd3o9gwETOPNdm4mRDzKwxSpwyw6e//0lx4m7ur8WyjCVCfMe +5Fxe/Thx93e6bJeCdEfmJDEgTRZkpOuivVhVmO9sq03YP+FigPjgc18rXIosLa2b19KtQ0yh/WR/ +qkQZLy8bF+MR/Kt+8sbdrgBIutGAoFQAP7EuCK8yTJc4vXc5H6LCyzh/1ZmQFhErzvg8a3uH6AHi +iT0ZI5I1KQ+TJPI37e0UYsglaiWBgvwmQGK+Nb79OSfyXX+UTjdXceO5/Ddx9YnujxCMq6nhz0vX +2MuPitj16dKZxaP1As9WPpOwSFnYQPwo+JMFcVUGFzH/Bl8T2pkCGVi4v/j3UxwZYSFmT2RAEUgM +LMF/O+7BulEXOV1OBV5g29kFdD2JZNGnWjbn+V2rxhlGS0tjPz0BN/YYkKGqmpCmsxFZV0wphIAO +hRpYYmCz9AqAU4gisva1OpTxl59wpB1V1EfMpmdmC44YeTSFjB/tlIX8XFhXq5TEaz5gu/CeLP4u +hmrfjVS09WUKPqRI9oE4AUDTwEdfKPsAz9Ndei5FX9+cvYVy9SdaVuvhE1aUCvy4FCuk9pEO5rIS +ziehMVM1D2MQF/h9MN3D8sJPNblI3u6sop5d3n3TTgM2fkCUiz47+CT5CMh+3pIRAJ8x7Vjauy+f +7bbHgvZeJxlDVR/0rzZBllb2CBPBGec+zRAhd/09bn0I9XKURV8gimdzs7upc1GwWTSaf/pXs3qp +htvT+0V2FCM7E7UQBRGlW9V/oTMtoOMLce5ZgPNy+XqrGdPYfWmdshI3QX7oiyzR89IEEfIK4JhS +67/V1GOgBsE3zUB+JSQh8mDY+5PzQJ0Q5JCzf3dMzc0oBXE9i/ukWKZZEHnytyzddzpOspQlAjSr +a3Nz3T+uHEnSaFJebLX+jIGqOHENNjr0ed1fneENjXe4RS/0a81rVpBR+sJB71ZNAeymxb+TrZvD +gWFf0UVp58nGRf0aq1A9i8VhHZu7bMPrCUuOIpYYx+jrm//LtvQxxeINy2YlThybWIjZgaooVUGC +wQC9aDQvXM1nQ9ue1+AFIvTmD+lxTg6pehnSek5eMw2hdKtwz0z7HWTq6WvZxN03NSMGoUdYrZFw +2BmcvDqA450ULhajaIIrd/AKsEZsZSkW/PmEo7eU9VRPzk9r+0gudJxRjweopNG3yil0qXigpH5N +skhUbdes+XAuX34P0YdUd18x/NU4+AWj7WSLNoX5qUhFnPuD83pjNaczSrtas0tj/piI/fs0DWar +w+bl1io1qoTH6kZzdF0+TSTFhqaEj/OMa4nccZeHOf73jNuxGTQvLPvkLKWrAAwVDpHqG5vXzOf0 +2TA9ImQbUdp/HEhU30ydWBtan1S2gjuMOQDOqZg64H49R2vMQuSvm05PDA5tjoTxNnuyhmvkUodh +ZW6S3dbGkF2iqjuwHJkwylARv+UjZfEL27xxJ73TYlxgt2K1Uf5T/mroP4v5JM7GHmT4p/7BqlVd +8wNCwemjKIElnZbqBD7XjpyOq8MrS00EAP5IwpLWrnaJag6K4ff5e5wuTk3IHJDTb4WmJ8jZV68q +4FckfAilowyJA0Q07AhgqvibietYAFWjTSzm50Up18H/pocrrkDr57baACusNQEUhr4wKUCOPuj8 +CblIDH2C3vQMel13MzO446H9hAIGu3o+dArocH/tEjOtxqDtgLczJVkGBs7qcwGjMFQOc+o05LGf +6hWfOxHRFMGfqpKPDLULFmGsu40Mq2I/BB/ysuuF1F0sM3Sq1gPi4MEoIT6o5mYHCi1n/PJbLHPU +8VwygOFdU7IQPhrTBY7Dkp9mD2K9b0s1ObvKVX9TQYiP2nxpaSesy4xcd9KVR/Xpeozc6/HYVrWp +Vcd9vzwlSBOtYLyNpieCGWz6sPJcmnu88CWV9w/eGndyr7BfsT3QfCRj0R4vAIlRE6+lw5y7LerV +Cwr0jzO9xcRRMlNsn52fw2SoiCFQdmnjgXkQr0uyOpvRWok5aUdmxiVbizNspasYvGTBmvBPPe51 +Vuc2mi0n6wjhFIWafysqG69tTkigZaz9YeHTC+BaK+3cwHzqazgiuAeIzg7rXtup6JbarCb8eKMP +Y6zGi3oYvTap7y3G2UfdKTy4ZdzWUcFDcT4qMx43TGi4JHiAegzGsX8RSc7wgSoVr2CzIJdjMLLc +fp8MI1yhN45ayI4zEIZid2oth8MQdsUTRQLizcPoz+gW97A39Bk5cU1D+uOUGnn1NMB4ymy7eLAA +W4Vr/tlkQjl0T1DMkcZE2m5qNhrCWMw1h3bL0yteIzfoHY8P2PyrgRQIPC78Ye2gNvGO4TfFTAYK +nYbiBiRmypB6UiYOvpQnPmdDSahv1XsGoBOk84JTD/dgjbhjgwCZkrTNe6ZfOSa9RTqPG3BdhuB+ +tldLKuz5jD35kXmhPrGAjZ8rKe8pdWgAmPLMXXvcq2zLAPsB4hSY0LJLhYyxeSWpO9MT7Fsm7vhv +E3LtEidgFzevQTnD28Tj6j6OOIVbBeQMOu0ghHcY9qjuX/PvurLkL7SZ63FNaxkwVHhewTHbgENo +ZAh1k5H4CLbEiho6iV2y09QG7Jr3WCqR3eAIOpRpH6xYl4cE+w3YBF7zpGfh+SssiymBJy1haVkX +j2Ex5egv4IQRcLsqtCMOa2hjRcQ8+4sosQWut30iD04K1JmMCQj0UWxebGLTxNzyT4FOi77azWvW +ED1kd0q1dMsgunQ65hM7oJZBLPFUscEcgdI4d293A3AaPzxiQ3UdOT003LKibFlVgRRvVzhTiSdu +Q4Dj4wazl8zyyUGguxAP7JrnFOG+rrLy3n0NZYfufH6eb5NVtEeYMoMDI4st5NHnKOdM63l2o6KU +0lnIf3IzG/GrwfVUM5Bh1muN1LfIbpNE8n8JbXEvXeOJFp8ftoh00zlK3b8VduBMRiHtM1nvfuxE +1XCatbtasC0uNIYDW88QI0rg0D50VAiLkHpHywqbQtiIr1p0QJKWTGgkd+qtvMzSG2/S8q1kqwyJ +QK5c12ILVH0+bSgAlXsdA/zMWnRX52d3t5rcu9NZRNbzOiMGdllRBSuGQ/R0q7eOkik93a6Mwn5k +95hHGrjYb10e6RBtvCxwro83RYXZwUAc517qbFa8uy5xHzvoJssxTDe7FhwZWCcn2inxqfPrjrLC +S0ZT/vy9K5sifgxk2rTzOLbQfIlADcpo2OdZIh2C7Bo+MrDXr+C3aVOEH/2U89G/dvBYDe9izcZO +0Z3qdyRuER6jGXNLrWoDv7z3S+XcHXZjS1bKaGTT1aTutWuHRVy07K1qJcftV0sCF/VdEx4Kf+fN +BxixWdkBsVKJPFJhhXFpxYbbSltFL5jfk4nRu4duVEYZUC2BeEmHi/Ksl9dhrjdEcpRx0wwjkZt1 +YkNlv6sGHlt+GbcjX3YjlNfpb/qdIe62g1LCqzFtIcPIQjlIYF4PVjXSlY9DstOMwRReJ1Ca99UP +BpKPnMONKET+NMq5iR9zRPg+JuQL0Y/8tm3UzOxUhMVN0+9cDXyAnnn0/MUvItFFTunr4/5TS3/1 +CkLIowScKxtlS/S5tkBulzobGqi5iX/r4iEJak1LAj2lH5mgecxmaT/6AUtt51J5poAm5Kj7qIIE +MvVMxkMZxlvlawDOeH9vyRSSfT40nSPnRtp7/uePAr9raq3lQhlzCCojTwH2liJ2XN47VYeLGaR5 +ofYn4ZD0RcI9rBacfqzupmvHGXaeE2T3DoHYel0LzdNqYwYmO68wDLXepVDZmpActqAUjHfmyLIZ +MC1S4z/tBNEFXWHAD/HCSrImSozlRfkcQqeluLi2H/xMCFy0ZZ3qfLSuEuPkQbtiPDFNjVbGdxA8 +Pyej7QQJShZyrrd0RtIw2bXKDjLUnbyDgv2eIiXdLbwUc2coKjq9O4MpTGOTpYVNoemfsK3F/Q1M +g3TydNXVFaxFtc6GhHmP/zkDitOOm743cj/jWxrQyILe1OCpge1DewSCcnDfrHIaAgh4nMr6sL2T +Oxvn/40cWC4hU6ZD5ElHG6I2gPkg9t4x8vHfN3q/y76Ue1Hu6csagS6loUfFdjMmnDtuel0zMuJX +yOUSO2fPUMILDMuw7/kvXxUbiOu+FjA5rRFjbqAdVvzjydxbBJLUsR33rxa1ZkF7jUcOCj3+UMlh +G7Y4J+kSaYcmTCJ9astjo6uaJuyE8qRyOIZhtZlOpnZqhJaH/Ur23oS73dfwkv3D4BBtlchNTJyZ +flR0lN6xJvJ7PEUUbSmcNrHasZOqFh7Ows9qT9rtqk0RRu2zHF0rDwTKO7/pIGfRYiBZKu6/l+qe +v0kyd5UQnc2KeTe8TwxW+aAiffqEQgYSCFM1siOQvhPELVI1n+YBV/mDu4jPwYas1T9OmrrGbsls +jCvVpCztKtQfboPRFve2OSeUNsMZFZTHO5aDuK0D9mNmHL1russvnXrKW+7PpO+5gq8OQzBouErL +GkY7xJsz63M9k1qdrPGxXTgblEDcjB9/jLGTLaanqBECVKsa/nGUugSAiV8SzIgapVPGAXQY0K1z +zdNNViekZlFdpQRH1u7Hc8FfNlDY6/2AshARvlAQqVYrZ5UZIuApDw0V0Aymo7ggyMBmsl5SvHrd +C5QwCGQ+P1LUUoINtSOQzEoeT9Hle4aYcA3R8eprcEkjvpTz64GzySZ0h+5UJ9IJyRDu36z/oRdj +yZZHtuC/E4kIUZcR6TRoqPP1LJX2ZUsTg8cpE/F2R7gCTtaOsMhdDlSSV8ui7IzNGDTyMClvYFln +KIVFLyXhY78tC479aJBYWyztvqqe5rmBN07TC6u2NHIbyki/zfyEJbWqh9ZVOt85SBMJWmV3MX3s +P7xErOiC6X9FxA+/zIoiskZSu7gJl7FaeTeLP8dSct6g21cgqJS1oQp22w+SaJ0Yp6Id3Z+vRRMl +itPHac35E0CJdymrQMcZSILID5l0x2bTWho0HuwRx9DLXEMtFbsgo4oml+LSe9C+xKuz3d4K9yv2 +JYkaXTi9hHpqkPbShhvUGwBJ0oYQygjucqGLs/E+yACy4TEF2p5Ety+ubcxtQoP2z1LZGETvgz5u +MK4hQJ9jWNGljel2cUC4tnLhorgc3lhk6Pr+tlOeScorheqGEBLCQkhDWNetQDWDxvMX/YHfGigs +2Jtmm4CCwOg27V8hhpueJa7sLstLUhpceVS+lwO6J8DgE2uz/Ky3kYzqelm6khX5rYDfhoDC1uGN ++RiINpVDw0BAUbt6cN25I8bUzFDD67/YvVHWoI51VW1azBdn7cl0I59XXGt1tD5F4zhvB5uOKY3L +/J9E8rpAhjFfBvSlKyYi9K85ZOvfxRgY0xlc8eHXrkMDQWRCIVdGd9YF5TA4ss7u9kRp90bJ/5VB +j70NvsKCMLjSI7DaKtljRHq0m7+BOAMQFWM0Ur+i+JKWoP7E+SVzBcOqzMfWD+20DIVz8vCueo29 +VUZLw6YhDunEiU2PBDC+hpC8y2VxcpsGYNjkexG+F722tL5aAB2J7K0PMac7G6gvob+Wlhj4miN4 +0jXNyhXIpfQKr0AH1S7Rx7ild8UtENbONryXVPWTyeR1V88C3JuSJbkGxFKbdQ00G4Kx7+2l4zah +yKGshCW5jOz9Cgeru8EnBz1jHIZhnmuALt9vzgSSAoz9TF2yyiGFUZJIPxP0AqSxt4MLEg55IBOe +e7cgV1hlwEdBAwYmuG/bzzsbkK5LpQo3Q3XntRs6+Inmmx1h4iw+JOvOFnHTf4k3ZlTEnuy4fc04 +uQcgB4ek2JDs0vMPW+ZyUjkIm2wbadwAgTFFOzjcM6UXfmvwqXmYN5TcZ1jObcLfqLtRVcuextx9 +KJd3AAEX1+5UAutVxjstUcKbJl9B42HHO8//SV7jZQfVbo13Tgr4JQ8AY1pB/RV0g3k1m087CKQT +E2BkL1oMf5+WoEtez2xkvQLhK1Z4R9toNCtwmb+yJg0rBtoA5ntZvBHaxEsOgzQbPVoxOrpBTLI1 +y5TUB74oc/JtuHoM8kCpxcWUt1K4MVV+uEChtghDBG5raytinsfAXdvvcazIqGfG6K1ZEt5PU1/j +tVqnT7vw0OEzESiMjHVfgTWXjZfLyObAJ3fKdPfCwYHEA3agyiyM8lNfJ85ANL7bc8JV+RM0tpuc +/6kiHK8uJQORNwNMLFfloOxhzHvFHqDGprMinls8tWivWv1zou2uTGEn/iZ5DIT2FPIJY6ALIOmV +0ubKJraq0R1c7ZpHdyNyxZujOjrHER0Am0dnu6tLLXmT0CnWJnZYPcBrC0zMqZ1I7sdgEwu7HjTD +wE8PAD9iOKDZm9j1VNMdVZpY3zNdLlsIvULEOpTPx5N8onNuHoL/2dwkj5GTnJSCMjszXExDSU69 +fpmADO8wdpZtHAF2J7u/T5lGl8JCV8boR3BvJdh/Bc3IO1c8Iz96QKplDySWvrN6hdfQ9BjwsKLm +bl2Oql+VaniEVDqflabCYQmsS75J7yNP/O41u4UblBhIRpmNUs/HYaOA/icAw8/mSjIPY75tkat4 +8zvqYGFOMnrql1mPaiYcfRWe5LhywpW9cmf2+jGnTwXTD/9urStmstScLIE778rLjQ7GERs8gF7m +X1wNLJgMLjjAtoBDGcGTICizBmwWadPgp3KKrtRPLMCgeeZm/u1m5qOwE/ql6TldJtVtj20nRZHz +OYQw+jFTF00DUsUZD81g+xh45GED+lrfsQm1WSkdr7lJwCDIOPMIN8wWwqKnDhhTHXuuGDW59ir7 +zljhb3s0AHcS30Q4xFmhbZiu5MvXAiVlZx8vhBNDXp4qg5pv1me+5vwzKfulw4a96SbH3MOgBomf +n82pBn9qpGwZkkXdpZjHjghX/ateIAyeENff+NVDruuu2O3b5V4xImCu8+usssTr2YItJNwbJrSt +UrpgOOvq7v/Me4ZkSlru3Ipr04x/R1FAGgL8blMf6oHSfN8hJXLqsF1CyvQ8jDDM/57NbcymXFq4 +FFapkebQ31VGBgO8gDN5ByXKj7SvUyah/asgVp+GrDjJblpJ9/fekFWKx2bdBIS+xN0XWpdVX3bg +JJ2Aj79jeU2NWvoDaM+0TBPyFIEk0yrWg09B8pfDioYYrru0tOsytcrRpq4394I+ewwymel4oDAH +NQLiCffrGU/KZIi0ED5DToGQoH0YY0bfLJL81BvLo6ZFvTv8B/oR/L3Nn26uxLUhJQsfBrZfT6M2 +ANgkbBfWtWZmixYDFs9JyZYUnl40QddPP/Wj35kmDi3h+5294jGs3SzJulzwDvXJo9mO6sfeEHHi +sjFeD+6Ht1FhJVzwGQMlU9UigOjSLeHT23gqF+4aCiHOKyJgAgxVlWW7Cd29gfROpEEW24Y8dncJ +YXyYP7WrgX3zaDvVP9IHyKHTcEydIXwVRzXfz6yNI9C/faAjzkk4dbL6kOTii9evYWItyd04qVc0 +W9RNIHFM8J86PCXptwd5orHD+4VpYsTEcSDfPbtD/eI2FCXygG2TtNWlTezo3yS+zgvPItef03Nj +8tuX5+IWDfR1aOHikEkTuUTz+mEpP3CW9CFOD7+3DKIR10Lj5/54ZnthhJJOPtIptsqbwL8R+Utl +tL+hPzbMe1hKDzabB9nyQ7m89PkMMYR4ifQVnNm2+Xcq6NFY4KGKsuYOaSFFOfejkp6pSwM2A8+G +k3pCVcjD47tE4Xj/F+I1fi2QYxhrbtuP2nbYCGWL01TAWXwG8yecJVIaF3wspj3DlVW6O4kRjxGX +PflUdXgqVLux4kJTYmNhBNiRHCaEv8aSVzKYQEilcEwB5poFO+Qx6VoKa5OwkHmjAIKCYu08l6Zx +kiiqfLIwksyVCuG0CM78h1ObfPiTld2Pegx2TeajNQKixPm3o9reARaTMTb/+Yg0RGs1xZhPUXHI +4Hla7Zx6Lj+MT3vZVwKeiPEAOc4bUlVoQwLXHu5aLgLiWmhJ2x+mRgxB/zsHBh0zoyo0JPv1T6RH +VX4Xpq0rXrHsTFQETC2YSGSrBxtMgrlNOXZevd2wQVIDwdC5m4bj8wH/OJnfO1i2/QKaky95Hcy+ +nLYeOlgRTJWV5MpSSRSeqccjMnAmXcX8xXlm+lp2HTsVACCyU+M1VN5VdJgRAMGJzCd0/WUTSbsN +iXt2d/u3xO5Cau1u/3rSC0NEaAaX9gj+Km6S5jet48PTO1be2yZxvkjClJaSva1wkk8snNkzOpxl +KlBmd7JyYr5YhhYn6l1V8Y10lEUc+iyKZMui2KpiN7KqCweea8tMTP8iZGot+w2RQ9CVMVfWBZQb +G4psqqy+3qzhuDmHkwb9qfNXbgluyk82hBp9vQH4OIJ6GO/aWryZhmESJEA57cGWvVveh72V9EqL +BFiE0ZNK6vGvMP6ucDOvDTpU1W6oA7D3jHexTGCL7pMQPlEOgMVzWFdEwjI/SRNfsI7fhADxU6Ku +S8y1XVErhQYLE3D7h62neF3d87wt+2HR2iq1IdAW3Mlu72t7w69w7ZtPO+oOJiAfrVdhaKsXJccr +dgcsbF0Vz4Czur8w9Ezghln2tGrZBORYNncE2AZG6pWeYFPaeyAeyPUkoffJVgJa82YMxYQ1CETq +zY0IZXPGyo7fgsm/PgCuweK/Fhvra/kk1EI5s2zkTNzGwCboscolb9cJ/T2QnsUMOAPwxH2XbefY +BcIsYeyMGcDPTk0Y9Imdw+oeGWUYgXyVmkp2jH4XvseRu80CseHYRSby/U+BXMCNsgbbNf/qi7G/ +HGc9iVO3+NYvLYI66T8X9cVUQgLtMQ1Wyqt6M91eHBb1+bQdNCTE9c9Z2fgfn0toqEzCalL1pN58 +zAOWvsUW90fS7nvrvQUOhMgTdHLjlv490RvDvXyFas7LSl7SS5U3Rs5/J3+RaHd2rQZdCRxQQkTA +wmc3QJrdYRsdjk3IHSczRloj4YTK/mMRjG6m0+2CRuSbDpKfLFbyKPgoiqSoZlkib8aq0FHfXhAY +p9tfGJD1jx74LzDGY8l1sJ7qIeUDnE2YXIEVv2+TpGs6htvG5RQb7QSid7SvkJWxRJ8t7iX8nWUB +VH8/ckEeqSLFls8QCxl3m8KLqN6E7g2pDeZy3UjUaFExncyVGxiD2EyQ7S1+k0Tronvjv1sF5K6p +4MsUcRTlYH3LMM4IXH86v7N+4jZ61E4lCk0hjVy31/P3n1Ayn1Z8hBR3lCwViZar6vCu1I/dMKsV +GYL8al4+SuWpAfyCT95o7Rm5Q630X9wOc2vhWbrcXOv6A+l+gMQwsb9ttJw+Rl3M22IC3FLPUV9P +ZqOqQtTydxkczzuem17cchbGNA7PTlGZoMvN1s3sSpMRavXERZoXWr4hXm29ZDoAjYm4/zN0mIwp +PDsG9Kuf0n2QVKrjNSFFBxykBHwEByDUIZrszyXiIIkf0pPOLKKUedhDunGQ39nreaIlUoNZPPlg +FbtqwOfWjVqNeCJiRCyz0nvrqzsqaNM+utxZvWESG+dF344bwuThBNe17GEah0grdRZUV2VoSbL7 +YwcdnAmOp2JhXW/XfrBMO/MAaT9y6bHBQ0J5+xztvuxucVNBue84U6AjraCcZ8UC0sx0aN9EBDOn +4WsANmylZyT6ar5W8ijVnKaqaT+XcYe+r19mwXfBJPwhCxSpdBUY84rvKH/PH8X4GRphVkRSpI1k +04ivu3849HzoudF7HoamJ56unTJd71G9KH820I87JqfMMlm1MgWDfC+CVOU26sx8a2Nkq0aQsgCJ +98Yv5KhSBGMTURrbp2yquxRHhfyCYo1kdWM5ahJ7UnksCrrLIwxuAJ/4NwgzQxMAbDQ8NN5WNCd1 +GSY7r6jKPj5tbgtKz4d5blhB5QBxRx6UMx7JFRjkS2tZ89+bpXkFgloeedJH3l5xNDrSo38lR4AF +sUsvWcLv9ISfrIxwnwyDjmD7aVfPJIyJg2GycZrt3wBJV7I6w7fBZ429EySe7xhuqT1pwcNNWx4z +Cn/K6ETY46FvDfxRwBSHkumi3D1aIJ4ligOupsaCsPKMDuioNB4f0lMieeGOxZM+cDwMOP0jVnzO +JcWhP9++FORFhYKI2bdlS4hRrt2LFoLfX1p1S8i3qbS+JMbRdsHCB8l10ez08XY4BQkXaa1F2iFr +POdthbRkeCK3g0prTTg9titsTurn8SeXAv0k7e+NpCiUEdsjFNWKMby9/OLI9tUNELu4XTQxbbON +eBAUJs+D6wNcbVsdyOTO6zEnYr5LXGKm1/KPqw+OkSIS2VLh/VvY7M0oxfdFpc8ZUS+umW9/xYjA +7BvVFK+priKh2lQFBSSMJ21Bb6LuZXAwxEwiMZX2+TqSzZ9aQf0XQ2dKMN9QF57PnCAVljMjnsB0 +WA9YxsP1/RK4utjMfQI4ACcRlgo7gS4SWj+lOsKXuQMaUrwt6nsPBDjCC1VD1x+CWFCN9a6VcR6d +A2fZHE8xYU2I3IwsY9K62070ELxsh3aKlR0iO0A2pGOrXdmFxCu8ZtvlxbDTarmKP1wwqP9neOt5 +imE1fvgrO5shY1lVcA9oLy2gjJAecFQAQIaYLv441Zj8av7y98cD5zJSlg0cYgYZ5XE5q68t9B6S +1VV3MJd5iwhde3upmHK0eQTcw0fnciayaav8nAg2UbR3mmJXsyds+C4iqO2HUi6oXDhZgFYi2JUS +xN2GeD3jy9uZBXyZJ8w0XNQjPZut2t1XvGFLxgeYN7R869cdmXX2PSbmkZnYkKZeGwqcGLsgn/wh +8Ni5SGSdZQOhAcCl/7wzoGSVi7Ulou+3BSpgefrjVl+X+G95uWK9WFlaEGq8JZEFPqmvuajbpxkt +omxWHKRHRRYkEplBP10l8Mk6snqu1STdBYGSPhANUhE4/oK25ZTCRvPAfLhITCuMMVm/rVmiEn7e +ABHKlkmL6c6FEotk4GhmOMG0Zdwyf/9CU6jD2MVOzVZ6zh/QbxIyUWp3HhNBd5b89nwjp9ia4RS8 +yyi4DnP0WPyRwZxTrggmkR7U9xgcrDQMWU7cwHD1sqA2wfvUjwDc6HV3xTX8GByMKs1dKem+bGbu +6ufdjWeteBeta2bfWnGKZOgFFiiG+MpJOZz+RXMb8AiREFsUbW2PXD7ePpzKSQLGNRZMG4La5QwZ +OOtMFYeBx5SS+6eJ2NJbWeGygnkSkHa0dvioU4lc3vw49spnU/AnQEjcWQsR3YwAZ3oFps//tCNI +1hGjHYT2gJx6zYaR+mlYlouOASvet+uDnGr+pkFAHXZ4Sd6MB7uRWbm/HCloft090hDMhK6n2/Jy +5wDcSiwk0MRaRlUL4lVzFYiXzddVcoLetOPM+PDlieuhBLE8Rd5+oPjwjAipOhHIO5ZN2+ryb0rR +lVoNgu93QTF99ZgDL8TKEzN7oXqtZPJUBNRdN7c/NCVq1a7A8JpoKherrM9SCxIx5ZL4PN1qJ3Af +aTTViwjvnKt6Yek9cQJUHNiykxHUDXTuuGeA0zS3VH84W6HGDCMc7vQsIhiZRztuKGsJNjzS2eGJ +0Aogd1DM/0ghgKEr9qHCEySexSEJaLD8ZMQsj0WFEZ/PNBmjErbRT6T2iid30pReRNffT/i24Gro +bLo9j0Nn7leooBEPNby5pRUY8ZUqXwatN3Eg+WpB4c8QQvMbL4FLgR3gkEHGBCRA8kFXAamdXwPw +SDasFTdW1RWp7LUm8kgUIlZpAmGIf9ILstjg+LMpshyLFXQZQYbB3aEP3SwS1q1iGyD74rSUDSYR +hubIZZ/Kjs1HvqRvHZZRjelu4S5dezh4ZuQ7TZsRe8nEQQ5h7fHAJut48f3HqhyH/X/ubqXGHKws +grtDrHLZ/KDd4uyUd2aHH0n1qY6hh/0sIf2N7EzKOFc4Qn0undoHIrCS43cFznXiAUQPNC1tSL8k +i3/9zfLQ/IkC/h3/6hosEPsjU83wwZHvbg03ELxF7CYC5JonLSUikj/TmH43L7ZsdBEQQxOR4z/C +23x+RyButVWxcLGrK72AgXlIvMJnJoxVdZ80Z5sIMvrd1NABzNEHTUrxf/6IAALWjE4w0v0eBm1V +W96MjaknfJYfegy/+U1i9I4Iv3twOWN1Hqmu3TiUPX8OxBX9hkl1qqJ45xWecXcA5mJ3EV2NjUvc +6sgWz/80X1tvpaMCLl3ttwfcyKe2mkpP2Z+XdmvvBGVvKYWZfcPaTRDupNlkNrsJHvUBL03NisSO +eguKPVroufXtQ2HMfVandHWX9vQY3/lO5v9xcjsmAgahv+hsEN+N+5JRAbdrbeHgBqMWE4l/0tB4 +SMKIr2mxzGw0unViLIwoBGQBiI+7E/ejShTJvwCOV4hdLPV0ymLWtCXZFsw4HFfClsE0EpLI16Fe +ij75PocobUofBGOIY80G8qlGvZyGgpTx6WYYiChKWa4DtyfywL0/roFqoeKVF0CXwZdM3RU4EoBr +Nc2z8xe+TfTOQMcNYCc1mvHfwuJBv0DBrnScxwUsyyFEGVa/rkARQQ27xM82vXCXUHYnmqbS+vIx +PGHH+5sWeT+gfukP6eawT0VRGu6Bqqvegq9uKrR5+HRE3dgFt4fQvVJ8f+JJAu0QAn7l3J6rWhCq +ubdHwLbPAGwkMMoaR5g0RPz722idAg4GsjWq5s8j5gJej9HzBiku+mEYRQSeu07WrHKMfPH8Dn2J +enQfIVxSjI/kM5gZjKgjYVNUOFpXZwBmwBLpoNR1kC+Q0eTcWN/aCsAVoIVYRG3J4uNxkmF+ZmJC +F9tdNovKan3CNri4DpLh1r1B70DH7ZBpCV4CyVSJW2zP5BsWcRBvReLi9uroQ5VgkgdVPpt90K2p +HHMxFCXkhO82KvwTrK2E483lzEY2ZSExEBJiQta2JFdtl4eGR1E8qo2oI9I+mm4khHbKwZU+52hL +zRMfW6BRhnFlTtvvkqb34DabNwmf2i0qYj8QiJ3sQ+eNBSP8LFC4QqiPiudSipNcAeoOjDbrkAlj +k4v3z3AOjVO5RWRBuN7jAMM0Zb6rInFaSaey/dYfJ5GmGvgww6Fa8pnBMeHQm24vVL1F7Ggx51IJ +eeFxe4PpnzWRkmLR0+UrDQmPu180vcl38OZMxLe2yyHtHW0Z+8BDXV2tnkJUVS6tm0Awn8ZH0RRL +F6rBRuLhSEcpAWRbG+d7g7QhYkVh0ZOlU2NHyOuMZh7EMYJVZcukUHeEthYDFPfMIK+AnrLTG/+Y +7kqaAMmEMtkwdDySVQkU547pZe9yIIrtzOf6y66PnxZmDkaLJFlnobXgs2G55j9a4Q6BA77SZqXs +Y4G3t5RfZ+S28ur5v5Kmo/erl7RSZwYOr04An8Rm/+GwMIJvnJLF++8WLBkWoTasMo5D7z6wtX3x +BfmawxkWexPptImD+HVFKmjbnznPzGF3LZ4ocPVrnbSJxN3+J0zaePs2CuawLFnB+ea6Y/+rN8jN +OJTbv+galcalkfwonDS+KXax+YKiNKssaTYkuSziDcd5B2Wxox8h3JV/EhLRyr9rfXBK291++L+Q ++Wz/rjtCoPnFzVVbd17URyNVOhFPmkW9dzp80suCH1bSsQdTCcLSp/RTlZlb2v0jYHpfDaOihvkf +029DHnGLILdblSEFl3zy3Bkn3qzUlAeOznXOuzMrehT0KFECXberijBook4+k6/WvtD4IwZLmzsq +MTr29Eb43IhLGyW1NwhyX+QWaKol644aR3GjuzlLhbfUDnN7Ckk+5TTgV3OL0KDrpH7KYpGBPAh6 +U5/F9YDoC3UWLxAf+L5ah7jpXrmgYHWDO9xuH7FjS25HovQdxZWYwSiP8ROdOrHhE6MusCC797n1 +wmkY0xRb/BMz1lmOUzLO9kaoYCAJAio5UF6MBiu9FooK1+X+lgz5F5Tr8e0srRX01T1geq98Pwok +4NCaU59pSwujfs/D0vwg3383Y/OpQDbMqoDthFNIey4cPKqZ5m7qAWmcvBb52+b9g/ZtLmIO6Kdx +ayHC1BkOqbpaGwJv/GzwDPPJDEReUzWrkClcoppBgZkSqfjBowndBHK0g0BL2m7lPmrCyzs7wX/2 +d+PtsjpkrdjlN6e456PeIuwM8ZW3Sdzf5PV3t37r62rNnD8Ft809D+P9JONk9M5OR/nkTFn90BXi +dKkzRJv9AI9FziL8nqW53kFCP8b9RvBTjIOzh25h3oMUqyj+XktV1mQpuN9nFZWA9IQF9J+W4rQR +VRO+474IgD95Y4yW95WlBc6D9rMDA7Snhr/Y0DA5XaTL70yaeaFgdT/oEAaWtOSfUUUaQNXb7Xli +ZKDIQKgsEGmOedqSnLi7MsJ/P+YSMZApNYx6TqgJP684alu31VpeeLTR+pRz7Z6l6/MnbW/xNnAV +SiciYTiR30kh9G+gu/bV2ZExBfFQcoNvfK7XkFaZknkTZ22c4mF3aPADeVguT+0Q0jigOr0fCtY9 +3dcTsNmVLUQT/bqW+MURWiz0MIzBQDuhsAhBY/tjxQMf2LoQEtSGVvabdQW7YLckln0ArL434zzh +UENLKWyjH5zsAJh8a1LN77TT+4fgBK6vBvi8BhC7Sfck3lBRbMJBJGz5iqYa9vc0h0s7h4Zuyu6O +ls3e8na3d7DTIRRBgMbIb/mPoozlkeaZ3BVdSj5UzM+Y6+FMoh7SbEaHYDOeTUUWALtZOKIP4+Jt +WXr2X5l1urCcfXRDAbqEQLRNGL1NRCNYCByNzvUY/9TO2ZDkbWZImOdLK/VOvUAmlGBH9uIWPjLb +wqnUEbOBbYynBI0yaZ06y5lz7EB38VIDTINEZ+8wFAEcVEAs7CwTb1EKbFMLBeSGEyGeWm2nF/ZL +c1d2Leus6RPaWu4Tglbz3RGnBIPrVbLQlVAFSa2ZCdpEPKuIQ4vADhagW54MESftd5oo2sQa1NUH +8Ai4y5RasHpDswxpftLup8TjCoxseC0BMyw8QOQXZYttyzjcvQXJzLTCBMGnYLWjQPrB/H/Orj0r +0ZHiYWlL14N0MNtIbWYqduzN0RAb+dCrqTVzLKtht+gtRQETqTslPAQCMvf/VOR8Wkf3R4qeIRzQ +u8BEI2XmTzaIXHp90RhLWphurdqcpi+e2UvnZR3KrmmnIfA2bIKgx4BQR+mf3dHHIInMjlNNtkW0 +gcJgPBEOFRzTwabJLC/YFacNTsZHeYtDqrjuCTkI1R5lRRY1/QXMeVEkpEHgd8mSyV4+TEBtfhTH +x+NmAPQrSbfeXn2bzNbyQBaPSW5xyk8+N77k+xn2dub3cjjP75MwtGCVdxJKpfkgo50DZ/Zyjm9t +Ziywx0bsTL05cQ0OOwvRuFQPPNRqi4PTKWGEEHL7NpMOgc4PerUdchead3o+8WvYRYW2uWCW/IT/ +AxyBVV+1t5Zr9Z6GetE0M7Qn45GWWsCRlNKeKOgiYoSiJKdWrGgZCt9cWeMJCkgvTca26CWgsoNr +vk0SmUN2k3ygLp0ksAGnH6ryag8xHBp8FKplEzzjCUyAAbhFlU6L/ToAyLHUAGbyz4sfDVgvVwmd +sL0aZmir2GXFbxJdC3nVzHNabZdNLC1XrP+NuHd/94U0fK/LYKznwVhhteiE2W9GkesbhUQSQSXK +1KWxk9FG4CNIOAy3bNzhWsWxmo2D4fB+G3HGXCIzn+ZC/b4Zs9ZUfVA/6H1Fv6Cpjrcvbkf2iLyA +tqd3kCZyFO35gR/V5VSU/jmcKZQ20DT1Mj7co334e/xu0V6TDr0+ipKqSWnYsjIWFOg8IzvOD+ao +lxf7QU1bkT8F/QGpSY4798Z6yn4tSB7eb/0dNomx5qCvKq/31Lp35ypKZSJ8MU2yQCWHZjVrIqg9 +Vi3QR8UAtE+9orrp8id3HcOJA2tMMQyvu1EZi4nt6y7L0h+KuT2CQl+5rLlPLtxI/buCABbu6hEv +xqDBonixdt/rW5V6nLtoj6EChcXeIJ1lNVzUA55N0C4p92hau/QHsj3w6ifr3lNyEVdtuv1yr13S +cIafAHUrBNXDFVLT4hegjUgIflwM6Vj6g6bkzGCOdUaOLcixm1L2CEGixc8Yzbnty4N2YZt3Qngn +PVijH848fsjDimtK2hFU6GLA1OqJAP0Tw1330qvUdB5Mkm+Fe4yn0nCJhd4Hw9aFHyOwXzJTJfuZ +s3l9pAOTC0+KwOe9Dy6Nf+qxC3mfKTrv3iZ0kivNva3KihirdXoxZM+Mo5P/4k2ty3wI3kO8FIzZ +/5tWyUQh0AR/h8GxhEz7ncWCd1CF4myg9lsCoEbY8vsCvvVWyP8p8aLOA8h3lKifnnORIcB16k4I +eBtqPwphQeFkCifbDzqKHThgT2tveRbiAuc4NPT4W+BYWowHe2ZAX375o9bryV9U9dtDy9jLsAlh +gbARktv7UGQNWV2UlfS4E7ZxvVWqb8LDglteN+qvi/eP784IRK4OI3+uc3kgOK+9+eqefpZ5OEFY +2gPHeQciwao0YDghzs8lI/8YbC5rq7l+vzDsLCULydqKh8n+GVWOD3BloJeqNXF+gr74VcCYHjKG +Et1vFUPOJfIWE98Z0Bfw9qIu1jaAZwVbjXR/bwoD99kn4BQTDVGir0vrDG/8Fp3zSnOSquPVK+lt +AeaGrxUlC/HQ1XPSlJv9HqHg6qpONgooK9JaNQQCV3thzYXpx0s+cUqnR5KLAT+GiQ1kAXmMMGXS +3zyf7TLL6oIF/dqW5yzoSqNbLR1QvdNKcyii3I0djDItpdUtOOSLSOKlEH3PIO7o2XEa8cVvP+9M +uGf8DkrajzXPN7njWC1+KKkNSYjhRsYJF2m8jYrKlM6BjFEpmrxgrLb7ppHu9GP7CYRqyLWeHuZ4 +OJekHM8jJKq3zRVBhAVj2c6Nam83sJudTCsLz5ECAkrNed+T7VenBbBQobdgFFlUJ53dTNs1IIYv +/CEi3yUvydli9cTRwPtMlFAEhAe9nGP2uFF1rXu94NmCR/7HAIIis04AjRaDCW9Id6AUXJRn10ag +MEaumz+SyMXMNaMZp5CQvgWKmGwZLgp/G0U+MprGDXpD6YvZ+ZEArqT04IrkcJnyz3LZjwKAn5Qi +z89QHMRRR1Sm275YKcg7pX/27jRgil2ubyXEchrMh6zE7F5KoKZ2XRQcdDU9gcpx5LezC+NV9PN6 +fRxtgbHjXojXZOp/jlY6Ju5zYpcH0Mz1k0FIg0PuZq4uckYyfruFYltl7rhlsoGaNi8xjaGmpcl/ +rKRlWXmQgWOut/HpqQucyaxysdE48WOks2IkUhs7A4g5DKsccn9hziLRKh6szTmKbwFe3gcp90tQ +d+llNTCT9AMmTMLsLCpbSWlzzcjBq/GJzEuH8ySQOond9R1NLTfz7m59osQOR7wGTZESvR9fSiEC +8uh5KYWwnEsCp+6APRhzawkFw66rDdsBNQlL8QP4uQPIl5Ad/vP+uJPZ08nyxZZ3jzgWQxZJ0cnT +MV3qMVt1gRSAGAzOFOs/VpEHsT/1nhmLfZrfTHIOk0AQZTsoPBtMpwp2xMC0IYW3S8gGIRc8SVa6 +RIzCP+/xxxp2tBd8DsMikt1Ox+zbbXRFhLTF3BAH2YYbn80KV6WeoyVQnHePXuExndB5e+yh3A2N +oHiwOnw3OTCXPjj5rCuzFXuSAvQr2AAX7ntgEjdPrtHK4pUodUbqgMK8TC3/nKxon8gNgMdIUrM3 +dPZg4Y/DYkqJ1/vExFVbiTHnlAyofrFaC6w/qW36qIBxO7h87xnharEj+Re7ffKlh4FPWk7FPlxB +e03gIykSd5qQ6iIq+Zmtj1921W8MCpjYrtJ+XZuLyWjQoGNmWoIRf+C9JitM9a3mH2B7SEdHM7N0 +ds4wrCjW3FA0F2nsaxqp5+9t4qMKZ5I4XGh9oZnBqmQe67Jv1eu2KH5DvBWRSDjTQzASs1ooOVQ3 +LsusFL9Lg83EsGuPxEsjbUA/GbVEehqeTSxozGnYNYGYLITOGwKhYVk3K+WOfDQnfotvuCujmh69 +vUWLSI2GCkcZHNcFLi75mkbmx+MTfUcU1oNy0yJtRHyzr7ZP8jjZS8UWC2PMmtcnv8/QwyQ28kCj +Us3/UfQyzRRz5I/GWBP+4DR9G3HoEelsizwO5SvYmkfF9hfDbqqxFNPZqEL9fH3tWLoxt1w+o3Ro +NApAsP0Ckbu2tW3mVf04t4N5u5SHJAGBtGGg6TtGLVFfJlXuq53emkJC3MzyK0fDfdEZABqDGuPN +2gIGHIit3d9Njh9Y34OIGYRyFQVNgE4jA/01pa+XEAfHIfzM7TVSfQBqWCWnxSFPUGGxFSrKXoGk +RRa+F/kwtWM+1hcqO0MuQyWtl0tNCMRqykgBEsVyJaazuqRq2D9MIVKNbCu5ZHQ/5wnK8LkZIGJ2 +1cnQ/gtqg1/9+c14m2tLV4KXL1SmU0eHCfmaShsEHMgvX59KEl3RGvIX3OWkYo09MPGHjqgOLgrh +mGNKLXp9K7lQ3ofVQ+JlEIXjvM4VILJvkOjVdcCouBj6aDvphG7YHpAMS5+H5jB9RHXHcfxcWhcm +PQKlMY/vMC6RQ70b85K2cTHJW5diF1guAYVaC0vv27aDG7++e30EtRyoSdP1qdSaER9giSIOL3ss +je7aT/op6hrXiFubq7QGMXDigPXSfy8m+Ua6A7x9serowiA1RIg/Hv8/RWYRw4nHSS37myXgWHlw +27F3e9FLQkg8HZYLn2XKP62h6wvTQZrt0oMgyPUkryDM8FF3P7+C0LTdO0WNC2hyHsEpibTbveGv +7gDMGMuNkgJK/revKc9CboEmE03vIFaQGbBoEIHEnGa0BGlRPOu61yc8ApuzKZZdoC5UTy5yiidS +aCCeLh6n0BobpB9AnFFWy01/pFxDyCq6B+Fs9VhGvjxM5k67yAEOLIMdcMlA8PywkyqVss3xyRCc +fTUr5pBIzeq5sD8EcHHAOBewlAVoWnrTzPrG7z7CGTCenEvNvneukl5oZ07YLGYI2nx9UEDQLdPQ +fBhvHBYKYiZRv0dnALGo2vW2+9RLTV2fp8C9Tv3OQAMblE2rACbg84vco5OVpLmhTZsc0ZHGNxPM +lXQ4I1403dxnsJRhDL/RxlMQH7e0pqwi3FlP7nNJuwgR5aKi3YSD5BRIU+zRj+rMzL4gKDpDBt8N +KnNDqbByWhJ+/t9e300gd097qxAVhJ47gG/IlROyNXZlLVx4i4vieMcjnAtTe6p+JbxJr27hjAOu +T2nD5qJ5l/VdCDuxJ1mY5ucFr8/Oi1Yxx1fRh7fZhNsZ6KbxfBLWGOdNVG1aWtDxUfbokquKkkOk +ljebVmoEnUVlMsyebzi63tCGDUNf8YUSLLhK07UJJISGlFtSWPnJdVzcQIPKC6Jn9s11rW8oLqf7 +13Ve0CSHhJVv+OgadSyt5kKZOfIa5OuCDd6R7ud0F6QA0741ktOXjKlDYbiJNoh904cfO+Q9+MTS +f4kiLl/0cUrb2pjfY2VIu1RHFIM7R/49EWGZaRww7jrnGTZ27LB365UUXjHmOuwM+9Fv7vKlfgR9 +ovEET/hIwets6XgXRfUk+gY9Jzl9wVjrCAONSRj/q18/Zv70kObC1WaMs+bLlAvg8TdLbqA8/ZZI +xNoJSq4+I6KiC1btI8x7WD9H0EFSo6LemwDWo9QDQUhA/5vGdl7y9eH81NX27YbT7IOxY8bu7hTV +sseDV/vci7trPKqyRydRNiwkq/HeSxpHnPxkt5pCLxE4V2CX9MCEcWqz1XlAXXdmyQtaXUpsgAR7 +bMUbw1HI4xThpNCLDS5Wga22BR4ELVTm7STjO6o+dnZmwzM56gGUuWUCvAN2+/ncK0tsUC0XezwF +Jx3Umj++XlYGw+/WlLo8bw5RttfrVJlqX2tJKPWbB0pTBfEbJPMIt4GcLNINGnoNJPzQ1Zpt73Aq +OZca8QdUcS9a+HyKM86AMaAUZ1sSrRNujW0Fj46hDzOkn3Ez7EBmzHZlbmBwJo7ZEU+fhrtKJlx8 +kmVXQzbjbB4ZoviEwRnHNUaVw50rSlKfp3qYxhvOEfguq31pX9gEbwY0oyfGpjXgpQLU83lZ/lZl +e4rSd1lUng+plIwrMWCrrZdDMguCz4QsInyRbyV7bT9kU/+lIKCfUmBDNqE6xI7aqRFIWfQ7bgLi +4by28mbRVh3MJ6kt87ghLjjxq0X1l290A0j/wvN0YpL1gRV7BcuKt4IFVRueZ0ugl15HwHb2ztTm +rmOlZPetTlGHpweI2T/hCtHj4M1sk6YmTWrW2hCx1Lbl+XUHT+WPsvknWfGXnDSaxDflD+bgMayD +g4c3gpt+s2RhknNsUYGpx+2sT0Yf0rgpd96g1V12C2uAewnAR/0I1cscMkQzljQgWadekVf1qYMb +oGdMiFpLlTrgAncSTbVkPlWtwGFoWpQ6ZrbiXdK5/RqArN6UU7qpInLH5AF+R8uu9obFgoFo5yDR +I+ce8oHbsl2VL2qsSJDVuTeNiclhVi29SzPzoE7E+PeZVRYiKK19oiAiaznF4ghSK5Qqq/bB15WR +irlAyyu7edjfx626qvszY5Pc5AyAlVJP3voyQmOpz2uZyKo7Cf2jP3Ipm+GkcAbJwuQZ6ydBUAMl +BLIhZ9iBwBhEfxjyLJtdBesQylM/JaRE+8f+CwpstyUhVWx+ujl5alUFUG/tsfg1Rc2NI0hNBdk+ +UmySBgiILqofL5+572nSW/a16YvESGkwZFwpMR+U3IXDdLSnIWTd4zDJ+8gqhgOpbCmVPoqAmSrZ +j45fgKk75Izr1DKaiVoHV/9335Rcknwa1hL1es3npHWlWXN6Iogkwa3jF+j5j2QzPFEKDUYZCKxZ +qgNwViIbjE4lAWa0Jr27sBOBQDgwKrNtRvyViJhB1VT7NddEXSoH+zjtsabBw4kbz+tCfAZC0KEj +GwADqaZoEUSudANIIUUnLTPhaQZOi8yMTvpvYQKC0zCnBw4lCb6BAF+ThoJQJ8YJDAJoogNlNvkH +t0qx6emw0z0yX3CtJXUF6ahxc01wWmXVXp5ue8//5G3W+3i/SpMLEzo3Y8PCK+DLqedVk3pwzL63 +9vznkBA+AFvBpu3O4lAsYUtZt2ubOANGsmTUkYnUc68+8VPgZhmhMuJSpKBQXz8pbbraW0Nzv2ok +xDv55kEBMx3pns2tPhECNQiTamI8OWN5O1oVmLgq2zSf1MHllMR8BpCOgCzqtYB4P8CMGroPhqGo +niICGMm1h/0knJsDwimtVTu8+CpflgYDNvAM12y7KJ3kOvMmkSsSVsnjbmxCAuFq8s0CfOhtxAS+ +WIWRWTAVhXTsWo2h+B89PgCsHLTDhE3vtw59Bac0kXAJvc5JvpVJfb1A3XhQAu7ayOFe7lvcxSv0 +kH/ilX56hoEZP8XYq0tQ493+7v2gn+qkGcSTGICxA+/jQNXjDPr1ie3mQEzVjR5e9fhdpMRKdZze +Kg5WbgToL6s48kId4jhhALWkuN2hi4+gxJMaXXXiJkn+Dww6j7Jnl6ShhgSR7nSnCOD/9X5bFeXr +RVzMPgqdlw7H9H9m6rJpldz0q2a2Z8FoyVwV/Xow8E7wkVjOQy/yoBZ4m+rpLUVXhWFuRNasFzmR +TS04X2kZjUu9WU3MYb3dEQ5CNQKjsOln/4HKtlMEAjhp+2aBhT72ywZ2powbzDN3Sk8g7U2Q9mu7 +2wmseY8nVMP5OYF7Cis2r1cssZq1OWPdhUsqtbL8foq6WpvjWdtHjokyIsd/r72tRBqeLJcMvV5f +FAmk6heXfTeNaj28VouqfThr8GSe13SCi0wXgJ7OX5p4qksUuGP7QZtckZolYf+NiBFUwvdl6H9a ++uvP4kBOulHJJKgMFXXNzC28hXsp3nvqqDFTHX0Nre1S0JC0bVHHpcMlB+D+cHxkuh9S/HBa8BJH +czOt2Q2R83fosVIGRzwJXCteDtWV42tilAcIISOFVUO2dgKgnaKrnMdV01lPPbZSx2O1hAxV5SnH +jwaV6kyWqoUIsnQt2bPCQ1rhj4rC5cufqytS6n4FmmLWRR61mk/yvZy4UVfmETNHKRGENEXIRr+e +mxDte9nEUDkacl/eVrFFrF+BXdZWiEvADATI4gW76Zq41qLtYNhOIAjoKgxG/l22rJeT8sUF3SkX ++XFpPDD9M45nHY0kioPGUpzcSah1ETRjI+IUHOxNz/dvMnQC3NA2Kppy4bjxiaWP26KkB9TQo822 +kCqiGvvMEIxWLE8wjQOeO14Pw4m3IFhkRpssg1jFj/oHzxxrC04iLHXawrWDMTVeomU9cYqYh/YS +GF+hTqdO0EsnTI8+gdUJ5YvQ4fOYDdZ2O3x+k+JtXpSgcGi+dA9DTpK5HaAGfqcsjjxK2MFQWc1e +4J/c8+BCB210yOCWN8jG2WhVLhkveUEVsbASqe/z8NcF61NlUsmU9WBo4JL5nw7390fw0tH6myYV +TRjK8fnTbqjjbrJSJ1hH1NKJPuQS4DPhnjF6kYSDW4vas2mFJ04RDBjkUQrvwe9P70pAdMkRWUp0 +Svlcd6M5Nz2dhYc1M/SICs88RnqAex+x5ixes4uC+t+SfuniX9g0X9lkguKWtTKTAay43JrpqBSt +hDPVdmdG/POVKLB1csX+438+pg3Aolfdjg6ZJomh/A6MzZyJ86c44pZD4mIlWqPPxMswDNFOUEOc +0CSL3MydNAYKPqZ3sg8d6JVzUEst8FhMSUAwFVbDX1jV/nascO1qBDIWpnDsBdVW9UIhp1tsT3Ez +2sBypzU0rbUfruRqLoJpCl8zq+6m2zH89Bs7hJQtpzaYRAF/BcWgKDUsq2Qi5ZMzc7cfoRLfyGVO +4jD5s+a+Lrh9FBI4rognVZ2clxAhaWx09NhrjtbLbUxngfXCamydMLJD0N6f1bdHxZGrcJNKUB1s +/JtlmvrQhRen8HJ7rg0XavoX6vm2FrYYu4Qqh7LkhzgSDoEkEW5oqC7zBFJ+vzlHtnZmeQ5rUIH+ +GEwzyFAyfKxq3/0+kaRrdFwQPe/QMFdSuQbiUAP7ryf1w/Wvbp3fXKKhYW+Gsc9R6feH+5kqFMmI ++cT/afRQAO4jtYXEyOYgNPkdGGWjxd43zp7VMAgTZJHf7xhxJd7V04C5Uvpwos0o72qIJdpbPG3A ++XTbg9vU642SrrtiNuQAYerNrNoYlMev/KneiApOOwfxnwzz/TO1bepqT10oTVADL385JowyAzsk +xZj0UX6uSUtZnF7vL3rjLQGpUcxzjf5GdSeawcOivCKDTUqfXUi2Y5ez5YJNHffPaght+Oe1TqSS +WxsZxP2TmmcJqqMoz/qZg//QNfjopyuNjb/nDW/9VWV9BnqkXV4PU1GNffMtb85qMFD0Re2zDOCn +r+NibyRijeww3rA8Ced4insiCbJ3Fw1TMRb19lU2xBu7n9q2CIARZdT9QEMIpS5z11zbIaES9nuo +Ahjwan2NebDn+lYweNhKRD2PIrVE9ZiJGX7GmyOMJ8atD1QNsXC3xpAqPmhbAHyM4nXlLZAOrfgF +EbhL2fYOiOibvZHdZX0jhqg41Qo3boErmSgJPDUgMChj4VcVmvhxZx42aXX/jYLEGrOi3dFqW2jj +nCwRTbY6e80VJESeBpPpz43aQBUT2yc9aaMEdogC0+VcwEimWUu627/fpKMvxAUk1MDg6x5kT/XW +2v59aspAlPsMAn0OGHHmbvtUUs3HCuYcB8MSotVYbLidTwOrfwwOIzvWcD5gJ6Qt3TSEbgYMufjp +ciL37NXLZWLpI4MHcpN5nKtTzupvUJvFPlew4Qk3jvAPyE0JxING7VGBfie/JGHbTzhSUOqZtm9i +VYJLF+RdO7/35f5UJxb++8KMpPGgZCCaTBmSFo6nvl2Vqqz3OCq7VlpNTioTU3QV1X90sKOdnIJu +DFUCujodaH01pyoBCkigxhTK10DB40Qb0TF95KMFv/dlPJWVhv37Erwm1bBrjPBUnLXpr2PvFxv/ +O10q+ig3muAVKuwStyaR+Ed0fNlAjzYXGMHQQd7Uy+J2yb2/4J6b4IG7J3gDRoeZqOrtIszsug2a +rc7i2gqDmka4SsBpuKdo+OGiBFCxZp4IAWdukGaHfyuOHVzGLC7D29WiV5qI/messNjOrexgzHqy +HA8q/LLKFREspxSkaVHdebi/3Y2m1TCFobOwAuPo9/LcqySsGowAnPMMW/sYydv/+qjSh8amksED +HtvSoPXTK1kYmieJe66NtDKa52LjTNhuRl/ccmHiO+tIX69HfOMe6zfs/zMoMhR/mzdVCpohG2lw +fTma8JvqplzPmv5bJbN1IKJBI6lIzdWx5GQnb/+N4RX0N0KGjGMy5FqC0uaxmoiD5WL5l5WD/Aee +KxxM3aY2dMC8NDggMHUNAhn2apGtBJuEDHcnMC/Mx3xeYQyUofFoPbEcFQEAeOJJvhmAJ3hX8FM+ +7tziXrPLPjGAu2ywY/h8geW+4CJZvk+Ij3Y2RQGnKszn2RfOgScV6cUdLRPhOLh0OtO4kNubkSir +8ZJSYDs0hC1dfr71dXgyoMCfeijYg4fKIyE9G0SNoalkW25bDq3wq34tdUt4Bpm05pB6jg96z0Y2 +TcyFa8Z7ufkxPtE3lkWDMp9mapmzOWfXyaPSwxyhIr/7pco9Th0T/jaqjpM5DXRN03gclgiwyvLW +SwD8mIfOPiUUrBAUKI0U0iqV/UrLzpY1yRgCYBXmgZghOkexR3X54Y6aQ8LySjN6zvHT53/Y7yES +MWkBMT3B4jemvsEV0sEK6gzZ51h2SCYbCnSaTBFP5mtZbM+O7NrWRXsc5HYRZHpKrze02ZujjQbO +VnZ3hm8dDOxlyaFqHY2cpBOfZdP9VHA68MR+RTQtIUg+byvo7X96lhNPxlNQD5HNi4DWXCJqGd/2 +IYf3qh88YkzAZAcLO7QMOI2fgsFIzQ2ZGWg5RczJzxcwJaG+K7zWAaNIMqQ9TZG3F+sONIPHJci7 +BMv607j9mmRg/Oqrm4BU4QamBXOB86tdA84sUpk+IEOz78ySsAJr0i8JjfiRFIulnYGuJQaEamUf +z1IjOoDkqfTWlBTvw7fY1kYQNAtFLvKVrk3wQWGaNZFjVYMBOeAhFh9CqfVHduhGBKMpYkmuqTj7 +fnNu1G004wnLTmGCQYwDuyaspik4HuF6DmyW/r4uCbrR+BOvDSDXDFdHo1V8nNPR83ujcpKjg7jS +wGrxWcHzWEyRk/3b2fb8Os4j6O6KSpGCP3+Oh8IcRTCWVg2LNTaJwc2vJbm/7Zewxa4SN7TzCEUd +gelAlJfn1qXWIjjtOibd5IjxgBOnHZ5YPUg/YLUqkRjCeR/SiahY+mHIH7aQx8GwXgKgivs5WHP/ +NTb56D2e5nZssLVHtwFQPwuN5TfMxWiVcguxIFyoBMo9L+jW1Gm1XiijzxsUkmDjadfWexcCEYn9 +msMteslN9YncQgf8WcC6CRmJn4/lwasX52ISPB+0kSvALXzsJTIX9GrxE80ze7LuwZpU/mIPYEpz +LJfd43KljK83IuWcvB6F09Zq4BaFLmUHNy66Dh+ibgQyce8W3OeGfcIe9dfxEujSK2+1K/yM+LJU +bwnMC3iuTk+bkSBs26Gq0MmUsn1d2c/xGZWBfPiw9iZq0QMaCcWbmQLXI6faRUnoUgRfGmUCQ4R3 +er3Z0TdF2gKQmdCyO+PvIhdm96axIuaNGVq9PseiR8hex3GtdwZYLo0Or5WIVImERCq/OT9/puNF +s8bH/9Imye9L8qvG33P0Z+T7MIbyo4rAXEV7r3iIsoKLllAHsGQMMVY/IQ8UbW4V1g9G03xzYGPQ +mQ8jaRQZtN671RemhCqzz7Y222EtpCULDeQFrJ3vU/QQuHX351qzwgyRWWPgpNOWSRf4R7R0/e2c +eg++tSDFer5HwrGco0l7XEEjr/OzLFlOFU1+rQqJqXTFSMYlTV5Ne0EOYAAGSrl09zSA/ClLmd8S +3wSg1vI06RU/GTerswprTYT9rDlSS8pMqv39XFHTjQ+Elu0rYsezkBcwOi54dsAVtIeGdW+RfJEf +SO0ccIGvVEmZtTkwCUWNW166gJ/LMP+RylLhXML7sTAn/IowxSH3AMk3vOmjMTffxBlM5WC5kDoZ +pww9EoLIsaY/PAtVz5EwhxcqP3G39m2ZVjLEHABbCaottnpFYGQ9xfAvL2zZ6zsyXJR8yUaFS8oD +2yQFdM2Y8QqQCRByu9puFN8CT38hlL7vitgtWNShWdcsNa0lPDDrtZFkxjj2KBD9Wv1IEhJjueqC +DoTCiVMN3B3mY8jBqb3uhVl72oJbKN0/nrxyGu3kycSVhHMMz61FHNCQ6FIu+HWQSl01O0kW8sK2 +auMAvOLMRE8Oo8yMHTYTZ1M7aB6kzotWkz32/1K1CNkcKwjMs82X8YxvjK/KaeE2cfux4jpFYb6E +cejscWI/GoavOIahEi3uFGMQKyFNZOieyeGkeQweCRowfGracGNAHywcLemqc3erVYSIK+ouZ/R9 +58XqXv/aE9a5Z+9trKiXCWS9E7NN2vaV77UP5sopYSaKf7o3HDyLqVk3V9Wlc4N149jn+SqpfgUh +9Xre+O/BAX5aWuYAzeAwwj+TtpCVgRNj6CYhB6L4BjjCZgc9hXvGZuQag7WsDBl14s9caV4DugdH +jpZ71F527VCEP2voW5H2h8jFLByYawHNPtUmg8YEMH+2GNtgWd8iXbDej0O6FfwcRYX8xfasAVMz +Td3eEPfI7X2moKyajFcj/sMB9ROvcfSv7DiPxgTE8yfnu4DfsLOCBv9W+hP04QQUziWvZwqlXooc +xgzqc9VMpADUEJ+cneGpFsqCy22yQydeaUo+UEfRi2jXxOmzoTTBXEop8xAy3Rbz+CdO66is9kHb +XRDN9e5xVN9tAw7yPZTSsbPjpNDYURNzlaxdL1VjjSkhwvWsZ82xXflKiUXv/+Fwy8zv6D1tmpG1 +3SChyhPnfWr/3doquxPsONvPP0j3yVfFg40uLDTzmcsTcQCbl7whUyhkB2We0BPo50g+EJoXgFl1 +qOn514inEiyTyXAEDHXdDACFdvUVdZV8nRoMLflYFFOdXyGXGjOzblJhjTUhz3+zS9qDPlfX8GT5 +8JuK4Vezz+5WwrlbhGeKBkdJZTaQQUrG6Byrv0182sZ6L6N6Le+HIdrSVFUOmbq5WvwaYfIwibTI +G0Er7eIvgCw/kMvCJ4Zg6F6XDYBTi+3CxL26MQUWdzUvIPoQhJ4BYtePFlhAmFjHHENlrzyKvGc6 +slbmDZLcpg4M7dra1GXYL5embDPx8yX7Vr/f67op//2ODaIMOhaWlPV+QRw1TMqBzWHXAQGVYw4u +4L4IMkLkJpPDPxyR7OSctYLewLQPW2lQf9nGgSm3nXrR0OlmnL1nOU1wmW+9tEKO02NiUkcFar+w +3+ovxAH+0Sp8zFVCK+qimPrBnG1UWhurNwCqwDHUj2Wo4U52un5/x5ZH9DbYvmsGTeZq2iAAeUNg +/rkMEVZsVWmwDd3F7gtnAT5sWhJqibYDrtDaQBxay6M/e+P649JVgzuVc94jQ+YgB80m5j6TOWcv +DoTTCTQiT/T4D6HGGHgYmvaDcaob87+yqOkpyMvx0f9WCW28nJFAVEiNgU4/rlZQ+2+UoM0pgTWm +bYSL2dMOwP3zGrt5NT/hZG9UkllHXQ3GOlgRh8L7PBNEHTzm15pRpSbMk5og/h/Gv5Bw2tMJiLps +aMdIkuWQpIU8koxa4Ilj5t3CszTKUWHlFAL7MbzZ+0CKnWj386G5PP57043yS0nqWgPK3ZlTzHAU +kHyOb1Jwxxtywjtev16Bgfjok1TTTB7C95Wwx3/NaZPAz9RcysD9oqiMt3UOLHDHu21cDxIDeY/J +B9ry0TuhEBjEbFBqV9hodx2M2Ky4WfQoi1qxCyjACPh5Pe8YT94JZxWH6dfJZnnPfJBEckawHq3l +bZD7EwVGRMilXTMBex0nwioEOfNovixmOgbxi91RxV52O0K4xFGYMxCWvsp4Qr0nO2OucNDVlIB7 +zLcXvYefhBA9OggvgPvrzqnzmpuptJXbO4gWg9k4KDAFqNpPXhS0EtvqO29bBEUDkWRtNQ3crzVc +mxBH/NeaeppB2W/jquFBzza/nhKbTYH2TI0BSKoX/rRI0Rkfa5kFz/jY2IkCQBk5oWOolfC9RuYq +MTfkCXjO9GEwQQIu4j6MHft1EET95uhjNm3HoX1QPhfX/XZzLAX+ysgbGtyyF7gZOSxOJUEKVDwH +LROrJot9qSWKmSQ/nIvxncosoXbYw5vya6ewLp7+/768J8ZZ7sl3oV/VpbNXgGDk6XRkQS9ewiK5 +DUXLcqa0DJoZr7B2lVnEQetPcDo+xUNdc5LIK5V56eRA6BEjksPMvY0PmrND5FjzOx4oRFMxX7gx +ZrbsCWY4CfbPkqK5qcyOkMwLpwi3e92jRjTA2ha1kA/n9UQHT6w8vxxocbKSirI+A7K1TZ18aoLC +kCzPL/B0NW48yJQ3t/5EDKbcwP3hnKxahUXM4IiXZFNr1RGRGGtQedzNVSCR0up95gaceiYFATM7 +AB3HCpwaLT7f4pK8PfoXpWKn3yT5unwkF+2uinoldwU28I+1Wlp6b1HLnhA//lx/D8qQK8oggNvr +flFxPklkxRiQVW/hufdysz70j0eAgSvVEoiBa5yk6Gew+37mjv62GoevgkQcHJtEp4zwWGYTA5KO +DIjfyO7PO3D1xrD0O1DtEs26yO9+muLlMtt6+rzy01hhDIS0u6JP5v5/nghh7qkXKfmLMeR0oVYU +QHjWmJNJRtnrit/F9AAIe/8Uf12sMc5iQgXpBp/cAQmtC5WxeQu6GMK5yMVjiNNly8L3dFYXM66M +6uXUlFhwUMlChDGHDTSibKqFJre1aNvxhYoc2bOHyRH7Q34oZU+6A1T4hFrpyInUS6Viwa9DwsDR +gUM7kqKffY7FRo0L/9ewX7qRn6OttlWXVPQk0n4cD0sx4LN7ICgxypQiPf9BgPcZJD/YukWgJdNy +09vLH8e5nR+OoPPIWbpiLR8yQ5bUK3YDiP5Npw9p1bop/y5PjUBECvJbHEke7BAS0pBGHKeMVR2D +mD5Ix+adOBsCjKE60kIN4UqA6G4G7dO2QmZl8oHi5hnMI4+jjmhmhXtOTPaoAD5gY8o7vUOYKh66 +9YcIKwYiGEll1keR/V6FYUi2jve2bzg2b+NsUpZ4/DtrFjz4I3vXDuZO78gLqDeTNU5OPluKigo2 +Jy+fAayu2iinYpFxLa6OAuzdy49aWe2hxI+EO1komqB2Tpg0M5olTUcauVu4v0ukZXoaI0CfC6yL +2pWQCDPA8psTkDgJRwbRs52u7jK/QEKORd9E6Zz3/iU0ehWzmmyocIiAbvTJElzaA1phmwyM3pyH +IHXTaW0zmFojCkeyIND6aWE2QRmYCyG5niAxzwGJaKY8cJaLsots5BQ6TRCFirXMBAKdjj+naADz +iqVHfDpRSzGGYiv6l/VZvJqksjJl1StHIKQhINx5EouTsxajGfTavaiY8STW9MqgSSsyAIr32kx+ +7BBLV9tSRRRshM1pAzLeuL58qBOFnrDkw3abYB2Tl/2IHzBK4b+iHw1t/Z7R1a3FSIa4FZDs9mh1 +V4gg5yS4kx16GtOTteP71o+zBGXwGPSWUe5Qt32wq1cN2IUAlicflX7NL4mx1lucQX2JNCBqWxqx +Y9r32sKP+25C5rGQqoihN7+ouVNaGaakqqsUJDCFpq3MH3uhJVpoZtcC6ZocqP82c8RJ6t1GqcOK +f3KsmhA8AYtOMOU/wU0FlzGXUwcUgTEGNrvMRTV07l4gga1R2vVH0p9sbSdAOYxEzIhaCWujtDd5 +gEpyjQMxPRTZy8OdXvvyr0chty8hGHVGo9dJjEvdM5Xtme+k1Biu8kqMEojMoVpv+vr7fbXnty1L +Hp7+UtXjrpkEi+BWsKcwrRw0cquICbId5BajOIV7BugoGC1gJQ16BJQzuOvaggaxvD5+WmorKNX7 +xIky8kwS8YQbkwj8uca1eR5cOsL/wzoXrt412wCPEw7PQDQa10dnvnsdIrHMBg2jON09jypY7nv4 +WqrltjT2nHE/w+K80p8S9xQj12TcyuT+RCAg2nwcp0EXNQ3Jdvs1/uKLft2/CGm5CKDF6CGBTRMd +Q33Z6FqnyF6PKH6oyy+Ae0Rb1LTAmWTRn3spfHKqB0YRhh7sIny9+jYYcOpDrv8Ze+GcDlOZ3zoX +wTafVaC7hLf7xrgO/41CFhI21k1A9hutZ9yO9E83NBau2CzOY+88MxS0UfcLGaE60tRGeu0P4EjM +4zVTGizJfg6MBaQ1KlPtZIeWymbZVkwzSRpJbtDUT5vqYskk0sbnFQ6ejkKybh23M4r0VZKXoG9L +RBhWFHfn5MDycU21y+izKGatDwqzQRP2VWttxTMuc8z2b5cqliC0wuJV7qPFzXC+CIwwOtl1ytLU +re66DhvbdePEGIIAW9Ozo/b0SWcbg5WAdKndHGgk9IEplyletQiNNx65R4j7tZ/7IoJqiBu1i47V +spGwJgDiQXHzFqRoImBYO/aiDT2gb//sKc54IZGAm3B6Ze8lSu+egW5ifFZ4iw/Uhux3HxvBSVwY +UAFLC/bARw2LnIV8s3RV0QA168ns6P9BNQZBmRuAiqJLh/ZCFqXtvYD8SVcpPvDnmMZGOAFJZJ9S +UryyYSsdfNPRKCw9zIu0imev6q/GDrg75jI19C9NdNXc9PkNY3qWCiKCUG+lhOMtmSNr7hCnA9BP +MLdp2LkUdU7mZEiKzYwr+KKkKQ0NYbVmEuZtrhkJCt3bkuXYbr3iXtBRuHqHFbbEKfvq3jc5oweU +KhnIcJqG59PrJwpVK5auTJC8GPmhZtsVVa+jcLxqU+PwlTfQSYTwx/ejResp5kIJioS+5kLwsov3 +LAQaVnrovuDU1BRGKWtZlW3XwJiibM9ECOMF3M+vi/8Rl53F9x0J9rSYA+iSVFX5ujOG0J48gRWb +KBC0FfWUUJ5R+nSOzUQXWMLtdFvFKtkLE+XN35acrtkwYWVTtFuxnv7HPKLMsz7D6308/AAX0M9y +69PwLTwAu5l/5SQbIcWwFGpVSMHnkYj/pT3h6ZnuQo8/T/7U4BsCdlhENUP9Y2G63Fxg8IVL0QME +FNFRCyNO1kN4yK7xp/BIEp8zZxNR8p1DuN5QDo5YIMSLB3PU1TVxlypNWpXuTXexH7E/BtBvmubp +GcyOBqP2QxSw8IR4sbkpk9lTxBLBghbcTMbhcJWFGCQ41dpHssDh8UM/c4MBziK9UQruaZhLPX5X +pDIlhyZzdB+8ntx7pMMe1BvlUd0ejPm6+jkJje/60T8+EmqYfV4XurFNO3EEOZ5BCoAYy+hrWWX3 +9ShMt6V7p0i8/muudFKiMAqtWi9Vnm+BuLGDKqOB6+OXTu88Rcar/edXbfFJ0GhHxuykRWyWeOzV +UsvqFXrkpAAY/OL7w5ibVTNkrYLA5kOE2ubSbbWChEqNRNXh6rD/5eRSZyzgadrtQDlzj4MCIqbn +hmBUgUSsHVZ1u3p9aHtHwPsxzxzmgdisemZ9HTGtWIh8p6MweUx5ny/E5erhBDrs6v3GxDowv1uP +r4Kk8FKdtgAh6aCvfS708WzMy6vfIB6FgNIZXB9WedEzhEWAd5aakmVFhYSVhU+4e01joqHP3BUW +XoB00omJ9i5XkvxV2VS/EMSy+n/jubIU6xqDAUne0wX1bWiW055YSaoyBZHqU8xllA23J/givlrd +mcbUtDQkIxQni9trujAJ+pNZ9F6ELKZDHvc/q70A2wzqtK6oFLLNBwGnkcwC24aBD4Bm1EG7Z0z5 +Wx6D5W61IPjYg35s+85JF//CuiJ++w/RLUSvFf2VwocqlTw6fBrPPCZ6g+eCJdETzk4qlQLe0I8c +Wf71FYV1YG7id6dLlnY7krhwkXAdJB7f739/ItLnjyFK6GgCRd2rAMEuI0DasuvTDvf2BnbFf7L3 +lBLwlWOyYsUPbNaGQTMFBo92S0IQxMa5p/iU+MP3fQqU4NKFQIPgqSnSIlVtUWbucuQO/cU4toLU +NFKZ7C1HeYRZitNDZYfFxbU2mFM/gyo9YUGuWuKsLTeEJn9LxV1zNkC18SzyzKO9+1Oqk+eS6Beq +VW0JgvZNDNIGhfL2SJ5koUe6Wu+AhNXjbxCKUg2DG8g62zVNMquhHTxx2FYzHftmBxz4D15e++xb +WeDwcfPcsU2TpeRN8WxWmqVmfciEzkZCbu7cixufRfr5eiRIYC9ThpiPeRFLW8dF6BKcd9b6bexs +GLrSSp6Bc/Qcl+5ZimBVuDSQ5t/nass3IwACZbfLLuog9xFNm+0ltklCOiqnZD1Eiv4HBE4Lgmtm +8qJYSq6aZc24FhtckOyeYWQIv7jfq5jvq+PclY5l+QpTmIU56NWEwdSBlzhauDtY5lOLGBsL21MB +xBqtF9mbS+iMPX3cxNh87KZROtdprPrGMFVUYLko8UfBfoPgiSk2SxDrupIt7Cy77fvUOmhCSoQb +xW9xNP/Ralx3vj+4MTyYm69tqky9XVusaHTDjhFNz5A8LHu4iCRM4yrZZimVEQioXPqvfDEKNMFz +yO8uSItHY1BCZ/W2z21KoAi3B8EyKCrlobvVaeJGJa2/vhlixSBWmxCwRwN2w4GsYAbvZ0XSIyI2 +uJbGsjZLJzoTuWVYLPRR5P6aDeGm04hKpwK8JUOlBF7FYlDHTLWGUgSYZ05uGtnsBvdlsnwVSEZH +yQBVQd9FxoI3MdhPmTVv+HzVYjSQJRKtrPk2qhcKKR7sVQYIe+H1wAX3Fifm8kiISiUO0896Lw05 +kSzHJSlkBuBh0liVq8Z1sTn1BS/wAkauYrFyC4WPkSaIpoEbqBTrAZ6+HWOOjsdATlMhcq6a2sI1 +f+so43cvJWgJx+h3iJs1Hi5r5cPN4CWzxeRam3J+hIUK9zVyng/x7eczPQnQ3zvp/+rdQRR/CVQZ +ToiMGnW4sAlSSyhPfHA2Uft1HEqwhshzvVJPm9Nk3kDoHqsz3uyy7GuNSC8ue1LR3pu5a8NuDBF6 +ZYHXUOYA0BegmlDTWuMzpv96G5AIhZOvynSxmo39d9KYIZBTTj2cgXTzWsJukviGzc8e3gXZ4WU7 +TLI4EL2GIDbHvLaQgIOsXuUSYGkxzrno0BrKCLQeszR87HEml2Oz+qyvopTKy4RYS1Q4deMQ0N43 +Ve1X04mx9DjXB6pyfj28pg1NdUKBAYoxhU3PvNHg2S/7BVdL1tEPf+e7QotoOoO6FBaw6OZ1n1k4 +OrgR5ozECRHzYra1hJMk6LBR98YvsY6EuF9UPn8/cmPzeAThRoA1PcGsNaOXpNiSRVtt5mdBq4O6 +IE9rZDjgFSJO9yRqhPngktQSMXDtkXk6rQPpAElAWA+pHUsXU5pSDdnW99RGR1gmDcORbixvYSj4 +Hnm18L9gY7pIR96kgDw0bu6xazYYuAJ5RUBmY3A8R7tXqDcC5duJqFVcc67iLsE37NzpPQRiaIKV +fXtSuKTCZnlI0LlRrGzoLXz1gGwIdM079GuOmmRQbSiKYRvhO0cBYAKKijlgLijkQhnQVWVXhttb ++XoiVQjTKAg/DcZZJOrho4kHFDH511eH0b47WFSoRH3Uc0aqaENE6c/csDOwCOy8NUw2dNXCop/4 +90roWgXYUunCmQg2maCZ007nJUAjsXMJJxkySiV+tSb2ZhZT2L0hlIT7bUiwTRf4olvhAae0w379 +1wzwZPRcvxR3mzHAyJFb7oI8Qw6E1WqfYCykRVA3eHd7n/xTH54jEt7fGc490HwLkQJnOFx7ru3/ +uXPBuWMKyzuU/UhIsGpPRGs7ByCyBayneR5MFT9Se9JU3ejG4i+jHda5ajmVggJEj2qZpO3Ln5Z5 +5v6lLwZKnGvAlue83QH6B+kJotzYuoBAdmFww7pkU+m7xa8bpI4iUJypWWmuQwCljSnlTuFH35bZ +FWVq+7M1K+BAdbt5oA5Jfe6phiJwViDDbDJHjprHfiE/If76bCR+3wDYu5721ndf8cM4PD/ucwRr +MG4arBvoPqIaK+IjFcpRIhERHt4eZnto5IJRAv0S0POGRX1s48KTasd8xSlJOnAyPQeWUk8NCorP +w3kdLZhsE47g2qZlB3ZDSMu5lDtziHlUcLsX2UZkVqPLkpg2r/ywpIwqFK1QvPreY290VBU4XD+U +1E7uzOfPTrYKkkOPFCmzOpxw36xoL2eRgMif//1B5Bbmg8aRSW9izMln7/ZWlun3VTG3SA1ICIaC +fk0z+4sRx1LiO9O1ZbzRD07TkImjOHgIeyusl/zh6/c6t+SvMoXqyTTSqSbttH0B8P56I2RjFv2G +Q7/B9C7XW8+H0VgLCsWbbZASs2vPbFBEfA84bupNtQRsKizMIV6VPaw6CaGGg/Rq5lcZucpp7Oj2 +t1IRJ1PTYXgCk8wL/qr0vEQ6WnvsiNcXAb9V5JbI3W4TeQo4LUWkvSA79LpiyjEkTc/29/GeFDSu +FP8146cgFXQHy1HRsZ9BuZTXinIgJl6WOhLp2+iq2beSckWRpzZohXAmYamJHtkV/ngsgk3AUTOk +cXvRocOAEWH2r+0MVbZ9OzZjHIeIgJNSPqudhT1hZOU5eoaBd4RA/AeHGJVYTM6M539rwLg7wHiC +hZlisb5IfRsuKdofwVpuANWwiRYCIeTJd9dcQpFo3Qw54J4s5FmADky0qgnL6VUCpMM8WSEGGYEx +HUP521Eg84YyU+lQzfIGldom0etx2A0p82FnTRDmLg/qnwKHxJk5rNDvFps2vkCKkg7vgRMILbPH +iQBDGgKSnx9SHEXvB5PB/3IrggX7+LnJMfp9G/Q0PfBAQGImAfcDli61OTXJJrTmkq0w2Rg94tyf +4bsLZlxCkJTP726BqsK4pf+Qe5rWrlkMoK17mVFiyPovZJHxpthdp0OtPsMaZ4floSLsqI2e/7Xj +ti69URcz18xfnnnRgkClx4ioFsu1VYsK+soAFJ/d3/nGnhTnz4VXuuB9wy1EBTCQFfwEu4B3yaon +g3ML0rnCE20ETtcxEegGUmODYmgbY6yinDAVyYnjEbm+M27aEdY2XpGy+BF/eta99r1SUh+pIuin +YwzGa3dM05Tdq0MpF1LoW6wqIHjvMH0hH5I7U5n7qbsd2AdKvFbEt9SBDgVBM7Lhz/XGgsYtTH3e +rnQL5WLyiZS8f6VTNJfsTkKEhrYhoeHT2aK4wMHGC5FGZ10c/6izBswFWteWS0c2bF7auN1/VzRe +5RUN/Fo6MI8WXXXZRdSKdax0NPmN6X05iKkbLAtXSy+p92Mnfwsrc/WEZVhRx8c5fHaTVi4RxmJr +n8v4O0wXqPLRvkU0Rm1cKiwVr3fqOfLPTpMBP5U+Qe9Le9R9UZ2afIgE5UYYCiM2GlyWqjn5f4X4 +FeqTKc3rxulxyWj+m5LAuVkfFY/v6o+TToBtHN0f3Si668El9iStq+AE4kG7rNMdJZj+F96xA3gx +wVW/ghJPtfW7tFJ0Geprwz9Q7O4lbjyfpNPlnde164msLWoPXnwemWkW81fywd7JJQtaXtajbFMh +cTfTZg8Tq1vgEF48zCnhl4YrvOef7XI6ilUp9KSJ3fqZiCLnAJiK7NWknJsxnD4f/x/MPMFI1qGR +R+QMm8idA2LD7I12EsDoiEiXFZyJ6iSkJVOUe0/cNVVVIymVB+gA0QMQt3eHFaVm6rlxykye6xBv +u/MPz86YB2w1YGK2dUrIZGimmKUHqrBe3DFTijI/uw4w8NmtBj2Z1gDvAusRJokVKPd4Umz3q2bM +1PrqErrTbCqpDycm715G7SMh22LzYjGZay0MkLuFJ2whGh3knbx75sUQ/02QkH8LfDEJ+Iv3OnIO +HZtfxeP1gD20UIQd98G83al26JDVmj+00MZ4Btxyiwyc9BbxzNSKSoKdJ8r6DYWbv34lPZOZo8t4 +a5jKVHXjJT2f7FBFvJQ+su5zTXR4VjvbO/BwNfNXT5CtRK5XmWnCGhaOld52n6GCICXPhNOFTZM7 +deTOBNN7Rn+q4czIIMEwKFPA39w8xH5wyIko2P+rpqDbDQRjo9+/muFy+sfxfbjT9v8DvONbmhZA +APyD7++OfqeqZIQsxmWvMGvIE6AhlA+LDUPLVPX76OzgLw9XFzRwBHMErMk/dHwG1W3WVWifVByX +nYYBXaZaQ3gp+dUSAI7wGZmKAx7cFt9K6urxita9/xdYEWnqim1C0E9rBCwmiXxqU4Rkfsf9K4Qr +Cp/362h8aZjIJdsyE8kCsK+P0I3rGn3Jp6TkehwRRRgBoC+rvZoa5eWYVgnJ8CP8yaQ6+9G8VQ/K +cVS21QvETvMgT26SEPaLuRuPy+u7eG+34jXCSdWMbtGFIeta4jJcFI8WkXkNn5BnIuVNOku7j85J +oiVgGncFGmN2ykGw9OvjNqK+tHwziQFeYaaUTvH+kZ3a63VT+dPAETzafkpUNiFhj7eqna5vJDPb +CcJAZglO2jMoCb499iO7/U/PfUMnvy1kB5LDSxvnJ+ViPpO1QH/RdGVBb4P+CPCEM5YYeIqzYSNJ +U3OHY909scxQ6Ly8TB/ifO5oOT6kUdUbEegTG1aXLtX/Ek5+D0uG+56uDuTYRGm048i2Jtu/e/hk +abDrYob9S0YAtc71xgOhyaWTN8u1V/fCg47toGQvvDQORTMa8PcbwU0N7TiHn64TQgoqeYtSNrm0 +SPdMWkv9/1JmueNFoTWiq804+/q+BH8mKJD0JpcbWEsN/bNLVXpof7A0XF3MLQizkA7o6l8CxemQ +TpeyDYyyao2HC12jaEya7p+S+JRfYwsgTIbIjrsrkFozK5CsUOZB8OCt0yd5oBTjt8tnvGUdNRMf +2Ayz6ys5IT6cj6PuqKRaokBnf+LlQrcpIxSFS6Cyv8/a3A27L+6Z8OckVvbiRp8Z8cixq1Swo3DU +oXjY6zoOuBLPXxl+zesaT7xrOq/FKJGxKpXb1Uz79YSG+U6/UmfKRYMh31BBei4sKJqK6GzeDJzM +WRoTulGJ/F14vKkcaP82miUdOwXa0CaOXBMGqDuN4KbKlH8w8hojNVM0POs1qe6S2JED4emMFaEA +8OAAIw6ssH5TCqM+H3OF7yiUDgO/POYRN1rfxA3I1YAuxOvigfwyg7opL28eObcJ329OwfsJyzL5 +fGcO2RREap9WAqTMXLnEJ1XarCvdEHuM+acCdGUhpHRzl+QpYqTZkHukimVoGGFa4ZcN3Cw7vl7f +eR5a8Y29UXjWrOt3jMcddHNe+q/X3c9WbL0JOMT61Ut3d5TJFg1ulcU99/ApoKLSUCQJR3ASrntr +kTDlZjtyGQKQ5EYpbOwUQLETvT0bG69SSjvpXdJYN4L07QSp9RktLr8r7UmwO77Ox+0H+zgkU8dn +FRiGO2DY1UBuxIyAx5MHOQ6EgUzdihpYZmaVUSWtpsCe9bmT6YdmVoQWBnAv9ojTj0fQyg0Lhy8e +yHabh8K1dE+pFVGPjS/vdby25bwgc5hhNpr8PONtyWyaHIbISmjfZ0SpmL9N8vftP1OTF3ZGPKhF +4ydieNpuNi+TkMtGvXYSmCC/DtIpxMOLDWX7mKaGGZQxCCLg9RtZ59qfD05r31uO3XmBfL8o5McB +q+TOO+x3DlimkOeGkZq9YXZZKb0oQBe6OhPZuz9gYGc9NsoelwjSmJMqPSYHVlKamaNeEhUPXPmK +OCE/woQNU5b2iXZCPrCk5vY2rbW8DtDan02RqvX/8i0O2EAiHTVNS7Usc8k9FKMpfYs3Q66BoQmR +pEw6PgwmRWJiGaZECI84BDBAP5PGrAmciirQ0dzVLkPWhcDc+SG3i1UFifNa+mWLPi0DmGQYV9Mg +y7A0fohSvIv02DiEdBehPjSCtl7NrsMJ/BBZTMrqMmJKIkHkZX5jqEVT/Z32DD7z9HPlHoeWOCv9 +qKgPGRv7DqMLyam2IGJTh045jX6r/3seHUhV8aqg6+wFRcH68R46bTJH4qVumWbL+EV3Oj9twTvD +ZtL1a1K+Na6FS3pi3LtJwuSdyi1s008UxXP5QY+Y4UYxz339MmKlgJ7NFoWMIgx4pPozXW7EYds0 +kqWD+anYIS5/5x5/5m6yxOeWJQ+0+clDMes95nJ+D9jaWHyfS3pMnWcjWZQo4R93tTI90wdIATVa +TlhaQHPHsvcjgURlpNbC8s3kMp4fiXqLFQGTw/FkhUwg0DVW4yyX3tvdLX5GfFQghfUQ6XVMCgB5 +HzowIVZuo/L0iM4hlIw5xlYv757u1HTHB/6QKRxpWEOe8WusYIs29G2nRlDEvEUEmPK68McgAplc +2tH2Pw4Z4t5IbVAiOsDOctpJ5OH2N3TEaEqHWv1ILtSTjIKr6x1S2mbEBp2QAGxXYOrIkEopwXuH +Tzck2r6j1JiE31BQOhoVPdptcq6sWzkkOg5r6V22EgzmZ/SA57IKva2VZcqZ+REo9IMJ3NMayWAm +taEzmuoqhc5sYzJwRy5yCl1ytNQTclMUjpCl35oJS4FW7CC92EvU9uddYcRhhn2dd2c0+Hjn4kr7 +xGdphhp4I93nYcjgPxn9MrrOytauUqywFN+AMjJwMZxVvVGmk23q0tPM2Ulk6r7bez7j01xNfR0/ +KSGsex0iVFgLa632+ZNQdityuHjPNLVsOHiAJmAlRsGN36shcJdCdOGmgC2cybx8cTdt61sV75xt +edUm0G684KNIAn0TBTKESnGNyPJuXmMc598vCfnL2dmyX3+LU8VTqd2TafDUI1XZ6skzXc4PUqUZ +cWlrtf1CFvgCHjAJuxRj0C0t7JNnSx1ZFts+m5IF4wTN6kc0+Kx6td9o8iXvS4HG7/yO3HyQHisz +J9hztUjFV+BhOD0cuwOm6xo0GUiuSsZHrZ8eBkJXaTCzAXgB7qgJ355HARu/zKB5kcoTzcj/R9sQ +n/+8g4EO0mox1x6hMy9yFvrqfZEuAJ5Y0bdy4dgqhZynPtmY6BcXclTr7vbvPee2zeht+gMl4GxX +lHLJkwm2nk20eHByHh8nPasx/GwxRRrFS6f5e7dMn1cpVUmMOcC75mgYMWyHZgLJxhj3lqkVxM6i +aL4XQOQPUdGSMIjqt8TVdBgBmryBH9O1/VLoTcaxrBWNtRN1GUtfiNH378gOMXVlCUxd/SjsbnhO +dEgiItYxsECiHxr6Zv1SlXd4YW3VjPNT9ZAaqAYqaXFjZrJTNhsqUYogXfN+bv+xr4rsGLUO6nMF +taKfPZnQpSMnNxvc31po24jh0DpFf8GVfeLG9RIMOFuVHQp0qgarJArO7yWcyJVB1YazCcHryexO +n5kOVXG1Wp5ZGL1J0kwh1Hy++rjSpZlCGNU9kkqxaUP/JUuEldrmPp51kIBGzW+0uNfIeG/kY/DE +rwt2ooQs+9cp7JgX8My2jYFLzw0iBIDEpU79rKGoMn7Kxn6HqNryRe+KfMQL3lCrj0AoWqsnz8Ia +AgXttwS626ZAQWOSU0n++I0gItGbLiRlGB6fcWxjCYSif7jM7Oy964d+ZBM+HZ5Wdry8RheKH1sU +M3TH1l7SOQc4dMPY5P+0QtremRVrNMoe1owzIfJ84AaWua6lRBlXZ0RynPXtDvhLDOhXxoD+qHPE +pZxEkU+kQC/ieDvBFbPVhkomPM3GAgSYIY/vAl0AHtAbnbxO3AH46FKAzZI9l9TvkaNLqqy8OkUe +M/ZgpPeWtsnAHEkqrPkEAevNfgr32eLjn13pkShkV6asSjaLHGLU6EQrhQedw3zDwjz0zsSrBIwc +AZrRnQJpmXLBo8/tY5UXWj9iSfFUhtEfDkjCUSXbeB63SZ5q8UFwSRh1d1+WrsbT2SxnCv4SpIso +MVi8wJmpFqR+ZsoNcy+ktLDdemKze9rxN1WZpVwL7CC6QIDvZOWpDINVUTT5SJTfXLPu0LKaiT3n +F+5I89DF8jtvSMRcCd/BIfTIXATbDTeOQNN1OF58cXwBFLgi6/Z4CcqdH3w0KJJnidZnDjWW4PwG +V/mJYuzFcnB25dqPCAsJYTk50Z3hQOIbWoEZsW5d+3QE1r34rBZkMJeuc9125Kfo1l8n1STDzjY2 +cmel/jpaqvQoQBqQh5tmsRYQaPl4OCWqDJgG4keWsXKkoX432p8mPRFju7pofXlJ7QMLUALNmV/S +os/ux2//sbH+tZqaGo6np0XKURuU50xMKC4I7inm0naFiCY/6KVM6GstQhulYdLxP6A4W6Y/6MNl +94ygDEs6sr0MHehsZoXOzYheCs2oVph4AtxPlTU563k38u5OJUchtg1QAVhgK5wjK3YEEnqLhUpT +LiDBJignlO7vgC4tGPgXiCb25r65FOIj8fEnnncszVkvW34Oqu/3UrQpJ735uoEHfynCo5/bPxVF +RsnkhtiR8QayEFm2sBRK/UzCs431FVDkohFOtA+tFL5G646UOLEriXdr04SKPqw7x7Vz+FFQKHya +ksyAcKIzr9x8z7TNJAqtaj4vip6YoTX3oRqDEMgp4tctGAfunQY9X4zZBYgtTa+VZzA1vaAUlTnD +7UNOpIXITbQnjvg4/avhZ1WnWN4eZe7iUjxxNWP0Uxie+1yqjvFeL50ckSrTnyfGQ2thCwADA8c5 +IhVTXwsUscARzpYCbkedOamaTYUgj7LmUzYEfMxnZQPjsE1eWKGUPLekC6v33enI/9OqumUZockD +ZgST7lX1+c/Brw7yumc1On1/F9BuPaO7VPu/DqT5xF9Z1cy+RLEfrBJymy5NM4Yp+Up7vCGKjyoA +fcfyebNimjr8azsfdsRhLq2ZfRK+fu+lyDbGfvicSOkzxuPPEqAv7HWwtKq1/ZUOOGc+NQE2xDwc +R71rvOXZM2sn6q6RHdVKzfrMMt18MQujVRQTM7i8a70bz6wsdGM4obK8b3jweXsHehFKmlkkCIJl +oJF1gJVIYg7U4Nx/o+mXMMJDJ32TQb0Ea20Pdb09yi5SQuEbTeC8JTEH67GG/auoRb0JThcjYEvX +wB0GgJfheqyUkb1bwqkBwz+X5ZCiRQQtzPqBFUt+YXgAHZzeBUVzYmo3ixWdn7TBJxQ04Wi1JIi2 +rjl0SgeKbx3CsKA/J/TynF/mV9V7rBWBQwKROxd+QdEutTcmkvj7w6G8r25kObzkhgC66zmdJ02P +IS2GPv9hQaZHWWOV7AP2iT5C1fdkJ1+RrGlOBHuoliZhcEQeCAEEulXxwy3JW6h3JMlyHoLgCaEN +Xd+Mpwsw6WhXc/dh8LaFMe0rkr0JEnVYPgyrDjvYLGLTY716sgkXhwKJSI/ll8D2C+gw+trfRrSr +I18jdbPlUrvHWfsJ7a70/RtvqNfkia+gOy7X3OiIBjmdUPqXckCXRcXSLBj1LBzmdXdksyP3/abO +gvsw5o3kLYPGlLKmuIoysf/S1tOmYc+YVSmrDrmOuXfBgXW+l5VmvxFgBA2j7yovnZcT9ohm+PIm +u723zCgZzBnI8b29FcAwFHvY/MCr7Nm9IBKPJ55gGY3MM2I5kIN41JFYtT23yMEB4IYpW7LK+m1L +EhH8sIaKnHHsbsVpnigWTbg1tR0q0Np63hpt5XrVq+ldOOGiyy/GOJ709/GysJvKYeLTJSWzfCkk +mpkcAY+/9ggYF3yjD9cbvqfPPjZpm/LO39Fhy3xnmICGubTO5mSmKZUcLCG+aq4+Lnt3ssDhV6JG +KiTWnpnNE4A7TG3MnRfjEP1dkrlFeU+ws6F8hAYA3j8uLmIoKLKdi48lqnJkKuhrKLEgYPISlCi7 +BdSna9OsjWHyuCpoWecN6lS33naEgYUDTLeFwqcQJndrBRw0fFVari1Ws29iARgJUpd1gQmtN3kl +h6ayq93nghyKSukFPxmIrhHrHB/CtxftqIrupfPzOK/ULstvekEq1BusZqoex1zKAWCrigWqhZuK +r6PWzPvohgX8sm1k1J/4rhlLYdgrCBEEAeUw8ROhYJNqXQbG8SJ0llUJR9XiMVp+FmbF06dxN/ms +8rWFQEzBr6ppjAcqPLRhs8V/p3xCWSMtc5VNzYMlG0TPA+mHVuDWSLcEbh1weKRnQT3DFMo1PST7 +hsf2f5isaJ7ztB5UZPnghmQZqCO/OpJ0h02MHyPp5I61Y6PDSE2G1TEHRparPe9G0ltmZYljNtyH +tBTzQHYREhPx/AG38ToVVsRoDqVzz/2jISorUim/VIlTT7BJpdHK6q+uJ9eONACv58dD2OgLbZXe +mDjFy/79DjjbbFuaYyF+X30lYGbt2US99Jk+jpAk3vcD//7lmKF0+igZZoDT2giUWBQ4kt8f2UJt +l0dh3K/5tco1AKpw9yHrheMR/brkn8MesNrhmLhAdW6fuUyOC0RjCKIrqnI4BX6++OWDZ5OtWqx8 +ekZJ7CMxEylyjSMK1kz4lRJPR0qoDWkPBxc/yih+jcj1Znh0DyiKVTUO4hJA5znm5CLGq9LQa8gM +lPPBldXfd0TIbZ28NApmx49nO5g7HlIi8F7WXCZsvo07F9umrExIPHj55JERAgwLgaEsjBKMUNrf +wd3HnHPCHxqGOBirWAa7E3pGd4WkHDvwmhcTTQQzf5Cf0FZkRMyBu7sOoTXPUo1n8q2CgQTTmX4U +2bhIVjhctAk6x3Jd6kabUNa6GDD8BUi9NKxq8rQj48OTbIQwli14CmdawZkUZlTXMFKY4ecue+4B +npmdVW9CdXGHUrO34ttdVSa0cTYKJyp0xWZf+2zwXIajXx3+/vnpFCoikzsSDe7t85VktJ9ockGL +03Kav8S1KD+K8qTKaiQ5ZRYNJH2zUYOdFX7eI1R7ZgEl4OI5S+TMnoCeylHmHQEzoa15bqfdfl+l +Jwao5gQTdLNhuJcHmezB6rKLNqplmrNKbXH3Ce5++MODac/XD4EBA7FGNGBEM7q7pKPLVq/9frJO +Q4FHLFKO9/Fhy76MKYLOAewyy9ezQ/7ydr7pa3jlOduz4V7EWD5JAdZYDdb3Ibc7hLLYX6bb+Ah8 +NDm84Fupu1Xb1IRK1fmUWGJD0cSKtV2GV84UOyff18rSmPtNufcYXMKaBsX80ruhborHU7ezRAnU +vTOqAN6HupX8tsLRNNvmXhk6BIOhzUZhNn5odUvk0w6YU4+cEOm+57iSVYI4ErbNsLjwkJbYSycJ +ho3TgAJGta9SbUm5lqDV+ZA6kshEJNSGZsp5rylEVnDnFAhQxLK7taDgtRuAqxLnjcGK3IUOzCfy +kbApQHN7a+EpEBJga/3Gp05VpZv4vQGyFlpqTrj8h5O3WTF3Rqd1H75WMDFry6CAGfenS/5yejrC +AKT+x0LK+cXLIlrMGfioYhGq9w+Ws5tLDPcw0VDCydjl9e07q2wk0LqW6s6zHLOD74Oqv4TSVXPC +NmZ26HGA/GxlA69iZ8DYq7olZS4TFEnfnuCn5xM9pOW4/7GbTg26wV3HN29c1g4zCJKu9KPAKBHm +b6iXfzP5OeXHO6xNPdMZ7QnxgnsReQMAZsgEhVvclVzDQB7ZjA7cpLqtFYdqr5NOWeH62g4ya4wr +ND8LBiVj8gtrKY2T2qbeBNI4+GlNawLimj4LYnEpp0hmmsctdZ34psbFTEuKKQWx3j/KRnzj+f42 +WoSH4ybQaXm/ipEhCb5a04yTFtXmEgCsIYrudZT6qx817sHZfxekqwq6BjbGSkb0XaK7Wz5+zv6K +rmZM/1+/HYVjbQonsFuXPFbAd5lOtBy24ztIaIvWIbYZSt8FkhcqtXhaHc+O92c9If9QOM3jvO8v +5+VGQaCQtq9QgVKpaOs05XyYjrfbHfO2GuAzWAoGufQfjrEOL3XDdUtFywKf8VVVaM5MwYU8B0wo +0BZ4RiBSULiZXU494MhiRCjv6a2XJoTPLr07DaWRGZPvI4KXjJrtZTFho9N28GIFE57uBn00A0pR +xpSoxHDepECXuxc0HVtSEQv0QoSeFzVuIboThCFDVkUJeJcwA72y2luItZ21Xi/wi1sZnJElscxI +XmqeJzpnsR4VQr+SGTx3pHpNGmCOzplaYFoNLY8x43yVIfMH14+tcI87wOhhqgyLlQx3ajjxQ1p2 +qCvSwpswsgo6KDOkMxg2djd0MlNUivwXGPRasYIeo7nSMwBKDg0OXQCpcKBiVfJot12xThNHY3MO +T30ybaz58wF0cuek+j4kunaQYxG2itLJQX2/7UKn6b33F+Uwtpv15tG9PvrO0gylwE1XN2MHa0JP +ZAe1TA/f42a3JUhBOtXhPyg5Me54bCVCg6BPOGCEyBFGIoahSndYUslV6LR2XmPdpPtgiKe1+TFp +LoGaM4Z411sDaSNnMVtJhgmuG39TRkeMf3AXVz+1C6QJIna7R+FeHezWFg02XQBVfNFAv/+ld8Vj +EBQIZXtqj8u4MAGgXAzBdcRkHmWXqbh7cXo0UgPXZy+M1XFEy/JRK47J8JcLrBwCTwZvNxkbTlBn +5e7D90bccUJAAnovS5GCdwYa2ZAtLoxmQ3WDH2XKzdYXUe8kLA8bzndJYsbI/YDv/6jX+27UWLDO +DevcCDtkjMmfwfiFdrI+B+bkm0ktqYmBXqCwsXf03BW3a9HZI6doNParty0tvjq/ioDXcenTee6w +F0Y+hAsd/Vi6pzuGd6nslV4uxBnTNo+0Mp6TobMO6IJhi8enOV1G6e3O2RBVAMBjRS1sgBY2GwsD +HQs94yuegPvZ5Uj6ALAbszH0jEAqZsE1FbeGStH6dyvnrL8WsjcM0Z1RysNPF5S4Jm9QmWw3Ajvu +lfyuAVpiL7qHN5y/g5ZYuuq6mJUVsEenKESdjRrHlVaBWZVOkgzgZXrZ4q32a+XfZKXHwJmLaGsE +K2hS5V6Hxcfr58kjNkCbq7RpTN0eyO8KeZaVrxBGws8ns0e4eSU+r+JQhL+PUXHwMG6Cqb990HPW +2fcwHARcXKicV3grEPtWBmspCRcpVzmq7z02H4TiTsrmAa+H8J1WjOAtOJtoBLkdTng6Ra4CxsTZ +aVHodXjcHTe4Q3Q+yjHDjDTkdJMaqGG9i8cpLzyDFLDR8/62eQTWZvOmAXo5npAw8onxeqqpBm7M +6lBNhPQjia8UO0FkeUe3vufwhmDk7+IjrDEWMNDxJLGRO1GHPxPlKR/g0QmHY/JkhQ6NXsUTPovi +6phDOlzy7mym0FAPsy0bbhJLGQNRfgHhGecXOi6ALB3h4EqxO+hZlWdV7DK/A7jv3tuwMmYkOliP +/Wi0YcJZkeMf+iTV75jy/Rm4Br2w+8WihbX3iyMH8nKoBE3xKydTSwyWj6m5/pDgk/WaOy/Kt2j9 +9PgBPy8N1rg8iU14c6iP2NaaoJHVSSDZl5MAkS5q9g495ButlQ3Jcifq9JSuulToiXDBuVatPRU2 +hLlJBl2h9NxkJWM5HWZhm6fQZuDgK3boZ5ZdTuRi0jESCFXiy31BoACVytWQkWH984IT6Tw6wl0x +LkrJ6xAWJO69DCBq8E66/f4jM9DV7/SRvvR6WmnOi19XAf0/r190n59G2VzMscbw1hlJ/jDAzIFL +VRErwrRm1ahac+ybcPsLh+jCyrb+tuJL4vBzjTxmx8erbPCx3GnHJgEhynaOqOAk/iDJZAHE2jYk +17ilAvfMS9IN/XF1kzH4dcntQdn1vy8WK01IjXOY/4I86B9LIiGLXvu4ioBQ9bYAziuAzCR9hib9 ++Sht6i3ocMqYNuEM7IWFpcC5xhx6RUEQvWDzUWGhFQZ+mDsgZW5OGgFQECD8ERKu5SWmxhQBJjJb +ugNDB9xUbKuLBzovoyKXU5KE2/556sPulw14WPrFp/Wj+uzah5sucgO2ZUKVLZVrNCdgYMS8Weec +J7B2uUU34QjxBKGnyPANnXXd0hiSmGUwPoj6igOygmCffL1OcG98iPQibPZFiZAhA99O+9ipN9JE +qbHspy1UJY2o/IcyRPNz9JUNdXa5vBzsnzpiNvaIlbYsCj7XBJ1sNWS3ZHcO/2yxJtNRZQMcLmdf +L2KdKftE/H7f2x1JJCobXBo7xkZx5QKF/xRs963/44IqleG5YW8So/AYVYq7NQsX0ousKHIzjH2A +Rypij3UhWDcGhd2isYzxjIEPYRyloMTDGgWfvLR0VFM+JikpwYyNDfxfvwRq9pGshw2Kise1vIr9 +N+YDmfI7wtGtZxJpRcHe6T6FmzhBayCZ4wxbWYZO3hXEEiHajofarPWXpxG1NlIcz3zOgtCxXujx +AlPVFhUn2JGZVOfrE4lm1RqxBCuXeZ6hY5O3GobgZs/K+Gl8lCsSabeiXa65p5Gt4ZUnMj8BikEk +js7CABuBbw8lVCUDE/itSIFnfz0IpXyJilAKCYSw+JN/lrN/UxXXbyyQ9npPPwv4sXRmvGkew9C0 +zylXFJgMbiQxfyR+NMTOC63r2hRmzv0WVA/KOZVlQJslsv4Lx7M9egZHpi8LPaO9oaCy3aEuiZeb +BQdPWLRT/UifmWMwHgdXxlHOC6r4UJMHzQ+PbPea3nZp9Pawy5dscPbYulj62lLf9dxayrrmTWrU +cqDAHumvIQp2qONkye+Ts/axysvoRmwdQt7Ma05tUDZ0Q9k8wIZ8UAg1KBt/7bfQoiwsNl/0RtdC +vdSAf2R1W9DssHdvy1NuSKNUHnhnsldAB4UWBUoVyU60b0yMddWLWbk592+y31OzJ/k5aeOkAr04 +BTDPXkXtiQEamLeLlRKrp17zsPRFRNlAppxDfD3vW0wQhJXEp+fBxPW3+0zzIOJffmzikzoL1CCk +CyRcskc51UrtS4vFf7c177DY4kd0j/lYBJlZy59DvHqsTUXWMJ4DVj7T8Rs8UcU19kLtMXX1/esx +q+RhcChKlN5sloowknmN/2hAkZbU1B3QyzMPBPtaiyw+sehQ0i+TaxjOcpEtg0CIeBS9sLIl2T7c +goQBHY6nVG921KIkdmwD7TY2JDx6loovfpp3gwF7JE86b0stylkgrFrAU+WPldj+TNOs5lVuv0sz +5HiAs6aiDjlwlRf2vNn1DzbOpEZMq2UgTLqZCVhhGi0lzI+y5CiO7KgoiUXWSil0OH7jzQJfZk3w +jUbUueLkuHBThseGji6E92QMz/hESHcxODCs7gjgA22a29kU5liik2r48vOhpELSpkLOBdx0sv/j +l3c1k8I0WqidLVPEqDVOV9LebNVwjd1ABDZWjc2KnJMEQt7N+p6nHpT8yeEC+u63pDhntzSEg22A +S9V/PhvGC96iBlLopRX9g8UQEzS6m20zHR3lYYCzMPEpCQmh0QOAlPSxSkyTRTDmIxiP61iMMCFK +ighiyYrzCuhnd9iVFNfJbSRx4NAKfq+HkbuNolToh5TZBhReQfBZJRmpCiVPIr5+Rj8c5eXn0OvK +REALI/6LGqhlMCYzImJ61Rz8JuEFkZqTYL5ekQ7A6Ak9ezOG/skhm4Lm+G9GNzrUgQqm0ycnUs2d +qDkkQlbRCVQjD31L43jE91gOUR08ZcWUY4MT8Uy4hxWiULpZ4uBsziNUDIQD7ND+TuX0JE5IGlpy +xJWZ6PBFoGhjq8CwLE+8admlJMQ8k47q4CmL+rwLeiC/LHD0ayANUnmd8knZfNxnJ2eD3ny1qF3R +GZorAGq8C22Y4V3PMYxZ+X9qMW7b9I7hWpzz4te6vN5YPYmbCcxZJOVPCFXT5nV+DqBQdcBZexeg +nVjeWrZQm2C25d/5ozNhVvrYFBOYuUGVf/UpbXx7flQx5t9k9NRb7OR1LBKTS2flohT/T2eDArVY +T0I7ihYdV76L/6zTQGUyQKWwl4pYNJtL4AHx9Owpjj/Pi9k6nM6q1XgK3bIfxUVMnbbqJX0bkiqh +8VhQzFJcsek9kMLyqxmnf5Ad2m02OCs1rIsA1DP12y3UcexzXPySpmBFqTeNdZEV7+AZ82haXVQN +Fz6bCi/GG6jQ7LrOFf8NYLVMhvY3jT9pkIciJdp+mlS9r9689D4Q+KHtoTwWwkyGAgpGDZRwaJWf +f0KGl03SugDWplMKTrsA7v3nCtxw2ypPnHdNoi+wcKCXrbTD9Jzm7Ho5OkNT02JWDuBoOu8EWrF1 +lw4hqR06AiGUwpHWWk2HGkHQcQ0iYGa9WkOa8n/Dq6Uds5b/l9m1jXYXcH0MU7hkZhhLSkjkAF9t +gmATuotfADybH6vlbwa9CWOcKhs/S0yx1tkLmx8n3CXEDb/qybYf68XVo3FKesLgNgsn9y6jTzL3 +3tlox7i3HkSOuVvjJbBFTP+KOmHURFJGBwFJDokVHYo8H/mkv6ub7PuCVEw43hjP15NU7Ux0rlHV +v6NPkPypK7lfEcS9MfmMeteCJrTH4KbMX4mLvZ5Hkpq1BOQeB2IUkPXdlYkmyUtPf6ro9XTUs3Ud +LIDtq5QP0lXN/IQ4YI2vTdZxT1bO8IL3gqIMdNSjpD+iVyc6K3zkp0B8kritmIIgW8jJ+SJFpdFR +B6HrPFk9V/wjUASP1s6Lc/QVO70E0+gDrWvwdUdr/VTgUb2ee/Y1G6EUGLkLk+kcBSSitiO4PUUt +UqXGCuR4WJ6tozhpuERhLpEbaP/quKKNVtBJBviiqMrkfhhEgJEbRmJ7nxO+HfJ/DnD4sox65jUj +e3ncxeisMFj9yPWgg/aALEb7VQLobYvPd970LptH8wA4QcJpjyapJuXgdxXD1mBDwowT2waH+EyI +h7GHGQibGKdbbonspYtIuAePhLlYSQJDZS0vI8ngoHlotSrho9jSRE5Ggkv4SNAiMKskEne52fbu +APvMP/UD0BFQoZISbx1eVkAGr6EAlZLxAHxVZAx3wlHTjJVyBnRfJJpwoepkcz4Qr9k6gT2Q3Wnq +yhXkpZLJT2DRpgzBTLwk7hw2SZHXkj8DFjWzv1qUupOZvSTs3kSurSLFEDFdtJRUgTVoXv7Gnubd +LgZoQKPbiLzLZIVFtl7/OGlt3zDyPxMrdWDvgZZfcFYbr3x72tLXe+6tFtOWKB2JCJTouXm24woc +PIbTFKVoD2i8YI43q7I0IS62eEHirOFVGZqvq51fgezoYENpsZOre/NlKt5nK7MTDoJ+DvXnXisL +jFfaweHBanzMKsmLrsuWkE+wGyYd0n4Xm8cdLlI56LxDPkNEi1zP8nxjIM9Hns2rj0FT16AC3i2T +Ub065/NQ7AK4I3BjKu+vZ8LovslAcvlKjtvUtZumNvUnyenFL6AESKj/B43LHCKy4nfLTSIGBKZd +fz+Zggl0f/svpBSkcIOpMelx4YZHcMaPqri0oSBKpTtsYHcb7UtEVQsozqpGWsto4on9Zpaj0iaW +PdYmM5SlM0byJIx4bakDqe+dbQctze77jcq4Ps4C4+lCp0b5UCbb/Vf+u5F97VJO+VoQaYNTCv0r +QqWXRN5OPy3+fJQewB//FTQGs/oWQVrpQwvJUe5QDSZRzZ+fTk/WPHT9L1gX9jXPbQ5O9GakUyUL +UHe+5/slg5j1tP2ag055R2XkJwG9NSzORIyI/c4LqwgtkPrinNHvJqL3Ar3h4/3wr4u+UBHe0g4D +rArizoKfeYDqfKQD3tRY9DnyVxsQj5O6LPLhVZAqurJtzb5d2lRBQIFunOODjm9U0t+QQTfL7kER +bgJnKA8lA0GH3PAEOT3WcVbVf4LgCUoOWgF+7OXA3x1YBwJdPJrhc5gGynee7X89/ReYalVKiOd3 +LcqJDgnJOOqqYrQ6UQXoTObnaD3Z2tdlgl4JyzEwUiNfxo/0FIQ9WpD8ymq+gyb+wlsOAkN0ysei +4fLEZEi/Sc3q1rsIJnTo9WMf+KB7H2a6S9mVf8wgWj3D1yRsLSt/4unVoNL4AQKhgO5Huv0jV6/X +CPUD1V0ccaqn7d/wMYE0HwNQ9n0MjxuqLYXT/6pdjv9pyI807H+N2sZMhIvJtH9GEG/6q3J4ZI7z +/MU3gTG0Rp6WPwQwejQfpJ3aIUXfKgc/v72IFFBL4BbXjO1I6tj6EMCBU33urJ0CynrKyXN9yyUX +m7NVqqPS/sKT999PLadD+joVVSpk1cVFzIvppvnJe+p+DZ6hoFyqRPcjZUNQ3WvVKlAnfEW3bVdv +EcznEbKQaSSKjz8zLFD4buelS8RMLBIG5KoBulsV0j7AQE07j+wSC7RTCBWFAlcOk/691/huQH91 +6dXoc5y1oYhNqK3gqvtdFbEBx+4eRqma6G0M2J0pzdFnxjfkQfrnxCHmqHzcvy8PNFVYdPHUVksu +RqBkF48WtKOssay/VLbPVZZOyDi6HwqenLiirHRPYwuUk3/WlNBfCAgNHk9cMFBOK9TyUAXCx8tl +oJvd57F+Vb99svHRYhFHcFWE63k8sMK/jAQAEtyonfYHXAaDa3h7JEiGY+cAzHNtlLavPCrGbp8B +iwi0sOsSTZaxL8HJs8FjJd5mi/geYNGX1aDJ2vYHvso1IFXi7PxdsCkOv0AKYt3pKQUnFmgzUl/s +geOlaEYCx+NV5VDtb8gtBC5QuAPhJftpLCLB28tAkAvScAgc4YTYYYVSK6IoRRoVHjnr2bJwrcqw +eIOulN7TxIvkXHkb3k6Mgw5c4lemO395+W5NAhaQaOHWMekbvKmekEHIgM+Xw3qgQIQO3c8hUfPE +0yk+0n32cLkPo9dUEvp2it3ngwdBjH4I1lpjLB2jKctfJjnrVdU5YlhbfESeERVbi22sx1E87Qg0 +rnMCIL/eB3rHmdOi82tFExAnBt7KOD3VloZSI+gOAbxHj9ZL3XPa8pwQHqBIRMkiTt1XH9zj97ff +zJA18bdoAOXl4p26tVwHMDzXqsQNFXVUM/cBhPSh1l2zYoOfuJL2QUEtRZELXNnAVyEscTKUgNkG +XsdeN4To5tA9Lo0KtSa93C9vSY7BNRpBJWQY0lDJqIOm/2VhfaiI7DqT8uD7T8CQ0d92GXBKgxf7 +XjAw6SnKDuyYihLyJk4dWqRveZGUgMnJ5Sl5LKlCDAJ0u+pN7Z5AVWUv7GqKUVwQ9VxGQuWrUQ48 +NYsYrscQEtbEOJbpatEwHt+U++pmGlnBRxnKbbN5eDIprl860LVnj+0TY5+CJpj8O+xquVBHvlG+ +731suz+S/jksHA47UtLIx3UvuptCdzjaEMGbPvUyIUhXgShdXtBFKV1yknyx6UfoT2Dpw0D0jqYe +cOHqGSbOufgnDVjxJwqnWSpA7P0xuPYi7QHM4RwSPuQo+/ZksjopElm1raRQUtUvIvKt5YtxKZLO +mvqIR9uDMCOiRtCmgrPyHOqNTY5/+frormyTnN0EGfLA21DGtNVbhx4j3RilwIKcYtBFujevLHnz +wXhYAeJOo8EIbLek/ibkOMo7InfcSiI87X+gAQgEOzauUHaGdWKMBg7qtl/1qgOIUBI31JU7tkiw +LDHM/g1WY2E4R+1gz+2GYJthgcEsVuOb6Y1F+bRFS/Zi9kfLoeou/U94h6SLAAeXbgnemhblZBtj +4qaTPsAFwhbqnSJSE8sjuTRZHrn5f1txO154RTYRZNG3S/doO9RO3n8QxmoFfil3DmoL4l6HTPkJ +7kodRXj62xIfnoi5XyGmwXmZya1bSTQsggkJyjoYAbDbB9AoSSKiW4WRYDcy6nVWhysALN1icqdf +JzAlboawF9mj7Lglc811hDyBNG+E8iltrZxkI3dueg6UjrPYDa2npBsCflbOShG5wqrk7fGGRmJu +CKezTwUbSD36eivW99cqx6ZSuaBMEFoeCsieeg8DkwQbXugBmqLKgAox/oUGktUCklPM7KyHVUxB +Kh2WUGa13d1yPDOwUUsBfVBoZsd3oL3kWfOlVaFb4lNeddJycMzW4qGjNUgSrhRIXA7gvRM30UmJ +eKn76PaAGt1OCH08nEwzzLGCu0xj3Cpq/P0ZB6PsppQ3khlcRNX88bSZQNzFvDG7V1YjGdbyWisc +uQHJ9OquI3qIDGIWXZnn8jSHhdgc39VOVO34aWSnBPPlAfY8wJGEDAtbzsOpyIWGoij1cxkB5V7n +WOGqjAsbTk7UqFS5oBSYNCkAPvnfvYgONm/cxN5k06VTc0zRiXCJrByKrEG7DINFtxrEbA2+5xkX +UJNlFhoRuNyj+yRh4WRyD3e9caGVbZTp2jREg2djzWtOmjE2dLF7TjVT35/VbO1JsFxYodsdRb6+ +asZDAhQ1u5XiPlTPuyG9Why3QbnT8ptaSr0op9c2XLGYWuS+FcidJtqhEU5pI3bNZs1umGj+tytO +ciy0IfYizGb17RYR9GPpRtWrlUHSTSIl9/my5ZcwwvBzRQeDo/5Av59eIVEaOL+WVtHNDQ5keCPn +RspbcjKAPfyE/tGpxhbQS7CQM3gQKS/MHysRVhf9QXxDblrkK+B6ke5ucZNyeSG+0U7yJJgHXoOg +smz71E3g3+bfJoZLIAcDAakKr9DTbI5LWofMsSy/ULnBrlreDerMPyvWH54zu6LT1fXAmTT5Ftvu +LBZrCsdP7HqnixcDhPDNvH/FC/vH22t2jeSkrUuzVXDqqEJgVRV0JaDD9uI0wKtna+XIwbvKzb49 +1uxSqwYcYr6+SDmC0aTGv4mBog5KWOB4cGik5Qosdn0DgvbKyH2wSPCsiM3jwFgGAsQ4TVWCvbZd +C6Q2OsvOiQL4yrA9ryQkYdhf2zeFnAxS7bFHt1srG7FHLaBjuim98NvY4Shdkjc//bpZj2SondDR +ooasXDqIWv2QOy9L5qZduoUpjm4dDAYI4Zw1g18E3ohizC+4T8XNQJiQ+yjO2vJ/U1dUYejTZTT7 +XZEML7nbH8mZ2TmAH1FV1y9wefzTM+dGThgjUdSAX2JxCh9fNH33RD0br7DJmg/aqi0HHRsBGtfQ +opmCr5ZPyPQNYcl8RA9DDZkr8zjFEcsHwT3Z1gkd2dW+k5wMDGkojTL3t0WrI/+cswxIQTarxVVc +LXPhluCzjQIQHlcQCXeVXBH4h+vcOrDRLq2jUwj8G+RgOVm0VFaM/Wb7ugJFZyjgxd41lK1NgoLq +o6Nz11fjYSDMy/9t0fvC72pNFWyZQ/oK7bbJePwLIpwcFns+cLswfh6G5ba6/L/TYegwbSJiQxqK +yMyKAARi2GyIns7z3YXcgJdWsQPLwaXkfZ7lmq5k7sTUA+ddBrcMfvJvm3X6sd6MyJ0bp+E6GDeS +EoZ9LZ9ff7DS6Cv6dVfi1MC8I20UIGuy5iUf8C3riPOQFfWsnjqcuH+AYVkfP1r68k2yaY3vtcfo +x17AveuJI1qe3OmbqV6YA5g2xKRDC0jblF/aoyzu8nZlhe8UsiSO7AbtMHfKTYqWMoEL+hsH+NGm +QOZwVfZV4p+iO/R1N77r9hMaRQUVnPTqX0hzzrZIrX7a9YPUJSfHhwaAldcCQSD2LWAqSv2hzuck +qigagrx+SqjY8oP2fRSrKNHrgpVGLknEGN5rpCIOYYuRGCYPMKbUd9jPz1Gkm1zd4rUJyt11GZ+S +3NirtgmhVRVlHf9MUTc4XTPVa72/R0hz5Xdq3zZzbrAACRexpaGZVRVDbtwa4BCqOg6uZg5cRZ96 +Vtfl6AbfcuqsGv2zBauqk4190D3MJVHV5/ZDEVJ+DwEtPXzEfpDZn2eVGoKGch+W+wxHqFQ83Sku +rlnSWMisoX9oFN1M/lAnV3sm3qqzCihBA1XoFCg8RrMfpOQ/4dbKPrktz1piTeS6DbkshJDyLPKP +gTyFbRMrdxipw1IfF5Ng6ncA77lRUtQM8MIuevA9dpLEJ0ihT5oynj+gql2GRzi52BTI8tCRVWKh +4Keat6eB9m/f4zr3UpCxiv135kQ7CnoSvUrTDoAJQp15ATwC8UutI5oQWyX3OyTWp/8ziOVysS+B +7kLlxwB9O3fZurgnBxq8RwjQLRYjwK7nHtIL5ON+Dy7m9+9wqQRAX+6ONV2mMUuvWdYUgKwoCxjL +bYz66+n0KBjr0+I6nOcwJBFPg1X96051rArHfb5knWQ/cHkREOTxQJl4/SOeO8YYNdA67xCi7+Th ++yimPIkQ6xPIhLlSuEwwQe7yGg97+vdqWSeOOmNwENsESOBn/zLE0dvFbt3Yhqdk2Q/z4zujN2sh +rsKY2UFvAKpJCLk+No3pdKEnuVpEd8xaYPAebm1jaBFpAaz4K9bTWLbEwKBwif1NXwSkqyIUhQD4 +og43plmU/8mylBKFQ5DDXx7FW3nawytWLxC5juoZpaZqGg3kMHU8s0eCKlSrNWyLgDzc/GWm4Lv1 +JG0qcymfWGjk7Px821iPDBeTUL72fJ0ys3JeaJU4i/yUn9RmTphPTJBXfZOEW5+U/+lDTJx6/Q1Y +slMyoO+tkLd3JVIKU9C244PYWeF4+pgerr+Ke59Ft5sbZV/uHjRZivGfuYhlDuahvFOv4P6Iwr0E +f8FUyGHf0TAxR6ACGeSG958EgRhHnAJIleVMVGlJq/w31il6/GQ8jZjhpciZf8VRPCIgqh+Ef8N5 +0DLXjjp2kySh/+Ug99SjAG9I0SZ3Dk0E0vrW9K44uNEhm/754PEwYS7c+QECF7TvyIVwa6kOSDDL +efPSmMYLsPQTZ/fcexewTFYQRjvLsc4B8eYVJYwUV6CYxPU/lm43SupL+o+7FDkrNKj8K13kqlC/ +9eu9wijY/1824FMvACzgYZ2jxN275MQYsN8rVb3hUZoqvM0DkFg92EWL7ugP54VFEqa3cm5Mk++A +5TfE9NFuRFGd3ypLEfCn/HsOmif6DyoKRPvLLNZP6Ub4Twad0sFdYUmMwY6WB0DUp7R2A/qw56uz +VC4tJUnzOlZLsDfsvaOsk85DglmydNhZzLY5S96bRfeB94B7F6orFYVk7xFUrXxLSSHOgttDeu1w +tl/lbUCHxgjzFfo9FDJ88lNZO9LI62bXUIGxp9JoFFR13E/WCj86GMRQbssq4o1vxnTHVYR9tq5F +ip/Whgn9lopE4rSiPtXTBBSNbm2bhf3eDARb8vvPVJlErVXH3qFqT6oc2/jDbzJ0tZPVoCQTMqn+ +FSJpuTUUKCIe2DPoFUP+xHGwtTW3nTkFIdytne2LzyVPXDsM5A1NaG+be6tuwm+9+aaXSqukh1uM +nmFCkLH+H5f3SVFgugbG2a9VrvhptkaD+/u42/aR0mA8pDYKHneIg/8VqzePvrftkfVzzgzrYh+q +DD+/VxJtLYiFwtuHg8YGR3x8j59h61oynOJUt8A/KJHAgHYF/Sei09wIQwfaJ9J8ZjMj3cnh0ZUx +eRJremUF+Aqd93QyTaMJJ7w5O64b+yFAvK3DOoAVnO2cGxfp6yA60thm4cMah8Xv7+sJgNNcur1k +PkcncIsLcK5r1GpCE//p0mfrAUSncdGP6E3f7lIbiiyiBxbBzV3DcDkWDN18oOLtP912DJ/bb7yV +DbAyn2r2v1Ug7ypIOld7gnQNYeq7H7Srm9ZIqRTdvh12yqTfsLfVS7b/yh7iVQvtkymhEC0yzo5N +o8Ky0nHxFsbBGsprOLh+LRf5BvK70YBhnKlU6D02Sfhw01UqZyzdr4a+Kz+nwv3Um11uKOXD1NT9 +k3k7IiNJ/O2YX4v1zaIBVJ/9YKkRNWVJs4zHih919juMu4SWlTqGVcnNzOfCbxPJUnL7Rjk44kAL +CK5O+ohM5oqInQX/rWKqyXBmdYZ8samx4yYR5Z9d8RwOj4R6VDxEPaCIS3DzXDdqZZ6T3nAi/3Gk +Cq3uK52ilFVHtGQ5JEOGGYrf5Chtj/ps+00f2knWD2ZaicKI93OuuQJeCnBadBfU27l0X1bax08/ +/Q4phJQBTzw2bpvYv8xQNQ+R9EI+B2GDVqcvT2sTJerbcMkXoEZdWpgtpYGNoXvsDeVK1guWxd22 +yWhBUHCHQg5HMAsgOA6TnYsVwlt4d8150TAYEiCmXhBm2XLVWb3khiAtacDjafyjWStOM/t7KTC4 +4tUxpYGFIUtaD4Je6uSshs+nUxtXyFGVnSomSngG9Gix2fThcy7GNvR1wPZM/94N3CbY/174aGBw +JgfHtxOtJMRlMdgcszCgozXy6Xvbb3sNMcQyGvjczSilhvgx/nIW/Yo6AJ10JYsQoMbUYZ0jNz4a +joOg0F88qobAsJK3aJ6GuVG8+29d8R9eDU2U7ut+ZVwbKi3Oi8uPISiNPaOSsXNvd6sZS2u2fO53 +qr9OppX6R++obbytUmXRxgO57KcB/IaVIDN6e31tPiqjVmr5GN/i+ujVjxO/ykkonRR6/Btdf4to +GCkTYxA8a6LiOLpMq2SN1LrxZufzaiFrBk1m0iu/xIBrsw8r6EUmxXYPE10cGGA1TQHYb/huagdi +cP29uoEQKOC3Kx03wToq+bExnLsk0PFDzbAhh4qS9pUVuPgdU2ktzABJdkPUWjrv9Bwcb8IYrGvJ +IYYO5U8d2wkHqdGg5GGXtudvRdXwjFGSCcIDIU0t1QjBQ1tLkwVZ+KffXf7rfpL0Dz8PKpoXuLz2 +nVyLizNJ0bmETMOlsGVNvgnC76i+U99zzu4np6Xi8YzUbiJK0CK+ZE9KWslk3zaw/Nt2SE+BPKri +uL1zfHbsw2P3rRIcm85mtFXe2BMktha35ODh4XVlcNSt8KHrsIQouZ4sfHgrYDuyzqeFNZ6odCW+ +zR+lce/kWDdJYdyxWb693LzCwFDcIuAHYEhOhC0M8jo03S0/fcE09Gjx/XMHIw7XeX47NGjyiiaJ +QAaxSpJkDGLoUGDrtOYBwGx9gwmtaaTcL4QiuhYZmWhG1llEuQYASumrKkl/o5KkhYC1tVZaBfuJ +Iii81+TKymPnA3UqtJtTknVHebvLB9wRlzv2/0yK3fpzqZtkBNyZ39WCMBOyQ8IMnTXluED5n26s +YNrkh8jd1LEiaqSU11ZJRNQspxkJRUPDplyikEYdYAq1J7osvYDuoSoz6YKUXscodgiAqvQzqvXN +ORTn6s3gS7b3Ekhny5dp9iQPmHlgDfYH11hd2vY2WZeXVLJ11QGregEAvzqA3O7Emy0EegDgavWu +JwQ/QRT4NnJikA+1Yge7qPUBtubmAYuahqFjKqHF+U62cUopUJ5WC68Gnqww3Jb2zPkbWj5AuYnA +U8f+xkMmB/Ylaynk14IYC6FDhggzEnGpXV2rW1jfSB48TIF/BH13rorA624nYA1ZvvnW1YjF5f59 +v1cXPoUPb2qWyVGH9y5nQ4RzOK83x6xnMUq4HIGxjRPM+VYct8SznpAy2M2THksBhc5TUyd6iw+A +rzRSoQz0t0+jisRyz8D5wrWlObmt+06NZqjo94PXbhwkmaa77Q3e/95RfoxGmR1IWOAzjL1l8ORw +NegN76ynshi3KMOpY7uNVCM8PRKdjIXW5r9jofQJrUucS0/IGrc7yq8LxLwT5uqDIcrJmyd9aV5B +28qFevm9BwRisl+d7+FPeKmY0wbRluAugb7c7fLHbT1q049qzYgB2go/r6tHFN+JDWNoW1kWYbm0 +Agdi5nhU4JHlgsfAsWaYjkyjnjPvZC3ICR07XoxjEoWmTXjlP15FZfZC6/sfFlVAFBjAy2QDufYU +6H7pV8s5obCRquPLMXCc210yb1ikO3DHQJ0lBiVTvynme+lr9aZLLSdZXcGe+zX3NuhbUxsatPSN +lqw6R1HTQLxrfvK5zYTDLkA2Yn6KHwYmO+S3ipMhT6HMdDPtnGubkCZzpeIN+fyxWSJ6D+Ij1YH8 +rrj9qCHL8DRAb5G3jORG5ESmAAoQ5wScli88ZOAQ5LPHmKZj0vpNXSLQRzHr3qfLHOrmXBxGsw8e +sqd99elZCMLEYDomAfIH+lK0LgldE5pHOeO33ctQzivvH4K+YtuREWvsQoKZu1q1Na24/D0MBmj6 +zGO9dl+q0FdMtuJiJPHOIfMJwS2QYblK4wRhB+ULNjwxKYk8TlVaHsduSe/BNKSBs21Vb6mWhywn +NM6HzYE2o5rdv5JMOcsBy01sYQVpwm8Xc4jSOdbL7iFMUsidtkyheaNOYsk9Daa4kRZvRWC9UMoN +Vp44UD+scKhCURIjq6x5Seh6kJfEYlrOFYNC1m935KGRVy2H36vjqQelFORRWAuHbMdSU22bK+M3 +H2jhRmnGg9FyQJHxC5rJ/nhXc8aa/7JdlO/Sg7smxq3w8ff9YxwxZLd27HNmB+orRlCxyrnbltob +81ORQDlmotXnU+TIR0rT/iaKfE045NRWdJmZPafFJLN3xlPzMeJEthSQ9dtt/5cBFEhLjqTSktnu +HijUoC/AerOQhjSH884BQPtxSVcDb/do2zhc9VX+VqDuWvMoq3b1AKarU4eA3e5G1d7mFVrHncsq +W7e4tNGuYv8py6GqDcHcQqtcPxih7eUJCXZfE0xnam6ZKWsYYjhI4b95OH+IzlqVqfHS62l+EJAt +5eixggbhW6+eVb0UUxyZ4KX6EpLRhfOKQscTCYL23TsafLxQtAVXlAvWNdyzrFP3XrsPUEVoE8XT +L3j7NcCwd+DJV3ObkkK9hzULq/tBVo6RxNYlLkeJmAdLNtWHU2sQ/SXsLwOajzOaps2gRLVM4qgi +EypFKnnsB14pLcDdLR2x+nUGGBx6UbsUj2pFIotHDXtNgVlLQnXDXonzN8051gP3gWMKQqs6y96J +tPCA3otPkQvKcEg9fWqgp6AOtZ5azDd9MkPq9lvH1yUkVOHeixA9R5tr0XioCFID0at6FP8CA5op +IKHzXSZ4fiaRPGtBhGnge+6usxH1JDE0FWWbPPHmvuo1fxg4GB1bIHu8y9HsU9NFC0bClmr0XBLS +Y6rVvYjYuQor13vRW1LLFjUASvI40lx3nPqYoQYCw92sTTaV8qZNgmDBBwUhstCmxeND+DkG7C3l +W5WhxQTHQwhQSfvMdY0+lxwUQbWiWrVKBKfUJXVIrpRQo7kPoAHbu21xODmdwM0cl1fTSXMX+8y/ +zw67o8DKmPPeHz3Ghd9dgYaGnlzNamLSCsujMp6My+NTfxslG4/A/MnVlXa4QhlcDl3xCuM805rW +yx+zQUOmbkYYyLSpHrZEWnZaQKFqG3mPufrbWBSLmKTqBmbCCLORgGfy60D1ZnEswZMCl97ki+mJ +a/pfjBx6wF/uZL3yGLoTbGhTAu/rxwP4WvwPY7YgD3ioYgjI3mUqNEHsPbu2tK8Ti/TR3VcPS/91 +uT2JqRraFKo+ImGvbVg66qU76vXS0F8W7xz84KVBt+5xnQRoBJgz0605HIw2hjQioiZlLOfdmnAU +L3jP1rzPY5rJbULc9NjVWqord1O7++AYPWZUCYvDcKRE9Xwwu8aARqxUOnP3ptCC63tmi55mFHlA +Dd6L99W14SNfzBUC2/Wn15m2akqOjrwWD9DhwdUUSQpIS8xV3runhPDangU8A/dM7iSYkIYFKjRl +aFlODbXtTsz9eWopXq38nwvDkliEo1u5V4fyFk4XUG7srUArWKpHRhj/uJw5zq17OoVT0Hju2yqf +r+2OSWzK3jrfysg1Nd53PRUDZqPC3iWsxMFOg3ZrnAEucq0WaCIRGIoovczcfd/nU2Dz3C3MaMIe +/oIxMiX+rXG+cBzpydPHoc7M6T+4xknV06jgiC9uruiHj+hD1ZV9J43HmxO1hREpV+U7Ej1DqCN8 +OU7pIhwX/vu8YzpWQ751lkh8QRn1q9KD+JTHe0gTfUhx/c4s3RbQH0vgFdKpNFMrZ+ONPbOhlx6F +rnORAtHjv560ps0sL0/ZhdOyKbHgXj6kRyurrdSZ4LPZ/5v9GCteAeyB2R22av6r0Tf6qbHJdUtb +M4oxAyIBe9XEoMYUn37O6rc/bRqat344otUQvPbiHtoiKDrWwjivajvOxrqykMHEaz/TW6PXd9Vr +tecVu0uoLqlaZLFsJ21Hs9eXWeDn2v7uycTpKOpdMBx+d3ym/PHWtfFBuRJ2F5hVEDY5o6QsEJRy +Bsom+IkiboNFul1wGIZM918vKy541Ndrb79AvqxRqRDJooUiM/JXNp65XtXnkSD7apf28K6jFHr4 +4EpnvUhXC/SQAuFSJA7wYTsDnIq176E3nZqmLgEHdHl47ivMz23OaZpxd94cX/DlMU/YFG7TzMQC +TvkikK8AEO9A+v61dNzwmGfnPZwZvj2cyK+R5a2y2WzVNhdsqurqmROUWPVkjTGL/Qn1W/E51Mak +ZZ2FD3pQRTNKlvksG6xzA2dFugdBS7T2BxRgGDrAOTpP2O9pEv+/iEaS5rtISBamD2p/JS4kGcX1 +tK0ngjAbuJ1Jqf/IKq5XCO2U68MoPZ8z9T5HpLjcXnFQvAMUSmZwd1rdl7xH+sM11mbiUz/pemlq +mYBNjKYtQBnqz382Y4bKzk5iSRUVijGx+KPzqCZQPrrYfYfO0kembjQR7xsd5kf55QCzDi7oe3yN +zRyRhC4ET4oKFHmSBBXYTGuvURJwf8xX1i+3IW4grr7e3gkSlFbV7ib0EpC/ckr8FXyvh+i7pCLh +B40j6xl601+yGRgxh1WYAgfJ8+b3IMCBwIDO2i2EeaFsnw9x3oGfQKzEJycl24E7l/TKntrTIgFl +0MfnAo+K7opQFW330rpvmIYxoC8UPOd/Y3U61viKqWtc+jyPMvpJ4/2tBBJse4EOgLkr1naDqB2c +YvUo5LwfpbZR2pdbSggFDRYuXLBeXUA1k7frCIUsBBSB6n7+bgy93izJtXUwA1VliVRKVIbmjVmb +RpBxPPwkJ7M2AVFIxCUhT67PK3Q5ta8RNgfdpS4Q1iuMJzZfAx/E4tzDSAgO1QLUKAFaH+UYgiaF +5COO8cEWJzpfM/0huLJ5SuVln7L+bQSIhyAmXYogADofslqEiQGqtXlBH/XQG80MSJwYHBTpOkDW +YrTM++efVg2nx3vAjNckifrm5NhNjB92NW760myRAgkSYF5L8UCEgo5H3uM+GPptDZwrmaE3im4T +kwNXiOUUfwOBK/VvKhFQNCvYZns/wdx3q3KCNPYTd+5/9RHANLBJ9+O7+wvh8ddhKUnjjPT5ynk9 +lFh5HaxhsAvPj8kN1Jp+alewWYOvvY8wmkFZftO67Ha7OpXMalCH55b3zOu1UQMZXWBJ5YZdtTPc +3hF1USF9axFXAGcbY+iRwYONuuw6mIVVRK8P9SWvAnXNnLqFHw8+qPtGDnDEJSaiQYw5n221QK3k +YzLhNjPQPQfFuWgOMOgRGzlGj6xdq81LYbwZNWYd9m6XOqBUpd4S1LIeOvGDeMzPpYm+yYH7FGx5 +WAKOvRi0O+oOrEc/6oNcsWnUzNIoEIF57xCej15mLTERfVFG/NvVADdDL6J7RA79lvCBPRdADEp9 +TGIeovKGsgJQSahQwaXasb2VosrRhWGwkcGHbns0EggImIrL9OfLQJ2AGA406JuwIi+dTTYrxGPo +sXlgFuP/XvSY9EOejSvZwSM0u84kTFfySBmfGhCkd1+8K0uR42mcpYUOsR0YXvhBiis5bsV/SAqO +0wiWztqjfdEQteiWyTre6sg/ME68e0rG1qt+9fwk7RKJYBf9SQICF3TnHzq2sgF2Fvq+fc8Nyv2S +ZyO4vfiq0hlQeUPFeA+os3btNK8+9owskrtdxorwoXZbVwVfufNFxTUgwLfe3pOd4GI1QQWtufHu +FfGf9WAS6MOLZVqA5eO1bgdQNaQyRQCU8kzYS3kRPeYyO6ZShU0YpM1ptAv4TLrZsUx3UoUEZBLd +aAB7W1iLefHSNzHioaFm3wrarDWLDG0rDZnzK9DWlN3GoURpqd4N5NXnilV/W9Q+LWC6YlQBOOaD +I67pVPNSgd2Kc6g0FA+axZ5SndE2yzTEvYqJfT7i/vk4yZT7D+YwUE9As3G3OLp8HZm1sh8rmFkB +mrySt3o+SD4wudljn9p5dGgbh7x0BCA7t2RkaGnHBwbP/1OZ+HsfuVsA5Ts68QQz/8acA6LZH9WW +I05hQIskJhQAlKErxSxnBZ65+DNSms+McCQacHjiGWfLOssmWED2xFf3JrL+I2hQsZodDLY/oNt2 +Q1G1bQkFau/gmyMBx+Cl7MAFoHnskqkhqU9At4Sk6ArsWx4d8LERCXNVTN6/ZTgMSX+aM3Qg9mqX +MHdJT7m2j8XZqQASbr+SI+CHIEc00+qTyz5Kzxp/zNzYC/5RRg+9rfyCLG9w2UQVUXcanjgKqKuz +Kc+wuhdVyvdzQMjHffO0rCmDvL2kS0VvRLCzltOTD7XO5dfZbh1ejpugROLdfe9yrmF1dZrSfp/3 +s0F2Zk8/0CSjBvRFHebWMwelZjYkmFdqpH4xdmV23/Daa3mMMD7PA7BAt0iYYE93Lo+xBhRZ1k4w +Wd5OepffwDSWJjhX+ndLxyUID8YVpITQY+WdxKfQc3IdT/OnWQReUP22OCraj+jnLFub78efGRgt +I7rZDKd3DOJh2TEtR6lYZ46uZe1dLoO13hYNMZ0cC/kKFbnV437JCy7D6+RP3EAPdq7D0lsj81yL +N0QRTPL2AKPVFREYHTzde2/lHhRi8AukUxicL498upvEACJUJABKI8/f/BSXI6a8rO0PDJ/sWXPS +BK6UuPC+Sj1KM3HdllkmqtPaFU9kRIYf55XJM/F826d8IVus5dh0gzuZ8AX18Kcf1pNClq3PjnvK +94x5OMan7lcm2XJeKxx0P4ixKreCAVQ4QPx+E7olB65083McCXMuv9cauM49ps/0Xx1xWoLGhNcV +1D0VLr7WQ+gC5dXnpAI/4CTcRKMPZ050lOA48SJU/tlq7cOFrRSbDS7nV3cxWZwFvewhIFYgd091 +TjnnpGS7MuhNIU7AiovkgHocdhgv4oAphPWm4n4uD5Y3kAQtnNkLnjXoe58/d+j7GRny0U5gQIod +Fy/8k1KK06iXMnsiQeAtQfqulA694KAdXWFfawhJDqAlWIbeykPb2oMIikEeLlC5/Frqty142ID6 ++ZOeutzwi2oVYejpK39h93PYSgSdhWNJ+30AWA3y0QzHUDlGfBqOlTTRhYEuLaRBesdsabQFEOZ5 +4ugccY85ETg/6yzR+QYIkqU5aH7tarC1OiPc96xvIiwbcV9gEs5FvZb/yTT4N+SRGsmYAuzx5+np +QHVFcaFlz93Esf1gxEp6nGzI+3C+UGELdBT0nAN8Pq8YpcLVmdFtmYXZMMbdeo47e2GYCi2aePol +kNA6keGcg8vXUFDe2k2T5UI2IZ4DQFQjfYXwSn9+FpfpnVc7MziqwFwR6W+R/saPJQHJujamLHLs +hQQbHI8E91XWgC5dGndMpBfG7Vr2gA+Achdqf+7kiHDjR//egddIbHdGAU0D560SVOJQMu3DVSh0 +vqDHirkvdrt+3+LrxW+zdXPxgxLu+T934HIjJF9iejx9clgwHNcDN6PGy76itphwtG3fZcBt+0pT +S7BX/JJOMw2QmsfRoCTORF1IzgBJbPFOwjKOp1Kvxz69HG2FkLPGJu3P6SDEClkbMfGcB2SsOjOQ +A4GJoy832AMuUvP8x7fmyqb8dT0j4OHO4si7DPkNDznnIeDyNa0wH6wudEoNWT15oHI9wTSwY5Wu +6PrmH93l3qzJFm5GQ1I0Rb1wC/7wznkq1Btb384XZFBz2u5wk2ki0swz2bjF68Y+MmL6i/kZr8HK +o2Jg9xyXLatWaJF7dmxPLd4nJuJ59U09ikAacs8y6lPt+Ji6kbRpQxtidbtGcIhyj3R2yPpg95md +RA4whSDwNXB1+3qELeF1aNPAPfOPIgh9POu8YYzIEqmRUe1G7zbC85l0mF4hdiKDtgsbc/oVd1Pe +v3FIYW6nY5GYMpmprtC+SQzRkBUcWBvO316Hx2fhhHnDrQbpNVsVOHB8symlfeKn0ohenZn06vb1 +t7lnjE0wnTlDjRex7geOj3ENISKuk5jMh/oUcRNizfGK4HmusDy2v0SJDVbqK8FqA/s/rIgP7339 +WefhT9/pLLwwhAC22TM2IRgmj7ekUjIo3iJycXOpzspxncWbcVukoY1NNuKNSxDvBwieu+s9kI/D +qpqxD8Z+6Ci7LqOOEL4FGtCDQySWYX2K/cLn07utCwh3zu9y1D8kEv2LdqiQBz0RNDgmWsCTI8vc +gpWM8fiZ2kAxWAecJMNhlQkIa8Sqi/qUB417+bThUxtDc81Sl/iQrkEYNUBL/WaKIz+VaZ3Eh0yb +W1vSG/TGbix4pT9wVPaPNiB+9GTsRduLuHtLlX3BmQ7l8b5pj4aE+WtaelvfzXiDK9LCKvfDeUEX +0p4a1UAVzuB3onjVdJkvxHO4BfQ6u8eoT0X5xtbS53mbnWUCJpjUfHt+kz1wtdUFb2/dTjNXCaQ9 +ZVhw/UNhRqLEgdMwpLL0WceSMhE9zUd0PLYRd5jHvVRGl+sv9pDRC7AGWIDOZ2AbtuRa4//pu6Js +2oTwlqdQfB6c+rdD3tEr/vVy+HBO1dHlfMxtcULiweGVXo9EPDCIJvxyrEMFDIbzZU244cA4m95g +Z8dNtvNozqCt3yx6kRsj64vkQgPVxhNHigGpLgFjnZD+Fd8kDZi1+bwJpIxOYBf3/HUFHNYaVVaf +1Gd8jlhx+GrS2KnX319tT7UJcz73g+2ooVYz8GXsQrOcBYrdCp9xACzkOInlHhEeFqY6jzNFdmsN +St88M5Mb/+1NKpEvLVt0RHextswpA5ML9skKm5CFvTT/IkCWXGeHJlSu3pT2sFCOtYJzA6/DWqmm +S9Ye+2G+aGY/cgqqKJy2hoUFExNAU9ewyMuRT5AZhcUS14xN6EvNYjpWk5US/qHA+xW0tJY5tvF8 +ePPnmiWzH8j7XxxMOEk9mZXYVbKT9J5bVkDZjBfVSaj5YC6sE89SzAvBoRzQt2fUJq9Fyd3jHIpt +jGSUL8z394o20SQIC9gMyadfSx6QavjQbJTq+HUk1Vyafov+3Jc6KOKU9WMSBcv8ROi7yDdYYLFF +rVQWcDjSCMxNrb7SmpHdMHPSchidtbcQ4pyb9s5uup2tFbSPhadc6m0Xkw47oSbQoHrzbYJwwPxf +/4rn7Lll1d/WMzplUO8BJsmloAQTTxHMIgmSAv3+WwftjhybmdNkbPC7s8tKksFjMeS0wOlHv8Yk +SUYhglTASWADbW+E+aWH7CmzaYhsX8k9pNZJnwYwcgBqUHY5hPa2iGMvgwsmZ50EQudIfipiJoBA +GKe9Cn/5UiOFqsKvmqHv4EaB53FwQXh5y7uevE3DApI3KSAWGtD0ByU+NQM863KfupxNkWrwEV5C +zl1oqcS8SD5hmpn/lCK20npLkHni1zKdz0yeehLZsIDznayyFEQ9+U1y8YMsC6euSHd1pWaNmEQB +2d8Tra6qli2BueO6/+acorBLShKs7D0SIQUKTIgPoUYgBUnTeLIxU8Pb1shqjrQQ57K2JkDCGlo9 +royIOQY66kJ/CUNHlnI5RtE0K80B5OxFq+E+5pLMX5sc9c4TL8yOiLEe4BgNzU58ywdSbvV2eR/S +tygfh9dcBNusMTVpuFvrxw3/BVfxXHpuitmHxVlC+3PtxQz9jr6Hc5SttMyLl/hVbd/YmFgGh+X8 +4kWVbZPWGdyYWm+jhsMKt4ijhELiGhtKvk7XrWNyPENQkV84XKXI170QVjNY7Y5tIoYyFvp5w8GE +AroNJ9fm02UEkniebSsbYb8twjIvupbBX7wWHm9VQVuD+YHxN0ooLD0xNlSNUHHMQM1JsWh7YEcX +cAuXp4hWik5IXNKcGstyyvOHLe5lBoTZMsUXJdRIHX0IqoZT/TVeI61t93F34LNYnrTf4/QMmuaC +x9qOm+EtLq6CmcRoBgFJUfvDG4JjnXuA6mIPoOvvrtKFEzoEUQ2wNtJ2XefUixenxaElKk22yGMi +pShO70o+L4kb/WYnNeccmh3sUgFX0Xt3yQKjkURC9yvrRLMAcmaifroz3UZuiLiBxs1juuRz+tLv +4vbrht3FjeqKVFLEd70CqlYNMAtVM/W6nMv+Fe3Y5rGHwfmC8PploY6DDEJdCjjnlZnrQ9WGxiYm +/OA7q7A0NfYBkMjJ5O8QeOE0cGYUlfbHVB7pXuwXbv+rL7/r+y2Q1Q3x103v3AGQ60aWxxz+oh53 +9vgdrCHejLy7v3T5Hw0hPA2S/kSSX/Kjt/L29KUfylw4kvhjN4QdpC+CSSjXyCHG3s4klCy4dCKg +XY+bWbCCgYQLV1gzZPFq4DlVhsuVFX4bTvCk4FP2/9XpN27ORg0kTipUB3Yxx1vhHqfgiq/5rsP5 +RJNjoxZ/FhsIZ5kkVRxkzBKI4W3DRFokMKKHBxOABotCc65YpYf+m5VvZlkwDKVoiRR03pnesVj6 +3pXukWZHoOJCg/czcIR3sys7lTCIDTGmHjgHk2ptW1pLpsvGh2wfrlALzOn5EiTxXaELcpMbGSNI +yW0tAlRwcYYmk84VBj4LGH8nvT608TVuKld4lno/RLHJsCZJJYeZ8M0vXG9FMZ6tElrtExrWVtRS +C0nhRgygSp37scTychMQbQ1JDEQas8WMb4cE5ArFIVMmuoOQLlMCdHQxV+R5Pmd53frLYcl3PxnF +Z9CO9jM8G3S5SOek+Vrp4BD/G+I9AWKwsThBqR7uoSLQOtir85kHhqStp74eLg8KROZd5r9i6WWv +zT/6k2FSpQyk46IPyUWeoY0qjpCAeIrZ+RLOwogSA3mtAclu0qaWDi0Cc9jZgJzCmbEdfqOm4ZCW +Bj26tkCRqGATC9IFjxvA7nBX4dIfXyI4xfdevv9hfas+FFIkprtbx4qBDilFjfo3oVk+ZEvWIybj +mAEFAm/Mft09CqJNV7OOHq5m+ULN8nGWgJ+N9Fe8EoA9tIU6HdpCpIbn2RLgWxFUFTnKx1ssKCXp +ZhLQ/Hu1QAKmFh5PmHbdPzGLlV8K2SYt1DIciwFxFEwXNyrqjE/C/nN/tbjiIcOov6KQ8dHWQu5l +h8OaBuQ8fCAwPjK5kH5Gqmz8yk9uUV3uC4uwt6/0468ENtYiEpWuVG/L6T3gtU+csDIZuBWjMuUg +soRL0r7luhKbXg8Q4H5c3djHb8IwARehwrY3MNiY2b0fRWRTNgx89SbAUqVM55DYqNSPH70vAR28 +TuUrWsATwKkjaOboXgMfOHQTih2oxXtlK5Cs56oF9oGlOA+WusjzOwDVg4ylNmfBLf7sa+VldvMb +6kZH318Vx1sAARSS9g7L0hDv55Fbp2al7vjUWjagJW3bFwPjmsT9OX8MvdCr872mszpMStn0qGfb +OgAg58G0QmdjvT2k58XEmhYrAb79qi/zGqUfxT5VM1ShjilORb/nnJgNzBRD1CJ0ZFoI8ycuujdf +OaaLXEzrVOqfrkTXnSrtaacXuDh29ExPCoP9TNdCVPe55PM3cZkHW8yxaZCtC85aR16UgU9fyMEq +Z6JS05dVMAUdk1mBXcVPd8dbxzUNmBObVw1zE6bjelstJ37DZAYE9UyJLuKSfw1AFsdRnondZ9lh +sk0tADjS6/5fuSLoWGYl03X1KLjxZRsI5vXOI8LlKzl1IOYddVHucOFA90mFQfWHEuewva75Vs+m +2MWuX0Dd2XT7gBGydQPsoUyySbd3BtOvyHJB5chjEpTnYf0RBWdgV1Hzl3UAh6v0GLYwXsPyrxNC +gVXWN1kNeSWQZGtq4oOm15pXj8S77KIY/VH/si7XI8z1FGx+F6JxyYEO2cISOeTuDzizMBAt962m +FrBJc3TgmyRrN5WojU/2SQodY1yC7Ud+1Jfj+meCcB0LsMJhX0O28rvc65R1nZ4anwA/A9e7eSH2 +TrDxBuTeSf6JNgddyQPZny3TYFoXbeY9FnRpuvZxxyAj4/7LRZtCI4IeJ/JN5RpBMKJ5cB+hY/YT +t5iFAM1/rzkijS091ZTUa/q3rPjc64Kk0XlMGZDS89nu9sC/+56JAzzTetLW5E5ShNICcCfD0bfc +bBrz821LYfpJ4XKVhdh3F2Qg1EPeikIL85rMwPVKgqR5/v6+asDE4RbxPiIqiT5N5SPDEsXIEbXl +Fd/Xgqbj0hO/KAZBrpuEZD4Af67TH3IVa9G4IPNxSwhzdOoT66i44rr5NJDTgwZ2vYpUgqNPRgCL +wAoOfI2NK0P09jy/g+V3vP+hhHe0hQXZ3pNYkjOZARkEBZFCyCccDVLVyHey5J3Ybz6s6SYvOzRk +LjZpKgx2u5PBKMbwXleeaM4nbYVbTczTvJUtJbH5D6ek92v8NwHIIF3QGMhoNOHZZFBU5BKL+BMs +M35OnAlZxj91UUOqMIbzt8td86r/izj3Nt0xDTfjjoboPoV9qTI8SGzvCQADl8X6g3Ijx8FiWYpQ +sFaQVZV9acroU68/x+cgu3sdDQ4Ff38GAKbZyyjdde9j2Bjs/YnpB0G2r0iR8Ok3DoI79bF3L5QK +7M6n6upL3AKHNLRb+SqsnJHDHq9dMRWc+9prSMiUssQ5VD0uepR0fx0+3icinruRah2Cs1nTWyly +8JhvpHGH4cSLp7wkFrlBvoCt2TsGJEro331cpqGTPsy7XQ70syCZsa8AbxqtdR7FkZkitLL1ZHQj +jRReR49wlN8DKLYuwgfe3mAQeK1zKu5R5+krXwQ0pvqsYuXtudn/nHRTv1+4NiYAXhS1CjfyP4S4 +oEseEOkzKRMrBLiNgPthcee06JROAEIE+FgfUOVY4d/OR2OFtXJ5qBNLgk9o2cbugir/rsr63ZvA +9jOgTy5uPLelDbxGSmQp+r+00pR9XosA8cNR8FJ7lR5FKpj+H+6q6fxiEHxl3c2eCEkvZIstDc/Q +5k908+izeoJl/inHY6PFz8kUi3qhSXWRBt54HcH08HKd/bZDPZHEZ0ZIHzZvm+zGdTtTv4TnBGRv +Z1Avh4p2nsYEp1cR1TP/t0HxEbGCSi5ls0kCRjIkXnJEcpeCar80l2T73W5SUGgHHdWf3DzF2I1k +FnN+nDzzyjpCNd6L9Ag4moPYAwySoIJiXQw0K+/+sjG0EodvgUxXHw2ENgcA6gLrCSjvB1APd8vV +Rpwm+zuaRBCjOqLqQQCw7x6ra/fqcSflYMs/37GKeQ2JDGjosyOj2bKhuVcvFrisHmj99N2+iLPR +Ley2hZJa7m97oO3Ji/pKf4bBAE/K6up2xH80V0OSjiTw86u+LmFDWKEvfb+DEycmLCL6igSf3U1s +DBvWXa0bK6f5kIUPLQ3ymqNtmiBrv9RfZONrYI9dC/SAEzYtT6nzMCbGUWQepH3jWEH+n2o5XDy1 +r+jCR62Ua6mMOXhPF7K5Zjx8UZq4pexuRU4AjHkbVue32Hs2G9PPatb0Tw1i0GxD37jB65WJzUp9 +SbbQMZ9h69ZLOcjq+QEeK53Wql8zERh4ILU3QJXsBQpxF0SPUPtjRd4wExk7S/UZSPrm6lXuc+z8 +Cqo3Sk70kJp1HLKtYGcNAcmQZUHK9lLOdmtRwzsdxPGVvwvcQ5MTPYyVjqF5L8azXmZQLDht9DVU +F5nwRPW125W9j7tthX5/PPz3z/h7+10ygCVrSGKVQXP9erCSndJZpKvAyct8mVowe8up+2UtNV1V +VnOU0hoM6kqxq/1E49a/yAmsxvGU/OHm5myKyAObNHJn9oQWexdXDY+ry7Ts9V6m94iILRWtIuEn +CzIM3+7uMgtPaUW5BAYOtPbLlSiR86gjMfqiWhp3VOq6AMK7GpkAAurtvFGWX3Ja3H+2fm8teSRx +YYenpvPN38L9+YNQV5UY1SkcrR1IVaQVniJp/uvXZPmqar9gBxTxccObBluQNQS4bAPxFTcdYaw2 +B0//pUYLjyRIk/uYmty8hsgWlyq0R0c+dFCjjM4JRxjM6F9o3hyG6y0UXmizFLN9N/mNmXRJZyd4 +t7RWqZ4IZHTWmN8Z7Cm1ayFsAs69jJzERqLSQUAs9L4SbnhUwmbcL+tStjt3kzrIpfgiam7mRoR0 +Xx2kZ4fIzfGxO3YqSf5nDjRjghFyPZLFpFbiBBOe+KzJc1H+iHvVP3omoDN6k6PExiSEXpUbD8Lb +aKJGxVKopnI1R0/gIvx0FAr3JWTGalxJRM5n4jFvhfuVUe/PXqOQQGkG0z+SVQTnDkHkY2/iBFHg +vmfyRWTGpqtUB0OnMfiWp4a/+ZohySGwlLKUlHcaiJXCtUeibmvbi6uqhqp/bfH48+7Z+CUn44xP +oMY1IxKpAQt+Cg1D5y4VXuWoPqHastSYfhHoQzoS1d85zEdsq+rvY/+OFKOrPa9lzW9k/CpPtyh0 +cGcs3n8FuKZpRIMruXwR1p6D3whabrVPrSAjelpVuRhykKmB/wosWh9sgJbQS3BNI/cJuhdrwvhc +xipbWrKKHZ9a/MDqp645XCZxPEolxlKsLIexotEMRTXypJFsue1yllaWSswrXh0OIv3abiwGV/j5 +qB3IZbwNhX107v4bA2kcpO7aKonDNVmCK7wcuquwzvCnMgB9jlto1QnhznWFf+89rFkbMPfY/AOf +BMvGUVto7NBhwGUPIwuLNOT5IF+zyvRdL67bCcCc2bT27+/T9N4+ucnsSwYssUHb2cILxO7Oqqhj +kP1+EOoBAGeGO8IMPg3meHY9ErwZOL4K+O52pYD2uLMLzH6c3QPHnxbx4/cWCHXPcJHwX1j8Aq2I +7D63q4Za4aalsAgRmIL4t+Ds6YtTF8FKPgNnTzLwZdDW0+E1dp0JZ6ratsUGpOb4U0dlS7YVd3IN +b9m8UzmJDfc+GzIMk3bzkfRVo9cQPUYXcSuhQBiPZipzhINgsqI5WFEnx3rSHfjBVfcpkYmVZDFN +XDZBD7Rj+BDrue9QjQ+0d9TRf4dimU8pK82DBlYQbRN4USIpErmiQmQycbQXINVdLoe/MoCnWY69 +W5HofMf7shGiPu8H3FK1f5lEhGCjmr1W19jrrDwhaChVCYtvboTjPIjKb94KOiMcFKNgsc+CHJQC +Ngd+lPc7YrHWmEM0KU6L9AG2GsXRNw4cMkC/CAddwdVVInAe1fc6ryiQFzsYGzhCLS607ssjYa3T +UpSwqHJmGAZR4icUBIECSrkKRzJlT8QVnx6PprRTpvDW6Rn+VFZwkwBn99empSDnkCGhjrOheFbw +cwoTKy3Mb5nZgtuvBD7gKymFeLsUbZJuFVKJTlzc9TxicktzhUrfu9djOJ8k8mxiEO+EOBiiQHtS +b8+gHaPGd8oCbvasFeortDGhTS0r6tgFgvNM9UFanKT6geJRNFpqFmlbqzUspq8afNNOYB3MKkp1 +ILFB8rw6GmWRSSbZoTYIZT5Le3FsQD8ggt+ybg1q8U+TbiwbmKTFqXPUN0tOquUGusCw7RFRwILO +52OD2w6dLWC5U2gq6kWYvGEzlwjRYXZe+EYUIWGaFxBa99ShtzG2o+TcBuzeBT+p7KmhXUS6PS3F +eHfGP+d03ish+RfHwj32zxBEPoIJRkGPUJrc4wisdKAVPxtHtdeWn3IK0oo2H7jL8qgJCLRpMFcQ +/kO00TBSdJossWxhvZ1KwzwHNfnTZf5AMqizY8Bi/BjsN+a3o/DvQKd8U968KIjB3fWbgFLZffLQ +di3gwt9owQsRQkHBryTDB6HovLUU3wavcIMzzhxVFQO4FB2N2AWAPah1h/Al2nzaRVLn5Qg3kThi +m2NaPOA1LYdg0fvn1S1feMJabtQ1eR/MVb75T9hmkDeKDwR11qymtWNYKRv2herm8EG5qpNc4Jcu +SC6rqltR37mzo89Ce9oVvfN/qJniFFJls2LvR6TFqAQMocIjRAbNJxK2ue/LcPThY040+uqQobCZ +QsCZk99If2u1rlV7ymMDv10QWZL3dyf7TMH9tVPwnFp2ZUAWfelFjIeANvI+UvQFhrnn/7alpzOV +qss2J2dDdNlmGbs4idRUtBYPHh4C9L1LZa7ITeArX+0ih/aZf6xSW+ccDWRPHacghuIYK8REPmp8 +WSeragr7DYeumCn6RYrDxCxc97NlV91/ML5ksbqS3lupQQ+5Wpkz62xzRZIpB4H5DzxfLG5h50Dn +X2CknjT/W8cm+62jOLpu4xuTsv1YMxZcSTYLM/qq2fu7nE4tHrPpPO2oIHXX6pN/KwraQncWO7Eb +kqA1Ap4s/BFEX2VdXic0fjaon0qDPHC51Hq0+BJAn0ZzShcSWiDtHvW6Nip1dfTYN3PDEZoSIbl2 +R2+uhfKrjKWnIpXWiqvTCyP17VcWEAfx3ZgsbT/naW5s5ZzViUDCkcHkqOw39KY6brnz5BDq8ej4 +cv3dm+e7Qoktf46NRtUkeMtyQUMYvxTMwV9NMqIPrW+hCx4YILSB+NXxkA7+Fshr6kWtW59Ue35w +klN0ngk4e/eN6Gu2+gQAGhQCcXjmehoxaX+zYvusCoOEl9igstnvxRzuKV/4mc6w6Jnp+X8ddkMe +CmjL3kWOOCzbzZkGO3SRPFEXvev5keeAf4ic6QsurE++iCwbbs0pdDp6W7+Ay7MH6iCkP+SksyBn +oL5p4E2ECZzUPoUFQwip8t7a6JRU8mBUn239hzIsQ3HLqsCT2BHFs1asJyAfCeGBDX5TTB248u/d +T35itQU+DWubVAxVDUrBNf0jan+UDhp3WgZ99L3wX0ywV4otAmMDyoduuCdHaGoexlI/bM/eEbMp +RdB40drGFHRUYgPieeQJuxJfD9u5mfeedz1AsIzKvZOXSiJf6EbmVjCjurDRmInoy1wm0cGOFDqg +Fd8ciZ8VtwjLsKJSyeSheFSr8Oi6BHX91hYv4CvPUWx8vfVaREHBCYaofmQnUsPUCWNf0TOist/K +ZuxmjLkmA23rcOA4jZzwREew530KTaGFssR5TguMGKWIkdoVo9aWEiy0YhVQkWTGKaYW0T+i7pDw +Tf9nYd75RGLIGElDgop/93oLgyKw13QPBShDf0dFoQp5oZXsokJscm92kzXbf9YHiZpTnzEVuBwE +B6qBTNrco9SNPF4n2zBjMY13vkajgbYcq6yJArOiAB2GvJnd1gCpe0c1P5exDw3iGjl8u5kIp8FK +3cOpfpLa7FEh+gmx9ahymG+KwFtOdBfWyeXXLBJHAvxlFekCLlSGXHbwOg/B0jDPSLYWJiRTo77u +ka/qQ3ePL1XA1ioGNjk051DyhK57AjMqSzQbn/dQ+6mXkfUQMlfU/HX8X/n0Up0JyrzNve0D1YxV ++nJxMKqoF8jJ0k3rU1dRRTYnlhBFuG/qK55SE3r5OKA2yom8WT00mQi5PMiJP6ho0XeUJipQegam +X6uN2p73TsI0WkIADw9OIf+D2crYE466fzTcJt89HD4yoR654BSURY3zjReoOR0c89oWVPbSs8sY +vVSoCRrAm+d09RZgCV19iP3AzeOhkgk0AbgbMo53KAyYmgaUiEatEI7bS4T89VMIhslyygycOGPD +3qr/QXjO6U0bA8Vtu8FIXB5KC+AOtwGEhY/BzyHHZmiXAg8+k8etcPeyrf4yyJqUuY4Cszbttvjv +H3Swyky7ZuPp6jUPg8xz7zJgOReB8BDdzkqtmyx4HwMizJ46qDgv/Zh0rNT6amWP4VUzz7/ht6Nw +S1t32Glc4i6abEYiWjLtn1gscEEzxONnGNXT1APH/J/KROrJzAvPcZhqVcG5jw+4tPtnGr54cqHg +8b4MP25UkuIZx3EkePZVgdv2H6itAu4SbYK8GJrBy6AD/dw0uDSmlJFNd8xFJcDZUdXuJXCBLsLA +t9ER80Nf/TYn2XRhKN2U/upJTTM+EYVsxWkWpS8cFlliG0DlhC0L4Sgp0E8OgOzXffPLUX0ATlSn +KBgQldglsMxTh2R3ZnG3iJqkZhRTmjQY6kSwQgd1T/+MBtoSSLHu/BUsopjpGRjdolu7Nlt8piMM +ul1qyw98JJhH2+hc7UD5v5ONScHWt9KCJ3fBBz2ig4iUhVZ9y/IYkxSosv6FXMVRImAaoetXzRO0 +hLTSHrgZcvOGovzSzU3+c0+8thmyGx4ji7so6gIVMEqCKX7SOtozhQDvp1gGubWeVZzKHD1WBTLL +9jVqS++1qgf1XVF0StaotNdPHP4WqaRoGJkenbTRHJfj3U+wRfXlbVbP0fm3snVw3y/Fw6wHuF9M +AB63QlJQFyq5bFsqwJnOJQ2ahkrCQzA0jxTF7eZLeLaV/YofMjJ313xJxVu8rNETGN8XXSc+wB2D +d8cUCEb6OdxyC1BTENqVFQv1/oo8WiXWJCYDFOp3MImwvaevUM9A9ZPYudKytLJ1o68kFnLjfx/X +noeXwW4zYRG3LuyDtbcpQNY+Mv8ZPRB3gP6UOtKs0GHKR6pBODl2Yjh1QyPR6YAl190ZR8FzJKL4 +rnVYvRHtwAuF6x0LUQdlCB7J462gGD7VKierSDE7Mu1UjCa/h3enw4Hs8UhhFye2rW8b5mCRzj+N +AtQmAvLOOaqP9OrP7j2Go6xatWB7/u5TkHyOcdWEhrn7jf9Xja1VAAqXz/bYnzFUGQFuvzHdOLS5 +HKI6R9dpfH3UWi5thSRPG8ufZwRm2Twwvts+npMoW5usM7FDVjLxThbwPFkGNguI1lVa1GbZqdGL +xGriBIRWWn8B/IezBLkETd03r8nCIOO1GqbyDt4hycDjkrkOzANXuiiWID5JyX5qfw8RNgH8Q2uh +5251IdxoRaU7zpfakxmGGbMEjhQMsrGgkvW2ve8LzjNn2eWvTbYl8KtDR8ArcJ9ahKPy6BKkGLhE +MYDaShzZP6Z+ETp9J8ur4hwf8fTmz6CVhWEiqdD4snWS9oGLf+tAAALYB2h4AzIqB/+mmFfLzL5H +WWl8DQSVRi9icIZc0Q9irK9eGGmXT+V3ttuA9JD1FQPzTqZz8OOzxtJEsxT0PKYNE0TuZOX0LFXv +hRwOiuuHTbMZ3EYB0Xq/DgAwef5ajPeEK+9/P1eyhISOnpKcja4rL7XzjOWUEIeC3lEm73UmCvfu +EsnrmAbwy00ZKTH4gmamL4X6tXHnh2TTtHSgA4DyCrYVRd73M0DskSmzun1DcS/V0Afwwi5aZoWy +dpfBFUUPVkl9oR7iIBFx4Vs4sD5dJT55paTiqYOHd8z450bYU9aLA+eNsDpD1MTATgXa1vryS5rV +0paEAfWS68yS8zjTyTYkj+Y00xs6eQnfoSgX2rsNt/kLNxgcIRqrKn8JQvCdC5Q7Cf1BWblRkUkl +f9ZPjeOdQrBi6LE03VOADPIFJpo2CN3GwtGAE97p7piRJc+1iyhuL1vBTXfLxuxwBMC3kDkhuI79 +rZWgpf95KalJYeSp4Hz/kZC5pr85FtycoGV+HG1d7LHFjoJffFIYkcVEvYSBl1KNAVTmU6fNYEuH +AnIaPjvBe6R38TrfelmBJCmGwH07HQflFwMkiVkN5ZsNftw6rUzPSJMpEQ5ot8jhKf3t10IzqKDC +jHOD78kPKQDRTVMH2my41loT5Okx3itoq94Nc1qCqsR0zfs0smPTMc6aITUjYd2EcCp2lMjw/Arj +kiw0Cfu7tht7oPwN0pGQMvoTLtc7Z0/xTf5jEnMyqTNaGG+TYsZH1fORtBtEyran1jxa6TS+IN7O +ljOLTAiSq11TX0C6EbasOMqy0/Cqcm3qTXNt0FNUJMIG/EWtlMvonfLUPH3pT4gDGz4W451OFzYn +JwoHiqhVzEQUZFa2zmEimIxokxQNB4ICUBNPqkiVgtaMyWlwkAToNvbZVM5d6KfQ6FmgC2IEY0SL +OIHb9ntkgHw2vxDlW2KM2yxRBLybMpL7vOyiCHdrlQTMi1WiiBnFN3pfleQguvDhcm+1Z+NtH0d7 +lj7q/rTPxpyYl+Z/6a+mrzioKGFP8jm425A7b3nhOv37CbJGmq5Xl6HvSkf7XzjG9K9Hrv1bomt5 +os712ztUoMNh0puuf1zKXrNApkrCeJ9hGUokxm92dSnF5kJ52+uX3fZmKDddrkhYjYv6F/zr8rae +G6DJwYVNt39z/G5Ra5xzyt/iPr43Fq+LdCrx34H8Wm8h1NiUHiRGOS0ttwLgDu33m7jW1aqzUvmt +/cQ+z2lQ5kHxXgSazOOhhBT8rpXnRN+R6ZbFIui7KgnVFY4wQU5xadXx6Ee+3cvpJtx29kHBXomb +3AEfaB0xK8eV7WWH7I2I/TARr04gx/FgF36mhnvqx25KydSRzN9ujUwljza2+OOF4tW1nB9HqjiO +vEzie3WOoB0xucf14+x/EbmzY7gwIXbb0Ll7BplB7Icu45jn6BdVBH3khDInkt2+HjTHmpYdEAxu +g07uEgAs18vs4i38wcNhqhBBrzwWtr8fDTbLsjsXgH6IkGw0yO7Zp7Vh7FQAmlKLAM7j0Tsyinby +X8EOvRM4M7WYtAaDyET24ZKHbiFh8hnv/vOG3wT9211KpGcxRb0bsGWJ5z0hUp+U4pgD2EFb70yu +ah0vdqVoNuql1xwZfdzdYTMnZoB0Lwpn7kMhkIesNp6Shy6W0R7sdhUJSyII48LcPl8xFZrPRsvs +LRcTgNcLuFE8Pn5z/Vu7ZEyctnI1SUxaB4HPF2RxK4JbDeZbNUbnnaaOMfszxzmjcjN/srOYPhdt +Znqiuzi01UwlgCJ9FJ5yMYNjSFYTMnrmABaQktbDvst5g+xCl92PdsYA2FdYWmjsqYSZQ01OB2I/ +PkNkoBmrUh8dD3j2C87cBLAD+bKL0DR3T8ZkpX4xFRUMClz0oZ0UzcbgZUvxz0DJvaNetyfK0xsw +tawvlBeIn1q1P3b0gYb2TM4p5dLQbKupkxMcU3liZ9RPdGQ+xFbJ4D3U9AwtD5zad2Q3xrkbSm6y +nGZupQarqe4DxbboBaAnPnyb4/kVQkRqyyc2YvZtx2vAJHheJc8Q9xY0wiwV6jaJCiOyYOs4t8d0 +YgzMR4SHbRnDQr4zOPjk130vRixgvsYeHeMwjLK6HO6L0dB+mUU96z4X2ziLaf81w6rHv7QcOIZ6 +mH5R6Y15ui4j/ysOAV6zRbMHxvanjx1qNQE6EsqwVpXicYPhcuG0J7Cddfl6pC9uFnhOOyrQWcKO +GSNNl+DrVJCgLUxmLGFs7tDYmeb2sCRJ3G6LtCYNu+ctGNfoXhFX2yWZ98ys2C++enksdRRZLdlX +rFJ3JwVG2BFppXFLgAd5nsvWGYbla4dbWXjj0i+pZraqMb/HttSsxwItRHct041A/mAY1M2LubUF +WT1Fyf+sSBJDQ9FwkbggFXhge1LMb4GqjA2TEgrNyzaltP0oOgWKE+SwgQx+7KpG7ha3I8sSkoY/ +QoNZf0p/bTI39rKoXaEkl1nPJF+ZU25sTPxMrwmwkW2k1hOIgXcnZSJw/y0esyxvayH/IGHouOP2 +ZTre12r16CzWwydYklo69P3lvf26Mo7TWscP2f8TxIhlkZJSzPNjaQeNwcCvZ+9Id5ZTAfhPG3iT +UYNu+KGsZC8U3W2Vrp7iPjHKlrSlClR+aVe66D4t92W3xtIlN/CJJ0tj+PPNf6fTqjIsJVF1Mym6 +5/nrt78gpZd+EiaCliJwySfkiJLs5Rl3BBum/rZGKiuvI7VE1+JCHBac81vwb+CYw4VA/Z8x7S9Y +FYGmJl4aln4gue6RYJ2yxebN4KEDjahbr1TlczYeRo4nHAvcfyVNPp7gYAbhjsS/408aoLWOK2wB +sIjevYU5tpi0MSdhMm5YUHaG2eyVPzrfwu4pMAbapINx/8F8Wp14NbvpyAVmZ5ujWMxcmlhB2thI +muX8anfBAAJ0k3joR4MzFDgM+04hOde+8n7vveG3I5zNtR+LPrU6T0+hDc26V7pucaeJk0EYNXII +qjTIezCmj2v/S4q3Jsc7kEhhfxCFkzyKnDVjhImAznhlIns5D6m8Lt/n6udop84kjDZ9w2RgK+OI +kvvNXdUUxmygJYqexH9AKGEG+1mhMm6H/MTPHLLbEGfnkRaxXJxmmR+X62BEJsVo2ib4hlJy9d1e +hgYZ9IWyN1p9fQIgeuAToLMcvXxaOxF2YFDEmPdoXRqZr0ZfqYp7EyUnzXEeFMWIKAuL3ue2OKFC +FHKKEgUmrTnauIdioxwCWKRGVHlM8+sNlj8fT/5Gz+8f2WhZmyCkjBqb+bRJN+k+nPd0/P6htEBF +kNx73xupsDNAEPiogV5X52bo/3aSKy5ZoQ2gJsWPsTtwATkHM4F3AdZ/pVVguP9UWSvqydQnZL4f +oAHVaLWrfblWqyi9d1kteuhNhG1RiEA0Hp5Y5uBS1k/Swx8n0+3m/k9GfDvXU1bcTo5zLQydpiRI +ZFHm2uU48WOE/FRABkKeuXKkIZrTe9aC3g0svYa8PI/9iDOUIEQVRUN9sBfRlOf1RTJZVwCl7zny +zTOt8RtPo7jL7dBSFiGZiQNm3dx4jNURc1CAPqLgdUr8QYuEnLj4bfsW6kO/OX7njLJioSKVdtje +RfOTdbxVenOxKC+ThAdnXdZm/MSTACSh434oNXwIURJYHVEGKqrSTclzsTCkAxuLXzJu9BA1Peve +BAcjAg9tDEdjMqpSGG74df6noba1ILbLoEhqbdAuSDLRqgUcslFs7bzDBdkaAsqqjPaCoin4NQe0 +zbUXr57md1C0wOADAoRQyhcxRlX2R++h2R46XKR58pZ2i+qhFeVNgFV3+NePflcVbndoowaAxu01 +ps4sfY0su/VzU2Z/9RHWwdj78VKdXBtxocGsDHrUbgozZPqOc4qxqisYHHjAmqryY9Si4MMa4iK5 +HRkQQvflLWfio8r+92hLOc8kyHCF7CUXoWFGCY7SQiYjwyeI5HB+ZxcEEIHCv/U+viQp4KJQhNbv +yvvMEsIh92XylcpZhCbQ8PbtKXOLqfvsP1bQVn3YjWQOkw3DFq1VLcukpuS4seoU4vbRR7bb9L07 +Ikd+6W5NYEc5NkgaKC3enO622019ZTAMCblGajpYML0n2qaJsn3Lcjaxs8K+ecFfLskF09Org9JA +qNkryMXOhfyB2pajHhL463RVYAC9v269zELiBwvwzbSnJ579OVI803Vb3L96wLt/rSOwUm6LhJGR +RpwV0aRxjczjODS7SKN+N+zdTctY76GKD0MLGhbQ0xDe9Dc1eg1+RvEwG3wQ0x5Ec1lpEJEcLuWd +AKexD0ipiUIcs4BmI72oVyDFtXX+5iPI2rjU9Vr+H5CjRR1F+3yUTVgeZ6x4eoTeH69zdIGBPcaU +ve9MGDePf/goi1X4aIOI7aq5c0y3/ZfBlN9TCuV6162cdL00RhLsI4u55A66+/dCzrlkTqjG2bPQ +9WAcwPW31YhmQ3zWQjhxvhLdM9sEaEG3zNOvxYQrgFHC0+acNBYehDOoaqzPnhUYqqBjgeFpqpR2 +RTsVppX0EPuqQPxq9nRdeKwjVJRgi+V1tEQTp+3PFKqzzHCLpLDzkHpAkWLwy2RlLccNni/VIKdN +i//Xx6Zd80RcPyHUTLSGtYO0XlCdPteNLwKur6gZx16YlkOw4ASsVC+l/uGdmh/sa05C4u3BLAd1 +bGRn4UJMxnuvL7Ymjb9cTnHl+u8LD8/glrBB9R5puemVB2ycelFudFFIYNStcZwPD9qwNejh9Jew +RKyKjxXt3TwPh0AXuKRO8NLooC8kdc68ErcAGAPFQ0Z/h+AtkIKhd0Hi3aKocMCW3V2oDMnGteO+ +bO03j+ndxK3aih7HHN0dahkZlR5Zhy/QtQdwt4obisTxlo1JAmeHsxNHWSbgxUYtm40TdY6J6JzS +7gONiuro6C5OTM7/2GS1GquYCOsenpBLXh2bJc/u6iuUDnu8yFHZdsKo8VkOO0adA7a1/xtLFPG1 +nj7fKK8wOKhHJqOx/5H8/aanyWFiM+ne8K+J1ubNiqDksTL42aTGZmwOAWHZzuPr/mbbSuPN30Sp +a3KNdJcBVaSppXS+/VLET5Dapg8vdP8SiynqbrAqtSGamxKPYgy7CPTXOFHJED3J6uooT+4OcPA1 +XCDcQDs6P0p0DwPQjlY78m0O06IB6Q0c5mFC2kzSu4QKpZitWQJV+Tr4C55mSKRw6UfY/VAXECaG +aZ2q8ySVHVPpICYejnBRApuVaBRHY3SQV9gmvoeK7iF7EedqdfjuA/VPfiDtfDWp3BVaUplC7lbt +KJHNnDd+ExgrO0taQN8yDsvyvpiYh5AdASSuKoK+dr9fqcf6sza9PLMSih0I6e9Ch/QnlOrQOj+U +3PD52uPV5MZWAMFYDR0MGhV0TC3F2SjkJ3Ibt7OVpt8Skl5NUJw9HblSxELSwVreepWZ1d/KtTDe +9a8YJkljUP414n7g7KP9YmLmEOvzyCYvDUti1ug9W+MM1e3lk0RXF/uz/QlSStGF57sYPhAkDw7Z +j42zqvIMJmXAd4Z4rHP8J0CCRjkLW4TOyog/yH46qz7uTfR92CW3yRZZa6+pNrn6SG3YlSSAt5No +8isSl8k6Lb89Ax6K7SudyYCZ9FRs3qKhZQkvMc6IdTNheMewOA7l7HGd6S5yd4R3/PdigwOrf0Bu +OPpCmUyW0RBsdZGb+eSFyvdWEbWLu3j3pj4BnBMnmx67T0VIWqOCYfKqioD/FJnYU7/6rlFhcWiM +SssEGav721ZX9zIs4MmwdFL+vpePHNCbtOmKAIpYxR/TBofxdwuafeY3soro+hFhmXuvmjIwwS1b +KqNkrJpsz0MFuhFaoBHLwHLbdRuggWKe/SIL5H+IlCIOtyGo++0Krt7oUt9BTv1ctsDGEpSb6NCO +ndPleglDVpF6sfjVElaHJsAj2syfCyq7PmDPZCRzLz/JBozgCJ0P5lZS8UfBG/gT/8w09F/jIeWd +Z3cB28X4/X6/zZtltFLSKSHf3cXv0FmAK9/wUyapHuNf6FEUG6/Qg0w3uzDSYtQRDXzEIsJPqLTw +ZOnXC1CdOE5C1ubH49RI3HTO010t5xIMP4Dq9BM/fFRV60jjussEDgSxhTfMk56nxnB1ZIIBBuTq +wBz2f2Mde2PhIdASAm0ofvq/kci9691iu9W/rVCBwtzoLzGDxUp/CgwQxhVAlF/WvVHgI1DRbrkR ++q8VJHsqfgD18pCXoq+MCsfX3lus0E4lIV3Cvn9CAAmWNfqTHGCJAdzMSnfOZR/+SSLwvbrk8jN6 +g5Ho/2QZdfuohm7NkOrAQQ15+2aMG4u0vtQ3zcl5oUqykC6ckbWJMahv7Lf2HY3tG7zTgI+6fA9w +ULEi7PaGU5KEbvQhUcoTZLkq7zT00iBibtJKMxi4EZrwUaOqUfrUMLo2XdJ75kt/y+QmBV5qCbHJ +QX1c2w9iZhLPHqzhp800xqti74K1Re6GC/m6sV+q2gw/lNz4QSNgGGYLZ7xDagZOlB8d5Dx1lC4i +Jgj45DANK7VwV4HPw8CnjfQVJbNxBo9uMNYYj7BKObhH+Te6LRo+g9Guk8ajCdWLXjD6QyGhV2ja +NwsmKzfWeoCU6OO/nFzguMyKnGltNVctnn2USyBAYFckt3QEa8gKXqeepyb/JSyHvZbkEEXYRtaN +Sm/4Q3s+TDTwag9uioybHT6w8WI2QqAzwJb+qyGuQqgrtBr51rRFASzCJ9JqPFyTSoD8YnX2mk0D +Cpu2Y/p4gEW34YvxCIYW8skVo3wtx4l4NxerOYHd6XDQ+JW3eg3+LglEy9avjGz8gYXqy+kRvia1 +l5FQqFmO5v2FRHG2aTRXGuM3x0I+CPDvssqW0CCgEtLahlMMZMGUUwxS4WkQOCVA+CVYJDFf9T3l +QPpdxHUpUqD74iJsTDDMUIFHUeqBrsofm0+AIHiNqpFE/gayHOptFyTiFLsRIFugqZkVLnWRmZ5R +fnqNCIUA6Yg0WV7Egti/VlCNJtSmQZaKK6GCkAY/Ob397hMnoIFbCdW6C88996gsj/oDxNX3uwJ6 +S0JjESAmZYf0mSGjNFi4wrWOuxo0b+4SGOQlLO5Pq5pGFKTJ+9VDs9HJZtXXH74cFfHOhJyxjaDe +v0BK0GKa6D4xV+Te/BsD9c7/vn0z/CSkb+LW38mWd6jlsEdbBrKgW7R18AISbdf11jUv+sZsQ94m +W8StQAwnodek17FUrKLCCSkqDQv7lUSl9cJ6UZ/glM8J28mMBqWW5m89mteWXnRin1P/oo+qUcnC ++0QKz60xPKe0GpbMM2W8rWfdAyadphVRoVZrHK1HyI4lcahcYOsJdWf1hFeycsIV1x+/mKTPAgz9 +If1DclPfHOFgOmC9PJblrjR92x8AOlpd+8ywCaNf6ZFKAuDNn6veaK/mPfgq0IXhok/hEJBISrR1 +14LTv5wIAJvjFTLZmu+wQm3CKiqeG4Ko4xfrT0f5hfXJazI1mkYshn2X+dfVULK5aGtAoHSfRnrr +gxtbGQYLNwTKhBWK0UCyhnLnYL2gp50rqcPBViOxs2NIiuPerXCTwMr4YC+/s808lV5o1dW3MYYE +PMmhFmT7kAYnSNSY7ndMwGU/NyT9GyiNfwPugfQP8GYxArPpFn4v0wZKXhTxi1dP4rIyUwklwzGo +KoAM+NbB81KLvVmpEQk18N/txWArrrpbcTzZrROTXKZtwiB9CkBS3KN63XKNB0/hpiyUZ2iTcDcW +FXSOmtU4I6Sex68s2rWWQz5wTjNUp4rq0SF9nAL2znYBTpo6D5bicb3OMuHBHKfTJP4s8lSgmxF3 +3BfGLkX8nXGGpEnpK2I5tMsr24AVlZPPHphgBXbD88AOUPgoPLSdBnxox15Sg8NIAjPA9soMy8vv +jEii84DJ3bOlRj23S+DIhVBSAIyNSLDwIn4tyeDxOH1gucUlNgG9opmFOVWm7IILrNHzQXYC15so +UHSpu+5jpyIG+rLRQDaWjY6xgg63wc4WwEytcKAFjDvuKn0qagVYG0D5MNxI8hDf8I4AhcBu2SKx +p8EChpQyAx7VejSj6XAJGophqxlQpD2roUv39tPbzdr1haEieSoKsH8yKPP3ums6kyi3jKOXQMaD +8qT8u4Pu66/AKszj+jXbGhC8VvUa+vGUN8v8X50fyafYIqN6YtBZwbauPPNo6+jeD8A6PKHk3dXL +5WIPHjHwAUWgn41MgdHh2EK62ZbmdEkuqQsD7RbSN4eUSkhBHluPGXZT2sESrBsb68JH/v83CjQC +6eNoeLtg4HVEYAyzvmvWnFzM71xYpoujVnDVEsnOdsFoYNvbb3FZkBmfV35wZ5uG+R/wcYGo0Uaw +JZ7MvwwhgMLK1c6KI0KF0aw54h62I4w3FD0nsJfXZGJ2Sm0k4Ni2cw6JsMFrnbG3/300pUzT7W9z +aaef0Ledph0Ixdm9O1AAU7f1U062eiDqadjcWc/CrL0vWmiVMDb5svn7iBCn4TdM5Q2jVTSICAJl +7P+GQ7fwK6wEeODv9Lk60hqtO/rY22HVb9PSysNTQ0mGMrz3D9WqcnR5OyZRKgluTbSUTfeiFnil +hbrEz9+R/6YjtTzgRHJW09xqvumtKNNOUxpW2HskUyfQuksKSDSWqnmixbplrFSzbC6gtOcPRJdg +2Y5O6vLfADr1WPY2dWwBzPtGwo9zriXt6wxRKMrZA5XedWoRFuMYgFrXVbjXJBY7Og6fJ3faASyI +7HWHGLBB9FVU+SoTg3LQ+KJ7VSrMME2n7bHmOcIc3sDFCmrNB4bzFukmR6gk5HBVCYVdYy7Hjeaj +c/OZZRpKdvV8GDFM1cpgN3Vm6TgCIi94nIRAMQwbdu7GOqSWcOWepq9PnMYKJ/Rk3bna7U9Wr7GT +FlUTfW7xlnqUVibBpJuN6YRDnYOii2aUTLE4/nplcccqEJCEiF81G4TLEUXGFOG+1gxKf3/gXvKp +9iNktYOL+QqLxvgHnXXgxVPsh6cNexWSqPsENbDgmCwkHnzJrskBNYcyaZHT0ioiogHE4gX536VJ +s+oJ7WeAzMiyfQnVxcJFfG+1xesGTdycoqQXJgr9rCXQqwI4AEsDbbFiv8jKuvFQNmT7q0tbY9L6 +H5TT5io6NLGvF+YaqvQ5tSrVyz+8Cwiv3j/fhzONOd3POvMynJW4+8M56jdgpJfbUT5TeUu9Nace +LHbnRwidpTQ+myyYvp90jYuWuh8MgEf3OuAts+6AfR0kq2xI25bnMzGGtDWaaq/IOp+XLIFLEOGN +4fNnY6nmaIU7MFv5ri4btgQSRNyiYFDpLEoJ++1n1ByafURr21j+Ocecn/0ss3/0t/++B95Qn9Wl +zq0+NzMMNQu0BXUjFUxEYUzERZN5MkDpVXEirDgJC+P1YgBUwvOmJ3kCHKcRXg37BLuBBGvdV8Kt +hDCJYKPLBMwQh8SJDDCPkn4465hYAub5kOySRvCyCsBu0B+4u7/r6BtE1gjbV6CUwfr1HDOy1IS/ +tlV0glGj5WO7WF59r8mLNrdRtS+TvRaz8/05GzG7tmT192h6TbE+2GaVY0Rma4HaDeKJGZbV76M9 +Ee4XDuOtrL3yT1Z7sWCC7Egejhhu+xeYRqCZocYNcRZgNemIPLdNc9b8Nl4tWgEy9D436045EQtT +HD0j2UuZeyOAIsSAptBdVSKtEkP+xT6vVTd/8aQIiwqJ/MyJscU5NByBgI8GVSz5BYo6woSzwin1 +U/yNe7tRe6ncmt2ErVfR8ma3QUkdjJc9kYQdQrfJPfn68uph0e3j94Be3htozWi5vCicLRS+7S0e +3JPndwYS20BLp/xg8C0O7DgfwpZDUCa85gw+uVAjTb7Z9JPeRYtNIIVtt8boGzLlh870wJFDN0Ko +g9ZzcCJyjWTvLXJ770qD9Q64JcQGcfmD8e/UH26FQBPvwWaZ9nHhv9AmCnXQVW4E3vd8WhjFkqxT +WIuM4AyNGfx4hQJT0/wPpMUyrs3szYrUt3PERg9VRKRiALwTb5iqRqdyjQOgqw1Sjjsumqkpijme +npGo1IUw6Q+PCGASsBZ7WjwgN6R9H997MXcZVxfsP8QxzCHWVQ00nXDTX/Oe++r0JuEbuWhbFm+o +UURzcJ9xad1KeBSJQu6W3Sfo4/D0F4ikeFVHCP+KleLGmuWyi1TTngkvSEyeUUCOhhlLNIeClyPK +N9UB1R1XHNgpHTOZoAxiL3OzBXbffW1DY5Rf15D0oPa3EsyRL7HD/fkh+pKVssTpsU3Z50VByi4p +TuxcJMaoWSlMfBkJJT8GBp+ouGk9qpsFv8CC2ZinsUDmB+GGUeArFc5zBm/5gsx98pgZEiSi8RU2 +itNqoOECMQu/28LmOUEStgr+yFAQiU3IdWaT+LVuW7tosr2aXWrHyron3NBsDYEJUyHlOFBn66Fc +vhu1JNQqH1QVxq3DUhEh6KgwsKHgzmVlLhWxUrJz0+QvDrbY7He6bS31UFx2R/cyhVwdif0NkI2e +alUpceVyMokvw7DWtAVzGFHDYuAv3k1xQYwyizgWq0/dFHaUT/UUagro4fK2jPVVlThgIGzLrdhX +/g+3YErX34IidrbVV7AJuJGcn28qLAz/PUJ6Rfqgpms0CCahByXTCgWR41/LW0MI+XruK5BMINae +gwT6wULkfzLmy6CBYLslibHQPbRUxkAOOxXsq0I2JcWg+GY/laRE6Upl5gENMrj25OWYQYpPPGvq +oSjGgfEGecyqRPxRmkPItPmpVi2Nc/XScRhWk/R1dk0UMi2o1ll32xOQZFrdKgCWaEDnyuGsDlmT +bk6lCRmJg2cKsqCnozatXw20oOi4jFllMLvGKU4lAAf0bPuYNfACoPGn+aFV5QtvrKgEQfGny/JX +AHhovCnpsQUptB0Ikr16YKt8aI1+sC1R7o9R86pASWzlSC1WH+gugQe/BeNm4UppqC/bPlH/Ixrt +PzrNl+4ZzEaM0mrRamFFMuV2tiYDuWOA4jdanZYB11SIuFFKYo5YjNNmtJx6xpKhN24293bvA6eu +jxmRikVcx75oBfPad2206s6ptUcc1zGMPshAAZATosKTXnRUf20/WjYTxL655cYl3CnCO46ETc9m +oCEJ+K3gYQ8PCkAUbZHuSyB2JaHGWQtO9Wcei91F28PoJ86HVBu1EHrFnJpHOhoTFNa0PvlfhTd2 +xjFSXJgihQTd8cjkQJdCfZiLuL28enGNgunnTQTJlke58HDaFAqywg0OGBfY4YU/CsToLVQKaU3d +VPtRCtbWEUrouq724FRPWGyofAZR8FDnkmnZ2rksJI2dq+epOieKnPMhf+XUy69bWj4i0aEFmwaH +607AtYSIKucX/K/ckoA8aV08mz/acwc5zFL1Ho3RFOkeZXOTI2B9WtDeiQKtJg8pxODonRrzPpSl +74C5MEvR74sQnnEUL9F3/RBjKDLx8XVVEF+F0mbE2UeVG7xUIf6mzQB9eOYlxOcii/mc27M1rkhZ +efI7U08TDhb3yhL7hNYoTMcb0di1/bEGvVUjf7J6Y69XneZ2NMHWFYXLF28vqnYXaGT/3wZCRf8r +KUfz48wM1u3sH4/N9lvJOFFm6WIHRygnRO67NH53URz5h8FA9H7R+A6bErsz7VqhBI3E4Fg9MDVV +ixanJakwNzNSznd6ScsMUB+2AEJ9FO2LM+UVeCmf8oSEqWXO2NqwopzqWFTIYbVj72dZUDSC0gCm +u5G3YIAJfKZExHDPxV+1SMqJUMpcaUot5SsEkF2jsRWZoaiK0AOmVWDTm/xldibZpYNInBM4uiNm +qjg3UBB+RADkQ2EUKqn8hgGEHQt53lr6ZqN+wuBN5PE1ZvWLZEreokxUV56y4wUGpFPjTzWpOfFD +mLXh/U9Z6NuTSp2srzGib++pWcg9tLlCi4smAEaDhYOcorD5VjzhePl1mNvlPzGgdf/+l0AHOa+7 +hLThFq7KegRXerCbSTh7N8iQEucZRbLrbJCBW9MQ5YE5s1wm7dHkrJY8Tl18mBM/4pgsH6Nv7QKa +kNlLKeuWB5U2ZLNTbHDoIP6OIzjJDW8E4o7iwQNoqF1d7G54OtEFnxawH+KdsGg2AohQfpz+DzMN +RZCZDcwgiynRQksjpr2r167b7eyfoWqHQogHe7JSBYd1HBpQRar6NVRaGPgVctMRcq7dmiBjclMO +sGS4NrNQuh7po5uLZNaAAyFW4O6iLzSdjIUz8g/Nf8u+spdbPzt0fv11f/7SgdnUGT04mcvKJyXg +4YHbrO8T0QSlYsENhh1OQ+X8bTo1m4uYKUSlTOLoqCeOyLYB3v1/6NQhK6t4sSvYSfL4J6Yy8dMy +rWln0fLnv/SiYaG8+iw+mCoeZluYazERlXzVNumFfbdVhEjEEw9ceevcXkloEE9oHckWZTZfDF33 +yVcE2RZrQOHKtCayKb5L4cQdX8YDzmxLRm97WvQusX3uW0iJHfSL4l3aqc39nFq2LoHreaF3TNNh +n3AIADjW8D5p8gSi9E9EE3kc2vPtywvbiuVtyJcx8psA+BZ7r0v4/zESQ4uP84X1hriy+WiZPpX0 +amlwV4+lJ7MzKOPgy1zyP+Ydqzi0TUFejq0LA2k9ujJNrGaoCjTgUdMX547cZB6/VDXUU7OBwfGS +yFW3Hl4Y33SUG476aOrRlZtGy4caLexaWbIO/LRssGfzHK5MWJXC4LxOzzO57z8wbCMVElknsZwC +QK9hBzZBgXpZDHEZ6hFnUf2kWB8evUW3Ai643Ym9C+eP7ESOkSPZrvK31lHfL6ENj57yMm0MAUPF +ZJjRq7EcCHfLSJNCxRyk8tn1G3pXUGWKkrMWbQpvCmtDKWp4Lb/uwpnIU/S+P30K+pjsCPK074go +yxIVuS7aXJoB79gMpeA1pK+ue5x1MYJxl/o09b5EEpSCLbDD1aOFNoDhm+XFvR2IxlhsNXEX0HRr +uHoDBgyN0Am08Ljo4mMUcpsVdwLSzF11Y9PuqMhEwhBMuSUjB2uHo3+5srzMkYVCtHLudEKBMFd4 +OhGJLJdgtWKy6lENwo2HNktl4Xm8bcq52A5xzFtHEBJaGWlUq5Fa99gTM1/EWnUzjS3LuFTUsv7v +pi7BuRFDkIVE3ezMCQqfKRB1PshBk47MJIb1frT46sWAxWiNcX/VLMRS4l5q+1htWfkva1Bo7f0T +57izJyHoue6whbwXm5089YFyu76yJ6rYGFnIJybVWje5qXP9g/oAyqAwYjSHXKSqV7TBEba6Yd9U +r5KiBN2PvUz5ziMnDG4a4QD+EuhvNDGObFpIKoUBN+4jCT0tfMIoUrC5nyQq5qaKhMJStIW0S2Ps +gwdr0IL8feYfAtL7+FDVW8kh+v6WFAk18X15m1U36Y5zTb1eUkAF5rCdcBvBsNTCdb2MhGo1/BkV +lHBLhxrBaFilTLGcvU/DAF1fH+AiTBIkM8Sip8DT15JcTzcOTu66s1xCn7Tvk1Oh07fG6IsyPisj +aHfjNgs0V4nJY7LFActdSE5CMEfm3q8LUkPlHindI2/zFyxjyoqMg7hps9CpEtyoAUe/4Moz5rbe +hjBfK+SeKlvLhiAEj/v9xWddsKP/oIQHwXYF3ZG/06VYiI2m3DVZiGk3UPrlmbe5YwEKLk9UHIUi +gYgePCPbqq4dKjRHbiUZwmAm7QHqf0QJ2u55VIRQmV0WoO1KvV2shwnENnG6VUiS9vQCg2I5alne +AsulfEbVnbGaOTsZQRgik09f68QuPS89T5NFbYY2mmvhmji186r5/qbUdkHcckIf6KSBdEZvemVs +okL9Xq9jowQ4Yq6WiA3fE0NQqo8fUgzX6/P+dm8MBqNeqg2eNMntVvYvUQUBbvYA0/fjrIySHWs+ +AJMSz6FnIrxsV4tPdpHJjVXG0Kwh97at1fsz6i7v/eQTBCaHlmVdYFYkqqz9mKVCXSLnnyhAA5CX +TnM96UpIu3s4iUvhvtT/fOBst8H+tIOzipLWLP+c5/c6YcuHwPwJPAiX/fP/RS9LAZAnKoO4XW/Z +JEXUqfw9ePeNjkRU8bRb3LO/ISschaIcGkPSqrk3a3roy5uJivchrnuUrjEw56V2Qosb4elsRnUi +bSmkEKq2dPD8e7YxF3OaYG/njKeoae2iUI7d93q8dAJT+srMDnqQU8/MUBNKVQw1lVfa197/gFL2 +m97BKgYagfkwUF8PmsYsI9ABqotWqofi0sesTIYDy0gtVBGjZbcKFMEkbevkdaO0Bjp6sS8lrlKx +6B0G6s42wEPN7qKCuano4zblmBLXnyknoR/jpD4T/th39RuTmTkEZcVWEblc6VuMkEZe4WC+2I0H +VkA1YS5MB6AFQ4cDBFHtaPVUcZCU4gZohCzE3jKWCCQnPCHXLKdL5+XtDImgJZrGCF5xXC7geHbs +pN6he6N1+noBUhW/aD9irZuGNpMyx/q1KrR5E86Jqvm8y0D6AOHb2FDejgCOGsAcUsY81KONeGDu +F3eYN8G0e0kI/LRMKQZr2mlF0GwvdSkHk0kJOL4b8kRVdALTglxS14pXx7qvgBpQ784TYNI93jxO +2YOebIQDHaSPk9FjZu2Wh+VNvlR786rbo6C2XvsKE8f6Tb+KD4NANKBQGaCsEBJhUbNSVU5vcdLG +F5TYKeCqDnbSCOyH7b6iXZ5s8V/WVXhA+x/MjCkhmM4rtKt6N070WrfMiAUmd/sOdMcwgzUqHk4d +YrBUR1+HXfU5DSe+pA1MoHvyIZkSMeaZ17iPmbsOAgo/wZSQEXWgEaJRMDJfhO1luKQN8/56fYQ5 +k8z89HMiEMMmzUDUFekMdYCMklOrLJABnuNERdCCDz2UKGEQcWIQJQ4wpDptKwMmny/hOrhTS4t2 +llB+I0a4Wr87s/Hmj82P724koQXEUXMxnG5rr1v8PP9xyX0XUdTewR6zhrdEkvNFF/02An95iKea +pFroGkZjTaacWvBbe3JoSa+ZA5lw0V2SjEr90GfT0Py43JDR7mGFY0bBUdExuKE5ZUBpRSvs92oj +jmaV+MIJ6eCNFTapXAh0IMmn3VwRpm81H6j0bF9NJdtyKqXE4evye1maQcTHzIZhlzLVt/cgT8QM +y5qbUiNDRM6nSGYziRtrCeV+sJjgI2YgWpzqMbSaC/19fF4Xbk59qGQekbpsy/5HTJH5JRNjVmR3 +lf+1UQkFtVnsvKCcU+vRBlY1bdAT3C3TpndOzOeRLceeYOYuf4zyPjpUwdtRjdLyGrGn79pj3r0P +53VALT9vmHI4cDohi4xL+ueqUCEjAuKQjnTkyQlKchOKwRzjoyAGAA2c7idc4uIynbQP0ZhbPmjU +Hfoc8oNb2yp1NrnWS7StQWg2se7K7MBEvdx+uUyLKY6XUfKoOnnAGvEOWQHdWlYB5W9z5SWnEOJO +TEXHcV81lriGIrK+V/4QvRa6UB2oF+nSgrGg5YCqOlU9G/R0axYOfMtipUHJw3AZUXWPxTV2GHIB +yZVzIbhL9qccpa7iI8UAn4KENfgsRK4MQyZrI2Iq/2c/mCMM0x1wTARF3r4tYQW+ieTjQaQf5E9v +EaQMvKD8qPc5688MYdc/93LC67vC88W/QBiQnA1aYin1FW5xRDfJX2exur1I/zLjeHjcbIuIizc9 +IlxZWvgNfamXCPR4XLjhlCW69efR/vuoqORLfDsNIyzPyZ5RvYbDuYhMVHYZy2qaC/za3f5LWDwJ +Cr8s+X+LtNxAcLRcp8g/n3g9PQsHMtccgxOnGfgjk9asWbcwHL/l31aj5EoH4XMHNIm8MKYlCitm +62l/tWC1eMNnEEy1aEzwcnhBnNWXq7LMwXszbraJLIIpm7u3Gbbfto9Hrg5UzGxWyHCjjOcgB201 +x4Pg4zOAQOaDqXYa4VM1xu0PyNEpf/OS2FiBautP3t7qb29N4HplAgD1szJGoo3n2jq/5FtXfuDp +49sn0zufWujGmNOkvBObVHDQpgG5tySY1VgbhE/vKKdniQoDX+fWFazQ2r3FnvwXyTt9/K60KcLW +T8wUwSnFu6xc0CCwbIIynumgPVHu03e5mYAMpmY3ulY6ikYw/XwdC6f06Ar2qxj+Qdj4ohEIk6tw +NuTk0OksaSixxm8Q9hljdTJ64z5KFa88RIy6joA7jj+EvVM5Pfz3zbfMRdKyEFs9zoENp2wTydu6 +dykcI9QNRZUfppvOZKbGEJAq/+QeMQDXirooUl4XSC1deQYTHqaOArFSJiIci9sdEu4T2dblT9DQ +kt5F0yoKqhd1xxBH1ptNG1rWZjMqcdwibISUaShVKrJT4ERqFeroLeolfyBgYkWBM5ttG6UrfbzG +SWnQo9w9DhWvaXtCMcZVySyAAWjQ2P8+drV7QDUX5a4O+g7uO4hv38hbxF7C1zLSfMUE9gQ/+nvM +tBIUs40qJ5s7x+W0X/CUxzndF77Dn0OcaSUi3xjLtb5xymmn6JgXPbiQkrxpzyGdmPM/m703UVzD +4Ptd9IUHklVehfJIUdzPJtnI32u3ipMuZPUsTP1JdMRGaEwKrybDqmz5KMTR/HdzIMWWEFsgU/v/ +WN0e5nci/IIsz9GuUh5v1lFWsdKHlpOPhTOo7IoeqzefT3UXK0eJFtbthwhgi6KhYn1r4jXQgBXP +7Fd5cS3LA4ADxtHJrmhdFKfiPuh5E1xERofqN/DK4AX2Ow77kvuHrh1Fmkc0whFaBOc5ZpTkzAfy +nSRda2fHZkFuyeZFQjHSK8PlhFBy+zKOUw5obPWKJHMK9CeC7KjhE/17Z515HvBhc+BzILlg/Jjn +n+HUrdHwcOtKlJkb6DgG0VXw+fklayDHNMQrReUQoXfVCVGUF0m38cldT8Bq+pAJHnJe2a5UWPLI +cbXwnVhRTSNuIPbAGSOuh2yBRqlCpiPsOPBxOjrkqMEsP9X4XTbs3iBR1JhVGIEivOPcihT8QSF+ +RLZTkaN+sjF3C68D/fq6f4cUl2c0p/HJIB5tS/klqFe5Cv4hpGvKxn0Q1cMJxxqRVoxDNiojzh3m +E0ybIARkNXgjvtrXm8r2StxOlC7n7lHOy3FdZSzW/r5c0DAsDw4PEaphRcvkM+ekLl7iH87FLOih +xahLnCCXPAEva8Y3CYt6Bq7/xjuYpYQLhgu7HRMHRRL2ZURVP66jub7R0aXZnGlciov5fGDJA44R +hXuN7KhuFlfnKN+VIuf3+Vx9tY+OllOmXuUvXkK/BY/tjQbFrJ+GFdv7XiF9GKrGc13VY9sObvRH +oOBARyrPATYLY+yVc2PXZlIs8TrAN668fCu9pNMiWldkL3pBiJWZZkZW5TbWwlpyF25jWH7oQwQt +JRxm2RXFeG905I0NVJvfUIlkdB/2LkYEB1ZWnQ0arC6zMYLgKLxuNHdVCdTJqo5v1260Tqd++UYh +n8k93F2sRwyyTvTlK7wLG4DQhSagItVax/xqL91UmmNDnRz8agKSautYKolWACEjGI0TW3856UGo +pQwC1Ou4BENOeCcyPanaE5CkB7mJrRuivUG2WnrmqEWf9f0LfDE65C75GEq8m6f0ex9hOiI01QY/ +H29M8Sbn1BEZ+qax1AtxwTZjLErhyeyZ6hIjW5E1ee3zDQnPun8IySvNF6D8NLmeOu/CgYlmLSZy +1NtwUJ+DQIIYxaAHhOmp1YMnzI5XfdYtUuOpPuRbYUmJ38n16OHdVjpFk8sKVhJjjDX4qMV1M/6e +23sJMWJcSuLJNGJfUEVm+ReeYWyC5zmoC5NlyzFrKpXF1JPH6J+qrtPcYknC22/swOg1QrWJ909y +/qnJfwLLLLSmUhld09vbK1wT/dlws+lY9fN09hea3K1sfcN8ER77rDGzfDswIBIlGlscljGxHDJt +UR9qUYOU2EBqFe1hadolRUepVqincKLu8S+Efd9Pp+6Z3nzDKMBi8wKehLwmmWbne2HvdiZA2Jw1 +EYsiLEXmQRpr5bMYygOr52q+7Cr86onvVnnaLQR1dAfdXEu9zdhfp31OccS3haWkRt4d/P5vDiYj +jIKjl2tJqPEymYspAdGJhNi8H29t3FZvEjNR/Foos5bp26AUpWcGXGUd1T+Mw2XcMEJi0fv4Z0W2 +AOlScJ8BuxyaBF5TV27hMZEGUGlmuNUYmWPTF8fjoeSekjjHvtaW/JxsEMsx10eBS8QvRJk/Hyl6 +M9ghknm9CqwP3rBeIylydQnIIs2pF9PIPa/+6M7rlFmkfMte9hvBEUVNdIUUyJhq9iE76dgk0CNe +96Q5lhArUGz9vCozV6hzx0rRZsJ4vJeeWYUwh/xlZMVBQw7QQRru7qqnSpOk12TZBowGv7Zon+b8 +T9P4crY49wz1SeKd/CLn4NffKbyb2wLH/s/jT2VKBZR/rokqOTlmuxulhV6jFjVEv3hV4PuvPbxb +CDTKBDD9k72A+YQVt77rGTZ4BL+cCTZJ/LEXpO4eo4Thga/4ZuDtNZ0LfxZ0tnYi513NC++B1DwZ +zys6UIC5oluTpDk3rXmjSk7HOhOq6e+ELQHdKCm1N/+nXc4J5RM0caZmo5p5UgAwZyk48o4I+gRe +dMrJCbMkZIoJB+xVYNdhWa8fNHgPfnpO4JWD4qIQ560QbzsthnOY9jghjEQXxqu3sMiZiEOME1pL +koWidC2E0XK7gO1b6uLi9/wmj6F1XoPC9yrtCxdJCdA8FOIZphLwcnzxvSnZuQTMrN4WsotjY4xb +AGfqlr10/Ftgtu3C4315W4q/voKK1p4M6eMG2Tohvv3XZLEsPVe4J2hO9ntd1U9IuLS2dOK3RVnP +KA6XezLYxaPyKde0sLWSbjBhxtui1qh9U5Tdc/kv/OW+fE1mH3mK2phPtQtvLKyLgjk9vnJt8dBf +3gOAPDeixUj7p4JlpdjeD2EMsYdiAP/zfNNgx8tC4MJsy0n7+s4TV6PR2uLI732mNvMHwpi6ePfm +kBTkE6UwxJIJCGSBpMWjV55azsUe6eW4sGgzhaGaLOI/E+8GZ16J/1mokhvQt16eLJrRWTKlJCSv +p/9V6jV5gr/JCrOn7knfe6sUNcjRzJPrGVZFTQY78hOgzt03EBswAys6txFxWrdexiGzKe7eKBuM +SiFz/JGgMlh1obA14HiBxsNJP+jHlL5xjjTPFvakc89bybXlD6k+oFWfst5GhQQEj3X3dNDt9toL +xHwgyzJz15p1hJVY1kD0F3wXKMmD2+s7OF5xmzWUGsa8hRHxopgMMl85NwHy78TvDKC61I3WGokb +cgkBxIUlWFfWoDwva/QOc0nzGNWu3ISGBsJrigo48xlAQsnKcwDW4u7AP/yLUvoBZqbVfmF+25yl +SSu+F00ahQ04b59cdz95GjsNRjGcRRlcfvz77qfIQgNxXfrHEfRsdoPoW1m5WKSV2lCLCU9qn2az +LbE7bzJ9eZ8s+B/62sZc02ArWwAUWoeRPTgWl/yuxyK+IyHDwvIgOxLSzsX1/+A1sNugt6I8IGZ0 +cOBD+eNd2gBnQLyFpgBlFls7gqNrvama5hSkaA8M7NIs53Wq+8xFqI+tTA5NY9bpqAsTJURaC+aC +KzVOKNTUFqao+yOONIoFBHAgbQ8dl+KWZjR9fRx+rOfFzmgxDgJqeUzNpzGLd4m+6UF4vMfBV4zU +s1pFMxNJt+4gGdU63uaeKOeh/zM9iMKW1oiXostARFYY3jY7KnNsbguwiN46FdaHf3yMmphHcOQy +JDxJ+c3b/e2xST0DRUDTEXGbhirXdX05s1tZFb0EnUfcbZ3p4YVWGyg4QmoGZmpS4JX+PIxPM7R5 +0HsZH11MTF/OOiMbCVQRHFcu4EgR5X3Ww13Yhfcfkjb7YxcUJ4Jvc85d0aizdn+ZEIc0S04nHhjp +jXgWloK+9WuDtJEgobFAcU3Tf/pDZhGMmM+as7X8UO7E0l0p5xHKk9EuLD6U4RdbbLX+k7dJ6xwE ++bYmyCMjezZM44U56wFVXGWhGlW+reA3zKa0GilAWIhy2BbrvL/ZhRPcGOGgS25/BrT/w3lYZbvl +k+nnOXDWfITyHYTUNf7J2Vava5cFS5vqkALV/ezuGuOL3RbCJiBngZG3RxchVzG7M7h4TQdDZDf5 +yDjAWyunDPa0FLjf4gTzLCqw1VJ55iJEWYuHrj1pkF57tr1vfggWcfNzsrm/NrlSXQZHKXHYzFk5 +k9BeFAMAiyEBiInV6b8JpOToiZgmHhx+W82AiShKDwjNKL2mK+TxRvpAD3NVDzWzQjz8f/U+B/KQ +0UtSq1KHOpDqbOb4mW22tTR5s/epA09oj893mzRT+0diKFY9LTxbwp2Jo/M4xu1a/FSbanM3rk1x +OM0WcfPwOcwK0RpDbeYqoTt/SpdqzRj/Kgb7uTOu8v3QaLuaRYZs9we8GHR3O6Zu1xtec1CnX7/0 +oXe+hkXNV4olN2NDjX5bFJiASA6IKIWT2BRsjPEQ8YFsg7AipMXZ9YKSwC0ps8zQNyoAZsuCUWx5 +X8yCEOkQKyeXqt6BgvUcUFFanXa+q/XtMRVSLtfgHjp1BKktOQ01/OypyA1TUzyNuDul2dFZOfZ4 +xajoT/E0vFDFtPIWqxtvKZr9RXeJeFIt5PGec0xSt+9O0CCCHkEoBuA7G1z3bzze7AmNiy6YkOMI +6AxabKGvbbQhcRvcTNrdLhfe3zMnMRtwYqlHQYbYQ9zW96M/JBuq9jVUE99c4v545KYN6paMy9Q8 +/6D4JLbDxHQZgNdCaLtMmhKJqefH5lw1xe4Z0RKTJdYnTGBMm4bJT3R4i703SzjyW/MoLDH3wQYh +7rB6Q8M2NamipCTi+jfXJDJKE1BFsmtl0zXHysx7Kx65dl4W0/Mgf9GYkzzdUhXl9rYqqpFOKe6g +zpA6Gq+Rm2MvVMF/W2feThjJ7GQ+tSncY3pOHCvNYjZR3o1oSDV4gGMnHHGOF0kcFxoHl4umIXgp +LjCCCt6VQA6CPZvx+AtY503sa9WHnsROJ5obJIvNN1go7dMc9ZN/n1dKvGvBfPntSDH9ca+lKAan +wocPcckUHgrEmbMyYXH/B4QcqIhz+3Aab1EkMbFCcQnLtejSrnhPRy258Yp6POaIbOVXPh+lWnfG +sJLDWRnnzEaTmenrHTGRQT9/UFzCH7NPSBnuvVip9FzydlqNI31+5lcQVkUATxTneTB4Xv+f2NLN +96x+/eQPDxMzyOdF6QmgpWRTG4kTy6zwqYWg/9CvHlPH6761fTnHqXi5cdThV3Jt31aAQB1S7w3v +C63QiYEYVmv4uPHesUdKOf1I6CeV6HS1I/XGQituPweqYJlioIeJPY4Q8KYX+VuDSg7ZhKFWa57E +4zStzUE1XtNNQ+v0Z9vP0PM8rGNpIQKQ/ChIiZ6+gZ6uf+gnEM6UFsuqiwi+mDGsunzlBydUBS6y +51bf5WwTt/qlSBVRMHOJVK660L3I0V0AJGpNZv709xviDXdqA/kdbT85++CM0l5zVV+eaWaDKId3 +7CbQOHcQzfJP7pM75BW0/ej5VQy9U/FLe6ASqTHHZmW0iMxduI4aJeOs+Y4rQRG6QSpNFpxQRBQo +AmArZ8ifz5yF+TxVzY4jLivURg2GC/p624MSv6JIGcymwTwM05E713uFJzjCJx4S+5dMNNZupQcx +y9T/5UJQjmVz8/lImy/jTTbW5uN8zjqyRKrWWRIcXAS2RTFNT+cg5PGaE3JpPssu2AhaBND7/nov +h+0mdvoa2ZwqmxbQ87lspV0wRQNRhgMVkpXxvLBHTiDgmeoQJRMRngi66urRRmS75xvmSUR9jkWd +Zm7Y8zM2vVVF976pS8ckaXGgm4wcVQdOpnazgnYi7NxrUp1TZQgXIetz4VpWJCjyl1Bfek8lgGh8 +i7iIJfRcHKOnIy6Uvr03Mt2gWxbLik+5cUQjcnE9DRAA2L66VWl2oYEz4V80N37mbXXsBInvc1lm +l2pYSl4utSnfUo2z5pBEBO+GZ+xCoFiih5bxvhxam94R319Cn2zx6e3VD5uAoCHmjfkqCXmZvUqG +fYZSYm5hzpZAOo7BZLrD148TTIRnjttGWdwga38Czye+Cr0ZfDO+syHF11JhsrbObaNV8iZvVpkt +bShGVZWvP0hTMbmokE7/BPA4fae2d5m3XYc9niYcQXVQomzjQJXohswux2RPTGqBmPd6Ch7kQYgp +Yovf3+NFHbeKMaTQwz0OVB+FRWZ0tdfdBIQ+/LKQ4PDm/WKrVM2eDxcoVrccWTvbtsje9Ra7YrK+ +UsX/1fbuqU+jMN3Q+2exv3xe7ThS9exGZkuCOLKLHXOQKnTnuzpis8a3THOd9lyZyowSpJUj89th +lAYKPFyK7QzGttPGH9L38mbjRO3SvPcfN4w78slCGIFF2JYyP9VEKMafZsQjUWav7OGk3lDkcSqb +5zFWSP6eP1npseBO50/GtFWT677C8jFXy3geCJTDtrjBMx9p+RBEK3PWZvBbM8QszQqEj5f1MBzP +Dx4QwGwjac9+cY42gADsqixEia0PNI+U3yKW441Ylbw8glXZwQuKrjSWn+ven+WBS/YUjps6TRYq +iQdvR7oYeemKUmxAzprNxMq4oQ6V/cqkRK/5KLWZfdS9zino0dLaYNgpzuBTeWUJXLwSqqSbCbfJ +OG7GLlw8jEZNMArJWWoo5fuMkbdddnpDxmWZD5WFf7wWnJl+KPG4h+B4I+E08itGPTSuuDi8ZE66 +YZMCUh9NYWYBSYM8Kf/rm/+OvJGtPskxuXEJsUp3wg4ctHNJCqIFH1hZe9Crk8QCNhDQUkNDF5F3 +L7NTHUZyyPrxdbwH2Ou7YFO6PEkL1xZKxdHmeKoXO+5RM8nSC0fdE35Lh3qMNtVraVZ3kukM5lNr +CrAoszYreVxK1Ktn5s0rtYDOn0RbRt2WWzwR1J3wDj5q/UJ+oOOnl+3wlgs78XPZ3twMtKf7GmNt +hSDc2dOOGGeOPhL8xhLW3u5aGMqcs4W1y4GZP6Z7/kHCMwPNwkBfHDLlxvqxxRuR0UmpioLN9Djf +AMGGi0Vp64H3uCjz6bmdjo8M/zOOv7wtXSwtPnM61ZXrPyiUJfZ/GYtSxx5OjL/l+air5Nasf9TV +cJu3ZJhOB9o0PtiivmrgYkc+VHAj7BiP1XRYluk9iQwhtBbBktiqL4cEZdlu+Du/L1zZWL8SasP5 +1Qi+nrUFEGlFFp3fR+mWrnNU12R26Ho3xpgX1Gu1eOQE/KeaB15bJ+IygZu+x4i1S28fjl9eaHq1 +zP6HwW/F8zy+oKj5pXpPC65cfKc2vPGeQjM+7iiIViRye3W82YvSzfMjNQ8PqjvYxeCNGtvEe4oc +Nqp852xgohnWkER4Yyd01llM2I8jZ42F7TH4EHfb/Wv15xk0JuzCt3Z/1HRETVRR+jsCmxTHWKzr +8l+ZQgpgG8gzZvG3ZAp4co8MihSb3nmAtqXjVpLqjhj9qa3oAtkk3Oo+nyDV0878Dxhbnn6iTEBn +ztorwzaBJ3BSPNejOxjf03tnRZXsuSBdpK2nmETs8z4U0zc5a+sbUebT1Vra7rLCPNS96T1ClyP3 +OzhwdfE6k2x/LnI5abHmiz4/RsqIQs4TODPvcgTWkQv/siqeHWEhiy1P9rYq9UEHVMt4gyx7Kcky +FMCeTB9kKrW6cKS7VMNagBL7emn7BGbmy2sE9ZM1v6v7+8yTkqXKjJfPfRk6OY6B4ekAQwiBKu8u ++TDsiMiMHavZj+eFtD6DB53KffISE5a7MFVJJlzpWHRZzsQyXs0UUc9H/RDpf5Oo7uGe5U8HxbIv +XtCJDJONVKa6+BFxYEZ4Zu4HBHmXF5MdkBDz4r8PKWMxnPrl/YN7nc5/QqdhTYrV0s6jhlnAW3gS +l0vSnzDwevLN+RTtQzLbvovN3wMCSNX1bD5zSPIKzICiWW6OCerPSGisDolCxAmevY0RASVHm23y +qgCtAE+Vcg+vm7LrIU8y5O6iHvChPiweo1/d24lPxQQz6G1/wjPFAgfkVAI2l0CX22SA2174kBPx +QLX7fvU9K/DaPXIbwThnPRLBiyj0m6aoyBH3a0eKYjbrLsme4PSo8B50+ussEho62wqBumV8MSrO +7Ckzv+m9LpqI7aPmCANlH+FVyqCu4rcra6CRK8hLlgFd9wuPikDtWc33IaYiX/+ithyQU0MvokUi +bSLhtqUCbVE9M43oewWPSbmoaUb1JPaTe4P0kLUqUiKKKvDgONxytbAwqcG+UP7fTr5JDk6omSCb +Kx2OgQzhiC+zWKxtNJJ6L+IAT7hQUJArP9LncHvxRInktJEJdUTfmQnrIvNltY97lOZ+DOxXVReM +fUpwQg9ZM9vAOGxYeIoMsIOf60MYs8pQHqxPA7sIUj+oBjjnm/oEWAXTkHmFBf+fTFC7IzKcjNgR +Nx9H+/e9oKMvz+dW7fwYgPBFfHh39mOVXqIZEj2u2bU5nASaFhjAtD24g2vdY4WO7TZ7gONZ8J1o +SEvPAv/20fti4Ojlva8LSC3ordSR54/Hr5UqT7D2hfulCxnJMGFHf8rqk0zU8INlWM5vAo/LGeD5 +mRUGK5Eh40MpytvDZMNBJAtjtljqBoSR7twZTus1SVVHQPq6YXqglbqzlUDknfzJhYfif5DDaU9j +d8jzfeqePuPB3762z9DDO5aRAGjTdJ3wtKgpIWGRiTFQWSFUTtJvmTfrSqMVw44ntJtYOmxO14bR +GTNo2FAjj29FkOdcSmcCW6RpZuCOzRIj0g1hw5oYDEIm3e2tDuy9tW4i61uazsXq8kcKk5lZf6w2 +6y9o5Scdu6c0iHb6SLoSmYfh5PFbbBGih6woySxTcdpqmJQd3iCfGuMFuUjqG22uBgZmbsyCQrgV +oVLjZ4dzznAzs0VeEXUP0IZfF0N0bOwzjHS/WS3vpouyxAKM6wf2H+0nkkimEYcGgUGFFFkq4X+5 +lo6BJuEfxwinJ320CFToyefG+bqup0qNBVMwYOeefVUTX9fdwiCADvBgTP7hsQumK6G9STHg4hY6 +/vvhyemMziiTTJGeVAzulxHMB2/KeDIBgVt04qh4Ezlcs/ZZyFTzLb0VkVStojPoWq3edxoGkXpn +Dgc+UhW/MJMBk7kTXvkHE/1NnF4LAvycVsO79ZOZlbDouKbBWcoZMl0Di2uXt4hy81fFyjK3sNzg +zBRodLpI0LTMQ3JdJlzIe/5XnzLAZTP1fgt67nPN9P5do4vsjFm9Wq5CuROlzHShEkKY+ExC6Y5t +39W73/Fk19MZFgivUia++uM2MNU08HRwxKOgpVlam/4TXMe9rKa4eGr7tLJCLTqN73dGbXlaJo3E +DENMpmbYwKQ/4sBLJgu2FAmDIZ4z3HcA+fjBDEZoMFJylTReGt5Pv7Hsiuk8oEIVq+au+RbF/eh7 +G9+isZtt5SmGO9eqBqVAeQW/WT5WmVAz7YJqKlXmKklX3eXwMJ9hvOmuPnthzbvLW1efBlpBdMw4 +RWduBeuI0aOC4ahBFqjpArHipoh9BP/1PHAuWyL1pjPGLFUJZ+xJjyqCiPHtYrwnha25vXmSDrhb +0gC9uufULPA1iG2722dbj1bRkDec1MPtcKme1NFZnO6SYPY5+UNT2fHw7KCjWwkQN9LvaesceLxK +92XD38UU1K4OBF/qMvDHLVy7utHAAVrq0CzpgojzaX2Yn1zmI9g3CZFZg+YHMW89XiALQyvZJ+Jg +GsDN7vRoGY3sheq3xeGi6+A6dyi+g42VkbbKO3Cl+tvsVae80ZPWJk07TyZTv4s8YIahVScRxp3y +jDeuujwCtiS3fCwSMav1MIoHlaE6QGTPDtwqshVXisHsqA/E1O8+G0jBomI6UiYiNNkqb4Gdva4A +0VIWeZRckdwUJ3xg+GxOx9T37pS/pMqDxrv2P2cq9X/TOlyDolOt3lu1p2tSDPuy1gwVhwX8NkdN ++7UncOmLc+gt14b9UfziXTUCfBaOJHOmMbWXYg2CbbNa4CnF2EcK5KrSghkOMDKO5tfylGeQxXSZ +LZN1b63/E2RJn8IR/uXn1+l6xFtxr0Yp7nabTDETwcEDdeptzpgx9OBtwIZc15jnnX4K9hYPWnQF +k4kHzFZJtlzwsMrTWOZErOj/1AX/W4srseS6oebYZgu4l3h2Qch+uMZxPkra+iOkcBa2hkM+tfzA +pQIwVks0mmRxWg8HEjOVZXf2JEWxnrW8qDn7wzDL7e+SoPyaPDCvocLzJg3j9uBq2eGnVulGpWbU +J84C96sd5pMPGMWDdgUodLsFSUuOuFhhz1wfEyN2WUGyoBXcJqoOHZ2dvfcNFeAAhImBCzEMUwv8 +wgbTXlyEseDnHzXB1U6/e1p3qh9TAFEbPyrFnJKJtoOcQnEXPYbo5ARY6bRbisGCBC2X+48zL0S5 +3YadtKBYwA+TAjwOQxKOnQohI0igzULUPQbC/F72bYNSzimkqlY5VwQA2ZcCHepoOIeuMTG8P0Om +AW46F/D4QnVXT6F6gdvdExFY9XmJFBCq9SbsbZrXGpR91el8gkFTxB+RrhlNS0WQFMzxAGwlcb1P +oy2DMA8FaG8OckWfAzOpbut7ETh5acrKemNWaLIuQmaeipTRsgL9KWPmXrNKMDrPUgtp3ERjwnhB +3nnnaPgvLyM5nvnZIYi8tMiwc+54WgyuUeceonrKvrfyJ86N1TV+Cb3j7wwsnZxAFLVEbUv8KmR0 +6LdVoKo9wwval0MfS7UKt48wBbOiY36E3deXAIc2BN/LgV7cOQyIF5nupSxIBTtKe16kzkT2eQT3 +D/rvKZvzoYEAy3t1JRqYdISw3PYel+jaGxQkNnf1Mp748/nG3Ri+m47JTxxyxJNPnDe3IoQ0/G2H +HizGOGwUnaWCs/OT0o27nZxLcvJ6DLznnioxZQbfcgGf9BOPFKI2z5+vI1/0nRD++u2Vf2SCea+v +fPN/hsAtgbkqn+dy7sGRo/Mu391stoJRTiIt5q7ZsgIgsIZnndGkSBOlCYEN4fQviWUIfNehd1B8 +fVxW2VPQcD1bhWwIGTFitsZ5IcuB1qJjBZjSnJtIKXCPoN1mKMuPy+7kyUC2hXxA7XI6r/m2LDvN +1qoun9raFw4Yh4XtV5be0lu/ovQlj98JIexeAUaYCncdAWP38aQ4UX7VtcTlzYfJm6Z2Rx8Esh0j +ZKjL/wcHgMtpOI8pxVHLKffpi0Z3Fauk9DBDcH8n1e4uyVAe4QZlrEcwoQVCXPhZp1szcEKmc1Qu +ctaekUwKozRzDZKEDd1GHt0rScvF3BALGjgUutKe1gAHc9+UofOyTwzdNU9qc7//ppCzeLlum3RR +4dPreGOw4zc+63GaG08vw3RWbHWpij2VnsmZllpkFldNjaQwMBAVMFWll/jKj2VS0yj8zOtZQ4A9 +vC+Wh5EqIy93NXCOHf4Y7foXytt2D8J4bDXhKIyJCEJUQAqbsV57OnMhdV7VfxWF1sLgqB9iV8wh +LVHxVRJSjF9Nv9MTB3wSO+AlRbO1cjgRBcg46GnYcHqVr55dKHiWg1OsQZ1xfQGKRjEHDi9dGhct +sV/1x90W7K6WVPnoKYZXMQHY4bo8fj9Z66REkUZv3uPnKHTAzMiXG7YsqV2XfY051yaacvIt4hEH +kxfyfCJ4sr8MRV+OAuwjL0WMo69uXPD4F2cuo3385uBJsA7AuASR371BUblkm4nAZAOj0mlJXcV+ +C9T+DYNzRtosbcNTGGfutOZBWGrilo1sNP8un1fmx52bIVJZ/ZT6v5ffl6ewU3yXufpfgZRBgjMr +421Iz0l1NIWlcH0LzEietJi06/n9JYxGTMcy0qnfDoQqBuNixYlKpUOez1VTSYt4U9VypeMfIw2o +8PuHAE7aAOxnlZpfoDE4w8XYz150wz+7j2H6vUFHmzTqj7z6AebRM7Kj6JbenefssKz3WfzMNwLz +za/cARg6UWYlOCkA+NBqb7vLZJ9oOC7XbjQge5Q66R9T/ilX6wufPIOYXVOcKbdjbICKOR33dSyI +b21u5mRrL7gBeMWKtu2j3agUnNacfgQzfQQuXw5OQMvR0BCZmME+m8oSCFP8i/QXLSlXAbx33Yj8 +EhWIwAsdkGS0QoqNfgqOgP/vZSIWQucF+4l2X7EXkES/TPWAUqTWtIErtUtWw+A0TNREJfo4ZTa+ +ZDSO4eoj0a/0sPpyE2y/fnMPNDp6tjis8nM7CaSiSe4Gc55j/CORUC/VG6OKHZE7DhcjIUVnn7kY +4vOSzPstcti9h0pGTuUNghspdMeBbQATDicJqCSC7wLbJxLJEp5rwSsIhyoPnsTi3dijn8pvTBYa +9cz8QF1WOBJDCVl+RIe0mXC6bMgiO5G8+qfS0RxwmxwgiCSmc8qVnkgoKiHm3AUgLvwcnXOoQmUk +sGgl25Pj6pKagJ+FQkN+z4uaokcak1WJWJEnUvvIpG/P6Av68UUO5o4Nx9sU5Orw0gPSyJHFoegP +0U4Lb/anPtDvF0+S36p4D+tvbwc8Y4l7ENEwlgEbm/UoTvDwhLNhaBOj9SkARP7hbIzUyOUaUpHU +tF1pMck8rRdA/St6+nGO46nc4BcLzvNheyl6e17oyfKULKWXVLfrJjNNO22NqhG2+d7ZcFApMldR +ahZrfVyNkVKoKU1WugMWNOD+5NIQx7O90U0/ohnEiVDUwNb6HOX815pkHyAi4Ra0yhgrCSIJ5zGg +s/O+VXQUa1N2LVtFP4cDPPTrXeHyo4rua4P48A2XV9gnH/If1x5aZSe2HonLbAsN8ZCicJsMNJem +J1la8i2vsY8Z/ELh6HJtcZ6dkAdaS0KBnv2aN3WlnMEDGv8ji+jDPs8nQSydhGiM9QsT3skioh9X +eUjg1G24BTH89Yfwl4UwEkNrclb+OF7S+dbLFoWadthsOgtIfABYAz9P4YJYv3Gosc1Vawy1YWDU +UjzHDKKxDs3nD8/YTGJQl4sNUOXcT9Ex3zhzeRPZhVE5YYLtUEHas/15YWi2zFzvne2bpLa/PtUL +ow1N4nMuBIFmPyNzj3oSAJd04gErkkOJs45W/gMYtz/U6+A51Ep7SjYoe35hIsm+FwgWjLruz/9m +A0mdOnSHWoAVTW1Npyo8HTa+8UFUq9bptu6rIlo+4I8ciCsVJ+hc1xXqBe02ZmnW/f/v/2yc9hPd +g14xDJMCkX0rjJZG5+GCead7ATWSG570hW/zSqLHxSCNf9XLtzAweu9sF06Z61sqJ8YfERNKyuWd +b7p+8mUmGyPSpi+3fa6sU2mofr61hpCdg3xglcX/dcs8IrnIAjbTS7JyuYQNGPhe1SOKjz1jDgTd +lG/I3Wd8ccmnek5klr2YHjUCysgZI3DZFNUsYxNHdY2n31NBYFqF1vBLZVQ0roPes6MJ6H3BJbjn +QSpHdUCkS9WDmSOWqTTLtU48HjWlKshSxLV8fkHDSnAIqsA7uu5tNEqQwd0x/boxGAQfnta/ViCj +graOotrgLRdJGUDoRK9d+wTMRv5eK/7FxDOjey/2xO7XlPfkHiS0HyA/BGSonh87NrguesO0p3T6 +ZCP9K78y2mU3dR95Vc2nEt7rr5ApqKQDnhBmMYQbnvYBW7xPaermts2tipxe4D/BibfXRRqhW/GY +qDKfpBF+SXvYMwV/Kt3FU9aW5jzFGKZmpZf2uIvKq7gvexPk8vgHWKGSDKcJcJyLh+v+wC+JV2y1 +mLD1miYg41TTW3gwVkmmb67L0NGm7yTyWwyGJdS/2xv3wP0A3WnGlH/JZPY+r6Q/j+wI9Hp9B+oT +Wwvg0TRaeYTzJtqOSzHZyWLjww8RGxH47/1gaWgGRv7Lytz2JZt/4JzGtNw/olFkmHdbY78wVjfc +kB2U0gVKCn50LDEVE+Y6xo8S/yvCQOubiqIT79XGu506rvuYkqiP61l/RLmkBOLekQUXYr0ICVxD +Apbyf0cs1emzZYKS7g1E7elasspANjNFfrZZx29WU4rlVJfQm8ARcpj4S0PVbY4R1FlXapBhrgKq +iLPs64cZ8LxjJ3FGkGCjzzXK3zAvDbmaOVUXWMqAB42ltLDAuZqtphZDzvQrek+/sP2FbCVovgnd +Nf1LtBtpjX/ge/PlJRgp7a0LLBJUWkjr+rfgQY9PDSRP7/S//CR4UEcojpfcB5YmeTbGryfGVKYt +A7QD+tY4MH9Dk/0dzuqGS5sYWo7Vth3Bw91xiaOUdf+WfNhK71Ml8/2Bi3OSmfOuSuMM/VELW/h7 +XGslxCYh21t1eRs9gEokUKD6L8karTUptH2HkMsy/1yv91bQ44ooREh0ErhBucAqMaEjMBJOQBuC +qzcMciqZmracRIqp8H1OPkPtin8RO4e3IDNZsrJ933ckxWCUj1UCC/Vx+IL6AfybTrTY/CPG2Mw5 +tMmk41FslWiPV24ZbtBc6s1l4eIGIqENpbqQWLeqMGyccnkhWclDx5DHte6aJ2pamlwp6rc7Qn++ +7IHLPVMsdnUeJNJAqu5u/a4APem13kpi+ZZ6IffAIDWdLokj6g8gg5fKZlca40X8X09RLo8tbyGA +ibHSYqoBMCGjrQS/dXoFBsKN37tOOnG0eutxNZCMRI80NNDmEch2x8fWlNgsrKFvvu1gbh/CmEPD +LlsYyAdYLSikQROmqbAgjupU0imqdiZLLvu0Q1sqhzlccSpZMw24TEWwlL4uBmK2XCXMIiyCEn4L +u8EjIsurOLL6l8zV68HdAc9exmTc89dnLhBypMvrRk+q0fJ8wBKm7NySoUpQdw4xFYttmAX6aQam +1zf0OOloLuZnrL7YZNHF+mQ25mT3WAwyxCSKnQwfqNSg3Bf3oZvItrZqgjYBioCCoHS1HLs+vLh9 +QRnZnvgJ46QmWUWZxlFAqUXavk0ZnLoVBuAeyP8EK0BrsTdG+wPx7O4UDXrbZy5X7zfRexmR8vRC +EKeq8jmLkf3x0WAZjR6zAAJ83/iTUOM40RAKx9U3ryeEfCIIc0p27aaC5g6l7Tz5M5rhBSWS2Cfh +iwpGMwyWbafmX1aVQHbFx2yLA7rttuK49Rwo4ss8xFOSrS5cvCOcH/Nomn1oUE0EsVR5LpTb0mA+ +60oJ/fCOzOmbcbWP+p6ZhQFlc22Dgw5jw8polFfTjMsozzTDYldHT2TvhOem4HtUr8dTKwo4Nf35 +XDMSADAavGZUd8iKr4Q8KOGP5UgXW+U9jHphsWkFRNp2lvCf6ah98/9vHmc22rRoCA2vpg930l39 +PZ5fhxBH1Bqn5bvIOuAu4CKWrez2Gs3Gv8ehlIzsF9tO8+/FMnOWvTv/nyi1ULLkw+plPGGe/mhy +AtrHHb1DWEBugIHMZoJjfkqJwN2HI4ZGVZ495HEb9/bk0sbznuKew484PL5kcP6T+pSbE/oDt+M1 +WyApGVT1mBk2isvcox7NqUGEhqrNRZ046cVJOoGe+inIgISzDUY7jYLXEjZWHK25iZzHQO2Qio66 +QxiKQJWsLsrlKF8YKGWzYnI9Or0DR+fDDbZHSdpEY1hpZDFCLnAzgn8hApodus54EtrBtaHokS/m +F5WnjJf8AH4XRgdFjpyGwT6Y3gwCsXAHiVuNsjiqyqLdL0gArLeOPggK1nzF4DBNB4Lvd/h++jgM +tJMm6hJ6m35I26/B7RSMZXdrgTuRSRVwVTRo+S2WKIFOcAlvEYfOO7c3Dzwcu/aa4rQv1/B2Z/Vr +pa572JsxKsNzvP9pHPDEz65oPUx32XLvYDJM1g4b4fBJh00HxEMSUJhs4WT+F76hvJ5XHT69PIFB +zbWeD/v0+mPGQdsb/O5GBky0FjQXRQ/nGE0tJN6RNXq6wTx4foyXML8NkK1eAocpz1aky4ISoV/U +Aa3G24yOklqARcrDdpMmHttdPhz5zCZOBZl2QttfzIj7tWI9iluibW1M9KuBGWX2b7OR+j6Nj+DN +XDLLfunYfZjAAuS5dGAd8/eouXIytlHVaQ4n1ea0YOtL1n01rU1d/ZDFa+dicR/DF1YNqXsjOd67 +MCuUwn8DG2SySEO0ntZ3GpyqWCNu/H4ps3wBlCvRyB3Dc9W92xKehGT5T2SsRKzPwtmbpghrOlAR +GtClzcoUQgOeyVGZnZ324ohuzsszHm1pkwaakgBBO/MOXVjTxls351MSKDdL6zRVx6htQmsLmlH7 +7MBvxbzxIWWduQec90//jBxXBHQwgIfbL9tVSLJPKR8nqGKurfJnTH3aEvFsim4sHYARIAG5mT1c +vwrX0Km1mcB20TFxniHBV85MpDi27YV6APBu3+jz1VuM8PEz0B1v3TwBMb8dzK9ys705HMsHnSno +ylpihMCy+hmgcCnpU+zB/ozJp8g4IW9WCtYKtkofcTpLAfNGXmcd7zvDTOL4SAlQ53jz8Nkq4Lr3 +TthPe3JaZg+7aKWDVwf05Ti4dkakMc4N09v2hYVXXv26jjCv6U+ZxqX6iHO3HmOZ4zjk9K5bEGt2 +iZQ91c/GXJ6dnJjHnePuDIQ2K1lMduD681TpDzXKj5HLhLDuXAob0/9J925oq99gnZlLveAlOKFQ +4a26u7a1SWackp7fGE+W3cYiTAo66m4k6POk366sTlkJSyFunnVmmzWVmdAAx6bj8n5cFpxH8n9w +7dNz6Ny1/kNxLJhafMBrMYXlvPvCnnYehgcYKbxmtvfn+xIGYhxBhzPrUIEgsu4sBc26gIViT4vX +L/5FUnA2gQOQ6UjgwKaZMaUovOYXaLQ+nj6/uyipgOH4LJEXqAFY8YuuFi4iX61WVEg6DYgABZVH +B6fKy3B9E7DxYHLU9UTncl6VwZqyzjX0E0QyM8K3IwjXBq2oPR6mrqEOL1f0DHNHfDgfP5bsB9+J +MTZlFQdokVAjW5rsHM85AGsuxE7rPv6otFXPTBp/bqy4yyx8gUhMar06LeW0WuHPSj8LG9B50ihv +uE0rhSaZU34tjLuYOjHm3fZh93Cil6SpRDtOpqNPd4QanED2ikT4GXL3bhvNJBpOEWRvtVDxA2fT +UIFWeZRK1AbCoM3m4AWrk6gk9IWmPfhaKjuR+H3c11W+rGwgG1wQbOqIhcCgTWefyPBuW+muEEc6 +UYB5abLH6Od+nVii5AqjVdG3Iysbos22MGlGi5TLtMwAu1kMbCHHrI20Shs604d2+/z0U3MjD4td +hblRH2adER86p+EtT8u+vtMWL3NWgE4QPbO5mEgdrI4p/B8FXJNo9nRzYsDAG/PSjUuZwv2iNl24 +R60Ya6TZcD8qiqvyKI4HjCyJcNQpGq4jJlbdbFFlwYrhn0oCOeTg/IWq8E66RIIvPRI90MXOeKBY +EyCO5PHWeu2bcnn5qbMswuJ7l5AaUKCTJqKQhitbPTfSP4Tzcousu4vauihfIGojJZj6aABBeVcy +O5ODGs4uXefrePzR+rEDPhlvkarpPOuiwUAUvDqUWeKRoR2ZJ5Rf8AEzMx3BYC3UxS0wUW3hvtS4 +c9h1dSVuu18pY/nza5X9mrlXH/NgilCOu+SxYeS2wEIoq/mOGBgivhmPPbN3W2gDbEKemO81RB+g +J4kHvstxfXysdpeGydT0pLT9EgsJTi3tbR5YB2DJ8MoGPFeDsK59U5ejnSTVp1T7fcPqhyhA/5ny +KZm4gHTMszXeQLGa3hggctdv4BAgz/2E0NABLkqZ1hd5M+DUQ+HgOrPvG1KxNFhbEvcPS9AP7FDX +3qRpheoXRgZ11ZwUA/BB/EcCVCbMSGBlFDKd8revbw/JRK579YvUWxSLkrDDgi3yK70UzM17+/cq +d5IdVhjODaoKzDVgY11ws9/7mEihv5cTZUhM04sxgkd13NBjoOm/xFtTnlrzmSAFatGq+nk09kot +NbLu3aKZ316mqoYzGzkV7ySqEXLp844bZ1PGP6kn9ieplaC2skKKkKNWrw4NtE1fQY52+ilSQYTx +D9qQY2GPbgMBpxSuqdLfXIbtWnsVr3MzpFTOKlIJFqbpXPSlpwt/8lQqhlG41aZrHzIuouVdYDNz +Hxs4r0yQ88i/bc9gKNuKOahMc3N2Um2oWBSMrBnbfc6fXaAc6sCwLFVFb2KTMlePa/seAYT3av1S +/uERf8p+rGgBVWN5apwrncdVkQ8KOjlcDUoHA1sqyWY/tEGpvU4h8fJURpRXGKotYDVnTlDB+fOk +PlXSB1D6QnU0C4wnk2FRRBD6tQ6odfa2+74NkGHJUiqppWeax9IQ4ETT7rjSIczTGCSY4OkIZGnK +cKk9vCGpWhmlPQA8qXmSCmffuYhnAfIIVhWtorxQb1YIZcbaRX9EI9ppDTc8Ms1dgqwAuluK+5QX +f5XcspWpgKqblAYvDrivHeGfRJx7RhlRe/oz3xDWHrH0Yg02+dIuzbSnahoLrowx7eNwgKJFc+ks +QYc6ra3rGFZftMFWYQ7YvaxqPoNZ9MuW2FFHtLBYfIgP4kylUurrtVWGfL7KXTreTerqvtgSmWP/ +Xf2SzuKjIne6fst1zNpJBmMAFPQ8XE7l6ccyuonNCJzz0M8tkxvTE3s7CgSDY4s7OSMG/lDTocFs +8HpOkBWRYTrWev8N7ZzzX9SHh9cb49GwaXjk6DIe3PjUlmDVrRrEbP5oIn0Df43SdxTpK8sHFGZp +C+xlSOP/QfiRmOCe6clHUq5phB/Q4a0BVAIqsyka+qd9qfelyH9qVxBoFM8U0tdwLjC1PvwWHqWt +QplxrE4+EzAeLkfjeFDljptDF34ovb2F039xHuW8+ftdukSTsG4arHITNCpxwEbRENNu5P+QFSEV +2FN2e/cLN41e9NE/Agy/1Ou+soaGAnEnE4NykjHfR+D78UJUl/QHxo8BivGyKBawYnkDPHlmrHpB ++EzK+0pGpUxZ0EYTueSkizIErAwK+zcC+nbAGK/5O3nNhp74MAykdwKaB7d4JhLJvumW+s/ADDD6 +2EV6ijfnySmpJ20q/8dXxeWdNsGAukefIGnpiK/OBGm6zyO/t9jetaE9vY1kz03pWUqHAe1x7SC6 +DHLOzRGgcPFyJaE5v+9711Nn6r76T9wo2F6FKhev2vrrvs2ja65ItkNGQ1pZtSxqhqsRFylRMaEz +J8eELBEQwqyBfphASfAZG+iKZae12P3Sp2rOBlYg5sX2Sm3QhO4hgZm36j2U9uoJiIMZ/3oIuWXu +BSu0qHd0sZuEHkEUo6EYRpUyMfKvxlPqAV6qEj6tA2oA/NYbownRScaA+MwfWOz8cV9y1Mqn+4s2 +3EXmvXtLGyP8HBh7hUls4MDMIcy4wYnV1Br34heYyzHVHY0ExUClcwbObbfxBbWZiDtEqy+aAm9d +RHlE18gqgX5qQsF1wXtg+ZQjg99M/yXon4YA8cONaPSDmRObZr04xOJGm3yjVcgUyY4b+9hUn/8o +F5Ds27/VjP+hsRD9dqGtgLBe00O3u/gd/IyHFnwN1jZ4HnrJ7yGMAdKpWlZKFcRnDX9zJsCSEKb0 +lCJ+ZdQzXPbk1g1pgqQWpWSwTTlQW9B0oREhTKmY2SBIEmZp8fp2kp7qS+fnXOxQoGkA3FffRA76 +DcuCZjRy5PnzgVSTeAu+O7etek3RvndDB72+0riVbBcanOLZLLbs4tBDNQAfvNY/YPPsumg1tKWh +SYR+aWth8hUaJ8HFhx7HeRbPKGk5tJTKhGfGL+6mcWm3Vu9wwsJAWFZDXMEAM0p3z3VDZ6t7S82e +X89jgdzFAUwB2IjjbIA61cJcclKzhIZIDT0dcxYKQnOa6NBRroCqstBU0I0A7rGLsXbhNtfgEkkH +5rTrYOqEP+QpjaPng/slXByAaEKYW5O7grjFZnhXEk0oZZAUyyuuOL4cZ3G+TltlylQUUOPWuiHb +A/ReAi33wq7FOZAQEmklU4ljz6xF0swDGVevDMz+nqrmK43kIpUZKkO+y7eU7nJKL8DWb4IeTMW3 +/QpWMqP7BWZ4rM9MDCN9qXvVppIgVbxfAT3L09iOpAOWsSUIAAuWgNe0T9GmaVkyD8ftrANe47YY +AllrDVVDjLOl/hPk/fG06QF1vfNQthxXXaZR/+9xsrnZ5rUWnIzBEyVg7V49M8ih1teLFjEzWx56 +tIhE5Pw0avju1PnTu2pfv5vqv16i291Vdadjr6WeMIBTLUdZXMFvSXLp7R0kEohvqlhWO0enF6CK +a//GNsP68O+P0v2sjFqUkKn4vZJH3BvA8kiG5+SOC6F/TvlbITJ1gwy20/HulZx4Mfd0OMXZxfa0 +5xcLRtTHSrdGnCiRWBuzPMhxGxZQfTKDgyqCFq1s6pclQhJ0GkA4T97U41cm6UIVZyoRfXrqqlE4 +ZVOwjgiKHjpHrHaQGL6JLB35LUNkp7O+sMJhGNVB8MOkS8Dr6kDcocJfEOC+mO5Zk8XF6i7IIm0V +cHEI/hTXj6Yvfek+I03H/4x9oiULdV1hmilItJmzhtAh90VaXZ7iLvm8n0FNDOKx4ROJemPjr2id +vR7f0KbupkHSKnVelFqkVXxFLOVe+WcdcwI1n/t5e9VkstRxHN7AcLHlZTKKXhPPcHkj9kq8afkF +k/lOQsMiOgdnlJUDkDYYHgcY6GQAKucWQhD4B3+73fsuZhMx4nxY3eguUPDj7w1f6pKGnLiAs8D9 +n5sAdvIGAxTxXW+zTpN2LW4zWpyfS1v9FpFWRJ0WnYeqxaEV/+EBV20o8SL2lWEFS6ixEFzylbhY +ISmTUpy33VmlhSHMGSaZczhWnZRT1NeTHuzrQ70uOgMDjxSHi8k/7pVfTVm/5/Ek1SP+9Fvc10p8 +PfPcokLmV3e5BibDJupd40dqA0GsNxzcxOfORIGS33ta3fmRpnTwztpOAoutsoW+sUQpEOPlivyr +DvGiqBJtL6eOvi/OrfDlRElihkIFCqSbv30b1fPWZD1dML/iMT+2hxVEqJAY/6JK/T6nzR9F1W3J +rHxWLr4v8s7cDfO/gT5TgE2hP9M+1SvwJmLWRJMwOevM57fz3fB3OycSp9opBDfo66KxvveWx5dj +ywkd2pASlovceZ9Zwr8/VxXcp8Dtw7i8lThLKF+CeZJIavbow2ftUFJp33w7BFIC75z9s3tgyD1e +METWIXx98jHhJ5pKVO+IFg2w4kW49fYS++wOFOY3Urmne04e9cUWDfq+u+80pL8TCNSv6gfcbZi8 +bHmdxAVZzkYy9Z/w4sBxJEcCPzLmSQxC8DbnAKyS+rd/+d9WQgvugqlDoLGN2T1XPxgxEMVjvBwA +7g6h+sty+fonS9OUHAn53ebeeMlnMsNQAXl9xfL4TBnHEKtRfBFTd1SawXve6MB5dWVoWjknW+kk +Vv9UYUA0S15dZh/WlY2HxyNtmwhGKvrHYRf5HeL/awJD8kUG85w2YqW3KNNJQJ/jZl76niKQg0/Q +Az1kzecblO05BpgLK9+Cx6ckE0K98Fo1vsVs2Kmz9VXRmP4lGhUlSEUjvZ5N85tHYS6bpdg79BHH +EzHXniBAjt1OP+/U/PrX9ZQtIQRFFZAmzDgXNtVnq8IjTScezrcYeogbMXtypNxhys+mxyzs8Y+d +T7S8ZMr1T8gJkk7PyQ8JpOPrrmqQF9Lz8TAS8OYOk/dMRhEmdcQztV1klLQgvZwsGyz1OrX3bKyr +6L84FZuRxbCfTjCDIGRXl/PMOCf4bbBwAgNkKejukslgl6hs/jZ1Or/cEZFGF5OULmlbKI5OOD4v +jSn4IaVsK+kauK1gLXzJWJSsHBpPvR9BTPYUaKWsPyS8m9takc6vhap576Nx3rAFZBVXKYNg8cOb +Ti3c1eGoZ1KBpESJcf5zX5uw07jlqGE9B7bvwE0cwclEh5vgwBjt95CXsd955+OKx61w6HrhdpI+ +j6udS9b68aED0O5eIk2Orp6oefU9JlqQCvs/DUwwDK4jPlY8Tn5Iwn8eqatBfgFesA/J7SWYpW+u +gfbH1naqq85ed2cv6d7Zniwik1s4ZyXYv1eqUBoiiW3FxiEDWPs3mQq3X+HUS5Ow3sxWWjQvsChC +eS/yN0YqhXTGPveVp5vMg0/1B2z1i3AcubznS+v8DrY+y6AKxoGPmbpWxNH0na8Dqocu/JAmYHrD +8ScPHUPKkEG6FYl5tg2lKMQ4I8SQN8/MKJOvSLe79PjLgtB2NyTPEC9MUMzwqsNxuycJVJWjy237 +cChZ3ja2pOEdlLL1JjcnRiOk11yqpZSaQNbnHe+yipsCXvKKjqnfGyCm0OC4MiRiFGwfN/xIiPX6 +JMwh/39phxUaG2vxq4A/H6inB19my4phVYI7WDarl/j3BL2FbKq5ECcW8aAav2zn1sXyNvsYIOFr +ovIY3sCo/zSG/tDR2OnZrZLoSCzdqD5syaLSQOLoTJ+KPa/1+y4NIS/bHhtlOxBpYD6q957szd7b +8/KAoDHJwXwMh642bpJKpzFiO0RZUsb67UpHM4m4AGG531CgRe4SqJGhoXYoochhcBENbuc/WNDO +FBA0GFseGe3b7iCYc9mzVsILEuJuNXw8bcQ1VymzPK5/XfVE3EEcj0Z84SPVTluCMV7z14bX4Las +rHOII4wXKW9yZ/J7Dnw/WWPaEGXwOfpgF3DmrZkdtvG7Jez9eoE/23h18JsiJj1uPiiFaXvvWmwo +ZcISPI+BG5X6xwON8XjMKCJLc6jrYQ4GPHsxkuERrUfRdTyTLupEi+BkqaRlX1Yc41o6VTkY6X5J +flojCl04JcO6riLM63+op4FvMpS6269YVSgi9BkHoFKc4i+fS6H4stUwYXNR3pWrGSfpnJFP6IUJ +cHlZn4KQr+sawWUwz/iBUKjw21FvGZGef0O0NTz5cWD7PztWR1Azh3+vqI7xysTbEk3b4APg+Flc +D4l/psgd2QYb5O/n5DrnxdPd1dEVc767yLTKxlPrUToRWU0N0t8j1RH31sRCkO1UtEDaIi3bWH+x +vN1wF8u6Tliq+MYRdYUJAHP7hrbn8N1uBVAZ1sacrrHRewK0JPNmHdmZgmhmwW1UBdk7mnXEQIdI +L/g/apSsqhrB2FJRMD27HQY2+inNLYVwhnnASEwVm9xsR6IG6B9zX5odue5WhIPgCuY4o9ThaJBX +p/vT94xpNTiDmFxLMxknFaV63ct2C9EKYuuioDc9uTSKzSB6Gb0hSHpyikPHEO1uGU4C0mn0QvIQ +0rXecVCBut2l2lvawkgFrKDLkawyNTdKdTgUd3lGxaDXwLVlaf4JrhidFPRKsZiBYl87vLl+3nCr +36K1w1ysReDKPIFburi2cQYe/gxhsHpo4rN8kx21Tv8o33zXCEk4p2gw0gZVTyUgfnGyOAY6Mr76 +2oeVnEcsa117X99yLsJI/siP6IXRSk1iULlnLXqTMAJe17i2FoIg0ikXcR5JQwtdhD/j5+I6yBzg +Vm6zYkDnoXB2A9yoJfKyZRA/k/iYANblObnEO4ofY0NNKspe/NRczsDgZptFI1zppKOaQP/eSx14 +uIDiAz98DRPxYZJl4pvAgV3kJ5u+c0LplrzV6otCdKm7G3IKvaJSAoj+DKtWdfhj/dArYtiATDdk +8pajgzJ2//FIi0gGjLuI8KFcj0m0LpSSTPBMF/VFkD2Lxf0DqgxSdODdSohnpCOmbZ4bqKNq439l +yUSEwvpG9qZ7WsNrFO+MyLWPLmnx9kGuzFaEBNAlilZAeDqVWDHBiQIPqeQpdZYghviHaC+VZFlB +HGhrC3ZINyh9xle9iZQN1XDQ7GSD9DdRfUm8lLjN293blcgiHv45OYsuX39RdHb5Is+q2R9EWwx9 +J0dMa3ofYa0WecC/Nrt1Y5l93pYkCif4MhfQbGGw3ig6dIHkzGrniSAf5/ut+hQz1Tqik5fAP+ue +0dWCxKfGufVg2Mrha+Xe3c1L7jN7w9zBj9EzE01LexK0T0DSzU1rzbQCWwb4PDX/X+PvmgXuopHN +huTu4XeVZoB35+Jh+jHjamwaqMrrvTRMyzC+qwc1ene+4RlOjnxubY/FHLc1ygpJIJH7VsCfQB6X +oXQIX5Tm1EBdNxHELNIqIK/k6UbYKQ3zvVX2BoxwU1dotokThFfBMxj1rS4qutTympoxRWUVxHiv +FTTLrXMnsVbcj2k8TMObnlTf22fZJeflC8sqLk48CdIqI9yuMokREOtwghFT+tXQmIZ5zMC/tZtS +cb+NpWBzmXTWEP9eWBDc0aN6XvhuqA11ZeQSN1OMEsZrwzZsbUJSs93yuXqiKqMrZPpw/S0TfRRH +GS02/KlGx1Q9M8d2DV0hg/KrlmkZKgo4xVcBlTd3HF+ItYgis1Fc1VHQzB8rSo/jLSSpqj2FfD+V +d4avlhHiEPVwp1ufrf7R4SLZ9D19Gs8bXtMhLj0sfSWb83ybYCUgkRCCY4KdKvxk6RSj+n5O+OOZ +8JLgCgleZBOaxb0MeLb72PCDAED96mqAwopptXaHcWmF6/u6AZLsUuoAAD1Ynjr+AYwPy1Mq7+Vw +fQT8IdCssV/hlENalmGKDwEC6EzRr5YinhkgyW8a4HW5SXswNzHfJsOUQrW9ka+uM1riVdOC3eoj +y75Z/5Qm117ji5IfytiNqWLcaoYQQHCJODgzG7Jha0lzQS7gwfZlOwvYVEP9AmH9BHGg2hzdMQSt +5Vnr59L7vKL0mspfFO23CSLUzLN2+JMlynveKHhHCo6lrWF494Ch/YApq08f+Ewr3HceoJyvJW5D +hNwiWj/6Ue0Bj62bsbP+UfXluwHUStgXaPklX8YJRtiwy8IWRx65Wqkf0apEthTRE+5VJeUYpr+C +WwHJ9/Gj9BpdIk8X8Fwx3IbMBL+cuc+S6Heqr5xQnS8f1DMp5rCVUJiBuJ/Aj1pVUcfsK/4ZEHZC +O17kJKGOfLZHAhqvpazmmQMWXL8pNyU+c1gu7Au81YJvBufCzIS74GWRXW2EcEppyXStVXk2DMXF ++RSMWqcpr5F+nHkYEjErSGqI8V6PCFMVawOgUOJETF8nrih+GA2J9K4PCGgboBHn59oTKXlhF7xq +kSki+x1fO3NgE1A4S0iagwa5PtY5SHmYsNJgnTPsTTE31GbJ5Jxko8V3k8br20JrfxwBktK95bmX +fwgmHkv0K4KQBXcQeH/YO/ayHEqsDczOlItmUaecwTzLqcMBxUjpntK2FPLO4Z6tgUk0h48+num9 +7Tgm33uDqsQQ/o03TEUKJKDOCsgEgEMfx7YaKIC5HM6oDOVxnPb/nd8vOtnMvVhEpEmiXdkXURp2 +Njd8mOrnG/ZHp9De2qaGQRCbnspempFt5F1+0SM/4XzE1QMRaiem3A4vGFpCLDc4wK2czbjz7wkI +Ys7ssZcGJk9CHbQw9USLWg6A4tveaRbPEuqG6S5foObXgYj/GuugnN6JtOimbcP0oguIOxrHe8MD +iT2gpanfMw03t8dfAB1SNDj09KSboPQG+72XjhWPzDw4IczAB8g2DhEpxndvYS+vk45OCyyzMlCo +uqGUBnRF7J21ePY8e1WONsvdhQRbjIwFQGzT8Gcba1A4W/oDuj1YpH8P3O80samYA9iKmROWjYfT +QeqinhMZUpBEdKY3i7GruhkS2S+MIX7U3Wz5GwWjMw9IGXwviwtSVLaH4AG8/jBZVAfGoP0yv5c8 +NM5MjCofiEClu/YsRE51qrB4U4FLlzO7fA/c6OuekgH7yUhhWg6ymgDSMIUJyTZY4u2ku8MI1xpr +8D5rrjFdeypdfsGye6rkaqNXuHqLjGW9ztN14GNkSt8ojummfJkehucKBQprdd5GIIL2BJllvnVo +SiBYtiuwZEO39nuO+tmJNJtarnpJqLRXFD8e/rYS/YFZxO+rgVu5IVryqiDu8NrU1k/pIjbnwWWs +8xxabQK88UCMNT7UpezQHXFKGaF/rEj+KSvlmN2E3TQ8tRnlbPKh8P/23cOAIafCtT8LYa3x0ll5 +6J6PcuZxysPJt49cTHlAS/FRUjr1zY2tPVbsSaieFE+8apYGnDSCKARtWmPQL6paZWLFD2Xo93fW +tnxFHbZml1X32NeDe56CjpuQJAtBb0dHzxq8Yoz2tacauHRBuWLnx5/5d2LbMYGg9pQ6NgiZQtfC +e5g/MeIiU3xRoI9E8m67vjNftOWXukfkNOLLYgkK5kC+SpBkIi5nD4taMfn2nPBFwdRw573f36P5 +8u9lNH1AuQG0e3TDQSRm/AzcBqEQABu8LrJ4Q832M9ib4MGMq1e/4YeTIFiZWyS6VUbuUK0w41i2 +RvMYKIL/rbWMh/0SxTP8BTEwRo/3lm5JIvgPfkAlnafqPu7xgLk3sSlS+8dZyOxeMGVhvbG3JVA0 +n/t51n8Cbq9/UUqkiPXV7OuRzqzmp4kunDia3vRGRlAHR/X2fED5eidFbVUKeZ8/4Zcg9pOXcv70 +oF4KULg3hvAk8FBOW1uUwjuKr5yE9fx/3BJhat7AjRGpv5mp2lAEMYQ8ej5eUyKGGMNEGPlhCDSW +1zvLroI6UoiT1uML4Dno+5sbpE1Af8cTtiXeVOsmmIihl0Dhvv+i8koE9I+71X06Lgk1tsbfnLYl +t0a4ui3umBc8rkvPXguNS1avGJuWDfHZptlSlsU+ewlm4bsnX2SgkqWWo9ucurEQXR8huNnY/AIS +ofXwNV0DJwj/10iPTqijOfMDPMcOMly1pRIng43YPvmyOBLZrx1vMVYmq4S3daNdg1SJU4kaIP6u +5eQLscnw1uTt7P49f2+FnsYNAqCUS7TpsV7sSZEcnCdk8mxeEYwncDHNrJKoeCjeAtrZddpJTgI5 +7nyaI5WrRDbaNcqi2poEeEUzysL8QgW1qhMxUuSa2gXJ+VDjv8ayjrDQ219pqzLeeLbLmrnD45PS +XKSEjP1RXbZSCEzxs1QT5HdLtmi+Z4OceWxbNp0kQ3Awr45ClxoeCnLkSP5JiuwFeSwzOSD8yS3a +G9IkxPX06+ioxKfMBWPJhyGuiOQydoVy6TYuDaOXIEwZ9ZxhzX4hNSXv0CePW4NC+szoto0nr+ry +2r8/cC2vBGaYb5U4m3JfSKHqJyxE56E4Ixc7dORkpXui6LjeDSpfbPX5mPGVQUB1WDLTNzLHR46b +Lg4+0VWS82gM9rOO84HbhwGZVbMiUvJWN2JW3C7WWAtj0Y2NVYF7uEN//26kioaAF02gPOyDNzDZ +fvGiJ0081I5xmRQd5CSgtVesR5V8wz9fqv/mcedVnwcFZoufNlOiOJiBsUMd64eTJwimV6IFtN9/ +qAPcDLAVZmMlUUaz0/dInY16h6t+r7aSlYuADvtWlFyIjHWHp7VsaehgLjeStFg/teT6jFuKTEIK +8BDTMzsFJcFkfNLDWGPLWipc5Ns1f6YAwsWvP1x0L0ieBQxdvF6ima3IZttGCckBVpmj6VuLO8XC +GEKbota47RbmyYpzVl5wt/6WvrukXizWPIRxNzKinOoqcgGdZBA5B1jR4H6x27/oOiJZl+lEa5s5 +I7dtRFkS6mRi3399/xp/Uw053JK4fq3es9P2EW0+F1KyTVM08tjqKp00HorQDgFPCFY7DooIzxW5 +SaGWVv65V1Npe45bshCo/MvSbsCv7mapcs9fkAoKHE5IRAdu6eF4b7J87Y84I59ffJISZyhnAbTZ +KPsemChihIG8SAj9LN0DlJrgHF20RRRHNAVxtIRQNtvN9wDBPVnHOcfcOxtG1/MiDVxdaSgMfS0s +XNfUFq80xYeHUA5UlydOFKMZ0Uzt27OIWlNkoH/qJHCLDZHgAurEGLX2RNotA5jBTLYsmPpxw5W0 +FhvNu3iUpRWBlwQqCy6ayaX1mXUfUYNNLTk/u9Es4AotN58nl9+3r56N9wSzVLBVck3uzY3gkpue +D0tfplE4OxRrbl1Pt96Pu0aZ2smMeHbHIzsOGirxFiX4jMQAfM2/PBB6vpeNeqrErZYZTp40smVu +jfWCsOUYU33nNjFzP6mGYjR3TLcq3Fp5uOEH8IPyvoR2eWwrWOz5lGeZ7KPMn7hJJGGrWis0tySF +djwU7LrJqTg1i3p+8ieTfdBU3yFCDDwycJ+XkvSxGzv5oiXl28JIYaMso29mAg5ImtUK72OmkHii +uzZj6lybrcDr7Ex41M8a2dC/Ib0wN1MdPIKjqTWv8EiNsUMLFulL+nHtlU60KwQcZVcBbTgNo9CR +NHZiaoaOGjDoPo7LBmOVtIgeCdDiVolUuJVA9zJdO1IZqFpuCsBbsT23f+P7yNbjtMBfZ+56jNkQ +NASdRT+2wvfBQHaEqNidwBD8gy4ttsae9ThFoC63DWEas84cfJ8I50PqNGznUsuVa3XVbFlxdd5h +In947ippW/vWaFDdaWQNAIZkL4O7EdcSsam5tezTW8IHjb/tQrIXOIQ1POWaAatPEwxxBiD6+owd +jsbVEYCYIlueY8Exrp1PxTifhBeUAljrgMOipO63x1Acd4V62eua3z3UKLYWTa/wNHTHyiIT43E/ +gIV/jlkwOM3UqFekD2p0RoqX3fkl2S/5sTP2PFvjSe2ewQ+V+sy+nmEt70UIGhET5Nsx45iY/J4o +nuRWAGCg+HxHGH1UTp55qHaP3x2jjtfyZGv+onaVCWlfW1zxCiUxYlKiMBWSUbEd9WQrMBd9DiY9 +07uAHbtqlorhmRpOrXxJzmOzhWvNZtqXSy50l4/F2rM6ydtWD7FBbuOtel4D95JopwSd6ajPgrXu +MvQ3gjs+UTGJLbHUiJzPxia2uHTvvUnKKzOmG5DNug2oCd4w+kQT/ERlvuCPV/5scqjJ+NE5foLg +SWqQzho/ZvkZIgm+rYvF1X0Q0LXdDAFfPJpOUGXCuD2R9ygliSJ+6MSViPAEcpiQFp6BLPYVYBRp +Q49mFYAcObtw/7NEDR7JEi+2ECpLs2/Ap9s/t1KJRHmHA1QFGpT560K/CgL3bM4bNc+MaYYpzEXP +mKXbBIf3iCmnul8ZCRjy/1eQqa0xTbql5oLXkyacgNa65OU4FF2Alx7RRFnX9hvCCzwjAY2RQsVB +lzKFM/F7pTpGfKdQyTONkORCfspSDAXA68lx7IXRvDsBNwEc/NDX6bbhH0tqoC6fIWeDsy3czP1S +iLrsejPtzB7dOm42gFm4smjaCCIMvQrOotGM1ddRQxDv/tp+yK9WvvBp1UCNKI9wXGUhmS3/roA3 +NIn/Pd5taQmkbRIJT6hwIUCF5+N5SYxI6UMnpBDkTCCVskemAlPq/fmjCIArYEu250FAlWKgk0TR +lWihAFmvCqKyyxr0r/YalKuyAFqXw+9WSPIJx8qwk3wif17TKhGxE5+HyMXGT3JbgT1YmHQOLbZ7 +uQkEkiiH6j9Uw/Atz5dpKj3wu4YPJ9n3T3MX2DgfenbbW7q5kzvundlpYEd8pzMP93hhWPZvQq9L +XHFl/t2HVAH31cFFxhgux+O2vuggWsDQjpPLM3lQbEjo3khT6qSfaapFsp8PLaAqGS9CEQkRioBA +ury/RshR2RdVJUh8EW8BEIC4qrZVq93915dh43RS94bOQeuAabu28JY0LL5PnDy7xKgaOcNwmKwl +EDox5sC1iOCA1A1v/16KiTQGgBxghNo7lMteRIZvrqRXuzi2ltpfhDIG7YuXCBNfJ/H97kvgv1PZ +V0lTYKFg77GkSo8fOe/v2S7l/1jgUZFZT2cKT97p7/9Y+Wb7Hop259G29PDNaF+COwO95byZEhnk +ai7A8r227cYtofMrZOh4T5rCJXSeUMbLywfm42gm61C+hRiyRRBs8yqVHSZsKkKVfqxkScIEeSgw +I8EybHokbW04QAXV/9Zvvi0wI6LqcroiQ3O/NUMXbqScVNyed39SsjGBcknv2+y1Z8Ovx4Sifmg1 +Xu5pWJOjbxlutPR7eU+EHcQqI6Wvi8S/R28UOpm6bMuRAIstyNzDh984saHTuwGJGPpI8x6TVhce +CRRmzyIhBApHYSEFujrm5Wl/egUXTKomVofQ00aQ2HyreLsrmTenP6VqfPdJhhY+F3LDyszLvVSd +/M1PCCnmHfFp/d2Ndf9Xx+Kv0yprwDwEvuVgGc6cpAcsd165TuXtT/HFPgwiFH49o5o9zrbAGpWc +8T7DiYJ1z+P4TW4JQCCXwyUN7ZCzVwu2HOGkecTWuSReFwhsq5P0oJtQoU4NBLxq2BgIhrBpQ2nw +Cu4kxx3BfJnTrDjh2TdOq0jqULwES8xs3VQ4Q9fcmSCKh7GenwdH9TRM0uYx4D5cuQht8O/HZmW4 +9t5rbgv0OJm/nW0scHw/yJl+w06VflRxfWT6asyj7jRucKmyv4RLX4u0WPCPQ0D7P2F4Icw9s2+K +F5OAthJTKlo2YOwtY0nbCQ5vxX/nFLflA2rOP79luQdZySsyaUOEHSHg7rU9rgBbxN/kyXRdMJKl +a7uizkR2nAM78zOREptdqYXoFPhYHTtc1D7zJ95zqEjutoR0MrSfSahT9A7/Ca0lsj+QRsNzJefC +BenmX00q4MkEtoh0uhASCnzfObOWgCmPPoLH12h1pFI+vhNddVy8/ic8sKjagZRhriA8Ywc1pUp7 +crv5Y3qA3mFVbFKBoMIE4TtktRdgaLVgnxpJOSrNbAKrUmqHB0h71xGSiN+rMOl+rBF73H/flKjA +G3K+nDzZsQr9f9zFQKtBwNs4Ia7r8uckrns6nx3nAJsabLiCIS7FhSnaRj1bZ3ZblfJ420iRYWkI +StYeVjgk8bnIidHumkXwM2Ur4rZ42BmJPBuSDmeU8MnL2SENa56G00V/qqJ3kY6ieFF22eatJE8b +oxTwRTkaxcAyRXD4iQucp3kC7agHTaT/fRmx5vOPlLqO2xlZ3InJPfnIbH0MPzY6tSSQxTLcs5oZ +fAcE+0l8kBD3Bf07jdperRsHfpiZ4RJXXveQ46lRTN8h3EDxN6jVg7q4m5utBHIAlip1ncwNGkC7 +8uWCahb3DcXOCYdeIDIJ5qwllkyrVmjMAiVqYM1q0Qkf54oLrx+eDWCLkVXLoPUJFoVHZb1t0VrY +rDaY85k9ejygjp81QvYowkAPTA8mKFnI68vUQeCGWZyYwf9J8+VrSD8aXTojRZjjJjgTxQ68inOw +3nq+uD6TljSVdnw2vytKRztRtY3N5xoabBBbDnW065sIUzVaQ/bMYmenll+fcdni7MfCy+1LBitm +C/hwJO3/SnEf2rwPTD7r1OPCTdOWb0SgetPqcOuPptT8SgA8AbfXdCFMJI/VtnnDatDJBxx13OOr +OqW+7sesGM21qmGlo9WI73RGZilm+HJoQkox9bIrC4Q4WSupTgwkR+zlSSKhVYc73CxxGVw4I5T4 +lx7ra4gTdv9AHroUHkkd7unOqMWzKhZdobb7O6YcaXimzDsugPaNwBrt3AkxU6T5GVf3XMPVRA+V +GXFf5ZZxV+yb6hzECfYBv1G4cffdjTzv/I1X5Q8YNKjsscminBRHuGInOOhUWxVMMKKuOJ5PmxJh +UFWotXLMcZb2+javzs/Yd5cJYLbPiipXpUlw/9aCKQU2iBhTCSQ50n4e5dGVvECIpR0kZOBn5NrC +g91dYaozwOXs5+AzodInFEA6l0TcYu3zlIZpGKm0REBFxnQQrvPmx65yKuS6+JYRozyb+XkmB0hS +typKjtBcZNLQtOZFWws5KzOn42Hp9m4O69lWXLUKnrl1DtGdN2r5ytQoBU8iXnr/ZumN1HYb0xIE +Q6vkeMLA7RZYQRkZPdCmibigBfhwiYcKoDcNM6lW10ikUy/KF9g2Ot5F938XKWtMX+XtDigrYKBw +k0lWsVOahWT+sehTsoNdYi6iDQOrHRap/dz1ESyu8UUbOtHp+VPl3F45N0kcPfXy32il0j6gPXM9 +fBf4jHxm8NTvYjCl9Iw7FHgdyXl1FmBDRCQnrITccZ4dqivOO5B2hwA12DDgo2uk/zek4KPg84fO +PBlGUF/iAkLT/Q3XmorEBbeSQP3pddyvoD06XFLBhPDSzgjMBRPtfLRqyAsstD5DRbgN0UHdpQ6U +lrSkce9aVRPeRZhq6b9ooF7ytaqUaZmg6rOND5AsLEjIhKvg3l27gEAO8taMSPMKWXw2tzcXI4CV +0RwIIDEGxUlSE92lr7k5TId6fFRuFcDH7KrDof+yRwqt3leYI3ELhdBYnI+DaEDdApxwHA8Kqmh0 +t5tswWNpowLT0oRsS/jn3IbC5/BlGIvQjdQzVokoMwiekxnxslbP7q/csKcTpPlBBH/lxYJtWGPP +piCx0wA99tXwjZxZ1q9DT0OBrGSbU7Xd/fwic69o8uePMx6G67pBOn/pnDnXFZQ5/7/vn//+3Oyb +yWIU3VvAX3I6Fq7f6pdEgzAHPZL94AB7QSPqmI4e+GJBTPcEltxpiOkgmoQZdQCIVw+c79iD5QaE +eswbFagr9kY6CzxRVfpyMvDhSMVMeTdnHRHbttu2+7t9V3xul/0vNVDrWhh/mQd5toLTCxUCUiH8 +rOvkACAqA6GfhWQav4ixscJbGhHLyiMPahHp/mBAb6csMCkjKEsqhru7+UGhRWY2hygJJqlSaAEF +bDgDrvRWxAi7OwgEDy5xmiSVDvm5Ifg+5R8a11ldg3BpLVDHBPnxOqp3rUqwG5wcLX3163r8+oAF +iv5MLhWy9pXGt+dHoDA/Am3/bIdta849+8ydIZV1OYV43Tfy7jIXktp8EnNFeMW4JIeh92h2sPkB +Y9JoZI8EPMrop81pXgPYQTxjf0TAlV1mEoCvhDI7och6kUQL30+leuJNDWPqhDKDTrU0Vm3FyLeT +mVIumSYODtv76V1znzbuaalgbAqjmvxVWAz3pzlF706/b3Dqk8gcjiMPSnIDPm32SV4xca6JzUli +ReGajQ6DHzWQ+haQxb737ijzOogchbQ1nhvW+DHW2aJiKWxlV1jUW5eTXr9l7dwWTAE/8fWv36Jg +ULksQVTnQ2yfx6mNzKH6wO/ruiUTzeijr1WhqajzCVFAIz408q6iCy+ifWgxlYJNOIpn9MT1qaMY +NUYDZ9kn7H6ACVJzr0OlV6NUxaUKj5/7/vTXLQHv2BCSAbAEZPHOePQvZzRkH9RclsJ4o3qI9HP0 +Rp+DXZVurg5lo2OPy4iAiLYcRSybLeoHz65gfs6doDzJMJ6pmzR2+HwGbNioA/12NYdeU8gxHEIv +enxskWbw5TnC2oA5nt9+9QSFJndzLn97lpUGB8tn9bD0u7KPRODRmO3iVrSSlK9kw11HU+vau98s +IPfgcbe2RUF14JaNRIEsZT21hWuugs1rtnQU8bl9x5NC6pelR6Ai72uWOxCP/s5V8eaNnmhieVl7 +u6507KsG08Ps+lbzPmAEJI0ro/mgdmAYTeN2ugbcy/+L75aK2Q4uOwUaPjOSM5yIAKXC6+kVyGvf +EqceUnpIc46mpfJS7YyhnLBAzXXSd2hVtmMlss122pRkVeFtE0zg4wbxZlwuwtkTFMBeN+9Qc+gg +FDoA9W7oN9LAG6YHTTFP2u0+qOD2Vbbo6s9A6lIq4lmaF6fSeelWbu206VbBtmNC1T0qPLlPGfXe +8B3deW6IcIhSKvdf2FwrK/6ROXDLKEMKF/a3IV5eh0wH/TYjNw8Kfm5EJ/ux6XyITFtlJI2h/6di +wnkPYFhpBnqIwaQ+kCelRFSDiN1z64rNrEkZMZYCRgJ49yndGEY/q0KWAG12n4J0kXDG1ob1HxvX +veb0WAHElw7f45PeB+sXDFmFzSdg2KDeRr0NrD6xJ5v3AzbugzSqC5WAoG/gFta1Kz6/FNekDAaJ +E/EkCQXz9B+8WXdwz5rK9rWYe2lldh7lxTngdz3RvKONkyw0KntTjyVQkk7UM5a0h/wjevgSuNmZ +AjrwRJH/jSFavUJR7BPsz8cUer0QJwWs7Rwon41Y6uRM65HCkZEbLAor2C2goUf3oEZlNwlLMbjR +OwtqPeRueYEVcYz9Ycs54Gxl5VMYsiutrqdo+nIzYAdC0UXY1ZiVw7LaKgUNg8PyQMrd/QTW5S0C +Qw2hLFgw2d7RtvdimTUB3Pu8YGrNk4LsXLwwbfJp6/iaS9gmmpNh2PLsIaKtcBLB4Wr3C5AbaksK +QyYAfP8QRIE83swX/9/6E5Lb3SRQ+oj0HKfZgw7rEkhizzT1y5QfI01MkYF/NXOdCKAibjAUZALI +Hxxavl3g7opRMo2rOtZo7lMlgboX2pcmX1mCAxi9qXN6gSkOGxg9N+M99UksrMDrbmmaOo0Sd/cs +8OgJH6Px22RrpRSoeFr47I075j/3je0SuS8aJQM//GZ+RCagcS5qJJ1ubD3fXk4fPND65itpiJOH +PuhiA94MPTGCRf2POqaFyOEPDGJW1Tr2Xhsq6ar3C97J2omGK2IkEea9DW7YkoPazS0v+tqTW0aw +l2ZnzlKg+Eib7J6wGY+zSQ5Kq/ZASjiEcrkE8e1pwILYnfTVv3sfw7CR4TMP2z9a0lO84w8EWrw/ +eLKw5Rfof9P2dOxnPJEcOyI8SHBYAOXDhDqckSsa0zTqZlBd25qAH2b40TrezMEmzky3IlwnaijX +bEJwKGdizyahYz7zfQbO5PHxso1ZBJVP95corAOSjZjbYx6TLInTRrq5NPfJ53/FGnyQrAwHenA2 +ztB6OIUQMwjs2/E9qfN/IUx3e9Ldhe+XOiXbwy0pU3kMoC2OMBOe+LeS3Ctp7vdeqrtGOe+tX/QF +OKkW5DBd1FwNcqVA6Ts+/hKxQh9MPmRgyHfe7LBEkyxaEV36l16Y/69nCeyaB0QOf8ImIEGm5C/d +XMc8Qx2ElZDH7jq15aF0uttzwghMq+2CSD2jm8jZQqql9eer3kqeIy7XDRZzlwPpM5LoJT4vg6G9 +JUV4f6bJm4iDU1Rjf23zJgCPrgsNYnRM4AYQMZWhutDGI0vxn/orPaJ6820iq6Z8rLvGRRx+lHEF +2pgovjl3H2W7+3nWvSlsYYQfjyKwja2fpCsVuruKTslVgecQ4LY8wkXPhUkVue/jWBtVnufmIMu4 +A/HeRkQxMoUMkUeAxvxEtQKZuFxO9yrjqNYJdJhMdODDeuALx/0tJ63BTyy4MPT8w553s5EzKVdv +EAi+Sxi/yyBsl/M8gCptHqI77e/Z1OVDu+5KLiwDQsLzfh7ktWlptdSdzhHRSAhCD4Sz7y0EDlay +EZ0ZkBwUM4NrpuKcP1DExSQg4RkdpG1NYL2lxFQbJOMzghco6z90m2x9Y9ElRQLNqRg4EWI5ycBQ +dhtNtSplT1RSH8lic4pxLAXnRCG8AMSHS+odubjzk5Q2IXsjo+HKtrZD/2LH+fb6ZZodDdh7pznn +aMHrdnKPz3/ew0HtwB6IxIv8k6oQcEs+qbGvpaFZZ8BLUpAqUmqeVLy/wHEsu/9vmRD+ipDQs0zA +KKNO4m6t/GeqeDCC9lFaSfdOtkr5qNMkVJqb+KehDXmU7CnvzFqO1FLrCzKMZqfIj901Oeos+vS/ +C1QEJSmlnjbjQp7iyVgZnCyGD8/bSRNn1Ohy3mbIAqENGHRrBXip/ftgasX/aHq56BfPFgymApkW +57JUnB+AT/a9aIz8664UXun2vSzNmvdsNmIfAkUgGkkQ2nrFizvuj51ZT4GBSc4BQFhDah8T0c4E +MbJAwMmjpy9HSh85AgVD+TMpEOCy2PjSnRMTibPGtDyrkj3B5ser1fZXdsLk9+xtJAXMgE0ChY6g +EFRUn9omPSWUgsAEnzxubyO/z5MCu3uyS1xIfaEbRWc4gbL6CbUZJFgX6TePb7nq1K3+oR4mgwrg +bIqpgkxtCjYxLeBp69bk+na709KHy+VYwx4NfujuCr3SxN0hRJhgw6NW74VZRzG1sGh5W8J4Q8gl +y3wTsLefSNtpFR7v0usrN9e4ui5uhzL6uFI1rh3uIQ8CBJ3hjQdhCLq/MaykOboRyuyfVHhx1tXv +Sc7OoVRIJpJdJW7u8Xtn6u9JPtsS3Wl/Ci4hXbKGbmI1ry2GzxweRXuSS7bFBYYiIIWG6wP3pM6T +rb7ToRsPJv0cQtMa722hVmB2EoDCsdR9q+OLSbSAlNmjSF5V2uwZ7OlME/QiGJGmZTomLT5hOMp5 +BTOt8Ffzr+IcJp6MjEdMb3nFhxd3W5EObsY/Q7r9m+EQVDi9ZLuCSZsc/e2w9Y7UYJA+hg8d+/sC +VwDEXaO0aBRzRbWRH39OZVFWj6uDGuHHicXwsyPdlHKC9FGE6fF3WdhKk6CkcpkXSUcQNNmfFck6 +FAofa+a3leyYSr22EjEpGYNeGlZhtH5y6spHSkrM5k5BzkBUCTJPCCCo8Tl6502jqPNVHw8MuQ5C +xDpaJg5l17L9cRkeFY4PACH3O848ujddSzgzWNT1e8O/LaTE+zgHcR8sycPCymKgXUGTzoEcvgUQ +FNmwbTFhnwQHWTIol/5U1EUfk9nYu9EhoYZYr6BRH7XkXBDcp6Jz0czitVGO9Dw7EYiW87ugFWky +qArM1EfSYkgQXr8HtpHa9y/tiWI9jWJEdxsQl7kZXDbHxIVehmyQkBwO+cBAfxDI+YikjSmbwMM7 +16iZJdCoouT0B/x2ZZxHyLYGsAe4T0TlsRGUTrU1ZDXj8N27N24IbcNXV24y0arWGsngKi7IgyGF +GR10N561TGlOaR4JI6G5cm286FpyhWMWP57Srg6vbPwRr8W25THlOY9pCC5Po+hFsUfXXLCd4bqa +tKAA3wHjpq7pX7U9EFqZ7BEjmR/BzFEOeheVvW9LDqZryPvGq3fFVoUF4TCXgZGszOnKDR9M89jo +sTZMl1W4RHvScCAMW06/BqUn1I53C2S9NjBM7OYdw0Pt0KiFOA7tuLwVXkr5UMf4fQAMnUmZfUYO +6c3PWdOHCfNP3C4eK9J8nlozluw3IEoFxmgXwB9V/mfZymyUsiihSQOKv++tQ+3xSC2EMSZj0KD1 +oGSxR5rOBSgppmZ2MeFY9LR5eeF5mibB0PhEoAlstIv3z2x02XWV/6DS1xZ4ako1w+63YnjWq5UW +oOh1clA0dxLa4Hfvuq46JqfKASwBbzZrcyGwd4obOi+7Gb8bUfIqpg3skff93xkNcw6HZdrltNB/ +lJJTSN5wcWIgxuaSVz16cq9DRbdaUSFbdt1kzPypF6lXy2CkfxrbaZ1o+fESQIhJTnHNr5DskQW6 +uOZ/2bHcryn7DSi8rTqo+IPv3YlFrVljdPYBjSF31WfxROQLkfmF6DbcKUGv/fharamJBZ8vvQrF +Nm+Sz2sWPhnibBwdnfJwoNBKNrsyDBJSUH+xwfNHzRGMW14NJMoB9jdHzMekgNbHF/eLEbcFd730 +r3Dk1szCNFTkYnEqGg9F4h7jevghIBfndjm7EyTTjzZsHXT74IcY0hqlz1jWIj0HI9LfcurINmlC +Mr9VQE4CA1/qD6pD8g2oHKHhk1A8fKD1dNZQsnL3fhV1aFg3ow9Z5yctLVKZDJzb9ne39OdYAWgb +i+AT7e3Uu3hcAGofBUKAprIR0yMyz75Y1BwXuHPZ1hfExuBzW1L3zPU8WvwAWprcUpAnQNjtTYco +53NUNwKKbOJt8gxlpYnqibDib+MUczbHZoMYyAdA902Vt3yYylw0rVLHoeTrsk7W98A3B6ddnqLp +/AprvVOkPNH5gmXz5r4+MZOrMClwta0rW5jyg6nvPlQRE48HkDDestAIB3tXxT0pYdIPlL4L9r0E +nzOszX6eTM/+izKGi5gZghEq9e0yW5JDJBkEcc0CR/nwYOTNTYOperLxzLeUb1VB1fCr5cxxOgwd +P4Qu7KsG8urYvzAEsAIdnONe9h0IBeLrb+gHVP/1Ut1FWFrqJz5CCSsPGOJ5sHUI5bMpSe4KHyUE +yJt2cJYr4vEP7lYjmIpRxRRFQDICbmihYX6CNox/JPGlR4YwUDUFoL0CXSJ4tsnPS7zhzoEuwcfq +0qMRdq4NaqsqxNSkQGaU8i7yaKUxIUYZdnTBDHoYu4jAZ4UCw+H3MoElwJ2I4GJR/HmaqiK4OoVO +Q165i1+lozG8T4/QSLNCUDv9huPP6/yfyD3vnE1286nsUiYDeqgTbXI7ZQb0DWnjz32i2O6WQcJ9 +x4R7vJeOF4nzs4O1lNmz/9sHNzoqVfnh52ZhcE3PIfXvA3IYRbCsSJiAXLVOt2g3BWb5SZgiwCNm +Jjd80siLt8NVjD1vB9lE5r00VGi3nobVMrGgnwwSfqCgjuqyXQTlsFOUfR4llGjtA18/X+O4b7a3 +Wj1UNWvo0dReDF83TzpGc6cQPZ1PSmXJh9DFSALblm3RrmCEAFEIS5mXVBw69k5l3wnDqrM1qNec +AJIxdLk+XlxjEICelurk7Rw7vPjTLvCsJ+Mvpd1iUUW6rJPNBVW/PKQi51wvze10STG3YITdr2hK +TdyFcDPRWW1B2z8FibW5hWb00YhvA3k0GV9d7vJExUcmIU+OTqjpBw1MfT+hIKhyT70gHMk7E5xw +Ucxr5WQN8SNggtgDmYNrZe3HY2Ih6nrQIQETb9mEzjpYtUN136Q3Wp5EZ7hqUksX7XqMynlhAbxS +4bpwYHJciGoxTAOcPozrWcOdcakZdU0J5EgaQVkCnbPLePj2BLjk88l3V/QfHb9KqnuxBlcupaN6 +A7NTQJJjXdV83e8O9Bp/eyWSslQrBnPOfl/e6yM8cTL0yCT6EZXwbovHL/bNlBuCHR8+p9tokWiW +fjVNGaBQ8UJ33dOYNNoPTvLAi7yaDPvoNKe1Dn48z5J0cZg3ztDfBgDqqYaQWdHYPir2RKtc88mW +s4W0WK9Qb9qQpcWcSOdoSQ+stcIv2WD+VbNN7cjYPN+XgxcRrclBimNf2lBvvWdKAOsg5TFwaWs8 +uescn9mys/awR/PNBxCiAP7cU5YDN3qfkScD9/kPQMYotjIPfSkHsAanAlF1Krn2KK0PyTaUQJHT +cx0KeC1ZKn68QUM5cg2TquGp5Mq655M6iMufTGqxrSssOVvCCzIo0FxTSjw3SlEo7slfKnm1eKeg +c3Xdz0OWFQ+3w+as5ZlBxcXlrwk2dEO1t0h19Em7ab6cZZqQg5NPy0OgGqDBzm3PHaizS93rD2WU +OIDRwvjvRgn6gdkKbFEhmAqam1mDO7L+3D4Zpr550gN/P8RuqEJ8DBeWrT3LSYJVL/N5CteXulCQ +/3WIqT93X/2PzHATB2rrFJTuEO4FNnersMU91a87fFsQH6IGq7slfQvTNLMAItr9glxDE/rZiKci +aQpiTcu4W09ieLhea6JF4WauwfN9aH88X35LQ9pej/Ii+KkAWg7PcHklj982e7+e1rOVjqGW+uyc +5FFw8YT7zJf4DFeObUGbzQ3LNO6kgL+sydQBAGvVg2dPSyo+zo0NiTtuHlAor7R331ewi4ih7leI +PSDdETrZrzVkY8WzT4hoan6R2w8/S06BHU6nt5NZEsgFdRd/LZfd8J5YboWktss8IhxJDeYRMiqO +yercPt9iidrgl0rhtkG0RjK9whhe4EMuDafwUQ220CCPmeseQj4Z7L/hqwwMOQzAl1QxD7RSo8zP +BXLVYI0+OPqVgeP9dL1+hs/V3ikNOp4Gwz4OvRgbGGfM/2NdW14P1tm4vDUVD1oSYSQGNuwZcGq6 +VMBSkDIYjeFfgjgfP5UJImqEGsqoCXWT4tFf3hEVxG9QGNWjfkMqFgZ8LBV3rcUAIUs7k8UYTW4Z +rIn4beWZKk0y/bs5ntuQXqpGAves8iINlMco0qTo79ttCX86hjDgWFkjNxZcZhAE5AIo7EW5S2J4 +gpmhQz+br6lDvAk2PKs5AwKA7SdbC84+aiY/hQ095GXDKhpX4HQhhrVy/wD8z08M6bs/ack+EnlQ +t9/vyHwYMc9kBDq6pG96hiKTNluXrW18f+CnWc92uVgsspIZJgaZBuXq/+rKgxD0htnbtYLqIplF +GfTEfZH9F9U/2zJ89dmsMzfAj6cgqKCVsB3HuV+LJ2RvkvcQmn5uc9aHPE3j+pWy+OUlXgXvwLh/ +YDDiTMCDBU9T5j6xz0Lt78nhbpcOHx5/8uvDfIdd2uGdA6wN/bPtAGCUTHBLp5s+66ibdkl8IfJs +f4G8ftnbLilAXZahm7qjOD7HjuVv0ag2YBAXWDplTzeZK/e3+Wc2GXWKywKK0tTfmaXnmGS5n/7S +dCRO3E4QJNRfLT5J2R4GuvO4dpmH9rwG3l/8hRYnBIY1yrZf/XoPkyVehekNIpG1U+CQ2XkZcTnA +OHndIB9Uf+q9x/2336RDUAUP55SpZGWORBckcD4M0ql+CW1hJ2D+Q+dSmPSlIG8nkCrDHJ2K51WT +g70oCVD1bbxFKCkwa/UKdE7YXmMXG9x9Y2DqdQZ4kpkBo4pDU4O00RqntDy20TkCNPHwAc5c/AqR +7RSm6SXFm7kO92qLGiDRXo0eNruVM9hQrFB+FkMNYvwj2YzY9rzORCmHhue8LUlI+aeo4v/S3shE +JhtLmXmrCydhb9JyC08megREE6n8NGRfWd87wv0fjs0Jbdo0skk3IwFSKRXmVsajNKDvEtgEGlnr ++NXCWu+Gbkbdj8Lp8TV6Mqd20xDk7EcL7Tw39tdxUInjYy3RzckIdQg+scGR6xdYS/17qb6RDidv +BF4Gx1xKiK4tm37pmWpVLGMoaWBOQvAtAv+408Si5SKl2juXc632YLE+mdsjcY4+Yy84c40R4J6H +Wx5wPW1yLNV3blf9Dg5/W+TEOatMRUhKRfG3hWSbXhTR8y1utUveoYOTeCCBnLp4oe+rm5WcGqKn +Z4j3HHFV8Cz+G5t/4OFSCJh16IyPer85A3FlzXa9rfD3MfoHgGUg9RZqRICdnmm7MI/Dok+kPKww +j191fz8WIGssXCi6T1bLswD+k5FuPHhDMSYaqL9OGxqV56diophl17ACKGzgzhoPCWKE3xrwYTQW +o11b+lYQ1+FunhDGk5Toi/0oYXRt3PCgTXcooiQs4Uj7eR/lDqPqOSyldF0ql5bo2A3fyAdyOmNg +MxeVBmhZknYBgmMFujFvmSe4FTrDh+Auwf+hP+D+okPyZWLDMKf1nrOgwlHMQdOju3lyfyixS7pL +JWM2MexZ1VZnO3uEkNJ+XAqMqS4DPi7KIRabCoT/EGplyTZYz8ZpXShLY7om+NFQ62/421OMYeoO +jz0PPObKck49BgkiGaNJfwx49AfijAl++5fvOCVcmdUmwHK/xMn6So6q/ZMLF2lW3weGCKJmHLxG +8GtfbjUZKwxAZI/Ug6JAY/jPOvOYI9GpfP0yr5GpPllIvJkUU5lUa0an3KIsH3lo4gx8EXe25Mic +8uuk0tLKIlaEHj/SZoTScCW3otWybUv17zuI2mhEsCeQXWvuGHyzr7LMPJSJR+vFnSheJI7weyKU +Jp/YKWKdeOLcJEl2ev69fx1yzBQlyMqhavMm7laHJnMpikRqNi8G2ZdShPKjOx4RXsypwc8z+3Ra +pi1v4VYsWbuItHMuzhPiDleXk61kxdK2QjRZ9xeV6vqVmo6p8abj6Im7vhA/qp0jcreqeVZPwWKh ++MWq9v/DnObjsvooCUA1YGoPTnL7CfFBxG4kMLjAOJ0xSWeQiW6vv5yB4P832UpsgGqhWFvn7UOB +M7lVbKbVAyv9yxRoYt3JD6L6HXy90JZhU6WzCuGbjyulLr+73sRSTrE/ynceBSZYgmyNX9h3OhiW +QZjfLtTZI8D2VILK6qJDYXwuHEExQESR1rILQaOnrtgLm7xXLrR6QTVeFNmlOrx7vdM9Y310pa95 +MaOrAe+032bjeBal/E8VYkZlPMyliYFT8BoZ+0GRuhCyMMcvFtMFY6wwHzhcLHjZx6wTz8Sosr35 +AoJuf+M40XT51R2pEl+1RG6BoSq3gCG7pJ4nx4rVBDtoDpzwUse6W+IrpzCU6wf4iqrPDiqU14s3 ++PKFG4I8sZDPvFluUq97FC9lcKeHBnY18d2NKm0I79mFi6Sw3HLjz+3Kfg8UXFGgzb6zWMFIxlUb +BotkaTIoo8z+aiTxSCb4jBV7mhW13MgWnrv/FtN5xc+4oJA43l3hy1aBnQuq8PZSkfXPeZI0V5y4 +Xc5X/LUDPtfussdE3vJJYW6LOIGdbG2LiYuUT3hfJTBmRQWJCEE1iFDHifsLlQq4F5kf3UEqVmaB +mx+51aXGN9kZMl7ZQkYzuhOP136WVqztp0aPEW8IMcTlq99tvAJ4ZN6a4dsaqDy57RfJeVHQNb9q +s/QDLHCWJ3MAj6KWjCaA86eHJ7lYL1EPyd59O115VMaqWaewO0r3sT1l1KieCOemsOS3pF88FCE9 +tMOzh8hhuavfvWmPQuH85G4kADymcMyFDU7zo2gmpG1JLTfiIHju7zskbrrcB8L2eGjD9fyqzDuZ +p5VBNVXyb+/H1CNGUVWpx42YhQs1euDiDX7PBmwd43ZPUQ2Gs5kvu8fNs2lzNZ18UQbRrFBlNTn9 +6luQaRo5jDtpzqdhf0bdePZ4JsrN98rqNJb8yGqXk4R7C2xl5ThrZil7ypBhYXUdsTiVak0XNqPQ +x5ta6J9dc8fg5WGiEUqKF0uNSJX5KPEWnserlyVexVolygroQt1Ekkel74ODTaRvy66QiJvvhkcC +LZEL5N7EJ0woIyLmMEtippqwWTT754S+3M1VJk/l14iulFq3/LU92gD4Od0yvsjpyzatzxqvKsbj +84YH2p72nMiBIlk13n+UbwgUpqyJvHfZ0eUmYQfFekfUJvwa1ijFNRD5V+WENRmMe7CzYUu+Ty1L +VY6qH0Znu8JilV9PZeyKY3Xy645YkRlWgAfXKOCeNrJo7cE70kHf9zQpnLthUWh6ims/7diMXuDl +eC/8WUfJqxf24KnmMySdJShGxVDnUbM+eFBtuMyv3yNk9+wZ29lC/ZynwUKsy/6BcVExXjgXQTX1 +Z2ty3MFfjm4GdD+YFftAa5MCUOuxecu2v+wRhhbVrfnA66ndzHCpqCXu80ahWK0j4a7w5ibSvzZM +sdzXOd9anWj/6ZxQfe4kQunuslu424xAnAAiKaNZaH3X8UKbjXknhCQkN6dRMuo1R+eHojA1RcnP +al69L7JdgE2w7/G8Rh38uasrzaz6Q1WM0R6CAfh8dHSHzUrfdbzLrs5BCeAyaxxCSk0KiG5+NQqj +kZStCpHi7jUwBaePdakK1wrdqQEOOfZMqpZGCzfozAe8edYBG/4IbNPWh3nqSZJyUDzRMrZKAEhN +BUy+e3+QV2dOI8ptGOoLJQ4tbPVu5OV0vxEACohYOQeuQNJgoMQD1BQOrIfDPlMwA8GfBj/YmSa0 +cbNvGBFcVuT6U3qs3ZGWP8v41eldyKg5ffOw2p3bPAHVWaNZqVHuj8HuqfDXFZPz0LbjkA93X/HC +qjdqugqapKSAT5edBo1FuNDGIlNIZwM8oER2itam9/7IENp6mHLzZ20wlL75JipA08+FtB+3cuhm +5BLA6dS7ShL3h1dpjiQHYRn56OXSmU7bxc6JPyvTDxIZqqXjxZlZ+nPcpbdtVjkfdMpj7WEyG0hy +f/Y2oqIaKopje4N4wbuL7lh1UtsiPnV+1A8uLs/cV1rE8Kg+ghcF7SJGBlqV9u0xPPcsNBTicnKi +u8qM0RDouBUSI5Ifxk3J33yxxkFG5gEUKoyYsD8INyNyH19V/i4y2EWCNzGFQ3hm6BlNkreUrNrM +ZchAa6B3hEBbgvoF/PLnAaG1HmkElxE6DoGRgSMaJzjWKb62uMaxGmVo7sciVdeiahipE6J+klk0 +13H3K8a6NNynnIKsG+mEJIDMwxI0cFEuYC7QyXGbizLTfu3BOQGlPsKF0zW5RwWdMld/jSDYf2PD +pjFi37R3fCxkNSsaV+PhJ2iKQaOhE+gpbiaF/0gY5AtPXCNjvWc3yqJ2Lr/n1SHtRnhI4BYfJBPV +m7WITik4GV1s/Df8HEX8Vf3KWgNY3P/XMZNBBlvwWfmGv8vE5Hws744l/WmYtbwrWBlUl23lIlz4 +jsyb6iA/2gRdx+dUdxTxjqw6zrcMnk/cbUBsOXqGvJlgDX/cYo2e0ULpX36EdQpGj4+aASi7Uw5H +/AfwVynpBlXW1uKa5qNfCXOu/QsTcvOZqd+DbF7q+SwyV/DbAIWJ1q6UogIaB/YqcWWIv2TkAyrW +5AncqZbTKiDMmBz9GP20BVlJuRGG9k2z9h3v6CKCrGmLfm4VpDPdyemOQBvfmWPizuJpbsVxTl11 +yCzqeIaG4snLR8iRaJ+EZcFAhhErT5Cq+rCAEuocFZ7mxAw5BE6GoCzquIpIDMrsZljXayf5A4ai +Gb/tg6HbcIC4d9sHUtWULjiFU0nY3JORzpN2qaha0DYAWuLUxOx9Ix+pS5KBYLGCJUIeQhvl2zyS +5jvwzuNSbpH/3BkMvjie9RhnkxAy1z/WA77NnnsGBnNheIzqgHMOKqFsoMnSYXQ0Sy+2R34pikEs +YNZ+y0obNSKm1iIcb1haiALmp2LxBluKgpE5XeLhakJzDxvQC15UsAKoClmtOIMY9vHONF/+3kb+ +bgEdRJLQ0G0r3+cXFNGfwQ+WC/YJaC5U2bOpBWHy35fGoBmSZYDhd8wxB8Ce271IbSqs0BfZeFvt +SeNCX6iBiZQ+LFZ0TePJVpXfEhBnfAGbtxUGXqDkClS5myhRJksYJPdLyYUPKa3eRPe2JDSynKxR +68RA9OMy7O4GV05aXBTGTXo/7y1cl5FPaANWqGGZBTVo7TspoMjnW1vK+76pfVAaj4VMph8GXSpb +DUL2+IbttMF+zHxfKaYoYSw/IWn8XTRwKzZ9q9csCZ6LVLScxFhzz+cB+db+aG/0UAoPOCgfHoOt +N2U4PRtqJfeUNslqTBGGuOcCXKqDXSdWLv+H6UltJ9snsXzSNB7sK3+bxQCUNBAk1qFSeqgMRtfg +jzliBsGYO7dJA/JXAxPFNISMOZrPSRpBRSIr6Mq+a2yKjhI6XqxVEPKmMptIBZOGjlHjbiIDwKvM +nnaBxlAuAQuvuw4beASHrcD+7plYNuxdWylDKFe9chFvdb32hFGKdhays1hkzOJGXpUGkyditczK +kCAIlvMh4TTlM+XejcseVgmseRCYbR5zCCGAmeW2DfHyae8R4FbKW8eJnXgJS/62xXUw77rea+uw +VLhA4k/3JJ5xDH+Aue/Tp1E1yNaZSaEdYVKZLC49f+YE2hR8TRUw2oxfPmuEzlwjk5Y/8vPQhggX +s3OfpUmnIKL4tg4mQ75DmhsrvjJU8Yt5EiiiGH8PJwfonn7h13VUBML/R/t54IMyz8xmyjIOwr4E +7zk15VJNFlCgkKykOhx6zZ7SXzsqKEL/53GHClaVUM58/1T4XBOmP9BQRsM23HbA5yu1WTfiXX/Y +B1x6gM/8eesaiMalgjpaKqyI4OSG3aarWHV07JqRNI28eKoEfjWKZyPIDK48kUIHh2ta6k/Z0sP3 +BOB4Ejp3nlH3SdCbfOEcMzyi0XevsRVqdwh1fOnVH63bYuOqbJnXQ3a3xY8orDIEY5SbpbbKNLFL +EOfzMICLyLTsx4oK77R9wRi3J4XXcx7uaIHDJ/Dpu49qKp0UzTeiXGDrlaVmMwsvWGLFwlJxc34j +iaZKZALyjkV9OjovkRLan6cLW/sA+iA6SLBY6hNlMLrXMNPs2Mw5PgLslm0p2EwGWhR0wk8RsIv5 +nlD/b68UqjuLccSsnWGnRqVVcqwRk/2WwLIoCLy5LKcE6x6g+D9ijRHSaaTyw3Wv4Re0qAAEwJzU +X+ZqVzVHC0lbBaWobpr/2Ko7ReqYsFmIP8TLZzEB7vmZmDv7UOO/q7cWopgsuLr6ejGnY7WI8uDE +3kK3WEIp4YBg6OaYH09NRtNoElKtbmv3xqJc1aH7G21QibKsP3Pdzz/D/5wDD3G6397YlaFwGp3o +22D1W/6qcwZNW1IREWoP3kiAleTKTyR3nzkSvbbJHyIXiI3XAhwScvEN4LfMhk0wkCvsYCY6vTk+ +d3s1XYnPWnh06X0SQyC6ynRB5f4FiW63zihZ80tlbclmGINq3aNXh+/TV7At8NDo91Zpn4RX770e +c8+YRKQfL8sYGbGUAgIuI+G/hKM4n//9hsMSFbfg/Hq/2/Ss2wBjUPy7NbnkR4CIxf1Bt72FomRU +CKlZ+A7pJmUowYir/ICrZ/4BGM54Wsd8TO4qSLnaEew6xro9mzdSMIvXkS5DOwZhgSfYXP0m2T4+ +YysjqN04vRhyT5xI+pfuvzDNmH7UlMmZwv9xSQRRkVK8Gt0+8/p9HefFnxkisv+uUllCRL5WTLSx +QJJHZYUFfzM7RZ+achRem96Uyvr4rQCWzZL0JGebnMi5tr6GoAtqdry8PtBpmj02YZckh2PsfvYy +lLWG8Vw/JwvjpfKWCef3mYaMD/VfXhsEDTrcu7rNO9AHdSgfmcV8Yd0bOHVKRi5Gyyr/fV2dhWPA +ONiUaXWrJ96DFwLfzS/TD+Ag2/JrvUX571o5MefcvV+uX+rzhzlnyBMKqyoyNr8XpkMF+e0ChSpp +6GMFa5kOZl07pPmuAZFepVt5i8JJFfPNtNS5A9hhl6WlIn9AtgaTHEoS4+jZ9FU9IZ6Osh4YXeYA +Zysq7G4cNHTd+nd4jDUcpoGVQKTiVO/g5+jiFjXbzDeagfB8TLityiFeOXPnYUS0L4u4Y39TGXH2 +IgmTHy3yNEeq6f/k1Ll1c6Qr51BDY9tZvdN1F2Qif6g7yoRbfEBNg2DFXoXh5POPyS+W6KMZ2Cla +Y2h6pEqEf1U984H2o9p4UxK3yZU1cj5SVBT9ysKkSUexZqSSe7Lm/6YYN0bYrnNjh8ryrq9ovBTB +eJGHp2d17mdiPJfz/mcEBU4OCgV4F7q2olWae8ldtbnlpPGayun0A8DxxBc68T65ObKqYYrnVwJw +PwOYTovev5a2Tvsxslhr/vMu3IiNgM9mUU0H5n/u6ym9TrCxJbA1WI4gz8HAdKj2e/rvXLhGALPJ +Cey5LBiHMFNRAnjwFy2MGbKUQarU5Ep8iTL9Q21e3gee04Er4jNwJKQ0k9AW5sFj9Oo01sgHgfgp +Re/8WSsE8oZgrmnJfv7bpJQud7HuRlhZdpMGoImf7/xqQt/VMClwllNtQ3rpRNZ2b85nNma6UHTU +E85wmROGV+hBnbIdVGYUYaXm+yQe0ja0oF5EtYWXQEDBU5g+/5RufhRxg5tm7XtLqqoRU1rrgSqI +Ocnf/Tp5FTeXed84lNQ+j+3Zxy71YFQToJLZ4kTHtoKq6sAzNsS034e05jW5jkHht+2BrO1dzoDh +d/JVTfKch2lceiaZoGhms3W/f6hRrqkmkfVtooE7sdBo3FfuhwOvtawwpORTzpCmCY2+GYhVwZXM +i/CyprojZ1t+PjZAVYabCR+NJrtJpM5kBkYtKtljfkXw6Kgv0jeEZxKu1UuR2r/pnWG1q0kb2CAJ +EwsHOraJNRZNmhzQqDJwtfiSkzYk+78CUHPDKeE3UCsxyHWpY0c3eEmo/vP547zhcK2pyoGor+Pv +FZzSTFEDRik5RFtnXoOoaeudXw15bTWST+/CWd2edMN5qd/Wgh/9K/SwScpvq1RZpWdTgusDOIxE +fBanJk533/fL80JUERTfLuN7M5ARJlkppKtAqFkFQFJDiCdlPkcmiaT1dMLGXO4Z3/y8rlOIBuwH +W11Ob0ttnvnfBRQ1w04bF83Mo4o8TYLLYyuIXY2ianxvMFo2Fd4rhqR2875Ou1FtLrA1If6gDTHM +M7l/b0yNEcufO/TpcBIuAMbrTTR7UDw4ejiR83gTaA/yTGpZ2dPIP+vJ0qtz4PbN22BcOHYf+Tir +N4mBLTtSRZ3QMe578XQsb3BhPPaHb/4u8AwpRSMxJGw7EDY3ORUAql8j/IWbrqaTUS6vcuvJIYzu +Xo2ZbLp7kH/cJmMLXu9E4U3khqRNRE2/3DzrqV1CvJm+YuXuCLu0zRvyfbM5ADN1d6VTlxABs7mp +S/NEJTjvMmb9ZsyBkKgxlVDiSFWiTWdgGY79Kk9Ii0p55x2bL3GvwXGSWes5Yfi6MxQFcKeZEHcF ++M9eR6lLfo/l8TBV4pPo/wzV2CPgJjHjJq11VrYuKvnJGQyENv9zTz8Dw0ImFRFzSZ/47gy1CIzS +MnCEVuIOi3e8OQquLx1EGE6+9cHkT7J6Eh2JoulNrbhFr8fct0TyTjv3aufFHF9mtUEGSQJ0IO/i +H2ATT/VTw0v6Yp+4vVDH+1SPttakSvWUZNGGbwxVH/ULwZGJOGV8spu0qrU0QhXy5sjDeNEHpw/U +/aLm8cU4yPitMamIvIsnOHGSGPG5WdBqZuLE8oP2Idbt+JAmbmVlv0QZ/A48Pflpod8obv60r7GH +bweYbviS3O9F8yM1MjCqQ0fdPU16KvFQwu3eNZoBp0iLAKYO1RLrY7ofUe2rxUZ606Qf/RrkZmC4 +Y1ALa9MpxNUJQxO7vy97WaMPKUCWM2xHcerYZdRcxIzrFJ89IPR4i446pWvMaCtC7fXtJeP5x8YI +lftxvS8CO0t/FO+bJQX8nACKO+Jqrt4ebmgGRajfvRBf6Pf1DcKTOwwaER4+dzf6YaUV7xd/QNx2 +Y2sUaXp4Xs/mqRGH/rM5v6LyqYUX2uOvz3bjuGOT5qun1yh+acPOfbYksFgX1LnLdncmJKlWlSSW +y+Av5OF1BGAvOL1nvX6a3ZmSKp0DSYS/k33vukzd+uPaUXNYahop/fu2JVs9CvZTc7frDCwt1CIQ +tzXhVYT+JNC+Jdpdzb1GBckZg2Nr9QTPZlMTNVKxqGxJKwhhzcrdggcDx0m8tWe0RKQUHpiLLgC6 +HqVHFGwRlZCTy3fsCoPG+3mJCe4GKlKP8jHcQiM+VXBnFjVrQbE+LP4qEmHYhki9cosbmsvX0yrs +r9Pi6OWhxbxaMh5bKO+K9IKv80sJNsScHASQY7l7qS1t56r8ZjRmX6KSUg5t8pIMv+k1+jPgCIrs +VRY0q9aQbq2wgK8p5CQxzvXnzXMD6wdXJ5X4lnqlAS3UyQf4su1rss4UfeyNs2WLZ03MoeO+JMgD +39PvAmAnXd7YovDkob9DFpz4/N1f2Lw8rWPFhp+EYpNPommv+Kd2VHmpLl0L4ZNe26H5jgBGEw97 +VmluWvK1PvO+Nh79K3Qb0fYVaRRsWlP4tWMI3CxMamUA6GGdWEygdmD5OTjfecGht+RkFC49mkMc +t7La1CuUgaZHi8u2dxS35ahQrY8WSwbsqKIAEFjmugVYdkJPXspotwqy/OB3CRHSjjV6IdrJO/rj +ohG1Ame5ZlHzpv2ZtlcPw5laJRisO3oUTyR+wljue4C0/ew/WhhR73i4gXyc24MeG+78+J5Q5Cup +S6O2K4Uzd7eooHe/7FFz+qKrGX1Qr0rBMgda5q+E3FUqrs0Z+9XlnnPw9ZLa5E+d23MfC8gKAYYV +8IJYnQmSwcn8Y3SXzU/9xa0lXyLDuTSHm+oykXuWHMLkhJ1nixZKgO0nUBxw1vIfcP+StRtih3vp +IGsFGfZxHCKGknI90N/17IzcmERK+rPmFrrzeWkCKKwwVD23vmPO6kW12NhVQYeO8F0NQQU4OM8b +40E4JviZ/4BNK+x8bht/TAqV8Imj7QDn4jTtSNnq0IAXQnmMiJUcrD5CtG3PXwh61CeI83xKf41M +cztf+Aj5oJmrxea1XzZRCjI2GAsgVnmji4gmprl8K+8VoRM8Gnq2Ds/rFfLvzZK5sHOmnQ+DeRrL +lY+/rJydroHmmhstLto6is5TxO4+a5vX4+STuSVf2YZRP5zWCs1Y705mBJFk8nyh26ebB8jEzE3P +MGJmkDFHQfjqyu9iM9lUB8Res3NwIp/BDa/P/cP0h0hNl13XUJ/XXKBYbZXrJGheHpogCLAtPLwc +X2XdmSKUMTv8o2cihHRMcTFAVPkcrGtiFSdhsjb4G9QylBi5FeeOuNhjPsTlErDgvAhMVtNzvsRm +8qV0ayyi+SgCbQKYXIjuDOitkx4waHP8qVVfMnCP5gs/RCLzuO0HUZvVmUCDfNAKse9i4FVKO0ao +IlUIkSBClUT2HT7Lb7HEKZ1sHW2bZr2YJ16wJfa/2aVDx8HpTudo0LSXDGa8vseI/w23HZFJZAtk +IVgDctFdqdtXRAaylPkkMVLttPalRE2UhqeWNJsnCEL0GV4stgoZc6V6pYHVLrO7SOWDuUb4x5/E +Xv86G7lqVwit66zNMUgRwkqG6OMtvagRvKAi4PAMsMLAQGR/R+LuO2GWVJn9ISG5m4QjQJAqU3it +B2sdVmKSMjga8KsJuoQUdt9d0vVcIXOGzpOT77yGkzNDPiGWNWk6c2D1WKwmF+PE5ylUsvMho8Ei +Ztt2QgwrEQFHvLfQFxTW6QnzDMwT9V3qvffm1/IRB6YWe7HxEjhpmZXzxDzEvC2QTEQ2+hWB4w/r +aahtGa53ynKRoNPM1l97MQar97zNhY0uiFb1A88jKFdD5KM0ZHPFrJZYHlEeLfV9SL8hw13pourX +lOAXbXwBB7goDoLPBdBdwQIOX8TBpu8r4PZ8PxsRU9t/sjpaDSRlrwGoc+nVm+o+NdMO5m16ne6D +1/VuB9nxVN4cfJ53ddLQ4zfDwyXFx6+SJh+R7aOfaxqXPc5C6fUyf8ga45cG0TbSCwRN8/7dS+Vq ++0YL/bql765z0aXcmkpt4EkS1bflXEWMNfhKDx/hDzw3FojAHLG/8AUx7Qxrly/wm9MaaL+cC4ns +kfXOPBVHAeOXrD3dTPHajC/moDFKaCZ3N3fhy/ooytKsj8fqMhSaLuvknNA5CcmybKB8RdiFer5k +ZqGnd6JtaaeApS77A8JXER+JxN/uxGRHcEnlgrDXmVxeIF1Yn1fH7oocc1AyutOtJDTX/xhu5xof +vOEOfTvbTNNGqyra1wmUePprUvoQjFWGUIzYKLbf5zBlvWhpR2qcmWh7DY5Xi4RqNYTDcsGwFxta +0JQ8NQz8OziOW9HsucP1KNSKAbO+mZ+Uw5hilEhS8x9MkzRmJo59lVE5GtSQMl1qB+kXlYbiIjQ3 +6QBaLgFYiVt0IO3VXbWEO5qv1VwmygRwtsu4kct2nnmgDx1u6vdgKlAmb+FW2OF0/mobq5eg7k0w +qlddO1yXZmLB/FcshgpRGftTFlNqzmFPqw4zMF8ioIZCG8iThIi90K0WEcKyc23cGLYx09TkrBf6 +U+i/g3hYnzK7HRtpPXoD/7aBtdNK5uvbZyU+2CI+kLdL9oNW3QKZClz0PdJkGld7q8AxWaIvW8CM ++Kr8D+oer9yJITe2q6QAXM3u6kdrZs/HDXEGX17Ygapda/hPS/mQrOYuDQeaB1JdDxbFRQfuujov +MHuNSDo+2iW4d45eaKuuxbwtCivH0sseFDZ0J2n9rMgbUuEiiTXJT9TfA+WlUXpxExON1dl1cBWg +/k88EpG8cB0ZqdDISTm1hQz5vsK0OdE7C6M6cD8MSUK18CmJg0yYz7FoknzT4wSbSTcoD+Ap1//t +KH8oSVxm7coeuFj7ADdmEmOJm3+UWHXYGF/q58C3AgZOuRIyejNsfQFZX7fMhPGjGpmTcqanix4x +dC31zKYGm5a+DutMudjtoAjOYSfAV7qvEUaDZi6gCyEA3SwWJQdmxA09tSIpRqjItMfqpEULr1iu +SoYtjiCsmEHmC7fruHXvKstJ0gs+iirxZigTIzg7M4+pgmfD5u7qu9hwb60BBDaAuUFiskZFAvLC +OZWqAbOp1SGvE0VtocN9qy21MJ5rWRPI1E0IRMCq1ZMiWB/yn5zUAHyqFwLgg3ALB2rjLV7rYI7F +HxoHOQgyLmXG1JCp1tprKWtzRCSkUw7P/msNqx4DsRxlmvdXQ2EvaTFgVcv+xyuVzrohctP4apEg +fz3Lchu5fx4r8O5SIcBNfu7KotG9JcO8JO+4rQVCnjx5bcjsTOPQS1aVpJZwAfWOZainnmvgaIav +lquqzTUZU7OZqHyqAWByM5Ihpc3lWJtH4iD4hweqjzdPWN/H0XbgGrLgU0LkkPfhR6vdzcy0cZQ3 +ZoFPX4I50St5I0UUt6yQsnZ9Z/4oE7bqHXyfme243ZzGVsLn+18Tg+bPmJPr9WJn12ai9XX2zOQf +NTo/W6294ly1Kpi+JyZlxURyG/QKyHs5V8uEyHyWP++qLzq+cLWjoD7HsMkPbWfi5r9CNh8o0qJi +veJuKJDAoDbKOuwTD5lnIOjMvo3qYL4+qwWP40wgupE3mptPsOjYt7FuqXj7aBuj0wAMWfa5IPjs +8i2Wh5ptV2MDIXBL2LaJFuYaD3jb9K0CW5ShsIR4gDXhqv3YNBYPpw7g1g+TlKrQSNZM06v/e0lF +Kx4AF/roLiOeerbxHARlaMb9yU3GGGs5ExT9qZiP+WVnwdjNrUZuElMuJjmujD9dgbWODot7jr3s +QDT+c8WptUXhVbAP+je0EnzYRw6iAU2EP9gsvTvVADAm7suSQB8tqphwe0iKInIIEno8aQ5NKYEc +xlShvIC5m8u++YIHIe8CKBoVjeFIBAqU6ad62afZsOlQ6Yjen0XIfw3sy6RNZ3jXqevnHPFdosP3 +BqIEq1924yHP+OTMXEhx6kG89Si+mTlQK/i9L7EtAael8dK9OVQSc5pxW8Yi7AEA1kO3CsBApKfE +dJCwnfSAALwBPJyKBH4zCjhzvCMpQcA+z96kEtSkqAPO220Dg4YcbTHyHTKj/YtzH3WveaKP0aC3 +rzKE726qacPFDRNZQoHnzYqbFIMdH8laM4qmf8i3BQ6GM7wIyZWbrU9mJO0K/dAPXjG35scQ1yIb +OXBKteK+CtDmQtfx9lh1XBiNKo7XeO68plJL5zzjWvEFAPbtDVmI6Atyfmub0BOnTuAGCDE2e43o +LeCx57mgvsR0ck645y6ZBopW6F3wOfiIjYe2RggcTpw4GQ2aAFrXYd16aZEgI4Kxe0v4+94O62iG +qo4xD4LkRvIDSPoDFT94hBt+z3X/0F9WOxi9Ds7hwzw061Z1g4wFqa+hj5OcxLSG/bis47lF2L9d +/om+WtQnEtlbdg6OmFjIDgDoSp07UT4meoIkN/zBKB0qnDzRLm2cBFtgjcrauh95n5F+SM9b+8lN +TFKWH6hYQNzX1uHh/yejWTKvq7W9QIf2bWDHJmLmc6RMdjk3s5CRUoWa/So28bEsWP/f2pW2DhOT +9CNN4Fvmlb3dILNIJZFneoheGU2X8Hk8FYFshFFua74KZhUTdBxPQ87HKneTq32+qj9oObBDhhs+ +6MIu0DCMthCmbC0Yn+/xNqrSWCzqlrfqheovZH9hC03iCFEpgoLuH9wkbUhAEHtAaRPOSNFbis4T ++wigqwjSQexzA78ixpINQrn8a/j7khv7e4cwWdDzShUNceMwm61IyLzgbg81d139AfZyOR35aPxX +0dlxK37Tp4TtriSVFyPTuiZHEo15JSTPk+UC6FVNTt97qKYlgSHILFvWvT0tcJ0BZSSyNF3Ph254 +xz3idKGPywXf7bYoujFjvSa/SBrvdnhfOLbzhvUYuTS30WbYaIND7Ftz+n4wfDgLDMq69GX9zIV1 +GvOR5994IlWB7WpT1zSPpDS/UAnusGzscVz9PmmRApZ3n+LMBDbg+VmPBnE+vUebdjVu4vk4tN6h +RVhD9YcBmycyb5qVewwO1P7Z2bQb4t6w8ZWEAFtpP/w1jVmvjA0RBcesR1Z/oPw6IRoeLmqV+PXR +5FoLwgD/I6sk6K1YFMseBjCJqFhq1PYG1EOo7+itgXg1NURNvndPtCpBsLAlPAEZSeI7ojMvb0+9 +dN9DjIhGO+/sqssFSwPFgUk1o4E34kLYLuSEq6rnft4zFqhPhYpLtv0cf4PeF6B/EjPEnO5XPe9e +MJTd/JXIrWzFS6TUb36P/1B3z4N1o9LM99LLeEgoaaet/ufW3M3qxlIOdxoa/NFtb/QnANxV6zoY +nBJH5efVNjK8gQ2DCKNe6eX4xgE5OgglDtSybWmWjj3xIsGqpigzodaKM8j2Nso5AoLdaOVHYa2v +ZghzwuJtPmp86HsiXE8oLEPVCE/6GVh40OKgyS6YUr4NAe7vg7Hx5hqdzy5LBS4Rx9Yoqtgu9fnA +BEx9zrRtdqZur0vbNVXmnlfYYAFRsiBVvrdFJcDIz/0+WcWvmbF+rMmKnFVsSQboJ/Y0/h2tHQkI +fKVqVqOZDIvxpnQr4XKFuhM/fqoW4dHGEnJYrkTLGNkHaUbfHHGi2/2q0XOJpilN8+ICiwUY5HSt +jZ9lIVBKwio2LJD3A3ZACN6/ki/DX6CsQtRzn6hX2Affs69QWnQPbs597Ii5FkjiIfx2a8LR9G8a +fLZPZndABM9yFTC9S+XgjIv4VDgUDcMHqYvx3eFg/a8BqKX4uuDwOU2/E2TejPVMJs1paIGJiO/F +Ul0Q2I3LtClGCmHzMLvUdUe50EHtTBa3G4P+FDZWWZs9El1zouQr/KsUgw3qtZOgmnag/NEAV6WD +amsBLwF5fd4S8OG61PhqilOTcrUopKP/IeA8Dqi2mrDEtXK7TGiFVbV5TgFXZZHAxQgaDQoyMhYm +dx6IPxmGL3II5z+OuiLLLKh8lA1w/KOEwSokLNiMN1SWKDwLucjK4V9IC3m5V+OVGrbvQKSqDPSw +jeylbVJ/HIuYwg+OQl5wW+5/Kxwq6Vkan2PbIX0FNlkVqu9DIc75IWTYJ/BcNftYsnHeDWiZ2ldF +C0MePK7M9bH+trVaj726DKPBC+4IPAnR1wdy553yAKWdzU3BwdN7T60Smi1BKfx5NXaUj03YHm8s +RQ9QEMZdoRLvkG1gS2f3AoyWRxCY71I2RSbEyr/NYiaHQeojUkEAEhQO1kVUuBlV9AhTTJTwd0UD +6707ypKTZ1mT/xzE4iGR7Y/X5KvkcbUYBPW8UVYM8++9H79WHl4xRpVMgUdur5vIk79OaEVYbw2m +59GmyWLLYzttiqbA7VijLwH7vBZ8KvX/ntOJHMpYyFYLys5tPYXi0hcXR/n9/RazCtgyLCmfby9N +4PNRrQa5yb7lIkdzkdNiecVjEyGoI1I5FIr5sXC6KoM8mJ2+09/s6gbbNs7XE+D4xwZl89kPvstS +0RQyllEKKOCxPguME4NWrRZKJuw9Q7MpMBvnIJtlexhVq+yXYoNKaf/v0Ao9ncjQldXPHY9M1Qyy +85hWCV0bblgb/YQ58flLsmHmLTHvqlNexTNdVECDP8leLB84y2mwYxUFl2GANZVGLBZTqbRg1Tdm +KQ6WNS0B4vnwJxQ77e0ib7D6J/rZDiY4Xu23bstjldorMGqMI14+3N0A0bT61cqXtv3+FDJHbizk +3dBcXO70llMfuGdmyiTkDGtf/qNdEKIYKbM37cdx2p7u0pnFNA2SiQk0GLsk+oURBwZ3oMf2gR2R +mKYYcL6lRCvI8JtzRDTL/887kKoASqz97gKckjdB+wRAmvFGKPIuZsQOK2h7kVXdsbjLFyC4wTq2 +0DtmvPlxMYGFSjwf5Aht1pWotbyEyla2OybXXVM2S18WxZiXIDCWe1ddBVl2oQ7iy6NwMSLgD+KX +1MXtp1eZJZw7uLng0/4vLhBuTWzXOkrQyoYGH0mhRzh2N8p/VSqNudg/DQkP9Kd5TE/uFzjwDol2 +Y0b1KLfd5Z8xGiwqOhxUzWsEgBYV2ndAo0gveNy1MW90Pe1rHbxD2eD0liqmiIOI2vvBdqGqlolE +CGgJuVP7ESGE36LTCnrxtt0SJUgc5jWFlhfoVrHpYaau0Thd5ImqjTOmvS/BZRkrrdYT9XyzKl38 +t08X/zwzr2UsXtX+++y76W9kH8T6MlAYxj68a9r/SSBNlTAnNNJIL/wzGZDrpa7palp5t7PLEwDp +1SrV/0REEI+iSeAeg3xc3Ls1U2572ILEtpMOwWgbRbMynuT0ZbqmRk4nv3uC8MIWI94fnO7kKHyK +S3CNDjZ556R5S0AayakjJD8MXuI4pX41OjGpIuP5r63puREMdXL1KmqcN9mhH6W1hOEM+hitAS25 +bMz2nHme9dmsolOyzZgUUk8ETi090XQPQCvg3XCjGhCJw/s5sywTKe7x55EL01FfbmK1ocxgb7f4 +txPxt7niQMnnS6lA5EHdDLhOWoe6NsLU+qu5Ke+2v3Hh26DH96rL/Pe0h6KLUcFVocY3WG/ruRmA +x3RlVBlFcm8icsXCuKGsCj+ZgH567hvR3GjJLvHjXmpky2JV9IXnjRvOgxsiPVo8AuI+ueWXs0jP +0IrK8oB8WpwRU6y95uZPvIMGTY69ENBnE8zFZr6Jb8AcEefK78qV+kc8xhbSNIUlsr5wzqkhOEHh +2ZCVh+RgNouISOY1vweFybVuPTJq6zGWkEQB1/k4AuFEWzTHnJBiBuxTUpS5JjC2gOlqQjXWy0Bv +zUo/ZCfDJ5hIgcJNMpL1KxRIY5lC2NN8HdfkFZGLaos7qTYLDd4L7y0gi2FlUDX8xDUbSjon6+Ht +Dvn8/5AEYvttLOO/kP9FRKjjfDBXfrGVYH8DIQ5Pxw3NtZIa2mDK0y8rm/M5iBi2odNEpvd0ecVx +twTtJD50Vku+9c/YLgde5j+HMGUMgK0uzhe8KOVq7J6rNCc8ldU1m3NkgZ46tV+vICbqYYO434M+ +UIShfD0sFdkQf+ZdhITHGwuEMxAaHXd8vi8JqywBpklDwsF56dGFCy5Sadj4Q2pzLrl0f+AuhRxg +dBWN2pZGnAOHNfCFR/duKqKI6kNGXKQJu1gMgXWW5fIuxxzN9JZV4yRrjayVIwasvv7nI6gLp4vJ +97XGrT3n+cTRy8y2F/t/z9UDvz5pB/9dPdOp/zxTs4rXM70Bt2EakW9eeuE3MD2ej7QwmdEex0GD +29bklgF1ote/hiqmMrCa0MfMRrLc6wuxMcLnKVab+03VEfAvPVU6hkY3zmGYIcWx4SF/d3FINLwo +f2zpCHXA20MZewmMTmEIsi4ph3pId7gE1A9waEmVafZx8IiGTuF9OJcc/TumBXvYeuqFjJPTSi5u +Oil5lsVtVefi+fdWsKgbAtJ9UVnd9F+cg9uFfXqUnQj6EqFhLn7VmllVKU6LF8M5MwD76oh6A8NH +xpj1J8/IpLAJwRFNKUdXkUKLiVitzK6lqL52EjYCQRmRTmFXvC540sFhCDV7XiiOCJTklUmbGghg +pRnYIOxXTYXEV6ToJqrXLLWjgA4nDtjrDBOTTBsuW6GpyXxFeemi+UiVD9MY/x0sepedns/Fge2x +GKpCYhTgbPLAGOCON+a+E0lfEJAwnhdgvPM6PQIvTYN5wbbo0jgZ1xGdfgpjSuDcKXVaS7oLdSd+ +iW/QrNDZE1TQ1Vk2OteSL9dPRpwbOyzUBd6uRN66mq5xaEU8tls/6dfEDMsuVtOETT+LjCm/Xy2y +v57cJIqhQhV0dldJWqepc/SCgiGrmi7AyB2r2RYmvllezJPCF5UMtpDTQKPbUZNzlKPNRC0h51lM +XwJ9cvjCVMYBpMau6hpk5FT51Qny0SKRJ4SIlpCCwmqZGzNSesZirkLAogpOsIrzfN3VPg5w6b34 +tGR1etcr382bl7F34ZNnACa6OOuCFijoDpisy59pWpRcTYxaGWfRqqtzLicMmSJaEGhmtfMJ5XFx +NTdILJnz+nk6YshZbcB/j/Dt606S/dIaJ2nNn3C6MkXnacXDYRPakazEtD1fnqDyvMOyNcIoC3eK +7sCUYTJxO+fbyvMgCkzDDrS5O8/AS7fRimUBsh7WIzGuRTIw/ShNrnJJLBOYvw275H5AEuTqAa1H +9d63b1hTwRuOZwAKsiZb7RZQNG+xxH+lyTVcyoEUZkkVBBrIGb6PgP3hPApfx1LUvt24Wj90ff5G +RYPmI07o0JoyUvoTfvagfHCZw2DXj9zywZ3NZwOFCCYTPZ//ZhdYOem7k140TxdKZB7MIMBT22HM +DepMHG1EzO5J+wxgPUoR1UoJpU1eFoKAB/wdlMYj0kQEGvqWf/uFQWBTTvSXpQ1rOF3S72WCVC3j +TZ0wBHMVJwNkQfpRfJ85CFmFJb06V8jpmNzLatkjtAWNlRgiSAZFhdqRIapfIQBTLWbu1be+D/HN +S+TjBCtRo9MrHxNtznHkdzszp99S2/zC5d9lJp39VAKCfc8J5uZesg/y3B0Q9tQc4D7seU7jv5QD +B9ykEW0fdWnymGx3Al0LS+CeyNAvUw74KORl4YKCxCSqI6b8Ze9WbieWQPbJ5qlaPLT4Uy/eg4n1 +dRKJL7Q3wA4+gsntMXF203kSWuyoi2lba3/OVDtTIfeM73qPT9VRHalvB8niaJ+0CLylL0yIY1Io +qwmCThJPNTEIVDGjReQpOxMdSPOtr2Bv6PEEbjGpjHeFqj8JOO42tmjJa9rMWSEEPz1pDHXWg3ei +y4NqUUxeMIcsmVblQR5vptkdFYk03PLXSYjICb/1z0JTJlar5+1ZYKPbjt/+Ai70fMgDfUDgIKn7 +jebu9N6jCfo+qBvqmbF4dopyUyA6PfdOda69PzZQ2AwBoEHn1D/pG1PZSN6ty5qJZc0DeOE37i4S +Oox1aylPHkXAJsRpbOt9uy0XyasLQnE+E7oTaGoxJlTSGB547vapBap04Pq/8l6CKVFmoY+f751n +xJ/MddUNQV8FJQkqZN5EI9Aj4Y2ihBax8Zr26MYrzwl0ezSVECjIgaGalAPyAxWEtAgpGwLRaazw +mEc48KpNLmFBW6Zgqx9cuJCKO9Hta44kArdsJGHj0fYrkNGY1vV4+v3sBm5mN+fVRB+GMcBASjl6 +SE98F4QwStLggQl1X4HE9hAhyYAguJRjQzpvXoTP3BTBFrdnLDGyHmJA8Um8NuISnqpnmoF8xfoS +UgfCH7oXDAgOFO8kJZFp9cszpNRAf57dmYJf28vMukGUkjxRG8vXwQ7yWbxbXmnvjhGvQscY7W2d +9F/LQf/X5CA7sGAN+ShhILHJA314pfx/BtSNby8PhNfeoPARNSFON7cQn0CRd/HVe9UQF9QGRPMZ +Axx3sKX7vJkBO6nZNjuaQP4u0LTjfWp71B2iaUc6hbXnA+yYTsj/evMhmPdYZr+5UbMZIW/GgE2q +5B8fOud1i1lh1qqSX6pH48z2zq4QfP76Ke2C6Hj06S5YM9AcXjrwagLqEqFOiL+8LKxwFCeBlkIw +0ec6CLtfK6QokTKTgAGYPY6bnxOqqzNAwKYwlzRvzNlsBi6GoGDRmst7tkSEgbGaPmsO9wjDRQ4v +3b6ilr7awqCs/BJkLg+bKFk3BPm+XTnjw811hveXBK9r1+hgUSXFLO64k6KaAzdeNDc+uJu/LGa8 +L97EZ4wzq/2lyLWlZDLGGyUYB+TYy1yt7xkuZKHgcmBLxMvp85X+EzzSfPketAFbxA53bHxztRS5 +iVYOMQ5/oEx4ID3ryb5Iu0gbadxSA7KrO7qCAE8/ito6wG7OFuJCE0ewIKnFcJbtYcbUOBAUeczh +TMgioOm2Lp07kEv4C5h23iiM0nURgDvK7oNvYix+MJeZeS/oxFvmQl0IPyuUrJu2zd5ZX7kbBCLW +ZxKrrgYtz+n7gggqY+fpJ8rfULLhaj/N6l7Gc2yVpNeuCDY1mjL7s4uhL6uqofh4QRr4dFigDPSz +/7urxBGE6G0nr/Pfkx9TOqXspsvWpj3sHHZcCD3+bRsegLtTosK4kg5XGKYzeHxfkbaYHC/Wp5u8 +4SWjWRZZ1MWmGMeDtI9oH4NbFq9dsMXaaFnKsbluut9w6YzWqA97yTEkurV8MypFu8svcqx2cD4n +4OYiqIf5TzvPlvyD4J6yT5IlA35YCvLpC5EPFZVdmpsQiz70JSlAEyQUv6J9ziDrBy8Slik6RAEk +yCKwpb3LBkSqx2XxtxRiGcZInYGvTE24FkHtZglgqUJjxb/rzlWwAod+AHIDXHYm0mY0Viezu/Xl +LU6dhMTGOcNs5C0YB7gRmVd7A8INtTJvoUI37zvatS4cOadzCkEhTx75+GwcGoY2o+rIAC/WDXZz +E83Bku5eyb0ly1fJ/iekCQn2HwL3bjzngHHbrKBkN2RqwFy+sgvaRfH3/Z8FkPpsCzF4so7eBWJX +VvTDrtwxNvWEOnFl8MygYUCyipJlZ4LwS57E9U15p6SQS+H3FhUcPvOv5+UgIOWRqM9wfkuXAI8V +cPsBxViGhJ3KLEEIxD3YjbwpSJKEAY568s2L0Wdy1K+7nITiEjVq39iZBMHDyXFIXCzX7ipvIkw+ +lbfiynup6vRMkGi1nzXsSEDBEAP2VuUDJiHWb4eIiws+Ki2eMRyJikJHsVKsm0kN7GYX3lK2OAjN +PF0ot80tJquzoxUIG+vPlTP2XM7BAvtr3UaQ5/+RO/qeL5GOw566+b2gAuATqC9B9OjFMVogI5Gs +lCV8rK6RZSacZcXHKvwVTJBRjco/MliSRMsxSSC0cZTVQ9MsBII/40tOEZDmR7+PGH7P8egR9xrl +NnB47ZjtrjVcqcnkOQSu/FH9waXzjzK3hfLr7smCFdHN85nI5mLFTbV6CExg0dxX7RCfj8Yfdm8D +hbtGT5WTaaD10ocFbtoDwvR4za1EMJSiNXrDoFPEkSP02G5vH+pl4YAu/p2k99tCraVv6ohZn0V/ +sBYsSgoUdo3dsu8ScGfJ67LrU2Ziv9pvu23BOLKSjYsKgTeb6UInbMxkndAoGES0q2dt+4zwwl4G +nLcIt7L5LCqUd0rtSIx11Wk217rr5Pj/l4jNkLAxP1qsv3ygu9si1rHK9/zI6GbY9dT3F5SLpqrj +0D86Zbf4KMMWiiRuhZ5HwV/koE79Un0ImgG0A36n93KGoL8peBaHQD+XCKjWEULZyS4aaesa3Ih+ +hczAJfYklAIxp3cYjcJHAd9omBC77IpdhMtupE8oLooOopJDziCN9qHDLHUg9A9tuhFod+z5Vjc1 +UTNCq/fFP1BX8uPjh7ZAARUEIRHqCFkEFA2odaNYujzMyuft98Ca84cu++0LLLTkNs9R2DEKAhaq +h4mFF4icKkncf7OHIYF2wf3razOH5ciLcHIc/RIVa/zSRVQhDAya914dgvx2xmZnaouzYVHBvPVV +aKX5c82OW/i7qlMtuUti1O+pZTht01Od8OOm8HKmc2pja8i2HvKxnxRQdGf59ajQIKQ+cj6+W94H +WKMIG7s13QoCjKTcMdnQHTbwB6vcP2+MbRIARO1PHfalGF+U3VLn+6Vkgi/H+rlWN5gyxm14gc4k +6SE/sbbHOl7lpP1e6WSpt6qlwJnLn4rvlUtTH0Ko/ANpKQHqVY9sVGmSKl+pphdwreIjzv4/HMUc +7g8oq/RoMmoJ/89cSpyVQbMwrEae5n8K2mhfjRAkBEOWk9w7KP7srJCKuW9L69dwscqG+quAMe1D +0JkdkOCc9FCAqAn6HXQmZCona9SycRIyj6dfranstMnPhtgYc3at9YVup+om83e/KASP9oSjad4Z +CqfMg5TbJ9WwkhaJBLiLQIKHZ/EZXTf+fcgK4Uej4nl5+Vj1s8c8geAFFVmKCEbX59zxQZHnfkLy +c093cnoEBjMBADLCwjo5QbCub5RAPYRK/1pSxz8ViWpApECTKRpMm6SObi9ajnx2eUA6dv/1QY4x +Gz+lBdeSFpr6j74bVTQ41MhpdMX1Q34awPR3NlGN3PimrUpOSmvYnjH1MkDDx0o+cn6Nnbqz/YYt +Qg1Ifq+ls3Rk8vZ9RwGuo8jz2cvOk7ZFmwrnCnfK1RDQB2GmxSYTj+lQFGq4GNT5OHn7rtrjINgh +eD+EJsYZ6mS5fdTgvFqZziRq8y6wxo8wuPuIwoxvxcgpS2LB14JCB739x4rYRsj+29mSZyb00ecf +UQ0ChE87Kdmd9j/TitobOxMQ3YCZW2ycGnJifu8gOx/grIz/r6/bF6sbwW0B/C3vWeyK7orftM9e +rbQnZ892xSG3Z4Mwowmw5c6+bQeS+9Cmb0JYB/yVEVxK4Qw5BDymVnlK6jH4MdeEG8D1/n0VurYg ++aq7LlE0RN2WqylMQAyt4E8rSXty1J1u61QEl5/FpOyhW+TI2oZ9XFl6jCX+U5CIP4hQ4azTRLTO +ancq1IQ2zYBgVA8127lYa7d4fD++pLZ/IZIzrE/sgf4zOEbyCyOMPB8hTyirc+Bey08Zd140RZzS +SlR+LdxQHu3LQxhEeLnVP08f1uF3u9nYxuIKG4ZZ3mWqoA3Kr8Az7AqHs+EDAIvZDnDE30XDzNfX +esfz2p1XJIhKqfXZAmgkrRhCHBv68lwW5okiaF1DoIQRRaOROZQH0HVG/fbFarwWdRHK78HRPfAo +4476z2OPRwJHGxa0VEuvcDuPgz8KU8XmMj46TFsg6cmHNzlkmNs81c02l0Pv1SVVUeg4jo43FvKy +2rxlT3YQnTOT7xdcGaIfOW80QEIHeiVDkSh3T4M6iKFuZ9AVKStbtXubHEmif8mmaFBXijx5YQYm +f7PPktKwehmZ0RiUxcCVJx75SucQoTlGSvyox4svUsfh6+cKlkf85pnLLQrSufa67NP/NlTBpcaD +auogbH7iqMEwZxYaYbhwoZxNELSWJMTDC/aKlCHxCjRCk4jKGbTx3aH/I3YqKNXiv4H28zzTbHK3 +ceY8lbyQbiUJZ75Cn8XGodfAMc7HWLEulZqXn/S/E0+ZeF8KXby4Mg6mIsWdFfS00AuBrY/IlNQI +retNpcOX5ryxqbtF8Ag1hDqfg9/If8aa/PHxzHTjLbO8kjRdyBpO+OZUEJIDD8NgY2avAvtkuAxv +eDUj1CsN/5Uw2weSKacYag/WsE1msoE12m/s6mcitqlULHr3QSD+Z8V5ROJIYF4NpJD8R0QANx0a +XtAvXkJZyumrPC8lG6c3ePB/9USjsqG0YavaK8Ecylk19aLSkEhf6rqmGSwHoVVDtQAVdkgfw6kC +zCKdPb9Ao6k+asX10js1Ka0AQLzyFu5RfQ3ad3p9qn7dfvAFBBJqMaYg+nRLjcwYXs7Tknsgv+Ud +F6J0qjpJTxKKBHCpTLB6wIp9O/XGMhItpkhnfEI+fNGTyJ7IdCoMgI2w6YbI93vokl8wmsMwZlJ/ +gX7r1F+PE29gbstGwMBwqTiJB0LI+MGZ2+3N7SBnkfSDXc/MRDRWJMbaKEON3HXuP/4sGxnGAHqr +mJUqslC0s7/mWQTwgGIjThW/NX1Ny/XTQjC2IXVcOnKv21LsIs/+JRMsoaDn45t1LTdeC/6H+PdH +8AxypL3UFWD5L6PIrF9UJqB88BTkYoJi1kiqAUBa4NAsVmXSPI347zW7RnjvUdlCfzky5pXbF4TS +mhhAMo+NM1LrT8uq9hHTNsLlzNRM8za+6GFVEAapWFcGGW7DczOmql5xqAM9AG2KJPtHqOdUUs8a +9jgtO6Tx+Z2zz96xIZC3zixxaWq3abzxgI2WdWh/z07qS5Gh5fJR8n2nHzJt0bHnYhSNmyenCNV/ +6nu3xx9cFcnPQ67/XCaFdDc+LGGIoM1MEVYIH0G2TSx4734N6f2QYtiSwn2TFdSaryRY2OgABv80 +gye7K3tv1HEmowCVJaMFPwi9HpAU5Nl/jq6sWaC2eJcTbVPdFepc5uakLhiBlgJR8YIROQFMLOw5 +fFdIcvisfv2o8ZccYoZ9KTxYnrRxjBqSGV0lVZpythENzU51rDqxgg7PgSFqBgw2TeqZso3nHC8G +0nG9zwChY5SGXMiK57hcVRGjB+kyKpB7Q1G3b39WMyB7IcU4T9pH7zTUwekFsb2DDh9EAmfa4h3m +NV/2vrK0dbxzCY9w0knoAWElnH940/4Ru49JhvACtZJXgYDIO265spBDgS+IzqlBOMjXsVN46YLO +uJ2LlZzjFpnH+WOIFtePVY99ExOhgwFZqqV0FA+YrbqdBbHGg7plTIp0cb4nkXkrmtG4rHxrqrRI +6ZCNVmuelGC2xXJRi75zRTCrwGunjju80rqk6xTKD58Muo8+HDfZgwW84hEafY5A5sSZ2WC/3VkJ +cst0uJWzayf6I8t3BgPgkoVYiGIYAIoATJlpQkJka2MmtqYa9B14ZlMcm9f0kP6lsf04me6lQsEd +ZB5h3LPyqz4yT8IsyK8o8Dthjnp4CsohkskmwoBwesC9DYI+b6JphPVHJtSG6Xs/NFJyXBQdfhGf +H3X5Cds9AyMkKhhl4+hunGdhck4Jzm9/qZRo+706+EjMNts38EX0ZFHn0f+rksqnm0bz2of9hdIH +zPzQQ7vY0B43Jq/ffklK7VqP8irSJeNv9TaFmOQveGHFVgN1ovJyHuulGnTXD/GTPRHkt+6laQuv +EaZUgDPAfBTIRcTIJDTvtLagkKcmS6fCwFs3+DtWXnwIk/yogS0ASSNU24uH5vpYzFGnzrmqnBZb +e0CPuxGG+2dFA9/LP3XZobjsySPlLsJksXUQu7oeTjftobmgyn7ZC+KmBlk5u22VTVbkF1E1YWj4 +o/2oeuR/hB5Dl7kqnmhQkoyjxMEYeuMEzc4+7njAqttlxmKGmExwPnbeQ58bo1JGA1ueoYAJC1BF +aF22otw5t6mGttY+OHIFZ8zcNZulf+fK2873ttTz0YSA8efcGA0N6/lVDbVm8jWvh3ICKaGeqDBm +z2rC9hrOnR9ktaV7uMTIEFnJEAg+OgTmBWD3avZITaxP4+/6vJV2XdFECpZwkdnLmQBS3oAOAnFH +6EA4EB01RxrWQISPOiHXkZtu/v0qWAw/j0s3IogSObp0fqr5sMLOtIiKuWoIsE5GfXhnd9WBH7ig +T9+c/k31QZGxdGrMib6b19HsPaSBIaVsSP89iSMCZDARGk9+HtJ4GsmVHVR0OJ4CHzNnovt5/S6V +mckqFs/p71hkbXXOhKOZUyomaWKFCT7QLcFgZ/tdNiZ3f93yUYwTQWll9J7gz/YMqq6yJkDtnTBJ +TysQvkiHvi5NeycwQ1ZfnLfhvrNBn+FnH3oWd0ca3TCO/3wWmrBToWbNj98YFS8/yhKZlw2+vZwE +HuY/b3Z3Ez2zpPr5PCQM5XcITMGNSLk8KyxBSf7737ok1oUO71KCmOnXLp0t5+/Yt6BswEEVbhfZ +k8tEav4hmFUsxWTq1yEclDTvkVzrHC8ZzDa+msqB0vAE+7dYqR6IuySAqOIrJJlzPWlXS0JshdmU +MSqy0P0HJuxArzWVKhA5AkzdDRZISe4kLlt54lVNASjKi54BsCLE5y2NFkc7jIDP7vqttM9QQ0Md +sd6/0unSplPey0cIqETIkpECKOeMoo1kdQl0dxTS8rz50jw3Co1fh+xe1IfKn3wnxxcjo9WMLpXB +J7o1Ij5VyCsjdTX7klRXhmhE65mYfg4+Uni7HyFslB1bPIpaDKHjBFlT11elToy1MOPbn8uqFL1F +G78L9jGJhkFuIdcW97h5DyXNE9DZkar0zWeUuZ2nVIKeUmdQJZvZyLi17Huwxkri8gKYrzU9Vieb +sbUDEM4tig5MPto8ob8xs6anmMnb1/RnprfxhazFu7rDNTNeUlwH0X31YyYZC2p9R6d9/3IdGbwo +7g4oRH65kky6M9P08asVr13YIsH3FECTki64kHQsxJuSCXN50O/hMnXnqyjqsPWXvZVViYR0h8TM +C4haieqyweKwZWAt0UIeFmIedUaFgjH6bIz3pNeUbrazgQYunHmWPO/UvJoZIMX6Ypt0y/2l5+/A +CH+O3J0WQyJCyzMIVC9lBOY5WO+Rv73R28Zx4frY257a9JMTdkSmDgGGEgs3ji4TUuWcYbv89/Vo +jSuisAq13xiWUYO2EUjaCBGjK0ZH9JucL2IEYcm+5hmoxKy2Pty4r3+FZEhtwKRvAhOeO4oN7Yqu +RQymDZ7NXNCZwlHunz1igU+hrT499Kg1aTqiFnGKOB98rrGnKeIwbzJbQB2IsL5nsSMpFycazKxZ +R1Fky8FckPbEmSZhrhsROD/rAa8IMY1A34zQm7dEMDvYcp9kqU2MQZ30+ouujA4ki2e7TlH5rvXa +UVDaiEShSogI3teiYElhYbfLwsbdEm7aKZ+aF+4376+ubbBbdXB8Eho1IRkvCGQT//BZAe1U44Mg +z7EYvdgugH2uYY9YzlN1YwP1cwu7ONAEsm3WMxaBq9aeSQFUHK+X9/A8Y+7xJRlVgTNrbwphJVhi +fcI91Q/yv7EpzWipLbNuKkfnWaxiMb678jXB1JH+5EYlL6daf/7sS7vst58VijrsYUV7qFqURhp0 +WOG9ed7QP6Kos4suCH7yq2wyDxevFgD7oJVHYm1NhYlZlKKoBmrtwW7lA+5DgT9yngSFwWC8a6lK +Pe1u7YnquO3RQ1NZOVzDzHA4Z0SHdbL/+bi3wqsa/f5JXLE8AWSEfnI7XIRDbt2cleDIUJ59Cxb+ +1CYEvLI2skk7Yo8FOUGSzwgWkBR3615o/pMEB/mwrXcNtXfg5CY/vK42CH6d0vmMmeNvJjK7RUr+ +XLOVlSA7d7qAG0gzxqxssHZoAcFfg2n5VcBLncQEGz8TS8fxh6mNMP9uB/cioTZSr+mZ0ApgrAGe +/3Lzc6tdmiFTqOEymTmga8LG9wb7Hks7FwOrN63SquLThav8kd0gaBg9Sm+z3UFQh1Pr8T2+ez49 +HoCBM29zQVo4KkSbh4VLGldTuQS8Oo6r06k39G/LKfV1gA+ibxp/3c8qLy4+/tzXywdmlewNWpAF +0v+o+he4E8rZyHdu0JAAKXsvQ60sju8bEK6jGrXEulu79DzSbZ16NReu0ZLwwMFQGsnNuR8zDSSC +N94tgz/z3kbneo6al7oplTCZiyDXSGYrKUzsxYuy6/8urfB3i46/7WO1kuZzq54pqtFyi7CJWXY2 +QjMuO0GrGyu1xKB/Lb3mC7FrBEQEqHzHs8cRLifWjozNKb7Sn5HPNIfIzFRb62gkL01InI568D6N +kO7Zzz65R2eD4mjCWuXPgn9Mm8gUfkevw1/8HrKi5DuKTrr+fx7vRcQPB/jhHLfbPIpOl9PfBFl6 +dI+cWeSWni0e4ZD6patmSEljRjK43MeDrrbTOG0LrJ2S5kHt0sOAjMIztCHqEqTpyROAvM2LXf+h +fDphoohZHbkbsPl1E11BKKPwjhmvACl3otn6Dl48rqfOtsON3Fr2o1yMdygB/tUXUH/XGZcdU4c1 +adsJlXDIWH9dkFWX8YQU3wG6o1regShXX+i3COqTZzAd7x4Yb6A4WtY13XjvzY68VoZQjHWpqX1i +Zl/mxJQDLaB7F8qYqqWa8XhiDTxUZkYm154NB0ZCnzXdT5kYRJAv03mHTpRpV02yPyheF3iWUwdE +nI857fiDm4gNzND/zXuuigxPrfqLh4jmACTUZ7pHRQETUARTD7rAk3GhqHoPaaNk7GkvCZW6kYu7 +8MZjehqkSAkfHZ8rUgrnOeT7r1gh/U99/iLrE0W69L+NyNI0DAfnv5+LNv/IF9cVsrdIyn1G/xZ1 +VCTXVe/gL4VZvYTVNbhsIhizHxRWpR4gW4uwImfE0UgNHK6qtUgYfhkdtvZ2Ev2/0e+F+TZu5dFA +HFcKQ7jawR7nrzlVlmIv0eJ6Xz/FY89B+8tUyUiZw2/FZtx3v6cLSGNDBLP2TPv18bUr0paip5ur +NDHYEuQ8LBhO6b74NJ8qDfKReuYUuO4CYy/flGf1AJBLHA4cC5A55O/I84qQh+4JQT+EBZKqtbA9 +NleoLARI9QL4uK+zG/vsbhS+a89+7jgPkBe/gHper8eIIls8fHPo6a74N5RO7bDy0rm8BfPegmne +FATH+TitYJr9onorrJEXBMmH6tUNw7MUgbYDqlFZjwWhxB9EMGBj0CHrFOhiSr4D8tTZp6FzrLFU +u5eaz9xrFxH0comVpjhYlSAHkMkP835VX2km4uEfoy4HirgTcAsp+TGKR2g75tQBtyjy2w2nVBtB +anlhTmE6WDY7+KPec3mfiZsG+b0yETW5zXN4F2mj/UwjN8TYqQ7AF2T7JUl93pU2CSMlLkX9x+wF +Ce7Q5E7HhlE6SG8rFufIiXeW0EY6BJudal4Bw4JaiIyEMeAhg2McUsxh+iDyB8LxJpQ0u+Cw/hkz +EPwes8ItvDCGMdaTgAHYQJrKCwWzoPBPF8dP/EeaXsWW4JSbwU4KyBDVSQ0l3vbbH5ft0KkJSdPC +8lllLiC0wo/y8SRv8oCmOrSNPV8N29vbPQrDlwzDPTbPu9ud0ZZBHllgeqT9LxYZgryB5QP6m56Q +i3GcdIxaO4KKImtH4vHSt94pBbDD50pgKSXLcSDGPOFDfx8inP/QBwQeDriVgWzmuh27tfbPE31x +3mrVbHnKLBRGbFqbEM9xsQ7Gvk2l7egDDj8Wz102FaN8pl+QbVEa0OXcJLpYyByCwSpR6xQiVab6 +kmvWf045deyo3DmmNiwRR1lTXXGE6GGRjQkYwAppyrnmTraXCTJnEplipQtI4v4pMfx94NImDLcn +DLqiiIbTwNJs+11ziNBjwXvMsUDL8Z13TXBVGSjn4A5pYNOxK+OAfbtDzDJwXlCiGjJ7WGVFnoU6 +VFKDzA/PjNrRpsDCtgPY8GSESQ0U0o6eVPbCaKQOP4rPDrVKe+gAPpFte5PM839H8Las5NHlpkrC +BGKbRE7m/X2Dn/BtXwua56NvhHb5EixfPoC+FCqwDHu5OQ6iraoHQQHImOMsZwiAe69NKs3dpPJf +QuINnC8F5fiD+EH9MjaXlwd0nHAHftMP4SrJrivOCk2Z8En5e6Bjd1SfjzcbAmwq8KAOdFanm3HK +pBQg/UDR3pfD+ci+29jLxFz2QmdoyALTh2l0fhYhv9x20eKDw1KQRCEFDufbSnPAyKSqFJwZSUhh +4vkR6EpxMFzpLjJ6DOTCkBHwEhhgfA3UIFvjiMAHVzEq+61wBg5F+DftJakUK380yyYheXFWz6dC +pOKxBKXETRKmiE6ewSJvq1UFblH0AwfaPpGRdVt2DAidm3m+Oi5bPGKYcCH/jdlwXWgHIFazIWz6 +UADPNqWyGDmmQgqRKGp9YlBBvj4ggcHszNGi7RMCgMigAwI2lrxTeY0E61LkKplbhU11bsj5LG5C +1B8FCBhed1etSAm+7ucnUQ8F6b8FpSBP/tf4nqryksTxdKBSgSwOk7rOPkxDEi5yZ1UxaM62QPjn +8ExSzz6riw63qJA26QocItY1kAEJEnKQSAJhDaALEmL2lE4uuDS43qWdcu0r+y83FaOudMAgheqp +CN/69rugZIRSO5bKMmJpwjjakBUClkx8A++73RibuPDTka7yDrFKE4xB0EKIktxNBqvNIov9byI5 +2OsWmQVubJmmF7Omyfi+qqLgQoJNegJeJniDoUKfh4yD+UVrhRSFusGBMz1GTBnctThBZqZi0wVX +OWaIQ5HZkJYlpOTF/noKt01UB/eqhESw2e3q9lFdztgiDmz7eMc3Ab9Kq9V+U3i6r/3Js+SEh13h +n3A69kjoQl16x41XmMdypHRKjFhpUFAdeL+ZdnN4Bhp8IyeEvjvIO/IFfLlC+AJGIpeZOyjPcY4y +frgodMgb86xfaRI2aKtuemhDT3r2+DyY0Wv2yLb2cDIgRyz3BY7DNxTBJo3WnkdpRIXLCb91iMW/ +RcFRDvCvN3uIsdnCEJn4dQOatOXDOrJ44az9DtAfYIGuPOisUdVH3nddN5bkJ2RssfsBqOSOIfaA +PponB5WfgeIdOnPrmrtJQquWRqPHCRwwoCUWXHj1rkKq7OsPctJkrtVlPfXEf5QHCMSUAJ2zI/Ly +QPBq3HQ2L7CozNQzvynT4+MdFT7ZIWn4FcDj/KKbGVjUeFNTCvOzBPACLQ3iXQEw1J1m9wdxqNOK +OiKgiiraswlrYsGbITiBUK9t3H2/dWvCTvam3Q6YDaj2FjZ1+W5jOhMXjKOgKTytYd1fQ9QKvoPt +kgubNUk7kGcrnmnFJltcY/avvqE3Z6Us01unHlalw/K1Hvhkt8GeOkUYaMsTDFsdO5A9VJH9YmCS +P8Rcj2nAZQUTBOAXff4KEZnY7uZk6MB1XIXBNnkM6QEZ4HFw9nYx67rUwfh217RyjKxNrWJ2mQmx +1nG5rFxIJMs3TG+IbDz6DGjv4pwKcn89b7esELD9LZpVacqkOU4U/hou2Ru6eWDRKvgw7kb/Je+0 +Q3fakm7iQjRA0nlR8Z33D/QD+zD3Ty0jEVJsi9QBCUe0B91xc1MQ9n6ecFmnOjBz6yJ4DWyiupqn +w4AzfvIRImGFxprT4qA3J91XKY9OVMCmNYCUOggrVZf0aGGifyVf2txHuzBCL7HT8sgoHe9/1Nac +Ab4rbihnBXEGSef5Mcjv1qE3drpa4+NKa2Bj6qruzXbM5t8M7+1NQHvGemG88oBWQugtQ7PJUlNc +0r4UH75Pvxcnl7WGGQKjs8FrvO5HvS8zLh/USqF6WfSijWID/kY2z6I6oIqC7c6oUlF8Clw2OPEa +QMnyRRM4QnSrqcOAZQ6nWv1W3rhylB34W8p1s+g8z63OF0uvQFpukh17PnXBWgpFpHJgDO7bxWde +TFLyKvax//O37BS+c2r7pBEN7YILRAKJ2hlucYMXLCYa3QE30q29Zezo753FVxnFu4gx4T194H8D +e8v8hIMwxhHJ8P5wZI8D6wLXMqwl4WhXX33TQn+GC9aFnutHArflWbs43kUIuG/2wIgUdKaT1dNN +ap9rPCKyL+wtFtl9EXOYMIUT+sGBsSWZs5Qq3of39pJ98Y0V7BDMqvbenvLFFEh7nxUwOxxsfuw1 +DWw2e9VQT5afte8oq8zelTaaknt1WSb2o9SN6cAlWv0roRkmMex2saa74k7qXqTJaMtajFjlYaAM +bZ+QVQp03iWH8nzyzAxzNGexe+pcKsqyT9anxM5wYcfoKeu9f7ZA3Xe9hcvL4XzKnpx7kmutxWNn +Jx9Q+B6BsZ5hgQDEiwtY3QtWnBKqIpM1y1oYVkeENnJjhHBD21kbJK6YnF5AkQlN6GWQ91xe41lN +S2YWiId8ggrX4SblVDo0+/Xgz2gtlSKj5DLbdjfNi/xdkPzhjnlhvTzI6JdOAtGMkHtXYJXBvXhd +4eGLgemew5hQ3pOQR+0bVao22OEPtL1mZrv+kE6R0kKxmwBYC1M7sy8GnmOJIlifNlpmbgNNg4Y0 +T8avQYvkHvOn55AcAEbJrBazYCD+7tUAjUcFkWjpjkvNRI4yTf1pCEDhztXchlt/1JIou9uzjmSn +Ece1oSG97CgyEi7gJByGM+faeRr4fPOP9btiQCL9fD6bDfCjOvoq3bKuwc2SUZS+bcaUk0WQUVL4 +QotlvV74G71MAROwbWFEz6qSITTUfiOrSzplF0DCSl/61tLiAr07Ii2INVXBgZt0H7itkEKEbdh+ +EpDOahPesKlJgDMCX78sBYmpoClShMAaBWytQFBg4rKBQD3oQ+zTWyzB4Tst52NaHLyUUtLISX1k +xJvb8uHhadLUzNJ3xjHiLdswb2uF83SKDMXU1Q5OAWS7ajdjq4+DVuURhslMwTyQ0/oCJUDhDewD +Wba5OJZtQwNpqhD/uzG4RDSP4+Qg4xIYd5v01kqVLaxSfKA5wfFzyfKcmles8s/1fShOwKxg76sG +CvO/EMyPaGhPvGlnnI04jLTAikf/H3PRYcKl4twf0QSJS1Yz/X9penUo782krv9q+trVS1Coa0/X +RAXjZOPDvvjZLOTPF38vvNDGHRJrcDR90ARO6eIYE57Hma2XniDmOKgTEHhggib6gEo+JucMFm9s +j0GKsTl0HaxJXPCKUg1yyns5Q4AANe0OuFkKd4QAR6u66a/CH7V4lI9fERgLL0x9FZo7D9ngEPKE +ctxF2u4BMQRXRRefmgRs60VMtsMCXmozx9i8klgObRMFv/+5KJbcXycuuVXH2vPtBYtzu8UdIEo4 +1nEaKJgStFKviVbMWBXhqKAHaCiIygiG+JN+0pt+7WLcA4h12OnZ0u87oWDDG4MkEPxDMn1EuRxO +E2s9cHTuiOqvfym+9FGeQjbx4cRFM0mgDVpYNPRgA4Bs59Rcd7vrt/TeOuWeRGU0LE8aJ63WQUHv +huXNvcGf+MV+euS4U3iRe+KshUTtshbVEnfV5gr99V8vs7elAC9jRqDGV+qb8UJAmTiQN3zRK29R +QUbCElG+8nE4HYxuRMHpwxf3y7aM6JSiZ41xhZBIQTwr597ib/W8ucSA0huwrn4tEnpqLYY2g6Ru +wHg84l66NvZLRIhJfFz7llqUFMcwCn57WYdeKuzXVGx89YOde9tnC4k2N5tGY5Oub4qhdYRgGB3h +dccrZDPiA16NBPYVaiaePDd+jq/rJc8OQ6ck7u9z2bCQFlvuvJChWwvXCJ8urbeH3iXOT+8UA/m4 +Lf3Gxy+DUfIMfIKVTfwPF+NZR1T8BSXpu3NRke/sZWw5DtB9pJ2hku0DMCueZz5a+Fy6v1I7z6rH +horL3I5tJ19vJMVeQEQVDmskaD3OeYnX+57IL6bNbxHcPWzN6qwJqERQmE8xx+qoG23dAEDdmxuE +sO3ek9+u3eHomPVsPAS8VmUvsWYxDN82YW1vNc/RKy9e2YuJlsnPF1R0/+pby5hn5Ofk4zfbgt70 +eCoBbDUa1YPVKZW9OOQG6wBUGreadWUYy4dnjmzwrVYo9ONoynraueW91mGDbIeoQkaCqHFTMVo3 +x3CFEPENIF1FGSnjQfIqXOOig7f41gY6lRaRRvFEr3Jb6bn7nxVZ4uouKPN2+PWGJMUW4G/oZlU4 +c5cUYXo1Zx0mygqLFnNGYRc+HQgC4JG4CVwE9Zki/4yS6FAi4QDEegC1JOKqpYiMItPd1LjIh7Cv +vauBH0KOppOLu9EXX1cX6HbxpM4/TdsGyjJxHxCMyGJOrOTV688PZGUqCxKi0P2DKPQL6wjz5duT +Kbma5Zy747OjoRfl9D4ziOJsRdpXf9J+Clng0snv6zM0JmrVh9MOFGfYxAkH6FFaBmRVt5H5FTby +X/RvSStGLYaGrUd7/Sk0v3r+CYaAMidg0mDjMUPA1RD89E0MJSkSy+xbSoI9WGKxHaW1AwcR4hkb +83eTYALpW71RYeKlBql3qHR3pGdfay68xflUywx0ZJHfjoEiCHoK7jRzJyhEp5gYTTWLNfTzlqsl +tW+h87n/GYSl3OTbWs/hPa3AFL6LXaL4lnzDIknAKnzslXbUJQck1b7Qj8msYSt/71IyGT730VX3 +HVpgh/LHMG31HAwAmREH7el3YxQefAXcaXI/MKDvPDkifshZiGCjZmR0zLFceq3rHk6FRYtVD9FY +BpbWMcLijqGHzx+qNgeLBu46SzbjO8VKTzZAKB9CSMqdhWfPFVu6MdGrzwlUQupXP99mXZIhdqjM ++GovaGRWZsZ5mv1gySz1CkH3YccLj338hEHCfIveRiKbnERhxqe6GJfvI7+szm5sU+KN43WwiEgF +qvgh7ofUq4eHxjLk71mQOgxQ1GVFwDCbwsBe/Hann6Rnkpcyx/Bmzk3suuKjeFodh5v8loaCdE6e +3jps5NuAks7JurNGX8rZ1X+VnBQPdVONm9Yu6Ii/VdR0CX/Zs/nOzEG7SzImTXm+U0dQKJkBDSTb +oQzzbQ1pw8xkZ05EFv5Zgl8a1ocATu1XHlxKICbQhErOt3hDjigm4qN9qAK83kVX8krLJovLDVNH +092yjhmfCPkE6eADSwsv2rquf/ZC2sK9Hm35vegyK2s3YMZbaGBJuzAYU7RTlFH8ZzxxKctmI/ZG +SKAqIy2DEszSTIcmAamcFDp5ZGTchQwKeFo3Sk1NJnazj5Po3/ki8azAipcf780hvBHF3cXAv7UM +dQR4xC96kMpWwXy2CWUufzqeMfPYvDEI5/ZNQmqcS2xe7MJjMy/MlOcsN0CTJoucYK5nYe/vT7Ay +tcuvNSJdT3Rqj1RWTbC0nkcX5QRf7+jgZnS0kKofjqDGrJPxqoRi0XBQzMxqmNwmqoC4wvaVcyK3 +vd7tu3AX7XeyVFkCrdLv82peUwCsqUV6pDkg4FgFMlX2VajMdZoZHNnqPkqocn4D88N6uER9okSH +gOXNuyQFzqRSMfM0XQ+EealENLR397QyoFBvV+vYGoC/m8+IB5JxuA4+KwvHCSX52gRdRCIevMLs +J12lR0y0YxP2AWcc8HR6vbOzJamC+0Fm9HEOYgqUYky9jrriYwtWHQDafo4+OELFI4LeXrBtZBAn +V5Cf3+LO7lsvlFbamwXtDAq0+r5gLqr2h98sxKKsmFPkt0kvPiH4LYh/OZ42r9q0RBD1JbnSWLIi +51vXsIxsfqU955x+q4lJ4NQroPflrg7UNlVQeJKb1QPeOToHh8yK/ihANxAxjwhlj50CMZZ9OqtO +9eWPzpwvv8kqcquU4kx5v2h8nIbugHtDaCkKYnGzEp9cFCTJ9Ejzeo8291ndcYnkkCUMdiAI+5Mj +VYHrXgX0rpWUPIJvZaUU0RP6xa3FDx0nYKIPxs0COsxRRViA1yEsYoDbJkFBomxD8ssasD+dEM+c +R6usMDmNjXvxMy6BkkUxcly2iqSg/8kRsmyF4ITYkEgu+By1zF1AdNqgdz8BsDcqdKDq6jhlsf4V +lKWETbrz3m/jf+9fSxQCWBMT9yyP5Z8URuheB6G1G9OMsnQpjGDzCzIKqJ48a+zUFOnL8xg6MB0N +MbgLuTFVYEDQklwXfSWCQcXCj+o1yu0eThiqj+mId6ikuJ+CtGMOl0PHNxw1hcLZgh+NXDUf1dgR +c8c+XppgOaOd3PAfq7Ig/UBH4Cd6Gdoi0iYIU46pp+x2GVJ4T/8k5c0DVp3gCZWx8ex77p9b+Rsk +48bKXQe7zCB0YP9CM3XvH1pFi4pjP+2/y8OxaP6SVT6/upp//77ZTmX3V1TnZovA7RYOy+ZiQJBM +lO3tVzeCmkbEiE/HRGTOwA8i9pyMDJzEv3U7Ulxlx+aB5dRDbV1NEq4x5uWHihXin9/Yp4morvx0 +W2uVa/EJjVkrsWfuV4DOQ1kIZ2yMCHVfHhFjCCuddbj3soUKVYWNZTXFKZwT1/8WBF253nuhWnej +ox78qqHuJQvhNtqjC9rqGUYtsF4x43dC3xzbo+hxjrCjhZRJZ6zvLn0uAtLqkEK+HTr6zfmT+/m+ +AA00BtKwjtCU0GfB/rr6KbwB+aakZwsoO++LWWNv5Db3QzQ8YJIdWmGRXGyyQOnmPOCOeGibgCb+ +Ys9wPb7xOu4r6T2qNYrglq38dwpM/PEb/lhFnMS7u9l2mvNfGwg4kW0zd9+Imu5t56XK5iU2zx3W +dRypS4HtUIQiYx6DvYn5bCtw2xDHjSgJgysjovIQ3Vb5ODTLuN3wOMDCR6qqPg+yxEm9na7oc4wH +BSQqCR5+MnbJgZCKSj9ByvKGhZ6qSGA1ECcM/0Jb0uYLNTqjSdBNAZ9xwkLodG/aTYCYY9OCPeYD +ufNsGyg/+qHPLZxPL2YoAzd+WRyep2Epc5gAbzQgKOCyKKL6zh2dzwBQXgfuetq1jMOOLbTUhIVq +tUhCo9WSynM781GcWVZukC4CJn9eoqVjfZMFUCdNB89iyA2DcA4UCpNkpDdUor0dIrMyLcYU/Nk9 +1PQgbQdCbKZDWXiJzYI+m/cdWfm/kMh3Vt2Ez130P2JE06g3qwXxX2MJVZIQIWFcDAZtq4J13xtp +SFqd2wOpfZj0f/hI3OcqovjRMNngKkzga0JGISGIZTDwZSx1+WqWHCjqNjAIfRcvx0JnoTfOaoph +WRqDIIwsvLJwb+nS/9M5di2fQdv/cVeOWwi+q5IB4Zss/JPOBpw+uijhrEuv65xL7Q1ufc+Bfwpx +27huX9Miq3NX94LoU27I+ClgDsoFWQnVUE8911qNbmqhSi6rWCVb/7Ni/wH2nvqarZO/f9NTuTmY +KNyNgpjnEeujABboIdJqOhk/tS70lz04YGknxICMtd2lk9c1OwK705xALBa+9gMMg+i1y83VbQJW +0sZZlZllUDcQRCwANgxVtzNnamjZylF6+h1Dq7nY1UMuhWLQAS87AWD+LTpgTs6kU9DRoaTXvpbC +gSlynwlip7vHV7jifF9j62ydQf3coeL4z36ZMyDWFb0biyown7VJztR3EbCZWE0f07l7FDdV+U+o +TGGK1c8T97zC5wCFkjwguuCMtFN2v8lr3KlDd7FXF7+72vUVZJ1DM9QGh8mKrSv//s7ov9h0jYFe +J/RnCm55aZb9BGoaMtowu0WxbBEToxPBXA31EtjnYa3w/pVE7Uf5e7snNAr/rJ2Vwj8IVy0vYy4q +dbMen6FNwpFhxBHe6v+ig1RygvhTJyuTqBqINGRUkeo+RArjoziM9ABIzR6FJgNwMj4pTORwr990 +M2/E12jK3u1CRiEYz63eSC23mTtGzQhnfUWxRn749o+eiT+jSsHLAOmcmHV5jwXjzMipTJJB8U/A +4sbxA1y3G/B8DCHWGpZSDQNI5t/NnTLEPwe7Av9vrWQVMgFoqoYWc6TCwxI53p6ODJOBFH/YMkIw +kGAUOJOC/vroLqpCLNnqT67CC2UbEnYRFTJudkKlbaoHprChTj1BCrDdqr8hvuC/YHLXOwDiRpW2 +HqUj7nlrAdiZV98T8+h2Zti5/bi5JmRCbvbZGpxPx97r1NYoGz3f1Iy2w0SFvw3carbSQAUL+tB3 +K3F85DAW9txzA23wjAcF3Am9PNjw9xEr9ySM+dgljfqRwclFzpoFCOGq5EK/aejXMMXZVKSDAUc/ +48AKjA8/8MLasRTGr6LA1VtE4tuqct8QV7GC2gG38MLhuoZD1zN27g5rApk3IlQyZk8hVh9zdVZ/ +AwY86jrYyjaHyaEUGsePIZW300ScUJAkbTofCUXRIMUi51SHNTKd+i0RBv343srvWzv45GakoRD/ +VKSy+5rBsbpCYEnNEQBgaKKLCztVbksiCkpRWdjqYAHm7qu4VLMNJEl0u8DlBz7IJjsPLKxXhNI5 +6XG9DhtVRuNq0zmPE3MEObYjQJvuNO6gTxFfsmHoI9YNPH/22IImgHUus4X+t+HJwUvGZA1x6xlL +X1kzbvhVe5PutoIoHQ7NiaF0AWBN4/jTq09MeDZ5Am1ip03IxdwOEp9uLQ/mB+SQLMyFbZxmTt1K +DrgCjdyigvem/LVLebND4QIRYf/hjtU8dyR/fYkQfvO6jpq+QodjHlst2YvbU7ZLCwJU6VO/NPLW +Oaf8d3y1lYBlVHcejnhZ+Z2rDXdu4Ylb4lU/WjbVZtXo2wfTub58ShBltWuXX6ZMFoKotFnkzXzX +6WYVUMZCGSbNyhoLqDH3X9k3CNB7BTODeW+ttfcpmgLzBPIEZuJjzoH0ft2vyeS+aFfxhQjpGrrb +2Sep7Q/lbIpwRU/vpmfF5bXvskAx8xtrh37jMFOn9nf/1b35DV/PhatrdN+UMtU3yvIc4jKiWQTi +JGUBqLCZfYBCzujNUfnMr7OL5A8G9n9iTJK5rq8o7/W+SjmUOu6+6P/vN494UF4syO5xosy4wBRl +KxM+KkVN44A81JnKS15a+NBAeCKI1NObJZy8UM5ry7FtYQ83F1jeUivF9KJitgjOVTdeRdcI8Pfh +apzt18GdK+1JGW8TKHNjFwsML9gDIV2qF35+wCsLCl+DRWYZLpMkN9WSjmovPp4ePjjQdNmVkd+p +LNFn2eEkhASXDA6xClXI40N0BEO9RfkXfbtAvHAd3tJVys8NHYgXLtwgRieU+hpbHj23jOTwEHr3 +isNBNP3C3km8lDR/bz235nS0rFQN9mCxL2enaNAMn7apyJxiBNa1t8yutc703h/QPRXHMJKR4TRY +hx9kew4Eaj2ZMefGJvCpKZKvG08ryppboqAV9l9MdHOwVPSK6zP5XZWIIy7VTdbwpc0UFVHjRfxU +z5aM4BX7ICkh3yuWxuX/UmQKBpUkfZYew0TWuLJoqIM/Q0d0NWM9MqHvcFuw6z4QsmdEcKWlBBBu +AidXmZu8usjnGI5oRhiBiRzmFHfAwq6WuViZxjm5dPpk0ZbvuZed6wxLfV/xnxppDASE2pqydzEk +uu4XmLv8FSXLFdMk1vemwmj+CBjSR0dhrCkcH9jNJ6thCa48N6ozh9NKIJqkxYUmvZD5U70mrps5 +CbXj80Gk8g3Xw78T65eDDR0OisVuY/T+yQaz+eJTtP/5diXcsyHdORpQQ8Nqn+Zy2W1kjj4BlNXp +arZXYFoLffueB983cn47qJyG6H2hIn8qvhPgutiNfUAUD4lZ9q3V9uj1Ha/FkaqvQQLSqLFDJPX7 +0LmEeQ26UzpsXC95wX945JbOQwmRje/mRhp4HJmCDHcIOwX/hIuVtam+WStrwQJNvASmrDKNnGp0 +knPtj2WznfZEuCcAQQD/XqC/EXLTxIR2Q8dhvrIQNMMEy/bi+9IXgX1oSImjPbDASv0RDGDJzhFF +nJLMBybL8Jm3K9UnMBg5PoteyzE5ISLgvRIxDflsSwfKKxxfPgNni/vVytCat5oZ1CMr9d7A2y2J +06IWTpI51Fw2ZJgtFNN5iVqg6eBHZmsS59qQ4cf4hIn31bm4L3P6fOUu05ySRbuBY2FZtmEqAXSm +2uYCqZi7TbTiEKcqSxZVORk34diWx1225OjmxbvUkAflKP/bNs4YdEl9mV2wcehFhixI450/OcoE +vKFFRZ9E/J4rCzdk9reSw/OnoXs5xHPbI/ItiOuf6J73Idh9B72W1+NuXcHSawkHijLcg9JHJFCF +I1rPq6pkY66nhYHkiw9C2Jrhi35FOJ3C2+BM3ErqAPWjj4cU1G/VzKEyVzU/8s/2fkNU2XRACMHJ +kHVALcQbUuuHj1ZBNpS3r/0xQEA+r3fTug3cvOaRMiOCjr9RDOyMIEbMRiJ4AHD7orI9ZthqUl+U +o3WQmsLsAvib/jPlNJ95tEX3v9Cno5v50CLheHL+/H7a9GsKh+qdIz3lX78R7DepUscFR6R02yum +53y2Qn3KtCrajRrFznOIyrGDtdKnd68m3YnoUcn6+Zd/6nu+jhrP5w6ikS0GsnkIM7sbwFI/p6Rc +GVUyKLLN/0EFaPQjZSW0wsbkmB15F7N4dk0IZRsKL7heX0HQZQho/ntR91ValMYTlqZL2Mv2LWr2 +HiBe/y7wb0jNvwHWriK87fMJgIrC6vBZQUg7Gt7+bfcL1o8Ar+ifRmJaEz/ZwlQ7DlPsuTdbqEm7 +O9IMq+mkwm/UGwtr+PgelK27CQu91wa1D1q1VYHzXHgurnbPy8DLsdPXaJPIbFtZDdbohHMviVUl +G0fC2ORFf8nOSG45ofRyVIE42nid/Ozf2i5R5mlqBfOSCqINkgs45oK07s56OaOUkIL6iZYj3l9E +d7fuOKqzYOkCSnD3+KQRGGhus4guehuWSxjFru4T4l1uEDgR/Bn5/RzmZlbPWhwZLt6UN9PwZ8lc +DfADtaiY+Huz9B6R56sPuYGOEH31bpseHfIT2SHdLpS9FbNZ873sZVHzcdgSZ+4IM0UJBdRo7M9d +Z9ZSzeK2t7qYMnoAmHurlVInIKLDAu3pwJojWTS6pi/fAhqZWuwH+fefgevV58Fp76c98MUBjzQq +w6RG++D10us93FhaPNF/rpub6cC5O7jEvl8+V2yReH+dZ1c0qKZod3KKSFLBivtYzDjfOM0Bmk4w +URqONaoi0bPky5dNUHtghURLj3WCXApnVBGxrMoubv494hon1bzdN5XNQ7f+5n4v+d6oOzWO91GQ +7AwH/bSLgCM6pvlwW+3A9M36lE7fIC1XSRHJ71ym5pozWC5KOSBQAIFs7bHm6x/QF13hlrG34dca +90P98bd9+oQLlLkkfj1JIMx2iv6O8uH6iqBA4Yknc7gfKBikLdoV3sc4Ygm51wC+zxSm9Os2bfyI +R4itKViGnk5A725wXKcfVyvLzp4ZjMUh0twpZqQUQWWkoVBRlejtY0GsN45gyPYRM3+DRVRaOoeu +F2ip8qPsi3dAJM9KtsnC+jBZkLR7/oYYY+E644oduwm1NMr7RmmVob2GrrPzfTUYU/p2AIUeV/sx +HX6SklEJ8rfrUBwiqH/m3VAicPxLRs1PbkpM9C5mOu1JigMmkLP9EwAKMRw4L016r2QeKRUeDjmt +hD6Ah0k5EmSFzi9mNClgThhC2POjceXN8WrsG92N2gQqBdIj9PVLV0BlVMkgR2vP+/wO0Xis+yCy +WchnNiKz0ceiBPOB2o2FuHaEZfcKQRTL62jYz5HaDmnMkQ4LL8pDTcdeZ1jbW6SVyWknsXQsl1C0 +FPLXS22zluDVUUiGTl6KxMsOlADIKBDMiP0PPrT9vo8Gkonb+/WMzFJ7UQp/5XTkN/dhQfYKlcbs +c+eBnwYf6hIKck4cKnFiSuRzb2h/UHoqB8HCgTXP2VHvKbhIqgBPZDDReYPkpd67G/PfdHbd70ZT +DHhv+32G94YQgVEG4TwQxEzO5kav7dEL/A6lbL3kBOX5ha8/uKToB23hreYTNHwgH2S6pgSUyZFA +Dfmx5hgoVG/9IEYp4vEexpaF8VFnK7/DifF71pi6j/GeWsv20tqH4so34nmTY6XbWdrXYey/SG5y +TMAoa79NKRa0nDg+hbZOcwBR5dapd4psvvuNieF4tMVsPX8Ldx7oxqKL7CDmWl8aJzhRKS4+8qq+ +xjCvgVfKcCOf46TBhh740vkzzpsyQga7394lMmKr0T9JRRmdwkhmP7BmIYUXczZ5i9WsyogTjJs6 +Hciyrh2E/rE4ArTHrv3/lUPkKHuC8kdXMqKRvEN9ritnb1IhS07MFH6k921yH2dZwXPlQ27qHRDo +R0UAARkSS1H08kZE3LHdKMuHXePMmJ3CjYHABZMKepHEIOW2yhzpL+HUanZBb1felh6QG3eyTnN0 +FlpruD55pqy0www2GlVwwnJYKohhX97dB/qSqZfjY33LoRd8BRWIHmLmNv3zCG3Gf1dxXfJyhWxc +jwrX/FKvQJdgJZ+OXBFt9ZZSsEzvPY2hpyIbGhfkrWLGd3dFxipqHYHMWnR8YKND35soalLosrkY +OOMbSjJ/pPWQr67CjhJYmzXHG3M37cJxitGs//70bmJBmcdZvijbk+TCyygv/7TolHcpc3oFmJEm +J6cZzHSEjRkl5m+Qp+cTNkNEZ8gH2Qht4fHNOYms/wOouuWL5qGStWRj3L98GKtoNDBXJxxY+LIJ +DeKUsRHLxGH9IZIQqGtD0FFfUcHE8fI68t6UQBerDr5bQRnV806WhnMRho43CM4d5Cv4w1ur+1Lx +MIEb4GbBjxYjaijvoUUxBaIZmysiSEXQWZ1UsPm9Bn0xqsGZSSKABPwhgMY5tUybCKPcQ/Upo8RO +a4JcHwIv+mqwSuDUSFgu8ql6Ng5+LOzImdApdyPdeJ4ckSV9As2deisEq2x/9I7g76gF3j645bB7 +f1VuC4uczaRnu/VtAhr8BiPAkC1RaLFqTgpodcDojzXv9DBsFEw82kRoJIsS6hlbeeSY0m+XKxey +43xyRogBl1Vqh3/36ZUfGijhnUCsoKlKMM7zgt0oEYyCnFqZco09lMVMluz1dybdbYtdhhK0oHDb +PjIX1XMk/3ErFmTq1alE5ZL9v5T7HtTEbAVmUnpW/0pTS9fYjIoTFLyyUn8rh5zL8vU269gMYOTE +J+U0tQeuBW5R6ee9NP8mT+W8c1eCkiWgDcRmPMPBTFO+fIYATWGVfDjtP0iJxiWzzpxBy1YrQ/tD +Bxn5RG24ny9pFEuuXZrmqFrHjHcMKEKBsN9mBpYgfI7i1v6Di2hlkDC+yJwrqcesxQDbhelDibu/ +2zhK51NhoW8GrmYRQltolAsDVr6DCoG+X3QtgJG2Y7e0akiujEeBDGp55DfNX29v2OzL7p/5dIsG +1bD96C3/DRamXdKLfPo4JQhMjFmwTJgXGsLv9Vaz5I2XQdOyf0W6scTaIH9TliSJSmfc80LwsAWI +KXRvRb4GOV3sRPAo9Gnn4ZJC9o56MjXCQ89yQFKp8MKs4D0qm7S/yNTIYsXmr0fnWJPTwVRw2rea +RUVDe4nNT8MvqOc4np88x7Rp4SeCjI2aG05Z6aXa8BlcgxtLUr1EownrF4XzBQDtY7ZrzEcg8yPg +zf6qqErJH7rnqoZSnvec6fIMw3ADHObUIE4i26PCWMl+zVsm1LdCkOgRcrYctVt32I3apMFSx64L +q6fA5izAnoeUN0mQDAHDLkYjRlCv8SlEHH0u4WxzcC0mVmRCEy+BK3XFN4M97ksH52t9rUNOBEZW +vSvvDpfDJfg93Wi2Sj4UBqXzi0aMcFz1LDlblNZvvZMwYPQFhJD96U5NTnuzlEDP2uwdoAfBMWIl +N5H7U1filbWYV+8HPIfa1Ln7Ilwh1ocP7bhsdqurpxFbHQuA2ZAh7Ro1S6fHXIVKmsu1k+zvnPxp +Rb9lfiMSxsmQMNcy958hnEURmcAhAUchnQ9DOQ31OK5E17rf078fn/5CdGu0gt/Qh5G0WpUG30H9 +zo0wUwwxtAH99ZSsxfRWVDTqacruS3iRmVYh2Y+w6iqBAWwQmA0V3tvEJ7VzGT6wQ/xx5JPcNylg +2eGnXo32czhwWSn7hGns0k/TUcBSB8GE8na7ZO8IClcbeIiRbekdLYjC8aO0uBwbyFzGVqqfEjlT +FjJdSr0C4I506PgtpRjLHbDP8Zr229hVpxu7MuerM3MYe4uJ0ib9Mzt7i8O8jB98k7+RNoU8FX/c +LezKxurk2mgUKNytVYB9FZ44z+q/JM0T8TojE3TTHf5Ek148uoZYuv7K0gMPm//m27QqceY6xm3W +6E/bL+Q3/Tvb4h0exj0+9wju3riJlOMZJrlAhS/uexAdObDF5WST7r1LMFxPP28wys5VUv17/KVZ +M/XiQc2l+wbgKA319T4JR9Jjl3uy5rBQYF+J7dh9ZZxMqTHuIZ0sgmoKw2oPwNxr4eWU7vz8xMsv +7mNrJkpBE8QKryPeLD2PcZke2JtYTi5eJB1Ye9hMc2HUfr3qlctaOzwBcykSKJnOL3hGnSSbIide +XGq5l3I53L92tVJPq0LI29EiDtuqwCdKSVMb/JfiwCz1uJDmhRxRQ/iJm3HL2IdrZeXpAIP/rwcC +H0NBSxF60u4FUIJpsWk+1I5IaoA60f/gEe3eU5O4BEETAy1j3RGe0K805xchzozSbn44T6w+y0Vv +IP40v1cPpPYlAjDBEbQ89QpXxFWTtnDJy27vm/3NY0ORhZM+GUK23hft7orzC1igdaksg91/Rea/ +SChmsRrDIiX9yAc1kZBGOCZUgNfbTZVNs5BC+TAXm2BnoQgq5DKX+OfpvyXpzmi73zmSDqDo/Rz7 +wnk858/xtDNd5WvydZ82xSdaItjq7KlRTSbepm/XQYnfhfMKatHBBGAz8I/0RUTTQpW/EhPb2rSb +AZg1lzDOWiirSi6Avw5PssMu5533HdPGB6wFMXqrFTGtCmrlv7ZCPLBAEQXilpKASJ7Fosrdnqws +INoQox+ZTxBvfB5FQixE3pGpVzwa007qm2qdaZDZZAT0VvUrd8p8A9nafMdL4SNEabEjmRlozu16 +y8Ow4AXxgd3DVbhemlE67dHLYMAjPs1uqdFOggM64W7YZphl8+71UThbbj0+GtUfkoHBqWmBlOk9 +iKZehzsxbAdnihc+H1N3aHNfQHeEgrjvDyG3qssp94I/Zpo4F9tGoQkfNw2je4/WAIuEISyA0cC3 +d3bHK8WN4xIJiBTdA93UAjMIX119ApXSoGxvhMPGKc/RYA6VGcWq5FJw8vHcuY1wHAvsHYN4wgBw +qwTJF975OoGI9+DUl3P1U9LddHzxxA8oR11EwB8QH0rJBq7N4EzG0HUOwRr9LNTKcgFCM62Wifqd +MQ1Tlsvc+QOebp3S77plEKs5Qz6Co/iA7mfcpJcV9g017H90Tngo+jxwRM0OrQ2b3P12qzD/utMs +Xjm66QP2VPJMffPbtSk7F5XaX4qxmFgOTRxso1pfuqjKPlv3D6vikQ20/jqwZ9qwUnxG7Xn5hIe1 +5Uuy9Og0g9QbMWtIXk4gvrC8ncJ/8J2LKPh9BWpObeUUMLcsyhgm0ZMnqb9aJAkfc2D/5fq0bh91 +UtLjwaWttuVVPTXx7JmPUV7Iof9cpD7Q+zUqK0PmdPv1TtbdpUo7aCzcZnlM1k1idwqLl+TFqExA +Zu1yUsSj6K22XX82mpV2qn3xoWL3MRckWuwIyTymVRcYRMv3ryVwIsFvQM0r24FFGvsBbxXpqRVl +QZ1ifKUQEpPMCDlDq6q0xvEMll1g1J0s0PgAyTJzXdpW/Gkp657aZVuHmstH/EAHUjr/YOdRyLF+ +OnH/WXUdCFzS/uDKCq1uJtM4MZwT33R2EAtKgyXzF9v/meO6vmYvIQT6XSXpLms2nq/9s91+2sEv +qN81Rpr1KgXTUKlDvCKGX3af78kcSaT9ADG1ShmFYuVUaLvUvqwGJ43R8k5AR604m40/T1fEfLlx +B61L6Mz/hb2PJAZML5ss6E0PuVakvhY423IOzwaKSDZwkHnJknTGJn/4ZrOxBIzhCO6JTmMYnye+ +GYtq9m+99jiXa3zLuAyDZgR3cYr/kMiaseBez00ipvFJBlNuPRxpzV1NvnxH/6tWhTfMjYfzO44Z +jqD/8ynUydWUnz3toklHl2+rf/+0ZuGLdXoRkBf8cBnS9Hs29iXb57QOPQkuqCqf7l6oDTYeU5EW +/sBzv1m52m06/fdc08edp125aV8YLEnEGUAMViV8IyXIENoX6Zb5rbI6fWHGDaW1UXzxT1kdrZIp +6C36yMOoPLqeuGQpjlhKCXm9EGNSOBSYsnLXHTv/tGEc8WYptXeN2BRq+SccuAb0NgPDrLDxlshw +nabfjZ4SpW0+TlZxxdLxzHRLuFlgFyZv39X+puMtZCUzi3sOgl+oAaSpqEsZjOAC/yOk8l3MruQ1 +bDrPXK84zZ5klJEW+/msMueWypaFDGkd2AUXu4YiEOGj5BxDixfJXUpywEd550/OLEfa9iXA/mbj +z3Sn7HIDd4eW65xpLqFnu1u2UDSo7qkaH6OUUEL5s9pCZfqNZa0WUOozCAqcRADE0NakP5KAalsf +ZiCwMBOoPH6B2CJAfxyW8XnJSqsv/PpZxVwvnORhP1BTemJ7ouSvZVps1z89fAlXyqZcPcii9jVG +f5jKP22bkFCwdqH8MTKgiT3pXq7q3amC5VKyMwA4Srv3KPyApp/38ojCHzkjQBP9uP7BNvERBwKE +H11WQdspIiFPa/Nkhpo8xDmRVjCtuBJoVGDEp6zzQhkwwfkfNZjmAPgTlXTz5BVClKShN1KCwBeF +2BUz2p5hWUSD66LzCVNaGCCRa/OwP82GNHXamoQYGrPZRX7kBsLHw0H0qUPdbjPDW6ATRHhrhf8D +mEXnGypqHREohVIoe9fXzgV1NNyBELQb8ViDaGPD8ceqKEYQ9HrO2zuTHkspyuGrzqA3Y/LFeHvz +CgvwHKaMv6RcUEg+dkCKcWWfy6ZGHCA+PYxc8uVzP4rCKnKhNTCy7K7nYPRweNvK5lqMhdqo8r5G +99juRHNT/m82pYYE3hVxM3NmNDIa3RFcOrB0KBZO+AP5RDjSCAoqH5kPExw2uPs3vNGW2DH8lxFd +dkXip3+i4AfXeeH3Y92xqpCUbE/700wHE+deqC5+QG39SdEOaIWwZYsnFqS31Aq8/xg/BNJJ6o+e +9DQFDD0XPrcZYp2rW3r9wke1z95N1v4cTbq40f8VFM5tY8BVr18aYZNP82iL6ljeMda4Q5wmEQbC +wUSJKHFAPPcdkUYElUWxCtlhpkBYlgvN8hIvTyUUPbO9DNMX1n/E8YOdL/UdrviIf8d/KMG7LIXo +S4dQSo1rptOPgI8TS1Q2Obq4KYKuMTov8pdvLw8PrpEHxHphc4w1zAs0nGk+MFfxjoHVU/qbK2GG +obrK/PnTQA/D51MsQx0pssIj87taQBfjtBCyrcL4KS5IPtXANemXWf7K3bL8YNyYGQz4FIKtPXf/ +jcv6WYyHJ9rm9sHGBoBWx/JVTH3QVVG+BU5Oy1/AnNh8e5ZbJQ49/RxAlVLPBGE8FD4xOSXfQ8WT +FWkQQw76hecOLKJ5YcHayZL1LhdSBXWwwuyyjHH3JcrXYUR0k/AhVNqDIHcRwIoyziICOBBLZgLO +dw9VxfTlSYZexqZFlVKDyoBWi3ADe4zQaBykk8Wc/4c5DPAw7AMwwUQM9x0KeOwrIQ0PNOueHJW2 +rUIAa05SNXs+Yf523mj2CB4ikpJHCX8u3xWN5ESzYVpJgnYlDaE3uvyH7ya4VSywImcUQb+5SAnR +RjgBoUwgb9zI7Y7hcU+7enqUGsGu7ZcjA0dKXRclsf6hkHdjfQR9A+WVhsqJIDUmYxO/CNyZFs9P +HlXaPZhPX8ozcrPffMvETrVeirKF3or5ubZBFNo80dU2gq96E/JG0OmwnaR7r1W6bWkSLDwg5jYs +ZKsXrYY78Bk3xxuQJmnYCuO9+BXoLXCggaoc4ww48nmol1ZsW3OhQzAEHqXpLt7SOn+r9M02sDvQ +1rS603hvhIfzLJLdeb/96bBYPP91iKEX8PstB9JlO+Dc3OVL0by5/LLVi6tkjf5uRyCrwtswbOtD +BUziydL3ZQLCx/NXsJYoF1KG9MUq+R6guRavQ9xnO6zo6w/0hIYFnJ1um1i39TOnPPi8IZYkiUML +YHAVKZ03LHHaw/V1c0NtSnBo3Eb55+C3ATmCHLikXa7+fyHUEBMm3bZkbxenMegm6yFVxybh7g2T +nCDPegN2x/E4wrxqUFTdQQYofh0o3jBoV84AttlE9McnruHtjG2a6XFLZxxcFDwi6vwRhVjwjb/O +ziyKRAGXDdy7C2HMmpcrEtQkhtNuRkOXaNduOH+9qiV9yl/bL1ZvZpRv2F3lGxGY3/S7NC/3Q0gq +QcPYQ4UUmKdfpcxkh+PsHc/K2ll5gUDg/7Jh03cFowOQt89wFT7M1zUcs9ArkiI48qtSAWvKjLfS +fbOqKdl2EDDjK3gmpPPekfV+up2VzvkFr/sUNPSRXxqdIIxexz/MTNFe0dv4gsoMjQuVeo80HIbv +NNPO9eZ05RQp+WZIOROr2/32b4ZdPS/nSovXHsxRVweDiiGhoGFu/ogK5SPYtObKcikgQjFjDEmp +OA9YBh+gJshLqjaoQD0ynMryeOtedb35p2mkpBUrSjnFiGLFYpX28ewWt3o77p9Y9c1E4PKMuC2W +w8UJMd9UiH+viuQL5FgTw9V/WbYTtk2Mad+lgpWoqNu/TmNVGArf3FlSa8BdTNNwhcnDQxE03lmY +IFpZuqpnSvfNp0N7QrupRyKwsaQLIdX44WWojU48VACWRL+Lmv3+DryFWF74/2fI09x+uYN5LQMQ +zNXf2fkI+3prv1iRtvkk/D2NqxvAaIzcKVdigsHSWTscnus0Y621mjAGISqOOgGFZA56+JOPmKRx +KXp+SQcF+pbgo3vviFtWPRy8AEvuec1BXxmdrkyxO/mSqc9n9lMGjTXEWfvRJ4FwZj63v8Eqh+qC +4Yq6SIcAFEE9wGKHVeb5q/Mhw1inMH1cNs7OiEIjfca4Gstdcqv97GdxFOoEnu9qasMt4CRVFJzu +RTPpHaRFt45wbdAeVmzQoDEKG+Zkd1CmT6c6KNRqaC/IcvKC8dRsvyB3/6WO/P8+5SLg9L+IJ1Tc +/vtnymmsQehx6yDLCc4wwDmzC7o/QlT3Zxrcza4EdywpJYfWRJ91MwiIHUowF/CEFZs8/PecTEvK +xrlw75G242mTYLQJPl/8IpWR1ry+uw1Xa5syTuOcXLHM8x3p1BwwEqTulMff4/cCp4KRfd1WcaOs +qrU3lyJ6RtmiUCAAtujh9rZMgOoxm6YZlzSb95dbl2HA9xXrY7hXQCPg/7MIPXdWrmHCpE4eaF08 +UCChv6jBXqUH+/3s6b+Qwf/dYgUl8recYk3wqp4eLQclmQS5xN9bpsyjpEurDYXrhWpZFxxGUKf7 +cARVH18yksN9si1mjaa1Al9YycZQiBcsSxfhHRyZYSb+lFchPvK0IeV6BzE1BnvGKxEqHpbGQiA1 +uU1Hzxe1CuJppZknlBI0uttQ4zfGfH/vrY9GX/wIX/ajyYbFP0uMriJVCFKAUcEBc6e8gZ45BGHz +uIg8p5mnhpbeoXwwuJlPa8q5olVKwjg81ttl1xQ/MW2/O3fAvOpQkXo+L+JEGSNxGccxmJdt8ytx +sHybX9Z/21qG38vBZ+V6y9fwf163h/PWP/B0bNoAhLqbgJrkEbrsTctZfCZsaGSXUIrf4oLzZSVC +AjB6jeL53Tgvto0fR3NTMWXb+0Ia9gpu4/TYz4FISSZRXK7xyIoTSeoT0FgmFKY/+fDURUUuVdks +pPfJ77sBCYerRLTCmfCK/aLZHGbTnqcyzSnWDHp30jb5Gw5/LPJwKYmKzdTBERHzKjbfNOxIWOrr +5+j0wySZTWC3dy/4Kc1xEMFDVbUtuC8O036wv6ERfE8KrR2m5cNUJh+TmX6IBuMFgU6LNtZjGWr4 +bEW1Sm4pdTnIDJZ7I9oY/ddPRKL21qv2KgW0HoYgfnr/Xq2m0V4Eeic1E1LBQZk+tjQ3IblyJN38 +vxHYht8JaQ3obteO65EcCXU7v0pagJy+e2obRjHeOvTORma2BvV0I/YwYD1QKT22I8nfsh7L5Hra ++QWCNTG/KGQrof9zOhy+KVvge7KrRbecd1DbjxEanEzugfIBEtug9w17612VBWtlhbCMxBZC2+PP +xYxBUfbUV1kK6RNoxvxfcuFdVESnqjcEmDTwETzgr0w1qSJZERo9xJBVM/8vNIYDxKc0vAzqdMoH +RpYPhRfPtcgu4t68NJsz0sMHbxRlHohEbal67BBH5Ge5jq7q3r+QxsmHsRWNgYstIbNVntgF72f7 +quhESxHZB7u1kkmvRvMC1Q2XEN8DnN+Z4uAj/0OfMInyh73JbPcMjbG1LTV6wugyUI8KddP6uAgj +mYSHjnjJvADKhxK68+X6f0p63PVUBo+Ta4xs7SnrdvohtRJJWM5KryJiyWC+AoFyqIjxtX1A/hVJ +X92T1NzgbligzjMawR+UIO7tce3uxbSSrOQVVEsBSIkG2qjypvC+jbYmmARvvuqsOUOqHpPcfxIL +OlN25nv34FXjtaWtaCMs8SKyfIWiM3KuqtGh8tplXApK4wChC4Zm9I3SQP7KCsoGsn9zw7qR3Xg6 +oYrEbx8NzNt5I7EhR5MRlE/4O09BDi6upmqleIZFBHQV1X3fU07GLmRaHx3GAXAeFFIvkaj6J9OA +tc71W0YHTNOX6yAGyjLappt1QygO4tOgL8coF6c2KWjpsoqWTUht5K9lo2OLo+sXwl1QHOl9Kije +3iG0Ghg6HbhPIoo0Rr9w1hHiBeaF2/KTlPxPR7U8dSYup18RPHzun7nA1XTnjjhR6BDdixBq4JC0 +mBULDcluKSC9nZg6dyNp0Q8bI5jS5EVWySqcohdgQN1C9VX6Rke0A61vhyVwetivOUJJQATzhSPL +8dDoKwINSkXfGwpUj5tTuynAEgjUGsknwWI6WJY1XyvQeYGcLl9JgfigT2AXFwpFhf6ZE/PCJjkK +5vQN8yKzQ4CioPBlwAkMsUdfFimD4thd3VfSpgI2mzUNwomGHpTrd0gLCOqFs//+PC3f3AU+xoU5 +PuvznxlTkkCwYv0vCgq1MwwYRZmpMz/l1L9nIz6jOGu+90vgF0VvjN8fKYDXZsE+mUZu5xzpE2lP +ynt4BgwSpj6F450XCaCg0PlODI7aduM1zcK3pbJl/2Z7NVUCnq/OfLoOBksYc9DDjHMtuINRrIFU +tlhOcOmomerm8n3ruoa89hoYfFsDjR7ktI2wgizCIWl4XXecMdnovJdI8oSGtl1BAKf18JCWCXcG ++Y94Dj+BYfe0ZMWh/eRpaM4VOm94Rxi+L7Z+PToKDAGJmqhOWNIrzGM1IQZG0BGv16zGpbwppgth +y/DTX6o2lgtnjAWKJx7Waoa+UoQckAXvAvYaL9teafU7ras55fCK92azJczdKxY5F1g+5w6/YPGS +mMqpUIDQeDx8rwlcNewfw2FalBJiKiRJLJcHca5uVZ0Pyb593X5PNrJB3TpNFM8cNQ7ZUNpJ6tff +KFm502T10XkE3rtzszFaZrNSXGZHO7n5U8Mr6RNv8o6kl8WdFrL7ydGPVQTGc22dbZtsnq390WNQ +SN45bZ/IILV9So/X+Pu3kt2T+hFpz+m2H/DyuhGjv3Q1GVH2VsWYrCcfccofheaKxhyaMtjL2Mi/ +fpsOQ0lQH9eKx9AKZH53iR0S853zc+jm8UyV33snxaabrgn5jRrop0/ma66wBmtu5tSZWJ0a30hi +uM38ACquGeZ8wde+62hYNSY1M7U5XPol3LbiwL3ak0b2gkel/9MsS+qFcRdHxCj++syd4ypPfLPt +ISziwuLv2udQmIvGY8i9PO3ddd+wUhYl8nZX1ovMVk7LpLJPfEZ13tw5ZLLdjG6Qn3KCNbCmNCR2 +njVHm/Je+drbUzEmQYfxxvEPSWBY/jJCzmqMJWaperk8qzHmxzgV2iwAFYKnzeZXK6i40sZmsVnl +CsblAP8isZp7r/80iO4xnnaIGqkEBvUitmRQw25/AehMj/8cCVu9eDA/sWHR57DPQr2/FzT4YIdS +Nik/WhcEUBKiZqcdBLHmKmUY4EP0lElCmgP/10YYNr5/Md6q2wOvqBqjoXTIzRv58HbEhRi+FynT +jjoaux3VGPRhYugXygcA4Lo2cPtgu4oZs4bhGLQ6n8dK1jRvOPcBKVMFE7oZVUlpQEHgaRFys3zi +SQ2Kq/PzFNUQKj8RsQKmO7849sljNX8CaZBStr1Ug6/sKq1dliFyW/jodtqQYdJ8wyYnLb6M81xR +nF0WpVs6zjkbIv4Q3tPcEkHfqJq4V/SfJs3732qzTHdXPlNJwea8LzIEKVj5DPC5fkW8U4dylFpW +q50/h5g7wRPDRxV7CnEC/WgBJdg8CPgqML4ajBihITMSD/McMVSQB/aLkFwq8alYWWwiq0zC/aJA +9QA4uwzYf5WeITEqHlAvhKgI7OndPl3qJUqqoUac8oS9yn2qik6pvsgB8V9ujFFGw+khGIe9Y9Fp +0jDk8BTUE0QRV0SNs9Ap5k9jIk2ej3KjMMGlo71Ce0MdtGSzXy31lfEedDhRwp/ZL1O52eFalRy7 +hU8ACNhRUx5jw8p0k8vl2zdbsf9y39ytIf28mElhbkdudeqHhFo0SNg4nwJSiHux5CXnEr9/0Vg7 +cCBF7Z05xniEUWK2BYKRnXUCnGor3kmZ5Lj/1CgLaigxj46wn9taEKa0rneZQU0DfrmhVx1Nvs1R +Fx4YnWmOEpp+8D4Lr/hweuu7JA/WlYpCj1cFK3rrXApbCVBHEt/APQiJhz9GwNT4lgkc4iK5V35B +wf6OVA+8672EEP9VxNQUwfWKOIQ6KyUTWg4n8tUu64cZqDTKgWzxzpay03YnNW/HNpQsqheTeP+e +bLhiOVwC4u3UiOGlzGY23tqRKzN2NVhdgEWLSfKVbe2BAcI7x6W6NogmV2vUlPHW7mfcjBZq8jW3 +bPaGsoKtgJPYK5ZukX1yYDatOK2s+G1G9uRVXSgvNd0/fX5HYoSkutwyfR8ip9Sgw3I248mkAG33 +2Zp4f46GUBc32KTAyo72uInnN8EeUGbTmw6YmyGsbB0L7QTmIRotf7xLWrjd/BoJxK9YHQ1Jucrk +vH6T3IsN/gu7UH8ZMgrym4AQdF5q6xPAZ3zAwYwz3USD2TfGsSVq4qGl3tTpR7EJHYcizoQ6AbrE +TMXz30D74es4BJUhqP5OJBmyP+e1nUKTlh1v0EyiCFJ3iPT3DXC8YPlL3QBnkh/wsX4VbuaMYnoz +yB3/RKTyFbTMY7nGUiBl/Eg04PCZap9Mc+QRDSY/MjNaOZMIYM0sePkwe4MrOfKzvnv0z25fY5QA +uCpifQR3Uo49XchcP2Kcyu8QaTN/hQ9/71R6s19L25kjmqMOiz7nAUOz57eH0EkKIhrujLGLfICQ +S6fmqROpNre+6OWMInqHE1bqBypVVIKgpvx0C+dgOeu9epDGOaawE5/zq1oCeLFVFd9mjoDRBLR4 +UK6BuqIQKPr9ZT7ARyrUuFyXf6huof3GrWNNJf4aXyhs7ZniwYLRrBVgho70yrZru29npkeUErbI +4rGgD7YRR1u18nmq09UDqoHHXfrOrtqdT629vZQLEZPhgtAdcv+MM8ynOrplMNOplnKQCXdXGlOV +048HhFW/qqptRrUcrkU8nda+3KXYLp1oPtGdV/CvLHF0zBQuvroFfx6odX7CIijyVr6aeWToS3zF +U9vK6TeUB4/wxDRusmeLwDklN7yPQE2aQyqbtdb6B4nI6S0uxFxfMCwXTAzcJ9jDz4C32z/eCJry +JK/CghqDSXz8EKkKZZWU53/s1ftWfMGGguht9D9IRfplBqMpJrEY9rFDywpgUBChTnzSz2IZCsxw +e/WXumplJ9he6gZQCIpTsLLpgbo/XU1UhFjkTbSqpDLwe7adyZrVQPtCav/bK94SbC7n60jo2Qqe +SHAOHZiM4JdwQ0qDCNBu4XdphD+Z2jb3TUZj3nLYwWitIN58rxlnukuDoRl3Po0Gf4OE7nNIrKqc +ZblF4N4pkZ8ZNqFc0Pz0J8DGVld+6EQ++u7F5e4ugyeXHbhQqSJGDT7FGlISZ7AGmSMr+qTNrgdO +QVUYKe7ixq90g+yVEmZ30w4b+l1hFyeEb7CCobWIAJVHf1hNOwiTh6VsdhxO62qdYyC94/AWPw11 +foAh0le884EsB3m9OLEg3PJ99RE3jrT4OFQyfgmwpWFPeULlevlDwCRld2PxM7tQwKbtn8Akwig3 +HRCHrx/4C26HxQPxBAzM/EEzPMMIQH5UgkWCyEb4o6WCzli5Btu+42xWAUpOJUKNZ7eTDov8cH8R +2cuGMEP/1pH7X7/h/VF+27Rnj4HKXaAOQ4TmY34goIdBl9qINBrcIZ7rnKlwCkIwvH8i991SNFZ7 +OqhtlJHxbu5qRSYlTFDzP1oSVew3AjJrWjQDk5JYLTgPYBAMHiYnfXDvUiO/AJx3MA7Bs0td5VDo +tiZ6PxYDc4yhIOPMyorYkFXORi1OBGVpf0AgZ6nq3+VP9t5MPDM1MXpXleWkHjVFM9rpzo8dYThe +OqpSA7VT0TAZpBxBcTBy7F0ALmScrLsCENVa+uaeBWfY/CYrPikoPzhMjAIr+o8dKFXRfVUTCMjC +MPHyCidznSuSiVxkG6GvtNEe3elokLmlGx+trdzOv/4KR8A20F138TiXbgRr1tONIcsE4a7+wXd/ +6mJzpA0AcoAZtInS5y96QsyURhxYawfqZDNDyFVzWeMB7IW7Jd54DQfwNQu7u15zEA0OiMVs5jNK +axQfFOJafjGID+o2g93PEOfvcgaU6oSpwaIsJ56D8ynTEdzXiIbF/eEp8uqbH3iOkPHMy/HifqSD +2KZ/vGvI7GkOsxASNBb4QSi96jjyGYGJBSzEm8Mq1RaOKV1igv2QHzAt8sS04y8NALsFHWQCpONi +3fAN2G6b8aQlIVSXKuvY3iD2TPCU22a79mI/RFRwGwPHHLoChRliN2DihdMKAOdV8b9bYiXntjWM +8JWYnIytDyQJthUgKBUk7egth3iFKCiaMvHnEm8Bj3v0wrYBKKXzj/lJ76h3UF44mYU55dCX2xDS +jD2zqVwzOdDF1pfx1gQvanHK/EOrDsmfAqcGw55ytMfhXNkxHyDVzf+ZGcaCbu0E3bwEpuWum+9I +YTvqnCiW9eNMCbGM38bEsLYyw3Tj5c/BfWIa2mgtvw3MkzB2beIMOgypQwz9peJVcyHvLdpMWSTu +UEb5bM6oZu1MHklY4Jda70nUGR8f1ghbhcyhf6O/JA7p87ceuPsqc1t5CsUNh7MA/jyC2gXaF2y6 +txrT2L1vo447Ml8vpIob3dSz3Gln7tjgR9JKSBuMDS5FH3LzOM2clojLbX/FvwRAVL9wzhpOuN8y +QR+3JQUdkFZ9CmTftEmojVm1Af8aN3Q04SWE28H06eVmv2C2vgxB8pauPpCJDxwvnnBVRtScmOOa +ImOBmtCO89D4G9IvDqAZJ/UifURC9dMnJwmgDkc0GeFKT30DJLVzG3Y19SzODM+Mkhm2HEhRDH6o +I2U+V0SEINJAKBC9vLMwc9KYVedQeRLAHElDaQCd6o9A2EJxgLO+W0fHGhDK3ORZJdUIrNViVD5c +yXLWROHhK6VaI8dwZD96b+KlfvYTYvUmwd3W34jtvJkrn0Sc09kloxE4ALxCwwm8BZmEe0Q3q84P +sY2efZd1p36sUseTn2tbKwY2YIGsyADF1HAzozEr8Bk+lE6sLtGCk0wClp2pLlm7DT/Cvlcm8gp5 +OiJFBCZADC3VP2VYgJC/Mysbc/BTh63OMJ/iiGVaeLjynmO/T0YvTLBJLH1uQGTuhPc4Mf+oEVi6 +T195yKfxyFBHf1M/ECxW/CdlQ7uM/DhoFbGLvg1C2T2ots78K+nd2zrUO4SbmHUyqYon/mVAnDoo +2A7x2Y8jKk9MnU120YLj6XHN2AeoafEMx8YwfldrtzzQo8HWBnTzXp8iP9Tm/3fvF325Q5u3wJUt +MEU9F7M18YduaymTEujgEPv0WUhgMSx6bKORDBWkgDbuuUQ8o2nHzsaFMkGzrjJF/7DNV9PojfbE +xv9tcW2EfAB6d4PPwm8DgJiD8oQ88SJENy5BQSaiBaxIF17Yg+M8a0ktHj66+kG3LIPQ1PvuXQMm +Nj7CT07ovDbuxW4AB9aVVcL/UYZ0lRRwtth+CIdmq++eRcRV572nNJ5GaEZQGqpdzGxSJwIimQX9 +GuSheR+YopF20fgL+DQC6p/PmWZ0G4tP1jT61gHRojQwzJgZ75MFECy1OCyy8Wiz3Od2FSZHGygG +Y45L6hSrG12fuJH9ZU8px5Y08oA+gpjZ17a/kglFrNi9Hp3EOooz6USvGkpP/+PP40SuunB2stIM +q6pV3+z/M2CFCYihN/UdcDVQ6l9Pg1ew6Nr8Nb8s3r716miGgdB3x65L+gqCPtl+PWfPseDujcbl +DExA04WzIVRZhrcnqpOQpB7C/gufUBxc9Wwn5bsCC7a0WkWRouFYJ6LsjGRO5snUcpbgn05lWBfM +Y8w77biV2gjkyd1i6qFMka/KkhspMi/KkqGvgpnR4n/3uEVCYCMQ98PmDSHynaPSzhiAvFUYC9KM +EkQ+jDP8OacCla79S/VGuxkmiJ77QPZFMRM99q6GvwFHztp7sCXY50mhJpwTECx5eu/ueJmbO0Tx +KJhPZkCdDtTDIGV8R75eGsFyFaBfK7g+mwyVOA9cPsOhCMc0aOe2n3Jpob/Q4ZUbpaUwFxB4p15K +a21dL+0gbqsfLDndUHP6CvrLlZO5yxMhtqVF8IpGH714eDEbP63O9ZXz2l6Kr1qTZ5cG97ZDqiXK +gz5em9cX32jeQjgGWn2grTYqdEK2bVTs74os1JIbCTllH1G0Jd4wOygUZAyBcwFdABLdxj47Pid9 +u5pDgrnQnwndf7xOEJhOpCqMX3xT5P813T2yAQSbsqcwlAFzFm7VQUUDJS+M3lBKUIsYO6U/JqhI +bnQTYTZCedR0VpwRMo01s1+koGxkt0jBfei+mpQq7zcXrCAxGvYs5bu2iBhBEfEA7uAbJJvZWRQZ +o5ZdMpd7XXSCLIyIaY0za69ENelklQvdAdu2MF3bv6SsSPwSR0hzW5ndaa0AMFmDzHOAUwzbwmmw +d8kxBJhp64iJ1DriYdUTLQ+UiPrRyBE8xura2Apnor5E8xmOdDlfExo7a3lZlEs1iD6tjsiGgDQx +1Dh/mcprNswCrB+gnAyj9Hp6MJedN2sO8WTOV/6Lre4ZhVW1QTO+P0mO3tBgFX8KXzv7G/gihOBN +iZ97lHw+OAtaLALOi+7VZBFJWJJjmjp4TzbePitea9/7Pt70D0iGHq952dtFcLpX+e1lKCWCx92v +gvt4m+ltGeY1inmaQtcuie7EF+Gz/CtDiAX1MeJh2nVXUrp11pNvsysfCNee1ZAjY6NQQa/0pZ6J +OlWxxiHAR71B/1xm5b00xdowBUF4nKKoFVMyZgTiNrEIiaN4GC6aNJyKKKIGu/mgOlctQPh94QB0 +HQ88qqpWN3HGA2oBDEoSqqYnQ+pCPFF6zuFg18Frhw8J1WQg9oxygZJ7z4UfiXMN0Fhyhgj/oSoJ +Eb4Yb7pQ1tIfKfHsKEvmCPgiXipPkF1s21HeiFL+mevjwi8pc3u1Vbr3wITRnrESe1NSI+McSAkp +I1zfdtyWUPXzBTGYz8GtsltX4GoOtOHQ+qWGO2bQyPQ62fYdQEZ3HhG55xvIy76xnXE6E0fY+gqx +Z+da7FW1LA8RmfbqtFUqkfrGolVaiJ7OScjXZdJarSmtzHkFrTC17VHlvngK+nWuG2syhke8/I7+ +lZYpKFnIvFHoSifUGL+xooWhuufpL+kGybfH6wP8TOcRVu6udUj54T1wvF2TVBKvpgvBT2LJ7eO5 +QwgltvhAnq8zJxvEWyig5PTlc678++Axca7lD6ZhRvzi/c0wrLxtLblZHE7SeY/0kRYAD300lSLK +O0ol7wI6WVDayGHzdinpIspnYtgKpHnLpy1L5s1BRPcyaVZM+iHsLw+D1GgRSL3LdokPN9qzLo8Q +cvddOuzG5UAIHAhQOBQ5beH+vImgogsHrrXo9YQhjUaR/93/KDnYWTi0CTOSbHSbzm8lw4pvqCF0 +NtwR5SzxkiPx9zGax5S4YigZF4UyVnqE3uE1SusFXTEvXvXa+gO0MhBw3w5VvN0Trfpooy4suZ18 +tWy8+UQ99MTh33cip5l7SlqyGh01p18A2HG8J3s7eGbHdffSOHyTzPKAQCATPkK9ESj0vTbhH+Wr +uGHqt/FnI1lF0WFekh/3GEm0QPiXyQzIVa1ZhQT9GIyN3he6AQBpHR1A163akrUJX51Cyymc8GQg +JYyrixZZvaN3YVlLeDT570Xzr/1cV6LJ8cFKCwCLve6xFdF2chHeJDfIs1UYftRPnYlHy19OjoHO +RrEjzvVeolADt0ZKvARUYezvtRqg9nZrBY3Lqoj7mdQaWWK8tNgg+1Dx48E7/NJk18ioLR4JA7LA +Fr7Fkdosx5hmtjk5UVDP39canW6iBtCZglLrcQLWIwQI1WwCMKKEKQ3VgnyU7lqhIshvvxXXeEtK +3QpFpnHGVTU5t0nVibkE+EWj012dIPymkftVUcjcQQoqFBRj91WvtF1ADyCDRTu6YGpLb8uC4vmC +y8ZHekYe16iSzydZAIdPogsDppbZGyKCjFVure5LomuBH93oK/Whvp0GBf9PwPBCdirXTBfK0UOW +rsaJdKxBo/g1Njte9FTkN6nfMJCYF3N3Ogbq4TiuhcOgwnP9RbMdN9JN80ZL8Uls53tlqRbq/MF7 +oCQO/4WjlfVk6Op1+MxgJslIN+g/949GTnc0xv41Bs01tZWFUUTdbzGZ1yJVp58XpPWEnojLaCsg +Xl27xeKSu2q2+ouGj2Z3b/LitmLDgyq/3N8SiJe4Y4STV/Kqonhst3aez1h4p2ucegipN4yJHtGi +6ZpC7wab9JrPQcY93Adg3XXlYNhayFBFdG21hmg0ZHNt2pUAmmuzD/UTzFdMAZZQN1xz6Be0Sgr2 +j6pdAHQZQkju2B6lByVClAJtjtLhEBCkWVzRl/ejbxQaDwLXt4su7b5aXOqzyR+oZ15S2Hufk9de +9XTx65SsPtRz1icqYrfmjJVqkdpgkDt3BwWp9+N7MaX2RksHly4pP+yUQ5zz/H1yi66h/hVoaS4n +oPI/mNxjPHwHCb5xJzsBGAFlwbeCf/zIHUBcRDekE6rx7uRhK1SqSpVXV4WFbF+/bG2DZavrswyL +6nvd9Hxiu6OeiPGxyE/O1/aNgQmBfWdBd/k19hipQ32tal4PmCeby1ZGiMmDjjH7cmHNry53l4nK +XESu8M36DKYQ4J54yNGd4L3cf0wS0eWsYN3EREexEdAkptpYnciAtHLEX0ENoil9qfT4ah21J6tU +wizkJN98ZleiHew4DAKSfai4MntjvN7/rePodAAlvoaj21oTMt9ofwa1FphKQV3UboPtkR/zEXNo +f72+oBh1ARMPCGIgN5trlLxyMUmvvwcbFfZnj1FFchqyFuaGExpwL3LS5iFAvjmGyjcYwny0Ac6n +mPKOVIKu+Lfr3RllF1NqlK2l2jc1Di+0EApgJ9EgEO6Tf50CKg6lvxV54w8+pk3i+s0bCJFn3dWk +SIHt1izBQjcDungyfyTNAdOmei4FwctrGBkW2iQeS4mvxiCGG518OZvtVC27JlL3ij0rlorwCilt +kVcCG0ouP30lkMC/TI84zIUO8LhILXXRDVcFXqP8GrE4z4qvsMAZlYSHx0EY1ry7xNBVJyhZopa0 +WabxCBUFT4VfsigncOEVlCZVEVEZxISS4lduRAh988m84AYV7jL8f2Y1lPZ1u54c1zoBcmnqVzyR +64efc9VfZ+k7x0piugu/tkgnkJG4ZzNudZIzSxm7DLWH5uD9EbVbwqj/hxU++2S4em4Q2BO4Ja1p ++CM4nectmF8NmRdKlVEj58u3jnX9/ItFZ25py/yEQ2/5ooQqMvQ8lS4XlVhOAV7wn5y5n/l3YtdJ +MqbgIbUQ+RM+6oN/8Kw2IgQVfk6L+4V6JwPF3zIxy06aat4HxGzBWWsOOlf9NR5f83Q8+FWNlJW2 +J4fBwDvSS9VbnuedenYZZ667byivpyO6YLQURBUpdOUXMLJ8qrPIIBm/5YZrGWVSDWChMvGaDFMr +eAl4yIsohzYHzy3Oq9uOsSt4CJbF+bVTkTbzSSXXqIXaqRPBXhak0Rl5BIVXs4yCz2nwtmui2VbX +fmNoWmkMGB9LHRFFZBa3sTkriTEg8v92CazDluot++4Y9YsC++Q6ZxvC/6sUHbtc11o+9yZnC7rN +p+WXj+Bd1UT2zceB9T4IRFSNSBNvFd4kRBvYENrEQXFO2L5pJ+erJmz6tvnQ1f7jVghrAtfTZxYr +CMyr9HYUguoVr2RTAXz3yAvIhraWIAzRDqmC969BQwoK5rCxa97pStwVZbXHrsCfnIHPZxvc6VI6 +M9QNeuICdKX4Au5vFzk3SLMPh1M8CkRzIKndGbZ7BuTj+WzBQmhgCqYH6y3p+1bF4Sxj9pkC/yyL +t5tGFDxK5cpxfAULYRPJGpsPJJRnRDCsyABlw1Zko67s2msThI7UmCGeHlCAwlWxaWMNoJq26uHI +DViNWNIOlIRd71GEpk4tM+YUMXgbIQ4saxiFBRcQZXa4ysZ0ogUK2gQtnf2B5A2CXg5TJ2DeLciG +fpFDOSkAQJv0XeJJteYsn/97tHl0XheVyU5mCrogi3IPkLGW/8gKOmzrtcAqEn0AfRwkMV2N7snZ +YFO5SyvWpYGYChUyEN4qJn0AacJmKo1JRnMtNwjOe7mQmlB1m5nI1MddEf5UkfK/wobM793Fsbyh +x+hth1UCm+RQUTxW7uV8O/dHlwznBCUrTDClKJhMwhj61VVvcIxTQMHnHcq+iWRyWB4GUqsCVcNh +4CsFXVbomYqeEQDln0LXG4Gt19eWKJ8pk/EU+6c3WBPWblba9/MKNRPv/X5aWkumhaQC/lmmeD0W +8kBTf5fHo20I5St+2b4YdL0mIynuAcXr9ZMtt9JBUOWtiOt0eKCzJHHcrOdnmOZ+EILofyK1iemN +4nT6IDPZubxXVmJsemKILD+oiR36d/WrHqV8vE+CqETvkOJikpn3T8WnEnOmvFrAjlnGGwtDa5Ag +GA2wepF8OePplUE4JBV1WawtxZNeEZhxKbLOTbhlbAua/o1mm1+t2bv5cDCvXgYHqa79aG8tiL7j +zZTFRC2Bio8eNDXIgKK58QphVU4lG9qxyjtTljxRnHS3umV0o30cmz1hoBd2r7C/7AHnEFDcV1Ba +R8UB0W+tQNZmWiMGQVpy8rulV5DCrmYmM2UlPdAYpY4JYo7EC/GXfPPBoH5Vs/VF0JWhqtxwuxoM +WdwHt+UBkKhCWSn+d0pE6BG8V7sZxStPtPkkmY1zgWVogobkzs+spiflXhZcVYg5Cia+LREpqjqY +T1ydltOuZEqpbLdOTismbQ+OGDSCw/i1o8hZfc9Ncd9491FIglJjizyo778A4Ok0xPuk3j2HUVEM +5F1BLEwccnyj9M4uTM+bi0X4K8WgBQHMuTlp7WB2RH+8nj5ImOQYDFgBSdjRpuk8OZvFDSw7AZS0 +3XF0o5EDyKv5sGlqSuWlhL/wvxUb0FNzwvci+pQmYZBI90Ns21FAeSmRfsDAVqZRWmHo5dIG3Wnu +AeQaBFZ7AwCBNfcHWLAgMgNHEt0FXzYWleJlN9nDL+z0AtqiEMPpTBKSgVZXY0qjoMoKQYrLDbSC +NtV+R97KGI2qbzCVLJwwGi34fxTDLW/6SxeGIe0ETVozRwJEvGR/ImPFcHAhS+p2PFZO/0vyFvxF +3tV3xirisadp2HT04VcCAnf9VIHM54ZbLHT0z9vr5wrueHDBNaegtx/1vw6Z3+Y42Bm2T1SN8XsO +NR3ZDSQ+3G0x/bp7NBZS8k9a32XfUdm/1nVpVBOlzjvE+0KgZ3o+7lme1eHPS2t2LTkN9eiHMTDH +88IbTL98AkcyZcFezAgoJFEOc9cNJtVZ/GRO9nsBnl5jqWt9YF4hk8WsCiONfIN785MkdxAuI4ja +xhROVV3fDkoIy7yPtJKctLCW3jE8CfCTv1ZWdbNcnSG0m/n+qVSaMh6iGNJ1GIaIgpNyUPzYyMAA +xgfJcHQhd6JSd8imrRWa/I5xDrGgDLY4PujN1TXnF92S5kLdB/h3+8T0vrjUEwnpBqDm64omAYPD +pS26bcqLGC6XWELdIdDbbKmq+95uY9lVaEOBsmV+I9b/+Fig4616/UjnW07Tw+Oggd4gjsRx2n4s +SVAzribFwauF2z3+7etlCL9E5ZkYyQcMLRDVc8WUSq2Pv1vW4QLUvCg0ZtMLhKsqtoJCVmXLVcFX +uBCWVgLGauSaKkQKi3s9VcUyvwhsD+Ss/fM90qWilaqeMl9qFpA7a37vzsMMSDd7OvT9voByvUXO +Z7NUy9RarPdPk8m3qmR4u+GZmJpd7WZ20iVdNeNL1w/xnDkDhn3nY3Tkthylm9Q18x5E7snT5Rx5 +ujQr997y9Ma8u0ObjcpRtQxCp5pJHzxu16xKeXvTCuZw9h9AZmS1ICV1bsCa0e9wze/3hJ7HVOax +bM8IacpFkB2MWiq3ojnO2cKwFBf4omzGxl7vKVbnOvryXT5XwW8gFwM4beKzJThM9ve5Dyw194f1 +Aa7iLtkDmCmNDSql7B/SvRYMshwXJ0PuYK0aUNwIKjcPwhzHpgt/QdSrzp9kp6SYqG0IbXog7+6J +gneBasXyqxzv45ol8toyJoxzQfzMrm/alflfq5OVe7IaXyhDcRSRh29OMgE5pBEzek2MuIMTJoGE +YTDnUJxDD1qRNApjGrTamxUZJ2HbVNkh4JArVdV8MLCqqvwfY95goQNpLdDkkc5Z8KijUwFtuALk +AwHbwrO42WUSkiZns/KrsmzUPnR69P/RJ2YU2T6wfGYiNU0VPbIQ2IOOmGyqOcOs3BNEG9q9feGJ +C8ukZwX8/zuZ2Mc1oAJzfklZXrZ+jIfejU77m1/v4rTE+BD3SgBU45PZvz61bnbS7W1mrnyLGLVF +dTrwCT8NqmEG8vvmuz8aL5nIjvJgg/asAkTCDAGqhth0a1ZdGkPQPUE/M29E0+ZqK2kiAXaPgewE +oqpc5wh054ATSp5XZfUbd8BDEpYgVa/UBNOGY9LALjFMmRlHbQXT3DExQYQLOZG/+B56aNjuucS2 +eMIC4RS2b7dskOa4UOvl7aGYd0YhgCAKAarkxieitahc3K0ZhvF+OUtVnKz8fYbhXdBub/PtOUmb +6B4zWlxFcfHNNXC+V8vep7yjR+rnX0Eiv4ulXZGdgHL9bvI40qd9PdfKDBYr7ZnCWDwu0g7AyAJ7 +U3fggVuPuiWUtNhEiUiOsIVtwB+pBQa0pv5rKz7R6yuHd/3t/1vhhjVCPkx0Ivnw6hXN4mcUmYXU +jsLOJSLo06hMsMfmADP8XTQHYYq5cgVXwKFqraHoqsp0wqLUeQMb5Llqi3uHr+ebUJwAjP4uMvrb +pbJC0XHcCDGdW5fVDrlXY3ChEzMGKqFtJ8K3zvXwacPwSrSpY7GbzXBpHY2+lrYNVr97JBZ2UXno +W7jfzZ+L5wKxNh0Jw6F8YNYl5564pI/eps1ohBWPC9+2SNrYQsdUoqh+dMb+5dfUjaWhhmh/Aklh +boO6uwoylWyD4pSolqhC/nmZsnWWNWxxpMsHLN1ZlXKsKvGfwa4yPWnytEFQLEA/1iLsH3VPZo9P +3nNjuTDkMg1KcfLjkgeTta/82e2fGQ4JBFYz6APJold+5D9RDHBQlIFtLkruUNSCElgLUqvSguj0 +c5wV5Ti6TVH1b05Img/QEMFAh73AuhxlnJhSBbewBPeZ+OIO9b1bKxeMieOr5KUDBVweB6fvU9NT +aEKs9mOIN+oWz/FUVRqV2P19oqih19TIhnPVPk9jAgDPjPiDOuCSSoaVggeXq2FeLLVQJZjsQE86 +AhIqF3dfVQcmCFO5oP2JWpwyMITN9/IzZyte3ac0l45+mRtm2TobinIBo6T5J8ws8Ex/BBPfUMJX +sGKUydY4AQ6Mxw2fJWYe0SQm7a7L7YXe6uJXKZZHfaSyj1ULDFkv/wgnBpxdMffxXXlcUx0gXRJR +ywhuQ9/FrATwXIWCcZe1qOYiN+e+KJrYZjjf6S2SVUomeSvZqcegm0mjF8NFd2ssmVu8WSek8E1B +lfbnrdckkZ4LtKJBDOqei7vr7TVXgVaTvoyGFi6yNgNgXrU3Khar31fGYRojw6PlnptA1hUFMYkC +ekEza3quWLJm95U3ZR32o0WuBjQqPUFEdAQK1RsxMxa5B3pDFmfvGnDi5VBG8JDaHKvb3RKfmtXx +Ci2wk0JZmu2ZlqGBQK2OsM6VroB5aTlJiFsloXEjgdr6t2xmb+qbPR+pJtPdko4O2f1jEOKfp0YZ +zUS7aw2z8oUXizNiJuLNEYgHCNf+/kbzY2VKYJMLw1/LWIDAI/DJEiEcJiqa3OfbHqhC38yAfWgM ++Kx66tdK4CoUp6i0hWJUH+/jCZGixdzsUD7reuy9lPx1WuvSSSKTbMTRdUpXythPXuyOOmPjR8pn +O1ITD5ORxfeXwsfA2ktajXcimYhHpI3WqFhdWYFkNxhxIzn6UOQ9QU+yZP33686DfFnEgbFC7Uvj +zSmYP3a8FO5GoKLzUV6hj16ZLHnkyAnUWXi39ADZ1R6fg6QSX8mngE31JgsB++OFYl5KVzSjv6xv +5Z0sEPtPA7cqwlmxS9PvZnIMHujqTv8mw/UOdtVHJY4RJCfA91J7n6ZEKAUosQ4Fh3HxZ0f5wFRT +AJ8BTlAl3nzPOvyaq3Us22C4ZkokyTCTgfjY7+kLZGL+3b4EI9VSWIans4scoOQu56R4cVo/OPDI +mlZK7jk9wrC7tZAKN5/M+R7j7wYLSZwpKfr16IRzSwhtEvsEZHmbdl3NuZCZnkMX1dtstH2CMxLU +Q7iK+t8uZir/MKX0HxM3YRrnKMY9WtOkxT6JNls8F7e4LgBugtkIsqPBzOsTQH3AR9nSZAMgaBqf +/E5tpTMeiK4hxf0hVGQVbsfruLGIqZMdvTSOcFquVAYvjOHg/TjWAYXIQ+wCYgKJ5BZsBD1m2dFF ++oXWX9EGDs8PpTXqZR9NEEKoi7wcpvakrtCy9WRplFZiHge7EVvTBrKjEr4PjkMfjCaApbgGPFQc +Cd8XUeKkEqHRn0Gg2lh2PNS5Yq0OigqGrd6zeN87TxO/Hp2Whrka6fS/WmEMHV4WRJhqO302Hi/c +Le8dCKtST2jTDnIDrj0MdmPR4QC60RdqmB1AWD1wh7LaacZT2gzc1DywT5umLiO1wOc7xPJSVRAI +FW1aI09bjdDFMmkyAaHnjlkQSA1NBUb3kI/EBgpmo3CLc6vIXh/JBrRhXUt34KJWvRFXFMop0Qs0 +qGBIyD/Z6Iz1upEorrP7BKVqyfw/Ny4oe79G7123NN1Z8J+jBu5gCbN5lw6NrtIUaB7PC1VslF1Q +UrCz+ZatvIfVN6bqhw6XpZWtepv+Go7mkyD+hS7ThI+nAIgM1c7xBvAMRc6MF8HJUhU+M7c2oUf/ +w83uLsmFfgZQulfbRkSJWmsfRINmlGmx+XvbkxEkNsBChKfrpsVZbNQW9BwCaRzXmZ2+2/0lKKWq +ZYyUDMq7h+qh9iiPeLVRYmGg2XwHjYDjYQmNWlsdo0bkLeS0jNZ1hU2oRbUURmjgZBOh7e1MouVl +oLnHJP0HlisuDGwLAaXlVCGr0TKR+WlBU4D4rRIQZnowMGEFo2wsVEtgAYpc4ZRvKWKamjDPJwYb +cac3zy4CNG/iyjYk/c8GhyIhziOw1uLk4JYZeXo+FPjMKXUT/TMZrG6jGxn8jtvenT7Yb6v++0F3 +GWykSOiquQOkXB9/ZebvPsUzZ8E9vNQmQ3nJXVywj+tI4yTWoq+OFRbNfOLZblYyl3yF0KVg5YO/ +cruB4+khrLFepLRYOYxug8DYzOrOCSbope+K62jZdtGKgXmfK13DiAb3MzyCOtfExaw+ViCbYNFK +wx2icqTrgvoPVdaYGe9iH/tPeuy4lclO7inABu8ujGlySpLJ7p4bzqmGMARYKo21wJjuaw3ENyrl +hZg0hPSpfep6j5Mn6qiWoIQHkt6t+HiUGCz2LvG6wCGhuIEDUn3aPf0HL9DtMkiY3zUizqbIzK9W +2NyDQ2Jrazabovh734KPeAI/QOSt0jnSTjRM49AilayGEGtIZDIHGcr1uEPRzd7yH13qqzcy/4bX +iBYLRNGJcEHjUIQWAQngE5iWAeHobiBVrcUnaupJbz8ZyrvHDlnlCci6ooJEy8GHRtCiQdKIA3Zv +RhS58b0cqVBHSQb7Jk0az+sGwuxad9niD/GPU1f47CILpaeRA+CKkotPpr5jFUrWEWO2jJRoWXw+ +JU66b9mXPuH1g5vh8fpyf8Gw54NdybDa4i7rDMFUxSN3Qn5tQiJxxuJhL/KTBcUsV/fARXNj86wm +5F0VYSPqsQHKXJV8cZ2g8FMjNXOZgs8NJwyr8droXh2qwZMnjUMPRs0QXDvKHiWgEIUOI3bjraAm +AEIJY+whdaNT6AEzWGuW9v+Ytp+W7ZXwRCRFSVEiuO7fdHDtJjWHocypqfEloqVT1rCxOK4d27Io +JwKgvgQB0q05R5i/xyFY7lIkd3Xl4q+bpYAz+NdevzQBLbBwv9QbwPyO017WUA89GtD4ELZlElv+ +TgFeC/Q9m2ZMfAIvdnBaIs9Iq55cMM7D9RFUQ/m52eNtIdDb5MNy14+ErrkGCN9uTFDPik3Git7v +qEDUFqfnKPx5Y2NfRQbydzPiGEkEMZgq+1b9JAXsBrs7al+ThbRyEmfyqj6111EjGN/JaeQeCBQL +qt9X8FqvyeL69cSjO8aw6ZVKiIWu17P+X32PovIipe8s2guKPCYtmua4Ff2pHBK093Re3z6KM8O5 +B6Fu568owb5P0qA4cBlbFxDyRXaYv2cIMRvxYcwt8SE96xXZb/DY96ZohlPqbKW32jyE9sUZrxe1 +BhMlSa5cytnhOT2Gu6Ie8FbydZKD7k1NqxrUov6fUI+p4dFC8tXnE9JoKAzhYjACLNHr0PVSLHwQ +oEUPSr8sjr/lZAmTyDBI900tClIN7HYG542HYD60wXZzoU3NRKxJ7/4yhY8dKo77TNenG2C9yusB +LSwarkufm+kqKmofcf0rae3OX6+ZbrqorV9kL0gNKQiSzwHCez5pz3aJ027eafaj9IUSDxh8pwQf +jD93seG6K/6o0N5Nr5Ri9ZtVrEkCNLsJ4IK0IlD7HxqVKloCK2vV38gRUaj3KMM7XNDv+FNRRz6y +zL92YcBKGWQyIiCSd3rPPMiI+74uFHRdP0Ov+BMIfj42eNDewX5AlQv+dZ0mzYiJW8IGBsreK3GI +uRI9LTUNbUTDVtKn5fdNmqaLPMYOOoVxipySYMUkfmNa7L2b0PXl0cyStyaUA1TAS76RsOusuG0X +Oy8BbIhBJKQ+uKhq+l8auDj5i2dq4q5fd9870auP6x/zXidULvkoqkl33/ddCdilxYKgyPi/zQW4 +oxqboV0/FvPyx6X4poXv++G2ce5OTIK3J+H/3iniupUaHQTT5fcsBjPtLzdUHaU7D3po/6fBDZna +OiS3tK5exrQNl/6oduotmYIOLPOtln2NZ9pyuMZSPArFKjTtFjYOF3eD8ga8tRopKKqwB8P7EVVd +wGT+Q5OSieIQwctkQnmRKffqNAguAniTCMsOsosWQFA8xzhcsgS833FJJbG0Uumep7euRSJfShlT +q2FZTdrDYyiEN22+v6GwlxWghhmnE4HBytJSTXThE9Icj1dVC0op1McE1tM0t+8CfS8BR04+pBCo +dbwO2FaZWtE+Ie2Q4buxZ48FyF+jY4+Rksnj4f0ib7x4+ntPGgOaUgFqftv6rdNjZO8leQE66rBn +Tm2lb/vJCC0SKnbV+/FauTnaK61HdGgMm/+kFH0sS2iiCJ37Yi/McjyJyvWBBM4BF532XnBotsRW +H/Y8srX9RbktHoRo/NiKSppSRhI4pV7FXKu9VieTb4kYKCKiuoUQhRzjdeI4C5IuGPjSc+jNaUcj +PI+ZDyMv3ERehFTkMso7x++q9oQtGSQhVFvseOSUD0V0OonhXKwuqm6JfXkqDkSGT8gPDQIzx1M8 ++2Jdvp3kGxDR/vYr4eD+8f8mfOyYpAcDiTlMRbHxEZG0UDY0AqVuMt9oOZ0VHowF2kde92BapjWV +PFyGobLQDrnMU0H32T1l3EwfPBkl+DMl8PL8qRZgu4XHU6bGDD2E4ngnOGgSyN5fOhSlfSX9lNsh +12WPG7AARrwIW+FNuTgEVpDw70IEyS6qImEIHNsbqZWg1PmIN5PGY5qyjbYTp6eOoiq16rWq2yvU +gou+2V0rCNFLwnpjJwRJog7tazhe0AU3jrrjUnuxq5ek8hYvr2lmo364IMY84bsYHjkku0YIVwgA +EiFvcWOxEx52cpaSsAJp8mqpBW3h72nvmJV7eWuYp62/iI6idBO4FlB41uVzUYAx52SgdgQ0uMMj +arGLMVIJTrtnj2CbcKNiTOJADIAEUvsVTMUlrzi0OEBopUc92HanUEc6uzacWLA/H6X4IFVh3fpN +C7X2YwaZLfQfv3UAi4C0Afyma/GPO7UD1YHwra+kWDs0n6Qlk7hbMHgMnmKICmVtqB52a/fGR8Pk +x5zK0XCJo761JOaBkjbdmVfjPgdOfdltLD5Lbo4V2cDiUBiI5oHzIHaPWIsXlKmCDWbcvpBAgBPl +2JOEh448HUYwnt805XcyTK/M4GiFekeOq6rRrSNWbuMidqMxdMJWZY662E05CtpMdi2jXe/Nf2XW +kJKGbPRwLY+3TS4gsS5WOSAV4+LGz/KxF9xOBxYA0sQmi+YD+nTMKs/ECZccpqT9ZUFlDPWeCBqy +2ymEuALGg7f4V2RWiaXgsy8vTzyUialkaKlTM/JFTLG/7VOB8mQsBhBgl6ov0YxOqjh/AqXoWNmG +4w6TiPkqj8RZU9i/4vczCvdoNHOy4d/hdLVoxwNZMv+i56tLJTSjyTnk/TE1iWIGg75ZmP4tzsoY +7/dOCGeFIb6zujC4rF8/v1b+o8NgxtMXLM4tdhHO692qaiv/5qQw89E7pA6xEJxxxey9BAmbCwML +GdAKRRBbYyl9hHRAF7cC1hqKTISFsnY+fI4X1XNZjMhybpgS2WIbFRxgW3H10Z1aShV+iH6Hhl24 +5LJ7K8cOc2mZp4v3GAGpX/J876UIf+YVBPol3d+n08EBIS08hUUUCd0ZWUT+Ob3TAnonCzF9Pl0r +34NtkT8nD0dOCy/ifV3NVHC0AU01nLjoTiV9dZ7EipdtMrLAUWRiUJaN2tlOitTxeiitNGWq5/Ir +wkkDgTtuO7UGmahfRbLlxtmgU0QK3tnQgEX4pF8rcf+21yINfz0QtndZfx1rQlYsNQf/HbD/FJJD +FnLzxq6FlQ8+efmbdhB1arEwkkfb809veBP+qK8zeUI2ROR2deWu8Kb8aIFX8S32T39/MXyqpEmW +341MsSDN61Hwv2hjk5CYub6oCxnQkGWPllIKdQjJ+NoBhVXs/MOpNl846w2eopMJBxfHI5XWrwm2 +qYGS8+LSGzgzo0/teU3G8oPdMjUphRmYrhs59Kau7DOYWA+fXpkpAVUZol181gYbbrXeN81rKCOj +jAvrySLAGe/eCReyyBWGRsorcfFMa8Fy2uCV0Y3PS5dKk7+uno4bvIITKwkRlRo42TDq3SYhK7NM +EMIVcnJkiHIrCxD5VV3U8gh1X7Ext1j2Ob56HuuYSGFgLkL0pKHh57ItNOu19VqZWzyoXC2RfIZt +04ew9FFDVd0haOC2HNQ1ncjHabxdDLqXxEhvH5u31LqtrU28S9XsZvPo92Ldc423X4FR59dj3pZ9 +Mw5lKN+btkn4eN46ZQ4Crv53iOdR6woAX6jJuIWWMuUefsUZ+InYTfs06y5FlE4ZWpIo2Iqsq+jD +aeHK46wCw/FPhLlKxUP1hDY5JMqIx4B9qFl/ovXyo0W5Ju59IKsTFecFHIpTwBLuvO9U3izK9UbY +g1aq9AzG45p67DJ2iHEJ4oHeNgkRyCE8dXo3zGyPqUqwXmY24/Dbt8ARJlOX4LK8cb37CQNErZdk +AKNf9mXgzP+z3LDI46z80CWBAulzOC32Vblaj8RTzteWISrV43/9G8KPgdtted8Y03selSqo8gLD +O1ENN3dbZ7LyUEB+K0puNvBnHvhBL94WhYO7AmW+ilM6lkujwV1rINTqz0IyTFcdNy9XDDUK2HLT +i/K5lK/gILKpsOcI5OaZSooK1Rfm8mfDIEbgVYCPvQRq/65YgfQEaiEgsMiv17fQJQltJZyhZPwZ +ZGiKgR1mWL7Q5yEty6NfS5X03LcW+HCdGy91SJNNLSYIpGe/av+z92Go4qFfIEgoiPRKbdUdAu5w +YU3WtFJ4TLN8ADluutChZ4DBthjevVdCDigo1DK0CXSV3zi9KVpVS+JDDmBCPwvhyiWznKRgJjuI +7AlTCjTM3CsABvwogfzZfMXsd7YGeTewJc+OH01Dle4Sgox0JN+VgPUANlvdLMmbm6V0IuHtIqou +XJW+fGbL8nhkU5ugTOeJxBVAC+eVgKY44M8RTcQ8H7jplC4uF9ohy0qfqDZUmg9iLWSvO++2E4Ph +Zw1O8OgF/HJrIHflOvZ0jEx5tKf70z81Ha+AjBMwHAfkWFQEBQNFTQTzYWuJM2msYLRBIv/opX8I +aQk1cRfaOgK0ymOvEGZp65BnUieVzj1kCJV3PRMB3k9yy9LxNjfPXUza32zIF4BLrgePOsrVdR5a +Nru4E0dKAoKGAMoEThnTxG40X/j/LpKaub5zduN9DIi8HBRN1YWFOBzhP00dSfXnOjNZBzUOS+9R +ETMlbZSO8pFAny9Y+F1Oe3jw8+f8zhV9iuZ4o9KvslEWqJcA2kq8NBZ7e9cJANula+j2muQI2zae +V/Yq70na7J2xLLrrqX9a/52LSUg8eN6FXqkyJEuazblk2gI3W/eqhNZ2178qA8J6q9/lOjoLAecZ +6pefOaApts5B73xqwlQevgnLOajB2rDMl6Mgj8MN4uC76wmCv0qBF1wOZL7wq5DG0pt3clWuUtXM +x/cRLqZiioIwLLfB/a5dfzI/X09+Wtg4dk6BTIjwWwTFt4BB6I7NRQhE25G9V/7Y+CkSk3xl+7WE +EwhlbZl73giczWa0mc12uacHxbMQ87ILkN1ZXR6B1URh4AOMZ5QTEd+XBqckxJ11QwsIjCRWjEHu +Gs1CS2f9WZwfl+z5Q/yGhBOAEjXfpuepj/hJjwL2Su2YLgZkq8+4RO9U0KCyAZ8EW2sJgPar7YuM +IB4IR+w9IphnHgIsrldrN34ivQhH+BnEfIlb0Cl8dnBfGVrIJugynT9pB5lIzetCEJcQNo/qPomO ++/B0qaUWSYqGaG/qLkho51lNGKVDDqIJKUMFbhdP16H+J7ahZ3pj2Iz/Z6eMsvyaenugf4WKxNoC +kUdCRL4RKMT5Dg2Gp32n0+VCYi4oVnEI8hfmhYARknZ6AsVkhxOV2FQliicZa5skfnfEqnNKbaCC +K/LTY1FvtERhq0UdHQp8J6kXVRtVMf8Jz5fVUfjQsnxFR0zqsELl9NGnRKZk63n48IMDKuyNSSyr +CtTvGyhl0nSa3JEPnNWpipeIu4Fu47cQ3G2BFiPVEI7QtNnMkiUzmbDG3h4P6HDOKh94fB+GA/yP +mv2Tr4S563KYb4U2Vwe3IuEPVMAiYt94RxdXJhE4E6cPTPFUTIVg+eocTcEF3UgvfUBnja5V9SM7 +ZefaJx+UoXs1i9E3yRnrWX+woTbbVWg2sGTFRUcfninSdKqlp9OYa2uaC6+r9lynzv8/0r/eMJ8Y +vgOBtUfCsp/+PJh+mPKggRiESECCYOqlfs63cGfmsg3HEEhRx2iNIrYQzJKAkYlF0UF+XYnqEWo/ +OOF9Kkj/qH64YwswbBafnZZczl/V4tIpcaubNCzks03vkPT5jkeyw/zIIrQVGVBx+MJzFbMaMAH8 +O3BDQeoP8lt3P+GhHL9l/N1vPTDmiybSP5TWRt7SoStHWVDcqcKbKXnxR2wxcoec8FimrOMV6YWV +SIaVrfI9eTBJsSn6JxrzyX250tbB5G87txIVq5o5/9n20xTWPRVxIPuoIMKq523N252nfaSneD30 +4BcHz97ZdYk9il3qw76thv+tAsWPc2BH12feAMf5cYAz8ZOhvRHFqV40K8VvhddxlthQy1Y0woew +kDFXlTxP5Y/ZghjJp5yb3TSqyPu7EhUWRUkSaYSENUB/7fXdo68RvaiGRNMPxxrtPzOp4ENqDRU5 +GiMXzLkW+SDGzNjtOYsoCKsQhOUSTIiHiK6UmcP0SagambXnBxp032RZoI3cpIFrJEDEIMV/UJku +c8pJCPXsGtwmg7IDzTWWfnvIurOVGKWzJuNrlT+WQm/rAHwfEfUtTjSA7TfVDBZarhokn4qlpOVI +OL8/LrwcJ7P8EMOzZhcmCM/R8VsDTo+Nmzz7tqTh/9gTRGvPnU4a+Po7V9RZkK2DJdPmNcMazhPZ +5z8pRbJQGuTw3fGD1FVOlDQSvP21jmDPJc9B7eHPidYzcrKok7y+y5OF5+G8GFnVthAhs394BAai +qD4TUbGMTEJ8psM3o1nK52dLyl0dDW/YXVhWTHmBDbhJcYbBBpsz8wewMd4h/2rO0KtJQhMlSAaF +Y639kLUOAfpvAZbs4xn0MZOVvDzDuGt0wLbPC9bGh6Wovr4RNKmmavDh/uWonnEKqyfT03D1HF4n +23Pw8ePhClMtpfiFkH+YqFPsSvR6+FcGFa7ER41w+XNbfyY/EPbagg/9mTcxZzS4BmJukDAPf5U4 +WI3gSjhmGcffFrzQCTnm61sj9/FX+ZcxzprF0zRgrZ9v47rmlTVxX2YmgUSQWCib2bkul4UY2602 +DmKvTigXpVIqTOnXja5pEo/af0pCFY4tyfFQzYFYGqD73UprYZiLz253gTa1quEtH2ocl2aLZPTH +svWhNr6BYgQcodNUUDHIECfkOcOkB0wUoR8wqqiSWEGMsoXfO7QGYQr86o5TcYLt/SxMYaEk6doa +7x4D3uDsk9j0GADwGId3bLsJ95+7HT75aZ1smrtje900aOHR/2xrjvu9bFQoA4bAUGprYYLHc1a2 +0OJjZRdqc9zij8NyJtGIpJ4sCoOgeFnkr3eVe0RAD/qBYKMAzzDKnUQSSzF1Ue+/OwrN1A7k/cZH +fHnYh294eOOuPEKOZjRzJPc+KLDFwELwdk2kwLuLNfwIQ0tJXg4MCxX8YzG/AfW60IetlkC1mKHn +lO3P2USuFLeuO7tKMnr32ze4tCvalSLijcj7xfOhSWh4aIlpiYzKx58qeteicY+XbnCR/mFtcAQB +Hf+tmv5AadWug9GAJTSgFPRNRy0R+JX/T6JMShMR+pKGbwd6DltZN/+jpIzqsEsDevNmktXeGYVT +/LNqs8tTTJ9mC/y8qWY4DCp73mQR7uw7h8j/Af8ACpHm+3qBVHlTvHhRvbswKGjNO+j8QcErEx/G +P9zHYLIEUTaPMGDQ5BpxzXr+DpUODa2OBYUwrgEDWJTrOFMpNdFOtycC4tS59xahmpO6mfju9wVD ++ky50kzRrNy6ZR+r7JhIBRxiro+Ur2WGHhOUwd6mGOzRvLb8md+nckAgONJkTUtqviNPXtIY0zg+ +8dCPbzX/oLaUubyOSOc9JfSUwPd8RqUVP8U8mTsmr3UvxvIsNsjEASI5hxb3D6tCqDQKgCLp0CtM +qm0z+GY5x/6gXeIxnOQh3XDw/b0v2kAiPIAj9Q4VK4dxkUQfdJ1ra6BlTPjqF94j0xN1lYDu56GY +Hp93JufZ48CzqtdA8bbI38BwGXSHFSSqGmTiS308MZenBfC1fRdk/Zb47pXi5gIGovsumglORN5n +GJiD0WCSMvLS11jVUC4pjQxjX/SK69qZLcyxfF7DsPsD4NZ/K7xscpPcuMX2nc3FbDf0mZx+T9go +j7OEBjOYp9DZ5wyL9ExQSlSqRY+TdS+ZV7xR0thA3ruMNyNOlt5mi1UaFSl2AzpfOOE1w41Nprjm +b6L3T63TtBxtdnKKwJmZVQDzsIBPPOXQ8aOA0fLbTBeGIkRbw6NNRWCke5m9/KbJHEtA1EXUDVFU +69J4K5CFixpCcCAHZRCa527mUkN8VhI8TcO7svgydcBEODkqk0DtERdxzZ2vhXvnvs00U5XQ0Pfp +SLNTOoM1eLXbRODhbZDOB0CgyO54faWZQ2kMz4LvrzvoqNWOihvmwNn4glCkLDIExWpGMmw2C327 +L06B2uk+EawkBLn/1iIiZWxKYrfytXx9+9a+V8vDxlVPA/iWs78HY/+6HhgMXP6jWjJeGkCT4aim +4yJcc4J+RDrMSY1jVbghKL+Vvri6VrxtZXPtv7ALh3FKK9cOdNrB6BOVuQgG3QcLkXZGckenmN9q +kTn4Oxi00qn2HktHJ4OAO01ynh9UYJt/OBnY3h7AnzKoZfzRtZgWhqs3I9wqXP7HF5PZ8m02T8oj +dnhnIvHhBwJwzqANS0E8E5J4Z0CjQztNm+7N9j3rpgb/wK2RrQcgfImZ52Gfg160USg2GQHDi7kJ +OM6SHwL6LLzJqzrevVlBVkN4PI2X0+iGgGGb49yNY/CbQQo/iX850T2sq+EnU2N89gjkJoZNsMGF +gXWtVssd6KTQ26cfr27rGksxcqWQgLQmnHJy2F9dJMtjRjrGGoyxFhzMzu3dSM0XB2QlRxVIII+F +6Xq2DzGIsvCMQCiD2gJRdt7OqwRVia66WLbDGQmTgsyiBsbhwZpVSg7fOAFQzU+0SbrRWzcVCtUc +u22296nJ6r0TbT3L7pWAGQyjl58BZ28VVb8kigMWO7KhaxDZhuy3WYzeIgji9045/I7UykQpmjYQ +SWeEPCoLEbXOagMWx/D7IKkgKNnIO31zke15JhRn45wzeBm9n7Xrgvwr5L0Wpmiy/OI8mANIcujG +uZLQ/1W6y9E8O3mERIML1Ve8sDpasEiuvXZFOyheIahivtTpjtJETUNbpBjvwRAwcfIOnLW3YWiE +Juus/iQF3K2fTTl4bRtgnKqyMh4OrKLSmYBNHbUP7wEcpdbUY4KChZlMZOLdQYWDSeL0PgQNANAK +W5BEoNpL1bBlbCdGuHpM8Gl7l3xHf25Y0zGo8vYdwzTvSKwpnuwuXxUhPAdiuPyenXzjUeM/4vlL +aYsvST0unzy4qwqi8LGg+z6jiUsVz84WFSbWX3nI0jVRZ8ISFw9rNRiJSftelUJlpIbZBF+Xb4sR +RgEGK8E99c5bB22ljBzeZdmssqdshCc3JytXCh+iENrkWUIEhVG+DVZsD+DPU/z6cniUaps8ArX0 +W6o5PlsDm3RDlnWRuCLtj/+M27ByfgKF+94a7PVd6fiRh3xMPmokXHUkQmomOmUF2TSfnXRRAauY +eRxE4kgoEPniAt1cG3H41NbXrOfkRshs8w8VHPoZCwVaGUOJZZcslb3G5wr5kh/CRZWpEsCvk8fz +uga48O6A7GY3xyu8jVUV4MLE+r/J8uEjgTh7GjevtOtg3eK8mJD3Z24LZhLqp1NKfw7n9tM8B62/ +IwdEYFCdKMFjF77nqDOFeCET8Qd2LugBeWHSHqIIU499QDeGGSqeM3cNtklsUxxFmwKHTvVQ6VOt +93UNA+Cfcct0vWNpEi0y9hrJfhsvtvQ7yjdC/PWNLKCDIcwfV+2hx6vjPeSbHdvsbi79LN9E17Ag +wiuPT6xhDzNjYUz9YE9ND9OtOWvQJnBGSAXlxOo+/5MXmfUKbpmvrEKeoSlK12ppEXxwzMAxdDun +J72l4b1jyq7q2XryEt9bN8HdpixlV3WbleoxMN9wHZCeSVhkYw1/+0A7f8nry9EKVv+m6nbsXS7Y +ccMdRJD/DjHLt9FRprVlJtInKlhsUgG1vqqjCz1SAJMDZa1YAoidnZ4R2UNw4ANcz89TZQ30sALn +B77FiMd1BRHIzaKWXtmd/+8VOcOzwUnNKtkinVb99KUQ2TXvcIxiw2dkD8ZbWz8x4WpebWRy0gio +uUDRz2WlCdTPIOff9xwbqQ0jhj8HOJYkKi07qU5HDzPGAp3XUK3hvuIwQnHIKvCuLfNEBwqAX3K6 +k78oE4jcl6C8G/WP768kqrCxYuVH0kvfVJ7wBedKoT+6ruJsG5q6HV+2DkYSjy4DDHqeB90eY8iA +94RD1WMe8/QIaQOAa73cwGpLHAl3uQfSuoxvmMCTobQ0VUpeVQSqoXHjStMc0h1qfqxOgWr5js1j +g0jUHRWJGD8u/p+EvPqONRQxTrIKISmnaf5l9OjsPnL3OnqBO/BHCpdClwmBtbWvVF+KtgQbIHFz +EAb2vqfW0c8/JRi9ZfXXYJPbE2Ao9bsfmfw61kNx3Ieo+Eh0voeFa1Wtzkr3Ccv711zUokcvg5yY +F6mIE2JtoobS6SjNp2Kff/1lr6MvXxRMfgoo0f+G8CFKckUw19ZEDg3fDTlKUj2R3X/6QcwjJEuP +Y6fiEeBaBMawyw0NQGSyURSlkyakYr6pWhJcsFoO6cB/uBEcb5N/LmY5k8zCa/AYMUavTnxSiVZf +RpbUHkzMF+/Ni6Fzr1vauC2DsFUOJAJ9655wIK+5L17TnCsebVcdtAw8KBYphiReiRBc2Vzrizy/ +5vh74rGCeg06LC/XAxYVftzidOsU6ufLN7y4GtxWNkDbInbbD0yoq9FzvJ1GGph5R+zXzWAj+pag +NxOkN11sAysdXI36RoDXYZcRzE71A7n52zBOLmujO5ECLJcJt2xcuDwZPaIw5HHwKbpMLOobJ8Iu +ZGPVbJ6kL9HwRRRjONwCUuseQNTI56upRcd8B/vskCCD5OYStusmSH2hbLfYitB1J+AEG5hI/Rsk +3F4PNlcO6eNs6BJ9wd7UG8ldouMsa00XaBgm6g7RmIzynQTeARCgbQCMVsb6blrcqzZ5NKaNR93c +kYo9eIutaB1l5RuMKa1ag4LRwsr5hJNP9YeT3MwijGUvx784JouXNm24LQx+IuRQqnMzUrrcIrwX +vMYBbvtg6Fb8TBFrtqryXu76QEIm4Sxa/dwgGTWC9oH3T9EpI0JfmmZWU6jj6dk+JR4CZeC9A3Gp +3c478JxjhIFNDLPab3ORUT63GN/GKYjqa32UGUteRZXGs0DXI9vCzrATZSaoFQU7qpySpp1jBqUR +vnQBSOQg3IxX7FMsUHoj9f1FNXTw18xgX/zsRu9DZclkyNI735+FQNZsdWUUSObzkdFfhJ/ODuYz +ipAANsABfk8EMcgrCWaAbJUF1wUKntghuaJnlzxcQBT0JfD/hwQ7t8c5P8ue2xoriisEMD6oDPSV +HnJ90FtYGEm9pRz4cjb/7b44tOKvFc56PSlQ3Sz1g4Grg5OzKIM45jKmNpiu+5+bKQEdG3xJNJ/a +5e6UIlh2wDYNw4d+VaWG90kOgsIdAHrwtQQfnOsjMsOedUBV5WSuT8pA0+eZ/JN3T+xMjUYjcWfk +kiZqDQF1FRQzqxgo+ZFSwUNzu32rYAoI4rQNsY0YTyxy6YHgFnRHkTuoppb7okml3gHZGb9OJo9W +DKABfYdumTzU18J3tMAFna1nE/oOc370lXLRbDMw04L5MOeUjqXrEYrHnTHv4f8Di1OyNqfna8Uh +cVCuT+6kOmeWqMoaulNsrH46xZOt/48qXkZFmGxQq9B95nreFRqHUlc95cEQWsW6wdD5LAFnp/rO +xeDZJjmL1kRQed5ZpuTDFqIeTPwFrI/NX/9IDyElnfhHo62x5pj3qNGO61xrisH0DH1ojA4/tiIr +yln6SoNkV4q+6pOwFHVSGPOwbnl89VLO4Rq7Kur0b7pAgn/brQt62oYjveeCa+TeNcuISVoT3mmc +VzBPkiETyqyOrBUj8/EC320gGlUiuUTHzqJfAE5jFiiTaWMpOxmrpLjnZOTva4S9ye86J/Zqs8WI +GXF5UOmyvMv+OzInKp4lw1xNug9guoow2qnyhmWdR7iekFLnRQxVg62aLlnU+TCvG+r0S+oFIj4N ++7Awus0fwm5LGhEZ+0t/lj0pKv0V+54qj+yabxF/Rvb0pvdCzPCA9Ke7H6bUnLINGQtNUTFsSXYO ++ZgtT2cmcBJ55ty8nRMVX1r63NUHy7hFdRoZ8plFt87NFyQ6f2Fi4CTkEQzIaJwdieLM0KzrTKAG +HlGYPHrmQmxOwgkIPhEcjI4W+WyXRm7FHrARaH0/E0N3BWiQGgvLNMzJm9F0Qz2rKgRZwuGG1I6P +icdN4pwK49YWqV0W1Fo3wILPfrjxr8DkLWbOwWLW+pajJQND3yAhtACDaPlJjcBSxTdCqcy6UJMT +DZIUlnt1IW7eIZZo+gtgcj/j+wppcgL8xOE41cWBSnA1gytdLl+z6PoGZC6OBWH4v2hqqoqhhxHV +oe4ZfBma6U1QYxKABGarQjGJIj2Cu1DaezN8fU+b6vXB6mjqIcrpg3bPlG5Q02aMemCg3pUpzMzR +ym+AuTSghMD1NaXzawEjR5cqFeZHu2f9m6YXHX4IB55SR+ismXzgpY/oc19vif9Xa4ASmg74SAr8 +WiaVycq2puedjaTVwZqum4EXNh6Qfn0A7MW+FO3oVy49V2t6sLsY//3CPkcQ/EO4vZUlJPN/HVzy +L/premigbnhW+OsTVE8V9g3JIRzF8mp2JUx53LW17EHAMzqSV8DTj3iTTmAOEo3dqYME9b5c3GxT +O+JPfBirujAT1DgJjUckDgsI55cVAlJAaz8Xhew+HZ6KlaKy80t0JJHWvtFlu+fyi7VjwsCXUM9T +TZ+KO03eXV096vwi3boiKq+/JwWhjtPXiayxJkhbTwV8n8CGQspTlQwugbjrZ9WYTkfiAlqX8dEg +bOVKrBDhlhVumbwm3EBAzxtbuePxwz/yuknUn409udVznoDo7N6P+6C3I3IesIe/VdpRkBfOqGmA +PH8jpH0Z5GmSrKTOd2QwfXyEGBw3aFdkT6v6LiZUBGISKi+EVMVcptEVhuayRHA2MQVFRqxSN6QM +io7EliKL2jcNQVufRg2SADExJjNE1y44/4bzNNz8nkcscaIZqkz8iTcNgZjdk1sOjQTDlngzloBz +iHdj9rAKNUVDus7mcyOMgQaPY5ttUsFiQK4QStniXLRxFtYYEqrs/7fE4NzI5Ay5sDIDY7xakah1 +BUKUbeEGY12s0k1bIyxm8zDEJ1t3fVnNWoqCQLUttMVQRNPJmguSvLB9n/NwTffCYGrrWMXVDelP +kknZCVswbybCEtgNoqrAR9hUdu78J14BgoynXqa8F72Fhau3wpG97hMerx8KC+NzQ/YDZkAZt/8O +EhWp5xOSpDQdA7n1j+su7I62MFuI+bxMmCvSlE/iLCvjkFrAIrWhcdBSrxeA8ahp3JB+eH6EFUN4 +3NcTu1CgTBB0CPVR2nmuXdN9Dk/oGOd0JawZbDHT8/Eyw8w/R/i4un/fI/lsvBKp2xLRbGFsNLmC +RQ/zNNyOKpCotoKDqYeXJgO+qB1ALuHbGXcpxSD6d1QSWeqAZulYJwwNqRWysZ3sn+60CcPtUlFe +tSoHYwzxSjD38kEkhOAtIZ9o6/pHeIXswUHz46x5lRFEhC82TJjypPMADkVnsWruLpaKH5HFp2j7 +kml0/2KEcGZ9q6OO9t0DTnPmzBZ/G4RhZZrCZjyqSy6/5WWcj+9HtMAC5PY/2sjTV0XhNS/NlORY +Et447rdvTbrrYQajb23VyxQoVWlqxuYlSOKUd+NpadXq71Zx8LtlPI7NSxFw0lyqgVhjnGnvK0rD +G4Pg1op6BI8Iv0FhrygWG47a1lCtkEf+PqQWEbcNANi3qpoIkv3baolpz3dkXVILAPVWqX1kxwFg +einU6u5bi9yL4+GYXmST3bSC/S0MJFD6W2LbAtyhQaWXr1yn1+QmTEgIoly9P2xKoj3SQ8Ads2aE +X+w1yYqSxE1IqzmkaCHXXYRxwo7CBFSiYGVSD1qreEsm8gB5BCgdtr3iifNS9KqB1OFWCIDWoQPD +Ax6lDfsGgGe+/Gc1jj8M0uE5dEGz1trEw7cEp6IBBDxO/urXHnPI+vgAcmwFiDrkx3SbuNmdGjY5 +IiPVuiyrD8iyQliBGiYkYin8iuHPZJ1Kq7/lQwpMnurpiE4Ha27pW95uTiO0PFR0mC9ADJdV8zPR +O2VlDEx2Pt8mrSqahdI0D2PeExgC3DsScu8kfHQftk9FYhJW93zfsFQvB/0M//x0dV4QIdRkt80U +fPAa14qq3Bf9gVh6tO/8g1y6peq77hvTnUShk02Bd1lu6SVGl1YO76L+8nnxaBRvGLPPe3/ecZnd +V/UaC7Cs8OF2QCxdP1/R10CRVNL0cvtuL5U2GSWr/2/3VpsT8AN9wAMLxhedkrDhCOPwmImUkkIg +ZcvJKJ9m0pwXjU55HcTYwshRubCPPalK2rqRFFux+evhMPMqoFKGP5sVO0Ws/QIHmN3PofybdWs5 +iPs0LtXxwRPMVHLKfYbEx0GmMciKsAC0Btliq8GQKVzTRSLmsao3rOMDLsAW7BMQmTGCdbneyuFy +dVeIAOt949f6Pj7mjYt4QT2gbfEWXPqms1NgP6I8q21C4SZ5RfxfGXwvfzjXxsZZLTL0FQgalM+J +82PC80nWRRD0a6K45iWCpat/4WvHxed51+y4lIh3Vd+HryFwVSvKaqi0mlMIfBjqzOUACyBjoR1R +vzAcnz3gyx8rcK6vzCUZEJQxfejw2Hu2D0mI6f624SIrNI15aCgbBa61GdZk+opnhG/RZAiz5juT +/c6Wtrv45FNHEAhESjaxSg2nFzIWuzL1nqvu3Jfz1tj+WnuWZTcon97s2WloHBngRrQTLPGq++wH +fcwcObMmTZ8wlxf7E8E5j76+/IarOMf0yAHGIXQC7Xw20TJDouqoIB2AkCuHpdLTdyUSqUb8ZShL +GuZCd1KutkolyMc8akoqvqP5Lg8qSCFzBcXtqmR22C9At1vyHbk1gfqeD0uyUuCIxHt2C+b20iMy +nCZYtemQoZdPDiiA5wZYcz5kklIp9DHV6cPUHbyL6ukntjT7s1gbIqaDeMk/TVd2V+cTG3L9A+fM +EadExPQMt0Ex6eQmRNEh8WOP1OgBKa/hSX2inRL9Txar7GfxqnGsqCQPRzQ67mftLva+9/CUhdlw +6wxXuC/CG6uH0rYmfr5JayiKMD5QUnLaRpJtvkju+EkEKMylR10kyzlZwOWvbY9wJYCewwySVjHP +odLSza0Ixm7Bfa70Gd/uR03TOk3dA538ghkr5EI87i1CTIhXmNEZqeJRh3GKSNL+LiD7Rz/zs+YX +vJciQgCtSJgpZboMo/3l0zWP2MWcScFR+bCSmd4L3Gskv9A0W8lO6c0ChRAJ9gfZJhUB7u3MPwig +7HjLkqee0yj/QLPvkwGWnu8u0rH/24Qub/M1OIl6efHaJixK2+SMCcE5WW3XnqE179DnE8SClAhP +dcL3c3iEso8IWFUaOKulGEN52B3N3pAce0iGV+tAR4W/HWk8DkKUySLvYp8nDp1h18FTrjIqtt82 +VVhiFC4e8MDP64+fK32oDJzR6XY07ilTFihfxiEH26ebmp/QMIQsbJszyKrMKMux/Iz1qz14/Jc0 +P1brbWEISBeuhx67Ltydtk9ZljCAnDTQ/YSJgAVSvHHfiebv56/b5cN7E6D0VJG6Aw6uDvjlDW73 +0l0HiTB0FbptTfllo/GG4OtCJ1yeWGNqcuF/IXwiKJm0bDyMPjVoYAyi0VeT1EWpAvq1z1DPdRcF +UaDGQ0RMGNY7WXeM9JWNoVDw8qqvNk7jUVAZuavgUGHlIRLG0npJCWFHA3R3fXFHfgJ4z+VzkdlI +DIXrZxr3AsrMkBr+uMhnDarwyiqi2zwBezlf/B9Xd/uI+bRTsmb5WTO13EjMxefggctHRvrAXD6g +UIsHM5aw2NmuuR8PtiiXGQd8BOq0X2SevMpfOuwXRRTHR0df8P9wAriWe22+V5sn1NTXJLVnFF7C +VdUl5zVqe0XZkOHxE5P5zB7X1bK8D5ElriK5PKr+AjiqgtHr5+8F22l5P3wUQfC1NAY/+XIHKQOQ +UW18tqbilOQFLlVTePeqo23VNri+U326Ig/OFWA6P7ezUAdiG+ZdfJrRDRucwNPvTdd8KqN6sA5g +2VMUElws6I0xXu7gLtdXH5gc8jYB0VTsxfLV5RipJr0KH7aH+a4T09ZyBwmYcctAH0btY5gmI9zh +FLi8GTR4OjK9ezykrOcGU/HI8ls1DIugLWQcgsQkfPrpVLY+OfrQFlgB4yfw4w5jYnQHeD3MYDHL +nLOpJRfszqmpEm48hMJ55Pp7blb8jl9ulDzqkEDEByncAsH/w9EoOq3SyfKXaU316EOOCEd84J/3 +BgVTSHr7FOJuG6gDD8owR7wUnSr8hnP6L0m0iEewlnDLyjRiKeu2T/Fe9pigk5gI38cVgZkSLviC +GquB0XgelB3+yCeUZEaC9wlCOaw3vrRk4H11+sU+rv9w1XOnXjZP+tJQTKWRaI8vz3yKZiyo+dMS +F1B4cqsnQcBjVy7ez0yPMnSDOFU3BGDiPZMoN3KnZfVKXTxS6b45McpEY95xW1IHVRlp5/iVXOKh +aKvvPFaw1BLQGi4z8yDvKlpLjZsXUI32g6Nep60E5sRHaqwPenS/aImzWhj8BC7YbNpf75ow8ISa +XA1p7akHY/2jyNlLjRQtfAo4vJgmcnHlXuKYpTMFMmGrwdo92I/fOQSj3ZtjQUNC2q5LD7xykzZb +VP2HP1ovnaojEqEA3vZd2mzdZnW7RlHyqArXZPhuWmSCOiShzy2TviYisu2VZbQW7aBtnSCN8X4+ +wXSjyzaby0MjSsYEihxQ4oYxDKlh4jCwaPscETsn3TehFV3Ez1eQbiCBFJF4CTOAdzPAAKCwLacK +iySVx2er5ITOXmGcOyGTi5x4+Y/naoOAAaoqoXXdQrX9zPMyAsBOlMr96dWaFm/XTAeLjRSdjZnO +E+eRInev8YJKoN3YZ7EZlABgGmofz2Ff1WHYD9LviFllCRCfjs4resDaIICICg0R6JCuqvz8wnA/ +jJZWHlS+i8RMY6YCH3f1wz0Wj73eOVRvbcqr6oy0ERBz469fL3OkcNPu2w8sceBMlZp0lbWOuBdR +N7h1cbRXvp3HZNjmB9bONdyxr0LISiPLe5X2DooZslIoqyDjvptqfPJ/8o7/80+H4jfOQhBlfkka +XjoYCYtveK1c5IdI1qhS7mjyvNXceDAvHbagNYLHZ42kgF9Phf/gYlWsMauYy6eTyl+vUhr7dH2k +XJRI2N/B5sflrrzn1zxoBl1fCPqiYKnLqSH23yonlUHXhFgFiE3cNGXCnPjqBafRjpymxcVP5zJL +8AFDxWJjjHtnSJqwCynawe6zrhiBA0OKjOqIc8n0pHZnIbjaj4ERkrjpGXvGZO9PWbaHe7JhtUnI +P8N2KB0PqRKCaYr+0V15OnkqmiQ8j4LG8FKYxc83xrzpFglyHPF6cvxStPpP44vj3AlAdZ0CsCra +8d4889D9noYg2dcQMwAzJ9jK+sntgxB95q4R6ub8c9143inZMZMfhGXJodXFm+k//ROd9l4vlAYI +Qfe0dx0WtD+Y3fDQyEqF2dA+MbQXkEdPkg5PDNUFnENLBh6BJ3LmHu1P/61XONpHZEW/Qe1gsjXB +EDT41fiTasnftgDSobrKe2x4lM4fD4lTW1RXKDRJ7+jlsO6gAMfJrL+J/txzkREk56S1YleZEcdQ +wMa0x4IM73nJZR6VqWKtSNq2mmxp27tOTF/9OsxngPstg5JWKT0qH9dA6bJRkVbtsKmHAX0so7ul +BANmpzTjiNooWRqirpHfhYty88gdM8u8BoWLvXObU/QCfBQWlPGydVPhgmxlRdn4wBAJCbHby/1W +/im+8UWGrEUNBj73xsF3G2TQu2TdEICJjpBzAjTOWp1J6SnXqt6F15KCO7H1nexB2yludAIXrdZj +sSsLQGX15/Q1t2fZerBSfjnPlTdXz1+gD11CF11eeQ01Jjbh97iGkOhr21I/tj72rto78mhwZyLw +MciyimsO0C2VnQp+FyEuc3+qfBzTCWEHM3PjjroavGTtS9hcM8pUO8oM5P+TM3Ns4nUhRIZaENWS +yk6wnCM0av+G8neDV1H+UKvQ5ysHJ9DX9uUNCJ0hboIqDzLfYO/W6gSz9H9vSNZixnrhIySCBmF6 +/XNNEja9HGm4fLuyOGI5NaUzw3FcE6zwnnicVRiJJdfK7QKHRkwW2o2oDpzyaCTFJpPIjHIhwIyr +P+0Zo2ZgV8ijRaxTGRYkA5nkiQDgzHNE2ihqHVH0Avktnky3dr6Zy5VfpzngIlzzeoU6YoBBjR2D +03hNxoskOMp0UqBxc7VpgacPRczq/5Pc4Yiki4SPBAbrnOxIuoKSCCHZG6Q31Sx7n6wO4f84kFI8 +1Oh0Pgx2Yrt/gNcRJZspRwaPeOlD3XrwMwRtXXdWlWgT2PE/UlTVi1711eSMkn0pt91Z0pOlpJyE +FEJH0WAUZj5rIvBYVpIPbia1YMxw4DhHaffvaSqXkejrnGI03yFLQJc67R+YGNYGIbQ+K7zHDzMU ++sdMpGMAe4FPgDLkTGiTe4oTa6ggEq8FSV8LC5lgpDmSDnE/QRSrw8/M4gNG9zolAyBE45764tuH +VX1PmGmreXDxVgrhVSHaobTi5cITi21QaFl16+oF5KA+EXB2H45oaNlNPMI6qOD68e8LzN+hkPKH +si1jlm0/TKhFKIizUZ9HMOPHk0NWNqgAVKg1PV472zLMQR6HBKGUTnxYqVHv1S2dOAhroOskhOaS +05njE9C3ADQ2aMKKhqVxPlAJZ0uZPDl5TQ9WO9fs/a8Cu/OLbBlCCj+jY3KA1X26Ikr65dqumAnN +3IwjAe8DJL0mdCFoSP/YGSyYVWBqmwfbS+AVg9VtpLWHN00QtmRdCB5Q1pZSC0gym/RT1n4PcNkO +3SURYUzItO86/hAK7BKuCWKW4dQM+hTHPk+1JtxVuNSqVLKyrNvkpS7avOqYrce04L/O1ZD7qMPt +nGODhMSHli0NBcC+Wu+vOWl3bcGz9aM7bAPY8x1u8gEx6pRP7pz5kzEpJd3iDR/KpneGeuEG7i+h +qc5uN+b6KLLBPNulmU6nazX6t33OyHxnL+29fv4VZjm4YZOISCAtwWHcKyOM4O0YiPwTmrBg9HhV +Gzy3wI1unjDrbt5+D+N2jFqPegMLsUuz0F7xLASSe3K6OvtYosZXqzbGT9oZAR55rShAWFzOxoav +fsONs6e/DHTPoPgjysq0eYfTxXTAM/dBnQdl3hJrjjZBAcc48qh9Kuo8YpGKv5bMpWkx3N4HmAhW +4D2ipZxBqdTzk1DwuGBFyT3Qxb/DMhiAki9yD1GWJktu1T7EP7uosx1nrQxbR1BbENUqLYdeunh4 +L48cYv1KUrNuV/g+XCNaNcjuvHfjBBpjAh5v98wjDjZqEfggVyOk9mjE07W8xHRnCtaIjlhLf7LZ +Oa2tGGAKEQC4fd1lti7xx+L4oqELiAWc6O9rSiJSZ9z6nq/YexxBRnjmgCBulQBXxC6BY5JleqIG +2UUDy1rTX7s7kJWYawdi1tDNp6ordk1cFIeJ00vIkjyLDlWWHix1YxofI59TSSWkWZZWjjwSuuFY +o3BgjPhiiKUd0dNt97GwYgDMbjPPjgpJtFNv1YpWT4kKK14BQ5ZW+4EDOk4EzTJkRMKioIn10EoH +5PMswvf3ea+npjzEgKi+Uc9nL180hu2KQc87CIvU4SB0znj63eHxVnKUWi5hclGC8LEVrw/lv7ZL +SJFA44h+lj6NhxNXsTwtNzAN7OsCXH1cp4KMAr8aGsmfI9vP8jQPom4COacqzuocjNfpx0ieS2cQ +2kIC0O0hjEv64YIS8LAwh7968OCT5jh6+AC4zLJY9TxhdOIfA3npP6rhqd8oGsUGRZxR94Xmhy63 +deIw04/Rz155C1XVqpPwp/2wZorzHC2NOkU4s4J5U7CqxgtM2p1xZ/PP/ydAbFXpNNFLYi6/ARAY +y30e/ndH28aL+U65cCV35ltIpS6DQCz53ox7SCnGyJTqVgOco96LjH3O3alZRD/tcx989JjWYt2Q +nroCwsfsqOMiXEStmPZ+KaS1D3Cc7rk3/pCj51djdbCw3xeuo7Ohdx2CqRxMJKR2Ic5+mzQKyxW4 +lBrcLwvn2Ir3r1eyif3xNt2W0JGKr3Jim8MRKSo7SYymkyjO1OAaPJDRfBW1FJHalLKCP5sfxGIv +SXDrgYT/o8xp4tcjNTp3b8TXOYeOhZABMeizGtPUZyJgXn3JkitdZSh/XYwVxZ/KBRknSnbVRRxT +WJAi3cmf248Q3zTUWfZDXvkkB5pD5iG9e+cTHaE5kmRV/5wmNuLxfsS+XUNHE4eh3FdjlJgamUcC +OieTi6hWpaKDNDupRa69TVelfu1wYlkGQm2k9LOLazFyFmpTCIeNC6zuq/9MXe05kACgbp4FIhea +xF7X6ABHUK8pUkRopJ746ieKCYA9nSzvAdG0RloborJaRKonY2XL2ToJQ8Y0b4kE2asYIL93hc/E +4t29OoaDZMcnGA8atSQU7MLLSa8d9mFCruQqVJDCyQ6TD6v8JaO6oBPQherUtLdCC1PG+Gr/FmYM +1L09uLJDxUFzz2fdqTnpf6kaQy9zUZ/QqIKN5B7+AIrjWML4SAlSVCT/UkQkgdNmr2b66kpT2m/5 +eQvFiV0QlWMJhLC+QFKUcLgOsTOIBaPkStAcemcKnH/c76Zj1WiVNnvuG+k0SEkpR08JBKsIqlbb +K3LofpbD7qLmN6sCZEVGMuaT6LRaVTZ1a0zI835qEhQ5tFdHhTilCF13Xgw0BuyBxELKa1rGdlkh +AUBp9ksaJBsRmUt6gDGDMfqRhWByQQO0Jgqk5L5fSls56WxmJ20A+PnJzIGDNCNPqPmRBU09CI9h +QJE3VyvwCoLYtbWRgzl/ZES38mMIQ2lQnMcz6uVfu28jF68TFwkKVTEJzPN5AFPKbfU4xS1+xC5U +8aTjvCXfUHmjUT7OHq5ophFiiMD2N9pUmyeZE4zNK7HbcqC+RKVjDEmQ07XsiKGJBa0ZEBReW3su +lJRH8gNbxQ0rJoLW5b6lngiYwE7qmFEOhpOYnvKwyFDKM39I5sCi9HabSkHxEvClr+i1YISVPCPe +aPnfJjRLcMhK5Wsz4MyKdhyZ37/JIQx0gxbWv+UrXj7IvFSwSUlsg9j4efYO+cDgjML7h7W2ZFiz +8pE5fMsR6vscieYKfZ51Iu1RUzDYPv6/bGkG6Dd+svLXDKiAfbwaxgS6BCQzb+aoZHpTE7nMIsOO +cI7O+rgUhUXDbLP8629J1XbjDe/leD5IkwsV5xW4YlsG3WYFMTKkhrHtuY3+8qiPU2+16hrAbLna +oPA1TmnJs1Bi1Pr4ETAWQ9Z6WjRCfvz+ZzQRiYbrcyV3PBnZmF/7A8WZMak1avu7pNAm4056LQex +2G79zOHQkm0PJjKGJMFOAKfifZFtaMHUoyJkciFWjUFl7GER+FwzaD1IAr1fNMbaO2xWwyHouBan +Fq6dQCuLQFXB3yucepRHjf+ErTISRbPAkk1123b72z92bJwyjIVbIDM5WDfcMQsm9GjnkWXWqTBt +8JtqhPrUmhU0lmfa/cvpSrYBIE0r2xzmYkZSvFiVBQ+jcbxeeelNiClOVMJ/CZtdDr174HQ1G9kw +fO3P5N8qSyNDjNIezRmWFOBWpfOx/4gc1v+reIgbwJgWfvNB4WFq3zloRHYsKNI4/lWZk3FV+oZD +WRj0ehPXxEuJNvTRnY1RW6PUOioC9NYzTdCb4XX1o3VemmihveTNrt2/NhK+0HVYAKeHiyNrFqRj +ccPnmUpuJcd2+7/9deB7QiIoZpIbT06YGBJbYQX1roDjQKqFI3VWIGAbtV5sf/S78VbyNK1L+7mV +uZbJlLVzVy7gsyapb5lSTTk6AqBu8a9rJLVIK8PBJyOn8hRqD1Vrf/EeOX3sP1RmzLRL+MHVetuu +7w2IvYPz4fBsCZfKEHmn3W+FRKmhzHWBkx4yN1k0Z3GqWkfqxAm4xROHw5j19S/StJ19JYjEdzPM +lmq9m+P84KSulr095dpRrZwY92MxS9c6SUeGTkVCKrG4+6jZOV3luPaPjjBxFEKHcjPVSVy28ssm +lgM2RPghyNbTPcyT3EueW1zegZcRhjNSySyHKz1VrUuTBqjWhIYFNLrr6vfoxcF3OUdmTpd2ti9a +KqPbghxNjuZ68R8WwtZkG/f4vnk1mwV0Q8mZqa/KRae2aBlt8bF0BMy/OfMJ8Xyp3i8B8tqsALxs +TcOC5FZbGCnUyMTlS6i8o0cofROI5Q9J2BtNZ93ZCWIkcftXHYCmHsVTVHC9GtgVwZBFcLRIWFY/ +YKZdn4vsO/029k8paeqkoKwpUVKQV0XnGjufeWGYFsnM+2zHHnbCoDFp12aik7CEzq7CNjgEwSy/ +nmfJsYdgVovSr4ZSRFetnjciLMzZbhqtL/FyAMMJzimPuJB/+Bm3LaBziVogquPH62fKTLcsQSyr +Fup0B3V9A6ZAAUonxcOhxIEmr8COPKemqhRVl3XVMWgMcE7udEY0c2nz8MnhsXZ8lc2x1IjhJgYr +ZvEHx2n3C6s++G7Yq2tYXaplERQr7W+9YlVYNH/SL9pS7BZscWwgwTuWwVHTDvcc0skT8AyCKQ+P +d1ZTBKWwF+2kfW1lvLaeSoVMCwOUcxdMxk3lDklccTxn/VxELPsIoii5jGjYQX7lhSsIEO2skVnO +0GHqoyD9AnyXMhXlRA6lGwPfZgYERk1x5MsN7ZsoYi/a3OehFr6WIBXzo9F0YEw0ZCdPYaw2Uy93 +tNKNbJfl7HcSS3FExCk9XEBkC+ou3B4axIj79U0nnqWa3Cw2WTay8lNOIMlRvwnuUG/K1xcsUbfn +W/9t3DiQAR5rygNwcGSpL27bVU8XRMcpclxYEZxCHZ9EjIWqZHEOJ3wYtW7GDOcGygvc9DdsxLX7 +EJH/9kS/tYRXw7qb6CDf0WaeIW+oRorYEkn7/hRZSES6dndAVaDbabEwMniKvUHJ4CHg4q2R1fsK +ADU64ncMoNFkD+IdPLMepewPZ0JMUGEpzFFFY+PzWpusRtqxaQe8yRtgrxTpNYFx5aJiQ9I4V34Z +nyxKeKq0to8CJ4TY1JUswRTlngyqYdbJoZKd+SdNPgwqu3nph2I0PVb8VriTsbTMH9ZPjyefKS40 +O9UIP4KGRr88s+HC3w6muoxFYczzm+ISKI+WZNFMVWDuvSNe0LswDJiE0G6LGutL2/tfW4WPgd8l +hMDRhJCT4hERR1g/TuOCBO2oX83VuHixKQn61w9ixMxx8CEj9ORkXaww1h7cnwYV0nBPvyIZn43Y +Rmsox+Jjq8fXFFWCW+/ap07jQM8jwhyDN65/xM29+rIg8/kOZ9ROGU0zmzFOosohFwapdb9IKGCV +WTuqMv8pcLCMwuGHWGwcpLdR20Ka9NdesRJy/9KDYktbzP/8gODHJjR+OjhdSzxiSdMePpUZDqta +fweSJLfoG970hDZoAULkWMXf53LjmRcoFhLiKkv7wlvGopmlr8CrdLMGSWaaWXp76KVUP/83D3pY +OlOJvkHhy66E3NPbThg/LDiIrBJZrxRkMU7ccFbl4SIroMxPq7ni0P+fOFNG21BBN/yZoGjYn/ag +qbrey51y0ukVKzwuJtKioqn1fdrxcbLzu/gWP0jBVrcTD/YWtIkyGQFKr5P5jqd3ntU3joTeNvZV +scYWB5K7DHcdAgE9a+QgKwp0IFh3OBXBXt/ygr5Rq2ir++3vZTWrheThZZDomuAN1nXJ8cOzrc/N +u82XUCKz79KjZeKp+j+nv/hKpzDR14/YCCK/nXDqg0hB7PevluTqNN6QBZmAtJMDbAx95tj/AF0y +OSiHB5B4Y6pgsTrmbuZ/AwYhPTLCkmiVjhWycBA8ZwkIPxgC57pFPCxOMEvfHvO01fAatPE3ZwWL +BCGxuFHX4Jcy5pvSYWCdV0vra2ZUNX1Gpieby8sqOFbmfYP+KCjZzEqyf/xDpVNp4ZLy7eGullen +hsUnJtmLhhmEqseo74AXedRn0TryIOCKK+4SLmBFjFr7sfoi311Gj04ZiH0qH3liodC9two1/5Gs +HERa8UGldmijS7BWcgSQR8JHy3tMisGvjVOjYgcHVBE3WAhegKZa6IEQn+Apw9Js9NDCbdPh1okK +91v2CMwIBag9BqVXgwZB9r2kyXZU7Nn/b3qqNu0TfYBEsswfh1nZhz/wb7z7+37eXZMJHLEAq+SL +CnCDZ2UyE5JSEJNNtnaP5R59g/VsjpXVXQ8sGI6e78qDocBxib0KVQ9v2wHEze8cVXnRgo7ekxMx +n0IeJ3KURzd70jIWt5xgHiKAHUaMuNg2Je305CzEcwQSRX/kA4EBc/BMvoV2OVMis5wRvKfA0/Cx +9Q6LEbvVbNgptkEMxxmZLjXIUu8xk+EcF80zHN0weH6cbe0Q1TRR3FZfVhqqIuEcHFLsEPG0BJXR +IkOm0b+eT20E2gnnSqwSJ4soXBYqilxPev+WPNd9pw6RupN0ZJfqeOAuiMcY6lmHiSxSwYOQHEUz +kh6PqSkp1Qex6Jt8Kxztn4cCWcCvnSVG2q9l5fQkwzclYGBBIvA985fjbwOfv2h6Vq0gwu9w2TOc +pkwoJxyi6QeMPYD8K9qTRAWuw+GUHPvmO1CZrkl4Wqjz0kE9TklxT0r1wyVRNbQkKoO90PVdT7Py +i5LHYcPJ8ynwTcGpusrcg113nyi2Gl/bbe8FcYJklbZwXU/5M2zqAqyAJiv5xjpIB6jMxYIwHelE +S5In49H0MC60Y6KmpSvY1hH1WS6sGxNAEsjGLtjO1MihBoGhkunITsrC7TDMO86ScO4spzNfvPx5 +QlyMFi4IEoF6/RQhV+UpWYMMtmkx0ApnXTGdFJyOS9vwYsuFFviPaOIYXJVN3YCM8DGAApZr/X6N +Dm0VVmZ4Xjgmq7Xr34m92R7elCGWDdxwatC247SF4yCeEL7KDoMECYRPIBzJv5ovOZ2M3z1mBvS9 +znNFOOlLy8fdk893FMYb3gwNN2KcQiqNTU85a2HOfh8iIyaUwboZvPAIuNQfn7/wVVAphh9BTff8 +a1Kbitqef4Cxas3EF49rLud4CsT3u9d01Q2AptRbMlyp1uRXFinS50bI2gGrfQouZgXGiE4vcner +Ynd6mgf8ZbvcbUU6MUE42baGWhreRQduMI/BCX+1+KvOkNO0O2GVxE+spO4U9ZU2OvLa3Z8IBVCH +iB5GU8mWfVspR6K/bdwgGRLG6YFDUhHI+Ix4pII60KEBPHUgNwkmjVT9W5Ex9mNrcr7dXv1/s4NT +sk14CcC/75EVS2/ymTNJV8ZYsNolrPEfDwGozLOiJg6JNrZlvpsZeafaI5KjODDNPVlDa5QMTX8P +wU6rWlsheL/VUJp7VYD3YxuA3obYFd69LdJ4OY/FlRrrYfE5b3djqruwokqv90oChVL85JXp4sfE +8n+B++LhBwQFjBeHVT0bBhAVBNLHxj+MrK+yBNkA/LKE+rienuE2+ENn3TxfVCeMn7yhlRCHSqOe +Txe/tOu+wCBLAJF9UsKlaWoiWBQbbQf2ZjnrId1fz4XOthCVmgl+R1XjCxVBF3ZD+hXbHecWo+yc +VyiJJBSWd3HriIguVYwf4ZOs7+puPJDnvcYqylSIeySMWG3Y3M+rCZUjtZcA43QbwV0V/2AsPcKi +f5xEu5UMwp/WQ0THNCjz3OeQK8DMhX/VAYVy1Gm1g2NUR7JfDTIoW0vlPaQ1Q96kfsluEgNuEwKt +hoR5AxAjC66OMp9wDde8CHYHfAv03vQ5YVWVO4+6KgDh33fPz38anEaCvg3Lu0j4XD6yuJBkHVjf +1K9PyGQjdA+E4+47waQuT5wRufvyW7B6hnmcF81HmOrm4KUBtI9qLFgzkGkDuWz3OInnAFE3usnY +ZQXu3Agkxz04KTHdPb6U8zsR31I3YX0Z6cHZDvkglJx84PLNDSIkEiXOrNk9NjJIzFB33odu5BY6 +Lh9zvIoKS7W25tRRgRSK1/2hAlpNDab3v+CR9+I4lMCsPmyUZ2S3dtr+Irn4Clqx9YTcuY4rOrYr +XdiK1rUzLv30LlNNn6GyAzR+XB/yeKDVSpM89gfMChIGlfTUAGfzuN9Jsn9OcSR0jsipz2YOtM13 +t3u5vu5ZvwA1AIzTgKvILMJUqzlYnWdwLvn1Q4TNJsyxjiGppEhEhlwBdyKzBm2LSrNJYvDIMX3h +PkZxF17Lc59Taxv6AhUhjnvM2McJBQ+ZoJpt7keB1+GnDEY21yKI3nMlTXaFUyhKnTclmzjWAwY7 +O4l1X2iEzdU88QJB7EXn0+Do4aFeP9wcB0ApuAamEj/aE8pp4iaDLji1GiaL8sAof7RuFK5IKcw7 +rT97xmD9E+lPYPKgkVhnTiUm8RHVY/vYn37HcRE7/R2q2mVr7Me2YQ+rKMfpzoVJXCvD4PWbziFm +xqD/TLhudjJiLYcOhJZtP6299wjvs4igiKISgi6jZhKSWHvCnuzDn8PwBTGmVDAOuR87TUSVEss0 +owsL9QN0MGrODLFTJKDpjwjNgu1N/mVJTkw8yuH6QAYewaAOLJWk0BrLgBulFT9FmitroifyZhC1 +0cSL8lVvnuYnrm1imkb4oBkV4E31PrTBCvliaxFH4CtaSIPQfOUJEODKYEhEbfm2/lqkxssY7gwd +DFuZ0Arcm1dCSny7e8BoS4zPNw3lzT+UrGrcFuAnaxoDzPnu0qy1jktIOqNhpASQdE9rxZWpvWi4 +hQQmz3h7YJvpYytmj/G+ctXOxZFgzc5bxSl4DvdCI0ybxFQ0NvzZuCdDPgwZEbGq7GULR2LhRATF +Ue6bKldiyHXDizOEhwJ34ou/LjbLgi5apCijF8NE/+mgMiWwTnoWyzoQOuIIoRxDYIqlUMa4KUMR +TpKPmbifI5nG0K1WqOiXsoWiodMgqqidNNBfDQ0YloujS66oPrM0Af58UHmTTELq2fbKrcrDjyne +ZpAWHuBw/oQFeLadTsZ3NNDleNpQDXwe0+hr51GVO5wzzKRUlPM/ieVCbNo5hFz0XJnElGSeIDZ1 +vQTbrB9BFiZZzrIf9ebdzzzxzUiFmieayrgVOXFAUuFAWZvTOXz3ULUszm23BZPV03oqLvY+6D9E +/cGVL9GptgtgkapY3JIh4SssgCRUDEyUXV4NTdQYwG1V5BbFvGaeFYJcVhORC0Z/7osDetDt1D+6 +6CSQ8f/sYinoovQyHIzVGCqV7VHs9ycuuGV0SZYRNL/KtI2GHJQ7QFH8Bzzuy2ZyP6PJE/vPj4fs +qzDbP0Pu252VHktFav2vB/19RTaXsZax6cJaSP/7lO8l0W1w4IOLlT7Aw7qYcpkCnlDkE2uNtYwD +c+kZMrX2zy7q43UvTJnZXY0GYDOdqCegrqrQwsrVyySeL1Nu6SjeuAHNQkp9SnyYnu6S6bHyRIrl +Eoth6utVzn++Vm96IYeJi3JfcRwx2OlI8+IWM9RRe6xrSredVFxJt+NeGovZhlmT9cxjb1c9BxFm +Yc1P6jVdSUZND1p0Hrf1ez/rR35IjifjJuXrqz2oh/sLKJelu7USWSUtRkNCvl9tBxBnpZVKOxYq +CWnxhlbovn2RqmpqVb5nHOO02Ic6Pree2U7EVfcbywffDdq2b9h/ArCDPg8+f3cs4AFtb+xFRrao +bC0sGD7upxSqMGBZjbGVExl8xSbXSH8bVSmBn1Na/m3LIBzWBvy1Phs4kUSvKVL+uOQ3Cdg+cn9Z +9oAZRiqCwqGeIq7L2w+new6vm9x3pON9jmlpB5xZ7ZurNKLTf0fWGm4WG5ZRszIFohoRr+Yhwvxh +eq3Pya5u7IIHDEEq6qNrRJ0MZ5RFyE+yU9h0RobhHWtiG+5+vo7g2KA+CHWt614LLiTOBqa0m4Ms +aay71AK+sRTC0ZZ/Oc0hv4Y/Wl/SoRjf6OzNTScuYx0wN2X8laSMzCrOmCNgDtI2WuWFMwJg8wci +2IBWLcGES4KLRo34yT+2y64qta7eSWpee0+lrUlR19CRXwDp7sKUFAhhLWoe6J0ZofqHWYBA7RnA +ozemYMbBsWxVIQIinVQ+CD070GEiG/A5Ezc4DFM+Bie9EV1nmiP9cQk7kyQSs4/vfoMkzeTJ+qxU +WLGhRc3ydfR2syOTgTgDhCasBim/hB72i1xuybPT3Y0cnYOFPkavNC/+bnC/m5oefXm2NhV38psr +nS1ZRB58UYchdb0y2tqKL8xJ01DlGu2Gp/AxrYO4Eko95inWuKrP2VkMVoKED+QmLZ6+E3w1K2ZK +SthjT3yYpu2R02j9cozdlIaTGwjNZB45gcWseAac2WEAN2tmUGvSXHoIlmJNbUvG1IYl1v9O8z/1 +Hf+p8vnepZo5ZREq+Jm42L5HFXIDVBkHWHc0RqQK/klPjbuLE+oCXhQ5e/eUsapDk2qIIzfSVh/A +Q7xs4GzvFyVr+R85f30LiCEdrU4HjzhVkEqsgHWishqT7bptrZsF3PydHh/0mgPt46kdWvWBvXmH +eRziKB/ZkQHLpQ6srx/9O5EROSd77egsXhRb7rpAJ4vPkg6iwT7w/7KbVtYXQ7jlBXUTtLKuvAPD +GseavxSkUWzHOqX8yldcQrfmvZDNzYI6RYlzLnQE7R9QG7fSXmDCISqhhv9VnbbZpskirufBQ+Cz +1r4JKISFZFCEI1A1kgT2D2UIya/br7AkLA8wH/+qDfLJp2T5czTQkzpr4Wu2nnDvA0rLUhtnvVou +8rKjxZj8J3zvUVQhDEa1v8LHWlioM8exN4Vdp206YyDvH5Kf+7gs50HWADjLUSrWz9FCAC9qfeFk +SBrcTnSgO62eviwIJVbFpHqVv70cS5b4JEKVcXE9QhQmIAiIo9Y4NUBRDxT720Cv0Ab2A25pu+8C +6up7ruh/DDcRLruHNeZx6wMrC2+duJLCQvw5M31Im9jLgZaGOXsMM9y0N/dLRKh/vc23mqQ0jnrd +9zdBv977tduLFNQmff8ztqmzIbVNCmZVDPrzUlLiFXkPseuOfiZci9weShgjTCJdlE1O3pV5bK4v +Ul0gwWxumBGjnR5RlYSzM9VMQ3QNpIfMGfKRlbi5iLJz24CZkRWoZFgH91QgmvCEYVuMzsfOwcIn +v4Z/ts/me1+VLkWrgE2IKn0I9l8rkNm3hSVJx55QaB/60rAKdBvQros4ODAxroZHv/pgbcbjREvA +sr78rOe+OR91TLVwKoKHAqgtGFli8o22eOYzJeI3MKEneNm5daQp7/WBjUM2KKqDab4de7BxlwGB +xyutrstB5AxGd6R48nWL2P/6mELtyoAH7/OjPszgW4eU3KFH7QUllKw57GyBQVEJ9w5+AVH//e0t +yf0oaWFLh1LPYISQ3c875gpn7+5E6eJVA4WQjbTHkoHRNFcwjujBEpO1Cc0DZQ3vZpo8mUbnXzox +b/Tvs+u8zSR9VjS+GDj5wY3FEprIVcf2m5FziuEHU/zRUX7OvFdw/Njcohn1rGfwiUl5Uiy9SDbT +9v799HE0Gvl8xV4lE6W0TTBz2jxcCksc+ZBzgdzfQ7Gx/ji80UU+k9Ba+wIpw0Dzb0/L7Nr6xqtG +2uqC36D4uzOwk0zMWVjFvjrmcR6RLlspc1DJCTzz/f69tt/C+IIZPcVlcagevE2g4PUxzzXoc7QP +cKwRGJjXdaj65/1DTOy11a0goPq475C1nF8P8HkeiTcPxu/kixHBuyaJ3zv5vQCJewktfQ0tlXZI +RLbXyWCaY8ur9FHQd9HWuEm1oWK1UxSoSq4We4JU2ogHdIrfddlI1TZrRHBuFyr2Ok5DH/UTGneE +DlZTwcJkBD8Wae8LxEBZd3R2f2Z1FF0kZ9T8vYJk++3dIjaG5rdwAbYPKXFRiMMVa0mOJ3HitU88 +yXBAcwTG15gx18KA33/N3ZeBxWmPd7zg08S1w3BYQ6fOiKJMvINYZowmoniL3FXgnuHXmZ7XRlfQ +jD5bdybvN89SRjCG+Mpu1SEIXB2h6zirOmwD0ptG4MhdkP6kB+/+coQO3sA5f8UJzzQR42KWlQSX +jXhaN9IebR7wGpyztiZGZ7raWce5NggLAKl8jKdJ/ZciPNOipWNOyaa5q4I9rmlrs/KThtr5Ze92 +dtAR33VT8XZ8boizyPQUrzl25GF9E4iteT4CyKBOx4QDYnCqzZs7evTDlv3mydPWfO811VEY/WCR +g81kp3LjmmsI04AvdiJCUp08k8uSJ2tJucxUg9OnD2daQKaDDdKjqAkQpsUU4kjL2lonmTLxgbHt +ffoepQtCSqeHTZO/LKKcCbPNmnJeNRXQAtm687ZHNitqmY2iLHq135JuBYNhp76XKo7UyisBiBeG +yAXZ4Pt2Z2HzO14hXAHlyZuVQYPbsY1nG5zqTiAvRu5SXvWKgxDMd4HjYCnYwCMiHB6Fzc2xiPSB +Fm0CebEB8dAEEiTmrIDHp75nFp/IWo97r3Cktmok2nJZl3QJ+E91CjQPZ4gcMHzjezZOCBUG5QaR +4/0+eYaL06DnQs8zv4Q0HMsdKT8uJyw1m3G6yi1MQZ7d2/Tg6fvV/pPs7aPt+6sqVMslDFmjiyMH +DfIRdXeiZpICgkPihzoL9ZprouL/iIjSGzcWcg13OPXv5HpAjq/pm93+lxPEKqJ6TzpSETodiPX3 +xNBexR5Nf4QB9Bc81jz9IK4ztusJKz0rJIfTRaZXw3twlxp1QKGruFgZAUi2HBUjfKk+x9gOL+WT ++CjcwrwQr50qTLODVqjfA5BQDoyK8zrgwuyBjCQuUg8GtnBqQcrXis7Yp/hL4WrDqP8Ac8SEnbwf +jB3SHt+4gscQJEEdMxIVTdmsyaJzmgdbiemEgRir1vguc78OVIuAoSd8ol/rayW3kOSc8gpJ5sVN +EmjiILVyZWaqpPG8uMKEt2gBXFjHTLyhF7caisGGJTF6ryIIm6DxgcdOF+4S+N2wmZGcOkFUYhi4 +pG7m6/JSBzyZxdFLlX9pSdq93PiOtacevkxLy6CMJI9ptptTP7tHHdPYB4xGgzRxEOcw8CX2WLjN +LW+agzzbeSc3MZH/hV1s/NhfvZsgXGQUEDszPrhAbuB//z+nJ+fTY+uku8XzsDl3HRmrH1AossRW +xQA+9U8pGG1uLGSJbyIfByJ5HpUAZsJvci+iZ7BUQS2XV8W1IteTduz/xf5fTMMjdoSP/ppml0/K +6htHpByZl//vsVCMABcVL/Rlfs92uOQqAn0BN6RPsEnJgyLTfhW4Y7vYxRE/bRjCqACs3MHR6QqH +pYNiPwkPLrwKzQfYOdgFZV9nclLlc0E0m48jXJVLvzD7ByYGOPnHs9Uh5W2+pewGV/dN4ysxt5lL +aPSz8OM9yXWVJ8dmGXZa4ri0gZDK7slbKZ+/MpAn4D546F1AhBvyOCrGJA3AIThVzVUdhqVzl+Jb +qCfX/O/augQ9S5Mu1cb4omG+NgpDXwg7YsgL+Mhruu6KPuipReZMLvVPx0lKUa/ViOAVU/O0OZbl +mUy06SNZkFuQ/uN2Fdu0O/IdXEyz5fo+deY7V0vsE9wEALkOixGRHjitLNWvTh3GOUWYubP8GG5z +iK6krCmfpn58Pznzma3+D0s4GCkZmzOHq6IEar1T1iaX0upAvHextvFQLfoiSN2xR9HvddphZ4A2 +zksN2uDunX3X9LIRfdBF/Vl24LX5gK22TwAIFW6YUzufZMQnH+St6dMxri7rCGtdgUfKGXh5M1+F +pO2dPYDnnzQJ7tc5IuDvl8fg7fQoPpGMEbP6A5l+vtnkNnsI6jMdCYZxKHhbaJ0C5JUrvCsyN4Cj +01ugqRDLmQrfJhi3bzj/vmURd8EXAXOX3vMlOVEg9B8Y+jbVAUno2dB25nrQV1h2pHQMmXjYGkfb +hzqgUqWzgrJjkKAQOD/GF1aeZk/yKwo96WwgsT6P4S0zPS4Jbb1ehV1dgRZzj5ZF+c9wTlFVhGvA +a0Ktsv+TnEd/tD1/opdf9fDgLOBXn4R2nY5+jK7+KRNN2uq3WPlMdTxN+fUenjYMnhCGpVQHIU2b +n0JZaHDg357jrNlhphonC84wrJ0vbfRoiAj2znIRGZxjeZQ7C4bCxU3af4BukqgVY203vrQyTg1U +fQ9K5SeeywaO4imV8ukoiZEcDwJKQ9fGME/ZX5eTSXIDXbeXNR4O7ftHBw1kwYhdEMI7Y0u/9qAy +JmiZsJmUZoKYCR9hOsm+f3L6G83kDJYHnrtr95fwFjksVAYFpALVftipvA2FssHAnSBYqMl/ymi3 +Lbo8z7rEmEl70317v685gcVw4J0mcTTxruyBcDFeXbyPBrcFg/Mv8qdNw5qYg3C5iIsL/i7xtm0l +bmWHY2410CKv5ddQyK9ps7C/MFPd2fTtNRrhgl/kon/+4HznWT+zYw587xZ/htfSM4PRxZZFA7Hm +jAE4COjAVfXKL6urkPd+NKoGFre51lAtK+kuONcmlSKAwHIibG1f81b8YM0EsNUNZYpMqs6XTxf+ +ObWS4YQDkFZVPqnbeH2khvILTwclsjEsPLt1jFrxX3HDQMy00lqD7H7o43R3AE4NTj+qq+AgEzEX +hnQH7MUO4vrTyxuNJwFCe7mbP4OeT75K1aIr67XGCL+tM0KmCeM2Melxt1mMrWyIrAlSJvcqAqNe +w61rv8S7ExgAnidoXS0gwgegQmgzfwJunt/a04PP7U+VM06ucr5+7hbQ9qiSWDKerWvV68DX6AeX +6LIXaNtqgCYg9Otq6upHdLUyndYrgI6nzXZDlWLHR99/TrQPxkFLNdfNJVzXGYHO7TSg5eghyYgE +guAiKf6x4ys0NpqHvnzMEKsUbk4ygmR1Gg2HbECSBPKcynTsP0tNTFlb+q5Bw0air9WhBDlhZhsM +xyHWam7NK7QMw4EVTG+kLcHpD4mVdI3JOF6pmzcxQatI4B0G5U7jLJFHyWxckOAyiiKDKuDwJFir +ShdQmqBIA1nmkA4Yu0tYSqU8iN8IcRrO1GGfv4bjV15JCeIyq46Ms3tywAZVZcnu+BQoUDbxZ7og +u+/Z/HpCFRLRb9mPFi+/M/zx8/9jrM7qNZKOIsK3oU+W17djAuPa8S8nH7PivW1RUp0ZMbYQb9J9 +4Z7BQRPFuS5jqYgwmr2gsDw6/Au1fGeKs5EHiyzGfrLNcZiEQpOW65JLGAQGzSOTbPxY5ffVYbuP +BWMLUYZZGmYx+83kBPFr2uQUa1ddqI97PP7bvBquW9++j8D+vhGk85GccEnTU9Hj7t/A0ahUbMyC ++4pmrNiHYBtFLEgz4ATorTwg2+TArIYQgPxOZhGP6QULzjbUFSyvcX+oG7o7aEd+o6Xr60gg9tUG +QvN8IDaGs67+/+wXLGDv3FNcracYWrqkXFIGBxoyQ9nUbmhIX/J21h3NiUcvaids9HqdVRPOTiNA +cxy7r9c22gRi6As50LdRvMdtUdAGTHcH4twmiqMZ/37gQ8UHvPAdEmMQsaez5B9xcekiHQhcLLyY +Nd5V6KZkj5DmUiUUm++H0Q3AtgaLecQl4dgs/18zCQZ3GDR+3cC3BBxvj8VC2pyK/B/P7vLpkYz5 +ZKH6GXZ/uYzMubnYxMhjq+OzUUhMUKiuR/HgjXZvQvTg4k9kPEVrpcK5eHw/Z1i7rAzetXpnsGIL +NgH9mJT2H8GixXj9C+8HYzx4eXl08/eU5lVSfY2QYW/gRuhlmr/+BwzCFqApzLTbHFhJ7wpkURvT +dECJKFLmQH1ec0Dl3AnJtOJhr175eydmOJuOlDHAhgoELp1kq/GPFAitlxRGTl3fYV28GNHchqQd +rNMn5Rc24wOeLMdqhADKe4zkTt2/aO9kcDqKqTwqNYNZTxEqpldhHLnlnduAkSysQZMWng3jDkF8 +/+ukhKgDWct5h081W+KGq+dpZfZm0Ap7yql2gzUT8mVfV6bOq+b78i6WE4+cPEQptF3lt6yp/IJf +XOh16jmuNewc73Sg1fD/LFI5ji/9BvJ3X0sgzZPOgNElJnnGJ+WqpUhEXTdcd5RV6cQI68tWLtJU +54T5Waigj8kFViIBj0BByloQXdt4cmoQtTgD58byt/mddqa/Hoh22ZohcSYn9HS3IbD/7Il6JG4s +Mn0qQ7Hapzr2TBv89UCEH8VACsCq8IBMhUqPuxMq0du/EI5AWlxONAVMTqx4ibF+dJTxAZWVDZYV +z7DSfp40ZvAPyHWT49rvJjoy69zLeaWQzNpvv3N8pZLKhVOXiPf8MP3ZadOOQNc/vpDfd4b8/0oH +s3iyRFwNlg/gg0rWMhBAJu1duTJ7wQedmZG1qXSGjr96Ip+2Ie2jgbufVtxSfNOuTVGVvH5XC4Z+ +dxhtX6TJc9ws0HSGmWQzPDgNSwpNLYFOp0ucic/PIq9Vq53wWhTzQYzvYt/HiFIlf9FdtUzB5diP +yrqZrNzWYh6lYBa5mQjhVsMBDx+C1Nw3gTrjUyEbwM4JoKSehaC87CYAbRnpQ0yZ9GFEOYDflYpL +/ZJFYENTa56b+nbq2N+z5toMjFfKMhAEdUmWT8K7PSbY/iPjaW5wjNGdcI9+n1qv1pWO6Mhkcl1D +2lt4Fja8lyZSsyk4GVHa/0WH2DKp3LBRYUJ4cRmV3kPz9y1Buor2yBqErVTfY1LFVY1TnFeBCdwt +ItOlTHeA1xNJ801b/7PHJtgzbMhS9E+b2QivJIwJ8Ly6KCpndyJ5cSa6R2LK9FozfRYrACnEBp0G +TlccNYcY4YXXrQQ5b76HA5/TDV/jqDTvh06aphr0CNijkbTxt3jib4GyIKfb2FKRjdA81mYofqwx +Lvh6dafN0+gjhMAAuSmh4ETuSIaifMwxkPeS6G/Ct+TjQAWaZ4+fzA+EU3B6xtAQbadVd6C9fzAc +8+oKVwxsh2mLMlyjlRuGksZrnWMxGZH9opiMis/IPcUQAqIwE9OiWpsSVCqT2p2+Lbs0nBZ7tO4W +97J31VT6f/O/4oxpx2o8/AVEmingrqlrEeXpVJ0Vc2/Y6KAXDqcdlhSAL9URT/uBa3ZWo+dyM5tY +RS81vtP/VaqhIr1dQ6O2XuRrRpBfPoQpkZTlZL/5scTmMcF/SeJ6e3lH/MBVVBbz2n7siFwTa/0c +mIK5rxWnR/K/vY3SmJDzVm4PTRiDuvUdMH3Dp+2LnN5L12MGmIOOayglIgFMMeNl3cjNAZCbeTkP +p9YrovdV/xKGBDpegalznV0b6LAFsSU99npyJZQN5kNoXkopX2Dv+6rUTURuV5WGNnd99FBVQCdR +AJG51l9pH5Sk9T4bEksNhHfODTkwcM2JU5vIVqsAoUiZcXMDAjaGN7YO9QoBY0r51PTEFBA11jKY +7HcD2P88f5sfPrUK/QO/3boIAIedTr4DVlmt+n3frWfASTD4Uf9HiWxWZk2vD7eruWA9kyl0bP8w +eCgcxGh90Ak5rlIrYEt0zr6+7+LN6Oj9Ehr+ueDbMIsE8HchpAYqTIVwyi3dQnFUw3v2QNqUKiSL +/Ymu4JjE9w+bePV/1nV44b7J6hdu00AZfk35Px/isXlOpwqmK7ynOyNb935qM3w/+1ZbTTb/yofv +GsAHC9M/zAgOLxGWgtoIN68uv/m/Zf3Lys8sL3aC5acG3A2ntwROay6/OK2Zgv+5rMo9mAJSmai1 +YO1UtnZqjxRa8yT56oMVzNAROhCtx0aXvn2Ec7+5a2SrDuWoJ6eOgRto+Lw0R6eyWX4Qv/MR6W++ +vNqBvnjMdKwWswkiVUnxXbSgb/6sEpd8aj7w8npXOTPEoRymWPWpIiRCoyvSKgWmD7QAxxfToqld +cQCjAUoXiPtYR+HY4qtlZF6ul+kzC288mzaek5mg69xjVprt0I1Q/CV1yRTYeW/HnrQJTtgRK6je +36oZMdaEGrJqrKkLgKuvpQC+dQY6c21Q+RQ/mKh0A9lW6hpXh1Y4+3Av3vToDIaRpG3NGGtBXSy4 +HVFOOaNUwnryIZEcAmB/kgI2bRzPDoyjNXO3RcMdqdmks81NhwvfS4QKHPRggSKc0dGTk5z07uS9 +9PwC8JQANiUy76sryxcQt6uMhdVvp4VBn0bjumkCMdWCSvHokQKcC9MS0Y9vt1zsLWPWCjvU9GI3 +YTqHzBs2kMdW9TXiMAE2J6hGqMrdyP1x1q/5nrFJKzKF43TnNxPERMnGj5vy7g3QyftfPpxACLYQ +hyy5rMukWw23qczB0Qp7jMHBAJzn6ZF75bLdLAZTDJx8cYJtVoJZr181dowlFYROhuEq1HIDrm4H +bqv8tl+Wpxsg+ZEfp3uw9BmTPLFZmwk7syck8yY6Yu2pUoZJ63S6wQt3ztbNOex3GXFIgZOVLi+Q +kT35Zz+tdTYfNS2F3+E2t4rq3UiY1GFkjhbmpL3Yx0pQFGDkC3RVR42jHJPOKVctqDiEmDfBCQVL +sEvQMaAIxQyMHrmZwDeqmLUXCXDBRp46cC3fiD+JEbfY1h+UAHuXdnmNYyG9gARdO2Dd44lh8BEY +LjnFXS5MqtASgVb682uUxj7cd6ZsWGEGiK5Hey/dBO7iHDYvN7hSGtONWIXqfH8qqd2/etNaPn8N +XBSUFAzeTGZ8HMbzx2tErcKscTLYeuwQCLWQaDIFpsZJ7/c8poGsk7cNYA/MSyvbO1dh/tQjA1eh +OOvxDwFIYninT3SULRtBoF7d4R+O8D+P3pa2KawEtWFXnah6ywiCMEx4m/rtydAYIgaZLngwykmD +vPCs7GQMYyHIQ8cPCn2h3X5ZclzVG+58fU1iuMZO1+4e6T0rMDUfPQ74Ntu3ufu4JhFzoOSkJavr +5LPbg4MU05lQLMDc1AMM4HGyVpb2BmK/oUt8Dv5EGj/Ct+Mgpfw6tUHnkEyhYw2igFC8J/2cAxBS +bW5vKMS3hbdDMQSwYpG+jbHKpIezAfVcc6paK+Fsjb8beouqbPHuFtbDHuETo6PqK5jHeD4mkT9n +xuw4srMG47ZHlbMqn4S/45WZYM67BU3f+ZAvSWxElMfaSJIFBeE1ig3fkmUUThxcNrgArXmHGGSt +9RaRLSHLOCQvfSZ738a3NZIgZ3JmpOJrn2z285+MF/oQSrS11E5FcpGhs3CRj1pSP0Vgpx5X6hR0 +FGnxA9VC1094hnnF5L8jOhzJelom71xjaj2qr0R0ixflpxpeGfaiTGK52xi5dMOR1q0YhFYgYcXD +Bwbeq2CPDj1RTzaVpmRM8pQX303kx3g4+pAIXIRvi2aMmY5mV6UTZaDdi7GEXhMjf7MozvsW5lTb +ktKXUl07BAdozyHb3stDY0q+fW8WsyzBluBHjgQN+0T6NeklNUBlFAGuvHlcXsL7W33HAsPjGAQk +9pGVephkuDc/70VRE1Hrm6kwsPlBJTRbpbTLoZWiCEz7t9vR0aQ+eliM/SSPc2sTZjzmfgxzrUd9 +NHkLhw2jaf1nMdZljOSh083WhorjRdXPpDVSrNJLs4lL/SdQ9BmAbyQ2jOmVmR82vUu7WTOLubLy +8HGD8LD6J/8PtR6ueHmgtekb4H2LA0Vc3I46/DOYeRbpk6IUMWf++xHM5toRU6sm7gBZDOewnFAT +RJ07nCLS7VJ/kbSTGZbXU5TRFZYie6dkfJB5hIKwqiQ43EAWqzey1nHKUcf6jKMzzwRpWrNG1ll/ +9YUu127wS7o1mGZyYnBLXn+joudaDQC4tFVXWcymAoK1w+Oy4KfcDkG3rtnJRPA9iUk3Uy3ut6kx +sMv4H/OceAeJ96C6HBY30FztyIokZhaT0XS7vjYFfk6OkSuwBByS6evP67H9MPEzAk8BhrNxNL8r +scF+Grap/yCO8ZMUxZbzMn4nne+i23TiemQ2JEm5WDrHAcO9AuID3gdVsEFPYBWNvosbAYbw7q/o +9lpNTTYz2EecQAOMNqczCdNkBw+0qA2/K/jSBecULx694YA+1WLuY+2ETV7TahnssN+zJmSVQDCY +LnUftV3qAOBpJ1RKPmse+jdZaHZdxZnvPkXgi1Mgi2AOnzuksNSXf2MoxZ5d/TnbY8+g+vAH5LBL +8Pt3+ua89qIVI9WgdyXk7yUJu3sDzeYOLKs8nsKLEtO3hpytTwJljx+slx4+G8krdMgCktZpvaIZ +qoDRqa7FilgFyw3A38YUiY0aunhZi8H+jC9o/fpoZZ8SomqwyDwM8h2LMl05q0sm/Xm9VNRodZir +F1TgFRUvdOdXJSTeLw9uWijYTLD2G55S6ZzTguubz9nWRFKL/OzOQtkqMn1yvt7c+YKjpWFtDfqh +2ld8eJwUm3rMQZcalYJjy05ZXkdby4Hv8qEyA5msZY3wpb0AlVmMDSEx7FVukAAFIqJjLfbQ2GWG +JO+eFjEUnGwOAVy51SevQCSVQflHcx8n0OsjsWcWXDwSapjJ+e9iVRQzMszvJYYQeNyr4Q7HzAi2 +TsqMceYWCh7p0aGqucu0dtNpP8Hii25vLATexe/hiPd5wQgOOEnj46OFmzA9ahOcbh3zJnA4G7Fj +iXHskajhiNEnzsxp8PcMf2RUWhpF0cVAgOZ7wIHHgXTZihUamZhUsXQ1aNR6eHKTUCN1v7+OpUs0 +eQiQriazdPQkLUMUZ0AB4uLTb97p2jMKXGpDW8+utiSimbbLlfqv1o4OS1sO5F7hkE2GI/83yuSY +oA7H6J8IPmzIZoocJdsKuHMSCi7nyPp46wyKFofc9TsNwZhU9+IjYfy8+VX7PXQijZe0IA+jwOXN +8TXfoyawHK1xld/+YPOvI/S7nXm1VRFYiKiOxZWG6AG6dC5yn7mZITFAHZP5BCvO48WNZjkjipLK +eZlMLPTkqKeIz9uZ0Hm0eYtJO1m5er8QGVHQwRloTprm9eOTkLv7k96rqrsH/EJAUUmjXfXNMUje +yOd9ipm7ASl8TFddxZTWGZjnhMkaNgcZsQsTxRjocoRk6/nu+P5mv1nJ0gll8QuSsqQHDS8KUM2y +N39RNTjAOsjHJh4/5AhvvBqtlRokKI5scqUhx0ve/5g6FFvKbdZ/rOyQi9STbNIXQjPsFSmkOrqI +CJP2+Prbm+SZpmo5p7cOYKhuVodRgJGc6CyZ58GAj9WAToYqmE2aBMsXzeimKXmZYbl/TB4/2U60 +LCXHcOO2XXrEO/2ijDok1kUZqqksjnmxNMdlt5DXXCnz9YrNTvJGmiQlhs8suVxS7Z7eHmkrHryO +PDXjDgyiWv0fLG/tAGmlV4eEB7NPnAIMOHSRgNsh7V7+9IT6q5XJfM1y10iO/7eAxnEaDB7nAcic +mQtmiALZLa60/mq5OG0xQG2+TcCdqOHSDVYwVKYJZDzF4nkfMQYBv6cub41jz8kUAmQBlztBFXdc +pMmQvY8eLoee421WMNFhdN5b404raFYOyPHYRrFR98DYIYANxz00DZCGMoW0pVbDOr/PX+qy/x+Z +z8iSARWfgD+6NMVRw0vz13ZwBpEh7Uy5KR91ptLKzCV9I0p8pJlEprlEU+oDIyTf8VAqnmfUPm/V +Ai9yOWEizZV5/BOGApytDSLH9Q68Rp50Z9MXdXwlhn37OxbkFrBeUuPhnWTw47DM4R73Ga0opzFu +0jpuDJcIZGxndAGAgTMId/1EUlBMPFEn06Xk3mdZJGgCfsefCUgeN1v2q64EgS0X3a0Kqvkzywza +egEgcplaqLclc+C+u0Y7qLJ/2vP2e6BsThAVHnU6tmO9T+PRcqL2TBRk8dKaZZ9ixLQHWAvzwNKt +il8Y5ezXXVz+cZ7RA0sz3CrsfNjsLuMRJKg4IM3/BJ8yVcczBUVfQGM4mucVlskNzkmsv8ZCU0aY +sW2//Oirx1n2NN9jkTgMCjy8OSoQ9uQy8F54rlehgJIvbXnpgViMQuWep6uD2G3P9l1g7g0AfaX6 +U5rAm8M5BjLKhgAigCKxr/a6c/BebUeSni3wk0fhnxtjFMnU4tYFxbdQ/tMr1+O18ENYG6S1puP9 +7uL78zkLQCxrcZvDvDCtSCeg/sDdb9h1nEqIDmT2wRCMGIknx4nxMQYjupFpdOOU/nJ/q0WV/yDm +1Z2BHgKyXuEa4jnruf5xckwXPSRLmDecm0PwgXc0EuCzrxN3mhAbNeB9XpDK8yUBmVYPyVEY4+QV +FeLDjofYY79Vhl0OcIK55JyCc2MeM3IUYPkK7ZSCPMkvk5Oo5ctFV6xHqGQxlp2SrGqse68L7Ki9 +6w/qHoS4g0BgZfcN3JlX6OAsKdRYotmnYn/vSOA4x2RipYdDa4LrR16PI4/WriXx824D/LmD9Rrv +xPEZkf3nV0XIQqLD8eGNXN2r2r9B2uG6+5T0tbsuz09to4yZpqaiidEOGuVPhFo48/tfOF7JqPvX +avaFe93LN+9YgU112c1wyqWYvjV3l0DOIQEAHcBPYf65XR+a24do5iavrQav35+qkRJ+7CU6sfKL +1YwESbxF9OjGkyqnZPATwOgPOqJVFwLxVWuI1I7lmYdBYHJciszmQD7KQDy8rytvRugs3ympaG/k +mrLfrxhF0ZwSPZQPz79SeeULQOz78DBIEbednt523dP0opjFxBWdKQIFuoOXprMI4L066vjcwc0X +g//67hQso9oEnoOwod6CY/ZOICuLZRlR9H7O7Lyr7xFBpYnwLvQw0ng8bKw5QUcrw+RzXI6stvUG +BmzDfaW4JYHPFVZIG1ayP02hY/ZinvSKwiIX/6oWZEP+glVKok4EjssjsVOnzIicTgOF1bNLwMW8 +rDYuZQscJPconxqPi2vuBztnKzKM4Dt4gCg2fhlH1azzMdo4NDNigQbgfCd7pxVRIpjIQvF8AWpD +jYU6QEx+gdjm6R6O/3o5yp7y1Z+Izjcaa3ASmPQIOYO9Z3MuwEDdhZga2OR4GpgfGtuoYhXkQRzd +t7iRMprktv88ou6DUxCIXYjXpiY7mga0Q4zP+9Qhi0OsIRG0wPN65JiwAyockmw5OCqLbmOQTpB1 +NZgA181CFOgrbtL37O5HfvFw6a25V8Ky8QM4iDaQxXlYoJ8c29e3lDvh3tEFQWSKFr0xTNuZBbZm +PK4CvP1sfMx1EsZWhXFn30V1GzOnr8ZVbXkKIvC4JGwwCRpsmeOHOj9P8NCugHjldcyGvDonLSaI +9XfdIivqikAa4yQdHq7H6WVtyjvyiio0UhjvGpN+poh4p+mcspg866gsyg+tx+AR2FqNLMp9TRsH +LypRmCyqerSygh2YLHHBJyNJlPIupL2twhijboFjlFOh6YRpqHI0IMaObCaFWofTCpSdVFAEPNFF ++rruLB0mpuE4pEZg+rMIxssmFfM7J9f1uCgef46G477ZLMUs12AK+MWyAn3uG6BZlVD5gWgOTvV2 +L5nhQlQaOErK6JXUGl9YEQLzqh2iUwsh4eMamKO3tRY/JpQOx/ef7LMzBdFYJWSzEVe6lePd/0wv +dXOlmFa9uXGKVpoJLuEDIKB3dfl1EhEyPsGHzZohYkqzCKIbFOHWb3LDkNOli3JinnLxfA2e0kBB +AYR7t3e4mDKm5AkI5r+X0JpAls4CLfW/xcNLjtdoiOxeWW92eYq9cucn+vf6HMCl6FeSzfPvCd/2 +N6K1QQuEDqXop3culfM4KOwgM5MLb7W0NQU5z7Me9JHA+tP3qYh7TImRZhDYx1KrId/XFpDJ/IWI +KOQNlNMIx/BxsWgEwlZLWhUt2iLQqwWUR9UvP2v7n0CMKGUIaWdI3kBSqA3U5WS7EQxuHpEoKKUg +BtagYvMQfzRrj8Aa7rPrq2i9fRTS68eUW8ANBdAJrjT1cNi214Bxht44iYFefu3HUwElVxwEHDL5 +gsPM/GNgfQLZ5btkpW7hQ2UX08Fba7If46qQKJAP/2PiA52NGrkbad3IjX4gPLD0nozcRusJBfNI +HOvIFcYvsbKhUecXcn60NPqDxc+oCIW4eC1ylMe6QyC6tQ7Icora/lIMRVVhGdc9Ry+aSv6oblj6 +07wTmaNlzm9111HzxctimEjqcXsEDJFLbQMnx+Yae7/uTY7UZuetOCkhc2XwG/pDQKbqzccRugta +lh/dV0YzWwOoZUYfNVsI13ac3/YqPdSJcitzqidX7UsZ35TOkGupdAfeUMu8fWCdEhfuvlkWtW6S +QJhr+PYB8mR1aav8oNpHs3TuWSsGGEgx8Iaw3YuqRS2FDPmwz245pPCKE+9tlAi3ck4Z5of7kJ8y +5pQSF4wmAXqxuAwQJcaddDqme4H3n5FRb8mO/tkBGNTa2gDi71T82urAO1lfcnJTJNnTJdkxnQJc +BvZ5Mav5OQwDMy9zelFLZ0Vx5xdm2v9idzlOYwuJlVq0s5tMTAHpSdLDxJpNa9CeDp/clx8VOgjK +tDuWUSle+3KE0ilV48wQj7INJmf08pkr0wIdyylK9Ga++srG8pn4HrxsFd3N1R1ScZhj6CwStCxl +a+9/VvE2Jzw9FT73luS2vaXTWU6Y60RnSFRODvQUCw0Huzlt8103Fa5nkzl5DlG4jd2Kg0u4gSjj +q3CImKltYk9ez1lytJkXxU+NE4dZrp1UxYB17zYfUsQd8l6pFVfezypKSwG1r4vq5m3XEEjOVN/B +UrxZujEqb8+IIF/koDUSeBSN4l6QAeFWzQaPRselY4q1rOLrQr/djjRVwCznW+NBMDph95IiOa0O +r1aWiZ5FGJq7mrZVgDC5BZBUa+TZt7lzwOx5s3emsJm+NYFIHRO9CDuShzwjznLDjoLb/G+ZD7YI +Y32h6s6YdwsXhGTjakIVPWU56KVLuhUYYMbfomlXfE+Lw+6cuckjOp/fW+CfzjR1l6+8maJ4Loh1 +z8j7PzygnRuuOY+FOsgotMdrFTUesSpxrL/k4aVX9CRd+FBF2QTtrF4q/lDGOO2YpHUC/ON9RW7+ +LvU5LfFD7GEuwr+2oBTr0+HOinkUvG52YHkNaOMG67aViGDARodrg6spjCpTpDXygd1lEOJEFHXQ +JD0tcukxBO1C3zmcgjXm8L3yYjunc7CrrmCwMSY+jCkUGAZpTAy1sYs4Ao1+pYj0s/Imcy5cjP8P +kyggbSh6lOITQogVV8FEUAE1bf3XRA1104usiO5swPytKR9UWggR0pdCEI93Tz8Q6tjHhzD1qhwz +9bIHtR9e0ZQl6ekqILXuKrzzJvSAppLrX4bARMYlfD9blOqPS/l3CdmB6danHIsU0vAOsvAfV3J1 +crvr2INQvR1rB8s/i42ppGXpcAiBwvQmezimZqZWBd+eYLI4kRoeqpOuZTbJdbip5NH4XFqZWtd5 +/RWDnbTrI5K8BVOlawySdP5pJ3bgHRtUO0IkwPt8+4mX9PxZ/Egi3b4xqkWTmJPxu8RLW3Lz2SHT +EMSewsAjMsznivAv9I/t07nv/x8zTxzO+RgCjSFXYar9B7P8mxm2zYtBDUTJLU3U0GsHYQ3FfO67 +pP3V5kh/17egZzTxbXVHX53X8qqE1eVAAhINiQCuvf2I2zsxfAWnnllHnh0XI3Tc/gPvuAH5tEmK +d/ks523PAjjepUsbLvgVBRDNoE2/Vdi27blnYt6pq7YXrpeJdktR62UMmDrFjUuj1LgrlP8YT8G4 +eOANswp6sD0qFqcHczFsPP6Kkc5pdPIYYlk4LwdCRcE/sCwmOz9XLpgvDFsQ2rGxJ4dfBHl2kZAv +JduEFrLvWqISPCkkj0MDmruynNJ/VR19EXniZFtK+t+DzEGdfmiwUt3LUjzctSL5d3/5oFi0i8Nd +et7LSlg5R08MOTDZN4CI8qbKSeGcCH05vL4fmxuQKFWcZTjRy/cNvIcdiDecoXaypjtI17NSyL0b +q8xQknRoYwXYI9Dzrn8HG7HWcKKIVD+xqgHqJQtRygSc7/l0S+YsBA2SwhQErUkYrWGRGQGWu2qd +FhUqSVVoFrkecbJ3brdxnVQaWS4gwd6wfyXu5rz5dRYx9gXDyYjO3WnRJmFo2KYU5CBsiUO35Sz5 +2ahbVZk55y5PtqEsWlAUcD3iXwLcyVkVPUwvzugdGIPXcL4daSQZVwelHtsZozH5AubA0p4mo4ST +xyMju7YW+fP9EVHzdRDRVTa1oLW+JT4OgzutVlqZmDeAhoexnv56pNJ60JsS9E7BiTCO4S0Fb4gu +SfdQlcRH4ZSTQyO78jZKZKTEegealK50QcnnXWbHVbr8RJxOoB4R8fqrqTxGrZmy9bFhZe0ek+6m +61wfWuOomdodPgY5mAwrUuz2ab0NvzBVX8yHd2/9ap1IZHxWG56R9c8RZsx30xd4FibCuoZZRZdN +OQDPhjfqPTn4GzmZWvqEMuUZBe6IO4Fz+p/aMGaPz66YPSJF5cOx5fofSfQvwrqGZ6HNtGNlTZvv +GLZ2Po/xo0Jx6zomMyJHezlta/PTsHTWLpWECxL5wzDIQiqO6QgnV6SmVI5YIwOTuMo/GgCpacP9 +mnUzB4hvPjih8V/taOrrh1fuU/diZH6p+WVFciEbE8Fn0gxvShNDFEWAXPf5+l8ni7SR3lafL2eO +sW5O8nqeZaIhRtnc+0am7pmqBeIrES9s0lCzWaTqZOo3iqrkXCT4mnhpbPB4hhuI31rg1rjJioZ2 +DZEPTdtr7h+R5dVz+RRVW1hyPt+1/MY0UdIXiip4JdYk6SFH5Rjk6QWzMsXjsq/ovj+imr/px2q9 +yqOpWpzSk2OH4uCSv5DB9iUVPnGLr8fUtsmLNT0ucuKddClvg1xSauySh+tl3fTd4YQcYfJGy//c +9RKOwOQ6EQTxLue/8+Xvg3TDhPxz5DsiLFB9M8VTG8DsMMuJFMGe/QEgm5iG/QAXcBQry4eiZZEQ +ANiirqpx7OZV57lJWBFqpJoo5UNOvSbGUWEszkMQxhI+fd2EHXpcuXlmUJnOsx7gWFpHm0UWpAO3 +3ti/dLeFP2AYKxf7EQRyEW4WDy8TtsfxKthkD2dApXbu7CpefLe6D59tJuIZ+zfbhNsEfqb9IsYK +4tmCt2p0rezkflE4q7Fh/AHJSgciPrC1SQ2xv5/QmnhdpaiqkJaWEdBehFerphcP6CfhxhAmpiOs +lBKr6cM7mNmHykRcxZ/q+S1ocffjuUueCAvn6U11OmFillQTavZdUfe8EgV5daWDmP6jUYeWRgAk +o8WzmxqOgx5hyiL1wZ04afJ98X2s5CWBzjzKo+OFnPWv+/Qj6f1SRitW/Bin8qmz+0axoXOVDFtr +mWCZ0N802OTZ/cmHmz7zz11cDZhCJnNiMrGPmwZpx13bVG8rSri5yLLLlgRklRpFbSYyOVBSPc+Q +w9W0Iw5wlCi9afLnKnFIh5To1EChrjjiaWcMWH1tRhkxdV8N2h4fbh/rtSSSzc4gabePNWqPPhVa +8jiOF0Ckfm04F92KPNtS5nFiosQ15sThHQQwqxacOmkgGyfn3Nw/T6dlxSK0VvgYjSGeVni8Iyfo +zv/WfaPefZ7GkcB8Wr6sOm8/oyIqbBzEbkdvxOscI9CnylGD29eyR9oHiBSED814I+xLpjKNOMu0 +oZOq+ExgL6pb+MOz3+kiCOg/mHR/BEoyyWSHyhImXQlTN7Hv0Cx4wQakoMWo/4bPX8giSJ2fHEot +zpdAJfAmOORHPcrKWjiYXIBzZ4BKGExfrlp/myJgEgBg35DWrzIzqj2XAPKGZ23bLkjZEwfqie1w +rXjnECGyMZV1Nb0SPxYIJmgKwGFvvWyLGXml6yq6xjWu5eBLVtTOn1fCqpGrz4dnqFRHzi7ytIl0 +IGmZ4nHmcoJClIKK5OvZrFlTLQ3b9MVpujogjMPSqiZ6Ceqv6ajEIv5zyeCsQhMrGkQihRAYw5mB +gqckPpEFBjnf+F67Cui1C+5farof0g1m5vzOF6AhV/KxBdKSHoU40MqseYHPppUFppJna5kqa02S +s9wZ+JNcg9sGMJ353sQprraKv8T4/Kgjk3bydt42OU2lAOfMIiJq4lUkVmqs1YoGK2rTsD1WuTaW +nYVOQckiphKrcaT60Y6jpBaIQFbD4oYoSH3vFAGJf+Xa7qKcC9OW1WuQq9vS0Sk6RiEvEUR8vwAH +FHmXcot4lpBFtxLmT0jXuJZNgtQgOXLZUTGv9Xsss8CSPO6uDWkWoEJrs4STcZ/FFfpW3xO2BO92 +KxWhBywFb3eECuptpBkMRAUW3ijKnU9Z5Blac115su9o9m4Vhk4goo4g1vF0OiV7XXomJQIeipHf +eubQ28zVFNdM98iaRCSL/sLaBUQRu9JHjaz1GWeSwVDmEzpUljsUuYx510Wf+Ui1NUQKNkHsUeWA +AnDnUZ0gjaMMABQK8ImfzcdE6tRSk/fg3RRDB6/7D0hLf/gW7tTIiRt0H3KD8NXDnEvLQ0gSP9UD +ilpcAEGmMfb1azr9a4Xb9nva+BS105XrzR+fUGoMXscw9dJaYfOXBx3tSKEfqsSg9SKMqyp96OJJ +qywIR49tMn/wikps21qxJnbYIn1/KbDiughE4RRA9EhQvt2wtz1nY/4C3itfqyUFEvMpgteSfhRC +frUr5T2/lmjg7bNsm6CXFfT9u3RB4uOXeU91uExTuPksZFIX4jSel6z7gVQ0tMiuvBWYTF/HFSmp +nmmOtHtCrWUjh+qNfasKM6zBYT6e2zKsSAnkdUC3E14njPGGiZSSnm5zWcbQKi+HWH8GWbFHmtq9 +5taZLOUqy/dX4BgfcSaPwz2gjGGexL7lnO1DcX5khXnYiRrkt9jTDdOh+GJ2t60qu6/6zZZY0npZ +xvFpuWdMrCF347dujCFyW+w1RYv61B+IF6MX2nF+UuKOPqt5DracWT12lYdySyfjjQvunbsfEQp0 +45d0HkBZDQF4igGPMi5Hx23g80b+/E/mFyuH8NHBEBEaiG7h+VUUSp/m15gUjXsd8ThuPR5LZPjh +wDkQ+mYBgneOPLw8BnH1LVrNxE/t3amX/lCKU+5CqXc7IqXlmNu2Ev404vWysjjhtCDRy46cA70c +y0zDCZb6OtELOB6nux7Abwkgi0uOVT7tELPV5Yg2nSzL0wJQcTyDtel4x8HFqggQhGXZuYgiUPkI +syZ5H4l04P4xc9PVdbr3S1keVWX2F3q4OWCdsOoMMCCB5IPXGsjhHaAhOxMZFm8zUOoE1FtS1/fz +bL+W7c4CaRPbfnHV/dHeeV3LenV4yz4fnTg0HPyQazST+tfnzq94gYCB+ZQvRv0uLgbsp6L1egeE +VwXTBZiEKA3aIyL6l6qtuWaJVe6zIpVS+PhNMmtZBCjfUAuOHG6Ox22cRH/NTwRIr/afSbo3TbcF +WyLirTEMH4TiBba2b/kYqdXerH7hj0b0ln2wsK6QWnjOpd6IKzKF0xYiYqjuEzQyitZmTDRfVnRP +m3LpeGlxg7/mqJPAzp3Pb0qCGNiRA4zQ78NHa2yd1aCeWS5cPWV+Kia3N4Ho9RVeAS/07YMxgr3X +PM3MvwPh/6u4lzMOgaLcuBs2JggSphmac6iFzw3utGA0821SCdRNGGOWkb9bPr1PZgrR9ZMZuxdP +7AnLbv+oKrVL6i+kXlhzC9F88DV7cLZj7AgTuD1mQAULeNSmUlk0YEgDGFJDSZyA6ExwCZHyPA2S +dk93r98fhhjbMHl0YyvKmJA4Al3y4XEX47d7T9P5hXEli4+QxrLGpm4g/QhhHdGWeSxlX0d89Cl6 +nmPQtJcCVtpZ1nlzn4kWWSaWW0ptF0KH8VoQOM5GOmNZUVy1QbRcpk9HKVI70ItVingcuz/4Ab0A +V7HVhr9xfXAjhPFXgnBmfZXUjKQ6AWPmkXMfwID/2ZQKq4Upg+VQfBp9Y7UNFYVgKQKYu2qGb27m +ovP1/42SKsdluYhcusNgRmr3P/Kz7o2UkRvvhaR0RXPxpQ3KpT4YrcTw2KEEFtoxLYoTTfdUsgS7 +F4J6OGokiXTWEiKVEkh50HyTDqfTVt/id/Q2bFdDqgY0iMys3wJ6OMgfZHeXZkJhzBZ/lHKgw764 +ge+g+SiyosvCNhOtShsTyQHvbrcPAemfKb1WGYbAoOc6CUNy4IQy6TENz1yLG8cN+3U7IhG0f9NG +N6X/H805zUU6Rl1KqbeqZD9QTPk/ivTi2PFpCQxbIO1SPbxpu1X+32NwNNC+nW5LRbQy9Btx4NDc +smjeQxibt+TZgdOc7SiczAtS/BIlReoYjiWi/A5u5768FWKORPUrDwZHCvjpePULvVCJOvAcz88P +ASihGw0/6Y8uIRxgvpLWie68Q2EzFJzdeOmCVI3Zk0jpzkc3txC5cvj+KFy3tTWVKnSNkeTkLZDN ++xiRKVYcRdh3MO+9pYhV8T+Y2QMxHEJMNDeqxMlw7MN1lzQSK62sRqbw+d2BBdvxDZeTAUHPjLxl +8Vw6pnuZ0VmhutU5xm0mggmQUpxxBS4aYlKK03WIir5AFMcNWlqJRQRV8VEY3OUjsZAufy8rn2wc +LRwF843U18DfrN/muSNv4Mosi+nxNF203lSB7L8xGph6Vbb6VqLPkSKzG2v3F15V+eR+QlQlPtw6 +sGR3Kp49044OHr5isADs+4mkHf8SQxZm8F4zDT9+g5dj8VfVSrRNa+xpXTEZ7WTDRHe6lFZpb38Q +I8vjIy3sTcn4RQPEFHfkiorxYYGc0uVo97UMkTPdQnhNBHrKAeR10Skuv2T77U3nsWUdO59JlYC1 +ebuFJNIiP8C0O09LCLbbm5NX3c+aqqj6O+4Tfbfk4Z/86sJPpmpksrOvjFzF7wMU4DzMElLuXddX +zgYt9/zdh+Rra5qAYzxigxmcf1geuVZ9K9/ssrzXEd8kcUP8N3aloFRpEyWGBsEwwFENiGQLX8Pa +cNlt8hPP0RteCTLJ3ri5merz14bYthruGgbzU6b5qaZqLJfB5tfOXqIOXRcOVUApj71I/zdXGnrT +rqcajLuHRtyGUkOCuke4laFxLz8fuxPfDMijFfolJegrIE5FZyz2leLQekpsPHNuKaHK3T+2+GP1 +2OcMkRdkrpghJxXfrzluVf3CipZMohPsw0Cw1ITN+6pJ4Bxvwii4vywneQxAThC8Ack4ei7U2MXd +2HYdSZzgP+fVGOS3TtOj2kMoqSu/lqgb13McJEwlO4k3S0C4qH24dCV3hDrhkCpt3Poq6k7P+Kik +hrHNU4rPUspwggwH8lQZhs9pVFcvCMqGtZqsV18sFMuv3us2bfnlQF48EJ93ghFilzS01UAiUxxK +C54pjcNobFqma5NqRqyiUKn9FVlH0DUSRTkWkk9dzuRr4XNtPanC04/NsXAXYAnKkSwoa9Qz+S92 +L9p3VLXRubxoPSSVu9/Q616i+j36sVlCOJT3lMRoi7/Aem6tMJDknRqsQK8yIU6DSE3wP5sfaOzH +GccXDmVrXnAX5uxQIPFMDW3pj5OV7xiEQ4KJOMEk+Q5ZL4CRTGzsFKPhCi7jcT4FwoTgDdx0kg4W +wDnCOcw51HCfdbvl1Driio2SEreGnrfPScb89r/XpdzRXoi7qef8jMbmJi1CQZCzGCI/uAssWYVd +0FrylnBbP3meZCaZpjvdVnE375hVkIJvXN4zme3m3MCirBLHJDCnAYKRlWKhF+yGAo6pt8450rzN +uxIwysH94EHAJWyWMSj6Z7I0xIQkPh3a30r6v3VpcgfPO0zxCEPU0JU7lW6Iwaz7MZ+HgoZavTre +z9WtM4mzxAm8lFqhetC9KjDlAxdWHub2an3P/nlxnC71gTsVkXx7u4KAtPyN53ajyHDMeADfKNAY +mRDYTDPaJKTOkkn7a20COTkEMh1pTLljhrCDbUiWL7CkhKK1tyLzd+bR66mtUAuejTOdBvfuA0x6 +/KuSYBftJzt30tRwcR0H2QpovBiyYnKabSgpsHcxaTig4aWh4d0m2Vgr1GN4xhLIGimX1ISfjR0K +sx4J2XP3PGL3lXr+YaQQkx87L5PIV6wM6e2HGApDhZPq/Vct2kZqX/ezeRI8TtNyMnjU+Oq8Y8BN +G8zkpciMJhpNY24F6vb01UQp1feeURpp12y0zIa/KDEIWAxlvTezPAJ0LvnPRHkjaam+QT3kG2O5 +5cGE//+fs6n8I/EuaEmVp+Gp7xDFC9HqhqXY8TrZU6dxDnXvo+9SANeWXN9PK388E4SIqG+3QPn5 +USC4aQ78TFqHwV5nslAJatjojk2tgg4AQ0N883X8yELFbE7KF1XpY8hKg1a76G0GBHsXnKON3k3O +n3mjLSGAJt1HCpt6Isy2UmLbgC55OqfGIo6isVWly6cq5iyd8zatpFekGIgdX1+HFwaunG/bnep8 +72SG6m2rMeocXKvGg4DELE/OOT6G9YxbAKfJOobGsFGKhPAfZHrEp22JdLRcAx0anZ1VlW8m0uSH +4ihH850Pi5lcSIyJnzwm+l022Oot836BNphVDT9HQtbP2wBAOIKHt+qgci+1vxlITdvOpTGxpa0g +I0quEF99+bT8BKmkhv6CYBfJnecs2y9r5h38TqCH3vp6KyWkmrNtV6XH3RvD7mAgs59ArBxhaTvG +fLPFRrkPR7yyW3JvnzxbuzqP9d3ylCaJhWeSbd/e89znhYpReb+pLu1re5XGMeyA9si0Ov9DZio/ ++KUMglTcume1yzZrZV5RM1QKTDBESrFCxEWpBtBPLquT1HNESYvVi5NFZbQxObkb0e2dMkcqCUm1 +RFEihNGCfUunHS7WBHka3F7A0z0D42jeSMcAp/KJJw5STaSa/gySDku5c6mZvEK3QrWxsp3KsvEx +ptn4ii7HTqXq/3peCjzeWBBjb4wWcq1GYioZ2nHCnW6loW4kqn4YEAyt71u4XFadRMx4RMfn9wem +yTHy2NWnttQ7hffZvHjFKEx7SgP7qpMmFijsLQm7KDfyROsZQ7xr/oCI2RQT+aj/yQbFS4jIlQ5Z +LL0zhQ7IW12J8FfrOek4vLmy+KYeGnqg/9xaikx57tKCogjQ4ogwyqY2YA3CQNPAlUD9BNqGqcvK +BR3iN1kmwGs6dVuPxPZPdqXSv0QxSpb/FphUyRp/H9ojQs0K+NAr7K1YsxWMJE15FJm4Tx56j1eW +J8jX89W5JDewaEovdonHn2k7xw6BwnexkrjyjX2fbGjH2jMGzDVE6j2wipCWylLfzaUYTKsTdJQx +BTtNAWDy4gNGbL6YB6trlYMIQwhtw/c2hQo6rwF3lTVQTpiuq5ITKVe6eMkY0/6VVcBQJwMBum0j +aRKp75zMqh8O8+Y3nU2cVNZjzodH5g50AJA9cExCIpTXhQOpN8Z1DSwyaPtPP8zjN0pdcZshOXJq +2fGT4RjtfH4EqrQ4ejg91mIppbzrgdmrrobUCrO0JrV/i2QiBIGUNRpNZxnPwmmGpSNRbFRpl9XU +xplrUvE5zydzo/6ibRHQY9cpwTUFW3NtxrH9msWlcpVDdodSZp9BaQBM9IfjtgAVG/LKoEy/yc3K +N1cU+360F1BudmZU5teqln4XR1IBXWF3/GlRZ/TAp4Ad1zfPs7f3bzqG78aQ120Tkw7c2KVGlZHi +WvMlodmKv6ZHCXDwysBpEAmdYFA4nJuvLCVRaZaLu735zZnyuZViYt2JtToCcYQjrR5bkP9PbOtV +ZqhWk1FbkthMaFwS+ChBWH0/CV3q3lR+H9dOX/aGRhu+T0uJc9o8dXO6kNLtweJIHglRFVcgsXv+ +FmYxcJ2TZLQ/Kv0p7en+pYylPLrcgWB/fMeeNdUbVNtVs2NeaXXgCNuq6nmCQeF1q4BbAEmC38tD +Z8ucPZzEvqaAy3CtDYe33PN8aAdMrmsI1Zrd28s1PSKzNrWrNn3JcnFgOmXsTrszuXpmjX0cenk9 +fXwlfiA4iSdZSra1kuFQ6ZB3Rc49UlCgUmT0qa8MK8Xsd8zHJPDIGfgonGr5JO0jZrH3n5bDE0L2 +88QmPCxVJeLEBflybz3qR6iuIJFJ5U/R9OWAQp6/9WkL2JzQIeUP4mtSby3+3gTvqVGQ4WYY3Z7l +lUlZ5bXv1RWKcLyBGfHf8wjumhkRRn0iNFG9jSU2K7l5W4ZM+IwOMDHakcgdLGcvaGbWkoTGkCII +ocnn6Rt8kXjofn57zLigQQDR09ptrpqp10eVa8+mYPKPWtev/U4bMyDKEGGa+iFtOEWaIxsghutK +ZK52+b2JftOmr7ATOOHPbrcGnvUEW4bfahq6l2WwEiPm568OzPiCp1SqLPCGrnkdbuxs7OnMceC0 +U9RroJI0RBY1lT13XQkohKwl70IRtunBxffzaO6gEoHipIuA9lh6lQwptUDHxinrteCon1lhvZoM +5yYgrDtfexmDqzH/71NoAtfN6rQsXqTuSz8oK1h8PZ0dAC0wEVb//kdWhoue8vm0AG5Xt/3GxAth +fkaxjkAVF0UklEhK45l/BRb5zQpBRJxKSG1i9JyVdaRyaCr0H3c9LOeLWvO5PEuPfFZoAhuUOP3D +PIbYC4EawXDoWGMw84RYxogUokYVonypct6irsmdfRVJbQHZd4MxJKQljL3HZvv51+utrXb9i7rg +yXGNmKFKDglwo8aQSIBVBY6LNkG6aQoKV3oGXInwWYmeaV3c59f5klRdHNYbpeBGhpVa9ibp1Xn6 +kdNj9PUYNPEzci23RK7qlhGMPIiyhw12u4I2BgqjpCyVsMrPxdGKHDKxNL/wiP3kNuz6DZF8ae+g +2xz6bEzg75fuyeCLKzwuIUbmqpT2pW3weyMKKz2XEWsrpSc9dU4d0J/+u8QP5u/shn7gA1F0YtE/ +5mjijE/O2V1iQioUqUJIBT6TYqdWrgptuTZjnhthyFO2ViJG1NS9Xl/JjiBQHtKWm+9eTm+9IoGu +yvBjuq4njFvu4gDFBwRFZk7xQssaKfagzeS1neJk9GJFkDaizMp49KB+EjbyWFV7xd0f+ZVh4lMa +e8vRxUKvtgRqpb3YkXDZAapeF5aZf4ABruSnnUathmYDrmThyx5GaUBS3I17B6FS6TamIh9RpM4r +CEY2mudk4dc1UxBH1cRgXPCAq1tOp8EMnsailEtv7hWQpyJU1RLS0/oSfegqEBFzc3+4R1Iqn60C +QpJ5uZZV0ZZqtppHUbNz8e2RjL0qU6Lvmp9EI6Av5v2sODrLOI2xzc+EhY9QYgWH5CeMtMHOtLyN +Rwgoh570pSuuLkAhFeE+REA/Qs4gWN/IteCE+2y/k2YRCvBmbdOKjN5RzYb0rhZGZOgLiv1AV3TU +xZS+emU2l5/PiwAFZQfzZJi1KoXiWJWJtUfNPJAfWgC3+zwI+zQcVXDpULArcHfRxWpk/bH9yrUY +xhaq/4Ah2Uvl/bpkd9NnGxseMfHRQLwIGTduEF0fgP/lfjizyLnpn3rndHxxE7NpXIMnDqketvnE +sZwKLmZ8XcpQ/+8e33I9fcbFJu/b87WjqpBVO6LWee/Dh5DtOGLmPca7ra+EivLONgRa6xr4SRsN +XgTQ3S0kH7ILZNc+wCw8W8DHohPPAtCozIm/Gg9F2T28NTiSaGBLQFmWRbGWALZEOQztfCm7s437 +KjEbGijviNbsu5I+HDyTeAuUHXONxZbCFMQfCCacJfzE1zsNP+rr7/GbFHyfOxBLItB9PvOJoKwR ++y7ekfe3xOj39SJdYIVcelo6ERoINJISd10YG8Nd6k7fYf/XOreVy1foIGUN+hfDw2gJQO+AySdz +X4ygcmjYj8NL5sYgnWuZBJ5NgTocAWZCk1QRqeQaADDSLY8Pr9Ddx0b7FHlW5gdF4uItBUBlbp2o +AlwD51FxX8r3rbVuH8s3lTTiIPIvZV14v98Yd2/lx8cigaBfAeqhgQScOOw/lGYoivXHZczXLvpu +nxIEPqHH7Bhmgc2l6XEjyrPSR+5V4GY4RZB0EsWqullL2XYdqe/jJR9s2BBXhLVJemylcj/1GnKO +lbHxVhT3IJlIo3OwX4r/cYChw07DnLBW8weJLrPqffH2GIU++P4Q6Bvokv0tMDJFIPWPSrrHnUYR +npQO7CJLpuiHOZXVDGByrPmzzLntgKXDBAUbJ39Qa4jNnmIGlPLifEvBqpPH52EmXGy81J4BjFzB ++iFCP7/xk53UNuEfv0RoEXK8DiD/Hnj+o9Rj23C2zUlxbOf81aVkUNPLKKTuuVQYQXZn7xnYSOEy +/5k04AZtHNSFs8wXluxG52yRFMDxvlwidnk8fNCAwBFJMIpsGJkdlv8zWogyQf7Tg40njetjAehh +ohBte0hhZ/s3TIzfDXb9DHtvqd1wh05IMUMZK6joGBYmiMPe7m/8uakYkxC83tFJ8kpJhdQsa/sr +yU8xGszxptVRiDxN0HNrbe+PDcjJkMVUFELFgzBqtCIUrlvG/zE3GlMbgFFP2g1tRqldJsOXZsJB +y1dpty/bK2bQs+YxApHTGJF28jadwi0o/NVCFKhv/Ncq5NcOm8sdXek+PC+0ONvr5mjvVuKjHwZN +cEW+nT1qNgDMRMaURrTkE+/eKX9kV9hCzgGoj/C+MLHqC2Ux4nJOrGVbSU2vDanBJRSkQyopzYT2 +fLWHF/t0LEOyzbjMB23glK9vVUY9sL1yAqzu3+Mcoga3KnhLHcdT3jPRLczb4LFL15rUw4zXW3AQ +pnx5e8Mh+TXwcaEsDjYPeC0Ieuu/gscvU5mMWy+qoW0HspCj6i5fBDaHHbN3rejeufurbotvlSZo +lXcwJ8f1RdWxqqlGQwCnBnDF+mDulrdEDhv791Qry3cUDaHV+SxHem3mIAjWap/MN7SE+jUgbeK2 +Ff0u1z7LZoXLOw+FbpnoQiXVm8DWhCWuThOLBxnT0VnIJqylo5TkJ3kPX8MWzagrwEv3fXluQYQP +Czsgqnel0wGeUtiF1GCgYqqeTgH3y6XhnwPJ1wqxT0VC/XhQR2IVKROw8kE7UBdaxnxhWN1Y5bmx +F0rzwb9MjQvmCiiBxjQTYP/0qMvshj1LhtqgKnxDl1XonqqxET1nn1OnTKgc2fSZN/BOe4/jDGV6 +GbTRvtexyZMVVkXek/sOL8AQ6BV9MCY0oRr5PI2ZKLQ8+cHfNceu0f+44W1hyvbF4ubbbtIIzckO +Dw9TKTvs4W2EBn55dxKzhoqQcT8rMgTpGdlMg/f5bQWL1KMi1qZ2B81EBCV1m45yBKYnKkiPdWMz +ZsmElJeOycECTbXhFNsZL3BLqzmfN5bjCLYZJvptUdCXI2I+Z7myr7qsTd/MwBYyxTH/B0wHkpfR +lnyobQGxqyO+tIu/lgVnPI3TKGayw06JeyU+3CB0ujrdc2Nx5pqIDyWnfZOAPIvpPjrzaeeJCE9m +q/d/63ybj4Ikw1eWy6Y9mB+RsIP9zIYJlxRW3W1guJUFA3rABeAvWk9Epr0qA8HLL8MIzYwCRlyV +K1bS61dNHaYpuBBnXKWYW/WDDUCEKt/n1D0cAtSdVsEIWIsz61ytYMwOaKh5796y9D/Hk3EDYZAM +Naj+eK9yu0DJcYCoLvOIvIFUoqE3VWCKpWtPw7uOyh0n2Eu1J6GSo2OrUF+IwoX8AgzN6xTr7axQ +LqGQX45kW9DikufnnAjxlGv36SoqLSxYxkH9PHIa39gDufaO187Ikvs2+cz7qGe71LZynRapTJ2x +Ccu/OBf+sm+3LinprUyru8rx7rcfaiTrXefxUjNmyd8Lb3hg7j/T0eTAm0YMCw/V5lb1B3+GtvT3 +08WF1/ut4oWjp/s6H4ngRRgj+a4I9tWQJyMtEWd8PFGs3Gy4+6Sc8wFcKtwZEIUC+cTn7ZZHhE3b +7hIZgzAdlY6SEtVHs1lcNa1gy8MN5w4C9k3+btTV1A8ru7L6WtXxl0e3qZ3skpIGNXr4t8lYpsGo +EeKYqowL+/BnXN9pBbzaCvkK0XL6jRwPnG6ilTdrSAaxe5H1kxfc+vtTOOo5P8SFcqvC3MobxVhy +TFc43jaIhqlUfOl7xN9A+CqD0RYfUp+jG92OGakN3JzHEACI5EgO13HmQw4RLEL/NDOmdyA/cdhF +SCZSZ1uE1sTwyES0KZ371Pd6uhnDs2uVffsMXDuPWIBSnKOwR9uXbKVAtSZd+5EWhs+Mvc5ZZWQO +tJmzO9+eVC8CLMhdGop8UXdQvHKhcQPo/9o3BGGWNimkRxzT0lqin1vmMq4+xkxXFN2e3p5fq2ah +ZQ8urqskTHBhIXxmsM2NUb1eJocQwalchXlEa5oS75yPB8hX7Y8vM3IcrcWenOX57P3ETyoeuSlA +y1bLja0fxh1UGDS+vu0/XybLNCJDaHJ/XyEaPAHJIsL3AR037yJZpcB+tdw73iQysre1lGxp5PcH +0rgk4jkQ5vJYX+z5+5UTRakigYDl7x8BEDWqWsemHb0wki+bD/2QqyDdnQ826dt8zrUeoAj3drsD +WIpSoj4fdX+Sd+eHi7MiEC1c8IhFn8owCCmpXalBD+xkBrWc/M7R7kGJOuZ9IgHmoemQNMnA+b+o +oN8KZWFGYfKm4O8t5DPdx5ZWomOD+7Triz8w2PCRIFWZgYGas07qvN77wr88lx0OEWFR4O1zpspK +gFL8+Wswrxd357M8uIjtFs6TTfAiL1d2/hEEeGXPDrYjna3N/YuLJ/4Aaplle1zyc5L/dHewOXKh +e3uai/+63N+GiiktTfyBUTI2xAe+sr8/LP5y7e9X7f9SYJsQzI/YIZ0t6lakpwGKY/cM3vpwTZBW +cqk3kuOzIkQoidszpmJa1fSwFwqbjYBTG8udaaoSfpaOvm80gZRcVF9qwRAJg3ub8PxEbrLYHQgZ +X+POppx/OQm7UUoTK9KrA7pX3D/T9jTDV1DOVRFegpZnqR68Df4L2c5SBAtSQWM5cgYB89bNdSSl +JEMnjlggo6By5aK3TMCT1SE1zypwyWfNnPRfsk3coXSJxd0Nch975xDaOMJpS2IeyYp8BmKuEIMf +2rXhaRju6UuwhXYBpP7gNqYBQeCUYAd50ubUgQLlo3eCbG6g1bZTVnJCKHA7HEPqc9/k7xWbADQY +BJ4zcF+rAKna/YPVOEw06xhCZO7yIwV5TTUs5/Wd59826jXzmMAj4bNvnms6vBYspeqMmkQ+9sWR +V1Jm/PCJBqjMfadovX2rQT2Nbfljnc9cUjF90nEtopWuvs2k2kci+rgrvWvRIg48dvSuMFe37RoC +0E9oudVJpChqbTiI6d1+d0pMX2U4GECnAVfexVs8hd6cixm+whSHg8wgEAhVIFp3dw35R666JKZI +EABUDy66b94HjjK9Jw9QIouQacOOJsSghPKzZpFq33LTcfHiJJ3BTKvo9Tpvh+K31J90mdUNdsAq +UcUDroDtveuPMQPHJ3xBIYguwH2cJBqWLF79oclOBE829tZch6lG6KS+eDfYXeeVvXmUcuecY3/v +pFbiCI49dCNVMSy/WeN121VodAsJthv0MYlhRo1OfSZk+lm9NaaZGxSP+mLoXPi9lF1jo+xdcU30 +QZfVIwyEKQdLsnlHZHlQc/LAeShLuO4V0v5XduPzBdmO6onD2Spm12w+9MKuWDbz5oXov9kngd7S +nkLb/u1ts7rPIkQc1f0iVQJYIYM8c9/t+XDfLSFE5K8ffm4mQ22gvPTsiXZHFmDFmgU3aAGy8bkZ +GI6CRSy+aa6sMB//nLQluTvuV5/Ep3as7ngxEjSLdmN3vSYEDumgMsinV2XGZD0VhA1xCrabKwhP +upZ0bwOkMreTYo5XqITk3a9BBuvB980nMPt5WByDpQ3lAnJlry+W5r+MlXeX3h4qKIy1KA1aqItt +RSMbnSfXo29l6PyhXCEYd1ebqIN0I9DDAhTmTBjrV/vhVwfESHfpjFrrDEkQyszxbu+1mFp/R67V +06QSFFAi2HMe4zwWVNlmWtweDKibPEv6dyEcnQ8IVkmFxg7OAIz0/AAvuALnkmuz0JjADV10yV9y +fYpLaaNLoNie1kRXljOoa1FpZjvgV9Fkd1QEkFWOFZw+TRJ8QlcKo/VZzFp5+NUR5WQoASk74zCg +8FeZrEdPrbUiYRiUfFfiAHzhLcx2h6Crl5d3n8u0eFQEwxlHNTSDhZNBNi9fK0a9toLWIiUl1oyU +iiPtwTvdOimd8AEgHKI4uRMHK36ynZw2Slt2DMw2c9eZWOaD/B2xWmeXzN/vSX0ywTXL6JkTWCMu +ARjRakmUIgw2eSw7rMibHLfkGjm5idCjmegSZTGL5eAxtMiZNsp1f1jAj6B0i73Cfhb9HeamWOfC +931nmzcmw4K3JfRT4UYx8YEupfHJioiiCmmLAXuzfedAO7gTenqLsw22OrwVNqTAAjIDdnK0YBVu +gH+DACYQPmVIzkycclF9QTFq4HtfHGNh6gaq1H1xscZMFXihojqvmJE7MMZ94zKw5F+J1UuNPmUj +JCt2JHs97rcKnJi+mvCVIPxfV1/PH+vGNIk7o77bBWW8ZZNtZKxMPNataRe5mFId3nCSjx4yDh5q +v+9gdbDAuIf79pQ0BTXIa3uMbW3ttSZZx+xRJpG56EX/5w/KICZ2JYPdme44pc965FCLW5oDHplH +LIJ5ZFI7BWPG3biZijdLi9UjncY9XH4WW47KYaz5A9caMJQaMC5XB9oswKjC4lbTjjm4Cp2gx46s +ThUWU/cDFv6ZLpL8Y0xzsuNj/C0JwSJvC+14VHxzfwTIiVenHKlzygNxcansDYIb7UV8bxF3OrFW +WNiJ/BIJpBFIur5DxuvTew1VEDXTj4bV1TBfnTyV1ZYBzqp/DMVgk5BPwMWCSZcedV5p35E/BiMj +YGhU5OpthcXMq1X6aEZJ++V/aBcBgEW+nehJSPLTcR+aoMzBH7rYZuhR7+KAOoaSPzqJBL5p8vjD +BO88N7WXIuWPRl5uABh89HlPo/PHiAOBW3ey4l9c4S+4bHBS22V0RGTcGOVSu7uJbapVPR3GfITK +Wkey6Juj7+CjXod5b6pKxQO58JZ49qsknAO/gJxVBZwZdf5cw3WOzcYvTW1QYcPuNeXL348ej/mG +oH5UKWpHvgBG2vp2EUMjTZ2YBh7PSYGs8LOakHleQgCLTk7KC2gMeiapry2jINvHrZmrDzd4JLWu +oThwylUBz1olkqu+bkugQbEe26ABVWbLWEO+17J0HjZjJ1+0FcU4S13arGl4x9bMTvfj5G6tIIrA +Qxn7wi4CeRAe4bFX1ZmBAP9Toeih5nPBanV2xIp3NnUIYE59VkJYZ0hf4XATQtf0V4xI7g86YNX/ +u7oB2HOfdpityAvSz8hc4D9hUQlyllwxTw21f3tGuF6WEYLw7CFx0if7fj54/LW/0/hehuucw18S +n1HWPST1Jh6MbArR88V8XSP53tjcykGVo4nBn0014M9HFYIOPqkINS9PPdaFvCNi5LbYp8nagz/3 +soTNyrXcSzOjNPgMZ9iKH4PXtDpr7UT75S+QBQmv2KYXD0dxq3byoj1RVInonOSF/Ujv+mdRKN7O +vdKzYK6NALSYXe3Cg0wOp8kelGzr4x8WJcBcNqqUI4+Vy2TsCHrW5XmA33mFuyAYsz7KdThoSTCb +LWcex8UJ6TEBF2hyvY3ruEcg453KM+nkjq6ssyZNcT+gnjZTSNRWetOMTsgGW3kkNbRb8H5IWm22 ++FXkTKo0qk1ACS6gBqmSwCr+OWDz61RMv5jExP2BE4fRMzLwBKiXQsgasLagAOx71Pbo9YyHrVsL +7yFV2bId0aXBQWazBubftI8BgHCWjQ7pNai70IHzE+LfHlclAlZn+1DTHnRiBGqbOF+KK7l1lq65 +3aRBVwksXJtGEeKr+perA3B+HP/IsLGmWHhI9fTCGeyZCErmArkQ3xqBTRRi/RN2DFGbOvB1JoEA +Za7P+PiweryjVzmc7I+yU4EKsdNFYiv839f5TNEKsD7OsjoT0EalTbY3zl2AHG/Pu+nFUXmjJfYG +PisUmXbhfkNGXkxAqM41ErkJ3oIm2VHYSxYxIq92CUuBbdTXaQwHi4mk+zVQlJ6TjUVCpSAGC7DO +jIDh7ktoTSYDpvl9xzARBC4al2dB4AyVWjgKLR8QFK17v1XZhgc10L5/ploMeEqEYRhf/MnOgVp1 +Rj7ou8EQj5UPRI7zXfJ+4FD8O3+r/Zdb8q0Ob5dujF3qVjALpahTPFcaHErMa9iJksb5O8FADsjt +LXOKIM1A4v/08FNqMhB/JstNsgWcQg2ZVJTsDieBe9CAXUIlJqSzl5u7qz9hdEcGL+IzKbJENTPj +rAJmUIqjvnALtmD0NmQQbAs3nBpUB+tD8zleZADK4Vi5sa7tnQ3TswgtDr4VqL27wIoaWSeFyUDJ +XENtEDaOuyW9P4IOWI39M5KXxQZi2SI9a0s/5D7o971Sa/YPLDODtmsoQ2XjItxN5DkaMxsQL8TA ++guAQMve1pbZzK4N+Q36h7kByHzQOKQTGsNRTZvZztiPlPpAFNCQD22cvTaB/20LVz18MXau2apc +BPRpY6Xry2cOQbjFajBlCg7Rm5r2HJIK2+UitJ2ldyZevcK3rXFE2PuMyMnp5Yv91wxm4vt+lTH9 +56eRK6c8y+z1HIbWp34q/tOAJCXmtc0DHlsPpLUJoxglBR0Vs/8QrPe8k06LYiRZHWU5drFQ1bv4 +wi8YQyMTnHuDZLFTT3hqOQp/04gNtwgqRbN7OzHDvWV9U6jtJJCMC4I1toWWAltyl/R5BEvpZJbj +bbDu6eVx2NunBot4Nshs2YeifIL9Kb9V/x99ZS9i5h5t4a3L+sQ8X5dhBgmYYIoYHiCRO4G0W4Q0 +aKNZdSlMLwaOYDCP03orl6+1n3hsbzez1qzyiNTTpJQUYmwb+LYZNexX14xsD+lcjF4DD7exrrBX +OJW1hn1tKBlZL1AoahPho6H3K7PqTl8WNslju5iW14Ae4o3Xc+hQFZWrUyPU86/7CDEV/QWZ6h8D +lkDgidvpiZh9Bd1B5UcZ8cLcZmtR/CJj0Pnv85mXmf3DxMkywKCpvGxOHLxe41pUlm6wCUDSEG8w +PeFQJHREBEpYHjvnglAPnO9i5pP0h3QWNv6Y/bV2RHqzcWV9DJe0olMR+tnK5DP+k65asSENC8Rl +i4XUxDxKiD7xvpgPSr+GZicmMDOGfPuKlrtNtBF7OR2xYt5eRH0uD0c8OjvNC7DWor2W+338h731 +qDi8KGMwT4+cWg+m6IxuPP/RMdoxvCwd8HNMZy2tTCja2Keo3qZbP2GqJ+sMSdyf9zk3meiIA4SD +h6aFly4ai5mj+mDZ+OQUge2HFO4UolqI8DVR6bunZv1w5ywHfonbSPG3HuyqHbx0Ly0bs3uWBfgV +iqIGvow3niAivqSm3LIugnYTIHytL88t2IRIaVlo39GPc9l4BwlI4TETefZvuLRJHlLGwu9UdNQe +7fFoa08s5MOS+FSxNPu16reVidK7HRP/1mWPUhu7xg8ahcXeBBdoiAzp+H42ug2RPOznUohwiLSK +sTp5gVkcIZ2v5N22yC+slbnG0YXGA3EYsGfP8DIe/tPcwF4No1zKL3I2iHG6D3BJHeqfhWZr9QqO +HNIH0kutpgmT4huNQdHcJUZ5KFOEsrxfZenQp/2VF9hGToHtniG39Hr0O7QRiLMGsn2tbBszS8PZ +BHqCWwaywz9dOO3oAlfQ2i8QwZdfQdDoq61bE6O54fv60RhBbA9pzpvJLKAaHBzl9cpUwZTVwcMD +A7ltLmBd9m4AwS7NH+mtJ80ijv2cerE9lcGbNiJQ7FJE6G99I7+27UiS3lJVRmTpFLCRKfsItqqg +OUtv8Yyw07bTgyIuZrl5n4/evOGD85bMkH9BAL45tz3NOlHAjeOECA+wxNNPxfGmZNvZJ65m01Wn +DcqXwJK0lsmTdcTao0cUNr5+Yd3AxHJlMF5S1HIQn1P6G2LOTA8ck0gkZ3a8DT5ZqVTm4YICwiNQ +xNROIb3yEznuVZw/hbfcX0A1W51vR/zwBeRqu/Uozc+djmwhO9mvXWWnjIbiZ40I0A/bnV/pioUK ++bROzE6OtHcBYq/NmikOHQz/N9D4v5pTtcVP7uOQxeoedrTGBplo6euS/QpMckcUXm9lvtacplU4 +YCf/QqqEQum0C62jF9NVdVQ0oW+UZ2V0ccxRuMJFfbdvxZnPt6QIZLEW6i/4XXB6+TID9xcQqvXY +VwK+L5LZ4ASv3117hd3cfQbzHLGg6JKDvGH8YeqzdleGlUG6OBmGMJxDaNRAvrNot9DxqtNiNo2o +qd8YN8+bv2CILkUMnH+JwNGKsqSYv0YGeDvPAOVTMyCKn+K3a9C0XYo92BLwbnzpnxzhXo55UBCo +Z8yuVLzzmjVLH7T0SpedFk5evlUK4zzVYItiOdIQW8lVc0GMv9EjyK7aTc+Qn7OUqHaQgZFA6IyS +7f/OZcoyZbIVoLOhCqXL7BE90ykQgmwdKTjBzWqLFot78cMHuMeyAdFGKNijg7iD8edkVVWbsS2o +P7mup9YK48oUrmNCspTIicAAwH187RwEiLogxO8W2UAH7rvXOCh6Yq7V7BptIlGZ00Xnho7b120V +8YON9KgrW0jwCXRWqWKJUZNLUHReresm9v2rqANfh1e3NHzeCIS5FJ0yw0oVVJgrdQaZiy8ZGxPP +Q2lIYec1g9myviWTqDt6xVBuwrC2k24boeXgG3oTw3B1C+GDLjq6EmupHff0TfQb+xUS8/Y8QQ3z +6AkedsNpb8EtgoPkqEkwVcYvutTAEZjCZHLWwMBdzQQjSiMY3pa0xcd2uDXGxG3sDGcoyKJw0KdK +ti8n9SxZQzM7/DnumqWGL5TeM6yZutnf1hqE4drgtNg4yL+1Im6t5AOohHVJtw+ECku8lGlaRYg7 +N989XqKbj2szx+5++iRiyeEM5pJw2CBS6d3t1xUOjA880G8jabRC/zQuBapSzIt3Eg0+kBlocaJ1 +MBKvBcyJAy6d08AmnVUDNO3JTDqbbGBmkJanGNbOYVfBj1WCzXvwAb6W7fiWkwFiStnBgqeh3cy5 +/DWdDQ2WZagsJNQsSvRxz0xYuAyM+M3+I4wjWaM/aVoUpLms9yMRsn3Nv4Mpaubd0N3LhHwV8qiM +AXciis2jfFrmZsQ4IO1FYW9aU9VC3titsBZTdelUzxCG827E4nTXU8VgxYHT6mI51ytZlNdWK7IJ +UpLVlrsvReuuxybfOThbT34n2SkbAewVpDPkOv98VWgKoDJFHcmpoT9DIEbwkBh43e3vQpqkWmEr +Rqi4jIGJo4/tO6qDerIuzP3Dmh6xSCUvhg92gM+Z9zkN9WvdwK3xUDUeY0RT06EF9TCV+GVdPemy +beYPOK0hxUe7SgxE7c0DenDYAEiMg55n8qGbmFUwEjzJC4/IOXAVwpL7VGXCPw2dieiQyT5F/AnG +J4UqUubfHunFMm/FwULfgx+i7GkrQZxpsgrQOm1PGdgw1C7vHPv04HrQgNYPqZZYMuUViicBC/if +cRuDFIuvODSpviAWx95A2bjLEgrqMkgZQ4ElZ8QWxHn+e3RXY4hRlX33futUrOlkqG9I3TkKSIOM +Rt+IA0q0djlAnrNHvUGr+unK+rhpztDGZMHzjSE7F+EUJ2jCU0L6aH/Q+YLJX8fMkqE1GFugZX0R +vbsM3Ak8iOIQnm/81QAQbcetxbtoNXAzr78F4Un/c8La+2zmWx3kw0jMKchiVI8Gb8hv/3KzWrYs +nwQKhos5ikxjRbKktcgCafBVQQlu3qO8VYrxrs+ni73ug0NWzgIl8f5fcwuzZS/Xbx5ZYFeok0PJ +zw1HQx1ebNWLmGPz3lLOnf1y2fAG/PaNTTsJbIVJKv3kOwvQV414pud4RZx5g89qDyO1k4f9tmPa +nWFOQXMirRTCwVOWeB7NTHXEgHGCydenROgAEWL4HA3J8U4/D/ZmncNPoqf0uTVuCLJiKCBXgRI7 +nZTmeBUmUplY9AYYv885+MKUgIIq81lLrnDEgjWkYNP5G9WKo7U+aiy71vcK6rWVl5rxo5m8La9v +JieQT4gCuOjxut+IigWmvctxEOUun1dQ495KxSmgO6VShlDfC07HT9/CkeEFoe2HhTsGS1wAWu+t +gcn81WpmMBs8D/mof1cN0pgR27zyDbXQKJReirR0qr2teTEcCiWYKfMk/jqtXbJSsf8CfwudhftY +09FDoHBqMQmAYiTNgRrr4xjlHdyEI5aWxlqASpiOXU7aWtY4SEq4KfR8SIm/BAU+bzhOsU7I5sxT +debITS0HhDWlWvpRK1PHNJKuZo3ut/FPks6rJF8vGGqxFadxs1o9G7IVm/i5MHnCkqjIVuKpHQzJ +wsvYD9uRTz4F2PauWqflA0Cx1lWwuF+4NxcUFmG0tyL4tjTFLkhgA98/YPapbJ4DeVLPvpfKwuxi +nW5q3rOOoLEAc2ZHjxfLdLVHj35kvPfdkbl5+e9NqsjimW3TqkulgXd0fC0s6Jy6uYKVE8bOFneM +hx3dP8rNBUUrNi9a9wKUV281gdvtb9/HphzTmlhsq12VgnEGPWbSOX+uJmMVmulWtgkKaOsSZ7kG +fsqVlO+Fkn80hQCqay6hhus9C4PyFHlU5s9MxnZ3I7iCF0y3nLuY812spePLMHUU7YWvUxLaluKM ++rg9atfEfF7VjHko7Pk3JBLvzmcEAqDGLV8CI6/go7kKiodyjC9Wiv9yomDMRWKX9iQz+6unr7sB +c/hZYQDs7BUTa4ywbE2VVemZ/09WCRbbvqlBIPVcyrikMZpmDu0j7OdLUHmfKfCJsuDfA54ZoICg +vVDDuUStXbeLImVXJhRCN0WiouBO4YLHKX1hk24P9ZqP7Q6mnkOfl1Hu6zHZ45gUQNyxLSoPYewz +zENSKfPVytcu4zNvXG779XVtWNglGCmRs0v9vKy+ixCHGXhYMafy2jkmmqmDLe1y4CJ5MiyclcXT +6xEdx1A0cy5L3VL6ExksBuDr7qx7ClyWrALCm57e1/6C3YIU6NB9rGSW3vNSKyLhjBqiC4vdMTNQ +auMixV0yNtKANybkMJQHbQ8zl84B5gL+4cjg+dBaPPq/Ekczz5R7ZoTYKzmwsdt5/XtRCMyqToEb +Ysu8W9QbVU+iQWKVyT+EtlM1spdEJXJItaLRKqpFlGifhqd4P8NQyokGhA9zudiedd8ashkmMjUd +ihDr3ijUDQEkFXEhvCKHiNMcVdY2YH2Tv7Una3hn0tQqqZc87xhPvCwr3gUbCT/dKn0xWVl08AiC +Wumzr+UhJCxPwKwLIZhXHozP8E1UO05PyirjvgxtNC/V9i9DllVlrA+llRYfNAFGsDecVa2mAWHd +dw16uSIOg+6rRmkG6a8bCvQq6n+6Ib+YDiaFKB7YlkLjv/arDBhWJ5yKdHQfOEMi5pFB1P4/tfMs ++ore1dlNcO4/IC/mHn3N0V4bfeHzCaBgj/tmJi8xfKoMHzXa6vsFo7eniYZd6yfHVCzW8UGaScBG +IvSIwkIFoM9Zgdhww/HBNshIe/w1aXDfJvGZrZhYxNR11flw9VWdg1S/SOiFNJGtF0KSZt/Qiro8 +HWyTPtjPUjTP5Bd82oRo5FX8yNI8lnnSqHsgUnTV3/9f9m0rTS8PrIJ6g4QN1OuEiIeZPCsonM39 +vk3sPirurULLPpCsXsv4Ld5Ikuq4HJAuppkJpjIVIQlJt2j08hbpFdSjS+4bLJnqEi9uzmn8GlIt +OE/ENBZOiVqovqpNxSa8TAQuFSgAcENGzTmTgcmlQMYp1yaPRM7e+TOl4dt4hcNT+d8CYBV6MLNZ +rpBCg3STjivUfiJXNFPZk67LM2yDxH37cS58cbPwuSJGSkkFFgK8g+KZiQSnLK5brPiq4imdlFeg +7F17Wu1kzcFs1NMCYJmvELLtVoToZBHqDZ5KcTr0dt4Cz7V402+dhiVxU5V6mZnoC/Rd6Q8r8age +BRtJ5TUDHtccvK2YUKzkZTxlJ1SiKX3E8H9rAWgQvDlfYObFVLTaj8qRgQp/DXW/YndkO3t0NpYb +iXbYchQcrgDcDMI3kGX2o3BPSCVFAGFLZgaEZZCE0OOtWAEIZiQLXr+9bIdChf3e/NSNp8SpNPfQ +9pFafT1jYo3SIWkSVY1EySvC2n5XC2XbePgeFSph0jQN4/vtrGNzWx8p23IAab9PulGTchKRpiqP +ryU57TbmAqxPiYqGq7MuuqxD5VrWcuCH3Zrc95cULFpW4iJe9fc5HTdVVzlyZ8WbXjNf+4PXM6NG ++Dj7oVnT5ASNsdOr2tWxLxBI546I0rfLGf+gPOxjvSP9r9u74NFjLzzfKcPXLS2iXH17WV10vrhE +FXUm/J0FdDKElzm0YhXEU1fTqWTxUn9z4qTtjxj0f6OvobjKT2Nsurhtz0jpXhKehAuSmyKCfm+S +Zr1kN1oQrqkRQKYC7y/Jtf8ZGM5nrp12Ioxbd2zEf5LsW7f9/jKjCHDAhfG4kFVJVLa9fyu2Dv9j +YohqfB4TpVGNiQjqE0ZucW4SxvHslmOfCohF4LbS/NckWzBJDK1yH4Fbfg/kIgNSoMb3+fMiL+x/ +sMb1F27OqYuzAhaGTEqxFGyh4qXXvq+JfzKGzwBrbf277hREn1u3FCIYmdz9d5zpmyvINvu015i3 +MhL5rNkHymP78KeBSsYo81S3bptq74I0PbcPIHQjfVOCL6MKaRvKMHmaXP42EEP/2tsAZrnLPR5H +uE7Eigv7nptHrS4JzKc6y7E5dtkxE+RB3n817n/C0inmxkmQivnEyOjtXInHHbd8caO4hfQIBBc8 +obtFfcYiHmf8VDaRizaDSJWq3louKKWTR3hqO0AyNM0UI2am9OMaM/EXSEJFZyRFeA+/4czH3QKS +SHJaIN5+idY7cEzW6wwvQAfyPCEkZu9JhUW2ZXeVH9+aancBAQ2qW/OhnBd6rnTHy4UWVy7XBE3+ +htJ67KAKscKYc/7Tdv+nsct07fGFZIgpvWDFQr4efmO/pRvI5+KVNOUMQMYqi6M24jWzqmIEPAhL +uKh9UQlLHj8hznnF042AGWSVoVnVsVTfht44sZD2ysuEp2uKxrVyGTz9UAJUC/xdjM/wdcMyM94d +m9HVbjTyDqZ018ZLX3GpQIFCigzHNs5zfggaDG55qhM46DJoocE21I86/+LKgxPNwJaN9CRCD07K +GRlvPOoTy9fpPdLmvSyQM334rFF5+pHpb38LHIJ6aMD93LZXJntGYO0nRsSlW5WH6Htd87J8kS0w +lItKuB+PVatg7mdo79VoDLelcJpq/MdpkSsWb3XTOTufLgzpZxA+khGPFAHm/lqzcLBANa6GOfcP +2psco+ekpQMv/3OKlZGvUVPuOcGkN9rRcOcYox0x9If/mz8kV88jiJssgXZ6foHq/Qu9sIYIBaD9 +qbghGYYPA5hemoZGWwDUmWQuTypx4UfUEub9EDWKSd+b44o1KveHskPdPGSJ7wlLIqGbGcDE9v1a +ZmPtMcNMcYqRMxmcjSry2Hz8NEgrDwPvA3pmWr4/ZlbSngUjoth5DUrt3xNpLkQI1Xk77XAcIpBU +sRiUG2maFg/2p19wA6jsNNrJBido+o5AubaBU3mLTW11+a5tOUDRx8CfE4WRAFu/AF/5LStrrV0k +xmWcokT4u9PFRFmYhsvy0TqBU4bFOOSH0qCmiii+klgNNPP5wp1g2p0ZN2XT/w2hK/xMZ25v5Fg2 +StPzAhq9XHwNRqTrt9EvnuxT3ZfDba2wPRP44il8Lh1BfRNGbDyCo/w3G3SL53BeV7YBJ0DWFgrN +mzGc5n5rK+vVpTNp8JIkzP/dQSMXJgNf+zYVoS6T34xi+KnifGkV7LxbUi/RyNQ0QAvCHHF1LPj4 +2azqWuLNu8KGkiVCgA4PVJ/wRo/sZk259k3WjkQUNM4FXbB8unFifyjNlQGBkco4MiqJX8IqxsNr +lwfGskZEPJGPdtZPyjYwPuHJZiSmNhN5hNVUjWpLw633rc1Rx82Qye+Ler72SW/5meLELxCJEqVk +sYyQMThP4yay4BaBaKkyu3ju1Al6rmIkTM2ZpLdiaVmlrZ3YPv8qSIulfy2SCSWoDzKPQbT0IJYJ +NDf2pzUsNfRjX3i0PrmeqhjKvOqx4WFqoznesQqEmD5SJiG4Q/V/YdtdPM4T8QFgE2wYnIO0a5cP +jtDAEIXTQdbdzcHyIwSx+KvQYrp++N5gB5lrUxtyd0VyfrjVL12MyfzmeJuNV2GXIwfa+qtd/REh +eQOqpxjXyfkmgVNa8Aa49pvmlrPA+nGhvat4uy4JKZQdfSxCQrrnG4GijQQPWzHH7hLedsEAUD4s +nAJU5rWo9eP3gSoNmPWwZUe/9Q2bBpsFuWXCvfIZ+XEXT5XCsT30tMHgRwaPi1jIgZpoefAATAHv +5IhERqA7grOWPDUQks3z19LMildS3GHurVPooiRUhRD4jDW/57mZ7qHWDu3ed2ZSpjhGXWuD6NQ5 +X5k+tUvFwML+nlS+QLrOWKaPGphF7zXVRJU6IvF0zGnNfBEs/ZtSECYGRiudAKu0/3MENxPNXYpH +uKp82K8KDocj08EYOJ+BHiVWbSrwa90vqqAVxf2966HrAu7bo+ekeptIUP7Uy8AmIQsQm+WKQrb5 +KvvsF4r00yaJQaQu+Vos++XUf3Fu2ekl48Yd3Hru9fImrRkEu3MIvE6ld1Rszr0+V2PYcyPYlpOb +MGhfI0loPa1BV8ZwGksiik67zN7vZVb1EbqhK4xEds8bJPShPPYgCLrsZlAHEzxJ5StbxqM8zObI +t1ey0r7kbGj/VAHn+iTFmORSCn40eeQS6Y6hHn2LLM8j1wItWR/pQAQD0dHnHC1dqgmc/+ebDRlE +0MkOanK3/M8xTlHlqDTfe4Qf6c1bYlKIvHLkxEdSZztbh52P4WN75+slwYutaSwC8l0+kD7i1z1z ++MmHT9fNNQAFjtI+GSeEhwNAuLGCtVhPmG6nWFxbph8TQRG0y8TDxbyEOUSBQGPhBLpMz3ve2G07 +VYTOull3pazWgMbccbHgvTA7nFeiH44zxbKReHIuqbNd597zIcoRT0BDVdZkROaCYeTBuIgw1eWF +G3h5XYhKTQQme6/p0D37f2k7SsfhddZ0NOzU0juQYb1fFu4FwgoO07yd9tmC6D5yln+82Y5wsVe0 +oNoTolo7FEKkURhT63TRxAoO4nwOYqdY6Lu2bYZigCmRWhRa4sqDtLQVDnrSsCWBT0VyDkxpeANj +QfTgLlAcIOUQyWOeGs0EeNW8nnhUZG3uf+57qTyc1xgnIPf5Pozojzb4/UD58eOgL3UXTPtxdM8v +2VlC/DfenA44OB2WS4w2ezZBt/bTLPGE4LOk2knfErLJ3FbAdCygWM92Yj+fV8o7gBtSvfkkW4LG +Tb6e3C+Rq9utBZUciC77NXykWes8AcVdT8g6jUYEbCgX8qEw8jJyxAYAgZMCe4wXeO4egl32r3ie +x2OiR4d8bZ3z+Tf2eWY/JgPEvtKEG6ePIMUtekaBwLTTisahvbj4SP5S0mBLChr0w+LJX3asDWf+ +8Vw/ryOhMY8DV3S1uGOqtyxgTUtNwVQ+XjN3NHuEBfoDHd6dEAEouinQdfWZ8l1igwduuv2uTaza +6bJBL6kDzazQuQkXe10BSbwfgY47amyL/+LbtoHUDNjJUAo9SUeltjCJ/FUTIN47oYEl0LX9+T/7 +ojO/rA4ZMWcVw1dfJat9oHTDqEqgQItecqF4tckGgP2OsfErbqJR/ii/OGUxkDTYpERwO+YH5hB9 +s+B40WAKwq3BozN5D8jKMtw7AV3HFuJigHvDdO0e6JIjQnYK/87DeoIgdfk26I1RNnfKP2c/bBqF +Z73QLDmdKDp2pSz50aTVEi46EJ8g1Dg1yqUadAt/n4OVB7ZzMgebA9iQLCB6eRSPhXk8o2X8vn62 +Sbk3FeBMSmoKSSdjjA+oedHed2Ok6tdLk0mu9TDVR8GLLNCZMwweP7IIPRx4l4SgqJWwJ4HR4EWX +FUX2RAn8ZDIGw68va7NFoWouEmj4hcnf87Ya5YskFCKHlCAvxNUdsEg5D9KaEBmOCocmCSSRyHk1 +3bwSMPN1qeGaWRCsYXnrPiiVegCnn0mK3qQsX250CBs2jDR0ejlEJwosiOrSPZUr/W9qSPkGy5pp +nsauwd9m3JoWCEkFpN8Nw3FTnZ9WYjJo7MUZjbvU7D/BCIkGmTlmlXomZFjwIpZlJO/gzKgNz4dS +LsqPgS5PMgHSew6aMwho6p2p/zMNewre610D+FBkfSUzJdZjo/VpLRpDYQuMTrloF4UDoTRB6zgy +odPg7BUXO+LIeWCXRal3qqWeBNjvMLsSrkSVMm3xCg0OS9SNyd1kOhguIR80SDFjezeSFJNGCicF +duZLdb5FMwHM1f/ECFK8+VmYGePnh2V+plOgi1X/JDoi8BuyzdilYl1Fl/ZJOeSzl5e6pmNVU9hd +tO4g0qsIYwDGx3L6NLUf9kHkQcmq4+JN1gdXdeWbfSaxBXuGC1GI4frvdwojSrDyWnUcZXyBSCpO +vkirDSuTk0inUJFTK4tLmfQ9sXp0OLQMVEYviziA+s8nf0Ql07yHvOZJIvImXfieWmRuMLufetCW +yAAOX8x8R7FL0LEc4L5znCENqVxMetKOI35pfZvsVGgATJ/AEOAdDOE5lEzVGM4Ln6V19YKo+J/c +YZHayi+rEMzHl0QRzYCjy7hKEh95Q9HkIQKppDtdDBqIL4CqwcFVLICIk3pOLFN7J0i8RDiUY8Zk +dAaQWaAw8bAAcljrPC/oBjduzeDFb976pIGzUZyanTJPxETmPejXICqNitb8PJhMzPuaa/jxvUNb +NcqhiW3FCau1MNB576Rcz3HE7YipRaadDAvfUaAfUwYf+h16nrGkkgakv2uEpaFEFBdcnFAYyjOI +CI0usdXuSWLgNtq2pTjDdBgE2FfLJVcynfJdvHywVD0e7V0hImEkDIWK5zTlg/INQaVWyNqt8L+K +wX+qzE8Q2tugGFgNMf6Clii8DBC+0WSHkCiva6sobx6afRU4woMxP334uB0PSdJe0c73RULAqDQY +8PY9Ku3NrDDq2/J3B5fQaCkfH9gUeTNpMMbFoCmcjquKZnUtQJ9hh+qfVe6pniTsZACDzZ411GfJ +cR+fz9kOZ/R1c26cLeYr2IQTmXg6v+KKcsKo5sF+1SjP9OK/+n9KgAjFAC2HaT5wwa9sTMgMG6HM +Voj1JqbsT+2ooSLTzwSQpwU/JcdIu28EQYyVUlDkbedw7WE/k+FliQ48ktEBBTLXJNvPmK9lxoUw +BlpbouqM4xhjipWiEyP3R29qQiqrvzFnjZZmQsMo0Rc/NdCD3uWyOrdEbZauJJRcY3EQ3y9fR9FL +rtY7FREHXg2/KnikTgTFBN+xW1R0U5Q7vEVnTVvhfjDghAHNgnrWEzX10lHsFAyl4n6FkHWMdLiA +hUm9epyJZm0ZDreC4c4B7JrluL1N7fUomm3V96NvFZCF8bFPT18aDQuhtcWeqGnMnDoueyjk8qVk +ACF92A9Kdwsx6Rcc+Jx7OHjnMNiMScm89GdFbovqdIu1mabcyLgl8SenflZDQGzvA6NqCGjQpf9C +mno2aOaiWupIlwdA+iokWchcxfHpUUnA12ubGoMiHGbYf2i8ppttxuF8oqpMAwuMc7UYERIVWQb7 +slFKSP6bd1h0TgqZNzBEmxQtcyAfvhP0rcu5QJWVK/Yov/bEZbq7QiTWcHY3pufdyWfATVSqw8Pc +Tx6WcnxcPXTJ3PZvEdaJ2eRMQjKC+HXS1tnlcYyVSMRb+lype9aOX2jPIUdT3jbsi/6O9FFnVonD +HA/YDiIWCnveFQw+e1or2d5EcUUiaLmMvY/vllTrvtBcgRCfxHPVdyOz7ChjtdS7i+2D2vYl8NUi +pyTclKmjsA3zE85IPNBDz95AgMXFWaxZ9bO+P699e2VxhJ55UcnaBnjNmSuvgTvsHS9ESiXLarbI +lLR6g0UvDlpBTXKFlTqQjW4sRoGaLK1CPcFWR57P9CR90bXozJGScwHN95bT7ivuIJAun6bPo4jz +gDskGkKqp2A46JbucHPbalw9kGXOwz9CBz92IBbNDwBZRYt9qYKBMtMrElN13l16k8YNKD1eGr7A +8VyW3XVRDLEYeVEaEwtVTcjArxJ4xkC9EshMqRXAKKFZJ0oweqS8HdtMx/fwexZpNd5fb88xkoeB +exrcjz1gqVhqtT4BYLGafmxYyhFtm0FWk/YM/5m9hMdRjYkLI3bKwqgVgPEjoy/q0K1EKeHZ+qJS +s35XA7PikSgzxhLf6z4YyOnIT9qyV18xMd1Ds8550MjEwcFaA3bIS4ApxgidsVoMSC7d7LR4RpI4 +IEjke30JPhPys0Zt0INBdESEWK1D5aWfA//v0dbLT1MmGu71jf6rePK29Sm0ggn3SkjKwFhPf6dR +epp72Wog8NIZwcwrswwQIsGo6LAS0Prejp8lHuP83g3d53JzQEONytGX3UQLZY2om/Rp29CyYaiv +mb6R09PNTdXQ/ZYkOikcZIvUDYHNp6ak+joena3cTaJOyi66qQCKMZHfchuIDRjzCaR1nghyT0EU +/v4gXHoqpyLPkgyj6cU8YyBbvHvffftOelOwGbWWD3VrApvVCgv0r0MSI5wPxMZyQH3IB30U1ySh +GYh1C7ZVHELBiJG7tYC41XfdeoobBOAYpENHoRmAjfGqwZ/pg9JF3oDexkZTrIH+SOWiclG9xBsn +yTJltUdfFQoUYHNraks5A7VM3/At80ql3F3mkdTBHh3sB1G3QPo5nxNq+mfa06HBVJURV5Kr4biA +OawG5CY/3QlEiADdJFaW8ceK366dWD1/Php+NwS54jpz37saj4r0VRWvDi456vdnpQ9ckvOoM39n +lVtHTWvljx7QIzdGGQaFMiMxfkay8C+B2fWuy+P9Kkc+THPtDvBepSrnYy3vHlYhl74PWstorlmW +OcbMdR9loUdD98wZdYVhhHqQb2kIq28Sr9VsNhqDhR4HCN3oVwJso98DeWEe9GHN4MvoH2QZFe2G +Es6nsFUY3/iQKjjf6nmuYvsW2TbHk/vXZ1OJcZ+whFGoSH4ci8idB5IfW+m0KWsLQ7LaNT7GdaBZ +gHlLC0w/CitJVdw3y06DKJSptI4IMK821feJy1Kc92HF2CnZmi0C00PXdOxHZPnR1Cb6MyyKBs/J +Ucp26iI+Mj/5wp+yYScp+PoX4aId5tC1zNjvfBpVR2GVQCQweBD/2dfWntRL5C16G/e1rzpWZ0+A +ibeY/1hxfNQYzD9KNmdorUUn8FpSNR49c4KVkguuw2Luy7HMl5gGWP6jptvjeZlOR9JrwJ1AuH3Q +q8YYY12e5G79OzH60RwYcsr5Bcbi0pu7abS0Ho36POBhkeonJP7St1vzcmcjGV0K6RrFBwUKc9PQ +e9HHRCg2uIepzo4sjWxOVlbKNrx5Ik5anFRJjT8TBb6kpH2PuNYBVarqasFB2TnClVQmVqSDO+zz +L7sX2sOKxtC1F6AO3KHux7Tirbnm+HIO0MpzqAklpIgT+NGzX0F7G5peMJM8yq+nwZrUwDtLJLz3 +4n28nN1+NayaGraNYZI3T7LlNgnTmXr6w5Y25wDN9oVbnIoX3Ljn+mvtVB8ExdbnYXjD5cSJA2q2 +4mlk92w0Z9Y6JIrdNjgr26IIR/nANjAQINO9ul3pzozcrId0dDGGV+xtvrGIkFErVG40JPmDRChO +e/Jf56k6wog5u41w6gQiHv6pH1bCG11dhLjql4FodmvwTTopkNDT/9/yyJ/XLeFfeNz1ldKCTNIO +g6654UazeWfqgmEqSfsC/R6/JBfiRgrfjgBh5NCMWxKMhunkbQNQyP1AWu5zx5SgqfIMEBFQwhQH +UzyFQtQc1/c6319gdTxfICOJ5HOHzFgypVpFeKvWGiG3+b3cLzEJJHT6GrYGvktzbWo1v4JFZsgB +jh2H7SRSVmoI0Gq1POxWKipYDSp6Ia+4e1RbjbW+WSZD6UPp3ola8z08xtDb4jQ1MHg3V50dw2P9 +JZckV+vcDSfeBN6mQOYTy5IVVp+o4BwoCdslq1ramev3cNdeF9G0zyxAM1OEfGM8/rH/Sv2dFUn0 +9s5JQzf1cY5J1461oZ7ZmXFyqONlcB9duEstb24EKRzGWkL38GBae+EKF9M5pCi9CmASvifZ6CGB +Lu6dRi2woaXdAAsIks3blt3C/+EGwBKVMFXY35ZsHtfQ/+0ADnoV/iEiNkgJjqSosgR3OUdfW2Um +BBxiTwO/EgQzKkORXDNIH+oZkEpbSS1cHcIxyjYVAAvaLOv3CoJMxiaYD4M8DdJl6qSegEjzruJC +r4zS3dSVilgM+pMfGyDtVW/mknB0UCqb9ta+fuewSn1FCRdzpz5UJ3ZHCFPjlXUbn5BHN+z/us0r +dLmFsidb+PQ77XC2+I/qzefw1ZxE4TRH4i9qelhKs309r18J/Q6ZzPyOzAHUSCmdrywR0S8OHjxP +E+IAeMYh9ZtaTki7GHjfBwQ8+2qMxvFjRazpTgBQBXOjpnCgl3Zz1pD6U/EZVZemRV9SfSwDyDKI +HdlpXKraH11Z+QUfCp2QEjVQ+Ib+dlm7n+Dh9xJjXMJIsvwuk+X3N2Af6IfCft+ZBVxn7+i3d+Pc +MZ19NIKERmunQMZxoinO1ElqfstaPLsbdHl1T9yvH9EwRpHB6j3iCSVrtWWJ+EFqBYV6CbNwDcx9 +jAcXrQ8XoNN2gCoOkNPGrIK3y7VJ5L0FQIpAKMWeEUzfTbMW6EE9UIp9xAddDzhS+2Yqw1eB+2zj +EsMxajSUm2ICEy9ir77BJ+bc4o43e0fFf9bLvKisj/SrjKz6M7XIcqFAeyx6NzYMqnU7tayu1JK4 +AgxYlGb+aIRZtDgKTX7JmlyY5uMj4uKzAVGDnSgjY27Q+cSN97kmP+dKdnyxCc4Tjl+cdIyi47Se +njKaiqdZjWQXFQ7CYijU1uNeTuclKZ9lcnY4TFjsDoPTvHzSKYaYp20sBaPuGIiOMKfGxKkVEqbG +s3hNvVuM1HOy00fQiRFr3me5b9CID5rZde7VmL8L1HgB0Mf2k5CJYuaZ26gNn47Xx6XvhOouxuNd +KVFrQoIVUfmN8o33CSMjw3d215DIPSZzXNG53ggPZ4yGA8Qg8KQAAAqjXN4Jdp4PMvQEYJ3jRsx4 +FbBE5XYt+ihqmVRC/V5hK5HrpAyR7QtQhQqzHdzRRBzXLwrs9OzvZ5dWLgf6A8YtDIkGcYioTARO +f+z9O/miT4ZVlrQtp+mPwywlzT74t9B5p+Z86PjoYpGHB2p25VdU+HNECHU6b5Q07Ad+G3YyNp02 +Dpeo0XZvi38NrPKQaF7RoXr7HTmsB38GeqzggPJlgwOJmI7fwPGo2yyIFawzRtodSN0Ard/OOZBt +nlk5VJTRPpnEYbBNZcjs72FBwE8XCvENMFIIw2Nc3GUlLDCHeImcl43oUTyvK4hgee83BoCx4YlX +LlJR/Yus9hjLmLOOPLoYhWlrCpdTN711zNIZKM5QIT0D0vk5CUe1S/XPoc//XE1/5WxgpJ+kjtjl +p2QHH6lVRbb057itAyXu4wZBxROAHYsp+tdJAGeNyx17e1a5+IC7l8i7rJJ2LsIxwb/3nwYnjfHV +DgrF/X6AIMeDCMY/1sXJTkZS39vHhDFlrjhQ+ciWiTC8HH790+C5qr2ExT0rGicjWs/tTmvKDMIl +HSww1/V9N8dYCPH6TcMo9q+0mlU89awLffXEhjcF9i/gHs3SsOBIo74LLZkJdzM+owNiUvWpgK7V +ltodigBDGh4EQE11jdF/FH8RFA8bew/OhZxnRs35lmmOtsCMLhPV0ErWfJxgouvzmh/aVSAOPetf +DdOb9GAkwq2zRk12/6eggAJUA08KFfC2EaPH8VBUbjMk6RdnVgUPZbemQIaE6PqBzZk/1vpI7ixK +7KnhZgZFfPJCC2eNLwTfUcUf1QOtnY/jQsJ/YrOpMqCOu67wGCXmSKymmBVmZzXa++pqgciA1cfq +VocVoc3HjNeJLOC4dSVOBN0mrl4rzDL0vpdGEOMETQpRpVbUxf6p0RrU2GSubv9uUVJw2bCljZ3c +k/DFoAVJJdJo4L7H/wgsrGgPjZQOM97UNR+psZipM87dCkCymbUJIHiTagKmm+Tldb9mRBllhAaz +/zZ2Xe6givJ9mL+3vmA+AEocfMdSIkwIhN+mSypHWTR2oZs7Cf0FeyWR7ote0Bx55lBxoDSBPbvO +Rfx1DG09SpvkY0Nj8QUDQWPJELuwLP3TqT/XRabGOnIXv4+tuApFpmYKfgeCQB1nNnsn3bVdzpgM +9vwTzgGfWDXa/bJtLj+YXQWDpn+qZxSqaWBGzEJtK3NAo7COg1KgsxDQPNwIkkm5zsygVGpKMFBJ +6uIuK4jlAYtc9jqW458awwLIf/OPb4OTVJX5YPFgf/clj6/ybdh97Hfr2yTpgFxx5fzdBFwwa0EV +rY1Tu07RRHE2lRKY0CBwBNwd2HSLL+UVE1XmGiJUmtPjN7aZqhmtJefu5KWkiKlBEJN49U0sBUhN +qIeQvuKTZPEh3RILLyl87RfS1iqL1aLB+h4sUULel70mjF+XutMo/9m+bypPtxdgwLpU/JSU+pCD +4t9HrhPADvssr3QM5t+ht1NHRCSFL0mx+g5HhzXTek1JYDKAsA9qvDhPp5SEpUbedXx9LM6bZ66l +BX03DxibSLOR6tfohjdx8qByJRuPo/dS9vA/4G1+l8gt+ljUsilgTm/oe1qeE7E+FWnTPOsI98kt +yNh3epppJIGHbmEIC864NDptz1PwMPuHoNA1tjJ8rDaag9PQsXR3UJcRhbZFTW0Ny1pW18avfgns +xpoq6AVxOJ3RoQ0/Q7kyopRqxrhhX7ZfjzthSX51z8OKYM0ans4L2Yr2Vkhcc2IdVAqaycJt6WG8 +Y9Qjy2P2WQyUZ3u4dzC00SnMqdKQ6A2lYzu6qvrR1ICpwfGeZaOmbuqW3DquEhT4qkyYVG8xiY3U +m7Rn/vr1OfZvgXtneYcpeZEhMnETYu7CxQFEJsUoI8jSvXb7D6STppKMTBQmss73uuJ95w7zTNr2 +DrhtPfcXl4tSzjD1ZuoVDbHITCqoezYSoY4l0NiB+adboJw8GNbj1LuChEFz/phY9D/zHxd+JYYb +nPM4/D0FQ/LoREVu/kVzsLtZUiM+akByBzki0emPz/zs1mNUZCKzL22KJRAQOhpBoS+n9k96w2eN +e/cKqgK8vaV4zGRHhVFNz9yIIhinRK5mVU4V5bptzsjGR39BzcmDOz5Uuwe550fxkFV7zUWaROnv +073MHloeBjN2GTifoNvlNvmctz0CwN4xj9ef36P9OwMHuOJWFVYy6iub9X3pldjjCK+bbBZ3xi7O +4liVuKYE66x8C3YuKYtNtuXUDohs3XSQF4xXULm8CvwD1RQdReRklJW4kvf4oVifZwazQaAHZAll +5DE8OPK1jefmWrTjW2FUMUcYh6h5vJX+y4e/PQgORHiiS1SmCpFk7+PnFzasUdSgqow+WDNfyTYl +B9XwQfvOV9jLMLccQ8Sy7g+A8fZdzXwde24RUbieeSdv8UF3/DW7qnDdqVKrnYTzT7Ihg/zJEwKP +jN3wt6MGr1pgx94XqTnTrQAG4OJm4r07KwlxHrjFWGlDBEqJGL5emXWIMyXCihKr1yXry8eQKQg+ +luNEfe524UVlJcIU/HC8A+HYZ6xEqEfuBVdIhOuuyp2Q1p0bEI4Y2NFtXvoN6USC3PCkimIj2Bl5 +z5Z+lm2NjhrjY4KM/As9daZ3aMk8S0ocX2PqPgtxWjTpqRwipQnbVg/ZL65RIEdGVo00RNqXP6f2 +FKCA/ZF/31OerYUeDFiEz+aEp6Yd3tDz01/tEwT6UqgEI0TbbVzKNBUd4cDoyxjZV4voyPiPTYw0 +KrJxQLJgZhvrBuffBmzJ1ESBbX2d6cxOZ2jPSHsQylsYEFirmHgl1FEBuj80s4ftJIH9bfSn/HUd +9oweoKpqPdJ/5ecjkRLKbsY0HZuS06eR+WBA81XY2VzWCIfvzzaGRCJcrTu3K9D1HttDu1kewAdx +YPo0x7VPbKcBXfgIZc6xObgEUxvo5/BsxUxsOPP9ACqEhTH8rovRLf9W/hodOb4c4e2R4YCM3IZ7 +uJ7Y/IkLEfVaWY94fsiIDTqTZ5WytnlDvjdlGfaDtbjcE/i1KfH/PhJkiqj9yPufo9GUBxQftk5S +mVIbTlI0tVVA0wDuceXdjtxDca8fYF2prTMCaDRtjUC0QFVxomUmSGhqNeijkZ9NGcVDAHYRinQS +sAitEQ+Ph/W3LhUoM5oAMFR6MZqepI+nX9Oa8T1CRHenP/K/uquyfKyvNDKhKpH2FDiTrKrk7+fY +FWea2lc4V9zcy5CtPqT/CXpJ6YK4PFmSWhePez8Em4R1oJ5vYN57oziy57hkjZgyj0SYoXrsFiWH ++zayYR5FXbVtoWiO3EYQxUaOVJz/8F8DOsxH2x8wSHMzVqlKAWTgohycKv0WRxHUjWcUg6v69nb7 +B8ESkRRnHDXlbatGwxEC+lHJdnqLTA2FzTJGGd73GilIacN6hMEIDON1F0mywoFrnzLGj93nOPmx +O9Ysn2L1/197mHceoNDgrADcHZcvRGnUbUlYIV/Ws9/XYVzS3sb7yP7x49tSCEeMQxzh/FOStOab +stQyai3+NfywChazFOUEPS+NB+1SfwkirHN5v95Ss6jsLDDJlYZLI30l5M9TrdRU7AZdN4eR926v +YIYkGgZCLSk4oDKi4rxB9pjQsSp6ROI5hcrWq6kb9yPJXMbnDsTRDKpUGx5LW+TWiAds8ocziyXx +GkAEayDXaaXV8RDffYXuzaXv1vAR7s9fcWRbXZxNDVOHLwafXcoBSrlgos+09BVTGvE8AHcrfE7Q +GCvALCMlR5BYPzev21voYc2aHACuzcHUpdkbkaL+Q9TKm2v8ffUkJ46+Tzhe+5z3F/vPB5mCYTx2 +VKdVMP+6oKCKDBtbUuQblEnuesKYGK+tyUaQUYSb1GCwFEs1diFjfBpzjX4j9HqUrFVjJcj+lPE5 +WMOUk090TWPaTlOronSRGvGJoJg2vh+c9JeTrg+M+9961gcjwOYhWBUTU/RasYonWb+rDTV7ISlU +28tR5xp6UvO0i6ta9IoXCwm7v2agdUB2tkgw/PlUhmwJHWXdY0gRfiqO8b2BIX9be3ribUUo0rFX +xf+u3JLvm5KD6n4LdSaYqXfeKt/vhCAeG95KkWchOECCdNrvUPRTej4X2FCCzvV/6jUtC+RMg/I0 +lq703pzHwVfHNBL+pqxci/8wQC/ck6LhEXK99pcgLyh+lsgFvE99d8m+aqPtOwJi1mhe3xYAY85l +jdt4igD+u//1WrKo8ASPAiO492eCbAIe15tjTZja3dCVnbTGcd7/5cOlOhSNSPntkdneA9C69/Zl +2l+PI9ZK10pjxAKQEMb+P1wuIow1bLsFnusEJjTqHWJZpYzLoIE1BT3IgTchHUuqsD/y9dha9ABd ++fVH/IxlFLXcKoBghopt7zNrJQseD2WUMryrFCreGQV/IVtedfJdyeRi0uMzXHKTSedrUjgbpuHs +oiB78UWshbo/bX2MtU40AkW4DsGPechIadAQppujxyRjFQkQVIT9Tkr8VtD7nOkeC+wD7s5vzF90 +jhMWTyPtyXPgZTLXZaXBw+N5TurJ+VQ9lOcG/Yshsg1L8Wnwnyiy6kl1h22rPoe2oM0NEtHQJ9A2 +a7A4qA/zeUYxRQeLv7zPr3PfHf2ZOrLEWY8EXrG8NqehE/NzQXh/j8VZdvGOYtmoecI7H09x6QhA +CdZciQXxmPgw1/2J6RvtkJyDCfbtItJ7CSCz6+kzRAv16U2jUOQWejYtwfk+a+vvLdpEw4l1vfUH +RcQSEEDJz1NqbrzY/qXStej++DI2V0mYsS+S707l5TwbmDxIQkuR14Fbs5UJ8HnZheZ/kJKd/Sjk +VXISfsFOKAcb/tMTqI3N2/bj5r/WUdC0lF+GirsikP5HOOADKIf8FEwNfsCbTGpGNhFkn14/Y5xj +YBu1UnLsFKnx82Be+WNhHhNKs/oUI1RIJbjINS1cs+RtEGvtga/W3ThiadgwXod5CDhAkEltiLQP +y4/TarZ/K1feZ918zeu31z53f/jDJhhJUMY/Ce/A9+nn30gOjS2CdVvWQJKLBRTyPC4rJwiQv9nU +TFT6LtVhngQzia8K5AG5eqoQtVCMFcq+2KZNptvmo+Dx4Yl/5Zeg3XDtVJ2YcmhsvoUS0TDjYASE +b8v7yhwFdJGyWCVyZ7Vup6Iee59neLFQnm4AUx8OiZnUvla6UPFBxc/PCsDSusxUGeozHT9u597r +mSw3ukrW5c7c3q34UYiwcTAIAROBPU0DFTz3cKW32mSpvvKOBFxiuen/V9vhQ8xswuFWAg3JLaCG +ttAsPu5vdFClivxfb13BQtVKLlTPKxIPDhEXp77kHn4eg5tmDdaVhP44qHmiuUy6jmAPjNtUFEBd +NAZrGzvJAQZ42lQ6L7FdTaMPd5StWN3tBrbTp4YlLw1I2Ob/9q7bi69DdLi5XV2XMZkM2fXQxhLS +IHwmPDNxPheAp7kuVUuLK1Xpx434aSMzNUMbxZ7rkG3BeWBTGlSpFv+0VKdAwWIxiEmISjggV0PU +TH4b5N3ePyj7ErUA1GTTDOpugr8/183kKGEdVaCJHSU8r0YPVl7hoz2AxibVJPHufLt9BKB2F6Uc +/LnA6XD+F8N7/meL8Q9g2x3DlXfER6WlSz1uQ5FIReZBn8oBw9CemYuqchvx96RRIrH8jRcbSQQ/ +nuwZOvLfQDgDexPNCtGUTYERDlHNLe9FXyQdXkdI+znPAZCYAjLNQL0WAl1WvaPFmp8rS51Pzqk4 +BRXb0ioAFRm5GRihAZ/Oqn2MnA5syeBqArCic9k+dyI6W7fJMAz0CtoobOnBePFcmOcJnDh+VbKO +/WwkbRS6wD3gzlcYd7INKPjwRffjUR5BRGluHVsU/VZUAsxSJB3qmKAWhVdAPk2c6CQXgheyaWqz +Np+kkiJ3AtUhNhUcGCoSezUB6lqV2JsZQC+E7n2dOa4Tq3TNBDUQClwgAO5MHzP3O2VjtwHpsDA1 +HN6aiEjpoFPTgg37SObPpXYPL9QO2+m0kmNFBp8Bjvu3JIpR3186IvJ3kViFKCzWYy3Iy5fsWssp +wfEkHsOksqhKG7FKdayBCNAzrqUNT4MSSSoocYHvh4gnDUcFMh8/bNqp68xktm2RcqhePp9bHfLh +0RwmWsUyb0GtyEKKBbt9rfG/xoXvtNWkX0t96RRqOpSpxeI4lq6hs6BQwaA8XfNTIY7ApK8M14ux +eO8TqjWX6pmKBxOpnp0hmbuZA6ssKE6/Yr10xV1WqkK3T51d81j3M+1eFQ/R3N+IYP9FvHJ+Tsco +F43z5n4LDof4xSapv00bmwkK86IspPihnk/lvukM4BYHmIndoVq3c87K56y+SXLrAS+3mtBiItbF +LpB64opNz0wjLKisGMGQELvqBFB46t0lfAYjjWI0I2P2+pwTW+F73JV497Pf44gm1ytukG28eqoZ +ZpZH/wzVpdPsBSc3sEh9PaDKttzLKp9SlgDre/uarMj8kc6pRQWI2Kwj+SpJngp88q6NngJ+ubcp +tiazGVzvhNEvkr2Hvqrwe5hzfQCHWeWnGc+8ovWzafjZaCfDP9x02TOP+Z08xm2NsDAuqCLGEaf/ +qFDALJhwBJoB82W5h7Nj4eu4I5UKWKEN3KGDPdvfmaVN5JnNV5/smBlMTdcXPcVCpl7i909SwYib +SB4P5DYst5UDQdB5KA388IT3rsr4anm6hvwHuv7YLmll5Ldaj5etTBG33+TrQF/pvT8Uu9FwXbpz +IqU4XyI/Luz2ESYpzzGQ4cuSBf6E/CO37EALa81CLfnv+b02vmnqT2ohXs3OE7lO2rW+TIZDRpop +287aEx0DnJom4JHzZ/zyxfpxoA1SwFH48cU6T366t2ZT+nWEZSmMPehDC15ENnY3jjOeOkx+xuZf ++s9Rbq41rUcAZtT2/Enu6+5TajN8RmkLkO3cFmuNVaYUuStep7TZu4SSe8L9+XF7i4mvMpRa0d0s +S3RKcM5z66oEYa7jzVA/E6Ju5VWP9Wq1MRVlxUrfOqd3WPpq2cb4zwT1DNd66tb2NZS0G+XBoDkw +MOezhpjFpunjh6WrVexzC6V/LCpOOh2gpxzjHhRpAsBzEJHGweBXoPo85rAfgyibVpNk+EhMZUog +TUOfqxYdsMTF7MpJFOS264BOy1BWVBBthQCUObyU7aSEzsx949aZutQOsruv3JTRLJdUNFRn6d+I +KGwBy6YOPczHBvNxKKk8gkk+LicJxulGoEWiReTc9MkhsimesogdzXaTRxi+h+kZjzpFBMrQ5wK4 +kiHI6ergFnL5auRxdYInNbZ3+rzd2SxvFy/iczz2Hc14apD8hd0daFd+Gw0IqHWqtxkocABedYTv +kTf3+nSo6ix+ptNRiAAlXV8GOQsyH/jKlHjD8BaMjYeN8G8dFjFHzTbBJ7xrf83H8EfBY15PQ4/X +x+wztdEczP6qo0FyP/Ucp/222fN/L6WoO3kYhY+yZh8/7DlSFYK87v1V5jMqpjpvRXJYiw0hEk7T +A9vbj6wgj9hRLJl2nLntLn3pVnXUTw5MMs5kCWxtL9VuS/e6a1MYiu2Q/1umLKfB94wgJwl+zpkP +ZJGDwEWIfBCBL3rpji3xXEg/QRxA/JBGKZRt6v1pqE8hLw01AfsZxerfERLgNmeM1tF0z55fsajY +zvtRuHDcsmtZyuRQyyJjY4vqAZLPbumyCj8tZyw+tmAtbCwiUKKRmYDyi6n1h0suvP7HMtn3Arwk +SfmXnhcBTP6YX3XqKRYqThzLr/JTtXpIaWQbMtf2SxpgoXhZFwLTYWEPpBZiSNC60tik91+YWXEc ++HVHn7ZlrU1vyTpG5vsKk9wyTBx0vDWgLUEgN/s0ZQGut+x+jdWdfLJdqVAFSz6fS146CPM4k1UW +HUC5doPKcjYhSP+fBkELK4KxN3JMFBRXhEjJXYqZu/59udysjWZyw1aLAcN88eUX19sSL+t9S7Su +MV4j7mrMstKBAS5ijfwezq5Ko6gjyn5juVIlz+TVwt78ARRGKiCGWaHyUO1+DNqTPT85SBM6Fsmf +BuI50gjkwA2W/tx2x7CCu4GpDSnvc8XNtaXhn8MUwPcZ0nWz0WPomkqQN3xgHHyLBCTMNhIWoME3 +m4uZt02tFbqgeva2/5Uw2d+9hqilkPpv68IcOs8K2H8sEM347Tf87ZtkWmhyzv54pfWHewvFggHQ +htvn0Vy11hskmfXWPoJewUvwecy4w7oUvt9IijCQuUVBkN9G/QOd3UPzejmBK99AD3WjbiSKiLta +zxUOyaUmS5D0qjbLgNaU4tFZttCdHCXdv4Yd3ed2RCi0fEEwcqs1QYhyg99zmwS8N0p3MYktcXDO +7D1ti11zE7EhS3mbZkiKSf79puNFfAXNxgX9rFIezghhT6gfb9X92JW/XHeu6koy/F1qKcrZC3rb +wqhUeD5+Jkj9tWSsHOm0cs0A2bSn8rG8m+kORT/4nGflePotMVWDuM5D+upz7gmhbzupfwcXu6Mq +djo+XUNgLjbeqQxF53uZEOFTEt5S3mC24erGUUlA/R7+dJpdOStQ+ahVnjMkckIs+WZpZ7yVplXC +bw+p/Dh86GhXYiyyeEJdbAWBCRCR2/+4bSjCyi4IkPo/uFvK90RrMdQ1aaQ4uE0eQoCGvczJkY/j +k1u+XoFbYm8t0b0ThjnaQoyylBsyJBEGmPJ8edROroxuU7HpqsGGZY2sIdlvl7e6zLxqLRkY//xd +q+ZmEH9E0LH/bOSjt5E6wjBtHz2eO6RZ/LdqJAsnak7GvKe3QsoW5l+fL1omRdwohnYU7+FE1FBE +OPQvF/hwUK5n0kG4u+eZqyzFq03wi5IzHKSw+RDznlvr0SHN4SdbiKOedwuk6nh0fDcMQjdXOv/Z +o1SNekD6VsrCmqXyv1OgikNSYQRNQQcX20ba748FhmDxwJ47IVlTImbiBBUUpgmu2eAp75waTpar +/SkqdL6Ni0lTvuOnMRagP7qJcBX7MdthBqbP9J0JnzvhDrX4LJMq+g9RUWzYcHmQpV7Dly7B1muN +9zn5QGHSuACVUHY0VGIe0olGSm8Xqfmgyyq8xz/z+SnhemcqPYePZWQpHY1fWGULQoHbhGG+2FAn +vSps1J3u7MyQlogZ3YDQ+NkSFqGHnsyjDd5kVCfefoBEnu5arTKqsTOdjRhqI1X72R0dWP2cLvI7 +5UjwMO1Q8OW4xwYoVIu7lyFzHavjqaxDMefcvwTmpHPey5/QXFPgK36diuKyhBR1yG27S8EmeBJT +SkQPy319XaA058CKBCSC4Jy0cU6ASouVbH0sP2FsAJqCCeTDUrb8H00kBaLrVKAcIJ0mp47Y9pGD +pnZnrkvcGS3wrxwrs1nsZA2ZZsF3LV5GJ9b2Et8myTqiZ+s7Z/s9zpft6+V9opbzoLe33N5ArA3s +m2vrvFwhh1KJq1C/d/nimK+qW2EWBpjppptCA1aowrDXGCNTQQGR6YbSObxTEksULCdqz/950QmH +Lza468xQ1bvzvs4HytbZXXZJ5OUwdxV6VR6jL8p3PhkD6amOWN4Dw/D6V6ASXS/PsIyX66L94DwN +w17mx2cVzqtnDmmJtBD0Jo8oEzG/NHXv411t5jnvmCRjwjT13Yjg7/wJ3jgpO9c7k5/Tnu6ZBfpB +01npjoMlXn+iFdzH4aOjlM4ym1T7IHV6I4uKO7IL3sL0LRYFNW9eBilit48yyPVpiIE7U75m/Z0F +qS0VZwJmxAFLGgTxY6OiEthPVt5G9lDk/fGwgHSiIajqmcOoO7ZrMeHYhNw20RczYGPOJJ2OZU6+ +xflzW7zf9t9PGpR0xNZn6N4QdA1NTFG+TegdWhPZwLl3Gw+f52OPtCefOMuGa7Gplt7ffpA4NJG9 +i/wy+BBpZtZhfVHntoAQOdUzJvA+xjbEquUcb+ICiN4QWxIrWrlzwcCQKk6OUgSfvJa6FfS5Qxi5 +yJefpFXerYjofzA8r3wNZNKaia2rqslSH5vn/ONKTK3bDZH24RdUmHY0+1nx/FTy5n3Ui0zVjmSO +HmTzwshvvc42bmucyiXN/tNDRszY1CdhaRZ6/5EuvDUEzixVAAHOeyX8ffkxRJkx9/JtL5qVAgXp +PAN4x+0NC0BBf/d7Kj40WFwKHLIFv8SEqdMaj29WXP/uti5Akshbq4RFtKlYX78wrxdRDwrtqQR/ +UmqlupXGYmXBW5vYHs5A8tpCuEBQgMEphdKZlYd9w3s/sp5kukDv2krkcBxqoq7ROdahZuzVROM0 +TZiofZmx3/9j9rOd5sRcxzZWQXMpHU+tXYdxEPCfB7FISI4WfXsfWQAvN6W6TWvTT/V2d4QiOOrZ +wd+RW9/O7QrvvAyvKX5WvBBgmiFCakViIBeg8P0Bj/m/y9i86V7alN97NihQ5asbcLYXFpluIRsr +KpjiAngGLd0WmsUD3qjBZ2c6/PKTkQOCenKt+VrNA1JOPlWAFxeE0HyxWL6BX92T5RYPnHItad94 ++1CAe8CXoTXFD3fUCWFtdkfv/iYomAYCNDPmd+0we25o+mE6gpv6uVzHFbKqqNK6kKg+f97iGtOm +G+3tE8MpISUFQwUWqLzuea2rgiK9V78ks1ybnFOa0Ui9WP+kcJnzyP3k5H+c4L7nYt8EK33oaalR +2JgkYSy/s4+HIiu1OOTToVHe4NwJGv5IvnS4qXBY2uMYf6IkMJg029f/obV6dnjlAMxQDKuBePtY +goWILYIvRb3YM0OUI/KSnVFAZIGDXoIjavJ6SAOWCqdiB7wMGzyHDq8XSTB8liUiFCySWUhYuISb +03oey2tUga4OWZSK/YGJdJbjvIWJFd9RqCRarUhFFCn9xsGW0Idjnz+g9X9QLl2KtaniB+evbgLn +RgDdI2D1vBoigrJ+Ax5kV2TXKN/4ySgW4gtFqcTIkAY8t/PTPLosiErqPOAZ5pKmLBGKTsgcfApJ +5pkYLcYX6w/FgSMwCw/eb2+6dqn24xqY7Lfc2D7AI0eFqRxKKFMpZkdu4Hr1HovO1C1xpf0QjH0D +hQO7Aoag505BEe5M2CWdc49xFqEF7eRqoKelCLFuCNcdw3qCVnrKYtHcUyzWIXADCicyxOWfMHLw +IhTyqbR4KuYxgpls/WUmFeArluM/wC00SO3DcIUMtk2dYA2d218aJFZznVNV32YpHq7NwJhaHuNS +AHbMfP+aJ7E0FpY+/yy9ukKEoQquFTrMICqgi/FuYE8FiYILZrXeg8xiCJgGNDh6T8GrOnYVxFQM +OiAlYEwr7TW9PRQ6Sxfo4Lf/EMgaYRhlmeuydmRmZgfdRk0zpe4btwTzbgRE2dR6HEwQXNCQsmYZ +nk77Pn84pci90iuXKaZ1TkE7O4U7Qx2k2dCoUBZA5lpK8X96owmfX01wYgOdbQFc6fivx6ATuBLi +2QTMkdlC/ZrEuCFrS/k7hHg3OpypfG2ZbE+ywtEim9pwfSweIQIOzZclJ0M5m+WgSQ/QW9hX0V3H +/AMSm8IU7zZqSxuYD0ptwsx6ef3tYFacOqtg5fUVVh8uVYSouxSugOUKnPWbKysZPDXwT0f7xIsf +cVx3S87SPzKJzgu17p9Sq66Odwpfi2fC75v+5DeqvOX6YeYCS771mmPgjN9PbPKgDXneZBrtuGPY +rxgC1KWjQ9N4uFKVhrxjz7icKeQ47K+IuoQ48Daef2wCnSrZAS05QevU9s++vgKCxrMImXKNtDox +KBH2hjEgaE+svIveVm/to71h+auS8zaZPwEJl9S+Wh+Q2bTCwdPsJvwKHeG4FZI6OVvstyNtI6cY +bKxj5B9hCxH+jRly3yL/wvN46iSrrIxu40grtpk9HO7/Z24Yjd8N6ItLXP1XAdMxawLk4Kli14XC +MRpAZRJf8YprinCB/4RVtS7zbTrzB9tTL9+IYFRETak+YBkAlS3QEJgfdiogemiBS1EEhuvTFER2 +JPIv451O3rLC3dJK0V/p40gCk1KlCLpm0ebMfOQy0j6fW8stCjZpP5ZOQYzkUFjWXzJJtLTzUoHj +cGDKFTUHgdRqpbOC4ieWqsTPA+WwLy/2FtpsYPzLlyYx/fDjTBozJifgdH5r2v98k0BM9mQQBEKS +KSPiX7bnYxhPsih37BlrWoeCE00NGt8ULXjD+QLkRAgMNBEcSZmuBimOMOBtsBsxPSS95Jar7btd +3P+ezMo+8qgT210t5mXo3VvmYHACyR7bhFUNbyTmyL02HcGgfC8JE2cHjGf2IiUZgYeC1L9vPuUH +Es414NtaErE2NkZvv5AvP8MNDuFrXwYRRs94QUflov1++LGU4ELvQtuLqChEnhYT02ojz//PBptW +oIp0Gzm7N27Ba9rbrMze75DsO34p3WRElL5CIjDaaj6Iu3WSpCWYBoetrlOZZ55cwsFNr6Y0o/wb +nB4wQXlVT+LbIDmKFO+2skl5rS2QZaIXDGCwi0Oc8kqwLF7Slgzrse7aARJNcs/+WMy4GKF80ogS +hxAxPLKPkT3FC66gdPvpliNRDkIFQJe5f1SST/AlZCiNq+/0iF5E6JtZOqi8LMpoou80nE4w26dE +3g0pX1ksR3RUCafrjEyjKs/9V10gCXcM7cTrDzFhH2PR+yj+zJPQxBKY9L5A5evVrz0VO4/uYomM +oKWRl8DWYJ6pFBtQC0K1rJ1VW0+XZ7xXcGAZ6/4dUA1rEXN4/T56vaDV2E947XKIET+wAT0wEQVH +miTqeUlIIB03xTQqW+BtNgfDatB1XQ+iMHVJixNfP/oPzQmMPVNl7MEMhsAOtJaIkycF7HSSs0Y4 +3qcKNJo31xy7bkGROICoM6QNDO4F99EOp6FLarAGs6kwfFXUkGZb937TJKY0JkiS8qO807d/zbd9 +LfT+RtKejT3XFDWNFfCw7U5Ey6Y2Y4lAuqnWLJpq+Zi+YpDaOKRAQuK+55L8F6+UwATEFctniAb7 +M/HHWDOShc8FNTDnTgcQZO88+T9DMZvp2yGPI8DRJVQPJHFUAft4+JEg2aFMuO+q0gi8/MxWoF4q +VIlzeQXfrXK7N3a0hYRfye8g4BxD2vT2NFCBwPhGPbgHGRkvFQWNi78dHGVAdIbXoVKmamZy4Pkt +hCDySW22M9Okec1n7uEXrKPTIYpmusNdgSPEPoUy9Z8Lh4DYwnyLVVi5KQCc1lKNpzPzI0+3zMtF +pzEm1Q6Z0KkF6swiS/n1OwVF7TIGoF8szR/v73bOwBTaPMueqaeMFWR4w9ehl5DgZNjH0SBX4snb +z2Br5kBeZCGJI1OGejcGo44QvooRS0P6pkmEEuVDUgR2DZgTjqd7qFP9KOVURNuDX0VNp9ZsL6RH +xPt0Ntwb+pdcvHUtxZp65jpTA6gyavHdaSPM6LngXzrZFngUoNAdZxrUBbZfxWC7w0CJPcOD7hIJ +uHo4nuFFk9cMCsBoYExB6uHoWKwsW+KdUaZizLdoQidESjB4H8nQ1DVF3fwqbB+Jg7/vHxg2GxwS +TkO45/Mfl19C3noe9GUHsaC8JhPOUn3ryBZ0p15PoQVpfKF3k0WZnXFsEVpHEopOox7XvS0kX6Wc +ILlaL8upW9dbYA1vkamg3GukrSgB/DOjxZpWJ3Vz7ymIhn8LUgzYEw1Fg+0tqFrJ1ec37tiTZHmq +34Gity7n/qPDIUq6Jwf9QsXn4AGFrPqPMtRdVeyEzt/E2M3CJG6Ltxa3dTBpIAYoelQzfzIETS2g +KBCXnrzBh3X2bdW5N2pLZj89RqeLVfyF2N0sWs7Pb5Ai4gS8ugU8xVgCl+JKGffdhetTbzASNrw3 +v6xMzqwoL/4LwXBMyQ9+qaKcrQab2iJD3YkJgLfZZsPsbFPRc/4vDeB0RXVn9DSSIXYCN1GuMNjs +jNCjJQ+ydcVNzX8ykqSCbpODwiK2BmNSHaPE5dzOGtQqqI1a62HJZccLAdxhYuyb56C0z2fQbDz/ +AOB7uvWP85wUqFwKD2ee1I+nNDbAbSyRAwfoMJAsokf+vKoJSH2UAu/NGnbQhSTOVHSuzjjebc1J +XqXpDOsqzR/xKY31XM07GBBr8APla70CrOajFC+4/7wlmIZiYF7u6p9w/DDuce1NKF4XMPRw46UF +G9XJI9iyZ87Yp7+KIVmSs3gFoZzlXRQodU0MMBZl0Ks7DfM1ER6Ae1CvOwpzrVrjjUUxj7JPT/Ef +ty8te6UqN2Y50oa+xHRb+7o1ZY+2Fpi65uZMGeslrBnTt3JIJWJNCrSn3ybgyTVMZFqgDoQfuEV2 +uU8HSi6G4mtxxC9s90oDYgTHhC7yk877UaSv9xQ9NWHYWSA1OAwFtsDGc5aGvnaMeod9jKAUOb8Z +HTiT7sDwTo9lzHm5IC/Osy7oQAFOjZr6dcabLpFnLGJrZEEuSSJ9mJFl544oYUPYNeRnhHojgUKv +ecw+mW53dM7IAhiknJOSdkMB7lNokZZs+tyFFmetHQhj65tol4/9S729AH7nLmvgvohw529VbSrg +TiHlIlVL4nOgV+FqgrFqGreXroR+AbzwP07Rda5PeXha4bt7gpi+TJpz8zI3B0Bwphqka4tSQlfe +zvQLxDlbKsn+SfR/ke9H8VmivNkvdy78Fo2zDGB8tsjjR++PgcgmVG8yw1FRJe/nsdecNBsnXe1k +2UkPC2JEf1jookZn3LRkuHtWmuMeiRkkjyZFEkgbT+Su0TItwmYFBPzgujHkJ9Axtrn6UMk5xFWm +YKLkjvjYP1IW/Hpf6dN+roYJRrE7azcq7ARGOY6/S7SSAhYPv6VIhiVfEh8Bryqx6RjNJwacbthS +TtKc7KmkK68KJj1tTfFe9132IjsRiXf+7uOxDeGQ6c23JTmzmWbONFOOIVHp/0WbV+84T/O3OyVH +EcHqUc/m/O4vzG9yRYiQjitlkMNME9jg82Hg1rLp3QzrOLCj5Yv0dloVs/zHoznemJojvvYna//6 +jJXzgBhVwUjmPOjSXQVCSxHMvwUPvFjK/EcV/IAqBiwtChdyJsO+Dl8spKkr90MZG0k29hah87EY +GEaeOeDT2cY5+Fh3mvgoUN6zSewZWKfeFfyiLcyC0qfF73eRUPDCV3JngyigQsYpIrnctgS849iP +yLvqj5v5ZP+IbILJQ075QNOcrLBsXGvHIbxKivpIkrP4QHhjjre07qOBdp5TL7AbNEtGfpEoBJj/ +eaYAfzvcc4c9r4IZ6AA9NOFo4K/xsK+jLavuFTGeR9krSucZ7eWXexsOr2kGIbo7JvAgvcFTGYQK +h1ho6ISd16Ae0zjTZf3Am5L9tSIXtCp9uFl2k8jnng54nw5td8vk18rS1BuDAakm6XcY8kFXaq0v +uULICJmul/celLZKIu36KbSjSkkinAXnKfdmxTgpiJmKIaFzkg4H9FnuuiN8GEDuNwS/X2bnjHfG +klBvsu7zB118AX5pl+OTE0QcdSzRkxTOJk8wECwSWnmqJrXgrMemu4n/jVVtPOegFv4xc/7Vw1Bg +rIvqcgOlc8e+jKhE1EBHY+wZKAvbkk+s38ZK6tsxKWPBFPbVOJ88boZZBEaaSaCOO8OmLsT7+CjY +shcu15TGNDuCrWqG4QH4j+PIHbQCTITREPXx//pbZGukXUcx2+d6DQ81pfo5a8ClIVPrTvPDFX4f +vIPfX1W64p4H6SvfUlAw3M42aX60IRk4oKZMrtTI3mEC69HxOt1uiI4xFC1InZviQsocbnIhB8DN +yiVbIiudBBV5u/orlTNIvKPNWm8+5gqbVN0oCZHuKB/dim9zEq3ZcfWZMxL4/cRwzlrD9vRC7emm +sXhXbGVU2cyCer0QP2M3JtyrD8EBqC1D3IYpf5gUd4H14KT4mBCjoyZiQOD0P4jiX0rdC6bPzX5g +ZXULqfSkUxcHfNyBvzxp1d9IJNGVS5G0NRll2/JY7jokQc9RdhZ0MZaanIPpIAH4DQF2m/ImQgZ0 +OcYz5Kx8yTsjz53XFvI2u8/DlYXL4cC9RRCK7AWtDdPbKbOsMfOATp8v4xbFxoS9bLt7Za+aw9TR +zSgw5vddNfpndP4sJPN1HNGWgEJHg1udyzGDkON+Kteby/Zf603Oa2tpcgw6p/WNv2lVHs16BqGx +ipFBu1dI+uFdXZs7W4gMXqRWnyJ4/KqxiRUfB3A5ErjUziz+AyG8UPTC350MsggLHd/3ig4ImUAR +CnovW+i7z7xHuHZKfyvPAZc0UM7UU9Yy8mVky7qrFHlSopvPhRGMyJy0XK2gqmFS7HRcCbMw3GoO +WFAZGbjVyV9j5p79nA7ZFvWqauzHNZVL1NfLnYigi7s5G9HDQoWPLqO9vjxlnSXNKLklyy0SW9UM +iVC7N3ctr0gdfiebptmSmO4hlc1Mm0n4VfCTuZBIHuwyU2N8FIfPOtc05nCVXrAqlV1C7z22qfMT ++6zrLkMFNoyGkWnU2iFFE4Z3IP+6VesdF3CaLgaK0XheAZaFEUfSo6cn+V1XehC69btGY5CVqwjL +uTTFdFsf53hFloG0SlMf3yJV0uGiJBShvzHRUaQ6zIaz+FYd3AjHaUKpUfj0gxLXYHztZVNuhBKE +TtD3D+aAD3prd4TXeA1gtWYn4SpdTxWmR1B75cVkiYN0q15YD6riiTQ/hywCgtxQ05Qt2C5qLo3C +DjOHRC8+Alel4J33MIgu9LuZrGvVm31Sl2ULGJsBgcW6+z1y5OT4Ruggb44sYQBCnqkG/9SJOz4p +PGMLqM/qD53jeByDjDcNFs9L2wKXitc+JvptiV525g4NArRNWWeiJFu9alT3cHBJBw+tzNQS0hP/ +7Tr9mQ9Hefu7qeT70IOGTb/pqwtnv8EIHk5RqBJiQ8McRAw42W2zjCzZQUdCYw54aMRxsRf1lbxO +TeZmLWFizZJUzVa32KKumr7EssPJofASIC9aAMvnMlJ8yzxC/o2sIFlu2ZeK/KHqIvOH0x4rMj9x +X6yRoxiDZsZwCVKoC1lUKLCT5nURZTKisyZ1eTA97TaL9Wt2eqDro+1451Y4LEyN8p/rNtUJrMZT +YZMMwsbD6XD5LCJjlhc9psXMO/CKcvNBc2CQaHVI4LYarXHwMSVoFYch8r/MeGBxmSUtSxpcgfy3 +JVYHkaIN/GevIgMqB1M7ZRTv0nN4mm/Um99pzc5bBL/+s6X4H5PGS2eBBD4Fe1RojUYuxqDxQozy +Um52N6ETqQ8poD31OUvu3LOnAX/SzFhPfyXbkczuEetnu4ZIF16v74h6bhuGH6qwu6mFZJ8uDrna +hknMpZtlkozgZgR6qvUh1M5lHthjrDa7ApFnOquhWpmtUkon392nRoxaAQ7EXvap3UJ8h3D+6Z8x +9DBb0jCzaBsXHotBI6MPWvUykDUbK92saL9WCHlQbcoYSdZhc0XCv2TowuOb4CMpn0ihDi9xKFzZ +yxmnVRcWJgWwZ2J5o/fwZE8SwbIur/JxWYZrMVnWyaAyF30rTiDWcr6P7lW5s7if/5wdAF7Pr1iv +IecdLQFa7Wn4SEGbLui1Aetp8x0KR2VkmkFepaamFh055aJLICldcM+Qe+tPumlMDEPCdM/n3EeY +ogv7jTVLKlLL59XVi6JFWeakDTLo6IISKotTU/zOIEFhfDuYrhpqmxEcd8Q/LKMSQARCae8j0BeH +h6ht1tMDZMFqUBBzPdGA3OZpoQ1MZbSgFBRZyxPyK6EfpmaS8v2cHok4IZ2R9tVROiWiQvLpO4pL +xpJ55zZNebddkjGKJUk2sRATO4jMghOs0V9m0WoOpKza5+lWKFVOoVFnJ7YU6xcSakentwSvhW3Z +X2HqOcJ3IpdhDUNSMVsrx47YR5CEyF42IpADthOtf4iIfwsbtCO4IFToZ2RX9OLl91RP8kkahnq0 +TWkqKR7AN6RE30wUPqvPs/nuQDxWcSWXxNdQ2M7p3UY0DYdYfSBA+a5GvJcToowM/Qc7IS0Cg54V +2HRl2ysWNYS1fLlqUIimk7NTAO6Vfx0gP5Hj2Eb37N2EBt0KcYVCveRjQ9UdiRgEI5YWOrZ16Cf4 +2PjrjbSFUPV+soqXP6kSbPqXqFwPzXHt+h4zRgp9LpwwhdyAMdAAEsbsbmJmiXDBwWoJjpAdENhA +AHLePMYT00mCTSVYhSvDiQRqN6KTpF32TdgsWQZ8QzlziHF00E3B/AfgR+g5XbD/HVJNlUxzQ7iM +0EmpeM/EYu+e9Aaxt011TF2I6nYPXR3lMNKMijUSJ8ZPbYe0Sw2PHm6Vq2voV4DKZogJh02PCJqA +FT0CyD/SNMIJplAKUfmLvJmPRoOLBeHsJ6273Z3YEVdb07E1eImUeUNk+A7aO8QqNH+rq2oAiGON +uVli6ZQ5L4MAuKZAGLW4fh5P9pCCywP/r7hhyUWiKynpvtvQxIgMVBuZ63WH3Al2W8qbLZwxJS5Q +X5HB/zyeL4P9snB2l9sjXRfQdqhsMn97YnNk/6rSL4RGNhJEbf5yg3uKg6DSogroEe/YA6DFhU71 +opinQ0O/KLrjSatPfxn8/fbpHn7V32jsJi++oo5sI95XGTVBjXwElHWK00/ZA0cYPRCf2yIrMJGQ +WbRt2eGPAZoA4YgQT+UtLhqrEFqSPM2QqqQHIZJ0qMMvyggWKWcHnDlcRvNLRqo53GvPDNFvoxlD +WtWXIHwZCLocDmGP6CXWThw+/yozeCeCpjB04yDrDhVauWZYTfcuYfEW24AA5/hEk68D+hwE0cAU +mqUm3WQaG4fuuYMb4rwrdI4/+cKQloQ1EdNlGdXGROMZx/fBRi45dvoh4LT8Q2Tlj94Qy9Sg8HFw +Ev9q/uQoP4rsCp/YuXjtG5rbgba0pslibHCOtmVHd/yyEvvOO6KKjCHM3aBxiioKodNbZNR+09ni +z0x4Lxcxxzt4B3MkmDjPCu5c4UXMvbkEqQiWJ0I6hZuhm3ZrxgLHMseryX/ljyROl0u6zLDbwbq7 +P5XiRdEXOfbfMMHJqs9W1q74YmOC2VWT8qdClCLSw0NZALqyMm8fYo3TNZxErMUi4gII0qvW2tqU +gIJv2+mUHaodZiFpWoWiciuP8i/L/1ncf3lWYW4qZLfd6jaJTvDFf32JHaEgTltd/gkXUZmSc3zl +K+3X7g8Vp22lOFsXjG+88N0XAzo5wed/cDDNRcR7EMBsJIPRl6HaRKtcvy4rYFz9uiKFTgRQr0nc +QZrVGlGiBRy7jtJaCexkGgDBvh/fJJ01Zpqt/aHRi3ibQyid1emorxBMTI2atSJxnT2B9SA6Mxzi +z6k/yTkm54jJo/Bn85nUOGDDKbmNWkvgqOcJSVp2oFoAsF5dUj/QsAgIfZSJfj2p5XUDmLto0P2N +T66+zCh/c6U+UhFfUMxvNSBXinP67Zcc0rWjDq7wqMrWRr3vIRDGJpr9luCkHtCC+uUvSI4E/Vtm +Ddyue42fNe3YpBBdoUw6dXSgzCl+l0rtGwU9cOI1upQ1YSwQJaNLuStPkGB3EJzml7xhv6hr7KYp +oKmpNI+yoXMHdKhsM7r3ouSHUkR60TR0uS1vLbw9N1uilyV7o1xC54s4DQ9GnjvfRhW7bFvBfuVn +xGwBKVunpN8UyJN4pKxWOTrfE7/GAi+8wDt3mKp6JH/KtN799u+kloIupwIcGZHSiFaFy3YDrlwT +dr5MZgySRKJMPTjJPR36uXMjtuMPl/p5UKasLhNI91lsujdMKw+8/F/PUuvvsRpX+k3PFPc/e5a2 +vX7ORxXBwse7QuRA3Q+eKpIEfrK82P849akKMHPYNC5J1ffNNQO8NYEzymuak9GZPLnNfKYZ+6WO +iWl6M4aVwCu3NSV4i54PU30tj7MGi+XNyM+5H1w4VcZ8+WIpzbtqfs6PfYJECxsqAwhQJJSA//1A +G55GfcY0cElgaKWnxxKZiRA0AgvixfW1KpR1ikOAZlvJ/c4zphhxkBSq6cFfr7owxkZe5qrD+iqo +GJ0godJbRYJoOLSOo3y2IJBLgJdMIrIv6iRUpbjFRzyAqOQttKChkCpfy3jKJ/Le/h2Lr0kZZ6w4 +VgVcAS4h2VkKKLKuZDzzdKYEaoL0zyLP7Ruc1UHZvtxiZd8bC1gESl0xEowxIWSErC9c0+JVHfwa +rMqYjvRHPgQVbfeCJ9c2MeUz4hmVPzbQweHjx8peVfdkSND+6e0fwSg43rSc09pnNbXpHSSghQ73 +knY8FmCFE4SSE7AbRBqX6uFo2k2Jv5x+7kPsrLRTdYQf7Q1VYIeL03nl6gZCslU+pYK5HHUqnw/1 +4aCoVnvf0OEV7bdMcFvHi/odV+koc10BJPEKgtz4sDl4IKwhojlQ2uri3ZfJ5vDw2JffFqzkU2hv +S//I61pWjTorC1mpYtuw9nKS/hx33ASGuFVMDuSgYmbriUTjiusUseJ4nRguC8GamewsL91wiQEi +KPEoASaKg911gJpKUCb8w5r+GIv5nTJxtKWfVcMHKmE71jMfUNZYITS1J0PHJQ7mSpNgmRe4npJK +GcrzD1LRKFzcr3DxHIaHpnw1YVCAplvS6VCqeZ+RoptrE9d4Jd9ugvXFm4jXhOHQotgN1Qa/4Vn2 +AEEPVqUTwfuJ5rm8HiBHIgMGPb+Y3fCAdsp1dCQ9zE2gcfBYeIHcKxGCgRIH/zObN0HkaFtGOdmr +pDyWrPToqA6xjGpWBl5ozAyeoUcNKRJq4YBX3L59faBiFk3qr+QYm+Y9eqR/rxKMweZeXHDBjZUp +OSBTi+WDcnXlIL9pEGTTGPfAjsbF88Cn7PT5SobeLx01gveh20mqd7aLnBIIm+7coVUzkeVrvlHi +L4y6OXhiPpXsCqyst2ZBA7e7ptZjsx6QhKVMqPBBWCnKBy/lZIb05cNrGbu/a36hOw0jHRECwiyv +zga6oatl9tKwukwI8Il4anYK7EPouJAA/qmwDaejg/TRISI/jdVYpca03p9rZ5GuVIBpNkEWSB7W +CK27ATuaSlBN6gBtohSnS6mMp6V0xYBp/Oviedt6Nia5p3YzAP/QsdGDTNAfFoBdTXPASblElMMA +vMBDRU1r55wCDpWAEmwGjPISRP0Lm7p3CSoV8MZ6fPV6LCR/Hc8EneQt+z5yhBLMvOfgy8+/MKDG +JtwFVBF94ah6uRMVOG1398obBESis7g355Iw2pzBXC86YPP07VhE0nPmvDHFfYqB5quKfKlj61TY +7UQjm+OT1a/3IfZz+pnVlNLYOWorLQs/KOJVRhX0qEg59MjpZfoovJoPp239A2RpwiqzRcxVXvtd +Ld6YEPpbQRhSxC8yyMjiEFCMuQNQqoX+4hcv7/lZHSDlj72/GsLJg9NSuUFxoenjuc1YHtHw8E2B +31mG/ebN5yVF8R5kH1Xo+AzzAEHxW2T/Lvb/W7iIoh1g4T0UpMYHYtp/Xfyil1PrxMkHwC7wjvkL +cbz0yJCZ3U+6sn40sTO4T0qv3AO84uaGZ+74ZNdhpwqN6B6SaEdV4qJRofxr9zvoZLak8sx3+AWy +50M9OAWtefUNXt/mavDVM3ngOGamG+QoQqd98s2TcmEzZVi0W4JGqQHyoiKNn04xdOCgVw+H+qQU +NiiO6XxfpRAJyFQilUb77P3JBT0kqQJ5B2UAY1O+gt8z2rqGUePAwTIKV3YmTeUPWelH9xhub3PD +mdk9CwXCtatusASuARTPyzfAeLyFjYCdcT8YGvHQ9ePtpuslqX0308u9TJKxlVhwBXoOsFrP5ue1 +GdHGeLsJYNJ6w/Kklmkm+I0qEv5yLe+Nlxv6NhgEDrJxNuXzZUC+zhMUG7kiU9WcRBh8x1pmhEWV +hm2gaeDG1nHaW1WcXR3tYxp0eFkYvoPyXw+eTHUiIsnNKzkRXUuvPIZCvNa9RXYXVmnPvTHqc6Gs +TZn1GYov7eWISg+0eqF2LRb3G+1dyzIX2IT6NEKn0cF0ymA6VURqox+2qVvFuE7EkaZ4pQRsHzDl +mPOhbSQaZ3SuLhrZLffDFnzMb1zUXirq7Fg3pAXiaTP260VAjs8PPSvvf2TEgqA86MH1744sGs/f +550/TWsyS8SxqjbWc/l/MLAR5VikQ7lrqyMVKwiqwEtsRPYScAkE5zoNvEfZhSrrMmvMXYDnq3CE +q/f4EiqO9noh5GJYSl1G3pVUirYaTGxDPPBXackXQCx6X/IAAPgwgZlZ1dYvJgnWgEQOh+4OcCNV +MOevZO3ubN14l1k4ISRmUstxt92iyOW4a7vbN/ORkJcWjO2E+bT77EzmA7UlsGYx9a36k2W5GIWh +qrdItC1Gsx8V6OtSJxH0BxLbzFKe9eWfxNGU3xqASep/YKzrqDMKZYtyrbliBx7pCFS23mb126pN +NGwmyRwMJLhV2sRVEbn+kxQCgxW+xZa4x840lxWh0lmS9MGVNp7i2YzlqE9qjN6rmHCFH3MlDEIB +u0KY3sBoszpm5+B15Tmj+yII2VWHT2JmuUNvvIr34RMVm0BdHyya30MAVzReQSKGbLk73J53vVAR +WBVA57jYe/Xuu0ZVCFfylV2zkCRGHmftypnnlumQCSJo/cAFs/2w2x4A9fg/GGFtNPHtVBfAwzXT +I8Q/pwaMDXq+7pFnPEXkiIZRpzGsr45oSF4/HWiD3xqlLg96jTnLJS0q+mKfHKLiWyCEFcTP3GfA +UI53Db4JDd1HbpY3BRMUcf3f6wxUGOnU/ciy1hxbXnSLH2yX37AclEdTRpI/UMnbBiANuDmwzGVO +BJe0t6B8fz9intoco9Ar3OHEcZYhnVCBdjM2QwwfI3XHDtQydNkSoYYA8P5sLNSAbrSSOpo2U23r +ILo10JnpcngM6FKGWWOjXCz2W+Qz2Dd6/lxNp9LiA6JYV4mpnj8ru/8f9D8xwsN0tMcc4kDzb0K2 +C4zG3xVDQSiJbOkw2w0zJdZbl8SioqzffgOVIClXL8vXAO2AgpgltLYO3+8BJnjg0VU+u7iTwzpE +vBefAkih9gaeoMzLLreY6EeTFmAcmJSSecjeC2bEUCl8pCzKhZYB6bOKQ9kv5+Qb+k3K07LOtTo7 +V3KR3L4D/cuJXTRlITzv9nxE9XwlNC4eKoqSQ4/HBljCtDUDpa49wUmmjEvqR7Bv310sJr8cpE3t +Q0P0RqbrEtbqtCRyLtgsewobxcZsZOgAjwK3wK0kEwhqb1Fp8fA4CGWQUQ/AdbmIZ0r+WwycaLiK +/GmfcXLkjW80LmFUVi31wK1hWpXp5FUVbOlH+5vXl+TCEQBYiNFnL+fZ3WxYlgz2rRWSyvXSy1GW +RrrtDq+ed7audCF5zyAdxKMncx6r8AQNXkWwapuf+GmBav21X+pvPdRy/p8UDu1ktaX9acPAPYWZ +zM7qiMGJB8BoFviIPVEMldQRT17o28T60TaKQon/LrOEt26uWSWzvPrL5/CB2HBkuWr1lfW9MNgT +76IxIL4sMl2qgcWEUEWydGq2VpGGuf9uKaLSmzoZpREyKjjfgOMF/oTo0+cyIIgchslOyqm6Rc2t +X4JKqfeA8SNKrMrOdLB9XTdQx4olRa9FeKLSfVszwCN5EoEpyfI1EL1HLgT0j9bb/YSPbz1POlJc +uSEEOW0gCIvo8vdYcR9+u7EEoru2tP6xBVSnCaH9AEmHP8oYt7k0y/vq5mztUR6DvgGLDsICDwwL +/Lo8bLBQ5B802MSbhATOKZRbdFL2D7CvqMvKAnygyxNUeJ5h1EaU3fNgPJscdC5pSUjX/vOZoTCX +dMvEP36hSxJgzgCJweneUh8zE9gVPfXYuQjyww6QkkY3xvpBU1bi459M22/Xm6p+dNUkTMtTGeea +f/kT4A+blB/mDnI6sDoZQwKbSjMMmxKSVTf6gVOmr3q/WYmx8+Uk1fSGf/AL0AdmeYNNRl7WRARn +rhG9naRG9bGAZGjd8x5AbIIllNWeQ9E9PiI6tfD+uudzopqkYlqQrtgHb4RPkU0wbhIL4jDx1sng +EcJxiBz7LoZw6rqC20yiUjxNFhHa/VJnEGVaaAHeGbQAyf97rYwn0dP+xxb8FReAuDbqTeGnOrvs +a2yDRv3tFpYPsMvDQ1JVIOzlba7mp+Dht/XvgzsPaE8CcixKcJcWfUs1SazOL2apbUe+8lxIIV+p +pSGwHD962p3LA/Mf4ejSfg4cHvN16CX3Sqhs5sbXiEZhxPFJSZwOWz0fFqbRUw7M5mDWHGJEcdZd +cPfM5FNJfSSe4y5QayN9nrTsnIUorWRzAGYaUutnKwqDb+NQN01NeettHbeM9IEaDlGIeFGEQUaR +OB03LAoOzlwpw7JoJZlRMeHcG30LcO72lVhZlo9/p9cHeZcb+hhVH6JVskyY3L3gBD/in3f053KM +Rnp3I86tRGU4T4WEYcKNPwKmYxKsR0aWmyTyk1KQAmuRQkj2UGdPCtOhbj0SbsQBrzN+5+vdUNm8 +F+8YBtMy1qYoeisM8GMvH5Ar7oytq84TbCqN39wXeWSOkJvDFfMc8qZh1R1DzEkSqTNMxc3O6RAq +khuIzOEQ+eOJhcb5DN6Z6LozQLQ4xZcquIUDYF3A75FtvqFYV2K0Q3ppJK3g0s39LZ7AtjXHULmZ +7IZ/H6C1WyQuqC/p81sUeiRcZYeBqSjcLLzZ6k+R8iGfIWY56rTkTmtvNNNMmWRWupj1rGR6OgDH +3Cwkjmp7mfznJoIkt9PXwXHCpx05rXiW3VLX3UxHxwZSv3VFD8y6pqHnAsEeI5yWcRnUqvpn+kF4 +y+8jlL13FWoy1v9YBFUKeNxDzUC6dVVk5YwvXVSxpiZr6gt8R3BS5i9vLLf7ScdM6l0lx2ch4uVk +zHGaIxLkCWwUqFxXzCxkOg1UKtmHn7Jpj445C2HBP2zU73aDVZVUEXUxWYpgdhJu/NmZsO0eJTpJ +nvmbkK8x+oyqu9eyXwCEhzCRgQPqKCRis2N+uXxJvG6rewF1w978IIHzfbbBhRB06bRm19cy1FVJ +sSD1CqpXpT5gaJNTTafOlq+czjjJ7UkDUvgb2Xnai61qyPXLlG2TGkHTWpc52QA6nfLlMjUuw8Ja +Z7Ec4Abud3cT7qxCOu/3MHnUAT4Yi/BsJXw3ZE3PcWzZ1bHFGXeK76g4J3gffB3OX/RG3dgBTNRR +YaKgHiaVqtiSZL7P79vv4w552Q5e2h51r36GzZo9pmRusKIaejX7xE9hoDXNC9BT2qbGwV7KiqfN +uzI9i8lTZ1YYIt55ynXAY9Wl/MWruYkGrQMyn+yMg53CNkf6SbmJLFEsS2b1B80kIqHLgkRt1kAT +WmGyyP6ztEaHY3vp8zXRNzt93LjkVcfM53Xc9ng5aBn61bPTk8kMQwm2HuGKpADm8NdsSzylQyQ2 +ikeVW0xKeSGqcT9/mk3GmHjfjReG4AZ7UdgaQ7VhknLBsLOnepcyAomqvdIKnVoStfkPHYbQm/cL +aDwaRPDJOiKh0DX8oZXZDjKLUZeBgoOWBnmvvUson35T1tO0xBulnaXaJnp0mImA/GwINB7h/UeQ +7CzTA8hVLanu9acP2MQHLtiZg/1RjLZPHoClyTpYblvUwQbUJe3ikBIJszord4j9mi26hnUDcraH +TID4fCwhF17J2BaMdOSC4pqRaDJY+XENNHlwLhBsHJQruCglvoqdkhl1mL7mW3/EI5tiAqZuwvqV +e2OWnKoHOwRXfVSuuik8hoXoDxUGh5BJiDIa7z7v8HaWMF0rF4jiQCCOe08MAKXYSgYulXuXh4B+ +I7UqFyqCvyffGOotQBFIZ3c0CIHAWv0k1zZ6xFQh39CTVZ1wuUoRyILu7lHtRnlnbk/yyZ7Z5k6H +1IrTat7I6ErlGzwkEjXhCWmXdt8fOcgM1iawidLiJC9avwuP41bxhqDeSPgC01TFJdZfuzjyNJPF +Ap7U/ZrsA4n2xn7+PTl0TsBX53DLdZP6DpUMzqje50I8Aa2Xd8HSye+7d6WrCWAcVjEli0v6mii0 +PLuS3iBu6cVtH8VNbC6BvriFcmXArIe7VJyi2QGPkhgqTmSon1DCfs42iOd7/CaWwkqHnQA7I1gn +OFQ2nNeJaqHhgy88cPdNHG26/E3QcnJzEqkLB5x4seVsmS5mkldiwKvDnCmb9uYcimp2hJJaKtI8 +V+067Lg7xTPMCOF5oUkUDSkFvIg6hxjU5nKECr8KEQtgG/R23eGkOy4f26+QrT+0TpubU7zk9Dpy +eKHaDN71NFAfF6xyZ08x5/FzTmWCCaObfsHd+iK714alGsiLnaA6D3W9Rxpx9xIufArxJMJmFqRh +d7sQMNP0P+BR9KEs61wmjB1yo2iJZ/NMTuQKmCcM7UQyjtPh7XMoVLB7uBagTWotNFpQdOIqoT3A +5DAbjVTKV41gj6/UOIPQ+NfB+xEoHF0WmNOWZjALBMKOkgIIqbqTqm7ta2X32uj4K5uYGS0XlH9j +/GbjbP0S6DzRFsG8dPyC1VkQKWbGevlw/HshvQN36wjT/NREhagsUtjZsYDkbz6k6tgsQIAaWD/S +Zjf1V+UDmn0TmWLmiJjpvvFVHvx4DhvIGngaTsZekbHyUrN6BjiDhDcUG4B9idWrizG+pMR5Uqjk +YT2pVQfkt7RESSV5lWlVnrRanl0KRvcMhR1Z4IcJPfBjhqt6GeNHc7+1uUzA+Ldf83DBaHd6qwla +RvtQnzyTRdsrNHn5DzUgFSUIyJv2Q0YQMapz800wbiOO+Y6g0ZGej8um+tmHvF+f+/3WaeFdAMMb +VZcYVGwFF9BlPr5e49WfB75i1oYRkKNOPcKN5fqgO+w7T/qin2KJOrKKj5cF4UU/1uqhQ8vjkv9G +D35yfOstr6ThiS2TryIJdpOiZrHgzI/dTaPEBPFeZulueX9V+x/ImkRtj8asRQe/xOoXfPx6T0Kd +mBEZ/aDsThbv9hRz4dZCn2lqFN3zpwGZx33kAC0dRX5EJxWEuHCyYhgDugCwFUub6PoMIsxGfqbM +SAF5pv46hi9GtdrjuaQDAXVs7123HFFbQLibplenA07Ok+8rr10vo5o9H00r0waUpRnyuJu71K4f +MdVlREtv7dCmFepPWyFUe8AY9ZipVG8bO2+tvNpeAB1JrW6JKKCS7JxWTo9VvWcHwYknQerk1dRP +LwkqfTNTIk5v3S+CBWoTyj77HUd+Ns4RORyDe4+qzK4KcvSqp8Z/8Sc1gc+SUjFCmK4i7SPNH/zS +6z/GpHD3rXqD8v89tkATVnfJxH0g+EnTNnEXYIv0GlPMJgIiKZooNeU3UqzrlGdplYWXeS2UDtC4 +oZmnIaoGRAZeQKK5tFjxtKwtgM+DciUw6DcpzZID7zPpzsIhEf3j6vOeZ6wlNna/nBbNvIbIMtlg +w8PM7JSiIcxEyRHB/gVxxb0HFVzbivi+LAkBoNH8mBU1ecKnJ7WF3a3h79hyKMYLxjYUdTpmJr+K ++IsJoMJHiToxjSJw5Sk1kDroV4p2CqifbDrUCRhxtJBNYWTCaX8mcsbxjMvN3v/6vvKB87ZCFLcb +u9gZnQFGM+zjgDrRzw4vqDjulMKRUaG9w2lcB+nEBH1GdIjQ0gIjANG0i954D9qFs9lA0w1qM4Sj +/gfK3qtvOGLrHoGorP5fEHhyishV6typXg4DfYPlQ30TN0IH4pv1ocmnIh3S+JdMQRVnQdPk4Ko9 +/jL7Q0fWKtOCS/FE4YtPax0FTlpZB8gUgjdKOFQh8+uN5BmxvTXf9D30LGiVC7zrOsRXWQRiT+zh +ZRxoTWreLmf3g0V/KjGxIKNUhKTRngYNH+hZxmRmeloUfCeQOfTJA/0FGNPXvQXfM5QXthQ5uFl1 +C9iSLTKaauQXvNx9ZkgJL0owU1QR/2aNwFLOCnqAU/4HcacTudYuOJw/9Q87THtKlxUjTYxoQ6JM +l0HXsJYPfSZQMIXjXYHdItngmtjx/BMCZFRLu7aCLpv7wr7SuqNij53QlYE/nzsZkVwRxjs9/axe +2YG2ygp6EYFvdvjTuBmY7gridgIvEJfRykM1PyQuxyZ2wyAj4ikK2zmnS2T3mbb9MtX5VMYswRmd +hLcob0GRYh9eRmBpQmFMH4PP4fIcVEJCWMCjs45oRUR28TIwYXmcVtMx8M6/y4Fm34r2qxqczoCT +CRRIw9VLS2ZbB3mQIQBjBf+6FG8tykn99/57thWmciG1OHZf+wq17nLM3SbWdt8J+4tVGoSalgRV +yPvzeXgRV/8YnvaXxkCX/utEzMbRYk23D6Y+VsHL/2YmJzpTy809ZrYSxQg4Ja4RxHT09dYMaMnP +2uEHwA7JiyMZvdpqipkQ8Mr0WI4Dv6baW+/mvCZK7CrZbSI8Wscem8mR3OPOQRVW1/lsFFvYyKxf +GK7KrKJ+jwkpqteygSV9iMU6yENlE/Dp3jJIk4XGoznEZgoJcxNMAOofykGWi2QohMp2ghOpGKqj +NMJ3/7+QbzIjJ6LUHlNhBbfyAOtGcHqAR2n0ECojwD3TqxgeLKG65KP5ujT5cDKl1RZ+bV4Z/xyA +ND1hoY/Rqd9dtzD2Mj4IIU/ocqxc8XoubE6Kgs+Y+phvrZ1/+uXYwMQ6odcqWKZlgekT5znZLy4K +Hx0KGx1M18zALSm1B9AX9ktwJlZKrDyRyU4Bocg9kTvAUPuLJloc8BX/vkai7uexe09Z5mYwPFKX +VmcD6XD6h57aqoSCxW02Y9llb0zQbsygqlBh3x17EUmnalgfOUYzj8OOEajJa7kGRGUCYrUTg1SN +3pRQJNHeeH6Ikih3XUeiH3FupKr49wFunS2+ttdqA9jCoyqALYznQ/eYqmW+0IjqDv3PHV/cwgNS +i4aj07P+qzLFVfxtvYdT2KsBRS2IdRwVhmdhFEogtxxRu3crAve3Py4ix5jQtfrfKO4QJOS0jdfH +X2/eaOEA0yNUVkCV3DUOclJfk3Zyspw4pbp4OWxmbJ4s7AHmssXdp09uq7P8b2TA7mc2HsxsZiNv +Muo15Q92wRXnhFA/x6dULigC4pUaQV7VFSGBB0ie/I8LwwgvsViXP8lssGFxHOB9PAnh5jv0uVzW +M8cns/f1cwZKlVlDdQpKVq873hMDuBUckIWCDP9Z5Ocq4J4TmCrzHrdJZGHBHg7/ZjzKXg/PVOnL +HNqzivimcqC7fjARX1Rpe3Dw5v2+sq4GfUwjVIupH97Tj7lGfqCKE6IL293NFyylGim3RHhHegKh +CnusH+lQzlWDl8wkxKrUSOfDE8R2z9czj88okAuDnB5UzKIBg62BzltKDc9rVgnyN5nSA2mkuE7f +/rEz9KJOYNtGWr/JdE3o3ocOO/AXbJUrChsr6/v2haS41HJWrAgyGUrUt9nreHaCPVHm5vN7pYrx +TU9tTOjksG0m1lHKbjB9jb7u2H5XHrCtb0LmYGVACIopXOJQ2dAHvJEeG2GfjceSCLh9+7ZW36P6 +MUeifswbhU5NfBwEnIwysMse8awjN3iGu60IGhnr/pf+ChR4EziHSZA7hZ/CtdMkUtOXro1+0Wjj +qXsZeRP4YMYVPpAYDXBZiBZar1PpGwIXKbjQOp1O2ETi8R3R7IQQBaOxGij2t3a5zIAtJkH5zDOy +BaEzNLcjK1lD8zAIfnLp/Gm1sAMOr4KcUVQgQZT9sslP/0hJhDzQl/kmLrlbdKJ6vlqwsrbQPrCW +scZV4RvSFO6mu3ZdfQ5rZXQBlfvkbTc2XoVpv0URtIvjMvZ2ZQBSF04mHe85TLGak6va/QWl4WjK +v90bwTUC0kbWymoVA2ugXEHidEeDVd25r6QeUkddqrnItbH7LVlUyxy9p8oc8PgLEYt1f2dQaR9z +PfOS3WfQqi6xewcna7ubjmsyVMWDLpSZEx3MaVctkFkaguLViPS5rH07V0Y8IMZGk7tt/ndTDcz6 +4LrSXs0p1jiQkDBx54sAWQyxD1LEknV7FEFK6iHxuXa+IF4A6bl1SYsciZw2bVANPIiuYE9Ej8Gg +NWK+LfTE7C1L5e9docfHAONYlPzgIN4EOQKaVQ7SYP2qCWOx8DAkr2NV8THGJfXqWUAtnwYiOtgi +EzDltzNxwHTagLU7vsNs6LWQGZmTj9vdpqK/Bk0/HRCuWPu9T5zSsIT+Y071xHv+DlxztjLkRB+K +8o+VVXlK+rpA176iXCN/wfHasCXNo2nEkx1DmL09ISdCcqMsD9hpqgIFJrpoq5eb0Z+wPYOlA7DL +osMsqSPVTAaH0ZZWxtua0TxK20pEqF81ucK6jeU3COI2ZCa4ftJDCB+eIkeGLkBp3bl1usDA+cGZ +vHumTC3sNs4LEpIQA0V6zD2PSzbklTSDTKlxyRzgZu3K1lZ8kJJ4JRsmTZ8h9kMcHCihRlniUiY7 +CLO+EBFt0c4kSDDRpkXzl8Vt4XEOm4nWq+SAVBir/YW/nu45uN/yzMxa/gJeWoMv7pnqb5PGiVsB +2Dy1RkRi4P/wHT6c80bcEvOv1fAqsHKZMtnwJO2Qu+7p7XBWATJdwcNP0qciVt2y9as4mJIOGSpw +bDMYb0thuwOXLSCL+6i/KTdQSWf5YEO0x8dM9ARmls07OU3Ge0I5o7GY3SeTwO81LdUaHAGeaiMI +8c75+5Zx2NL50fDw1U6p+2+QFrKbyK7zoFnuwVt70QCWrWV+8+5uVj0sEhp3LRWOnEUJmNhzwTIO +Dn3P5Skj6gym7+8Sp5BqwYV0DzPkmjvnGk9AvKPwpV9dIkL5zzne+lSRuD4ur1GWlpqHfh6uNsu7 +I5G32EtNpg3GlONDV5eoynpraBdSv8FoMNgoCiJ83k9AdVD0YbS639U83/Bmql3+3X8ciyODr28b +ZrfhTvah18HKWZkdocyHZsIdJLzbkrKmb6fujekIvycyYX3ZbtzuJU/twT1k9wZvYNEYLXwsrBBE +W1G1MWTA8P18i6UcS70US3KzH/0Kz/AEoD/GadjoWtbBA040hYUKN/m5LMKGryd+KYYe/bBMhOM0 +uKifzKFcih+7jyFbKtIHkO8U9UY6rubh34kAWM3loq0xWLkZ2B+XaHSSovLSbfgxI5ZFfrbLxwOE +O+PTzuADH4Xbv2ku7zW1Bt86FAg9IEgkbWi8bzhc8PHoYqLQfZ3KuyskHpLroY6xIKPNOfxI5iDD +z2JrzZUoPPGX+Kfk9kFxzbxTzK3wZZWeLP+Ven9AtC9U7wuGseQKI1SvEElNAIA0HePT/XwrIDt6 +J6dzbdq2jJ4w/RPWB7ijTA0Zmtc+KdJSTg1I37y2VNw4b4OFpgtU/zV/DXMx/ffTW1Kkha4TZG19 +KylnCs8XOLy5KUthxrR2KAsYXEYiultaWlmLyYh5TzNC7C4mZ0EOMurDo/asFGkMHwNOWxMDzwaf +XGw6ka4Ok5AxTyT8KRXeEWc2W7tZnN2Og9+ELZuIH4Fy/Xwn3SxyvDcI5lfYkdUg2ajyXqXG7hkz +H9vhnAwbmqP9FFbBB0JbT9JkVbKS0nuGHjQJ3tyF5ZuRfshW+DcLZIOJQK09SMMeYCjMFfejmpV2 +ixwNxkN6iIEmEZKpITFNRKdXB/5RleLKHhNOkoxQK6+2DeH/h1teZQBdZ3fIJrXLn/IsvV8Y9Tlt +v87EmnEO0TDyLSFf961qgY/ksCYYxFYcecjt0ZSyurGIA2DuNNTSPqEy8VJe1C0WcISArEqOvK2n +DdQ3U+W6Y1/xhGxpc1nkyPQiT0jo1bLlD7if17TEhUx2wJ1Yew3GQf2cgQ7qPHddyqvmIiM1buHa +ogf+3zX1zC+qQCEgpxAwU5joodyJQvct6Q1CmB39TF90znXnXTNBecLjLMXEt32L+fxxGQtrBL9x +YFhTp7a3+MYI1jgFC6G+Hu3XIQ4hv+e86gr/QoWmKIzRmIgngzzoItPGjDRj0JMw9V1cxEW+3rDB +6/hdGZpPMdJ3doxyshWRPZkBE+kzFc6BNdTrDhiCP2ZYHtReWK12WI4GCDk4vwht9olgS/mgU4Z/ +IvcjG1RPT4HUEIb8EJHiRYQXp6K5ohd3iYHfLtuDX7qVdmS52gXWJnQzsYkwZRgTny3KDiDA+Pgm +8rdyKDIUgWF463bhFu07YAfoCD2rvv+5JDxz2griG7urHoubEQ9VgIGKJj4Rqf+hOFvbaRj4NZvB +JIa6NlHmpTrYiqMFy3WbE/X4dT/RC/62dlBOhlt4w90VJNmROaAfnOZAD+D2Mg0fWI9MIZC5ewp4 +pIlFuw7BtAmyUhcq6oEjkiDrOXB0+3qcDITtOyHb682K/FwILDdVVfWqnLYnSyji8kHwxduKCI3L +hQJoNzaI2Cyw/BY1SRHu/jHg2IozSpakfglysEdYDVeYRy0x19bcUOx9dZ5UMNbGE7jbw+n/lVc/ +RMUVgGkWT7WSYlu0Icbp+K4Y5FIam79aeoKI4i/AO/Nm0gaUdOelnZdomSyr8nHI1tmU22fpi0PY +UMIInJ45sba90fVz3EajU5vvhhKlopeiPFOf5+9R5uYkwDAy5THgEKOcJmm4lI/21uuNBKk0mkCG +oxZZeQhQSNd/UhjSP5VhTL8EKqVQci1+XZru7h7bXHjq/MHecHiiGuma+6XG6Cyz75gV9Oi5YumK +URlXE9P+VJcQx21XqR4koeSqXAOA+lp7k6HxBUxYW5vqwaOpYL1dkVe34oU0U6fgPzkKbEXpdRqm +Gy/BIp5U0qEi22M8lh+pYDjMBgjbhfTg1CGSrIw6MTRQiuxJliGa80a8M8+1yHj0E7DPzlJSK5Ss +JBdU5DQk/SGPQxGxQDk05U2JQb9jhS8Ohsmk+6K+MN+vkLbwr6xvlvuHFrRaHcO+ulrSZieGlNsb +jLW+UxMGhs4ZGjKN4ro5WIbFovfnoa2qRNrc0a4lfHtYYBQ0S6hpRACMxV5P7/2/VMnhz7gQOxv+ +t2oNIJIgSxaYq9IkLlM8ThkZ1Emy3c+wNXzAoQvIFhDlcEjEC1z9Dm3+Ekr6LbjSupNN1ArgXtkk +yCPRjjr8eBhQHRc/vlzWCWN8nkPeqdvqXAgTXapWWl1kG92TV/BfSoes92KtEOObjhTgO3MNI3UA +5HmY9DgAf/4usu3/TlrjDaAAE3Xbkp0+j9znwAJq4nSY44KO0OCgs5prAznEwCFwFmalDY1BVhcU +lVrM0eBzuCHci54y/KPSjlo4q76qyEWwuUXVFRUPWGj/yn9WMLib0y3kcKpZVXRSY0D8pjkEohBY +CmTiizjOQrBD+uiQyNfxPvuCf4j9VgNC7oDr19hqTQkJJ1wsVYovPuo+nZMy+zvcrTE7Lsx3eEpY +aaoRMR82NWxAvn68mm9r7S1J10MfqAaN+kHH5K++rSCZljBky2DO1ShivyWjG4iCFawVrRM06O+1 +SD/6bF6C21boCnS+4dTu1lxTCL1djtQt6CWjkxb6kdmU9+i15fz2qa/ql+NteWcZUb7YN3AFVbcN +ZbIG2YD7TqkNsevUf+hC2iePvWpRvLOQMFEDWJuGEQadGGxIqyAm1v+Vfuq1W8Vyvmn0oat5DlJt +TQMI1iTWddXS2EA/N5pspBGxHV2bqK+1/IAVEsVq6W5d0fy2zO2ln9uk7gzZqfIFqBs/jiErmh1i +5ac3OMkKRqWkewXO4W85bwfXu0dAsSj8QefuETgBaIMV2u3SbAFoUlqTdIEb7cKf0gpN8j+uv4vA +PkxE7uxzxCwUdqeeigqgT36PTMHHKv0HykGZIH2fT1yPQcM1fb+ewDDovgm/O35hX3Sz+7WoCmzK +u4UQGjHaPeuHkan9CenYT+4NnDRH7ZIDknL0Ak0A3FG8WtnrUnMeOM99wQfh76HYcmvQ9nnjPKP+ +Aorv6slD6w2XWru1C8xKWcMsrELAxdgnH7zmFH9QMa/sEWtAggwZ3LEWPwHS/xx2UKr/f0VGQ085 +cBY/8T070hBpNrq3Uyhi7fjDjBPuH/Lu8Q2sd99j+lLuiQa6fo0TMgCpxCocEBYjd87hx/0cw5Qh +HhdTP2LnWbdAQhsWrLU/7ewA7TNGR8YKY6TL+llGB55xDE+JjqfW1leAK/pa7wEAOAaVSKxxmhPh +jjqgx3HOhX6VXTHxLpwx41oPqS+G6s0x7DtOolhhYV75ENTSNd9cmrYDCYBml2k75u7fo5Pob6nY +fAHQgeKwnrx5O7KxBT0n/HeiYOCZB+Bs7Za4CxgcVzsGHLs3sxAO4ZaY1TVXa8glT7m9U8OaPO03 +Otc4vEWf3Qf/z/NJK5ogRN4k0RNhMc+wZwGFb0W8180iHVVtg5+v2ux655dtzZ+9FPfrkONfcoZl +k6mjRh4GQmiGXjOEpCpn4wp2AFRqtyRmQZ3y6k9z8CbLjn9NFf1aPU8uB6SJIk3JaOzZ2swu4hCa +1iJ2PkDMGSwkV91IfPamUM5RIDOw2xmok4tUgmnvfLRWQ9omrYCrWVCiJqyQL0FE+4u5tG0tsUpa +G3FtQD5ycB01zIfNB24c3vKNieGSPjd8efXt3t9U/Izv96+LA19W2qP2/mb4y/t7pFO5j22qtcaE +We2VQkEnYKq01/bK5togS45o/df7EAQXxXTh8vC4TOzAd98h5b8DMpR2CgKROyfbF9oJNArJ+R1v +VG6Zy2V2XBObYcLDXTF3i5qq9rWnnzAChiGxsyf5h5NOy7ST8lsYu0nSZFTVNwEeDEARWQZa+5k7 +q7J/uf+O4H3cmsKu1AG0AZhyUE+AfXuFFPx2fv2k8Dc6EHUfxtj1rvVJuCCqahplclNmkqwwzf13 +x0IfphoAM2FrA8Pw4Vx2uc9xtSVVtMn0CTM8S0XLvb5orFsmme4EdyJCWhECa4ew/VdTk5rnq1jQ +DGFfG4uzfJQi+/eRLVF8Aq1KHYg85wJewGrxPw9HvyCzk349gMoU1AePDwgkt+VbX5dMxy9X5cDo +1LDDwGpY7G0eQRpfheuKAqisp1wG0yAyl1j5Hi4emAS3brTccBVVkhHdghhHCET58DqsGzJIa1yC +xGRoSDspNgZRzwhc4E86KxO77wckKeRxOaXQdZ6rrm678sU8QabXWPmSCULtZISW4F2IhQPEENfC +ZitR6DZhDCZSOjPwsXCcrlTp2aRRcZRDTUqRDOlGTPhRxZs6s5XzGaVsJea5ypkRe5iX4N9LVUix +tNTjgAuloGjsYtFTSOsmh12/b7vVwiF8iZyK58A6bqCLMZX5ZVf1+rfiSJ0/EeVJErTLPHIaFbrA +u9Zu7w2oU60t4BZKbQbMqQgUFI22wZkmXjrBoyJ+CAD0LGGwObqDzJfBEH1rNeI4tbPAqzivi2kM +vRftHPqCOkAfazhLe4zRCjbffLL2hb9agmoMc5Pp5+1ARFzOBPg9l/jdZ94v+HYFy6eKc8LD3BAp +PGtwoQkIYnHIw5CuknTyCL7m1h1qVcwV2JuJ88BzvFSkL37lY0d+EajmAwi2e3WcRf6P/x0KyHuu +gExYzdgRQMoBatfw58zFR4h/HFLa1p5UT4ZJDCpDNU21oFf/bR7nIRtKJryhH2CazGW+5Hk3EGN9 +rc+IOkBvBDXvD21L16N0Q3fR5RZde1pmMIyjHGRiTdm6yE+wefVMsjeCnUS7YG90Ap7UweonNdlh +PKKYGRfjER/jPaH58E6Ydhflr2M0sLrXgPDzgH025oOQ1jeY/ygUqWcJy53fUgbuWQwIMb/vqqPA +gqLBs1tLq44JCCAIpg64nnviVLGpm5VQj6y8sK1YFvh95fODaBLw0zuCMSYEDQptZ0n0S/C8n8l4 +99gmFOyogAgLTkInfaEW605v9Zrohk2T3GBm8Y0foD6kkuj6mos5k571O3OmGc6WeI5b98CtG6HJ +J7W1L2FYvI2Lx9lAi3hRA/9QTUv5m4yKEzS+8pn5UM+WH+vzMJ7dyRmV5WMnQN1/vvYFWQPcb/rB +mOULZmHgl5du1TwG7BYfBkl7XDShI1sJGuMCFhvjgDBR1Igc1rJQUH+Ak0v8X0pg0BcJK24HGboq +Qphx0NJk0bNNHhB6ron//fqpuG15YqppQ5qsCSjP6RxAc1s/iBMdysPj+nfniyfAKWa/qXqCA20f +ZETv+LT02sqTsfIkbSAQR7poyCcgltEv6nVf8lIeA9kMaHV9vFJbB9RPF/qhclX65tKNE0VjD31A +DYbLPIx3Eo13AcWlmDTnzE1fyHQoI8DtIxvN+PRiYnLMGPaGZ4uHYCSdx8fjeC0vQRqIBwgIztWG +mASQWpdSvDrZtQSBmgwVy+raxMFPdr7vLpLEJ+jnYq+S5TvDO6SJ/8xU7bItySbjTyP4rGWDcEEB +95Erx8pjUETCllrRk8m3XFyyDalHbmxfiVr6JlJvuQvT3QXX10MdxW5p9x07B6KkCTXcYlNn5/lS +NUDokIDdOnkMfZNJExVrd2i/p1Ch/OGRAWu/T3UaiQ+pd74F4xeyIDapCTeo8mryHB5qHgcawyPS +sd9FC5vra910VVLXdXiyN73Ml770IXURD+QVBgX8tSo23Q+IrXqCktUIc1TRGGPXK33DSCjyNrUQ +qBoXj+yxTiIaz0yFDugTDpPr/W3M8N0Yk/xmwgk9FZZqiSct4SiAntATQR1T5900fLlb6Stn/P3p +Q2PBEie7KTbMKS/b7iG02cLsh6TicfbeWxsBRmMKfHgKQCGoktSLKdNoKa72/5U2jOMCk4zn8N8N +NtiEZDeNuygzrB9qtP/p+Ze2nVoD2Pqo9sG6R3cytsbRxJGeRryQPlS08GfRNQ4J3cZHIsD3Q9Si +npWxuQ3yNQST0BSjwGu5McFfB+LEmp170NSeSXA13BcdN23x0ww24ChiXjsFqs4PeV95Vz5CSHE6 +Bafbu2hOeDhc6boVMyNGit04zpLJf146Vh0UJbKX22PyRRFkX0vZjshdiGro4Yr9rGuGvXXcs13m +kRHqD2rbLgqD3b4fCbU6FPp88lBuSU+Rjt3PSO5EHoYEAAoxtYfJ487Ha7OGUML6mG5QOVsITpRJ +x0PJahEXtMJ+lVFRGeRHyWZysma54/ELg5ty2oaboajNIeVKSBH1DWsVqvleOHn75iCVeoqHxkim +KvfsN2zy2t19vVAI1v09cPkMEdzUC3CDLjuXjbdlEvsr1OhBSc4HVzSYlsWubgRW9jhaarZJwhYs +Nhw6cPgdz9ZpjjbEuzqLN59HExOTmllk/XoB1Gz6L19koJqdhayKsvhgQSBg8cUoNxZ3WEwVb+K/ +1AAGJYQ9jZulE6S+oyUoGd5+PcmTQZTu5EQle1ZldHhctPPBoReSrDoEVsFAsK0zdL2Nh9pU6UbW +esibPEtMmNu4a0NFrIwI/wQxFDX1jXhClKYNCFdTVt4ithi3X3ON/N/NYh+B/TYFLXXg62UxSwSl +/2bXOLwjENJ9NtEl/Ivqogs1fpXGkzJrhpL747oEJy8JnBc1ztTg8xm/VqukLRDGnS8MJ8/HhjqI +lJZERZtBXoPSrE6ltMstPzOvLU69NxN9jCaZ6vh4aK9w3yJuJRbynQi90z/+vKZXiLfVZOfr1vwO +c9q+Sa7Va0OxwUHeCk+sMMd1fhwJ3VbVIyN1JAX7PGqMad2v9FzZM+lkP3z54mGAov8gP1DzfmMQ +BVTfMsdjXqP5dK03QA+ZrDyBpDldSbK4MDtMBoKvsS9oBIgy0KlqXaVodsFx/04B6/juW8koPGKa +VPSYootbiDqaqnT52MMzMnyuMEm2I8TR4nNsMmn52rv1nc0XPx7KquC8Xz/y5yL+daRJs4gyUfMI +LtBW0YZtIPJZF1qNMLR9L5VzlrF5bPcQx+PpyZ/68Zn+rOpmqu36rH80WX7J6xfTPOFmVzK7i+G6 +wTLKMBTUhAoJSH+1oW/rU6krQY0gjyA1Y2MQVtDoIvVZZa9NDWUrMBdX8GIvnOOMUXAE6jqsqyt0 +qpNTRcFNYPf//w9fFF1w/yJ4cewirBw7sQeRlBdM/2lVwewVAQoEPQZnFmEICTf4ByrUss9eQLxQ +HOHg4oEramZac+6E1u1RUEbb7olUSFK9VtUlBDTqdGdk4XG+srto6vZfuLC3/Tt/gumLS/MIM+kO +crbMdDQeGu4CRQCiW4DD6tA46Ntt92FkvaVsojZE9E3wXIyuZDshWvYWNbVsQdoL4vMsEH67YV8V +Ga4wH+H5oT5bVVuptR41V3sagguM5Riu9POeiBsVL4bh189YtjZHKCktI9CRQOJcvV4I3xa8x+JK +w53G98p08dMxyTBrOCQyYxKkywq4uwvICV7tn2iWpW3iwTLnSK1KnAn+2fTnmKxjygsumz0HyLXD +LcYdCiwHVp6S1NtmyI8iTvgM412YnrkqzdOJrFqokmaWuVB7B8I6whgHX4ruPXg5u2yRhfT+ZLe0 +GKq1C567/7mRcRZzdeTvGdbnYQ693fUzEVSiC+IBfoCPcsgjPVS+aK50NRa4G4KsqXGq+VSbLT++ +vguVnu8G9b5bXpQK1gmQtSgkYq5iHFIcDtBrnifSIPWaR/HeLV7tNo6x6tK/o5pFXbgJPHwKw0Ou +3j67VBCuodTny5uKtiJPDwd1p3e6G1xbs0OIfZCuOlXT3kSzS51mvw+Pds/u6jr/COnzssn86XNh +Hf/vSIE/zIKW/RHE9wP3w68ACNGGX77DWGbzNxHcoaIUJizaP9o1NSofvlLw26ZroVb5qyJfOco4 +IbqxbYn+lYmNNgx1PmXSeD02lcImMr4noQmrw4xwI80BO7/Dlp4QXDpWr6GRwY4hRFJwNFZX1ika +s1lw09qHw0pNmrlUPMSMryDviKnumg1Pzy9iCPV/RlOK5xl77LcqC46O89Yn4VXOWUgW/rD6bRVq +OfaffYu6dFvEXeskb7/lspj9mcjbsX74DT3EcFa8ARN+6KnkidOsNKz6x6SdQYEazY6fRSlwO/0z +kZ2SbwOgeL7DidLLKrmCzjZ6WeLTgas2/eruwSlQYjoapDaLO88QFlOsgQNxMmBGKzj9tSiU9AWM +WXmMCWbJrl+/vhBGm+NepIIbRRWdId50/OQvLoZKXgB/7WodjW6wxgap8PzR+hZaEzkeR50aDeva +nItqNswI/gbGnuJ6/gWauK2pRgX0O57ppLxgjOudZE7XzYwgcMDGDQE0IQzOFqPeWy6/JelSnNVB +6Mj1rSBXcDaNjHj8/D92RzLvQBpCoMEiXhwLoxoqhNQMcDyO0+Gy3VDQhT7+3rooUYgag+gJoyXa +EgkjSenO/o/a5GBg5eZ7fJPMSRsRF/gszPMwDVlsrZwLwRFMlvobZKvCC9S+Lpv3TtGhbXevHNu6 +RYQAQoLLSrVufovvSnjQE+CqV1Jr28AvmykY7SblcXxJkhc4+0rkkyyeNTVjix82A0C0oIPBxBja +KJcQZ1xbxhQRfBbrvWgMCvobyjZrTUBMWb7vVE31lovGK43XNw2YRym/i4266XH74p9J79LpdxYl ++CEemNjHIALQz/aY36xUm6QLSHaZIaMALfp0G6qENxaQO75TzJjbwXBK51ppywON0BkTta2QF89a +Rl8yVitgABGunTLZAwe6PCg7PDbcRU1cXuu4vQ6AVryTObiIv3s+bEsCWWvIgDEDpF2piTnHligP +wm3LA2obS2pyqZ/kmcTjQRtmc7O40YnTM6bD4GBvXEXqAN8fiz/xT1SW2IBKwCbsWcbTZbI+19YU +qs0DIVr2GtXGWOY8FwNJds+lmHGppR+zJMbkB3Avk/W7iMDP5gZVlQYD8pdTkJw6HOZW0n0imt5y +CE+/msjQ+bpYQnwekBivM/hL/+0+miXjrRI8TCSx+bd6PP+m6zi9YKg+tjs4Tc57+RkbHMuYGKQX +lPTHbt7xscnLACICPSHLsLqlBzi7mnlBO3VIpvWMbLwGlsGcfWzi8vluFfsoUyjupGpVw3KIUwso +qsUzdJf3GPmRxmj7dKf7w8mIeWsJNkgflhotHuDR1+EblmUbrnwOQejDRxZcrpmwc5d5qqDqrTKl +/ZpYZtMewUTDro1b6NZXdr/TuIqUhCpYwJ1sOsgWSNdP4WJgejMeRjjo/YUJtcWzB8Vv+RxEJ/Jz +YMam6+VPlVlOKiwUoJNDahlzg0Kj6bGzCp//6+Uetp7KB1ale2ejEkuM368Yta8GXrIrTVIT62ou +QQwNC3/+9E8qGuJVmBnmUzT7ipUBVu/2T+4ANQxWv35oE2NA+TXFnzC4I3UL0YyHBVCAp7k0jKLk +HohGCGRYaGWD2rwfj5g21CFzVHnxy667dZDYoHg1Ax0nhOZ0V3KLCdTSbA8vuNx21f/61FGlurLc +kq/7LuobFymLME9h70wbYcEHqK5eSt2fluUk6H/LVM9LypACxbgP83BaIz966LAi/ABazgmJjHId +Nu2yGmkPhXI7ZJvM6rWBfD+zzTwYLYXMYyI8zhtxElNpGeQzPZOcQbiINT4fgOwCDLcb+yC4+EOG +08hLWOET45jrmlgjNLXCvkGIkogejhbSvi5KZ7jD6Hx0Lxs4NFTlawxb1ij90Q3iDTLTeNChTKVT +P2VE9LVkUAV22wuYVnocoEYO4cyyVI6EBAYtFTxDD6oJ4B0u0KIqVPd9YpipWkzONQSMwO9kZFao +ZLRskBX6mA9mv1ntLsb4N97RxwL6ZnEzNDmNVH58HiurOGOSSl6lxgCnAzC8a2gHeYSMg0YJ7uGa +e8HTwXlsqoAAENgDcoexlwzM0aaG3yduQ29yOsUefd7yvgFZo96vFl2rHKRYB44PJ1kT786jPnfD +mnlnCPTYj/KQ2AIOt/WJmcHMKiNeywsL64Os9Qmv7WfMar9/d5CjqDjDGeeKzdJU1aUUANgmN/lj +HRIsmmbAUnqXnNydruLxgdF4gzN21Cm3yH46/qwrmuVru9v5hDfU+gpH1zuiI1tUr5jY1VdJVo+w +qvKCWnohbzWmhQD78ryjOKJhltnmVM7MRg32rlYsHvs0BMC12pA8QSpUWXdG7e0fYtyJcudUzRo9 +19sfwBGIrE+Om85aFP10lizzSdo3dmp0xp/ZfC6vSlu/6thfWHVtK8ivNu7yfub6PzYmnVfK46ay +gFOibOHzsu2dP/kfGnN9wi3bWSDYeAJt3xJUNGfVXz9dRft7bRTz5rq5O8CH1Ay/gOF8d/M3bFN7 +fKxEiFXILPQ1crJjBPMb4PfJyVIhXYRd/M4NJQp7cWBRgb6s06Vi7XMsDxikGsVzP4XWuJDXEgcn +Z0kRMZSU1RI4hg0eDF5uUXXn6fH1xiYmUmoWiff32iEyBV5RdZGXbakpHMvtPg5saeCRNQEB7glt +7dc9CV2CriwNcfl/1R6aUXIq+G/lAN7i8Af1uIQfWnLGedDN6RHQ6d75noREyqUIWAE4VffWO6D6 +c6/6kPqq8qEI/4HU/vvs5Dry7UNy5gx9ugSiLoqq8H2ad/O43wqJBUS6iXHR0V97d3cs6svHdI6w +ha3KRC6fmQhrcRcc77qR3IorqYVC+iE7QdUT4jVncrVnn+doGuUeyQFAiR+XjfCCgvyjL0KEtnxl +YS4wn2aJ9dNFcZ4CrBGLIemfX3xI1QgW2k6NeM6Zl52LyDrmPGSppwQAqTQPnMeh5foh4eE+Cb1q +O0GV11dJx5ARQ87+vS2bAEg0wi4QY9JbMhvklxkOjeHkpkvAGApAPGOSlJp6JYi3QT5RY2TekRwD +ebXZOCA6qjIgArsYsTzQl4cCKl4sNOOsXBF7gQ+WFn7bd/CJU4rUQRRkc8G4rYK5bTiSQqfUlOTy +YVA/NYRsUTmjqN7rMfovcTjmVwxGOx+u+FXesX76bUwCkVCj0qKXS2Ec7NXrn+ATOJ4+lc4tB38q +FKI2k4jlz/h+BFtyejTpJo+Mn7mpgFYisL8sG4mQFFhbMbgd44nAGH40lq+ppzwWcPM7ktA89zNR +gT3+krx6E99bKokCIeI9ingoXvJr+sF3qTEoBskqNQPB+VUuawm9qes0+paSIaWeY7lJytGLz4r3 +8W96pNjjWPLy6zzlj23q+2Sq1dVvEXBFiPR1j5lCoDhnufBBoGK4lI9q2JE08aLXqxBX9OJP66uV +4Kc1fk1+Ob3p1wN6eeADFr77kddrXu9QnQMaqXcL14qA58nhfzLNCX3IHwoWwwkeOPtm7VA5f29v +AzDHZXgrS9KJbO1MUYjSD9fGiVh3z4BQSP+wvQGySl/ZGGp2YZv9urJWwWCQL5HUD7VnuLW0HGLD +N6qIMUGCvwvTMSr8XuxpfNKIh1/da1kxbfxwJvSEDNznHpVuQyRq3uzmldY5jMPlu201nc1oMG/s +T50pqcSBhzyoCu7ueubCcbn9+tjJNQEig/1Ayl73LcqQZ7V49nyPF5dH313PmTNP4WS1BFrftLyf +rMCNbmocHhNi+01ypq6hnJALvDaczgWhSHyDVJk+CrUsR83KMnfFO7V+hVhQ6qQKVlv2nHeKdXaa +NExeZ1cTY2h3QUbdS/dgoCgv9LKtpEDoVa5Y1mP1ykMVCNqFwz8up3G4oGXHBYK0xxSluTXHmj4Y +xicwLwDygF5B8Rk2m4g35nxJqwHKOej/O8qyIJYlrXV+Lsfcg8tFwnGLjLJ/9OnzEPP5DLAuFFeQ +iFxQlxxxZVo1o2eqKwsSx3fdQWyrMLjih9CWODhbX4nU0SoRvdHuZnkJlA8FCHWcmxRCm7we91hq +F8J82+1kXqdAdVWy4eonzViUuDeuxJj7xBnhg/Qn0fVUFuMuMqkAM4vkWTLVlF9nnlO+RjDCleun +Sn6DtoqHBTdUiQR+2oHOhTkCD8iAEhT3PmEM1pfc4Y1QScadXytxGJyQNx4Mih2w7nwQHR//cHHZ +RcjDVDqc1QeOgkI1HyOWlhOtmueQQEDNq4PZn8V7GW2/Tx2W5i81evWjuIv/qxinobJzyqgIfN3H +ECRMZLhe0ciTJwGJUz4hBnH0QiFs2bgrLNbKfnK3YcxLKnfxJAQzOPXQ4n6S44wwyk0Dn8qVGQQS +6j8iJsjz9n1ghMLzsIRoWsiVSENx0f8izeoHurVuP0XGWfIIMu7bXSf50qlGibeW5WDJ3UOyjWOh +5Ovvo8XH9dNe199r6nTVaLWHfzlKRQ72XDl2O88A46Qhs3aB8adaHn/SfPq/fCc2X79GUefLTovd +LUu1B2JoZXAbjFf1W4bT3EIF6A0/h5+4cCfO+2uFRusAumrJd1lULiiwKCw9s/tUf7ryxGcekcX9 +ItVC+UHVUVZC+AtSJE7XTvIcqOCtFgUJ+sEvj1Hk/b2VX7J3nsSjND6E5juQVQLg7w0PG7MofNZd +t9npJo+vsZsSgscrxNce0g9Fhw7TwwvuhNdRo6jUw0K+4/4+biYGvYOpqFEN+D0688PRsFDrEwka ++DLDALH8YgCZAUQ0x0iL5Z6+/YEVQ5qkJq5LpD/4ayhD2KcPnNVhmq+EvKHUL14om3IQ+kveBI7A +lY/TmB7auE5XeIjwEQbk1a3ljsP37w99TaSSgGIHq3ODgh2zn2v75e4iBOlGN5XbKVaQ47t/Y2ZP +7xT68iuvQsLvRyODHRLA2RiCwMErF7+mKgBXOdBPiX526pvLcUmEL/oB6QV2wgA21TEEjoi8FIk8 +NgVFH+SAEjGPh4Yyh0nbQMOz89clDhRL1gDWYUKsV0F8IXdxchsFH+yYOLM/VgLQYesUhehLo9Tf +1jVbyUiCkpKXPdPYF8f9+VBJcZp/evDe9yYFiUjQfYB3MJqyIQiG3BeyWksAlkyhaAYaEbrUb1pX +93pkmV1Iu7KT01xdQS9VhjAdWOoPo3LwwbCVu7e8qbb7FLqIBrFizUNZHGJPdYHg17+uDaWfX5nO +6JoKQMdOftVuHqEONJkEK8yvER0aOHavadZU508TKmvC6D/i9EPZa9VBPPCsIWq7gap2hP+lYZfV +mtgA3SnRKgeBk0ZGYU9oj+WPVKUZI231K0ooi6zr0En6XgTcDLudyPCciHHJAY1VyYPRzj4t+Erg +hxvA2/0ymSw979nFYI4KW4LUiWZUA3UUqVnFpMqTJRKwVmN1NskyTXxirNNTv9kouxQ+I/8/ihfF +zBvXAkQx1mv7e8dahws1IP4XqQU75L9XSzJMH/Z+680a1iIjTazwMKo7h1tDPkgtIzsbHIS4P1/W +3tcojv09nYEWv0P+VfShDRFEaOjWDV1+63IW/5jg2jKLg+7OPRlF/Y1qiRxkA67bq18VGYCXqGe2 +V2A0ReFBDO+vhz8EFSens9LkE6h3o4QGROrdYJ70kmWl3MrFKFyLC5jetWWQAigQkkkF4MuuhoCt +y2PYL6f2u2yeQRYDfQT5X3fbxKxzQvHZOkJpV35wjMtoy3VBIEnOv1+1eEuMxk6O27G0lfK4yS07 +/lpciv+E85mw0UY35wXtgOMCGP0Ju3J7UaY7EHKrrbMhzUsIUpztK6BVpbDna14RFK0SgHuzF9o3 +z9WCErzrxAY4ktHU0EHcvpkIFujZjl5S3d+Rjhc6bsQRzVrSPItaN/pBOisLQJE0tmD1pw+V4EI/ +kdhhVhAtZrHSdbrtqTFkbiTxgZKIzobnH5IPOn8vVsELwBt6oeBriQAqFS+ZJBzwooAl1/ND4TWV +NsLNEaZ27LgADx7IzC13bsn6p6zbBVkvqSMFJsjb+2rbqUqJl/xNDCj3Q1Z/hrRlb0gseGLlAGhI +gjn5wYLgJhYZ+8TkWLv1jwYudWxeo/von9J5hV4Bs+EaB2mF+Ch0hmf/vmyy5gccgtR4zUYbkkb5 +BOglazCATNxMq/yKwteD6XJe8I+I4wTURRdaOqTb3IULPo5OmgCXoE8N99hFVVd5W4ofcjB05kH5 +ZyNEB3nayz+Ql7GNB/XfKCau++bKR63zFomoDpw8YAJ9zSEYRGIAKATEViOeG1uTB07fZmVj2DmF +sHH61nMga5cyHAoEA4AMQa0lfkjdQomCVTpoj3A5QBu4Cfo4DQfggokIw0ZM/+vA5XRx2tivJf1E +Wm4ZUry1pNtnAZjsGPD8i9ZbaJt8nQpdUAxi2DxYC+aJlhBIQX15hRQzN7OO/xeVJGW97L/6jHUG +PBs6uRySWSCtmcO0w2kC+MVXoN7m9QgjBC8vYWRXYs26WlcTw/NtI1gN7QeSEra9XTYdMKlWQaRB +H/rDZ9laNW6kc3vXiFMhtazgFHPag3FjZs4D55DuF1KXv62g/E+zZrUBYjSUTkShZJTtkHhwaAXw +QBFnuhuqrByZi4DpeQ2hFCenH3gRZLPrpuqMC+tCAfqF6Bnv/jIhwFPCtLQfR4VzRP40kk2JBQ9W +680nsK/eap2OqR/4x8CRXJArEVzNmaLWPOZv6BkmdqeT3KSCGAQYPb96egXUtKks+FWRQVOxXd1V +Xk+Iv5v32FVsQKqfi8vChprzSfqXDdpmldPwEvdnjKLWLCSPcg3OF/sFt4Ydh4NgD5OFMT2WqoCb +LCKe+mgnKwreB2A0SFqwLIr7Ty2hBkOFMUn3TG2Ik91L9DwocCYMOcdfy37k/08U3fGHZ61fIWR0 +FhEGvOMCRPbsagfUYmo2B/HVbLenrksa9S+bCLf+KQr8F6tJP4NO9GBjO0o3N2yKQAo2uGiaDQHv +0H6WVcrGvBwhhi8obqLWdeG+X99rOYrH+ypbipXoS2ZIAa1C+af18D6K0tuWDq6s2Yl3dp1eUtcL +YQCmzANJV5cWnChJzLjFb/eKQuuw2B777Z+g4zZn2ViXvaYSmQM2vmM1Xtyn4E0Py4dHdkEQXHHN +/S7ptnu6tr04T3EIsz8E0ivT2cgdRYnW2L1Miiq1BvccTEyJiwW2asrtglOq2xGiKdSwcbQsq+dB +JG3YkUHoNowa7XJhPz2rYg8tDWlVuRQZWLrAeZGSSJzbWY6WtCXAxzB5XGK+C9PA4gbOwtzFh5Bz +RZGz65oYY70Dr6rt2WgE1S8vcnPaMZ8353xL8t8uhYY7Y4ibLVGnkSwDgnEEaundTsQVHETLnvJt +VxYR+glkp5KP5s2OVKgRw5ko2phK/4ZCenWHdsSeVQzi6zJ5nfU7BuRbA2NJcKUCirRQMNV4kUEa +yowkg7iu8Cm81QQWtS0kZgf74vYZFQMwCk5+D8WRiQuNi12/vvRh/V0OXX7VosFZ9/uhc28JwwZ4 +mujw0TWIkckk7BAJDiJ6XxfOnbEuG5grQ8HUgppitqofcQcGpKdQS6+rCDPj3zyeIVMinvoJ6squ +hVX2aP15pAGgrU5so/qu7NrnEPq5Cbk1B/2S75O9fHum2T3gn6otruEyBQE79zcnUsIgh+MN4tMC +uYiHe7jMGO+FFWKYyDZSxQGgVTsmyflPbYh2Soo9FqytwReXhMEtpIj0yr705Qr736tYEfrsPfHR +4TSOoDOZfl5S1C2uqS+szqzwqSe0+mhmOH6buoJvRyDY7SLuO0pjFMsAP23+L9xgecsOwbkahww/ +SYf5Lz9BUw9vWletrth7Fu+kXABiAS1OMfWgGF8Z1ftzfTntsiuYoOeSVvr/JduToY5U9ql+94TP +7IpuhuMPfwHTaoQX/QbgAfhBdhUDgjweeQJgk+sMt8O8i93Qc+RI0AnwrBzi0Ni+EXVo0e11Gq20 +L8VyUjCE/4nvK9k5nIfjlrGYVjlgPDHWq/logUdvVf6qZFEJbIqygbsOVFPnhriPRgPlT1wtf+dk +ULGss8fZarxFUrP9/4AoXqRzjysgG3jx/NzqnBN8Tfg4i/h1HZ3KkRQQjj5gFEwvL7HvlTLd9VS/ +rJ1DpMXHXKQJSNrdPnOQGviGZN6W/FADUqnOkcy8BSoxQWeRXqHlNppkuVaE+9cVIfnlIxzUxpte +6+D+lMfnN4sCPkLVIywsXiY7TroNs2y6Da28bGDNAJFkhba5p5tzoyhNKaAWyVkIvZQlj0WggMHM +3E1o1vmXjDPJv3Bml6lW2fWjp5FWygiz38Pd6awXMNqK0DzEzSnEk2bFdrYE02fJSaDERz1+WzPO +1V83uXy0y1Zh5YxQFcj18353QGkoYAdU5seFGc8OslPxSCS3Z1+gOxtC0hxviLsy/rLWYBHl8OkR +tSEHW5b1WylaLqhuX3GV6JOA3wzfOefADzY6R1Rg4l+qoYAs8Bme4hTsCa7mSbmwz1LNkMnWW4oW +69CUcLjZH6hE58h0l2pvWN44jJTnx+HZsFQg36+EKn8W1XZTIorNOGzFOnwEOZoyG1PeQxUyI6hZ +rfLryTRA3A2QgY2iH9fowEgMU/NAUh9vbJ8iiF4UTgUHUbNI4MKfOPL7b+aeiT8tUk8hKRm0Qutw +y/Bz4AvKtIF1P9rIrpLT7yRN8QC7DM56iZ9DZG1x6eHu+84GBjMlLkX0SoRldsUz1xXoCmj7ZKKC ++huZv03hE1xSRLYFtiW9CIW4o870/25X/TXF5D1g8rTWxorqnVcZ6HGSKhmlmZleBFQ22DsQupr4 +9TWu1Uj4OO/qbdvwBu7Cst0UkvSIijRIfrFMms7k+ejmDkWVJ5P9aJzuLnAmTSbD51i1RGH+Lyw2 +YZR/Unz1i877obMdZ6YSzFv+AoXQetfyD2yLZDYwKv1t4evDnfER0m1r/EkU5tufyKOO3e8kKIay +O+6eWQFFK0C2WCJRAEi5gOq0/e/WlUtObgfOvjnZ7C+z/1UHnOLRtt6Liu302Tn0cGX+NvcCYCCk +62mqTmlaW7vxdZiutLrkOC+t//IKQBdPK3ElX0xX17dbVnmhdyM2qWJEIEwdDa7oZZ+w+Cwrx+xg +jAGV35WAK5IUIb2CuptqesRZMmUiYTgOVz4k+WKZ35GJeD3Ha/DuLyia3jVJLQqR3oC3PYdZgpZz +OiV8aQW5+zLDSyuiIEGl0EM3TSLGmrXe2J9RDAn30+GoE6SsRVr/InZ3rigXhgzy20be363Rsi9P +tgnSilZNJk8iVS3nWvV0LRxmUZUPn3R8Q1w2IgcROtpbkJmhssdYoLF9jRvfxamkzlMWtMi9tTYp +A5lfpqrSx/0bSNFzota+6w3MPPM/RnrS6R2ayUT5i1rJoblXI7xcSCgTNomdT0EudCsS6nTDQZbm +e8+S3WYqJnORugPt5qbFA9i2s5+ZYbFBDN2aQ4tsPH+l9UQQ+2RbY5lRym397ZpRCaNg3i0N6446 +cd2zXiuoGLoF5NNpDCJ4cQF8saXdK7H6uqR06qoWqomQe2YXCIojpI01dZmL+5QgJM8dxEzLE/TD +gquV45CcQNa1qhJ2T/DooBuQYpCZSTQ0NCeMDLXQqtqiN5eYcHXWvnPTX/yibQfTbg/ESiYFijwa +iePddS4PQaCrSCbzaCmu1SVmjx/W85t5dG8fM1R93bpTJ7wOthH6E9e7GPXEdijbdo2CBd+MELGs +Bhs28Cetwm7mlWgGh/8BsHcnAzEe3VN9IxFQfFKH0JZqst5gRBfu/ZOQYWEgBnO4P4MP06qZ8ehW +6ncUKVIIJ7ogC2ERDMPJqHX9lUR0d8yIxS2B5k1VSTABPvQME2adHvEXFJJmjIDOIIUhP8gpEoA/ +1rADRvL/81J+bD6bsJ3o5xGJdZlvvEwRfCE1Wwwxa1/3TwzWYdwu1h1QtWB1mjdPCi6hooqKLZym +Kp8OhXh6LS5M+22t4rQHJNb6joWJ5mmPyAaXYCTuWfrUnassiHMUG4iY//ZWcRamvu10G84uGmxy +c29p44W6uqj6r1fD2uuRD+ckPpLnCRLCG1s4Gd1YDHHhwHtzfYMLrNL8ZsMxjylfEoAuWAOpm7zJ +NKBsfmgs9Na3600rHmeqDUEAVIsEa6g2tTemp/jlp06pu1LrVaqgPwMnL7Tqn/AeW21iN7DctF8O +3SfChpeUUANhMfxufZteCwseAUJOMZDE61gLv+ADHYUXSan6DRiG+omsp5y4KLheCSp5hWNaMwJ2 +zFiuMGh8qMxk4UGaqKXHa46cqmYdRKPmR4LEdhxzdTulXbVGYl64cVcXwx/7maDFHuVH69mv785p +6Jf0aMXhm3AysjLJcvPpN8Uj0Mmul/hilP7kb8SLi5iKCMzurqXjJMlPI3EacOGoQ2TbHbzJc5AX +FHTp5PvNoNIaO36cPNA/7YcVWHmzKVax/kO2msC+jAelzT6PE5LGdlsbaINfwYEF6wqo0DnS4ZpJ +M6XMtsLOhxzfxGBi/bMBLNNcdumAIcOtO224JnjfmUq8JzqaJhwSg9WDaz2SBI0xui7yFOy2a4/Q +tioshN3U471tYbsxD4rwDzArZJa9KptJj0PTcqj25O89hAvq6yFdhTOqHIoPt8KliQkZpjlEKdzX +BGYQI0jzJRNbvvNFqaO3Tzk2KUrn4XnhTE56pd/GvPBRGIeZM6c7t87VIDWu7415qU/drs2xXjyC +8w4NFDjzPo2BNJTqm8idTfnaz3n38NoriE1BM1UlgpEQY/I0YqkWyKfjmUQmB63obCNJyIs0Wu9Y +hmKaB5LQIPuVdCt1LHEKZPO6P0UwVpHrXsGTYaiIR/hGsxHVbr8NGa0u9M4D3F2PInjAMCTUfvec +qGbNFzSFQs8EhpUzgtUMMu0pJRsSBj60kYhvqI0UH9ZKj2FjqlDCBwiCsMPwCB3MGiGlG6MILwIR +4PNNDwEjdHby1Ee+p5YmEtwkUwpbj13EFA4ahzUi0azXAK4t32h/XC0ZhlNF/MJphC1eHdGMKrhV +rIHDXziCrNBLVKxqFXO1MHkHYaAeOdtuFIbqzQrlbsjXxCum9gY1lqmiILOzQ0yeR5LiF1gcRW0a +nFm7QW3CYVhY1LrY+NQicR+MZCK6Vvs8NTngCjEj95hWb8zoXp/6zHGnpYL04G40ftyliIj1KofD +IWGO1KLDrPZWKDlQOGWUcZMLd86flj36QfN3JqaFVFBlniO1fFCEa/JRNIXdt8Tww6yBxpiv4DEf +pB5Sb40KEnVXLql1ucpNvS7G51tdiUrj054vNWNXu3FFVn3WYrMo5m5oLVUKT4ja7onAEvhiJACZ +ofgZzM5GChy0Jl5HyvFSJlkIMeCgO8eLmzAYjkOJC1dN9wWhNLIxeJyMZ1jAmgVyIMwg8Fp0uZKG +lFucguP3EhA3sH+OgKUo/wWPYKOoDUS8p6QpQu+ldHfB6TS+/v1fEUznztWB0FXCuGP59zrgVJnX +HQ5nnKDkgdliAwj+679ijYjLx3/ze1ByPhW4Nyh2MgTy8U8mf24KgFk6fChX3E+c3YazaY3w3NjW +4lqpARUY4VaWOrYkbvFAWVkw53iOA8Cgn8kUbSoEVxMsIolxlOEEefsn1p02hcrWksDtubHi5LZf +i7XQbBE34eBPhWaqz+OwtAkFth2YfdPZ+bnGVQST5zL8V5zaMlHX1Bg4oX7OsM6u+aWIM4/yix2W +vOWfsVWg7LoDPCMFh8rpVL85BNFr06awqOF7NSY9tRRlwEBDn8FVUBILGhvnr5LtKFNDoysZedSc ++Xq2rMr9NVnjwTCY5gLJKpI3Zj8ukftQ/rUAnvXvN5/iRFfyYGavdibynEqovnwhx5BCAYFeGf37 +I/sbxkLub11aP0VDgJHr0mJzDqr8Fy6H0ykMRL/VZXkO2VqqO2yOp/bQus8fqSv+Xbtf3mfqQLLA +SNyCFgehSkE522AVsC12G0Iah50Qp8WOqDmV0VV5F3Zqrvk0nz00cb/lP5vqWvxrWq/fG+MCEguV +Xb2IGc7Alhn61wJ4TmjJuKUUUpNjMi+XiT4RHB576TgfOGjs9CjYIpvcRY5WesZ/n6MLaae+73S5 +YqFivt9jQiKteyHLYwPlpT5kh7McNiuuNdhOVbGnQdQ57hsgz4PGQMxWWUubV+PXrw+Tt+HXqUmh +r9C7hatmKqtlJMAh1ReOljoIYO6Wvu4vbM5Dek1nIMw8D3uyrOJKGQd1RD8HNi810tHJmZt+FDOI +kzqTuoy+c0TCwNe2wcRymsllc3fRTa0Iwox1YWLHDx6zZTi3QCTteTez+hchMzRqEtTRpyoQx2xc +9JQmUTWakq8P5KTsQNBgJlOUB+IYA8TCCvzBrfotP/xa89oawhAyohCPLTIQqQkKohV8uENE2wZy +A4YYrxYtuTdvHhZeAEEGuydDrEc+qoZHtoI9wNtDJttNmNB8hNoabRqKr2wtVOBKX5x/4e3zIZi6 +kTeuGQTqn4Bn+2hl4ycrsy2lVTeEARBdhYNCqcqMTgDtBd0Ysm2gByoeMhflA8pYAaTYF+f7fZhx +BF9v7F7PRk/0V5eZ6MVMsURoRaVO3DD57rsdomwAJO8OFmw/oaYU2YOH1fx/XTKADxTkV9uf82bn +KiAnRvaS6hfjr2OBCzY6SSeSX6codm9ot5v3voZykt/x+AQvuiqvlye/GNp+vRBvl03swy+gE5q5 +TObnLCYGDuIGXl8EI2e3cUvBbosd8gPfJRL14ndOvN1trgOCx1LuJh7ahZmzxwL35VhwPMJ/j+w3 +BL6+fg6QeKkPOcIMKLxOMNi9k/OoizhKrdRuIlhYuXsHYSC5eiRX3Vbjz/ASdOM45+n6xvAs4g70 +LliVXryuZ9K4rK9qxERwRt99ouhLqJRcC8WmVzK6TfRwKh6v7qQoUruiDC4PbyPUiUf76uEzTc+2 +bzULQgJw7bdV2UiGS4ZHPdSD+Yc9Go1DVn24vl5wuGlOnvJLubn8twXHFffwoGQ0/tZpQHs+U9yJ +SplKJLYNWZxg2LWb0mBdJxo7NnDTKiASOVAtpgFz/3DvyJV9pLfgICdPYA9EI7TNku6jzGkGgYyC +XAu+5Wu534KjpdurF3TH/iBG54njwu9N9Q8imEhJrSEwje2D1ZqnqbROFXcCUbydOi35lrNkBmm9 +JyIZ1GYMEo9YO713u0JJRhkwKmcobNIqDXHyT0tC8TWwQ5GxtkNsFq0CMmqcUtS3XqpuyZgbivHD +dZrCYEGGH7/m0mvCcUEmNfqJKqahs1OlZGSlUMlkZjs24AABTTedx1fkMEbsLz1z726ohi/SrJL+ +bLaB+/PJAXv+EuIOIKgKImnIBNmv8Hli9yobaTXMFiU+Xc5NnFPRyINpGC3PRWISjULr/pqrLlA3 +iW6DK1uBvYFjrE+e3z0T5TVUE3yoUxpgYdy6CrWeaubbNDWf6pnJ3MDR+PMk6HFZ7Qp0SDIm+jIj +ycGPiH+5NYTexGx1hjLKq3W0ZluSC+sLNlcnU41dKemqXMAMqNcXJK1R4D5eYNJqK3KP3uoIdJZO +R8GwupW1CH3iB2DIVMY0TnNP5Bh+NqS8gDnzrIT+aNxoVdGvCBYpNjSe+pQaXTemYG+0peS7PYMS +UkNLuk78Frq9EplcSNsIjJ1yYCPaPVvbtzBGEgfDopLPY1D2UiK1ZSPYz18tN2PmR8S+zHliI092 +QZZcKwjX+IDeDBTwiYnSpder6mwZCB5CVHhQ7Stjjf9yTn0PyfuNSQmblgPjgFQ6YhLCn4aw6TK6 +A+iiyIEwCo7ONtU1ZcPTHvuAMSVWFrNXoAGfZ0OyQGyLhj0IsVShdaQRh0k9pAyB0OYcb9KoqMwW +0oCBndpEhqTx/b7gyqe3GxxKl7I//FMkRC9rXOzLQ2G1AL5giwYGASa5yyzPiEq4F05D/sO2wFz6 +iAg9pr+MjL6Q4bNbjVGIjkklRFBhQ2PbH6hjOPH5ZlQITPaldy4YX10hVtgBjwCjb6SeXgzHio5W +B6oy35481WtPuhgHwUGPG2a9syqbGO6T6we7fRu/L3K3mStIiI+ICMR51J5ww3NkWy3eeCy2F7Qj +F5K9DBJaCQCmAKk2I4TkO0LiYPQ8xdTXVwMYjPJQWMSqMO5xQCbepVW7TMLysIk/DOsMG4Mx5kXm +EvqNHYYCXjLPevDX+pnlwXDu/pmu9K4Uy6Sk/yz534Yc5Ud9XM/bQXFx2BiGLcE/ViUrfVc9PRAy +tRn0p6k5MSBB4Abju8k3Zo0XgspnHvT9E0/hQ2E1ydNGWk2DeGG9lB8BXZZiOaUpCCFjjl5y4Vbz +U/1P0BCjIj2VuKAxCxMBNG4tIRi4StrXY76FxO1B1V63lb6gw01cXug2EjigQWCAMWTTYcagIw2k +PAixw2kf3Lz79LkDozW1aFtk6r2dT1JsNWWGzcUaxcHMcTCIKwgeydDMq6LdEKQK27o9U8UN+run +tjSLS4/xVm1S2RaImzKu11yBk0G0SBQzV4bnxj9crIvAuWJbMLOirlc11YMsKUSeuEDIaZa3E8L/ +bED+dprH+lKar5zd0rO9dn/SorN56jGstErZ0ig2nBGWDp8nLXsxhcjCwW1TsQTqWLYKobbWHryu +ron7wCfjtsdf1GEqjsSMe8EII9wM/2EZpflDBswAjFkrY6gyeVEfSdkVbDZPHLg5QlYpT+hzcQqL +I2I2qOFB3s+U/BDV3nfAP1QO/AmgaBdAkrtjcfZim+BXY4jV14EJwZoU1vlhWBxhSosb264JIb7t +Ob92yiZ0Es+mxMcV61/JQ919gJrHjmSDBX97wRLn473kufDIUvL4Qn9IjzEOCnU6nUF5gSHtB7lo +aC/SVYg3HamSfnMJz6S3+gzKQ//jm7qnkAKwB7rsYSoUyKtS8vUhXBe5s8DM/GczJ4dT14t7Fq2R +zZoWpUtEBmFVSljsyDh3n1WNAxWCUJAipSWpbK86QSl4FDJWYNrDiQPnnWo45YBn4i5YEtxgSp9T +LTbKeQTduga3Cgkp6qbtNvzrvmvtV5IwTZTmaKw4wBnUKrIey+Kn3I0YBe+g3w2lUxmRi3kjMavA +NsaIBysJFVNfGg/9sKyR1XQt499YyoBR3kh+dp4ExUPoNphE+e1YO4Lmud95cLUWsWPMxLMdEaw9 +xw1XY9dMaz0tjPVRbeLqN23DzGBu2EV519ukyQ9mdiIGL98zrijKXuePkmQ5wV9rgxobPiFrf/IS +tOTFMOb7zoEGY9+cOV3zml+Sgx/LWKTdLQOnTn5p3GIkyKSAnefvy07F/lXnfWA2BrIroKv1NbPS +n7MUsc0ud4cFYTJg9D85ry10GwoRtAPrFrcgXKVGEQRCKXn4/KpptdxAozARiX0lJi7iR0z1Valp +seARY8ScoUVlGLXobLb+fj+ra+dC2ZV0gXPVUP36mC+lI+fpmnuldfkZhcLnus1ifzViOGa7Cp3A +6vge3cehaLJnaUR46g70igSkqVDHEhYhEhkXNnduKMlOI+7YaDs3eWsPB//+CxC/wduVGy95mOD0 +MMTzUVUp0Jw0qyhf5oQj0TNY+yoopDcLO9qrrsAOTN5m9SR6xluWzPa8AequaLddPAHOa+Km+Arf +3vtv5+EWEBKbYEmuBxx2pZ9GxQFIgWS+XUI30krAyRodHrM74NdC5+G7wZLpyQ0O7qA8SgJWzClC +orUM4RwWNT8mSatkneAZ6fvGd+BUvi7CwOnp4Zyvhlhdxz0XWJ+Hori6TZjpbMYuxQR+stg/+yRf +KRqdBV4mjQItcetS0hUAElmDA7l9M8AcPCDSSOHaKzqIKJNR83IZe9JmICIdt3c1b3/8HX6D1ovD +CrQbh6v1kb9FmThJ+TIJPo+JqQvKMw9dRKva3TSTAGexhBhmW4NL4ltG3zBWSbdgEpL+OyW2947i +C4O0+OqFFVWBjfQyPJwzP+zYKWW+P4Xx/hlX2kAaUVgjgG7HV55riRuIraNG/ndil6fA5kbBP1B7 +wkjWmvxAhhRJzmS3IzGTyepvfb6Sk6CIw27yd7SUIWjesf+ShpcJnZmjVeXxmbQ7icHsUP9kvQJI +a49c8la3yRmFSw530Bd8EBTfr5a1SNLB0RwCVHDZEquGr4u8ciPrYe8pVKzbMYFPlVI/Pew8/CJz +eXYcnkaKsjNLFhlh0BKGkRO1dkDKPdTEj17s1d6q+w2osEDxIDTSTm3epA0ZpPw20glOJ0AteW9t +NM1kWJT9Lu7Eid3L3/mVdXEEgJayyzfVqjncQJrKf8oQFUUZICR4Nq+AHtmfvBv12qlGmW2kEs7m +DK38/RPMJRDJIkTAYDcjhbUg/o/qrilOJTduxEsjeCzVcwPllFSfh2DD3ZFQXMW9tcDeyebWMTVj +tESOuGPN4R6kfHO4pRR8uzODv9meZZDFdIOKWURPiKPpsBfjNwLdnQ1q69P3Jdu3uTVi8dGWBkRG +UR12xgJ8grPzIJlnThDRDdhLECYaqTH3jhgZcD1UexAYFvbTDWyw7t47vyqnZdBZwYXhMSAZz9pI +Mf3MfuLsbmdu4qrsZinikzEWOSMv15blx8rjKNXnFZkb4IB/Ve97S6wNRGdZhTSU+LmvbQWUsDF+ +p3qWy4RZq8VjnOEqbH+D2/EccsQvdhEiV99/niBPcK2L3um8cLCsIXysT5pBLTPL8e4avYjZz6uV +0sAoMQFblS6Kwl5ZIOPvZJP0m+O/8Y4YfbWR7Rak0YRASAKJYnGCWXNMskD650ekx7PdxQHIm9uq +TwbCgFfoQFtd4F0qxPzO05HsLut0yDC3PVB/b16GGUCsy4EHW+/T8bD6VRlR+2/N9kTlUGSc+cSm +TM+jaUIItAI0ynNy5tSgse2f1oLKUE2L8cEi0d7fNyybxACKsus+aAM3NsW9kyINuxixj29oAJY3 +SL2MdTceF/cl45jcKZWYko/fvMhs9MRqK2cFlMsyNlhZ6vpQePha7qlWG3HQBKvKFjVE8oayJ7V4 +s9CxuRiKq0Cj+6Pw3B0LT15bBd6jy1IrY0SBPH/8/g+7adfIY19oTy9P3OvwlnTW9Huic26F23gQ +MvmPyXjT8wiOxHuO3QwIl4/JfNAq3tI/+p3TE2v4PvFiay8VTXK4ZbySGAXdNKUrl3nHzV+lr30G +zXF74bfUjNLnGSfYF6xLvSCHY2+R0bx5KBFMOmroYMwoKAAEBk6fLDqNHlQMRru7/JOJbGOCj3F2 +wDwOTJiHadEom0iseFjHm9eSOAMYDy0PaGekJGd02stiKZSOzKqjJ8Yi/9LQzwmPVTiSJKzWnmKq +1whjxCfgYPAspFYPSREihf5bKVDe2aV+4QwGgmuORxVeZnuWXUDlZIDL09T0V+0CHWLC8K+JYTRy +Dn+WHW//dB5nvXIUve5+xoFyIF+tmgv5RBl6fr0vyRzXQgrIbd9VvHxNjrN5phC7hJeErXL33jJL +iqYPUZjKOV3ve+QNsahTHPAdGpc5Az1R+RNaNv8eDq8hRnjx+f7h0fpCeXRfB/LJKVYC++ymvaJY +TpXgMSijgfCtONwoQs1OOdkEb1wwkhKpXRVjkFIU9Lz5wIUtnAgFujaFlOmeKARugz2cWTlIKXW7 +suZ1h2leOoW8nzg8uvE46smbNRHWgADyFQoA00RYxoN0GTyaKPWahnM8W9E/60zM++ylhrp3cWOU +e25EswsD4eQ6QYCIjhKpIfLWt7Yg38TNNPF1EAP2nODt72oBq6EXFCVhrbqiEQArczSYftPU/w1X +tgz1t8t1FESFq9s29fuFQOP7bfQgyP7JqjRSUK1BUJiaz2b9vGe76POPLrEA2uBVwsBIeoKfvj0S ++w5mP2b4G+LSzGhlEH6QTAmP56yN77Z7zq0BQQHbKpIn2XrZyj7FWhrvbW84TmQvbTomvbOaCZ6M +DvUtG2oqOVDgWLVuD/BQATx7l+14IkjhH+1IuLhoU/j7a5/xiZ6oFcxy1yExrycvqzVNA/ubQL4R +otHknLN9oYYmVw4rbxxBmXUUHtGNZ06eYKMCwFXrtNmkS0LWd+c6TfppYvZwpykti/burLl8DuQW +LGsQYOZS/7otYhByfTYmyiQeV2tP+LY1wzhG/NIOdvGt59m3qhPuFwQRcIq/ZQD6BpLFgPZSC2S6 +A1PX5YP/9uxdryjhkM3vqJHdStz75egc7V7GmqIyOawbskypW1qgY4UDzIc6VPkr/B8g+hP/ODc5 +mdRMDKw/tsdac4/bHAdBER1CUKGEjSAzdid2i6G9DyhZKAm+F+Psfj9bjq7N83iFC3+q/MzE7A4+ +P+9UvnqmxYI8e442adz5M9OQiS/ZPWv5yipgQqMJFa2lbjsDVHfp7d2AqPrGSeejvJR7yIa4LDu7 +Ou6zSD7nsg9Y8ysJZp9tDgxQWpEscqqkFsWobgFB4anEI8CffAgk2bcsy6qvZZbJTKePAJWWJvPY +vbsl3SzWn0iqFj+L6KXu7izowwlxWOyCWZr+lPQdtAg2du+bUda49V7w5mE5vBa8b07vPFT2ImXU +50nzfUyj0itKeJlDNoiS643+Qw1sCSS5UWHu7Y2K4/CC4+hHgqFifFrl4yyLOhH2Gsv5QyROH0X6 +jYbmV4friHyyWg8FtN4XHFeLCFKMRUEqeWER7P59jZrYW/p6U5cjAdsI1v84vNs0k20CXjAtty6i +EigXXR/bqfBztJP/Ibh529d8wU1hHJrqyFJ6jS5p7GJ5Wqgk1KEcCwLtNDDsffnhbeQ8b4pNhIkk +jsyrBzxtUhbh8eTzKmkb0JDXVSk6c/38Xb2eHueWbMcY1D2AbdKRJOd2hdKkV7wjIFPKENDIuHEj +RwvwidcdwOp7CcAnJBN974VRRiU8tVSnJ2iaR4czUIS6V3r1kcu6cupR+Mcf71TXe1tXsnawiPlt +3c3Sau9ni3ibtSMW/xXgRCKrtmhWXbaSX4xwepztIXaLfZG9yZvUGMHlcPTN+nMIqzuYLTsymGrv +iKqBU+YGhiX7IVg6H00g3Q8P8RvAOIBnP06om53pxlVVcK+SzNQDYJZcCOMh5yH1TXkS6verCYl2 +f49QqM5M7V/RUwsgNeQun2QNtMNGIc21KSB515at4WIKTE/IGITtASlwjsQauO31+PzXP7/Q35wQ +Ae2KtXxbwWQwNn+yOh8EsGixjVFFE0C/Ak0ZHHIEuFfnMI1b3Ks/Vui3r3+F7m9CtUS+dVbj6N8P +top7p0bqxVmluvoY7mjSWc7FRYwsTfy5PRvCX5L4V6KnJ4CgDEqBn/LIkx8yRTbG0Nc/WBRY5N/C +AYNDyODm4FYR17r+IAfUZo7XM7Kix60VT0yruSqrBIFdPQmGQqIMSY8HmVKOcyppBHMLUCZrHcAM +TFxNPRAHTbXYYC8LbhASGgsFimj1Iew0M11fsx6C/inPbfvuEflZ3M4jDloILF8iLS9TW0A6Y+Tw +u0erK1tgZNMrf6KdAu5XoIUTMIC01WfxH6xuquCXP9dAxfBAxnfKrdoyM69f3ORLq1mvhAEJOmkN +qrdJ5b2frIRJyddYxVpjcJpgCzG0iZN8PScVzBoYQEYMEThAFDEc386E4T3iRSHNfQ6Fo7wUiVf4 +/IEBT3V+/XJcFzY3eDCFrHc90Pc72or2IOmtPy+c6qVIW2WoPRa5raTO1GXKcnk81dZ+s3SqAsP0 +bRgfJJokJn9FZrGrW5O8n/Ae9jT3V/JjiA6+lUurZwRVf72n6Us/wKLICimV7GKXxjspY+5rVT4u ++5TptoGzq98l5hyaIm8Da5WzuqAT+Vk5M71SDNVhwapZ1cfjLmvTcfVtNdgUfOjKtNeidSjKx8Ca +1uFmI1GQaXrZQdIaB+TtVm0U/almUvN9llrZ/YaerRvO8aq1mZwHCHNfRBuPUr0v0dsEMsQ+ZRsk +PlfMqZc/ydAinH80TdgIVx7o0TXQjyw9y59xUuJTIXPGLuCVNe9oJW5mHKpKAL7sHtW8ZjiEMwA8 +TVqHBnRVpol55M58twY4LIH9E8vANzmj47kNYCvaR11drFDlOgajK7aMOgHQsyy9R/oM3WmYMo5q +S6vBtHLFro2XP05g9XytT3hBXenudvRxq6v0cVjGlMMzDPeS5+nZ6aJOztjo6vzvjMe2WUVjVRCa +YVaBKsZGpA/BuuoicEg8AiagZs/BqghxPTp5w6N+7kfChrl4MnUnKgA6SqzxrQbTa+KKIxqNTcRx +uDPizR7juuT02MFAPLdbrU6UndzchZR1DWAOgIlnDilU7VJSHQEZnJsZHHTyS220uIoQXnz223HV +T3tM9eRN6Bqq+NXSym3N3FJoLp1a4ov4laefjsBdXM6zz+vzucqyy6rPJOxxu8FxdNKT9rQea+lv +diwyd647kcnKOyzu1j3s8lGzS5i8QuB4O8zJpENi0wtULVNh3dJf/w/TLfpu8fFUs2flNyp/jlbu +/XhdzlIEaLpS7AMDjXXy6aDYmxwFJ2Vp924SBdBzzzQJvjDA7LD78DpT8HIDMElp6lKaWZkmDf3L +9urzCMsrFCuCQgGWgTm8G0KZ+tHRqK0Z7M2ahYOS9OR8LKck7KYh347KZzpzp1B+yOJe7ZkQ90nY +1KDz96rRjknrN3CiA5QWqSis5FBsUljoGj4p3vIXSlFngKJhWDjKByUDhf7b0bT94cFrUM36GImM +sfGZEugAJAldQuIgWQ5yl2WUgOWUnoDoKvTpq61KqRrWAJ4U0Zq9xnvOhOe+YUVjzWK/f58IlzHr +RfIsMbEl8qeqjBWdfY0apts7ob6WvjLd3UbczgwSQQ/oGwL+9ErY4a+mUUf0ILozOsQR0dpXmXzR +Yo9Fsv/jabkFR41osvp9Pu7NoHL29m7t8Ew5fbeEh4t4YivJJJLnybg3zZ/0uyEi4R6gASa8Af+J +zAwiINl2UiRDf/HX28cEhy2XXclZvBuQ7uEdrmDC+GLlSZbtQD0bfYqhVn1WzhN5e5yDBQCwHWxo +PEqkScIJOEmyd/OZ2jJdaRTC2ogAaQELDqsVDkgGbUIX0uKJpJQ2RAKK5TQk56lF1E6LRy/f6Kfk +1YMqDWpsUoGB0bXEW7uEJR2W7ODvV6ATdJjCQfw7S9MtLudzW6vwSH9SFaRvsJ5pssJgY0hLU6hR +YsVAEiGmZvDiJbeDpIx5gct3cA3ik9c3q8f5y0qfYVR8UEp37Ji1INTR/Ph3/iSU59wV74QmMwEf +HrToFdObsGeEblZv/cjb5PjaHAlDOfxQtB++kuWLPdbQPk9VMh+CvU1OzS/cEsQUDE92PHogJpxN +g9Kr8InB8Oo+HGsj6iO5wWg9+rS3LUrz2uU8Rvki0NBiv/cCUJfeID4CRQbvANeaCmKBYzvOnrXk +jsoBOZ45Sx7Ji2m4PpNSIdBtH6xpudwPG/RRFURQp9doDL9Cw6eKwQyD8kFXa98ns5A3uCfkYH+f +PnqjfNwkcjjxCZfDZc/3a/JHZYkZJi2SM7dDysddDul5NE1fy5O5n8f7jIC9oJIOkPauiYDZ9++J +gJtA/PmCd6COlMc2HX7m3aZxIR/Go1lk/qcUee6Rp1shkah0/4xrwIULcWHg2ml+xDAHGgGF0WWB +pvMTvRLSaaKI5Pi0X0bIFlTP8bpqjvjAkcgA03flTp8MhX9T/QMlhkXqY6lQdeff+bco25poeBFX +j60gyAbUta/icD/tFoEz/dtv2XHqrNRhPTr8vdUn4dUI8tcVHI0KNwtk96Tw+6NWIm3sAOTvgHKu +Pugs+KGdhaCobCC4LZ31Juua/68RwNuRxfun9hgs8+PuO2ctevNAPKgonjCZj7K+aaqZFuus7XVG +h5QWGHHNrEHDWONW4R7wFYu4TEVOwm3ha0Dfoo07jDRaxfK/xy0QA0XjGNXiBQ/68072TcGLhbzS +/coys5qtdEEhyznrEYjz4qUW4P3Q7n4GA00COhkQEayrT44n4L+K34kZ4vYy8yI4y4Sf3NiTyX9f +4NdRtsWjS69OzG8QEQkphlBZYHKf9LYc0LFR8ktaRku3Uw5WSqN3oeN7Q7gKyekQXbD2RYzCUMOO +amcasyguY4Bz3g5hfIwxlTfzznp9AUgxM/f9m4YFhicDtY7YpYxyI0UzBR0mIvw3CDMS7p+TCq0q +yaJZtnyj0kSCIy3TP2N84uXA6xan2iNn7Qv3uFevvTZXNgTofo0jDVmfgCFTyL291mQZ+YoYUUay +JMvnKa7SPZmFvygfjVYnYrPZd5kkrDRpkuIgy+bxzz4F6me2XI/FAmuAMWuT1yyJzaaMSCzf4aKj +xmsQpCJqKLss8ACH3x/USDZjQ5lYoOXS0gm1CZjAvI6S2ku9CsSLOtK9hwftl6qvsVxrTfTNzJc9 +79Vjv5/K8N0D1A+wrfiv5zyF+WQ6M+n+vHkauDWZjRzdm+Em7qWagzYB+4NbuLxwI9AGKskqdCkg +T3tNafnjdfpFqSL7O134WUWAjX5FnDrK3asEPv5nCDlzygXqqbXNiVQpxsZCiL3Zm2W3PZg9TkIx +gU3lRj9nK14qe1WHqXbS2Vd/J2pnF0FmHdelyfj7ENUt/2LqaNiqgyTEIRZziabMFIFZdXxv6p3U +5aqPgXBz50YPtsbyAJjSf8GRuqE0UEZp4kAeuu202uf650pUyCJa9HRBAER5/JLd8ao2eAhrorHq +3891ksnKpiY2f2nDsbq+gtV50dymDhNp7NDNhKx9F32Rz2uXN4LmpOI/3Cg6Sz3cGk3abCCckLjx +rEtkFwnQmsQ/JsXl8JSBS3ZFPVFObMKJ/+rGJsrz8x1SIO5lYHVIfZ2xoi6iUu/Z+6m1FZOFac9T +AuiW0e5paIXmnHB9E/OxdEp3yVF1TIyYwAHklPJmdEHg5soLDX3LA3T1/524sw2SnREvesrXoc9y +dsM5tuP1eR5/VDnN1ipnwU/VJz5h1Du3vOCgKI2OSAQ8B15lONVRsrK2g06eooZ0C4RmQ0EjRCv+ +EF6NYJDOFjDADQ9L4P3XxviTBznFPLpLOcTEoPWC4J7nmXytJk5yOxS9JcXHQrO2CvaM8fRFrEG7 +08PKFeQBu/tb9T/vCyTJkJGK6ECXUH9CT4hoyL7euVQJCX615/YjkMEZiDyoEf/GaUqEpWe0zT9e +eTDxszFGkPe2JV2hyfHrp7J26DwexCbcnW0CiLVhAPak3n2xcjM3Q3VJ/S3DD7trvCF89FgAYbzA +IQttyOUZr5JlviiakvKxta3nRiijjgxOHRRui3IyhTl6n9LPjnmlKbbKbwbXg3kn9Q3PiKrb+lwh +Y6VmH4rtk38lmmxCMwjutWWd14skkna3oqBfkpPrDgD4uc7GykuRxO0YgYpk6Vk/+JKN18nuD6wy +w7Y3vJE4CtadiPKX1mxtorYImtjMoCEKDPlSjOo+mOvrCgORaguNn06Cp6YXcMk9LAbat6fbR67G +iGTpRtoIRlYsvKXTt18L8y3XPQ5AGir74qhNihsUDDpKYdd1tT/rZF8ZNAhPXLv6KUzHqwZQthTI +phLH7F4fQ1z4cJdCUID920gGI/14WUl4kkfhuS9X9gyk2K7H+n8Vo1dMIRZcmMul9ggx89Sn4a4O +NIS3w/UkQAsODkNp0CqsSmvS7rsZmZwVNPVBnO800MNR84lLkLGneju3jP887CHZmPyarjvVccnM +LMsnCoKh9D3Cn4L87lolL/SichI2rpW4kLMjGDtbqFXvvkb30NW0lXz4j9XQCTpjhevm5YN9Q+LE +71z7iCsDHJf1HnMvIIaSioOoaiED06lTcfNdyoPv6xyPlKOZBfPeOp12FW6wJ7fYmBw/YTyCo/eg +0Womh+7b8krpEvs6skSAwn7z1YrRhsWhRgQfpQ+4ivjpHHHJO/kqOnUx9cPiK11bWZCj74BhgLIx +C8zZ8wu2qp5H4aYoIKg/rjzr0BE4xu8wkSb61AR+V1mOBx+HygDbPegV6GoviJbW+16gHeVAAHhw +eb3YSNF0PCJJ9c3rjvheWw6x6OSPDConHI/C4W5bEWgvTAA41uSO7fxBwJDoCH/d2QoU/V+NCeT+ +yxrCgcDlRSzW7Z5oqpC+pNQAyNYduSscgzC1hRAfsNSRSQXxAY/Sdy4K45y8s73ahh3BVAVceXiH +Jh+CcCIEiC4E/w2gA5UTviXvKVIwrtUfkvHi8KyWc7wkiznsZ3FRgckaCjxI58eb2iR/qVOd9tyG +YXLWHXlZzY8pO2mPWvR1bxNAJ0Y2VPkkFm45qc5e7LVTRJpkzsQE50n597ijheW6YUa6Qwb3e8Jw +trsV8IV2F4NFOsykC6ghjj5PcLiLLbCEJJmWn8UBRLDP1I4xjowF4+1OeFJouqI+etc1/SAvpiC4 +f1hTfMlPjvD5K/5gLXHa7Cfdan3jzej4unDMcwDMyVB3VO2ilcUipfpfpJlPIQCXkOeKV9KOMlGO +be8aLeMeCdeCCuv+WXPChfhzZHbCwMNl165Y+fne5j3HiMPkQMGfkRfOvW33/2iBAahJLD/xUlFw +woIoBM0yjsLImELz4E2c8puxtyuWL/K3qSHasstIm5CdevAIzwM3wyvKr8RUhKc5DUQRj7gw58KQ +a3DYH58Fx0OcI+5rpaCcoPkmh3Kzyv2PXyL8OD4BA2+N2iktUABkN/9osyscI4RfA7Z5P+1CMvCG +ezYKwToGamQYSBuLoG8D/Y1zpzJVAQnn/ULAXV5wkaIyeAwE6EeLvucK3nIh211IccrjH0qJ1NTv +pTUu3B58bKKOQiRXwUXcIcLbmIvkHD5/LdrN+1ox4nVvnqFgoM56uEs70MoBH2QMbVUYxzBdh3gB +BIONQXQ7VJH7XvEWq+h3mrZ+usKe4U8W0HY1JZtJzt/MWRi1iMQJ7eTUBSMBdadlNA+LxBVTCw02 +GuU3vNRYUlk3xqro+T1wFI/rMfbM0MxqL6fHn5/0Hb2Vcw3Wm6akOpCYIV2k3uYqGnNhlP5QVeGv +naHotd8p6B6AwF7LDaaB7ueSr70+viCR5x91gQ26l6FQhd/1VrA5rNAFVnC29nfWR51AKui8ARuZ +fQT0YP4j8IcqZMgox3OnD817TKCejDjF8UKU8ImF5WjruJLNoHkL1RHdAjaBymGX5vEY1kDf2auX +uMzdWM7z/fVEFtpDpJasTR27Sdf8io3juy75JYzWxYyErbIBlhwjgJkpK19kNgHgPZxd+iq96bIU +pgyFVGjAdcxRVxSUwA1wn8BI7jo6nc2YG/LBbUwvB3FoI5vrA21kp/4LNH5aCLflTSu9nfFtHJpp +hvrE753IAizl5BtfhUigTAutxCbkHgX0ksQAdKn6UZiV5SDFO/VYXnMq8mlcLSzFiWf32v2OUU9F +TcJ4GIy3RmqfUINn1pilEEmfgjLkq4klMDX/oCISQsYIrLiYARiPn8u+t8Hg9QL7LJj6ioUav3y9 +LM7u7OrMd1M2nV8r8+bZATGUgFmaZpz3FGUiatw5Dltx+sxRAmLfvK6ES0mPezQiT5Rq0NkIgl/Y +3BvubPbocQ4UAOLabgbuRFBcB8ot18ScJ5yh9/UjVfrI7xOT4ANXMOhLhDDpW7HautSh8i8px/Za +jPYn6ouiikq0X/4hCiE4L7kbWNxjNGW+y7a7TSkjFSzg+BdS2QkG0J9jmjXTc3j6PuuJL0jYcgQ7 +LRJ4MBCBnX4G03zkMlZ9R52MRrJDmKbGpymWuOuwSygBjO8pQV7iTFdhbO5n6Y/Nj9gGeL464TIS +n/+EDPhp+pygDkaEAYvsr6fCoGcz/4ynlNoqbXTjMt8nuZmaByAODmAqO3Fdo4Q8ifZHkdt9fBSu +ImAmv5GbcZ7tv6ExLYIZJJJ099mQq7HrCVhuY02P2km1tuUz1HOjOXikZwmvmmFS0HNRcRwQAGZE +o+fVLImDyQNlQaUtavqoJXOj4Ft44fQ09F30AgKIi7iKOI22iURR0WSTY3kfGQV+Eq6L6PY0WGbr +iqfulvRq0pOJcMXvbwWp3m+rFtZbbTsFSiJcGZWGW12FNp7cQrr0bdJBbFJvcTPgijjv4DWwCSDb +aR91BT8oDB+XU6bsbWC8iBPr+yCXEKbjstEiBT3ub8b2FeOMYf+iTtiSKdoPdvbeNKbZPeOSHC2v +Hqec2Fg7obuR75xE3S+mV6entbca9qofyIYnP6um3cr30Y6K7BfkE3jpX1pfMTVukwjRse0+bHan +Il46VpGVsDAVX7Aper5GedafpF8KmgT5QIHZC1AMs5YIiE8Omc08K8KMX6BZm3kDz8bWpUWfPXp8 +ZMTt1THi96fJpLq5yu/FZJlxjOS2D3aWU66S3WFeZtcYMjj7X5j5w9VuCIujTPHWC4z0Ot2SD1cb +FCAFQuD31DwIEdzTsucmy8Si4qxNcFFQsFql5BfSpzZavzgRmopB9g+4kX6DdQ0JfLrvnoGQ6KCn +U9qgy4hdPvkCbrR0D1O70g5anDISBg2f9n/Ewxtz39DbwrWSeyNwwjXNsMNp3b6muKO68UjwgdVa +sXG195np/yIMaqnjU22LgaDDbC9FNiMpHZ1xyyO3l5haOx8sAeKEFmABG6Y/fPEGlDCMSvUJ3Xq9 +QHa30/yFD4ChEAknmDNawPdpjb8LCgwMot3LOehMs+fTWKNyPHzjo49wc7WHO/nS1F53vDj6ajFD +Pn+ZHO9l+JxSns8yEhFprTjsBxeEDYYKKFSjeX8ERae/oFkcTh4EnEdbIhj+kQOWvgFKMlVw3/QI +LEYQG/Yaz0soQ0poi3+h7G4AT49tRTZTpiGHoo3VXKS95b+IXUpcnxTYf8H/FNgNXoXz8DVVVqvC +5j5dIbjaPXh6Raeu+1/l7d+2h08YDYMVRQzRFy2WQ5cs58hU2UajDA78cxW9nMMnuPGaWNqzmhN3 +j1tQR3av1OFeJv6hzO7FUM9kw4mZfiQyh+ap84ZJN9iKQhi8sCK5wsRcQMr2BuaFRc5lcveBpnKW +L1u/sSpR+Tc9l7FTJZ3eRfqWM6en6Rmo3KLisgMOerwKKKKGa3KwyLUA3jChWYwQkQso+0vyDuWv +K/kgqrlsksa3DLX67b12zJRuvCOfG6mMARcoDVYWlD/5PcgmM8RKYWnIihiR1pGE8qzrHCa7eoWn +MEykhc3RqfdgX8sMKP0MvKQHZdgWC17os/OEGyxWgVJKGdsYRRKuij/ukyiyPNvtPil8fIekz/I4 +D0TpyIRfpWWc8v7oc3mgdj5Mi8JQewFt4f/j1tDK5y9SQA8/NrmxZgy5v+gdeUr2Yh9+8YyF88zw +T24UTTUXjI0yENOzEcX88k174Zz465+uMRxkx6UcE2Q+qBiUhYnvfvqVRDfOwHkhAdUnYa5fzvAd +1O8ShMBOvAd8pW6f7QIQugZuruvqeB/B1eiBI2LGubZMhq18RiybuyYFWGq3oQebDNOrpDBA+D63 +FdEDxo/D5qTpWoxkkq3kiCYRVX+lTdwxf0eVpyijwuG7k/GHTGwD9fqw4e3hgbQdObj+WsYad9+T +V3pm4tjeT66k5HZGYuMmUQS+qmffOR0a7ygeavNh2H00UB+nUmyrD+bzgnBU/qHRx0NIVLJ2tlKr +hGXxFIccod2ZxigO3ifjpBhDr4V+YCiAGNHpqc3Ef+nQFuPzwU+otBQ4dLmDVJBCp6R87TrU9MLk +pqpXp4Wxa35dT6+F3NTe14EilQiZmm3+nRrCji1ej9kNqQjQrkbXx5jlBmFN4LiFkTQW9B96O65Y +TYQmUwiuE7kMGBRxPTR49PCLARuMNUD7LQTp/L0ipBTG5qfXgJJIDPOxdVLFubQJTNs2jYR10mTk +WDr4YQAbLdmVqogkAr/MWq7cxJtYU+QzDD9ITAkTHM3nfe8dDSG3Tz5iFZmY0f1+3ULezUwBEi4v +EkmqeaKV/309ZXdQmEK2dRrkMXJzoZypsvrOWGKguzGS3BuhRVjofnGkkb0xYTRFg1Ot/KnkkB9g +xEUKZNeRro3sBogtPng4VTA5QHIv2q8S+aR2dPuZfLN+9n4YOwXqYHPugB/AYeKiLx7Je6WbYF7Q ++e8qFATQV/pHNbaTOixunlfECsy/YKSk0jUCdDE38KgzJk/mkDI4tZNAWNQhwZkPzbzc6r1y1G5J +YI3MAptfF680oShsWb2koA0KSeyBQoUHZeSHlxe7IebvIdYGeVAb+eUhowY0YqmAAzgMChInsP1F +swE3UlxykDJkLZzO/qvokI8l6xshJv3Fn5NpWzPS5h1qar7XgxGP9S0BKHbS9gKEFnKFWiAarg07 +Vm8YLehjYfyteX+OJ6a0AthvEa+C/4oWwoGeoCIN26Uh7TrpI8KuPGijNkc1zU8nw316JwTD2l9O +WUMgoFyOKMtWSmTFvo86SWQ7HFegHutlMNLduuObta6Nob6xrWhS7r7s6pDpF/cRcR1D4rItH4j3 +JQIitomkg2v2KfherTjMzegiunwmIJa8ZTowOd9FDSjDHTWbY8BSe1+3BGxOHANdko1EcFa+hX1X +eXfjTRgytfXqGzsyLmmTRudKZZM7IxYT1EBjKhegneSZFP21t6vXBconh0pZXnP34nNa48aHsxCp +7Glit+LxlUzRd/EZX7hDMr5BPvVFlLxkDVd1SxQCSDDX6w4dDNOYG3b+DpyrK/hfVi2R1eZZ56bS +3YWBKBDNwh2gpopuWLtz6s3DhMynkYYVi2daFskbrZmP6fOiAFIVR5QF1d5h3fLrpXrGAnezMXuy +h5i+ZfBJ8ANpUJBpeeV2DLKGTMaRukYAsvLxInPmxJCaYN3/o1tZ+/ylStulFp/26CB5WRLWnJD2 +UEXt22Yz+sDOGeVU6RnZWTgZ+x+nnlfve0DQqDbKMi5GHfy1CXxJSuQLLLC3gesjcqg6EX4Qld4J +jOpe3jCe2WvGoAM4i03rSQRsvIP46H7K+ajUYAmrHVyk6HVLrzS/ECs/CML+22GaSz4sRlr+xcUP +lmpXi4AyFGXFHgueDZ6TFVU54wadQeJSE4vxtwbazAFLiGGmNyId1uVUazHeVsAyihE/FEW5ys5w +A5ceaqtKZnqsIih3yGQ/XoXjnICeMd2dcEF0thLu8O1y1S5hehTQd86P7ev/xBADIXvfJ5/URaQb +JRslQodt5F/ptlRlhMpGvmKM6h4jPrnWTmT57NEyxCVq3ZrPcZd0qq4W5z0cTEw6fgiU7xX083gF +K+B8s2fq+mvasoO0QzR3vj+vIF885KyFbD2rpkXxabH5mTdBVmM3vgt37fp+l9lmD32z9s2tHz2J +rPYDUuJEYNtxE+MfwKcC0vLEs4N8DWc6K7w9Lpn1JNW49RAiKVYfnnpEgAqes0RkPGoo5uM88hTK +rBQio8uLB1K3aP+BuGe09WHRTDidbvqYWCdN7KERXvq5YQdwy2vrXQ1WH0GcaLGUUhS6rAK0Dfwj +/9nMamOszjXNPIJR8rXVQ0U3XWlkk4ABZPIrGwdEV3F6kREGsOYThn3eC86SYFCeQeMt3HOAcm7G +kbjBGCGCkVz2Z0eBLhfX+K5VSumdFfgKAZzbvYLiK5OKCGzuA+mag4E5jTUoZMJUwmaWQKns5cIZ +Tbu2Kag6qK99eMCN6e+fPI1P2DDliYhXpVRE2pbUyF9oMhusnTstrI6DRwAESb6moaTEbL0yTw6d +ijVp4ja5J41HTIJysIuNMp66WIqbrZ3fnB3uWpnZ64+jJ5Un1mWJTy3pZsHwo4gGR081SiQI4sbw +mfVlYshDza69USmxITWt/S+BeN31vvxgN9uN+c2LP595djtKfHhe4VMESJ3+tsizv4HrWdp7jJKu +KjdbqmMu5nbsROhfuXuEeQPgIGJmGHo93KTxtk8stOYOoGn7ngTNvGt35FwhKJHVdsMmuYZLWb6n +dn9JwJkJ4e3Ov+Xbm0xHvXmAVxNEMKii/kGE52mSS+YaL2HYfShIxl15hUdhf93pnILKPiKpR6Do +GTV0sMq7KBujBBfAxMr4no/bH4gwgmzVCT0rf4g33VO9ITF6DKM8oKoBSEfyphZGNddu+vjfkoe1 +WitlRtzEWqkZZf4yFDI1XUiatYGNEC6hMQ0EaYDKHU3ORl0Pfxb4qA2+LLyXRAIczy7mAGiYajv2 +ptTE3pemAwas7uorAefTSZl2TfWXgSYgbYnWXQ4BJhGskQS4cGC5gMpT0YosJuBZxp9QJ8S6OfI1 +brPNyOYMiFE//z2QsGBY9T+HblzUddBgFQsZVF0QDIA5OA1fTOcJtpM+6gSuDhwWgA+WpKFnCRMu +u41T87yyvuO4rVE3vzyVL86EbqijF9avhMCOnNrf/9anEvHO4oXqYEtfGczILTFB3ofNVCiOYvF4 +MauZcVh7owChxSlJCBoUPHxBcfuEhBfoqNEJ9nwQUHjHR038kdPuVAykp8axh5V9y9X50IZtnmc7 +c7Hd6t5acUoKWldbdLt4tr8o3zhhBlagriLKnNsoFo+5Od8c0VHULpxyvBtm6D9UQCrEZ9e9iffh +soXztKO5Cfzn1BonvQ4blPr7rYJaY/uyDXgFdUT6ct/jSyO3kVY1iD6ySQUM+P5Y0Xx5MunF8hwo +bKJTH+3kQ4mvlbCvQqhWVGOiVJCUvxuAuV/JFbiWgo0RGhd0ZtC7NJ9iMA2PDjbtv23FWxXxkcY/ +kDoWjOv0yzeYdm6PvcVRKB6h7RLIC7dScanaPxIMnEJUzxjXX2GFfJp79bEaN65DvT23PT8XGkDy +sSKt3QD5t3oPvhBQ5rPW//fb4cOZnV4CZaDFafQZcQivlcnwcUGHEwzMgQC89pk21ML9Y3BkcTqp +y+LXCisX4YDbuYSg9+scbXGK2o9suJs/uORMCrwhF69KjoF4SJ9svZkVpb6rS3eQWVS824YUywvn +CZCg8x81YVaYrX0guknT0OmIatUrycTF7xHRrwYGnkkHKfORwdhjLH2m4tjoHY7IlI8whZOyNETp +obnj0tgYgpGAdeke40U2pBvxIBToNl1VfqbzLYEFcFtSYS9jfgAOAmhBEHkgA8JRxsCGZuXTxpJR +8ofW02Z381WGvkRHrISU5IGhZnOILfGFvzYXx1WqJerhIUk1oc0fGnq/mFbI3fFYtBE2MorwBRDG +KiBd5srVkcffiPTqNGgN5fn/ft5QBKR9URDYULvgMb9tjxHEvFUmDpK+Vj8QcwtubW7y1LwemDN6 +4Qx/PqiERISfEizYnb3c6dYpB5x2h1NQgBD1ZkGm58CGyizqdFH6/SJbMlLCfEjq6DsG5aIoxuZF +PH5Rs7tf6qVsh7ThaAx9srZ5m6BGVlsLK3qTqshoZvzcrjBNVrTtNIPnTA71c/tAQ8KbifhRWgUq +RT+9zNiiIAHh/GybdvUyClYvCVfZuUz1LVlLFrmzM8GkBz4Wq8Bm+lnu0QWYhH3antsxhCnFlRYk +afH6oSGUipNQXB73C7YMuWYCafv4PA6Cj49yzWsxKPnTXfm5Nib/eo6sYUhasTtqlFdIqXg7uyIS +NYZOMSBkozErFTDdebD2GF/HTask6HE/hA+yXIcMjVIDP7KC825ClYp8Cx9VIa3vydLTp5xVMSvM +i15hH7VF30an28uCaSWfawdEu1UUVjIAHDzIwROcsxWteVPFZbZXrArtsY96IsmOHI7mc0RTCl+r +BOdtcHVvPlUt7Yac7rEdc7Miq/+SKeMUsu2uKEU8gfSitZfmI0hefvOF7vmNzbIn8Mn0vovlfQhg +igf/y5HuZILKoUPjRNovGYhdaBUYJ7jxGGLcyZaKsYpD27qivnnsh3n2/lkkGiu7Dide9EvyXr8o +9U9VZJW4tKjnptQ358WbiC0LCscxEaYupa3oxJw1FldAt4cUNZ4pAxDwDJmRx6jvZJAhCZJCHzXB +JyiRwHfxvR+JqoMZJZm8daUSQF30Ir+nu4k9mNXcCvP8yfQSSK9Z2ckNhEfjoS7VAKTXr16mPQh1 +g6Nit7V93g+ik+CRlH4O4Yap11DPDGDVO5loj0/rprwpi8XWXLw3uSkGn6p0lot8ZgbSlmHA8lP8 +FUbtpH0b2f2Y82OkOG/Q0Z503vW7wIezqh+O18UwYXWmQHWIWE7AUdweqUnnGYmOuhavG/Ap6gjD +f/BOySAKmlExDcNRY4khWt5mbg5jtV/QxK5Wl/HAen8eHRAdYYAv9e/AulIVYnTjZ+GUIvlfDd00 +w3Qbjr5rSbcK2zFI6BmhZJq1OziNEbsUQ8/48vUvy0K7fZVfUVAiaoRSaY7wGXQEBr+hFLotkT0I +5zuvJqA3GsOtRnfLs00RkdnZUdISREpUXuNARA5Ynne6nNbqO/iQ05VQxgkenXZYHjS6AaphEDGS +/uqheOtMHyya3n5qiEGmh6cxKkHxDolWo6Ka+prAcg9ylmgqaRX+azeCZh9a1j4fIODPAf4Lg6hK +HVzUCauBykDOE8PaF4GhHqj3tjW/yujkJkACk70zSHs3OzWu8QkMD+44AUEUrAn7SFM6wI8Ifw6V +JVtHL/GtelZLSYt2PN+3Rg/NUv511l10oYF6ZuQcLN+opXobU9KpUcntDM0YmOemxFnBYo5I7Vu1 +1oBuqRJOHA2/o/ZOiK1jTCim2rP3h/+aaP8Ff6wyGAqzKnow93AB4eOV35cdVL637NUXNR1Q+xo6 +VVICFvztepPhCaX+eEIthYOhr9xL7gMvdmG/m2Of/v+64jFXEClK5h3RCVWZwpSPKAsYxaS702dH +2J4ebk0tgKlNyBUG4zazXdnDAYruCNobKMhXXBvnfJ2UULhQuNmDFyrPzr5DDqzPi2MpPgruoe1Y +cNhuZFvk+Lp2rG+SbbF/vMJl08nVoOQk6k3IYnkm89j0ymtxQAplsIA8ewr7Pi65ZZfm3hF3D9d4 +T6Oo+d2Dh/wialh/J0GpqtaScBpSZLuKG6nEc9bT5GRpc42Noix1TwVbPv9Ciosr5iXXHvhk3T8j +QWB5X/u9OJJjkqTfkxpDFN+4kW8FaydnTcvpwtSCGDCQzBThSrujFwA4iUcMYk0nlvO1fYsP8AoO +4UkvvWJYXDf8jHLq4ayFMcvdeSLsARiqNmAxEYykrpQeSQJ9+veFqY7LIpQGkC3JDytF+KblfiPF +jx9JQ3gcz2ck+KChTfKDPGdU2hjhQD8Pt6k2N58M/LMkHr2qp1COBAh93vrEAL+/ZO6HS2cR+1xl +qxnxF0qeXhCN/WMoQPh+SduNitGJwSNN0mcZxAFgQ2T2/UMBlCfx8BVsOpeVXybpU+gZhP0O0kj5 +q7SqeYHgjbu/GiJe+zGn+3/F5eWJJ0dhtbpXM2nv7EVKyHIq8I982r2AzVqYpaNiodAvs01y55JL +TE0/e3Ykn7iA0XoZl8p1Bh07LgrOe912dnZIAQ8K/RTyMiXfT2dPZZx/7yu+nsgtPbs4Taxau7bP +wh7V3i72GqHO8mm3Ir346TWFS/MbFynIR1PtLM5vfI7I17mMbveYtkfPIzyww0F5s8Fc8dUMPN+W +R6RChvDidvr2APNoB+erOjIuivVALMnFD/ua5m5S0KtXT+0dBeLpSpD4XB9UY8mefkDSWsvCeiqx +v4OjsneKDYuHzL6XqNQYwViKNHNhCS8GvhDBZ37kjZfboSXmzShnWhsoYeBn4vJQZ4KnNsnxHa5N +vFIc3N505vzk9zMGe0MuaTQKSzPmcN3UF+aDZdrnKVonkW2y59F44iUYe88OIFa1epUoEaOhXmtS +e9Wa/SFqeQdtdDDTRQ5lTv4MuijtO6UebC5U95inRR61auWyP5N6BgRg8exAdfEj2OfORqmsLCw1 +lWAQerIKZcdmt7X6qW3cYk7YNLdHsGlgAVpGPK8mhajEoMDEwB5tre/Bh8FFi/m0m+kTSHyJG9MF +vl4rzEuWs87EDi6u+r3tQLIirRUzFUXP9Yk8uSQk5G5JGro/UldFccTbrg8Pe6ktUvQNP/1PTjSG +8cIhdv2fxmmS+5jkpW5mdIrU8TSbGCxQS8RoYKCDxqjTAs5UK2jk9GWzUJ2aemouhOAot9e6FXVu +Y3fiIq5PUY28LkfIjp2hC2q6PtI02jlLTXkRBaXVtXCXd10s5NjRLdMyOLtrSwkcFSFzJzX1FZ2B +oSaFOP8gUnhehG3zM9OCjiE77UgmEmcNA5i3CLJO7L1nFevfutXyIwqUQf6Ya8JEBMwc1Bho4/6l +Yd2Ryv94G3fEFynAmriDwtVVPAuUhu53F1FxMz2faBUKGTq51QkwQohHWLA8680jRYP+WZyuSqfb +vwslbqyHjHQFFIaqtReS1RMv87MtOzQNZjzL5kByTsiBsHgNKLvn4T1s/ng9JgxuvIYMDoLuFOxb +v9P3eAEBpaWFhRr6BxB3FcpZZayfOLD31XywYt6tl+QiB0cXlT8OCZx3zMWJb2fdrOqGRoULmfKF +9QhL8iyC9YGgCg1tRMXHoeazc7H9mbm5i1i1gAHYlRy7YuexsQvbTWyaTPvqPG6vUZf4ORS2aCfS +uIqDD2fKhFIf8x46NHrMGIYZTmYXdhgVc5Z/Udsvoj0KtryOsveInPrZxcWwXMwQ2v62TcfaZmsK +DnSMhdZlZ0EvGpJJ0kBwvwTClJpEdAW/mqWPEpjJBHZVcYCfsc0RYFzZv1Ipn/DsacjIAZjjBuMh +prPU6VnamLUniKzh6StvShNvXK/8C0dDDpkin5hRuUmZqhwj36O11KcRrvJFP74uMk7sB4YQP/xV +vglnM7Ym9bMdP2m+ke7LN2aVCLSTd/fo92SGmDvcnwArP2goocz1p0oAd1bN1RFIFhwIJ9htSZQN +7u1Fs/cQ2Ke2sEYFujUtni8E6U1AY8cOQGjmww8QUjw1Gd3zX0pWLASBNFAQx9eret8T7Ntcfc6M +Mk4zvUrcL9Lu/ouHB5NMeeExQyqp0N4Er/z8jsYYOyDoSTWUtSmW4kpuZKCUxjyHWu21k42+y4RE +rLmPr1uEsF8dy1vqn/b3WdjRSj2dHj/5w1iNaBPQMjyeYSJf9HdLFPzzANfJTsD0jRsvT0Ojpv+O +rHTZ/NMpcQKtu+zNVfq9JHRkOAtb0Qz1rKVm2Mfi6Gvj/ddJh3CayXTla/RAZDcjcexrcZJL7+Kn +xWKu/4Xg3sqKitmhh5B++c+LedhwvWqh79PqAwugLkrxIxO84lybFfxYLu1Dh7DAnmyhidPHPvAO +dY97t7ZoLVs0uupMJdpyzqybTmAWJdnUH/Tuc0SVZIkRZCwMJYJ6TkNZUbZb/96U2fabIoSzS2ka +ETNjPDdT80DwYex0mwJpngpq98hS0pNV7KHhu13nF2ajyeO1fCfv/OiIy4ecUmjSHbZlLoRDm1y9 +NEGX5dvfAS+sCnQ/DGrIrkWNg5V8Fi2WjpQi/VXM8pz62LEN1kH2G4m/kCWkOeDz8vpUsxmPbl2u +TeFkt4fgeWR1lxpJllwquOJC6jg7/NDcUS21L/QWSul2Pk0RmWl8mm+d9EAe11pqDKOs7FAh+odc +gyvV0G470BWfs0edjJOapg4Av9FJ/ay+/zLxAjIHmeZBfFjoxHLkOFQ2NoJkMXUQT/CJEkJuZWx6 +wY2O5M/kXHGxbRlM8twPgJ8IHRxNdzaRbYPVdtgaBcB7gYA7za04DWz+peON94ik9pHChB0O7uSo +MG51VdW2/tGLhcoVFflCMjf9VpTAquD+qBibvbvX/bcaG36bCBeTt7tR1zW7NLBJx7yW7QIik9FC +U58hLpYVoi7qbmB5uBC06f6VOegibuVQqIygBfAUGDdkxwHC9I5zFELaxHps6dLF7lACq5//NrRb +6Pzcsyv8TRbf95APN4zhKPzpOmFKCQ+1H6cj6mYBLFISNRDBTnfZbe8YPE4Qzt8dAZoI8XyCjP9S +55lpsIqe4r9JUiDO7fn7WCyHV3M6ZbFrm1KFL9yUxtKO793VWcMzncz7xmxhKepIYxyLYEg7hHJO +iZFKSYuoM7yepJxWMUpeUCLH/KW+G2d0JyKunbXXGT8fni77x/85CQHuxlGudh60WLpJK7Bc4TQa +Hf6xRbrNw+DiqBRL4gyxbI5fvaz42jL4LtjQ1c8qYuDPxb46FRu3LRYIYO85B06OgCyEFgZaxEcc +tF0gHioLbUog7hEX4c/G/Vw0jEJuNvtSO7UHF8FUbo1TfHmtF9KcbKYopEdifhydg7TOsvL1Zs/a +FHT/yAkIZDZEBIWQzxQrM6igGGkM6qki0aldofY4H6SMsj/NWUandKp4Gdol9BSRu/183x8Psn1F +ZLXEQ2lUPTKMYiRAyu36mmROlowSiHweO/Zd2de2Tww1CuvzdAU4XTvlrmOA696BKyh5R5B13DoX +1Jmtenb9kg1mLzZniLMPJD5VjFvJL+DDPWncTD7Wj/SCo1lMNcZanBU0y2SE3zku+xaGx1qgZwXo +cGR70BTx5WrZB60k0kl1HTDKL3eaUCwIHLdY5lUxHeVRtz2QS/VZOu/5Ov3AI+GcNovk+0XgMt8M +/PvJAdAHnsMMnPGRiL71yg34YBKBhucUQMKZP7xKs174M67h2HR69i8rg5gZULX7CFDlozlkNKVJ +czM3dzs3zq1cb0oj81oX3uREYTYUjzzXmqs2TLxSBhWghZHmi7/SfZqY/ihhkOa30GPsq/XBAT38 +iFKNZWCNEbR/Ht8ae13FMg//vA0ZdQFhmgkzE4P0iIfPH15Ki/PQE4yWlIt5kPlRgF/9zt9wc+/b +xXra1o3U6hGhN8rBcKVIrLaKCSt3zT9p5ZBH1al6tapJknX8YAFkLM8BWBZJPJCLjCuKh5lNelC4 +reKzbWww+BHdQn6IlVn/o5E8jogXVEW4i/2yZDW3iCh7wNBFc3YCagwoJtQZduwgVGyapeX9DSJk +9UeZfrji1kDX3YqckYHTm0NiDIipx/v5ZUjRXUTBS5y9MP+z+Ppep3ETKTYj3el5QsKK5btNGIEo +dmvwUSAgwX/NK8b13vuoR5dj0xSqbvEnermC8R+hdEKDveyeJW/wGvF3lQijP6JZ2ZX+THzRahhl +7BYaGtwF9Dd8Q1ePBtqiWsFinoo6VNbQPdcBqj2kpC1kzHKoANEktHs2mav2bdmR4PyoNAbAGCeH +6i2FDWaO7Md+EOD1GT2JCK/Y2ZhtsOOugym7WL54m/SjaygSGkBZiYWpkev6TrK8kT4Ngv/GlLK7 +vUlFaSB2h7ePANSh/IcXM/FislnlBULND6xlgBCn/k3GTccMdMd074zqD8IqUnVCi+Ni/qhjfzJZ +TNLrpMAZk6jO+3MLNmR4H/2CGP3+lyuAJ4OWg3EjUWeiRD201dTfIdXKB4FIx+DHxXTT3aq8n+M6 +k9Tpx/QLp/U/3EquPPp9K+ad5qozHSofYaAzM2+ed2bX9gmF4AVvFqLtXYU3VmPUP5ctKrSpmVjG +hiIXAqK//HcNE8yxh66JHmwZG9+2ejdiB/bN7Q2hzKaulKLpFtysca9yZzIm2Ki3qJuMYkoFEHdv +O2G9dx12m4PVcO1QfU32Hp/o6qgA2zKhj3iATnX4S5hy1BjXyqY8HqfVX3GxMeMNwkhBlIMbvpkT +huEijqqjThrI8TIzJC1N5hnmZ5a41Fk1X9ApPom8sU1jyLI3ya+DnCqnruH+aE9O8IF3gxcxEwV4 +5f8GGoB45bRMt9htcvymSowQL+CxtZEAuRn0KgUxXzC8agchBFM4A1lnBCFyg4NB7aQJ5GubnM7n +2Hd4x5I3K0xic08dwswnoJyEaDpHr/dlfwLQ8vCThWatPSmJTBPle3bCXXNJComrXFTWxg2SwIHw +deTmR0IjPhbesfnjYZRK9MwvpQYpg6Olr5lKKUocT91bvFpkGnS/g9Du7Za7y0wA6Mb+VYFjk+Cj +7fneW7KPppBzWvVDjNzNTkXVW8WkYpiXdgEURyJZgp870e7PssT+5JwnPz54O0Lzq7rXXSUudqTJ +mC627o8zkAqwyBY22oMwlP9v1R2FvbkwGHyP5qCCrIkL4MxMXskFYVOoarbC7zwU1WqC/p4WOA8Z +1nO5CoYOQA0mtpS26rm5erUArjdZkFrta62Aoz5wkWTq2Wh12fwWnQVe+FGHj+LVYS7UAU9EY+lb +/t31UBlEYhlqhlironmAhbbw6jly01Na5BgT3jj0MhY4IbHOsbrerQJM5V42L3Tc5z0JfrkKAixS +tvnJm43mGLW4HsPLFwst7+Af/jT8WrmEHA0TWUwNY1ma7zRlmrgHWopBQOoSHo1BHfaFah4jIp5P +IBTdvowBUwZnTOD4hfr+WAM0HwsBX0Hx3bq4FQElzBbu9yj+fiIaVnwnU3CkU5IPS5gRmG2aX7gA +vHB0FJJKd/w3s0mClmkc5CcERVbJNzS6/87WQWr3akZPTBbXMX8MaIyOrimMrTJhncLSPXUWe3D1 +qj8U0Zipoi+bxK/eA8RbbFe/TZZ35/X40hFymDDGO7gaprQWzo+vu0OVdpHzzb1NXKFtel2dPrnr +QUF/zKbAAGYAKEW9xrT4lut9yg7htm0J+aiOwrHoqqah29DQ46/lIgKf3iROnZRWYh6IKHuOXQv+ +2GIcyQHy1un7YsANr5uPCEustxCHReLJyx5CrF7gPvoc2KvEp6bO/sFPmOVpRzFner4cxEGZXNnc +ylqC9q6ENMWoUyJ7vPCrkjAEVU0tvd0/YaIVpCIsTSE2ZqNkX75pnyxsK7yVwB6vsL38NIMCOvQZ +ZU/puz0K2bzFUKZ8w2a7osEP6WzmCj28QfAQpWa1TLNJWmVPVubpLkwIw99Mc886wr6Gxy4dYL7B +JafKuDN51NhE3nElxEwuTj7Gto6E+7CDznTu3uX/www2Cmc3BYWNIFaVj+GhWKLzzfa2IgAyZiIr +R9jYQGtmIwWmvQ0M9SrmKzs1v/ksVKQc2oARqPJzRF+Nrenz+/WdVvfjlIAd3SRktfGnP3hEoA9C +v2ztdQY8fQIMnhq4DFQOMcmcPIBxIUlkSUTKVZzOieFLkDsf4dx6EttlMYOWFrkmTe6dgbj44hp3 +kManh7NV8p4e3IQ8OxzQ22s64BDFwwvEgt8ouHkwJPzuLkJ6vOALf5/PNvoqkKwJqYmeaVvjkV2W +HxzMOhm7MKNI2TBtSUJab7f4Erw1yb/7f6OHxi7KnCIclugENl1alWc0xDRGOHWjYqzM3Dbi8mB1 +67mvZo/bUxWWDEFMOR3i7pq9ITKmGs+V7rYengaSxYVJjawGhmYqv9V+XsmyXOfbvKv24ocMDq5C +zOIwf91nQp/bemtZTBwMFyNWfrrAZs+hfL9PpKpD5i2EvR4PEV9h2sYyZRnePyl3VnO0mrV/4Zq0 +fTF+GLQW0sJlkVnV8vO4qHgPWuQkGSBnVb6DvX9wmqTUuBNwbCAd7V+MXMi03ZZxtLQNYIrWijym +hVvBlcEBgzcv3ZfguwhOxbRX8aX0qh4e4QQgGlDVTOqn0H5lJinjmNFjFTU1TXCfk4jomKkBC5BW +uIKmK296+O8lxK3wAxf+v03Yms+R1/hgm2F4D7i50MfvtkYIYMY6G9Xi4PVttE9vYkeHy2ke5aCK +6ADSzfM9vFinnrPqrKNKVPlIYQe/4MRWTmHjUi9V6yb6FC1m19vKBWkBSC6bhYsNv7jADq5aIwd/ +NaMHK8N7sUk3TVv+80Z1PZKjsotRWWFTJcCLr2h3cJQhhbwAghE8fpTmE4F5TyBMpUgPVo/QD4BS +H+gwTMFyLaS/3xW51OuNIgMX0B6CR1jmFfKj6z9pz85AiNURAJnxPWwGHEMp4O1LkcF0hawHekhZ +YZ+89yGC931oNUoiuCaElBoQS5gRqJ6EgJy+KpKj04G2wzYwCTwP5yYjBgnDXNv0NxlIB+rCA3Pt ++2BzhjOk/opD8bMBQ5g814IF3g/kM6Z6Qyqff5XJ5pOFWGwCSrsJJpDjZdiO+2h3SElmX40lFXUv +dn8PZpQdIWON5ujdj48gye0oD+hFq7tA+lfg8DXeQM3ac+V3+n1/jcLv/omPvzfj7AFxF+QFOIPN +huIIxWy42GAF3crGtVXR8rHnKkeo8vi5hlBNfWnkhiHzxtpaL1g59M0j+PyjweH6GMtW0Jn9QiIj +feGBTrAWUtGXko9bzJGIN9fDv0PxWo0FZnc9URvkvwWf6Qqe9L1bsL0OFeHYRDj+C0Z4ngYBO64V +cS8pcIeswIRsLWpaHd/9sCG8Uqx9SAePvcwXLhOTWVoYZEutquUomT9VlAR739ni1qre8gAhFNmk +Rzs79+wGPEiDyu5LErH4HVnmjA6hUdwHuDWbvsO1Hs3290QzVlt0c1itllk6f2Jj1qKNUjH4F4rI +RGcjDgQn+iFn1dwLFUCzwAyT2HUjj/rRgVq8wIlJUENROguo4W3Xcuh2W517xxp6padJR5rCK33D +rOq23pv2xKHfRSL2yciQtVZVMvPRLeoGunjSQSomRZGgvMSQexw8ydgHK3scOQL+l0/QRBCr8i7g +ZvliZvqW2Mhh/waXFCExwEsAfNG9VwdJgvfbbJiW6mcLy95hDywtKS5RuM2lp2iUbyOlzqoHjKTT +k0IaxslvvlL4snPd6j8EwjC6dmgn2jrsKLVRuTX/GKUFrxFkucxera3pirYcFQljl3X+tgneqdb/ +7zu5eEYBBoZ49Cx+tTfrCqbnY7r+Y92mZ+7UKTqnaCcBl1cecPufkQxkcxE3m3m7QOlgjFbS2XqS +hktcKxN/TIPgqEAGPnP0K9Tl2Bsw0j7xKwJgZ8eT/ivj8jPHyLbJp2ScvR+UWZVKa8+BxWKWHcsR +lN7ez6zGVweVuignQ3ysfyTN4h0ABFJW+lMTUKiMInT44nOmbzrwhZA/ia2R04A912H1S2LBK7Y9 +Dnv05eXdaGmVhyhnTYn9r61ITNR9pq0qNRXo6gHsrU0M2f0JkoIfUrwALOIAZeESdKNhbd6K2hLo +qxPv/Z0BQEbOKdtDitsSlMWwk7dVZZL8zSxrGc2TZLRq9s65BddUNGjhv9fWu8AzSBN0q6RAnzvt +HoppsBpfMaRq45Zt8l+eXUFl/LFloiUP6MjSSw8nSik1LJJuQdeSREtZOlOm3S9amjwv4jdO/+7L +zlpsPEI8veWC9GEAtgBohVy9SUaN2kGYWWrEgdUQQv4ZELY1hgVoaeuvcq6f9vcFQZvA0/zBQmHE +5gXe0/iqip25X1NFTSb+IwaJOi8tqoQ5iQpbeFrR5g47p+0FUA1vsozqdoAzoKCZn8QBXwAl9T5Z +56wteBpc7zcuRx8QOuOgWfM0ItJb13XKtinNlHm09I3475EUfyBcV3B2qlH0zKUBf3WwHQFLcHUW +APOLg5065wcvqtAke/kjmIFLbekJDtXhA1fSUyVT+tZMtvmMZ4THveibmprnicGdGKoaQ3OsxoyT +McoiWVjZqXzshaWTZxL5vMEF3co05LmsxY/aQMdEYG2Wtp8stAx29xI13EJ0691xNMx+ksRbPxCI +/Y32YY/nh1pGZpHCSgA3qTuD0mtRk6D7DdrJRgmnWTLkU1LiTAdJne8yWipRXhgzWAyNaUMmALVD +sQfb7K8uQgIrbhkfy8VTxCIQPH6m3TN13FaTrHTw8DLNq9+4+grXf/Kze345R/aTIWBTdC8zd739 +MnD1RhPR5KOP+Y5sFpxGR26Vhk+PGh5hKoBcUsYWf+KRYzVPu5wTKzAaunamP0zREcotZSvX2ciA +DautAOQd+62+VgUfMAANCckiwZPsj2lwpQo/Y/Yo4uzlfAfLO/dExsrWjkT/gjsw4PnYLdsB8TPF +hzMW7yVZAQSub5d6gT16Uh8rSZn76yELcT7YtrHsSHfQar0buZt1IWXowSmrZvRqgk0nS7bpdWEz +nMi1m7fSIrKYNDxcDhiB6QUfzxWq1s6xyWiX23QwwseuxHaeIcj4eVqruyonF1bKsD9zYBwcQMBM +FWAgLyWuZ+Jq0SVnVqcEtb5gGcQidh1kzqPlI13U3exHYAjn0TWlPtqd/nztYsecSqgp8E7mMNTX +Qg5eOu2/E5REgl+hjBo1NhnUwL+jgnvLCweEtBH6aSmgjFm8UnCGgOAaeGuCZc/Kz9qbEl8tgiFN +rLsu4O6I7R3zou+c2aP5U3OaSorpJAZNwAI9D+eZyMn5e6iKOj2uIkgSOoRG2dVAi8DSpUTUcWj8 +YxoTgZlChu1Na8ZTE/l+bNEM0LhVIUziQnohN0WlvGGFNa4JLxfjh2wI1x2Val7afxOPVWBDGu4q +9Et2fb1h8CboFWVLvCAWTV4PWlFXszGjlcSl07vOYmdcdPGBRYBdY3HTwFKsoioJO6sf60FC9bAF +bd90F6t52zqeqwnLFG3fKnbNhAQbaM6Vc8VR/A9uTPXzSXOKWKC8FD+aM98J1e2bmq2jaRSK7CsO +6xUqD3ylMbDgZ7rjNGMSy+ECqrTMzhEf3Vodjjp5jwPkKW76D1rjD3SHHYrdgb+Y8pzjqJ7HVPBy +tsCu9dE8tQJHJ2uC+Q4umC8Hzj7sL40G6JeU8eoaUTaTyCLacL/Uin1zwbrmk8QAlsQz+DuZXnAo +/hSWJUAANu4/J5AW42F7OdTP+Qe1aaN+cBdbZEs03TwikO8IeUkijEwA2GoAgwIo3sclcWtnxrSO +R1Lv7m3OMDdvPytoc7xoB+4yd12SOFS2Mzs1m/5LYyVX5zUNMfOVxbSRz4NX24CrnErEaSFxsQjy +/oWTRYbkmVF5ZeudoB9Zlb9gNQhWQZac7kH8gHpGjJGNFGCUgqw25+gn6B4CbS40y0dcbMWCTgRi ++UQjK+Sh3chrLEhH6QT+8kfz6Chy7/I2Jl1dI+hapFIvre5MNfT/mManzWpbVvaWPX/jqV4H9g+K ++q7cMtVM51EPCGieuLAJZxUANcst4hJtAqDn57cI1Yd/b2Zj8LXqR7CpRBx17crxeDDfL1tBSMJU +d7m0TSI76rdG+Vbms3pl/O42gTFQUJbs8CYhmMtcEighupnnZYnFxzvTjDyO9UMZTYiKsFJOlsej +0ne0N3ndHs0lF09TCkqpsNHc/IIqI5WHcgO/2cODc527EkXtoCC+fjnSSGLqFvglH76F6T46iv+0 +zq1hMRvFHqolp4Es728zcWIr5Uiu5yr1jubIzxvCVdzdQ90wqmoYT3qjIpg64Wh+Cx3YLRQUEmAj +DAdp0CxF/lchZjJBBhqTYiV2sSC7jc/Io8CADE1bqom0lRXSABaNCu5dd+eUaTBXm4G1NM3fBRtX +BGYI/3Lw8mo73xCjaWaZHKRazn2Euoa4mD/2/KKDQsCc/SJB7EErtMECHCZroYLEJ4g5C02xk/A1 +CJSg4WR0K/9tcvshaWd6vOCPjjmMmWeHsvcAQYQWuL+sW6UsCiUuQEV/0oNywegGHngjgojPB72P +bmCWZu6gJmm7DieoG4bQOFeOVFjkdv4SNt7bevzUoFFh0d9xu+M2wPcqEiRg3nhiR9V6FEjeNCJL +5JDwLSdP3RetdZYWDyPIYhaiOTRiMNGCTRaZEiS2Qw0vpcMd1tVdIDMlVVTG8j5R0DDltDb6Eg2U +UkVHENWFOG3u8k5XQZouEKRlJCQkl30V7cB94Sx4Z64dCcsPORIT5EH//iXCdfDoxwd2w4FWB3c3 +ZPbmVZqclZS0nIO6w2CufQn9zSkQ638js0DglqfL/e8B1j/dHklSDFlp1bez1PUkiKcS5DW2B5pM +g885VaVQIdwMZr7PZVMaaAoG3DTzffYLdua7x5JZTkHnbQWA8cDUlRX/JVxX6cQgSV+0IXKUV5RQ +FwAo2ui+vNebQPtyUv/QaEdtfJ4CazcrPxXXaNJFok6ieCznJhua124n2b4WXK8BvBil6NSI1mEE +In7Fr1O1N8G+ObfhLCvzWu9NcIytgaJiemEOQ3hbFHepNjx30fYLxIoiY9V6FCeSpSbWKKX5FqnA +fpEILked8Jyn8+07D0igW/Rsktv9zG8Fw5SCkBIkzqw06YaLMGqhiWCrhgslMEtuBaB9sisa+cPV +FcDN+OY6ui+whTvsWYh1uXVV3+ehYLPiydXzvHuj1C77dEPzLa3B36/v1HAuupQK2JEaeiM2dOGq +ajsup1QI/TfvoHJDrlg3zIMH58WgP0JnoDgpCNZda6RfreD9yGavg8z+Aab3g5hIGviuoHPGIyhh +rX1GcLlBwU7zvQlCqOt0slrf1ivBazM7YcaBQzPrJ1boJv4db5UYM1H0st45ZPWCJk7EH3k4Lk5u +F1wulCytLqAEY19qo+BNw0iCqLwD1wvcgwxseU6GPLeXwckwPwQBCb9wJzYv4/NsnqAH5SXWfadU +DWMD1qs40Ms/hKrY91DGtKpmlQE9EMDXroUuRNei+29XjtJBHPwM5XWUGVgSct+f2+zpCae590ms +LxDd3f1OqStYYPpRdiOe4Y/+1fdifKSn8y1cfe2ae9M2g4ks3YGslKuWs7LvM7Tz4rggL4mJeZu7 +Qx+P/uN36RTslcZVLB1RMgPTzN+IkiAjqsJGO/k2ENLtyNb3LPfXLZIqPN7x6kjDA3ygjsiZy4iG +Ep/1B2t3w3whp5z0RxGDp4P6yTLHvyEbTck0u0oLZN24HwdPD8okqlx7OYgtd0V8rzX3ydqz5cKR +ZZYp+X0+DXve4EDLfMjR1QW4yQoUl2ZYqPXfyjiA2fjxh3luQsh2j/tmossKfpsPMTyOSqqHeZq9 +3EbwowfxzXd+gPYYhJBMLSqN7jGDQ/QfEZkm00vi8GvhAJSwPIaqRXxjjfGi2zAcvahK8lH/wJxA +2GACX3Pr1rePm3ATW1HScjNXFH6uDqeTLBwnsb1kUZ6iZ6BUPZDgXFsSE9QTizB5q36ttqSvcle4 +vXiwuuMRzz4h4wZMv8sWDh/ak4k2ZXthaNrr3TlU/Lrben986Bh+ZArujVIA33QyZPLIti8d+omY +jg/YRMJ+9JCJ6PNchwp3+zdvQWfPtJgEJHSDgBUFicZ7/rZdXRYkC4YN5X1upKVFB8cEAg0973IC +em6N/8JaQDAu6IEiSWmGtGw//Alq/9M6XKO1CetTi/Ognec96PyntCZQR9GI7GA9xt1kWFAt55FS +Qi71KJtw8A3KHaz9oFahCQvs8IeiWP3FuGxfkA8l1qYG5utGuSN8q9Cxxh4PQUh7uEVqtSPE6iXg +sMNKcwAMXwsEcwh1a9LZ1/kD+LKrx3qv2SOOA6YNW15am4oLGWhrb5j4mUAnJ8KLCA1TCaDdHM4T +UFa4Bql4AR2GJiAKceMX2t7+8x0CHgzVAp169zyjEEGC3vrmeYGOtm3NgyFAY8pZ/O6CPVNMew0c +fHa6zGQb9CX/ICdS3YOT/hKmKC1NKIiZvZ/oqpVxwzbi6HW50Qei6cLEwijDO+nIhiTI4iGuVz+/ +KBoeEHw9c595xxI0IgemmUvZtfvEtsMm9WpxH0ueMDrJ7BYt1xo0/p8eWTyHhDKfidThlPDAeSNB +oORje93aZ8sDzcPVMqmYmNS+QuqSf5QcFFETc/3XZx+hLYV7Nh4x1TIyeXkPvLFUNI0jaTO6QfyG +mLdWgLuCV8g9HBf9AChbdWTKHecptW+bRHnNBE03Lqk9WHrBlhTcyFvK/pIykXkrdxWAl1/C29Rq +K2Y/NIW+COSDuVPXcCSK5QgJBqrWAPVo4pW4yaV+kFWgAIwh8eUgLmyIvE00jWF8GeSHrtENQ2Qf +vPoEWcjc7TEPKMpswFYben0L2/ToGCJK3KC5npF4xQfnuyb2smTWuDSBeX7u1Q40ZhtRY0joZMVE +r8QRXPvA2sEaIp/4PLzAuJ5FRG5bmkH7rwD+qDseCaq7170rLfv8Ga9A+Ozl658WEcQ1fwcBqGDg +JyjPsAozahxZlEiYOLNXK5g8ja7buP1mqjmFquxNHCePxiKh5fv00g2G8hv+p4CtiKVsL/Tnhu7i +97biwTwdlCBdY58ebOFs0ALuhyVR2iy8Yb1qJ8MKa68Rk01itd/d0Ut0MxVmxQTMVF1X74VYLmMX +4apWYdE+RtW2qOggekNSA+MQnXAfB20GDcdBnjpDJyDxwNvZqx1sSFtH95CVWbTKL5ulvZFW24Th +SZQN6qIlpI2caI4m8QEqkn1dBL7FDaUUsJsfYGPbZ9ZR6rn1zT+sxo6al3a/m7Pc+PsORjyQW+Mq +zeqQFw4h/jzhscwBK48LCprWb1gCJlvhw4n5k7IjVa8AnQKJkumii/BY2/yn06nHhOkbJRJH+APS +SoTsa8uq6sezUSMcwqlcDJudmKx1g3jQCMjDRmjLH/E4DOcgjoCgI8Lz0nGPxk89W4KbDEAxnZFY +bTUr+Vw9CHoQUE9gcHqJ9xurKAyh5WZRODZYZ8dTfhFgoWONxBr78eZsb/WEyz3a3epmyxnbl887 +LsPRPsi8ftS6nE2kgoDxstVeQtG5ctP2ObR3fqmpUJXSzKWuL16J4nUgTOad09QwLZ/I33DCjlw8 +Mbo2iRCT51nCawlqOh5YHJ58vYtvzYIs3wV9S/RpJZKuiGZLRIJpFDyLO+T+Lt+y2zNzrrRMW0EG +dgZ72EmXpogALjBwmAwRTKSQyyS+m4njVGgYaD1bBoXe6k/oJhDYwsYctUB820ojyozdeIFVWh12 +PbJ6k/Z36PZBSJIw4cH3KdCG19Q17pl30KbiFIVpwaRB8bKBy3W7wluettwHpJwlEoqUGQggH16+ +h6WXmAcTqn89ZqkYkO1EYktxc4VyY1wlQlpB5V7XVcif3tDp08OCqOPSL6i3tRVLwVVa4hJwH9Mu +l3CUjCZs5ig6Pm9yoN9597RVDBBeQMNTIle1SjxZS2t4M3/Bb4Z5ZvbavTmuu0AHdqrsDwsZBCkd +2nute5mf9RgLkl9uliqHiLLjk/aXnWDuSIJ1jExrOCQgmU8B3ZMNq/XBBfSw5DbmuSX/hF8YKrNA +cZSsfL/I2n4/nQJuoSmSt9Stm5nhF0R73Y4Dl0lZsWvDX2hV2ftLX66l6KJBCpqUXk5Zfz5VZg2f +yvMqkwn4jCc79QuOLYd11dH5SvUtrfiHlwAFBNT5RJW5nr9GqLscf7Ff32U3ccMlp8P0FQ6Hv7dU +LJzEIdzzUvouT6TKTzWxWkKARfqVjk/yLGg7fxlU27ffxyz22YpNFRbvCOAuc1EAXDgfgK0W1eLc +SOwd8D5QFEoxXtitMyJ91/5Wthbg+qQDHiTvtD43EkHYft9EJ/CNFaoBGJ7RmR2ehHoI2P2m17dD +1sHrp7iLdoJpsp84QUvZTCOLBX3n57RBhcV6VHSsh/v3UP1TJOBz6U9JoEo7Xz9FLKpeN7F+pgOl +S47+RoTrEBSHMIvPE0shHCevGrvgYrwjuPkZLor5++/jPsjeSTDr+UJ0+XZPwMv1osQEWOOur80o +/Skgv8bfWPVFLjs9nwm70oKE/0QOnMbX9N7/b+6vXm/iDRpOrBvSoGYaghOyW9ibNupBxlAI7Jhe +RyZ9UE/iKV9mjMqhGD/snPxNap2k8CZMTjrIOw5hUOYrZ1VxwQqZBwVLFOxDHrlT2+l3lYiXIaUj +h+54gBuOqY12TkZJviHy1/Q/cIRN5M7APJ9BHNunJf/tTysuYhzfc92MJXQBu16Fg8IjiCYJW5JT +o8LFh0p/hTvXIKcjdhSZBGvI/KivkFR4AW+ebtZzVOYt9zyXJMg9OHOUOvqQ4CVJ/GTE2d/Cp1sU +essl6l6kVTaU4I+31FLb4OipjGn43O1y4wer6803bD6YNJnd3vaVsAo8uGyWd2o+FCrE/YlxH0qs +4/0++XQ7pwI1S5rSF5RbjjKhCh/f0O83TtAF/NQnogW4lI4SDJhtXtNR8YP12XvGQMNDuHveLl6b +88fOngGHzLyTSltb2s/c7aXzc2XM2vN/mUczACUhopuZCp2I/49GJ6T8MBNS3SjDvGIXlcGDNK44 +Gd/T4F1cZWBkbv2V+PL/VQdqC8hwLjSKLUF+NTxHfs718g0tt28DMzo1JFTigvCWaEhXRa06Glsk +1j1oppyYjxh04b8b/L949rsg8NkWXIFN4bcKPAh8IRaus1ocS5Bv5Ea7Isksuhno5JmuXc1VRO+U +RvMRejFNeiaLf9QauLj254dly7oLvhU/vz7dx7h5vCGHb9nOvbg55cEavoFVecwBi1vpSbqlRyCa +Osd5r41XzNRqT2mNgK1ITECwxgvq8hPuG2n0S+OR3JMEclXrttA6qkVLNwoV932i/+efBQubg+9z +CUBltOKmxTqP3koVxiXLJLmHawUmU3dYjDEjYZ/9sOULTlyqfldwP1MgQODO1hWI+2FL1WmANWeT +OsCGv4kdliddolNLcr+/HteQnhOzLd9k0GEHpvs5v4gaBeCrhn31mZy3LJNZAtTQmIuJz4Ifmh3K +xFkxTNP4q633USzCb5VYC7mJt57X5S/JwZV+UL9xX9ZS0LfnF7eNFeyH0U8+0htMJUa3ldumazzh +FXpIiFdZiJ0ZxpU7MrEHaT2IMa7xUM8okTGKEgGzG/Ta5Y37P1Cq5CEtGjBxIlThU1M5QVO4UxpR +rUA8YK2M0/jRXZsAEfwpSbb6r29JBDpeZqQ4SM66KnPwuKB3pvEytex6d+mABuwr4bZxz5jiwRTI +tABUu2IAweaDB52UtdoV9Qebz+HD6oxdhwXU92sq+x5moG9bMfzbWBj5MLajIA4wEG6VE49x+Hd1 +Y+kD8N7pPLA9ObLaT3BO73NBUb4VhWrmjut425+mqXLEeAe0ksGZ4JsQAaKNlNVMEKl9HBUUXg2Z +gyW2/c3hlZFGsV2DejSw9GuaB8DqBStMNkOKZhevF7jYyhNOkQ0TKTbfR4PVmR8+yxaUbBXWxgu8 +OsMb6kUm69+wuoFT+lysr0XOae2HoI/ZA81xnPlLcZ8xauW3uiSkV3ea/BtjiCxxGMzJVC6eI8V3 +xzFzG7YGwjXP2FGWU1qaieQ55NyFTeccasDL9AyI0+RNNDNd8Pk0Dag09ud/7Ei5uTvJwarUu5oW +Mjxa9zS27eboI689L2aNB8TRdeRIHY7xW1BMrKw+3rINRiasr2OhzFMbg3b91C6mFmN9GQ9ODxMi +xRhwy87F13jiY70pJ9clicy66b6ylDOQllcnq46EQArjgOW+eJG1Zu9Um56NW4V8kbyR0vXa3jrb +ejWkdEjY2nCS38JabLNJps9zXcNKx5Mt123uBYhe0iPVemJ9huUw5IoX+Avg/QHUsw1FSfa5jbjp +4h7xJMxomNoax3En1nMeGw+ON8+7xYOIBeVPbr+Q2Efg8PzFsVvyGgzydSRiTtUlYQQOqFyY6dVj +u7pwnkdjjWKTsU3oCtEJoDcFqzFpNQ2ChKfUgS6X1LeR/+0oHZVHrs8XZT3FfSVTCHpLlcsVd7hv +riTc8ClCKvLXkdFNhbSV8G/8VuppqA0sjLGbsNjyAjDh0z4Pmjrw6LxgpDuw8uTKF7ZWQI3vWDOn +RmkFK2UCZ1MmFNmyB9eu7VH02eq0CfXJm23wJM6Svhler976XZ6cMqwaMk+8cThllDqLqvepJEbz +Nfwgf0RdIt7Qhnj60j05CeENFMvu7LZFkHQJsqkMUk8oDoK4iDfZsLxeSy9UDdZEujxrJ6aat69A +urn11u3gY3uWD5DfaQ7ocnR9uw2dxDxgqunSx/iFFTAewZNInVViUBO1zWzKu2uFSRJW6x7xFGb3 +uKrs2RP+VC3ZPnA0cOdz0Kmsd7TjI6UpzQc4/kaNpuL7tLAYYDRz/g6vStZTaB7GV8LC18p49WNx +8wpU8uSJVm4qf+ZbQLovOyz7UlJoRsNzaAgvvxRdrEAy4eCyODg0no7EwNGR08HriohLjJASamUT +0RxoKfj3d8SRNMQBVluMhSLDzU1jiqbLj2yvaRH38GQBgjIp3yzExhsmhpZYKgR/4RIf8uV1thnr +p2Qvf3Lpz/Ex10jhmlbjK2w0HH5OgxcO/0TlloIQCCI5gsHh9tfkVIEHphi5n4XgSGjuq8aCJ4rq +jaRMQAbTMJb/EkMGX9Tpu08uIpkqj+PkXT+A5dkc1IANM6A0taxlZtFF3ReMeXkYpOYDi6L2dqDP +3iRZGMV7xGyyI+BosQScIt/o+nsgMwyicKJXJW7PCGtVzbgQp4d34bh2TjHGhk9Fu738tD9uUvqN +PE9bI5ZoILEYOANJjRZ3jFPHR0tDU3H8iZkHDFYKyAfpv1QtK6j0rPG1o11x2/hg1/Vnanb0lh30 +FdJDFvuSYsQGpSYUiri26OHiANZz3Zfnw81vOYiS/dJX+J9Ro+qOZwLt4mArIxljrt1oi1IOl1MW +ga93ZH7Zis8Sz9fNnCBGAqy6xsEJAPZT0++hAeBmAdAdjhaMVnLHzGHEST3BkGDJvUUIMvpcPTg7 +wgwvYSWkXn2s3dGFRP+RQYz+1+T8DgeirLm23lu2SDz2nNv55Xl4wesnTN3VTwryoq5U4gybaqyh ++slt/NIBCdRv+iv4WEBvNq0O9XF0AXTlud7PixA97BeRpO9aQi6Peyk17eAySRe/gs+BswUtrjF0 +WyW0Md1q8yIfC7X0PlDZERLZz3uBdtfhmakrgfZIoHcAXUn50XB8UFaMK1h/ovykuv+FcPO9Peci +5YvJexPitBxO/gKq68UceEkWzwuhWetqlsIO2kc+9nMp3f2urWl7UJUbvPvPLSds6XRvVaQPP4QY +eOLwGcPuUOT3c/YYtDlsb3mg6+ZxdHNpVObYLUBpUXPxbz6i2u4i0SjtOGGcix5ZVPexPF+QgrDD +MUutL261qO4K8AYc+KFw7hbiMhLAb1eYEw30r2ZCwBWz285qLTwIvHxrUlDJ1fe830k+zG34kdtp +Ud36E+9pW/BIfJ5kD8Pw9ZB3VHAcEa9jVN0gFhRUFS5XHBa/pa9KpITla986moXYipq+wIqOor1K +4MCEK6w+viqM+9jtblC+yFePJfZg/AhHVWUNwnU8f0m9qgj3krCdHJ1LvHy1VRpbD+AvYVoW/0Wb +bfH3I1QaWna/eEfNn+1kdttg/z+SVEAPXwG2IbTpBY4gcTQ5rwOA8jyculD8+2Ly++KDqXeTR5yQ +AEW998ODooefvzQjx/Z9eVOTnKXcWs0iTY5iblXEARNlMGFKSrxTZvHRpHpy2j4Z+zo1XTnCuVYK +bJMJaIGwsZuVPU6kvU5nFSkhuGa4Ue9rwo1dSJZEYzd9s6VflPvuKQXnD2s6YLDCp8ogRjC9xJN+ +iz8nXkKVv8+AtuHBsR1GxazXYiuHbQzZdHvf7vTBR9fsSsq/XBLRWOP+xE+V5qcRAH0Ay3ICpKIC +MrAUMN2MYVNoZRZoFoVl6QPBD5JB25/5r20JzZoRMhD8HnznrRhaxVFpB8fLXFCiYeRTxQgHtEoQ +dcY2zjvcBti6medBbKPMFcN45mJ/vUSGVwgw4QYXLE/eXM+GlLwm+WQOhegKGzrgOB0trUx9Gywi +4USb7kzRLb6wRNGV9Ja/CbDEKDGL7N+5dBwIJL7jIxSo9B/Af1DVImkIegRcGB2CnFcAp8pgxXH2 +cPDxyrZhdIagV9FVLTU6nGThSaKRsJ8DofgKFR5fqb/5fYYaGS2+FNhv29H9i/Gngjo/2J94rqWE +2iQxSXCfjNn5BSuZtM2Q71frbccGgbLPm8eW04QBthHz71wKNoHTEnnaVtLHwMXLiJ4BeIGjNfwf +SnAe7ok0yUqaaRYhI5l3w2gzC2PXzImhwnc8Sz3qARDNFE9NMQfOnNA56PxMYocsOyRDTiwgMoVz +HCYhrrj3BgC5NDlqppVBIlxRh0AholH++mCyX7VemUJ3yzkNiZOuTG7nqGCwwUYrZmTn+bJkctP3 +zRbl+WXvWA08E9uXlKQ9/LvD32Q8ZjD/y84FeaUNNxwZ40xrRq0e08gLXPYjXv8KT5yOxRVLpq3K +tJKiRotDcoLecnPJHVWzgYReTkUiIy6IVoQDzLwI0wN1RVEBf8PitMQ8LaQ6c3AlvPhHUZ2LH5aw +RxzpL37yudvR4t5kC5yhVrCARiTLuLra9ZFU6cfqazlrbiTcTojLH/vHilxhuoEss6Wavl9rI/X9 +pzzDbo2mf2ZOU7K3zd/ES18is+KBUjBxGIeG2zDTzPwdkwEDv/3+A9AbhAC4/ZP6s2/xEu6PS1wq +Pr5SFd7vX1CM030wPbDgjl3pOUNlXZ8tcG3yHsUlx/LzRyCrUWugsaM+xWxAQe3TbumHy9BYPPhy +h8UXfp30ryBJphVnedQD2Rt/GlQszd2Di4SV06dpTMU0/iIhta+kchji1S68dHaoVYN6N8reBrPr +1rwGikL2OkVPFrXYCpKtc/lv4Fq5JnMODloZYQ7D6bE++U4+mTRuP7dPIJrAe0RuckCg/MRfMRLV +Hjlny8v2z/pRP+wDDUMAGgWxy/k4QoNOSdreR/HrKyVmibTPhg7JMZzX2Q/A1W4P9LxIY/i8UXU5 +9ifjo1hdZX+Nb8P+kYONDSHKkzbt/kOWOFUrQrjhKvTe62GuWkofsRWlCMmmic1RfNeuob9cFRLq +st1fKVIrmZfvKXNOrtdcZUixZMfLw7cyFW6IH5L2il0FXGSfwxnAFHzwmNtk1clc/wTB41EWFTuV +h64+RPutiyduPuuVImcG+b3h0PfRMJjGGXaSyPq7BlFWD/pkQksJGjb18o2ntEMaRmKPNSf50iu5 +iC1ZdYi5xmFz9XrB+STb5YSLsV6SMLsRD3A8FNFm0yLOyUCmoPiYTFtT01jmL/z92Y2oFOJ03tUN +QZOZtJv3Jo4H2mEa+5WfLy1uFNwEmleqUkQrwz9bPgZ/U/UqW6TNIfiKMaTQLhiNGtMRQ0EFAH21 +YHPNt8ufkyfzMaB7Fxhz7IXczAwrhjhBfyBRQc7JnFrZbUyZvRdjUhEn6R4Ft2mDD/W517mRmoSd +/5GpdiMp6RMsvuq9I3j0JBOVF0U8DAPgPRktFDc9C108RG7qhZ6+ldEQdpqdpZFbTsu3dpaPOlk1 +vauXjf9jlCdAomFqFvrFkoZh7ZiBO/LsjljRbxbTg+B/7oRviE58yeSkUT7Nj7KzgC1PZNRPN33a +CNqSqrZOuOPW4kxV//QrDzEO9SWRsUg0ixcHFFnCTvmpRXilmwi0Dtz0hZBs9SE/pkfN9MM+1jph +oeQTzv2lCy6oAeZlm8VDUHXDAnX63s0iKMLOn4U8M1i5HCXkZAaij8mvf/I2lGbG08snwbyT5yb2 +DoZ/GeHSBQKF5CcMmFhpolp4UsRp38PJXHSUj90D38flxBoVJFlpDTp8paBiAHrpKqcPfZZTjWeZ +nsJH2czVUqFujVVfGyoPaqqLjUiQM59Cx0myhhHuDq4kfAO9Bqd8Ijb4h+zd+vM19rbpgM/3EzrY +IXqox+wAhy5+rIL9F1XiInX4+P3XWQFKYUd8AWsJ1V0yjUiPYqhWK+UsRBgxbj5g749JUvOK5eVX +yAbbkb4A83Thl1G3mlbbiDLUC9b6uhIzsK+Sgj11xSuanXYOItKRh7QMcL+Ytb+EmHHuDwbS9aGs +fz1PXHgm8A8AmIiUFW5/06edPo+rveCYE4sBhsJIe4EkAw1oVjrbBnwGuxCubtRefVamKgkiGD+W +BSaiMCM+sFaV5y+EWHl5L7C7mvGlNJdCjDCRRQQH6B3goG6tLoDPmhqg4woeyanwP200QK2m46Zs +g38A8vyqPJOWruO31ICQMAGweto7yicpLBFFxC0BxG3165+6/rBAI++fpUBTUBCPa5lLwY7ArUwL +U8Qx3idP2lQ4GXA7Q8OnHcmiETvmwrBGJsGMHLI3OFQ4hm4CDV2PXsiOCO1twfZgN64YJIphl3ZL +h4QY+Gunswl1y8lHXeAL9VUgdV3xjmnREp/K6jyQ2p5QdLk8nvJAkg3iBUAaE+Vl7lLhb9zc5pl3 +KCc2oByAzM9WX/Uo7l1vjKw9IDgS28NJHqU3uBr8HGLgPrZ/zcFBVY3NcgtoJXbbNXBtpBFIugqq +CbjfbDXl9mhcY7sWuQp/wfcbtqoF2sJs8FMJs/gD8SbzxkaMEbEKVeusQ8t460dLthT5GSiCSKxG +AyiNTUVF1yIL7eYxokeMWI2Wa89X/HmO0Yu+H9GjHNPq3iemDL3kjIxm4TIMHRoa5k8Ib06lCsa9 +xvcuUyw0vfMJ3YqinfykuQ/awVzSEG6athmEgXxG7xw7UMdhD8lE6wYWGTDtARsIBqXrfXjy9yRI +3GzgiOSUzNN3iPnLy9ipX8HJw+EMUf7noT4kQCjUglrNHGgcB8Ek6+NSJR/zNvWLkGk3w2iPTv6e +pjh4mdUg5TtQF2tckN/GAYnjd5b/pXCeAyg+R8shvOsfYKtKos3+bqBKmYL25eO9gydrD1QMw6FA +jAaGFwWGFhJ+w4UVGpKMvwtzlnlR3Z6gKSD/xs0yalP/ttLl6vR/E9shdYnYWnQXPiLnn/rKO0r1 +5TVOHtQLToXCEuDro2INAG6gAFtZuVguH4EeyGdklKihQxB7RVmt98EUrAvwgRYF/GDJlEVJ9Jw+ +kRpksmsLexSqnuOIo4NwifZawGV+UgnP9awRgqsP2kro/D2saJ6yUN/OBO3vZidY0r4MpXINi1Ud +Whd7Ky6poyMKAtMUYh9sfkFqExDCBEvTW5dCq1Q/8+P7N/JyMyb7EAKDr3UdraBd4r3xHji/xZDH +yt2bbP+g6fl6r6zbu8I0c29+DrobwGa5n+ZOXs3fOH92qjPb2RuXNaTp5jrsJBBPTSbtLDeDx5V2 +a6lDqdBaykaFrzcJS7PJrxuVxBiB8U5obHwB737OmB811PSTcpBHOhyH42uprOaehU7Rjj6Xalaj +CdL6Aj9FX5h3yxpvBK6BaKvFVHjIRVo7XifG3vaqkRfxXHKOW2LdGoKzr1wYZq7MiHE0qk6tS336 +z8hZbGXxRrwSPeJ6+DXLbXU3Qs5u2KK4+DEXDqI9Z64BJG3bHgX5zR7yKN7eYPYf+XWR5A6jjlyy +rWwsb4QQt5GWUgGy4GIxMxBpdlQ94RWBTjlOvs+fZhuvhy3MAJ99y2jn2gdE/fNg6GN61Dee/mdd +DU3TewnmHqQHncVKDsGuBSch+feALx31HJKSbpKfMnfjzbNYweWsfySkn4R6Z4/kyjfUNKun1TRk +Y1Kv0CLt8wCUfu9vK8ZjpbabRI5KlKGlD16FXb6fDH0ZCZarkbBgkFAwcm2ypWpw3nKEqC+4FXhZ +8ct+0cQNIOPGczHcUgVdE9tnRm6uEG6qVou6Lm78L9GcjUhY/sOyX2ufAdiojb8ttnPgyq0zCbNq +fV0gmM7C3lWy1LffhLg0nHnfIZeP5rVf5m9AgWFamze6wLgYP1DxwdRoYQlRnsKatfS938vGa29T +SOvLIJu7rB8QrEkXjmJVyqC6wvOitKQt948hpy2apgnmetImM6SvRIFaMNCziBEY4nqFeqG1rI3a +3bBdJ2dCLVwbAd/X32p1J3Zi6tBUp5NVbSElpIzzHM40GyX6N5MsR7OB54fosjvzUPn3q70e40Zz +gNiwleGIBRS0aDgmEsc7is/qRDkKE9o0G6xFRiRsxL+OKoKadzZOZuoQhLkK0it6RnR6UD6XMmdQ +61gxDGv9YlJThJWYWADj4Oj594eY7fDUTVPtQqYV88YiND6w58y5+FNa4HzRjKwrRu18BILqK7Fd ++jpDlgqomFeMiEFPCVIcm3A70LSOunvR7x0KdZ2Tv7G0jOJC4gW4J57iAQuR7/L+Vb88WGAwsrUX +n+4QHqvk8tbJGKsKDpW+4eAamYfSO1cD3VFRAmGsjOMdK1tdS2Lbwn8OBsXg5+iTtq6C+2D+xpJA +USmLZ01BPjauiSf0lNYQ4cD9FzDR0s/vE462J+fI4qcaK4ZBDPqh3DlLbZSoqxwXsPEW5QPgbkFy +Iu2/iIYeir6vQOlvqjBY5Nvputcu+0Fw8ssm/u5bqzhpzRXAxnJMpco/hKuEIEbmKkO2eB44MhH/ +PYt9UWQGxhl5rZr5eB0en0kSQOLdXzL8fzUoF3V31erOI3zlyYFjFtY8HT/7fqBNFsRPsmuwmJeG +ZJhG6YeGvhFo+s2SVnNXsXjFhjHOAlthXClhzve567cx7CxDSrwgBCg0KdjRgdtIBytCL/IpiO+u +pRkg4JbJlPV2DhHpDt9VjJW0eCH8rF0goXR2foEHzPxp5bc4nsSNXWKFSolhDvEbemC4iga63zSp +09H3g7Xt41YnFa1P6i398Uy8WdVERFt74sPHiuFO8iD4JSYuNhpB7ZdwluSvmUkmIOgMbhIpx+b8 +9KgXor6I1X/Jq7vUp1XjxgSHfij7xHoyQMsyNNl/J3JEetlZixVi0Jp/wqtl86MEcVLyKl3T6Fh5 +4oWjA46r4Gaq2OavbsBsc0bwbGJx1LZgVsgenQR8ip/h9xshOePAOhBOqLRs0FFmcAhx1TtrCWw9 +evMPsiknROt7jkMUXIurOh8bWEpwBsldlbf6thEdSA0q7hOXxDwo7/KXbY4pZzgJdN/OvxNZFJpP +ny/yblNJvhHQw5Wc38SAf3h2+MJB9MQgPDoebui5dm+taH3roq3r3mB48mOn7DvfCYrFIXcYZVNH +l4cUrt8QaNvTsj10LcBFhj2RwFpaRohZ3uPGgTdYYAm2KrPSA0LcsLjCRoOAh9QYsdQ6wNMF18CW +uK5It1KMIKsxBDluwp7KH9Ip2DDRdfLN1vYn/LLAjs7yUGjoKpbGogbebmuiCDlFtrybQceMaAdU +BP5mXa9/0pqwXfnxbiyw1zHDDLCi2Ih3PCmilzYN7/rGe1suzjju/1N6rpQbsu2Ndb6Zi0KZ4yiD +SWxtThFOAKD6mEaKBpcs4IHCoeo/2aRDiW97Sc2aRErNUy2pJNtIkvZwK71gHdMhfu5Ji5MfZW3k +SxRFBzYRm8Kbh8+nk/oN9IkF+A2eW2H9uuwILh1enE7vqgFgZ3XaSpgMW0PyheZds9xsTIu3Ppi9 +dwVpM0r4fv1vxUpHcT612ixfMEQaXEVunRFbOfD+vFWgl34o/cB2m0RMP2Zlz0k/ZV7TnelPvt6h +07UFr4qQcdeWUgbBids4xyqxBjTES3T+OEIQDSSANpjw+2nupZAXVzAB8QbYC3xsQDNCbKMvWmeq +MYEgk/bChMtzIz7ej187E2newlv/CUNv5vg5fo+ckZlbyULnxSsKer/4rF49eHDb7JtWMZ/Gmo99 +EQLSF4uA3jzqWCg/VpNTMDvxkFiwe7SOX581kwS8YHNCp2A7h2eNIJ6v18vuoG6knVMgIJJq5TXu +TCZ3VQnki+zXM09L1R6B1pSHJ29lQHv9RCYhgrYwa6f2JH7tgXwLTRP7yJV9qounICsX3lyzYn82 +W+/RFTXaAVyPrMf4/hdeH2Dhki+nTa3RyD5ILInvtt96ERpF0TR9ijS5xlGwLUTChxX5HFKi2Mf4 +od/7k4dM1mxmXtzV3SXdomxphwokPSsaAElmuqNW8W2iKhoZeRBl8Wu+5JqoLFV0XncL0hpjWvmT +05InjsNwDjP+bufqm2OtlLALMBbMheCUKqy0ti6RmwgwkQoz/1etz4HB2rnym5bXdepiqQxRrBo+ +M15eHiVMVretMTIzlbflEpR+cSABtON2MPHLhfVQFlK4XyDJyDovpu8rPF06zEkiwqHt/TOAj4uL +t+jpH6Starp0m2g4QrlQ8Boqeu0mZbbIDJn0XWB211z3FAAzh1ygq/0MaBJl7yizUG7nkOq5ruQT +NTodWazTL9leDxp/86ZseVbaKhToZ3EKgGvQiaCsnkrtpUkaHoJh+thduPuDHeECiRB4q7QuSylb +Um1iJCJQ3yEJWiBovyrwOL+PsHnpuFjOfM/9Zj3LAb0Ru3aePVanytQLDsttH4wjp+i5JQg9c75x +8J9KXu4+xZfkYTrb/90PzDfxUEXcymue2Xyh2dZhpk8D7j0lIJvAFdWZx+uVcbFhJsz7KaHqpHio +asyXAVoTk3cFsb8FRvx5VrAVnM0Jnu8rH+EG2qHrcBUKhPzg8qA1XFqswz+gBK3dPfw/83mgD0eq ++eHhknzLQUPJ/f51ak4M64OmbgG/vhqfVrMWTocZdD7J0bNECnj2JyZrB5qVJxbM8rc5OavYLtVF +xaKHh6RBWEN15AEO0xLaQPabrjApZhjzBzNOOSaUEAVgjwXw9ziV/a3Mjo7s1cStrIlu0HrkIJJ0 +dTveQK6EMhTxH4p0184jhqY1rldabzW6xQquMhwKggnX1OugoUCzTV61/RZWrbzlBpGS7WBX7qio +LbkhR0qTkPwzBZKiBazFDN0P5lwpJRL+MsWQdfwfdoZcXPvER2shYPktPxq0WCrRorqEXh8TF2B5 ++pcWsK2oHcQn8wtcyK8+vZV8dm3t0a5XAsC8fQp/UonsUww5dwNA8ik1iehvDH4YIbwbYNRDDgkk +PBacgX/W0LRTdkMWHYXo5TqDf9rXli1CoiWT5XTuxBKG2738CfpsR0c5MrOEGBhitneUWiWPqudN +c8ln48UIF3CgoGRRisvKD/r/u/qMRKaU26lwRnn0MOMvDcGlCLLEo9z8+xC5eB0ZOQcAqngW+sfV +339Izq4XGVbcM/jyi0RI3W7gXuOLr+HLEhn0iTNPO65Y1D21Z43Ts3+9UjVjcOO6gSeUZzZ3XsTZ +Kx/udD5qkQirGacu86sf+nF3akL1Y2eYBTaWbmvaihZmF5ixwJm7398KwrHbpvJL0z+bZqZzY/Hq +H5hat1T1/oEzbJub8xuSoW1g0DI3UXZq5OgX6qCf6ZBl43eZqgkS70E3Bg9YY0ZbLjaFX5GIzG4r +kBus07bvuKuGczCEeIlq620bK0FZpJz8HEK+3V4iJSaoli0cpSKjwt9Nkv553oQcgNM/2Ou1EcUN +G9/mk0xDBy0DlxpCJ85RJzhLOxBNiL0n4QUKIZ+UOoWtZ9sjhz5W5xdTK5Me8RHPDFkyVqNQQBc2 +B1/baHU+NJcab9Xzd2iBJ2rVWEtzVUXl3RDRRbFRjVmzglsI/LuZhz+vP59QZ0/l6DqT5GUDTNq0 +uTjrGsLtsmlb1j1gkej6dhc56RR9r0lK4zGbHqBI92sbxmYS96MEbRmG9I2pYgDb6aFnMrsPJV1F +CheBxOLY3rc8vFcWMlKHCFFmOFCOSb/p9knXb+65ViyRIkqhgv1q4hhUIzgRAnw01LY4g8B9nivJ +wpiCqXOM7wTi/gk2siHjEs+k6StKAC/qt/kRCDguylsJQHMUu5QkcY5gWHtWjKBIgZZri8V2f8Qj +PEmaK5ETPN8GmJJLRWlcek7bgHOrUbS1fwJVvSS6VXAQI+YlGXbvr+OvUvp8KSoYyksm8+jUSes7 +H6enqbHIZ/kUzjGHoeEVWjj76Kb5vPTJau945dPeEsRgzWciSEU9Mz/367JBHKPDtYe0OTm1Bzwn +6PXSrbBO2l6e8jaoG3o/bu4ITcibWxfFFr3xjLqPtsKM7JvOAREqxba9FMYzQguxFkaH4rutUPfh +16LI/ksmnxMxu6nNQjJmBil5YePo/EuwxwXf2PI0ohB1xXw8c9Mvs1CPiIZFEV9sjywMDG0NXP73 +L3x1rdhpWPUK7FhaYoCTQQj5hmFcBEsyHwiAe/AtG5M8qz+ZMJfO7cr/pv2SbaPBT7NxpsTdPkyj +IJLp1J5RttS0XWdY2gnS3OsrZufRJFNEgXmkOdbUX/yz+hMe+00iQu0XdXL2o/DnSExd2W5Hvzzj +govHp5oN0PiRbx6dGc5WZfKSiwRJEppVd5VDF3MV97+jSEwWea8ClJ8jLFqj7WeOR4ptImanT8Zz +Wvm+1WRCWW1odQrvninElHMxJACro2oIaW8xp1jSLUGxCQdsNBDKHiFuSXRCHoLQKJXps+z4VM0l +N+lCQjgCjvfKAatpeuV8Vio9v4RuA3m7adomGHV1NdlL3NdCobNJSlVvUm2it5UWNw6miW6Pq6Iw +fEaGZx1j3T+awybraLYMzeLM9C3U1IxoPA7Jl6//Bxy5nbZsQWnA3k1w0tlWuuDMKVQUrtNvisrf +xW49AXozpz7dN1L+m07WGqWzj3tYbNrl9FWTBkOwUAPNgRbwBz0YVIqXS23p5+E0hnFmC9s65KMB +Jlx0kKiF+gmAoxmdWmAOxdXMKpvSSSFEdXIHHiyuJ2TswMYq57huAiT8hUKwxExcQ8+c0tBvVmDj +QvE2SFuev4S9L3EMnoueSLX81Jlt91K0Ag9XCMmIeNkkZshclL0T6VK1UDuwSqmdAL1oG95PwNOq +f/J4V6bOelL2elO27AvXYNfV/YSzjLBpyp3rLV276uWscKhNOEHmFG7jQaVgAXWBxQLILd0oiPEg +7fWyPTTGCmmlAgRDFr9HjeoF41u5SZW1BgtkLmo0Rs/r12VDRu1Kr4Gd2Mj6N71M1914NeCbOHY0 +3bLOnRNMHHSsO4O1XzNMPlEqh91Baqd+MD5o7y2MceKdDuC+4DdeGnYdZhmIRbgrdlb578mRPSiv +Z15XJWYllaSPhK7QuHgX/fEwO9EdmZPs9zsoU0fmoVCXTN1NtNuIojlEyDh83RNfEEidsJwEKPvE +pUGHx1+xZPYH6V3eOIVGfdkgqxVLp23LzD5729OHnmyVVanGJfXyFc8hiSg+yHURk0g2C5exS59Q +tqv2/ukdLqLttsLaY5QnOMsSVQuEv4gjA0z7zk+fyj00OsGMUjrMJ0M7WmVnq2NzckaPBL9xoMRp +qQoKG153z3e/iMdWFsA7YC2FVQHY+2QZWpIr9ht4ZmqU/EFcV32YbkNH2rOnEzvOcydbY7V9MNTy +jglEGbW/rYI8r26yhL0ZHfWhI6hAxEttDUJWVsKF8BKgRnwQWgPpavSGwALpcgkOSisKYRNupuCq +uROZ+1HS+VFsswjxfKODVDugtH3OMCOcvG7MKH16lqz97j93o8b/YsoLGxnsNnZgcR1uPXn46APH +K0BaL6FiilW6vE82Yd+Tm7+t20h58Zgivi2PJWKNSSvDFY6vOyYpplQiZOF+uJ8hqyECufTwvh1d +AgRsweMmlT45mvAmduiXda6HpO9L5PQLjQXjVpKZ13Hn6HJNQcCAoq+Sstg4ogC6ikvXxKCOyx2R +nnoJIbQrucQhL9tl2bTZByfZn6LgJqd8N0R7haV1Cjq6FHrMcsRqBcjFqDZscTSfJf9Kqb8fKZCp +AWk/d3RZrRu4XTm6rJTL7EBecY1Jpjbz2JK84yIX59polXTFdOSDgoTex6tAVyE7dQLyCU71qwCs +dgc/Z+yQZQBIpWjCZ1f7og7mUQR7gVi6J9Qbny8svDVj/dhXNhg+efTut6Ck2MQf4/x4RIb7yKoS +Wba/RwgeQd+F2wdU9ccaE+SSU4ayXfdCuudGDhFjYeLw2803l6J9ATxdE4XVVaIyyAo7WLN8kbw1 +UlYjCVg6qIxDuYMfsFmHjUQ0p8XrT9L2/BCrazCqrMdfPkQ+cnite+nruf/xLOnYmuiHJNTOAx9V +a7LvxmKSqZgPkJvkJiBA86/3oEPPKOArqS6RF2hdPrUYW4vSkyLhXaAEZd30f/EjVJKiEpd1Gz9z +TiKoABw/hrXy/6S1JWi7SGvmX3XObYR1WbPHHWUZdpzLy4M2NMWqmFWExPVOKf8Ig28iZ83N5cOp +QGKBE8odNCSxEKA291ldy9JyONhe9DX3DPqIA6G3chmdK4OD1tQubqiAMc91Rn2rTsmE1s47LlVP +DI78goS143X+6WaP7Mk2wtSAQrSjAjzEAzw7yd4IrXqnC1TLSdOvUcvAZqpS3kH+4+rVWer1H2Zp +mvvp+hqJvxn8TF98SHN8KIaYOzs7Z/hQ1JVBjETH2sQa6Ti8675Rrxk7Dn0YGlu8ms5aqVLVxhuK +kaU2bR9/hLru2nV6qtMAoL4KOGuohRRAczKBbvJ3vWnA2OY+n9ZF0C0szd1wBNpM5ODQMB/ZyosY +mORyeZPpu0AZKuUYYSxvecN4DHC8EL0qCoozI/W9r5eCF8UDDBB/DXHH3enJMtEuRiU3lcavDtmu +ZulfVrTtdc89yzEZrIUUiuoqE0Vh6tQoTt0gmha4DqqtQ79Jp5VZhMJnlnhybKIief4b3fZSMX/Z +Hp/dK/nQfIVDb1yIpQWN+b+G5GNDuvnjmCJ2lHb2AEM4qq3Js7cktwJlGLG0C+iuR+ILUpcGA/92 +2PZ/p+RmGsY1j4rs1rVjbV7HsIvlZ1aGOQuhylpbauSanOFf3lVqpK15drJdPsRpGDgZFWPq/HVd +ZL5R+teofir4Co6vnP+jwEVu8DeDgTrT0JlByjWVxcQ4VQ1ay88dnJqfOpJyGFXYs5kv5xszNlVp +UpnNOA33aoWV28p1K7uss+lXX6GDbreDB6ADeX4rQL1snlG270WoeFGSMUBnz9BhBEyvIY5ZSwer +rVimiXnA0YrqOq5znzsx7aiu8H6DxhC9XaRjYfspyPzaUD72ASC0RXo7Gl8wB70P4su/IX8CdUoY +hNcM6ipzXqvMqX8z6NrIWlLZHWReux1TvOu8lv6rECayeyf0FWWDBBJzJYXHe4eVM9IX6V1hd4k0 +qVR3Q85Xk6lvF0NWyNXholrFVo1hq72fQsB7VipD6b0wWI/+CNH3AQNItfBN7Yu0QAQCFnbI9O2S +0uhZllXogegGrdjHRmGWCDAzSfzMfHauBc/kMdZPBgo0R/LpfU5grjCiKuFQeqm60GKE8KkJUQwq +0tPklwmFCmsLfpnN42MPXOw2b5sk4ekvvy9ZIZRTp0WKxOfujEIIJO9nOD6arZ+Jq7w++z+w7B+m +Uc+sOoArNJiWc4Gjs0i/kU5Z9ymv/11sdW9ctUtyWkSxLwtkkCW9FivZPCbL6kdZuYS4nUVnVBgx +jgR8riU1SaSTeFf/zSDOei5gSGJxtdPaRnxbCabYfSrt0hglv2vqIb5xbrn7pqTOoGYQNpRyqs6g +TSqapHYcrQXOF7ihcxojTWWLsbW+44LcaBbo13WG81er0Alo17S1+meaxjaH15Xtxp6RjCA+ki4P +anW8QsYyCMFPS6wxzeG7bzVDo1qb095BdF/fffZPbKaY+QvOORcwtBO+sk+3TN7WgaQKeVgIGwUC +dg3yftE0zyHguzL0oK17lxFjOeOhJEEJ802ctkGM5O3M+uS9hMqNZkrXo4e5awCdSdHGH6io73+h +2XopAr/FjNeMnane75dK4YI1WnQ/qmXcN5rvq6WUJnVvcVLCgfcPjcJ7ZoVyxg9zxere7/0+RMK3 +nLWwoCwSsGmZ1duJI9JCDIYpl3rKCHBJWQcXEXz865//pY555zt2zoG+JpH4ZO0b0ZHh+JwqkeIP ++33bvUu22T15bAJgjTbe2D12GGhfH7eXDUvDnKRfGbnLrt+XUrHDXlCzmjasKAwE/g0UKkmDmvyS +bJXWIvs3c+xpK3vwDv3d6jQUt2qfWE4TSbC6TSXD4Gq9QZhttQPCIweMehiBkygxV5Ey5FA7NegZ +C3S9++4Uc2H7KGsxCcq1VvutdACya/2lAWrbGD+aCRXLfCQyRdi1jGk3Uh2/8oljoMd2I0YPxEIq +jK7ZTaqVVIVzQInf8P+WDiLSh2lmgyV1oX/JO5MspcKJn+ax1wgh7kq/U5z8OznavixF40zUxZGI +GbF9aY25xdZFm0NX6dsgu28dUfW0GTmCPSx88JmBCReVqmeyHsFaqPs0jk7gJzBNn7xGKTQBnUmh +9EhPrPFKuq2ICgNjHox7ic/365GYgVV2mmthcRkyPJsC1g3KOPwKhmoDqvIk5Rk1l3VZMEDqPmiy +eiM/MFjEZrg/tmTAFmK2ESMdcgZT/4ZJMMnMDW8PndTa59iv8mtLzDQpwwCnHfkGak4pIjLn/AHv +cxRrIYRgbdgjCWqVmWTc2uXIL7rPkbrvEnYH6kFy8jaS3ddTTRUQihrHm7e9NYfpZmcAk+nkR6ck +7qOi4n7wVw0gQZ8/k5pIwDnO4HmgYygLgYlvbzS2tGcrOpD+RUYafcfDrvf2w1+3YMGxaAlqA2Vo +bk538rejLdq0AsuHNWBbw7nkjwcS1Ajn7UOMlt9CwF/UMkL5ebM6yRElQvlz21OfMbUHarB/HKSW +ov2HvFOLUlVuchoif7dsY6Eps4ixmR2le/dSnbC7tdnaVMfysSWxt+PAmTz07mkjJnjiqX/4t4Ux +Jxa0gaa/KcersD0SpjK2FKbgr282rrNKqOXbWG2LwyqNdsgI78i6R8OZDZp9eEofiOTMd5N5c5lD +OzR8z8JngAVxpQ7oei1HpdNeCuhkgSMYzuzvOApJz8jb0TnF9DgLxfrtVy2HG9Fkf5OVovFc5wXL +Cp23eIFLJUCFraYRAwJ2BX5xcHqp3MlKFccOSXRWk4fT48uMUW8yZmVFEmq484ry8o+LmHMCdHgo +N/MGd5qiKDidBs5txcEgG+keigM22YuqL4dc6UqzvqEjKEoibwDmu/51F7OYtPQChVeNiZ/KdpsB +CjpMwqYPVMOaDj7pNDLrbJrbQuA0r5kqR8EdyVNS+jWAmfpmtPhyYuXCW3nQGA+XCu11cHtknGqJ +Hu2WCrJPujuqJJE6J0jc0r80TikCVuImw0UtxeND7KNuuVLw8xGi6uh2t8j/CA/CWbu0HPzYaA2S +YENIdMZSpJffqzAYtwXKTLrZfKOj6HbiTlFLZem434PU18yhI2ptBXiQGI2Qf4hhlj3Mwg/jusAR +PKYcgtqfLWrOkvu1VlXFLg6fcJRo6oS58+XMJADU+BJAPHoajo782KYJhJ3AOG6cW+sLmdHswy+y +bnDJHXsIMnh97xXk/k0JplbBqC6nDKsJ+Tk2cM9MyF7rpPrJwfR0CR7dSUSWBYNas44djG3SvA5l +MobvJJmnYST3o/ca4yVgZvwr+dGJ7X1RRefHEc+TrGZo8fqzgwk/mfqkObFPvyAWjF0AQkjgXrEL +eURbaqSTp3fXHf/3cc9Li0hUjNxNsFXdUr/42ht/uddNEp4Qfi3x0yzv5FNwXspe2ZHywcltI3N4 +swUzMib4oGJZd6o6e8LtfVXdJNW4b8iXjViNHh650DdPKpXoSLv+6RNZPuTas3EWMY1Vjc6Zd9D/ +GU2SpjEgXQB1r4dFcdxvJPWqAj3hyCnxMxfrdS90O8zQX01t8nCcCjLInCUHI9EnFDchL7MtLRVL +sS+E1fedT/s1xbcuWfYUt1W1EFywzqGOtRgh/AGhnrk58ow1HDU+WDDztZl5RHZ2rDjoP8IYSd5k +QqUJYmKr2HPsSZunfrk8P6jCLRVrxkp/l1uweZd/J/qlct9cPX1F2PnWKCO/PwVuBwbH2eXjxAMh +mK3Vsnbo0PLOHbXVW60xOYlNiRpQB4ond8tweUUrXBZlBYsolX6xDsQhryimE9QXN3C5nEDJNjPw +IIB6fQrweX4+w+PnhzUp1cPTJ+Gp3WUieeRz0JuM+PnpzSQuyRkYo8lWuKqPRJGrae/OIc/Cks8l +7Si4dezYavsP6EnkNj40S6QuWInF/6WUTlvxxjXkzhpXfhyLHqKj0UKecT7pxH4Y9AH70L0JaekB +nMBePaZiUOIgUl+af9QgKgsAm6wtlMG82zKKhuLSPTrAL2hu50/kRqNoWGZJhePx+CJKPG+Agp+y +UiXJPa+/DyNNXH+xR96F/unKoPp6jIagjtPe/0QsDBO5344EaKog3qVofddW0CKOViBPsE5P2CBI +J3clu7CspatbK6fIlO7e0+EtGy8mUVBtVfzGga9yYNr5HaBc88Lo5/M0EMx5sBl/KrZcA/+Z1MUX +tykoprNR/e7Kt9ZSo0gKtaM1SHlmRe4QOKDrIUuNzsrR//FOxdNnE+VKVz1n76SYzfHFlaMe3H+E +aegYru8kNOMJbkxFvbFrRocq8MxEdbpWQo8jKAY9XwyKSsyAz0/QkTIRMyoGZQuvLzIn/MnIzAZG +APEyJZpHTNvjy5i1kQVr+rqr95i6BWnoPmK++HTXRH3yP6TAzfvEtj4j1j6o21OqrGisVJuNWccX +//hHGldyG3FwhzVkFo2Y59vSELnWykbNs1OSB0lL+jsUi5ggXAdpoXwFKFnb2GzTyZabrzwuwnHf +Z5niAFovcA/ohyJsg7pn7yQ2z1SFNInkAEOtqc/9FYUsEuJrGaiCHja4orKnGUl4Bu1sfjEHE5UI +JXMP2GoK1IHctFH9KHaZwWMSFKk/nruzyXCcHwEYO737Bx+SgzEzCRjbeuGooL39IQHVQals7kaW +EK02jOXtKgohfQ6htVkMt4ZNkUymmQJqun7woQDaKjfZOcZm19X3lGpGpGS0CuQB6ZqOb3ImZBhR +r1KMkGjbzddYZ7kcAfCWEiaVkIxqreOGZPm3nF7TufBecigB69CIDfb4c3u8KB5XPJ8JMHXDFOdE +UbPFD8xCIDJpAZIUdw8JWnZZNSfyjnCHk1wr6IVvtFPEbmRn+CeW2A+0DR8oALIrmP1sIst3gOy7 +7MqGUTDRr6LbVqzetiX/QIydUDNFVBpMRNPnNf7hRV+WPJzMIwkhujqhHsfXMrBWl+OAddq0PQ9d ++au/M7z9VMLcnj3Zzqey1JhMz2BFKcaL8zeCCL4BP8vEUYK0K7FsdAh38w0a9slCf2dNS7T1klqc +JHbrJCQc0syZyRPWWMRwmumxpWjJDj5t59UFFqgvviIKYpM8C2JkKqugg8JNkRDkd+IXUGcen0sA +GrPgeaoAjFqnqQ4OFkFo1PeWiEOeejwd7lwgWxGyfd/OJrgS35dH8yW9WCo//eqZSPqNgQ1pyg22 +7Dhz+zXilwep4SdF5Z4ar0ghhMX8fgyf24jf8hK/xerSNLscMUGLx/Obh6f/fjPOF6Dtw1I/TpTx +eV+Lmd00y02yQkmIP44TEjeQkl11l0BNjVNvSjBioPNxbjMkeDEWLfwMoQJjz2cEFhfcUqLW7v4J +CPFcUBP3gvpIMRnuFqpeAjR+k0/aOpq4hLqkXhc5EWeriiBJvx5GDKFq3pMp5hDhXP+I7h/0RDx1 +JS9z+MuRuuzKOby0hf27vF42qY2l+L6XWkz0lpl+isE1BQoCNg+qNrEzIPqUEM1HhgR03hgmRceq +WZRh7atWNbR+YCOx9+A/LSStdCN/lyzEG8VF/pzlnQbM6QEPZt+F+8xzWoZ3kX+GD6Vmby8LyN4J +1gE7qpgL6JWjKM7+5Grg03cofEC0tBRgtH6uLZtjxlFdIwcsIyEoY4OAFowKDopASfiJ38rCggLy +R9cxR/Xnfs93/eIMOzblOt3XWdXX3Gm299c3WH7t8XEzmTkEKY1VZe7e1yOT1o2uD2z0bTXw2T01 +cUFq0N8HsaCrVbMc+xRc+rVtLw/CjBEgd0PLKceRiswXokDYjlDyQsW11p0FvTpLCyLIe6jRZATt +9WfhqvxQfHErPd3Cc9trLDhIAyJw8GvhChWCfV4eDUk4Tuw3PgveZjnysM+5wrcNfjixApziyabw +rMfo/63t9Q3hanUzBmGlNdgwWt8sG3X9rx0wy1Upou15420b9RB7i/D7i+P8534QFpJxd2Cyuf80 +4ETwNkjQpOQsKyHWtZnMXaJHBTF1ZXJgUImpp0YBLLUzqtOMfWEWDqdG95fiRfu35JA4MpXEjFhZ +8Rz6x5W2K6+K8c7he4HxLFyfSj/eqPpR+WeSc+3Kw3W1EYd7uV3UkNcBMXsmo6Ne7ppy2/ePnMFk +WJPN7sSPuPtr7NLx92s0ss9Dv2WE8MU42S9jHzRl5JBYWwJkx6RMzYRfd5i5CDB2pwiSHLTkt3kh +em9BMqAkGFpqzcdyFOpqyBqloKY3bCAsZTo65WmmiajAK+spliZ3+EnEI+OHmpjPFYE6pSbvR9L5 +31jQ2XtTNAgbzGEXqhhdVT3Jfbuf2i5ARwITMJo4AGf3SRWJFChPXRDtYgiEC8sexeVPS6qcYmNU +LPlEyda+g3I+h1fG5VQKYX53s8d3R5v368+Y0k2kqBCvK6aov3d39HIt0xKNmdfF+Tb1PmJjvbGE +LjexY/vgivMSo3S6+QL/9cj3JqVrhnO4ZYWnzsRUk8t5OdQpaE5Yo03mZ8AkQ43rQL6/5u65zL4P +dbfAi/ciJImT3PGBjPt8Ar/FmVb/ISFZ/detaTiQuNizBPxu/mNzbaPUflgFgs9HeUb5xIYSyMbH +F4mC1ywiMHdaxn0kFu7FPFU1yzPcs8jdh9t4M8hMu487X2O8NCiuFRVQfDxSVqw0mr3XBvqHOk1O +TrCaoYKG5DBsJh+7ltRShrwRFd7ewcFCLs0HAIyTe7fhReKeimqg++E1wj7AkHE9k43HgjRtrPnM +4HnqWQmUwDd3TBIgTZv5m3XXgsDBwSmLIIGx7FzBUxdKV18i1PT9D7Ae7reyncKPqeBlWEOrTRy2 +vnbGxCGA14k9u87wcq+syMGyIwFv6VKZQsu4mayd2Rmd8OJPt8DBuJecrjL04Z+BwhfJs6as+HfB +Zt1LQKV6SUUo7jgFim21ZIrzOQf42bhkokihrxeDK3OeTTI64uf6HgMr2AcIRQWkZC5P/V/q9+KV +X44YRj7VzeIruAkVHpvYDL3oNp4paqb7wtwYVgk/EjvIQrYDgIScIMmSOmBC4P29x+qMn/ajf9aK +XVTzKEmrFXVSQN7Cqs1+Bz03Xh1zkSf1rlzzDYUSMYvviws/trJvvGlMct35n+DGkc6fgrAC258/ +pfDjIshhKqBHVc5TrPUirbImaTYi2WPpeZM47u0I7vfOS6NkGNcYszZW8u/zIx6/hilDt10eMjnt +Q85YihncQZVa5E45M5TEg/D2s6g4mHbgWA3SSv8A1CjeLejIGnHE8e67QQySgfv82u9dLWv0Foq8 +yrl9gwP/Eh8ZGqEaonmhPfZn4jmGyOysxGqJdWXCfKULPRF1ZlCL2I+l4f4rVR04suQgervsyRJw +jVg9q62Z7DvmvHzqPd12sU9vkFO85aCCBq6StcweqxeDM4CTJ5GMmD9HNG5Qr3GWRbLp2pcaRauO +njjkGtgqoOFLbH8DGicxikqJmqfU9Jz+O/haMu3xzE/tbBp8L6vV3NX5AQy/zJPY4gqomTUr6GX9 +YQFRLH3704b4eTjtba3ZazjUjMD9f8XwrA/okfI0ayblsnFZlBSHiJ86D341l9UrV4RGGwQRG+o8 +NwB8w8+Xyrw/hZHcxfEuUiWMkmx3hCfSr1Lp+W0OMPnbsHzCiu1igcN3nRg8dSYZFJSpwQYUeIZJ +cMFOQHq9R1RgCe/xrmSuDBqiwKln7LLbREBGv+W+JwAMLcfXIYaZWYnKT5Yv5kKjQjbUwBX2vxzU +LKCpGU4XhOr9YL20CSq7p8edCqMPtjPj8h0DG+1U9DZqHk0LR2MbvgD+VsZ8mynAqu5WV00pwm+/ +fTdbE41A4xY6U0Kn05dOcoFkq6IXR4ElvzVelbVmOSYrSvlOqAS6ad1mL96MSlRWUBVt7228xiJc +hjaFlhDbimyfMOX7puWDnaCNyI69F/tt8EFis4nFqPnBWJ9eLwWrswFbA9XPkEkq3p7Kc8rgJ4kR +KJ/0chLaKXvLby9gzHktSNnY626HJjsQvxSSklvhYOfTSpgW/JPA9Fn/R5AsrJ4ZfS9uZAtm6hQE +qFd69dMNNDxlSQsaqwdXiEoDDqx9dmKDerj6yBYtvCHeImJE9suEGu9F7FOWxzyb5/w/dqSGmFSL +BZCOSaX6lU/gUHJTVS1EurHZ8rN805+n9PfPtrCZZ5zKhvLzvaYp5m+IaGhx9i9OqW7pBDSq548p +1zbmqQYdi+UU/3sodR1hgq45em2l7ihT3AqutFwMN7S/C9zKkpKIqP3DiFIRjoDPB/LyXBpDawua +zt9m81KQxty1XKgOofoKTy0Ai2Ry/wEUUyckBKmgAloLwSW/doWEOyHs4L/muciSUsr+09ff0yPJ +Om5hRJGhI6EBD5UQ21MYlFP6LsZRv5O7UL+akYr/FicGWZ2bZHOdzFcj6uFooL8j3zxTtlsSomVP +yVoTV2J9nCrF9UEDAlWKjKmmKYoJ5uIozJynkvm2obhv3kDCzv7E2o9lBh+fZ2LtfwXU6io6F1Om +rfJJKHzuesp3S/kpysTruH67M4OZ/c+yO1c5C11ooo19u7o6C5QaLrNx5L5DQxU9ghw0I0bPkr3A +ziUZ4NwRihNH0pc6SAIYPdOfFBjRaHQB05P6bFcNwrj8QmJ+VakN+Yn+3K7hdMl2zQPVoIHGCAqO +3YfIfYYiYfBxSfaKaicp39aFW4V9VoaeLJImgJzhZda9br/oGQbA44iSC58Lro8LXHa56e8EJxDP +oLK/8+vwDKeRGIJpE0/kcxrutGmuZP4geY6r7O1pTARbDObo6xBlMsCGM8q6Ko54roAAiu+teTJm +zcWTlZMiD612FICbR7CvNKY6ssCsi6TRXe2ueGSSfzxvPWy6Tae/JbDDXNZWcxZF25IxN81inlDx +nFqfZdsS5TtWn/BMBikNdVbwYxBFGXCoBRQx57k7s6uWdFUx9MOE6ZcTCcLipe3qtBpDVCnk2MEa +QRMbQKV7PpucJX9x9NG2XW5PqoJO0uPgMdCDBwhyxHyDyygEWt+smW3zD4iFaxuJjfgofCRrOi+4 +Gh0QsHYcUOnw0STo7HGEtb6rzjxuZP6ALE24hGUOuxv0kiiyqdmdBDLggH9bE73bC4X9UGLxAAEL +/qhM459ImyL+VWJ2MluX8xIkQKoQjbEkbbWZN8/FCGd09Nu63K2I9uEwEMNddZ6G2d7QaRPhrVUZ ++pmmiOmixX/RJ5plpuwfpUxg6V9RbSQaBuErnZZyEp+far38wgdvg9nOqUc4+V36Yxz4hu9g6wi3 +Cg2eFQRwrb7EcdAwTjST9xTt63Esm9NMRmjkVIg1jtGBkda82L2y0P0r09DstazQxLq+tf+QHB0T +n5o/yj9hY8afFdaK6JkPNIIA+uuP4fWpSH1Q1HXA3qzVwp/Nx//gSXd5b1FmSHfDq9doVT3imQBB +249xb2HBtsuAKx8d/5lc5YExPkNHzAkv2Oi5ojnBUlVsAinJzT68K9KyiyR4HxgNEPOogtp6zkxf +r3wu5ApppQyNdzm5hsVLATnhukhB3UXbsEydFPlrNA6h+nTdT05FB0WdPVmyddO7+4pUhLtDgslA +vCIs0A4+no2W+PHmnb2whWr6YC0VMBjpwShTNhCHByu6xsH8RCNi47d5Zyt9/Q6x++3ZA9XumjqM +hc/E+D8h4xd8obFoI2OjRqF7rz0qmMAxGPJPSdhZxWXAmIXOLbOTssQQUvelYEXPRMFoWJ4BRSeP +Pp9J88BN7UlWEp/82duKpHR3qg6nvCkThBSFVGvE4JR1y8iUm/FejtOooQpldf2q8crc2ReczZ51 +8g1fw4YLDXyRK+To1HKRfDfpqBEn5GCuRRZPkdFwDSDwfKKxBmKySKdUOzU8ztoso9EoyxaG14bi +fjLti1uB6h3lkN4xKudxIaksaiFZ29aJDcgvZLIdLFhZUNRu9LnQ0aFfPj6+2UJe6U+AKX27hEb2 +hmWi/RrPmNFndx57X6ykx9HNrfClS8xuDdi/fy7BrTqaex2odTvQTpMAiJi6c0e/Htav999ZWqFk +zfUU7MOVg/rdgNjF13eSOj/sl1uyUm+U+NcjuFfNyjPWvqzLOS6hsEG2QRLyZcOfEZb3IRqROjGN +/xWQcDIIHgaTmEuCtk0FVJoq/xvMhxjMb04tQNnZYA9d1G7hh7MmfX0s2n5WqsTs1GBzyQB/GRcP +l8w31C1YEisvizyiVISYpnzZlm7lc7pmFdUHij5gs524POArbqxo+R0qpGp1figrpWfe4Y9UddQ8 +SkkEWsw+ikaPbOPs9GoAIObx53anJ30rgV+PfsrKOQJQDb3+XhbLky9FUPWU1+bDp0EIj16Evo+J +113I9znsUJhDZ9awXF3x14UZ9+J0r+TBLNoRhfaWImAPp9yXBH5ucNkkqhQtdbvW2sM3V7wJ8e7b +cCxJPg9bUFS2wx1b9Hiw9DSemxsyoRdDzNxVe6XopdKZ/8y1GZt3c3VgmvIhyCsdfdnj2h23bnpJ +kKsklA5S/chjvfny0kMVrMjTi1IScKmAz23YNF1Z+RHNk85811u9sy2PlBS+BKjib7q6RZSti4Vu +PubZHYpb2rx0xJhjVqyqaAdaXhwOtZNnkvq5Uax92LhsrbxdjVufdZmXO2koy/SFokKB0PtGxzSU +vCMfUJekUq4j/hPAvByUnBi+qDQVU/z6WQjctc6YZu8A0X7OHe4gyAMBOz9OAbF2+lGj3azHavsk +oOAbvo9BvZ/89v1M1nvo2Rc4spYz0t+eb6A2n+K1AZjieS3po1GLfFAS8zSKet+Mj6BHwkwFmugr +nLAaYtZnI5EjHCk437lkwiuAJRhUmTtbgHg/3Y59mn6BGpteBQIbI2zhQ33S8rQNt0ycpJ+I8/pY +6iRxGRZ94Td6uRIe1+6XLEse5Gc98SBRNH6bfrBFni6IJuA1+d62MDlPkJ6ZL90gmxpKQ4eioCFr +Zh5nxPKcG20zPrF2x+6xiMFwo12dkkyYhOdvZ9fWfNWFvNfQzyUXr3shuyxBb2Uxi02GO8VHYiEH +NbFfaobdx8sYJDR+DMEFLfSO2ysXESfZTncf2UcpJbBjbOuGcb4Sx8ElWYUA2HGJ6Dh0nG4IiIe9 +1pzziHJX4p7f5vbiKTrngRvgcb4/Lk7jmGMsI7+IIbQWVZNOqRhHYr3vY3reQVJ1fmUb9AclRkUZ +Swe4QwheoR8rA1F6ZzAP3ZSj+1K/xNyT/29R50oMZ3y+BWb+6RMXcva+lpPi88/g5IAPpCOCP8AN +SR4qYzxTuOtJbQtUvPQhXBNCq30B+8stQ642CbixF+GY9/2YLzdQH7+n1soRwhZ9qRRvy+51TTMG +g1fgull+NHGC99Ayjy37wIrgXlrWNGe2tFRRtQav8s9UgEws79YzAM7MTIsuqAY4+xJTnVo+eXH5 +2FL1laNuwlGdJoOH7CCzBDtI3nYNpqF3lD9wNTZrlvfTt2QXjhOrtGuAdDfHLsz+/Gz+bJ08KWCO +OFoART9ICQmfOtUIIyVRx+MLIHJDCdwiwOXsKgW38Yp4GrP5oEix1JhjVJsVlTbgg/hpRBibIfZP +lIbWUhMq5v4GA7YHKwvmPK0F/EICxmo4lfL57hbwig2EOtBXeuv1fVrSjClyXCOpDyt/yNZw/8lH +b05TGk/N1HrjiTOv0y64TPy7/kOXW2GCa4xSSZFeSh7lBsNgiPeTLGQzu5vJL3UOd/DdetxUfvhA +8sQFuB7VIg+j60k7Df9I1oYnqWVh8MZvPAB7suzqJriDjc3qa7JQCYk6vr2E0COm/WyTsuDbAViC +zgo56qJbFX4zGtCTJxMy5ue5oQAaQY7iICZsT4L0cnkO2WjrREUAYZSnNGYAE/q67IBRfyqfk0oN +fNgD2nRLgFYU4MhqHX6Xh2WJCjUoetegT7/tM8S9FvHfiavOhwxraT13p/EmkFCRD54g+6Hj/Vak +/YSoJlE9ZrAq1b8j5QF3YrE5DtNxUMeWPMML2bDoB+jmFMoxhUhTngHQcBsfll19uImxQsIV88eH +qMqXdxD/TQRqEzG+6qjj98cZYUKob6VJoNiPyRTPhvakUWKOlEUEGgtir8AxEG3yLUN3LwD0RDHj +e6nulQMKoDDWWgnhFEMqXkG2XmOFOw3eejy5sCdZvJH9yoFWozFh/xuBi/DzWgKGPzyhhgXII8Lx +lSJCeuk79Kx51Wak8vvABFj0OMRh6vatZrkdYA21i5xY6rNkQogIeFxhfyFNIimjCf6bbxxgu+nQ +/nLx9iUDS0B7g7iP8hXRHOcXwYo8adT1dgZK6rkQgpwTGyNRc7LI4OzjWTCJdH1BkkXQ4iVuAXte +EnSbNqrB5SMuebFUtFbuDyfkpLH6yX3y0VvKEf/NM/iUCUg9Mo/HpYFNz8Fwde0jb7kKB3s8QhlB +0baT8cmp8Oz+khUKHLW+6i4oi0xEwDMAqBgmrnyTq3/8xEXNKynLh/Hc0/9CgpQMpp2Tdxsl3A9/ +doQnrhwsBQIi4pxwxk08X+BBoP+N8NI7QVfq11/womtmdl/v5gCbQkmQtiiUbtMBxBI5flmOwKci +CUB1tSAXx/iNB62sCBdeYD0DbayDDQsV6ZyM4DQSsYL2twrr2fk4RZyMfH3RDdhrsar9JPp5c1bY +5sH2I/9bN499gRf8p+YXYiLu2VhgYwuifqWLph7RscQ59JHITquet5sIDg6BkP1O70PJc0jCyCNK +IKs18zw3/ODbeTzIrCp5SKZhlG8zMlvGTawdMsC3e4eu6Db80tV7gJ0pesMSBBiaL3/uQGXmYpv7 +sgMkX3Tf6dQzj+6fX5mYpI4L/eM/7dfazknZ9Vpch/o2R8/P96TlVrY61wuSReVi0Xm+hcjMLImo +LMdqE1y9mmu2rhJF546/ZQw7pvCz/on5Py8303CuzFps8BG5VEqRXHGNVWuf+QrSIORHp8c7EUHt +smMSMe9JS3DTLacQyanBmB/vldFPnnP8hz7ZF1MxQJiGsASYjY6rmSEJujgkQaFeRzihJ/5mgGxC +0XSh4cVlZ78PGtdGZRRL4S9BWw7wd4AzpnpiUXr79rncAD0EhelgJMFS95Kftic9IxfVrtqP638+ +9AkoXR7C5QAq6tMWfx2aSO7q9HuxzwkmmeLv2xbzZKSQNQ1DyMEi7vLI5gr8577B5Uyrn/m96GPh +Lz5pbJiKZYKSbm4OmgEBeF9UfoghpbGinfIElqViMNVDx8prMUoGImpqf02j9whlBiYGznf6ZM/A ++lCVZMggAzWGkQ9rsugF47Idz0Xt+D2ij74j8rZSfHHbQCMiuvSiiAPN/CefKHOg+Zuicy0FtoMa +6BU6KDerrGcAjkLuacltu4NBFs7V5YsIBeYTmx645K2uD1h21ufQRWEJZvjA9IFe5VqJHfrav2bq +CMbD7WIgIq3h3bzirWnFWfe4lZ55czD8FyIoosGbYUBRRHIs9/SuJKCDAcXKRmDPs63N3vH4yH8x +lxdTOhkkPRPUpP9gFgMhgYAEYvfVzk5JcFHTOW1fMVCYhTKR/hhFo5uOtcdTDHepNCybrhDBr3Wr +tKTzlDAN5BY9XL369Fb+AFZtQeW/p+27WyobGtnOdGZziLe1Pd7DYK/biqQUiDfT0hSYphkRd5qw +9L7o+n/SI3gzKN5/s84X+/I0vPO6abdq1/EWQ5gOLEAYLWlP7RPIn4mF9YY5QOaFFbMqJ7FQDUDf +24bYfKaExZCb03UF4itTcEmxMDDb/BOaNimjT42NNVmEJlmWQObzC3TLJUv4MI9FrDv+4wC6aduB +qDWN7xeJlvw+ChECxVpOKrY7MhZ7N2AqsJGhU1JTyKXuXDqd35BwTPiDK977UXuo885aJLFZ4xzE +D6lyLfqiYhTJRdNhTfmqeVUN/bG0vJYjMwKOeMvynEbJ7EdbLPbx3dsQqJy8HXaUWIA9d/aFlWvw +iEeaNMxvBYWSlTrrTmFnJ6YuFwNsPthZnD036OMDQ+/R55DlxAx18PSUxRQdWYM9Ot+zNW0hZIsP +6ql58Pf5LtMNCjPCVAG5doYKtnj0UYjgXHg0V2HFAhCjZly5oKHQ+09N0A/O57sAqo9fJdM6Ks4S +0tqLcsQfLx+obpLqvEIyRm9WoCeE+BSxmsAss+1P+TV2x7SRKVqrB36sIJoz/38kGFpvr/AA6O5c +RIUudiu3WfOtq9mY5jEvka1TZWK7b4B9RMW4EFY/Y8GN+Buv34gY+F4Mfz3izsL/HJMaB3nXO9TN +X6p9w7vlEPIww5ZZc9afv9TtRcPuc7Qv8G01TorrN660SWlPVSoWpJY7leNsv1hWZ1TEZvJ+Cl+Y +OTN0uxb0NdbUk99fQR1tjjP9oQ5xyzGMAKUgX6DpitgWUzGdU3b9hOQIJRC0+6zx/T+DDxr8BhDC +pMaYKUn3S9FfpomYhyqto0kBiULyIaumyoIESAooIlymLfpkahkrDjstCj9ZfmCgFF7p+yNqVaj2 +8ZbFloWHS/ORsHMbTzzgENmi4XUV9Yu4bS9e3bQ9Z7ukxJQyFH0dEutbGugoMBKkBDqD/imQZ38Y +6AftpDvCX3dldu8v4vjB5OPakAesEVzXkYZzVLyW/60hXt/HMm2dI96hW9MBs6l3BuKjN1zWmhOY +qZL4eIgFWowzHxlFxLtGhO3HZC6CQN90ZTp2j1VhQPB0H1qpVgzeVgpKTJ8NXTkS5IvyK5Dy9nFv +W7Bf1nDta3cKmYM/xKgohRf0N9hxmOMiTRyI2aeEX7zOjRBkuFrJU0CeZRNHx1Y+FHWZeMFsYObN +9iROx7bX/I7Hzu2t2KJR+bAwvqq3rvNnYlSfsZRe9oSKYF0MSHIdIcvupJP25hbmHL7KdZssloHf +btHKegDogX1bNtp/YiieRJsj09cqGRl536ZdJxBv6CQ3TcW9JOv14L1y1vXX0WtcZFryANIAhCUh +sY6VVBpFS6UsAR0ivfFUlA0qEzgRbkfnzl03slo/44+t7vjq6Jo0tkGr4fv1pH4XQ5lKMWdT6LdM +gkDN2lVHmrI5uT7kQ7ZaPrRoek16nkB7yuehXML6z8uKLA5kCBDxuBGAwH6lfVJJ9em07GHbF/2q +etVew9YVoYIYTR2N0A9KqcTG3XceaSvWXs31+5A7RWn0HMokB6sBkBP8o/x0XVhaQ+wOk0avieVM +YYr7Zlus1ybLPq3SB45zBgflMsQX4RivMtvECGG6tgGm+p0MUrEvtNGp63cWDKHU1u2bpksTdpCr +wNYuJaXAUuU0lVbdbU9bj5K4opjRxmz3ixVHvek+Qa+WAJXDjQzt037FEZql8TpRsJ3bxYhDP+a6 +ZW5n6xTTN8WaYf9y4ar/+44t6TfXVw3CS37PHJOHaKzqr9MkXzIXGntwVdzUpa8w/G4s1zypgu9o +lZeoCeoUt+ZuYhwxqERPzLWtDFHdevqXTHISfG5NXqBg2v3cFIGtG7ZQUd8WRluL4iO9AqD3NaRl +O0xVenMXALVkSAaR7XUqs7paR2a3AFMil5A5Z/DLK6DMxojP66uhFp6QnDTkSCla6o2xxPFtCDtH +WqLBHpfNofuIwvPMd6RVUhSEOfou72LoAEqOHALpFSEf4l0kP9mZhWGjBdhIolpgceTNXb7FAerF +n5ghgJWDJSlMavUTjzAoKVi/mABdg6mAxgcPPm3w3NRSBeWnGbv3V5otRdNVnplYpNhs1cQfNaK5 +MEuzDm4juc2vlGwo1fbLXPd6GC+9YiGB2aBLBCWVqNCOOCq7PFRESV+z1xkyHL7MHIrcHDUYYch9 +tBpsUGRExLg9LKYgwJyz/y5v2E6vJEFy/CAReUwgPfzfkBvmSi7L81kUdz9dZp9m1Vi8g2miuOcy +KYPdwBFpo/sYCrbg7/1qrWvCzy/JUjCG5SIBJZ3fzhLdSpEljpMltNOopXZKUp9JSN6BFUUbkwuX +cmjenUrjGXknE9Mpqg+PbjYP4axsss5hlgg3fJvz099Q7etSsNUoJ575KKcoKHGkEQ6jP6BdZlCX +7UlaIlQ4H2ues/5XVs7gmN+aPhgoygjekKHEQZ+O1uQAtGXnTxYj1ZFHN4uzQp6uRSfN6+01iQ+w +ytshrhppsC7fYMVoEImwmzuvMg7dpYZtcPjJbWiwjmrR+TfhMI2GuGSCW+YOxlNZ6B4b3D+Qz1sd +V8/ksIdsC1oU63k3R8faPc7UBhkUsoVCJnIhYsXqeMkoUdY0xTvcKBal6Rti0PTnGtfsPLSCL5a1 +0T1+hplF6cr8S63lfxt5Gbfa4tVwBOvcIPxw2lJH1PwrjbCFlhY4RgfRM7n2M2Wxj1HbDlTZDKd0 +KSxIt9P/C57vmOU4kzijzuMWlE796JbSVRYuzGQ2gOj2oq2tzJBHZ8oWsUPoJy7Oxwfa8vSFcP6u +fNiGIYraDolk9AQy3YaGrmhxl6yBRUNYW+oDyED140uLtmp+EXpDssFiWUZ5QwvunJ4FVrQHZ91i +2kBFBjSa2J8iVgZiEhOql1qZSwULKxxw7b/ddeWpvSdNZvX23aObV3rbRs3v4zKAZRNunURsEGjT +/MxL3JtRJGD6EHgAmtla4S9B2TyvhLfhRIpBf8pMGAbAix7WSFRnac2gPkQRfm5dyblxe67syyZ2 +JLu4eZeTa6lzdz0tP+5dupfLZgXjmxdRo37C9CojWoZn1dvlcPCJ73KUXYodNX9KWCGkhJndNRSq +XBooW6FyomwqHRJAnFokCQj7mN6favO3njtHbrrk6UkaubmWJcBt+gww71LcJRsxNLCltQGqAI9b +A8++N/FngecKTZScKwywZBoM9mBTncwxjiSujKJUf6HNr9PpQ+tHOtW/1AzzrWvDD7gV7G4NIlZH +O6J5WNHqdo+Llm77TZAHH9gypx+pMhsqRcBZxij3iC7M/8cvShN9NQzlGZh8AMKMRwA9ZwP9ARap +CK+X0VOH+t8xeUfXf55pUqzeRT14zpH9VX9lbLgWw3c9I1ifdOtzTpAbVQjlAUuKoTyu8Z9Vd0dd +RkHk5k/I4UBXoWKOkMSy4NK/U0TevrkGTez+gBup8DAbzHUuuHIThttiSD93IdrWop1mPmPWbg4m +gUYZ9KKyLoC8ODoG/9iifrGNyAEAF1hnZfxeA0XXQLy74K3+t78DYeF73O8V7yNLX+sygiJZhkGR +RLMTfy7Re0AzBki2BfgtKfHmcG9l9dIxSIt8Sf8NpNAhCjsdJE0wvrPjqFTrb2Cn76/PnAWQhHw1 +PCs6XtdcR6ERCX3/oprxnar8LP37Vr2L3lc1N2QvJOaKQmAY7yrHJQO/TGL0mpD7nZ+QUxP04yc4 +ix1LQzV98hm9WH8qtW7z/bncYV7kpC5qrgzSUM49xP8W1y0n6jrLqm6jiVVEV5lQvmX4nYGI/7So +j/q/PAJ+HkEpEEpPCvVgMU+Ay11EKvp68vb1FAyw3VyU4PtMl1gPfMexTt5hL7FiEQ0wCkJuH8Ux +gHAtSF8LBaa8pTkLixOa1YS9FDGQSTtB9g4Tm514YNNWEadWHIbAJ9S5t86BC5fr/romV/ANSETT +N9rpp5CDZ2/2jBUuaUybHfExriRhsqVTFK3xwQWbWHsqT3MU1Fc5rxUGixLfIeMUMbzIRFitzcYL +C1tydOFZvSV6AcP1NDKMj9jyvAQT/IAp5MGuJVumHGgk8MNfpeObu9sbvbZxtStV7+dGof1anrnV +IS7IXAN2ebFPSI5a64YWQcJgm8Zda+IvJFxKV4fDnSR256pjmZeUomApos5Pag2zLaJ/z7R6hh/X +UtmOrUEvijwIOB2kQgCFV/6AjpMPUuapgr8sEVvB6VbhZTnyMkQ+WbTBsRvTEZBLfykqBj3NofAh +fwzpigoQTrLxvYGhMKR/IonxAll2H11zQjuVgyZ2CRFyZwPRReSZgGJ2QPzI8WlKFFFpyW62S/sf +zOzG2v8uRnlhXowolzrxU4V88Z4IcL7GJvtGgfpfPnb+8ugUz1xCylR9wWqgi4MIDQ2jQRn0Z3Ro +tITrUCr7kQtF982q8uCdu92LjrLk1Sd9QEWw9w/itrFNI78BtXOCiJxdBYuPB/Hweyvapn5vo8hL +/XN7wZ6LjNhAV1P/wIeoFwUnhtjBxyzkDVPliDLwD/9/3J/+6hsPtVxbRaDBozCugulu234gpvoC +7RdwN0NtEunwfSyQqBOLv+zYjOUB0wO15WQT6/3e0Ck4bT8WFv2G2vOIkfVEDadg38KJ73mNa20d +N3t7AGhYUzAjJy8QSEtpVsse+VDYqKqevUz3EQUxZJ+BKy43c60FypJ/IKm2YEZB5j5LKznn8mlJ +dC7MBW8CC8vy1AZEhQfkwlb0Yvb1EeJ9MqDsnelxI9pp9G7qrhuUyrsYrAIh2V1MP7cOpbA9F7gJ +iGUZQ11vFCzaT2XVY969AvcAPQRr/nv4PlHweQRZ0n9tsQwVsjLKEK3+qpItcs+AOxaRWzOouTEf +QP/Vlm3pBwpTpKLm6ZwQQ7D8ND87FuMyJu81nsxtFl2FS6CT37mrBYsNMG54G5kSEvsqVSOh7L6o +0DA+IzpQEiaVSVhNOD2BKboPhFfOR1OxPnoEGvcynBoIY32VKesEtnD6ggmwd8iMdt1nafsvdDdj +M5It92CTgYC1WZZvaxRUvEvPlqPRi10awS9oxcu+vYbgFWq66trvKCv/HE76fYy0TkJteeM6tuI9 +BnrESxr3v9SIrPk/8/PucmD5qaF6jb4YaoG9J/dvv4x08EaLH/4wvxEIiX1VxCUasuM4KQGOXLR1 +v7XOrmue+YooWgrMHeFJWOjl9E7VnnuSkqvUsO5zumwDVFGh0TC3RQsNdBgyG+75D34c2KGTd0bb +iLBRYlBAMhbj+FR2HzTsrxwJ9sloTbYqWnNx0E6M21H2qmhtC4nJ5jane/RV8BO9LIqZu7S41pqb +u+56NWuUQKP4rJLvxR5ECKiZedYQRwUyRLnVD+5/IhhHeIALPhyTsbKgT1xDZdxVG2UobZh0Y3E7 +dJ/KbHTXdgmTMYDCkhYqXiOKlM2YvGna0UMAdnpL7LnGMwd4/TYo/E14BZPlaKrN1vqJHt+0TCSx +EntUor8A5Eds9WfvtezkqLAoePyEoSHNJQXEEmQNLPrIjibBRTHEilKhwt8EGWEm5T1NVAPKIvOC +wXTbjVwI7pPCOpl6YlHgYtHUSTNaiz9l7aBhOMjt2Q1NZr27u0oBDsIcR46lNcTHfEJzuu5VEgdV +/bDvSlFrNAqLZp5vhkSDhqIHE3pPo4c51YjCwMgyWWYFRqfph91kk1E0m1xuqXSvYvzr6McndDT8 +WMsmyu5/W19NJTZEvizYim30TbV8rfqSDD7dHXd/SVeOhPVgDS07IFinHnmENHTdPO0nO+PrLOt3 +rzlhi2p/WiCzz5UWqCjIUDdm/RTRz1P0xnc6BDnLq8nrEAgN+CTU8hgZ9zT+qQNQXPoBnD+fgx6r +/2d94A3L+0OW/o1KpNV9qg7Qy3U80TtJ9tjlq0QDLSSbD6Qg6sDHLFJ7EgsfFRrDi7MVTrIXxAyZ +s6nC2M8qXz3YnHku/Chtc1AepOAs/ba6Uk6kde+cggOiiQDD0mD2B5FMM6YAolzsAUhrP2Luv1tT +WcXBmrh+xVx3mLaPXoZUlApZZpd522NsjzYW5Ksxe24f+mbFFNHgtJpaziSpMGr+rcsU7voKgLGg +yi2qRvXXNFmyhKstEYw5RIYfv9t72BRflK8y1j3Hm5ag554i7Tov5kEMh3AxdbELelo7Imn0SPVw +0TfWIslXdSc/rSe97aIWipuILqb1XGVksxbn80WxyQuvvsL9cMH9wmedKPNjMklp0FTYZnQIN/eq +nfBMcrfpCfIdsnHlIdatvhccvUrHPE5i1SARDn/tpaQBAiqtgBkofZTLgVozybp3fYaE9h2tOb2+ +F5g59e71QTERUh9fO7iyC3fy903Vct9Oo3F44raLKy4nRBTyjY/0nhEu+amdoinWR9dXcOW5uT9Q +hkZDYQOvfStO1tLv7Yjc2KM6k8KRFNczj5Pvrn4EiqpwyNU+hzcj/Qws6kvgdc5ONwZSytt3ePAn +QewvaCrUF0jT4IPH16U9wOHpiUI/aoyms8TB1EQ1QdOIOrp1E7p3Ysxd+LpeCgBA5Ib5nlP2JO6H +7hYozOPfrwWk32tgsCuPU+ue6Ttp2y2Hxua3Evsbk2yBF8FMJB0KeGRfIugYNkBR5E4fXQvft2Ep +GhL1sfVqJzNcw7J3hVN23vKCH/x12oydH15b6pnd/TjacsyJ7Hl09SJwKPkxsDfxlZZ4FoaJ4ZC2 +Dr2GNl1i4dQrQl5HV+xtwHV0nueq1GRu6TZyu9XSJdSRlpxxNhRYhV07C33eWAA6aBmSWiCy7DaI +RREAHrRU7gYJxs5Dyu1dnhnrhzTnbt4XR+yKteuofKa7KpUzT0QZM5oWhHUZEsu3eOe9H7pEPTRT +5Ag4LbOMfr+7IuiluxpvcM+lNhCiuooGmlK2CEBONaP3uSb4cvGyL6fqc6grQbDMlixsEBS9Wfm4 +NfJ5nkBYEvIfm2z6rY8f2sY7qHn8i9TwMM505G2gW8afxsH7i3Nwa8Gvdo9ejrmiAy4MRpvcU3so +70pc5c0TFjOtCpq1SEP+tIvuxVU2yzKQwytfrenj36u8jpEu6oyXk232gf+slj7SIkskfpbfnNCR +mnXWnWG9kyOIIM+2Y+ywbogskzT4YbiRQY93bD865cnzTEnbNdxd1PPxRou9aU4rNd/ZA5cugAz6 +lJMHChy1NvoAgXaP8AfhTYWga07fQS1pKXOhC52rDRp+8R7orhyitDsxoVP+rw0UrpsPCVZDdG0T +3mdDvrs0yqooGpfbf1bffBka65Q+RlokBIK3E2Cy++YU7LdKP14vX727jpt3uFbLtoH/Rk8zhyGJ +Nu3yuPA+SKRhtlBN5XU2QYZaNRPI813rJLDYesksbl3/ub/fZBI9BtNbLe3e8MeQBiddBZ/VqHOh +YQYdHJl+nnAY7sv7U+3+TaqZfIvMKZqi8iiAqgW+WOVkMXwoMevYLaTQmvsbvw9mwL9MG61nm0My +M7/vMxMJT9nOcMah1cKNnL8O44VBbhtBt7Mrs2zvPIBvWDbBoBDql5v5uoLBJmSgcTJhu2qElY83 +G6cND9JWMrY5wyv8ZuoBZTb0zZJs7mRqaM3m6n7Tn0SFVN1dg0nJ3zl3tYQCNroUh7Kqe2FJRy6/ +AIn3dKrT4UUbVUsUuiM7vY9Fwyn89fCYZv6huquaxig5LMEQwTkUPVVcJ3v0UuRPk8t3kLswhDPy +NdHfIImPudinChPPoA+mt/9z2kyotlC4q4lj1Tnvzqz0gf9LTOgdWjcWKmO/O2mKDtHbkzMZMe2d +q3ED+XS1oIYS4HFeE0asvHwSKIlQvgY5+BHP+iTaJu6yJMgC8ZxQHTqgBtfI/xWCAYEQH0T29gln +3dymwulhUTL2iQap5RbVBKjO0ywrgc3g6YhcwE3hLMBB5nA1e4RP702hINsTNq9sEwb1ep/ampi9 +zjr4tyN0uyO94AIBhhnwmNHvYLh+RpdpEei+OlPETE4oUix+DeKaZD/MhZM+wsK4O4llSsQWpQri +KWFCznTmHebEcZY2N8gpTu30za39X3EdEfVQ9lNjVUPyz2MAAu5ZH76+R9LTubn7kDn1fDdkCt3n +aY8mPo7yOCdYTM40L2dvbqrnp+WJwKxuilMWYzmXOBwly3tE/Tq8YthtRpObuEhHruVeORGULoW3 +D2Rb6hZgoCluUaceG8XH1ECO6PMsyApqNKJybd5ImV2X+J14uBzJJecYU5Y2SkuupU8OtjW8736P +0n6Aatmpik8s4GlNC/EysG+UJ0fG0F+ipsOb6KdryoMn0rW0rej1yZ6yTEdhaoAVkUG7keAyzbEF +THlHN42EaahkGHfmGKHEjnpgH07dArpefBLEedvY9meJiWWKVUAiV2LCaIH4hPCg0+CZ1adYUAfs +G/Bhy+L3BC0j7HctsMFvWpDSL/ob6h7klergupE3qsk0O4p/h6wtdW0Vgfb4q00I8uZkRDUEOdW9 +NQX2MPIpdstD6cH07ahc6dA/+mhV/oaGRpOLt0rNGGR9BHyKaJu7zk+Fc6h5hVrQbjTUCrOc74bp +YfeX3z4525HsbHHmek9bQF7zBJ5EEDKl1mBDuBIQK1UtroSJngydDZjNYVpXRaUkl2Fd5ctAySQl +Ftfpa4ACPLDQEYojF/HpP3pZbK0M2WoPtVdrrX8bYo+/iXTls58HnKfcqlbziAZ0G60HmDJM2wtG +efhYRaZq23KiZpjWk1zMQMu9e5MRmBVP3rwi61CCcmdhLzLP3Tz4zJ+XxfawIwEZq0YXYbxj2CLB +XRBzPJcVlOPXvEWJ4svMhPkDz76fQHrP/xx+08NzkxpEmKLkqPTxelRmDBEAq5skbF41y5gvGHx3 +Mlf0CFFpZmDQEfhV6mMAwq6TGmR+4IfejvYQVfzt4x0aoEPZ7yKOU2HGudjwIxHEl+yNh7NmWABO +RKPYfNbyMFpwYs9IhGkK3P+Y/2xqn+GPFtcJz+KDGVoqYDEF6SMGZxD0V4rVUpBb91+XqD3Nmbnu +zBHxPDEunYaIwbrDkWEitMuFr6LIPu7XuGi4zh/OUvc7pJZUQvbEVzsb1eNNokiC78w8Fh7M1dpF +U9kysmN4PXkWLS8E/DeSYopaWFyt5YkokB3r3mZCJ2sRD6d/OkS5aCDTdLTGxaQgJpH6FYQXqp/p +UAXXH6o8nFcxdJEgqEY1WLXEbNdCZMi6/h/yq7v7Ae3GKeJ8HDR8vH+FbjzS6JeM3SqqDT402M9b +/VtkZfyTmQL8wrgfP4HLgsmR2m7nzdzOdAlM9jInWrp3FdchG92KTiLgrKQozp3Ti6S32C0kTEre +Fazm6+bJOMSi7o7Ky8J/4rvBCYJbfSTQBSPjCSQyK9DhxiKYGP1+rfhnWxyrEstglcYrk11UYNCs +Gsusn/Tc/alZADEYaJueJE/IAfdgO6uy9fxEhb7zUqvIMAJhhU0g18d4EC+UM3qFrhvJ0KQnJ6zt +EGrLbIqBawxqEyp/e+JagYjgBKDzt+hUn9qb+4biZWcnv64xFBdNSfnb1kqLALYHAPDoJ+BoemJL ++eItmvC2nsrOD42EJUgzJ/Jy+zHeMcjvyDKgHWuT3mU2bO/gxMYNWKQu/r5G4b5t0OoK8rViTZlP +e/+UDTTtSM8F+SwZCx1+D8ve0lAPHf3A/TPBwNV/YUTFzmBIcoEfzjXGWfRPETC6owMwbPrzN1mS +3DQMK1Qe7nsxLLSQO5W1tlfX7NRYbcefgCYIyNlzMA7ZMmH4DKQo6MPWRg5Ng5Xag3WTsLQcBQdO +lhbbDSwDcV3Zh295qUXdfekisa/GyCvIDufKTMQLpz/oSIfWtwHkqtPpqNE5V00u24AWzQO68IUE +HbL/GfUW2NAKq2tTGrHXItE5ZwW3RfX+abVxxdZ7rlWHhg+mvjlaGTMNiO3215uOO4CJ+KHHGdBV +NDJfE32DDsudOnD4CisWZlgtRDbmzwVu6IuEeBcky00X4cn5dRi0i+2A6/9IHYKu8wkuml3cPgNz +XOa4OGntxsa18wjI57tIGlar08wUWInO6UvSZeN/h7YOZCrsLoPp6By0ypkB3d+J7tCb9vP632OK +UrxYv98P7c5j1u37TJG+A+ehB7ZnjJHgRcD/SrWABIxCYyGYmjb4eLWDAx64utnbXVu4ncm8KCFD +MKDQeNecphaEY4dKytvoTRTZSRTqKbol9UB5fKIrGtpDoPmA00pEfx3xUSo+W+lp0lj99zb8QuVz +48VItIU9pc4Pg47DooqhCOwQbRLvCZ/LC8qZJMekISK+Hj4i8S7CirmODQRaYshbjwg1byAb4toa +0JgUndVfPX5GV8n0tPqMWAGpZICP2r7ZhN+Xpjc7Hwn2dR2lrwJqytosu2u2pia3/fwBvjFU0cVk +bkeFZl8+6i1Nz6M6/YzS5EnakLkoiKXHAu/1Dyvxlf83YBmUr86knT18nd+6dngpTuL4W+z+cxSn +oJi49pGp41gnsAjOrW8O0ahucoFSLx3ygFL+wDZ9utX5yTPu3Qy5LFSqkKYcdt/vgwGRCSW7BB9R +5092Q0WjoB74Y0RqyT2KA+/3/eG3HkCTAS98DlfPKFCEDdhGy/+vSTIQJtw0so15YTl6MTaa9jCS +LpL4YpvzH5sTW8/cuvGmPHeBUHvWn0UAPvc2n+D7CyzudxuhhhFQlo33M1DGpuADCJVir9Pk3nc3 +q/lQFycVtK1FJ9wofiG9sm+hQ4xly5VN+g7s2VnQGLXP/GA9olNEdgG9W7m5ETjnkCVwUmOnYVQh +esFbuUcJRXs49JZxQdxkLPslWgyI3F/qoX5RqHLmi/o9M5gtahHiofF/APRJeQ6xmRoWkiVIcUpy +mBVUHdZf9TR25sOHxc78g48/k3Rqw3PUdgu7Q69ndwxIdPeFYh50YdC0kiHajPJTkGp2jj7w4K9R +L3KkhwkGtZipIL0B1+RJYNY8FnjZp+/RyyGzFC10vv45/oFQq/pGH6M2qile2PnP4ynvMwW5d2yw +59ecl7BbdHZhNS4CfuaioHN0ItLUZKOvkbmrXxh+CvdpNDAcJTphpIV7lRTXyfF0/VNZq22FokIK +UNo+FPoDWaQOfTtyS61wN6EX46y6P1/+rOw5TQJkB28H+hozZmD4z6or/5L/zgXjAZ2lurvr1Ici +tAgguu8qbuvilEnXubb9M3w+MsR7VnaEIOUWn0GiHpk4pt0Jlhrc+GfdgmjNB6WtDLmcnazf1FId +GIYUFnrTY848wk1XGxXky6Nyh0BB+U7ooMLAZSo3SR5CVdBMturek2n9JoQzCa6KNTwZgZS4ZVcl +7UmLLEmVFF5D/TEg1Mof2jTCsGpfEopsuYlPioPUx31Vd0SLF6vZ7eeZxwH+W5/eb/xdTwVPBjqL +qwdfgy/6CU3vHRFbJEDHf+uvg4VvlbGIgxT9kQHgVignw8NubsF/vFf0WmD4wMM3WilCPL3mb5RJ +mZjY+Qo5BsT9UorDXFWaas9k1z0fRV2HCO+ftXO30UZxIxoP3aON+TWsTJnRuYG6oDHVSMDnputZ +0+bLA8IQqVAeImK4Y2QSIbDqrtQ+nep+Fw3zVRe2fbeUvBpB/EFWmNTYVsKv5dpTBpWb3M1rWvpz +9AagkHRFAviEsyD3w12PSkIlbPZl1IZXxFXxOc5DX6h/NJPXHCvct27Cn2MZHv6IqOLZPp82ieyq +MyzzH/ez4cLmanM0q/pyfOZ0Lgu1AlzB5z2W8Uz74yWFh+hNfKt60bH6ebi3bJUagqY5IrFr6AQB +xRA9A1XuL27p466zbJ5PvWoNpLfELwp8moV59hIWph+zn7+QUeqHhNdU0ZVNmfw82dqIVPIQgMkU +ICSP0VOs9XF2Myi2IfA0HiUMdzNfp0DUkBbd72Aouj54vQYRFnmCRi8uCxbpvlDggAAzawUmRkEl +m+LuH4cc52ygV5GEx5QiJyKwKZkMsHomLRWmWX7qn97k+LzTi7GbZs4CRJV0TdufgqP7Sm8zHGal +tLQoNf18Tfhr42Fm56gs59eq/EIy+KIJB08hudOYLPaS5Ne+Kc2KHncnmRWDt8aitxGAyYak6b/O +K0P/szq6QXke6GyfoIpfpfSUaEIMUxNDb8cMX87P2FpBwgV+AsHEYmR7VgpazgXjBv/Db1KHUSxn +8ki8M/xyy30VCorgfALogLpRheO9Kof/9wg9F8SxaYFtvh+xw+vEyJqOYvej/hWptxNmo++CRFTa +vhG437ST8vZ3DoUY0tW+AXZcGLvug22CwZm3fPGWkZ8eU6z6IUb1IsObLGYXqL/5LWVs0gUG8jfQ +8Iajvw5bRqeKpNZc7w7S6BSOKTmqO/grwJLEiG7fsVjZqSetuMtp0W/+JMs5feKXiyQBEOP57Ynd ++3MYhQQWNLazmdKGEH5I2wtyx+63VFZjj6gLNC10tH47decM4Gsie202alg4GN1xPl++dB4zaPZZ +WVyEm8+nKLelrrHSyjdORJZI7CiTY/DFmv/q0PZxaMrLBlxE9X8gn5p4kqRi42EdCWd4JHrs0LeL +ZXckaHRRRAsiAmNc8k6xJk2/Jt8C+p/ZK/srCicMmxB7G6Pusq1Swn7CGLdBh/fRvj5iBm9tQQ2L +OG02GNKj+7MXiBIJJMB8u7ZAI6IImKDIu/JYxRWNRQ4IqflNqzay0k/Rl4S4N7+lyaGV/yCvMeMF +d74pfs0gr5INN3QBSGxxSV4azyLBwq6LQdZqG1QuDomZhl+6HJgqRY2BhXU+jFOopnoX9kr/Q9vu +JprND+/ZaHSjTycjNovxIikGqT9IM8vgE7Q5NAdoR0t29Sz/Rdivc9QtpoSO0cbsNiQNzcgftmlZ +UY8Xuhybi2gIgAD9CqJWO81JHR8vZ5cKX3kqssta9LqMKa9LVMdvWLZbhZ3yFJ5PAuBErD0D1/lB +E/acPYhgxV6zC/mTLGzP8ZuJQ9dKA2o/ooJs/9M7mUZMCEw6B0nRYwctq4c1JVpcLq0zqodSfGCB +DBdJynj5XsASw4ivD/EHJ1be6ciq28/qEY4kAsF0Sg3enCTl6A4CK+cDBE28stlZyCbWkHN6ZutV +o8f3WOay+UX6Awop7MgFxYSp4HlNWRzjQ23pEdhj3fFMMc+o9PJB2ciwmzyBuxE38TsXTklz4h+F +8fr+/Hl8gcwTGxvsaCp84tPJMLNFXLtXmaTuR6YgKDcsjdy58VUNt1eKnkzTKHn6tiXkUifqPFZB +Dt3XRa/l6fwvR0J1uZXBQ8yqeI/hDo8I8a2aPrsQgEjunJvCpZaGo2Ki+g+7skJ5YicEl4gEpFtC +R8jSEKLJ2H0ySmKuzCneki7SlYiWY7GtYI1ZF1YDzH6sNjiqq7Nh+aikzlKmdpnbhhjBgLUPM3qx +2TR0MfkjgjvharlnyEJXUiZstwCTi4vNxJYhXa1Npg3vpcTp43Tfm36GDRexT24tlskNWCksb+dw +E3Dw9P+hUcQvFhIs2ohqHDHGSPsG4bYE8GpEFsAwjrJwJkdcOGUPJyRwses4OQQYlX26hS+KyVal +wOJrpT3H5SnJdDrCCNFzxZEta2S5bbbxDzqwDMiOgaS7l4cxUehflfFxpEDIp+xDQtb8dhpGdxTv +a3+x+oCDe1d4/UV4i7T9vlaAefKJlM4upiQhZyotcN1DTDL7/BNZ3lzZrpcPr9jjfaviD/kzJVsN +1Ezo2DslS3XwtfgyxY5oubqG4sOH9la4l5MBV7K4hKuK+/RUcKJmr2ljs/sL0pxdZMsV/3kBz7kb +0OCcf9IhFGF63SohDKFmsUeBw0pAJ4qFG8QUY0IUcSGkbzsfFwT0JjAeHYFN49AzzpqCx5NWZjpm +vmTph2JQzlbunE+x0sEziyGmZMJmZnG1DQZNJGaWkV4Pg6Wj+BHpZ8u5mynbY8diTkaVV7VD0d7V +XeXuGSU8j7gdoSHU9i+hWqPsg0ypn8czpX5l//fHTnENrI6tBHQwwQ8swNvbdI0Soic41zw7zjmR +qfy3apsyWhIraTSxU3zr61np3eOkby2h97xG+PrDFLmXB45bS5PhLvCsVXqImIPtrES180+lmGqB +eytUKEIOhdl/geMtHS3WKYunQ1llYaK/2N5cLBP03dr0logYZ+EgTKwzwWt/yveoR+9R2GsX5Oqb +rLWbG/jQbFVf8yU4QexbXvd9a5xk3n56JDoJejLoQWEXepdeKpceqYZRpFtc6eqUii2MdDUlkQEp +BMuTV059fFqb6gCOZ8UmHJVrQzLmYvH5TOZXu3Hh/NVi3MHw5FbWUKfMS8bv87e1lWUP638d4DgK +D0bPeMR61vfjj5qRZEf7U0Nwix+7oqUOl5626rF1a2x7D8BeP/FHe6UJO/nm2EMvB0Ym/2HVqF7T +OTMxMYTIHPMkLUVuRvapZ+S04Cjmy+RhzcTqO7IjNzE2Tf7eLOzoowUGlF+nnNiFJR0MhfAQQL3Z +7El7X33SHcCulF4EgKmeR0yAtuVEfvWjlF+xitNkzBZdrPnX3bOouxlj/dBv9nOzd9JM0/Ht+FFh +XqU7dtx61c2x/E9nUfYqL6p/38GK1XIw4MrD0B8+rGHK3U+AKciu1lNhqpddNqlpw1rv4S/ytyQp +galjBdvXA6LUu2yFKU1AACcL5cGDfBfmDFu41HYC4xbzntUu6ZyS4Mp84NreOndLoPn6PiqeFwME +CmHmOlsf5xuqRNwoXDCIrPNfd3OLLDZVQPsJ7fr1dmFPvI5oYRqaAaTG7jVW9WxtNB7Qt1OaXAQA +NqGGv5yjhyGh0Tbjd6r/FjOHymSrNwxFmjRZPFcJ7q1F4nEwxXfeQYCbit/d2C8LNVqHqbzLd2iO +G/3mhZYn6zD6lLIeBemnZ+ePt6dW8xpRkj/vycGFFKEasGg/qjkFAeP/h8A9lQDFBs6IQprcfVkn +GW8/Kg2hDJJExEhGR4eCI1l6HEX8Rm4DAprZGwZ1dLsHJb58hcuKwveWot7eHI9uoIr/FqHY8eVo +o2Iqn4hiRM9M0+F7OLAZfXtJA8bWCCgF9JCb2TVZ9yveQMlBUz6P9l2DkPJjHdDILJrCoX2fC93Q +MYZ+QPT2s/xKk0Vr9YFkMItKlhdzNE5vLsBBbXwqzzlho0nsEoSGLTQxAe9ciKxTeDTpRe7qzQxo +0jYDMNODyHnJxyYIi6q5LWfdOOs9M9c18Pxi6pvOjB/JLnRbsg6iTrBWz9kXLnkY1lr0wAQRJqiL +CIsj58fF2RibZFsUG+rSYHu0IKlV07XQS7/runA5Mqxk2loo+YimXjNI7pAw+CbMY1XmDh9RfeKy +2sxrmUaWj53ZeG3/Tle/ztGxx/uKDGfbRA9kYUxELry9PoSqpdjd+FCdEn4HhVZSBQSz3Thg4XMo +Z/iTo34CbZHo8lDIKRLSZ2agG8vycJwlxD1W9NWGcS00dD1xtbvEwbz8qma3ECXz4ex3P4NkYuOF +iydm8wb2NYXY9hkAudrGLAG9pYjrjY/dLZSFxA8PaOArFySBxEi0P2mRKtRLTJwkGi166UyX6AZN +GcowPFl6WZgxB91qnEeT8Jx+P06AppoCPSdMaR+4ahI+endF33hJ2gSjuPzvAMbwYJLojDQ5FpsH +49TqZm/654F/Zn7qMKR8Uz3NIel8CBrztHgFehbEotV1Ww3Ke+E3WO9++OyIMHyMnykzULA+f7SX +s+XXz6RqzdMIU7OxJxtFAzFdzH6eoqns++4zlHnNI1n+J3nYLz58cwgO6ugPokpip28UE56g2tgj +cdyW1kJpFkVSDCruNbySF4eC1AL7x1TObQrYREGQi+j6947OS1g7sWAFwy5rMitgiL43f3hFfUJM +1+HavR+1cnG0Ol0gEbO4KV9K2b5b7flSyZ+gciwZAfDBNROxGQ7mbfLGcxIZlRhyKqJGmi8/SIAT +aLPeW07HWW6RRiWgZh6ueF18sGYLXO6Ya2uocTOaI61tuw7PCHwZu4MTPlttYK+YAeiccMcDlVIv +UACX3tQ90p5spmIQDCJR758p2wbC7tpct065M/aAMHSPdwX5XCbNTwEPeTv8OKA/3zl7u5RFZRtJ +khRVnMyrdcyfCZnJ8ff/Y6JT+rQy7hFaBBL3s2xTLwdxeUvnNoQIZX7PMxBQIdn1nSfKruUW4BvC +ihcwCyxcjShUvc+ZfUlOU4Vy4orfX8wKMpDuDcpzbPnK2SygDgbRpMvm7i0WP9JhwYaQJb7jNIZM +urtYmz3tsCn0njGYFf4OV4IV1UNT3kXziLim6dvUbjgBHyGqGkLCCN3lWvOX1JklzVwNKSpArXPz +0w+1vnuqBX1Zl3lUEe2u3xPF0HQGHUo+K/g9w5zWrQzkcu2ANQQQyELdHlN7yOEhTgBoQ6TsMAJ5 +ZMeiC6aDWEsh3T0pZdKqxl483akaZ1LdZLgdKE6E1GsUOBWszoZrY5I4uFXX4WVEbOGEGwG/5F1q +LbdHWScdG9fMd8I9SxB2S1OpadBYx0GvtXnK/5ccGFvmzWegQREW7bNMcOD84tft0fxQBUC3hCdr +EnfxyZVLtfHNqM/n/4TbLC2351F/AdBH58dEFwi6Xs3ISD0OclUHTdZvH9udTftDYV1EIYOpUw+l +amEUs4yxFcUjzOULEfsiuBqryqcCk2ZqrbEOSFMLfxB3h3PbTRDM9GSY1LvUGl6ozkicNYQTK05G +pyNfHlMEXfXjaYagDtTQDXopnefgQm93yAOMTVtBRT7VG3eRtfHmRzM6OwkIg6SMuCKG5WVGHEZ6 +4AZGeT+tOWULlxKF46gHfXkusfMgyOBsbzbnWnmeQQHzW8ltuUYHrhk8vOZ1Q1lramQoteOlbnHS +h5cvYwUK7/54FiyWgsKBpxexMFATj3wf2vQh4C1l8b5lknTgYbHnFW3+k7ifW7oSxw2UBUOlbrrn +rvwsRwffRfg+/hCKXGkZv1rBGVPEVtsjaiB7ixdA7+ZKFWNXOcGWRXp7Fl1eV52s17sqXtqKC5xy +RXoBMoM0bGgIWBt7zH82PyMWJTANXfOQWfW/HNhcFAVIvjPAabmCZdqTbw2tXfNqB/7c76H/69zQ +rP5Pd550cogYad3ya0Q262c7J6scowZKTsIPNTbY5/JXsBjY8AvRC4JiyRRS/2BLvjEq1VcdGvUM +FR0Cr8NJCxNJnJKYpaEGFlZxC5aPbNjfKwEpm+tSjXbv7BgSrlJ7S+Kj7RHppnMStWoGMepQUvlg +ozG9KfWKtfFg8OqBmLkEK10TQzSUGZSFMUkx7VGuXYz93AMQaOa1j2Lh6yyjJmiliB2jNNcaZ6AQ +XFTR3LCbzWMsO1uoG9+HUUmg3K/C2h5qdayW0Xu1uvvwLAD85TmcwNPiewWBjjhU45+UTGUaXHS4 +XJkfU5Zps7xiUkmVhrzwL+MuaxYo5gaEEmaS2K4gtjiihbU6e55k75nGP/iaxYVMAY5Nl61CVJaZ +NBdtgg/mqFD8tcHI5nNebNTxxWdykf81LhnG6ghTPkp5XqijfOz1rpLFzDqQih0MhxpPgQjlk8vB +KkpLXSLh6OcwPMY/1wxGnfQk30t8UoesViwdWQnRFumhJw9Lzw0HXhiv7/xm39+qxBjmgz9BrEDd +OkNDHd2uz62rCS1No1LVk8VKzqExj8XKbqbndvUjDLanVc0M8+rtOktyXc010lhmRG7Mldf16oax +26PF+nYXOgIWbXW9l6txxtYjbILrcikwsafWp0DtI2idtkidAz+mCuQBfZ669KZWPuJeFQ8bIWBW +1Zswo8+U6+oY89uiYtIEbqF8OYLiPtxmCngV2kuMaW9Tjflq5M5zJYEw6ePBGMOkYXnO+d6s9I1V +z3xPrWEWrVeocLo5f7Yci9JFTSWMi4dFlAhs2/9pAyIwDRCbM0nlGvRZyTa5TDzG6TdKkTFDV3lX +tHjyMDNScXf0Abwifeybx9yTeTvNH57jtsPPy0/c7zFRrWrzRCh02qFIWJxWaJhmtZOlnu4g+yDq +5fK1DoIhk5JRSqp4FTKaPeV5tYciapGhZ8rTV6vIY1Hlm9yNqs8e1dDGBhHqKp6dTL1BKDj0j06z +1znZLEpEIGhoC51KRdonQDmqIt7t1n5/bRI7iKhn3DG5ez64dR+85IOIe5d2sioUdDL6vJ5WB+AX +YlHx6pU7ZIIksfpKqgRKfTgFcTbHjgDM6eUV0IgjRBE5fOXzp3hObhX/pwC9cZbHE4X01dzZdUMB +zRLV2bC4vNuxLVNo6pSPRMM9zufsgvRJTWvsBHcq7cPmOpnVLDsN73X4ODKMm0cFYQonVi7k4WPH +2WWaZ/o9dmqZinhi8xz+dvWTyARjTqlsrphQL4magq8qDLQBzxkdhF6Z9n0t0lPZyow2EHA/bA9x +OtP8i/RdUQ8mW1PmJ93Y7/AsHO9LKlrIqoCM/vb6htFish3h+gFyVF8nz+5g8B9Fr3le33kEDKg3 +3GO9QU2sATLgMuwF8pQnSAuBlj/THNx/Xxyp1gmbu5ZeWKbRLcJcbeT5uCbvRmqCh+OgEUz4iwwC +K5eASyl3EpXmJaNsJO5J+EL/NfFHLa5WuXuZIHNrNYoFTMp1pnxllo9FYrqU+dcIKyMqjzzAnTe3 +nybMR+m7NmcWlM021GGnh628TIt8RHvE0jYXM/vK4cNQaQ8Hx5l5J25+EcoOJg54I++DsbqzNOpW +EuWJ74OHNVn0/RGKrXYiL2qclWBVTjWAmAnTYK9wUwFU+uGaFWDqqr5acd2ewNQhNyltyoDFurkg +KfpZeq6M3jFlF21hQ7/VBbbCNl2Fqm5ouSEUbS0+as7shlNi7qF9gODARyhrScj89DD0v0bMC6t9 +3K8VmBdnPwOkiaPZ88jlKBxxYUK0dqRe//PsDutUsCpwu+gQQ2+vcXPlDa7NAjco58y2+8pzmO74 +5BTHSlzqR/8xCuATThpJlxytKkEyqt1KoUDYJ7tsRz85ha6iRHasGgNQ2h+VE6uVFsLTVXs1WOsq +Uk658K9t6WpgmLwN/kvd8rpaAPtHz+sQlexny+epB7LqDWgY3k8z8CPYRUw8wD2nLPjSefDYW3EG +89GteGCbSMOd1f7jnxfpWQJEXv2dYd//PMeUG3XVY9mi/f6dXSlaxxNJHHw/HoLk1gzw1B8Yh2Vh +TY5MjLPm6A+h6zhJlGqSJaLik0Uq5kYQTmcBcRyWpVr9RFNForbmLUVccKevKTfNiz0cyjxf4Kbd +Jlp+KmqWZCCbxUcID/zap0w3f46JaAaI2ac6qrZ3AEhMmPGzUC1z7KJSoUlXAGVEiANv1a7OqYQn +VMo6gF/HgawdQo2uQuors+/l2XaySVxjCoYrrKIz4OqExbAcaiy8VvAUVUT9y5HIJd+KZHlQnOpH +a4G7lxRisOtHu0eUtd5EIMKATSEkY+0D8UVRDn2gdAtm3/fCHPoI9FXFzF0nmCcppJFjgzGdE1gX +l8+IIL0a5/uHrw9CTgoBOkHDxDySCyhKC39bz2zVSWTt0tNKJ6wxvAk71uCVz0AApw4XOsNDufWf +0nMuqcwvPhF8PNQmZRsaYtZ/V53R4b+qTUgwKRtk7PTsZ9d0YH/iMTBmDn+snmWxuAkHWGmBunGZ +lSRL9uRZvj2XLBGxORsGNsD/temZh8uXVvsNCxJxFZ3Ualmu29IupV8hp/erzeIXlqrcXVbhX68I +C995ndnxxF7uOxaCkKtVLEZfag/K9H1l+A2kX5STsu/eiIZfcrL+TubJqMWYnwDm6OEreQYFB4gD +TPwSVkRV1Od+yuvFBhmatj9uwXr1B00SKWbi3OpAbL7bphITPlwObD5Fzek9Dx6X/nDaphnsvbxG +8mQzUETjdz3S9AYAk1B/I4wuQr5ekTdHqoM5YUJ7cZH45BhZP+jJXAbQA/vltr5hgzkDB+OE/Ida +F3pENx53IMg5FCp4jLGQh0hKmpCR6N7EXAas4pkOeRfG96qjZ/G3KaGsFOIRrDEiQmHctsz0Z4Zc +Wv9wiO71WLE+AVSze09Gd8MLgH7Y7UW3VjBhucXyav0jKDBEVh7dB7/3GAJEBreoTeUemwAg3myi +/M7viuX994FupPnxJhH+AfQTA+958bbTg8o/8M/q+zZ7pbQYzVT/tMeGNtlb1lxxNnrDPNHKL9L6 +XWepJww8iKFDLh1av7q2dvinMpNlMuxEQEe2WAbvPMiWKZtjdIdcPxtXMvi81VHKZc28hSyQNGTy +kXoELBCch8wcrIvDnt3XDEgENeSWKMnJbYl+mY/Qz4KatneFrT+gXPST1theQ+bbfx3YFc0DCRUw +gJh+cy0o/MDS1n+/mBrE8B7ODpyTxe2xUPVnd9eYgrrajjyQeJOkMyjvjw2jSlAu2JkYHrbe+sxu +PpbyrvRTyAcHR6m+VEVdFnm1KPNUIQ6FLMQr43Ol8Qa3Q21iuZkGEQpei5Bt9qzPGHPm18kC+s4h +l1Iltuer9pTU6at0Lyyx5C7vi3GrKzfbZXbE+Yd3ah1RHWqNKmzem00t/GjnZ0B+sgRpwmPVVOma +FMSVDCv9Y+ZydwWVtV4E8tyXxN/JWPg8dZhp0FVlaAaClkFQWMNSEAArkRrSscHnH9dPrB6F7oNI +SRhHBA/whbLEt+uMDqHb5Y1YUCT2hH8dGwHdgYERkwzOr6XJz8iR/Vaooysqj7w/5xti8ir1QzXF +qRgNF7q39l9Yx0x5I9Pb/u6V/sidXI+TtKzg5mQfwnB8sT4QA0swzTnlEJUSssYwucqnW2RrtuXB +Xi/fTjn7zaLHQ6QSquNSMFb7Dfs0HmxRsQ68ylI6bxAiPpdT2Fa5j4PFHBCeKubMPzcVLwvWMrh5 +PcQS/X8gn8VW9nYG4Gyq57MwEoPJeNrOfAtjHrXHY87+oYOl31pLD3l15juMC1RhS2+45d59rd3j +7ggS8s0dPDFmTacyHPxA9f4UO2AhX34aoshSb65O7VKrM8QvaV4aOorPP5iGtb4c3OLMBWCqVZKb +WSlKUnkc1YeSqa4e8vpsJhsS1aHq9irGd9AJVlLTOuKaBiVAJUBtfFLqrKlZxbFJplar9RJkpVv9 +T7Z8P8+ybCxBbcO8AhqeGLNGj/tJGvN18EQzMmDZyZX7IKGrtvToLygkqNigGpey0AyPQJnGtxby +6KU99B0mqn4tK/Emrk2yupcpH//9Tf0qOnV9Lg+/GgcfXXUFwr2/9furM7VvUJSL4Tsum06o2tm/ +DpPgSNp+IJ9EJQnnaqIjzZtr5QxOYPw0KvAOZNkgirEHV0sntDKUxlHcXM0NDUgiv2T2ut2Qdnrw +U/24GFsv/EM+okL1T3Ao3w04rpcw2BCr6OVZU45HjmAqONlZlqfkSCj0s2VJHCqeuqvYRguIzMRr +UqomVrl06IzfL2ZF8f3fThu/GErscDD+iOr9nJFio78iiKwoVCVahoRp0m3KXkfZkreNs79EJd65 +kvD3xBkPJ5AJyMhwXRDZI6O7iPB1TTsA1j/DGYz+evHFQ1VdMIJR20dvWEZ8hIWigeYQu73X9ORZ +GKcOdZjA20X1RYaFrgLx/DXF+c/P8IsrkBKPCfjhwAWnBtfFz/JeSP2HjpVncGKf8tHDNOADsVS7 +E1L1rv6Ff+/viJkZ/i2YAvmXgyg9PAjTV47H930YJMjvZD2WC/+YrJEZawNm9AyPh7R/y0lCk7j8 +vxT8d5Vv7GvLtgO3dGKo+tT1b0jABLlSZiWLMASfLzfKcT17Li9ii1Qw2uIzlcw/QLRFJFd9o8GW +dO+/rgJoDcIFxt2Q+INKDJVdMgr3PeTShkts7INJ4GIbSe3YslEecS9hO7URGfnIv1/LT0HUqgr7 +KQqIIhOVoeeq/i5wuZ1uxuqUFpFtDhA2mrLCOysUBNYr0pgduPH6JFc9AAcmbkpDpKcxa/QC6Scw +0RLw/wOc4SJ90K8EXErzW5BtkQD9JoeZndQgN6krA6UPKYp4KFSYg5UJ4Ri9NxUIuP87YvD3ViBo ++bpHMfBTdWQXlsnEMfd0xNGhpqPNlYAPCeW3zYYpmGCc7kWHN+CUbbuURXGn9KosEpKFZr/MYBfw +Vx1MPh/b0h86L6/KxWbk8SkwF80jvZ21N8+Fnt3Miz3bDaiNvNTbigrSu0rkgJ6C41GaWNRU1hN0 +ElwYjE2yOB7rFrPjV3J+IZ/JdaaVnqbWT/n5FT6KMvDWKf+zFId6ZfYUfaUWkyUbikGL9o2cTLUq +8WMvjgk1ZsLgk3Ro2eKWikR2NNI837wa+EmlFp/1yKiZSHqy9/obPeb/2Qkym1gnoc7AfJUIiWwq +jXCWdH8fZXQkoKYws8wFJsEiP38IoaCpfu9BRWLQTUniU/4kPTE0lFEowENGs4isCEmxeqRM52Nv +2midHlgSDPFrFmyrtoz4OFhxHE6JOiWh/9HsvFtxAoWfLfPjbDcbmofvWTuJR6sOJeeBWR1Krben +lnyxaNC8NyEtm//5wED7D2zKMTiMwh4nhsczDSXBi3jHWYK5SqdLrQnfOVfkdCsRfM0afdKuS/35 +NcSgZDNC32cd3daWTLZOjN8ufQohYTGPspF12SV19uxsVkXnpnESbnlSn9+4KHxk2eIUuKJZ50TC +1U3VjBFVJek8sld0ps2+FL7dkdAAKnFqYz2xVQ3jpNCMBi2xJcV5Tb+b//xZdzhi4G9p16bAPYWG +3PyN/8JwhxVvdXHBSuB8tq0Vf/D8jUTsbtlli4DHw/4dfkLnv7ANAEProzsOKmaDqhrNSUk2XkWE +4dqQyM+AGEHeSqkuu+H6wOH+zm7z/I+adtbPi3EwrnChM2Y3vFbEAynwJVMJeKA0eauYnJq5J6Pi +INcXG+kw1TIDCPuof6BAyXOZfJaYPNwFJ/533ep1ZXgeTz29xv7MVccXr2fccRM8b9zXHsvOufSP +4maISOEyFZBMvRJ7Z6JMQ8hMFJr1rtX+kWeI5eta8ZU23YVXIGxnnNRFtx3JmNIEitA8Ai6pl+Kl +BvsimnvRrzXuBGETr52Ub39Gra7oLal0/68gaSwkwhJiQ3p5IMZwjfoOCb5dyXT8e9VOkCaMX42W +97InOsjR/jXVEEEhrCHBivqFrHSAQfS1o2cMFjUCilkdoO3U4Vu9dHNwxs8QJ4ye+wwtOPGMhe8+ +kIZTbS40SO4cnhfzWAYJQ04ovr7lfKav0g9DgwE2BGZFETFEqNY3IdEw/RvEPWkhOFjNLpk+FA+X +Gi1kGnA/sy0/ri7WqIDhtBSLdfFupoalG5EOgmEgWxaOJvnSyQv5Ad6jkXWedLaNwyfvF+35/q8s +QOFtlM8CLrFoJbCjWD3q0GdfX5Tu3QqpdndyeMuVa4Tl9D1245H8WAWIRN1ETCJE3rdyBa72ryUP +zSOPLAdmbjK2Q//RCh9/P2LDirYteU2i+SXiVu40B9Cgs+s+hrifyrIsJCocuBXzkay5KgIDaEf4 +9Vh1+YDJwumQOPd83yuPFG55Uj8dnGtNnNalcNzO2Bzr+j9ScYjl7n4n2p/dR1WzQbxAzNXZ+cnp +wICt/FnT8VqtRzWGDZ7o6W4+Lfq8AlmzbUDlwj4INH1BpYxkxCXH6pndIz+PDkSuUEIYaAKzReso +MITqNcZggy0RxoLLleDkbtZ3CDHPP1xG2qJWKUXCs9fNebI/7z96879gNA4QWAv19QsAJ9jsPSmp +zLx7EWKzadK+WqTeu05168oMhBsVDvCFJ6MGoxJeaPm2gavh8HCYrlomk7bnoqZQx7CUZnSd6iJV +2GCrxohx2a0Za9MU+T3ptycbCRWe2Jfw9mwLYsCRazw8VR53fXtqRBpDLi3WX7nADkyl0GmwpaKE +V3Qd1IAPug0z6g8YcQ+VygJNYWpoGXN64pLFgS03Q3xS20pHURbrpD9/7Ss+VLK8pQU4S+BCGRYD +arfgDuW0/Iv5BtQyYTJXQLaAD/hxJGV34be9KLw9LqwUzxA9nd6iaYzz7UqJ9j1D9mWAM0Vy2bap +ED9GdGXD5YI5FkXAjuLqXEqXn258yLXIAOJX0Td9Geu/BHF2istAEbuA14cH7HR9cwggBcRLDGK4 +N/i37+UE8YkB+W4h7Lc5lTiaSbY3vP1/dcbsZbjlFEbuAl3QMRJ6f7g7gAAcrE416ED3u03TjnMe +rh6rcOW9HNB6nnYFnJFLIFKXl4D2E2c2+egO7LuRMoGK1n5W0yQRzg3F4rJrQ4GV2+v1eGz3zVQF +9ZEBBWxzIX0PdzCrB2HB2OPgu4kF4a/EoEwfgu9jSUHVNcFJTiT7FUrcKXIMq5Yzuo9hjMtRN72O +lLdmg2H5USsMDI4UTDusy14xcd4qgeFNk6m2xoqQWGlZvb4pqwLwb5eIKMDC8q4QXp5vlW8YtZu7 +Eq4WobWQx/iDaBFTIM7So58uwg5umJK47YdD6ijBEzmWCiDwszeL3lqNm0y6Wg3SfAMPZMGGTqln +tHVM1UEvtpqR38EbJFrv1AXbiLe4osWQw9xiRai3SIAE84jHeqnHVyws7Gs2an4256PsJh1ajuQV +dN3UgEwSSJXUGf9x6XrMBNmdMuX2wmqfnqX8pc7m3xi592Ecfzkw+EucdnvOHWAAjmnPRKAvNITJ +EB+Oc5Lh9hpSW9IM1AFzbUV4Y8//sjYK0tunAKpgkMBtayJqcFC7nB6i26G/Zf175S7z4BTxVDrZ +0r9EiBjb+JA76x3JtcrEbf1JRg0hqavVDhnGqTZG7R4kF1Mu1hfMJHychjk60oy+F9cVTdAUWxO/ +dVstF9Nce/TB+nq0iJe/Hd5lpGVIdwnn9bVLhxjWPoGBN9Im8TyDUjk4hyTZIpaQ2BZpqvKcxOZ4 +MRCWgGRDM2gU8d650+LUJaEq8W8Q0ONOG4UrPRwbO7H796J/q4T5Q3tJuNmpc+FFAurq0z4AE/Vs +OKli7Kj0zI1Mm85WJp5WX+UQgGkPYE/h+JmOoUwYPjtb3Fbh1KtnGUsOIzle61VAkEIXkdjKUW+h +8ttQFN9+ro+p9KJM7iTw3AVcLdlsQJlSMQKIv3ul6AXYTj17QaT2b3FcJSmRsKPlHPx7oKcfvnPo +LUWchY6fN0GvSxlWJF8zvwT7ELq5tTdzbmQx8zbh51pYpwEMa5PecV7zepNPcaqIa+zKhdDfNVa9 +lloLsnl/iDqV32mi4+fAv/PIsfef8buDqupRjh6+Q/Gl53hnrI/3dx5PBnfNy7h/Iy71xoMqlXVy +lNXNOyFqDsYzZvEk4rHAuUq8zxypNi3JHHwUisL+02uo1h8lqJqUEBvlEzODFdR+2rHRvPDlwW/8 +KSCgcSYBdvv2huICn8GG7xx41K90PVsupjuWWMfEzM5XrZO1lEmKAFVbmcOasZZ5N1CUklBvn4Tv +Qf2m2bIenetifY7FEShW1jKbUV6bMlxJcdTMzgXp9LcUl/x3/sXzraJF978mXXkmWOtah3ebGJ6c +QzNk3AzbRvrZDmq6rN5YxTHKCbh+N7xaHIIbe1e2fwLZZIpz3sqeChaQjpHSN43u2rRLk3RsM1lG +Ml9+gNsDBZMhr948rUzwp9KDpVPlfSbWhuaMD0lFxV/EvhJUOL2AbrKseZDGhAIn686WR4OIN4uj +LOlG4a85F02Ndl0bolMEFpb5Hbq+3957MY2E9RSH9mj2MlH/W1sJ0fvug9C5cwS6wGZsxLGeFATd +PTfSuw8GaeS4KdgyA42m5O8KQLL+xI2nSMYr1QlqTuAYxkZt9oHUV/FPwqjk2N34vXZD9mJmyVxn +o6H2fJKYU1DlSU+bpLcAAYrnXVHW1IQaMTNKCJ0TFPbzUND85pjOIdsOw2axl98Zifl0EDgzplT0 +IAcmaXWQDtfNdVSkiWnMhg1aaWrklViHcKm7xOy4hYzW5JWwb0sj01IlYUpSpsbAPjmEMHaogbsq +2u6qGMUWhtoQD4MfjzIwskepucscDxzDEIpWNPnPQjs9Q/vlXeuKBwVoZ94SA8ciKLiR6QV5C+yp +8G5p1mnsf0pRQBNHhdl3nVNJ/5jpMWmOpBakfiU3d34kaKB1nL44L8oLrMTGvajc0CSyXFmoe/1+ +8cWtDeJsTg9cxQYK0NDLNWTDV9U0Uyd+q2unkKRK+uaQnkEw0XCoCOu3ypqfdGdEmuzqWKDaxWe6 +6naXi6VZMRdRJmbBqoSicecoS7hWhPk1G0IG1jcxhvs4LKog2gSHnxCgGg1dZSRb5hy486AFr/rW +xiGl9jJv39cRa7+v/qfl9zTr6AoC+XUvATH3hiwNkCwlrVQgTJ/rkvEqRfr9pk3xgbo57SzxjIMN +Wh+sBrWza15llPx/PZ2hPQo4mtTph5I1MPAGrASQ7LSWcSlmmPUDbG/zrGEiY506g3lDrV7vO7hO +Omw88o6n4mFMj7SEr/bcRbMlA83A5B7O8XLebDmHsUFiDZS0ypgNSjfDvDaGXukTcyOarvM+dkZI +NPusx1RrEbt9Yy9ss6PlfWxKvRPFgt87+HT5+OF2RAy2NbClxLuTXOZ1SaABWjmxf9oqvyj2dhWS +IE6f9yQnKQRAT/yUxlE6IkvOSRssNYroIkj7rGtzEek8Lw1AWb02jfCyXATf0T25zp6wE+YXPn96 +1BmmKYgU8pFX+95V5EA4YK02anTusrr9b6P4QgZ9O0IxNiivR4OsuN/sXFKSCw9q17+Loiwk7FeP +A6pw7DLsqCfmfvEEbPSywajp/8nFg75vz4RkB/PlU9/S1ulCJBB/NjrY5Zi2zCslQyZuTSd1QbFH +lrk5xaJTth3UjlQ/tGcC6tSWEBdOxIBQgbPlDtZWEPZ4dFAQSYoKGVopM3bQdVki4fTptdgYIxaI +Nx4AhwJaxWM8/zZpnfPzEIcOzFLgCC/g6R54HV3kKbQ/b2nhjtPzAxgfuf4lbiY9MZLdNEyBXFsH +DrxukoR80fW53nw6nFmdsHqXNIP80lT6MUhWarqHc1yvnEpZpEZ1xloNp/7x9n7TkU3VLudfPwuW ++Ccv3LW041sZ3LW9cdX/ZQziDKOrjp8juxI1AVzArioxFxXHaBdP5Nrl+rmt8TEyJBrJRneWgeIl +Y1nPlw6ZZP48oOCkl8hVMZtB697+hB0qZLkuxmFezC/xTuuM0+aRVBWZSwAjh43M5njpx/C/pQ7D +aqnw3UKsjC/MM5pF9EWyXSrJc+qDXUuUhmbt+dH6gidv4NvBaur2khik+20xSaOfwAE9RnB9OUau +IR9FhAzG9N9LKjo/2mexjXzwkHg26bMu48/Dq4BJIFwVhE/WGur99Q9vcNCPRA4NawFmQco7U+ut +jUm0tnN1/ZBD+0+fgvtzCm/o/gpFOvklc7IvTZ34OcUs0I2FLsyOL9wTSIVFGIA9QUIsohjErMnq +GEpRsHdJbG7QABCBKbqKuBUxTH1qN3c39TMI8xCdziNdjgfWmbrnjSlq6uYdQhTF6MjB1MXrZraS +NbEvn0rYVytOPVyR8ctIK54zb5YWyc20NJmu6zTwFBCPto+SAT2kH0zs1ZeSco43Q0qjqyfRF+rD +35oT6UBtIa4P0D5mqgeLX/qwz4ZjpoPXEP5NNA6NERRRN8yn69GLXokBIHWjBV68T5DawSoT2KUu +WXzd79WtP9hK5e6wKq8RpaUps9KrNuz450R3GzXjK63rFESDCiRhQtjUxxaUhrcowWEuMdmY7Dmi +tV3TqzG1KgvM4g2qiOsm/CgWw15eOhN31MFcXNwA5vxfNst5jtBpj/vuOmkPz8/mGqENaWHNMU4R +1ARfRkfJA30EisxVcOABv0+gw7Dq/yg0qtpYUrd4Xx4Z1eKfiUpVEHFZkfJ5niPWRhOhH8tLjQ9Z +5CQ7OfMTWYDsMYLruwOK29LDGs70qeJIT/dQYWyNBTRD3RKHjeyjwBjaua47dbIe13sbiU4E9Gq9 +E/+/c1UNmk2KxyV6BvIoKIzDnrpJ9QZcdYBjoKyH2MBrxH3Sb98AWrxnvIfYTqtPK2wMqPq2kOcn +q0MykhaJN0WAW2hyAQMgrs0X3JkRJbGPy44RYeTz32oCzzUkKy2SBGbqGxMfU5VdW4Kpg+3bTwUy +sHyqFbsKgKmU5Fqd1rTjQODhpitJGpT2Y7NiFxoKxWAFdVjTPM1l2bbgrcuC3PWZYNET31DroeUR +GtU2nHaj2dczLHfcN1/1lwedzIUkPU1zKtcEw0Osix1v7JVmSdz2Ypwd9X4aUJEwUAYMZYvOCE8c +psxYY0JVUbZEpaIbYEv09QCKs/dyrW561lSQBba+fgPkQ7Wl4UnJgnkYraHgtxJfr0YqCE30Xwlt +Ux84rjG3ycqmIDX1KCSwfoOCNhlTBjOhMFP2X0e+zAinn9DXDv0aMO5uRrei+MDln+QX3of2BlEu +Pfre6c2+ov7uhxvTsxgHQ3klbX+NnZYYVbw9LQM765L7ID2q+kUYusPC8PLdMEtUgbyYEbDSe+eA +ThPe1/QxB/D4rICuqPwkJqY2VXxv5mEfxmFhRscVrjkGYCZ9f7yo6Q5xmKKGIuo1L7ebCVWnxM1b +bsunVUZj1EhxTnasAQDNFYoQrZvGpiamDAp4FxeFTLP/f1vim4vRwQX/wrf5Gnp8DW+/cd1eLcNA +6nGruJhjfcgDBrHwshsRIv+C+r4xa8ldEFN6Ky8PwfVpdkPEuhz0aSwt3JdDDzq9MDHEnDaiULiE +k1eNnugSeHZM/PfFtHNj9pVNhiNpEOM/fmG+DnhWJLtangdBFWayz9b2K6tbChvvN/rezJUOihch +34bt4mGmy9l/pjhkST9SfQ1rLagEj9mjEBmaCb3XuM+Ymz8Gm47kHnrFiJOrBTVo9/kmP1LH/big +PkWk2S6tmWIck0fyaPb+GHTpo2Kw1v9l7M6tn6ZcdZwHc5hjAAtmifPw5XjVAYaroshbSct3Ulu7 +cq5LhuV9PyAHoARZzV9bDZQzUwO6445SZpik6vjNA5xNxek8l0FmAL40+khwIo2R6IfAamHsgKDc +fBiFI0EzJmOUqOZauUmwfHHEc2rWGqo6vK3fyDyrarRUYUnZDkqzopvUY426LMG4Ubo3P+OXwhz4 +MKctJmB5a7Rue393Jeire2yJSx9BltSPe7j4UFsb8O4kljfYezLbqCR4YzMqeDiT0E0LF4OhYfnv +RUyk2O4ACZUgdzusnw1IjcSnKQgmbbFcuk7opk8nzEObLBH1/VZ08N5onKUDI1U6wJFRmEwD5Syt +V9/ElzlCexwhhuHJ29sTVpuOamYtrFC9KHJkF3cVM9hafRvItJg8qghK9S9Ju3CFUuUq+6Y7f0YU +xkT6hxRJUr8BbXkoXghFXGxbA+VTdoQpT37AebqB59trsKtKVA0xNAIicBGKQXrAugKRNTU8u4+N +TfrYzo3I0rdE6B572pZZS6SiUaZ1XGpBhduqRtOumnd6PafK7Wub99BjGFJ5Y367oDLTJ04yos6J +aF5gf7vfiDDZGThWnEmVJSPM4x66fer8MXkU4je48h9j4Cn35BkuMgVlVA1NoLDFdq1/yO+WNtwI +pfkOlY/ss0H/ZXp1l1gA5K1AiakRxPe2j4+klHVJ8b08uNGtz+tEgWMmVO6KRJLRMDNnmfdBAZxn +eKIZu+VyRA1mHjmAxVKKTAZtT19kErT1Rsu+glen4psvmL1j0My8UOqSoWwz3YJXAxfF+QEDoxjJ +rWUBbmH7pSRYFAagx65vmmrplahe1n9wZxoJk/0XOk2nlA6kNEFsKoFiVDbgPdw1z1UeQ4/Z3loJ +BT354F28VLtCjOQ9POvtEO5oj8t8Y736rrRFuuT05+z9HBTsKvlB5B0ju1Egao5TtdVNEdRzWuAS +ofYoevq27tozK3eeeYBQCdtboRUHIUQ6mK5pozRY5W4tRL+1kdMJm4lVZFMG08lwWWUZGsMrRrD0 +HVShxXybTDHP2pA18jo6oLjA8BIhPjbA3S3BUUnS/sGvScxux5azECras4MBr7KdGUzjWxXziuUK +/Uf0P7JIvu/8UMbl8RjgC9bwNARZxc6/lhfNUaefPJ2YbeozCan6YkqUIn+glbShmxcEdxXBqwtl +Fxgmen5tLtIQgBU90wMKqLFgW7FpilpCkB/7D7eZuhfcOJfg2wxPKkx9CyP408wLCOeVDEVYBPqe +ut41gkXjUwt4eoFZ1TZdcTOjQZeTsuqwxD+JpkVasIIujXpCGULwSu/QEbucEm7AURGWY0K2Xdqh +LR+j5uqlE+DHXWkMU7NZndFAvVyJtZVs5TXdlg82nTif7+lSjqj2sz2JMwqQMTUnWoQbtD7eLU4R +dxWu7DAn9Zco8cG+1mUOuwG96UprQ7UnkjkcSniltoyQRtlFAJ+MJ1/3qy9ens9nLZilxCBM95S3 +SpZBm8im4vjWjjF2yKc7Nytj8iWK1bKXOPYInxxDvvm8FVSiD1V6U7Fcn7mSfAaCI/JwTfUCHRvb +/oDNE80+BuMIb5GMNAEm7SFKfysFkjgAui0z3AWGgPgXcjOqJtoNriCcPX6Vs05CiOacmUdfL1gR +BPRWKUd8g32FhMz70C0LviVU7j/npVW2EMccJnsMpMOzDxb2CIkM30N0vA6q1VGgTeF0FEyGK7X1 +BynsFua4sNEEgEI0x5T3yJt9HWH63yLRTf3FMl8rY2pSqSttfns6vOPWm6s/xe5QIUnwZ6K5uj3n +RAAPb+6voFnX0gnDFr59p9/5lQe6bnoNZOo5H11q0ZmPgZpZHESW8G9jsZ38sm6ZU9eFNxij6SRs +5p7wt/qWba/V9bWkHOnOeUaCDGws239VTnBtWG73/TFm/5Ubnrnt0NC/n/Irontv2knNljBFauzF +DL8efFPMNnrcriQrxm1fudylBjKmGCbz/Juk+bzAD6qjcaoTIGzbeKdbyZfdHBJLczLQD7XjKy+4 +rbzeL+uBObiiKOwfMn/rg3HmrGh1TWaEL5ovnkjZmcl8j59I+kpeTdLY8XzJmKRHNWSHs3X2I9b2 +WvfxJqwEthyED/+lhlu/B2ZL8RRZ6Gpl+4Ue6aRz+slMIa3eYPheuOfVqHfyC4s2b1WTDv+emnt3 +OFtJGxLiUct+Z4Uc/pWscyw95AuG9iICW/PJepf6kU+SnnGArUr3IU0MqdlnECu42853PKwWorAG +Vw+C555anUvuRZtGUZdUDhJ3b5TbtThvF6kviiqoNyHa0xinIJ9ha7c+n41F6d83z5KJ+POD1llW +LffdZ8fdoTJXnO2a1O4XNf/dUyigPI0rywzCaFzugjNGWzraxerT5cAXyaL45rtDmE3ph1zIqUyp +rjcS2SCqG9C4wD9njP0J99TVgMY+liIUOzvIe5t5WqayGPa36VOBH8F30xVXxbbdxgj44QsgiKQl +a11qS/dxPyCFPEYvBywGCCQG0Mm6bO8Xivp9s4omo8qU5J4EfabG+E5HfxU+N/Om+axCpbnlzHPz +SV/XUW39OnpXnVGSEMt4ULqDqw3wC1ZO17hjwkH60mHZQTFRdWReeCAZQgkPJKZBpTCiEhPuHYHN +RlYrxShsnfcutUilPT/MvP4DFaGE584/amFmQkCqd3H3shL3xntwxURlHpL6u10Z/YhyuUoVJKkK +bWdRtWxqIGAupEfxQp8C95gA9ydv2jMagzjG3tJW1eJim20WJGDua5JYIpEkU+Ap5dw6CRasEcQP +jqjzcmdBnEtrLcCoeC9Cvc7aDGmrGDFu1bFjucCPcfuNE6j8XVLPZImlvPemojBvusyIAHciTUTD +7FdNrmoUGCZzB7eHgPqiPZ8sruIEcSIpAZIAe4hOPZjEsna9iP5+Fr89gAh5tipKd1IbwCqhUT39 +tu4KFwjgqQKtPt9xV/R0ksAeEA5h/B1i57W1F5gbflBGb87M+xceFxwvikUChIsM0dGB8iWUmdiJ +jreNsdsTbKFTipKPUWzCkb8Q3hkjA0OW9KyaWMgW1sFRX0GJPEh/7aAjQPDKzTgttGn1b/QQ2/sF +CEyACO4eE//XfvLDFbn/mlRptRjBh33UaXPZeSgBpeBXQXM8hl86rgukOksKMPa/o4sMuUnBJiFW +fIYqaeOI7yGjGZkE/ZeSyK2SAIPnqXfYoCFEYrGMfW3Wo3K3S4WzNXYpR2YKg0YudqbfyP45H5vS +RC8YuzCmGaR4u/OzaDQ+sFXMQb1Bbytje8v3hFFYwsMxwi6NFcoRVnechVD2WvCjOUQZr23H8NsX +MPC2CuRsi2cYXoQu8V7D99giTVDEFKutp20ySG/wkLDDq1B8p0PzqTaII347i+BV/gopsUBSjAVz +9QLIXAoSmtbkZWEDDeeGCDPZ75+JnuJVqvqQdsMs3s5aGJ1mwIU6pEPm3omh5fU6XSTJnDj8RreZ +Lw56KsdHCHXvX96eTaA44K50wZaa5lLsLVRTgG7ttAgZ+GQ/q6avTJWmvB0AOwPDtagunYKUub+b +y+tJuY6J//fleItubawVg0/pQAPIHZPkZKwlmUJHZbxcpFhZIR9EiauxDGI6qQdtnwFmUTZMSX0i ++ibq+PWikx01IyNRQXbWt1cWJCFiLIUPMlcbkhQ4LGIyvmv7D4zJOtaxhe1yXRVgmXIzDtBBDUcL +XsLo7xSTvoini0kp3nSpMY9GBD/B6xCuIukqi2/YCwbwGnPjsxgtK57fX82oqcu96EF5XzIeD/eA +RbPDWXUqbv9oXrZPoF54q2V/skF2eBDuAbtj2+88HTu5ROXA3+vshwwOCYfxlcWduTdg/DAqxdkj +VK3BNSNY/kHxkVVpsIWW7ZijayWLQ332xyz54EG7P1KVcjblYZsHYlM1eyJJakDMO0kBV/eCjdRa +06mK/SA2WrcP7mFzAIsFRxfasckyG93YJSx+c2cG/XHYo7j4TjHB5z2n3FE3QjY0ebxH++RrAvVS +YkyVhUtkRpXzD6rq0A63mAfJDo/6AGkk0Ni+1c0F8NaEOYKfhfQv3t/a6+twSb3nE7jcntm88JBE +A/1byX7h0cYDHZ1ww6c4b+3fITrK+LQWCPo9f4zqlFVlbFyw9Jk4EFiVjqC52NUkz9U6wqGgxbWi +9YaDMCe8Uc3fiboDHkKgQCYURqI/Hdz6frITzOwA1U9NCGi1eVuvuUOLsV3Z9DCUPZFhgNHT4lcd +k7jeNDZRK8LuE76V7EVBRa/qJ1QL9C/m1K8OG8AVT7qYQ2tcOPXCjpmUZGJ+zUFEaYb4kFXMHOUR +p30ZOARIoAjFZruXDCZaZMKjDPyNQiF0+5MvQEeyeYb5XAaEQU/Bk3SB/835XO2ELiNZNlygOJr+ +S4VNaHleCu3FFY1ABCIjjxgOjadaNMExhiJ7J0rVojLkBcQXzCXCR+uUubneeSYHuVJbIklXyswR +JCcaMMbF4tj8yC79dlzQRTv/9X+Ybf00JenULM+57fvLSWMnqPL9oPsaBNVSD4NgwV/tv8OE9Fia +wzZ0sMO/RXxInTLZsjuSVQshJxbOmn47OC7RnqQP7cWKrhWb9t9+nqT40lLNJ901gGkJBhqMHZ/x +/KBAsWajJ+MOVBMHJ2PaiN6JTs7qp1FSg8mlzgo63IjVrqSDp8d9/wSUuvPaDyivihS+25XjPgAm +5wmkg2Nuu9IlvFSj2iaPUmJ3Dx9s/BuJ7ngf72igOyjfGJsaJ4K6FFdFRbroOlep1/v0j/LLx2h0 +0cLgUXykEER5dnyevsqI4S2EqX9YH8yrvTs1g5l1nathNrLX9yqzp7tcFo87IUylO9hHeKVQyvqp +aUEFcRw3okwq6eVP+NDWgUepFxtepY1KHNffn3dkIwncPorO/sHbnnXkwGKWNkgS0M6Ueo+nA4bg +yc0pIHHKAtIuraIT7HMhbKXiCDcWvcQ6jznftGUe4kXOgzaz2KRodWNO1rCfiJmpKm5RSPtWvMlu +jHPGO3QGMGsZOkBu8U/QpCL0zLu4x4NHtHc90J2Pwa2gax7Y647VD/6dqW9zHNeZkyLSQ8Hdu1d+ +909KYM4q2XHk8P668eUiAOJ8HaosEhKagZ+oZecQ0PBnX6FCX9ousByMB+dDBccrBG7iXYU1dOz+ +H+ikYaFW3zbsFSjMRcT6H77CPWDDu3udH944BIYPwrMxFTTT5+B6NE4Ip/tMDOAxvtP10aGU5zEF +Piv1xUo4+HAGybvTiOLAqt18+WdfiA39alhIb4vDToA77h7wE8XGYxzqRSdOK2TRD48hO5OT4quc +uFInI0vguvooS6PHEqPFjH3+Ngux+lkevr+XmJmUJERJACJT9Mko62UXbMXzDlMEBsIv/WMpm+t9 +52OquidgQyo5qyGvI1dcfYpjfUPmE4tlUybjzmAEKssLXJqVBqgmi3s7FWGBtDcJIFKRPLpuijez +4JpeQZphguTgkpMb+EhDATEaEReeuL8o9hQEY+Ef0LfubCa1DgkBKfzGd/r35sHZkak/3dXbhXoE +zH/Q1aitGx1RPQE6iTyOKSV5GsB4gM6KEc3o8vGEwcKoHD4OnXAc8etARavaXfkZWF/GP/5uBYV0 +AjdNTty+v8Dg7c9a3w8SSkSL28BzLLViSahcoT+Vynax5V5Hyctz7QCjU+/JKt/ZoWcj76YVFu8N +RKXFiFkpMA9pvLqgSESKUDo6/7A3nVeP06qR7KHts0RPsbC84v3qCQGnzuUxIlfh3iDm3dcmSZYa +EFUHjr7TQPQNVC6I/r2PvnLFG6aKORgduCsvF6QA+lZZq9fMBK8ysMy4uuxsmGLa9Dl3bEQIWot4 +0I9TqJHCNvOwCVD740QmNfCFnckacmu1mIcYB0+trur9d1uGuBOtX8mv4ai+OYOjvUyU8WApeZbr +UCrOwZLwcOe9gUhhqWAKTnjbbwFdnXXpFd51e3v6uSgazxf0uwsxxU+5cGmV7bZfTD/prs/zUVzm +OqSUkcad+Qf4WOfm4iCkh8JUttT966ryu2RtXosw06tOMIHgQCgRQeJvki/BC/CACDNVk0r546nz +LQDZmqxbg6qF5U+AHpD2WTZW3YEjD7lMoxe9jVo4iV1KrOiZD7cptuS37iRE8lmRN95/R5vN6fbA +7BN1Y/2gr9xoHdUrITbEf7cACXd59U+gYXmyYOZIuARXoaeb4Pwng6fHFSi41horKo1P+r6VHqyN +ukR6rySD3w0oa3zvvnmAGXCBYkWnbPvv8KLXJV+5P7MP08HJA2LAKCYVyxEFICgGpPoZQhV9KLf3 +1shRVJEOKnWHlIVpv34C5Ej/9oJrJVkrKaeVyDfVR9NOmLQpz4fwb9nRif3vqOrSJt6dikm7YQ7d +7WdxdcGB2R2EF+XOLv96zMkygGjfei9R4UzyVA14lp5XZq3xXgLBgJWiOjrZrGglQeYVrl0CNkLz +GBjWz99AMImMgcpJkqLkwqbCOhWFjfhyCc1hXAn73OYJdQ9EpIdajPX0s9kMp5CMSpdMR8H1LOgZ +ODpdnQWhedjgwJ2QYNUaP1S2u0+46tqC5FZoR2gkhPAUUvPJcn7sTTf5KoJRamDf01AO//Fz6IQF +C+epnmliQxnFfZTAirFr4utY8Si6nlmRShGijAYR5N9+DFKMWXKtE3Jxj+FG5Vg9RgKmQ42o6T6G +fOIxNjj/lAQSeErfvYwJ/B7zuHjZ1nn7o2dZl7H4WX6F4KEnL105hRh7+jF4/TQvz84uypdJvZzG +RL3wWIMlYvg+zNSMF9D+VssM9AbbXOHcJGw7pfltxJhcMCpqmYEXmMIGL5WuOrK1fr1Vha7arvPO +nIcZrm7H4JHO2C80WNe8RVdA5X3ip7V48mpgP1x9ff3JWhUHYTNjNX3ffd7GmjAb8xecXaFxe6mG +3+QHybDlNFPFoopqV6vopWbbnll+wPOohX5WjAYm7YtPUg/vyKbTf7jxU9A1VfyOdp51C8UwDWjK +u/YpUXRvQHqoc9jOumOZ0BGqnWZHgRJiFchRYw13k45d4uI4rrPTGikxZelpc+kr3tU3c2/78IGl +J9IuLptqYP+fZv4AGpSBx6bCQ7ocuoAycNLvQdfnAZwcyAl0Z2H6vrUtY0p1wJMTZ7qOe/FW1uFd +BDeZL3Nx/SXoNv8QUUKWeNuvvcxHt+M0hEK5+8OpkujFvv0LkhDEVPQMoqB7JSAZvmEH6nNZLObA +Y/gZ9UkcDBhZZrP0Uh2UjRzEqPwjaxixHJYthaP5y9qrTQtmwdvUdL3/RELovfhjV0Va+/7t0Spz +6BSAL+pyX2GNwIcfVUHEV+DeP94B0OD9cm+hSbrFxpOmnqcjbZKn2FH5xj09tO6RF30X/cGK2Lsx +4v4ZJI5Q0iE6madghXQ9JYWPAHVR31l4BKFI/eXYsCuhv6fVUKoUdAcJflekkSbJhW7La1v5iLuW +p3zUwkgksGOqnWyvGiw7yd9Z2RfyVi5hqGvOueY1V4rX+EPHq/cfr9hQB0NmkokiWAq8sCPKDJQN +rXK4yuBfTTB7Hhq1OMGfMKZNnvfzV1l4kX0x+acN2PHTe6iKO9wc7P3Sy+juv4u5Fp0rawYX5rDo +t2l+xD0E24D95Xr7fVxHnMwOlWrDuexYgDR+mtzy/YqyzJO6qWLEeuI+15oJwyTjQah2NZmCuJr1 +nc/jtKJ9SJJOAWJ3oaUgIDQYwHpuH5cykYgYlFQlTfIbcVbaOTssD8AzX2rfD+tIZY0MxaNrED4c +GlqByAF8bxksDgmESK7OXbubZbdyFi2eVfjx9AcFCx8ki1FNZ73C1w9vifeGpQM/1Ixp3JeIsUBh +EcGsxV5qW1CjxUlREh6RpVW7xatlnwUt0/Jsf4/b+HWzAETIanRCGlIJtvVBBCRcj9gnLwkk3rjo +9g6De5aSfRi3JKVLCpoWkFHXhSv5eS2e87n6gET2oM0AxwHq1iiYT5JsNsN4xFRAcNsMNyYfYcek +8MVOAASeT8MBSHGZ5d5Jj/sg5JOxBkCq0dVVqdoV2MBT5JuJxKAE9N9TgzDBT/U5Q0ZcckiaQfFM +nMX3EStZ8DdfZNtYykGNK7bVKF/jscDTICWbJMEIKnr8YXH9vMaKPGs9AkkYAb6j5NNXSAnHG5VX +Uyc3Gs2G+QPXMvoGhY0QUxxSPVgXCd9zZMtH1rMmu2VxTsxW1lJYZ3W/78olhxL5+W0SiirqEx1c +WvOVyA0xykMTVgK60DdEoF0jCacM1vPBl+4tUlRYPf9AaG6FHlT6zd743uue7Z4ZfCMGVHFkjh8y +GChFonFjIaw2aQZwGdC1XviHWBaMfNktVgQsvPd3ZZEylB7fIFgUnO30yVVLQOb6YJSCFwpUOLav +KKxAOOyHDGtsewKdY8ixfUMs/Vy1JlZtbCyUxXKFIjraSpMiLqmU7xvuW1s4UQPR3Amsl+9Q3qh8 +tNgdd/nHgz4ktbc/TRCrRO5ggjjoKqXicnnBEvYjojsdwQI+xkmQhrmNFbPyzv79WWGc9rrt/cu8 +CVb1iN94uquisnOCqYFvKraKEhKum43nFMjQFrqLmXb8nhcYtG/u0UShCLr7sCE7e/k6U/N6QjkK +L+j8entt5zdrxnXfXLI70JlIOOgbwfdGnezKTQTsPt4a3v7wblebPaTjsCs19ymF7A9jgqccuFkL ++rR9d0JC41D6ARUacPLCyiPkJYBOkEsrfp13wosFXS4MVYWsfIcGpKw3tKXCCbCBQBN1QqncMuRH +zl3lUuu83l0MHCy9SOZctNH2YelktkMkh40wiACacisJCfhaOglDzbZjOC+B4dUA7Q6juxCKFyhb +DV6SKONDEoVOJ3PBNJvvKMCXdll1nD4MtqceZv57Y+29DVrMe3D9T4quqyKVfXiDllEgcX0dO9Fd +a+siGSMUi4B+LlS19R+uhhUC64hL8C7pXv9QX4hpKS5aCYQaH/9/zOtkdN9lPmqOIdCYeWxT+coA +vjBtkAU4YUdCys9XsAmdtTNQFII9BavFUzoBfFU2xrWd6OeCguJZY8xE+QEWfpSoAQ5ae6zgEGlR +cW7GId5Tiik3mn6VN4Pdf0WvSj9memVp6B+1wl9ozhSDJlEGb0Npp3ZGMFo188zviWFXFyf+j2jk +8+AL/94SWSkgPGUNUUBYCz4RxNLg2qhew0TcCgs9sNXdjkFpCY3T8LGPB0/x4xUGIwkNe5ne3KCf +3bgoFEX01U2EncMYpOp3fJ42LHDjsUFrDTTw6p+31an4DJeBSLEQpwUON1o0yotRmOxhUebz9K9T +y5Vxg6N1u3AZSQ73K/1xy5hT7DJxAmTvsHCPfrMY5mUJTQd8hwhRNPVE0HVWytA9wOZpf2yC3b58 +wvwmEebo9rEgmGQfdhtCUprRq6vrjG0XOSIiGZLZbxDibppi8blXt98OZ+Sa/HP3LFCyY4lP1cJd +6MaoFgQeXe9aPuiLzG4IdsPx74Ydy5Ob2nzFR+0BcqHB6aQHhzGwlzWnItWTH31O6510qOOj97ml +u+VRbfQm2ypTZXtMnOF6GSz+VpRsG0JZ2ySFYymwNxzakHIIYNC5t7uncAUx54QfvWqxpNugjC4o +9LQdNVUWwmfmFynxZtYtOdVfC9PsQGkxR77Ui3ClM0EWQYP8ZTKb654p/pYKhY3afZRHLOPoHdgH +eWTmdUwE7aBzgEaYrVay1C7IdGYVQsXMAW5m8s/VlO505FZ9c/do0XDR/saNjzZzOIc1/IOBTIEl +hvjKAe9z+V06RqQ/5XwuBfIq1YU2INi7sax9Y9Cm6THyXPSuPSaj02kdoYXwe1byNmn1jPF1Izit +vJZ3KG3uCetSWBOdPn/vBLwY1kdPfD5R46zJSdi1iEy56ecdFcTKqHHtIjiEajjfbLCfJrLL41mZ +yli/4gZGPNd9AZb/z2EWklGG37b6zprKQKFiSWbgShYHvbce+Eqpfa021W3J/sow76Pi4exbftj0 +S3fSfbLtLU8HuIbTvewgxAwEOMMdbSJZVNrMcvFbcH19S5+6crRrXoYcsfl/fECiK8oOUntUv4ZC +lB4PlrgIlAQc0rVCVoHskyXdzmPtD5mTpmjKfzuBOZ+fRH9j73I/u3G4nLid0oHmZHd+Pe5tPRQg +lvvUhPQYUd4jlH20lyIrIIT4WATfFaYVCsUcv+SsBfVV1+mjGz8AHbcrCHyI+O+W5CFGKe4+zvw6 +WYE4J+A7gKRB5tK+bwOQCZcfMJLm35Wr2xW5vDTLY3fVWG0s1+ersOULqPaGFjlycOsNMaUZkXjU +tRdUHOIxMBRFwcDlx3bfNd0tzH75zw10FiWVx+o/7zsy2IUBOuPunAHqRSjSc3osPHNaG2BT6r25 +xnw6+qhw++GWyZyTZY3VYPnArja91rWUSNVjZw23yGYJcbMXDgEhwl6mzppOholbcnjs0eWh+RyR +IvIINo7fdTyGD7IUtO6F9PhAGw4lR/7557grAVCfAVt3o3sHd5VWqD4ZYVhp8xFrsVREDYZyIsfX +EoHQAjzOSMUEcmHIYAdzRcndQbtRSks6+394naXAEgyas1pQ9+JodNypJXbTz94l6YpkOGE/ew5D +f1jzdurFTOSOE2XUCIh/9OL0iw/RrK0h/x6eQafeYFOwuLsfkEGj3UiePIK5m2bMbOPYWTC+stYw +e9178vvVxCgPQPdIOndivbdat8oWadzxSKK1hKyYZ/X5BdgZ6Qno940Ppiv2F5oJR2tNqnApCP2W +jUY/S/ZNAdTelq4266c4x6TDxJF4vwylDebB7TpX3G5eo3dSUHHIzNfkTRKLFg1sP721UhGYftKO +hIPLD/KgNfHMhDbH25vVNbpH4AwnbmVTESHIYXwA0LNMH1rzWQGBodQsgYyqiRXmdCO9pFJ9nMfQ +8YrDNP6UYiHWjFNPZ84h0VNL0asC3PBMIA/c6UuY2NlME9e5LApFUEPU6sizGg87rCRZbPQm+1hr +Sp7L0f+ysymFO/4BpMXKGkqgR2Z8h7Il6MssrkX4G7e5h02ENY+CQoai0HrIXCjnlpVBA7jx7yu1 +khXAh3pNtnbTQVlI0amzGipp2lzUSW1O/ESm1Dv3NjpfjCeN/Seoq/QsLJ1RuDbttEwKLHH0kkdj +D02mrGTHT91yF58Rr1prJpGPGdzLbA8LU/CYD/xdUs9Fdg3wNESJUrJcQrZn7L+3xfkSPwjuCSDq +JOKkelNTtsSvbireDUqLcMHEcAeSc8oz+zbve44Wx0bSjmJ4vNlsvUEsSa3ux6i5cscwY5+DAFXU +n/5bkuBdnDe17xL7FYcGIpu73ohdpa95RXgHWp1IrW8P80U/ocDTlc7X0AsXBHUFzC72VlR+e+u7 +1p5ASlVSAOJomzxD0KLYlRJyUkClbVnmO4frgCPhq2BzpzUvGXUIUz4DB4zd9mtE90PosYlt5lnx +HIVLRIpY/Rs1ODuNDIbg0nyWZyw4H6qSO+rLTxBT8G//CXU28lkkMLVYWtGYzL4FnS0mkjsJrjrS +Cl0I0FFuZYrVakNnSGudy8uP+t9CEwBjxrw7XB6yJ/tTDZkaOMyN0IdMe0z5Ku5xvP1pnkyulBVi +r6b6onYREb49HDxtaXv6I3+6HD96+SaX28RdaIiiS4VILqq3cStm2CvJR+VueVl81CY5Q7u04Mbe +9CXSdGwd3PyQ6WiAdoAtBFjYr3nmA/dIMdWJdp/9FguzH/OE2tG4rFP2jS3obUsCAGCbKMrDo1oq +H/5yns4kYM90zCF/a5J3y3CfuDcySEG6SYczmsYlpXWBCUK1WNYylh1MY97msc418BG5f6sOFXVn +eOnkqdwFroapf+upnl1h2BTK0Fa42RAuvGsKdrC/p/RvGESGR9/7r+Ytn9DT/5RMKrwZap1n8VjR +g4yov8nUjnigFhBtEJyCdW6Qw/HhYSuG1/PAIAUiTxvUywqaYIpQa0j3wA82mWrTx3TPJGKPjJ4B +YsjqGm0uaydkH6iYSqPzlGcyiLH17hiYGExN9on2Whg3OVf/BhN1HPQEnW8msIzyjooHV762MiVu +YuYlL6gvITQO2smMFBMYgzffMQO77m4Gd+hkvFDiBDt7dxL+sMDmxVYBZcMqXYNnex9jrQOQ6ACs +CHxFHR0hdQiv8kW1vFHjkff2yRunjjPxTPB7iv9grC5XHYlF6Ct3/IhJHKHY35pObtKoWoanOJEV +gV3jxpYjNd9CC5b7fCwqfeKll2K7QouiPhhY+ZF2vhEEEsqSkIdLpsUyMizl4DcFAwHb5o2hJcFM +yf60ozS2MBDzCYWJ6nmyOiyrYN/SqYt/r+6B3VJwdSbjfBLq8CIm5y7iwQzHY+7xoHvWvoERFNT5 +ouA9SspgzhnR2KTKlwDiN/fUCPb3lub3t3zp6UMDRWV9r1T2qT6vni6vIh146JohVS7fXZWvrFMN +sQr7WZp/XgJ9G5V5daAE6+Ytrjn6zpBPr4ZvNPxN9tNv8v3nTa1zxDAjKjG8dZFKMLmURjXdozz0 +8S5G4mD2QnG7hGy5gg1IOSj7PcuNBYJT3Bz2NHwMHH9nunMs13HjpyOG+a/gwH2t8r3Tm5lcuOeX +jKWYaAMyX7FUaEi1zrMMK4RDA/HN7tz95MR31T4EyPTTbAOgcxeQh9FPb0MYsPY2wjX8ctc74zmr +xf/h0KSa4MNNfql3HZhMeVkVi8r3PsFJAcBLppj9wnald8rl2H+AXG4JfcdsiIWIgWTnsmfpIeOx +uGXUXRvgyD3B6iItBbpqxvfbNtr5iOKX241282lb3wruw8oXre6SFQJFRjjhSwt7HNUfS9IjzyMj +RgBkmrJ4Wyp7RwlBj7IhCKkgRR4YRR/MIdaUh40eKS5k2cHrcQNLMVag0a3gXYEmBGBpAuHRh+8L +iXvx3dZg5XTQzmsZTSJ72c48S3jMbTixHO//OKKIfcvxqHa/2LPeNQibADDl/ZvvojR4FCTMeskj +7ii7TVeBzkB2uDQUEuNS3HZYRDthWyMHT8A7J4XpCV39nshTcaPjHn9BQT7IewPCcRi9oBuyLYAn +qD/ZJn6W3OKIhAWvJMwSXbQa7yngMqwW7aohq+pUIKApgsMZ6b5jqkbmKBKxvrgG3ptM+xN2lHA6 +2ldW4onMNRY5KQ5r9h5/KKhDaco7Ne7ZX0jZZNqgbZXGq+Yt+9efgM+WvxvaYepdffM0cN9GToIN +6i54JIkQomYoPv+LNTtcv46Ta3kXWmWwPz6beGHOX5EJyD/tnwHcp53u0mXEGB/xUIiq540gdfe4 +lvGCp5FOegJ4q6IoMccqnyvfLhXno5lNXHEJOaQ8RpmT/iOc5930Z2jFqJqTnzEGVLLQhoyvjtKM +ZrGMUyHNvCTN9si+4cGbOpP0VFqFY3+euSn5C+rAe4Ut26Dzpj16PCDAQeoZAeiv5EfMOl4rpnfw +5/JcbVBPnYoeSFUajQpSkkVA9zbxt5AoFvJfQsvNMlH2w9lySKzAfKIk8fFIsE7Mhls5Mz98Mng7 +G4Kn14Rp6RreGYjehLjAV0S4d0/hNTyLOQFVQHXZhKCZOz8KCXQ4OCNI+UfuX4WFusPPT8Db1asC +8LDT9v0vItQFkeiUHK+j+AjkzAQg7l+b0dzTOfuIzQb9UNPZut0xNSIe8Oe2Bh/l0Wz++cfYcnGG +nSWh4ntVwYk/KpLkrp/DENI1cyBO3p5l0bBKWfph76YZ3Z2P6TR+Iea/U3FQYGKC0LBMUHEgKUw7 +GBjQxtJh/VefDC6HDFMX3zBvOgcnEYG/ZYKMRki0Qs5YTPIbvGfWf4Es1NMh+cVlSF9crbDSeCAu +XYnmg5vq3GmBi/f1zyxFWCcPYd60XJd2LaHljvDFjY807M44zLS3MWXKhz6d0XMEx7CGL0xkJj4/ +JFJNo2ylV+JRb0/eXxr/BTNHZFMXdPrpOT/Qe0z6XFfaASeXAZf4FCcPbKt5gjVY684BQYNYtbLg +Bz+wTaLS9AdiVfIIc2WaBbEvNzhmmbiMbLeOLhOWkw403o2Ei+mXaoJdTHZBlNszWz+cKCJlrhSQ +PK6q9xB62SwSbaeqB5aYoETyLDZGT3PkzG/aUzOJxYxI2GEf+MTGquXUIfQEVm/D+O4NzYgIoJ+4 +lRYNnFNpm1KDKtjDfcolPOjA8fKxsC/8splosBuIDGDZ7xHxfU9ikCliTxEGEF3TFnhoUsUlinyc +Vhmp21D7Uc2Lgvp5HNtxJxR0KvaVfndH1cHl3DT2yIitB7qD2WwobZ5nV/q0xi2vrwapIkIasW7g +F786iRFrTQfQX9ZFLx8zWBXL7PkvJoGio0cFrn/LJRBrltkEQ34W2eG/e2bjQYBh7ETQrDd8L56y +CPMl7q14vSDRWPQqxDXw1d2AOTHOKfqP7W/lpghdd9+mVwe/mZGzCh10sZZ83by6PGSMMA+As9xG +Q9EiNR2qfb9qU2JhnE0/x8Dxavwgb1dj7p7vF/xO3RRoeD7ZlkVqx5y/gMicVBw3ro/Ai2CDm50Y +pvowdZy5h9L4L1MJitOzBrhMX/cilXmMVmNWRNF9SWvWeXypb96YFeNPzea8WlkZU5a1rGmr1sMd +5lEXgpVMNJ6bve+Raevc3heUqO2OLsHEywNkxsvwkkPQ12QOLCGzGaM3dmAZktt/wfM37G/dBuMY +hhelu9h408sEV7eSI6kjojtnIwE4fspWl/6WXiZoXIMnB30u/UWpg6HrIEan4ajaqX5I1O+Sr6wA +i+Ev47RLL+xk0XdF7i28eZKj3LAowOJO+Cj9klPIZB8DM6SU6j9ULZDsYE9pQyzb7OubHAbmYz3H +paef2Jfn5jJGWhQIUFPbssJWbky0RiOls/lyiz/hngI5KJUReuvzCABSV+DtxeUb4PCRae1xdoCa +L2Ii1nIqGho8fb+Hejwd/5NA0joYU++O37IlANPJlzVZW6K/tASg3x1UjSF/TDpuqveLYFWqhzXq +9/LeF2n6K3w808FS34DIG2IBem+Bjam9FfFMcoBmC1B/0l+++rKn7posJuAq3ONUHZ8dmZscAMHR +4sJoIwWGYZ7olHkj3htqvJRT0soB26jmDEnegZ8hFmUAJWiUZhuDokdgc/03CJkWbzRSOxkFmqZF +x4ZoG53vbKcZ05eWf3rCxT5jzOLTv1vi6v4ETpzGRXWkLVs0AbtlUc/6DRkI/cAygvNV3iJs9/4P +9aUO9CId/IgaueO7+iGQBE0J3aThmtRhjGbXU8QFde3rTv1YhzMApTomESToTp/USbuXEAfKwgO8 +SxybhEIJ+SYlbqSP5HBXYba+T+wBNofOJTYg8rVyJZnZFaKxzsad3eq6XGVD5DaE+MRrza4tFbPW +efLEDJ5HOL0aX3dabfhBS+Os4bBoM5EhtfK+zHiW8s0h3t762qSxYCQ5v54KxnM87LgNVFy9uzTt +wH8RtiLh9juPOyVFy99c/kKgjhzyod6i5EbQ6iWymxR2ggioYIPp5hQPqr2Gkbhkp/zqPL0dhxL+ +go8ZqRo9JY1HIWB6nGOCpeASApmOOIlhRzXkp9QJUiw4PrwoKGMJsx5c/UzdihhRCcom/sy/Yi4x +7cN1NN+0Ps1CBZHK+2dj5sMl14U4v8/KCwKCus8RbhMuw1l82MmFgWb7gNeQ0OHzbeMVLymedF0U +lKUktoSLF4lFziHWD+Rb9xTI0pHu91TM+qK1c5Ao9rodjmmOMhuoSjMsRqjoq+gStdv0+QG5pXuI +ff/9qELrpvcfA2zwTFiTHRVLalgokVIhll1y0jSHF3Ntgj40BP4I+l4OnT+8UkvIN4Bs7KzaYAYv +IUVQntOo2lLWGnHAJh0X5jw4/VUMAb+gL7Wd6pxTo5G611T11S48jdNA977NDssyQs1vFB0nrXGL +UaWo+eOmWsI7Q0qmmED/2dP+RpMUJ4pZ1mH158P4suM+5KhDv1x9dzOJ0awQeaKAWIeTZ3OScOEU +i4u3uHR2favlXJ8GxPZHPjhrWRHSA7KioF7vfsePYHQjPV0sN/zHyr6XerJpoBA9WxbT6yL9s7h1 +qlFVZRgCb3KGeqqSdxukZ83XJd7NhvPp7xy147E/htXz9SRUilz6LC5KHIDBQ/CaT0lunLQbO3Dk +pV+rize/W/8AMlNCw8AQDIKncIOXWthZJTDzUFSOy+CotbvZs1fqzvS7GW3lBM8LZt+kvMwYw2Fi +b0wM+m+3oku32SWg/Z+5qFBq/ppRH+u/z8Nc4oFljZdJUiXBWtJ6zB6bT6+l827/MhxZKxCEdQQY +TeKmr5hQ77fYenE5hZ0YYkjIkOjI9cXA1rM/v+8iqfa2BtE/JWxyn+j5TeSabgzdA2SNj4SkP4m/ +lg5oB8R/kAEEZQgTUUlmnoeLdYxNjOB2WSGVHIg7jehKK2F7ZORS49ffv4tKTm8XxTBlXhzKnLP5 +Vb9XjIsOk7SPXu4dSPDVbdOV89FsLtpusknGn7l+uhYKZEe1s6SrfNzAnBgsTkIghwPB8bKkln3A ++pDKx3IH9EcZU2AVaBgoGiH9O4NgCG/tPzGQxYzX5i7B1p7s9+DVqB26RBgIyWXp1G07J4mCZxy7 +EhQzW+AS9kdxS/zqwRBvpIzJOeyT0ZXmkUxYd8LMuRf6WuWRPAqZ/8oEqW7yInowvAEKA0wn9jTx ++FbkF9Vl8hI8+86IDujt/93UekSbqD426a/Pbvp3Objzlv/IEsFHrp/m2VtYqU8eMBbszeoBTLAW +mMqTMQJLYF5ierh5fb4+TBz8oMMH/QsxeBCP3Rgc0Tz1A8R9AyqncE7m9vDymDYphRxUt8TGsdUm +FGXjtssI9YW24LMDY5FN/99IktLldQpsKqe470ttfaGd1E1sldqrS6mvq7wihzwnDSjtDWZsxST4 +s2O+I5plEp1cGI17d4d9h8HxUIAxCYu0fZ4CwhMq/2GVhU8AR7HtMCyreCFHCbDXsqz7qlnJy9bx +2E+k6Ao9njHKFBmjNdyv1yn5BHkxlYzZeW/wwJy87tNgwaKTQowSrtWa6JdecG5hEpJQ+5i8X9ct +4Z9YqHJ1mVCa6sMMyOLynWZQGFy71IJQ370wnPpYgWN+ERQ2ZmN/upGUc78NSC5bDUro99AXsT07 +ZUbZDdghTq1lm2s36kvfPzjAioe8izvFvkmYgfIkB/3e73NGStCDAcqkEHHoB0iPswqOUZ3Houlk +UTfM8bS64zc8Sxi/c5NWfun+w3T+P+FJmTWmnjjIOwH+cGqT37ZEKOe3eKGItaipdeTUuyhgMVRB +4JdjUdOeYnd4P9xiPt6b+5PlaAzOX4BTgKNIKkhgpUqpLgp6ABEXPXkX+/X7GmAwkbEEo4Y0QF5a +PxybjyWAto17bPhf3cpI/NvZvbH9S6RMvrJbzqgtuy0kGALDXz7ShyP8wdCwho6YozrgZN1LBsKt +7EaGHbrtGCqDgBFjrNxDx2H5rQOasD07pdLXzDxQMMdWaGF5O6gvWIttr7Vl3TYZXmxETs4rN6vL +iy2sYQA7HM5DdPieomi+HEu3ZWoE/ejW9w+nAMVZHeODCfzgxdHm57D5Ku8XSn/eMRNPkcpB9CHF +GBfD6dY0l8N+Qi1nsVaViptXN6B7qTPmB9tjG1v1raJwGru4V4LGTAvwLHUqCLYWjQ28FXqs0hkT +T79E4mBZrHDEZ8PX8YIR897oD0JZ+2zo445b4sgvNBK2LUJF2fzwkZc/8qzsQe6mm8JxpZ+iFa7x +Cqx+D7JRlOj8D7PdL8pFFHsk/j2sRnDDsif73NuVR52dt9klQHAbsGbKvLWatXK8ae8fiOaMo9Vr +XaKyS33z/M5TtaA2JUNa3l2xpI2HT+9PvMfOL1rDjZupsRX1TyjNzzNj8p260g7LtYyCKGlw/X2J +3e9ugrQAFh48xW8uokiWYr5NZrX5Vg9fMYdb4ak8G8o5Q27Y55nhgEgKb2sTXNdyxvaJVuHgj0ID +BhSiHGvfbV3rpn5sIx3eR1IXG4Zy7qpX8StBtIny4MXrXpwzy27UAl0xsFfGGuWf7qFhb7L0VSqM +5EOlyzTTu3+oeuPO4Gsm6GpcDxwGrORK4wBPzMF14JXBnegUJcjHu8csK4SXEnbhR2b03t1Bv6/+ +s6og/TnzajeJPl23L+y+pKdGz+wQkZn77Pe0o2PjFzzLjlup9MyPvfhEuPdvQLww8h09e7ZIfFCr +XMhUZ4fqjFY3x7gD8AvrU4il+79rRvgNz5WiOvJ5USv52NT5h41vdiJReoMiOI3HkrKef2lAnfSL +vJHXM0Ke7bsCOPxhmoBddzEjZgE9jBh7gvgQEKCJCJTDYTm4+P1gXLk/lPBMYTeeuhHdGPwpXnBS +wKaV7Gy3QEc2XVyN1uy9Aa131jgelLTvzlc779GAgxwBRfsG36ZIrtVQmxeJNhkcmByzpcczjKrf +W3Jk4vErtGh4/q0GJg5VAH2vFVpwIiSJ5g0SjaDXE8qkT9aMFZI1EEBmWggt+/wwKmlWunvGR1K3 +9Q+FyOhQadJzjmmBeVUs1bG3BEGSSfolyVhbVvgc4twWsO6ezzsp7bmFaaCS2bsRZOd3yY2vXBTX +nH5TEzaZN8Y8xLUpnGCE3DuJt2BEEDJjbJLjuKkjUCgbFEzBOQcsp6Z1HFrcz797Tw4h8plnHOOM +MBJayyq0L5GBkyPQu+YlBmsaKO4uH1QTL7xZJSzCxXwVtmaNncpAyXvtOAGKpI3k5/hfi/e+1kTN +GuSVx0WkU8NBAfM8LUASMCkptgobEnC2lrCyidgB5z4nysAB5sKfcqQYmWp7cAfB3vB023gChLTY +GGAki28ovPOhtS8RazYeq49y/p3b/brhUcpRelO8nbY+v64FDhZCkL09bQujB/NpP3IViwrEGsvq +8roipauM6XE096vLuGQT/o6WBoye5UgdPx4/ju/bQrVURUoU1alHTIg4HXkgYQqhgVsIPOm1cR02 +kZdzNYeJefkuayGXbt4Wzbd9l13GSrvUKhMtPP2XZ8yWGZ4EdFkMysygJc+b5fwmP2eCoegFuf/1 +aac3UvlHUHYshHnWt9QjUlrGI9ox/iegZVHc6datSQX++kNDEJ1mbTo7B1iWoQhYDv2D/O3dhE/s +zB69MwcAlcl1N0jdGnGeI5pnb88U4w+mN621qyrklVp12IRZ63wW1bFr8RDoIG2+iaZrsddji9V1 +SvDlXLo+gDVPM2KZfuPasSiPiHOeso1outqgmIFYQ1He9Y6r2NMlwsnp2qCqCyo6fik+KAyxJzmU +JtEmuJ9gZ/ny8RdKz26ia5PO643YdtgFMep/sH7e13lB5GT+aGDCZt09dxwfu+XK+SAEZyGlQOU5 +VpUkkepjr3mcaZ479QIqZaOg1miVb/6ovK/ZY8+xJwbg8yPEc6cPlq/rsdQ77iM50FMKES2GXn3D +41eODZZspiqFF7/l5ZkcmLOTE/ZRmumvkt6QnEbBZp/XonXdPiOFb7y2o6qma7gn2Dpr1SyneQMI +I/dfi8bYADdSAoehvPCjH8wGa/7VBsT8ct6uauo7boAqZ3cGFu8Jmes90U21Y123fI1Wsvq6ZUVy +BXo2ONTBA+6Z5NM8wH83EdNnF05z4+YWyoj6FI3XLj5+tpweaHSh24e8Kercex2RqWqQeKh3pUZq +raskiJmcYj67IDDEui97ujKrqi4fF63Jqug8E2BKQLQKYq1C43Kl/Xlgvv9WXDKc9CaAiBrqAxPA +PK+ULZzlrbREYOBZkOSUxU9YauKnI9/pu2N6XgnRcMrB7SLzGa5YD37z+Ob4SZWyVIyVHyaKl0+R +m1IRO7detlWNkCq1TBuJoHn6z55C/qEAru7XYXTHuq4PrkwmqORxvHHgkNVut8F0/JncWO6nJP11 +lCCQGnjXzU2N8nY3fLHDZ21iGvCKN0dGMbAMACle4AGsyvO+ZB7WKoct9SaCGNdOeCjR9rAiDkKA +bBDAT9k6Y45yVQjSByFA6upvI1KE4GScy4mILvh+qwXohKdmlvjzviZad/i4NiaI1vwAwMQBQdrC +K/7yZmpko4NtBb+c+CHydCFgQ4GhIGChSjvB9iWGHqZuy+mnFVVVxpNbR6gZ6JCFs71yonNutYVP +nGLC8J5xqp0Hx2cJc6huI2X/BkkUsONnmngZdOVWibuyx47wCVBF0SfbMflBFcT5EStWH8UAnLu7 +hYIEJQPqH7hSGbGgy+ytS6EMQov2lt/RDnwRaKrRmEaNGl+vO45hJ/xmHdUDhvxJdVoa2y2K1aaD +IroUqKFASWDbH+Zmh1QmelvJXdMhQ4I9iNtJMFE/r4aaWMSU3oUYsgMPngQCgLR846jKdaXH2WsY +vGuJ2aU0k/PFetmNSp2DZ3UHapWVUX9SqRMv44i1JovbnFZFDB1L7HAg97DrXMMbggzpDGbK/aZc +NfySkThqb3Hsdk/t+GcTse89LgMb3aEWS2CGnRjGe7P5zq5NChB+ayMiGl6iRDUGxqVUqfTjwQbO +RF9LJ1c/LrEhfQUZVFIc+uZQEgLhzFQAxo9zprnI7IKH0tEv3WET0I+tFeUjoJstv5+HmCvm6c2Z +RgV8yZeczY2gJzNn59i3BANepVNs7RYV54SgmN7NhNPyLPjfeDNS/7fxrFGA6wlWIaDu2eGkemo7 +K4/eXnJHLaVkXnQFHf3VVBG2bcyBZ1I4l6vuxpFcCpeTtKgje+Nl8grniVezpGYxPdFB5jjULpTg +DVE2K8HC80pZPClyoXWA6mjRdhOnEyZApxZZKR47OyJUQ2oOCsYqrO+6XMo69+kiRwEyH0Y3cP6V +EHKMP9r4qPGeMrmfzfU+LBIfqAxahAUuCHF71SicPlnRFMblp90Y/HqRCIuJV0vbWy2lZ5VQnoSU +uD7Pa1hHxwwwWiWvdBvivHnCBF2ohkL7kqNLhqN6xajnYbfBx/dUTMgp8QX6vTgX2Hdc/e2HbS5x +M1/3qGxKppdWXDWtjfLDYGQEZRob8kAXLn1gv7YMP0d4Kca/oXm6ZPeQn74M3q0sHc6RU1aAIWRv +HMh817w4VX3KiLA2gVanmOSCRnDG4WrdSLroV5Id5+3dGNNI8tr+nzAusmvXSje6kks6Is16W+0P +SgQC7izEYOQ1wo1nPZE/PWC3g5ITXeoL4CeRz+/LPQGQRu69Qf7y2eWTEgLUNAG3HwU3rm6NcReW +8l/tk8m+j3ggQcEJd5X4IfpmhADmxDNqq7EMykgAn7Jg6s45Fd3z5aGR4SWn7aAMRbdOUGrJY3W+ +87rwz06fjKhjh5ckeNPRcmjeRAgniO6+bEwOIFh/FOSiwfqZ2Ys5souBWREdLea5SVngJl0/atuE +opViCkL571R7DRlL+TxSHYw7CMdyh0Xtw5eK9zCxbRsnv+uYLT6KxMD1355NMQLscaB8WbDz6htF +iV+2SHZcw7yV18X9c+Qy48pneF7BC2Pf7pu+iV8dsXU/ZGBrpuDdcIKPo4Z+aasdyggLKyillFtt +td9tkcCKkCXXWdqx8kgH+UbVmmZW86pz76SdELJiGSXmGGORX4i5ka7kkNkLhpaOjGV9oYg7Zjx8 +zJrqWM16et7lFq6zbolpWb7Np3en9i73vNtB0Gh0du9oWLC7u2gPcqf6hy2xuDcKWfTs5lbIwDRP +xC18mN/yfKXQh7D42hDnO6Ql7b5/XnXnycwiFUh8NtIWucWvUID2XIFQ+7SEUiEFsHmpycKbHJjr +jpLgQFHIPkS04nYbvlF4No45cfRDKrHZZp0Nmq2bbnCtPHeFYrvbselhbH8rvpXN7GZwoChw3D8m +WAbpqx1erDo0QwtDYb3XDGD4n+mI0vQ7fFCNpdPCvyjMDNr7lJTy69730ZJkspqzAs0Guc2I35Aq +gz4jeGP0xLZO+FC0QQmNN+CsFge3e7F/YFGYmzRLXW4xM6ke+o0zjdiKus/I1E7pdeYjvv0p269U +FBdfW/VEmv8LmaLiChRYknFfUHDUxYUPPJLW9egcarSDQipRPF3N0s5OYseMZ4nKbiofy3MiSDSY +6yetRhppapQAVACWzKKcDwaqeTXp1KPGelR4DEoC42GxnYAHDRMxkZwQXDY5RsvxLMShxj0RyjDG +x0Ac3PbUfMJ05mWZl4vkFWokpXt2YI0xktx7WDMnKk4VuzI30nkodbHLMX3i2LsSZDjugzHn5UlG +Z75Wwxgy2Movbq571d3E7EHQgpBZ2KttHw16w6790Llk7vr+MCu7XRoJBEqCN44DnAaxV/jOMpg1 +pf46K4ZRsofJoT+BrKlcMuQa9T4erOONd8irRCH38+dnKVKpOuH4Hn7bpsH6H8dGFHMkR5WiZtvb +S17PenUM+Sh8UatEyz8ATzikCcfb5SMJ9fHoEN4PAPU0PcDRNvpZuu1SOAKis/hCVyHMS8gyJBKQ +GjEtHHe+6EXWTOxEcfBTPzdD0YOeJZVVLX8+SoF5DGAIBxak21W3XLu2PqEM27hLU/4TNaEJozUs +MaUA4YJwU2rruMJbryeVytL5qCXD08TJXrgMUI07RWo+HYbCee+ImZTXWRJNnBqwW6zajUY1ditV +PX5shwufIucnm4/QDrr1iebdOiqVKW2wMjx2XN84uKBFpQDS7OCtIggK6fdz12zRkafNlAHIAJyd +WgNdNz4pghjQFo5se/GEgBvuA357SAHe2j4TJoG1wjriamwVqgTg1jSjjDYwwSt1XzaPppne06Iw +RWz9XqFYVNdqsG8xEfYjPEF2Zj64C4BAXjUOPWECqjjoEePvVobbSwI1gBJ7gDJ1hmdR6vtc4/8j +G0QggCxwz7l4BOyxHoaFaUcpOUFSr4rFowcWLR/O7qEnlU81ZM5k9q+BZIPcydM0qaFfSZQoR48u +EUHzvI2XmLB5KmQXy2N5brge18Q3Lc6ythRoG40y9WHj2zWW7EqUe64BCArnluAPCrhs2iSuF+Yr +zJ/Krov56cXJ21aWlc3jtD3ou6Cq2YB2ZI0cshTaAzkrBws1n+vEDvy7bPcfiFRP+qwd2C0Wcy26 +WoxcN0eEJzD3y/Cw/wo4k013bu0NrCzy764zzxrqa6V9sf2lv0DHUk36kOKiB2Q7sTvTQ9jjD19B +xZGVTkkIWUSvMht/TU9VqFM7TTkZpuWxSqP7KW1zMfA41zZ+Qi3lU9LzQJ5UP0llrOjIudTWOUNw +/HJyuZM6ok61kmSDRu+oEWoqM0HNvrYd0j1u3kCxQosnEZMp4naQSJW5RmmYyJb+fhNbu6Ckf9pP +qrmkJoyX2myKbFqSxnCHfFEBROlRIdq08kJwTagaNKswOcWz7VzW4FbFRrgz+7r/4PgG52D2Ckf/ +9MDAq8G7Rkr7vG1hMhzQ6PqHBCg5k8iI3/qrDxZeZNw95Qvwrd9rxYitzaiLGg+2rd9ZwQr7P5y5 +OtxuwiB2xNnmhtAy+JeOa2M/P6oKpnxi4ewafBbp4XtYDU+5WMg4OVczNtGqK8AVGkZS90ohWnYJ +1ztL8FMN6v9rxdh+w3/lewQQpMM+sVltNQNFs2FZAaeMjxAvfj7mBwzRvT39O0Dfkys+7bdW8mh0 +N6W21bNt18petRQI9ZwAScQioRgrkaicFeTFToZ+XqtUcG4wbF0iz31B07k8uPbw58XQeqSX8ZMP +X2BSXfrHeGxGNbQ2CqikBPocAWqYYAFTfggBOdcGl3PuWy3bC3vJilAvxILSgWf4TGIDwJ1n170b +haaQUWKauRi8sdm+B91Oy0Fb/8BhNcUWvOEdW2zeuozrmXY1yI4Vz5oXa6crk8Anb0OYS3Hv5jSx +wze3AHe4qB1z4j27Tpvdhfhir4tqPE3IeQ+zF2+HU4zmV5YOIyIQDle/iKm4T3bvXm/qvn5ATdwT ++KcsQJkYHVWvwcy+wCjT87o39AtV/wRZka3He7gybpNvOX5RDrdY8WQZwC5HR9oRauY2OUGqIFzS +FqJea3Gz/zlAioUAhorV5U7mKR1FxMLTVcz0cC6CLG7t9thYqEz2v2xXGywyh3nVA+w5hJoZlcvz +VlYixJN46IrImy3LqIAP8DlW9YcjjYTJD4/vjZnPLHfAatH7ehMlQ8Wm8QftTOxNbLAqyunX7RmZ +I5lFeSdeHnv5NGJDr4Cayiv0rSzG3AyCrGgfthV34B6s4LAk2/1C7zHs66ot79MGWcyZXV3kes4c +OQyHvj/Nv9AQqRGFkq7dAVrcBo5HvdnZuzE/3od9tOWDwDgwjoXRS0L7yG6ZWaIwgm2vXYtAtphk +tlN9oenywXXgj2VE4Fz3HKHWv21rmu4Utr73O0wIe6X+Zy43E+zrD93OEVFErI35qUQUzA+qjRhw +8ftqO9cQsc+zgRKduuLu0JY03n8OEOfihMBaU5RsyFMWEHsKxVpUyzilDecvxQn81C/YOjD6mWfo +l2jJXbteDgsEF5zNvjuEqF2pNA76Y7Y4Mk1YlB6tgkdoQL9cgpK90XqFKUmiGVPNV67C1YJ1cNz7 +0/3/OznzjTvsImTb5pZBHR4V2vj3SvxGwZ6RcvlY6fYyGErqK/8HE3CnOz16fS39MY3lA4pyO4NJ +fr9tcnPuWd2xqXmSXw1lDopg7QE45WGZCUbfj3zJvKEgxMN6q69fgH4ekurEf/DWO+r+wF+QAZZP +mDQacJnH2kvtYzWDl3hhZ9whtQF4fIa9p+Yb+iFoyHG2vdliOIHKXStKhCkZFr4FDERKNliqWJw0 +tZeewO8mQh96MUWNSfybj6Kyo20jZ7Of+YUgxo9NCXZFUShG5F8vEWHWjFo0d7HuQ3gdgMqjFCj5 +8SS1JRj+Y4TdgTu794LRCj6thy9CspwuCBCiIlgGWKOoxsNQQ9meJvTy28ZbntHVMFY9jcLGCILG +TZfYsvWR6iuWhnFyybsvpoYAGa8A3Zf/56EVQTg4A8yIrCEVBgV0zJUc3Xc5hxU6HB96y3pi2YOs +yU4vYyETl5p/ObG+eUjFacXDg5zwvrMLbD2iDDskl/9IOr5LC2gtO7nLhZDFU+8R8cCdZy/QtxRE ++tlWMtRNes9teAtvb7dCdkiZiz2Nag4B4sK51bpX0wiQzFNEQdCbVUqmSyok6b4T839H672EkUcI +5l60MX5b8U6rzyGBcjKFBIXnSOxcQd/XFwJ1WSxxNyi5Usr5YVcBSLVXibe3oxkQ4z9pWq+OsVS7 +m7lvua7XqRDsEMyNp5LoWSAhLE0uP7QIIbRGzzGT7M5Ibz8ltPs1uVtceMljslUzCUaNQ/WiaMyh +rYPvlkMI/t1ixwMpeh6LuW2AeGUedoXsYQbA39Ea/UVAN0GCf5EBXuqUpv1TiS8ZqMVahSja1vr/ +S/44gFbrclisQw3glLFmC7WAFTqEnFxLXflWG4IlqtNQz7L9trTkiYcev/TWgxgDPLkNmD1wbdOx +TGDUilJe6yNFyrEqbQ4S/eUN9QEfhVBUPArQFjTBnl8/ONj3a+0G+Cdy+FFXQum0sa1W/0NNcm/A +V8cw66ypkgIBDDJarvzXaHEwD8Z0LC8lfmoz7GkLyzmHYRBvVXT3a1elFhkAJQvXSf5pz6fvYjAI +LGkiDonY+diKB9Q0NGTEBERkHVh7GhsaCTH8zWaoUpEkLzFQ2urXQKmTMNtJiqldJbho0/TdsosQ +xmBMWnZqwvUtq10IyF2CHzTsCM1EXyzt4gMom/LfwITPyrn7iOcPnqjWjzV2YqSik0DbLWp2mjRl +uyTwxYIyA8DS8QGEya2FqgCJIWFZ9v5AG/dsqOIPk6m7x92KmVycDmCiE8jr8FnfMXgAjv3V91ht +JZtqe2urBCM9SGZF1I1YJis+LCWKHz/tdxLh5vVwKzYTIFrKROE7lsH/HBXm3L7Cc35vih2p+YD5 +9JTjCnoVBczmU6PAsR4CHBzLov+yL0SF8i+8JNQKe9+1McVYBPs2/zo31Dtc8Ux0/eNBV/8BnuA3 +vHMk2hpkb96gSVEyEWYo1Fcx+chIW0yYFj9QsjqTSsZ8HJCtICIhqLakXXnRYPrb9wcbz8K5RAQV +VoyG6g4LY5sRZx0AikyfzL50Hyv4wmVDf0Y1FjyVhflsqbQAyoAlcVWuaUmJ5Ngc4INDMZJdwmCK +nlil0dJJyrRiyqjkdwbr2wDNEz2WBofu7MZGUFmMB4/4axgshBPpGdxZ7n6uVRF5jIEoCy7g0Bdo +AcXV92senryDyfxiCHYCBvRDLkRR6LT+ka9B5r/5aqf3hOses6tJ2t4k0Wqh7l8BJvrpaI/G0AHk +AJQBq+0RGkSklL8XgEccYHJGSmghlAijTW2lbOBTPJz7PmwghswtaLLMvxqXGFyDUKFgggDK01O+ +SRsNxrHlTHZ8hIAHBQjmLEe31OsMx/nij7b29NdvNWcVmp/iYKVl4SJvWMxiBuZOugvvnd4G32QW +kdlL63WlLEMO+/n+9gDbo8IZj3GwouMrr/ptfORwkSr+ZXqD4K7kmMMyncnjg6NRzkCCRbhhHdPI +21XTmiLaBuWXNaGjYuIoDRy4buynkpVXSx2Q1dfAb84SkztwZNLdGKFuxaV55TGvDfofFzYtfvtl +r1I66AqsGgkKW5XS3jOlRHZGOm0SIzLarhMr9NZPXs82/v+FA+Q/CN6jBMScv1QAWgEFAqpurUmP +Q8gmLGL2MqsRbB2eAAn8GFc7hH1t+raqhkUAve1b7pvzZk0dfsRVifM6Lm4+E+ZXre0LNA71JawK +Lymo1auATN6BK8uh724RTzVuuQgxv///DFOrhtEcZMpkTGPwoaNX8lm8frPU2zengoi06WmuNIAs +pzDVWj3r60/59KGxYTBIbNwvnz7qnnBvfZBsJ69Ozt2DWvvlZxFycJGTf7i6tN9sZbfD1I4iiSfp +CS7UnyU45+2xBrpa/rrdlJgKuKeQXd8n2S0N+RzxECxeZK/sx+2KNTi1SXcAb/2sPhipWn2zl8lA +YClBTxNdE0FOgkkpyCp13eIvpvDtOv0ev69X7d32Q/5TlkeWazlFoTcv1ritNffXEtEAub9li1qx +wYgMmfldcyAFgCTq26bGOxeq8LsE8Yyk+cVZ1hpZ4ReughGw0GrK5jpwpFXYE+oAi1hx5GcA2F4Q +DWKBwhO5qwq8GQlSPVJtpVis6ElwL83d4cZxHaMt14qKj7l3gzFHAZGkhkj7MQTcY5WO/L3+vQhJ +D0mlycH1ZjOkTDzSQxnuNfFt6ygdNa2+k7VlspCYipTruCfYSgQmMZ0rWKjxHnX4fnHRl/GewJRB +IKgTAyu0jr6j30rPX1yFgyGWoI8SktZizoXYYkInqP1aKxPxcGfCW6nmsHHG7UzirPcsiHxQJSMr +wrD9uRvygRqGrWPb5cAD20wKpGsdly/XL0DOZhDKQeS0/z092vi4XMyezRhISNboXlw2Rg0844lr +Uf47sxGU+C3gEkVxqSnDE5hleQW7doXWySeDd15Lmc33CoXAttr3L0qu6kV6Tmao8xMZnVt/kis2 +K5mET+k9JJ38hzxZJakADm7brfqpmcglVymktH/DHhzk/C6FkeZu8WFzO0XpDf/UH2bMl1k0rSxD +CCu8kZdyyQ3Nr3tdnGqgO49AsFPdVXP5hCmBddae53eIwuttJGcHT37bvcl2hx9Nm+r39qfJAb+T +lkHyLBXTUJAcTWe49hRyPS12Qw0ff7QBQlC6pSPb6kIRFDYY4zVFtJg5x5dGS05NXigHUA5DUHfO +qXtAmzUtma3CQplDK9kdylrzqyNpcZLY+Z3hiLD64igsw9MDCSaIdUsFBA9osXgNN/ePwqxU5mm/ +v4BlxQhoH1LIRD7++oUIIM8KnoECh/MSZrr+Jbv8ZD0jcOWNRuQc7hkOw6fWxDjSMg5wschI5psu +FYcYmfxD2wfeyQ2ClC01bELd69qJdeR7LKj0k7zlFHo1XhUY5eCg7kQmqi8pUtY2TrfGrlKkXouO +Nzw446d7yCkOsvWEtTzoXea/azPjrZ+QUcPc5cKYE5PDPQCuTvhWWet7hBPwYJqV0favWpdTx/yG +4DaYlFJEawmJz3M+TLeQFqXDfHBZquyBMMK7cJGYnKZmE6xrSXEpqbYU3TgA1kmryg1K239m8E6F +DxUNkwNri1oopktWGdKyrs5jDFsx44hw+ca89ikT4FAgl7LfKTpJOH+782oGpMeU/eT+6Q7qjixc +7Yr3koyDuRECM7Bx5HOY1jgXgD5z6o+s0fDYdRiY4icXeMfCqmFWIhD5TWii+2nQaSSNKE4OfgUi +zx6T6UWBiidVdb4zlKhd96LdlrU0gNUrJyZCIRQZeem5wIm+83UKymg0fUX1hbP9XZ4tjjEjo40h +Y1I7J9Vgk5nnXTmqjgWStJMRGcoLKTqeuC6OUxqX5GOZh1hAN38Q/oM0OCwOvwajOGw2uSYI4yD+ +lADOO7tyo+7esGuJrjxVqveYAdm6HMw0TyTyGJfIdiUg0c2SZu0lkYtLVKVyxhyjtFacN9CMxC5T +DjWQ2gQyaJtI1QQVsu1j1r0moA/3as4o89rKe+iqb3fTGXwRlkEvneCcbW+bTEWeRauI4AcOqG+N ++5TSj0S9NM28zH2XltWVzsasO5fmfMvMBo/TJotr5PTiHSrNBMt4UoDLF3Kj6nPDLaOzKAPrrR+v +zknzQHw4A9+S6WnrSLyYeb6n89R95+kIFxv98C3GHCF8YambdgwPRWdrPz3r48wunqj/GuJvW9/0 +50OaLJOWfEIDdW9XJjyFW8XC8NSx8Iq1jIy7bjeN0dH9erfHpuA4Zj8dwOc1bJizNAyJNsgwLBBW +OjVy3H18TpBPz6UjCaGNivYJti3XibcVgvtJlHkuzaERafirjM4HM927j9J2M9OAUxc3zobnHu2I +ag3cGMpILSGwCSL1hzb7kjcxqquUSr/hPhJ9qg5RMOZe7ND5Umv6WbtL19359QYfTTosLPnLwwi5 +Y0zYXr5q5HSCTC8ODN7qL3EIf8Urf6ez9kr1/b8ZPUAVwlmjz31sjK70s3yk/TJtn4AIgTPHhYbD +jd/Pu3b6QCrnsoHiuZoMCvr/R5s8wzxqpKoB8ghpHpJvBmVHZUdKtSEMLrhjTfESZRi0WuihMEQP +SFpX9CFnGRbx1wWKVfmKpQ8xbQqdqvtd5sCsBVt9pbEH4U8klgFkIv2farMHjWZJ0pa6DGaqV0LP +PL2CJdIFz2ya0+A2Tx17JmI3gRfXPSWvc0Mk3k0P4Q1vinekL3hdwAZTV82gire4DIQsVW1yEb2B +BSmUmRDdkJ/EDZSna3feXWB5aEmhh3BqE+nLcWvk7CPW36f5dVzJQJGrfuV4MLVT75LP2PzGfmLI +ECRjYrYMWobt8N5uUSyjIR2uG26Xp+lRPxn5se/mxHpsOUoymHPsSEJAFXqX+H08MqTXlJVjH3Yf +20BGXZV3zoPBpyMzQ1h43ABUDLlzF5Qh+M54Nxg5Ljdwejy3t1/WnU1YnMuK1RO/GnJSpdhpJlLW +XeoADFD19vf1t/lAEwln22l7Zex8ouORDYN5jfe77uRcHFe69ayqSRk8QM3/WYy3chDVF3UMSII9 +HYLI4zj14iqqwDvTvv5yognYqhWD0dSsqCg1u8VissmMT7GjzmWS+odh7DXNOeDv3IitA3qTgHmm +vRk9d3Gs1ksxErUTtrP+FkLqaQk+SlOfz8QweYOlc0TNWVqhPGTvgNGR5KTWAf62/mH2AHIzXwC0 +rZ3eY1pijCXpEhfjQ6E9tVE8ECRG2JDG2rS7nnD/REH4DM/yQZS4mh5IytgB9MSbWjswXi93JQ/e +dlEGRCGYZ4R7eM5LjMKMvWgT9TieDrElVYNaPCFJQWyQUaoA3m+dxp7J9g1YAciTpo1eTw2tMYWE +lQQzoFu1I6rxYGaC76okbubV+IaIzUL7RYxemRnsYz+oMsA9qWGgxQIu0j3XlhMNngCNcP5JHz55 +lXdtvJ1Th+z8qiv9A3wjFjQU0eNibjX3QMyGFsBQit81zRVP7qkU85PVNaoNR1ol66vOxzgCHSpc +iI+wHJBCagApZJDERM3bXg7zcdPpueNf6XzWgM5aMpquRS+dka8s+4xrCmSYLftPpaQQj0zOXkMv +Fqi3IRT/Y3/61VkPAK8/RV/uNyFv1RHTo/GjkQ4SsZMfdWEBe15MQxn+cf1U0U2YFbPRjjVYMGtV +1jFfJxVcChHqY+vCm11CuVDxaqLv/XKkjk9sCYsx+Kza4tCUPLlTBypRy9pTSAWgRGrHYglZp+si +/PoXHrL0lRGR1eCyRt7K4AkjAcVtZl46fN9lOqr8vINzzCUfpVToRLdCKQaQYvIc1Hgu6TqJZuAT +cZ+ysgLGiCOLhFAeE6JBkhegY1lwR0XHC4Sm1pcY06OagWjhvDJLbwgQRotIt5JczcZATBPntro0 +CanXMi1PhQcTs9V/8hAQOGhfywa0wmlz942oKpHZYjfa3ky5nMpS4NSd5c2d/MdpLQqJYudyn6/N +dWhmKrZBWGPuswXM3dvC0S4EbyCIYCiF6gLxCtCegywttPozEzQkqFQsD3Ldr3SRwVPlMjKsOiW0 +TGHmGdkld5wryTT94Pkj9hRhUKKaW7kVznreb5usaIIyFBwUz6/7mCWfqDETpGVJz1P+k/k+fAcW +2R8GlQIxLWPOJGnfSMMP5mq4PjDUW0P8sQfk8V8CDW6sYy1evzYEkVTy0j81sZ+3XnIJ1+6WF6wG +VJzGtGPZNwhripvNAvok5ZFdX/j7Pfa2YzA1M2vIbeKWW0zAB8DDKiHxDhRqkUv86AeOhloFaiRI +uxPcxl9RM7De6ghys1kWcl9RDNEgTReEFSq7YIEchHOcJAPHwLX/JqEtDAt+2kV1S+c1sNFtEm1X +bBffLu+O7wZA+aaPJXJIKZfAgUyZR7KuU1R2C521CaQvQXfkLgbOs+vjpG5rxSrabo7klmgSDK+z +oZyLvV8dW+mst1ocZtowjcWY5tC3ouOiswPNA9n1ab4pqCixPfYd9PzE/14Bg8DIke0ywVAw7Lyf +DdN4HG4/NXhCYMjr6BDqmFV84j6V9hL1A7C0CA971vMzHWiYOjZ9ersDky5ttjzIRVp9pcboTg3f +uXXe7rNeCQXKNj3a/mFvUK9hkokOWDBRmLXCVSvXsHohc1kwqtBYVYEPeL967WwVtkwOcliCJLzu +2By6h4jXtjzfuYbeeLJDLbjaT11xYIXqstHY2cTWUCgl98MZDfJOjTj/mmnmmGUxCr19Rx6VlG/R +X2bnv5psLDM1VR6yRJMLK9RBbAC5eI7qnPoCB8OWp/AYsADNlUK01xEeepJSFmWdwNlofIAozz0C +vfrsLJ1P6kAldSWgBnpBnL7PToQwf0Og39pPpSWMkLDGwIFsJ3AKngIWHYVZ1wnx34OH+Y+w5p87 +za48i0Gs/uXFIN/3Zezn4OJC7owDVjLg99pDfBjToC8rWungPzLePaU4BHnIg57/TnDfnnOTyYsX +5K/7iXeu2QvZpHFD1BTXyrU8hTlXkWpD4ypvNOPx4wCb2DYb9xXiNB6hNZAkE8x+HojGCU0xP0dL +9xc6rOxXfIkPQsSNDIWz9WT+klc47oeFiQhB+GxNimMMOFrvu3wL+go/xxueGYMEjjAcF4Vv7ivP +uqZi3ddjvlaZ8Xo4xtCiNqStjFjMWXRoI7ObtGCuzP6zl+Fvuyzw16S8k5v9KOKgNnAKse6mF7cU +2dCzwbbyP8wGOdJIb10vmNxuJX5k0xHPXCz/b2v9P11reRqynnzJsy+mpZwVwhmeCKi/SjqRNrzL +7ZopO0iBsZE/QazOi9E00Kh78E9/5JnF5XapxWlOkptU71zR0kyOeO30v9wXLd09F+hd/qBZmtul +DrHLcaYobYX9/0e3DH/H9G3gLbwGwDZy+Z5UsaZSX+U84ez+ymOCHZQS9C66gxX5IMcQnKGXt8HL ++cCM4QjipXb0Z/w5K262Vn0MIzrHiVihxJkvtI0x9HJpj0xkQLsJ9HAOHOKNGJpj1piumHQFKD7F +O5/X2E8GoGzxs+180ezYPH34/dC4rF8AzgNahQQ7SV0R6wuTyBaAQOWjh+Anx1ZKD951BMi/kx+T +lVUW3HQjvpXJo4UqvvkWFWwKG2CC2Syiq1wFCEehvRuZ7a6XSFc41Q3s3Ma3VVGJSRtmoRzLOqlG +zMS8pA3ffhJoT5pFsQBjp4/n+dX15N4yAlXGsp+4Yv4iW9jBSM61uTihXwM+ud1DQAfXVQSzgeno +r1E0vVeVTYqB3kYG1lnzHsnF0jkqbA9zfa0weDSnmfYj6n0zq5KZdyj/5NF9VGwI0a4S8TR8XFNf +UDL9FW/nfg+eYYC4orvxU+NEl4l8Fui/xMyuAmcXNhoPC/p4pJGynrQLxMcD8xAhC7TXOk9Rp2PD +pkW9VqwlC4YGT9Gc7002lY+OF191nwwCq+trbRSRj+Eaj3zdLeoRKBQv6bGjdo1s4gp6EsmCkPMm +UeeoxEkkm6wSGbYQNMasOsR5wVRF4jCJhOAP4sKk5fgT69m2QBlyG/ftCXmyygY4HTseq8Gj+hFI +5IlrOUQHD0REOfTlk3iZWi54rQeFz9VfjDrbcbyB6QTrF27WuZNv4T9FsUtpb4QILGCQ0oQZLy17 +y6iVXIJbh0HEl4Iz383slDMxZ5K9evSuzsSfK1YPwmx27WVX0oSWD+PyaD34JedxgQxQ7JRIpYYo +u6Z9YcV+zfTeHBsbTRF4BiSyf693duvCeIPkKUps3VngbFzKNLZBfjwj6wvAn5Ox7kXTjqc1ftCD +y9nK+tpcoQ2ez84o6TLobGuPE+jwW4HtA4Pnt8/6DrN9Tk7ghQcxI3MPr4FVrigHPLw68Howt8lL +zge+Uk2IOSeoSQpEfv3Hh5TnOV20qnoHtOBZLzO7MwawzDL2eF9glZV/wWbldsquDsFd38Vv2lRA +b9fcH4RYmmN0xPY+kcwfXFnoAFuimHK7lLSndejscCFp3mgSeX2+tUtepCxpNKfzpxcOK3wnPBL2 +Qu4g8ScySjAD2COWJ+ob/Kd1BRiXrJlWBwF+WDnfT1fmep2qadqjDVZKOqul1eO0Ni7RbnN7noL3 +npDDfMTmOkxf7FWtMv9vKeucC4C4fBISgct5qUHG3yygpGtwN2lEVQ/E+ruKTyGAvLXVPcPeyBDq +J1hFoRfVcwFJe/ywANVY0mTrUJ0v1AnMqpVk3nE0lnoT/p2tHz4A2chpINO5g958dei7ebKH5xet +S8dkZ07RAAPtWqARpnHXNzYV5Suf/1YjkJi9+uohUxKwWrIUYGXUzhIn61O7FQC1OmG27DjWqQOj +mSJ8IDAfM81RLP1NPuxpBioN4BCByt3uUhGP5t5sjpXbns5kuLyiwvDQlmbPCw1bRzj/aziSE4xF +h19UxWwczZ+mGjv+Ed7JvRdAk2sq+3Lpc7mpnlWUMAPO/CwvlUSleZBHchVM5eZpGknk35N9O7m2 +9pxXfVQBC/55Ko7f+tq+/ctZ0eu9TtcNmjd7+/Y0TBxoRXUXrIYRvXwPa3Ku62v+tIFKje/2kB/S +6P4q19QD+sK/Pxf0xveO8UJyYzRtRj4EaqHXdelHyIFFVeEz+KQE0j7h/XR7xgOi0Jv+H6QQDa2q +X1WxgLg7akud5byfDVKhUDW+0b3s4wdgdg7F74HrqH09O6JInHB0fp8lOMkd0rrJpQrEgcoV2D6s +5D6L+0RTJMMOEhJsrsRedn3qv5CERmRQWj2uzPFQ0vcETZD9NvgsNRcu3N7QR6zb18oJVQoSQeNW +pWAITXOjisss+TAYFlCDNcMHrNt2sPUw0fPAuPRX/ywJJHnzh804xdI8IrI8bhLQsYmr96H4y6jB +OWleQMZvNr566UsEZWVGbxoWmybENbwY0p6FAFpciZyWYpzoQYsfhVDigcIKPQLli6B0e7272V/q +X/HjwsNaw30CeZYHpsRHc9cJKNup6lgwdWY+2sRmCRQ/ZAQRd7csbSdsybjHrGWUwKfEbRvhmkkD +g5RwshWmFUfmosT2b6fVDGyEKHMlhYf0rEKlNrnygGZMb28I9EFkp1Hm+r0LZgJgF+q8doPQDe0q +qUUpVhlSKPPc7FejSvUYM6uHd2PROpM5H36/WrKUNZs6Qsxiuykafsu0G+FTydB1pLb0OyHdr60x +xcOXG0qpeKEHtb2hcYLljYOQTk80u7HUy6keL4S6Ya1u4/kLDjmd11mK9Asn62Q4dAWe3azwvDCD +RhJyhi6PyQxpabNstrSPAl84gCu5tKgx+ZnzNHT8hPSmni8qZ812hN7lLABiTUyFXWFvLXpfOi3g +1yEI+lzY/CX3G7Wb7eveVN2sWW1l5IR21R38DquSg6GuGi8WdG4bUASzNMXlQMsn1imvoHMspBCh +7wK72o2JrrVoEqv4tKTixAgB7GVX6rvRSwTyDvQsBI3sf9fwaHgRorWUfvhOozrXOcwlG7JJBico +ZDb1amh9pAGz7Cnk0kXX5bo+F9qTPaaykwwXq9ZW57vcPUhbheg+u+0uz4KTrndXgpRS91dBwewV +sC8964lcW/VzYMpknXyVk83GnmgB3BIpy0CaaneomntznC/fTl2ECwiFNcXH4ovFooDNPXuWRp/8 +vuQnKbpjEok5xoufHwQOjgUpkqhe4eAH3+FBiWC5CA24WPHb42Cl3PMWab32Stceghl44NHybsm+ +BTVdNZ3rd40+HTAq5y/PJ2WrrxwjmOM+H2KGe+9GQQjykBFZ9ogpLN9LIIVDXIMNXDyxtC/NIOHp +u47irucQhZsGDsvvIfrwWLXUUyMjIkaVv8QVfNjyiDt4hHjWgHrp0gP2xHtIQ6UHGrda3kxeeqf9 +TgaDRtu7xabH3E6d6djH2iLjCW31OJFk7YFgIDt/Ip7iMT2cWLaW/xCBZKgnzf6othHMwI4RAwvR +33SqrskjCT2DJFWeKQ2EHgz8Lij4VN5WNjeEG0Slc+pOQ1Dt+x9BwckGWfdZvk6Y+vX66oROGfYz +a2ZxkfFkIRvo6ovsfal1oq7br4DIiu4x8tB+MWpP0GnVIt5Jk03LAwWoWoQuMVhELDQCrI2pTZHh +m+lTx+0/jCirf7VTiPM6NCVlYKJ5LNPVGDGc3sdbm5q6chJUoopLy9dNKN8ou9onJKEfTwQRGrAJ +tqnci0QTxXUTNJjL+ZC8eDBuj7kIrREefKEo6KRZxX8aK7PqBPzU2Fg5TmK/kV7VM2Rk8nSs8UdE +svMvZGlT+DRRXUskLhPYH+pq32bWsvD50OdHl23x4XjK8VxhwhyQD7jAGKVkuqA0NFuw0IJk/lQI +6TIR7OppMR73X9WMx0PDLoCIiyhbQsVsbFqwZt+WL1tyWZNyKKZY+Ld4gzjqrGOIFQ8ZytKkn7bp +/BzZadJNbPGjzUNrIAPG8D0ZengYADL5zoOCa79tUlegoAZ/OL0Z4+788v5PDlv3EE5el05Ue5rb +2fiszMdzgILnfCmzCuUTOhRI5ROjNSpIztufl1EF2ugbBEzlbRWiXkZf6vfWthKhMclx9OYHOJRE +3WZBhktAOanKcYL7WQl9FwIvwNQHD5BSVTaWesz/CODKRqw2NK+C73f6T1BwbSKgBLzXs3st8gD2 +bzsG90V9c0/agqLPubXfn41uZR00LpADp2l/aNSyo7Hyc7fqlYX2dktn6nOhNoEUc4bkUpnlqsel +wF0kZMQWAMBngwfgfJ165f+Mt6oVeN57pwarWgapUnCGCUZokWtD1kidw5DC87WF2oglICB9ReMx +gZbYjWTMfyDcnxdOUZbvDVFvA7vQYiGF7KXKHpmRwxxjw6aPWE5hhtqsdHjaTroOxbQaAqcSieya +DzWJhCHV7p0QW4WqCZ5yntcM41U9gYzNgoyo0hWh2qxFx9pk1mjObda1CsPuODySwro3p54pWfzG +DI2ZBjCgtglRhC5VHtqKg5ewUtRVt2nlvjmRnlo/Gq/tWdNmMIjgEqYZOt6W9hc51qndBOYhGJoM +s5xe/czd6m3eVwKN68B2qXeYc5ukJRvsZn6R7x34PDvm6eX+rPs/hFypKTbXt1rRT0JwJ4wjTpH/ +iytQADFaH6hL44M+ZnlDZ3zeajzmsaySmGQ+Vfnz4daZE835kGk9QzIFMeMcj/IqKFVWoJ5qRKiP +HvxYP39gZG3HLRQikDUF1/GWEVZFGp5pJmbjbnQwZ+k8b6eB1iNblAW7D8l9YBCzv3/IzaYMmbXF +UbJFlTuEBtz+bB8Yn80HKDB/dgWi1B5VouZnB/vhVNGl9uZk363viXhgznIl4g31HSLZAQaAws+w +uw3D6MLZnJHKWIr4bW11rLGQgranDrTmE5ZCbkmbU3FSrGCa+r5IzNeJ/xGgxaCC2rgieFjfhWUw +Lm+2w58gEv27FAS/Z6RQj0uclc3OpbmOgDkcGdCoxAv4kbayHpOciotkenbBL2F+xozPJvkviuXV +KZQxrtsyTn5vp6ik85wY9sD5rWc/SHxoa/2B0lMLosChT+3cYSqSthM8e69vOr0lpMNWK52cQrWa +Cj3HrWBs+9pLQaAX5QdCTaMOzQEM7iG63VhI+uI7jplaZIQJWO439PPiwX0ZYpY/yHCyWKuaGK/h +7N80UYSGfQAZ9h0QPAU3Iz1hedCwYoC2X1ul3iKAnMPBSaJxkPyZ4qEIynCkcBUN9Z3XUVxAFxQ4 +irNIcgl8rD98RVMh0Rb1yqwYAJ7+coGZxRnzbvNt6dlnuCS31SnExX34Xt6V2OY+x0J4sEr01e2R +PZ2eO5pAa4unxLPEpuN+GRjnMNKzpTSEIF7iiVFoxK4j2YxIFsz+2Pv7ED1zunmMoXUXstYoXKIE +IlQtWtvG5rgOZZ40+Lki7ueLxUTfCUdW4CRdnXs5v0sps7dHNQe+r0trZHYAhvnQZwfQ/4aRG44g +eJRDa3OZv/rO3FbuJtqXMBNDtX4E6PgGG7vF4JrUdPFCg5oq+ejSktl6Wff9snULKZ5+i2VXcrAc +PnI5W/ZUADpgBiH7bVKB8T4XgGp4YLwjRAB3Pxd0ImCPkrknvF2w8jCDkNXz6d06iirbsFy5Ne57 +k2WdB38BgpobIsVxE8UNK88DcgJrNBDFlumP7gr1zpSnGLBXt9nX7yMIhTAYVMP/ZpCqc5EvJdl2 +lxeecstMXm8aW6YHImzm4mt0covysRT2ua+3qWD47W9TWXvjUPX8emBXjIPCM5fOuEW0SsoHip7P +0PVj8A4EM4mwJyPHiNiVeCR4KthHARQs0tH6junlkFph1hvA03zaBFTL+nY1DwPF9UbdMIUG6qYy +TPwPC67RX413EsEFbP5hKZGsvHZ5uuOgQpHUcpCMIdbsDPdFtApjdWXX4zRdCZ5PzQ9U4mIyf5C8 +r79Q36MM2ZGGycUPYL+LGolI35HR2O6RbN2O7fDvwXEJ976nCWBeKo5S9mV3RfytGQ3/CSkYMcod +N6r2AxVQe8R0jp/G19fhmhq8UXOyKJBLOWcENun2nmpJ2i2wjWJO8QX17xyAVBNRLqGjN5I3BXwk +YR0MniyHvexO/fDickYinzbMuAF79QTGDRaA6mM/w8t/OHCLiScIxpv9cGcQkO3spcA7CnqSgM+x +13KQu6DBEfL6EWZ4sTc3OOJT7GYN8Y3/A2qODxwHmQ/oKdzHAVPGspxoOqBHnnsopZ2oatamhKjc +CIO2CwrGIQx1ThqvxyNNxWNWLYoHokqMxDYLcUc8cLH2F0q/HPripXhmrcEs2NWsFb4cAYE9gsNg +plZvqxIwrSBWmkVBxWVvoeNqPzWAXUFlBtQrXBhBR9AABfAtU9C5L6Atn1IM1bv1OTmHe8GwMTGW +q6AXW0DBpCpJ+cwfoxEPUTAGRk1OpWmSidYJrFq2Hk6zCmNwxq+T7AgomnkFyF5VL2Mv0O5sRqWt +KOhPIg2VlFj/JVIKc3c8X4z652k4NRfIX17Csrm4BPUDd9B4Uj7TDorWjmisPkqZNxC/CvvVhbKR +V6x9OY+1qWGsNMvPBouBjtliRnkQ4RmXt+mSI860aGZjD8++6xTp1boinHkd2PdImxrXeCk6M1tt +2D8uxaqnOpyUGqTf+vEBHqqXEzCEBVBh7aGKDXMtRPHNuqGzlCImsO8BprbDl2tYeaWXAvBRvx28 +FYeQYDX4IWBluMwdeWJ+AC/FtbGsMbM64K/+zcjqr/SFbJ4wDmGTe3qPwqJKGmhXSEXNRxOht5Jc +4WnGwVBZjJfQ3j0Ehl2t9Xk1lJhosSskOHC3xkTHbA/MzYK8xD3Lv759ztn8KN4Na7Dq0S9a+FET +yFUzkbwclxlK5yOLJGqA75T9NyYtaLTB0vVTqfVWOUIYrw39wtkR/MLyMvcilMA6IfSv+daaz63T +gC+m52RvLIdTsdpHFQNlh54lLrreLfkwdQeTCk/oV/nvbraSyLIC57YpyCVvH3tqWsK0tCg9CLG2 +nc7x2S67tPJkNqyYuUUzk9TvhlO88zksNKtNiF00BXJ23pOxAwUW/AFQUXNwGF0qVpVx2OPO3gD1 +k+7ZJdjUq2pzyxeVNLmjbiSceNFMCffYUvlEOyNCn+qV4beEgxJIJLBL7HyBZbpcs3nQG3PG7Z/c +OT8i/0D5WfbbNogtof+HaIqWKdHKfgpxv8mDQJxQFiYV/LCDQi4YMCHe3dbMMPiUJXWQNqqlcoIB +uFMTYVGq/mwctKGP3ycvjHUSSVKm9FmWMGSTHOyx8VhaPSG3zsuNIJRdTHtoElhNi8RTyjafVO7F +PpUUJ9a2PvJMYDbhHxfr4cJRb1PlWnkcvPRdj1kJSL3vkFi+FSvpBO4UNVydcjcVE2LmgEGRu9kQ +hWY3/thF8pdCspjpXXpY8TB45KYwEaAeetrn1qVT6MkiP2jVo/nwyGpKj5eDwoIMciASY4+5x2Yt +ioHnM+Sev1d54gwwr4saNxgZmREEnYMWlPOe3X0eLA4/YWVFa/x/ZnVuUP8fSPncuyGGNxwb7AJE +VBe6D8w30C5MMue4yTaZB/SCr3H2YFBqmRfvWJ5NUIFdnVvb4E/TWCVKiC9ctKFy0QXTM7zzm143 +vfo3BwgcIoArul7uVzk3DEbvCOv/CAaX6HEACRZ+wtMiA7px7+JBhZJab9twHqZDRjbs9aTo2HcN +5bbM0+mM/hYSOZZz0wlHtOdifJV0XnJRK/zRY43EaQIncuVfNXS+BVgy/uGuYe+UQhpbs9rLRjIa +2XU81c4bR0Wpol3A6dr4O0Rth/9XftYuNMRDfAGIWTlqTAg4vgeNCK53/oiSR0Q9Bxix+zDSpCiT +0iTToG5grLJiv8RF6Tv5Iu4hhqQN1lDFGVeBbgdbyHdjYlPavQWgDpyAuZliljm66wgnBCkP5zDY +/yYP6dXJqBIRrE+AdGvXge34z3M6SECJRMTqmeHEdj4QEriCdugaRAdvgsUkM7p8DUiL4WgAFA4r +i68yPuTR0f5y1H9xqlzF0csPFF4KivDRjJNi427Vw8zREqh0GzoWac28BTkUQwsDoFjqxQoD3Pwh +aQmZz/ELpcZIiKajDnh8Bckn5fm98uGaBu4WyUY0Wl6eS4Ofq9Of/nSZUibfQrDjeG09GH4NjqzH +4YsExrKYSsdJykgB7wX9w9VdWu/Yk7pqemGsI/q1LORF3H/KUIhtGGpUbqEsZ7O/SBRL3U46Wkkr +WmIgAjvPEqQz1n7i6/ofT3XWCljn5ATA272/YPlGghaMRcYuqlqNTPCPlj+xp5ujaEQM4hnJETBx +GHVAmsnxYtkC29vEBjDHNV+UyIr7qtd5PZVGf968gpZ4fjVIC9ptICyaZvrKh22uUpOJmeOo5hgH +3L5aXA5n5zmr06V48p14TEBRoLmpDohpyFBGCDsFPfm8nUcrChL4jPcM38EG+9NuruwOp2R+rqKJ +fhB0V1fhDoID8q3zFva0v0fKXw1bjIKWcqo0+dpd+jRKTCKsuRFap17WYPd9HmmiKuQNFEhtjDgC +/vLOFZyPPddYhjTwKOFzSGLeY3/Y6rLTZbETLptUG63KVbDGt81KMsAi2Jy7q427M62ndFABPAl1 +BE5rbIrA2UDZxtbjzH9hsqn19f8Tl3PohIgjyQvMX5J/fuxdqOC4n2OS2m/RoXzMsuZf4hTkXkNb +55vXiVEX+VXVUMnIclBxvQZOsSjivMdbZla209WtPuOxx/83TA1GmnWokh18DD7vJ1lxgkmk/qMX +sRMehygrvPoktnP1xadaZJAq2Ux9sHUTjz8oGcGfbeh1ZSGPmlfXM6SdRw7iQhPqfbqvGZGRAb+Z +SyN/EElqkEz5PS7rMWb4uCxANYZuATaNDqTz93ifFSwkVRljZncFlOL+0ch0Bsr4P/5Iwh3uBodB +j94gL39LHUTkkQfh5OL61h1vAeHdkeiI6pLbFtV1/uT7Qg8W7uT2wXpGyz2wstU2pUrOoSQHQUCR +U5M+J6CSIoM9uXMUgCPOx3mPEfxxF6QAP38b4YBGs0dRAJOhR0TwDRWMUWrQ0gRT5LoRfUwRHF/c +ZjsqA59g2q214Mc4ROT4Ta9FcMGdTa/ZURB5fPb1NIOjqxTNeztQ54b7O+6YqqQLCVJlsLKXnMy5 +fnRYrqBDTKR3b8190NPKsGVS3Lte2vsNZJzSxDAK6SMo6+ITR3v6RhaojesT1r4E+4AU8CLS6tLF +9K94YQ2PSj5g9iHaxS4GPW4ECS/b6RGd25bgnqw/27ndxmeiBXdcL43iLbg2y6OeAvZxAyaaNCe8 +EnpeCNo01EvXZTOT/LIoFy98o/aHgqFG/MjSUjdvmZa+CZJdL/RICg2YjzqtcUncAIm4IWXurBe1 +sN6W1RpJS7Dzl7W3o5XIYrbU9Rx+VgA4hvydQscBFmjyjl4JOsipau1P+cQIkgf1tSfr8v6JeQx9 +gkQDGY4uv/jw9J8PFZfhMm9/Gq3vBj82O0G8Xt3rsxSBtjy3uw+hcnVm9F6j+fdYYsmfJmf0C7vN +wXcEbsSjISVramCTJ/JjVuGt6Cc2OtWG3ueFPk8bB9PSLpmsfX43v9D1oia1stwkV9plPrBfMekJ +IdjN+IJY0jQbe20GXlvgKkLTI8+clo/XqbPnmv/44ux8KlsyM5Kbhd0z248hh7Fu5TmA7S3+039a +IBUUvpTtQKc/5+OG8rwM2C5rpYzjqhHss0T01WtIYQHU2TvdABMr3wvEmhI2vRo2yabam3skD5j7 +7aLEsSq3ujtP8w0pqEoIX2wKxhvW+uqsBhAv4qlkTO3ydhEEPT6eSLFOZ2V/NjoMOQEVNzVA8TWJ +tT1+RuDw0rU2GQJKSQdUktfWqgTQbcJ/UUQV7t3K8rAYatDBeijhsq8t7RzV2sAIXOEIeSWS5dnh +iPU216p538bKPoPeGoDYYWkNvSfURox9qe3llOvVgFVkjUDC8d4VqMLjEZktacKc9TUyfBLo3KEV +FkYbrQVXGe2wzMik6tiOiNlSiyknkbKZPYNiT8UQciA/1QWyElW8LZHFadl2t/xboLTKvRtLlB4g +38epYaDjswccd12DlHU4qcEH8oj2BW9CvOQfYk8Mun59TFRbi8G7nQPz4djG3rgcSAUr06YyXCpk +EvKNkVsgSsMhiwLUXKuoQLDbFSXJVe48881lD2nLqpnGoKABMG1YYfUP+d0MLFXvvIOqM4NzIiCP +PwVoiVPM8sUeQL0cxB9IRxJtzgPu7j8DQQ8j7JUuwaDvvoTmf3wzZCuZRGx4XwBlKoWS7mjrzGvZ +G7pfWIFcfiznTE6BsbqvYgIeu9RImvPHVJebzhXyi/T+Rc4R5e4KB5j/IpjvL/6DE8lRzjC5sEC9 +NFhWzhcqFHL9QJU/N3DMN5ng9w3vR/Q83YOUSj1pu16iiF5eGHwxcQeoCqPLBHY2ARtkLLlzOp84 +/V54lCAjOJREuBivCQAHWb2LkwH+et3VDEsqaHILhOx5yM6RAx1zphXtxjz8hXyKdGUjOc5F6nMu +DXi8E3g8tOei7+gEkdCgvFw1m/RAKXkNuEdxxeDTR4vtAeD3z8cXX2mXIbNJltP6Q0MNEvil+66z +eJyVmKtTRsVq0HIyLIe3YUJLBed7Xnq3ySq85YWxTGXlnU7CyzVaS69ODpDg1DbeatuY2MRd04j8 +PsXCLluMIOQu50v1w8fWmb2cQti7VlOeKtTyu4lSZ0WLYWUwhdcI1Tz5rJBDmyW4Jkfw29sKR+aU +jJdN/0CaJ4EIz57ok72ScRuHMFxK9BdLMQWHJnFnBwo3ao6pqKvLhcn2SuHXBsu4fkOLwR/ZKzwg +t8ekweBp1mQfd7wfm1o0Tx2jtAr8YHu2NKjA28qW/vfeSG8eXtsWyHcsminKsVdg3189DOb/slCm +7gc8Ype0USh6QyHV864TJGhbNqJBa1TETQ7MzcsQSAaPdNvth0U8Gur34ZTcPHd93SM1M2CJ7OQI +zBZwbKmLCb8TmbsqE9ziAsGCOZIE82NqcV3TnPdOOPLqQI2NsH6DkWFLQbiYQg2xA/sbXFb+M1rW +HHuLaio5TtTw8/Kzwb3XdgcLWByyF5dGLqTX7BLC4Gd4IIVWHDorD+i0qcgLlA4HxfB/OWoOabau +wkQ+AzcLsSf3ML6nfC5aK3OPqMOtqGhdp73Pp0DApYtkppGqVlItrHYSxnO9lydFMHjo2oFfjH8j +YVLVWJosf944/AF640hvxXRTR5nKzLQUg50SiDgy7K81er1TrB2vL2CX+nYSUiulWZ8JfogwfLOM +9F4BKOr6EDG2rKXYqFJCKbfFMJqARSBXgyEr+C1dhRJ1bgwJeNszIMcijZ9jkvZ/j9S9QsSKQXO9 +s9Mk6p9Rl0S4YRBCpokE8oWdP9eW1b0UnyMxBR2kO8tH4IS+yZl+bIDAKVuHD7PU6M+JV3+uFuCk +DgyS/AeN25O1+nM9PLgDoBZByf3JM1v0shCBOJZrVRD+DjwRmxOaF9P8G/cNcMHFV9xZSrAxoLhh +QyK0O+I0VS+ZzIrp3mVwHg/jz5BuFKhzobDMWRa/SmI1yauNya7nk6dPTARzgtYXhoXzJDhsnape +iogbRyAlaMb6imTjMroAA05LFVw08OePck+0TksLIRi785icFlbb8/RVRyt7G+4YjsYyolWhn2fG +G+7R8li+DzK3UA/ksAqKU73Lv06mlbKDMe+WME+TaLM1K0tmB82y/xrZYXgOyipuw2ULfnMsW5cJ +KUURlVm2korcaPXDqbBbwlr12ZpxLStayAYQWF5SFQYvDbIYEvAXSxxBiYqhVy+cdKdikYKhGdrk +7z0grdTS+sdxQrg6c0AfXsMPcrcmEiFTpL4wm0nwViX14X2iuIUQe7cLMqgYCBXotAoa0inq42v5 +kNoLXPir4s1M6LcIhMmnF8gjQr778kXvFs3LdOsKU7VowEa49A6i/8WXWNxelnbQbGvgH9GZ4jz8 +zCAuhJdcteZCKqa+Yg0GKp6Zng5UYw6KuTmNtOSPsd6lEKeyxUtCeXm+u5+trcSTommIwSjsupla +20Cdmf9jncq5FdXW/CpA+5vC8tzFtseAtEh+apnkrSRkKavHL0Ma5HJB57mX2As4LRemaKqVNF/+ +C1ePSWr4wttHorZQIDiVu+jrZyjUdGAKvYXv7/+sCYBZ0Zx5UdRk5YJsSZIDX/5hLeEf5y4wOmgn +46Hcs1VM4yb0ScU4wMk73mlDfEhoK/j0FBIIkuyJd8gMRrU99tqMaAI5XOFqPb1+qbMSnDsuE+f3 ++JFxVe8VHu2P6hhwHZVDNvk0rCuTXoXUI2syRXV2zebO6ZAk4bX2XDyJAqKfe98SYH8xl/7QVzOc +JEOFtMj5CAvNtbQqeNB3hZtm+rMMe/VL1ZzvFO0+qXk3JbhWdBmMC0PoxPz1Qgmqm/qnQ731EUwV +Z/RoBuQo9yorMr2Vpa+lUTmSn7cw6TVdS4PjYmvvnZ16o0zathmlv9ORxtlw6gokYw333wBs32r3 +JY/vPA4UPFMlYtDmyhPLr1CF3stpMgdviXnjEdMvJoi4lK+7bKCzsLnuhqfYja4V/W6YWnU+cR8D +wjZ50UqcTwcaER/K8xDREk0mGS7HW7MJ3/Fx1IeYtFI7EQDyhMn6tR4yde+5SXdMi9i+YehUy9PZ +/3POD+1f84kOC38IRfczu4hLjx4P/BMwbGGQUbJ7sDyXApJjNJvXcd7FR50blGn9RzLjvoRvuG06 +L1rETGA1eSfIZzM2/pr9VolVSSceYbLgy3hSZSIifDYISL1dYlhQMr0tVkljuFIGTlHDmW8Ku9Tb +aK5GRcVHv5BOsx0NTnofwiPhxrgGVicnQFEJ0hPvWpySLlnRkR0iFvzUqMr4RZIboRVqXFP9tEEJ +I+CwPCs42sCZqdvMYP+rQizdfK+56TXSe8Ckz2Xbbbz63NYAjlIeXgt1KtSjXLUbRgHo9sLAhl1P +JTo4v+NP6TE+qUJHaqSScjH8yc7ZVhMu7/KwW3LoJ/i4m1VgtPGsm+5xvt8PC0TX1q/GvxmPxKIo ++l3eVad1Dv16zblmgkEafCe6WRHq170+C2i16hTy2BKBpo07PGanKNWmizxZ7PsZUR6r4wgWFhLr +McP3rVmAjzE9H7V8C5d5cMtcABied4l0KU9VrC6wMPgR3O+UVkOK9lfprxNhOzAa9y0XRWKGZJSd +QR4URMKTDYoWvPOs01f1R3q8QYCvdpzlzCBqcLVCYjKQW3dtYoLfsmEwLtTD1IjF+VYhJBwbtBV/ +zX6qImaPC/ohl91e+rVIYEq5zRJuA1ZM2DL45c84ld/2qbQK3lBeree5jHljxruuPu5af/MVVYwP +7L63CP9vUGKykseqjkLBSxyTEDcPclW78iv787o4zJcJ3ueq0D+p8+B85OEzLUkE6YW093hx75nZ +vyXsesfBAzUL82UeDa4pxlTEJW1Dia0lErtsfRal+TK3JKTSDkk7fUaqVtoXnrcRyX1gq8KrpcXm +kxhNzBMBTnwrfJL9uHNhvbC5XIQgpFkrcbUaK7qNKAb8d0QL09wl+uWAt/GjD5x4aOO0Op61EI5g +73zeU0ww4F530d1WrLKgNbSz8IWD+ux3Brnu21AvUX/YlpMIMeQ3sLYKWcXjJTFKBWRH+Pw2/d5s +ePuPwH0hBnFA03v0/Uska3TLLi1DC8cPu4oPIo8Y3A5+o6MY3YlYjek2uD2kEi/y3PdgD7d7720j +kOV2S0n6kdyMFvFDfXyGzebd7EUCPHBBu1AfzIC9uBgsMNCcymCGk/XNSz0Pt7FCeUDJE0WzeCTi +CGYoi7gz+H3XHvaa0Rabihp/W/06Aqj2IFMGU26oM9tsaMpf/Ls0d2X9597twXWAuJDpTVlGkxNt +nWtmyofI1ZnEgjPMexL5MYkGtLryHdbkUximaoANxlMKvN9ik8FOTboNX19HbrU0a0WlK4ZAkc6H +K/m+7sQn/4kgvnkaPGgzKUj/wv9Ni3g8zXcU/LCyIBfQ+1uVsW5HL04Y1dI81hVHqR6dauD8nWNm +ESv39kN+OVywyuops9iA3n0Sp88tOmU+PU5xVjundEOjwm8lLiof2XxufL6hA53gfrm8JdUEOn9z +HMmBiwvwB5mq4c0+AeAEvbBIVA/P2Wox1n0SS7MybXFoWE+9ZEB1a3crfWp0MJnkUsYoy/xEey6V +8Hx8E9Vnn4Hhl93b/z9b3XGGAgB9f2YU8e1XXxTG6WMzcDUDs3To0hyFblItLazl42133y5NFFfD +eZZ/D2Ol3DvpRfmN+0l0TOfIK74XwrCheaQc2+rPo/toIZk28sXZYhil5MazTnVfFJ8amhmsVi5s +keglhZPJ4voCmElSn4x9jZiW5caVXPhldrwr1McF2syvz7BFWd126BXdHgITOpOGDlK/1C3qKPcx +eNspD+GxBjTSF1J2G3NZ0Pw7bcYyXdrWAKJjSKXDz4zOIR71HLZudPTrqs7igQKnnwqTTiVgF4r3 +gUZb9bJ7snBvr+gExVZ1IHr8XzJ9VDCpZtlYDx1jx+A2EziXfsIyfSx/tso++EAi9bGOhGdqVxFt +r+SKHvp5FvntXH73rM+MYQFp4+iEvN99VYRh6fp0TO5XH89pl5/xRRJZFWsRHrokUlhqAc5PLAsp +mFbnA0cB+Z9AFg63xIgUsFll/y1Hxl0iDLVaU/NYzPVK0RTT3L0F5p+4jkZ4tiAzqMenQcJwzcT3 +Y52iejF56hQTu/z+VxZUe1wA2hce3ppSDvI90CM2tAz5aQklFMGVH/fgzt8BXn5Z0XFeqWtdUSml +Yy/e15/jGaR0+Ow4z30fk9ab6xvTOfI9an5OWt7q7UtupuyMaePwaqHml3F8bdI+TMG8RW7jDtTl +jJHSrNLPQGTlx4GShcNzgldGrB3QdS0YEN07D+ECGQBp3A45pfAPEjQNRInX3Vy2ploqHR6PuAlP +3yy9xl9KGRhZ2UqtRlJDDb5HnyAl2f0z8HxHKKgbCK8AQgccOq5ERN3gTSCqQ7zGBLqLZX01f6XR +rLBU5NzVtj9ILsFQV/DnH79cxaDf/kfbSkLGRzeyuNMLwpda4PcjbZhB5+guL4fJLcIkCSV98BFW +TNPkOEa4hfD2OKdUyJZVpvJoaA3Ovc+DObYT9XzX04AQ7WueiztTHLTO9iuvumLBd2M09IfAByyA +zwD5TJQdBuF62QECHja0aJvC99jvQHIYfGqi4hXFbdXgzeSLOLPpKXjLTAXtMtKHkvUUBtX6/4cm +R1o19w8irs/6gVbD26tEdUN0PZi7FgygIt4HuJUO52a9yGG4xzXpFw5EnjzlC5Imv6GhXrp/5KCw +Tzsj5Cjmr04T/K23jqT3idKsY8/JFkni0ZZww3chNHlB82Cvn46zdFKDSc9oLFb2Ln7r6VuDHFmA +2sgS8FckRFwt8tazwYo5y7zJ9OCB0BeZOzXkfL7fj/rrcVO7EM/X+8ONJdFHUndIyvbYZ6OIaiaP +M5zyf/ZrP1RMErxMNy2ue4HN7di5V2tyTwVp6IHocXHb1Ueho/kqJnSk813GdujQoKE9goxAsc0t +xUoc2/2hGqANZQH8SxXFNsdsglNmPfcl4obAj8nXjABdzf7rj3Bv7e43CHYDEXSyjqT0PMmcyZTv +0mRQfhfrvbKsflXfO7GUoJ5i1pTA8lRPigZVvKtIu8kL2QO4f4hMRnfYqbBp16ooZQ3AK2dzs5sf +yLZapQiukhiPekBgJhWvjxsfVFdkq97/MfVzN0PGgYmFFA4Dd+01QzFxTHVrgCrSQMZrEVMQ4GdM +exTB86AgpOwYZQHFX1CEu+LdwgzXYt59NS19l310yeapCC38pUmccV8oDLST6qFh2wVkMgLImRBT +gIbrop7OEYI9t/NVMJ+0xynucuj8oX742xTkoJtvH429Owq3o5AvxUNdQtmkxkaBKOhLU0ivZLz9 +vQEVNMl9A7VBOJrp7uKtUVxTmixfLNDtNtKMa3j3IETaqCraz+FSvhAN5HaAXDToomn9ZHo2ZetP +s7dhg29YLSkIBlOIWI9yM6G4vSJHAogLer95D2Awqmq5SU4hEtFicK1wYJAPBLz5klb3P0HWkqln +LfoF+tLm3qIONYME7WsJr4FLVRCNLXMxrVdjfH1Wnc/xhHMndiU7QZfZ+J2YsIXl8HzW4NNVqITP +Y7k0iyxk4pIgn11Egmz+S5O21k/yXfy5dNlYB9KmJJ1Z9m37pJ++zhh47U0LsIHIuGNBUo7hwwMH +JZdaOHUapUzUyY9EGVTeA37RN4yYHVXmnNyNz7Z0anaC5CQGaWe2d0/PYmGLBlocvn9tPLSZGoo+ +ryzQINVmUTXyEUrg0h5m74RMWzBO9hkplTvXOd2Inv1DzqCQtXFTng6PMvDFeiBjAqHXAhEOFjI8 +kB9NrGaf8HMILwn8eVG5zAhOYgKxRdbB2MYP1BRj18gPd2ALrrXGnLaFArJtWO7E43LeOy2UJNHR +AMcFxpzRsSz+aeV2lr65HH9DTuLtKYRD1oxL8jO0I66R5l8HjpnPXOCga1bSC/Gx+sQAbI5QYZCy +6X063i47D96yRKp/fe39bmGpBxegDcuk2amQdViavNCM3hcualaJVCqfMrklXoAn1PAEgrclMBZb +OzOwbl1+Jus4hSGQX28sjOG6NARxVB7ZmS1kdUJ59L2pT/x8Zl9FuBb4ZYuLewqHFYJRDU/wYaLN +4qsQMaT16Yke3qmruwyXEoGy9CNKcLGLJsKopt2Tr+nA4nT31j+qQvjBstaYub7ci0xQyB7Y4NgE +7HOH7C03VuURauEsG+WPnwyl59RvWSyYHdAHayBiGX8kKS0Kvk4u2gx5QQrPzdkBxTJGiOxwUtTo +BKrKVhI/SQGvVOcLUh2B5FNA/n/B5ghNPzhdqLUQ38iq5DAF3FVjbY25J3YcGZrglUG7Zb7rNXVG +MF59el0vkrQTDF9mwVleCsRJgAfKvaRG0O57krsAWZHAYEZn1rMHaq2XeutCOnbN/XJsEqi6ADi+ +7mPrs+scajuuC3zLsuhfRsg/ADXOEKej5tQ8gs6I9s9QcUaSyjWQplGX4Oad69C2qyYzXg6ZSc1i +6GtfnSw9vUm4roRVAjlTKXoUea+ClquDWutuzmlz0pQWzHG/HDdEtIaJhwXgWBTU5OC3xemtlSoN +e39cDWO1zRnOUJTmgxw4jOqSapWez5/CE3QRuM51eejpK4+hYasumjM0jp2CYeiW4QiVoSwntD01 +AW4B5M17i3lTwXjjCH/aK9B79B0h9silI0Q17d9h9ltftf9O2KBItUek049hG4nUXECRgOjCMqOU +eOoKohPGeLs4EDAqO071mK5GSZHCV/4NBEyhOT+RvM4hm5mryjUKqt2pP6VX9XuSCsXp8rESr82S +NCPmxKpS890+oBkZrvykmFmLHxcDaDlJ8agfuTyNjE2T41CjFEydq3XpXy13Zi04YEaxtYYJ4w5s ++TqJPVmSTb68vgMHcXR3pPm7vJefIp8zHpVDPoSbSUI8JW7lrDPXnUTqhDf9PaTzZsAxut0+WwQs +IG9L8t2iK5cXXKBn1b0WjxztF9yYkACJw+A6CKQYYrrZJaC54T5dHKPXo7kzoQWQBFRbfy7BXo8/ +uLbENi8sMf4Jx9+l4jYGyPr8nfpWA9SRHjuABsb6Ly34EdPJr4387GNkZAqxPemv95eUz12pAleW +v7s+x3SKkMRGQPFNBpOKazNe4X5aCIwD0CdkuflvbIXg1IN9GKLKREUESouk1MtftkJ9uoBsVLrj +GgJvpfRbu6mCXrho4p5dgTwWGsB6S2Yj3m/HpfOMwC4keVaZTs9Fnfxt7RbjDeHPW+SiZSY9qYDW +dpJcG8sJmR8VVpwLdCwfKgUSCs4033ZtwJvqjoyHkxxZhtAt+QcfUcu0jAaX3pWmNmHTGqtBOB45 +A/GG3TsJ/eoF9jB5gvJObrD/9fYi0iu4uEz4ZB3NJa6A054rH7uYJ8vZzky8fOPbcr1bJlcLyUrt +f9GTxNMKGLdzQzWRN+d9XN7CmDeLgI0KFBpFCkIa34t7PhDks1+QwpIVRZWBFvbGO/S5VjDjquKM +JN1OLSLfWZYv0h8ZPjr9G4uT7mF4xJTXK3wrVHQ0Frcz+lCLnT8hbHmQC9QX3sEjBePoC0jTGiZ1 +6eebC3gYo8vJGfyhrWLAfj6n3Nr2S+7dOh+Fdi4urTBL2mxpT3DNDMlMud9JnAgSlShG8Lop+Pox +DkOXAHKvZUrlonESSvr1HhGyx6HaWaJHZH1ahhpMQg+ef3WBqlRkHrP5g74gTEM1nXgw98/csZ+k +JlZedj7rWCEhNfQ6NjNhLuKsCkWVDfxN2OB3oept9yAr23iQT62rOtz/Jt9go4llB4nXE9r9vMsu +0c4fgVy9uv5BKGeRFR0nhUp1wM5/T2zXxHMVxfXD393Lp56YozEI/mkSWFNvTeXgFPq6O5WBbnZQ +1uXNnrz6kG9GsV7xj8sxnekc+hRAOOehoOA+gotFY/2oyzinbGHaFVXlhOO0ULPF/Dqgamuza6pz +IXvTbXYiQTBYZll2laH9dWsDKRI38Vp5fzFJW2k95p4yLa/TGgv+KDzg27yFX8bATF1d2eRolWpt +bt7efarWi6nafP1KointvOfcZkdx4OXFbKPKBiWSnz5ekBUoxyCAQaHzg+iiA6o88Xx2CP3mYzty +XliBSf1X+F3m0Tj6/Xwp4qaceYJyYa8vCbg15EUCxM5Ar5ANRg4OBXRLRIRoomcXJZoag4bctB5B +zE8vzlJ+ZGapKtee6azQ7/crWhb7jBn5gisk2xmvqxNHEBsC6juvIdPfzUjMwwxVExPyVYnGrrx+ +JSw7+MT9dbmFocvla/HwrbIDTsTBR2SNYulaleZmP7Lz2xgzqU1eLJjD81Jv9uN54ZVa2JjgvmyW +uL7h8gpYM5pQlQ3vC71YrXAMEF7/zl9rMEBmk6PmcWWUip5F6vXmqhD3kpmTamnct4mwSXyrigyA +/VJYjXwfgWwZZq07B7u13//sLtNvf3iHaGBpKyTZL5lcLUxLVEtfz+E9r1+YDGkN+8UaEgVUWgFy +Ae9v+M1573+GqLqpE6mSLuTWkDWRlRtDbD8F38hn6v4Bqh0D1eU6fbB3QdlcUwQCkmXsmXibR20g +cPTipSLTlsoDIjolRVv812+Z2eDxRb4J7Q92oH4F9jO+oT0MCY9+jAIKf7llZRd8rmEPVZTM4fq3 +l3h8jQm/gBHJev+YEVNqZ42+mKGBmDO3N2C6yR81cFpAI3IVlNOqx5FkBsAssXGTlXAkgSTT9kmD +8PD+v3RFMgslKaM84475Lh6QvOE4CI7ElY6Fe51t0t/yEuSVe7ZwHDCd30EYPfO4kB19cxBl0w93 +e12A+W6keSbfnM5pMWnTfMi7cO9XypKt3WwHUbnuMOEmxao6FkT1+tkLmipFcuVh76ioyDtj1EBb +EdQzKyNpOukxrL0QOiLEKr/LGYZnQwcJYSNkX3N/iwDLrRuUhNzKx6GO9PdZ0/uvec2ac3xrwMXG +m+Ayw/70bDIrJmEwd6kodLO+g0oO5vlN1YCEhkc5V0h86saQn4RnylXDv8qd9YjQGmBhUwTkZZis +54wIRojpfWwVht7rLP4yl7dPohG6106qfu0kHZRqRTKkF6FAqrhAt8HMitdo4Bq9a4FYxR9JhZ6N +iveL2reiSNCuLPIlMBEPmUaZhXSsoELlqy14P8d/GLF4Zf+RFOuK2ZHpgACmzzfsgxOflU8SrrWf +vFoOMCRIxGvPPr+ScBO/Hu6q8HJ/Qp3GTtcIapSuILunGca6uUrHKxDuna7dhECWI/3fwSsVkrjh +SsWeYDruwu4pIfYp+OXTtkOyWpdIY6283MwGOK6ywk4LtOt/m3Htfo7nJ2zdz7mFt4ljKhFr6fqG +tIc182GulpUPEuUAwEm/OIHOI31QqDSv+2+FYZIztzxNLkImqpiL5MMHs3pL2X5hAdi9sgKD2QF5 +EJmqc9fgZIerFI5NIw5OBlTRWesDvC4/21IJRjFZZgHbn906x9u3SlY647imRE0qECfspwYgElXE +HbD+U5Nt0Pn5UorZVZQ4wGkIAjbv2OC9FHLE7kfY6ocEeaNcu6QLmHGlaepNFRcM4LlPa8L3z54s +18Ohz8mM0cvrksZYuyOLi/GFgK4F2YqGoB3JVrmmQQn51D37zjyl5LUfyOgb91m7MM2sqfjt5sd8 +ljgtcWAfN9RQWBl9UyJd39loCsFFMiP8pRFg9jf0O0uXIp6Pp6OcB0mxICwJmUoHo5fFN5Gk1h/D +Sws5JFA/wLKdmSNDZDX9YH/hGKfYtU7mUmY+o9Bf9fB/EQ4ryzj6ViweD9BDQGte8MOT2RwuXEhC +anyzGXJc0qU079I5+iuTrHz7OTLZV+h1hQ4jh4zLWrRTI1NdK76b8odFAi/77u9ImQ3hf1AA+7w/ +m/9vHjE/F2OI4z8yG7XIe2KJ4aCwwDTIkX2RSiR5O3Td4NzoGqs1XjzztzhqCzGvKRRfL+ralOmM +pdpve8W4f/EO2ZtODuERSzv9DVLJW2rxFx58tLRwGtZ9FuYDiUUoD+oIUdsljVsaPl2a1LduXsnA +/QnjNyp36kV38nKQ/8e9ZQV+D185Sk3VWFdQaCPX7jeSBZ7G3ehRnHfdoL3sRHFg3fhx8CiXkUS8 +EdTuvP/ed0W44Q69zs9BuqqYNk2s8KViZUBX7xUncZ1pZwe6PNOM51p7+X6VgbvR1AqWJB3Op8fG +M3pfRHDBqlYm9386Ya1OPdvPuT91dItMA3wk5UklEPrFoclCdzcS/+QCcHSAFpLkgs9zEP5XBTQ4 +jI0Bca8+0nAnO7Cz5n7LvXDeLsped+J+crwbjoxC5meJzMR0yso+d6pbOt8KGRiPnaOHQmS7+wCC +CoQSwGZkdPREeGWf5a+bXN6LUNIQ9hEIuezWQihKIkVaeBZxBpXFzc9mOduhof6oCF4s3mnN4HxA +IEbTMyI1dR7Friw9lQYl9ijTjaLz5JR3d5GbRmS7F2wNCkifXlx7SslvZ4/bA1KW1bG4XwXke9qo +t1jjU5Ik5L7e9JQ3MPmCdTCs0VQq2RHfAQDGQlf3jQxeeWq5ebCoAH8+mhjH9TFhaFfL1ZDwD0Ib +3rc953XsqqSKbr0RjpWnJ8JIarGZlM9aVbIkie94ZeVeog3kika5ApgJRly0Jfp1ABULGyslf3qp +15oRfZRU/GdfoId9zrhpAvrAtwzOkQ5qteW3x/8PFRZ2JUfoSEoISXp4BBNitGO9iFocHw90DptE +RKrEgEeqUJXfbbEAK3UJ4bm/zsHrPn1zFQzGc/qX/vcFpbKWdD5kSJ+lTG8YZpLkwe7R9d777GWE +1FX7jXQSbgPTIHfa4ADw1U0KEJwggQ3zxB8tLJ3Ft7IpbAkL+tbVAxXFu3YBLwt2jqO/OvgE6kK7 +CoWuQV6DsTKFlpg0lj85SYuoE7uvisxSa2uwBLGed95o3g/uW+WdW1dtP9Y3fBWabyxCzx3JAV7M +SkLX56hmPwxp5De2Al0jpzawwyw5zbgUpX03Vh7BvpBkbmfpaV9WoMg4wDsLvqdPXGvT9BzNxLbo +7xmtHTLIdP7CI3uvZbIPKO8BT0WCWLOfIEz1zBNLb9DLRkyJpbOhhm0FWSKZPzg23E30haoAQvx7 +9TbGrkRgvNyu8HbvNCU1vD3HR1wHgRpkMWizzkVvHLndNxoqs8sOgSuINee3tOrqzalmDUN7kK6n +tT9m6N4I742Rax17RLKKJysQy+atyhNaB3pKEVqy9ficJOk5zCODJwhyV/RvVRB5/IeUQWysqJSk +mEzQurmFQQ5X5CF0N6tZs+S4StmCpV87SWfWIpfrs0bW+dawxC9cmwjC7w/n5IgG/GYPhLSq9hRw +G9YxnHcHD7Xv4+6A7Dsya7hqcD4j10vuEO1Gh186yqmlhvbb9I5bZq1cFtHBIvnrLBK4rpRBnnUd +SKWk4N2L8kTw2xLi+5Sh2fxw1XNhlGzDQMBQzbN3upD18ZHx7EZpgs87aK98rso6dF9ro7keT8JY +qFB4xVNeIBQ5s56fbIpnRd9+R86ZAcgkVTKcrPnxwHQRkyNbeK6P95qVx8f/TaUbCxkLXnqNMbqg +JdcveO16j1MerPpby9MSzQlWzPPjV4aXipZK+8tfc9+6mMsZs1gMF55yFEPWFdRJ2BOzrdqzHUBW +p+49BQCDYj9fMdgaxuP/Izv3IqIz3rQ2wlr+ov5pIvPYxUtrzcLqthpoJwC0T2PVTI3aZOYIk4gz +mEoIlWDbqQXstKoJXzNMtO72NhbUJcDURWqmpRohumKvSZN2c8mUUzu8kyo+lkEi/ylDC743roK/ +QOxP7yq1Sw3U0IFcdsYYsBTJXGZzLB1rIRWtif93qV+jx83L4al+ysac4z6QbkM9VsfKKYBCNEcd +GGKQ3PhqwnJZ/AWXftH5WG1rIx+Dgz4BV23+9+ydHL7L3sV3pH4zSBL7m6PA0e4d6F/Qhcq8Rc9/ +sGF6cSuU6eapKiprv9C8NqCFIQ7NZ7oMI1+qLNMXzlxTwyvyiPhV1HX3Qy6linV7s9+lewFZPBpq +1v1c8l9FYRoayVg7tC1jYiwEhY1Ez3S4TRcrxQVG2+Ee2MQBaZfGSDoX8i3f1MS5hU4VYLWbR1sM +w0HAf8cO/7HZv2Yfcu1Yat42oFnkB2VfNFqco5QFPVh7srOEeCIlocuHuKRGnx/h2chsPnw/fGOj +BBXmd59goT5tgjr8fihjHmMQwCKpjYqoZk0HfLfwCnS2xo6sQKohczQTP230B72eYpIGeTfLAMhp +doG33xKpG6/VsI7y5L1x1AcPqnkvhVnmGu7fvNi6SqtW1xTtwiy/RJTLPHPTguyJKPnLi4v2szNO +hFSK+TlSmUjp3GJ9DxwiKGVFZl2zL3basiJwXkSnLOK2n5g8BzbGuvuKinPVVTzeRE8dksOahakY +nXLQORnp6//ybH4Osf/v8mmaDA0rH21ko4TbwjLk862qtxkSZqcdS5nnTU/2kSKvfG+tAbqPeSNs +ounT8APJG+uVitTHNIpFU7kGxpljmUwxlLqQ4j9LBqXiVbuTwYQYrH+/PGwIEDpvb4dvRD7kBGEn +jxVL0vUB7LrUM3D/GY0wMRq92vQz28mXBM6oP0HYEWwfNOhgALtFDvqKvl/omMcQf2QMEjGV/LSR +ToE8BRQgz8JvXjUe2z4zE3XvAcHN8MjeFWbWJIcQc9DMAg2XsOsHrOdfMy5Ohjt5whVgy3PVF2JX +2TdfAxuY+n8kqfsmVvdPyDD71eFFzzk/cfU8Y0AnurHnoA9s4sB3X80peBr8T0tjEd72M3VGGZle +8QX3jClFCEJIcTWUzS9I4Fs7WGyO4yU8vAVJM6tabz1iZdd/QpbA7AkmD/D7ClYsQGZHcuRsAzHH +2bqOTdhdGAX+QVisMErOfhU5VZdx/bcwnJwdNhiLOfrk3thto5hEniZTBXMcjlm4tJX+4TPmtCys +fwfmKbU6+4nfKXYj6s1zazwD60MzyEn+GDjxZ7f3LxNSqcYChmTwXGL4hjGAJcGWjU0Tx1wcKt0J +tEfMENJjHo2WUCYED4ZTBlD3qdZ3Io/pVUghpj8kF4qNNSQAGxgaoieE0rSPnCA6A66Rlx5cs9Qp +RYYrSF1IwEoPt8yoY15K2aZ1Hq7Uiw6dpKFkd13Ia2JnceekGetn08FTibuMiCe+O+yckRVP3HdQ +kYViSgzpXzJA16PTOpjvSpoMs/Tw9tuqq21mu7R8vbMTdfyqHqUay/razXj19fupzaaLVJm6/0We +zTF7QO0KCYZUbdX6wVeAlebq5pEpzaY1r2WWuuQydcQMFfkkhEjb+sVnkReWubbKbEKD0WlL2ATe +UpkEyMpbGUk2ZOSZ230pTcjiLwXDdi5JtIsWbaS4k3r3WRq3RckSCwNL2XEYgQ9xsJCIQNVV+av5 +JL6tWcrTdIb/xU7ctJCOwXrr4FtB7SCrY87bmK0OSKzCnGW9mMR+EJS0/82pkRfmoEUx/ClXTtIK +wS08SXueVa+2sYkBQK49hNq5KeccTU6eJlrBVRIiEvnPcS/KzNwXo4uegnWmk5cJkzJGhg+W1Mqr +UfTreFJ/PtELw32pJUin06uiGJ0lp42qOJLrjDc3NgGwYWRNb+eZuziPM6OMj7v6GtPgbZlIk+Lo +QFTDtQY5V9x6BAkwWAyPxZW+KpPUY6nmw5161lIxuEpFoiWPXqUNxGK1LPz5MQckaCfBlBjwFut1 +j3AT1DwL64wSYs7gtg2ehaY1POOm1rux/ldAFowHPygg8VSJU4ZrkUWrKF+KeglEbZdvoPPTBjqP +a/uV7ViyOtmYTwlmksXbwYdmRhTJuw+yCw6f6hFLYGuiNeMKf4PK4owQ3pX7zU4XUv2G01pr6LYy +OTnnQLsa+xbXSYyiXI+LKA7TdcGV9srue+Yuo0dsSyzKVqlvTI8qZt7/ohXP6Zm6D+usSCwb+Hwe +g+obteq4TcGgdff2lUfPd9wGetBpzsMien1nGvXX1+C3r1Pj8/Xq+UqMfyL5S16fGJtefYMtQVpI +TScdcNNbQSEJtADlBOhLyzIU3UhXt5zX9o1M24XPR+DSp+VDYpLnho7uvkilzegGNIAKSJjmVvKO +cR80AidbTR0purPliwV5geIt90ZTRB/PelD0oAdGuQJrz4xrtN+VLsXO3jwwwR7S60U+GWR3Onys +H0yGoD8ojtLC6m//eiMdnk3ZjC2ZgOJytlaglmGGS8qXx7FmeMPSgq/ma3XZ8zhJnO2ssrAjikvq +hrQTY1a19hqXtCvQhMYdsNkFy/APfqcpMmMbCYewfn5G8PMn1zt6FbcxYfBD4otoJY5h2bGEhE1s +HkL+w36BflROAM81FNHGjIFJLACTtJuUt+Q0kIFiBDrPkX7zOQVGe5G7SJQt13ZyrJKRzaKo+Byb +3CViipReaEJlIrVyhgvmYX4V0jSzImpy5C58tdxOY+i0TzUppJJ7XBTdqIZEKTs2fnsuMgmYZpBk +tTtji21Cn70Yr0/ULzsgPllawkg64Le55wNYKz0GctY2N4inI2/HPadicwGas9ssd4TiRfLS5uMO +ZqqBkGfufwfb78IZBVF0knLOMMy5/NlGVL+uJ6sdzhUOk6U53d/MlE29SrQV0f64McmPmfmtvzol +T0NofBbrQiuCc4So/ca1fOAQXGrMDSwfzBLLHGmnszQxEsGldg0t2CQutE7y5INXvaEtO6x7cDEP +BAD1uYRIlTvRQzeKqwCO8N4ucUYHw+V1ulc8LFLfS3+46AVEjMXenhibjJS3lnbsCr/VvYUUVEuB +QEenIsevd4n0ggVaZTH94i3UMCB5nuqulgjhByTDJrZbANTgQBx4mu8S4FaKTshyHQG1nJimc6dC +3jxrQhj1/kxoK5mc4WkElOAgaDNhQrqk/B/KdxKBPEfzKPngCK5cUrJMEHeB/DqYkvs3ehxK/tf/ +reHMfGjyvW2Ntp0G6/h8BCjOiLRqt2b7n56QwwDC9AoBaTMvBiZA84ka0kTsHzU3K1yI+L05ONHv +YyRC0eRaYMNXVK7WNN0vrCjnntZRT7lWlGA+SLWhGmMqxp4PudZeZMTHl/wfmjdQdobmFFRw2xHy +duuuNEi1jFqiyfkcpZYIiG6vuH5irtB+8FtNn9ExK5quCSZXU+rA1BnJcmZyn9i5HauEPtwph8HI +Fo08mFD66Ibzphpln9g+RilXEaRV/abPpWBu4jDClrQVUGAwdbCd1a4J505zlPOUUYhnUK7FioOT +TqEpVNK8RyMhJNsX7wPOown997o36qQYJkbKL+W1xRAJMM6RQfIPSX7xbETusgDW92cKLgc7TVfo +fyhhroFH5kvr3dNG7OJ00kNeG0v24vMvoKvw2XVP9mT9Cn+8jO0Kwx90zVJEhQYf578HcWUulpy3 +quQX0jGY7fjNWSHhOmYsMF/NZVUBJ5nE4k55fL5cswzXFGTlKceo44mUR9KpbSnKgnSrbueK8Ne9 +4HQwyyTVenKsIgYoMytTHS2deOCVY9q0qtZ/u+DV79KuFkq8H9/pMz4njOM9ifDCle4tslOu44zo +iLwLpzOruD+6FE5H23aCu9GDaJUrvRIMvr5+yde770y8ioqXWBS/E3r3LLKkPbfxGW40Z0SmXxU5 +/6IG/7c2BMPWQNfT3sJ9i3xbonHL5wMmSdFK7tLxVyc6yGvrdix24Y4BJmVOxURkUGZmAZQUb1M9 +G6H6UVPFGxUxsYdOpbSZXlVg3WRHenqE3KlBZ0aYy0oU0JqFm5rQnYAgnicNn8nMIAbIsShWxMII ++RfHrwVv+w00Ejai2InLXu6Qd41NI9cQ/fLjr46t8NPrjt1MnDPH0QwMbEvYcu5DFHNn4u2qNRD1 +YbGoqOtSHXWWM4mX8O5QJzToxr+FIpQjJPNX0AiS6SYNnqWD+qEIPO1melC3NQN+WIlBauePAqqH +uIdOExPTtHAuC0l35Pg9cjSL1N8tL5kPmcvrP8vLCK2nVuDdFvyfgeA3OZZaVv5eG7NXXb2OoFgt +JGfpbBexYOCMMHg6gueClge912F1cVHGTPKrWIDMTLT413O+G2Xl/TLwVqrro+tGHzNvhFuxYAIL +0enj/3ODHLK2m8yGNuVhPkaeXnIjgme83I7Aj1rWOTiDLaHaLxfvd2Gl4LvfawyejnioeBL3BVvM +yI6EfTMkghYm9z5fJUdlDR636Vs9NEma7oi8iwaTDP01gbRHC8nwCIShyQX4LH/NY4SiLhnufaVg +dnFqIdmFD2FGQqJTTc88zEcVw37U2Ul20ehd2oKtTGrsAk52XL8bSB/qcN5SSU+8k0/IVgrX/3rB +00vYN0yinngLZKcScCczxwYqhXhrteWaKELNAxLNtJ/NO4jruT6DqKFtY4zC1IjoBPQUSDP3KFrs +4UuYh+ES9KYaKeGOiH9jAYP6AWGAnbf/+763OoS/E7K6yFqrVAGKyRUl7McT5/P5RieXMe4aHDvF +yc8hg/T4E5qdUwpPU5LP/vLgBqQaP8QZmYn/cxMBOYGODuygBqUzaQ1Bq31K5lvSWdIfqxPBlUVd +AO2pRdA3f7OhpjFLMh9leI4qfbPs7WTyOqGjJ4o2yKTztrZ0bfKXzvaSM58pT7WWy70jjSqo1S7w +E8UKoVQxJxZlbEzIkX5Y1hJbYWas68FH91XoMJennvyE55hZvAuf63u7FJoSNUOYnvPPvnXahHFb +HK1/64xqahzg0dhhowll+UIZNMwtYrZNUNudBeg26jDUvcJUJ3Dsjzyqrfe87BlAdNoBaIgHOBlR +J8IF25/kiz9tsPCnzW/otjCaOb4QlFJkhogaKjDLXSEvPajHMxIYoqOdu/onHBGniUIV6RY0wX4J +9MWxDSL6eEtwOlHIkJNDCtVRlNwX1bmDplTWgmHm3nfxAmauv1TXNc11ayu+7gUsM+iw6ztGpxFd +qGPL5PZ/B/gOpukllwfmVETflq7ef5TjBz+Jqz9EbpYxLlmcvAK6u684STySbs8LuPDZ4Ql7fCj/ +3kQRYksbyUke47jJYKMuPzS/Pu9XDeVbtEGaF7RT/el0R0g5FPQo+uNQYVoOzWl06RlUfqIOoox9 +Yo+jM7jAETWcz1pO/b9TIUoRARrK33qTJQyOiOwGnWrrrKDaNOs0/wBGlHWvINFMW0n37hnBkXLV +xH8Lq7a5prX77iN5q9LvU5lachNcsTBTkrHOIocfww+tZyywSBdcOaUeUI/sikaP7hhdvWhX7OHK +gkI8MWMh1PflCWYk+sSmdJYqVsO75AIC2ipM5TwJ58IeatpnHLivq2xJk+F/DgqWLGNN6Z1uWNQj +qazfovEhXHObZIIm07hrnE+HBaILPr/pPwszL+ZPXlGf3IreXa2vkoFeJ+38Sc2e43VvH2p3k5R3 +5reeHtJFaEvsFa1MwhuD+TmiANMXGa/Z8H+llIeMG5RhfN5ZqLD0SWa9OagqcoSdhFI47AygkeMo ++Eq+yPuNGNcI7AzeGX6Vro+afIvSu401n+Z6RhITezfbDqITzXscmD2XTjHdrf7f5UGYwCuVRGi4 +PRwwa69VgYxZ6fKjGadbaTZ6dExHkDOP/cz2B+DXGZddyYe0gpNVZUuGFv+pdp1nuWdQntXM6aGW +Vpa8yc2DUXDcj2ODiwll6zkXr19Sdquvv68C5hNV1C+kDgayw5Nyvj614rhAF5q/sDdwAS0KSPbd +k4qNsuh+4/6l4oywB9OWggXZxet08loNopo/19mDxIuXS9hPHR4dsWcA1xYRrnQC1I0Gglv6QE/C +AZpq32tjoeceas04Ukwb/CCCRra5lwZkdfFBN8/w26gokDyJ4S1g7FUuUbfsWlaVDv53u7SJS8gb +aA7R2pfYns2YtTpP91ll+PeywAxolKN+MNz3fWm/Do84MCDC3PeJa0s5pKhDprxoS7boa3ZGLgHN +7osmHJNHD2uAPblSMA1PQy1Dx9GkGQV13NDvApb7MHGBRipLBOvA9ZYWICKqcauTda9CcB3WhOSf +Dr2Lat0H2iWQw/R9cqFTZD3PdIkeBPKKGrewBnbd93kuf8iH5tVfcZYGw4yqC6RRjP0+37x94WkE +hqDf00ornaQBODUqEm+Lz9m5HTuBiYNX4C3hT+hJvwmhXPlgDbeVPDhWYWw636SXLyTncUhhHBrt +qXLpsrhXbAImWhlo2K2ueNCiZ+E7jSc4ha0As2pGInpQFGu/b5xC0qklXo4pRKlxEJ6y6QvpLdgM +NDZjHTl+RgToTv7C/YzdL/fgVZHCg4NtqQ2BncdfMjGepF54mfG8N2NcXcZTyHUIMAIfQ43eBpfS +tJR14SYVgGWJBgMpo6CYU3tX5TWXWrWHvH84oxqOzoTG+EaLaJGC2nddZbsvuy22klcrjiA60SxU +3r0OTloooiuZLY///CennK0e+poInQGcYerCIZN9xbEOjLUXAaqAcg8Wl9uOEhNvFdwWr+uOa9U5 +hAOuDk4Ks0Ni0rRw6W+C8VUlUf1Mhwe02AFcKvXqlRLX+gB6NyifVPGcE2cdZGUSu+Horfai5KbS +/32Eo6do1Aad/f7KPLFCP5vGRhvbyfH91//438eVqc2XZtglrGI/eai0IzzonyBdBGatZW/YsYGV +Ose3qzyiG3hGHaVDiyvXdXLuG8trJTbw89ompG3tO6vLvnJ4dVghU39nBCmmU5HsF6AZJpw0W5sr +N5xbbNijfpJ9JGvTY+oqc0NhZNnHN45HQpUA56CTCkIW3Ncu23D3WYaNQnIwA29CPkAh56ZMf9PA +XjeJJ4ATJBFaAjrpDalutgFfvo5Kll+V00kd6qLVUEZgdMw9HSizb/o9nUB2Kq4UZEnyIwFc25oW +gAvvnmdbwYMIjNkaYWZzZvo1+M1P+l95OCFpCZlFDZ4QPypLg4RIbAt8sk31cv+PEG2c5qP5Gymb +I3IkrMblFAYG2J1yMZPr9dA0UVeOe61EWodU8jFbQICO+CTCBqXiGG6ttAktcxukV5EOo+Hqs8rd +VNoVhsyhr1WTKheLiMEA0ko2qFR2jTVwXOLQz4ObRQLUKVNJTw1wXb3qFXpbxq0CMoaVVztuVTeC +Pi5/ONtmeAOwMc+HKSEyryistnA2l6QaPcw/bb9fkuyHoSwV/ROuNgfrxHZA3YoPGGO38swtD+7n +YQbHyPt9UTq9Shvu8zGVnKj9Rcc0J8PE3uQOoHr529FtE938wCJyLAuk3emQvd1D2BL+P33rGDlX +g0TgHMqL8678gtV51TQ7xtyrrFG3cZ4V2GNqdiLQEjmhAZvWDedjMQq5NE031LTNYpFESMwNrJuC +koqpiCzJVdhMGaZNL0V57G6HED3c+qwXY579SyeS4Jt5pZJsS1HyvLNRFP8Kz8USm7G6ChkQ/kuM +Omxn1FtLPLhePTfhPaJLuu3ytxqInc/7kUo1Ttq8+hE+WQoFNhsQF1BZxstzpQ5KltL1xlxcMGrl +go/F9iDfEjFC3Q3JBCh7r/LoUC+W4ApIlJ/YXJTZxUg1E7FtvfETU5M2gpFg8Lr2r0UvJDK6NBVV +1wYH9M5AEswNimO2/LEpv5EL/a7SjwTw0ro7hkyCYzOTwtlIEhhAVK9OKaWKUb0ktultfbZJYFwD +2ym6eiPQ2j70cf/VHYzOpYCMUnjGYekKG4Vi6mBZETqlzWtKIlGjkJWCdhcGfE+S2yCeeLd0nyKB +I6CaQ22TL0NB+WPJkq72v95xSIM+dTjbQU5WaubI5l+s7ZbaMmmyXOKbc8Cor+1Wx5YGRJ0KA3cy +mZWyftKeeHu1CuhL86umsA0iGOlrEUNvExtqmcIeHErYss9CgSp2UNnLh6X0M80qw7CXddlG+LzE +GMiOJRfBI/4esaDRIRVYwCCp5oEYDA+Xgo7K4l5lu0c+PRHbiVFpk6vhMgbVVoLF/dlSgwn8Q9+j +nf7ggR2I5ebB/g8lUwAHU62Je0RDm/zjf8+aRzn01hR9ePzjBVXW4vFCr1MVe3vBapORVsU8vKt6 +ReJ5j2IGrcikc8abGeqgjnGv4w/E+/R+6unZ5kIfxNopAvUngA6iRyWo4sEI3DYo0vblLXRe8u7U +hM8+RLdt/4T0Wf+X5Aza6TO8w3lspMHnA2HUwo21GXsdVhSAbL53tRA0Xf+uT75DkZ6mjwbJQphn +boilJ2ruflw1v5CR/wgxblBLYoD9wTN7nxWvrKOCWCAZ3AUY2ZG9natANAMOfe+B/rz83YnWv0gB +dyVXp34O22PpNjVHIx607oMYfUpICopv34JNQAxgsZ06o6uzcZWTTuLHoaJ3otlDv/EecOeadZgP +2dXAY7ecOxNrgSbejsmr9FsWTBXeHTKTirPRqtGgqot3gt9WIhCv/GYPVhoX7fo7UsOGD/P5Mqh+ +jwI1v1kyB4xz2uMwPfTmA93Oi0xhzHKnOP0jcJwRqTvVHgmrVwoLmPKoRQb7qa4s5Xrig7jI+rVO +D4LrVlHDlQ5PchXjWU5wNq8BTEefgbrlzCvtKHmvcN+qFCQZM5dhx7blg1QsCKxzo9XJEF6UPO9X ++3snDfoTa6T178ztXMLMpQnQc1Ac8pbhi6OZgf9kDCn6Cql8rDtTd6xIHMfkZzO8VKxUM9+fq8oh +bG7VcSkZFjuwrj/m2tArCbqVNV7PN25W0n53WaeGPBg/4EDvYcjVvwUOBUKJ1f9cs/dpOP/EeRTH +AsPf8cO78P2S/HyMTP1kU0JSGUbsdItcnIjokYJvkAGmK+S4wOvTIDEO1nQfy8mYGcj9CN1gXUU5 +J5thffavjzqMZPi2FMJZWU1dYTzPm+pxqoacfQlTswzDCuTO1OtctrVfbCAeTdWHk6xtdWmvo6Gy +dpeaJb77FAbhmb/WC+VHZg5+kAW6DrpigKXmCTaQtEgmVUV1VXekRUvI0vI0JUM+61iPr0Sc3ayc +BQw0GiM+wRuy1do9NV9Z2/w/7Ri+5LZWsexZm3+KVsLBMStJyxP0EuloNda/p+2LFinZc+2CikSf +coF4rJYAyQFVP3MBRUCT72zWVvZk1gpABph5f75CofxPu/TFHYlEzmApxrcZM3iwpUc+2l5LfnHt +kNajsMxHCIoPifVUIIjfguQNT5HwwqYww+WKgE+lJTeNSpb3+eibohkc7LwWy4kx1OT02hV0q5E1 +w8VaocbZXVAKUc8lpXMA0MTwntzsYv6+vmxAK/aw65wTflH4ySdreR+HJ9r1DxHNFKieANMsNdC4 +c3FWglhmj9nywCc+YhWd0H0A2tkRR7fHHNMJc/+8frllZ4w+myS/kqnyniZFhT2PspxEzUNWNPut +yAiwlEMb9UwJ4ZsXiEfE0TjVuOUpIbO//9IhRZYg4Kl37CqBKbWMJ2CEaJiVFCOON0dmQf26dQYM +S64WZV/tHXsAx9psNNuBazZsHaRfg6XcOkoXoMonanS/lvNTnoauzw33+2CFyVw2p8dBEE38P5Nu +Lwoq6DjV506ZF0mvFkqCjt/XbWhC0YeldYPTjB/dB2r7Mf6OVOFIagXBt67mlLc24r2XXl1DPtMG +jR+lMtQYRk9epxe2seQpkXotg83y+BrhNNTm8dEiPfnxfjsOCcZhwmzrwMXcsPyAGiLjFej8klVM +Mofy+DELMEm1JFJWy0bYqDkkfMxQKLrP4+iLFyY8OhJ0OsC3rpmPFjjsD+1OqUabypJdFgZAhc9W +MnLeJGLTfJqlYsWoppWI8pbbBUBnHg1YPbyZ0SY9oqk/jmKj/YH1HTxdxbRMZEMpDVi6fjUp5/Iu +YzHDC+v+GUSOY4iQwn9ttLPz8Z2/keaQ870ipHBAhEF4RTy9rVKRAU6VB8gCFIPToYM3gP0ScjMw +OWv3/VTENbDEkwdW+b0gKRaJR9gprpdtb+klDLC/8TbXeF+Edoxwtdzm73NhwczcJ+PdTpqds9iB +WXZCJwaXFEOtiLyWOImAsHFe12LgRQgpteeAVBBjn8lY7H97pVbV92eJ2u3q5Q2sqpZJZmdKnE31 +CJ/xZpm8DK/UGcDlxqJFsTfBP9BCkmTHx4zP3sV3Ie/9iVLWILS4dgGqOHQULD0MyELLzm4hLS7B +qaPkLDPGgKsdZtaJImcCa98EAC416douIF4IiQJdgvNckeYaUqAHv1wN6aXdB9OR1y1MRoSxGxCt +jPb/X9L9wBU9uwRj1kt1EzjZuB8GgN3TDKt0VPIRQJqLzKlym7FG20BptFsutb12K5/7Wy4tPNDW +T7ObycHufvjYELWIkHTLkRtp4rpJBd+pSfgHk0bUG19XcKfUOEZl1n2xvOavnlLaHPoWqnFLV4iT +rJ3BA9B4E6PdPrZ+54YMwSSI7ZzwzDbjZGpqGoSrWybaQDaugUedgTqj8hY2tn9IxMEnuk88HCQ0 +e8OyyVMwUy6hLSjDlWt99phNeyJIVM8BbBdZT8z8QIVWxe8c/J0iGZRWd64jgPuarQoOfo21eNKk +EO8yYXxUKQ38GZtxy/56e5UrjisnJ5A+iA2p4DYu08WEHRsWiyKX25eCUHB3gVGP880tGyLyPYoI +wfqLg5VCNxC+FkvXnwrz8ZFXgQ5DtCVHCfiCxOZeGyU94hLRpd5qgzcijQcVnUw+BrpTdYXdSXmy +fl939aHj719shtuatP7M3FQk5LdMn1VU+VgE/rLYF298VvPTpRWzhtGP9WsuZ3GkGE18v7Zv2hcg +AkK02bbQdlexLExbVygsxa4A3aAhVP9RN97EB6rYWXCLDvNv25FrKEOTZcUaWPMq0ygcXNCbA9u6 +25RLDLt60kg2f2U2OVHKrzBstM67QrgxCBMEvAohxftaCZi8FhJQlNPWeWI+5Mtvo556blNxxAzS +Ir7y4PGqipSmmJhhFyIaEiBGP0qlovgfNFz8ML6xzUKYBxYRccCspL3nQacQikRFNm44nks2P1d8 +z4m9Cm6lTrySaOu2NGs5iyjWQd5quMM8wKAPervwquQ9rhwwUdWInQme4eMepyl5KQ214+vOUKag +nzXGhWTXdNl0XQKcw0SH0KDmLyPLuxYW+o0lbBL+Q+6wbIdyOHnMmOkAfcOwMoGJV5sBWnRn7rN7 +wHUbM4q1qeuy5llQuSfhJJ4Pb+IPzU8vNwniWHJz8ew+Zl5rB0YRvxz2QmLgOim7qMCVLWQvCoUA +gSNRalaC65uZGF0RO+wFo+IMDqv7uRbuDNaJETKEmFSfOeLzaIjuYpycXeNq+ErZx1B7XIDsYxge +djzvBL9cb2OoTp6Yd5LVI4AJF6wi/JK/f9XrONu9sWDMUX112etGRr/GfYQ2xZE5J2QEs//1LDxK +I5bH3xTI3G9WLOPkk42tuX/csZyrrvSc1LsG06IBf3SR7aPpTYgiSbchy8RrkBjY1gYI/V5hSsEc +TfMw6VYockCBVf10TZeWgXQ2QgzXYu2AwQShki0FllJ7hRvoG3jjWp+5Es4Sf9OR5f+dlRpQ6Hps +PMzUELFR2EF+Ao+H2rJajYZ1Ocu0WPA0T1bMFgnK8O+BCQCYScx1qzKLMkjrkvQGBOL7lK/d3WBn +J7BAd4nbcBsTY/VttPZX9EfZVHFK7MvAZR6gFZa6uD6PlmNgpc+JmuACfc/8+PyqcvF1L3YOUjIo +T6+oTyRtLnOsApM5AjXvPnlQ9hqchdEwUL5AK/+ucXMm3tP7V7EVUmcYCP+T9ohzXTJY4R8R1hTZ +9KQPoQetwlaSGoEuiEzA+j1uAAELJzoMYavGKcjiCf0jd2INuOI8qQ1AiCUDrkchT6bWIKS+O+R/ +cOFvG22QxiDl7IqW6xIB2P8fQq3awI49wHVKSY71bRay6FEZ8T0fZxt3yjdekltXpAEZAsK74/FP +dlyPEHIwg72vd9UQcfu6VUMWE/T13D2gNp9G0UyqrzR1bT/7oaruEJKMTu0I8xMARtlVRCZZJbHO +gYmi6VAHeiEb1fZM3VoxvcmILa/lNjJ4i2pAGCQAunwq+umIGM7rqO5PnmLTUdELh23/A7Wxotjz +S8n/R8ZlGET9ZondBBroUu9rudhlxJIzcgIiPmfQSkhgkQyRmVwltY9nd9H6mALS1FaJy/3JxJC8 ++IT/D7LUcbtL3HdTU5QR9JK11PGtk84hyg+CatBsEgo168jb5UBB3WjjXODlxHqxP6vUZN0Kirwi +3Yktrx/uaZAm5IP+QOgpbTUy6hwKcqB9EPxcYg0uegHpE3B70iDkGDUDGE18Sf7fesixTnh6AYJb +bntS8qcct5zHlttWE15wjLXCkAJnWEZ3Z/brL1QYEhQr8uMvyijYcLvEZrOSPtubRdFPGQKt6KW/ +VTCQV5m1+ubnLdYbfpJc2adHuon4NTiW/uTYHCHG38FsjMbkoa972TjPC2h0JK8TeVLyQYRNdg/3 +vCdkrcSMz35NOTNERA2SmtMlMBo6oF2OpP9Baqw1vxmZ66bH2KvWQmksRxWAESKlhdgYdOmf7rPc +MHPD/ZSqNyxvNVrIha7W8VASdKqkfzjehu7muNWomkH6V9J2HlpoKPsGBOu12wXs7x7yqwu+xUKY +xiNZKobgYUhUGKh68FHJ6lqw/9RTo8taPjoPGwTuqlZZehMd3/gBzdxNoyqBspZPPTLFK0in1YiV +8vkYt9kR03Fcj6BySdFJruN0thsJ9QE+D/U4PKXvZE2eiGHYwYE4uKNTiXp/JN+Z+1fHsC+gxkS/ +gCpmuNTTp8VMwvWvRgxuSw+eszaD7fk84GnuVjH4oCmNSq4x+lbkO5j853tTDTCvg6xCk+ELqtlo +SilAJyZBniMy7v94+hqTWUvuRtcLuJ1dDwA2e/khX3Y0Jvr5SqPR5iWkKXItTzpzSNcqUbn6bvvn +49R+REM1eCPTz29xe52Nxj2G/CU4tk5dmTdsPZ6WmLJt28nYg7MP7sxtI9+7G5TNVluGIuhXfsm6 +wSA6kHgzL8n6j3uOAlCrkaqn8NLyiM++l0OLhHcL0/wlLPpYziyQNvcgOicWwA8u0ccbeCatQJM2 +KR3omWBdPZXTVvxIUaH4U6iBcULbTdRoI5P+c9/FCK+yjaON2f9YfrOteg/Mw0xNhvhkRUFXiuD2 +/cGsInGQFNxOyeE0sIoAMCGRxBwzLjnNvvu9X4Hy41qiRAN1OpG/jf2Qxct21WpbyDT1ik8zEN9j +rpd6hNmiyeRecNdLZTuKSf1qMb+5K92ctz6T/uARZIkq0/9A7gaPpsFn0UHPesJmxdEnWH/fk5Gv +eh3RLHCmeatGzMkfWKaAkTz8vefBBmApccTaW6m888WjlOah8rMY20MyM/NeMjMqGG62Q7LGcd0s +idL0Xo/ppOFpZuddnoqb41h9+WJlTKCwb3kbK/Eg0av/QKWWWZhxZzwu5mQ3UL8KRResGVercXPz +s+/NSSXOkoUNwATC/rjobauw3s03TvjndZfgCRHWZQUqyq0pBK356a/f4n5ikrzo2q2G9SGY5zq2 +DWCw9cqpSC16rfOdfSHjiayyHjA2tHjjoDmQU4lvPzA1cvzPtK4D9RI+ERtLKcU0YqcxSKfoDAFQ +XPUXhB788BbByputPZP7JbFbL70Mm9IOiuyI1e5mwayo0Z972oWzHNCqzIfqAFn7mRzcUhNDLxsY +XWvf5/GIpWsdVhtyAuz/My5uV3tCNaFCa0+xy06+GGQwdD9LMa83fU6prXHcS4X1gPWo3c+MUz7n +CdrWBE15TH5uOICUCdynP49/dyY9QtF4c6fmeojW3nPUcR/dMAdFTf/0gpqnUvbNbp394+wj63LL +A7LbupZmmX5gVh3bv819/Wf76xyTi2Km0AVNVg2wVjGFOWXcImObj2+FS/TMbS8C2we60kmLckjf +BeNknPzb7sraep7ZcwxsdHNU6TM5tkD8fYccaheOqlvrbMSiieiMXCPIE/iF6YFhCiugMfT8Y3VS +7oJF/6zaaB9pVm3uMp/1ZP531dMyGkdPWJyHIsSCoXKaYRDp/8H3WFdKI93Np5/aaZlVgBWaOWIz +JnS3m1mNZ1UgNVi0g5xg60Wn2BEKO2auKWYQqF7+oWWjahKKufhgxtlkSqYEqucK7A03O6oTseQq +ZM1UYkuA6UGIt506WO9TUzBo64CnS+KpeS7KTuCD1paRwYMi8d5sG+UPRMTlVf14AVy5MNq6sqTD +IEv4QWLLW+ZNbczyMRxvbFxbkQ4dBZpFXmw4texC2oKp/I/PHUPsGY0BU0u/JydVPNpsxmmbWMJ3 +H2g9W2yqHay2LL4b0sA4eAdn68m1cKLsPa/obImvTpV9ScsjwtRf+hWkgAgN65YAxR7NvDUIfeCC +t2OaoZM+4pDkvCJ+HVSpGdRf/89cpJlW2tEXOOvY1mPYK5eaC47E9WV6gUJJxlMIK+uZ10psnnCO +fHoHaQFfTq/vAcK3aSM+9Qv9OyuPNNzYa3LKxfosV/A4bj4PvYw5s/xRBX2y/sXKgZTK5LC2hZHn +KdN1xhXHNpER6hmn/X2vyre2SbKLyB4xymBZ/SY48WPCcEmrUqOmhivt/Zxxc9iVjsNMY9DVC+oC +2bDZR/YWZwTPrQfelhsku5Fo/IuPxlUgHusjq0iivEEbGtJ1IqmOaApvH+CPJe8PcDq4TB+zLzxy +MBoEsbX22fBjNfLfxCfErIvdbrsmjppwQHmPXF4t0yasnlCSo5Q3JIt6hrYRywanELCLS9hwlixh +Dscleo/ygZp9tjin8tXnzwDGunoXLHHrBW/CUNNdO4UMJeeUbGGOYpcabrwGgeAUMKYkiC/qsrhE +Jcq/sLX+4TQrunYhcuhuJvAZPgpbe0zn/pBrp004G+XQ9cB9QmU/IP4wwbmbQa4wnnj/6cDNfBap +ymWjASbUjy9qr5EpZQZuJKCSLCwdmB9RSaXoeGqm32x+wL25Omyo1lOLgUx1yqEZ/v9AaiGX3AV9 +PG8VEITtOzknGLkrnRbNb9PAWiBM+8NoA79qJ/MUt3Y//8edrxgWXiUPxEyVTn2yXjVk7p6RoXXo +XM9DvTOYpAD0xOhTm1re9MrA35e+c9vsqqrjZFdl2fc/3uptzYCd3de42LmDxCsRmEaBvyZCmkMt +Cyg4nyuXKrVkP1ImSW+szr4z1Q/ric8RHRqKS/YWRMJSSWzPqkQM5jGra8Itqo7zPcvtPDGhSjhT +3SokX8VWbT+FZAsjeTqoxFKmpE/84SKPEAxhbEqbUn3bGnXqLZMtRttEDOkv2QVC4cCRQoayEvC5 +1s4lro9+uPVrf5WlHk2vfoTAI2z1B7lr1RTeGMnh3fAZB9bWO8JRnXWCIZEdmP1KRLaH/GAamX+l +gaoTIiIpyzoxyKM+byY9RTQHCUFCoD3HqleD9cNt26ZfKtW8YkEDI24B1cbknBxHT/Za6vtps/AV +mHdojJaZXIKa9VmUvBXoHE9i8hGMWdqQeKLDYCXe90soYk26j4qNfupDkX2rv5qpVi/raEkGdb/9 +diq1rqvdhKUtCz6vQpPDzceyupHSHD3hI7BlEM+3bU92gEa6LYoJFZ1u3WPcHSs+EPXNvmoiTPEY +pTIeMtjGaF0J1+1yzobZ8tOLcpR5GY1KbvA+VtgdcoM6c67P37H35mgjjMbKvQjujecXTOG1al9p +S7oDe7TXbr1fA5EUg+tZ98Cd51QuJ0ItX+dLxFnsIUmTrkCQcrkllCt5S6z7rJntyth3hoMntMDg +1yNssiRnFdoaOgt43x1tF5xfa0Op+bLfoE+kabt0Fgt27y1+rl2JvM0U3Z5uby1KB21urogfufiH +WxMIQlfd+FBcodxaFyWiF2IILG+AFvMheieJtTho3KYyb8rFcy9HZjes4NPk5PK8oh3Lagzf3Iqj +W4YkToxhizcrcSNFJD6elNxevt10yOxT5kxLaCZGymanSsth0fCBblIoMgcpe7eZZiC0rMj4hQoS +kLx9/YzdajaesxyGXaoRZO0DRgVOVlfp8lkcyAmriNYc1E3SibTJ4ldUgpCb4Dk+x3d4WU316bJX +CF1SVpySwdxfoSzDXj4del9KVJET+K734nckNmI1P9yuHiZ26279EEW1s3wZ8KVRVtSOG2fHNnfC +YTHKyS29nc6Wknvmqxq9+6quMebm8rEaNeb5mlIQcSoneKxQBoKsH/38IrOzwVGhi8YlVNxPJa9z +bLHFLhFqAxtOmhC+Ud2/bKv7lVyIEjrsyb7+5eGYDqj9v3F0zd2z11pkMdQB2eFbIoY2Cseowxt/ +gmchM604JGUn5DPTVnm2QItkMqJ7ANubai4viCMJLGu8K5hAt7+ajX9QKOeMcN+u3ogiCj722yut +ypEtAo2/X7RqjVnyASWrRFz/clOZzGW6pl7Z4kOHAG1onXh1/eChaZv8rM7Ow+fNJw0Ul+dkUlcX +N1haNaxlHwLWds0J4BKP5RRapegsBqYPTPz2QPoQaPrWc69pYURelI7BigvM88BJS7ww8NJ2lOYr +HazTNbV+oyWtKjQ/CTJ2y6VnxI0ZFIOtPAzqwJQZ/tKsu0zLmKbNs1pR5bJkfPpdro+nrZ1jA7UP +sB0+tn7pT25h5WXjG68xWqANWOQsjRLDFlHOYKxgh88HSUW7kwLhgMhAzWqnaod72KEPO0a4VBis +YDsihOhtpKFbzRXlMcvSgn486JrtXcNlrX1FZ/8RJZ+vKTLFWdG1bOykqFtCeWYCqKg1cSFmWdzo +6zZu4hcj3s3G82+FVD+KxVr9l+iz5eHhdZcxJUl0GPe/03OCo2OXoR5jykTCapmMj5ItVuJ2Qp6x +7+GvQm95QevcPhr32w7khBgZ6I2WGJKCmqqDHCqwoWpASKlTS8edG9A44Mx4rrIFMpYo6G9awqw2 +ewuDXOL+bhZ2BiLqrpM1au2OL+5ELhpDK8gwAhM60gtcEakdw976KM+dSLByuwRdkmvuQrlYxkhi +PIxPDqSYFJSOuNTWwYavIBFU5Vwjn4OM4rzkMywmG8h+lXHgnPsfiO3GAOegwU/QNuFLwf3JHdMq +KoxRbh4hw9pnpgQnVWVi0WZNVcW7S7ZFa7DVtPBrDQ9WPG1wbWbuinIoEAz2RdQqYkiqGvgKJ39f +8U/L89Ungeu91mi/ydgcdYb6qzYhOGdBDO7G7N3LnQ8VQUBkQkREfwjI1xMz7fEXviTlJTZyTFg9 +bM1wEdAheub+UjInQIkwmKCg+IEI/ReUmOgeu4EuGDO9/3QQnZaapuUY1S+ZEafCod5TQq8VbwzO +Uov1etiwpifF7K2l2nGMLLg6if7YhO9BOGwlUQuzziraMmMkA9ZZTtnFUEEpeQojY+wKyO1G4ZUZ +mgDk6x2zV8V+mItmNeGmYIogB4X5iKtXe1zbKJQ64QqYzAHRw+GqlfLcre930S6ZUCa+qIilacMZ +BJ3kI/u4eJgpnKMApTdOGB2askI2QbuuXmHAz8qFovhyxAh1chRjySt6ofpyQaabBUNHIn43Nlug +xZeGoo+/b2VWWafeTuQPmo/CGHLCOVWpJolvVkMKq2nmk6lnAlE7PeQRhXSCAgJY6fi6GL0RQrJt +2I+izs/kVnNBv6quWqCE20Kcnbj8dNa8IxlDfxNj4KfqpFlYG2YJFHdJMIf3domnC/j7u0KMnOzM +0ZVkKw00e/QAZXtY1n4leIzThNfN5Yi3Hd1lXei0I61ymmWJH7JGXXFutRmQWuAubnJQtKvUt06w ++Y/o16BZORPMPdpNCw2HZP8CFMsZVR1wGJnDnYoU+0DDZLviUnzlMh0ODVC0yLZJYUfPJ7mkX8J2 +WWAzMzAOOlLZmM31iZ06ypXpFRfeLFmYOcQhR9WrJoQJXn9Cr8rSAq6e6lokU87sZi2K0KLQApIF +gCk/4g8WVsM+TQ2y9+m64it7H2PfGW+tIQCA7bYspVK2YbjFxxuoE9p9ef5e65igorxC2shZKAkX +lYf5HlX2TDHIoTaQzYeP0ZIcLGbEIKc8Wt3FI3Tnm7IE4P3uLFHEylrrqYd1a224N6HBPdVPiJaS +aFXZlUQ3GsQhIcDABRcQ7WWyUmNL9kgrxd9WchPxVWdaZ+s/ezLaqnK/T6BJfD6/25eIytm0KlLW +b3iJ7o/Kfl7tuq41qeIPHjDeIuBIVDTZA7p/FyG8o/PwSurDM0lns7NOQWBywQpL7XyFkFCGRvN6 +YLIXaMqmXCVQo5ZtBEFWM37lO/N/Vht3/hjJ80gIFfYmrii2q7ErehEloCerLUzP85EgyF2ypwm3 +4ZyjgxGix7q0bCkXRawY7Iz20ClKb+sy50C6sHeXRuZ6nTkWVJIaXdH7FrydxmV6w4a5fe8tkby2 +/593CZ+tYOp9pFegogQSvRhLPzMJvEdkk2YidEmXNN4YU02sOFcKVaOWWHNhasIGco7Mx/AEh0RB +t+jI8ts8KQTlVTWhB3zJt/V+TqOpfB4mQfCSJHqz6ocmPiKzHvDJkn+W4C23Fa9MOGXc7QDvBGV/ +7hs2hKwvfNkRyTDO8fEJSm2YRUCmuX6Os9028JkGXNcfA3QqgJdIuloCC2uRiPv/dwZY8h4kMw9s +OIIjUxP12QJvP9m9g1MBvhlCp3u0e6kTfK0j52+Y4wyS8SLCV2EDPLFm6d5/CGmVmNRH4p23kpgH +l8jfzB/DQKfXoZ18ZtIT9+jctxg2mgozgHwhKSbIXr0VOurgszSg/jNZ+41pXKDCq1DCcqzNGZpz +P54KgrHZnn43D65Qz/qdR6x4moKRZDX8fb36eLMqc13zpNekjIp6BHkuOvt/jJeE/omXMP09hq7o +B74BKbcp9E75pnDDSrPwtsJnhKWLeaAMOvKwfz5pwSmqBp4lzbdKXnUDPQDsvES9iLMtQpdIxCo8 +tXSWn0+yGEYkNkrdUkbMfgrUcs3ilsjD2U2KPEmMvzD60g6md7N8MtbtyHGKuSW89Q4jGcaX5YkX +WgYOkZ0SEFDocwV+VJ665l+M2aRG9xfC+5donU1+NSeQKIDk+vK49cG9Xoh2r5Uk87LsDQLtcX+V +5V0nkxUK8p4k/erZgmNxsE6uPHkKnXoqhkseFLV3sJmBE4UPHYFMuvLeJdd9X6w6599/xJ9jhS2q +ZoUwGKvUsDe/NNOaHn0AL/2ohKH2t6urPExcxpGED0wsXz1R5xP8xc5w3LnbTp2SY+fZVOKRLaBl +zeTL95hDClC5cXjLmWC8k173aonHml7arHhG3+yugPqBAnQ14Rmo6G1rZCtDPdikFlTKRxlZXFkS +UA21zxxctLmRQHX/5Ou1Rso4kEAUjVVYuPZOw3AEjbhnpkjR0bP6YsHXbHFTzXmE6oqvUkyCNEtP +SC8yxR6zzAIpl5/ZN2G+CvEpSV9ZLNDEkYIk0b9AA8M82CKlvxgIDRKhjkjeSGbFlvd2deA0t9UH +EiI8c0nqijhkSlNYjWDP+ruHeSJB68aGQFhdNkV9kPrAqKXwvUfBVT75npR+tZyx5fle8EekWfe9 +nl/AXDJm2KLvOFfLllklAnURhuuD6KLWT2xSCGBCZO6yvnKBS6xrR7ehyPJ2kYvkndbQ2+0puI+A +asAx60fxOAh+ymzxOvoH8xxnJLEaPHS9fUiNFF7HgBJ1agOFsIJiKY3jAYdEtrLvUu8K2k+XxjqK +fqJux/gC6QYWvK9nodrGAHodUOg3g2LUyE5yNWlVLoziN1LypCWAHsFJfjWT8XvyinO5A/a5y5Yh +nKHqubTjcpqi1WGiYYvZCKds48Lzd86/0lweGIzJbFB/ucshfsFf2FRobg51LMPeco08hPhtXy4q ++IaGurpGWkroaaodJKaf6tcdaieFzDnactIPpG5lr70/AAUU5dV2eWgs8lqiyYUEzwJ6Zwv+YDph +N6Chol2C1p3EK8Vldghl7swbdhJJZaeQX5SKwbOTqOvbDr9DZGMrbPmC0i8aYQZqb2vfdtolmSIa +d52gkXdCkz9sbS4HOqKzVscng69T9PhlTUcI/ksW5YL9Foo45kgUw/uRuzxxQUBU1mBNZlhPF09F +JqEMgSqW8vxO3tS/r/U8SA11jUPvOlmDL/xia5A0P/zbm5HyQv0B9RZnCAy4TnLBLMT//COsq4jj +FZVbFJcOdH8+LufLq9vWhyIQG4JkivHqyNhLj4RkjsPfn8OFxThMYRtnRA/9c7/1uq6a6szNYls0 +l2KrFE2s87bn++RqnIrJiyDLYXIkhD+v9S7LhRNypwmtAzgYmj/O78zY7LJLcbixhkOqG24DLt7h +i372W1x9s/whD3Zm93BD8q1oxLBPEsCGZha9HUhq6FONcjz5MKmeQ9fl4VA+X3CWe8W6w0Z+mqJq +FenudyCP1hQLpNx6GtV0faPbJDwUBNxB3OTlfSkKQY3GlIxilw8eo6VuzTgdwxTYe3G1mnTaQlYr +vGFwqKJX4lSHRKGohAyko1+aPYXlLIfEyE05MpcxVr9BguTrPcCQ2/D1mNf90emI9fmKoJcL7uKH +EaaGpx/mxLvBx8kKBStPrq/sK7KcUN3ppA1Al9b+eoK9ntJEpzAcuEYX1At046ZpZ228gxyK5DG2 +mN83pbsTNNlIuQkvkp08hQOt4S39WCnZpl9UXwpg+ps8ynfnTCcmsqan0/lOB23lWHm463pSDmSC +aTcUp9380enm+ieNoZY6s67g47CqmbvrEaRD8HgoC6TjRzrCtUl29nn5p3Xlt7bE+VaJjBV9sMkq +kn1YBUEsSGIGfTwKXAwi5yINaWWnZwEe1aCaLqhDPiWDSHM50abkO/PJGG9FxnBKQXYSYvhNdA9R +kG3RAU76ROMXws0hrA3xoD5agCq8iZ75dMn0TNc3wNc20izPPAXeRjIN9p2qR7vF+pC+JugW4cOs +hPC6kbjHwfhK3lv7CY4lb2tGPKuWjmPHJnX84pvVR6t7H8QS5UsOMrFiYjdJ2dqV8htqxScH6j+8 +nmxqurxHYFuBuMPbsOvXGjLE0+bQd5bZdrIZhPzv61NXFu3EyIkuJfSsoHPk7Ip2prLYW8xEiMFN +9W485gzfUQolzlal6wnF+eC/RQhFvjXFI9sSjhVDj7Us4hverRIp/NqmM8VbvTJ7VGGDTxaJEnBt +highfJ1YAaNW0x24Jt2f0os8CfNLJBhOLTYS0287W5gbGWpobPlmQyIfehXo3iwK5VerbkjFHzcH +SNNx7tZasFNG8CmRDD2/BT8ePVKjg+5G4SF5oygxXLcYKuEeTrWxLAAu0J9/SyPFu9A4qrgR6q8a +zolb66+uJ1kXoOzuKBOMSTk26pId2hl1NOq11mys6d6SVBkQHRwe8QUXzddf41fXfiv0QmHIYqP7 +W/bGRIDsLb4c8FVDpKKDSt881Bz/K8wpprsYjaLknBZMWyHVBzwaxgOyljLluB5EcTl1+BnyM4Q3 +gNPeN2sscXdzNZYJ5N0sl1YU9Q7HGPDepZR6XpHz7t7q+yqDEysl2nVcVlQEKz8Q8yiLqdKNfUsw +Ra0CEm3y0OzyArqsqHVJxSBcAvFgYwvSVevm8N4agsRlOhiuJZZXEMaBCOdnE4AN5jrNlGcP9c64 +P9JlezfxCcAyIP8B2psTtMtGN3dov57rRv5BtqpYFFPPj+rMMBAAORFgrCXB5bwZhTZ+bYvQl98q +tzWYEiVsfVVXi2qJ9371L2UXMGcVoqpmT/6cfk8OZIz+3n+aSK+l+3D0uTHEvUVn8yAR3j48Cr+A +xAdfx4ksgh8p8BdPrr77yeUHLfFXXfydmFpQZNGGyO+fwIhx2uNPglTXggQ71UPvfNUkE+uANBow +o5gb42LGWDQXpNTwlrcRrpoh8JZbUH/y/rdijGBNSFUAPvVbkaLPFRZWUjZP+Mza9Cz/W9OegZjC +oiBN1flGoibzLl5jWaP5i/zGqcwV8D1c7TdfQy+ETgQ3tzQRpeXvSWatmV7r1oBIPmMui9s0QEpa +r8f+yqlSQ/Y3SF++q2gl42+c2GTvB4p4CeKIVZjKxMH8ogGD28UQcNcSqtOaObvJ5Bk7IN79Eil/ +T9UcfBNAkpSMhkC8j0yR8Ojjhjee3/uqrRCo1xSBYX8YOCyJrh10qgCyXBM1d5P/l6b/ra/2AG36 +SqL7Le1KIoujpw7fG/PRopjExpB1RJlrmO4jPUQetS9TrbzbWGMqss2u80H0V7YXF6X6UG1kJUSo +calxw1Vf/8SVIX/68bNeGYgm2hkAnpLRUpbQukK8ucwiSUgLSJroyAJyAur384mNJHAQb6Y9kLkz +Te0DHUCGcsMOp6Mo8pzzo/6Y8Js1wQqv6XYcfFsSF+xHw2IfwifvjrI6Ha/WhxmUk6Qc/sgDH2Zs +KKvozXHVf3uF1VculFpZIt/grSBOhaOvJ06aCaA92aN9cIXxO8C/6yj7bpCmPzah7ZIbJZ6DaOf6 +u5662soKQqUAaYJR2Q0QpGObUHit8ThZXapQmxerQgCpukGJnuuD1SNdK412h35UwTIfdY05p1vO +JUkS+mKuSIR6oTrCbVs/mwnAMHf1MyJn/97bJuaBhNOV5PIHIoGcDRxbcCSbOq8V4QvkI0mkKG3c +zxu6uEkIDMkzdy/IiLIxy2F1RIjH1APeRhMdmZxiYJuzjy28vJ/P/xu8HFwnwBu4Dz3W1Y6KF4X5 +ocN3tj+staYGPyyy4WfMgHKmWZZ5FT5MuEk4227CDfx2U6M1n4cTa33f9mC32Eeqm9cjwrlNjjLT +xCuzBplJB94O8A9Iuv3gAaVBJfiFem9Dl2Gu5Pvq+rkw1q7lfHGt6dUQEzVHjcU46k98bOaL/B6q ++s7phF/ka7bZFAHK/u8Wtvh+hT6k0euF7ieOY+syt/ejR0eITXURTwa0jIX5rLZS4Uz+rr3rxh3F +g4arSEWU1zWtFLlOC66/O7drKZ0N0yLICQX+fCCfOg9/U/G7P4DCv4ze/e2qfiKhSgi82ZJdcjGL ++nBh1bx/O3eF2HtU6rdaHia+xhVOdlyHpmHJDBniywOuIKZp4R33IgoL0aFYmV6uuccMQUW3RS+1 +3c1Z808huhGLN5vQLdmmIpJVHmUHdoZw3FbfeB0fni0l5Tj3roCVbl7nblfYqp7GmcFuFT02os4m +X/NKaEblpE/d6ynqFsDhjWo6BV4lA6UIcZ+wAw9JhLrj81zx4k+8PAeMOdYkl8K0Dn0tKbiPZjPR +6ey+lMAnacehFW7SdZ9E/JeVu61+ocbMrznL0kJ/6DSdGretvP51Tg6Z22QBmyLx2dDgRCrH++9t +NQnxBOxz0cSuHamcMXjwdzUxeLrAHTTi57nhCYs9LOJzeDhkEu4YhC6NPf66oHt3lqglHVok/A1R +DztuIRQFD5vOTbxXcrBZRxG7Dkv7y6TmDhG1OveDCDF2e8Zu7HM2/kOXAMlvyjSL5EzwEFqCDoV4 +ikpJhM3At5ETNZfaI/L21MZwpbqclpRSpXgty0yQEII7USpHOYEjmcMGTnTInRxJP+5iPbKHZ+JF +wX7wazFkUwTpR+Rh1m1WQRnJOBisqGzDwFx/mmGkhryCWuOb1gxRp7woLx5GNSg30pWj3JHM49uN +74lAcRk+qm1QLtWvQLGeyhldOO7o0MsR/9Wvr8pwnQctfPx7hEX4ZcBccoJOFMpW1osFlJ4DLS8C +2Nx/2pNuQaTTGg2CXmbxEaYMbTKIal1Fn1XLp9lv3l2U8qTKajMydkg6Cw0XirkMz/xbNAxzNp/0 +WYIgBXu6ImrdwQd4te97bNxlMfyZ60vksPR1ZYAcmj9vKwEUtt9ctctT7E5UsayU8y/raFVbd3qm +YbdoLAuqFMTKC9zhHk18DW34k//cuXzZvvklN+rDGrNWzh9ktHlNH9ICbZLmqSLRIh4KJIYfFcHZ +9++OzTor1EiPDLr+tHJ1jK0uc8GNP7c+heKacHZ1XudlGgEshbWEeGgPOsdl1CIGGfF6Dv4Xji34 +NpFVOlM+tnbwYzk+m/ysmYMMl3oHDZMeP/Ycox5hUskwKI6qwcbqTIKKVcYpm6oy8jb+RAtXe6Ys +VrVGBQQMiU2pj5cLFgajy2fNY4zXCsmJnLOAoJPxjyJWbWWeTM3CFH8H9g1GLQgF/osTWut5Z08s +Zpgi4f9ZAZ3YftNr6BuG2uHpdKadmMRgEs2Kh6VR7lePE945moV/AMopqozqmvhiXTUhomJ/pGlK +ubQEpHu3UNH3bq9pulDsUK1MRZNhS98Nc+Ym6rxifXzoo8P0AHeMwbfbc8N5+yeKFK+LXNXfkA6s +44Of/33rtm7iDu6dBP3LKKPnOeZGMw6wNfklnwXVD5uGTdDgVBFjSqA8GO9X67jYHLlEEwi6kYt/ +4c8sqk16GmqOkDHSwzfVo2+e2t5AvxL107fb2VX/gvenUMmzrj2ZE0IT2mbZmfbNQ0WUt3mj0kZ3 +U8KkIZcGT6jCpJVmoItNiSfum1lr7CgqgamL8w6ATJMYKtj+kPDbP+1pkOl/O5ia+gvAze1Li/22 +iyT1ssCsQjlckB90cU1jCbozlkdIQ8s7Sqlz4tII9X2UMQIzeoVbOrikRX+x4a/hPklhsS47cBYa +ej2xjakY5mfz7K7VOKrP9tzFR7TRuHhCh5t0wqHWeuIjEBbPvdNZGyV7hXvhAqfUFJ2sxSjYiH1O +kB5rlLpzUqsqstGI2dpgLg31lYoWN0M8vkjo+/sWLcmF1cx3ClDw9kECF3XJB8V5BhfimYiBGwlc +Zh/MS3vMXYWDjmM+cwpQi8iw+pJSLFC5d2+TTAXrFaC+o3r92Nt0WRajsmXNv2uSLHCxxIR2Y7ao +6/E153aK9qC1tO9qEJAFS7lA/LBYdZhCvtXOM9kzdIO8nqnZq9uyoPvDztajkv7io6OPPaIyLKB1 +oUjEWx0zSD3cGUaZrmgGM4UE1x793ryusqwFOeIXbSwADAriQvbkj/dcqTeoap4zzZhaeKP3yX/R +a4Cpo1kDvFqwJXh23xa+RqUVD+IOt5HCHtRoxEFCxJyoTzcIvpQXfJUhVTLJMEGWgeBo86hncNkD +9Re7JK3JMYq0h0HJqZ8GFsnXUV1bsjh1HIxN184Zf48jMHP2B444ocEnaB9RqsYpdDFpIuz86nzj +RfUCuDg4VwoHoy2/AaeDjgsFaTjnSeUJpKDqdQLL25+NYgN5qr+8F1ZagXZwgx9aTNLlrz8FFOV8 +7kLgyNRHb57wOFQ6RnSLwHq2uqobJE3JzYZKNyU97jtdJBnGbeTQXpXiWiJB2fRDLCfYDHmaabBF +zQ7VvV+9zu3f8JNfGZeqV2QJcjwcJNpF2u02Z8TQAyLtUCmAwS4gdRYb0p+j+rhC5X0r0OfL45ow +VWFZPrqcfuNBazS7M04d/3LfOM0mSKN5BSLxdEsmgOaOlQVitjiBibMEm0y92V59MY2DgavTsh4k +LWvf7fPspoi0diuOsJXilC1iq0Q7RhfWQxeBh/uUKtqU4CplMUDqyBIQ/23SRmydd6quFzMSS97M ++8Uv86SzOJt2QWxNFKLhkoetfYoHuyM7UD9nMTI8/TpXH1iNebMoEuahqjWJH9mwboqeHiLFtrPM +r5e0Ds+3sP1GbquiZmjFmkbYB/GqsJtuSyt07uwHjB0pCJqAVOfVRMry8vGhcr3cgD2JOfp17Tom +YBsmBdIAcniFdw9bZhawai7i3zuy/UTlmOtG2ai5Nx233msvJA6jxsrFsaCCX02/UxS/H1EvY/eH +k0+M4w/YbacwRDsuLjIS38nJh31E3ErmbfIuFa25IjS+7Oy9Hb55gJKrCwKiws+JQY1L0XSygLwc +WIzPiRCOGxpV03Z5NimDTWuUIrDog2EKy2AQDtWudoNVhlt65pnocjbaSFD4TjJXYZH+MX5zfpmt +mNTSRuh64f/7APIjBQGP0kOAQNESFIWqQVNC7Ed0Hy+MMPI8+KZTBh6FCiGsIInTkyWuRplLJA5M +Jyo5VgVMZ66k7dDXnLYUcHStvUOMypyZ+vGiCyHSzNJEGZBcYdug8WrEMGlHOKHWXmQwAEyG17K8 +VVFvv9W2DRM/XvwSvMFGrqatnZLCrTwMLSYP1uPOGv+hefvkhhP78ZrLdsgmmihSWvcFCvWDJi1D +nzP7xn6oOsXUmYKEZN5gmhL3EZUWGirh6C4GPjKhHxrjfCAc3wNi2Q/S0wKh1tYak2bXlEkJF3t0 +K2fJuB99dWGtM+NKHrDnMf6BebS7BW7bMwlPX0RSVOKKX/2inp1//DLu4WtzK3Flhsug+nm3UgEX +Tq6UfR4urqHscHXdwnA4gHD98y79Sck3iyRgTex/SuqBL8rbsAYwkAiKZG6avllzRZpkZ0AoXWUB ++EterfUOcP6Dox0ZpqCmFfNOa5w5GyJj3kLsHaiKfpGD0ZYtq+9jP2f4/LJHId3dVgrByVjQTrSl +F78Z9DomZDhesP7XtVEu1Qu2OWrSuDmuFHFpx8fMVKx4PXXFfJhyux6c8aJR7LUEEN7qwiIdSWnU +zcGSceNGaPQX0Cl1I/4DCQwSgjtKkEAgy4Cw7m424dzxFGl+XSwOb+7HxwjoWRX9Lbj8rFvtT5jx +ehD4smYK0E31ZgoMVGC5YgYms17AkuX0hzZ+IWVklXx+uYz0EYgxuDMv2zuB/0cEXuAA5zS6DK6y +R4QCsgK8ZZ6Wb4VTLxsAc/uq/a1s4YcROFIfcoaxQTyai3GOBrIp6mtmPRf1IeAi4isOG91goU/y +/JpXnM89RNSk00Jv/WPnb8IfoEoNI9SPS8x/CZQ2zko/VCM8U8sFJ5FZAS5sSdIw8/F9HhauIPfD +oqqWrm8XywRBCnSKffc8nArOv4pIOF/CMMWBONlX6gQA/zKtScCxID9/xh+k0g9qhx8J2qgHwIuL +y0imHVCFxJ5+TxPmjTfqPIhmQrWBMGOhxw7qnDZlf8VFE2JL/nwIecBfCCqfqy/qg7A6ZRzLYZCp +YTOi9XVAoVCpQ5vX/W5/TXoNQZtS1PX95mt3lgx9vi2GN8jm3uiQ5dpT5trXI4njWqIbweujoNCH +vEMwG3ygb2FZ4DoMKhn0RnL9UxkGMQuuYyLR05gFJeprcwUgoEtT+e/+sxLQ37Go8KBrhgfIEIlS +i142gQ78StMnI+gxKGL0yDhfBLmXrC1RKyayIrIeC2mTXp7QBXBZQzsHo4gDrX6hpYPRgnoNc0bw +pS0Ya09ky3ZB3l6/KHPlgTD2Vq2XTvSd6/BV9Fr7kcemX3d0r6VZT663Iz1g1DkTC7mMlp5ie+N3 +KRWAXxcIwPaVnAnibJb0D4kp6jWpBVZFnPfYtIX3tU9yjJgXddp5zoaMR0z+vudCOdBGZMCkEqvm +u/F2DnBqJyZPkgp6PmD498XZVI7tqY/6jXvcCHGq8IcENamD77k1jyE+FWJVmiYoHAyhPo4ANuAs +iSgiM+CCJS35B3fsYfoogJtTZOMJdytS9SnyNXK7zcMQFvKKjkNjAUVllZgXOkO6zJrvij1AQJpC +cQEEV6bzhinR116r4jWlCcB2RU0syTmynPAbSzC+a3sRyYL1DPdJZW3hLgr4LsJ0027ptmMp7gA7 ++0OCTfFZOPdXHvAmmyTIt4J4O+YLsKB4cjkx5weA/U5NMT1X3cUoXJYtfxXXUPI3QaqWHo2WLkLD +YYG7+GJALMex7yUT3nGUL3kpmJD1dTBhqHjosJcaoxviRYghVAKeY9ghYAIVp+RdhGeUVIS5AUFn +vVJt4ujBNxzgP6YNRVTkpWx0X0Tm8mAZwK/tCcXBrCHJGLwJPgVpQHyNI8LjP/WD9QAppIl+XMup +dkSR9t8oQ0TU5c3qjf6nRcpIw8uSJyRyDimkP2h0SGxVm8C8NxeG2ANhxdPEj6T5YQbTTbFLXN7P +NsUhpGYqGBj/JaY8stE1Lg7CqMwrPNkj+oGPwGRrysDlx+fTITVuBj3U7Dqbii4IbDPebZReyAsX +2iyfO7XsR0vuZcQ7OJGHfHHsmXFvuPP8jmGsmuQZiy8uCuDSfIe65bXp2+c04dDH5rvQNP+5O1rc +JbFQvlgpsGnMI1+x4rUWdOSK42emaBr/lz8y84tmB3+wM0rMrP3hCwd9N4M28jbzeP22kgeTb7eA +gvXSKbdJpmDr1SW+COTjyCe3/LWFkJi1phRSWtgWu85VCYkS7lGY8qJVER3nAuAmay6rz7Gzp7Sb +/Lvsg+9VB/yAtdKlXuUkQXBWKZhtXGgt9tK8Dh515x5KTd/5LAlEdpQ6NrciWAwxrnwwNtiLdHsX +FFlkr83fATUa7wdyAunhXPGpJ6rm2/Emu8AKUThlxaHQZcFeug0zXOdZgPVu6JMUbcOYYRuWyHsC +w6gzsXwUcSlO1Jz41mEfThgd7ORA3xemLnasb3LmNDzVpxYzEHVztM6Sf3Wq+zgRTUsjrwo9w/mZ +jZhELSpw4g0lVrN9mtKL+G1hOJSRi2asa74apwpWpGlPvWlxbKoTLTaukqWTglEY2mr4pwsAi3Ul +SlMT2WgyACW5ikVey3h/inxa8SJh7RAFcWHF7A0VrKFsFVTVe1yZebrQobvV9M1bCJV3oyoG+uml +sSUi6MAppHUtxTY5oS4JH1yjO1VoMk+nEaYaEv6ltwUMvD9hgnIn/SmLpYesQhO6OM3k+S6j+MV2 +N4WMoe1pY/VXgNO69TVZ2IeSAghPgtMFrl4wagvXKlVje+X4G8tKLhw0DQ6l++Wt0WoYE5zJvXYv +LtagBTQm5pGeHspDExGcdCrxU/9alHGZedJsaChJrLQtaK6hfRsEwFkxbPnsJQiQZAeybx+pN2oF +JlrovRd/jC7B8RkxZJTSunfklqF0k3Xw5uKNuqrQXzhBtdmmy4JWr3brY+JUDwQU+Fdx1Yenanhw +Mitzx6YPcCHMNgW9UFYUS8x37FbFYmj14tfWJeHKrfSC8veW1OuKVBa0PSeUGAhbABHiyscfkE5s +IZ/2knBBUhdvPrmhl/qv9uvmbMk2NNdnYl+d304rvgIF49NBUZTEbx+CQVmowWqqrPOp4GuzSYLm +Id8418cNdgTim46E8Dr6+JTnIBMAuiaZuS6RQX9S5LS9tY3rBmWmBgfWu2Od2HZH3/hrC3b7RCcS +l8Fe0Yegz+2z3KvUYqVmZ55NYsDuyJAImEWe+W6p2Sk5Rd/vFX4B7MSJ37oGqqj4JF5Prl9eN6Lj +K8K8i0R3sA4IW9VxZQnxPX+PeBAjHsL4R0I0FFmz9gbgb92CImSEbq1w8hTrVr8YDsG/+xi4ZoxQ +jKRYd5XYdM5zmbKtOkCZzjxYYt40Vjs9yZTvA7oUbLoTrkxQInpBVXzV6+9emO360GLrPxaA73kg +4FaEYJdAx/rXCeMZah8F/ec8HZTPYE6FfasnY76rbGH7Lri+xJtI+6NrIwjnUNW6Ng1xcJQdL7hY +Ml8qthl27FlJRn8KT3gsgVh03ylqj9wvi31XzfKtJdg5zxiLqkI3J9lYRM/MK/RQhtZaJaB85ein +L05g+wOT8f1Wn8KENvR+lKwa9JfoXroEEe3rDLNCkMy2lg/IH6nTNYhXHKJ54FgdHaN1gGbgIPwo +pv5WyELgA+u0+EPz2rTTUzrTmJFtiKcHstAowQ6R65Ad8UXcAGXeIE8DIbMTv47hnB2m+leKs9GD +NZ8VrGXich6dvlr7nko8FGGeyen9etyMC8S7hvLpK7PgC8G97lBbHEWL9muTtbX8iHAqbCHh/npE +teDNAl8gSnlv8SCm3ZoTLjFbJb2dFIvi6/aH1kON6h92n1z32VQk30w9gEYvaGxS5feyGwutEswc +pkxefQkXb/CeldRoE6BpHEKsRNbInedbHB3nhfdFZ5rgD+ufj+CikI6rTO1MmtlQB9QyLWWs8bdN +wGHnqlTtvn2H9+k2bJGZXCqBQ0/nSAnaB+/X4s2kzFdn79LA7XKisifBfQxEalmK5PPq4PYclojC +wOvpUAjOo3fK1ntqmVbV56n9i/vaItklt8rtw7NBl98BPOPuUZTdxVgFmFfUTp8fo3HlE8MGGQ6m +MYIjCnhC0PjqG6/3P4QCgWbFGloRLZcMpUKK/5CINhcLB49eIPrY+zVJdBFsUg09qJ/ZfaZJjvx8 +ECVJAQGrpNN7m3BpwcrQvGQoj0tYl6Tce36Geo4Ch+5D57BzAJirBlyDLkv7pSNIaYeZrM5rPVOQ +vnzl3KyNKReySvUiyNchQN3yDSzSPXxSzggXiqc/+SQVDu+b7bT2QOiL7nUBPNdWzdQZKbgeqd0+ +f9Nr7gGJKssRY8vU9vcPwIi4rXDeOT+eKeY1w/aG82mjajp7EfFahHSkWOBKuv5eibuDmJkTpoW9 +zkUhovmY+T9OONiRNoMJmElUj4X+9jA8zplpbiyk4MASg7qaK2TyoCrHB/G2ZA2MalK3beHceFDX +KLJiFYPfb32Og0jjXVwMie4TAuVhOcWbNGrDsN/PGlWAP7CRDeS/5gkBTH4ePpu6ndTWngqYV6My +nzPdEqi4QLW4e5qS+EdkHlmB0FHaixmcmdiy/RRiM8Z1njMiNpHHYsneKI6KcrJfXmXGVZhYLWmW +RdJdFxcLVmljwPpe4m7gqvRTww4F1fi71VDCZSZRUq04Xw9H1s4YaFsB5DezL6y/DNm/xd8TyxUO +OyZAm/g6tH+oIvieXYHwGJtDVbFEgwOgnUtbTWKkCDBNHN3Kh+dSNlbd1a2lZpIjDfbuE4pFpAvD +HNEutPZDbENQDeIbpx8cTge9BGxUaZYvbs36K+n6oZZLR7tilZ35pC72bng19TbrZboSKq3oox3p +degJZSSYOAVr4GdClCn1ShspGaEM0CxsadE+JEnQdI674KZORSuXHoRvH/Gjgg3jq6NR/yjeIUG3 +2ZXj/W7ei2w3Wav7RmdQAsacgB1RmauVP8yBgHoDuzOfK4vpoj5DyGLvJs57p3BjiMz+qcgnrC9c +7tFIr3hI5YCDfyuom/f43RhuEuz7Mhy+Igqf+W86+u9xyq3i00jjcoS6KrXON2Yjs7CbV7AP6oJd +/74NugwDnNBi3I03Xo4FCmygzChlZ6769Z5aa2HyqtSYmtpIKR8l73JkSFQWNSunNSefpV+yZ8vG +MQ13tO3vyZSKVYbWyndnnihqENfP+Jb7OhBjGz+CqTPkWldCwjENYje0bkRAERVeoND7x0uhLyHp +SU/+QhadAxKyVWrNw+GJKXzPSWHB+fXDgLYyqYtr6+o2Z1h95E6DeUwqopkzqEAUU3sgnhT4fU3g +eBOYHtYS+t+9k3FkzBmo55B/GLUexPEPLfQrlz4LHqf+dyd3wn2mlrxXTOiLnt8ZQJHGGBct+43B +lNhGm3OpTfFf0heaVonlfbB4r9Uk8CBcrViWhxVYZUXyenHQFwpY6hRWXYqduXczMvDGowvdmYP6 +LtnFqI/ffaHXZtmPthCINSUh2GQqRrmNsmCniovAxJBTlkfTKpru1ieJF+vrlxEsTb53Lb7mfU10 +asPpbNw5ihDRhCMl8FuT8e2XvkXr3tBYz6q3vr1HcboZJLF5JF+0L9lYWszedp6M3T86BlRvrsd4 +U3djqQhkq1ogD8AZHPfTZ108Lw6KyjZQV80YNEQaY9qOaYac+KMPbdp3GHFDWnmtwGGt9xkZi3p/ +c8PqQevbOoy7OZ5U2zi/oN/f1np1KsutGjPaiGOMxyFrs/k5incNzlr/sXw4BGSDWc6nc6r7aOk2 +hSN1nSLjYM5q5MxBGK0EAA8fkZpDeuSUaTjzxL/ajb6lXAmyGVMswmAGxKOu/0rIuqjWW1P2HvS/ +oz4T6NWf8QAHGKCaaI/5HABaYiD6XqrVeyV4vSde//8SoDM8np+b4L7iH8KnhISxfAZ/jk0FPyk8 +PVSVTvtzDiL7KbDyvsK/wxq2zI7U9ITaHPZFjs3JVPJuyUssmZY52W23tf2UnM05jYtCSXUMPCap +NewvmTwKw4N1JPrabsZ1DMph0ZSGJ3Bq9so1vq7utuBY1kNqNKGYRuYXI4LZRc9tBAHuE8w6LcVB +dPh533suUFpp9/FR3Tbk+3Jedb4a65Xa4H07g9A2oehc0Y4pTVQbhqlvfYfDrBmUxWSF36IBB3CS +MMG+/SpDFpoq+opRno6lc7NHWpcHvWty/u6pzQQeyqX6UIPdRuSCFiDzKy+zf6zdEb+i8Mc2H92M +q8aced8c6vdcuekTQSPtagn+l9O41nu8tuaa9uEVyE+eyfqXUzelxYK0hIle6Y0BtOSabEBhdOfw +ZznuhoosRr9AilL4TwYMzkWrCvuTgYu3eWRD90BNnemG3NKthvJZLNd697eBX9JaoiNfHWrpLwgY +LjZocTsZgAQQoAZtUo8jJR+L4muMs2gYp73DtdyKApQH7MOvbXJ/InP7xAl3ogCncTiGCsajRZDh +fjSDOPbhKNmCQF1ZAsLTOY2Gz2CBvSj1HzNynttUshyJVFINmOoimH9ucvSvMykK7VNLEOt0rH8p +Y04YwC0ZCBH44vMsj2OHlZM1eeZ0of2OmHeys6RofPIWL2ESTo5VDgf8x1UU+XamqpbgWR1Fs5Jv +u/1jtzSZ0tJMmnDczMmd3ny8FFeJE+z1EJwpf+N0YpH3CfE1kbXJoNF2riifvgCt6v3PJO+GNC2A +mPtW9Z64zP7UhecZ6nPSE05cmQivz+sNQbvLxsxMjyO9i3Fv0OneC9ylNLSprGmYNMzgePvnSKdY +JT4nDzt2yaAKGjc+vrkNJ1o4NX9+5L+aH1WairD1T+CpmUDFW/kyJH68yA3hjp5JDgDkW0SV4V/o +qGyEilb3r1iPrfcW3Gyljp6u3XQsg06LQD6P3QSyJJSrddcFdP8nTS+Iww/mbBIEVT6Uct1O3Nja +z3uRqw9l2q8nBRfNDiZ3zT30epDP3lo3ZwrnZqwfhWeCUNrVXCQS6SfxhXiSRrjCYVSo/IO3tGrm +ExOdRHWu9n2IaEDefAadXtxSs0MXTpa7deGy467rwhZwLlootQB6defY5hUrR9ZzJSPzsLGMX1Vq +fHBM6uGsbpjnrA6j4Hq+JN7IO8vqPq715P9IHi5FZln9ERxJCPDh8bPSHDnOYE75JjyQZ3PxNLKZ +XKiFI0GzLr1/dAL9yIrCzwGpKztq2gpIGtpo73SnkqdVQfVVppbQ3SzicL9xZpfEpuHpZ4KP2Y8p +wWJ0ZJtGRNpOV3AdIzpBt5hE8zXx3Eu6mNAbUf61MNYqphVV0bD2KJfU0SrJNiBjZdh1paFOvJTp +/IL2R8XnT8H7m1YB0yQDxNsdTCupdAT3/8b80b50lKFJ2zn2bFCrfpSKs+399fwdjuTUb0TSFC1X +k6GlMdYLi+q67LpglXW24KG0wppZ3gasPd2VJihLBIO3MSsWgWk1WCFbQaShhmqaGqVNPn24ukTD +hqoZUdZp9rtgiJWbGmzOx8xoXbxb0Kp8JyxCs4Qp82n4vGI+bY0mqReeFfVN3WckMo47cz0BCMyq +/pBV+z7bXufFWrRJ7h1Zrp70fP4ORk36GJDlqWXMYGIetYnDSlhpYVWLaZ8bunt1Ekb/natLuPD+ +g+Op1ctqRMlcZ+c0Cs6ax0jOMi9n4Si6nkH3NN0fI4vsKjYMkfuZCaPmogCe1Gad6piV3tK6MUUT +AIXP6VUE4o66LhBAZijaOx5CxZLuHmglTy1XTGVEH7Mz+wwgG36kF/u5sUY4Dpy/uIqj0RGZaUG0 +uJAYlyuwx3+ehoX4hTkUqSOj2+Aon6elzUCQ8g0bmpp03ots+D6itKkfLZMEuC8eq0XDBYudyTKF +5AQMXDsFw+NKsVGTq/zCiFAWJx8zjMl+WshGnT1N+LQV1uijAPGMEIP10Ns3yjjcOMYSdd4wnDBJ +y3XDhtNbVh/WI9vIfA4rJoBVVyxaig7A1q2HSXJo0Z2zj7GtCUYMuGdzIP6nOidVA+gjCYwWDW53 +1i36lLcDgkaDDG6vcR6f6BUqhx4vjr80b+fgGoTN1LwCR2Pefrjp0YP1Dob3k2rmM1VTm3o1Gqgj +4T6Hw1jbvuceqjNsfWMrUyulmmuZHn6Of/d7pem2RFn1w0EeJp+KafKZEVAHV47akJIFr484Owax +N0m2rsEFS7NQo0kic/e2kqSf/oo+3XWqE12vKd+/pfgIvDOxRAa4orzOURp+Z08xP/Sf6AuNqdFp +ZLdHhWLkYVpVmifB5G4UvclWqBOc9U7DkS+0noykl/pH/9KSFp/YhqXBfQi8yHAr5y9908hhZWrg +AqrqFNdTtQJEYttcMOgg9JNNHiNlC51y5eEaQNKroebcvxqs21K0F0saGNfY9FyBbAScMqOdeQKL +VfqT2XkPbsYpCvyEx6z+Z6Z3rdxaPrJGgpEALge4bOYiTtYRch0Ge5QwhCBFBzQ9kVijQNcro6Bz +RqFMdOBGfrXtlckLhJ60108HPITULC2/L1j4MPEJIDTUHs+ydzJGwahv+l8MuhVn34k9AMdBUKt4 +bkgjGVKX62XxFU1qmcb5+dIB9HPvvwQTvym8PgF7urW+eqp+l5ko8LJzb78qhx4tbPJLt8YbI73M +HcSlG3MtRpi+/u59FH9ZXQWSUvviNtNZh1N0npLQfl/s3N0LIEk8Eohxcm95gNPYrVWTuhjiCIuv +FPUm51wIS4cMcd5n3Fi2xnvA1ueT6uqKoZt0xibXBV2uPDX6+Fp/8w0SSZImx5sukrqiqySIkgLA +dx9nevvpYsbUxkSahjOjbnX0SSjifS4HA9RM5vkKXBKhLHG8olWDLTd9nOk8A1vXr/07I00YTWLn +YVtoQeLEilM4KUYKNTlP9Sfqlihhn3Z1TQ6E9PM4sTWZybBaDqHqURNt8qARIPVP/fxOEON9yKmS +xkABmQxPhWB9zib42mghJ3EclZHr4ulbvw2J9PN9USwfxJEg2mKCLaIPDOpN9z2jwDRcpp5KoQK3 +9xHb/WfBaqlugeJYMKR5mCq3yV6FcgvaeQM6QFRVKKBX3ZOjC4A8ufvoe0oEIpbqjchYFqAsXXJf +TP8MBpZarUGRW580HTb14XsOaJmGsu/EpdmPsPlO02OdpX8vOdgb0pZ+z+XurFyiJizMRaMQzBT7 +0TgVxFJ6pd4fVFq4Awzv0VK2rlgp6eyZrWeTFVrMoOjUUhA2iLiO1LwPCmwURr/CF2Zsk63sobVX +3SOrHNV743nCx9HYl+oM44JJ+YAuWv/2Ac01jEo8tGI37Yvx4XybgAWYfdbtryA7Oq780/QHtp09 +HL14N5ts1crbYegPGp7z2u5cOJlIVi+21e5IwAVt5ESUpdzxbFd4DQLBziQ9UtmXSVrNN0subJay +WKvSZrM6anIxucjur4c9/bPmTb5UGoOPx6RjXSjkCpABifrN7fZ0yZflPejnrAJFwQ5U2y/kFzt4 +YUznIgAUH5kZmkp8aeeAyW7OQeRyMBJC6gp5IlyV1ZSSOPLj25n0oEELGutdJiHMqetq4Ec+GYKy +tPWmlR9EUWLpQHAzQHxwNJbyrRg+7DgPvNMNY7uXb/ITqRAZWSysmEfKALG7aeYc5PFRguIViUYI +V9jD6mBK2Q21aBuTZQGlH7Ps0LP8vF29DIM1JcdznFR+wQ6bDpAxan/RITta74wjBRUKvWR553sl +J3P0omQYLoqxFBXLdR1i2Pz5r4mOkK0mSy687afJLADUZ8/l+N3xyHboGE620KIed/pjJO8yKiMg +pc8TP6rAWPy5HzsvdlUdxMhyUVITlbwO7rlJSkQR55/yKZOxOtkZzIc6z5QOpUCnzV+Ybl91X+Ya +6EyTGBp6msp7T4c5H9oE1JsG+tNlv431MlTXwwKXL5vEJ7K8Xc9NSsGzBD8Fz81mINx7taibO2ms +2zF/4kSbeXAc+iK5Bx+8Nf20yGKupBeGWim/N+90J7udReiRX+I3Lr4or3hbbo8svdj9vgMIqQDE +s9PuvQOQig6wwX4NUdsPfuxGXXGhfAHWPUNzOZRbWynk+/5enkMzPV8GrAjI/7QYcCaBWwP5X5Ia +FjXFQD3avXkz1jeFdkhFsP+BGFNC09ZTp6vRsTXDSeMNuEiC8S+szdXkRQ+9F+aGJ56i7FqBid7w +BvBAl3ZpYzRLnnDd3hp01NdL3wnNAkf3Dg0bQP84M/NYX2LBwcPITapHh+uIk9/h3JEf4URc36mD +2PAUacI3sZeArhMe4p6SmXlpHrEJ0U6zjUA+Pqzw4V/cSFvaAbD9nLRBfLjBTfwjFFvmt89d95M9 ++OpPX65EYwpIT3cpr3MtABfk5keGDOezY2HMrR0zOpVVkDEX0WJxI14K4pH0b4ZYN+Wf4CAkcnhI +c2W409JjinA44/3XTRij2xduFDOWWnmZWOiB4TruJ+VYSx7oTpn2AeUI7y8JKhIWgWD5MiHkfHdG +C6udJZULGPRsmoblcPdu4KM9xuwPNJpXlyqGXBEDjCN7al6tEvoDGLLXEP+gcUdOvhUpXMICgVNR +c7bj8RkWc9VFd921kyDkmP5gtzyABnjiIquTzZ5q7PveFC/Xb6vM2/NO4nZpVWGkoIpZ0Q0ZpKXC +n3b1w94K0DBwCgTrKzoX5V09RAf/GF0nW25bxRgf3tECIhkOHYJbP+2ph8RkuJgfN7gxUCYD43eJ +IBju6CZEoT3CnDI/UxkdwBJnhkQX2FLoCehoNuql+5+NBri8rKutt/nMjyFr0+9vf0SFu3FegrBM +RAP5qTZPq1BBkwYRuM76tSWg/CVBeqsSyvnU0Lbow2LErbotGYDHVEz7pqq7U+JxEAfgMPh4QJwU +BIEVuzJ1X751+oZre5b3hfrSWLOrE0kIqJYuAosy8Xr6Tca14as52ORb1XSRatNgzrCrr2aFR+qW +g59cG5A9IvQVFq4PE+FNp3ikyBLi6KBqO0e0aTQODV9BKRLeyVB/mYav4QFbrUNRxoPRT5WH2f+S +3x4vN/ZS1h6XsWsMKTfZrs487HEoh6kySDh13v9VrSYCKwHy1x5wiHUU3aNSe5XSIh+FIgUaEKcQ +3i8WyntGUqmJHEzUXAesXmTFsWYlXl8b+0qT0GOYjsfdOySWHteZr5t1zsuh0nDB4P4HkaHdxsg8 +Xnan1/Cu2ee9eV0bkefPDlgjkBUtoWD0HxI4ZF7bBZ9ead/SXUQ0N6EQOj8h7XwoqL4xZQGvQ6Z6 +Ka25OAGuQUuM/oc3tTMj+YBzPVOVqvv7PuJJr7PRsl/sXDszI0U6xqdwhv/hQD4RjbSK9kT2nd8x +AOvFLJ5BzwPWqpqcz5X7M3lyCFptxOmwbkRl4wzjSqx3KVmpy1pQEKwMp6fSeDEYkO2Ef22Fxhs4 +nZnbeyudW6gM/EEFFHbv3089fFlGYqskoR133FzPnNS+sezVUje2HRJG5n8uwokhKRiG4JVwyqHB +sXNlkbfVvuUO4PVaI8asDjVmMOfY9FDcVPkdcqFIdsdoCTbi66atvS3DrMBeZir6szZmIv1WeX0I +soUwUTlBh4uSiJ1joTcH1JfBhwDDeOTSQoFEYUu+zB94SwRYy0ZBNn6YBV7IA3Rgt3fA0lIYZXdE +4GKm7+AoTl60HRWOqEdZPpN5F8MuCJI8tML84EV+42X7I2Szryj/ckvW+SJu+cXsDjkkJSDJAtCy +zKLeCeMQODpZiqEpedHTbggepXM3f13x9xwjiG8m/i9Y6I88XFtNBmeB4LXO2fBSk6lRut1gQVjU +EW2/HJcd7VjUG49txiU8k4qwhnIWSPPkngC2/djPAvgHHMLUFBHPr3of4sFqTrTXqZzgHRJLhLmr ++MQkoDTkZHX0UeiU2WMsYdViKv9HVMfIoLlYIMQ4rg5wP611Nu4v/HVm96PaQG9oRGjf5dbOeCGp +Ga9Wr5yLl7KD+6qth2rwR3of6pf5fAHnESDLyAggRPAmSANHxjLAs9SZxQVKVTX03gHcoQ4hM+k+ +b00QWKCdSLWPge5vxVsNE5IJqOFHby93QdOY4WHxaKwugqmcpnCT4ww2ehmTW9vM+5Kz7pL/i7Tp +Y+87UjDgRxM/dRtA/4Yr0Oox3nsxynTCMAooTARi2m6iythbd1x4e4nIqZJYgMEN00Gg4+QALA05 +9LPEJ+SCuiDxoGebc00Q6+7MqWv/dHug8AFyBbkN/bVZmthk+Y5HMNo+uzTIlHJnpB1+xezT0V8j ++X906QQiLz4aBJJSqFo8T0nQBE8GIbZ20WZaBREGPoaw/Wh+++XcHPtpYYgSTZX4+jiRWQkg5Qvc +XBBnqMPKaM2TgjLndxPLz19syYyY3uT/2gDXuRA2gAiXTNfqjjbExATg84FCKgFHBzMscmQujtMs +hCT+UiBmYGKT1ZxPKf2p2vz/skPKEMh4N8hz6PM0eJI006whTCV901ppIhWY4IeYTzL9+V36dKK6 +iHUIQ38i1Euxa1D6t0FD9Wdq/JIVK/zEqy7Rfu7eTd4b3CwDbYb2HdFEx91PpdX/x6XWLMvxhBn1 +HY1YGerU+HcXXk7ButvtyfV5X0p+u9SEhP6J44waMvXc1aJi3uTNmYrRzfNrJzJ3H9CYVJ48pDcl +nn5vFDLJToAX+JhbUTtqMKposOeP8ETeUv1wPlOUq1/UdFG64oJEfxb3vdvfaJIe8v4dC93+hz2a +J80LNLHewZNr35TdkiQ4DxtuWz0qNxS6+/N9HA/6K9By5bHeyDx+HoSgQrP36JK9dMKhoDU8cd6S +rMJbrxA1YuNDHP8/QRg5U2FsFoaiiV3jaO4aPtQD+z5sN7mORyF7w42n5sGaiTEGN9pdOnmNvD1g +6cvigsyiE5E11fSkB6es+R9C7tU5o3nfmOLH27MTzJKu/DNuqvB6OWOLnTb0t9vEK+O832+g7gCa +8w+oM8gyF3HMsa2088PPpbHedSNJcCKVs/EeAJvSDOUt0YigULJ6L+fo0YcO5kimSmHJB87+kjCf +tm9LnOBL42E2AYh0l87wYlbabRXhoetrpc0QbuIMpYL7DywSNgmS7p89ciCxieL2Gv6tz7qE2KOQ +w7zRDSCKq3LlQuVxU37sDGKBujf83Dk06OS9wNdVknmWKiJd0fXWEOamtzdfLM7GTaw56gMl3we3 +qpKU9f01KdQJhvLqqzPne2UU3UBQuuv/o5rnp6UIG2Uy4aZxl9lYHvhelDyKUm2WjorZt7mx82fU +2IngWNUz3LtQx/gaeuycfxJPc60eZ5wLQDt6IV6Aoxc/BzxAFn03BgE0kd0t7pf+f5S3Zt8dG9XC +5yOqpM1KIPNQBLirdWX/hR7n8Uuh3zM4hnV1uW0jNG3gbcLGXeOH7fgkEgait1qWc3WJyC0GaPo4 +c+kdMTKAiP6NIL25S6D5jjtG22dPUacy8AP8YmpBvfOnxLeYCdMdmPghimFrQsV8B77zZnLm5obr ++IcalZrnw6X5BLlAf01hQhK0WG7ur0EYeSxX5EUvzIWwBXHTyvTREEcNbcpkgdfD1P+WBKX/Ka0a +JMZgTPj7r0G6w79tDmMYabhhoz8bTltacpJirA31Caf6ETP4PppNTO5EG6fhv71Ku8i2eSZyXsLt ++rbsk27koQO4v+sHXDAqAtOb83GeCouMWKfZshUPhTIrBBrrJUIcEZ6aPAkBRZvSdkuovHfMTPwK +lRqawe3kjDZTo+vwKyNBruJcV0hRWFpv9lqeNzhXYsMezXs0COTvwAnxHMQ5gejQTVj3em8XiT+M +JXiPZYQtTRp/vhwmAHPT+6+qmgtaKDEl78OP07aOMjT/UNHz9K+Yz0rBN5TXUeN6NE4XlkY7ZO6p +GO0vYfn5aywh4awdsuSA+aMqmhQOFzYlN2q/s6uQf5r1bCvf4J1cbU25gNzhNoOKruLZsg49fJoK +VemASdQkjTeT9tgkxECgSF+W3BnfELFhi32cDra0CL+uJH1rsZ0+uRQzAyo0qMfEy70ZyGB5EVJc +sYOubGadwcr3u3+xvx4R5w2KTVW4Me/HrJ4qjPtiLZ3NqKjAI7FU4hrjFEfBwtGgEgXsEHSN5xmk +zY2yg/2dfnWHlzmw/D0e7T3zGyyPoQzpwTtlARCO9TCgj1zLy4+Pbd+hTpzCJIUQHWkHeGCFoKOx +Atfv1iKcadwmqLVZ59wsGbUflfV9cOGK5ZCTWS/4yM6fbfrPj3Hc6YAT+GAaR6QijYaSr/xhJMqZ +jQOXtCYChrIySaDYBZSPb0uZemJOX5R44JcBpatf+kECxSAS0f2ER4L/7RRzy+EYF8vST8+BNRvs +4VICvFBO64u9wT90V/214ZBXeyrSWueEEXpUb9O2QyxiI14k29Dy+nIrNuhD/9rH60Ke48x2dWAw +agV1ThMPcm3UedNZA8um00DuzPgXWS2U0mlGxf4svzOxmUrZL15dSmwgsWALfp5GqgCHbu0fIaix +S7efMeulnG4z8g+e6NikGBn4thLI04fBvXKfT42JHTeQmdQSI+Wlez7ceLsfGVrh+G7C8veW1GU8 +82HARMLGqBaDpaMz6AX7W695zZQv4fttxPTG33r1LwNFXkIYmI2L0gLQt1tiwlZ2kqVaHtZzDzXI +uKDiWcFAKOFkbjDjlxhsmLX1YHXg5qLDUwEv4IfXd3lNe31vTFNVyv9NHva99Cn7J4sD5e2888w4 +vTvCWdewcuB7weBCfKPWmSr3gGTpxPPsnmrE6rtEnhi0dFGLZP7YgoZmpS8uoT9VOZfUQdrLmEWD +unDkreYo2g4UeZvc15X2UzlMCgPyzD/4SXsTxpAtCEwXJ0EfPRtyB3Qwk38SuUgASm/4A93lOf9l +Sf6VislQHk738gCfi/+Oq3ucfZdjN7ssDxRJ3fYpLvdDZh6iND62WBAhDvk921NPmWALlmufSvEH +BGdkXgqkVt/elZk9AIljM5Rg+9m4frT9226GiZztMjxfVRrFhumh7YZI10R4ERaMIc8LOGBWzpI2 +HqLmNGcY5pg8TE8vEyoCR0KcyjIfx8qh4rxd4weffGSjaNSKJtJozWm+q6eEONdt9JsB6Z0DN6Tw +SDdmWcc81zBKWEdny/yX7GBZ3D2C4AuwpNK0DCAtQBA5tjCQ6KziQGzC0vcNFPs9SyvDaQet7ou7 +vReZpwQkxihZbfNogTc186FZ3vuc7loKn4d5AnMSWrZA1GRtVSnoFVBxIepdlGFNNEo69jlcuNLz +suBTCjCersoJsSav1TO+nBFWr3+9D7HT1F8NQUJI3IieexKsEVf9+bioX5gB+CB/X0GG8FwHJZIk +QstmQShTe5Z3SINoIpNojLJlu+B9u3EFQ7fDnmymLqLy1h/mApOZP+aTs94yQFzOE5Yu0uk/Edwf +3xebxvsjEhrcUT57b+ifEviXPcxv4IvhlhsHlLTY5/roTNLs7vbzdzBqpXSCBax/TBAggHK27dDh +eRQt+8h1vQnMG33uZCTbTkPj1bJwLTMEc3I1zFNxVJTa7HctcN4c5tyw/Y/2rgMCsCMjb4jbfJEM +1LPbafO1DMBZuxsSyg1MojQhWfgyN/zk0cz4QrE0HWLp6K/WQCjYk/sSkcWeDo9mEBV4UBJN7Ec8 +v/pMTori+WVVv8ja75IlZnAwNivgGSGOR1UigFX9LHM8RLBm0rx8BNduK/ScovlEqYCatSYkDAC1 +LzjWwb3120JYM/X7x2gTTCN/LnE3+8TN1fyO+ODA4Gs5AY9ggX6wfFBBrm+NWkkiSpcoGAiNCi8Y +L3s2FJBajWX52Zc3yjQTxolmxyZr1XX1kvRA9TDZYqTxk9H5TOVdEBih77uhjXD9NO58FOybofs2 +os9Qu84a4+lm2yPmL4FM3WDghbibXHqHjNTssoHN0Tl4DRyV1MOH64wZakyCz8G/IjmUiBiHCzoR +vKnRL8/O2widY4Hmwycp8kisp1XSeDyo8GPb5v5lACZQvR0ntHAGbS0vcW272Cp48LhVHk8JS7zs +c363h44QB6o6wICkJi6XJrPb5pGZ1AcyofMQDYtwCl0MO+gc4xXeZQQGSYH+39D2nUqiFLFEdgSR +qMdSiMioS9B1llF/w9LKHjCzLB+D/tM/RlAWegRcpDBHg/uXdSuAtX2EdQPjMiGrCMd3whhiLg20 +2/M4+927bSfrCDcKtFTqYL7wYwyWqksi6FLw9WASOh/Z6FhT6fF1yuLt6t6kVujxRJr89xQxn42+ +wYnHKqttHey0xYOPUVjvnFjo38Q0PWkIhTw2QHLSvdmnX2L9tG20lb+2n898tPplOBPqLeMn4PRI +0zam8gX9IX7okaiO8S5UdWpdsF2olcnIYwhnels5uaTIDnmD30O94Gpy9YGgD2W+KWtGCN0uBKfR +ogUWfsRIpDQuKaSCygTYbyRU6HI8PvL6ZhoWDV33sEce8vhqTmCBtwFZhSzuFqIUzxWywdtf34DI +z5uiuExrW9h4h7bopNEIWS8Dbe5q9JhW2RnJTD2UMP+TLxHCnVKLGOIe/jMqFuS95qdKTtYyMVYp +ydh4E3R/rIbs8lu7CJZEcSlIqJ8haIVDA9HF+l72i+LkEU/e2R61V4om82DRgEVGzOmcFkWqdoaE +viCvuOZB02JsHJtXfCMeBURHesvovT4FHRnU7vh4mlyOSCdoFNUCrsbCGWsLot6/ulu3BNqANLVF +kLPC/8t5zL4+Kizb6zK9+FrIV6DWDhuUpZH+d5mpVkEUo5trRFlzBadLw6dmArTRQjHnuoAE/zAD +BRCCWLXpeBZZVhuaOYAJ8NAa+r94ldVxBB+JEdpXykp4pMA8rkVoiq4zNepCfa7jzKBZKkfGFr7l +M9dVIr40WlRkebrImMPXh5bEjjZBo7yq3cTUtwSuDJRQfWvC1oZVTMcOPiS+2eZvyTC1yLcyhqDO +28RbfEZjC+WNL1gCrN9E/PchGGG4UC/jTiiH4jZMgh8NE9lw+3F59N09XjQWM441OjQnWi8KwxCn +Y0/Xxpjp00Spek8IElT3bBKr1GjSZ9J73SCKNL4+EiNrOZJ2NzQYWL7QgNIgvrgU19ZGweJPgV3f +xFeK4ySYijmi/sVmTR5V87eAgwHKYindG1cDURdNmqzrgCOUS8QS+ohLLy2wppEeFLDknpPkFGGb +Ht3LyJyXwWpVHY2gOyXTPrBtzJmQENwYwHlK/60vOomrrWDHHs8Me7ZVc4pjvYBtIja/yqDgzKp0 +rFq3YFTC2RL5B/WBHczctKcH4ATTAkS5drVFqYiWxeD+JB3vwc0oFKfPrfgqeG7cAWgb3LsSs3H6 +jLYdf0dPFoJXHH8fUhj0SiXBYZFkJLgoRmwOuFKv2tgJbQxvr/7H7ZpTLmT0vQwW5nU3m31tpE8C +RKhzbbQHLf1inoV0p3PKAYPVQku4oEEWhjxRO99iZFgJHmErBs7QZDxYJv2hmAL1X2VSjyuRIRI4 +cy/fxuMVr4vjKSsY7B2uDj2CGq3VVVXskSGr+16vWkUpc0HBP3CI5vNN9oV5m/4q0XiFbdI5XqQy +x9VTkAvHD6zjcA+87ZGYJ+UkeR+pIPK8+zTYTVNwPKEdRHNbxwBCtVrZJSRUO76Fe7or99IetHrd +vo93maQnJ4oh2jquiV1h9fEpeZO7XW6jcmc2QMJmie/Hy781hvsLNIVV38mqNID3Yi6A1YjBTUOD +NGk1M7lK4YZzkXM+gMY0q2A8KzVidwOXAcd1y1tDQgu4Yzjyl+dcxpQ+ELEaCWG4xWaLEAktA09P +iJJp2r2G5kvqJizNeo32jcuQdZccDK4zvBH9I0Whh1jKoU3HUShjaKbmOcKdjFMJ62/AnZV8JFfh +5dKln2hGbYsYSWJ7Mtl4TeppBiYc5oqhJmI2mlhANoh9R9qKtjFgTn71R9KOCVoSb5zjA+Hn7M2y +HK1fwFoOAQumU0SSh6E04j3dXH1CLKOjGjqkzPTvVNXKzj+jjsjspEnDes7SxtT4FR3KjyzLb5nq +xidySuB9iYwmZWL4SzyEF7K6lZKBlneAk1Cjbp5IwlCqQDLOs/V5dm2qHTJ30gsZxuzAyNhqg/Q9 +5YCQbiIVgJud6njsQv1yXOQf+A53zX2lVE7UeZenMLdSGmLZhFUTh7DAGXS2Vub+tbSl1PJRNbRi +v/E3bKHirJRgt9M7cGXQyq9CXz7jdTvhXDbnatAzF4kve6YJ1x2iejkY8AIy6acDLlD+KFt0J8bY +GaTZOzjfQLGwBX9alrAxQdkd+LcUGIn7/khIjIH5DXAVM+wHJV6UdOFCpH21en7M97YDsOHsmuys +4yZyy+W68Yk8ETi3je3op0nFjAFYzYQHsE9UPHDzYeeRn1pv3iCu0LA0pG6hmPZyAWiyv24HIOAT +tqCf7fZxDNewhf+K5GGhS89YrA8ThqGrsWvEYhts5dpd2OmKyY93+cXL3oI7oYiGUcWJpX/XbuyK +VcXuhwhzjQBVBh+i5qX9qqZ6YtaLwzsZcZhfcPl5MVlqR54kv41E4qnVKndKySr8W63nSqJ8hj35 +OEBF4jmF+sKyAfKlj4yubOgAT0/Dst7bCU8qmM1ciVFqMYqyyRHSPEdqLCIN7M5fGSCjgOFIEjN2 +53K1hcgL0HJE9NGTptuii0bfyO6Y2ssRVuC5HR1Y8+cEno1UOspf6CRsFAgeQTtB/FNgBhhMoLwN +t4LZKpcX+qkk3SLN06vYsWBlGEU13O7JZoytlStsWnv51azkXF/PcJlhgHO489cSOcL9KIZ86RaL +RZcE9vqKSH5rRLX50au++RedWLcVqZgy7a7C0OaCJGK7FYKFYQV5TPNRaITmjsZWAGbcqeX3HxMN +othiYNihbiuDLBqbDc6tc9HejTOIYlAtZXKfd2a4SqgdzAhU0+z20Ov80REAI4qbOvgBFL8w8kdN +byOvImkBfG/QmjCXIM8SorqNbb34Ko4SdabO2gRCtdhefwB8f3bEjYkxp3Elm2Lij2R2I5ubHOwk +3MXaZfrZUhhd7pkD019GRh/fcOOulGC/nBos4kzaNM+IOSAiMYqBO9+SdLdL330BUifnLbB1iBvY +ZyRzUtHRfFkrPoaQbONTrEKdLXpMO5blVPqB9hINDd609cRBBeR23zTZF2eyZnOc/YvMxu1pz9ph +kSH4uE+1dr4Eq71MA1B89n2dXR5L8cjMj2ngWagtlH86vTlFDDQFOd/3IbjBSsBrQfOFfRfkUoJB +dY+Bq/N3k0rinco5TOMRTm/poXzTddgxtN/wpiJRzPMaf5+8f+j1vwrOFqRfEAN9saIZH6GSufkv +AQfwqwtMSh7wnP3JhGJp99w8IlaQXpgyWv+QxMl4YKTDkKgHFJigqZe4+5kC5N2q6c9ZjEn37KNR +nDgjgpLS5Tr5/ogCK2Y72WoeenoQXScaQhyGUoJSzKbguLDJjJoBT/nLKZTUrnCWxmg7B+EJdgw6 +AaHEaUNUt+MlkfAzzM0nvH2SFpFLYuw52BBxGkWw4iEbQMZOTUc/bIwEss+F+wQWXXI9ntibpWhl +rJYdeLe01tLdCOaJtkRTLqT3bgVFkk9Lx4MZkmKetlzyTf/WLfnTibbpFssVpxdBpfR5P3fvN5Jo +xCBW75Bn2AtIZ1MOFRPbi0uAWkKTEnIRYHCaN52qqC53mjFVzmCjuI66FSXhHaf3+VEMQjKtiYmV +Z/GI+39DL4Fuz+NWWlsAtnUyZCLsUdPJhpni011xvNg5DStAe/TxZIzGj/xN4aNg37iAeQMbEFZe +HUcWIRGxdlSg3FXbvIvoDoeOCpX26PAlkWUIC6kjpMy/aY0dhgi4BdKJsAogpMkcXQxadPcv1djh +dShzI6luX8de6XIOeabnupU6xmHkbWpSZ1g64XpWMTBshitP3Bcng+AqDaKu76h9JPcnx9vE9Xpn +T4ob2zoXGFZRrxWZeNMMhLbg0/JXhoOBais2PEE05XjxSjnPZpfZQu6uaedyR2FVOnnEUb7rAJAz +X6YE34QsG52lt2KKjtEwN3x4AbDrAnwrSiyDnNH2lCvpsO0NxOzVwfpfoPckFLUGPaoQru7egkIo +1VHxXA4+xUp+SPRcBbLH5L2Waknlo1YWx3EvftJBgNbRP8PrVhhhkrAB7JyRrz71rdfFpYFUfqeI +dDFCnmSphUy29lD49YN2D88xuKtCJ+PkOUxfbTCQdgDQXaF1ygsH47JgdDODxfJ35HfkpnydnnQY +Wn7SHv1EVAZ3cajf3ZrSMatEfk+BOsOISCe9sV1jZlwEoXzsMaJLLaU0kGiL+btrLroMLa4YAUq8 +8LHGzgBPEjRmqt+bckUOrUQ508Wy92OUcDyLeTvqzY77J//6fi2OtiUtik5t0gapZaI+sM2kodiE ++6BSjKlRGanZPWzgn/Z80BumHPGrctQKfICIrtlA02qxNEXTKRAxPm5hpzwRMLcT3jA1gMag/od8 +9PesE29m/exFmnWsR6R5SxAL4BK9ird9Bmajzu/QarTvBYS71ONpOBlzURaUWwFin3p5NF5gIP81 +MUVFP+DI7y/X+7FRLPZ/VP+/9/oCdn3m5+QF1a7z1mazpZl1qjebybcGfwpToDLzTYr2/YWrjClw +wPyvSZLpdSXIAPRdUWRp8PRbBZdZ2phTSIWwyGecKM5yxJkOTB2qsxL4U4gkQuqssbglC7Y/MiS+ +RKEvqkMXOFosaEFX5vKDoCebwOJdUpISVIckXC0uSkRglSJrYqYuCZuM3BqmF2lVh2ozp02gPysM +TsPmRcQ3fJx4ULNaOEYyMLIEN3LUjN8Wgq1XSvhGgFSv5R2z3kD6gCGYMyqallBAoMNqAA9w2UNJ +U/poA3zu3/YjddSQVJpDuuqwW5AugwuTY8a7Mku/HIY5/gZ+30lC7N1mll9gfWTPbpdiOgE1Ts6x +Vc7hcd2jEWpOyIHr5cCVKb4EwxqV8lc63gVSPcmqrPAoX7CCe7tTDQs7fdPpf6k7YXrXr8eM0Hda +nVMWuy6qrMqgKkTlkUruc5peIGOS5+N1p5ZA9Mc3efU9vccibV3MkpLNY2bCU+Z+UOCBiftKl1FG +PenUOsgUiTftHi4FNpMklpwAu7CP31r1z4ARz6kDH2eyQe9XTLrHpDqhDXwKF7qN42XmxaW1u8N1 +wUrVAvAJt9aWkxafOTTwHxeg4oUgv0h38pVRPT7K/F1/XD4b3PXoBXEPHFmCgKGxV1O/fNl2igOx +5MbZz9Hkt7LcwGoER+j+I9UMpQMFKEu1rbTQ5iBEtab4QUi194RAQCTIInlCe8z0DWnb/axoY3Fr +5F/M/2+erL/S0JY++VoFNR7WpfglwnQacXP9RqvJhDdFCIM0v5aXZRDzOUInVvP3XJy2BhBhoLYc +SyIXqJ8+JFauoA3tRXcsJJA0qkWELkMWX5Ez3+ObjQGwBKFFp2Qe1nHgElOXz7yRtiYxORQhPz+f +FNxWPXhYs+bVjj16+pzMNQsGFMk8BD9TNUNVFhhonQ/gj/vOV51P/maaiRRIJav5y9QylDHu9kSF +MBXiccjT+ARRacnekic7OFjjfQFsTyBr6vOplgQE4xdjyNvgwD0DigQPKQe2V9kLvLm8dSNGPrVk +DZhoQNjEIEXiObmOzNVADEGtwXquqGgHSdttJCG6NGkPq5ExxYkfuY+fyMb6vW1hxZ+0do8c4C48 +1cf2C2Kk/viGTP18pDEf+EyEsIRKHYpuXtKESW/AbQ6q6dcaZqfxBUmKOpttpIL3Q74J1KZRR9V/ +IAb6JYtk7OlNiAFfhK9UFzLxJncLDantnGJ3lucmNlQZyVPOF3LGh/YYf3dCab0Pv5r4fuiSeSpP +LSJKqp8EiLwSiUmE68/YAC4wxDVGuMSfaj16ro36XIUKHm7+xz9jhOiLAHL0ccRra8d4S+kdxVPQ +yacwzVm7lxulL0jT03t+9koYN+qiTqmVstKNLRpFk5W+91iGfPs5/0Vs/9X48qKFVP/h6YdFsR3U +nA7yKA5EO1lxEnpg39e3lWNZOp3s3L6OWrUgzNGL1zHXE68lkx36vNi7EGZezHSEV5hp1ANzGwvV +XhtvjVVvOFzPY79mpE8i6IvxPWibCpXN+IaVBi3XMoSAsluuZCcMIgY/MTgtq1j2SZxIdHeQjUk1 +767WdI8Mxt8lmuJ0MUg/sCQeziTlAiUO+Qz1wQUTrI33XOnyBdsxX9xMJBrSg2ZjJOCAeM3MugKK +wcr/PwTwNtAQaqdw1WtU+7i2NjT+4QPFosa+7AnBp10/POl10c7YBpQAebDdUQChopcubi3+9hyA +imQQyCRXuFAQrIhtNHb68guPX+UYupsAmu+0amjka+Y2y8pRp9KYFShImqyBJK82fprqnAq1NhLP +sdpHeCbPV5MKkhF9AO6WKVoqtwiAMvoUZQSTMc9y1BE/scv95hMJeXw2jA6RpiJw0Knb4usdnQC/ +73Q6WGCXScS9NTShO/44/TeUo7ehMA5ErXl3SIOuUp77ka0ctxfMf+++A+C62iqfK2n8O5QGq1Zm +c3P8pIRudRcj3hCevHpBGg+G4AQXXdws/lx7HFlpLoKEELOo5HNpiysQ/e1bMYm6oKNjWT9hvKib +vrFhwclbDq2ifMY17m+WrU+0+8TiPBxCwuO30QHftE7bdzA/Q8uYiIu3/MwQiq7/BuHswIkQWn2Y +I/ddOB9fACqE7IzcVFh5TCtrcNWpvBXrLYas5QD9Y5ESnjqT8NfTvns8qIXBx8QwHhd4ejtP7qcb +93ntTrSvsFD1oQ7KpAoTq7laqxgtX9iAbcz/o7OJBeLvhPNPzRVqUtAGr5POkwAMzCnlcK24kBuz +THl/5eTwAZYL4wvX/2/ZJ4yv+KdVO7EC0a+IHPEVnmKIN3ia9Q6mVEXI1G2j+iYPRdmqNQAj44s3 +TTqg4YGl1xBK0Tz0CNLZLnd4kJI9aoCX53xZT0CYLfiZoy3jpcM3baeaOBX7Tm9BNfAduTtu6S2f +WmZlJ3m/B5HOkfWx02xJFtWojIxYqX6lbIip1kaaiGm20yvQJhy6ybIUDxFc2Lzs3qOlIep/kUdq +SMdHk/kFK/dAzc9CreBWPgSXiVqXelKzb7O9L7BesVRjcr/un15ewx3gpQUBCOlGPWyyUoRINshM +z7v5e5dOezqGnCd2YoIYwK7ru/+sPHQu8MZ66JY1v7jqHbeihuiUzNrfVRDj7no8XiwzZYFYjosl +QxMXnDvY212iWl3vu3LOAII1bLSCllcw1Ag0LzLet05OYayBx8PqE/RvmeGiunXLURG6BFMAYbAG +Z3qhw6hJTvMI9NOXnlJ0Q4dr8yARjeEbPHCabcg1NITLdiv5+SQ7TZPRFGx2m7+4p/jcS7KXf4Yj +eqSG1ojK+GPdOeYYVvATEYC2YQh8F57lUwS4B3zXEeWPdyFijKcwg/IdDWVTG+fIXF82iaMo1Lov +NIhVMDSHU1exlMbQQt/tA1nGZUSyvvnHjCOEgDC6b8Sr+TbXoTCQx14O8JTTvKwIUplq/tUCYm23 ++2P1SQCMCAUtmmGA9X/obDnNU+qPW8OB8XXqg2OJf8Zkuc8+Xy+OLMDxXZUUb7+49PaOl62LbrCh +4zGZfZ38HspySQOVxumfn8SI8UOwVVAqhaQ/xirKgGOrzk9W/Rvn0Ej6sZrwOZ8WeyERCNOlMBcc +DMj/hJLVVqQ00fwNKYMiUFRzYcpnb4mxYempnNZbf7Myu8KezF9P4q3BX+hG+QT9oeSOvHtmx+Yz +YIdsn4vtKxaoqiRjiJBFX0bUwKz7K0NNJY+uNaMLCCSZWNOgUeOggTJQnECaRkQigCZWWRoZv97Z +u+Up6tBKTX6Flj3avzRNXcEWL4cIy1JjuJ5rE9kDekAoK4AfSP1VhCivaY8Sjjq4mLzP0icJwfNR +dfPdrX9kUxNSq8jnrynb+Q3zrA8VLJORVEgx24NHq+Hs+NpWZgfaQZtQq4D15b95a3XPTua2cAYZ +Not2sOIuJ/UBUOf3igWvsho9+Jcn5ht8GbLJ/v5W/gmCNnV/CDrnB+0LajBXnIHs9vJtCEgGqK3J +rTuuDJMm5jCktKZ0d6G+rUT6hLsq7hPAN4nOKFF6URxs2PkX7ILxA3kOHmfD6AKF8HArfJCI8z6Q +E06tsyA45KGqlsjQ/3wdiF03M/ARX51fbBeMcFqgE7FueMnCQxGC4qwAA9WUQNDCHG6xZdNBSJrB +PoQONGh/VTX/gHPEk85DmQ1dNbgZXNDuDBAmJXp4NzjZd5SGwrtQ4GzCr+k2FpIRQ8/yoUh1cgOa +xGU6yMCmbEHXB60bffiBctoPQbRb89YzeFtNj1PzoXu0UxhNd6avIYiDqXz80MXGUki4Y67i6vUe +GaSw6+L5qgNIzkJkjBSkpEY9JLwtuvH5QtGUP7EObtc+YPA0QVcDbsigDx+jtyn39SNittDKT0m+ +6ZTZ+ZXMzGgM8qoKNwtftz2zaX78VAlhTx0GnRkAxh4PUEYeJdRctFYKJJEGS5MQpIMWui9GCYXo +63pHJ9AjrKMmCIj8DyVnoT3MPfRL/P/mVvc8TydxKd7m1DgwakpbHNGrd2AItkRd4fW0k2xf1/51 +vPkuqpdSONIAJYr7R9jSnU35a62ms8W54PKaHbm2X7J8jWrdx4kKgUekA7ET8yOzPaCdxo6Iz+qd +legeqeXFXwwR8+gQ4M/zhVv3ZZDFF0vCEq3jsjjTxcS8fm7S1exOu/h5MWwk5acHAsx4R5z1ZEi5 +tsFe9GFeu7FL8/QlUbDH6ZTh0XYZ27kUFPjhnwNKF1yQ5cLKCwFoyuiDqyTB03yLMEVtTniAC6ns +oyzg9hzvapAWqpn1nvKf04FuCdp/nhbDWo8uyk34Lk0YbY+CzhY7CBzmeOjAvbRr9pGtnMpSrXz5 +t3qME46bUtVXvXR9eibF6m8GX1CuNDFMUjqXUS6w29CIGRy4Jo01JpvZ38IMadxX6o1HM86mtu+N +kLiUcGJoPxVetcJAa4VjFPnkf3KVJDMX0egFpm1CjEQ2bHULdZmPBNbZISR02JkEBFiHP8IuBhPn +r6aXpjUevokyYOSiqfccnbn6TcSoUA6SjmKt6tFw1dFnkovK33zyQC+WBlssNf3Xn2ltOkUaHOpc +cJKsSDNOYJVG3U9Zb5z1JCEJiSylAR3Zo6DrRoJ+ryB0xqXoqE/rFt79PUuSjMfJ3FpA45INhrtJ +AhWX9JWJfeJEo0mDFcdSGKeGI0oFFqa2qZcp0WN8rPC+l+nMa/1Q/yDenpayIpIEzRYYd+ALBYQE +Ry89eP98fXNzSxjnZ7I0zidrwlBa9l7fjhqq0+/A6gAUOw22ZPzrDacOr4vizpcDd1Fh9PdnGq3y +9Tdf6UVVDGt1prHQ8uiWNVzDg+Q68lkyc/uwVejDC9x6B7sJsOLnw1FP/bi4nsBklWCr4Lwv71dX ++zErZelUesWqfIZR2W8XnMwuuQyPriUyTVmSlfnFCWzAs9K8AQrcsWuegQgDBaOp+NAfCWzCH0kC +Jy0zn/tgRdxD2nBx4l+6AUl2q+6miSPn8pPvRYQa27PklVTVLfLL3NjlHLKIRUb90Soxq3r7wTc1 +4MW3J3vZJCF+bjU5RR7H50bM/sWZNKs1QW1nc1Tku7WMZPKRwognOMY+c5g85FDaboPu+t1YWYBg +fWOU6NDhfHppdhYO9kszhyowh2ByW27zZ8buIxjjokdJg6EgZVvftpt9QFPScbbcwKMuoB9b+hoc +Lx8culF6SRTXm4Jc13YQCX+2wMTz5hd3asr7/P7toYy5SHXTdpgHcUOeD8GxH7zYmB5FSjFvDuFj +ROKPoc6/dh5pz5iFEQjEvG5rZe3JS8usa7Ol+5Y0Qq0UGNsrtbVq3vME7E727/T11+bRkxB993QQ +mvQqEr1EDRO39Y7qg7WjaPhFqgPRWLoaJurzAlllvLaGU08rikrFqdfnGe0Sn5yNDPo/OJhvdicU +fj8Ar6PK/jW2kv2kvlvoPXCGQ66aGuM6EuY7fR6Q1kcUEP2yx4BPEPYd34JYRwWN5mO9Iwr9a23D +AtFp+0cMXW/ptMxNfzmkRmXv+OQea2qS49mPeSeJBqCO3ShZk1dPlxtYPcKCvOPds8fU6/llQ802 +B2Cmjv4gzP67su1Qvpn5OPUNny26nIuvWDAPZcl04iWyXdtwMFmj68H5GYIcwTRgUYVT56F5bbNi +wrUkrvvDekX8gGtNsbxlpwLVHpF7OW6PltQ4DKKXdrKKIK81EW04m8V6uMwBjDi9IlVt5YiMAvkv +HN4nisrdnBEdL/56L7VgGWt2BazsRdxOPtp+VTlPikSAxyS0XJOYSUVX2v4zaComL5maDoOt48az +C8yM7SgOg3iP7pOZ3NnZHo4uYEDRiHu1sQ5V7eHROfQSZDh7S6rlJZR51IL3qpO69aUvCjY2yBnt +Mo3GMr/iT1EaCyvUiM0bu9/Ew8dOJKijCIr8aL9biNQEKlEm9iOf5bg0vsIapI0T9lX1Y2g8dBwQ +2uXn0WH7iLzLvX+xUjdtvrzfH9H0BScpluyJZxgnhl2uEAot2omrSzrSoVbUgVx+VLwxFdTgRdON +Ba88vCUzyS0DcYCX6AueCWQGWVyBTSziMx1ni3OLhBLd+MGWEHQaZ843czUsI7ybJ0Id1SNBFJne +Hn06SZc+95+pyullv6Q70H4dl0byv+ZeWP+TO+P/paawqGl+wGRD1NKQOq1rQnUA7Cx3ac6CExS/ +6CM0B/fYp68drJj+njF9PYoGU7I9ROb2x/rn1vrJuhywbEWLbm4+fXzDMpiL8sPTHtYsuAKpp0I+ +AsLfjKlRl2HEzuerjhcw4KxeCFNnvQ6YCk2b7M7k6A5Z9/9O2WkBtq72jZS55ol7vA5/vvbosSpr +D8vM4F/5dBRaFKW7bzbn+raLk6J6p58sAZEG58P9tuSYmAN7adM1Fb2Kvq+m0DPLelLAvCPGOWbx +DJ6TfW3yslw0jHqGkPJSjT2x2k1a0rv+9EBCcw6X5GiUFmvgK7NOCnnmlWj3GNrpDWIhT7ivhA1s +Gij0JHuS1mWzUZcvlhIJ7NVE5z+pa1n3p6nHkv5+lyvEgv2QvrlRl4bsMhoV7+dKMQaFVTFZfvSY +hkQkOSQCfb4OQYlBp2Tg0PmqC2NN6F96Y/KGK/bbF+5cTR0ndgkAm+mSVjmmKOtBv6OcuPmrkvUp +YVSYtQAWieMEkawTpIlhPqrdaZGa9fm+RJyU801Yt/xL8KpjWwulrJxqcuSgz1yf2wBApIUuMZZL +XZgYz0uoTfodndV94VbOlc0PF1Q6dUnSVuRAJyShHdPJP+E4VjxZ4HK09TweKC8q7HKlVxw8wVoI +RAiEaoCboSW4YQtgiPB++FiLtVVxyfBbRxBoj7JZh+MzsMBc3GH6bm4Cp/cE6Ln9FDxnPZug8Y4I +HSwmxypFgmsy8tQic+OyDY1klF2xA+//0NwY52KV3fxICmoxMmgwQcTfMRK+sgw0QVTN7CS0PMKP +lI0Ri09Zc3q8btqvdjbsKllYVOwsEAOTldqhGQd45SekYXvTk+VA9VygCHheE6ZmBURnylY4tJ+V +1Wkk9sknEf548ymV6oZxMGOjsW5oRL4mPSBaSwCR6f6EPPewQaHlbsoYtYveA3uYooOPkgrcmWHK +jpXopt5r+bNwOgZxCCWnnybGYQ3snbs74dPjHFKDDQEV+af81MVNa4tAsbO9B3KT1cinoTsb2hKW +bab1dyAhFF3TRlCoIy+EwIl1Vjn8NpSVMR33ATH1vcgckpQJXYyMegX4nJZFleNNCfXyDc3RxIy3 +RyRPVnJHOZiG1UK1Y23eHGbIm/OKrCH5nepefYJ0vTAQJ6uJm/k99FbkmJoUGONYfybxV8nOZ0ua +YK7v7HkViDanaz5lxi6AeGUsDse8HLZ2pQg/mYaAtGYxRoO8SjdwfImBiV/tuVehKvcLXi3Vph9c +KfL2BC1nEOZUu6PRTutY4uEtGrZMroe0ZFDyvXIQs6RU1znA/p4uIbnGKTOojk/qxUNh0MFEGNsy +YUG8RVewaRJw+CpdOlxA3GZSPdaIAhxi0k9NmpyCBFzJ5U8cvmgAsLQfnELbt/zaxX0DGNJTdrSX +lrptzTFi2+JF69uExU/yHMAcR6TBETQlsQjaq8usVz7QWCOrwPwkt79carvETd2hf34C14udJKtA +r9+356nHR1Iza+jDoafcsBG+p0BN2iROY4q3gqzsW39y8X5gQ0azM6I0fAosccOLJUHR37/JLy0J +xy+mx5xaVQLOD6psCqHHOblN/s2VRzOeaRkXeGlwbAPJ14Xd8N0Bj2bGCBLqoNIjtNb4fQRfOGcl +Db510unDd3PxKmGc/abFNO8QMu3lirG1cXHayMxYKbydlUgsTPG5DfLLyObv3WVl3OKJSrHm5Bh8 +vgKdXONvQ9Ma59VJK1Gb3AX14HN3f1URMfAIPFHXiTpUi/BK3SxLkT+Bo0d/z4yl5KXvIPcHbFdl +yrfxa+SIqcQMI6uXiXpUkIGesfGrQE8Hd/1+h/9l9ax1aE/W6ggeg4APcf1BN41KVV1VQvMEjR/l +QXpI6AgmPeXtnXp8mEvdxOUTnzUkI0fP0BoV3RBplUt0Zv/FlbFKSZO6zJelJ2/1qKV5yvSHgzeU +X+/YWcy1sKNp3UxEL5tXlDgVImyur6cbaSaxsWYixpbuBFenVo6J/cHcJK2AvXG+s4AtUzQJqc2M +JahcoWHpFpW3aLnh+PVxaN+RaxFfRjDVTzsP/3WFSFI1HZDXrXP3PAk/XU9DVFf9mnzlm6QhUWS4 +tlW3ET/I0IuObJay09GrxEEl1vHhTg6SBs1p47WeNefTPA87c2oYXx3/1dN2VP3vEeVP2IPxrmG3 +6lqktAY7nJSA6VeuWePE9jNlocbOH41J7PyfE71WjBQ4CrWwKz7Xu0RbSWcvqB5Reu53GvQVIknz +oLQuzeuthjABhTHjjOB07ovaEATMycAmQDtHjLxatnH0mrank2uPBl5Su6o/YZgCCO1BVos1ysGQ +Ix0kJCs2SQsi/BiWJ8OPqm8bJnfUyoNvUXTImDkADg+K3J16RZPX51fJndYpBrbdwF0j6IK1A/ZT +rGVFULmlAwenynCxeUI2aM1HM1tVwKgPY7gSl+Nk6cJuL9B5VSYpKc3MDrIaLH1FpkTBjzh1jyq3 +7VKv48elmY//t2/1YP5W61ZH44ZvwldZWurx7MnV/dJJpoXojluQL67Yz4urkhI4vYAy3ySja2SH +PodTqR6UkZ2GRnvizs0M0dQ3K268024opjai9Gubc4/gfTu93LacukEk879QsKd0MND06Hdl+EwX +L38ZJ4d0KyUKi5KyQb3Bytn7AHmFD64vV14E4YJ59gGH9j1TI6avOR/8v5DkkN1AbL9WZSaXduJQ +orTvPvyefuK75qbDdWHW4rI5gR4n0QoPTxxvqAGESD1H9nXRCDSHbJ9VH8ncdErgco31ILnYdTI6 +l7xja7zzvJ6ZXvv2lz9hlvFQID+W+29QokW/QmEOO3NvSmAex7tzA36YzddNgLiAwOxayjkDEWPF +qOtQpl1FoQa2hrKQutzEYct46ctSqubUnFrGEScI2I27QXKvZUgYjDiU4yPefPn1rqqT0/7IYnQo +qSVT7ZV0OSHGd/PAdH38wY+fMDGoqgS6t5vNopWQPoo5fPlGbteK4DsqUP8yS9aKQweClRZ9i47I +RhL74mvdA7E96pPtw5zKDDyCqkhRNuq8aIfr74zYLV9HV8pKGoPw1+vQV8gXEJKd+fl7c84HXjec +q245tIqkWR40nVQx/tsFsgjdu0wCwB6UBWzuWHlZsCCI3rmn+pBSY7QPE3eqG54nl3b3omkEMsSX +/Shj9ibwmv4xwTe6gpORU9ekih04L1dJx3aS/IAn1xQItYCZnhuPcVVcmrqwkCLAqtONHoS2dN9U +K00mWCVgJ5Xd+stf3I/uhCcFxAsAR094DDK2LP/NnoEfIl3i0Ye909zLTtKvdeJo3Y9cIWL7CrYl +ZRT5+GtVgMLkaQL1WO5wWMfZQAR5JsAOjcOiAIVQCVW0C0pvbsZJrWGlc4ZaQFU9JK+Q835O+dJN +OJku3TqtlzgO9mXrkOvBi+YKHMk33q6B5nXhis15yfSTfgHP5NlsQgHRK+IIDct4/qrxDzl1wSp4 +gL4KAFwnZCyAv/AJH0gjy+33Z7xa/n8HnsFlWejjfkZsmQwq7nPhz2KhXsrIqtKZwu8yBFtzx9qM +wC6GZLjx1h5AJXRFG5Bl8ktaZRcDgudKbi8rQcb80Pi/x8hDINUn9VnRBLjSKkA3KH+R4y0L4Fnx +Jyh5jSYDy+HEJCGJVYgbX/ONpn8+AV0RRDmJ8bi9cEbtDr6UMFfgSrxZ/26USDD0Qk7MePot1YH6 +XIx9CD5ccLY6wkU4piXcZQDiNiW9mKOdGMaKhIkOZdgbDpEiXJvQ1B7hgj02cZrDMDS3DZE/uRCS +PSMcuQJSF7DpOoZWXsv7Y79Q5kwf3EH3CXma6A0ArhtlzlHi8mQLpPN0ce/zM630mPF7u0v+9w63 +3BacKILAVOf0XH9dj8TrXcfNCBZNpjRnBkAjs1bpLYcF2HnM3sfepgvnJdli3N96bgxc+3gnuKH3 +TpgMmUVciY1KCOpckbRsdKIPDaLgMp5lmCd8wvY4ZiiY+/kFM5hAffHw3GHJb0nD+6Vfp+YLmu/0 +m370UEMIa3FD08Vsb3A0UpzK6niIW8zVgEgrkigvI/MdqXQ9lriav1xj/8ReYdwZNWSpI4LCBubM +myGBpnMbo0w2DmBfP+O5SeWArVN7Of2oIaswDqDjje1+ZVS+v70pHCSx1KI52/jLpiIBl1gWoDOv +ocRaZsvl17lN+e8pvRiwQIaQvI8z1N2AkOM/Wpm8yDCh2ZOvrZ4tZY1KJDLsUvdsgviOEuX5mMdq +Khc02nW4Qmr7VFpsUWfROubT1xQ2xEXmQfWCn20lnHmD3DzPh19Tiz96mB3i2xrg02abpIECNkVl +KrXH6t54BYsvHx0pM7Q6voGund7bKwE4+9ypccMVhdATisjJ+H6lMO+nMkeL8Y7fb+jgU46ieGFH +OeWWBXrSc+t8VjsZh5LJhL2X9LfPmsg0h5mDNaTXR6cGoYkhT6OoMNZN4hhLvzqvZX2d3Q6LwYnO +/Hpe471RVcaw4kCe8TnA0ZB/IxhWE7MCBksQzfW3nsicj0RL/8WQx29n8FEab9PLUrNI2yTmslJu +4BiGkI1/VVV4GAGH5Rmsg+QaODN+k0Pgq9NnGKFbYfOqRELmHZyCafMQKU4rmYsVE/HtTVjs+Cnl +doh+Mmv5KHwgbpBOviLt3jdLVpdZNX2Lpr/Kem0VJBaRLQJbZ3wSO8t6XC87+GQ8gbXs5zoOpzd3 +WPqxsaN49ire+Jo3IY2lc7SQ38jaUMirtAoh2XvYjAsrNqElHxJz8S01FRtwPtV2KCsUDofFCDEE +M/e8R3V0YuUVatGR1Wh3vPH9+/Z431/rE/kzhaEkwzCm+g6TT+fpv8qxreHiA3oNeI1Oejdff2Rg +po/OTk2+qlH3UxSgptEg/Hzj820A0xU/KMvb9JmxIKtH3+XrSHk3tEuv9ldMMQwRXplM9GvRIIKx +snBQozEAeCevj2T4pW1IIb8ABfeoUuUHsl2yfwpHYHYDD0Tj+XJNUbKGPDz5k7ephSCfNvutFf1u +Zu3qwSA9+hbwbc4YuMQfVLAEiktc5BSND1MTyOaEKxGQvqTBwJQbrWmOMi7DpcwDIwJG4kIBRrbb +M11GPDv+2sa3m+TxKHElgLe1/OPjrQmHtottqZYs6J8JaTGRPsHO2RazDdCkgNsv8XcFO1eXcnjL +gXos2FW5P52AHYtDPac2KAI7oWKEgxNtGc1SbGlcdZGD866UPBAltFNWXkr5kg4japA5CBpq5pRf +0jCy8XLUS1Vfj/LVqOuC/VilpcBbpukP0nqv4pAexypgpT2daojHD/l9iITTAtKxjmTW59ZnxhGd +PPJvQIjm0I2CkAXLoVX0eV1JQbvXHKvElmwaO3QM2dW4EV+pt85rPJ4AaqgxZ87nHFfuJOyZYP4u +OUIYrt7zFQM561kDw6UDqE4Nx/09O240fyScja6peC46Lxa3dvJfa4YYIgE8U5iK1NV3+Np3xzJN +y5CLwInol3ZTw6KlMqEaUmcskv5ikKpGuprYcX3xp7UzObFh+38ZCt4ivD18Tq+OlrKmEA65Ps6y +vBb426PZxLRdtIJtSbASFew+dBXl6SiIVXm8utoH1r6Cd2+Pg8KXC9xaJZyArtZvhwu9Ayton4c0 +UVQUk+UgDZX0cmBKNjJj0uBsb9yomlm7cOaS/QQ07P7SWWc8rqFMb3UEsq4xy56ldN7TR6cV4Ba5 +15BSbBAgSYvGHE6kdPMWbXCTYeVcd8MD3JzB4kJY3GPycHgNKkQ5mdyVstbv9HdQ8n0L7JnP5RDP +oACmOb/SVxACxxYAA+5m3UckEzSBsteT0R7cNfa5DBZIAYmVfUTZOj1tfxztOYyvFznDxgvMHKil +Od4Cp3+KZ3KEVWT90BPCHf2efz9yCgsugnXt+Qb2u2kUyFMbia0/v7Gy+M0gNxn9OhxlGzBXEa2u +oYYXGC3rq26Kccjo6DYfEv0+nubmyZhd2YDqE/hjwRhE63qIqsoSvJNI44BCDHczJPu9yIFsnZZc +vDJwhwW4Ru2MYQNR1iEo8vcOldtvtXjObbKMJevcCufDXJb6Ij4sL+Cs7fa06KWrum3LpU3+NOux +b7riXX8ZUlD1ek5aLOaMvNs1sfA9LxNHujB9k4zjeIiEVqla4xNpi7Hwy77IycGAqJQivbSF5dq+ +FeGFA2KWYDAHEzhB0QnRHCwhbNlUhtKkm7R2S5naUWe+ZS89EcPxhtTPvMHCg4HxLkkKW1PS3Yhk +YQl4+2aeqec34o7Yn1UBJ3ctlYoG8X+L1QTdvXk++xJdUHG4XiBUT6uDBlHJsuKf1KLmtZqP4a/a +mmRrUOmaD4ehQyjeeMrOYFlya0fYIKC4WeNPBtfBDU58nrhECpvMvUSoAPIg+dPFhICMV8mJa8cL +GotS5pHPNsm8B5sW7cyOB14Q/kibpNZSRG8WuqRDdFg7S4XKA0D2gxsmBV4hkS94lv1F+VFoAf9i +zRQrPNUft8iWZfeFCTIs35t4lAmtcsExLzjvBHT7j3JOEOKdYEQpUumYwNzL3/2f9VcG0dBP1b7t +E5axPJESHyXbx4k0v7HUa4MsnU18196mtqOMpTJwX39C/n/Sd99c8QRVyofMyp4PUKf2iP+O793D +Ux3QlzNTorbLH6I6MGTb5xyxQrBmz7CaY5b1RcXrdWpAeMn3KJnVZY6NNhFPdIYLOw7Fl9BEhNlD +AmLgwRvTYWLXm716HMdBA4F4k34csGRfPfISDOx1CwokpNwONek3yC2NA5xZUK4D/bA9Ka342DVm +rykYEr+R5JLoWthBSEwRXoWnb1gEuZ6QCqzgJb/ednFY9MqdQJ2eViW/s5c4z3dsophj+35MOpxE +LRgCt6E3bdwNYROA8bGfHD0monYGGDGXVNBG/T/UUdZ4FYpk4K+n2m4CVnU8BNO+5Cutpy8dA+Dt +0L9yOePGzQE9rJJ1I1S67swS8styqf8/08jqBnszkrm3/8UCiggyKIBQrSVGEpLQXdtBgIG568Hg +dkgzHyiCwcdSsgktHrujJJj5YcosO2NR7TnDvkxVvwX+JxZnajAnh3lrzbqiKGBFVUbiUR/VOG7M +ufwgNWKmOgbV0YdwFqJTAfvwncIz8nNBIYoPvdxRrupIB1FA3U6DNQQddR0IRnZRfVpELVc7Nx1D +vuQTDiFzgf9azGQUDJdyCtvJulXTmKR3g63516M9VmckYJJH9HvgZ6hRa6V+KGIQOvK4mat16n5o ++rrwxr1s7h7mmiOAnWW6IhUp0+w2HgW3p4r5JoTFT1//gHu86vjiqXGyurEGB4PkvFbXS98Wwj8b +ikUDF6dhaTFuZVRuXbHq0Znn+vBwWyFQ3g9VkP0sYTn0F8Adij5CwUQaKDOU8q/M9pviCT/i4XZ5 +fYWVMU7X3pjLSpgpwRKTLry0YYgExdTvd+KMUZD+70aPJf/p3nrdH/y4skP2WVTgBOzgxmsJBlL/ +wU1Wicgubs/T2m6ix9blyaed8cvFSNErTVkOkCEZeRbD8HbEw8U1uqWM5RvCA/YBtGyWk9H6KyN/ +hEBgHxptYixmKRa4pFD9RaAkithh6kcaDEYBVoHroh9+LI2tRa2Pn7dN082W/bZmx8Jd7YKOw9w5 +4q6NiLHB/pjyr/2hwyjgJ6CqoDrikdnraaU+EQ0qs2hVrB2jHEYSU8PIf6h7requyeZ4cpKluEac +OyFKfs1vlQg3QbjtwJcM7oXsg4MCczGK1yg0cK6LYbZGdVllIpe+oOaU+hfjHJ3HfJBtjuJjf+rW +y1XhaLVevcU4odmLs9W9Kr07L1gl72CP6yE0N9QoG0bgaY2992YaqD21P5ukB+fNXK/tjYIt3SYF +Y7fnuoZNR4K00UZW+2jiaaXLpIji2WKZWZL/uz2ErJ47PvjMHsDkWd4bnEFWqlyD2SVghiUCm86o +DGtbRY6NFoQWobpAgt60YAmEabOR31/hsVGa6H5W0LGpAkhRVRWEMOY0z2NLzGP37VKtG3HO+Ke7 +UbhBw1bqn/8bAC7PDpHfBlfHBBXiGUA1HH7o87R9ZoPSefs+XsKz/fITtNi4+9g+GlD6nB2QKi/8 +ZOO6r/pLxlf7LJ/zhr0vjEDgD07gF3PCItr73HgzP3jx+rymzlXIWZhWEQMcOHP3Vrlf9HUlg5Sz +CnGkrh0FEqwnlASjvnqcCP1hZYRJ9cEr0qY6rPYkL2Oh/WK1/bJT+v2mIfZ72hzEMOMG6pPmE93F +hy7ydRfMtaPp2dzwEY4UWjUu+OrQCrXG8uRbf9ug1v9nZiN32Dj0Ja4aQVr5PbhQCfhfvPK9Tako +a2fE5X/pqX6IiDKE3HAnTV+psGGog1S80CJch0F5b0mt6/oHbL5UDUMmQ20sOesyr6hJgp4nG0xw +Naq8OIjSXcJQ4ammb/PU9hAj4gW9WBplea60PT1dA+dc1DzIRKDejty9mQCfB6g9hiBydZ1ZJ7fn +MmTsmwwntTZdnIp7vOKCrmmXjfwOW3+fXiiJrOe5UAVLOg1yUGxwns68cgZl4YyiW6fHnWf8aPGl +3CcDBcZpKQy+qlH4HFIGboRrVi9kovDCSzMXboZSOaydTOeVN4sGaknRHDZmGQ9OBPeUwOV6XX3t +rhDGPTuTlfxHAsEiop9Oj258+BrYTjwMz0PADL1MAKBs9+hx2PXBbWfyyxJqFbXPkjqkYhNlwK3s +PYLUj1oCMZFfAiBwGF7wLIGbfGmZLrPmo13nAt1jvt8eKOpbDEAi0kqS5pmO72j1KhtNdwSEcFNt +hW8GJn8xC2lR88yAOlUZkMLiqiKszzC1a6BMXbELXFwQhHRQGLl94Qmnio8/VtnS0nBWfK21krOa +LkvhTHNbQm/DZF/TxgGurqLbxZ98IyR4W+yBxc0gVne6vF/dueJpBTQzMru081KearEnGeynU/wk +JUnSCB+xR5iT7VENdPb2NWLsq8gSMfA7ZA7UK7MXDAAhR0nh1YUgG35SR6zkxbN8CkHigiQ3JtQw +kA2KnB784VBdDKqMTeyP8TT7ge+3e/i2ui0969XtKqT3t41RQKN9Luwux5szSNoBnR50aR45aJN1 +EJdvXBc3NodI5bzwaSHn/cAoJO9C+5SKAahq5ano0SiV7qPoH6bUJohuz6lKPouVVf+Ka8Agx9bf +M9pLLYZ2zrmtXtlcogMQSjS6gSkO5aWWQ8d4pyuCan3+2n/CWuTceFAAkIA8JKKDb3NRG4oXObY9 +iCUHtqMbe5JV1HB8TmpDeo80C0TL0yYxTG5mMXHKkUSDmyGpv0Evercl8yQsOSPo9yqmJLMbRFug +w0TxWA9Rpgs5Zs7tXswlQ2/Q1A28C0KxDDt+pAd/ThAuubRNB8ZpxCw6sAazwBFU38xAhzab9Kfo +A4PzpJniwEb97XJqJX72F26tP7YWpm4dtJrdiLm3IxZlWHZ7LXJBkmn0LC3C/zam/wrBcHn99OxG +XP+LUVzLVfjmJryIIjuZNwjV0nfe4LKjgLV42dPxDlmJNrVh7uCepgYQ2OVmklQm72gj3PrFS6zX +5jS7TcQaiav/hG+UucIbkm9TdWlQScpXxprF5XbJxXrn/Ku+Jh6owY+avS77v7GEeQtnUiUhJYyz +gmMUKLE9f92CEV5mEsVo119UstaJb+kXF/ytHa5Tk+59uJYKzJnRPi+H6zN4n0PtE4erUE7yGKCo +90okNp6pRFD6dpA5pZZfhPTuwZIJQ2cKh1jaIMZV5VGarkkZ3Y38jEOr7p+ACGNA0ALiQYOxchCS +Sy9lKWWciTIUKBVmptNoCE/J3/Pf8KwayxCVHq7SzeEx4XFXL3TvVyuwRaK+oABSUv39a+Y73ZNL +4kmzXnLmEyxCQyowKykXRflf78is5DrI7eP9I8NeYg4S10+sobv187PDxv6eiVc9YkA8VzHubUgM +f0F/zFpxchn3idKDL3B/03FaqlG0edBBQb01fORExt/fsE3VFzBOhPezfpf5Eyz/FiEVM0RjWMhu +k6T9nmSAfZv4iMTfr/B3yHDcgi9odR+gsHuv1E21BLgUhITzMnITdwJKo0s35udYGFaxQGH95dts +beD4qRV+SUABx+NdcWh7qGTPO+nFYagRSyaFmAwQMtDCghMzu+6zZhCpoFx03VgTxGdG6ovjgg6n +7NmatgqJnWNEDBFyJbnrT9ogCexVRJAO+b1Gb7SsxJ8cvzo9om0qd9p5dxxPVOevmuhvZ1NQwtml +SGUNcQitW1LvaM8b4QilP6Wf1nIQ7DFZ2WHR2yItVG+d6CIxVORdBH5JxS2m2XACh8eY2wGfsvZG +sIYjV2mvgD1PJIYV3A6sTg9O4m0q1qv3yOAZVM6aowlgyysBOBt2DraRx1/7Fwwf3OtBhLoCyz0w +LQUhDflZ5/oo43DbFbC4G+bAezztpz0zp5J6ZFcCHW8XFHaSeIAwcQs6LrDGlH3YQsvlfo/kkw10 +cAFJlhfujjVcgIGsudztvGaErX/BXvwfa3WDfIEA9my/udfpkjr05DeRP/3lBNzOMtH5Z0K7KRRg +Ha1jIImXlKm/qtwp3qg+SLPMxDdzqDJrr/fxWcMj3T21UUx+mxYWAOFKTHVC/sZuCxGFTe9yg6PM +DifrY3TdASZghxy6pZEIEL/Aqb39/xKr2LLvOZu0dY+yVWSmEy53NFYISXl7RtXtwOSlEnpM3k6Y +DBgK+/GlJHHTvdODCJVMv/nGjPDxvQoJUa208ozB5STTUmfeErEKDBs+TxRd0bePn2AqDrOI0y1T +OxbnKAKs/v10PUYdBwxaKzORIP6qvfJ8nHfv2wJqNNrxORQ1ODyzZbIKvc7p3rn5UDfbk7Vx9KvK +CNIO96oekGcLtBe5k9auWdmMlwuaqN+NXLam/SMQcBVLA+ahEveklPe3Lv216j7Y69PHM44ORwNv +G0DkuMouMZn1iQzaceMTF6CaxEH3SY3sXN5rMe6PNtgv2wW3aJZRYa+sbUUyAEj7IvjVOsP9muFL +4iiuW53EaRxtc8p/28v6UX4WWtpLgegfP5zxdq6z4gTXAJa6PsX3Z72kI0HMLHtQIfelcP8GkU62 +XF7E4OS0YHr9RWI9+VvCkVtnu1tYveyC/5fsD3BiR7fdOJIRDu0rJJRPUGv1K0jDJT093VI9fAxC +J7LG++ks9cHhtFjweEkkHcdAHXwzRdaHrBqdcrvhHMckynKPzkHXVLTgvT9ecyFLv4zjc82V+b/l +WAbwTGLfswRNka3CfTn9P4Kzzsxwnx7i8VsE8EkjkCMsNLimigm+05CZJOzk1ETbnRNM7eU0PH9p +DSbNysafXtCcsetNo3qPXEqn3WktmiKnVb/ZcEpFKa+2Oxlq8O8Nx/5KFGXYr16uYEV6mRqVG8RR +/KCVGQwEKH1VTFe/yis5zOD1S0ZkrKGLu4+bH+ed1Z9kFvUAEwqgMUIuXkDVaJK8T+g8UGgo2NxO +wbsK6gZoAjV1Vl+VLDsCl3daOVmHhhJRHC5AtcWfDkA1sAj+AdjS7gG5CSvh2XptmEhz6QzOlbPE +khz/sQQrTGsLQvkNNebFU0BSjFuiFWAoSOT1NnzwJczGAcartF4OOACQn+QFRdQkgMarqHNwWf2U +U9oKqbsUo75q1X5r7icA9msyZ3MbMKVACqsQ9rqNcKY/kJNnbXOFJ06gx2HN0hyrE5S4JNBqhRj4 +0VQn5E0NTTxw5Bcrf1n+luWpyL2ghSPvTNzH3AZ/X0fYg1PsvpLuIabeFXJb9U8l5/1mobaYxurx +C4ONxvesyqDlNa6HbH996B4OhGkwfKcv6oZHwzz/klPIzPkLhrYs/eN7jGTJ0CB7QJ3R7JqXyBmz +kSDsS/Gaqc7ByTnvGlNKDvH+2q1Nr/s9ekz/2DyyvnanEZNaQBJ6Z4zBZ0i1TOdbX/ixUKOS2b6I +kbIFnsw0Hi8u4jumtezBan8wohYzApCoqzdrqwvTBS2ssYxTYbpNzJczbVcp1cFLYpmwpMlbTj44 +xvfRmoGeqZwr2DalAwpmTEMR/mRGEanFkjQF5lTjreQN5b4OoTZ6+i0pQIz7KJg9dKV7PVD9FB+0 +PFKBBw2nU+Jm+iq5JkAZUdTJR0Fnc5Hs03GDXPXKz/UM4+IXujQ+7Ykg/UvXPZAdKJT3HDNPhpl8 +UBm4ftNlN/8PKQx5soI+PkqMzbkuCdC23DWurVSABV7joXAldGfwWqrpZVJXAMCU95p7JifaT3AR +1yzr82TlBpXjHISrwwG0XuiWeHXGA1pomVViBYT0HYwXV8c7TMpO+iXQj9N2vZs0Hqamrs5WHtCe +Pv9roao/Q1k9U/qZxnFBr1++RRtRpQh750tQD/kC1WEoB35fQ9DDUeGK6U7/gUu/2IsCGDXDcLH0 +keCGb31C1rL010cHTxng8ND0tLjGCubpW/Htwr4U3yoPj1PjnOjuqU3Uglf4NWZbp+Bhnjo1DPu9 +9Hzyckj0YLyskHqsPnC0aCwMPS1zb1dpXQgldjtR+8qmVp8GSVk/yRjUxCcUsbQIHODRFLcPRQY4 +ysnAx2ik75gJQTgEWF6xhyvVUnkBFY/SvWGUPsIsW9KZ7sqO9ywwbAGA2pOXwP01X6nsUcInprez +7buN4v5Xu9TxtLf01xtj2aieGkyACag7uddToweGSlCNw+/5upXgNJ/mqGP3tXAFUHNv11hWOicX +SgqjTZMMwMaeohssHUQUAHRdWgNU79+djzLVUjUgwWCgFbeReIbyWjWmAPkTnEYMlAfLRdDlebr4 +dsjyAPoW7vELpgcBRpElmL+3fUKWveMlYqm+4/6bH2U7c8rsfva9BHi7DhJdV9Hz47kEBpBForZG ++vwxM9zVGYwaKiOrrky25U+jXtv6wGbbh+NqIyfMoIipIMsh3H2epl9sdgJZcfl/QL75NDtVhl5R +g3ebReQJB/qv+D5bhP0v0dwFWbKBN2ZwBJVCYP/V7PG1HxGXOIoh4r6cAPZJWBb8PtsyGo+WWyFK +3uyscyaElst27Qk6U9xDOH8AfwYp1lYU8sFVJ5DCe++DteKkSi6eC9X9Od+4kKaIM0GYTLvHrNsZ +3uY2XpgenPt+lgoM7lAU49p7vZ4kj/gmmno0OqGuNQSRgVAr2nMWdZcVGF2eDmayJ4NyIIGteBhS +exiw6V1ZeEHAcW/uKo+gV/bjJQjEctIVpEF6rXOAFpKcW9q+twEWdR3m055hXOFj9O5+u0UcjUlk +u5wvNmb35J/xmnW7SK7Mif9RfEMP4cIY/y3tiP3luaGlGPi6KN+3FLkbyveilhCyFbMAqHupYXRT +bZwUwMs72XcpxuhWskKar0nMEuglN8+iA3OcwutAgGgZgpZu7vNm+gJi5DAjmg+16alTljZIQhQo +Fv6uMbGLYPZx5gN69jVyxVGM8SzCvIDJqD20aj3GWvZmNvp+frilMH7+aN6boyTUBPliBdzNN4ca +cN0WDrEHqT1+xYkdC+dxJkuLj14U6xCywNQjXajjUtNmV3z7BfiyW7es/dgY0ndHbJ56ac3jxGny +8OsGKYJKmG9k4zT+lGiyk2ruvFSaWqqOwaOYzYNgZb9OMk26jijqX0rI6p/9u1pU/gaivkgtTPiy ++efIeXTiDYim0ZN5wEyR3yVHmR4Y50ePPx318tUWC1rnKScBv9aXgvyt7k3xEQsOfORRMOi6jNf6 +wEFDTiJxjS+Bljz7Iob6YbBXi/iih2cnl5daFIEygVvuIZ0+fbNkavMrnPL1EL969oJTZXVyR6hO +c6xiiktNpvJhoq1Rtga5bc+QxbQsbCkuoG4uzjy1n+LMgUo7xrKEkv01Nf9l0T3CKJh4PnPPAqhI +bRLSKR0g/gWFNGJAZsGqkRa/kgQxe7GqH0FGwPJM/7Y3GMrkM/SCoG3RCBxm5/qB7CxNfrZFMa27 +1HvFUpuzC2EZkfn8kBAaqNIeD2BkWiwZAV2n1e+g58xvpJaSW0TeXheE9g5BDMJd12kA0mf3VjiC +6/MY7ERLzOAMV/gL3GKHk2bxblkZFxt/4Ip/15x3WLhaQreFwL6dPkL5Ra6lhlJLIvMctPIBe+Fz +1IrdWycX9urJ1S4RqSJy+QttSU79onIXNDA3JyHJoO0b9bnZtvA7ogcUG3mUCy72h759X/+enFua +ZXnoecENVMTxhFulcOUMnWvFPvmFbtI4yLA2jQM1HfWaWWJItOS/7DDbFR8y1jOsS0K+aVHi1ZCb +fo78jAk4u6+sdwvUfFkoev8496IzouPCvjFMuVJilb/FhaLtV9kiyo4+MkbE82thZLcsKPU1NWVm ++4OL2AMMLXs2ZQKMg6VLYjhOKSbqQEVxmpCjEJ64HsH2oxG+QT1i01lDeGdcmRRHs90wUSC2uPZl +vUZk3EL8rlmNm4ouAdvnDwcUHM/o31WuBaUkZ7BZZ1oz+AL3YdHE9ZOzyiMnglxWsNND2P5SfvSq +ioh6AfQC/irQeHMFkFySqY8qSHf/OkdlFntVXR0snz0CmegPfFggl9hSnVSLktOsjTFeml7Srttl +22vANJGSiPGj6le0dyQi6qSxm2HnOd1PQauRVqsJbFzj3vp5nCPbwu4dea65OUl8n1+lWhG+JkT9 +Mkg3Lo2B7GUjI+I4umcrke9rIAR6hD/bh4+0YYzvmBt+5jBAWZVN7yw5RyNG4bnIC5Fr50ql+DPa +gjdXgBnBVzHTdE77pemQK9WDOghKeIrnG5vS90au5zedZD7YLlyw9W+glSnnDd2dtP7+kkGHx5ES +PwRN3NTSfvAalSDcGN0IvAKP2/0ZwU0M0stYBh7I1hk8pvI8PsS4k8V9loHO/j1KLuzpLFTGuLNG +hYetLCcYpYF6x8WfYipwqHvjGjmlEfNW0YM9YM9cX/ce023KRSRGTbO1vSDaA7nSu0J+6wNu7xsS +nqQ6Ada7bkRF7lBn8tPMZmQfnpSLK+5vH2oJWeN5pqT0B7ZTIRiWWxUDLWDlD6AMchNp0oERopfZ +y2N2o1jbICfb/8L9tlCU/CeEI9iLs7HisraJVwGzNvS6LwIY+JFHjZ8MyKaBHWCZg0e7s5bi1zHi +8QwTPHTekBlE6mxKY2fLKMAHQt0uceaR/RTSVZKkDkaA8dwjkPFW6DNl4enOneQFq5cksnpm43gd +X1AlGi5hbNR9xfjr5q6ta9KH6XI+j9rGxapDFNCZGQWPPVWDY5x+01a/yFzTF335UWMCia+l7PHo +lYU8wYMoGcMi5m/w/aZgiHL0SzAGIQFjy8fRWaIvgr0h35O7F0irRm1nhrFEaRO0jnlc1/nBVYWa +pg/ecHNsDTqs1RSk67vrpU2MLa85Q4oclg4uR4ErK0MQBupiTOt8LdyLdPb/i2z1nYmd4v12Qg0u +z1/eblIiUoOySwZQKNS/0fJbim4UuhPp1nLeK+YS60eRLYukbB91MDeCejqLCwwABuDfraNS2rvP +1Xwirf2ZfvPCT4UqwzVFgWkFxP+nlXyIYmZxF4hDFsFaCq8fh3Lm+PIO2N/CTMEhGUbE2byqAe0n +GIaWBPzalA7IQO8KBwO5wXhXKT7IkupYiPQjQJzjvk2iXKOtsaXWJccF+ZQFE2LBr7ez0q7fNREF +d/tHFhiyMC8+WlcyEBhNvhAItq5Ri72lWJznNvK+gc/0/xBsZPdHzLhLgP7VqeH8AgDvJYGNuFw7 +AoRypttmQTAtCkNhl9lkur9qVOT+Gu5EQQLVHjvoG5Q592zpH2Q7UvekGHJh5I/9ENwYaBVYziqw +JSA0nz2iZBRziwDCmGZlYvyXcv4HIvVi6sUqPq8JbegSHIeA9EMn4UOOg/DbuSGB5Rqa8Wm52iot +UGW+J9iDZ5CcNZbcZ971oHF/gxZehIwJomfuYL64dYDs3BRJMbOlXmZQfoay2pW+EKYZ1Tyn/xQF +BV1Mik6T+elgBoYUVN0ljDuL98OfqENlMqiujUcPVRaQRFwgVO7FgegxFqHhldcAz67KuXeyr7dG +qXizdhDSHEFDQQnDukKmDgmDvF0gY630UJ47tMcDifSci3vruNbAaZi9fxaYV9ia1WnsSDze3eYz +wFC60OTVHt/MlXjQwpCJ5wvF7H+HUNxvhYP5iOlbCMKI59qJfW04tpkk94Wv0RmO28Ln+G4Jiwq7 +ZNKhC3kfH6iZKpechNLYvVyy7he3bFLpUEpCmRxgTg/uuxtr4FpAHp2nD91bMdiyGHoPBM4572nu +FaWJYhu7rmtbEdV/9xG+61va1fA3Pm233uS7+h3CRqbfo2Q/AapNtWxbkaIt53Dldxrkz930U6k/ +flxO4xQgqWRgS91aKJmbcx7ee+ZJ2OT+W4moE3N2DbzU++U9lgpbPAztTQA0uQwBXlgh8+e5Miwp +ZbRoTtcojkBZj37vHUFbo1rVMM9omvLw/blMZ4sz70EWyzVi2TCyZo5amz+JQp8CnHS6awwsNH0n +V2aWSGFA5ikAorlXCvYdgvir9LmYKtKMRnIIXs8boIR/hqwRpmHYdkxdCwuq8e3jiI1OG2JNdrqO +FGLBzk17P9r2828q89Q45NnnoYu7esJlwtbt9UfAbsiYTQodSEea7eAPHGbK6iuFHvgb8aDczOW7 +HJopQd01bJhRwu6Uznrp210XqyWmuRIcGLXzMYPovLYEjSJj2yLbYnKeFEUNZGqjsWcmbgl/opx2 +1UPDxeo53yuP8RLIv6HaNa5jr5/acIsW6/kPcpYdHNso8e+Bi7vX9R6wV3GSu9cn6k9EgCbsHGZU +TIcu7xgu92yO9UBvvVWcVzolfLok3mEtxmivA3mAVSEYnm5MEcPhdFuVT6r3bxqmVbPDPvCAOw0K +VZhensrFXS87/k7m4N7PfdXpcBcLDZ6FfHt7q8FSZriMbOkyqvI2ebXIekVmKFfPGz8fowwm2T38 +jP52xzxuZkBH7PwZERg6VylGWb3zCUdGJzOjGZ8LAaYyw6qED/73HE+Km7QBvx2ijs7thv6KDhKu +s+qnpAF2s44GBk0BmHyBV77Qpm4OVkI8KKL17IXLMYYD98Gb9s7C92YfCH6/76tOPMITdetFV2F+ +973gFLpujllAD+a6Y9qBQNMjcJswJr212OHmsFph0+k8nUcmn5G0qJwMTLTySRjQxGPgdmDtdfpI +Hu1h+IeIWTCHgdWK5EeaOaj5KmOrlVGNYoiggQZmgO5HsArOOkQDxCc5tVY3qXXV6iVejtjVF1H6 +USfWbVU0su42BwdQK2OyCyw2U4rDGCN9RxpwD8hnhUHiSrirXMyVV1+jgfjcJeqq2qpm3+J9zWP1 +g0u9t7Itixj4QgHd2nv4gz0HuZxiahN8M/ygJQHCOLDjD82FG0TFmdhQx3ywdfIn2a2zW1BW1ybR +nn4iOQt4o1/bRZDLYSaThUygOcAJcnRtH83u9Qf7YOfKeeCF2U17uDmtlJ4A5BmNT0yD3/iM1ePa +aOVyf4RG0paDvu/8lG5KuAPd4ppecZHiCWcwoTA5GYD8j6SRmpm1MEyCzPO6iEv+y60/lj5Bje2F +l/SRuGCosc5DOd+X9qx+0jm529kWqKIkvyq5gOvWO6BhdgfbRgCCZEVT4RDF23yc4wZ5wiK7Pcbi +Y/GZYfkU/eNEl71Higo8lM+FsPU/k8hSfUBKO85KMpl8y/yKAIQhPBkCwhO9KHjiy5XrwhEyHCOY +bva/8yuC6oehLmL+jBnC4exwAkbnwjWTYCLUWZljA+lKMwCSLUD6ZV5iwMuBSoOUNAEU4TeLZU3G +vKh5KEOLfuuN4YsG0RhbGbLi/jv0rQ5ouKBIenkQmYUrZy4Fx678BGKR9QVeEn1vr98JCpz9pUIN +bCYWdgqdDYo7uWB5ddMxeMh8ebocAYffQ2pSpoLjZM+6/cnjhaMVfCq4yghA3Qe8OFcvVbCW2OoL +ToXjRUWaX1zf7PwIG2kgNRMSShvK87hCeK0Qnv8X0ZXFCRiv/24e9ozvSErdEopi/7SjhmMis4pu +zEz8SD2AkhO9/yArcdBQ4nS0JXqo8quDGbAqsgvpD/G2K9f0IYDBalRgYytMtfNj4RAMFri0hFQV +/mkJ/vZUNT61ksSss7VdEKWa5uEF6GE0KGtlQd9Jwhorlob2S71ATdewKzO6Tx6EGm3Qku4OENCn +a/YOv/+lKR4mmegzcDswQJy7bHe2qYK43DG8AL7j7LWprRbpkzAN2ba/aMlvs/ll/AuoyU3Lf3W7 +RHnPe7Vm05rVrBprBYVK90oRIIPrCVmVllrUOoP/JSaqd+0fU7IvuZ9ikGnYYLGK9dOcstMxR0TV +zmMkxhq1Ge34Q1ggZXcaMQVz4oOmTRiwUOnyFN8Km2xRGZXUqc8z/COZ7mvxAe//SAlJUkpFvKMh +wMfJkwLQ/7jS0/9iACl9LsreC7sBuqnpjaYX6OhXhYMELAtS7oEYZ50WCTBXqOJMqEX0wlTnCj9R +cxOi/lvvQBxtxp+iqETHZZ1Zf05dyhTrcQpNhbSogDFBjkI0M2p/CcsQFcMjKh9IJGv6rFPFSjiO +05k5RLMJpTeNSG6Sym7Kf3Y5vWib4/Kr6uqfnptlRsOnoRFaAOZSxjKwMVRGHpHWt3Z9HVdA0rwa +/vGIFVq39gZ1vEDonmPnfrUcxqiUJbHog+rmdLCCqoZxJu5IGlDHm/7z0uZMc1BAt0NzZfNQ8NyM +bpWcW3vd4gPEun46tgYF9TdNOAeZDBENBRVfvg8/GpFUmmwcGYM1qoZMg3eXqRS6fwNJR24L/AGg +s+/HbcgvdScqUekOLl4YvQ8xW28qNcpksg3OujnfyF4S1HTphK6U1y8gyiDY2G7U51Pux8gvWynf +6X/dfvOWemZCFsKo6TJ9bf7uhLsvX9SPqLkDWRjchhMhBDsDj4uSorYmGNYPL1Y91AF1ZoBudqzA +HJQOcF3VqOlwFhYCK8ed5wk3T6hlkT+dm1ZWrLISfYy2xeBxjRmDkTKn3OTU+qpZBXPeNJAGZnZN +UrK9yayKoUqccmBQ2XhBd8LYINE1rkWlzOKv18sqjhN6LE//KB27hzjCc/3UlFCIdqlwYiBFIX7p +/sGaotrr2t+J4kSf8BjapqJeIkshODHyNsklp+Ktrg6HHns9R8juICZCIU2N1iQfsKwsO+fq8o/1 +7xzstiDk6C23wB9Aib4CoKlSN7Jw3XZasR0uUYrzeWPS5ZQD0rTby2OTGqIy6mfZfKN9K22vF5Qw +iiO4RiAT6/aUw1rmGcL+fHlsubBJMESk85Au99oL+7VV569V72Cl+9xFUqPWhOAJyg+NHgtJVwRX +7oMjytFltu+lazmUk7NzfKc1xXQCUy39VGSllE6BxcfBxb7+YoE+Ku+ahNi3umm3TU6htpTsUi0o +rkxTX/xxnCkbKKQLhYTYXElO5UMxdhamWVHfrhCtubs4UoIn+yoHE9+0bmUlf0AAE8LunKsjRQ+Q +7YahitZzpk6RJCyman0rm/ZHzqoBbbGQjWZtSTnfhtLaiyH3srFaPdvi19hX7yl21OB7spWkW6+z +Cmda/6BWp8/sXBeoFdHyYVueOKmyU4TVb4vNAqNmENZQvOjR/WCdcKYX0N6T2tmVW83ejpjGOohT +RmUTQAcI1vmt0jvXFKYoWLtox4xFkZ7Bt6idYbok1eAnHu8PP9L+3uCQRftC7nl40VubXM1Tq9pI +wbPehs7Ur4skFRtkuvCha+bqKRn0ARTIc9w+03JObeoai0tGLopjQ/vSr9GYQzB1IIc0HRInrZ/3 +2ccGzAoJBYuaKZk9M0e4fP4qDNtl8Pss7WGpoz85mDwsWWT0db8IK8pB+zyiAC/kXqqjc5yBAQr1 +hO3Vjce4zC6U60mb5Gh2sl1KqI6fGsfj5PkNMbqn+ZHydzK9afoaZjaSzozhccZS/X8kWkEg19ck +txlJb505vy1QQYyXzLg9jgKFAfykEuuq4AT6urAyozCaoCVMlCodWCmkJ3NLzgaz6KNOmER5e8OT +vU4CmFfD6ucExx7d38EKm1fiS4+s343rmu+4J5vh6cAZYfJbtjrnd44Dt3dgCw3K/Hmr8arx+5CR +6W+++qbxWY+GxOWTvFMjxtSrybE643XzzeYtpK3HlWtiwFaHM9pSYCilXpqT/c2LRCVqiAhZt8iy +cNa2YyXg3V1/eXMlVbg8mQDkCeBcZEUDw7M8PhXiWJ2xuDLAV9fcOKtkg7Z6AJ7yN5sup8yWnM3T +mL+1eHjbpKCHFx9Aa0juZa8kYimu9k5BlSyuGptMPMVyZ9LiqJoBwA/wPwpPsYZd3C+iV5EynnIS +Y2UfWMGnbnzI5odnTROt+fkcjGQCM79g2b+KD2dKH8ML/FBO/tfzdEWZzFVtKQAktBOX3xYoSgcs +rGuzVuPtyIT0rOlTNfJopjSaa4n7uLDIhOHgUqGF+QnvTPUjmbc8Mg41HGYNlwY+CpkkR1Sbmogd +bg9ufB+GQAfiZ1iUMty/Mo4KBRRdkIjX9EDXdqA5vYm9ABkK+/tHloojBwuJs10VbsEQItUv4yv5 +gQhZN7zTEJc6O6CVff6MZpRdchttQRyKNhp2nEqCA6h+ofj+B6WNz4JjeSRmL1jrcfm/ns03H+wL +q/H4h4VJAH1UeHAtUZpLjCw645QaH+OtqGy/jFBRyA2iegqhNWxpz7XpQUyGj9bBS/2tA1WLEoNe +5wDhXCcEo+hvZQjiJk6YCHVYvLJmZ5nKI5GQpQP2JZrmSCOWHHX1S6/2GUZaajSPRUhDvWsX8WSl +tyjM552t1Z6EhmPj3sDW6qqdLeQwpAr2DqWXC6IOA12o7HJcdkgA3BYcoQ9U6H2nHf1SKxcQztSZ +DKGAdU5FzCck032xHdASDtKb3tm2Vtuo2ijvby58wDVNW5y63hCkHcZ3ITmLSLKxARrU3RKZNNxR +MXDJxD3fCgQ99p6je3/8eH69VKTw7VYQPj2DAESL+JF93TMs1xk9PXwklzPcCeBXwUkzn8ESurgf +hMZ3GbVn4o1B9kzZ+qQuowE/TP9FKwsqHPfldlBAuc2FYuHQ6HX+6l1jlhkfOW0i83YiOfIE42L+ +w8RNEZtHEXpzQk/nb1Rm4noBvBeslFR0Cr+6pceU96BZJVmR4kleP6On1Zgt3VWScd2ycyGr+5Of +mSp5IDm5u1HqQUs9oQXH65vURIcGyW2UZm9tEG0BAiBQ8CYgS3tZNh5eWoblnhRglM3umU/51XHe +u170pL68xoqdQ4Y538twCYPdvalGQ0PhACyjVb/eQobVEzGPP0GgqrDZ4Deg7HXfg/U5djUVjQpG +klAe6Yi1WzfkY24XGhB+gdrdDknTRIRdhMbh2cT7hkIIiyIWuFk0lHS1cddB7MYm52ia7k7Aa/yG +dS+qFuBUSIj/aHjaXTbGefPgoEW53EwXtRWIgKvHK6cqqn7P/dBYkEcETnfkKTeD6Thi5f/JiF1r +xmSn58rav70Psbx02xoo7PdACpC/4VKTmnZAFI7veSf55EJghmA2cQh4HlvUCoqdRA4ERZBtUY22 +lKmiBYofHNBEgAIlVEuWhyDJCexQzdpAkrF6V8iLAd74IngpsqvqVSapvGsOSDrT9cr0Y6fVuL9h +HWuBSlb+FwqWm40nY7IVNn23FrebFlv8F60SlijAyKdxu8G6qhedWtNMNW3P89HWYSV2gbOjsf3B +d3RzmmizYZY2DMsaHMafXqIKTDnMtC8PzRtNpUl2cmuqcJpAwm5wZIOu3kHHSCqm3Iee1ha3HMXT +BJMlHA3Jz5GSmxqcrVJWYBLcJC5JDl7feELe11cGmmD3CBn/YSCOqKR1XixKqq+kb7F4QcxaIaVM +v4ZSP+6uR5h2/Be17Ja366wymPXAbKXCnlC6IXojwf3EnlsSMNT2IpnFq1/LOIAkxAkV9tuWjN5d +KAEND2AskSwVvQswbnTIzF2M/i01TZicY4C7kfjthKW5EmaXKPf0Rb2rLFNAqoYe/EK9cqbwS7t6 +uo7Gg8mtrlxWFbUrpxsoGRY4hj40ZNTomAmt+kXznSbxe2ccO2+SHNhIXDSTH+gRY68SZmyxA2Ph +1H1Un+wWF1UE/QqQoOtvehkXiyACPCUdMWtBnmHjXJikpzegB7eJwn2/nK1cL/57cukLaVyfP7gs +bo1h6G6USaoycwNHWQNYOUocVGhRsWi2Ok+EV2yOGu0a4ocNOk089Lp4Q5RZUEZ0dXekMsgNvf7k +Ne3Ed90zD+VnxMC0cB8T1UV/xyC5NPwj+Zf9sqmayGhwu6H/hK/LJb1nkkqOK/MnvvuhJnByhrqH +1eG2dpEIOAd+jQ6DnU43RS4fct1tTNTLHIMuUTPbImDMidtihqHe91T/JEX3AH75WENeltSxiNB/ +23uKyqPHY761jNvxHYrZ3ysJkOi2zLaqfhpcyP2dhlhs8SdXv5CmnLXJmligGeLKRsw2QvPQL+z9 +zokYN1Mg40VVmwjDQ61mK/oEy1xqjvLMdTlH4AKfas8KuavJb5qHBTQd3Lyc5AVXLNGdwp5my33r +ClfFOnB2BQd2JliOX3oN03Ah1XIXPwqPAoVMdd9t08dMmt9THIvih/MDskcIMyHIGEwF71MLfl8y +Lqxh+rJANn8wioFkiwRsQQ+Ry7r96IQ8uAtbyjS3SbTR3ZXkp3qOp0c316GRqL7JCg/Okd47qlh0 +V46sU2wXoE3sEm144a9i2GL8xhNksSgzQo7hG2XpXZw6L8fmMWgs6PVqRR9kT0fGhskFBTPfVAQW +vGaw5YD2WZcBXFeiylykKG2K0vmZXACdimR1t+q0TwkOyjrms5sYZvaItK1JWOz+lZ6mmeovIKCu +TANBgnNNw5U3RpicQ6IZXqXqIG5MmG9KC/A/fojufYzEIay9P98M99m9SvI2TGhV/wHfjoiEstl5 +6LAd7EJSVslewYRJhBoDzx3J+f2DHAd0XzGhODAT1dc9tEdTVx4rwRXos1T0qsQhgsRrruh3b29E +7at3tFw0sbeIqykuRQavgncH7aGMkNtk5ruy6ax/fDfDnK46YRG1Ldr/cexI97BnOWZBkjjqvi/p +asHjf7BLA/jRB7am0fMGXLKaFmRnCXBztyns6tMpZMUj+ygGWl0sxmUXkQ5Jt8gTvtgCKa9DqS/0 +wyYFI1oa9iH6I3BkNLsxuxVW1HnmsX01kmLH1ByOawrlAL4tt7CR17/OuNQdNNRr0vpGODgrDpyT +ycl1x/rxwjZjBcpVKeWhdUyQHyUPMFuPt53i2dWEbQmEfoXMrQKPSvft+l6fO95kTne94xZI3bWP ++jq9dbZAY5Dl3IxyJWFuqsIUKnvMI/TvK9k82G7xDnCF5Z5ynFtX9gE3h+33+FAhlNb4oOxte7jF +bkKKWPZuvtCwHx8QnKuRfjSW1DwK6zrd0bJe/xlHl02LNnZuEeKEuVsc434nZFNiQu9ebr1VJZCs +uxfoYcO2vSLHCtSxCMF6k0UbV0pvmsrEXwdKTBoGbU36ObCkLzJuUChfWm9E7fVwbRMx7kJVmPGI +L7EVv3Apw/7D3wSi+FEM1rafKNbuY5H8zLTMau5LFBXUoMhWrxNYl/kc6s9CvyA0QAtW3H0acqAC +daVDn4p/9cTjmKAcv7LYxYtMqVgpCvSsjzuEIE/BKGtFcxIaNhjjH7WlOslkJxKKUofjGe3BCL1+ +yj0222zin8apzrnBqCyznT19wVWAmSRWbzGg3PEVnHEG41srCa9bG15sNqFkRMsfWsa0qQNREeRs +IDXp75xQjPyLOtj1frz557n/7zKZU+hNsogS5QXn+u770bBrGBPfp5xM0u8FNllg2iBDuFKIVdms +ekfSuVu50+YTUyb1spF2c7Tw8bKkDjhtiMOt3zOlAxxmGYsoEXyNaYbNny7TbT/fWJh6n8RxFYFa +KtKvdliU4lX9q9eFRqmlbf2myVvg2ESqR7NuP9OR+/J4LcbnI+Pj4xmDa68g1M5/GRRJTuhZZuq2 +SfRo2zK4pqA9HemWh8eKMbjsVtthZYGVj/tzAXoMP19n1v4mwixP4R73N/UnnqQc068gTy4jIN0Q +Sgz861Lq6nrMZf1kcvnMchCdE5/4yCNzc8PD5UiBCS4SiO9n5Km5IPHsxU1iWYEwTI52ujH1RvKu +C1vwLV/ONV2K/GodvEoCxvIn0mF1gVD8VXSHasNCzvri/e6tocdZNZctMG5TyPm5Qcld0NNX7DuQ +ClLCb6nHNNDC5eC/JGbM/UehlrU9OlSKsDkEjZ5jw3QwbOPgfGCB6Y2nMZ5BDo3B2zwLebzeladR +SegKenTVeCydS9cnEpfIhe0B+wBiwW3OsckjvlEOGvzvo5Ex97St8lxebYoRYb4hHK4br2AWlFN2 +JZFwsD1H0w/PhG3IYHAxJkfVcDWP0Q8vWas0oOVrwnXkUHX07SJVkItUQm8GjXrNOmcUYUc+5TKe +pIlbUx30dHAsP9TiK0KyB2Yw04pB1zbrsWze782KScnRShehmAUJoK1U8NuFGwm9Um0ph/pHVZM0 +bCwPMJZ8yILxbq+XqRgtk5JhecdfydREiC4wLjge025cf9FBZPyf8+6ng7GZYWdqAu4ZLLQvZfEl +u0x6GTyPWkZ9xXy3bg9KzRLykQ/j9ham4yZ2HnQ4/bw5lBx4IiAVLXGP7a+ukNjlSlUJ+ULw5Opn +4m/7kiFwmN2ZQZzIp3Wvy04MEKQfsxQqbJLHLyrP070o9xEoxCEUJFjoitWwVyesLnt6+t4JDXzI +cCbQqwVWF0BKNb5aTchjwqnHciUl9nmutFMsE/nU9b703dr7WEH910qVO6XulbEaJS/voY6taKQK +WbnIhW+HIud0W8BMLsWbt+JuF4PIQPoS9b7hrM/NtA4USwZi5UMl60//K18dD/e7/QnK18A+GYNg +W0ZRFVV9i5Igs+ZlyMom5ayOIRvNDn00lGzlGaC2o3laRiszK7SeVhupHeeAN5YSzhGJurEJXTVE +0IBx6gJ13k0rIEcdnahap/KxnhYof+Nh1tIlJmojl11hdcuZtR6sVrM7MBN2uWNe9mM2E8rH3B9h +TYcJ1XUyQPSo4AfnFlYfxTFOFd6n2u7ETVbbCKGUKys9TkTVM7Eted3nFOjUaTC3tNLn19ah/4Lc +vo9IxJimBd+zPWDncM5Bc6r7kk0EmqtmrTN3zDjTxrNTBsjGG7YvwZo6pE2gvSya01UKSBB9wDxP +esn7PPAUSn4gGci7amXuhkugJ74Bbvvwet3y97GPxeMlUC9dR6Ohf2EN15HMqyW9yw1c5NUnZ5b7 +0VSPmqL+zfbjGPHtUBYHbzq9iSrmavKU6B7hfrCVxyGvj/Lkio9K+zp9qXoV0K3aqNYEoJV1Wx6+ +iCyGpDYb3EbVQ/MbE9JWLxzPQvRakPsWD2M08UHrsZt61zwxlqvPMjsY5k8p/Ue01fsir2LJjJQa +OzVolQhgCaIqFgx0lJBOGHsyKkdC6YAkt3U0nBbEdG8DJSiOogxf8VoXLqTm1Ex/gFaIkV/KnKnq +rk/HottFu1V23Orl0o5MYD2amJ3X+mC0auXwM1pXoUI+ViYQ2ATMh0Ci+fhtcBditIdT1TFRYfDF +uv8WtzEINGtwBoWx6UQsUseQmmg86SrDKoqal0CxJ7OND6g7nfRpML275m45nYEu4/mf0kGFTIrb +SZrenHQzWaZpmacYOeqndI5IJzH9BtyhBfHit66OFBhhkxHtduxzc1orV6ZatxllXdTeaA13THpu +sP4jriHrz2Jkt+m1UpAYqPBFTouXVIc+sTZHQHXdRQbgwRIVcNEstJqe89GZKpRb0w/Qw8HnHldH +zWxTTduo/TGWUidAZ1Q9Z0YxVsrS/llhKGHKonyUa323g6qdsZofNa5u8lSsMeiwgQzMY8tvNfGL +CLZk3hVhu6uxO68x1Y3T+6tgQHlyQwL/B2nK08EaN1LVP29dvTnhYFGa9p4YLyhai+jm9TWrCpgP +yiEgU5M0Y80+MmMcrahFJ+Nq57swnbBzpvz66FJcWvrsMlEewWPx4hC6e6tFXbAPD42ruCUR+qRm +7w+WVe6iE11nqHL2CEeNsAskfKkP8h0aD5yKcw158peUhyspxkf35s8mA+84JBlAB7tCX9lPNJZL +4z7MfF0SDSqX/BruESpCbkKdJk0fZ6TKG74ZxBgiEQ42jkNCennjOF7XxpMa/4MWoKvgptdh9r0q +5inaXyiClr22pI9cEPRYjOT4lHnyMEcckoYeNRwVgt2Ae0vTMJ15wdAfkjjgRlRYCnhxS1f/YNcD +kFINbtvq4uOzavFRrC7mtyPwaMlDqTjU9kD+9DpuQIe4fvMdRYJrSWbBEueLYwU7iCQSl4hTQAjT +gxbWy+Sm3IuL0UU7TK/A0bfnrptdfICXBkH10zeuDf+r2l7ZFPFHv727q59YtYst4Q91brkNKnLX +4d8LwPwHY3jQgOCajXnoULeCZFQU8A6mCPNVfLIiQWWiCcQXYWtFQZcCzc+tHIfFl/4RsndvAkWL +Jlue9NOdte9iLiKvGh2mejSIxTK8krfAQ4jew9miQH5l4o9LMhSVNpg4fYfHb2+WwgOsRDvtZZzT +5hW30CmywxdrenQ80VR+VnhV2Yck3+WujQBmYwIsJHKZ9JEo3fuNMxLDMpwanx92LDSkJXO8SVWr +uviw+3M8NiNFQ54CxitmG9Y06j2dFgVkLwLaEynfpjISYKjhsJQJiXTVHlurnJpqxbBeSKQNmp4S +RBHEiOClf8RTB4kSKxQOCagGDvyP2q+/lcnteKeNf8sWRVV3Wpu7Dfj9rlFkuXov246Iod7Wj0Nj +Zo1x4eyFEu6jg1YGUff0zzg2GXirKuuRb65FrdbsRVNpBB2+oH/J8ZsqkLGWALr96Prct3J8z/tz +5qJqALkqkkP4/j5Fks06mKcmYocK65JsnXWiV4rYlRQ1wI1Cll1WHh3cEWnnlm+w/ITw9MZeCEa8 +Ryp5iBuAmhn07bc+UxSlyd0PTPz5o/fk9I32AdPkpa2MBslBFmqWncSsx/LEE2esaBw+3dc0cL9h +EX07ke6MOZws2D9sp+WwYN3BcMdNG2ZzQMI3ZUPVsmqJAQhfvFHxVCzFhO0FsqPyfoKoXeOBzsYx +Va2M0O6rfM8u+g9ntmCUma455ddMcpzTxaDpwLOE9J17wD9akKaWB6p4A5Ixbb9oRLPr0j1W1Ywz +kYp9ymwStwaBLpkXSlhv38Noe0zoueDudl2uU4Sx/2QIt3t/oneuijw5PTqTm8OyuuYUAs21q+nQ +SfVyG1WEz8QjvkalVRrQwRi437jWexMKuKilMhwFUP1gMA90cyo08Jw9mzjHkPDUYctHYzVwuFCA +UB6npuAUn74+Hd2M9fdLtYrr7m3PRybUiaQqQlVgpRanWME022J53hgbGyO3zEVSmS0bmeHinUl3 +F9Gt9zcvr8dz5nd4IN8XVkLXkGMJJIbIG4cyl0pfx0jGGWkOT6Wz3xICkp0p0iCDy6VM64BTW7iZ ++31YdI5QyMBu46E1BH6PaNi6xs+23dCzP3h4QQWIbMK7+Gkhbq7u90r3hizWmZ1rg5TFcBha+Bfe +hNaMNCtmg8QWVksDOqNGpSYOakMIaM9etS95sNSPXnDpTRYy+2F8kidoJ44OFsEUu7fE+bOQpvxb +5NfAV8XYC2bCdCZ+TVN6hIcfBOPLNQn0Ai4GbxoCKkYyjsQeHsu3SnmAwgYzUPrM9o59GYmkgbBl +TslM78rOGdUcZsgvMtTk7E7Y6ILmeUhNqJgIubs+134tqkWAHrnGWitUanFXcU5NnBxZ+bG3O1Y7 +OBixwhu5sDy5hVaN9vaoI5C1X02IoPeZ+cd+3xezW9SsZEYKTPpWunqkAe4eREpSrik99xU28unw +3Zd/PLvTxFhm6b5o2nU0Q8mXK6yBK75hUvvqrd6nAbIDgLaX/1KUUTkWwzOM9XsoZpf4WbkTB1c9 +Kyq/ht2HxXrjFWIRUh0IGaeFQn7UJ15eo9nguypQqJLoIGKRxli6zEESFRRUIOWV1A5TDjWthgF1 +tMXW8BKe9w11P8eP1MKS84SMiaLARu1foxV+PjlQHkMCZN4SoO66q4c2TiS8sZVmKr+Ewz48FkNr +EURs0Psl+dcrX5pxzGT/wxmI59sSNMr3nQ1tiuI5ftm5teOrXMHPApMYaLDq+z3iSdJaQJsItQ3Q +AFz6IZKAzX4Ox09+7lN+xaviHI83E8dYycHJgS4vmFcSOYyyoXoJCanX+j8HGT9a5cpZ8+cocx3w +H979UOaRbMNFboN/f06hWIZq5Ph7Lv2eZFqKNDiY/JP97b13HyG1OjUGqoUqua4FwDY41ppDKm0N +Jv3yzkZkDP5bB7YBQVCQIAQs8eiy7WukKRRyc61mgySxZak+G8w/YiK8eu9AskQLj7cgaybm+j2x +U6yl682Dc48tILg8tPeo1GEbExtnCpP3kMCM0A5jQvKRGF4cOzDHAUhZcfSngN5KNYv+1VosaIQt +Rl2PCYnwWOi7gpRS5tI79a3Xxbb4K+ru4qP1yJXKt2lx+PoKteHMciu8uNuWbS3KxJ2y5J5/Jk2r +CAsO8T0hO2yKephqT3rZkwwAx6GlZzhF5THBJF681s/TonkIMxXj9yO4LjVxvQdHII6RIqx5b1mr +SFff5ZIuOUkBXaUSxkRoHesWmBKHYJfG7eQGO6fohSB+65HGzCcT7KtIaJkFJrEOJyGG5S7D3A3t +oddxEfpX1kEP0qiSZQFBtOXjA34+xPXiwNAGDn9uCMbHxJ+3teNjc+TE5XhsP3gOKD1XjTseD1u3 +ZCK4VsuRwUeNn60Kq7nh+om6Z1iww17vqzgIEPZ3d/H1b7VURD8thT2fupMOCTT8SfgMfZd2f6I/ +hjFOfTcVF7qLn/lr1wLk2HMb5CAym3dO0RY4lZ6MyJiVDfHpEH7KtBh+ulsfW7wzyk4GlHXwDRy+ +5mc+/ITL5fc28IMTZGfS8+a1yKby/xVjcrQrWoCiuBJmZm84/BWJXY8dZsj7JAZLXKl0nUzHFkTZ +IYGTiqBzxJxlNgBev6TNkPsYvFfFJD3+nKHxIUv1zRUMeEl9sG9LbyHhsCU8XwXwnFvQHcLh9Q59 +fviM7QU8SDoDRtwp3Ngy3dMQgQv+BVOsj2OEgnYSKaiLj6VcumW24G03q4plhDnap5OeBNEcQzvV +oeuU4h4QT++Zo1DFZFDS6MU2FoKE68flehTZjGdscei9HSknHosXEYgtazzE0i/I9OqELTsK6fNP +OhzjIRESZsAq57tq4cLHvplATpUFUJVaaNIiBp419ZWlxQa0TNnNrUBZtXULWxQkM0Qs+R1Z8lR8 +4N6vXNV0mUFfUy9nWHbwZnxjBYPUioCwKVR0hqSe7JC2j85AzJzQcgX5FJ+9C1IJYMrW1GioaOWQ +pKyAL5+/2g9IzSj/H/pnWWhrUUsYM29uvDRsfGdegJncGHa7wU6EILAyN+2YeHx7LFjVbZvBo1WX +efc+ReL83BWXftTeK8o/wlui05o7UAmKVd/YnL1ysIrYVmqi1kCH+WT0J0cJu15Jnd6957eysuFK +vwwmzq9SyuK+9YeNisDoaqlm7ZOL//Iy7YfG8MHdfIjzgbTNh8RSPRGzBcekDXyvN9NJm89kvExO +CMramAMOlflDBwIwO2SmxTU1MTJhtIZ4g3tHuSLkZ3Y219/g3NfKBz2lKNmlty7J/AnQ0cpvjnFy +grifcMWuNqHXGZGl/Cv0yQvv29xkl1I+J8A/tRqNSCoJzViRK+lFW0w42wiAOTXxcn4L0Q8eBKzd +z72P2j9Y7+z8ysK88jcmkOvS9t8EK6/oUTj88n1Eu8rt1NLe8pR0aKTujQR8hJ5WC7HUstxIbYy5 +5kCEQOtwsl5tz9xJNV7OFA6QMqytEA+IH8aFE8PPv16Q+3DZpAeBgqEaEPE93Vna6Qgcuka8nzwp +ZOs5BGw+Pzm+KnsMQuTAVqBtHTayxQ62x0tcPApdSHAGMOyBeXANjZsooh5025EnlQtweUxoXStt +h7ETvBJOG0DYEtxi0Z/txhFU7T0AUqDvs1/qSDbxW8kW8rXwvwu9HGgleNHvmliB6ET3T874LRNK +2fDotWg2S6yv829n6O5fHDj2UZDpSbfY+wyvyFM+37+U83+Ve02AOqoTULt5fgH5TmOAPx3Dicay +FRQC65jgRHuGAXj1GqmdD2OmuDGJdsU1RwRopgIonO0d+b+JnfIz15CYmyv9/zUzgZNVFExZmv0P +MmrSUlLTQAhrgpBZ88VfJMMBYsJ4nVdj/5xILwF3gwoLB9QcMB56qXd4lnv2wcVNx0dACe4i0vQJ +6ulmlLO0Y4ay8uxTv8LZkz6fSXAoYWOid4FslDacnN+28TfI4RCzAn99X+j3VF1h4wIlVmxSCMe5 +xpit7IXllqeIQD9wmKmdbOTkref/RJrcfOGWB3zU7IEfOinuepJumGsSBGMfkeJpx9uJ9wTDam5d +J+G1+jlYUnA9fMnJiBvJvI4zckO39Ww+H5bd4tByXjgfg+dnTaiuhgpNZ7vxkbEZ3eWj1bbaCOM1 +cJa3VU1+sBno+DSwTM/L38oc6kXPx0b1UABQQBC6HaV3mrLSaK9OjQVeQNWmd3fEnAHjXDIV8Csf +Bg2oKRZTvzTXt6CzTDqSP/hTUW2dw8IC10y6QWMZdDi/URJACfRv//pGQZxJmV/Hjmcr4WYoOr/q +F7MHUNJEWz/PX5ByEN6qmVVvNbwtpRp/67d3VvDu0wH2VUr8eNZSnSCcKjrG6+o98JWl7x+R9jd2 +UIM+s7CT/sf27iZA36tT/kcy2hU58ZU9J4XHUlon9ydslMKkQSRDGE9EywP372nLZ+Yj7sREfNbV +duOzeZ8zcF/N816h4po4FdLb6RLUcXmE+uyBx/5y4XQLWjq5isZTBRIfQnoQSljlmA5PC1guN/oB ++iMGtHpmMoYNodDZWPN7yAqo3Kp8ewRkmu/UlWt441f8rx6S902lcJCO0Jgug9E5OPF0pX2YX/aC +gWib1JTWOylWWOZ3DA7KvZkPtf23bgg2K/l4zmN2DAdybpVvlMew6n1L7QYxDVqHC3tlHxoB9pqa ++iN/3pV/eMpPOArGkw9d5UP9cR1oCVPSeWlM2mHcywjQqky4zJTCVRl9IK/CxcaNQe+N0mzoazcF +X1YktGDvtBGHt5jlSOx0F06Jf4Kan4ToxgKIoME7VrWKW3gq3EmvSsNdPQUS/5GKIc3Oj5jqZbrc +sUbNYiOGoQ1BxkWvlyTn9LYUgKdUikWnVA7WXU2IrS0Q974O6Mq4P2oFEB6sQEvTn5y56QFuD/BP +obo+VOJYBPp5PK5Z3CEtNGkZUUXB8VshCV9KVQG3EAxUWE3pIioaf++cHiuT102GVH3w5XtpjOlZ +KEK6N/TqTuqxcoPSHqnvCR0gsIv1JnMSunwmWPRocnn4wqYJtpUe7LMmyDpcSwGK2iyDPsMgYhum +Xn8qqBYIRTh46QmWuRObg6tF/GYFkuePwbHkG5Q1roOPIa/mq1DdigEaVMDoygiNTUeuCMDybTL/ +U5AJRHC8RhGvBm8qTB1XQ301EPG/tr+jcmZi9CPZSeju8Iu6nBD1xnO1gibOKHnjhfyobAoYJqU1 +sIfn7xkkc5i01WUlUdkiY7T822lMcvRP5ITTT4YwnAOJD1Cg6wC1Zfsx7SEsmYrDnJVOvl+iCOrz +9ZYeF2NiJl9oebkj3XZyy+qY66NXSOWXwWNmNjRB9hw40QnDoiZVXFg24S11qdIVK0R7qugduQ9E +nGStac6KLpcOTJHPd4vny5xIOg5OV+XayMAYgQv/BXTeMKWUz2ibq1yroUyL+4su4/OJRHWg+rp3 +Maoe5EAX3sciI043mNiAPdUeVfLIXo1PPqCNodGju3YmN81ZCcu8ghvancWoO5Bpshk5byLCQDCx +IYNMoaVUVtTI4tqvaZEHsYqiXgMDyfMoMM9dmCQ1BtCqmIfFrmACDqGLzWZJ2DBT2075T/14FCF4 +hzhdJqhYZZ1s8vU+tXFs4hN6SOK8CWDmWyC1yffcZGUaws5BXmxp6v1dDsYa7FUovOtLuJ+7r4y6 +br+yCRM5bgWzZNvjujNUCBvoLcQJq6dJ3qpNeZW0h76b4yKphWKskMCmLCqh7gMmRmTJIIWcsqAB +duNrEV6UItgJVCuNKpPBtMxJJ8FXU7UpxmhGyjRFQrbL9pIVh4SUPr3ZIpDQcu5lxeL+4ot/1qwA +Pvks+IGg5qkQ1dSiYXGivJeziYCDW6XFfOZ6FSRiehf+bnVkRdb0cN4xOd83hZhOEdtCMU17uqod +BAixIHGf+UcOYtFT9ImVJ9184dJJ4J358BmX2iAnhwB7n8gcEITcq/zPTIEXBiRpzpYK99bjvcaG +H2GHwQiyI0i8riT/ykpdtR2nTJ4yTju6KfWWMQAE6TwQTU7xvYQXE40eqfK/hBu1g/9w1w3Bb2iU +xqORDvLOppr6tpV2z0a6UmKWc3PixltxrSt++4+BOvCjhRSpGAfDTo+nrb1RO9eTuZH2iKefaE4L +f0ikbrd1ebhsLJVw3R48MmYHmaX6oCyJ73kDxVGLN+aad3P0wq3jIeVoUakpDpaop7s20sKw+fog +eEEwYqsXig2x+2/FZQHZvIBkn1//0eR17be9cCMSlp7EHGfjMqPJoP8GZtfW0JU2FNFH8SZm8FnR +/YsrclH6P6L9Fxt2ozeJDUNJ5XLyQ2Pc1RO/VtYWnGEcvlJtkpArBKhXaQVqIUtQwvfE5AYF5Wwz +hyZ2StwX7atzclVY/knEEzMpb763fhzOxOlrtevTJFTu1IT/qEPxBk6GZf7va9NorCw5fZqdoHWa +vdkpR6g7Zyme2uvwyZepdoKJ7mpxZH5zEWLDabhs9TJsU9in8eFdYMVRwM3qHqxPwle5z/aMOKyU +r0FLYGayumBp6c/SqYhcHnrsS7FdzIucA1BEqBywhbnzFSJg98kfKHW2pV0kXGIJSNB6xUXbZ5sr +ndfcSBVW5fAF11gI1s2A3fmitoSUHYAZN91OYdyZZDYqUuz/ju1b6TNVDap0Nkd9FJj5dRuLjDWP +zCivKJE+B3muSOYbwTZMjf9oMJ6K4cJq4oztQHbQyHieG3nWumCqhngJWy6kzF5qoCCJkbSFXAUI +YyyfzH0Ty12PZ8x19I7hVTdYx26xgOzqvQWCFsT9x+ktQkl/MGHfl+643QT2A/lzwU/hXaf6VyEJ +JgOvMgTP31yBUm/uiVKFxoh3sNqqOh8OX2xVBW+AaUdO9qC9WlYNawJ5jNQ4iGi3Ec+FDgYJOIgC +5cwgseicJANzB4MyDLkH1i3NvZV2WeeMEKuaCmHAB4XvRxgLVSJHpgVs3Jw/phV5QODqrj6wG7a2 +HVjOYxBek7HpYjybqGY9pCWFzDszKyw1r96c9nSQbl6NImSQpRshS+8cuLZqBnps/UMzaqIZiGdk +UBx01hLbkoYHdZrbb73I3ORG+xnTkQBkO71S+XJ8BEZWAWFqCy1QNPp+wX4CqrNoNhvhJsvwO9+l +K5dIcGygFNPY3E6Yu+IyOcfQUH6X2Bn2r4se54DTZpyItOwzVA6jAcHFj3kPGPgw5sndYTIi6H4V +alH17q7k2cmY36//kcIsmID7IBC6XXZH1k2WPzApwoB5bzVdz4zE/meyedBXbpsVxHP7OPCCc9MX +d+ObqPdgVMjzEBBxrVhGVg8fc5gJbcDON1YgVVxfbB2Tdt9YJQTKy0mJ1SNhh3UzmCxIi+iYP6aM +4NgJJaXvKr2BSP/fMQ034urX6asx5k5JYtmpqrxwSPISrJ1qUHebb2oX+0AGF9KG5XvmBHeWLhhb +gtxY0Wa2OdzI1cYVouruws9x9KPvuXJlJaJlESRO+RtXGZlNr25waUx8xD/p6ZY1RpdUICq86VaK +09ECXpIHy3/tbxEd1VjcnxA8aIn00nJs1vVJku7GQIYILvR4nWDdAtZuRLYYP9t/uC80ikYMZjGZ +L3gCbgr5ymE8F00YzINIFXjYN9oB04ZrK75Lt7V2w8g2sBcKFV9Uvp45B5j+rIWxZZPyPSSkObFi +Q/nJ2RET9fmwEo1L+ieJTUCYNHfD73MePF+KY76odJwTU45q2sNMkfvZMHx5uG+shvPoMkwPPniz +rmOKzxmIuhUTKwH/6eIsiwunnXaTZqRkm78ER4T7RhZoHVVEc4jBzxCmPW7ExjjRFzcm+gdrAy56 +zfTzP1VTJavO0VFOprsTGAjwlF7Ue425aiWHOkatddqfXDWc366wuEyoDKKXfxuhMsQ+WBrxDkWx +fVyqiliqRvJMT7TQtQjDE+U4Kr99d32K5ehuAtS11DCeGdveTwbUfkLdS84jaSr7/1zmvLTh16OV +hSUFnvSmPGHJYCIFCNzmANPckOZDEH6YvqjNB+jrdnOWueOYfWaaGRpGa0TJ3eG/PfBqdwMQ8iLb +udsmcT7eJ2WkX3Al7/66xCN5wzMpLL8G2wJZhKagbHUURDJOKd+6e5yyvd4WOOxJyVMbAaHRcvbR +kZDweDkqChSjifsp69Ry08avFWH0k8PvARcureujRAhuVUayV5Wzm/xMhFT4CTUznr3JCXRfe6kA +u5H6wkCiEduQGi7VPpiFLwzz+6l9Cff5KeMOxTMYVUukEuRWY8Rc0e0jALdI7G/oDZuIs9CFQYTu +zSk2+WoNeU6XI05o1avLhcMyAF/aNmB8vZt/YxDN7a2Xaf6a1tlMY3yyQZcxSmK2MLbmzcGi+dw4 +MN4nOBuomRhuP0H//0OcYa91vsSRYy9BVeyIOD2zMYSx7iTzVuHQ2/v6BEtL+wOnRC0NeSoc9T4g +L5JwdktycQ+S05UzidZvKmSrRXnhGUJzQ4634bFUmz+adyFIr/a+IaLQMpoZy8H5gCOoGJrF0qkX +mXSuEsHOflWainAjzzLNcueKQEPTi8sIcMW+yC4whwCFPvt8kT/JadILPzSVIAScFR/bVcU6MpT8 +8y4yvBiIUTd1jRZdz4CL/Gf/h2PM8/ATXanLyanlJAz4jxxmGtHmmiKuIaat6vbulPWzQCOgwTP4 +R2EKd1zU3LbUwLA+MiTi8BHHBd6buFyniC7YDq+suzxouidnkpbwe6dzjT1WXzFsXMHhPCAfo3sh +YFLzx334c9eP3uA1rrfyovhCA+PW1EuakJC41reoM1+8MPV/w+Jok2VAv9Dj++V0PrUNEazmO/iu +J+UivTO2qsEiRjzqWg6xWk1LDD85j87roqcv7nsumrGpxBbAsj651pTtOxtSg7OiiP4uUKbSnYt2 +L9QUHddxTPybPDE+S1SpnIMeDK5bZGgyzvf8DN11pXqHxjf7YN6/FC003dvw456aR6MIpC1ma3DY +b9uJiwpN/ZsfvnrN37K5SrLBaNwjfzCySJ1FORgmhNJNvcdPMOgQ6OMrS9iqfdPQ/9hOHW00N3/v +8ikrLWdp6jqcM7CwyrhGrV/X45VMno/9jmM6eQybI/a/XKorJMXMcqvohrqhAA5NTgbduCHhgVDr +EjGqVEOdE7b7xfu+MqAbVu7n9WyLExggHcS/RKmP1T1Chx3RJ07P3vgLGlO4pVsZYcCQBOSJoog/ +EU/7BMeuwQeuMbBqAmQpifKUP7hl2B/czVuxXdEQfqKdnNVx3QVIptw+4IWjayGH2IkCBMw1i49f +dlb3HM4+Ol2df90CL7h3Pkz7T5RtQbbNivUeBKyjXmm4iwF6gNVsNDUv5CkL5eSAuK1j5Y3BCH0l +y0Nxy2sJaj3fQZcwc/wU3KtCP//fotrWAqPiJHnr+vi+BnXf3mOd2ozZbwAqS9b/LGOjc/Q9ItZ9 +ZLy0Wl0PQcfEXdZz5yOm6qTeWW8IQJq9xq1R1KZUflhG2YPZjQRaO7+E/5whpMJsZf45U6LnkqkY +ONykg+DhuPNTYKWOdM2Hc1oLAx4LWhbI2SV4j29Aig8gZex4mcHq84UjHPPWg5oTDxlv4sm320ue +NmoBrpDk1wpYcJFmZmpmzkyFa52bGy28Z2H3+Rru/VNHn3rEAwJeN9MyWj698qORbBGU2zxo3X+e +VKtc2RZxy5ixe/J8npbnfSTrQIsVYIGNzrRdB5V824+1PXf7LnLHnPJvklphjVZQhqjmWSZ6lt97 +14XqoW3rK07UYlrmxSg25RhueG0Y8eZDlxaRhZ++C2zntSFIzfhZ5iZjlqTpJE8w02zsu6qY0vmX +OUgFB8/zYxC7ZwxkqPsWQtbdaJrCGUIE7aFGAqfL1QDefXUdm2BShhX02GEJgAp2JSY9iGG5WfX6 +rCfGqodmlEZ7O1uNOT1IebpJFLX3ou6Y5NG+bZJ/luctIdEmtPqNnrer9rV6BwDIDZ8knUfDdHN5 +8g6FfONNwDJ59e3OmsSWUgsZ29lxsbNzGuAwjuBq/P+esxk9aJ6uVzd/rGCR5UAp1xgK8K102A27 +lXDH9CoOE5Q4IQR7Jdo/1zKfVH1QIg6hOcvA+5/cuOm11Z/SOwj4JmmeNm+wVYBYrSjpphjsRHQa +Bgisz+gbpoD+LIcj5VtvKZH2PVaxo4lBskPbUcdN+xDVoCD2nsraFuxW9mgFAL0abJouMGReHSuD +W/mc/1D2uP3DoVy5ivFrocRCkI55+DOK8T8+xzOIkDbW/JXjtHG4+wjqFvODwyrsckZduHm4j35+ +TlOwuBAwRvsH1jVPk4BSli1n6mNBsQw14jeD9XjG70T56qsu0mUup+Wr6oVNbdw57l+Fj+bS0Mgh +6VxKnE7dwA2ZFFwbrHJSle0SanKa+5lA5Yg963oCldn5gsBiysqYAmw6CfrHSLjxqpGYTb/WhYgm +XhQuVbhpr5S7KbbfWZEkj7zKzi0p2WWBIO58+LmQKslUDbAcD9a7XBYKXzZO2o0AaROuUBgNpTf2 +BwA1qlLuIj0BoBBpSyNuIs76l3CCGfzeBdwhinKfTkoreaA4+n1mELSjgfDuLa9NxbDXeDeEUV6g +klA1NkB71VB6TTMg8nyv199fnYD24MAkdFYLBdXY4UwoQwPMiywW8rj8YlI2RH6EpR4Jb2wWevYd +wxvOL7osOncBrNQNgVuX6VGyyeZrZNjK5Wh+3yGQVpByD8yK9Yp3d5/Imzbi6ORPI262aZ+CaeAM +OW+NgmmqnAAy/WUJpLYRSSw+KdNtC7vXII+1aYpaVlsoWi7601SiYqy1wWR91BW/ADuTeijTn/id +zFt0fNt/1v3jIUq3GVMLtQAmlHYaeF7xik7KIkOjpjUGBZOcYJJwi8n0uCA1rsIxQ5gx3+qvDLzE +lcjq7u5oCI5d5KWMrEyH7v4t/TTrdwh2ng+E1Bsat+8Nw7dlPjUrhXR/oGLnY0QS9jGeMuzhV6Lw +AR45uEvxjeZduTBKLu4ZucemnYN1K2nphrxLz4YEJx7ZbmR0SFBZAQC5bFfDI70PjVws24Sq+9gT +DHKn+U26Crra09CbcVPMjEGD9bswhMN27puCRuJUAZazeguBkM3Hzw5fL7BBIgEc6FFZhrSBFjr8 +oeKTk9mG3esszEKU04XIFT9e9KmmaoJUZuyHkSfjNfOUZtFeFNQO0Rt0zpyE0EcYOPxjy1EOnJRS +gwnpuC3omHUxVu/o4JN91Cdn97eSux5hoLOcxFBj3SZsEKAs+YFSPNz0PNLbxRgBPi3lPiML368X +7hQ6IsH0ZzL7A95tmjFMN9ErCE5nBAsfL+A4RuIoXVq2bQx3AivvVMPE67QofhMswH81LhObipof +CcAAZnfd+j0yHSf3+UXICV4PSP41Zm2h9VR3llb5oXNRDrDwtD0LU3SC9ArJyB0CWnWv6rdLgNfw +xd+i0xmcOBuVXTTr4BgYQfxe1P7f9GnWU1/r8hKfzE5spcubnpMEE7Cq/8qdqlB46X79y7EpyGZv +bHzE+NaPEDIQH9ncG0XycwY5UCjGTdggTYJzSmUmISle/Jp3Bg80ZQ0SKRZOXxNKs0KMuaQ7yq3R +n1VyDUvU/xV4wcmZXUnvZFNs9AZaUXlEsJyw+epg3KxAR8pWg20/NHLdOfxthSQ8M4JLY4BuR7gM +V/4VlQJRb2CrXcWdB/P9q+LKNh/eKZDkCDf/rPHX8+Qgh+iyGtB/kCdLxx8daXbvFmO0sR7+q+MS +7cs5O5IbVFRvdOf67eqR6qbwB837jnFVU4Xf80ymPbuknXx+4dDwYQ6fFrT58exvIQAyn9ICMJuI +k863Au+gVAtXaBGt09MkH1PDNEMSylkAmA2VESstCW4AT09AmLA0+/c1d9cRvxySZv/VvFJwR4wJ +JyI4ypyrHX3/ktg24weQj2UuoIjtTDlxshB0km79KuFKq/3N6todf3wVDQ0ELoHiGmWCuU1GyLwK +euy1fWsf1m7/9BT394ic+NdfCaC53X+qBh3LqWDjhdGfCLEd+Lj0vTOvAvM4zsiWcQRc8FB0xSaD ++AsXBJmPC/2OC4IucAtg/ynx8WnCb7fdZTls2UTefpEWszpgvKoajIdbYiDcJwlWRbY8gVv1+gvO +FQM4TfOvdSANHoJSx6RyhPqyCAyM0GLcvFDi54baUbyw+kVlsWUVzrOI35WEN04m4UK4MyWfQG4o +/v8qwj55Av5O8OJ/WJO1RrhGGyGBVYz+FprOWxkunD4lhymRPMDWB2MyFv4VPoWt/HNI3SMRrcf+ +umLjccim4IvVhU4IpEKrmBsCAlR8TcE0qccihTM1HFfyIfG85Ak0C5pEKrSbjRDTWks7u/vjicNu +Jx8egE7e7zOi5K9JbFR0bTOo70I6a2mbNYGtHX8w5twgJCS0fcFndo9CJ6fAapSGWZAznKzCio+O +8L2l6W6lItxy/rQ9N9WTYV+cuETKcKCxK7rlORSTcNx8m8VWq2fqrRid0+YsmvQEjq0kA7ciQo17 +2+2fjCBF8cfSxSvBriLRWO2onNkbAU3L1GBfo8evTydMy5/AVHoLPsbLOOBTLumL2+qL4R6P1MQo +6740PyaCBqujVrbrKKcVFkovJ6X+jlMEWL3u/BUCBOR2EZYzozktyrwDWAJ9X7xxi3cG51vSOMNP +kAv3Ga7CfuMhwLMk/g3M0mkuLkYNboDEEhB+RbSA3PnZQV+eHQLO0Mq+yY3SluJkkojoG6HvJVu8 +jr064bN+2Co9t9h0i79mu89wO7MnrhhiPuAGlA8/a5yXXHq7as7PQALkuTGZXnXtthROMPUcc/9Z +yCauL0V/mHPyeoIsnZe0THgtMUUWFmwC+m9bJheCUK+b3WrtMDMOFhWPDpz9JqiCs2Hcz++BWUUh +t3us1zlBU1Z5D0aIZdr8r3oH7wNj6ZJysSFrGovjLHlPYvnMRG+qMf5u0Mt5qjsgypgrQ6QevAIg +wyWqw/lfL3uw9z+/JRC5lmc1hnDVB0ZiVUwV48dqg4sGvSAG1AfXk5DsMG6Hn3Ym+79mDS9r2h2F +EXu6tCxJFi0lNQIv73LXEp02jVVO3i8dU4HMrK4g3bC6lBLsGp6mtvb6/RDteeiyuXNnrArXuxDL +y9Zt8BdlNztSK7vXET6PX7fi8cWnE2nzhM76GxRkTtHWP0lUijdG0xson0tBlnKwdGbfTX0N9nlV +3eYsDu2EajRbPMNaJRTIasL7eZOnZ8JN4wxGQpRP+XbDMtoin7F05mdxQhkLvMHq/S8hjVjj8AB8 +QE2DZmJHh+PMuzJTsgmrhvlmqHre4WTEhNiOr2Pf48tGl/hpedXjJH2trn1JtE/G4Di1JpOYcxb4 +6hdIvpN3/g7wDxNBJGa4I9oQHRBMRkz4PVaEK1WdkUu0XBHJUUVxKk7KFVBJgOnYCjoP3UOHEWJf +zbTy2se31I/ktr24v7zGau1BUNlnG/P9I7iZGkMqWyDnXyRMVTF6/duHfP+wa9tsaFlO/R0lDifj +fhxcuBg39dIjqQ7qTwZO+vs2kSjtzIVYsZ8xAgWmJwSJgDxCAq3xE2YjLI28weBXnlwgQUJgQRtF +F9y7KP36yfjgMKyhs69emrdLw91ef0FJRk+fWHuIVb/tXie7Wn1/YlaodYC+/7i2DTyHPZ1ZwYJ8 +XkFzA0RGQbiKWkixr3Qde+Za+QE3J9fArAxT3d4bO6ibMdH15gGHTJOs24ihJ0CbdtD7Qr8Vmcs4 +oA3F5mtLmvE0OXRyWhsXT+FAm5jiufGFw8xbQNOjuAKrN46Xw2j0HKQPygb0DUCjgeXWzF0bCynG +w5RQw+eFVqlnHiehspqI0WNXeyQANVepSGISjw6O/l8pIFwVE6jiVtQwOw9BkCAyH0qImux3L5eq +oKyp28EVtM/cyPfpFgPebu8F/qhcn0pQNxy6pTVmS2mYOVtesnY5E/hOw6TN/LFjiZpJtnH0riJJ +0JKvUG4JBn/nIB/g0YSfuDk2TNbabrNVs+ODb46ECuUTIySSxWbFFSQdm2RCeVJBBdxQW6dNTxYu +D5X1MJAjo+44m/3fTjPR40Rv+a75KjQNrRkFtFmKPsxp2jeOjjX7PdpfCqUOQ+KJWHVqOILQkpe6 +yDO7j1G2TqEX8VcVSmwJAzeUrEvowJQakD5+dxsngMnkWkO/L3xMqCCtqe8dAfmMrr+CVhV+t4e/ +9h7CnCeOqcmZcZhOxRpe/pYiASUKIuJWI2gB2nd7TycSF98WnXs1R9i/C/wKdIk8HYCZtYFRv8nJ +8iLikiwCaHj5DoEkJouLhUvk00MgmOgBQ3oAEDURN3R19lArAHd1gdI57n9JsLpBJuPozQroUDY6 +NPZN1if+i9woq+Ph23DtY/osF6eoLnd8U0/IkjbvCrTx3+cjw3AjJC54zXTIdMbJBqdWhRXLwUBT +Rx/I3UDhx36D3j+qhgIiEHn9WTDbyJbEwMM3YeWrsVxMfTdYLRme+3r6QrdRlZVCkEGpuFCOjPlf +zeiJNproAws9bK3uEpi3skrb6guuNU6Ss03SxumsrMrYsyY1gixZGGp2OxOZ2UlUp8OCdj/KGjJX +ihGydXFm7fa6sn1b505q1K+HIH0UuvZT50Cu5JO4FMlH5QYrfsUsxu9QtkZ9cxYx/w70RG1hROgm +aNe3NHGX6sLtAvc2NSLAQFpa7ilPxM7E+lroKPSxTFFckHU8+IDCshE0aeYsuYnnG+cgvz3FJ06b +a0NxfvI/lCSGM/J1FutlCXJMxkkmigUr3Io64yq6g1tLtq4TQ+NsMoAAB9uhWH/fS/DMyPmmUuYG +AQhvgFBTWYxEsaIvk47AVwZDTye9tmtzwDpqaz1JUrf2W4tAQ01OBovU0hrl9BSUB25Q0neF5o+f +PbWElc/MWeqEbdoURBHnczajGHww1oInAA6imSc1Fb2tHpLmyg6+ZRlGzXfPeEbb9tMM9dElfPWT +of/l8/GD5l0HbCUWSP9IP5V4FZDLXesdchewOOYvxsTHe5QRPsO301zYbPBwvU4uDzI+Fzywyv9u +m2Y9lJiJ+usKm1ZGX8quD98H3SK021D3ULItbIgtBHpaSJK+wT07GgQMg4QklNf/sFg8G144K769 +aU3VgB/kvi6KU2YyzieZf0ekzMcruJcMvRQjZg+7LX7F7w1N38wZhPVECSGkdySR/xMZojak3asX +7gDTC35OnMoICsg12qZpGYXSlvaCA6h/5bkPr016jGt5/Xqg973f7yGoWfbBxKmzKwYQ58xTZS6Q +FMlZdVCLFF/+g+9uf0Ld9DwkSWQP1yOjntahZlYuwLSOuRIWpdy2I7iy92c/nJzenLMqfJGnd+1S +JIlSF72MnvwequdUDxiGoRyL7UK4MdiFsYJA0t+0Wqm+kCTGYVtM8ZKAGkLJVzolT3m5do05Ddvw +KchRHMwk5fqmeZGoeX8S8NTJj3B2R68sai5HNr07t1h+f8cLIdjNIMr4R8QnkBZ7HeErCP8EKo9D +lPba1zKgLVKbGOYt8sfD2Y8wcvT/sf7wUNxX1HSs8Zv84BGyqGOZ3d3l/Kam3/U9iuSl0N1jc/Xl +A6zsCWFMSFiYDoBdrVIiyqXu003LEkLYanEaB13uEQXtbGBp6DbaNfHygqVFbuJOprD7Bld9jc9z +jmHaps1oUug2OQD8gnpb26elNALDQ7FDKNKpFMBWbp3ZT2O2V14oYuXv2/qsVm/DHiD/c/AgBW8E +5g5Ttkqf38siA0B6PH8S80RDsgHUD6aHktf2h3hvGvXJOoYAZ42zxTeFb9Ar8X0OVEEC6MlrOijp +NnRt3WOAT6sI70bZHZmis8tQb9PMI2TMuhGbLc/cdOM1SRcIL5QgutCIjAkT1/4TeBR/w1BGUmMD +CXPh7Sm9vKw/7Pu+B7bVWjLRoDqnyXD7XOI/m4hdIoPoXuvDOQFsONhsVzCVtn6hmO5QuTbHU5L4 +YOvV/T9t1jDYFnyJM5FIuZAwhjK1ivgyzkqr/HMukUQxhL9PovN5VTfro41wWnWmm94TGeHBg6Vy +0huHSLYE5m/9h68C/oAHWmfuGfLzve/jgVUMbFM58hWvt8zzJp8gdhb5RCnCKW8N2UH7P0sGMSAF +XYI/uB1UX6EzXD6CFdU2AU6FM3mEyulXYUtqLnJdk/me6TTpSy5wbBDqX7yudcurmSJGUsf1PoIu +6oenS8fFbsYqrUYx99RmEjXSLSO0wHcE993+xBXvMT+hxfMwCUb72LuWZDn0ELsbq3PoFGSbqRGo +x93BtU4tSPf7uVKcb9vbnvCCuTVyaIj+I+EYltb6AtHiEZ5tRDSZzqX8Oc6hmhdorxggo25L6aX6 +0XWIuX84SMqhXufSLq49lpvqI65K29+NA2mV6xh0KAGBnf3fiuxF/gVZ8Lc9VcDNHYlGZaHBhKvp +o9+O4rtlks/Q2+IP/KeQpPOCGhqeU7nXFuDzSdpCo73ICsuT/EhW0JJZgBdrRqlPUqLIY2zGrlXM +U+QeA8UtVa3nPGYxchSDbc4c1gZLsIByDRa2DMHBf6EYxoQF6QEbAWUR+hupwhvS/cjWGynITUwj +5ifFjuT84ZZL7sIVWN6tjzS00CHrciuipBYjDAB9fKo0SHAWUWzyit5eVMABZIW0vp8MXnG8H8sI +RQJtw1ex0vEUy3tCHB+Iaiet0vapNQT6pQXoZdXzlOFL5W0gripkSRVsPYysVrBnHPhdljoPbHYh +ruhVhs+XS+s1kmnOvzCTCh2CEavd1px6I7vKeyD4IUJ4S+cRuezomL8jZCtIuc2ObHFvatqPykC6 +nuehctovDFnlkX/xXo5I5zvw4zpdu5Pbjl1ZrA6BeG9vq5KATQyDRrQmSXKY1y/h1SdSvGo4aH+g +ldYhU5FLrMDUfYCYdPOCViaFbH0ZrgRvwr+ajc+3VtBCYsrD1kBMvni3YUwueTI/VHe0D1CjA0kg +aZNbCduriuUL1exoef7xR9EzYVFYXrqQcI5R/kqBvvKQDAhk5JTsJwcJlHqCZ18yzzzrYy1kE17Y +xQNHYIIvbSwrEjguld5IGRAMwWVFSa+GQae4HpzwJpp4Qa+xU7x3lQZYlIusLoHebfE3UmZ5ciSK +qsPXvBkteRUZgXRDwFvfFzUx+TbN/Ro3FHz1mfqnVJh0ej9euZtVPCq0zyzIKS8XcvaYHiFDMdHx +7Ki7YdL/TO8vUG3BkPHldUsiESKlbA45EQhjL2MD+qh/f0lsHyo5njLPwlFkdzAtobQKPzUndnWO +qB7PCupKJP7i2yQbOmFLd5YPn8KpMdMhGRIYbd/ojWyiIYwK0FYbr1TbeowL/iowlNh1E0jckf/l +zRUkdJg3o/sDq76/d5G7OGb497TnKVhpOKisg4FXrOk1koEX7H9lo0hJLhNw+y1SMrqlrP7238eH +q1YB0o2Re1aWX/1Y/k+jSYWQe+ToV3GqeVu4mi1G2iUFMGZw6/Jg+K/wWOARVU7k9s6ryqBsgo6d +Ng8TvJImBq5ySs8WT/BFRGr6TEbHJbPpu9/wY2B76qB7kvsDOL1faYWw8QR/aV5zwrsms53D5M04 +Enzl6rEXFotwtjuHi0VlqcqhROPA6aQvW306/jcLW5gxte/aw3PNUAo9MEPwZJ6hKTtOdbjKcuH0 +rl0z7NGtI0hr8s8auDNPZRSQkhf3JVI2COwDwplB1NHzhYlS2jYLslnAVeASJ4ICxDkS2Lh7jz09 +bkzLEqgSRv1wW8WvfMrA3r8wr8itVB8wlX1fWtM6A0O5lgFig9zHrRCTQq/J6qj6bOk4TSYw6z4x +rqZISxaIOzicLKvN9asERubyBW8fJEOR6LXYc4NLThdXzMoW4H1zuzkAuLvTPcnnzOXUvln+UpTT +28/7z+ulHV2ylT0YIwH9HrmuSQ8ZX8wjlP0APFyGXJfEeAkO4VY03ZgwGgKzdW2R0BJgVyJlnwP1 +5rdyeseR8FA461USOqX68AAnsoSr2bEQTWoZxtefFIAcJk9hrmhCwC78jXGI7nRRcQ0UGMf9Ub7k +BiQF07gxcZzLUYipmYurcm3DYKebMos1lY6mq9QNSuJ3Z1tk0BUxvgGFiKz4jTCBTUBt211gvW5b +fAfuwBJqFFZHUWbj9g8sM7iMy3Hz5mBfjVHeIGsovx7fZFYKLBCtSwlX1aty4ZpTNtforLiAtjzk +JoKmrXOyHNaqU/sXXg+rF4zpGMajaoOM/CiT9HBvzl6umLsjnh5jrLgrIsqWsPwnpUP1ysP2IxkF +d/CxQ65j75Lmrbgll1y8ZGuyNyx41k6Mnaao2gwryfKgd8g+KHYe3+lF40mChsNHT68PlXT6uHe4 +9GVQTDxQh7i/YYcNU1Ce4IReCvF/AsM0jyKIQhAikQmDO4zY/d6w0M7Z7ixchEQ9dkuFLHwVQaLc +hjitXnsVN5JMAb/HigqZNIOFJizrbJ1vcayYlxq/ZooxnN8HkBqKbtPJWGX2BvbxgmjRqBI/Qs2Q +TTJHzLHoNofMDSor3YuK8/eMAycZ384Aw2hEEtSrPqpB5LmU1AR/O5whZXKKEKMw+dvh7W+xoRmt +oUrHx73Ika0BYJP8pfRnGEiCiTsOyXfqn/Q8E7MXuEkemOsImukAphlq9v/8UnqPXYbsHiBcmkMU +N1/JES0jH8vMOigrxJCT0F+a141k6MuiSpI8pI6b3azKG2zjPL89Gm18JLoYTZmThE4FMCrnPDPV +hmC6A0XndyBe9QSGy0ew6L0y2bIpREKxh556cECXruPeqI3xsUNwLBqW8rYsS/C9bHBAyZnUZErn +RCal522rn0Ge4si780E5zT/AiqoaCU06JmjKugGlvRjiGoaxcnK6iwne87mAYMlkwrbU76wWosF/ +o1XxQaRKpktZ0hygMXtHn+4SKLQC0x53TP3O9Lv/qWn/PF1K4Z7+b7jRl+1y3tKYpauNnxeXPJK2 +LRwb5Qxj+SUzVPgVqIOlX1Z5fZeSqhsNwJJH3HrF3PieGiM9RqLTFivN9rt9eFxIYuhOdMy+plSo +xZoCgws+GGwCOrhd2Xkl62hpmzrDYglZ1s1U7D2mlTqq0t6C3tkS/w8OEByv34D+87Dgf3yzdPb+ +BOZUKcMMxMlgMS6F0WJFK1QmlxK9HZAX4Aqj/GZaHhm93gdp0ivTwqLP6Tey9+j+0fm2wMSuY7dy +JMmnqjqTDvqFLZ1goIhGoCidTNI3YkBOT87PkXDkd79S3mEUHxfX4Sj6UxfcsLcLcdRRvFKJ0Flg +CGzmHdy0756k4gyxLzqBR85lFwK7ifrCVsOvURj7lzCBGPnYuhTz4a4myS9/nGNI9dMLYN0nysjb +QIV1y5GwO1RzEKWIrBKvmSfkVYO3iMziXp+45jftF0vp5jVNDnJlhr7EFGZlW1dGmbBw42TW5OE2 +EvCkQGZbjgQMCPZnQbqy2DppceJy+5a5xzHrtz0X4O5C/FqURHrLui4YaECkh8xrxzKHUo8B5vP7 +xsNhRhR19FZ/w452kCR9yvecfmaVDLaDQQSAyzAifx2/KDKkbUF2ywEgwxpPmf0cbIbRc8LIYR62 +NfUlxMAAbIeHseHUw4AMknVi7c49x5HYk7qIth2Pwa7FIAkOsdtDP9jR9Tl/aw5IZKFMwDZdTxgU +E40HzXAi3dqEOEsFk5L1wFFgSYqnRAWcp1soh4EgU8GkPeUjLnFSySYMCEfwiv3Z0iYrBb+3w5FX +13wzv7NMrVKXjc1NPkAiLdWOFHxnLnYXSEZlvsKo9w/+msZQYahjz8gl1v9/1jqqh/xg2sGSrUP6 +4vv40A9yKvU0gcVrzW8hElKGn03wuNYoQE1kfOg1inbN0Gb3eHwjlf7G3NZ3vLuQZLsklkuU3AmG +FYS8UrHlk0yd7gb8oABINeFn+kB821mehaw2jwsDFxhBA1MnTRq92HNulm04x1STIgY6ecW2ca2q +w8JEf/NeEtTy/IGAea7vUonhBWewxFJ99ti1SSPQ3R5vjUG3Gi5T7mfaTmHrZQZORRnSI+9RIbZT +7vvFfB6aeFmznH0QXZAbF+e9F1x9vtrYo3+qY8R9EIXzb+KQV42p6KJR3RsBljwwz7ZggFZZZwW8 +nLn8J4NNuuozNcYtNAX0gHkPEETSoloYks8iLgDVWrFGQ6Oed9uTnC9t2nKOYXpa39CxeHc5mIyw +MD+4ui/8y5RCY2YFm7ZWeXavE8mZa75C+5GaatReVDEF1tp6ogGNvzmjHXlzoJ9U6A2jIOLnUx/O +vTZKSoBac//JQnicBmFbplkWZU4g8t9VuY2lYS5boOKd0QcQpBrhzMCeTIq0/XMBKVZWRvCOFs54 +YGL5UFEGIGFdhV/stfuEzMScp/AFNJUF0amfQGJhYRdP4pt8RTu+M5rxXeffurRSrirRdpljTnDg +AD8daRtyKKPU8X28Q3biq8D0SQhk797w/zLxThtUrSCl7GHtdqTUZWY1EEmZXPVf1zcSHShFIHJZ +mJiqav0/QpGqwFygwhnUVjLrkwXtku3Uc/b8WtphkevQnVqetvOuIeyTsKf0SHAwJPaMki/iijTj +Pkh42dNYQEWx4Ydq6fC5JDvc/HMmLQ9MK8Doxa54MYLtCbASs/FKq6BDv4GwpRiBkNUIzxUALl8j +CuxuLNt8BXexHG49DqhxnbpZ32jsPmM/e3pU6gz+QBb6fPamg1MrQfT582kK/K0+eH1T9lY4O2rU +Q54VRrYKHpjOMlz8u2I1LUVXzfacMQX90lE5rpJMENV2gnOq+hnMEikOTrYirw5F2PlTnBUaRklH +yuFvz1DP1DPmbD+RfeJvRG73zY6wcEVgzbjihp9R6sdxB2FMPDYe0Jz0SgrRAeHJq2ybI07h5qtQ +I8neWhdf1g3k2vbq7enaM7e13jeoECfL6sL9z2MrSOgZoe42YsxHfdZmupn5lgOtYi0fc9uWAYpi +DJRF2esUxUiwdmtSgRR6kTFWonnXRI9cig4lHUCoYrUzBctwmJivY5uZxty1XL7/2cCLZF/E3H6G +gCuVMXjc2yqf6VbLcfEupMs/Oi0o1Bl+dj9Qndrb6Rp/WkEmti5zXE1JqI1iX6T0GiqypkTX4s1i +fvR/90Q4hevGceCYD/aIuO+rVsUzRo7TmMEL6lmzqsmo0vLFm1L6OJ14vNJyKWKU+L6i24YS3NDO +V1AhmBBSZayyyTQT7fAMvb/AeBdtlp+cbS+px1Ah5h7+iio1XIhro2Wbzm8kf4+RQD3577jLP8F2 +I9jbny6Th6PkbM8jIn9oVpjY/0j+/9KDf39qElNlfkLef5aTpb1ZBp3tWPyQxLPEadDP5cU+ref+ +/6e8yNGSoaARNGrjmIfRGlAl19BDQcbip3qLkWDD7pYt0n/1QkDqp795LFAfCmPacT0x7C6hbU4F +fR7wewi32p19idHfZzg2KF2t3f9r8rpoauLBjy25bPTtLMfnSAsnVK/atipvIFB/8yxMICJ21N0o ++T9QKRbjeMdalGgo9CI/hUvV+edKz0SpAUjD/TqZLB4Z1vNco2zdBdMgxFtjixapCTtgSt0m3qDq +9UUHXqDJRptSD8qZH09m37S+4up/rEhh+OvfZUMOUeQDoNbs0lFSysFWeT+DEyBzc+mUJigL+d0Q +c+N15+0hsDiyP8jF4gV/EUcVLJgfNIb1YiabC8vgwtwr08hnU4Ujnzimh1NpL0pb/GfqLGI3zASR +XeNmCd3DFMQCK8Fu4unc4qgtrsf8g8JwU1JPMcjmkjlmVoMv4HzwFF4xC6FGu99Yj5dgyt9j9Ym6 +T8Ki90AFkVbr/ayBMLDkUL/SiBQilWFfRKHDQojGaLJb7xOtQ8XMNJiV290VTyR/7W1lkEJ+ER3K +4gF3LBrgx+n7KDYFafZePkTkIkYNq+kERLKCvtgeoltusPgYc8G/J4weZ0nK8N1MMNWB+tyydEhA +tQX7Vor5VIc/sqlJa5S49sLxWZvFz8PxEKIt9TkpDJ+1qdX9TuuKg3g3DKtb0pnPo/6aoVh7oyni +1frO9erwHPqoXK5v24PS55ssAbyEJCdZH+DGy2raFgMBq9TBcrqlhDeT5IB4eqIMZ+BKSFTGP/bN +S05gDv0T+BROeL8pUBku8d1CkgHHUcghXTv7RrXz+spll04GG3zI7v5ntC7ihsZA6EvukiqHaIFp +9nWKG4cDj2is9JRLa2eqOHE63CZPVPKY6cRZ3GZfv4mCMiDjZwvWPBJHgAqcOnVYAfpAQ0kwCZGH +XDRiG3hLqOWmCH3MagbqI3LdJVj1C2wcRQi1MONT8QdGmemgNgi/6EfsDAXJ4l/8ZegtlkhBH2cn +lmiex2IiUn5Vt6sVbAyeL5HU6EUtRsdYmxKnrznoNJg6E4RyHBTUfp9OGGGd67l3+tsAcI4U7tAY +kmR9Pnf8Yhfzp+XYZhvoH8WlUy3K7ekFgAiPpT+VPFKAMqQvJaC0DFuLTTowL2JGg+xP3mxod3bk +lRpUvj1ejhrknMiHo2CriNqnGNpHL6QPExY3dhV1/ZlrVGJLGahvzhAYbifmReSSR9fmY5GlgpOa +/dRNM31niLEhvJl+KkQjx3/8O92A7q/yKshc4xlUPm9SYCbz7DDTctu77ieLsF/XSLKt0qDmXxtF +dw207lURWcHqt8oTZ46ryoOk+73IYGsJrV+bqqTFWIbBvrl89bV7K1xNTIssm+nXn/ZTzEE0nLja +gCPCZ36iyZeLXjKmxubWr5OSEueRGOH+SxZBnr2QDtS8MDZOpXnT0xViY6SCoFFxNKl6NOiMVmEN +kKy2e54FNgRaKgEydZ2ZnyzZrD0IHwyek1T8PXVfrIC2nOX8Db+k7b/CxkMXHJy75XrgD7USIC3v +PoBIUmguzhvrKfkGkh8tAZOLCPNL7SOgMucGG5c0MnV5yxI2FnqrWv3SEwZwvSIdVXaAK/PiLycK +c8Hb/eKb5cCliKspZf5pw+OUp8mfvcqXrw7sjPzlL7BX2nhF7q6NkPvBOX/E30rOfDlmmUoGlho1 +M01DZ00mSWzQbe9U7T2HDMNBGdyhnA8oxMO50sP2AVX1XJSseVdJsN1DHQGrdRkFeggzVyMYpqkH +Rkfkdc+im5ZtFMvtdk8kRcyC2J42f/gXABx6qZnXYibAqrcosC1yY1jxgdhCoFRHHoTlTgSq5bKw +oWoDsliKhhvKtSidXmhti9jSGeeArkEvQDnqBBiY4xUPQMeqTGAtoHPNjONLswZmlNLVyOIh4Kll +fIybtTJPMqzZYgjQ2gLBgSVQS4SwiXlXybcwFcY5qQ4xQDU/R/9XlmRsKvCDfKzHn9zbqn2qWQKY +OJxM8bFFUWGsAZqrr7N8C3HzQf8hUKo5A4LKZwzZ6DJKfHtbQBkNB5fiTWSKhvaOGkQ5pLBusgIa +KJJ2yDi+YEBLMHyP013rRfX0/5uVtIq/qlLIjq1YA8e0/xTx93MyxLoorQNfqEOjecfRV6Cnp7z7 +3yrjipXSt3wLmcL0SUtdNix433mqyiUx+DJ/FSw04sLENIYGsEiu2bElYuGNmkxy0K0lc9g7kIU3 +9b4F/tJlxhK3pfpWt2e/4p2T6EhLOg/7VYPJ0Pp6JNUsmoWc9ZazzNbgfiUEQ3Jq4TXG10EpTQ6M +2WbLEzjl8myD3/n/msTph7XKeH1+ZOjlN9uXpqZ3Ha0ALdBiif7HGgVIfhOD3TRIxgQlHl6TBz4V +z4KIjN30XPKbj/cEL91BdoP0vF6d6ecK9iZO5jlVsHbDwg0pn3Vw0eWSTdo1sbgESPwO5OKkklmF +PM3gja5ZXdyepSoDdkwsgWh6XwFvttOpzvYxKoLuwa21MWtwxp/WWo00mUSUEqmDlYYC+GWgkDWU +52oQ9+8KTyL30PkI46EO0KW/UIHYc5oNc+mHsF0FdwdrVcjYyaEqFzbbkQQeh4fZovLCqtVTklWa +varuhvrr+rmIvOxw/pxZU8uPRBXifiAIdbizA/z+ib3Leki+PYROUzc7RTeyBbDGlN7VoOwLWi0M +/zC9Gi627mkpELam36E42WJShCDyokl+ceWBVNCarBdVDhyfUhIe4U9v/W3kk6UzpoOAt9RHE5YL +sYTdMvlf0hX/JbbxfhxHvpSFU7pOJ/WnJew8pxmOws3be1BRc9vsHLEDxJRmCpBRxI1/DYXhkbF6 +51nCLar5zH7P+aSApDovcJ/Q+vc/sSgXebMRPVj7Pew9mEnn7MYq1iTgUwwDTCXWcADFVd7Snvd/ +9oEijcF9NIdhS+cDIENAuEqcfkQmmXYxmHdLLwB8+neCJXeaWVDMbDgBJG8fmOLmah73WBEglAii +wlMivojPUN0tq+VS1jpLg0diaLqlIKXdmm2eYGdpkTiBJjQak7W9rpjmgzqaAkKu5f5KWriA214p +eUWMOMl17Aay95XmqgprimWXk3jwzFgQeBtKaRXmkdJE0bsCfJ76ISpPXiHLxcPn1kS9JNqM8zCB +qLoIHSY3AtWH5xChD+f3EXlOIHRpW5QjggmKzWgYptqinzHKuo7lj3LRObt+9FTtbxKfj5Gg+oqh +e8fWB1/Ml6ifOY7pAyUQrTFocAVe3dW2grrXfS6ZZr17Gg97jcjYJnOh54x/aYq3LkXrr5eSXVDQ +TZkmYHWh7d+SUe33xunxDCGc10duVvBnNm1tLlExT3O/Rn6+RZ97OD5vfBQmY+f+l4OOOnhd17NB +TRG8rg38qHXdR7xP0KqcZQqOJg/uVdd7ixC9EiHv+rZumx/CHrsMCsu/0mSbwnpChwjDUoVNEmlF +UB3FV4c2NrFD2ZDnlwZvBaUZZm+Or4M/yhlrP9YE+arS03HYI3loz52PiWJoHn1zoYMNvzHwvbyx +CJvLjJ9slkWb9fCO+DwrUKDApc6tWpKVlvRxbgOC/PS4HJZDG0NgMsDIJX8qh00nzPI1IhW+iczh ++dGhlO43AldokAmkJppH1g1o2b/6zU0W4NXodep+erxzJCLYEoW9DnE2zRinIQEoupdtPM5p3fG7 +GVOArOkqTA3jAhYdG9ewXleQt+bWEMT4nM9w6Ihts0DcxKVULEedFwvQgtBCJ7RmtnMdBf588V+L +W/WtdIfi2W8u6yBCniXeWPfMbks+Luz8sQ8VmwhCkWdJX3gkYJsQ/wZl5MwNZ8hTidtwennmeqKc +4gfMPqodN5Z+eJXPrm7TgVXukqFYW3fVsXpLd5yMpCVrWNZzw5iH56uObO/0MIwDo836qRh88Zq0 +nW4MhGP33/nNIaSeFLE+oQA1yKDn6lusvI079Mte9jCZjr3vlecWLvlPQZbbz31dS1+KLEtHp90E +mCv6o3Oy8VlIO1lgS5YSZipTykY3hTSOG1IVyB11TwAdbJzDmn8paL7c1Azbt/gb6vVIKETm4P5w +9zj82iviz1TFlKs+2cmF1o1PvLWhb/qju9+Ykb7pwjVsoCTcFrgki3YWk6M8oPWtgaaUV4nsm0vH +y3uyqFXNzb+UEWsflUgBIf20hCbJdnKtPEO6Y2BIiCW6qzha1Qjki03Xcg5u5MTOv5ynDnV5RXUY +b0OQmTNsClvjMwrXDSNw0qPszF7mrPFg+a0kSqGP913w/MrtLhI7w1dvxYKr312qgc7Y1FITavnM +MZBddEQNAZi0ScIJaHAoT8R9ZYQviClyUBwc04w33P8jm2qlJnYqW59yNUB9nnP/9u0lUuYZdFli +hGsSoddSbD5UYdKkgwD2fmbArjxUtkYmnnmGAzjI5oupvCti7Iqv5qtjSPFOIxY46RYiPPbuHewz +BBPfBOOgC0lyD1C4/pHDzGVLd/ioKxkfIZn+HewbuJwkYIXtJ9RGmp1H8QVZF4l42/a92YAd+1v9 +Mp+aF9QLnyFh7agya9VTR82TL+Eslg1M35VX0R1O+baPLaIzGAKe4IMD/2BZ8g8Rfwpc/ZMeHr0h +LAUEJutBEm+CAenofSBJg8DqlAh7otjYSFvytvg7juXup0vQDKabynewiBBP30Rbq8nY+Wivc+hX +EMDSOdkuT/ox1YUa4lp8IhPKWtBjR+1LuyyrN0JEYmOiv0aavkdwCfDQYm1gVpDZQ6v8/KIQnGCU +/ykZHvukCvyOtvJ9XuNRaMll1Y2F9zxvfQw2fh388T3g7Uj3WlL1rlHmchYV9q6vPDvzmFObuVJ9 +eJqEKEXn9RV6SJWp+pVCE2NrpP3dhd0jwyLyfxA5iQCFYNZdz93/P8sLdaC8WO7TREJNX1exWJwG +8bsw+Uaw3l75TvCHMvMgZl3ljlMfsxAUup6eQ45pAUQdZimIcdMpUFXpjZS77UPiJ9ffX8YOyCzt +ZLfw16ZIKFkV9mDYRM+zn99kPbH/31NYSNbPUpIFMU56nhZAsS/f9DWxeFm5HAIf2crr6IXQcV6P +35YCSh8qCGRZ6eKkE5Kof2ykuARoR3vyzrYVEQpjvGWVHE3jxapkAOD0d0Mu1buRVLNQ/dhtxDdm +L1EAvBuNOq1C4rAa3tG98ACQc33T+6pJUFfutx02Qzy+NEFgkyx80M3eHO720Zai/8dMHQ898smQ +hSZJuoq4m54KHk8V4MrXohGNKNL3AHHMkO0VMEg987ix4gpzsU5UPpDRyEeVosp3rP+//mH0qzQO +cNRQ1mKBg1c/dB76d7qA8eHXrV3S9Ig8hWKEbW35TTbemPYxSuW0Vw7aGaRenw6VxOTP8EWyMfTs +CgPS3HpmBzwH4+YkJ3qruHLJVKcFfQCxAz4HdXOtMAHCaxzHZEgYLtjWHOFJibHcSfIfYVtgZJXf +Ue60IYRf0y4P+PXo0/XWul8Wt7zke7pf4gyEf6qbRDqUAqJGpzOJ5F/jYXK7MQCYmAsy/54/hz9F +OpyDvCUsl0p25PloC/3I6bIb1sRfXh78Nir6YBon8mvg5g6W0HZmiBoYGMkSryqlMWVZadGWqqo9 +m30jbHIKArojFla+/cGBeZLDHG9Z4ynTFIhPO6oiMQXw2R/3++WCZP+zqPh3tyoSqB2a8e2ZKiGm +eR1KrwqJCAofDkv6qo3kGP5JEo1AUXSpzbvP9Wt3hLRiPkbAVR7CLuwHrPvC7+4za2ihSsbn7ahB +nZYjFrqQdn4l9BVoF4iENhu2OsI9PZWYZ9d9IXCIVUj8fKMUQ+FeEQapYrmwu7MB3SPO+qmwR7a4 +5Y3zabid1h42EnCjChyM6YQb5/gX7V4VTzk4nnCi5QIOe2ldaHu44y1J0Yf+bns6/Pf4dL1nrM+U +mNWx3LcaYUaUOkjXs+0EUGsqqQOU3zT8s1wV4izmsekToG9Gr4oXXyrcbBJgXCtd4b9Yz2v7eur0 +hWKrelYGVNncLirwHpGf12N+gOh6sQsx4aXdl8Wxt7XapoQaME2w+DWVX/jRcMZeBo0tJ53Alfy7 +hxclyfFAYW/SVkqOIaHym/2M9DUhOTpY7X2mNzAXd5Q8ousHFiTb95FXFdvdtsfk35CCpBspL2Un +dBddTmcj2WSjxK9N202GtdL4uRe22Yj4O+ByAJ0hKZBCZXKgRg1tnRQ20S3MTQXvRNbJFJ8+JlIa +qgNFoEYEVtnMRKkcB269r/6T85vt62IqiJImrLpJMlWVU0uOE4ytg9ocBR42HJ92ryaS/IjU9YUT +gL6Jm4SllZPWbwr5E038ZoIsxAMm+yh2Ed7xUfmD2lubOabIXfOJinNRocEym7/LyfTDIqjBFimR +ZclfTCYR/HS3T60LvHUrRPq0vAe6aDO0KfdvCNLh8bTk+m5PSJD6FZev2TtiJiM/+hJHCyjZuv95 +pYjf7L1hJHrfbHMgOKDuubEYqfkWLezyIx6TUqy+GSdMWlnMMEHlvpSEcWab3fy0ar84IKcLatQR +NVRAiVxeh8m6tRyGQX/bjVeBl6c2uoEaOY3dMxZGCqVffJgonA4al0Ll4P1ZK60zO9UZno2vM5qd +u/wZEW515C3yxfr01XUXmz+Nk96v4E2hQckPZ3q2V1sWd+DXdtBisa/TKbR5E/jN/2VvzqkwRBSI +VhLc4FXskuEU847X3D7BZCqQaYXm8zUOTNRY3cqT+E/7fnMN5pdm/0VRq0RNyb9HwGoxqfEuJfCq +um2kvqmTrVssF4kLTi97lDKLWUHedNmf1fngx1pxeskvcEMZznSh0FzY1gv9EoIwi/cFEM7vZSat +tWLIAeMAcS63m6MpX3r1Y7tUq8hKz8TnkvdCFcAOPj8qhf4F1PJKyMq36W48Z4nv+ruESWCYln/k +aOLQDyEoCUhf0/98lydbSpcmbCc2lLFemQAGcqTdkQvsf65huHg9ZBMBCsTEOKKLxOjjp9rJv/sp +zOFNfVZhQuA7zIdMUJBik+LYBrO7OsB2uamGVK3famM/mCLG+MLuK25YB3P3rzP49tbTTP7V7IM4 +eJNXgo/kC3wAoi9ARKd4mqrfJOrBQcJsAvbz63rFZRjJ/wMqH0wpDw4WmJtgchPP3UTnnH9x9QVp +byR/f+Rxh6xbsxhYQqYNAMIEQGaT9jimumTjh3u/iMxRCxKxfp+jebOTh1+5+M6I9X3/AjKCYRdf +ib0+rfxn898bYujQDfAPjIAWBJeKxU0Gz++9yq8tJP75D+s3LUQcFFeq+ecqz3XGjw7oPcr1CvmD +QmI08w3ozIHLAZgzmPp8l4B/dE4iNri17QBn9v3I0Xr3TZqskY7lzux+2q6sXPqa/eo+fD3Vykyd +ZvZFxdQuYYtLsnZ+Q5KC7ZMEbHoYDH05GGIQLLWdLkPwN3pYdECboPmS7Sb31yz3KNxlwLtOSijS +vLZzzJ07h7kaiVrEy/huG0OSkV1ozSbc5r1je/okc+7DH7W5U+KzIYYbMavHXhiAucuybCADgkUf +gO4Op40A2Fsa7n8JIiU3Jg9XRad4yiIRy+UnvwGxFqYDtOS+lqILKRZi936/aaMvL+1+pTra3qrc +Idjd7fUxcFx8M+SOmfaf/1N0fDSsqbOkDDyhJZxB5w09O/yrL/3ZQMS/Whe6tfeFfhcqSQ5cVCP5 +u7/CV01o76xhFqe4YuTUjoC3/kkEMDTi4+r/zL4jjN6otsrAoYDaBVPYpKPsaQlCHJ/apOP82vJG +c4HWCukxz2rhyV3lH4AeoNysZbc9EW1Pzy3cVosDuz2IdJjvSI9xL/AMiExfA06P7IIEE5MpKEFc +cGc0GEBhgE8zE5sANA8EVW3ExET1uES1yTdPvCSL9E+OkW1Wg8A3YNTkIJ6EEM8inkJCES/2HCLL +IX9URrwX+ij9sj2vn8V5tHrbTPym1cwHszYqqTVb5cqh6+6uym146IGT6aTM4xoSGCelozBneyER +4DCR9jszLwRSAomvX0lpQkbYCKFcXk1lepQPB1gvDDjQorg7zyZZu6G4yxOoCq2T40KnrDeZHgC4 +jMVG/3YHHfgs2ty08IkJSd8KKz5IVljDo1jEooWYxKVsMhpVtdCZc+2Is9jYZi5ZoUw4/QeuO3iE +W2pzcxGp49vchGWbNx6PQ6/E2H0qOtC3EFBo2/FdIAqV7OU8VLFxc2KK9PLhK0YKfUneSc0BpFX3 +POdAxqvj50z0bCSM9hP0I4/uwlKU8JaPaHABme1LU6I1/zXMHhesP8yV4MA/zn3+RyMQF1+B57k4 +umqmBcDFkab0alNJD0UMoYJ1UVVbjLu9dtaBoSb3SLQPVgCdx+5ztBOtgWz4n7ct7m8mbXFDbixh +kz+JkzF1i2lL2/yqSsEMsW8DHVhWQrrKXh3zLulIj2llJ7sduA7nMT1/15iPRz2EvQfGOdHeCi7m +USB2ygneo6vYL5b9jXG6BK6CyCNQa2QsD5jY26WDRAYokJ6tS0XMcrxTW/nkUMVWGb6yCYfJlQUY +VYAyfT0QesmhghoX1L6RAvdu6+xnLhs6sWVz2S4kiFy3p7ERtxQXk15Z0ZQRoHU4tnJw4iJuqHK6 +1GStnv31DMMSkCkCd6AdvuCfE0tS20y2+fJaMj2jOtnlAzCvwnWTre/9Ch46xJIU62hPTMgnJ9cz +0Ovxg0mriLjpuXHw8sNxYfaOU46+uBS9y7CgmvNIoO0oFbysHXZSUZ9AAiixVcfoR1XD6l+I/cax +IZxsyBgyrj1aI/EWU51X5KQAqUWaejGuEhhHjbVhM7gVqrFa/FL/UvY+8S4HZYQl2MlMjhlSmRR1 +dWRYuV3DK5p1g74akVtRcKDhjWCtOaswkxo7lX13zUiueUOTblqKtH0MGzciLf78IPubwPqoqG4b +59zZLcAZXdWDCIh/sUZct8XRh5ELOCFtekPrc9lneMYFscqV8m99BHtjFM9jeVv0Txwr+KNklJPG +Gl0FqCeL1KO+mAEj2MJNCF4DL4MeYkxgudLB8kU05etyVEkoCYA9VmhBkvTv7N0HCzozTRlNLkuz +Phf5S0q9NMRN4oPWjzBy5+NLAK2GZiR9AbSXE7c7kdjTrDYblnUJmqJ0ydpKlZaX7FO67783BZZG +K+1Frje+MZ/UCpeZ6hV9RkrjSO1swV6xYX+CD27tr60zL+NVuU75eHV7wN/SYadhvv3TgGCZr7FR +ODYOM1sXHg99JOXD1e5FQ/x5C2rR8MlVh7/s6uN/7mMsRbRIIO45ku9IA1IF7PfrFIUXpkS0XF9q +8qJM/BB5peN3ar8Um5EpSKxAuh06G4IV8pGXhG1/vuIaahhaj7hmmH3dhCBw3fJmFavvj1GMUS3y +Vi15VxhAmliOyd++I7spi20uEiDCctAmxsABLMsMX+Si2ULVVQ1kEXP27oDetMVfMIZzec758t2h +Mpj/YZKy7Sf3drJcqEaOgT0uQhStZfN4OhL7i5EaF/EacdvSekZvduP8t9vinF0bypaOOVMG2bEZ +WsFOnmmAYjH/rvvQ6GiysLZ3HPVU6tOgzXYLzfxCPOSPuLgQH7Od/7F77ZuKVUrsRK8b7+ZPZSX1 +qXbQHWoGfEzGdM6nqALaiwt9v3AX3AjRg8oT01HWF36eAE3uAi8ASpgwFXtIvyWkJicpZH2Jw4BX +Vycs9QfPu2nW1hLiay9EFpEfh3DgXRjaJbLU5CT1AxdtuRdt1oRWUW3AjKDTEtMvNRDFAVt1vCrH +lrZrR7mq8dFPHuXDB8k1gA45ViXYBX/GMoPfg0E928OoNND8EVqOf1lf53udOs2KHNpg3VReQ110 +pA4a+gJngxZKokPGYo6MwaeIAN+4IsTzu5c4vy409f3y5aWWlvudhHYFqCQv401rw+ozcOXxXCLG +Xp6Yz5Rn0KLMjiXRADzJCsnKQUVt/xdHKWQozp7FVBHDmI35Cq3+48Ui7UFNYViTnydOd1p2Jdjs +ki5gB4s1fWl8YYeHV6JSYmZgUkqcOPAoMN25dlwwQtKaD/CZWyreDoHzBw4XVnTze1ZvsQ86tD8H +Jg7l39CA/U8u1EyWUXJSPrTkD3lNJ0epD1ucilHdnwy2HmcWJacqHaBjBI+9N801+QeGaEfEiOdg +x89Ux/CF/+IqAunWjsqqh9hsiBSQa6iBcvY7qoOnxGiy8lVfD5msHlelZuXrEclz3dTqD/d1ZIl5 +I39z5a494/5n4DvHxV4CvbZ2zPfpUbZ+QSgPrihmJb+dXWvmkFoBrBSfFi0IZW1PMs3wyDR+K8+l +xb26ewz4ThDZLoQhhutkej3JRg9JYB09/MnMnJ620bCWpU+iMBEcjQNAuqJkz49jkXHWSfylvtVE +WIfY5rN4FsOpL8M7ASwmmd5ZdfIPKfm/2HJVRMLY50Q6cpYPgvn+FAHkSfupPauHSa2mnoF6crqo +rTzehB71IXZKt0ko3uMXBET7RTWnUI87FqRX2SX8SzJ1ZoS0NvdtffqiReD1eh16tKu9ZKd5K9gO +OYPcDCr7Xlvfiquw8KeKsrhRuGOTgFD6KuVCJr0KA3HHJQopXFbq3km5tUVBqs09wwSt7dnH5k/z +5cfqaGPqeie1ON2Crj11vXZgSkA3JugtvXc8CktvR3LYTqbwP6SCpNsUK8Z9Oag7aPV33kIM/PZv +r8r7p1wg6I4y0cTEp9lvNoN9daQStcUgLgQcUSIL3rVOz5vkohlqPKpfKOskGTbSf420ODFx37Gu +Nlu0fwEh7oxuY/H//9Eijw1MhQFPxkB8LM07JIAQanq52bysk/ZbK/uAoJLLw0EhWAtW+fgP4+jz +xZ7lQpwZsnOu2PFjL8rgbvQBvZEsSRre++wMGwvfnO9jlUi1sKFJp+eUxJrxnba7OoOWiyChs6BW +3gGUBXXdDmUlNQzMxsyLqlX2oNZixbXtqJJZq/oHLiCcbGwxmf4SpK6tBubLFj3ZZoLfmxmRziZn +mjdriLjiey0HskggLZ7TXDVFTyEBuVQb5RQoBWbkTBHAIU0DhBSocW+NOqZSax1xKXonBxhPjx38 +EhvB7kBKUztPo6LPLM0dk7LSENe7KzCW3l6jLK1cbL+2ol2xyoXG5I8vtRNjPKReuz/ptlap5EIL +IPAgJhnSD590TrliD+V+7w4RM+4urcRAPkOSQznyuboyr8wAjAddoDuY+p1XM5/S5xH7ypUHqLYQ +cxD6yKazrnpnb+N40CcCixX2foEdaCHtFKoTDN88uq4jxysmkJbYhCPupAJHhaHWFhvl5u71/s8D +p+fRxxKzYJ7SxOs2qcoZU10uoWu9MRfsTqBP5D0xQ1aNhKhXfHaSfS10IiRLm2h144+N+KQ3wd6Q +aDSV/hdLDw6fFPaMLameb9xK/8IW67hob+19LGHMz/psYCw24kkkof4ngT4PnKEnE8Rw83m9GIyL +qhCJx7mQEUoW0x2m1Fmeiy1rCW9HX4ke+gLM8KA0VSH+iQPNLyHmTQFpdk6Ck+L++vKY0CeEHjjt +wjtmMC0spq9YztD1CvIwrriXYdkXLphvcORRtJFFuDdnNU+BIIny9U8wO1WNN0eDwLy0g1NX/7ps +998AgYxTgr7USqh9xPqHMUBL4xqQ6LQ3PDmoLK1Zbx3PgMujb1eB9fsNPAYVAxXr2vmk6zxGgYcX +yeFwFaV5+4sfGeXIAt+EnY+Jo1dIovBpxXLy7avkJKM+GkrLholVjORVZWi5CuCMI9kQl1lLjAcA +K2XLmLmrUEGjn719b8PS0Gy71BsRhztXMRP44YAem5WmW9QsPuuwNfoLiQNgZyct6xqo8PZFAqA7 +leyEgGd8OInR/xMTmH8dAbpbVKGiE5/Da1umE4uZ2i/8zE97Z4HL5jp1oLGumPXdRhPvg2OjYW/q +FyTQV0tUguTmQlUzPhTEfMzqzKWNmRqoqQuSYdLmPVF71t1+gpbeKLNo18p5NgN/UIFORE2vk4Qi +HPcnK0bIJmjQNj3Q+UB5tMuXNXgBtlj7I/xU9XsVkYaSef3zKUIdWgYOhPasGPamM3RWujdEP9aL +Lj6Y6vZ+qBsOyhVmpu/z0MVG5JGAN8gFXTSLLt6xRxs3EwApkkuzulXLEACJ4CX/MFc5cmeC11yC +HuHyRC3pwNVl8EALa+0gjeMa/vCxaDagrLN128ng2OoNw8t4oEz9wXzsMfEITp6KbdlzG3L/cFCr +EJSWaiMVudhKofYMjowlP5YjXLiic+a3i206ckPGTqrFBMUGrr4aOirlY9ccGlzqcn5upMUXr6tf +MKnC8svOmEuNAubSctFC77xmdZbGQ0IMv5AyvmnxLpRYOod8WeNRrdTAe6aVaUKhDYL+8lf2AJga +m699qbBcjqjnSnTrdOL+Yd0AYplg52UKvn2JqdMtioeMOGD/0bXBaJpR/gbSyEH0ik0p7ysaA9En +oG5+47EgIOZu0gT5oB3GhrWza6EDiLdyTwSpFpAl/aGTiEiU85mJ1MM/T5h3ueHhpdpXj0/MtgBL +a/A2OnZlQwY+i33zGwHJIuD7BY1MxQCgcPnNsuLyATlJek13aFAJqiv5z0D00NeU0KLMb2tT9vf8 +4za8kpyOE8jTaaUgEwNvv6TzbUZ5rRfqOf7RMH4gbv7eLgCBzvlDIXa5rkedSNzuNib6MU51kUTp +L7285aGlhiDrqoEVBmuAm6QToTzX2XEsN1xo+eP7QYEaMgs3NJAgDi2UOyCbqF0hDIIHbfib9zDG +tsJUZdv5SFgxfVrQweklZjee/vR5kKvh6xtRv4Bb6pcba9Yz933qZYs36ZKgDrDFltmKcro060fh +n2yj237q6rypzD9MNHuXVYEe2AWyaZfa6i5WX/ihNF2D/7PRGckMKRgVkqAmLJH3R441yV6b0ClJ +IgSR0ll5RzRP0rQiqOheyjYTFMQ8f3QJRsiCHyuVG2Wrxluz3+C8YRqbkJsfL5FCWl/QnP9NgVT3 +WboxNB/R6TQUvk5WW6Xb0rjn9a3XMdgP+7hSrDcLC2kTq7DPbiRU1LAk4yGPwakNGfse1754BvjZ +YkDX3ewSijUk192ArSyrK/llQBUwt/UXn6nodLlqtd5i6873XHtcn/movJJCbTcDeMZ9xlSEpfzS +B5boJDn6abDBF5p1c19i7z2T8vcP/qYsEc1+rPfvr/9cWa2hn3RLeegtdDP3IggtN/kekyKYJ5kp +/V5Srk21Ctg8D2LdV/+ms5VOqulTrM69Q6eu+ADKcbui565aF9vce4Mcyp9hvhHNAMvpcFoUOuRG +uCu7ztTBp44lgfY8J5AEJbED1CDIjIHeJ3D6NLc2890bsilYLzGhRqwR/OIyob/AogDBCt1Iyx/J +1ScPoOc/63Tj4fXEtsdIvcnV0zU5ttgbaMjMyexMVhcBwOHd9pEXfflwKThT7kGocybeqaY2HO5C +9IpKjmfkUCrtQd6qxo67LuQ6/nFDUS0GYpU88jR7J38r4TbUpbUXJcTHhH2Rghuxdob1S/8YGTPY +ogSsyxha8r5I6psFrR4fNtVudqLgUawifcf9GRdw4iGWkyNyQkU/JLaHbzloZ+U8+vCcrB9DtzVd +nFYXNtmiraSjFlo0UHMAeOmVKebqtXR0MemDjZYiv0E77NcFRwtxNRA8/C/cUP4n9liaeHiSyDy2 +xauItScxrwTSEjrd9sBhjgrz5dfMOQG4PBUPOF8xC9nQXtykyI4l9Mu+zTZaRUK4470GEAuxqqcO +oRVMlcmufusHBKQlH6SMU2j7xz969Uv0KNHXHn7QpQcM5lxF+g4xRV5CgdMddAhTxEXHq5VHbtrC +AagyaokFHmkqRj8j6o9e5zii7Ay+cXNOdZuCo2hYb4XcuUbpM6TTOULBdR9Z899FRgxKzGhlfCFS +3MfySTVJEbSXHbUlD/daZ0CXLZ6qlvk943luq5I903ZVel7r1WDTeaqbUbuS25owQYty+ffnExk+ +bBs4885eT5QD5phpR4Sn57nxOVAD9i0SXfrR2/Xp7a+EMK6z4lBOvaCsFJvd6zjYqsBfH1dX/Dos +VD9AeNa76rtEE3Ys0v7hmYAA6cwxJT63R2a8svCMkA6gARQXfvuzIhGoWyd2kGROagHBCl4OBiiG +P0+2RefzGhuGIDYyRWpnOEag5t8Ly+URo3xpK4FlwTYHwZkLhLHzNkvjXYLJwWtozMoLQB4Sscz8 +qs3qWQbtbJtH8P2F8BvRWCn9IBIRKBdKstnJSXLL3Rhqnj5sIAFSfPhaAaAEyjjRjJWpaEoNkbCH +Qa8c5aEX8EY5IyrF5jFiDLXSzDV7GTtHCxn7z4lyI1GUGWtUlEy71nCPyO8yXYkHDV6JA7/O+hU5 +diapSV8UnbJawaBcevMtFgGuEiRcAitR+olL5lXM6FmCpC3NjWOLBamLGz7nn2Vpf82zhJU5JclJ +Lxpob/RgUDmJjCPtTdVGFNsXo80/iuBUF1hSe1yQpj3XF8DO9I2NAWxac4+I0U6Loppdqv9KykzY +4FEmdG3S3emb01SZNBqJZQgWxZsAHj6dUDlFeBtqjPSNkmtT7REzIFhoEGHnmkTXe37Hacl8ecsW +QbUKxlJtim7qkOsfF92RKbvoQrmuUru4jaSBNwIbZTQAQ7Wsnn2En0DHqF3s6L6fTQAA9sZ+eB+J +ZoB3Snsfu9yO0XyA5qF4OT3xxLSpDDL5NTmzzTCqXjjMLSede6nHYI7PNJnQbVt0zn624+TWZb/v +YD/UhHc19yAie60wH3U5LCTf8UDfdjAIdHBJyDhzGQmETzeyGHZvihJKQEEWC82LeajKHvX9lLOQ +gRMNUKYtyoZYJx9gCxCSp023OIQ0aht9i/uXt4cGAFdtO7y1NOO0MCZAenoxOgK3m2/l67P9q/68 +VKkU2DnBNO5j2TSWwhPSk0EXoJ6qzeU2JSvgPcnFOi6Ua91pSDJE84nuhg/XHcKOVPc7V9neReyX +LK6xSATp0KAwfmAh0om//6tZu9Lw+4bLQyUqOoKANaCdRnV5u5FY4imjVBuQHdtRjiAGaNXZNUfG +v1I0HU+IhU4JjC1SUx0+7VmoStWlhbxUFWbKJkFZBTpWys9R2VBTcT0pTvWU2d0npeeQ8r3rEbJ8 +SrCgd+piqtj1nU1ieYydK/g8QjuKQGpt0CSah+gt1VgjNV94NKviri9bO3K39lY/uOCa0Gymz10M +167nAuF3g/WLEFvvxhxq1JY575SkFsslIEYfUN43ahpGnkvn9xcKu2yZmAPMaAKF0QZa8QeEIgCo +lCio4sd1DmL9cVR1jc7Zp4dCeID+WlByNFFaJIwOzzdf6o7aUcfg+F/AGPuMAeO4QJ1J2Sda6fN0 +qHETrmlZwA+QD6P+5QktJSCCHcuGAnd9OeTxlSmqJvWIfKjSc9T4FrHK7HEf9fbjCb90O0vU/zV1 +Jg42ujgPBAYLw0EdA0C9pPRqrQ9KLP4rt4Vh8hIrpDq+670hGqowSYb+nhBnfaojrJT2qPIDNkMp +caFNDbeqcnTYUwmAwKxBVx5zCXg4lng5RKtahm0OYcdcFnO04uKkCyxhzZgAhi8wC67ARIYwSFnO +EKAJmFWNOIIvCZ3zwCvd35YLdImqYZVGYu9+9iDwQvCzMdHbkLXJerUvGM/hdag1jUNDrxXBL59p +CLUu0+0uCsQtniDCnWRP/88cHBtsD2acifTxNsv6pxuIkogfsjMcgrHnTePNkxuQbajx4uXjmP/r +zz58yWTQWy68do8GZJePZpPdf4aFmI3nTPtxCvWWCQB4zTK3F9YhpOT7aYDQ9w5ZBmmFaVI8ldFh +s1m4hfB17IooPn24Uj322NKKL0plhZA4bp95wb6J7q8nx+4LuA3tZXen/Y6MzoY/wRKFALanL5Nd +87GRHzUWYYvyfX/WhL+djnZz4A7okQI+m0tp0oJRBFWvkUUceOWj6nI6DdOhdfu+nmij+gC9Alvi +ihUQmwWNeILeGO3CLE17Ib69i/KMnzI31JPLeCiHJ4BazZ6iYlFyU2gDFnwxqtWP7wakqpqC6pMc +1sE4/NDgnZ5RJ3I3dpjK1LK1fak0P/me9OTT5LPydMlesszle8dTSWqEyU604Gdr4bvCToJRkRSH +78tSDkV+op9anaaqEKCPbp4HGin4Ook0ZEbSHApx3+5FXS5VuWj8vW5ngR4JgJRGzx7bn2Y3+q+h +AnVajLY1/2L5sZk2AFP18mwMvkb3+0ji6oQ44ejvdf9p8n2hYEteHO1/ZPMXRu1qoan/Jd64dCYA +nLtOPXzsPEyY4I2OgaDGF1UulX3sys2sOpTKQumyLLckooctk0ceJG8rOliG/eLot1Iv9S3l7YgP +jvf8n7Ya0EDAI+4y0H3q8rjskeJFxa41+tZMaAGKfEg9D0g3uvHt3I9zDRlaT1FwJ8QdCb1dJHED +xRNxHg435/jlfTLBowfj3dDanmfIdik5UTNQsQ7XZ78Z1uzQ5G8rA3VCoVZf/Jyuo1I+AKquwhtO +HtUnciJwTuNQklKOHB916LvJ40DigVaQS6fayliGgcaCG3m9n5tFQrU/Tu5AIrOpUdpb86Wycy2t +2BI4977YWDbXN6biW2BTQslwQKCqo5m5BZ2htD85iQ0D5xx5OmtUpoTB7ACPcQyd33/xLtf0I1QE +rwn5mWfo/YOcLbYts91JQrSCvZuoVpYNpkyA0oOWmrfJDiR/dsHaWT8zsGboYToNu0NCOClo+naD +wbTWTsnRIQ7KkDBDjm5tg3Gm+qHgee3g8JLdm+64dE1gp0CPFCPb79EWjzLDWhw1PsL5skCGzWp3 +eeu/mjja/AB1bqpjCG5pMA2x5QPKWKQkF44xZfaJZqOAI50GalGb0kEKxzYyAbxwoZfpwXdfSOpz +eLFN7ksLC11scI/enhdbKrkx7wxyFygKz6zD8V+HneX9P5vO+2kXTioNbTxu5xdSLc2SD+z5ZN+Z +ZxOceMeBHtNLdOWTys5pRjfKBiNoVC4W5xpCud6FtNK5IspEyRykR8XYjBTBfA8OtQIcAOB3KhZ6 +tzj0v5JI5lMEhXX7UIbeS5JBCBqtFhB6/rLY5kBC9cT/imY4LtxaY9yGI/q71FguBfHwvygqMoMW +PwMA+WLmcdIIukvlPmwJwKc3o7iBptRr3QCh1rDO8rgpcrl/mtPd1kkLpFBdTRYvRtvGpaVF0Ax8 +WqzL664UTZKAjJxSBshOD+kXtfcFUd9cXkGFPoRR22g58BtDIuBKKToSnr5SUXuXCmdhHjR9npQL +cLbr3LHqVrbjB9Np6a1DEQ8QVFgR82KldLM78+npVqqaR6A4wC6YpUn/YwPoOrSARj6nX7CUgB6T +xAj8hvJMH1mud4+Hai+O66VqR5lWJnyGw5YTaXKQk9Z4IOq9M4kSFvFZZGJmGu7bAqGdEmXw+Uju +C20GSeAKmWvFSwfY4qqLuGzTJ2iFtFjPHSoLoX6LFw95weVNUvivtD24T6huSsn50kNZr40jKUQ8 +HbxKXgkAmjrcyqY3tLWA+e7U+r31+VE6aR/VqGHf9nAQMr+YXT+EpKSWarU3QNOGlkd1riPMsRNA +vuzw7cNwXthXRp2xRxa1+rE2rOXFcVopoaBc1p6Bi2DQNBhGaXnGcQdnu00l91kLYyrzNl1qI3Fi +s0MtwrkS0kqqTeJjxiNZfZ2IZ/lp/lQ+5k/p5YSAHm1DhPyHSDB8AmSwxyKXRWsb3qEeceY5en+H +qPm5nCTzvv2xDzPpJJ5JttoAy5RNdEqG7MADVd08gWIINI/fTsS6pB+aWWwXBLkPicFVqgzR1YO4 +dk2ahntflkvGTd4GYWXyr2Lydqy1lKlQHi74WqLNz9QCJ1oSu/18G6btq/qPRN6v2YHEjJtEWspR +YlMVPW1fEsnjS3dIi0BPYZSHeJUgEpUfwAs7lgFcTmjPpnbZbxjRAoTVZ9hgnxdM/mUOk1SIQGqF +WBpHw0runocxSe4K+2ZmAxCWuuU65PLaqDZBmsYZ5XpuouqGHhYyQcNB10kA40R+N3sxj1rO4aQG +X8joHTW9Y250KdFuJmIJDRND36K3BY/OUjUF3qmV7ed88gBUylDbAE/NHF6qrEyDqAcayXFpkWpb +FJixwSB424xPn379UEQUjhPGwNdeUQFu8m6MWhqfQqeCHyFSbcQXnT/+3x9MjVFl+dTE1vssfZMf +K5CYSZxhb1XfZF5Fl8tDG+Lbxk/azmlzY1Tk0ltKfhzpG6IPIvgXOu/zNzDl1nW6mKM4LZOk46F4 +Or86XZ0qjwRWu9yjkVBiQ8E9alo4nBQiYLM8v19znK5ufEbNgDIANnrZUemETBSqx3bcUk+JAI6b +AuofYRSKRZ7KkZ5POAEw0YZm80VSVGAnMNHg9lqhzKJjxxT/cHMIly+LNHewNihXVcaQ22vVnt7y +HaPb853OcksYMQez2mXur7GwRozFGdhqMdOG8jT6sOjHYfi8M/1Hpiu7hf1KFc906bPj6vKGiix3 +w7naE9uurd0qAcGlDG6YPKkVYDnvWg10yoZ8hOTL099EF9BfOQBg3GDf/ijY2FCUOFjDxaLnrIm6 +rRQQtBBumnmM/7Kj2FWh/mFlbXKRb39mzPKBXH+yrZY5IKVi8Tc240HWud0TIQkc6l/JJ8SGahcE +hEWZfu6E0wI10l/lakNFFu/FBBPCrJ+tBQ1nZqmOK0modccUa1KttSW+CpHOnHkBMu+qk5nzEHce +uZyecNa5bHEH24jujNtg5ryuwx5t5AmwyE/8ccZD/33x90AMPQPnJljVUkiriDv2rFZWcPiM+xBV +8mcxmzDiL8twyNJO4MEXtIpXiT9b2jJg4+9kf4QkajrCR2O8PfbOINL/BN9+nc2KVep/Sbl6/pRr +nL5h/SxqhN4m9URyCSfJmq3ueMTE3EGdz60WYxEu7mhJK4ZJqjyEvHZSLedXOxc91hkRlpRazV94 +N5CIfFdx9Q8Elgs57XBTFFvb6KCMBElWkE5aQ/6zwhmZy+kc1HTqrpNyagajrGLt3T0TkkfrtRyQ +eB7OsHkKwUb1kJ6m3QGa1b1l7pkhTmx5fuZMeXymzJdHn1/5hkiuP2d9eA/t68Zb6EnCbscVOr4H +1rsEadq9SqpgU7Xh/AxkVeQXdVCS3XVNyiybjf7XZ0xAtzxOlRNosziltekaC0IEbyFVYo6r7iqc +xx4sbpZ23FvdboC1gzmpRK2LLC+zuC980IDUy2ZYdTjHTMfYpa8vuN5SVmObKyudQgxqZz7mjMS3 +1qdkdHH0jBalOrAULOlEUnmCckSJdUtYikXf7nZpNr5O9iAzNipIUTkOfg26jqxk8G1DlQF29PLO +VgshNpGqHHwMmuuzwPVQoVbv13BU+iE1M7Azaeh6zu2P9WCR+CUDCVK1gQ9k/veh1nC0jM0jx9Bf +oyWGlERxrgxjkUBV0Y6cxy/CetRNYjoGy+LfE3KXx42yI2JTw9PQt3Nnid0jCgJV7PbpHbN+POL9 +QDiP/ow9MC9S22GcuXHajsHSf6Vn2dVhJm3gCflW87Zz/v3EkQGMLwo1WAggqasN/pEZEfjP1oTi +pd0uw6XqZyPsfcIgKwxgVVPWFeqEfa+tQKhCV41gb+26rvhskJ2QHoh23N3fgW09sMzzFC1IDYdd +TGT3FHz90A0GF+tAqhtvxx6IFHXyho+Lk5XAfeDM/GvvnRJVL6ugRgwEFAwjwiZVym8udC2X3hL6 +jbjhmcCKEw5qtzDi4dz0Hr4yweZd4o+8JninSLIaUQP8cnfYj9E3f5/srntzyksa4+0lFHqoBqSn +sUtYIbMvuLoE3qURqloGcm7zDNfrP3LZb7m3rno/B6nNkDnxemKaaF5dASQEQUTbR+k3BN2pYvqd +BsI0iwo07xaJsR7DlaJ3tIQdijUNP/7syDNscPCe1P8RjrQITpKfUURwo95ewkSLfdOC1cF4lq7C +XXAxDobZoeYg3Qcom5Jv1AI3blBr0dtszxap2C+xYF4OkewrQPavvV6EfoP04+tZ/EC5UcQJn5q8 +zHMM26w58J1nakwrhN26AWh7ry82fh6N56UOvp69BP+9674TgfVA0C+M6FDecJoh/s2Z+jJj0Gfo +lHEKzO+vtttObzJRj5gaxpuaxud2SxL/0fcuTpdjDMbrJxWRKVa+67dGOePwfOq0X+kwgHrJc8CK +jjiGT5H3hq8dgvKvWT79AMOcVK82iG8Rk4x3ct+qRDtA3ZGpJTlZuojMBr2nKzBqtQL/ttm7r1wp +vqV7UrB13d+6uDp3XXgRLMQQOj1rrLDf8w554GT+M8d341PRGS1uD9b/Qu3nHn3pvZVG5YoZZXwM +F4SN3ep9FuQvR+XDgyAxkwU1cWklz3XQ4XCnr1Hj5na/IzopQzl9i+y8seRxNVSPfKUe8QPhtulU +Wslx4ayZu+0YSybQ08TIsXz2KgB9Hf/Zh77aHAx9Gm4zYp/591teFtgE/iicpIMCqNgdafvV7vaV +RE1dXI6o7y1iSwaFwSaFxogsQcPNm4GmiIqYSLRvTF2FvLXNnwLXW/To6/gZK22+I9LCxWGwlqh/ +8uxj9/3iupDm4TxrIuocypNh1OQZSE6QzzqWwZkhzvqj9T6ejdQT0M/4MQ//YyGMtFsJ4ISWzb0K +Z98g6vrwwINf23Wet6Ffoju8FBWYve8eUJzqofdfg5zE0Etn4aTG1wQ1nqcf4j9YoEIbtpHgh2En +sBYPcFtLlexW7mW2qVXD2BFBqWh26fz7ZFKxNhQ0p1IuSol5XK28vxwlVF+8768Fsr2Av371atB1 +C01Lp6stKcpa2WBfEMFZePvx5dclWGnoqtnznAit1H9L+pFaSdv5BYAXOHklvPgCCkWFQo3PQJw8 +/0iABEfpkoNG8LKfjmMVsk7I0wiTKdz4nEhj7OrFGK6VyJ1mDDG0thgTvQiTQksNC5HokgMDRMC9 +xNDLacFjE3osJRzD9KlzEypWwxkJ0en8nQzPvumecTZCUbWs4Yt9Za/8sya/WsdzveSRKlrAwPew +YFcg4hKQhzXuW6uNZ8WDuq5w5l0rPcyIE+Aszh7KnJqh07rLxMeFzP0CkZ5iYUCoKIsQezSbZRGA +0wmV+0KNg+IFoi3gijEPw9xSmIPMwWYvkzZxP9iIFNESzMm7WivrG7Qz3eGZE5xYV3xV0fjn0Csi +miLBX2XCXfavmT7RCmK4xI23DcHujfizbE6bv9c5/KWR9CzaNSetOGfeFenKz4LuW31/nuUi+mc1 +mZCXhT6muRk/b83lwc4+jwYKUm8GUN8hhulS3bS3gFFx5CRqalfIg8t7ZdypoqJmYs5oBN/sniN/ +Vl6vkhFd3LOxWytEFBPzfC/t7G0/MQ0Vn8q6qBpk8sKbaxSqTQ65LI0rNDdClhaaJMW6vg8HGgOg ++XwjsnRioxovigkZNyfNcWg6tNxqaRsViBbEeRXnL+3eCELdZsvfnwvy9HKW9i5lpgI+3cICsg8E +18Qbcu126LAnTvpUCiOOUY1JqsPjaZd94rz9csOdViD0NJ4SfQvt4zFGv+QkjP/LDGZGThpZk+rZ +78uhwZu3qx8wMnJOescnyIx1hZOgAcfpdI8O48t8kCfEi4tvnfMRUMl2iqesRccfvfIOcZGdc/LS +nvJh2kkrH2XVpNgh/RC9ImfCnqYlbBtGvQVnLtsAulNGwstBM4P3gxOfOoalKn89yhQ+zcvBjmxn +YvZbyLx998kM+YV/AUCMKWz+LajfLK/g7FZXwy8Hgjvzg7qIQT4CKRvy0EdYomQqQdFxR7gKNGlA +m1SVQy4wWlxkd1JZDadCXTKTto+WyBuNBbSn159i0NdOTA9sySl1jLDuFUsB3jK8de/4jkqeyQLE +utgHSRGGZ30W3+FdmItOwIvo0ne/gDrt91UZ40HLVD3D/0+9zwXey8pyiJf3lhk3oBlhDr0gWt54 +JvtA4nM8Aettt76EhA1m3zacjXOBPrbfZDXbDza1BAvvTxeHwgdREhu857Q1iRl1GBJwX/Spqwzy +jtsFR4MZo5t9ruwsyYBOkxqO2hWCA+ffNaGopsALx2z1pFTnpzNw9pXU0yvECzhwC9Vvf++XCkMh +yWoTdy8MZ6uPWkR3ugZMcR5u/nN09DqxoTHm20voyGWZ6T2zhPzWWZRBj61hFWVcZyl7uRpQNgZs +KqRNY0WgpLAgot6yJnICr+4u6KBym4DPCKhs9vqjl1CWkwzqwuHXFgfOif2s57OXTTd85MZoI1+L +dc5hznffMXRPukHJ8kwaJy/ke7I9xSgsQew7KvIZ3glEzI23nI2rMCkg0o3RwU1ZhkPn0VVNVM/v +k09KMQ7DxzzNecNf5I2Cy9S0LzBcVHYSSO4cWAD4P3vgQcj80hLNEAPbnvglNrKKpM8HyzUMaZwO +7g6WSvw0Tv6BTPgXFeK5b29KO/vx5OmqESEptIIG4BSOBkjzPM5vbuGA+7J57mywEOYtzwX2JRH0 +D9OTtiA6TiQlTpEHAzeaZmqarSerLpssDm4ZQYQTFbGYZEnzRnZ+aPnhxS59atPDLV+J0m+7D2G4 +OCSjOx+xgAP7J6REfXG+Lo6L8T9HCrD3/zFz1Hv9DBjp8Ii3fuwT7/ISg1ul99YCGygOt3KFN34a +7NZ8a+2rkhVqjnSaGRtEBVnK0RCTndd1fo+bV0y4/wADtoUyohllmBDZ3PqB8vV2HgqQVEJS2WvE +sRyKX2GJJECK4f0Ynsk5OGjqJNd9sDHLjl66wHmUaAoQNjPDelIcnYBHdQuXanIGaEH+qqzhiIBG +fah77EDBbTQfmvz/UMaZtTSi7Af0ALiicW0MO4VyBcmubl1H2qrLkAXOoq1YM+r8uCfRIleSLbyX +bRg71GMXAG7c+owIP2D8jQ8vMUvwDeYG57WbaefOuCDUTnRPtAbTfOQ7dNdPVY5NTkh5uZBko1fu +kBOqw7iKwe0ncb+T0R3z0sTZ6q2+FTsbhYRvXaAnt02NaDV2oboVj+S/anCo807EeS0FAsHd/WPB +UP2m5dWjm4YFEitJ55kv8VT6CcyJ/2zvImU+hpTiGT79XhI4DCxlnpWJ7ovgwd0XP+Gy/baWUgE3 +/OclLqErfpJfHZMhJWJW8RP/axaMPtIxTlbH+P81eLxCM8T1QZIdvdlO6ZxCDtbE/s6oMmlfbrKC +OdE/9XvyvXfsfTYP3QAv3GegVeOCeCCA5b+t5/jB3MeaVzQAc7aDqTrNXV9yuvJTlC/lRI6UCgjK +5CNrc4Q8Ks8L84+gD2jAYETEh86oSKbFl9eg1UF5YzYIV0p0mza0+c0gveOQssmDxf+U9b6ghy8G +psgWwdAgqUJfXh7b+4iTfJ5eO0JGEdxRQ4TJ9pv0GF6lM0FrgC0jWsvSyOiqfyl1+FI+tu6DUFl8 +8E5TeLomqcEeSxDVz2LLDX+3ln9UFBvPfEaFxlKvrtHNBwLKzdjPEtCsivnhHF/5hZpu0kBiBtD7 +CbBEebQ08LySNBCyhnKQZmY6GUD1esY3kBb7m3dhPUHz5fbEh3I+gM8hjXokXFpqJFz0AkPaB7Po +SVFVNI53BUPC3CGLjMHMvF3nQ6o/rmDIUuBnIr81mYXLY9e3QNYa6IklkyQe035jrF7OGPwbgEmH +4zTP8fUe6BbTHRbWheQ1bTjZVM6TVvgLaJQjd3U7a1TEevt+dClZqrCct0q0MzN6wy1/yvFC8NSf +ZhF1XHSG6BT6yYtEvwl0vsHZAfKOq1bXd633Vi+0FIzZEa2j09V1kOGHJ2wcKBnlbY+j3gQQQU/V +07e1/0LQPjr5J/kgrDt2ez/Fd9qiseLEm/8TuIYz/e0TyXi02k6nTbjYM0EpSFNa14PEQrd0NJ+t +0+/b2LXLEqYKMqysS09vxbsNl0zzBlINw4njt3/AR1oGdusVMqEqbcFzDVNQhTAvcFWoEbblWd6r +jhWJXXbJkRV+rm4ykPfvLB7pSPFqRLP1+frN/vbNPd0omOSIqZn2YBiV08x4KEWPBxtZJAXqQZT0 +4LzZaBSkCwiCyBTQU8XuxQ+gVUadAg8FQhF0fRaZI8VcQPq7NfmOWBXfYBCF3DkQLZsJZhaonA3Z +hKE+q+l2+aYjNW20qzriB72DeUGQOcNTaNO+X47o54J3LzZwzOuBKTxsbo3cBwWodHCc3k5VKUNA +sDraCDoXDCG4FakWdhrmPwUSKHMQN4pmsgtWfvQrUUvQuNFO2LLCcXphlszLAJWweD3r9gv/RJn8 +NfvlnpBKAmec/CatV1S5QJ6cBxp5/39mvGFjvLlPZCcZLMr5ItXaKbql5iBpRaq8s9SsMEawm/vT +IxuwEFnarq6vJstMszO2MUiWlwf0A+I2lbWmFAPBYjLqAwTKWcnfwrPN0H1Tu+JGPTxzHeou6nq3 +Dyc9FfbBZU0iva0of/AuB6nA6o/jrW11IqtMJrAmdm5acsSym5h2pOpRVF0eQIBzRuzm24it4dXD +fbpIOdbCAq//0b24cj6pBTG3HSpyUtND4Sl4vJguwRYM5tifBh5UPQVdYrHlKdJmiP1L9S+PENFC +AvcydGv3JHblXufFocKOGn6VXpXM7iDBsB2MGAct5lhbJTns3h5n+A6oeNGx5YmVPRTvNXQdoppp +amFXSJSO+EB/14EtHjcl7425xg/nCUoYL0JCTM7lcMj+nrYyPKjD6f3H78uUbdG+GQpNuPqFgg2j +KvlXFksfTDxLVBj93TPVhwWCN4n76yCaPQ1jMpxs+i5XhLkDZqhQJVU0WxIv5g3ZWama18suOdpm +Y8HHOhhej5svfebDsRT9kFlcGNcSL8bweFCMFBqz2QHnhKoX3dJ+lQTHoUMPCJ5m1g4k7/H9qw29 +zjLBWDFwjp9AJdKm3ojmvMtNoYnUNxnpqr9Orcpi5x3VwRiQVeDtsBGZ9Yt4P9kjTkDeg3gi0sjT +jc4e2qCvSwS6HJMkQ3/Z73lQfLSSreGbCmRzxcmEvB6RnsFi/E5p5ZY7vxK2eaOp94RlWdGWKIVD +bioEVMkx+FHI/gE5QdRSjz+WL1Ip5hlf7j/xyX9h7N0G75Tu6THLq/KapXWLXrAijYvRgmXIEjc1 +clGSvEByt1gTfOrL8hH5xntjuc5oSilKaeZ17ftb2s4K9YaeMgo/dAWbsra3Duaw6EOrtl9EPaN9 +S93TEgbXiXoEeRVG7vPRr9RLXz1kkVR1gh8xVo51ujGzgcRT0aTgyGi4rEPukGp1uEARKiT/Ommw +trwSuyt6fD5RceTdsNLmOqIv82dkmfP1Ah09N7BNpW/7CtkYvB8hrKTuLPZ3gKU9azgfNaOZ/jiC +XEwB4sSZvLpPwkRdLJr6YouKoSiNswuTWvwjk6ToHFdMsq4dZq8dtrOePEQeedRTU5RcOAeMtscY +POH707HlieFDy6uLE+Hxpo7IbnDw+izunHsS4284/6VBo+x64OrACB9aI32hMdcbOaCgO1awmB8Y +R6kioG6yHMn/Zha6lXcOli9ms+Zr14prqb51ZLM3K8a5pjKeY/5PFXIe0VU0yOymkFAVroyq+m+Q +Oub4DX83k5UOPMFE8dzFfaFto95YVaDiCC2sRhkvYYugvAhpknbzaVXpTK9/URMtmDBSc8KhpDms +5fHhE0BmEt2TdoLqJmRgvTZntSpBRo/YnSZrzAycse1xyOm9b1gHnIpauuHSd50zaGAz/4vRJOE6 +cIgxBUovrphXZgLJa2I/pn4tUfU0wW1NiJmBsghLKQPCOBdQj4ACPLptH7MpKd9mdNcRl/eb1GTq +7i2OZYoVdpHo66gVFyW0f3Hej7KOIDnfUKT4dOfr2KBqZo2Jj7ovtpIYeUZxkIgUTsy/bPimcNwW +p0y2xriXumCzpwLpV5k1r8ns0+acSSnzLPWQpdg1p3twotOiEXAHxOd9JqFJ3OyPq4puqPQ12JO7 +VwzaBcN1iVhGyswVv9vvhy2K81iDri4pKLzFKeADXo7T0Sw85/OJvFgE93aX+OeI0pIoUfwIv9+G +MpjP4nS2N9oQkFXsHI27/aOz4VGH84Hj89ShFOk6jMRvyzlglqF+vi0HMF++1Y5Ts1IsqZnB2MpO +jDV+LDCiCUOVJBdBoXjwaBCeIjShyWKwlOYj8AGmFDTOSOCm58lx8Y2lfjgrtEfEFd/ZlbJXOuZs +/HFNWY8+u3N8pWHnKqSHnErmsjdmFdzv3vgcCGdAVFyZaoNuPbj2DNO8st/pMuSAsyi4gzMJ4/jq +ShzalaqTLbWEvWi287wQGjLYNsKYt036LkNUgY7/2mpsfMzAsvvZ5XtDtTlK2LvjyOa81gFEXlRw +jTorqsstDsvlh3Ncve5wUDAC4nwOvXx9mSf0WnEm6tyAYHIXlXAoR/l3jzibFQHC824Z4AubadgQ +R6CguI9URvVb+ni3cclk9kQQc1bvPeVZYHFQGxc7b8I6vG4nEEaj0m6/DZJDkcKqg/ztHdN+ep02 +MqS84I69dxCyTcY2+8u31LqHnmEjadmTfTZDa509lzj1bvtghbBKe31/65dUIWTtfqvaqt+hZWyf +o4ZDIr+zscXkYVoI4U0LOf/xYh4+P3YU0yLNPEz8PXOsFKVQqme2zFXC2OSj1AXqJtmvLiRwUnrz ++7e8YY021ygKNSSsbcmT2bVxqf9IKut97OTaiE4wpfhlqaG/+EroT9DmnkpM4KP3AgDL/WQGIn5v +i2atW/ML8VkHC5jQPHai7u8BzbN8ok4xWOlMXeRocCg/wXF34XWObIuOWx2eRzwzzEUYUO6lVHzz +6s/yrEJ7JTi81NRELzZIEvVshcRWmnWXaqIi9HGQEkd6074KM2FrpiBc0d+nLFPxRx4jvFN64IsD +m19jD4Fxa0WpAvNGMTXcfVFL5pcpsDoffxkDmUGnn/4mw235kDFYley0hnUhbqXeYqBxgvASME/z +9lvyQNgX73tyNTQ+X0Y6uomqe6lqiuDhzbCzUCupcUpAYu9IZB1tPaMcTD4Mf474mpnELzJjTCH8 +GAQLTq+9GzLrC6AplDe4nDkDMNiIUfndlirJfTeJ9q5PRwnMa4XltFy0qrxwrGH4J2tWUt8JdT9c +HxmLREK+IdfBmlFd1FCVWYmqKOiyzziK3XwXwPpeRH7D7pQdRMmFhe2sSaE2AI21YmbKlMuM7Nd8 +gFMfAnOGVzACgTgnk/p1Ib+ORRJ56iNDAL0TqewS/fvsMfOkELnyAYI3EXxrVig0nFnNGI3twvHI +h00IJ3BzhHB9EZHNzE9QnUsM71oRi8tx+SO+SYOduXko390d6Y7F2OdvYICSePN2DLBy4xMkLtwn +9EpL7vshSojgoFW8VkObpT9JjVNJDUrwTxv60PI/n2/IUMd2PaFccZje21MQhF2EEwDv0kVzfdGW +uHf79plb4S4DlHsbdlbWo+FCwVtp0/slGWOE0lB6N3jSPj9nUox8qSvyt4nfml/hubU7W60NhMic +mFp9g1Rg99Pvd9Kk6p4UvbCE5GfjkGqp0jp4SvvykNDHxQIDbg3+s2TPPeMbM/GP9mP0qLBbuDm4 +CjdO9X3MFyCZze+NN7kszA9u0v69op8AI8Wt67OUvGRGEULLclaj6xm2eisEcZzh++unhhWjlHdL +eFZt9BOqYG7QR3jcgkQhVGdNQwfb99gS4QsDrna4kebIadAe/dfBmjiLXCry0eEcp0Eblc1GFErq +WxBRZHvCkNg6bYFN7hpImKrJbNXma6leOF9GGws3kc+eFd4SMy1pkhWHPTymWuQYidkMqaj3XFO0 +bU36Dv/C3dWmJVHMeSIERCFuGJ8EXxjuMZqcWl1fo1Xzta2j7nLHoJ7Jk0DfzfkmAJOdq2dud9UM +ZJcdkrebZVaE8RFBdyFHuXpfz2yLS3DoPg8cSoBXPGQZ8duf3K7uhcQPjjdycFT6Ws/GtpR/N+Z8 +R7tnf/MnVgo+wc8tdB1Mb23yyU8HWKkgMS96ezNVrgxorC1wWjgqMFR0E/SfVkgNIvrrQPme66ki +e+SghegDVyuvaJflWLTSRKTIB5d9s3r48kOr2GlCOpOQJLgjjZrrlIgxBPe5DO+kVbZiAVxuV+8q +3AKzkxs8vqS102qEircvCyV6WEsrsZ7XwNimzIlzMsEUErLTW+GX99kdhwdskXFlSAULnLcmqHTR +oTiV++rM8503SwwZ3OjrgyNExn5TIB0dnLUmzBxP8BnvjvGujnr1XXZLjUBJC4L8a3dZf0bSRgWO +vpHAOxRKb0CwgqFkB2whypNDwr4UPeo1PxmtyGj0T2Ra696Mr6IrnrflXGxy1d4DKN99eDHjh2Xq +hKq5zRBPwRqxD7xsLTcMIFSYrV1DPdzcbQqrM4e8aBLlzrq3UhYMnI//GNmbRyYuP5X0AOOfaqTA +Ve7Z66iW1U4gxuW4tma+rsXxaR+kiU1s3K2IfUbzwxGoEozqik4EBYivbj/UAXkgijZHUUv4fjs4 +PAz/OyMI8dIAuOnDcg24p0K2gR1D91HCfgBIc/3DuDHqsAYxvXDMgT+o/L0TOBdVTHNlEqiXWWZZ +dFPoSC0H+oj8KKkfRdJWKkAJHhztvtv5EPjRPrUEiY4rfWQuF2LfACi/5NvliCMfkmRUhByr6X9Z +P3Ux6MbV+Lr0egN0ftXjt8nrsFELR1AFl+pN3qKMCZkuyhw8Zvy03/9Yyo6nt+7/l+NMh1s1lTCb +BSPi4/7y0YFj2/n0EddQirbcOio0ZeJyyPYPbeHp9FhN5aDdXS1RZCKynnX27/P/8T/bFbQzsMcp +W+tZCSB6lCsTtx49ROWJ51wkzzNVRTbEhbQSGQxbnKQRHbRINMa4Y2I+SDCkXL9OMCO1qkbAGECn +Pp7apT0gA9gy4lyZCe5GQsTBnziG553YUsLvHyTwLrD4C8KMExprnbvJonX050cWDWGnHcpDaU6O +NssTdBx49YHjXwIQjhvjAWdzNIIzhE80ou8FxRiZIV76D/N4eapTYfi6DxtcCZgdSZEgdlEP1Q7B +zf72IVkFOZZ569jBwjfIuUDVZhRqxXM6ZGxtxljAHkCummsjkDZT1wHLou+kOGQ8tnaMX8Kx+c// +lVe8cdB9fzROv659Kpq0M59q68SJ+bVDhbLLDg27YtmYJpHrp7+mujkYNLw62RxjHCfah3EnlFGc +I6nD0JQQT875WwO7M6loLFE8XzlgtkR8+ISH1f+J7T87xkDedoqYv2nE6QD8A7K7aCqLaBLKcVC7 +Xjtr3VtLC/y5gPDlYG4F6C7N9d3g9eFFahJgAiJCOLYQ1Dmj/ZJIfZR4bnRNaSz21ZW64go9krmo +oOKqSupDS4g4W4n0Gk7tFH661virNdQjXurj2rKEfPdJmauUeLyWt/IaAPsr1dFyte6GzQqWbV3o +XaqcNYElZu43bzoBCQNCo+BU1mFo5au9POCDqxKeUqWg9sRlCa9os5O9COk5JxBaU/olTWhXCSnS +iG7IcRBv7nTInOilvrMudV3VnnR4rBL4SW9dmyWYHI4U1ySMpPdESNy0wYCxKqEkGsTmj/Nl4h7C +SD/QwQ2WQ/rLaoeSvMDsUjMYlPSkpz/4T/G3I+RwEiVXbHnHHca+qSDyRL7FwrdfAfYptO5bhlTJ +nV8Nu2Nf/NeMF93z6VcuBJQv+5roAB+eWrB/ISvCOh07+esSTa2Iy2wTKYSrw+0rHEg8PNgiviwn +1bq+hg7PAVeCJt8aSrcuzV+c4sF1qk8Pri3MlPgIyYbWvTXLFq04savnKt29ykMQvJguyaa95lWy +4W+1yqdBRVe8vgu/Od2gIQS56fkkeh7OO2I7enUsfv60ARnFqkoOEIDkYeHe+79YzaHaXqElBeFa +h4cnS4048R+KwdaXk1fxDLE5CwYmvESfYzvxz370MK/FcWpr4lotgopyK1ZfqeX4eKVoqSx7l2qL +YWEjccdcGeMhAPRPcAjmwkbZhfGEPHVmWLTqvwFrXfIW94daJC57MYKbXKrr83MwKifRAa9U+7i/ +aDiBbCM0cJXqNZQHztgDOLxW18agcviHid/72jwNlWo2YIsEUDNMMZD/leui4TFFMVOwVadNJ931 +aRAuPo8sIueZcopZHaVHTr+gE1H2yI7ufWRpuWsphBqLlVXLRSlkY2Eyq2snwe6uPpSeUnCKRVIi +GRTinoEyHWrw/+5HXP7P0lsBV1t3Q2yNSCfwnFWvZooFHkDmvrSoJO5qSJlRtB+K59T2geiH2TlJ +0T+Av03BdaFEvx2P35vOKgLNR4Ndh9av0bF87qp6LzElgS2pxbZ8qB59rw1KBzcGz6meWGfCe3Zb +ZTaCyrwn6Hes0MrWdbE8cRqxZVanQZnq4NEWIgi5aZlGbdhrK3oePvyHUHpw5kvI1ZG9VP0Sx9KV +i03xG8cfLjFdSWyKxn/l3HtvpX6G8XQyefhfHl4FN3I437ugkR0L36TIR+6cG9f7z+ibgSzK5yPr +AnKd3S7X7KRZ8eQ4kODLHdPKEeRrPH+GJISeYJCnwFBFPeAcKKpvNNdKhC7aMD2VZ+lH7zlkfUUV +lbkZxTT+0X/VfMmVqcQpWYke2O8PlVpyakL+FxidvQ6VOkdhF4ubx0Uei5wBwbas5KfmC/lBV6Sx +cdiXEfVrwCAwDun2ZKgv44z1Juc6Qr4zXqkeXRwCt8U7HpkJtg2BdP250EWTY6ksi5acSV9k/40I +wGX7C4pNcWVe/Q7485VFzaNYGRzxBnpa9sa0QME8HZo7qpO2mSzpBWJU/Zrs4pYYOiHn/U1vzk25 +ek6HZjpFStKn5BV1RnMVrPC8kMRVJ7/UqaAfBGG7dRrvUcLMqg+aCLlkxEHmtJhbWUxKBd9qE/Q0 +ip86hg6N9BPlRXfrRHKQHd0jRDTbYKxDW2JieY8EwkdTkgTnL6ROAkrF93SjTeqH8rSLIZHassJI +eLkK7GlU9MxwdIynq8DOxbrrInDXTbhL1zV0QzH/iEYkdmGOnY55Q/6gmy4RWahE4dXznbXsFLp6 +Ai0169SMA86pSMLVuBy63G88FKc+YqctPYD+ytLCBDAAwNk7hSuRyczonJ5k0gvbpla7ay4k7cMV +8TcafhhLu1ybGoRQWMTt2wxA2XxcTvI2XCiyuZJPzMeljYbJ2CcG+wljlTXcTY9KTCWJ+ghpEVaF +RXtcjEZgwgOYRMhKBNP3nWp5RcHqFYd9VcmMjmY2yl3Ate+Yc0wt24iHpuWH8o527/CCLCt1aFLb +Epx5ouE9DOjrDbpDj2D5hiLRzA+fNDbVkZsB8Xo4rtpjwveNiqn/LGCBNxw0GaZ5DeuBmDXCsYno ++SJGFRUzSoEkgqjN4gTknFbBbnLKewSf/YfjPwbWVUi1/rsJfbcnes0XWdkRWln25BxY+yBc+Z9b +ltx27aBOE127GZ14x6UFX/9F5M0yYN0QET2OYxjRZNEmfOpelYrQBZmbsFdo4TIIaHwDqrCaHNLd +QgcCOvyUfj9d/9rgP8LhEWqWiIynfm2F4g4pYQ+oAvrK0ktstDPmyfYaVJgII6ZWfCBrlUr1dN+X +P/A9vlzgh4x96OPp+CcSlkNha0AGIdMWSu0bE41dYWhoS3vBDk4N0PFBw24StMHcg15atzh/1KD+ +oZSPCvOKvIha/VccR1X1Xd8CTF8QHRR3yZm4+Ygf+VePsseKK+StQ9XTY4NrLBPGerGrTBPijFGl +GS8OLkVS8J7IuBxkLDxxScWDxBUIgQcIMsKdB/gDLYGP8nzKQFLQhVGgnwSicwl31k5cJFyGVaOx +RwgByAxu3VVe/OVTgGdK7rrwPPPrxTn96omwALUauP/LEU71Oku2ObmSwzKjbKxNJRlYbLH/F8sD +nwI6qC4HawYEs4Fv0Yav3NB5eQtUP71Y+POLI2Y+f3OeOX7sYxG0kB8pD2KtAbZsTenjq6gjpPja +yvk1hmxTg7X9OdVni0SEpGX21tU1BuJKZou1JsH4TNxKSHnZtaFV4ESauWXUQpvCD/398ltvOmzu +nRstVRO5JFHMHB1s+7UkDZQKen6Jc++RM11aUbfaynH3DSF2S5h/bfz8LeYdH1A3UjnnJNBDwclt +7TFqze9b6amZdHXPf4EpB6N97sIVBS9QUuWncXlOxunCLRnOsSmUsSrFcLpV/0PcyZXwWOlEgbbp +iqdc/M7UlgPw0dnbS3tAuqjC8Er5+A9bvZPhVeBizuowGzfQALm1cH051kPlYTUX/4scQzJU6ruq +cPWFTum5cEj6c3baoIbwfDCCGcfMCBbHCEVjALdml51Wrr5vdg/8nV1jCP4C6VDn6C2kdmZ9EeaB +9eJxGWFRaQ8ri4qk7nDndM4h5NOrglYOY1fxJCNnrJKMBIbR+dJtk0idtxqNnozZ2yhtD4YTHJ5D +l0KyX3LjxEalnXCB33PGID836O7vNwNQdsPQjOlWWuPcAsj9OFT9KGqbpDOdEm4D5WjRDS/sbGsm ++bQMErVHstES0zaafpz4UoghB9yjX5eAvoSZg9tkv322BwKZ+qmhet04zKyRmrlYNv1ZPbu404yQ +jFNJ1TXn7btq10heLvVP6sKWPIXGceTqlI1+tyyW9sFpjjJkuklGOrkqoeynEPUhkNQcy4I9yfrN +CW+8FYoUS+Kg4RS2GlEbqQ1rekIVJT//n0zE/O6JWd2b2kuh3QP9ammCu6C6an4psrWAvxK8e4vg +cuGIY9AFAnRC/iS7MTEtKqLLxTowtRSwGA1tYVhk84xBAoe0drFFv0GljwQ7Ra6hYO2USbZ7UFpl +9LmB0qFQa9kzWlsreVE/WlvYN2jK04M8OLjE9+ZLkYS8pizrmhZoe/zpge3/Hqs4uq+va4bEPP6v +n6NciN72mfHQ6+KqySxl4nfAlmQ9WrMMNc9xkdLAovn6gOyTexwE9LTSmfM7NLAF7hpfIbMJfXuy +CMdkvcAritf1X3806k85/C2z/0eadefCpQjN9SlyhI82s/h8y7yHU0SJ/iwdLfDMRWRUK+G6ykc2 +LaU4Ap6TwNyAI+GymLJ8KI66xFonrTorKJPxfxl59fKPQQ0HAWJfqaVuKd2BzkiWNK/eCAj77SN9 +6UtWln2Rvzp7kn4wDdkVM8UvE7xbziyR1GqIHceBu8au+5NqwPAqJJvHdrhW3i07JYNUQR8FwPDJ +gHuuE/A5G/8fUeFVP3q/mssflDTxmUCPjrszbC4x2J9BpQIjxUceChrTZe0NPOnp3OosDuIAVPTE +wlRRWUxNSnyJ2uJS93UXjTP5fPK7L/8v+d5bnZ/ZOHRDzCoa8lGGspVGwX7rRFjNUzk9P8UlqKeB +cDemTro9lRiC5z6Nqi5TJnaU7q7c4NE0UTZBj2/RC8AUWkJOw7iKJRSBDKd6OM7+YRyr5MUoKmu9 +sjmKa6qNBulbXEybPCSt9TEBF7JU4qNDfj3ibU1gUfbxBVmqt/G0GPiCIEr40cDaaLT+th4lp2LB +zjFT4bKk5TZyfDi3CsusYgXwM5krvPrZlKPvl37DES+iQC+5W+WEQFiL83fKAUmp8dSFe7lWVkzn +h6J4EoHiZAzWUybawFyW1OMKiKLEsGs6JXu3VauuWablhYzKSxL7tmzUAkb6S+2bkcly17rLYEmO +k8aObY0E2seYabtPyw0Fnbnj3QLR2p6vlUJ1tC8TUEzSmP1F1nYdhNqZhXeT+keerM0Vt0g5k405 +X5gAd/dozG+z1qOxIANiMx1K+89rHyV2IGeoNzTSXD6EfNqIjtsv0seQbB4ft3UW/cAOitu0z4E+ +y3co3y+n/6jhIAMiSUN+vDZSGYS+TIPtZRJoZCmn1pkHARNYPbeBS73vx/yzm2/8qXOpxaErCe/G +jVh9Pxaa+y7ffx9D7l2KZMGEBLVrbXyRQ7coU2QEIw4jhc4UsPNCdBGE612+bPv+O6EuMleTZ1ML +TdJA6ImCEa+a9HTXS/4aXkHQy+Sg04k/GG/cgvpHLi9dOahDKmnJ1DtOAXKkDDiCK/IphewgqPm4 +/t16w0YGT/vgucr6uuyCKFrFUz64HJ4pWa9KMKFYR3+4E3OXgYUyZEat8fVAyohpuwNi47pGqGvb +BjAQmwhR4aWv2Jp+QlldUVemHmQEJrlFQkTe1pafACICNgg8/9HloWE58jYMIyUUV/HorEXxRttE +WDY+Bo4xmw44JQNZqFbWISfDg7qxzpeLQKAL0AQE2UHELtEIQigcGYHXOFJJo4BNt/3wxPf6XWEk ++mXixhX/ZCbS4U1VM+leahHVAGpdaPIkyC7s+zVGU+m4hsJr0c6+k/bJar0LViE7mh782l5FK1m9 +x99etQn+KQLJhbe+InrcHi3wR3daIzzki0jVHuxwyf715e0QlK/sG257FxkNxVWywPrrehrohKmU +x/pHgoGrmgGsU+vf+DrJgxaOc55xuhRLavXg50VSExPcJCPwIWp5J/++ctUjAlg5dhHfHhzIs1GW +BBuokoyT75FLKcLpJMRIDseBVq2c9OQFAIezXFj27e6m8wbUupJZmWBMmngktB/W5BLQWx4JVNii +Kp4jP00W4ZflMEuOz84gm6GO9IjNSXbXrcDzDvLLTx3fmSgUtrxr/NntSEnghVCgBjQtioRS5hMf +SjAa5Z2V6PCCMLNO3Heo6S/hfTYujuzwx9QLIsSx92CWCyCTSxmog7exBFcEPO1yn5otlmKngJPt +oeGm71E51ySWSdoJRILiUhwdL0n+vJNM50KNyvL98/pTRhDOQ2v1QPFnP7BkFSgLpyJUCxLYXXwW +5fvwamJdqUvWSSmt/PuqY7yxxttWMQTBeRIerQZnljJMfI0xn89rHqzRvuDc3VclP3b59Kho5ddi +aoeRH2LiBD5fKaE+N9kovdC8SPt4JKjz0Cho8E2v/Y5tLnECbIU9U9Wf7dFO2u89IVK1jhfzRefB +vnJU4+HUyHrZqlaokNBmwAHQMHmHuCrcK1Qc0QZPFDX08CbYZGB82mckMYn5PZvM2Lx+v3wGUlrK +7Bp3N4n7DF1WMvkXzaXUztuhfW8Tl/++hNT0MeIruD2Q84tCotPxBa5v96bcKs70e44fCp58H/H9 +0aWa0eg0mfNTI9dOx/lEpfkWo3d4PUGPwR+7T2fdQmGPKygK+jLfZuOxVN/Zoaf94IHMHC0uEdJB +dRySDseZJXyZHyNFUyMrSSWVi7XwY1V9OiSE8IiSwEkhmeFQAaNZtyyjPI9vtfo+iOhxFGlcBYGt +ioHoZDTE/lwEo8akAJxHIqcFlYgGrqqdgrVGGhpfDSyLjiplAfa42IqpWb4GC51n+qOdkB4gfJBt +1KqPfpBHSfil4gzEn8GUGAeXtorvoMsRoCnkpDMsLqh09jgOBu/aLYpwB1pdPB+MF8wRoGv9MeOS +c0ay1TX5F9A6bykO8f1C0FLXlvEjXFEbFJAIuTCAcgm4iJo8KITsa2pZbtwXaUPLxhYBwIznMr8Q +kQjCFyX/wSkiY0lv9AN4BrBh2pnJ1uCZtfoeBWQGgqVPyV3Bwtdn1y73WeKteAu0WFqaKn7k7Rrd +oPIUnMDgtIo2fV8AeEDmwxnBuGW4SIVS0Q3HHWM7xPLn7vn/+PJjgcHsJqZsG/Z8+OyITp4fmLPI +QfrxItIoZIjDlTy7GSrcPF9RUah0cRJeDB0DTxCj4KwrREfFz6E+wMLZy2Gt/4hLp5VI74Dz8OK8 +JkGJbx8PpfgNcxYE5/yWVKbzVdmapWiyWcvUPtV21MTU1YbN9pjk4Lqiyp0sA77UJ47/dfICniRB +UBN9V4zlY152VwwRlrd5j2FaaEdHFQLSeAludAEUQxBVtm3cR1EnMOc7vJWtlLnPX7dJocktq9Iw +dcA/E/8uxwmhMXLuGfx3HbjlYHxI8Su28bQswnZLH7EZe75/TcaCkYsHdF3XQTrX6c2Nd+YNO/7u +Z6prgdOM3QKaLApWvdpZ4yNFPBbmRNaTKT26iiK1jfrDj44G11ht1nwf+1atnNmPCETjsivkJYvI +nYQ8KmFIk9WVa+P8pn0/caj2THlNGK/0eHOO0WGNSlTR4X+/8YH/AgLzQiegZngcWTSXchv7zITX +qBHYm4OCcTwm85aIIdUvDE6OezcKknARzc2GsNdiqYCMJovz6aQWKW8kSkst21uT0UNcRxrCLeXE +2SwRLNwOvycVO/znsdlZRNnqwRaLlOjuDBBCjYgCSW3ktwxakI+ohr2LSgdbWtcD1g/Q/q3d6wk0 +jUSx8LgVD/x5WsImGMHdfpAgzTEJTUZLqjOZNOolK9buzNohziJEE/5nNkrUv7K6+LOjf9zIIBRZ +NLwSmwmXWFWBYT7FFy394u+GtGLoLY0FSVMnzhUN8GLKj1alGx3Z8DnAaB980BElf4dgMIIgPtwG +3Of02Dw1IfaxfTfEqzMDBzrU7Qt+hOL0N9ZmETgdH/Fc9Awa6S/4mkOY9BL0pBOPeqt29Ft8AfnS +90m8opTUFfxbdt2DclHewQgFKo+0njUqK6ktp5yLwdYw8yTitQgZjb1RO47IWQbEqb8S5m6WS11k +9jgmnJhgpmFhJshlobY73Nk5Dwels7SAvGql/2uJbRsShhxSyVcvO+FYBsGcrE6jrMlQEqMcKpJ+ +bz6IGG6eu0mYzIn2uBoGWPP8u1bb2M9J7hycnIFLiEnVdTJwXLvMXmvnG/8KsHm92QYTAD3GWViH +7YqcqiWEsRrnBt5g0zPgylHiyr3D55SX2Qd6re1Qvs50Fv36tA/iedZdgNktx4XuhvoNvszFEojM +hJ7t6W8trJaNOruELqVi+qWcmpSYnznwo8iqvbiuW2TpwVO7zrFeP+ba6/ix0jYjm2UNgeEZ3DkB +kGUk7fZzJjR3mP/5OJIF1Jt0urOdMfmsBhj7/wGGW4tq0cRpS/3sB9dU/JdP5XazhNiOPvkzmC65 +clBkllpNHX9UnVXSFmyxovdQwvi2j4Kz/qqGAt58hgnX7kTF1kSP1e26GpEmXwxtwC4uvkeD+PQg +I/uiM1IoE8u2MpOzXVyByXLc8vllCbDWu9AI/StdMPOmfdW/Fb43EJt1S2BAhWeILuKWCTEjdSYA +NzRTGLFJZQNQwHu0e4OKhoJt5pGLHQUciIaqrB8sJtANK8aNNIujpoeTObr3uGBvreXMNGwK9ey8 +CQSZqYX776ppFmYxAwt9SESd9t5SEFGER7Zh4iLOHyAf8ZIxKf/kANfkE2Cl99XGpKk98cG4vp7o +ZPgNjYXUV6KKoSJcsIfy5L9lfUfk9fawszjvAoX0rBdPbzPZnjbcavUVITQE27kQkUo5cLkVtzXM +g1XPCM5acQa/+nEsoHBgzm7xkZ+kKt34q1OskFdMCOVe+f7on86nOtlwTDpPa491FRTViKStj2SB +rYHqWbyV/0/er4MEWHVXlAMQN2pHpRHu/IuuZx4jMmpVLfxCM6VrJ8OQCaZR3VjtTXc99Dh0SKYt +gbP757q+Rd+37vjnV4G+5UMP/EFRfWEdTa7EGSGBmygAr3iJRZAZOVOhGKd47IENhNnZOQMfYpH2 +4WA87+g4CfBSR2tbGd7XUfVo/KUQdrTNPGQ17fmXOJ9WPhUeL/N8GZH9v30OUQsM/ar/3e0oOvDa +rtsjrhf1eYs9sFULjco5SlnEb3RyYIlC1kFtTH9NZNy8L4fyA6/lj462JTmvsVe35HDafSq4wxvS +/c4Y5hhWUD16VBDjOQgofH9nQfLB8pYSOImLCwhPVLxzGC8QFiwWpFw8Nu8hM1diA5q+N6HTWkvf +L+ggvWMTLXLx3DL973AIyeu9yY84T2NBuNLbV529B+pBpZdiM+AGJwjm9wQYZDqKTg3tAwKKBNjM +rkidU9xqbLjohCHXcNuubSJYOcK+BXrFT9mCz8DiRHJyRdciRGKONvww48+WVUTyTqKMtatpbpch +g9oCrDiMK8+xqdBJ9umAg793oWArXcTJ+Rif3Q5HScnu0ERsJ1M9Qn75dAWnE//UTxhVxHcknQWY +vsAe+clRtxKbEq8hAHDaXP56av+FckRdYqHepzXQa8AlBxCmplQFQJBLvFUUzNSpKOGNuDHShmXW +HBJ8n/OY4JE9ctw6f1rkU7Qw7/QZ7p8MdmI6Rfv7jMWoemhMqKOygI8pdaLyZSvZDf8JIwThdzRd +qULkEbthTTnlFdlwVFhgip9AtimLfx02JDmITXC4TJiLcA67ZutXrADYD4leGqz30/GBNc3GIJsx +DAVn8nD1/n5mngWZSOhR+WbRysQgJkpZYIxoQxdkIvdNUHuD3hSj4Ok8szF0zzBfW/W07UddBZ9m +xiZiPA6ohRvj+w90+mMPopIeFNDl8/CZU1U9GO6a9qdazuV4/o24LZymBpiei9wTqQAmZ9TQh4AM +v8E3f7kPq/rgHeFbDqAFhPCeSvPEs/rNnkEhEKDOf1bRVni3UjTuaSqjIUiUFMkFANjHhc5prJWp +6CKT9Yq3agf9PPkUmwoMatQfzXhFtoYyz/LZ/GNcEP6QdOBbgpmfTkMWZNWaThmmj8ey3Y3zeLzI +09aMElOM4xPwGCFITj4YQ2JI4sNxegAwrC/1O0WvPiJLI/V6o+rizjdiFjNTjOZfjvrCU1+LraMg +8/8iRepKgxQCOhjiN1c3KIaUjo5mUiqIOLVjYJM7y+oXDXQAGlgMBwPa7vpBRZ8ZveBvoqhWaGbn +JigfggwQHN/IulEWppB3m+0hrgtAJYIO8bQuSmC6gBx62b2b6kCD8CopvIZTqioPUV531UF4VuRK +lKFkJOwT4l560jEi8MTRzDt0MajZlDd1xfDC97EjsfQqbzfQmu2ZnLAptz2VeLVmIIp+E23aA/fy +HZP5puuoPYKZeXZry9/L3KpBYVzPa8/Dak314PypBDnuoXLH/1ARlCvLwHRo64VHpDh1FSlQz3rV +Swoj6rdnkcJpIpai4a5tm8ePx+U/6yJOxGMsYXhxG66UlBwackBkCEyKoX6mqh6fk67BuAS5FrUS +V9qyHbKlY5GJXr4hA3b1UmREPeGibNbqoCUO76RzV9B65ZqspTC+oXBtELOWGJiv0vo/qr695b2G +oLnWXlY0wBV2kL3hBSSlfVxxzaw1wqjdynHxXHwd1q3/cE4GNyU0k9VtT7GBjAET2ViMRSHt/Zlu +kmd6u64+vxdopJwUYTm2Hm5gHyQVWJtL42fw5HQUvfGtm1X5alLU3ERQShQ8tYEXTzPkt4xuHHHl +Ja0tlJD9WBwQiaP9n/6ReJElfS2HXDr3lb43pCS26xizkyeEUQJlDEdiMJMIUH3SDFz0FlyTxg3U +fTSthCP7WKZzjdL7RsLl9iYGLlOvsZYgwymkRlFVYniNSXx9RkZfhJzITzIqdxiMcDTK1PoiOY6O +DktnvfO78UL7Yb/38NiQ5+0AXfz66rp7YD61vMljN3oo+6NzIYv8cw4phR9JSzy26ZH9aOLtPYQQ +W6ZLGvtr6sMPPxV7v3H3SIET5opDeyf+mHQwTOW4J7YKL0HBXwfIJChvg/p/WF4Ue7Y1xdnQ2FX/ +8wMH32GQC2seAel7R88e477Buh6aOKJhACSK5IQqccC+Oibga36Oi6CiRHiklKd1Bq3VsNoatyqT +6LmcijW/lHHKPdOfSen0WoJ+6K1eAv8hIzbeXoDYa7b5kLcgPyCyftKuV+F7jhdYXCK4BukL2gYz +M0DTqKSbhjXxcyU05QN9913sH2+kb2kT9eRCthaUKItL9a1hRAxQ2Nh5BDgdhkL0/AWLik3QeSrM +Ht0NhVsK7GCD6a+vZWsJC8xJwlR/laapxeNfGBuF5XyIpE5a18u1YIs+AxmxHBANNfpW7MLWJman +xTGWRjEt58QWx+mK0mXluM1GQIaBvqzIIPPoyvLdmFLrJDCG4QNxzigQCc0OueJwJkDVy+4w98Tr +024sMngvRzc/9caK4X8DIaVXB5fR1IhQ0rZI5J49mCdJRptG+s1i8xPuwA26a6mdoQbk+6OOjleP +n0FpzMyYC0OWCcKspY0fsTvxC52R2G8BgfDtzn0esm4E/ORrnq+SoAOYBba5apkfrxQmDcRSFtJa +ZIqthN86xhGx+mybLKcnrybakBq1plO9cU8N9CV0O1uL+MBAEkYRU6u1qjYjtdUFRo5uBpSGoGNl +5WwDicvvB12p15pmphyiAUuqMel2DAs40SeMZRnGLzHIz28j2Yv+wj7D135k/zHFbiJfpMK3sq+k +O5VNeaZZ11klloH5o4NthFWZ3KHTkrtsdIH5o4AHOxh4VxKuA4tuKQw/VPr/q5XVkV2G9AFyrNzM +WIGgiMmwxzrO5Q2IuFbOsNmu63WlT4TPXyCXDyIvic+wVd0+hyduuOzel90EI0FfcuKcbFkaf/op +IJbKLN+idrEz3DoAQu7BnumlzjP7xQuTDNqCBz7z6N3XD+trcyRxeYv3IgzfFQVHvJXTO1L36SUM +KVgI8kf9i72/J+fdLIHX2hhOAcA3hsN8Djty8Sx9lTky+KFXT+TMopCNTj4CrsvTRN0+hAW95VvH +mrs6F65xNnsfNCN9Xm+zqZJrz5KfIlNWZIkjYFvIufyhjC7kekmubfne3vDvIDMj2QJL0KDiY207 +TUjAeZUpAGwx1y+DDkGawHjyf+C1KtmkX+3Z3oZ21zBKxemaGoLs4ttRiU4O/7BDB5a7AOTr1InG +4rjfLrusHLm+nsgiA/S3vbzYRNR3lkQtjoyo4rRP9bColEU4VYw8eTycW+uKETwNVYUb9Ctf21PJ +bTzOFayXqOaUkoQCPe/1xCayJd6j0ZAPTB3qU2/vlPiaQ9R0bMH35Yc+4E2zPFfKnTNP5UQ0EY/+ +wYF1whAZc46n2ZXYIkNJo80KBhbqBNbVVXUY+BU0XWtwkZkxJEiMfb66IA18C1uIsAtI1SBe6wN8 +3odVcSQI/VJEzvtEq+mthTKtka5JuYPCK2/yOfQN1nqKpw5+d7FYGa2HZ7S3uERv39cEyRF3P1/j +NP9O/TB+5R+8YyOW8QdE2zJqMA3KnBu3k93MrHR1kyW4ZV4VHJw0fnkX3S9nZOTYb1qiaM4Bftb/ +5yc60sRAroy04n5yJ5YjklQztNEXmMU3Blp6sG8yjATyUU58lyJQePe+uOGafirBfnX5hRAzYQ0N +dPexY1W2yAnHi1issQwJuHxsIKN/fFWxbywL7XocmLdcO1bmA47jDfREVlu6lmUq24v1U1Q2fbGs +wMt9frdmEEvC/bqUE2MikgEcxumktpei/fzoK5tm3JG6Z5VdzVo1UQqF3faUD7UNMiUh8tBtcAHc +z9lTGc1FJSfvyvjMOiCNILTyAUMSXEoDZTpk+YNC3zYvX9sHXG/0hCPD/0ZsNmILP/DWZEzSVg3/ +xiTSvaxl8bprRTT771eKIKTNDPT/tyzRbLZfEoHM/k/roP9awlko5smunqhNiFrU076w0z1zDL58 +440jSvn3pkt3a9Q63sic3ad20klOCCROWX/vlKBWDI/vgWwqSQ0t43A5puKmacxFmVJfG2g4p4a+ +pkusIrTJZXzbMI1YEt/xyGfBnj6jnYJC4uk6nnvZiRffRrDLG9FPU6Fas4WkMhzRvl3aKBmq31Zj +haZtcSzDm5ZVvsbHfhvxmiLsLmTjKGbtcSkWnyYp6VqW6Ee6TdLRFe/e6vGbD+9rq/ooAXJ1GJf3 +AbBzSzBpLAFX0UhnU06hsObRGEbFVF94bCqBMmel+TW0EpwHZtd9qbhIdQeD+vHnL8u0p3jvDu6g +6P0FdS0AXfTZopmMN2CX8ig5qdZs2bdssVipmVrT9Ddvz3uDw52Ujzx4enr5qe7+HK0WP1/pi/3A +YgamFXM3O8JyHiUoKPeHjWJN3e+6XWC62yyHyah3DbAkvDwHM72R7k0at2MIWyEhQ6BdDJqA+0iU +pDeq4BhTGVMBt1jgmh/AtBK5rRLB9vkaKUbKLJmsor0nd5ISWEVdTFcauYAzdX/tXjZmx9W6yzv+ +2ivwVa7KIv6MxYIlqVETTF45qMQ84Q9mpPt/6pKIkpl4XxKU4Dctz7UAW/hLrVkeG5rF3Q6jHZZY +GIKXcSjR6nOErdRNUEWRishu2dbzSlmQWTJnHlu20IxRds93j5+Swx62ZLMcJWEepe4Wu9i9Or06 +U0lKRtFTw3L3kpT5ozNj9u99cHutCdsP/BcCvA5WkkQQUEl+8lHADDmC0B+S+HzD6+P+Plrcar3m +jyDYOu+Xqj+jIXGOrYmoMljLGNb/eFFWzbe60hhndelpfoLBG/WLhQrniAcMb6aPzlhNqr/FjLBY +7Vecmqo41DzDjdTyUoOqUCTYRexPijxxkkMVwdyhBAxZzpuKGEQBrj74aXNTz5O/PIEt4Nw2D4ED +XE/s++RjaohovJ7JOuf8h8G1qcw98GNUMh9LYScBidbXwo5h6g0/ze+xPDX4Wlm5mBkFBqnlGiz/ +TNSG58ftpRuRZc08yOQzxa8H0akwMIDj0qWO5WZZ2hCZNN0/wDUN6nYlijwJfMqNsNS8K55qO8x+ +w6OMPeo6eEoacJ1hvZUYwFeembl1TU/YXn/DRsBju2GQ4EVeaDtscHA9TzI3ggtnS59fFaeRNv1r +lhdnxunrcu4LXFUXVTKm/aICE2H1NVqZGVi1TU8v8pi1cjAXnlvB2GrIkZbt3h+mJDK28Xu+GO+O +f0bARZq07012qKnM7csc1KsuSxnpwGuscifATkcNPqs4Xa+Xbs/peaMAP4L5gavLGuCvyyr3RRZb +3gyDPnhyMcg+zHlQUSpPRK0luhI96W+iKd4Jt5SRWNG+7xBVZB1JXdesW+CRdJ4FiKDgISfrG3L+ +sETkn4Lrj7M5QqiqAn1qgurUOwdQI/J9kN0B3Wu5gYNXDyMKiKUfcJW0oZkLw4HC44QV3odFiECX +jXR3udOwKdpc9qJc/Y6kXCPeZxkWnFLpu31Dqjvc2n/ZZKvPZhrfApeuM8QiqgEHiyPkh/JaZWrJ +Dafu0uis6nK1JinwQe5+sQvzV+/9rBxlKagJrbQMjqLGels6yGo71OzCTepHLSJhJf0SXFQ5WHBJ +Pk9hKdV0azGzdRGsyNsvOOHrRQV6bUmyZhVL19Q1M7WmzSGuH2k5pTl2c7/QF3qJ0YhBuFcNRMBI +ZHC2Z2hWMj++ONhJrYffJoL91RZdHSWSJ5fWE9kbz5NcNgZJVyQNqS0WOnjCVnukmdST/9M2mviP +Nds0rywxF2SX1OH2zEeyCqUC+wVrp2EDHjWKDlhE5+fsZV3u5XaePtk2wWOjl/gnkCqM/zPcySSe +Jrq+FwnMvn6siKslm3oKiCNzMrHdIKiWyJjgFN6Kjht5S+Imii/oA8UM63m7vjW3Hfc8dVYiUNk1 +9s3en6N1yqvJBXRU24aJhHsGPWUbCXESV75KLJldANmJdLZauOO8/kiwDeiFDgv+AyP8/mUCuUKM +dPcT+FprlPHZNmimJ6CdYdMoGTx4LUl3MBNqazuGhVR85gMNnsOMazdLIxeSCkt4b5F07rwrHHLI +cEFKY31PlQsW4iKS47BIxV0YHgUOwhCRhSJX8jmuweRpVAHxez4LpCm3hJwQs9gj5/bmIijemj3s +FYvbNutEGcx1Frn5Bk5Lj9MwWR104tY7Yr3UpU6UlAgHdQvTnmpxlm2JLw0Q5vmimbr0EaJFkYwo +xL21RMsVEotG8iaNN42SAQS1xSH7IaqsoNTqgOSBfMT8nqQRVtLoCRJWlGujcr9dvcRthB/wrEWf +CFAt05dYZYMFjWW8Vt39rLqv77/qyBFfrarlvzu6WZdqC9LM0DgpbdnimxBLq8OxBBN9tEQmQZ++ +6Fu487NWBSDNMBtkUvfrhKXYoXSYs2mr46wVzwkl1mitcDMXO2EOTaXmZf0X8Kp+nxdobLmafG3q +dRBJ5an7SvOc6yo/a1G7HtgNczY7vuMIFlQNASvlut4O7oH1wUHMrv4Twx6qEesnd220/2mUKqyy +0TLwSs71aw9Bbj1oHE6pCLVQQ7s/F1aSnVhomqy81aEgLyWdfj9flKfcqcu9vD4X6nalcn3Nekts +MbvibqFFH2iB3v9fiPQwZQm0TwZRTGsc02QaZj25fsLuSQWXzG8aCZlrHdbkn7Pu2vivG6BM89/F +z1CC0h1PTqX6FpCaRmDz6rLJfoAW9a/lMrS5dfGVf4gov5rrVzVCFPAlRBqavcCj7dkdPEdIOHG2 +IS94yML12HS/nKUGvFaMAQfx4BfSCc6kyJsy2ymXVxnny4xhker0WgOWth5IQKKlV9NJ5INMPrq2 +GW4KGyn0VLxzsaDRush7X0QO7tNOavvkDzZL4IntZko6c5fA6GN00lTV6+/AWjeZgBZ046Jl9abI +QriZWdBd6q5t7ovO9iOjyeB29nYBwgCYx7aiNB4fxKv7j6LmMIxi8zxgPbWYJ18Ewbl83k3qZN6x +hwIx5YtF9M2Md3DKdEymXPr1x9EHg8fyFyV91b5hEli5g78itlmEeY2qlx7MjuQJxDJKiZHhLGSJ +b2Jhp2VIuaWiIiVxoDYqM15p5sm3GEAcv6ck5KCiRkD9I2J+WDVY3V8/QD1WqZ27NFBf4fg4kI+Q +KYGx7LU7dfvDaOBfyb1+Ta3ZUMEpIAl+5mTDRAyUq/6E3m3WdWAbYmpftSnPzh1wAxzXffaDbsza +3PNulyYoUyUR6mx8cemHKelLcT4bvmf265emp4rZmxNfZuAGzq3IgcgE1vygeGkYzWhRz61OiQtz +9rzUHUzrmSGq4+1pVaBzq7se5LujhyRoMVcAnxJDCsRTv3/Kfi5HD6KEn16l84poD/DFHJ1bSAtg +91f43p5JwWOVArb9/5L/S+Ry8zNwyTvei0pL4dO4jn+6pi6ui+zZ7LN4/hCwyPXaiKPYpmEW5U+f +ZUQAokWM8l7dRYbsvttuHKNODyiITTDtwOQhVqAN+haVZ/upCBEfXHdk7QMG9FlZca+WMQkeeX8v +WoEEw37Z5iE++3akxg8J/hBKPZFcY78MMw49tUfip2t5lcXYgDigjnTwxTVtzOgnlgwWhBps6L0i +weq00kXfNhHO9+SsQ1AyexpZTFw4qTf0Gboqq5Y0AFRbsdpUQHII31Wpmiw05Jb4QbTX4OepQwn0 +oDQi8JgDCSUrSmG/AI4THVNsSmVWNKwPwa3iUN/IOYCR7RrvseLb/p8WbnYsFaEYviGZ2c+GWbbu +5h3ny9uXfDK3MTKvj22M+HtOTmGwkPvsFNNFE/tWfmqcOfETbw7H1zLq1TlnPu53L3lIam/bQqC9 +VdDra8NtEPXqcGrQtEEcaMUuW1lqW5whMv0pYNEqydBPYSeoxn7Qry36mcKzmwXE6XymXq+QsLSg +nGdOVObKxk7AQ4Dg8Zi8kXpZLYwOHJvlItyJBX+5NPsOMtpheGmFWTX1lpFa/QmNxmUqDCHE4NU/ +DW82zkmNSBnpWVa2VHUKc5DdrUljsuEs+tDLqzSHx9yLb07LFd+wkY0z330bZvqUR57Lf0CAVzAr +nNqqG9h2nyXh0QshVQhKgAkT+1blNc6H6m0bZjhkX/mBupk+y/2znk7PJMB188FT6Gvg4lS6SYaD +q6x4RWEUJ8LAllvb5wzq/CqU9NItl2G4ziuFWdOoYJEhJsIltbR8RBpRxrOHzv1ydQLv0uMQeYCY +OZMQNVM5oTErdCzBw05RerTcVJ7q4vNl3kZr6AnqhUc0+ihZwznNWBAT0y+jJmWu++7rOowFGkup +Dxb5vDbQ9n2NaV8z4s58+NBVOyCQnq3rfbO+NCHgBL/VwYjulWKbk2W9numzGd/M2oaYZRPBfrk+ +KejrbMDFKBwVo1edlbpFjRpyoy9sFV4DnJ/Msv9viSNs+pH0O7hmS5eh0znSNU/BWnI9eoPDYHnY +3M0n/ZXRSbZuj1tRh+ZZD1EpTggSWxcTK1gVUFrGeQGkKFEvCcL/tXd9ei8omQirAIC/Xsi1P4Zg +NClw71D+qIsbE7c1lwjg26xs4mqy902GkdXdWp70WBxhkhsw+UFRd3f58ogCke4mpv1M7I+C5m8W +BayAQGsiY5Kr0LOT5XEUtTolStlnTbNnAuEcS6F70Fjp092McdL7zSODAciCCMU/HeyL7yLUF9Ld +ljC3R1K6UNzYEEvFiI58Qzc9h+D8ebu08HCnF29W3rMiWcH6kV6ae3pQJRy+3C7H4AZ8SH0XTLtR +fEtQKY1nhJfla8KH89sGJA8/XaDklO3hzs4GsAXOuFKVYqlP64PU5mpficuuxpGYtP3N4SBIADbB +CtfzTETiPYBE/Oi/mtqdLmnoMPkIODnPY15ESC1FsDjsSmisnvxmyVaW+7KZH83pHk6dTwVSjJj9 +7nFQJkAp8ueJYe21Xo2v9dULlV6yx/HoGTYGfYATOWEiGdX2psc00gZiQ7InuIqjqalfIUmKh1Se +rC4qWKU3OLiglZQ/LNmBBF4cLHs8JNi2L0rcahzbkNGzow5olRg3mgQCdjnbWobT9dPyJ+JvztF0 +2+c46L8pcKICrPSS7OxVtLyOZVrLRQjo7ZBqcQES/8CEoDe3ioFSthS8B6Jip71yK9SmGcBNdgv+ +nZ94SPArnItJ6yhaUsjR4Bn5w6gS/nzgGavmp7v0m5aywESl3TWEFXommpYxqY00suaOtwjmdfCF +iYWeS0rpq7JY31YrNt+lMvJxnNyesvpQD7lkrZX18FDFb7Srdi4onXu+ESZqOL8s/5ojd1euQmWK +ApNy3sWZVYTwKzw1kYuRXOs7juUN0YZlVjUBKHDMYdgVDfvn1FddrTFCi4mPSpgmoLU6D3avcfBF +SFFPO7vBlDBPXdAatFdnhAGuANBXGlMmJE7afEZfrJC+AewORhra5T55K2sx1Q2gxnTaG7/LBEJr +0Y7W0vt6/l3EGh5CmpRP0npSEXzfNefAIqyT8GLlSvmJNxtoaP0cUsyc5CqOo8C4ZpjHPGM190zZ +7OvHlLHqHJpDLZU1Mz+QClR/hQgV1FPNTOAmTrKHW31Ffo0eEgiSTvjM78SERrJjdu3o7A+ATyEd +qlEU+ajmVgz0EVG87EBPbwXc1HtMOek/5kEwHzOhDTKKb+4TdXRu0TmCiEi75RusHDL54DntjEx2 +LduGmoveh/lXzkurBpSiCCnsfj/a2aOrD1L7OXmk3WRLkqEHMPHyGjeS0uMZJB0KJR8qo4ihY/Kg +FM9f0/1jCckIWugyjBW0/IkMRr4wy+nqa07csvdaaqLp2x0YHBA/8FbYo4lw/nwYkWkuSpvPIT/8 +WJJASoqXKQhe6fOz7zw/PQReHgrtg7OeqW3AcwwQTUZmkbj8F9ZRyuHExe5iS1kjtRNaPT/0Haqw +E+vsP9n+8CO+uwWIPIrC8+SSGeaAbXqgyU5vAS3i1x/f0Z5cIYTztUyT93JkpPkCTi3uGWMFf9ku +CWNxBUvTEhJWsnr+uMKqoYukV1+NaMdbHPTkKAnvURgJrI24iJTkv+6kNGwxR3uI0QxZPD4/rvMy +7PfGAUftvUvd0RLh8ELJGZIcOzA0KylafA+DtS4MySQrV7GEJHD8jvrtSDY9grBKNP7bG3W0Wigj +1dlvTo+YT9cTBpSxMV0PZihaOyigRMCy6Ud8pUx2xVs+kM2/Zs6fYFMWQX1oE7IbqohVBjgqZ0bA +Sc/szwMHxxUj2ZDepZQIOt9uv55EBnDEuTFdr2mnLHV0DySyoWcSaEH8m/Yz686pqtJ6AfULrWvj +mXZJ0RL1MdE3KfvxpP4P2C85ZvVXShAk0+NI8fuJkKfQae2i6iyTMgE1zfJhcIS+tTnOxMGt4g19 +49H/e7uMBp4AD9JGVVoVaPRZsZJ7r8Wz4faOIgWXLHzGjshvHm6iTYA31l2yOzTcu5KSMc9SWQ9B +xWJA2p8DenRTCiLgG3YVma2HgZHcugcOGRZglUWLWXlqiwsERIYO89cYY4ThAqLgcHPVEi2CnZmN +JeIM/bn7CWFoOYk44qZKLbpjE5OBLyuDuy4IkuAPqqOTthtMJzIFKUwLLOtxp/9QfWzcT8tpz8zn +mS7MSzlQD3ZRR/ObZ3xaUTZPkuCH3G7JIlQEdnFgROFdZUtgtxjdRzrFjmG1f4i8mpWkYseGva69 +R4HvG4q/J0jwi+ULLNuiL0Uo53hZFFG5nyJIRNwM4X67Ar6kWSaBePhQ9xFqASmD2KZvc7moAvaM +2xfd/GqhYnIdyl8FtaeV3F7H9hHs4gL4I4V0r36EVEcYDCThZAU8XZZMOWqcZIqCBMMQray+0kit +4EBaOulp3ori25h1EhqUeRODolyF4ZhvN8Hr/+v4dHHHRDwvv0WQwHfXeewT/0kzJRIcQoKmlvWm +nROwG6bKDDq4rNS+TWU+OmnyiPXwOXttElzDGnX5qVpmkAGsvbI6mB2J8J1lh4EchMhlq2VNobfi +nyr8hFls8iFnl1pmojUEynR0N9Xuf561XFNBd5sia6XaLJ4G4hU2MWcUQeJaBA+RywnckCQPCvSX +ZmXzONdWMbniXEDDSS9cT8zrylsAmCgnOsE6PXhHROjze3zqZdLxtJGOL1ozxHUuJVZvEdmzdPb0 +IivNIdV1y710OJPD2SkKCw1VpaJ4r30A1+fbtEvHruW3e+SgAxdMZf5sKJdlcUwXMiMhj2mOZfe1 +FRbNlAp7yT6SBgUGd+5+b1FYa/NBeNYcfbw/uK0a/klbcPPkoYMV2JOI/kMuxaRLWESszHl89NU9 +pytKu3fQV5vDGkrJ370whJA4GjlhLnQ8FTaZQViavM5ze21qLJPPe1GJTzy8WqiohSlQBuxJNnjj +8CBasm0F0nTv5JoMptqEZrDq0k1PRkGjWOZK9pww/+Rj5bRvedjU1hsHFnLGV/Yh6qB8tHWLbJPK +PRTA9VihxgPP6RufLzhnSP7/eU2PycViVPToImKGARApcM+4zkpFikuIgdXD4mtntcdRfZJZiSDS +5CjxNKAT+Il4EAYHK2tVwmKfgmdzyUnIGecoIc4Tk2GZqRIrKJuvG3yAOTEoBYYIUWF3RmZx5DYZ +hKJTuIfmnmt+8rLISOBZ0AF6NOfv5D1oYMGPoSXQZLUL3ta2msdRWyWJudWoZGXLJ1rB7FxlqM1Y +3b5IfHlfKZrJh9wsBDLWhNb3TMlKxqY5nXPSFCOM0E1Ja85dgi4ZWL8NINycclnXJ9gKcvbCXJZ9 +AylfAsfh9JQV9+ZQJC2WWtGl07PZl+opFjBZ1GINOVSCYMl5sat9sdE4zzSqI0thzL6SmE51jGSi +itp3cMNGeQO5wkeAaCrQt2oH83UVkpTArSGG/bwRPDGF3a1jJdQg5HyA2jkI1RDyCPa4aGoSMMFF +Gyv1/bVxh1TE7pi96uiewR2QVNmpEORds8zqCbnuDNFWTzVGIg7Pez/CfWRdE9uTC2xgIwcU5SXo +6jjrjqwfDGbwITYCetBLLepeHOQT6XSJ23R7RAr8w6npF/g+JDmke4HH0fM8uk+SoE1YsVI0X/aL +ZnFemRDYXkGQO+H3p7WqUEFFi3jml4VZrceetax0/Wrvql1ES0x1Fyt8oeLJXCGyhWAXH7uI0zgH +eIrYPMI70Zn5JmJ+XV+flwYv10jef/tcnxNkTruuxuQpk8NbDylk3cREySMguepRRqNLkuI9k51a +ONcun/rx8VpsqLhcdmwcOlLSUB/BOtbiQCdGmDYdVc5LwBtW0f7GtnT3x70nq6EHfe74IY7n8YPF +oM9NqBd9yChFkA0Yh8Oihovsl6QLBm9yfgmYmObA149Y223skOXWFsBBTBhWqPosjlFlfYcP9ojf +sa3OB/BVovq8l9znL+H29cPIXBW8wUtqdLZTpZHQwSuMWJGXnyhHVzxJRUz3LgpfUZpGLto9l2Ad +JAl2dmnKPzrOWG4MWoQ02h+2DMQOW3lDRhWtm6p/K20K4jRP3WHALAjMv8LQVc2yjuXGGAhrRfw7 +EfvfDqMMlf/MDS4UrB6GBqY1u0ZaiuVqSjHv+NYzWdwvfcqahVuqJHDpWohh/PeK15vqyXNc0mHS +6zY23Cfm08/mNUEHmSFndS1K4Jr/X4q/TgSgvlmrAG24Ms0/lyHxQ0rlO7mT/8RKWNvYIoaGaoiF +VtM6sbGq5l0ReY3G0YN/WmN2mL0K0uq+ZhfUZAcbBVczZp4oFY0bVaRZWFWnxkqoOY/a39ipqgOP +/veYuWoCvNQno22s6C7RoBldrfiLhMN8tdCjgwXIlIC+8lWYbSlULRDzx1Q4dKlMgBPyrBorwXo0 +8ko6Yv9lnY6o0LHc/9h/4g+pyvDL0uOtooHJE2LNiZDVUTtcKgrmQhLsYnsOHtImI4NLZZjU4d8e +bQo3UGis4UtdBg3C9htYkRo9M+LlJJeDwD74kbxoySRpeu4eLm7GrWR7LXcTVoUQuxJjyO8CjZBQ +gEIp78JJJjg72OgctoMkzk3VG+Twuw52KNwi7wVdcZR88DKBuJ3RL6+tXd9MjJosgMUifVFySrf+ +FHDqBNfRPuzC9YmXzq8l/JmLFnqHOl0VR/j9SWC+3A6i0gPrFEO4MnY4wIGM5x2hnlubZi3NJUQm +aHgEuvionGRyKhhBH1Qobq2OQx80QRLCNI1vfdGvw0rgMaYU6+rRvbOhPwjDdmcZ/bCFgYWL7HsV +x86snOqHzwoW1jHkyTd27UQjabkGOxZ4zCIub0djGFiTyffimxhndewOHE/dqj5QqeeNVZFk5T8Y +3TLq+zlft8jzH9o1Uj3syoU4H9HKwl1/PitEZYj3XB5BZ4WeAdm9eC+1CrJRWzFIl3YTx07C7LZz +xE2yc0NdPysbt7RUjaHMZzwrLITlYBwC18ydQ/VIB/pI6M7TqwifXvJQwYe5q+wMh9WNc7IltcDU +FZasvlH4h06JI6lAG7dp1GJmLdwvhFkTjJI4f1xkD4I9MiK3wg+pqsDMzWTqMjodQLA2kMyhwzuH +x4i1zsfm3mevKizTckYuImNqPRrSMAU9OCBjH2qQrzEd2TqExplKGjKuMGXaPvuHRcfGqeZGG2Cd +A77zxBH18Qw24fnxRqb1xJum4NYHpwYnVkPBDz1yBdtIF7SB8dkhmwuArXwaHZZRuOpI2z22Mg41 +viuv+axB02r+Tvro+OWlnGLAHRMrsc7VFt8cT67o8Re9nULlhtLHecu8BHAX1uGZzpKpDs+GU3x8 ++WLuQ7LK/wXKZuSDpxyxGI/XTibszIkWDf6UEBgiPcgd+db7Zorjg2oD0iUW3w86O48iaVNUDJHE +BiixuXwbeUQCR/kR4xN/CyiNBH3gYdLafco9pqDyK9KUIH0jj5GgmeyY4EsDWFTo7S+2RMU4RQcC +KqGkaQkFREtY/uq2lInYPkTknBERG0Bx0L0sBLI8jdoYzZ1c2zlYwYzuRtK7noyPnTdSMaLdej+T +341p4IgrCd4h6ysdL1xPb9DZ4T7Uq9JohRBAbkPm/GLLVlKhl4Fyt4T4TW1Z3yI3Q0jswFUDTcVZ +3xFDHuSD01m36/YrkNK5HiFWkahlU0xsrGZqDkVIxUC2zwFibvdJ9iG4/lK7rltQ+qkkZqHADdUI ++0+7LX+byZyAtuYy1xsE39LcPFeE6j+UlitJLs4EMvbIMdVwc5yju6XNEWOkA88AmqQ6l+ll18+9 +4m8pkLFPk9mhTf0jao1mYRmkQX1hDG7OPNXaC8JBfnYTi47CxOll9abIpKw8hnsh8CLUp6feMiLx +MO5SmlylfV1Z7ZDNgIGk49XgilYdDlWdXSbsY9+TTVxK0ZexLb4lckSZzuPpN7F3BG/c3MlLhfup ++D38Fcd0UpDQjkzxbZq6WFyKAi60Ir1SqosOYGUjcAcz4MA4mGunUgQKjDdzamKNUI1ccsXGg6Cs +gXElW8oah5YC1GVy8/rT0aOZGfGKwRPZExKVQvINrs6h7x1RUx0384/zxbizN4G4P19pwuj5AKf9 +RdxpjxuOYMEwc0euCZiZMBd2hYn+MAm45C178LWYqj16gKjwtihuT9AcNxUxpNlg3L3HXdN/ITw7 +dY72lrDXKT8bWsxRKIlnabnn9a1dG6z+M461YufC3ql7Ia1k72TLzWbGbXqNNMJxBxqb3Mikyc6F +MYH+h3SPNTHOMEZ0C0E/BQe+tcUi7SqS3xRV2Y3yS2G1nOCYnRMoAGPD/pN6pc7Gs3JgQI/uaVXn +zLs1lSEXoSm3NfQmqSa0p24neAftofKIM3LplFXdaSsWdZfmu6B8E5Zt3O8GOjEZDwtIaJSBHlOx +/PtZSpvb6KNhrbsNyXHtDSdpBdXxpdGQkVBqZorv7ngSStGcuoDz7Vgw9B6pMmfHOcp8ZBIzoJg7 +a7FyfqfZ07JreQLqFnY5+XXNLuNKD02sMjoO3RopPveWCctIZsRoBrYHl007wCAjcJzhwQqqQOs7 +OLBLOTUbuUmKWnfbXnJHurFOzsBhuiY54gk3KdpOyspYYDbK4lsQl3ZBh3An70V+xL3/G53zbjQ2 +u3ucKF2cClcb9d6lDDWvrQm50C7g3AS/W1win9QmghboKhAN+NUjSvC1WFauMGUlL1W8zaG/+/14 +iXgL6eqWumvq3dXUstCPtH7UHQ5m/ONi6NFQJIG0b89tKqykNbQfwDgVPeRcmmyVWVXSglqxdwmb +SLEuPEBCrllgtTxqQ0lW3HY6wOMqvDY9b84gr/d9/y2nMtvHHgq8J3FjhiQuHwKyRX1Q0z4ooOJw +bNGI0Rhzq7obwwh2lIFoWtYXzg3cEQrlfuZCNr7/wgSZlmjwki4oPQIqZL59OZ6x3zTQSCHOd2+4 +b0WSNc9y8ZABh6I+KxHImfTNORXExFyl0481e81iGGgpZJi1F+eDjDyoziESBKX26pG5exN+3oth +LQa3aZsG1N83GWcFrCVe4tX8actPhZdUMxaQjowvq0cw2omjslyOBo6jxecCZZ3Zi4/CB0fFOosO +l4+BqegVADBhL3DzAT2dGMVtNhZ5Fd98vnLizpG5WlmjrAdgnKuemkXzu8/4NawX6KUXCPbdR9P/ +8Rt4jxvwa2xiO3QeCpU7ijKseEBKzc8/wpxMCDRKf8x7JI7ic3sGb1ffiHNk0ez1+BcxQvsgTCFn +N64dTsiTAB/C7kKlDgXwEGVP8DP2fP7YeayNUZimiBXc1ToyZM3YNAbUXOB0heqE+q8cVPS4Ke88 +aPF0qDqlOChpjvDFio2O2dTcITsuJOp1TYMbQCdyGHymDYs2Qjncj9S7yJAECsgOdWZ7n6lODMF2 +/PjZBIEC905CtV1Lp80FEW2tZsMRU4hji7POUa/axVMD/WVB9cXQTTFBvg1zPLT0nw44ZOJORTvr +xGngNBnI48ZWIOi0qQxZKc5b7zf9DHus8oAcTZvlznR580PsH1ziOlRyFxj7itO/Afc3imIz/H7X +Kqf4khVw18ua/XjSlay2JAP3DcgHJTdPDOPO6CxTMJ2WVJkXAJmyoIfrKV22geP0yE9Y0+hi1s1P +GZeo6JhiQCIjhvun++wVqwQYFCz922hVh75loBhxCgvE5YarAW3KUxI34sqaqHWXfrTRVx/nz+2y +HIlfEAtNgWVWC3nwqC76GYGMDiGG0yza27XpXVW/OdpANj1nw7L8zG335tCMLcuLZ3rlPbkCmrLZ +A5NDf5zTg2gaD9W7SXfAa+9kri5xdPLO0E7T8dLNOrqKH8NJ6viFcbjdRvulSXWPskbIPNrGaqD+ +U1pzs1qVpNjZHc/9gTVCaigDMGpEf30lAZiMvXudJfc3mkF2PWlrYXyH9hQqhgK82M6PaSa/z+SQ +Ecpcw/yAEVFbIcrEAkHFluk5BLfCc/y3iK6dI1hQgkkNgg5ctMSlCtTVDqJfW6uvwAvkUFF/yhPO +6M9ZzcuoqbAjkCbD3TOr5q7eyrc38zSzEXhbY5sGDq2ueiw8LWFLft9csq0YdEpWBjy7oEsLeJFV +BsFj9ZFtkpqoA9f2atNHLRkG02iIab0WIO5GCcpMLpwFbaDlMRyQ0aoGJ4+IahUsfJ1UUf3YY+ni +L/E5Om7SQkfwKdIBgkvSBAuQPD26yVJBdMe+MBNbAjzdp3ejAh46eK7rgM8TcE5/cWCcUvruzik1 +oF7KkF1WNw6KdUHB8/r3z4GHJzPhsrSinh3LJXTMwI5LkNgw0IrkgyFvMIbrwhFWMJ+vEe/ruIj2 +0v0zBLvFGfpfx6TR2MY26WdvtP4AfP8FO1WErP+Yyy0nEt1haGD9osUm3Lm3OXGSBQd1EA0pXSnU +OBPQQ9Af2cji5upa486+8di3nvwQRmeALFe9++YW5SDgSKj+NUIl8HfmDVXQHlJXwAR2R3jg0Ezu +BaxZomqeFFI8GZQC51DWfNnDiX0EduDKWesyMQXy2vIPGmJyYoucRw6bHjc0a5EDgPSCQaePnz1O +vTs44VXQeHhIN7SEHZ9LWrSeRVBto1tBiw9m76NsPsXgax8PmiY56/71c9TvY3QqzIjceHumGO9X +WrYnS80Re6+VCk38DQaF+hRD7XoCbCOt4rd7f7ls4HNHR4yNTBIUgOWo8w6YHiC0TFlsrohXqIHW ++uhsMohUtP4JgJRBpDdwFAAeRG9m32SMNXeSkYwqgjgZAK1xiRqMEYB/YrwGDAmO6KZEVdd1fqa6 +VWhuWGJsANNqMARA0rp3L47w6J0a8NQcjIpuMNOEGXsrEF/S991kX6PlCdj+xxKjBpl6cx0y+e9q +/WtJn2E/SfZF0+1WcZq1jzHSRmbk2PGVD+l2p4PLn+f7D0qgWelgLHrlOtMSzne4dBhfsQoyIXOe +Muur3GiSTlvpEAVdEOldGHYgRVQjiG0ss2gf8B38riB/6HVeOLQ3IyaZEc17u8Q0viSXTe7srICE +XZHNsElcTy5IlA1RJjbuyC1PKQVqjKTKy+T/YAMC7140DoMlbn9tkENtWOa24W1pjrlKe7Vn13G8 +3FjFVPwm/Aiq3Begy8WXBnBv303wfYRtGYQzxgJ7IJO0cmbhMK+25GlZbCq+d/hHl1qX35plyptL +WlrwcMU040mDR2NE7hrgLy9oPettUeIkn+m9NIlPyzWBNz1AIept0kXgWudTQgItDXDU5f+W8yLz +0ae12BvFwOnAtUyNnsxNwIAjCedoBWGmHvXtlWbKkopRfmFS9ANB5fPv2WPyV305WPBPsPl/N10M +RAZrS4fIfiSfW4OgS8A+GGKuVulc0xxeGgIBcoidooClvHvgkFQJmtN+nWjZUQcLXqcikH1p9h2Y +AAfN9tc3oLvkmptZ3y0iNCvFAO2ymZX/ffgJynR9KVnaTl64EQmrbLlfzC5ce9mW64OZ8bSeLttJ +TtIes5unX9DHOrh1fmuUaA5We/5QiCtuDcBZUIRdPUWhYFQrZfliyXXWCHle2ZaxpIr0NhwbZa4L +PqZJ6P+PQoJbRCDv6+AVLiEoWb+X6+De7qk6NlCl3B0YsPchKgts+MI/MQtp28grajat+zgjUi9C +HHpgSFYn4lUVtmI0td2YF/1VIWwPac/dzH6paq+tGN2VXhQ2gueWh9YmVHVshkXbEDyH61CApLOw +7qsd7fi+b4Fm2QXen5UStRpPlD2Xytef102uRGzoC0ynH9PEDm8xKmP/IIMnMSIBoGzrzuLTeMwN +8JpeubMVn5UrnkUlcUgG6p+yO5NYDDNgVHoAOMiukG2Xsacat61TWd77XeEiHyvVjryIqR1CJYYb +KHFTxprz0NmglyaRfvX+iwCr3khGnpUI191qGlKY9GPLqGoETKstIT9ntRnZNHzhkl2oaCSjXDw5 +27Nqr68z7580xiu8UmoO7EuxCUj49EAqudO7XEoppljilmfkbd0dOMCKfDebiiOen0AKfL4H52Ev +gN0ua/fqXFbNPsqVTLn2UJmcx7LGSJkAjy6X3OOlDABei3ZZnjQMf8dj3ba9PQdhWQ78IHLbX69H +gxTN6lTyGfzFRVHscw3Or88EgQ3F5MLH7gl5SuLDrPiXSws8uCTM5S6OOFWeitWZR3dGFWmlHkL3 +/OG6uXng8p9ek7NtCJC0ptGnNhlhIwIHoUrb1xhKYhErOLXGYtKprGOBBDJX+ZmQhIIutv8hL/cb +2rnMOHT+z69tz1Yz/k5EVfs4Zkpao0G3dw5y0sa2cNE+zBVW5ZZwmnNC63rsw4E5zXd2lRljF7ji +bHThokKXRcugz5lChEVdrTxxntmRSBtcrEY/bzG0WpvBCiinr48z1yQlkgQJ8sPwDGm+KeTtmtRa +u9/avBF8iPZJSuHbsiVoWTjpbDdmL9lTXIl8yM6R/5B5S0Wrp7Kp6phoy16OWtIES0XWt8zZAme2 +LPtFpf1UAwuHLLJJViKPGBCDVbVelrHyRosssmzw/f4I7IWe67+vk/ZZw+ZpKEatAYmYq2g8xi9Z +qm1ZgA2sZAxzupNhw2stTAQd5nN0LygNg2k3di5BJiKWjZ1CA33RQIKYpxTj4MP1pO/Pr9xyH0XF +re3Jo45WYe8Ei7MRP8FjxQbjjPFhejBN3eixZXLru7ou+IjmXypwhPu2xiA6LJ9P55xo4J79iMlr +wnFgVBHXeHUZ0HbH3PgL+UHtalr0YSjIEGxsy091Ie6S6Jj/VKwSkK8nuzk2CA4oxxmcijA2bCAL +5pzsCJhrBpL/sEDaqDFd9b5xoIh++6slVwqvww/VudQ96pbmk4LbgwYGVVgYbPv4DR7bEBmDdBa3 +a6IzCTcYcTTAefTf6JytfQh2LbhRMOdiYLcYbx3+6fYVggCxvI0LIOcfjT7UwPxinLYePDz8XhQv +AIm/LHZM+TwE9JhqRflIqplG+DdQphs8cz+1g1fk0o423GOdIU1fk6kbsG3V+3UpJl1LvVM3M9/d +gWWoYbHReryQAewUoSHYGlf0+1W72KqKv3dZy/n4RgZ9j1athNfFa2xHVKJ8g4INfQ/H1YlEGgip +S+Qmk1fjFthLMEqLUKHyGJE7EZbC2OpLr4kmobYgjtHt0Fmom+dIqVcwn7RrnywZKFunwSIpmmgf +UePFRyAMx0p9qM4QWurdmH8jFZmFOn6LRD52SJb0AKQKIh69kRJMS5/BHY3wCpjTWc23anEjqYE5 +uJcBM+ZjYdAOPyMRxpwsQ5mQSVlmSU5HCf/xCYcxXcS2wt8amKc0aTZAh/ldasp3w0JigAzKbXp1 +JWgIEawaPz++XaMNnUJ+oOTZjQuwqQ67CmTNWKw1CEfjZuSupGAW79vkq8MQ/o6IYRgg6owwN3pI ++T1VdiiV7Zs9Rjom/XhO5p96ZOZbEikXWCZeE3wGoLmYUajY5kMhPTycuBNs08K8fJk62QrMyc4l +yrJjgk8V5gP6fC4G4RawwJy+cOX6GSmY/+LFCqGMdBG24c1h3NtFCDn+TQR1NHnhRkfuVl3WXGKu +U5lKA8IxHv55bNKdEHdjbINLp7v770wwhpApcG8PgLaGd5U3VKblYTNXNl0sLT7jrnHtt0mBVeDD +mFlK8pMVmXvrdKIWS+XGs0SPyzJESjkCTVrynYAn9B8Gl0a/R0ZX4CY/D3f3y7hrDeTckDASoHG4 +LM+IrBmek6Kc02rUmRWuRkYoFZBj12Mfjo2GGzhbCvPmK+ISt/Ev9RrJCC5oT3bCJeMsLlK5pxo3 +Ep30nfHHH3CItZUy2mAgEeltfWpdDKvjyWbspTxxesqoaAP88Fs8TVynGaOK914zNyEhQo3dAMDw +iAeVAolABDMjcJbSAtG5KjE/LZlKJkmMwFrL5xnlpHUStYSVyqGzTiFCcKnEGbxHIe//a/f9Ay50 +yZiZo2066YmOV6DAi2tPeN8g4xdfKTCYdXMNE6/l7SPeEl0yG1OHNkcowvR3xvr4CcEpg6Gv7ohN +RBRatKm13iMU+sWD7M3NU7K/Rnk7Fqnl+isDHPDrZC/rGLXLp/Ba/2nNjTju0Cd8eVGLWuNBj3BW +o0TAzJcdI29DfD4B0md1BPVx6wYp+wpJK96LWtNkW2xzkXTLD84sLkkp5cCydR9IT93wI4bbO7RT +SxgAEH5DB9bmRB3x1ESy4dsMD8ZrZ+0rAUZeO39MP91ApryjAYQYGJPx3zXxvydmQztlVHdBAl36 +z+Yy3hVWZeUakKFZq80HhNUuj70YyqqZQ80HB3VYXRywoqDRSsq7SthkpedEx5h/9gCqId8/lVht +kuj6qYeKivqY7a/j0yEDSaAdzP9qIUMfxgA/zLpq/H3XtJlzkBlabGiNik72HQ4aKeNG/6A7ae+y +KBdTB7H+1bmAlFXv8S3miahXI4CJ9VqyUDCsmjftWFA6R4u3zkAGAa+TOYqvPAlakKCgx8TQzdXo +tiq+LbTJYoFa/v3sRwDDFHXkTwSWEp+dVf3Ziw3FLE8eM74duQy6qWzs0Wqobi5NT+PmwhaprXMw +5DLqSv1cOso1dsr3Vz77+BihaxrNj1DSGC0QJyL7rGV1kot5rFOXW/Pvd5MP0AHVGGN7KC2eByuA +WyP8fwQdjGO5hFHzlXMtWzasNeWDnNNPnrzUOLKgWQ3y68QQHMQykEczIDAygPd2VJMr9KTSaDpa +NhhAgZYBJUszjoXYjOeUOolmiz0edkR7J1SAYI1uUZ1iWT+KkyinsWq2q9WEYzEJxWeLsfDSuKUG +aEVGiw8huQB6YGRNGAQzhAlJUZm9a7X27s/5SvxCUb27e5L4OlHcEgUHNbyS+NMB7NhvWGM7JN71 +f6PZAkgZcwZjLAgrHOP5lXiAa+W/KMMrmdV3cgBn8ltfQltenePqQHPW5n7nw7TqBmdf6H5xCm/C +z1KrBCUSKKCAJEqqBTX2mPWv5OED4/KuZN4twoRvvAWW5HsDFCtll69P/YPCq7HqjBAj7ROq/iOi +2I+WmOxPqyhkirAOlfEAxzUv+V1sBvvHd7owMLnGZOvuNwx2feVf3l9iAwl9AXldSpIczIq3erYx +vhk9jUcLjj9G/OHl5yM66DxG63xlj1TtTBxGNtW+cRDmemXTq+4wJbFsg+LZDsyIZaFFsjrVdeGH ++0PHW/xhVlvB6yPZVwWoXXWMU855P8U0jk+bjehoWPRNKY5iXaM34zkKf2J/Gp353pdp1bdDPYEV +8gZ3Q4NFTSrds+RuPxM3ec99p7H3F29VQQVCz9CF7fetL5dPIvvzV1nhoMGYRBNPTS9oWZqd2f2J +L3VFdB7DmEId41rP5ClKnQQ/XC6tF1Ldy8nwV7DjD334TATWU+wf5vRj2JsBaUFzA1Zx/bcQLWW/ +s2nriVXlbnJ8cZvNhGWB6Bvdh5MJTywhdMXbrTNysqaxbc1soBYtjHHR2qJw4lTSLCtZ4FoTtePg +CjaAcUalK9EV5DCoH4MQ1w+bq/LaySN8+1cz0p29AGf33iXW6NYZ/U7XqCbYoY0OZ6+sHm/f3vWH +SnNGQ7L1oDEknsh+5g5qoKGxCCfi6nuvHUS7l0HA80llsIwRqM3n2gp7eWB/ELK40rKOAaOeDXQy +BqYJIfwqLhCLJRubHnUS6ekzXY7h5Dp20q1tHKzqm7IvaCtx46fw4CLp6MuqYuqmHEQFqOVRAGQd +X9ACAqPIYI6o0kDParLWqworbvysOLXXEVOhZYQ/BYT8V6wZUpv+M8O8qGRaPHgmZQx7RTKP1HOf +BWNpvjPCcNNsHcksa9DfAbKddVuLk5gHbCO9hyvjckaGPkH/eQ6qagI/YrM5Vy6kGeGHkIu1I+Oy +xjLA7zPqmO9Ett8OJvcBA7Bnvb5LHvK52voLOcZ68a6IL6BCxpjod0xTStFifh+v8mHwDbc0eKgW +rpvZJIo761HNsNZu8dwXCUda/BFXMakL1a13Bi1QIzYq7yNsEQMLvDTYwsmxn/JRjRtY5nXdqu79 +ZQLWjyxBvBnH+j9YnNpRysPCe60v5l5ozTwlk7VCQky9Q1EN0JfRM7a33k2bnR3/fC3S7K8Cq/8D +kEBwxkN63Uv7qUmrlJ1TrD+jqtdsABK7JBCDRHKRKrRqG6KLwmkO8SD5ZRfzphfgm/5dTmsZNci2 +N+rcYFdEu3MTXB7ieum51WaOl2o9W+N8/e1rabVAd8W8U1UQMil5QR5TK24jgFDJqFq2y6lsUJzf +qO5pMSHS1aotzAtOK2Tb7mmDxXp7ocnZmNBtZbgNqgql6vAXEZRrkmSgdsnuyWJr400uopH0g0+/ +hSZmiVEFC9ccNU3UMFnisB73zLcH2irwulq6qCjqkeR/vTxORBXjq27us07/zRkU8Zu1eTi2K5vY +goxNv1ZIpd2t00tT0zDtnXCK1UTSVyQJSvxPP9ZxlO+UWpqDxwTXp4had/RXLDVu1ehbVlIIHCCH +81N4jgMbjqOK6WjyBU9qRZIyHvekaMM9BHJVLcHdPxIjr4SL2Y6yDrVnk/JsUwf0IZWTNdWEZR+J +S6Z/0RYdNAyQ9hhX5xWZj/VbWXFhGEvM9ZVSrvX8EhZ2zTnu4q/Nyr7FfCMHmaWX3wEttHd9EJl/ ++OFpDO+06Lt6EsxhK1eN6ZXLfFzbcLuktrfyh2pCxg33OgsHeEZ5K7Ixmy5Xj0xvHTAPzjv+cljF +/seuGwyk3zbfROobIKP+GW1lmd590PEhShA+p6w7pUttAFnGj0KiZV5/+upX1LcDPlvZVxZ9iTyG +7uYdUqI8SBt1Ye8ANIOwdU/6oYSaV1ywu2YZABV34E08da/7WRV/uzEAEQ8Dbb8rzPCxEdbLT8+y +cxOG1OD8E0xDG6ie88rRTxVVjOUBAjqaKGmLJBDgxjaoPk46nUxrqJ3tHQLc+5PDixsE47LZASfM +MR2KRf6OcJX7djZdZh8YHwKN8Xo6yuAZiOhHd2D2psaG1QTSufO4M6JR0pbF0VsiFzk5vjx0wU82 +YR9d6HESh2VQ2nqYs0E2jSWXiYDSKOosGZR4W86d8Tlti5dYqLRMGFImM/viT8F4+okjfAAdQWg5 +QIWlQPhPT3mzw0fs9Vy4r2C88gS0mxVj4NB9n2fGhxiDpBKUCyS5/CEVSrjM4cIKcWH7EU88xxEu +orwcIRV4S2Ap71WP/XitUmQn05XO5I1rbLuaRbhaW5xhqQ6V94Kq1bYuoxmyu/elfuJ/LAzLvZ2W +9NXxas6beN9NP5JqtcpiTouurqg6BbUkGvJnaTWMyVyLFLWYt7Pzl7ve334QlJ5/143NewX8uVAV +xHvOWnpbuX89gg1N3p7ba65BkHGMiJbfi3rxv7WSNvoIAICrWzp7FcotuntYAZnACz+OFpQtNhV6 +HpzQpc25HBLi1cuDIHbN2s3ykjiDUhZ1xeK+To+FethkOjICR9NaS1oVpR70LxDrMdWQpoQFMGOL +2Ee8Oo/Z5jqFOGlJYu7tgHodpP/LzB2nwbxini7n8mDIc9y1EBmQ+qC8NFIZif4Q6Pqpyzaui/Un +apgK/5Jj530xSqzy4owvXLeQvEikRu9Lft6MmVHpziOb2SPWI8DlzqhY3lgYOUdAJGERWlx+Y72t +Uc1N4cf7p5xiHfB08VrpsSjeMJv6pGeUQyaae3PmkK9zyZihy9QLR+JHGI8gov7uYuFbWkct5LAz +LHd3VACtyVoYIO8LPf424yqS9SZq37DzuuKZ4rGrqrxIneCJ5W5I4fqVRJtmnjAsC1iNu3w5KiUL +KBfH0O+GKO4R6dlAMT39ItWdOG0LwPWK8qrMbdOJucs+TbXoVUWnb/B6dxXXxIefA4QVvA93/4WO +rely22YxnwbvoSsADUWFTAjSwJv3YaIN0rlHHDr7JEC/YTcBc7z6vljxs0B/yaLf1+RJfAdFUIFt +ou2Etf4ziEfcWjvQgIC3U5ljbZtUAwR1ZuriGWQlkLKoQ2sW2AysIMaNdWkv7cDQKXUH8Y9FIuhP +TwZA1tcdEX3oAeMorJNB7tAnaokkxi7P2p3KBPcUKrs/H0crVtHB6lHQicLUTrvLUBd4yNF5S5yF +8lXTQUzzVlCvSuZ8jRB/+itCkmvUSRB6jm0DEFrufRe9DOwkFTYEkCBdA2ivrqdwzT0WNXnVpdGB +/PgEY1Sos+FHCCjORAqFiIXgx13dq1k6oqGVYyMoab4Q3+jNfV2DQw4EwKuaV5eipbCHyNmUthYa +Ih7sRScWXTap9FfuoTjuKglBly/jhPnzleDGsAuxu8G56fdTvxkLO95hT6uwVm/YEwM0loI7cGoj +faipjkvLxvFfZ6snEWT0OenzAiHyH+GvuBDSDYMpys5SGjaQdnLrhc/tXvjUnkmTCkw6ABjwLmav +mssIpKvrFEm+QEnziTpg246utLIRd5SKbrwl9KCYIwkyeuViI0KDDHgFthDcLlQx7MI/JNUbISjh +HET5b2SVW1FQMexZ0iHA22HN9hYY52I8oy8b65doBCS9CMs45gMJ5gJTzt08ul70o0M5lqAX0SZB +Fk5De1Z8wcMDJFcMK4swI1Rl5iOG+NKI12cVDagTk1kTAlK7YjAtBCNOgx978nDhph9Ua5YT1qgJ +clZRbwM/ABJjUTOmr3lgx2MPmrmATjj3GmAfgUzMijJS5o2eYwVtxMD6CvZ37CgFPu8A+2325Nnr +go6nqBmng9PeyKa8K4Q/03hgXTLIdIOsGRtReRGyRe91aWfkpxwl9fmQ2adM2hvL2NgBl3fHyAgY +R5mB9FDVq1zqGMomufnKojGfCJireLWL2vHYOwaKTqZ9xyDjFByGTGpXKUjDhahkXMPNde1YDC7j +AvNJN++XH5c6QUcF+x2TwL0KCFMUxIpiTO/08jNUXuUZPQDbbfortST3oCkWs4iEmnC/WrOfwmL4 +53fcAqvOLCugoBZQQ4wGya23c/BhnAQYADZpJp07PF8CAQD0BbJdm7yRV7lwhD3BxZX3G39C7AZ9 +z//kAKhuKc3Aug5JfsOMU2o7Vu8n76O17keO7OoNTYy3vG9cACoBioNBc8XsmMnbzVqwfZ61fjwm +TWAw/ygiMOtXfnhJvUT4yqnYOp3M006KnN6R7D7EJf32S1We+82ZWXLDrPhJnlJmEmsJtcD5JcRj +vWdNYrOVqIwdwqWPRPKl7Kojh3u3itXDlJ1iaPm4zKMW5IwYc17LT/jiBksnfE8rJgVBFHrRrloL +hENanQ2stDnn2LkN6Jt8IIWuftpX+4cgMo+9HpEJBU8c6lMbmuoQfvL1cXxVyE/HMIjJWMl+rpB6 +SJAD7LuSDN4kT1CxbCrtdRUWXPUegT1yfcnFbS2JEvVZ6ugvA2KGg+gL6KiQQyee+JaJnOREpCcp +SJy1Lpue+Lr2En+a2wyR2Sr4l/Qkp3SMUawLTOHIKoE1Uc2Y3D9oWSabhQowMTlEzRYwI/RQB5A0 +HcwWARS2bCJXQIJHGjrU+UpruRGFjV9iFYWMbPRTTgtDc2UMy+htS3u0WgiB+zWO3kqdxSK2811s +A1bAHwndfl3jAppX5ixvQlbmxEpLb/bld79zX8AQYQPt6rlA64MoD9zmjDYK1sCbA737aEhBvxZr +6TpMv8B4RuudzIj2cTx7/BP/heaKulxbt01XFQA82Yej0merA2YN5rjjWlUAcMgquwCI245ZzOul +Yu1m/ycJko+gHxIGKh9ZCxc32aVdhWwacTKvwAOmkt0xtANcK9FSANso7JAxwxzVVjEx9T2GYqh4 +h6o38jUyiMVdBP6PIFY4oLAVrbt38vkgoGdeBe+nXyU/dbcj7jFXcIbIzcT/bVSZdMPe07Tt0nkH +sbeZdg5N+CSxkeVIP43YLVsdPrrczhoZjnkj7HTQU2Yo7h26Mioee5MOc73oH2NafAAgmlmxa39r +S6kHZdIWyiSLk3usM4B11kZeOmegkydXNREiVcX4WSRnmP6ToxotD4fNGJI56buRkG/i2QTmkgoL +9Et0H1kerNLM2kG72JQY5cZAJDizvy8qvUNdPTfDhYDC/tGFQWBOiCEldhaD5+2QXgVBhb8cj5vo +zxanw9o5QPA8UXQRUX74lMQbQloplAZACPTTbVF2Z5xhzv+bwcEQr3+59031gKtVrRR1ZL1OBRLS +gik8kir+RQd8RaRavSsEeHOZ6dpTf3yh3TotfSpeqIM0A78Kg8f6T/8rwHWTv6vQGUbnZowfHzpp +X2gHHZByXvCk54LcskB5528+7DCD1tKjladB0pBHf5RQo0dLw3Mqtlee6RN3evoWzN9zxufC1NOV +n1D0aitQbU5w/2oQb12GsaL4uDp4Ibgg1bEfGjqhfFj39EJ4oGNIM63UF9xpO5lHQZHVfEX/Cs2H +fiWaVXANveRG58vr2PJZD6lorMDkWupl+ang6poU2C2o1vDo93SvcKxZNU6wuC1Mv8Kz4NYyFZPD +CdmUiRDtYeqq02OuQbX0rzR2gXRejcHoN6eATRkLe6GuoMnqeCsTlMS3c2gs0fNvVvhe8H70waNq +WoLrowTmShwQGAoPPPBsYzENJeFk1Y9zcYAkBTeLPqLGLHtwGtlsT4fjy97xAXETfplB6eg9PAKm +po//Q0ssrKrRKirV14si6/KM2n8oeQNpa70BAcEXJLEBg39wIMFRczsVLwtz+oBeyIQSn4QxFLVb +B/3sV7R0Wasv4WZksLsua+dWqLEJK3zENesQURuTiPMoHLlCGWw7eNlnJMzuchGU7w9FfvkvhnfY +SKCi+Oi4ZrXtKPoqUHwHUnXBE4lIL5kj9YtsYp66VJLSBjtszFJs2vPNZ3QZcCRO3NrCKUu4EtFb +3xymWpVFpppoL03i6EqrfICRWIuOzE8RsjHpkVB+PKP7jt+CR7xQgEg5L9TtyVi+8u8ZhBmGF3IA +a3S38VPvGwhvLbNtwLeWUbiAAZSDXoHiwxeTiNSdBilY6GU0F7U9d4N4GRPiY3+kY7IfMUfHZJMy +q8fwldEBKHbhQA9sBho68HP/pH9j+sSbnipQRWb+kF67vgV6uKBt2cDOrINrVGmBJUkBKIo/+3N3 +b5G6QBced9yeYiKF0JUGbbZGMuxwFj1Z9mxKa4lkplnpLIjPqUkJM/WBwC+MN04eaQ49NsltZdcE +gZCAHO5T+DTrP1hy7EHKXa8R6q6DbJhAZD0+N9niOlhP0cBSNcFHKylQyHYezzIeJ2bXVyTZnDVT +fkk3AnCn2VAF5lil40xS8sPlyCRGKXDBG8x5W9Y1Kvtf1vFqEYcsNz321nfS0Vz5JZKRD494YqnP +AQw3+tpLJALPMzJ0EBcTxRG7hfuwBR0GS4FluY6AFli5zJpJMIOUrztKV8DOYIqHHbos7tK17Va/ +KHAuufkE2Bv26q7pE5bxo+tZ1FMwJOyov8VwSQCemuiTE/y4gbzvzIsc8GfpNGmxIhJ3x90yiDgp +bSdhJF5QNVBTsCunVkONdyESabaYeX6KT+JVYJ+SKV0Qoq0IdXMzrvP3oV4HT8Xh+qt0u3CsUWvO +MdTL+d8kCJx25zGPLnIbi52h7/hQl3r8K5OO+P2c0gDpxEKqbmkCMF/8Zl294Ta89ONn/tBhAiY1 ++JS/wzkHwajfCUcGwM3tfaHjvDDrJyCtoKPCRRNmBertMCghP4NNtQl/xXh39N0z+RAHqYDK7RAO +eLHEO3lDldIxpnlibur9eEwtAvFxgy1hzorInZesOAHzxR7nUPFtVtfxF2jL3uEf3lR6Wx/S6/XW +02uwdAfR0LTt5T1Hzbt4PXLU0at7D0iFclQqMbBVG6UI3rwCfy4kceTgmE6so3b7XwFGkOP3Iy+c +Ry4e/QPDE2/B3LzOnnCtEkhFOA/R8TKk2JPMfA1/+O+jXMy/oToOibMir3xti+kbv+N4SrdcwJfM +JziEV32gcHK1E/9HwErdIbiwBnCw+JyIAdrKcoTeVsNibtmQddg1C9n8qlz8vw2gAxjERddAubi6 +/ypT1KItBLoMXGNDPF2ZeTogZfPkEmti1foo5G3pUiOW69AgQUO/qN5xCLO5uVKX+ZKWPKxpmtCL +dC3czig4Ty8B0MttGON//anglypPNlgYX1QtTGhaO+oRXoA4vXSPKmjt3SK8i3ygamO4WPs+6bQS +NJu4yBKeS9EyPnTzjR20izM9bWMjPni+BsQYNeHplVvF9SWwafEwF947qzh+e7GQ4BkNAShdlUNy +YFPrXH7uHLnHu0I7Eyuss6HplmqZ9DfixFxsXW7veXoBKMwPbAVUmHMbHJcO3gauM8A2aMyoPBnP +kZB7O0OHmw4MUnoMKQghn6Ueh+wOY5AeK2uPRf1CHsqoTs+O4HEYrnQHZ4VXR+vcDR3OvHHWI/j4 +H47SWxOLuI2FnS5doERDcUsPo8xyHrP4rXUYYmcx0TXGrx/iKd8n9qe9qdkZfI52A8csxuFIP1My +PSJ35pmvKL/GtXQuIThz1fiTlAU9ZmLkQi6g5GzqT0lF5FqHT/p0fhMhDlyqfDVM+Ie5Pu0joEkt +1y6Q57f4Mgs/HhNpuvS9w/ZkF7IfduanfJrQilN4WxeEZawYz0jBc/kRzavS8Us9ophFE8KFlqvW +LY8hq6JgwofNyEHxXWFfCT1DYGeT7B+yQLa0s8SNSO2NnvTv1Fu8x5R9swFmKacKXuDG6OUT/ZOf +VY3bgHqMWflRKK6PltXemWNGPNp6DwLK/ET0stl2RMITu6c/04nv+vLOrflhQbyba/vesR9J81pC +iUBe0EMC9mGmLZdpWWI0Da9TEdxbdfKbprloabPfuDUDTauOicO8gun6+koz8MHTg6xgiYZtsuA9 +qpk6hEWHLj4iTrA4+zy2piM8hCunO+8wgP/sWBzkpszi+++LxksRsSg6hOSNFP8XTBXnvIgyTrte +2JmBX+AHy4Ho5X5TIbC0xIkCJJMlg5hsApA42rERZ4DcudXTU2qFy4S/rtGC5gYpdFjMqKCn/hlT +imQ7t7ucC+ejK1CGgtX7iiI75FNXNVE2/11la+TDbZj0fy3ozJ+GOpHEAXyy5QBk1v6si0gSW/9Y +4F1hiWbUqA9iA/sKHaArmV2Xy79GOi0KyPUcB1KD2IoigPByY8sJrm3t8m2gTXFwKXU7GqqaGteI +D6jEND5kjtehi2zas24Nk3HsKOXxaFya4ovDAe/6KnjuojztkcbVn2XBJ6L36NAY0QtA+XEOHpWA +hf/gtCVXi2689O79h3nw2abMccsJMaRtqLscn7zzMR3DLaqoU3IoDWJmE09WsfhASb4dFK/eHw7V +NMHH+kHe+L0d3OsMsC38XkXKZP0TDCDms1JUopYgHZS+gTtxzjy40z/0l9Z08OTh+X2mujz0nPEJ +iSzt35naQiDar5Lh2FtIXTGEeq0uIO8qZd9TDP4XfxAJOqISDTkHN/K3fd5o7uRE3ShTtNfNmbAH +aGBL7PX609cFd/YDv1pqYaGcmxdNvnJSRJqY//I7RDlV+cyHySxZFx6nef4vNI37ypJ/88VBR+ez +apSH2Ww32QtKcILi0cMTKyQim8NMwt2ANZ54PWDkzQ43qYok+jXV3C4pIYx8RfM7QJIkHa/m8FZ0 +3XDvYPReBDYmk4tAWwF6Yui9b0TCgMOsc77H/LhH0veBTcYNbAJvgk2OWDVo1fLA7kWqoHBaAlm6 +oF76U+GvnaPDgzpd2rX5dAIwEyTdx5QTBDQ0ETMOOV8yr51pq6mPolLv+5t9KtYWfHDVOsbaFmB9 +wKUrSB9/zi0NUPtaFSrMWqlgWuIMYCqyzeZ1g0QapSYoFtooBbjtCCQOx/QQWdHW2k3+KP7KS0b/ +yBSssOYBKJvdpCkLIOCDBxRRm7peoKJnXEF+Dcgn4pbf/8bdlbxlKP6upmQ3M56spaqgcc6fEVqM +g+47aLxiMPpmi1ZTxrsSbSV17PfI4c0M0f3QDllXrD+Jcszv/fQ8m/RY2kG/mpvKUIH0nfOeXhqx +UnX0StPKUXd6BgtB6flhYC68DBmBU3Gtv8aMAnCQrMkIn27Y6LSnn7drQtJ0MXwBEFHYLt2ViB97 +odpuxWNc9Qd0RYwhezI7rWHvB/UWZLACl03MkUgou1ABJ8NTmbjzhkhpZivrr4Tloer7ZzDdH3SE +20JMDBJTdfeYJ+qTXUySagCcG1r9+bErkDE4eD0CXnWAvG0rsuASk2cblC/5mmwsopHZ/hqr8RZO +XPZz+3RfMcteIfEZzd334Woh11mEZzcm9lVVyDyvOlXb1hEhcm95mGEgylXer/mH3A024PiQYUG3 +dUAa5w6GCneztH+W5Yrj+kE9FJgr1tXeyoCY2uSO7yBRA6Lk2LRicy8Veas1lRzEzFqt0Mh6toR4 +zHBwI9zWnCAjEKjndQJ4Y0XqS+hM/AupfwqZdflnwqctSZUZDu8f19l/x+v45AmYS5xlyfr0FrHz +/vKW7yHRffzl9wuX+Vx/Y/Ab7w/uTmzzaUySQZKAUY4IeIYDDfFl+leg/TMc+VCIL31IPA4UUmz9 +6486r5JyCQnaSJkbnQL3sacSKUvA5n8MxfDYhlP5YfKsxnPNY/v9H4uBvkUEiSgHgYcVFEuPRCer +xY0n4d+FW9anTXkGWZcKJATfkibdJih2vkIhrq2C5BACOadMq7vHCrMPPDQlqI5AocL9GvyNOAwg +s9pDs/p5Q54geZ/cMJcv6WQbUUa9Pen2fe/d5g9HhCD8wzLDo0Du5stzBqYGbxCkIH/c6mo+Y4MN +6qaMb1sRwg0pOk6NHdHrsTYbHL9lq0awH9EIrC2Qa5bGpr1yRV3HYMk0ZwGsNS2aQTwVJ/6JBspX +BiADgdJk8icnZ+IdVGFITthUQb8uFev3Hxb+AJNGw36uzYaGXqOaXtobmekbhgGMKRNHrgi+f/sC +BbBzb7xJoi2hLBvSwzN6RjszuSPtKlmjw4IYML//j+1bvWjr2FkAzVGjf1I3syXw9Uih0FPUvQZu +lZb1NyE8DbEuZEYVRkX9YGFjIAhwltE0k5SPPlkbm7Pd+kMukaFks/a352ctwxv5jGohuMk7nq8W +vo5vRCAIwzo0SGKN8dtxFZQAe2haLeJoOdRY9EkPdXRmUj9tyXw49La9VGKOYUaUNkgexcnz2j9g +GTrCzp8zmQ0SKVl/1QAnoYCWLPfSSFutWEvo9ebd5R5GFDBqJbFti5fM9irOMRZFqpoMwpnfZ6IV +BnLC233rAFW987D7+q8D00JmhdXeMjP1UjqxQ4ByR2fFUuNi9RSEadmMNMlBWERjt8Hm7eYdPftz +BL4IUjn0bdN4lEtTFISIU1+5cOB+dfyhMc/V2WoqE/rLHrTRowFeXLX8r84yCZD54ng4Oww1MHGy +u3PmNC0Zol/fILf34LWZVzve3e84bpBrLv+Yjas6CVKA4yANcj3Wl/Hwq9epom7qdaE+InrmX9MC +pGpxcLPaYQjFh8PJAH7rT1jiMaY2M4IQSWdjbQKwIIU2ypCBi2z7Rl9SMz/g3kvIK9Yx+jLLnwc3 +5DiOf67PQM/XlkziIUz3UYhShSYEYsN/5FZKLQVf87VLa5r4gTrK9IepFNLFCkNeolFovbmHFtjU +0q1OYqSIRvik/6wA4NnmfRUaMSQrpxUBqXgTjPx8MHDWz2YH2vMjvGHR6tUtT/f1PIDNrmY3WgBm +oPJDdd4tL7f3m4OoXSkTNCeRmVSqxcPFV4m1Jw+zXLUBY/u/8DFKNzIV7xtwFgIxygmnCE5sBwcN +lt4NEermja48oUaoQLNnuSo2IV68/2FkscglJr45xGdt/8qTRhSXzOlIG7b38aqPqaTrwgMmcbPa +AKj7csxgx5CCog8vaLe5NFiGhk555zkq1YmrOpkDnkUJSahKX8NOmSGD2ktr8tFsBz5g5U6pqFmi +Btrxrbo5q1Ul//HVhITMnr763IHDBMEkXwNB/hjCNAygrF+gfmFoUyBObeAU/qB49FXo4Mye1STv +GL1cwhV08LeM0/KIAj52yx0qaRYk7zHroLK6cyLSrb+a5j8/U7z5rdRHrru0x1C7FlUpUxYYeULe +y7hVSLrAuqi6eH6h5WuzxlUXqjzTFPcqm0jJcQOCRjuhF9Q3ydEOmCABFHIU+A0uh+FbV2M6a3+e +FDqgVzio80uDh3bTLS35rnVf4RXhOyQ1KIM8EAbxoobEBWzjUe4U739l/1eVC2rkC95hykCsONtS +ZF+ItmjyQX+QVO1tlT/JWBtoQV9Vj8bJxnv0GcA70oFBrvDW9zVS514xlNzo4ltwHpPM3Mc6EB28 +WxmeGKVJSfxy+TtkOzlT1Gwfz0Juz49vYA9DkZ0Fsd/zjazTP+X9//1qQtJ9Jf1UQ3MwB42agzVf +Q3mQcBnMpjhwOte/j0X/k8YVVZaX27rLbkVS56jzURmJtMhycf/rIsin8+dcXYF/DG1fvfxk5BV3 +6dyicJ9cB9CGy3pKz/ctnDT6hoLgfRMVqkpWlifJ1/D5mMHEdr/rXAdShYW1SpdvdOuHOpm+/527 +t8F4XJoXUQCKhPcZXw3X0U0UAvZDtm8YT1Gwm+tk2H78u/83t2JTzM0PcHmt/829v271JhrD71Ew +pDa9Osq65ip6USvTuABvrXmhkqmbll4SCN6VtZXE47jVTjQ8n6bCrudY/UfCL5gL5ORDdmrwYJ4E +M1SSaZFd3p5tv02J4+jfHNZqwNaXRIuBM275S+WctkVduACR87t7pYP+5Ltzbm3x85fALhAw4SZs +qaixkyz4uEBdTO+EKYnvGeOCExjosm1oZD/s6oEd53O/ec9MGCN+QKZG+XjYCs+k7phleqj/tlWh +eSb6sCOiKjo3VmfR7XmIRjZZnffLiJVWr8E8O63F7ckO8lJyEMCJbUHXalQwvRm/VTyqDWxwQcK7 +R1iEcxVP1AKo2mkAQDHB2udn3q4qTGMBxoaVb9mrBONUZwmFpIBuzFFliE8L7YzVeNIDuTVPj1Rx ++jnseGZ/Dnu9FQKCUr3Ou6A3M4E1G1NxgWD5tYRgTDAY17NQFpdQNRr6NyQYLAUHd+ZU7KwfL9NN +oeZKabhtLjIygSGilYZnsMnbmkRKGud0Qj6yA1JgB2ZKSTzuqirgXNGr/tpDeJV50+LkWolDNhy1 +FPjTfCtapAjWu6KcTr6P9ZrAPP4/6wg9N2Z8k8xy6bIUj/64KSa68Hbby40M4p7NAr3kDL17PgBL +mKrWeCP2bRUy95zvpoLpCXgL3APW29dZPKgkDHTPf68zyckHr4gyh9Y6y2i8SVDR9woM+lZ+mWeh +DZDseu1h+N69u6C4wLjKeaUHTSIEztv68P3pPbJKZBjFuAIxLbwJrGaOcf80IF8FGafA/z/3wATG +6cs1pmB7s4nku6ou+km9oJ2yO5/JR5ntGiSdN7mGwl6AiumWfR7uhtc9BBBrd2MupfQvV6XZ1RGp +z//EIDbFXffXR1VD/HZa8/ZnOHjoro+WQsOm3q0ywW5NHnxngaWkHLmHciOvyz3ug3VEiv2LGwsR +hwPx/r2ybN2PevprpO076oENRgQEpjK5VDJHvYujyENJTAkzEl08p/bqEd5CN0WNx2TrRCp5o6en +VfGwPHThf4bV/ZGAh+0/EWJt9XV7ocxL1zGX4RZ5Fm4dmWwDW64RdO6EJJ6LkgcHH1EyABUi8Hbv +Mja55dD2DOi2d7XIKC+2uPU5ZxMcIsm4Ou5jTfAUkUG39a2rccUrn8Fx0lyuJX6mZHfv7vjZAHRM +7CxB3xD0dKB0qn0ZbCsauYFajlGkAVuU+lCUmeeXvrrtq91U6Y/X32V6RHR63xBiyBSdodjKdwGG +/t6xy0fIRXIGfxgGa5VXQyCmkdY+Wt4uB9SXbaEDxsMYRjS0IcOUSmqn4crP9wJF4utPKlnS8bXq +ZguZu94k5xn7vkqPHlk8BxOrWJVH93PGwsz3wabYV9ifgpWgDz39sTCzO25plDbJt7+6i72GqgbK +9BlhJUJzIB0ppUPOOkPn2lGg6iTdvFtoMDBtiTCSyljYjn/PggPAspEER+eUSuSMtP6VMaNSg+o3 +0/c+QRUutNtSQrX65kSUoo9/Rzk1s+CSjPevwIbWEE3XIsjk15jJ/6Q4ChefsMK1nO5ExUV8fGFo ++HNYHghPWzYUCLs8b86SUoUMpG7tIEKvSv41broBEETVZfMK7OFTZYJxXh7aPtdxoRqnYJBwQr7g +5gkcsc5pzILH0x04GLgtRjwkW5ZrPeuHf0Cb2cDnuTPkDKDxGMvQY9VGD2eqL6tH0zqORz0Mo9KW +ymg/zNbVdh9Fns2xJ+OScY4c/xSyELo6Q2tYq+FTsZG0XmGKwxZu2E2egu+GiH3FFVweyHolDlex +gdYUQPxQwhAFGVi0aBeYpfpg/wmVJFMQywBNPYzJ7jVhhcgdszy/iEY+q/ThDejENo3/BraVgbbM +7QBk6/kuJrYv5YoQiC6BnX8k8q9rL9GFnD2ssTyfWk8aWzCZNO/yTSzrpvihQQRLHe51AYOcoqqz +xFqtWrMAZOp67Q9dYI8gQeec77Sd4kcFeAgjU1UzNGT1QjBrlczd+4igTkL6d/ktPOf619pUwYHi +oz98DAd+XNDHs3ArVW40/XLBxFdDIn8Lh598f0Oa/js7v27aG/FHF6kbuz/GGNZae+fxZ55Gh6h5 +RuBDp6T831DsTzf+wvfXlCrjz+9mTrl+0qWUCwGDDQo+4dxenSiOI5GY9HYfwzODTdZ22ovZz9r9 +pRLhZVDg/SK5/REPc4W67ZkmPF4CUNVM4XTkhUvBwF7p79UFYdZ7rGunsD04jj0RLRMos/Uyfi9d +Uq8RayVCW5+mZ1848uGTr++PnPOjvVwZ0diTBYQDDstkNw6y4v9ERKiiU1OXxjd9+OD7yJETVxSU +6/c9OJBrHjze1UQqw/j3HYB7z8c/jgMQDRfEzrt5651384jRXvwl9slpYDrCOXfaBKbL7/vUF12h +AE5z/sTRlfcxN9gRltetVcsZZKmhRM9iLkNfVf/09/G19cXuIMmqNLEKJlpVapiAvVcOOrIxWFDi +Clct8bCQxp34UD+fuFgNBDRN1mzoEt5PfUyM+uIiOowVjclNPeK0bTLCQkTHgRG5qDcu5SpFTnKJ +zjSF/ONjbfzAe7oJfqF/z5ER4wC1GGiGeS+aTkEgKL7iygBpEXbKHe7MjoJR3yB0jXe4vpoFrAvP +tn/TRkEys4VyYtDHEo2NoYvmbT4rrJMDg6HHU6J8PYUu802c1xFE5RLXkpiA84D/+zIc4FG6k9Wb +nqDiqjJsaiRcHeYTY8eukG/fwIEEdIiz0NZv39pOBGZc+CAd7cWQ1wa36y1/T4jVjDTTJ2ZUfYH3 +mJ3UdxoD4Pu8gs/+9BGMOvR6a9XrU8JJSEP/iZzRghdeuBwx8d0qD/ki1xqeomPeigGlOd5KfvWn +DiX2lcxQYSC8jTsTz43WQUHrENBEE1rt/2ADGZxZJvyGjDYR1J7dmieDF0Lt5ao0RsfPinFB4453 +W73LpaYoJuDQjCN2Q9sDSdhZDSmqGo6uv/BUwecZiGIYNSoSRlM8xaBdAGd7gSF1vNrQlC+8Xj7Z +9rkYg8L0k/JtUjQyitMrP31lTwMzVKl8ngFhLdDx8zfAFimfChKlE4R6//e89DEWpifyRdZcVAWX +FWwm0U5c1PhjX44qy9B4MpC4lSMyESZpoPcttXU9+XmyUHoF9ANbnZhpe8cJRr63/1I2svTv0z0r +INZmt6hZ66vF2pMG3cPYkHB8Nv3gLwEwkhIuMHZnF+3zJQZ63V+Z0DyyxlQiGDJk7u4irxxAaNBP +oCZdjqDmzCj0JwLOGbIFWrhKssZJdi4gpiARhmLjy/+dKQstKnWn1v2QQlhcWVyD2kgUwpEw7ahS +hgsAs9nmChMrjMuAFZh0/j7DyLL+q1Oi71cMvdefRpNNE/pTXhLhn4h8VejS9TTgNB/XBqs6omlz +h0SQOB04otNiIM9bvaLYEFFLF5oWOUURbcbmWdTmdrFJwPXPA7ei93V6ap0Wyw7lRNebx6gznU02 +I/dqvluNhe9KOK+njJ8jR+HFvfAsCJVs4K5wmqbJ5tALwCNvjwOp4tQfz7gQEs7AJ2oup7iF+kqb +x2NoAG6atLnNa/Tsw8CdKB169GpmjX+lfpPOVgB1gjPcwfDkYQXD1tfGbo7YVDowYFRsd06vWbJX +g1qnTSC0gCt9JbHAs2f2mr94U6kFovxFx3AucNpvb9viTUwQlxXkY7Z8PWDRTk/FOm/sKEis2WQi +SkLXOBT9pnwunwjcU4bil5w5jRFPOyJggRtZul4WxxoS4H7LYHdAqpCNIXWEsVaxgNRUzETRe+zH ++MTYZxWrQFMSmwH1ekyWV6iTrMjcQXMg4A6dAeeRR/tlHuNDLQiJqj3NsPrj7Z0no95ysAaDYz3j +azvpH65g5si6taDl9mceySPgSR5Oim+867IG93I+8pLDdSAw+N5C4JVsWgDkzCrb6v+XSKsY+mgx +gkjnyWXNP2+nOESLnTuSV2ItOTSgM0WY83PJXOJ1t9lrs44Exk64ruwLeqT8kPRX6LW0XZtmR5JN +ZPk6EvIaXxRagaaP0HarsvZHx1tR7J7kQG+iJCUoLm4LenGALd8jqYzP03Q/4G7MWmVjPmu6rtlM +tb+QNLDStuJ+HcRUYeflPXf8eLG5r7lKwDZ3Pa67Cmcq9plE9s3G5RPlmabIOY837EWNyeLo+y7+ +VzTvQEZ6Yg1rpeOrJlTD2Un/d7rgi30+wqZHsOXxnSYIBfNZtBbtmNqt4x4GClX3Uv2xETF6ykon +W/t5h8xMI81tHhw/aYcnFdBT4r1iINny2wkLcD3ZBFN/H73dtbvppWfosZJBcHp58TMaAI9JbBgN +2/CG071sygCtXvh2XnvbbOGChNnMYvqZryKdkz51XBbPcx8CDZTPYr4P/4Ee5HvpKWvlqU2Gk8tA +pXteus7quwAKhvMYfrgtN2Ku51Fw0ZkZ6kDeJ5dvT0wBEWxlJX95I2ZejAGeXiCEwTTKwHRHci1W +IzmGNJMa9lXouJkvnng9jctGqGFHMLbgWkuP/Quu/ZEaAI2QL8/bK4pt+tuCKjK34sqmDZugdqaa +wKqrOF1C1jMBGI7X71bUR5Krt8kyl9BOMOHAtHK6gFhrABp7XLDGr6jKrps2Hyrp2ZyCCYj8B4/A +SUdXn36lUrIX0whmjwzUkbJFnCGLR89Wb8QQc7Jr7kygGg1JDdlyocs9iN44YP/KLTp9lezXWhN+ +92qYZamWPYcrfWdQWW+QfRg2Wu1xQTik/9ij/SIrgUTyctEIw83sBt0g4aBBajMRhbseIkpAeMEC +N2W838qcACCjZBVmlzwQDE7skOfnrRIB9wga3rw/343Enj3At5B5cY7pwZ/eMgsy4JUtSyoBIynj +mFZLfnDwDvpZBeTbwx2OsBUryJeRBrD/Ga2bxGIqP/QSnLciJFMtBv3nV4DGlczYeSVw/iXykZLn +4F/UG37M/itoAaa3XuE9NT/vUhHGo8FnTNNKTYkvrkzyvxwULI5A45k33EN74lcnNO42CFLS2UR9 +vjlH7c9EbiaOaAzuJUkei5eYtOJVR31ZK5M9nDpWE4DrjBNuL+IQAErpN7MwhAcNja+7caj605QN +FH/35jKSjTXsWrS3CFKUV/keCyksFW00qookJD210yfU+cp5LfZK63+/QrB2lAvyaQYSIuVWjGQ2 ++eQYIKyE2m88ctPGJc4vWFIsS3+5JF7ZSiZtzXdFqnpKnDL10/QLZytiGkRJr24cGVqFarIMnxy7 +FRBEBPStjsUdQUhkMBQgSfkbXJTXj2qj98KlcLZ42WEAnvvOrQTHNrCXOlAN2y2GeOlV34MyHVr8 +qUAnEdFNFF7KovFozYJ0AW//S0df1jMjy8P4ysI+ZpVZLRyfGGTxEbNWByf56FqcFOLK6bClgjdH +avP7/N+vp0o4LaMgvaf0330Ec0sFrnzlz3ER0CzAZp1yoD0QkiYwdqg5rK7HrgHarhIAgVHzZ5G6 +ELPocfyvlOrRqBpyC+9zVEJaIPHwoB2WlLyDxLf19CW7S5qFfvJuHwKm/RYH3IQtSxS9ol+ie5iJ +ZJUvmyHqH26XjNKd7C5Gk6OEFpG9tN5SvSdz+mLjdRY38nCzFqVydgl1EFT19TQjWCbRmTZeeUgx +xFUkIYqI+X9Qc7lnL4U3ncQBlx5Ql1SoCS+HuaOS7C8uwW4px2c84+q+BA+zCcpa+fwesCmo7jF8 +YckV/pSUkW260HCGdwoJa+BkmioMKDHq+mZWbsr+EC0RuSxhD/m2FbAlR5j+Gq8doJDHGpFu3AOG ++Dt23GEkOdqZD9jr9YHRnN47b7K+r3BkG3kBfDGYhFGJkr46NaYeYO21aRc23RXPrbSugjWyKwdy +60djB0phwIwVGwalwVwtwSPVeug9RJqqjQtgC4fyr/9GNdNWLXP4U85jGkEI7Uvspigk1FvWpvu2 +IofpYNBZk6AVr88EPTgFx3dhwU9S1QLgg/vOqlQwnTKiPAtikqdqMleaJqYObkMPsPb0pgISI2s6 +5ZVAvqQkaaiEHSNjlT1RZ6A2rZumUbcpdngbf4egHGb+Ra0ohklYhhu9YD9EFRLZ+6tBSTeaHp1F +jQmUwAtvOvTj6iSVUoorry8AslD3ADiRqw9OTukjCknMn8H0QEC9JzxL6okKDWmN8RpFhgy/f77P +58nXJRxCBrN2hoizAHmod+pw2PE+GhnfOMI2lWgrOmKoj6mWxyj8Kdd8S2Z/FIVlqq3xtsICPyRY +3yJVWPm2/QrDdkaFa0AkgoRjIpQc8w3gO2hSArOazv8G7FkfR8ERggd8NFwCxk3LU5lViG1+YBYu +wL1gm92zMhNDhllpinqsxNo5V+PvwZEi5+Jb8XGe+fpvE1c4TvqqDhHiHyHbG1L0ueRosEKGCJOk +OmTc1u3RHItwurPW6As9vdWDCIYl/Pe6ZohqCvyT3riOzwHDpjM5wtjnoaVxQDCzReStL7/q5Vak +DjOdVsAXRksFqSa0pMUwRO02hzo+DtD+OvWdB2LrXu7GX9DzSYuVgEQ5DyztYlKiSNm4dUQRIsn2 +yHysywQExCiFuyNJsMboj3v0z00YE4wc/uvf6y7arceG9G7VKJwaDWcm5cIkarkLlF5gM78pRDeD +1u+dC233Ccdxv30BgmwMtue6tb2mG5gHLhWHOmUGWdn+8Lt9q93QjOSdWTBY7lEh6neWDG0rG8Zn +iEn+qAsRqXBbCxzTLLoQjkR/7qNKqIwUr0YApli9Q54mQXRQBI9NoA+zNO0oSRarDwsniJZ5mQ6Q +oh543kTvxGsY1HJmv/uOD5a+ogUxLROIW8wjLsq5pHvgQgCsQBDCT0ET6YNE9M8/HYRxJI2KK1Pq +n77taNOeoOIx1TPCnAfqxh78DMQTMf2xIcOe/xPiQBlL96SuGJk24Ce0epF5vZDzZYCObRylOm83 +XmhkZV/i4yv0dz2JwgNH7eo/cwgLrTwlCzHk5vCcHlKjzpTcjCT+2ZvHqatOEY7NsZwklK6YICI4 +9gQyjmY7ahMge9fwPRSMOW4mcO/XMNWn/Krw9Ws0QFPl8noxRQani0TwQj1olv76iw613P7S8g6w +XzLXPmQsOZuuchRz7tapIKXA55x2yxyc4mi6Bumn0j6ok/4aQqPWcP+lqma8d68Jbf6RWKjZ5kNp +kL8Sc8W5k/wUxxlqBaOEoWqoRH4c0Bv6jyC4FxqrfoCMEVs3iT0InIxQ18G1u7uhPnlO301cmKgZ +3YvXNfWrdOSYwIfhENTmvgA2LfBSchNhQSQREC768h4OvlkUQrtGstcCOYkIuZz1qAFBnD4rqy7f +GmT8Lq3zFOYIKDui8ddt62S98k4BeTiXGPmJ+v4inj5wNwVCHPqGiidTo7M2CZ/Xp6VB33OhyMcQ +T6IvkQF4zGEw0KGyV23aogDQwpVi8U/tKzRaykKHJxqQAADtgIoyBeZn8c8KA+Lb/iYLYkCnWqS7 +piPv+ejbHIX+zIAev+rpfdZUcI02i3uH2Cg+s84ESCL4tvLtVxdZYFk7yl/hK3DJmo6sas6K60I7 +WHdonR65nQWXnTXV7UA25XBzu0E/zbr7ryXLeLUJmIejn14Ma7ji6/KIIYny5DNhVGUWY79z7oGW +ow0hvvmpGDKQZb2tdwtqY/fNihHydFQ7uFG0E8b74a+MLHohaLBLtYNRB65MN9yDhua0wDiCmdb5 +LeHsJeC56UxbiXT2EajYLsOkWQUwaSmgUooc25w5hXxz8VLemkhNnqDuGhnIo9EZDn+5Azq4wZ+4 +Klq+SF+AilRKpVhHViGArkisx4XrphzWK61ash99C5Yy+6+vwpWXlJKj0s7OQ2ZkTMFp/OyXHnHc +20ljTPR+h1OHEPgCCTMlXUClk9dzRhfCRSy0UoTlXFV03UYt2xBj0ZHK2Ffu/pPyjBUK8fsgF2qY +iTmUWz+8ChPWYRq9Ea3qUXmtLSPC5tF9HmDsUteDoXYkXddTBS6i9sRf4gUG8/cutYQwdZhd188D +l7OmtaYQDjln/Q1db72h4pM/iAT6uys/kPoNypE9rylx2p3ekPZjMzGpwhXmUJE866QljOlYtTLL +dqRAx5hUEja0iASoSjxhtcPKCyQW7fsJ86p8n1gpiJL+GndhK0PAjXDn34pGvhX7fdxoJNV+GTB0 +0mgf57FgNBDVd9TgP5BMucntf6yHPrHSqNGCShbk2q6zE+2nB2p8bNVx0ZNl4VCkZhQEXnBhXS5g +rOiokIXb4O1bB/O0F9mxFmu4OdZ7MF7YX9IN0QNYADI8tDxfXtKCIwK3rTRveJThGQGF3GsqTbhX +X0HlgXJTBMxVWgYmgKUdKxqEBuiCVNTm2FOG0nsaZfnzt/qr1h2QzO0Iun1s0xomi9kANk4cikPy +XFsm1S7YIToFFzs5oU5tjqjpq0l/FH+erPHFZvvemA9X6v0//LtPOmVlMXCJZmyIAJfSy02fx0g9 +SLwabuZD6q/mZSfCADXmf2Ixpjjzfs05Du1CyBmXmVgWptJozOXjxWCp/Y7Cbi1U/rLHoZ1ziOo2 +nIEF3ID85OTp4UfW+QWs+EY4KTyAN00yXvXKsAtif5GOSuGOJj3XXNCGFOGb7S0aWHymkfGH3kYh +z7hpPZ15Z896nXE77hTGZ3or3sILC7UQv18nB3rOsXLZjm7J93f9amUmbqWzT/XDb2IH7HIgeMe7 +SuL+p2BoDEJIN1yolhl7B6LE3f7deVsJcsOPv7OeI1AnzbQcpoDaFEe1a0eeM04JghShPEiCueds +ieqKzpOBgXGDgQTDmcCcMYMpXFpCFeMmyPSnRXIlBpYPi4sj4wC31GuDq3e+8EEUYFA8TM3cjyCh +PnJypcKH0XtJFEbiLuNhQbUv7UMOGJCaaNznmUcAksBDc5t92q1u0JKPISVpcnRXCPzWnECfsy8b +kHGObL9gUDOfi59HYTBLnxGn/KBTwO5SyGSVAy50iSkKbuPfU7Z896WjkTEvEXImNJrqYYTO0tVs +SJQoAnu+b1Uad2lOs6i3UIBCicLdOHfocgfvP92rdfeMpdRiwJvS9+AtzMqj1hE96QNinXNAlbWF +jbiPAmIUprUznOV7RbT7KswJau8mLeHSkYgrkX7FnEcL6g52+OLC8iZcMkna+8ozmQl0fIAzGekf +vAzqzsHuyhfijDU7RSp5ndgJZNdCTqDT5MfsJMVbZ/EJaSZyq96P5hK98hKRnD4KoZcK5RMBmqY3 +XYIoPPveWbWpZikAhA1NLP2UKzMPWcHDDgkihkMMGMPZzWIFeQbFZHOoXkILWhXx8xOXWIJexvqd +0PYrQZBtY51iMN+95Cxcqi/siT0E8Z0Ii4aSIBsjtSuCT28+BagAobZEhsvcM6EZoHiDgAxVhsPs +t0EQkGE9IZZw9Ulp/nwaLg5IPpgPVbH8Im6PAHVdhILuAjc8yXXX/8xcivhrlraQRQdC0hH1FFWP +gtkGn+EyH2fdBBuUX17KEzo9Pmzj5ZxuopyUknxJX/f/EziKTj98DVqmFpw2IYH0phP3Qt3m6j0d +27SxB0LMUEbZriMWJB4ON2xsCX+02Gl2Il0N+Yrzzee+kfIaTzdkK2Tli/ty8qBpum/bGRAx+S7H +bfA7ctKWEQ+3zRFTCzkcrHpmqQoKOypv8olNkTigTIdyHXOt03EeQtPWPS8cA3/khOD91iWuXlMr +aBWUcbj9vkj0NdhrAfQtNpN/8NLI+otmgwxgzUGcYD0NkfQtIKcJFqsQ7IsOzcQ/wLc07F+u4ZJT +fLEzIqF6hZAQq3ppVSuhzi2DwWYeaDqz5iHcjAt0K4Vr0zYxQNfFwjjy6jDaghAirOYxFnbQXKMj +Bpg1SOWhZksQINiUfOQqtX4X2fmY0F1Dg4yws7C0qoa1aQ73L33hDO6yNdPdd+eFfAId20BwEUna +n0sfoYpPc/3e1WZx+iVRYrJhFBwY50BX2mUHdiLbIyoQhjY7x/XBcGck9uWQ6b4z7S7hb8eNzrXU +POLXmL6Glsifv7tnbWh6mluJN5xg5fpfK8VIksjpIGk/5ytxFKXuaQkGPnJhuD1NNi41v+U4WVUG +XleUCt24mhsdaizKdrZJ0qeanJFrJBSZg4Kh6AP/CSN96Qr04AhH/2UXchvPD1j/1UQc/HLTsKpm +Gt2+6AqwGbCIScPcdXKJqdWRxjbD3gtUQGDPKpMLemcU+WaciQr+g34f5Q8euBQ8APvwoq+VGBYL +HUYg+5luULrV8wIncvAmL7AxP586pm0jFZbe5vNNi/ZbyLpEJ01K6U4Hpl8ZUhfx03+RrgZdRXzV +fb1bIg6WXhqN6Dg0r0LNdqloNFz92/o0CYic+AeTLAmzp91+wlbQDOXcbOa8pMhPnVWKIhr/26GS +podqGwx9e3iZuqu8Iaxh9BhbyRV3j3CPcbti2DwCAizScBEADFYXrXBSl4RNCWmz2JLQ330CPLu+ +uu/CMN2WkXQJBQO1p77CA43TILSIhcFjiqArmjHmFraGRyqV63fCfdSKoBtRqkR66SsjWkLDxi+p +Dh0BrjsXPnZKa2D6kTKNUewNJ9cwKsRJYTlPgE460K7vj1yLc40SQ0qxUnQhP0uUeovC3bBcM1k8 +nJ3ePudI3zVsR06c2tkfgr/k38Efdx7zWFaML176RBkTXpAX4FoLJfalxxMSf7qFVXXwFzAebV0s +4OGhyKZPsdf4sm2TYQjHyK9AZmVCFxXh8hxZPvoBqJsTSFsqPIAx60L1heTTizSXeKTQNdf6c380 +eW6p/5TyOLh/lP2YX3Gq9FPI8WsVbkGjwjQkN0HRaBBV9D0bgHGBs7P5B0R3re00Ju5+uqH487hr +B5WM1DWWEo9uIXvnhE57DoF93X9q5GdD90lS+xngxaukCfL2ciflMq7wfmvOY4ngIwykkfmofIxQ +V5ADEoyO5BBhjZ5o79o/L4dPXYJl5wujBowc7giNHMy6v/lzdSlcCoTGjTsC/GPjQJLCJT2vuI99 +Vb+Gqukom3Y4f8iKyictQyWVNn5EZ5kciIqjigmEYoA5kIIu4uwjGbTnIbj4ATNeXVsTitYk+XW2 +9h5f08y6j7sXZ47tftPHvE59XBMORbR2jSc6Lf1Mb5F8GdhZ/nv2oO2+B8pvIBnPr+EcnSl7JeiJ +ZJUhj2vFqOnckXkjT52CouvrckiuMgszQl3OEjFjuWHfWBYkls6zlSltlFe+FoJwgFsDLLdllxKS +zua8dZfgM2GF9YB40nDIulzTAT8tufPjouG/sZ41F9CqiQ4iVwEagnhX5WRhmCMU2Ywf6kKfQiwl +W38qiHSNNfE73xqhRiwj2R0L2RnVX7oXKWg7HJyVxoFclkW1jbsNCGrpFa7yAyhZam7fhRg3hbZy +iqr6q6ZvKnFZ9jUzhA6Ihs2Lfna1UH9t7oncTuyOr30zboszoIBSUl8QnfhcjhHhl7yXZMZTE8/r +wFBTR+qr2ej7YIFqE07XG7ayhADqd/8f3cKZ8plmd3K/10DcghwkxGmBLK6IAuBiRY6Ha8qkCrs+ +Bt1EMou2FB9AaixN9VwXl0NthFwNn9pXh32/q4uqCH6u2gG9WTPVt+DRhCcHnuc+SSeJEcp0Zl+9 +RT2ZzYtzP3IbkqN1D7Q5+0aXc++prUVEj317qG9EEEdEeAHzFLWce2DLdvNmjwz+a9bpgT4Lihi5 +jmmUCL9A5U+DUQJEugelQPj5vhOe6LeFJDff3Cx5wyZA6bHI0n0TVQf9gyASJm3LO0VAKTevSttB +JagU9X7GZok8CGdvLLz+hRHVXJDsGtJW8rHODEiLuYNAQ097Pr5MHR6Xr0klXrfDv6+vudowrKq+ +COlAPiVElyzM9RrqgOOI33I+gkPiwSQL1U7bbS4ErmcM2STUpNSlOElYQpi4jhq8MaghwsVh5fcm +90KpyHaosM29aCEPlNvRdcbenQ80moXbrNO5vdQfeNLcbZjDvbq5UWXO2CmA1TIwQ3yi5+6RuPHz ++qSCid70qonncabQMuy39OkB2Eall3Za871Ev3GaEPH5BvctE2s/urvERgmaDfAWcLbhSVF5PaZ/ +ZWFeVoauUcha/WPLRNl2sd20YamOfgZf2OcdyctBXZZfPecrVeb9D3VxI0RoY/QBDkAf0olfDabv +lnbkHCVNh9l+IwzV8+TjkUnn9aTl1t836ZaCm9NJz+plgSsNbWEld4XoBW/c9y0hQfi49MEaFV/d +LkIk9QlKYoclafW0uDypGq/T0qPl/Q44Nu+Evz4pl2xfXeknjyPNWiNgjzNdR4AXlIAPvQj9jNkH +TRfDXASNcIdp5g+FsAbD4c4olgOf7bMw9bKjFIGe/SYxZNXcg+Cq8gHVot9SQ2pG25Ux+x3TQ5fm +8z/EzbdlAXhcgjbusU+CElcqM7C6yudG1jk+DgMXNJcCn158sv4dfAAbx5G7SmW0SUVlGRUzoQP+ +uEUV+hREEB9ixEpJBCzCoIbMPPCBO7VQ5z7uE0W+q/jozE5YC3bKLKHfs2qdS4ETtQLYRa1Sry5h +1x6UPOtKqxolB6O8PedlPYS6QAULjRfW3POSy/DZmGbYvEHC8KSYdHPLkdEfoS6rCZhqj4ncvHZh +puiMfdBxdSI8uWevk8ZexQbJMNy/2sHbjYitrirzi3VWpX54715Op4Z/uMOce91cMj4K3m87H+aO +me4Ypy2IroweAQpbxG830OHaiVZNA1WRLSVw+Gaac1f/qDVfDfwMbFZvzZa1j80DxBTR2joc+EjI +U7cN8YNz7HCc3kHUVBt/j+ZObTjYGlqoFCs0Kxp/ecm6+q4ImUC1+GcDJnHJsWZbiiz3qaPCX6K2 +DI7FD9uowd8X0hhq2zPOdUs5QMzVHonohkcxfA/vJuK8jRsgdfSmKQVw3U0sZYmCC7wPIf249le9 +7Io+JGqcX9EL/McrcAMhoy6tJaL0b1/rayIVoxPIRCc2/mC6nDgUO6rrFXmaO1RtEY1cXnXU5hFu +fT/WVxJ43utvGq59ri8ru7Ggt3bwmuSLijgyB1ui0HFZpek34z3S1uS8iboD535X9wJMZRrNKz+z +tkHtD9f4nLLe9bwy1QMkNpMpUJ+CNDP6tQyRSsPQcLGaGnFH6EUBEWnhxpg0li8gXO/KAbp7Aw8E +c/QpkRoTf8pgDS0H8a92b962V+ajCyX778//ahqMTS2qgcadXGoM0uJ+3Cm82op+I3UUVJOE4lR3 +/yDdjbP7BLEsSiujaOU6WoVAC5dWIakZfeL+sQ01ocEctpUQ0/dDtcaMTvJ9XcQG1ecXFW0qT92P +izrdaVPRbCbwj723gb/PZZhuu4pQFPhsOLYsPaw+JdFToVwPe3zRAO/ie4F4O00PtGA51QyjMCQF +Gg0Q1lgCN87h31fHbB4ULNSg+M86I4rx/YUo1PUb+Q7Q9foFP21vXY4SkCUvXvm+otdonAmZCNoU +o0BRkOKWnTW8ZIQ///5CTLJOZZFF/gP+jOojE9a3gOWnXMcNgHQrKyNSeACES8gOhm1l+kEfQYNi +NMlbuMQmi4kMxXmVVSp9BHivYUjbpdzdxE45DLbCgoso/O/k+MChJH6mEaBeN4jDTm6ySMRhX2nq +/2DdjdDjsuK9zVct0xwoBgX1Wo3HTxqigHCP71uyKzAC80fYrCgbitOsavi0o35BAi0fatazuvV3 +M4JwdURMYRl0xjRhtKDZeK4+u9xN6rSzSG1q0ouhJWfA0NDL+A1zluyjHC554YKyw6lBouPmSach +e5wMbKP3U0SR7dsWokxhZpbl3VtSucUzXlZdhl7P5qgjj9EAfZViADLvRNylyX8v5QUVWSK22oYm +YfoUxA2T7SVGBZWaCh+2jqGx7RbiFjtxQg5q4fsMX+ikJicd8mzzQHV/75DHryqTzm6rjbhmylkn +vnmfhpdN6ifGT9bAPishu8KtaWHMP6hSpxZ9mwkAe+XGbvMRuES7N57XrNRR7iyDBSyWAABgTTQ8 ++qgSElX+XnM/f66ByJM4tShBYfgUrVMFGOsbdquXZpeklMPDkYTkVUJXQOhBXqJcFL4NqKPHTmrc +leRSEphmo5nQ4PEEkxzz2DOMDCpzWPgWVaSwgCt9pEY3pKaQgunmg4GIyKXz68xNOw5xQRN2w1cA +GVdNdA3X2bLVNrGmjXyugxticUfuvHm1L5h2sYOmKJDBDoR9jT/fli3+7NFmBRu9YyklfAx0I0QE +f31mEjPII24onp0OCZ/PNAog595AgRWbtyxljWXk2zbCxT0dYMgvpjqVWd4qHhaKxTIFoGAsNVqS +lwqk+4wnjQXnhGLhiZJBrHgjDe02r9vs0C3Oe4KxDCKUQvYluTAlRXsqKJ+zdWSOKpsudU6K2RiP +MCQ5TNbG7Cbpl7U2rg+CzQD3shP1ytdJ1rOHwcU5KoxsI/KQ2d4C3S8yM9Qv5GxCsIRJwkTz1bz2 +y9x2XAthqqHKvq68VcoYieta243vfTewsLSOcrTUFH2mNnHi3NxuoJxxItiCxxmixISkDFHpUPCN +3+XT0z5PQxEgpnuSRVxbg8Zn28e2L4ZG98SAbht+JECuZeqjlSl+LaDRJ+kskWllOexX41hIRiMj +yaNYL35AtUfjcghtMUhIX+Jo82hpVDq4Y+veUewBe5E/5q6bNCqFN0YNVgXFdxib7F1Vxf/qWZTI +uzqTOG4rByg0prjw9JQKSaY0kYngC8bAnM59eIR9R4zeopWFgyDrAYUnLheoygHIaL8WXjSDuoSM +XomXygbk7B2wzJdNA831YlM1xc87SFLl7fzna5iZ20KMPPUpcykK9F7rFtM9gVlm0RVMFRXaUZq3 +8CPkoyTvFPlDOFCGFvT0RaKbWlgTocUo5NpwUca/Z3Q7MQsxxrcMOxa5bE80ifiLIJYIdvdhhGY0 +CDDqOIMCo4D8I9ezekEpv9tORuLbevvn31MJuK1g43yRZt+jfbHBam0zPHCWfwE2JQZPOAWezSmU +Rr5KshfOBarpVdIDIvfQ9ymZr1OT6h75Otlw0RMQ3f7VZQSKhf5P7bhGA+hQ5gDeIl4UesII/eJ5 +MPCokB6jN+gGwiD1qXyuTxtRBIIfyn1vvHk+na6u/BMo5vcPJY21sbIGbpctzyna9KNlQF2zp7kb +h2cmc7r4kcD7MV+qtjT5rmkNC+2caP59t4gBHBzEUdSDI5/+Jl3gEXOJeRDy9qt0e9/b0Wff3qFs +0FPtPvq3q4CznNG8xYzOwRh/URaPOs3WSw67ODSYDXcQUKNJVVHYU3rZWmGIcIXzyecIf8v33tX5 +e0l5inoGu5QnJQn0/5YdcRRvYf5hpaUTxBBr9U//OKA8jRWX0V2lpLM67hNCtXTGReEhySnAO/Wb +d0pdgHgy//3Gv5jnzWFMc8nMCYm0KOKcob/+TmKZ1zSDid0qEzYOGalqEmSpYPkJ49xvNFtY01ra +SbK7zWDkQXV6AtvJmNyPSAgnsDPlIyk1b6r89AxYkMphO0wcg4KtSxu4Z8Rtt4ElObSw7kphLgLd +giPmjMdXNAads5A1/Z4E1WWBsTVVcZJWaSUDfFKyiEFEEzZpBu15BMKXBDvGQYFY2lGjD78wJ1Zi +NI/+OnD/eDVx/kzyMIRcy7depVBwyM3uHImQef9gsEag7m+hcRCnTWtdfiND3F+gTRpH87RvWIcv +Vtewu/whzuwgosfCIYgFieMY2KZ13uGYZUpOuDusMCBaMe1ZXCQU4VENiDyb2u/XV1SlR2ARd+r2 +dbGUwLUb7ZsUrshQwpvG6LLnrUSxKiX6A8qMsgPGM9sWOZHwHL2J+wb1Q6U65jYcM5U/vNIezvT5 +mJvVyicz/gqw2X6pVphMs6kBV2A2sBu3xX0yEmRQMhRuWcIyeBiRWMKT+V5Emvh92oSessq0pwh5 +k0w3MU1Ff7Z5TmOE/CmbYjooUloYO3KB2fBcTvrnA2MX8tfgBBBmNlTNS4BZXZnXlVsxjG01Q1GI +66LIurTIu4Y5X+XIKrAC88SZ+97sV5zL3Jh7flMlux9F6GX0yjfyEska6DtVdO3On41C8a1ZNpRG +7Ly3rIpTasjszF/Sq2gK4FUz5WViE2bfSIGAy4e8zZaerzTYJfnPDmHAnO9M2FqOPLW/LFwkHFJs +1KfMJmg2UBoHTxeGLolCbjMx8aI7S+8yP3qaEZ1RSH4ZsLu7sSNzS+0ZLzNQK+7EsSOAplQzdBb6 +EpmcH5U+NHbH2L+XpfRQblgDEkvWD0IVW904qTMHeSoDiJZKymqe1N8bIgCWJBUDBHd7A4VKyGSm +l+N3ZkOD2vpQ1x1Lf0OOwURDA8hXxV9hitwf5IHSgAGC/EUbhalAbpxThmr7uC/+808biPU3jJab +BBhZi/3/WYXu+br8kqqs5LN1tYOvUc9FYmj5EVlyfw0gBW8UFqXL/RpBS6y5+eyngQwUH3Ydv1HX +lWfcP4oKO7vZj5tZgLQZeENYutTim5MHDcBGZwIVUj2zMOxsqjHMF3wiyzfN06XiLPqxMQGbeRn0 +zMB/RuLID5Hue3jq1qD9SObdgrO3qwaIDllcSFaohAOJVgtAiUWdbNqJJQaYyR/GYI49FNldw9+q +cG8066G58em7oAgKVZs+ZnAfPRMEggoWRiX8qoAP+6MnJjJO/tr1d8ByRUvP/fidD41jcefAQXqp +M/sZva27VMP7/aOi0otKGPnwLyM6RgxpYqsgBe0n3JqQOJYEeJS5T5AcAvLrJ3weJA7Mo7zI5vfO +ilZfOhzgrmRZptiBDruK5YL0RM+YTKQGZRCa1CQLubW2waurmCc1gxjQZC7rH8da3+yLAxXlGILs +ERND9MT1SWQUcE/mOYxlSonSQ+qq7bJe0HHYu/xHm1fEgDxmN6DPszSw2siyUgzYYgdL8iWjnj82 +r1NSHoE5jClB81Ddb0DALCaMuvLpjW5M8/q63ZrUJ5GEJYkXHx4TUHlhd5pVFpQwG7Oi5FgGLfR6 +fYWIO4IVtvdvMT9xXLsPmvO0RPywWgbeZdw9j5edhsf4wALxx6zs9Sj0GL/XC6byh11XbPh7KXNK +b4Oe1EgdktKkegZAwhVamdfL6XpQb85utWewFRrSzonRLwFRq6lLCENryhWO7O7RFHmMZoBS2PIO +2cSPlFdCXyrqVDR1UN8PhPMdJyfaWaGDf3TCJe3Kh+UPy7EeIa6ieaIG0wZl7RMhAtL/3wUiwBfb +YamZNeB51CBZeKPKcXzHw7ySLViuq1ie5LVIairMf7rT9eCc3v+iwpntSWoz9A+GaNAGCPI8hQfp +pPxGO5z+4nlQhgppxSdQxFOkmnCuyvWZBZYFinDHkQYam7Dl4mn127aZlTveTajujD6iH9hyOIBc +FNxyztGuhZqsgqDMfOqfQJLr2bcw37N4k9QdRQd46ds5C2Ex+j6k4Qxm/xRx/T3qUEeaISiswZqs +CjNrpQLg954uvj464xmbuaHNJOUsfRYVjl1h4i8SWDF887z8HePWHV5FLmtGyh/YF7wjWBPthZ4z +CeygCV2SHiQv57wcwNIK6B1Ov+io/G+BP+Bzrx918dj8rJ8bsTnWZXzX3n6wLA7r+aAkUAg6OWoV +471EZ4A+Pjxar9uPUDd2j0h1Xyynm63unheWXSmJXpLJCiJwVR4cDhf/9uLYkbE4knfXtIvicuo5 +9d787ScDAesid526reAySahWgVnxWQlItseAegfYY8isKFFC3k1jLlbR29cgTMeFxG12UxrSmbzN +t9Aq7bkGQuKvaMQ/kqY2n7Knkl9I3zvUP0irj5NyTEAoFQaJ8J2bbgX4IxEtJ6V88feaPUmuxqTK +v8F3N31wSoSNMEXdIVQdidM1yxjeyAQEFDvoT067YvsdNCQeLf26RkOBkblB0QJzQ+xXyuQSKDcB +MDioKFqW6+4MuTcM6MDHA7KWHCwzSIg17C+EbGjsmV0JhiattLcZzzxpixNyJpRcFjepCW4qTxV3 +Q5iuegPlEo7kL3woVmMJyqNk0e3Sw5nMeEb/TdkYGO8mqiQGucWMjSaCbPy0PZe8QEWp9CH9TqOU +eSIzg5MO0CGu0WQ7SQ9eTCE1GgFnAYPhSxWDp2tmR4xvmrnGcwxFMl3RM1HkWkpPzfnSxF3fXuF2 +/bZrqxXjgFRbOw/F7beYj4u6EWy9toouzdBOFQehzF8QbOMHksbIvy3nA6Vx9vKYKrmRRguJRQPR +SndoBszKWxAjFZJZZ7gMQTTs9RcMSvzjE55djTSWQivAqV/YJjG3dOGiMv6ILYX1ThJhiAwW9m5h +4zTcSkjFVGDt34wqe41u372+bzZHoATtM0jpaOiEIHi4u4rdL7yWOCL7knFpSftzldSgm5xqgGeX +0THhif7Nev2srTE/7gyZDj6Et0/ZhoDtVjZ6MsuTaO/k769BgWBno3vZbpPKeXXMcwS9j+rGb7NV +wHZ/6BpKTUkRdudaQSXxYuEH4s6ZqAmBi9CW9vEFGl3Z2ZeoqB01rFicW4AiMNbR6CLKHewnEsYr +GR2qrw0OJ+C1xGm6fAuXm/G+3P52JX8lrGswoC/Y6F7z3qa7xQQQvuqe71SROiLSaBB+WkmCX4yC +pUhuMljo66LlMIe5SwTp7GIUVOchZKj5SokqDEeopNNXhOexMvbgEm69lSKvKCKWPgJ9DyxhXrem +lcvXNqbLEo7VF2TgTrrBwQMoFolqUUeVp1E3/EPk/m0GakA8dMneYlOdOcIBRlDXs27Q0YDpO59E +DcOeu6W/QlZU+iXDcaGxZEg7Gy4wUtNUk5CdUmw1FkPVZOvbxksZ6Iy2c3/d+mLzXHKz2uB+taUq +tMN8jkwMZhAM+0usLnEcKPOPiTR6a7ZjP+FfTRnuOGhuq/vq25w75N8C7rlKAz/hF8H/wDylNwmQ +w0RIynwIFfSlGhk4SNsTM8Pi3BMVF6nIogkclkT/pc9cgObXMMuN64il++/9Fc7wpui/8Adc4jJC +zVQrsp4ZbjJ8Uaxf7sBtvEHLUMJ2IyRSMbyCqPKWc572jEKw7X5qxtGQg5WKF8w+QTjJ234OnUoT +Amuss4Dc4+FnWoRp68UsjTNJcf2ByJ5DNx9YoPjozfawe8S9rivIcDQIsuowKbEgIMAi3KI4SawT +IfxpbSOfBx8c72CZKfCPpzPCoTmSksirl4PBjmdcggiDQPHvUpTuTnnQg8TgOTOdcujJCqze2wgW +V78BakuIBnmn3HTV6mxensBA/8PWp5PhWxv7F6cuaMFsLeWUDhyPKmDhDHDw4+pAEKxWmpb2I8Lp +SRXiOIycwsMcSb3MhpUFbaA4G21pRRLs71II1Edgr4cfwE6OQgshrR+uqIcZZRXYqQ1Mee9jzZSY +p4csV4wb9L+AJVMX8FBAqlehzX75aN8CwtXi76gjd5cmdPl/LnI599P4c0SUHxBDV/xQqQXBkxxI +PCFE4Z5a26eWR45YYTruxM9oMFr17pIvtyJLFcgK6O7Vh9fXGLOTc6II2szQmP4Xvn6sn8fMs/A2 +Sg0mcKlWQXqvBE+5ICunukSRylmXwQRiY5c3nLcxwTcH7coYnK+8W95rZVOBjszMRVAsiN4XPu5u +MWnWbwZsZF+YZvAcGTNMTaY+SZknPCYKlP+xlmA1PyXd9fvUp8jIWHMDVxE530qcey1ArF/qoJUx +qAUnRqbXS8LWiM6z4WcXxb3ZnRU5U8Oz/PNiTSUHqnkLBhLizgv+hGGvqDQ25jT/bwaBzNYNi5wD +T+2kEYKWtDeLDz7oxC7rwXTp3TXHFZQvELJaxcJG10tRgkJz6FQD1FDbflOorWOYZDyfTGwtSY42 +4ObstFYZnOVcJe05SVXXL/TU2z7c9tVsDgEV1hKSxtAnFmiBDqLMpR7hp+9729QEgkuL2WpcC1/k +9i/lcnxXF9NttLD1P/FZ0ZTJXLPYXIkQy2nBJrwmivAxEoblR2CNaV5RHuTD9k3XFFMrHe3zxX0a +1bekd1F+inLipiF2CvTlik1gUShLAlgQNFnhX+ndjhXixDLlz+Oy3uHf1XYyjRmSrQrClBzAvMcQ +AmrZS6Glr0iwibs1yfvd/GfJOE6kYOF3JWwf3OmeHggnk5c198s7dqdkY7PJ9w999HPW/BZwXjzO +RZtJ42ouTKJcfQqaqd21IDqBVJuQM1YJzEiTzrvmFLR9z9zb+X+2OEBmsaDhSg6qeOc+jKH+nxe8 +mstcsWeqkngP+GIA6PsKXYPSZkZsukixV3DS0hEa6bI7i+ijQWccf6uCc8PmLPksnQbfzcLF2RZx +QxJs3hYZzlrjuVXDVT7jF3nQhPww6m6NQmQ/5jkuXSPinVMehbo+g/zIo6o6fib7CWoKktAkIeEu +DG5TrUKzwUsads0yuC2nb5rm6/F+YMEqboax4W1iMM4mYkjyk3tuBizE0QkEKLbA/c0UoMKPn3P/ +GPwlcHQ9q5UZ+E8UAR9x34xixKe7NHbmzuOH+Q6SJPscA/9I8Aq0gg/FzoNkF6UKQF7cnVVgHf3q +2bW4+O2BJ0HQFVvxunQRO7NW7Anf/S3k17GOvmPHDh3mwbaGXREjRiso7xA6SIP2g7M7aNUZs6ho +vL8qL4CAOjCf2sL4OgSnip7re0teDQ1ZXbixUFMJ8CahMDdCSoOOzsHyFsNWCbm2IXB5oxyHrbPD +XKQecGwu/b+ikfLuzqC2q1z98ZkX2Jhu+RVjSpNCKtoyhOXK+li+pDn1LDnqiYuphFRlJTOn+brP +CFbQr+BjdbRYTTBDyVgKggvYFgh5uYBCQqtUaDf+D4X9/oPj9myG70fS6qJjujgdgGZJiCkqHizG +m/BVjtwhPp0rt8uriz34zAkGK27/v2UlQr+be6bQYgx3A6cTpgJNtqc7BZ12VIFK6Oj2SvyYsnCY +N05ghD7GvLWLW7T/xtX+utJNd51fd/B5RXNFQYBeA/lopNpWeQfWHAoOQ1RsXQwiQREdExGtTEcw +TSqZbOMNn3gPG4yQz9O5vctBDzZn/KgMHjAEXCPOd/BACsfPeeHheIyWMAUulkddNa3WcFeaRRDw +qWciXQOLMQYYuCt65bC11/lRVSmtPbavps1cJ/2hIJO+uhSQhJyLEjXrrV0BmS3+2LREhiT0ptNp +agZvgRMhBhPJrFbG2ZjzUUgYR4+GdjviGokXqQqk0kNYut7dlYHdtZGE01qsaZZ0pSCtaFe64FRw +GoYWxVV8TRQzitRzi5UHcraqoErsDV9vTGsQjd/HMxcjyQrmBy4ODFlvA164w047zJZg2+XghbWM +nGmnxzFD+/FBEsTafgXvu0NUZvENR75cANAM67v33PVfWLFF1SlkWEme7Mp4UfsWdY82Ks1gOP1H +pnD9xH9H2NjWi7TJGAtaIf9JQnLQeHZJukq8i2JWjUUrdFsRrInrr2WVbeVYMxMhZCOgn3d2V9hb +OnLhZ0Ak/gRxzyjMVcNxYXN8mo2Ys+NvtBBPNBGL7F9Wa77n5LkZrWqHYFGNDA20orcM8Wp+ds3R +4q5tQr88sUYNFYjHr7kUSwux236DfFZcKRWsBJsy0JIToxivd1ml2NE7TTz4IcAJ4nokvmVhpz4T +9HL9bxSrVONBW1S8aZhnBnedSZ6iz4/VYrv7dKhxa7Nt/W0dz7crAd2wC0CLhlB66ZdlyzIr06Rs +hIQswwWttB85QVzMbKRhBQ4ESQf9pLIl20DGNfgJyp+Jrzg70qznDFm2PI3JjbGM1FoOXpWTgQ7y +cqCL0dNnOeSc22HyAu05KugY6tGigJ6iDTR8tgcxmyD9owa7mr8r1agt1LTFS0O7faI8vnBxUI8t +zPhaeTjaP/F92YPAMabnmtcU/818yJSqQSdlVWGHxclel03RZpCZU7+x4wqbvAGCHVvHBKphHOh7 +rjWL/+vdiZIEp40UmfYYvCLwyqHyEzOStkSsq/qsBGh/T95IGvxSFsrRt+KpW3VtUcvVu39Au3gn +qPJVSVFfZcZTt2nuUZN3sXGDf5ISdwWbbsXF800gsTxfvkL4nrVNSoJ18y3o25LHolJty71CCO1g +pEf+yOBSOqUYyFrTtzgLecrefEre4qz/ZDfdr2lMF35jpO2GnqDMGuTvb/PQHuRCR0UoceUVpGl9 +JHx++63w2c0X06Q61hRsZayVTEDLRfWR+yjvqUTRGc32DaRbFLiXppwY7ZkKl8RSXSNlPTnRfxOF +neiPNSNYzws7oKTMzKEggylsb7QusulRnpwQSqJcrAtxXJaL3uXdT1LYG0YvGgi/OdgYVRBtrAHj +EYnu6zK92xZnkZiYV8zaSjyfl7F3YsDy/Gc/lvlFYK3PQklVaLbqTRGlnJ63NEYvVMmI1ZhKA7No +RMdNDXIFmNx8+V6q8oBPDsVE/IM7jPOBi8dnf7NtgIbQKV/fdYydgEo659mxDsxtNdSDyzeoOc0W +lnniutEIRdS4XYlMXv1f8PpSRZkU1usa+82UN4T9qt40MlkfI/OBNheQSOLR/UDQip9z79JSEmmQ +fnrajIGCl59RZxXo3Q4rIpnx8P5DOQ5uW0yQf7HQ6uj4oQq5VmdIi/hrMHrHXiivXHBvI9r3TKM1 +lNcoM+Mk0xnemsZdU+rVqvgJzUfgTWIemR4U5/XV7KL/L7hq7cKPktL9YHehA+Ho27YXz00LtiCj +zC2mzkiyA/elGhm5BCL6JVbmlsMia1R+3TuTW8Qug10qLo1BZaXaysQMiFYlxNBnqoZI0mFIaNJw +rsSGUn8CTvafIfiam53E7XXX5XUU/7SIyPz1u1oEwXuq0mK5nPxgOB4/nPhLS8ri/nbT5/fE+U4W +22e/RB9gBw2oKWmCc+FhFYoKL1+0JiKuGJy5nAV7NsShkCH3lPba87ydGDQS2z5K/N9gZXfW4Oju +BRElxhfNchwQxMzT4lL6OEN8q78WAtEOroVL++k2RmgstotS7fnD0tbsAQ9y9Ejbb6PydZtykuLN +y4VjV4Sygf22nblInUjOH0IetL+OxmC2V5Wbqk3JzALJApp7/xBZArEvFV+gbWN2wKa0Xv39htz7 +vtOAEyP/XqzoXeV0xXoGoJXdeRpvCGsqKJp3+KvVYm/XnQg/NgBejEktasq9hSMqWr36+RxW+ezF +bnReqE8ykb42bFMSf+5jFcI95aB5Av7ay2owhJgAuJnn9Tv9Co7VKbggO/3FRbx3LaigDDpP1CYN +6vbzATT8WshY8nAOpLS6p/zdEE5gv1tuRVDZd/NRZ6AcuE5f/68Ti5YRnfysMLZCAO0OuE2/r70v +F9M/1aKLlSuO3xqf09kY/G01/PW6cxro3I10JDpL7gTSSKZTNy34chyzl4IcOLivI9JGVSgbCxMQ +oKvAfjua/f4imc2fBxhP3TXqoUAvDIxCHC4EKDYq/A/SCWa/rHwO89O6vt/T73007+MrIFIcDoHw +cTUL0QY78qoYtW+40inEXOaWVfSbJGqtEihSwtTbX1MZJsn5dUNSgGNuQLYefa9Xe9F8XuQTSxR2 +9L4L9K6Fyw0f7nCUN59FE9ViS79UuJwrHMvfFJgueBtnLYEdQg/zNrpkBbUMdrUM2LriaVLwLFOC +50amFAY559WmXODqNhGbdc7h786mWam/DweS/psYwkMiDAorHda4HxdLWpSzvnCXDKxzv+PLFztS +jSQtRPYsFMnfZaqHzQe4geHOKLYhzqK7/PHR6cRiF6tq1qm8Up1nP2/bITXXIKg2sv4m7ab+2BUO +13g4s/N4cUKVAuOIIQ1EN9YhF+MJ/yvnfceTpjoHKC1TgZ+0p76dxwNvzPnM1kEgwX2SsqJ+g9F5 +dfs9Xswk2dYerWDS0XBtDSFoFtAgT2DRp3lzxC1ZCc7+gpNtrdKgAskgMa1Q5dIQPtkxZYCg6FMT +BgGJoKepqrDxZ7x5pHBlocy5roS0fmV+p4Z7hLJFWJxhhtzPweunESVLWJnS7W5EyWGGU1rE/kWC +uWerC+O0Lhngz4ayzdyUq2phPOL1eE4OVxWiRAltCzedl/r2d77daTTrN2EoUhirb+QdmrPFWzr6 +A/MzIj8RlQPPNSdzCuoP4IF15Z+IZ/HMH2ve/Qc1+Z+cHWaz0KuMQ4zwsboSi+8em/nqdRFIp9Pm +/AvDuRUYcZreBAPvw22buorC7TugxHFIHw0y0Ni2+buPNet04SJo595++2mNffkENTXaD0iJW6Gr +x6jJp3MzgZfoGa4tWDCAqzqPX12Rea5aA7DBcR6WHNsodsLCzCsnJRmUtROHERCdoicwvXbRm8vX +6mDXmgbPD0UEQ3x+vzXtSpFJP2mmcZy6sqBKqHzg/F2d6Cg/2G9hmpqafgGZS70IxbtjQytC1Phq +SFQifIWqVNYbns8xZGihQ0y/sk+d6tGUMbIsDrAVOKdeaa5TlGYscFrgohTzan35BMXnl7tLnSEb +bR79LBN9j1Cbs5pPBVNVz8X40Gz58yGqwGt3bmSkgB+JtY4NNkwgrHYrsO+FCyjNVxbH6w4bXvlg +2j59rcJ88GhU+XK4az271qA8c6IzNMVRMklaM5ohhmp0XUyZ4AZByzoQNwk9bO05QYeeDJABhDhp +9SthwwLOOpr4kA0QroaOU2KYUKewWauMMPyzTufqco/UojnYaJBIKnxfBwN/wayBWL6LhpHBLs3m +QAnafoVmy5N5uLTAKEn7w2/89XozFh59VADjQV75/MN/+0Ei3GueZWEv1guoMzcdZQ95I43eNTO8 +554wsdAM9vUKqkFD2fd5a37mQClpyb9fPpFQjZL9DPL5l+m2mRSF4IVmMme9BgR7QnL8p5nZpC7Y +J/mPyEbMfWLLZEU6/fCg1/1BLKx3fHX01j+RXoIjsB55QTIoKuJm9Tu/LHNTkG+3915q1e7OkchH +rolZTgi5firSz3wVebBgLcK4g5m5jJttSotd51d+t9/5I3QJgMMf4aXoQNrrBm5xzRoHrKcu5y3A +GP16CpbthIX9k9dUzFux8t7x8tYypj65CtwjxsrUr+3vsiN5hgNCJWQibDhrqX7pPtili9YRPKEj +5LPM5hqZ6uAGeZHumDJ9wBovRLAr3ySWC3JUjo2fIFHHRcCfpliyQ8KSSwX6r8aiNUPUqLzFQqC7 +fYOGEdWLYpkSBB0WaP54pNxNQYBoZQeRMbGtwY2pkKinbsQAOY2GcdkUGOTz+loCZgWK2/+R55ax +n9CncXEKsW62Dy4bko5xt4PLjrm8oKrxhYxLePkh0Mi9PpcaaBEtiNwNZtDuMkuI9FzrjrKx6+YE +EyIQ0BlwjVfPGQpxRa75CJn0t0LcmXMSJidoXMGKA7Gx1mkUO1L/Q5udobR7cAbxRktYg9SyPUkL +pEoNUwmOMIVOV0XQH+UewSz7Rw/iXhrLZknpS/7OgZ1VUetZNXKZIfJWRM79jq5uWv1am3dygFnK +jIyaFJgJHsXs2ZQ82/BMDpXgfZ3ISrGQRlY/sEPgJrTTgy4ay0bqO3+8QX4l9ZZ87s1FG458vDRI +T4+DV/Z1YJoQuOALBU4BXbQWrM3LNxqcYzoGlzRun6NYl2jLw7rOZWgr8YWOiAeJqVz0YwgJ9G4J +D6N7vqh/9NB2OZMYVPmojc1nOUsS2E7F4l+wgg+/0hUEDYXXlOBZT3X0nNTi2vDR2jGgQM+Ck+ZV +mMXNa1LH8vyGpPYf41j7y5fi6sjisapMjL42yxJ4bBycn0YjJxZVZ2YDndc/odTje7NuvoBkYh7G +qVcrIFQQeTe0L3q7G59AuZ6I1dQWEidRMR31nJ2ZW8z7dP2gDcULsDY2WPkz5Lt9ENx5pgAJKIrC +HXZK+wcDnMBV5/ODKO5eQ1rLZ2DmR9ulnlqJQuRyyzQ3O2HQ8wB8+ataRsxzyJ3q5xWpsGq+4g/s +v0+YySBHYa/l1VtV6QA2BVpr23lbvMHCXMAWnvcSa+aH2RD7Qx7wCRGGGGgQ6XC6M8ZZaNHln+sP +3YmgFk6PK1jVwSEHKV4WVlpbmE/vdk50cwJXkD+uvt12f1J+X7bhME3v15GjFe+54p3sRfrvvUBV +6DlBHNGBJmpLptbZi+gEFUHVf3+JpJ63rH+/srVj/7curbbpMSoFRc94zewJcObhmcRi90LjGd9H +ieYBjCnTgZvlOXj3UZ5nBSIsL7nujoUi65sEGpZkAcoYVcx9DALVT4OeeURJvF2SRc8/8GWGNhd0 +FoGBtByUMEHceN9iRzjbBGgtKQIfn277bdli5hY/kcanx9BHSMHhilNaeQPhwhQwgTeikSPokKZu +RndOxhX/LqGmEcHOcnNmKFfPdkbCEgFndN1wdckSa5RYY7m3Wbz0HNPLn4yeb8MCKhWsR6B9lDhy +YPq6wf863ZcOFlLVjCngkHRbbR/ZWp/8BpeOInLFZqus5c3h953OR/ekL9C5wy2MTNbbIRekmnsl +7Vkoly3I9fOvKRgenHxk3dDtijYSMB6anz2Ut49gtRBRQWHS/FtbV2Bok4I8Evk2v2l4jIYRKotA +JmzhvsiTPoqYAwtnjo0AxxtNwRPTbrKfPykTl1yX7DKk3aRxJelRwX5vbP4f+LR+OHsOZY2dAdIJ +pDD2Akuw9FJXjxVIIW4nL9KxVWZYHfpaUV02eKPK+HHwPSprH7SjHUBsNP+Wa0PMVCBS5Hy1lzCU +ffJcRUlfpARe/cjA/zj3vNgyJN7JI4Tmu8vvAU5nhYSFeMMmeYrafSS1bHouYUN4oa4BC7mzXnSu +NXjyBRRM2T32j1UhF9qEg4ZOI9GM56cApslmHznllCh7iK6Fq3vTr8n7xyV2kHOdCuxx8DVD9DU4 +g55ZbrE1RfvSdY1A0nCKsxKf/EBf636RuXBSWc08gcE6iFhyDNyehVET4PrHx8mJf1t+YNBj/fln +GTkSHoxOIThxbgmjA374hCEaKxklKvm1gITeRUgsQL+bDqx9u2dy1/DKf4wac+nW9Qw/zs2C09Mf +foJlR5PJnjE7wLDDG7RlKmjsmMZNywOZpe7JlZObW47K85olTlcq0B0JUBk05LHaZw2FY29yGkMP +mL/ly5YX/pfqyGPl8t9D5wSgiYG8ibp9sZTFmBqrd4HEBGvCNc7KAU9bGz4SB1jQrrecMvcipIc2 +BjnLu0H3ULWlqqjWkxPV6cmX8fP0IqNXEBp0766KodfRilHlFjRDJvZ8mTHWj9Wq9JNU7TRVfgDx +IQ1sfjRDs0f2biiPqin9PmumusliokMzBElIYFixtvMFzdCU//I4SBF41J8fc1BqHwBl1no6D+op +6GGFsAy6rSc0d1/Qh2yMynCP6RtGBEvHsTg7FkmSX4Z6AimBye9zyzKCMT47BABnnxgjjgX1met4 +DX1VLqlOD+jdbdUnBJR1Fds4Kigs/QjzXyBIRv+UQHn1LJ3ZDmm8NMVN2ctECi1doSEw4GDjAnGo +/4s8CZLrtctCl15pP+Bt2coEOzey8JN+c7vgZyHO75H7HMEzgEwtC8HqIrx9QT+OoVppTxxQF14G +WJGSJAvBPt9+4t5l7k2SVMzAj7ZGCU2NeEOnBgeIkwrErhYmQ6spGMrwHQamuESdHWWJqfkTM3Fm +dMzFapwXNoSeNr8yWQkVHZ1HrrifpWWzmCwNd25ZsTmSyXMiYcOnvwWHsZocQMJT/Lz2RnOxTr9I +P2R6NLrHW27mDeQRoahNRyAmV0SxF2hE6pjX10IEiXA0QGIxIbRj7/95TnkJg3H9QClw+XA6tDIu +wco5Xxv7BN9Ex1ZpPthE+pDzXIwfMihd9BpC9dyR6UyUeAFW0gux105Q3++fN2GBcd926g/OzfQd +cM1Fj4cWCLec3w8wbxpyeFC7Vl5xOFi2COyF7rmRX98EwaxcVztOy1DsUUxx1hHZM7BjBlggSpzJ +R+jUyCruT+PQiiy8UWuVJAfUBeMqYQ5V6F5i31SOppwnCaTFK8bang3OmkS5C3W170hEA3eXJpJf +Q59YqabAvuN37837ea8LYSvgAqG+prRt9t/u65OyWmFV1ZSuo10U0Mquv+PEd4yd5ZjhKT7IArcv +O7rU5cU+cFyf8rcDZqQ9YWtSrWMBfy6Pa9sRpEc+aOZjNBrNEprpYv6WphSM+iHq6CNtyCJ3z2Rq +TkI/FAyMpLPAfx1f0iTi6YWsr/1CAMUlcLyf7lw8xWpNN6EayMc/RyWIhn24kKAzcPeEBPJx9aWc +CA3zyR6QOSuYm6Vl2PHmKFsQeaWJlV3M3yvo5YsV5Zoaq0bG89/UHrUS+ntOV6GjZFmGTZvOlciX +u9nTLmvwga2Hcpf7lxKQbX/uWqRQYiNfAlbcd5B/GsppoHA+Cz9CNaOvXmbIdDJ+kguRAQ3oHPIX +x6/yfsOz3JxUprAqLbJggLX8aMGEMKQ8+K+NEZVAfhxT6vWdeNBGr2IJG/2b4k+O9pYxq5EpRCgw +8JRnfLemA1Lgi2+wwdNTmZ+02jQAlUJWyKuInGmxnKj1ns0AlKYYUx250uBqsy1aaBI/RyO72yS7 +R9VZyxUXSALS6L1WfFSjBvu8f/T5TtRyrmMmaTPp5zo68qaCxWSVnluZCRJpVJb8OU9I+GRG36dB +KDTc2vMDtvqjcGJU8KHK2RVvlpRZDaFR46D8srVquoEYtVHxDZKPw3EqK29Lfp1NulwyhoDIhjWc +IMXtQauy3bv9sJSMO2EuSeWWhEZwSgvQoUqRbSLhGru4Ptro5ocPg+wqR+IPhpXfg+s74YuegqRx +CpxywcAyEIQo0mrcuV0IvKFgOuHIAMTFdvZ3eAO50nLj5CE3WRksvyWMCVTKG+7eE2NmkQ4/MO39 +o9zSSHHdxflvOrxM4fUyssfxqk/aEOALmLlQUkvuzk6WnOcUmgM7ybkvruDHUmHjYF7MDzsWNao2 +8QPk1N0sTVShc0Pf1TSMTJqIhLfXAY31U0qwz7zmOLSRzX6M92TQtitjlxDCcys34oI6HnDV5yWi +8lEtUduAM8gJwFUoDvi/6CLU6czXETCrhV4KYhKA5De+o8NfqgA7suV6orshLb43932xoezL9ab7 +O1fPMZdjFVuzDCpn+nLzvIfSWX2+WmznyYVJBum/KNaZXYgQ83/dyGXPsB444WEbGKyyIb4LLrj0 +/UpoID0TJ4GfTsNlh/iAZZn8BvVNMAldzn04tUor2kjAaFgMjw7fNWcb79AmoaX7pbQWRdSI8/zO +TGVepCBO5FH71HmXn2SzV3CgqgvTyPSrhyoDn85CSQell23KM6RAkDixPoqNrquIBsMTWJXMlnNg +Jo3N4B7+dvCDML1fmHkQ7tiCI0wkRo5F/s7Ci+6VS1Lq6YGVxLlzVOO1YlNQMAcOowzwLY0LD6Lh +wWCeM4ETt/4NLJbdSocfCtdvd1vqLz1TYJXAZ8ASvWa1tg/6c642sNdiRne364l1sHXsW4FdADsA +of5mGFENkZqGlCAEZgTZVJ2uLU22fzGOp3DK6s04esduKRez8cJnzjdtrlHWzb2j57xywRnzeca3 +CEb87NAdvbd9SB//FQot6eSFNJjbl9zQhLWHrzo27FzZjsNBmkdHipgg+EpRQwgcuoWfTY5vtvcz +f1rD3WBvCfk5m9JoYaDy41JtAc+aagHDT4KE+RqQBtoDBTIvZH+RlEo2gJEymCCTa6G2+sLlWvvf +mRBS2tuqFMWxmJfylx3o1PNG/BwGTwo3+uNMFlZYMDiQQ+1kLZf8YhIP3WUEFIjAFWtqCDm71PD5 +0H1Orx9mScRUXOs12HW4bUaQVvmh1Bjqz8YK0eERP3hc42cOoWp5ISGDHMWjeOqVY0kwVKNrHG93 +mav5iQ0gLQRdWzH905DqhGzSaDLhdAuzGCX8KxLbJ1b3vWXaajvhXywAGkxILHpbIQ9ThLKU9kIK +VxevuRASEvelq8ex2V4p6pc/XIcmtE9nbpqtFVBeQNifsZJSw9LIAR9R1NpZx9PgJ7yFi5s8DLuL +SXTtVR3p28AKA3qdxiF1Xa61dT32aJJPkhJD5oBmQWijP0tDHZZqGX2WX7jBa1JAS2ehrmTGyqgp +hefAvODiqtJGJF7IplEoUcKMTY61Jw+ce0y1Fu5SB9FZIjxvImVIZpRUahy132uPJQwXNcEpDvtG +dhKRZw30wjA59OdPB4wtjUq7H0rrul+H94j/yU7BtLgM772gxnaxhjYDRzToqpuXDYdJYxZlv0Df +o0HjgowM5etpWLza9JNc3ekfkdihviT2XuAY+jhmFEEFd46MBtuHLbalLGw2h8FQjAmYjoQTQF1P +az0K01gTmILMWdtqUtY/XGM+qy+ZKAeYYhuiUw1hFwVM57u8fC0MvFzIXzX26EJc53Lh6TgXGICT +vCpg/RezX2lC6SRWAf82tg+RBmQzKo4OwEhrGlN+6lYNEBywZWJfYAeYcyO5ddbtWuzHZx6Wgehb +GIvsgCKaSiDoJevUhyOMd8LwG/AC+gaLtq+hQOqJDkbYfroC/bV//lhic28pKVf8Yr9EWN2KVDBk +GF3KYlveDNvJYX8/dBWdcpdS4IGX7uTuy/KeHJaxgNbQoL8zjCQ3OW5Ka0iDHtl08U+KHRr/sApq +8dGBFfEndleyJ2dqVw89LE1M+XZv1C5VxR04xSdkRvjRNPmj2U0GhKI/+NQ6SZW9LMFZLggOy8ro +x3k9pMWdjVqfMDxRWs7Ixhn39FEeqRHBFZroUyfxhSLpFTHfB1jrTj6BL3DCxo+wliLMta/X/KX0 +N37KFE6a/Hh0KLe1KEwCT+j0VngMQYJO/vdRYnHsvV0PjHf8Xv5GqbEwGNG78VjJLNm+hypGYJZk +Dnefm+13Dgj1UrcyOTW9QpJLuIZizoJI1CvC0kivxNDjDP1vyGO/V5n7+W31SZveo1fSjBrb/CTt +BDk31oIjR3IScQiRbURbROorb2+LGDk6aSTsP/xQxVeozzsObi2QVsmPEG98lJP3OtMyQNTxthqd +trkqIuM+t6A1X6SxEbtrGJWIo57xZ9sGSMbKEN24A9RlhwJq9idiWk6U2thdbTjBfyYH4Ji2fUE1 +z3Y8a+wUAQtF/71IeG06goVPGpk1apRSReNw+X+2Fa6wCpbvemgT7UD/PYFJMMRHsDqKwN4pVrq0 +UbYr8oE505MsYUF08SABd4Ru3CZ/4kYTjQHi18Rfh2fiy4YcCtz/hYle/wC9Cu+4apSP+BglkgSZ +7hq0HvU9Zl3pT1biFKUngI43kgOdKsSe5pvnES+t322PDOE/+CLffn8kOlUgRO3GhgZsiMNZmftn +FM8w8V26+ISeXPYxC5Aab9sCxD89f91NHuPzJSYZp5+gpOKLxE4xaxLgpmMvbtpo+e4XS8xsFd9U +MT8svm/KX23RvhPDt0uAJHUUbYocd29IXu+x7h1q9ewQtypWDvhG3OTQIjpkZx7rYjTVo+xcEFmW +NC9ZJvACLjFbdaOmtMyT48fw/zT8bt49KY0dI/ewkFTHTptc9Bo1HQtJxvIYeqaTucuRkTbYK6SV +CVB4yMHtRGMfnL4sq5SWTvyAQRzrB88Oa3wqAGgwHglE1l/dbbo652mt9FUdZ95gSARvVJQzyI4Y +SFYC//Iv3seGQlyf8eq9JnTdW1bNGje/sHDQ5qWC1trMPQwRaYm8/f6H/IZZk93Jkq8oNgpxiu1F +LZw4xS4R34p2lM4CFwXwymmYSIfAHrp2E+P+khdpFO2+Cbq853OalC9B4pSaaUe02gWoa45GSJZ+ +JFmO1RbEXFD5MKEYfMMOnWo2DRYb8b3zxdyaYOLYB9YKekS54F2D8HbeVPH1sitjNKCl4hosY6MM +w8HtA5TTMo47q0LaVKy+WUa5B+9XQSiqUp5glEyTlLBvnGVk4N62Ow129VwQ3ukHHG0WkK8i3gZC +WR9USUHE32ZYuzQWlzVBtoaurRaRCr8+3xcLn4sM60oosQ+FgQCwNuVTF0HCCnaE6qZzoUc4msVx +WTT9zyMqEk7NooN9McIwG+V7wq48NRX5ZYMsW1aFqY60KOqd140PpcluGBuUn5VcWW030fmhouWe +I3dscWmhm9mIZwzg8ZomV05zCMciFD9S5ZW5tJGxg0NjMGQpo7iRvQWc+8xN75YO2n2iIRK9TzC9 +ZRFs34InZsw9q8uf6zj1psSRH+nQX6Hxl1gOx/MrkhUrzLVrU8cYSbomV4z5cvCISVN0aOWF1SA5 +o3DVzkEQWmXs2rn86zc+v4VFsyfyIJC2STa8pG0XMB9LD/RRmM3En0a7ByTrHApWvNhJ74SRIik+ +T9Cyf32FMiy4yDwPUdyriJ521rQE+0nM5kHP1mH+KqvXitg8+ELrfecQfYsYl+rW5i22PO8VmNrt +Oe2twccVApzkzj2zq4cSPdGcrGyDgWq+dEAOwiBcwDl5NOEESu4685gDTgiQvxgr2FNmbKMPGyYm +M6CgKzyj8ZMDUWAhRJqJegkw/0VofEw+BmQV+Kt/DLppPylwgnBEG7fbMePtnZsq1aP8/enxcs2R +M8pQ9jgQWi4SJhVjB2JRUzsTLzexmd6l7QxOaLWbuvpsdAWIXTUyKd8GgQrRbWtG1HootVqV1lpu +fr4lkgKsiJGwsmJ0xf+QBsBYmuGNgStSUL1+hmqjPHR6Z2by9hzeeDEfXJgl0VQehRta4kYAFZVp +3je8qvHnshpOhAzopXXSkFqOHbR9osKist06VZjmR7D6j+HhcjWnDGXXVeR3K7UD5wj3IkAFkAKD +9qOtmRbUtjRtTBCPVZG0M4UNsnTnKRJY4QqxO1UrRGNmJ+h/bg6Xc+m/6smPetL4IyqOIkGbraMK +KcmqjYwj1L+AhrN/TuHxPr6V2ZGMVrNogmi5tsQhgZTtnlgYqKf6X1/+NGoRlH0/sbOSmkcVnnip +DzFpoldJ0Db6vIKo/nL+J2ginbN5L6/XS4VHCbq0BsIyYOlD6rDqt918cw1McGEyi3Gv8aWeVJTN +2PuhFRcZw5x9iV5BhsWevOW/wUlCl1cCLUTGggRmLo5OL550TOLicWM2C5NluXL/XytRYtDeDmnN +QFElYc7xQyC3ddStZUPUKcECt3VIskPuqAEZr496MZ486LZvpuprhX0FHiETq/AS1EtXAhGNyMjL +xc9TJ8UA9OyMKTGpB5xKnw3MLr6hDnyxa8GEnt6fxdpUSWhAQK4L9PyOP7NHw++AInYo5fLjRIXP +dlvO/jBCFK6+K927ULOyNx7aO7YLYcUWZUKk+cwZoMZWua8c1GHRGmwi/1XX2gTPzo0MEbCS9jBE +ir/3QpUof2zAiifxGVZpsEBCbQOsVsAPuL0+dyH5XLT1lKUJ4k3hR4NrwgTWusUDL5Ym7RxLfE0F +Aim9Z4jF/BErIj2P7jKWy6hylxWNogUefKLQAq1rppxvHXLbBWQnPxyn6EBsJqan1hgV5LS4wZQb +yzVGFW0AiIlJiMReVhwhLL+hBCryy+LE5VS8f04cIQGJzVyN8YFqDA3DuaDH3BJYShW3t80nUetp +WdbYCY5Faw/IXkMbhRffLsF6WqjUTJL0WU0y6Fn6TcCmOjyxV1SySiI3ADOZMKOtajIvEb8HQZ1C +dsC2VxlAI3H7NfHLcGjcTnNByuvJewGpHMZodS+VCaT7c8i2dFr/3QjtTushzKWwy+1t3jcdOXML +A1IHQ/IYvoRB7Nkf/ZA2YVY9l0RDBsmZuNrQTWCblpc3sX4qZ3hwgiwkjdvSfKYpNQcdqqHcO9s7 +u1k6eQhgsDsXJK9ajAvBYwYSfxKjNi58TDp8LelD19+ibPj4Gs8neZUrv7RnIZEQEZI1p8dbcfx3 +5SsLQ99Aefj1FwI0DRw2CKfED8iYWG3l6mWZsqyuFk3fp4D/PTNIdau9pLiwyyZ8MQUoecDw9cy+ +Em16tnXgCkEcvmpKDHWPCQmqX0rlMr8XkfwIdqj/VNiYOUVcSEtkmGvTN1eCG390thHhOydN2w2c +LB7if6McJMEyiwRIp5q9yjBCQCqvQDQ3SGRmL/yD6Mhm9PaZsQg3wZsegkUEROCd4XVAI8D6AKhU +y6G2Qv0ZU2zmF2Vy9SOIQ2FIbVLxdFGb13sf9AOBriyzEy3mMGZzQsOP5uN+yLvq15XBxaLkaMOz +rSneC0I1rrsZvCHG8/CGf9gd+uC7T60PBMVH64Pv4E1xq7M///03Dhfo+nDM/bCW3FPd/AWb7jA7 +5bqaK7SO0PFqEMP/JboDDq0XuYTWJDnXCpoc7Tk3iiwIVEi2FaY0cB0MwE1/rZOEPoUxh+BnHT7K +FK1/+oHbLQrO+5UqKTRwEYCebEQSG9VUxtvsw9zElzdaO4BiiQAUm2s5jjqP11tbw6aDyMYUhYmG +hLDtoNf0c2Wzy9Q+F76QRJV6JOjnqqnuTxDkuojJRt1LthqjuDrHc6FUoUul4rbJdx/66ohjYmAl +in88U4CPG7IPXctRDo3+mA+A1Me+BYpNsNM3ZgzxfnV4QSxn31bOixydz32bEdh814T9iRbx4Lk9 +4Xp7kme5nJzrQhX2Vr2rU8pAp5GyzZKBbHteRwfjZPSBTscllYmHbLFooxmpSaKeEozxJpDMGiS7 +pQ/OMLB5iixZgD+ntq9iSwcDHvJIkyqcNiYqGehV9gdXF8YqDnNLeoKxxWruLj/T4mhjeR0JShXl +IIYaDR91wlqMuWd0cE4zDdZUHZNHKsu9IcO9+RzymoM23QkRPd36pfm4tpWaZP2ExTfXYIGQfJbw +iZcP5Q0qfIkOROgoRgxHe/coEDYHrMv77YaRexWevdJlkh5zSFFrbGGjI9O4XN7ak48fplDvlzgi +WK6JaudHVk7P+G/1mAF9ryxfquC4zaF5ccGkE8zlu+QDNm8XPgl7htlLCPsRuTqJ1bqudFXH3Ysg +cZFBNTdeAkN+vGUJqQ39TCtJgZVNR8qhLjhxHcSEG8wAD/jGN1iTwHeZaDj2xkT8+imh5mgf8r7R +6vO80CplivNQ6QDZO2tD6LXTHmuXVm+RXvPfXSyr+zQeL8JzQFcEaFM9sqYq8L7qn8vcHBhNp4j2 +7wKIZPWPuzSB8+rgxDEa5Zx0VymM7kRQmu7Fx0hdLzY4euQqj4Jdx8aIVzMSRFEWIssooheF0+29 ++5uUw2gfXujdPSXtSrRViUeoyT6wTkU5rbDO3Lqcyk7VFveYxqiVspfMHfr3I8clkovymq0NrvRz +Ypwv8t5xKkajrnpGJLVO4oiOCEFatQnJ77TpIULJpZXwn4tFzRjcs0sYy82j+30Ffbyec4UKzv1z +2G+EG+j1F7bBy1t8OLdEqopN6t1EigQnwL1GZUTiM0MqjhHjOJRnBqVu/IZpo/hxk9zjXBu5Y1Wy +xT3UMz3ekE4t743h1mCGZMlkTW6HRHmQ9Ncs9j+xHibia4qndsnOF3m2AbDKOvA3WCbjWG3b4j6+ +U/B0V8s63z/q2wDxg+Drz3doABSpWhr1ByWhwnjX/QOeDfH+dET4r7JA9FR0+Ak72fCBLTGWOQle +8teVMTOdodoVuHrEQf6ci1rPt9YoxPpI060e5kpA8QC8nI7tihWl0M4SzeuVkRMxc3/ll+ZWUdHr +p3NSSeam8UC6zbzTPtMdOATyRiiDIpd224y+xt0cZfjoSwWPZHHIZpvyb74y/6KjNlnNRHZgOOvC +seQJkNo8+K7W5QAI5q5cRYmExqrD5WSlOVaIO7ngNS25umxSUMtvXomyfML/zf/OEkRRcxQEZK3J +zEOvi5Pv7bt1i/81CU+JEnz7JkDbW4tm6sq8qw0HYNIaBOzrlefx6Fi9qW8RGS+/AhMnaAhRKu2d +gYladCxv73OAujFIh8hM4e1aoeID9jom2thlxfNLoA4eb4yvzxrw0W+HTeFZ+eDsp23j5HMeuGow +sq1zrFYeTl/Cic7H+3fv/NniBFTR8b8CbCHc00CNe9Uuab0g6a88NpqgaIqPPrYvizYngMv2otEs +zOm8BeOKMBjTFZDqyvOpgWbJZJ7sirR29prf9CSUlnU2n2BXTH9NH9ut+oZI9VhlUmOvrKroyYOm +K3rFLFdsRffTJuo1Xy1E+HRZcxEyJrZ1UZ3xWnEkeK5WWBMF1SwRGSHPNyGiEoIgdqqS1wsLvLAw +sKS5jNNoUoBLsk94MBRA6iXSA0wCHuQp4xLpfeiPqt4p6pdpVOB/4/hE0C0QREpcLK/rUxHEjk8J +DpxNxgahh1GcRcQWM4/JtoRTo6fGvhxP8zZzfPsJrfmdR4+wdBDFUrd7RcpAun6/XehF8orKfH17 +bkzrtElAr3f5nr/pHd2ZtFKAtUdwEmmjQieSzIJD+IIOksIgxSJlVPr0f8bwDqvgABFxt1dsVntJ +zLlilAJZa5AsU6qWAFFkdS3yYbW9lS+12AKut9dFv/BU+gJ72Ouh5K099/ASMt90AVTZ/Gu7wDvX +jgqJgLBcLpddG9QyzLi7bYkYLLsmla/oJomF217KivwygX2Esq1Kp6c6AJRfRikGVEoip8NvLurO +FpgrRPmSFDPqdQvZscgE0MzinIMo/0E363a4TIaShHuN4vOKiOub++2VbjYAdH3X2QVBsyljKTj6 +MYaHLAMd6oh7v++d7gBLR8KbmkSshURphQMjvGGE98x2TdAQxFaxbUtyvf+masCYDHuQF50TLfC0 +KSrntEvT+OCBJ4B8c+LKEtsypT6GjNHrapcfnl5utPigqRZaoEaNBaHXqTcCgw5OLXpxHJKnldag +FbaiAj/0z4cIcPFW2IqogYyBv1020KgxpYfoIxuJOTY3pXtf8z19GWq8ceiI+bGS4gpwB0ecc0ew +Fsv7v21436vDtDxg+lVA5snfGzMQ2e3qkVH50nisTmScN4E/CMJMDhFRYuCK9ElufLVt/VGREsW9 +NWGhceTRzjIWu1Rv4i7ez4J0eMnEkUgVHCeZJJLOtXWh/2uZJRdGP9dgQ1pYQT4hm1R+njpNTpE8 +/Ct4Ys9F+zs6kFyHNmGnspU0Fnxj/Gdvcg0ybznMpz1nyEA35Ud9x+vvaoZYMjOmXg9XVtBqD7Sp +vvN0Ut1UK0LIuXDS5kbUrsX/0zXaKvVsOGSux7a4m1DIUgONSWUDcgMiPtRFf5T4+OHvi4KUyM2K +Mwr1N/JqM7WFTrhsABg6ZTsp6+pufPVZEQH6icSDiD/4mbtMHcFXnW+yWuoK/jNeuo28dDko1FF/ +fe7tE1bYfImoQPlATmQcEnpfAkNOSfkJkagqonBMtYFJUSlnLhKUeLMspSQK9lzZ01U9OmWLWlig +7U+2mCL3ipLp2Yq6DKVc5Nl+VDMyLEi3p8PtO9rwC5H5WkhvjPDjy9Dx+V/AJJGSAWz+al+Unlxi +YDZ//byvuSRENDvw8/AYIeHI6HwtS6a8ai7rV/SBysRITuOnr6dZSm3oFIWD9VFnl/HoIUkMRWzj +ScJvFYrWzZ6ScOhsfimAhLupyV7xEU4S4XFO5U+9pQUpftHUVuQzAfq8tDZL73+Mq1Ch5HcaPQ0T +/MWWDiLa88vGwanwyLQyltfKP3qeLnT4j6icHZdU1OacgZTIH85tP/7eYIhddvuGf19T9EnxvRrf +zYkaH83n3TVISwGRbK3Q8GMkAetFTwUYaP9xYtMKPWgqIHi1/0zzMtUTs/X0fEqg6b3Mex9Y2s9+ ++PKnKBfB+r3WbZJMEEn3M+Bznj73WguOIOW5En2A3kGqGuGEoMxFsHBxQMiydUDDk4jILNbLEiZF +Ajtj0yFNfth8WX36VwhDs4MrzRpGSBnCKCVi33ga6/7LY1iPA32ry8lMFAzOQZbHcT+3CY3rJfXR +9PUzKwZKusFHn9o8DJadVHXPa+fYNQLEQsDijOXT/L5pfO7Xy8tcK12EFMjQ5RK7D1UOD6XcGukg +JNtk0h7hfiIXyJmDy3m94w5OoEPX/iWCZ0Ph3xOZGe0sdkuFhaVaxjmyHsSMHYXKjXUDqz9zBcnW +GeL2Z3MkPoQHG3HPKI1A07tXRTlvgWpnwRKS5ZEASBC3dAh5H73Gh4OmqspuiEr5DjhnT2PhgM68 +TGRX1if99KHMOfuyvz9EB2yXc84kEU5ygX+yCmD61zD8FbYqJevWvmTIoV0+oxatojGssVLTdRT0 +jN9MHN6yk2L8aRpo4HTaqE3k18D62IpFxgqvK4lx2PJ/JBVosAFREhJax/pgl7oTcN3VudlUjDNq +ve2KjgUf57CceAfqpL94OOTlad9lGPZOikSH1je6Vd/5JiEEorOLkWX43Va9MNgbWX0WTvwUfu5u +aycfu0QFbJ9wHELQGTF/44AV8AN89J04wYONPBn+cYSeOcLaS5ujk++btkUt/N/hT+M5cqa/2bqV +/lnthP2StMhymbvTTzBGiJLzs3qohCCx2oXhwym4Nw3F9O4hng4qj2kJzjRvmIOeOcwyyErBV2vd +Vl0mAYZiz3xQMJCMU76oESChB+ENYl+KbsHmIw5shffnT3sl4u+loIouAypzSm8I647ox9+nxcNS +QjzeoigVdG/3dNRuprE6ZgQdio4xUw4oZMjGyfl9JxDEJKtk1QBTywhNbgRI0pJl3YYeTKN979tA +41w9EE2m8c2azm4gOlbtuaTcNXtE88etN/iDehd+H/jNvF3erIcbnRBEz9Kwt+F0fTpmMgkZ92ZQ +5oRqsoVirUJya5c+MsyHBxSAj33/1CSZY00tee12L4zAOwcm/AI6mx3WeTfKfbVhiPUhWpvfwZM1 +Tg+0lwdT0XeG0T8JUsle58mECBQ4R+uYVmmEZXHpXNnN4ViojwnBGmDmM7kLJkHrHZCGdAeLxb7d +XgiW6owvtuFYahY+4HG5/NRNjwPmf1kG9V50Gwmlv/BxuvWFX8cIljArU1qR0mzUJuLkVWpeA3LM +tRl1sM7F+CV0VAYP3Tsy/pBqnL+zRzQBqsYkvN68OC14IaDYqwtUQMHRk6PYEWvGZ5FpDWEAn3nr +f891cOeUVg8ddaJH36qG8cbzYVcXpjTZLQQt4dNSZ/PIO+hjNRaqRkLwamvI9TItVZMHdXN6ElAH +i4um0bMMCBevmGtCxScHtWlwwcQsNSUuqFwX4bHUwpfFdZOWhweDnDrQL32azHz99IC43GQ6MmII +86BFC4nxJvtT3EXZU8RcDkf31MMcjHIAvXyGxOdlv7vLqT1NlJswMCEjloPOVwizaBEf4RCUK63+ +Kg3qYc3dkwoD+VyfH3Bgk2XDbvILtQ6rZeV/WoXmkXbEVyisK3Z48ukcHTfE4yoJtgY0B1gb6hTb +9+lP0FVm6ItlN3eW/2WWtQ6pPGwOvSC+MljNaxAqn3aX6OUSNNVbzxW5IFri5ppUvGMao/mCDdG1 +laaOkbUdNNbnGl1r+CY+tqG+7WXRuTxhdhA+IjMOLa/cVGJknh+fAZGdimp4cX+ndZcH5evcrQr/ +ck6n1HmARzv/hRegRQphySh4OfQTprHRQCRsybsOn66Ojc0oCGM4wkZPHlTnMqN8zwa1eoMsraaD +YVb+Or0/cA+/9uXUtjHbkL8Z3dvekEF32xHO+mIql5X5R/n5OAYfWFmjydrMA3IY7+ZBbc1h4eDg +djhLf8oZXae18c2Lz+g8vbfgqwZU60t0fgtUaL6FbxSZQGcfefz4fcTPKAT7TbVkTXjpgE2FJb3r +NQN/hAem0P6tihUTOpiHbQXeh8mI91rk5nvP6wwHFwiTWea/YqWWQZio9mS0QmShu+o898PgDPLp +uoRMqyXfDByepinClkjn99ZJb/YJTW1CqWRQirUoHrLe3hnie/zhhQIpTRTYF5d4uIjjd9HHZp9r +CXLP3/z2YXZjzpa1XeyWkvvw6Nyee6JXeT2Y5qXrsGLR4cKiEm5leiq/R0hPZAuH5mBktMzlC0Sj +Dbrl+4tKHDdbPWFnuAsqHtaJIAI0n/hIGW4SHp6cLQMT/J1ZpAlwXk0TbiRI61BS0j6Z2GZF1gil +bRVIjrh6DFunGwatUv8Cxlvx/QpTNjWN+GMT+4ENUGeuoYtzUNiXQZcGH2shrOl9xjX/cDdaWEx+ +6ySdMSBdx5rK4YV8ansZ9Kv1TjGG7tYq8o9a/CY9/Bo1BEKHTtu6xHbplXkUANEiv/NXO67h0ytv +g/6ew2Rk/v/rFWysHD98ewy8RJT3Zmv9tQmoMbKOKSIHclBma2a33YA5YUDzkHIY6R3XxWqx3znn +ske3zYlgRt8KJG8NDr+N+Vh3Nmaa31yho3ZBQuHTDh5OPz99g+M7l8qcD3mQYr1ds/72rPfXu511 +0Ojg0nwVpAU4nbI3MvhypiCqBsYiGcw3I3gcnR4tyjLGc+UDQTZPbEr1ZPK160s6mgALs35k5BiN +1X2muG4kUz4qkvI10x255f69Adk2Ybmsm828XCg7FQKsJRaVPuHgxcE4OdKe1qhLzdJwkHBPzZgV +ENQZ40iElv26Xyp5h+WT4enWg0Xtvn+rS4rbI/dwnKne03KaKtjuiMWHC+oflXK6TKrjEjyQn8HQ +e1z9ilidHfEQEYHEIduV/zGNDFziX9Vquyiv22utzQJRNfiKsqkqm9X9UCGdKQ/SKSoeI18MZ/a6 +oZ6m9SeDEvj6UaoqatKxiupbojef+siUDvNIgLk/rG4kSykWg+94fVXv4SyGSdOx72ydiAqzbYUn +KeULgUiogAr6cgauj1mRwiunqC/th+j7PwDQQCHWKm5LkekNMgQQQWaSInDTYyGI+6lYwBjpBQ4p +XF7kecrf3Hd5le3rkSiPTEvC5us0iA6NgLWaOIikwa5AsnJe7JmB07TQYSFD6STYX1WMf/z6CQ7e +gsQ1iEci1CJZHRE5UktVokAb1hVIm2by6J5wWSY+KieKsN8zKM+ns0uCyNzkCCKe4rvlsP8T5B0z +0J6FaLEZKIduyJ9cSAot3zFFVOFESw35Ix9QBoRrsf4O9YM0ilqF6ILc9pgvPLKL1ekvPQXuHV3Z +q5OGcDKTMZQQzhg2z8p0ZoUQjPOhFSEUHuRiUfbjWX9pgJ+BoKX8JS3EQ6EL0lQ186lwEAdXrjQH +DNkizWb31fsb85XcMurDMcm+nCCl9yxChEbTUE3SR5bHytw4fa5yWYlRHXU13hlgHAO6FUBQMH1E +bp7eqQdKZ8XGpdUzj+f9DAw+mlzxW/mRiMPQ5Gqc8LgzuUpW6T2UUyJtrWgMfzCgLTFlwKxd0WUI +IUrXLZ4HGSxbDnBFEMqGV6A0/jILVYlVJSGpLFhnUrjJo1QShN/OfARvJGW19G4CdwNOWMTug0B8 +p4zq00ToA3ziwSyrtTHsVJtsl+Ba2qwC4WizvnBEtSiDbob3/e7uDc6GsFF5m9A/O/fetUdSCoad +bWn+EYoXS76gr5QDjrXTzCA0hZJhaEWxXMTSZ8m95sSzLtFZehF3+NSng/VeldCMT30Ibenj940J +DgAzxw6T3CtUkdmuEPREDsgNWU0mShJ3QaRcQn8GcBZjGvz+lhmahYWnXXdni4Kqr7VZumf1kwnm +MtWtBPKkmVjz4iOD+YOfXhKaQjck7OguqvzD8NuFTQWNFNA+B8/RdT1msaRmlNFUoGBa414McyiE +sP5YohQxCVk1eW6757fIvBu/CDNsNYoDgaeMVN3u6Izqsce/s9cmMteFxHT9c4473n5/rkulrMD3 +6fsa6zkKeMFyHWyGc9kV3DAuMYaKwb509zcEo1qfBbHnXqTVMkQc/XMdtH6bCGCoObw7H0zi0rmP +pkSGJZXW+NQyKvLYM2B5SOXvkW7eGWZh3aHJLOPX5F0PzN9IwuSmWaHiJ0o+RY0/TzIXKXHbDf9O ++LYsP5HZZcRXI/ZRaFrXgzTNLPDn9+ILjbVhm+paqTUq7RZ9+biRkqY/KutYI1WmrCoV50KXUixj +1+LBXIr1S4oYN1J6hHxodNpt+8cgjLgXtB+o3e1srrMBawCKDms634MU0oySAlqed2+ysUo3pM7H +4ReGrgFOQTwX1TVx/KrHZLn8c/CdzKM/PinzSHBGKpadIvH80FsGkSsT5e8RZFgclVrCyUUEOTm0 +8NQBfDHI8dIsq5GWMzwTAJkcJTndNd+ZAzdO/8K5L7Lll67Mn4UivQ9MrftKIsXU2w6ttKbJ2lIg +oQiB9i/2ThPi93QvTmo5NxQIKhWcZIbIGrK+K8trm/EtPNbKLHOtBSOCu184QWkQPWrMjoV8DwPg +BAkt5HUaFWHfBF/yIRPY15y+bQ6D+sbFJgWZmE64i4n3WguTx9lvhDY1R9YfK2ORMOa3mv+RLNDA +YWAib3ELMynmDpMN4sMlzW9bfv1bV03DSBGxaiDno4/5IipJntimkS0TSPN4INkY1Ezy1jIkRDBk +hveYMdcAYx0EcIL1zgF7s9KXivaVJxot/M5HXPiOcoGpIEKjg1g7NnOzrKtxxNksen3DzmsrhWFu +Kp+v6ifxTi7nsm3dRyjskC4+K45mpd5yHW4YTj5HyprmE5Bm33mbjw40YgNZCwsVbzzEyvYuO1a4 +xhfz+IAwgc+wCY9Fhent90Peyxqu7DK02Cd5ifrDVcRXj/nH7nzHijl66cytN3L7t6dojScNv+an +SkIY7d1QEatzvqAqcHwDIEzQt2S97PgqCMidomM6HA8phzJcf3Em1PhzBx+5U1/gDemCpHD1qp13 +XtXkUJP5V2pz+oG1UILghP0CLfQKRMlDVrtX7wpS1POOCWozmEV9JZOkUWx7DqYUl9LMlbQ7vjYi +aSmbm2ZU2ZY+kPI6wCNcsX3XGXCJWlFgYJN0SUmhIsMuD0r7HQn5PvgM1dMdHBvzDlqRR7YRfTOZ +gdoLMHPGRyX7fvWYXO+cvtBEYIsF8mVLFcLuTCsBdY8vpZhPGxaDsmm5Z1qAay/vkN2CsnLI2zhf +E/81SNiLb4lByOaxmTjcOb4BqBfh+6FDav56KgKmoNaQNd0Zk9sVU5oWArtXTGcQ6gtzUE+q544V +fQjaoO7PaLWIk2RjkiJMrpyBnbm9FDD658W4BqToA9gs1JL6ZPJ0Kmw5vXXCIxaDqFO9D8UGHnWL +DBOchFtCfZ6fK7C6kPzEMs8XYRlf9rnGlikKHyfjw/gfy2uDhElJOtfQkvJq4maRKTnQ3/6i50tG +JmgypfO2GvDoU+fJqOkccPSYAN5TfZ6XRlDL58Fl3s032EfxIlgBJkverQle66wz2mE2OCe2xKjA +/73FSi7IeBbW89FMeVcQohN5KcfKRJLXg9ypXDFkfiScThSL+0kzO0amdNbWb0DPoSqmAYP/wG/Y +8Xga6miM2x/30k4XYTdwlJlX0/9eVMU5yStJaA8GJeK+Ei4Zgo1LJB8hfopsipatsRu3qiVPOJ3q +1mh+Ia0N3dKnGhM2rERhOxe0VnVe45soibnj2wWkAAN+Aq5A2zX1x4Rimf6GYaQyAa84qWQGwEsg +Wf8rdM+n9tYL6xqy89u17hcNL+ZBpeXW3kdepyHIg5Gw7ClRO2ASTF+Qn4sCz7ojv5myiFfq7MdY +OAdbaaGLJ8WUo85k2WrW2hRJUnzrq8GRjisgg0SmyF9Aphgl5qa1VvxpLIO4UtxrX2OYTWellbAQ +5Nh4A+OKGk2RCgPIAEVLlfit7zIytCE+pCA9fPBxsOX1BPx3TbrqSX7IditY2EK03RTmZY1WqKte ++qXUiKWqRnunh4FWYWcv3tNdcycUTKAs4eIOCPv4cqkSVTJiljkkXAxHnUZXi5e8sq7VFb2NXrlM +WxNIu6RTutri6uDVUtKWFtpLvSXw24p2MtFqKrWHBniSmuDhGjuaG49c42YTnj8yAZS1d5mJTsmD +2ZOG6SSeKfcrkdMhluqd0cON3hTI6AnDIw+mctobr3GtdUlFwW61EzWtXnJMzFWNKvh8BcQiGMG2 +UsY1zzmyaKh2UaXc/5g1dbp0zkOLdmKUIxQ1ruBLjKKIQoSOdZbN6+a529jFzKjtfQm5hNtisbFj +Xw3ogP2JlBhuIt21FKstXzyXvzS+cSpsJyUsX203IWsjisi97HIH75wgYyjYtwkvDDhac+hdWNJu +AeiwpQtCwJaNW/GJTKXegorIn8jeA1OqfbbZV+9x6+/jzLobhNdWSx8PAs3pjTO7HJhgxflYX+sG +Sv6S7wkZOQEscVkJaMBibq6AinqEhQjsqVyyXsMqouLTbXLrWeB1HRd8V4eKjs5uKi77hn96Gvqk +aHMNY7ZJRc0iXIB2fY/hHbsfF/7zK5YwGzQEY/oKGRFgXkzq7qSmitDXRvoVFL/dBbfMpn5HJy3D +NXqCPMIlh50pdEe3Fm51elzCpfun3+jjfLlTxa4rVh9jMM+5D9X/+nZBb4iSsVkcgG4E/7eXbbPB +7TlspsRxHVKeUmFmJLSDwjjIcEjWAoKCm/wRXMCwXi5cSRTj9JtCYMLUQ+rtuguZswD382koXqC3 +VJdxByHctCd2aGRNz+Ls6AtMExdvbjO6m7Py/112OUSimMUJH4H4ArAYIXwK4UD8jG4hqihq8acq +ZxxEjBXEkISdx6o5Qg7B+xW32D5rpRUliYOqdCAo2LSCerg3YA7uWQY3/48LtNRe6h+iSnya0316 +M5r1z561vO1JDbg6QY4UDnkeEdAH62RJXcDMO7Ah8FlZjEnmDsVptdAVo+XqWy/Tg8zcC9buM285 +AupM4EOgdFGh0sWy4QV/BaVP6Ll1yOJVcOXMOhkPizP0hwJ13Zu4+GEKVZzi3eLEQfNgHapLBNqw +PczSC4RbId4VZ9w5qjZkMeSxxUAZLhmQWWwE7NmUJPoCBiUP/Rik/AhIrzcgiN8H0qxU/P+1wqln +dgCkv/1DXCe5ODcBRTyZ5UjjbGztZovXxdD2LB7nemmv7zhJfPFroiyXjqeSo5IaK5YLqKDwXE0j +I/N4HNtbvVf0F3r0ZsY6boHukvL45J8MmnSN3vDbHQRPnz4gIHSuiQM+8avx7YWlkW8mlMHcEKzS +VKqFFXJRmRW0TPxTz1JLWfuI0iEuzIuBhbrtIrtW6WGJK0DMsc7UnvWpx9s8KZ5fYTmzODbU2bjk +E2HGYF3Nqegql1wENyOxbyMd7/x2hs0wzY6u91jFYhjSIu2I6Rb4z+odt1BhRYiSfXuKQ991R3Ho +xN+MMQtWsqMJwhkr1vF3Ti8PCXS4ueLBCyeCH4WuXaqxOWPmQZ4KrtLY78xwt4ngNs8JGkTHhLIA +Ux03GCLhzenyww8I7bQHS5bRu7mW/KCDsCKJVegocBuK9cwG87ho5g5BhKBLtrIN3SyLcLYxejNt +hi6xuJoZd8F1VYHnMCd4NXh9klXf3cmnuvcjzHMjmzpSM8Llrz44GU3I5FW4Jk3PZZ300hnjsxyB +3kyJ7X4ddf5gfNLG4LumJjhAMkLDgUZ7zHjfUCSktYFEe4C720hsrMfa2IoGSamthbfymdlVGYbV +goJCE2LOlrNyNGu1cg2DB8R3uPnudR9uboGy/rTCZ5cSu6qSrb31ZNju+P0CvekBftGvQa3W6RMD +ZUUEPjcnCC04VLFA4ooU5njWTqjBPiUn7Z/LKhnNWRcr9RB8zlP19/839jVdcnkvmXD420u6e86e +VzHUC9UKdt35FSBQn8GaMvSdINwfzc1qUZyzirm0VbiiWnAToey0EnKGqF12MCp6akH//uDeV2bp +OVYIK2COqdY4Cjn/qcbK98XcLovVz1cbqA3eij/T33YR0cRuSmHGccNkNd5Mn5+T+ItIp77ifx/x +aC69XWROpw9czvVRqZIY3lom/p0hUhMDUpcAZuAWtl3UapmMkzMbrFkvKufZAgoJtrqptaX4l7sl +mZ7d3EZx5hAeI2kOfV57kVGhihmigCbdQF0A6Oew1CKfZfLo44lM19EXb7J0cdxYfqj1SlA3GTXN +9uGjPd5JK0AXzvGfN7Jr8M8b9hOU4NoLynqMvCFiH/f/gqTjbfL/6spYCrhivFO9J4Q45C6rZ+rM +zQszuCQsd1ARsjQ1GLTegb25v02XJS8sH2oA+ggR/abPf33LyP7hjpsATgMweAZIiBJ9onQfvDJA +czKhRyH3Rg/q/pixVHWhI5mJtFttilXMQzNLi8AIM10doW9HRpVqorO6GqifQI4kc3Xvc1hdpNfn +d8g+a5Kj9E9Utsk+yEALRtKx2CZaELNhp1wzQ77RjZvRTrt1KVIY52Lz+ELgeXr+hfKqXg8ibLoP +Buz4lsRZ7Ojs9F/6O8ny/2OTMeZ2cqq1fBSxYYUh2O0+i0bUErlPJi82Co6C5zclp9Qv+tHLMLah +MI2DzrVTTi9WlGVSk+kbd94bl9XTn39Pc4nHqeJLgclq+O4WL4ooa9/6TMXgKx5VsryjT89TjtHf +3bxOJIB2bF+XTPWTaJtUldVket3SoYfbYPSRi/Z8AyUU5PCRv9EmPoAKijwETkP1fzBp+fPjr9Ph +naQGNQh9gz+6tlJvCrzXFltnEKdixIhpMu9emMK2xUUD4uvapwU0xrVUW5kOVjJdMnVGJzuyuYgZ +EqNKpQhKcAqUyqaLLQYWv6/fOH9Wsdwy8xFja1IIZ+IPvoO2xGV4TvniYV0FeRIf0tXKSTNCQvBe +sdKftukszx/PFIIwawmsdLe9W2PC7Ov6sPWwIQ4MLLYDZQwOb2uVGHeTx2fBy7YBxTo0NV5s9wAx +q9X5zX2h6puLMpLyEbVCi661sAWjXi2GqKfKw1g+TnviYZn5uu/d5p1QDBSpQzLecyK99EqzHOAa +QcnumLv5yvTUkp5a8GYlnOb8Wlvbz2cEfkWhw34lqdAZ7SizCUWeHMvlies8AvanrXJhRISbxc+g +bCI9Bf63YhItqsFUYaic11yfBu//IFwjEV/x8vk2x6Nd1EdnWJNfwGaKiDkGvyRGkgT8Um2R28Yr +MAMu9+TR26x9akFyMpqXhDvrGC+IOfMErHdmpH+AOqZCjw6Gm5p98e9/MY3jr5o3TlKhcO8M+bE5 +MH5mYhquqzmOtGQNC06c6hJSAQxzziwxfYyi5UxWGcmxTGU3nkUdTpazYp2OOp7ultjFT/Wms33A +xr3uDKXpSJpmM4aoqzKWyhR77WjxjFkfwSvF23pLlP+t476G2If2KA6ZTZCCqMfZUJIqrlAqISDW +rphi5HZzI0zHEXM8OgTMOxrkMyk3LznXFhfouT9A1gGHiR2u8YcrhQtXAB5yQX9ygZHadcHjeB7f +eVXq0cIlAGb3wTTgK0uZ7wdpPA5mroQPetFCqhTizZv+glvliUq6zNlsY2xv0N9EdUXJnBZNrTuw +DpvYgfffZRnhJbws3t0tutNDvMIdb+5gFbgXvKWAx1xRYEvrvwMmz2A/xaWMvCm8BQSl2lakyXuf +34je+Tb4qC6M7aV/MSOb/mTulIK4iW21nrnRqFzUnz8ZuPrcTk/Rnj86+9TVQSto8HijnchOALg2 +vbDhEmvk6j6AxifQEv5tHh3qpKbSPqhDpookIF3pkiBPqg6Wuthh5K+SdhbVOmwwSdNmRbPFF5s2 +omfXzZKC9c8IypjNg2flXTm1ufreEj0ZSZK9nA8Bg99mkhEb/itsO5HupLlWUfYz/vLLWVSV4l01 +ru+JK3B5MQmQypT4pPAAmIx+2eZxpIb80QR4M/8PvhIPJxTAhXSIv3y0+c2H3AyxyzQq0ufLPA5w +8kQF38TKKi4kvlfpyEE3ULygID/3nWU4UTsY7cRIs1j2KTIe6qiWRNzhurEyHcc5KMa72CGY+8cv +ESMQDBRlmm4DvcmgHKO540z0VjC09N/aQYV2/meuxrNu0HSX/Tn+q84W7/8+gFNZj1/DxroWwKbD +GJdVA6B5Rlz4cMDSjPIz2CgCHgq5w0ZODLJoxWCp5MPpvQ5mzER+htp8tEsJ03L60UgKXC8gFET+ +kAz+L2hh8AXgNHyZPlDkfubRLlZg2M7/CAqR2Oy8GvriIPWBdzdyvGCeLsc0ktdfKe+7gBjNS/9R +Zu1RkgBLPLd6LyT0KrowcedrVCLVPRCfLtUut11tpD3RXkWl9kxnE9jKk0O0TL9tUvyBOKMU+W2x +6OBg18iHw47niOYsFHCyL38evBXzv9T743Of+xZR9aQ70hfVzlcGVqFTNsey4KvvEsylYyzhWvAf +opU38FakTPw3f32rqsplnrrDj9EJSIHhRyPGDuv59phpK7b6WNMPzCAM3srScaJAkVqjdOZslI2m +qUNwuu5DFXG68+2xbyQ3bnxhTKWb/qTxcoxkq19gIJN6ovMD3kKtmDMF60x267xm810LujGgCN+W +kT4StKkhUMmXhMiUCIDgz3i4RCdBY2EasfS42huFuhiksfpHPMFkUE4eJqbqGJ9n90KXggDvyMZs +brHBFkZljIlQ+2fMS5t1F1QXGEhyNaNpN2E5ImgyhKKSI4MVZKrOdg1uup1vMxcqFOQ0Pgs0p4fZ +jqI005dCK+1HItYXXgdmDIl+2LKVYNbW3uZX4VohqcCd0nrdBEcIHUnud1tRzezNHU8nErOeyjvN +ek+6zq45lnqBexoofRERPqlBwnWwdyKSMVWDwxbhNlqaCOk2xZfCN27nMn4Z5J891A7kCeKIBA3c +nW2uznYzJplHx3LuliijqMzrC68uKAbUfIXx9cYNisWnIVQE9Ikf8siJMeF8h8m7/silsioyJvcP +1XkOv0FFdUz4U5FpbDV75iDALLdKHqWSMUM8UJn2uimCA6rlz0JCFY5OAlgtl1zv67wuGIeyWhrN +jzOZS36y7PrafQw+vTm+sM6qsc1R0R0ZHKyIpiiVKGBRpxXpbzaXWPdcOVzJYs4UyBqRObdBByQD +cEzPENcMp2liST/cxOEloIxLdss+kqfTeA9WE702jrA/tEhqKGX/KxuiZhZl/XfL0syOPveR0Nh0 +dzGPrDVRUpatmUG0D7SWJ/e5Nv4lbLlmolItoM9sC4oNI15ZE3SuKtax4l8XP8e8mwAvs0FeISep +t7JGr9hTUQvJC9sVPv8Up3/tjKPBQxUNuIt6mxtNvo5ggnCpAcB3o8ZHIWroHRo4UELSODV48qVe +eE4h08c+Q7jtNes8Z2pkC3uGW0fWonmI0CiJjOYnQ049fF8ecYRJa1OIYEEA+38jNuADbGX/0mz1 +XsGoAF9xwgT/NBarWz6WXJ4Og62+94cMQYcigaCnY4VyLULkg2mSPIFMLMLGkb0DzBe1ZDoCr6Rd +D4fE1QLbNGqFd/E/sNMOAntGXa9AqLzRrh2OsUA9LMC9wzItiAYIX/t+S/DXqAR6ANchAuRgxYMD +TZsYSU7Lvh7rtQXNKBBfrYngH4O3tqL/hqL6SdgvkrSBrY6Xy3qfzXL5K5vRjrYRvNByxP4MCq79 +aHbS96i8/3fFv2D7eFIyBwuHWUwpKbD5B0XZ59a3NkQlU5ph7JOBdUSC6tdLMQii/h1znoZYFTqW +Qe/20qSBPGqZbtehy0wABobk75+0Lw58TqdLDn+51NMu9pbXa+Cn5kTuiZtNvWS+B/tIWmenNEgy +J/DRtTyHHalWW4zFgsK+h/lapCHWEiZG/yZaETBR/Yy1DBqhO7GOSMnnp7ydlCG1bVBOzMHHMOC9 +h0j/D+gRgFG9ASzLgU/gsxNQt0Okc90qM8kLQGEnS6HgZAXkgPQp/aZIS5PxdlB5r1Fno/VBc6ME +Zmruaa7UcU1uGoAG6v1yat4nzHmG5eJeK8VUa9AJudRHEin6/CBdJtUFqVDOpYBhPa4xNnRGCC+N +qzHGpuJJsLE+7hodRQJOU1Bce01sepOdUvvaWDSO/y6BYuYrlr/CktXPaLCIYN9itIAvVysDbDnP +cX913igYq2OFu5UjSQWhxa8OIU4xNHwp/571U/WGjJ1/Kl7npIzaGLO0asDeUmGdUknQxcKQ9WzC +0GtGhvPluzGmEJP5tAga+wXDk5qctyRUNxM+/u/OPRKRrOlY/KHFQ5di2Mxfe3BqMcjHRXFTaTGs +gw+OnHqpUnf0u5tp4f7UkA0lnowbMggxKhD0Ny28QSU1JqXU6q0du+ZvnWqU216wio3o8KnwIzjc +pXbaEvgW27o/SOmbS8ecT1ov01iKCY3C0a48uAf6vHwH/vu4HZCeFtbYhirw5by0S7UwbvJ8Mgxg +n09JVu9Fbx7FJRGqWhh/Z6Q10cRoF5ayCdwR2m/u6nm8tw3jIpFnyuksZmu6/pUSXkyQV3y1r/M9 +8yjKWFiJllOpS3Fb/Bpnl2lpvb6E8cUl2cnU8vBJu7e+X8XQbwwu5DGs/sX4pC0Z8WTU2y8gLliE +3QUJORL7wCm2/9iiCt1AySWbmkSB3wdbkCxuRBWjUpdQVWS0dzW5iy2AVGH4Y+5pdlt6pZQBNCE1 +nWnEHyN4vZxaQ0GCgAwxT0mDG6MpqLuspG/6K2dyvSJdfWziVTwQ2pYiLTj0K3RVLWzXxuFDrf2G +wTyUdK27oe93jmtz2lZHdiyJJEk2nw3PY3zwIGKz0evzLQpd6hDmFXnSp4sZJyHG72hm9Cb3/cqJ +CmuooFHk1qtQRyhj528vM/hirj9UbUBX8eTJUiacjay0JVqQsNI5XCcgTPoZXrG5EOXjbLzaM4Cl +bVKzjLiJEYnyn+GxeHZhMCIHvQou/5acDucg3OfOWiQ76EDBEPe3b308/Q7V2VzmLx6xeQCEJJQ+ +VPS2k1pOTt/J7cumAOiDryxYaJSpQU5OFoh6b1AzDL5HV9/MTatsaK5/ZxQMtjZeRrI9kmBYwW5n +C6R2uJa5HuGRUghNCe+Q1MsAxtfFW/MPwywYIOrZ4MsHaLirCsCt1l1EUOF4H+NFRCS4C3exVs4N +MEsQMc7hfTAYlPEvhuhyM6tPnG66qqCq1/sYQpS6ZnaXGZU1VCWuGXfPRTz7urBMA1zRa+wwd7cn +dB63/nMENBFQsXfGOjLb6++/P9rL+BF//g70fFDCdy2YXbMhWPY14bMxdHft1Vp2bD5YJUEK75hY +u1PsoPLaEF3fgZGRuDoDL+l4ALIXyk7O4MdyYa5uqfWblEIdPUUobv6oo8h6rnDhDnCgiKg8qfKV +o717diLVULngX8YdDIll9gXp+/7xoJNYnNFsTKV5SnQIwhmxyhqEF3jAIMIJcVukOzfBH55U1k6/ +0wZ+KqNDPwFF1QYHGpcLZzI0/oxqnusOVBQ8BUQ/X5XdCi6nLwLxd2PJrylG2rwtI+1Pv1dxJSNZ +KwEw/6iSRLrGdbdrJGigOoC7p3dO/Pu/fMZb1Bo6gVpK7zJvY/yci9Bq9SfCUUvVOst1+lA6Wy5o ++ltzPtMjVOGaW3Iei8Y5wwKqqxcnMTobDizlQmMxUxCI2GrCwxsewUCI94meaTXzdm9YTd2R661R +pic+eEj+GIXYwb7HEaPY0EOtIApYNIbATnQjILWDsQAQGfThD5NWM8wFsxJa7fMvFvGG04LMAToi +zMyJB4TeFNoEDdoGKtWvKk+xbW8XxHVkhKa+MbkLpNtX6y1LCZgLvFVmLZq6gxjA8Uz0iWlKbnhU +xYAROH+BiXj1X3x3LcySO3keZE5/XrPviLRDzV112LWf+/d6Aatpn/5vkWq9Bt2r+LIcgA5jZjIy +ZLAP0Y+UaHFy+btv9KOeS7xhpux12WDIEjJNvHQ8LGDlTZqcAONTlcAhMi3IXF6ik2V6XQD1gXFA +XcFpbVzF2uYqnSHB3VpJPRZu1RZJmeiV2LCwPGNwe0bPsIeCXFf9PjMkchDEtNWsrVXRZ3yY25x9 +feXgDTuYqtHLcwnuZvM35XcuKO5J8cJjX/37bCR5HVdPMKuZUZtDzFSLOSFp28PSZRAbGN4XdSDG +9/jfErcZlZoSLIQITyvUiHv+4xT5HJjStQnwk5/OWNX/5AFzimJK/uxdnaSzJGAWig5OX0ZdAMZd +bZO3v5B+ZyyV6YbvlFmImK8S//Id9OD7zFhQ42LAilqLo7eiYUELccbfg7bI+66uRlZwEUKTUkXG +iuDh11i/Z8lNiY9039uwLezIomT4tfT+SnN09ptC5DG4xB2z/OZnj/FyuXlWyqJ3qSZWkk9gz61N +rkdxge6i5EgbKcX1/utO1vym6u54P8wqrqU7NgzNGtX4Ev1YbCqepytf/dsl9Jhq+iR9hfEK+JPi +f9qQNpHcbDejiX43hL2damNiPC3UlsfwlHKWFdmjL5+F6Lzzgyub94mZwNRnEAruJCYSE2hF9bZw +hi6zFwNIviHtIr1xru/TbTl8uYGRgjYpOujeb02jv18q/w8RmC0x5AM+Tgkva//XIkQydeEEjcH0 +Q76K7KVMaK5zp1KECUGPjcuqsbY87qdrs9C877jlPT+shY8IIh4jbMqckaUtCba1RQK5z6WKJdST +J/xaq5qrAmr4C3M7D82niTjjyoGFHN51YkfwlTmKvw4tbuy/O6x2XXbRN0IDD8gxUOkLPtLbEZES +Sg5GyJuhMcMp4tnk+RRpepF3XHMsvDERKKtiXdql9eN08J2dmPtm6gamB7Gjt/R7eaRNHeJ/0rCG +Pvwg2I6fu1QLObDGvVrCgLrBEDOb2R9Gi0U95pAHDPuOF/Ntgp+6oi5qDYx8X75s9Dhq5+E8O9yn +sDlks2+mGzfAl6gde0UtRoryhypkECIKvvX+C1muUwxQRyqcWb9qnnM1c2nyE0xnHEzA38d6gph1 +k/AuUGCBk8Qzw2+vxcOTFUZc6qya34SoDhTehC2y3+ExwB4ZWrZYV2knl5JKb37l9dnrZmXyKFu9 +se19Jt9iY+hhuOnN0wP7Y8ohuYCM0xfPHcDFat8wSi3BmslZJv+9AnlB4/U0q3/EsMrzvrZscrEY +v7EM7LSwR6Q/zJ3/IDgNwcMTVzAyd9BAmjuPjn6npBxL/dUywXpDHP6kZ9iX2N4DJVhmfG8Tpmhb +3AuXN+Yz1a05F2pziDTlLnQDwRaIjOlSoz0qpdHTU+pq85L7xMrKE8C2jUsA0yPVZZoHbcrtYqvL +QJhdxZh4+I6LiCsx+tXEdlgH8z2vvCEcOVOEnItk1EsG1Myq2oCMx3I+6R+h7o73mL/lxc1G7heG +9zMwnNmiguA30ePCIopSQ9rNPyJiyDj27T/qAE/dm01EiWcXdk6HFggPzt6FRYLJ0Dulwt9q2bW6 +E02e7qIAGt4r79vDwqxp9zQnuP1uPMNOoqqSSMmjn++qsSCp/60A8HTx+26hfJDOiukwRfmEjtPK +KKWIqLjIcGvxlFeqdzKbu6IYA0Z4BLLDvCXK/5fXJISiHq79Ye2zIGc8sQ7mLKSpur97FpAsSU/o +geFljujDSyITfElw0NEAKNFtWRiSS3E+y/IzXCRKovNHkxIQnLjV73c3JKmDRy3x7+CS/686hBuH +Pt7kXxvx2gXVUgo8kG90kGnMlfbF14NBlsfgywHx+hVokO0aW/cdF+8/LNWM3D4sJc1RXRSC2WGb +DMCWxlXnh7gw5YnaJDfODG8ru+Xpv/ssnbd7UTrxu3Tq8qLb9+MGp0hiGksn6gcTECBCbEDv7uhd +wRZO/w+15Sa0k7guG/GsfsGxUq06gzs2iMAzfi9/DSdRH2kISvL7nZbWMoCrDxTX3tZjUQfj+WTb +QQkU1t2NKpMRKtECF7vNUxJIezoznTDRX7u2l3bCoh0jK8Cchad4FnmTqGTYe0OMBnS18RkyvTT8 +PX+KCfz49Z5DeW72oZp+P3CsRr4Gz9iMTKylbCDfzIx6DFQy/bQPvC6ykhygRrxjzIntAQfqUdTE +AxIgjAl4OrqaTIYiAHLqHg3GBszm0CrQaLlPWSs1Gb+CSxrW0akA6L0GtupfzgngW0YKfZl+T7z0 +SgAmRbZtW8UjmxvSOUSp9b/U5r3F2igjNfod/gBrBt2P0cK5MvXzg0d1qg8oviPAAWG1ZuHVgKM4 +Wm2fzamaUYZZCZNSJKWJ64CilGij2ONGl5xztHvzDe2lChwBxK4sX+em1Ki5epdNU8pYcpi3eB5J +WVp8jO4VtYNO4i2fdPpugzV8qhqv8IqLIaWe081zbo6zBQ+LLl/56h0vkT5RhwEkV43yZDWEJECS +bmVe+5XO5Wu5fjS6BWBJzd81cXOxU5vkE1Cc3sIaQ94MAsB01oQli/R0YzHz21XqnWkfCvQfPPC+ +DixvWlmXb/e15Imw9auidNwT+YF27v6iG8PbvBKsQBlKO17Trf4FEs6xAdeA0qu798eptDgKASNa +CzswyerNANbs9Hoky5RSGZZymSent0qB4HHYK9VozAgx3mXdlx0XOuhfjtvMzpOKV7FHJ7I7Nlrc +FsZExh4f61ubB9a3o0DUPDKlcjKH5ORbXx0v+sqdHXhKdRjoSiqcNbhJLHrXxccXg3wes6msexdE +s/MsC4fhWSJcu7HcSDIXl9X0dfg+wxUvCL3SwVsf+7cqUIYiDTuzO0f8bQbKURCAv+kUkYT2vadA +zcZDgGD1/WcqSUefHZ3J1B9F09UFFFkXGF1RMgL8AyrgPRhB1UJXf8a7hYuHt6LwcLA/Z+71imP4 +FdzrtTABwQ6DbCeogbpKxT6C6UmaPPtHKy+KikAEdhiYZAxBKmY/b4PyAuDt5ODF+rsWf7mHga8E +2dEF3auyYOcpRfKNvuLi194EAi38UNHTXb6KPu1i6SIDzlLwc4nrAMf5ZBw+JRklPVnJp8dXq3QV +RmYqmbXFTmzhTw6h4fJD/XKCNitf0IxvL0ntyfPhOz1yy626ARDqPmvwof8eiunhc893GppabpLR +u7zIfAceEm663b83Ap37unWdq3gdJNFcF6LCVyvGu6/4XKqlE9sX4HZqyQMKQ6MQpHRXBP4JKjpz +QmLsj0kkoSeNJS7rlmWaAntPCynl7t9D1AvysUrJtfsNptPSJRI7HbbI8gGIfo2tQhVfSnubd/+Z +Uzo6CeAz7Y+WLDl07o7LcTCQ7ohHQTlEXEWCpJjNVhACavTbmOVmtECAdT80NFZycQlbCUPCK+2o +luzeuKh0PbGh+g74izTcb/tjOfQoQSTxNGJ/cNmhhU9D2kmUwLS9dwi3feBTY0izijCMwKn7uDNa +Mnit7HmYkM9+2j0+heCSwLd5h2pqB76LL3h/qpm0bNrxaRZtmDQN5jfa9aTkHZ4ey3QhrvXHeS06 ++k42z83+8erxE0ybjz7+eyKEBaGJ6bejZBy5rYPINF8VtDSq7AZhCkfQ/d6ncJyYn5K7NysGIANj +Wfv+zikLI4gEZeqUZTO0f3W5NN9/hp+lqxMMWkdpU5If0yv8WI6mJzLTdeAovhptqMCCOVg9GWd1 +e9m0IQI70qqperrCwxs5L/Fe2CU9XaDjmjJD4RVcRhptnQ1oMYeuBjdY7J8cSvDO5cM2NCgigepq +YnLJCLkH89BA7O6AAIHQUk4eewBsJ2BivkP/b9EPi4o6wX8BEpOPXo6Hb+jxgHFrGpkwoLuZx2sp +cx+1no2A9llvPG+5UF7IyLdTqKIuy5w+t0qBJJJGoioA9T6Bg5IGnC+Y07M0dySgbZBhF27JZu7/ +XgvdYCks8A4K+nzb/FqM7lV66NDX7fI188pirEeXHQSfDD5r7UQC+CgF76o1V4ZeYYD2scKs//Bs +pVq5JzrdIahIaWpQv2CKG1OMmoxqwEh+IXE+1NNyGa2rc7DSCf0h3IzYk9uwZwm+TLGCEz/KfHwJ +ZP2I8+VjLi2gL++KMRVujmquSkxmPR7B0ECuwiAB871hoWO+I9VptQXiWonVXHlVAN7E//2kqhUP +wtD59cGyQttfrFAiKTm6OHJojAJ/Un/aw6J5xsClrccBPrsyT/vzpsaEXAvFWjG6HRSHbBkkJxOy +561I8pnNg+ZpxXcWa2uevfis/HkX9UX0QMT1lkPubPPcpY7cKURppcov1h/OD+r2vpsWks42CU0s +TEV7Xq1vEOerF9HvpN9dd90z2GXvBxzXZRF7M2gEZs7vHM6Y5WE5wPCDhuNhWGMu7u7aLm845mpW +5sbHxyjVlgqcb5gnSKTbFaxsWh2OnovmYpCbS+LOl/yWuBaDb5Bv6Yduc2anc8v4+Wsjg1GtBImg +pW0MPOluWvdh0tFdLTVLoLsc7BoLU/dYWfXPz9ZAtfwZqU/XT02qIMehnhrwphDT4jmEkthSqvOR +DlDx+xEmYgK07MDNgrbYbZZdmm7GX1ln0VStbDsOFj1Nz+bU4KTxP/juWNNNkG9MTIW5AjT6xFPw +ufMJVo14bCkcq8t4JiVHoUswHyX6ekw1zs5nGnNVIff1Y91IPTuCEgJsw4QZJ0CgtbCwDZ5Y77+i +ECjdiAoqtKatZmehfieqI6kNZiPP/r1oFBJnKYOCwu8V8NRM1Zd7VrUMIc4A9dVNIoRjjNp1dvtO +ljZBJ41YcpXwxbAeBACxdhOqdGhE3DItER5EVX3RTn3+ZuCACmfObitE8C2jBGYJkjrkCka0YRre +C6L4uzMB1ejAU5fi8YMHOekkMVW0rUSPRWm+Z6ktdIKpebCU+wMNFsjZTjEwPEmmKmFtc/OlLu4x +hoXXW20CdlarkFKuXHKqTqu6BN8vGKew9Fn0IbARZUYk//g61hLLYq8SyCbQ7KcLp8g6UWZNqOb0 +ycr1DbyTbGPTJj4TxjjQy2BeaA900Qqv0NOZ+5awXUtBhvqL6M3m0aTBEyc3bjDqj/aWax7s1peU +0PBoIlXUi7hvNv0vLDpam9Idxrgg70Cc/2UNRJCZen7oUHgR0OU2SlLiuQU4dkF7zTwpn+/VSCzI +DXHS5NSG9KLPevGUCcKOS67E7hsQZLyhhsqx8hxfAyw/hmuhbVH4jYX7pv8VZxiDReq/trvT2ii4 +3ZnGtbZpyHCIBtjvagWWLutosvUcQ3JC2liw0yy59ag+2nPkcfydxYXknLdKuedBe0NhEc0F1Z7K +n6mnypHKedgqX9EHtA8ezHuTwtRE+8TQ8KxTYywt5SHh3G520StchyyfKsP9qsdSeRHjUxyTw1T7 +taSvVqskqGUU5+/5/MaQDCnrh1T5VP3bkbii30lZng0UPuMTm8vXOE0bQGXtqHl/ROVvwkvc8cdu +1Hv1myBNlWu8yiQhpbZcPaGPjCO9SODN+WuKIi+6jF4PSKFUFl4Jr78YrTDUSLSD7Dze9jxDZ71w +IficuFaN13UG6VhuhPXyl7wfL0OsHCTRokhuUVikBxB9Soc6bY1pm731GGZdD8/QhOezElU/BbX4 +EV6832PmwEwC9o482tGIAzA/ZnamkpbcgIdW3tDKimvVbkcCjLbg27J2f4c18SqQNBF7VztWnnyX +lCaBzOfcxCQivqnwhjN1YDqEm8ucrWtIgMkZe9ZTD+IiGf/Cf8gYowoDSi2s2bwR/0XhnyNDBx9p +W8WEWJReCQCb3YIELAC7dB+usjQihNaY2J2CqpfoAJb8bhMojhwyzxi+AFW7RiiXdND2/7HMjHTI +Z3OGy43Vy3myywyxO5BLj9VYbrwRaG1i0slGl4KOhGD7e2JwvDGdJSDiK6tVN2snYUZfImRTT7ya +IM1bVCZGqsqJinSVCDHm2syCEY0pFrSqf2goQNAlKKbjiGLoYX67Z5gcMaH6ignD5LXE3m5VjlkZ +I3LcJsgYZCPNM+NYXQnod5T/wku1bbOYRUxNGXFCNNaglVOvAOA3QK4aDZhx0DZzbQ91mUUHAhFa +CxC5HnC+gJ7Mpsn2VNmLfURijVJJFxACR0tOPg8zuQ9z+AwKZwaigBISB6bCfIt9+mnP+L3iAYSF +jX8gT9q9HEDamOjtkbDBZ94V4XuV71reNn78rYdFoh5nNZSSHEt1wQSluivWMG6Yjlmv5/UeLZZW +F1ZB0c0QolcQGqCNLsREk3QJR1wOa+ySwosdd/nddpYBNu19yEHFCZnPUAuR81HFJ2eXlggHaLEt +WqOGdVEjdYww3iX0d7p7CkfjXa5YhbThMO3a14nMA22pihKveAvl2OpPvwfRuIGusnFIHcYk/ZyR +TrORb95Nh3V/PZVefzsbGt20ThaOiNX2ENi3ZvPlKN8322ZwfRHTVCBv+Wen4/xHwBd8pFHa9YDw +325rhQyN/q/ABh4UcpjXKNamZD7Bup7CnSwOCWWyU8uuCcF3UUDSO82yU5tA4dPkVUL/6WDd34EH +PJu4VsWutv6VJkiL1DJ5ISY/SXmecCRFCUd7QGgGd47Sjl7+Cpqz73tdLsj5Y4qnx4U3Do3aPnrY +nIYwZP8Ef8lrN27qhSn7rdr6b+jW7Oi7IUGviTLwrZwFvyZosU3LyBwJW4JTIYp2YDTNP40EF2xA +41peVJJo3rRMjTYSWl+BV7CJ7SbA6Ga/twErr5Mgz4dyKoa0BQfVDktwnRMAvWEoLxYRBgFtvy6R +qRUSAMvySpDwMx1mOkXagjgHAqpuiQUfZR7gTx6+LSd1uZVJG4IHIWZQXGU2gajzM2HT/0VCJJXO +toicvBHpaeOeagoPAT6qqpUsaq7QPRFjaywEMSus2B2ShDTL+O0tbnJNhftYF0fVeNpT7JFKfOXw +9YTX5k9/sDVA6jNYZxcCg1FObZWCsW/yu+U1NBBjTy8wWRw+otejkaVz9hvW/l3zsUtlR//eNMQX +HckeeMirV9SVxsl7XtcayRp//hXSLCRO4VKC3NNkpUTrWoaqQ92wpSYhZwSue5t8l4EuQ6j+53bv +EnQSWtsKPqiVHyEiwFGVdSPFBWnWUsJvBhKMu0wBXNio8KU6dK3eMs1ec61Fc8d5ss3arr3zl9d6 +UV8SGJ3hwZOFafMGeBUv/yZNKzSUa+l57DZXGaMCqQzzfUtMsIWYefOU2PP1qv0jvuLmg9vR8Uvw +NDycEMbtHRL9T+6H0yCdBweuBMwr3FPPVZVImNq3qW09t8KT8jq3/vkyGvE3XSkGeMP2lUsY8r5z +UyBc8z4mpbmISuEkx6Fb5OzK9mA6Vh/j+0/7sqgfatn0GtTggTLiSQTHyr4iSoY86bzQJzLBqSnb +VGMV+mzsJrMy+jrvujP6bmI/5R6A4eaeTmGz7qb+wvcnAaghM2cVLSiPq6cEdl8FIugD4NtOT/6D +ZBjeU1kngx3fksoYU/pJvDPh8dUnjfbeofFOFp4vA7PQbXcFW0ItLm42m5Io459BCDMor1YAHL5X +tzTUhTpH5pZcR7+HRKBjSDk6FnRVAI1vy09SOiYVgIvMHIsbl/sY0RVa7ux2EEc03pVXiCrQFZ3z +iFba5rpe1qfon+2RsNnQr81WC0obR0LfmeqN9xwyDKS2MSuKK8/rGwPLIZ54dEVNTRwPDvBdpANN +GKNGVGjjuHsgA1rANp0Y5nksA2VEmMsajIzPRET4ACX2YSl8rUMMZ5zQiRv/XG1whknI87TyfJwg +/RrxZEfHVVaYyYcMoCfMUG1gHtS676TwN2qxeMgPZ4YpKMY6mvCVujzwhZaiyqGvwoZUqk78WXnf +iLIscM7cn00VX31LV2tjzozYPJ6UQnNwYH3+huwuEbZZY9CPR687xr+QiknmajLtFwkviZjqzRLl +/HD4vmk4dBzeTAEtYKPdjolCYqPmrv73j4a/Ue/ARHi0o6Ad7XN9Ukxqp1xY4N6Fsiz+Ffee3ODx +mM3vX0Qp7+L3EBBQU0SGNQXM6k5Fx/90jP/zOZVYes44bBzWketEHI1yC74RWJvh7UIDUy1ZbFP8 +U13ymWdD0s9VGX0Gl/2fKpGJAuUML2+HZizlrxjGEUgoZnqUdh5JaYdQ41uI8PyVAmNQhhYlorH5 +3QFOTQIgiaqtoW/aYyG1wBGWVde/Wdp+oDy4PNOGxRhIBKqSvawJYcIZaYncybbqlNOPMwFTed+p +HbGfBsO8SDCqwSTZCcJBBxQNLIdsVh75LPD/aLZBDMqWY/EvFp/g4ALl41pJL9wRODcUDQSiRu0B +vlX7klicSG/gqI8IKokhwSoh+hbktbDQ2bvZXdLvjH8acRQoaCRwLNP4YpSTZGF/9pkhuNZ/WydO +bmc6OORv5PT0KKTlTTgkEml47r2OPOAwIiyAaQSf43w1KqFWPywxKI0NSjS/B/0jtgzIawgJHY5L +TfFbTPhufozSPxF1g+lIV/p0LvvivHHD6JIX4KNfR/0PdyCPi2AOyE5T7ksScJqE1RwG4Eu5/g8m +P+JJcGdMDerO7/2G1jOX3Oy78BvjSduVGZl1duycyPDxaw7GLru5gIaje1tpiatQxWnjmzh3/lbS +3nF5alYISMFJoU7uxx5ftaXOoBHYwM7i/dIUuOfu3SJ6w/KSmXOAlPlfoYyp+kqrY93fk3VFfC1y +pd0tnWrWAXiK+FTiAUxGcQk31NR3/vmu44zWdvcGXTSbz1gigB8sgO90T9anUiRywcoXRganZ2Hw +23xuZHEgs2SPl+Ecne0MYQhM3lI1x1l9Nl1mjYv/dJx1eJYDKm79IJbS/BYV8OhToke/exoMnDfX +p7uKz0bfubDR4VSZIZT7vMeMlICtAnQsJqbU1j4LED/Aok3vpwGCUW1GxDFcA/E07P5Dj17GuYoJ +2zeJJKLlLC83YQ7eO+Ci38wpE8CP82xR5j1esbbD0vRoYGBMq+bv/tgst2Nxw+WMQfQKYOyifGWO +B55YPiMrc5u/rYgBaYzgINokycro4pPZhPN5gYB4TlTaFQHS9et8BJmi1//sY5FGJWuLxIvUPb5L +7ip0DNzI/q16q4Zd+gOHDyALTv0Hk1KSR4vVD8tN+s46UE4L87+PpjpuzGbdXt/uZXVzeJB/C2V7 +X8sepS4RrMoRvRmCPVf6ZrtyLbLRm+p6nZpHoXNfJQuA8HX5JqVqxNiZ2j79XhC8YmNCgMy5b0pz +ZEKd8IIOlwWehDZK7rl3h1jxmyPBjKjtFNzP3qtwlB63P+ivML5TLfiYpJOAsvbchkK3PIDSsBT2 +neS6JhjTGWYk5i9t2NAtI3dydkZZIou7F1rHXD6aB8PNi/qSnWLbSfDrzAL7uejz3Dz3J7EBmQM6 +oksJy0RKLYfw41Og8HNW5ryyg4aKOh8zhSbRAYuql83LYf5LNH256IFmH3QZzK99ywY5kzUjNwfI +6j+xJwW9nOEMqoecDsH7r91Ino5qeQMR2uasyxCPzdGPh9sjw1txcAnNdVA5Fhvuj79mbugyCL7Q ++6l1L9ei4ym6ui70w2ytjc0PDBBeH5xrMSNm7uP/G0CqQrNzj1jrV7XDOqtWsERwEnzTBTeLRhiG +YkDaHFX3r734lI4qrbyeL3mwVFSpZ6Tjh33yO5QXfNt5jLGMS0mhicDhiCnobqxW5OLB6kg+845C +3+0QtQe0MAKwkZH2OgQUf0utGQ/hKyqrL6nbzqojIsbkw7gnfnldaaGbmCzqhgSVs7biGGkNuIfj +mxUNtWiii/d6kOxI/EkwbREzv5fCVKhz1TJwBjhbsSD/VATgSvCJbXf8yN+IMu/N2IvcIyrxnqlQ +mkCicESWM5ZN56Z7Yfbv4cY3AdXDjA5rIFrmOnELOuqc9AGW15kafhlVvzO+tRVelHEBvRwUTay+ +GMgVyt8dZUQtz9A0oRVxfqPHeJsJ7t1G2jtmNsszUDF97rfKYmjlO1lPdOXndyU5XZO1cAElXc9O +r0xY65WYlROjWgaHIT3P7mzv4bjh6fqKNrluD1nS1Yz7pwLhyZub9J/TxQckTwyjdaeoDlo6U7Ib +7ms765uq3AsUHleu1e9LzAlHOM57z6p73FCuOLDeSRErGW5WP9xuBxB3G5LlzoZLOnghOWELJNLB +CVVuxPAu1G1AH99xAt5JfAC8yM9inlRuD7Ftp+wKo4bcfXSmfilhuC26QLJniGP4ARWoM9eEDsxa +uy3iymErfrWGk6HStG7zQK+9W34nG55PlQAOAnkQWEtrm1jwM0KPxm+Hgc6L9khFdqc9UNZgqp1r +rr5Cf2r8UWYdn1Gz/IQO/386mE4eN6ddmhU3IFTxsO24mvoRvDOk0wYgJIBKLUns9+bPbTyAtCnh +wekIBxxhF3IVdqTMA37FzhAPLk0CPrRwC03qbKprQ4K23xEmlWttpWLMzyEg961aKHPW9NecDOi/ +zN2Rv1BwQhPKGu07AtQFKkV9/yskFaUPmFcfEA7HJ0th+SGTQa1QRXq6ixDGN45Vkjpj1ol1xwuc +FeW2lIffoGBPCXSHVktWzkoqjzduCY8zkNREAj2ZG5iviQV+M7CihI7S4be2XBQWpOMgjjW6UDbu +MIKTnH4uIy2N9rxdV3wmGbXTFXzbc0Dq2/itXQPQZhditonNFGs6Or80QGnxk+ryr9Px27f3gbqG ++TtiHDFAnN47BD3Ys9uy10WouzAGEeKZW7nr1v+MllqJWK+bCcaETUxL7SqZmDBrGLPwNxHQyU1X +FcLmPoPMK3J3vLTyLFmymGwUSxVvejkKXsHQfdLmE42jS83yWhE161XpnfZOzRF+Lw62VcDOavWU +T9SO1TcUOrkO4QC8PKzgOVQijgFpMTWS1pln6TKz9uHIW0cz/9coa4wr4F0lnhZ7xteMLbrjK6S2 +ESjWoKGvDAV11RE9P9ieD/8mEN8PgrXps3MXbQKUD8iAOrn5g7aXvFqq3hh8oxdwIVd6LZSgCt12 +Y3K8EaPaXYOn8pz3MhZj2Qk5XLiPdt3oPCRthv6PvXqjejh4uJtB/qCm9dA6AB+Tr6vjdP24Y63o +4L5LaYH/Cu3uwKWwPmDEvD0APQHIEU5DeocNnazD6MKlty38RX9lZ7BOaAkFq1ikip2Ynw+mZSSe +W6lzX8gAlIqyZEcgEoCDpNogTGnBI6kVTP8QRQyS1KEmLfieLaRTQkCqORaUAh1tIhUGCLaFANNr +CrcpTisaSaR8VjiJjr5cfVBkPbsRWi952muJ1KAtgfiOpM0pAIVGAVcBSBn8ySu2o+MKa5Q2NAst +3O3ViZuO+rkuu9uYGbhCb+Hj01tkPUkCKJQrWKjLJbeJnFudpX0AjZJsFBIKoYEC3cnE31JNCRpX +VNaIRNDBZyLSCPWqSMVA2wdUCnk5DKePkBso0XjXgHchPqGmrS8/zezDoiyUYbeD7it/848H2eEk +wBmYDpivv5k0Ky7Q3o43NUdaVq6LbiAX2I5s7xvqrbpFKx2Tcm9I/ZbIDidrjfS6/l9yfoK3fDy3 +RZctN804dB/wzhlzN+k2T9/nLqGOAzRgOV4fsiLFb+XsL8Q8jWYW9xGIVQcOC3vgtKnMAK0jv7A1 +ORDzCpNMebLCKUqonXeFSADpyNVKKFRZFpRLUqcgXuJxDJsnN8c2VBdcNGb85eoBrGJSV7GMWGUf +D8DRp/20bZusaMTw9E89up/dT6vPraHh9Q/mhb2wHBSOSZEgNsJm3FgFdGE6x9FTLrUGg66Kty0w +8+g4KPj5zfWCdLB7gENvQZJlkansGPfzyt9rwzZhbICl5sJNJLyYurtDw9XqlKeywXzvrKXQsUHA +3s2UFCAeud2wvFI6YnhOzJmgzcJd/34847wKYCnnM23RRFAx+PuwOBYTcRYfnDpDAhxWR25wq5na +BQsLxU+jIqCX6pKwKJY3WrDSOmV39lyds/2HDKqFDSawyHsQIxK5DM8b0y3tC7JBj/GcVgsVvHEP +OdaN4Y+R8it+CqIf8K6i10ji9XiX3N/CsYFDactqz7xf9JhdKL+kWg/56ZHo4drAnW/DobK1UIEJ +I2Gc19T8CgOGR2K3zMKVC11+98X4ycalE/M+hJkH8t4aAVoK2qmj+5xj3diyKoVkhBSBPrAtBbRX +DyieU+vL6T7WK9d5nWkyBtZAg6/CKOGcUfvu8MQ4boltiTT9qKcSN+XfdFT8Lk6mv1+b5eulieUb +24J1/NufZk5qfOLL/c/mKYfQr8qDlRsK9sO5yqIaXLHIg90r5E41GFsoE4ShllCtItKvXfqzMUTO +u688rQtzyaI/BkNC8/agBmpT85pdqZ2U+eKdMclOPRy8zoweyJEQj2iTSQooB3BNXXlU+XL2Pvr4 +8d4lz5vr2kY4pBArITBFaR6l3wrfNgpnFeR+PgzhbZhA9xtAqgxocJFjquAVz2clOMf3emCCDyuG +2lC+cPtbiWc4Uvu5etT6ljyiMelNalzXIQa8Z+fIPeMTPB6WyuvSAvo+NI8TckVoa+us1hZkKZrm +HR1ThtFPrWk/lB+fJTeyI74TBcovcBp3+UGdgyJnORU2TZewhQj0vJTyInkvRpz66NHd/GiJwmsI ++e0L+GkSuUFo6I6CfC3iyiq5y7JMc5L+jynZWiNgFb5m8ipjZrwCCoFM75x2G3Dx+arrRqMlhBV4 +D2Ade8fY06enqmi2ltEgMFCsPsFT8RUUrIOcn+eiDTrz0T99NzO/L5Qy+sOdgtFHZ7Ddlzyy7SwF +Rh46DqK+chArOLLmc7SGwlbWtimZdHmmMSmQahh8wRM9j7nLJPC0W1wyezjq5flwxOWykwQc6pB2 +USh9hGLWzdZI3S0bLiUBexx3y6bYF1+KpazMDI02mWEGypIwUvrXU5vkzs5EhvoTRq8hsbVnyYM9 +ymNJ3bk0KiiZpfKpKIJlnq+IovsVgTsWJ5WhyAt4mASaKclmm6/dCCncqHArI21BNFxllsxL09rx +O5bGEgFjKmo8amEpmITNKuTAVOYojlV5Jd9ddKdM6dQdMC8rPf6CIbwzvBnY3m0NdJFhh4pE4K/P +IgeANIs5SWFl/esJhhqfAWmGrw1+G6c1ffef9ypGCCLn4wikX/wJq17tnfDKwEXSPUlVTeVmnsFn +2tOhpAcoFGkWwL2tRhg0k9zitLo60FG/6mLiPqRa93EqfFte26DYXq0VUAOq5rlgA3srQG5c64xr +yhg27JGN6fmTMIOVYo4XR13lnyVz7HtsdkP5i8XWFpcMoRPpf/wF9wIhlGqMJ5vP0A8VvLB640mF +GVkMkUl+IfoAA+fZKCKIDgwlm/kC+DLRcNcyTyTWqxpNw7hz28ne0+stMKJd4mI1OTndmGaFm4LF +e+TFr/mkGVnNkZ4VXHP6D8dzfKx/D9+vK7t4JU43F0O+r/S5hcNEfrT7md95QdegS50nhzzY5XVb +LBcAaVJ22775AuPRHlimRF+h7OWid9Dh5GSDTfRExGWXwLpJT0BTmHjwNTrcuQcKq8lCyAsreT1z +YPYftQEAVRVPshtJhd1fjJVEQ44sEH97zgbcfaA9YL0NNCLCAXYEtNGegSYkPSTLyIND4uENyogk +pucuyv8F6l4pxVjg4RPtPVLC/gYw6d5my83FoaANjE92cchnzUQfHqSbX62UwP2YgOHHAM6XpRUV +hq4jtC9phj6xIPzO6TCCpML1O4vF6gVBymiC4b6wgXSIuaaWoDhd/tGav2pZ1N+SH/EFYlZYXFwc +HWLevOAQHPEY7a5yeIjgoVewYi132KmlXCk8k4WJjYdhg/dTypCTdvxbBzx05ZD9Q21uQtu9Kxr1 +EEguJVgRuvQSY/7lw0rrW/ZO/4CylOTpCkikYJD2aNWTCXJ+QW+FVNxKRVl8mYrpyhJ/+f9AZ5O9 +O3HEwoeIDy2XmDy9fMScpHdQAnLtEvAZmPrAetxiDlfM1M/OaPvMiwi/md8n1Tuc4TFqWlqrAUP5 +Wh2+BjlNTBqfx2oHTWfbmVuUdxc1+WNs/ftBOGztggmbRAlTdaYZnVizPzVgsgZht5KbBZQoof3z +R+bNcEoq/SnxljEMmLgpCepCNuyqej0fITrLg5gW4Rgk8i86DCWjlQkmm+ECkPH+oHLh9Nmg6kgU +JszeHVMDoaV+Q2btWxJ0wd0NzcADdfMLi+SioIG5utSkmX/hLG0WkHsPW9+fZk4r0tOqQT4VJUjA +PY7XZH2bPKMWo1tjz0reAoL6oCrdeNa5uV+QRM7U2ZQi1CkMGWjFeGrFrjr5nQyrY5+TcEZCiVyh +WetueKzcYjLwQkj8MsVhfdoVQq6k5t1Cw2AKwJXxtKvz/xBWdYd5qRKzXbZC9OZogGzxIeycSHqx +gSS9Dg50BYo+VD4xkWRbVVkfXgxXjTBfBS0/mS9KsmQpCcLKivtx48vpzy22chTnQt/8c9uaIEYv +T7BXLr/yZqRyR0I1cEaBCX6B+w/z8lo33S5iXc5drHyUjuIRI9yj0RrsyUbKYKFrk4+zn5t8drp1 +hJg0TP3kYRBZn9B7QDyJ5sy/iZkXR9z5FwmpI9nW7hcRJd4UFBwAzQgDsFy8xKrppXOzqM4GFE6z +hu/WjnFJyCwPzLYGIVGe4aqhkAXesnw+RW9/xn2x1isuUQUoprxsr97ANagor4IJdRr2n3KvHd/Q +yT6rxwrBHXoecy/fSpPSIks0TgP9qPy/I0zHiMeB0XYwiEOiZm3ZPZrKTG0r3fnP10rDsBjzXHGT +4ocguaZTGp/6yuLZFujLnNmQ6GV3Pmzy1+PV4v14FMURdsbOKZMEfSMVQAkHoRz1hWdpojZkQ8GS +XytZk3YF8KvH6P5+zyVNf0muoe5kp+YEl5DE6RKhvjBWpwzhHCFJfmEEn9+yT77odRGiDGWqBMIc +yOKEFA5S8C5rmyXToCBw4vIB1nsA0hbfvHOCGi87dy9MJ5YVfgP7LSxjel8n6umlXmDRDNJrahKQ +QfkhWrSfkfGBPo2chKpktOHLwGfaslqGKCAXP2G0mtzeCA0pY+Wsj1LQWxY8AUqrLTXzhic6qU6l +G7XnQiM+rj4aaeN/5O16/5UtpE5vKocRz6iL9rxJxUQIebkkJrxs3F67EQwI7ZOFY5aBaovmzFtR +vnytwp35jNPBo1ZPELa/1JZjYAO1WlVgPEYUJEA+Cf2OEwXQt97VzIQDRwZil8LxMgX6BGZ5o4w3 +MwlAsuMssbn6ofVllWVj6KxVASb0YPfa7K+essJyLoPeLSgI8/Iznpjz1PI1I1FPATyr+6EVehbE +QWEqwl5oR0vdOEYzLjZtTBPYgTlTqayt0sbtFSVdHKq5y1o26KeByG/BN9LVELyBIleXtq8qRWQc +fdAsbQ7y1V9zaHQiODOSkMnXwybQd6cd5xlcXJpegI7dIpY9sez/wbzP18ZpO1Z4mQ6CQhXWXQJI +JfcF0C6Fgp48BhGwaxMtyrwy/ALJR5FI5MCnKAwtn34P+MQzUzCOxCm7JbD1f8nEgULiArN8XTD8 +OPwRNyGK883WHHh+AOH5GPcoCb5E+yXh5eRk9PCXhGtz0yTm2hE7oNtIZeOdENQDTzI4/FNch9/E +ZliogeQjWxX8yFl7CN9KSb3ubd91SeND7ym4klKgDY68YEiqR8fA8ZEVYF+AWugNGWI8VcbyZSYH +tmsjWelyZEjWd20S1R9qsv22BsHhin33gyoMHREfvbjd5p/DFWjQawIinfABDa8JQXYtc+Re2qx0 +UDT3X6uc0NEIq1fLjwYPY0sH2eeYtdCTC8FUrSIzrTEP0eeU36O2gHL/95kTOXD7zNteYeINVw2w +i4DzPdshU/mNF5t0QG39A/czWiJXTNskVh8CwDdc2/m+9SsmUa7R8OuftDccjsfyqCOJSjxflj4o +EIE9ZZsN4dqhZjGfy34TxmJwk7G/QBbTyoh27xilBI3gcv2ZNKd6WN5M6MFqZgIGtakfQ/NogiUF +ksn6MVhV8CoJGoj2WtgohiKSipF6azHpTpSELpsDDU/c8ciovNceMGiNdwmxXz2nw6DJFhM9vVI/ +NxlKVkfCyUkER2BTgSxSP053ZuMFOg4bb4QYsSgG/NUO9CQItrS1yHmBK3LKQZABSUgouTiEWhV9 +Xa7SLQ78TB3rYccvGeo5YnMGjaDSRsSsds2M28FTbsw77JQ4nq7TZc7WtDR7+xb5GHQm5G83oAh9 +9dL+L/TiwY4Aybl25ob99whlBieK0s7q0jflwgX5WCQpcvAxYr27xJc0amCmwg1amlmQF8WflZqj +MkFxj9Wtp1THPCBBciqlpGKiO+GxRMPDappcC+EM35gJa60PQOi2GoK/kJICb+O3KAnTP9qyk1BQ +RaRj9i468cZoGeMNR9fbas4Kzw12vCD80ES8LL0fjULlg/U/Ik8VhGisEsoyP862LXdhvzG4eyUf +dN4asOSO1nISISHlYh+w06/azrVxp/CDE5SMg5aoCI2M7RLVj07S5GLVkZuvvqbrmRMDqDT3AGyX +ePg7TG0wMjrV0drkFgwfBIkbMzETfX3flMBVZg5LOEeP956Tiw3dinucNq0q1px4lcnGm79p+ty/ ++tlHVXjjYMAoTGH4CHvkg+2ioX2LLIT5Ypvt8mu9swojgbcjPik5TaDOXfPSCCiHxHTteAMOOeFt ++ejbuYdBUU1wX7BB/yHZvfwf7aGygzjD4kXtAdnhPXUbjH/Kmho9mHxSUapO8QfQkiL4byyi6GHt +H0xBOTSlqw8hYDdixAEs+t5JwjbXiQgBKP30gglCkKjS0ifQY7lmDfBW1J+wXKUWs/vAkrNLVMrP +RoJi0F77TvzlxvrNqbXGBcErmpiNS47AWUGEozB4fW/Nndqp1BkYBB4r4UVzABXOZ/kcZQlew0xR +Zedr/UoM/aEx9k+y1yfrD79sSQAT13bEWHvPnaqCzpNHp/5o3KjsgyScdMNRB77DGyEs3C5+ESeA +FrjbDohJnGjiLcXvB2HR0cUTCzUDVkLFAB6s2dKaW7jAkr+Nmq60p75Sh8DFqXDaQOxvH5fZ3ZU/ +uaHEzasR4rYIIwJQFRJMjzav/2aMEowNOlbxT7kDtK70BvpykIlh6d6JjvD8WIGW55bvjW6+WEUD +pKCAJ2HYcTbYF8KaoftOSi9IE/1+pNlvlfAU6uOVwp8G8FvwuZQzLtxRxCtNiR9IkeCq+R3oLDpa +14xywu6hRHVrxY4RyKhV6RsrbWYr84Mt/GuyM7ffHEHg4ZUSLiz2k8ys/lIj+9+Kz8pqh5N4cmIo +zAObeS5XKMC32UstGeV1rDwX0+gVNrL4BvK0cJ9CdnLU1+ee1q6MlQ3rbTN6jcxWqvqvxbS5I20p +SDS3ZYxx95crD27T8thxDpX7Kzwp9PnA78onlktRUj3Utm6pdRHoLYcm0yUKV+xlhnAcSykbOSfE +sD7TBvZ/ZuW7KMk9vtViYedQHYkutJ6oJoI9mmJOyPSV1oYhwwEVDpYnG/MEpa2tTCxmmJD1Ww0U ++Q76R2f8d0wysXEkLwOhBnSEg6Ia5RFupe3srwu7EquC33u5xTTgrZojrx0ygVfPmZbQjmeNnmwA +Gx8EofuIvj8ZyzKN4xv8ogSU8UhnNzSdGvbdksXx6XAazIqS1RCAj2vEbEpdSke4arGlYZTUlSM+ +Uz7zMJ+C5UN0oOQ63MfmZFnCohpnww11ShGjkHVQzZtceA8ThnQM+loTEAjI/WS/6WEVSRapwfeR +qqdgBg7xdYaEmbRbCXpbqwmqp1pF3y/B0pYw/otbQ3VMwzCqnkJr2tkehgKlhcUzCyuxqgLlzt67 +MVl3Dmp4xg0OtJQ9sPTm212TfEo1isyJGWxsDP/qabpgWs3bKHg+pLF2C0HZ+n7N50qJpr0AsuUX +sHUuB3mlWCDllWwHkOXW/LmWikuvZmVvX5X4BtU1DesAYM8DghR+7ynBr1NORQle5zTIB3i1+SjE +vgWn5C1KI0Wxfo6ERAaT/D+5rOxqADocnq3Kc1KiB40I/kgYF1eED/PP9nWf9M+leP/j6R2Mq3rM +huao9CFwRUbORlBYu8IpvEZaM89Qhnv3JfjqIhkqx0RYfkpMQrdkOjhAv2wZkUY7E4go2ot8BGBH +ZWvYbOLHy4ZXoJk1khuqsPHXsrWq1C2I4r1m+swmQiaM3IeL4D4G8lK98cCo1+AquZ0u3R9YOebq +cVOpxWbr0rxCm5RhNlWto/M4FerrcPR9KMWfFx5m+8ShzmM00pfErM6xIVUw0BcIDtpSERbMZoRx +wLNUqJV1uLVuthyqbOEPa68qdXuVAVJawXjw1sCV9pc7hYZebiStp5HHxOet9eu0F2VbfsziQGtU +TWsqc8mQD4wW8hPMDMag0Ft8xNtNlld5fC9qDHU596pA1HmK1NaHleEp+H0Lfha3ctAVjeLmGV7B +D6toRRKSFMIofkg03epA7wfXD36eCuQzHYdksQMLpkdRK0+ftno8t4FwtGfPTGV7N/Mhn/uBF9wj +JW2048ht2MucgIKtZp0tYVRvgn+zJciafKqecbpPPnRuB+4EhOkFIreWxqXB8dcvvknmmjajeLYC +U356/p770vQcBl6BEB5oHP5N8s1vNIYNtc6Byh/bGGsedxLNG+qg02Tu8tquW/beiAlEsJu4QFgX +P5TiL78sS1p8ZfQM5zBmCaBrvTkRaMtXaiKysvDxm6PGN+qUfXXp30Q2brcxtH4N7pIbOS5Kcje0 +UUDNiON1asMqKFxcW3DM5dEJNdM8kYFo65kGpt/unj+NvliDD8WZ8GhFXUozgAXDE2q/4OIMj+XH +SALFCrpY8pkDzVZpBXdC/O/clpqP9175P8Rz6TVOlObo2lphsKvXPMbPXLcQqtxtY/U6ivgcn3oz +bRA+YVwYbU4nTV7dVHpN307qf9ScHBaxIiYC4oJs7eMsbm/t3vSpq/w7GiGuuUIox1d31VJNqkTB +HI6im4Fpt/WydRpbor31zj2YONq6GGd9wjFrLwlAXLnCBgs/iTq48z6oJj3idD6YO0pwvqr/5CZ0 +hH5M6S04u64t/nGHCdbb/Bf0uSyDIrU5+ZoOdF+rKcN3r44LSzXz0FB1BdIFqHeNFvDh+WtfCbQq +M7a+M0VvxDnKQCSDbjz5levFc7dWmd4vARL6osZQQKpFsExidn/PPmaBFfXd8HSTe2kalgOl1ZKB +ewLN/NbuoJ12eluviHq0eVuzRFssBHLQnhgALAIZNSQWsaciR9bI4yH3c5KxTkxXFMkZR/5zVEC3 +Y0BywL2nfLKGp152wL3cL3cSRl26kz/f7/xJWHGATqKtrO4YJBEaQ66QwJhYCWx+s3wzPxh174sJ +CMfsRJOPUkWE+TYQW8wNx/41scWwJ81CMzl6plFpDkGjyzMRbOn9UVEgXDzks8YGoU/oktVXVsXO +xkm6JpKmkrCu2wAV6A0ybzdkPrXPQbHd9rsGr8fPKVQUfgiEvlsg0TyOgulf5syPuxq4EWwwkC2P +cqz2YHYsEJI8gawXC9KDj6nm/SQwtjeglrWhifEeaUeyE9eWVQtSS49bazDehHZTqKJLlcSsT+2R +g3LOrrFAkiGXU4sUCaepGX3LQt6PmTLEX5VGQbADkA47OEpi/n/iENs+5D3Ge26P4ya+MzWyWCOo +6Y52izBCB5j65cx6q3mjEfbylHqNhx+5B2nVN3SE3BBTemWuvz5P9GnhmBgBn9eUMMRn0txb5Hen +d3bATuEWbozkuFE66yB2YU1stIdvq6dRGnLE4mZA/rIQAUVBpXQSbRqdLMu4HTb0uxhbvYtzQFBx +Lty2pMvH2kfbxUxHs8L892xFpS3PyGq+REgpVbQThuoXPGNgNzrnCA20CkFJ9q1a7sGVaqpZAgX5 +k3xAdu26i9kQY3WW43rjDnUcAU2qjyJL2nX4A4gAxgUXtCdNV+H6bHAXFAxEnc5/62y3NTtoOrzr +InnIbYYS1n9kUr0vKulcS2Cj0f4Xy18DP6xf71LVk26HAVfJetfiqJxERRKbQ7lBH32wvuP8c4Rn +iHF554eR6eKD8WHHFppmlgFkrMlNlYAtuzjuaA/mQtlREMTBvdIdy0afDtohHkuda87vJ1ZHfdQU +3DfwTdA4l9Cetv4KDpt+2XEXoeWHJa9i8ZCcVnOyF9TPmgcys5JM0txRw/h5bE8pTNomWJ6p/6WI +Sftwxx4ASO6nKdAF7PwPOZ7cPnqN/k7nQoe9iAyAPYN7jgEBgqGcV/WKlYUpY/+y82CEwXsv4B1B +QEEsqlTKv26CUfopJZg0ekPoSwZYoOX2eeW6UP+11IgRmVrD1Hoyy2xNgIOuFefE+EtHnqyk0Cy+ +fXhosvwTIT2AftDftQLGViXDRVEe6xm8rniq0o5VV/EGCVsFrdnHFNuNtkZQkHczdBNXKw43s/02 +BV7XS3yTq1Gv+03ctQZ1IVpd98aT/wmQHT1Z8N2An1cox8uDr4A+N8xxO1YsE2zF3LGlNSI7I8qJ +kyzdsIXf4i70C2qHGhr7kQLkAhA3hY2hnjU64ecLqtQy6sJN3JjVCVPx9A++hqgfXMvTrksl0HQ9 +KYDWbRZbd+zwcnRTsgKmg05qTXMEgEyAnyGsFJi1UA3Y7NRu0vK8PofJbth0LyahDVkXWDooD6Mp +wlO7ZysNwTNZ/In4k64nN16J8kNUD+J/wrxOukvplw4wQnKDYeVYC7CJTisw+1DLPAQr8O1XPTi8 +7K8j17PXpFASlhem4ljHvpl72BYotf8Y37mmcYc8gKtKyM3oZAOtxPuC/ljWK14O3GTcD6QLXLke +LgW7GchONxe3i9O27q7c6ZWy8xtX9ECM8WYoEOR9k0yiSeV2fMXSIK/ZssDQtz/1vmrTDiqLIuLP +w3sBgj4PE+idyDAch0B6EnRS/RnyFN6TExrNjF/R3EQVA4w3ZAMoL8m4MTwICG8yNRKObK69KgNd +nQc3s+N8kkuGDCCbbalsaYuX4hns8uyglTuEKa46ga6xFHN6raY6t4ANkfdl87bF5iNlUZNWZJ4q +8pu3gxHY8JwTnf+K7UPFly0BjPTGO8H3+iFkjNEpit3yh9k2QOs3VTBnPtMKhugl3loESuN2OXYa +vAejTRg3qZpdmFP3LwZoHOw+hK/r+ptNgV6hvyILBD28lWEkb8NNKkLVM0fNmKCDvb5vHPxpd3VD +7vKTIggQEor4QNNQvfMR/AptNWxZigDoM1E6kQuQ8pZ9pCZtqMqWmgHpqKHyRpbSokExlnFJaE59 +qq9jLWH6weUMowrb0fyNbGvFqGorJl7sbf7ng6CBJMnyvOPiCSi0muElBrOUH96rcOTMI7+FXx9V +nuXavwndJXwr6ufqUoJGRzvOkK2fVJL9UFWa38E3WyZON3BZ4qhm/OmmFTi+TA8YG23Earw37gh+ +QMdAfZ2oAV6khErqIoKwnuaHUafe8t7wDgvDtiV3vhQmZTZhiqiokW9Ws2mbZgJb+rtNzGj1fFqu +TG2wjVzUUnFi8eazZbqr3knvSA4BzTNjNo/jqYIEcS5pSlzWw7XtfvgPo9TCVbdexu8fQ1UnsarN +zqqNtJaeqi/k3fKOE3csI9eOgXHqOw5Z5ClFMzCMyJl4vrQ9XfcViEP5L8E0aZogVVJfdg6rVnhH +7QNrrDxQy5cx+TXi8UHuS6iqhybG5/5U8GyNDgTVYU04kbmMx2Ko0JPreYgAuClokRb0zeTwepCK +tDPPqx7a/mEm4JtsXXxm9V3Pe6vvP/+1M8cjlEnXVS2Utotbdbm9iimXosOpvENC0LLaMpA9VJFY +GbgGWm57s5rn+NAP2N2H5iOZ/Pv6jkbPisxPSS5tQpnZ/Uqml4FjIqTNOhhEcYEIny4QyzZ4/5ua +mpAI/e++NimlvwkHUMOrjCN5JbouDZqijbZq16XJNi5zLkvWDEYQhPeL/rBAY56jQw2urmBoJtBN +gvHNNwgE7q3dDTLyCjs+Yl+3mU/kX8MtfkXDWFAr4V9c9nVI0xFdMLxOdaP7MR2QOlyRh3dcu/Rh +1LHpiRrrdJX/E4xt5XqFrVvAZhgH+PPBkdHSQsXX+pfECKJ/DPVG23rRPTCi2RMlhDwtodO1nszt +LyrSV78/gPR7FGMXMYlUewKwOSVHmpsy7tUZx4PCDVVp45/lCcZKyGlMMfrCUt7nbdq1gZQaLxpW +y4nY+feeCu92tqVUMEmzWEOwQ2Dhlgej86NpOpYDXNGqZ/rgFbTSGGUmzOxOgJCYpW0+Aqhz79Vh +0cLp63cJ9feKQapDCKfRWRnUTiKzNmayyCRULiOPXk6QnJge9dJTiXBz2S9WMtngVaEJE6xq5uXw +hgAMUK6tMMD1kb5HUOwqK8UE1EE3xeHWk6yEf73tFGEK26VEKuhC8CTpO8Lol4tB+17YCH/jdNfb +Nf04j0lJ3FZiO1ArScigVtk5UQuxA5fRq/N5d3cOXNRbvyv+DwIUgbtgF4T8Vax6bK9EJOHv2XAM +Pp48ASHUtRquv2A8Cr+ipAVkieseckRQXJmTZZ9Pw/xHPvyztd7timPMe7d4iFm3EKv4Om8jss3B +5Q4xKgjnvuIk/Be7GcfMz6RSR8xH96X8J3VpnDZRNkTpMoFIiPBr7jtm5cN1sg89d3aBndIlkay9 +mkUc0ATQ501o2vXEoaEKVmuTQCC7EhOXxKez03alDrSBQNPN7ygY8ufN1v/XAxpg6TAOP4UGd1z/ +R1AncKJ1lnwgKPUJew3lyHYNlEi/A9CQoU9hBM5d+vKqBKrSOodKG2RvV6X2/ArxmAoUaWwWAmJk +hgsxA6NSdkYFB91sL8nYtfoXeFqV5qE1GgiNRIYMcuk0RdVROKzWVbxzO+OSYiG5Zf+urS0Ofamw +saLMqBpr+ITfRB/Mwj0N99P3deKiLmSl1czfgPfTdlfPOW3Dr3UfnVEpySu1NKPXpL07xUf7ScBo +RA8g10SlW0B8FyBPPJkZDd1ImuhbhjV1wiHDQcizYWQ6VuB43wY46L+GxdyiOEzldGY1bN6vYcZR +HUw7bgDsqXYvYBm9MX06eKmo3Qsk17K1dJp4+Ja59Dd2JWrIWTq12jZ+g7e+mMX96ZJnfqwTeKH+ +ozr7gWpbAW3pNiXQs2CO9Sqzu57t7tAg/OCdqGVd8LzcqAVZniDYrCdMn0Oj+grUe23VkaM5Y1Xn +l1FT2jJrJFB1XZFGFpc81iC8ms/OME0AFB4hTUyDydeaRXctsAOcpoDMVgyjhpAX6yCQkM6k8D0e +ZCY14CMPCUGCzStXOyDrf62dDe5Cz2qJbADqiQvAxMKCsJuXmuvypSa9ehPj97haR67Sb8cjM5xi +PsAJXaSoyVqSxqt8qSoefcrVJmyQFqg+kjDmThcEvyCCWAUc5xJobRIZPt5cGuTYmgSqDJ0XBl/P +EkcETHHPUBncBrXLQYQHJDSUJIK46h1UnBXA3l2DSIcBvyzngjlbn7CzwWK/+Pfk+uSEgH07FwRV +zYtZF5RecqzK8wYf0ZDXyB+gQSFDd58KpQsF/r0x5+geDGNNIo1X5T3SRMq5PnK9+ta/1ezxrhj4 +3PLGk7EgV2KZ6wfld70187VCjfgAfZx8XGX4sCZXxLrLfTsA0IOUOPH+t2q5e5RL4ZIVc0aDpz+C +/HyCYLUWFNi/XZWgaeny6DZwUJeia/IF0t7yjJHwWTiLCaHb+/M5hF4Bc6Wu+suVpwGH01XSp7UB +NDkLNWNe5pZ6sqSLgbJ1Dd6WkTJnHC18vxWEoUMj+zXno+YMb4NdM83r6TaVEkSQFZmVAZ+O+3Y4 +fEdeC6MoZFP4ueN1VWFj/mb38bCFUap1q37fdrKRgVzA+93NRtEXW4K02Gw/OHkDQRMu7pMhHJ1M +9gejb3ReprWfV43tGcrH20JBGsJszsMX3/Xjx93hqt+z9amKSCzDc1dMmdChMIOr1nbDow+jz1OI +6H1JLTYcKKznauZVrIOWNQWaKHMxWevkI+rBecN6IEIhspLoFyWW5lbsykzk3tDEW88/zCDb70le +qDIP7VBnFeRYSHsEO0wigQLoeToej54uK9g36wSimNtH931tNPTvMlhUwVtjnVO7X521C56yLdDH +OKU3A2I4aEfif0WlJdnIpi80N81686smURH+iAo7VzdAqG/bAXv3i08x/MKde9bEUgofJr5H4Bll +Hm/3clP8CBOKe1V6M86oU9Iw+M0qQr1Jecvj7uCoXdMAmKzPPRPFybjVZY7dSPDI6pjf1gsSiwNV +klsGtegHnFOezHyaOzAE2ob1dn9x+3/GzqoOrw3YnRA0A5+kZY4LiAskCXU1HqnQ+ln/M6lDlY1y +wDMdFImT0WSa+ZWcuFyiImaty1HDoDbnr+4yEPr7U9Hx1GOUwmCbOBAGFWjoSKx1z+GdzzEGg8hc +yas4rr/19KWl0hxrhRt8byWz+fETKRbfZf0F2OFI3gN1oj4BaUIukzIXptJrtENBEbmdAnKRCdcu +K1aNcsVjUdwxjRmUv+24TAApSY3BYYxje4zWGR61jboHVU0nFxDntXTvkjtqeu+J5HgR9P8XI1+3 +vyf7b+gClGYqXfv2lKY7wv73cGdZfVfZG9822Mu2m2MEgeGiacw/rmCyZFEwOEC4FslfmBXradZZ +kQfCGf6/KBUTtA9tJdjzsvJgjTRFe0mSpLuJWCZPxapN93ZHaHpigsRRnO9pnuWG4elQjDIHXirr +ipcVCJvs8zR/TAK1m1XUFNBKHbYXjy1O7fAMYG/isVhSTTXjlG1HXkPWOG8mraGWEMTduV+ExR66 +0nPqkIKmSCvGFY2yfn1df621KeRFlg6McEO9Z4Jb6zj1jYCz6J8K6lwbOfTSvLb0EsdN+b2iJQ8h +waWzXkpbLX3tAsPPm8gccQuUzGDs5gXPy7eNtqoWoT+utLxgdO/rao6EP13hyQkPX7Uohu0CKyf2 +QFWvSTQkWFuy/IzPkbsDDz6YTdj9A25Fzz8cA18KZmcNDPVqu40MrEKxIlUgvc9fok83jAZW6XBr +CDi/1+uIgvJ2WlV7WWe/3CcsHlDE9z1sFVymK5YzfZrv74YuJ+ybCxgqP2SN7rnHHIXTxfJsPTre +6b/9MbT7Ra4QCmUWrUN4q9nyHDV0US/lVckTYefDDHV/G7dUbz7v6W5+u4X8U93SY2CYRX48tQdg +84e+HRCCfM/C/kMC2s2R/yCn/OsPabTZ7Eqf3K5alDHvM3Kl8tvO/JxC6oPtJirXKNlzhrAPAAZN +gbolwIUwenwkTM8Fa252ps9hpiPI8FOIs0CW0XHk4KoP7X8QXqyYZB/p2KpZV96Vljprw62grBct +vblOndM1/2vOih8LktLdiHnXFnrTVUSXQe61vQAJyjnEKGvy3pjS6riS5nl4SoSEeI/Vj2B9ezNo +w8znvUSjUI7HeGI8cbQZeBk1gmtdY5Z1a5PBLAcCQRCD8Y0rnd+eKvT07ohIN42VWMSRVCwdZVkv +9d4kgRekpSr/muX3o7HaqCuep1Wov8KK3RFRy6XW2QTcV8x1UPH7pHdP49+VTfFIsTboOp78aYRs +NKUz2vnaEfmRFdDjZPYhRASmW8wD/R15PRoZ9iWcI8I5iFlmmzbBenyYNzWEAyHVDpGEPWFTPBrZ +ihEdWHsuQKAfEF4QZzs86vfcNCLv554zmRjnHiNVlp/ktEw/GpPewGV2OVh9XOYpUpag3FShNawG +xMoL1Ryq48nNhpOxxGVBMWDS555QtnVGbzc/38meF7672ow+3Wy9ZXbipFYQ35CT5acD0Y4SDsox +4w91gGtgNeTrdhgemHO5N1xtmx45wfzN2gp3o+SM7IZJgBi3+s1zfg2Hh+/Bm7ZJ69IkBQW3+MRi +KB1PdhuMnN61FJxqoXwHk48okq+O1taEEPRhOgrPjxVKHT1jS9BoGN7glPGLDFXOcRAT/5wmWl7D +pw1ibKRzlfmKNhcq+KZmKUVXwBRTTa5eSkXwJjfc3VQrO+htoQPTPqys1spSpmHh2OTOwns3xdgg +j6kz9CK1owa7r52Eps6V/hOMTrVesQPlxLHyd/ex9zCVk7E9udcad5cwivt2+vokXOaGdxCMgxsJ +Pnt+RUavm+2Gz2Rlvk+bFTN1pm63gmLLZH63jKLSnarzNcJ0kDvbF0VCf0T7tPICfJ27wPufO3MD +iPEAIfhUJxBNA7wnb43Mo355HRm/CTUjufd2HgLPnQcYOnDNe0t3qjPYdhJTBXX1tC+s4WaH2IE+ +7sCbKK1huy5pF7FS/MumF4+QIBUMN+b5Iczvb1lEUQYW7QSpe0iT0wJItgFRmKcvkmxm23H0IMh6 +aAWWl8puuqECn70DM8KV59omtLAHI7e1RdLaMwheMWvtRe5/fhFKSBL0IOpK8k3XgZxjUnFN3a9I +bsEAJy9bmwpUdkExrTa9hmn3yPm5Oly6OcMqyaapaCf62n2ii8WVfBsjbNbFm79wlhgTWRuRMyZV +Td+Ej/ASKXj3dM7mJnJjvkpq0M3aKflVFM3WgxHbasjmQWj9tzSwqQtezqCNt2LHU4lT0RVk0K2y +azz1lck9wRY5rSbyUjJrQIDy9+sFhNkbucc9cD8V+fldma/46gLHNwoAo/vmt2Y6mYg2WFNeoB9T +87exNqqiVvb5/Go+hbGAlSqGxAYLWbgXyNTctzcCcnnk9tTnNT2LqhdXBH9YEFI+2jAKoYKzhLVr +4C8iWcGZQ97NWUFlebeMkDnetf8YYt+rOcMP4pvVLjiwxsdPunxJVnTnCUvUSuA45aZRc9TBctUt +af8FIS/OWEZzn1HO+EKs5Dm9foyBZxosM0AIXMcOCvI79o4LkhXkVijSRQFL599O2PdgR2uVOFkA +PCl1FcxxlZtl+40fYZri8WacnHmRGr0VabxZXyGZbBHPFFNqI+Gd5e1yLYz3/QjTddI7AmYoCK8S +syoUn55DdiOaih/KrbEDid8dpvEGz7OdfYIjD4hVGV3peeKk3ETgabTuRyYMic+Ru8g9Q+v2Wimn +MRqrqySjQj3H6DdyFEaD7edkfFG8O/DflxA75+FnPN0HROH3DsBYGOEH3EkLLViRDhOc00eLuaI0 +ncjmcvlvO4FKCSpjj4oXFlab/RUN6HPjJfsN6FMgZ/xjTguvqCGXUuKQ9GV6ZVLz30KWfrtLfpR6 +tJDXcCqgykbP+46+CInc0rPHqDgJlFew5YZ374iCGF7UHHHbj4K5oXSS9piRcWlnop1gslZSMC6y +XCTJOgPi9Xz2SqhwfJdHuoatNTM9aH5995wD10pooerm3TKySyiuqJcMTvLuz8lXiuGkNyXQAmqV +fcBYBkOlJejwWiNyYI4qoNjivYrxSh2sbToox+mbPRqhw439r/Mm+pMCOmVvlz7KzmDQoh+YB7ue +i++x6rS9ArhQDjdm33YgMiYIzMlgjEORo5Bu2thtmbNXi0sUVaLAu0GEG8MsrTdU93AcU9aCN+a3 +6PNe+n1MRzhqAsXbxfc7ajvHVKQcNs87R4dSghf54wtahsbXvzYiqbI8fKqixEVVnh5qIWyEqV2t +7S9guo1GOXIVRZnjeOIerp0+pPmTkNmiY5l5NDSeIr0BVXDPf5ZYJeh+1ouxbs++tJDzPR10DANf +tjtpBN+BWUTyuhPiFCZDPBCcB9+37M84T5pczYOzSbE5O30mzMNN/Rvj+WeIJDWY0LDI5mHcOAA2 +fQ/fB9mfGNsLs0IB+ZcKDtNpAgCKym+8sPyAraJuu0b2Fp5uWdtA1uBxrIxRZ687jIoIfgDdPx3N +UpJibRQitiI07laQgMQH8Ylv7jfIznhq9aI9fVA6TxuJ+cUnJZRd0igc+AxqoQqbhJLgf9PGfqaV +Y3M/O7Cv3+kgIGL/MoRvqhL0pGyowQM3dTjZwqHbb2EWcsYp9lcwHrGiE5B4tNfjk3U5T0UTI1QS +IUjxnmp63Ro3gO1rHKmVZ0Hu9vGuLX2esbbSEGIG1Rpdl24jSkjbD+w+GTOAryS2UnR3TiTVzHzm +UER+Kd6s7aSsVe+nP7Nc06+x38Izzf6hH+wYB6cziGfMkgDvSWTqk6kabm7JKQaWPMe/cxVFaVhI +BCicv2IWVIivTCc7xUGV8skV+XKgy/5viGfYsEvXANUkhQOKA+5Swh8t28oilMickAXjOD6NT9jX +FOSlI8UUomfk70IKq8lpuLe3V9OVpa/uLKGKEVvUh16kkz0IPxkjHlhe/LVjnt1C/hHOenXDWafS +g0QP88qhJzyoHAfMDZ+fmVb/e6FQUS/lS+VmWf17gQhKi4y2w0W1iWnTPElppvKEpdPNwgO7j6Ox +PA3DHa67vWV4acjTetj/VLRhxwwLZ4o9SHpnBbotbsskHcN+V9Bsn7yYJzVbcMUz4tE9QfI5Lr9+ +UuGlkXE/PqNbLwH0hDzJt7arIffzn9QGLW9Ki1ftamotpc1uzwPWXEIxwtgkEhzjCm8S2NCBb12B +TcoxnqwhGRZwuZDN94vfsjbQDbuCxnoeXbRykY2DOZ6skBW5+X3WslHVkYdtGt7HH4Te9n9oq/wX +yD9b1Ikz1mRcIeMtzqi56BL2bKkAzlI6rSLEVsXWcbOcXqiFk6AslkT2FkMRn/5cQspmfVXtSV1k +BxyT9nt+uzDZci824iPoqWLrOJZOeudXjEErii08q/o4tYjNjRnXCkGM2s/EFMnW3Rfek5t8fmih +CJNH1AsDhb4iEmBWxkmxbbxWDQyYJR/3jvh8MskChSFhAxQfvzSWZxjU/3SZNLSqbG+CUmvA0+9c +Myj6Zf1MzovesclUtSJWYQyphLDxvdj1VuO33c7wtzCWkir7u/tgJ3inX8grV9VLMkjMvWY0wUtm +BmPGLzoWcn7rWJTLfOj/akFxlR8dCNib4UMPV14n4mXVFlKkEiIKwzwiVTPNihB87MJOhKjkaSFT +xu4+8J8LjgTJBSuDkAgEjuRavmOB5uumt1yw8A4G170HqxGd+BPBsW6fzh3yVNwpozKA3/ZdU0WU +kBpx3wik1Bg4WK93W2/1bFjf9iJlkSeRW1vRr7cTg2UdfKeCbJxmieXCFPY4+SFoVsSt3OKEwFK6 +As53sOwAtjTvtlH9SQhjmsn04RV0wLnVnSduZpIty7YZCmgYjLfvKsinv45mUE+vW0/LOoWEpEPR +903+adqMoeT6FWzTeR3ChyDJkgA9NMIMVTslHzVqIo+s1sLuaddvEt+sbr/RzlETki7XFNFEtuz0 +uG2+pIHy31IQp61QqJr/h/fngmFZWDUfO9HRtNgnsoD43H5c3Dxa9+n0DrPeyt7TEJbaWEepTiXe +O2yvs4kkxhH/WJMDWEW5/3ZPvQg2xUM7NHxN6gemqWF73WUzChSq+88p0I0PucxI1LJkcTnajFAy +o5+aQH7xmgKZLhzo/BbRZS1I3tOvPC+07ImVfUwBu03SQ+D/7cDYj6bPHpXli2YD26DGtnmrCqg3 +c3qTeCnnUAFcPW0pVWFRjEmYVBG4nkwxYKYZygepVybQHpC05obxsQ489A5NZ2Ce3LBZNpbwsa8W +g0tM5/5o3FENCFzLkFlkzFggEsdzWczhGlRJSLpS8Zwyf0uClsvcFbldjsMkVxG6uKW6zNuj73Ua +3kMCHN5h6tSAf6yLsOV1lfZhdvmBVhee1n4PnYuzFsVudxgD1Q6v6zgpqKGkzAjv2f6iuS3UScIK +MXGXvP56zibaKcjTRZWM3lu2vqbBsixCzS228H/a00RxcgEiwlyeVYxqyvdbGmh09z+E3pZGNWX5 +jA9QWDrG6K9GvS3CDy6G4lEXsHU95F27GGuGcl/VgUL22A4mrEC8yIRwv/jDN8WeUFMnFkewC/hK +gGCiOwNQz1gf8XUkfIANfW15zkCS9KhybLirSTRbqVdtVS7lj8fRejFLHcrM/uPDyGEYxDTXBOAw +N6AvvfJTm2cf7ZCqedQuK8kYtAhK8B+iP85OI10f3028E36PdEAzo7+uFaWZCkqFB1qAkYJuXBEU +pqixBwtiTvuzf8MslLnJz+9XNdtNa2rqF9E6AY02O6UV8U0m/MPdi5klgmIv1LEb/R3l+sSltrmg +3Mf2qarAiEIypxY+gsRLAETXmfGX+UprL0Tr4vpWTg4QqGYegs5MSJfJynXbWPfXjRoSVuJdpKYA +CMahommhvzxLbpGSi6MA0dWUMdHvHZb5qOmad61mhfOn/YqPo8ZrXlwTesSJYy7WskCRLaDGv/6j +cI5nuQ8qRMT/woSz6RHKXyPN47C77iFG53XmHgP8/6M/oLg+Y84LNMHlmGxQSSkBIFQREzQQv+Uc +Zq56Xk5kAM05zvj70VjTnfyw++Gn2rwQC7LWGvI7dx/IbS76XhRBJRYUTvAbud1mr6UPd+xDLLK9 +NUNunP2/atXECN8+shb4ykizPzOD/uCFe/YvGWjUX8CmCXo2aAAKxPdsIX343UUFl5w+sDyOtnVg +GXaW90xmACUPVZzdlTAZP5gXkUYtIPD51AxfX5k3VTMmW/Uz9gnas/O7xN6aF7hdUblD7vQxEZBR +q3Ju3eP8a/GR8nlrtX+a0AWOArzEPKPrtrrpvAC82rdtMsxXIu3bZubTnTTQ+dGK+oAITYjmxqme +9w5XbUuDAMOhp9zgjYJqhCjF+nmrs1y//lLXpTggsIiCGW6C5shRWg9BXAJ8zFV0HzQLVvIdYBjJ +gKEh6EHOSd3C0NidSwcFvOo/R0t/Q5PeYYM1/mfLau7fJzhFhQWx/CjIMDLYtJ8y6bWrP7mEPYJV +kfVFd6/lUkjqqeEwG90ypP/SEOZiOJ5UtFSLKaEKU/vorlWf6J/3xCrvcL6PAMn4qfsgOhQab/tV +fZC5+tjImYUkVuUuwPlZbwj/Pco/iGqQRacGdV7ZNFZV+FDfP3ikE8DfsbnOPjnatfH4VvtX4jhc +tbgVtCajWmlG7LuSgU0fbz62SH1/YzmkvCH2kcsO5o3xkKx9tl2JZ/F0GL6s9SdkQOOLooyhnRIx +MIMO69Un1TuSGfe5tAxrKN2avFet1d1OzAV5vCF/DqMirbxJdl1SWK1q15rs5453rzM4MYYFKBBl +IMFwrqdsCjevpIep4Bni79fZmuYbkKzRpNSVzygcOEG+PwBebruoojMVCxoyDA444QU4lmcs9Xez +Q3vJKCExBvniUErLQKW1PF86GNhOP0tTUnqt8i0JBLWVVk+aBMWgifszMl/aY1rTW8/kydNGqG9k +xj8TgGYh7kplt84hvPQhayYS9MXgsuNuLRvq0k81AeXVeWD1ttGqseqKORzDIhPAWN6p9lwWie7M +K328V8Z1Vl3sXrtoqRKReDxLArkF2hIN6/0LcSUh66DbFRhLG8Wx/D0tBwJ7QSCZ4iqU5r6bfb/n +SClhBCo957C/NSyOfukF+pNJh7iLZjpe41DQI9k8HFSiYlT54zd4Cd/OkX9l2QMp6WBs939m3b62 +K9VAwtyUTEtw0GT26lTDdZ8DGzrjAQpB4SS80u2bZ+IEiq/+pm16qXSxo1F76fdHRW1nDw3aAlBu +yqkqtE5/5dLSslvnHU2UUj+YUFqnpIxL5aelnjsjcn7lqJGi3bHIKW9DJy0WDndO2R1Mjfkecge6 +tA7BwRvQkJjyx5T3OibEwPI57npDcejiaIXOfU3RVqm/iiMdOI/3pBo/hXRTWvbmZDVoTruU+doW +DTbuxvruymp8olxhd6sCm/ZMf29QBH2KeI6Ni6o81V4fOBsKxj4/ot4HucgSsoBSLDgp8w1b4mrk +SMXOL6z0jeoV6yNNBabrbHXH2ZbVSmnW48PASufcUGGyLc3cDp1OQNUW+EVk5n0v7Tn2ikSMcFWR +IAQvmdCYEPVVBlsaKyzfxJQr/imsUJEkWdodx6C7HsGgCnb3CavKQ5YMudF22MeEvQYwkWn17qQ4 +892LLsDO9RMKWrmU/uNzPoKGAq8u1SADByCpu7RtCN2Tq0yBAche6K2QFss7alabOgIzMigrOhXz +KyjlcC5tHbp8PWj0yZOideD73Sawl+5faxMoKMQqI5itmQ8sTKKSk+a/Z01DkZXBT4QOfhg7JhyP +mM1xDjdbQVHFJ7x/Td1lixw1RWPT/xgx0XD5m0mgU4Y95kNf346ycHw7oNbd23qGi1XYRcPugSyy +Bol4u891Tz9aQyU8Z0TLaiu+Mt2/zjPxghVhIKfeWFG7QpiM93PRfx4bptrMmQu19Gvma+vh16gV +FnNmsAcPEe62hzZUInCIaRsHN8ftcDSck/hwZE+8J4HBl2mMj9g2Mh8oDsTyVqI7naMzKUY8D4+s +kQk3wE0E+l0fM1EBgrwxv1uMUuQHAnJoIoRz/6WgdB1vpV307sWIZyJPyr0vxqKFH4Rl90fsOxXo +UOtpFmQyU1oPkhrgtkGX5IfNwu4dV+TVwY9//MWnP7qAjAsYhslpFkfPF+Qdds3c0UUUgnkQHJVd +33tqt1qnr678/oVcWOW5CvySWFxsKNxzTEMujHeETGZMajvddtzG/TVSHHvHRtWX4ny0085iax/o +Vw4F9lG7OmP452v5jt8fsBpLkShIq2FYThOfut1N7pPVz3G6EPvf/7JzV6TEXyiLtOoElWXDsK4c +YGuyzucXe2qXsZu/5U6sj5DQCkExc103x2MHRDxX3XL1Z4egfDJYM8JIegd9u+QqKLakTPcyYCTo +8cNrZ2bU9hOAeBvr+69pvGhakG1ULayE3qvim3XG7lzKOgvW43Fy57Gz3xU2F4lTz9mzAOI1/LkP +h3Daxn60VksePr8PvtAMdvcgWteopsz0j3QFkQwQmJRFCsMp1hbF2fVkOOVBAXjUrhnDPp/oVFMv +PcX7zHhBZhIJem13iyKdTS8j/xfrHgDORAItL/CMhdQVvJjk99/OBcwvDWfhQ09wADtIyjUj0cvr +uvOsW3sz4xvydmns2f3OlGgYoX/4vSOUiIOTrLQWe17cNMVtgl1/gPozTswJRCvlMXNgoot5wdms +wSrS0B9Q1ZPwT88lEH4IE7IXLG65ESUdX4R8qNyWFn/+KskmWnFqsgRChG9a88U9D+moEvDfFX2e +TzRN+bNiyIQvIj7HdqclWO6Nqc7PJ0xlOoh8cTMVJVSiHC/FsNMbPjCQ2z/W5CahNc9yiYpzZKID +5FD5840AslDRBVy+W+AelaFpP/R4z2Frla7fTzSL5BKNRhhIcYOkO7VY++k+CExs5SpBiKleBw2m +vvoDi+KFWkCOe8nTiAOVa6gx8p1rPfpKcayPwoaqlxuTGqD8XprIo5ZAiNk3Un4g707HUV/yigF2 +HoIjdvFL9Tm6Hs/0nQ4kAZSyZgU70NoIPo87Yr12A2zIZVaCb8Vx86JNkOxT3HWiHGyQJ4wgnoXX +RRvKo/UEIvZRpLOzNzzJoFcHxoqEs7mllRocC3Q65BPhlnyodn8Kme7/Ct/xB+rZ6cwrWzYmruqz ++ZwKvPoRe55JchcJdmOEOyO3wnHs16sphSmxPjQnvS9aw7qF6+rAv4/3kx4YiQ0BdpZvvaW4XVV1 +VSTFcRD1Sqh9SKggmcoj9hArkrtER4GZ95ixafYfiqgbbwlM43Yr3E5qVKcq3mXEr2NEROxMdF3J +NsaCB74n642CmNf1gtnl199KixTmegFXXRCV5ZGu2XaIhkXuuC+obArQJ7CHPT5PvVfK3wNbPafs +qwZnLU51ABi5J0tdK87tNVv/ao6Qk5HJTXMF55PpKFQ6utBtLlh/V8pspBJ6R2LCLi5uH4oO2JoF +MhXAf9IisuWOKkgT0Y4TdBD90Bolo2abMZhi8uX2xndR7x3LfLUD4GlRK+ZO+QIDFVzn1hiGBWVt +1CcE261uC2HvcMQWsN5eqs0Z5UqX/nQSvsDi5MaUVZgCfZjjUZTwxo+mNB7Y+ZeMRhnZtaUfQa5f +22lRUBQOReHg7Hq+HygGMi+qY8vtW/rZq/w0qvlCyLvh0qQ6q9ZY4WC/rTNKYk4sB9c9hLsHjqla +HnZFR47P5ftMqR6P6UAw8p1fYNtftiC36nmTNVIsr5nl9kbKLrVBqe5kQQ3VndEmEQ7oIpbAbM2u +7gIWAmFTCGCYvy9YclrqFqoPXNX0KmJIUOfiiC7mi6k+CJ3hmyDix0VMR7mzgQ1PWFBQAZehQu3m +M73aszr773oCcUrlgLgQObU3AdMrvoNKPYz83lboOi/Ssf/wRXsZvlRrxDVn3DWdQJmeuz2B9ITa +x5v36jYCVVpJoFarkxYc+s2nSrnn9ldHvZ05gqeR5S565nuzq49RcWgpRriiCJ6oTJY7Oj+ygyID +lsDoo75KcRSXJbLVy0vKP1byYLQl1eT71wg3mk4GdQLhQmayXUwI+G1CSt+ax9uWj+JMb+7fWC2M +60nUxoknbdtilQ3c5ygR9SYxlljPwo7sdIwGAidnhezYs+9hoPihFeBJbwt4S3jfM+n6c98qVdJ8 +Y7Ff7YaUP57Shc96wt4Z7yuHigqrMi9Jfui113nM7qfAHGVmQDHvpgm9seYDqqdUuSop5nJF9ppH +Y4mEtLXNTYniyblihGQvyqo6gH2KB3jhiBC+Y4D3luQdmWRm94iRkVGYOeBC19JeYhHq+S0y6OOj +3xV14/BmubHx3o4UsdXHCLtlNcQvMgU2i7clsKJXD3v1ogGnCssBfKglguVpp06xUK7b1a//msh0 +Wq1y1Ctc6tA6coWkxDeEjZprh3W63tC2b+YmcPwzYT0gGK35Nk7FrzRgapC0KKNZj0s+3dvq5obt +iBMotVOUn3lCCHNd7kdTI+J+SLBhmIXGxuO5NVV1v0NV5TmH9Z1Gkyi3gV6DZmE6cTJY8VCoeEQ6 +Qva0yEtCDfDyKUW/+B7BmlcY1F0mNUqIuLdxsYCmF66rj+LjhxUQFUivCB5Gi6TR+PqHaa92+5mc +MAkw+PWvuBduJQ0iA4MLACMgBQNRX81MkWtp532WI5P4PQ5HsN0i6ZiCmXumM4lcPtTV2HiDt5Bd +/1HuW+MuL7NNypvibW3bUG4prDabaktyQa+5QWY3oLneS+8Ac+CpWWP0tJOgRqxyakMU9HzFp8Ab +A9JKPKU6qAWmbaCsBi0Vh4gE1bWXH9JBnV7ZDhyfw8qO4ByC65YrtJ6G0+2tKYUhkJhWeI56F43/ +Fm+ROaFRsZuIcexC5e7kEHhqOTzMxdlrkHtVg4XWtjJGKXJt5xdVVqNbtxznrhMcTse93bg2y/ld +4WtYuBJKK/TZfyseN+UUVUrSzDdMYaoYlnxVQZ8qmyvXqhFsJ9STYmdpCJ/7jxg4LvCpJe+N+RYa +lZ/meaUfnZozLiYUIvPrwFYk/MtbQJ9cTQfds2b/tqyIUZlS9+DBMbCOvhClEYcm4TmI3Xyd5/Uc +tMjXkQ2cGSbwM+slJWQNnQWx7/totFlyturFCdweGpJcDri+XxPJwyRDiusZAX+OBHqRzv/Ln790 +3FL/Ro6U49DvP1pT7/alL/vmHGKaQTR15uhHwPFZY9o3HJwrcNwLGm8rlzTMX8j0ertf7iMEbSfY +0EHi1S63xTo4e3FlfIMw5qG+LwnE+kQkDN4xrbPgtYi4ozMKTR9TGSxKAkEAZh1RPyEPVaDwN1yk +vxVS0TPUIbqIMo49y+n3YE+2K4nYhPsDR9aeweQuwku4Pgw+nTff609faVdV6ZD+D7K6Rgimbc8f +sx17D/VmAPLXH7xC3BOXdO7evgVK6gzNtz48CwqHrjD9nAs8UGPccXrstBTXAGpcRW2kAJq0xrKY +WdYcKFdsWXJEytm0hG0h598hVUZOaU/bZbzI6anvx90iBUcdVntFY78ei/EiiiFXcNTp77YhksTR +50MgWcLpbQBTUmdGaOcrrDYvElAgheO8K2gSbKaLvrUsC5U5mtzqa6t//d1zhPU5+3SUw0W0ueVg +8x2gqaTfsAYowRQq+INL/65+KmI3gkGQJG1MUhuqKDZn6Ugd9C0SDMu9CQRDQzQXQZRuD+MDF0O5 +p8knkLmcSL9DBquxSg6LLT1oSurweInFCmrWilUqtqx9uBis+/uT66MwG2XFOz/KAPhTYrgKl6Xp +G7AeGEpFpnVsBQY1p55/aRYV7arDTVlJWQw+y1SBAkqEl+ELZ9vugtP0TpW565F+E1RESmvG0b0w +yuyrzjUgz0WBRXEOgiiwkkDtg58A9I1ZDaJ0W3kuKTVksSwRHbCBC1umsU0KOchOzF4h/xoxUa1D +hKNSVc2PDbnyeZ7Aap7bNK+kLuJNDH/pHhpk450WFgHSBklbr2/y0RJt/P9Rqt2J3U1wKL7mITqj +mg4vVN4yDqQZt7btcbfsfOt4no/sJzpwX74abAE/VUzUXnOTwKTzM56Z4rT3js5ofFOrcr7CAZs5 +CqQmfxwK3cb/7z0H6EDPB2G3/37/M8p94ytnsjc0QKpBwnYSw6ooThYhRPqEAz0gqO4gRC6Fo/mQ +1+Xf/U2r4uZDOjNFxyZmklUBVYIJR7N2AGfDS12+navMZsM0P3xOhhivXOQmbx8/f3g9cX+tJmqp +khW1+LRbMeYzMEqnfAKQUDunBTxdFGzJCMFUS/NwYuYzKQUyTN/GC2l7Pi0KSpgLHfdsEu+T3biP +k5aIy+Nhw2vVSKdPIoRsOM7zMgSj6DRVeyXFUxIq4UOk8F1RievqQcFbVUphQTkbnSxZueMKWFiR +s6Q0pBwS6aGrnYn2dFeN92OsLFgSlde1HKl8Y7pgc4s5+7KIhqK+C4u0JqazwDutM0aVDQu4Wu3d +fXBMF0KsXnaxG2WlwC0hqoTho8NlYQ9gRgaaY+xXUNqh0Y+sJLumN4ViA4TSPQYQbgoNA4Rxqw92 +IPScnkN1VwZZ7wpKGV0oxeCaQ8q9ItTUb2Q71byw50ngRWnuNxdLHcWqeb8LjeQ4fVxSwynTdqJq +iZPyIdbejA5LcNxQgSaf8xXKwsE4BZtRiBiUlbRElydfiFgcJgm1L+hqg/eSeIAtbnNx5rpaXIDL +96ck+GEC2Jvv2m01mN1s8pQ9OU4Zi5/4aKRH2oQu7FfJ+q0Pjry+aoqfYv4jqAtqyWXzXhwgkIQW +ndnRgNMGWIm/LfT9AsFaBxSeE/pCFh5XMTTzI9uWVeNZocACIp2CkVXMSIJifw3FQfYd5LXPD+2N +Mi/uFUmjMQO7p/8xmmMaBFo4rZcNGK/ITDV308BvTA7KvGsOwoMlZY2mJ5o8hpBNATXw0pI3qnYk +7zucTELmXcSUqdAuvfIYQBQFEbNaoBedY/gCJgIIOfSDGncLZGDJ2eKN/6128gcoTbBWqN+YM0Rm +Wwu6M9k19xGpV/J12rDuJ/KCvhGJrEjYf2l4QSgJyAdF4QG8tBiu04uKLNIHoAXrPgJ5R4oe0uwC +mP9ixMohj46Xit1xT3tblIG7GMFo2EUWLYAsl+eg3aWHlkzkn2AmV1mNUDCpEbwyNIIlDr0ZUaFP +dHrmnV4p5Poe9mbSM23lvrghdSV0yYnRaKGm52QoWDtEParCfG0dRZ9B2jd30aor50p9B8Nssq5j +sRkUrtfPzDrTYlhe5mlldWzoq3s3qatJWHATdM9Kq0QuFO1hpk6rIzF4rHh+MK+HTcyV6uFfhN5C +xj3LxBFnMXkH9lkQLq2z2ZYXicW+YySpzClTwbOVcmylAdVF2iC3aLgLoTeCK4ofFYLR4LtdcDsX +P7E+wDmGGxhpUqqq5JxDNGwxeacuje+k9oVBss0kMIK/cgYxJdzYBCW59Acx/kTPgudkcP4kZEyt +DNeRQgI5yXV37mujwOsEAKlzBeVNE0SJyVY9ifFEDGFWAslQQgQseykExc2u8Pxc59G7KamnNRyP +NpmsbzytlY+MTrIkqhFj69xACJtiUQ5QvVnG053NDqfiD8bSggSQLCm1kY5nRYJKU4UL3MlXaPsp +xUERddFBSwAG616Ufzl8UUiqSTbRWolexEc67672yhIvS2Ma+aRkgxMGzqEE4YWNPOR+TD7wX3Vi +XIuo5c88FAu3OQqGeF3klh3ZNSOvHMO3nDGovrmz1Tp6VlN/BSiAy936++gzE2BRMhev+qpbQpeB +sfI6peYlCa+QmuiWqNVSKZfWzYxeu9U7HQA6CZmTjFVK+LV6+SrRU37TugbwuKDeHPzWxeDlqAXG +UeovzYSMhnKq+Quf2mTrIaxFbARx2G9fdYuYnkycb8KhrUutp3RasNe0bqZ1yxDSN52HDBH8bycb +jApfAI1jVLfOzjMntV+ulwl08zPLT6tGrgSeUKa38VNJnYc+CipsoF/AwBUGzf0LB61N+OAnvUPx +ljCyijz+/tFnu/FkOFRKl78FDgI5YVxjcoimGmd4SKmDjSjrkFMO6yO30fAz/wu6NhbZp1jmrAFq +/c+PR3BForLdG/7U0LbrwBcT8IvnWZTRNJDGsa8G2n/vyB+K6MahtGzLMkH6CpQiIz03iXoTky5X +5lEQInNgepEfsaq8CCBJX5BZlL6L4cxg4F868U+SvmDNd5olhY5GSsXQrXd9SG2wP0dVIK9dZA+M +96mUFJw6ZeslsX7P3BUtJmLG+V/lua2iDw0XFLVLpQGRlfEwNZvIcNxIVP4Nb94Tg8bD/9QUdwz3 +eyq3aMrjs9gPyq98UJ4krb7shsqbhse4AtcHXg7t3r233bjyDHMr6QwLUdFMOrmIIVDQD5v9JWN7 +f+6vpcvLuL91P8aQf7zvcO5Ki7tLBpaC3HMqzJxXyDv95iLuIcCv3YkkEscgAFHZmPsBBixhW+Ay +njk/LgwJgyh6JyZNrHMZWlgtmVgRU+SD/i86uBvFPMvnq6KcoLGKePzYN9tn/bxY8eh92RMEDuCT +tWVyWE6yvt8o+H7Oe0HQLm6paSZprfzY04eK9guklJZhZ/71SFYuM6p0Zy95LYc857rXMuB8Ia2v +1mjCrd5Ms6B+20KC0yMVCO4vcE7cXEUb7JBaOAB505ZzZ1zvBz0m6jbdDUcThpgmDhofJEcd2snb ++gEidBC5wO9Db1e0pHffs+RCTAxpuOOhLHEHi0lCGUxTNLgfD8Kc2mg8VuDYRXVj13qr/NWhlAef +PiBR3VT7HE/kxvUjlchcybJFV7ln5zlNoowS2d7bg+GCyyOVfPwADzFWPmDdMS2usJIM4g4XrKc2 +RBNBPBJySdsKsP5GeybDSi5oBpVisW5hmigy3aYEIKqJWt1q00bzScJE6yILBi92TKfBRQsIXIPN +PT/tDjdT8OpXdyfQHjc1+SiBUbpI/deKR6NMlvPiNZxywVvpctWgOBVOMWbXjqn0AcbgI1rfJVUf +gQTxCLKQHmlGhwWJEgnWqIsjabXZyvuUS8YiUEVP407tcQx9xImc2JK67ekkTX2+YeKyQLjWzf+N ++vB8k9HiCzI8zTgINokM2XULpflQy+FfLkhoAHgXBAu65k//FgpImERpk5vfm22hsj86+RX3P6br +uyJpQ2n1MHLXQfx7ecP2QSorj0uYHfAkQAU/4a6kbohLKiBVsHkBwBaP52w0MKo6h+L2MuwMHkj9 +7aBcfKuuzyX7nYF+EA6FtNiNVWZeo8CPYJ4TERPOLhbh+wGkWj8GF8+QfMfIcnIKXGtLnBBGx6tU +8i6vQlVyYNhKvMJKj4ih87co/1xJbb9JcozPc0L+4/x8J8Vd7FzcF7TD5/4vMuLBnCu0Wr43T1lb +ipEnLQqjBq5zlYvTTsFplqTnn53cD8ii6iw2/xaGNJVEgmpZALnNjm5LmbO/nibE74Aequd1BJGc +8C3OkJPBI6Et3lEM5XrriiXzPwtS0BFnEMv61exBPkBkTXe4cVRPIBHYjT3IcpIsF9H4VZ2HqoG0 +bsXAarnZepH+yu8DOF5htuk0rpbLpUd1fOAl1HK53/pETTl3dDDk6Ltk5LNoM8YbY7xHdcmqrS+A +uyI0X+96dMT2ZcolgAWjV1jNuge9VVmA2NWWEbMFd8ILLwF3Cja8zA4zBih/0QiezuhF/FKsqpY0 +vU9joxh5BTnf+ebMaB247FCMsZlD+1pw4jTj/qO4IOskY3h/0MAXAuNXls2sx11w98RTNM7BJXoZ +heaMUz2bq1fr5UszhsaQ7BcWyxQdIuKbUxcXZxeGhLZjXsh65nGeu+LfF2ph4Zkxzs9jLQaUcs9O +CebaI7iWeladC69hiQvPbiqqDhEqYaYzAccOK/TN3+/kjv6xVAnqNvQzNExyqUBg6jeOMOtqpWAp +jUUyfj1XZ5WXI2ZbfyCHF83c1ErcVpy0NGW93GWipxRkoEm2h6MSpui8BYBm0NjvbIqjb5nXd+Nr +cww8t+K4RlEq03flNyL7p8qDS8thU2xuUTXgi7VO5oKjV25fNGBXBNc0AKMudBNfi7VXosEgWLBn +37WYnYcl+fmvan4GOPzpLmyUVEl0PxOlVGvj6LdMUOFVFLlzJztzHi7hg3Z4PUOxlENK6qSJZlWY +11JwInFdRPywFdcBKOFR7IkISWcF2nxKvleebZ1wnjSX9JrXp5zhJ7tW28b9XHdjjLXT1xRsXf1F +F6L1onioFX/GuNYAMJiQwNE/sk8R0MRjIgPxfZcRIQLLDjkDqcuS6y1qNOKezUklp4Y3c8SJgnyy +CmQVhtwMqE/DJLXWVM9YKzG+fYT/Qqmi+CEJeKPrFt/ZWrN8kwLDQVkGFnBNwqYlRLgGNNjrKKQg +AMKloE5hTtECDqWRcyI5/gngjCbcOkVWvyqj9Yo0oPULl3dF8vTjNnscJ7QG0tlSsVm2y17GJI2F +HYkSJV2gSal1Rpf9eHepivzxpB+/7q+dB3MlfRsF4vQLNodlVdOP8zxnn5Leb4/DAqd7xRM0MGXD +I7LDv5Lla+JC9xMA2l/PRSo4WH8EnqrWhGCwjKPG/34u+PZ1bXxXyMqOlnQhGuZ5NTJM4MPaGRhb +fRmsIaTxyOZO3UhqG9Qlu7+bSmhu9Ga3v5IH7wbNwLI55UUXr7DqerWR6uTsGoVWIo/2Qm1FOIop +9VLMFSohgAnFlNRCry2F71NKUhUjtRhs0on/zVSDiuOSlBe2wqm7BHsGQc/GKBcmW1qoUHG868jo ++JoRtvCnDgXT2XqQR6BXxwCVnxzaXuLXBUMvfo3OocQ9d2dqj32pr0zNmr9I8rcupkjJWQPtSnV2 +nlFDSa2KHuV917UU43Jc2ZAPirlSxxQcWbOqJsxENxzEBQy1Dg01QVSwOn0kBn+JY2Gvfl5hw20V +6HGAV7kh10GT1WmRqiZvpxoRTDoxGwzL8fcV8HRZIEpkkwlxfmh0RjXmcGDy+LEFLls85at+2XMi +53esHeHgpysJH5PV1aKp4Jm6USHiUMUQb0v2239OX9HlIZc+bips0MQ3CoahR3pU9POkii+c9Tlo ++C626lk/zZFoqmBmcsRAtsWQ/jb0Uv8pEpjyqWeDWFAYT34RhLKIMLO8MaNuV0oxY0pht+/Lfk3Q +bGA0VbJ7+SLqzxUSU995+L5rhnwen5o3a9UOdppyq30JbQEDbyARSLB3Nfeq/b+iKBQrN9Eniwwv +I6Pq3PSF8p+iHwmfXn+YRkdHQ+dRYTVT0IKieN0ojXcIVNyVSMDqlGUWWi8D/SoOvv5Nok0pfEAt +RufWuBvKlPBsnWkLkZG27hErFaKeZc2EyrAxsTJyxqvGtem3Pk+0MC04ppCSZfrvyZLhjVukKR+j +3kLs/M4flFW2HsR7FdmOie5u5VBMU98k04pjO/aDUa2JcFF84Kp3B9ObethX0hMvfroPOP4TfVF5 +EBj43IQUZZ5961tLAMUVE7cRC+xe94MGP5eQaH21u2xz2MeCzSDb8eIBa6eHYu2SnGZ2KjChr16t +Fw5HN1rRGEQn1Fcjidwe3PzZ16y1hza+VwxMAiujS2EYdfYa6bDV7g9hchYRyIhTumGmoX0PP7Pv +ZSHc7nclbSYfDm5e0R3KWh2TXYCcwkUc+iD+PYl6b7KxWl/8RvdDEybXP8lauMhnUP8AKe1Ab3Rk +uVuOUlqbAv4H7e+uP771EHJMyKPNXhvt80yvDvfkjCvLSnD5M1EKexJ35YM3RKRibok97x7SrJAp +cgaBJDE1LeyOBfXu9uNiNJWqAKIvi6jQWLRmYS4aLEOewYf5/e3vSNmWgt79SML8d23Ic+5f5EBZ +546V1WdZC9ShWEXkubh3ArmcHj8869PL29XvspnIrNrjS3XfZl5OmrQRrPS0BlAvd0o5L5dYuT5w +g7ZCFPcUg/bKs6cfy2hLJeIyVH333d/d8mtMhmZU7pD6pxTFul2JO9aQCmHfZNdoMNqkRG/VG9Pu +5jP3sgUUcDs4JAFsU5S6sI4QRsO9dAx07Li5PNfY5wtb8kg1fWVzg435S6hTfwO2Wl5reo78J2GY +rC80xrFD3TacpbuQJ0oYHydeuGfCFZn21NzPqiRHgqTajXro3988quHUEheN9DZgO2TQms3TfbzN +4/pij0L52ncbClbVwcd/xDaQ+JukDeLVMuIyqQUQkZ1PeF2guBuCj5JGkEB1y2WADSlc0pcmHnBH +Nq0IS57KczPRhsxD1duKyl7Ivyn4pcQ5U4Udjxjnk2IQJe9NzEUny+Gk5jCWENn6/Up0f61itGIY +1De4vKulpAWBlBYP5N04L6iyBh4e2rtOl+Zb3C9Vs0UM2kD8Tv3Nabno9P0LNlRhBF940NN0rT1n +8YpIJVoX3jPceW9bkLd8w9noEoI83+Dmh3F8LT3gq3d0mUerNhWnXrypM7G/kJpliZlDSriX87+p +vZpst69lWtgTCj13KkNN6Z6LBYdN74Iao2wgkP+5sRD9lDjeD5b8OXwhM8vVYwzx1rv1kGOvfE2s +3SYv5wgG3L9+qzu+zK8i4URgvgTJ3CPdy5iLzjvKYUkc308Y1ZAN5K/f2WJoyOoHl3wtD12f+RyU +XOvx6ZWitw8CS+41B9Iqm19f9hXJkhuP5DuIFDKRXVL8lKh1Bndkx/GOApCplMK9Ydnxjf7uqkNU +PmDrQDE+3WUEC4PzkiaBA6tnvdEBIMvkEYdrMxxC619p/zAP5fEBGvqs24phgpIHP+zzirXQh+85 +iMo+R89xfAGTwV8AuNDpVoML5GS6nshwlKVBNpTrj21LVXA6AEk8gRui7ZTgYS3MBJJYrYNVkR93 +0t0DuDn9l1Of8Ju7o8rgI/gqJfnoGUxp7MPStp/BjDweEX1GM1IDuD0gbXq2Pgutn9ES4GHWL4k/ +Yq/xrRWRGjaf+v1f/aJgEd5LzAqYu4gf2ex/4+yGTYXrR9fqBMVRp3QUVYmuHN4bRDlG6NVsfxV/ +32PpCpPwy3Hv+G4CtB5SCiYCxx0O6kMR/lWMdlK+d1JcCxz6ycf1mC9vzprY7IidfuOsJukY3q8d +GQoEGVD4wGCm8idUnNLot2GKJr70e8r+VBqB7Rmz2T5PeO/0gvJ5hVMhr79q4YNYrEOtUY1NAbaF +2idy7AKE+5odoq1333vXeP3FkbkTFSkd+Bxhvtv0FZY4wv3BYdR1a5lEqY381aYWTUMkpaukbdk4 +V+XXUUVG+cxzSmEzG15/it4XksU7e3YhVfNwdZ73vA9USBWy287lzufMuWTsyEATlQdS/i5zD9H1 +ED+1fP5pTDPyPMEdxQSEcdNqCgIoSciv8sj7MXYjfGPd3tTm/7JVcIgdcyBGrRIrHvIIMEeECqVL +oz4pAha8I2TKQkvZ1PbEOaw4jtluvvK6QZ+fc3mBqSqo48wXfF+FLLCzck9HE3+//tKMQKbX0v71 +f9tPUcIcOnX+Zn51kH7cDaBBiucYKxhEvaq0aL/BQBWhbV2Dj6+UVPhfeMY7xanUKMHF3v2EYUUi +zTDEx0MuYZ92cNPekF9W1+/wucL7XWVJGpr1zj7nCngtJIbrBkGWSH1Dj6saA1nNToLjGAlFrKoC +uoKoAe+e/BirD8Tjm6p6tlbuffIJOdzuEwgw3fZ30z46jc5EX/eQ9+n8sKXEB+VvO+D64El3ujWM +mL7KvLDj0IoTVfF1dNFHg79N7nKB70Ck6wMYIAuire0pqbtrajBisGubCAodnVB2CAZtL8vlcoqW +51V4J7CezLDXgG2TaZ166pmse9l8zfZr0Q7f6E+ceqN/wsfXl3EP4CQl4mPm9E3+DUH6ls4KD47L +E8Kq2sK0pMfF03I3cvi0rXkHGIjvDYXeGJi24jzFZ1BnKOzj7bhP9ndihltEEMltWVgrUFmWfC2h +XLDwK3tgqa+2PrLrh679x/wL9f/KRCpezaOFUsQA0RQQ2NtbM8RcCHL4k8j5CauLqne7P46OYf2q +OAnNpuL/UBcPCSVGn3d1FWHTx+hjnO3BSFf0/eJM51ZbKTLZsTGByOstQhNy40KzIAsMJwtr22Fc +F0zTyggvbkgtQhTrR9kZNX3IzPmfifja5M78Cj0DFUE4LVL1hcSlAhVra/jnpe9RZxXM3JAIfv1O +jNoM2W1/zmFoAQ1m0s3HVDJKYUfr04pSJPRPqcUluQYk1dD6qgFI2aAaQsCqixN3vBjcHriKJmte +0lhUCboeNq3+f9B0tDnL11Jw/1m+jcUSFzrC5ySRRcBntBJD5PYanSzxJOkz8kCXt1673TVfo7cg +x+urYi61KPq8jKeUAgcd57KCahetR3KWMOeuWAyFtaoJBFk1jHX7vNjosDD+nkh57KujpE1DnOty +qkm3weBjOxoTG/8BYQxKtVg2IppkzRD/+O7E3GdGQCluLZJLDbtiqzIiQisMsDpDY+0WnP8AHPhW +hTjau1/5CURS+Oxq64yv3JWEVNKdt0QvpBwzk59MWNlob8IJRsAkGxOgSlaR+NfbdU/REqUyRSMI +lTZ2Pkgm0BuZ2Aothr2EI4EsC0rGCoazzAKmFlBXeOnObCL5IraNieVomrauxOhoCWaFes4j1aGO +/o3J2VdArWd4OHpBC9CDgGvNj5ms4l2XfMaj4QYiQ//wGqIaTb4MR/b62NnphIRbi5+iJK7grTat +tSgFCswzafgxe5aTiD/wE3qOTxWjWqc/5BJyJRP4xHrRWOo/vPvQZZlYDBz05tTJbqALg9StAgqr +9RYGigNXvJciEIKEyGIwbzexEjKBEaFHmV8irjlspvTAGZIkeT/RasgFBAE0meFTeP1nZHdHvKJM +lxC+D3XNgRaNitUsVCZKLpOUYuznUev3eZJccyhDosLaNLJqJQG50YpDNZC52ZgagLYQOUXSGvi0 +MgG74P8xF8kXGsRjCsdP5jo+sgTxtp5x+RPs0iX81nI2xVs25ivT7AzgyKnDOrlFI5gUAAyxDgAg +aBmdPMCYxiEpaIuOKahzKE0QGRLXCEhJlf0PlkqVh/ktiDJn2LpD4c6PR6TupThaDlvjy4HMn/b+ +4/nagxbd1naTCkN6PdVMH2vvvslHdaYRi7aysRkUyq6W4cX5xcwU0Q4ZhOjMT4E7qQym197VkRsv +y0ibfYk0OO56NmgORRtTTwuey6iBWfRpjOByut2/5cGmlSSIzCE/f+ycxky4V2zFdvpWxWL++b8f +SVmL1P7e2rpcNS/59Faoikw+0wHxhXz+CwlI6pztVJ3mRIrpue7OMfCAb1AOtNLh2xicDybFheZN +jpRMZqH9w+aD4YZn5eGHknl4fXTbuqxUyYz+XErnB1r75SCo0TA7fgLk419LB8oGZn414zvxffui +LycEfnLGc111CKAAvSVUdnnca9sWxxleJ4MyvWFSng5fvltowVMosbRTMAqv1ztE2roLtQ1KsCM7 +29KKePsZa6gPUNt4mFE73bzfEBzbKVpuujy4MtAyC8ihvso0IXO55mhtevIW6aXdtlCd+UlGWLG/ +kjvbLgQZxZE3hyrYHQ8UBXUjAlEOoeEartsh5x57odpPgYr1NWCyc64WJ/y9yJWveUDRyrmN8/2g +dfMyIpXuSMPAAmYgBPPU3dlSh8BWZISdiZvIlG9Vo6qTg+6bn+9h6xVt44M5GOesLPH9J+894RrA +51l1w8trPUVq00uGBkz8g84kqd/suRMwsiMoY7mfvQOZBmHjHPFq6bEHBs7zVO/xObmIGRzZX4G/ +RzO3llXteysqo0N4CtF5yjLjwEMKUpyvx4q+f8yESV1GIdk2hS2Q8tNqJStpYK0ZNVwTjMJLPMEH +rVEY+hvS8fLb+YJ5cViPGhLB2Y8Ub99iJtQdCwA3nUS/qOR/6EjSKPSPPL9WASqvcbzVRY5Nobs0 +k6NVQFB90RxQ1NY+Hxa6US5lw0LUXulqCKRqLmDvnZ/7P90RL8pOhEqlx/1EyHxIxPIn4UzBc7ss +On8IH++WmsvOZoAx7UeeLgVrzztU0uFkGkdYYEhst4S9Qt3bRYG9EnNx0PhYN1SFR+eV5WUSa2Fu +iMaUVIrmhMt0vksRx5u9gisxJHRHpwOMFR7Ezh0TDoZK4M/uOrVIZ0inTEGWqd+aPKgzdZ3A3rol +BEVZfov+xXvaqIPe1kgylEOvTzyIteNGov4uYalurtmRAgiyg5APygTrEVNXD2plgvUSjaVcBgFK +S5hbNBuxRiCH9QmKYtWZmq3DdIF098XiN6oXwwSgbOVaoYJ4IjsAGEkR0B+k/1Kcb9ugEqJHB17U +xrM6zV1YNC5uu4Mh3hL7SSXv7JWH4Brg6y8QvgmYP2XpqYtq56M82DMpW1W5qoCF8uFIBx/vAMTB +s6+pFhzTbhFLLi6XZfletYdJC2/tp+6m96SgXmlSU6z9iJ8Q6CS0VkJVghBQizHX3d+Mi/BfI+JO +V/vim8b9izWeetnl6x8uk3uvnbHhhjwDLUHOdEwDzMIV1jFCI5ivQICX5QceEv+gJfLyOGu6JW+T +kPVu7tS8IYg0O0LU+DRsUdwolA6ImTocuXsbXOB3H0yBeKkzLKVqJqy+naY2tfnxVQjrfWEgCKZm +yrWFEhULyx4pqDkprSeMo+8wg5i4thA5O/67ZiFqnF2yW6kkTCaPOLcsoT5SL8HVaAO5oYbWbsm1 +viQKMP1Nk232bTWnljaSM3BFoopx73i6YrTbY+ndeeFVawVmCbhQVPpa/Ncwu9yXcH5yap1pSoxh +xm0kSadH7U3wUynZ42+wCzjk0tpRxex+QoyzlgPokaFlYLY27Q+y+pc27QvpiFmDKfAO/FW2O08i +feYjwVv/a4Hdfc9+CuOF74mTqH1/rc8LgQjGPyY3SHe3Zpx+NxpkLvH1DQxxodKKB4APot1QYSKa +Nqbesy6Z7TbmlvYKBTkzHqct9XW+E9BRGksVBXBg+dRSnv1sr4PHs7My61lMrt14SxNpuv/4E49h +z8a2KARVTlTMGhkDPVDPhg0GcAti4KQvmqkDgOtXaHlzaFAnnvzGMQLAaN96jhdM3/BB6/QvWwfw +wFWVUFpN+Pg7HLLY9SF69ywINGeBa8c/xH+74viCjjihUdMEfLQxa80bD4/k1pQAdAC1CM00QXvr +k3sEdAjzug+OWYeasZiQlcoyP+tu0ypHYC97AwAxHjOJq3cP9QRdLJlYU3fNtWMbUKqkHflY+Jlt +oa+NXfnRZE9G0QJKMAPI3Juicgd+EZLNeO8LDoXnRwcKBGQW9hSBEAu7B3eRfxt2zcDgLmfLWYyh +i3LlQFAYN9hpwbvy47+VOCEtXMPuZbIds3B8/ugAJ1OD+tCsMcXw3fXfRG7khKS1rpvuunq9jGMc +Linmi/4C6qK//SEUFDe//bmgt1BrRQtUPDNMo6AIT5nuiqWE8Jl2lJTG86+oiwzu+VMAQvXNxYuy +CjIWGLCFgjlFcVL/zavtw8/FQJUSkwqc3XedygYkc7rvfzejLMWjpLhF1hVm3G4NMVd3iY226oth +mqgr/mq7rt6me4nkkJL74tUl5ur2lZltvttci9fhx3UIAnBj8dP2gFWQ0h/6mhk84LaH38D6KR9k +tf+Al8ARORvf9W94FDETusUlrwYTyglSpI4HDEU/SG8So/3PGELNBUO5YfJ4N0kCge9K3kpG1OT6 +KetU1no1V1e1T7HrkiqLWyH+RNWOpzqqKmAn44PN+vARZu/sq7wPaCYxLvTpTS74P0JQzDRgGMgj +vPmluDvVTHEdbI/gulRtpk7+eEZvWbMhHjZVlzYrds14JYk1l3HEgZsKChyv9sZtHt3U7tVSqeLo +NK3qVHVupQsNKSLoOW67416VHPkv07mnXMo8zRCuJSv2ofXnwEEZo+4FT0ooJrwg3N/b5EJUB5jr +dlmc4mFfEqlnvKyBI/iCZPVaII9JPqTlyl1poXEv+ppgy0hEZGdut4ZMbofrTVInRa9pPEfwcMHv +NJJ2riFju8tEfwSlDaU2ZBuBzJXn9ABJ29vZTpSsW1hPuaj/zEqZveVU5zfFY7PDpT/pWaV3XqFY +5XfkoYam/Ll5ugLf2JJdwo6du+j0pNHfbvjzysd/c4JBOppBxDYsfZVDlGFZbw1eMSDXT849BmFp +8oK3NDXVL5X3Q3jL4k18J04Bzz3vZKXw9gWf+lQx4/U8COgARuHlve0WGlhpAY6y+nP/hIXxgWYC +F4hicBa69F1f6I1n8q0ToT23pHTRE5TOJoFlQTzDMtuj/ttZvRGIpAzyzK3obq7ODK/Tg6KyrH4h +IYv1UdT+9eQS4Q76jjt+Cdjj4X+2n3C24MzjsA9NT6SCymA+HKPwEqB9ctkECQKPSS0CE98VLe34 +wQCxxvRudEAVJFsy7nadXsjGf5qGparf91HzMDrcllr0KtLbkLL9b4dyicTKCLic6T0k5aOniRux +x5KWBeDdha+BlSCnHSoEHB6sucGTEgpPdpgSn5ivel/8tc/ej61lExUhlotJkQZOmy9HTyoA6t9d +hnZ8tGkyB07Wx1XQIp1fqVcCRt8wfcHCP5d4D8bnO1iKBu0em4RTkuVs50490poFJYu4sxT/3hXJ +//kUEb/hl9NqWef3mwiPdP5gg5R5qBIZOri/IGJ0/6UVXS3sxngoIT+Lo/wxW6IEuuyfzld4RMt/ +x6zVO/W0sLxefNpDrYJHl+9IST/HZ71pPQqlbMLNEwQY1XyISfB5kLidliCckeMDym4vzZFTDM3y +HDoQsDWKAmGFdSkuY1mSdaVyutmnpGCv9ruoWW+lYtDnvHodKKDGiAzU1wZmL4gfKZVCxEP7Qsho +FU2bL7lMgOAbYT4Bed/sVkSwa3Z93pE9v3FWarL5M4uJUZOIZY26JoIQdb4VDg261VlpgNylx6Al +QY8xabF47fmGb4gByoTPJWWesUHbCfXv2kXejCxY0zPWwDxIlQ8auQLouRucbhOPmNzSkm0vE4ss +3yRhe2GujaH6Z5L261M0+4cg9shAIUDPnF88MowGcU4Gk/h60u0lqVNlrBfPXZd9OWCxE7u1VmuV +4hxJhpKtMOfGw036lYJDCghb8HBMUKApnl7qymHaEd42mdTSz4loO2hM52Q1VcWf7AgNPH1JiykO +5ycbFg3I6Q85NJMzJLHBTOrdS8ZAahMYPCLKF4OqC9rDoCvG3OtOy4t/4ZEbU2zB+wh45sysnnyG +jTRSvVGlZEYwc5KiN7Wvs1UiQ8WmSzUWNgOUW76og7ogCfN1lPo0R/QcqVK8qVnK0YHGlCXR5UB/ +Xd0C9h36XVrIWcsnJTUw2P/R5EaN74/wfFz2A/ptPVqsjMkmwYwCQ8BeDi95Yo9RpdzBJY3oKwj8 +zgRQOjbSxLeI5WWKUMox4Uffk44O11N7ZrNArthh0fmD/BnCQ7I82MOU3uvkZ4im9y5ToBzxneRH +rnkVo8EASki0qWU/Z1hzmAWrih0oDxRWNZnESX3W5b5Rn4q7nNf+tUW8w1DGqoOzADAGQyIV8DH/ +03QwsOTWFGc5zQdmGMiP73xZIGxRlleoz+Btfi6q7YAeX3KIZ6UV103qAgJkjKFA9EyvOiw58R42 +u3G7FpjeGQmT7yxDuJU5Ybf8v8ex2bedVsJDTfdTWCLay8lZbLv4Cr5fr4+KTY5mNpNYVxctq/Sn +j+6MzomlrGEaKBJoW8V2UxZm8klG12w+enJT0jLOJkJHUgcRRglS51lLlkEdhDSuVo1PGc6XFlrI +aYFbfIRtNjaFfqV/aQQH7jzXht86OodD57e22u6epn/4xmhEjPbIyxsxsWX2LvrCgJLPIMl5oy3e +q3xBDjwdP9Jow6IPszuESQsj0iBMD4mZMx4RDm5xYkq2S8cTFAqFTf68s3YZu8jhbTpbvgoSN2X2 +m4yDE4e9fr4ILa6f4nGNKIwE8FbEOcljTuyxj+S9ckpF4CO1yfyaAtbeI4H+1fBYbLMaF50yGP0D +Bp+4aKh+csmxhcdtoO2IHhNHC0Zfw1IuK+oriW1P0TRIP9rLAeOFSfD5+ZSJkWrHHOiH/2h6E4o1 ++IuNJrHFH5zQa23cEJx8tnIzDdqiNjJ39JECV30DXKPWPXI7jBCn3Ae0H2MZ9cNVTkvFKci5XFD4 +ivvhQyuEZjWrs7o/YZmgz44rVBxI8vZceg7CB2QY65t+rexGscVqXhf5BrWZvqU3xWkAALCgqW5K +Ye3TyXMM28KwwT57+Pg9O7jcyxkxAcGVrtjxkiBSODhz6wjvFvzenHCYE1R9ilVF0W2/78m8B+g7 +d46A58StyDsXXP7kQjaJjr455TisDZYB0GRU5WOHBagojcoDpKXocDD4vDfGK7obHO2qnjtHUDNw +62n+Bzn0wnY4dl+S4WyE87LpNqz3urFDM96ocmbxom8p5fMr+QCd+//kBN4fsvMtp+tUQ/qWXc2M +UA3q2fdSpC4XohAzbTuVhuqWtF9wrmx2q+H/wFV3s6TTdQbYtLBSe9GsvGtab1vyiN9XUuDv4Rw8 +e1z0AsIcClN5/iCeyev2daiwdQDpLimZgC+LDqAbEgqeL8Z9KzWNn8CgDUUkjA5n2R3V2IeUrCry +m0OmV70Ws8e250LtVF5oygU7sNg7/IzRbpQJAuo/fUfYb6ez+OQPYWj3ivq2bOYXg6hAngHJMQ1U +lTiXCUn4q2aL9j0IKmpMyvfYMepXVDxitwIWZ8JDKw3y4PJrhyCIJ0HJbgJKbPHIZvv8ZjheOiJS +X5RB2XF9IdSHi175XFwMRQcE8v1WPEDdIf6BdNI2xIVW2rvM5Ce7Miq0BjK/1SVDoh6bO8GlkNby +ZEz/a0S/bFy2jJ7UxyVcQxR2duWwexjWMtGhJWkYRMbH17Yl6BMDyuIdvrOXkuK8DzHDzqf63omO +WBLeZnUbpMc4bfxD2RShHfrIDJDI412P49YTEE01AVkGRaR+TPxHCIjECesORtKsEso50yHpuWOl +dlEaimgilX35ich6QbzaFELTmF2igBsXU3OZlzH0GepdxBC8qeihZCvxxZ4DABqLo881hItO/omb +pA/H1Rls49HZ/4m66xSXpjlNRMLOrVcyf/xOzfsP9iVrk2NrXD8rcrSgUlHwKt5cqUf38FY9m82m +6bERkEMAItHTvMHSR+a4jyklI4WLaHXWWOrY5NHlyQfwyNdl6ihpxWGT+lFbnFqG+VuRHHn0U8nj +cO4LAIBMgl5EA4dVgfxVPcVtLmhOzPsSIg6C+IEUt/nc5pa5MiiOMF4LhZ9+umBw/03xKWDlw9Hh +nLOR5jjUSpYupCI3oxRpSP6Lj7VQRZJTF3A1qWo1Y27WSCZRV6KcI+pfmHOUpCR9EIsP5AhpsL2X +a85VtCT0Utp3ktv7JMLEHsWdZLZhkYEcunPSbt2j0Apf8Wv57Y+sJsF2zVdvsiD5cs/CjSfG39kH +T8Td7T3bloUsc1SNlqwSqhU30AlhVQYrKP48sQssZOaHwjWQdmWeoFgOzTR6YBbradaD4GIDJ4CM +99FkzJXkcJT2mlKWr0B1GfUD4WSBp7bfxbCX1XPOEBMHI5MenBSKDXlJ0RhCjAuojIjKB79SFwPS +BFmkiWdS6t2+yyLImlC5rN9hfgqvvD6NhCY/jMnw0sC05v/GZNIGATn2hmYmtI5z3v/bg2IrqHBy +kUU4pbLoPRDffENIQoYPHAVma9a43UUWiAe4eOPwnzEhCjRaet4dBtB0y51m4gLbTX0JOorTaksY +KRWxUFvshVbFkoKw6Gkt6fdKO1Un9FTPiVekg2D39aI3FwIWolF3RnhV0iUwH9FLxuQLtPAYiP0M +DH72wqZGXwu0Ixuj5DgogbCrjAHirrUjr2LlfGcXnnfXn3Mop+J0K29vUqIoIs8lkAVFJCag/aKj +ReZlkGqvyxFL1ULwgdziG7VdygNIxzde7nuz4+jQlLYmAXY+MeRaolUSr8SkQV4z6SecPCgkOg/t +5Y8gpsELPJiHSVueb9yByIUzF5pB28cXrrKmRJPNxvvNtlS3MP3LM969+zpixiAdDje/FD2KP4y2 +QdnMWgkDEiWseXf68COYlyGBIJe4Fj6uvwYyzK92jOj4qLKCOAZ4hswK1k150liNFQmJrq5RUqYD +aPDX+SQior4Do+ecwzRRJ64u2qvHkkNzCvC8Im2uQN2wt/UvSj1+4RI5gYr79HOglKylwzgcvXR0 +/o7EKx42zocA2jXRkcYTs2EOecF8zbfqLvvJzfBlc4Eob5aOrq6XcRYPODsEQPJLihv2juKwNxwO +ZVXWv+i8V/vHkFD8DWs/ROa2KckT4cCGSoAU6QmAisVnYHPiTDvSyQ5hJi7F7fAVWjqq1F2RJrBF +GxkN0X/gAgSm3U3dqgFoAcYDggehnMRxZnADylG6BggPsgBfvvEc2Hzxyw0L1PX2g23UBg7bOPFv +4w30kM5NuZXxsGrmN5SSfxSQltwOxGmVzYAavQowUu2FovfMR8SI1WaCMZ2GlCT/qEh6s8yveYd+ +X8J9Rot6gkofxQlCHo/X2tw3x1vJhbIK/uL2kPB9YCaqpVzcy4pTUMo9CnQ7BSSpdRw1MIaoWrRc +dCkAtwMM5PsEDcQZaVgk7wr1QmePkYxiPaAIxVTOpGk2ysttxEXbE7u/H0Y9vcEqyqYXdAYHmK0b +X68sdg/4paLcTXcbpjlvWSk/IIhWt/E/3mr8vicg/cYhN7ZlWfy36ZPqwekdzYKeWPOJXH91VkGg +NKps7EdfHsbkIY5PfeHww2A+zVY9GkzuBvpstyYo1uBIG1fqPwGXGU4BwyPy25vipbAHVTbQ8oWP +nFrPQr9kXRvubY9UxYaFhYAdvg1di7TqCFUKGEOiixMR934slDk93m0UUGtvQB8y2JfTVUmKEiIN +earX8lvs0y0pzccsx9T0aV3n/emx6L0l3v24R7Bf2kKtsUajvC/szgCVRp5xnCrkXzuQ0nR3Eyvy +5RzwVbdorob/0GsNpBAZ+SsyiGXv5nkVoJsCAnNM4X44AHQhgOO2BAIpXnKTFF1Bv0XsfRmwhtcp +HWxRs3TySaF40B0JMHuql5DPXYRj6c/iPWEm/ZMQnMWpjpw04Ggjqly3mVySuWIqiA+ypozC9fGA +OsDJiAXg+LeoiLuENZ1D2aZ3iVscjiVGFc3icJYmm89kcm0ONBCEsU2Yf1IjkVVA+XkgFYDJoXQ9 +K0cm8fFqIF1KlEwsGdxawrJsxcI+QPEhXCCYY/WXr5YILcHEc9rtmkuX5oZ/bZru0MnoXZ/r7G+x +q3lEwiiAnt5xaYOOwnzLsPrKTMtnuplDA0KhWK+ZFdZXSsSIxxBloYjiep0m5jhIt51oaq43riDM +3qZzkNacV+WLKH2AHkwqP4StEQyn+037HvUtDyEVlPEWR0SyLrENxHr+1Ec90DJCXmb7I7rOvQfM +OP0p3332Xukxja9jz54rrr53Md6i5oFEU8c+RZj5kcAMKHLGuCpcLl6P1ZqY0SZPC9eBpXWEPSet +KJZpPBMZz6kwEpd+/hhPt7EegouZcOVayqizZBzMscCFe2PLaUA4sdLNLY4+z1gBy5eAitWyRgQS +8DNnu3rX/EcJ29i1H4NJX/C0ks4jZ+I1XG404+jAWh+H+lQ6W/85FniZVwUxN4xwXpJK8XlbgNaU +XUW16lDj1r+6HR3pXo42f2U7WQ+Gpo3oT6QQwqRTxwjApQTjwL2gysoIMZevDuwcpVdrNCiBdHsJ +JbcZRXa/BAQaMr4K/py9Q8Tqk5+dz561MtYxEJ2ahbheNwh/gOjtdOhI6TgpMfsrjuP8YW+lYwjs +l2g50wC1xrLNEOn0f74xYATyonCR93vRnrlSD9+cZ7UHpJtNn0LpUt5aelDlBjWObp1yQmLng2HU +oyN/htzzZMapNe8bX0xvFSIciLv8nsaBzTw/kwZ6zc4irCEijhLFqlu7LzHHxShkYt+dtafQhKiS +kf3+QEAdSR/f1azxAEvNiXv4uUAUptnI9RtRqI8zzx7kczL82D+wfy6MOYKpsvwZpjXIYquBhzwW +Fi0QFodZEt/sY72LA1ShkW0LBIVDnttzJvl3+rRzwFMhMazQy1j/4kmIjIigqgwxXAF5gVosBiKn +GmHsIbx+q4qnbixe01tpXq/inHy86wsxlOH/J1W8PExhlWHKUms/FqscK+AkQEj8W81nf2iK2OVY +n4Daa6+FcBsIEi8tACD8s5v64/CjyxpPWgu09zkhCIr8S4VESf/aUYQYQ9VALG3Tq1ksl9LBWzBU +TFzxo2wgwSl2bOM+TwLxMW56WaPDHHqthFXmuBjMcY3YY285GjavpLi0ixI7xepZ2TD3uDigpvqN +ENBL1MM9+1cfTJa9WycdudQ01uEddqfKU54kWiq0U1zL167DAMbozxTf0efW0c2yWJBxexIqXZ+o +U2/KbizYg37iKYghcKe00sB8YANQ76x2aoUPYergHZbEp5EvBOqA/K8f9WoHe/levBxkRQbozoce +FYXgG5+2UddVAGhdWf5xZxQ/FgoLlLm36Tx3uPsP+Lxq6a1G+jBDI1iTbaS9SqPXbdVnrkJxgj12 +1FQr6OxRkb1dJ6yhwAqUCGAqYKWqzpTCcBPbuGLNF1C7CnwUqF+2woSbEdMbz2JFTeAMXrNjt1LK +X18qWXtL9AdaedQIbYxPHcLix4f/x3Yt1RSfyFr2SuLKx2+FJalNArzRHQT1GreKtAbO09kpfDEc +eyj5XEQQmAH3HIcXgRJmrBqY+v/SUB6rTsp1xRnwTBTPlN1GOCGvYmygcWzPIDEXAyesB9RCdnWD +glB3cwn2XS+9A4/Z2wLVtZYho2661dLtTFHTw2gShXQV3qmV7I6/KnznDMIisIyRW6t885clH1k3 +FFS9eQVEcuS523L31qAPYIWe9w+X52VKpDLFk4hl5V2ffyn5OMrR6USGPczL+IgJqMV9jHmV5G/Y +WC6P/3RK2T5rR9V9ho8JCDodt107Q1Ihny/GkmvG1UO6IC6uO1ejIRCe+5laKqWcMS7JpfyIL00/ +QdIm4eeNSp26XRHIcinxp12o8qAf/ENuv/WY10xF+CF+EhNWJZktJcBs422j4M8GWLs/UOCiisLx +n19QlO/NBPkHpZtAwyCWYDEa0CBxmgqUMnLoYD8yj21CvwYEAoU5sXKxF1K2jA2aLlj7LKlYDYn+ +BD4/fwcqKAIlIX+YGblE1NE+NDE+tWpsY9f8lL8G+fq3BOUK/rKamzFVUTd6iWsJ0vzxeVwwJRzp +KHBSUTwAVBAYt3nLtLaIGbZEy+ROSwzVTgpIdxg9LfQA6P7+7C8ejmp1YKm3QE7yKwOBoM44B4yT +sE6nDlxl35/cS3S9XZtAH0HfRYUKyoBMHmfhAfQNbNoLHO2bp/bai/bDrzfOE3SW4mSCV75JOavj +/bars4dmi+AEPHPR90tyOSg0VOCy7vrlJInybRFDiWg4qTvyRqeASQOmZ5XtETpgDnfUi9PEQrFZ +6ShplCtpYnNjaE3RTmuFHgZnPmhODQu58dvsU+/6dz56fUk7ntYYlBl3e6hRVvClC9vhvnzNDyaO +S2J8QVa235eL/o78fqDCu82rAYD6jQaHua+xZ6tHS6lJR4uugNTBF+io4usZNE5TNBQ6a9okT/jp +hc4vft94sH8N+G+AehBFmrKFXjoG2ktKVE4JE9lBWege/Sk5etY+1TAlXJMfXvjua5JXFFb9UHKr +1L0Fr4I4KBxY4Yu6nZCprf3aYR/5Bs6fZSqIHqCtXj2sZPLpbji6v2hAYM/4eA8v8bjv580qO7wD +/Xe6iq+Yd2m62sUqiW7+Pvn9H3gAVJSwGDM2ZGc855gBDaltBms90ZqxhrQo4ROyYEJ4MPbAWT2A +KQdUYAiG5Qnw1M2tyOVgUC0Lqk3q1wQKp8JBoHoa8dGtxFcVIxPxR4TvmxS4udXrZH4xW6P0zJ8u +lLiG6NZiAD3vNCjRQreEl8Cv3XIrBHWCDDPmR6lNUQ13QRbHz3oWoNQVNbiyd7eFh4+mdLr3MJuf +wS8EbaSbPWQv84OaNe45plj4wZfu4AF23+jkzJsscpPo71SwxXhZDENohRbEFisu8h7St3PiTAHV +9UtmOVQpGCrmg3tFc3Tn76puF+s+f1ULjphTVU2IC5I3XOmj0In+nLszXjLyqzmrUSGOPBiB1fS0 +MjFxSSXSs5e6ilSz1qjWCih228NTxvvCFuHE58dWch8EMEjoVV0MQM88MKVYJqNnHOE7xaE+P6Z8 +RFkpTyiP0gKFQAPD3uSF7JIJSEt+uKedza/kDB+BjUgqsgGv3L8zf1IqGi/iJnMx7b6o7SqUq8xT +5ZbJ63r7WGMsrJlHF6ZySaZdYFdZknhMr53CRUC5FhGxvi1rNz308SXuqZ8ZPWpKCZyj8SywfbXl +XUiqT16tmx6IsIsCpBLvBaKxBBHk+IoRCO4r9bHyCsy9rf6m74EzAe4750ekL+xmzDyXYHZXpe2s +vmM7ZAyTmssII7/ZQTXo/rdrJ7Q680HnlMFG3FpuxB5f7EeLgYcT9tOitTDs6xQxLq8A1gLtimK0 +1WytZDgauOAO11++92v0A0p+qA+2cvO8PKCsB79udOvI9f7GGe3efiiXUDau7nbcgS/6EOXY+mmI +BsXbASmcSnee38dZD4Bb0QIJuzDKxQ5PelUMMP8fqL0KpEdmIcqj/zeZE2pJM2spUY+oaD0DajO+ +RrrR8UXzARSJaOEVNUzhRx0yWZ5pj1PQGvcyZXykSx3LY51bqWUhFkt5KYbSCyh8130Lqt5a2acI +fFMcwOJ8hmRr2FAp/OBm79fig3RRjHf/9ORI4UqLWrRhLpmKX2hroCcpMhEUVu/V/d404x/o3sgA +0r8kY8X9jxQmIE5mnZ4pP0Q5e6GFrG2fiG9u1WwY+TtE0YzNkJga0E9xRzo7OFKz0OEHZydnscde +Dy96xirvLnQtOHZEEPNOijT6uW+seJYWMPNw/hIShdIZpQYHO3gMKLJHiPlWUqXOXHs1QMhNPkoO +rJk2RrZtz0zv+rLEBrXjhYPphdWxKpSOkJTrTcNbi9otR2nWXl/HKvZ3eE8zCIIM+7K5tK2XxDCm +5KjQoUYucg2JYvqO22SYNzo72rRxZpBSON8R6yLSzAcu+6B7W1Vd57wYHhWc5DRwULC0pkoYZme4 +wdEmqKHGoZhIao8uO2gxOjlotSAO0QSzzTBM6yblMdZLKeZaPA4eqAl8cZ9vfvT4NHRjMQZV64Ya +JLE9GIW7BAEnhX42Dd8wyt9PF10aNzOPO0+NdfhFj/BzimMKaZ6Sp6j+z54hirSeULnUC1deEosz +Nf+hlONvFnFOqFMi7xoRdHStPlOfuSA2jRPXnSG18ADIfC3sMCD23QOjlTtQ22dwj0NfVvn/xIZ6 +2dO8Far0W3W/Idd4b5a3kX1uAB3ePSp4OZn4ZbIrOu9l/TSNcV3pubDjryoX/fdOrDwvbH0NCrxY +EbLQiT8kgwf3KPSS/bDtGcygBSg8HTyhwQ8C4+YuzGNpBrqT57/gHJxUzdJvmLqXMSES+DkLXxIO +DNDC4TLjUtOKN1lN6x71OWVdY5ZK/49ml6PRuym/9z8JIFB/yUR4pn7b//gYvB8Ma1hIHMuMVd4a +0g6YntqScKuMfl1KP1+NqPm8e6misKUXx8v0Gd1V0joBYp4Fj7GgRc3RM5sZacZxrfzTDAGFzFeS +pkdh7Glr7HXqyJUrq6ehbJx8SiTTZDxNYoH8OYC9XLuLNdsJgfB2jmnH3OBBibfl+XFain8646QE +1k4mOzTMg8w9GjN2/As9QzFkWU5Ww9KTQ67/eA/XIsB/TmCtEwSt3H7PDZ9WD9LRJ4gcet1Hv0WC +FHO4ZNvrmzARsY9Unh9Wh3owjqtVqnmoCeUt547HtUOxlZhlBGOFbjvLiQyz0GXuJ7vbeKnDrJZL +ZgMkO13RQuMl9YiYL1WDHTAQGctW3SiEgxMM6WJwFG/ybGnPNL1gEPzuYqNgFdPitlLgtPxw9LHF +LKvxhtOWlIFfY87ouQsadV3s2ieV2muHzeh13pTpGOJ0G4wTh1UokmYqNQdZCBJJ885MrOSL3bj6 +nhDnZ/2vd96lqtd9eB6LC5P4eZie5Ic5KPs47G46M9Yw3nMgNUBpXOAQjkhMdi72xcs/vSXddhPd +Jdmxjy89JMYP1zYc7pmJyOVtULXTAatzd2PlyDtbd8tF8dDo9LHaxkafBvsamQ/zif1W6WcyG7fw +GZ6JMP2yTmPDR/sO9ViE3YrXP2ERvm8fkI6Y+P+Phj6crUcolzgNexwRrRU2eqWfJZxeOG/U016X +AsRpmUXAdnQa2TsrZAF2GsqXvci34/JKN65UYIVZcIjlFuh4pwfcUUfh+1nBLF2UNwiBxKiNw5oa +lYD9JF3UGbgLXmXGe7zBVDUPmaNa9EcZslWC4dph+DOYla/GIFnQ0HP20wSmNc1GGgcSaT/c0otf +aNNHwGtGyE/tiuMkanCjlmq5kG0YQ5bduW0klLc7OdKsEcDY8Kfbc9ELMGobqbuocXDWru62A2bt +IrCwfsxqNArOTu0AtSp2h1eEg3/LaxkCrt+w0b+YcnzBlNmlLE6ZaiwWTeLA4MgcQIOioxJNkuhs +dCBag9Kp4+QpU7TjSg4FduqUxiO0u28/Eqq8WaB6ZaGJtKoVbjLu9RDWSwMe7QxbJeOyr9Ke5IpP +GvwzKu+58NBiOCOqnYJSGqMhW0VnjxSpjnv5tqMHebsifvFrJIaLZo5kQ+Mdr7O/5/e1nF5/ZaDk +nvFHIiG1MYaD9O06MnCTjiMPm9c4Mqo5SeEqjvSsAFSwaqavPgepWghP4VLHMNWSEVMltT6JDRk6 +S1GohCtU1vYPLSX2SjXzyZOjtW1hAnzeGafB0wUrECMxpEeSog5+CGoSEAydP4RfrO+7wVXL5vLc +ZZ8b18Cr5AYb/i05NrSqVjMEZ4ENMWu4OJli9eMYidTCbA9MatGZS0M58h4tKiWasj5gZWToadO3 +89RpChwuP/3TOrUkTiUHjdJgNlisgJTOFbDfDhwwkPF7je5ClrLcESt6PSUtXyDylAFUf2hUEFdc +LLub0lWx9O/3Vp0oi8WfRG3yi6IK0+O3ep/uQAKcPt64g1RMZfi848nrAtlEHzjeXDScuUBo6Bkp +xo7EFeFJhJvhhbaTGBkXov654HfwJnpsUikX9ysJORQqHlpdjgTqG+RFc+Jbv2N+3N7Tfapn/tzI +OEDMTbkcmRAJ+X8DX7M2Vx4wDLFvkn0Jd0WzdOMuiuXkyuezakHBsiBfcZr84qzMNn6oXhy27XJN +LYnZOAW/kGzBfFwkpzsNMvqwdjKo9EmvHnnJYGVCwA9rOY8G1bM48qLiXQ7Ntak+hyxO7dE4NtSi +N/O+zzZnwhtbMhtPIvNUvoHmWy8DWh//IEoM4RdTNWtiqzcI5ryzw+xJIEl9HxNGpQfzz/Eqeuk5 +V2YOVMPkFIpI0wsQZnVj6byqFrtF50Rx7CqFfU0iYWJZV1bApHOjnbrQsZAvD28THNQHqN7M5iM/ +jZUk3FDonnk9Q7pMHtEVaZxtzZDGcSW5+T+/AdBG/4nUsWvLtwc7USY8X4vYLOh6TLtBss2o/MFA +5VtaWHjgIDjZAsDvcNQneqxto03RJjDGJnNtAueSqhAv+Smm6UAixkFtR/MYh4ZEdVeDYJz1VKs2 +pYHtNUjK5V7T+91uo7pTUmsBi97Q4Lr7oVgYuX32Tx4M//pVhwJu73JwTDKjQIsPLDWBi4Yo2FY/ +hbhxO7pLbgPgydQxCzjj9CRwPloUGvoE/+0WGs449u+AsF3eqrkAdbemP+ZcAi8qKb+vlU9XNqSu +nSsZxmno4EM1ospy7FfZnzwfDUOtwxxnPzhmlbPjlRfalIpVER4Tlj9gqUPx/V1FPdn3ac9ggZ/r +xSyrB/Aqh0RyH7T1AXR8RtRt4vUtQOGZNCTdB5bcc0onn9/fCQ90kYnxXfgy83gOdB1+PwwfOsjQ +XUv1BFsoANQpf7/25y4MxMRvMnjIEKnKcaJ/TnUpmBM3macMLqgyVdxSJ5FrN/9r5UCYkXI+eTce +T4/5wJJq9KSOIqqy0vocgNB0cYCTiJAofjsmCinz4gauL8gwKgRd34pe12ZXRPLfrKjs3y6NmfHV +l+kARQ5Dms25jpvmG/g5MQ1sf+71DmdXCCLrIdzx8Hyjzkbx0cxhY7a9tw8NS5zrS1iJ1APfMBJk +AmRxY1RuoYL2liw7qBD1LKpTwhK9el1nqv/RQijz8PisMiYuCPtZBupo5+rgx3FfYJaWqrFqgL+K +iCSSwie0OYN4AbUxBOahM4uvquNBnX7pEKI6EBlhWWWNaGL6NMvzYQtluVTJ5A4eWaJC98hvmXf+ +uV5X7H4Wan5j8+ceY2H6ix1Khw5aeILqrZN9iFu3hzaxM+nvnJFMFgaIf/S47KwGV0nacUr7BqYH +Wv8Wn6uuJ72UO1P/OUxwf242NoQqQmtsSJuIIDomS2Jxq0xZn4liK+eYVP8zPoPCRyZttEUEVTiu +Y4SyvlmPF88/p8RantT61mUm93YkBL0ZdWnCaiHXv6jWkXCUxeJJcVrCv7jbFnjkCIFrq9+mqnau +GWLssrbpE241zk0Qj5e4fox+DL0h1RVMNWkGFYXLYPPNF0+haP/UcZq7uIePGwT6AEmr3eV1AL8b +FcX5xs51qmvVaMGdKcU+JuRy5m0cgO9YRSSu0MtyxOwGGLgA5rBu4LTkgDT5xanfqhyowhfZE2DN +V0G3RrHiEo8v/EoMsgULySYVetfB7xHAegk2PEbEANhjQP2JlTXGUYxVUBHWzh3CoiHDDfAWFhQP +cMBWOC13KbnqQiktfmq/4cdWwHO4SyXX68U5ixc63R2Ok4DK9sHOaHkEGxRSTXOyw7/S1JOwxwAt +OHezDC96fcN7QqvkPC+Rk0uYxes4kn/8FW+iGD59Y68SMqfPpmji3Lv5kfsIKNmA/1KFEEOBnzdm +kXIw9/QvqbCFmlwYhVg+isjtnAO5vBxe3fEKTSACMlplQUq5olMlXRuzcrC8o3vlj7tKtXLx5oEA +NUnFLtLFZGYWWQ38dpEb2ho8uZxh2Qt9F1wfFlqR8Rg+K13MbLyYxmXvMFdZC+7O01fouvctxreK +MHDXPPxw0BGqadkgvrz0Y1GwJYfrT0OdWNrTj8Y6AFeg83gW6sK3IRn9lqXlqN3DVl0srzuaxBSs +lV7ZCKdezCFP/0Xu8nYEVE7uYmvdos5pu9rnvL+RGH2GoRHkTY1DckFCYcAw228c0Z45FjIHTAj6 +UgU7/vg1pykwcWq0x7PjmhlWJo3y/8ftZHMIEJBXXCwzg8YQ/r/WIXJz7FN5Fby3tuzryuBBaPpP +uwExziNs3wKWeJhwZLWkGdAJzQJkw/XIEQ0vF3xwv1xEFIKl1dK1JqrbBXO31KdYVX0MUT6mzS4B +1Hml4kWkk0IUMM4kGafBqgzjFCX0jUW3eC242DyPuKTqFh7nLKTSOE4mkjnqejAJ+fLM+oVfJCRy +z5xBbJSFSNVQ5Wck2BrxJonHWm72o+cMB+3PgW2mrPWllQQm00yROhK65dXQF1r9e1OatRxNOHaQ +nT/LRZr2sqIn+tFs7GIcfbJL/9SruIJmg0X57TMh9/3JchfAI0dQo04BZc2N04D1fNnnArRqh9ZP +uKoXS1g16TepQeF7VUX6A2jRiijc/Ci8iIvbG2G0NeVwFwB6hRjblgKPfuMzhGGOSdibOiWm01rS +M1ryETzPZ7UbJiae20fEC1muWIGUcbha0xbo290g8l/MVuaD+MWqibFTVqgq3vaTaXZohOaf2+AC +iu19a7kGWDXRtB/nxPA5N1vSVhevgEacQTR1dk+DTK4zSTnS6W+srA+hIkqbtSCnmSj8bh9cBd6S +w9ZuVKmvCyaw8HbcmmwAUEaXDQ5v086bYgRPNDYACuZLsw/f71Iy5JPLvdL8cx3yUd+sFpP5lDhj +T9ycfLlWp3fF5aSa9mtIRnmlsBcHvdLIP9L4R4VPohdZGf5EtwFE36RQ0Ptk7BzA0LhA83ScO1id +n4pKVgns0k14cypwLJ7aOAoE09DchkUtmGCM5T7Nl8XyS7vFp6tQgkaAF+r9krQ7UOJncVYHTiml +JBbzbrjPVR7MgY9MiY/K03G6u1TC2YEtIpAGvlPl43AKBQXxYXsGO8MsaMHTKjoSc+cgEXIktrND +oGswKMI5wqj04fETQ0k798cu4AtiqDnyamVc5gwOwtfLnL0i+ES/jXFiS/Hl5JKl0IjpzSkQ86Hn +k0GL4CNGUoW35pPxiKYNQQ+pVH/QQS5BpqGXVVxjHkxgAAOgAEQWUbYDEK39T51Id89tK2CY9eiN ++62iGqhdpl0FasR/uUOuH3xpmDBZigbT0VrQJKVYGqn2BMd91bofxetxHzmrtL2DCHN54Szd1K3j +TxiCnkSZQlsA7hjctegeHWrzjHB9kZaO7knmIeOE4+2VTw2CxD/vxsCaK9H5fFcye6WDv3lOLoNt +rF5gzzptrR2dvcbURjbZEteoeAvOKaXw8EzWtiwxzgCuLor+1HhvoJImajZSV1LduXFv22VddfyD +E686KnugBz77FiRW60A0fRp0NCAOBsqQ9J1NnbsX+uPe32QAd13WThZuCTBYJ8/5l4xYXVnlY/KA +QAJ0gMHwGuIvSq5H2i5J5setwJL3klokzdvSdzlnFf9kyFAqrLGwA1VeYqgqB/K9H9UHBGkP8Pe2 +IOK0wcim/vsTNdkwhJkNf760nVXFC7nJyDh34bqfO1OyvUvy5LA2IQ7RmjwxtLNRCGSWD6jl0SwN +yJWeI9sX3oVoWju0pVv6hzfQC+RQvYQer9Y2s8J3aoweKC9oxrDvTKJuVWX98GmkMy54hmpNetBD +IMRsThT5vHREHBq1IbgDViKaJ8s8o5Eklj+e4AKr1sQ6u9BuwT7ttG0aW5WSlJtyW92i6a4k6juQ +OX6ZpkGOyDwmhHYCVgUO6atIEOfjXHwzlmDmwZYsgIseq3wfdyRiBLyavLOv4BFUVr6eOPG0u5Wn +0AHXPRIPAg1v+KnkQDmGRY62lh6oF7ertt68kzYeBP3cnqiRZWfB6+yVa7DerofexNKRGWj/JZE0 +OdO4VcAwgJLtYvdRobZ/J05B3d1YjDeZvwccw5DIqNrYaJygbPwOfdgWd9ABJiuJ4FXucXx6f0rY +YxFLbFzG1conqA6Kr6t6VdabBtbiDCk2TFi/+1J9IQaSRNjkowbXfJQYmmHc/5cXKjB/b7gq0vg2 +le5I5LHQl4vOFlSNIZf9B77+S5GLdZkDNreN2XUkwCuacBe15Ccfii3Npk6RLIF+/toKezPm9b8U +qvNZpVZXyCcwbyFTdZ+fkW+3uoz9akxxvZjnG9KTA2lYvihaPrTonclw5PPUJE8rme++hDdfaWzb +EjP0/kI+06w9fjo0u1nJCV0asSXLOLvKu3zaEFIujNza/7ex7JLlyMgCcDcc36Bv/qq2tADXJJus +UeSvDIwiqX1/DYYORc3I753+X+iDhEKp9T++9oSQMlj3JjZG2p8w02j3RybQZI6BD7gFteGKbShe +zFVk23xWUXo06kLWIhwkpzxYLJCkfg0zO7Dk/MP3bO1+xS0uzDT4Pii+rT5zqAtdcuYTp2R13W09 +HD9txzXADuhVBSif1GjFBW5WBSlH8OeC1awjMjA/lJZsl2tJEUf2R59aDKcYTCUNcxY4V0i1yW6K +6y/qr4PJsIbgFxEwPc2zyM0ca6gyDy/4eV+GyC2ACeztXX3ptb/1kdW4TSEd454ryu24QMrfbfv3 +P+Kk39Nczyytudkh+C4OdRimpHvrfSu9TxFGPnQmcYs6In9Qx5JxhIn83CLJxD53bevbNyDisXY0 +H4jdEcb+Dr4xT/zqgaGyBRH4TqQMPmhP9SkbEJobMizKR60gdCQ8ZpKi6UDLbZS7n7hEfL1LaGc5 +JCNdtmkxJcKc7m+lkwSnzAmI6OzFXthmI33s0qFyDsl2bnwbUrPvHPEbCRPcnoGhROqPp4d/wL8s +8gwpB7q1hNaA1qfJ0Q/gPj5xyZDG8l14FY2UidMckXCFmKDrj2Zra9jBbpYS5hSnENPiaB/ECZ4W +ynXQ8L8uJgRE8/QOVVJ3v82KMZbsIxqJ/SaIAdWyuRhce1bReC91GacD4Tq8fs1MfUPetg3I++sz +vrXMLOVlQBytmJOAcc2BA73BOuol+p0zuGYHuEyttYgejb/LC9IDLRVUKaM2GOxfpY0SbaHV5jUP +65XLWYrOdr9lgy9vRk6IVEFNjSG0JhFRB2mXdP0QbirE0BYHeme8hXRtvB0Yd5RT80ZJNeZI6W+Z +b5kYCNlQg9d0OXoCMEtsD2hTiL+nAnzMu0yeqFHmlJh4IL5mRovC4VscqrbSzZpId8pPzR4rHlJS +CTkNYJMlGm8Ri4r+WwxYCwRAAULM6bNAZzdqonTCN65mGa2vj2EYjBRfyTIWhgCX5FkgmJUs5tWe +HOZs4LtFedm5kS4RGNQN3yGAap2459YhvQuK18zSptc10SZE6cJNd1OTZPehz+JRfxooXF2LVbZE +6tO01T+Z5dddjFPU5e/8NjhGxOEXZoZdQC1dHtFfqbR8q6Qm2/fcys+zapbAx8qJl2mNkuON9KxE +vwsZvxr0GCd43dNf7Cer9XhgMNPTz7uJN1EJjbss39/TgT38VLIavV/UNQINa+JsBOkK+ncJvxcI +wr6Sr7Z6QyvPpll/TGvnkB3JzdZrDSQvdBAdgWkNK65p2HB5PCosaTe01k1X+m77hOiYUhb9q8Of +9Mt263NC2HsC3ecHd4dyHk2RF/mmaMOAmotb+FdJs62Jv3hPMQQ0z6w6hyjvKCFodQFvylzDEEaf +Z1BdU7UWKA/7zU+1xZharPfa5SLWqmPp2eLCsi9Ibkk2gNRSDZIiYC5gJvR/5p9piFh1P0yOp30I +5obC44PBwaBhSYXT3bLXD+Ept4MuDAE/Gytahq6fK5v3SGo5d8XpTbsLw6ZL6V8GrxFY32TCT1Vm +rCNWp/7U2+CFg9/VQxqme4qceI5zkOPqh9EqmNWKcIY3qqfSw654W/im3HtGQqaysT8w0E7fdrDT +Qk/EfcHY+FE63PaQaE343TyB4gNLYOMdQqkoDCz4lMdeoAaKlsR/l+g+4qJ1tLsHKsmLYTTvRS46 +Lrg+oo2mzE1QSi8yXTfPL36H1nX7gCJfakNeYaYqosgGjFM2jEfZQZ4ngmqFRMkbtTWgVl8zWvOj +1/vJh4nXYxvi6fkykhWcmm5Oewi30sow1nLABMYz8YFBHRHenqZaUHlD9eDwFBxfKI5mMDLPVqF6 +bHRb4AespnPkVkamRFl2tamFaNZZyCARGrmRnYBntMc/JVjz6DwzFwAX0KIIxW8Fv29o+MoxOPmu +4bPZbYvlBWyhsxhdX6rOPj1Cl5FLMzyfn//84wivTpUzZxfRdTj6jOr9EUXXCapFmAZ073uu0NZa +arcNJKxeH/0xamjuJ4CetiaXGE0M3kgYLnDu1RtTSC19Pxb/S/ngdZ+/gUXMpDgnWfG0LQvyZf1n +y+nGaj+1B3HJPL7C9ExsU1jJHdhHPTpM96FEhb9IsVEC3bdXzpSXnEOrGNWg+1u9ZTHG5QgH0k6E +J2m9nLMHLOkSWVFhbbf+xUSCfBv0JZo+qwcLEZzd1SHojctiIbaCfaq8oruWgNLip1/I3Z2u6L3C +SHbtMmnEeiO9AArQvmrtxc+DDfo0LtqAB2vW8mxz+wEYedC3twf6XEcJUZ9ypTXe4T/pSjQHG2wt +1GJtsHC61TwQYh1J8Hp1JjoijQNPAAfGqivN9YQ8w+NDUmSabeKao0RWSMTIfgZ/PoKtA/VsuEHz +3RKhylThyMZlxfyrq5qcPWVQRU8JfKhjMR706wIHolLLUPxkD02PUd5ntHcZDQyKk4wkAUduGt+t +4ZH9HdBM+SI+R15yY6H5PCLbStZzNmoLq8+DKvqaQuG0ExhyZdaenay7LMY+iZFZEveRJStqb0bi +aYbe2oYreV33sRVtcUVFA+Er3Wlrce0GL3GgW5Twc3q2bkNJb6saXcT5nI44GfzEsG+dJOVbZnmY +zULfrsTb7UeS90IoC7rxHPuoF71JV775OdBQci+fQiuvrzWkoypTzcrAv2uX337F/o612zSN/jCq +uLaEv2mF1SDlsmLmo+Js5vQ1/twieSFLzje1igHh/0s0IPp93L4bsKV76e6VAlb/4fW+YwhG880s +qEClTQaJ00ecW4nVF7MDmuN35+Nqws+Wi7wWI2Nbf1SrztIt67tkgHL7MxVN6EaeTUfcy+nysIxM +HI/sDpJY5A+soJ5U8Dtd+TNAUpcVLX3Vq+YrYMzGNHSDJKUeF+pr9/Q3YynKdnLSwxZwrCtVYte0 +RBEnZ5q/Q4YQLyvK4jiZFKx95FEueTanIdKkWonpzaZwtKTwdiC49hkDKdzkq0Oq/Ywo+gpnjszb +rgMJT8YYraMrRT673+bCsMYXKYi0a23/WtIWqnY3i0drN8TH9mCWnXF+9Orbc013M7Y2EdMc6Rv9 +rrF/xd+5biijtqdBcOfEIUAWuZ8GUFNPXTEoc4SU8BbBJUYaW7MngVeLEM8EGNH5EnmszbPvzv/d +62nQPeL0SrB4LrigUJrPZ0Ql4RVNsE2GT8IIn8hIDMHMP5jtpEb1h1h1BXZHe+IYguNM5z3b0nww +qHtsiIhB5WMkUZBTyO1hqloO0tVLYPJ85+8p2BVDSiOgcoblggQza13rrXfX6OzcQDnyjzPC2aq1 +qCN14YToinFMbdlqpzapUwWrfVO0mqS6DKf/iz96nCI3bFRCUdII5WWdJARuk5oloSZfXyclNQd4 +LZcm1FDuM/2hV1NNlvBHq9JKbIiMRZi9cBItAUDi4G4Jgdt+ytz5EGNyMbOcqvxQ1kef/HF8rRwq +jguo6ESTW/A7GWEoakD111c1ZoWvTV1WZKrsFdq6K/L4JngAaV3IiSsxzp/v48+sm5Z0UddURFuP +1oOHlAKQ7HgDngOccj0WZSuCzq7kPTy+iBL9FH0D/RGQBd/AEh9U/kKYhLp1UgFoCFRerxraflTn +/sFnBYxe9wx/76yyftw0aQAAqZMLypMO5IJ/Vs9D8Jlq4/XzTUJNN3LUzMSHQPzD2eShfstNjTqU +amPtmfy90faL/3UsKNenrG+UVYhXhFih3OqQJzegQ41CE5lXm5XgPywdoo12B4YU2rITfgInDrLY +/9OGwixdonjG4/Nd7+2XqoJhvxJd/sIfJ/4a3Ki5CjY5yR0zXN/dWEEy6Z8gTrbN4MeqINrg36iG +UacaGbDYbzTZ1ZOqFxtvjQLHFHjQHCWalFxHFnhyEvfXruXszWz1dG9im7ajLxVNSg4dfpwwr2cr +rEzTzwWdgyTuvVAEelpOEZId3zvk7ZFL5VwuqOLMH1QsODIp1UGQDdc/fHAbkr5LvHGjXKa4soV6 +DFTBgcZBwv6Dejd1nUsoCIhYDR0mzOKNObISm2y8ZWAEpFMAOQ2iV0xWed1xcmo/AUladrtN09YP +PAVhn4tZa9cbz0JNFwCHMnt0TmkXs8D67k+gUC7hpZabmCBAJzniV0j/gmpFjMAey0t+glrGRkWj +RRZAd0xnqy3HczKJ1m1KwBCPPtA0W7oSJj2u/l1zV6uExSsMaIy9KS5oBEwMsXFFDN4sPim5w210 +JwQGL+pSXxoHCN1bsf4CYx/DsvkeRgJIcwcwoA+4s2S5SYeO5HrB6cS+UQHuZd7zAJzjy+643KBx +fBGLwGtVzjePnvanrCavCBrdfrrFXJw8Yq6qEhfSQFsSmqZMKYckkXyBxxN89lgfeVHGU/4L5Yog +ldiPhyn8ho4NcvfNzKXvOWNoa9EPzhnrcbVZrUOwa7NiLZ11weJEhyLp9w4yEFRWRKN6IfQnQdGr +n6o4updiY/hm0s/iZuDU/FbcilptU5RmcaCCNQ3qiguhEr/JHm16RzPbFY8t1B0zghaauGDu7XX8 +YkbP96IHCPt0T0dru8/VLT6LeIC2hOb2FlkUh+0XstQmWD3HQPbR5LZ8rKRbShHMvxi8QFL5Ni2e +WT8ZXVJzKC0dDzrXXXJz34nFy9mzD5omd1z8IXxQ4Rq/2df2G4BlzbI2e9N+QHxbh3tC0ZowBnCJ +YGGGOCpUK7e14Jayq1ItVt3h1UfDtMZ5mL0eGgBwRKkWdJRO10bDxc4zTRSPExXj5R2YoPGhieu9 +Ei+aaImCmQVMZTo+JTTsWWogABPvBDAD41PDrKqhTI721oqmQnfxelJN1Z9MyWD0HZdJjUxOYOVG +6M/E5dyYzqqETs7lDx4ttp8S/o4O2X0B9fuLRWEbCg6d8iIZrFa6me42Dx4W5HcvV7/7vKRw/9kv +irQM6+PIaM/3fmFZxhrOpJpGEdaz6mgawsgUHq4mwFKkFz5qg0HpYHyFGK4Hk2fAneMzwkaVuuDK +t+F2WeW6xx4K9OHdCtZN0+tNJyYCm4Tift3cTsv/YJnfrS8RIOqrPTwOy6HTYrAvAnyjcF39RC27 +TqRDOoQ+WWahNLDlXAwgqx3MVvEsYtqH2G7R6lAJ/Q6EsMe90nBWpd9d5Oy2TcJPoqo5KGTKpt8c +eOJ5ct5KenjjVJpoFh1WNxoxLYKpX2Mq+W6lU8MvKke8j4Fa/5LZGntNnfy1dIhqN433HOfxtu5a +0enZAG4OdbWmpF0n+CPzThhvZWP22GsDl0IQdnFOcXiQDpjwXqXaBp3/mgvFJJJqRlIJnDxq86bD +ryhBMwhjLXnBx8TOGSfe/anILZ2SobsAljRQUnHkl8i0UlZqlnQJbCWBzzCpAbCBuAgeb5A9h0F6 +VTkSVPhMQ72Q9WQdW6n8K1MuPELEysle8wGwEikaVXPtzjPMrmDFEYWIAOBIplHJu4aYVWG1avwg +bC4vEJCmWhsOqOFCe7jMjWrDStq2bAQ00XIZYoXguQmMtWLB1jyvZqjWY97aPi0GEW3GX94rZYxr +WSxvysEiGD+mgH9+VQgfbRPvuZ0Xkd6LQUOhvlznFaYnGu3tuRtUK/lVFckJ3Espb4IpdB6DsiP9 +3dMKMldWMVf6dGTlLO5Ly7tw37nhXpU4gRnEkPtKkw6N+nGnuT21h1RMcsp6/whpytc4AOQCthZ/ +vUS+vkFjEoqxgtf82aKX10eIvQz/xm3n0VAVp0OUq5RHr8sQlaejHkYUlUUOOxnxdeZ3o7Np24hl +hihEzRZMusptJn06wR5uZGT+X5fdDR5dItvbm9FOyg9tqQ9I9vFLesczuxL4CXMnXk5TATC41Ifj +NuNLHuyuc/SBXJz6/EmGicIKSOjSgArtzZSbTrpFZag/bl8xfZyF0GGL+2kpVAZL+NnCcN6+fCN4 +tJYE7IgXgH8/wchK7v1T8Asv8cG6+rsBEg4h+ppoVCWbYA1MogJjXEdrdGYSUjVYQoBiWuxpjs9k +/oNfYWhXMopBa4E9xQ8YgQBcq3+7p16zawH+2gueG2NMCC+MHhuDLVAPoqAysNU05fhzb2aH8Mdz +2D+1y6kkedA2POf5SJvCzZ/tKhxc2VTL9RvmntzT4XXyI44bXJSvGV/4lT37ebIUgO7iKWXjh1Id +DZEy3bCDAbz42/43jDIp2GWol2Ov5PxRKbQQYKq6vadULSWHteBHWyM8g7PxNKUp0iX66rMFniVu +2wrwFbV13COp9Z3HBIig/qjjGJxXSymx7yvir+llf6YD4SA61IJIUlBmyX5EbP247jnbMP04W5Nm +HRz5/QB2LeUGu+gj1ig6ARmQgrsOqbFMS1fkPZm7/W16KaYon5ZeFiBW8Zq/fpfRLX8TRmpXcDQR +gr3xpVlBK1HuweinMgo4NVntpllebPxaPnULLN5xvT355afR7hpAAhe4Miq2vn6LutnQptKbSMs3 +uBd7nNBxXOUg5XOvl9LmpML4CcMzYVKgh4up/9lsbG2ADgTEjsB8TIDmcnrcpaIuplsul97Op8lc +fXLvafAkOWgPrTA/JhC/LDrChTqsk+6rRt1udsNQfkBIGPLuHXrCdc72DOOufFK2Gq40t335H8WQ +CQZuPgi/NMC/BVOwUOyWtBHMjdZSvpMoTeWfsz0SwVWifGAq8Y6KyLXRuXZmfjJkJ/803tP74YRg +gVhsLWh9kpLqPDo9woiy5AwdtcF2B2U9C/I7BxDIrgcL3xO3XsFum1/YEJM8FlrlTnTmrAScZTAJ +zsy8w5fWRn7SK1X4K3A87mqc3NY7yE+zspPqn2AAP41pn6oi7k6XKZw9MLMvBWJIFAfmwDWDurE/ +SANCkbjrXBIsOdN5iknvKVg2qh/mt96vkaTJ5ArNTKzx1b9UhBrHXJ1yMvIYa8YEQmiN4W95Hohq +wBPzRhkebYa+Xz0IgpmcFBAypphfy+Bxu6N47G3OSD9yOi10OXVk/P+fC/l66fY3XjAgvu1xnbxD +iISzRWCeObl7iigrmUXVmKXAqr+8C8mnC2NYbxPX8CuyBg+2lb7XTyxsVW1+J9Hfkj7907aQgzmr +8Rx+1/8/lp/D5VoPggqbXsEAUX0Lf9jNmIHp8wN03walivM53znHlM5u5bS2zO5mh3ip15ODOs6D +Y9iNdSdLUUFqF5v3v/PFtdKA6RwaG08jNyg1qH575QwChY2DrPbuxQoaDcqrkiTkKNSZlfa5qzwY +z8tz6AjOt7xwsyuIV0vFv2cjao8P/CnMaMssT/DK3Oxei2hYzD+z2c7GAbPO7i+dROsGbPa6nuHm +7Pkdsyotp78vYcYC4D+pWPcBJdVz7cWEOn72rkzpSaCdfhuRJK4FWpIh0sADmaGJzFERQPT6DO4B +ZnoTe+jKBBtiOwFg3VzPyd29C7b0edHr3ulRGipr5s6SRm0Fh0ezNz/dA/lyDr0/FUMv9IiPJvT6 +h8NsnmTTsD56duLh8S6HmU3kIWm43lXxxGCfj1RepwmgkVBZhRsstU/36C34PibH3xOk/nNZomnz +JzVI1/UNLdVbRzSAf7T6K3dMKK/iETU3vDKMqMXppupj1W8GyS2MTujEUWADvwj7BxOyx8LwvbIX +ofEK4DeWQ4X+drdtPk1zjRosu7tPbuCdhWqngJtSsID/LXq2e2Wvz8tS72fMJFk9bUVj+VyiJ/a/ +mzhxDtNp0dqcwrMZL6Mxp061H6LYliRSkTz5pTzi1Th7BjNE3w4NHEiHapm0nv1z4XIHvWLiALze +1L8fpT7rUoM6/vkNDgvrbaqKkIQdR1dsvG29WktQKQNM923/+771zMrcPxPURIT+0TmX8mgH6DyU +cG4T2+22BJSclZJI/xnGI+gArwkygEwCggaWyLt0aKtgnGkXCWfs/FHi8Q1QDwBLgZFqdu7NnlY1 +HEZBFIDoWX5Yn25np0qFMoQRm3YqWEXd0A9qkBun8VFGPzAPPdprCOpVD6F3fD3D3h91l4NIGiyK +hOs1NpWM7nN/BSeYDOaSvrsiLynHNL8yKoCU3NOW5N3MMwkfzLeOAjFA4Xxaw4IU5AnqDfyvqaQG +szTuJuOS7N3Cg//9jJWXlYUmmtFbFuUWEchhF65eCjaF/4fk9NyZOBN4bIPHfOzLiXZyGO6RFVnN +IwK8tzleIqL//1MYfF2X6QTOy9WOPU2+7aZ0uA0Hq7xGsN3zlSnAtCDcZjxsTcePdIVlBW8BW/bF ++olG0brQrwmTjw/RAGQ3PxSO2WvHQvKMRZFbsOfdwIcksoqFxFhNAB5qLx8ANf++6yRj53ywVbg0 +H09yHmEqrubSNNXZg8iagKZsR2hziAPWTCN3n2Y29C3BFPwn9cYQ8TZ/J6TN6YtRWZOBNtopucQG +uj3zZBRjklta6UkLCL5+5BccKiUs+xbQE/4yM4BfHDcezmYVOB/f0JlcyKuJO9U0B9XMnAEWUqrv +JOit4L5KIFgBjZSi12q37NZtMQHRp3fDcF7DWDPrm9vuo66vevWuyEaAfwGiluIPJSKv1gG4fFYk +LKu0aNLg9IZWwbdw4dXWEjePhCSdnG9StDvun3NI0OQKawtOntcYiyhGyQUrkmO8M9lcutOIHrv4 +ei5wDRY0U7GKVECuB4gU2D7rCBFxRRiw9a60LB9+LYg80k49Uvha/SggppPUK9HhOCx9fbNiRI49 +T9LuCsvOZ093fHsjkBdOk9ABQBEQSjVDZfSDMVJRyUvBSRyC4AeA+CYSsvRHs3g17m6y70Y2LJJM +YeTKMD4+7+FhyYoCZJOPmNha71rfEyi8MfKx43xNh4pDRo4JkXRseamRN9pyUNfvtbMTi9spVmY1 +AP+GiXD9eieEBNOD2aIcrNvv++XvY2NvX4oFkLDDoIzDIW40L8LlwRvmvOhboLPnYsX0gniuRP6E +/Ksuv7bDinXiEfCMAKwzRrr2D+U3s8wd6QKFQsVTs1aXfRhNzD3F4B2YNBJ//CH4CcZHcgH3a2lw +OrIGTDbEQicPxp2rZQXGIkJd+fxN6Zh7nlBJwLSvzibsDVuzK1qhOBtO4zJy2XBJz3JkI/oaDZoE +MUBdhtVOSFs5C95UPb4tiMKcGOh7e8kFjOhUHwtUOPvHuQ0CgI6ueNbRJXtO7/zAstpjKJvX4YxL +Zqw61r6RI5dSSnRNmdTTt2r6YdXLDvehAjvGgO7oSMLx2ScjX+I1MB+037Io6SEpYEY6p72cmHjf +mbHLZuilex3e8MW556KwXmBGzuUj75J1kSF8Z6pZIbX0nuWdMOWjiRsHMWvODBu45qkihgQPex9Y +wwoAcyVvx2A+yrkbFHdZVHQNaKXoMkSRb94KaNxqrDcueA09d/ynMOHqC1IyXkdx5WTlft29lwnF +6JcN7UC0aNNz6FmDdm1poHf8iPG1PRlh1QeJaBelj7NIKEfMgySmqrfGt0RfGWGvWnkI9aHzc8rq +FP2WpFJwdIWIWy9SMSPAtVh3koeO15J6qvZZqPYpBW7+XHqgVX00kC3r60jQLQQD9JZn+ywtAHAA +NUZUl4DkI1k5vfZSU1u0vL8ij7FcCWPnZ9fLVNzx1umygJytmtyGwT7Y+BFc9sVpLR469vLKoUS7 +WuuI1lGgcsohq6r8ytC9m77g9qBjFF8DUg70PzeXtZQDk4i08VRPKbLF4Ge5y8PYZQ675nnDCEGx +/3RDuq2xXhdJqMvS6vS+ZvpwRO9v+i738ihyTULZiUH0DMXj5EhxKy5GBrHYBiXm2Dqaop7keTya +MASuoUlJUXcOhzbQV8Uoyf4GfUAt3U+E8SRJJUkw1PrCPlzqmIkrSlE2NnEjIAS7wIs68qtlufw3 +JbwBWgqIRcIazpWOW/Il4UP3SR0sjeWUguf0ie3mHCMDLoTzhuvP1ssVhVlpGLX6Am2yF5pDfIeB +YIlJxq9Jpshx7RoBCNF3dUErOR8GXnsB7COG2blkrqgmdfrQuO74odFxSn5OnfQOKzUE2epiehBL +ia5Z2UHhF4tp0eAGMorThVsnnlMZi4nux18XYZVRdJtukDQWZoaCS3kKCKTYb6ukE3gjQyovzShL +ogNIcJQ+suGQ+Mw5HllQjI388B5LIEwhIVJQziXW9q5ULeOkIQP6Z1bNTV3O6zK/AtCMHYIeVDaE +bEWE6ruk0dctRn6MmDRprPZy3Isr6FdCmu/VG3a20xzuLNMnueV97/x8Xr7Q4uiZhGjikZ66fzHc +g7Uuz0UzNHy20BZB4arZEuZmX2H4z7ttHczlvjo0ZfPhLD5P7o/mNilmPNmjoAMKfMP0RF53o1L6 +xpTlRx3SarXH3z1Atw0Nervj2pV6zyN3jikrgSkN0m3ALAUG7giVqZy9+NmOV8B9d24jskdZynU9 +Asp59QKUHerv/OW9okW7VcCNRQWLBlma3nU5OiwPtMiy+dH+4d3LWMRpHf8/FjqpZgtKPoJUY/Fa +lQcaaUD6utH5WFw3AcE7e2lbMa1py8kB//A1VIWYTOdyCVtEdwb0FZw8ltCv8+Lf+90j8hS5v+kj +vEH3PNaNrbydzGA5WCRU+tS8VjsqHFAo99i6LTiJnkegWYagLvgqb/RH4C54tBKdrkkVty1AA2s7 +mGmiAnqdh+3rxAS8i9+TZz/I4waIDdu2U59Uh3+adWu2uSEhqdLeP5ACIPFAMrlaRFJkHieDIL+4 +CpqezLDrUoRONN0XQYs6s/zGxftuerqI+97cESbfZbh6mnFgsKEe2SLcY7TNwS3nqnDoTnbHmbJ7 +3dYx5QU8e5bgXeu6wZvClqoPi2ctvBAvD62eE54WqRMcPoOIlXl5DveaQ1qpiyph1Cb52WIL80s0 +PQaC6gRelVzrESfd5vDlgfBS11f7s+MkwB34lNYRBWFkfF7ph4GvEE+mch2W5bLO8PolDhEFoi83 +/HqB9Hgn+4oehmXj3EPKtfX13BmsQ4l92qm6B53RP/ncfh/AskWIH3gWpSVvbCpsmJX3g17u/pDz +E3hHtwNhceTUjufxoiIrGGYD8ypHN0j3AkHw1cisWEwz/m1vCNn2YyL5WK+HYlDvcHNJNl0mIuLs +htVVcu3E0x38WRMfIZhYmjl1DnM0y2MMPnGvqnpv/H0O25NQNICkHjwbiYHq1/sFTMqTNAJ33IV/ +W5xUe832jMqsKJjgjT+cV6FM3Ymbuz5WraArovtraA7sXrLe1nWVjJ0gM1d1X7ICPDRv+GlMq2ao +X+ZOVqyqHNI/F81aNwHDHVLi9HdfmThrLC3k5sWjZlKIRp1c/gEwfovzoPZcUVK5GhojE1K+KUOJ +KXqs9MkT6ykoqlQbzJ6uCz/sV7UJmn4tAhxe1f3nH9WoBF4orA93D5LITYwJ+6D1o3fgHBO5OnCn +Ah6RFEZ5MaWnrSGUvLv8x7O1rl5lptZZG1teTeZKdxm//7hml6VElizg6RxNGLAkNE1yh2l7++Uf +V+vasqv8eCmURAZq4bu8xwZ14icPNStHHHSetd9sTScV2orZTSW1wlYh/j00BSBJOqK4sQ8YO+Dm +tUw43HP8a5pj5fcq4QLWYAcMyO6BkkXkP8BOzE4H8U1hAoWBHuOOisEId+X1rdoBVUXI/24ut4UP +2S2Pz1fiAuN+xXjAJVv+O6kr9kpmHmdHKsJg921uygSjl0Yac8BhWG3Sh2LMFEfqFeLh4cR5gDNC +//BkEE6ZMzWMxbX5ojtMIUj+DNffU8FVX0sPt8rCtsFfcJ26v3lk8MV+z2HrZK/w/LQ4gJZG45/K +/sTUwpS8TF6iFPYaMEuO00btchVUbP6KKoQWUJsR5DjceHS4nTjiOhwCucB0gR7xpaSvq4Xn6bh0 +yk3JI/9Q3K6T4Oykz9tE3OEnv4r13zDrJ0IfbowtsgDg6MR8DnsrQAeWY9O0vxzZeyU44Z0WzdR7 +DwXRF1oG/89ivoUdEMuhtGi56AznZLpbvKxzubsIkOta8HpMDSMQ0B8td4rMY2fWb3EvCAsjyKsa +g//4lg0PL8rQ7lE3x6TmH2TvztKNDYWQa4PEnOuQ75MriCLQRfKwWDTJE2NqLV2We/0btnkLSvXq +bu0siMd8hX7gDqxXX9LWZtH3p6OPCdYl2MbraiRknkol3jMWNKyIiK0tS8pp2j1QgEGVlLWz5QXD +eMiLUc+jHSayNKg3SmIVvUon6/aSwey3tloqHOiQsVjLdBdNi1Is2yfagQ2oHS4kKRNUAWsX258I +6WBkJAgF6RtEgFRNgdyv8qADKKAjQdEb64MfNBxbSDw6n5QAGdy/afLZf6Ln44VIA/lp4OaZ5nif +2nUXVBALZBi/4dxFsw/hokpEjL9uWgzZraPaQYuAp7y4CgWcMMz7nwJtkfQQFmgaJLSNq8hiR/VO +9oUuhR439PO2eVgi/CwE8HHJk/0qTwALEu5VUUX7i9WZJxPWlz99yQFl2x+jPac8Ptt6enz7CXsC ++cwY9cOU1FuZpgvg36y+GNlpr1mIfxvdjPFAgeYSY4Der3T6y74y9hYN96NPVX5OxrhurSUA6OoV +pf1G33LfeC5mXTLdE8T5btfQ/Ty9+OrM5NpdzblUq1mwDWEU/6S1xZX2JoAdGURc0ukkUvbzjhcj +xYz0OToJ0p8PLQjZ4Y3YwRk2oY55JglwRKuy3X2KWLQ/ivgm/4XWAzTTaS4fVsfNRWZvPAQoEWSs +vg1drnbiekRcGXI8DpiqgSWzq7tm7YXqLSKSFmC2zhrxPa6nyrpA7tPHyT6yApEJV78CGxqtyGhU +lLtECZkoi4bY19xHx8yrMdh57p8AawtN5T7zL0uFdQLVg+mGkZn/Pp4oV4+rxLeQRLXHu8s/6rdb +oFxXhq/GZRd2/UdLKEaOTvJm61ckSuvmdknG+gJLcqr/1pzQc8T/3jwHAMhlfbtCjurktgbJ35Wq +GXfZXCUjtSrULHqRWqLOLlqV8hf50j7c53dOm6Bnj8pC4DjpH/Or3u4qpZHjCXVHckMDmVvTJ9CS +uWYB2/oq40dFQMGQhs2BGyM1rS5wPJ4lbi6OM2QLk7AgtVTBWOkOMTCx0dXFvF7rblQF0fbtvP6o +MfwGfzoHKq8UoyvBqtrH3qmN39DQFdUgWcdNEjX3r6i8sDPQUl/JWYsO8KdvoixHZMjxDxWksewR +KgOyw9cQiOJmD7YEJr2WbEk6Tuxa5HH0fEN1F6L9rbBwBA8pgQGhGqwU5f2eBItX+ziHKnHBUO6Q +i0D5JfncBX8+wpd0JxOq65Mk3eXmdJPL1lbx35vgyV3E/EYlQsr0vIAcECapKC4jWUkR3USasF6Q +Buf1cfB7HDApjp+9Qd1p9srmop5mczEhFTfAY+A0HGQTyWJZVyq0PBWUd6w/e3GT1Uy0qKgCvnEp +bvoFhpih2g6njV90CpbzxFvvwGiOfPFfX6hYGVQFw+3gKHaAvPZP6eq/ADtvwes1VrsXnBkvuS0C +C/w+6PZAaAzpxC1YDs0XhAJ8tYeeGd/KabQxeU1MF3TNtjb/XLBe1YtLdVywWbh5TQk9iMfn+g2j +7mzBdL7ILCLbgLQZTeTv+6jPt9YwwwWMGluBNj5Ir1E6WISF+Ml01m91B3FnBA6r2pbGgBa7ICYl +w9EIGGI2K43STTP8QSXtFQh7DdOez0emlq+nvItmG5KGBQKjwan4RhZBlk+UW+ClPTvtRT3QAPzp +xujdNv3SbQEfoUblXd1BZlZuDfCS22xuU5nqObsj0LaZ692XPAV/x2MLm0FTZbPA7/GzhevNkgOc +Yo3UzIgkBBSexZVRp4RN/G+OmSbrV/+0yoFOI6Vqwub7udfDvvDn1fRXAH5WEU4rp8LcgdpHMptV +ruYlX8TPgaz9SwV5S/r2aDpE4tleCliz2B2SxtpgD4TY2FObNg9DdhPROVuI/hqd3x0eR4jRvnQZ +wLJF/YNgQywLqE33k3+eoohyOPIRosd3UIISn2ShqZXaD974nG1sc2yU0OhpWb6TqWVmimMO2tgN +mF3FbDwlwdFObtsyorzcPM9UKQIeAXjS+6EmdzzPeinDWp3YpXADuVHGB9aIPjL9uBtE2r3SbaxF +X2L+lTZhcyXgqpIpBEzqUUA4W1HLoUq9FsxZXQ6Oa1gzZi+RL/vGfLodEGwoYodDFrOIvr1Odf99 +gNT1OLrz9cDsPGMxnX5O9EST4scusqvgpOMr7rqxr0JiNorhVEqRpM/9Z3C21ZED5cW39ZBhNqaz +CjBkKgsHDPNAaqsP/9OD5d9iPEIOC8s6ljJCHNv29cSjmAidDWVgTOAPM1TMjWdijqIK7F5QqL7Q +d3BYI5YpNr6K65cuPEjRv+Pu2EdgLCtciIaqyUjSaKpW9Vbl2nclqnHN0ptnqqetmePqd4fecyRr +H/3VhkDcwYE+CN35pHPrFHOlp+mDkX0fpSt6XH902/I6dZ2sOpfLRg7FUaVZjfM9OPETVP+ieSGf +XcbYzl8qJvCbnjXzaVPcU8qknITh42ZxDhTj9V3mU9rJEJviNGqW5R5cunccbZMz6GaDZU3rM6lb ++xq1pcz9jlFbx21XTkv30qdlkKithGXZZXXjQ6mvzCM+Z62/2FlE4UHyGFOjRLYz9etPsnA0e5RF +Ht15wVTSZ2asLMLjfVuF7gVoBNfe1efZmkRg25ZVPkeM0Ytnb2Cc2GNYG9t6UTAhQayfB8HDgm6P +B7BtYKyNHbLAmF0bjcO6rEYsXcM5Ffzw7eQRRS8kO+GZ66yU/MwQ98LYpPrrZWyktYA0xZcHT6I8 +6Pte30UXuaKRjHOOiy9U7WxnY9df8Q/+ifleIGOybI14S1K6tVDUv9kISP7Fh012wo0v2J65c0t3 +YKzXwFXCe0bhL6leX2BzZqf2a44rirpXuvsGO/ooYqfnux7q6LcW9NjRIH//AMkJ/oZsEf3hsqo6 +DMfg+CMk2gMBfMIBB1viydgozFMPrf4/EPhaoYTxq/m1ao0QZS8XJUtwJBzHnP+5YXYt9VQnoYXa +nW4D5+rgCI7lMNftegh1JrqjQG0VhVhUl1hUYREEVtRhC02Kjh0G2G6WaegOW24gywiyjnr4iAs0 +klXeOS0TpvzZkMQFqd6LNmjVWSDcBHhyq4UhwB3cnHgxEhVAwu4N9vlU9oMlDDJYBYkN4C1Cc/m/ +lw+Dh5uaG1giRz/YacbRdSw9QMdIQJcplqDwkyQREKnoT5Iu/foi83222lmHrMZOPc07em2osmBb +z8IXdfjriSg0vN9gx/WeMw/axF3H5Q3ev0q71qLMzjpxa1riFq+bNof/vpgpdBJhn0qxVfcgTdto +j+PGpJHtgmyj9MqgXUVF9XhvLW8nLxIIHEjx5Rq7dLUhJDRZct2I+alYxEVOGutvPiDHsr9ih8ZZ +qYZQfQt59GIIgcI+bIdGLVDmdSgdHc7Do0F9tvZOfeK+tByo45Mhd+iXVbq5+fgTc5ZA7U8m84eB +wSYVqxf4foclAhk3kOV083xAnURlbyIr4F5OssC3UFQ4uQxIhKjabHIwtkk91DomB1Og7IJTgEHR +CfUNCWFqJ+rnNtN/cBYkwESTR3VDReS6maruYJr6Kb6q/iqTe5u/RmClU2rARgxwEZBPB97CRa6p +S/MN6VVNPu3b7Z+YmkULfuGKDYJpOoxs5djImXKy655InuIcedFdb3UilFcD1L/8+f2Cr4ccf5h4 +e/jpbT6chwGf9Kgk8Nl9KHsnHi5xW2Mp9p8/hOqfKK8dojqXYjGjDOz+5GowCHlGGJMqseTXsiv3 +Z2F3/kKtMU1KzvS8F7y726IYy/KA6et4LLWxKftRbo+YmrcDVcatimuG5l8K8TbsyL0piFNpaEwp +vlIiscC2aXWHAx2nM+pRacX8GS7VQJQ11oLXwCfk+ynhm5eh4QsJwvwNk2ubMaJoc06I5evUtDTr +bPbrghd1rCdzn4cNrHPJK7XNaEgHNhO783BcUeCQ+M54KVYGXsB6BCMMNqgQDJAO1EFNTFeyz26h +KefUCxo7Ri3BcSHzqhv6oNhxN7/W5TReb+3MO+H6C0PyNL0jX7SYd/jIjKWhWVOJtao5rROrt3lS +H2oTp8ZgPlOaOirDn0wZLQ2DrtUnmrXdTCOcviUq6CJKqpwYYHP9bwloHPoceT1tGs75v/+3sPwQ +djKj1iHGRBD5IrmQ33dsADuJjEEh32Yw7MsM2h4fRHza+uYOpnEWHE3Fq4d/Jh4LsvGTqxfUZGzX +nRKUbU3UvSYzWwkkLBBIskXFOo8j8Z+JGcjR50ZFO9Bl+IoUs0hQekzfxHF6v/2LW028yjETGQLJ +rxOtcDuKZwabWGFuJccg4hRDssYasJSuLGjNjkuYpUsfnBbyBw7yKE6MeRvxQ2C8gmhtdWNim6TP +TodhCo/CF1VqJkFL+h/Mp5+S2BYhOOGlJ0JgIB6NbXvBzibDON9XZEQOdrXiwvOKuRljOoZChi52 +BeDWM2cjPjccpGTtEDfHBLUyO4siJfW1LzupRvdYTz0sB6i2Pxxios52uhVZ7PwpAB3dW0L6aPcZ +TvTpjY2jgXByDzEPH0RpdIMcAYMW50UxcMxNS+FeBj3LC3F7NsllrJ2s7T211DqqlqkIsUEQpKWn +VDvVQ5RB/+hv82Idvm+hm/9m2+ND/RKinOp/4tJQEbmXVM3ULpd4bsqMMYLhH3jFUdWLDN9gJ6Yy +pJwqulTz8Mpz7sjSeLEXcmY6etB3PHaFq6xFfgwDTolcMln6McLSqObMc7thpRud0pUEqWKWk6W1 +DFsRz8BhMTjWzNTsAJHPmpD1RYcS8h+JjyaXS1/OemgEIgSrEni95Ot9lvNhwuWq7AwOwhsATaxq +r8J3Osqu+VgCiyCFq76fQI1O4itm0SbpxLfi3759A4cLvz3XA1Qe653d642j5R1i0VI2hEgV6+AC +H5HQWC09cYl6uRTvp09QoC+Fsr5c24z80nelQxjvS8lfsCFk2NpabF46xvG7URm7HzpHUqkAKfnr +D6nOJPiYYOt4vb1LucjVkgURmEFZdNNods3PoArd2zgl4gb+bpBgWKhwXWitYRnmxDJObLk7b2ar ++lJhgLxu3bmzzMer8ZPDOryzx4eP2vP/QYXM3llXOyaPRiQUhreGw9rZ/mK9qkK+6lE1r0f2rYDd +mgxZM90dxNTXqg6qtA6NqzwAiHIgzSKBPO8pSVmMwYZEBuiKeVYkO8MsbdI4XI4noeCs1rr5iEl3 +pN4hf2fFeM4D2SvIpSbInLfIdgLRwzcyKsGkQdZwN6X2sfBYH4ABPZ7jsWx/zdkc476p5HMX4EUM +GwXytWSePbrYAH+dWhhkvyINLf5Z2PwDWIsYR2RYMigsXAfFouCckNuK7f5MdACmh82S+xz85H7r +HRly77KQ3RBvq2IjSctTru1NXRrNSSziKK3I0WezLqKTzQ11fgYXWD09Qa8jdA2IfSAIMI5VuKax +z2TA4Sgi4r6h0lLJrlIZ7nlA1bUfyqGEFbcW9cSIHf1tSt1wsLV2BwvVW/InwzvN6IZBUe8tjkxZ +d0hCu5urwF4NEsb/CR2z9TYYCSwzFC9EwaPOcpwwYostNFR7pAp7szVa2YV79lVSzpZJ51A2M0/r +jftl2j19SxnS277SvHA4GygCx48OSI1zZidZ23sCguYlTD0YvqOphGc2F9IA5+QlwIc98xBZTy0t +l96AHPjY/LXByWXGGJZfZ1Ca2f6aq1SLkTAEOhWEVakImI0su/CoBLdWYyuRWXwIz1JK+LlXAxB0 +rmehi3yIknnarENQ6IjFJNnh3/0P0kjrniHq45TrQWK79UZv9BK8TCBLE5NYuLe7AH0ExF/RJ7TA +FbObqwQgnfPBTPIXx1SoT6dvJ78KmCoTZxMbZGio6WpWEPs6voxIB++PxonhJ+CWVDpYAOUfe+Wb +Nn0i9meExdx7807R0g2tVffXev2eBNocK6BZ50boRECqHLCv74xCAYG14O/cbOBmBt9GvJRdMYw2 +LyHgC4t7eu/y6aBRqHzV6LjdGxJ09e5JkkGATCFmrv3HEAH5aPXzCAvu89DWzI0l8IDGJbZpJd6g +xKhc0UqwI79oPswOpeWfNSzrkACpHzFTl7+BU3+GOdA21lWgWNuoZSalBUliGhr1x0dFVT1VSk1w +6RF/a7lfcsKZUjCGlGHmWOnsbEJesD9HCnI3IpW4ZPVrt7M/UxIHgLjFlX6QOEjXaAhKhJsc2PKa +CPTfkASEW3Q2/p6BaVhl5qvTnpUZCGZQLfQwNdXaW9s+b9nM5zhJ7hvUf9NN2uUwf3C21MQDgmZD +FY2YXnuTMV5GM4CwSihXx1XsibmSIRwGMeYis1MXDxAynX3Ow8CtraU3nO2Lko3WJ/jiS3BRKrg+ +j4D4k3GkDfMtopNFtkLPzeXPdgOZoeFJcQl++j6L52el5RjLPYM+vcrCnaXDJMDus2Qfo0kVdV2F +L6lLkt57ksudVvTOPIAosNTDD+oxliB/1tifAY0Z9EPFzg6ucaer9PLnW5j7ogFyJTEIT9rY86X4 +pKWRF5kPX066wa7ag/EMT6KHN/FAvQQydIsqNlSJDVIeTtP+sO85XJCCWPZUaU19G6/R9tygiN7w +6jUVdKIO1xY7H5gTeXaor/Lr+ZQmv8U3+/XuQJZ0KSRq0eDCXH44XbZ9QW0WfCeejgcsWcbi984g +szi0zkl1Q6//W86lELkP7GI3brfshfnkVC8knzxqi8r2dd2Vo3qm2OANQakTGxyD/I/plxlSqZE2 +CXdSKMpHuHkysxupj2MAIjsH7Q6v2TkquCbXD9xkEehpHvhsUSL22kiUC1YoqDTPa/7Gtrc3S7LM +yKNaHRBHthzGHpR77rJQeJu2wp/5kwiicgWHLL1fJMHROG36/n/QCTXw9fLfQjfkfSqE6xI9PhAE +lWEZ9/xNf6rdzrbbAaEjWbUiAEYvJC6ur9X2WLAsOquCMPurbz5AKtEOhfi0Y/J+vRfSkbNOwZdT ++/eD5zRNJU2TVvPu0FyE4Vu6nwUw9F2ChmSrUrUfbjT69wxIu2wJeE9qpzSzj5I7DRF21vuJnR79 +MVaJ/dLs2dsz8/wh6g0mgZ0SEfgV/0TRV6o4eCVFZZN7IJMtex1NjX6OjHO4NVnoP+zc5aVDr2TZ +BLzGdzufZff/adnbOnWqJLVYxpFfuH43rdOqu1aoYfwempA7D6q1ZRS1JMm/X8vvxrOCkkDPhAzl +NsawudZ/hp+AoRyXmcIKUaoW873NlmuT2Mxa7eaIRXuwnmGBI62knLyPxgt94PYp11TZtbaLN6xl +pv8gKxT8ozv16s7QzZoaq1jNPzmjwWRVJg19y1pVdgRBSrOpOzwseOctLuQ36paCS/zbR/glzBB2 +mUZzDzDOwXJr3YYPyMP40BxWFtL01jyo+rVKuRrW1pB8LkjBYvBkyHP2lrQatURYH6DKXIapHOkA +z+opmfqWGis3r6qdcYZ+jU9SveLCOKa5cvzH1WkY5miwMB8ROeUeD2vRWmD2O6iWJGC7v9L88Io0 +7tVEsudWpQqYrzuvKybPMtxXDxKqyjsAwpPwYaGUN3PoVGhCxqAmgxM3tV89gNkr2L7K64khm77u +OMuwYPbDZtG+sszGud0stGvo0UgMiuOWEiC6rZqoTMde6AF2yy/umyoa3Oe7hNU6WYUE2+Pu4qzi +rzSmZeBjtY9MN38rc92LrMPdWvnVWsqEcsDKpAIEQc6plTtgG4nEZuhUt5SwiElLeAWMmbAFEoTK +F7DUSYPfBaI3Zb1UdYmfltzXQvGFUQZlKQaxF1R+ylQJv+WFHwdC2EmxenyLX9inLxb6hdR8B9JP +K+Ac0hERRXQgReyC9d+UN7UYwrXfViAJCcIJClE8y57+FzdmxY/AkS7G87CxI+4h4DbIthCSeYSH +okEkLN36L34wLgcIRkPkRNHebN3ZWX8J4rR2WPt3QYfRNcqgakSPo4chijG5SbBkZO4I83qHWa+6 +UgG58SHhkjliCyeScPdJlQNbRxcmu7eWQ1aLohYdhu2DQ/b+sX68wpOLmszzfCClPb0mVhmZKCAp +9hjXu7TSg0Ilg2SdBERARur6rZt8qgA5nhsRLCojxLgEv0v6PTM73kl+mQSWZLJ+il6/BkSOSpT1 +/FyjLQNFaJ1x9zDlLxeatlsyN/9wGs7fPi7ZbSPbKVL0e09OvEjrFkikrU12w5SH4rwXzWReSl25 +7DdwiqKfjkQbW9u55QbP96eAjoM2s4YY6nTvqsvVp7eL9jh/A8KvAFeDxLVb3+SyR5/JKr57MMps +w11uML5fT2o7ERxzUpi5xXJVKyF9HPZltDgEFUSxmIg/Wi3SU4FYt4OLqBN52DOcnL/OoLvyEGi9 +B0YRRmLtYp15JSLOoz9oqAImMmV8i+hK7wQU2srenGWqt6kdxolTwwLl74sYhaiQSOzG0xFM7+Up +YJpCoe4DKXSL0bVvj/huYds4AHI0qKpNat/FMAa9K+8JebkGlJobHFF9uupvA0TRrX9y6eGq9KhQ +pq5EK9WTFRFj54Luii6k1OUf8NR40KUrnf98lS0jC/uWlE85aCuuzyv9PUV0gacm1tIc784A3kby +tOaNETjoHTnJ2bkPj/B6o230zar4/qmx5zDrUHl7TGUq5XFYlQezqSVgucJrNlAnQOhxOBq7Lqb/ +9/tmfyH/VHjVQY1ddcorDggg9cMN8OOCKe80soKxEoOopQGFjWyXJB7ycpUaPB+7EEzgezLDqoWL +ZNCGy4ql/oLD+lGvq+17xsY3KKZd5kwToe8It+AYvTVdGEmDTFwaTU9QsRF3/hxPZOiQmIFSvuDK +MgL63ypBlOd3dMXmILwCYpOLiiE7NHpep9xPajxYY3Yx9jmi5NQfaoovWGKdOFXcPXgFtUvyXty/ +OMKhRidlnVhQp3hdVcl/GeZKZqdNqvDtydMl1Ne9imUgtWG39dCAYdtdk/HkOYwCyl4aAaL0gj03 +tlCmVJGTD1+zXAKv9nSDXSVh5B1B6S6rZ5GytXEwOxcO1GotoY+R1vkLxdMsflHTOMxCbTucQdCh +A5uEohIlXyJIkui1eBp4Hm/8nXC/UfrqYzWvKmVF1EpZLMl3k2SZ4tcKGHdBGHGTC7KYSbL3jitU +vJSuI2k2hTbC1fGSqEwh3A8jeohETKVTaRlwjiRF5pPy/baKtJ6pyMW+o92aBWNbpZvzWJvpikXF +7jBUIOTQyB9pONtE7nzR/NxXk31K09tJ1fZ/WyKJPEaPpFYzrJ3fjfgrwlbDCiepdX38Mvomz9iz +WO4xL1tVa0Q94c6o64+U5VoSTv+gxwLWZt8W1pCXse5YH3TlImX4NJtNtTbTRaDhL1WFkPWXPkU+ ++2E2VP8mwLsZhP/t0HDyhjFKJQG2rs1kIMhYbbQLdZws0okNqYSlQmgNfb9tzU3WolkJzWqYfmpz +zT/+HR09AQZLl4LJH3BN+DcMTVG9m3lr/XmJJglMC9kOhmWHwwcLvn3A7fJhS5/YtgM8H8/Zhm2l +LPgDtMgJqfmu51Q2ht80gzF3IltyFNE3plVTxqBe3d5qiBmw6lQQBEf5RaX30QPwjbRClV1an+pW +z7zzXqdHFyfKZqYs8I3ku9eJF9lv+LJTkUQm70aYgDeAa3wHlGQYxdbu3OJJFhO9+AVpvHLqEqP0 +YTRCxeQ2wIVckN7gy85fkQF1hgcI2C1XWWdRpikMrrYsufqLjBkmRZSZkKgOlJiJq7LXhQedBlF4 +02mjfsMtzUmNTgbScBWyAJXLy/26jayoTXm13g10eZR4vqh5sSBWAfkx9CYVRYop0O2fgQavByYx +F8iRnFj5Z/4vujK9lc3EJd+Yub3lM1u94QlPVYeGSgG6DH+9WEMA2uuvqADcUcuJ7DjqjJbl9SIU ++SMsq/dm47CZe5+fWW1V/NB3rR2V00pMC8ntvI6qC0IZfg3fPCoxxRCUV47bihxBxJHWDFFB7G6b +BT9SDbpwYCDpsLgv71Tx746a7Q6KoOZIaRaaD5fYDztrI2k4RV+r3DjsBSJbj60PDweB2oTfKaGl +isC5PeruX3DJ566hLXuIKWJAi7SpGoWpPrgY3FoBHjOiEfcyiGhxxR8X7nCF/jH3E6UbSQeQHlGf +U3wTIytNv4+zt5lIIvkDEB3aUTYwSnWYROpSpBcBkosbDim49oRxsJGCRDZVM7ukjMb8dvdkIXDE +XbeDswMKVXMKEMLmEbieVy9q736DeL0HnioSjluYyymCkQUSnCj53foknCiOkLA29L2RT2IkvlBl +t7fJCUA45pTC6RLUAbg/+DkLwB13iPDuFmjMQ8RHdjViEKM9tmmRmpigc482i35xKtNA4TgZ7wvT +1mEzSI40+uajV8kV/o9YeYzTVU8fF/amDx4/9OvRpj5iTvXTy5vutR4QOXrz1d2mcpD7+iV354mU +1NAyVLhiVDMqv+JAf2jCqXsU/LR0VKyt72UtC+BUufJtXeMbSu7rXZITVTXfyK5pcjndQqcZO4qN +fpH7lhdBU/tvR8DrCKCawwiZ/r0hY05UQQTyCF/wFD8ZjuA/SjasYQtlIT0TN/KpVRa6l/Q124OI +bYsalQKxK+4W2p2Jf4btDu1X8sQG+gAu3jgGscTyWgQ8EHgsvZ4NEpjJx8DxSfGdmSUkzUfEMdGx +17bBZBsFgo9Ovo362d7tC7KtWeQfs0zVdrIkv5v/LcCj+gNRQGJKVpxun7yJ3kA3xK/SQlg1mgma +IRiOG5yq4m211P966NWoxoEXx9nolDZ8H/TGZKYksWwwaZmcYqSZwIrcSLP2EvMypyFXFBOYIxOz +GGUy3VZ/04jvbmZBTJYzGM9xUZvnw/vEUbuPQXVpkA9nvc5S3eoAezSk4Hki6KooGDpfWCiWVepa +Ti9BjPXToKB2w3LFTnecMmo0di9fhPY1tgcZkoSMn9GhNvbPCNs7ZXA0i9DUeOYnHCWIVXtaaPoj +JQj/ZNYMD89dTxkIXr53YzZ/i1WOcCtL77mPy96xH0NJuHQ/bZ0SIbrhczu5h5LU+Apf7wBMDmc/ +F/Ub1y9dnurK8bLeTN3O3J4hjAK/BLS0cLGqgtuAmB5ILQIOe+FUXMmhlcrcw+2A+zgdUvsgja0a +YRpVRemPm7mXRtwQ4x++wIisBMy3mdYceQziDURPCCaniwHbxentYMpC9U0oJeLyee9pr2nhQ3YC +0C35D9j+VzPG3893xMfxbMU+3MOJQ8xAeuhoRwqFNA5YPsOWyf0XcQGBiQg98ad/rxbjXHHnQwo2 +po0Xe8Jj5aghEbIcZDKkY+s9Ht4f8O+vXULZVQfR+YRKT7YhWG51tU4Q9fUEcTtDW9TrOl+c6SvM +Ncs79BGofdXRYxEwnrKayRZjOob7IDAAmIKSwt1yF0WJJ7tQPmqNwFaFIaR8WsV75Jn4/1zFwDjx +N51YojdY4Ifsx2eekODj6J4nVpRP96Ne7aHno9lYts1VrkV4tC2Neak9QRzjBDnrr3m7IrsZ5gpM +vWd9b8zyZdd1GqVl2fVUdGk+HeJtJYauAJuJe7KVLTfhV5OQIA7uGkLhmuWoyzFAQhBQoM478Cog +/XqqXQUUWmxGgjYHFbjSas+/9ZjldEESz3NnA43dWGfxBxuuq56+aumDj1wUUokTEsjduTmNchNK +VGOB4Jbi2izYKJNnRG7l1QY2/agbANILBDOSa+vIWbUxD79NJFrY4i5fV4Tdork84+3tvAZd1BBi +UJMuGEQ0f5ycCJezjKUu+Ili9zE+Tr4lK32jCI4FykUu216pMyUImMVS72DJYUtZYm9miuszC+Jo +fZlduaovKvO/Sxe3XiMrWHAAYem4wz15b9u7THlMKF3EMjFDtIdokAHm8KrGcXLxd9glJEd+OFEg +LGHOYpbuwJm7bI9DnNdx/DEkBAEwL+bVSqiTR7XMol5J8vvVSmhwuyN+P9Qvkvf829KCsJGDsyEu +mp6pFRfefGpV6pj0wrF+VJMpTCFlDJJtDROvi2R1FgSryB0DhtcQW+A0QGvEqDSln+c/T41uorDP +oAm6tw/kGzwrY1y9swXLVYBmVD6Yd71DVQtJ01blDcqyKaugEf7Y8rsOU2RxmB5Wwoayedqve+ao +5ZdbMRoxfXuzLGbb6gwHi55IBvymBc4F8ua0XmtuJtP5cHjFAlLDHJDuBtr0Tg//FISpyrH+r3Jw +dZIAne6uFLiajBUQnm3HgL4x17k3zt9g4PcS1UP3jsxBeb8OXdQbp2hJf4RcVyvOqp+RcWEX2rvc +dxgcwGHqSSnXAexWRV/9C1aMwKN0vO6P29wW3CYLx5zrArgiFJ8cn7+Qi7X3k6cWOvyQSzRJSyIk +vwjv7lixdSZ/ujLS/Y0vbh8ifws10gTI1PGiTi3df1g18G29/yVW0rBRKsIZIMalrrTkhQZkm9cb +Yysy6lFARsKxR4rBqcrqOx0LzOGfVXJP65ytC3uKObNEIA3MUXQ4n5pVc+sserqy09fDX2dsos6U +BbXvjzMQNRIQqJuBKFUc69B9w6B2Qy0bXneALM0zO5ZHCn1HDiwaT5FfXS8g/fNtr2BYreTBLxes +0G/cODIONtYGbc0eJ16AKMmP4JcSkaOYI6dZskYG1P5ueOu+zaMw4C/JddY6Q6rFGk7Goks5W6eC +gRDwbPelEor5n4MVk/D+QKnDhAYE0wCzkSIiQ9+3kCbjnJ3uO20rEO22lLcE3/uvaYCXoiMVeFyq +4MOluQShlaMTXPYOM2Q0Yiyw+m4pfMIii3b2XD45dXfSxhQJRwzUGCPsFsve6wjWuMfpGomw7sQG +Cq3/E/yIjmfgXFOC+WHE/TQpYqJQH3u0YWnbtujrI5t2Lfv4Vvw0KKVGThypnOU8V/e8AnAtv02T ++inZsPWmPhIYjiZyA7xjorLRU78LgIYgLY4qdWWlyddqZv8/VWNzJZ5O6LCUtK5zm1ChYzwVMFSs +ALN0GQtrYGIdzUTXhSt36M91OqNXitaR7ITZsNaC9uWGRDJRhUAVTttcxbmba0beBqQDlccB36EC +H8KACvgpxCVx5o69K5doJsfOw9Na2M83o1aBvAr8i5uBP4Tow6efV7kP4mqUBTxH16KA2bZP7vgx +rI0A/YbXjXy4y8K+gpM/6fa31xPbR9dr4lPOvxaGOi8RRYPZWhJZ1zDPyzzf+upXcDjPN3hQaQ+c +ZHneUH81rt+rjMzksHNKMdvfeptwzRJt1qpDYLABtVvVnL7QbD30mKest4ZVNyEYfZOSt7H0kjYv +1Y0v3UL9xkLab5THgDbig3tmqGmn3WMYYCcaqOAh6cKpXpjl3C+qNGg7LtKGFLLRyT3y5IWvspMG +q/XrKdF1MZTr3f91d95HP6vRGLVxGYA7oX1QMFEw9p6RC9whKTYM65AO6wzpP3GBmYDYalYSYULC +kC++4zNcKkTbZlamHvzROur+P3MYPHOyYcFjA3nb3lnhJ1wG3CuDAGJ8OPXjcW5SQZ3zeju6fhDJ +ObIzqEm+NcqE3Aus43NEcxF3IzX7ZhpO4/KDuS+5qdKr/KcMJufTEYExT6QPF+Cxztl3sXx/DjhG +XeakoxnQGY25zgGeAssGmcirGWzS+4IqvjxZJY+JeVpVJsobnpE0dvXCpXgkHs/vsMqnyNCQZxP2 +2Qc2KlAcdx8wWudA1uSEdAZH4wbo/kOp4XKT/uQqil2AJaKvLqg2RURSIGvfzvseSWYxMY1uHAXt +xz+W3mn8+DWwgyNZCO3bhE7l6gMNUrbSxa7kVAqjrLy2sbt1Vicgvix8K+M+CefmMZSyqbT2KJ9D +TfC0uExxAmn/dphU7TsQtIQmUcCjP7gpRRUO6oTgsO2Zz/oSjFAFGob0ZGokZkfyYF33xprPy9F1 +hvBUJpj2yK1be8Fw5MmnwY5J6/8FGgrN4dYczGlhSRuBytyhXcH1HLNEopdr9a5/VqNnCR0gM/34 +T9uoFh7gRh9HBZMgq/JsiZeOaJJfOA0QeLNLx/0QAu6GyaS8gHXc22HoU6AE8R7308NpzMfr7OXY +r0xgtdAYXzmDSl/0tQWlJWULLV0wURIinyt9OohxmRX6X5/CIqMqQMK/Px+VR8V1iGELV7+IyU7u +hlPR/Ymgn1jfyqxajZzQOIhTFTQiUk5P82WOz7lypTy6334SWwECefoKFoUxSuApK7nrEG7QTGCX +8z3OwoBIhVWTyaBbTF2ANvulsGxh5fZUJbVj2P6tS+WwydhgaOIVU0ESYReemaYUSKC8KDOAKGm7 +2FSuL6QmXeVnYrYruXlbm4PNxDfwi8NqRM5xuhUl4V2h6W9qq3olW9sSqJEqaSN77Y7+TpXMe3AY +OJvDl1tuCj0sWDl0DguUie7I0bokrdAy3jRJSQQJYvFCqIAUyRzZocnVpLqwAhluSK7R2QDUnIfz +rMUCnGHCx/DJgVicjn/e5k5nEp7IfAqMaRtz+g3UY6azVRr3vPOFqMfZkHvZ4r8EDDczUvI+XXv6 +RLrZyYcGK/VlkM0JI8Ob0G85VS5ut+B3V2v1cPrzKgRgrHuVDuoN8W4ZbzkZ/9RXKUZSw/mLSGfU +f2hL8PXHkWPj3BM+RbYqjIkcYus/anRxsP51gHmdDfSRPV9SQpHlzLnBOylTbAn0BI1wXDVsZniI +h1Ib+KPQavLacVd1q72mdF5CctENC03MuzgsrVXwgjYUI6X3GbQZLu6HaCJsxE6yCSb0f2J6mMtJ +5PEbgueP3Y9tuyEmWLX7tm0GpghEFGvRyxlqO09it8BqAWj5V4ud3HIZla/Jk690zkg3EVKEUd5B +u1K9PtEB6F9USRigpq226oUci2nrHmwMsj7qC1nJk0moGDJ38ALkNYWlKWJEnvUU4SJx3t6Hv9pS +Y5OnwDpPDabuByzDK0tGaBrM7VZIc7jJ1dCanbL832jGrqHwJMSfhnayCrTFO8rA1ERk+rWkU+4e +i6aJiyEZ0VwOPOtN6TEhHMj9pgV55/tnhpyPd9SnKOItQ9FPemk5TgQUG1NAeWVYZeCOgzx2sKmV +vzVhvKncJKeFt4nArRMlGBwX16+N2oIV3n0nyVKYENCCw09vHBBqYKKs66eQT0JXxB/exs1BgYgS +1tIHBhmtqp22QuCdkTDh3BrHN9sxsvCLq37d9vqEJmPhy8oPzEqPPWvKjKPldwLouQO8IE7WvOX6 +7ytnxQxA/feJl78v5Fpln6uD6FTUSNqigrnn2hinfIvqmYJL1ty1E1GjaDfHiAusOXCFu8TVgSHy +ZTaXiwM+zWUjCPtEHOOD9vWow8v0RuAklY7jKgVkUKtUUuSqTYdmhZ7rdwqM71j63jm868u/c0LZ +yQaSdbcVWKS9N9OGlZTQMhQ2e81IJ+SIRjrhD1lIR7i9QoLjgEX9m92sVZFwh711wdpItMjUNaKk +3Z8IV8BD7LuibS+gaccCRsRvqagNakTDWQV91dN+iP8fhlh9v/H1MFq+AzI4Zkznbvau0yVk5w0G +YpR27MwmCOUpPfj5QLYlQn2iIhWWnYFli4f7//DNDewFAQRqhVEv0oVjcNX2IjtK44t0bIpFooqa +FMWbgKJqMAVscDJzK/7d3quSQsRQ24hpNSpy7BpWwlWMUuvrJgT9q94gUyvZKKnqlgOHjz/bb9ts +/4Hf+xfvod1ah3N2tEUSbJjLln9aPIs2qPCxPtDOxlZWZKpTxFKAII90rGTbjrd1BTwgAD8Og9Du +RaK7jXOC2tdajxzD3GrR1ziKdmmFKEP//BI9r/GiuijJ1u/6wZYW/AdAJWtE8p4eN0stjWP89jy5 +FpbwPfiemjaNmyTm7U+eNWWv/oLFhdge6CiHYVAEDhAMPp2Q89Kjtr6K25wsjk0E6IYYHDlKcTEP +mpbxTNgd4QoEpcUpe0vCQgWQ/m9puROf23p9lEpUI/PEeyOPUy/xK0t1lo0nzJrrNv8zbJQniN3q +KgQfTASyACv51eiIy23/6Jc46D3T42TPITLDaqo/IrMRyApv/E7RC0G4G+71MSr1trfBOZSFe5pn +gAqveqnlnZYGD9pypQo5eD90DZx6HW5JpmmhnELLR/GNMLED3wg3QvDshWke4FmGPE+cdt7rlCo5 +AfCiKtad2Na/F3ENF3MTnAbsZX8qDsPBdeeLnDkMKf8quAWIQa2izXthJBJUSfGh7GXbjz6lqODn +Gr8K0wXvm8t6OjziVUq1xGT9nv7SwTOdvrT0ncN7yoUyq3Cjbe1iHq5pXhwKAEWqti7uo5Sp1xlt +XlK1YDl/cfpzPPbepuXKXmMfJ632lnztxjHW/wpRfOw2gAx87ZYwsau6dy/fAimpNYj9Bvnaxz2D +Ioxq+zhpvxsed4BD+rj6xdWcY3vuJB/HW1Frfh5tEiAzlmhH8RXGWXudGnFpzfQzeCMCRbbtXkzQ +e0Qgc/I0uSB/e6g1+d926Q9Uxq+knobr7DO9yEZHVhfdzYZKUkHhc5RTjxG3tqxLfh40EQjgLBwx +oWGGl+juulm/0N2efEoZs6Bz0lJRgCsKDJBt/E85Vf7qANbyZsLJQ0u3iIUtXHBjyaqbp4Xzg8lO +w8A+csfFUfKAH6if/9h+EZLdu+1j75PlQ+jFiLIEwHbRUzid4bySDCOuOMX8ySYCbWCe8xCpT++B +6oXm1/TUFIbo1a9X8k+1TG7HpTcCgOkUI55AY+KkLBOXYfVuLna/Tarwnq97nSdRjTuLiiKn6V/R +5O5VH11KsXbcrqevYBhuh0l62mzDbC9vFNg/KexZgfiVwUimjXBw7Zktq03ioQAJObkICdm5rXRv +JFudM4VnQ1GVlyFOTjYbZVpRWwWwny4J8IFk8WqMJ0nMf+R7y/Cww2ptF4NuOP42te5qqbBdZEhh +PAKL1hO1n7nNrYHZ0c71kdhDa+oF9/Dp0KiCCNn2Kl9uOW39oPkmFPvaS5CS8qpKJY98odqvOHRI +UI4hgFdVUpExS7F4EnhV0YRbIPEvn5EG/wHJskjslTLCBJEOYReR6K0KlPmRJB5UHI/BQGW0w7aL +rRtda9gS2vphSHe13UXvvJxxxu/Scerb4XHOesmSaFUF3hi0IdoVnuP62TZu3s0R5FAaRVTw4Rld +NvSwhWHKPbvYDFJ/vGt6H2q31KHW9P0QwVRhLBisSnAwMUQnuc2obAOTRM3rMEqBZD75dnsHmsrW +JJBQIITBln/vbprufXWcCEfiB3EP8RLWYSHI5LKGYSBhHaGLGSwPN1SprK2IC8JVZGFecflUPGL1 +D9DT6PzB5omygP6gDlUpg1HjmNUKGhpn+LHyu9ypMHZFLdFrwdPlOm8B9ZLZINPA6MWufpj0l7g+ +lzrHJKkaUyxuEl9OJs1f85uZAQH7us5YOGRiHl9tU8GPlyjDZ5qg+WHZXJz1Hn4ta0jK7piZsVHs +NVx/0gi8xkRJOmV0jIS1ovOtsv3Es4XXz6Y8s0oMdpNUq27NTZ0QDuj7LhQ5e6LrV9Alrr+sWxMN +gD1GTwYlsUWKU7iCsXHTkoJ3NLxs/dT9irsALzUdQwK24AytWDB09qubBjA0NaKMQQzeK5XYR970 +S3tEJ6qQDP8hGxO4ifc3cenbmm8cT+X6vzgOqrmH5oT+nVyG5LsuequvEhpm3gimKjHMw2pSvHnt +0FDvVHRyrY513OvtvUFg8oQABTCaW6zBqZ4+M1UtkbRZl1LqibYUtDukNu3w1O/+Wy/mhaOnDk/u +eZJ4egrofiu2l83kmKaY4RC73zpqieI82siJlS3YYZ3xqn9/AaOuLYW6Z/p1+RJQBZgMec/Vnf6D +BvV5khY+3D9vRVSfBMe+yVYhXgAuB7W0J3k8nkcITkpEyU6zOHUeGQ8wHbv89oFXXvJJJ1/JV4sS +I2oX5RgSZKlDlVDCgH2NORzB3FabLfcMVLtG4M8Skwev0UD2vQqQZhGF/u7hsg63/28xW/aM+2Tz +kf0ZQ3GQjuJM8r6qgKh+jwN5GQRDEea0SxKVMgFnZXQSqpAE2HhHMtWdCMyF2n8q2XKlu2d3YUCc +mzv1U9gc0/u/MMNcIUA1aolRvSmUokv0ScBvttzX397NjF+JBI1OUBlt1FTjVHYYNHZdg0IeUJ9h +hinA1SdZTnZ4Fd2PGXYEjUwimYwyJeNj9KcCAPqegrfQ7n6Kr1QRCPEcvuADoK6fYGYeE6AL4DWP +r74lRJzFBrBRufGr1QrHK+oorcUmtsFDAFOxFQCD2qlB2GtV56eoxmx9esAtFje6OM2WTshVoPy4 +RvBId1VRGi7NIUZXHm7chPkEgHAgr/pISETtTHWa96hk3daJOBRKrL4fcj3Wck/+MC7+yJpwJOfx +63s26/qHEQu8qZ3bXJyw+n2qE7YfUKQY7NOZfLOUxYVToM2mnYN7/twy+EqBdEZ8GwHQEk+aQHtj +hd3n8jODalJ9A2s+kbjcXvVsYt26Ucs+ip5AynY42TRH6YLYZPZsAhvecaHjHpSyMwX/mpvTZ7lI +0UzZX2RgnC+ilCrBfb7sgiC150nt+OWOnGQyZzANBnsuPrKnmCL5UJC2YCHc1KwjsOSfsH7S/x5h +UeUWqC49ohO10WiQm2NuocpAMG0hXj5N6YRH4RIDpzo76O+KGpxpiNKHKbRX/PyHXQYpak1h0qxn +g3CLJeFXnKmiK4N7SjNKfd0fGqhAvPAuNwTdJ2Z5WRvBMPxsxuHAhyxPEZTiNndtH5TaSxLUfVow +84pC9jzSs7ZTbf1DAwrCQa5xOmOLmJbA8dhnurJAI5RABlTSqwiXs0kAmvy3EphaIF5p5M1NFxkg +5DNjS4hthOD1hPgYormEl6yOKJxNX7qyZXjTQqzE7/9xkB1rp9EW/+SaGItjgJ9YD9AyyWRX+5/m +gS29unUL43IaZ3qjMVlh1Mc5mBN2Lwn1Sg2ELHFuCiU1o4fYyj1fng21ribjAUNOPKlplJhBWjVy +0EkecpYt5/GTGqG/5oSVp1k7c8YC7NjW7AExaSukj3oF/q/MVLiqk4Mw/NIM7xNMkJcrF174qUSr +hEEFLk/VVeblodjG4KAYipmTBqE4CcVDDn0WmlV4WrBzvKP8SZzDQWOzQKnYZx6UXNa/KGWecsL5 +hbdZHEAdNmKP3GaKmGCV2noMFN/5x0F6xqeogRLAJRoY0W29sijYtfKwrvDp2MDnOCbUo4AQFsKd +fuKH8/Zx9MyG24ntALXZvtoYARKN31ydeGrtq5oFGF1GR5mCoYktdFdH69DltEuucNkHRHqyGFCn +TPWtvp9uscYa8/J1AqulGrSeGNHUcz2qYigXLYb/gOcgnxDbSV0miQrBbw2BoYooQUXniNjRBhrW +FJCtQ0EWNxDpFU5hCzjyXPFJQNtl6Ru3CRxLN0l88+KNZF8nFCkpJ9kodjZG24FhX7/q2ijMzrDv +xZw0pGbipSspXPEsBDhZBLVMYwfVDHQkpgvuMLR1LOsLWjUGY9vTmiUXYsPFAuFRDVPvt7UuH+7k +vsOeazHT1CxcOicvg1jlkqG9HqiTa52h956cjn3aUg4dnzWpWfTx3loldHAiQhQycrEvtydq8Vgj +HwP2tAVw4DzzLu/aDTO00lV5gPlxg8TaeEbykqVb3izDqgscMPkLvav/Hnqkb89SPtmzASXsbiCb +yq5xwlkRK4Vr3kBbK8AvfG9jz6VXJfYwpgyV6xIMFtXz3qnTJ9rchfHOg0kskqK0WEPCnrSCOteg ++CJA+leACDwfOqKJXATGChCnpeHOGz2jmxi0W25+QrLgOA+lcNeZeatm1XRHjTAwuoJbMQIZs5W/ +3VD0qSPpeAFwgdIWmf/Ct7uAznrZYhI8TAF2AwfRKZvae8ENKvtRr43FvdEoxuEerjlEPqPRmBln +ob5McTbrCZXmlC4kDpvaZe8PH68joBGjhroJ2EyJNqsPth14xJgkHoiuhSkbOyYArV/UK0a/HZfG +i105266D3rV6ruvWV/9BomXtEhaDgXg8xVHYUaeOEorbufe6n+bSH5yFBLpLL5WE85El2u49Gsiw +XJ7SNrWTbk1Pb3Acib+M0rUK8i1+iaHbxP/d8hJE1oVpEwJXnlciO655g7RQAsZ8HAy0EFpLnIjE +FfIU6J4GMCUSx316gzC3pfpT3yaAp2y/8UUDtiZLnr7kOBLZUioNSe4Bal8B8oopeLktE3u44rxf +3p3tshQzqHo6JLPYe0ftcFzNyNUrCPNaqlrMr7WcrwY783sN9KQuQjXZSB6vzaVkGnV0OJscdb0H +pmptzxszZj3fhdsmLMEmzwRCOpbW0/iKE/WxsXO5S5z9XVx5jG7Bu7slxzCBPVzp+YPTjQq+lLc/ +oLbqmGRJyNq4IxQGain0427CEI7mepWEJLiaDLMAaS8CnqXvLkiG9p3+8I+dAiM+yEkwF+YTCaT+ +j0hSUxUi/gRJzOtXGNM4pRE8k+TgWIhuKD28vBKyUotiJXWAJfN8KS6IbPZN1I94bs6lVjYRpfbd +mQcvV5ZhLYCrlG6pfB9w3vOiS21bmvrJqysljTshDaGkMSCUF/9TIbVCXFMpDCxMUNDIg+hypONh +EUCLn4U2J/lAm384TTtvBmjJORTG5aULclctd1qEUdOsNyFlp3UTzQ7OZoWNrqmfzuONqSPzPMy3 +Q7Uov5e2vsWgGVqD3tRIb5mxHv8uIlek/f6LCdBk/S8+Tm8SpvAYTaRN74VNIpRmOO9K2lrbium0 +JCH8rYgTVJGGPXYtr356oPElJI+z9dqR1QzX+xLXr/TVyPpihVZUGW4dqaFLBQo9Hid/cSXIPPps +3hbI7Jm6mh1f5Bm4KPNrsJo2DZdwpoGv5PQkCBQdTZqWRdhmWMfiXMcP5nyW9jQHWFOSprOCAAhJ +CpUCi6Eihh8BaHjCcaRczdkYwCpPDSKbHRqnyRwOYfUlnPrnQJdByEkKxe1SSs9q+ON2HS6VrCRm +cRi5ujy5uVf/w+fSXOHXeHQ9f6OOZ3Mx5kSdhuWtx41wBmcg4lT3qdeAZ5Gpoqt7Ue21Z9w5aMUT +vYbD5aAJ6GBXD95UEWISTyzbMRq2x8hgxQX/a4SMcWvvG00HBGYbolGpORTbwg8Gfa3t9pRCO+8G +ZmZLRi8R8wIuDxakyviXrOhuKyGK6SZvP1EqAGViLWyl8cQiOa+uJSOW4c8K3/fdmCLxxcY//W5P +JAGxDf1NULYE8Q7IYRmQpsvfKvqugDfUTLHPNWalua7EbsgUV33snbWRbv9Z9yD40pB14F/neQT0 +71TwSmUB2HhIAurLZ1Tgm8RtrW2zDk4h741xb8NipyXLTEMWXAgdt/sHBk8tG7HSERoub+NFKD+F +/K3FGsxPAQwLrzi7MEcV+WQpFe/70Au6NJXhy6FmqCKc0yhfKZ1HmRcH3nR7smWEm6xNmDc/tdze +VSnTOMFKpNr8DjlXrmxgboOzov4UyIB+DLa0FynyTKXbG15FtK7sTawN0nsUSEiKgk6lZYLJba1Q +aS74GAVtEMYvf5UJXL8mOqTJBnyOby2rYL86HS+uKaMqDoKCoes3W5IQgz32KXzrzDn4g+/eLV4l +L9mq8U6EKrmQwKtOtmP5o2K887wyF1aDOWDD+V8GiRe9LYDW0QNVwhKIR4PVMAf/b1r9VpGbuux/ +tB0f2Z/+aZ5LKF9AvmgFcELECLXabLzdlf9tZYvXp1kpox84mmx2hlMVLgvDOAzrTGLiuPCHFY4b +zmoJPYSA2n3AzPGmbJ758NezOHt5f9/62crmMT10zENj2lPDTWS7cB+PTTe6SFyBCAfiXq7Rf5S3 +oeKyM8WkruDNTFj9ckfgBKWjJ09cyhe56N+q34MMBvGc4IuRxC8fFP9cf/S8neRztL/ZC4hZoag0 +wMsdnm4ftgUE1BBycvbhG5TOa+QfQ+1ZBDcRfbL9Lhp+DMdFCxkJUfn32r19W/erdkBMfzVwS81r +RP7jrzcB0LD3rZ50Vo/0TEyRT4CBPUPFTTYYLa+lKKE0sUZ3BI3/nyKWydzsNh2qwkG2q+j4tjGf +Sof37ZwgLuImu9D2HNJAaXBMri3sfZnjf9ZhKX49xCIjGCXE9XEy5NvIoXhtwzL/zxHahVOTzryM +CuLkvPULeN8x+h94SPJzkS2uKBaNg4vJYcmXKIrD3KUHq8TsmqoZA4sosFZYE6LQ/znxE3Z4D1fC +tG5ovgYvMM46uapLi6niyq0kajqF5LADHArOAv8hVD54VrIccEwRjPB0kYpkM28PaAnIBvzbQ+S0 +yTtDSNL6vcXuF66qi1fccizr6uIAZq1K047+6BdtedLnr9wmDUoya/MmCel9ThSqERi1XRIBTIV4 +jeOk0o7t5Aa9VGYsJVCHdGra6xlHBe4m9g6K3BbdDHUnFT/+ZH42z4v3LPoUAaap2UAnWmoNCeku +NsX5pRwx07VXDkIXuDlBsJdmL5IvT7JVn3ZpnceeBq/mHpopsTNq7iezCpO+MweWAH+jD0lYoEIR +3OqLRrFpcxBwrxbDVSdsmw1+3Ec/66JVRzUFhIaNerubvGiVwyfdiTO+/5XFSnUXoPvPGfyVck+D +TEi0b7ym7y8NBfryQLQDq6Eh3yy7a6PPG0KBdAsp9P6ETxnuKISPo7WbfpxCAN5DhuiID9an+EsO +rrGUiTKd7o3jGJN3DhJccdUb2/CBGG6dJyFgQ+XWys0GniyOcjz7zUja42i8o3Em7abH9ArA+nsw +g126B6BWRUw9zUp9v4A88Rzj/dI+Ujve8KLDyY0pCnv2rumI+xuz3c3K2uZ5wP30D/Oo7Pfi5OoV +HVLq8edBwDaDS916n9kzOteXhDCj7LWBdB78hostna5w6JFnsDiSkdH1cmMe20NedtUWRwo+4+d5 +HQ6jbrkA3FMTx5ks6gSOL5m9XF68kxb78JFKuiovrWkzxSdfauCq3ZABMHPgoaGcbhhloIS4Wy2i +pGVy2cIKmLMpeF+fJBQfLc2ue9uR/qrwHCREeCtcUxzkScsudYQMUmutHNRC6zElDeAfrnqH8Ic+ +NxtDabGHYZVwYqVtHk8Ui6ncY4CzzGQViTmM+vLnhRvDLIRw8OASAnElghhOIM9J5G80E63rrpst +QZVu73IUia8ceaeppFY0VUdEgYDGn0VVLmIK+v7fLongFT5+yShH/KZAz0WAoS3Hf9hWjko2rjlV +M95BFKYBgRrjQWIx61yffjWpvVKmVwCYqVlDIoyWu9q1CxlKDnZ9EI9d+kHU4avvaB/6+cNI2zli +BcxJH3hwwb8MyRz+G+7Kz01+FJbNpTAkV/FdOki06u/9Nk/UJl2C63eu79QiqZe4NdfrH5WGVQ+J +bx9XFI3z4Pu/9DVb32OqynqK4X2pZOToFl/IqPCjdHb5zWE6PswUd1g8QvpKRjesipbaGfNF6uE+ +zUA7CdlxMpeXVyEVOEdpOxmhxw6TTIFO8BeFuv49tG1N2UNKDs47HqjAEinwtyrhIEJhi9snxNRS +u5/tPD8x+Fovjm31SRyeMVAlvcs/T5aLQyjoLxuXagXQK3saHF/CNx4l8MVoitDtGBd6PfIP7MW0 +MmPRRhe2n74iW+bPRVycij6tggcc2fasLNr9y/v3z0pJ5EwXS+kX9wIbBH8wQH50rko1s9lUfx+7 +OsuxArwLj6i42JIJ3CY7sp2JMbfmSPrNjXSlhom5qPjfWVtkjYKDKxAdwwqYw5X0V4rJLQVQjvzG +y/v0gqDCtWR2zug92cFW2PdLUcllCGt9xDjuY/8H7w+uaLJFJksJ/9nHwgnbh4dXruJckU8qMdJM +Gjn7OJK7G+0VW+XihLBxkdT7xukqweoJpKIvQt0V9YHWUD8yRi0IdcW6IG5aVoy7BlBZLC56Rzed +cgDSU6VtqgCdyntGbRQ3yeC+ftY0q90zBx0zw1XNc4tdbTC70l6ttyagecyyOGJBWIyKIO9yVdft +9KFem/EZpo9COHvX9AM/U4fBtsNsL9BzWQXqBcvXju8Hx4b3Knn1t7uJQHtgAtvNiVxJI0bGtJqK +be6mL+5sWLaLGuRaTZfJ04o8VlEd5lDNMzr+uLKvqKnMb9271f34lvAVghHvDEXqSMnPOm0Nt/+1 +oeu2fARX4VqWJorZHEcQcpBe7gZrKSRmtoTR4IdGK6rQQVI3Qkj2VW4oupRAeyC1Opp3BTUpq0pz +2G5opGXwcuTU/PQ+zTZzmA+xAmgYYNr0iaPHMtxjGvO0ScBHwhVBXz/xW1CZuFxBc1Opk790rykL +3IW8fT/Gqfz0F7HgPDwob8CHiyu5MCchWRWVlbwFd4yDxjqkzHFnkVLqE4lqBys/ktIGNxdToc8C +5EGRT2d/+ROrNelpd9AjrpvZ2KqbR/B8509mxa9LJ7BmTx/3C4LniKddNGkZOvaBDqc4SB0AgRrG +/IxJDHTs3OpSXFlcDEigInX5wqo6FIh9M3e0rY7KHjmvdaUHNV55Mh/lsipjbe51o38ZUffKEQIc +7wntoGj3VfyTE5+EB6XNBE20EfQTEpVBSsw6j72xJK7sqH6MGFbd7dSJtVBFZk8ht9+F/ffOvOKb +SM6Q4KzBuxPyV1N0MBR4b4/RlvrP7UdooHBFZ2QXlet/sWYxm452UpmEsiND+n0jCi9E3IpLPOnw +YoKuPNpR35IML2wle24gKCZ2xX2t6OMO7QWzb7bPTn6DlX3YiY7NPClrTD3flo6mPgdWR4eDjC10 +IcCEY7IbqaYr5u3XG4NUNWbWfM/ec8q/8vyrJWiynAQCaJIC0KRDVvkBTx3N9jZ+6yXmlz3if5+p +0XFEC8WOMpFZep0AujnbqsSfT90O8dAyhBu3Luvbl1xudstF0k6PTm9qmoHBnEQky1NmhYs05RO+ +AViW/orXNflbLbeCA2PD7KyoWPQp+gRxRBrQtwaVLSiCNoJ8li4uII5OWRV5VH1Lkht3U6if5mvj +QmL9L/YEs8p1rrr2JyxfC7v119yMUdn5LqASpU4ENLmthH3AjA9kXmjRa71lAnc+rlwDmRqjcRDD +pQHUFlvprib0inIhl/qMEzk92poPCcfob6AmDjH+ls5ULLSZgESX1G4un8DkQIHQSnTOLY9NmVYB +S5BPEDi59keLDwvXWNwhddUy2oUHldc24E3fwIf9ouTJxFsnTCZJbcN8kJuDRuuEDk5Fvevkmk4i +zz/WsxFD25ikr0B5cMAGGjAQYDzo3k1WIm6IYWm7cINBodJiK9CSHsneOBthrZW+K8fpQiNnkpCY +myhIfdmyPP+TI4PRkkYCkhEolHWL/jOfvQJUym9VA8byUSNU4owK2U29cjJxPNX63+3gMuT0HC5F +odw0vMnjtawhQDHbetkgV8txZkG1Gqjd5ol+v5N9IVfLhfhpUqo8q6YFN0PaUWO9I5XkRYhPKZYs +9GEhhQOSOLoZALp/Qln2ueaLUtMZQmcf/AA/Iay5XmPTGIQ5aTpuYxlwuB1vn3eu5LdODLGWf60u +C5oJb1ln/ZKIGtjM4AHlbUi+I8aXBnOqetKLEMnHZwSpP2R8cYnw3Ov5kqE7d8JgSsMG0XNLv3cG +pC2VP4wTbkbaK/Tt7Cxzo+p2LBRWqrp9nOA8gu+0xahIjZPXM/fjEuqrUW8cf/zsxQ6p6+glL1gy +ZDATnjED6Rir+hSO6rJ0UKxwuIGufNT3mgR1CXqLXcGPBnbW6IXTNYydrI8ooZplKS2hdoRhqvCP +pKx9aGorpt9e6DowXgl9Ad1c4/RMN5qqcBmm9swJbA4DZ3VPLtdjwpE/7m/ZN1SU7RAAXi7Jb5qd +CErrGN4wWdEIIgJ34+M17dH+5JDqrwK397iLhPP0MwGRpSggQ2azqmbQfIoX85ejhntNiX96kdcd +HeJYn4zX9dt4Q09MymXCvMuV4VZQYOWxmGDQG4wMIm9kIc56mdFhFU8uc+Vkyf7CYL+/pbILf6DQ +2NQC7LsBfDhqlwzTHalIxI9wWAwwyNOWvoNt4/gB5ZgXHtNdYde1FSfc/9ATcDE10tl25AGaO9E8 +JHTMd7QvCbbDdQ2aFiBr+kp69O1GoLabcsEif50WcOBr4E9OqAQZBgE2KiOwMKyL83RSYVS2OuLP +/HxzPY37mn7NUAue7GKBmAzUa+hfFi+CWjyhqHPrOIPMURDm48BAtzQr6DItRmbkCo+ErlI3a51Q +L6nsRDi8Fgia9is7xpLRQZ0/6QUZa+OhixigPzUDDWyYsCzskzk6vFz/oaRVWVihHamfRHILSds1 +ovS0zKqh8WvH1LRJcHn4CG2UnLn3p12/7dJD4wvfYWGZVibTjqrwq1yd4ETfJP4FIidkL61Dk7rc +pSV6AjT3yzjy6zotOi/ksdTBCQSR2MdtiODUQauElZ6a/SsNVqHlZa90thPoZFyNuwHEh7Pnvl+E +rbXssUodLeEuLR8J6s5m+c62zOxkBOg0P10GZ7MYhrDrswg0c8q8XKvSDyfclBOYnD9ZDCNzWWOd +VpikUu81EFedAy2gd+LWhE6mCxBk+SWBpeLjFIis7E/VZ9JfgbZgW+PlMq8d/sq9QJYnEqjjKn8D +eLVxffxLhyBw3jBc0TFJHLXV6yzkJvvFybujAgTlngUWQOkAPs813e0FX5fzlLfkp1mMWIQZecUQ +5X6G0Mk+1hrr36CCLmXjzY7BOY8GbmAiIRVa2cQc27YP4w1aiHQ3VYxvg+lRDJibfbEaA/aJkI+B +/wCloEThTaZbm72XHlX8O2mWHAWto+MwbKbsqAeJaFSaha+CmcwCodzgp7hl8vsJnQ61tHhovjvY +KJoCW7+qTyCLTdQdkdwpo//i2LlmuOTUg3PiCBO11fdiKplJZXxQDjSxLYidcLpi4wmu8uZl+Wjq +3k9uo2TCxdmHqfMJ8f7JtSKwrPQYKLhiZQfnBy3m58G5SMKuRs1KJoN+THsEZDWexotdVlGwDvEf +iLtCCAAuJctbGj5+OZQxZj8RukbpwucEI0cI3luwQqDXbjYlHCAxdcYxm+3X/oVrjwHV/wmTAAek +EMkate1rF1OL1iX0GmI0lq4/KpnCZPhKqvb+if4Jq4Z7DbRqkaiLTB+yJrqdrcbqWkACi6rGr6Pj +QcA1YJKB1bpS4dtC0inojfpVECVVASfyfGtcfuSKe9yjS6meNfs001TnPP5nf0gqyv4Uz2DfSGQ+ +wvypT8PsHG9zbWIZV+ppm9KXEURKCIkOj/5+jAW8GGMiCr33DshIPON9JvGkwSWjgRruWnMF3iL/ +tGdh6o84hmZRDNTwdKHv2m0+Ce6PaQh16usHeol782zWuExiS4EELPve6bExInBnqm8a5lbYDc7G +ntEC4QxiU7BrwmO52U1ueyDnBqAMQWZOr0Y6fIXgyrARomLskdOWK4PnkOrTkO/qUjPpzBuIE7aZ +VXxDn7BB/VEl3MKjlN/jWA+0Fr/ijDyS3tdRvU25t+Gu/lEWO0aP6lch4N4OTZq5hWyHyqL+S0BH +Q8CTfb+s1w5m3JDCzT6GM5ZNUc2+YtTY6szeR4J7hbU84+OkhIXBdcAtN7Kx3eCiG/74QU7YuHco +dmNZfMwer7Zvw8d7OqXD25+UUP6U2oMJCRJ+sMLzOc13X2/Zy8NOaXKKAaTYkxuWC8vJuGS6Jxc7 +4HuzvTrb4oeUSw4gUSQlCnhfCGcYLnbDiiPZkm7ZJ4+HR8EnIcdcjvY2E3KLFYd7MC9/PPoirggn +Rrixn9MFIV5LwGg0Bsp/KCkq/gDWVp3pUe7UO27gAeh5T8w8h0TS7N/eVYpw3xVpwMZ7tqglo3Kj +FrwmUSPVCzN0qlYirnRBInTn/oNqJjDJRCw+3pRub2YNTQCO0clt09LFWAFAVwL1P2c8+HFlnXFO +y+ficHKk5YkLzf5n0fB7R9sSR3IC6pyeb4E0BLgJ4YG3YvENu7W+/e1H5UmVPN7aA3O4WMWLyjpy +d41G1bxmUEOnN4Uh2iPsHapKoHef1F8I/6g0RLtaXQOjOBFzbtq4J2LeK2Gx2XuFQjA1Sm5YpOYD +mshLEcivGj45bhQOWzNqdSF8I0KTt9RI78Tdj0/MFKn1OfaVGWAwoR86qS6954KlDKaC/xq8cTk2 +WzM1OVfqN3a/VIDvk+d59bWlIoPzElxwZowIPur+F83Jw6Fnvz33IWAGz48jl7IsJDJ6LfK8O+YF +nPQIqk//qXKHZE3Za/6J0ErbtIbeSuF6Dn4k0lc4v5E6oEalS01FlAXCDDdMhRgzUf8bz87gosnx +3EUpH6L3jchkP8OapNrSqx63plVFcn0S2l5A1hHfo5gimCaLPAtBT8niBNinuVy0YO48IQKTirtk +GDQmT8fxdUI1GqhEuy7WD/gOPkfdOYJDRU06RgeWOcQlRpNMqzLcaLPTAbTx15ANc8j84qgWnUQ9 +ehILIlm9D1tm0c9OJ18uFj+ggrlnLxTQotGzyWNzNigrGiKXwV+HcJglv1DeLVvb+RWDMzg0kG76 +cmn1xSosNB829Zr+52iuJ6Ii/LznG/2NSWVIzsmTgAW2yNY+k9Cw61v2LGMzaK3evzVUyRdDmrrr +xe7jfHGS0fv9NI8bj/mgijxDb1AxGTF4tIuKpjo8D4cSY++MmOol0ssI1SPFYJeWIbllVx3jaIoA +fUY7BPjkqhWtCv90XIjQgoP4QOiR5ZvXR8oLMamQNPFiBXSrq1OpHAwf9jmfLDSFhX5hSirimuRv +QsCBgM3vye+3QqeD4vJd94CZJx7aZlnlfdK79fXLBY6dtL41ZaXbjaPgZfYaOpVk7kVuopquTEQ0 +COQTeH9ERluB0FtuPkvPts2xzSxZoUUnHTCwiN3XNL1jmS9Lmfcb7boTjRtD7tIJ206eI6Cejstn +bMgzpARF1KF5BYkVxlUWM9Ldm409/U5iMWiXlp2/AYhDk4LUcMQnaK9TzY/tv2HvIYahO6CDGf/h +x69R2rKuFOBqhbQwKf/EXgzOigzBMIpxT5VQqd8qRby+YSEbeC9n8rArHf2qHsECqgBk8rcwJYyw +WVujxA9beyXc+Ez1oOsNh317LEK/gqd9NWhX5VWFVR3PBnD+SWRwfDIMvyj9VkFofKRdsxBvIxZk +ufPdfSHyXf1SrvBIFns+KlRXHBYy4UEt9gU7kxZGNIajGQaUqX9IYKvGqwHRCFd9LpbwRW7HMRSS +1eKl3QCydIpVTvAxXT6iu9mWDF3Min9QNfDjLv9r7I4U5MMJnOS36JRvXuV51jGUTGH0NmsgujNQ +KO8DK1vZlNkHjQvKcBK/cKYFWAVxZkesgKwaG0AwTEIt1F8nKpyQVRyEE4/oHAX3id273FD3UBhi +9uuW4IFHPEgMNx6epTsY6VEH1AlFQY3cBU0XbXTPehC9zaOITgzvVRZFS8XlxT2JSFqFW0pFBMg9 +IwMVqd2aFMSEYN2MAEoZxxXvhx/ZqAuQIY3FV2kGHY+A5R5QjiPy5a+l3W5C/Fb4sBDwHOyto6eV +Z19yAQsUrZW6+tYLvZr4IM+/le+hJYp/93TNM/ZftmEEylaRa9sA+Iu7aCr92Cup6kkhXpO1c17o +wADyC1KtEO734Y5RRv/jPgdTSoDCy8n7YKSV1x6UaMdoEWFLdaJnxZIXIkW2+UFgqyt0YchceOff +bwC8DRqKTIEawl413Al/AxDNpLKIeP66NeCZscpp3+hXfbMrcpjLG8hle0Ymy2yiPVQgddiZ3wJX +7KZ1eYHnRaczMwmMDLXeI7893qHz5JrUY7PeVdh/PR33sLeG90umOYGLgSXVMl9zb5pJw+xkCw7w +zAzce6L5s5DSmoxp8TvmKwj00AOeK5hcNQl4Nn7rMW86dcArxGOPRQ0lLX11RFxY5BIPPXry5jdX +d+Uy3DkQ418snSOYhxYD8l/5EWlTAuFLcfanxumJObHUXUC5FoeGZfSjJgP9jxSKBY9C16x5tlFs +8nG0Q95twKA/bbKxjp6W0xaHLyip3qFD2nWxMC1vi1DElStVUmDoBPrWDRzjlbXwlGdmAemmxzU3 +rd8Y7kJbCYeX4Kza6VWWOxnSWh/p3rrChMPywmOrvaO7/hKcbIguY/xndDNN/yitHfFBj4Qso93a +f1drG+4bviiFecjfbP0d8OOT2IdprK7QAvDzSzkRVSh79gODztev8ZBJsYR5zECq0NAlGUEZt451 +bCD2wYZOG657VEKQ3pSJdBGivsIpk3RPP8H5qI6/Kei3by8mkY38/ZqehX91Ymv84Coe7JZaDzln +cbQzEM1Glz/wEepbuYfJEg7D1q/BbctBR+uAd69+qioWGsNPSGOtA7w3EHR+Mz+gHYZbbvdC3tBc +U/Ok7OrEewq6TL3eVM0bZaTF/Nrjx2ww5nIil5KgFRy9qSKffX14wxq5U3LulFaUxCu7xXgmRAgP +2l+86Bd0r988D+63N5OS+MivYVQwaphWtyCTuPviu1tSREfI8ETguxH9pKffAGCCW/z0kIJAPzhH +KZ8Oj+jS6BRwvGouUEDlqSHjYL9YrdWkHjQDhkJ38Mj0TH9bQJ5glil2OyJ6MN9t8sl/vQu+TjtL +lcIwjynY9Pfsj1SqBUiK6uBSmFJaW3ixmdO6w6jmBOwbS72YhO1N/mYopnKgx2gFmKpZ3QHR7ms5 +uooiuu8BJnQvsrdixhzkhx0qvp5CmB5ao0lFuou1718+DGyLwezvWAGscYpB3gBpNzFakuVapcVZ +cie4l741vQq1zyX6m3GhDpzNenU+iW/wWDSBLX+dwNwGpDoytLEPcJ+mlDFxPUOBx5Xie8/5Capd +MN7I6hSBANHEhGhLQjxpzQ6Tnjdfd9SRxaxr9qoE5LdtEItVsmNcY8JboopDAf4pXFMBMYNmZ700 +IYSMWu/esox+gDJToduMECLq3qvjPqrq2XRWxtZ8YzydPL112Tn92ZvBRKyVf63sYv48VwlrSQ54 +jiNKQNiWvtsw+6m1R/HXiB/W3ZP2IC0Vjy5inYuK+RLlGeRBVtYuSryxOprJloN/AAYeDZVYBWIX +R+wGxbH+6neIAC1zv+XGkZxu159d8Yc4pW6U+2SKzBNNqPm5wCuJ2Jzci/8piCtH+Pr4JFdOHP0M +G6oIF2aQTQiGPLUBIH/kRYrOhwbpmaTsLjsk+gv7xv2RTUPnRT+/EFgMIZu5XD0U55nSPcXFAYSo +BNJtpn6nMX5q7tvMxb0HnL1Dje337v4cMAuRSFpHsILdDJdDNKLtlvSAQmXKzOkG6+/fDvMYJzx/ ++rfOVcyoI1yUfL9/Mc+H/G5fs2I+5qUFHN0lC5JenmKTMMkk3JygvIyqKuhhECVcVskoMCQj41Qf +5EmUZJ3IlWxcu7Kvx7f7bRziKIXtAhsN/RvzqTPWiqagx0GPG3Vs2CYNtxfpbsmpgX4CSHJze6Wo +2N1B9m+QZsb0kvEqDjVA6+IqaIxQwjkzDpSDTjYgJHj3rnKqHvEWJoPEq8jRiBwKOtd39snYcMNS +UsWRp8ug+eoPQYcqSf3CpdGUj9udRs6+K9zQ84IcYKz9h15zcYkyrYdm4lyzVSKodok5i/aUMHbh +MGw1gDJKzJqMhbsZuwIAzvLtd3S/Tow0E3rAzSf3qlZJ3H08zQDmu/mwPplFMKg3J7X+6wFeeRUf +jMkETTrIaxhfSJweG+FvKXuUNSAJhcYgVpGOZ4Toam+aSWT/cUw3L5UCC+RQMJapfEzjgUts9D/t +fGc7Dn/4dtqhPWWs6H4qqDlw1t7tm1E9aysnNCBFusbRDDNco9fiuxPPVzEKg2cWMt6fBM/yPHcZ +oYQvotuOeBJ2sV2wjrnwoHjH5FTcPAlbW33HcW/j6JrzbaQJmycX4l5TVfF9s3ZstA5eNLEtV2Qg +6u+Qs9yti7GtZOgQukdbjDb3PDqtjxXfeolieNob7/vEL2LinpacgaeORvzZcuGYZ26fy/HGWZe1 +DtDwtzGHUArFLUD0rcHLiB2yVdhyDzBP0u4hO5X2NNSzDZEII/CP1twjnAtfg+RV1WhdoCs/9a7p +AG5xYwVDh+UWKlD58Nub+Z+JcIiiWwlC/hUz215BTnMI7QC6DZA9cyxrOJV4+Q5jWz+m1O3BMfDb ++zB/mUQ+cnYATrMbQ7e6GTXUW3eC1+TYElkpOUPMqkyaDUCX74qU7Dd2We9KhvXbVCTLRn9uwuOS +t1YRh2yizj5I4Qq5x5zIIdpk/4PeMiBVR619IerXkXnth9p35dscr6TU3X+xI64HpmZEenXq3VAk +C9ckDN8AKJJp9Pd/pEa4sF78Ccm5577ygfNtepJZrpU+cahWVS1B8AavZKp1hSdgCjDk6zMa19bF +jn7AMyDy/LnqjRgSHssLlGXszBaOH62VW7hiV9Bx9C0TXrZkQ2MWmfOlCVnRR42MM2S/AxWTnGnR +J6f0MwlPkSIBAqrc0affSSq4tiZy8PcWNvglcy+mBRb4VVnGLBZvMjOBahlSBRD5UbBkqBgGJKYW +B5ygR2jqZwDc84VL4DvdWpnx89ZAPirPURG+44r82vRQ0irjC5FoPp8v9V+Twyit6uwD7LF70+SR +CpV6EKTKut3+o9VYmre36P6vsk8S15WQEnoWEgXYkk6Ixoy9ZPwqRoLakbL2Jpbka/CFRqHpUhtS +Cw92nnX01wBAUE++eZX0FMSlTtMNJXUbZDbE8dJxbDql5Iofiwae6jbrSxXe70z53yaiylwbnq6d +pOBzwsdT1NxfSVfcQ7AYTiGJO7C8cg32LzfpyID085p6RNj0mxlI43bof/qLRA6m+qwIqnnK3jRr +C2PbH1wpcBVgSBmGyeYbAhwB5wV9DlMwyGKJRPW8b52KAOB4V3M9CxpJijWOOXV8kBr067LRW6+Q +kC2biI4YVu7Blh4aLU9xQW3XXu/6M7NlVvhLa4O/6xrLWGYVPBhuGUcy0gh5xNncv+GUQ16xc4k3 +G2GcB70RmJd8s5PjpcwRBoQE4BOvKQx1OPZRiRuK4PmVdGHlSEhOY/U9m6bk2Mu/Bb4yWkhdVVfS +p+T2z51iauaoa7WmnsF2cHJKsznwNeJYhdiZ+ODpK+vqalWoptdSuubjzwjU6GpwL/s34InWfi9K +i/D58hLmj8O7AUm381S3krjvOItB4xEASH3Re6HiU2wRz5CgQdXAczTsKBGaD8EKrc/7leKCDXkG +1FTVyd8LE/VBk5nF9OqV1zjFuRMkhqr4nSht0U2DjutL+GATm+ZQtiUErsxAGZAApAoUwxT8YqGt +2TiI2NQcIzw38J1paplotzYjaOBP2cJkFCwuhjUSII2teZUTtqfR52HM6y2I8nYDU6ZnSTSnWpII +ptl2hPWZ0QVUCUZ72Yy8HaJV413qEaM63YmAcY5emWZbfTwZm4Dbq+rROTdRTqr8NtW7DLs7mt/h +QNblI8V+hT365W7jXracSS/RYW2jZ+Z0JcKVKRXsi3GWgeAA68CIiA6LlwjxKB5ZKNNiLXpX7X9P +VcjfmG6iuIWHv9hNedpaKk3K49AfdgFPtFvgzyQrsU0/i4ZiG4CwuhLYgXrhzDwkORnz9BmndpH2 +RB5gS1CDus6qs4/wezDn5enrCENdLukM2NPb8o/GZ/9UAfWHk/JMXpC8o45gg691P9+wFUYKZSM9 +k7Jh7EKGXI5C+OD1cU3wKU4fMAiKGocSXTiDlFU3QZn1WXx2kzYubQADmKkCWauNyaZf0oY0txYJ +S167m+S7oXiDR5yywXfVTWZV+ac6+toLeScJ0kIjV8fBCFDAwKFbMIPb+aon3PWOIBy7fbKddMby +4G//SjKohr2OHgq0L0v3f+Gi88ifvYukEJVGIxD6SpQYF6k5L8ZtM54RTglWWIWJaeF1aYcTbNW2 +7R67J8h1yR2YTswSf15OgK2LbtYVyGt0Yb+ljqmVnKZqXrMKdiDJ/IgiYco9ZAS1QICqqsqlt2QV +1ZtUAf9oxyh04CmUMFG7ou3KglKq3LSodzA/v2Fpr3Th7GqrqnS0rKlkOk5tXl6Hmikd8ycE1NgR +0k4Wvi550Og/QoZJURS36rnMY03BHaQrX/nUyaVhX3hFPziiGSynIbf/s4hbIL9hhDvIpdDdNiFt +iLfnSGas0oO6SwHJi8+8Ms9AdRlCJP98Y/q5hAbn1L4ueeZ5riKaLe3trNifD3+vn8nWckYKHO9T +o8qUFHbYHstdLzhetL6DwMKCtudzj75PC1268HDM05MgmktalhCkc6CuCSj14182KO7cfOq1ZWnU +NwjSmEomYpTCbYXHctbCpnxzBHwLINimGhPOASkGC0MEJFx7z0D192pcgxiJzvvrc6E8e+GgpQSa +6NFe1uR4zCF5ofalBoL9n9Kst+wqEyTd0nYKmg5VqTjj0pbqaLWqsIUGJboi1fNE1KMMNwDECMWR +rLfmipOEQLfMwnWZTB4JjCSmXI3OyMh+UL+3ATvZxGHLN6HZKGtnbQJzeFyKOUTYs5kIRNds5vaR +LUqcSBIryFgOgf809zZIXmsYNO3z1NE1/QE9xX7lwMBF/C2ju7xIKAcS1GGITdvfHCzZCOfztJ8N +NotgF5NJBbsMeeabpF+H7yM58wKKBusAmfnh3usRnGRCNmQgLn73OM5P0inEpP+ZRokuY/f8UFKo +0eTXshafnKe9Nx9hveTwBywgOelVrjNXRdtkqlvtRZ2dirdTuDUzHvBg6qYcGi/zxWdI5Ap4DGG8 +HjuzRalMoK1m9HRNgqar/xHuSSzkeZnsJaPICHdwSujh4pY2vMfuAo9G4ZMTraTDKRG2yNK+26n0 +vwfGOwQI+4icGfPqgjZKQoDpW69fi6cwMUdqH4vUVnX2BLIov/WqhmbmsM3LGt7Dr2HJpJtojDCA +set8PGrIrmlup1tq6xwaTsvPDLO30fxIHtOM6BFLA+gzEsbLJeH9l1HPgXhr4P1mo1WofcCNOVxZ +a/GTNxjOIEp+l8yI240UKOOt0/FnTItOzyDFkp+MzmX1ueS/C6xJ1DA4uPLq9W/AiINSFGT1fKc/ +tChTcP93ULmLFC1AqhWDPiUDtSASghQqjOZkizTUZgrcv6vscpDhD0cEZ/I7Tm8DtEXLn9NrNbre +d7E2kiNgLBiPsyUPydwjptd3115GJDM2S05VSt6ZV8FbNDoshRooE8Mddiv8Dz3vctNmPg4gPbjR +4zw1Vl8vsfnPTkM98Oa0YKz2FfMg+0TADL0IKaHl9oDXPm6CgDX14zBSpP/1rPxFyw5LpZiuHSne +SzI0fSzd4jeVrSPrQIieRx3lhMrX1N02JK2JzPHnhnaW/kx+ECMC8YH/A1lCYhfkMGn2hyrWH0GC +qGXMq8tMA8XR0MxBl+8GDHr+RQa5V8rha8DfAnbZKVD2diqCzwzct0tjdtkKP0FQLHk1vWh57cFw +ndkbFrJF2efDpsPZtX65S5bswqH8aP1p/fq6ncLUkDbXe/YSWufPZgUch0gfboHz3Alflbqk50hn +As6r1EhOCFAh3iWFj/diQk0WDb47WOAAH6XrKMTzFpJqHjUVVBG82yaQkl28ROuheNwYrE4caejy +X8oKbaze0JLbzqElpTrRnuuQXA8gtAxuLmmFysy3VhUQ+7crugwhWiu52lqTNiEiM7MxU6uqEapS +Gl1tlaUI76UrTXjKgO5ciYDiBgJvmUdi217dUgJU8rN60+C8GJEKUd30pmiV8pJehGIjNPuNdd3x +oZwRppz97RYzhdz+H1NOtpKw2chnHaobc+O5RuDSvo5r0Cs16iDQ5AJeI0JIv10DHGlGEY7+azCF +8KDxazoOG3L8iR3Vy7/1qV96WLskYm/rtwvw9TM/0CQWhgxK9b5HpSkGTtQZL0UGZVBDJlOVwyy4 +RT3u3BFgKqr7J8XOC4o9YkswnPFqZfgLbQNdylKUkXb3bGrgFhKtHlwoOb9in91kC2XkYdg/BgNq +/sCFaVsJDlDp9/vFcNQXauEmRrN2RybCztE6/ZYAEgQYCL0dcQFK6sQ3Xw0Gg4vZwmYU+pWPAuT9 +QhLkzuPa8705LzmCuAPS7tu7vFQz2/jGq75bx7+Fm8OzvWAS1E2q5mW4c9LcN+VlMVpGkm9ksLJz +3ffBc7tl4L5XL+H7wvSvs2ed8LFx1OMKGIDA51flTn0smW/yEYmAl7yV3gusGr/cVllUtMycZWMz +F4DvYL/qTFUYxP3BhWp08zcUXQgmOyrLKkXJ3ZxRjXm3j/SyBfRXRD103zt8YwbROdv7T+AarcqO +CkA6HzDgrIznLkUX/VVSNTGsZ6Qh/D8nPf679h1UhhhQEgBiR68YFopomm9z0bMf6LWv4OsQsxAE +haQ2G7pVjpJiiZfhYt8YH6ymz2D11Hrgq/CBromfQNn/4ZlMgQ64XQYr7LfIgBEYir0YLt8Gl8rn +PSyG5wjjObGjw+UNcC7SJ6cMrA1rspr62kIG3zQy3d7PSS2obHHAatAMKfmT1Fm9s7cJBHFbfbe9 +r4tnxbuRVuAKdgL62ss7tZKwOPJ+vYd8+06L9l7V3GFPJqtRXwoQWGQawE+XNBfF/6Vccpk1lUze +EHtrhgNKCOJSlWUjKrizLxBG6RLn24G6doMOMZloqsr9lbAU9SeBykMzzU4f9lHyRQSolw17rykx +cAuMHZy/VDgCg+V8IjOPKvHbU+stPUeLjDSqqal9F1tIb5ciPHmh3PPrNNpteloWlVionWLD3Loc +RyEPBorvKHYJyqddV16Pf4dr/mZ6sn2QKV9FrtYf4lAnt4DPatxuiukE2673Obxk3w7pQiLGo/E9 +9ki/XpvC6LMFrTl0ujzuUSh+OGEOcY5LxUmkB1LF5qcOXaGzetGMDgyfpJ0GfCnXhIZwW04hwsrp +tCAi3jFyzuJj6N7mnD+QNqyeOelQEESNGYbOdAVIjx/t1FBh8fES6YXYOMLaR5Rs5rRUaX1kXeHO +/qLBRGG/N1DxcCVFZ4I6dSYRxgrSnZYKhrhcejVNddCsgjcuqWDsxWS4vgDYL3m7RDMriq3xJUa+ +6EjJvoD68exBZ/9dLsel9jguIxiCNAFviUhLSnvwRsYJKAE3RzVh2iqh2RAHMV7ZvgYFH2xvXI7c +UNRSrOFFg49kQWgqRXAwYa8q/jEOo/YaeLO16AkDNLfxDmdruK6wHGTP2JeOSVc8QhkO3sMJEJ9/ +6iR23wsJmT1z/7cdoB52PWFOfN/480MEIy6b5TGuWWlILXhs8Ai27hn+9lho3MBfvaeD0KOOdH7p +ZrDomf2025ZP0zCeFs/xtq7aMLDkLag6TEg1Brwjf+k976FObmbhXyXYNBCVIuDdwLgrL8TM6E7I +HNaLQkn0270ZNFXL4QjL0pKDl1CSMwpJ1ENPCQkeq/r+Iv7v8YlLKpJxhA1FQh3BwY/5Lk7zRP8i +tRIIouH0WISQIcUgg0VVUL9zv7ZgnbVtHOVXdLpezDhsXMthX/tXH0d+yztVUp6LHmX+jKGWoGHU +QlmlMYVCtX6gvACsYjH5YkGJBx0zgBaQV2KDuSS3VkcnPgEoceRbqb1URNAsmzTYeWY87JLFx6PE +j6ITuoe4Mh9uHYtBLydJ1JDZJXVHBOUQSc2ugIGT7JnLOj+JIlyflxijkronarpUSBIuenZnbqP5 +tPrVX9JIXF+hSpVZiepDBgrYPiqWc7NlTJUFAS9oCDynZ/NecyXtab05IpDaMQpSrq0/kZ/cuLFK +/smXqQOrDMy2YyVqEcqqsq3Bs1Fe7/lbHtQ30sQSMGRswWMicSodt0rmmLs3FpK6GILfg0Mx6fn+ +Dzx8p5giPHH53GcDxxl0sBQWcoA3a0Dxn6dtqZBDMNAbX1DLrK3sFIbK4BZPGvB1lfLWB+VtZP2w +jcp7w8tEmTA48KeFjzEO+dJqZ/yOP1QKdmtu1rhXMXyrhnenb//oro5BMVhleWCgQ/nRcL/N8/79 +tnDxam7JKGRlvPFTy6aSvDRpoglw7IQzItGFPdiRNKncl03AYo50kuFWFqwufImk6DhyE/WS5HvG +16L0TBIqoVCjPlrUXn5ASOPchsiQQex2w0LZJhkLJcgu9KDgIrTrwbgWGIEvhFGm7yE4TQwks567 +vpQajkgaFqCVU6Bfy15xjulkOOn4psnw3Eg8R9gTNO83VGEvaOGo2yfMrK82dQsQRSY+mgFJR4PC +uUvErAQpgcHVreJOOdkFKx0Qptfe9y7zFZA31oKPWLaSopGCthRGxG/hbCetic7QHMNU7RZ8kkhc +eWYy9SEZhAmghAioV/vQRBAeGa3HV2/LiywLgMPj8j5ZPrnDL16m0GMhSrHf07hvzqV0SzZz/lpG +kBbsUqPE2igZFppqwOv7cxoOV2Evxs0RX4V41e6SBD3mbDgOY40MPEggiDVfdQg33lLB4aqkL+NE +TQBPnFn6yfrj11AStTOybC16lGnIYdIb3XpulW7dligMbnKHgdhs4kD94OcdH+wEYdSDkLkhy4ix +tNPcG6wdNn77JU2PtVcKIZBx9KRxO0OVtH/NyV96QJdEaVX5TS02aWkEMxlLa5ZaYpkD8eJxWeiF +IfgpTXVEZan+uLwyMPhiHTK9IWi2CGfPZudnFcLYF5SmwoOl1brey75BW/FdmY/E1QfntbyM1JGp +p6HPQsIuTGnKsLQuXY/1lU/7h6FUj6ckhGhPXV0qHiQ+qOWQOdbVaX5H2DLLsb/Ux5v7X3RDHl4g ++fNM8R/3Q1O+847R4DL/ayYzudj9pxPb5bHCqbMakD55dMRCfGivzlA5cgHA7DcnZmNbb5+NewNX +NGAnh4B7Q99BsX1RG28OLEPvVOF4LT1rrzo4Ta/RfdrZQcSqfX1F7iT5VVUAC19tA2zjkJQ6Haqs +5Du76f7hrlbCc5WruUf0CK03rGMfnVnjnihg/FeGNe2VtYU+iFyvFSXo5vpyn3aj0aQ32dWiF3vD +rZp/EdPXeJIJMz+iaZdwkf0qeS059+uNMGxBUDR0ZAVhLyAEgBAwRhUcNv17dMvMVAcL+5Uy9DHR +QZI+w8Zmf8KP5oZRUvLjVUcKiSemIQuUZHPaubLPPg9JM1rdA5uEiN27FLIbdK3UlLdNtViasN8w +okyhaWsgrFdAJ3FkS4Ry4boAhSfWeaxdIcm30pu1WpU5ZeQ5mdX+AS6pn0rcOhEt6i3Fw5LXwj2Q ++OWh70xBKefMgjqdt/NFNuRO/NoXIWp5mNhAVmmQNpRokNUwDo0hIeKmOae6xp8BG1/wa0gdm8ae +XC9g63csWEwDatgqAPsIYnvm0sJSC65ZvgskTMyWLG43kDBtHyn0On7f4/GHjB02orEKfwRObRDw +yHhuJ1RZtfAymL/ygJtVmE0uui5/iKvxLxbzYJz79WwHhu12y57Tn715+Cw3DkizsnFBnT57dTtl +YMNPmQiHTC90Ce1J7G89nr6DlZeFHZlZVoUDwnfa4M+PyXlTAL/akBsaj385MbIH1x1t9W2joT8B +eR+oUCbZsWSpjsHc4z5zy/qlcsv3X5xzOtlJnTecFaXprxquu3Z+FhmFdpgtD78Ze8Ko/GPp/LXF +1nyplPtr+VOIqVbm8MEdx1SOw82N/2/5r+Axn/yFZfipVVgPwKCK/GUuAuBwqQZaw8aSjrtFCn/e +ATVnRR2JDnwO/vH94vdfL5eGwOyO30pxnfaWWUdDb70rWSt6AgzuZJH5fN/kZRr+w9nLcuZGuVpF +tJwK9ytBc8oumnX8mT3w8i7iC5E+CaHrc2M72ZC1FoNvMbxn1owDeZffiZBkB9uK6tYiT3f78GA6 +W58nVKFCO+dgCW970miiq8sv0X7kFB6DQP4rQDy8HF2cgYf37R3MxQeEMYw0ewehQzhEXO2V+b+t +eTobp9BcLeqLydixiBQpVWlWG7onmsTfpyJWg2SHIPTd0HgoZhzGpAll+K+osc8O94dGQheffbS9 +afoPfWdjRFQkkgw0LCy8z12/1koJs6vzRy4Hoy1SFTCopvQmGL6ju989GggD0Vqd5DwsxQLNXL0G +/nSi1x/szcWTCu33VAX2wfJx0EL+GJmcCYkexYft7E9OYrmrR2ifGHPypDS9PKEtSVcPL0/FZ70v +Xh+m/WHCh919mvpNwoqzOuwXgJgTgkEtMnN19I38XPeFYnFZd87ENDw2ArZuZkoiCYI0Cj96h0sv +du+66z29nqBguRg+cluHFyIOzjB8/ZPincLjBS04jVC8868LrdK1d9Hcfldv8fumKdoZ+Bc9IjmZ +XL8MZ8vc+3Uq/7lwnmWh94WNUtlinetTDSA+hzMyU1zvc0D9cKFFMpzTA3Lut7zOLaZd1b1qCkvg +SajeTC0J0BWUsM+Y36NaDCJnD4h18GHGfw949935Kzgg022GCWQkMsSJxhrJQB2TgZHOsbLTJFIX +D7Thw/mBmMPuugO/0qGAXxqm3QiQMQ0cARyOMTlf8yv47Ru7qUfS/NnkURByy+gleAj9/jahakrF +BnOXc7QQ4fqWmKDjF3qUGvVTwqs0Wd4tKGa7nDsSB2UGLcxK11HAgg41svBEVFTzlUw5Sv79n6aa +TPX6TLK/syheuqeffJMlqHlCIxIra5xgl3I2HIcTC6buXOmvNMlumIi27tZyypBhWcOqZ7AwuF5k +c2gyCgIwJYMcyHz/RTJqvK8bi6ktPyAeeh0FfGA5wURGste9J/LegByCz3t4gL0/D0QSpILbWzRj +bfgK4d/R4ffHAi369whTGolRoc7DzFfMecVeCLGv1oNRbE5iVVTrg5TuM9MGGHvNoAa5Dc2ifxT1 +4I3tmZdPAv0ogiUHd36ygTD/mEHN9Z9F9ChnQbMo7RW8GLwnM6+amFUco7NUHBgTyxobw5P1TxtS +DFKszCoMPF1bHANa98sXI0q/fnrPVDTRWrtW5Ws7yNN9MgeoWnZbeKhr9A6Owy5nPimfuYytVoYE +CZ2wN584T679Mwsy6aKG9nmGKSRR4ZkWId6mn0H0JaTjw4GmJsxeC7asLsN+WxitXV4vA12CyfCu +1SL6xam2NMfcmPldk/PmkVSK6EPj0zfHbjvcLflSAof9H+wnnNpgM3G0DQ6tPN+FTYG88k6wTR9h +I+Y2zpRgFsJgb6QLz5N19gukYLSaJBaaFz/2lGo4qVvEWazCt8Eqi5EL0m9k95OORgO6KP9Z6ZUB +4zFksSJkWm2imqT+03oKLPsWNZDkGdoPigu4CnlJ4wnNLoSLYiR7y5s63YfTkfBrFmgv11rxGI6Q +j7JR1hvTyguVFizU1WMQ5N0g98zDxHyhrRlN/zDWvQRYqhdSIk6O376PG3bv8p6EAu+AuByWEnJm +dOH41jnKirYc57LK9UFcIrNjtHl/GEMF357ujGXI70lbTPjc0jIxa6XGrWXih7L0j5V83YYC9rUE +gv9Oh0mubm3FbyEW79PHpk+ooMN8CVnaVieHcO2bWo8WyJsoXfNIO1m+Ba02cCj1/JrfjdoTP0E/ +wBrJN5s12FJm2Sqw5W5n6+91AYojqfHN+jUa++yvN+XxyvZzNUe5hh1IAzw38dGgM8OFOpw7bXjV +pjWGXfjCh0fpm0YK6dWD3wi3epkskvYD9QsfXWnillpQ6WBPQ90hl65mu2f6zQP1zp7hEckiVXax +3f545guPAf/9oVIRaJYGAXduddhByufAeBM8AZRnu1uYVbgZuv43+n7g1DdxmTTVG3M4lnPQJpRn +xLU7O5CAuPYiwzrSfbIYl5Ct1zjC6xINvz6VsqwCPt8FEWMi7UYM6etjKCz3BIHYuZ1J4LFdpOk/ +55LQ88RGVJ++20cJLeZQBVr0w6+97Yszh2qtf4dAJOkRu0eHckO8aMdd8EY/HcE1IQKL9uUuobDL +47oNwtx4z8Iet5kh4pc2ms1X8rKyMYUVF93QAFTwkKaL3mNtg8Pw0Tki50EclxEUF//1YbPtQNtL +MqueslF9iual71M8MjdnuDOtaUc0iXyHEDYkMeRE31T9aJreLNCCRujaJKZrAA6pST8EBvQ0KKkt +NjPRKxLBSSnQAfuipeEKJ8KaVQe2eEQG2Bq6pZFtRJIAvRs9OJtrWr66FWdmJwFCVqq4e4xBAhaM +voJGLOsntFc0G/TqjaQ1gHe31eebZgGUsHZF9Dn9ZDOr6mSBGZAXSIppJ3qkmhx3m54ewsLmUxug +khUcY5NWCn4XU6bSBqLdUX3wJzSouFaIFzTg+Af+/UZvpQZB7ZnBibu44gfWnUG8FmAWf5xuMU49 +4abjRI8TSAT8d3MKgTzOd6lS6drKZZcsCLcYJsyh7ZITfuQGC/VfEc7f/j4OKuALy77XPIdlYALV +t636gyGL7kcXeln3JChLpzNfupSfR/Op42iRyqVtXx7eAeOe3IJDuK1YXdAdaLnBj982ZEStDd4W +l8LafFuedhaOEMt7BbdoXgxVZkuu1kud1MMDWfQO2/7oWu+WzdHeSeq3mmJowp1l1FVVWxvuvvDA +1ETjiVyCYanDS+76oPTULJavcDd2wG8qldDf/gpA2jubRgqk8fY7agVGUVN/7VVy7S2i00PaADhX +8Hhxzn5AX827AXpa5sSXMESPHi4vKukoYkiVR4DwWs7mU2lAspbGoScpzerl2Ko8sY5PcsIq05GB +VwzbfvUEQjn/7TU/WkApoTNhaXTcfeXKBfqZ34fyXxhK9ROY3sE0upIkbQORIrWRVRDO2RSyp9Fw +LrAVjgn8GGvYzld2aAg8sqs/NKYTKNaD4mwXwN7O9s5m2TRRv6BzV6iLS0uLwPifJ7r6jHmoMbUn +ZV+rMyX3oK3VopYlIpbI4zNeMkOFuKD3GgdD+l98dU3ryqpctmxvAZN19ayNd6z4wLPHeabAYhK+ +xRzRpXMs0XDSMFH2GCot8dJ55opGbTopXKhW+QoOqHZ0IiUT7ZaX9uLRQoDF+5/xTRhsiohYVZya +vvEsaHu7bfzV/nqz1fzqDnvk00nt87LKMwA8q000ntMF7aMcSHKQl2ahuD7oxY7tcqkusuMF5f0n +D2KpdviHYqjsVpMT+E5OrDKL+U9CsUHYv40YhWc1pfhoV/XXoKOtgWk+MOHP2OZ7/iweVB60AP5u +rfgxYnulmbX9h1/wBSSO+WiYrMUE9pG4TVo83o0BDvgulfHbZdgMrBY16LQIjuCQ9pkh0EMNqClu +OfF54DutcDr+N/6t+xCc8V7lGv6P+pBLh30WdJth5WaoT1Doypmnj+3Yxa8AQxkkALCbrNHwCKir +cgsZztpJRN/mWq0cpJGQJORgekoLZ++1yStp40HAguO0R6uQXgJGoNL4yjVHjFBss/pP0/3s0GBW +ZRMj7Cd/XfvdrVnEl60M3HpPVBiFy2CViraK/vq2JAcMo+KPCoSsLj0kWQP+KQkITtB6CK2Jx6hB +zBlf93s2uFFlHAdOePX+ykw7YNRWpYER8aASx71HScR2Zh3u9j6UPJwbNLV6ZpyHVw2KgBSS8LBa +iVRXp0Ir9f4UeLdNn3/pEO3aUNqWrsRwvXbqbdWlXLw1t2hTk2Ny/QLhim4CPMP7RbRDiWqz9XRU +zp8YCGYX2tRJ3DCXiWrpgiVbL7/YmMHNRZGsepTm48OgSTrWdzH1/+5SKVqNpB4pd6buSnedWkkX +S4r40Eh1j6UhzF17sT7e/n3P6adgoWGLP9xqiudka5Dr2pwujaMPfMruuf0i4CG3utuEt3w2W90+ +ithAhpLkuGOTyc6dl9WEAjMeza+Uflscq1UOAJ6TAbPgL2zHHaa5HooO/X2VuJ3EZ1E4pTUNonuZ +jwavnPSHeFe88yEJKz4Jjp3fTNYUCknXzCVmkvi8GrTZ2b99mtO7vnZY/CgKpbqgBUKCpqqsHLmC +tW9rH8+CwdyJwliLYwfy5HUWPU1G2rZcW51HRXKWW1m+DjH85ZOTX9Z49Fe6p2RCBpcxWiJvZ27B +9SdrGFUB3I4/kd/21haMeAwfHA/NKA1I6JCfB4xBjnKk+uI5DHV6SRmKilAfM1WyQcF/34MpFEjH +miPBlQyfaWVbiSERbynPvaoIsRQywyblYrjNb6OjpUpok2o26os+mtdgjmFRZukEQQt8SNEzwcfL +ED9RYumSyB5DSk8+xzNCTMsxVOr9hZotHGMWIut+pDGVnHWU2gCnhUVSPFjuwi+dikMxP3lJiU2V +y3qg7Epzn2ocJbvOtRZwUf/JYrvdS3EKEJmqtURKU4CclgQgZ7Rv2rZCVNmNFQgdrEc00ld3aPC6 +oTKmE2LJqEJPSCAxoVs0fQ3PjHiLd/gSLVquarLPO+IaeA082pLmbWVO6YyEI+49pjmOtGELCXUo +y4Tq0xMqcf63ipiGVg4I8jOgEyGBIXpCFDnZBuBoHbiDd0qhi1LLNiBHgSGfQCQKVxWnbwqG12b8 ++m0sJTuHy/FIclGvsqORoH/OjKhP3YdmBrpxHFZizxJCFCeu8N8SWHpeHwYCFXKsfjNzxy0LK4EL +dlz5iyM2KTJTzHBs/C3M9lEJeY96di0AazS57CxiXNCF/fi/aOhxtP9jjtpEYh6G/KKhJTbaBsVc +QI3xpAN5r7IUC5AgLRjGkG2TPsK/4MieISvzRnpYh+FpvzALKTGHOn+x2w8NZjHoREpmfM7XiUuo +2T0rix8WOJnUKC92CrCm7Vw63UMwUVl76rZloYPHBKl507tgVid4NZP8gmoEIKA4uH42P6/WzYAq +pX54fkJYi2W3gxUwa++Rqs/Lu0tRhzXqlzDqH8ZzokI4EAl08bvX7eUuYhtfg/2CfNful4qQsN0N +nmM+JP3Ja9K4nqSNh50bSw7Y3t7w4hquy6vN/6WAjpCgPl8LDRC5ZzEnjrFmXF/V4ugqKu1UFF4l ++ACssw9zWg/W5nutmiCmA/AhnBMSc3Y9B3Xy4muXuuTdb0bH8OT9vM5K2kEBlYQ/z/DyY63/5T+H +OEgpc+2bKuOwETcqvPdGDnFe3vINtXhrmn7/Ko26Bv371cphNiyfnjHBEUYAC/fDP4/h7s8WyhOV +QgFbXSZPUg69Ev63mxObD4iI1UhAI1CxUbN+KXCPQG5P7B38FZsnLbvvu3hLHezndgy3xE8hyH4g +6QOhO+SxUoZ6ClaA9uurWX17PlR2lXASl/vPZ5RTuMpTFLDofdIm0LQOUXhxFsIjZ/W6Y6HHzDBi +r/ZM7VZmZ3e9AT48275RqCzxrbU6vzoGsE9C+a/IZww1yKKsC5AHt5Ob1WRPf6102E9lMcMxewfz +Dd4EoYiC/clU2B7nU1xoMxuyOsPWLGl8lHlRMT2lpBux7xZrUdBgL6PmRCAaYkH34mbe6e8c2376 +4kWVHWu3SnUKZ5I8P70isrZDQLRKNPXxDOfSjs0oqEEvwx2Fel4De8RN/tzCQYhpABpNBpBQt130 +MEZQPWNT6NQHhGo1wKVFdQV5of/Dr/aN6sjHRMfWsDj2wSwLvpwaEYkEDIM10UGueWwaFDObwiOm +uyvzaL4lJk7EvLOgjcuYdnNykyl4CaaqNdqqDN6ZjnKmpuX+G1HwxXF9HP1H5kfRp6BWQ55D7gGE +1wY4CLD7U5vUykYW8GN67E8a9YkBuoex9SCwg6OQXOP0n+JXvWTh2/krRAAJ2uaFB6Btcjg1DTXs +F5/becfNFBweh6WEl6sJLWXoLmzK/3drSujdfarcgd1K0fOof15n9OyWvsPl0h7J7im+htdNBRDK +ZoX8N0h8UkjJshT5ssT1WbWfaRClhgKsbFfKc9LcvKpwl1+aC7r21XX5WSUlb8sbs6xp4ksu/QjI +QoP45WkurEpolyvkG61Pt/e/Ix780URMCicdKuhg8J8gH1tZKQqiG+Hqj4S2zqeHhMt0CCw8CVvb +gJNZ2wi6kac5gTW522cPg6S4CtwP71CUPDjzKOJWlYreK81eOSVVHYo4Lm1IAMSQPxRiTz8IhQ2P +V5AlnWNowbAHFvNS1jC1OKd1H9wZwX6PyEdOFdiV2PAcq5w6x6p4bj7Q9g2RG4w0ASQ/KUl49G2w +GMgF91KwnEiTLzFBdFBMYUJzEL0nn0id2vz+Um3fJMmGv4Afb9xcN5vhPV2nDpfVKLPgOqORQvr5 +hON8PhWmZYuVIgK4DVFXYSacZw20GhGUBh6XAPfU2afc0yd5ApTTQg712ivckYXuqwCxN+302dLG +jrb2mWnF0EKEbzLWp8icm+vZqK6ISqthwLzbr/HViF/e0bUg7cYHtFPr0wVtG8PjyXvGIZAtZ8OF +zjunrxAX00bZL+4Q595WUkrCs+1kxXhvHfeVsyk2rLStvTTwQQ+opq99M3mi3SVcIXlg+qkiwKDv +3Th0ZbGBSQQ1idHeadyPFs6Rt2PUqRa45QAm3D4MH88+r52mTJj1ZnzIsbjvgNFp9axvPyNI2UhW +G0jxOzL4LIdJy4aXZggbNNAEIYt6V6fXYDdUBeCBEcMjJqMGoBcVFjubat9MpBYDWhdJLxO5AIVk +Pxg4SfsAiyKf755/ohTLeL9UUpJHLA4Rl3RQ+qoFgWbboSEupYaCYyz0rqVNR8aQJCGuxBZh+y5v +s8YmYy+M1PbgEZ/pKFqvCIkKVs/a+2j8khxr92uYInLl+KFl+bQ1jtZhPjZcUJpdO44vtu7sSQ6E +ssO3eDGwFZc3c2LznxVB3amtcuUtvflb9LP+cEFmhwwdZvMjRTfjAOrE+8hX0oveUZ0aC85ztlWP +dgVeh7T8UH/2mxev0CwQgo7OBNeohtO/ga/1Wz+cOPB3nBwjqzngXIqIWsA15WmjMbR0rkEzzmJ1 +QlsKPmr8iblVlPKowpkcE8abHS/u/+XRsOs25GGz7ZG8ZNk+Y1S/Xcr2p+uBmwkTQYt9vDlSuQT9 +yudK9CJjY2VC5T0UF5rK6hSCFKjm/ZJQoUwHnTYdiEkSCAfRUg04O7SisO/C6tvO6k+k/FERCCnf +GHWzU0rKG+sz93V6lzpFB89+9eAoyk1H6jNDrhbGlzKSycIfeGZv4RVZOTr7EKZBsU9AmyM0mEf/ +eICodJkcTuzKvLd5K12zPynfXr0HEqcn+mR02LlpgSjynTk4IeQpHoh5lRQ8kK0VYhdkG/pIUqNg +fn+kQkNp3qMlVH3EC4XzAgFv6eK6iKjA0aaX/nhvF1OZXDuaaO4gcDIT5LOvgt9quxpzIYosEmlN +OY/EAUNDH5oYQCSYSzhN2u8Ge+smbv1rjk5mm4kA+tbkEfge81VSfCcYG5U1wyl9o+fwdkuum2Zj +DrWFwhud4jJhn+nofr+OHmioxKTh/zUogxwQ1ZiQlVtZmiBPxlPvQXwp/uCuhT7w5B2ge+z0l2xT +UcJBHcK3Uvr2MMHwPJvdGypJswKCVXOSE7V7mRRnLcE2IjDd53MXbmqrHggi8sevV2ZQrT7yWR78 +dXezJRAfuhMqGdbDmw/C9BEq69UIb/RYnPNj7QaO+kvqYIzVLQ1DZZpYnzY2lacsyxrzDYHluk6z +E/9ZjXUDTH6lTVMif7RaPh8OjLV9xaoUQ1NgfOsSUGb3KyAlfRPndjaVi1m0dnwPLsPImOHQsIFZ +yE/vdVxsxS2J/GdqnKG89BUar9tJaU7X6t+6tTHTRJhWNv0I8Yy3AieyEubf7zW2KKAGRr8OMsK2 +cS+7N7JsO8HDcjCbEVKi/AjO10cyyjPOdtTes/QORR6HZk/YSJQ8Z+7f2O3TkLbU4bcIEl5AiSJh +gGgi++xzPbcXjoNwGirh3mo9qyomygGR3RU35POE3bLL6qImD22ZFiOHik8I6xjT/3uHNcnRtIPm +TBTJhiVXggdk/L0A1dT57dzL1P3TH0Ecl+BeOSUprTFNrmX7y5Ijep4Wp3P99jnsq/w9vPEfc55j +HwvCJbUAd70neWEKGYgFZnwhGi28Z/Nfs+5ieIvlw7cJJ/q2CWwBLg3voE1aEBOVbAnOxX0BuZtK +LcQggyCcrvjAg0xLgiGQCkzotePCijbEpwMeff0qd+OGt3oao7Ct+J39boIRF8cRnD/iExxdaRsG +E7Zod/5TxLGaylJoOs6cnC1258uEkp/bKhhBe/snZSR3z8gvTi2I6mjrfKQfCceDGlnt1i/RqMlr +batMQJJDrqrOo5Ns/Fk7jlM/oCeYJg3nDJHeSEOeOLNIX+AzxXZKP8X3ilE5Tns8lHcZC3+4m3lx +8h/uja9YZL8Kwv69B9y0g/VSxSvfazfTdZYPHnf4LYLPY/OlPraJlFyE9mTlgVldcTLpIzwADWMH +FatZYwAgaC7sRUdNRIcXQowpz60SxICuz8cmX+ZB2sxuL24J2ymmh/74Jl/1DZNwKAoYO1ogybgR +UQZ5i6/CodqZ6WdXIn5/bV5bbczIldUGAKG9mGBj5yYfVO3Gokbf/LMNzexIeXhyFUMO0M6Vqhhh +Re2ub+bYXwEEj7FBh5cclEkSt+DQ94mK2VmNxqQGU95vaeLJzpjWXGP9tCayIL/aSy6xoneKjHIc +s4IymYqUA8dnIiZmktFuu0q6lRZyk6DAg8n58sL12k1KVBL582aFp1CNyPUchwMf3DBpesEih/Dp +8sf9gqAbsWggQRXXVqBDFStQKbm+pFSNts275bqhuBEnR6zl9H4kTADMhuTahhWdu0Dy8NKbCrb9 +u4IgfTGeUUD/gH7bnsMEVOFyWeOxrIPkxL/IM1eRh4ZEXEi5bTDnvd+mdsCxC3UQui6cIg082PSR +K2wqWrcQoByUqKMUinUqij/ufREVKgsIvnSyYIMcTMxIyolH/2+is59UwJWnY/yB/Ct8JMQQe5b8 +5NP4/BTpe5Dt/JCSYr9xAcEzNyJpe/c2KwMpWT4VDo3PR1tbVbMgarju7yuERp1FR9iLKDIsqQJz +PxNT0bgIWVoRrBigT99GoeuNY7WtA2pakF4SwFQ2zCNi3kQCBGMN7+4uDCLQSsD1cOgF/3f23IeV +iFoKSaehEbL7MVFZM4Plmhw0stavyj0x6OII0kzfurQK5qgk/W0wqFLZRJbsRBBZLJb4OabixRaW +e+I71Hv2rSt8A8DbvOh6s9yEXuzSae6ykoPketi6WSVGD7Vz5r3qWiLAzSqgX4EpsXb6rQ3cCTtC +QG8AETF3CNwGWGqhAU/8Cqvh7TdFs3b0SquZC1E46EjyHzC7MkSdvymI/5gn4Vu3Ptx8i0v5Vd0S +Dg7UxBeTPR6hYzRNdRVU3NvCMNupDCUgQ8rzH+aYMH6B6MZsc5NhSeJKfgeTuNU6R5N49ZQy/4ge +ppi0NMYUm1VSHjICTC0w0rPH3qlPa4wIC22eHJ+HbaDJWKUPBF1/MAUljdMR9lmCQwTNnuuOYSic +/kh6xhKOT90vnpf79Hy5QsxKFJbVDAUDPaDRE5lp+KW55BXCDYnwiM/917vkLtTRAuxOWa+Paeiw +weoz6wLKx1jLmZoHzhMfAGn+gyDSKL2lxdMrl7BM9AN5j3Sr4xN0aaftdIECsrBByX0nbuz5X6Uh +xTWefvpeni0xIolyjJ2S01X/J38tYB2Nq7YnrtMunXtCjIoNMcq0oyS1cu+CU85pydDvfmqAeEyp +G6Ubbycu5ZG3VacMuu2pbyZR+0ObofKlMwwED8zL9eKweD84DA/MVBXOF51w+POao7lH2Oslc2Mp +2e90iTk5zJg98d3NTeebhr9aQ4iQlgv333oGPeElaqM57ZnWU5w80+n1umrezAi/zZlv1YDJzG0f +76kLcWjUaC64UQaGwDVfTsLwk6AoAKaostidQ6jnCx/EHiIrQrvJlu9PQm+cT5jxm5q9sRATg+DX +gNXQTrOXGhypIzY+Mf6mFl3JJ160TLBiw0O1d/Kt1htkn7UvrwHQpcesDCw8Nl+2qKBmYBPgXBw4 +cNvOJVJcqlxiDC3BBHei/1qDsnBNZhGHEhGps8AFyGCQJy9M9OeatS+6BirPghj2+uxZ3tJdi00y +838HOG1qrFZGdPjrlHltZPMSD9a0xqDQfgdmim94QdaccEKocxt37aVMtWPvNsdFWVdbsOmbPPTD +96EWN9iESJcO0TbEWdxoOCHNaEVhszz2ygaEueKF3iWFIHEeUFSZ0xHSYjKT/s90VDEfbu2dj0bT +9CIzflTvwmq7IjPkLz2W4Pd2bu1M9x3W4nFTtMW5Pv1x0w9d0K9zeoiabhHLGXCUv/tCrJmaMfFp +RAXuvbtW5MJTpuSYRG2MBi7fTjWKXnyAyj0rFA2xBSCnNmy98cOX9Q+AfRgtJKOfp27q9XmlfIZ7 +zPkU5T8RmBl9q3r+o3+7DG3X96oILffgM8H0QshH+EWBVXXzHVH4br2uDwOJL5iVu3wVrfmvT+g5 +UFOIxZCir1uByE9/Z9Zq+gKhaBLbwMwtrnhU13tBbkbM2zwQAdXBJfMpFs0zuwEdUjopfyJ9kF9K +VBs2dt0+tyFoENU4Blbl/8hlovs5J+UoK6eA19yxIeEBc9uZxX9C+/2SUcMRE1k4M6CErH1/LBx8 +oIDBAG0WCKEvKuc6QvwoipIAT2FNM5TDeaVxwQnzjpFuTOVwuNJB/mgqqQNBziHy88EN1BGhziy+ +1T/68WzSMeIJASv8cCqKvMrifqsK9d6+4x4QbUqn/qvryR8FMnE7J9Bau8AnL8FDsuif7SEJ0znp +aWmKmvQuh+4FygbOF8ThUBMFdXYYePRemoX9uLlfWrLR433ALgXR2POpXSrqwKBYw6eIs5ChdIhd +SwDv8m1fjvMGXP3qV1jV4ldb3eoWjbd7EASlz3MA5sFjJsDNbfPjIlrOoINYEX21Ofu8OQuW3KEM +hK/lOwTmHnAR/qRuFm/+fY3arKOpuw2Is2Vrr7Wbd9eushneHn5XPdFfvZ464zlhEmGe3aLzziWZ +vA46lB8ALNR/8vw1bi3Mc592+zqL4k5+uJClkjIk3dnUAdmMKupit/oKUsVPzZH4/k0/oiQ1OZw9 +KoSWkkJXPqrgKLfw6tlys4teh31LtQO3YECoa9fyqTwcQRDD7qPOaOGkEzTPCQjDioW6wE+VVhxK +DLjpY/53QZD0Er8wHMT/jTI6NSq7hFqEZmX5C7Zias3kLdZ9aShCHWGtae9uMrTtZL9Asizq3x4D +4GIze+h5etL8775pSxZSMvvFmegv7GqPT55N6YIRcakTkCaI0H5iRxUVIlZp8IODdFLVhJFzubnv +P/zxSGDVWac/MYrBQlIamIKCSmKekHB2F9nNG8pFemenBDj2mT0Nl+gg9FO3Uqp8noSPn0Kwt70D +Ii7m1O78JkMNAfipjKgTeTTInpz2aRduvTinNfdJVnjbm+YGprWvkJW39QAThbG0xuY6UA2xvsRN +Z+QGN+Y2h2OCdtcnKOQ4nhvbgMUZyvSBbP//8DrkyCHUgcjub4XQjJ1JHXk9o7Cm6Rch0u/lPCft +9uRD726IcqH9jGenzKXVLZ0fTv7eyyufIUwUYAN9RFh9Uszglqk+vgvYRMYpoLNDzQH0Llu52e41 +2rjWJ03APexo12ltlMvIdi+NkQPiNh8MAZUKUdTsfYbYz7+AEW0BTCs1cvZzURCsD0WLZJDHI3xw +zZFclUZ+PuPEedS5JyywD3FVfTx0h/pDitVvC/wIJlrAG5twILRwNYJnBaNjg9+gkVM37nywBeGQ +oNnmNIfAXTU418UBsAaLDyWSUsuKV44vw33ToGWkEeeC460g6kgJOLdpfMYNTwN36tcrAxsZKO4u +nNc3mgpOzLAxu/+giaJjS/FGfNAaaNCwSg00r3ziIEWLMX52RXpFWtAs9cRGZ/yrOTeXWM1WlqlM +YmEFsecHo+Azja98/mLflDOX+HafVtseqVRy6k2rUZkjkW+mSEXHznYPVtAyoJLD/V0P5D7ep498 +NtR3B62Y/wgnfaE0WiOjJJoQnAezQd7DK9oNEgs8Hox7v6b+Fe20zNDPX/4gK9EVT7pXtanHkWpo +gjen+tC3JWYL8q3ULfyKeAc0JebCC1NFKv7cuarRZD5wHLt1VU6rkt9SkEleKS9gBbMGX02AHuSs +C33tzzfu0W0OisPKAwZknbzQztoCV9aoi0insY/lr5A/lZbmHWY6SNqfv+GRBUqBsFqvnewY/X8r +ukVQlghRoMbX7oLCIeFKNsbUFKO+G1+wQbzAoxjpp3QhZUbJ48G+Su1dJNRXLRmGtijjmRtFCWpt +v8vL1FC5gBKEwJJq4Y2aZqQxLV88beXwnHV9w8/M9Kc3jZwhQB9riVrvUc0SqWO7Xmz8UlKQ91Zg +fnGYwkaGMwy1IPvp9mwNYZkRDA4blQMCxWh8uPz3R+TkFzezI6iE7dQL64WdfPlc8GmIFvwIUp+5 +qsqve8LS3v8PFDq5/EjqgHZc1pdqySIKDNCrW1/apS14Mq+lhqLPpSkuLZfRdlT3nbUT84RAKIW5 +BnFppfXW2vYmfjLbBixx3NJN2u+bZSRlUAHIcjlLniS7RVMDqhj9biYPicF7g9/bLFGtudVVG2gl +96YAHCLOEGerP7gsxBRNQ35C4det/1BEl+fY2iuRLmtaDaGktdIP63gMV3jM/xVvqMc1ITj3TkNx +V4c6+MPUdCnEz2asJrRoryXvhe0GyhUGquhUW2aUrjMmy14QMNj1bIDyDUfYVeg4nbrhkwjIwlre +5Ih/8AE3hn01eXDNi311N5I+zNW81qKYC1WdV/x/6SRAID6vPlJ+mcumNT9S8mxifVOylbGXEKs1 +BCo6OHFmTp0txKQxGTFkh8UYwkIjW5qSOUIVaEUGLy6NQaRdoffqKUTrStQWLJeLRfw+WrR0Y01x ++Vh6LXOa11S5sJub2T3ahK26+J57NMm0wu5JiFeGUC2zYtlzfswJ988eqNdDMJGX40fNYVw1vBCr +pfTeI1U/JcEabR1BoV92r1jGrD1xjMnkoOXdhOjdDJYnzeycNIROEMu+SAynaO8YS9aTnGGUiadU +aq+Va3NXkY3uE40lJtYrovZ1vDhlQCfZv4ysSlvJjmQud39ZCao5jCvq2g6QpmKmt+FTrnu/lYN3 +sJZbxh3VSW0sC5kdO3JclQ3aTP1koZKmP1yxQh8O/nUvfbKupYC3m0yhcdhqAlvT+1kTRUxirwV+ +lCWhqjZmtO6HtWagIVX2KZsUSNk7mDKUrUI+CYIf8fzXqSxA31otOi18aDX2wh+onUbFV0QPpkX2 +q7ZgNNG8GEXqsvp9oTftBFeWVr7xE1P02PKLXnNSDkMVLM/1E5Q01a62NQwra/+NXcp44QnFGZkk +UklMpeNX0ludyqFHNDZBPL0HPBUCEXuV32pLqmIQ5+1UUGkKW03vqGeWLEPe9QGBdTtXtbXVLp2q +fwESAupUtv/LlPlJu47ynTryHLLN5L/V5rGazGhqZdjD8WJzRFj8y/eUEKjbSFymOBoF/azp1bm7 +Kv3E26g1wdtleZPCwtBIGPBRg3P/UD/7YUciOUQmhSOHrFjz/ZyRErMNvDGN8j3KtY4h09E1OsVr +eyGqIniRegsCLksTr1IC7ghT+Y2kU8wLCbJr5H0XoeyMdI0xFRCrpExx6SbF4IQBYKLdSjb+J0te +JtcNSnQKweVufzCaEpH2HckG2jbKM3mf5wR84Vs97mjm22xtroqvCwBsqVXk5NXBFmW6DbofIh+S +59akUr6DOunprtq3opNC92KCtuAO8PToYUqusukUF10b2/xjLKS6XhboIh8AJJFzFxcnEwZubOuN +/U/A+OAUWvvu23i6n0nfNJLp31R01Libri2gW6hBLD7MmQgOqvBcUuJm7Qc0yIDjtrU24a4CQL53 +IC+DcETIaARsdWPNa5mA31jlgCJfemL4VHq/d2YWk4Hm9kivev+SbxAC+SyxTUlxwIeXXwcILLRC +ql5rJDU8BOw7QgbZur932YuyBpBGgmoEVMXQwTv8JKEZjjJ3F0bCn7R4yjBtLXSYDrR1DGI2npPF +znz91zPXre22p065ZcV2wUVik52XQo3fNmnGGqjGshbN9y2G6x4dkr2nFaI72wy7R+GnxqbdepD8 +l235eMMVRJEjS/iIbAAP3AHaJTQHDcOvYnqUO6vXYSpS/vAwN2Rgdlyc86PboHMOySgFk4LvNCNw +6QL0jdxDZe4u+v9pkhfx2Wcmz+6/NCmJ9GWVK5wl7+mUxA68VtsRGJ4C3A5eHi161ZTQCFI+LXhl +4MjllMaCzskdV7MXPQxtJCDlZqYR+iMH0+EMWQNuSjyuYGBFmG5iIq1fDQjkPLU7IpwrHwFS4H72 +qJU5qD4R+x4lzfFJoNzx/03COh0/50j1ZzLypyY1+fjwZ8boCNL4pg1pnxtUgM4S646BRLWUsKPS +5ueJXaZDKiOXjnvUQ1VABKnbttYk4vuYS5sO1XyEY2FdGNlt826XSaH2aYc0gd8wJGfR6MCMK1T4 +NZuDcD7A7pPtGthj/5f0If7X9FU/FXLVg8/4mdK98ofpTaZtc3aUDnO4SDrESU0VIVDqIfvxxXc4 +ni6dgIh9MIpkw4Ofmkt3/t05QJb4oz16TzvKkcuWOUoIh1Nm6t0s63yvHWV1O3lNnn82QnMXUUoC +QAEulw3zhvMqLRQfL0yBFer028RJgjLFuefL9epr2VSc9RknFa1moBwcG2pDzpLKQItEPOtIAxNq +8iACd+1wTwMPDmbKQAsM/Ok+VL/wpx3JolJnro3ObwS4vXw302sJomvUv0NjhJRt4LNFjhO1aqX0 +mfb/9x/7I/kj0/nLf06q/hfA7h7gsDixBoJRNp3B5deOK9wvjvhsgd4i+bO+f355Frnd4v5c0qOr +J/FYlfsnZn2tNQ8kmpjOOz40gNYr+7x9HY1JneXPvRSX6MVWX6TcKci1rUml8BBGB4Fn4gq/DNs2 +3VL59a4WIMZl02/kxhu2pRDv2YvRUQ+Pj+bAwks+DdLfod7ulPnfiLxX1TNEIDzQn1bY3JoJxLzL +p9A/rMcpxp5bimx5yIXtER3CbPOcbJYRnlYoubTHzYE4bK4KUv+JEWinsBfBDRoihE/df+XuQzpT +PiNbcduFDA/zKgaCVAITmeY6OVnTP7dhT0hN7a21oobwlK3pReVPnUKrwxdrwgu98bAabgwgwn+d +ON64LKDtf2Df1LSKHA1PyW9PO/h2nGOfMeQGXbdtNUtqDaE/QMbL9rl8LLdLfS3yBwpQnJwxMCH/ +TEwW8ThjxLRvdbwuWZz0THpjs/cJunZEBsxZtTIk1E/ao5MggNUuRR+nNkiZqZbAQCDaaMs69QOX +cA8EAUA0l1XS9Jwety2Q4OtEAUbvldIVzbW2vV6MsBXpNWfbwOOGDf4JzoUOv0Yl6W2+2XZBfeIC +K5Js7miIzAsQHrPzub2INqDS9NxoLbs8Bax/xfvJeJPWi4v8sur/CdyJWLEAwxYwgGu1WL86dI4r +kDVQK2tMVAqk8xLUZisVi3l58fdof4ilGWCvuBkRU+c6hQtFJFyOazkAZ8+E7DRZWKENDhdrofZH +CYuL78G/oYP12uW9gm/tblxx7xsnPW1+oB/C0BsPViBoHo3LfIH7S2EBxRrWFF208EEGxYXXED3t +gsLf8O5wa9/izWafHsCt1ZD1ilBCq+rggwsWqFl8e73QPOYLUSxYcF6I0E9BN+KEFpvM1XZZd3Gn +7SVXsLVzEA86KomP5+Liatp0g+MDL3TLWQY94BwYJVdBB2sXNg/cOAJjpKFX1niLOvwV/fT0x3Yc +k0Zscx9veUFv+wy9XRmzLN5P9uGqNwEXQzN8hNzZ7Jx+knWuBWBoa8EKxvolb+dLfBLGH6xDUiRd +lu0Hu4QADtoMBLNE2uRJWA1LK8ioZFme5szz0JZeqkZcNl8v9icYNtGskE/yFGtofx4M2T2AvtY3 +cPTwOAtM+uiP1Qtt9Ijz3fUCb3gKepRfZc76VZaA+B3gBccJq9OJW8rKBU3jDz57G24Z+NB/gzf9 +kVLPeuw28B+xokLzjbab/SDG43SjTgcl1LHxDJ9vj38jKqO8lhkYIb2TYS3mbcqEfiteAlgLlyi9 +TD3RLok2uzMlPzoCQhCKKtDGQOZxZgbYi4A/GZy+kfKXmb9yTCpqmdP+vOJX3qYLbNoDRfVSryej +YFgTVRH/AXtGX6LFpMP6l0crrbvqYL4IVL1eaWLHCNSmDhmkNYOyJkxiSV/lfgwhtMcERcQrXuiq +lPWtBRy+6zsvBA9WIKGk6O9OUgb1aqIAa3hA21bIuy5QQPxiauMILVkLOPurdWkFFDL5G0Ecx2Yq +phaq/HJYUPdG1t9L4xYZyuojCrJcF2b/pUg6ZKPCQ87dEx25CRz0+o33AAaWEuI23sEi3YB5Hv8P +RcxNlwG1CNzLnbVG3npVLB0ywP8PE36hNCCP7nyIbIUj93qCIJrSOyM8nkB/vlHyoQlfF7qTFV8G +aSD4csv4p2V2Crus/VQ4UgqzDyqOEVcn7O1DPmTkWyIXGwrclopcWXG9RYJcsNrLLsEO2AoE3zmu +iO2C3WkliNjFX6yLiQ/H4QBDGMOn6Poyziu9K9mNTH2BvU3iG+Q+JtxwEvEv+4XthNoPQoA1r4pW +r/TK//OYlQhp86ZLu1T7Qu6TF70XyEQCUWY3GRs7qxJW8HhOSayOxQwbx4ull64VeKZnW+T0f/St +R1RR7OoupRXQXOhBY48BfaI/xXhiWUOWZe+gyyYDXxvtzQvxtBE6F96SIIXGmv6mK6rBahMx/tYA +5RBfhgqL1/xKG/Gl6lSjBzv7r6RIG2xv4HbHA5hIYGNta2jdvVCHa5ThC0PQQdxZ1oFaNHY8+1ag +NIw7J8mE+TZCVyEFzlsclKIfNYmy3QyTRE7o2P23v3SRJ+pFaEg9YE9M8H+TbOYJUgP/Nsl1y+ZP +oa8a4bMd3OmPPYxpNjVSKbYSXbaXxqKjBxFcEroJXbcvR5x5jCY0dEiDA7YdHjWbf+lkzWVyhXGW +u5IsnADin3kmDeNykP6cUEQTCCFKieO6NyOn0z+fnqnz8ti1P2oHDEm9QbCx6YXKO6qAxmQKb8wA +R9vGnut6yXEWBhZqkkw8FJnvAIoO0tkuMPOyXVb3hA1dJSRmRuP+ICgSLH37DKD/jhUZyK6hDVbm +h74vyeh52CZtGsk9hpqaJqpPjf9f2PuVL/ji0N2bXQrJH7X52r2RHG+kj88kG6Rwh7SsSjcEHUW6 +YXA3wXokM8cCBxN8PLLoc1IbbdTBifngPJxCmoysMZ/u8Bi7Y7qAOKE2DwAlAUTxSvet3FpRBLFI +6f5J4yioFntSNfNIEYGeB8wus/YA2cM37yOPXBHVrgaLSZJ7dF3GWRFK8CMf9mzx3857e0ECmo+P +UYHXfzPsXg+GidTmX840L95rhxr7wcywX5l8rkS+o9FQ9q7M2+gjjdRnkd1TRpG4wAArp33ezBQJ +FHtBS2tbgEI/fRAQ6TlTlCaTuqaOEeYHnm6fiRSTArkK5R5ijmMixeEYcUkomUB4GnJW4r7DWuxK +1lea9D69wC/43SGPWLWxrOwVeOC0v542h4YG8a/nEyzkpdkyUNXZKnX7jxx8hcGhvr4B5oHWiTXn +2KyTMoIj78s21Uam+nk3prwgsGowbExhR6vDZ5UZIKDCQEb6rvBb488wUcm9rfq262BJSf4xnsub +Yr6NURMcXHCrxWHBiLSHCWMPHWH0CKwUkTf7EcatH216SDRftkZvLROtrxd/m+a1Lqw9/dvOygBD +sK1AjcCpQSStPQUC5inSxGGszvOHu+M265eNFC2pvXniQs3d66tHl9F6dZea9wQB+lf73Cj6KZCa +pL92Oq9oKkjxwtWmSChs0JymebNO3NWiWAaZPFCVNNWVvumV9/bs1fhBxIDTZK+3d1GQXvfCDy6y +FyridgQ58V6Mb4WVlhxhcBSOsUyt70Q6GXdYGe9aGLLgLE3tRFUfsLsfvv/WF72k9BwBTEVY4UcO +G7s0h3H94VWdFTyZJhQdpPZGkDgmLvNbdp/GM79l7rNcNnlIC4EFwqDLdutDs6gSF4kCQIDvJJ42 +ilyNa14QM8i1wsa2RNJPCUOc4V4RLqDbtnweLaV2wdfCICullR9ak/lOwig1jQU3YCpuU+OBDwP2 +2BMricHSoDnQbmTqXv9x2iHMlTFnxgwbguikK2koIqzL9XYSyWzgm3EobPKueceqkHmCrCqr0x4j +FdPI86Yaz5bzWlBP2sGgudbyvtBiISIepgKU/CFZzHaYKeL6Ne6ZfevS6gB7o+dBzeBqdApgZjU2 +qkzIn678gBZ2GiCU8hmRb7uBDzQ8DJkqCm6v2G5srIW8GX5120MzDWDx4pS/oqorpHoFMhIp2C/q +WkATwfmdaeNa2o8Fck+6aqr1EfhCGur4JMwvKk2dHwz1s48TgZwXMmZYpj9TbXDWAZKcxd+b0KXx +UbSt+qc8m2n8b+gZUwzIw7UsLek2EvrvZe5nLpsFBcT5H3dSKIZu3xfg6NEtL0ZBBmSlVBiqjP2D +11S/LB5vp/Ca0wFbacaZVL41NswxtvhQ2bV65EMZZcxDNHKKnHcm35cUephSgyAlCbGDDMEGWFBZ +jKf6pz50tSA73i+hTNYmu6+dYrDI1C3X2NBUGarDFg+NDK/TBUxCaebWOSapsEo/CNLis1XM7E+q +c8Li4w9BPIRxRY+YNiqnG1omQwJDcQRXD546crW28drs8Mot2OZmlannySTJuYZLKFmORvt31zbF +s49GHedeMj+QsNf7fx0pYaOCFBZknIsFy4tws1jxlTZh4TBVsNpihAOp3L1dBwpEE3z/oCLuTuy7 +KIA8hpy1PTMdD3OT/cSK/xH3oZRSPYY16zPdOStqzY+Zp7AOCD64DcVbCdebAZRZSuuIQm7mZfU/ +aYvvg6rH8aFysJEs44WpMBywu/5TeMWWBFGpzqG5hICJkHOhLrMJ93Hi8/3odbSqcnncT2kelTMA +REGPlvQtLn0tkcYdavO80u3HuQ0EhQZ3e6IbQobsAI9uQSwS3UGnNnV5NQUjNtBLhK/48q1QsFlQ +38xG9U/VucbBHxiHzSJUaMP7n0/gV7792o0273IAKNEb8/k+yoQ13yyJo7lPrQ8Y6pCidpGW8Vag +xQPin8VC32obyT4YjtSTwzWK39dpkOQIzsPwYrRS3YoMUVQ060RnAANYit4NmFh5EfFFcpCG/AwE +E934gF0Cn6gjLU541wW4mgcXZ2dFkrQ38MAPzWk3s7vbYedqBsxclARwL5j5oTD8fxSW+tX/mib8 +wqHJ8fsuKOu9Azh38uw5TizI5TQlvPCOaViT8uNaC2/3xC5GYTpoBSb+Yy+yL25RhPhAm40SJWPk +XYqe3e0nX8DXs1XCJWTEtYIad/Gp747n67Jo/7QWCG0t77ym/Ndl8ydEh/mqezkNFRmart1kA011 +plrrPXSqplJQThfdDcO3UexytANfRbXWEGBm8C4Z0QSwvE/ffpv7B66QfYowVqQz29d2+5EFYCKB +bXaioGQ8sIFngv/whfg23EcrTpi7xuG6wjVjbRtc53drV3PyLqns6B2EGSJKJ+IZrCXrl35RPTEa +dI/lWH9bjK4PF+NiaRHGBbAbTuDK8veSllAEG3gj6pWJaFP7FuM7TSTiwi866sw0eQx/uwGdL/po +WUl2gK31kn/ed2TeSE+70bIxB94xgSWNCBBkS2xceP1caA3ERX/CLl+GZt1+wLR4cXlgjUIn1oqB +48V0foKSJvl1qM7gldsgSs+e37nK++XPx9HuHqCMuHi5JFCAC8tCtUqnrsdAcZuDv0O8HYKhHjHC +g5wyN6qG7e02S8PuhBkY1IhuDQVMHcOofMqMjWNv/lzsGxTENm4RwzDBrVzOXi/+xKhyPHKItkkg +Xp65+yp5euuqd+JaA09RLqjIXfxbfFaMe7SEBvhcoWkiGoLgF0ZBn4feAx4pBoN2USC+/zPeRVIR +pl6xPUNyBmn3xeX4sXpA2VGobVIbY1feJDvCZfrfUP0Au9U00ZINnyBvyOeUNdbpc6YIiHySFFbQ +muAxxu1FlW0ME/Bem2V3ZLvDYJ2VNn717LTh/5I8xtbE2h2fmh0e01GiPogMS0CBphIUglZ7dF6y +4LFGyFeOW9OciCgWhKLXD5kKV0+kfF5BZLUH2dWMTaIj0dt1TXrksNIL/pzpZJuycrCUzHNYkrsp +wsv7oNiy+mtIU4R/RVlJ6b1Vj7d9npW5FS9/QxbVR2zyjyS+xIt6m4ivFQYt59nIEtffyCzNkPf/ +zTnCy7UB7yyHcuoWgziALZBRDlUTp1p/zIUUtpY7/PUTLAlZgpoRTNraOLlRKSxKPc5R8eaY3HSR +w2PEJeGfSgnIp9+eHEupt0fo9tAV7XU1tfdoLk5+VyfxSoAHkEFWqnF+yZii6W31ehYC3cI3d2o3 +i9mWkE0feW2tHhIuNUPpIx4BLMx4dqRu70VSFdKhB6pfbNaXK1eYpIlGSC72V3C9wxlzLvWOV4iW +bU1oIpXpDi0mb1bDKQuXlA+W3QXSalxBLWQldybon7+iBVikbYyBvPQgFuAXudxFyjzaL/YnQ72x +7IycxWCT0Tl6+OEiBEwe9jMKMqkqj33CPXYo7nA/BSypg7D0N64iVWU3Wvwx1lngf1JEGEeMcYjm +RAwxWo91b8W6bPqeBRWbbKy+jUMg+2Y+Bbmu5ztSA0AfBvaAKgQ8NRs2ADbe7CXFochuuJlqv57A +/78o1wGpPSH1SvScVGpAT7Te/gfR7KCP9BDet9rkmpnxqD9VVi1xsx2wzL67fbaH577gR41qEwt3 +v7EBBx2o7+O3hc1rEPdCS+mMoQf6LBaE7JxyPn2xV85ILNjVtG9RM2uRHmfsTZ0EK13GgT+tWJ7k +ONGgKS3101cC2vJyPKItVQijCcsbYF2MLbG4YgdnYLWK6ihXgpgZbp2lCWAHa6GGq2qCP9VF+pwS +LTfXcmXIV7q6u9vCWyTILBB3vGhRJJxf3ZVS3p9XPCbn0QuRHOxnC4VFXMzdfdp/wB+63tjHyelT +EJtmbFRtx09/tuooESEkL+ttRlKA4JobkFfq/9a5Vhfhku4HkRCau2ZuLgbw2FuPaZylggdXCgSa +hsdQ42j6q0tg7KXJdPwElACcQC8x7s8K664+C26LkpVnWhrxudlaiZYYjNdSAJidegXjJUN99xVi +iS827HNnn9PD78dElyxqEGCZ7hXGTgb/MwCKQRZiaPD3b6RWM2j1AhvIIru+R5ChKs+cnC74on9S +0P5TpM/S6vJday01HdvfARvXkcDaDWAgerJrHAGlIhkxglzVmmmMVPfgc9rA67O3ts+h0EwLQTrh +t3Nr/nPPuNGjpe85okMpGDv5Jhh9wdaE4hu9ayIJ7ZoYY59lFGow2pEm0AIypXW8C1rOXRjLplyh +VX96WJxVJjqcTJhUGhNueCJzNmaFQse5jvD461zYXjkIEKbtAOBcoEzQGYDjVkAyEtK7+iZdwQvl +o54xRkAEuUlYEyLeTkqJnnFuWWe6xCm5w9Mt05oP+n0UycgAGUd+WgzmlhYwOxvacKvwLreMdarN +m2J9L6Xo7fgw/+l6rwegnQvx93jgWjHpIqayKglw3iHJX8U93SztDf5gTyI1QSasMBhwF+pPFo97 +U9CnUeUBG6AlMdibQ1N9huY0Q9vUwaFdmc/zPmDUvsw26AUVsF41KUqi9lZDvXvu0BX3frYFJawh +Z+jHN3UgFFKvhhJkXlvYwNJiepOb3UoC40CKHzKpDC9YRdBpdj4cSaGPnKlCRfjS079yUhMK8Fiw +2hc65ae3mH9LEzlLr7g+isVjejD5WXtW58XtcSKPZ865jS9mcMZc69QWOGeNiwA3c4d9IbW+uQB/ +jvKML4z63d027RhOgh1wV1lIzc9M4BO0cbd9C6XpnL4STPeWZhPleDwFC6SsR8BYlFKeKyLUxVNH +Ab87P0SI3zrFeVcauLBj854FO2isvo69eIT1KSkpOcGUqpRTCJpKjywXY/A+2hHJFt0Q3l7UaPX6 +y+5W0huihSq5P5hn+2qXIwlouY+pxM/9iic9Ohf3yjuVjK462Tjaa7fZl4PP6YRWwbRF5npXM+mn +PrEBZUwqHKyhZVFlY1dg8OhbGhwdQ/hqXzcBlt4k7mOr2VgoN+O1G5RPZjeEerQuK4CCAN8OlR+D +iUCoztQ3DbyhXuzZWe5/VzuOv0yrNqlUW8wxnNKNae3/zVEggidwl+3Ct6yzw3M05CoM19U5QqaH +ykV7mzxPc5McOpTc9rnc+XEt8m01ftY0r14x6UI5zCK23AYeT4OU6sQ6z1DCXTjo2+kiL4zwQajt +NvWfprxRgy3a+oIpC06MaHxysZefe9AtmfswHIqPBNSSY0RFpEBou+7L7ZvbpuEWZAMddxD2LEtP +CFudgAXyYOlPIA8SvtlCCDvqd9Cb8xgSr0oHD+Hp5gjz/EfNqZxV84RjdyY6jCvd48l5wgHxgTez +AqQlve4lmg9LZ8kgOq7Pn77KmG8WZff0wjuklUPwQUE3n4cawMq9zVCwX/Y9ytMSq9R0WWPxVfR9 +lqHCn68wahKRnUJ+vJnC/U7UJPgjaxVXMgJshpQarlvYgED7xhzHEv7AktYRfIcw4iza5m0d6FmN +PuzFPKzskabZKqdJd2pYU8bcvV29yXwu9GCTkNvwsW251cIIsFVz2HflZGiBdf+wXprM1ybWNjU/ +WFiQ14CyPesXzxpg0v7ZcKrxFJzEuVn9lz5fxY8b+u2QE2/+EEwJ9JGZt84PxogO8uLWN9RUoLfa +rEeEKngnpZwFC2/dlgoiq4HPL4OyhpGds5kDJDe1/4E1OThTW44Y0oktD+aaKIbK2/NasGtdFa/m +P7hOtQ3SXwafTKYl9Z48UJzpmDDm8y9Eso2EIBOf16bBGzv07A+Ql4yItVNiuHh70LF5qTHstlIM +nIzjLG9bZRZXOjmlgsIxJsR+zwJ4NR9djrr/iaq+vL+b3wxIabgwM0hvDENhGSJJJLE66KRSxZLH +6PAEn6yzOuJYJVz489eSLyYFekVYcinQd+55YSCuyNwXtq5ACmpevPZ0dgjnPVElgWo8Pz5B7hOq +ON1FyomvwY6S4m2gRm2m+JHVZdWfPH9aJz99RI8PmHp1eL9PJaBoUPxNWyiTNkF9CYqTO5PibAut +Uw657DMb8dw/RyewbLZ3HVUNaxDHPLQOLGabFg7NrQGX0khV2tcvj+GFAaoY60TEhqOCrTMr4Wjs +PJNpxAkECV56NJ27a4/DZ+fLZgF0wOV0cqZJiuQfR9Y8kEZybSqJgCp6PJRbjDJZLm02hrM4BbJE +JPvvLQ6GUQEQiEpd6srHAPxSorsYgru2mvjiV0evRJpwPcJiPtsEH0kEvSWzftD0RP1rh6Si4aa2 +DE5MJdwY79M4jS0elnqKt5fqQPuDnWT9onaj9rUXUBn/qVOZU+d9iEyfqo/1gtaVLMOXhObCv+Vt +uNroLGGa6NAEGluW2mjulXqPrS3wOuvN4Z5Bud/+SzVOeaCrWEEo6Jeoth+VPP/HZPpbGVj8Jekn +Aa0TmGCpFwhkPFL6n30pAM7ogQXQePt9cMewaXdYUpCyn9jvQ/K/wmA5067CbuMvCZ+It7/5G+oX +lvde33EleVrqJRZMxu3c16qjPT26j1ipNdGpOQpxTmwiW4V/sCsGA7RSF6vp8avLOAElUsfwTNWy +/ftMb8279ZpdwyGXFA2YsC3ib44KbO2xupAs/0qSLnFRjXR0NIv3/IslcgaAFYLZEpDsc1LN33v6 +3EIR0Ms7HtOS3fyRGN7/Y95+zdjHhLe6om1TtMkMfV7dl7B8rSrOTv+pt23Qw32IFzP5eEhDfkD3 +Zsxv1ErwrNUPhYXuFpU+PVPUZwBz4TzjSMaxayC7KmdHcHTzAZcO6ZEclmeDOw+EwoPd3reA6ibD +sGsVG9S7yxQrkJZzp5yYuiWQtz83/C/z1YHLo4bMSPsCt0qjiN7EK0/uEUZbRpsAnBQmPMsPrWO2 +umphSuIkZaK7KZ0KhYYK7/8RHIJth5fLsddBOsWKab3MEB5ladHn7TquRk7b7wA3CiMklqfcGgfj +7bU3ZHIwsvdb2HOCp0KNWggxb1vsZKzDQyVnqabk77mmlwLyNHJqeW/R4g9eHzPLWPdQoc3xQHi2 +58qK2N5doxrozb9HOhqxpPl88+aw+ULgZ6AEVmN6uIWnOFW5AsOEa3hePrCf7tGZgAv7/jVuG4oh +GCaf/gtLofC1HsntRsGzEsZRGdNt7jbF8+/2NmFmGu/5V60W5UiqPapJRXTdU/jrnQeUuUkcwlVZ +30DV4mqVOK0vHyil8/w7uq0Fedzt/5+hm3m09ifVfP1XwV0WGhWeEIv4b3j53w9tKAg/wCBXnGZo +K9/MDO6X6rB+NATKWEm67bnRUlw/GDe6AVBlZUFIc25BAAlPhZPr+wKqFdQoWEZ1Gn9sYPeGIpna +Ed5dTuHSBf3+GlzjGbAZ8YahWuEVxj5RjPT+ByYyhIWzwzrKS2wK/1BD021cEeUTormKEQ26oIgg +WocguoonFu7aI3KLHaaWartuyFL5v0AAeXhf6YjeaOu3JexEWmLCIJw2tKshN8LZTRmg9ZOFy4ab +ac+phkEHMv+nasQLpI6HOTJGDNAEt/IqWvnsz1bFvIcwjAXWah/gO7rc8HnHf8Bx9fKJC3hJR9QG +0F48XbzK+KIlQ5sHUVY+an/r9qWhgQC6zOTLqpxS0XOAN9psts19M4I1LU0G4VW8nYRQXA2Qw2Mt +l1gKL/gYrkp79qtJtMxftndwPpV+Kex+KIeCW/pqA7AN7bIc0hNaxIIA1N3m8fOH7HCPtkMl5zqU +5dmQWY8IpdN0VIJx6ClXognzLok1ct1/a/ZdOJlOPMbm6LhcYl0ScaGV1H85Md9Hhk/N433ma++8 +kxLgulGuUzWcosCDQdJhJshQ85DCjDKJDZzRrlyqER7AMjSF4XUvNtOElMcO3XASqlGhKnvNGEds +Ql19fhVLnIiZaelLva1Az1y47kxhebJv0SNkgFk+0cr62Or9EHPY84l+nY/zkiGcWg1fVeYl+as1 +yhT57y3K6b2f0nIosH+VF1jx/lMKVobS8gfOFBgx/dGuwApd6N1AS9eR0zZA7Gjv4psuj96l2rUv +f8aCB42KxkrMLlq9yyBzXkv/wWlLmZcRsT3Kk9IrD7UDb/P/PkhZXx8RTJAtdvgPW4x710mKMTQK +A9hd8VjHQKFFdlyPh5KepZSocDvRuZxt61Oq4bLQNUItdZ8ffLcWz4r8PTyq/PEY2r+ObrjI0B14 +p2IDylt1WksufSxuyS8OudweNLazJHiZ7fHWNf6IOUh6c35kU4HwuYKf9FjdTbVoIEIKwnqJmTnX +7znorFvXJrr6rnHaDhq0UAVwTcKKWjY/oUAeOblbFT/p4tXjsLJV4Lc3onJQqapojPx2S7o7budo +DmS6t7CdRF1amf3mBGqHRiFsRi4Bjj/cHlxMD2v0pioRrQuHLd/Ya5T+3Qp+aTq3KBK87W/TtEaq +QOPTyTPJoFHmWMZGsGMcQvulJpaL3iGy+ls2ACU4yoEbSc7hPPardKQCrdAB3KzqX/sLzGa1efvq +OPZ0Zafncp6gjRATZQaNBJIj1tUT+mNjnmGk0ShySF+64BEPArQnZs0Fd+eYbwO2fqcuvC7A3w2K +61vOXn+rkTyzsX2X0RrEHOsiCr4k/7u0e0eNM3ljirz0Kr5g/8pvv9Qfhwh9RGQ+T3jaNyTE1KHG +Nk09oWU9lakT4819HFdjTjxRzPC+Yao2HvTgWL+BjMUkcpYp1uKe+W8Vk3W2g01R+FLechj8PGfi +vzZg72rmGkS/zT0hmfi5sFEcFKW5gP/MnbHhON5PlR/JInmas6k/ru+eVIp4P6f5exqjHT5anDD6 +S93cJu7MW7m7RMBfNORBzleB16BwhjerDp8dWgCfF8bb5CUarcqO5YiAvUALg6zps8f++PUw2J4T +gLDJcTWeQ4vL49uWJl0ERsCGZ265Q3abknvRNqbHSkVX/O4TEOiuUlJVMzLgHIR4RyDdPlWtlfwI +XZCRAG2qG7WZPXbAmCGLYum4fzFtIW17TKoXlJF3YeWGlIgeCUKJskglpEuiu9U50Ri1lPHGpfHf +xw/IRxiaByrhTBwR7+DFP69feiSLMxUw5apX5pvR4gnjsrGgs0oSz/OU2icv8T7xIezt5NOVPXc3 +5dIdgLLsCBbdEv5RGIO1GfMT0C1hVA2ykRtfizlC/C2KF9Tf7sLsJx/u1IHO5L/YzqKjRqbeYcx+ +9AfNa8WSsUpO9S3sPg48MBU3R2Rfj1AwoZ+JhVTVFFFPMYlPDb4T92j1+rQOzEd+J1RLx6ClZoDy +vvk2yFHSXoge26lVHUfZcVyXkjPW7s+0TdWmqrucOpEtNa3YnR76gjNEoxCuFukmZQvw9K6BlN1X +6gRixKxTFyqpXHPe2q42oMJyDho9HJvPLABsDGXVexhQ5RdvErMq6vKO6Zl1qrN9XajmNqtadSR7 +RG+Xst6jImfQ9GyEmX1x+12+TspGT/FsJA9EIaoOYyCM4JloMII7YUQ3cR4m2H6JR4nCRSHeEmLc +zlfQdL84fkE1rWHy3vg7hczDj8vmQ71xofkzh2kVoI4sfpXRt+06j3JS4j7RjbUjAwcypB9NPoqi +xxl1necdYp2W7m51CH2r04QWjXsJscpVZjwKptOi9NgQCPNwj7v6t8ULVTJ12Nh2rVvtDzVS097m +v0sJrEgtJiMQe3KDQpXV7aNxBrVn2dNKwb8cbsjzVZQZ2loYdLXzy11oUNq897A7lnsBJkD7LlZd +LIZCw1uBdMkLs/ACdIkIqGotrRuUTp/l5ZUAEG8pJ6ciFz5w6E1dt0KpO9e7TLY5Y6ezpOqyNEKn +xHB/nQq38RgpqiQUWp3nYgPRFNBqgBpffsdz8WBoIOGUjkMWFxCGFxSFeXgVxRCc2D82OBwGJ91/ +UaOiOE7pbBPDAaxVawM+JTJXXbyoAbZWtiBSy8PCwjKxW6iQTElkHBP2SYGgkqQiRzb/WEToTSsB +x8NWzuMLhWzdVqN4b40K0kO7pQFVL876/BM46MirtZ8JHyWBbbo0vi3Z724IyUHgp7r153voTh6H +O/r1jL9vONIJ7f9+gf3ooSicTWyFtj5YeLb0dm0Ca8ii8Bc00/c6R9b4CrcHH3lfzNOjEtvPjVVb +J0bFtxMn2MIqzHmRD/YYP4oTn/Xg0rEC0k6bvgKgjTHPVXuxw59FNkPsk6nHwPtpIju4ovaNC1N8 +os4G9fo8K7ZAfO8agfX0ogb9aLD/FURWutxfO4KMh3rSEVg1i0gmKwBwifZNA1bD+PxdkZAWfxI3 +tFDAWdGVPCRflCNibz2gUjhWo9ClwNzKUjTM1twCMmcgxEeeDOBiFJN2kIcuyfX7ErTpgZEGjoOw ++lYSQADuk5fengCt+yZRxoCxgU/k7md2zX+b1DnIkR1zsXcH6TUyP3gUvTUsH0gFKHPQDLpDBU/5 +/VuLuNo6BAGqS+cPLEBfvuPTncSAOiprb1rXLBeduFROn7+HCioT8rQA7Py1wkYsHmLnb0jhwheH +C8PlEv5lc0Lq/JZeMyb+N/4woOieEa3949sSttMJ2iCmG9LfWQF/4VgaWtZtIK+k2guXqa0k2fc8 +Pt4wRg5XigrnMDdJuZWc1b2UaRKhYMEM9bCpzb+x6T4gT1dKRtchERVzK3g2jm2xBV6ky2QmQQkV +mIBPxKjXLkmpyw1SYIohHz3bgPxinK6z1uNvC5QqeI0Wapc149xJtpt2/nhJ0qz0NGFEdqxZ4d54 +PyNMMxZJ010OfB5WhnvY+Lwn/Ig5LFAZeSsTYeJaxLKeHn/aTjoX4btbGVUEq+qapj7nx5dcH95O +QXJnhJLUCalQPx2XVKgCkUKrvfjG1yroeu8ZmVJTCyI5egEFLTTN5KzU2r5Gqd2B/NfNWdJp+vbR +IyvFfETN837ESNAZCPPJW7UNJeQKYhF7x9zjkmMSLY/u5sU4QUN7MDPoGt5fFI8IgE03TdaJmLa1 +c7aaFzx31Y6xjodW3m0re0hqjiUyViQZkYiZQhPQWHh8hhxAbAxEtDFFriQO18K79kSXxBumaM4L +bMo/+Pb5SzLNfiCZyeBwbUlXqIPUJr4oD1RShdBtgKuHnuPZfpjMVrqIwwdelxliHK34UE6TsB1o +LzYFLqWJNeLBBJh/9uRTZzqcyiaFmBiTF5BKQpDYL4KxzAvdP92qXt+3dlpy9nR78+7nNjynX2BC +ccNVu+jARGBsXrRsqN6r+26MHy4ECE4lAjBbwej/sL9ArqbgrmQj/m8DnY+ZEkqvrWwr3t3hUxYu +CmBFW5szJHvh5hrSmaI2aOYfF3ji+oNpIjUDPtXEyq8YR83CnPVIaE1G3GFLY7eGtXGtG2phxgmG +dyD6seMWnGBbS/aEN7aa7WNIgC6UMqpZ3ek8xdBJcOMXzACWA/BAD0tnPR0rWdZzNH3lD9ROMdoq +prnbjnKwZWIXzI4F/LL2qB7l+7NBT2oLniByrqYNSD41C8Ffkws5FXOH3MfcfGoCSRDBbSMtRmiT +euuKwTcpt+pqoOwWW6R2WxNHkRUY72eeDYsEJNTu7AZ/4EGjlrW4J4BX6wvgalp/z0w5wXdW8SKx +FD9L6RKl1FY1TuGHvmaS7GHlmQrfIWUkCXUkHFFcmPYxjrxfFFqF3D6W6InGpEO94DjOfBEv7slA +puXbL6raZLkx2fsCfNLQ0VbWbCBPau1pfA3Pm/ziimlRo9G7FGogyH2j7Ex3bVTQZU2m8C0nINZC +YIX+AX+QFo2xvSkjeHB/3h1k/AY/p+uiKQtazdCu1WEZF2ySV0/OyyGey84oSyakisUT8C3WsOtk +1xiXpcVrPqztC2zrx7ONDQ5Ex4Csx+oobv8WK49ZgUaE2EPZvtJVC4vcKRuSNGVuIrN3SzAgj/q+ +usRb2ZDTmQLMdrAUWITNSMXMCktH7hviWK1v8j2regorkQLvpHUu+wFIpqSytH/buvm9XkiOXJc2 +91tDyuW7zoC+I5lebZROv4vapNC7L5m88p38VAoQxvKPF/CHpTqMccO4ggZhHf5JOYMpg4+rkZFG +A6A7eXMkevyB8a84UAOivTvdHWo3RdGZd1XObZyGvZZaCyRyKHk8/wsAsTQt3qPjE6STH4jtEven +TP7wxPN8SysVgcggrcSICUYlVOhqI7MZo95AKs+RjX1W/ehY+RgHYSWDkBbBuK5XJLgt3KtT8fuH +UZ6+gcdK1Yy2hzD9Dmf5AZaL1o1Qxt4X0fq7Sj5iuh0hLtZGwX1oKJUlSVNXNiCBo8Slqv/vC9FW +HUc6wZNjMBo89L5g17n0kT+YYUcaVEmeSl6vgygsjj3dCa6RAVGVAbHOxekseTvuhC0LgCVOIl13 +J2nq3sNLTRDKKbRIXHbYbx/zboxs2KS9U2WGd7EFeUrKWmnYn4YqfXaiWLDILvFgLMME9aAP172W +mJzbGIA6xLtCqn1diP1rPpqE8S1VbcNcAU3HbRUC8he3oV/Mvm4mwIT7itExHniwBnHF0dGjOu2w +M9SVKxrr8tZCUnzONrF4sSjTNYYw6D2h1AygChFkH17jagK3DPxEpDp9R43pe8cJm2nWPuip40mD +ghKhnkN8h6t9vP6OGrELzNYaWPJOPpQxpyngK/4tI+BHYyC7xOYzFLQeasa5RzUS3lk0aZlVPQd0 +9QUGJRKdnMQ33+UsDXfjwJ1E04SLfWOPrMI4pk3MykABAddN42ClBUFPs0wugpRRfdfyj7HegUYS +VdjJOECqGgZKtggEBgO9xUhpJa2h8ayduuWrglWNqTCoLGFwC7koEBBZwQ5OY2PPPzoW0r/ANQJw +zAbNATVImJ0eZtY+ZN9/B/cQNleBSY8SZsssbSxDks2ffAnALj28Es76ZL1uDuambzGT5A634Zga +l3WPVqBOLaoBeFknyfTbZnDkl3jnDhtIqxlUMFdXu+1KA7OlM/qekYU63B/NGl2+FOpolnHQbZfC +sO8AVe9Xztk3eMC9qUMi+Bpa6lU4bqGFnxAQCRv6kUhW9FdIkG2pF5XU3QKPrQS9OwgzlhBzVOS0 +3YoGL1M6qTYedytqv+pIdIljXkSMim/K2tp7PWL71fHCHto5QTk49/BoYFgE1A42pYhFbQu4RhrY +ThBqf9ymDZ5CNaOZmm8tNotnsOHXuPTJ+UXhjuMJ6KSMAc6i3+9mPhcNsPV2m12eCxtl+xjnUxS9 +mCtIB8WtAqEx/DNkcaYBnTll8wqCuXZpXesouvBiZf2a61GYITzmiGNbXIKxCsPf9jlhH8a3VUTi +suyxXYHLuUJ+nOM6/G8309VYUqaH57FmqGtSR6zxBeM+UI0AcAILE5o2fnIG+QEAqwyDiedFxaAr +WItGlrFi44+aFCb4BYHeP4eB7GuxFqiEPGOgEuTo2x/stw1hM+483Dyhc5/b7W8aSbWScmrSuwFd +2pizoeHuaWAfqPcz6pHvVhl0dIGMKS4f8ODJOk3yCHHO3HkXVM5xfTKkx1LVW+q2cbKBHYRLT3zF +VrVE/DT2fvxEL2nRUjW0E8E3kos6qLbGArYDgh/sVZkhJL0Vd3SGd+zOY6D2LfI2yQmMIGF+xQUI +NDbwVwejAl4f2MBkde7F7+veD7Zsn9PtY9MBQKEn2d9CYVPc/w42VHydBUDQza/THL3mKDnUCcCq +Ck+ZFfp8uLOoPSQxOAPy9zbXzsN9crABs05Gzw356XOixFPcusAvxMekB1RN9niKet0L4WureH7x +yfBwtId4+ZwrHRkWayXRdD7FVnD7yjMS/mRc19Kb4U1vwfaBqgE4zgppA+iKivrLZUw/bGTt9mGL +KYuSbJ5hkm4r6OsVjAnf4La2gIrnMn+A0pcWWzE/ui0O3n/mvs2BFLZIiME7ODJhWT6zNeR84p/P +BJbtLAw90QxdbHzpEndS3w8Ly2ZINWxVkcj6M+SL6rD82mlVAbWLciRu6yfBmXDOB2H38zyr8Vwy +m/ycpMoJMhbIOL/BzOmHN170ONzKRIDmqHUPe3R88BR7puqh47La+AwLd57uKgKbWxPqzQb7J/l+ +O44XmxL/mNbBa2vcVmXqPspL3XSlf181yCxq2uGmVmEP7cSraVWOrTfhEx6Kg8e71iJNgyIHnrYG +PxzSsreTBtipMLcldMInv2oiIpb1IJkt+JyPmppWGmdENqsOaMAqRE9+3Hev++fXA9gvmwUHRWR7 +HPtMbVYc5vcFfLZ2+aidP76sVTMDT9F5+kIQyIUW3G1DE7FOxolqtMMlLV7+bs8pbYb63a1C4cBp +av0KP5Iv1lpe+HGyfzV6gyqtkMivB/1fVg0J1++Y17Ht0IWMN4w6dBDZpxVGucoAWm7F18UOpuFO +rVH8FoC1fMuLfBl/zhgRBVHKMXMjD3cHia2RfpPe7maTshiHTx9V8EKPFQomtyT8XaJRIs6BWOjp +qDw0E7osKMq5gRPa9CjPSqzpCMkR3EUydp+4Ius671fYG1ZytsehpmmJEu2HE6GEa8UrqY5yvc4v +H24jcQEQVDVKvFx3yum/Myquuwz3VgpVG0oMJJGsPN0dtIwiOE/dFz/tTAPLGwkro4L7ZY4N8iJ3 +Tsc67v3Yc+eb5lbxp03ZjSXvKAb6G4qGUlBur0ag2/58h0sDFkPvQHrFrUn/BJh5dKQ5g0mMsHJ1 +KZE42oNWUq4m3RslSBMyfMvGnJ2d4Yryau2KgIM82XvAg2/w5luvLwACZe4g469eCquCzlUDMDd6 +cSrhY+XN1Zbbrx7kgRyJSKiHaqMEfQBX3wyNObkKx2Knw9u+6wx6g3sh/mGdxDkdugQWyjKaLQ/k +Az3qbAj/0ialhRvufxxvGDJj7bU+H0fqot390LhkMTz/2QaotvO51hnG3JgdqKCi1hvwH9+Ozd4d +2IYLH/68/qy5/cs3zi0QdRySzofnViS3WebQnEltcKpoI1+SH5MZYcj0tcmII9gdxe8OAfz8oqrw +8cgqpJTef7ytyRhfBCH8/BvzShpkmi9z5RB3MViNCECfDoXTgrSDKx9BOn7w7gLok9BMD9LU9AqA +t+6PpOWgIpVnhxBZd+WkJbH3ynZW8SeLItYm19nlLk77BUX2JJYUwRXiGnR3fGJ54OG/i+k/h6ju +No+sWpCJbGS7MnKieMnVSSsO+T15rnSlzPeA/tCv3IzQrVQsqOTEeADdJ16xYPH3AxeaLkkcRzJY +cJHeQLPRiUioWwkVQerwr2HtgEGkrutrYi3M/hJpeYZpdF1WvRmIeRJy4PClUfVRCG2zqwDvIdo7 +jFT7y6EN3yLsQMBBb3Yu5EWqdyOjtmtM1TQwwzNB+sOXxO/itlxyN09tJ0enPoPlg7+beLAF12Fk +U0wHQKtKlkUM9SLorK9QxzO11ppnA9kYp3HBlXeogmAjhkZY64UhYpxR+qTSz2t4o4EdI0MtwFiP +Xy8s+5a/FFMOdX+cmsjyZAVdmGMio4A5IW4IkcfYq3khb32VRqrbxE2ITWNOtKmpW9vWp9Im8Iiw +61AH95Qum4knhPeIJw7m05zCp8Yc1Y6/GFwUUoLdQAmXTlP7dosBrTP2Sx7P2PeWFrQe/R0SnLC/ +TU5yJzDHkDGwOJ8NS1siJw/FOJFSrcNB5h1DnLtvmsTb516TTZlQBaml1WT7xYLoAApjTQNw9n6Y +D6/wy9+2lNzSsZFv7toLDvfHolG/dKEkCH57S/Dnl5+i6ldO09oQiy4a5i7OexrL+wsNlU4J+aiH +uWcG/6Yn/1gF8ZAreFvLbKTXB/kJNzT7AciuZF4hrzQqics6OvncvixHDT+NFqcveD2nS5qns5Z9 +D6aq0TRNbqnCKExoJPcsWz4hh3MP0hGjxR7CORzOasmdzlKCTp6PWRChCiOqrJdttXZVGUaJqAO8 +hTgF0Xv2GVikez3LUUOzuWjrO5YTZhhgtlona26p+ThuSrP5DIqO0B6qMmVCRyItRY8YyDbiWkQR +d81wxiObnWMAKx+FIeN+JGIkb0DGivuBrH6oa2SGexHRQK5rkxKypPnj0qqlprfrYnDh966Vre/l +3hXcGSJW4F9EKkfbxXajvJbw61zZ4NXDhWbdQrAndJ856K2CIOPgCa2I95JG1wTDJ9BtRQQ5Oayl +jOyTERm7nq5n9NdwY24nn8Cd71NfshKTPVfdTPDIQny7/h3O1+/b1acEi3Q1mc2337OBNBMEeA4K +cD05n7h9y+NjBM3r1WQoPwRZ+W/ksz8HQWcyVapc4/XiXlGafvpRmJiVK98VWNr0nUMjVSbaomyM +0Z4K1lvv2SUFMoEkPrjQDOM6Q7PCBM7zb/ZVmcX7MwxO9cvOQEht16KN/t2ezU2WsxJZQYuTp4pt +TgVWvKlcnAVpMyu7OLYISmIJ3fEd1LexDksVbksC9w7NHT75hwqOM58PCR1HEEvzkZRF9ddI/5CF +js6svkBOR50RKzQFvyO8X/Ohl7haDubUc4WQS3f1o7VUzneo8NMhUF499utzAlsuTdmpKApesERi +vBlvT2Caw1UWCvDtvoqH+GXkNmUGUrZmEjpRmny7Vl6CBaQj+7lhZmo5rcthksj6i6yXkassOMNI +IrqpR/rhRhkB6CzZ5NF5ZoTmG6MExX9/jz9GhEAutG8iFPYZzZ2Py8Pd0wnc4tRoHjQxDwQqJORM +uOkct3fBSOfxaPO3yq3xUYsfe9esVeqy5Gdif5bYsMVyJkMixihMyI4Gud4jaN15Lnj7gHWmTHG/ +5OOV7rGzxpmRNXW0wxZogG7kQXfRgSAHmk18Nwa0tdc7BJUad1JAlWMYfxuhYqNvVjpNDu/pzqOC +qJfUxyZubGMMvgBlff8F9Nv+uYB2I4CBi2tMybvSbW0ffeodhdhAVlKUv/0JdZQblhQ/tgr7pqJ/ +OxNiZ+n7ufb3kgOSiOHvL+p/VhQ+YBNr36T+Fo0wZKjMjhffABVz4sm6Y4Ft00taUfnrhO0vJA+h +oe4OxBNWnCjHR9w+IljFFA7incQwzt6d25aBiD2pUBRIz8D3JxLcL795xQeqhXnhv171B8mwekxq +AhV682MA1RGKz8mGqqA53QWzoZo0Qoab/KCA+NZKKW78C63knNUFwlaTMXat6TdNuFrFGyxbYzvF +cqISXUk19q6ASLLD1LJka4Y0Fwk5j90KXEqAfHZqXa9T+tR+ULHN6UhflYYFuyeC69ouGDjdqM3m +L81hrosi0DEFRtyS7peuIbwQMTcBnHx6lgAJYmmJYp+ZdbqWQz6Wmf8pMCYTDFW+m/njUnoFEkEU +er9YOLpOMrJSwYK6+bMCDboRj8yWQwwuUj675/napmQQnk003/NisZ+vlItbrz3RoVXD44MakDpY +0Q21BKi7mnFnaRnzRnSpksHChC8Zycd2NzW7BDC7M3ohkIs38KrlVmGX9mtn+XeYeVkq0l0p2yUD +3LwqIe9cbDzas4p8qkhpBlf+MBA7a5HZ+17i9IBazXrRy19ldlcFUXyE/fpB07oBHQYnqBynO+2D +6D6XTu3yVpqVh5Tw0LkLweYJXN/nkY44W1MTW+N0c1/UMGby/FaNmoZTFhclOIABRPlHUc/W9l/r ++G0M9D4kY15LJF/mtlv+HaWURqqTCEKsmpZ3diPhexVesZsNwl6zu1qeuREx/ZH7/PlTnBwhK44+ +lqQnP0mxoeG8M9wYRKDLGHRxVLbC6iWchaKdrF1rGXjPgEkoxToK2KW50pLrtBm724zmTspdazBM +dVCXfD/WQwdJdqenOtkAXObOAdUieOPtnKM+nUz0W6V0vU05rywjC74xUuWm2oU7GYwjBWB20V90 +mLNlMRglACZ22GIOezhvHte2vKhzOL+pMQiyTz3dEsvTTi/psuc7wh+pl0jZ7zkYV8vdY9uDvueo +/VBcM6bpZ6quysqg0Nky7BBH/FSzeZi/6VS5u9aUXPOW7gWdzpsGVi2Z/5iBK5q4J8GxFN1WDDYs +vjKJx3Dvgn7PRWb2xpLsk6lnZd5JNhbTvWbfaSuf5o6Ww2mX+PwuEPGNoeYj6Bd4n2EEqWCMQSi3 +Ox0XL4Mu0PvS1RZmqeFOGytXZVAsAIg3vD1KWgTbEIgi8At7nscsPAEzsOEwe/orkqN0z8foYEi6 +S3j0JN3Vtsul+1DdG4fuBVADli5inZaS48db4W8Ytf0wjEQRyU9PZw1q1lMXjrFnnPQWDrnFZuCT +6jRqzxm+1oSYlydyJyypdmp5N7ZD3BkoaMHxA4M67JrZfKlLI3/r4K25Pu2qVu9OB6beteeH6xkc +qAXtczRsKJzSUUE99lhxiJPnwq0bdU/NWryN5ekt3+ZT694LUhpjd/uE5a3fpRSU7GHQA+m/7mLn +BWzpzxPqH/wT5hol2ICBzDMVUEf7ON8dbA7qpwqagXalTnXH+PrZeoYF9orCXPvsGk7b+JDAYFkW +3YfkvU2jOBlP0mlLeeUWnFeBq5tb2z7115e16ZU9JceNj4Nvc3owJcuu2YZz0/27RdDJG9/26Eie +ff8MPe0vEEsALIzH1ZNKgIAnr9YVRhbUKUXv3t1KkMJHa+DpaiMdwiHiDhPrb6+sSjxbk4IQrr4N +fKOwdGJl93NwpBmoWLIdkQHoxGle6nzg24RPihMLxJoj4G8uv2n6nPuXZ1AIVottWnws6F+1taKT +3PXDbpbmQNqBakIiyGe5DEIeidP80GMxcslo7leigv3kbH6aeJTck2LqVQH2uaHeC4aEpbKRFkH3 +N8l8PUA0PbmNx+p8fVnVPO0K/Qqt4634znWnmDHFOAsipGQ6mZcdCFySqA4Hx3iTQxTOehANT/No +CoCNP4+XTbDpBCo2kvwD4TO2hsdoj2+Qbeb4qLPSl2cxrW88GEYiE1tgODw8I9879h/QrYQE/Vh6 +Puj9QqjvD4kTezvfvxlxhmPqc8f9iM5nyVHuF8FZozibkdls9ffc9+skTCQ0nGixoRgehs2xWai6 +Z/HIe5y+6YGOU9D8wTHPFJaWuAeMfOqPYFI/mmJs5PiO6fEjuFGUoaWh1hcgsT//Hn5tcRGfnjTx +oSa5ZM1O5MboyXIWDB+mW+bNUrm1WRzeNlk7V1cCkYLbdZcbtMqQtZ08sND7mb8VmYQanroKS0ag +KYaLW+f1QK4BalcySyP+O2BkwQ+ud7d0ovoYh+qVAD0XMwvsDlTCs79Q77UVCQ6kBlgE8FeJFbz1 +wxAJOYvv9CSuoohya1NjTn2LWy3PTQam6ZBL5pP0M9mDc0CPNgyQqwaEnTNqX16MtVNZEs8inLOj +TjpnvNNqMz10LDUIuqd4c+UJsaBkATtH82cSmojz18H73MOSWGA8ADgTblXxzaEo4yQHiIvcaU2B +JKERpHVCvA0+b5aYs/AbHpQ9am+hTi4RtLawoaQtOeYnryk9AzWUdsFUduZA9Ct/eg0t2ByjRDeC +dzj/xpNdhmKh2ZtJ/dQxV1E/X4YPGYFGO4cH+tGTqExy7zuLEi9DJ6eUh0s8Z32nYVPhMXGVz5p8 +kfpElVf3xG3KXsi56zythDBOq40g67i48UWyZkTUyqbv4HC93Vrsv1xxv28x2k4V+CPKhb84fXDt +qPxavWhX5qFOTu7FFs4X0QQn24F35CYmYBOQkygArgloxRO2fz1MiJJ7ZRaos9kNI5+V03s9U5Tf +K6n+CAut4IWWO/XN9NJZASIDqi5U5zFEmBBYtTL8uG8CyYwSDno6xrVCJwikE6VEbKAxKjPYEzxs +agpEFNdbNmBAaS7N0lEMAbXXowtxNR3EIqXbPX2NLsENitT9QVDQmmvVTIsdV3wUWJyZ8334gS20 +3p6rdube7LGU7D35lEdii3s1tyGm281ofgDmBsHrDnuotwvGisC24dDD18CTwdF60TM2lP0jpODT +f6xwXQfYWVGrboj89CRgwMmeDBAxd36jueSQkWlK86paz5BjoAsMJkuIrwExBcCyQfFq6nnCQjlo +FFYPzVORIiK8G+QDsnynbr7cGCA26qwkkkY81QEIdcQlH1bgSpUaucoCWy+ibvxUmFdsD1OySU8V +dlguXelGySEr7tDP23/nemkQSjFcVcpgtXtQj7Gzm2kLUoa4/LyXX7waE3UNAB/u0x5bAzCR5l8A +t8E30zWAAO4XkfYRUdiWXobaJR+FDU99uMbZ8YClqfTgxMs6WPLZPOABoms3ZMH/lbnZazH6Ny4R +JgP1vWLzOl2ZDuIYoQRkt01Yy+mTjOOKib9QrTwGunRwV2NS52+e/3NHGUzn89zkH+O5vPCbwpYz +5MFDsI4p3HOUHW46wWFg72AhIvxMusJNJzy5vPWRE9GBeDyXN4R+KbLyQIdllKZ+2tt3H13wl17P +mrBxPZNLj3YncniDvxGk5UnGOap5QA4bun2IgIVbT4EA3FFbDBiJDZ/Lr/56qqs/+Jn3KSKxTjlB +pVtkCc+gJUZTWiQeJLT56AvLPFw52pRZHKcuhlDRV+0fGB1jgpjYR+snyjDZSJPGGGUrgDatkqAn +K7loWq/FqMRREGRAInjnf5WPkzLCw31YvF0OzNLXeKETsI0m7hurTLO4makCdt27M10G2F4IYncV +qQM4ucyi3yWxmUejHCcTAnJHDw9rJofpNMHUDuL4IK6BUT7nqx6zrcMspwaeWiVeI/q1YTfogtPX +8FfaUzI7oZP5L+PwSzdmp8PxtHZEMHlTxtH6Iicd8KpiwImYtLPrLs0skncYfZZ4h277Ba9Urvoa ++Llv4+0M5GUBPQ1snFrcHDDv7xna8EuRQ35iijLcPokI50DRLJJEWQ4WGqtZ8Mmwru1TLexKQLJa +jb9Blx85WFxjo0rXSJi+a7a9gzvjxg1Xg1PrQNTtqYGosnC8UG5WORxxFAi6kWIOpNpk3FMXycqo +KvblObbI/n/mNOSURbQ4XLgHiD/SqfJRocrtak5rCQKKq1Food7zr2yjz86OolSEjfLp5XTQx1Dd +BiUvJ9pG7fUxBy3jfMs526gHtSToibgGQejkJUXdWWihoPBkxyYEPRSffZg7uzwTLxSJvhyEK2FB +L6PCkbcmnnuyjGJn3y1TbCCb//X7me+mzJGVYnHJhyvBcJgcdaWJRQQWSAhNMF8dCZWLL8QUD8gd +ZAEFglbxZI/BfUzp/p9dJxYu4n9OEQeyIAAc0RWrgC4hOFZsHKSx3Oe6Ta2izBeekOiZ3TalM51O +U2hi5NdPbX15TO1qPRj7MgoMDSvl7O8iHjetNw+d3cCedv4igTJSnayl6qPF4AnAyqtx25MoM9qv +84dB01FM2kylopVLvVOLGTJcHDHjfJHoaaECFvIh8DazDx2BS30bsjJUAH1VXIP8ra4UBq0cQLrS +wbpT435A17DeMp3T5e2jUpcu0zoOU/AKRhZWc/b9Zl0OfPF1rODdliPOHqRPJaDBmmi3kxVIj8hY +qi5uo9LZ31ZVt/bIROG3DHtfcmmPHJDDO1ebDf4hMOOYBkmwct7P/TxTZWLMjZIxzf5hHrUZIaKk +rRMvncDsyjnUFR+AgEXZw4y12xJNfAWB5QFlQmPtNUDY0j3Jm0iffwjHjOrGMFjOf9/TCbzh02GE +2NsiMSnCrki4o2XJYxfJPB66CWFwZVyg7KWJBBEXIkviiNBVZkvuPKOyIa2t8Pxv1FyXRnb5Pzy9 +KeXk0U1t1lwXABVpoLWgtIOnICrL+i/5QcgXdKcMdWZi16l5O76NKCypucJOnJIdg1LufE07qkn7 +DGM5cVzWUatc4V4+YrbMA3DBvAuXsUSwMtpHyKI/YWTpcGVft3S7crK/wQhanZWUh8co+r1LcgFK +/9CJOnSWtTDEh/KWf+2NgHmxDielAnXlub54rT5CJSA1cjFBzrRYHlUHL4PmVVLalVmRGilPJdE4 +57wCKxnbOiW/L3o1roVHG3rR6KR71oREyghv7bP4mT23mmcmxtLtyAa5CJY3dDPm0ZPV+fZ+n6Rm +nI0+bg5qLtuVc5Yc4u88qxpph1ZNeozEL0hc0Lde7Rtm9FJUo/7RKFqmE1dx4fFeExDipWI1s/2W +0O0sgk+MefqT5HNJcTTA+3VogXpLYd5lXLsP+m8wXwh0njgTvDuQ3t3zgV3Kw1lrTL90DthcM+Mc +5Cj3zdnjUxftqWEnKPH1ACXv8in5/4ETdcBm5rwUoEM3mJLc7bplwCXN51rIr0jqlTNGubqd5/K+ +FO44fX1gpy4RsoBMKghP8ugb1bPBVg+JJW3pnOcIZee1mEsZpX2XDnWXhykd8oY3wQVzmXw/qMYY +zCCy6p9ia73rrbImoah/IERb8xrso3ZZhZNT7qMldNvvvCRptT/OGz+id4r0RSlpVh4kGXecKnWc +SqTCgGBndG5Q5fLkg4s3s4zyZEj77Lq+KEeT36mcOXexV4825nBa7dVkUeB3KHvjUQR77wWN4tjU +7rDdNzhvz8dPR0tjAH9MDQguGxx8mM3h3R0ZQSvLAgAuty5pGZ0AHnkfhqPdoOnnblP8bU0b627H +avBzfVWKz35uzEAnA9H46/9oqZlJz4+PYOVfJsa9GeLhsDuUg8t0nImNSYWVPFNpBq2ctvG4IgiF +oHl8VhO43Vugeu/WhcRTcDlfOBf5BHT4a9C6Dye38goRWAnKTa3wYCZscH5ilpRIvQppvlzMBE7p +qhXkgQfff7ZDYWKvaGSNYNh8GmHcbWEVaIQaeLmM9F1906Xgggj1WNR1ivL5RtJG2E3S8lVOiYAc +eKc8KV5LZECVadPi5SmTujD5OTg36LqZa/3n+68xUVZWNts5EAOFcNQOp9w6UpBRvMxL+Am8Kk/n +3kW0vhK9l4wtGv5CnH9fXYW9xs740dDF1c6EmJ8s9C5oNXMYYYHSin1NNtJNahAH0zHllX4kN6Z4 +wtCpOwfqw+WNZuOrClyPK+t31sabt94oYVlcWZ5tdEg6iFVLSEM9wdyS/WNKxR0XDezyRkKzqhmh +RmqQ2Yq56lfvHxx1EmbvgyxHzLR3SN8S56q+BRaBfmBB7HPEjQFtZ9J/Y/oo6/9a2J+OMFj3BMI4 ++C3175ebFZddsqafSBpoOxmDE3xp/rvXn5r3BIJxISXBpfnXnFnCba8wlv81WgwNuD27eGmHyFE8 +HbQsj6e1QTM+gY1DJ896AXl2lu/+nuVdMn5gMZumgghUtL/UAA8MZE4Cgfic9FumXAsH9yFsN9Y6 +8n2xzBHtXTtxNVAMDD7TqtTtQummj+FXA7R+c7vSygg+5rtbykvDkbhQGU9lURcN+URCPCUhov5O +cEIGvHblg8CLLI+RmICydKiGdKfY1seNiLM7bGpLcNqTxk6myiRgMgnRbsdyvzoj02yY3MCXk1y2 +61exGh8CHNUgP5sZKCydVuaLNSH60IjNaxqDXxZsNfFrIl209OjX+xIJVGMyJZK54FCz6cmC6brg +Yce8wVKYBgBZpIXn0vn6FZzicqBek/Brbh5O3KEsDIHlMVnZwCf/u8baQy3JwlRUGwETtrufPux2 +eh6McWPyDVPXt7nzY3eO7TQot5hbaQKmX35v6pdTOEVaSZGzlfA5bL/X487J0mZr2982NfW7wEO+ +u2osUdwH0zL/qCbAToAWdvWy1kmgBM2tiEOXp27rAtAhbRKKDEiydFxkjWr/kb+cEhW1MXNTDcUc +3kMRLzuz3p31G8IBSqCKj2ADuNd0TWxSWSZsOBJAPIRolSBj22aYcrle8YdQMmX16TqAl8sLMH8R +FrM99Dsymo57+mmFySORwFAolVecLbphfhsllnqlutFFsEkdAI5Fy3uomA4wrm1GTnk29mhIPLRC +5gqP/v1bw9GNaqmUgs9V6V66MQECciNHxES99v/WMJ35OB1PKwmMtP69d46XIuz3nXO0Ha/Gk6bU +khsesYaNMsduW1D8XunrdhDeaU7tDG8TeEDs0J5sgTh1hVZ7n/S0IHJK5Hu9xrExbWUcXX1w1W2K +x58ESG8XMXzMjz39iAHPJgYMIV8WIB5BVFTuaaz86jLxSkiXC2BMv0PSzYXH6cCNGmCvSddOQTPR +cu+kAMtXX2yVwKVB0l31c16/2oxz0pd4MQsjCSSruQuYlbuE7cbGHm5n9f2AKx3F9ekqQFjSDMG4 +t5QaXVF4+s2fv+bDcl/LQo8Ei7ge7i7+66jdIpHWObBmtf0PEMSt21oBKM7SIUCVXYDUG7cPWplF +b24K7EB+Np7kpprKp57AQLInYl8jWVW1z0RB13f5BN0dteGMpU7SVHwHldmBtJII8fLBp43DOmN8 +U+aF48vzVzi9Ga7POq0IrxfOGN3LqapnawfcvEgtCWLMgzflq9c6zvMrzIPfTDxj0sSmaDm2dAlQ +r53lx712m8QDCBPG82pz/8jL2kJfxuUyWrYVxZ94zI7LrBUD0GUF1P/0OLJkok/VSkLl6pUVReUm +iznWeAstaHbSBD5FWVNfD+X4BuAj9iwYjg7erZ95aEgdMig0E6YPVaA+Mwq4o5MWK4bg/Zx8pY8X +CS4d5dFhS1PVDoBuSY7o+3mZTEaG3gySIZOJbMuM+ZTY7loP1eLbt1Ke51FH82tWVtkpBFx0/Gmf +US54WarARsiuXm1FzqicSeuECNRDj1WPgoFLfXjbZF115an1F9pFpo9e//O69NecW6p6Yr93WfC1 +v0iNdascdmn0vS2QNB7dWmBmWyQydrUGpVNLMEgFP51XteZkuO4XQlFOrEqCkuVR7t8dXcDPFC1U +KeojAmFI0U7iEo7dwbiKCsxRBaq7TRg0kKjWcPwLVlaE84leBqn5o+57Ov6SEIQ5pi8zou2E4DKn +UkPBVS3fHRJXMwFbIswclmSQ+Wb4cqu+2ybjaGLwz0MhLm/SybqbOaVP3dINlSLDjeHbEYxiU4R2 ++XB7Zgnt9jHu4mEORGD6oKnqz0S74OFkL9q1J3i1VeHGi1Oeiwr3RNR2ozskdS0egaPI16TzkPQT +5tkUQI5cveLt3aQbXwURToWgrhXKLkrMQZlX8lSHa2KvTgDprTwtDhJx1z7VBQMlSJ8C5r/qWeZ/ +p5IKduHFv3E9r6bDkaO0VkAO7fz8zpjUxnB3p+uIALH7zz0uX0ciFywOlVb/7zkjwYNRKw1EAYMb +ZbuQNpQMbi2f48Qbh0LBNDiSZblsEJxSHlRAyd8qu+4RK4nvwWQMZaqC81NdRNgA7u+8KDwNAcgY +a3EBgUApgOEWke8DWiBf49gcxaRNSB5X1YYkH8owmMu33iiOlxJa3gvnLxOiEa5fVST8ezBw87ss +kEzxirUxoMqmKbL3lgOgLRtvs11cKtRnmg9WsPkQtCtMaZVbdlb0ySpL4eedO7BOpvWXPBkx0u6V +lPKCuJ2n2s+WFlfjvPGWXWXsn9M78ArxUeqB+xSEyXT3qUmCRAowxAfPhtW7+xJmtspox7/xLm9o +7i4PJE7rhdjjPKwYEiwKs4lwoOH81YxcE0F0XlL0Mv14UkioEXaKfwJbOM2RlrNGtwAVmDmido+F +ZelRSZugBm8Rx8jnuir+dVqzLcbawurbq7/r74eH6JW8Au/N7l3hzS8XKEqS0iZY3Ivr61Y3eMR8 +SeJnt95SgDMM1YpoL8MowNpkTNHTtye01oZKQDb/HT//5SuQ2YXGCUjK4WIC9sNJehtawhigYMh7 +mSN9k/4q3UmxbKZ5MF+Ch/TiPayrfxda4bHJOySVqhPJthN/JtJ+MJxN/OQ4+6YutRAf5eN+Mf6e +aLE4U7xzsS8PriTozsLRnTY9BIFaQmZmcMVcAz/FGLVcsJNMTVnUMCTUACCn4EXgHnR9VGHXsaBo +bgdmVuHxUCA7PsxZWAG4vFB7zMnrtVSrNbrjGu01HNrtRDNtTQG53sNE4VbUaRzD+hcokHL6n2Sj +G/qGMVtjhlNVs3rOlqV2a9mGiSzoxLuNOrOZT8PFfaDJDimDe8OxZsIWMeC1obIa7TkXSaY7RAQg +zKUa1hIxVP5Go2HoW9kte+txDExRkk5Y/KoVz9bR/LoxmrJUoKcSKR7x4T8xxXxsogVt33Jl0Q7K +AFu897viWMBtPrXoiowKCyrCXBRYL2wh134QDRcIawo074f7o/lYpckNo0xHNDhYlsFchaoMYc/U +2p1lREcDDMpCColPhtCFHLRoN7E4t1Ng1Mt+WzFjztWDHQETw/4b5DmZRe0BgnQTTtct51uZec4h +5Wplsgsk7Tes+4Mq+86PPwxpag1F8Hc/KKYG1KgBg/hMLVxyn4N34lqUY3DULZz2tamERpXIeeGU +GiBYhTQ0vIe6DSnkTda0ha7Fjl7MVHDp5YU+mdOpINrRFF9ALJRbuxz0tNgvlDiuehqymToypAF6 +snqE2winsnTtbuIwhaooJSbeq/VTqlJTN3X0oWIkc5Y/Ooyd9Kg+XaO9iNc4T7pNN7/BIk1DtP6a +7E89qKLgpkJj1aOXvUCkoi4FExPEpOxwUttHJ4jNb+A+qX1sfR/Kd73vkXpAyBZnSasTz+o6JDGj +3tOyJ+TLZtpVn5xcq9vYlII/glL9CxfMEiq7r1rbstGWGutRk0nEvWUJjimwfqKMUvLeMdIonjAC +UCC4QquYBSwGupskrvJuNHqu1ml9CXKCGHUgHXlFwNbRHVPvrRdT5toCnkx9nvXhf1EdOIHijQpw +HWm7cVfuhBEzZN/jEeBes4nyukRoBDZRKBlUXx0eeTXp1D0NujRw1AL5m4YKx0T93DqWwgnmJe8E +m1U5g5nQFro0rNPFhed9l0Pznqcb6y0KxAwIEDMkxIhVqXZ2pVsGMPHBD/OiVms0uGzVG1q55u30 +ML2t7PjphJwe5v5674noXl8n6cpL4cPhdIKrq4bBhCSIRkezyMSzNibw0grP/YrABAhpeC5MXIto +OBpj5vN/ua+RFP5DTgoS7BViozqYR/EGeOH4k/7p0ny/u9hde4W7rrdeXU/t8LqU0QcUo0bvvoZw +7bQBk3knUtIEKeFrsdIyBNW1WjHNtjI/tH7dejJQGTuNmUYtZqZH6KP2wWu6XfOKz9Bul5Al19Tv +2U0kL+hwd+jbNI8L+m2lQxoOe5hH92gS2z6+456tBEFZGEgfnKJZ9Lqe15xko6vcv3DccbI3BIgi +QFGavS/lXXBgVx7crkTy0UMueK3qsOu+IN2a4j6O5G63EBVEqlz9eXmycNermXyNWRCDhNSaHPKW +Bj5MbEa/VDjAOKU6hyYhDyP0NDv1cQPkt7dJ2ABIc/8P0Xhz7pXJFlXhLJ+IVUwhdnUh0r6CptNY +67PmdyHdxhaOJtPAxvduKnC+rJ5O9gyrS635/KjYO99aQ9h0tYA7JMHzNCz9ZGDhLXQ5hNNty0KF +3oJVWvamdQZrJy0Gkj5mOalnRLN9GqOm6nG5PBZU180dJT3XEP6c6v9N3vnovepO6n+pjqI0QnkT +Tn3bGZA6ZxeOLOGcPyeDFEgRwWJJA6nMcQcTsjrH2M7mEMosCUC+18YvNaHIn5uPZJzfRhI6DOdR +ZUJ+dR5FnTnLrtqjxqDsW5G/eFTy/DSTa+9Ix1o5xRNObGKakec1p4MgdPwROUBvl9g55GskFIC8 +K18JJeVKYQ+2IUjHVhQmSKK4V0/MNyzoxNzLPAdZY1EIq/VslOeP3b1K4F/rt/BdXv8S/bHOzIen +3att7Y605FqiXSSCy+p4VJgZP+P6hX6Xa/+n5pHUK3q52DI066xjKykeu/1ZuPgynDJfOpFuQOIZ +6OMq9808PGxcQF5r96+QF/Recug0bGlOHXg3oFKMoq2wtyKa1gVy9Gmbys0/qgRuLTfVFFjjgCiu +WZtD3Inm756h85qRLJMDmZR7s4qWaSfCkBj0Es9Qp1dzrl4RT+sKcBKKWMHGu3dBoztLN+mvhaTX +0o3LzHpwMAxKdNQy7iRKEAL8LG3Va74A1U1t0a2oF/wKD4bUuVDyu5YhzqZa9S3UaCGXzp73fSc4 +4/MkM+cL0Msb++kYLV8bgo+Y84Qv2MNVmjtDz2+xFQuXfmoCTfqan9ywqwyP+ryvHTc5+1ziDgsw +pGNdbWkG6NMH3ttEOOvLYhJj6z2xPtf+TG8ymBWhJNhdQyoebuxf4TzEsS/J/fJy02noQRMgjZ2a +8rqyb+YfvJtp0FjDQWP55xVUz20zrJPH2JxXwWP1Jn3k00njxTjh+Yj1U4gfKX7OeMX/OoCgdpI+ +vcpDRluM5Cj/lN+LpUHF3KpsR5iM0VqgwzIZSFwLtVpVrFThu022pgMUNWNZ8d5iKfqlY8Epz4up +B4DhX7QDTi3QPDLvkf5fNqO4o7bQ4K/XEhKjAuSUaCG4Wy4eLAhOfwNJvXCH4Z/IWQGYpqLaIk7o +gsNTuwnEvbZxltBEVGQ8QWtvxrbUyinyQYXgqr5RgQLjRXCGuhCwpzvNcPUvT+Se623EVYflTfB9 +rDkBiyLTh5T0JVVLSLMsuXnBQFueiSH8JRy2aC1AnRi6uKv5yVzik2b0HKXozDCI6gcJhAP0s0W4 +leQFYQBZ6y4++pEEGBT10KVpK/bc9ZAjCfYKHVu3EagIUz7tEOzrBStrcCHLrbJxdAqXBv+XVarv +AkfrZJFQSVxpLYgCwg0FEBZZWBIQ9J4+MU8CEUalD76HyfrC0E5ect38JrMmISA3c+wguvLFEw0y +7lYTyJ+YjqVb9VUzRqWnb+2p1spbu9PP8+L55xBQtQdJ5hI3wKMfoO4s+Qgnzkx0q71oXUvFGciX +AHrFGF01jzi/szzSgOSNKNRj/RiFUKkYtgK8cYqs44pGjDCq4aIAJ6Cmr+u/Girqmf1g/z6ttvaS +aBoeHQmqY5+iwVnLOv1J+epNZMJzQyKBRB3T6RYKXvCE/ejvFjwpnGGwDMsiLHBB2KKi106U+v5y +8LyPCSU5bGEh3rDoTC4OeSH1uUXQ5OtPMU+Hr4a8YOOPdZgHvVzLLZ8h3sNSGVQFPdZ84NN9YCwO +jeJ1K+dxDBxU2XDwX4Lib0z3UQWGNwyVVv8GlbBAKhX9/nPeI5nL/4tB4oEDIn6dnRMflD7dETKs +O6W5gwtFo6oUlWZ9BEbNh3j3YqsKwyVFPpouvZwNgd29dSd4cqA/jH6v98Uo9+OYxtF0nojpPpGA +phKWP0IdVH47xY2Yk66DdOjLe/Fm3D+2e5M821Oy3FwHHE0oY4lis1FaIQMlZvC/b0Kg7rs1t08A +Job1Z9tapr+ForioGBOV5RVjORdJkSDmemk0HyaSFkNHx8JO5S74p5hQW5ktKJ7qLEUqkBWbX172 +ePphpcYmN8WSMT2B6kuaegqStr83pOFygQBF3AvuK9i1DI4aDOdfsfYkh58rzSayze5ndRitns0c +SipMkYx42CkjIJoRtgGVhQbMbIX4wwM18ydj7bUHAqxwsT0NaJeAw0CSMP+vXbmhmnwIVly5CdHp ++QjMe0GlQBXkl1unFckI5OLnEZ+JygiSqeWPadjdA2Ik2gE8lPts1ORJhXFFOhx3D2b8oQ10XRxt +hXPlzR8oHCV1a9WKd//SvRguk5TCbHRs35tnZK7yzm7XyM8K5gHLLuj7fJrCbeClxt94P8vvstpn +QCGpnSwgynhCKb5W7QQMObj3kUIffufSk8/i6X6R2kyUQ90ecKg5MZAmvzAUp7D+Jy9wdbdV6/gb +wQp0cq2xivJgF3LdEC2AGSUQhdIX6vZUsP4/x09EOm/jf77apncRGUKlIZiV+DGwrsM5rSCzGYWk +NEL2GCwmrcSdQv3piaVFSpBI8cgKo6boDubceOm+BL7ZuLcIGK6q1B3nIYU4Ul2Te+cFEItDniUt +Bzmn9p0KEoEywN5H+C3crlllGNRnmQgqfoksBPn7KUzG+HoNPDBi2BpbGhxLm2TVjtlrZUR4nu+k +4OKYCuzjlZBzk7VxdFmxCdFN1KCdwGHoUsCtA4KSCVnXcqKGUmw7VgY5CGP7rkIiWM+tzMImTJ2w +Z4/qSQ20YOwycfaFHOfWYSmK5f9ZE9yATuAr4KiSaQPZRi++ubJTWIjs3cr0X1p//8ZF8KEm2Mo9 +53kxyJLsW6h2y9gVOhvM9xORAA2dTAIkXajMqYE75m+NC5YbdEvTu5wxr+VP0vmM+6bAu5rPSMxA +CMq9L7Nkv0uLxH9qp/BhEofQBw+D1QgbEc5ponqsqpbWpHAq0WMrOqnI3mhQ+CUwE201ci3CzN/f +5jsmXtztmHBqhKNYrw9AfzwLZbT4M23a0FUaqkWvzQdy9gQh3dRcmaepa6So5/q6KP4SAXMiAoqc +446VUw0iOJgcyWneD8wnKiDF18o3oq36K9js0Tf2RdsRiCUMzALvgKRfe1ZNPkUopM/0sfN8jAeB +5vVbqsKF+yPjz1FJTZYKx1XteLxkWezePNezwh/2oHM/NllRBh+qBd3lC+nv/HnyBLFJzWSYICMj +IZDOkW1JtI7LNYfG1hS/njQCxC42PJZrVSz9+hDQ1rbHZ1vbXL1ids4/b+Dia/abitqBD3NoF9xT +20Xm3IuHmx3knnMhkriWj7FMZxbI3nrZbxtKSSPxtjcw/9JM2/NkmBHoyWnRCx5ZmudRtQsmSQ9/ +zZ12lk3oHQpcV63FS7wG2Lo/+FulOJGOFKKiEqSDtjKMd5x6dv5qb9FyDpSccf4Bm+wngdRY6+p/ +4sKER0Gw1C4gKjAXrqKTNQyOA24LErT9lNpdW3uvNTBRO3mXfm+lvqr/jcLgIx2yagC0sO6hOZln +cWvcMN/3cDP6N2ES3mB7/ty09rRLNj3BXk0lFy200eeb1r96pXkce2DUUk8BylmyzxxhUSZAdigK +DBCYIgVwrTi5aQoazcuHJ3/4jI53vmgq9NJR7mKeR9TKkgd3HUvldkSggXVflux20KomORS8AELy +qh6MmCJd4l7vjb1AY4ba778KAiHc9oL/iDa6PI78sm/UvQUz24enwNRQT6ct0vqZU5exQoxabvG5 +oI2TI8dJ2Z+JgNWbsEXhnHVwb8WUgED0R2n+uDhgmGVzpeWWupGTINXndqeGEl2OA9SOVuYH5X56 +3ekZFpkoZK8ECC+NP7Ue0jmRRND4ZAppYGofbNxfwWZTBDV8e0Fzuz4N/4TuOxe+5zFMWk375oua +DeZD55Wi3+0kYd7259xFcnMSW3Jh3rioTm1PSK3aDeVPFocz29G1VlphZBFpU/ByksHkwEhfz0Se +x7utqebpNGw1/1eYaBDJEN+u8i6v3ru/VHxOAvC/ji6OFTADJX5LpsrxNYTgrdo1KR1JvMjoQmnK +qY2vu5c47ka0jfCc+nqgl8IUN9yWhw0du1m3igNf/4leoASoe2q1HMnNjLIFZ7MofGTpgpJFkIu2 +6sl5fjPr9zUuX6NqWAwOW8gxy2ngM2gTJZTwxDoAmUSUVKuXw6jJAYTYOKzsFWY9PxsCP/XmP90s +i01OA4qaY/Ix5lOp2NQRyG6W/x9LwZ5Zn4rn3eyjvh7KfIIHYBmQDjMDVBRS2iWkJrfFBLT/mhdM +dVY7CGADbwmYh/SN5JfYPvNi57BVrbecfIlyykcwprWObN2BON1At7NHcX814rS1lxIEsukWnK7m +MAXhOSW9uxcXitG5WL2CECFx+zmhZGBfwhaCyrpWbKzjKdbB7TkPFciJEEofx7VjeX1iuVDMLyC3 +FvtNOMrPnpyYYSB655Zmgk+P4xjKhVGoGkiQxewPCjeyVCAeLRMsTHHLVv9ZvdURJpFCGQsuFs3Q +61giuIOxNwveDe3teShp8sN1ao77vTZUmVTQKAjoYXjKC3EhuSdZJSkbYNAWPF929fjDVO1ikHSR +KjZItZ1XG81xabfa3Nqamur6aH42IL6FL8q7jhfQha+EuB5bcsVGY9UB9IUHIhYBUGwBqEOkkOBj +u4ahQZ7VNAEMsVEuvf6AWDasayd+tNfUNW9Kdlu3H7hHNeX21TwsOToRhoGoZJLttWr2uyM5gECB +xv4NqGca22Uw8nRLfYhlAeFK8rHdXxf29W0xdXyo1nqTlvztv5mwONB72X1aTUdp2RVU9eMxOb1e +ZncRRqYvTULYFpZr30XA62u7hHll4yWuaLICQ9lRkHwhdCj4VOfcqq2UoHagg2f4Wiql0s56WhW/ +ONIJSssG8s/UyjDrQs6QgpUHQlnsHQQyhU8y48IktYGCZXbBHqO/q/1tUvcX44kxYGuWFcekGThS +3FCZuYIbk+tFzlElIsplUEyg7RIKzoB6jOozAJXZ+4ScS47pjHjhDhTu09VZ28VpcOE/alaYubfc +Y1tlAPThXVaYSm33VtyQ0rmn/bX7zsnr99dLUlmmjTv2ok31WbXgFj5k4FBGUz+HImnsDlZzfEGp +fcOnBb5dV6yDSZP5onk9518N8MNIK0RuzXGuOme6yphTiLONab40I5SPFD617d7fO8tnvMRRfwu8 +a2pply6g8gIu/KF+NHbT19GJRzMzCRFpI7dPIHG+Ed6ZiGcO3cKHiHbNv1o8ZgJtiRLsOxApiA0U +xJdazbRNQeDmiy7QorJA2sIB6Qf7NwBNFJfx9uim6yVeYbp7iI6ZH3MZfwUHe3MqZAowQ4x49QmW +W/LjaM1lyxCmR8TLWlqY+VHqFpcKznYBRppOj4vtqktLTwcoN9aMf71W9qIqbYufwVmHrVWDkQJB +EjhR0TU/ilz8oWPJQuhkgIzJhzQn34BkvcTku9zWhmp72R+63vhmf4xjGodvB2HwLOlC8HK+ovEN +8ybYpYbb/d25nKa7ckMRX8UQT84uGIxXnwiSGsOWfkOI7ceymw4pmL6Sap8I8GNxDkr4w1KhWCy+ +J+hGTqwWgg4FNov6GQ8eKZenoJsQ8cvda6tCKS+zeKRAr3WaiNDKKviJ4C3jOweBFsoEiT/b5h0v +T8XVc8X+NjeyepBaXLATvLnFhi8Ho469cZ65pHj+hqgElkM1LkbxZw40A3MxN+mnzrJn8nLeI0SA +N6tE0VthG5Jfpv/AVkFyO07LubFckk5vD25nTd7aXqYg2nuPdEgtyrmcb+847rAEFovCH/FYW5fj +6XJYcg5S2fpHSWm9656tWYqZyIq/yF7XfREBwRWB3IdgEqlNQ/lS7q1xC6Lf4/SB7Q4/rbMUTisY +Ii21ITAIqcVOiT5HhWsIigt0cHtPikhXDYX9r8ehl2yKKiW7pC+bbDytd+kgSi70Cq7wtYpuSFY5 +5IrHbq+gvpgE0pohYyDrr9QpiV3GA4dfa9qkTf4iBEFY5hI3AiWo+iDAgH+KKCnFap6PLHtiLho3 +fCXjTaICgNlPodAxKM5IUWW5ETqcu5kU7UVafJHsj/NrvnVujhhZ0zFzCMgcpo0lNs3us79jmYR4 +waavP6k3qU1aeNAIpfC7WcBxdRWE7xejaXGqO5hmV1IVRktEP4Y+BRxpbCUVpobOhqnJHcOCKLk9 +vrxOOUU0Z3L0m95uOav40YLODPJnPiGsLEV6RFJRrYxq6GT9bnAFM6x/oBsWluRbQ1NXpvFqxe3M +9WDRGH8Mz08GeBr5J/bJ4kE+MorZJTEVHefZ2EVGCIDVPmPwspJgy3+XAMDC+MQsWrXA5cNpxa70 +Ai27Y1pK4h45OgB06BFFAF0mytknrXLtp8VF4vxNtRl3os8VU8UHYyyBNs1XXS556UKBeNKnA++B +FtodFzDyhmWuBIWigJmFHfqHYRru6AUAYS0SuJWx88JjCXCY4ssrwlRrOsPW2MH6PSGaRTgp0lFu +IE4W2onRRam2NzJafSMecT3X8rdi4qleckzx7rz6ZmnyAfgHanVGNZYN5PL/PdmKW6gfFKaBhHeM +eq/hwpIlbMYl57gLFCHfsO2P6Cgj0kE6kK/alPNdd5zkAHAkW2faCTWosuGP0azJWis61m4x0TXb +8BahgXB3P0dGF8y8BxhP3uQo5ta76R2nejb9dzl1GzpRfhF6ECsnEk6c/+1jbP0iiSjLZIu/dbFN +1mteKsh0kYkbs9gSxBxzcjl9oo4eL1qgBBcSDpRu9gu6s+EPkRqt0U7bLxCAq+DM41A6/xDrePDN +94E9eZZw29JPevfkBdlk+qWrXUr0/YsOoLvESmtnPR1/56T9+XUnjZ4+/yMvAcrwgjHX/so3nrCp +UfOdy19YgmnHqzruEuLkLmrrMo8a4uWu5ZjyYoaGXLyEM/Jn7wW8KiZW10OiBorA5IJTfmDPxrrx +jmfrkjbV/HsED0EjWJgi9doGOQPeUCe9d7QTpbZuyHYZulDg7kB6prPrpI9JyKHm7sIB3yCdHJrP +kSEWHWzVpDf0DoLw+B7zf0m1/yDPv16OpZ2CWidawsPZnbpQbonMp4i+aENQpOhsZpBTDE57aD+M +i/1Ts+L4cCwDZpsb0aRl4XlRrWqWaWy8uw1YWusDjIlSRWlWGa6olZDW+KBOODRR5BH9Jy4SKnwP +aCFGoqRvMRAplcJmOIffFIlmRY24ArmoNy4hAzTlY+av7sWrlmje/j60HxCA2OItdAmvzjcwSHra +Gutn9tGfPljuof34UCcVln21NjzurvBFaPIfTtgumetwZhWjaB4/K1UD2yAcMRGjbxKu6LRXkhyN +0nb8yb7YudJvJCkHQkEvLOy2OWL1yhJtHOEauxpWP4fV4SQngr7Nc63BQKaZBUSHw09JaQg9Bnby +7XM9yO8Z0lWkWu3UI0i+MkCaD7SvA5rgqF9Rq2qnwdoAgk1kEC6IarOelXw0rr+t6lKJ/ZDCwDxm +3TVCOjbbinL/QqdbiIjtGzlk16zEgpqf776x1qtxOQee8ctTkF3Jbk8pStufMulu6Kya0qOqHfY3 +UC1fgoameaZz2AIZh8zyv2HJ2mYydSrm/AbexYboDJnxq8farqUGtn23fQbJ91KjRSGZ0B/f+Tx4 +4QCsM2CB48diRNrZQKAa3BGLCZJOcq3f9JSNjga+UJaPiny5oEwcvNcSZL12YrFhyUmudrgEl6BS +lj5GNorMr2b7iplrMNBdB/8cVDxGY5GrTTO5i33Vc8wGyLE8qp60lpItl9nO68rE4WS2Ny2FsYSS +3GJW52h+B5sy3WfE4q6+EXlC2cAcF8k5yIotZdF4diu9SNMVlYk4bmoc2cKsgEAuZQrlzgWQwdrU +P8Tm0SwpZ68ZJZL7ZwVLNr0Y+ql7J8K7/h8zAf7ze9D0vrVplU8Guz+hvt44qq86WVRWWz0UiN1V +s2HTGF6G3zhRUhRWuYxT3qD9+1I0J9o69NeWf7Z6ohPzrtk1/1RsUXgiOAqdq2O8K6e2oKUxR34z +htlHBxhnpmueruq3YT3/8W+AABpa8Tls9q9jegk1I7uDKd9HsLPjcsL2qDApHeB6e7bG68J6fGzH +M/5QbghWjIe2ed7lT3SM6pu79ekxZ3RrN/RpFuR2H+EFiD85MP3Hujns2O4ZslXf8RIKJmRvVpjX +5Bi8ku8wac/INxHOecqr479hD1EruMrgiIYp5g+UtxANIGZZM7IkPvDBBtvz23Ef3iVQjG+aGo6t +npROAFmjOhLLqsBfclNt1No2ra5r+nz5ZcvlyGMKiyaEjN+2jRWVT+ooOe/eb4rudxHXMcTLiUIS +Lo2XGJ0hQQmQrrfTBcJpjcTSRzO7omC4SeiBqLnrSSEr3xBdFmoV3aZGOtwgyPd2f8LQGzgjkOT8 +3SK0zl1YX8/SDM7eVyBlIhxyf6NTMw6QREt58c8rOZ9n6ACg3V3G/CYK810cKO42qIZxOc5peCer +S+FavoRSokNGLpUmX/7yELtdOfhpqEAn6B69AWHVUePnAunmqAhZKw9JgpPGAxwvTer0Q20TwGUW +d1dlTEjuZnDvLjqLwdQlNvuGzlQaqUdHjxW5rmYImUyc4CRW+h2wvF007T0hpjLy4szlHiqsTzqt +NdBj+dVbYipv82MHgoZWaCoyxhF9eOil4OJU4QtKnQ2lQ0lRmUUVneiFyH8QaxdUUQAzpon3gJe7 +bPlu7wSrcugSsLTArBUMF9dAVzEYGmN2cBiLAYigIan+kJyWhUa6cljVVG4uttMvQxtO/070XkmF +6VsbgHdWf0NO5r7L+oNBhsMcPJ3oz6iconzGvYqyTsE2/vc5pdci+Elj3Lqd8eSJvHxokRcokjrs +jEsM/55l3C6XMdkoH5OlOQ+uX9QPfAkD3GxgfTMJmAmw9FNFWzT2KpoG+wWgA4toqK2ESKGfSSr4 +DrIdgG1lgE8E+HCKDnVov1P4//Z1gNyVJl2gLXnFG2sbeuoo25WvpOcEgred2feMZWczuVAEhrmH +O4Nkr+ZBMiQhesvP0gw+kx+SjKbmMUEn3K70c+Z8ZxNTfVlj3a6q0ZLTxm38yih74D39qc8LceDN +b6LeACI/0QscGvt/XpyGzw1jvxwD2RrOB9SqJDUuhS9n0tlqgxi5ZphyekST0kog9cwNmJ30PB1r +Q4mpYyqAuRxp/DfiBBvmRREEneMnSnkz8SO9JUkpFn16EmwxcL6qAw+cr9OqQpkSNQNZJDJjG9M6 +nOjj8hM5hfPa8JqkKcGf1ed8pdV8jwSa3P90nJjx/cmr7K38R6GvKb9sJTNBHJu3sX7e5oSXEYI1 +Wjfc+APKOF8SWS7h/ti8UNbndqvTa8qnp8J92b02UEDkR3x9JsGbrbnA0MuFXQVrvUtyh3DOd5xb +wTqQgbC+IsOvjdNRkqWD7/9CNPhcOHD0HKkrhZ6G3iJGUClMY+9hBKiIQsx0JRFkhWf+ZKONKU8K +XifyROo22Q///nqsJ56UGYz2OILsa7eK1jLvqSEm8zc3INQDTQkB7hJWvnCcLyqK9JE4PKQnwesO +H4xidL6XEUWj4MgBxZoRwnewLPRCi0OJtSN70IAhUIf/3dkSI4XXHpz7Q80FRAr7qk7Z9KahVt6a +M+ufUyPmlAhPRMDat8fmwpl36DwVPe8YAaqdMfkOkghPOjSBuYPkOvsBX/olKa06iU1PdBTceBGE +TkZZ1gR5Nn72bfk57UmWXaglI8kX+lI/gyblneoSOWixF1KfffysxjCbqu3YrzDc13xhxLrfUXlp +cf+8Blg9CP1JIwoowga3yyv/0WBYCaay0ufMfpZbhRcJWJ4lIVZF7z6pEETbuSFJkRE3mz1129hi +H0OuzYZN2rltwy3dDNxCtWRhGBG2j3uLH8B2asAqwRJrq3LASHUZUphVDFY1szCqOVfhw+ReJM3g +1dtPKbhP8ASwB73wxs18+ttfxwUS05thbL6JWtRR1X6KxCVCGX646ukJLqnMwLFXvw+51TyqrUU1 +GM1GVIAOw7l8OhF8pYj+ZusHkJ1olDXE3V+LBjP/MiXa13UE5W5fTpBk61eFjhRQ1iQbw+NNGJ1M +N3506B8jqFZfIKuOjMewuLJI3yMtzK2+ZmlCQmXr88rlopcmHBvKAnbU3FTRDWWrkqwn5XYkKJ74 +8c/8PgQSMw88PoHm0AHRnSdnSSN5q7nKf/0EpWJ8bafZmzTuQHrXmeuNVit95qAkUi1VVdLWz8Tq +zcbNMdsCW57piGymU1DPqSU3URckhyNmOhkckPxRv+7cNInIvDCW1mQTO2ShLhBIyTa3wA+iDBJ4 +mXFE+9wbZEy/RoMG5HvQaqheHFGHWzlMpWoGJ5yHWPzDqySGXA74kE0Nl+eTkC/ECM5hVKSjVrdF +0BpEZO95P5Wi8c84c5pFtTBG/eazBSb5FZmpRC/OULZw2aV0Cr51U65AeRYPxhE7ngUcngfJxQr3 +ou+iCerEb89oPpex5wv+//3mFuRHu1wOaTg4u8cbm/PRjnzmRG8jG8vOT/kpzhjR+D5ycZjPpI25 +KWdMYjzA4st09//bU6ApUkZ9GpiuaUQTncRf4C7gJz5YJ9PYFWV6nE8uX+lQmBgnsO4o0jTHrIIl +4UcAGVvxnZT7xyhvaH+k8LzSKdCMuKZh0cNwpr0okGdal8xhUizy1uTWK+sWa4EQ8hfZul/y9dBT +Ic165Z/sU/MP+A03+9EfgCIX3aJz664oxyijoC4zw4K5L3AD0cjEVTNEC2vXHR2ZIoTsVjS2UnxF +hmqruqxHfjCr1zl0XPrpx7bba8ZJpIu2jk1UJa1jZiYOzDCVKehhaRYy/ddHneHM4S54FThFITg1 +A9CRt4329oafUOVkUIUaBiXrwBtlMMTGffGkaNTGJe9jlA9mQZInbLzBzfW7AgZ6Wmx0X+6PxNLt +5YgJgwT492SJzZeh+wYly3C9yPdmvzU7XZmhaLcvroBMoqWjZTsRbQiDCQUFRupg8b1x1fyfsbuH +0Qhywr/tOIg3sj0fRs1QFixY3uUrggw2Ihs2/seYBOhomm5/Cy1542kvVBkh+r1F2eIvYesgJ4ns +l6nZY4Kgj0IDh2PzDJsoJlD1F+Q4YoJ8ScFU2TL8CjshCWBXh1wqFHn5DWpAedITIn013P+H1tHn +0+hZKO/rYuPqklIEgpOB8iADlTNbUUffOl7QMAhQ9hgqS7DDTMVx3izQwbcW5YjNmFu/hdJl30En +ZCOdLr8SYv/LXLLcEYsjOm2Ba1ToekihOfZKZN7clgm95EBxwLDgs2bsDCDIvp0xjJsd9RZhS0ic +mzMOlWqZFezRY0+RP2MVefH1xTqoo0/tK2UBno2Eql0ucOU2065MuzJkpmZi3RH8ZVm97OiHkS03 +D2ZqlVgG5tnNe2R3iBaOH7SOSTkyhBBk1Z8qv+HYuAkowXk9lG9epmMBc+Cf2V3ka5JFcTnlFf6E +AMH8+WZhTleBxGGIxUhSontV2XEqguk1ZDF1AP4IkGfS/IJ6vvMWnoVzEfLkHtHsac5V08508G3i +xUbSnFpedjf36ARvu85BDB1U5L6IGESn7jH5sOoWcK/vcoAMiRSTcIqTLVCyFCIeDS+RvaYEAauY +oAkyng7e6MTMAbNvFwK4F0iYk43yg4b+3sckLlK4SJ6YwWE0NBVCS6jjk81gl87HeW5u7X/u0oLd +Duk2Um40Pd4+hSJtPnZsVVaQSp/RGKeY4uuwKQgpJhKV80rQdMSOUJgUr76NJ2v43MsdYEQvbwgD +CB/3Cz5tKMhXJN9R0VkO6S4vQQfIarEfpTGPjvRNE3iBwgva6atFUSQd+jKrnpwpREqoOYCoTWXi +1FP22aeDq7wHHMpz6qiXYQ/br/u7AdDb7PYRKlBZEotGeSzkVQiAQMQaniBHOp8gLIfxTIRV2TLk +p79MTcYjN82ojlPUbSj/rEbQYSTyr00nDVhCasKbFWDCuK5dCrDkXka8UL4wx+AI1DSFRzHjhOYi +A+hjYBW8KY3YjcKttYoM5rP5IDFFXTlQwv40tWtPeQJ1psYMrKJ0lO07jQBANCAuLg8pLDoyrrky +sGOQnSDnOtTv9eVjLq0F+u+WG6Ilq+5Am7WWDmtOkw+Q9YLW0iyyU7h9TMVTVrBrZDRjujce5fNG +NE6nijNFPxb8XwjuaN7Cm1XH66dal4JWMshcAlH3Uhfc26mJ19/g+0+j8oQVAUQaVzpgOLgntuur +EvMyp5maQKShEuGgupabGTtkcyDwDDmfARJPwvt1bsGxLijIcQZv5wpaEZyJibtS2vybzf75nirz +FkkyCCeXv3k5BqUmlaglXzYD0P79p3L9rUFQhiRoY+CPkcrmQxgr8fjFFQIPZUSlrG+R8I5jQ/rL +nXbXRXPiNlwSj+CCtx9dkVcy5lY5CeMdmJtoTQujImehBQyIjH2waIDKaL7Y6qDkZbpgzno2wV3Y +hp911uV/z+9Xb6D5vYARQl8fxkgVlELpUXSxUPYqP/SdcDZhz0EEJhMCE3DZdK2OD8nPvd4wQXIw +sKDs0a23lJlrHyqpVs3D58ehyINJkpYCHLxo3h7ebi/rkNsHH+bu3MV/YP7hbp+kq9jwT2/1h5jN +RyaZt/SAI3zbBvTsFugVp/J14aLCu78lsP6Wq3csjr+/5W6WaKFwtfZKF1NlSq4+pIcOvoYgrdo/ +ReaYUE9nvIZj3fGHRndM61k9IvzPgpTDUErvlM0vn1qVOn0be4n0HKeW1fj/1hTqmvm0IJzXhLj9 +/iU967JQEEiAnuwXr8bqx28ClV6FiI6xtk6Z844b6zlM94WDBs1SoxcHkkRFgZCYYII5TNx2kQ5U +GVQwHkuvIfcteY6gIbMiPPgbt3BgcSvdMAlpokgZRndI3T9Zlou7oMT1ap3KOlLW8ICNllLyTGkG +QIrX3KriO++zDbbKJizmNfBank+vI4i6nOUfeUvgvR/CmdlvMAjucKA4/x2r61DTw4ddsijFslkU +2fj0xDGQbz9M8y/aXwPvJ9pgrB4QgU/CyqL4TMKgjdVB+jNt36u6k/aPPhGpSDOZ+p/S3bTKd1fS +eUaAYeo5MCMgN9ohSuI8e4dgcAaJEJNIbp7XhVJvTy9Gs36YMXJMPjM2p6/PeQ6r6hoLUWnSTFFT +ZdH+NV5CooIIAORyB8H8DQ4bmt3XnqLpFuw3FzfBY1UgcvSHAg72bQLnrXmaGsEKatJz9QH/Mayj +m5ehYdYT3cutbigBlNWIixYPFek2UF1gxT18OgoL/YsQb8WSD7yn6di4WTGdsoB5kRyPnUHQbSpA +wtDWBudPDBuSz1ObUvh/yB7vYt6KB6ha1UnDF/X5fM84Y7L4aszsvvCu4dGc9/q8hLoFQBGNabfb +0MvAWbxfg0z1AFGaqUYso5zZZY8L4U14u5ogivIwTyH3p1WUzQZ1/bDHI9o0fkEKpDiL+pq4pngP +hbmfALctw1rl3ck+hVD/AUmRnP7hia3hxI1iymgsGG/33Q6B1W94uIzI1tzSAFi82jcLfmMIj6el +yzeizZkh9uODuwHia+IoL76dxyaW8jNLv3x6AjKYJTmki6AHn84LZgoLnRLxNRlPDlvT7dpsOpPZ +ASWf+By7awbCiqtXBnAMRYk/DwjYuwA8Klbe11aNfb0yrPe4CbKDV6Ziku8Et6ukVtqZz7Fn4zPm +4St68iD/FeJuESU3iE5NUbUInpDGU7aXmxWtDDimXsVv3asD3XyFKxfSEC4JDLHzSJU7UnG6OU4U +Ms+Ps7NuRP/z/XKiX6Ec/ar60BvVsDueY/AH1sprMUPuD6YD+Dyn9merv38m1uI7sq9W2EZwTyY0 +m5CSeEgiBDDjme+/bn0n0UjjNaq95VjluhBWtEPcXs4Tc6vW22CJpcB06ZB/gq/IfgtoG8eCbIlH +CJhNSFCC1uGg/WgJRDZFX23YF4gZxiomoW2pXMoRY8EVDBnX4jGc6uRQAEyvk6Y3jQpI/TjlJklr +UlCIAvq48MgvasFlq6eWhxaoMjgM2Oswi3OnEUrUUjHF/nnZJTdiHuMIA2xtMkeke9ZuvqfwDbm7 +o/ed1LWdjpx+QYjS9V5Ix/6+509tQ8jL2aw2ZYnGuS70Jjj6yBXYogcNJOF163mfKvkU1vhRwhmD +aSOVdZTqBiDKFngzGQNQz36L85tHLmX8iTryc5lVqvJdgksF74CxFc3rlGJ/yexbxZKxDe/yJ8fl +WYE0n6Qz7axZPUFBEgcj4FndW0alh6VSsMhDPXIQb4jquGoB8Xj57VyqGt37rAcFW13tBWHvYZ9l +xIc9LETo5O71JgQrZv0LwQ1R/WsBTpNhL8+mrkmouUpv43IfBg50QWqFk693cBf08686H+P4DwF3 +myoKxDyoZBLQYwZsGaxwdPGXA3OGiQnvTlOls9GYnLA0Fa3mNza6garT30GbB0sfs3exDKhkkThO +991Koal5wbEi6FBNkCPqZPmYnPNIbgYbAyIlo87OecsbgV9Ir3OouZgkiDd++uqKnfSewydDEaOD +3B6vL1EFCPOFzdi6zwBeiI+VA3nOqP8gA7zBAk/58MX4z2w4hxmVWQH85ndsr3x0HT17KmsQH+u4 +HGi31OOsbWZ7WV3VR6pjrA/Y+2V9qizf1p2t6Ax87Zmcbp8fRnz0DX/yezDBut1ydtlgEgA7ahvo +WmBR9HNbOIHwTPiHEalzTPj1jFGLa49z7ijQACYRwWrHvNaqNmCl8k43s2tjkUCDO0DQCh+xHBc0 +ZPM8J36Tilu4QLlrVwgV9kWOVRen/8OM202AOzR7IaM9EhA/ZJNTl5QXFCCqurdA4VFWUa3y0J8r +QaGAoCW9yaoxw79Hjxngx9QQYfojQeIFyBP5dlWRFV6gHcgzC1QaxcGH9e6QhI8XbCQpW6AFYa0W +SXPoyb0jwpmpccbcjsyoA+iwqHV4bM+AWX8xUe+xzls5PN/bGKZOUtH0svHk9UWETAFaInjMCuVn +SRs6F539SNoJTBpJv2XluaMwUyizNGqSHsnU+k8qx/ahF9vd2qIolWVZkFh3jnG4aNIHvmgNhhqT +uRbctQOfIDimNYLapg/vP3QW64it7OUiXgZNEThHVKcW9x4/9z99/Oqr8tBdMRK+JNZ5/IB043ea +fZ37dInnlU5NWWiaB6F7hld6Hox8hxZZMuGJq/qTBiPPO5Pc/rQp7/C6YuFRS7Ucu6MfkcWeNWwT +x38uXIyBdQph2iTwSb5wTKFtxh5c7qIspZm6SyeMWXFO39axfmRGYJYzd03YkynTPgQkCAvoFC0l +uTacKA2xj65R+Ut6iVfayHZ5+kbPSC6sqb+hjkK9iapbcaf1xyDGtMwtZxV9z6dcXKknqCMvuc4e +X9FXZciga7q2H93yICv+QCqCc9NfZwRKDJN81gvxhPAsQweux1jf0et4+sVm77txv794M1NPYxWf +u1T00nZJsesY5Hx6/qVeZmMUVvHxCJlcztksNGtPxm7lJbZR8m3CDavykOYoEfkem2dLy3dkbum/ +sERdCdnWG132hzzbA+00Pfm8H3ibEsYdoNYwI+E1r2MRrnNUtIsnWmxGeO/yiPBfFn18n9PO2GH8 +dG8FK73yIaKHyd2//3kZHnfooNgtmbnqG/HqqAHdTa/kfJuaV5q6pA7P1t0CJnHlYDblGKGgdaT/ +kJWrVD091+6pSi7LM5dC5RXE84sIYkSDgSla/lzs2aVNQIr8aQn4oQbcVyQxPlL7anpzhJv0lm4w +pRojLmkMXz7LYd2nvOUZUOENyB0yjLnplK75qEQLPjPwWA1V4aJzlk0JrlbWSF3Xv9WO/hlI3xyV +saQS/7mOxX+6k9FuXAAIP2qUQ/oEdlD9rWVn8Q8YSt5honlfofYx/TAgIbRxZDdFFSZ37IwgFxEt +2LLFrYr/DQsJA69ikbNu0vYHZBugDqetRThMscBerjkWK8t6tTKsTqd3YMYMiOveMJtfqovHNupD +hweWBLzvBdrXCrgq1hGvYCDmZPtkIMQ6vOcR2gopI5C7+wzo5P4+ScNbAV5I9cpLy8fovScdsL33 +h0u8jtzYj/rat7kcgyjXURd3RWdCi4xQ4b+2JHCv2TVnbdttG8UjAMZEbyliTGIBipsyJL3WwjvC +NpfewIRSA8f7IMSjxfOuLygPQ05y10xrGN/5z3XKVcmnCsb9aboil//COu7eE6JF/8dB7cFRuXLY +JiIrXTYDEPo0MYh0bDCx82cmd0PCdqXScfeWW77MOZfW+usy1J3tGjPZj6tL2POU/wQY46N5bok5 +/6pjcpaswfCqw1rcK67zxwZ8CV3EsdIAO+MDGE7fc9RIWcwlCdWE1IDmD6wgaTvZawWvF3bHXaQz +BwgRQtYXJdDvcQ3y9SWpgspgVuKBoSipUrBxmvIVf8xgspjSjelBOVKmc4Mc62Hd3pHxzr5TpL1R +6rMwOlrfG0QOo+BP/+9EPT0AJeO8zQzOJ/jsby40wGRafZ/42vkLr/ioWC9IVOI9qEUJsH9v9lL/ +RDracfHOueJJar/rqjdMEJfCvnewO00bDkW3h+fwEslh+hZ9bdTARuRte1QLhUSzdrX/XcS9ADob +4xeFA/ax9Kao5pbLZHuqCHz9L/IATGAZRZpUYWOqun8hX7le2driGn3fNoUAAYbrCyFTi6GdfSt1 +U1pt/pMimPJoSpalHH84pYfcVuBpL6c2PDuIU2Ytqbbl+RpYGm0ZZuIDEwxmU5975+6nJihX63qf +15KVaSrjJHwBxOIFsYrgVWAm5vfai7oyArpzNvty9BNezOdB7vu2OslYyPwLDTzH7mfvZ+rDRSow +eIDpTQD46p4i0S4Fo0nLrvsybf95FP/KX+FnuyWB3yA6EYu/e8Pmx5nkPNkOyf0+gc+P1fSoNF5P +gwRJ5XHCaCs/LHxtFkygGrHGu1HBwzTU81kuzWmYgXOddobtxKCKsR7mbrpFaJffbjnWDyNN00// +LOTfEW9ByzggTmckJQBk+pA/4AIVDC52FLMcikz0Qa+Q2jCox9gCl5rFrGNz03JuJguScGUEXJPT +xuS9vVDIR+E0GqmqpfVvpAVXLP8JC70HeUXu8lhPcnD4MTEe25jHHNIuAL4hfPeqqOYtvuVhlpbt +fV8kqMqIH2l3GJMm9JqI3wmXHJ2GJT94AfSZOZDjGZWe5tEuBROU7wEIGKZcthhj+T7GnDk2Ch7f +xu//b5zEmjh8bmXIFz5olEL7Z+d33M8sZg6rDKorHWitoQnYkCKBMSmTORl0/x81TBCpNqNkHNlI +me9o3rSE5eRJydbv6CxnmvV1GzDtWe39BTepw6DFHS+5VGL1bVP0Mo+ePF/0o9p/q2C5Wup8kFfl +f4FPUfmQuLRV5My00dhtwSRIu8EVbmvMiSauRL+ZPL6ZAsdPcJV7OFYVw3zWvaQAxPfmvY8gj/T4 +fl1ec4VMVw+QQV9wTMwdqYM0+wwRmZvgm1M3frorhYTx8H/4y7Qj46RuEChWj8h+Y/TWi+q4Yvfm +2qBkfAC5CLvX5GfD1Oml3kpSdUGQNtFNyrXKzhjKqqo2ixumRsiQ5wdfOE8nhbF5mTWd9dkmARSa +/bs/nhrMeQ/RYHkUGpVK9X43SX0oxy8hbLxymthfOuMOhCR+beGvpQmfFsl+wmoCvSi0g7BhR7Ld +IuIGaMO9f8dIUVIZV218RXkZo3mDlJcxzHr5kLCBwhsjZG9GZr1Hb0vivdFuCTdul23etkBoHWSp +9Vuo4Y5ugNsfRZunbNy6pCZtuLrEhR8h5AhKeBC6bIwZDlGWym8Qj27pFV4x03WFYV10fA8Q92GZ +kHnOav/YPv46ukpXh2x0lbl+gf6p8hvw2OrlG+6BoAG9H1aR9lKs6Y0s9YbIaQahcJ/agPG2c3nn +6zkkDaDtjl8bNcPsOS5/D6U2PEH0qyIoWynukS2MHFYGRx80pNoAYoDhivxGsmxtqsJLofjHeJtT +8+CkgyyDBsBsC8tbdKd2oq/6Pe4u5TC6VL6esIsYh+1tQpTNuDZ5nDTd6AuGo/Zw/cf8BBiPZgxW +O+JwOE9SL/WD8USW8pCayCblX9yVFKWZx3uVFUV7gasdtqQwU39NA74ythHjZvOqGId9xS2rWCf9 +1XfAUf6itOpOBsAxs3AvxOeY+SUT2k1Hxr/+jFHwgLYJS+jo2aplUU9n3zu5rQroEb7QvU45YSrE +Mw7YHSIyACzGregf9cN2M2Rhz9gLB6I1sZyvbg3CcJjzhZddPWuWUwCEO/ucA1JYGIiTES7bsu4m +rnVSmQ7phm30kz//vkblHQTkDBFf+kHNBXjnBiSCuDKb2mz6St5h2jEninyLAc12C5JvH8qa/WDT +9fJis8QPfYsTLOi1+FLPVei4OwKWbL/XHJlGoek0q3EB2yd8kcBwGa7bjZKen/5sj+Z2eqGPxo9N +iohos60/oFvPPyyBIJvUehFGSlsd8nxxlTkrG8GFsDcDSgExBAReXZSasd0Xvo9OIaFAlQs6jAEO +CA5XXWcZn+4EXtpVC8GBAyCXbxJLKILooXTa4IkL5tCvzzyceBxys8/NacmZ/u2xJhZxqvjMIUoz +ODX/WF5Uo4k3sMI77+p7u0gfBXZGDPaEQYrLO5uGQALxEaqaBpdwIS4wDaapXzk2oalnq+qClOJw +KXateuioWLcIyd7EagNSsmi0XhbBYjU1Hpi9C7FAJ76Z8O5PaLrPwAZD/m597T0nAnZDQEEaoz3d +CxsfF5t/A+pxCj32qbjOeoa92CYnGmnq3r4od3IRfU1Q/Hacaf4BhmujB6uBYjujhsOjmfDzHbFo +Y/UNqmMv5ejy/gjkp8DnTEKBEri0QapJP2EHfeSzqVNA9fMtGX3+od1pGdb+1cR3aRi35uNjsFpY +al4VqJt08w+FXWJx4bSPWyCgXz4+vtAykuUL3/dQtvnnbusgyd4JfzD9lI6cazuedZRF/yhcuC+c +P5wbC9OPmDIfC3qjMBT9c2CWkorl3po72BkytKhlbfGV4XuRFE/F56iDXo+m2b/2r6EGVukcarXU +7zpCBo9jrpbaJJiByofrFsazDOoJf6+jWVj+klSJ7o72skKbVkaZ4hNOBLN6Zyet3WIUKp/nimWJ +ZcuL34192GEQiOWtz/hruEW0uL8dqZVzWqv63kHjV3wviuzt9rpbcGENauAN5ZkVjS/LTO576L9H +zlwvwXR/2I0yog5KxHpVDk7NywsJtqF2RTxvqPB3WFFPZtsCHisG+Ns2EThNXjyHpxhj9O5wI869 +naLRrI/hJXfho3VWqlb2fCEfl1JS51GOsRss5yBWG2dGK5ACkl4y1WhP/LFP161NW66QSWbqUJER +OHN31Ttj8nXvAzFYqECC+tu9S/67pLPaDbMZNzgkz3aquZ1IVRTdgXrH8Z1/z63p4FhH5Xf20NTi +Z7SFVkNc0wsM7pKCRKuwZDnfRaazeesm4+svTbOQ8qQZIffjjxLywssQrVTf40wGziHx1wWsfG+W ++T03ZjenxhwhEEx817H9IVAzJkSvlNBLldZ56ALOjNuoyiupNa0sLNyIDuyVkjYADVfjkg7XWn+K +LSPYxtC1x6NFyzALyk58QVR33MF8Oh3d0FMrDjlPW5oiNY/UHfBQ0rgmvBEOlCoOu+Xt1UU9GKVg +N1xxvpKLlbsyz4gnPhjRjNaXddbY8m5VwXjYn2pH+nVSc06+u8qnpnwSom5uY0OBSr+sidKZHJ6Q +6RYz81cRJLrJgHH2IcQjmgzzeGreod1Pc+YyKyAlxZ34X3X1Hp2OmWLJuJ8Leqp85nDVUdk05iX6 +Bay1UaTzf31MeqQ3Cr+MZ0BWU79FwpDxx7lJjd2YdVzVCwjTaBXpEwyuORDpqNxaOjt3rlafO2cm +RU0SMs87Z41LHNieNfgtqZFUNsKgjhbGl+9ZclT2S9Y5x/nCAnxCFipejG7hUoZ8pWEaZIdwTAJx +2sYSa4Ii20i20sfaA4SXeKePfzMEGhfPL0/UG1t4TZjk5MdPPHjOcfRUM4xC5O10SOI8M2tejjYC +XyyadxI3qPXYsR011A78T44CwJHK2tKQpqugES1sRMSdf1rQrV2v+gqRVioFACJznBJAqg6zoAkm +skHJWm24ZL/VgR/jJEoD4KCBcFtHr+tQZCtdLIEkulAAxeX1dmsSQ6f5Mr7tgV/XSV5EZ4nai2ru +w6zBtTkqbsHXmdsuGc6bHCksmlivPZFLiT6IH7x+g+iGK6aO040uxBA4FIun6V62tzD4uI/9Q1A2 +Kem+XtkX3XFxy9UaRgxBSK7h3gr/YK06gL4ysBDJrixbAM+dCJkk38jt4nSPpnUp8PMzIlyVfymf +DCcefOD3j5qqB6IoKd2gOqFFtbhEOq04iUUyqD61yl3Q10DSlKczph6LSEjxIfFy1hMp4ZAaqflZ +zhNkzPvtdFz9TksNxhe/sjTAF0XRfep2bBz/fCkbVZ9/sEzk22Zg35QRzHmCHM9iU1FkJLc5Vxhu +g0+rGpw7rVN3re5Ogv7UaUW8Q9DYk1mVOZydtK2GOb6ztlYX25161S3YcR/F1AfDWoDbfACSS48O +cJWjbuGUyWLAdrcYchdGSMS5qGo4xEFPayrMAdnZjGw6ezO8JLmjGwUb+e5pWtKf5vdGQeFkzttc +2GjbUPg7lGlLreQNxm6w5yR6Zdtp3a/cILUk7i1FqM+DD3Q3XD0kvyT4V5A+bdPa56SwOh2Y8RO9 +6/1MlhvxLd+vJZv59Q5MO9LKET6aHKzqtSnMB4O07VdhOSlgqO6oKk8vKU1JH17Lzy4MlT84Ujbc +qucn7QrRmRiE9CFzT6FtohRTCIFiampJr+RCLAmu3bs7pFIZmE6+LhyEbP2WUS5ihXPYHwAo1Buy +wkuh7U8koAvCuC3hgqJ2x2UMPHGbZTkW9oJUfgVpqLepkgK5+AtsxN2D1lPPTXs3tIfKFoXD6A2A +lIWE97TAHtlcSEQzX7QyW4VvN8NuCEc9mpy6m1LbZGz3Lt3pTdTgBTl+kPIgo7cUHgARgkBJSue3 +24tERILp4mJ2bPji7x27kgmcj9fDmRY5/t233XLG/N50cJQrdTUy5zbMdtCOf+SEKNMK51XEGUJr +31XeIzW/XI5yxN+BVa6LCJ87K/f2iETHrL+XpNQeRbl9Zg+VoIGqL400SpKxkbZSEXKYY0H6ZmJJ +sdPtwuuCPgiETA1ft2zeAdJ1r+K8r3nJZU7d5hQD6iza8ZzmSQ4DFLbXE69LT41RphkljcWKwrsb +nuutlGMY+sTzAX5BTMvMeHEZDPxG2IKQWLsKL4Rxz2EJqJkuKc1lxwHjmB2zByMReMpuRRUwj5fr +zG/duGhW/Z6vySMN+6NKR7AV0PZ2bPepE5sx+lWB68Hf6OkAJqfawtRanxrwM66U4lPb2Y0UAltP +YvQ4TunEPps7KSvAFMDBhU0moEI3j+OgQ9gn8KuKPYPifiWcz3RJg2Ovp3/z3VCxP+TYWkcjM+CJ +9LxN/etyOIWm6V7u0LY4IPP2cfjZMf+SIwqs4rS5LNZV2Os5rIqdsHxxxVVr6HLjzb2rOdrgYGvE +q4LeP1Q4SlMDYYrs14zGiKXT+ddKh3y0UGWYewXOUkBW9dqnnzngGUtCGejnG/Q8JCHpnqWDH1aX +BXk5gb7B20Qkbwe9VBlJYkwVs6cP5Z2JFuffi3vtaI+2qrfVoqHGkdLqoGHnwOJH04rakDJEvNQ2 +dTThpI/Z5S5yacXu1DZwm8UU9k9Fytud8RTfCuHbLYGjqFP8oRpqbdXEzSw9O9d2T8x8LCy3EDIM +Tyr8Nb+Ib2F3fc1w1T065h0avbhc5qRPawlXeSzZ6CvoMmtJDs5qtrAUnCXDjtRiDTbV6gl75f6y +ckVhJI806RdFLEH5IwBbJXn34ljJEvZPA+7xHwF5ux4zbPCQVqO41Ft+1i2+OEWPcwIbDNvseLPf +5Mb1VC2EiHKr8yQ0EbfvxnE6+s5oMDCaQ+D1XPLe7CEDUXMN7NqARCOldfJJO4zIBpQ4UNyx20sa +tc/S7H/qxFVhy9WQOc7tW1Kn+7HJGd/aY7tkN8MpSkXzGJAsWZZvARaBpMYOQqlbhxNLkKTIPO4w +1ZvAxR1vsvqEglLJS4oH3Oa//nnMRnInx69qUopQciC5+JRuwYGa8XvgDro4CavCWFJFq4RQtgpc +iXEVTDnKB1YZogCyKsdp8sGJ5l94d/ROomZesOONDHXKsXfy86vj5HSkrCdwR6shQd0u9xS1bQ3+ +yc1+mZxAb7KLEy9Y4/d+ScKqbthNedKvIEMniJq18R77JD/nLK+hkhthGJ2pksXeCwrqHxMFuPJT +ixls4ScUBoXcCNSpKCrof1xfzamKXZOeGkgMj+zlali3bhfHkk/yWuUt1fEKVYhTACvNZD7JaJiP +e06xYcK0PkjhhZrM3cSXUZTUYctFaQ+wURpXnpnQ6ElEhjwQ6z93Pmy11NCixw98OwfUqSdUOetk +60zUSubqLYOFIfD9wDFpA+WY4WD0ZY0pPi3QvNE/UbfWyY+rZmThti0Z8WMMqudK+s4W7jn5itRZ +dOfPuaenrmWOYk4KiTLjWxOJnWpD4Bt8hBegTYWG3toIBBb7nxKFPqmvbnphfMwm97yDFPDIv0LP +8zU2aJYelgkNQVnNhCXn7oCgNhoPXmslE6qcom/ZD3wBjka6A377PeIt87gmR8haqhqSQQWDDMP+ +Xo2cfylWG3RgVbL27pbSYeYrdT2SOjl2+8I7kao7V8/1d3PZ57wnHBuxs4ThaJRpgnZmm62WO5K3 +YC/bpk+EWfhBwOuasLQomif/LUEFL5VkkKnvMBEmZsH/FH3NqIhsqr6cg+aoTXIWhrripahjVPTX +V9MoFjGrfQblDbBQ37yWio/wiGjE2CsfqjcP8db4yL+V1/gEgsq4rwA+YR9aKfh1nGNHKfsiZJu2 +t7vvAJ5VcZ+KRvELRrgtwawwH6GX/RujxcFOj1aSUd6D9NWpzur9Tb52wtOe5hwvJwEHdJSLs7XJ +8Mm+3EsYSDHjubmiua63WcivTzzVCe+8/Zplpbvm2jUje3vdvkOwIyKeo0Qi1VqJ/6+k5tbOdc7v +9WqgxKIVRob8MrPwLzWhT7yUZhGM/xEgOc1OdEJCEtbnq0xjIZdAWzq5JhcrJYUI3+Azk6Z1T8wC +Nb/A79cUBJIQhqWhJ43vBqpQ1O84mjveSMjgoL1b9LEL65ynYMWfQ0nEWRAQtq6K5wK9ZbACVt+V +pD6JZxAiehzYe6JkoCUHaiqjybfJ0AaaUwSXhCZJARF7ICyLKDJ3qijM4bzBd0sUeeA2c+2N1l75 +UUaIr2k+Ou5QIhuk7TfH8H6i1j0cxlCCXm6fgLwlRVBLtZmRi1zSQbP+20zRq/dy77mM52TUyib1 +RmkKj6rckm//4prZ9ZXn1bR85lNut1CHKxfp39zkePh4GYmli3wZs8kOFcimedaSuIqffkD6jr9o +eDZWQrOU4uLAtMgKn4W7NZ4C4JBirUB2KtNHBPqEZdSg6nXns0dppzWTKqyLKu8M0C3ZVEcNWsgM +EBnz0gg8/36BsL/tun4FEoN8JeNrwVDDY5lp+mx8BO/TDRUKyVXSOV9bU0JSS50+VjHczxXuLFDt +QQ79ntLX+c1nqKV+dZyvvQ/KFyhZuVeqDXGCoCTr5g3k+pJklQaK+QnM/YRFRNQhOhhrZrf9KFLy +kBCM7Fkut8hVIFtzFa1TvlujrRveTRe2iLtEPGWlvxNBoEfK0dLGeI1OhbQ/ieu2gDIimgW80kDo +USdOFgJkH4kz8sFBJkF4/K0bhXHJd/IKoRoeSsqNkOhGzuDJgv7mS+MRjdkXX0yKe840KBAq7rf5 +5EgjV84xglH5LO6V8k/vmC8IbKXYN+bG7ov+Em+0WaNMWZmvpsBYc9yAVfwH7Eqm5/kiayxe07hK +OsTLi8uDYqEkwVFPfruSWvhJnak7DY1tfSbCncGdVx/PU5eQBQ8IiSHX9rRuHN4rNP7kApLAhyJU +aSPlgiA+fkReabPrBQE36WI6hdwrpI0B1Cmi/Jl0TZT5EFqd3p6napZ1HOgAkSN9fTLZ8ldaZ7vX +iKw5MEgYqHhUlepnoqHAaL+RAXNmcoDZYgupCI+cycj/t6A7qeJMOzxsSctT/8zQ8PM1f9/MtfhN +Tk0bApUwhoidnWzrIv8cY2ad7DCGBnn5vhAQeWr/nu6jSe1YQ0pnMCY7JBM7Inf2PHYsLP77aFHj +04xPc1uw3MW9kCF1NBqYEIyc3lJJdxhdnXndruypbMo2K4DKHy0AR6NTptGGsIF7AYUupLSWvjXT +0NgRaqj3xA+q2ZozSiiwywmdhxj4WsnYHuy1A49PXfiN7BX+q5B/aKJcZunkPy/LyoflUR6Q9zqR +z9OT5sJE+TiYahKTMVbiT084i1fAkW684wFgiWYie1q88VuX6O0csEys2oaYhW+8MUBFlauZmJdd +w0Pcq8BNli+d+YWUYkGV1xezk6+UCG3oud1gD1FqjKioMB0RIh9ievr+E474nx/HqI71VEjnhAqJ +kae+IeWoAWBDN2zPTYLHt4Q08M0WxtQ6HPjMWhG6meHGaUp87B1bw/8APBVWeXS3018OU5tCuppw +yAk35D893XKcgMaLZYlmrJerhLP2oKNvCpcgxhcG/18nPC7fO0Y9EPzFWW/7VAhNKhRRr+T9tyRb +hcoThUG1CXW+8Sr0ucM9eaI9ZcSbjgwnDIh+kR/2CLGen/+aBYOEJJ94aAeQgeXIyX1pyS18FrWA +t71X1OYPK79w1kZd2VMt7eLD7p6B4jSjNK6hC1WosKrEU79SgRgZ2vFXry1lOPgIeScAomWbhB84 +3enxebtAi0xnxx0oDx49uh+XFl5xbsPCRJE+7emcRSWyRsZpU7hCS7aGA2a+M3ROPSAwluiu/vE6 +FgnploWV3s/EKB9SrrAxqm6VG3ousVEavzPfUCEUOF6smKmDicQmNRF7yfNr0Xz+2gvQW7Ns4pvw +XPxcRlt1VStB/kJImIRjZeUyZoa4U6UpMFCBULe05fCyuNjUPuqAaXhqykemQgy8Bunbr2lXPGg/ +JnT1f0PYQ3q7HjVVlnkMxyUJkEOTGzCh3jvKHDGp0HEmtzocD265gAm8AMmSiR6xrQGiMk8pXtjH +RKi/VMdWRZlXgFdCHY28CKg9pc47E0AJQ6+b/pZOWnX+UqajXTahAT6RODRERA/WcH4mTSh3mzl7 +t29+fOfm1zh2o86OaRBFivji/9UjRwIohG5vgHfc+5AleFsl5bZl9nyGnS4Uu3kCrygkr90jbQzM +MUeMKtAVbI3uRwtmCi5ZpgbVK7Vu4U22+dhJOFObUj51bv10OVoq3rj+7tXsmAjvRt/scNriddKj +WbYCUEx8BrECtRfGYuDel6hHO+n30NEnH+ayt3NfYzM347K8W1bnVLJBgIKPYCjPJz9XyZXO1Yzf +9X392xMq2p4oLtRn+51qo4OahzsXYdPOWtizEjTCQOKsM8T95oAaZVKymArlHyZG8uqxUwb1MOfD +YUCttluV6ZugyWq1tjYDXiCaRZdyoNcQABBvJpVQdxiMmn5GIPix6qIvKA4pT6gTDi4bx+JR9yif +XpGZ7p1YXDfuTd2uNSe4L2qkpUCHVpte6c+hEPPKdrBaWcikDY9eOb4H2l0dNoeCo+5xjtqj486q +p8hrbr1hsNZZviixF7g84WuZ2hjeM5s6JtxpRdnNd5X33VQNwc0viF5/YuoIgX0e58PDQJpEzeRk +8TZ2UFy/we+wSaUEXDvXmrgEUubJEx+5Ax1+KwAh4PuL40pol1E8zbE108nzUKyc2nlyKY+TUkji +IeoGG/8xRfw9st7JYStedeVF7EGlCxhMSBVpQa0HzQHXXkryCFjm1esszRtDG8HzLmzYQ8yzFL5M +pqoAAtZrUVg6F2mr22gev0DGpvuxdohsyc84ikSmapgKyzHQlMWKm0kVK6XAnFElAvw2U0ZP8c5A +e+XUk2TABTl/FYfH3xdsNN/xDlQ2icINEeVdSc3qwMSGdRzCArb27AoG6/7iFNPsyYOTkqqF0uxY +Zd/6jbdz+m/a1dGUuvwb4UZ7h70HXjhL+I5Cz6JGDzImxCannapLx5vmU9mf2HZkAvp31jMqaqpw +7GzJtDc/mQ6HKYH9HMf3KuFAnWbgn2ZGwMpYbY0ipcgYYzoDvyLx08XMqRbuBmcUEwiuXYlZgdtC +hYZmVhYzKz/DYY3XvyNK2Iw4rEl0zXzVlQ0cnfhFuZ7Z8FZO8LRRQxopyy2shDe1IeJewAtdgkt9 +smFPH62HlA9H18SOVj+9Ju02y4TvJbQBVURGaOHzAGrqMzwQNxPQvHNv0eUTY0dqXW2qCH4DIdWL +F2gqUiqsoxrXaLvJ3FLEXw+F8TAWuYZitbD99/7dNgzAsydC714vEKBSrcdMsyf4x/wAvrR0KxJ5 +lCSWrz2DPsXrFl564VeiGBmhR+1sgrMazKmr4pyDRhRDtXlLU72nyTRjDbC4WznGdWdfzw8qQDmy +1Sq4phacVoyQi0IybOcEBApcEbA8trqXWeSwXTfJhIfCy/YpEw871faGuGiolPpMFGdg5+T7TB9r +ZZ8bmy8N0e2uYGfxam/ud5n1tVFPvmpyYzMC3AHhDclfqz2uZRmwDCbp+FAb5Ua3tlX6p1MW5PrQ +IZQ2GYVcfSjOFgNlYkTS1TUUJgtENYlbG1HZg5e4yT0kHKsrS1lQ8/5GmIqEixfkxW9dwy+qArnc +neO6x3g8qKXS9fQJOtciSoOslIunZK0WlXjgrzN33iInMBsNXkfSfKzbQGrsAjhxBXhHf0Cbl+tc +6iNUYn8X5TUTXiBFZ4G0wsk0GbPTWSuz4lIyR77emIWldW5Fz155hUtiyb+l+1Meh/00qxu2sucM +MASZi9e4WP6YR4Ry0WshiC8WzQJJF1v5u2llbNQ7S1+cjKFBBh//sx5OsJOJUCu91Z9fVlf3Q8PU +J/uOtl/nvrHs+ir8MbV2lDFHCX49IlCIcvOjIEHBNdGxPNym1S40EU/rsjGE5GiZ+59oYDAsboJx ++FfJhUcyMmGnBU4mYRDTgydNwGH3M8oL7dVHCUZ3O7NtsfYpFzweHwfJOZuW9dbcCqIEqYzAcrLQ +3jX6tJppRFo7cUOWTC1k5pciM7Wwgv4n+XvxE1OR8FfAOJMWaM1pVmKIWFvwZt+H9Hze3n7LLfo7 +UVez31sWqiRwmzfz/ZM2sqDj65j4XssbMI253V5lWrNklB56IR4FZVITnjaB80okpoKX4K0Uma5A +vp2yLks5c4r7UFO2WhopRTf9W/x/tg6iN3vNfKjrNhIHEm+ISdC21Cu1q5LlvSM2qcmtxjOpImHp +E/KMjNEspH/gs4/T60rF5Iv0o/0K1K+odKsXUqFtNqS97/YssMiB3UytakdcfX9IXQRZFpttqSDK +NjyL1GIYiuHzFFZPapZAKo/u56uWNk+P+TQN3Bu1nm4SGuSbvSIurvqdos6hh+1Jp2YnEFdK+Rrs +iN2AI0nPnxOq6jEJCbhD/Sv7OHrvoRXvJ4hVurp/cwc8rOIpScX6ZXMClzsE3HALmMSpu3dRADAp +NmxiWpJ54m+sZSP/E4q1zKJ3kKjk6BJ/i/QvHvax60dD38EJ/IUrZe9Md75IlAVybT9CaGRTpqZx +Q1Udw3Lw9whldxIiLKB/a3wrbR24YVh0t3BaryDDsFI+5yzZlS4WvE2oei5UZVxqaSfe/KOEGyDw +c9+QwmtFpIkMGmD/RSxiU0Jr4LcGgVnaQ64cJsrwh+/sMg+bctu5PNAp7x4wkFhAbuN5TKUc8Y9I +uji/hslvlHX/gFNRqtTQR+08LOyIh3+tINtZmp7c/CpfJI+T3hYBQifoUHrnVuKJp6Dm2dZQ3I3Y +BO1fv1Vp1N4UF0hwOFwAKQFjfXDgK9b/04WJCMKANbYQkmbyvhMQ+dbrYTGr+9bv8qBcry+jqvid +Ru6ZJberrKuE6pwJPNWWtMjVMI87aDMPaPe05iuFfxe8AWeGgZ+NeWCzkNrd+ceW5kh1krRhiVUO +ZmCEvit6Oa3lkDAT3kV9g/R9weQ6ID36W/OrmTEh5aNshcQLzye7JPN5djhpuCwM2IIk98tvHAT8 +hbxndMEwrl0jc9bPqycq23Ct4VOWd036vhTvdyI6jaKvitsOxOSWe5Rom2mGIiFXHlRU0TZ/mVIm +CRwFzstV7mNpYDW19/F91yLVYwnrZqGp3svFSops0bFrXVgVmWa0dmlJGcrsr+/CoChABme+uCm9 +d9g+jtz3s4sktvl+7ChMI/FarRh3cRqW3+p7iXJSgHPx8n+oQG3jj27w4mXaJ56vdPGgkpleziSp +kgGgDaymuAWXqZ9TVwEMUlJdp4lBCYuLzGMgzFU3JlshJC6ApjKjhILuAzIMlq67wbxDijX+D6kl +e/qZiOHDvPq8WL0P2N5L2BxYUTY2kjMZcxf4ai3nno478CYgpg1pl7a4vXYB64XLPgEw6zcfltKl +AMSMVZAZkbKDY4K/Ucq5/P1Js9jT/J42HE3THHoq9/dBi7a8fZAn8AiOvPvYM+vY/KSZoBwfwZFQ +lkQUT0T0JyX99wy5VYPNks1x8zDc6RPrJ98NLk8ZoMfQo4EDgVJejW+ayt9q5Gyo82384koGgHJO +k39P6GdcFwNSNIBbG7RbDJQHMZauw4ccDEldZHm+C2IjOmjgmOXpCEkvFucLVN3m8qwJnAlKJhH1 +xGlO7BVXnk2r5FSRqdyvhtP5gaYsU1xSwcjeq250FbxkEHRRa1fPSRVWCvKbLMi3ResX3gWZ8LvQ +eRBxTMEabebLYSMc/Tnrscb4i4lbdnGB2M6Zf0vA5Pbwt5Ha96hxbqAYq9aUFVTecSsh61VPxCjx +UXHXEw/8WsI2dvgTAKAqF1edTcpKRqZHj2dJ6Q9IlzqtF7dtLO9gLOxkDsyzNtLWQ9uy/t/PVk8b +I2CDYXJCEAspG9Ukb2G7sdiW9rKwAAEfSaHNNs1CrjdyU3yZ1s9egXRN0hs4EwQE8HNHnbI5VV5C +qpnCPqwK2wY375XLAksjcCFFzTtWLeGh9QMHIwqpCgAy9HrLALDBriMlaTf2UHit8CuWCZXd0Is/ +yBFNMADgqYzdqeTK8VCtueJ/2q2FepwClyOFti/MpGnerLarkxMoSNOOwHNQhpzngOXLvNMeISfh +b2yLezCspeBp/3rpBYmrZk0bpY+lJpI5e7GXoRap0Kv8RunG6i80QlBfc1HwmJ+ZclbcPfmESXjI +RTeII/u2wJIY3o7SvxGMmopK2Jac7r1URG4KQ/CcCBhwyTWfg5d8ZIHjuFERD7LFhZKVtHM3+2ge +GTIU2qQ1sUttKLkHe0+tdkDyt1+WR/I2TPcPYLDBD6irKn+AC2euWL5n9/3s3QhUpc2ZWdhonMWY +7U4slrkZFsBlpg+/kuLFQwiCgOEqP5JFGOjVojz9UTJKucHTN6kRBBm4vgeoYakubTqbOA6h7fw2 +2PhnCNJhrZp7sznj8jaARG9vhT6CFYmxO93WYXqbMG81E2NH6eeTPgulB6hwiz8nNdeUL4s/2Z2q +0q+7fQjuL4JMO02VuaTrakUCT6R/AZK+qRgx7Y7mT9q7GR1PQJV2meQBDIp0E03+W1kMXZIWeHR1 +nKe1T7I4V/dD6/HNAmmAUqqbob0ER+/OylDIN8zAym3w9MFseO0nMqhUD83CBEOkvMJjhHqQPqHN +X5vj4OQZ/qYRn+4bfh3xwsjmhVCiRYJ2+sab24sh9+d/9j4umXgUoMaiZbykWhSCn78jC86kvOw3 +i4L4ii1hTx/VDLL569af6Vt4HOrRPyPaRsOkSTSUihBFnX09cSWtPDk46DCGVRFfa21MObw69JaB +UHFtQLkO6rmqBKgQzyisnFkbhGrJrOy5Na6ujsCeVquWRS9QmqzdMG1dmgCwkiWtY+hA8Ix5rydF +xqAXLZcR1YP3C/QGlSqoyKUEqXhfreobQxhAiHLb3f4OqlKSZ2fXAR0scoT2tVqVSQH/9f/Lntrr +YPoUnXnHL0hD2gQyKOAh6ifOcjBEea/YJfCY/evDDwbzRPE5t/Jdnj+kyuJ1WAg9rSsUKtbIXSN/ +afjqW5R1L5zOwvjxV6XPBT7KiD/p01Z1qrfL+JhGlnLllm/sJGp2bQj6PG5O7I6F94mLI035aMiV +UqN/KUk+Fy4lf1+ZTZBwQFCQQ1c2ySWkb/JtcR4Koqu23rSdKdZ3I1jvEXI5/Hr6UwebxvN1A68j +6u2C9cmBcaf+gYTnR7OJJXvgVO/z47QsLVYkjIbuXGymYHEvsnvHXVe6AuF1FaFhRPZDue0BeM69 +zq2sPM1PUih8kKQmEwZpxk3M74+b4mlByHZ0HJuRAWkyPdywBxuZDbzco5fcRlG97NFZ6BXhOsPx +Q03DzqOy1XNx0Y0xf9YQHNNu9k7PyLEfkr+4oNvNcGybYyCpMMpZ6BdXcrxSPp2eAGZaiZJn09aY +0enRJ/b1V80zegFlb4M6em2fZRBw2NKXNLDXAiza0xNmBiVC9hnLynG70yNEc1aTUQi/PxUEyyK5 +u82ijdPOOjPgomA4/nfDKZUQlxzP9KIbyGxsR/2wB0uaOR85DHBrbITZWW0wUSBVrL9JybU+Xtpl +TrPlQlakr2fKRRUBwp5loywuwQf2O5yEBXJbHtTc7VEyIwZynkzPKdWrOdY+CCcnE3cTkNtmQLii +9EqwYzI+jaofzsIixJlihZ7h0UOy/iAkG2otTO+psww90omvpv51xJPgjmNU/quW5jzA5XoiRDuj +6bQEhLAuxQZJwQopMdEIdHeo4rrA+8UNkXJYmOwwr/xCnEVRILGTpO2l02HdNH5aanTXntACNSn8 +brGv2tJDAuMw3vG+dH0OoHx5xeG7ji/ICgouUP7PdLZ5qjUJ2IRG7V5U8ksXLAT2Q6/EXbdNEhBD ++znp7TuhKJ2JPDZzyh+nSa8NZ0MfLyl+q774znbAbUtxEo5RQKl89g9VbCFn5y+NRCkRlUp057Z5 +zCXUKSFQ5w5sJ9kpQ0Bw6Etc40A+1VlXDc+kslTZ6/MzvQ74IICpwsf4Su/wYp8bXG2BsOyzimYr +Jkp/KzaAg0ifLseDZ77WKdX+vnz0eJM1pDKidRAzkz2Znso3e2mepyJmJoeb6eLFG8zthr6sEYN1 +CsHLGYZUnK2E3OqVPWyZpB/afNxEFyJJM7XvQjbLhw0Xfja4NMHpMx8eVbEsfztr4h18mNp8COg3 +j2wvIUV9il0AKRdEwkdDN4MmXH9tW+Exd9HKR3xct8FjznZTXC7m5+5oKyXN96RiNiHK+FgsAMdi +Rb0qSKzLXFxvxwlYwpsuc/WV/dJtOHeZ/u75xoTSu4V3P9t5IoFYjKrKHFO1SxsF6M0rt941+Kf1 +ITOPMWeGr5h0BooSsJNq37NwZ8Ra+XtNcxNpqnQ/7HOnmlTFk/eh3lB/OLPLegahcpRPN/2Q+jaZ +nC1YPhRwcwaDH0NPyzeWFXwZAxo+6/Wt5HWQmSCNNACwXZrK4Fw0He+t+cCrZf6q9llHp6ij95UD +ih/A+gFb2e6kRENJzdJQi8mDyIzYszGOY3rUeJDSPIy9TNBXk1Lbzr5grROUDPqAY55+S1hkduSK +n6/+zyNS3YEewVsrD4vAzQVJNfxYlz+dGVUjnSRZHTuw0KzMfGCKiUEgz8DcpcJjxBIdwjvipo5/ +m4nP8tReoPHWGB8W0/eK2x8o7+KS4zcnsMv+6tOArP76+53GlBBS2Fmy4wz8XizIMoAyYHAJluV9 +9VJ85QBDeHhmUPysqlc78UJmPpV6lxXtJzqM1732+GY7za6v3i1+1Xd11OA4V3uNoDNujWeOK8wM +hIrjxLqLGTAotAbFcdHM5BAs3shZFaZwmJqpiYBUB654+NpxF3r3JJhJ2f+G1aaTpqEYgzSHkgnQ +MCS89AauvmEXZTRd/JvRDQ6yC6qH4crMv4cbFE+k+1Gz2e9cTLja69/vTdRsTgDxtRfHt0q4ip46 +LeejK8mkjtllh134yeYgOpdIe2Hgb+CGl9X9KOK1gD1l039o6O47bHz2ml/BfOVL0y0+6/98n9CW +8Xh2e6G1TAogszWY0ulcpi4ZXcIG4QkEtczGK+Mqdp4lBMtQzqml1MNbwnqr6W3u+32OklqNzCbl +/y6Vs39ndyQRtmvKr49gL6Tp/C2XZZLlVEXMfL3Kn+N85HLy1+KS2IVkEbuY1E+DhToaSVWc37Kg +P+YuSqjdOSsPaZ/qrmufzn/KlwdYpq/KNkd3W5xbKljt7BdAiHAu7hW1tzT1bCtkZt+bufNGWwNJ +IkqfAjk4lnSA7vU+n4IU2rXQRUqL1jR5GGKFOiLRPanwhRgntCUtWy6JYu/CQSeMfM9VMPCGRtYS +emcJB2v5LUvMRLXCY2oXJut2pRhMjxoMMWJkGPGikz4N6WKYTGggUbeQMXh9nnwYCRowXkFplaRM +Jek0SYJaYTDPO3O+Nvs8o8J5Bka39MBeue2BqUF4NIJ7jnyvw0cL4pKKLGEWpV5zo8S0UWYO1PY5 +ARci6msWsDhlz7XEI43CkZEeIxeEgxUe1+lW+kFGhBRlIaMaDQhYOsdxTgOm4YjjZUrgyQNygE3M +/kcRN0jHntrjJiNHpDFjX7bI/NKMINnNbXt20MHdIjxtu9gMgzDRdg5PmoVparkm2EOK0Alo9Okw +jGolPbWZFuo0eHp0lyIjVLmQ7XcFaCtw1CrFolbuBh1VXanuqd0PVKdTZXRc9qhlTlFVP+7BdS2M +NYAUxflWjua5AA0Fr2MtcZ3H67Waw5qw0iWau+czqkd2qDmqwB6xUDzbOS3cTPJLlC5TTeipOXiH +4QAAzNuomBPw7csWuDmgrMd4F1SLClqfGraoryW5PdToa+e1n1WY2mPk6ItjIrE3uq22+4f7VAar +8hphvwvY0xbNYZwmXTVNlmUoje05SpIwbNgHXhHyXnM8p+2EmLWrzL55TpsaaDPENYBLOYdpBIt5 +8f2ZKts6PBg4SyxT7G6ZMw/CyxR9Uy61xVfxiU9OCfKVkkpG6rvFAL3AWfRcTJDnjWSJC56pU4Gb +J49l8HFgJF+BqLXAEqpFZNU+LbSKdmI9l1CHMmsErsmXqTp9bwtJbyXtcyQm75wSr/IcQiQdITe2 +nuxXVXBOXUSiMFV27woDhimLbBwVpjpI6N7U+RNrsT7SXiHGt5oYxIMPaskvkfAoYepIcZslXT/2 +QIrZLC1ZWM51nnHVd3NP9Wx45A7iPmZCnAE0NVek/Ucptmkb3z3GhsfXvy72+Eetb0RI/aFEhjKk +cPmmpDqvj+s+J1Ub/QMk09fndWCc2AdfzPlpEc8mer+rCGc6ZRoHmSnNhG8Si+T2bUeq1qAHXrJs +g36DOSBa+2QeZmVfXB+HWhV4tEIFWQMP4HWGH2e68/6ld6qMEhaB8U9+xYjzprwv/Ak2LSSkvIgn +WxlS4KKZUt6kxE7dIQE7pXxD1BB71ZD6LuueBa7nioF3XreKw9GtDnaD0H8Iur7gKLxQ3Fg4oqLY +LOp+GWGxoWXQKl1oQ4mf2meibuYXj+xgFIhCMWeIWbHCFFIcDxrIFsR6ANAqElzejE0dGR+n/UXW +TgS3kGcVutCJdJi8zupTqmzF02LRi1FQKE3yxR26uKAkLCoONRuSbHIM40qjuhdQGqXP5iKWVwcy +2WB1HfFcquYUsnNtOawvAgshrwe2/FCj+lcMBCYhI3/74PO97DjODEuXoTHs4WwLJOqYvsme8BG6 +ZRyo4cztEPVT8o0Da81USrBrZJrBkqIBEcnxRHDIMhrj6w2cMvg5CPTJpL14S0vHd7xZb+fQFgrl +Sr8DkgO6K0t+aUjnQlbwaEB2cXLdejvYH7gmlXejkwrm5i5HdAthNC5hOpb10UxlJCvT/gxbxS4A +6e36/c6LzVd/j1u1SFQSxXPezlfz46MACMPPuUOW2eg52jUgTB1xWLwdK1jEwqJ4HVZFR3OtDh7w +fjentYEAPs/nykps1qy/ZeBRrWhZSa8wJWliD+CEWu8KZHwK8EINVd86f8p9lU8nsA/1JtHT5CrH +nXZ2aPWzmxpE8FJGuRFAe5G3TOMZ2TE+6dx3E/Nt70WCaJf8y+Kv4YKyFlnvdpq0rAKt4Tp8c5i1 +I+WzS0+8cea/8pK+7WO2Xj+QQdB5cEWG70lsdrl37lugPLwXo79+JJHmuXT5dPOsoPiP05pVT7jm +zSQShgJlrajBZ0nIYNjmTS5iSZNWnIt3Q4vOKksuFYDWxZMndi/2P9qWy7c1LVdLfczOJ5gJTtUS +9H+b4XK9sw6cHptbx+cHf0Ho9kUZWoFHX/jCM0gnEGXUo/NbUcz1iqmJ0eiTQrsTR6MLhCOx8FHp +zuy10jjBl0WqwnQrVS/NBGvI+s9qNB9y4hiaaEB+eoy3DuR1PkU3mVR5bRmI8da5lfHLGF0Uwb0Q +r/KeSUpNEibMhU3UHEQ5H2taSy7Nw2S8y0aPL5vHbtZISwlcK7+6CX8uYOmffq+E6osyuQWD5IoO +l7Qo6SQEKl4OURxKGC75LXtkeygIZtRGPicm1BnfdZ3AbcT5p0YwRFG16WUfkjYzmNoxqnnvaz61 +lumAj7v5NApA7q7KcAJmk1VMmJIGLoHDDc+TQAGPyvRAP/6JU3LJOLK/V+9NtX7Z4EClqBGGN9/W +3DyDwFFmZx6EkBTLcKKAfjRqrQYiTaKxbE2tP1BpbRUnN8A5FFf0JWQVVG+lNuOHtWljMdjCcwgb +IxHey1xXGaIW9HlnXYIAHMkGcCSf4F5cRnR1/eji2n6sRcIPpmM1WbSUnwXfRMHVHFtyQJYbrL9T +9QaBn/y0cgXA2xGcieoQXTTorfj9weZ426ZV37hojmqhSllbiKIVvob3JE1hhyP73tXgDlNsajKh +AWtT+Lq1YAAovVpQh+VVVjDp7fdH3DMGXULRUTXpHFe+W9Fhdx+SMeL2BXag+wluW2StAP/WYRrl +QZjcovcch8E9NwtFKSYLpiWoiW/HANwz5BZFh+oh9BiC7hggGuBfKpQ4T14brP7x8g9dnLr3C2vJ +uSs3ds5Mii1nPnR5cGSB4Q8fQuP2L6I/Z2aTMHMf9mCAA/zeJCYzRjdIVnjcY3AL+EeEB6aZNfFw +xVYO3HOuhtvLjWVBFmzJMzQRkIA1KGGJPd5Kav2zxe9ytI+04PKrqyFi3JkeWf/VcCnNCyqP4CzS +MmJfVXFajqUCkFKbIlIj9orr1V4fJEuQZBfITz1bJe7cpElw5n06sZKLNrG+Sg4XlvzdPCahCdeH +jCUCPkbC3+3L2Vzjhq2+W2X6stUZ+mQurpn8HMKeq19aSubzBzTjpOyNiEoxZNciFJY8GLv/g6rW +T4jIGlHMzKFw/k2Bp14vi/XDy1odOACmFz0m8spSc6e1aM6Mddy77zPhti1fRre1FomcfCqb/P8h +J/7hSjDpWvE5mPeUHngU2dzvHPjnP1HJ6yzq3G0gby1km2aqWS18028I10hTTAiL5+EYLg21aNKA +zIJXFG0TmyGDruTJ9tv69Pwr0IUiR/G/RWxskd/WhcmI3gOc6T+HEptr4AzHCCTQ2jwaLYm6mKIW +Na6ppCp7cUDrguh+2lXUCaOeDdd2M+rItGEQiqlnJRXrCQa7yjoc6aaypTvGX5QgkvK1mcSi/piN +6Qf8A+KCEBzqLLfECNc5hkM9YlOIvbDqremIc2o9z+5Ji7oRYNuFAfLt3ijOVINXTvfgIrsOQk03 +0AfJCsqT0uiQpSK7jH+H8m1hnR04qPgwiv0woGNI6EB/Fbo9eCy1cHbcKhCyYLOPzUPMrj+zoRki +hQbZwqKvRVZtdUXjbxt2ThtejGsmUOrOSOw4rxZ75VneZcJ+WipPnNt0fFBzQ96LBvQ0+zcHPxvC +nFnDp7x5J00sIn7CNSdQduFCqVWCG37qk1orPg8DpT442ecMV8LMm/zK8gObliwcGslGFtXYTrx4 +aN77+JubXRzmeyjHu5pzo9XSWoY1l9UN0l+HRquxve5gz6AryeUkrZcNx+Jhi1WMZUo999q4mjL7 +CNlNygb+3ZB4CEQkcReaEZ1CiNj7Ro3GSKIi7+c8B8zrgGNGKvv0csyfEsIo6jTu6Ai9QGhKgsRP +RZd5sWMV/lKfoXKQMvcjdvN6wYUxCrp5UKrlhkEDOF6b6JaPh3fB4JyGp4p/XoVfTkOQ7MAN+6xe +GMDagHplu0QaMFM3qpqT3eYYkT6bPqHRQ+0F8amZFl5nO4/ciHpkFlznzoT889zNapQbVp0Vl8bd +RqLTDPcqwswICqAeiD3bXmPwijDGXp+g5BFcvgkji6cqI86nOO6v53/WyNkvX/g2VFsg5dtZsQ6i +2owCCPIhw87qSA7GcHVjRIbWVEw2M6B39kwd0TtWioJPzV2OVJebpgiIU+gTzAaa/oRcbEXPqQmo +1RFcxiSHmR+1oDlqYI6RCjvpu2Zo8aRLtjfEgFkQi7Qsush8jDj9TTZfl99gDl9mjkvvBL7lxe1h +I3vuKdNBat+pjtigsrYnLY0t27NpO2GV4TMCeSb1Qi+M5BVx9ASlnrx5mObU4vb5897KxWqZo7El +8UiVHJhl1wRhWdCQcepDiKufYy82FcvaqAwYAU1DNvbYxzJsyB4QuYaz31u5kgW2DiPmWruDcMP9 +vnma58BE/5s9CH7FVIOVLqpv5+4faYFPx61w7zLsAlkMsKX16ICpyQNT0dZY9+4kzAw+I9BQVjdT +Zf6rvZu3z931GbJPKJKbBCE46swnxlxzum5FLHknMOMXDdF+Iv58htHKvsfTncGS0WAOERzj4FGF +Gbgoc2Bsz3ELWst/Cb7oCy3E0wUKDQobx9v9Uc0ZMmkuuovHkg6PTBnVC0pFHwEqyCeSRuv98HlG +rVFaazdu335YR5RbmrkDqZ4Z4xD5MmK95Ek60C9lK1ah9FKg6R/PuQe7mglfJ9KuppIEhs8Qu+v4 +BAavpzB0L+HYZNnaW1+lX9tRTFJJsifsMy9FTQh0oz9qmeT6BRAg/gg/y5tv19vdaHyE+5wf5zDZ +fVtcaDRTxMyhQR3gEtMBRRdeibAJg4hMt0E+x1bg8RDFO1d4m7WV4YtqXnvBFk9g57+V88L0Qxdi +vWws3vUQL5qV0XDjalsKEW4OWihcK2nH2gMOauhaX2OgH9JM6OHUcKCYDYcI05Mgs++SsGdcT16S +hJQy3QUWok9v48M6jWnbaDnvZfpARz1C1oSXvKwYaR/Mh6E9r85rNCrNKeIAd4GuobzC4IdnUmbz +/lZP7C3IBXAvgHHLqzVT2rsCEFXq2FspRonbJh8ZvwWQcDFsjxnKGcVRfpS7AonpIrLPUGrWm26V +sVW+v14JjbB/LEWAyYiZsOcWKAAsQVvLMRx4jeOYjO2r9DisPvNNshS6v8bC00Spwlt6Q76Zuofe +UQLTZ3HGT1yoydYR1ecK0gJEi4wRFuzWULDLx7jM+1qnQGlR5JUAnwfnW964dz2TpRdP+90WTaOH +Cu/6mKbsdDvkKANvtI0STOsuCEx/RQlBQi42Au8CXPfIViws9JMfQiR2zDaWvilr5yp0w/zM6Cy1 +szmVNFzq66197tx+Zzi5UgiNvuL3rlxiPm+CAh0/ESOqS1GU7ogxPd3CrjcZs+Rc1acnyxYVXswW +Hq6m3jMlzrl/N6usRd3fwbAxQA7clNmMyhEQNs9xpgk3Faxn6Qna1r21lDfWmm5i9IKzAiJ6EwGY +jTRPDaY1tfGZOiC+HjlvXQkTCZB+Mgqn1mm4kOWLXxETvsUyG0NolrvjGMtNS4MdfO3pjXbBq9v2 +s4a9JxDPJaBFHjNS+JVB9mJJq29zPhdZN4ynRqvwGD4BOKfmQkxQ7k9mY689QSErl7/4h0YLimu0 +hvBH4+7TVlVq32Ne3zLV1wV+w5IVd3DyDcI4qzMuU1qEPOQbGVfbBPpqc1fk/jQTq64cYTv0tBG5 +wsg6m7RLxIa2yMy+K6j7rkwJHwnJ81YiTePpIx0N2OejZCW10Uqj4nkI/VFs+9wynusRkVnA731T +iRPrB1/vQFTwJfXtk9IQKHHHzC85OghWp/eC00TuzAE5TWs74YjG71Pykfm+d9jChFqhAbZvNzy1 +YZycLR31fc6mC18KR+cdn7JI8tk1472Id/cUE+G0zUcXDjfkem/9mhaptrCqyce48Abo57r1bX86 +WypiNe6tQxmykSfcOqocLyFHAh0xoZyrNaq5rqYtMll1M2Z9QeUam7M85qApv6cRd9G4NcHL/grd +VEDXVw7ouEzR1hAUtFkw16E2qvIbBlbenmDunvnfOfRYvDNbG+8CxJhMowzZgqcIY4oHGoEdW5PB +XfcrVZTGQ1//q9hbLy8BOlU5q58HcsDAO+y9/SlzZOpL6YxgdZXvPMHBu44qvUZYFQqM6Bu+jR31 +w25jUlpYH3rxmEjGmdNhVs8j5qkzmvaRrSrzkBCQIji2yEE45JXTRePasAjVjdSU4mf1pQiA69q3 +r5ULJzAETCSd8/Mz7QFUJP6x+aqAZ/8wG+c74Do9tG5jssKAIasDGtoj5los4+t3x3fzO2rTg9ow +68mV1FehIHLEjeDx9UZBiidNVkDlR/SDeUp/CQF7BUqQFKAYvwK4MqXnsgZD+LXBHFLa1pwhINwd +s6Rl0PknWJyuHb6FpHHb12gIlNmvOzbIvjC7vkYIG3PzdBGSC1w4KKtfso/TFKR8y3KuJN2cmHA0 +0yjnDgAKFTMmNm2+m7Ed5UWnpRSrY4k3hsEedKxgp8c8Gq76lbBhGRiXFUF0ggROBZ9iqLrhmTqK +18p2VRxM3TCZ0co6TDWxqLHY2gdQZt3XW0z/pP9bhA3uhvrTiUhplWkYKnQt0Vu7K4ewiwDlrC/M +LGL2UmvYbHljNPdQcQmrukBJapKMrSdds/5iUhN3bUQNvCfY2P5VCtDEOPRBRKYk9QPYYP88rQ8t +7f+OimkILUbDakC5IuMZ/94HsiCzmTE3R0We7R85g2Fk66Nh5dWMpIdBWygEQ1fv1jaTIQShrfJX +HlD0cSCUTc/vLg+s/rUm/ewqff3yi7n6XIMQR5yjEyFjTY5pPg7+KPdPHcf4NxJYMndeI64jvizK ++lbjfD+UgpP+RM+re4KmQZdrQLClXNLsIdXIqpkNHAYVM2NdodI1DY2ef/hKUpKWqZapblv8GtKF +JtWkbTto086UXY67oz3Cid3xmjcfUkH7XicuEeY+tIcHIZcX3/anzZWjXxuitqwjvx3m/u8nS58P +DqzvW1AvK7aWSTkpJKHwI+aNFcGXN6k8pGQSExLdanahrasiKtUABKXiSBn+rWGyIdnSK/wIB8zY +Y+Ba83nnLQ7xJDWEhB88+n5vNZVIUuiJskFn07IFsWdVHCcFWLKp7tQ2UyPTs9d3uAhQnKSNF6mE +wAQ9OaifYkLhugePqcTTwQrH/aPA+sCvbcA+iwLN32LPHF+uSMc0owi8ue/5FYs6yZHOG/Z+10wi +bNZX1OHe5zz02Udi2I2E3jrw6VyjMVEjCXrgvtDT123yxy3CWQ9VCFT90b0LqYX5EM2bUfyH4P51 ++XVqpqIQbGHM5FbFq81qjfyuGxU7VbNmGnWZ4GmxgRBWlOtYhN4zt0wIm6elJglyZY4nd8vl8psd +f/ToilEKKj84hvKuNX41udLTnHI+Pvg0mwyeXpaYoZOSaA8VrSkFr4RmIdaajW/LE9rLFZEgMLsX +0yhBWF3w2GTZh0LuytAep+3X4ZBD/M6FqmHLea3Pliuq0U84/HiTEefRrayjGWqg63xKl7n2FkXm +iiLI1Li2hnzLzTBB7KpT+P9+IlM88Fp3A/nJKpqeCTqCB2zpDt1yiwJGOX3ZGVrIEGmBnxJCSaXU +AAzBnt1Sty3xGa2+BZYzcdLF2j4o1PEtDL638ZcWPEeikEoiEgFCIdt+pnkeU1mMnnAAQe7Np1uZ +3l1CbBxZ8zvb9qEaxf85opLW9qUErfYPu6TehuniU8afQshIBZ+cuLwZzbpfeydHtCw7laZR9cC9 +KQtATfFDTnXgt/rBWitDnZVygAixS+cp9T/29PksBZOlu6IKlHHzM5sBLC0O49xeGTyDju1RaUJs +wswDQf3UZZWfeNS6nLN2tbL5dcbQNy4STfbwI5SUzvk/b5mZf2AEDIR5BuxZ91/pdlh1QIR9zoF+ +WgF4HgieGclDCKRGdK3rU1MZrVadwZyfNLEVhZEFVfVmn1UPP1w+nwO9zmcKB2Efx+Sf3wLEcpep +g476hpJ5Xl67NsalxkHKWomg1zFPKEwKtszSJFABzEZ7VFWCHyZzoTH+iM+q2poPfJBoUvD4oc/p +3akCWIqRCrYYwhBYkhdWmRoze7x4Fnw7jHR/7EN0ZNqpN5f51mm6hD5kAnGinPKUgzbxrw++HZa4 +UTU0nA50oi5IdJJxad9LXVUYA4h5FvY6CDc+55KEbIM/3T4hhNc7fOtpieCYkVQ+U+bZOKIr00bB +HGUVni0COnVEUEhDwjWtGqwHufKQtz9lizfymvfLmnNDyzhTxW3G+RATjcOzOxNb2QDtTOIYTuZH +MwaE1bV1QBucToxAtNheB5crNJhlWZqY5SqSZgoS05grZhs6vtN/6XwGFT4Z7F5pzp4nSRiKjeKD +XChR3Hy5589K9KiwRLu0xeztoq4FwmMCvUCNqm+kS9hN7+4Yo6XfDHozwHkd7m+kwdcmP9q9ifln +Mu8/Wi/MQ6F7OTOoHIdLSSydEUJqzpr2MscfUi/Mx9u3FW7IfZE5LzrLJTB3dUO6RgBltxoO71FM +WJ5EBXtdAzgr3HyeLt1LgB+2iQDWrQhmvyParD1gHYvHTh3f7b+dzuolZgvLv1dliY8RHGZptaM+ +VN9C44Kk2Vz2SaD2/iumo5KiWzAPbORlIGPUIcw5Nv9N2Q7ZqHvWxJ8yLAw5pbSQprGKy8/hv2Lc +wYIcQDcb3k+w73zR0Zg82rDRRgBR9FpUhbPZxXjJaLVslJp9JxX7P0IR9r+XoKTpvo4o2yvmqmF4 +pudAVCYNqX+WRApR6Y45UM4qsAtX9fI/wFH6SmiEM+L+7yHwhEUgGZDu3/Up7O5rqTXLd8Co+OjU +wy3F2Jg8+LgMvIntb/5QGEkbDW3we9Iag8IvDR4HOdOpYzrGY9b3UvCrJlJGUJfkLxxRY5RIHUdM +ef16jauTAZNGJWuXH+oShJ8vdGp7H6qKlt8gdM6OAF+rFDdFdbscRroDdFM3csRV8RA4J/kZ0ILz +omRWq3ySMihKBAux7fge5aFZIP07lFgNIZHm34gsPSDPrRWYcgj5NUgFrMiF545mijI5wbocOyzG +F9Jtc2t9oaf2ocIayRk4APs3KcFpvxU5fycjKJVCuk7Zp/je4mYZ3gazC2ZPFNiCY1TMjokqF+i2 +JnIToX00g8DKM61oIE+x4z/RJOi3sP81NIYklLXyAx4pA8o8LjMcFBr9ivFD/580Bys4/6irczde +ew408bOjdiNkigoiEW+94eEoKDuEW++4+INwF6Rniv/LhuBqkAGA3vNGEvgsf6VJvOQum5hr0trB +Xa/2G2aBQpuKEPMfdp/iGUuAK+XLSYbv0zK4pwuTJA3sMnQ0j+Gt0jEwTSPfxaF5TdQl3doshxLv +vp0Tl3O9cYPT6T5D4VBD49PzEn0jPDbpwv2aq8lKnRNKpjtbOsgKdmo3vmY7/wY69V1KL4o7R3J7 +Yr5NqJiQkuRAl2YAhsEAHA3q5vM6Aa9y8RrFVEN3keQTFkj5J4sJzgo/na9b2VCoYbMUd2KdXfX4 +4KtqMCE66Sspu/Ts5J0Gpk3GsrYJERN3OAY22XvFyyy9ZyLPzL66p2Biaua1QNoZZ3QLMs4Xqmou +1vyqbXU6k0b9dPrutG4sF2J8ZFUHcKBE6Xhlg/AA1giLgSi1au0gbcCLzg+SgGgAM38JL/QI6lck +Gbv2tqsNKR1rmsBo0OED/Gf2DiLhtnWTfgc+CsqXSTR197PeG22w16FPNqc6aeNB/GjUBNxxVip3 +u9Ik9WL6fWzOKZfWQ86wzOZewz5PGl8ogUAcmvSeu0QO76H2ET1YCBUsD26DKeri3M/zPy/KBJ7Z +etW1HKJFS+SU4zi+BAW4754SDoohOh2llqw/SC5VL3Tqv2THbR4caMtBvjbtnkbVFfD5eS22dR6B +RI5BaPvi2yoI952ZoemI17z8XWdpsoE9zrKw++vXUjNL5aA0Ab3P9g2slkTtAonF/5mPI9OOeKif +MxaJ0GDw0EAMWoi26XkPZKgoEh1WIqWrtNjU5Xkv6DrcXy0peDhp3Pe5WS4OJ7jvkciOqoy/8K09 +Gbnl2215zkP0l8gH6Fi78Mr/MwZbdSlT8+iKmzcfUOwlVpxTKEGgjoW87pJdPatLc/HkNrYQAdyV +aYCrlMgUmZEuh56Hd0Od2X+nptxoE+SYByLvKLWtKjzK/0uvMUTRR7hUCSDQ8JhMiCSTNA438Jjb +pHkqHM0gW1xtt0qvRgCjPgc4O6jJ/KdxGojKkb6oGQ2LTAdCXPoLO2AwwQ4+l83u4gnn8bNFrrSJ +ivjKxKys0CnUGO0Y4bB3bWQOHTiznaaboZ9fd1sDIGaSR2wBwtyv0loQbCLmiyA2fGiIurX7tpYN +45v8BJ/18KxpGYYoJarVoHGfUDabuKdBcMX8nW7El2RNj4R1of5QzebwO56s78/p6BUmQHn1oK/R +hkFoxl5dFxILNalu6OusxUoQUM3kAqIp9duhr3L+3qaf6LD4fWQJSASfUZpwVhRVNI2CwlJp522J +hoytqO4oNkucqHZm8q+yG3hDxGGNEEX3K9fcoMVkE6gousX32IfpoxO3bFdQk8jThnIOmbUVl592 +xKJOhkLKeT6Ar5b8pzBrEyRji8i880tolgdtqbP8YOcehq3wMRoWyaKcPE8nenhn05O8pgqIDepG +hXYcXOPTANlzQ/RGx5Kv5xC5mO32nHSL8/G/e8SayZPNZAN5mjIOZsE0ybQL2dbobtr/Y8GTAQ57 +0Sm0z7ePJCQjbX8cVHju0ZBgyCWsGZmkiLgxfurg/p8kFv3Hmfo6972cp7cKPTQyBCiU1o1b3k/X +GVknrqDMxwFhH0OtGQ56UuDx22Zwk4qRxvgzCvu/LrQ9j9ZtIaQ4siny9Jr1+Nle21NGkUnDP84h +pRtI283JGZ9gG1j4HXcwDakZhcSa3/zEv3lPFrfivpSq/aNGah+t6AkDaLPtcTWAd8Eh5xTAkGex +RVAvUmd/AebZECP58y+FD2c/SDl1Hf1bgLTo0KDnYJcARB1VABxLf26YIlV+y29nEfinqkmyDfi8 +qqCbv+uzKJ4ghGGpclnEgYKI9daamG8I0UQjUNfptTyvYXw0EovVQViOXPFygHNh1mK3PAapfoFn +IVc9XJ5tRVzQVRxC3YCB6vrXAn0BPHMpmxa1ke/pWjZglGX13R7kXioknnFy14wcotRX9qbhUluT +MFmfentBu9WuYDWP10nustAokdOFhyI9jeBHJdU2S53I9frr+3LMIu7xUnHQp2EiTN1cGm60g1Sj ++VyEkBzn6yv541HlC+uiLwrH3vrKaahd4cvoxz4s1AbHosEDTWTsdJRhJ67PRBweD2YQlCiWIANZ +GCXkd+rsEhaOSBnbm6jR9wAUcQABRdxWX8r/OQECEsoa+EE6VAxmDvFplFPEsGOvB5ZMtf4yFLyM +ByUEGL/u3B8+oKoYaySzcKTXK4W6/P/GFHRfFl6MF9bzFQ1AF6b4FnfSIrsqPbQUUG1ZwwdI0zF7 +KWHXV0AW+iZ5LPr/hxKhoe2vMX7dmX77Tcxnsy4/W1xo7HYunN9hCK8LRzU/zsKmZC3Xn1PJ5ziE +C7BRYCDS/a4uoO7wTeTqnDW9mjQk6KFDumDhVYob32eBxNcczhs+RyA2fbP68aRaJtaZJtc1LwSO +j9/77fdAVLupKFG0g6gadVw52IfKZ2FsRlYFH7ynZFMcpaxrN4Eg5gWNHo/P6BZiDr9E+BBPFJy4 +/9dhtojs7bx7Fhbd46+ePEDSDhayCO1iQAB/DcEz3sVYpDLFZFiYRBVIzlrVupF/mDDVZvzUVqwm +0AH6R3CqWXLWlDUPxkoU/jqlpzx0D5rK1pEra7XEppXbt3ij22FKPfUU9qYpmjSE91SEAqiXZzrz +k4V/KSmWLuh3O/5if5DanYThaDloWz8yomDUTcLhceiO4/T88+Qh75F4B0eX8W0pq3dNNEfWnj2q +/r9VUlSUPSeUQDL44pSddU9odSUrZd1Uq+fuwQQ4H3Ih97DV6Rs27HizoZZn6h+//z8+M8r8cbbx +VL+MeM3WPYD9KZ9FXnq+3AInydzcgoyNp65cGQKiQknXvN8oh4eWqFKE/YeeKGWcinB/9OQJQL5+ +eYAoZzbFinByeF5Qkoic22egYEyJ1qhl3gC4pEKkaInHvlu4CeROtbLv/WHe89DAlymybonOW3GX ++nCixapv0lxuoNb0hwZSqQuM3edAlVDaEu5ssQVv6aYcdSme3UIRbteXsCAjpbSeNm87l1YRDW/M +LDVtDMd2jpriISPXFIEZ6eY7HDGrA7wfaXe2qDbimg4h09iljF3ageLR43r2MI9dfV1FSZ4rPiA7 +8hP++KhqH3tg+K+J6kBI9xISTAnKlJrR31Wi89ZY/qfcx20+1FcMXQA4HpPHzeO3gjKGBP+F0tjT +48z6uGGR8m983sMxCNk23LKKB7XdMrWELh/ulzPPCC8qwNKftAc2gpBAA6QL0T5+XAPB3MsBroFn +KwsuLG6sCCL7JHlGOsqz+bvVlT45MM83uYL/569j+ATapZYBOYbFamQE5FIdPt0k7UMCiy0mWMYu +u3LngLLpsco8WFvnaZUDpTzLhw2STe2Qt4ycb3EBvHWiWqzpBLs9g7kA4cUikPEflFaBmUKA9g3d +37HjV+9vYggo51FaaGW/Fb45eB0yzF+1JknqplhDWupGibywkAAXUkZkZF35jhQrc8zZUCLuUQX/ +PsaLPWLQf1WfnYaMNmJgDK2dUQRs7koy2pBlk91kOCxZT7pTtF5Q6GlHK01tQ0hNWP0HmGTJhRbh +/5H7nY7+c3E+PfdLQrGsJqBv43BHcu9tpPWiLu4Gc0XT2pi7h0QVfhSz09YQqG8POp9vd6CQdK9B +yMDaMwpRoMWXthau09bdLITXzIspB7vZZZMtiIMWqM/f+GjGj3JncX4X3GGalWW3NmlJWkvImLqB +0MVKmlRHc5lD1X811pQzUEmidbK0/epyExOGn3DuoydFft/eNoJR8stFIHSISZvqToGRP/SeaVvS +ml1j+b5Q7oE2LpFb3+NfE4SyB5moBnGHOeemDGeRObudCWkZbZPMSJ8KxQlUXuvMCHH1LeyP6UYs +NqNvVjsGFxk6cBWS2xxwWQ6eI3Pp9j1Zosfi2ch5wZVzoDoeSrUiAoYWaUVl977G9/8b8nHIeT7T +TnG7nZzTAfBsTIGwmmjapTvCzQ7nKZT1owlMRSxf8Mczcv15ND4Zc69oA9SREZOFsidgJEadw0hd +oJiQjHD826doGWgpySPjETF207cEP0kXO+htDHrlck+RI2LWsAv+xKKZ71HFSUWMMf5rzLq+ccMM +AwGF/UtK/zVkNqtJjeom8oAX7DMgCICqjIm9qJ48Y97OLZGfriGDHnRd6u5XmUHkSa0VQX0iGeQu +2H0g9EmiP96UhfnGgHxDskAdgCN1fz/Slr4h2OdI/Ut6d/DvH61Yg3lGrpPGotT8fnyqES6atRrz +5cB0sLZfIZ44bPrIXSRPjGOTo9Luko75ezdv/e3pJyTiDP3PHJ1ysapSe6obqI1iYa7fZVJ4qVn/ +FtSTy+cTE/HYNkGuJmT+SrTHeguy6l4t2CcP1rocWbILVJviTuZtQc7gPivOQM/el4GdFVJl2MQI +8G4Q5b5LtqDAoRQN189KBPkEp4vpBdZ+uMzDCZ1cceWzJ413kHrhRaMsPQyOx5yi8AyFZFqJlLox +MfCLTMJ+r4axI0EbcR5KmQDvR9hluPEFPyTTK1pMQ9srIOEqWTZ96raQKq+3A7ZtmXEbZ8XsUMrR +SGZ9aA8oWRYUtp1pEXm6VRl/JTcZ4lvCtukp7INbFr0T/PxSZjr+oJTKtH9xkZANI11kH0IW6K2R +61SGd/3hpPYCnjT7ULD50zSHyP9t7NkT0UZVmitSmFbHFKazyV7NZaQ7mqHwo9Kfl2Ys3p16gEJ1 +wv3eLO3ENSuJBDeqlgGIUH/UxCYTFQG796MNSm5FJrw701TYrOIMIeXIOP8cNvZTXuvrTiooNdqq +SuOptWB2nrZbwMa2bSXWWLlahMOYFeyYnZLfMh0+7aS9j5DdLDSohseiQSYqsn8DYtdvW5GSZar9 +twFeHbrkWcPCD3P0sLZN+dQYHge0C3CmBVSt6sGqRxzIJGd7lfBTpOCEW4tUEYe9f/9uSx6/62gW +Opjl3CyBq6zANM/qGgp4fokwkSpbMm+LKHGjprri3cuiXjjPwMrmFihhvXsu8V1bNSq8lcKTpcGi +Ja3fKyzvavlcnlqcFv1rqkHuGdbKdm8yy+VXyN2KN4g5zAcN+KQ2Jc/Hncn+IuFab/7nT49GhFjW +nmr/UsnveEdaNDN/GWvwDOPdgOVR16V9B5HNTXzglYQ27O32t2fLMWHF/BsF0z/6Azr3nvIynYln +U5LegeEsArx5HtlfJKaIv4VMF+SK7K6NS57MJERT9qKyTCcbNCcmomr4a817VAu/viB7GMi5GCbj +sYulLAUWt44CT9EOB1a86XZ7S3Rs0skmip/zUkCD/M+tOe1IXTyceN24bOf3eLRPIUe3QrYr+4uV +x9xMpbAaRmnrLhtDyrs3xXDbZn95CmBE7jcfXoGeX8qvKTAFUy56IzEA5+NdUPNruDFDBE7/qB6/ +QL/4NvC9gvx3KFs3fKwNH+jcA70zR382JdE1F2u0ydv4pNCdA11LnhC1oYFAnwVWABpJ5tOybsyW +tmBj07av5h+x5H/7TGqTswzjperOxMRsmKK3PHJHxOvuOWtmam+Ec/mARlpXu3TOivWRmtFAYRhy +IvDKB/uqpChXTkxBxU5rOVVLj3798j9ewlC3f6OolL+l3QB9UGnbYI2RcZnRa3nsCKWOQvZwZJPX +vDhonPXskX2A0NtFdL/1uICCl56JCOdcbt0BKpvs7gw0y5fpwmaDCBN672F+BSJpJ84IILq3wgyD +ju7WyAzmbK59nkH5tMQaCDMA/t904wESZAs/tBJj61zVbVkCDm9HJ813wzWSSF8mPIcNP7SHKpDH +9YcqeW8FMzyjcd/JKM0oHYIjh8QBchCDdp2hJBQM1BbavfcB/uNmRrXr/cTNThTJMOr7mV4eRzsv +DZucV/vEjimaVcd8H/cgCiebzCHpAwu8BNkNP3N9Yu5WhfhzA/0uqEJkTcyifEnVGPdw2viIE7DD +nXbwiwFz15Ejc0+v0WdJIHLwLIqLtP1MelqF5dMMOvZNpg7Ky7Q5SObOsJhD7kuqiMl0PMgIxC8h +5M5msdfZJnmlH9l3duuD2IBPG/sZDF4sEuv8MofWA65jUl6nghOX5PMPfDpfw1SXnkOkM26HlKAX +Ab9eH362Wlx/IiDA3jCVkAHcOCyZbmgFCcYk9VtrazjWSLDzXGIYS+2o/dSXG32PEShkfsl9DgRm +j4/r3ay9QgO/u113C9JWUwfbAQWG5qcxHBCKcZsq8kz+IjZlt3qutrLt8NsVV52JOSu53HpK3OIl +XytEaBLGU3n9njTXTvVTLcL7y/dcGfmQ8oYThyqGWAuye0swyOFZu1xrGwqNRhjb4+YjIWx327M7 +SfjQxOcn46+x3uyADBgp3+Q9s9A2sn9L5nN8Pja+GtTJdbk9LcsGBZrOCDHhKzy64jnABanlQPK5 +Jun85hguQwZ4Llqr3Igqnt03TE4OIg9a/sOJJ7l6a3CDssRKzNOpRATeDZsYYnbftVEPwDp8axMt +LEbmAGDWoqLyIu/t2Iy/sJ99+CcHqK4eX0F6H6Fo8UIlhh2GezgMyg8Ai94j3DzmYaK1Ph+PiPR2 +Z9CVQnqNGrHNQwzSfD64yCBrONHillxMvbQ1cEcb7fANXQY3mJZ6Sy7bOx2WXqWT8s49fVt1ow0D +SDp3hPIPczTonsEMdAxXu9hAYPKOHyHZ15Gv4enaCTH0ilep5Wo56Lnb0TC6eERBHM/yAm7nTLEQ +40irMURzTzRpAwopIJuObMXl/sxOAqc7IYy/+IhvBvvc/cIqr+y01IJK3hrnebXIYFYjt4i4ZoWk +8rdlQ3d8803FbuBb+rZz7rnifWSTUzX7fl+IhyWR8liuKTU2+AnCDiN4uaiFkrjlNI+jToVkhgXZ +4964CTre+O64eEWf+iZ89MWVAHpcIQRUTxN4wu5ei9pWpFABCU26zJ0+sDEwqRsZxYisvob3CLxu +M9GaCaCtZY+RhB2nPgHDtSUpIuMqL6qt1BiCAsuK8lrRqsOI/4sLG7sNdDmLSowydjHKXjURTUs6 +N6iKnfnK+R5BUfs+fTXwQ4g0ebnfELEoKd5Yw8nipQC+l5IYKG4H0zl5hE1OYd7zpOPhxBvTc/ol +q1/sbjmRl19JBMjj8eKMqfyX00pag9Rw5bQjpE9NouAIoJ/1KFqecbupBq/kn5yzxzHDqg1stvCY +9EuKIfRWPP2kGeKYrN0UOfuIM29/9V8yMYOzOOO4rOmQbzQolzcDeKGxGI5lxAlXDDGMRGMMHIul +8SRU9wCTeEWU9Q1BDmyuQbDEVn0jKH8mxn4Ui3dNF5MWjat0lXmeU0ZciPtQSFwpm92KnVXsLTgZ +3VeQfJ0HYMAmczRhO8mOGpcJP7LPBJMngiepFFuSDsfDxEJdaTv8nvX06S3kyPyCT+3l2EIM0xkX +Umnmoyt3rWUbUsbH0J6W4dISNSIQa11YoWyNKu8QwNjuRncwH/Hf8pdLkWPFBEhB37+1cBxNqNGU +NIuDHkWilFBaPYDrMli8sVcmnk5qnAO66OuHpZPTh6w1oEkPM5LKHM9Ij2EqTXpVjLHF8JWkqPhq +dDqK36WyatYBYG9GQvG6mnvpfCO8ghGVOK3mQFCRs9Pge4vhM4LK+KOg0QZOKI+htrIpFfPDQkKm +FarIm+ZIeujjaisNWBTS+pNKpaeULM4OVY4p20X/oyz6BG3Ge4a8noi1tl8fPDsL37tb4+fIDvOn +ylI/31NdE8rGomWStLBq2Esr1NajKCs5tMSuRKxk+qd8tGTOSNQHbUQWPLwwtZzndkx/HTlhp8Wx +I0nhSAAk7544kBy/pAgyxmkhVfcAZzYIBVvexHr8QDtZx05d8N452vWBHroxolGp5kjhXIX6FgVc +ZyZPhFa/iCrUKTOtZxM/g1Zt8Uy9Crkb/ha8ZxY4JplP6+O6oyQPMCAq/cvSTK9EpO+FhhfoYk87 +4obt3zRXZU/dmGqQ5jxzxXeBQr5O09BxNzztVelp7odkjve28UbGxfiLW5WERNP8VGzHlhSdsIwv +nNyQ7CjY6fkeCN5QErUmafQXcZAVkl6a9Lc8aE2lG7l4MpOjnvLZJH2zKOOpvA0ULB4LK6bMuAUl +1P2M/ZTTH5KSBcqbtb69wfDj32FKnxqvP379QgYCr2RPvuVrXwyEMT/cIxn1yhCFt7mRyfb2+95l +IJ9mJecNN+NmM6kt6zq3cw47bJaKLH/uGw1iGAlk8Co2aWFLXagQ4zeMzomznlu+iLZ+3dy6GWGL ++i//PQuhciDHsuPwG4VC3A00mW5ds+qRF/Lph06YnHCP2AhZB9YE4VOG8BgLH/WGIDjUIxHHEqRi +RWnAHmuR7gJgbdG6j3y0KvlVlaPoDk4uIOLydLJQcLABrW7Sc/d0dUBO97baoMjrKm7kpGY2Qytk +P7g2a/b7AgcT53inyjg2KBqUkz9sjNDWT3kbgmK5owtlcecmP2JuEiMOXu6PnrGhYdm1Im7tCzqJ +TCiY8L+m3sZfSDpscqFdDeKve+8LJ0VHcq0HvdDyQCtuBxTQv/C4L/04bfKgl2jlGzsOTw1dNoCi +VnXRHpGrnIXand9eGX7HqmhAyNexHE1tKX7V8Q+oG4i/LtpNTd3XOpy5D2h90lUKh29ik8Aug3Oi +AbmiixUSnbikAVvoSfktwf/1wDgIfHb+vu04mucDsc1ayk2d5jL7HJd9kFGItwiE8Pdz9Xk9etvH +z/kPBiTqkNx2aX5r1unlZ0jxo2f2puY0l+wb0xvBFupj9kSMkeV1uP+iXfHNw+bPjPZxN2xNJKd6 +j2grQZf5UsKCSRasZP6+eM6ZrfHUk1w5gVnjsylg3fGT0tMpr98r2nKyXwOdOvqLHKyphfxTKpfF +08obEBmMOpvag0sc/qYFriWKXsd+3KXp2C0kWc5LWRgv19kMJV5MSSPMGkmnyKjQe1K9FIS+GyZ1 +cZQVkatps5xaZjG2OS8h4lq2Y4P9ypI6cAJns1AxMRhHZ7PcfUs60+rYTlHwBuSBOm8g83xugUXo +4LJBpsi/VoMuK3GlzlcF14+4wbQV67NVxZnQEdqU0t73llxmyqvaSGm5bOTmdBY/ROLqy5e/28hc +cDDw1BzyW8Nf78D/CMIKrOIH5SZh57fj0/Q4a06kgKktKcAycfRe+robgkA7/JZxQKLzD7721MLY +EB2254HAY6iw2g1mp+lkbzyAUBIHOkG75lkerXCqTxeqh3kSyiPWwE030EjEEOXb6y1Az0+D3mFv +wKrir3u01fjAUP2OlKgs/tE00PXu5+vLLVU3uXodRFjNCUmiZa53ruAimSc9SDj4SttcVGw12Yjz +5rBzSrVwVMa2Q8PgqohLBjKo+Uu2JiyPx4O4iSstWDeJfdsigcn2An+PNJGibYrTTVN3+1XRghVO +VBBvR7pFgAu+QHwEO5/f4PwTqTP4ATo4AbaFe+FsbADrbFoMmWp3cBKFlT6CFJG4iQC7LECDYfpR +RK+Gde2wa46AY5z/+9obh8hExie5cHL5Q39WazcvWAhh7LPgkm+Q8mClxdCvQshJXfAtpKnPQg+Y +GOC6E7Spb/6QKtR9oECkYFVNU4YM520nMTozhCML73sPRXmX8cZo6t150vgrNnCmKdd2zSLXzxXX +UNgiN3HkuvQ9vr+n9Vq1SJSqzUHSLLlTJZUb/9x/18sYPLSX2/piIkdla+QVcpRVO9CU1aUV26zx +3iLDi2QXoPYLEc6yTABHvWnpYKKa0ZdkUVccbO2STgvb4N3h7o6oT5xMrNfkoB8VYui1FaTc5nG5 +30iE21fIIJokHQUIWEUQdAC3VDdLxPtXtvOt83+eNUpU6X36As0js2QS6YLJlqFC8E/QbDBeGfom +RH0F8Ew5fTQ991fyZf+smyhTIRipEMaCfk5J2EQHTk0hjjTdKhVlxe/3pNooCFsCCHlYE1KE6R2s +pZD9DTNd3VnRqnXTHm3buRB/xvQjiVpE2EeNbysMUVUA0B7W/Mwod68puVzCNm/GwXG69O01RsMj +V+z7AgpNaBZcvFRFGA3KH0nyiShxKt7b2B5kKVilX7QOuu1j8A4pH5UdNOthT6GAnmv8CkVxmXnC +SvNW10XsGFI7bLU2MgS3LzinUF/Te8bPyiPrNqfBRmf2/Y47efa+UaAI2N50D1V4B4cUTMjLM9PO +Rs9+R2zkJg+1PKOkcXpAyvUPuGQVCAhHYj3Qm+vfCWF6u5qGQjcAP2I2Fsh6UWVs5OUiRPgsHaBz +YJ4AWf49YRiWy0bPZ+F5otO+6AnrWjT2UH6J0+F9eaDrQGBXiuLuLd1Or8smSs+PPKSLsHiE0UO+ +xhnG+UvmvVG4Z55gbFImv40xlvQ6NQKUQ481Qd5iLoKFpC0L3wSmnOmExRlSAHhwSFvo2whu3OJH +gCfAy3gijUGsBCmxCa801lFgKmTeWB6WCRWOazm2faKBzIKXG52wbV4PMl4Zw3uUrs+RJ+UI/Qj6 +Yx6Ao7JoYo4vSB2X53OZeqerqO7NxTUjaK0p5iF7jMCy844NSTTICbJGxGEVw8fWcF7rJtsOFmYE +p6ZKBhiwYuKtz0vTnV0VH7v8ToKTD6pcyRSkPhAXyWpg9CFsKehJYYtjlb/u/9BfI4QjD7TExnEC +SzOrm+w9KaTBI8YwooZwtliu3acpqG52I4KPbMRMLghU8szQxSA/7hHHQSqtEQy56teSAfbAuk3v +sFIzhCZUZrho0l8NH5c0AHK1hI/Q+rFV+s1PIkjgh+mNjbS7NENIWZzK65a6iP+TOV8iotTNqTJT +IRiCP7rc3/UsG5dt9SPW1s8QKZFGPbSfrnXNwJYsLEUFMOfYKX5+xcKY6WcRsXogy8zaOkebX+/r +zGuYZ9yy4Ub9qIaPkFm3TsBXFD4a2Fbvi3ybi6kWqibPX3BZubKLCDh+LfOGoeHDpRbJhvFwKtbw +VflLVeInA0f+3Hcpt79UWzAYcwieOO5BHXSiUGJqQf6eTtAxE7De06tkwTaGoVtiy+Me+zSCL+eN +4AQMVm607Vwz3ArbEGxPVwUzU3Hefl5Zn/Y4/yaxdagN1z/EPIbOyisIt7GnRU7hOxQYzJt8jKN+ +7FYJsYvdVY4uMBoV5/UKr9QaDGhzm1nn6YKwjK1LpbSWGrO1wiIilbgeSqc7OTGWxqUvRvDwH4rE +2JFVFXs2lgFDlwQ0JhqsXm23RQOSyAhFgZCyKkF1o8Vf7ppw7MzA10G2R8D3MEZDBKRLmNuy8cfT +Ic0f54qhT2r6r8kV8+cXtsp1yYaV4zxCe9t/ILvWhfCWb4e8igiU2V5X/tzjqYHB9DTHBSzG2d70 +3AH5sMOSUaoT3MD/HkPM2QzPigHucMy7OwX1QhRNr4AenU6OjFZ+X2oXVwJBKy2cttnsOCZs+4Gl +gbKYLZdzYISw3QmP+ppWb1Bv6LEVG8Ht+frWPEFL0sBgGkBsRK7VprXOT7Y9UexC8uVSHtjBZftb +AvXtMc4NPlr1t3SRcxAjn2nUfFn8LaSoCU69lLMPgaWRGKGcqe7jGbX3eVsfdUNyfOyocW0gBi7Q +2+UXoTMIuC/NlB3OE8QCc88BTQdLSpbhrocr3t2gp/2bcXKUqYficeEQjVAop30wHHfgOR+HguCE +hqEi0yAiOEIZpKKYT4WtK8eGlFXQifKlTsubEH9mRjjeq8EQ+UEEaeBZO+MO52mmrXNKFvI+NqzV +QUhkiF7l6Upqun5PuSsmkGJHwNMtqirGK/sDcTFgoF3nRpOiR/dwsfWfag0xvL6nwlLSPTUac1fJ +N2mwoE1s5/V1DQFhUvx0npqBGH67nU79QgguPhSgYQuPx+TLv+XXwFeHXlDBAroWjkjkmrjxbrlw +Ef0tpIrAy9Ro3A/wlHqfxNnh3eFSdwWF0zouv2HDxn+SszKTidsQRvQnCQFOAiz+yuWvDVx9FWnn ++loERTYjapD6cpxukWZgMqiXT2X3bEWSdhZjD1p8+H7/5ASR01f7pOFcbsfHtGO4KegA2fA+UfO8 +4Gr4R3S9MAWU1e/oyQhtS1tUU6Bn5iOwRJxTpSx6YaDa2eL4ri5kZpBbcXti94MSuazupZqVz8tT +vFhpD05IekWH+f19Kcg7KZ7UspPXLc6gTkVQKMkH2vPhRkBSPBWekpW99Hky18EJiQqO5/meMW0b +GEvt9yj6mg9wH2BRl9dxp7xoJ3bKwHMIAzMMFT+Skl/sSz7ZALw2v46jBtJENqDSFVSm8pqHCotK +AZs1qoipdZIqzSfIIQxgPXaYGuBJxirddx7BKsS04wtkv+YviWYGVtKxBtFPvscSUWRC2ne872wN +CiVEsKRJUP1ZOZvC6/YaGAnorkthDS5UNhfW/1gVv+D+w0S7ivv1hr6rOxf92nevx+fB8a/FinUB +XCuiXgiV31Ot8X3Qejkjuzu9Ret+o8m3LEje/tunHW2PymXw8L846pIhUMG9PHHabAw65XSsX7BN +nEwRBbpqSj8S/FhVUpIFfXxIoNYTF+4MNot5HlZwYq9NZh+ws7xEnlu6ofrXRqdDcwtVVbL9VEsd +gUfDyII+IodGJsgOxgrp5pIsh7rf2wrtDEoBRvy5s4etTg6HsdBkpuxmnI4HAGdS4z0mpXCfp6KN +GP4HmG5b1kPZhrxZCSJjAFWKZM8cPO36HltpOe7Y+GTAnN8zrXvI18iEXnYOKn7IBRuJudhuetah +hWP6/sB9DQe+EJb9nHDLQa0mkG1XxcNpsfiRVXl+ndwxMcXtNdnX7vqJK6XE+ZgGNmWl4lnK1qoi +Pgy7qzb5zkHvjg2aWF7dsZ4v/d1dRwHKAvJbek/OzK5mJfr507dJ+/hF/o5XzpMs5Xw/VSpkrD/+ +5QMmTNxryrwWLOE3eExr6q6Qe7CsyLlBcb4797EXn+RrLuJJ6P/Iz9O+pLctYbVD92omgOhb2jNs +Yrg621QEysS627AUkLyLdHnyKdhEFsx6aXhOabH+sxz55q8xoDvUNH110inKmA4yp9wVmgxZiz1L +3EYCkMx3v/Im6if1+Z7pwt8pj3C6dBYCFEqTnrEYG+4KJf7g9aRWto9xg1cI7XlH46Si3D9WbPBJ +9i/rAF83O0teY+KjeXuMQYwhjzhYwEIMbyPsKGgf48VkjFMlqrUv5XkNXfS9jFqHGEyaHazNQdgb +SiglN9rguP/BEyFH5+V72eXcVXzzkDwO8tFRaFOvHvF9SPlwcnF8IPg4xOYJPlAqGZkmV5BqtXtO +0ARn7F2EscM7TBwxGZwzN0YTzdMkqa75gaAjq3Z6X912XqJp13C8UGZwKzL9zrKkq1FbZNN81Cy6 +4WItlpQwZ0aCfgsBN48WSK+vZ5z1OB5dcydJqSAuElOL6n5G7+OW6HhvX4SUQaGDsGFGWErrjumX +oOsIuFkcDlqMDCDqOoraakDnew8OU7zuzsBR8Mx4/QEhROZj8ZdIl0H7i7B1CG3cDIv+bgEQ1r5S +eIgFbcVLdZ+nBbYBfJYSO+//OGhCheW7MAOwRHASY99vZdPvzQ8TzB0SlyM/ldOUQo5hk8/C0Sih +6zrhWXqc932a9bosxKsCWg2d8iA9KCFyv/sm9eef3VtY2OB6z/0G6sCuHbgHyiVxbP6XjGdMpTXq +YsQVrscPSJHJKdum7ftkiOJR2dXM33VUTJp7pwAWaAHvZquEX/X4y9zQzRaOVy29zkEH54HAw/a2 +alrwoKBPKZMbgBqfdVGH6iFEUJo0LHoYHjkjWBF+aIPVfYgU3p6J/UnRcZHRHhivGcupXasd/Htm +aqZityeLzGuJkIgWp3bbc9v+raVZDkfHhYsf4ncRxcAQDboAtxAOcInr6wZHm0RtOOfTnatUyZGs +73MyuGk6vED7gItgjYljbTyjcZxDHcRATvnklUzAOAa45BgfNjowztuIAcVXtgDzyKoaOmsekFCX +DwW/8pIzQLEqfFzmDkygghHFyTlW12e3e6ucFVpwd0ckDoN+jjEKu+TSe1YSLCr1N1WIJs0dFgYr +Cat4HDvU1N0MPvbRVaEghjKYa/ucB+JVLtEe9Fwj02V1y3kPy7pkCvQDu6bCmI8Fr5EzBKDxkpBN +AK1WrcVsBnptvFMGb2wGTPjrwmlOqZe0fH8RBmj2dMyYtj3nWsT8zpxXXJbsvkNJxiH6S3setMUF +4ZmthXnoeeB7Cygpp8tIlsWvjjdQFt6w6YtjX8yQDWw6dq5gcU3rksyeC8nxsY+K+kOC/lYO0b/o +wlURAtB7r49eMFnLFdLZgyJSTWv9ahyX807mzlJo4/JIKUczcGckgVMMAIb1FjV6DO4QmzKM7SMA +DocvJ9lhb3fYrKiVLjFVBKTQpSE4QJ8/j3vUvjEFb54YKzAYlHYhKH/vwZQhbxuE7qPtzME/0Rbk +PKHz9QOLMURYq0YUtw0h8EF/4+BIg132m/bSqG7rSe0xOtXYbLSXuQM4vvgDWfjrfZVXAYgwogx+ +DSkJYYtgCXtRxqt1mWaaSkZtkbjW9okS2ZaSwI9feFU12xEM7uJmzPQcdHSewq+gSGO67iWXEulp +3aWLRi31vzG0S1fIhEVSyig5Smt+y2m++s0VOzPW5XZM1GavjgKnEKNcz6YbcUWovyvCZqixyGjr +4JQVedDZseK3sxlmxq/IA0caqZhRsOVdcc0XWxDKXeFdrNfkcT68RvLRr89CZtgFGTmP2TgDlySu +bmKN7O2ANSZAuFob/n9LZIZ3TMDSJ80tkivN3TbaMXPZLh/z2uR/V2ck8FzyxiyJdVSoP5v4PCQe +Xa+d9pa1JHp23RFCtsIFiwUF+DBVp6IMvciuDJJdZJ8Oqcd5VqTV6fdo2Xg6+bIVjiwBEHQI+1lr +nNl+E7JSgGaTe4tlWuzyvIiPmeTgF1bUHfzv6Qn47Ey+vhYn+ZCWRIvLm/nYmj0Etc8eri3w7Kvs +IiYWGyTE9rZGN4OnYv7Z8X0Vbr6FOANIK8D2D8Un/nZtf6EPLkmBvI/n8GbjEsi0dT5pbsz1lf/L +O6Q1wZ0beylj33N7V+aopO1pj0/q4Dd4I3OUbHAx1C8jc+rUuxSdBWDr8Vbbwcjfehen1+UlrsL8 +SABoeNVuBYb2SZKnwk0h1SggHm6ZZcBqNhHTnvBUQnUPJmBByHixk/BmkY/uTLT4GQrEF4e8jXy3 +89+D6hNaUBH05wIhftrUR2D2I4R8zJ591rbnV8Idc2aG6cxkAcXCMoPd9rvtQs8jYrnlIG+H4LQy +gKErwEJ5jphONwl38CqGr5OPIkJAMNkmIK4lPO78xuEpuj/uzv1zqdQM1dKvL3i80lk66xjWhfGF +OO9AVpbXgQeXLODno2j3MD/VO02IsKKHSnK5Ry+s8+wGs+11YPo1nPp2Ki74Lapj8G/eCj7CYcjy ++BbRkUhDhR/gsXErsst2K4/Ofw8kEtmWDyJVMyXqXIiP+64aHpUnkcvsW9C4XY7oqrsGSbklh+Jt +QKQj6bQgl1mNWT9Jy6Xy3arUcOT/ovW7TxZbLBvPsjSpNTdjLSMZ138JS5GAcQ0igPL/A/FUmkwg +tRSQQmyV/gjun9nHR3FSZF44awGOvyynyvmv10hPIRIJvlkOGEqSCcClGzWzTZCNGTH/qqGI1ZNW +hJHSghVSHjEKy/PCiY+3lyD+4yus4gbpOrUk12vP2UojQtazsmiL0nOwIhCe3DrF/2MZj7KC43Q5 +/ox6RGjq1w7syeEGiN8TSaLI8h6xx0N55K2ohTSuoLlXpV2afBMaXAQDrkWPrXpO1CLNhdI5B6ed +xmg7I58hPthrbyW/YKvK78abhjpEe3fqddUjGG6XUJdBgLmIKVx3ZUyxAuT8SF5sGIR+1t+Taulx +2bs/2uF3bPNFX29UFhztKl+ip3iyxdALQH3n+tKOAx/WexeBPBCEZob38R6ol3PYkgSijs9kxCs/ +uOR9f71Pet/uaLOj7PCwIMTEyYUlmRxpSF2yv3jXlT8a5n2XvoGKvhquOVhqf4+d3A5dzja6IMrk +2fLuXs8nE65TNQeCeZ0EtiuDoxhabOtCmcMZKyIaz/vfB7M59YMS3cgUE6so/U+zN0FG300RMps4 +qER8J3uEMLJsuDVczQ/HYQMqW38Z+yt/M2KiIKOqM+yizuyQMVKZy/w32I274b29DUROIHgaK7wa +luYeYtzUWknW8Xp5zsNrRgPipxmKJ01tsWZngpiSvJ32qeb5JM8pgn3N//S3kdgO4Ojr7JLt3PYM +4qNnNVLYDzB+C1k95zqPmPfmk8LUPjQjKrzLV5SA1pcvwUjJPOH9Gz7W8s/+ITO6eIBbuqzqJlO1 +n06FwcfNkitx2t0dUwA2ZRSjpq6aSrlBqAMk6c3/JXKyPzv/oE+OpQ4kM/tmG6IM1ERFqFT9v6Mo +UWKWpF1L/ZC5/afvcv9Ob5xE5WIMcWWlusN0fmFz16LXmc+yk3PYXaSZGbsLmwqEBVATfWx4rABY +VZg/GHRWmJLr8AiOVO/MYhhoxNDQsS/jUmaY2y1+mYbO+t3JaPDSgbC3o/6hOZcBwyW9tNvcT68S +yKSJRV2dXZcNjPMVsbtrlyAKXXwDwVw2seNNSV9C9uz8DbLYqDBJgvhLs7/PisIFoN1Fe1AmlQ/h +JjelPAF1drLDpAywVKjg5xOKNHG6Kdzu0mTzpDrVk9cSEoTawwPG3gxF69NwvwRVs/KoA9mG76xz +AzpMs8wukQUgom0mNX2X8CEDwrsccXuozljgmC0TgvX1FSzQ6+US9c1GWrCMF0c1u5TZdNnXttrX +egue8lffgkuLv/D4S5BL4Ul/WOf7dXZGbpRwHIMQvjL7mvfORTdtbcfHQXanGl+uYZhbUl+1fjhs +iCiR5c73ypLCBbPvp4OlbWSqFJXuTXSDYQ5eIe3jQKe6bjR2UmBMaXT/PNYmWmBjF/EUP446IKXj +s8i4m7VUgqvUd3aml+/6oBf3sij8w0GQfeg2wfata+nL8Ra+QuBDZuk0353s8jrrQ88jI01H/hDq +BYv3tOfV+LqS58Be0FRZ7VCwJH4tf1ROTWqHjwwJtta6HDXwzUUvSXxbaR+ywYfqVbHOenBTJTnE +w4ATcC2abQhcoDi/Pre4+mmCFS4c4bxOng5cmQnXYeiGbOf5uzPcqkA9m6Yil62QeGG2zXJ/TkEg +y12pPoogSA2poOL+YGhFiMQQRwdsK9rNS83kSVP9BuliwFgvkwK5ryLwZN1Zek+rbXHWhX4xwOwO +lQ3ryhV9NEAHtdJWAA8sj24y5A74KDYiCky1hzeMPxvQmYPunc+q3R2mg/tl99pozLB/JpZNbYkf +V6OJ1WQg3BzVHCSj4YAX/WfcfOP6YaJ9lfbC+gyKZnYIZcyiJB9tP5+AnNqnmZT+4AbmAJKSyK3U +92yZUBQPbOB91nRX98G16SSguCaIBRpu/U/0vD2GOpJVjTFL/zn6Z5YIGAh1JKO2XP+ffxYltaNE +AZOuuYhpWZkoP+r8Afs8UfzdvyJo4xQpne9GzIyzOihy3JOUVW0BItU3iZWkm393u/EgxugRSogL +Yy9Lz2uAPI45npmayW5OIIaxc7WeqL5ROHcvkvi9ShQc9buzvNRy5sfJHqDhi9mXqeeFOCKIhkj1 +asPeqPRD7SUQkQ0a6FCLS4CcrrQvrqhY801N7oNw+wRzd50Y4a5k+uQnNWhAOSb9SBJEjPdb2G1A +dxFhtDDiTSNGhJQ5jQlOiWa065cuhyaP5QlCxVKx2SmaGtpdsTaiPs1xtY9xD7ZvgXdW1bvV9lho +D8V/Fo4VDGxFQgheWwX2VpRPN3kE6eoySCOXYSWDTlhAuigMuGzjFeCxm3aOUvFMLYkYvY1F/+b+ +B46i328JciAgUEpbSatRrbSMXsMBNz1kwVuMxjqYF0yNjJFKnK0wkGIlc7QrD9XVQD8CPOCG1k3e +PJPgakJzl2Zi+fjQwK1WZLDldcPDt/9QpaOquAtK9jkvzCdW9JNc3P65yids1xoTcsMKeAos2oXI +MLbAKIa6vyRJTpXEn10+24rY63mGpo8SMfOjmRjvI4Hx9iiXEe0RqzGWnURLCMXS4IH/xLdMlRMv +8YZbgeNT9LN6Lj4l5PpzCjesQUWALuhbQ7AIRq1pPeGGSNKZtQjS40JQnjVL7hi7i6BhVX0fN0kA +MMm8ctyy4LdGttN+71gwvBcWWSgO0NKfRIoMrXwb2GKZPwAbec9Dmv43k44PwDVSXmZDoc7EGnO7 +nJ/G/sNt2N/wR2nQf85krr0M8w95pCLH7VPQeVJU6ytEdvzWGbfb1ewcrMa0TrW8HF+hYmmFxht3 +xm/kNvNQ2wruvim+gfBHOCrqw8BP0YOvnDxQclWIM33H1N0q1IQyeAedPQFE+FJ53D7yfSccc6IZ +mm177imXcmo3z3lAW3uCIOfk4Z1Ik9Q8z03XZ9btOoa35W4Gkqcp+gin0rXog9BLwP1aVVmce0rx +9RNqoaYZAeWI0osT2iQ5NHXcuLVRZa7kYGApkCQ5gFgbR5/ldjNARCiR7uIONFAZNucFwh5wp9rc +HyNmqaIeeojwzDGD61JlmMnoWk9LKTKD9fUOQWd5ZG6uVfdNpXmgknmfS8PS+xGydyhmQ6NDNp9T +YaqgHbOpxKIR0V9oc4mGk8DWrTz0kAg07C2mcYhONEzCkJ6/gxNs4qFK4ozN7z19Za+W3K84BpAN +ctkVPimCP4ZOdJD0NNsRy5tI49YtPYPjP5kPCn0euFV0xfiIkDgxcHKz06vgFR6YX309b6oWt6UU +VmM3Vb+AZTiBOC/RtQMuMrMbrbblBUuAnpazix2wc9XyqU/r9EyrQvCEuAc0QYa6wWMGs8Dq78/w +YgGOPl4Xh/kM8Rqmd9Xmrw5cje/Mlf89csVGCF2qrvFtRw82nQ3oPe2L/ZU9x/+fxQkeOHd7bnxN +VV+bOltXIXTXcY9NRthMknVhtOZA3EJBGbGhTuGWqFarPZW+kscZQNU03+0H1h0koF2dgqISVuv2 +dFI9YG7xj52TAEAEa1EO0DoUF+4E0BTHkrCzW86lwjNMKTtmpd8gy+y3aRJCL87cqcGdZr2fjcqP +gpg9ldWm9KEu4pN4Q3CvmLCTzGKAowMWzw94gwalVtd+g71Odl06mJPAQW0JG+CGkwN+Oz9QXCJA +F/KNWviM0YyyLKn9F61uZHzuqq0xHjDUPsVWtYKIMNpRdGVPO+pLGi1GryoXwK2fWl9HEq8xieRG +UwcDM/puccCt34YLsQNzvswkgkvZTMwDluGmVJcdpjR+aM2zjAHUUUwCq1bTx/o25NUqPqpDK24b +Rn1UPRB8WtnClefwD/i45R60Livz75lGY4L3h9xNKWP4SjXqVpIU7vN4sce1ChYc2wnOp63wCv3n +6FSh9oLGS10XRKAkvSievPvw+unN6kA2Vo1yamkAEiEphrLWSFLHBmmUpG8mtFP6EMyME4E3Q1KM +RhfGOkN1y+jOAqo+qGyOziOl6kWpQvlqKsYVYhJL8ScHSA7W460Z9/ObAZ6fwyWu4hnLHWeolAWy +kDD8/r7+UiZaS7uT+vO3p3XeRRr/9PJkPRbLH8IIgb8MGUBT2mxhPZDIAruqBopOk0CzHXNVfwVS +d3QVMdZebtdynGG25P5Pz/HVs/KQHZkPobt2jfHaD4O2f674c0iX6p3/RbQzfifyNzx50HsVjNFS +Jm+SaOn8uN7aiVPOqGOwUhsyD8afzJhr0vENXKXT7AwaQnY2ZQ3sBZA7XE06b9ytVWc1UFyKz+cM +hoOpxQjsW1StAkqTPGvbQIq/YSM0zFVTL/pN7z2mL9j4Q/uckUMdkCDjyqZn/8fw48w1L8o5gI6S +BtkZH8q7Gxj46VajjLghhSuA+eFNEhQ1fFeZzXplHf/5kC2CqzSayWeyLdKjLfja2Xmm2MOQ4SVr +IgjbND9bhr9t3ap9GlO7xFOSG5TyB9AI/RWyn7tqLV04c6GY03dcLrhPsFDgWXj5sAjIn2LOZR4/ +lkcb6CdFpFJHRS9Mnjq3hefx3WLC6IbABKSTgTdk5KQUSE43cFYotehixHqSqtWev6v/X//4bX2q +P3A7+5Q9GmI/Il7WOaAidEJQgsEH1Y00oJEAlRlxIxKExWXCsnoyv/11sfaNnmQK+G6KAijVnxnY +Uz3n7UQCy3DkBY6GYcnhst23As20tmOxHqPq4zvHUVUB78gKBgwGGCRs9KFGPkmMPR6LvJJI6dtT +4Vl9CKpK4e0yr2M/l0zL6Un1V0tDMk282gTvEx9kfBlohsFXtXbfEahg6KIrE6RykyrCYgCSh5vQ +GbIAb/Pl1ZeN0rMpscQ3sgWHxmqWFvnHRMm2F54f6OPuKtaMg1v3P56028UmbcoR3+erc8l9zyYo +37UU3w2OcSwpbOneV6uQLAN5w95Z7UD4zzBBsNWGJ7lbszNKgOzcWUDkV8a3GRYnTnuqW/nd748J +YvkkeluhRY/a/KeG0BV4chu5Ev2j4lVzsyjBGFVIUgAn73nCFtufbnyPaLkHbSJip1QHHeILS0LE +kJhqI7Z5djZA+sDzu96eV+9BN1/zs3bcUCTW36/YA2SWxTaZEutEpIlglQIsdpYiV2EYn0SO11uc +wD89fKlrX/K14FcRYSsY+Td2RaLLgC9KyQIsUmEY5r8mdj6/jqK55IXGBeKxltlEdg5anWuv9Zfj +mXRCF4pEu3KEJO3o/y8ZvuXVCrbyHpXSVfkcu+l+p1Dsl9MmOubqtrWQre6iHeGVKfQAXS5zObHK +ntNeLVoFabx+f18DE/5zYDjfy6/fPfgVOZEnb6oZ0I8ORwxraDDlnEyQ07kmMFOT7WoM91HDwaD2 +xKPMFuwRlPDtvtdU2IM513mAy77Fb2g58/QzV3l1aJ4LfbBTyTD2tx0aPCb1/uknh8BQsFdzWn7S +3Q214uzUnnyNkiGjsPv059sfIuifuazp1pllZoE3GXtp//YWP6jcAJe7AwdDC1C+pIktMXqQMtvb +W7K7dwRxXqbIELyedH6V3XC9vI/zmu2sBcbTBro6WDQcZcyj+M4AGBXz4JW4m+aW3al0gV8Aj1yr +BEPMW1js72r2Ew9HvFbNw/tCf2kPatAGXgigLDZiyGSpLNC3qB1rLDv957+fX4KKds8OJN/VD39w +tKXwwwLbunSpqnWlOx1pudiDgeVD4p+m5JFJsxYwsUBUmV1nfirH62G78NwxAjVd/SwbP5XfiWtH +B6cPlVF0WzUiK/C1CYk9xDcxiC6+U/uO45w+vqhUT8q4eyMWwX05D2kE9yKJQ2QTru0mjUY67hso +xlmYLr5WpyQnWXnlv3equ1U0s6MR0BrHNlc297s1wmD/CnJIiffhazMbpZykiGVvncQlnw/lM4WE +Tu0x/Xgwje4/GWW54Y9nYceKM5ETM8m+qaJpS67X22c94u6flIHHpoY3Zy+qxUSnDl7EigPBz0OP +Vm1voGqg7f1p+uJ4XvrqcTUyCT2YtBZdUYvVqTIvVfapAjWUo5PZbTpKYwIYn7YQZKy/X67jW+1f +hi8SMiZsIjLpR0Pf21FclHVs/Z0fIReUg3abFubuftVvxpD82WwZ0z/dYsfDWFmcMafyQRxiPDKI +5zXSDWlnV9Z/6BfctsqfI15xs3y1dgmyis7sfNNPEqKT7y4vL+2xxMCThKa6PX4ORoQcb5HfOOp+ +bCES1wMve+zYsium6DwkvJDN2p09lbbCi8eQmoODERvRTjbWz4GFd9xEMbxm2bFFBQPQ9pfwdXrt +V5NyhvvwdB4cRCJ63IiA4EbK/OGej+X48YB7X80KcR5WluKLJjOzpmRW24+1pZ43nMzTIkOjgvev +aDrheJuR5el6VFKWOVWB8mNAtbC1Ffan2Co+yRYWXxVnxK6fcfyLoBdlLvWmNnmadd4rzuyJr8Df +1jwkb+NhBY7km0lDwdHxoX/uvqEWAyO/JTuSit2BxFMXkGxmFhKtDycTvbEHCDFTdv98SeXHGur/ +X2xzAlJyI0p2s0sLxo+nMH9iPeLWmkojJOTeUMZAUW6olvqJ/a7fvjbpIBmkGCNGkK2ubn8egquU +HeNtfehRmTJv85el8Dsrd9EyOeo3u0nhaDufZZMsDUHpJXviNjHzQDlo83zfoD3mQE48W00/TE/2 +dY4GLUKbdvccqUmM49rK3Nm/UVAZ5LEY4TQAEp9+AyrWbP1UhmLCaQbfsJY52WgBrzQhQrfOGs+5 +rdHxZS8R/+lJVbxpEbssUJIbI1ZhBIVKxz9QkJjF7rA51esNwDpJ/Yd+8kpSytcVImYeP38SP7O8 +9YnWpDjLlCSxvwirZlcUYTOhIxvsTSFvQcwrGd/QzCAuLKJYn5zBmj0aiLa3G8l/eykzWASDs6rN +S6vPYpl0NzBs7ffOhCie6vH/Hoz337OHhgupUwu99HOnAnyZyoUv6MbYxwCsiAUjh7BWnUhfy3bk +yr1xeW+CBLVpWcUh4PYtZVogPfaQsUJ4QnEX5QyvsNBatXAkqZuMK7Ts68bHJq67jEVH2SxnfedS +wGdn+9AyLDRn66bcs9J3UoMLatHygsZtsPm/KwCFWf47+snGTpShI6826DFJxKC70S/0QNEXbWwl +6LuDfNLKwrqfQeTRO0GbyaIdVWlIts0Ivn0Ax/4mfLW1tCR6CcPhOBlBx6P1B5EHLpaxM4esHV7Z +O988R5lHeXSPgss3MUusoozqGenMC9aVLiCfxVYfGlU6ofHm7V1zS1XqrClRzPaYqdMc3OH8ZeKx +evSk7eoJjAUAYL3QS4xZGu5rl7Y9hRUwkrkAEqClodsiHkEj0+iRcWkzgBE+iO9xvdOf9EfHtw+P +SjmlaSDrXHWfXbq45lJFv/PFaA0M3ihE6QnP0aPZU9IiXMxsNETMgestj0N9qbHK8z9g4IwFC4+E +VpRE7k5AkXZ8srI2BXlg+M+RV+YFWOTocNHD1A6BvmtMjRpsNxk33jqAcYyVx/kfIXW7LR7R+v5J +EkxU7PKE19g1AXvPpUKtde9eEu0sYWU5ux1i/Yse1sr7Z3fhdbCLJNir7TVcUSDX7ecY6Hb9zccf +ENluNwkQdHrSRfE9GuU3sDPEo0rUE9wXUF9qupuZulxogaksORJojXOG3uEG6x2+HCTQmwrBW8no +T3b3VYLBnwnDL7kwJ/H1PrpYS3koIDGoq+yEXWphf9d1hQ9JVjPtq7+oYEMB6rr4E3cSVhaL2X58 +yK0SoUzk/1nPaYnEfXDosGlf/EG4fq6wutM1i/peDsMfa1cTqFgKz+eAoKCAmvF5FqQE6tBr+0pC +W0we2kZLk67/YYELenLWjK351pPVuPIBK+RhgjPo4s1Rq44LMrr25olVUbNCLRV0D3MsUZkowiXN +FcsC/DX3+8mFZkQZEL9LfmJu5jRSTU/5FVJtOwPRVm+JCsclhOBxDUdwf2c/cZAfbA09QDIDZ7/s +kKgWqjjapBpJu4MDaccRDeDXt8SYgfuZCdMjvAaTTj9xZW6+StogWRZvqi947dyCRF2nGdDrCN5m +sh0TiMUbEZ6qhEXBfjMS+71QVIQF0AKSfi8X5AXfcarwVJYIibTIkAAbaR2iC3A89Usmuyzx9mNu +OzVrerrNwDLGSdp15NPWZnizT4gaVIfWCxXKpbZYidkv1ehn8XOOW6gdfiqjXi0rk0O3AKEm7+AH +Xa78ojsOR2L8RexRwSc0yPVUYOK/siIZ0BUIPUl2aED3pZfLzmxc6IhAiLfn6PiUyC2Wu/pCFHNt +P6ZMrVAQdZ1HXPV2JRtsCRBDAXwhafNxhxkJSBQpfr+XOKQ3k5DkLSol8OMg/YCEjuRq22ehmMxi +nR1qk0g08QMSfp59COZWzHn+DnVlkDSjo+KmJ0pZi0HwxeU0o7xaGvg909eNk+PXR44ND4/BQATx +bdvixTeI1a+C/uypWLVWkB/8jiPtdqzJe+tzz6WYks3KMU7YGo4h6d9+91c6AEMd32RAeRB/kazc +Wy7tNI2o2zfCmit4Pt9AeK1ql3GrlC9K+eqAiMfuGgwawlQw8wuImEsOtq1mJybCaJmoIFb8/CAK +WEdxgyRaDnu9LNVsWa6TtJd9pciCLEcvDCUgpqD03r1LVZsb+lUO7uRy7ZNcoi6mFVpAmP7+/UCb +0dyeSUOJM2KtRFLptzFKWNUipAggcE6tTl8yEBfEodE+943ujJjTsRqtAZ5IVahKGRLlxNpI9AbP +qG66x4hcqYDd4tIdZob/aKNUjk5inqL5QZPP3KKr3tbtkfRBSpA8xK6pW0H/rb665sXrxAW0Ub03 +anqjThzPkvRrS28wAu3rENo+ryrNz3AYPs1IjOU7shfDVpGOqmLjx490B7/IxXFOf4pgSGCLszG0 +hYrhhU1RypMDozCKgF5CUofmzVrTQ0lNA3kc9//xIMuOh9FovKWhhNajYR/kz+uXxunpd2GHGJH2 +h0/CBPFfEv16IjDz+1GLWFEvmapfU+vMSEV2YsBVNdBTJi7ahcFcH7L8RADZYz6mCiJpraJzKNJq +bNiTzX8JuV3/3irqDu9DPVtA0fkKEYLF/Uy3dGWTqft7Wxl/vjLMUlnb4NWWWN0TN4s7iV8x/wJE +Bk34ZdcfOL7rhBz2VHj0v4PEnQaE5z6LcmgGzCGDsqxAECj4g/8Ths8r2AwoYCtoC2FDI1poVuJN +6beBsNTtoc2evvKT+PHVQoFBGcTUumDR/iuuGMKZwKumkbqwDWGFO/1bsVW9fKNwPsvelvUijoW8 +TeYcmeJCpYh7XxitmC8MuogqGx7FlEyMoqOpAGPkLXTi+bxJS7GZE2ACc6qWyoh74tvPCrn+d2BM +vu8wxs+s0a7yc2cxTw0OU/gPtT/CiwqgQom7DfSFBpkRwxwJr4Z0MYxB3MqG3JlRb6SVNQXhHejC +d9CfvVBh/zD+Me2bHIsIzFDfFkSU8tgyLCUhh1zWRPfQPtNCyGk/5RpKIhTMvlNvQrJAjIixSvUT +9q9X0E1iSVi8Dvq94F4y27WjEAPloAe7f2BIb+E1bodZqaIMwubIVJwh9QGruMMU8ZNP81smGQ/v +fQhd+eJbYMv+Oh7/XZ3L6B3UCcnAet3sg1UyMpb1mwe18WGdpd6NzY6o8Ad6l3TDOmyk1AMvv0aq +DKoD776ZkM5GG1+2/n/adNI4H2hOMvASElXNwTNwb+l06VPlcAeoHDL19V3S7vA//GJ4OIK1z27T +YqrumFwInwKPRz0TbFNGx7fyb286ile6eZj9mGRBKzeis0O5aUhFR4ZFQxb/VloFGgFSP3RKrsGL +nSDKJw9RbAfWrcI+201xyWOO6gMbFgvTLyxjtIZ2m3iR4PCmZdtlTArd6yqROY9/CZCrrt6GNWw6 +RFwQg8WZ2rVV7G2jJHTMeTWzWllgV337WaQuxA9pKBOS1WEvqh/Il1YvHD8C3zutlED3mQghCVsM +gZndeIlqPaYM1yOEaWFjTurd60c+Du5CscYNsi7NxSH1lvq3gDJ9iVlQwJ475R12OYdglpFx146Z +Y615Cc/8nImBDZ27nMPP79xspvvpwGnq/00/26s2iMxGzMIqtqu+9TmOPt64PCqymrONPuAtM43o +OJ53jvRu6nnghvDER5vVCZfzP+oAPcfXX0fKLOCYvZJQhLJ3IWD8xIQUDCu/Lekwex3HqkJkWiZZ +/rzRJBPWvvKT10N7uHYEVFMy8YeZqqFM4uOVFMT27b3P4FD1jI9Bcm7S9crJIxrYay9u694uTLbd +KuqJdmqf6zXa6nweJO5QSqgR536/3NO8wkGFsb3D886EYqaeic63CDvKG5Tk+B5yYlJsdOzP0Pjj +IPXZyxtkTdEXXIUsdqAForO/0xCKQoRSCK0IVaukNTi7YtUi5sW/S0K8MChDMecLIkWhFH31E6Gg +rvgp96RgwgXpAMqPIc01D830XArQ0lUWXTyVBZ/Xlz/TqCo0wGvDJUZGgAkQ2N5lFriu8nvUsvN1 +m1OdTu1Njo315joRBLk80a4V8ovkj7rynvlukItRFjdzUcbOBxfPXdsOs0MDhPf/iqTOReZTdee2 +1YntrWZdiUtEWofDY2svh7zXCIx44DUwLa5H4ixbL85O5nsUnj0rbMhOsUWVUUzugUn/nij8LGMm +A1fg2gfth6ndO2XC4FcAgidTrcy+YDppVk+YGdCxO/yZfjx2mDhrXBWuYne6ScWVo+U2n/U0y3LH +/fMgB3ct01sYPGP3XGepdsVWoVJRuMd/SdQUbcaV8YMOfPx7bKk4i8GQ3pBr5L/54eLcIPNgAADQ +LBv15ARI7GkwgFPYgI5zIqFev8u+FZlpBSxzt0CdFQOzq/M9FmnTKhjJueSJGr8NgDIK4WQzpCoP +efoZPKqE3Y6WHaHj9xY5UdjZhGSWTPWmkN4WhVrVc+TluEYIQA6vsCp8/YDBdbbBf1uF0ycxMu09 +i5U/AIkvZWoxQ9LEcoODQHBOPHWOV/UzuUTjfNgBiadLz/mWgkbc8TkqiZqg2MsNWINgLdZXWokK +BAo4fhEkgPBBHpf+ojPLM7c3c0l8/SvIMq2SD+3VsBNHfpxpWVIIlBC4KkxrHH8g1c0SxY/vQuyn +TSZ8AC1vFGNyIBGKFMOyUCUlSg3OXaJUQeQ/vwhjXscTtRtsvNgeVxfCv4UjFqPwjA71Hh8vuPPM +n5/y5ibnhC9RhpPxKY5iV6yxSOlGiwbzkXYMBxDbhAzHJ91LKk5Bt285S4eIWxbWIIvXYR62v+Gr +cCP9yUAooX93wFuDRpWKb5lxUMQelQzpcYKU31YztN+2nQ2QIWdc1wjxlvXMG3Po01pMMuy0EsnU +4iWxoT5VolI9WyzvbBVw7KtNRpzw8rL5vAp3QaGKJqT8BPHGFRHctYq5q/b692mLoWIhGVCfSP7g +FN6/btv5JOJHB+B0sJeJC2nzFYpulkN9pw5PjJdIb06L1WR0dcR+XsXWaIhmAKgkAixfU0CTxqNR +z5D5YmGY1Uan01iyzVzU7UhbXgMwwE/Mar4h6PQHThkN0CwD8/4iBJwBPoGv4Hs6GS+52u37jwBE +dqhz4yPfuK3abukoBUNkvZe3r0myKYRwd6FRz2Z/7O13vKAbmPZupVguNj69nUGYi2qNyx4StyHQ +AAn6nb46jV/3w2l55rECcYOvZjOz1Kj9KhB1B5RrBv5jz79SOzcbDoUCyfTTC44BGsBiTnP/E6vu +kVgrDLp5GQW+HNrQ+cNzS+xSogcmwq6dXar+DwtSo7ow09bn+zc99M8q9D3RTqWHujqUiMYpP7E8 +fkFIgKgyhZEv6XQ+rpdMG624Ld8o6QDdCApfQjSCEXd6cLJBvY7ogmz6OVmD1h1o9Ap9HLggFfGm +HDWeLLAcCRGoHoS4jb5nD7nX9ky1UaQPKlCd21P23ukACVRC+FglAsaqriHwiHBNBi3/P7/H8L8r +M5f92aZ3BRxG0wMy4UpkI6rq8TAirpBcYCD9eMqVSDiaFzN0pBE7ubr3jXSjfdpUc6VjOSZ5vOTZ +Fj2bWBaIcTTm4QSyC6cbgA9QyJlRjZz6A90Wess1rQQPBzA6n7ckCZZIOOwbtPP7q3c84dH9xxxs +dT2z4wx2G/SIulah3Kt4TQj4pf8Cvi9EnE4XnN65zI+JYD8i86+EIBIKnY87iPbPHjlr48k7RUBl +/UFsSDG7y7fohZLx4WkmIWi53XzyQcuQfCyPJE2EMOH3IPXXxGImiseFwru70bcQwX7X/EDi4FZI +vTA4e2aOeLnn+++wbaLzCSGCa6/u8lOcy4wE872YjTWt9ARl4pV6he/vsaEIMIcTppoL7NJBshU4 +ZICXmJJv/85GN25r8Q2VDLlbyt8NixLgygMM/UM3l7oIVP4l+effToTwPgu0osR268JogcyLvFt5 +jRNzDURTGzW4wrn/APLJJiwB393MMC6T0GobxK9ihXilBrjUZqN7Rq+VkDrCLvzd5hUW64tZVdLw +lI/VJbWLXrePeJVknIM4QSm/OKzOIk5fwfp47ZC2NdShRLvomBoNyUaqt1d6YD55aZNGw6xheAVG +fZdODD2+rzeEdRaN6w8O9ytFQxlGO3VLDHw6hfoGzy6nfb2DQs5jlsq/eYgEU6KdDLYAi8wzOZoC +jbF4eqQTBcZoeUDo2qnDCaCwFi9KLsxQqeg4DdFjzlN9VlSagLyG4Am5QmghRiit0+JjF82E9/of +O1H/GdmDld54uZqnAUZPwL8mHFT1+N3vu2v8+TwTLfbLbnGlKnNt+4LvWhjJCInHYGiRQmYn5rjw +8e0wu4aonfKFxOXaQLEuCwzdF3yOQu3pVwbTSP6puw7f6EHou8YQEx5ZtOv/tXzLTU7glgv7kXk0 +DvWL3gnuU9UuvSDic5reSxrBNk06kWaERk9/7q5GHbobb6j8ck/gaCPd4C00RhHFewUdFEBnSrm5 +OE1Xece77V9JlBKQ5eFcY9opAUTGmTA7z2QzJUeSGNcmlmIoBNvQLZqd+9DJEGX+tWJi6xGMX2j2 +cZiapC5a+a2sVV8cwVUzEFvqiHdDTeva4ZWRdkAJcGmrD+oK93TqXID9i9uuRRDsr/d6ae2uKH8l +fRpq1aBDm/0EXzXrmkxiIfgBa0U8KY2hluhCq00jPaE+siTKzRGbCUvH1txwtWXYLN8TkTw5hPBS +EUZRHlyXFnCC17FW+msW1WLj/LUiP5YtWu21r6kFXRwLXKEARr8BpNsvy9QzqC9pxe4lqdzUCZGu +kTispZ8sFGDuYCC4U1/U2ReJpg4Z+cdBGixVoYKAETDByNUIkZz6sCw8n7cYwgCQXZkQf5qTIL7P +1xdXQRtayiXL7/Br+UCy2PMkqimNTiFkYUpsGogL5P2LjJiLatyL+OxDhSgm4xZ7GPiUNmPfv20M +nJTGN3nOeL87LhcLhXynbBy44c14DFHBIvZjwx14lcF8YzAwwPGbD3Aw+DkZoXUqV3OvWHa0qhP/ +a9eFALZjhmNSLR84FZO7lS4EwmS7SgsIZ7xX20uXfFSAEZM2xtgEH/+MLkeRi73CJySjbb2ITcsa +72lWTnNyukIPBvOSBp2I+okdLc0zBF4O4IH9ogsTIFvEpQogqYbtCHREZmuI9oL9M74CmlvjcXWL +NGmub5ued8M8sU92/xWzF+yp/YAgWvCtA0h6a8zhQLRbsqh+bUfF6jW+e0MYPk0Fr4EhFwysyKrO +WaTAT/BpwEncz9dxrjgZJ9rfva1ncVxv7Erd4yfR7jJ1Tb00N2IS4K+s5fO6Fcb+DqOhSeWV4dD1 +x3qKJgMJ+kPd+0g06MQBTJOkNItQePQvKaOfQMduJkSzehyAMJVMab4I0+WXY1BnJOUcr+VoQM6/ +dKjJ8xF28JQnYPIuv+oZ/aQJDR3Cy8ExdhWoXru3U3t2bjRWm9WfA9h28DxJXhyywcc8gsG/H/jH +EHYxiVKLekHvqg0cPDTjSpzRFQkQx332jHSLv0L3Ei1yNDwU727cVtQV1jtKYEfGryeUhQgYyXGI +SkMsX89vDdyppUQx/peE/M6E/MV6vgXPyyW8VcrEy1Fs77e87H6hYHbvL48x9u/7K7c7n5hPYian +3GC09aIOQgwVpZZMlotuQgQccYjtj491sw5FkcY5kjfjlRs7c1Fy2omzzJq1tTZasrXST0T9JsRp +W6c2nG7I6uiTbNMWRI6B3vkt3Zj4l1H7g/sQ5AjKTm/9NRhp0FQx4flwtUBwuN+foXKJyBbpVJI2 +NC+Rfv6R3JoGmxjIMTIprykES+rWX1KQtJ9ZfhXsmuJ5ItvX/fZvAcjZASGBg3swA4vv9iS4I2HM +QzGKMAzqx3iucxthOkWAdiWkI78GiMOVTRgdnPybMTS1k4apaRsbxh5NXhpc8bWXhZkc13vHxGOe +4Av8PoXiRAvD8fXET4jwZE6c7NztGsYoGTold9kUAgqdIxz7dOzDvZggkdkxqIg4+HZ0Y9zhBo4j +r8k7qP6ej04uWsyMD0jhIs09iIi+neZFT/L5yzdW4UiaTU+RYjiH8wvQSllND95nC0Ta80ZW5GHe +6tUdtR8nBVvlFXlKrTTDG0Mj+hiUO7Wce+mxCCKNoE6lpVnUA0Il9eYg2x8wEbWOWsAul48Yclhu +tCIWioYu6rgoirq/qvRdQa6t7gKz17sq2kB6mLoee2mES7RU2WHK8LPssUc+ZwcvqEhktbG2e6Ie +3JJ3XL5QJ5wcd/mVOemMW+JC/BNjj54uRMuXOFrB/pRFUQ040bmbTdZy7sI6n1VkJ/Jg/6hmKm7V +uNtXG66hsM4ukt1rkvzPNrFD1X+W262LAXTNrMzuya++2/imiUntTICkeUZzU6jagvLc09FlNvSQ +6NFQWoXVpa18HFdVqZ2qUrkP14TFGbZOnQEvuwuBL1ioiZQ+2vtNQFvG2PJPiXeBIKATF2U897/5 +vpn9tP8uzSL3T/q5aK0BIiHrvCTJMIdwjwvcMicX+BTff4kcx8swu6RxnsfHHpeV07rZ9jeZjt7h +TUF4FVn4AOluuO7Sz+mtjBJyk7KFpl4gy9Oh6H2zF6YIyzfWc9QPWPCSNmuJyAdJLjGjvbb8Q/dN +lduAmZsM/IbZf9vZVIaiFavvl6woHrD80TF9shA/0mYojvlrFiYnbrEmsBIYSGcOarxp3Wdd2cQm +0hyMABwK9pufzJ+mEJYHKmtofLK+yXNEqXlSQ/y1GxWODujNQf435UPxHy5D/DX98lb2mNLWSxoX +KP4HEvHQZEKMHZLpGK/SQ/vpdqMK089l1rsOeC5PwbbXXhHXkZmsgL7wGbFWJ9d4CrGNuwO9E+bL +kLxleKMXMvjag4gxT4UpObRBOlQWXxRKOIQqfn2tvVsXu6FQ+nQzOpjEGBg0eBqRx7Ws3blWzYc4 +BG6TuEY9cKmrmuvxQ1tmuTL8Isx2aY+r7ehwq/LCtILEotFlGtLiiOXay0jMD7LKsb/Lx5RuwUx6 +8Wxrg/LBqMQmoMcOT6vxyEZjKFt3218tDZAwMv4WZqqJqS+SOmwWWI4WghBw9V9J1zHqd4BBvY2a +nihv0SYtf1V5u8a2CUEFWVByHuGqpuWuy85G7fOa2D1TSgosol34nv1PI7WmHBqSXuSgj3oyWWG0 +Hn5yrl3JpNQqJf3Arq/4L+95d06id0zpJKzOV+KwQJw2FA+kH30xhyR6+8ErAPkRjfYDwC0YXk/I +cR0iI+U7+uNZSOybB/mNIJQw65RnvP+eHdZa5JvV1PHnCH5WC0J0YY9+zBmw6hQ9sPwFB5IYYIzF +M/dfgtITcVyGJA9QpsXLnHUVuQzc9mjKCMdtOBbyHpIxMt6LkD6fmwYTRMqDH3ymYCQFgLe9Jsy0 +rWNWhI0xoEUmp5JJV79tx9ziG6XpISzh4egCwh8CgOVGQT/Lsy96yzH+7EWnd+2LuecdacSdILsR +7bS8VLzwNfComsLchF0N1WJfoBDow05lGWHDEGKPbOFec3o7NVOTNwUmY0aSRqNxoYQvUC1343vR +Lces178BEaxWpQyWzN05+4b9BaUqpyOISKrbICkxMOsoffYHb3qBqCoiS6p4yOEfJ4nNWRu3mNKv +URw2RlTaejF/Su5jRFCSe/aWm5ByR4bK1DtyNMD8Ub4z/d0EfBfsALo2rNth0vCeYqjs8c9/STfK +WzHX5lLzmieac6lM9yT7wdPTcBWIemYQGCg5qGzEF2/RhfM28c1Qw9xpnghDKlUfcE9KP6jNWOud +akd4wIcniV3MaV9mfM2Sjn/U77CU0f9srq5K9mq8CsBJEbSDhzcz/QDH+AMdNxHZszINUg4Owi69 +At/Q6ikOLUPoBGuSzCc/OwbIeGvlcZSclY6CextDfo7XKV7Ck7QSmqu8JF2c5R12jdB965yWekak +Npp9D8q0Kt+xVrIYX2XR/j9yGo9WZ9qVHjb+g11xrf4HOl7t3P2vWJl3LDnm+tNFZ8z1Pcqf9Si3 +F18DbswO5nV5UATIfKenCBVaNp8nSEs8vRnSRKLJfNjqtPTt7lgTRVhO0r6TKmcJSZ9L0+F84sns +rSMKIq53maW/bSpimIBonMaNRae/iLS4Jsav4bvtVKmfPcQoiov4xlg4uI9okv7/hXkPbrIXWJ3u +uhcONF2XXSrDQzp/NlZdNAuKuzbxg4Aoi/UoLJOryDedBT8HCM6MLjl7NESNoYYqwi202KuaGc2p +pTHBEcPClhK26kbuEs80s0KRRfcOMbtE8iDAHY1pA3GmPEUc0yIgdqC5nHxZKvXLuIyN3vSo23Yl +svxprDzLFpoN7GQTcPS4/XVgV3abM4sjWmOWqIxDK9IhTM4aEuYowA+6skdYgDNvFTFs4nKVtYfS +QxDp5bL7ew0vyPmRkvF5dsey0EgvzrKIbmPcrMlfzHzq/Ll6337z+RKRR56gQzkdte307e7Qduyi +6PX+AHb9POICZcDr7wkdtFB5qaLJngBVreFjBxPNQ78t6ZXifOC2CyzBG9xFuHpP2Hk1D8c6rLF5 +foZzxDNda/A4P5fc7uoP0MT7Kcn2Wq7+q33YmDQJrIlo2zxzNKwfzHJ9rkSqe2pjA8qf8DDwbRyS +j7v40MA5uVvZz6CiqCZ4ZKGx6mo4Vp/OA2RHBvQhHUQil0SifIeTC98A+JPSLC6/sDu4Ej6N344B +EaP2F5+Vh7VYoDmw/3XFCxD2wA/YuS7n4wwWBBeOs/n+BMV/iRvbmQE8o+KBYrYMrhSTnc/7ZfJl +ufM0jNLxTIiqRfOydIZIC54AG84hUFbe0Q884UaNP+7wQkhS3QiL3NFnSSZEx5+J8EpMMIU9TcXp +EKO0zPQj9gD7jKtonpSbD71fqCqElhngoijeAVAmFCw+O7xaSaC7G834gMlgdRSZGY5qpeKyJh1E +8DLgAhdtptnWXs7Sp9UnPsYxWVI7US4ceIyHy30HCN/xGiG0tPuyU7H4Eve/IRtnJm4vtLkBslU4 +KWZoXfQ6U9BusienGLQXO/M8cJCvE/YHKFx2EjVyRoWiTmJoZJT2cYEjmqo26bCBVl3esqxihC9A +S4v8BNMwEANookiwd9H2oMB8aMK7HGfYPQ5Q3iCTTx3KVAOrxwl5/L5a2dmwsalzSIS4kyfxFcMo +cYHlLCH3EztYt+jJskQyy+dvdCJuVISp/oEJjB/x2SplDgXUtuQL8Qd1LfsbSYjxXH9KdP/yc1vu ++p+F/KV6yFc5DR2+YoQ402H7A/s7PDe72CxmIBLD02IrIEwDe5pENNqZDbON1jFLbDBsvcPEdkCW +mZjaud/GnJuwmdR/L4DusIRK6EdVu2n9IaczABqatLOdqRF3lm33dfxO9TDiIPGnd5XkEgXWyB5b +nufQWozyJ4qBzIe1ubDS+tT2V8E56i8fok+1tJQ+R+kwhAjbXNeysHAlgkRRzuILe48L8CNDWDgC +FpJJvq8WVrEv/8VYUrldk2x9F9kYzBmyl3nb5CQpPFpf5ah6qBRNHqsekU32FfekTpVUfQWFc44M +P5+cWQ5ZYqWvcJh+kXQCHaEk9Eq94z2MlnR9XLgY3Z+KTqd1aFYuWxq3MUbh8eZWyI4OvCthMWoL +rcSCp4ZMFpz52w+CAZc9LkfbOvDLH2DYrto6rDmJr/jkTJ4Sk7kNevo0gJYd727jITwQhnBPc3Qd +S5dqBtlYZzjxBb2RubBn2sKjudJySmPFCKDxcnVkaPbs/Y3ZSYygHP/S26GjfpombBlm/FbDvlFc +xCcmPRaSrrYWBfvg4PdwV0Eoqk0LLZnf6s2WInC0y8+4zw3NnZzlq/BQVGWl4lTDhJHvn9FkgXba +lcAj22S/MLi3IEt71cp0+y1z9HTaMdEGz1eOehJK3Mqx1yr5XmM3YkVYlpM7ElGvV4c/INLaOFdL +eWBZJ61A7pzOIjBd5SN/tiC8T7oWlXfNLvCj+WtCuqS+JXexIWz4vu3ptOvm8Wk1yJrZtt3bWKR1 +9AHc0kCQWlbwK3gTqrr0ZW/L7h+HzN8pheP34GksWVaIGblwwyooYaoO22zpH+d+TmDXnDy2/b9d +W1bIzFGR48+6dvUJrljpkh2SwFvXMx7ntrHwXRiCYfpS7WH1DQ2K0hD0D0cr7nb2KVHp53pxv9WP +DukNdz2qTbHeLry8yoHvEHAsTu0QKSa13tEpoyFTHVc28/+gOR3IP9Zc6eXEicLlXM4KM8Wb/9Pj +53Kw/2OAZ1nSwdR8kSEtwxt/1grZGZ/Ey6kwgFmNf3/Gqvq5EErcneSCDzaoXg3Qb2ANoJHmOZ4n +TPypdKnAkrG8/0fFks1XEGoWAeTb5r0WsRiopjNpB3oEpUAwJlC4N3adQVSQMKIxoo4CI4BSfZlI +4jKOUzgTDPk+2jm/8kuZTNHrSKtvkFcjlX6CeiwmlLjAIsTb5jLkX3Dih5HtLFoIESTVcTlIJawH +mfseHc+jpiCqCnF2y/awiYJkoVERT3GP9gByeJljiLj2VqLabGTp0as30EgIoljfNHLqprM9dZGs +10zUa/lKDSNPT1KxFF7kXAJ5wR27fV/fpOi2BKAhkWrEH2m95eUUTM+oM/iw/E+uspdt3n8XeXfz +W859P5laHOzm7XiLKpv5yiub6pJHDI4wtmkLsrVkSK0TXrjg4HXsHyPSPFZt45prhaQJ3Fdh4rhB +wRoz3Z8Xw5f2GgBf+khsjJ+tCWJ92k4AfoOq5JXmhX226fD8TyKZyFIZqgGbAXV+S92GgjfMhy2Y +LCLzpLivrlinvsW2RFb/W+guZDD0joJudXyNJ4U4KXwU68xxZyXaqOGuy5cGxJdip8GxJI7CXBfc +1TrBBwJ3fYV9f9olkQQLZoFBxAMtZKQcM7D9OAcXDQFq3H0b+czcgW8fKsqhuB7kTEgos4AgpadS +WosMGKPRGwrnVj4APRBLlFr+FH56GwHT62KEFLLr/sgTJJNiHVYv9iAl0tA8Vs0HOhKCb+EkYgCf +sT9XLQKDTbJlTQ8Rw6UpkGaEt60ZVv2RYzzc3tXQvMUq3+18ZePPadpuN9QS2r7P00BfT0vtGqA3 +49jKYLMba1X+3NnK9kqGNQw+eqYP9oyPyaGkY9wfLKD0jjXGHxX6D/IreHWh3kskC0JXIJohOHcN +ON+cYpZCePrFYgXNnaNowWwwfDJZK8gylp1o+9Orj3na5TgOY21rftkmJ6lftJaCkbDuLTA4xl04 +2CaBdRrCERVOHy/lCwCPuAoXTF0ZR5sthOX6AEYDZC6w1N6E4rDBxGwjqhQMjgHWOcUTbdInN/Ez +PxkKEdN0RUXyI3kCvWXjgES/r9BpNiUMB7IHavlj1EoO0ifTnm0uQ3lKfcbSKmIxFHWwX793+uLA +W1FMyvV396J/I/EJH+wkNxgQKpuRM8PwNAuNwW0DMKoKjl1lqfgI2SWBXZDULnsy0kgfAgVfWlK0 +DLQPH8Gv8m3HZMGjABXwBfidr8J543e1CYTnizaL/IXruYqGw2iM/oyntjh3KTgRivJFwnr/8DuS +jC0Ismc+jDVV1ADB5AcfwIrF2UBjTjIMwlEyccP1/WfJWqLTzhxrb5YZEFgls2T3V6Mrg+huNd/o +WRDM7ip+roIvo+neudfg8tsW/sRjl9sEZpfZesmLc/ppG1/1fBu2zny7zHcErE+s+2g2BcYbgr4Q +dD+a6waPDkp2d5iHuxMKj++L9RmXLwK/YnldF1ZB/Hb0gBREUKyu9dZCUVR/oTW0kqiFnPXbbwdS +GzjawTS7hYMyzBHS66eg2jT4QL3D49XGay6dVSZic0KZ932dP9f8wXVU90GjhIKhVJ1z4AaiS88+ +2lqZ36UT9rZoTo9VBHEbNzrBXcrt0aO6xjiq2AoSxsV7osuemmBZAIcyKSnBx58A6Sgp/mZL4q9F +z0BS2JRnOxFEaOwhJp1uPhHsFAWtUqHZV1GxQ8e+v2ByBYPfHKfPQLaOv5pc7/ZR1NIKtvVTbFEj ++8k52QDwlcp15ZD5EMs7nwfs7QldF73nm53ikxqBpKC9nC10jB2JIzQubUzgXglc5oXKf0vJO+cd +Sil+d3GPkNfLL/uOuPHWzXvRcvsL7FSEtFxiHYUTy2Lfm0gfcg2CShSza4VwJuh/TlW0SdiMIFiM +OfKeiKepdZD6bYfiOZEXulnPZMkWjl+wLoeUtJFqcpUqrJuLF5LrQguC6K+1GGG9EUB6nCkpbDWc +HHA5bpiXnmlzIR+MUxSNowIOCxMWHh7T0WjyGNPojzB4fEJql2orA09C7lsaFoQq+GyFu6A/9g4m +FwkinMdaQiLV0/QC1nefUrCPrCY93BQxyyqUmM8EaXyX73IPIEGHEMP4gTPkqyaCihPtHjbapb/w +V4QOMj1rufFHKi7laaadtmqETVA6ndCmPu6o5xCpdOpgzqYd06k2xnyEyJ7asMbCkdqfDjPCcuKi +Pn6EX/5kQ3KwQB+PX/WnB5Ca6BmDUZORyvra+1No09n1wmADPeAqLsUYREfLJor6WqOF65Z9tlb0 +f6ZKjz7srmyiZNToNp3eFYyZj9qNPS8cLOxxRiwKd66ikOHM+OZMufgwPPZWBv9gg2LC+X4ijcEi +//u+aLU4mEOfYtg3Zu6Zl+H7tghUbWiOIt5a6PFy5uaLLy7mFbpGfns4oq7VYh/6bf/K3BoUovCr +HiFshl4wKtPrxzW6D3+f3zoX8e5nFVjuXCgHUNV4djboxcqWbx95qBP4HSsSf+4xAc6uInuJUfqk +diI2v7QMRLa+j4Nu0cbs3uAPP6fVvYk6evMbwdPP9ci5xeQuQO9aKk/Qbz7oiJpP4OiduQdUU6gy +PjRuxIiFccgaPyC+QDW/7k3jtPQJl+kjUv1Lqa6UtmHi8vRWDCj/AWuwvxaDTekT0011wfiFm8wN +YfJYm4kB04SX/s9T/llSgoLBoaKChyoncIiAdmzMwH8Y8tE3xuMWrhU1tEishCAcbcjcg6470z3b +5RH8XHmDeMoazxzsBqRy2JSKoQ3xX/LWMo17EVcypog6f8z3SknuzJapd4ZuIJcUZG2h37aQqAiT +NIKWlyBSUM4uriBE5Tky58lg9zqxAYrRGnonfdWA5Dik2bOL4uJ2csdvkdmErJllbqh2RffhExto +7dFb5ADMlioxc5GtKcYlaqiPg1GpTgoKgX1qrkqytOu+IwpBM1NhoJ0CIW5bUUp677o8qOiYTdhe +lALIvaG6ow57IEDDi+cxRu478CKmGY7KB8xWV87lLFHs2FrEAawMmxdyJtFaWbortZWoto3oNcIn +Lr45DA6KXfFak1/VX6QfQqkae8DElHTeXX1bCpNRzOAG5yNnB7XdIw3BmjaASNZjrRlKJ4o9lls3 +Yi4x9chSKpTGw2Ihfsff8vcjU1mVn/JQrb3azcrouT71QYd5u8GwWIRElGdF6ZGCCHQxVVv+Ra6b +qs3EphDgh5SqcLcxFfrfXyEhiSDN85pOq1p8ZBAWNujFXTMJ8Xt5S62f02BLPYN2XUvCpqB3m/Dd ++NHMo2slXYdLrDmCCzFiEMZ/9m3d7EJa6Ilp4ZGLj1RAg90/F4JIMlx1r+zZ0d6K3NrHakdCI4La +tJJDhMhA5NoEAZL4ghyiEy/D3cwHxwI3dhYVwjYhsdZGfQbgJdvt5fZirPixmyBN00nwFvbgOmCq +0LjovfgIGMdedF3whEJZHFJz4JKp1uDmdQfyTElW9HaHZZ+2RoqTRnib4B/rVdhDTHzzLRxGccU1 +fE+56APrB18nFb1ls9jh5Bjlbebg2CFV7iIx/MlvBXTVbr8reihNJrRPISuuEZTZEgITZYwFN610 +eSepBcgvjL2qdB6wxKFqwpSFVi1nXh76iZZioXBIQOw3iHaAXTarCx9yRgF53+D2CtNkgCulBhE/ +cz2Dk8ydSxSZAN1GHm7luJmV+IQ4oZ6C3OVvK2ealIL8aSE6cZ1uAj2B49Z2IzECqtxMpnzMbBRW +GEDHCcF+0NFMtUD18XHsGokq9ARuLkaaQyDVM3zHC2DS8ePgo4KEqWIlL2lYQ/7OF7rHYsscKxVN +miTsihgZSycyGyEvaOfQ2dDE5lqZHzzRpRIlj0gWwNkjFImDFBmQMOBEroFA3es6qyptPhYl9poF +fO6D6pYKpL4q4k3u96XlTH8jwOjVpSseNSYE1keXLAQnz1AJh7sMQMETD8pmfqcDE8n/+FePp+re +VIlmecADtWUZk+KsWN+RR/WGGPsOZzBBoAv8r0Qj6Egoa5IiZw5N5uIgpt9Hcm5VRJmSc7XKAcFm +L+z7NUq5uG3EH91rx/NtHCgHu3Gr+yLH5OPgDTxZombM8WzgeaGK8D6ooSw/2LkAcZbSY7iGyjXx +YMR+PnWX6HTKlbcNxfDdwvLWdNGjgHJMhpMnif5fozQMf8sQu7fVPo35z89aTYjcs9zf8Di30HK0 +0lWWwkgPTvYUSBDrHz0XMxvruO7u3SuR9XcFkH8w+/2hVv3+TSlhXXGW27uAMNvNrHkZ4uaSIgST +XnZQN5OHQ7wZGUyks8HvyZvdVFDWp0PqGvjBq54QgSxHjSUlB0oWBO3/+Czh30kKbaZmcSZkX17E +rBqgfAMeYDv8vCwwkOxvYT9+k7k8lbH2zJB+6CdosXKmYfVVCtssTSENwP2/0/gwYnjgz4X+nSOZ +ZbiLuWEQLp+1g3pMgGTEyxa0iAM7rWicorR/MJCzVN/0TCxbq/jCt5uoaDNiD8qRU9X6Oq/g0+9u +HGC/ambur46EYyTtdXWSpnZn9/hMaWBpb/hSY9BtbvdUX8MpWmvmeL8oyu/fQRlpnXAC6ffPaWMk +x+x4stXSjvbw220p0b8eljw5A+sxhSw+mHsqT17idoF/7W53+6sGasCDYzI7YviKVDEJv/0tj6lE +fDy4icyXWKzFVFc+Ex9gFRDs0sVVPNcuY4ETNS4kmCgDvpQaCiA/Z+fz6Y1/1KNKavSdE9GSYjfC +VOFUADuaKxcp8g0cWkz3kfnEA3SYwHT59biaa41r/3VV94QxZ1zqDmFEkG+Rg4Tn659s00vHomIp +XJjm3NYVVmti49B/Gdhj0IDUk9Cg6kb02W1wle3R6/gB3qW4rUX0VgCAcvXjOrBc16v6X1rc3b68 +OoKLqH6p2zkSB5NfKO8xjlS9ckax3HYHgUQA59vcYGoGXkAjRXrbcjUGayZvFcs+rCEWutW9yNTa +6JooNHisPvhmC68mGjIbRzC6ypb+2hYT3iLYgO41Brf76TkIygtm0RZPubeJ7Pj7FlNR8hpPOEZ8 +7CXAq3OiKTs8FsMXQimdypHEcHGXn0EiVNigT9adRF7aw/sJK7z7E9Fiff5JS/O5YqpB1Qwq/CfQ +lelXEJIGW+53xdtfmtpxKQOzhdy8OCcPkWMLquXkqZVOu61CD5Zet03A8cFLARHM+zmlQbs29HK7 +OnionWol1QLnFqoKmSycWM/LQasUMrayHf3cjd6eCEgTzypDxdKuGQKyT5kggfvW/b7HdxW/DOny +YihxueJYV7UOPO9fYml6qHWz3IyhgQWY0k3MzIiDvHvpmt0Nl8ZGcaiOjBa8GkVt6/+TkEhAHcTJ +Idq47jHEkE42na6R8Ggqq55Z/b5UIU9FjN1hXQ6PlENKLsBSpY8cwlDJAnLSwbejCVXMikFnO7sr +Fbg3/RHfkmK6I+1lv5bvSOxSKcxCcgtRcXVFldvyaATkrcIp/uUi/aMo7lAgMFVYUhSGYBozTq4C +iffYa1AIISfDvjmcyb55bMiRA7DZSTjGTd0VHFvgK3s3QSuZKTRcjOuj5PJ1in+FWXLPSxpNE9pM +PVnba8oDuhkVqYrRTW4egR6540x5/eYHylyRyF1GZFOoCnlRHbyHdq8E9Icbf8KYYVdJh7A2bEA2 +tdNGTgG7zqWVVfNUd6DiC3WBdImZ825GHRqVTq3I8rrObQ7SQeojG/qlPQh7GXawRoiZHvOH1DxS +JU0PvfYFzOqhbFqVV4RIRpnW2y4IEvPe7kZYIXX6Z5mGEXuXiulH9gcfqD5JX4JIlsdNwKiTvrBl +6tdmq5cIKWsgr01XFWDd6V5yZGAmKkFKrfAI8RLcYAxnxaY16KUhdt8FjCk4spAtJXFzdn4c1UiR +uNHyLOtj3fG26X83s1j3zKUOo84Y12NUs2RwO1Fxc3V+qoMVosX4KhMajz4MevlmW7TzaZtgMKul +Gd+YqD6LAHewAzu57WvmRq+ROsq71BdLLfw8gqJKOMtdi8E71ohbofUqo+Wjg49uzsFeWWmSiqeD +Fis5RymPur4E7E87WcRtAbUiY+UMh1HtOzU/wM0QT/VYH2pIHQy1zV2ekxu5huKMGM6hYRKMGYA3 +SOc5Aaj8r74EBcuVxIbrG/l5xy0fcAjnntJZ/7IV5sNj8xUJY0Ahz7C042jM/8rQec3euDelYOGe +O7sHaVqTIOzuzo5TErgOUGlF0EmjWmDDZ+YMB3UVnwZgAmlkeQb5OHry7z8uVN3CLCfMa2wWSzs5 +IyCrLBoWwHW0mATVlXyhpRtSU3uBaJA0DDLLPorxczq1Fl+iY969aS41wYXnyDH05o9NyypTuJM1 +xyb1dvg5ghAm0FaeT794SP9RqU7JRRF/8HKsEMhcJgiqvVEHWVaCWnEuci7f4vJaH5AjTWnb87di +Ylzfo0qnNg5SKXLc5hAq3zfKHggC9QuZz/gNNM3E40bu59koSAjrBX00YjFt8yu/eB68OcXvwqvz +5TZbY04Q6+OFThlaKJAvpk6rCkJnXqohoey16mH90+6UknTw6m3DRKULwVrVeA7v99W8ZVwbOTwz +D5Y2SKg2CkFfhffYZ7Q2BpgdJ/A7M3pE3g0f+pF9IuY3bRS3dXprzuSzVz18fA7CTV3GLpUlANDW +0S+Z10K/pLi8R65XQvpRt7QB+c7IOVCXFJxX/IIa4Im/4uHb8M6N9uOEqtKVfEbl6RGyIa9DdZxc +TKwS5BMMLf4kHVJR8g9SN/jufZRCgkxYRZnTcC18dAcyGqIPhbIqb5hdrdSIvpA6XnHvFH/EOqBU +kVPQ2OuvMJJIojZhR4M8rpaUSc3Y7r9pyzId9m1nn1oyVv9wiVTSrsJy2IDRNnif3YB5tQYbD06x +XS/nx1kM9vS/2V3yRR+x7Q4VIOBsPlePMRJZlbBpEuthONflBG7qqm0eL7xM5fRolOt9b1wXpIzR +oLkdf3vRY5TBRpr4JXCsHth7RwSp9VwC+eJKEb4OZ2ATsA1A084zGgUVEf5vua41hSKPryuVqLgW +t2RogFuuv7OEZuKVIQTn5UwNe4KqHYnf+oi1uh4cdAWcbHaGcE9epv0tw70ha9j0A9ikpAJOUeFs +55I86muiEkWN6DzpYIzh0LZ7z7FGitgB4i/8pSmoPnhzBxVyC4p9vfiNgUtvdJCSFe+BRaHcMb/I +gH5G5MzzmkwYcNX3DyxQvyTOYSCuotfCjwCFc+2ury9QliCsLOdUXcYMSCGC+Qw5IX+W21wy0eo1 +f0V5TijVGMOIOBzYePMWBN8lJgVMxKpNh4U6FaVHBrxA+Am1GJhDmTZIErw/QntYmO9fWtLkzDyM +Ov7z1vejqY+K7m09XXk2espBsuD6XL2iHo7QjLhuTkKGCGcszD+sBmsZPWdwYdoar5F4NEmNFL5+ +xfqe4ry9k4v7aNhadU3F8aK8x+Se2/sNeA5+jl5r1jkd5mmxPQDw2roMlnDbdofazDmJl3nCtyHa +NQSs05MNIh4AUJdeZDa6VjxaxZpb3MflhYxw5e9QMNvUHXUr0gsWIqf4y8DnDaRiVoPRvW4T8he9 +nyYDfLLDwjfE90nxtH8je58MeRvLAgwMl2EkF/wHfnlccuhK3ngxmWwPj5O0/TbAXaQnZd9OWgZC +eJ16hoCP3JUQXijc6JgcUzRIQNxaIQ4QxBIOEUYnwiWw5FbWMXVTjtLXnESaYn062VQHEpD3t1xU +neAjEVJkssRg1lNyx7FiAMqVfH665Y8sXk9SxbdLrELvgW+tgQxPpThvUvtP/B9zt7dRVWbWq0yf +Zmm9+ybKpm83O1Jm2qS+ZhV0NHcvi7bzErDISr5kMBjCMaczQtPckDjmxL5Lzo1ndEYNhxqbIhw6 +3IH8mEtIzlfMyAL54GZqrWetDoH7EfNBypK4gR08TUidXlh5URB6d5RIFw6i1/X44um/zAIxqcPx +CJmgnFwoaTpdlkp3zP3fEfhTIDFPG27ichK/Gr4/ceBmnvNx+9NizPbO9vKVT62X1D/3er7eBxAF +RVEIMKoZM+UO0bwkoYUE6Ct0p3DKXI+TyqkE/RxsB1aC2vSzcyQG/fneFTZHqDU0jKBieA746UUp +koa4uMevv1S8wIZKvIiPnLDsbAntDCNcmwS8W7agKDKXNLFSauSrrvE6nCoICmBjIW3cWUFyx1gb +K/nVbo8z7sAcUhHLkpm7x7dcm47H8V29gbiVehURPxtxu65YgSd1uvQxcDNWcDEuNtOgn33RF7XU +v8yGhnp427WRh3Hvou8icA+XGR1V4I9+w0QoXskihOJ1sK1zmiJEp+m8H2x9GHXkfIABYCX+KPak +fmNu/FeuOMPa+epY2O4He0ayLBRiLDRMY6+QJpgCAIZjJvdtOvdYhFkphvsVuTtyVpjQoqhNrojf +l3k3IgCSni36Rfx5SfxBckHHWeNNTc4caq3vw1GxI8jrIYfu7NIFyj2c+dQN2unx2xk2yyQGfLTI +EaZH3E0P0oXvBq3yUGXlt4AbI07TW2ufPRfNy0kO31uGXLIRkOaQ8UtKIOzNJZ3sTMerxelr/U7+ +UPlUzSMMDJfgJ6bzwrBX8i87OmCDjKDvEqpbZWU1j2pDRcvLS7eZlDWsgKIPltEYdVYYpvX4cPfi +Hv7gFUlJiJDftEle/Wh6tLyGGl8wzFWCltgLVcHtQuro0FoRulpghm0TpuLtRZrPXL+/FOx2I0Q5 +9Hq0hSKNxRzU5j6bDFXk5wHoi+TeE4m6jqtiwcznPLnxOZYoFtaKTk9QsEjQ2B4pX+iCdUv3w8ic +vSRdbZ8Rh9u2yctm7IASy+DE0YwlghdlvJASFxZnzLI8W54v3j/9vGKEoNs2FL4l2LrUzZJhAOlK +e7QXILKew08pqghIrUSUNccXC2oxb/4LzDqaB4DSnoY4hC7xvHzn7ob3pt0I28Er8UcvJ1ewhFYc +6XA3wbOEXUpDPCyEdm7+A9t1UytJmYKvspaXSiZ9Gbpm9vJqS8oMJ79w6MuQ1OsnOIlqtfbiU8sH +bzjttrgbIAIty1LRm9myfRFnOJsaMm0+Bx9Ffqid/+cp9a64KEm1VWfIr1cKTI3y2zhTMKiNQBmT +ynw3kuXH3RC7x9NPedhRpt3auTgkG06vtPTkcRmN8rXhD30pr5NciBCaeHwm84DZlAAkTfSNCINr +yYBnhiMcyerTQJ2EWSyNBVEbmoi97d4Fxf4bQCp/5Fmxz0BxLWkGEb5QxTSyBiar/tQ9LHao4Jcz +x6WV0zxb6TzkqwyUGCsOo+JcqCl1sC4u62fFgBn//m1y1tX4NbJ9+o2epXGcSw3jxxQsj/XmVQ/z +a/lvzSxTyTJyPoNr9HhNJDeovnD0f+nDJ58i4AriUNILTBJjgpZWLM3reppY3a34EF0AD0B2rGoC +EO2jIr/KxtwfFr/bfDCMWbd1t9v/v1uMv3qVs6LnyQ05zl/x3df9kVYxTsHkvPubyJqw33R2C6yz +Ma8Sh5Fmpjq/rb00/mcJ3k3U03D6IcnXZDx9fIJJq9EBpdVTxty3ncEliOYQulVnPj66QY89b8T/ +JqdDxFaCKVxS702KklwoU+fJ7n0bRgJ4jh4O7G/lj4E7ZvQs9cagMGw9ycwWh0dnpX1kUeqWlkcR +oac8EUgVpeMeeRVHCcZvrkob07zRaTRveOSUQmIMowcaiXD/Nb+9uRXmZaI5p4Jp0jf+nXkOsFBY +je1M6Ftb1AgzaiBsNMVdmwXh3E7tJhR255rulIR0TgiHgDEyTVYLTGXTLX7WC2huBHG82P9yWkC5 +rk2M+W02Q/LrRyi3u6v2dna9dhVyX1KdM1NqWcDmelLKkZNrU3lV5r/C32iEAnCOpXNHjnJhW+wF +DePaANQqv6My5MQs722tPXMvfvilzGjSSKqnUAtJvj4b3vOxNhX9GgswpOB9VNWVLcDSrK6DY3Oq +udnRjoSwC4cUH92VcijgtZTLc+RsIcPpvkh3WHQPtEjrmu7I8/K+/cRg9/boJvNSkkObyLh8e80H +P3VpPOT/2QUJdcW7NvEHtpcx0zsqpTPBE5Q4KUys86ylDHyrqKac47loBr9/NfX2Tp9Qar55Yb1t +UUuHgSy4cLuFuuy0JL+8Wv3GTvShADuWmWo575e39hMmwYrgaSoYAylSFVz2iFktBhBEYd1kdMhr +nqawDgkzUYIT1pd/Dd3hkDC5diLrH82nNEST7K4QKr7ghy63E97358E5e0kX5yNuqm9CYQK9bOrQ +2bq4k5jl1w/KN3gnBSpNjCu5cWB3It0L1k42sLUn8meA6q1GxaKHmr5XAjXnd9XriT2UaD4OODQl +lBx/dP41pt4WmiSyg6A3NBbXGbBye3/LrNq5hvN5un8dRGXoZ9i3IMDWpkt6+qzFh/4sOGdt0srg +PU+Lyfpk6SYakFQLxu+qFCsv15ZjhgUgyvP6IDk3/Jq8INcax8m0I1MDLRSYBVCb+rXzjhH3d1fT +SDrvqGGk28WDUV8Na2IEnpyBFNX6djDa8JUGSIJDx1MJjsH5pagPSuO0n4d3hLpA5ZSYkS4b0aip +9jaTzqPB3c9zIY0rB39OLJ617qZ0QIBHYzsrub408ZeU6Ic2XHjR7Cdyt4ynT0MCs29DVuK21Gvx +L2YPIDE1A+fL/GbJ8cVbwernLy53hw3Yib7YhVvU6j8C/1y2UessoUDu9HDd0tlLbbLPDVrD4myJ +60wMl1oXVuwbO3MDTvazvjxkqtX97tgEwyJW5K8m2i5PJ57M6JzX8/7KPbO5qkMu7GyfbaD+GP2b +9+bs0rNzGPHpDSA67OyhAqiMfuN1fLqi7Y+eTr8sTHUsF3wR+kBBZyl8cniUcoNHY3oirlEPCen6 +jqGWucU0Kv6DryAMw68iuzep5l1nENodx/uT0VJlX6juSp/q29wrg/b2TTS3l+m2Y7W3vvGI1US+ +DyRxPCAxHnrdg/HGO8Kw1JvtsHv6Tk1/SH4TR7tpUB1OANA85D5x2fln68hjtdqeG7PIIcafnTTD +g1W4HRw38O9au3tAj25lb90eLvqt/Wq3IBzJEc/upfjcXcxZiV0Vpso7oB2Iku71Q1fRiFizDn7J +PVsGfbkYm6RL27Uy1vNch96KFN2bSup/iTQz9jnIkAxmJOLqxZbmDBU+1qwyncC0KxzSb1DGpLY9 ++5+RMh24wkXWm2c2ZWdRDN0FSbG4a9970bGQEAQrBnR2gMxZCZdiYsavaZoxCd+jY9Xp6HSg3MCv +MliqfdyP9T7OaQAyYZ5mSb3yZ1kphQOyb4zB7V+5RHSY85VOBW76yQQ7EoL+J93yEtBK9sSC2Abg +SVruNhRxpG8bzAvJouYdhclhElMRWWT+JqqUyfex3YsVcBJD1xONVZ4JggHpISmJzZnQgmEuuMnH +nLlZSgm2OExCMimYsT060O1C2+02NIro/Cgtvvt31Ir9JqtsJ9GUWKDz5pi1BMPrfWgS0dUNFls8 +N8xujEqvWs6jOGCZIfNy1u2OgpZgRPzDADjlD2GoG6CVSNm0UHivPCINKSAusV5K5jB5wbrtyCMp +GHSIwrETQ7ZYiOUnRy+jkTvoC+clh9r2TP02AkDJnYPF2yDgzxTX+D7h0/dUyevt6+hyOrU8k0Dl +89q4GBIjKk/m5p39D+9eDKcV88p08ogNNI5WJf1J3zRcIOU24EMFr0p4SNyq+YQopzMYMrXYFPhB +JLHiYRUoDLwxKAFek6Pn6KJsDgAP82fOnORnWb754Afig+C09TprIssg3JKs841+1ibE5JHD2Pko +FpXC1cvdXzoAssdufeYhSTT6orvwUXmCJAtwqf3/lRijEiKWIMNNap2hQ4amyYqb+ZrIZtPOatgd +K49aX/Vxc5b9PPQQDzTLvgJ57e5CtYq5q42/ifZeDYkcstkhYN062MtPwLupFPDyNulBRBXyaEIS +A93ZpjqczJSagIxB444EcJOfls+jkgbqmSEolPADaXWShD9vhHktkegSOSCjM5RaEdARvOxSTpJV +PI/G2VZ/7+7jYs+gEIBL1GQ4p91hkgGWyQHTIouQAnmDV3lAjf1wdE9je4a5V0RNfKwT0Ev6eLPb +LXWtoWAnoGcwhAho+JgztxIG6/UrVP0Vdob0D8bvQD/6rEmojix51K+GLC0f1tNoMtkkxPK7isJt +M+bGDpiKgagIc3YN3aquT7D46AVlyNMYR/Pb3kMNI7ZRz5Lm+t0jvioyMZK6THqTDIBpa3e6hpif +XPmP8MA2GQkYErwLaTafYnVewraUF9dxBNMg+VC8otHTPN0Gbw3/dTC/cL67zfKalq7U7xOdc6+2 +P7BtjHVipnI4OKrOlWkst5+xDTTSN/tlSxjHCuxAqOqZqhkZSfWraCY53OzxxB3tzIAizbKMXah5 +HwsNwjDZucJN6LcVssDkN+1jJxQFp39OVRRkATKjkWVRRb6/5zB+ksfHO5wTNXrIgD5IdPRlO8Zp +mRiyJENN2kEJgzPtTbUFBrDEtDGkrmY4+b5ZCIX/XE5ac+E05ZwABPKrICUcDqNUGM5K0C2ntHQq +Fmu2LJd5z+qdcAPxk2nw2MKOgCPqP2afRO5Oaeih2U4GfIDZ2hEs08W/goAokDEwQngG/8thoN/S +48aG4nMYYpHhQNRdBJNqaESOqvVHzbs/F4h2Uer055JAkqSg94CqQTv0Em2pML1ywI1Y3MExJDZa +W5rxGQtjJDRleic88rUJg9iBrY9jQK6eWVp5B/nX9DZtxI9AkA6ZIESY09GoV9WwQD+tLH5zAvrP +vxzASUulSw2hyAbS8ulJWrG4KKwCbuaObN8oO/LaYWXNCiSGK3xHQm78zE7Htv7xHb5bUhpLe02o +vE4bGYE38Q6QWQu3t0DUPFOpZ3iu1co/+tT8Ke39Ks9OPE9px2vKn1BhNr/x2K8XaxdppJr/NquQ +OzyhZ38GeObcpP/Kq3Zyrj5ykKDXPZYhIL5rUkYjwX/VXxYkhaGZy8nIPeHbqvb97qz2iqZWxDrt +j1A8yCejaWhQolQDS9WzEW21+UREL9jkSn+CmIL6MdQgpLtXzPn33b3wkN5p/6WpdLEKnKVddXtP +po82+Nd+brmFCRP+P1ZuplJvbyDH/VrE54n0dfucyTO4hkIqJQ/Odc41kHgESyqN8Dlyw/OuIXfy +oYGYT44/shhEL9eKpd+iS9xi3aV0FVNLKuJ891kz49Pfbtk/FsAkPgb+wrcjOQd4Xw+N3t6ugxTY +6A6tvTCrxWcVe5BW9YtfVv027xWKaDqjMDfVDvcai8zTjIAZDI/Coli1v+rBef/ZyFgAY7HHOlgy +NQEmy3SPEj7ErCl5EYq6iLe+HFKfWbBghQ4gGngPkyA7qq0uHk60ghnYnA1mL2971wBbcHQlPChH +JY4+pVkYD++CharXt0VeEujld2bw+cBqbM9UPQRxGd77w0VfNxWjiRMLFkR+ZGouCHULLfR3m7G+ +1Y6xlqLKnBnYVFksZuXE9uDEVh4RxVatju1y5E1HOi5lVwIoCvTeDrpduQsGqJWKGst2HjWx+EUM ++qGm7L2yfLITKvEex+Qd3KRFTAG1pMx5a1GzI00f5kcCh+jO0iWTF9oiU093khn7VxhvQ41RCI9R +G2a3hKoJ/DpEgdRNVuxRIh6mH4sizgO1NznR4WxURs5r9aRwrKuaJL4dXHpP96lVnK70u2coDYqG +LfOcgUD58q1EorKSsdH/Oi2I+RAfnRoNlwfX2s3ozZiZHxeXpkq4yUTUJN/HcPvD5fuar/QIJJmc +jJMbwlEBoBq5veFLeW4H8Gofi7HDerSVHlWyIWslhyixOKEf7Jm7S6/YALMawq6XF0+Txdvq5lyw +MYv5fEqunPsNCslTxNqZxf1CbiPYtxdcuqrzWKD6RUIy93sJnFBartWk2xEKA+lPRJimFLfaatHM +R4HtelILcH+mWmkZbFHtOe+6dckb4hHMuX5/OiYJeE7uhYFLMkF8koOccIzRCL3brZXeLkEoNYZL +8xS07eI3dNeNAka+g+TaULA/JzPhGvDZgnnO6QEQnvLhvZnJCsOeFlsKMqvMnA9OUUtRM07nKdc0 +hzcan6I/qkvsg9oKSE0hto8LImwVtgotqtgeG679MW9qBiFwv0Aqz5ZL18QQVS+P7+astXCA1eUo +xlcnJH47lGnBqnA40deHVZcensSK806Xb7qTHT4w3bOqFG+K1u+uQcW7j7tzBAeIYQBsnXTyEHGl +cVyvtEni3+FTahDU2n6fMSgw4d2cqZ+N0WQ6P7kRDGXiU7oVrUXbNek73XLSx0KbM2Ksq8rXBBh/ +e4lrNxu8XpCORYkAlazY5TxImWfj8soiQvxWLHeT2bjVX56n0unDDkgSOg4G2dgNAvEZiYQkOhfk +eraVLIhwF7VUh2HUQP7Q2YMMWC352Che2fRpdnekLnwyXIjahP7Fd9bv9VHuKcYpmQVmUVOxHn76 +eEEyBPjsm6sPxa+3u6wT2Jcpq9Qb4e0WH40Icb+o3K77mBwjdUfJj+gWJcD4QcXwI8gAL3qbhelj +BKDg2QDz3AvLqNIEbgwHOt6FLyp9sRfhhvIy361kt8lPj98DCSD+Z+xISjll2t4Ir81ufqiQO84V +LM3cR/v5mm74sHVu6fMlinwRyNedxCpgaXh/JUloXe0jfj0LMQtXDRTaojsXm0hI77NFwbD0nggn +UhnO6uTz29F4T7U7pcgSiHDig3d+JN2D1NUdrjclOTiD0tQbQxCA6c/+SSiyn038c+nwj3G1+viM +M8PmHTeGnip2ZEfjwQNBJgObiDWPLDZQTAV442GTwOivW2ug4EjP8lCACZvizMIcEdxz/s15/ZTf +vXdC/oHUFTbljtMQvBAkAK5fPRghQk7RY9q0fKwQyzJK8J5boIimO3i2dYtWVn4DHQcjtScPfd17 +ML1QP2Us/dI1x5oOmdprFBDyH3gX6ygR9XjHJaxUeFsqpPOcyVuklXck3u3ZmIrQaMhJLweTdI2N +fm/RyZb5eIaqk4nyw3O6jYw0VbmTFDuAnXcsHMpIcAcQ7blbDIgEMr4HK0swBFkFr6SCaM3qXNCP +Kwod5BiyLF/94RBm9lBGIfGgxOCLi9iA+PgPqb/Bot0y7HLKfgDhZHhqTeKK4sLwbmzgXZplSLZ/ +Cqx65CNAfaYEOewTjW7Xoc1IQO1+gG7TNhNQSC4WrglLdqEufyHBXv3pPGmi1O9cQhE1UJIcKkO8 +z7DmE7e/N+FXn05FJIZsnEEmFjVtjXoAaBik+KwwdSCagahnwV/4/wcsZWxbrTZOzHK2f6CeFcQQ +S54IIef9jzOOLO3HFlAq8aUDASeQZxelkYL5l+4SPWxPXovSfo82ZGTaZ7T0kurMkAZleDNDuvXo +4vhmRitgOUgHu+644kRUlwgldyxHssGqoWa1TudMVDaCxA5H7cWPWaEPqVGUxlGnfEJ7iw5KDqRr +hpOuHs80K/1qQXvq430f04gNQbyxK0Ren/8bnJ50OaRGvtZpncex/17rr/V5ydXTjqc0OHLT5YTK +3Dj0LaKrWosyFHE24trAD33I/PpY067G/PRMF4VBR3FdfwxEz5/sON5V+4RHiMmL6WxWwdCXTfQj +0kMQsTTWCktgssy7VbdfJ0jmcW0hweywOIIdqm2B/yiUHhbrvh1yChuzSXKKFPcK+zEEQGWA4ZjM +wUY++PYrGI0GefYuMOEf3tyFFLLNLf3PaXlU3NJGEqmbXi69QnZ2qu4EiLWQe2bjQ1bwHdjUuQGG +mbxVjxuMuOGLp9r87Oja3dlMGY/n/Xr1vpkwnwv4OX/uxjl5y+WH54w/NgaZ8VIs6K8D57ZK+sEc +Si5je2ScHeFOG6FqzSP3rW6WJz8IJ+c7HEmw9NyjLu5UXhoOluRj9/NruPfvj2/XRt6/VYTcYGN0 +pEc8z8M5+NtNZaWlrIu+8AgGgu5aD4aZKQXwUeAVrvLH4PYPvL6/nLPyFV0lTa9GFCh6WLFugoBX +lDHe81unOeQlJfkGqOTbdqt15BOQyl7FuRerhYpf/f0SSVbR3P9yqRR7FcsCBW22ib3l1qt82ibX +S42Z62w2vHKeqxkU5rDXNoCGAQeVNMMIPH65PfE5fK97nDpVDwzX4sfT+laeg7fWqbjBwe87Pb6e +TRFHAMY9BDO0ktWlfzjDTMLxOS49yP8koEZaiIT+S4F0YVTimQoviqQ0ZfOx/2Zdr0JpcskAOYpw +1IGKloxTN++WbxFcwCJ+RgyU6Iu8l04Jb1cyLExL3MAaiOZxdkWspfvy9CC9Jbrj6sUHgmLzWMF/ +Po1NGJTYTlh2Wj9q/U9ssX+r2LrWe0Zjr2QF3b0zPmZMjYXnECTUJn/Yi5+v3yAyaeLHRq5q31U3 +WY1cI68iAGcuOjbDV5k7bqhXceXwLADhHQjCILwejRjXs0hgFtvHV1WUJlMnTwZxqofTKajvsIsl +3S/g5FNSDbjwtEbK5ppEWAfxwuG+5g/cTWOvRrN09ucJsam1RbkCR35UWdz1W+TGPWeWEatcXxQJ +i9FGBw/eBXQaUyuAcPnxgEMP7FrOQieZtv92y/YKXoPiaRJCHDQjXQOAj8S/C7Cjuzr2hHSYJCLq +qX0aaMihAidhkDVegmQ/VxPyUvu5mEqy8zFzrN5/pTpTzG1oN8B3+SJyYAyrpUXd35XSWMtQlwhl +O0IPtsrU4Y3obFDxYl7YFr7l9VhKp0ZLbSN7TEkpN7iMr/tWYbbCII9Gsh41HbupbhK8quNA+6R0 +xdRS+MDLZAuzFo5fmCTjoZ8xAf3uKqyEOeSx7VGSFbKMkty7COjlzw09TOvy8cwZtZIE6KJYktEZ +15gc2YmuB3FzBR4vjzEFWsIolBv6hU2MLicwNiQXcd6wNdfeRD95RpYcVy7d96LCzkiDjw+ymKMN +RXhK8baXMua6ek8CngbsGPpvX4O/UjjPxS+ULXgyGnFpCfbQ+A9M3mS/a7xz42pKCBKw5euDR8I5 +Nlf9ZT+5kGFYeWddPst/VkyOx8efpI0J2gC9E712/e9uNBHzqljgYSxOPc8yeWlmr5jYi/0CaXih +W2GbpNc3DWy6OwQct+RHOOT/ZbHypUPABovmxVEx6wjqStWGqjYDLEhydW5NViUZXSynZOS5YGZG +48YPpXqD+4q3vcHgs+5eUbf2UXHsMX2Tu9ZRJYbwvKEc+/F0j2M9wsOzYbQKiLYfGDQ7BlMIak0O +N7POL9F0bi8P4+RnQ2H46e+y4ovH54VSgrQB26OnuT2wQRqwFOB8kcfsvM6QYVhXutyBFr03zM4Y +q4UpbR94yRTf1CXkY5tJN1woEeowsHwPi3443vCrv2Cp4suU65Uw5l3PZNptScrICewKqiwtUb/b +Gnsv31fF8vtqOZIPVSitfKS4r18xF0g0xu3UuZzrk0W/Q9fdC/A9EMpEMq3rGpzjrl0iDWTJeI1O +PRFAHJlk5FYcSpz+RJD74UgZuV9N6l8vMAelShyL4NcMDIUYbTXrPN3LpCUwdZnKRpC6XCNVCL1p +5mnEf43uMHdUq5d5cCUkkx+GuAckUi1IvVfPGyO90SzBcjasGfo4Di6n1mb3yC9TzUr5u7zw71Gz +o9qkUyVLIlvPQzRmFNjPE5qncalbn/RGYZcOzKfOPq1SrGotT0PmafqzlrIxwMC84Zmn2FwXxZSB +aglo5/zhv0VWfIiugKKB7k13/C2CQ44oDowa8yjgxGYeoiVcgIDI+kOFneD1Q4p+VHZHWI1fSvEh +rll9U307lx29cVX6wxM+xjhEgspirgqGaAkocsb7MI8x8Ae675N6eyOuFgdXYo3Vu9p3wA3uZQUM +ahyTlqfUsH1N/kdmmnndPHjf/whL6IC4ystnU37Gds0nlC2NSekHFZjme/P9mzslmslMOKnQq3Yh ++PpF17i7qySa11PLYcN7QxCXCxCEb0DqRQSl87WBAjlSxb+uuMrcy2Jk5ALnNyz7T8VFS221kP68 +dVChCaEMrSVJS7+t53djjnSNKo7hwOpw2fPkXIQQdLk+r70GTBYvaZS2AxMtVcdOwLdfc5iuBkA5 +OK0qATPvNx/Q7fnKjRn5g919hTAjDmB6gFk8c5eSLNVJ9peJzo60NCQWw+MMTBrAjxTDlA89G/ru +PlpCYiZMTONzDhcJlp8xThDcq2gk+fuMZTD6Jcx1UQ8bMdJzMZxJAaP9os3EE8kmvrvwAxvsPr45 +XBu+7Ncsa1cy+Xs+1z7fKG93GRDlBR1ozki3CaIu0dj0Skxw3uyV553CgNEYtICq4XVB8N4eDgvK +T8NeUjP36Uq85PM1aprAGvwswTzRH43kqFTVxu4rrZjCej54YZ/vF8x3oel298Wpd9KLEKiVnIbx +HENDDENTMmupSlR0Y8xkPSzsiwhOpxpqZUFYHnXRBRjNdeBGti7lMh1zPgKaDxiOAy6hzpa6UbTe +9qzmWfKtaNJMI476fB5K1zzcubDki2GNA/PsS7LlZ0rWUcBz/k+Ek0wlR4q0f/S58Ouw/nelEi95 +cdiSJJcDhYIZxKwP1HaiWCjVCfqnKSIWss4Dq8GjWOy0Am+TJ4QtpODg+1JJGF5A35Jhe2sV3KaK +woZFxEViQF9dpUa3y8ZFa4OUf5+HWO/9JbLzWYa9vcQmvu0snd2h+UuF7FiTmFXz0xaUIFptbJeI +bjQHD0pmqTgWF9y7Bs7X9kAunfDIiQ3OEc/AMbglRqAOVTsaEY6aJAwu2LLPwumWDK/SEPkPvtWy +yBW0BOY5yQuYFZntLgirnQ1RV88aFdxoK/1lnhW0L0FLXvOLl5fgV1SVuwk+qI1NnlkrvNlMKsBp +CK5eP995oYqBI3qkf23kvTG+gclfE5ywBO3CBZMad7ze7WPnTpLIGp5Cdk7hMIjUO1Ysuhh54Do8 +9/9TG+ONcRGbrzhu9agCQcmQZB10rDCFYjd9y3lBde3eX7mIadMdJR6LLSx91AwXCgV7y1E1t7Rv +pJLLpWnNWrz9rCOUOgYei6FDyRoAoauK6X/r5ilfO7b3LjANdPjP66Guci9aPUDnfh86XEdCnY29 +kNDN+LeUwmoGrgcWkDhTwiVtU/hJQl/OuL8LwBeqEyW9vrEDpNb4PNOMj5KVsYKd1qlPiIJSMGa9 +YMVJVvg502gepVoaf7vlUIrk9/K2M5UQ7wKhNPdd5msuS6hmVk7mE7n0VVEpO6xU9Mh8XvU1AUKH +ntC5gBimLlq4NUYGeQ649//zKlzdG5FRTaERqWR42Wr+IZWw56Y02u2+Cqw72wkVAYftDUdBpDRL +WrPDiMGeewovBpQHuMYY8woTQ+S7ohVnJ9HbMvzd4c1FajSix3pVZFJgGmiTDH/0KNsQ6pZGImX/ +j14KkjmvIZ5Yvqtb+gBDbBGJ8Rnl7bqBrRNWcjF7hkwW5ZlUBLKfCHM++naf3tRtgllAK7E5sNYB +RAvISrvNwivdFQdhvlBu/lzWkRDWsmwbbcNhpI4BM8a66wcRDOdolWQOpHKXT8jyOeWF9KprhXtx +xoQbAXj9Fq8IrUDpN3GVHPeV0ZrccYT9Qs3GG+7wYn5JRM56e1WcDXDOBgtpuW487xNd9sR98Si/ +oExCM1s/gZLq7fnhyDsR7DGahltA9Zt7zVy6c3LfGSKRB9J6nJU6M+65TQf7hUtsM6eaTyYB13ew ++Dn0A50UYKdvH5ZCJOar55ve9Kxzna/rixCU2z6y4JlUAUNQV5wsrir/R3LShBe3pqSjsZRQXA3e +G7/SAp/Ak/t7Pxw9fIXjVDUdqIFKGdxJAiVyowH2Di/Go0Bxz8Zu6k5bCA1AXAPm9Qg3bQnFn3an +yAwVEUaQclHv3KPXznWSBz4YqL4Gg1/PjG1/o9UqAI6tFid4tD952Th3hKNhPqzcJor5Ef+N82J7 +vk6I7fgFZjva1ReEkCOm6sqB8UEet137wCKVc6I/bXDEyvk6v43FA/mLlBl3zoHJcioEQE6K3zxF +K1J4uRzQokXDDQAzvY5kmRwpt/fugEWUyHBLnuFW0zjQAXNqg1NYz5uNqitSKVlXf0pcBCqpJCOc +A4HjFGJCO1PLnBlDrDa05pbIZs1JmvPpuEz1jVYmlC1VlPTtPj1avhuXfyud15MNNuaruZ1De46F +SHJ8tncQSYe/aRYZAunO+D28dFPutZBEiAqjCuj1caqBZoxbfM4Xku+0VlnfDsXBpIlB2Pzz8bAd +YsGNe6yluaFxEjHRFNKyKfRmVeay9QzR0SXdRLHQK6QyEkOoa3+4tqtzMooFRosgDKAiZMZzfULa +Rswyy0T8MmMdmWUUw8BoCoc9Dr3vO5cQHe3Y8E+yOt1siSkoFhK7lh9e7L+UfLJuuqbjCGCViIK8 +Vn3l/z+NaZz48YXrP32O1bzP3grGlaPMNaELGr5o+p9GwS/ML7nWcw463nFeh3oa3etX3Cs9Zx+e +PVGIz8z5MJBkQZp90//n/fiStyKsYZRQT5IGfxuiAvuXbn5YmnGKCs7/M7yER4axsPmdCOvVB7FA +72H5xb4UWXAdknm19RMvtbLtUMiAW4/+wd0L5DiQWu29BQEWHSgAsB3aBxYAY2KHl2nWZbBf1E5B +0olt+fmFi4VnpDVY/1DYmPOknoJr8ITlA6JKqDA1D5YIpaXAXMZc9bRUituxxaZrVLfkbW7Q5MC+ +kh77YEytjkitGtESNsDoewFDmw7qdUJEH0GyOEtZvHj1RwcyqMXKjP0Ig/cwdj5hhcYw5hPV/2uI +J8gvgiT2nYlO12B9M//oPNp5jqxpezFY6mptC0Qz2Wk8gkii0runqsIOwQ6yM9qRcnPjgpl9/+SL +yf9t/8oN1aWQstYEbm7PQdZN1H+nQOqEtVsl+bozyXvYp4h3PNaZDBoLhVIg51Y8ANYix1n1uA+G +p0WG4+x4bmd1lIvgx3g1o/Co5ix8mfC1zKJbQdra0PghUI0cwtAo2GqhENJC4ojWr59K6nRHwaZq +BT7FXyT/jtHEyFeWbhp6USUOg288uP9ZZcmDjd14YTzzt/8bZmkE7m++AuR2FRaahr1vKYDLik5+ +pc9Y3U7ayczn9L7+bnNfx9oZFfcIDxtlY5S8Yfq/N63W8m1FMtwHEfaVMkfS7H6v4jWirBC5lvnU +0azwEhGKc7+lOBWLdNxOBKVylK/EfNOFDofScL/jr89ox8bdzITciuslUd7HazMVqAdQLbmNNu6G +n1gEJNyanAFTzh+QQ9HjYC39BZclDcO6MqFhm+zJ/Q8Ua51fd0/4cr9aO8WVXdnUgL+xQ+4WdlcJ +MsIcg/DtkzBjvAIUHgMpDF8pQ2uJqb36n6XjimNAq/mTm6r2yhCBLkqrHIFGNXdhuWLA7g6DVug1 +gKOj8QvYvGKhjOaMBPfW2gJuqsmu3zGMvhONC/AKfmv71DZKHuEXg2YNSaxEgqMboIbY+0uGhzgj +CtxsSqDcVEwps8UsbWant2jY/cB8IOKOeDnV5AlDoH2GJb+O2TcLpJ30VuNAuB/OSZCUNH82RgiT +SSRG1idE2o8O1dBc36yP58BUAs9jmJoc+MaWopJiJoezsrO63zs/avK27EJaQSp+Mh2RwR7NzQ26 +07o4pmwTXpUo5K3guQq0eEgmog/UIwFA2ZejPfz+a/wS5h943GUKaBWS1Xxyg5mTEoMWu3h6Ssgr +Z+5zLcXmxv6f94I4mgJc55AhdAT0UCaGlJVFf1/yfaYVjcSzORHfSBfg6KEpNEVitKcLIV4gvrAs +ntjLRCMSR/kfYNmzYJ2T0kBlOh+lhTNJ7oe1tFrE4nXRC7vxjit0XsLB7fLJhfR4nx9bz1AKsyHs +9WPu9m8PYotWZ03E7Nw1ow8fbT0X6HE9zdMBBoS0NUIw5BzyS+23Mj+oq+Z9fNjs39QAzUCFnzKz +auTdzVk2G9OUgsn3iKeYZhzFdCaNQIaIAi9b7Z16Ee51cz0Wb5y+9RfEdhkNoM2lZN/qss/VUvWL +HkrWOA+WOcK/GLSySIOXiCQuQcXEyo+ADZ/W0dc5+hPNIT/ERIsNoqqSaax1wfuDaE9U4+ji7s7X +GrdnbSXrpQ+IwwvRde8JtqlEa77TxNUpv3Eupo8YTBdW5O5xgQwMmgiN1iDayeK6sY17V1CSdXo5 +Dh1rzr2IqB5FWCExGF7YlpZNfublnV6QZklM8YVbOL9VdQ1BS64+mqE/z40+ESz+YFwvL8zu3ksp +6XUg6AEq/KVbS18KcS1iaKHL04UCAo6PgVU7yX/DBzDnOLo6vyrhSvESzw0OFWdZm0eE5PIJJu7e +0ZJuLZcsmxGqBDOH2xwzHSBaM20hKTD1Ug3X2Htyvr1CWtVtU2GrMB/j9ZRXeHwFXKmqjhyedw+d +/dqiT954NI5nqxfVXJwHzoJwT46p/K/WFxg7GMqnYnuwFkmi0RtzacWKSuEeRm1Ag3roAgUTnGPp +bA9ZqZxlrxK2XxnTSO996d+PIBEBr60UbFfBPlpkWk3JBhzuWBy9TfCZkHIhwXgIztNhVWK8PfmX +gvLszN036UEDjhuX943IhpFWs+jRZI7T+rlAqB0VbrZdpGiWrNh2xBassGrZdMTTbjI1EXeXQFE9 +0xSNhhqNAxqBAAMUBNC55lWYOguvlG4qoIW2/nYf+J27yri7+hq5PVRoGUci2B2UdlJmQ+iu6dI6 +6bnyCAPC+dvL6g1weUe1gixaA4/h8CEhsH3/DYVEiiIodLvFwZl6CzlskP8nKWupgHzR0iqyEPlD +G1btFxzWiepLCjOnpTVXe8Pob138ZmxqIkVjoIMlyiz/2FcsLzVmmvv5fA1dYEaHF/IAGL0kam/r +WXe/70cWlejSLQztabdhuskynNknS4DBoSGkHsakt4TYRRGqpWMBNR4D2hEHZM6YOG2T1YnpuAFw +ky4Uu/dqS/9UOQHQxUVb8QlX8z/ZHQWkJPwmHmSX+jJtEhZAe1qKfXSPKKZnDmVICx6BYqJSB6xw +yB0d6KFAaqPiHxyNtv+OvYi/3qgFm7hnh87amiwLmkDoRSNDW/VsxA1jh1Mc3MNhxA6NoJxvHTcg +BxvEwAyd9zl4R46b0fYB4nwMNBRhUESnmtXd6Osbvn2BvIJgHr0ILeDdqF78hHb7gc3UyxZH5Xdt +MRwFC8MlwwoOWDgOGNifCv595ErAeWf/iIBBtPuFZRZq7ngFnbAyc59SbnZ0S8XXfTAH/QkApd+y +qTaGtIyG/fE4uTjeVvVgl5GK66G1md30QWOKh5X5YCn8lrvkS9ZP5D+fTcI7egGnFkAjefkXvRON +TwirYRyHpmUzrhOzHqXJgutPJiivkXK0gPdNiwBNbtIivWWJFnsxhXgvPHTdJAHYgGStjfJF9T39 +zdCnkjMybDgY9o7mSSol2E/StrF1Y4D6dbPNV4RgszY8siDY7vjUj0S3lx72NIHvqLK7SM/8GgXo +86JmBAUC8F4Pptd15Hxv2okLapJiqAHQ+h/SXw1S4X2YEqgTNHBy1MhAWrKWCoFGsR6fhULK/qKb +sgh6PDjkZelhMRxjvmxCvXW8wLc0okB1J8qF3mmfW3FoGdm2cuLgGhIl6LX66LUaqenyL23ySC0Z +lGVQqGFSg95ZpSvbxsswUCwNURjT4n/kJs/BB9LQxv5vPsw6Rsj1soJec6yhDD/cE2l4PSURlDna +7ukvmuY4bio2no9eww+PZ994f4kIUd839RGEOrsftIPEogVbCjAEyvbPBkjaMXfvMW7wr7KPN/Zd +tTf4PREXPhFk0CveNVGARzgDPIihg9XrMep7+LywrO/HQXl1jrR9l7LOJPVseYZlJfIX+8xpv7sS +AWuP/MYJWtOtmYcSG84hEtXreOAThgW++R6GBjgeuhgwiITfSQqkHf1QaE3I3jH1NybtexNSnrAV +Aba/xLF+GJUMWgaaCn+fSTOd9aoAdzi4dAcaCfSX1aWmk3UyhUiD/K7CicHbQWlcs8UQGN7HLl7Q +1PzTkYUAvwUtMsQVuPIx6QW6wq2u/fABZu0VVOTBLX89EBnFjS8wISI/+432sWotcDE+kAX3Hz09 +LATGkfcfNH7+RvAwpUjK9TZu/Zn+ggarGD4nQ5THJa7Q7z72eVy7c4W6blZBG1BnbCLvr09S5j6a ++cMdZEDNi/E8dKjr3Dda7YlliaVJRzP1SfLAEIn0sgfQ41nynC5s8m8TM3+IojdmluspVwot/HvL +LpPKnPFbynaP5V8ihlXuQsttm3A6Gda0ODqy1ct8QHI+iFv/0A1P7PWupZxQSXUkPZJkyA1pV582 +Xd4SmFvMCttM2baHhjomb2TxNE6xSQr++7SqOZ3kXd6amxfyFTRZ1OpQoaZMl9sE9wiLdGJqFc9l +eJrvjY5JnfmFXQbsa62DNm9ZdVZvBPUwzQhM+MUy2ZQiKc99In0sRyIl+L9Pxu6eZwoLEm9U/Ux9 +CUy/yzI416haJt8EPv3gZiUt+uE8QiCE3JCGqA+EArueUGeTQaBE/b4Ljb3G3JVwRAOTfBcTI0e/ +tMQmBdtdz7YkYiWpMyCDmKsmcNwCwBQBwAM7feAMV7gCzkgvR6fLhxktknOJIIXDM4I9zHq3HWm2 +0C7Y369kb+Idv/0vtfkYblxdJDh9CUEGBNq8l7SlOeWbw2KZU2ry98tqw1jI/+dHAL8ZcDXdU0Jo +mjJn5H810jKv46wtr3dQb79Tona6dEGlXCJ8eZrOqwpP9WhgERWfcsLnNrBfXmR047a29fQVmdU7 +Gfv/uS7we3MAF2MdFXYVw3gt8vV6+7ykNkOb1x4zbt12IFj6WhRazOesiuqmBwkiiqP2vlja3hs3 +6USE93slC94YKDfipgLbXAcr1GKmIm3UQM4LY7/HwyKL+Wtzyo8AZgU6lVWT3nFPCV2H70WpfJ2M +rCAF9Ixp2IChbA3jdCRZy/EeFKLcqhYLUaKwGyh/Fe3+B+PIqgxc2BrRysDhePs2N1pagxHgpbc8 +ftvM/4Hq+sjXcejYVORv3MOwcWZxOSMG6x71HyDDl+3InLgu5kEC9dB2DxeVhAQK1fwSp1sjPjgm +ecB5XHqL318fkBYnAfnXhrBX4wYgUXVpFvIdR46H8oHpmxFZUXEozpm5C3kJqOtPseHdheGQJrcq +wMpR9edEdi8uP1Me+38unDb0XucVgcwVwGiZ38CWEvGCHBZIhGj8QxLvbdPtWerBbrnmU0l/doGo +mewawYbqDhgNxcW0pKjyFahKuykKBTLvf0AKpYuKtxxPWbeCdy+3rxvE7zw7IN9+NGjprwIrU1pr +GVOQQBPguiOl+cMemFuuz8L3AW2mBMcUGI+NQVHpvYUmILIGDiXBfaRYVULZZapzrf2BTjw0BiUa +qCm4AvPf033rvqGcfQ47nI5+VfptugkHnmEXFkiVpzQDx5puzjic9GI0iC/bBK4MGt/AOqQX6me6 +fu2SQd0DfT6wW7Jyqnh5+A3QlXe2/HJqoNlt4T2MS+C99E+23Kejmdf3MVwiZTLZ2X/WoTWCYeEV +wLjkkUAFDTH6/upNWqJHjbN/12fauE5yFhj5Dih2Lk4X8Fg63Ajd9wQQn5WnYyonXZh0u/j4/udU +Vfa6dqBIlH7njw0Sv+/h9Yicp209kz3TPGNZQSapkdij/wNZfEZW7OxzmE5n6eMdtITCl2kZ/JBg +QluxoJ3tEYwZ5Dy44mv8NsV2uUu+oqvT3ODSPVNG/Tqabr1XCvUerSi5875Bi4VmV4NpwfhwDUEa +UtVqtHFe/oxsel9H0tW6VQSDkZ1vUiuzhGzJVpgq2aOLbuaib7w5NAkYflyMg1Rua9lRFGyIeFnO +V3UW2nWgWfIWWD8OWLX9p0kZFUJz39m5bgnodYbrpJVSb+33evgNSSFOeDSAFXmdKDUCRSkJogAc +nlPLcbNn7+kZzmD2BKd+aB5f/FO3fdPSvoJEvUPy+tC6UMD2DiGpQKJRPzdhSy17w8ZG7LBTJ2Pz ++PrAtGBYY4lAR5/WMLFAnPJL/BiXWu9dPR5w1yJ8w9I8U1/FSuzDD3dNE8uDBFPCLtF1lJzcYrbd +GI1tnx809yn8151uuNn5QQNANLYe8M4cL+e0pIzsMYP2H49Vnl+hvUsl+1NHhmtIr4gMQWqzhe64 +IkLOhXb6COPZ2gLrnC3hY5c2Va5+f/+z9n06qb9I86IviwT5FQOdToHKpnekGTd7vdH3b59pHSG/ +POorZHaFrN0IYMb2c48zkBFAb3w+NgWZk8hMJLp9hWzN5SLnNhr7R9sVOPbG+LfKtu5EIpV6b+6x +Ap/dLW3/V8gGr9xu6IAf7tKZvaD0SuZMUz+ghCzH1eQOdX2WnvWDABWZotq28g2pN2Oy1WuKpxJZ +WBjCR5Qtm5W+3uLyz3x+xyXom/tpUuhxHihyyT5IVEhBFiTWvBJ9BlddHPINLLbXpD7OQncf6uK6 +B4joRjWCG81yDUhkpXamYxA/SmBrgBxFka+2hlRsosEdDA0FvZSuNHkVh2EzR58kyMLZtqcjzuOr +FW6RrCuJ8i8zX0vgKktI/0lUWxNtoZLNLpS0HZ+wVjSHBVFLTBIs7GA0Usw1JyeWFoGWSZVHKE/I +MeyU6bAdj/DvN9WnXa0qgzkyzUtOFofuI8dOxgULvRDxZZ1RX5wIA+P2O8UtjUJbG/wljx2IPlmR +CwOeN8/ja+JRmS5gypHo9cZyV2foyuQ7Nc4TUo+CTef01ItI3XnB7EMPvH59nXX0yOu+Xw4BvyzE +IzX+gmwN9tMQWGXPJgsijUa7Vl+WaTWqcL9SW5EEe8MhrMsgzL73QMgboxBUZVGmGFZOTs9ySR6P +A+PcI+RlFgfGPjohAa0zUcj1IN4+em0GKOP6dy6p6BrjmKVO1DqdRAa+PtYVRJikfxozS0We/Kuz +Z5KiONo7d8FmrokymDjp8VCpSBeC8m+0z8vf8y45DWXECPCqZhVcRO9mbLnNkVVca4OqR1Zzd9o9 +96+zI1C95YUEMHavpXjX4GPwEGV17FwNYPTloUlutXwjyhu415KSY5f4tzFPnWHWB9Nj8tkulgVw +blEaY43paWbD5WNyzPo0xxl+2+Byyp0XaJZ2mtVUVm7oqXhBCsugxgM81HL4J5ifHfUdxCm/7L/8 +gKoZ70MmH1PJhyRYQmWR+92PazYiQDqgk198qVWVgzUfzHbeS49evemQZISiN7E2jQ0JQj/RTBMT +hk/pH8NZlET5YFesEcJF5JdYlOzDKXvl1FBSg4LZJf8j1+dxeeN9V2kKibgCQHW0rLuNiX9LTnhz +X/MgCneRIC2VrtE31+GyY5RhHSabHcYAFvigp0GNi+pBfHOD0TB8I8v7T1Z+M/Pdqa9PAdGmcKYe +k6PAlgsnbtEnsuFxyXXQ+YdMDxmFfYfz9V6ohi5DkpA9bx3B6RuIEqVh09C7niKrb4tDLJCFK93Q +QL8usxXz2bWPv/FJJ8pSUmn6dKGHsChKTejWnKnZs1jWHVJVwFIiLssHls8mWZa49gXWrOB2/KbK +b7AN2cXnsQCcaHRm+8fYI+t+8nrL9lOhFHKBCZf5TZlOKwVAVy+LlDz3QYqObr9uC/vJUrlnPikC +GvCXmmPFkXSXf8O0g1N/TlQ8u+LUjzGiieHxjWcYURNoVl4PXKdaPecwSr1nR7QsMOiU1F89wcaj +9Htt4/Qia+IGHQ6op402XihG2iqKwMPkktWyMjROiiX8HBmON+G1iwmT0U9WhTVwsUBtRugktsxb +12f+SR17zxDfFgJ4SXKPH/oOVzoPf1+kAfpYkhVd22Y9cWqel97kHwQMf0z6X2jsA2wp2uI5uVkf +xMpciQPfQxyZhWFLFqwrtqAshrIVmlUQ10hnKRyiNXd/vl+MB5qDOcxyctLOU0CTUT/DIaMw2pgQ +cMLlgZa/L3sTbxq0TOj2HMbVurgQH/e3YDxbjad9jg3D5U8x+9cP5wGGCM2IOXYoWL9PLT9OQsfV +QckW9B4fQMDFoEaEUOyGm94tw01n7loTkJwO90BslWChL3MyE6IfQeC/Yv3loF3ufG4XTASlDotZ +5FgajTsv0yurs+mHut9bE3GvXArRl9Lai8UmE5BxlM1KStUobiJDpAkcJnUC7IVr6NaSmdqo0mIE +2EVVmbgSFMT37WKQawP6aFIy1NQe3xEDoRyFR/OTMKK7iVdAwBDhtkmbPJ0bSEkq+uh7jh9IA4bs +QvaKyizGImpOwyK98cGMNzCCyAYbwqENbjD/4cd72zA6nyM9+OMjSmnYkEwa6FZB0ZkJ4u0Jfc3I +aWolgrTm/yplzGmOFqwlnjbls+Qhyl5xpREg+fs1rzcs2ajMJeR4U0K9Dl1vJaqnltiRtliUPwzx +LnFbvMRlYC+oUkcjzPsU828vmWv+W6E+LP62KffZj1zL6KbXZurfQ+CwH691hrsbxJR17Bp0rssp +a5IYqD2j0PzvtwI0t30aKOTJTgtSJeRRch9Q/ZhNDTTshDsqqjCqoyCaV9CJOoX/EGRVaAMU9GUe +p7lrNzGEzwFC39CrF7d2oP5WGoPPy4meaEJrUaJ2Rd+Ct+rHxmPuusfO7U6KuronbnzX12YmzVMX +KDFJ1iIuKd6qq8ktvpaYOytPbaCG1N+U/DI5XsSp4ePHz4IlB/zY97eKy4jIoW0kd2/nJcHhOZ1J +ss5M2pJu2QFQyq3yg+hATop2jfl2m9lAcp389ks0VYJoKF0A7qsccbVmOSJHFbi8FFicGjVh5ztT +3gj8a4n/l9B58AvppJ0MQqcp3cIQUxkX0ZRSYXrKCbT+s6/kMDSbX73W0AEoD07Y5pCQp2Shml79 +CSqcDC7HUVcpZeNdpCuEclz/sq2NYj1fhNp71xEUixLmAXi5hzP8WJspIbPGapSoxJSm4FOhhXTb +uQ+hxSmfIAG2mY6X3VzCVa39gIGWu0lI9QNxwwntAPa6iCZgQAqZQJqVWDhUZhOFhFlIAsG02bEu +eOv70a8DxxJDWnlXhd+N7lpR9iyuzf7A/UByvLEdqOTmWKNEHS5yA6o/BAabHwrRTulq0tjARSOj +O/x/21ITBcP0yQxD/XeBZbZqu2tgg/B7vqK55zSKHV65XRkvtGgvQTO0q0/Jybz2G8EACJY3OLKH +y3fybgckUZxsvSKL/SI+0B5+jPDGIfrCmruNPuphscEsnWe4FHheZyg7LD9d53eO8nZ74k+0s1vW +sbi3/15WNlojQuzR5KlxqW54gA7FHyJNuEZ09TCPcz1WRUNG0VxrMvcw0AGMzYSrnJ0ieqs5LWER +IHymxkhaps1yvY5lr0JRQXH5XJ/qGXwSCGmofGF34zG5Z45KfemgAN2e4qg4dd0FWCNJbYEfPQTT +JRei7ZZP4wmXXFdDh8vaPgrABxIsxskxI6p9twtlZK/tMpnN6AXiIaHU5LVjmMkEXZvk0v8YMYr9 +G/rZd/UYkPGCah1Shj8l6Y5FLhI1sc2DiElrQB42u552k9BVUDsEd1hB4wnGnAKN1p3nlYqBMpqu +nIUM3e9+BjPi/ZqN5eH4PWucor2e8x3GZq5aKE56r8PQGOLl7npKzutlby/dEPXgM4LNZjJF06TH +MVZ05z0Z3nG8NZ6TSmJ1mZs6QUB8SYa5lp+VoUGktB97PmnojkSYOLHIhoivKK7B76MzlcbCl0ad +PnEn277gecespviaVHbQP/xlg0vX7vkiFNOql22TPvnaqBqJpHQ7cmnF269xS+fQXxz7fUn2/vHb +d4Ltlz8tzBQibhGErHTwar/glvTLRBDhAJ7ADX1FTg4jqPDt9jOYxhZU+gwCEVv7NY8ZQFJWyiBO +jm49I4Hdg7ivSen5lU7SqpnP3HZ8JHLbFNJ/2ipOEY8MihOUZxulfaTiU+4GqEz149M4lSHEWifB +CgxMlGJ1fpoQcQcqu4zATe2d7oYln7YzDUah9mnr+pz5gqxwqFIhaAyK7r32inA0EB1K+EwIcfuD +DzpYSO0MzQmN1BO2GPIHIWRvHwPOC9aKsparFwUcTWdh9WFsZvF7CakOSrEf3AkAAqZdpV2cZ7nN +1UmK6DDybIe2+LZKfr3Ot+bMZDecFyRilupdjnLe0pSt5BINJw8hcsYXjiL/rRcuPe8Rpo0wATB8 +Uh034bE5jSCiKcQW0yGk8Zuxaab674xwrQH9r+Kn3qIn8upvy2s+SnNbsV6hsj30XShQqvCE2QOq +2xjTAA/3zRABswAKSRw9cdFIHHBSXg56DGmpnWkjaz4Sc4F2/RwL1wOcn3TQSwCJaATZNQ9ToMA4 +dHpS/NPh8tsNnhBlOHNKAS/zAwg7t2yc6RBXRXNMK3Jd1plgKR9WOetPwsO4wcLG89hlMMdKFYIa +Ub8Dqmc39H3qX9Nd4s1oJ2n70SVKKTcbhpmC5NggOa6bdvkdxBa+kz9ck6k/0SgZEAMZ/sB7TvjG +qJn+VBARzRfQkVQHlulo5jaEN0BCopa3RoSHJGJzsn+9h1Cb2GxcVuQH1sXwzzOZKCo1bu6FTiYv +eUgPWRIQjgPR6gkL0pHezC7AveDlGA3yE/YHhCT6jjC0R8lsfX6nxNzQ0O5ujEsR13lAzHw7XNzb +8qsTJgAsDAe8CopX0TbQYyEFCA9qUV6H273z5f4iiGekDekIKjQX7DCBFoesp/D0bW0EQy4ND9Yk +EyWK4SRJTSxmxH4fC+/vvp4TqbMB6typalB6cZJSKhMIZu5GIRcvbi3tKvXG5ruMKOcbBp0Szu8D +JsHQ/v0PY56P21+eLbVxa2GPQe7nDyuouBKvYRg3Hi5ly0y0rc7mHWdZkDUAEzMJ4fUWK9Asit46 +1a3s0+Rl2nQBJ+i95wIzOq4F0eMEFuBjuK31k7Awikydy/OM5RczReQg3fJ1XkERdbyWY9joQbsM +f/kMwkwSMNeIptBZNpxbvXWrM1BMhcYlUulQBRCmujPABqa2XwFmAvKTc659QD5zg9Nw4TCLsrZw +OS+/2+nzTQNMiz7N+u1Z7g63npkQb0tlqE0hHJfPYa7dVtVEx4y//y55rXnoixw/WJuYsPWaGbWO +3+HKGjt1Lxhh6HqKy83SwUnaI7Eld9RKRi4avANBYFVgWi3ehZbGoEsC2XlKAi1BPYB01smYWH1c +Sn1vc36GrhuSlNlGn79sb+OgF2Mjxzy84tYe1A4gXJEcgrtK7FpOHfIp2AO4FdOWXC41CoFjpuCB +uTYf37cmUZl13pUejhj6LOGSTicnJu8FlNr8HFvYPjUvrUqKbpVtmfH8GHdnwjwaHum3PCH1PUOG +SuovFia5Y869tYM83a69X8DyQ7kvyyua/c8zmaL4SkTbmA53yEiAHRFmUufcSy8xmATd39wOOtvJ +77ckkyyRtuLDZr4iPdtnyzOIGTrPdtA82uhF8qrCMln3Inr4/FSkTHhE4krHwEJttzZypbCYlRa7 +KacVfg8Z4b94JGBt8JexFSTRRt3EYw6SueAkzPl9r6vszna2F5Rq1j2IuYwO4Go56Fmbm3zjdmaD +1zPEWkF6+AmXZojFaHVyOq4vKGAw2FhhYia9pZdYQlCL25yLdU7jjSA/1ZL2BcIEVK+xLaYe4vgZ +gm/qBlyMpIXLfh9lVRfdHsEFoOZfEvGVX2rhI24w9eaqI9u8tJNXCi9MlR6J+m2kuwWbzg1wMfy6 +ptjUIp82ctGDlyEbPjOkJvIgxe62WZv+8prtteJKNswDTht/L2Yxa2sDiM6rhNO5ZCgAei6vjcMG +R+g42Dl+UK1wz74c00y1ZY2qptjEpknUa1jQxkFqcS8z9VrZl44iIPhp4BcqtdFVv/QD6U9rpHt5 +4F1EwlIv1LjdUlYbEkFDg65xcD9wl7y6Ln35ZLcre+ScGJR+ybevQkfXZaHvebNGaKPQtV45Qc37 +cxekuQbuDB4FQ50tDnvYO2ZVU7YXxccLKQHzj41OAUWpLMOVVa4ykOhQkTf+NGcuGETf/DjletdT +lDa8NLPA6WdPS3CXQLhMA0A3n1Fj1JgaFj7CFfZTnD/UcpproMUC1b3ydQWyaFPdNulopubVgI/k +yMwSSzP7tr1J9hFTETWeYVNzLHsnTozSN0zKXMv0TAiQBcfA+9wWRMaHRgCOUguSeiXdsYq8ngbO +dAikhwfjHHiwTXMmXaSDyF2brw57E08f/0bu6kE2yqi7megmgOgkyhaiwMq4toJlEJ3c2vgIx/pY +0J36mkktiNw6soTxqyj527xG42cpMC7+usEji4J0WOPw2N4WUvQzUReLqeq3Qhut6HjxZrBchhOH +78PEsmvarTW2l6frwfr/qc2MUa0NX/1iUqcGm9fo+47HRf17cx+juotUd3VzqM4x8iW/BMCvT/z0 +aBk2InXNiy8566W3t6n8wEG/4Rx1zDefPWvtoWVagCJG8kai5ELVaI7CZCvQLes+5jWR65qKE/yO +e9hTUVCYdGV24S+Ac9qpXvFzjd+cABRUPGwsAhbDqV6UnMwBK+94MYLcAtZAaS1gkm7V060NZYyj +ECtjKFv+Sk7QtlBKwWkRPbM+VFhBJ6+Wn44HDdurOWV3Ps6UmutxCbsl6sdka8Rt/rwBcVo61xZn +SVEECk1gw9F0PT/jJ7JjWfsl0fiGUOvwzkr3lWNSjIs9T87RVtNN/ochvUduTvOQuYvyCFS4v4gm +SOTXZF1x07vhDpb01ZcW6Bm5VNtVa6ym+yeKHN7e0UN6DzoZmqcuXYVq3iSIN9e4MLiIE6R2dxs/ +8C2iUZCILYcxjmaqolHjJzSKn1MVbAAxjxTnS0DrP4cxObVetMCPfoM0Lp7YNUa4i//JP4mg7D63 +sbQT7izQYB9XKJjJPu9O8w3MDct71rSaH64TU7ifmhFkK/1x/Be2i4Gyh9GCo1O/7634ALp4kFLF +sEDLmBsHgltet8enDm/NMriBdSwDhwyKlyxEzC+gfL2tNEj+unrqRruqCvnumuy0120h0kfgkz8k +8X3OOR0pcMS9Tuj32EFcGrlq8Z0bLgAG4VB0bUACBnbGL9MkpmPT0SjBMws6vDpxejrgu1iemfQU +Zq+scGIhtimQ/ad+1nifM3pnaEPAibEHujY+1AdhIB9dYJIvcJ499ipmOtkFaIA5Meirsqs/ckJC +5LR2IupWWOYT4DR29f9WTsorTztnnjDmQPhZQPKi4rtk1+daDorHu3OqqdettYUpCC2xoH6Aaamk +xfVno8gOVAWYCvZHqwVn+wQe+JPoV12B9Tt5y8pNLeK/VkkvK/CTGpvgT/rfX66nQfz+yh/szJyT +opxgfOECQUnp/8Nwt5TqmnlIGTkGM3eZD+4EGcP+AcEsVy2QfomDpVrcGTYN1UKypnVVooTOQCMR +bGUA3UVI59bjFzmSHD+Ho7wDLSBadpRA84AUzO28os98ujEM6jGEZt2JArHnmx/x4pOvnUWb0dc5 +fAj/HwfCyYfmWzN+szMwMM0kHDnDDWUpNmV1Grs29nHw1xC/5XWgBAwQ+LJ+G9sLg8QwhWh/D8MX +mP/soXrNwlw9xQ43htz42XP015LHvEG5zYxcfFSB7PKLXFj10xfkKVd8/t3UyxT9aFvQcnRC1XCd +n7cewgoORu41I+IVUir12gEqPkNuCsno0ruy9FnIOfLbT8c9R7u8JZ31jKdgqNNwF5snCzAKzrvu +pP+MRbfZwD+GBByWMGdpNKx0wu/jE6kumUqqbQz3+7oeAUT9LJdZ3x5GSCjO+xUdvumHm2qzNLci +Qw3oH6G4wLWlN6unZhUNrs3m2nC80tCxcFNSSgdBGIrhYbepAEZRXi+hUSEvM1p76aJ58dHSIsIM +4obeSGPdeApec4yLRqJEosqsEZkbPKzs53N8ReLRu4eM73tdXvWGduVGy+eD+dXRLl1mwMJgjCE/ +SlM9UkvGXItAhxGDel80j7uPDuLUP6F7jD+SuaOBlUwVw/onAMhX4WKRzKIwCP5D2LyUt/hl6ueM +ezKXxOe2ORdElYk/JS2WDq0fwrE34S/+w4Qi+VoeTBYVcSbyM6YH90IRJn1ixIAzQswp6PWbh1zI +POXrWfJ7mngQP3bZxzkt+pbtft8F6USKDyIrPFNWqTISpHilm3yjocYcLQP/jywdHwmmdRe+GdaS +jqrpT4m79GxfWoPehmJvV5EMXPuPesp/3zQrnvBHAIIUy2xkmoKWbUWrBWvAzHYaaPc/8Fj5XG9E +shh6IrOksNSBEXUhZF/zIsAl4RpPETzdQiXtW6CdcMLrq1BNiN45zU/Df3aam3SxmjZ/vQId0V0x +4htYv9pcwmdlZDsXsT1NZsKWCpazUf2Kaj5CBqaT7Mp4j1BzHeYGrGTUSP4P2QhlT+UNCI65ezph +kftY0zkZqDjpFh2s1cxDHG2Rf6GqKyWxkymRJSxc5xo+zI5hp0K7rEw10oQTW99Xa597KewvfX/J +sGZeYAypqmp374GtLdHjhWTIvizeAOqM3E1ZqOp1d3xPB3WReyGP1ztyJA2z1GQdzatL+Yt/RsU6 +vwuN0N3dbetEnrrZZGQfRcrolR0HvBeu09ARG/aoftTAXkHRgJbioxsFwaJD00rIBYy8dGkT2688 +HOOzVC/q8BtMYAmmKthm7aEmL3BD7YtVHM4wmPQC4H2V1GVH8cNTBFzarG+PYHCCyMCXkd8VD7ly +go3LA/MxSe/KoqYyNy2A68I2EvtwbM2MmMoZ4RBTkrNDYRbmY6TaFzohlaT9Zj2O9MQ2rQAzPupm +kiOPYJQPdNa3Xt7aCA0sX7zBe9nQKnkX0sarMmCeyJekgfkcHcUluvMx57xA3OO8vzpsW5KRQXz2 +euSlJil1hu95YQ10etDXD1P0vwyvV4Oh7rlA5Xuur2OiPdag3iFWtpllbBNfcz2XBtR87fLhJyli +4KMAKBMoVmgCnCHNJz071rdfQ3zDQgpSIt6q0bBHdn06CfrAW+13FvdPZml86gmCN/m/D9Qwmh77 +xuNWsVC6EoVxXOla+zSSAsh+4dn+avaxOcdRWDAjoAHqDx0fkdBSQvqh8VicIHwYqfdRv8Hv9DMv +kMw3EWm3G4178JuKGb37x1Hu9PUhKDzuiOSrk0pn137PJBJO7idbZjHYLBtGWvt3FH2GzRG64HIy +eh2O46htDgvA6s+V29KzH/j+dz4kxWdFHQCTQTP2WIRM1HYrW2mJwl0oBKeHTSTls9DZiWvNJo+z +upFH/hYA6TxU19QyDxA4/mbIDbSaF7ksgzLF3xXaHCXI2u/0UNCITpc0x2O9BMbmQ6QQQn2Z/Wc4 +NXuRFToSA+2uJopJSenecUiu8czbxy48SNXh6Mi0KClQiii/rZMhOnekXUJNHSAuKTajqRHAsD3P +3vdGpGHGpO+8r51845PwIFGvX7Mj4pCP4zW78nVU4uPqunJNI5h4eUIMqdNSI3DBrzBWW0dPGj5a +upoIU8bvGA8MRL04FVXS1Y6Qz/qPVScQSrXOeGs5ENEcj13EnNHT5LtcU6Zkl8iYZl5UoVCzFrVi +MQRn9bshxcACya7eGWQv7LyV6TbaC7jpGq+oIx+/FuKlc76BiXc0xYFw9IVmiWgFvXxMtJXpLbFn +t+dkfGtfRaAHfd4W6fylty16iVR22tIkT9H04Rngo72yemqUN/xgM7GAXRWlbCN3XyY3UA+4wsZf +Kys9IGPBE+kx1S2f414q4KN9uzBVeL4PWEBdux+msfpQXRf2pyhlxK6ayctoXK30hLepcDno298A +Q74dDHHDOFfIyBBbDBZ/A8R8Wwl6Ll3RauwDkRSsfE99s0Da0bVmSiYqdULVpphKdib7owwlNFUk +iHEStqfc8j8/JQLDYkjVLyJ//3IWcDRf+6VW2kSz7G1P8cBfz7zGEIi6b7K7IzlqEprecoP3xDKy +IX1rAKbkh6xGRj8vmwnKSIrp2ZaenNXU8HbAUoOkWoS2qMZA+1hXZBx2Y/zH9nJ33hKCjTTJCSBD +sZmAaM+2aO1sQr002XgEDj/V36+XSgAGT2oZf2z4MNa16AeeK5gK9LMGwPE1JDpL2YPrLDbAvhgi +m1D8jTxEb7bYS0AofYENIDohRAAqhkBPg6/8ggTiXwWJN1UNkiAeWGyCcgK5sL1SRCNnpgUIO/wD +c207jQfMHk4qY2AeElsJnKrNYbm2CfmT05nTn9c1CkEmcJ+i9Q9tPihbPbsFZFA4EJFb3nhwqQhB ++i6YO77qo6BxFPgcy1WIZInCZEO/ExTDcBlzao6Z/eEy1qgv4ZY8ISUSMJfT4njadDyjI/p9Ez4l +SLwXFRmeYf0uvb0hwPzvYsgG1VqvEDZWcRPhgSzIfeXrbWItTlY00yTymT6E9WbhLf5MVfjtP6N+ +WA3FXJvFfSI0xHhPUkvUOwAa5jLGN0nnPhOh9g3kMi4VUVhKcQVMZLoP27UKoJS0KqomleKx+UmY +tJCfKt+j+iX3gaZjZ4IZGRIvFnv7d9J3VAvwDeDjI63GxE8ufAa2fB+GIVIW5bdFHtzJt8g/F8g8 +xgB99kZPsMBuNeWNQwhPA2VVSqRAU1rNxKFR1pz1CK9bH/xOENqTDvfdmrdh7fjEjG3JX63l0w6b +cjLMCMNA3Zehd4oJ3PYcEKmJnXUCrExfdzJoH0xfMYXWPBnazL5nVmHmpghNtdoPZhlbE4hN46Rs +n2NQ71SqgSD2Cb4n50Q/ojFokgxkC60ShlfSr9E5PAlr7P7pW+yc94mR6dXSeziXpTfEHevZsp7x +gGGqvvIIRvmdi6H5TYXhZ0mhjMSFzqTr1D9fl347RXs5vXkJDqYMiAEKR3Cnu4HINWtcdzMFM4jc +dbBEayUz9e6TO3Dqsq5CFyXIN7HfqQcLUp72gnYttnyJXNJnvLXQZIZ/KypqoOrBCrjLuG7qSKgD +y4fCGIXv79k/QlVtWwqkVkDuOQmfx219xZ7VC47CE6gy9fOntZ3+WtS/B5egkYVG7+KL6Zxv4sIG +2nht2ltC6346sLOPF2THgi6AhzAFewaVvAaeRbVP5l9hdTRb3Kq79NFSr/vZ7D9vbgdnGcMUVytz +O0om7H9EkUHS4Tch3yoZJOjg96x0yehmtdr+p5qcJAqQELDPnbfGTs7V26JnFgyldj/VTL7sPtLN +nI9oBuouo6hBwZVaxrs4HKe1eFbNnVVp7LgiXSeXQk6YFCz+2VEzqCgcshZTb+3Ch0yIjlBvyoPB +DwJSEUbZqYnmDcGqt54gLHFJdWmvyJfv1PtwRybirebkOWVoBWz4PqWdlGMEaPkkUQ4w/xvbH3mV +MXFcE/2goLuu2E0Ocnb0nCmYNZvearemFJO0oxkrcysqnHLC8znhoHRwatP+6rGX++qI73M04NZd +09W27HQt8OAtxyappJaooLohDGxSZC3OI1qrXOTLOX8+D0TRM05xc/ZQlhS4rb+TOzR+yKv2sU5W +IOtBoTKXPVD+o/D8UdpVg3n4wKjltq3nj1nSBo3dKgwMAck6DAiq7AmK+1Ut1Dd1m0K/lyFBW9s2 ++iY0qgbSgfIXp1CmM72alDxa5s/aT1WE1Cj6GQTYYtEsuxlA7wchk9gXMm2ELEwFBeO17+ER7rK1 +IkjAlvCorc6ye1GnvmoTIsDeVZQPYt77ef85aSuAqjYfmbky9DpUvhlloVliZWC1br7vRMOsvCvy +C4taH/TPOvlLi86yxL4kHOqC6lTfz1uj6jM4w7Dc9XdFsWxydTuaFtiS1BngeGMhJV8DEYbmdPI3 +vmHAAY01+ucE8hmDGiAjmICNQVtiiQO95PjxcFZQgV7e4rPwq9Mc/xVDADl3efdMADQm8Z68V0PA +ACRYPPTd9loFLNlgWdWgOpNlx1vZQN8RakOPdBWaQqegHOyyGWPJts0mdcEHjXm33qBq+t+6dnzd +E2SVSEgVHVoF4j6VarYWLOJKHIG5/JsShKfd6CgL52K1gV5/iE+DW3hjLS5+JUyZYaFfp34rybge +RWPSipSvczCK2Fh5NFWkLVxAgJhnDHHdyB/ruIYREtZxxZ7wJzLMbWqxH6dXjYjPIKQ4JGc3HSpE +GvkVngMa1d0AXnmKHhJYTFp8YMPa/7M6l9JmhsL2JgkE56eo/SyzzzdLus3biImgmT0WIJBrAatm +7W5+BSM/sLvIT2e0cOUATN9WSvKnCc841DBITNg75yxE89TvoUjOKL0XBqXABhLBBaMslZkMsgQ4 +dKb5NDxXQLxpC60q6RYxLJmUdlaASKbbyHQev+MbbjdCr0JTBsSE3X/b4BicSYY9nJXIDUyKFcWw +aJZBer/m0kfyHmDQxVQcTvdBHP/lHwqZd0KC/eow/s8J/mxRzG9CJsArKK3vpyRMx4avIm+rGGhW +ZpfrhITYLdpw4u0jb/D/FEFPVI6tupN48R9ptWGxbvZdUKoRukllYwLW+IR+7Lk17yY/6MouDbz3 +xydttpNNfNQA0D/muf4UeTCbYavJV2bsOMv+eWxPq3NkvxNYWm+3Rr2UeduIHrKTomy4vlsDjeNo +67hX+F28y6BVVvyc1F1K8wvgC1FmR3D3sBrIJF7PcrVa2y9b9W1xZULU0bGySIGRiW4Ee73loiws +Z6v8erCGTNGeCO1IxvYke+Euq0mbZfBnNSI6PwtVpszA3EQ+BnfOfrcJQZJGaBKBk+Oj/k9mYTYG +0hpYNOLcr8cVc4gp+ghsDsKfC1Zm0kRlat/o6e/aFttYT2RJgXVF/i6dHj/uQJJAqZhqE1Ka4eRB +oNEvEoRsT+DYX1mnf6f4NtVMY5JnEZpqTjPb64km+tPVioex89IEfe/YHgNbPbWfcDB54XpUDJtD +P3QAAD1W5L+BXfMYoQOb7GeS6Y1arl15aKVU6e/4I49ODEJG/WsrHO/3lzGS0bJ0c71YMALevQhO +TdYn948c51zHsz/ZdVNF9X9i+M0sgtSyx5es5BpdWpBQns8q/zGSsQpKuyWM0p/yIuNcdPNIOgxr +CM1qrNnquhJhtuigCRg9vuwjX8M0BqaEG8QJ5aSbAXCo9Xadjl3UcAb+rIIGHN3LO34z3M68U0SS +/kkZ6ieejCNQdLmQFGCnQST92gw382QOTGTyw/9DJAhrYbWyWgKWeab/oP5u0FjAJ5OCdl9RPaAE +1z0cUhYrp3kuve7PIkdcNGc2GhdW92M/vcm0F1xCYsfdw4f46tVsADdZN91PRB0Jr+N2L6xvSc+c +79DRgCNHvU0MblO7KPDV5PJZq8VgT2+xEr4a0/EIjdLGl8TceOItnUO/5JYVm5fdoGpGVE8xQJ9m +UCzwfx2+VJstzJiGP7IO2CiC2qUnmaUrGJIgLdADCSC/ffaaQNRdQ3mll02xoKbOgtfvAWFDV+RY +llqH0OivlhhAc3YKiO2R7FgqnufCRn9R03emV4ZBhUmz1ecGNkIJiwxaJDtjmxxgjTWVd089D1Wk +DfMhWPHzjy7bLZeUQ/O4jAdGvDU4b0xULUJebbO0XT7z+ajnH0Ak1A49COxpHAz7PF6t/KLQ//Xp +PC9r9y8p/gOL2vxWljczJPs3X6bkMJtTnT2Cgv95Nus2DIrLEZ5dV+gRS5komx+OkPHzfXsl4klx +ZZbzwYWK2SLsp1n2HQw7SIWJUYP9LR8vac9Lf7zM3l1oHKOVmhFoy+gcgj9Jd89lQG9Hbeaq0FvX +mJ7YlvDAXzRmtR+iQNcfTwUwuUnOJDsAs3TUY/9dEecraf/VUq46L8KQOFJ+Z2Ot7RhCgyOaO++L +T3JtCpSAZAcXni5H0TMCXuvlFxdq11oiFuyFRd5PSiAO5b8lLhtq3X5zxRc16gJRV2K8/jptBnjm +SqbAp2NUh6+BgI4Yu6iE5RBIPkts4xTbsgc+Y3mfGnpJ38QBKIsTkEQYDfGIrAeO0s2Zk0MvMqsM +fv8Rw8HRc1znIdWpeCUMF4wBjmGn5u+NyVjkh//OutoVGoU55Ixqi8uSSUmQ6b9z7qsSr0FqAPi2 +FIKLzy0zk3svyXjsGh+MuiLuDx8Ftpqt9TDZd/tJLN/l70o+OHOjKKYwvygfxu9c+hCykwfjMYnO +wtFg2qtZqCtl8u13MZObgJXnx8kWJJHHHSQPa1ZVmPBFChNG3X/dNf4C+klMG9NI3dX8dc18qffE +JA6gicDeUCCU7tMVzsL+htvMq8IEGmgxCEsYcmP1pKh4HsGnFjWqmF874bi045W7Xy/oWgJ1A8DM +wNBxJ/QmQo4b4yfiw0SgRhnFwVC/KLYobtGVipPh4TsbZ/SkBmrHNkvs0O1uGsD4H5w5QWvkmkdr +6i3AJaP1rWMsFNT+5a16xI9U4EjSrEoDjy9YeQLycB5iHZ+mbhTRDiTw2FfCrhgrV3Dbb2xfkFcI +nbiByr96NGY72SinK3EPuz8WAWBb56wQ7uJAmfbHeMDd4B9NuDrVyWrIw/m3Bhntjy4csFTmyeuy +yaXbq14EKHOq0whC9r7fD/K5u1sThF3u4tL4uUPKyIdZIiTKkgA+qOLdZVnkPu3gtQNsNlI/crlO +7i9nsMrXlECauIlFXb4goHp59IdG1l/QhW3+nfr5RPfMgStBK7KPCL3wp7jgjAnXggfZnS3MQYF+ +pEHBpgMXq8YCOMWomrhXUuzGgl/8CXh9cv5Qbx1FrNaX+CN72HXQC2BpaT2YKs08wz2YMe+sOejC +w2cGx0w4qqnihKk1OPSj2n2FGgpls2SXNRMV3nWyinIXJOco/iOnZZO9caJ8SK+s0bj53/CVnrb3 +p7j0LGB1WK1RC2LgDecA5QDDtu2GvLTaWvG0ECgBhJlJq2dG8YYm/UItfQVkzpnwfJop5uM2Y7s7 +1Jd0mmwvOfkj9AsMD+yT6YsQBZ0os5/cZEpISoJgPcdY2AxzdwR76psNOROIavxjDxgHTT8n2q/l +uvDaZv6ADVvA+X1HXys1R4vG86j0TtF9BgCnj8EgmQcXuFSrgHWR7D1DpMc26WmixqSrF4i5OpCV +SQwn5SsTOFdkewaLGMlcL4HtlRLqqKQQ2DsFk2xXe8KfZknPz8UJcgymO7rc+aioEeZEK3XeiiUY +KOWjgc8yt70Q3LPggDr/bNAge29Z7ONZcrLgYNIVGsfjeugA2xaRHLsmMa4edd3jUuVAIhMGuWcI +cAJkOIX4vssob/ks+B7AIzFbLNVRPjXVbPWwDqtrBHjoC+muyuyyOpouUp0FixD4q7JfhlRjjd8I +ksfA9BPma/Rdboo/Uaj1w6ivIDNtRBq7o4mZ/W1ZXRpFC2/2SMKEVuS39ZnBlbEfSoTBqATJPnFk +UVrzgNm8AyzJZcA26q1MzkSEvncCQBV+b3qDQssya/USoSr+qXwRh4giU1pwehDFkUgbsECI9Eyk +VrOAI4fEzl8sAo6xB7e+Njk1sg0YhBhXC0glqOhuSdtAFW579/Yc8iTZRRySEnQV5t4AuOQffy8H +K+VeYGtMI7GPmR1evVkt1Nh/UfPyk/4AztDOEYoAT6HmN/cNYfVcEK2xdmxkQoQtnwFMxziKSAAD +KJmnZfWqM6MNNdRXjz9w6gJ9raoiUGkTOs4dcapcs4a3tzwQnpnWENIuNU06DSXi3eDR2Po/aIpR +MHuOX8K2kD9XQvSc0GXIcA4UhXoAxv81jjf7QOTO2oG9r+78//80dbz0Q9alqcZOD7eBfTzTWoSe +jyctca3ToX8fTSuv4xPQ8eGApjl0bYUHYG02cqiTeQEOcFr0sYycberqgN01Ni5oPQ7ybtfFyXVh +2YAOS2Mg9RJTCjLTF4fm21BsNO5zug4xUvTHLF7Uf+h+oE1RZ4vIpykcFhRCDyx7CMvAS+Bes2Wu +MsBMg891rsuLuohmzetcTip57Q2tQtP1xYFdafl2ZQo7ejsALtY7zH3jXDwIOUp/C3A+5SmDOTFN +GobNr+R9HLEvw6j7eN0ZMGsMgeyxnDzrWK7Fgb5yBm7Pfd8luEMkY3cGejaaMteC369l0vVXxRVb +2vDgAliIURThy11azMESejpuR6yDqGPw3EvyyyCg/gFGW3C30tCwxXfeq6o9sabUEyrSkbpZX016 +pFqDG6KpvEmy302FraxGB+iGGUgASbBivMRfDA0qGaJl6+grXg1TkgsscE09KM8rrHv59nmkUmCD +KIYFh5E5HIex4pGsP1wN/0w5EGpzvD2tPrIS7yJjUic03nruhf24/tLW3l/seJfiD1W8+m3GnSrp +pZOxwbcZeK8TZ9s3bAJiD2aorfzkrw8lck136eL8kEB/ugVYXdIgWqI9kOGB3oW5rgOhi6xWqSxr +G+FTnAfkvpPb3g/7FZkpFfUFmRMjjdG8F5vvhhRQgsUNm9JbeQMJeCOx4qtsbNHgf59ZIWhYQiHv +hz5cyfWNRflvYPoOac8AspKewmqmFqaURNHd1gstoK1JnFPix+wVZRIOLzJIRvqE/tPK+83cFmi2 +KPkR5qNSj7ikOywH5n475R6HXL8R4kX0mrOJ0AfRK0/F2I7q3U/0t7LBsQux3W6ky7Ez4smM3JpU +Sa7nUGdXm9KLKMqY80/hrScXjVxWL2duCd4GvQsmaJeScXity3HYWAZoKU/KGpoV9dSATF8ycVhq +RscyP+CaWv1CDLK0bkv4KnqT0u2cH/0+DUeLC8odhYVZufl7pVAcNaShrYI2BNYiPtGcDBYMF3wG +Z4b0DPDdSvTJujSv/uPNRF7Ydy6qYHyPkw31pTiY9sjXhq5MrQqz7PlCKBNVBBTI3yZD95OalCFV +q5QW260VDk3ucbQYBOtFvJOni8M2UyM1MjRhdbyv/u5SdkOJ00tYRHnbokX34NU6OJYkdGkCy4RO +u7r6sUWVpZrme89lRqA1tTL5bhuUYw/sciXnPo6kpMJe1QDNUtaOPSrRkWPyk1U0kUvMixCYDiGK +I9EoDRpGBjS6sw9hlVF3D+k5htHkFsBjCqF+lJZdQrQiQ1OOBpRGBPR3MB7U7fjiGMfIXvTa5Etk +w+0tqed4+C6kcjEbiXdgqx9Pbc0JeB3ANA3H9g0dyCMtRc6AoOBm9JxXFqdmWnS8SZzaHo1Dn/Ir +h27+b0SPH6dEfxPwxJXahABsdpNeXfzgANTyXUZ9lG0iVtJBFemBrH/3J167mhvkINIwzD4Npg2r +HlGmi+U8UBmTu1TwdJWla0hMyyFUIvQSXDi7INDSzFrwfe2o+t43B+5zgjK7ixDC19kmWEQFgh/0 +7P2vDhFjb7KzhCmsUy+xWxqV9fJH8uGDgKhliu72NC1zBSzlHKhw1TLmNs7YLq5bTWjn8ydWf5wP +qIwBaBOyxhw2USlkrw8FE0QVbSMQ1s9HCozxjPH9Dk3Yz2OIcoMNRY/HNp/DYK0NnhggUyYYgNwZ +lz4kDFNbVNKkuDPnmG/zUv5ZFvU+SOqO81qFrr/VHPchjiJXFmX5lX2L+M+Q7pK93OBfi2sRBfPT +PZeIoUeuf/AcgPByW95boIm2FnmEclvhMREqr2L+yH5jgxuLH04nLiwC3EvbYvh05aHltK57HuMO +2liEWu+/zkcmgMkI1KJ0W0wpQIy4D4ak8LH4i0pj0aib14IVa2PDfVQRurw13wjoD/ad5oH+eKac +/R25KXxz5pdgHIeT+f2hBxiDnH1pUt0EuOyZf0rad1dV0wlPDhf5WxSMhzPKf9P/iXEtGgzvbVRs +4cgxEX0RUYg9OV/TfcUQoe5yrhYYOLhbOASToisscZQ1a3MbjH+04FQbHJHg83Zp8SujzHuT10B3 +fyRvO6B1m66ekVr1T5VD+r1JitoXyaGYP8gUe1FTQp2H3yfYNKwrPmo/WVmfqDBE0wQLUJ4NmF6z +og7gpYE/qoRMni/FUI2iOCGVeFs7VVqfEFdhn689ForGsuH1gYF5Dw4aK037IpoyvtCZvhF+M/5i +boQvnUOrvrZV/ZqDMirXTui3wtZn71XbNjEAyE7eDUpbCcV9QvJvG5hb76ZPd7Bls+U7Ogwjfml1 +8A/1FoauyHIZytRv8DdtDVgPu25f+Ez0vJGnNVGz9CB4sDuQLTO4x32KOVL3ZMLa67PyDQGsEmF1 +fPTLVQDLfNWhouCAZrHXnuWno83Pp8/KIppOXJ1QTQS0nkl3ueD0qTZBlsBIPUvOF+yeQyOSi6gF +wZljwdqQaJ/OMmnClDf8GAgmExR9Lmv2AIT6RvMGWO04L6bDCgOJkWu+K5Zj18nKCZhu0WFR3gSh +qXAy5GISqATLbKUSmGhFNFDXZjZ+McGda3ZbqKMc5fN8CjYQreXkg0jb1xy+ywIubV09iXU2+Z3w +UU+T04g6uXdD8BHI48/3FANL9yqf1WPCCNbl+F0umaYaZKSa8SJdv7IZVfMHn1R+disqq5CKsHgk +R8OMnMOQ6lscJUjqe/drTrIrhpVWMoWlMQ0E8FkPGkIgnHuMExsRWpDSUdJsmJrAEdXxTxJrV0F/ +R7Qb1Sm0aq0TvS4e4AmZcW+rHXSF3oRz5GuNLzW6Zm6kOp8Wo2Nm0Pex4BoCYMXBkWPHMMv3JCpw +KuBGF3+GxuFu5i6zcn26DItHomLy/J95zuwnjksGLHetysLImjtmdzL+R29S7GgVpuD0+RwOdAdb +gVbjGmnuThE9TW1fEnSXrpN5/DTcjZcqcje2FR0Qx/s+oOcxST4xDJlx2Eesp+E8unXHGmu6fjKf +DEdjy0/5zfGmZsY0idVAgOM7DCMd7D1lF3c+Ua6hwFxqPsVgRMXd8avPImMZcSo32A97s5tZiOs8 +xbIAA7+wah+sccsXPiRcZovxBcBeSXEMQR68Yo9dc2j0wxm++RpqLxxz9EC4OWMO0S7i6ci4Wjbh +AFyUFco1T7hgbMVonZZ2vY6+p1d0MoyOgYsBXYL4E2v8USWQfQOI3+F+7HKSIEo4CvvNyZHvzvS+ +RLAoyCCdFEw4ehpeutJxE/Zd4rHzaSy3IkkcDQ+AFnbxT6MhwVvjsbZqeKEale0va7t4TO9llJ+g +5zfS6yZsn708+Uxz+spPNJLxLcjcQw3VhvsmHeacFHdmd9MtKqqFnwVDphZ3ihCNGs8UPHCNk1/U +ESH3U6reZv9ERy3g9NLQmCQoaDXpRtKMfde1VsIwC0U3Yf9zFNRPUgFyMm0dcFqtgk5UVDuqy4Rt +P0C3cWB+56XTniDK9rqtTpKo1/1VWIwNHcW0rAUV7ZKRxZhlofl5ezjLJAINHzvGxY3wuTUxv3y8 +8MC0JtEGqhm1eOmy+wSrTOplMHWqRla7dW7c01JfmwmTw45kl0PYhEl+MLzGKHCWa2DmOIObN/ET +nemIusANLbcRGiZqIFDX1PXURhDull74wYQOCpLtrTcgSWrTqTK58V66djF3oEnfcGeydi2YNnaP +Gjkap//kTCTFlr6Ua4hJDfJ8A6YBtEdj6AJ+hBbSSmtzegYlhQTjXqNkduYlG9QHVVof65czMTmo +pQJb67yn99YibvxEyNeWM+QVuwHMAWPZh4QfwkTqQMXvsD0szBu2N9h3RDauuLPMILY7KrkzhQKJ +w7xvA0aZcnyuJfHwCwrINgGu30AEA5Cc4IdZAMNqJaUPSkp65uQWx/k4AlXJkzn6kzxmo+KsbGhN +TnC0KI3vXnVY4exX7VfpmA4M+xYq+XwHPBGaSvSushNOyqwTchHqieGRgcaWrF7GNZSJq2obiGbf +eKt23Qcz57nQ6zch8k8ZuF5gf1qrU2EEWgdAnuRVy98Mf1qNOQ9ROZMzwZfzLeoOS06W2lQvLbMH +gnv/e3OuC1F+pBoIh4H1jv7VM/b0YO/xql94d/XvTH9G49vO1JCgiZgJ1vS0sIdhBEVdSF/L2pS2 +FWnOpeJvNzNswoLKuA5yL/O/Hn+dLpFRr2bB4+vFIKiPY1KEEJ8LhyC0ogXRGx536OUD4opAWulf +JzJ3cUHbC2jEGyfqdwdoZLNusaIxxzGbobDIfTMRi8dz+uYW65DeNdJYg1GiIdo12BpvaCmQkl7L +9VAkcq1pokwZ58Naby3l1HnTxn28Pvdwc5eskYbXxSQFLL77SoBEX68DTk2y8Fi7j4zd7NW8ESfX +JNJBF/WvmunC9lMu/d79mtLJp/NRFp+rUZvG32aenXmitgpAfXDWd1O1/Z6AOLV0I9nHSAxTkoYZ +UwjvMI2CjbHixvCvdIYqSewgPUPqNQgbn7w5DYWuUdZyb+bjfmYe9/tTJ1PNhE4KnkVeCYIYVaFn +rNyDvhufWq/NpcN/jMolVyRzBq0QSQPb5/XqGct3vZDA1sJwwV47FUHgbZvRDvfApilUCX6aYRZZ +dTYFJRfZtaIq9J/+dcrFlBCXZEzgqDgjBOWnDFnkQPZaW72/FZhxYfH+dMWTRG8gVIwzcNiAEmwC +9K1Z5v+ID0Y7cZ3i1ZuXQFswhNIua9IDBD+YeMFHvtyhoNjqdyQ0HlhNTxIh48prJmPdNZsrpkiU +j5th2mbe6Wuzjz7Yk6gG+0yDLkDPzt9yMF5e82YB9nh1RTEQgi/6EabQC7X++nYKnjIXQCIlThcz +Trp4G8X/iScZlNXHfBXnA95EXduWI0yo8vT4elW7Rdgb1E79CDmX3+uHutNd0ajCmHgpNKhMhQip +vpWd7QjcgcS5ewrJ5gyZuWrvgiUVAUB6Omr5zYkZoiDFOKO/GG40pNH4U2qvawCL6FFVfhtNYaJL +DrBXXbyZQ6hy6O6fXZxV5AEjowMwlcrGJcdLLOwPK5gaB8AL1NFVxtH/uMNq1gzNP2L7GhI2gUQV +3w4AmfdD4XUdG3RQUjlM56KpMPy2uHvZuXI1YksT5k5FV6ZGvx5NgcXqgAW6z8Tc3jRwFKpjgyz7 +DivLvevgkiguf4C8yOT0L91RCzIfXj6Bqf377jSCW/kg5PpPQZpZfZ9U/x9xwqRlo30gk/5LpiYH +S9ADPtHrfw7MjqDX9WmCsbXNq0CMgX9bhXgJvtDGn6Mq1Xibkcn1Zn4bwT8tdw9D5qBHZSHaLnTz +pPwqeESAvw16zAJaF538n2Umu6YBcy+ArEWNtUb2TUdPvtca9aG0g16lqFlF1zS1zWuF9LDqPj3/ +pLBM+b8/uyGuo/WhSkZIuaF0PTY5F61r17Ti84LXDdYKK79a4WZ01SrkjQM+2AP0CRiyTJiNJJt4 +DFWyoIe17WrFXzELFnNd7qcTPCpelvmdXPc2R6buwTF1+ZYKi5hT01gLxNnffyb+CY+1+1PNc/Oi +MikBftnScQBS/pPJS3ZxjB6X9JKjANGQDap+cO2ZWondubJRMWS+c6NoODfzesusLX0eq8am5Rr1 +l1ZSEdTAjf3abrcKaN+E8WmYG9hQa59fboBkozWoXP8j2HArpKNtrSFWQSCywZk8CPQeAYoor1JY +VJ1Ivo89hI/fMp+vQsSHsZBovfLqKey12btj879SSXZOZlka/k0lRiOPVURfnXxfTB1Q/rPPSD9n +D1J7tMf1ZQUX/eaGZDSFKISWCDyIBHRHTdg/HmkP2bjyncjmDWe1goU6QLbMYe79ExejUHvULOxB +L4JQvFRdJDjKvP2MnfVzgkdaIP+mTVHy8skrfc+6r1uWGM9Q1wasWPkrXBy5ItKDkM1uPTIcMilZ +y4z97ZjWWkWs1nV05UnU5rJK7Grm+EUkuhv6IQ3xLX4ccV3nqqX3Yp7mVp4EGqtaLcrPNk7txclN +UJaZMcGjeeWvG6dE/8HcL++LSIF/huiC4LheZm+iwjVXYzFmYMA0usC10LV2nxmH5GHIKlHt8MY1 +x4UN5vfZfL4J/+nYDZBpSDU/Pfxk/F5FbUy2MD2xYJVW6hlXELxoBG+19kzjHF+uOnGpm8XxPttG +qRRA0/Lh64K9Bf0O17pO42CV1fExn93O9JTSflSiOwc3avJP0pzsMMHH7UTSKl39ZCUIuxNySA6T +zhk7Iar1aR9ArbN1douxyzHH2Bs4yyRkydy899b4/pUIW9wfjV/ijafNnuXsI3aykcq9kvJTFhhu +2BFLPE2SKGwsovkFUnQnonu1jV2v7DhJQ88qhUrXfPlZeKaUZ22BSGAH8XXesSzA/RMrlFVFe9+c +MMdsbDZ8GWyYHScxjusOgDJ+k+k0VG61oCgWMLSrnEv9VSCP56h1YIq7Y/tWy6Nz/OCpKYI9Did0 +7y5btei3MqC86KBuFEcuVcFooiECSBtgrOS6mQKYiLkiwtg7e7cs5XnKHIhQLZKXAg4bBO0agmzD +QNjJi3Ic+HP+NSzFDA14Iuwnww9qytgpHGPwH7/7R7NoALrf3PpYdPZ9Yubq6qZ54EtGs1t9icTf +XasRyiL6gX0J9v8/ZhEBOlHscWRLw3bakB6TlNPvsOu1Uj52vioxuuBiWVS7DvYVz311rnf7YWdR +2pSDFlalboADp94bVs3aFPpHjn1IGjwatxy9XLR0jwhvTo8e82V4SUzlzrmsq4zSR/BcSZRu9Shp +iV17oei06JwfNIcAgQTFNQRKDmNugiWANIgRQMUisTWnh1rnWjHULRnVnCyPHwnn8oM350WpEU73 +CPyB/+kEDZiXy/6jd4wrNuIlarDixI95jx/HSY3iJNPju5hU9mDUHyk4v5iPPCCKRHK8BjOuCZGz +iJzRFQOSbGyw/W1QvyAbzR1YtQfEvF34BQ0Vz6E29t9R41pFqoXFPQDuh16sD4dzLx7oQpwqydB8 +GEa29nyIFTBSsBrDxBItb3kpS5fQYD9SKkGka+255IedKSAybsK1whKq6ISaCyA5na+XzuGdsG0w +ZJVcvoRWyRMLO7SxdEZpXAgFRDDPKiRTAL9ziXFa7+ZhkdY7Au82/4tmfLo4awYrf+HnrNzQYgN/ +c0WhJdoM6nJ/d40Z+WjszioA7A05Lk2XBLkdoynR6h4ZM88YBQ8g82Gpn7Q64IbpsNKkbHHTA6+8 +NhzUNmbSZIHgAVmz9fIdddqq4DVkxjrjYfOSNbTt4MKVRP2RscMm+xkrIMtIQm9Mfdup0QCr2Kyz +Xamjonb01RxX7ie1dSBRJ+GINsqefX6HE3kRvK5NZBa3sH9FY2mT1DLlnKS26spqDbu1OlIlZeGH +TpcL22BE8zXVWXGHtjkDDSn27QfqAAx1JuRkc3rOVV+IOCjnpJuUlaikS5BuSIvkXSd9sxZlHQtE +LE9Orm12saru0HFZrpfRTTD00e8DJNuZFyqQ4eDtCURkx5VjIGKSje1UWRtzjfsU9aFVHoSqQxEu +NbJ6HXTlpTqQC8aw/gPHvLmu0Hjyq9s/BN4s1HqbCMq7NTO5Mi3kZFx/lvDGSvCEAyq1x+8vKZ0h +/71dIbFLG8cHBBM+1uSmj8gA/zTCK0H4FrJwnKpGO2th4aA5WS3WDIkThlmW0HO4g3mKEwu0tIVF +XZ0N5ALA6foamaEpID+kKWZbsTerFsNaovdazGlwEsVV/wZcEczGJBafMHoEFk5FjVGObSmJ1It1 +HlEQ27b82qnFh5FxKSMgTwNMz8PWrwPwE3NBim8+1f1U5bVJj3AnmEsQU1caprWOGFKRNHXSBjgP +DhGLkH00jskbDouXFp3kPw9gS01TaCSwIjNEOCNa2TyCvUIlvm6D2m6II5vMBGljb0JVIt1WEryN +lHThohDxnr86VH7XhMW/tws1ttJRLCFcyzvR3q4DCYO3nRdTjPz9X0uZ+pr6taLUXr+avI+qylTi +4KZQi0mvfhXZ/CKXbLc4sfaivHLgYcfnPmWIKcltfHEN5M806e5iToqm1auEAL+s11fPkixZBDI0 +0UU64lsLRnSSvE1ip8XhsZzWcar/p2WTmUkC3dnhZGo5dYjlQb+cPksTeqLTQEInAv5tA9rtpLC2 +7jbfnAko4JzckIlG/KoQ9ctsts7zKcRznC6MIx9CB0n4k6zWs5z0mZ/sEQw0okNXVGmBQWXLMY04 +X8hTCXVAwmjzD512pJ9VqBKh1LAC3j5fuNwAGrtEJ9J3DuzBjqQG+OcWODenIxLKw3MhxYmpQVrE +xejEX9+MAT1xLYqVBZtcGq83IrWz5JmG39Tft1/nFSLRbUxzMWRtBCDcVavOON3CRnNCvXutRu80 +Yhyw2qoBCss8wRV008iPcVvfbDbGuLqr+/vfEWT62QPzx63PBC8kXVOXxrrV6wKb6JhBxl5WqV4Y +MIaMKiQf9SybQ8AWLQRI9vwGGptjbgNlVEFWcIktiyfSV4QVrXpTrRj8r5CsgZ4lb2NLvukVea4J +GkBAwXjUQIiWXveBSwaMZoU7wOoPHxPs5n9lGQXGiTOxEUdONYkF/bBmgUyyFtovXRHJpVruish7 +8fqAyzam4C+P5+1s2DAEfgw8YdtZ1xI11HxVZtbIg3ksIpObczfPMUZeZRByhPoIfJF7kmqFPq9h +ScXRLJJzEoB0Q7ppMpLnS0DatHqdoLYNKyKBatXOz47oNgVJJbZ97CsOb0lqWnU6CGZqHPuNkS4W +KFu3HEHTKhwwML/2KOwkGjWSxM/ozRb4Nooote/8i2Qm0Ue1a6NjFiUF7e8VAK3tWZWkAzDxmSsL +niVF43+oVVZUHmqP+y20cB2iUGvM5Nvb4eyVyx1bTIFZ82e0uUO/xvcPm5b4bXpWdMLzAzLucDGF +EFSdg6AqRp2XwAbT9tsmKG1J/+S0Odkd8xsClq9rFKNyXJygddcUj/f3YQEA22Gl4G9tio+2jMtD +67rW3P4hCuw8blDGlwi1pbrS+4o1mGHDAEsN4E7ilFNaYItFJiowtsTKBFwib0c3mns4PI1ctV37 +J4hMbSQAxe07h3ehmffo2uuD+yw+O0gvNVPaZwPhVBnaMe4l+Tm0TBGwklpkLjE/FhC/Kq//VXmX +L36UME7xH363dZo7nLXM9Nd+O0fsBnzQBLnaxRf/pCDkMeoTXas7uKRgGS4mlFWE1ls/iwYL9wCF +l/KbbVxNGALJKelIXhxBRc+VbsI/SSlkjVGXef8Mwj9Bb38JiaMNsB1ym7JNZ3uk4xjAxobaoffD +bujYWBrr66ZkIA+XBY5y18Fnu0LjhA60coweVVDHmXZM5HixeL7E/+Nnm/Uh5RRmcz8rDV1sGlN6 +PZZxt9px7kfaTZKO1fKf2CLS9ziYh0zQ8mEbkYPylr08ysv6LG1uK9bpAPXNP+VQ5/ecGOJQn3W1 +rnoAaKM9lzvy5w/4ER3LK8yZlJlYQUZaPnaLUYL8/WXW7HxW1Ma49JWCnd9idKlg4LfXNMsMVFWb +O99L/D8a5XJz8OBWGoH4SlSrvZ4D5KSsb6NfVtRgsMpvjmwQT+R/NYZYIdh7OlIQnveaVHzeUxe5 +ZAFNotO/ImjEsPn6ZqGDHij+Bnt1/dggV1zZfjlzE+1dI+TtYTLpxQUDFj0MjdWeyAMnOg4Ga8u7 +hrVnPXnTRQCiuwNmlJgwRahWBNQUYO1r6xEbNexXxJqAmAJk3YymX0cSFHX9Fa73SnLOvLtNCZpi +v/jpMZ+CFqk01ccINaZ2A0VRR8r8Vf+ZFp/Io8mxXLky4zLiXbsEqELUVxjZGOMNEBGHnCA50MAb +J3mTRGTRBJcZTOVWti8uVfAreHU5ZAqz1YAZt4CsV5Z0amo6AKoQr6hn/+/Wn/+7sYnH7hcT+W46 +qJZmQIIBQG4kVR5EnYA71FozB3LvPvi71GJhgS388l3kzDtH63d+K8JB2wCGphYTOjJQoxBIME/t +4IGOV1z+FRtKwMvogFuO4MwcsvT/b6RIS+ZqyfLGX3dbfRCjsPW0TT0I/x/p0H+Ov3nV2FmAuHsG +fI3gnE4WkPxBSW0Ksv6ficlLvfq5hdFiRlZ6LlLyqm9J4TJ36JkfwSJgjxuz331ovAci4LFH2D0o +0NnUXRhRReOsthqTmb0apkUcxAWbci2rE+tbEoL97oe/zyjzI0YOTGBkcc5F+cEJ9HBBq28AA5lp +SKURGkO2tslAk0QZ1bLyjt5knEPOnztcPJ3vP4J7VJfcg34hgkAJpAkJwZOQ622INM5V0ES7aL3R +K2tUW/p9JyLrlCmyPsGM6uqifiro/NC2VbjBgaprhk09bvgsXTZPUBuC/lG3DgcW/CTcNa8jAxoK +JZaF4sA1kHD3RarpBiORKKJZh4iyfxYJDpg22wcWd/hEzGxIcmNeMx1UxJdE6evlcLyCBzbf3Vyd +qyB9+9AS7aySSxPBJU3HdbmUdg6iYaFS9nl6IIWDTE6xli0gBeOJPa6tHFitHnHHLM2gRUq3aBXA +2oqIgfj+DfK5JbtnMRqlgcPRNyBAixyEOrlx2mbfutwtPjzwU5pcXO1gOiJuk/zWITQo2Tn1nx3l +TgiuhIRtCZf5MGaD8nXiXI6tt4/MCxsDt4PHaheWnKJeCzfWa0kDg8qLnXR61SkjtYSDN2BOgXK5 +a3+3o5ydnaDG92L8ArgnuvA2sZC3eNQN972TIHmxxuga2zD2akE9CZP1ldDsnPwB+K4R+hkV4Mb0 +mDWfM0SvF/gpba/znjgK3axrmW0rzZ8sz6NGPxnTkqGZH4LLROcnLtjJ38jz4EfQOowodMAy2xi2 +VuvRIOiR2vPMIEYiPQSNWTiPDGz6mPVNFtfqC0HzIA4A+t5VsFlNiQ7D8AsQA3bHFnuxkX+Zdd2l +bgCgWqzNo2BWK8Ams553X8gx16YCPRD6ErNympy5MLFeGnw6UVhCmjfPZY/OlOvJ+78ApaRCvn4p +f+awremThDlaWhV9idk4ov402szxVAbryehhSK2NdXndEu2jjXg2wzSwGm8A5o4oU9hBlGwp5aCn +wJUTLDflD1aPYMPpSGdy+C17scSaS/RHMoE2nk7nx4CXAkQOTW6J/xpDKl5J0MN+8h2VHODunKL4 +a02zyZfpeoHcFvUcF7k+9wa2UiolVpuzqF7aBP6QOMXQpaOTqwRKFDIjlfFMslTPuNlmjY5sPyMB +dFTGhI4EqzwsneO32D8W3+sOyfa99Wb5s4tqVk2Ttir2YvqIf538BjI3G80aa0tW6YbLpALSWlUd +jgtTgJzKmAidoD0KRRYsJsTEPk1qxiGf3YWhZ2iNGBtJdANWyWTkbxL43aFJB+Zw3S35F9GoiFsJ +MT3ccJewa8/rNCtJd277fq9QF9pZUTsg/52GE6A0byGMFrN6XhsWpQZAcgWdnxPieLA/HffEfNTq +KN7HBIl45E9tV8AW8Dk4Gk/2CRVRa6779fnG3hluICvtWLmyShK8BDqkS+CHD8cTNicYs1Es78BX +hzsk2pZhpcl0sOTjbu7S7C6pS2o+GoQV+cZ0caT/QjGPi6m25WxMcufi4NyEqAKYHRmbXBZ3TeMk +7QEaYbuoNQnQlIW7OPuj2b5dPiGQIa1K2F1GVsRUazgVQGHKb0lYP44u0kdf50oHrZm8t57pkO1T +v0pGiOuJt8fUxX/SIoc1uzh0ctZgR6rXiwxX7VwP13x9k39rbunKuysE7uVCqoHvcm43QvzpHoy2 +j0K4JbNQYXApj8quEQZyncczIw3fSCSCb/5VWoJB/srNzsIwBC4GKJyOkqp/LIEo4uLg281lLQdM +wvH9qRMuG2O07GXkowJJWA1zZeVHe6TGsEVp8cmGwUCtrgU4M9LrdMttosbmNN3X2q6MJX+7FdPN +2rl5fR2TiT//l4j0mKIkcbMZZ49nOGk/05qtE9cFYkC2rezozu8TMzl9wQs31jbEx942Ni9pa/kf +MYo/R5naeQtcgEMN2eC69lC4Ayin1wXF2ls8kHDoGGbHUj0eDGFDL1b1OiUo17cOLxVsOH55WkRn +Adntu3iwKy8IV1IeCdA7CljqRcnS5QHuDI7osY/pTUE7eVqdyyXf49qLAWrc1uNg55otIKhGH1wC +t8FuiUl4wuQl9Njn40Mm8I7XZZSBeg8gZ9jYY78usrwxL5F+5ev9EYhICATdMvExJ5hiBOQ5Sel7 +q5mNTsQcP70Ga/McXIgq1Z3a28Qh9CmM5yc2pV3Vh5M/g86luj5LJeHZQOsTsY1tWXAJ52Ep7sBI +92cKpr5ypfw6LRkhR+/L8nSDlybaS8Sc2Yxd0z4k0uUzjMMoo558n0SNi1ZjzNBYVezNfLFgnKc6 +9Ak14tCnHmp97TnUyYySXftWVIsA9m2xhSqjlOc/QkBB+TlxHhX7hZitNVafyASyPj9l/hPbI8JC +eYIkt/VKFwVDcGwU4DEceqf3Vm2AZBTLJJyYVlf0WN/CL8RixospbZanNzoq2VJtz+Io/g4RK2jU +KjBGvQQyVZphBmzyO0/DZfkuBfMlcM81uh1zmaKEtCdkjA7llF/G7wL4evJo6HyKLKZkgDHsIr8S +rVpN1uN2E9gSSHyPXkZMmGFnDGvNFFlVKM+3EJGGRKEBctA/qXO+BZFK9PdzJ/0t330NdzDoZd40 ++iLe/xuMVWivXmzxYC3KsU1h06GQnT6efn2ZnX/nzoBEikFD+OCSTvKU6wJjTVRr3mPz052+2GXL +aIk23U+0vksM3plnkNEZaqT8rIktJ4qaaEtpS36EewMnv65WtMF4u5JowCltaUuWdjXnJ7F1pAcw +7V/kRIKuuVbv+TLu+Pd8JzpxX4JILMEM/ehi+0VSMnJvfVklvLDL6jvDiSnIVk8YUTfsyOqSiaRy +oaaFeWMLCKipR9V2CzqTe2WolsLxDQQQlJhCNfkr0pJ+uVsUmnlXbeEhC8yZvGGoEcQlq7dHMuYL +lLwHdq0afOVnnYFBgudv9p9oybNY68NANE+YGoTBbRsnfPAzdeAg5whnF5m9JmPobqyxqKQLYoDP +nIQNt4kpJSJBK0iMR3Ec6K9WizhRokiAKinO8/5qYBJPtswtKiWY9vIADJqNBETZvJi+q+NEZxCr +nh/583Tmo1VmZLJVqPjN5ubPhOGAfcRHDwYm7/DHXblhrt6n2mfBj+Aharqc+uUQhwIdDbp6p+yL +vds1H4j2n9NebH6gbwNDjCmfCbUvi/dubf+Vx7jqZsLN5qQO5JuCU2lKH8OkrE0Iln9FOBRfaNhu +346yFcvJK4JBzsnZzcCiS2HXgSOZlsnXY6/qztMmq1NbcX9LQFw2/k57CdUsVqy+kvLwYD0E3B1D +R2MmBGWuIC42Q4dukJzhnyudb7Tfs7dzuLJ7VFhdKoQyixX8jF0x8S0W/bbtrhoS/4mWP8i/pSbx +JUlmVgiuxZ7AzuY6wRXoVSaqOPlx+Ahv4QrZrzZT1FbgfnXqXPEk7WOqDFKEI0VmIg13hflrGJBm ++A0BSGCQAWW7/KwCMBxbTLMyohPPUHAHjHJCBJ/byIQapEcQFg6kRwdBTT4veWCgx8oqKHY7+WxW +M+6P1eOzFtZQcQCQtMtA9eNE5GzQIQu7RtoTpi0yeEsAg5t3vSakK9HqvZDKWMU2MDUj0fcElaBn +2fwUb8GQ/GTgukFYO62awfBcjEUjJW2RjdupC85S134R0aKWKd/n8AvP2anM/K3C/X4DUtGydejm +XP1kfP950L8zOV7ExVoLJtvSBDbST2sa6Nha3/FXFoRVzDUVgL5MTtdRYHMfjcK0tL80Jb/HKjhL +XK57b4V+Q0DOadHGjHEUePZTZKbvmnMM8v8AKaKLKkXERQ6dI8sMry3yZ9pldeeCp8GQ/ucUym1P +4fIoDs1sApFqtP0NBVjMFCAtebI8NqDhDsy3zij18dm2xVtLws1CDOJvTXmjSVMZA/76QVgIpxnH +FG8wYdHSU/8nE2QDtHKm+iyG200crGDkeAWhjeCjvJKWpG7hZJNSybW9sKz/uMgrQEbW9K1ESvdK +jiTEMEuOpFxiq4nT9VZ1erexvXCspvU0zZSukj8bSAmwwKFkD/BMLVk4s0KO4g6LryJy6W44RZee +g7DxHtFfHkumlenTGbySANIefZoZ/B5xdD8NWdDnSnprGa0WAf1G30RLWJ5sd/Sm1gb+gkDUJvjz +QpDLLlASjREoY+QO5+RvUBpe+brZPzJC4ZSe1RN3T2A94OCsS0p5v/E7Ii3Zlyo03G/6gMYKvEmH +tHwogm3Itvh2fdJxnKw6y+L5VbTK/uuGkByJjcUGvtsFO5qKg1jbeWTV3A9xZaig+fpHdfSXFvpk +OGVGbgdM4PCIcUKfkXFfEOeR5DS5HNONjmkofhZdoHHMopbrVwbIkaSumT7Pvl8EHhCBJrhXvHrE +FEB7nFpMYLt92FyOMNmhGTCZsvj3pZff/eny4j+FaSzn4JyFVJiXi0uylH+LB6IsdEtTwqM4xInq +TS6EwBeq91918UdHJwIwwEjNwWGmFjdqE88C+BqC9mYWYadOcT8vYls8WAPI1LQMLO2XNDm96AxN +kCvXr0zMN3k2P77TRjFdXfUW2BwyWCjuZfJXAzo+KQut+N1mhWIhOQqZkxLTne2tLP6WQwM1zdrH +gwvyzpEPA6rsJ+w1BHt9AGtLi51PCFR5A5Q+ocE5zYS3rH/Wbo7cpW6+0Ua0yF+VnMD0iXMVHBKi +OuGkb4IlnKzUV/JvHSvjcoYbBFxvLMf84rFjSolvCsMY5uyAcwgRiAbBvUMWbb7fFES464D7f5gl +ywlJCKqjsYKYg/6EZvtOnXWzXStXXSmo1+3xXixCoE2OOvFgDQYDLVb36uGF7I9RK47WGcU0fC8m +PrejeStwYEdQn5gYFlpVCI624t6EgeDl5kBU99mV2crDsVgQ6PbGMP4ZdgbYfbBx1VjH1U9NqYh7 +ivBmBdxt5z2T2C2LSi70PQch1U4ANw2Jog9IX4i8Q4iWtdqwvKL2/LUgB7ICaPliDgrx9eXxhhxV +FQfnclzm5RqtEL8YvsMiFS+97cFEQaMTpBOpYSZBoMJAaxY8pEQ9ySMZ+MdxKBUAk7uMhdpIK2yQ +s+y+4+OQgqyfPah8lhuODCuWGRd7m6pL0tOM0J8ifrbBqqlJPLsLx/NjoS+DfTQprkmRaGxJklEb +ZKQoUnFPxVsPOgHxu141DfwscwE2XTptOZVYKewJTvROnhA6Eif/RucZatmRqxmdN7q/QaxQufme +5nWs7/E8uy8xZNa1CfxEiLyNPIf+qlAdlL/wxtmv2ArQMXJ8bedKc4D0jTqQszb/U5GSWQ+Pd9R5 +b8kLDfMfhjSq9FQN+USkoPNZ7ZAUoArCVAkZvUaaoCyy79jrLd2hvaTfQlXzh5EJHW81twRBb4Ug +blLNlP4LJXWfA3cYQ8xCeQeO7dzDoyZdHznrpkrQkVn3aXYzX9SFw7BywCULaPw8loEfYUOvBO3K +Tibc2Hx9jmKqHJmbtKeKK1gkO+xHldzfDEVylwTe8731F5hs5P84Bdrrqsus3wOaZdecCClFzwXV +KrfgSgtBQnIaXrDlmN/3vVZrPCv7jsFJ9k0fcxscaz5CXx4ywG6f5sfKTh4jKCUDSh1XyxiLB3rs +P7wxEEMw1gLfMkFJ+ky/4oPWxakD/pDGdMTLUuy7cQEDpCyXKOGYKoc/CYzCz3o3M9LrBjEM/ilb +mLLaiYC+i//+3DLdILJkSIOdWFUtwuEOljltC3LFG56/fBcE/nWrqC9rhESrXmylxulog2PGYuZK +Mf63g4rCGagwHWhPNHSnOUwpqna0ucEmthfX0rMQ1pYPCOqQJJ2nxXK/2Xnu3oLwciDPS57rnjqe +CEalsqR6OEUoW4VMCyYHzpYfsiT+2UQwYanw4yLTGYmQeXdF/yLHr8qGlCpIeR6TwMzwlmEzXEOr +wuIL9iuoD9HtdSc8JHNOkqkCpLQandnKUoJDMKiiBRqieAe/MuDclI5HDGgQAANEOlG9EwFWznA4 +FPPqCuOaIlxuqW5aXFQrDMHsI+qJjT5FxkR6LzXFID99mYMneoOQeY9bTwMQw8RrW3m2zlSwf3iH +rKwx1nCPd5kGrNQ/EkHto3uCnapkIeGwlWaMEk08XUVLRJh25YRY0LBrO5njZnOwhIYYxRnoH00n +mtn+Ky6kPbMEOYtvLLzlmCIFpSnFYhcZhCkU6j66P+kRtzAg09LM6luPsngldamC8t9zSUz7nbbs ++oItL6bzN/ezxRQ9CXhD+Eu56sknwr1aONMjvLJFtMMsYRrB7f1Xgz9/AFQ4fZtebgMH94caKHwP +S2IuzDpuL9ypxYPqqyX+YiHz8fj0mvAbWSbDu598XEE2/s91XhfisXm5ZXqWkX57vujjKhRt3BOa +QPCrbpWoUe8wSWf92+X1pGtAg9uYvJlrRLzUIUIGpMGkkjjSTlv13yW8QoVkt77MbmftQHEAXu1T +Co/U9W7b3IQjbPf/zU3GhUOjeaP2TxeXblh55nzrxd12I4+WywHauD1/2uav3VnZbmyHvutehPMa +vOFFvM7kkYBfpKogNWr37grha0yJTAn0B+xNQvykreUWDe7yR+F9xcWjIunvZdEp3CTbhlCQd/w0 +NDL3PjRsRdQlC1wq/wcGaq4dwoYnImI+E2bxO9xOndiNBVh89BmwZ4h6yOtjcBerKAYTSYEoWbJu +pkhbwEcEbLw+20CGIRsX/GoYaksr6slXqlYW9IuU95RvvN1cv65+m1hT08ETDPwNMH1c5jHmZte2 +o24q7v+S+WvLyCIiBr6zx5TKhKc/ENSbycQb9+0DNsGLjpsioH/TZuq9TI7lH0TXbWqsH345RKwL +itxRr5OD3efncWIeEAhsQ0yhb/37FO2ubrbdQRWvLoLmBJ2a7FlFt0H/01JtE2N7BgG6rEFoZM4l +78HIjViEmJRrhzuH4w95PSLvTnZxLDEeYeIGuqSCJAfhvn38RIFbRnCqvLYdUM+QyNsE4qZ5r05F +VQNCibf30lzd3WJVJnBNqBWaQInoqaEd5NhNOeObhn7RcmypCRUOBTcj8JVeuds6RjJqRJ2kVPSt +NXTrNV8ew8yS/RdIZ5O92Xk68HoqdqY6tIr19b/5SWqfnQJoDhFmluc+au4O6YxI9fT5SqEBMVUB +HUUUOYUER6kARjw48NPRqwHEligHycfHRw8QLdnPoGBG8pT2R5ayQOJPJjt5XgwCY+UMLoTKlgIZ +BL4z1U6saVCC6TXZVcEvT61B5/3yK9RAkJtLAJm65rgykGs/wlcg++q7SVDWZHAb5rqkxR2NHW3a +UORVVhncrZXg9aGz5iV6PPaE/EUWFsenInNR+ZGPVjLUjtWCFT+qSEyxbg+z6JgXp9TxKW7782rO +FsZkq1cFKbDn1lgNYqRTUqdiIQIjJtK4SGqQvAa3dUv05jh5MhhawX/w7hBP24IOQhiHRaFGL7k5 +fw9TZjEoLfQE7GZ1pXQMTPwMGbO6KkCUEOiwUNI9kOijfzd/oe+lolTpUKf/BYiHgR0RlomPvFhQ +1828ynyO5GcAU67DaUsjPocTD4N+wL9w39JQWTxzXnxeQDZIEm1Hei8M92Nky/K799rxM4MkZRTV +DK4HU1tMdRWz/laFp0bxysIvP7dEzxPh5IphpE/UDrXHiD6HCdT2LlXnvcsjqTutVWW2LT4ZMO74 +tnxx5izGoqkfW/dBycEW7mqb+yDrA+FLCnCcRmCf9HA3bEYdww+JHdsHjfdXGtjcf7PQmy8IHc5c +8sJol4dYoI/jsQXvYf7DRa/pX+Lkj4qQJULlLfNSfhj7x7I42X2lVHk8XBSsGWusY/QMjjhNU3Mr +OxDtj0g5OwpAkkARL4aXam0MHAj0dSeVUmUWROlth6hgDdI3mFvlGb+vn2KBl9IGpSj5pPS+DyVT +1Y65GtKurpgOTfQl7nv5I4yk/cig0D8hb4yMP/23a9QU/gHBPYljPAJEo2mOywcGeZCkTWTwshsF +pqmK0JUZ0QtPL4klztHfvFEeTBpB8iPia35ri+ka5LN738mFEhZgbKI40ivo9KOBCnQJASwVlnY0 +69zVbyJamvw5iSbUCF5pFvr8eH9nvL2JEBKGB71ne4gyW1lP7wbOXyQKey48aeBwPpPuGyYscMw4 ++Ilbqnhuoot2Fqx/RcpNp/GIcTGylHhxTylfNZlBryuWowA5bJyf2++pRsvNz/T9cBYjQUxrhMft +P7EMONLwmT9XWNBFluJPnoJ/BoUPYh+3A5jXIwYo/cJK4jtacXSTQZPWyeg6jsEqRiYlwLMPyXOU +g/6N8+CvfAV3i41QD28afMFi3gsTciSp878dHGWJWRbq0xmRYUJL3J6igTRRKRnR5KV9WFVZWSa2 +5A/Q9UP4IY6Blz6KtqeZ0DfJC+UAGmOnJ4hKQdvDwhfhAoISOyMishHF4Pxw0V97TSeYMr8igguF +9Uxw7461wgv6q0ALTlKbT4865fI3R21blh/AVi3MQOl1ZpKEnpBbtg7vs3O99d/0Pf5xA5hvXKQP +lE5YZmRyS9WesBQs2fpqoN75ySfi40mryMu5y/i+2OZzIIWBST+uDnS3g1XexkZeKiuzWUKkiJOr +7ozlm+Aa9FvwpGBu0viv1/nPXoRXXE1Vf1p47kNiplm4nXVxpt2MCm7J10kUb9kI8Oaf7FvYHxbO +mb1lNlTSSA0l1uFGSJDc0YRp8ZfWsuIksY6E7wjwy889yz1LVU87AWqNYNbbhg65Dvw1Ep9fOmFX +lTJtBZRdVRG1omHrkRPF2ZYzz+JWY/+IqRGwlB+N70F8QxBt879q6Ulii+dqNMwHg6pyxKLMRKQP +aROZlD3MTQrh1h0BJ4migQxvSOUXVtTtt5r7tC8UjuHRSSBXpqzIPqs0jLK4g3iIIaLTGblQSJgW +yoUYVZFMvnoaBSuR0wCQuK/pyBvvtCwd3sOk/oSidKG2xZdVxOmxlk8wuh/nte1NfsORUkTkWlVb +Cgy32Ver6AL7t6V6h/yC8w7LcRqiGz+ZFW7pjGylvRCjdEVnp1JxuG64VViDZNY+1H8WtifNo4cV +LQS/uzzYFgb4SrFaM6uyWl5avyN3xB295SuK29RjlmvtVthW833X22LVQ+xDQPTN3gbnr/9oFE66 +CJIMFgo4pqt6gFEmtFqWoPhyT/XdHZb9y5rGh+AIjNZl7vf/eBKV8hYA1XNhZBoadIyjD4JGFN8B +UogoDmklwlMWhlYRY1TfSEyqDp74UcoGZXm8Bl2wViibdiIX57aufuuHCaWpufQovdlhQ+NxaDHv +uA9fyhnwj4VAXxZaIV8s91wB61N5f3ICTRn/Rw8T2jt+x3FJhprFVUN8e4QMsvd8R1wetXtWeax6 +KNAfz4UHpE2kbw5o9b9pWR3TVdfKFHVCMS7JSwsQmoBJsPtmadkKZ9n6A+uWe5s5G7SjYYvVEfvw +Lr48N7ZPY7SrT/HdGoBUgddlzUtTztuJjif+Cq1oqTQDwNNdsmi0AEXGucKrRngbckQEW4lQaOFy +NZJrtLKMvTsKQLCWE9kDn36lrxVTu49WCvQIotlRdQZFV8qmi8EcZzfu9Y7a8vkZ+Aa9/s68/3V5 +JLPLrr48yodahb/0TVWJcTZpjMbp+FQRPpKk3zT1ccnr25Rf8p1JhZ9PWTd6cqWju/fhWJDSdST2 +ahUvjzTxPPWhApACUv/mvElLzq6Gh/ma/ryUYLoAJwGbg1HCJDo8JmUSBkp7ShvjW3/8vycOJRRO +YrzrWYFSGET7c0dVDsUKRsxv2qTkcGlcUiKcvn1rD6ofFFqrvxRw2JGeEIk9md+saAq5EFVCvb9R +7hu4X4wiRLmvb8MTz9rhYK1nghMX48OnsC7znEZtUuc9skLVvyiPQMkvqppjaOtAzmqA5IT2tlxY +CE3RR9pO1GkbxlwUEnCRY6usJiklsqI0XJGRnohOWp21RI/MUY3sT3Q41BzE/FZeC76L8enKWwUa +V4nATLtbD299Y3NfytQvPVqjfV+q3i774riMxVT3rbWZulUM+336vlLtKoBzE76e2SaIqKq/gJir +up7BV1nkDq45mxAT3CBabMNl0jOUKIUO7Wd44/m+uZqF3p9LuD0CdoMICla+29ltOyrQj+opPswM +NKWJ7/bHyIDnNjx2qJlq8P4qcmBodjqDQocsOTKYI8fMPbrYBwL/3gzY8zFQX8gcAp9+HUsmJ1r+ +q81RgMKLVNXsl1J3SXoSoWF8y1jHniEJTNC/RmNjMDTnTIpluIp7COv3HA7w4CXGQOOI1JYVh7Aj +W8J+A/s6fNcqqr7DYGZ6ggfgUmZEnjvFzFlLGmRvhzj8ZUkLDK7D/afGZ1OlzwVTBg1026xjnlbA +vSneSSk8jH9ee5cItYqVb1CKTXlkLaXSMG5RbIzMLQ5E+DLl79v2TJC/koGO5gR7yhAStjbZL33z +Mot7WoXi1wnIzxFv50TVz2YnbHAZa6GOC3+PhvWEWqU3UdOI5DMFo7m38xsF4BlBqTjF0KICEvef +wVUIvzUp+ToEqckCdPvAT5Y58QXWlcVHEvPR8hLS7i7rFy0ajLbcHuyEfyhbmSKMojeCJFI6Tho6 +aFkObwEcg0tnnz9rvmNAFFNksnhIE1ct956KzgL+hWlyXauuWrHexsTzHr17XRJk6AQeaAn6DZSj +qG+ZZjOPG0hzKrS1rv643vIJSL50O5bu2r7iv6VPGIpnEWuvEWpcSTe9zxDbcsB5gSrS0PHKMQB9 +iWIi9m0JrzIMBK4Sa4TsN7ggePB4iwEvoRHxZ8QdD+PXrKcP/XFsC4EAEOEQMU7fZ2kElxXJfc6q +GJAl3u25j+28dO8W2vhK6idMcXLS8EQKLkwWi+ZobufOOVgCP1bUsl52k21mLTLeuWUd6oLkwdEz +ropiqFJpB9HElT/77WNtlvsxPug90mMCcuw1zXSTc39ivUF6XdouS3wxVnSDBYtF9rxV25egvVe6 +RkPXVE3oQK0V8az7LnDgi16pmLAoTDTqlNMoxQ6dGbTHnQ+RXmZin1oUA/XQr6DeIheUhH14KiMI +8sOjh0DI46p23OYlX0q5LI70jqnjdONU832jPVgNYmGVKY8yA6eKiGsrghmn5LnClEtYZ9FAWNfE +nw0Fjj8Ga+CAv+yas0VblooDpzw0grYsdBusiSavY+xjSzQbFnFpLdA+hwFtWOlnyTTEZ4Ad6TtG +MAdXaRtg8joO0a1Uv0BqkGiSlCP3rpDnEq7hOoh9OUrEwhvyfmLyZlQ597hp7h2ev2NhdgUbVtUc +ofoDKH+lmbHiOxYvuYhoU0AlJlFBnettpfaJe28YFSV7rmcwKKvpVcbLXXdeZngiUwr66mIl1kDj +L+x+FlSdBluXA4Wvi3weafJ5xJAEznNKR6t4vDkMJ+jQhSwXw6GNMP/4WIBnoJZuQT4jfEHuQTay +wPBRF+QWqxvRFa+JqX3XsqujLC7v/8ZkmIaUXN6gLlPFnyq6A6ZazAaCi+4axsAi9K1A23jkfddK +yxBZGBlBYrLpGYHqBKm2rbXFkMDt2dFSJgDLkh1zwsbZpGW4DL5r6+e2czDujCvoWfFkHbcrIYW0 +eWwTUvzgkOzoD9Ggay7p2iUMo2PJbLoJ5KWz5SMZguh1gjuVwD/f8kIVAXSPTYzNPxPAU3P7fEm8 +1vie4Q59nG8PZArDVncst4tt/Qf59I1fQ8akRZm3pSQPqxurbt7hx1nWAuTkdI4bz9yDYMcbtIgC +PgpAVSBE7W2loeeOYwRUZBYEK+Cinh/0MAD9UXjjRPVKccZRoz41rZiilEKY8ZEj2oCV5SDd8W9A +0RELGokjLvx3xXXg3n/kvrkw6h/eg5ES9Qfzkg/+SdVtsk5VppSLhUJ3KtQFqMHBHOxO+BqsgFOu +BA+1TpyhfcV3ANxImP+h5KkzwZy+Hb7U0qKGdsgTM5c4GmYyOnIbpw/bJK88D2KOqygo47a4+tUe +jEcCFZFZQ84kYDJcM/OmZWlKjjj8ebbJKYEyOXvd6XtAhweB9pqXQ70rT9LSsXiHmpScJ+vk/M/F +JnzVvXYkWJN/0K/1HX5xXR9vAAcjE5xlQbu7SI/YJXJrke+CXpEVR5tZZL6yP4H6SKQ/J8RtO1v5 +UHmmFTCyy1fwPkQhwWM+xpbRMPQwxeo1kUXWoT/Us6yCNt3e9ZDmEoTtJ9hwv+7YEf5xqIEimQar +OggLv7xI6yghi0LWKawZzDvat644WvJdUvCszIiJatD51Sasu7YAa9J7/zWbkISoHER93qlZ/CvC +ujq9V1PTp1LgsbKNShYXW1WglWRjoqpGHw2wOa/C3Ev7MnQMCEj4O051WyQQq3mM/d5CJj1POEXS +kwkCCdk2n5QUA8ZcYlLkoWxgDYtXKH6Ai284cWlQePNaLYESAceDD3PO8MnVabZmW4saIho8La4S +vg6Hkq/kkm47q6HGh92rBEF7vKX5hsgou5DUPOJ90ax/ZOtTruOw774CTFoqSY72J+oJZmx5LHID +DKwZa/NS1oc5ey/JAbrXkUF50jwR1eIUcqMyIQ6to6Hp6OkWQdXtxf8V9f5sUBc1xyNC3pW/osYK +mz0qUUb59TU9XLcs5ehqfh2vv1YjF5USDC05WRX4OkwVnPekOazabSCqToOF7QrIqxtOgTRXwHt/ +EdJHFWRH9VvERMaH9LMbABK/56updjVElrssRNkA2W0rjTBPcyhcfC4/ZzLcZpkFFUxsUvExjsZK +wEf+GzuLBFwtvfv7TBuTUGPZHjg1goIoDfUnTIbaU75lJntZi8iAM4qxK5KqThXI3thkfmSq7tvL +ybGiVr7bOipJhN1c8Dm7tJXhaEp1WPN9cBswjv/ZRaZ/HIhkgHHa9sXhP3iLkZQLtfUMgyvML2TB +HSz6XXrvel949PsihEINuZPN1eHj0n2P/L8X2MPwNHCPlQTxQ1jZ1zMpRXCZ4dVB3sx5x1tY2yqy +MEU0hK7LpSEjVEf8+qkeFe/IJh6mshZ02fHUURL+m2YdGnhJjYZZu/4hNxRQ2Z2dZmWNZ6Hau+4C +J4bW3aujv6ijhXxA1pq/NHc3fnt0vVqWreW/Nzvcxljz2XuotpfXXDrntguuJIrKyJyLTE4OqyH3 +uyXiTdVn/vbAMekG7Np/U8xAmnKGGOnnUEq0SgNC6qy4tneKAjYWb/W2bSJzd46sqeNUsoKQGjfn +PDLducfCpaxDx38SETu+XHrt2UbLJ3BvEfiiql4ztUFGZUOLfOA9JPVFq2NpHS5KvZH68JPIceUA +5jrKIZyRG1Hy+c0k4V+nvK+cKvnLv4xPp3bp23Pzi4H2Oipl/BlFdXuJtAVWP843XqUkQm7nyLBQ +/sHsVuSrHUntq0HC8yeP2FuWqGT84UyVvTlihYVP16253xOUiJkojdvhMULpE9EKX4ZdVvp9Qbru +zFQs4wpUlPR5BSIA6nKSCvWJ2zo63FVz1WImLjIEKFAdgZ+1b2Tyi3gyTnYoUaRPwEIbwgd9QZ2J +pdAYNgJSimzozObSGqlEUcQRH18LqLOhra3mpAh6z4ejK+fZufOv9yXUatR4a9BHtfrxRJRaxcFG +J2J4BVjQCgeBczBi1IHc3KjOmXrNoThNG7+6p5V/alUeQLpGZfWzQNqOgirRArUe7Af6FsDAf6jW ++7M8GkF7DfNqA961reQvhwiMI3lS5zHiMCdIxuUthoBkGHUhSLrTSAdvqhI6AReHAI53Lm7U1RwW +ctE2JXLcBT0w7TgAfX5bnriRn0J6gvvVkugsCMy1WjBuYiseHFeAg9RJxF0zHr0L+1LALhQi9+aj +1Hq2QFhKrTmUwchFIK1NgFhDrnquUPnobrzCmsYHWIgLrHtr1iG7nr94ai+lSh9lCbxZvKlnovNv +a48pT/t9rFBNFxKcoaNhqPz7+7sFNAgA6CcYiusTOz8UTPhV/fYi9WYd5GgWNM5M+8y1/BMkMZe8 +R2JMn/UD74NByYpjJwbuQM2TvOUg4HYgYkTgWoYnjYALwitMAeJFyeuekNc+F+0w5CYc44WHIgeM +Uqn9QwQ2c9h25UffzG/y1oAVnFYyeXDE/9W+e4PMc94d6zL7wG+LtGeSAO/GmPeOP2MVWQ7GXEwv +qHgbe37VwmFGdDpxonls9I0S8e4mDwhf83t1RBaIcEcGtluil5okgKvEAjwnV9Y0AWYabcB0sLpC +cyUjfi7b3adLST3EVgz+AJu4LU9ZeZoPjIxBjhyF3s7DGkOvzOQdtehEoIEO6+cbz55P+6Rerzhv +8hFfE0OrsttChFAzSU8mq7HIiq42ICtXWQT2OhORZrKJWb6ghBKEIyqLpjbeoHPNzaoyUSXPcR0i +2GdQfcyeun3rOLwH4rsQ4sFjQxsoVnqx+7mtGueHCEXGshDAeqsDz8AOyyUsCM2edn9nctF7hD0u +MkmMyOqWV/A6TZ/qkRnnfjcBIgN9PTebzGWGiCJVkGxu3Z2Mvg1GRzue6xUzitFAAk/jqZhzKsIb +F3eOnce/0ogTY/zFpMxBJx6NErmzaEj4f9L2Z1+KUB4EAYkr0rqbPrOCtUIO+0YmEcRSW5MFhj4q +SoJKbk2h/PHRYC65p+dKxUyzTLwtD3bEv9C4M5hU7atZ+XTqKg58eQjzQt85ULBV92Ks1V6JGHgw +PEfrD0G3j8RroCcox2MavDZ3YCeCPxkxFHuLGChEe9ha9q4B7aPRvhH9IdGpmiFK83L0hdfkwouw +HmK18RW5ZdN+sqDl4EVPQOIghJYxA8lTLHEAPNQT7AHdlt7sN/rwYXJOdfDV5jhRaKfcDyY5/r99 +SXYwPYKrTX/ADis0roq5jfL0fNUGGmPchOB9IrEF+URIZoW1UnpNL7Y93g6g19P3/70/52xZf3Mx +sNFebNEKjq1WTsKBuqhvM8vVGztILrEIhVTXuHasnTzWM7TdlYWoKiJNIbS8LYRA/MD4OOarkgqY +dQFmTkMNQAgS6Kaky3I42I5aoOIR3FypIyLcSuwjRfYaSQKke1rByqMbMky6v1y4nXLTrfNNCuFG ++mCz2EC23U0TbktTvUxGpDWlskT+1X9y3WAW/IvLmQoCQMO4irbccFZXVoC2JRNZVYfe/HHaC6/6 +qpJSHga96hh7bhJzuMo/njLjwXeoFGWEpgiQyyWN9Ktc059c8c6l2Wx9It3O9kzDyY85jZrwCdJb +u/mgAp12GtwQYO0R3GCBQqtDCDraZmg8vCciuDC6uI3c1PZCLxGmDf/owMYjCn06aeWYnt0eQQhc +QrykV/BxGUqJh/dRgvxuUQ4WBXsxtAYH4lCO2vbXxhLeHWztbrNEeOQlG+grGV0WwRM9NkV+c8hv +7P7mcyI4xlpgiVi4voPc1Hfre0WTx83qID1TSziIGwDtR+SzzNqKMUlI+MXfKu+/f76EP2VfA7UJ +g4G50s84ni+ZU2baLqd/h9Rofb8XkKfVAlVlBfkkb4lAUOu4+EGAGqXtAkcm5Iqf1OZGuHmr+pHw +LaUQIrzGPEtcuy50M1EwYpgZs9iYfeYuBpHVdTl3Jb+t6YB4bLu5d8icC/cpdazWjM/EdcR8GfVi +0OXCCPeW+uB0a/9Ph0ePEjubZcGjcmj2pEAv/jms6l9uT1mFTbAtfRY7e9UhTFpjLYjEFmhSVTtl +zIPCXbGQ88Ao6MO66mrZMZ7uenA2ypeayRfwVAkv6AGbL6DRmC/Ageraejjh/aGMy8sdxpkGDGED +OJq5KMR9YBgV1oeyYnN7RQZ7HL9rulSN3gCNljrYGn3CtSKaUkfMPzYYrA94kG/21y0tFlldrxl5 +UUNgUhPKX/IJo1W9p8oHf3DOJifn+xm0R+39luZNf21aaAsEr86iafAh2IZ2YIvDUPdEmrEAV0Q/ +r+63C/sDqP2KdJZUGlRXuiy2eF9J044mUkj9uiU+MBR9qgWogWjit3eCcpRoy0sKzn73l/V25+yp +3reTnpRnzcjYHn/1XYcEp/9resklhwDexLTyH1GVh+K1nEsmuTLe91ABm0xr3YRyfqtqN844uLv4 +c64M4B1I6Sbynl2khAbs6Ke8+E13gTfr5NODKOmB7R8/Bt9NZjrt9YwpXe53HNVyNIrZtJAczA5Y +jeoqFI2Vv+ZaMJJMHWT7Vc5C5RORz/HB8pGCgLH6cD9nqeSNze5i33JxIXNhxdvzuyShqQXg9BuH ++tGmH1J6fwpwOmtubfvRz+0KQ4POaEV5RajvnGN0rowJb9HLJQFRym3H5I2KAA8d9iD7waYuUEO9 +is9Nd1zi6c7YipRcbO9+8X4m66Mfh1nCKzjtn/P1VPNECu77ZJv+OriZfiRBumHol3wnaUh6eqN4 +8PlEnTuHAOR6VOkLuQstITgPHfC4q6ig9DSrEaOklS9Gxk4idtTTs1UvgJVqCfMZm0vzFKEu8k5u +Fr+uyG6hzOkv4QAlm0otzCmxOgNfouzMWJxSUWKnk0PW1Yg7Ru2P1zyilEGpIEM3UMFSK5DnwduT +gJKhPrsAPUkpt46vpF7DhEbLSsMqLqjuG12eIiZgToe1Mq5uq4z9dYjA7DfBr3Oi24RgUlj8L5Yz +KvsD9TvlU6E2z1MOm4brB5qZmsLby14yAT1wkAd5EGZJaPYEjFjTm1mtHb53EB/oB3alBt7nUNSl +uNCZLtUs+mwDq8oVYKTjgWQyXuG6bNYiZBHTJUgkZ0wAF/ziwaLYUZX4zUojKSgfYp2xo8ejLEYl +Zb3jCE8km3pwz36h7dSqVF0UVvzZLKi7ORNkIlw2ekSQo5eUC55OaZIPikKWxGhPBU5hF4gz+rks +KGVgHiHFGhBvs3of2sF15EwOIHhhbaDcMkpokJS93gV9P2rcAFUIFLIz4xmJ8KLID75V7SqW46zZ +PWO6Slipa3Vo9YUODVkb31AQyGV/WObvBbMpLH4ouEPGQAgmJD0WuPK/IiJvg3PhlJmGZVZL00c9 +6EmxiD5oCDmYHK6ODAxQuk5tPRTLjIDjdvn54WCo3KRtOQM6rox5zVzH3oQzex81IKDt4+UzUuZE +RKs3dO5fELNe6WY5jm7TshnbmrDcpPl4Iw733L0wr5Ro0ajyrGziQyc1JikemL8Y6U7+j5E5PvjK +0DG2sfvK1f9trtJyRTl3B84dC8xN7gUMF6SEYfnBvg4Y21H2hcSoljTYrj60DwhGX/RCYRQGkoPu +9BbhNLG2Wd6n8whgBY/DPmH1hXzBIj2Q+7dQA3GUGkzDZEK7s+C+MyvcDDFGA9I+4cpcrrOlKMxG +zUYpIhxEacwyqwJ2+L8AcLm2C1jyh8EY2ebU0Pm/ItZUHZhZTFD79FAMaAXmOjIsnDFSw2RiKWCi +HFEQ502DCDIvjt6jbL+JDiRqLzGa7L/lJ5izjrDivdsbD2SNM2nPhDNHiHG9dd+qC69EsRvodykG +vHVhLCt00D0MZdttKvr4Y0f37ACxBMycYZWd8zE6CrppCVY/ly6+Cm4/Ch3v5kEwL1sCOfBJpl37 +rHFN5ou2fTHSS9Vecsx65s3HqytbPYn+Vz6zkQJ6FmSP1GcV1SFdsSXZun88E2FPSJifkUAb9Kg3 +r8Z85CxpjHN6B4aH32yYRcyp1OBxWHPQ5YTbmV9Zatx6SqZl0y2qTt0rAawvMw7DO1xgp6WaOWfB +3jkD87JumFdru4ura35d+tS/6txkfPsHWC9EshqskmOfpriCglRqXhBhMFLBvdkXOcvnw5VT1ZiQ +d+9DL+L8SjakGSCOHU4YqgLiDyLXA40jOBlppZALRhBCjsWC8xjXIvfvWouVolF+HFNUj2/jhLjN +FeRTyY/28oUgkKHXuRmxiUNNU9pOgvojQtA3chYO5G9YIdG89c+gfwlDxUvEBRqIV49yI81F+Xwa +US/sI7ZwJVzDwWq5pnoDx04L41bLj18TOzcAXiQ80XmzQmgyDuAPlTek96i7SfQBLrabPTaApEJs ++ltBSYD5Q6J6GhsN1edIqk+WuotZn3NhkElRBBYaJJ4HcEhjDPs8SrDJRVEAHKjUzVLu48Ajh2TZ +uw0YU93K2/Xqs8a2bu3MLQguPSm10V76k5V6qaREDMQt4qWnO2mW4oXElW+1t+4kfQyv4Gkm3Jr3 +p+f2v3TARaLsCUDxcozwZuC5g0GeYLgnqBPHHjWgRyqh5kPLkyHPQPOEQC0Vacket2E27Cu7VMsR +RmwOICf44Nc4zFSKXSrZRxJ+yHeSpGNhQIwMRYPfVeYirQQ8BQvKHDsT8111YQHjiASBPRqYsneD +jxrDieZkNSYER7oinV0RAwb6IVgGx8v4Dobh+uVMV8vLrR9ArqbmBUBkCwkKpKQWPDJf6lPjVrIy +sszrw1yE+1BkBGFSjzl9+E6SuNpX1ebWniO5qAnV5HABhyf0Ktz7/o2aT+voqGeq1KCvlTEWJ3sd +qCGxBVnsPMLLw2nRS8GeIgAtE7xaEv7WF/7KvM4YfE58o+rZXtlFZf8kzKfkyqepXpURPDwoxcQ7 +kJD1JxzQ5H9iOIF/tpIwYJiAP8QvqfV+/+nNqHM5GICfuNXRm0bHJ0WzNhnL/z2nvPmSl3AaZ1VT +j359zs6yQbogudOLxUOSOI8hoJEmHotTlx2+bNRHkyLJEUn634HEdXPIfQv7wtwjugypfkpRki7t +epV9hHEW0j9bQP31cxLd/QpNHp8lZHVxC8Y9Omo/xHM4T1J8Htl+pDVlJifaGuXGGhO+v0MsP21O +zFta2OuiYPoe0ZXybi99NtQsvuxMlyoV2SypEt/Bw4qHXUHxrH/JSCdlZdeAYRpI02EUf05HU6Ul +RRa6acae8v3qZmh55Ygmp1im8ZSBURA+sHQ3niIlCppHZLxoJeaTWpy567MZriZNUSnFkqNeEahu +Y3yh+y0SRNsRqr8MGMP/CbQzG4FZVA+aUah9JErMWcV46CG8BWqrRbfxoPZ4Yelo88z9QMmhZg09 +0xHio0YQ+j3uquwOVgQjtAghJYUA+qp7OgeDBP915Ueqj7MBlXotJY7GhcHd77ZbGHqWedhXh3GU +FlKynHoOsuRik4mm/+l5T7v3AbJPTxAdGJVdCtX7ERKp1lCKASKaQn30SO9ZcM3Lvy4QvuZsi5Pb +ZjkbKAuksWSkQ9uHlCb2IivsohiaPTd7TwqsUPv+nrwfLtZGmsHo+rReNJ2xKMqEqNWgGIX2HDo3 +mQ6Hs83epj0//bxQS6hd4ZZ1Av/mMBfwdLiHIBvNGwYLYgfTRR4s2h/+FX1DeGLcGwmmeVwHeoE6 +KnshQuSd6V9vaPtar5s8GWmjbOl5hc9FY1lgRTMcTafC7uRPesvq9kSAaY9kYucARIXHn+csTTIp +im2MppW/BJOI9m3ipdxPzfxPLtthIbIv8txr4nU6t9gcfkoXg5OtmNiucDP1WUVT5nIA/BG7IBbL +pDNO418QNKhqK3fzwIN4JmJKJn4qfL44MCjdZA8juPVESTWo9k1zlzAsDPsQwzUX9sP1t6oeKp5P +KR2XlmhYkndJ+B4eeDDoxJ+wYFqCbKFqxp4ays5Lu343V/MwO11UFSq5meDqx8pdXSj8I8cSNJ1A +o2BNnGBzbvhBl7vFjyjR411MMQkPefQjPFbpvkPSZHQ3yxCWLuj1BX0Pxy3SQ+N7w/s9QNP537Zb +9LOLfDiNd68AXC0McvJFRxN8shQKkDhmlJBV/mOTGr9k+VuLTddAMGrbWGg0CizaMuHIkZ0OFFtI +A1cR/3Il5x9M+6QUvz//Gp+JNSeKDxWxDqhuY+zvBO41HMmD2jloskRPzcS1I5WSQJ23pcR2Xb67 +GOe23waEZqu8IJyw7WO82hr6ED8Ph7Vi+5+AwuV7DNHoESJGLKuQnFRfB9H7T0vEm3rFr8YWqzo+ +cjUddVsKjMMy8dMGwD0ZZ55Pd4Wv6KER1/Xhff6xn0/NoGDcF9XyITV3/+72nDZaJSYCVkSvkm9Z ++VONLVJF5pRCFZtfuSzvybgvMtaQgxmVI1mnHk4c0pzc0LgsFep/FwdsB6ZKdwfYMVVDQS9xWfEV +0KLmedlJwYp3T1vkr6yknGo7PQCjDl/A68w1oIDpCLRIG0r25ql7M6kCBfJ7YaDzy3EyMfcznAlw +9ZqVjcXSKPH8CKd1gO9QluhZYkjrRsxm1Ew0Hry79bS4KyNEntO6D7ICBhiwlEdJcJAVREoD1RKx +0H7fo7Wp81s5kETFWWTgDkElEXXdWzu0km9TPfdakp8YZ1Oa8VNP1vkZ6czZcGKqMdnuZunycv6I +ZNguMclGR7N1pUwBhYLYBTwq2hakFVMka6T+6RD9VSIOA1tK2U9vu99kgOvmR4DRFLoDr0VrhzKR ++L4BxVmbu9j5oKLkuAK3/nnGIIpF+yoSkRfrl9TBTLglqjwK1yOS+0fIAf2PDWuL8T7LWcIHGU3s +Ky2DBIbCMyJKtVJjjJyyNhDQS2H8EeA0W7XLJfTfokrAFTwnbStCJB/7ov7dRSEQ1GsN9t2yj11i +0OJSwsPQMaMSp/bMyw7cba/hUVZe4e3k4m9y+1pnxv0AGMSH94kH/yuAP6s15oajPU97u1LRTJbW +3YVQst/71jzgzVfsHa6dymTiZrSoCbqVcB09UKGiFnnMyUU6xGj6ILuR8K9d0lhey9xPOLC5w+Jw +iMXt655dsxK0wV5dT7zPFOeRhNoFvTrbskr0YNjrFF/5qEnKpwarxxkuI0+chrA4dsJo2okd/vEK +LG1T5cT+AQz36vmdFRRovpLvNlYew5f0QT6bEFxynqse5it7Kxkqfe4iteVkZQJTUbQg2RdBCCmu +1owrYXfsLfsHZbLLTAWnRUnh6bMYUvZ3kocBfUQpfwtXbyPu6Ozi9nmMz6nt/lmqBbqD4cNjZe5P +vGIu5XxKTdioP8RMZg/UXoRddkGnODqIhOEvxHRKKxd/fF1fyRcN7T0PeJX7dCzvwu+AKh9Q3kgG +UKR91ReiXYeTCsQ0nKknpCOwgXedPr5mCoRqdmpWFhiYDCMBX87T8O2HINAAHJx0LtUrxPHoauoM +s+ibt8bWUfMpesP3l6DswKRb3fHvyD0zhCEez7YCJZfudb/gYJRb70dwSx8mGROCbdHj28UVlGWh +a3ZK2lTCfei73IHEmXDJq5qh6iCSuLEawN0YB7Jbynu1LgVWbNon499GB0hmAzVqOBpkxcbaWHPN +SG0ZUPfVOgGRecu5OYkeNWpZCc70KH3D/Y/KKgQ26wv9ZzJu0C1kUbk50Xnfq4Jq1Xe5totb6p5P +HS0y6AMdN/NDUW6zOA3FYua1MOEFmHxyvDxkHsAzPlofgDK365F3kcREsFtDFqN/O/EiuM05olbP +maj0IpiZuRUs8RwcjrfWxTf3QFAhFfoFjGAaCgUMNwF9SbCeqCbiNSFxo/eAIMkDPOmWTnQ0fwT3 +AzLHI6Q3hhpcmJk6EBat1Pkg2FmMmvobFBPCV+b2H93iPmn2kKTWjWLz484mZCZw+DXEHAuLTu7f +i8zf1G2XTT/oIaF7ghq/5DVqPn+/8SiDr99YnAaYNk9PXlTpRqDW2XChsT2A5ZF9a9dturVI7T9b +sKzCvdoJEqUn1ewSxwQfc7LDiytwtypJQLVBEPjJyCOFssOD63Yozsx/Stlurxb1vpZ8vV9Bc6Z6 +/rm/PuXxel7r1AFhGVEDGkS3hJQm1IWCNZw3AhCMqKz4DVI8WFx11igRPEDxroH37OncJgg4Ckvq +2fS8VYhKrbRR0ZtYPCO7ei8/ZJXzEeKkZfoDtqgoIVRGYZYHXvKB06iHpWxBvBBUi5KgY5clOumQ +P2jFRGWwuErkQRbYt1xuBzSbDjWXK/KChC5/hj1b26GUgWjKKqDnwKPGWfs/ih/REn3XveR76lqw +Uoghooum4ApbTjnU4M7udAG/R13rDtADxr2NxyrPrQ/zecaQ0Igj/+Q6yV9BzbD0SmeDE/h8w6JK +gYM3/PShMNltWMrpQh0x7VZ9QUCuuV7rcGZqYxqwgjCgpkzew+G+A3bOKpSFCfAsfcNdqSZ82sO1 +O27IsX7w9yf4vo2e8qgWnuPAkHdzbiSVxbBWd9/AIKk04BY0q8AWHHtHeXIpUbBCBinkDZheHwag +tPwHcCIFudm6Sm65DnoDsDg7la0PtDLJnlaKygP7uBRxo0DUA7UcV7io9VbelZYVjZ8wlVq6aP8Q +hpYU+2Y1UuBScrLwtHBOsh/+Mhi5kaHF+2hEmnYD9sc0iVEO9wtAeMLK/BQ3RaqvhGd+DXAfJPab +Qc4axAIsAmWZI9+NLL2vqr2nHtLLbHyIoN4cd4IXUCaYqrbT96u7xQxFdlXKLrii4HlzvVumBcOT +Am03GMEjfeU5YwL1piA20iiGxUPx514fYqjTm8JCrn+jZzLhle8LwPPfvJfSJiBAHzgPyxn6KrFV +WAU5+MQJWi+xA+dJASA3rAu3HhkqgqzJV3t3lGnyj1tCez8vkjj6hEzwwLAuUe+q8aQJglJs+W90 +CepWZ+sizpwLFYGykGApx6kf0is5d6aONKTkUiuJWP922QPwpFywOlD/6bqxa3fhekkKDYEYFkBm +DRLc+wwo8TVRmVN02ipCCw5MC3EMgkgomYgXfEkKkr0jkMF89k9GRxosV/XmQZIw35DN/wVGGxWP +QyFBFH6KLn1Q2NWqUYRKS6r+tPsvJTun/Q0VhNqP7B2ht7M2ELGE9YN+tzLIq2pzZXnfQQ/h5Vc+ +EnxIXMS1kom6soEZcK4dHLnCp7OLiWShmWvtkYJ8uNGA/wc+lWdAYwngNtj9Q0fImLcA+OGeY2F9 +8UpQSu/Q8K1Kxd/xFdPY9o0F0Kkm4bNcMpcMFdCm6wcx3O2C6gpbCBryUZF957/ZnmOfChMrwMHn +B3WXwP1rNzlGuiPljJELNE49uQ6Vfd8LJqYUFmHFlAwpROdzWmI3UIgAYHfJ6IgHxlXz51zGmqsI +GQO5piqZLFmmevUgjHYMQTQZZkiBAE25+SVzrte1Wks888b07xVre/hClUEZh++Uqf2rtMeQikEU +97NNDggcgxhydL7XuvJrA7AKiYbQ3zL02jfsqWf5Lllt9cGwipN4Yr5YNH8zOMDqTjJeeBMS73xX +KQY/fLHWxu0+8g39ZjYXtMVyLCAv2e2aA8uiZjQCMKJsNe288R4VlzDPYnJNriH6FglalISX/0FI +MvsjzDQZBoRUyEtXp9SDfzWJ8Ib1678H4qfqUTvd3b+L/jTX7pvofkUoxtGj68BPS3GG3bCODr0N +VZaN64ozFERzzXoUCBhvouycyEFnZsguRLUaEhicsyBpEfSUxubJL+ep9r5io6xWaQ3LewwJmT8E +ZWdq/Oq92VvO3mnwa6qXowzgqOyk8OjxbDhzNGIdLyGN0wCSYB1rJJPUJdpiZ8FE5DkwjKMCfTcP +cq6a3W/8PfV4FpCuM1nDbCdJ58oOko+oYMP/x695/bR130EHAzAMXMeagHlkCwQxlqXuFsMJqRYa +M61Bgizdmp15vNlXpICGw/M7iwt2Ic2ODjEx0WoXLB+jf7usNqmBC2DUq/4iiatEXPntZxvSwuH6 +7Z+W4DRWbBRZ/i9R42jZUi2yzMoaVh+JQM3UMIksq2BMd+dTKurMwFCxAjQKMLRzU5DKlA62zghn +hz1j+7ASWwOJ4dnF7Z+APLDWKkGiBG4N833TU+FCrlGeYuAsba217nyOSmsk/hn3i60wPEh1JBwm +2F8AKE7xV/Z6g9Nba+d/tcZeh1qEygJ87+B+Us9uAg37KAtrfIP3S09XKCDp75ws9FFwGIz6O2BW +9jrxhO9TR8esQKGvz7mEMmK92FIMOgkDRn28JOloJvtkOOG9MynLsl/L5yirsCjWRymDAzVSkLi4 +2SdBcXf9uccjmbvHjliObZCLfYvt46+UeikUpEXKRDr5ZQucjffviyDnQ4h86iTvt95Ze//MTIOV +ccCj2eTT+XMnhyksPLy+jMCNHnEx+PUVJf6Qw1NAb5hQgphfeHfkM0ZePQCBB6KdMpU77k4Gs98r +WF064sdYfud9T3FrxrzyEEmrRPQzcuH3HGYIVVB/vE9v2ITGkpYbQ08FNrqQO7x5SNKtNMIq0gjH +SgSSGP+d0nq3UN7Jrro5oAEEKPYlNPvAEnEnYCTfZrEzsIE1f9vX2dn2Nw193n6Qy/CZhaLCRyj7 +gvNHJuUObuD87miE/Z6MXSiOCstkCIf6I3px595+UE4s4xRiqJDCx2t2sMcwehKzH5cCMujwReUv +eq3AZ/RZ0vn4/6vbjhpoq/OnMvDSCofrej3BcjIurrEqxTiYykBuMt9ZZI83wAQamRFCiosHdzEJ +QZ9RMcs1/OFhv8MTc855IDksN4Lc2TOSQQrqqeLFWoPhwe+tJePVKafGHdZMzmRpgazqwOhwNE1a +PIZzdrWLo5DJIcOCi6+WkuQLohWAe+gIUnax1L4deU4DC+LYjzHJtcQnxwy0XfPlZV/aObw0Y4on +fFheU6r4B75glvBHUl8MH95IrRywPdNLopu+e0XkUVvGw7f8eo1ObjYI23riHrF/GaX5z/6RKNPM +K2HesjtoSzMCpxbnSZW6LrcikZkiqIyJl6LmVG92kQYdimDTVvWgwtJcHxZDDxIlk+uNXv9zX4QY +5fbyn3SyJrs9STfeUEFnk4anKxe+qW9WdrJz9V2CZOWnj3teNV5xKHMMoiVJFExwvZlSY1RDfWQk +t3uPXzQZLI/0gyxingNGHqVOYbou3Od9n04tc0c6mv1vMYd7ebl/VeoMqpX//R+UKWu5aQMHHgI2 +Hzgrr76ymWZjSBqZ9e5Q9vL52/K2cN5DUuRcVa7yKIiigq+zKT5YZqyfgTdQTkV7lDQ7GC1Wk96q +o57RgTnDLWx81uiFa2tFuLaRMp8Td56LKtmqVIuzIbRAlku30wfwgX2lZUbHs2uAShcoX080p0uR +NwgeA2GF33GShDIIHIgufAzTpcLA/gWAQp0ohxVkY7D4W98KUc6kVmNSV7pJHEPuaCaybVKQ+S8+ +BvAmhaWKPEYAmIS42frk/AWHl7PGhKXH0HiozP9Y/rlyyu/v59fr+UNMbzuZz2m7GjCqy2xco701 +15HddfTgnt1/HF1ZxnCqftABaMHwxzzxpluk6MgYXfRK+D9W5QKmOaVh36jhiZBAMYOiBktIF9I/ +CtCoUHl9dCnoEaNuh15jBDWa5fMwcD0HeUrItu9VAAmKN0rxSzJKnF6G4CRFW8XKi/uFqXZ1aD72 +3RxnPdvs57IOMgyvTZIUokOofz1+FpFTj7vq6F3127/8VAkWk4aG4kvAmXPmDRttVp+Rshc0yo28 +AHZvkzgxk+/4VVQFqM4SHCGozHOraorw5l8ub7wanNcwsLGQYVjLmPciUEYyCopUW2KKIeNwqZKR +Aw1OFCrLWNZ1PScrVNrJEXsIBBH0yYFKsMJ5fakKgJTfMnT7/FNZgVVVddbDeZamxa5PIc71atGC +L7dgoWp8HK/ilK/hIX5ElPIzQs0nZ0tSkYEEqI5JwsO6WbmFBqJGDwxnvAaSvA5LZcYqbOhWhLdS +lRhrRJ9/sCdJUVdiNLrq6wjKe/I1dJqbv4TPcePjqfNqApeSs76DB6h9EuqThUAZXD1fD7djs4ox +hLYm6tSNWpTNwY9cfC8GR1FHeuYZ+eKqF1kEu4VCwnHt8GpSAKc0gLLSoncmbWkyWAO7EY1Db3u6 +t+n6EjFAPqdtX6pXSnc/239RUFtemij5PjhJzSAN1MxUbNkeBVdhCsurvFwD1RGy68shS0G3J5/d +TqMUEAe/0DmFjK4kyozVJbnO7EcdhIW0EBYJzGbUjGHmg3KGgOcK9Dzek6VOVh5kBl/JILB/qDEW +sVscCnQ1cRHTo4hmy6oAftH2duHsItb7FumjY8BcIXdlA0GVtzPzC+0ST4rckV3Qq5CnTPVZyDwe +W0r6ogS/Ub90FnXGpVDFLQenWo602W0rmJqMu/yodsQvSLTlpij6mMbHclIxaGj1puN2A3sykCC3 +QLi019f4sH/gFL8KbZpWzZbo7DfOxS7VpazkiLhC1Vl74CsjDeB2j24zaz2F2cCoI+jf6WR/YigI +ZsYNcb8aqXU8VxBefPXFybZ+c+DEiT/5S4+GB9NdrBiD6SGDmtcx09nzTfg1csE4e5MoJxLJ2uC0 +LaedNDZwvYyPHe9lyHTeFC2quhBz9tvXwjZfWR6G7CQkIsr8V90mfDcpLTbFSuJBvuYjDOs5A/7p +JzKyoYEOnNQb7m7IqFROrDB4LomYNqPq34amhCE2ZmpRB/MnCVvK4mpr0jsqYghSMvjIsVsDAu5H +XGbEvnmqazEvrxjpBfsBopl9P031YtOOuMBQx7nzCh/1oEOI+ExqNYhKXoO7wBQGKLgxRijOaTom +tPSEwAgxmv+sg8FrE4V/F8VF+p2aCL/vPEa6IMzpBKp8jA6z5Lz5P6ykabNHvyW4pLgOb8jjpOmN +nlu3L+Dr4kyr6M+T3vBUOt+50uaa6Ic7VCwV/7O7dJokRyMP//6Gw7F5X5/a37ed8lvASy97CxyL +PHhM4FcUwfgaVpTHdDMVhbFo1IDR9zC7tGepQip1JhH1UaYQBfapq0CnwZ6UefUK9q9eqz16d+W4 +ghsQZA7/XAx3vU1DBk+7FLI4FeVNGRg7pyKOpmqxckcBhOLrMOWul+DZnXXizaT3SsTkdGLGaY9Y +p8wOeRK7L4mRxUu9BtPX00mjcQ6tL31zTYwIW51GoCXBJ0K0LSIWaNIKvIsUTlcBXD4c047ozS+B +n/fJ5t8VHKQw4kKoKDGu70v7TY1nVhf7pyBoq8MQ1U42DLy/FddiCWccthsbsoKlJfqf5IFV8HNM +j6ba4MDUEVoXpHrQfi0b5d6MyMK0ff27ldxCJtpummt0QhaD6U+KUzNh6i9LquTgJR4L9EgqOK4o +ad7qHpj+5zH3m5GTWizx0n+GVu3kGY+nxM5iIeN7/pM2fDhp7S6lipbD7fVtcXShTM3MfrbRIKv1 +MaDKYicUt3Ko/cjapoo5U8hYpZmQZfz+71qigkL7/r4XXienpTUEy4ygCaTEowxD2rwueUWKkPX2 +mFriGLmBqHkDe7Nf1JeqmXs8uDk/lrwWVsXN/Ex9l3w5GYX5WBInvDur83AoGUy6Oi5jYOSuigaV +1E4n9QF35VuQhs5M5jVuTj4xqYz6LHHcAN0KuL/aERByBfXfrvdWAVHZaDIPgEWZnza/d6p0uUJP +h7QGmJoZdF852XN4NYtqaPOfUGmj2Vb76SBnPna4keoVHCFq0o5J2g1OpxugweCHrYGDx8vLBiYw +x+v7Zd3Ak5gIpnDXJUitPzKmkOrSR84ZcYM33NB9Pt3z0ZzOUoEP75gURHlAKjdJT7rVIllkVO2K +6+kkA6KoWw6VYcAMS0KAWa+a3Sx4044ChcuZQkca8NSlOzQrUXymCczTV+nmeDmLdvN3gePbQWpP +bcX8Ca0Y7rnRLz21mhIiPB2XLF6K+A+LxHV/Poprq1Skea0mDSjtjl1xQugq1pTDrklmyAXCxm7N +aSURuZ9sed2gTM1bi5ZaP0HAQUEXAECZBZUuGvDi6YotRMm4F9df781CVHNiqTcuydsKznXLTj95 +YxJi+xCRnxgSu/Vf1afis62xBYAwFJbaHbFOpbzII6FZq3m2qBHXpB+AMJGvR0V9txlSzYXul8GA +RaNqVMvC+ePVdifsPN+YRLtndQo0D6jBQk9FKudxeQZ63KGd31Zf3SXFsno5JvKfFdVLojv8utdY +m4F1gqPKcrq9A9HlrnmFgCluSTofzi5jtOXIb9P6NDftERAThxuT/H3KI7kpbFgFvhroOMixCWJ0 +q6d3aDCX9a/JJwA1/If/YmzQW+5mjtBxeGfzzLy414WBa/GrTrDjs5CiODfbU9sCgFEqE0H1Ph/R +JM81tEb4IoQ2ttauo6Y/8cZ1ZnVks2KrX5cSfU1E9ersolmW5f9stB8K5ZjaYguYfDpc2EFJU8qk +7BRfGJqK7kI6lNaunAVPJraDRBBYb2yEiLbdTMRKPw65Sqz5WNR+Za2oUnEk3eroODgh5T+4Pt96 +KTqGtT8eItCdNU3+pa7ix/4MCEohIiMLn40h/yNbbEsx8VyJXZRu//defPS4vuyKGpl2NssTd5xN +T9GT8b+w9ml1Vh1q+NT5ltVxC7yy2HplxO/FKh5Hqlq5tALHn3Y5p/BtAhKSEaLCatpUmE3CxpWW +megag0qvKuFPtGfBjY6QlABwGVYIQds7Mzhw9okr2jge04pTtXunTGwhoZbv6P0np5eh4X0cQTNa +G0804tVUGY/HA7DVyoKhUetCdGEjdMXIDUtDF/T6aPccwduQxbOkTfLyLkUcGtdmg0AziEJcqO8/ +/d+gSXV/Qdl1UN5j3wNtQrVimmTn9XOaPniJJv4VWC+2cm4zV6fcPSMfHgZzocS8hgPjJBIe+fTX +qb5zEQOeEsGdNnt1M58XJ/FDRJ7q5zJBZmftzvMkOlKSq1Z5rSOPVV1rvTuY0/JzAN8euCq1hcon +dLAH380sh206AUalus+ipJVnh9XarIPYikKi/J1fBExDQXuxZt0YFwxJ218K/TmsJq8WkN11PyJO +65B0vrWV5zOG25mZGn5cl/JiY1poVeX410aWlp/uKjeQWTGQb8kXTYjyjhwbVoQzb0bfzOWho12o +ARPPTyKXG+12w8bQNurkMyC+AHpo2nZ7cLmUljY89cKikWkk8jfs/hixweVUICEXwdsv35YOjogj +UsdJ4uf325hQmKuY6I3IMQx5qi2cpoYEc+peiTr11ounPYPows0fW9KVrUt84f3N0mWutXFQh22G +fIFqnhDbqmlS0NJ3tVpCH1XPoJjiybH4YDMfKwHHw66KGzfkJy4fFegtcsh0OMYwyvEK0/VJr7gc +vNc3Fd/Y8r2Ysc6gvc2vVUKsS9vTrY7/MLuz9oH3q3cI4GtzwrUEGl6g2wxMqEFPq2joN+sJC22n +B2WXOgrKz3wfj5+B6pCo0Yv/ryVEwzxw44LveObRGDtipw17CwqCRZXVyUnUZvK7nX1grq6GBPcE +GcAWrg5lsJhX5VQAMjPZYYNwwRGnwO0Jto5LoATijQFWSfrJGf31x7Vr80cziawRZtTebPJMYf8o +vO0INkrcod4eZJkNJsqI24fTKA391gYQg0XA2WCIYc1vheZ7YOkVbrvB2yJ6XiakMQEVtg/xPTNc +UOiU+O8fOcftkB4xE2ZXly8BkZZJ4b5QhYVDQ9DfDIjh6nJ236t4I0K8CQPDhmC8gJFcLG0aD0DY +LpCsyX6HxePhX1rUjSCXhYoF2sDzhwl70xTR+zHlBu6dd0QiatbLVeg9ZEh+WVHj+a9uCiI6RLj4 +tm/EX/hBqg7ko/wkp7TbHI9emUTPOTYR7aa3F3dWBtpO7K1BrSvEziNKA4d9gA9FTY+JXn2eMPRa +2TJQdIOjqbW9k8cHloX4sFyPy5ubKB33FVB3R2/V9NvmGN2cNPWuWCPOYfrh5hT26XpmhxADq+Sk +0/8wcEE2YAIO37GC8oBX8lzUbU5r/3alFnX4QUd4yiCqi3UBWenPPtHcuJtR0Yhv2ZAaArsoBXoL +RZgf4g2YisNNlac6CnMW8s/vwPxEejVzlFIiNvXwTJgqUr/dHbsio6gfDEtgbQpmFspjTmn4/A3P +oeXHqp64uQp/Zc7W4nt/1HbpBlExGqqqokPfMn+KVgbpNlOH8CrzubxgNwOdSFSe8QmLhdk+TQv9 +hKpBkBRNWrLNQtfvFRUAnV1F67IIrD0NrQ458HoAQAcgJYX3toioDZNqtOMNJwk7grhGKpslApum +dQk/W9FMX2N0tVmt/cItq9+K4YlVmUpIW70tqN+Bz/9bUm26BgDJqe8ZZtNBoT9CpQvHUiItYjXl +hJzTbQZY1+4xJHKWMFU2VRpu4hf30qyU83QQZ1qSOjuGaPmsSHI9ZIsWe+aFzuoC4YIX5+OLIkxE +BUYB50t80aIh5nDiifuID39nkamPIAsWf4iXzWGW/QpmxMEazvzYP8xoO+aeG6XfBBI3hJqAXdsz +dot4/Iu3ypo+RrsxCjyniKIcohLhwOLcGfHew0GCW1ObU1O77la+dn+Da9tji4V1/bkmoilTjTQ+ +2gjxH9UIcx2awU1wBi6nSvTxagODmkEFODYr5JghSJ1HK4U/8Iuw98x+WpflVkoS49da73iv6/Dn +vvL3hZANU9mLeIbnNw8yPTbcV3gsiy0crZEFHcDbJv+0RByfrpex7qKlS51Rml/DOQJmsaqri1KK +UNJuFAJU/jpa5CGlHTb0VpbulDa5kB7BR3G+zg2jmvaVAiixEf3R3RvuEU/yyzZ1o3FN16WF2C6e +ISkDIu9HFbWhRLlTk7l5uJSlirdK4zASe794/TdgckX4WaSU0W8V0a9JUdK37wWf8RKdBiRGxMA3 +ncpeEtSsxsGKSSmUtMkzl8yF9ztYu4QzvpRaBPO5bAV0HmhdGX+TwhgkWqdR/u4+gtl5Urtr+gI4 +6lp8rEYIE7v8GLl8sM86NUkMadbSIKFrgSwxf6Sqocsmo/PgAaZm+NIR29bCVpSLDhaVervG6IKK +s50jMUXmnmY6SuxwDoDVNxmLl/2rgt4VZjzSPfIQKpr1bhNkWyBUblisp68wKDOGlWQDvrDEhS3d +lfuH7M3a56v0KgaGxysVNrYbD4CmoQnQZVMImvouQTyuOugvb/JLBua3PkG78G2r7Vboh8osxeYT +qV+CGDkjzMoRrR7b6Ru6y0qZFPvvbri2z5DEyEKhG8Z2xxCOg55P974bTPKs0yEQLNdZxpTjwk/0 +ydOznSos6KsHa8SFPj5X5LNtKbxWlV2WDA/ktEGi3tr45rYBhjb2dY3FBjZF3jdluM3rsUy9ensW +8yUcAOdwaNCES7B0VlbK/Tpv+i/CQ6Nt8aCOK+LcfV1LYt4E3FJCyK08lHxp6pbKvaVF+9MLqIl0 +BQL3MtL2kmMGJfS/5XiY3wd9k1PCh/UsHYTjIw+NSgmNAYJyI8pOApk0ltZlYvCCG/Xzx+1NLIO1 +K6negMaQFOck/0e74n/gaG3Q++IHQzXjIVbeYtmocmCeB6JGTTXX1ozzj1tuvjWqAQy1StHKcsmd +QH9BiLXJkqzniq9mw7M9H0Bm50dm+OUjh+YGIv1f1UmT8WjlVtu3LSClHLpXWNLHPWTzKvLnVWZ1 +rfobDoNIl34k27/ykxLMp84INH+3KTPCNaCV0Px8vo9rCg8stz1Ib7IfbxiwSLbTLwy+Nl7Ylyse +XkJCacW7tmHaKSfDTcN6QwH0nWWB9o1QRRhe30Jp0g6tdG4t5LsqlfnfvwjBWfocN3wO/ctk6WIj +dR7Mvisoys+SfkQkw7P4e9jnG6OdKdTb63DE2n2VdTHubhN07DR4oJxSY4ys/Ypzc7uJ38pltBsi +J+zQ4cr2lTdwIyje6XoMVWMrj/B1gtvBgZnHp8hEagjALrJkOMXSf/tQdkP41oWwiXF4GBXlUSBb +tXW/uEBIj9wsz2TYnybLzv/AExdgOg9023oOdBpv/AFAQB438SIZbWrPlHS0zOSuHeFtxOKNsxL7 +I8p9s6/l4F3K26fDplX8oi9pa07OEtN1jyFHn8uBJXkIfGJzaw/0yDyy9bmoxSG5moMu2J/xq0ez +vOBhXqCaiLtGkWBe9BnJX2iig1EJVjIPGBElWCDkCOFiMYTYRmhU5g9BlgC8XL/qC4tj+ronyexU +Uode1kI6RJHSWog2ue4PPTKngMSVeKDO5HEmwfaIpCUQnhTjFTT4WHKOTlg0hOgIOvBRdaP4sC1W +lK2n+9I3U3r4QJRsPx4nQlMWPjPk4rK/KDQmWANUSv4tIzmf7WjsKRSHrbo82mWz2DdATd6c6qf3 +67SzgJosrKeGACE1BmsjKrGgDGcXwWLsJlgwFhfUbQahM2XBlGDPjmhGP1yCa2TtixHKvmYtBdP5 ++ul4hIlCvlzsNMa8aZf6NcjebWw+4+OKcBLDN3ofILN7kihio5oX8cSr615T+nskGYYy6EgKZ4PO +eLTKsV2i585CayZgmdjcbNm2ioP65J1eTAIvpcg70b6O2RhbossZeKt0OgZ0bJmdIK28rW6Avok4 +PfpwUPHUc8HcBIWMA/ArBmaPODXaA7JCMYiB4/ip8dc+vovu34ldaIkKDfmU2F25kcfQZKFA75oC +E9MEGzYHfKw3QhI9KASKts/Y77TjtFXIwI6Xmo6S48YPiDeC337hrIFNNsOnEHHAdplCe1s9VsDH +aGFCltmdDF7ohjQg61l1YZgp10bG+XR/kWCl3avLIIbLUEBGnfhm+cPtXW+Z70kJEuKEVjGtEVVy +nCWR5fi++P+R1acBPmivlSyKKMUz3Jn2giIvisisxKUK58oX0v3yaQ3SSRj7hMkiyDsUpXmW2Hxe +jjotGKZvY2h7l18UiNou4CdevI5TRY8fGiZrlgkti1U/vPduKyMS2iz7hTLIl8JCL4bB4P50B00S +E5en3/mGrGnjNQwzC62zuRwF1Opvyi8W+Rc4PkihsDtCV/3+Ltsw1ij+NmoOk+BjpwsKfJSgU4lA +h0SZQL//bTkbEGIR4DJLIrn6El+CkiBUL3gDkRlvZqdelyUSL7nnSf4vq1gKnUigwjJM/CD0Bi2O +t5EBFuujAj0QmbrL7SJi5RMdsWW77HyPYGl7WxmHTw6uiyFzgQqVhje5SOZ0StxOFk37ypeuVEll +RfT48N/ZkF9jJpAW2xvo1/6n5W+4GErZS3IwTyji136gUXGhUVtXavuPKsGaUe+j9tYgmeV0mSuF +uDjLYQl/1vhordxOmxGz5U2YaKudR5xdILqWk7Cj/uGDS9LUhwT3yQkl5wEcwngSRVGpQ8g+STfG +ncQyZWVk3EXTNvFaoKFvtRWsmc9W8DJHdqQF8/U6ZuhgP5DwvCdw4o2Kze+ItP2F4uvlkFeBNHlM +X8G75H9SG5e8rxmvbQOxcCTvmWyjDKxgetlL5OgSXNLpmIHtwKG0HeoKfzJli2K/lcZZTHJsM+V4 +9+t4V0L64JdjhmQInWKE7alntde88+qHznDFF99/W+5eFgRnS1KnmgawdNHlg5b/nyyxGUNbIHNT +T5CtZg3oDbZsNELA7zY9fdJg50V44rEG+/+WVi/n7AUvVXH68Jowd68BrOx+h7fgT17de3RI50gE +6UyIX08pV5dnS74sc2mvc2MWQSdiB7RGybt0HA0DPpqX3aWqrsMzBPhhH8zGnNP+jTNK8kWpMNkY +Q8U6fKEtejqr5y0mcjfsNI+szKtTvfeAF0O0nZeIFLWw3YgAry9PKqGuANu6bfb8qiya3jnwpheD +mzDykz3hzocs6RTGmM1aUKdV5yn2kAYd5KSu2yNigl0fzwW9h9WBAJcxMstBhvvXbhN+AClc+GZm +8YzlLWraZNEBdOzYZwNXnjyfRQVF4XE9Bi8/cSfwl2hSvD0kp4MXwEz9IgKwE1gEgdGCAJvgtSZ5 +s8QLG9CkWXnw+726ovhHGIKfVZuienes3E9TQkvT2FYFLOFteWCcTxZthI3JKe68h/iAAPmJ79tp +T3Qm7CuK9it1MrqlmUYuzRsAoOpZHFi/kuuTrizCIPTkW9EFPl67RHsfrxe8Vgj1ojxPjVqM4F/0 +9RrBSlugqtvytH02OChYADqMcDo+bflXCTqQ79EIcvcyjc/ae4PtsPOuy63iBx0SRKnM7WWH06ut +r3MWN9iPt9lruLwAqvTQCGFuSAJeEIPMZ40wZkVYkEy7C2gw8Kd6vrue5TdbfNwwfrzfvgr48oKY +fHR9Hf2xq6nRwiuV5smvbXt3kWej4bnXCj0zDHG9HfGJvcVPIT7Xf7v4zkP03R9ZfrToL7dkN71+ +IQour62WeLgr/WKoNaGZMuGt5z51Qa8Lvui85P4CPp3lcnN2YfCRA295C7Ld/eium+PxvP3GYXj7 +qdN2niBy4MFyYxacgAp/koQRvV/56rBthlFuN5HG69awvWvTOsN2DVBOePKOIO1gEczsUUe2l+eQ +ocPXxxgAVotO2Hc0hsVmiB2i/HdcWFItIzlQai2RLO8fK6AWC16f1jAI0+wlYyHv0KhI3bF92//C +tfXX6Ln9yd9/cSzFIu9QG7X827GtwSAhGXCx241AcZhW8343c4CHXLjQiqgFagoL5bmtLr8P/AXT +ezZgZvK1RIPDB3KaRs4Q9W2fhD19QL7UXACzfpFHRpfYSItb0WjvB4OBC4ZrplNSZVuocevthQ+B +/xWkV9BEUdIdeqIQitoHd57irED2gEppcC1yT80ud/9o8S7pHkAQjH1IwCEdmGMFBifPeYCxHOne +AVjt1P7beN8NPf52sLJzfoTOJCxJPhRXWOzsmic4FTP67Mm8t3HKh681QnLFLcGCUs91f4tExCQU +AMP8+JoqGzHOzvo0G4Bu2GnTengyBSNR5HNZVCSEWRe1EUP9gCREPHzuswd+A07Id80a+EJr+hDG +iQU2dkdtKKVZJAsK4cA3WzVuo+LkqtOhPpd4y3peRr/oAi+Cq60PGkQCqhBvBsnzxVE0EFn3BkoH +CnzjlKRDjiDowrx+4YXTobs2t/IMPrbW4pCfCIso3emzEYFV5XLYko8zjQjWu1eGyj8Ru58hKFTK +TJ3Hfini0K4zakSCRBjlPEX3jR15boLbdmDgrgtQJC1fk8YwukfW+d2XDDLLGWJuuWPcDVnY3a/U +Z/rXiTUV85vGT0bxsv+ZaHwnhOmpg5Rf4dx4HcFgZc4qUcE8PvdVCf3jEJGhVjWJPfEXLM+0ozHZ +EYn3zaM8hpNonrzi0raRsidXnx+uHhurnxdRLqbL/p9KoTwusz/cTSyEJZe2lYvrVDhd/jcXf2Sr +LtUxiHv81XJ24p5KV7YZWmvNicCrLFPQ6Dif/STCS57X+bd+EVKGLNNzFnGHH+3nLJozbxyHrZsw +uYw2/w+zcMUWuat0xWmT+zPCrALE3TByqGtP9f5pb2MyYh1Q/UGRrCkmpyFs8Fnd6erKZ4iecOv4 ++1mdXBRm/nGsx1k7JvM2ZP78zlisIdUSsgEKiSe4r7L+ezY8fNd3aqGd7pOlMi12LQi4rhuNsyVA +Y0YSugs8BSlM17eW2THpH6Kd1zuGb8JVmm0VNGPTabOrxKvJmp06xIHijaRzl0mm6WxE8efkWdTP +4U7Bt0mLVFyLBWvrB3WxLjL2mvzYl8eLgsLjQ733ShtKZZUUH2kWoVg/3HllH1Kzl1uQ32YHZ9lP +afprnvbT58iY1oU6uGYzGayTTP0RmTffCQQxeQDV1MAuRck5w++dpTA4sUkxsEZIbOtqlMfWEgVj +F6zyHudqAX/7vPR+QTDpYM/ENKqDm8TukDKgAtj7+wX7S2any6IPIIzqGv+EBfZzTlXxsJNcsExl +NB/2WfyaUcO7Sky7i64/AF7X592g5d1JvNkm0q2nBqrLGqT6e0ymjrCISxzluFToBIt1dfpNy1f2 +/s1tFo0EIjGVIUkZv4gqDNTohZD30ngNv4CHH29TKdSPMkph2j96ZTE0pqENAHW6faZukubhe4Nm +WaWf0SZkAVNSWxe2FFuAmGZO2a8ftlCiDh2dWDmjekqMxflSoFHCvDDCTAtH4hyMvDaS2EqESFyq +KRkSTl6dMg8LNvLuX8g4Kw8hwwNbxQAbUxVNMNXCaGlw97isIpHqgAhJBXEFXQwNwJkIkP6sl+Sb +7K7A+M54tiDfz9STs/NOWOseAzEls3kEqbL/89X+QRJJR0pgBs1gptEt8TqJ7aa0oY8xY6RFjbTC +hbi8XdhQV7VRiRL1dYJo9pFoxJKDZfeVBV6dv08xbYKqvlMAhcYgrOYsdfHDdIN5YgFnF0pJfpxF +8YFPs77HWBWMkXHzbV6+Ed/xMAM/pij4FaPvIlSDfGY9I/DTiSFF7zVaLvEMfuAsRGvUYLH1o1c/ +ByLHP8OQOeat9ViRolCzFYzTIcvvf27FYpxP55qhB3/R65MTerOlzY3D2zfL5hp2SUS/duNms0T4 +dYBwDDbwmjxO9ordtMO/4jiduR7A0u3+KdiZi8eEd4hdTkYgDmbz/df7dSjbLnxA0sKLVYllMW5N +urcTy1wqX9+i5i7ZoFp7hPi+O1QbUJFEV57x1H93nGDIefLkc+QE+yVBeCwnJzsZd0jg3wh1lHHK +b+tnNJHWyEdHeURndS3JXCZm8FAIxvM6gLgQt2FVa70McB6ElSIX3aut0wtfKxcPYDnWkt3ePP9u +FrsSCoz4u1eUsJJbC9FF/ALMQDSUE9Cy7huEsM29HSQhUKZ5QN130mjKZESj4F+sDYEcB/E1zwkA +LKHdIhmeGcfTRYq+WfOT1ykquq3nrgHlfDNieiHdFbXpgFodEZLgO6DaK1PUEtHDuhu4lijAm9w6 +YwNpCQbbrJbninaGHb5XtedQZ7FGbw1nEYRfkX4tnsPXT3orLErXGi/1qfuEFggYhLGUoikJnqMh +8BD4Ag2wWmTIknd18BUMbcMogXA3wkdjUxzJD5OyGV7B92mlL9EwRICsF2+dmyPqv8NXMVycNOUC +S5LGZLIzm/mVFJmocbi7SqBgWVJwlZpJfzjrneGm+W66rkQHCEmHc9LgsmgEN9Cb8r0pfUKaDG/s +FReKvOEjN2N3oRnA3i25FNwr4BAdFTp1BQA8JIm04nx71dlTzV6FjWLPDKDvVL/7yxvbwawoHYCW +0lOTa7OfLYElEkWKhqBcIOrm1P+2488vKgxBUxuEWQLRAPCnrvzDbx3VpYTLt+IiZoJMIzgkjJx/ +D1m8s3VSOkKqB1ZZLgCMrpUpFV6NmYQrHKqKkHuKj4RMxS9MNFJde9+0/EcO6ZbjVQse+XdiAACJ +rSMuFmx3igZT1qKeBvt+UJ0pjAMHcGPUNsa8CV6ixFKOrZPDu7XonvG1zDr6WVDNJzf/FvbZpVWP +XCxRxgULJamYHcOgSeY9dHPdvJM3t12pOmriSZwgcjhgalDnYTsPmUljXYLbSqA5TZ4kltuvsVCV +3k11Jbru1IBzUu8OLSlJBpvFrZhW7+ZR5REZ44VCIbWI9thnsVW5NT1trTnJCvpXtjqYTb8xUQf4 +686mn+N2+DPyB9U9eFeeMgO6seAUFxKktpWM5/kkSIKtIuI4l8azyTYNPHGLcA5qNFIiO4r4FlYg +O1mGfY/qXU6O8ZHPrFmX12JwRHDvPzAhYfbnP0fF9PjxW4xo8+bu/Vao1Zgv9Crqn/Qav2ArULiZ +kfEPeFYsJHiKHROi076co4WyYx+np2efd1VTYb7HPAmtBamOZHzY4fH1ZcFh4N2xSS2NxQkbI2aX +Dbom3wfNnezZsixZfbIZlUodgxF9zjATUACF72i8kdMci0W9mOmg51xjOPU9356GYkzrOWNebfUH +91/FtAbIWP7t2lHiQaB29xZO8b8ekCzC1G8u+dFkq2HLI6QE1YXgN+AC6D/qe+Mv9nGwnpZiwI2H +Kcd/5knFzpvEQaGTVbZAK1I0cMrLM9wNQa4px/IugBrqCNRswObBJnE8fYVh7BrS0A48x1gjnaHq +QogrOm0LBR6q+AvALQuxRTUSaKU0J14qizI8phPFh1VijKXI1DmNhO4czlK7FX8q3K1GiXb5GDIi +lZ2R0GrpXi7Eqz6iaC4Tkj65II2LfIgHvnOMhBLLOCNl8fDayJIC1BvRFmGSgI3ysfGIluzu3OT5 +KbvpfST7Czlio6CnTi9ECPNqHGRuVNtz3OmaIqgjEvcBZ0mVt2TEw0Uw3+mQ16IAery0Uqh79mwq +C+cfXQ08ACChSkQA/my9eSCUwJmvUfrfEcxHlzn7UG6AqPMQATZkq0j23ym1LKrS0HHxSDDTH2k9 +7KejYHQAaHbFKDaYdNTgQdMSnmT+i4SV+t17l+7xS8Y5R/B+SYh9M3G5WvgwB1Sjv8mDqAdl/KqW +bggAwUYZmS5/snwBn0jisLLAuvlfYtMQVPvY4rxiURLeQlQ57D9xENdZ4FRe46hJGDw+Agjc1GGr +a878eBwUHLLQKYChrJ0kg8SHJKhKsuhiJLohr0xY3gZ0O8YrigDFBi+b3TzDB3aenn0Q/1JkbU5x +WVh4EF917ggqVFTzbidxSNEbOx/Vuj4L5ruOO/yCue4FCWJKCv7YZeJjE68NOY2faK5Z/v3+RuSY +y/e99BC0JlNMQGN6E8+Hm1d4wKd/8XHO/2PYYAGlJK9YEN8+qsq9gDhnVki/Zsj2k6k2cNTYRhvk +ShAuqFudRfNjfAvAPUw09DjM14W8hrFt3HHCvANuW86Rs5B5l92Cie1iqiYXdMUY1CaLTHyuLPo3 +Kr1BdbpzkFbF7l27GaB/rCcgFTZ23s1hcQPspoMK3nrgsOtBE8UgWpgiRjzCgou5zp4764hA35NQ +s7js6zbo4UrWrseWvsgVlD3rX/fF2nykVKq50vHFTsFnmhByEsYsgJySS7Vo+Ru7LfCYaP3fIiSz +HD9DXYDG/jrsBI70JYLLpasCVQ5+66UZuvh1bysxDRnf5gQt/QTL//dn9NtSX+92OM4jSPcgDEWU +BDtiqf19oEc3xLYBJohutpk2G0bNda1aOTi0EByFcD1MC0CSDvWkYBOmTsTgR500qzJKX+Xea/6w +dhUOQoXiBgFg3QIEJULOd7oBP/zO+hciNldu+nRbPk8mBjiue6iJA3aLG8Mt2YGmcH89SdbyLRK/ +TBFYnvqp2mMxS7WAGtvlpUG8rVdvZCFw5vlS/OB3NpVgOrQz/HWzzqcu7uye82Gg5qxrAsEFQVi6 +H33hukEYdF5/aSBwlHRW7YjnGD2YqEQYGf3kVJhdFM4WVCzFw9IZBjQ9NlwDD0G8RhvAsEOBprHK +0xkvhs96aWh8nxgnDB68Mk5HVL9WpLBN7bOSiI6mtXlxjchwli6/oCVzSaTcleh+cX7bFi1VIw+O +BOCJed3tzt3scTDBeUZI/bhYTgGguPKOf+0HLyNsRZT1rgmIq8YJcBlRboL0ZdskmnMTa7IwXtuT +dzRkkhbOrLED3lOtju+OaYNjmwMPvb2e20HYGasuETiTrpmSOwyS+ANsjYAWU2V1z6bKa8kPseHF +APCkeRoCO/1XeJBN/Zjy0GTJ1cAWlBjrzju/zsu04DlrYXvLnAFNA1tO7XmRs+W7NdLKX9dIjpPv +qfcMKm3i+UyDNsPJ+AjZod0nj5gmh3IgI1T7h2TXk/1eN9y0CeOVFeKbClRGIfAk5VgTePcuLxIo +Vd1hbccx+jxloqH1LrO15vid5f6t96q9B3sZ5ClXuvieAGiSo/dyEylcQSukhShyQyfgqrjSryDZ +JNDrwJpTfNX1VdfjZZMMJZMhs3Xt2njoiuB4vLPxo+OxwQfoaiJVG6VEmqjYiAgCzjbunmEtbViK +qFVduoje6rpnoMLxFWBEYVKA+C5uNr52OkLecebve3LDU2zywPzBzeIyG9NENYwaC5KEE+QLteS2 +XB4wALEVT740hUaTGiqVch6X3FD3D6DhGshfv68EbQpi+z/9e1MEX9Gkbhh2BZNtnVojC11XiCK4 +LNdTuzf8vyRqsyyvVOCaEHgrnL4CdXyLDey5HaegJ2nh3GR+C00gxpJVJGMvREust0RXPt9MNzGM +dzUWrBcx/PR5M1rpy7szA66+lDeaF1JpAaxPstGl+94CJwqXcCCLe2n0f0ROAa+tJUWgaP1sYi8U +KTXMXvlQkYj+xPj42kMVB8ZFhDET2zBq5XFk/44pBWkr8EgfdlH1o8XoyCa2FC7M6b3VgFLPE2Wp +Tz6upqDXRa0Qy62nBnonyPB3idJhByX83EGlXsWx3LqqjoRgnQ8/DH/2lKt0LdOrZazkxnyMDkdz +XgHGZH5Ukj4ozyPNaGBsvmm4okoH2J16GoGesKlpEvB18UNmoHECLgztJxW4XoBHGaVJ/mYaNl28 +oIoWpqvpKPuHszrX0DtM4x6YCI0GPZ85DEs/RqcyWdDX16ZfIkwFFZvFFvZUuzpHFbzgS9892WM/ +a94dtAFfrgjjcbjVTPI9cxxV4egtckfuBmiNDzeyXQNmetdqZYRt6AMn3PVCs+Ac54wVbzgDXpVL +I1UPEXFLW3Ow053I0bgReccWlsmOhtxliOA+dQE6RCtBJ+VpbjkcC8WwjANanuDI3YD5McxjUpN5 +9QBZKERd7h9NV14WxwOL0C/Oo3IG/w+Fqn5t1z0KW8QxidSSj0N34Oo5la2FuyFCnx3+u2OCgBvO +x/iy7Hcr1V1Y7jRxWQJK4IZsCN1fa2n6bpFRdXjbXYwWs7AdGmmMUHAg03I1fkGaLXZ75sPuLWw1 +MS+jw9RJ3uKQfm9WxXpPqJXVKJG8iXFtkH3FanaSQg/2rMiTZBXpuTAWqlqtYf3gPNTYgMtCTUhx +SAkzexKWtezpc2PTN4ze3s08XVEz6FM9MeNGQv9WgCNduvdFtjYJQtPNVNEmRDL4MP2RzCgdYtud +LG5TswpukzYDjMucokDPbafVJoVYD2Xc/Pv1DVP2tRMMGgjQsqHr8vkTip3D6vTpsqzkfxO3/Ncq +GngSAz1x9TtSDbtp2/f+MgX89t7P6Ef+M0efmbv8kihrod5ykZhZXt4qxGUS/vQkb1vSj0TUGDq8 +grx4NigbhjFr0/jjeRiuXyphx5Dz9N5crIMs9ueCZTPF3iM/2A1boYykEgWMkWiMt0pDoDbXU1lw +hR/nWtoKvtrzq2qwWJN3Uxl36z3fZwqcAM/XYh3ETkJKi+uL6ptcone7xsXdBA4QC3klfH3xuYJ4 +30tqrdXxXhTpCYBNuq5cZxhmTU4vW3WaIwn54rIvdDYrQA0AIoI/yg7v2ov9utiau+dtW2VDydVQ +mHKVft+gmmietqHN+7kUUCQk3cG0qmubHjGJt1Hgpa5+KqMuo+8JWVWKQYf8bkG+1N5cP6ptVnSG +U04bB1wgo1+JJYsf4UpL88ltua+M9ugs7r5VnFwXhLtnDlEMTRDPx7uh2XHY6P9jdQn40fReo17C +ydnddrrnVboUEah174mvnouV1cXD72FlQobSv6KgpLLannktvbdVfO+q6Rdz9KCJnVR048soFC8z +1YdXUn8YG5q6bvNk3Yhp1aLFNZhoTtbmdQD/4rK8B1zICBP3/iES4A35gjcIyA7altRyX+aFGxsp +jeId/H2JgQHtYxgA1IxCF5TtseleCWmYuxglCQfqPz3nTut7CkwNH1BpprlAKBaa8G8JqGXxlxg0 +6o5j1IUF2dzIsYthmH+PMMdCCe1GPNWtch3JdzBzCRbN9oUo9loGTQK9x+r74k0FMmEOy3yxXgj6 +Zjl1zNh1d4Z7sgNjhMpmMWxnI7ZebwvutnfYIGnhcKERd6rWZtuXI/ZWSmyRyMF2P3haCxh6J4AG +80w9A+28wX6ubdOirVsof8xa9hJUU7pNwA3qEDtKulO0OEBXFNfPH2HgYxrpz0rHnUzokvriC49j +TKM7eOhFAWs4wYqiqe1d++kbNgJ5Pa57V65Xx0ouU803KbLNpBSLeCalFc+iE1cCKEdd6rKzrkEY +V20WJxD8HROIY3Mtjk0Y//+BvoZH5ajFuQR8dscuceSrZo8fa1yx0rgrXKdGeqcESgwdjo4w/C+c +A3Aa4R3gSDLQKcfBKEBn1Rb30GUh+pAHigjMIXEbh2jbzSghtcqy11yf/Tp8hQk7U96OzU3G5UYf +KctH8egQiOX/DxEdKSRnY+qkXaKKNBxkH2ir3jjPqIQLybWcUGOGgaARXvlzqMlqvMwunwMWMKOZ +aQ5NZohcys+D46XSXX4D/za4pqxwoFo/Qws/uKzSIxYWJbuXWlctkxq41M3MCM+0fO5Oqp6uBMgJ +g6p16QRX8+c0aRE/Jryq7h3dEPKMd8wPsOzxWJb7v+fxjEJHabiyKaUEwsHFOnRIha77s7sRRmKW +jbYRX5QWSpNCNKgVauXMbQ5FjZ1a6wx1IgJ+qJ739F6M8QvG7aUujZaJ9Ath82le9pflNZgmu309 +nAanqUcXgtXeoCdPpBrLink2Bsq3Sg8MvdXd9TpCHI3MezE8JQ93Qk/5zLv0KNWr/cAk01kDjJiW +trlSGq2Hse1abe7l+EkqL8xUT9ITj+jMUyCsLUXcVMX0dBwFj5GR/Zu5CBInh7RRRn+VHBzEcyMK +50cnwuE5+CBkC1XbtZNOM+ym+W9aUetDvjSkXWtVvpJQ0sNJI8PayGlIJNTk7nKGaeTYnnnh/E+N +XNgT6TYfFsd/i+psJx2g6Dq8oxwc6A7Hn7rBkiUw/zV7zupxqyYaXBziap419K59KXKB8gZNRXWv +omZNGXyHW2ctb6wI/vjsTApcP/hHmdhSzGFqlGNomnbCKXQzBGVrSkKNgo6c/9lq4glkSU+Rync4 +MBvmTrOxtxnxrhl6iHipVz1aXlQLyKFI9I3lh5Cbg66itRGLLhqjM5QLUDwCrXRS8lo9kzoVsL/b +LFdMvEPpVHy5KTM5R8U5uMP4gBnqBQHRK/UbnN3ry9WGJoune/3Z4VixYZRbPe0ABHga7lEXbIOh +xKDVr9pBRm/W+94ILksbgMwUwsnIZzga3QclepwjTiGvVZxVlp+ZlRM630V8vvVtDBQbPFyviPNK +d59MFO4Tg250trGqeQSeQVfGwfHGcLscuW8wr46j22UCl2mNiUCjGoMtiXNzH5p+f4Y0ZT8HxKl3 +b2xz9UBade1eDrhGowYgYO1ZGWa6zDzbFvF/kFDh/c+lGczyzqPl6Tz3Dz5Dot3i8BD0Ml340X2o +i82ZmtheBZicsoT31eDytf0jI+gbbniC4M1e8zJn2RPeCPX2I2WY9XHC9WnmOcwAJ/coOSy0UstJ +CAp66reM4r1aBaxLei9gPrg5pxWtGiJFGgj5uoCy6jx9KFwrriknJyaylXsJJLBwoknCB2YFSe5W +4pcmTjnwuYeD9mognt/RFtO0ZtBgq/MwvsUwkomOA4RnCcUmU5n0qjkOuFSRuqE34Jgb7aCo5CPK +JDpjJuIU9xzIuISRcZ/YEkmr5nNyzYQprv4KI9nrP9dY7LJl5KKxRLW2JxfKMYy6jnn85vO6pw/l +laBcLypwBxc3U/6oIGfqQ/qZI6c3pzHqF2joG9+RMF+VSZ3OM1LX6VE76YHwDU4+8UWy6f9xffDK +qfL2geumy1TvXGDd62AGsn5scENtwLA7Vna/mla8nEH2+H+d9cwIxaYunye0RKcJ2sGH9mELdW+1 +emoK1HTFExhi3Ff2wBSu385Z6IKjOnSH5Z1B0kQhceCoGht5+svRd51PouA6/OoGv5kOphVNMn53 +Cj3X+SUzSIlK8yPEG1BdO2pC/+9Toc+/no9vu7/+FrefxiLYkE1MxVpICEtt7OLZKKVWXkeomGAR +IdbPtS/pP+u6nbuoOOJFtTS76C/Zavd6mmChbE0UD9VGMSC/aHJufbfJW/Q60mGUSCNw3mKW5Y7B +C3/lQipWgWF+tPPWlHxp9HXrwIwxqNNyzmv+HQE9r4s0NF+TycOLxDZk0Wzzen0M0WbYi6zATuoW +RtR/HTk8lfcYb6IYLHsVbYk0qbaT806+62dNeVUqGid8gpvRvYXjK9IWyLfBWKSZWQVU0vBQMW2s +qhuEsecXjGqk4C0UjUeLPjTzOFqvXLI5fMFQxCT/Xo+sNjytS3KldqhP3p6gRuhR8AGjht0EDpL3 +isMeUDSPnT4KnQhLKAroOaW6C68COqKp6TyVenx6yOeDTJri/njs5UsDG9BKhPHk2AndIHKP69cw +Ozg0ijzOHFrHpTKPXDaU9E1i0uEu82OEBqMnM81al0aAxI0yYgP8O34MAhqdL7jqk5MPUjG96cWR +nHoJaop4y4Bw7/4oMTfeDEjWasnQ8BOO3e8mkNPm4zKdsJsZYEoTSVf6ErqSIGQ1QXXqokb4CEHv +UV+peVLKu1MDgS/xsRQLprU9cG6I0R1Xw7O2EH4g+j5EsCuHe4xLxSuLoDis4Tl2OGLkiEg+jMjV +1tC4rl0cSHABQBmjfT52Jhlz6EgWKl0AM9qHTlqsN5dX4K+6FBAmq9lEF58K6Lnlyw/JWu0Am70i +4PiM9ZAnyjo2mkLEHT5PGrek61VU0vcUkDqxbfG2EJe7f+BM1oZZy71y1CflYi2VMnKtI0inqx9t +tq4VYCeVRg38utu9cVH+ZQk372ueR3j1lSfByJIGtw23gGWqKDFDYUTb/gvw2jBoBZk/buGltFeJ +l9w2+584M9dn4+HmBbZlyTypedkqbjDKpcQuJ1wSEU16vMqBoLLcxzB1EUU9ARiSOUasa8ub26CG +Hx1hFU3Y0pRRmL6veOMyuNgeA41Pt8AXYtjuXugBEZtSXbQWMrmp4LmBGKAKhD+iB4ZYyiRArNZ+ +EOpcPN/2vV9T/16BL0n/7KaxSIUWCjOW/FiuHzP/sb+L+imh5DcJY42820DuQr0V2jGIDTZlC4ep +JMhW0whNwgzI/GZr88r8N/BjYUGvEu437UNHvGzXA9mqindYQMjk/0bDnmWLQgENx2UdrnDWGXTi +QZotTj/dx1GVgF6gLLXo0ev2+VRK5IG4P27iAupqmERM7bea/elfz/ymONBHZwuS4Xtmi/5LsxwM ++gNJc4/+B14TAtcCyvRQe7oh0ZjiorbPSUqf0BD9YGnoZUx+SShCwiizP6Mwj5+MZ1BKkr2wgJFk +2bEb4sbYhFhaGHuJJLVLM31S3TAwhmFmF8oHH2A0/h6PPpolCz87Mg8Ea0MIUG93P+4+0jwxlbLH +ZUxYQu1xZDutujZw3fsdN+6M4sJIxUWzrDNnQc6AlN3WX8dFXaQpTzJrH9mI44ohswdVRvg9/hd0 +LArZBrYa7Cn9acEg6TJH+f8a8iBC6rMTMVgJZslOOngmZXFrEl1r8Yz6gvNprrFahj65l37dDFxG +jKBewxXRlrJzut2ti+VJWO4oB6v8CN7m07AcgiwoBUbwW0WEs/ftbGKfhoWc3s3L/3JQbCrCfmBR +LjwXaMaHRcGWY6osuAra7lquf40AaVYfKR+ZQdaxqp4ASR6d2X6s4pYCo4aawVyUvGbjhEaRnjWi +BGbPVs38fX1UxVRyaUMpoZO/xESxo7Hu3xbFfBHkIQ3N7xxgaZPZ+kiBnh9+X+zYir7bclaRvySP +/eDzlykacHoGJtk4KY9fKsn2jbjIs9P15quB7qbWftjpAcwPjFntQjL0qOU8f3y3BUIYxm2ZPoG0 +4FfU4aezg3rICD7cZm3zVSomOuvIgtJ+moCx3VKl6tIpqzwDuJTkaXamGLD0GDfxeTmp09J8JOjY +sLPDKIrOhmIoIBU9QSPyDBPJnHqsyjsBs+QMgzsW3B/Y4tsCSn5ErEEMSUgLmUJdAHusTuB8LEku +Gf9AncuoFn7VxCILq937hfCEhJ1g2v5D8MIanVeL+IXxyQk9XJRKylZj9+QiEbJAMK1LV10QT0i+ +3q9tIHUXk3fwuFUVfzteq/cxXqJyXoD7fJAbZYoNBhdTLAiT0U1ZzhFFGxIlj3dxxWxpkABtj3MJ +CYCdTbm4WUpHo7lNeekc+nhxjLUSEVaE9TCLnp/UfvxLxclRNe1ty98Fw6s+FxsT8HPD984ILFjn +7uAhZkJSzkUFQpLUC9B15e9FcspvyRfMRbPv307KwCmdLJqMSwP62Ui9N0c0GHNKgpuaGj7b/LKp +WN5xwdkaHqne+4ifcU31cu8LK5oSVvIE/YEvFU66Mdz1LiycsUXSId+fOoydo5Hsf8ki1yT/ES3b +eyMeGMUzNPfrKWUrzYedhGSZoIOM/jDy4ylULUA3pydpRFSMEee3j3w54DGQuNAayO67+rmjKo5m +e6sP2K+H1rNGjwuatJ0hSTiNjOera36kwcfVRBWwl/+qOF3ihHYSOxG1xL0r2Le7gGq1L8JSJhdr +33pY59+nL1g1015mcTkwinLdBRoM1Sm82Mi/1/tTPaS7XWm5ms/qwaswP4jH7nK6AgWVFhZjlBm3 +ED372TembY/XlNcfZzTSL+0h/iRdCO+dm3eWIUL5sIdFuMAT8b9IR3WxfAl4zsrhNIBXLaBphU9I +MNQZYNogyHizjA/01RDpOsQoFaO6/JwdOL2iHvNlFde4Rj3j2F7IKmrSlVZlQmC1NZ3OyhcrfpBC +sONMagbpvM5eoNZRQ1Lgw98NHrQ+bH/8R0HE6N7HFOlqZqg8HLJzJ4KxALyGlO9r0e0IVT5/yyXp +I2Snl4ybeCP1N5skHugWodk723073gurz8xkjDr2HN3fRIsXFqQQap0XqBnnljxNHJ1tr2OjKmDl +7Q8nmeBvwDelg/G3KtKTSpMomXDC0VctNK4LvKsNFUACvNCcrVOzEOyoHbxeXnKE6JPlDZ+K1Qe1 +rzv5bLvJX+tdXD9z2KTb0Tk3qQDUr4KHVJUvs7e0VLz9VldChCl0olENQdv95e3/R0H01DTjFpp+ +KROCnda4eV+emoLpiRZ/TMjU5mynpAuhLLAm767+j4ykH2cvqk65d9H6I/viFaikktzrua8pgVe4 +99J+X5Mr8FSQlMUCnBciv6z69ohCT+TEHfZ+gYLe0Az79hEUqANQqWIFQO6nFCU/Whq6Pi2me8eN +WpMEQYx0XO0kuKY7MQpsdAVvd5ZobmyVSlqJoApNdVYGs8PmOeY7zwwwm6OvkTZkEjJBL1Zwbf9C +6FqpbNjaP2KwMNhV4fziHGY7EuzUVaH2GfI8ZnoJJ0c9OwZblCI1foXm9eC/o8gESDsYrE9+p6LJ +O8OXTRvhCh52UoUKTeZuCsDspEv5Gwwa2QzKHjimdwmF7rqdbE1juXaxCmCJXtEiEnbjbmWuld0g +6GVw9JRLTye0Jd5vj31JfgVUphhqUbAjkpfJ9WUEqdKGzM+S77/FPcaVwhVvsWHDrxwYmtGdMXOA +5ztqYyz+ZJ7MQuQctU7s8Gw9aQ0+Hu3hef/IKZozvieN08cklzKnhUUb4bkIemo35tteWVPA/xgT +JRRcxKGgQawJ6fHKfVnB5CDlLKJZskLmBkyvv3Um301Aa3ss9wm1U4hylbWpjKiU1lH1jrIOkoe+ +S76nj62q8XwWFvRYfKYslloGUyJ3pKsBWdJmDQLFKaQrGs2uXIaX3YpEU1vDFTq0l6z0TXzt7uoJ +CeX7tB3JTFObKqA6VbzC+O/Tirj6Z6IjYVbarnydjkVQkcWa/xCYwp8/ZfmtTPX32kW55RSzapRm +qOqKwrmFBl7ngaM1HaQ1Ldb20EDOGiLGYJ/Q1iBh+49F9lGlWWrcVovOtGFVUe2Kdsx95yXSFZrT +Sv89KSLXk2PNFY0ZSNZQjmgK9rFdfNUmA61Nsiu4u0hHWEwjMBiOEIWtHALvONp5Ob9s/re9mBZa +rl0uqPCumdo8aRuMvVVHoian6/QO61mjXXqvnYfRYVsfMZ8uqnavgGLc5m2+FlMUEBNycOFuAWp9 +RULbToTfNVeQlwxCASGkpW5FNvT22XVQCJCv10GuL4qZrh18I8iJ4iky/wSdkGIlAC5QYkAnu8/P +Mx63wUP47XbvNqraTCvOFEtEt6YWcAC0i7U36k6VW4sMZ+B4T0cVGJN0Sz97wE0kUTdyWWbFswrQ +3uc9SBzPWUpMldsRr5oaW3fPLbp6tqJBniVHIzrkvwiU6ywmKRPCdWRCT2z1WBPBJiEVAUfJSHR3 +Vz4AEcmLhRhXU8Rrs45QUsRklHdMWo1cJqgx/ZetWqEj2KdNoxCHJxDAysB4Clf9K8l7Km97WbVl +WDbvxYM+PK+vGu6KeLFirgltVpd8lc8NTr1xnok3w1PjqwjgnmHlAzIeTYni6z3v6NhsI06bF/Am +ud0bQj6QTiczi05Hi+4aXBhPzGvR9qkfkq7bT3whW1yrljME/k8po7qLKf1rbJBtdzen0qr73xCL +z5CFTviatoOZjaRYh+6tswUv9Rh4uX8TFkn9mE6F3HIruf7lI6ppU+QL/N9RtUgHJ3ludKrtC130 +iVyMVRbOkA0QZ6ERKUb/AI9Tv0qcyf++6zHI8b25G7h+T+xmJ40krUYtAOWo+FinT0GqcmNmYZRp +g2hPVFTTEaHIpLZ7SDFdgLGHqDA8Uk138iww0vkZUvRd6xufvFD56jaeekWuIHbsw7znrP3io7QV +uPq84ncxoe4hPEEeXSGDXo2n5nZpgbu+L8fwXK1pQVfq33qnUhY8O+ABOBH7bS2n6lGYk4DVHbyq +g3vgjc5aJ3N+2/k0WxJ7DQP3I2J2E47IWTE1eobyvHB+6XjytwT3LCwchYugX8hyogQy/WYMek7d +xL/sSLqbvod58EEqCFCQZZyGs9XRc7b0ztZDUb/UjY2iJ8i2SizCluB3hrwvh0ovmd1TzqaDCGFn +0IMoTh44cgB4qhxSrfo+oG5qYyU1OB9n220x6cDPkHU6fKTV2xR67o2N8p0FXdypDwieOE25Qvrs +bW2nlKvXZpSLF88h1I0MrXKNh/7uTm09K58zSANGB7ivKBvHVrCHDhq7T81t9+8TiWLnOF/N50WF +yV+CtRCHjBZzf0Gm6aoR1e5ZRF7fi6j2e9E/nKBfcvWU/Zy+ub/kDGoz6rvuzGu6OgGASJshEKzR +PwJMrsq9Q5HahfchIlnOVmAUSjYCPsHSFGzS0ZSTaur04WzH7gsu0Ey9WrDHuELq4Kem9jD1Ksck +leBIy4ZX00WMSba/DbzHkJZJ4DIx3HZrkjxQn/6dnrZF5U7jYUymLZ7aJD4CT4ZAlqSMcMKlE5Z1 +wyvb+wHfF9nAafnBOo8l+GP19Qwh53vnzI42VNl1ppTvVzKdgEusqbDJPRV8l0MLWoyWzLGNX4LZ +SOCUYq3xw4ol6aFZQ9B77AYe/+X3zY5jsGnWg4ge0dQkIZjn/LkuJwl5VRE9GRWM9UudRfbSwbR8 +V9j2gwbDYNlFc6JbCp561weUX9NycTLiumbgUoOubCVtxBLWCTSYPcfjt74MkzGPXMwA4/VHLS6D +bvfxTcAFsXwZBv0Cpr2ntraLVBk4BwX6ZmfvMX1e2WCVMREUTIMmg9ZZJhlxxspHvQMac+5Gm/Nu +ZshTJ2Go5uIH/9+AqYBItoce4YHu39c7qnXbhqs21UVAS8gLU7BynQEqqEbySjCPDciAdzedYyIH +Sgkzmc8Sa7g1lP4kpm6622XbBXAGGyvrJzYjownwN8NuRnSppielEVQMf6Vwdzr71Xcy2M+DfGEJ +AxoCetH5kU5cH5sXp+k3xvMkDhfMaC2m1edazGlKLCovgRSSyWbikm+vdRzxkdVNzDjaKfh98T0N +tM0vDH9N5E03h2f0GS6T8J1JjsDXlny9YG2rLLN7d1yymD3pWkVxLnDTt4FG9lzsNMAp0yNFdwyN +1f2AhI2sU814L4K9iV/eqjEErWEjLOinJ7NXI75H1xyZdu4VoZysJGU7pWoprSWsC/6ie1Tvkx1/ +Th9GCAGxe2XC6isKBVkO3ARVptV9JqdxVcBp4PuvVGTTK5mJVVy2uzqgzQWoeSntmBr566uG/Utl +sxc9++BjYQlq+TmVetBHnGK3tiib3Nuu2N4FPe3p8VTLxPJHePzAqdYIXXgCyGTDq+5u+8XRjgo5 +UiKWB6U6r0DZQn/q+qWiV7t1/C2cizZ/qqpx6zlsfnx25xoVCyTL8YCirn/RJ1XrndCkS9WijRW8 +mXI10+GXM6onZQhm31xui88oPTGEcqaHmAYgTOdtoR6xVEJu6wZkoDNWzLC/SbUbMJXto7bODQMz +OuEoo8o9uWroVlsMjQzw05UwqDalb7fxgAdb37y6UOwzb6Ek5bSZhTn6UX6eFu3NFULu3VckiLbY +/3v7MS1bgIdfyapsfspy9fTNoKbACmmOgTY3BB3gtz9z/JUka0E7+8YDqZEuO4Vr+6W7TGera6FB +jE85jaVkFgDg2PxcJRwHRldPtbKcKej2OxXcxNeG0YoH8xBaY0sPvL9BEKNHBc1p/bGysYXcIavu +/sAU+ONtHPmA7P2lv8Z55xoul7Wa8vUOKGIbBEZRMcoCPYkEHP1S+xZVoRMLN32l3EISEOh/BvOL +Jc4jfkZLDtT2EWSkveW8bicDmyzWNxNckG/Oqq//SJVUUgH8jyZpndBsDKUT0Z6COfjdCB+tl8uq +OpPnn3FJEExW9BA4EA5lAvCR6kSy/KohoIn2uGP6U6trSSLG6/FcNbfUMcpTtIrSGuatMJqbdAe4 +oZsqBK9CDZ83TasSmoBEmPhzQxLhdrxFWfIo4LdC/ao+3629VGlMJbCHE2LrrscXVr3DOpJVGLZI +3mZNl1zT9D24ciuRm+hZqFih2Y2E0gr51vcYuWNZMBeC+CdDaCrVThvanLK5mhCh+vfawnIbQGYO +iLxwMG86aze5l9ysCqHB95p4QqNe9XgBkQgQSxYUaUwL8HSx/GQaRLngyXPBqhthluahKf3BLwlU +1HVFJ3ZHrjpMcdExSXYIjM3sG11g5kK00LKyDL8LiiEI3u/h++nqKhIKXv6aRjwdKvIje7VOhRAI +on6oH9DfamdVJgvZ2psZbJk3ynXo7FFs2VhwMz3CyJ+TSAIXJHIkB162G+L3r8XYwSFuDRpnBzna +xPZUpC62TupVjEpcYPr8Jm7xdM6WNC98r7+10f9eY8bJdjBvJSJOsnNEigtZ9vNfh9+Ebg4vsy2M +yklWrXFhPYb7gL6Cr6jG0rHBPtwzWDez5C2Ve4K0ynZUEc8MqshdlWPpa+D0fXdqZ/J7SLqjAdup +pBN5+S5D0mqmEbMyBEF3WFJ0xWG1qg1rWvKxc/wIpTBzQtcd06oV12X988MLXT2qxjIgAW5TmKlZ +zFjp/rCuqx5Ai1VgGaxIp/1PgDkxTS3+NWjvP04Z2VuB2DsBi28Bod3pqyE1fsz7dBnkXjXA8O0s +iVdO9MvoZfrBsD4DPvegfgg+ujZ3EAWHXO55baaSOqD0q26SHy8BglgqlJUbV/XFuT2pFje5eo9J +2JmfMs2ME7K4xwbmaUSdlxbm2rbEmJDane9SBMHAH3t1FU1izpiZ4wQPhfQmfCUH5KonXzA+/d8J +aYF0WDocZTQ3AoOi4RyzeYWAHR5IAd69585CA4S0BiDTgjgs1UPcoz02SNYUyzngeQFBd5ZTaUDZ +Lto+EVAEeEls5XQglDUjQwObB0LTTeVQDQ+dAo4mkZ/kGZBWuPN5/Sz0N8U/G0vtnKiG+3g51qzV +Qyna7DTAbb+BqkxI12r587t6tsz8k+5AyCbaYlTT4CtdytbPsy0P6pEHG1pxEW+ADeWGnnWmKtbq +gcs0GTNlLTEKAU5gKmtn4yRhCLqDd6oD3LQPos1yQu2W4cAPFmn4laFGOMTekeBD3y4KKUzA9X6W +1pFUd+ulr3eO7EWMNtL4tGPAxRGacmTq/SS3kWU+6capjRvrECpDHMhwFzKr1nfO/wl90WWOj0BP +bxe3fz/kSs26WRGmi2z6guXgGa1mkX9l0bBqbfrbxB9HEi4cdMoBnXlv6TEqs3IVk7E68bn/afO/ +hWCphMrTZSUM+iT7bKoQE0MIlxORd/23NMSTW1KxQA4qjjZU36XNYAJc17ZewV2z6tJNfZWT3f0B +JNvtLA4jvoBg/GYSg7FHntOaOPq1zT80SG5I7dWdsQh28rKX15a3Zi6xAoys5IsgjaKRY/5GVMMQ +9vwHrFifZYww8lkPqaxf/pDkzmThiPdQGkzphrU6MZGX+l0xiWMsO/E+TrAwfcLtzPuASPzPG9Q/ +Litfg9MumSFEzR+/nQf4CJu9uzhNvs99mRsq9X0FfhZ1eQ1SoJwF0dROSKhlPUEfZCS6sJSrX9pm +JvCC650r1YZ5hOtOVFnbSxRSdemaWI1vsZJe9WfqWDP51kypKV5xfMBpweSbTnzRld1CtEX6tuZV +Guo94CDEenHricKftkxgF7EbkgUaW7fwI6gT1ieu/W7m9URcQOiCRJBF3e2Ijsy1tGqQL6Hm1+Mh +26dCw4YBUjVaeGhII9cia+7HrZXp8I7nrMN/zB4gjNfMmvtrj9TGW9BE4eDiRQszbVKrev0RkjQT +YxQm7pQEGb7zRRKu2y7Vj7TApO5xnkNM398SbaC907c7eSmZAcJ0sXKJj9GSGkuXPtqT8yoYNG88 +mZ4lyJLco5+QiUtUGfCXTNQMkOXo4LfYrOEHHZanaElswYbXIKM7ubGKAJPeY9yn+j0icZ/ejttn ++OqM0Hnz/k2IjRQvccLzYwkNEo/+7aqB8EQDFda7ubR9eW3fu8HURmEtwDDXlNvUrhahjd3BGXqm +mwkLurzbxY7Zhp12Q3Jf5hPFsTuNasiZtPvvmw1pFKNx0GDJk2XLI6jlvoJ/59gNHWfm4PT+bXbk +k5vyWwDt3IOBUpXrndbzjif4dZ9FGFy7rR6e4q8sf7voDF6s8CA83Nef38I0KM3xkhy6DUcPsPh1 +7Km/3U1yPWWJBo0kw7R0it2wpKBXrXsscaSTpxjhgm/8TD6c1bhv8HSAbzKJBY1oKUh6mrLQAfMQ +5p7LK8DHJRXbEtPEGetecWy122q48uPjUC1cv82SMgUh3XzDklmCwVX5pfeCcUp3HAcz67AWhMml +CDMhYAQPYkh4eRTjknqBLOAWQyzvTVFTjnD95Wsik+LWtAqTF2rgSHKG1XT3HghPgaXFtE6Ilkxk +Pua4yetoJk81JFLvmvgLH6jFHIoqLg1cr0iqufM5Fhc9BZEkdUat731OlmFk33f905QEgMzoWjkI +ifFWE5UC6oM+mcRIbzb9W/wAG0qf23cx3BWX+yh9SaI7W7pqhhlQcR6lLKcrkNBRNi+3UbykVNu3 +a4PC2eCuU6X5B6bpynyScEYvpoVATjrv/lGiyCatwziv9LuZviCoHAmbyHr2ToXHBUWeqlj/W6FY +EFArRx09Zuuq4isnetGgRMABRYf3s8kl6ZFyx/zFE+nMNgWE5B/nLuGQbm0WfpsU2l1Ua8VlpICL +qKy6pht51zF7pCmvWXF0M/f5GK4z4Ew+AjQr8hMd08RoFxa37vRMIWb8XZJ1AhrZapcfLw/T56bo +qEdMpk088pCwl804/YLHv+ameKU5icMlj5lsvSOS/OWJTBu+SvRCTAowIDDnW/xEQGqCWtLDz6VE +brm7cJggFkay24HGmbCy6Wln5n3bpbZM8sklJVLEezvMl8EVn6QM595rBCCkzJyHujxLLfsmGQEX +L/fUa7I7lt9buaa30qvtkFng4T0NThCIIr7gpVgdk4ME2oDq7dhWZTATOhIRJPjTaUjDEXT2cxoB +x1oIisBEy7LakPLH4UcYVT68Xvp29LkEg/1izG3Tq/NMBu6nOpG4TXEHSDyLWV0X9jGwvGEIs4eC +7rPGhrl7H+be8Hb5OenSH+2J+TIYtxYUcWcEz1pIaz1Fp0Tx7c8Bl8DSC/JSsvhp4GGX8D9XsoJ6 +D3ubAkxV/BkEMDIBntm79TCagqar8jJab5sKI+cm7XaRbyprZXqMLIl52dBCxLQZ0eIy7g7uN9gi +gxZUpPoXrf8ffJQnGt2mkGaEYuvVYQpDgJtrCjVNPVa06TQiR4AB07WoPLw63Ag6iTWLfAVTI8PV +IiWtUHecfkmIYh6u2mr+buseQdUhDcRZB16PPUBrZtY+DtGajKPIlxHDhTOxTzkDC/K42A3D5036 +zcWjnK52NfwT1fhD0eoEBBDEzOwIBfHqy9rRGneTEfu1a3MzYa4rVDhLQ3Bb8JRgbU+oQca04/W1 +3KPswAQAUxlRNQEvVBsdhp6MYDgDB0OAeJR/diwCNgRPBKhWlmqsn1iPamqww1zmqrW+YEfuk7iF +T+OXAOAnUaY+Vdkpex/qU3myrxmVeDTnYU9YoIIF+SV6/IbQ9NFJadF+L+3IvCcIxkNXbxs8Vyjq +4shINBvc5quSxKrc7MqJMPSzR41BqvMy588fReMxRL62mMYtjVPNnWjrZNU760pYGmTGsG97z+qC +PcoImg/SiGv5F/0tmHoyP3LtkVlo7UBM1VU0OfavK+OrozU3vba45LLyGEmt31H0P4IoItUAyJKE +xgjX3fRiYvmW7C9YKewxY7Lww8lBs1bGjvS7O4yxOrg93AOyz7SoWFRWyE4WR3UGdgmrU/MU9AUu +kp/SgecL8V0s23tW2GHtk6Ld7Jh88dizMqkhHAcl48vgs2SUaANCgiuNyzY7zl6FpdqSc98ezFdD +msQMFzrlHfqqovYeMsreOMeu71VAKS/XhcMh270H8/LIc7zrT9erDAimLlQaL4Qf9S+R88Lzn/ec +YKK5CKxxePcmpSDBxnQZxvLVZ161cPICvsvyJKaY8aSfjotV6SUTaWgN5HIgfh5KoMJxe8Hh6dWN +secZE5imySXLnrxjDTwUbtWRKZVtOhjbgZIv3rS+TD2XZlSrFKulY0YF+CXYeC5hRGv3tuKWeg9k +HSGYdyYoRwhfwW/A+Fk8R+fmqz2vI0Qx6mxCJzAalqLXrfc0Acb43nGvUMn/r00Z3IVdPMhhs5yw +hnE8MtvQxB0YbFBRtEQOqJ8ub3yW7J3Q0Xtt3wP/gYYcLtwYVl48H7PAnuR4amNPf0hOW+aMdJW+ +pPlj/av5CfzMTHsX5mulOdQABZpeXKEOeC+cQ9OhdG/dzI96gDWH+vgTNHkk2pOqQefblDOPP97a +/offt9ivFxULI+RJD/RmW1vegAGnHwnt2QTVOgDDGXqZOUudSCkArPAnBl57Vt5ycpXsEGlWmdaj +/L0jyQM6GQVGkxfukuvWQnkOrBTETVHGQi8UbEvRAsjzsq2+sVcsFRxs5VCcsIpyQc2aXeGtfNQ7 +Xt16hmqKkIL+AAD3Syv/PEfhzjyJ6VkJF2eNhpSerw+BOsekViMDOdShdA+idiJ6WC4KhRb4ahV0 +4m4B/hD7LQCWILtIDA6gRhYrKWTlbt9/jxDatvbBkPimi9eTZxAIgOcVbhhcqBxYGdI+mXKMq7lh +oqOVMMRyS164qS6GZ3jzM1cknjcjuDDkeaorYjdSWevlB8oiBKfAShQqxKUz/kn6IzzptuDIOEKG +A20/IF+M6HCtypdoScx9OpvfoJqGpXLfPHNV4ONCM1qnKFqJsrBLOKMRRhj43PH8WlUotgaKyBMT +qHlI3TZqdsVpFGgQyHwhea+aPkbcx1r77Ilr3VkL7agXilrLiagv5aIeIaFhj8viVlzJw8JPk2yA +JGblkuY/XuMbRfJdC7KDeiISP8olRTZB5lpzzHq/M6xshSQd9lcPsuoqD/+vkGVqgv+7v3Bs08oZ +BBo/jyPL6zzj1J/gfNcSQAGSZHSxbIqe8FIEjqT0ZjebF1A5eyoWN5WDkyn3vYC5mGhm/lIO0cXe +wKsuuYmVh163Ywm1KDX9RXtnrc5b4g0d0WHRoL/67r0ptJcXAxf/dyDNBMTWFBVMH6WyqCk+5QSQ +O5hHTEoWT/Rh541UGZ4aWq+WgqV2jwrfM/pygepKE619EWidLy7bzcgQFuruRDSKh5HIQjZaR9Og +85D0+uP41rMzYH7Ij30PhvQdbI4vM7QOqpYHeSjXOkKDeuJeHiRq7GH+74Xp/U0qbNuqFWeiz4er +TImuX1n2ysFIg4IbWlvp6pIxJQIRY3czXQxxHGbiYn+jT8sxagA4wJbWkGGHmYuK8Cjldzy4B84F +z9inqln3z7VoTXW1Wy6fsF6WizAkXEgqDapO5r+RwGfWGnWV0whPpaGpb6t0thDB0ZiEHUwBVFNp +2/YiqlMvXtJJYYQj8Kf6tWZJXdLEZBLkKzOd8g2IPdnrJxk75j4IAvCbGWs0mM1iTbwgV+nWMQB8 +XqevT7E3BO9duiW2A+YmyohV8YTiNCB6mitpwkXszuFrpl5fcow4P4YS04T8qkM+jWUxdEkSQeIg +DG08kaSQlQh+WfCUQEzMsfmlhcL32YM5pwYkAdQMGWaJVKbWQYkgl+Ypl4liot4yhZfJ/+6xBp52 +DzRGrJGCVXoez+8s/xXLsrD5WAPgQFfeorrvYuRxx1Z75XLeernRQ0brLHx67fIbO9OWkiAsR/kl +0hCon4Mqq8x7cUxxI8CQqv/ZN9BMzyl0lmDBNuvRH704atGJ69TOAOqJoqQAZRlDKzvS8HVK12Ng +W4qE9rF629etRLtbcqTPfvMZdzPEfzu+2XZsUeLM44uDmVatV15OS3WQaJVKF4klWNqdUd9aKIwa +/CcYx8OMtdnDEtCdwkx6VEbz1smQPSBxvh6a8pLVJNKBFMY0ioE1Gh1nK0Ac4a0RA5BVi8VtnVa+ +tVk5/EygRQClDTiyY+7nZfQlYetH+eW7J5QM52gmHMt4DZVv7iPgLB4QaEKNEqSz+U2tAnk4aHMJ +VarQw1pOCZ/nx6/dNvSnfyhSiThrn4XPsql7nDmbg9XKyA0xq84dzBg2mvGZPCpKqaBa0dpgwvT8 +yS+lKWObKWBAGA3N1peEI4sTsOrUkDsCxk/RqtwHdEIvwjcZ30OjlKuBjfdWmI+Lc2UfyTANc/XO +EYx8YC0Q+nxY4ekBO34dz7suIhy/O9mK+DnAFjxyL0QArmicy/6XOL5BuoDf9ZR3OoMZ6Bq+VMTw +MmawwycctVvx6zrh4gHMsElZ3/YGtgGy3NeWYmdYJBbPwRdgyO8WKVMt+iHF+KCD9Rja1yMg551j +pSWGESQTC69mF1EPkpOGGaKJ0CaGUd+Tmpv19Bwve/ptoZIyXGKi0VLDow4m4zovsdmX6doOMexF +cctg3osoxs/rkXAR6mRiJ3AcDt8OsqxSVRu+QNAil//2v45A7moT1Pcl2rWx4jLJ1yhdpTOkjskD +Kd989+4dKN665Ti+k+sTAcRFFe2kcuoutPfeJCMMDFgcML4g7+QEvMg0v8I6RoqYETIw31wCBmJt +Wl4DXAR7wQGU/F0jZ4LmlM+RVId/Mn4zP+83zfPjO2N5nfT8NvBbJOCFqpEObg56NYoXMncS+ual +49I9D2WYXmCJQaQjsAZ7N3F6r8lYamV5ABdKl9En3cpx8VL+6xxGWjzBdMfWOfhWfC3KRJ99XXgL +5tirybVL9t60DWmAEWdblUZEBpvYxLsEG1dFfbow36RRttO0oY/CRexffY57PlqRJBXtCS53F8+p +ZX/ybdhqN8lK/Q1hLmutGGOsfOKLtsnB7S0Ot1Joqv2wIXEBEGheF91mvrkGgdtbGRmvZlmdsFZf +3jNwdKKSTBEOYfSCFIazUCG33hdzFIatPW0p6hSfSRgk2hPMW7ldPe89eFXrxbVTytMN+lovi7+R +MJLolXW3284gIw7AQItDbH8g7xG7FDK+vEKKBmAtXsjlq0CSk/iUa0Jemf+uAGX7CkjcVIyYOICW +yyEBiXkRS2obNJ+/jrTsll9pfHfKgVdnsK3qqJUgAq7MYF8K7asZ6hkFSQ9mMuWIjiuzhV/6dhNM +BPuTuIVEOtiqBGJMiviQE2cFIHl3Sa4iPcfm/7OJPftb+yWQpePa5hE7wybcO0y5p3iOOKScayE2 +V0WxuqKwkwVaO70RsZ9j8s2b5S+xvwAKtffU6A0yuNIGOk1mSmlxplmfYzHJ2wZNjKOq2Y4dRGJd +8Xy/5l5VI5oDQY6OeuIBeOcXtzCrC/xVGRgXDU5gEzwRvQWR00L4x/e/AanThcZxVyYHhYJZDi2s +gtHFj8UbYqfBbazExaFlow1RJq8ic4Dok1DHlYEHNiOQfEK6ufEfBV+h0KjIoOnQ/gf7RW9L0bDT +knHGMSHrfpi9cLGllWLPSXzKkK0u18pCB/jeOyttDA6IegB1z3GrI0WbNG5Y6BEorLymy70Puaf1 +f3witIAGEk9iJiBwdrNNFj0juqjOt6YLjTVMDi8MxCWl22kT58X3JteGEk6D8lgT2i8qIuxUX+9G +blwzbVrxkEZmgZ9YKoV3x9F/waogTS/uRrZ7mUDQYov7Pa6fBZHj2i2lCewwCXnQ4sy1JUOqUMGN +TLDIl2XCV1w3OlKMBwXXrZ39hx6Y89GO2iYKMOMw+RIHgzVxBxx3fRiGrZ6GH3VvH7Fl1QDKS/hd +1n58P/CjmUyTPkrW3Hwcl+kX4IwD8RMqEhsQFRFXP1liA+lhbz6I9CXs4JkM0o86hKXz/WAKjTG1 +98O14ewUW03JriyKVr54N/sZCvoh4ZzvjDdHt1nus1BGdF9LtAx9sqOTE3RpTJVDXDc67Zw5SGyi +adCQZRIB1c9901ECfjnS752IG/WT7n/Ylh3hWifMjiqS4iVQb5qcyjXglcoHnfs7bXQmRtEgPad4 +SfnIqpprHU3mrW8bGbXMqDka5GLiaarH12+4bfxeRE6MWr/gddG1cgiiqyok3NlRYEUd1SuNAt0Q +AO291zkHKizugGbQ0cRVw78KZCg8ICSB0cFEhTLj8aM+u5+dLb2fmWJd1SX8xHD2e7p/HSWjV2H9 +KlqTWN4b7xo0ylnPurXm2MtLeCIZ8QOCafzd+Z5p1sHZzg/uqDQ18ZcmRz/vnHrlROIYQsoN2CB8 ++RQfBWMZc0CACk7D43xHntKOADY9xmD+srb7VY1lGqikASSSGJSiqu/owU2fJnJlj3tQcqPTpGSe +amoZhnslM8L9f1Z3MxaJOFMWfqfwADgVUt8+o5KC8X33QaMKQniNjzCjTcUF9BXaCGdqOcCuDoYa +ADyT+Uqajw8Ev0qapdEgl5zdATcwwTg0nOzp0MYwXMIHbYpwQclSwJJ9Sm0KiFJ2yHkAXSI/8cPX +h747FgOW7uFkyGx8yZo9bP40uYrTnQ6T/mW/CBaFuoS5awJcPXXLcddtXvPKe95Fp+lGk+f9ccr3 +dRTy4Hf/oRWbOWwbXVLhkGh5emxkODWGbcBg5+XH1YI+++wYOgfBxSBZ/Rqf8mfLphXT1GAN7A4N +Aomiwjo3KpFPx3fMTvbvn8It80qR2l/WghsAAAAqkJwF1zZr6zVV6ZpxFIbNSzyCmVJBSmnNPhjP +NS0dmYsBPWPsqr0PmTqVG8W9YXUj4n/X7TzYeZKjUmzoYpdoMhKLA2V9OA4GjemyeOIK9Y8RTMMh ++3jzawEcRKUJxBrRz3SEClkVr+7VY5II+8LibI3rL9i/T8RWx1QSC98BJxePe3DW3PQVG1Cvy+ih +QuEVGX4LQJrn8137XhlOQykhX+jPWwF5o80lF3aLPfaKqXnsolwBE+YWRvoImxXQ7ljXsUIlZKqV +1oXB6gEec2VZkyO8LlZfOECZZGMglUCu9OtzzqISXHSphFL2ulrPbLB9qPdP6SoMi1BbSwtszR3B +04es/FSXtodyyCPboDi5NsQL0YSjRY+0wAZi/F8iN61HfwumUCMDt5a0XV8jrJWi5NAfXUmnVyBP +U2gVRyF+dP+jdwU7u/MvAvWkrSbGOTovHNkm4Yw2m0jhOc8LPiNaYIY8Xt4tff0faRyVln0jmlk3 +l5rIyvQWa0HRd39jfd2takdQEek1mIOEqM03hWOdW13uZC8yqU1QTGh4QAg2SFQ1VfSHBGI1hBzx +Tv5ZpUELiZj3pYU/tG2QKghPOxJKVxT1GJwWadApW7fvjzw2Kiang7YLUzI1wNDpGplxSdU8uwt7 +3nwv2kplwsB8FwznvForPiJsBAC1wPu34wYiHmF0PMvrEYrrp6AsIW+G7genQmFAQWlenKi2+KP1 +mqS43sJ77ERs9UBgi7vSKkWGzAYxyymWdILMlIZGeIGAhjtC84X/b2fpuycnPEQEB6nu1gcRnXPJ +YwRNTl3vgJB6LR09h3+QvOAQXyIFzP9EhcWA/525z5i4qfck+s4K0gZNnJ8VQlV/dYhpD1NuFm28 +l4kCcDAvAkENSmUDtuOgVP293nQbneALXh91MoHbdLK+vCYule4q2JJZlccThXpbTmyvxnOL4SRh +SHqwuW2EVbCYCuQZHBsn/fWumWAi54civ6TJSwSj3ItOzvU/3G7x/PypfT/mi4MfK9YWj7duDeXF +mPOO+hbwV4JbXV7yygYDcIO6DVn32lBa5nMDHM0NJU9ENDlqeaEdSZriJtxrgAtyd+7ElkljV9SB +riDeLPS74wCKwUmo8ttCsFLIyCdbXW1KejrOWnd9WFtM54cHgUot95YJh6ATdsPRogieyVBXgkyt +3OW3BeDK9puMHcNxcWdR/hlwZWmHZ2h4PD/NIQsKqhB7wH+RZ6f0jZvg8x909MEb2PGv9xu5uQ2t +uytF+bPK7SQm1jWilJ0mjan8/vd7ucRTF5XHpb3Kq8q1BXCEFDQFpQciiRdKmHF/+7ZY4ezr3jg3 +sU7pJP9Ne/tggvvfMPr23wbW3Hp7U0wrPvGQAfQ/1Gj3aMabTTstgiTzcvd1Zr4cI9IB2xKDlDDp +mu0Ma2P2V+LOgAqR0QYhOC4JojhKvhQ9D14RklHz/wxs3Y6rkMo/Vv4/TpP8XJKvS8xYXYMufWEM +TBEMmuRaNVp14hIirVAVu6h2xWkqE1Myn9ZDgaTbEsasbqjyQCSSf160FZyNZ1HuRapXF0kOZKBF +gGtHgOdQIkir3b7J8AVwiF0vD+gE+lV5tKoaRF/ztTiptPHAwaGKXQf2a539w6AHL7J+XWMijZkd +QSQME04XarViZvNIkcrLHZSlXWj9OQPG468C5Ni4NoO3BnQuxb01KjPHS2/1JttncKDvj1sv5dan ++VFNSRQxrumi0unUz58CijS4UrdX+TJJkZalDQhrpVKdrl61iWy/hMdEcPqSdQY/VDV8xErWKf3q +fruSRersskCsWRHEpZYDNW8IJQXKoDxNzSYKg1ePVejlMKbrdfeL0YQMN8YuoKVIaSJ0Z+JNfSQX +vhYkSKfzcn3tAzvTEYSD1XYgcJRWlJJRR5OXZF91IT34DA2YNSTQHHt7fQSvkUl6VgXtCWf3V5Yg +K02x0z8HvhJDQi2r+a8tiwArwg/TONQ0YTBI+5iE+t+2N0Lw1LQejYbM+fAMjXoWDyQUQFFaO4/1 +6TUkdRJUYfB3jQNHMOkE3p2pM6ddfj52Dgd2gnDjuRot5VE41VRQi2c34qYEwMyaB6VvvasLXuAz +h9kkwQekXE0k1rk4sl9sYg2FKjnC9fltF+QftdoQ8zkzCpDEf1dsnZB5S6gj23EK1OZqw8lYVmK6 +kbjCAesbxdwhURQjUgGUSCZDCPQzvOd7C3Mjx+XG3/tl5MiSRP7GcuWnX/VuodocSywgHvpX2y9f +bsdZ2DHYI3ZSLMAatl4uRX8r5iWC+km2eG+X4gZNxi7WvXHJF0r8C1Ougq/UAdlRV1TSNOR9HqKj +WVlqtE8fHqvrhzt+lBBVHKjkLt/sBUz/qYZtQyMjSX+gfTjg9tdAV6kFlQSkpnCQAiwfJ2qrUqK9 ++LAy+rXxP9t5DArCIq3T9aLFUQtdySWmRcaLO9o6Qp1epJqLaD4Nx4i/Hgd+Az0WuGeKd4ejgjbF ++8aZ5VLMvVzG/CAkK+PRr0dLPUQXk5swOXgLXtvt+IriGzbLCuN/yIaTjEFn6P76TH+BvCB9qISi +Ufxptb3xRSqMnBjw+bDq+DI5QsHyk2wggm/KE2TvDoNUkwSGAb3SLyC2YDsIWizwdsZcvdjs6gCJ +kZHGeFGt1CwgG1YqoxFp30j96ZGfnXfM5Z/jo7vX7RzuMAS7OFug5B9gWus1wKfd3XqhXqzgM2RG +f0Ppq6e1iUBgIb49p7RaUtmAwpzzS9qQUfQKUXXCULRR7Jj2/XTN/IfU2fK8diiFWC/eDrdmWYW1 +f4hwdSShf/BgYj0koJR5D5DuwJo62dB/C2dmk5sIqIPOgMddmpuaYzs7bDiD8EGGW7dogsOTTm1c +J6Tdtk8w62mOY0jVRO7Nq0n34eVIcR6HGxGeM3sz17vf/BEYLXMhbTGuQSEm3HqDPhEHxY7EEvkK +hcmKQJuun2609MosRfX1hnQe/MpVgewT5OmoV9mV/wI7G4wHA1SveZasnvSizNIwTizxakSW3nZn +ifaDeI7c1I7djtFrT5BJHhOfIah8BWPEjPesjgJVXuXshjdbzxqL2wEKH27HjP1VRpZPOdVrucVp +AIjgnaHGR4PINwO67XIKgU2B9/iSGWeOeKgJpr2h+tqVxMciwqrOXJ0VmCuKUTcG+N2cl92QtVaK +n/gihZr9iSZJKHt6jEhVGMDBUNw6LIjzG1bwZn6cVllBWs81YNMYMbFT/37yMxK6FV0czaVAiAPL +gAgiCx5HBbwEYBZYossmZjM3xUjHoJgHYYLb2f6cvTc6d/h5dm9/JuUait1gw9tRifog1KSi3gH2 ++n28yJFmuuqtrvGgLdJ0BKwKrFwuc9nHazI4rd5idp+1UUakuFxau+EsoelC+HJk2e/FjKhRAUg5 +2LvYMkNlSkEp8dycRhkji6DCUteoDYE2qtCGlOw6PKyOoX7JQTMdzmrHXYoKS0CWkcK0eaAHHN7e +CW+5+QDyoJUY4EQKTqY+WIuiUM/OwB96h8qhUG83pxeU5OUPE7xIP9xvUSqZ5i5SFN6Xi5S2fApf +1uPyaTy+4meQ3x6rQ4X0NUxkssNYIWQf7atrfJ67zv42Sq5tLO2YvyRsnWtqs0i/SeGdGt7TFD5Z +fQK86i0GWTExiu7h84XKnJhTNx7KTrdngEmAxIeFvyzOqoOqRoPel6w8dgeXWD5uN5G6Tm+5a3bt +0ubOn9qNwZiI0e1dU1GG3ig+c7b/pK1CnQ7ZVP6p0K4rcSV+JZRFwMhHuz+OAVLHrB0geWX6xMRD +CXTGsK9b/TWyeFZIn/mdwlHYsqzRjgVFF4fQEWyBeOdoY/WoRlXmUPUVrXISNXF3gJE5U+EWa/zd +/TIgQq5mJuwRyF5Xy0bPQQ5qjhB6fKaa0FO7GEE1kQIhlSRs345Y507McD+AYssDopwkv3jHFEaD +kOF01asYFucqgxys1ePp9vUUPhlOoOFwdUCNgPgKEwRmQ9nKn/oCzkjNaqGSJrFSliQySpr8gMXj +wA0mAHAbyfr/h79+QFb2b/Wrp79f5HUNTh3hdwxwBUXHhzltMjH+DlG1STpy/cRFjaMAD/baWQ7b +pdZQ1ucPsX01fzq2xOoLOSq976Wl5dBBmR7L3WoOI2TT8NxRpzlsiM0vKBXik5uNhq+6AyGS7tjr +niU6PnuA3uEV62ADk8rOnS6lSt3nDKLrpuRvQcXK+9j60Bg6AYQ0JkaNaOI5m5bykjYb9/Enyv1a +/z7FYacZ+e/JmxW35gAxhP5aZc/hpL+ZsAcYs4W+htZS4L2+0GEtIu6+8O8pIEOZEbX4J6t7U0+A +Z9Ard3egwrzZGWC4+CuS3JjCZuni/5zzWcLwxwvD+3IYdcOROcrntz6PBeeFUWsq9v+LBbwy3Wbu +T7jOWql5LQph2ht9a341hqKuRW9rvXOILcZhFs5YmUsmn/HK2hzGJ2wg5U/dX7KsRISffnTt/cbX +qVcnoT05SbipgIZ2ObqO4nEJYyuUdOQFcaorzMlWew4PFMiLLAShS+vFMPoIFXs4E1KfjYefUsWQ +iKEUmLL2soOsP6Y+843AIHQCRsx5rNiQ3v7NCg04oFsSIrySinDSgihGzWgMXWH7XYMTuaRXgfOS +ttvrVgGfvpcRfaCNZxP9Gz484QrTh5bKDytG1PASdgJXQ6XGVvgp9wpRUVRZka67gJYPrLrdlCd4 +WF0++QsPAAB6elivblVW+rIx0wLXceQUSG9J64E2DuwnKynOLfYuEzPv7olrCD05GGB/OqqKBnyT +JB9rNCQkhln1EesJUqaeuQ4xKocfYwDO4DD/6gYuBQwtMd/tGtF7YcnRmaO+lilYRsrThSP6uDQ3 +0uw9SdIf+dAQlKoBMpoYuJXvgI7LT4wmNgHzWinfyq6QPeFtdEv6GmRi/qyBCA8tWiDUlWNo3bOv +aO3K7AQdSREyt2Fu3NdVEy7+RptpZbdLmEfHeYDFCZzkl4z73ZUjWxSadDNG2E0qvi/f5hguWTt4 +kE9MN3QmS9/4A5eo0Q+aSLoZPxNNMWD3tTi1dSuPjn+d7pvbQxYrr28SA29YlhyJo7vk9AP46+z2 +/fRSr3lAqUTf7X92wfFKHS17BkWh2bfXk+21HGAQnMgCq3XbxDoGbusFXvR4LEy63PzOBkONhuKS +ChTMlNxWJs5r8zyIBxwMOgoqytK7XOxGDBzELxnJWEiZirZgN4T2DIcWX3ofUAi2hC6rt4D+BseJ +B2ngrkSKOmMI9m9ubpYdRwB1A9fozflUlVSnHJkK6G/Pm9YTHSCCTKXsGHZOMp4Ii0ZnfreYDN7w +dB9gS3t1k+ljBcZYipKguFe7BL2ougCQXEBlxhbudOcrcrl9N5ULUHjWVnqG3biaKDvhbGMhCN7S +j7BEPL5Ggv39C3NC1WhE1EkIGhEhWA0khxa+CMjJA+0dQ1PCXsM+/SL7oCueNgXR7MIji0LMiFwT +C8TV2LMR636AiyOq3e1ceasjWOqCulKLitl/60+W+2wL9VyudKmmfGjRvDSY9MXEbSRstnoJNJgs +fKdCM5/eEz7DoVhmjYdVRl5QOwgejpTozrU1A62TmhUALFsJpTHk4457fISqsGWb0jdWYZlByWKZ +Yj0pMGLj/vgyLT5yei7Ukg0RWT2bguiD/6MbZVdaMfRGWcs9HJuGcgUlxQGJKrvrcCmrRPp7UYJH +y3tM593l1hzdlY1Len1Ac8kWNkd1JjLs4cgRZcO4Wa5ilb7XLGPIjrLMWAPuCEsHdNI4kczZu6od +YwlpDMfYrdA/v6IR75sbuMN8S9erxsJ4A9b3AxPf2qZEePt2Tgt/0vVZirRoPLD7ILnoPS4pnNWy +bQ93VqHo20NLTnQKsFNqKl5lLU6clrY+it5PTeROryFhYH2sdZV+xkgzawHsRUBV56EIUYdmBub/ +6V6UqLftkXrwukTs6bdtOq65p32czb3g/3jyssrmV5v52OQPbDHPZmEy81JlozSaS8f3uUm+2Ekl +6rnZ0NRhc2rgXeJLJ2x7aSBL9QE80joU2B3ibpjvafEDSainaE6he13E7mTrKcboQ2rck5t0T6uu +73PDuPF0AcbXnIqJwBWduNFZVzgn8BgDkeoIK5z/pRc86AU7/TgOdtno8gy4JTh/WQbVt/q6XzOn +xLaRTwOP0Bfe96VLXTuWboIlSbmSRBLNHPREKiG/5s1sral+U8jZQ8US1osw90dBSH4S+aOX0v50 +rHwSeb/CefthuPGVnbvmCNcjUb9X1+6Q1ngKDlA8hU+D8zk0thC2/+8MW39al5dj67OUK43jWOg4 +FUey0vtmpZ3biDIl2ALG9q0oBGiRw9D0cpvDJ2aYivSnAlIisz6/kR0ZmHxeP0M2mb4jNnI35gNc +BOKxP/9mg9nE5VEf+IN7jTsYlqpRtLd0mKH3GQzZUYqlTNRKr03vfb8/ZEY64YaEu3qI9NX1aygm +CpnYp2Qv4zRiZ8zdaUIZ7zxAjIvF9t++eT8IOUotQFT4TH69JnBkPIAsYz6FQky6QJdsIeYUihx+ +51vKWFdPNNmkxK5xpRdgt67nos3wWkH3/MFwM9BcDyKDaOcJh6+hmHAvXPoCptf5gg57zmeQOgly +14EYNy6B3PWwOI2sQDNABKKQKwaf1uL1X9OfD2uedCzm5/QUXky6tjeaEOb+4OvfMMlevitDqZt8 +NSBLCZxmFroiO2S8DrEvfcnGObR+Gcut0MnKWWmJT78K6IxuasB6asbz9iivV6XW+OB9sG0nfRnu +KkTqzwqBfxEXfkPr7U7aoV9f1B1JCGbJhfm6em62qgEMl6xgHMYkk/F4N+sA70FGnlItnszDf/4W +Jge0XOb4q9ajfXXq/JS2HWZSXhq00tzd5tsFKVqohrTN7Kc85GGnSwRIUrdNphqPE+gxXOKRWrzK +ExatP6qRBGC2BqMNyfvuD9reZpHa+U9DIBtfOguF1D+z3Wh4jaxmVyE8+SeO1X4bGCJSaHE5ehPL +e/z/GF8h1qK5orqpY5x+xLltBZKMvMruI5lnzWxxsuypQBlbG9VrzdkvmZXYv5CWQ766RUo5ooNY +qWzfOsMzn4ZoiR+xBEkJI7hwhbwYQlYTjejFh6wo3HE16gUOTjPg0DJiYoT8ijPpG/76u8BgdEYG +MS2PTXalCRZL6qUI3L2suoGVBt5hzzvbEedXxKDKq0Sy7R81di+inHBRuUxjJZ4hSoVmS+sGWZ2h +l/oeTSaCzgvC1CSQdH76dDdjx3eLPxTnbvJfI/fmEDgBwVTKUbhg9aFnZQxw4602xd5BGt4iOCvg +HCy4oGBGqx0mxB2zHGOMWpefbxY/6l7eGTeLn9wYsBxK4edyh1BZ63r3Du3B5BmSkqfhc8WI9MAf +8XMr2llBX6NhLk0MnXMZyA0H1a3YW2jLJeW8UjW9huJwFZlXDubRqwdo2KRnEeLUpI/YLUheIlZE +Ko2b2eLCjAyGodfVIz2TMLSmwae9f3aX8rwsfZVwtWLoTyJxUuwft9Dcq+zHfeqfVIKqiOnDlP6q +I7DKIHjDmqRNrsCJmzIgzW7BjIO9d8X4k9TaxJaTJ8CrL+4ZdMia2/pfQWoG1pwcOHrbtfGJDtn6 +X3WTRgrZX+fU1L9vd3RCoywNa0/0WdkzhcGn9V47NbHRYZiiIO5II8Fq9zF+xlg8Y0hMTLnwAb6O +qwLX9MLXrfID65cf6UJXskWjfvkqAJi298+4QDaCnek0ImIAslGVqHbfbw3CPbPq+co7xHxuPbp4 +2/n6NxgMKehF6JDgfzKbqM43s7/9lIUAFJB72GMcVck1QwXSHT3O8aSiTG1EAvrqXbHcUOOUH9zo +49XiiP6yvA6V3w4AAbtSZhR6rCOS0n8MceibbDMFxxlfbzWx0UlbWQtQQtsve8cj3FnhHlHp0Aq1 +r0XxCPBoH1CUTjP5o4bVEbmy0VCBWvyMTIJOEdjgCAkXVveTYbS6Z5cM+I1pdhEZ0fNl1PKBoCiB +yF6AgyPxyBi1TOjZ0LCtCD0cMAFhJUN46TA6aQwY8I30fc5PeMg0oD+nrCLYPlU7BU8ytzS41vde +biSfPh2PjgQQA84wLkxvKE2Fr7S5yqOCB6kIpvec4t7SSPDHI9earuG5ppkXXgPMXHDO2ISV76++ +AlVLqydSIk9eUA2SeDIyEE512hkupEygFi2TXo+j7dlwGVkkSwBy4/GI8JknfFFtO3s6cVPvV6nd +GSYEU9TzbcYFRzNC3TXkX147CgLS8fEYJOpgCDTz2a1JzqvCa+C6UWH6tgS56ygNgrXNT4iphUKW +12UUtFy8r3hYXKvW3QCwXPj/JUcszWedN0CaDdWI89xz8ry462+IOcARkhtqc6dNb86GD0vvgzU+ +txLQLtN8FTbavzMFVptomLxelEAXPmdI+h3hc7/DOocS0NRVILqgi4WmtruDJDg1SiZke8fRXJGJ +/8LXo/ubBsmOtV3KiNomXQJA1QY0mMSAVkIFutNrt9qucHhNaXBc46364VB1lT/JNiP5d8MsEAo4 +v5oUl/8093ojHk3BRgDG2xqU1eqCUCX21KmiM7sj8n7SM3YFopKvy/yqI6+aULbjCZWRAhx6Nd5/ +YR4nr/ZjOcu5BOLIC3kRsc8qU2u9IpxAxoyPjGLIVcLACxYa+zKW4AxqeMlqB0PAatHCFjnw6hXM +4JXl2Q9Qvjja4fdnZ3fFRgxOREkY57cTSxNlD+VOKqKiGBJtQ0Ug3pE1yyhkzeyPy1iPbgSH6/Oz +eamwTzOsb3iRfX96bCyXoS4fTTlPHYzn0l0FcxDMt209Ewn5uaVwxZ73Pup6YVqZPHDy3XFOMxWZ +5tUpmqQEDunudvNdBZkXCakKnTG3MgG10D1kkRcYypLbpp86qSStGk61HCMWMbIt/f1e97Tp/f5x +o+n49G6bTCrjnqT11zuZFJSJ2QaZ+qohJ3kyRD+YFTOYzkX5m+lLREnNvZ12SZ9tfgTkpnt8WElO +4DTi3+J1selMnVR7PgsgYAsg6ZLNvs8Dd9YWCmlr1GcMz+kBkUeaGzMYRmA0WWA5XHss9+Xs8ts0 +xsrwaGl7tQ9t9MInE+UQukahrLr9WK/flMJLvRPxOy61VpgdwaDKw7H9m6v0xvZttdsMtSf+oGFq +2tV8i+yoz4GOxpm+wVNpcqOYA9lax9Mebqz9cF2Yngw1y99vN7JcWk+bmmylNy6JsSlRD/7qarQv +/pnjrsG6e9yYc1BV++lUivVhFY/z5rsh7XySNt6lO75KxMf/EstGuMeqwH8kXP0TJXVyAXOMmVxZ +plz7lUxs5X36XCfZTUUk4yekUwAf5DOU2E5044KNw5lH7uoNFh+9PtGJmkyVlB+wXSu9hy4wTSm7 +VeZy1yShX29bu8itKhy5AOZrJfdXlseCjIVP6UuKf6zJTbzkjjkLssaiVrO/Wd1l2o9LM3QV6S+t +GDQWHY66fE84Jx74Y/brLIxDep8dokXyQxXVWnPu3IFc5bOfVKovTKYk5VoKTqKtkTli+8Liqdbh +SU3QcsIwPPt7LLjOwtf5O6M3Ur6VvFF6RsXnZp8l0etMN9JjFPB07fMfUnPJ8Yvex//N4maWG8mq +CT4hnoyROd4mbOt5cu5LQe6c8Sk3eCXzTUZF+xgLCgeIBdS0sXzubhtcKJvjmM/WDFiBh4cbVlnc +9G4VpCw9ZnvljGpHbAi+zjGqS5lbiKrSf4Rfaot2BrVhccqAXdIXRJqB1Jd6ouajZHODr1yG74PN +8P6HYbHb7fmpCK9HTL+olXF2lYNOcwnizsWxzB/DUqvy8gb5qCRFoe3/7TqCnMOWHMohkJtABodW +gloyn94coxPfPaAUMKR3djUl4CfhNFI35I/6K45KN84SB/Wn7y4QIk0S9rJ8F49/JNW7oZto5I8X +flaRyw0V7qdO+PnbVxv8XGS7/Frbh+ErBt9g4DnmUlwAJlTv3b/N3GEvUqywD6pre49id7bRxaKw +VcadacrNPE428LvIYfxn7azPrU6AdBK/r0n/kxgMd1/zOSf3+SahFKQUKw2WgW/7iHSnfl8kCEvr +l9FykKo5Sx7P7PSewRDQlrjVu2/QFwuBu/4XB8PqjR7ZTel21Q55ArBL6kfjHvjSFExYE7kMj1uI +PJMFqUaNb2YT+v/5nDygM8OTcG74V24ENUbD71ZYq4zB0q5ruJZKww9ziCwnfZ1JDprV3A6K6R+E +PQS6h5zDSZtkutjRSpdBoilgIE35JtmJrPLpqcc5/Hi/EUp7BAKF7m9xs/RWgRWpC94DTbcL8ha5 +GTtjRru4kfg0T93SR5co5xfI2s29lmup0wBxB2N19rf4GSX5HI9TxDBg7rzefPw/+aRPdGW6ZXug +DAz3QfhhD9ndYJYr80qlDAoRo31cEs+7S1Dc2Jussb3BElmR5W83TdRlsp6RjgoLOJFPYlSRGDk5 +l/tBiJi28JON0GwMysFPHzE1o3mlOLHEEesS21ldS7cdHAfyASuoqMIb8PL878DGk8nFjY9apGKt ++q+mklXgoDkoAbvANAc9j6zpSNYfiLCscE5mwrr/CylRTy5OlNkLtlUAduW+b/fCImZn2C2pv8ae +uBIVQ9mab5I8F/LscGEFfCj8UrG8XPaWIAvvLhgtAxbH30wjtraoEVkTS6L1+JGtwAM/kbJ8LLKD +Oc15JyDSorVPC1Dy/Yu3jWVQXmYWNSqTdBCaCwMSwkh1bO1D6QazAYWZ7soEVT7EC8b4IKTEjvhJ +nHsJnDFrWHbkYyhEPfLz+wAIWOZf8s3UTH+rFa0FPbzsUjI1Uooebv04OD6LWpIsrmiBau2phHBO +EN3OjA6TnncLzA0XARreVhgTAQlLP1Y7UMBJ6l/i9UMORbXi2Fcgs/0godBrcuyMq828ANER0Vaw +tjXSZrq5O0dt83H6I6IBelslVttqQ3WvA31lHgkJcYOp8jUX+3A6L7SRz8tL6rhbAz9FdikvbXXw +6FdKsDRETypbPt83WdtANVMWq76Oq3Qy+RxtfWFTK5y4h3rAEi7fkPGFMgdezmIb+CHslNFDeXgJ +0BMa7CzJLS/lpT16ZUF4nCtAEzABoBzIVUTMUhOmxV51ZkGHpeMMrUiNry1BKTpKcK0lGXP8F7kw +llUU9qkfQdYt/PkPuS5o9HgN8rd4qxB6mpopsliGOdsAJYm0jhQ01LhrpTK/D+T21cFJNFHD9SPr +dLfFCzslpqinIl5612yTeqsedgmAl5fy5jRIN7YhOxw9Cpt9JQse3yCvsqLUiP9iBxFlwmjiD+FZ +z/uvDiua8VU46EpwCvirCJ/baXi10goZxzRbCPkCODH7dkEVEvy6s8HqYQ2LYCWO8KmjAIfTdGiz +0xZTxorDakpJolrP2Fjjruz9QQo9ggvseFWuU81opPzVNDUJS2jnlqQ8Lnc1bLilDWv8oajuzkZy +ViUJc8P3Gjm/hAp4uqUBp9uPE9u1GbU9+66nHJ9uLefqLy+OJtdnqNJtPTODOBP2cm9OlNENl42S +orhX8jKTBmzX7qlcrC92J9LAE7hM4+7171ILmJ2dGwla79YFQjcgG+MjXU32OeY3sphLimR06xcm +HyafDmTw89rKhKskDptuciLDb296XmU3UqVlb4EZx2TaYHGyy3wlBPvh8JaqWGVX982bjAHIym7+ +QL91zc05nwfHyd3yxqSVsOPqZZjorUba7Dl8+ikKMPxAGjIMyJ85ZPF5/3OMfVrVRh+zBPNv09KT +s9sbt1IZba+a/R4F6EimGFh5hiiWvA+5fxUxAvJyQGRKHa/VD2LOBkjQnifcZqSZmstR7RNKz4AQ +yZwJANwIbhF02YMjtW7CxZh8gyb2HWoc4Xvz3hR8O6s5cEyfZPK6VgDSnPCrGJAv2zIX3sV70+fJ +x7VUUgLqVP5NAoF03HEekTJ8jvyM125kvtbwqGTiPmS3z27pzOeieGfRn6k7lmAwlwMPf5ZyoDdG +aRQO1cTOph0gd2OIy6Ous+oiuWi9TND+MWgymzu3MlZOuQ0eJVO+D+82SU8tRjfh3POcJBHxFslg +Dl1rzMM3pdsK+L5pdFCe3HVJmOVLZlDfFrKtE5sCcGW9i7swQcZJGiPCJyrxH7bGFIULMXjfwe0R +J/J2hIRGGcP939Ktb9DZSqiwQQnre+Sin8Ya0AKAuMUA64iqjpcKHKfEmaLqQcZtKkIni1DaarMa +5nHs+B94Ia0sP5Ypmb3BIeaPbisUWDeSDj+satf5GiQAaSabtbPvXuFy+xPLAYHKIpDZS2KDtfmL +FlqDSYa+vm8Sm2aLDTwevbeByo7mFHWh88H1X92iCX2bt2EyMIPqWLwVo7ygTQSKsG15mEvEd3Jt ++GHIDI6TLx9mzTwDlAJbuVGOk7bwVwe70yTMIcRSJUJhZp0It2RbPpqqrtGrOblqGMgOAD6iToGS +VtQJd2SpWwW565cWctInbsWpc9xEt44T3d8Qf8lCqGR9/Lx4zF0ndoEZ1mDGw1yqL3fvLfudLgsd +HmHGN8FOTaVaj9AZXHaNEEjjVb7kiD5gvUj/Pdw8YZk/YR84J+7DuIz2+4PUoQKKY5CZyBiI8fs0 +SL5oSgt45d9zxDEFcaVvYQsewrx1bOKXPcOBGPqo1EQNUdeE3cMY65G1HFbhX5HI3lNNs7/cJ1eR +Dd8CNIe5eY5fnwTS8b/h5QUBBtJSlkrNF/WYWzAlbkRpnCPTF6ggc5A/uZXzPO1dWizIeHioTnzl +r1H9W87kdPUvpBAzZi7xgyeIZtz/q9rCJryBzcqoUprnOQbHTKWAAGVDR43MAhtr3h3n8EWA7fDE +fKg6OXI/mCRB2K+qll+Em3LlByCg7N2qcUSLVvYYF3xrYZfujrRugSA24kbkxT1+fZZ+JheM5A0e +t7XEot1JEJNNaFaNSqDmMOXU+M31bRu2WUBmLa5eAilZo9fQW+8/al0DVOLWi/sDJnC3IdQNwgaZ +L7AX9X0D9ssX5gs9yfh9lDh+SzLGm77o0gTWXZgUn23Equ9gzOgisrXqrV97GRXFruitnq0SSFMb +CAUJuj6/mw4aXQM+JBSkYsIU2dLZaoEnHKDXZav3AwlC04812FT+LI6n4LkFrwWwicmhQByI7JTM +uNGv5P55UdaZq4PcWwPo/2AqE+dNlcc+g02Ybu78NzBW7hIXrLboAIGxyedjlctL0jrGn9nSHdhL +H6yM0s2RjgjPeZEc+XDsG+zjyKFDr4bD7acE9rPlQ9JmZRhlRMWVrC/JeBJ5+CpIY6s+2fd6JBGr +HZgIW/YXcadhABk1GSykQb1E2gJ/i1q7LIRKcdyVF/GK3pn/0QlcoJt3NyzYvA5LBeh9qWEYe/QY +Oj8RNBKv89UPnfzOeapsyAfOII9lqY9LDq3pBQ3ihdGWHVLKhPz9yzkO0BNwxfqT45Q1Frzwbexp +rf2f/zwmw50GPjIImWBpPhPZokbsYMInk+dVaJxz977LHQ627U5JtQKWqGBDA/g341ihm0VUPgzQ +FWCU3+IxAywKJ48ChC0zL6/Y1lN/duI4A3odZLagCgguoq6LySJwVb67lvEoZKBY7B7oMp1L59Vd +UwO9mtvcVksgeQGr02UmluX1girdzcITGVl69NHoJ+TtFP4ntR96MmHhlg/fqlwsi8MNDzSf4P6H +5JaPI8nBaJOhMTzz7YF6yojmIepGSb0BSnfBoClTgrA7UpQdiGEuAqcdWnVwJx76onw4ePg0wevn +6JcMGZ91vdmRF3GEuhhd1aC1E7aIE4I78FcamtWMbasC/xvBZscBqQiOmq0RSNVJ0q1vV3h4x5Fn +hQURdyhUq2G0KqIjB+HDwkE7TGSyNn4xQmkWLlLTN1vtthZ1QnA/KfIoemmGNVtDKHbjAQTxXswP +6JjVZmrnY7KoqCUqQIhi9dDWWKYdTpyRoj26KPjRbrnSgY/UaWOG/YzzwI9aEH9jGiQg1pa7xH/l +hQP76JnWBHNTXt3QJwsXouxBaKbwhar7cj2tODbi96AyKVH2p5oAw/vLaeO3CjH3x9S10VQZYd7s +/yogibW7xC5mhRJGybGKqA8sceWxFDYpnYzZywqorr6Kd0G1yt097I9/53At3HwGjT+VN2Z0oLty +623wVyFcwN9pdaG97C7H0aZPc07BiD9ObswTL6NUR48FfiZvpfe9v4Ag4ZE2KNYIi7lZyWFzz8S2 +SQ2AYgzwFtsjCvInm85vhott1NViNdxCYvH4/Ym6ClY6S07S0xctBXoAmqx9FF4XQxzJdCPCQ/2x +YLI4uk42ihRX7nn51i6V4Bg22y/rijh8HdODU484UpFwesp69XsDL1NYsm1Ch1hC8OPyTkqK/F66 +OV/eppkY2IlYZe0DOGo2oWZZQKqLE9e+osAzQfWoPUDoFCrRvgiq+6IN6v/YfXIm8xWl9Ga5K+aE +/6eFpSP1DxbSpxSlkyVo1ELtAQViw4msp/h6FTlKJu/zxacNjnHB3tblgcOQp35Sg7y5MZrSjhhx +rQz2dVvV0ylXdUkhT4eWLbPNKo127lPAMkDMJD9jxf8jDlxlCC6XNbLf5v8fYkCIUWBA0ZPaR2A5 +W5f1SojvNal59TnnJPqa4ZAXyUMv8wxpAK09qacnd6fleg5GGrPZjredPI1hVzPKFw4SkHeptYKk +g1R+LqvsmiHE4UsSRyDU0NRcKxIL9LMGdpGisjt05agujftC8SFm08R5LoRYUVw0NYjEGf+755Yi +wAnUAXXR+T1jZSpdhTPuDdy8S0jJFjW3cX37agcbctfw9x8vQgR3qmhtlIY9uwBBcrcamoWA6v1k +8zZu6EIG4PywofeM4kfzPiFVlXTR7YW8abxaRZ1zzmA746rRqTMGNUZZudDouhxSJ7Ksn3DrIHjF +gVOkyJKLbLpHX9bmfKgq2oCf2tQ1gSnJrS3FRHaSYh2QndyoYC51wB6GOjaxew362OeTcEAkBdLm +NvpjN0DrsO9iWYVj/AZOZPWw+aHfN4lzDFphFt2XBPEWaCvzvqKHYSM+IIr87CWAKLCp/b40b3XJ +nBXsUxkGwrt/pLbobiozrFLxqS/0YsDGQ3HTqUyV8DWWQgBzR60fnzNhwQeEXd8ZKC9ysc8izQuh +XtP6DTfWQI/dRBmn7R5+tm50NzfbAcTOFyBLw50YWOoriVAXWVLlz38WMiE6UT/fjtaxgVGsiK2s +p7FB8hmBwHKVZmyRxiiK/p2ZWvMGC9HOrUy9ssCw8WyYqvZMDf4bppbDvqF2EvlcNIbBULslGdT4 +F/hyTl/T1cu6G3c9e7NvH4UFITcDwUPsPiYsIoecJodEb8iObezOLoGpD5cfpBDYygFVcWENQ4C9 +vVBQDT3jVuI02l9YEQJmTWtRYXz7oZzuvuhM29ctstIPZThTL/iiYubJlaovOafJxVMZnsYczNnT +4V79Z8Dm8+V7yoT5WEYOACN3FrN37wIfm8bN0j7FytAz+0cs6HRwwb/C2Zw8JnJ+SGAaiwYIZC0q +uh6oyeC0FhPbD2CithdTqGnYXQv6JOvQz37xrDPmsrLDcMmiTv7iP0+woMZqsvTzO62Yspa6TOgI +CFoHFQyeiyXFdXw5vjNiKZ6BRwUW9X4AL/nqdZIxVAFKJ9PclJp0wRZQt62osN+4Z6aGfTUcvTlk +sIVy2sxRDv4daakYOJiGLiQvnm4mfjCMR44ROISEFMYhMpLzqfhlXciX+8k3wMApAoBEneEGA8hT +fX73AD6yP5OQ/80ryfWF4SPIiKRaQZc139x63SJhvwDCvA8tJ//t9uF0ZlpVKR3Tl2bW8J94cmg+ +Avfp6k16KUa6IQi2hMXWCEpND9Vy/4qgKF5n7g3Lvl8wv0Snt3V/2dSxkRrSLL/ODnOep6Rbg5r/ +cp1kcqctbhnJz/HEdeoSXeCl1t/X2oTF3ENSRo0GxMhBYKiRUBEvS7lA9ZvtHXHFjXO0nj45I1VW +CmqNibjgEt/xPTLsaIlb41kwA8f3RKoMRKyueh2RKOvCVaNZqBnjPJBfL/VoxH+PINzs3pSgHKae +Ebn4ef4phfgAtiKEojuVSxZoRNew7GjVkn5DHqMU+MqlAjp4rJFvDMAqgB5pqe6MUJeWIabQRKbA +oZfw8QtYP/6gN5ZlhKzfd48HuRygNu58CgGu+qipu6PvNDTQ/fRBj7ZIZu51y1tZQVRHNqSTatb1 +lyAc5+VTnhGhmSz06KRCSFx2Y9ZBvskm4eYKvKBGSV8Wrja/Nvs/ByX0yNvBjboLIZ05dksn+f5K +exYBO5wl07Y7XW1T467WlFF1RF+juDjaTeBzfbRX25Lk6KZrdt8JI8wUydKi5B+0+bZjPcH6aH8h +RNDhnlX70uWgbam9onod3WKA/cJPahmlwOkqNtEkrgRAZf+dzz8yg5sMm53N9g93EqgfyyinDaOd +72FfvVw76GIedUfvhLeRuoVa9o30dJ/72Q0L96c9p3J2znURaWvH7FWAA3P6El5HrOLW0ZHAS5ha +6T2BRlnAHRwNV/XysFLcDKzL37n49P41RZxD1rlHQc8KZhmVe4C+GIazNfZHRnm6RtloMc1Do/1B +yB81rBUTaXNR587BGjZ+J1qEw8CRmHIWXY8/ette5570SRURSb6Pb5JXTLw59B6NnmfeRHEn9mcn +1aFLOKNp9Ui14bWAEqfJVajLgGIOeL+Ca9MwYNIRIEYtrBvRyOCK/9oH9x1F0B4X8ed1s62775xJ +DXwWWARma5neBjNx/Jo5qZORQcK3ydYQ6/DN5kfs61FN+fzVXkArn1kwFOindCI4Q+EkCQjU9f8Q +fgKKJZKzEPQdQSyfk5G78WFNy4xA8bpeZ+PnElgOLAH02aEDszyske6TZ/H1wWGj6XWA/uwz6Izj +hl3zsOiIlfdXNFzxxLXa+YOfrju380JHNFoa74zUJOuzvx1SyrrSBz18Rh7hqzLMJSkLiFnTC/wF +pch0WYz3OGHOQSbtnUKjSurTbcxECoTbTrPRkKH5NdHrszX+vKDnCtb6XkyhTWlOy/O9AZ+eRbjS +PX2Yec0nKbX0wUTEfSbNv2f966GYqAM3CK9FkTwlAZuwqVZRB4MaG3L7qVImxoC9NhN8SaI4Corp +zgIQM1iDrILmz6QxZE0lOrpNsqZhlPYtk+0Mz61T7+WynE0GX3nvegvi9LwVCzYTECL9ABugBW4I +SQZELawBqr0qk2onDLcIjkw9v27a+as7GlIpqEkqxbdC65TGACNWJb4Yh/1TvnwdnGhUc9udNnKU +FeVDF4m8Y5e7euX8fNFG9rYtQqtuEf0LyXge+ZiWuptE1C5wG1noWUCBlvNBuZeOJLB1y3MBXqk2 +0GWh99OUwrKUNphJBIFHeBFBZ5VCEd4wpVVP+Flk6Xsx83Jgb6ZhmBjKN6EwWyjzO5KcqediEPWG +2cb5rS2trS+33+MbMQeUsx655/kkSM7RdUcskV0ubpEr9W9btUICfpCJH6tiy+x/aVmGt0rX6W0H +nj9ba51SQZzDAUs41rhmulkJQVJmf9hg9FH4R/IgOVjBQWgsjKHcx0mkZk+Ai+dvZQnAbA39X3Su +5DqJ/J+PqQkhiSp/8h4LEq7adMT5vfymTtrhHJ1wwOBlif/TIUrPYC3NE7ifyYeywTv3RTYvKdzG +ylNg1FOhvj5zkJ7OJFbH+PoGbv+rar1N7KwgyRM+TkJbIByGhI2SZaVGyRoRSStIwgOSJFGIVscx +qItlQxth3vIQrSA0jrD9pV2ca4oKU2xVGcE5vFAiFpor7a/bGruuxYNOe2WlrLic0CFQ7qQVWscT +Sy9zSVTkgcb2uxIjf+oBETjgA0XVXkZWU8VhemNL4GYNwpjR0N5AhliVVE+hsGisEm4ERBWCA5qg +o9bMdTU86OhUs0FSgDskvM6AKsWQkyo8T85VyYzGmak4A96UOF780jNpueGcxvsj6aZ/3lHrGqsu +exQs59ilZS0ltsPg8zdSd6bAKZ0uFnOTyCZyFQQ3p6OwYTUVZdjyRsnymV5O4eVRRl//1ip02qAK +Hrvxj3YJf5dq1uQjZHyscazANz2jzZ1yfhUctb5/ktj4UEBfjw+5gjVE/gE3iBbIbhfRh7Z6ofTz +5ueRvxeImgRAWoNfJk4toKW2tS3PaW5tPuRUFOwDo8cMocRuGZUTBumph3HSRb677atrN323jGse +91fLU0r1qDIlrQ9sRFRJQATW2b9rgQDGqE0Qr2Rqb/oW1LI8fc+axwW8EgV7iBiz7DEN8kiXJ/1E +q91Qy8ieRpJzEqvNR200haFHkpf6wUxuF3EnjOHpbe1WNmria+p0ZfuHGrRw7qkkbrfD6wunE4b7 +5wdz/iwF/pISXnIZn7lqqC+So9aL1iDHZsSXZqfrCNnK4SZsEygVtWoZMwiEQp2Iv/2VK6YUQGTp +6QbLSLE10Q6KHPQrMPy4RoWlW46xvIiES/oxA4w/8ImYTULcG7JW7gByvqIVFSGYzBebBg/7BVDc +w74RIwCM9md5v9pm9mX7dk/a2PxtUxj1qWkKpgJvDuLcvNvi8VSBSrAEVu3l91Sugux/SQQWmoe1 +tMwS9/j/8elFrW7Sb8s7qXCuDLcI3GSyZ5/FOk5V9j2bC16L1ow4ocjg2/Yj0tigj7wSmVG/PSjt +C7/zjbNivuGNuKGvxiCXxxBSn0gvFx/subdq8ZzGe742l2bH88IFvQCloBGCWoyz3YD4EcKoyt2W +nnMQiYTzlBrbMQ4lQLAkK8T5vk1wpByX2MM6OtCVg9qxe5UcJrVdvlTPRgeo1VMS3s0sVxjVny/a +QasLAt+KSoSZJ5+WSg14VidqJUCELgrzqBJRuW3HLkWbOOZA7IcMf0Vam7wMkocIILR5cZjc/45F +GBPOdpH28+wokHETDM0h1jKh6q+nuCJqCoLQDcz5qy9ALH+u5swudIEutc+oDesKRs/c7x7hTC1V +mZXIGSHGoj+1JToEv7BwD/20hK1pzI+BqsgTIG+PjN+mxj9X4kcAvWMcriZTguTKHkXSnDMc2kqe +R3D7CqxZ2gx4MpBmpSDbpKWFB+3/zemCt0P+zP83Zb6NVcNRKLKRMcFc6jJCeJFAwQqyfFtiwI+3 +hGY9u4xnFK8wJkQoHV6irMhnE+qgCPrNL9CaeMK5HcsBVhm18uVHbK5ccURNbg05za8SdnJ1MmZU +Z+ebSKBEAeadonxpRfhGFTP5OxQ0xOjuGKSJ9pk59xVDc/FVLXdiLxdCY9fGVpXHm6BRmcAtXiHe +Hk07XxE/ef0fbQW0lZAJXhGlFSU+uLPdam/DBrehoB00Pk8gM4C0G/nL6THmWkQOwPVNUfcunEco +VRyQcX5SbsS16AL4v1naUtUhVTRfrnUN26LtBgNQzcwYF51cfpZnNMhoexakk6jW067k5ZIRaV3h +H6FVXjPn8q0pXBzwr0arQyBzuH3lC7g8UPrj6FSZrvqHA30wGwY8VGv1O/bPnD493OkaEfX4wxHi +8WnjCdWC2W7NFu3yaoymLXPbKPyry/Q3duWh0mi1V2es1Iad1XcwYNyJYseL+BxsLRc6nOKkDZnZ +CkxNdes661TSdicIBuAVlrxVnOeHUiIUNTQT79pvQH4O3dHYH09kMXLmGHmbBsVBGILxXJo1RLok +qByRFAhAQejWWHbyFJZGiQClRsRiWff74GwYZsXwXeEQFjKRajOIQ9sj/egLOxVa+UwDIZnBuuUs +6LnAG4hPB1uFDeDWCiwoX8Qlawokz4prDkVu3Nwd80NqQFjCUcvGa+sXLhihDg4kpju4Xt6xm2ul +3KaOxGQzC6EmyaqGGUEC1S3+9Fkhwu3Nm+b76DiHnsjSalJ1kG8rtGQlPQhl7afJGE/XaSOPDtIa +ceEBA8UAQEOyu/ChfHii5t68O8DmJjnAlzsCL5MDS6AouFfvqNhoCOyyJw9RDFjs3dMghLNyFxpN +DqqKL8EmiscKwjs9U26QLfZzlVBJUWqbr840vhagIh9lj+1HdDFr3n2Yfukr3cqU0nTvQv3p0fZA +4XUIxldwB7Z/SsDHlCe3qYiNJsOemYQ6Dw3xLFFohroyEdGJeTuoHwWfLHdtlRCW8i2LQ8wlRnBi +6JZm664FvgJaEvVD7DWrIBcGr2BWlgv8WVIhQ3knknYATrBeJU4s3AiC2qIgMxGkXcobOTUkVrMc +2t073566SShwhJcDQ1ZVyCP5bg2ebn0SAb2FCHn6Pt+MxHLURj9FzDFgZRCYZ5rGssl4fFIHFIVC +7WlXnKfnNvbB2+Zm0ZxPKc3VQ/rgjUnV693iMOxvipIGymqyjfN+FFBc1TZmGcFmBuyw0ak6m0/G +Pl/T9QaHmE7VGuIss0DqIOc5xBhPdhP9iTpLaFjrBC+CFe6aVxhubAhuQKPsrnWy9YAW07ZDP4DQ +D+P3J9riGVwrXmV8GCQ6QQMDbaekXSfgcq49smS50Z1LeGnRV1L8YXhRR7ejwvP68k34W2gSEehz +wLpHWbcgbPchU3jsBkEVf7su3W062/1eZIxbL149A7gRqI6ybbiE0T8xuDQrX0jARku9WogITYjM +OLu/XEgNp27pjp+HkoEjSEy4tE0djhAZGE9DQIfWoKI8JosHt7Lt1KrwuxcCSkn+Sj545SXCwhLo +i2OA3LTfo//Or+i5PkbeQwYh4rddeEsHBWcYLuB3ll1h/X8g/gQOAkw2HVj4PLSICKVgf14a8zqQ +U6CAmPyg5nKeHfhzsTo6qsI4pT3XHq5uCCUdLyUYS5Wkj5+4YpWxFqoKKvDCDHQ7aGZz/gQnWNhY +ogmS+17P3E8TnL9uBOiB0Zj39nVotdwjTlD89p9Cbe6k5tp6NWx+hO/3PVcJPhVcHNHWGre8EZxy +02PkKZlc5RiC6OhT5/03/m3ZWafxquZRhW7TZtlvatKd8/xoJAMtrDjvDRk18+QlVjix/V7gAwhR +OiX+L3ihr4cZTtiJ5XiPMrKMmlbamT9C2CLokUKweFKm+JiJr/jvr7wiBT995FR4W0TykWIqUMPj +YVRkOwKcFfYFSlqo0WK7AXYmJz4YlD+S9spPDvELcbnsnmUmOFPodtIftH5QSSzy7+97zesBqhPz +B5ZwS2neg7GkeuA88wWqkaLFPLW5iUgCSdkS0lyKJq8YaqeqnrbiUM+TfDtVuehqQVhDRC33lkJr +45UTdNPwHcmAN7nOwUXLqOHgn+M0kZnIApTaWeHWOvd9UYG7/kphjqYueCkxHMeestYczVK4bhLS +IoYtg09MA4k5nswatYUcymZK+L+0teGJByn96u4tVfhKJ1mPTUKXHsB51+tyq8e08gTNedDMRIWe +yiZBqsI9Z299Ff0CkA0Dqa9EFktWjrHF+Jk1nWructY2Z4nRbehXG+qBDWyzH2AYeiHrKKkjJsLw ++oyXkMLo12CoeleiODEGJQIuvdTdw9UZjHk2y5Ynei5j4RZkV7JBKQ70sjuLYVYfFENRQ71ZeU2o +cHBx6AS0DXOb8zivHNhzOC3oLj3rZIrHLlZEHIBkfHH9qQqPo3jOPCaHOHEMK7T1WJzbDELgYe7d +dV6nMro9zZovTXeFAIoS6PLggtmnuhIImT2pI69iTGXZMZBrNDrzNUnWtnepFzQZDdep07FLppuk +3c6rsTLsc0EAfEp2Z5onJja54l03+e00uArmZq9SdJvN9244/TdcF3FGo981jjK+4P9lk3IQtF3/ +HSPbfCJ4puLCSAnKYavW4hZ1PbjMpNxhtPfLKleM8H6/AcPgBshcT0+omuD1FKpVoF4F5nZKf/Nk +eWTg0I9OyDHl2vun5UGgdCJ/Jj5Y3EEKs62ZU5FO5hRMCPlrRRpmkIfVwrdEt7IfNMYnRazkHP0+ +hl1bnYkUP8DVn09mR7FZYJcIprOFXV26+546BIXnmQIWvPTjQwHF43XxlpX+afoaqRb2xcikzWKl +DSTNQ8jn5nG8vxnpOoJXHYK9qxFO6kDqXVARsA9liQBXiX+KO5U91nXOj0qghCWiXPiHHnm7z2om +chrBQbf6vkqJa+Bhjb3xU68N3kyeAp6tXKV7v1DYXvQrUfQrqOrb7YiomRBtHpCeXpVXXGztyIGo +DO8RQXJeKuMcZFRr5GEDNCkFb4W9jxp/ohd0Q1CzeSuDLtvh5lvtAj4OAfCcz0YjKtyEVNJS4gKQ +M8DRGyNOB3734W95yfn+JFyTUHUw1fkNM67Q3keGKM2dywKZ2yTg6o7sV3FvvOgqhsB+VpmhYj6a +MYEBrGnzLZXixu782lei9LCqU4Hsz+VT9raJBdtYVsBu71/ApclvF9d5dMbp8ZFYiEONmEaaov9f +A5gnewJDd7Lg1IUYlbHSux8wKuG5jxQwe9aVoujymihPZ2IGLc0C7XcPZgmFldsRL25USGQK47He +SmYyTcrVhj3anBkwuGvrbQLwJKNEeL++8n4K+UcQ1JPnJDmzDRblZZlkwYNaF5dUvKyDxougRZkX +IjZvSMsHdk1DtNbpHbnoA84Kq4zG6T4curBnfMNolqEZQCwV3t4brRRrv1SxO2pOwWbYcuxI8Dtg +ZyTL5mX9Hhbyk0vCUHbpLSyjq5y83uZRbJfnLFg2Cno3EilaCYidyURMq2lXE8nDR4zOlMFfKQsH +u5kl9nx5y5v8kphADvUwHf6troGXq3pIgTZ2stp33/ueth8oR+5AUVSE2Z+RFDYcoCH4biTw+/UY +u5csu6HprRc72y2Rym7FBxj54u6YYxYYXmxLMQr1QOqBmn2gIvO/ln//f5Xpbn9JdIxRUOOsytHF +NeenFQV4fffjNjOnW5oivwgYQc+ryHajzhKpNIu0lcunbwPOuT+a4w8PXF1xquAUIkOn/s54u3o7 +L1qlt7zJURjOt9P0Ujz8Ic5dZhQE3wJZzCBYQpYlhHZ8NEjApE4Pr6u6hpweMc1npBp2MO9WSm4i +juhpFcyQDSemieGO+ZMMhVdxCDZ0lo17p7rYcIagsK+fLD61CS4AG6b6TqPL+uHJFDcMJEWvN+UI +9iqmg+yoLj3OcB+EnCzNfqUv9ciEn98+pYSikOB8vrGgpOxxAk4SumRsO2iZgMoZXJPeff/R4qCi +dBBR6McDZ0L/suSi7FZDcKHGRHvqfbZ8DO+DrGMYaVzPbcSES/MkiIW0EwKaGHqgfNBgHFYvb3F4 +MSByP+dPj6TrbqBNOHb6Og4QHlvYkiVLl+IK40X9ZWrvP/H6GNuUyAfu47jegWi8KbmRlNbmhWgs +B/2GteGhNqkM8dLpmD1xe/ulcAoh6vn5YEg+W26HAp7jyFliGXJdqL3OgCY7iDDlQLolGXrmpZSc +Xau9gl1VXxDHAQzpVuLVRn26AJDW0tmVb7Ml8re6M+jHCkCtvRzQlvA2P0U8LXakuIxEPQIGE+wR +XQjjq6BltqxA+M8iUKosEQcta/tY3+lw4RJJJEkjsAUru1wUKrCSrMlep7e5BDzcOG9v2EHg7HHp +F4u9t2VxW8gRJIu7a4mQw6eiItBmei6j9FoB/D+auVMp98YmyBqydwxFUrCkwVxYaJUCXWPxqwzI +ZFVIRDvWDqQRaictwFxhpYOvCeJk7xYDautmASbMUTzDMijLXU+TNIrCZ7ds0o4T/GAyo3AGD6yl +s4o3pFFkpERYTzrl8va2a3C5saY7v+Ik5TbIIQTcSFX2yUqpM6BfOmxGgaH9aE3UrVSlmx2dk/P5 +S7696KB4TFoCN6NzauARcA44oNHHp9eUebXw3ojfGjvb4A0pzkMq4nBwWExgw+AKFNfFhiaMNi7t ++zNAngZVuv84CPODKaafoSSnF3lvRN1YWf0lWTaYmtoiev65xpnwBqpWlFChHHvNW5hG2WT2qHVn +sB4mWxLus7v2s/4TdkVZCbwraPX+saLv1rglhoCIRQmyHiD77LtWKc+UPLew9zfjXp72qe3T89dg +/NVt2R8Rsp94mbc/Ud1Y3BFAfvlSIYPKCGGwv8EJk+YbRkZq9ifBcmJneyZgzH2TGbf0uCovqLHf +mKwxwJ66e7GueBAe4mmV5NFIAlyQN+d3MSTMgiivwqLmM7JHELSdfK0ylql6jfTz5cpgtNLqhuk8 +5oCwqGXM+ijpkV9nHvmTAeGtK547p0ptfjUgxRdaEr4vwf4QM5hBX0BKuq+iXYek4/OB/Lbc8QSG +rdyfAEuR3FtFxOiw3GjR1LQgrnMcHGAS8VcJFr5QcpAxpqPikZeTLj+i/+X81gSzPpIaUTTx+L4/ +vKW5Rg52I4M39y5lY06sw4Qn08PdMTSb30yU9MduRscmnEXMe6gtAOCf/MhqaEChlGw/shLshg90 +tf6gBW3fYnVd+MlqurliYZyFqz/0loOgJyHpxvCEE3Cs6UEvVN6eqqtzCoqKDch2XTmtNcS4VNcq +nn2py7OBrpAJkWXhHoza0QstK3vRjun0mi7Jgsv+pz1P7IWjS5cnk0Zyv/aKlC71rZHSefCHtPIK +Pe2DtoIvBBRcPGvbr//l/F35BHHG50U/NAKy6M0n5ilf2Ist6t/rB75+I8hxb6jWj5/1e/P9MGWl +Rrtj2p6p3IVstYUDGhWGk45l70F3TD0K7wCr6q3HfkU6qsxJgXHWP6KUt83wuVD3kLc/Wm7fDq/S +9H9Jh8FSQ9kXn7oAUpQNi6gGGZs5qMPlnj2ogu7kl+4kcmmis4ajmqR//7xzvgviyeNpBILayK6S +FlK5cqRUGyIqI615blW9D5mjyvCUzcxpnGyfYrOhDI4J6o1CsvEsF8v8vtusDzU4IXXkHutJ7g6I +xPJWd9YhI4ydOuA7T6BKFMVXXgAazeoZOW4+waJU35MOiFxio52KDGF5bUFKVicCXYY3TuJ3XKo4 +x2LDZCErshMkl41+id5HtMV2mZ5IAnHDi9zrCBGxVZhfYz61ddWOgJhODgUk09rJe9H3dhrR4YO6 +QlvlKpZVaWsfjbPseEnfdy5uQ/BJJXRnJH7iHId8CopiD/7z6t4zaIXLl3kW4cBk0fiXb75x+bkK +n17SRfY9yUR8IbJK68TohaoGKjJqMsB9END1tzesZWKbSv/es/m+UjgxRB7REI0WZMYdvRchzQrJ +FckMBMmmLibLam7IybKiAsvKPNd5pYJM24GikpRgqk1hbRGoqggnOUlB3jBWjuulGm7nwuT32Tj0 +vAokett+6MBtuACxYWGrFiMi6pMA07TOcGRrnXhYJ+4emjojqlP3PAimLFveOdzixcZACto4WqIv +pjATAfTVeWvdGbPuqijjMh7Ih2sEyfQJz2qUJzz0Nzl44Oz0muxON4dSYYplZRtPgbqhSptVmi3L +wnt7MlEeGA9E0mw+vDHjjx+k/nIEZOfZ18Ra8sumDRtaOgRCJoPWj6UNnfjwCye1LfwzWfepqFRP +98CacJY6BloQiH5h/l1eVstEu/FAWLyuVJwjfxBKcnqlrTxHlKQCCYG8+OlOd+TBjIEQ5mS0aAdn +dCEAInZFmxL+7V8w9eqnoD5cwe3xahwsa9Ixv5scgTX3UT0gUcwtBEpVkE7CeRNnlNFUzariooYa +RE0oF42SDFJnib4OXf+XAWP71cTC4Wo5B6+M7Pi8xILtrpeUxk8j6cbjx+CDDx5LSJeSD27r1G8x +EIuGO3uYhLtYC4ea504KAyPVzHHDSxIJ85CAwRHMFxoyc+iaXA/OLJYf3Ne3q7SwxayhkWY2dMSQ +K+lwmIFMPGOp5/NGI56uJs4O5V2IyMahXtIT0QA3CoeyzSPf4W8TEVWM4XxGPspJXiAi/Ot5yhpS +NJQtRV71UUlU8VhsFHW5fo3DMfuVQX0YK6rS1MwmLgRZl2PDDDr9zO0Fd7jrn9zmOwh6KF3YIxgY +WLEq6e27fTgeD5v7HMFDp6qb9u2zwmCKUa528Mf7BNo7Ij4zVDb9J30nr0JOcil9Vz51/DBbLa9F +cM+JtJlCOFP9u3OuZ5wtEj9DkaKp/kvTpoQ+2Mlql4z/SMo1myDA5iOvnSynC5XluRiDRDUPjV/U +fYEjl2ax4H542uAgsY33Goyk8XoSLbWjVhWjAKCkHfUCazwnrpR7NsL54paPtxWMeH4GZD5X6lyl +s56bJYEMuF362FU93S6IDOCmd3ZbetiGbzHRMn94rbl0MkIl/2s3LshWfkp9QGJR2z/tn0R5bwix +CJAXc3vcem1XhqLEsv0E4MQdT2zEqCIeO3ALpjMhp8Eb0yiB0nX/aFlzIYdYHOt4QoyW8CvZDeh3 +b1zf4o3qDRPTr8zlk5QVDJi0uOwgM7hS8nXmkAH+LOmMpOKlObBtiz2IIOvTDkenM/Pqs01eRNBt +WhduVfLZvu1pKD8tzELJGLv+tBRC3vcHwmkjhrIAAQw7jVtypXS22z66wfKaVvSNjdhI7oHfc6JR +ggYH4dvrZugBEbppqg/xWKMZHOYDG9KxoT9r7bPzXV3Q7i9RdO07gjoWWunu8/ZCPtPDZIoRhXjh +69VpQ7Rp9RiVq1wQkL6dWuZzS55sijjVhafjqVnmqflhXCz0DSi7T8uRyeMbfkoYw3HiJWj9hKlv +Nq42HjzmF1oekjDBjW2wgmXz1gkgyS1ii0THbeuCUTeJ7M1/bEBh+AKOGjs7jMkximnHdRNY6J+S +uztB2EyhgMmN94mpEb6cJFwqyg7cxPPnYYk7lDPK07HBgPcktfrty3QnB6Uyj5IS3wvaaCFCKW8D +gV/826cY6bZB5ycWhm+KcwO/Tm/E5dfetOTbfF2Qya6QSWVrp04XNGPd5Z9HjZAeFmAw/kscNxZJ +3BpIyBN/4ElqC3TIIRM24mlz7x7Tlins9eA9mJSFmCb++QREHPcfrtYECBVI60xNT3RTrTAANMBV +xsjtzmvg4D6cd+0k4By7JpF/EbG5jV3VM0X9ab5hIVSR8emiaOmw3xVIoPXmJcXzdXJwq8rCrEk/ +2r+0dr7L076WpG/7RYv9SWZnXQSmEyVba7QruK1zKbUSDESbqALVLbfGqxqMrcsg2PDoCfayElQX +FfXBCZ9CzPNUUMOe7uEGMRlxOsIg2+u1WJP9ptpGQXS9Y40jpSmaz0LBapYHrrdSJ7f67G0AxMS5 +D40sda+ZQtMVz2+lxMsm99BQ71ZhX8xIO8kw2UQRr+7Bya/VYmS+uZCb021cv9KQmKI6Ds5YwF25 +zdT8PAcdvJSzcnSLTYCFLcBR41KZOgCXs9rliP70aBetGXruHMjBCzyvHkL9zvfFT48W9M5lqlSu +FWDoOv+cBHluLDVesTerjbE3MtOl05uEoMJSeHAowM6hicr1ru4Md0rpbUgCYP1VLDfNZ4/HyNQX +dkDlFM2qpWz8gX1ZZVHhGfIzQtE+LVkgHgF9ffHc9KhZxz8o8hkIHuvypCCAWUmZBGYZzas3DDio ++hgWs4DeYV6PUbwHcSgp1dVqUvheXki+PSNK4Lg9vaAtmR1/aJPzhtW/dIKi+wZ8EzEZvkwN/XO4 +pR1rGxbiuwS35tNv4BmHcirLUE9kKTm/zMe5+kUoCrL1k2J6ly4YOTqsyYfJe3abdVYeRbP7HAVh +2D0WzZXBShdo+OIWzyRrMyuEcd8HlT123/CVi5vmk/HaIdEgMzWlsKJ3grJl4PSYRF5JGDTR7T9Z +RbQX9d3w1IRbyxvlMnvsCECRREdw/sIuCsNuzA/pdc97Qv7lTnbFamrMvQ9D08eKEv00tTJ3/vNT +heVycbSfSS1OK4lL9yj+HRqxNHJowfhRc8A9IKH0IFiPdKYdHt6zR8+XbtwiLHRPlkn2rFheFNkk +xWARqjTgwkuVO6EZyOb4BytVsV6nkyUribvpZEawJCLvpnz6dDd1vYqd4ZhrctrnS4k1XeOUjcYG +CDnJXG/nkvqIvhWcyQ4LNirOCBeVCB4IsxlnuhVVmDWXxRNVhkojjPJGxITvz+zBukXpnrL/d4Bs +2dhfACdmSsp+fy73jSqMOGCXevdPjfN7u1m61yfrxcgcnT6U91QfcSpcBQH8MOwT+C6HjieHjvVh +27FgFrr7of9jOaqQV+IBDnltOShVU3hMrobNcuXms/x1XqK9uMJJGHiNqMcYKWN5fCUif+chgJjM +vGbPFosESd9df7udZfcICmgIIx4TT3ORr1uYS2itEtmbAuR0t4RSmuDd8ZgCfMxx+bC9xz0s0FG0 +PY/tMFP90z0Gs+BaqBQebKJUtLOozskmCoHIVM8IEljFkEmq6nIoVUbmqduggyewB3ZafyR0pfDE +PGuSxiy+IheXWbGMGkVlKLR9rJ3rJzMEX7n+o0jxW+KlIp3DiR1bFkp9bTCUPWZEpLJmaR7yXSKG +LrrK3MMN4MolN+MwjGoV6Z639E0406W4qYc8p+Goi4vLC2/yLBEct6FGuFOgUBahynQP/FZmUV0j +kMvxogTuYeEWTZcFKrshRYWQWEaE2wi0HIoRzJVRWTsctB7VYV6g3gLDL7ccmykRqHQYpA0It8Rf +ZZYAQhSgCdzeuC0Jlylp3K0IHdvHVQZt5lboDEKmImFYiTyQzosmGftwF8C3PWd+3z7D/HMencl7 +bRZsc/GHFCjaIF4Fz6WgjgjSQOYmaU+KenIuhAzvqQbngopalR1/lKV5qgCSqtCZ9ZPyHhKmECCr +CFsXEzqf3hyHjuH3sVxHt77V1xyrZBboNY0rNwqDUUZYEH6FaCEjJlaI/bfSCdDcfVaVv6GbM3+p +RSv5MOtwdFrSGNvPo/Z3b4aNGkutU2hqxEtoRLSU36Ia4aQwuFaGtQx9/0Zerh8IuQxxZnGVwEhQ +70rpl/UF4PQ1UvUBQIfG8l7i3xQxZ58WYqWUY+Qz3oo0GfvKgNonztt2vjdxaklG1x3UmigMX+nq +XVaRLerkB4s/nx1qcN01AJulwpRGoQiT2WHMpZfN41Zo4I3aSspoHmcdXrmpDIhkEN4FWXUhlYpr +oNMedxioGJfD8XSqKVSNo25m1XP06muHoQk6kMzHC3+lDh9awGSV8f+S6FvjmbYr48oDAW2szEbQ +dAuE58eX3SjURpTORM8cUHJzgUzgX+o3TJUivA5VJ5Ud8Xh03w3XYZzli4JuWQGZOWrnR7pyn0Kt +WMm7j3mALYGEkirLING6Mi8ifJO5st5u8gNryi8bQB/H0+/phc/XdCEu8yEGS5itNOIuNYCKsmBK +SKzA/P0PEC44+wkf77h5yHPIIYXLiF6bHCd+r9jxul+igVGp+PEwvIo8cOO+R+pEiwFUlAe7vEFv +ZCW6KeS+54XRhSEHLGBaHG8ySLyZtYYvz3fMzNLbS27yuVXR68qpbcKGcB7sh7fKmOBRDSRr5+TJ +2nYLL66OHOlyhvuL1/3LZH/XKDY1isUXnDmRrSJaydEa1KNBe7wML4GW8iBJTsiYz1Sgi6H4xoLI +d2tYLa9zZkYaM7bPjhX84AwMQoSWCUiXB+nHjcAg7zq5vKr7XMGiHNLiTw3ese6NwUZ/V6BGw93v +j9U3lTQOLKRXHjws+aEu9aFIN6/UcmRQxEyQ+DnlOqL/bEIUk7o+r4gVdqIFX1SUrwhNBtuUTO44 +dTihBNPl2x/DA0+67KeGuf+1MjPeFK1B5Ntbd2I5eyRhziLGfzGkxeAgT/n9pjlGtN0xzhFjYgz2 +2v4uOeaniCLZuxz1BAxcqv4DcZwp08+CcyBD+7B50rhjRr0DHy2jVHqu2EGHG7WD03pX6sgbSe/K +RVOuz5RChQb0XhLtu8uC/B7DkB4YtfNpfCkv03IRVawY4zfVKxv9hFt48hQemcnlti99U4PzUec+ +oPd5+nVpudJTetP8MA+51w7jG3dJbKqZjUxHS13v3NLRl0D/LsIRjL96f1mcMZoa9tbfUtNwi96z +MVhyj4AmvYl5sgQdRN6NPPHRTZWYqUwFLhZHpFPzqIGxC48BwwIhxm+WhJP1mTDvIkRhE92tRPup +FfR7KJFM7zv9wzupq0XjMNoVRXSc0OQZ2Fh6cCoCPnBYFL02DmnspXFa0AqLXdWpftlfAnaay1q0 +xyALQdDwUFJEKI5WhV3QGW1AntR9ohRUy5MGf+W0lxRGw/KP+fVQo8gnEkpDK2R1Jbm2LdSrmYl2 +cvwM6ewZM9FqWHNsvyVekFKDeVANegD2SRT+Krrvz4GqC7/DkLqbL2PdU6dt85vZR95Lk4xAsBlb +bu4uLZECrBLsspm4H3Pdk34sL7v7YsRkT4eA4sUtr539VAFR9Awv2saK7N4yWlBsGGkjDPHnCbpn +gplSLRRlV1lHjcHpVQ/Lgh8T2P4P6CNxjUdKypFM1ij1rKnqqRT3HKiL3cGbYWQr+i4Hk8IwKmxb +4QEq9hlQ3Z8xaOvADRYTRNsp9OFU4YBP3fm03oqOncLPwaTzhWmzubV0dOmfw6j79Iyh+hVhBoUL +m8gzHpyiEchnsnZLI2f2fMzWEhHaIbgXkIdBOsoDu/SuXz+khFyRz9iopTdFIVdWFf9udU6h0GZd +1PKEVOWOLItaGqQUPDQ2tJtcpx+NQBciiK2U/n3ZoXpzUw/nrZeXUzvQsBrRsebdqPEsU4cHAaWy +IynwLI2CCh/yPMQYCcppVISB7/VPscIP3AJOSvN2QKAGnMIlASghv89TWX0rt34exyc1Qdk7jm7y +qJ5noNlD4HVHNODbzYvLsvW5I6CQCeZieto0SN1zMZEyr94VDYTHrLqVjnIyK2wJO1ywaWycdCYJ +LIG/wjx/VaOZhJ/h14MBBEqE3bTc4MbCsm+ncs2Ix+D7EaOQXRQK4I+yq+m7Rrh3XJK2D6xLov1D +zVFIQzUsAUSbMkUHv6DMf0OtcOZIWhk5KU6MB/TF7B28i7b4XdoNY+gzqSBcW56SspeIP4piaX8S +F4UxkEn0M3HiLKxYIB1Maz9D2zFu3IDJtvdzB5hPFAl+mUALoBEz12tsJ0Er5XD3Anh/qt2PWKEx +qBZyvZ1VHBL31m3CfDafY8B5+hD/BOys/puWlwUK5LH4OsaEVDIMQXPBmaQXtSgTyRzkPrW2vRnw +Li+QzuYGalrCoia9wOcPiMtWFMkz1sUGact1PfYR0qY7ypp4PAlt/bgS4+N8UBN1qdFKQdTePvvQ +k4xvsfm+FWQBTb8f69L7+uTjdJRK1zh0zBKoyEeeMGu/lKOnhjOh6DKSbskqiZcEJLohlm8IoYHB +j3GB1Xhl9Qgcrziyytj+LOZBuHBug/B+b711E0Rx1wNt6sMhVUlHSFR93brkdYdD/bs2PpG9Ifcr +/7b77Ir+Ipo/rsYowPz8I4Py5Ra0E2WWDO8mc4oefZzyKMa/WSqZOhglj1vPa0sgSlSPFcM+cfy2 +A+9UAJVS95KIg+2AiS9R8jrIiwYgfOSO7xvFv4JWI1y1ZZxt/L8wRMxCXXb20m3s6VgmXWt1F+t/ +wh6o9LUTp1KMzISLeCPM5E8/ntcmGjwHsPwC/3f6/SkA+RVpkjtsqL2D1VnsL1WTxU9YfSpw0rZ/ +P2BD0yLuF0ZcQfvDYziCzR1Mw+ZyhjZmjlD4/BrSSLj4YuLoE0+TZ9eZgmUmbfEXsBVBsRq2A7+y +icC+iYaHIVUXgRH8QWVclBFmBE09TiMsjcG0ocZkCTwI//6kEpj//LqsW8E3IA2JTuOEfvQKzRJs +fiq2tus/saGBXPfVOIEo+S4UZD/pkyjzCV++zhfIDgRu77P+vD4j8KxtGLYiAuqFeKTrGM+KtF7r +q36qUk3WCUd9XW6cmA+wbk0BuH/oN5hCrmN67WxBZ4swv3O4AQvvpS+VpNqbLkOVyy5omBMl3nV/ +wMK73K+ECDzGUAJWRNndZClnx7c5cyn1Hd2KTJFO8Zp/brErGk1WAJKBXNW4WeYpJ25yfRtYXORq +GHAx8NZebPjq+MJEGUnZQ4pGZKx8b/3yvrepxo44IyXzVJhipq3yYCcOATmxvgSglEIBtrCWkZrp +JeCvUD988g/15suFByAj4/F848AOEgykBYWj7QGR8A9D8StpNpIRivQvujOs6ZtiOD02rqIwUN4P +899JVqhO6p08NMY9IEMMF4N0hp3iwmBvbrsAnagBaPCEJxQeb82a7cfskrhji35coFKhFDqYIKUb +0W/BVADMA8Hj4lz75NBRLFVn86PsIwU/DgqmNmVLn37JXVqJ/qp5AmHGXVMx6UHCwR8Sy979KhpR +XeKbYQxT/hUqVH7vQ8oz2QQCRqmBRh6yZoX/MEZYdO9xX1ntm+l+8XDd4+dGypDgTT4jBIfAtznS +FWZN0563QPVdE2H5ptbls1ZoU1ljWQa9a9aQw0TFw3SytRc7cxxlytYyMh2jcII2iEPjs26WHba0 +MFwRsq/TxafkDo2d/td6AZxaf6tpCaZ3YMELbaCvu/FRNfHWdLroOCOEkVfkkeglNVGowS55Ub+T +AD4yW5zZRCMJRDnfau3gax8t3hLofxcYqI2ZJSCtmfPeTW/Xv58ej5cHJKvzczwbaSpGmdBiimKI ++2bQvE5FX+aKoBQ9NQ1Hlvv9bUbE95hkIuScje9ZhfQPjUo9r59Woh0vd8kt+jD4aD+PSFNl1xql +0HWs0jjrTGazr9TGfgn/2aqzJvbjQIIaRvxP7UwYaSGdF0jsIUCQA3wInrLPvI59HZUxIuMtT3t0 +Rte3O4e44ZtF/jvR1KQb5wnqQazbZB2bjwsJjzF0g7J7xJ/NB8OV6noh9GoCEBfowwx0dXnxliHK +LHPrxbs+3dohgQrY8ls9rX8OwPF1WtmaDgSISE9ozpk49acwjUO6yut55ZQnsjGBAkOe7G7qsxqr +8C2rqee+ccwrnQH8zHYb5C/J/Wxh/kR8Tp14gEG0WXA4aiSfJhkNK0V7Y0QYvaKIk3lzNm2neHeN +VlYXOWr9W25WmIRr6mtt9Vzg0WVF3bHnI63P5hoN1TFoemQ4zZBR6Oyos7FPWGe1CkX4YFetvL7Y +5L2o/5G711l8ptze9225uwoRnZpE/CqCuYfSKhEd04xhHx7PvH4177kbWSeci2A5y+f9T3EK+93G +ZthSDHobdyYQ6Cq29wBd9pDUpItPGI5bin49rD/6V7a7pkh3TCKMrLHD66HrQGsNIP+uVBkZkDbb +shFumC1UFTpQk7SaGWVRRe0zT5SrFBnwm/xAnrGFYjmDs8gvNIrQe0Z759rTH26svTuTWRpi2ST/ +eWjBTHdzzaw9Vk61sxVhkYclIOK0ylZ+J0nQauXvlE+hcNUofR/0rV3QNna2qVqt50PbgBOnqUKN +Ec/BQ3AjEw+56NrYML2vBtye0lVu+f+y0efGJDm6AdC2DeXba9gwSJN0si+uwhgN80MPxtNNnf+5 +bE/e8hUSYcuREDh3MdMQun0JJKK7RcONrFo/TC1uc9WKq4agG14G+PXVEOPlepyvhBLrTzYIdTtY +jYiaWh/jlhnflBTM9v7LAuS+7hyyMTW3qUKliFv9OFQzXyue1iSjM/+8s8d1d3C6uSpAlZdEdHGJ +K5cRuH8ihbMnL/iiEKBTcOX1q8G189sX2KrmqsFsB3GjErBLjjwCGqj035h2PzJuzCkzHl9oc4Tk +XukjOn48jjSTAvoWHI2h0yF4NYyxCkWcMOdzopgNlxsUaZvzHgnVrjT8zj23fGYFvBPV37UAXnea +lLMaWbr35cHLBY4jYx6Zstfki03i1uDAMKEx9bK4VOuEly3cAjTIG4QE16DnvJdMTIA88N2YrrHL +oJUQ7NJQXJezkwmyldadjyDjPAwNAnw0lC+vDfW1o0HAXdkwj7SOj9VxzCruzxWWw4cn9VxGRyrl +fNMMvqCSXCIf3fXODJpUKrXTgWrMfbvG3LeExQkhqp+NmqvcVPG/5s+qZDISJxJ1RZG0FZrg0NgQ +Z1sB1izKlTS2uqtJH8I/7gJD6VT8Bj3QrH39511WGghJ4j4b7u+smqKCR2W3RK8XVfRMBcgdg5lC +3sQvzpxWJgZR7WHP11xU+fRadMZUs98sPnkOMteLpGIhi3gQCo6vqkh1p/SQPp3p8Z2LWT1yfPwq +/BbiOBXewCAYZro5+ZcpUwiKmFLlFQIiX7P46efbJWfhjhmtZdEFswg1TkrmP5GsEF4a5MTMu91z +NqtLRaExDCYMR0Isg4q/0Va3eKO0gnlFZcIXUL6DS8uJXYNG5gQBLRoeDkZGLf6NLi+csffqKeHa +By7DTXlX/T0IbZAo1F1XQ5Xj+ScMWh2NI08YXKjhWKekmGAo9FvfJNiKW+tfdiq3+cQ+5K/Da+mY +czzNDAjtB8Z2tX1Kp4r+uhGcflBR7zS1ITD4tm+Q9+3Nshu8rK0eSP1AWT+l9K8+HJ1lsg5mvX5P +R/zk1ycBzUBOUtoM2C5g2/C+OGngiPbrwTOiT9gYBd9ormeeZY16pTvPOCFWmgBQnNQXBUGMW532 +vWEMUISLwXjJTNEVNbwSFem1KfhLoPC05KahprvivVqkowjMjr6ApDZpiMB+0y+s9BLlBIue+i+t +bx8E0ZWZT6M3Xdmd8jAX3olxNZL63g9ifpaMK7RB0QtdH7wKpdPoM/ntCTw4zf36Q/Uue+Dtr6Tc +hgsuVFjxVBc3YFxhc6K2vhBuBb7jGBaeTggu+swsYDMWN3rpHVRSpzsH/lZw6y1zTgZx8WgsEDUT +kUAxHce/s0UmmlMNYzn4oc6/5Q58chmVpJlLAMeLrRmmAiQ1xfq3nWVS7x/Qtf0jS6bYRn9l1TTS +Mf40ylXraA5EqJP53eGz2u3b0sD9mwBjuLQVCwQU61cq7aRF6/Hz13GdcL49KEef1FPOAXd5LmhR +4JhWmAG57pX6U1lCkQvsydh6yd6n2lf4rNeckRdP9Pm6RgHQYl3354vWylOtzwCprUkxK4G9o763 +QJ+y0EL4WjvlLA3X1uteRVNz+3rBcy0eLvgPJ80ixcaZPfkkEs7NcUAecoQDCCUHeNy+mFMOa/Ri +1CstEoN9hoa5U5zDgqp8YkUHX7sTsygpirGQp5yzZuQCEiZkiKaLodmUZy7p8S0mUa825fBp44yZ +aqbceRYI5wO85A/f9jq/BF7K78w/2JO85HBgtiVKS/hXv2C9ioSkbrqnWEJWEK0+FMoq3yQke8ts +9ATFMz52rmr0BslKRRoNl1HEtF1PMccvzT51VUsWxT7CSUtCXu2NLGQInmaafLY63RCvo5Ag5uKR +Lcbfy1wfNLOzEDBDM04FWT2S9cL1WYnJNiiaESo3WrI+yKTMJwRtRPPv7NBx9AUuLxVF9n8ch27m +sjNZFcV8tzVLj7XRsI9RgT6P7HHsqzePRGL+4iGU9SnCGHowwIU6XNSxhCRJnVQp+uRmxwXK3FRr +kRsApGjGCp/l7uVAvEi+f2EdhthGE7c1mGIzez8KONIdM4WggJBzv04fTXJunHX1SXcPOM2qEjeF +Z+dzC3TCMJPbxTWRnjd8pWwUPCRGSCuwAXNrk1ACgQ2DxnUxi/i6wAnEClTRalUjAHuAYhogzAgr +2yee3EviaUmGMTmK5kbv66P4fVQOrc36Tg1Uq64qd99IdloJv3nSKAWuaTBXievrX9ySYrpMv12K +St+Ec68yfT9Lr74RT1HURZ+2C+ZHJZbT5N3oKT/Fac6qD+Tfga8VdsHlQFN8yd9n36Zoz915ssBz +mRgB90UBiyZBu78kEVeML2YrqonPqcnWdfpTJsuusvB5taYDyz1BFHXjic2OYRHYnSZ1mqVUpNBD +gEiFXFPHLudKyAzkUw6Xl7abFGIpIUG5qGEEcjTkLSjJPsJ83PC+nMDXWBfMQ7T0y6tLO0JwebWp +TmRzWOb69pw4q9/vpdEIbEzo46AJCKYGDcYyCFzlremxsQFqn3bG9zgTRlcJKjK2k2BWqdZaGwc0 ++q8tLooWdLjhF49Ho37KgCfToF4205pHroyqxDVt0xLbBHnWcU/oZ/MLtkfJefbxi3vdn5Dy7nMQ +765CERtI7tgQ9beil+ltF+r+ljYkj76iYxdeLO3RRP+A2rl9hxTemCXgCkDiwOyCHx5gvgFstsZc +JtCOgHWd3AS4zEMnUs+4kCoVRPldqzV6Ba+7Y2krHKf37DPeqz5U4CZt8l/Ia1WtOb1BPmq+4Rq5 +R7t6FflPx8KP1ByuVG8c1Q2T0sRjqdjoaEXl4OEelciK0sxv1wcuBIAoI42XAB1NHnGWliXAu5EL +ViBDUdJaFRZH5fbPFuWVRgD6znh6WhPN+VsgWnGp75iAem1B5DkUKY8fM0PkO/tSQ7/6XyK8BUVm +Bk0X64RGTTwWVhhcsBM6D5fJTHRNJkf652hGZ02/ewIHV1jZX1aMtTJa7k4dL2z5lKnOOBASGmzb +K0Cnxt6XL68qVCXVeQPprQ/8l/3Qx96pmBQDXxDZy576t2Wu7qPU1+cLW7XZT097R+txOYUnG7j8 +TahTkcywhswZvblMV60Cpy9iLpKanMwSPGVW5YNbAx8ZE5vLi8I0bAmal1cgWrPlCe7e3eMOFr5L +WAYO4zFRGJqZQpZINRByJ/lUMGEAnE+FHK96/Bz//pjb2KX+WQIgwl2TX94p0UhLFhb1byR3BBBK +ISDa1FibRdFzZECWiUD1IIhD6uf/1PODucp51243nwMAsjXtaoljLEYPUPy/efXrFadUvdozjrhu +eYT4Juu7Rc6vJbr1mvOlmL+SY7s19hSRwCuDZUP90UynuWh+RiT2dQ5ORRU3wAM8PDhYLZNvGjpb +BFFuAybfMjemgJeY06S6oIc/ZYDmQr9zuoCTRXi+AtTl1ZD/iXnET5BLzgu5S6FfyvPbmRw1ih4g +q1CkJEVRvC+DhEqeAxtjqp1Qf2oKcjGQ04XjQu73Vk1SgJ45oATC8bq21oDNLmvFk9+KBtsdhA/5 +GxMXTKTgvSLfvKiIQh+PMQok2MqVj/UgFTabt1gAyXRe/VfYOm0mrhBCPtD4feTaPGGHFQGLoKgT +YZURB03AhfY7UMDollrHURB0bFOohhKNISwXd+cm+Qj0xtG21bHOShf70r+N+SdaThj7HtvMNY56 +lX2v1psPJ/DoxDsNiCiUWWVP1wgLpMhRueYV5bzI3VM4bo6KOApsNK5Gm5VPmdSTRRWw6BQmhrKU +qOQ4/94/YpmPhADPTC0IeY+HNM/GdOWL91Yd1Pm2a6T+LYklKN/Gn2UDrhX+Dvx095BJ8UsEZEOi +VmhyjETUcDP4YOMKQCFQ4byVBSRfDZThZb7TvEcgEovHWMDE/x2gB6YUth+ORgeKKt1e7LVyzPSN +fmX9xqlkwwWGVhRFnIywY5iMla1UMtg4w5ZihKqWFpGftHzJcaAkZ+C0oL5g7AyNeds+66Uc+/Pw +7ZiTjM+fz+O059CuV1E8zq81IvL8TwCAMXYT91Qhnntz9RO9JuWCxPbY9B/ejWY6PeC2f4FesyGM +D5rM1ffeAIELFFGWv8EV0qkmHIzudhreCTB4zg1bS36w26bTWqcUyY1oPIue3AB+ZKrgrsm5lzI+ +uqSRTzOBqRCpOFHY4KRtnBBHv0GTxSvwZDmehRlxu4/WGqj18K4UYryKM1nuVFF09ZbJerXK+z7b +gH2hV1XrH2AZ4Pt7M8bEDGX9xTQ2YTq9BHKTIOZ1igTM+MFDVWgoC0CQXaxRf4okO5GtKkcDhhTQ +qtAxI+D+JgHdnytZOaLNB8qMjkRaZyGN1cooA01jgoQXifKJW+/i9nerSj5pU+lqrCCBHCGRDVUR +oznSCNIfpvMauMSLdGQjbm6R0rR6K++vs7/JtMWpDoUfLQbHSlTsrNpgT/lF9jR12hJbn77gaqE1 +Vv/mKcwm2FFDh4bJg7dgw6peVym7yWsfFiUEcNTHnV6J16jAovn7ILhNNQMcBoXqDz0XAOdMeKrA +jv6IQYBaDp5Q6Cf3TWuLh2ZxywUiZJgnVpdiE4o9uOn6B6UiUaouYtehvMfXkNqsAGDzo2uvIlLM +OZaQTlfXVzOBB1PB+3I/Vi0YgSRYc2a2kwUyOyD/XARTXxVbTZBplj02Zh/o+ndskaeiKMeUBLv6 +NZ5q0AcfPMWtcI+DxqJW98xyVOObaudKZIbT4dBaXQAvfYm6h9fQJm5n+oZ7VTJ0VkOX9grvlW0q +X5e1tBXbkJu+1ggEM0rliP8Wj7QZduq2nEEZ9jqwZj5D9ytRH3dDa7m3AvG/9GbP4xS0t024XC88 +dtUaWaIRfKlk7XzlAD1CuEoIJnArF9C+iPEh46kvt56KEYvkg71dNf7V142JRiyQtw9vyQv7UUbT +J0PvbNsP39oiDuTSrpA/07C2EBvbE4UAYmATUHLI8ZyJrX9jaXqKluAM4JQMwndeMPbLmhlSeaBh +GS6KS6t0AMhLV86lJw5cKELkP9Pv6ZtOhALZvou+/AICdY56iRv5J1tQmUI0pSsZLHvXX5o2YqJK +I86Hf9/kyK6AbciTGOxrfo7SGnwIjjQYxlhyPERZOGO3nhCMLw1NWDoj7/BUyEeRh8J+v07nJl9c +t35RNQDZprlR8nEeBlzSiaKmMwGABXVQ5Ia37aOidSR1L7+8trj93fgFLLjPBXnE+y8lo7x9XKIu +RJR2fOn3bxCtmvfsoPLD5H2azmLmJL+iXZSh0vZqc3aa+2kZSGxPtotXEbaYv4g7wDIvUELbyzvX +dThmmRSZZh8N7fbpyjivbCW0kEgX0FWVbeZKIxRDprxoXhYhWkdzPOZxdTISUXakGx/emIodXOjZ +qkOXYFM9SD0+aHTeeTq/1MAtPm5v/FhaqkC6zrSwUddZDVA/b0NrPeJPUHfz4pWp2R3oxIdF8Jgm +VwFeqhCkWRtSmEh2pvvjP2ppWNsj4Z/SqwfAwdu6BXrr+ZcYYiqnZm6stt4be3k9BKREFSzuHiuY +/DHpwwXMibVU5WvHT1p4hI9jo0QcQ1NvdGPyvglMhYgkmbQ5+zLcYdD59ia0alzrhrYl1OEBXX3D +lM1fp5L/2ljVClb5SO4IMHZks24p+TuCR73u4h9KO2umUQ2jkFKQFRY+L9LfGj7nPIrtKbyP7aEy +EeWLeD2OSiKEu0PC+K4cBlDiB2spNMQlBwPdPEzK6cNpgNIUpZHMZI16yKbENstyGzwguBAWe3EH +hefzCMm/GxpsPVcijaf88oLteHQkDKIyieGxN4H2/o/CLXfD5I1sIDUE04eGUTRu0BxoUw7gt9fM +q3fgX7pK1XMxEWCdxtHvULQjWLwWeNQnEC52cq2fa2TSyLkB8x3gFaX82M2hGjxolmpYhvcQlk7b +a448Ejh1oRR/eE9eK9jeOEKAzYEj6gxxCKvFJJ4N+Ykj8zRiPuAOi93InT9ekPrMnoSTGB/14P13 +VEqJEyyatvCNqs28qQworTIBiQFJx1elDiAG3zAu8YEf04kihPodrWr2Nm5hYWKBvV0JO18Rq6hI +AedXR8QQ+ErkpwvH+8hU9ys6L6Hp9t+7IPULbcaytnhBFYLmsoRAQaSntismuU1dRw9l6tko8bWA +8531K+AIbMDlFBloHruGTdTDtiAItUxWhwzY3RmIz4DRNvYienDMkOcHO4m+9yjm5Czr0ummRSmQ +CCH5yyNCFs7O/jmbiO1ONV1ZeQg6eeflJLek5DaJpL4rG+Bp9EhpbzcAIqub04F9SIl2F1QPCUoT +O8oZyrS5S5IA6AOqOfWmYHfzQ1PPh1YZRcvYnx34fdf3zjCzy/pEe6I3xI2IYuOHGLr5CTeVDh0Y +OJi5eI4o4q340MaLakblOS4tyqWTeQnnfaWrakQMhfOSSgL73+0RJMjBvUTudXTv/IQQyIhI/8Pa +2gAdkr+kzQuFg0GKOWIsNfumzr2fbFtpOox4y8hNVIjkWdImaODktxvsIuFoc0doaEenqVr8lnzS +BIm4lnnQ6axf6oiuGKzmD2bxdpn68Dzk7rzasGxcYBoYpSWKIjwcyE3/AOBvHdzfwL50Ge3B0kyr +OMSxuZ2BtcbjH+SPxtcvwAuEOZk94mZNTw+/XjWEImhMpBbHK6dd/jOM/F/fcu7IUkAzc/g/+dNr +TRWaabUDcp1BxxRIQ62QHBPAaBZMubigq4eB+Y57K6RvGGQ/0wB3zXL7oojHIBz82YEfJbPjRIR+ +D3pq/WIc6wXbUnJobAF2wJVzlH3HqAUGFk7/I0vP0Ahs8P0NL3lDZTA5v3DBgXgpI1PPGM2ZVIqp +HZLRPclydS6jOohzAB+ocojl/aCqyzvwXGW1ZoorzDwsAqxCGiW8loSn/pCfOgvtQcK8+fEQQ+A0 +mPJQtoxjKSqP0xsrrfROY/6Ss+dSePqA72nbi2iMTZyjEW7GbXoWj8ahgrQm/tevOirvU/xzmh3M +lxEgDlnXnhLj+jBXEdULIpkRi8Na3pLT+o8bOoODlQyALCIZ2BLRiS/cbibrRbRK5m1lgi+FpQUD +BxqDSJkmvIh6AJVAZ9bAEma4tQYPg/J4Z+yjebpjakEkEg7PSZaD/+4nUZOebYfuTE3qaXqIOxQI +GJahssjYfu5sC/krLQro3rmoGoXe7ASK6SO2naoS4ib3IA5eES51psJkiMESgY4LB5mnX590HYQz +d4Uj5zYdx+YYa7JFImz4cw3rs4ZhIciC/s6kRapRqSZNYtn+NyJ/THeMJwUlWmK2+sJA7spASLNP +4GwxIQNkv0RuZXbDL8gHvIwzrLu/jIDhSjNqZGCZEbIwwUoFr+0QI5HPWcuHYiYCnnfah5t1cIfN +59JP9e3MyrtWCA3UlbI2AM5CitFJBImfKqBllFdZdJdjPQWFJjyRSJfyGMLAvA89TBxZDIrJn5zf +qg78hjYGtZoSvEEJ2g7dMloCW2EjvhtfH99aF2+iOmyzyAtZ5FbMegaqRH/XE02IZcpqE1lV7/GP +5tjxi8Xp8CbSMmawgehwzDUQJYkhwtPS5kFrS3anqovN2Jui8xMprX/ROhSZTAOK40w82njagGj2 +l2crKkpk/RcfatxFI8mh6tat6s9xVrdrNhUj09gd6RQ0IGBWKnI/or+kkk8tWlQ2oEbZoPzr5tq1 +1kiLFwfLiSHrPIzA/3zwiEQbnM2QFTdNcfE/jdbT6GTsBAFPr2Dpqd0PpyPLXSvDRApFLo7R7cIw +prY5YuHi+VrGjtvbD4st6yTUDmtXBjxS0eiYmubpLU7Zu4kQ+Oz8GCkI2Ojj0QKCXXyFlJxLiImn +D/FnnqjNIMn7z3dPX+Sz1Dk4q6XK+XYkNhKlhkWc4LK19qCSEGmSgbtmoI65RynO+g1Ngci0KiRC +63tIXPc4CIGchBUtxPQy3+wB9V8HeqbpHl5lX6TmF+Pf6NvqrnMDNE3YDqSw2q/qCGGO7mBZFxfy +yMxZeKN1i1gTHHfHih6A7FCwBPa5gAOFZa3+k9dmm8ha7nfU6wnktFu+4al/QXuVI7Z7yJ3bhaWO +zsCavlVkbHESOBa6Ba850KgN7JNLH9kYzjn5OWxgK9IyQcz6NX1G9zx+X0dlR9Un2nrtMLXPtv3c +S3cC5cKKj8Vphncu78I+PO/3kK+sQzR7t0F0nUD4qFkUaRO75Z6Bofm1mf89Gw37og7ttWZaV8zY +byOYgHoLcGmASbNYcUMpI/ftJLEchcFCXjvsobdOvb7pcLRMAN4MTt735xNjYud66F9jGdy+WONV +2UFcFw2wJ55HI24doB9xENwUQI4ldj05msPWaI8bQtTM7yfOIcXGljR+MklNKAmGOtZwP3j86pqL +U58KrcDOR0i/zRtQQhoO6EcpcVPhLmt8ptshabjLtnfoss2RUSdtWZ2wwHbqa6lDiy0hgeeK/IPE +FeUXoPUjTGR8gR4GWsuouKOCIuIhf2VPwgGnD4TnSYokH1PhuK2Y1HBvVPaiQYwzQRGfe4QXF478 +2I1g5Sy3xuXpciDHs5Q66J1Tjy6lD/xZxWnVxHBFGXLrKfs9w8mFAwOwpvQuzxD2zsnct815OBj2 +LYfa/8omS440UVOiOW3LHSWMFgvrcTUOG0xTL1xJmqeued2C2w9AoXOQKNfo2oAjXAMeFzroB2BV +hqbt2fwcJ3LUdpHdtfbM3+djOKXvCfxcoEIul2H2PKH9xnS+PwjQFsSOiCz2L8gnh/gMn6O2cSrA +z/J5QNb4cP5ivi8Wf0/E011+fIJJIYdfU0YdfSgEn6gVY+Ix+8fx7+/KtuqwIUgoUegnQYQgrxEv +9jsc4xdJzHo8epNDU0FdRTvWB5VVxWxsq+PVkG8aky4Kq+4YrNMNqGxtYUqbK2CfFK5havVKVkm+ +5ylJRk76U+MhcG6zvmsJsSWgoff/czYs6j8+QM7TJ4tF6urxBNsEkfgkHa8l2PU3naDMYKcOPMh0 +3yvfqqjTYmR6za+EUQCg/bV4geR950isfBc+N1WFk2BG0KURyTaPA83SE6MdNVwP1WoWT9ws9D+x +7qeWDvwIh1Po8PjSnp4lm3Mm67QHrvq7N1LnRYKjSOEzZ0qfbfApeAzsLwsKe3wUHOflmbCYlice +fmCQUDmLh/MNzsShLHosBUPGHu2RPBnhfkYBFIMth/h74w8rNzFR1JeU7T9sQFWaho7yTHOER8lg +5hC7v6U8qPnu7kSU1Asou7UxCLFI9qF4lo1OB+0O/MrXwD+JWlxaIlYjKSz1b1Hqpd1t/E1i8OsM +zMXqw7rwTqS33ei3m5Jos1kfsynHm4+P9ZNLo8xpZtzAOlATwrJ7mw010qgTqmywlC6B9Hf+iErW +hKWgRYdPX4WLpP+0AzW6Hro/xEQXQ2/qhDr0kXLCY8k9XbBXZiE/GBlJ97i6jh0ewEYRZ7p3uhM/ +4UEcostnxVb+hFIgempa7oKgzSlYm9eCbt5v9+Az7KLWkXMZnqvdx42R0oIAb5wNfAZ6iJr/b3fg +qtkBRO1EHF/nGNhJRaHHVLd9afaEM5ZiI6sAMMPcPKbjdbxqs1GI1TdzudLaSfneAuoPyoGRgtzB +Bb0bUS4oWc1skaBkkV7FLGxc5T2Y5AutWY51X2zy1kr7L4An8oZNr/ueRXhfimCaxhakfm0wlOtr +LuKBi338ILbO8VMtgM0yjSrh+KJznSR3voCbqcT645Ml/4pXrF4jA+GCJyRS8wcm0Sx+W/Q97Tzu +X97EpIC8PjBawyW+/PVLrZa57ExlOi6QVkjPuNh36Ruhh4mJpqLOXkzVsYvZHFXx5Wy0mtP1L9Sw +/jR0cHDzsxI0j74HFRSG0rWjBm4epVFNzuF8uvKIG82LAQAFH3S3bXaFcYPL3WndsaDlHZHpbvY7 +IywWYyisJlLb4Sv/y3LvauoSYSMm4RKQCmF7Rkg1UqJrJRjVgr/QW0nXSKogpfQs9uWPN+/mN3f4 +gwQRDCOvUXV3sCLtamDMTuucHZHIWJ++fPR+PxK+89z3FVkk3jW2mpZvg1qTQXIaSCvzhnKX8mdk +LysHDxg06+Hi4qCqrzW2yM4PvPuMf1olVU/qUyW5MpQH9w5ETKTEjYWmdSaKf9c/+MmY3V04kvlV +WlMBWushdr77vozIMkwPoIWhMnNZAlA9Ad+bTHcscyQ3mAwTn5az4HjO0EDySBqpC//hWjPUY/Rn +JmPQSMhqrmU8APwJ7/ThlZvrHALyNdhuZATsKmdtarA9Vm8oLVzJCd6I3OJbHeXklSnpcInSatS3 +Q4MrS1j7IMwubic5VdARMM6KNYkOpliQZXKdhP/DoitbPJMBO+jUW83Io1Xnw7ZNrU15o1XwiepE +LPNU6zLlVri2KxALbXlt8Ml6BUdnspsHLHeOoAqJsbXQGW5oKz8XPnZmFjBTpgAClBCLYwajBRAe +i+NeO+X3r0cTE7Ouw1rUK/RNW8o8vwtH1egmtW6/F+sJWxaseUuqoDWnTsi6p/YdpNuYVjubBhl1 ++dV/Et43NWk7cQGfhDM8pypAJE3Gtw6m07I7OJU6YGVfhW1koVvAsqZmGtfhhwwXLoRmDf2U6iia +zftadWkMG4HWASO9L0RN+xK/IKsMFQ3y7It12HTLrqd2havdONE+wbr9uOttcYJOD6+WuQDqwLYL +LB2jO1wCMdF1DFQtaXu8nNHzYnwMRlmp4ePI2LJUePLMYiE8pEX/Ft9b0pDyRmvazHuBLWTrkI4Z +bJw3wxQKugdrqkPpNqLzggS+Roea9+EvcgvNFUTb9Q5NF+QyF3/ktS0iGS427Xk+/r4lenoqURYn +Bs7UOny+QLwc2meNDD5jVGFa3Jh3hPLiutxHegCscU3IbsstPZGB9UjT7sxPmXFFYn/lH37+yZ36 +vjn5HFP2Ng267QTtJ1BFo0/raBAbxmfZwoqHNSfjjBy+2KzfxYcnlg9HebB5qOLgipQ+v4c+zVi/ +el1tzi2vhDpBiwUgi8TEVTBzll8aDluvQwKOtOTjx6CD6KgmZ346LSKQi/2Za5yWUlQcrFgjI6rW +AmgnfHXupsY6xm/HhHE74aoJC+NpzNwePuvNP+zn8u1xHgjXwPx3TJ89PcSpjdEMEXvOTUBTX4pC +gO/IJsVv8oora5p+rtD4D5P4hBv6ZXvzFD9G6KOSMilCJxkFDsUQjWqcdrD5BlWSLpB5KdE6882i +7ZhwuNaw+83Ikz8uNzTuI316GBBqwDUKUx6m9yT31+sNHFWTrH4MGhheYSWzD3p14YhWDA/03SoB +LkopH/AEE5gSPuu2xHj9jcSv1wyF2lYKxzalgmKFGONYy8CaIBjkKXnWOXF4WgKYMro0QDEliPSi +EVETwGkc0q3bXAsz47baica6oRCsZ7TD5/OdojWtxiTs1UXuFDgBqNDx0DkZApK1Bk9MdDkMFcpD +kkTjqUWVH5ehBUrfHHezaw2ld8BD+sKiXRUjxi3I0+iPhsRtP0zi+IJJOygkvSWn7IM5/PmMeoiB +/wCvamwvr2qfQMnYsJPQyHiV8/9RchjjnuL05z9cmkHCBcLWQRjwWoSXbCoN/m8ZOQkhXNzgRa/n +/rrW9bfg/QIW7vNpOHdAS7ZIY4qwZYVi2mf3wL07yiBNPtZcaNFiO+AmYOOp++2Bo23KN8Qrge4D +T/+hGDXOcH+vTC89zm6USxh7dWh33t8Rf/Tjop9EX6L6jFSr/cmo0g7nu5CskZAm8QsFzMQCnGXG +d281uGXnR37uw7/G7rxcfQSSK3iapTiRG8+QqJx+sHHfF22CDkyvyShlHlrb1nf8fUTWS8tfDk7w +znmsYcMsFDwKwYmWqC8dstdugmseTU7R1glmP9Mn1m9NnsZ3qdvbAJhbmULkSa7ZChigkY7OfCLz +O4GKjDAR2fmpzF60bnqP8NhUSiQk7C291Di6icUIK6QDJFAwTQNXeGnvBmX1PW1Ogz/SD0i3HIgO +lV45j+4JfTuNVQU+yra01UMYd2ktNlduXcXW4NsymaYLB+2rnpOazFCtVNt8aH7Vw8tWOBEOohKJ +mTr8H9g4uL+NwuBnTIFmbpf+mYBSJPBZu0gobUUJs495ZHwV5ShuP/d+8uO40KVXZxNs3VfLiXKx +7kcJ9Xmi28Na5JjBk95TLp6NfPENPWJY1qKSwuQcP65WPrD1rVdWkndcTzDzJpSeU9OlZKm4fAHj +eJHQqj9oFoZT0ERDvt2bAkHxAUaZ0IjyjoOSpQ0W2QCeIAVExxG2LKoAWAMeQU9jyclySPCnrH4Q +WGVz4kHJ8+EEtHpiiV0WnH32Q7FA3y+BlG4g2iiMegdcb/5pDYdaaor1i4vRj6zlhep5/Zrelf4g +xOvLzJ++KHXfMWCeTbIcDp8ZREnkIOfaXbYXI+/sUWcFxlH6oGEJSgw/5aDX3CciSdwMqeTzLi7K +Ygod/AAXqwwLyi4Y6QrhO49Oqdnyuqp6b2SegNjztQLIgBbvaThVMN0xKttUF1N+qDdKPTv0UrIt +RTHbUh1lEgz3wGJjMKM3cnMjhKD0rAlpumJc75AmlHQBRBfondaao+Lfd87BW/cQ27rEgkSiefG6 +w+dm6Kgoqczy03oxeSyGtVjFN5vhIY3TVh0B/qhtZih6XG8Z5PminMvDoZcawPIIF17rzgNuSGNU +IeYSHkV+lVCDWFHnXhKjaCmukcnxFoQd9HZQO+4boRnP5EiSgQv9CK768OlY9x75Mj6QZx5YR2WI +xbP+E/v1UYnrCXs1lr60Ca6LAqSOCNs5RyIbNUIESF9lhdKtfxs+UN2Hw87DhbNBfureXxoc3fSP +nQrNNWdZtZBqcgy/O0kzrs2XX1sKhTABM+v5gRdkgtFN1HKo3S1RoH0nRGhbKQIIGtxQ2Ek6caZj +JTl68VkR5nxoxf/1ZvTZLcMDt1nDZi5onvQo/cxZEKKYTl+bV4A4q9xyXZHh/SuWnOSkbdyWu2x0 +OFSj8Hrx4kw4MVnQND3SYghQ0wHyVZT8aeg6i7J84eg0IQV1mRIsAhdGPWibNSYVw9DQX8P3KW/Z +/zop+978Pao6OfUHOH5ztV0EC608y8d3lkNzVnjrbVk3IuGI0accxN3CZNU/36wFKiIm/u+ErNAY +frcON8oTa4CeLKegTUQlS8r7T4hWnMbv01Rfh8413htyxe5wlO/yh5wJQnwrZJu+roVReTZ6VvPw +zQ8PzsEv6dWYQuh5vZkM++Ve1/YsbsWqeDoti49WqaXu+6m/vwDiZrVtvxwC7TvWvcYq/2YTN02R +e7sAGBLvS9oUnJ2DC6wmQvhfvh0zMI+tB3CxtJbKttd/bk8Q5jYNGKe+6IinEb9eDUanXctnwuPl +bJZ/lRuz7+Bwwnf67DGClfmuTftE8/vgBXuzL9V80uzztRG/V5SmrEVSnOfwDnceocWAYGphQo/N +NsCv+rlnPQWreBfWP9W2sjFRqviZZZnzPOx4jxewUDkVct/bximfpxT4HMQ3nJVOhs0zfzEg/YhP +DkblCBDcJYIomOuG0kQdpMTqbKyQ2kBdVbxdhuOvRuwKmVZMySaYP7F2ZP6ULIj1brpUnkP7uVQ3 +KeTRp1npC9AodkawSfjJjQCDDFVyX7Wa4bYK+gQDp1qaYACEXjbab2K2uUazbDvAeG44cBy4w2Qb +fmdJRVvdK5BVY6RBcEPtsymWe2MZsaDelmmVWRsqiCduYvia97iIrx95UubsP36TIWJ36cx2v6x8 +M47l6YxObyu4zlt+IhKbbf9d0bSSJZeDW95KJzCHtPk5x2xVVaxkZ/bGHYo46NgXKkIyVRlpHdfg +Z8MLQXJFoZ0TEWxK47gdWZV9wax6Ko0zdR2zzVLySMa+l/YDkkKfvVu4Kkdm+/iQncTGQphT0HI/ +QlL7pY7fDAphswQPaRo5nA1tMb9R+tBohN3DByGfom6gSWAGU4Kvze9ar/KszZjFZQ+P55gWuBoh +8DqL7tLhXVU2qM6C6leMKdROBaWINjQ2cEvRZMRJuYYoz+JYGi4LbdUnvkXthEHatdQyF6/DQXew +a8XeZpeEOVvU4pRtVem6EBZgxUgChcqeOLNab7AOzCmbqHPDONiuRcdloeFhmJbvquC0j5gjrKj6 +tcDntqMFMIi0spmKg7bposVauiXfYvI1+dHybMp9iLIq9pOm3YijtMoESKq4YW450E7mJD/yJ6Hp +z/EFVHE0WArdMU9URpHwGg99r+w3GARG9su3qYjunWpFXJmezsJlTIOvlcudrxN9YiXkVKo1AZve +LkyBHhHKfAkZCU8mxuEcF10VTC3/70MOz0RoTizIByEjtSMzpa9xKA+nKvrRjKapDaMnIwdrSZkf +5LQIvAaiHFUbvL4wI8meo1cN6nLRT3kGAS2XUamKujc1vA3wuEuxg54eIQYeQXKPU2zDOieaZFgh +dfUZi8BiCAHLdHfYLBk1e+onmIgdRtFDcpYGenxh53E/V2P09ZXohXVEYyyN/Uf0bvMHZ24fgavl +in2tMf0j8mkyu/dYzDPSaryTbvVlkzt+n7FasO8e7+YTwacWGSiU2HKvP9c5GeelaFrZvrqps1z7 +6QJNr18D5uOnRQdVzGz2NMfmSsTkBtPiMdyujyLZ0VENsN0yTze8aRllzU0KySDRX/VhsRk2W0o/ +R7FtTGvoHr63PV3iOJs9gdHh3eBt17AWlgSIrUMr1t+yU5aw9rrjg0cI/0TL59NShaW1SiXEOKO4 +68yjNAE85aKB89y7qkeW911ATUz9r4b5yPZVYILpf2qJtiyfC2Vb/WvZDLx7P68tqkffuWylAIGT +GHYPa/EK4dElocXv4dFDTlAN2IPM0+uTtpQPpxYsE0SN8NWwo9fRhsR5xXfUgEyobRh94yKFVfHX +6DAGsjkLvJ4wbvLm3CEYDvkJQ4EVwhe0qxlgh3+CYww4Ry/8HpBAWLxKSLcOoeqYSepXziRvR1VP +DfixnCtZmyZvy4/T926Icg9/6/9Zsh4GOiehA3yhQyzB4NXJIM8Khoop2vdkdGv/K1DN5ETASdix +LY+44fCaJ9xJ5NQpGGWxo4zFXX3rjdRMx0C0LbzaHcxu3XQPBmR6KATHcFITacvYl1x1d2EmWe0G +w9DO5t4GiN7bBKTzV0N/o07VDP7iVh4cuUe0Dpg5Gq2JRrhhoYxK7FfiW9w44nWDLiAMFFko+69Y +MNn4wOIUqjR3EqS+SFyAZwXFxmEVGMZxx+F4HaVROjFdzthtkv6G2D+srPTeXv+NO0KzU1PsNCcK +bdr6i5EmfHXOmfswWBEjMgqS0LrMhKM6Ix+Jqe2i5Q4xeb5zHiP20eQ24L27dFQnDeC4VGj0Im4Z +FEWWCaTsBBBbRoUADe4wiAn2LHV5ZLTyo4CndUVIWrt58Wf0Rh2nsr6tNCMYrJtHaDJq54V07mxw +vzFDdaQUJ7WkBbHi8EyzZ7L3Xumx/Vi58xx2M7D/AOksSOugPe+A82T7kfv9URXUYegjJFROsNeh +xYvaCUVynzx8/2D6u5h+4PtqiGZRAcBRyK+a9sIXmXL1DVGES6cWKjrPI6SFU5l7shhu1ala7dD8 +aZEbHCZZTuhryEmcw0i0g7LWMhAEjIcMQjhJ+G0P0YBEFil3IKUCffKrH6FEYPLQ4UcZVGOCkVB3 +j/rY8DDUeWuqLPlZh8DIvfuyqbVdkc0IxQnnxxGVs+Jio+hi06jFy3R6fC+SofzsL1rCZ0+ehfrm +jeDrVx11h21oOMUqe5is1BHSsVJnkjeanK5LnUlP7zBGjNSoeND5fHalJl9phuD4ySdICqs6dI2k +WNoSVH5QIma6EsTj4M6tUgzeqkod2eQY4tiMYD5b3RCKPs78q3Oy05SPfbykqjXCXwM1ZDSXZ84e +RuQY+L8PC5zgW8LwC45loGX1YzVr8Ora3UiDZcEo2obHGlscORmZnQV3ULJAl0/yBSuCMLXYS+aN +3478/xQf0zsXvzGfXmGGxAR6JPl5lG8CiZPS44KaeywyTFTleRhYw7GvUKJCssxB9u5Z3PFPxck/ +hbe2rFZXSw21W6PTeoNrBa48UvTW8FWDPTtm1SLpWSgYYT74nkbHmW20S7DA36WFn9S8djRfw5DU +TG0sMJpo2yjJkAYh2Yz9dpZ+EmgMR0RRTOkv7PPEDFYGj+24CFCZ9FOsMEG00QHp2Oj7LjjhHGjU +quNGFSRoAt5hZCSFJA9XJwxZp3ybPX6VhtiUiD3biVxNtPLJkfdvvvIpFun2VEzluqMvrMxzmD6i +1VxzU3WTq//kxawhp4pE4DHKDrz+Jlsr6bpgov44oItvWRFBDYkBGHnPWoVM95BbRZqnSphrjylH +1APZ+J1B4NutZVGP5RRkCcuQXwVt6bo7VFQNYShin/Hbzh8z5/VgCV3Dl/aO/6/YruS4a7pA6EUK +IaBzhmfdpj1NN48QkhS6c5vEriRYXQMSEYJzM3WFce+JcRu99Bsf7NOXiaMAMHCbNKIKKb6GZTOY +bdaih9Q3CCXOndouvamMLQhG/tyZh9+Cf2pkA3ViRbO0cUwX1DqWBwEhKSt+Q3oeaUGsORH3YPSf +G917kjWBIoclYLEg0HW1UHrsxzNCKDxiuIS2R9LBVna9Zr6821ALeoTEPe4Xf6odOYmUfnDpMOEQ +Ov1+VxGD+mQ67EroU59DW3UWnitI1PK0+GnY+nEV1SoKH9zcge3ZoizhCTANFb5bnlXA5mBIKknT +XQiqUBX5BuC89X3jEjGWheedslXUwsokHck/xzn0FZ6XWLEZ9eFgpiTz57PALw0sLp+wEeW/mtkm +G7NpO4p9dLEn3fooF2cZiOEpsOtcre6ESSxwtJTqUe83BrK2DRLYzqVth3AgIOxEh8UZWc72W2J7 +4Zb5Oor3P+xKcxw/9NxFU18H03nAFUyW8ErkIqSDOv4TuGJz8vB+uGl4Q+zHqP3xViuA/mGjUWHq +H8iPQvGQK7k+4BOSDuwFxUEgQGabSb4jhf+nTp/lVJ2+/okEqIOw6oGoxtAps+w8VBGpseEBuitD +rAtaQkKjZxtoX2QMJmS+0Fq9cxpEnivpe+jK95sJ/2VSC1P+lkkIjlFKFAAY7kPXGZXjJXugbcHC +KrKv+P/EUTK0vwjJL5KKbc3Q1He3Bt9nE5YRsMFD5Y7xduPunOWHu7i6BDifECB+DtwBGnmUR4u2 +bBcp111BZdic8KzMT+f5WFPLuAFR8vHN62UsAQfw6nwi8LaACWZZw0BlAq3rF49juZljRKF0+Xr3 +rBi6kMIZ8hXe4RTAffYIdFzNJo24UR8cWLaa8KHtZmwMz2G4uKoPvCJMy3RI72AhW42M4iBGeo9r +nucdZ+XPOHQUXUVTzsExDgrNLtLsyJnhnMnd/eIesmxSslPpQAmO1432XFgjshzUAd6C1/2XlV5O +wqGfuSado6V2aEXtR/kgn/IP1q5Zyqw44pJ+nkMTHUIPkYVezsy6qtaEinqpKVefSpbFCZ68JJJX +63R/ZsJgvYkNCXmVdfRk7wnfpJ9OtaEsMHrle3j9U2Pi5NttUoELB5FH5DgVnB9s9JeKa7iRLQM1 +QU8+Ua3aVaxgII0uUuLL3+jpMvjk9WKNIzjH9zaLaicAuieb4Tg90m9c5b5sanCVBGvl2AC3oxwM +tDeJz6FRurLXiucEnkh/jbWDxLEoyeCkWZFvWPirFrctHHJgRCdkXw1gXU/+gkV6hmCHIA4bPQY5 +npjRYZdhaAjmoXN35VZJjK5TWUTsWQ6d4D0HD/4Fw+hInTri2Bkhx0KholprTz7dYAmV+TxcoYNw +LZDhVHnJkcsP4Du6WMFUt1T9ybYGWIbKi763pNz7GzRhdx880bExRIdcwDPcJtTdVd6q3+7FytoD +wXWJEBaovybzPmGBT5soUduKbhvdCNNp8wUlCkKkJizwMJAOPRBhrkRcbWe8NQR5cPYkv/h31Cm4 +Rx49opQ3Zx6hUfnBg7LvZhGzXEtQTFTtzc8jtMTd/pDSKtxIu9aa5vgfyIcF23bAuspf/him8dOD +aYioLojpXDRUiSmPTxZVZkN/hZgN2cMsMoNrhyRm2OX7geGR4QVjflfHjOPhkg6cRP8gckfhztHT +FoTXLD9XhXOgWJ8mazbcE4xfXV9SI6MPuT3YIkLacdlY5Mf45eVK70+Kr7xIfN1Jg3cmMVClmnMb +3kVVk3je8Ce+SVKF4oDQo7qmnrSHcw4F7sSMVOJLCNMt+ym2s4ibbD7DnGyXPnSsFttwta02SUGB ++qvAEe+zjctiYYTydCqI91Lss9nhPBkqdXgkWFuYgF1E3PlW55dOc3hgfpKbxEWKpvLbE9DEqn1i +DJvCrrr3p45CC2i+EPFPoOpDNAkyF0YGNimSX7rDoE5vXO+nV3NadfxytdxLI/09nBl5N6s8yMEs +FxpavHJLlbTKJkqce7N+aqwbGgb39Y66VsWkKpfVJceSM/4CzNlBPVpv72L5J1XMpalAiPU/Dpob +kmgSvwzA8O5q5elDGqv0FE7mWMvGL5ihNetIiIzVlPg46CpZlcf62z/rXy19RUymIFkJ+hhiomKJ +2ORX2GPvYx0jmsybOPIV2VyYDMqN3Z6sOIvqKQ2uDQoyWe7soag3S+ajGAxIkaqrECL0v7G3PN7y +5mqlz1g44e/sCHW/LjAKz4B/RkqT+gTZZRxmzApX+NkB2+12mPEyX80uAgAGsWsBWDUjTJiF1WeF +WDx2yF3uQbsI1oraf50G8msS0khAaASD6L8Frc4dPHL0RLZbXA6t8yFV0cNsOWDTC7X6og7GAewg +fOUMFvwloVMVr5nmyM9UuGO2ZHQipi3G4RLcblxMeJqMrWXEswDytb4QD7Ih75P275oH62BlKDu/ +Xf5oIFuFn+xHbQ/cSfCkozGIY7KYCu/T+mBsTxNl1X7itPArmFuF/87GQAM7NhqZ9kU12gEABUdL +2TrejJXVT8aacIzNMKJqd0ne/NfzrjChGG+OjSTcEKLH8FZIZhktmH/BhWru3/L3ZtlwDMevOoqR +iozNOdwROTjQF6OvzZXxsirCT+sIz8pNgsRyRltyi6axQrg0b5B6yPAB3tez+7H/OUTTII1JCLtH +7nCK4/TJ5K6UqZd8OPuU4JIBG8b/EvaPMpPiT82i3R6j4WLiB9oTrr1Qfs/czn2yk/dxhUvAZ0GT +mfyuWnwY3tzwEBw1ZS5oP4Mql2A6Hmttcs2BuHeN/jOqmMGt1iHXDV1Ll1usW5euT6sPvHVgf9Qr +oQUtdQCpM56mwZqmF8Q2K/n8nlXE3lfOHdSfUBT1XMMQqXCm7ii/IAEbh17xqE7f341T3KAYq5nQ +AQtBvRHhAoAg+wD7xupvPLLrNevBayw91A4NMtAmS+yfsgRwRafn78sJYdfKKkiaLL2KIb8jicKu +Vtf+vVyCwRsDyvA8RORuHRD6yuArooofCkgonz34jQUdHp6RHP/7DhoobRF/5b4X91x3HQWe9QzY +nUzOxITs6FXyG9k6kSiHGqKJwbmyrneFiLkrvlFcUnApuVd8gYFE8mzlb72fKzv1qX7T2RqYaigR +toFkZPI00iV/sUI3iLCyRqH1oRXH0K1fn1hO/tMsNPpzrvUdoiLDRxk09yfutbPaJ7JGXDj8eaWk +vOTzVS065+yrJZ9x1OC7JRjAB2NKslkQCp37o5lXQWkrPSxRiIVlBOmjYYFgvoQwU4TPxJrNspah +OdUl455YKpY9soGEjK6UevEjKfwVEPPTGeMPxUgRUAJxUNS1JIyFpHsq5UehUej6bDIer8+5g1S9 +3ynGT1mFOn4ftQig8dkcvVz00++PAqELVA0zZqpdVEVG7ttzVarmx/I4WGbtJ/gW1R/WdUS/HEEC +jkheJvBRSa/LPa8DnC/UNRIFHUk7Ix/8AIsdmjaRWvfnnsNpAs0YauruhnBMI6p1UaOcPk3Q8ZA7 +YrC5xaA/SaTJr65VnBFhhIyV2kUq7JKZXyWWPkRD1W7igKOIArlaHg49/KbmZppaabJQgi5/6/Q4 +tf0FHQxKiXFZ4zVIpMj6X3eZQDYRYtkYDF3E/IGds2D9sIADJ6dCH/dl0RywZ96EL9s6fCGEGGP7 +iB0D6tiXlHA2v3Do4+mxvpGV9i8i5nDi2whAwnSS4uMfzc1qIcvhOeEg968jqAVSR5U0LDHg3dUW +xYGhTYxgdQVrQzqCj4bT8ogVUcrhBxSbDWzpllGu9D/iwWv45NFJ/WNigbou0/ij1CXmwf1LNU69 +cV/SxFkdu8rgEbKB4k6i1bdGGlSilivTbDCIMQOyoLd1sWwy1q+IIQ4HNO5df/LYwYk6HQR84HXD +4npTirIf5HflkUXCQ/r1uaUsAXpwSSiaNHgUdAOln8Z3Vm5gufKdRbflyULV8Xu+ttbRm5zHqtW5 +tuSaygSKsvkIR+trmf0jnrLHVg8itVQ1sNmOnRX7hmZNyc15Tbk+27VJH9ocPH8kE8Tj4SVAJGFX +LV2k1q4wC4HGtDSWB1PwDAu+SHyaox5CRiZ9SmbyhrMAy6PU8GmueazsmjOO2dVAeNEGZpmWYnmJ +5wxJn6N5xuFpD1zedn4gHAX1PD5N6oGlOWexhUZ6vEnWkD4D+9v0JvNXzT+1ouBXX33vwTGwZmhi +YJNH+9WmUvGU/vOvfOpoGInLTEEwEXCiDDcRuYmumQKHOormRR4soKkCWq/18/GUwza8F1P9c9dG +mIP/TFVcPYR5rYWX+gtsyzBVAPfChYfxs3xeZ5tebp7Bu1+7HHeNxQ1cDvGcwSdBwWLRkgLR+blE +6lzRNzs4eQD+6XOZSSRi9LTgXQ4uX88ql92GQbtO6mhwDsfhObpHkxCXV6NXikjYik+6v+beLy2L +aacfVxQlYzlYPtNn9PGBpImNz7mUrJH5lqOaJBJxRnK+lFW0Wwo969Lb9mdItaZh+ZgGMBJQxbXu +sklg00fwuZBA6e6j/spjwObXnQeiZwTx9rtEOM2M2GTbSRfXhI0OKXGMiCbPubqBF1dtsQi99u7d +Rod+lI3evYKgL9Nbx0olhZS/Vz5q2WEKD8+jEd+J5bpb92lDA38lfemPBNwRDCz959nA/IG0LaZw +LI1dWOqPhnai4ONBJdElV7ufoVRn+FoxofeM5p11igmqigT1acPi3kpQ2xOLIyniWbcriAKuXcmJ +43A+dC34BSRApeCgDpnf8Uk/qLFfzGkDa0PaJyFKjL3XsxU/wM9bXsKRvnZ6z2HIcBT/beUCqZ4N +H3UWiaKw6b/HnaatIS8KiQXC4Di5/KXVAKNZ621OcKMkt+T1kQswU7cmObqaBvb959fWBphDhf6B +96aZVL6HaZQi5MtjbxXA3OQkAGViKUzUfbMv7JViywGVi+mfi5+e7jQg1h+it9pGZVFRac0w3K+q +PYXRhqbnjT0U8zF+mVKMqXhZCf1RV/R3MlJ1TAfFbmf7h5tfBpymSsm+/IG59A0qgLUvKrzAPJxh +hc9i3f+G1NjBfWJtsvGUgenljy7UU/HRZDfb5eUHBFXbpu4RczECuqoHm89LkEGDpEsFLGziOHMM +Wp5EYikH/qczP32k8ccZWX2x8BQCuJHcs8X0/vmxRJb6tHE3Atqy8XB0+0JvDHBR8h7MZ6Js04z+ +EBc83O53uDr09MNTHCVjeniY7amSexRVbZdS+zt3JtElxoyOvYEJsNyJytqX3DQmcXc1I9H9SGsz +ieJzJN9Vn8jUq/fuSZNXyOa42l3o/eSjyuJNxbtmts89oY1CjX55IEQyJlX15O581gtZw5vr/wPF +8kQGmZrRdjZycsp5yxhn4qIP/cMq5IFwuZ/n2OpdYxp2ZVcNBq84XVgz4NRAhAg1s2VDsBkVsM+q +wB3+JuIpWAU//hKgrIHDljwmosswOMl0cuUSgsvD9zugkGVWJY38tVVfnCFtLsc7WCjvkR3knW/U +DVrQodPj4ZVcyH7CsPjqcqM9pyCxV1mzDUsJqjZ6PJ4UBLcOWC1JtKC5kyatD8Rh7Kb0GRI1tI6x +bA7k0OU3cC+VtRiM20w2RgWcfa9Lh7ZM45XguJ7iv/8gDa7AVHythyY/PwbShTqdvsO+qcQE9xRc +xyIRZxb9a7MMcNK6V9H0AETr6sxpPkDODl0ik/JU6cdiCqUXF4VKZObIrR7tGiqbsXfX+/RyuNCL +4FzPj2UmzaaIC+YciAmMFNvl6nIT+CtB9nE5fG3Hrh9yQ88r7SaCHMdbBCYKuMwrGgdfVNVKdGv/ +laTBYPQVKPNuFYBpRTpUPj5pU1PuIE32nvtEtIYItB5KXU+sow8FxfC98r0eFFoimbvI86TeZSGk +lN+zkhH0mchLy1p8HVZyNJs1VDWhNM8Btux5EsRc1fr3N3KLL9cNBCLqKKFSwEX+PnBWod1Jbh8o +rNyawY2MUD2BROVZU4nSiCR9cBX0w/lfESlaHAb9j7w2Vbw4okaBwOXrOGChue3INzljXwBWO8SH +bhiqC3NmjQwZKx1rACWjeJh9/DkFp408/CSXohcricWftCOEmH8cR5RaSv1+BYlSF23cLaIGkEqf +E82DcVoccIQXla0+krxUjdxgt5wQyFm26FbGzpTE0ngUuJB+hZTC6mZ+FQyNRcZ5x1KVEDnwl7iW +uV3ZHUtOkCfm/NBhQC4MA0jypAgKyOOe8uQ74ti2BE/bPHQ4Qdr2R/SMTGeS8AY9nAC0q6+qqJ0X +HVKD8NZeS8/nT66nBksBQoAsF2HhtRhAe4JsmK1czOROIGgfMFB1SfCJt3cB+fRy+FsznWye61/7 +J2FywWqDf6fDx9mB1YgnFjqrQB2NoU2Tblis5s164edkE5kvao9VC7Txv78unco/j7tXb5vqysQz +5W+bVnWeWm6VbM1DHpFP7XJesmav0yCoz3lxB6SIljriVXwFx3YqMMrTAvcYl6QrMNwBVXETWiCy +lVTtLacel8AXYMQpucJ1G+d4/r1yweZFahUeQq4Gw2AHEsYYOLiZt6ZtI6iUPznsztv+4CYopyXQ +uJRbp2GXg1Bvo/kO2CHtPnmUk2kJdNy9HiibteiA9RwZ22hY2O+mlfBU8CMJVEqIO/PS0nUmQZQJ +GNauxgz3bGSPOf+E3Zu6aQDV2V6b36ngVqm3jfDyOjnVvI0tViKP+rzZKhvpyuuAympTQTb9iXzM +XPtRIAw+WlRlfj0u4nsawNFZfpBrdoJhY3cyUEAHt0tBX9OgyQHDrhdIp5yVID4KaEm3qvD/DaZN +osQ1GUuwi0G5x7eQZicSXRY4a1+2D42CMAgLHzjMcTBz8ppC2K+7M3A5TCWlhW/9gWfUrzaKkTXC +uqirKPB3riqALohPU6nHzL30rKCwuPA1RVG0piczQ3QY2UAxDm13a50z/F5KpMk+BDdWf+W2t/LR +tVeOKItcnIV4HcBVCXJ44MMFvBQJgrgdAH/8IZpuaLKqdQTLQY4Pi4cge5w3yzTxRTp7Af4WHPfW +3gR+GUFb46ElC/aWu00WV9A58o4MjEX2XqCBjt+9NmOIeZgipcKh7vmXI7lKcXVws7GtzcQF1I0g +9KOmQSpZtR4VRGpasIaPruVnTxRHlNpTNRPxk5IPPOq0jMM2/6uEF1XzrCs5VVEs3S6+WTbuLgOr +1JriRqVCEwh/3/8/FylFMlD+yaL/oYtkhpCXO/ROXeqR/HrYrHJTmdW/vXgHn0cwSup4Gi6zM+Fl +Cqv2EMLMU6msMp/BkN0SWiOfn8pcRgLsIH666wufdIKdDrFwcxjU3QTeCzZfgW4YR1vIMf9fzWEr +ilPid8ziQqzaaUC6TzxJDV4wPein1h8AhlI1rjl5O7z22zSmEIaWHs9ce/ekWkLO9FaPN5k5Wngq +YcOwYyNQIXBhe2X1PNJ86/vMby4giOHNkhycBIYuHJIsaezVoFR/oTqUezzW4TRsaZIewjIxRZqP +wF+bWFBtJPFRzrBfAMRgijrIQUay5PhW4R8+ce6LCpN45eV5D0RkeR63xfOSngwg4S6pvPWpyzh9 +R7qSqixVRVssBxy8ewfIDgCPvGqyHNgnB0a6rWgXr8xzBQPOVxEFSAsiTpDlsT5uw+5uaxVKeL4q +ukiX+er13DEGIGCz5lSqv7/w7s35/gRDqzGyK3HzuY3MJsoKr+LGqIOmjCAs3LAUljF5k0dXT1Pe +XuNhSeUd9S8M5PqT1WjmWVm1zb25k0b9BDLd/j51k2or7zsM3F3I5vrlm5Dka+zix4A1Sk1oYD98 +1gzhcYwvqotMyp9AEDE4CFZh8dQoljhQZNsFTfnmEkQLY3T6URAmLgkskEPQM8q1ebdYjgMGD+pv +YTf6jpM0XnjMyJIA4KQkTR3IFL8oErl2iaWvH17y8w8i0IncoF3WrO/whetV/vYz3OYrw5N9eR+v +sTUKEFWqejEFObrSUHeKD3qIACGMph8dyPwpiPhFAbICWCokTBbRNVF0hXnyo2L7siINottqEaM6 +eBSK5kU66RsWEl8ekF+VcoFhPNAZDZ4tlJc1z62jJbRvxK4/dwZJ2QiQ2Tnz8eV8l5Jd6pwqxRgR +XE2FCczDN340I30v/8mhvDI9ArAC2BMJBjxN/5zzjW6HyUAPJQ7vEretCiI/HAp6noum7o8m+lRX +SM0YfzD842Wco9DQ6Q8rJnsLs41KooJUMd64HAGwLMLOkY7h+2P0FzR3HYWrO13oVoIiG+DxbqJj +RXQaxNv28QZRvWg86ZDuF2TfiIFETiYIwfIKr9g33hmrQ/ewTP3/Yl8IlxJP+nU+pb6YmTsXs776 +/DkkYLvyij93HDF/84fSGFyTjJ36CAB1ORIemhA0DrjUTTIud1a8p5zGHEiV+xxa5vPfoBcRvTJI +R6iaD5lcztBG/95H6tmeEjRpa1MSAP+p4GOINJNJQfKG/nKsmr2pEj29I7LjXO6BhztUFJm8nY8f +H6D0cRF1ev7WWrnevE+cSsMaTtNE9CdUfqE5m6a+wWagvLjDSI2FfZbBWizhvDw6eSmXe3Kqbpn0 +rK7lKl1EVc3DIoO9J5gYJg1bTadT1ZO09SAoEYW0PMhy3ElRZLVZM6b80ZpFW0iNR81LYBC9sfmf +M2dgHLFz88UI7vbao2G9KeY/GDVNtLAH896lmW5YTEFMlArqXYNu4P1eVvLiDdXri46/8R6BjqsK +sYu+yBl++OEPgVNhe+vkemb9e4MMzuNa4PGDfdSHEbYMzhO3XBaZKatkORuFiAuvVENrxmZZFHoU +3iRnWLTZ8cgmsxev0jSHj6/ni79EWoq04ZT4Zk3vd8qTHeRPoe+fa9ku7Uis/3tzM5NtBSYDFkmx +17JLm3vhl9XyV6VhoaPv7RjqADqZ1HSEVI0u2kugHrTOj6Fr+BXOE2tmV+uLKXf31kTAkNUqRmZb +romSYi2RnqiOR0k9+cQSmifJHqQOeYD4DR3AY7WBkr1fcfehRmpNzDizwSk809cdN5cFnxT6NeZ3 +WqpwzkpnwDEhCijFHqnKeoNHmNtBj5kZSxUFpS30WmjGS7N5VgwOlQNoYNL2hm2bl/4aCknqJvcZ +j1qyH8zW+ymrl30DGzPawZIjUT2Ws03CtrnlOmgPZG0D0HTUy19MRoe5R5Lf5JSp9LWtaF3VN8IA +M2xKXVl2p93kdIClXTM0XBXvegJpNbYulc9yXQDJ9WeNAbGQo3IJ23f8+mQURbGF0Cl9ecRhd7c8 +d/K3cqzoIq1JfgkbSMGdk7khmyw8Vg4iPke8hp/H8HVlgv2/GafxfoXOkrZE5z22XNVXTvLZdWkE +1Eo+DC+iyDzPHdnsMnS+btNgJVmdlFH4a9iD/Q1ZKb+jENYjYjIEfihypM/yL5mulPMMf7sXqshw +R+C32Mrz1AwXIaD993Qe0HaC3qnSx63+mYdmTLi2gzLEmKvAhOIrf2aLnM+nJZWwcyxTt/MyZoDU +kMWSElvPea9eJGz9Sf4l7a+K/fX9goukyi1WI9yhhnu48Y44xhDZcFoX80Z2Z1OO8KTQZ4kfwwx5 +xJb45NvGHmZ+i0vylJ2qj2zU/77PlYvHZLwIrnwSrm87U8YxFtBAMLR6xDZu0iK+h+1QyMj2Xua3 +WI3/Icv2FgWhkbS+l7m8uKI/lq4RNErnacgU2W0UvCOqFgJKLP2Vrc89THni4vYeRgdUBBUmDyXZ +7jpzS3swjiZ/BUP9/sR79xXSkTgDXNJDdkBTfsiJ/TY99gPEZwj14iDOKkk1hnRLMQUgELSAbB6W +UDhEGfvpQRapv21DGMpwM9REawgWB3RLyu8k9rrB7u55CfUosxGAycWUARCMZaoE6cNz3rNO85XA +nZYiBmMRhNEILkWJr+E7OMt4CjoZAAbZBR6rZQtCAllW+QA+NnXkhzxbcFg/uGV78XqcO03hD9CE +o5GTGCD7+LHatc66KB0IC5zhnbM4wExWs7RjLMCrbR55fW3SB07HYqtKB2fy1hpFQVADFRYy/8Yi +2Nrx7NKD5OCIietOGwhiwj1JmXCgDuS95zScTxkeZ1hXXCH8PsaNcAjj29Ih+txB33b0RjRsGfgZ +wRVytaXEJoM/xbBTkn3MtYGeHUKSG7ecoFqwBolBqlQzOrxcgi/lU++Z6kyJAuTBKaH3QVxn+Vst +ml61fyPv8TkbiHl5wXFYYUi4vMgikBI6E9M6Hp3fyDuuWSInJfGfk9ZzjTKtGl/W23BzKk3vjrcw +mt+/GZs5Mw3buQoiiWDZck4VBFwm8MnxFY3bl2dnqnmlzQIbhFc8r59bMHdDLKxSiHhNyTR9yp/v +GwyTWWlahYHULpajxS12NYp7aV5LetHRbxIUk1UDPJbwRkb3gGeaNW9uFLzEtWCwPdxqf7GYe2Rv +Ib3VSoPI+ASmKSKD8uwREV5ODJrr+X7v2hycuI9yA8UTAPnmx1HK+A5teYRfDwto4wsQWYhqCGwE +lmPx0WxinVeIr4IkCr3P7cP/VdxgsufxotCK8M2Sv+c+AnGP6VYlKWK+PombvvN+AGLKmLIbBhoV +uVaSncFmvrfbwI34dPJ+B5tgVtt3ElsZPKx9ORD0FAIviyJmfQRvr5cAjeETRQXCZBacLUrOwceE +maHBhXKkNfFIaKGbL/FRrmTFTwH37nWE40M/V1pelxl8FZ440rXMuAGKXk+0oKqQzf+nLminYFws +VwcWuoXahU2yUoHlT9eCpzAMEZ3g+nvl6YwM2vNof6OiDPyGimj+8Cs9FOS7qHZuGdh056tt3oP6 +IZz/vhnLPpIE4h4QNllTYKfKKvfLE0QbrbUNQRBS7AHR3Q6MuxYTFVIT6xt5vsQv2RGdux/Rp0Iz +3UlCsANO0M3uf3jQSE1Fq9iCK1yBObDG/k40zORhNEFQoH+l+mxvlvu8NchR22YiW/DZV65Uk+lv +KRdEQQkU0NywUQBdYNECzR+6c8GsR/BZrCb1d/bMId4M/zCC2lkAfEo0FnlwM+uvTWmNea36PhBU +Zyw2h4+adeWCcX1vDPfvHpDXT+NQ3QNamxHGC1FjAjhj4p8wQA0Si/XyDHdXejM1RZ5fDwwBLq4S +R9amWRNOSplQxlZy4pcWDo4HewH5XFLDjJ0yicTKDdWXsi+kAAyLrOF8ycTlGR1r4dOF8ahuY7a2 +q4mcL/oNNfcpKJqUVKgW3iFSgCXF5ErAUiVxRD6QWres99L6pTSZKfBE0Ssw6zPPUtIsHnx+zYPl +sWSaAXQmLkY7ybh/ybc4uKpfNsNRvY8f7vwh7ffsaOn1Fp+RTjFA2kiUzY1o39sxN99ahFS96WG2 +T5vL+b2Oylu4BOXsLp/gf6KdUUoTGmFOBPlN3ffkkan95f4Be20ZuDRQhsPNelpeKY8ZzbhDErwF +r+hcVZd0E2AsJh3D9Gw6vUPsO584DFB6NWE0Xj1lFg63pUo4eXMIL5MdscF1Pbv+kGG8cPPfUS2Y +3Z9EzUq+owNA68Eqv/2zm4a8ZRAH7FhBoxH40V6ZbYKL9Lsetxm6h1ff5zuvv8j2R6iHRUl46LeK +jbixGZlfvt0QV9PgvKmiTC7gFA0LaNrL/UXFs/LZ3L5krfBfA7ml5gu9/SkxVSWJ30UWIyKxs9oo +DulfamjqBKKnHcyDi0eL8chiV7sQnndZUdtOVo+MXvRBB4FQpwrUQVRe0UIvY4fIFhLbpRAY9s5K +TqcOfMHTv7VWKfh0dZE84+FCQESNWkWIotnayQFZ/H2qbyfjAtmn1pfY0V8cbpSwfSBZH7mhC9ci +xIdhKIWeCk863aZh4IhFMO6ssImjfC+UkMxdRAcsdSqSkDEmaFpu3kvUO+OoCUeZVwk5aD9o7opS +olIbWiaxivG8K9zpiiUAJaAf/cYUNsyKOZcEUpfECLMa2Ml2U3OP+GMMcS8ZgpOmmGr1ju/aZVBa +b1nKbqBColtK/tMhJtZaNpSAjwUpbqakdqwRdXpfZAA1LA7bk6yXXQxdB5bMxxUJ2ZR4BOzK6KhA +aw6d+ie4wmYTPOg14wpRM3rA3y28GIBza96ax1D1GVNdIpAEkRY2rK5ebc1RWsknud2vInTawwkL +pfX4DPdP6MyJ9q77go6RMQQsxWB0gg8N7+SMwFwWOuRxIo0/wDt88ITBPvjs3AcHlUWVPw1Lxi4P +p88kGj1aJI/Yxuyq5vICWIMPRaGVL6ecHWoUoSm1e8v2pZalHlcTAIppKBV3UyWamy6VNSiXZeMM +yaYQAGBG1F1eXySvWJRa/IXiKtgRIwe6rINoMoMUfHcgyt0Gf+/iC3pyW6kbfZoIXhuvp5cuFOOM +pxIHr8N1tm97bKZ3jxpKlLfVNnnK5Snn6Psy2sqyWkWL04z3tOygr6hinPmbLDAQ5/2dvsOcOu+N +8Bslc7tEI6am3WFHcrNhXxq3Y9iyt+j8RZLe6Eo8Y5VS6t965lTl5+05WD5WjGWs+eOTnI2rIPuc +ZCz6M89WjlxSYZwU7xl5m1TT98/i+sq+3qnLrv59snIl1LG8tZQvk320vOeywwpeJswE8mNhQiSN +HBdELRJamk7A33Z3f/H3Bzixu7wD4mUUjJUy8FqmFUF8iwZx207vN24Ta0WaTioD0OKMqchzYA81 +wfjwDliVY70eErgSUMWcA1S1RtJSgTalDbmbE9aSRbUXmKjYQcNq636/gqtZ+VPa/yEIYEtCJ1Xk +uLAKBAHE11PbZ0NDGqEo3PEb879mJb1ciFMFcazRcnPai1Bnfjso6hBw8OFx/VRJWg9wyTnfKv// +vEqkuKHwTaBYiNyocbRkDUm1DK386M+DCan8kYqkjjSV90+c8TnSZDxEzs2q5IkRZjbBZvmACNpA +NZFomHAQ53uFTLjc9g5sbbZVsr05opYgZHa2qFjdpiJSYiv+7XWqyTMOVMKDi86h/+T1qj1m5XwN +DoARm00WikW1MZyZxPL7ulYL7bCvl9YE1IL27y6V0YTUCUZY4bbuICIE6SsXXR989a0WWxvBfj1y +IIMN9J2w1isk2O4cx/5yJ2RANFi0NBqZRgDQwiEEeVJAt3nKhELkFrME+9ZueNn1MWg4uTTcTltT +87QjFw+AszYcgdjabW6bkGONkiHDpxAFrota88mWKoB1EovPKKoWvk2wdym3pKzURqv/wS7QxNRb +2lDGE3lUpBh8fvlyEOzDu3js1C4ivU6KCh0MDSXp1bFNlCkptlVAmkTc5F2q+MfLFpKiB5/85MqR +RadGp7X7txVoMEPBlLxHfRwF07EIb2ogTpgWxkT/2OKnN+0fSPf3cwJzUSoMMlDcRfhD3uNXWjzs +F++ZEyb/6lNLVhdsa9Y/QlqgPNDN4LJApLFkSv1Wu+j+hUGo0GiB98pi0ks7aV3iNtCDLiUAXEbk +nXeJfUFfw2k+mciQsL8xfvH8B782Cc9/D1oALpspzuSP/4c7RXdrCCB/BFT7WQcgMXm8ciPoH7jP +6nYoIBkUft7J4kzR0YKMYXQLKJkSO7c1viC+2rqp6GH9vyE61Z4qvAxwsSt+oeIfzoWGqF0cMT7R +NFI1Zo/eUAAJqv+U9Z5pFshVoiMyR6Edfl6dFljTs8uKM0A64wKAg7GF21g07b5aGHKe3bKl7TX9 +lHqPTJu8deO969Bl8wxD5L/aL/KchrwQ+WcaSkIWZoJ3x5wThYD9waVe/2l3M46jtIZznoHpZ8WS +CSFpLi7FlLptLaTYS8m7Y5QMZJj/XvsII0UOeVefqDXp07Bs7gQc6lTed5s95Jn76VrMZeeNRWV4 +K/s5LIu+cAe3eGOjrflMxtBa3HADrxSP10TxNejKjwUvC77eagR6n0wCf+qgRSCPuGOsH5iwzMqE +uwYVIAlQ4fdAjablkZWL2tAOtdsuKLdAAmb56QOyjDwCsYDhg8NHSV92gm6kiNJ2hzcsq176uDTw +p0pu6eOKfpMDTxs3dRch484Uzi/L2sPtaL8J/i7U9n+kqu2b3ckkVbDLwZQk6njj7mNdOg9PwKRn +rGIIDukYj/v+U38kcgIOOxaWdZw/UmWN+iCDBde/tyEOfSjqEXz16ezFHT1RaRNPM57UtF5c5zVt +/+TX44oyhmaIKywvjXDXOFqMyW4yPaXO+PZvbmXhXdzYXlIvZgFzXdjDSEuyjDW+uRNI+GdmacRh +tNmbRZ4hcQb49QZQR2Xny/AX4wUfStjLRkyOPBh6k9tLFZc1RPIR7/ryL8Eh2dNJfqAM9DDp0e8m +Qcb4Ynpndobb4rpzxqg/MxQhgnVZtWb/DFqjFbrsEXgA6uXw23aVUclFQLAtvDzE4G8CVLCtpol6 +7sxZV6J2+mOuN9M69EP7alANAuIk9ALoFlyThgj5h5Gqz3Moq/1307hLEg1xPBzpPaiJR4Ep0VZz +Cq4JBnTY2TxqluCvBlAsXE/+SXYuRmeyvKRzINfA0hYVjIOIprTNBhNobzQnQ4lBkEBqi+KRhdkL +XopTmy/hmG2tdqFHj4JwfIo9Nmrri4CuOAOjFTp716BvpbpJd78Z20mhknejQBYuOeW49kkVGmcv +HgoQBcGGZJHYZs11SmFyuITviIT1jkoqMyBI5GI+AGO7VNLo8gA5ya+weARqxWquidYk41MfwXBW +spVZLE5uplGtNidQGDJDuflBGKUwgboQAtllnjyK2qsXbk3dNZItPdAs34evnKWQjqJtQqkPY4+5 +IFve5unscQZJVSpBwA+/v9DrhBEEzRuLBTlPRfzLEZ8hCtm58ZyJrXE3YLXoBjG3QmPSrb3xJTF+ +qhlrRrZ8ezPFl5y2nRd8DfSFfSUovtOYpoi5y6Ha9VppaRSfJjS2sLMOFMZX6JIfJ7rh9p201i0f +c/7gkOWxIcTTPHTZYJ+eiN0mF+XTNsRvfV7+9JQ3wL3A7bax5nWrDP+ByC2XJxqms4gWhLFtgdc3 +bq35nINTaN/BfgNUi2FSQ40ltfVFotybf7yUdBNY5DisPKloAJmG9bfIXT6FvARaF4cWhPoDf8mc +UfFXM+f7TgnAnhYPWoHGy2pmPXllXL2ahhVZXjl68nXggUs1RNhu1VIkqfNhGOekTKqcL9500UjF +6VlwbJshQjYUams3jGRTs6cJkA+N1vBHIVODtwAxGibxzFNrqkqlZuOHkGcSZyympCodfyKk0ezK +YMb8u3qOqO7dgFWwxt6WKY2cQRa0OmVENFZs1dvvXMvUJh1XibKFIbpB+hZbFHhRYdvPCa5XFnmf +rYAwc0cPmKm805A5KFFQZUy41KB2+PWSBAmDLc43Sj/IjP48ziOa4/CJpIclkRdunQcP02jIZAWr +jVOOKNp1RXuvtDOZ7xzKc3g2E69W54YmQzDS2oIfIke2k+XhZQqggIPk8azMcMW3bBYmmQMHAUsu +4xoaoJM0ODOLVjAA6gkEppJ7Bxl5uLIqJf+9yvWK0SgrQqWyz1KdmCFvy/IrxeFEhSa0aEnorgv6 +xeYFfX6tvovWGrKdFZnb8KPECjr18tlAsNhePZwkNzqAmGoUgWknkTOSJyNqxN/2EG2Uzz1ywCMh +Fdu2e+MAbf5etxBk5VG7czUkAxV938/LAAGlzDX8EGk+N6YIE27fV9qJxvApdchzhM6p/c34Myn2 +CrxSJf6OSNDI+hgsSuhp9NdoArOo3upHthRGai0UGQurOL0owcchFMt78b2CwdxLH9vIa75nFB2+ +2KrPHDZivsNUsMDYuum/ztbvp3ad4JdYMDtoqlfdy2v1XPM/Xvn2vmT/rBbEvckXiwOBMlqRcDDA +ILBrdTayNMRniDsPi5xz2ffjATuA+nIj1ee2ROeBOJ0RipnxFudjGyTExyYsToz+RjLEx46yqVJv +V99kZtd9QGpEY6L1YpvXgumT8ldHThrouaSGBFA7cG7UgyLq5py1XyjWr/ZLFainmYqubRFmi4X8 +UNnqv+y3BQBidNeVlQque2MPEej8JR+5g88nS64U0pk0bIkOkZt72CNkdQJK34wCHdxDxxQ1kryW +tfTdJ+zi/cKyTpy72iECnopgEEWJM/+DGYWGZtOxkncwqn35NPI7HVPQxDV9+3Ty4ZJX4LPpnUgk +YRxmWvSyd4uSw/rWWetsy4DspHDHdAIdMmTB+gPpTHB7AuLPvTr+5Eg47ucN172wTVT42HfBN3wd +MwiEidlVN9sQ6bPa2r0xaUj13l+hd3L6A9pLrx4xRyDeEnIPdRV/qY9/9cfzw50ZULv7XSADTwTC +/CX6dWecUBhoT5MacC8hVCYFFtUjrTXiGUL6zbGqCiPPiIfOWQbp19Fnp6bxsQc8SvO+Z67w899u +Fl++c5Mhn3kGaAA3XpyJuz6YjAexEe2AI49sVIn9Nn59TE4EwSSK3uIvEoLEC7eE0beeYx0wnvra +WbkOROs4HjYwLruKzFU2IBJt1saLHHtc1y0Vv4Pc+2o+iv2lRd3w9rZl/ztfg/zbhhkKec8Z3M0K +1N7+U6A65agnIXIXU6q5SzvFYXBGdJSXttxMiRpu/vlL2nKpUGVz7P+sLiQ4gQB2BH3sx38n0MJe +NUSJAoQunKPII7fRI7o2sf2RtlLyUKqsyLXsMwA+hiQuRAtsWpm6BzwYxk69VrGC4vOSY6Dq9VY4 +xodHw/VYo1g8Ov0pXIQLjOqgZG+N42fbLGijhclvevuSwi70Ha1KnAr7pIVMWs4JLTqKug73BTYe +6+6WfZEIjAHw1BZkpvnN9hMn1TQPhq7v/8Jo4swfCoF6o8P6mwb7YjsGdhrgyFILHGGPh2Bc7TSL +xpBo/nuGdNl0ol0kPUnLBrhQLmRWaxTynE1a2CP4gCE2QEEQb9OT3C5vBdCDb3JsHioOao1h0TV4 +uZQgfJvNvds4e9AioxP+PZWcZlMf9GQ8EPhC4Rc0cQjwt4gIyc7syscWSuyQW93a5PDyOLsxLz7N +9UV5ixp207zoKyMfhOMtng5TZ2bz7FWjUxSyQguF6Tyln35LzxztIvrsA45oCWg4RoIJmbqK74WI +s3LZ+265mKkXLfU1jBI7V4fOIWsNar2AqHsb7JWk/U82xDAaDJsCJ+GKe3ZlabNzI9u+C56gFAEz +PivLlhbaDOMNRxp/njJFpWPjtSCmPRs8DlIbagatkQGQaJQeRJ9CksOiiZIs3ilYRfbpYbSM4knY +dQzuDCCwXgxhWY4UCqazMfOLgvscO9JruASKqLTl8tz+GfuQ02LVxlWzN6s8TANDnSsuoo0hpIGV +PvhaWZ2pUMzn8EnMNG14p4Y36v3JUxohc0SRgs0iq2uVtZ/527Z1tu5KaJNCyFM/gS/6IhcE+D0H +wvFzuaZ/2Tg9kCv3sVTYkjr/T0fSABOCHhEK0FDBRhFBFbqTesVWhMH5A019yM2mD9FzEavWopjj +FwE1HbGQP2RCduW8ilCd5SMrTJn4MArgBTqiV8es4T162GkyKR71ufPI6uQrnZvA1XxwUDO6Hj3U +IiGl3h2w/NigVaRDJuBJ8th+TCJD1V8YWcZPNrmheHgZEnUNDqsMCXTvNF+f7+oCmelkOBSyF1/y +LXV7O3a2kCDO8PWW4Trob2Nv/G4gbO5evXMXMgbdUXx7+3QjMhRzuL36vGW343ccpzjd34cbVWwc +7Y9+neU40Zct1QaULwdeiJuFu4nwrXXKF/aEt97JOllte2LJ10rCm0R2QDhery6H+TAb8aAx8Kp5 +3YyBrGWvhPIMta3ggqtWBiKoTfdqdp7zFgSiQXECv71yy1i/w/R52GTQbuDqYpQBjCZ0KO/xqwNr +JUwfXC4V/R748+GMjkOx9VQnKsYAPv6Q2Mu2LMvPFj9r9FLs82xHDdif33t8+VVpYpQnZ31OX4s9 +JxLlkLUVDyNMzvzViGdRSL1iKRWUODtfA+bcE+AiMZUnrmu3jn9qi4CQgDZm5VzNeLOXD5tNCOYn +UyvLuzoy4hVgpW8se3MN1s8Ox0JjfAc7X6LYxSd2CXWZD8uP7DnjZo0KIutGG2lXNz3odQArFdTK +RPZyvDRlQmyzxGDuDWxXvPmV8lzTLqHo+qwj++wkMq/Z0dpY9GQPkI51nWv9jTfjm0KkvXKAiQGB +USKj+Xq3J/jX/G7bnwsj2ngnsRcKZVj2yhhelHXsjdo8xcIjY0cuq5TnBMPOl7lFZS8SApK5Ah65 +CuD0RpWRR5eQgDhEZtHqFNAXwd3NUi21ofpY5zqX84CsO7W05EoL4iBOOA0pZwDs3Qf+Dwmoz5mp +KBeWS4xTCBh5IRUSMbLbFREUEIWeml0Ho93onJQbMUkgm35iBc43QdI1c4csO7tnWma0vUy8ndd5 +xFW94u9HMjqKlcnZb++V9a7eKVuSuX60HYdlsYMfOM4tLE6HeX1xn0XYLD+surTeBmA1eftGSAII +qJ8yFNEwBiIhQf+Shsdd9+4nK0uz4V7fTQS6hDkO8QXggaqtHuzWFTQiK4QJPXqSRChmPq1a2QRy +odc5uW3rB2qqK2XsOcaLEXFSRKEfG6e66TkUMMoeufehjVcbRZyanfB9avVHnR1PLxX0aGpm2g9d +m4uazOgkoc0EWA/kP5f5MYgUiDr7MNJA8GLMY6Xs4OvWfK5eNtC9xLw4yr2gp57AU75Gjx59WEQS +jGpT58uP+mghbCIC1YmabLYdq9f2lTXEGKtkPDXiwgbMlZX6Ec6aNKit2rTsApKjyDTzg0voQMGc +kGp1O0bysLL265NeeHut3rODprDTJuBdqrV6EFSHT8PtVU56Faw/+CGDTCskRG+Dny7qVHPWHUg7 +zSaZz/nlFyQPEd02Brj0NQT47WkUQcBF7b+6KAw/31JwPk3iClRNpF1PAyAXLc8MgkJ178hI5p9M +IZLn26I33bkI2KPUhnWw7keIpL7gWfYx8daGSOVq1LUaT6pv39PNGxqO+qZSJ5O8WatQ62mKj3iH +AMTfny/lBAdBJk1wKJvFTkkyT/wVEscayD8h1DpbBC1HX8u7+TGWrb900t2cDYSOYLzfzU4h3D0f +pzo1srCtjKrAaqkMhYiKBup83KOqTA4gop9ftJWQPM0LQoLwicGSxV8yvUzAzz3h23uE+cKPYgma +52iO2rM0H7LeB9atX6E2fI3A3+EM8KJZswtT7x8OtEq74OHbfOnoLi98s3P0RLZYMI+ApMTf1b69 +KkfHnyq1c7iBBLl2i4ymkeiT8YTTyIQODwaSJIsEUdbmcpM6xMZitGh9kr75gIommF9pNhO/RuQz +De2d3UzZNsiB9ILMaQ20pnZznfTpFFiepW1V7YoRbyW2kqqELVQLx9XVRdWoLeYaqUrxGphaOHiZ +BGMVGTfiJ0KjHILLxDcZy1a7hLXu4rT1PSzRsM4QhqLJB+XnidZJxCIQVBafh5TpgWdHx1tEwCsl +iD4s1kYSliRSIr2wJOEAwLXJgPqPLCOIkNtOXHbLtpGXwNRwrV7Df2uqrPK4l8XWR6zNn804x4Vp +vupDMT7gmAIPShUdlOs03mXfEQ3w3wQQgVQ3u6FOcjEPbU+hobML0+B2bdTHcUG5TQGdXARBcIcH +CdgVP0S3Ax4ydk0M9CDAhv7pQYCGwbRD8Z8naaIVMGpPAV7yeEylQly2wMIzW0+PZR22ZcnMBSzy +NR5v1XtRf3AM37Y9TF/z2JU9zGGH069Yu0WUtj7oZPtuo9rwyGLrgXE1fdch1p6kgswykQSiKpDA +F1YzguBsExCXWB7qR++ZxddMTIHPQdW4d4WAOMohx8OB+GXMJXudKFHmwhUPbT9LSOcHpjEuDP65 +XoI4X4Oz8RIWw5liHy3KVHmg3o0JXiaAkLlKHHg5+Tct/bwqg+8uh91sQCPnrM5B+WNEmxCSBkF7 +55jvU+HOraXPmxeNGkbIGDPNGqjWWVsDMi/jWlo3UWjxmRouN5XfkKtKr3lAPFGxC/AYk4OPf9QO +dBwmIyTIFNqEX4DQuX3XUolQnr5zyQpy9CiA5rtuCco3cexQ0rhSNJQeFQjVRumN7I8of22p7HFX +gGuTbkEUpBVS2FnUQZq/g+gwf/Lx7FaCopb3/i6DrfC3wqdE4eu5RodAGww3Jc+KTNSInwKSxOoS +DGTqfpHcUDyiykrJSVrV2C+nQFNQZWzVYotragA4RLAhooefupaISNIMMFTc8bl8zUdSKphgOeQx +6s0onWPMc1yYM8IiBfblHIip872iw7sR8I7qN8A3oEjIzXhb6CdozsULgbgmoRBPt+skwFRF5cr7 +2gzUJKSfKOrCWEujoB6frh4nvm4uPmV2nC0nu7GKTBjNJWZLlD4zMJzcs/uwDzMdAayZ1oJ4teGJ +Ha3zNpa0ZYtxLDhE56sfI4w2v/EiEXf0MBppp4p7ybzk+hjifO9i6mgrBcfZP5YUYBYtUItzY6bW +ulFO1pKcTG134bO1hMCsUUiav4tEx7R/uF28WebgCKi2nHZSnPPC28RSRwZ4U7V6ueTvw7gTz0z0 +R4es8+cB2WYcpKOW8Mra7rogdrqGqFgA6COHbbNyhw/4u3DpGNpWNykGMvMCBpJ1rK/02UctOdr4 +w6pEgOiQL1/ZhNAqKDBl2QWWv3ggJdIxzt45Myq/YE1ktze9kPgmRufebCkKKVWcb9aok3Nofvu3 +3o0bdkvRCynWcw6GYKNWNHxbyR0f3xKClMAss90M89AogzbUc+CCyT3NodChpKUbgSU4Gxaa0RS8 +8AoakO4sQqBghDn15AOtDxPbiTSfnsugYCKJH29/E862XsK1w2TxT0XlvjTB9dfpGs/mh1YeZhDq +b9uzOQ4YXqx3y5X6itevp7qXy0h82D9w3lzjo7YH4iNEx6fbTTlbz1wAIeutnSJGbtqHMIe6ODHZ +yPicp4dVTr6TfMuN/yAXV5DqtI67oGEjHoAo63nw+YaB/POWkJHou5ALnNGShfByX2XdN8aY7rHd +bV+aNzTX4/quVcPWcv0WCkTy7kRb++siurvJomHFj+DmzOGuPDJbbKw7QsN1/CvgCbTk9xOlpPYl +xzFb61GF2kKCz5ENZDiEq8ekB3rOVOE/aeVeDi9hmKXf8vduym80BOxznONke8ojxNL3wmLtqrq7 +W3rV5KQyg5xR3I2TtczQ0cDFsqblcd3tLAB8w1BH2bBagfK/TOPCcgz7MwMm9lWSsBt7IQjCKgtM +Fjswhh+zJ7Ls677NJOArUIr/grNSvV2v5Bpk1EvcqBDp13F+aCVxTCExaXeMtQCrXDqTWDQq2wP9 +EexO4lp68ua1sMRQlwwg9k05MQ9z/8TPU6Dco3Ghf1y5H1pHEDNA2KFxU5w9zDJKkdZy6nQL9Tf7 +cdNQ84ARKa1ptf6B2s/OLMYF7w70d6Boa3w95bWCLxQxN5LOhnItSNCVgA567JFyrkiFTTNso8y5 +iQ2xdiXPl2uwa8Tf3YHwm3LW4zvsNC949QXKPnxiXEwXKnUGSqIJl6YoxVuBa+cBZSD9i8WAsKm9 +wyOxc/UDb2fz+3qdyijzN4Y1wecvCR+8Xfp3dxU6vy3U2InknVSaD8Ck5b9BXMY0MWxQ9CqjUC8j +SazvbxAh1BQNtM1V8t0wCeBjeGT6NXEr5pyWxYGqLqPx+q3lM8fNl44uRCpr3EIKz61eoIvMiP7t +wFSynkk1UyOYxDCVpdJK8mNRwi0d8fYPCAF3PrJi0xmqFeNeggc/y29ayL6VcsyBjmjR3e6K4Bgz +Kj6lyLKmmwBMf6DSl40dUMcNS2RC0MIcCfNDnIM8DkvTCa5BnUtDGzXzJlQNuymj0h/Q1iA/wUYD +rJH/Jp3hYKMkKclCAfa7rLupGJgDOJGcfHYp3z4QPqz+UhQaTWQmBevJ0Q7jzPpHCgTf/3rrHIVm +XRQcYgRKJrC6UAQcCLX69W/gCPT5/PEbj+LlbxbjP8ZYLTIt1hfESpGC/BZsfJWvSULs4RIKuazk +M9uRMj1ElGIYEIxV02E0EIVQx9Kydn58am7sjtJLI+eUgi9gA03sdiu5ui7Oi14X8cKfE+/9eSzQ +k5fqos37ou7rU/oZ53hz6BzdiG1rMnmSOIym5WXwciub0L8IzhWG8dKQckk5kHmEVBe0MTs7rHVN +CEhqNbDx0umltaO4AbTE3lJJW48d4w6xxsfcR5lSqHdkVDJ3YxoI8OZpVfXgjRVgObasKuMgbVCn +O9AoEZz39CbpkwrkIe3vGpwgLB7OKfjx1wY0DmalH83IYwepW7Bzg1SfXFtY/HjqkAHs30Jkwyii +qYFgrDFQlIhtHHvWik+ia/rm+irbsXarDJORmaeuGreGxo6biOlZ9E9SDRtg7rPmu/QxwiU/qdq4 +R7iO8gALpx2d69qdOXOOFsFqfaqkxpxHK8VZ20T5ALiQOZDXTQn/H3svcD1nxgQa/VIqG4d5A5Xv +mIPBayEm/Cy3HVArlLxlbwY34spkBL+aIid0NlSzwAYFcqcGPQfrMv2NtgcTuLCH3Qabiktrw4p5 +DnL+rJ0Auc9GHlttSLEjq3q+2zmcuUsKNj7zwqi6AlcP2062BUvyX+kfckT4OyE06QLZBaxjOguy +lnmn+KeVwE/LsQPL2RA5jnK0h2ld4vCJ3wzAw1wdE/ZZT2O76ebWJpOl8qFjBc3ifMg2XIPwqHnJ +Z+3byzt5qYyJhGzdm457hAKEcoqoqIMgS0ip4aMH1Wz8mp8yVpCtlJvxd9ZuDTheh7b4ZBBOGplc +R2nixCjXrNNvdY5fqKMxiGmEynG0k3Irp9jMAr2S7F6vI9qBf4oGi4odUcQDiv9wCFlaOJUqKhZd +wvTKwgedsPmhV2inBdEXdkqY5v0WN4Ea7rCKtlHcqvlJH15Ti0ECVTww952NxkO9nOv8s5RzsHs9 +xrlmwm+7Yyx4rS3ufMd+L8PXGdTSWVvfihF9Hb13YF72IVwTRc/ZLmok6L4U31eUDaL19qI/kiH2 +GouqaI87CoxLnp0KOQOn3LWSXeHLns6ph+2o5XnvKD3pgU31oZ7OX1tNF+siwDSMPTi+XPpgteNu +boIs2+fNOSKeS8TYm2lrRBMVT61GfA85EhjdH76k7+72vgZb9RZX6L3l1V58XEFwS8PCV+1DABM8 +OCCBPs1CYqGP9IKgHGGs40cME4YxZ4yBjKBWi4jYJ++cvSWHyKTg8vKRU6iRjf7dVCQ4lqSRp9le +81ojq8BksNGHymYvAf9f3ED8Pi7YHL2bgq953uxravura9HXwbHyz0VZg/Kyb9mNqdHzvOWryGH+ +Q9Wzivoozo4l1UEgt6mselfFmFuZvfOE0OHVMp8jFwvCEEcPG/TUFEjGt0xeibgsY6ixEvhHPFDD +uribuyw48lMDmXTRPhM/yGQDz2mXzo1yikdd9N3hEtHQq+fJ5dpq29wxAygw3+Rz3hgkwViUvyFx +bEbTofKZDq4C2LH+K4aCBVoEL9okekJyYqf+FwE0JvcyvSQmkEMcKxRm/BS+Cqq7Z3vLp5/c6WvH +xis4OTsCsOD9I2R690MrUlrPqsJ7bEZsZLtLtm4PQk3YnKIG3mF6hF0G4wGVoZTDB52/TJo6uQ/6 +jF8X8rzGFGD1cB+SD9Lvg+QtbVPzxX5G/j8eAG5Fk0KZdPZYD05OCQgyDMkpwwaViRvYGd7EFzBJ +ajjFcJERtlv+NcvVxt5b7NgCpOd8JenEZ8VcmpZfK8hRphqY/Utc3tOKrrkciYZohXsXc0sV/p5Q +LxHf1MaHe0jD5yAQVH6NAVea5N0yE3JaWB48y7wFS/NUv3dK2+03Fr/SDQwGVpz0byqHT/l7qWdw +HoK5/yJQXfdsz2fwhLVwyu4SC7DZMDNvvD2HSiGdohnrLJUks7KrM+mFb/FTS0uVR0tYZ8wUHLCk +K1NuMCRM9bIb68eYl6faDU654vn+BhQszvS1SuLmwRly7nGbbVIKn7AD36sri5NWVMh6YHL36/k0 +gTDAawJOWlShDjqkl2ia02AzU4vrKKDeSISk9BtkyVIXYxfHJX8YNyzSVDOsbnLjVv5Ine1UxO/4 +UoYJUBu71g+7LoO4FnjlFhVQGyaEOOtF9WOBOCbTzavKvstzvewtEytWJfYPtOm/cSn8/v0WzChI +VUpSzUOPmBvBLgyaHIMPjOkehbtDoOLwUQbvr+uSkUnPUNbe+tWYSlbTq/ArukrWz1FXh8cTSp1R +ILGLze14vFxbqi+pknEwF9i+KUp5gpdimdL0ExjXjyew82d4EHo6yQYNogOhCmj0N4gNMUWb6Hwa +/s+9OZ6XxEiQyRaiSl5e9TZed+z/Hmjtiu9UeuM5liL2HeTAqVs7fxwEyCYviQGCXWl0BqWJyp0E +cibTBJl+3PPhH56EtyhzgOzwDXPLkzmHkfdJUt1aGhz0+9dbldZzUUdFSNyZi403LuvN90wNbl5f +e4FthMUEX6lUm4rs0rHhf8sD20l2ikO4l6S2C9TD5vfqdwcEnmVOB91JrfM/J3hK4fGjPF8124Wb +5pcqb3LrSD+dRYKbjXmnNlBnuJP4rwX+/Y42CtJfXgRXuo9qEcjGP7FVdtZ+4w6u27fGzxLGsPDN +5i8Iv2fW791v5GnFw6zxSjWzn8B/ynmY2YH+pxuxaK2m97bo58inQtXFuE1Wn82ohubu8/trN3fc +jBFaqswtHm3BG0CNCrStaQfGBudAfHK2r2ePZEateVlB3S/5jiyz/41WeX2UuNQPVZ5MLR+etyB5 +dB1V9UnQQm1hKT0v3gAz0iy2+EpPTZeriGkSdgBDlRDQ59Ru2+mdjRvWLEMHNeIu/n0nOY4jxtAS +50aQrnT+AkLeYTaUU1GR9rFxE3yjG7PVhXxwf6smkj6f9guCLi8KQXnvoOz2n6wm1wMasS1cfeUN +vQ+nHrC1N5ek3fatzFyItzyAs8l2sfu9IRT/SV6Frxcu6Mw6mNIUsCc2WP5g+VPRsA5YGCZoT+Ws +Ca/iQdnQH4ftkKJwrcCQQB5c0i3+liUNwmkyQ6ULqZsQOsnQ1jPCx0khW89tvn+aYmOkIfch4rKD +H87dY6OZAjZjb5Bw80WAZnCekCeo8MvqnuHFR8+Xs21osurtvUtEoSEzu3gbJ989f1zM2RxOicVu +krAoaRJ3QON1qD47BfLH5jkGZMgYYzM+tvKs7IqXdzWcLx20EoeLPT4IsQ+km5RcoSOMkFcFPumt +LLseV6n4DFCppufDZtJs90s/+ZOViAQ/wG/ph5Y2hZH+DnX7jz7bloXgiD+XOiJbLytX45DFd3BN +a6QXCZOYmqGuOEoz/kbamLsNhFJHIwcyIf2ROiI/Ld+s/pURhxwnru8nYEkBTwGkTWGry8qPvZ9F +9ApnjmjxqB5ToYfnMu1cPY7nj98sonQ3cEE4oX6fiiOi1IvDYtFRy8D43xxVknLXtgEM1O0wetH8 +B1r64m3Z+Cnmd7wU6wmjVxKAPVks1IT+Lk+Jj/sZslvxXdFe/11YwN1ODRgsV7MoKfMOOIE4LckJ +PpED8DGmU3MG9YQU5si9sss96YUPw+HOicwZXVW9oD2yjfQIIp+/96uowDxmzIK8gK0CeSD3WdVt +Cin/BLziCoYrRLQkc7lrq4jFKD1bqi9hRdl1Zbejr8L6L3q6By+90SHoLJeDgeOp1P+fbcmHAt9B +lGHLfSFE3zsCeIpbqW/US8GVXXQKKh46B4YDBU/BEIZuyHwuheKHiZ5B+7ydm5EuqaYjtc0ZoheT +I9u1Xu2nCDunDGRrSRJslnPkQUkTYCdLIPluK/UVnT24h6ApVkcJFOrPWxAEKY/gDUkG7Pq3A4ol +zKQ7h8pXnsqg38f/5EL4XRdew4NTaSF30eCrhi2ZDTWMK6rmq3QS3nA1IhI9OkEGog6JZMXS9UOA +BnHrQrJ/l8rD95E0DtgVijsmT2Z8Z2zroBFpZ8w3rmcLx7SFTpqmJELNL3Z3lgU74cH2hR94slKa +MaHlDoZbaJAaeJnw5usPfg/ayBgbA94EfeKfMO6nGsXhGJiBa8jQIjIlgU4kdgkYAzIT1aDZbq/y +VMrqZfI1MoCeLna8kuMiW/lSQ+NMzpNY/+dTYYz60C3zJElIHf2ueldCPdPHcKs6cXFUIKsFEyTX +6LWRAn5aIjVmOv0I3fz5q+da/8fdGTTVu0bg/bhna+ArWu6m/sdYvGquHxudy5eZma0DboyFnbRH +7TROXXxu9oRx58nCqWFZqa1MJeI0Wh4eyYMrihQBErqZQsbDAgUvkTW6Jsz3HhgDmsUQkx02rf+z +AhA0/7/nFfVe4muXB1SJZP6Q7Ca7xzyZGvySosxWLIDlDYNPqkUU2Ht7M9ZWVb1KZ9SXoSOwXJ/S +LWauAnQCNBHS9C7SWynPLlgFOHZd2PHGEC2jm87mur1pVVMAfzgHpHDt+k6jZsRaSNVdjuYX8osi +01hTFVRT2j6lGx72Qq2Wz1C20/6RtAE1ntvykx8j/4OrltYM9v6VqPXdThY8+wjP5Ib68hI8WcAy +zK9AXvWc3BboJkgXWHGll0vVqDL1sESrpSVY4SKFf4Tbe3xRcwECo2pgIgOyYxJ8l90DD8K81eQo +fxdQEVRc8LtqHuGDNxJn+zwAyU/uJPBlQWQHDnRohEXSoUK4r2uA5lz1rntTutsBiUFkVrCjhioY +/nnZ1iTl60p7X4RlGvz2H2qZIazw95YMYADoicmmn8/+09GCr7glSwX4dOnX1BF3MeRTGHpFrkMR +Vl3MtAxa7t3FYQrHx37Potq8LuzGSZaIisZLPtRcThR0suPxRcsVdZWNK6SDDe8qfrp5RpkjCVsI +3TBLlnOW0O1xnlCbNFX/ENHnkkJYisguzG+3Kc9mXmhjXhxoGC0DBvy312Xfw9p8RKn405Jz9Opt +Az6Uy4f0Ibh0ZGVAahQQX77tm3uBb4y+MbTbcVGfncbMCpqGHB99aOp7eEN3XddV81wq2XZ7Si1u +gnL+Rhmt5tPIVBTdtd3ahzyuixnOcJrKfykVheQknT9rMQF4L7/gGHawwpB7Ko9SJZ+qZ74riVAd +M0GwLhkkBhzAf7ml2vt4LZay9PWkim6tNA/D0R8FDp+2wkTHBchIeFp8gCscLSWRgLhPvr89Gemz +S8nwTmiF0r/l+J0PHYO+GdmbS8m3Dlpi3rDG5g+4QjF/1hSPiTNU+Qhje1rH1RPleEnFgZP1er37 +1CbLRv7e9xcOg10+DzjjmSfN7bk8Fkb3+7fQzwR8era2Yom98YpWypWpWPQ6LCp+IBQ0wrbMwfVs +N2XzvQZjk8zveZkBgvnMqpicuCjnaKAeSG8ngehp/vphRCSzTx3Kir0Be25LluQJcw57kHW/Wa+n +zldk9LCUPas2CSj5/d0QIanKnm0ve2I5p6+ZxXtp+uUCyYOEonSIpWFCGl+fLX+WjeOALe0Mqvhx +glX/kIiXOBzHXb5KKQ4xF9giEeuMpKjOMYqFnPnDutvPRbl8PfkTx6NBF4h0JKDLK09zVBIjzH+R +NG1OU4jcPhCZWP+c4UAPOJd/flksOCHhJRnKUi5pmWwJGi6YU8dkHa2FqcnsyrUfcDs2AG240Yeu +zB2BgKqtSbF+K17VEuvw4AMG16Cz/RXN5ePxpSNJIXDHhL6zuWmkD+YYEHssPksKIrk6laRdISCA +cRdZTQSsy8R3ab1cAl6fqhfGtiqYf9t1cBbTbJQJ6n0NO6W2QFNXtlNP9TAxhhtYEItF9Jyd5Csz +0u1HFTweyH0HISEGehne3J6UNr3EYgHi20fLcuxkwG3yCdngoR0PsLmJDkBLt9ClEBb02GwqC1oF +Kkl7KVVnkeDOPKjq6gz4FLw86yUxPjK1FfetRnNRmYZ0Uhc01ySSGDHapyZve0uhRFAV6lYVGnDo +qXy8z2zr21VJMha4/23JBZfWrnKQhARFEPGBtFOEv1wTisjVZAtAJA+MOviKQron2LVoXIBJjXe9 +NOwgvcf3Fl1AN+r7nXVDT6LKE3D15d72H6A/Ahjmka7olRhCwNqHKzcY/u40+zcjZtI1U3bQeB87 +OB6077tE6WZxJy478IYitoskBVa+yd0BFwNNZZV9a1p5/4Sct6+b4RetM7F3Xw4CVy3tlT4+RJ67 +88fFkCSXwrVY+Of0y5hJxkWOOGkRoOp/jO8/o92D1/KKbSZ1bVvk/v2gSHdb2dJ2yVgjF0ddm5v6 +zfnA6+crlHvdSM/7yRQar4cFrW9WI/KMvedxM2hw+KELpJJ3kXiiJnAAFgrsatFNAp9gwDUiVw+S +X17hJ5y7GW+JUK/f0uZxwgB5sN5pc1/SpDMqhmLlNeENpSPNLcf2OYfHblMcLnU5G9Q/NufDoPRf +D5SnNpXPq07aGkUVdF15a7YVLBgeU1D53ba6NJXBnEUXJSt/XiJ5xtjLT5BY5wvmPYFbO4dcsK0x +iigRZsjYvTXkxu3XnG1IYVnOOOnOTFYHXrxA0Oui50xsRExENy+lu5Lex0V90ujyIuxHUqcwS/XR +FWcReTtGUwp8PRGZQKWy1OF5WlwkOy9rECHbVrWA+eQQnD234cta1Hhcu8+GlIf2GVODNQVlpYDe +ZtN26Q9T6M+ccz61YgY9fzf9meGn12ie9I2S3S32Kd4hhQydbc+v6sDAiRkAsX+BM+cadwwBtYf2 +eQKY0VKwaCHG4Zpzo9d0dRCll5vJrpN+i6KKYvWUwpb+2FOh7uGNGTgHoAmtCjcvf9J6shmznvym +ZVKRmho6M5hjD8ezQiRRg7vbr51hqWTmUM/lyvny9t69tGURHrYBRnysTr2FYTeugDmuHs6iNs5t +otqgCMpFRyA/h6lVkQGWWs82Oga1UakCn/tkRBf1F0f7rda0P+bU7rrD9xJO9a6NvmO2vFLKzQ4D +5N6YjVN0zuI5yQE+GYtuM26CVF6PrSzxxJnem4+GTOR4EYHEMFNGPKuT/OuDrnwFLFYwLVuqBKWK +MehR3pG9BhKWadL7KDprhT3QgUH4OkB/jDPPuXPVMHLDej79be8QUZRUFZfK25IxYbg7VGE6S7m2 +AKRGCmYt3lRdAA5twbMMasZSF54xMbs3MjzxLpFam9TpDKu7BzQEw3bgTEyx63bKhgGVpIm+Hs9e +ZfpmuqePPkwasSznGLf1VKZT3e3kzp03ZTWTQHzSTiPzwkPZjyIA+dd7UU62UTwWJKQzaq+Qf0jn +0MkkA8icFDHle3CUxpc1wE/YyV8UesMsXfZ4EGlhOpqdJZXH7Xy7TVcfHbNNXwvz0BFyW4ppWmo1 +PF8yl9sHekcHSBfAhPyIT4fbSdzA23vncemYaaSnj60I1VhQcUZwl/1CxvJX1hMnP2Ke1HRfn5AN +5d8Lmk5OgK6JxhPbJR7OIxNPSUqCST+GZWOrx6Xse+6wD8f/xniCSiFuX/JpRAnxQJIWRXjoYuDs +jvE9Zex1iqSkViWHlse3aICREDBVAmadswC3PrjuYJoyMq0Gt6VCBFhtzWn7Rcb7OsmYhnjwuANV +PYjZPjv23NUEX/MG1egqMkyh/aWTzI9UOBfUTpGB/ZITtMcrFHeTwN0YruHYOFgU/i2oJX5oWWNZ +ZcHUKeGVagvKcEUImJjEdrGXUvErCuO59gJYSaQ2vR4l46uO1W9hFrryP413cwXt9yFNEENftX7z +3/bhcb+OupY1pSMlt44yVTzbpFlhZKix0aEDP6d/uNXRsCgLN4k3MvOepbnteyrkyq4dQk8Lzxbu +aPMEulk+j4MnkbkeP9B1RspQwPw+oNNnaBC38Y7ZA5jVbup5kN7stvnEZ7lZ6d/0HYVdj6lgu9ko +s2pFEccO7UntkjYjvgPzi2O5td9z7b6p/XBMBBf8mNAotTzGfF4KWG2fE2+eyMjl6+S2q2UKiZ85 +QO7vK1pC+CzKbxmyH99dnjOi2bPAiVXJaPBICo9uKM9KdNlW7HhKt+FO3E9lirxe00cy88eg0NW2 +0sNtdu2VRlgxEbY2SUYAxWrFwFj9rpCN3NjD+bgeW50D6JdUAOvNNDBptXMqMGkjEp2RmSUJbOSv +CWk6pxbwrhTHxYtTSqKrySS8hvX8H4iIts3IBBxSNwhiKorWagICcppfPZkQ7bcFSlB1uTSWjBdZ +BtHKa9wp0cR3A73trTyiS3U1VWjonQNV3pAJ6aLO6sItrrDe3XUO7ska3nG+2MGhmLekXTSrdPiI +cNywOStnHtIsnrcnMcMwkiF3yF8/e+f61bi9nAAdshUa1GPT0ceF4QMFFmvKtBqEMcLUtS7Lki2g +mB8w07pCkiq3v7rukYVzZIIdmfwUb8m9A4Gfb/kk1mRiHynOHmQxz7WQy9ZcHbymK1r9md51EGm8 +7sap1h0dQCOSQN7lSPKgs+Jcf8jlXH1pLdnEJTj8xxdaQzxFmGeIbbsVFMStRVCbvg8LUiTIEwcp +76JLzsZiihp2vj3Ny6IqvopeN2vFCtL0f7WxrNRmMSuS6uhmsupoZH0yHbv4vOP+5KptTn7gMae5 +X5C83yxCr2UF+F5DFkbJKTpX0J9xSKQT1MFsmsZxqlyVlbmJHRVSNXGST8Cez9BDO2QOy3ZPOrVJ +E8sGDXI8i6FhFImtUUdjT/QPEJisDF1omr7EWgj+rwhxbMRUah3cBAx0ryO/9f/8MvjfT8MsOhdq +Dd9Twi6zOXFWCKSL5WLcOxdoOfxWSxWZLOEq6tn8hNMFK2Av2ghcl8LBoMHxVlmUB6M/rH9alIL1 +nK46geHMuCL1W8SCYC9dg22VSHw+a9iDsP2yJ2dmpeoAZpm2h7v9DYRCzG5wQou1vV3AEAR0SGcU +9qU5VOpmevGjl5G74es7Jm8BQIW6ZHDNYJSS1+L8NhkiEqiuR/A8BlQkgqptkhzGoznuFOdpLi5D +e/MI/yxcvmZKE9MPsCws2im/UpTJML6iKf/7v0hP/Wd/mFUpBxE+UMqqDzm33VGzWt7FHe+/OloG +lvM0ywFNbuRuNrAIBCjUVv5QOkCdHse9S+Gf8u95XVhz6ee/PRCN5oDbwjtY2X6vac+EL5/fOuZM +8wuQNHshbtGPqKPdPoBEcwGBKrvmgzmCcGsbmw9hYxA33kyyiXQ+cqf163wzcUi53LHb/vkKRRBW +sN1wE+ROjr9bUkrgpZaxLdNvHCz+I+shY5QohjD7Z4/ZUbrELZ3j+9Pq1O9JAXwFcDd/Nekz/NZz +ygtjUAsReVCUhmLdY2FKsugyhqAp5DOI/tRMPuemoNLPU19FeQxvsNs+RFUAl4rnYBkdKXWBqkn1 +SeWdHfoBZBi6F/xcuugXJxa4wyZMp4YzVvt+UEfylNS4mVkpSS7JkQDL1QG8f1pMuLz7/Z7XH4Hd +Qna490HRjzajo3LAuBti+ty8i6VzP1waedT8WryxbIhgCeW7uWHsCnXlYdVN8xM0NdwMx+lmI6o3 +oreCxIPRW6wrQzd6fn17UsHgrHBLt9PAJx+NhBwLfXV9aFpp9bBYNgIuqs4V+Ol1gUU+9oTsCMci +6fh6wrjEmMlF7RWy6MbR3SZVYyDuIdALlObvoX1T21Sg5LCIM9hk2u/EyYTK35qdLCPKZpZAJ5Zw +rCPUhl+nCnv61IwOufTyYBraKh7Z2I+hw/1S6YlYq6jthVsSCGRyTumCIi0T+d7+07/01xlSgc5H +66IP6TCO8jQc/lWyOXM2G3QOwPyXLDHIaDBXCGuLPfJ9/GHtKFos0Fg36ePn/XDiwYL5f7ei+m2A +e7BDp99SPByFsqK7wN79ry+aL5lwyQybxFIe5/6UFmfaeu5MB9oBKErygb0tkpGzEv72KuXCMzxd +hsTVo6lZ1L6NzMKxMsZj9xVPgcaiX7hZQXqXkMyFbe5ik3FG+SRyHqMyH0c3uefCvs+P21lIWwtA +CWvNHaFCbxysIgFD86M5VQP6hqyBIcmzluhOGW9o/vAdcuyDifKPI5ZHhQCcglZvCfgAwjRBh2co +fUifPeH9i+4PVIoFyqpUVV2xI7JUlxyKrHKy+8XY4wsTqJVzvn+CZMfskzYBfheVwkQPZU4qDpf8 +OqF83Wl3yAolr4MM2ghKtFEbzmnVTYqJ0DJmWM1eUjsaRIYQ69M/dYrgLYvLkYwDJUFn0GMZPDcn +S94LMI4VDmP7Yk4PvBX/ykrNG6ZIclCMEhKrjcEE8rpV2Hjcqo0hwxP++yd8qHbwNzUN57pXDUeC +FXxD+aYMIiwJG/hN//brbe4asTD0dXHaj/lcVJd6mkdKLGd6kGc92PrUwTCkXySPZpqshFJePmS2 +3PAg/tnwtxJPp6R8yvR36YaV8qOXa9DgoI4iy890U8ASK/B7EHy2l+cvI6UEUfwt0/C2DHgDEVBl +aWdOv6io3h1SorxSbD0Zv8nFQxiMhDTL0Vjmpn0lTGtFl/1GWalC3houkwFxV2xkWTlVp7LYPpwD +EksbMZqVIt0s999snYCKgKxW4SPVubQpHw60CwWhcXpM8NiFGTkJzx4Q3b64r3+ypKdsrRG1Q8ox +gN8BayANZQlgmu/2Ry5Jjc+RfRoJ8CyvgwVvao9zL3kAjrVp8BZv/qIcLq1I6Ed81C8ZRNyrVRmr +ueqNKK3xhzCZ+LBCAraXLkYuBCvCjT5osf/rEkYrjv/C199O0Wf4dxh1ILu2cXOFeX7roPYCqz2e +kq7BhY+75e8ekz1tPzBDkF3rtlUnmo4QQRq8Saf+ENvWx3LbQtxqo9EeGjpWQ6rhurnttTlK9yFj +Dj+4pR/zD7PPBEaDCiXCiWq+kVIJwT4GJ7oHSVRNO3sgQlRDSkZRfD9b0tHqm8zJygPdPf6uC5qX +/MK/e4L4HC8PtLV6yjXecqJHJHdbr9OCt/vgToGCjWHQcjeJciNGpAsAwEbzsZBnlVL6HjVwTqAq +iCVg3q5Rh5IuplNAAulp++fOCoD3PwHW0M6RIv+vdr6fdKU4C84KnVDi5xRORJj9W8qnwepDtsUj +j/1MloGEA+gj3OA0VlErBX8soBHH4qR7/QjtXIMx7rWmYF8rtEEd1WfH9f3J14YH4bL+/NCJguPw +5a/cTbG+5lT7lBlClgjsYfpsbsYoh4FVN39d7iqWr1pBnN+aMjdyhHCPDfQvO7wzNkxgcqGHYTVD +LvwCyMK+/oqmzrs23fB8ZsQxFYEtTviYi/eLiUxBwj9/Q/K90Z3/yotRFX41o7j5cBv3Ey7N7/Lt +qFoSaFSvmH5EqaixRRO4l3DFKJOD8VquHAWeBw3pP4/Pdf1BdhxUKb6TO9iTkbKoxGk8Xhp0BdFo +jz5d5ARwudNN2nLA6c3bUwiZc16lyNfdpc/U7mZ76hNdDxp7d/4Hp+HEQez1O9KE+CfgiGWSD/a6 +OSE5Snxflak0/6MWbOqUEBz2Oj/ZCDK7ciQl6f31emGTyxOXXFgq+x3+m2LpRd4DtLAD7n2HwLWS +COi+5RxBdbAT5KfEpOAcDO8mBr4tCaj1Iyz6lBo63Kp9e3AvDMcOr98tivxAbZauJh7p8Up9d3pc +SNJiCIZ0jgpvwbZ7LC+cuUHFiORVnVnCSDtvhgPavSQ1ohT9QAtjlbLN44YbZsuCodqXJK11nIKf +S0j//ZIYU/DEyAQg64BNSoINiZLPmkd0jpHCaEmxbzAK3CGbn4D5WzcCqTVm3K5Jc9Q9prrE9U+r +4Mz7AHnoBEOhJwTbwOL4KDykzebx3salrTKMNJI08G4EvGhn4CwCOzbtpF9FLnPX7TROVLwQHdhd +8Jn6IBVqnOaSbDswihU21VvvNOlXRIrqHVDZciIN1G0OuZl8kl+tkLjY1gC6Q2e9ta4oD2+cQ0++ +dSX4cyezIaOi3zv9PYoAmcqMmbloghzcsOGLn9ouU/Fhwg0yGNZg5tdz/sCPA9pSKFmw2pQ3oHD8 +8Ico1ZGFkrZsZ4UUHqEsXX87gYgDMXcyf8ZLj/0F/mjJCseEQNreSSrlu/YOwJIO75amLDvf2gaC +QX7f5mGipr5MTteqZWDC0QLtVQI0U+861I/QqweuLNmEtGBxrb2VVjBHurG25QYCnMaej14oyrcD +XZV1EDX7q6qCe54TDwLeTOJxA0mVwC4jcwkehR5meSsmi+Wq088geTQelC2mXxfCKT9mnihahnS0 +9ta5/2SSVz3TNF1XGkiCP8NmO+Z4WXCaViXbkZNYbnK1GoQubhghNwmdj/Mm3gyIGoQTK3Ez0SEF +x6iMwOpOCAdNYYcLlG01M/9WGMv/ErArEv4TLdv646rDFDhSauIiZYqjykj7H1uA4yIurTGs7km2 +xeWzN8UmN+Ddqc6a0bQSU6CDrsJJPKp0ciqx+OSOU4jvjYmKMFQKR8F2W29L3tUuVZceQLtEppe2 +a0NceeXXPcf8F1AOw+5NX858Vn0rOAFFTt1Qc5Y0cfSgcdrDd0958V2FE5lpKRdp0pdBYJ3/i/Q3 +WjdoJhyqRSc/iK8qF8FGxYRJuqBxNgj6frHXKjtgsPRpPq7tDJQrTD9mUPc487/ZQE9nr+y3jQqx +UTbgBCM1B6m/VLRiBjbdKHHgPNTF0l/Z8FaCTOh8nldXrr1hxs/XWl2U8SH1oyAfB2So2mAwn2UL +VZP0LkUbe4DMbYHWxsarY26OQctA3LkWq80iwiLeqSWVPpgoVnyAqXhk0nZ271p1ygf7K9V92mt9 +Ft3/hbLlshQtahSs4MKGA7ZwNGyJacdmkBwh/ydMOsS2r2EM9JhYBqoKIWkhmc7nRKL/Tde9gK+F +X0iseVifLjFmwuq2RNbJOQ0PntSslyEhsjU49YulPHFi4pjY4YIKr152ZVm0lpHlm4N1QDZaH3IS +M28W2CvKdW4/azzP9pG7ZDnXh70eRd6wERYt+b+vIQWXzXA87Tz/C5JNpXyFSvpFODkQXPtSLPmC +PjO31PYrWQEvgXcO6/ldgT2Vid8MSaQr72CTyveyVyHbBpngrKlyP/nGFZdCs6xH3+WLCLn1SIZV +a7ZmqPRiS7Fvauc1FMs/pKy9Aer3GNphaN9YKShnR7hzra7VM1u+BmPm8XJ/AIIv7ulgB9NtsE2N +hl6AUZNDdj6v1veSI4mMC7EE6nA/oNJfh1U361BbcAfQEzFc5tL4OPg+ElefBS1GWliMTxx5UKn3 +nzmSCaALGKO2xDaDtYIlwO5Y7LJtroj/8Bhb6OTSHzqnT5rUT0ad8zhUjp818DIaBXJ9s6YLce9n +kA33kik8qVUZ5W8McFG5piejF+6ESeG1S0iw8x83jneQj/On42J5+50h+LwIArKaoMrnpI0X2LvX +2U4Ic9KbiaGh+PZaU92VskvyOS/g3uXnzRXN9HAyE5tQC25f2MIlK+pIRti49nUKywTRx7X/mqOZ +GB++OAUa1hgIHBDQ5W/hIJT0r59a4nijN6ey8Y3vzpDfg+FnLFqI/LiBVWwTrXU7a7Q+qDycxWwB +t1cXb724ZtgG0OQ79jd9WqWSSAF0uKjxZTw9uH+TKeHHXtoj6eLID4SK3RNydKrjhAqaFGlLvtPq +Hz7g/voSHMtcdbqArKvzltbEXtkrpswQbQNv9yKj7Bld95JNVOr298itlBXmnWQejTToSjKPwaKz +Ps2tjNUosn2ZcyqlvBUmexLNpFG1M5ua4GmstTcJywKX27Sn3nuzBcTfCsW0AOFfwMcWEnclK3k9 +lHtVWn7BXt7yPIgEYt9TH+lPuP5KNekqkvlyGF/4iQXUzn1oWxLhqHB6YpeFDKN5H8OVGyUMPmvV +Pow7zklhj22NL+q32GAo4qUbAO/r81MNhjhfN0/2Unp378bgVHW1AgacOb4o/foc9koX9Mc4rOdM +1fG6RbXI9qksE7II0DFupuSTfOT5ayJow6iBo5v7HZKSVMYvsrw+826+IzZkMoejAf1s/4omlUjq +01wA3wwcYPmPnnrcDGjPMQziiGaxz90Ukah/BNWwSwC5BS03HPaDwcnI7niEqbH+oFCP/wT2BTKj +hhf30fESOj0In4+uo0o7eHPBJGHiSXYNDU5bh36EYuzQZC71J9Qg3tj7W4ASp1Nivda0SILpF9+M +m9aOxOQt4rHvCK02rAPN4c5sXfe6h1RHGG7ry9mhTdrAK1iSDLpf4iQ6iKCWch3/DqptDqP7JBdP +LNjmAAk8KuZvZf6HRC5lmoTfnlo5AwuTWRvht+ugtpBQpqxvvZRmP9OV0DTsAPEU87Pf84oNWk0w +Pdq+vFnmUNkeG6SL9F4C38WQQ6sgHAhU6kaoCMmAoqBXSyTa9kLM5qi/OtO5NszmewOvPuErVl8A +cCAYEc3nL1T9qi5DAcfajlIr3d5JsCVzcEKUTYsio8rtRDxIQflOe0VKRaqmhq7ehK88DnkL78t9 +uQ9ZxVVXmjdi1jb6nKHwImXaOpk169GhMJxyf0M+gVmBi6nl8A/niuhSK563KpTN4eruDjxq2BXa +jBfojCY7if5opFcE5GYSpzTa11WBwR8FZni9/RbPJjtfozJebdzm1wIo6p5259HAihyyLY6cCxXn +6eXO1g56gnReBueY2CpAhWtg+f2O4qCrkAl4t6TAk1Te3esPcCxqtakklByQlXt/pj6RKfyEDzoT +xmQ1frD3WP/HEcli6nGwiGcSYAiGNTMx+GfsiOBjW5GcniARNzYYL4YOukPkohuysf9FZEoax9Uu +jqdZJJLF4Tgfix3zQXmmNPwaMDqKGmfZ5WNMrLGiBrulWEHwdCwq2NA+aP52yI4Tj3cF+eeSdcjP +0xm2ZVqKfjXcn4bf1tAMohmkIziO+OE56BEuS7WtibqaNNIX4mKg2BAB4XHkVTxucD4je2RYWsO+ +Cm3tfg6gWDJ6+xr036E0pbtwjJsBiYTLu+N+TjdRKSHTi4Ehsfas8px79cuycZvFxDsoegnCEkow +9zB1R6SlfRHxEkWlZbnw/UGUBmPd5LzSuVFQpebDl75KfKYx6Y/n69I9QJedxwNOw0k+xQNO8Lgr +ecJcXVpPDl3EngYcFR+RtPldrcPFjBMQAtCwMs4RqXfq8iz5pWsn25T0WHK1dggqp+nE8LzFoXNP +hF2IMMA8ETjYw2XLwsVIoTmvm6BMXqaCcPX+t78sXbN0s/iTnVWy24mzbyysWFvOrAdag0G/FYws +5R9q2GCh2/rgogxtQDzrUmImPGwd7VeUvEe81CQ6Z8haJJyEHRy23ddxqMIhsz9lspwPnhb9UQ68 +T2w1lAz3TRE2HYwc84/IdZykIoqfNH7TyJp1paK/4fvS5KlyqAWN+yjkY3W6G7SvCcHN0v/o7sn1 +Qmqg3TQpoadEtiqrTHndcaMNjMRmljD++iCyer/EHes1EGVsgxx0MfrcSMC0C+D0oCO4d5rOG/PT ++uPCn6jB7CiNRFhXyLboAFv0130C3jKuinnVqpQY7xOGbd3ZbJb8Qyf+0hx/qoHPs0ueCngQeiPs +eVl/0yzCSZndS3S1oZRaz4Sl2wpfE5OW4lKMUKJRDVdcJgCoj3cuLEIqolv4YUgT71jV1XXAViP5 +731LaUsi1iBjVcaYonD/hmTwRiNtkwLPMTk+9HgFggF5BnZxCyVY4fPtfxZeQ0DJm+M7Gp/zJHU1 +nW/OVDYpZbxQP8V15duLR7h2DY0eM98D+WVtLUOh0IX1BLVJtjQy1j6q+NhtKDFLpK1v+0a252v3 +N+GpjmqvzdrrOsyqJuFuYYamifGAyf/nogds9nQSuE8lMBQ01nS4JiG7qRkDesPFEawH3j0owEqg +neaePqGeH1Lh0WaSqJcMtHeEv1B1WbJTjOT+xhJHoRCdJNpIOim4FTek0aFBX0R0R2VhyB3xeONi +dG68hVbs3DKmoyqr8qE63PIq59gcaJwyKVdFu1wGFgKcRjb1SbS2AEgbcizU6jcsTXzVFQTtSFBp +8k/DhpvEvEnk7KJpHp35H19qvcu6z0JVT0ZAdVNn/4cB0UfEdl43yto+Ll1yrfuzZMacieZZZA0/ +8nMfD2I9wF4KVYFo5GL24xpE6Ti+OY44vxXYLCoEkMrxYmGs/e8YMdWppSgBspHWnc044wdCEBgT +NIs1Mlj86R9xDlGxQX98uoaD8hPrAQoK3qkDSwJLbtdojinJ9hR/WMv3JahaFJNdZUEPfpzfDf78 +6341CmGfN2o9Uzq+4fSwqkmcUvWmuRdhyxAT85Flmco/uOfVR6ylJuCXOEPFozy6aZwIr49FVCRJ +QKcGEX+gnDNqxADFmdJ0TSa/BSC+lYaFYGPZ9TGuci8YWfvTI3H2rU/kdw5llucbJx/NpR8YYy9k +fLJVyamXjlyVuuv0kRMZPzxPzYO6fRV20A7nK6/5lMQ5ZljdvWTr+j3a4KLncDBh3ESkBAG17B6A +iWmCvilHjG4HIief/Mx0398YFhjOH2pKEvMs3BqJqhaIkScQ16jdCH8Q5TncyfwRVHrOpQNf+rKA +ZzJVc0fz22UvOlyD1vf2vaeE2Z3Hf02BTHGWOcOg9lxq/m/yc3svg0ZxYedpt6ZPvHaXmKtfNpvi +pqWBey7isIkth047aLWsxZDqeVBpmN1xdNc8GHcMdaXWdavIMIMT0WnoGc/+nIcMhEEr1IafJizw +ZGOrizBNHK5IYzNxHpQg4vaCc31TiqqsODPIVE/6en6eO3D3zLuJpSxgPYHmkPNPztpJ+GqgQHVY +h2f0RTABSby4VSytYTr+C/fa9nGkrzV7kAFMvh5FftErULf6osV7fucSEd8X08PgoQwMcIOv1XCp +nypNEvwylfE56OGgbOstY2SGFez1rAO194+IrqEAMLz1BBzeoIP3KAfPFGSNnkhDqPfFxfOTc+5X +htV7phwHNjaplVP8N1/Do///1jco1dQ9f7i75wWppk1osqpTnZX98fI/vCF3IhTBUj99y9Pg+2DM +4kTQQIINC+W1D6LDVy5VfuHaRBMgzjw0flE6zWPU5sRQD3oIyErcqNc2M8z2ZU3DsLFYAvYE8uOs +Nhm64apo5B3adUjkXaH3nvT5DKHaXWNbAG/zgb9lJXGFlxs0vBjVPsC14m2G5a+E62PfnZIxqvsp +58pHnOcqHusQ+dta1ZXdV+aDf1s6YXk7tA57/Nat7WsrIQgFq3YD9G8kU+n2yFgVYLSwTEF2W7jV +Vjavh51EaTRIqMDGHYTF/V79i/DP62qRbVCAPCQzQ/uSJOWKJHcg18WPoydaufGrt2FE/xrHduhZ +UDeXXWrwxNZ19RbX68VlvxMPQx6M4Ie/he7sXzHDl2TmqZwf45dk2qKLrK056o5LGdhQZ1SLOf09 +P/UJF/D/SFJhwGO78hPm6BbfKvbMvVj5Haegw0QyUGtRgDIPHf+ApzNNLWTI5D1Hj6hEGkPFqLC2 +K044hPAhmbrZFkoFdAAjBwZ9vqnYX9Gpq3pPPyk1PYJm9IbeiNoyQcO0hUy2DGcU7vNyuQUYih31 +X4FO7WTpg8k++DYJmlb9SRHJktS+9mE4z9/RvEUXb6gckyfVdj6iJt/vayx3pYwmgVfsZHOcS4ml +1j9/tR+yin3d6pVqRviXpTVTdGCrIakbWJ2VWpThQCcYOzQGop64lrohrV242RcPZ0BHN5ER/Uc6 +EzFmeujUDi+dlFAjRVmZRJarXm8VFfeAeCRPqKPFxVr1nxwzlxGIRopDALRVKowGbQct4QkEtEy4 +Y1ElPKoFKKmTtDqL8buehRPRZflVhZbRocKkbenERwPk54FR9H7qL9hzFcI2YRKiR6bdZ51tUVRg +kTsq5AShy5lkjW0AXjXM7N1yZM446gJMSjfijF8i14kVDLWhw//CAsyDcyyEek+P/Q2TFLPYrEAb +SAs8/2GqILO7ItbqKIr+oA/XWdgTLECqXw2WlRyzK3yjJIr9bW+EbreFaCK1MJaqXFLYVEXH+Z7L +wFBqrR24v0wymu5KCv1KH6XLWFA3slJfXItMpft07QNJh1WoXYfV8ek1CykXWLo8paRIQ3GQlTRw +Vz/d6FvI73tEzEfuwVYvYZSBZMNa8m7I9uETo5dOCS1PYUDJLPZZI2KUxd7fJ1e8w8c53kXH3w3/ +aJ7psRceoYVq70xSFOwFV4eEKWvnv/115wtwU8AMiSnS+gdKNsOpjdhElc5rR7H/KD1hfQNDl2gv +d50RJ7R5Xpx3O9szr021teqeHkkv2cYJns4mW0gD+EMnX7KN6NJ0PgHllsgzRCkTwI573LVgHc1S +MstSXPMrUc0yMikwcuz6JW6r+7aNGpdTIaVpdUwCgqGtTZaxG7xKhPMvix7JJu8Xn8ByihCBqu76 +Z3jnaxCwmr0qoGkl0eKSrC7JJVHbC9wtsS/wzPLw+f1/WSRorMb97xdtjaml/tXFSMrzyLJtiKU0 +Hqnpaf8HDyx74Uam9Jd0/ACZaRVFxEwLm0H+t1e0EWoEPvSE1fIHRd0OKFOmBmzUz3tP1RMX/BEu +u8MXo9szksib1Ue+q8Xrbkq9V1CQFVVtrfa9+0wNvRPLS9nocBaXHTm0PQ32QbYjD3EqMgPFldbK +fu2y2WtLaHyGTRgtkUGAJcHGZA5tpPK1uM1NJJph9saJkCUO2v8WaH/sMqBodPl6F6IYXgIp1x3w +uPwljZ0p2OnXEdhFV9ODDE16cOR/tqCdOVQlLDYEKvFU+7l9gFtOc6FAKoutlKXrfMIfmY26pQ7S +KWoOIWIe5n7CZChA5q1ZLHZxXuT42Wi+NM5sC9frEGx+oedc0H9VXS1SR9Cfs5FXT+eaEbRYWgZG +CGVj5sm9x4JYgN4JoEHPnqlOVDaShBqlH9QmF1yy/x3Yfj5xzNvKSnn6XyEbdlNTKmZhAzirqLTe +26uTAe4rIg2ycIrlVwMq7SFKgViyzDTfwZ7geR1ulyOydDdq+3fE7KCIR1uAY2zgmaBXmqJAH/mT +lBYpUNbKbFoJAY5cvoflPYf9b0pRN4jgyP5JWlJVRLug9SGVjCWyYjDNJeFrkFvHweKqiCCfNqXA +mtqa59pLTGWef4Aqx9g3A2sYerYRHHWxJXhAB6WUadHPCBz0TJ55+4prVGU7iI+gkvFS2mflzZzP +ORWAqBXRLvdbVWIQsDaI6989EJhKv4QoT8Tsc9w6KS7l3v+4HTRgLoG0L05CYj7UDtau0ZUSCOzG +3SLqQo+IJ3LWgoVqQ5HixnHu5OCE42PXs2saGKIYQsDSu1nGS+JLPOSBOD6Tk/7c1cp7/Oo8Mdq+ +SRbnmQiECOhsjylYhkUqVFQprlOyhQRL2yMyC9zrXBJXXmh0Uco/o55QxQPxEGj/WlPAPM3jpcRW +Z2axquThp/3znktzQ5edKCxKm0v2bMyEiGSh4CWMHmqEPZiOYqG56Vl2NKEmJ9aq56iOHks/l3mz +tp4ViURVbCeEKn21Ei6lrE00iaRqONedzfoLxTDPMEsScpbVRJ6TO2xkLWyt2rz8nX8utW2Aatj8 +QKvUzoz1XtNiiUtGGEngIV7HwLfnhGDB6t4loDuvQ0mAuuOBthAiNBSedUIIw3eI80SyoWVhCH35 +duoXiTSrulcBpaehDR1diuFaNGoByKJMt5fjkzpnuUNMZk8xeL0Igirax4InDJE3Ii4nq2/90x9r +qHM1v6FeN4VpOd/KBwIDZQ5oGwVFW0WSSYe3JLrq/ngiUtWUKYVhveMUWbmaK/5Xdqcf+puHo2Tq +uNOWi8H1b5hNszPTmumF1TNbaUYp6RbjGqch3SOj6sgTCD8iZG4XLNQuTnvB7isd3Hz2q3aivG2w +Lif4qUmIlmohQJAWj1tw5kmxwqLpdFZazYshS0X9UAyQK5WvgDA4EdR7Nrof9ta4TqYMDayH6S8Y +CTxA0jgO1Hk0NbxuTDIm65WRugNcFzRdXrAiJi4FM5GceV/ubPg8CqNGWX01JmLSx1JdPVRqf+MV +ckN4O9uHUSvxI+4BLxSQkRRhGnMB7ltpHZZgJ7XpBycrgVGF5/1EnOJ6QDh4m2DKikv7YsvPQDHO +apAQn1CA9dXU/UGPEaeIHU4CRvnzeijT6G2h+CwRmt3c9OTOBDquILaKW/yRK1axLm1zmYcBH5I0 +yFN+nY3sThJNGEZM0i0UJoMiqENUuyI6+NC7pCI1jjVMMIUr0qkCDdskt/M97bKvbWh/98Mfb7S0 +ogc1lGXLkRP2YljZncxgL8VI4yf/foIq1Ad2ub6XKCemDwDZzif+mycZzIqUs+Fq8XjZoNWQvdKU +xxjabP6d/bSNMGY/sZJsJgw7BrQcOOziPSr2EtMXJnKHOBEJXMLTZIOEC/4SXpLr3qoXOVH4a6pw +TNRZSU03wsS93gIpJDakylSpoPU3Hl3FG5dLU4DlRzQB+jhc7rdUYm0E1+xDiKUycasfegJVttd8 +4gexxOWKigDP5flu0Fro9igOHutRVr8LJTxQOhK1LJ2Xdum+MrzYHFey+tx14ZuKn4FpTzR1YUa1 +GIAwfQgvzpTsTBk4N75hOxFTfaqo24G/NgbqQR7Elf7MqqfElQumsVJjgGkbx/cclyKZKIt+dav9 +EIWanSDCDa0a6s4ti8dWPWz3WI/v5KoadPpnx+fM0og4rYMVz+Y0HHFvp8CRrg8la+OfDcWQpmKD +shx7Ba9VbX3h/Vpv0pWGHpekz2CnHgve/RzIbbs7praYEH4EQmi0SBCoYtPsfkUgF1dMuSOuA/vR +SxIFghvLJIvqodjUAkh90dwLEhKFihBU2Q2RKSgq3ewXPTbVGMVt+LU0Tj97hhuOhYJRcyHQEW/q +5E53dFqR6Z0ynMD4rh07qKLdrzDAifmo6oqK3uBmjJIJMujS9J1H0M+saqQdxJv3qB0zuACiRD/j +Z07EsdyUXUgnxN9Jx1l3RZH4BQa+1lEP3TyKm+gBEF9XfxjSdw7EdmZnIQ8ov+9bWfBY0U37VGdV +yumCfhrzZez+Myf6nGh8+D6tKDkiUINo87Mwd/9jP0AN8sMwySMIElkYX2wLXT/FdGnSrSfsHhlb +IQ9Ht2s97kbOTdnZpgMVF2kIvyZZWG2iaRupm8F2Wc5LyN+vlNs0dbXlsvkFsjq5+84acmaLBnhi +JSpepp4h6bbsOk8EDAPv+LCOVaaLPnQ+NgGRVrImHoRLuxcNRtc8/foVl8heEuahWuJHJ4bG1JXN +RTJ8D4bhTRUxlIr9N7iGTUXJUkybvVb6Iz5sFmqTnCExS5mZHn2lPkg4b3z9JUcH2OTV6Lwr4cb+ +oY1RrRTfkDtvLxQY39wrh2sVYf8adpMQWdnMJoo6thG2QKj9al0vYmACZtR1xiPymeATLuVf6nXy +CM3bd8mE38rTy5nd1zEudlBneBlHc/YND9lbrlEsPps4oHyweJTgznJ4p0DqEsWt/epKdaJzaPoo +7C4P5gMwttgrx7JJT2z+4pKELz6iHSUZcz7vLZZxfhZO2e7g3r+M1Y3oz4nYY5pnUzaI0Z+omP1I +ucl3F4XPwRA5Dvm/Ozd4PNAiFW/tsDEkz8Wp3iSlNDyuMcHl+GLzrwerYrslvlxTnOJ7opjJKBD0 +ha6t31Ipvh+MmyJiMacmevXYGTjXgr6NdbYf7VUf6eUEftWH99eWVwLTr1q0UHHgCrxEJ3JIx3IU +HVJXwbFZ0y9ApI0vMvpcNBVH7M4wC8fEL2zCgZIB0vs1sqblh6PmrKn60c4Ej7XKI1FNgqby1/AT +QbAhm7Dhm6r1qnyTgpUjE0eX2WaR2KqbHFAHMoxPW8gcoYDBSqzWY0lNZbVMUuOj18foWFrpRLMo +Z/iyToWws1hVKGASB723AD4dsAySSUdCta9omI3YPE50LRZDZfwWmZcLuqegE8gklYgt+FYD1k+X +SlDPXWAdTpcfRTdvNOc8rINXQUOSTj8YRfFyAKUMOTwnixkOYzxKfuKBEkXqwoom+nd9YAo+KzKO +K1+MyyrdMa/aBaSbHWtguPyIBaBidWLzCI7aN+ypVOTcD4HwRWWYk48+KH/169CtREd9KWTMDp+R +sO20zAMQfUDeu6/Dw+Q8LhbGOkMptlKfK/8Y2seX0lpy+ywVb6+/CzOxVJMXvSblnQA2C8o3DtUP +MPTd41UcIyk4NrwD1fLRwHgX/umqvMTh2Ra7R8lP1zZpvoTs6oyEEGryJ0ZUGOcK2A5DMdhK2+9J +NEthbLyjtHLc3+GwYDokhiUC1xUhPyTzVGpy8dZdkVZc029EhrUavacR+JAFuSLPVofW5vbEXxFv +pm3DwEC836nrd2TzfA8SgX+OvnHOeVNkFXjkv7WmcGRSO0zNPiAyh+lS0VFEwX5Q5PC/+f27//tD +MFUoI9fJ3NpC3gCkstR9tryAS+XNVYvMqEb/gIIGEEsxBiGoBn/Bdb7U4f+AaB1WzhRzag4Xv33H +3uXgqfiVANtm3d9d/CMBTTA9FYzsoqecKS+zk7RIyr7oOnwCtkN11hRKnnV+iAKhGvd7/CUay0cN +3tty0TXwaylPAw0Eaqn8I5IKnL0AuUt+cLdD39LUE7+zvtQGAFgUEwWDSriyHSl8MqVg5FMSoctu +CpD8q/dkFJRYQAgTtbd9WSGWnoslGoXig+WAbTG72RSd7IdtVAtQduB2Qt9BqZozJUDW/FwPPqBY +Q8pm35oY56H0B0HkdCyZpG+IDTyIpIaekHZa7/tE2aEWzzww0l7Q8zLPr0OtDC+NoWHq+pCKnaTR +hHfI52pDymJicDi8vMrTFAKiwdOx//nYsaMI6YGYuZvFEC8FEclyvOUmzgVYyxYRzRRkAnkf/DkX +/iDKb/XXpJU1H6GOORuWsERJYZiM0oilMqxS9MWLOAWL6VDRoiEGaniPXNltDFlUzJ8gjY1vWiYK +HpDCstGaH1eSJcn1KUQ7wSwmEPrsihYg0I0oFazgAd8KK6LYHnN9VAKJZwQEULbaXjWI9UUjXI8k +4kSwQNjPElATIT9vrRKbN4j0TWUA6kQyyfOz5PLu2Jmf+NycLzOMEkkD3EaBTN36TQJT57pf75jK +RRS/cTS5h58X6sMfKqgD3thVsuqRVxQx2e9sIRBn1wTBUF5K/nIjag3Adhl5mNFBEXIOMDapy8J5 +1j+uHpHhT9ZJm9E65Qjh4+1ju2Fbo5PurctK/8q/t13CWyidu1cGBEhGahocStFfPsFARi/GYa1N +Mt1rLsXctA0Gp+WCEL+5gZEi5yV1w0fiHK2azZWZC52Aq52Przdggv4173NH0ouGr+SaMvMqfRZe +yFHgIfbXcYMvXa/dwCVFqvJL0awwUFPsI8LMszV7yn6MQiGNovi08A/Vqp8GYskduz6zwoXNF4Ra +cKt5xtrhJ8/0fi6NrH3e5h3uqFJYdble09wQF5gqpx+M+yItw04d36P7BW7SWnUPz7T0RWSgOYXw +hDmY5M0syOY9mFPDBjJ9Cwdb8lrO8Z+M5G9VcKwC5gCwku/HMCV6lKeDboHTh+OY/2pgRrdG96X2 +Rm43hPhqGEbYk7Zug2qShxhFd6qse2aazFYGEEBrsVuBC4IPl0Ml+C1mkaHnTOnNIfm0vrKiIWzX +CEJkQ4qz1JhCmnbPR90UhypSDsUkuyFTlu/UyqR22vWIhRcJXpWygcSnsBuEaD+d7NYR363C6gMb +i6IzPJYFIqHF12vtw1Ruh7Kidbh1xWw5rpOz+pJssTQyZyoCxO+sHHcmwbM3S6/w5iP9j+YiLg3k +0mj6bn/kI+LLoCUMsBZSyfXn7VQjrhCN/oQcSw+iwH4oe4d0qMHa3B11SFYM37OXQ0JPin9inpP0 +AxDqPFUoa//rtbkPucYBVm12Ij7FJ7eBAonrLmbJI4TSOyahm1QxwJtfFWGZosWssDkusJyMAc+z +QlAEFYZ++pEP9+P/C9FgGcfJs491XsVmr1yXa/SSjiwlIxQBTuHGK4IQQ9uzR5TIrpPSjMgHgXU1 +pgoZ2VKZhU9Y742Xwkj3iTJlqwWz9kuGCEtoCLeh+ia9AxBv7OoeyNFZR5MiE6LwVKo3j1tqyYLt +opj9+rqdnbLq7OFHmwjKE3HNVxUeRp39DnkLL1IRpH5Cqw9T+7hEPNwYUZMmFBmJ96mkBsIm5p96 +0gmeQH7BDr7k7sTwJMp6eliaz53JsbRImbt1FzlEyjfIGElF1C3xzmciq8aqoIsb8Kv0qX07jdmC +12qse2QQNv1yJtUOP6WYSc/u7JX7nn4ZtxY1QHwdwRXohi+/fcYAM6vHaunt7UH87DOvwjPpjYWs +iABcOGRgSM+C2adRf668y/5lb/IRL2fw45tkEtQmfh7o+e8LZH6gc3qGluGvcMXRyizc1MU66S8Q +Yi/MnIS1vWy1/3ENFjp+crGczS68X/DsnuYPpniOWxwzvKjuEPmNzWMn09hbayEj7D0d+oVVASoo +KedUVcM5FL9Wr8rSE3rMB87K8pCnnP7fiD+nMghZdZpNR6vuTKdzu4tTt05DOUf/OWJbShcBeT2A +tU9arlynmpwc4TfDnfKs55B3j3TcMKC4dfhfQhVQk8VyfA4Ou+u0c8tir0CRzjINaNv4WBR30CsL +5Z+gaPMWys03k3tsDgV1nxjLBIBq82cbOLgtb5cma+mMBtd+cMT0SM9LsqjB0UAjIjyv4ZokICnM +BdhCcoWS6mzkWqS0KZMe03a/+UXlRKP3zf6Z5yKE/Cva+p1Trji3ppallOETy6+aZjuI9PYObLXV +/MiCFYAdKUOgwuY/gOQpPFJjExBFKTr+nzd7rzpPUKjlLHCm6TZKOgVWW0+6T2vqWOr0bZUgcweY +pfevnS26cYT1zDlm1yHtu0gtCAeqigBXNOHFYLYt6ON4XGj8Ld21jMuXZeuj84LV6hjC9Br70kSB +0xRfw9VqjxR1In1RouweaNLOn2ApEQQnVyIQGPKqMxzasOc3+nFGINA1+wkHB0m7p7lUdGNlxz4A +M4yslItjzmqob+XMnrB7Hh/tVsoaXh7Bx2RZkqojTEXRHCWnFiYzzB5DZ5TpnH6ciJGcMWfnep96 +h+VBgorfllDpVGp1ClqEO5H0OkrNHnJbqEjBYk/r2Co8wKxq7MOS/j5SvAUDJVuC7QoHiWOs7meX +uzyfKPt24h60yfQ29kpIJzP3AU5NuaJQv6I7nlzPxeuUuXDn6jXhG27kFynCJjl+WTFNLDFRojZt +Quq2uHbKJUUX1Dh9LQDw8DJM9KhEvntuwFXxwX6BdlsXuplNjO49BHjotFaBDoz1fwiaDAMnKunP +n+YFeNGG162o3RSjoztqNi8NGwkV760HbUEdSFliyLLa3HdfCWvVU3nQr2wLaPln2Du9yLbREhom +NXJU+ZnOEq5BE9Q11qWXJZJ09Nf1KbEnz4zPwEGAaE/TFX59A4GH1p9/ZfsirovMaJoEdbJ/5/Ze +Xe6ZD3f8GZQyKzFS1Rdi0gKJ+pGnCODXU/5l1KXQVEdjZlFH9RuqtZxgq2Nepwv1YUGw0IbcONXf ++uIJu6wt7pZWhMN+S4GOyzgnMFB0FPldx44UIa9NvdV3un/qoktUeJTkLRgFd6GEEL/uvCtODk4w +0pA3bTu68g2sCPRMzzw7Xgfot1uO2+IqE7Oefr/05Kmc3LLCdtdAkZaYDC7BFzaKSlow/3UfV1YZ +e5PBjWc6vCSZ6mXqOO5usZzTvKC709kP5+hxTOICPMyg5C99gx6C92+WVqxpjNIIZ2PZvTi4p2z3 +6u90//113hfm71a8BVdLNq/+yVeT6k86VaO2P+/+qZ0cbjxhUsA/PeXhOCftpfyoZU7WReLJWRfj +aaOP9gxeBJ0UWn//5Mfez2zotoMjE2s5UMz9yYcZE7OH1g06q2rT9GPe6Up3ctkuM47Q6T0ovCIP +i23OO8i5q80DJiLcLCqAWUZ20DlKim2uSQS4TWGwcjke+KUAFeBXVYEOeJ7x+i8PySBJ98Ck+Hlg +qqMqJTULebhyCRruGa+jp4N/IqlWca9TcxL5qZIPuSQ/PQ+IOccpGbvCKjyifAQxbMbE0hQYHtoP +ibpSzXQzetu3EqHiY9IfkTSqaAl+0DGsnf/Aq2lPGGUbJ/icEBfbs2rqSGUa+DwbvEPRld57vbTM +g589/eQRio0oWku0ehcNfbflV2C60VtvzNV9xn5CYGFs6nckdwPjvjyj61mD2vHBW6VxJHXfJkI9 +swBpMBOqFaB3duHWvjtoeKap61oesw1cSuWUuElxYGp+dxXEEYecm1JR6jFejwH+0a1K1sRpvl2b +Q6vjG98Vmng1ZbqcMjAKsrW73uL6+IZNmsf6E3+rvSNe2t3H/6aHfPIizBesRnd6OeH26jjgplPH +VCZQ0/xYtxTKqC2oAuXtxS2wpS2doaMsQFbwSDNcsjKiGqt/otfLKFllIT1T9o4fD8lbM1h/t+q4 +bUZWWHUBbvffrPgjosdjF1HS/Ny0Ihf65vT98sJ2FUiJ4tDZoQfxSHptYHf1cb28tksJijMHRoUO +F2S0jrsOQi1Rn0Omapno/APgaI+ebd1ZNECNgLyInRA3w3coUCtR5IdjxDDSPW0bmjTtw+34pl+X +AW8y7zfdhMR0CZ9VkR7BU6x4vUxx8PTULvkpjestkTXNHDG0wbcD5DDeeQirnbY6vRYJfWyn7azF +gPYC4CdumGg7GwbSyZP0S5a35A63iaWRqc51Svjxp1+wwU7ztkrKVzVJH2T/irn4Ign3MQvGO3RZ +n9hSsXofgGApMf8wmNplnmDB5bKNgcXt9wPlRG6IIImDkJwAweh8X2OvMyeSB4k8hTvT+/cQqFvl +fJIjOekXimNLsCRklGLZt01J5aAieoX4FB5ee6CmpyIFyI5r19mnhCEvOaPeNhUSx1L+Jv3Ae0La +3Ko2Vm8DKOV1BOZE00sa+YUhU/gPXhpcD3tG21YjuA2HQLn0thbdXkadTFDncdcHtlqvVfMxem6R +7OR2DyZfLD0VaXX16VC6YBOoHoOaOmQ0O2kXbID0e+3ZYJDm8vE3+TW/sugigNxA29dc2MFcWb05 +kVF+bS3izk3Y6RESDMGxOedWeX7MPRcz1lMqpynPO6g1DPM2f5nX3krntXjAsVjHRPTqCboDkBSt +XjjNbLS8irdMdKHRfblj+dGdxmNkO+BK3filIcEBGNkFqUhLNODDga2m+LWP8MZjfm+MKAbvsg4s +CaB/EfsnB5XuA+xir0iM8n1KF2GM8xp02PNUT8GaWitnDzx0rsYpeK9QrIQlYN8wNT9tFSknh+ZJ +iPYUhVAD7UNX1mzqF7uExjVUKGf47rTma5MF8Ri4Qtx2ihoikOivinC7w3vwtuorXCKePSNH6yeP +gR5hhvxQhAz25IvWRWzrSBowQJmTo5CqX0NCJWrlfvPuuu03L7M7mj1F0F0UCnhgiDkSJSB/AdoC +S1qkS77rfagMMdKTp1rK7DP0xvmuLLBLl8F+fgtaVrNaOMOm47MrOTzSeBBcRdXc2FpLvJ+AW1Vc +yuVotuZO2B7FidH5RqFfe0gvbyykve8oJ8YwFWtIvbuMZfoh4QxQh7Fw/r1hDntGVjQYQicsiPEZ +8j+2jJ4tZkn8GJVpSOTZMM+X7ZwOHLAJldJlEKMwMghcNfzxAW7JZkSkWSKF9fqg6fuqj1kJXW1L +3tPKCnn6zGKpS+nvn8Vb2bJ+mOzcq+5cksyPfyM0ML8yHZDizoUZZ2zqYqm8yezuPMwfnj1E3pQi +ioK8DS9CJI24PaWAKWkUWp/zxxtOM4HlaeYO4KewHdkkTVJ0NP7VoE5TFTN37koACImDJKbJPpF1 +hZXx/u3wnqmF3qbXChhP57z2CFttX4+KWHPL/Au7gOCXvKJznrNtrysts9VHDxH15GVgo2QhDZRv +dMSCxv4DzFwKTz1BiVkYeihuLgXX46mvA7WwIstGVpkKjBV4zfOgP7Y3RMdUG74bOR43PZ+aPh6U +cDGFAS6oImZsGx2DmhMQyPJoM0ZvjWa1wEQh6hQB7ZlxwqKIPTZ4yiaMZTb0rUUgTd1R+x9RjLFN +f774x5TCBTas4bTkpAjUgooQvW+jnLOpL9XgAiCmsVlqxNRbtRuezA8pwsm04vUlgPMjrx5pn9eN +KeNapGUqanwFI30N1Y+DO8rmG0JtXj448aSoZbmrPqJ72LexNHluIzzAfR/xhWpDE5oiIevc9FnV +3CwEnGY4WlTC8DLCNoxJ50VKiQWmfa3vnaf9iG8AMc3p45gKyKE6z7dmcNY2PifWrvx+bD1dkkfY +CvBgNLEHlQznUiWgsSrRR8tY669bTGWeTm8p7o8E7n3KGaQZljcr0QAA7RUFAusgvegqg1tXVeq+ +eJv7nCESar3/9IBrH2MPfrN/FQYjxf70TD7XlFpTswEsPiCLhOrgq+PA5cOfSICC6J00PdnQWGcy +Jo0/IY0CllKvq8sdtU0rO3az9C5MD4BPPmPB3kuf6BNTimm0PyRiiUQTcHlzgReF3SoejcigiU/V +gl0tn7sE9EzZ8NZS8NYw2h+UPBhM8TWpin1eomMJbDRlYYbOq3AjjDJd0QkNTbYkcFsY46hgnwDj +hg0MJxDCJL5vAL6ftZJj5xjFrOjpoRGpgpUs40J0Xj0B7bjpMY9w0EQhLWo5rYUWVl+l4FnQorq6 +2KXm6QIKkRr/Vh0BpHDC8mohLSB0bqQduyvelMvBM12Vd/LFNNAsQvw5RVhVvLGNtdeIiLrymXnC +oWOrA/GudtWWambtj4WSwWW7NVwvNdxq77+GsIGLsjNFv5hpB/803QetR68wakdSLoh/YDms8x9Z +LrfDxWbseGroAjddssegK4qIxFR8O6jZHOyBceRMIUDzXrzXb7kd98CaKD5HzlW0IJdJJbpO00gN +qlsS9fA9yZwBs7sQ/M+YjJZYzB1Ct7/V5vzO6aIqXz1o2h7/VgrRbC7Scnzv44JyN2nd0OXFyBO9 +0GqiNBM2LXvdlEYFBoc8f2Yfb7S5k8p/zAvfwCAMbxMQ6mmhWS5CIVwIDYCOryVS9qrDST1iwJs/ +7sWf+duKOkDyPlEs4fG1kr0A/tz5F2EE5JmCcH0q6GlTG8q87PP8Zd8kHtqV25psF3w7sago3bbI +PQPMxSP9mzsF888zSVVDqXbmqy/SjqpjBmiAVt6o5gTwim5AmIPd1LJdqimn6qpql+C8OuUB94EY +28KVuBUzSjxGfVqT77QDVyNkgUKWG0E8wApUPO2XOpXGF3KY3AlsScyR3uzcHOMons6Z69HCeWBc +7VHrfOw0wfBxv8keN6w0kTdIbnaJ/oNcW2FYZ1DKaaIlPSTt8Klz5hUOVOqGyn1euAbJWc7tYofi +1T8/IMzhu7/W8OcoBoDLpQzwiMP7PsbeLuVZGnkCrobC1W3xwzOwSWHs8Gi8KvRjLFy3SOTFt7zU +zyBxdvZo1/TXokyNwyIoY0uuSxuOIZUSWbaDyNZk7TfzRMe5CEE+jnwE8aEgMlRO8grDGnJGnr8U +QOKBrfM6TPUnPLvKvpe89Hf4AvEcFSNFY4H9/2wVKvv+MSGGC0EZyizR+ozbKFPuiMAVhV/YUC4C +i/SZXfNwn7akMiT3DiXy3zWy++torHjM8UVQlJSNTV8s55YgwMT21tg1XCxjyLMadWIeOpZN+Oe8 +fCAHPgnSx9UAXVRFfaEle6L6u4KEuVLf3//M1KFId8De8h5oxplNdjn//OqWGwcDtOoPIBYnAbKu +bvkpeeKwPOlncvud7y6MApzX3bnh7e4wZyRQJwLHkv3WfTRnJLgJHLiRkrgRB3wHvF/rLxFJ4CcI +4r8oTQFFKlgW3vGQud1tAECDpewTjNmKJxiu3UOURsFH5cVJwyYk0bAEEAcrxHCjeDhZxwYZayRL +ViB/MqTSWemc0CQPtFIWz/2uosOTZBAykcQkoc+0VXVxxv40CLAGNK9bsgouncvDPMkJEPo3Bt2m +4M9PAZrkOAvDyDY+ShAMeWS262rf8oVTw8cQJzr5GmgCAQbwJhWkR8MX2uFDSpjw/69NLVIJedPl +o6wP4y3u8uG6KOecTsWDoyVRSsdhE8HlOn7Isa+w4nYBDuV+KioV1uVpT54g5rmSxoTrA+Ct4D1G +uIYUe5yPjwVgI/2HK5Lk9/VMD+uYMiuJrdpcqhE9HRCZLDpat33VtFdX/2XBejXDA/QRIvlVWNNL +ebJi1ru9M3Sgogr9qU3IFDMouISNZ/4PpE2jREu72ZhI30clvQoQmg5S1tZDlpbzur5nx0YgDDKR +DnqvN/DZF0MTmVuEpxvE1Ai+ZT6TM5NcbJQz5Xut7+tYvgh/1+HYFOro4mo96J3FWxJQ2RfoDaQK +Y1JOlSWuzfdE+oo2dejBc5Ul09WXRwXkwGqsqBvRjbSxdvahRn8Ll7pMLmjYcRd6FcMEYaAzgsNF +DErkJajOrRJlT9jtvgBRYKTt6RAe/l86Nfp9VNOSKJSoOfJ8Gb0EHH4vouEeSkWZScIGQxlxGobp +VpK5n44HYmSUvnZJo/0f8pNoiTqcCvCWTrEl7lxm2tj3jqIA92IG/rgOAiiHoOnlaU+nvtG1ZLX2 +2u+ZsfyJXuDQ6xFndC6iaLm9AkE1YPGCMbHW0lFnr4gn+M8ZRc+Q8+HYWtYIzXoeY0dYg0Hqnt2j +sq2f+tHLFsrDDrmZO0o2LpRzR3o0LEJ5ppkxncz3xrI4qEV8r0t2+OEAcK8JHB0M2DvA5d0hOrVq +OaKlkrIuq7naJ35GFPXe5qIHu+ZljJ7nOTLl57oqUiTq6K4UvTwPqfw5jQGPaEkE3Vq7AHmRHFdg +UZnZ/M2SbcLOXbhBItFlZGcFQk7myciXMCGEb0fBmBplfThMKqLQBxMLvLOD42D/W1heE8BwngT3 +KTAjM/eHmSYFoxFruyvDlLaL+AyofhiHEMN5h9sZTELJ7MW+bisQCY1cAMFOJ3vy7PiycoXQd3oD +X5YJqiRXzqh7HZ5ELCuTsCVzkO+193ebeXhNaVVHBcwOqPFd6zc8nWF+4c25NQ062qqi94oOfcGU +cEzWsmhONaMtp0d6e2NYxjUguzsWXo6WmofyT7Vdq1S70rsE090fRQNG2yJvRzhgbZQ2qfPwcblx +qpHwAxFWx1T/xfb461TFBBIKjaxLHSxSRnfuBm2FSO6UVHPSB2OpJXb9mDGS6FIvOoJlIurO2eAZ +irASKWsUFz9T8uiGQGwVJ9OB2qFEKY8Vyi5Zq1l+fC2R7hralLy7KbJZowSe2kCHYAopi/kPjwXZ ++XWBx3gamELGm5x4ZXjopVMDXZQn8RVMDuKnTUXxZMvmhWBuYbfm5MEnueXORx8rs7cJKLH4JBMh +1WTSDNtSUbYa89/X5ebBloNpTgSXsSPxItLiL7HlJh9ICcQXVoY+lqoOAi8FupFW8itluZjStyQl +2ByVlOREGQGGJ8Acnpu2IFoOExQ0UlSixylLU4c7GPKJiH8lMfYxEeK1aScpkN0gNGrDYjczDCPW +ZUci1f8S72v0CVUDM2bqu6nhRTWiYRnDs3mi7leWeD66R3wGAWMHu5w7KsEje2ZlYDUKz7mHW9Tq +xT5g33epIDOKG90sunguLF2c0LslXTxrXLvo9wJw7+ctG1wKOrnH5Uoiv30qbXatN6RcpT81G8hZ +IgPX6FxwXyz8/SwOLCuOXpDPiSu5gw+U64vWwISjKm3xtARrMU2kdYKW7h8yiVIWxs4eaxgjSgW0 +F2ByxEThi7eukw2GropO8pZzC7xamZvwb2wVZ5o33s/ZeoqEyRd9DnMw+7q2/0WxCqZ5b7XYZfiu +trcF2m49YiHPGDk19sliLbam5qmiCNQ3RwE8mf8NTpihiaihaT/epbnIYq9WNxWZKsVXqowxx3x1 +z+fZV64wsLOp3nxQjnNT0nYOgSbCLFYMdnpQf1PQziru6OEc/iSjQh0h4TpGt3xN/c6hZQuxdOI7 +Ca05DZX2WiJV+LwOx8XDCBQXRTTOnQ5HlNULGKt4wgXzxf5BA1v43A5HwFGwIKssGPSrzQEv4mJw +B6+sm0aq4BGtA3uJT54XACgRvkZEAlT8yw9RHLg8i2Xzmi87WrXFSNZ08xmOFmJ4da0k0bYU9oOn +NfGLa8Mrht4lvaiBrPQ5aEnF0TvzqqxIM3KTimqYaIwwD3NaVp6XioH6FqJEO0qz0ck81/IkjIdU +Ay8q5e3/CdjJGxsvrw2ib6FwrIlEWGHaSrbod/2lzP9YClrGce2WlvNiEMHR75hSVUW4akgBMdV0 +/zR9ppOyb/etJmdYV3FpwgkTM8IMmKPWR43DGYb2R5OpLYuk54C+snb2QNjIVBtlJC5j74g634Ax +BHnGwKFuia1fDyZGFkHQfGg0TzxaNN4B57oJgPjXFlyY8gcIKtu9Ly7NwnebIwMn1FxIghZ0jRhB +2GDqtZiljevluigE9NUqE3LXA1Sb+saNsqiPHBukDt97iTIBJGRaxV2XYiDJZCEb+EUrg5VCA5kM +W5fqgRqHtFeOKn2j8/k6wBMvFc2UOC3I9dODeZXx/V2N4BkNh32rO1pvBAYRiJD2rYHUnCEuj9xu +QTvx0qG0B5QHngXNNTkU7rnuLwyoOJx1BhcbSj7WHTcOiAzPpDcBIxeDDIeeLEIGs8RltYruHSo3 +7WyUFGtrNHQmjo4uADOJffXiuvP7Ah2osaA1nqhd8a2IdxXGSRvFHR8diJ/QxFcsqfvnNOHBH7bQ +eyBlBFZRSI93msH0bXWTVq6xyUWFKZ23RXveW6E6djH/oUeYWqOQSefH1Ma914RL0+FsxlpWxc6a +JQ6F3xpMm+MeRZiBVoEvRIdzfBsudFl+hSPSQ65VZ8BSnG8qBMy96Af4WXzEjVJUFYqhn/rUh1Bb +l6ysQj6fJZEkYRbk6MZfiDGQY4pSwPVFAZw6KLogrN1j5ScVqT50xb9EPtZZReXetPw0qSOCI6iJ +5xScJsCn7cZlc/PfRD3IwBi/+QAC5mqQ4HDXWmiflnc1ePjsF1w/aPBopWeoVlILQ5A8UckqWVH7 +LRrISza6I8oUr5rJ+P6lp9spDz9M7v4Yzdi2bgzHL5cgctSKDyA3M27js0kHZyfN/GpBUodseO0h +Ktt3xFDHHHD5x1dB3GNp39Z06a6DGwrawPyu1AV8zX6LZ6aCpwedBEpL32JxxuaK/50oMeJqAEo8 +MBXN7UmcUZV3WYFYiaR/d7WB5JIow0XLAyoGajmOd/YU7BovE20KhHBC4dyQMIK2fw55UFXrm3Ic +ro0YEQ7CHsj/kOYvkH5f+4nNc0QS4wCKMP/PN18qQVYh6VJa9GS5nyGjlh7vPKz9RMGYlzWQvwm5 +QGYOQv7Fo0XErTMsict8+4Txc2eGFPgamDs7sXV7pvUCtpN1HFvrRhjGQR1smkgItJ8z5KFJ7Pb/ +PeIuVG0SWyYpPFK9S6KeyIlfRlMvabE46CejacB9jeOAlUflSS4v2GTz4/O67XCCMDxB0fdiXVbZ +RP2ni5wBgbyx01kbRkgJWh/5BGwG/JWJOl8ABlmXNNpUjkB5BjnNtUAXq7yNonmIaUJSHaXcw7Jj +/MSXKfhkwyvH7rCiDgFxlwm+V80EECw2fqPRzVvA8qjvQnQOf2klJaCfBSlkdv0XlWhvSiMYvJcs +LPiGDDCOTVoIuzRDT94apQAhR49oFbyK3vQ/Qp1kHtIAyAWWFN9WSrDPn1epQmoLe2K6XihyM+oZ +AH57kjp9GeXePUxZKgKCX/4uyj5TEBKGMaKLfxhu1sE88r5FDsAsohYkfKNcUDuxXTx9cOqdMrrX +60dVcWDi04KxrNiJq1MzEWdWf7B3oEX10wx1Y3mZ8ojleg2xAKZv+dbuSIblQKxZcTdm+ZAYW3lj +jvbRUPyzHYL7XrLF9PwwB71PNXiYpMn033RxnTHJis6aj47NypnvOR2voQiH8ZrxxoZriRf5Exto +A1C/limy3ltZEhGnVSc8TXyfjWnLKCUzJLi8PpCroCvr9F/q7urIyPntQAEuQMWwc+gWPzkRmohL +pHz+XFspMAoiBT8E7mq2YQfIofEyF74DJvF4jzsLNFzKEoz8SM3k3rfMfPNlbUAEw281NewPIjSM +U19RVCZHXdMvRELsIlqEPcqFgxYTmH9OYMCBcpEauDgCYWkmh8y0Y7rvQnaTeBHRSQ3ETduLvEJo +YxqMoaXX/B3nLKyK0qHhsdgrgesWxyc7KwQzB9F4dn+p86hDOzD/lP/VhEVC6+9aM6PJ55MXHj0N +7+3WBElb1AWPSJBh5DKxvaOseDDeQplvSiAxDJcaEUMGHFDdbSex+A1i5EivNsbPMs/KTp6mSBrQ +aibSNN9yFbzVyTNzm8gBNhip73Mx6WZ//nPMNq1L3FRbogoLwqdSEeJyWkq7ynu/3l/usIkylYm1 +79kpi/u4iDrToWvx9Ck5NyMX0K3rAor+pUWTh9+Z8s3D+23rYTDY6MLpT3YkwRQWlxLrhYOnbWhx +G/l9VS2C1c6D+PWcdy7zRQRy/pNDXSa4+zj1WOzWL7F3rOu2VExQLY3ETRuBOcECWrMaebsPivgA +8tqk2FCl4+AzDyQ0+cxsgBMuHn1A3Po58gsKsFRSpmTuaGTaU1QwobWzh1cJmqqk8k9sSxnYXqmr +1QOd4z61K666nRTpVlYhz28VnSLXFXanx+lXRL116GmLZyUM3WT82/1k5KrThsh7RxIMIOAbO0hU +gqWl5J59bJLlUALs39pi/5bdTAXPqXOyEQMx3CcYF3hxh5gcut31+8cPiaffeP3jLYqwGC1LO5yj +KSS5VWTxBsrM2RTJxYeH+2NLX9GumxlETBGVQzdivr+UhwfyIRBQXM88/Qs63wm72PcgMbzHGrHp +oVB0WoNB6R3borrN73wVPvamlGfD8+EYQOQkpZQFWryc23xrcUKWZG6HZQ26yxmkDvV2Ix3qp32v ++IiTHtdpZven+/QaEWH1uSyqHo7DuUuY9JI/EXabIAO0h0n5Slbmsb1iO17KNaQvtyqMFjGyrZSJ +EbITwKXmTp+jrIh+JAiPcfQwygfdZbZXQZpBxb/59oD05dz30LJxChgrcIzacurpubIg1Kqv+nKE +lO0Iv5CC3NrWHbhgaKi7BbNJIP5BsuxP+Xwlb9nkfxlloP1t/Bke0C8LJFpDuZcFAZTm8TRAsn4R +03zYqpXTS/8yGlnqG2zaItLd6rw99zHRJ9t8GD8CU0vAiZr6j9bnGgjDTqhACMA53S0fBKbDDxc0 +OWbCGuKs5ryRgJL0Al8od+NcXbhwO5M0dgHQOc1iINb/kpbIPmNkdLcXbSrYiM3seIA8lsDL02Kn +SS0c24xcOXayDNRMD6fFGeWiBAihQu89qOolTrTE7vapT1idWaAjnH+FLQkJEwlqm63l1j4cosEP +ZqSKLG+DV8aXYd8bGErJL3+7cggUCXduTCeVtUBmJ+fmYkdYg7CT0avBxOOKJrzBSnqDxwdsAaU5 +crEp9FRYGcIPH2rijUkStxcEtN+99drHLohVEDqwJ+AFWLMu/GxcQtcTO6Mi6+w39lC2hEKHpP92 +GkH7E/Wm/E5QK6OZ0qpIfnEIffUAH+6KZiv2ocMwn+KQRCC3PAKp1VxLhehBY6YfrarVPvwtpw+K +Xj02aZHfsupZicBrAYZ5htaoG5BRLXWZXk3LYMUyJn04sT5L01oN/EcR7Ky3hv/BLfBUhPnseml9 +NY/lOnQxYgUqd9D88GRu/dQpogyQEUP/bC3fXGBFnVKXlnJTqMlclnzEYmTnyrwBNoQA6pq76syx +kkQO/dqNVbdtmYPF3kPZrP/wHt6PJNLfuONHpqfUKgdktn/tHr0XDC3vS/BGPkhwXLLp1y1eLRGh +eAauHbiNJ+kLTl75rCDaCmCNlqk825X68fuupYZhVo/1/fVjHVWQ31RH5RjS79yHXO1R1DRniBVC +EGYtgAfLK/46V5sKrhBSsZV9/Y95ILlmZy0fIXCJLyOj2tlPHrG+vNGbV2ZCDQi+CrJNRLuKYmPF +42tGp2s45hfKzEk12RGZDFxAznMDBXgy+tHkhqxp/N1WMhMY45vkd/WwCrhS/C5YzkM7TBRD8snN +ZprGGiXg6LHTDd33ea0qurJbQ3IA+EKZQkiOqq+2JhXmwAXiJENqRL4MUZY7CG1dLnACd7F1sE2X +9b3cP8DNcy1qIanBVBzIm8pqr3kOMhUlqdLL1ndRf9WkP1gc7ff0z9pM856Sq9A/6pbY8P40IMuk +Al4GyXpuzCqHW2fB7exnW14ciD7GhVYt96pE7XSjvhUssXqb+oI/k/y8ld3ALf6nY/st5roIdhIn +waL/rHWJDI/Lp0OFxiKKsdBpki6Elv0WCjTiK/OA38bb/SjB5ATTOe28fO6LyCPMy/kSlldVmSDm +mIWtzvHjAEVkX8J1ZqxrKHM2/EPcDpMX5tsGpBqYJUJJB3uAZfOEqXUrAdJSMxnD4O/BIH4hftp8 +7EIIaRvfTnpextb7fAQ2APgj/ecT5C8qnbMqrropL0WgVccYun5LksFLCd3fKEMozJK+bGD7EPIV +pXR18KLE/f05LjOf6BCNDoWGpdSI83d60YAld4EmMsVo9p/kOTxYgJS5mn/qhLGmxTBuE41UwODg +r9CTRn7iepoKcvZ864O05BZM4tLSOsUxz3z2qnnh6E5/TC0VidQyE9JbkTj0zRDIGHW3gwuUPLNv +A+uba9P2EdJkIII3S+VRsSALi5AniASLRL0C0cOYH4t5MMGhPNzSfwtxdPyoZfEtuC6ks2DCdNkj +wsbQ6etiJfSiZjCA6SQZ6ZuBjEb5h5g8NLl6Xjtr/7HltR5T1MgEyy0l4F4d0cKoMVf87nMQxo8t +qJwJuRuZ7hBHkX+K04pwmwwpKG7QyNwt9GxDMALlLWV7tOBbtF5RVPDR4g0qvPaWr3/Aoal4Zjfm +9lxMvTuzv1BTgelMoLOpTVWrgLLw+j3DQxCEw55xTnlm5qYYpQ1x+2wIfnnxrUadm95o1NRRFTBQ +DMCeR7iE+siluq+LzuCfXnW85UNcp2Y6l7M7MjH18E7uZ0LRCv21wSxomgPGfTHIsQFeK0GhbfgC +1fb4SItBHStrBv4zq747Zex0AUBw6++gRLcXQdqmHeR59r6vNS4YPi9/XkraGlIFeWIuD70OY27q +DWkQh2WOtVWbX+cciq0aKINhINTclwBbA/Oqp+lUvBw5XVStcPUUN384QBBJDSAlLAXaRPTJpGC+ +/wy19NckZL9oedRLTNC94UVHDr/S7doa7sEgScmrwq5nae3z05TpleLK8aQTiHWsWH4Z9xgzPXu0 +PQnzkLiKLXnEaG+hCaX+AuUnDngHze9HX4ipG/W3Gbq8WJiQtZUrNpe66v2ukVcqticyYNwMNDLi +bHm1d9mZM2ehZCs1n9RavPlohXY3aLFG2A8AFAjRP0FrVzNcqIAXCHAot7wO/RgjdK3lmzy5+mRV +EcuaGVZ9FL7I1chGjjEZ64fiiH8UNwnXMYeHNuDkMBISvn2xROcdjyf7YQD+Qsd86EzNb74Q6Ext +A9eirG4XTqxdeTR80Hk7fxn1tOAThw0C1+gHEZjIZDQQHBvl+uL2Kk8mqG3wGrEKtlCg+PfxDWga +W52s14nx2FUQW+3W4svBhfb7JupgLNlT1ixV4JmI9cZGsFSqimVhBSMVjIPd0DIZ2vG+RCHrp8U9 +c8T8ncqYt/48HuoUB9e1/+idUQeG/9QWkFSfNOR0BlHFmMiCCX7gjIMqfAuVLLs8LOWmqwO11AWL +2S8Nat2J95ihduJpsxPdAEYz+UeB35sQRkj8LVrDnjMqZ5Wjxs/pVpiEjRj/lAsnRDSQM9C3KWd1 +hmiTj3TiSY5FOFNHYUWiFpIqvZDXsrY7Qf2pSuLqr9mvMccQBUmLBeSWYqZCRyAWQT30RKF8rWB6 +6B/nkszXORGy2s2r8oJPn/cJ6/5i9kmzOSFD6ijjSuiEy5NHr5LkwD2GtQ3z5RG3TWI3fFY5otYH +Ko52iy80LeUsRghJbcH0Lg21TCinaHNSKXync9FXcqfOyyuzI20VNYPWu5zhuDpaiYQjDFVL0r2/ +DCCEmB2+nv6mQji0LMV0VQ7ygNIm5H0uI1rkJdxpaHbXy0EfPINOsk6EKPf+vZkW5D2y4ZNnX3cC +kzzkGIM4NYaOjVA/fUyNcqu62OqBzJQpxTbbcZ8WtZutOghG8MVQ9cuW6asl3Zq3bSoFm5B4gmY0 +0PIHa3JLSN8Z0+AF30xvDRiTmq6W1v1sOLDIgpR4rEn5+xbjqoyU168bThM5BhdHJlXZeslVxIfo +T6VQznbwQxWuI3XhsLusx00ujNQP3xjXcikXjcFSiDDebCRUhQuRYUXoG/NLpBEjdB2tQtJhOgNY +o8/voZ4zfim7iHqhTMYwGXSekpoDf1ozP2NTmkegKPh1OhuDaWv4HSIEdw2jX4JmWxBNSh7Ajj1P +u3x0oQpig4fwY4deZkZ/w9eMy9L85tN+g6cZDv3jBnIoIIdN35cRl6lnNlKz8gMXcuAIj1XN1azh +S3Oaf/UmZr6pWHbSxoc1ceVoYo/x+6PpxCupxym1wUb0rkz3CDS+DBh6t//JGr3Yj6gLajpdss+F +MjZBDQB9FiRc/tTT/E+OnU4/YjLuuMifc9dyqy8BLN6L+LZGT9SE2XlM/GKMW6UtjizHPL2a53kI +8jzj+DQ+dVrWh7emXFpXoBYFnBmaWeJWZq636AEAqcXrcrKs3idyLdscPz8YOQ65Mt+LsynGAWB0 +fdIFcMRyvDEKTudhRPd6vG9uBbFZBdAAyDvNVvW+xxm7PQD8u3hrFPxZ+kJlYdJB11rwazNIUjlS +cDzBoEgkwfzLB/RGJdtx4Or27qgeCLeqK8xcbfvIu4AKgoGgBKAWBorq9s6AprQBBLRU8f5JZKYV +aeVmxYo71etih6BKKnpay526qOl2HdFed8YJ6po/nZgVAXz3+rb5J/a+OFD77JEtZpamrgmkT5Ok +lBS2fzf/vFA3/e+FIotxm9VAenVRePKeiHGPPb1N1D/fYoSO3BEeh22DCkEQFcEerZpY0vxLFxFE +42qfJHGBSOFw8zZohPxF0ATXqN3T2EPsOF12C9yOCJmVCgZBgf4hCESh+k4LbP9XmipXt1IkK550 +aRjMPDPkeRMfX+mRuDlt0AT4FfR66BVcILFYmF2HtsR3pfds3Xkbkr1Rv0v2EtZJZBIAisnYE92O +TgPG2ogeenAa3R8VlTLh7iVf6wdi68Wf66TRnmF4zgikYlqmMS7Omy8fIx8I0lfu5MjTYzu0VFfn +5Q9kL38Ow/wC3F01a6iEDdQJdAFHUS4XkbXgsp+9pdo6R2p3HsXTFGfI6zmCrYSMs1WdCBw3Q32+ +W/SZqNaD/DAZe3gfbP6xT5UbOxWdwt4Zdi0lCtXeefikdFAfc1CR7HoTgUz03AWvNw9027n4qJ2+ ++wmQnFeaWcEizEKlGyEok5Q1Y/1ijr0iOYn3fvtBpeyGKw9FBxElC7zEurlovhXxy/wBpF87GT2h +Ur4erDx9SVPYOrtRl+PNb/xOPbjsp9uRBwwn5rh1uoIA4aNDfMbgYHeMR0T/EllhtGQfsuGVECqE +VLHIyn6lFs+mJudqlOQ+E3QQ7Huqi5+PCa5T9IVQGne/MuFs8g2+wx0amVTIcWP28sCDs6MpakoX +hoaBM41u1pbr2LRrPUmJWN0fCl+CZbi4cz52RU/deIZoZrVer4mJTs/1uf6ZTU2hPAMFQRwyZGSl +eafWb9haAuOF0hGy6tD5ecxlHQYeOXst6DfjXusVVKjhKq6IBxP8aGUM5eCpzz0iQlICVN2k/D0X +fwirgIhnr6ZWFxPgl1sMzGa44il5S/8WbKCKMgV7gTAz4LxCxeuZqW1t9NGOXR18Y0zIMEByjvwq +DX6zEZU7ogYXGOq0LiNrKwH8PnZEutPxjSvyuYe1XHtchadl2/EIjAFEiDlYlMLPbgyZlAbdhUAC +cngYlwmJck/EtuQP60wGaL2y7Jgn+YwuYgMDcKo1gfH8BYD3E8DuZMWR8dUEtxv4/xQAZLOEBpVX +lEJo3AVpq9OyXyrFIID8Bse6l+/ruJ5lczPImATGi5rFSnGJ61nk++z0Vjv1j6JDKO6hyh+kL9Dc +NqtJfkGPMPfzu5Zhxaee7JxxuTbWhTTegJ3cuW2xqjR4wV4/GZR+DVurDyLjum9PIHGfRPHJlRPb +2ODIL5noJvlBxYq8tTuwL1RTO8C+diHvCsMj3ifnTyFPABd7LzxPZw7o1pkkM4slrdLxxzCRfbxt +nyJH6kXF+FY2kr7Q5dDF+xfU2eY+ETmKn4Vi32xYezKoimNu+MOT/3zAh504L7QvhLVxrI+ND42p +agkBJOmY3il6VJ/N2ZIQ0GN4faXxdVbA+k7hH9XxQ7h6e35Io93QlE3bTgF2GaRVSKXTpRLLoHId +HVHjUh+QCMULYntGt1X2sNz8BGVU2pElbK1CS+UcpeX+44DmXyid9/KGp7+iIP7jiaQ+OntUbAop +6QhVS/EW1YI315Z/IwCPf3SL4eNF5t90ZWpjrJyCig10Ny37fecohNd42rgwZxozGOJRNXiPz5yn +1qEb68+lS+wjzUcheVz+9veOiBs+GrdWiNJJZwtC4PLwC3LNYy52dSqCrVHDJH2QOwfZGiNRDX9k +bYUCrotc9VMGyjHlV91roMo/c0CbrJYWRcY2MOfospqscsHLNZyiJZnyuAo2pEAMp5ydM0nD8zxh +vkYgl7qTe0Xu3goBlxheG1d2P+mpKhV5hGi1Tea9R2nkxA0LTg+zBxZQXWQI8w6LG1ASSwJtMdrb +ZkmTCc4OynVcEdWqGutq/jk6q/MjYDk+HGs0/pD6i5drxdkJ57HFL6pnCM7WOePdWgC+nWvK+McH +p7mvM/yF8TzG1QymoLV2ywCPtViPOQ70kEKwBu8bjIatdiNN0X4gINMx3rxk8ivlssBP/rpntdLc +2Dh2XSyRkGFi/HG43n48z9Vbft4WzqcWERinfabutA1+4vCUTRDsZ9L/UTh3SKPLEjEDaosWIcOh +OHd0hhLm9oD4aEctphxf70CGp1e2OjWm5EBbnBzLlWU61bJdacpSpCWrokcHpLLl7x39gn+zQAut ++TZ2snsWleHiSPXt3fkQE3amTcyHb7sJaDqgjblybGr29ChBEsf+Y24+JKlLGgx8XfWvO+Ep9VS3 +8IMJkluREe3hOEpf+rhdEfK1g+HVe9futd29RKnnkwu0WRIfV+7B7yBTVnPjsN0Pt9GZ+8rHqmUi +2wv658IlTr/uLq8xbPEZ/yUjMXoVD88SqJwBz7fjTR/Ctq1oxzxUn18YrdF8Irk1tFSKt7HvKowr +INVAn7I7WjqNUWdben1P7BaiFYlt5KB8ZwHyig1jekzuFGrjsrB9DTvz01Rp0elsGVQ5K4jVlsof +Xc3rdyFFW00Zl7dnWuB+kKj+uFVSGyKWMUvOeawnaOtrFw0jBMItdfVN1pGoAc6V2TXeOkAXRZ9o +qFrQx1Z5SwAx83r/pRVxny7iC55+bMS2Z79sNRdZ2X8wQhNarPVboWJAP2mmG8EtTgKklrhzGp9G +3kN/DtbYlBW2C/37t9SUL6fDcvHI02jA0CH9z0vTyj1iA11VzyWEsh5yyM0c937AaTF4OBKtiDuD +gJel6dgKT5EY5UYeXns0KAWMLP4oDe63X9wSwpVUDtDNSJRTBMn+dNe1xpZgzNC/uI8igU5gSHsR +ivTsRdYsb8XLHmZnrQ/K7VcDDXTziSJ0oj08cEMNOW2ldrWIiEgItN5dB14raMj+XiPQjmkDBX0u +c+fDqXdrsr77zOrq6FcrhoWDrFN3p46gjLtK8DwK04c1i1+jvRMVF0VBFPfGikMAXrEJjjR6XbJc +P/CCc1/MhkBCaiDVjCXMFR51YIR/rujba5mr1lXVUuBY1sPA3LWhO/0CPFemdl/VHxKIeKLrLQHV +MVxsG6v/lBCmgludAG5zRzCgDeUKLjs1CAMZhcxYzQvdEXO5lGedMlMXJr3QIg9jhHoWtMXbimYL +lwX5CxPBSD01nkmKQIDtFrzttbdPqejKAjDaP1D+6tyJyItmhRXvpfDk8AVargfCM4UUk0+6I3CE +MbGPLD/NZNP7/GV8wcbY4oCWfpg8+D3wc7+VNWK2AHW4h+/VPzbvROFTMFQzk+W9rE6agnIMa7L+ +cngeY/0Np0V24k6V3g2AlzDVTbRRrweMbctPogtmZX7Ph2s0AqjvLA0pz7cIek8AYFW+lwf9KIwS +S8lJ12giHjj30UxUczftCqJjz509PmokVRDGX+0UwruVYeBZRNAvhavN0FYVosFJQCb3RbJVWk86 +wuHifZCm0s2RJrbK6vOiIY+WP8wTOf3Oqks80oVQL45GzvNTMuxzoA2lzf387FYq9SmLQTOmxvgi +txHt0/sfH3f5AlDax9ozf/2fZYmwXiRCTmFme4YpCMMwXAT9AgjfIJZq7YYu87UbTGtqEwHjEGhZ +hZyvgSP6GhGwdsJ7vYzXgmA0bPt69myuAoIdD0bDz2nAsOQqDh/6qlr9gSeJzWwku4PhD2wjQZBW +vRgmbDHvnqBLdJXtInqf8a6Avp/0zE6YfNDp9dynXgzSqEZj5v4mXUO8gjwVZf6qXrjsujkuX63c +q9EFfLM44ii2N7zOuLZKByqbp1oPwFvTzTM9kuiNnmNbBzWXFTRH/6Ae94+uBDY/jIKG9LeIW++J +MBC+/oQDPXFuma03BwETIcGEgiiNzjoSMdFAJ9UETJqIQLcnplkFn4wjxqGa1E3iMbaQEFnmmITm +R8nrNILYulVPEnh1RxSQJ9vLFHZlqABmnn4ihzpl+sUfeSadol7X+rZCPV36lQn+9UxxmSAvyHKP +249vyV7H7EWdhrPajNfvMlAj2eM32dPiQTjrrKVUp7XKBft2RYuYM6TcaXdfBGx0MhXYWe4AgY6D +a7/O1obeqrTiQ3K+2htSQ4A6EZik489z5G72fOE7BA0YWoI6iPNxAiC3ruUC5lGWECa5+J3NBgaj +JDs0zVByMQ553zUHPKpw9g/YtLXcHYqOUMClYWen7dQ/VtDSHiSRCpi5f0e+eq0Eqbmi1l9n+SbB +19fmlBwQYZnSrTaGDqCaX997fiBP544j4dh92naFVjUaEmdkQnegP+sMCHYAt5tEtYWBV9w5MRiT +azr3oWKWQ51Rl7UY+iFZFl5QrlDnsCYC4Dh3iow/k8+JmPjhgQ3vlWJnpEwzXUicitUK021cPSZ8 +5vuku6hsSuckH81cYJ397jHUDx7jQPNO9uyqNiq6rg7QnB1Pp6bdAYDNHUQArfH7oFLRIriBj71J +QjW1a6wO6t76ZI47qj83/XESa/1dYia0vfsT0B9OT/1ks9vhajh2jSS2d0SPof/Fgx6TXGxwwWN0 ++L4oXwUQp39NqfcTYMA6Emn+G0/n4AMLSbhGgBXX/ChuBzgdSvW8hDs/rC/Ks42qXMbuK61RogIH +T9EGN/bfl7cc2g1vRdmnmttgDRRuFMYCE9LMwLecDH7RF5jORlifHlTJfF/2QA3S89/jr48D+VP2 +EbxXCQpQfxKRi82nPPKmwdtqEpDn0tIl2ED7S5wnVcKGZ3kRRlBBUaJOl89LawFOlosjFip5ZNLb +6gIiAGZsf8AoBT5WOZvaOMsKM3uogg8TtAkqWJujg47Ow23NHhi+HhqEGXB6x3/aY+G6okh5oDO2 +rgWp3ijCjgfptS6g8A8ygucmuc8VZestDT7V8QVMkdoNa29AxOtVJiwMm1PaY8Ademvhd8zfs9lw +FliNjLdrvFsD6+I5qqMP4lZANIY3zsxrDLCY8lczSiDgrEJDJOTKZi2hH6OvsIBQEhPMbME0KSod +2lfM4jED0sh5Qj4DkizhO2SbKLLHhSRtuNpoawZmgFIT5dHMAvnHJP81jg6YHRJhBgq6SFpFeh1t +Qrr5Vvtx+3RgayVSqNzESPw7sH3T9tdtvgwCzaechUiEmZw3DdxPdHC+RphEhI2t2RvYUaNNNQ3q +uUSgwmCQhr5/qFPFBXCGwfRM1pNwARqldgr419fPELVukaOSjHUTW6iB/jJa3s1B5Oczf4EY8p2r +iy2z32QIgV3yrhEQP1ESsyhTrVSKAjI6V0G51PWVgMqFUNE2K/7rQqxsV5oZ4uOZFDycE6+EwvaB +cpPIp4BzlOyvm1TaLH4aah6Ns/aDiSlbvqjcQY9N0UPOLsdShhkZEgqp6rQ31ijz5OctNHEYj0LO +JaD5NM76PHlaYyV3DuydtvJK7vWUw1KeUEku4INCaP7OLjD3NAMQI4mOAgZO45751kkpLEfZ9vwz +drTw/WkytaQ3FaN7ZtgZYwsSkiD5uoSyd4rp6BENvMjfhPomi5fCpFR2MSGog98Z2XGjF0BW09FG +zSPBaNmlte/B9i8Ai2eeVpVHai7NpA2boLztgJ9Iym7T92wMvKgXWzFFD09/OcXbs8aq5P92rqMr +8ZNRHMYE8hEw7cxZ8CbrAXA7osIO0G401tyyhUO9stehZTE1UKOB7NEYoJGk4B/Uy26CBLZbMc3F +nbN1pzXVncsw0XYC0iBt/+ezV+ldbTWerBE3Gg/0VCPeTZAMFE8OrvmiNYXItT0D+SJ2F82oK1G1 +9sFK86NWMBdVOFso2cgcQ39nkmZzSLgVMw+rO5ZCwSyZdWltmfxzL700MWBvOrceR9DAVbN9E2Nz +bSSAm+b8a2kPIzZZjYggny5Kh0a/mwh01QNWTLp090V6Ljy2RcZ7pPjTkBAI6qvFFb8TcP/OhHG1 +9Y8MJB/Yx1yzygiFBK0NNxW1Ji0P9Uw/+FLu18PWN8N1FNYs9GMKt+RBksOBY+lELn/4dvMkJeSL +868IgIANwG2nrCvBkEIGXCymuqDskZNg8CKUoB624R5alGOhkI9kcV1mh/RoreICRltdFOFtyyU/ +549AofC1oHMwdNGMIcuyQL0rbR1BTfRbxscBZaoXYya9P0MwFT+J+nU2l+9mz8F9EqwdELOICRb3 +LCR4gFso8apvefdVMJyTj7RiTTMdTB4hECgVr5ZrlLj+kaPD9XwDLNEhcKWmfwF4S1DQAOspQk0t +31aXFcqLiYx3TZ5m6IbvwvcltvtRRjllRVwdBQr1yjEcJjQVYNNrxgGYgqTHAZw1XMucLYW0d679 +p3m1wH3Q7mc9q46R680CwgQZ4ufcBICfRyTmHrYceu13VsBcbCo06hpnyl9lYpgjOFXuHIVUV4tD +BxzHoUISNayAxKkH3+CU55XR8y71pDh9qkk65Bh0/uubWsyWEjOZ5Fsui1GN8VJABqNRI5mSjHjL +ki5Ju1VbXUl2iXtqcnJiWU65/gImU0mzpxTg2ZWsxbHtOgEo/yVSw5w65wx6OmJHru2VqEWwFVRg +A5Hyz64ev27+nZ5Dqn2eT30BRNnGyoqEnsrNSNRBOgvBMBAFev4ZNfVlJreDEd3xoGyfutHoG3aM +LierEtKRXuE9YQ77hmkBKYLa5f82VxPfZPiWF+x41nnH/Ln0suK7xtFv5F05Eukv0QyfTrfI6wod +JKf5bEFu8Cgp7Mb6bCBq2aiGU+6kaqN2Tc42uH5D+DHH2LnyOFu2D0fWNwyo4q1RuTYlfdpOVfWB +ylmXORgIMEZiH+gm5A447RsRzzlFCNQuJW97W7snrm9ZvbuCSsI7T4d7ohO6YrL9DlAlCdZ2wSOg +rKUVUj2JP/YOYbABmGcHlxAtnwqykWj8SmDW4COEwcEt9i0+S2M47Y/aMykEMoWFDOIz10eObaxC +g62n632X6/L4UJHOOVDNDPNqq4H1OE/LlP+odyG8/YzR86PKHzUZ+voh3EV4/4xVqSD5kSDPOZP4 +78iB1zmPsQdKgoptsqJoGTv1vQUOyoZcz04mW9T8isfx5BR/sFximA3f5vfDC8LP0UL7wsU3O4Od +cY/MWAVJWynmif8bTRZM91rZksKrhdC7A11SVaFyugIJQl38gptLFISFcQZcg1cbpiHB0UP43/3U +VSeVLc5b/MT0dcuDgNAR5PXyAWDpxJWzLMZVWxIdYpYOL4QKJPSHwrwDiNd7EeA6D42qT16V9bGW +pKsbrHdBRSUXKGAyfO4B5RPEnhQL2ARzCSsz4kXZVhYITBbGl4qS+FmF3M0bl6YzKTmkTdDdS7vQ +0rs8FmljFWTO39O3T6Ag1qZjIORpLbdqdLpA3XiuVenVBfb0J3gnEfLCC+iEzYHZGV4ww2C4t9zS +R/0x8zTcgZEJljMLG0coH+fNsmFJsJEu4Z44GYl4MzLOvrXS453agg5GYRxzfpPB4vXS/NC4hTeq +u34mHwBgOfQ0hMnON/hEiIwNSBXgMiS148q0Y3Vn21UVUxibr8GZsMZtF1gS5gZQyiIEx97IpJID +EB0qc5chiK5dcwMCO1MB9eWelUhnhvSSkPvfGETcyuVtgEhVIi8mMptYEVq7szyOPhyfIP8I/fPO +IOV64UHvflkJK42S9sldGWz4Q30OLiKBRigPJzqPsXo3TG673eS8dKRhEz9jQtdbzzrhPCrTnFP/ +WQiRmUstT42rWTxAl8xd61Jvl5KZV5nBABDL+RTO8KNLMfqDqNgddIYHUcWYoXFO/+KESa7mUDcP +ARPc18B8WjFEftW5IHQloCClDqOUGrEvi+pPBpXKfEsdI09YtZLze74qh+jAuass5W9ic5yNmFpW +tHtrSoQtV01e2+/fpqVGIyB1gap4DIkSdugvbB4VrW+vmbDf8xEEMeVO9WiO4k4lK/1gpTpFcorw +ZbxhGP+hLUZEgBsFvBg3c9XksiEXiDBO6J2Y/3v4CiaXXzqVJARFGOBJib70u5XmqEckN+53QDOg +ADYfllnqllYIdqKRvMpFuO4QzMUtRagP7NRR1qoDKa6monPATVT7FrC4Kd8t8y/Exxe9DZyhd6xJ +lK6nVQa8ROYtCnj1OUl4MHB64ZDmtsJwSnhdrRsgFnfHDBxfzxVgKyrLMgNADCuVkfCJIqbKNrQE +SE8BjChZyttpdUM2XuklnuUq+0HGZQwNuYT3Ip/MMRq8if05liWCo9qsLOWoW9yj/AQ2FiRHkMV3 +pvhdhKo8C5DPdEDxBvUhRVkfrNJuvjaw2IdC1EwJLYcDoAGmacB1vC8RuBLkIknGIPrJ4heFuHmc +hF3ZyVbcUPyU4VfNo8bw9eqzNSso2w3gir15FzbmDenVlDZGJHn9K2nsHQwD+mlN4H9GrPRJsxU2 +oE1pwJaqi4Hin/D152rgL2uODnX9hiDucIMhIIAQiMshakiTmwTos+Pt9zlDV9Z6v8FCYkSk3LKF +SWYm5pzDGr5/et3h6UpNiQ9i/3x5XtjiIUAVn5zDNBGyEczskILgyl4O6WQCK8gVbEkDG3VUfQ+k +UCdyBDvpTJf6tnwlOftpipZpUVmfmrnvP+PSJ+aelHsnpMMP1C56LWS+/7ZqklagTsM4efrqBFEH +BulgP3odm6wcKVF9Brq6PeSeFKOD0xwN4PxEE5Mm6GjEQ3rYt1rT+0O372BH6BsKZv5FS2m2trGB +Dqih17BFUCqIOmFnu91wO3voqOus94gKBRDNlqWcYZ62Kh6W4R1OgCon3ToRaccTn/tsJe46GvQK +70q7yiqmwhGpezGUAps8DTyZ7itifui0e2nuS9lrRL+nFXxEtfCYl8ei8ddz5EZsS3J2LJdAZMJ1 +EINU47CqyAyjb6ST0mKWQULjGX8o5bP9KFYKG9sgiEEzJ+IYC4IL5Wt473LVLZjBdVhlH5Sj/Ga/ +54A9w+SKbGHI9HzLvejVDV+QfMhLuM0kbxxkIdsgxSaIZi8i1cOjhgMRmXOweL+OIDyxtYXukjYw +hQTmClkBJhXTv6rkq2IZDSF1N/3LriDu2DQdVlEV0WiV4vYRWEP52ngYwS+8RdeUNL6rO56Mj+w6 +tyPptaFPsUA9WaSjGXktxl7YPqepUN6haQtVAzPRllOXDza7f+TUf2uTCqMZD0WmKuVnklbTIC0i +XKdPAiYsc4khRCf/xU4ngb6NkBpq1s0+JpdrDF02u9nmoj84xKF01FRT8lbf3MMh29uzhKyMK8WW +0IDS1NOdfKxIVx2yfSN9oXEcGt7hEOfrmkE4JheOFAb3+O4fgu8GRBEi0FcVZDg2bm9zXh1egZJ5 +tfnFaMvl19WsWubrazmyAuYNZGeYVbHDSa+TaCEwmEHNg0qBrMwsdqijg1wkAT4byk1JhEhFTcxa +XTirUM/waP3+DXOd1DxlJ7wd2tBBPlI1WNAc9nD1y2gB1XhrLSGczK/3+RpZPx7hXmakfIULHQ+Z +Bbc255hmu01vq6VuRO/ReBO1kF8VkXleKO7uJF+IdUV2r52L693wNal8x+lHVv8dG+Qu975rvMKB +dHiAW1JqTxNPylwj05en6J8aS/QV94ZZGZ2fQMlRxd0+nFSjQRqW4izgKBdpcLg3pVk3fpkh/gr8 +DgwqDj3+Ys0f25OVnykgs7Cfd9xrSnyortGQ5FfPsnaEDxLZlVjQ9vaNqUb054/undA2t4oVQxxd +tIjBZG5KgvRENgceR5WPkNkkk498kZMo6rGnEFXkMApQg2j7UeA2AAhth16/XGheYoZYDTaBNxKg +ecohYT2+5G8rkwL7MrzoLxIAReQK5rXOKxPyYGWFGAnxs47l18aNXmawO2wmuH3VyPRCdkPOpY9a +JujptGtGcUf0z2xtSybnYkFv95UFIaThcbWMm/UxIUBDjWgggWwlOazSj/dUQej53SvO+KYnqZhL +6KWmyIxazYaoYmAjRqMFB0r29W0VdfPn1hsUAa8qoj8L1Go7JG7gPjS2GIevkdC4HaL2OreQ6UKo +yHT1cdT+tla2PlIBZwPD5PGYxENiJwPxQ/RT1Pp5oXriIFYFb+G2B9G1qOMV8XBM+Zkp1jxLwX+q +sSb0/rFNv4GZqwJ6JELgIXlkRZ8wURYocmv0dnbRBVZ5vUGVDNc3etoCJ4iG8jib5FLDuycE7tXm +LhynxoVJ97kjm7Z6CEKPMZga+GaVARY+N6aCBq2DYS/DlyCgA656tGXT8kKJiaf84nRSImzY6KgT +MPTpmRW0j9dIr14lvwi4PqqyDBBVZArjbPLVMFCp7tI44gEdSE6jSfWUjS+ZcWx8JY6+87wdwDZf +gf4p5UuF5UGoPeqpL7eyxVGJIU0XIOrkv/Z9JgeO7NjR6ZA6kuqJE7yi3SxxfKnGa37jG/bj0Tjr +yiAyq6r8A/K+o8/g+8FC+S3DG5A9YlBRCtMr27rHgjguRNwUa6S7CPSai1m581Be4Kxwj+OydtKb +/Dsq1CWCa11Xnr+v2EXcrrJQeHzqOi368pEIi+Jjwdtp5xoluHTxlPIx70pL8/sLM/nydiSGODmU +Zn7c3atbWybiYLvIhrgvvnTjlWde58PuhfEeF1qCPXscXnCLs4W+t1nx5kmBfvup0t8Mv2WORPwV +e0eOKLWJcKN1zsjz+tcDER2ppFlN/MbyxhR5RE4PnyEHhj3kKvtkpt2FLG+5587fjawXoPxg1r0T +4u88dvZ7rs8udaTv2orrBYYwFhdvCOoJlUPM7nJazbOjECZ5esfq5ndOYmP7L+OZsfm12QOYdti4 +Mu1STFrLz26B4oTk071+VTo/IbnpwQ1ccNxq8ooiKELcY4XV0QZdzL4bRdUzT1GynLAw/SMNg/BR +mq/m1EMbrpq1V76gHLS32jrkvTwigX0R5y87pjtbEDTsQZkYL8nn0IgB+qBSEZeptSlke8f+ka8O +Pwc4KzIV8JVZuHZEGkV+ycqjTqda9u2JKch8xz3fQXwQv82JKNa/PCtlxM7XDfrS5YYSisqwhviU +v45UKx2qzDyDV+MD2BTNvwXOqc5FD7sEyI+lI4nFrkVEG54OLRb93Hf+Zb4obVMFtUhAIj23jiKs +ZBkNDXLv805zjqUb/VXe/XgBvTcQxBb1aX3UCrJrVKNcF00fV85wTwIHnmCyw10hRvzUs43Xoent +6I052TGsvEKBqexv65WAr30g6DlizTgmCXLIINAYepi8+EG5HTJGpstJzkKlhcpWDmkJpQlKk45/ +4CAQsRij7lNm8thmNBWH+q/YavsSkIOibL9n0GDYsTrLVuBYXkjAYdR1ODScv5HwkCFC8E/+o9Hm +opNoLF3vHtRJpUVqNSzHSXriq7XTK0l61QAWNaDdEWKweXGmsY12+G1v5dHE9ISC256I9EqGjns4 +YYfccpefr850R8xKRv0RD/J6Yi3KWJCGL+cD5Wfx8moCP/oYBUmQ2LAagQNIPrnnCLN0HomJkYm7 +KhCcBLJDY8bHHBNa/cvO5ZKhmijskeEVRO7VviE0A3niS/ThkUs0K+zWZAzNgD2NN/iZBO/cchLL +Csrzd2fqwK1sM90w5rk/Y0f/qgliTfQeJprhmWd1rApmy2Uijgw2DulWdprJ0Zl3wUPIO9tUXQIs +jDbvMutd872ehHjeYftVbNmUIlhoxAMosWmhfTYUJqusbNyr8pt9stO01EC/rbTcg9FHQ0NQ4N0C +Gfvg+vwPcP+F+m0FpbCv5xAStVUHxAaoKiGAVeK0ceTlC7A64x9EmoRQf3fconk/mN7GQSMwCT1m +JmKZVaWCfDZIR1aStBLCya4yMQGDhJDZXISZ2K3JXE2inBmK3BNUy64NOnooWoUp3ajUDehs6piV +AE9LN0E7XABBZNprsLQuiDsuYGLzvPY1GhdjSWNE1a0oHh4b6e37jZ6HJWB3m54W10ykmPPgAiXq +JL+9+KfCEj51xF1fFTqCCjiwHOlMPEqbXXj5mnGrfWkqFo3oimBs5NZL5RgzWEZqdAZyJCjsgJBI +QG/GDKfRPlL6RM0V779C9D/etEnafZAPwWNPnhX6Td8Ec4PNmBwEp8ISWdYHYGFTc+2im+Qm2ReD +0dTm/cYFzuTX5NS0GGofEFs1gR4PHyldI4J7WZj420wRZ03ayQkswLPLeQ+78VRiDsln9dOTQdnb +GMECrygOMeL9LkLX1KeX3uc6GefQWF/TZK4kHRW958lLEQt+mAiB7cq4d1nsp3XqH/l87sT1p3iu +/z1W5LnBf7E6riMieZM+OLPF5bt6Lu5wHqD6N6ikcWxOZa2u6idJs5+Zse70qv6Cb2XiecQKKMBY +u3BbCkZ5gURuSvxKrmGWSxbMdgPJlN3ayKRbkrr1YTMiZfDe51TSiq1KSwSEfQ+Mbi14RZqqXOJf +5dkdynwU0c5+CWy1cQ5IKn5pFYJi4s53b/1S4oMDZ34DZVUKzoaAZnmHNrQTMyXDP4xGSV4omZhh +GgDgwbhyXOwJ7/qjT0Q2VKVLaaZDmY18WU/DQW6ELF0hvfYkNOcY1BqP1P7tXZCs5JHywYseRd4R +bnywWrcamhPwPsoM2+WF/s7IdLVL+rqEiQ1QlfBnOri3oGSCta78vwtTz/fNTNKrmwzG4ZlprRBr +zPNjc5V4MJt1WMbBIey6MVlNlVGRpgStat+MZhtwSo9WG7szazZq1IPCbz3mqAo+rzZClT97xGQY +52CuFcPvU1VLNXZPt8xHzJeIbOTxPxokXL5pZX73mqK070KaqimlAopsaDopdSDCLxe0ZEvlvKBL +MkUmqzfHlVgaI/Rsoq9vhN0+b+7GaXwWK3kvacR86UXlfG9QRd21dqY9l8yp9jNIZKLNb5ciZpzX +4379XqS2cGcfArN4OnJQ+5GHktAxE0gg5n6bwp5/FGJFh9/8vhnREJ03pMSm/8xe2qWl7lx0RrFd +eEK6D8EsvrffGen3r/vjE0mhPsRKxxOwXxkyXktqnOreVXg0DmQseC9SZ18rm1bK+OPZ338hTB25 +UpHZ8LWKz3hqD7NXmLV5eJt3tlDii7BP7+NNnrHzWFQVQMCY2DBRCxSE/mNCSOVHTLkj0R+w3dBF +3njeLn7jBrYpgBkmCxrncoi7oWWNiExMHvHRb+YC2pOSWMFMQ74lveCe8PdvoYHmGmN1VIbC3h3P +XdsyYpuPHYee11GsUpgKYu6wJ+zFlGIt8+JHefTSIfxfZFx4Bcv9wUXedRyzsD4q89p9S30XQ10P +KKr2JYuMlbpoM4hMgZjAOphM2Gd2MkDD7xmd+crPa3Y/XVcC53LfLroR2h1wqx77KUsxC8NReJMF +gyQ4OzvAxN/twf9qBv4zir37wkKO3w9Zn1SCFJ4NrWyRJ9F69nZXBYuOhJqT9zoDktbq1OcXw27S +lKStld4SzxdAXHubkzOeocDvHwp4iRWgU//fClJbchCV8VTQ3VZjb04y1ntnW364+OE1qefq3PN0 +JjwLOK81GI0Qe/9gmn92jphAbl6xoVfkMwAhXwe8ujiuldpMZBT8rS9RAWmyTjwNPvSJiqeadFe7 +iMLmqHv55wFC4rmFbuODvuPbFf8GwC8tvNX53OpCsZZbuXCaWLUWOOjnyjuGO5QLy3ralUWoeAGk +QVWTmgbJX2e19qbL2c7CWOgKNYjvDNQkw1tJn/VZkZriFbzsBdhLe7F2HtGXKeEJvfnz+lYXEVVk +xLSsI64uXEmQ9QaYOKsSySqmK3bem96EefPxinndRmgU7l5oQHNXY16yViXx3B4FZ+36nl8WwpAQ +NnEizog4X2T8sp2YSoXTzRgVBoPo5myDM+gJ+/Mj4/51aEgSX3cXH5/wappBraAFzXaDwDMMqzHm +UKcfEaoiEI4B/c2XcXNDrgb84cuQxD+uhsc3Zd6TE3XNUMQD+fdTFBcID50Ys1TGv1+ZQqME5pPv +qpdeogFBGYKsnDDcIAH1utEVbjXoxk7Zx1rIcwFiBHLRswcsT+mME61N6XWLMbByabt+W+46dVbf +Pndz0efLUee4rYfa/QWGBph2tFH4qBiIGvGi9Rxvz1jyipwd1sDVyJjGNseBcgslbkxqe9Ze4VHb +s3sE1GGwJhXRWIboFe42Ok2ydRiSraCwA0GqL9GQbybUsAbwDAW4lorIst8wXJ9ITBHRxfoyqwZ6 +gXy56/lcqgNGlPVy/fZTFidRNPXWoaIICcPDDTbLA4/mv+W5rXbHPU8RcV7c8CkgE2vqNNq9VNUd +G/q21weW/5G/F/7B+E2Vgx6ZOpm/BLRrx6OwkW0wcFq/0AgjDO/Qv8Ef35ZR/khEFLFIisAnbwf0 +59mCX1+zqIPANjuNn8axNCOLIVThomGUbq2Nqo714PJTj8pDtar1vT/nibS8fmafGMkb4V55I83w +G8qGGQiy69eytldZ709mnzQjPRkIRytyzkgjV7YP3IhBRanNBIkjyX5/WGR9kHLuAGr1myJ5z/Ug +L0xYHslcBJ/bNJnIowgvnsQhglpqNXXpBWJA7ZzgaOUwRzwseTpW2nfvxLArWp6XTWS9uErH5sYz +S7/66uYZQhBXGp03BDGTh7NX9BnjQ9jrxszbBmzrE1MWPh5QFc9y99tKwvK9lpel3Ntn/zXVkv/N +Zew0x/UMFcUcO6qG33gQ4qpR+xtuHDrH16Q/do7aIA4F8hs/NXCILlxYmcxWMmWYHvGn83USLm4g +l+EWlHYM/kysnLWqOmU15nykDSe7fUqsLse5VgzM5kq9UT6nPD/zfoKos9Lo+fvxHxX2Y84VcLCU +P9IV2ZwSV+cV1NiWL0+gwasX4o1Cab6wxyyq7avUCau6g2xEGhkFS7QHciWmeTfPBxCV9TxzubYq +elpCYdV3r3FR6lP9Ca86QbTP3SxAZoKoWDJzmbEn1TNsNDS3q5kBU2wkDmT0fzsRgidaa5ApkR5H +7kvJT32+QuJJmpQDO2nOoQ0CRhsbppVEiWn7l3Gl240+B7qMKzc5piGz/UbtSvjsCampeeuKq8gn +DIFNL3DeV8K1IAmf6CbK+aVAUoF/vRKGzFioAJRG9DsdJmbw8OGn23kkHVrCc7mmP4LYMwEkFBRO +axYCv/yBMN3ZhBsWT5E1BKspNNzWmR0GgtjnxZWJZW6ehXw5m9JgBfOBsVQwXi5SHj9Akq17N10l +WwEmUKp0et0DOnb8RsQoaRyugKOV2BuxmGLF3YMERynxcutsLoWaTW74WjMdNDAyV92EE6r3qzKC +UFQ+ReT6zCwoRM4CYE9pdsBqWLtIwKRYMKj4RBIk9S6X/aH0Ert+ugFpV4STOsPCg3AELIbjoNAE +jdd6MBphZ3qMlSfqREkbr9CZcEYJPii4i9BlaEtQ/p6gC28RqEminOxhjJ9WWICZYSD34bziB6Sk +S53j49tA/4oMiEt5dvbLw1CFtZbI1Ec4ivEiWdGCHcQPc5Y4T5hz8elpEG+7O+kJdMy9Pcm4kRNj +iqHhtWfLo3B1NP7SnVzzcj2khmYfbjlYuTYDq/lOjtxdTrDFuyUFIJZNIAEk4CwpYFYgmDRaBy+a +0SNifOwcsi7GJcN0NxHs2YaMo7EHrLiYX++JWldsNaRIOmTsGzP3xvp9UBIhKk8oiV1STZ44yS77 +72XDxacxo2BpWgzQrswnrKpLeDI1ebD95YigZuvIPOgeEwuFGoJ2HotqBdlI67PGm3VmERsGUjyw +QvyvHbAR/J7kMESc/WQStJXdQ6m+h2RHnDS32lBcwdf+ppmQZb2pk4HgSAFkAotTKT0JVoec7MvU +AnUJsHjJ8BkkPZ3n1DAqo0MYlJvZ+Te/TPYOhe3DEATl+YrSgoIpZuX5xvWx3hi2Ni74Uywh1xZr ++83s9l0+velvon/fs1SD/LuBDq7d7v7Q9qB3kEEyCnTULpFvZc35FqzqExGLv0VSTYkar+b1+ePs +bfFPXUmIHQmpANZfO1IoVIkuykoOkvVtIEMTj3vic7iyf+QVwVJRHEPyNc7vB2RDvd+gmpzUZUG0 +CcQQuuPeyvphWJYVvb0Leryq3yJaKirtdjyKkKdyRnZpJlDb6yqQx3is3Q/5HH9K/4ujQyfSComM +jDmscbKSyFblvq37FmDQd7nIaw9OQYFjs4eqw3oYFRCy54tqesI8ffQJ+VJ5tJKcHDX8YmEqWWe6 ++GI/b7HbPkJqVs+Zi56+uE5t71BR+FEYin90i4Xb5jtyWDLsw9pBTRT4jbt+2FIKmmXaYsjOJ++e +v92Q0CLzEdw3ypI/JGw8H1qKlpHd5S0y5FFbAqiDg7KCAarObPA+LbTES/zg183W7sf/zwek74nT +CBGdjHGiReri1J7zs5kC4d97kDQn5DPnx59dPMZvIhnLz6hfYFK3oy64CcWNhL2bVil1q1CST0YR +YSqfoVsg1XccLu7idrCcD2uRE03Vk49FOWeL3uhZlof6wikaw5N88xbXTLEiFCRfFmZltGfsfsjz +rMrwiS90ROX2z8NIu/fr8f9BKZIhLQpnTvL2/YRoWJ8ubhhKKG3SFYki7BD475l9FCsRs0WfQj48 +YkFI8ZLZc87Olie/2RnaBt1hU+uh/3IGQ2CW0SBBobfdrNjw+0Etrvqh9yo9LqocrmWp26waRqTF +9SpaMnS58HMrlgCG1LZ8e2IMMSlD+rKhwzTkyblWBzvosDWPTAfb6JtnzmUciJVvvPB2GHJox8n9 +U3aGEvXQ2OX/G6NdpK44jPNH1n3QH3KfEdyoMX3nahpvHsBk0UIbOG4z8kSbeqEXQwTVwtS9Aw5o +SZu+uAmqKeHINwXkX06RCBm2p3GlkAN7x1bdLxe84frjnAA8Vxj4/zQLXW1SB6oYEk19hI8eDBYb +ygZ/Ja9rDriwdSBMH3kiIJ05D4mKGw4c0vaSosMYGoF0iwk5fZNSx3XhygouAY4PRE3a1Q5rBSbZ +OYIExF0ApDhsiqLRwE4x4WaGEg0zDbg6dkZ3VNc2fUt0xiFcJSTX1WHtUKKSildc8ajAmhZNmJ9H +Wlq1t5rwsfPCAyRCcXepS0D7/JiezP9Ru/92ocAsh9q/lDSwbVZGreHVt+aKUzLDhG5dWbb8xbRb +Gn0cG44B9+L1A73pMGamlSNO9/DUOPVbndLWF+QjC/BWIEfoVeihHXgMhpw2JVgG0m1s8bjiGN7M +qxmoqlYcMjA9NBuWQ9Hy89eup634RU0Nd9BYauPdumJAa9Q0f0YdKWqADb49Kna8HRltCKHw2VPc +lF0nd5urvKFnt+UO33ufDl8qIq2QVBCmIABDRggmeL0s3uQGJhAwoYHkqdq+AdPitDvLaGbOgy9B +dedEMxGU8pkN9o50colmU/NjGsTEU5ai6rfF5ZvkX9Q6Jgqybl5fhmyb2VxsGHDj4IkUqat7C33p +N4fU8yYHRPmm8lqf2hdGZ6h2Sex11kNe2Nl5rOz5uVnHhbqE0646a7QjTgAusrbFvEHkU28+MYjY +f9Q6TUwfXdEfYfl6YpOJ8Y44IMXh4ozY10MOWkq+97cN9UBmfzFY1fQRIpFmTHGjE+ZPvzSi1xfe +LFZKS89BTYD/RwvnSBaHaYYMgn9nyFPt+H7jF8E0bxEk2qQcuacfoxyWzBkzdkspgcAX6RlGJTPG +1CfRT26rRrp+eXPAhlfJrcTSjRb2SGWNnlA2QTHjM7I/PGqECZmWV19p7TTj1IBDCbMmALhX3Ftw +prai9kdayd79cL00ul/JtDcBuaakN9XnJ3w/riEZ4K6e0PMYQ2W9uKZ4HaTAD8+AlneP26YW2GnC +pBHjAp+ZFcxl+JdXKbAdFLA9CXAaCzb2eC2DfDPFm+7S18tdxfxrgBbnqUuBZiH74NWrlt4JB5gI +eTZlXbbqPXMacM62Jg7jgwokXXrGUW0F2zqeOMLRM1wwHLjR1BJ7FKVZk68m0EqYnTlkAke6Hi6n +Sme0SaVgJOo6RtPV5I3G7cQD1j6hInMQD75/v36AdWwBcLTselmARTombbSI9PMKHabjcGcqpsf9 +YgQcrpf8mSnVzsJrCrzT2tlMobAntmRQ3Izap+gkjODkybP2Lf1GBTvdFrZGwP2AnFn9TnpqQXVT +g9F48Vb5rKPqXWaJIvhcRswwSb6MssWQ1mhBm/IKsx9MAGZKMZidsI5+pFeTAsKoU1OYzdviLT8g +53Jl/UgsLgIjK3ywWYu0r6o/OK8+ISlTw2/D3GzY9yPLKNdIkqMKLLie31B57F/yFCrx+Q/OwlMw +9qYXK9dQ+cYeupZUJSUeuvORyCVG6Y4KThiHiRk2n+6N4J4RwEih53wPKRs8tYntChM2eAo6Gexs +wUsdM7sDl1sFUGHSSOG13fUDJy9N3hvHMp/sAZ4BEg9MAPoTLyes9ily2LxGVbT3ZcgZEHAtmGKv +C8jKjGdbHlol0qdJrGaUJr8HKXqUgHIo5/vJv/i/Euab7NwrguDk8LoXVwEgUd50I31lcbc8uMuf +MoZ0wZRNb+7QgojXFR9mO4Yd/5VzJu7t7FkhxGYbpOCxg9OoffKXrxg1GYS55Re/iXZXDZAAoi1f +mctmC4qLWacXJzgbwixVk5gvmNsACoi5Wv+IPB326D5Qb2IAwisfzItwX2gAPHbRMrBbTSS4Y5hs +zLJ3sT1ZivBSrR7LbLVhzHjfTc2Hn4CJXZMX2ceXDc0akZA5wAJIAXR2EBF4HL0uPwiqeYwxbN3Q +S2xdyLs+pUiALXzsJhAuUVtwNJiQK9Cz461S4qJm3CzoDJ7ZeG89aweYK9eCEiNsNNcgZTqn7axI +Lba2xPYRRYf/kasgmuUJvFiu6rH64hdJJyooAdyAU2IvYAWVo71Y41z6pL6uskxDZ8BxdWEqT8v/ +eG5eRcx1pFGhrr+F0ecNb8AXCF2OFWETMTcNFJrhIMppSVOAg1k1ODXE6CFJpCocscM73n9MneLG +wQUfJd7wHc3eTUYtCyy8Cn2XWbzH5x/jV//iPjfvXZAognM9lGr5psxNm9iIDQBYN0e9nUeZvLg9 +5I0cuh0ot1KJul1ChpyUKYCbl0sQh5NmubmyKgzQlRpw3ERFQ2I/mn4iwwmUpGSakM1Q6WrJfpLO +OJKjEcLCD6ctxS+nfNq16U4PK11T//ReJNBb1B91x20QH1ApW4Bg3zncpEbORgX3qzWFlCPDIVN3 +//yjSx3Rhj3G/lK6j+3WL4k+hGOWOd27+glAbsif99KF/3FTm/pekUIMnQvpGgJmYUgSKM90PpdN +8F/he/yHslShOSGT9AYUn1I9aqmxvPk/ammQClWHPWfmaBEtYGq8pmpzU1x+Dj8qOxreYAOcb7VV +mJ6okGjBPwPG2O+Ba/VtZuUtoIpjv0cim1Re3yYpCBIivTl97I7UZciCk4zefJeOU+u6agOiYJcU +X00zk8sCEY0O2WvtIq3llMDDBopF5QpGP1V6my/WvzJsjxFtfaZUTWzKLFTr/kCcOLdEXxEJrd+9 +IdRmAPFdEo6iWK3YPcgFsndh08dzRZ4+hR6itLggfvw4CMYJcILSPchbGNd19IFN9tIU8fTwUZ1C +pvplWe16InF/M8hvjUrbOp+5uy+Ln0mZSpIrPSca2h0UFFnf51ymY0g7hs8knrK7QkPK6ezOJh6k +ict/83oai5JvXl5Oo8wrwwsD5STeeD6vwN4uSGXdmdYGhAH08+d9Jxqngd61emXKFuC1MOUAYph7 +Wx8XxppQawAuVOsQJROoxkmigD5kwTlHmprBfFRe17t6QgVEbKUgH7MGI0Y8CODUe387ldKw6PAW +d05gjbVJZGFjQRpfzo2+fEtL5681J9N9GW1D33aZvw1K/eAOY381bjwEPFx+U3KC8QgFIKrWDI9Q +FJCDcgGP4WeFG1D2qatWsaWOBrwgNzZGamhbZEdl2GgSOl8w/qC+vGCiewybyszbxjxsyIt4VPYQ +EaDyC7Qz6IbvPWTn/Ci/oxdyfaCdZDv1Gz+Sv0OmaWwUtaf0CyQ2MFlPHsj8yPUQVPlNNRe3vYsT +IOciKf4i5Egxz2rcwoQD+jRiUBl5WudJsf63TG/w3rl40ei5c4r7QmLKyMsYbmGG6JQsk2g9ZMfz +WYgvja8jDBWsDPaPXdb1ZAjy+tZDfYRvBXNt95Tk1cQeJ3sSQTarJXyyQRlpovyHKt4VPQdxgx+J +YS0PtnQ5juQ1cJppxjMBOwmlIZlakB9fgPDsnsT7/QPpsKOq/KEXeaXyo+A2/cYuoXMIkmzfNzq2 +hACnTg/4reGj/B9u1brgglafSivn8QeGGUVdgjZ4y90+m231iQJgVNV7roavAysfUp9zEiF0yd9I +fLtY12UTiJnDtjRnv37V4Pi62Q8KFGRRow7GlGLQ7WvoM7HHGzhyma4Tchmk830x1QmNKVSx/i6K +6B++peosBmY1ieKq/lgQyCrXhuYAklP9ihGuwI6rFR6GWY/u96/PJnO1/DziAH/yIzMBg2ejlsPV +jzy/VSV3IfAJS4W0mZO/duU+qz8JSsvN7nCQpB7g1bWe0HuUaGFjP/1PGtVsVvaiuVNGJyQQQ3H4 +R2//DXKsEQZIr23C/TyJg+3tW6C44fKtGPQwSOtq8deFwuKTsYQ2aqSPMzgORS6LKy7UGwiJPrpg +esUBaEO3TGqJq6my006HVjqlYcUF9+vQwyP8Ljnk73TBJuAKMcH/2g7NAgNyDMSxwC9ZDAjmDShO +OUWTWdn8NHMWwXAKbbOyFnkk3aoBvnlOoEiNbn/43Z0NweccwhQUgqqpIwcTKGCyEAJWuT48d+8j +R7YDkeNCXB++hbu7BSEdf/Tnu1LQdlnYQsR4kQ5OSwxDh1aFtvmuKQCdZ79F7G3ntFRuZGxe8L4Q +mldXRpn3UNto+mg9b/7hXbzeHcd0K/MU1VSi+KQI100p1DRvtu+jGSTrOY4zs7mcmkn+mccLP1HJ +u46CHU9ekKqfnjJhuamc8Ur0sAG5qTApphGcrU0tRlDRmjeocijhciVUsyGrElV7v0wy+6u0/Sta +bCyglMgHWsw205tbArKF6v+JbN6cKLrkrsuSooaWvs8iulGaKWZAv9sN7IpSvmMrYyrE1+cucuYR +IMCFlNSr2DXoygZJzxqqPe3+7zGqbHxD5XN+ie9bk4RBlF24XRnQr2T6ohEb8tP1xEKiHVtxdtnP +OB7961tAvyiM44RmYbeQr0XAXKweFZu/4doq5/0lPcQ3tFTxg2PuanvZ0c6Bfx+zlW7k4lHp+u8U +ble3BSN4nHcHt3fipTuOzIRuDnbRBxyCrPvvVCjMpqBA7TQAgHBY0/VgQNdyGIHQ7zK5/44/TGE7 +8tkSAAMLo7VSnAEZB8aJd6hNud26MasjvPEjgJzWSwnNfoew84srSJO5Tg0y1Jyw/trWpsafqvNu +T4vycjaCeMPEFrntJFXwXMoRtu/uSB55M3i9ChsL4i3io3xdQ3T2mq4M63u+XzuZ/7yGIycl2hhZ +wzymqRywn591WESBlu8DPaLEchtTYWnpfSIkbsuC8fMvKYRcH4fWH2hrLtQPb1Mt9ZETMYLrfaj1 +Rq/1zTq8mTy/w/NwOQH6v6O+KZSwDCE8vBn0uAB06RhL/tvgCG9J5QoaDR1/tPVT/hUh5Wu9Nafo +iYJXxR9Yc5l2Nyd/TXJM1Rmf/VUzj79WZdz66AKJp83QibpDkTnRRshQ9fa5ZUtFB1XV5eoQwzne +c9+9X3ZuaKRab8af1UuRdpbZaC7Oseg3ul0H8ZjkiZnqd6jN7LrZ55KxIrZoJstSMRO7F/zG3tsu +dIkt0YaYfz4YHij5SiFXWSokqPXno8p7lENhkghh3EEEprs0u5lBxk//crxtfgvLy7dNZJ2/b1up +xKgAuKcq3aHsS/U1WrWHoPB3e+jyHBnM3Dxmt9Jb1faBVFBbU8GtJqt2H/DrBVX4P6XUanaUE96d +ZveDQS3demJNAaXiKmXCRA5110XAqCUZSc+3HYWdUkn9SVnP3Uv+VQ48HhuBMWiaPgJLkU4WgaBq +ySRcaFGIxw30Kc47IaKnLnXn2fmCMluOJo/IzXOfTid7lNNF8d+NdWukTrun5/DMzkhbWbI5NzMr +KTTz26iY4+JrZWnemOeMHR4iT4ntqe6Hyleq/wuMebiV/D7rwv5qWQBcSURClVBXa95ooa0deHun +DOhg/4eBaACi8yTBvhRmgCVhcQpf6FwOcN4FXfCOsOTuerxrOkOWl3PKJ1JPJekfaZ6FB+qfrjxP +wg1QmRcQ1CkVy9ehju7vPq9VmMuPhTHbn+g8I6Xcoh0+f3b+tj8t0ZvDSAfTOHysh/jnCmxi5Yqs +6JM3oFc506x+iw+p57iD3akCzyYjJpNOvWyVRFOYjzxUzzg8heB3ecGF1G3XUDPqln9/S3OrOXzg +klC0LVvXXLZRK90akIC3GNVH15v6EeG/KwSLbzwBbXdSOBU57kmMWdrTFd4wAvo78Je1V+vAUObc +ojjABLoOjpHYSr6vlF2MakuxhqSF3yVzHi4XQ6I7P0F+IzyybZw08iMLWlhokWTKInU09IVgwE/6 +zGFRvvmP/jWy0qs7YO8LKOkaCPDGZfakEJqtHGi44831INM2tLFUOVI6VMF/7JIPlQy8/IY2x5p7 +XGdAqKdAbBOInzqzfP8Em+5EiKTk8W+DlgC7JZDftLKG72s6cdKXAMEtf+DsKyqsQRKRFFWVw50j +sOs2JUUzmm5W54imVP4+Dh5KPDYxPxWY+Z1H4//HHxWsyKVmTNlkUyONQkBdqrbWx2keO671AINA +DNwW6b5KLimCIjiXiEPkfTKAEnak0r6X7mn23Bl/nOvqBkUKjNbu5Zpgh355RKPXEUOow32ROQft +1eO8ZRdkVlG7jcAgEgC1g+NOw+W79UvqsztyJm4sUPLfR7Cbe5BhGNY4V4mGVSQ7E4uwloM4fNR5 +CgsjebqKxXg/w2IVCyisoCatTa0xYnyKIA/wF7vdyUialDMH8kDGyvkzdqmYA7eiV2aAFkGSBViQ +cDB2kIumjR8RSnZVNdKjn7Kfr4in14fVVe6VNiRWMSutZEiKbZ4MnBokzLhxUbg8fUtrB5GBxbhd +/CxeY7GpOPQSOKsxGJS+zcMnqVNe/QhmTQerqck+LE5L84Q5A/l+ZflVL/XxWKOBknI2Ps6p7aLP +7nJ1ZLUCYuoupjQ9pGjyVAC+KjT5oTC7LUQDI51L9nauX90QvKpKft/s7aqjhJjdvpTqdnnPUeHL +ylOINRIbAVbeuarOp+ulNFnbdMokSHHM1kmV98gnLybdF7vPcVE79wAXPYEEFru65D9VmcjkUS6x +eLO2xiGnh//zdga72U5QsMBkaAXM5bfCisl4FQU0f2uNzcMXgDmw6d2t6UFuGEToGheh/O/Jortk +YVrh+CU2Z7EQNaEZ1E7/sg/Tk0Gae1X77HijxbTHP4FNYMus22ADWSHi6B6FGIjzjxYH9Rgr2iCe +o0omVVMVhs9tcuzGDe9LUsHB87FJNDdPXrZjeQKjiE0nanXltkekwVW9xrmtdxlgGdRAU4+0sERg ++TaVKj9Nhb0URK0UVPa+VkiOB611gHIQRnQVduDfyWb1anKd5C8HPZOc1DsqoA/tpxcvSO229jhQ +prDhYxWsZsP0sXSYxKsNzDXvAZP5XpD5YQ8ujLyzlRwHzUbP1PWoOm9uHEWFQ01nf5zpwHlVxdrg +E994/OJjeCHDvKCCmwKR6VN5MHlwh4NQcusuyxFQ3F/M26Y4DPPogkJYWY+JQwzmG2h59SHp/fPI +i3Ri/LsACoyQy1UY35Iryp8B8GSjcmYB3IEo2mHbYu5YvB1bnU8v0oelnOqC1QAPgthHj/xM7nbN +LsAz/cShq19auogZqhYMw0ttaJnpuVE+/ub1OL1w7hpRYaH/ES96fO+5DOowOKi8ZHixbCn1Mwyc +PyagSZk/54bjxcRyyCWVKKe1HD/8NkWNiEhuuS02u2ZnnnK02xbp3rsnVFYq8CzT2u/Xxf8SUNKL +71uCeHHvTLD0TMGReTTima4xSIXpid45GAiFoU0vLOTzvcpI0zH05EYY2CedA/J24mZRQcrypWTV +cqBhZ4HdU8taUwZAw4z1t7jSC/hjLBI1bB3AJqdEjv8wTx5IYcERJawjY5Xp1dHY+FO9hEmHYOwb +bISlYJ4FVcuHjYKCT9VqZ9sJTiWnJ6faA+OYVS9Mrmc34V9QxD0NV6gG7EocyotH3WiLCn5u4OB4 +lmc9doDPXmedQPI6+Gl9QUt9glZi5gCkdvZD/6CkH0mvLoA0+1KmECDAMI55j6HHsf0oz/x/pK9z +14JIasiK1QpJtgsOORY3R/L+Fw45VMlMA5BHRvhseMUCJdTCQJ+ChS/fZKij3EX3IF+sYjuQml+h +c0+gZ/b6MhuKiLmX/CuEhIwjQNvpLUZS8gAqjMjsW0e4GTRFjkjHhfT6c5Ohupz+MyoiViepFLH5 +/TsiDopldq7aFXNzKC7L/3AFLEHBcjHrarGPZvZCj5LNdk1MFllPyAszLRG42HwOkdPdEDcgxNEb +MfdCRhJ4tF75rFuWBUoS0b0qFq5OfrlN+hSCDht4xe+vxKt3wlhB3/YdeUukiQvzY/5GG8IUrd93 +8KQ7R9aMj20k6gZ9n3BPyhMgEbRn9qNFppgpjy38uh9WAn53MHXa7tOa3BFQuXJOo6au+ANfclK1 +f0KIwPhRv6q/+/IGpRygA06hB0g0W4WZyznIUvuy+3iXsl6ILkhvNVgvA/qNVs3hyVzETT96FKu4 +SeTFAkdXLNKEIo01E7g8dnVlsv7HI56qvFk+ax6QPIB8tC/bLE1IaXX0qDdrlJAGtDaDsQI39+rU +8ZwpYd9DPUsmEBgnNn9Z/5TfTthUDE5a8vz3zWSx6I+S5ykbbihX/Gdo105VRRxcmal4QBwan7oB +RtOBu2panCll4LOXwTXEDdJOXTg3HT/aNGOgD002Jv4cFUQWmEOK0wTJw6MTp3sL/+4xoELv5F4D +aNVw/dG/u55spLoFuOPJ1FPYmHrXMS4mhY+7orXg2SBjRz0I9TWFCQVhDGSnlmYVBYkGoexh2Xzm +hgqO2Lg0yYNgOKb1kiyUwn81ntC/IUXFGGPYSPEPNHd3iYPWBJ1xSctK2z3E8Ft41WDA6lY0iXnv +OhCMdqG1N9uW4rWJ/BLGwl/Re5Yy0U4Ce0a+MzW0RKfWSvVfxJPaOHIErXzj9FbFYueP8ZvdP7wr +sa2qQvxiauZDvdQWTJDP32ivecBeXLT1NX9IoAJeCMnTLZ8uVJZrMitRTZSzExm3TR8FwKHFpJMq +64S2e2iKcs2S4n+ro7QEaKRo24r0NjxxKY6yiCvZVwEJsRmDAaXSGQR08DsCDkX5i6JDzVmQ5DQH +8U8R7nFx8ExfWyJs4FpEJFpOfiWU1Fs2b0tacLQvLD4VmYXxwt8b/p4MB0hALmx3wXjVduvbZt5g +K0uQK2oSx+MICUVgXnYMhD1dHwWjuKBAnsdpvShb1XXtaMKMteyYBkNlmrHC4DjLssInp32H2EjK +x/ZG30uMDAkiZJSsufkKipT6HztfcPpBKap5jKsabSUnH84Whb4QDDBar3lESyBUt2kAB0rHgz2N +lK8KgAIyUgLadsKHO+UkQUPOUeHnwoN8yZSuk0rvh6vFAg4Yu89pwT4AetbGjkkn1+O2TI2LT52U +0KW+y1kh2ZONIgww11XVUrpDf9mduGg7iF5sYV2zIIpuumzwPon5Tz1vrxd0moy80Rp1TaYPNqMO +UmWKpZp/VHOJk3p/Fm7nyLkavmB2HJRabehyl+c7yQIUlRF04l2EApm7BWqNsobCOjK6QW2lgPAY +J4Pgs7w3etT93VjKb78bZSK0uxDVSOiuw3RS7yihbbZEsqZbduMdaPSyX4H1pPTyBDIumb9SftCE +qmRElmRQSUncSubSNvQIpKlSu+KuroiiN5hsZeY3sjwi72q2UL1Or/crxek8FVNqtHF4wkCdvzBk +NGlMnvEi12WIQVCHv5dvpxhuPobwkfrUQyXDHGZC1ANal0J/cZM3ckb65GqbUvN7zBACnoDTT/Cd +0EqNMxplJuJb5g/SHZUEEPT9y0p/8x5qEf4U6IMcorccFjBOKTF3EynMorW+CliXHB+IwbtHuBlt +65ruD+nXzcLh0o5ILFYuG35hZe/TNR5HnSKszaB1bPmZXTplHcGkgUNqHaNfYLjgNMQZvDAvsdM3 +117zslnENWu2l1I4SXLczsZKNA8NefAz1waXu4TirmxCrq2zBTSBB2N8rGOhVo/lwINpQhlWi9No +Iiw2lHrdiI0GsSJ5jB1HK+j0dM1xjMFeY7q1lqpoHkzukmwgtzx5+32muVv70JrVLA/lXVbkXHrk +FoDJ5mP3a1Sr9fiBce27JwswVywHQIgSxHSmzFmp/mZRKg4Pjq1AM86w6+8eg98FJ5xOjzoQDwF/ +ZWD4dPBZrDtiVCAwuS9n0UsykgWJ9oW56GIuYEqFg6uHTvxDEUmBafo0h5o3d0RLUqrh5LJGC5Fy +P00ZlNqWV3iJ+oHThh143Pl72/Cpbk+7GvcBQVvbt0jptby76GsWtWzJABViWPiPjstzJrCrn7f6 +D99dXXiH//cUDsnummD+3RyzHYXS3lyG4066NSdZv9aTPbgnCRt3EnQXjpopLoRNVXDuvbOXLKjU +4r488x7nNDLgYxBqqXOYSTHif3VsmdmLGjJzQVP4ooAra9yg9GhIgBaxe0kBoeKD/WWBxydJ6Mdg +Jayprb5WLqZ7GoCazR5BL/V1v/Gw3zNUBXEJpfX/brYHUGThoyF28b0gCLMGzNdYH5OU3Gqlmnrd +Mi2faa0YLnmlhZxFOl/GlTQh95kKkLTsa2H74Ifx4CTy0FAxbASV4g7LTxm9eMCQPKDkrc0Qb1iU +bqFJsMDPVY7KxVjqdfVLLgpNMNwwmXk1AZ76o+zIk1L5eRpxG9cgH4eT2KYrAed3Zyf8y4rtunSZ +Ipl5uKSiUBzLsWMKnqOWBtaF/oRZ6VJqmjN4RyOehvax4lwa9o32NWgOTF0sQMT7nlxewbjXAut+ +Eipx2N/KK/VXD486DBJTm59lSpV4wk30rdDoCZ1Z4gi5BPIbF/7htpId3N2bAVYPOLgreAmxJMWs +rcB9ypUKs6DZr09wr+1ChKp2klZ8V+ypE/pKlRPksxLtB6F5s9rSnMY8rPVehMU9NWselyvbXfEe +vJr19DUrOs9x8xizRPK/RJC241IvnCI+O7Ti39f41J/nX9ZJgnIUTVXaemjrajBXMgKRPfxQUw8W +DWZFLHscFI/hGeI4M3Ag3AjDWj5zkLDYJ5kABq4BxZVLtLngl/NOwDgxI1/B/FfHwe93VPwJLfqH +wTsIMiWUCfZXqh0zVrqdXKuUN++bzbgzE7tRIjhvx9qqJLZiCRvBGmOpXj2jPivqDqRB56d1HqJT +JPjHwRdlm0bBPxJ8GAwZqfyFHtJ0CbmtbPGYkKus9S9Zj66OddhEM3nNEiQkfPQlOGMTxupwn4BE +yKtlNEqaE9xONvu/LC7e7SldVM1KULFhtu3hzTiL/IbvDsPmKpJ/g9NNPZ/MAlsMApviCUspAuXk +2kshUxxfBA28j2mU2s4CgmPYnm5xJvYT9OM3NIodqZtH/+bINkXoEj6qbaLcljMUaJvd7b6zQ8Uq +6S3zMLBfw7/wgX9K+QP+TlsWKJQD/j7GcBTakc8kZNYn9QrXLo5iD7nw8Nj2HWB24Wke2qthN8zf +pGH8JTY9FiUKyyIRHLQ0FSHnERHPEKpYqzkpWqV4HWya0mV/zQxNTtZ6Ns7Iz9jtT9SkdWqxuVs4 +mH8IZzxWSYw6vgGERljCOkM1uYTAcA4KIvr0wpK413V6IpDvVZ8hdM3NQcZTR2OZ32J+gROgSslk +eR+9RFzML6sy04KqGzL2qzPuC4afv13SeGvIZOf13x+XZqQni2VKjYJuMC6Zuao/4oLvQbXVBPaS +3+opLti4zfHbj+L/0eTYTI0e8XIW0h4YgEc5ZQjrkg4NdE2qDd22hCFuERk2Lj1IOVtdICsUTczo +jrs29CGB0E2ivH0PLrtKWmlTAAeZhwHNo+ii2lJJE4/UiSluJn4PB91qGuh3mIiV9dIddBVQJ7TA +MH8jSlcUdJOEWjRYsgwvAxSz+6tOTu6kZoxx/eUqTs1erGTQjviY5UuErVrXDi9AMQyOMQI+otAX +g+Eg1JdG38qYUUA1OmrwijMLdffp8T3MP1r7W+44+9YoJe1IPg1HFB2xxHpbCxAFf3q3qb/wcIkw +FQ6jC8EMeSTMymkmw7X101wgE0h8LRm1dmH1B39LwMRc/HJtiSJLTjLvnh2nTLd3X2aHuAa6ztpw +7cj4mRcCbBryank4fSo/xUgCWCmcehkjPrEoUDJqfkAUrqT0YB0lflUgnP29/ct+H/tPZ19/4N8t +9KE8ij7rYoI46+Ap/bFHy+VX1wUOohpkOBfMooFUe0SpymwYMnSMDYWHTzbhO282N50d8Cq8fLcn +sHWu++rXNL8jjZNwj740TYX2pX6y5tACmfl5Mm7G1Xn2OKjwFwIJSajbHSjpSgbxfvespMk5OA+7 +akgTFENm2faq7KlZP52v2ir3kUM6ErLUJcbsouSBwTYmMkW+YZ3PDS3sDwyrnva0q816e5DdHYir +FVqx1wPckgnRR51uXMvOloUzhNu3HhTdiTnmFbWUrX6VmWXIHBz78R3e6uJIq+RTQVoubD2BU3br +vbXv1cJ+rnlcy3t+puLJAukLgpDgUYu/iRAvsV43a9NddPT2hLufzuyudy5EyU61F99kYrGc+us/ +tpJh8k7L5Cl2nTLiCW8DaPQ/2wtkPO4+FuGNy4OPF7uyVmmkGCWg/iO8lj42Sc3uQnT44mE8wsB4 +ge4jB+6PJe5Ujc2fs7aUmw8mlaNIclAlDqhvSzydvewmGrwypFPIgb3Yi9Tb8A0b6gv5/Tur41s5 +lEAq2OBAsalqRTnEWwcgSLP9NoV+17krg43vs9Fsh+UxHO+MASfFzYNR8N8vJLaPvrj0rJKcQlbC +em9u6uOTO0fJ45g6b9hhi/FmCZsj1EnyLGSHq/9OZBBMeL0NqXI9lUeNSvpoeq41goVzu208wZao +Nd2D78VNo4wvXMcd5e7IcfzrVSCTfJyb+ZzDCgycUai4BoaVILIciGtsfIhk/ap6ebiHzEn4pYcS +K1FSan7K2ea+TLe6BC39OS1TB8LzQJ8/e6LUTTQTgR64zpTbUDnU3Z/PzclmTl0y8Lzhwz+aD21Q ++earsLoK6M8uojPpLcPaK+xh/NaCd16+xiclIq+y47LwrCYMPB9vx/kxShaZXuVqUYpO0AH+lMQN +huvK44rkeOrwSHaczcaealRdakXARy4t58/r2Oe5smAVS0pKegtu1R0Ua2FDgNBbdcfTg7/eZVV4 +Ofazt4EydsjW6onO66lw2iRUhHSN5fN0QE4iG8Rteyee9GuAMlVS38k+11wbUL0skQuAvrqt+H1c +QVP/DBc8nwrSumlb9sCVHsIegDtjNNCKk4MBzNY+zwWYyHM/ozxLfYIRQNO2WRdAmRZratNGNm+v +nmk4ErrdM+i1bsKy4jyHRXJ2AoF+B6bI7nZ6zxguXI0sLdAExwFhrQuZwzydz/0uxTm8wJVUs1VX +9eI7BS95vBQSrwksH8tK9FX1y1L4LA6rnL8lOBUwYfOknHF7OKIq3rQdoSWVhAhqst1Hxrx43TO7 +4/Pb6+JrOhfirAn4oWfMRIM4BumzEJO15B7hsjXVcjDM9kirOO995BEOPzPjRCDlL9p9dlJQQIFx ++WyN8IC86Q4XjWFQ2PzZlgpqmOLqN8J1dMcKUT7Cx9B2MW7zbGZP39PyusVJDW3yi9KKk9sci4rq +rf6FqDvz8QTCRbdW9NVlMYz451ni8gS3XTocoEZU+mM/llOf4fzcrqPvYXyKEL6HAK119P5jhqLL +sdhjaGtLzIjuyCx9SgKb5ZUEns3D/NZPVAlra9YFFnN1AhiUZ0FutI7BwbBxDcogoKlgTJm/dPSa +5fr87u16ubSn1Oxx8/ubvnBza4cDCqBcLUSFtGkVoGSDtdXL3ySmT2+toR7z/ceriGOgDnAJ/Han +Jgn4XtUyW6W/yWTRx8Mnm2Y3E2VsQ5c9OwPPRchPdvT8CGegkKiZJe6VAwUxRz+sCvMXz7dtkDec +J0Z9kPsAhcUsHCzMPMi+jRAu8TZDdwXIpWBZXXwNXWLVIkCFtImQcSF4K4dGpusL8LrySl4R1BTE +pGCtQe1GSP1JkbGy8OSjK5jiT62ZzdyYUyEbMvg079ODaGRKBbKtRiJoYmHiVHo3lwNoTpB7mIKD +okMPthR2sopwDvOScw4qxyEuZa9bZo5jIVnbIH1qfD5o0HyL6GQqQ+i04Ut6JOwJ8I0qAbA6Byuo +G/KvZT3NOFEwKm2CQyfNn02rEfViEeA+z/vpg0wFYG+DyUskqMjmMYAxLxuI2+EG87ccxDG5AvNu +nAOT2YGY9cAv/NESKGBSchmNjtcXi9rdUQOjtTKQN1kvzyMSXkTp+W8A49UAACgbvHsB2kpdDrUF +cEWxMUL9MNKRXKjwVYv2T50MkynQPUfqx8el1btdb7Zg5BLpeh/84jq5YadjjTdsQX2Ro4neDqFu +y16QMrAHKsImdhXDfk2gPeY75hNzFi5U75kGHEKs1hYqYdC3jrPCEItsHiY3Jf2gqMndErsMxE93 +hSmFmzJPrczVry/+iWCU4Ei2idLIjQv/LGCwXACDEMCbu0tpNRCDNtdQCfaCTT/Xtc8cnfN3+P/a +LKNxzKK2/hL0S3lTomKoUskCUbQlMlfKYCJYYjzGFbb925cy9q2D2MQB445CfFXQh9YKQwdUT27j +iv5QC0zVk4mgC3qH4FhqzpX87lErliMbZRAYWjRYs1sJRrXuuZfZ1zDUVi7C94IFu67p60jFQaii +vvLmwfVeyK5EOvK9uzRukJ0LBRolnCelzLcE4VB6S01ttB32/G61E/Ngyiq3btmqYE88TvWOYIvo +bQdHvs7jxDVudI3UIihkjwfJFVQFYKWuqY3tD0TEGeSbU2UgvFPtVL8NFRFKxwHMxQ0MIK360Khn ++HCWuAQ/U/DXjCHOfD6DlR/TIW5CI3BZVWNMFUzB4uUIKbmsgqcTlKrZPTP14DgmhEGxssOHqh1t +6hQXAiEfoe9JmjwneH1ZHW9aLafMAsrprrB1cKXESV03DRgQdBCNh6ft6CUB5PPgT3tg+fwfPx6W +cK728JF4r4NQnASrF4B7d6AEV+Wgp+ZsyFBOTESrqNLPSpyzA/pbYqHLYXZs7740n7X/AWiWc1rK +bC/Rg3sPtaxrGdytTDF8WrLIJmbEY6AQKaGzFc5mSpxYCluesb86V4eo2ARACMqQe4fpe3F8qe1c +F7O85o8+b/9SAkr9c1+/2583DmPPB4mn2Eimh1eYg4nj4kNLhquYm0Y9E7051CYmWgtIAc5A8paD +zktG9OgrNEcaaJD77R6MNagCB9+aBLPbCE2js18jC51qv+6rSWYKU+nj7ROzF2cch5GGJG3KDnqE +j6/oI37ZdBINaoXIvqgZQsFlvZgsX6EPmt6Brx740+4krEb5p8+AvNilwAzM81Uvl3GIChXhlRim +KT5hDWgdIveKkbU01xrjV2Zi5OvADiCnSrCzKkK/O+xjMf2qimJFUfr+JaqsXsETcGZorK7top9S +3QO8SaVaARNlI6C7Tg7fuciXNTD84n20/b5HmysFtPfN6fkvBW/qaLhO0QQJ8IrcKVmLg/k/l3Xu +221/ak8myZ4Z0aorizXZfv5gjitA0INKjSv0cispDwLYWDODc01gMwAUyqR70Cb9zsXFMsl5RRfe +TwM3pjs+OD3LbuWVAJOh7MKdn0PJ9HjWFXT2rxSK/GudKG99kmm2CPEFjJ0bZhEcn9V3BkVJrZOL +Eb3CdzcKaiRUgiLRw5unnKORt5eQkq+Zv2CbbtmsXcA377zfYoEjqdnOyumPMegDpr+Hqh4UFKHF +ldm7icwRUG9wMyWtliaDhqg7k5nBKFg0XVSLCEKfU0mdRlf6wiKAbivbzPqYlC0OQaJ/tCpZxuD8 +RtIpuYKwMGnjr7i26XvLK4Q++nf3DWVRZk7pvyvrIjtlCAP44g11y/2PN7AoqUd7RD/DGPQ6GC2k +iIGALumIOj1/r+CaYWlfBTA+/cp0JIaMyUsDgda5hUuQ5ElJg4RptYlkvJ6f2NwLuJ9buqLcCO4v +AZdcroTDipG0G7P7AGFAQdaBSgm1Hsm6A22zp/XsUDBUbfzPWriC6uy3R7fiEEhtL5dxRSHm3Sx8 +TWOD/6PPoSFaK1ZtFapANerijyoQMxYYCfLGqqG2BgR1t+nNIDqQI1RU/nZnGNNLN5j8nRvwlWgy +4bIsRDHwci83ZHsE4qsPhGWu97d+P/bP6k2Vxc5W/TmaA9698EILW7YaragVS2+ouo7J7FV4Yzfc +hJDssGh8Gs8m0JKhofjpowb9eGL7bFq1LcG7/0wbaC9gT6E6EqidLgGsjtzgmhP3LaFmDNOqpZMV +5lGadxaEAaigVg/+3rGX3atvpgx4FjTUXejZM4qb4ud5hFJh9Fwi0hreZv0784DgQVkq+vm8AusD +2OVrFGAi1StchfB2P5RRshIjxswyhgxPynCMDpTrkazta4pfLD2yGu6LnisdS18PfoRFQHPksIzJ +0zkZbf+xGZquJLDLfzkol+gF6Ntmu51/5Po4viUBacWcA4Ayf+9OQDFaW8FCNFtGoDk+HPV3nabi +yruDXUsl2/oYzhMnLT8wIgM+SULnq4KYPgG2+vbrWKEAuLwiOZNqzDZQoi6sDeTxwjdjjaouHqWv +BZp4nF4SAiarWIuuMotkZHdEzJRD2+oMqwD6Hs/K5icYhgzkJAxR5Z/ziXAlUcqeksH08JM3jaP2 +qNlDhvnyPHAktZT+btjhQFAaXa9oTrX8EcLzPKNZi77Rer3SirHsIwixy7NKVKU1QEnx9G49zz2q +QK/Zc+igQ2pEs1NAoYcxBkatyn1UbWnggumrF3FQTpwC1MfYFcRoL2gHbSGck1uCJ2XbPbXA36cY +bXHeoedY9UFQSO5o8z7Ia6Ry4P7Nmmhx+8S/YM7RrvcYiQuFHMZfIpW+LKrZbV/XVpswrQvyANXP +VuXBq6wZDmTX5Xcjd33SKUG5lNoUt9g2w6UKHbpxegjy2IfWHwY26rWpxpRURDtJ1deX6AzMp4Dy +0k3Z3PW2WSw81WFNP528XLXmFSWcITqPlik5Blj/+UwQvfVeYKQljIXXP2YBNaCBaA1Uumdlj/Fa +3v3C34mVVDCqNzILAYSGcJOh2r3102W4TDr77h4ZmAR8vv0WZSiYfia+ribfum/9Go2vLsCvYqKN +Z+n2cKIcdQMa+wGCWPu4zBVCNzFIN6rPFiVF3jt9Ni/rzXy1msGc5NPtetFWofZPydm5aGy7D8nl +xUkmyQNbgAVxPr0VPybORTGAVUjJTokO5nC+vH+Knh+bFdrxwT3iF8S9o7kPli2KzRMmkpipXhv/ +eP5E8OdWE40wVRxGiTU472qduRRKTrX/QyHZtA3ht2IfnHjbDPRY+bCTpsExoiRjCWY0poRiGRb/ +9pSRdEvr4xl9JSt6FjWlSDi4bNLtF0plPkYuJu5swELMbEEpOOhGjFgDXumXRNh8HEPsgU8/aFsU +TUtK0CL2o/LL8ONQ9ryUylukFtoNe9xnbG98BLT19eyosJdtijCNKR9ODpX+HqDi+0TLGW1xN9h7 +tS4xec+ZOeDNIYmv1lRSfTZpO6i1M+2l7YFZz6vHMTUyHyBDkOvfOu4MwCSveXVo/SQ5+kJU+/8h +JaMgVx2kEHKx/iuyZaxcVMQE3Ppw6kmYRYQlfoRCJPYUmQypnFuf3vlRCtBrCapVfVX+fSEQRlrt +A8vmfGkyGCd0p0GN3O7sGlXm14yQGYvd2hSRGdAHI1ELrCOhXAMSk1b/0E071ZeCjAATRNsUSlLq +VafDsoC5zbdRw+68pS+zbQ+WYe/ropzrbdOT25gqM/N3AyBeFYgAq37mPpVOUgEcFlRU/BXGwuvN +sxIuEjFGHHW/JYgKuJ7usZzTgMO6xFQdcNEFr6rI8bBjcHP4xSF524Ukx+xsZP+Faj0FBczRA4OG +gsMLen8tnZjxhGA7ufBnT4faurR3wX65D7CdOeivZS05Rf0VwsCh8xHGgAVstjhqn64TYxDqebkW +9WXlY2kGlGcRNSMbTpCrW8bhM1hNQUyJ0cDic+sT+ovEL/MHw37wlEPoE/jZkC3kC2qDZjdL5S2W +xRkrrbgXd7AdezXw5PehOleVHnqOtBaFfm8fFBK0cCBewLAxtVo6lgnSxs0dNL3ESSjT4qBXzqMT +2K57NGNa/3hUfyARWgbf08LtF/40rCRhfWhl0FhqRYgvreKo9UwdVEWY1J1QbjRNXdKuzFARADEY +nrAd8rIZI9nN+2pEdbLVn3apY1ez6QujexVVjy9qEslz2Zpg0gEstED0YKlCsIq2+W0jn7/+HmXD ++GlhYgXzewxu+Gld/z70BXOSi9pOF5BzaTOdfQOk11TcLC6PoFMgRN/0e6jltnDvZ6s+ZGMfipYZ +/Fq0S8AwvrTw6+PKHKUW68OG21jzQQOs8/26KicOMyyRKereQBEg7pEfDSSwUIniIzKhZakVWLaC +fbdtK8rKH/72Yp/AaXQTme13JMNRuBS8qpkNgtVbfqLybZWC7E+OXenDeRgcnoqO7x0YcpDRpOVy +5CqAZX/DlJ0qjO6OpjIcK0Tp9ksI15SmPYoGoFewIahk8ee7MbdFJGNTdEDhPW73pHK7Ticsc8Lc +3RHl1ur8Ef5Srpq0rihPXrBA5/GQFBawjOe6u0aqYJVWNq+OAkINTVISe6g5OZ8iL/Un4LFDhdlN +nu/UeXlyd5rZ8+6g/JMCq2nihHkApLr4dYmedjdltjleFt05RkmKwGBR5kvZQ2Ixs3f9u4eN1DAa +3/UHRfqOdKPt7fXUFOubmpmyc5n3GkYm4qzeAcP7PN+Mch1+JTXERPf1kiyxmTNM47jLoItAr0lZ +Om7qLP26D50vxQyyfL+VuWyl7DkOJ1/O1whUBEO2v7D1iCDSUEmMxHTIZudHl6EFpsPzavX1yU6M +OEQ29vgtrxqEHQPRcW4zwYca4pk4iTMfUHm5LgHWJXwq8MQy5+wcnpawfPSWEVn7NlgM9N/1S43X +H3pAzJKlnYL9lq02EuCPYzWrA3jDLKXz+IfMvrenYO3IaViSe0dutWHCW5pJrF8fTfGXLTiM8o7o +ELrrJ2JPupI7H09L2twU2T8Jcvtdi8+73r/MAzBWN8Qp08ojW9CLt4S0yv+3FaCEvNTwchZRS6+m +dHPkUZWakA6fwTAuEImAjy7+ik+rGvmi+be2tdHtzfeJ4Hdp1ERWOWqpXROsO+8doP+Q4ksvAatI +phXZ1q4gTNTOeSv68k7TKAA0KH4XE5UZaRH13Amku/Vo2CCje0Typm36hp+NuFNKbQRqcGq9Jq4H +2BR9u4y3RIGYdro/JzbRFbsb0ALhRLbA5lg5OmqoEEA+zoozVBtkkhI2ZqdRxvqWEj1/ydhe7MXY +8qSk2vKcRFnRpkfurShTVNzPxBbZ70S0bJ1/VoqoKe+dc6yzSOtEWde4GMRE8gWuaa8t3OeVMDjK +rB5WjqEgGwM5Ah1Qul8Npv2LyL2+WnXPODYYvnhCxQLFd6htaEx9DPFlGHO9FBPWLOrmw2qR80h1 +7lA/6fOeQGbhQmCyXXYNq1dlIw3PzCmqFOzSTdf/7oayEhbKDNopP8vI7XhGkZHEKxl68FFhv2s+ +4XGs0W5VVu7U6Z4zV+RLftq7cSrT/GFbGvTCKWgqu1N7ju8bGBvb94EsgtTUhCub7wFDqZcX3VZD +YEj/acJnx9lIpH0PiwT46mzOhezmvDh9prrFZqpQ026TLpRd9HkODD/SXizNBlq3v7JBolAIHoHB +QeaYAuA5AyA3zFLnZqH21qVJuyKKJruCfj725ZdLBvRvwQLlsdM9qKqVhWnDiirFjmmFahMEB51Q +QeEPuW/yWgOUrIkSrjezqwZMonSYc9finQZO06uzAjAxTBbtLnEa4IyG31knRZWY/WEPlVoRi35X +FAAAIEvGfrbnx6NqB9AaycabE3V/giksAjzz675F6QOYSoejPD3rGKv9iG3idVJhiJjaD5iIum9f +//S8xMi3GqNeDL/XQXKtN0XDViyy+gr7AQjjq7siZXd8fCO8bxa8qBdK+CyDUMxibUfOFrHFDw5s +MzgAb5A4Blb7PKcOGnE6ND2pSlpc3y2+tZki1GFhHPGF9nccwjX80u5vjj54bacp8fCXsqbe/3bp +PYHJTh/1efWBMovxi11OFaDdGxC/zBBadkksVizaMQmMVrmgnZDr3aYJr4G37uK44eTzsmhmjwBG +NZt7teIjuFWM2r48PJ0oKCQ8ani/4JAn4t8dkLURReCwfazGFZeGpzr9J/uUIip8Z8ZDb6tSmQdI +XSwUl2BHwXdUAGGisWLAmSjkWeAfnMc3d19ZxhJP0OiLs5eXKU7xmRuBW/UJb/Lr16W0Ny27Xx4M +/BSn+x7jDhcgsFtD5HxTldVwYyq2LWcbXG/95CYHDESZH9qizf+wzdvUJ77asBvT/9Ainl7n19d+ +ETbRoZ12y3ByUAHFq91+Xf7rc7RBcjLSdGnRuscPQRtgdahrJI14b+XQBCJBlExLrDJMp5zZ+EB9 +3XpxyFO4HGI4L1TDWVl9JQ7AxLzDF2URQWYT/y+96vgp9vaGtsdZKxUEJs5M/8A9BV27NCyxt2+B +Jem6nYFeNg11UzfN0b8G2LKOVICsBtuuEeHt/4veRBYspdx4jJUO4snuPT1QPSU7rG6aFVK9rErX +JHFYEo+vA0wrNJuGycqr69bn5hvY02jid13LQbghL+m9Zo2HtYsSIzwB6+4w7IE9eSFYRGvQfQqX +SplBprnd6ccchnUKd9VMGtz0LhGww9BE3DORMXsRxlDHg6g5zjRc96vZi6tk7Fo/E0V3QDGKab5K +pu+F6DPERJVBFbz5vhXbgK3ax4noS+f5FzYMnyc2Y+phWw28i8NeM9XH/c2do21jIuakg1Zem/wf +8BV1VEXQpa+gmhICqGbv1LHGX5leZRezay8KYWsxZ9JFv9WStve/mHiuDNdReXnXRNyJHfAoDraa +ohcVnKFjnRAtmxHdbv9jv70akTdhssjJt+7aijFIXAVfV7XeNf2aGTOIz5CxHekr5Zkwgbm/BMJ6 +DbB6Xz4enz7Tn0W1ifl80BIswTVt2dpJ0giadnkOyFCw27PZ96/9/fRqB19i11AnBLMO3kg0HEMR +keFn2z+lfuL8MAJuX+Open+KY3YBkEhqz10aSKSMgYLVMvWYmRoVS0KmFNVryn+c4XS+XaYE4CRs +hcmyMvXoPF6FFqV5sZeNHyG0fhLe/jeVdL2Ep41PKnDkrCFfx/3CwChLpRJY5H+TRGcr4SNssI6r +wOjW3+WK8tB2Rt0tWr0OGcf8ABdR7YQ+/g0RWsLg+ezpeHvH1MxeGqXG9U9HAB42LBqGa3alBlob +lZ/qM4kRmtS09Mbb+snLZ0pFV8r2R+opHi9OTWYZh1Hf4j78OC1XOxdy2ZgMC6u8dWt30nnZaTPt +7nYTwKVKarnc8t9t3xfACoqDtE9UHBu5YBfkoJ0FED+E/nXXj2i37gH2t+rzz9M6ECNRo4wIAiEO +t3vStbvNwYqRjrVbGzHLIMraMfWFKa6KoksKO1VDWP0rbaNDoxG6jT5YXcZVGCZHwPaJ1Z2vFLr1 +dwx3sqQxq7QXOlhuKDGQ1DHvviwPRm0gh4wuSWRZhXWfXfivBF2oWdJ3+jdwEEw9AiuseyxfuaTJ +d8tHdJkk9R+KFneDBg8a86p/NFtCOkff/+7RyBK6PIpO7B4KJMn2Mb/P2XLiJQzLbhc4fn73zQML +/nxIaUZ8Wmnz87wFVzLzPtEdKsucg+sN9tIZy7ADxAZrf7XdREjbgdq5A3DQ7eF/Ae8uaOj82HRu +V0+eGk4ALF9tU15cNXapP35WJ62qPD6b5i76nBAEtF6zZ70BjhvSppclI/EXVbGustDLIOswYZnE +LWZAx91I+r5TnayJiNeYtW/vb8fQKzbRjYHngYbsOEGOOhVpdvdy7d+G2wbChDXsc5wbkc2V7jAD +WWCDxGB115Kw3TrqWW9A1iOHAeHceATVv/lJ/myU+/pffxvYFeoNvs32HarB9xkc1EIGQQA2Wla5 +S9gzjwRCe1b/pXhzlKAFl/qdp6niFWJCCc3juz0Dqrg+2nOwWRL3cEHPlupRKQ7VyHz7r9sDAtG2 +wktIfn6TXSZhIUiuxoOW1xWrTDwC3oaRL5AtFRiGUb/hJBX7b0bXHOPUFgNVThy1iNA1I/4md2Tb +fq/R6DTlf3Y+1FVG1bbkg3JrUQLsfGHeYML8tJjMDLhYEtLWiYyntuWPOO0qMGDsjR17P95z7xqx +NmbuhVH5KULu9L3F9E+oIeePl7iD7xWNcHxEhrtgFelm367YzdnknVWfRYGEnMGk88DT3zmgjfjj +kEF4eWpLYgjmO4m0WaReodpm6QHvCeNd83FRa1SmuAQZgkpbKAnl3hACiAdtykEkSx2/yVsPZRaK +C3et2BG8qJHFXHdwnPqEXVeFZ6urL1eyPSxPsWZEVWD3SxvwXL+R8ciIght3ojxVOLzwVJ5LKeHy +Tqi0XyosOz2EjUNQXZmJ+xXu7NmBDE0HOKErPKC81GkmPzrFy9FsVvKrAV7gwIxq9tSu8AdA+sqm +1ZUO0GfzQZ2cEdBAaDJi8NP3DkMi1y7MlhbZQ0i1VH616aFN5GQ7R9zfBohomHeuDJxzzBema8ws +rJRL4Rs8AsYwNO1iKbvhifE8yrrVtH/CsPIdihKF3ewklS4PtGgr/ZhJ7gylNvY/A5RiiSTSc3Iw +WR5LGUYdyxCDcXicHtnyEjoauL3/xYuXO/aQwBPaHrYtc+0AeMyQR3bAbJwV1tnEs92urWzN2XlC +jmql51oV04h/Nt8nn/mIjOBxNujoYsAsPZ3wywZcAa/2mI31rWSL9LDheG8N+Ab4s2WgCdML1Jcc +Zc/LtU4OIK3POdj4DpvW7U5ut3unrZOEazepg6B6fnc8NQhnfU/ez/5kLtDEMrnpzBSxPw+0sbqa +uN/6L9DjAVCUNXWCRLzoSrZk+2KJ5cTtgs0xNbXGtED8lvJppbdI/2YeEhQGPXnoIW35bzkE9sSs +GxI3fKjgWnRfFbH0vRPUT4KApIy85pQivJLUpwKRwCRE7QP8CxVVSrpXJ4ZZzU/g6fSDFt7z/xoY +VEmfA02a4T6g6+3sVDaV4MdWHpnkdgb3ly7EKFXZBKVy1WxX8tEQBgkoFuJ5dRJ7kZ2KTYQ92bwM +7/wmTu4e1T5xCaszIyhB1jClc+pS8F/J3u4VaqRnxx6TJfmUvE4GfVZCYW46kJFP4mwuq/WApdTW +i9953Cf6kuhJMKS4oh7AEdCKt//ffQsghaT2aO8TJm4rEVmpme0JHhBauGn/hTIeCJ6mDuGNm8v+ +3BCXC1bcI/P0Fgp0m70F1+j6EHIyMDQHCNButhi+iXX7+oPSKJ+8CRN1ucgSt5iZwZvJMJyHNFn2 +/36k6GBvDOtvI2ilYM9BTGR/QwVFV/ZW4OfWHNfhmFV4/opxAlhsef/M3pF22zFhaT6LGWMxuNmY +POJWiJ7+VWLDeWq3u4io/W58zJwn6vsCCGFNSn9QwwWPsiUM1TvqV2++4txnrXHivn6ZfoBdW5qQ +ckCrJHp8DoIbz7/6/hIwwVG+zQN/EmuC2eXNj+hyFnMf7m3x/+RaOWFwAk0zInxUipUU6LHRP70T +lRSiJ0vtVrOgsAhkuG+nQGcK/rwJirpcvjh19xy+HATygNtcHs+OjssxwYB4l9FqI1uIi3wlEZH4 +vJQ+++6E0rthk6dtMwFun7KPKmkhpwY+qltlsrregzr9xPO1hZ+7hTHiMjzp/KqjyDtEw+ACmL8U +13BdX/IsvZ9WZzKQlMLeUQLDBYUyPsOmxdVJxtZ6IUCFnt2/zTUjjJtH5aenvcTq2o/LXq8ZcA21 +XmS0pD67BWv4RLLOsDgZ26Hfio4l5V+1ml6XGnenj0T8F02kvRt6s3Ru5bPW5WwC8p0OZ/oQFosC +SkvgQuKI4n1B8mraRThd/GSdpAbn8rs/YbRlHJFE9o+cmxQmI2xyUv+fcywTpKXXkmNo0HrA95cZ +qyO2btXiBEOSWfg9m7C33b4GYCVvevjpMjyqF8qOwFTcn78Ca3ISXke2hN01TZqLnScYy0m2tnXp +Oo05BIXzEhfGVzStnbLVjV6JqPevdBacyKNKnMzCDwOLvTLZBcg++rVWU3nVZbkPYXhbo44hwN9/ +cnXu6a8NgYKKD6i4/z5f4mloJ76/QplvDET7KM2Zt5FJB2Y8CfQHHY6VaRk7Bbn3gklvsm2c0OUy +BpTgp4DKrCvft6ouuWyglkd3dcCOFgqxcInTqyYrnHMkH/NL/f4WxmM+277o0+VycGIU08pE+Ox4 +SDFfs3CIGXfJnKfC+Ko7wqifpEB/cuI8A/BRJ9NLgAMkmMVy3FvPotHzaApZMQrqHb/0SFUD7ngW +TeQebEKwg0RTfLSGj6SVTdIBgBzJS6/1+fCswP/MC73/UxFXijzY6QGLP/Jyech5Xzj945Bvxike +Y9X5yNKKN6syVd9jJuejDb1b0YSEEU6WIRHIFf5JbQG+gi1/sravlRIpSNxyjzY/foloq7hROllQ +UiP2gc7PEyNtSU2doCO6mVBFxRRL4IOcWfB8VkxBYuGqumlkl2U3B4KvEQqH2JEqro5cK8O7+T/d +vt9cuxx8KO06sXUeljjfIoJy+gciXBjL8VxjWmET0BGEmgJFZnTsetmVMozUbHXzm9IwR4gl1ere +B3lQFUo/GMWdhR0RoNfgf0lfp0NqEJt5Zec6NYpO5WNj02p5d/sFhnGwtlPkHTeLIwrWcAX7iSM7 +hePsDwTzkAEwX0PeJYuZQIcH4kzwbzXJOa/1cjSbTFD2vurG1tVBrQxqCXyVMDDb/lh0TWOuk2/q +gSv4zvHUmHcjDD5MlEjoTmhO6xB6uJYnSdiI5bhNwN8K4JxJ4qZakIwdIwGOQYHlUQaRszAWcs42 +3fNanuxqm+fNzgcReylYtxoy2Z6cvjrq3qnL0m8F5vrWoj8lAcQ7j/FzwHzVW2CphAfiWBydsSuC ++GKCQOum4dnsQoC5inyCAHPPx85IHe4Mms79pZDGR1ush4abIGPDm+HMstKCTOAcXgce5I0djlcM +JSCat1yifIH6qxXqh7/HXwD/bxXGqc483cMjDfBfD/SME8k4a/Aho1tgPbOTdNOSufC6a1oHY3Jq +VxiV7SJl6FwTP1fO4sr/BKS2DjADIriDQm7Aoz3ezJXzPRBapnoIPzcOVgsoIJ9nS2iFeCHfXkpp +OG70iY7iECQw8GRrnKoQEaWwsgo58DKJvPDbZhbkO3mhNRgqkM+qvCRm5vD4qJ2FDK01D1ovZ9A7 +YubaLHHpY2UExF9SNYdDzVqA86YNKq0QtZ4/v1fE4u76tGvTr2NpCoqFI+KA0BnEzaqDuMZ2ZI72 +JsHdLlMPModgM0EtTQ6ICmdH/BlqnSK3B3oIBvgZLrYOgzHjG6YAeTgjkhjaGucmDWPmXzATa1PK +u0Ciz34m29VAUqEcGAg4ymrpuKEOZKXiFE5BOzz6Eg8QIDlZ5DkGIH+KIXou/OxndjHap6J/0Qhl +fVncUBjlIge6ejbcv7g8jf8+8c87699VEQI7sihIlvh28OBGEWdSfQzR0N4Rgt0o3mp81UUwbU/X +k+BkP22M2AEJDY4/Jo1n3iWqR+tY7f2cXGi0N+DeFEkxxmZFjPwsJ5qP0DYAsaQtVOCiwmD4FzXx +LSS3a/istZWWMeHK1ilrgLhH/bHLvoxaeZxdLI/NAF92qdroj8dv456udIfGlihqhiYzohYW4swU +m9K6K2bsaI5O+qdwUPZZ9SXVJqHnp7gNiympKkjkF5LfkQVOXyKnTOYCCLBYus0nWiUQ/zLLgMYD +1I1/ui4cCb8nU3tAhHKuHKdV08bKFyAehfNAE4PattZfum77X1kDxXgUu20JAGfgkxg+Qx2kQqKo +sRQ2KFmMNxjfNIv5wWLRpvymAvbizGeLwi6iFtfGDbchTC+d8z3kBpyA2mDCavzso5m4Xx99T0Ba +BapPoTK9xqfGGayPizODKymsj8oRyl0P1ZXkafJzED7ojz1TU0qUktvYrWkz3HVQigF7MCeR/kqL +2oXo/cJBCLNLqjBVlnrVO4noLvwz6HDzPZ+fKTtZeaaDDGSRFkLCoV0dgXTHrZrvgtwZUfXbz3sd +Ux68lJo24N4PIeestV7IQSbHsxfKWYQonbfANhiszjYCs2amoP6oEC5iw6BChVsPoSU35+X0iFoD +k9YvXzJanx3PcIEdGSubGaDc/Vj4HK7HYmIHZKq7O5p9rM2LQQm0br7dOcKg1/E2rUFTzY/CUKJp +K9egQFxuI9WbyuxL90vDAGSyT4lzixSp8cqOVsfy7lSGePEoImY3J5CwfXQ86ZGD7A6E0V8t0cCh +1A78SmO+Li6hRTOGjtQxo56al1uwngr784uD3p4qOPhRGpVMnEq2z+7EYTWvq9QJ1Er3vnJXIZSG +MTKQ9SBALW78pZ+1vpbv8tXtUOsQtBW6Vq+NdGJbFMN8DgMJq6e1jSy3oGf+Z0J+RQafa2Z+cYHb +WhanUqIFKzpd5G4FvQqBSPhOpIa/ZXVes81fIgWU0ktd1n+HsEuH9XBB/QLefd2G1nwBzLZT9Gcg +pMetgK/SEqreIW/j7fYxRYe7C3gMyMvjYb00iItV9Z8JDMkiRlEDUCvEx/wQaZK0ud+r/fH2JNCx +6o4JWmgyV3fqvjH4X88wDWwH8udSUXQLiB4eqpgobCdS12fnxqAlzpUSB5ObvReuh+831b5HAPf1 +exqUvtfVP6Fopr1L2MjuQNgFgkUxVS3XoHl8pz+AMWap4wrqjOmz+Ebx4FH8c8GuNfAHeYioLwgJ +Ho6NFwzuwsX1EKFE6390zAQz0vbL/weFqN4QIl5un1gnniyZcRkHKJabTEqd3asK6sKrOA0vu0Q4 +r/boYHttOOYy4Z3FbvL4pN6CEv+UHmjcVYfcBWn1nVTASlx2k92/RZaZfDT+MMmmTan4RhrmeqXn +56segntRUzbOs/pZWthBzn7mdOCtN4Sinx3+mFAACohG2fByjMhkKEw/paXjxSZXym7aaTxiyfdz +DwQj5RSGk+7OUvYutADlpAdaQnDYgudrieRgoyD9ZeCnIVtkF//klDojC4x4P9dxE3IvPSkdLTt7 +0ZbrUuLyqeIVYaIWN9SyRYilLbcUCqC1pi+clOYmX5bolfom01KPUuvMiWdxnoGsHm/RJNT9qjTh +ywZNm1VYyqfQHkYr25Jz9cmJOJLnQ3OBGXOrci/7JfEa3wtpg0EXnnhygU6xUgJ5brsRVwE4AYZ3 +XM962FexsyoR05e2ZB4+Iu3kjRL6L/wDMPsx1JFjlxeSfXQnIbSj2FnKg0gcYN/F3oieTTBP8k22 +7Cs7flIcxXYnyv+/987cCJE6IGHCh4RJmrG2lV6wEqKwGWeMqn+DN5/GcYJC9i6Yd2/zaOOqCZ5Z +jo8RsqS9tQg6Uho8AjaTTDnkoA4QSKlta8mbTMlP58Mvllx0THynDbwlKFiHW/RBj8orGw9mPChf +7fU8g4y3tq40LMFaauS6Mn0L8ItwedXCjxq3A1JUlA1BCIbb2yfovanQ2HBvxsUilytjKPbKT84d +dFdCNFaBgn/siV6PTCl6+7wP3gjSG0gASWS4gpP2P6WRzLE1dDDHWhLRuN0AYEUha6kC4rgfTT3+ +YbXkH5TMfKgSfGokM334EvaBDON5m/8zCJ7zB4ANSRNELNjeIMOt0Jn468fR5FBZo/kW/Gqbo6/3 +Q6qGamlyMDyTrarBhrX/fWvYHRSvz1O4kZ3D9ntJEPGhdE4Vso5zxght1WHhIZZZRdPmQ/KOada9 +7+5OJTbJml2QbH9/Y3uM25YCxjbGJOyFj8yIgtDPMx2PnjAbI36ojQhiEYW2Hk+TG/8j4DUmFNuK +yvK5qtp8KCloZeitPTWMOyRjucmwIqNfQo8wKrElHr9KoonRHc2gBQOZCm/hymuz2D8G5qJ297++ +Huraax9eQvZ0n/7oqW45wf6TRFhD7jOWydCEBDn14qDnSBvmAA/wzC47TaATck8iSTdaPu0+sLMS +lZ2OEjX1oO8+Iu1OgL12rpbgHaEbA61BhRwoP+xHl3QbjO1D7iUHordqKL68D53rq7Ga4baMbwlk +hAdiwNouvLQaCBg39rzud4u9z0nleTyP96U08Ll+9NWjrynlVTYVxuwE/LaI4Z1YtM5imaSMRjzB +dEdXcbPL7t5Lwa1NphvwYJJ+A8yp7axDBU8vpGJfVM1h1zYeddh0xjRDviyYq3M4a/zcxAUHXdSO +yGyGlQoBmdjQuCJw5qeALz0mPCoKrf+3lhNuHchxPFNkLxpysU41EMexsM0y9c3TgYVcY2f+Zngd +NzFqtOQh3I4VTYHRE/vKgSvzvfM6iNpuNdUHcI8+nY73QQcdT/UZK91BtlIguTcvqmMq4h+9efAB +511oxVAvtdrwg7Eu9xDIBvWVeGZJgkkTzh6+cbaCRfDrEP7sVAUu5LX+24ezkyoVKYtHo3kVU/8r +gbHedL48LFygSwri8uw3FT7fgoUafnedf/jskeHRVP/GUDFaYLapFwWnfvt4Wm5h63OhReUFzlwN +53TgBqLA4S9ZDySxLiUyC/lZ+69umMDKTJl3Zwkv1mh7kQQpYI3lUL58x2ErkVEXH25wOKfzlTOS +X+oWVLs0AEDgVgKBmgx7cpEWDQFKPdeYMmVkdq3z8w+h8nFxXNUICQo4hue3i6PzPz+sZUFwUCSS +ZcBgDShespKLG9hV+EQ0rs1DIcNjINqPIeRjQg/PqbeBnTP1ZY/LmXe47Z3tdUiqdMHIbL/rpyYG +P2BdNPxJDmFSmt9pKAYzVNh04WLj0GHggaox8Fr0RVrXrR0suTPObGtoY4KRiaeUo7NEi9RUzRrv +r+p0A3PwMNFV+jiA2P4pZSfk1CMkNXy/Dd/B3AyDC6r/+lJtdgNnawRWv05WWf2gPqxqf1GSQeT3 +5gdSKEhZq2nqqmJ3dIN1m9qZ5XQGIvN7n2wAPG++gLNgJqcYN9HxI3rL4FxeprvVNsZrFhpLkphI +Wq1BWtll1rQTmNxUo79YraAThJSYQ43CqeLM3rgh8xjDzkRMD5K/WvASdLgBHsq17aPbwe8TQhmW ++pEjOrwsW1DeTr4UhAZiQ8GclLZ0Fwi7nzAGARX8TrBi4LTYGLEdwwwfBgCW5ki8zcZwXN44aX84 +ghSycVykbAGsElCNeoQ4CZQzSq582wLOM9QGv3GxfINGm3ffub4Dv7An1F6520S+VDRA41EWA8Po +QgkxSgz8U6kMnx515dRLABICatgLStPCTDNRuf9gmtuowGW94W8U49rXOzIVvxDwWxUhhrbLinG1 +/wKBvUSDsrmObQIpz3X72sPu3y9UOsCA8bf3tVmgBa/Nku3Zee+dwsUMxMxwT60lLqXjyvyIWthm +lPWT5vA8leMc4KhC5jtNiPc3kE4xKKwNYxuJ5O+T+8ewv43tCtonOLzIUVSNknyWTtScknKRjo7k +s6S71q0PFZWvYwJJ7vAfNhzq2L3k0ZGFVWL22Qfq1F+ADZrtfFHvR6d5/e4D4cxG+hVMEweylToX +W5VLW07mrGKQO3LG+9jPIgNQEnVn1QjJlbL3zG4KzKi3DWcp3Sa5N6avJhQ7/eoiXWj+CXjm7V+E +kfkQxkq2/Pdrj9aGWzL8bVt44zmk6+FmBzD9MAjHJLW63ptSYpkEMWKs98ff7Fb3PVx2w/OOLn3t +QzlN3uu/RJkYYe8GD5d/4a2LZMzLpxFaqM7QMODCaasPAQDczTNzIqZWOeNOM5bRwfyXEl7YG/1e +C0sWzFA9mJZ/IQCpwBOdjYyB/zB7GVU+Dnz7oHlU5iw0L9oZyAKnB8E6Ha8nJz2q7MXNzSriRK94 +is4yQIhbc3Eut3hV9PY1349xPlhdHB5spH+tnEBEgajpbLEmOjcih3f0GSJ0PpifefHoSDIMwRcL +xVLDvVkFcmTTpCjmL4FXHuakMklOUk5w9Zq/hhDhalX16/HxlPYYCP3YAOrrkxJur1joB+HvUKwl +zqPF8g25BGcMvRkr62wCzMrlAJP+I7ENCsutsFF4w00IMrbDcD1VAajJLMPXtcSQ7x2k0JWXAWuT +I4HSJpDdR0/o/jMzlnaeBu/E4jXb21or+HeRz+jLDnLbZo7ZmdG034yjuI2T7ZHaaN06s7m2zBfy +CyARjGCoEjUJZPuW4nRxhqtL6hB9K9qtYis+7EhhAWaTGSuI7klHCKIB7rN4eNZDs1MYAFFrLpWt +FG98CQTCxpZBTDXpa4OUCB8MjGC137nfUigQpt3xsEZ6AcIVSU+RApde86ptW2+puULv9UnUyQ8g +1KePvCTeu4FNcaDhA2kl5z+nv9pWJ8J1ZloV+Kfxx3Tb5PpxMQnBkhP/Dxbqdnol2MRjLQEXwPgW +ZKtzIU6UQUo3JSzzW9FMrcvZHU9EklL6NPcbTbztu+X8Br2aESXw5JGIci2LY7H0OqZBVryL3S6a +b6tye1nu3mUrRH5wOE4w8gaszL6y42kPy5eGh2cVdDYMV/3g0UW0/7CM8BVJ01XsH9Pc0Kb5bFmn +MgJEb2lECx0ijwAgTpIxVs3HHe/DLTT+b5nDSYnKKnsoA0XTr2aWGU/OMEU4qFIaMqd1elr5Fd0n +f5f/RNdIh/7C3I/Zs1s2hO9CxhBcHecdF7gHccIRCIc2LT1598p3DbCrkNv/DmchkMl5L7ntGKEE +gudHkQXJcpsdL7ytCTJPs4Ry38iUdSfTvNmrZNz5sJGCOIWyEesr40uzDgzs9BTS2T/I08zNzuyb +mP3TTHQ3b9+9pYolV2vvOoBJTgaaIplKhPD/tHVrhTrgeb080vMkBgr1NJ36Gka6k8JHm7zLMrWU +eRaA2eY4lSt7rLiRqdY2W/kcOoirIJW6MdR7KkU4IVwPg32bL/c4KlEeWMwp2PIDB2fZBAyBeVVj +YSfGbT+lrPcZE/+0qwnZP5Ti/wCsyy1jsnPyoHJXb0vN4FrIrhOISow70kjQU9pdofMiQHke+Y/P +WlFBwGss3t+Y9pP6n3kGCWKKIW42BslshlkSnBWyuFGb4gc0VtRB//QkI0Voa+UgQAsNVFK+uso7 ++r2wAomCnBsPVHIUmk2Kr7ynSVPGJn7WaTVYwFIr0MXwHcf5avh+cweDemc9fot5flxuYS+z7W+6 +ugTwXEKwcKksY/C4o8/M5eqZ9wr133fglL/MTVSEdFNIU4TyjD3Vq5sk4ZphPHR6mhG6xHADOLLY +zBWFBYmwTCAA4ata8lXEntoODDcGhzK+utbd5NlWwcQUlVQp2nbTAZWUs6UMDL40KjdMMsLjhLg7 +pBSWPewGYhfV1zSxyfOTCAiFoZJzR/e6uM+U9s1ZdXUys5sd6epRYf+NyQFlB7vIA6JFDD4dSzCm +O9wjDIe5pDSN9OYmijqjXq1SdkVEquLTg6Qb2vv9CrVAFwTo3LtUc+lR5hpm2TOSnZcZubl0ZGpu +CFNZV1VGV93wOi9QOja37Zw7ABjngAZqMEHiKQEE/UBOl665E43fsl2o0X5eIlxrLafqQI8EtKe7 +IwtH5MABAsHExeEt/cbRLYF9KD50u4iC68Y65YzbCbGyawkQ3cq/TJv/pcDSMJXZJUj+iUEotO5S +LZj2wIHHTKEKbZxRob5/2nfn7PZbnkyBPDqihnh7OPOUy772UKr9yqHqR0j/xsRU45w2Chi2qSOl +u29RS2ccXAz2if9EXM7BMgTv/F4p8qb6l6jI637GULW6nwG7TwMAGsNvRGd96avkF4Li/PFCy87U +Dg6bf6/67/seoSvPCR4WoD1WKCtgDM8jvwGIFNf/GGpUuoK+lsq3HRkNIj98hONUWvQT56sjXTbv +rGs1deNljRtE2wYpaNz2cJkl+zPFlAEv76mi6RSY3datS17IfkVJ1rDrbG64uN3Rp7KNzjtRd1r7 +TRy1WChqbmtmZrd23Op4oZ6TNet634HmSms9WqGDULIy87aNWPWG3lCt+rtW70SI5InUAybeqbDt +c591mKJCIF1+E1IX0eUS+ZGij3I9kyb4JFuS9wzxpDap5/MqFKoiZfw3wC5rtns0hGoB8v4KVDrg +TH87odO9yG0l0G+LUKt72oLfKnPTAyRh5okGN2BbdhRY0v5bM4z0vZZuDTAjzBV8HhQnES6QCpvq +YTmh2EborKRpPpS2fpzSCxAHjzb6FYBmfJU9qiQS3zo/tHkCUhkjgFkM8itVeasYd//s6oSQyZTy +qeYEon0L+Yl06r1mos8bEK9OwJ3Su3XrM3/Wa6QEC/RA2/c4xDKPUi3enMI+Mu/3tGbNHARGMKiU +Uve0UaERPr5y9f5MSe3H0c+JsrxadhndlILe8lV4FXVarl2IDdry6mUBrhN8G8xUNBMcZaDdhF96 +6oAoAnPPOct3bXSU19a9/vqVTsG+aoMLz+33cIWVUdTa5DtV/tgOGM8TM09nMj7Nx+CfYQyq9RcB +td82THUIHlkADRL7+AQRNDsXUUz8tPMucIQpshknic874pcPbZCM7NJMHNc8xzP3w4KzlNWprJ74 +mFWeZISrvr53duRcpUUd3flcb8fKfUTD0fpBJjXx7yuDGwEk8QCGmK+TzhNilEVdWnnqektEc8QM +8xFnIPdXATgvn1mrgBnZJiRYG5Isvz0YaLlmjTdFEJ/rA1quKUauswXtZ4D5f3VWGGhBtZBATLvt +YbgcI1/i3pALWWpt4ka8NxNcVGpLqtkYaMxjle6mjq12ZCmcn91yFNHCvhfETtmc4i9xfmmRh8ZC +zuwycwdGyRSxXRHufFcVq99EbVsWteoFuY1aRrfoBHSFSgCmEJKxtJkxvRcODrQAr6xlugNDavNK +NDyov8UM+bmHHHpeaXZRpOnZ4szhH4qMgYBeD4DB8wrUlgkDCggOr2pjzrCj8/R4ufw/QeRweznv +a3K5ZR2Xhu35Gz+kD7twDBZ/GAvI5u11LZ8ONllk6bBoageNYKxGVFtvrPEdPgOVuxw2FYOJ+jyO +xC6E5H/ltPOOdXAVT8WkR5VNyU+6169wqxmN4iz6n+x44aUIi/r1CBFO359S4T97ztAs0CsnpwHG +4y/bszAmf80fMFfVQDWdWI7moqRKLjSAkJn1DFrs+3VdTtTlbogl+hZDFHiA2nOczvwLNZuGyKk8 +2w0cWaLkj8UMGaTD0B0weD0/0yHL2OlxSuKf1NcHyAAW6jBkuoEFMxkkc1+hKhEu75DTUMW4Ret9 +5/ULlXbQu50FBgpYQi0xTzq2y+RKxrfLes327HV52w6MbydrLS+L1W8/wbB+JbipfIZiqAVEpQ4r +UCpnB+uWA3UV4nRmJeX0egep5LMe3hpGomgs9DxAz8WYgCV1fEbNUUo1twxtULWobRj+aEO6vrpX +t8sCpEYlFn92lBLdcq/8vDeQsXT7xUZyVwUCk4HQTOmnnc2zg5zbh3fZhpX6etjrxl3PkrK6kGQ6 +DlkL4VFNEoj3uvawLV+7FjQ2aHiYC2oPzKw0gQ/ZE9jJ0i2C+gK1CdoLieoGBCJLmND8gxxLSz8d +7lL/46q8UF8VKoZxsFkV2eSEYstI8RuESK0SRt0qxp0ue/cxxE+OCnSzKbCuXQ4IBwFkZC11gAAc +OjOceRHWh+JZ2DHSqyZ7CwZQ/fpDNtLMwSIGhBjZoLwliQqkDhf10WH2/10b4TSkeK+yROwQ9WoT +pku21uQMViH287otYPiuBAXbQV4L1UMDHmzPdpDWPbCD8Cw2jjG/1gAD+sFGaZGc3scpRcGDZGuH +xJbMQ2WZkUX79/X4y19tzp1JX20zxSABoeAcpd/j/I6Fu8xuQRRQO9ct6nOizypLo7LvcpSEsOGh +UzBjNXmBsR5KnnyRrVGufCVwPkNc20PrgIBACZnsMbG5RMTvqHAuk10ZLIq1JkYQNr2nKrTU55Cl +AhS+5U76o2u8K5ROc1OrWrlRJDJcNB5VxvsBL4FRULUpBXfUByNGr00lJT5kVT5Y5zgz33+xTb9L +s1R6Yg1WjVmh8hwnNDFC5ey4DsNvmm7D7na/hM9nqzKtGg+/K6ByOV/TvvfGuGJAZy1HR4QTeuX7 +EK3I67+pmvNgncEui0qa/RBhKwPp2FfKCuzElVOdUVkIvqhRW4xRdeNA8Y8lX+GBzOooPncdj3wO +MvqEFkGu96E7wIJwNzoDXQ2tKJSABRJhEuoaUloS74Ibh9dcn6hasEvBPu4K038yggzbtC/1bjGP +Fvg3TgWEiPZc5IlQvPbrVpSN0gN7odlZhvvGsSi5ABh2NtY24n6ApGaTlQBvKg9ZQ7htdGdeGLeT +Kghdv8pTKqPU+62+OloATHMK+FPfKbmqw3sfEVI+eq9bzv155cEaTKKBGamUb92qAxM488WwiH+P +ogRgOznWaDQXIX4xO9BInsTBIWpKfgK+yr+CcMGMHTFi74XonS+e8ly3IizzT5RTEB57MTkPXCZ0 +6oEZDBhOrwCWoFIzpS3UTEIIUWDA40veVvznKTJ/BwlF00rzRMAXuiB/8QY1g+L/KAImD8q7a4M/ +3Qa10oOo2QkbcQVr91YG95LsMR2guBDKOk+cZ2qYP+LglYU7BIQ1I59BbMWe2EsMCjQR+LsZjWfR +za5WX/rql3Tq0IcbRV7ZGW4FMQdIQiXg3osY9DzqIakNoM3PIVZj1g12NKvpiO5kBuFCdbpJKuwV +ZW2L79nyddvNrDRV+m3Y3OdA4pV6R2/x7eaihUf5IcmcaPPwQ+6Y51dVRhLPEMG0hz96dAzI4zVr +YbRTa8DoYYfiCDYa6iJgKhgN5/FUkTk9IbQrauWrrzJ5TDSYrz/eJ8Safo5nXqRSB9W1g6cmS1yR +7RPU6qVpmHkepkhwo/9Tocsilul97NFbFDUOqAaIkj7U/X2EuLS1f6EWHjxbWzVLAtbFOqaaJ8qe +GLKw9FsCDFHY40l8VEmGcgacw/RQjbyU7DE/dDHoVH9It5I/UH5mstiQznEgOuQrxjTsbru+ckKp +aA89zbOCeuPNh3yLOwcMESQ1lSXoatC48vaT/eHV84Eu7MISUFX8Xnzt5m5n8vcN08xzBh9Q4iM8 +XGZQAeW8QCLUY58tKDMPaSrCGFnHxIg11+NhP+sDnHV70/13M6SZj82iEAzMpZxkw1mHvYL3Vfa3 +cB0QL+YM+L+3OgKCZrWiDg7EZvgQwmtMQDOgtC1IskOJFGzXzKO5TdcfBjqKAOZPzwrol1xzWHRM +53P7aSo8oZ4BgMcNWxK3V8SvyqvDfFWnt9QMQvj10D/mvEpMzVfIg/1cBMkO+/7/+yDUY2frFDUK +rxmXak1HeNHzw7b/iWvxsXQ7uxiQUokkNsSNHJpjxSFQZX/HmFwdNATco68wkQhGd4/yNJ41gl0I +99RLV+8KXe55F1OIElweoHzviduFxDovEQos7Sq31fRd1xhsrzPpz4yVnL4v/BRidhJ2Hot2EWmm +tU2dHYEJyLodg/ui4VjTP87PB4VXHd2L8IjXjnsqSt0xdqS4NZiM4WPeaTpy5C6g4+Py92yAloY1 +F8fyYya/6HcM0ph9YN5alKNDhMplI6XWZLoxqkYIAZkFrHhzCflWCX3kOhbNwNdbhQ2VNmX1Dh6H +f2ja6sMwR6V+1oax/l1keDAsE48Hx6wdaCktGDKSd+xbZ8RAXmLPOi192zaaCWCZns7wNonndzcZ +FYlmtANCDYEQ/QQUU8ZHXoaISFkH6rx/a213WJJxSTN2CdSVQNT8I4AYXC5qhRyI6jQ/40lL/Qhk +eBjhMvPmTY5tpl7JX5UkG1/qyyoSwaSq0Jv9kh70BLoj+QOh8dqQuvdniH+6silq5AiWmVXXOxnR +6xSV3SnVhrzx/hTTZNSqFcFId70njQyaxR1EfBryTadMyYB62UdmfZC4Ghfc09gShWSIN4BbdRXl +/guYcjl75DuI/iJ0O6rOU+CEjlvoTRjZnycyJZ2SswkkFWY0cCgjaIfG0abLOYoNQ0pzBM36h+IC +HiDzfag9SEKXgARtazvXieKhmobonjCSpinCE/dEyNNgkfapYBAnE3t+WvM8Ps5g6R6KacYMC7vC +VToxvn6gQFmxRdZjoaZUo2I2w/JbNAs1yJHQLZXO9Fmc0sDhiGkng3jL0rHlDs/WWCrczKE5mEL9 +ifIE4biEFtzwqgv5/syhyafCyE9n0YxKqV2Vtxgn6HwO+kqjvZOr54MS6IeKtyyyCqhN9Ea4MX3m +GnhEl3BueFvHJF895h0qFa/1CZNg7i8Z2BK27+7/Avqswm+WBIqOh8atqMbx2npytqkJ1PftiF1a +86Kml4/eyVs0YAWt43b7J7mqqKmwbyVtKjMAwHi11QTIGCLFtSKXJ1rZAVajPSuZgMGQwFuz9Tkj +6nSy8zhVbou6DHwmJKqFSYfkmmZVaSO8RskWZ/zVrixPoYSeh1AX2ULXfIZt4N6mochVX+HNa7H5 +aW70Cfms+8gRQcmVsqbOZHBbEJ+W91Gnlz4F0nD3QngMUQPeIv0Vxv3qh89gV0OfiCQ9/HnQoKPC +4QoEoSuAkBoRe4Uz0NDyy3KPtoByMhbjPwAzMXNa/oiNI0uLXpJeYF/NgyLjc1GeR+l6yWnRwKUl +DiVcPPr3GZYNFcqr6SHjgyNG045OQCTwdP9w0d1X3bfuWcFI5ZxE9xwRlt9GRMdue6AwOjejNPUM +en6ucPYt0f5p5LYIIfBh6CUpf4FkJYnmHhKSH4PvCWcbDB3p4VB2PmoH1pFqJNlubLoHSpU1bJGk +XE5qeSpw3cA80jguZEHksS+x1Lam64jWS5xPOj0tPgqTRjtr0haHe2cn04NWvuNad09d3NHNXArl +Fj4lp1QwEMm0RRm+c3neHHkIUxRG4qewhG7S716ShWJww77hlxz61CfaZCYzICnP8OI3eoc2PC5a +NoickgilxOUrNMshJ5783/OsIzoyiy0xe/uTVbiWAD7LB2v1j6AbpWklEUCbjHzG6HPGvdn27ywm +kzhgDrFlf0EmPrFSUnQrkBkquHfaAA+zxQ8KvNoZibInsBeglmJejty+0vf47HkIXfsVNnfOv4tj +s/LMgnoH2yxFXDXzxytZMWlz/9l2e3HM2cht+47oxOXJ2eIQ0v3rZ6jOiOvM122qENG8q5M1J2Ym +qStM4sLZyMY7IArV7fsq3eiMNWaY/gvgcp+dHVBpGGgrH26tOOtkdLv4CdmAKa96ECQAGNNOl3DM +kGPr5rwqUKGCZfRI+Y6gn6h1uaFohaH0UksUSMEXYFonUh14J/wOt7B9pVZQZcEXwZ/Bh/10GJG2 +F2jK8VhrbqsPaNg/SV4Y78hFPOjtCJO6/4llmub6XnyydgrvksJAw5GPcA2ghwwS2AKGKmXxVx4+ +VYGy6cu+1c4TC+9EacqcU8o2YjBo1+3KLzMjUpXuMeWzF4WwLmho/0gvnwd/WtRthSAoaAVI8jsA +GJbgq/UpUJyRPtNF+fLbgxVX9BccbGtrE4OT5Hf4L+nFMWsuFPafO/Y1iecrKIDiHOIXpbt4h8tm +ifPowIyBZPDjeh56acI05uICZfP9YR8Uuplz9YfC220ZOKdKtLn8wT2pCeY5oWNrbw1scfoj3t9p +cjXlgSthg02eNMURLfHykf9V2XP8XhCNRpMgMy1M3baAP+3fY2/VMz6YMdEnz2iJgsxcmHNxxWqP +0P3DDnFDKXKmDdL4ukm56Gb/3YqVjQYdVJ9wSe7XcqHdMN9OZR7pbd+UeDz21pqYFask7Yvucf/6 +GqaWnPfuXi57q0fJX6KFKhqIpzs5f6WV7SzKrh3yQgHba5Z9/rUI048MMhPBHIsg05N3JDwPlNqG +A8Oerr/JOg80W1cmeIOEK4kS7RMW9C+jz96LFzL//YvvwPvU/NXU0ilZY+Trb4uUghcEdHFR1On7 +DDAp2pxlzKrLswyS2oTfPo9t7AaZeGkB2xKw234L7oyJP/oVs9148HDvGHXQW5RcMtnCA8HlfBWj +ZANYWNTNqko+33E4iLqcx1stJnf3oMfj70Ou0rULgdT3UkiiT1o4/DStLFVCJimoFirR2YzpayYk +F3o1Jsq00pFMWsnzrDvSUEQ8kAfnXCY7iI3Q0nCrFhyP+97m4AgpccaQPCWrttEZne82ecjKCfH2 +qOzcxDywj+dt/rkfBqkdZJBKjOg8Sm4S9TaHJew7irsVYQDRydAVPP0Rgg4/2OldSf1cth+1YFh0 +2pc0cQtULONY/01wZi+lyQpMRmQmntIDAavW9b9UoLbhXCVUWS5B0je25mEPaxIoA/Yez092RiYe +t7B68NOMtZFWzB5POdhRmbQ5DmrG7qOyV77NaT1h/Slf0ARr3/HyX65habz9dlXVnFvAQq0lToaA +gYRhNOxecgXfDdh45tjj3aAliitt7Hjra4EodAwmLcWqebO4/+yHuigutEMN40P53csaMTudhJHg +Mq6dFTwaRE8Uq5K1hJ2cCb8nl/s4gD6OlWtp4FksMSvepdhn9O3GllQQGu1LZ17Nj707LjtGFH8A +CV8jVDhL0SW7mroVCox1zansYC/xhPZLzUCR28HI+YOc2qU1+K+qwDFdD4TT1wrAbNJEHqjCkH2H +iNubgIYfxN8T7wSTvHvyLDXjLMO/usG7ynSXMzxaE0JVUventnxgtABcPzbrg2VMUkJIAT6C3SSX +srtulxNLJfSMFrKJRuK37DoYEFNieSzPsDdLZ6LQmXWvz1YVqv8vN0LBdOIdw5dbjC8DrTF/msCO +dAWYEPlx+UEOMD8d24Pe6ngthnpKtUPqXovNMT7LyVQ5J0Z2UVlUf2gKQFU25tFxbCYvTKFEjrmu +MkX5ACGcZzrW3laAyF+1f6KYbNPZMJh14/DrCdLzcYrhDdujuzOELIiwObC7IEVY5tBtKiNJqaqa +Ic2gRQXESUSErZ2lrvvTKDaWSrIgVLLQNldmOpFqFxKsLEMY/j+DHvxd/5S9x7YMTmJyZtBvdWYJ +xK+UyCnuhgZMv9Jvp7TVCl2XQ6RcJYZCZYNYokdNnc45CXfseCh0fnoteMWq8scJR9bIMUXzxPID +oYxFGsI+On9GvMnrQQRMkQffJfP1wsH4dkCr1szNvv9r6XQTj7zMRBsxIKdh/6gf4bqPI8M0MUcr +1FJtla7n+uRyrYgCYap/y01/xcab/8DePVAua9YC2sRthH8BUhWWiXKHQkq/4HlOoppCqlvkc4Si +HNV5GHCVvy3hw2wfkgQHipfoJkH5TPa3xpvXk7f+EyuU9p47V5dQTIbB9fylqpps8++M7ZEFdD9j +eL7OQJaUm1FnIdaK/3dKUev8tkYgXeOz6eFQL6hHG8w/m0qnP4FoA9Utm4J5hv87sBkcTb7v3wsr +Llt81h4Oi9Ge3gr4sB19DXXHPuIv7rpPi0Rss7z2sp0uCRVEDPaitfY9tTaRoJHfii5ctQS3VY3q +3kxQE0dqBki84Uq+BmM5Lok2UNjT6r+zAZ1mrN2BCrWE6h7Zb7v31eQoiuLiRN5Yz7BMY4g5NlWg +gTDTs1tGhroHAcw3myAMjnXOiOJd3yiLFX0c+3N6823bLFFp70HHdy5wJBq+IDMkvoBl+xaP0wqL +ahlxYY4V+xFVwh1uTs8f/WafPFneyT8BuXvbMU6NCnOJMjqADa4wL0y3Z8tMIYWtZRD1pVSTjcHz +fv+oP/V/SsDezWv3recFI5GmMcn7q4MXKndnC4SyEys8BO64uZksxib1A1xlY5x90LID5D6OkClf +hGu2ZCnSR0Z1bYq2AuLXs55kYTi6kwYv3q3Sysl5xNYCktncto0Wi29QKNH/3D+J45ISOTO3oWCp +56n5doC20HnMRFpX570GB/AYCvo/u45DS/aATFJs0iCN0jIvDdmm3x45IkOKilRjaTbSBVymrDmn +ONPU7ODNjDr2V61Roh+Q5WPxKzujUS15eUJgX7oeMAqR3vs6ILBJCWGerw+mAgwkvh9D6qyXeo6G +jftY3qncQ9WIEnHeX7qU4R7MNzyjnQChRZpsmRlkakCsUOCXpwqfijjFmcz1oM5lJEBxJ8JKX+r/ +CBBAji/7CQc1Lfj+iIcNTeZNjkHPbNJs4jVW8+JJewEewjCIoZJBnRoWxdKn3VDZaIudVw88pj0y +WiwdPPf2ZAaDdkT3+8eLBOgrB5yhTxexmw2rN47DuW3bVPti60v3mirYwrn0A0BUcOMnwTecuZDT +jLUC0gHIXQO3ggsmvJRMbmtN5+++tflnIYdA1SGyeKza4ItUuEDguSFCEM6r19nmnk825nAvX1f6 +6nKAht3xtINbrxFXIBYWRFipF4CyivFlbaGeQVlQx5+EYf11gyVjILRw7QN/Ik7Pn8i6ljAlxGUn +0sbg9wlnq12GxgdcNmUGr3hvXeUfOSASxzkeMrDPyCkL2vsUhM8Ozs+Bj4SP6A7VhGDx8a+DhV8E +aQeyBfXbvLmx7rOLyA7X95dCOKlqdq0NKitktnXeQO5UCWA8bBgfoZSk4Wjxyewx37V+M1BnvxRS +LL7lfr//VKff3PsrjDAKxb49Otu7V3ioF3wyyh3tbMXFU950QYfXLgpjDlYyG37iSWG/2rQTLVhS +/e9rXLCcLlgTfBSU9EsKm3oca0j0NCkyJE2dNQ6dDHJuQFEQ7nGDlPrF2exHXNfAagCxqC8P+BRZ +OHqhZkKhqOYabGo7WKgU0KEaBUpCjC0DacRWhmqGM0QFeHUN3HlbpZz9g4P8424Gxp20S9t8bsz3 +jDTd980dmYT9wMl2M+CUcQqYvDgFYe+HRwnjxGPuNXKQzhZAHDw0t+CVYsW9MXBpQekXeMWRxX0J +NWaf859T8Q7mn+EnxXBgsaGIuzDae70RI4qven8aOw/SZBCCLjMB4qfznWzhAYjGJ2d4ot9DVvNo +dYKyFHdYQkE/2GncCnXvaDLeRPVw7DGNssi8kuIA1/PYu+Y1Z8oNYMcM3MzTXejdR+QE7yhDwC8G +q6soVZjra1bjCglYqL5ys4oQF7cH2KYyeJc0ngBNJJ9NfL4uB7BxOb17Uruv6zt67xBXcKGplHF3 +gc4hDoqvZNwDqfNBpxLYipWXkYdxQC2aQjinQWFDpWt6VI79PeUNLyQLXBaWHiEmumwH3qJ7FRmK +qN9SjiJOA+wqtcrEnuWRDAb4rmJeis1dFS0Apf5EeqkEq+pKxrJm+G0O03dNr5J2jMqOnuRpWFRF +ReeafJuceEJQjldTq5EmXThrZNuiLaCFtO4+HSOYiNNTRx23XcqnxUzSKP7Ay4AUNUctYU9OY3Fx +Xaq8IwJ6Z795mMH5I3fPTn7RoxytsYJxd92fHml7AEknuOFzGytE/UXQm0RlyMilI3uLnQd/mNyz +j7AG6YZNjc89sVJt48EnnwGKR9Q5Aboa/Z0iQc8F/K4R1aRrC8ClxP9LOn5IJurHf2Siy3DJHZEF +Re9c9Rlrk4vAAtXqK2qOA9lZ1uTer0xLgHRaEP6w30DBhCmhJb26fmCKTrwCvvV0Q0RpST1aZLdJ +dRvGxISUOHvKBN5gfNqCj4Zn9b+yRhl6CIu30py5MvwEB1kyB2AhtWD9FxV5JEmDal5Py2P8bIZz +PkwZe6djxlnugOsJdlMD6WgzAnEmar4W7HQf0+JRyiS4Ydr0GNBoPyGSHXWxYZO/cxDAbbpnQ+Tx +DycuImZB13EvJNvDDxf1k7otW7cQkuS4I9qjqPG8+oqtMNGjUDW74ZanK+JlouzvQIC3BZfMg8Sf +Lr1ZMmdUOq+M1Tvjqm1bsrsR/xwdJnU/S2AXb2KCR01ZYlT/nMElXD/Jh9sJ2ejK1/wnetDyUYqN +DEeM56foE5VpCRyi7x3v/aio3DRSmL+xhtZmTQ84GxQt49cdYEoVVoOqIfD/hbtNqZSgJ2UmwXJa +w6XHNJoJVuO2YGMdgA1ZFB2i3m6iF9fo9d6SGqDHzLZjfBDCCnIj+QIdWBMO8AjR+MNOvE+q0Ddg +IPlIVmJeNu7mWldmeoXJiPPBNofHarZluJPz7jw0m7fU4N5jYcWgIU/mOKLgDouTW+U3ux0OCrKF +Qtoa1Y4EUG3Qrucbd2j5+WUNIan6Itrh8eG4LjJqGSQMQE2m1Y8WqNNi7xxhmPs08F7jsVfiCqTS +zTRPoxZUrttPxSJRXjZYu/Mh5sPGi3owS1fKwEm9v1i++7bMctTuVgaIFQPNn+Hbasy9h0sjX2Wb +fC1adbaGlqVgZSgQQcBoF8KPuutVgHuBHiaEG88gRgfHHntrYjh+ctLXGRT6el21ZRhljcDYY7aJ +E27f4pjA2vpj9TFvEQ16D7TtBRFYiXSWcmO66zjtSg74l/1ryFPEHq9b2bu5Aa+copBQV2aKoHGK +xjfEkiY0Uaf7V3/twTbvBNOzyjCyijZ1CXt8sR5Ar805324PxhZ8w826Fyazd47OtoWAoOe/LEfN +BjfQKW8FG5ameCTPWyUiPm7tEz3PeWnwLcSU2/nvibHGtDm+iRbahmtlFbeHjpBrzsiKKVwUEmy8 +zmksbRwr/mZVeFu7nJgXY2UYvFS9NfcZUX6mNKpZOc+cQjlG/NYkfrzuRUYfBskSyr0BqRbealKP +9KCS2h2kqweGW77N0c9hJLfDG+Nr2RlEN/ES0w+fTwKJo2toT6EcVxZfSYBeJI+wjpZbeUXrJ59l +aV25poGr6iwZfW1XGszd4G65LgiUQ2+9J3SJBEcJ+scIR4lJrw5xvG+cU5HwM+zSHY+6qabMafJt +Pk4p/dhg/2oyv7pb4sKNA4pGUrTtSP0JWU1NzxP9n7gi/V77DgaBKhnNMpW4W6b5vUSSX4nuOH6X +41rePke7AiyST2EPI+nJV/IuBdc89U7xB0MPjxD2Rvmgkg+CICgOMwSpWlOy+NDdUPE/RHLbFYf5 +fZIFFlQ86f6fnXpMuBb452PLWDmaLu/bNLGZOpR7rDbEpqPe5OqmWZhLkYDJvCWUg1wyFANoJKZx +mzrbBFje5sQVzLTxSMwJMG7RTJICsU4ywAqRW+JotwFUWMP6KlAcJiEGA21hnaMzTXzlWi4buu9e +Z1f5bXRo6n6bZ/QyxPXp6qCksPtXrAxOWU/mj1zKm/fGMoVzBn3PHtc97AW7RR3yJDEVGibThfVX ++4asmqHQxWlayWcPa8j+3PI8Oq7V/rJHRpIaP+St1TwIBy1O0FPQZGVIyX6xISuf1J8JvWVSZ2AC +wwz9h3YP9CqS8LYF0A6IG9hN2qEb2MXxGYy9rXW0FgbzFgwlRmzm/EZhHKz9oR8+1jNlI5c68NIe +beFUlQ7RiRJdLsf+1IWIfiuoMrJjeVEBgZ2OiQ01LoAn2PiaAmZZlH2ZLswC4XJclfT5tOoJPAY5 +p1I9TSHCS3ZNJVcyacszdT89qJkQ58yjWIn5uW5PEBEdNLMedpseLVSgUX2Sou+gZ0bG1sfGvd/v +IR9KsXEi16gqm0IGXCrJGoHqW+cYLMxzyffsIspOnoDxPR654TWaidpMdt6qbF5mphhEgKIY8Yqq +/CSh3bVDMh+5W2KIc5QPrjI8S/5ggSJMgKAmljuM/U5Xjt817zbwo2fAP5wK2Esvz4vXQDT4Lxdy +cyz7uZtrEpr5yz87hvtsmMP5Wv5BLNMMQZbnaCWg9vXGOsxgR9ayQ3jdmk/vfo3+cVuh6RhO7RDX +1eaXqhJwA98sTdeIRq9Z0ksbUaC3a3maCtltQJds1CTg7OLplgP+hSlTn8vZUdJAG2nzIJqOB5v+ +xlAzronNnbtWh+X3u4m4/r5jHq6JFOvT0IZsqdTQVs/H0C+D4fc2tQVbW3Ar+aFoYPHQx1+yU5Mg +n4pKMd7fkFsGYb5OXBF0djjdtOOEH3CDGJFwc6XNNyq6SGPA7m9bMCUg6kpbwJyBvZpQ4B4DXqWW +zZ1F8vAihTFSB7dlphpxKY/yojEhElxTVjYHmXtKQAvhtT95ii1INyJMq2HOU71a3oUhZAQr9rZH +HFL1q7npY85Y/W2xhQ9om2UrNCxgcEMPlh+lmdvLxux57bnXM1DKCITs6Pfi6KnmeFkayEk+AJ3B +FoTHH7+iqg8cMQbvNe6PLyP6KXiDjtj0vStLaZHxnp+jp9iZmb4oFfh6EWNlRKNI/EeRMdE4EPO+ +9TiPZtcKLRFnXkSALlO+3tEiesQE3XiWon0MzJ6oFggZ631iElEDXSadO91/xzhvlZoqGMBqvInx +u8ngFLT6hNmHLdsjqaqQeT2mSe3ErpzbNo/7gWH7ElunktU0nQG5/JAaRwnCBnyB3EgTVJYk4RiZ +GmQVUa26kY5CDE1fS8wkbIHFXWMjI2QDjh1A4BZkAa9CqYAhIJExBg62hitsdkThGLHhW1i3oYUE +3J45Nga63oBFJ9J6FZhao8IFiv+tlRNS0JBnNb/v8zlhisulfec/ETFvbxKbeWzfENqiAPdX9q1H +hc4RN2dI4EjVBqolrpf3uzbdPYL0iWasgeaVaTR33oJlNEoNbAHEGma/Ut25oCraGsK3q/et1/rd +89lG6Oet8WbUl//bg4w9itawpocrJtSIoIIjLuRFLvGxdRg2+8M4qHZ4VxREb0WZzmtT10cZkriy +VDn9zoFbd6Frzs9Kq4RdhOmFqWSDq4q/RZHLXPkoUJff7bz05CLxo8F+89/sCZ82rcOPokm57bGO +CvkjK0H2d5oi7jQrvdMp6CT/YFoAvQzagPzhOV95We7E83tTumm7vOWqJ+xPZHZ+lijH63bYja/m +tmWr6LWzhrJ3V1eeAojo3EEekIKZ3JQ3DrakLq5Vs3+SBlSdEgjF1sSmZxTZuJ2ITA+9DdSiZb9J +nkcvmpyTtND1kdi2MDxXshkrCbjpNFS65WmsnWfocoypsP3vjAhU/fwtmzWWZkwoESCnNxZf5WIg +WFH/PV0flhEB7CiaZZ3FFsZdYTmUeXNUuwLrr84pz1MfZyVPO2E1NwWDXh+3cHNKo5mDNA99a2BI +xshfyhAz/HF0OEoEABLN46uAE7C4HsPRGEOYkV0gE32FmX6lzlLgv6TGPKvO0exvGePFffK22EDP +lddUaHazy2pfis86OA5Bh3fEeKoJQMyzi9faf7fP3d/ZPZ4at2Oom5rM67tLlfRMK0nKLY46XFD8 +Tl/dBPmTcu7Lr0xE6xCDQ3gyjecxXxWIh6LMXnkfQHxpfkvVK9UCan8V/yZsPnnGJUK6rDOaZdnW +WEytRTT0+Vn2gkgnJyrHXN17/Wbxcg3NAMGLz0iQ+dZc/l/cWb+i485rjjJgKJS3dFfnp+ckIDSO +5Z46E1QxxWuHghB2+/PCUWGIZhlZ06W21xhyKvrnvf8Z1IXnjJkADa/hnEszmgAtsk/GVzKVZFtc +t4+Ym10NZkFAHVyyp8VlSl6YVEJI8YqKwYRhGvpPzqm4GFejKztjnCqvmCoVcXoFCCMdKTDv623f +31oEf872cdNtsh9sk1pDzEyStruxgrJZN2wIA7aVtSwiCsqOMI1aoiigDMXKsx8pXfGt0+MY0Ado +yVtzQlteF+vC5THGoaypzgKYLKCrUP8fIazJElh/M/1JbxovtCtwBkm6xyxtOldA1DJkAFtJkYR3 +KTjX3N4reA9VM56BcC7NbibjKufU3ykklRtpv+vgV4935N5oZK2J8e6FIo6/7C/JXrDgtzkrScGC +tqmYXyRoPLck5VGvOF8W0U0qVwroDU83YjJrUf9oyP1e+lIPhF9ZHLWEEefAcxx61QjguEOg5Txw +KqcTj8CavQ1o2nxKgN3u0gK2xK8ew6Go5e/Tb2p+Aiv2kXHwNIaLlobFCmTG90UrJCClNhdDf5do +KhQfzo6tRIYEKAtLNKN3uOgwug7xLhLpHF7Qe/YvhpRC2CmnMDFBtG5iEls439olTQ0XdQprNAJD +23qPdly3+tmNkt2t3al7VLHJ1aEanMAkhUkQuVp3eYZc5tIK8U2xAaYn2OBvmJCDdl3G0Y67bqHo +t4vgj6Xtd5zLSJDGc6mHFN3cX3hrAUmb2yN/YM6lTz49i9PJqG2z55igFowQDrvj6C3/PmaAMt3P ++LFjUFKTn01jRJ3M8lkBhR+yiCkT8duXcYg6WkrPj/erLmoy5LLyTRgJvHYH4VX4UAT+H68VzZYa +fW5914MC0rmBVvwlrIBI3PoTK58v/FvXsI7Lzs1WZ+VuguYJFp29RctcGdQQ+uq2qYrYy7OMe2Z1 +L5WJiRJv/8nbKn4Ym58O1MRmoIII+VgqIa6/4STuYTp/wwn+9ipazVdUB6K+EzGymevUWVB+XN8B +gNwy8ItiOiFR7fciW2J1UDoMd9K4nM/evo/Vx+48zplfN5tJwyLidae9az2lJCo0RG/WwpaIr48Z +vG8rNpDfC7z1ON4XaUtmL3kgxnHzMC5sGkFMDE5AK3xI+Oz03EFJUohmFJ6ZTYlMducD/nIeB6ml +Ss+v2WrVcGXbIM9a1HjXVQjklN3RekZLu+Pofg/fnKT5djge8iCVfmc/8puYj1sDLun+bHyjLUhi +cQRtW7pWzmZhvUqCcL6RuUC/B5K8DoVc/C4Ca4eyBbfqAlQaU6lIZZE8qmfpgbvlXUiwkwcl8oFi +WuijyfyUkt+wbzuNJ75O3A9z0ZCGpvLi0/gOjeaeAwjh5G432rLVTPE9FZ78N4WqZ/1KSFy7utJ4 +U7a10VSbrX+PCG92m+p+hiCdEvk0JMTRwdZ/QSor2kCoSU/GdeKlsKwWP80Ot4a2n7BJdviVHUfq +CsLmKRFObS0hQrQHIf9tJp0SwcvyA4rur73RVMpUNJKxpHTutoh5KonMch4W47th9BQL9TL93kuP +O30RtR8s2Mf4ybg0DVBbKwxU9P15iNaaJZM0faQkcaTw0jgCQm7FfR7DXe7sf8QBpaHqJWnYmfHY +ruuktsP2o/mhkyRLXwp01/0WIwLr+CVEL+1nFTwAc+7c+fO2kzhkPiRoz0W963izMQUfKOGHAgTQ +XJ2aDgZ91BcCtR8e8+b72gZNZWiTTMIslNiwbqcWRGG38ZT/J44t9XBX/ULGw/YHeChOP/femJCw +SVlfwtntkuXKFXEHOXtU+fR88+Q51jHLdRoF1vwYW8q+jNQpY/+B+tzLTo0kof1C0hbviz8T+3TY +nbjzQOXGziptKkVh8Gr9ioTNPIa9xLvKPtDdlFFpcBRp0+O6rr32LgIqGhzfGBLbxtATFYFsnRkG +gQT+wlFAxoLrDwesNg8KL5kOnoUunhIFu1vG8/I4jNTa0f5FaH5UVb8sTFrqhM5nSIDvqHAPE6Ei +puw3JoYB4iKrkaYIhIdhTEWJ6kJc7xcMqylp8F90ygmVPQ+hg2UQnb/jVPxzCfXbaqPnasu6K2Ao +Xo3UN9O8lCJy/FhY9k4tXP2Kz9RelD6nc0eoZOPfZ6eFX1MpJ9JyHe+fAnyMG6C6DeJ3ev/pmIQ3 +kaH1+uu/dL8aO6ZM/+hk7FEPUVMxauINgdMu130bfgSBR+DqUURJChlmYH/IY0fCMjX+dRBBeqGL +zW4syNUt4Ncp0V/3Cii3jUyKx3TX5log87VdX4KsJsSgKO4tPeCAj3jVt84aKWvc/kVmfNfHIQ6z +qwxXbW3iG7+8SUPZAIUE1CdzIofZxbdtAoP30b6DQ/khOC/OBZxihTPkoMgcwI1j//3bvGeqC2Ll +VEkhFb5EFXRv+h8iSOkwYDPKQzTQY2L8Cogoh+idb8xbZZSGGn/3zciDjDlUU8EEyoufRs8wXrLs +mY4J6duPwSW5F/EqHA9FnHcrZ1AsAN7NChz7V3xdYyARdhf737+OChmShEssT3pjugMiShUw9Xbz +GcTCMA7Sfpcf50iqEQUW5iYzQGEEXzbNssg1TU412OVegYhc+nArroE871C9Lo+G3yc5hV1ngFvi +wk35YueGBMfeucW9eucrUVR6OfKoU9YvcwVwegPkUP3cLLnvywuh+054CBVjfOVLFPr27MXyrW75 +s9OW+jKrYfyERZO4COPrelnV8WPKSKXJ4Z5wAVI98kCzfPBDxeXcmB/6I+h1Y5WtxE4FYKTur1bK +99GCwja5ytGJ1uUif3ETaVdJgnoJxhxyx4FAlYb9FSZn7myvUBJ1rkFAl86lo77car5N00TJn2IV +87woMG4esMTXhwnHPMwy2xgf3iR+Hexw9yPciPVkln2jznbO+w4YRT15vouxnDSMkW7gHuFwzJZ6 +1uUb9Uz3RqYLezt3bfsFfAyKWYyGici2RYdXcY22XaEXz8i6fdtTF/AYN9OUnEdz030pGj2MQ7Yf +hn7ksb9bFAFcGhwpHeSohqS+pZH4TC0960+dBL9A8Zdu1msLwtU5Da0e9Pk5E0dGETx44qf2C3BT +P4ysiCfEWG6/MVDqQF4LJK8PSkMsKRZYhHcDoDyGEtI5K8i9leZlfLcXTOsoeIVR783m2gDBAcz2 +Dv5mn+D8jwJlK/OKntbTcENwzwkO+vydZ0W7ZxxWM8fgLYavYXdkn5JJO2RBnSIdrLq4GB6bfxjJ +874BGHdCgeFPjE+jyMfHF/bjHRb18S0w93wghBQuQl06w9RZ48OsiuqsLVRuBapKf+fB1eaLgxui +AJaAbyozO9GbHCGAvy1TjfWbTxCbWD5yM03Jff3nW+MZ8aDAFwGEGYkSo3crr/6VvTbc26aHRRiS +h8zZP5DwVCc9wwEj5dHeYue3GMhHJRMVosC/Qkjeo/8WiitQdzWJig8zeo/W/oDscAbEOgBOIfhR +0yQ8QJaeS9tiS8KffSdpcthcJEyACpLHvZ9lDyO7fQmQAW3CwbGDgwi8GtiXid+V7jzYPAh9yo3y +1ramL2HE2MEXqThzqeI5hwYeui9E4R+PuOUoFxFCFmkM1e4g4fH2yoynidEArpH229rjHi4D2rDB +QeHiAQziPF2fv2KGpsKYnYcaB/Bs9B4s/TM/7y/J/QS/oYKX6DmpyD7jAuEhnwG5E5HKSl+jDdgL +xCzViPhwD0OCBmHB73hDk0w27EuUnLEaqOiq/vnV8zC+dOyM74shyuUNvlfAmNDDoIegngVP1GWi +wKNpQHcVqc5kzGQf7MCHj63tLlf33AOOCJlXGJlUd7jiR/4ibEQFBf9LlcXQ7BKccBNJFG52a+DS +kvVIu/RuHbXxFhA3FljkdlUJ6zTjXfmdBdfqmPz7MErbj0tJ8tVf73GQcoH7LI29zR7EoqZVsCID +ZQ9AcW0AWYrI17Zx0UJFLCX8IP7PSExb+FZgRUAU4dsNgqDWS4XYdq0V6bTUff4Z9X1Tf+9ec+5L +h9wjPYEqTZ1R+CSAs6rCKtHYSDrbtXkWzLCF7Xfugwl6p+Az+aD9W9Q0q+4lcEiUFWQ6//pCnpkz +OT4HMUu8JkPnop70u4nZ4Bqual/MzElJTG7ZLIlbUUits3C2IcA+Ky+ZWlcItbA3ci9huHRaJCMF +s4nv0QHeMbtRz8zU4ynYOE+UwaDDWjf3TDUtpHlT+w5X9sQGMpxE3Dhx5jkCiijUQ2kjZSgMp4DX +8llyO0ko8B6XJI+CinLrlWxmQOMirNhtdV1F0gEbvC578BuGkz0IoUSiXVL5LaQ7tiMGIfAZ1KKG +ktMs7tcxbhMs4ZwLZgRnE5WooNTbYF6k26z94gKGAsTPIQnUz+obY3U0nwcvYddvG4VjepBGRxML +6tUPOizUGpbe8+dIQUL01t1ZpYX7fGVhgQOmJWsbTfxiO22yAWGN/HRHxeUcqgjJah19bAooCA6q +XhZa1rRG3fIh0iMiX25DsRSCIbnzuR3Yf+OcFf3HzGfhPjwakBwREt6TKkFll1oaYicFO076AWhZ +JYJZoaAPyFp1bWMvVAQGFwnQGZCjAtzpAcVnmx2z7Ld7nMPt9YHkaKvIXXdZ+x/joeGkekbx+CAP +L5C22tp5gPsmy/U71Q40U6iuGqa9CIkWYqa2pY1SI8Ke08XTqOy9huchtFTBNKgneUAUiM/Gb4gr +FDXTm7EFzpYCFjI6WOSPlM519KjRzxeXDo5DDqnBR3bZcYl3H2JfFsKWApa5GKj3XeABwii8Z+x9 ++VF37bQ9ebYYSo/6PinFwjPxvGDyO/xA2xNyHJnE+g04DGtw/pc/3k/UaANDx5WJUOYj7HcfbeAe +aZpwm2tTpBYmqUgpSGMfoNDLvH3fOj2xSk1FudZKws4c4RfxJ9Epa0Izvks9u/jIsfeVzEBnsvTm +D7m7j9W5AmjEoPOpnjIvBvVOXEuENzHWbjw/tN6EUkegFlmGHDyWAPbk672VB3zO8LnpNDg05m5m +v0uCjBdNXuI/g+CHCLwr7W0GZeA5hqrtcj0qzh7EFouHHeuehcZVLJ9AVO1teYQxPMnDeoXpm+cs +CfrE/f65GMRtvnSmZT2Scj6wvOtxOVOshqTqWAmEkIBVlC+GO48ScXI68vSwMouaL4XlKW/NYZW1 +ozRSwr/XxzFoZw1Ebi655TtO8wbHg1NarKDK4mLy885WnDPr0y7Ys9D/zQgkXF3E5+imoh19Kpmr +IOpReGHiSffgOttRbrd6p9l1XbPRPJz7sgBupwIqubYPj1MxNTGk9HgKTbJGdVXjgnB9808rhhu7 +S3UOg6+NfoOZ4riqtolmdFTOsI84iTBxSjVwI/BqH2EqOC1s92LdtL7mji0tTYzgc1YoxlLwfP8V +H8wjfS9H1DHCRJmYXgg4up2unPX/dDun5qoIvvNfFfSYdMt+GzeGmta8k0FrPBaOM3E/rkl3OG5U +w1JPGxNACCf+RnKNCDxybQfAMB/DOkCP/FCLEMqbKK9INEIEnBkQsgZyKokTUoInMvMTzb+iXSWs +ct6Rk1SAPIQ5crR3sPAyM2SrMelDSRAxZDp3AFa0N7ALdjysTQcxsM5L82cLkfl3nRbsVMoleWp6 +2PUXSoAdm41XCxa9+G+Ukiypx8uTHDCcNFWFClddwm8XG5zAH5FLN7whvX+1yr9xDmX8DRx4qJz8 +cFWxjUe6fklRQOHZLmtIroukMA1XpT2NRepGM4DrX9GiRLYpHYQPutw5B6NNEGIqQRSyypATsn+L +A1s/gW1WcHh5gH/1UAHubFF6t/Avf5ThdbUIAC/Fa4auCIBLeOXOumi5Qg36SnHU/tRGCgzjY3lW +BzoE4TOoYMQQ8yJf4pFIhpD6Pc1Iz7+0d3VolTmJxFP812vZxApcpPxz7notr/Lb4+9qxsU+qAA3 +ErEsXY0Uv9sQM3e1t+IgZUzahjcwkL/PbLNa+lVYRLpDvSGdAieJ+sAMm7CH+EiYloGQnQmPa9Mf ++b5QOrFWBMdTAkNEe0dqg9tUVFAl/3r69P6GjKzRbh1jzWbkrn2pq3w0QiqE/ScCiX1nyxCUzc1c +xpkwYPCajVWGeThocUjN3lIQHK2GLhuNcU+e+8O7u3dnVeiqyFb7S+JLoYg3oQKiW8zcA2+xFgi1 +Coa9waqsuR6F6xsCsVTGTOjXWyMLvcQi35JGD47rKilv2Fspi4I3TS3J+OsJylxSunj5bXTvBZNQ +Px8V/iqIxWD8qkjZLj1dv95vfB/RXDtmKiFbse7FH13Q8dOjrm7v3VZYaxoHN1KgAbBUL3TzStXh +Z0ZTJo88C9ioyk2TXwUmaCHPmGYAMLQMvK9cA3YXHQNYcdcKSY6HqFB7h+YlOZGI8xIrYczzrQxp +6bI+onahpQOdplFp/saHDdWAd9m/6gnmfW7GionaJhwmCJcpTv04NPAWPBJxaXwHzMnUlV+IWb/F +5f6bKgWFu6h73WBqrOnPOL4f72sAdBLm5I5c3n0VJ46OIrf5xzfMT7gwOvlI9lRljcaA6op3zVb1 +vdpmAg3l9pmqFWJOJo+iljnudidOnN0bdzpRpESCP853rLAz/Yjh7OFGFaJyLbcGxpseBWWPZuLJ +FEcRISzuVnU6bisWNlcpWaE+qn6FR70U5l1w0L4HJ82xTvOiGmVEDPVXBmrE8drTFdY6fe/EvdNf +q3d43sa9TksNnDhfHewq/8tXg/L8/xuvM3HYKkkp6hn+o07iWWv7n+txDKiLMb4hW77aMlZ/4szb +Eu1C4No4ObAwcM7epuCfrmEC9f/sMH4wCavoIzfi8MQFJHTJlEbBB3IWaJKZuRwLGL+cq8BEdpli +hvGPexnlxz4EB5VL+MpdR1tgwgHYSvkkfWl+QUmmEaO+ZU5npAMINoDyv8CXYng6ftghjOvKwSkq +8uNOvVO5b9P2C5d93QU287Phm/ZlO7fC2+rEwQ5cy1WijEN2DeY2/IZy9urf6DbKpv/iYf1m5tcx +9tS5fSgX7U18K2qrr0bWQUtJmwemqLxKkfZY7GNCw8HsyOJUYLgYydicczNdZuo+0f052hLZjVV6 +ORR/VIo9ZycmtG8J+zwFQ9FHzGsRmLm5Ya/8g/m8LMXLGI8+h+n2lzH7C61wKEenTSqWfXZdH/7F +Bnsm7TLGqCppqa5vNOE4DkLnrbhR5v7BJIWA/NPBeChvG6l2dZ/rkUpQdxmcLpF0M12NKQ3jke+W +osJoDNezwXOZteMKtkrgxXNj7LypMOa6voE2flNtwVzZBjQpuxlr2JuTsjBeHT3x46GXQJF0bJFJ +8MOLUNU4YKoYH1SW5u/C1gkDiDlnQ1a+Jmk3v+x4Q1JZu9MLwLaG2xlrBQX+j07xU8kSGlp9voso +541W1ESpU5ZMkQMDW1I7SrS6h+3OywbUhu0LpGsbcHKVQ5FIpfMN7kbTsTxwxU4xDgFXl2p77yzD +kMbTZwGctQtQqi06zWeWNRXIgMN6dGZq0xjtU7X5yZlyFhCBDOo0ju9q8Th4YFgxddaaSKAlX3vF +UJRu1WHVWBVzdW6DkLQjcP55UumBr6T5CeGixj3b/C7VqIahnbapGDuAtx31K1fbeVCnk/V1q/wx +raTeFRt9slcNdDXU92EBI55jPpPlfeRZCmE41VM/1CtwoSKTtlzZGdkuEnHYCSplHQqp0W9O8Hsq +1tWqf5WWX1wpgd5jah0yMImdMCKpCjH6AJra+x/yAu4ppZEgjHoAXDd/9m3iaJMcsn5uD7Ktv8YC +LCs4GZtWQCVZv4hrBqK56Cnxv6Vk2lSkwwAxEyakmgR9vnDyoeCCm1r4tNmKaDhEFwuRaycKfrOw +5HFSPbZFWN7jJXG44tExM1DOFUAgUA1RHG4uX1tI/9FnG/z214+qqy9AOP4K4fNHMpn1HNFMVuuh +vfhRCF2Uz0JRD900Kqnk4vN0hz6mMeFxuz5hEbBmSyGLZ1JNLbRHmcad0HhArWjkEIHmJNvX/jET +/UBBWoRp8MrTtzWcio8tNfrrO9UH1tpySlXFOG3qChEgBF1FBkWyaMo1CtlV6lgGwYVHj+2XjyJd +I4Gp6I6sQ1iXSxkBpTr5Z8QxB8URClO3ptuv1qWjFWTERaqtNTN652CIhVDpao/60DHe1OmnZGnd +lcPujB/oBcMEfgpwfyVvy/vj0o8AjQfKvWJ48dDVADkw3bzAE9Zcvp+0Euch+Go4oop3qBEIX4B6 +fzNywlEd1KAroWaFDrGz2yR61ylu120/os+yH6uZPQxjorX4l86kFZZR/5EKNvuSirgdFeSmkucn +vndtpSEv7xQNnLKCo6u85ow956Ro+jiqfu7bBOV91bwAPx9jk3fF2crcm2z82TkiOcLn5kq6ItpS +RdG5LS/bIzY5yH2ii3xitn5n0j3aPXtfBlcxFpy0fx0RgNlhEdF51AhRuAq5/y3Sr/zk7gExb+Vq +CfZrQC236FCFLjzSB6wviMISDqcmUiuAnl4l/0qqeUk/0PUmPtLb7alYBhnhL3f6zxIOrLrY9eZG +3NjMm0uQ4bMPDxbvS7VhKHgLWSSRBgmsGuZpTBmDgMXUQFoBAXe89EzpDSqZgJZRJn6U3PJu1dg5 +GxJo0ZGDtM9JsZTQhioMsr949P+KD8wW9iu885hpdgyielgjNdfr9O+g6863AWMab58BQe5/U/5Y +UtKxA5whFSU4l5xALT6NsuMtcPN7VRR4/W++rT9TN6lr039QGT4C7dJ16JTh1yK4Eu/gGWDhGZoI +YM1itym8PwRCLecY/noDuXCl3PtyzGlqxEw6byWxk2anp8jMwu0wJwn5WmfAkmk6ZNwJsfNpNq6S +gzrf9xzHPWTd2l083LIFH3Q0cwRUEjcGpDibK/QmIk2OVuiZpTANMmmHJ2Bd+OqBftlAZVXLgGpj +BNwJo4zPw5vr29c665Tp2chkDYNyKEoDpXMO3qKRqUXS8Y+EmDrnPeo5pwohJDHM5IRac0MrXeTG +dSJqxrj///QmSN2ftp/Px4ksZdkF5YRkxWWQ6Wp7WLOwUY4V/tat7AaPYX4FxakWobSF82LkFdiI +hUcs4EFspGQNw+PeG0XXjmX/aQuVshwEalBazAxWYUeheMUWwQn5VT5dDnAou7BEDC1y5HNVu5wM +tFqTfjvrrdy+4VImkMhMcIDyWcsIwzB5NWsRWJTykTAh3sMHLLIRjShlPNLG6XWaCXB3jk0BrcC+ +db5WC1b9uEJAOXoKiIKYt3bh5dzrYDPJ6fZqeuuSS8o+L+gFVF2W4WEWMJ8RbUo33gtHIP2DZDcd +l9LbOquuZnwq3/8o9KDLixZylQHC5Fsgmi9gsv2o0oLJDM3/RyDQlPbYnMv0s5NMm7lefhdV8oGN +DDNRcNIM/Yb6p2SsFe7AlIzaXO8aG2JyTzuhlfdNqFzCKXF0lB6Ra3be5RVcga5u14wROZ0KCcAr +yNNPKcBPhugDvGWIMpUqVg5TzFWP3mCLej0O9DvksJFOOwiuB8y+TxUyRhLW/B9QDAmBJ1M6JrT2 +l2gBRsyMzN42yBzX4Vfj+/Mc0ufKBEbio299PuIyVDKnKK4xmbaCzVsO5oY8tP/1s9SYZdck5OHb +xplEeS9cki7f8gGwHXIBbGXDzrEY5l3siPyXcLgRALdNAzfz4i8wBq5XiLU888abuKvaRWwARwww +sYr/O+GOWaGTBk61unkL7SfWpX+Rgc3TwIXn7JI9e6NUhTDZls6uu2VKgrFx2hjPaj25fCy+bvXa +lTYJAUAjgrI1DNNaaQIZ+5sUh1/TwwDYLUeCzq8lXSGy1EJEc97UmlFrvtYIrYco0PuRJHDr4/SM +5gdarG8Q5jYgo0sS6X8bGC7mXRdmye+TD4Y8d5YEBYysOWnnk5KvIFCrKsDkVGjqUkGOyy6ldwOL +KQx+RfuR4zr5lV37inofpvF1IV8w785inkpVIOgspd/dCDTHtlQK6YaGUCMegkLM5tO5YjwsZsy5 +eNsJoqCX5h/8QQa27gyGUJ4ihys4linw91kwQidVkZvwJkn7JDymyWrppXni5x+AGYL294blmP4C +Sl8zXwZF6lVrYyLIVWNYyXdiH/YriTyyzjtr6DMnP+uLgC9hPkB7xa3c0SFdvgNUEpQmYbHK4Ivc +t4MMC+hG8rYa2a9MnWoq/slRdb8e5I+UndgGx6DAT9M0gTvAbD3vndP3l8ssCYtER+5vfEYfq8Cd +QPnrp8L3xlWSCyfc51F0HP0WUSocXre5sMGL/aoqOJqVpkMen90Ni9L5DIf5bCSIWEo+mOnCpInS +6nWa+tBFGWTbmtjt2LkxnjI/O1OBs42Kc6apIEl3BO/gPV0KKkRAMv57HTPJzp6H1+FBQlxVq6NW +VKflEC+18IOfryePqZy+zR6JL5+TdH/2fenwfAPuDEe/wMtvgl+Bhe9/K11rsnlDNFF9KYfbIT4c +klBgNBdNqsi1EkTtUxq7SU++Ir0edsa1uHn7LvKDdLbx0E+DOzqYFJ4wX2sOJb0Jxak+zMPL8Cp7 +ZPDRHbzwTUpZZQ46x+eaV44lFnAeivHg2QIfINPSnTGtuDItpm286ys3/5qvoXS2AZyGwsKvgOIE +ZP95pcpycbKICqD9KIGZQvlzHUddHjmUIM7ODe8MDS3KGmYQysZ6jjDg+/Ka94JPwJEWcklp7cyw +Up9x9O/5MQOIhzT7sbz8NxpYHEHe7hF1P3TEEiyRIHlgXgFK2NBv20gto+IuloyO7myXq0/axM1R +0ec2m/QQg4CRXKPmIRZtPkfazHv/FV4PWwsXqzpiLaC3ci4cZXYrn1/6PdOoWFVz7yQUR67XUTFD +mbkBiluDn2vMSzrmczt9kwNgj/uBWEArrCkAgeurT58kRYPbxt528GOvJqVshtB69HVtgWeSc7WN +vqyY69TPio6A2JBDPrEoXhJTEWkJ1EjA2xonE1mV3FatnALANI1C07oBq1CHMsfaV8Krg7A2LvMV +SLSJMiI93LCmN9lZ379fqfZSHHIFo3Id4GsVX/tHBlT0pQ5vGz6Nxud9cIbzDGhvWsDT2B5/N012 +uE2stRBNj0h8K6xY2lk2hH98sFs9XeDGx1653EGFWpvNtANQfY4FPRdWT39FTjJxMZvQkdwdVon0 +bw1jxCVALuSzvqqDbfCWAW8cQtA01D2Lsk0ZTi9fhdFiRe/gWQhU5HPjakA05z/Omxx2TJ5GH6Uk +nMBLiNXmPVDF9h699HbIonz7qKJTcO81ZShUwhj8gEIlER9Kh//tMpLxxW5r4B6T158eU2aFwhqt +Wnr4qOHM239QTRsdTBTEo/ZtiqVYALkNvR6JjY31Bj2/kqzdQoAcpuLIQG46CHZOd4m6x5GXE6py +1Lb+C64G607fRfzpKkNGUHiA//iOaTDZYegrDN5FTNeyjfbZtYiLxpcAO0rYmP0GccJveWLDAgZP +4ijY1U/x2HdCUOlW4hDbAuPa4XVkshbYw31PFiVd8LtAxgN3QBcyCfx5Cr0O+0DnOdK8fOtHor1W +V30Z+2v392BpgGLVrrURPVYRCGmrqb5Ywp4IY8BWgyJHdAgA6kyerfxplIOHBDb2yh/9XooyRZuk +u2Vb69w5/a/EzGaAg1dCck2oQoE+KmtqimNWHFtH9L5pwkUJxswrRos/+af0leLRUH0Wz0ItYVcn +AKFFsuneRXoCdsp8S1Hv1DyjOJ3iZHUsjTNizJn6xkv7jx3Nz+IbId/nMKf9Ln7dOw5Ir7mwur9C +TFKpCfnSUvnKfDDognwLjra5mvA2aXpMEVbj/SShj+i+gcEs3WhPP+qcmLDw7bsoIvtcf8k5WdA1 +7GcNkpG1f/DZNZd6zUIgSoTasyzoblvGu71bMyBT9z7QraPTmGHvITrsMfe45TfbsmpqIfRyuB9Z +KmFtRj77aABpLf9PH8jDKS1TUXwcCKS9+zCr4ilf6qhtJWtFRj4EbITsCC/jFtNpJSf0P6Qf2Ych +aodRGVwbL1cYvjAKws23tWVrguZSrqIR8Tge4+52jn2FWZwaJGB4ixLEx4obqRilycg7ZZ/RpiYi +Ipklsz+3k/i2PGRYebqL9lRfznuoKCJwgn0Itxu3VjezyUDwn/nYXYFHYQ0uhLqYPaoT8yMg2aVG +g0dvfSou+AkYCstSV05cGgdFAKY/2dq2qkoEdnvh3pRSMr0XSR8OrAL0MM1tnQBiO2nyCw1zepqv +s9WaOoDAS4dL9U3o0C8YeLP8ck4n3zJjWWM2vRqx5mUmYkmfoGEh9trbZbpamw7pIHLQgQC7sKHc +ZYRzOiaGUFGDx16HlzKfbteI9jYcppWCrJz7tSN9Uo2dlerTxiJ73xMMGnYydSC53XMS7fnQeMRZ +RN7168xgTuRNWTpFd/7unkojDWP4YErFo93rPheXI3kabs+JyCZNkgrdyq65M7tuXC/l0zNWbRnr +PaXgqJTAIj6pTpQbbdz8d0U86ueeD/UUz/x0SDUhEw/fLxIrlC7aotFpgyGMZptoqPglciMb5qVg +v44Z6uDq/meIrBxNPV8Vn8WEy7zo6BB6LQRS3MpP/jQM8Mr8YDOLoFsNQPvkfjRhwmoUhYGSiYZu +e55myn2MEO6UYpUsoCh0J2XDA1ze2CvlNjlC4TtATQi5a3/4NAaD78OV2Kg+c8TAMd9CRp5lYmOh +WBInenC8bKOLddo6+pWxIyyCeIEoi9sw34PNAyY9FVXFOGbIjM5A5SKkGRrOh0SRsQ6zERK/HOEJ +3Z7gZLMQmricOO5EkDLQgqp+pmLz3ret7w6cNPbhK5Zhl72DhUSfVG797OGLfQsYncBYyAfbsINh +BiVH7h4LfOjaAL1saQ/S5tnnk9ddzMqVNQEoj6obVs/M1szOLs6b3eQKurSPIwzwTQ04G0PveW/H +cW1oaFFrXCvRcnGVLkb+xNtHthEJh65vGMl+mQgcY7W5fhX9kANPbebOwUeP0U1nnW6VmWtMAVWp +Bzdy3Hk21wLVyuAiddkGm0lB2J1oQAtxcCP7P6C1k1KywK03JfvwKlZeYFI5cjogufqca3UqepMm +ATZUJsyNDkkBma3FKoVMfEPx04jVMwA43nzesiG1JlLq4j6Bkm0Ic6GtNlFaGPzDKUUCsdQBL3AU +VfRG5vJ0O6nsk9OdtVOQVNeygwBKho6BRjBCQSgjGaCUHHj4M+NegvIx/8f+p7THNZ+GN6pcza7R +SYiZ5Q9/5YL8C2iNZuXmsU3ok4qVNLsO78F3tZ1o23tKpA+4CDrIFBIkR69q6SA+Zp+9HIMW/uCc ++7EZEaJ0QERZD/a99PxkCayqLxxdrYqx6TgNrbcYLLmPvawBre/xgDBnsBeRLu1rNI9f0JSjHLej +s9mvd6juVfY7I8mKJGJABHiwCihbvvtTClnDIv3PKWNtQno6634fiMLQyYqXDJ0NwOCpRoR5GXRI +hsokN8YheDG9Yt7byftIfwpoO5OS+hKB81JRr8LGl5vyTjFHDZpKP3aEoj2xNYRQCCW5E9kPyTYr +NZDZs8aVClJZZLq0ctwG4422f0LvFlOqg/Mu/I8tNv6oqIAZCZJQHTYtSuTyV4kyXLycyUHSM7f1 +yXqnpXGcD+ygK0lEWhFZxhbjvH9HSDCNkRjedSRHjuYIvmTUb1snX8vCLTLhpLSAwBvfSf/SUuLP +A8+jLe+itTPQpWX8ro/km/lwH13tOz1E13IZYzD7XiscBB28owmRZJb+wOEwD8boXbyioo8jh4Oe +3iedAIhQBW+8J9wHmLRAPBL1ZkMW1GgzL6/vpCY8NrRo347k+6dR1D3dCBZBz/e5ieYGIiWxEvdS +bRVg7/MjwiQEHAgWJr5YnCxS0ylFEj1P75651oCmCX3q9WesXir9j9uaCVRilJof/m4AOL/5XIUA +NVE/oRQn1Nq5N+igmE61GLSDz5JU02soZ3hst5OaKMR1h0IkGusZwCaCc/UkrWBAJiF1i9HGKhLx +yz+/atgsTPqee2ohYzd85QrJaMEPAPkxaT83EvGpRsFWaJ+CLGgV7vx6VSnQtRXpLqj6dXX6p9eN +DzdTKRflQI6Z4IYZWi06GHTqOXt0kq2DRDaTc6W/FthTSLZIMUEvvJHdYDCOF53RANrVz/2mmpiy +jHoHW6nO5iMgZgXScwf5vto0Dagsvr5AlfayrJkYynmGAPv87qN2ESv2e6duirSSzu/imJXyTQbP +RSTJmXW6i4cnHxzhIMoDZJeQ1fnBcnIo/bMcFR6r42cXoAf1yk0aWR0PmVTAYSwclzYSskSAMYUl ++lXZoa3R2Gp0Vxhao2m60+6fED/RGCci2De3lEB8wXbW5A9ar61ScwcmxLQje094Z4pEQOs+vQZI +9EvSerQWl7U2uvditp1okJxjcRpMuFM9vV//UHoD0xqImGtlmgfYqZ9heFG4zbSQq6DesQwEEXxa +ntCdayVWUepcrqAUWzLKEnu0iBlOkF+tqus1mKknwU6+L+LHGexYdfDCSwKSKjih/4wtTh4iqJrO +Ibu4n8JReZ3BvqlDN9AkUGfpQFBeQo+Bo8eLqPWtqmt6HmWMX7l6flZrcVJDAwHLSqYKGC08bS04 +d0ie3mjaPAWKtxU7a59UVVasuTox9bzZCWGmNRIEX6z50s5cxGD9N0XxjfyECrdVG7Z0X8/GO6c3 +rw7Fwy9qDmBomD5WXt+PrTwHfUfdMRQ9EEotqcBHRY/G9GznbP1veFST0G/ZUJ+pHb0IaAh3p31S +xb3tf4BtIuYgBWKRB4UpxZpZrtwtChEm1sqwxZ4MPmp+7tneZQyhHwk5VYoo+JzlTUQ+8ztnAQ4J +T95J3zuNgXEDkED96B6MZAWw6kyokfozLT1zyHmdFKNugSSkGd8iuuw8W4YOcAdDtwpkKq/IwZSA +ZE+/1Y/3PPxjChjgo6ky+okhaBxYuCik7FYXFG/Uirh4RAIUsq/zV1XPC7mTm7xEjfySJ8tdzUwX +d8CIeournqxfGIUL49BS+cPjb6VMCcqCywA461BB6qtNUyPCV6HXLzNE1dnG8F1IswT90euviD4C +uCQNcBlfqxyefF8nTOdiQ8Nnw5CVbzzl7hH19YrMGeG8tsnlRU/4D5RLc9usih0Bxib+Lzcvr4wa +OKMkEjz0l2910nwP0z0cA2a7+U0F2NEnOkm33QF4Pz8xsba1MBgxY9eqvAtSh7/7vh5+XJ3XeVoQ +Ngz3IIsv8XVxicqLx1FGEFSqX/WzBrIV66gCVskU2rB1NYAu4hjSC7nw+BU4uXpm9tULkWSB2+Z7 +iac3QfGvUBgABITHfN3R0CxrJyole2msn7ix1LgTbyZ3inas/6NB2r2wQPWJtGs1VDVLUm/Yr6GO +69dL5FYa0jiAxdsUEvHxgQFKXELGdiGMCCLL3pIUFWTPyHbDZYOZPWtgNajSI3CbTdRfO00soWck +snyZe7kB+ZMwFUOGGwRc6vOp5XX3Sa43qbb8oaV9ry+ZqTWYT+RcVJv8ES1y2BSch3cCwSwvB5j8 +dMMdkk9k/uM3ZQNV3lk86MQ5JUoTxGur0tnHF6p780NynSBJ+AjfD0gCfvErCb1tJOzkxXUrf+9/ +5iCiyGI0ci2m4pK7qYkuOIB7HPFrEzymqfnZ9+6wC8v5pVU9DO2H056Q9GauWB0SwV7VcgXDYE2H +2XeSGhD9Ec05Y5EYh78+gQ1iPeWzAM5mUh8sB3ElTwkOWSSJ9y03NAtlFQd3DDixQUmM6iwUiZBj +vlsim15XisKmCZlQ8TM53zZOnTtbuOBWtxR7MK+D0d4bUsoi2GJC0g7szt/LGP1TJ/4WHSke3Ly8 +az6omKuYHgEQMSvg4qGK2R+rq30+BGq4D/PRSxK3Cd8NwM2kh5Qoth26e/HIleZiH6KGN+psmL9a +xeC9PD2lW9QhTvdx50QO7maFmIC11mskBIvJiGWhY2YiIGAcHXsyRftulTgV6E1qLpOqflcQbxdQ +SkOH1MALg4W8gWSbbDy72HKGa4bLozT9uCu3uip2e9aY9A1Adxjwwik4cEI7Z9jk+xgDJFe45hH9 +vpwXjEwuqJd/47F1lZWhWI6fBZ4ySELzZyELpZvHlkU+83bmm67m/XelHTlWr7FC9qMVpvJlvo0z +3Ypa3Xq6RFn7sUqeXfmh/QoYp5gbVWzU1kUjwAC+aWanI/USctVyedMLW9v69nzJqzfgMqB10KIm +Xwc+D9rbSO88KReA/0964zoNiMlSGBgALo3lqLFuUaKMmw1Cs37JiMD4cxEs5tQtktPnY4IW27Fs +IK+6nbNxERj3l4QLcJHrlQbuP1DvW3aqLLFDEM4is1wX8ChoYxqvmOgk9kBJyz9HwLOVm2hrU/gC +8Ncg61KhCcxrzz4IvPZl6640o3QYdIDBntT4jmi6RTBOS6KYCV7VdIaZgw1lnFIy7RAH0LA5Nvfq +VPpM9KR+cdphiRTajsLQ01QITGcPlMXVygk5zuxR0by/S1I/snbUriAWhlNB6D/qIbmpHatpbrq4 +Ca314/oAnbmOYV8uvQhESTwbHNBZ+J1aMskm7b4VI3/QlHVMI6shfvTQYiXqDb3G7Z7dyEtUAPF5 +8FykCV57bfdfD2glOGIeqbLrcxEDslvU3e120aRLbzYVSj5PpPqFHH/JEb+X9RvXHiwC3Wo70430 +Fdgc36A/N9GE7c4ndxg3cGib+IXGNLhZB6mTYmLvNUp9+KcjVQqPhuH/9rmzkn3RlziV5kJASaap +R8uorYx4HYrshpx9xh5iWkg8THI4lxuFnuHIWK2ecdYPbwZaT0HjQ7Lm0ByUhGQUTdL8418Id3J7 +3a5lYeK2FI6BmSHEVWwdMJQsXNDQWZpjMNqgsQXUsyEGXGfEfCwvR3QinWru7/VkmG8Sulg+HwXV +ynwx5K8uKAI8dGQeOofcQ697HViMbDDucwxrvnk8H4qQ2YXa7HjCXjoIBeEGpgosr4rfSOfQVKxw +qGO+wAohcXY6o58q5dvwr+qFT7jNxA7a2Xj5wz2VWbIPZjArwoO2Snk2ZuCz06smfQ0ur90QVZcg +OByHPrY6eS7s7XMuArfzfwi3xdJARqOUHnC7C9fMYDIBW30QDcaNCpLyLhaPUkNVB38fQ4KDo0Is +1Ln+ydxg2kmpRmu4TcoUmngrsBSvVDgucc/IRr015aJmAt1jJLbj/eXgyaatPqkjpjpyjsVKxTGi +y4QNVHxOVe6FjYLdtS53cWKjDPqw18VqyCqDKjGzBpL24VlXlgNhWOAqTWM9g1ty9JbAPvIozAVm +38qe8lqYaTQdCUF2CIm3Rn1MZBjD93iysFGKFLgjHQ3VFHovj0SKj5js6Rc5tWc11kMO0Yc9JBWW +sAtRfTtfEbK2JNxptUVRYzSkgigyZAkO7FK0Mu4ILdDAPow6dobI1r88uII3SLSN8V/qXDiZRTWL +UbdE8o4AVjE33KUmeoWfED7eE49QLldPtcs/t/yu6hMbE5KFLtNUxqdlsikrldMWVHy5JWzDh7Zr +pI+Mo2fsJZ4tlj12rDt+7tZ+2gLaxY+oEzPTv1zGiAow6kcWTqGYKYfM/CI1UjSDtbYPqAa19JZj +1Gmm4IzyZgc7PF6zX7So9GcpfRCcnEr6o+kBYiJSBwTr8C+PqKXFGB0zKNi+FvkKlhnUHy5ym95F +uBHvwgHnsyWmmKoeQ6rOJyUNOGUz8tAvzpZZfOPcMys5Sl6VMUZ2loppRnJB7BtZv/qiyhJ4j+F7 +2o9c2HEy/RviV2Uzx3DdNtQA4Myk3YOF3Hfg0sjNPIXkZ/G1BAOSZxgI5uXk/XYv4zx9jRTaIXRP +VsXL0Z3xaACAhQtfCfbc9S35tTddE3R/U9Wl8sWMH7ZKJmjnKxZE6TJa8aGCvC/6gA7dDE804uOQ ++YjLhCUdMWWw3s5+uZ4vCa+pZlHgoII5457OFpF+84hBWLqHVy0oFJ/14hS3leA9Hdoz0Uxef+gL +lNn6IK9G1KCsZ2tfq6RUVT6eHeMNKdG4OGDAAkf2POtcLENgBEcDDeWDJjK0eruUJqJ2c45KUJb5 +LUoWDiu0QhP0zGy1vlElkWLOsHenU0vQGZ9vQTBj5q9ErnZ7vHMqpQkUT7ENBJzVYJWAUR22IOLa +PpUhFrmCR+JU1E8e1GNe50gNjmP8UBGwN1A+pr7847PhmE0+pjgwtXZ+6HPhNg4zwYP7iRlV0jzL +Vn6eh8E1+jUxAb2vM4NWn9yjDJ9cLcyd6++i4f9Z6LvXKm0uB67DE5prMOHCUHEI3H/qLr1u/hQ7 +JSPM3C9sPkPHFABrH1OOkollYur6OlPeX1spBUcJZ0MOoqn42K82L8jtIZOJNL4ADqDxGu8Rd7wW +66l7U1m/M4Hs07jsqXnD/9Lmp3Xo3PYGPkFd6YRsEoI9It8YKfdnkhX6+Y1KR63LWyR2O0Jgwec2 +MinQOJEVCXQz2oT+cvzHagGWphI4T8R26ShUaMVg42ZqP+ZzrAGjEqfpAD8XrsAD55991fwqzeHf +TG49b9PYNwBj48PxuCvC7Jd/cu/mgUjK4p4FLjz+jB1X0qT+D1tR/UE1DwAYfwzq4l1Sy8EkFKjb +ERMkM8G/BRW000Xc3/SPyVBy3x8/PanFcExbkMa2HqYVMNppa2A4zzgJlK2UZ509HtbKoeYlg+o8 +2e+eDwkrGkJq3TklJ8KMW9dO6LewJvWGij5eHfKcPhDgRlTdtdKzTQIHPw+oqz7ioc/MquXbVCMV +vjFPIL/AFV8ViIMeiFLMT7hL8y8LRSZGPfM+10PUp1qO87EwLRpYKPJ0WcS1zFnj9hW6f1oSzZhO +pYicagkutSaUVvLDypP8ZEPvJtcUQUTxLGR6wEXqmTzOo14Vkb8sBH2NegDcc80sz12Ncs5EDs6s +Kppua1F01WTAI1iKOhrYwoD3Zoytf0+aQft8w3qNwTWxt8filQrpZnfJnb8Jh4WlfWKDhpTxjvR9 +I/Pm9c0m8OETdVeMEi3TKHPMRVYf29zLZcMIyiLC05alpcTl2IIRRvM1ZZf18XCmg0cdu5eCKaTp +MNrM6pt4nX9o4TB711ysveD8tG8VI2Ooq4jlOAZXC9vObtRgw7YXzLKXpfz55QH2c0L3MU4dv4NL +r0ZLSkJesO62PEj3UQP84WtiaGnkrfkqb7g/bMPeoa4wDkx+FILLsiw9t0DSjGAdYixBH4raJVFt +szekFfmisxjbf8NUfmBMjLLFsNdMx6qaLi/wIY+PvbwfjajM0txGM5NJr87IxsCLcHnq9BhxJC3O +tuPNI9YZD0fKt1EQPkTtfMRn0ctoZhVUzzUqFsbs7UDSUah1lHmZYI2v3nx0kbTBsPMxzlfaf0Lt +ffWb4r6AM+TCk+upvuEuXaBFlqRPzlVgSRlcISv0lWL0wUkMzAhi1hQzSogMiN6qc6M4bmY9MVI7 +8AZ1p/3lHlVPYbfnkcaZ9IWEuEp9DLOM72/A4iJJf3Hd0AYSrYN3bWnyCuEBLRDDTO6Y6pm3hAcI +R7kPh4W5JT8fRHttHGnJ6suPMgxRLG1oWvuauyoKlR58MJIXUn1t8f39B3lsi8+XH5D1o6WVaBaX +iGos9hOzoknDmx+pgDD6vSAqXdfjUjp2sKrw0LLe31OJxXS44EExt79cPiCvk1kM0FEzdhCsiFK5 +++xAj+lNdlrE4xoGVAFpjBNX2h/ma+0avEfa6hB1zyoeX01bHfibPWjlohYXB7FWZh3ncuab5tj1 +BBFiCuHLCUjH09F07Q0eDG4p84lK9IDMp3x7Xv157KBPcpveGWErRQtjtk7qqfBmew5w0ZGwN+Vf +pyyVbhKIWGzMvE1R50/9T0Lnvq1gufF5bqqFRFspvBGK1xZsj3j8bCJeQwho/HBtTF5msSfp32aB +l42RsO+iksHc2ikMPrdo/uVZLDk99n1G7lOtSOyP9u4ne0Yul9Uhnly4X4/ok8JTYAQAC6k1jQPO +TtHSXttKa995mMN78iW6EQCU5oCpSTJwMaxVUOlCCAdSwhVv9NmS8JrPBXge5O1xFPG5XBTU5jPX +Frk40TwhHbX4PV23H7ZJFWOfwIzFt7bPPfJj7yhH1GH1C2gRKbzD1k/3EwJpixN40DBK8Is6JepQ +PItLL8AQ6/z39hT7g9F+DFDt9dsU9KRGxTHR1tBcpVdzdfGLhwLE8IogarHqKGXMZnX4DnM0pRlq +XktKdSqdNc6jQXtiR74jb1rH+F6lg18kalhl2widnoB8DHd5waI7PTGpWiH5HiAMWbb3ffXuHauw +Q5LEbAxO/g1AkNel4nCj72J1YX20AUkmYcX5dXEjQ/LqVT+RwE1+vdx160XoafOGlTLQWF/ju7M1 +u7zdUvt3IqhHERIIjd22VHQ9WqnK+fJn55G+jOKKqHOA4+NmYDYWLdZs3W1wjfkwJnaUDeGD3PdN +i01eJ3uuGlvFCT8W+bmcje/wr402ABREfZWsCrsoySPnqEkK6iYVBn7uN3zUnI/HCv5Uso5IxXTi +hvSHvHfQYX7FEtD4AhQgYpJz+1yebvpILpIcyzyXXiqP9bLO9GYp1NWJjSDpQ+CX7OVYlYHnKy4j +1y4ItZoSQQEbarXuhlGhN+7MsbBt+qYkQ4q1Q1Pl1o6E3oCfMHT9QDxsNlatqiXjrSe1I1ZFYGxu +oSx47fliUIZGvapCM9pHnKmdGOZrbRQU/2BFkcYY7+WsjuS31Enx99+N4T0GAHF1fS1QJ01Rf00q +JsrofzH/I67YomxuHjfD7dWgGotIX7eYkhx98iflxfHitd32B2UfnHuT+gowqTSxS7F2mmrkEvuq +szrO90JJVil2+yOC/yjLcGmmECI2JIBcIbdRjYkZo9nYzO/kX51+hWHcTao90ylQGDaGdMaie95Y +LIyBA9+wvnw5hS6T648JN2KpZeQ4Z0QcwTDg2FB6iyEvCMWvqFClX18T7GHOrDwlq12Pbx09G8a5 +2bbvYoyaOsEtV9BdWUXfFOeOEyx7GLOWdkxH5BtffqrYwqoQY7KBlG4+c0K+hsdPC8Pq2ya/asx4 +PNH7sLaQ5gXerwZkzNFHAnH7xbWIkjLsvGwXLyRuW62r3jArDgEXkCzR2YxaA34vYtkyUa5jfGBO +hpvbbS+7YK2hgM+auAlib7Y3N9jvlMxCoG9xQgVTZDqyMuvuX8nieDHYww5lVMvLqcGhE0t3Z3De +4yWfDuVeg+YGbEmRKsoIo4acyNZM720ee9YrzBEukd5vhoo0NW1Uxnp6grJizT2U3IyaauaFaRfk +R3uykxyelugTEdm7nsLNTJiExL5UKLqgqluZtJ92fOORrXP+QzG0Nh/4rgVAPvFdRpA+DIU0iKZt +jaflxD3O9jn8JqGoJgclQy3zvQWR6HOdZ59uctGLNWExf439hToB8dHC3dO1cMI6clhI/7kMtnDq +SpSMetI2NFMu+415mkoo53E1K5AoTMCRkpuaEiTD0Cuhwuy5d9xgnynvO6b/4j4VPM7M4ZufePdD +ZpOv+/dlYEpZR3SQRQfO75NB3NRhr64PTXGthzK3KSNSJ0VwyVJEewnEm35WaiG/E84QpRYJTLF/ +sbdHoaPOAMvhFHjA80gAAek9pSEuX5lPChgq4cDeWzWYcvaCl6TnQ9DU1O0fNCyKs5kv0LqCeY3p +YoXVVGF0qUPtWvlZwr3G+mvFnlM92FK35S4yFSm9FCziTnNzEpH1hHrKb85Lgplu0/02cI9zBQxl +jLFfAnUWZQuHX3m2UYo8Dgng/GBfeNxgh3yGLdyrjRwwEEx1t0qfC3MnNID4LwrjJzFghz0wMLZ+ +x/uMK/ej265kYsm7Am8uQU7i6YmQQWVwYuSxGdIX5fIZecX2/BV6l9c7madoyiiGNnWF77/S060g +SvgTqI/gzNgDCvyJxkm0dc8Hjvq3DZqWk6Z7y+wM8Ls97Zhys3gcaRHLpKYC5W8g1p88Jerh6PXL +ifi5EIJhPdQ9x1Cq/Bbhp+ThAReTqt/ENA9tilAMUKFbpSwX93Na8U52ZZww7rIfu4m/5NKWlb14 +1uyizERO5nrd6HlQXUhcnChXTGLzadpli6ei0dTzT/l/QcMot/2iVu0eL7A0Ktzmb1JgmIIQ4HUI +y5eiYLVWVBqc6KizNAc/wtDe8QL/ireg5HDbdDRtQpPEF5LHwfhd8OSJ4Let+4jS8cyk/U230yzr +h64XuTdWVxS5MR/0Q81h+nWL0k+xtrEhXhhLgx22NAijeGmG/U+Lh+bM8PWTPE8buJxGkVpLSMBf +bQmAjDAc+avVqM981sWPjtRYCLUapjl+U2KEYFCiGI/BHvAMyYvRRedKQzxD1pxnhH7Y7A/WKYxQ +AA1+ijXrL/2N0YegcCvxk8A6ZbPAmE7xbwsWizFO5wcCRGlxDjLoLXgNqWew/KLUriM3ufQz4Vxa +G85La7d0zAKGI/4JXV2ZvTzwd54cBlklFyhoxa4MmzTFXFwH3MgM0e7zrzIUG9Csqwii0lWccb0h +kR8O5FyE5VHCfVNU+hfyuxtunJZK73wPCYE/Yj27giFmL9+mSrRn5xF8Nyx6G3/ma8JskaeMzwjt +XGjZiTJw4ec7MXuGy15R17oGJwmwDX1e6bBBgLCIozelsalNDl+eEejeDE2J39EOKb3UxaCtjyFI +/bPvt6n0/kBd6exkzFQRYNX9/YgRUcbgmK6spXlfXaF861vA1r6eST1V/tz8bG02V4qLQ9FPEZUa +wXdrBp6fRuJuBNL8mr+mbcMK51X+ekOYkzDS6G6g1LlMzP1TCjWST6Q3JrMJmxepxWomuCXl9S9d +JFH8qEqLk9Z0H/KULXk1DDWekZtld3N7eVVMAThZwmepfCvGuU9ZbdYWUKve+GoVsRMxRSOkZqm1 +DPlM4oxODJ75LXojX2rMtOuxKo59cSqZL5EwmlTRAWW0xS8KiAq4VNQcL5gIrv2sSIFQWZX6HCXm +9asAISPt29fIZXTlQTT6qp8v8I6wTPna4u88BR7AGmOghqBEsIjpAatzarx6Ds5bEM+BzA8d6dlV +s5rmstyb1fp79J9ZMon1exYNvVF2bN9vGy0MCIO/KmuLPswmU/gh4/P7uc4RCHqmARZ2g3gP8G7b +fOLGk+vUGPPJdt3OHEtvWaP3LxGkbVusQLiwJENRcaDPdS7Hy+SYcBuiOn21HVoEa7fGCrrWTD8t +tmbniWR1o3vKhhwRLruuXnqCOL1EXKV6We0/lowG7TqtLBGRAm5kAT7TTxLlJXTnG9G8gNwWeFnv +KQMD2R2fhbtkO8sbP/PC1ITN9edx15Ci+wAnVZjnZzzyGJ8b0+SV0BXkzjWBHionVBPChvqLhH1/ +j7ME+BHtIK/lV5tgV2R4Nagx4IMhWv9Mhk6Ixmp5YfU51+UBSJG4mM4MghkbowgLeZz9yjeSQ2KZ +i+ETm2s1zEgDsHHIAEept269NXBg9w0vTWZ4dcfnekanxjKURh++8zEZY/iYN1rlIp9YT7nh3vGX +d7R5J13Wg0XyHzCTQ81vo5y8PZe2TxcoaS2BfnGj9P970fqID/Oh2yStepkypTFDTMqtyig081hc +adH7J86VRD2lQKzKND+gDV3FmuYH2RMTGMyN2KHOotp/5QDbKLUPGVDjrzdrDPkACLItGNwE35dy +AsWZjpA4nniBw9EZzB99dpzMpcKv0prCWpRtxsh/GuJ3m+9E07lI2tWWuvoR9NiYExWNcDKFY5Uu +NceaHiBfMujNJI7kd1yjptek+0RnLtc/fd2OsijJ+jnZtmTGDlDtOjhhM3/PEQcHQBfzVFeBuS8w +3D0eJjEYkgOk0VhGImtkgpJvMQw1rF0MRwY9dkpddhZM1FlFOUENfVtXvOUCf4zhf+DwV3+VLmnu +oQ4JhrezKF23eDF0d2PKwRkTu8w3MwXoZ8a9MOVuW5gXypvwFXo0eqG6JO4ZmuduZSs7QLLUjBjJ +mBE/BFKLzU4nSSKpxh3XruJifim927viO8T3ocCrT+Am7aQmundpw/+BvpuxOfCwqsQROTeltIMu +5dPB1omSNB/xzs6rETTPqlrevwEZIFbbknSCLDRwzvMQoGfsiHhsWxTTBp8uwCo/OpOU1O/26uwg +jutufH/5slttjFhibgvI0a5WgFalman2PacDFsKgrEz8kWbd1O4xDkLfFyvMlqVAhcnqStiy60Re +HumgESBq0qHbpzgQy5T29C3ObreByu+hDyRYzuRTmlb8p6OU3fCyf7o8jtluyuJHIFUdIij7jjEv +QD0R3X/yJUgVh0TYPFIMFG6DrEvYFn+kwRAI6C1S8HhdjJjJOJbVq+CKYVBLPw3wcry0t59zigTj +MvNNhXTEGWBG1WWK7udrXeE+rk3ohMx80V4Ydtpn9cu/VH8Pm/eQAkPvG8RmH7eGvlVBO/KWR7df +k1sxpPf636DHmy42JMbFjl6gmqr8TNlv97hzeCAxHwHoXzLmwD6Gy7liwBek8ksKvYaXe158APZA +nUFULUavAtUIeZSGqq2BxOX50tYFfHvL/oSrfwrf3/sd4sfr4qKE3yug7zZEjTYy+n1vEtgU7hnX +rpg59BNVVua6lXJ7iybAIrnJfVVbFWUrzIKtpQ7WfDv0QAYbdH7Zt5ZufsgRA/ynL5TV+1GFYERy +NEcnpl7YqCnuNOuCZmDD4LN6B9aH/ZilWqnYsqDNm5ntBf5ByaLnz5zNKhLtTHFPOBooy9fYGGje +tdaDPCfSn8jOz6NVyTw35MSAN7REy8hkBSvTpFpzehhmyZPcnO2Fsjr9fm4AFt2VSg9M0mqo0bPE +K8TSOFRGulRYgXmJi2DBvJEuJDk81kepbOnlyGjXJRVSsM8JvT9Pg2Jx6ONTHnwqncUvEdXtGwdi +h1KPn6Fj9y0q60aZKysNFxdhkyMFJDoS9gr7C6j/5chKakHRh4kzbkjV1exzdQ2/buJkKFwwMv6W +dvEM0rJcGRLghv+1kvusuN2XrzLpSAl358JJm7R5sR7GNeUtwhRHIIWwKe9p1fvj9B/iaScIII66 +aU98hzEvZCpQHIx2NQcyeSo7LEGL6tqscVbXD0Q6lk7nEQzFG5KUvkPgLqQg+CumiT8Z00EN3q+r +JMcpck4KSfp4RSQemKQ659sJUnqHpD/jTUBiixFBdI5Rm+NKhE6YjYNJ+GH88CZmJn7EtNQZvBQ3 ++Zz0zi6Ahy7MEr6bnHwRZMLKUW7PefgjA+SsI2gp7n3wF6G38Keo0qrNm2Q90zXtr8L8Ir00dxvZ +X8zr/QLlBQAvNcnRl9/5ZablkJ2VvrddoP04YhKvJE19GluhnZ6sgy5+GeXjBtZvN25cwBHeIelt +NQfj+TvPpxYRgdGW+7A8NvjoWl68umFXEAPntdHS53qPrqnm+8vJCSlBJ1q7axqNNCumWCLGnGL0 +nnFOwHfrmO4WzAs5Q9B6jAlfe5xzu+5IbHiI1fWyftZF0TdcBDnCYI4DaI20/8WsfzUHM+MhuZTX +xz3ElA3gSonV8deJ3V8lq56B6pS9jIfryEKNn95Lip8SeSxBHFpEc4I6gpG3sfbJt31TRV6y05BV +jiCNQGe+tkTuZd5YqwaQs6Cm1PII2gx+eo51X2XcIYOHfJox7jJAPtXXVyamHm2Z4Ns5wK0u8s88 +G5g2gyl3oYYfGAJVYHYfzGGTdlDx6c7fWpk/otbDaJPXg0TakbL6XjtCX74amj4QpyCug34z+PCn +NRowdY9UmdItiU6DWiD7GqvlpKFkgdz/xv5vJpOpmVejsmsd6cKxGSIbmdDzwHjnHqOY9n9hfZLd +qvSa4eNK9UriL5uWsz88r1pBo8cexTOn+ptaOPDmngzzIlC1ssvckCM0TJWiC5pDMCxBH0HHxtcN +Wh9advLh3S2g7eruy/C3bPKFXyby13QKs/gM3J0C4gZ4SAiocN07+a5gYlqw/EWdhxouS/oBVCsA +bZtI+KCigQAJJGKwZn+9sfZ5w4Lh8fR+WX+4dK9nJMu4oYrnuatRBzCOAYWsxVBBtEOyAf4luQzA +eE/QA1jRPRJ+1iax8UunIxU31J68ndl9o0BIRdOB5fDVWmZsNM1t4XiOtZnLvwcdkQN/DVo3vGrW +biYmfoHRLpS+Mko3U5OisQpObx0ROviibS8+2SkmkG5XYLXjIv0909Uxh2kRPeJeBR1mutRJ91Gi +9JQJaOIiKDYPUDR7p1RBfXcsl3aug14oL0guYoSff7olQMs39S5sULe1qDekeBN1qjZ7Md5AIw/J +bajuVy0uqeK1vG9i9h3+YXrN5D/ttAz2GOSmRod8MU7rWURWJqG1sVbArDU8WYQOhSfRAx//eNBo +KjzxPwILyuE2qMJB4Opaa8rTFumg9bEV5HmAWNyKXQdUGll5WfPiGXTj5c0SY5xVydF00YgVwUBr +4k0MWbUw7DDHzkjcrwQUuLgqIeiThcD2YLZj8X2MS9Tw+zW5NPn1eaFwE4XP5b3JmJkk75kvNfjy +Pf9dp5zFQ48hrEybRZOAfYeAtJksRPKAN769IRD/U+ZHTpgu++ZzKo269JgQHUWSeNrIF77hMsqF +tsGgR9uj7SKIqONx32kgnQT72FZ8wSJBy5OmVQEW6XQkBXbY/g6qOW8vOGP3/nsmyMCmhuc+TKI/ +eaabCz2hUq1TheiVy2MqdA8rQEhf2Gx6P2r7t4jWPEzgu/TaRc/aR++e5bdakWzxLsiW3FCwVkF8 +3NZaT8kyEikUiS4TRFU6TuazsoE5c+rnI1FKpfR10Zs7l2LKhWW3gMhgn1RAYXmvAg2jbP9Z4W/7 +hjxfmzsjj9G/p4BR/3zljtQwIa5Vfx7jTJTaKRA+54VqN9mxcpR/yXnzl+z3qjTv41zL/Za13i7B +4X7CmXKql56MEMGNhAZ34eHQ5O1/f3xKnE1DtZ9ldJTNIU+qRm1d+hHM0dK3jC+YLwhHhbAlFy7X +3Px+v+mlnqAo1g8+kMttWsdClO+8A28H6fQ6L4tlCI6s8ZW8q5Pqai/E3OyaIp33ASjA1LGaRo/M +2WCq8TC2emqctAMvfC9+p/J3wSpcNps1/FmEpsGhCREl1+rzUpYpNXIANnwTTKWcAwa2qk0SUFjO +km3hjCFXIQ6G0FYtId+nnnyZbNhnT76jtZse1I5q6u7IPTFt4BrHVDKOuNCkmeAliLtfb50E1gwu +vmgeijVr/LF3riahlgU4cT5IgF5vQBSQuqnDuTC3pPf6chnZppIwn34kaiUwXoSXtM5jL5j3mRI8 +DOaLr1KwiJlYDJb54anFyVPH7GgAla2gPkoveCYT/FGgtSjQuhrtq5CM9MrSSh+VPSE2Y8jdtvwP +KgA3Df8VY7W0tr+e4Gph4ndJv6JSrcB7Uz7K/1UOAijB+lL2uNIUEEIyK4OGRZE9xnNAnq8T6C1t +rEY30F5tnJy8JyR5KGYz97Z++W904HQ/MNyiqfS+Rp8fJ4yYUm5oYZIKUlXGWJj1f9GQIJgAu0C3 +q9qFGgo1auMCjVsb8LBUt3sh6lRq9+KKA9ZhFaqFyjSuCppN7dsgzX9boGIiG5Yf4cQ16ImTmJ8l +6HTjtCT4seqc1uaTWgWOj/oZ3xtTXgVOVTPN0TKf0/Zk5soTAlgPwK/kyXdWLfSNZAGeQ1JdPVgH +u8YPJYaeWtM7hUXnxS1EiEggsNgG7kECTa3Zuv7gRf4PCg++Wuj/YWKOQyHp4JBy8sd2QynPwjNX +/cwvAR56f90sCwYLVmDulCUrZIsg2jLj9QcvGf2KpK9FFb9uWHDqOI+PpqIEwsLpbaGiUqWRlAib +Of2ifFHncFdfW4bJMXzaLCIPVoFTCC1NajQQxQYI0TFzoPP5fZPkLNXFDfl3TPFLWpbApUTDP8/L +/QjJKrfs2MAOks41JjTJ6Ezc/wd1FJNTTvUmy6R6+sWt6LdLA7bSuPaQOdAcHHslPPmVTTkKqW8c +O0z/+C+p+rB2hxWvyWFj6o0pKKa4hw0Xbv/n6BSGXsD+3sSjDhmvxUasaoAmY43/5AH8UrBydYsD +ZpyC6l+iGQHNOdr7iXmHas0P/Gx5DqsJXWe6dxNuUZWUqh5fAcqekZmX4JhuaEQm1ZWKIF11x8qo +beXt1z+N1pIToYYWHvN4VE226pE15NJ564g+8GIPeW1Xq0Y6BUXC4zjCvA8GIR5nVsLFJ2GrO3h9 +bUSvK3DsvQzmJrq7HzAjO/7JfsAK5SpEAxSaLk/VV0XvtkTgp/g8RnZ9SsoeOA5HueK7ymL0AR+J +wyeS93toadDST+w5JKb3ZtOr7Hlzp760JLugLaPb1t6cCHwzNungmJGuImahCtH4u2DMS7kG7lnf +Gg3Sqd3L/4feWMZlzo0JS8tGvKXW3e1cyHPPz/uzep3rXRHAaMRs2XBBUEr1lFht6Zf/f7iIViGR +SNOWnWCBe37VhbcMoMCnWiXaIWDH+lOEOQ/89d/UFkMU2fv8zpPV8t/vjiAmkhHV2+lgfylrFBQw +z2MP0cXp5Q0knMrEw/IvP/fnK3N2AkzONPltB4qP8VZ54jVXRSwgMp0EPyh7dVW3THjnzj3e4V1Y +N4i5a/oH6VDPi8V+wiY+d+Jw3Esmhs1C6CSDKz7qygLEwAsYJxeUiKLoSOD9sowCnkG1U6UiJfBE +97iN8N39JUrmseFcj6G4BYJT3OLFdjd70UrnojeiwvVfNd7ZClSt1gcl5gfRA3k/reeCOzZsGrPW +1KgK3idWR9PyK/ftSovCNTiXcanuxJMkJk3n9bfEkfahw57WJOe78RG6C1PzixTAGpgtWVLMT53k +ar3HolA1CB/aLsCB02DJ5k5h5Mnc0i0XjMI4aDGK+zWuyFWWi645+dOWMMBQ265Iz83KgKb1I67O +tSSdNx2EVf43LOD7CN035DUkCNqfhkuxssbFtV26ibkqJoHvbFC9scDyOwEkAddpCBpAba08GE2a +eVQqGoQW2uFtWsFGcYierLiuf6ecucyn3pDIsaGZMyHarcj1yRRiJgG5TWW81uiMeYzZZHz2IKRj +ZQZ3GjUOxqd3DpVJGgLp1/Zs514I8QLgkJ5Ku8Wca0u3JDlIsVfOE5UdcCXJ2Q22tsRwgYmIHuTU +rHPK0Vg/rvqhAoHb0bwMuFeTNxU6o1jMCOhz7adRs/xlov1oGgtKn1Xm3Y0CvpLAkoDeKkN0YifI +sqftDRPd58j84zz3cGFzcc5fm379wlGt9Brzh4TbFq6UEzdRLdJiIusN+w117VIay73tIOsFTz2O +XUd/ZQ+8NtjfkHtfgiSTAKzswoAnyHzueKtffaZMmNe5XEwX8kjXXYESUG04v5NqVfdYTyL0sd/f +o4csrnGV4YCWH9RbuK0OwzpkvPeH+ERyTYOWto6B2rtZsSPNMflluY+VhrlIbUgFCZY1l7g6rnjX +DKZ8e+jUtP0n6onTK85v07Yiu/UMMswoz7nDHjgLNSJ9LSq7FF5AHCbPB2MLnO0llUKgWTRoH/Mi +ElsAq7pIUC0CF4O7+AeSwmQkBw7OeA2kg37FGn43XS7qW791Jx0W3uhyJZjzhPUm2swMs0ZWJ3wT +nRrDzdKcQ679dz9RgnNz6oen81bYrVkqGmnO2pgZot7nWLEu4NVY7YTyc1nDEHm2Kz/gYSkJSQjd +7WxbDoORRWDW5UrVk+eGxhEzWJWgFh851CYosAypOhoCCrkOL8rjj9bt8DT7yqltcl33AXG1wG3a +7zzMnDAWqReeAfDsOKlwqzx4RD8EaZuFOeu5GdtCzNheKJfnFASG93MHM+skrMKOupOEVKJtQdpq +dlHb0YV+ag43oEiDNC6z7em1LAUO+E299XPFBF6bBqbX2Z1Xp0R7wsxjYYUBG4oPnTa1XrewWK0L +Mks9vvz5ma/n+d9yxcKUpSvg0FHvFjq+uds17Uy9ycVuLHdZi7mjXjNOXUrbelXktbIcGbQRg3Po +d1XAmOWC2Ym8m/RBt3k4/EzULGvYgIh0ymvUp9pjry+J9MLqg0C3GZBXGKMpdDSbaKkY7SuJJNIj +enDhLDp4VJWCBGFYeZgpjlIGbn5CzbnUyEUz1GsVgjV0BG7Q+KQLtoZ+6Cgrfx1ABOXsPwRbfTPq +DGVCDdsvInIe7c9ViUYMo3m8CHyODm0odjofinOeqQFIGVZf3sYBhvrRdeVp4DOi9PQBYCxgXcpM +q6DMNfugHi9fi6Xiv8thCPQwTVpsy8UYz7RrVdH575o8926OKJQGdvuPSRqq53gdhQKBQjXZXLuN +WQ0+6vyoy1QHWm+JyAmCNzZbM0/cl9JrcdmCkJnLtabhU/APJposux4uJfHpABNCvmjLOPyiXvvs +jFqyBzBmiOLso94nBYmAwflukD6N2+iLmsf88mHjko+6hBugGBIQWpOBOL1GLBp1BaNn6e+VXBhv +jW4gR9Rq0L9lq8G2l8Gux5p1Nzgz2JPelh4AF+WU1Z2t+/ORM0VgQ/DyUp04+XfGnk9OpqVf6afx +eJG+2NjjBPFP6R7d07eMe8smRIzcm7eNZCBkFWJS2sHzxsakEutZrYKfQb8TNA3Id/eqEbZHdsax +u7HiQIJNACS3GwiMNRxxoSoWsCvhYd2s5+IiFRDCB4INO3kIeGDUo4wB2+nb2p73edxq8/PzJA+2 +6kvShLh3a1yuvnM8mBoGIt5BINmP1/veJxwz3KS2Q87EXGcaNZo8GIJ0ik0EMstF1DQcaa2wQeqT +zJqDnBxv3Ji7i5d4UpDp0/cMbUo7aQkSXG2UE8DWZBNKoNZ/BH5edUk7o75Qs06FCTIwsQlrnld6 +EaP/9tv9WbFxIeG/pNoDNpCwTie7yxpNKhyMlB85S+C7N66g6SntqZOQ7YXmiTl13TOJcX28t3xJ +P7F3s4/CrPC/NLeSjMmMhFthdqHlSDAjRwJ840220OpUJboUpj7N+bOu3lL6r2XtnTeXgEjsWGuY +o/43TIi/ZHFlGiYj/Oqwou1+ng1Z+u/66TbjlYdx5WqbchqE5LRsWieGD6vstw88iMKbT6gA0vmF +2PHvrDHOODjXh1oWDJ1Im6/AVI86ABHiesZknIC2j1m38Lt5DcaVUQ3cfiHbKZmb1yEZutn0NkuV +ZVfoMMOCERYaTRejGInmv4XRUU123pC1kPQZERO5/Ha54RJ7NSI1ED9fHTE+ga5+6OegYTdh9RE4 +Q2RAzXbaZhqoS9RZkQx9SdTGzXs2YFApimfKS4DsJuLjov6lWTI+AA6YQqBhCODkvZieObxsvtvd +VDNLLzyp2/h/BanL16S0+wu1+DEqb1d1aMRMZdbnY3nMHbC5eOGN2l9CZhRdm+e7SgZ65+W8iO/D +47QAp9drlH03uMZx/7lmO1F3hi+b5lQr/6y2NKxuvaF4xzaxkxH0RpTCK1Qx2b7lVf6qKsmK7xyM +rJgbkvIhbpR1E2GjeF7slKOq7l3tJ2e21M0UyZ3cRYPead/5nca9EnAz/e8jH4B7N6GSI6XT0y5Q +y54tNYCuy3zLm1S4bM2uWq6Mi3pNI5m7tk7AzUbrj+yG0+e8Ry/JKOYXDjgLoBLUsmBf7xxy9HOO +pqtBLImlklzKsY1FeP0bHupqPXSK6Xl1ZgW4abdyXgbQYp13A8CNBFHYGY6CfP7oPYjs7gvCf+oL +VvGB/+Hwtmz1DwdMvXXUxj21E8t0zK31f6iOseV6UykS5rOJaf06OZyj5gqAUBBkzCrMfWH+Nttx +PC/el5fj/xem0dsYlanTcmAP4J1Py+P3+JP2wkgTRIm5rRMpJYpgEi+i8qlj7SeTNEdJ7fF9ObiK +67w9J5zMwj5vSVHYBin1/ufYn5ilqRtkK3joR3pzhxtcHpzw7QElzcPuUYnR2wTju9hPtgaBdmOX +ktX9AN93B7TkBop/e02EVpWBG7M3gdsr0mZfWJheJkWmc35cSm8Ot4qpQ51bo4DE3lK0ws/thDxi +HmE2V3Tr7B5Q5HRd3cB1krfBd4sdvVRLyaU2zXasHxl5ElErzc2epOiXw3bjbN344Sm10xJKaznF +4+phHBHc4CjgKR0kfasV1mvsc3v5VoxHyS7s+9LXXICpPgL804Ilm+a0WbymMCt7Lef1CL3EZhvA +pS4Oj3jv/rhedyRDnssnfFudCCxQ4/XItYsoYNv/bDoyQeF68+r3aVwUGpx7Qntb1NuSVD8T4V12 +1UMXX4h4mjfyYGH2hf6I2+hhQL/6C3Uhex1qmP6tSE06XGEADqvlIerrld/GDvVqkmM+SvKsvYtn +8PWKpJYOivQEwXSdYn6bhAdy5VvdlpqagqgL8YpQZgTSt3nJHaoNwecSl3m/kdU7pXHCXItVcyuw +yUdihoGwE3Zb4CU5OEsjiP6U1N5ZFSILbmfM3UurHdVgc67muUrASgxfPklWFtofWCkexEz1+lRJ +Fxt9D2vNHP4OGcxR5s5MsOTGGJxYJ1y7hDUvfpnxc794hLmYovxfb8qm09Sx8utp3cNT6hs/z+iA +ywmyAx58qPJUKJMROvJWKYOnmQ34lcOM5PqJp446PRJQHbU9+DpAymIyaD6mDbMYarJzkLINHhUM +UrGIONIl0VXR9aYSILjYUON5lHjyZzv7JddBXaWpR0l2eW8H35N3LLfYfhuaaZ411DUJKdKEFbPj +LRYRU1nBgnKmBr0IH/f0jdTmttErXOpAwifs3V0s6hmtgpkIGf7p93+aDjSnCQdhf/w5TXJTMouK +E577ABLGz2mEL/zJTHyZqe+kqbsc398v4PjJg1erWJJU6OBoDm3/FJq86iH49CwyNU/X5sy8dLRN +bxPuXPcSVW2LNdpzsXUF11/zLR+3AGmAUFX1R4mRMab4X/6Ys4bX9VibG9AVUiuXsqt4RpNC/XaV +Jag3M38J3GyjbxFQlAt32uGOJuXbRZO4VtObdxQPwslbxtlVrZEiQhi4fFh07fy/Veud8I5Zocn8 +Vp1wQgjqR/Z7RgN5itZGBzJJL4lLKUALEs46Hsg9oQ/Tlp7/qn0pHhX2VyqJuiiRztMAyGyhyPTN +wc0Xc5N6/kTI78Cy9LrrNzO97WRoWQWePcRcEd0ByryJwz24ZpDyz04MOWDF1bgl/CKc5iOXm2pP +oqaRmTSK45F934Vd0uofclX0Dr75Ed0S92ijVZhFjUOZTjkBJ/Tib58WWo1J39MEkIUpZemx0Vkv +0zPZ53yS7Ewa5QdruJJXx3sDr6DU0wss+4X6QJ2wZ6FIDXvrKxCA5KNQWPziPY2Vx+Hae4JzG9im +W160uEWyC/r/HseqxKi7k7/7QZtzVWeaGUrwnIU35ILD9N2s2neWSv/26agtOR8yqvD/BYYTJ93x +QnC/1g+p2afmlGCS69V9sN7IFaNrlaQJedzE8EacXsck7jwfkA0BJJf4/yh1PpC05zg17bU8Bapy +mfLIY4tn3rzFjdlsoen6ecUmyDZZoSZ6jYJP/HmUmnOgOlE0JNcFMMxX6Nyaev+SlrjpV4622AR8 +lloQnhhVMCML61PpuIaSru42sPZIicy7AR3k2gUsipim85JcfC+VMsVKrrOnlYuaez8xnUiUZA28 +WPEVncubBznuQAgzxzmiUqd5V/nR1SnX1cIRYaDICz/68gSX6os4h5u4brhLF0BMOtUH+6aB3okl +vy/BBtyThNltYtGgjS4Axomzuj4v3DNRGGbYocvk+18+B8E5ksmSoVCKBWOaeTxtj9yv+D963Mq2 +bMh5X4ERklXpKFz3FX/tx6kDWOW7JVcxj7fbjvBiJIPOO0iBTmZbiKPLNTKqXeO+IZVhCtPCR6im +iQF38Gs49Mnkd7yFEUSve7L19jr/qmRYC1nDNKv7t3qdvUeYUN5pJlW40C8VoGgKtca/Xomix7Ly +wSVIkxa6AsJwDc9FzZMJYeOrGE0srK6KEZv+Ab3UGcWLiWxsGd2Eu3DDwjUR8CzycuLx+JLRXAds +NdIYLfROOT3/dyRc2FsB1G+mVys2iIif1/yG+FEDJ5jKw0D3AzDfDorff4IxzMzCad1Oh/16Mh+Y +x/3LBIJ3wHSzHaeumbx1e8wfM1Bv4x8nrubw5qkwyt/Yhdmr5HqGHiGJ79SlHOc3vzbDN0DahIAu +s+Wdsk14wlwmXMV/pwIG0LMoJrlu8HNu/84Dgj6naPR62yAHdkklqrvtg+Nv843XogFbitavjUxh +Zz8LNnXuJv96XQ+MW14v+CUEHNRSVLhbpPslYwlYxWLx95YgAMIstwFPi+oHV86UyiKmX9skqdhv ++J+vT/RBz2JSLtyqtd1iMPt5vIdUTwH5udC64R5ua1scLK8blxbNV16jmikzzxmgd058brTlIu/7 +owJeZy0x0JgYOvNC6niF0SgVHz2pUbVQywLmgKEs9Y1RKExc/tFdk82Bnty3ithfhYfDLMnaCUK8 +9HpZo84IHtrK23xXvNksgvW2ruRcThRR/G1a/6JT+O9IQ7FmJaFfbcn8PAmMUZ0qifS3tngbRqMQ +aWa7W/BM0ST7uyoC6cuDZge81kMW29p37BiFb6MXotJTjrvX16yyGnMlWt6sOAK8E7eHp4Ix8dtW +T44gaUearIsRNxprXjRIUZ0OiGcOr8UjGOO0/slkcODkLlC6dI8aYpyRBSvf/eJsxLNQBRF8S1XI +/b324HZllV7sJJ871r+Xjmzj+yaP/UlFc0lqZio6lsCmx//gIcItNKG2HUA2zGVy3wB+bA6f5lSR +SVeUswAI5GvJNGXtzOu2bo/T+bLMq2vc+TdApnCXy50btckfRfBMapwbgXFXLTDAdcgV4/wZL8kv +oPBUUa/o438p+4bIGbNNRaCVpHJ5GshN1Ag0I1+wYTw59VGhia/wb9ac+pDVLXauCejR+FHNfoP1 +xt6H+q6rlOui7hPsFTKGRj3KJ7iTDVq1ugk0Dx24XmSPqvaXCbyyb9a007i2YSqLWxMuH2fvT+jF +4GzLmHY/NeSY5WLPQ3ifaTZ871Ky7JQ76P5wKSzm9p6x4SpMjSnpXoQ1Br2+7V9ooaTI3mEAisY2 +MVy4zgy4NWCV1xZdBuw9DR20N9v08V1FDQNqZx746n6gYCaj/i9PipiRO1quGfsF/2Pnz6RdT6Kq +p5SKuXM8b3sQBTBGR2SwQt6oNneZtgW27IaLTSwgPRgHpWf/h4D0e7qomCt4Fo6iqAvRIcpFEUK8 +HQaMwvLB/XTY50wlYzENKrqM5acEO9h3QRtOuQw35xLA57APPjqIuW6v2erL4oE7RU3xDwUcIRkF +pXhjoLwa2J4hg6pJNXL6T3MwCuiT3XqTqS0i9VNwKEWtlUEczAkiL2cTMKehWYjH43oOPn5mQpG4 +NJPSAg3VIsilTasxgikwTZYNVs8MhhrRcyx4id+v6vr0DBhw9d+BF3DB7W6aLyf1YHf8bR1n+qTO +ax/ER6EFXj2RToLZjFAma3fTKjCHLyL3HhhyinRFOJaEf9BZZVgjP+Nxu01rY6lKmFZ9D+4JAB++ +rAtJYJimBCpKfYnyB2vZqPkx1FdWW1FmOlkY4zUf/eoRMzkhL1BU7sRJMp51U9JtkZu/La6BRL+E +XgkV7NMm/Iiy8e/rqs/aZ5m63Yfhzbhhp/1VmVQ0cjQ6L0eLxJQlM9Mf7RKrbvTEprUDrm9kw2yd +9ZBIGfC3oWV1iFSp4NKIVcpCt2AHxcw/X9psli8nwz/NGXTNbFb/sSpZQqmHIwfC+oPAZrAlg3Yg +zg6H+N5i5lOnZPAYehxbDvfhIuqRbKjpqDYKN2HQVmHDL0WT3K0Kxo0DsM7wkTQg/3u5KzuFr9Z8 +0rJBWWTYct1Hng3wWT1nVlrtkHqDFmRGF5E+J7UpxHNd1vSX97lXuxNxZwo7Xkee4zOi8Vm+nZQZ +6f/7OipSsazePzIx1HavWFrvPNKAftGB2QeaVIb0uXPxzeZI8aWWR5fffLkU2KpJuufOstShh4Wh +hHyr7Q4zX7kQBXYm2QCeSj8PFtnAybh7buxuJvmIzFoccL/hNVVah6eIhaQvDm0kBPWkq+Xq6gWQ +gzsv0cyXKgOXgznrBrNYZ7WQwmw9zrFHUpIWCotG9Jcav8EXAU3p+GBXDlrxNAHtk4ZTOrolbVma +Ve9iP5SzIWtzPtdzfhA6mZzxclF+wqUNYfhDedjFae5YYkpG0ZQcLOC7a6MzGTydktW//+5+pnXZ +IQb9i6unp+DJt/IhnIunIXKlpFaBgdnZbMkMlwjpmjSwqw+DtiqgCXNsRHYcWhEd3UEPewIVkd/+ +uDd3kmWrZB8SqVRImjZ4FjyTulbxfQdcZRo6tpfnUZub8X8qQB4GE4W5E6Fkcdc2B3G4sv2nh+ON +0wrS6w3BNl4v3tZd08bz3g0uw+76Tycut/weYi3ow6uJaINbZDNT/G5bC2l07FN5p4I3zhLnagyF +E1nnsa99cXBNCF/qJ9joKw9UCmWbtbFQRxASqOopUD4nBMO1HaG92GXmKg2ZVciGZ1NT6jQW8J1i +ZEqm5FmuY3X7jWGLntcudauEmc/xpu9GZhvdMqKW4By64xzEFuncir9A/dnsiHd16XgfXC5H61Fn +QiAh6Kz0F+9TOeV2CLEXGDLbcPqYToB4TdY7DvfHgBhEk3SI37C4dgKNW0L7nKb9gBWhR1rgabcY +pccVwDBbIBrFRAsw1DA4UNZPIvyXRJDofEzfSLHBVpVM7SbrsfY1191VTIqLgnHCujpF7q81dDNK +h8PPq5zPw4JxhB1Yx+/xV4Bn2ZFi1cWdZ/ZOcQiY2n8QpP/F4Vi8cQ2cQMnpo7svA9E0uVOgYew0 +NZDa9zvduee+pKMKVFOQqHocx8w9XXCHTb6b/3Oyh2IyGRgV8hLc58gT3KvxPKZhOscbeQ6KzcrV +DY7pGhTeSYN5mEXe9qXTmGeHYLjQI/dI9FfvK9XmBlrEool/ORDsvmIP0KApE0i4KuweNSVo7y1W +2USIyVtujNow3auxRIeaNQybqKqDgxuXudDzqH2+qaAV+kpO5W0E+dsk0RLSlxYzOG1EXgPPtdIF +5rWeTASPswlCytPwphXNJqrzTy1gjh/JgvVlvw91oQY0i0J96J+kvf5UQawYnktvefOnAoEsqRt4 +iKU53mqDTHFZzMO6ffA9dIFQdNGUGLxGTavoXn5RP4XQj9HKOANxu1MnFqvKKCZSvYhpliUGl1Y8 +YDEI0cu5q4FavkRyJuZiRgQrCkZr17gvNy8HeeWNWaaU1kJwUQQJSDdcl8pIU5NUPZwwQj4elXnc +G18yfALWsGuPqxDQjzaPRnj1s0E8ZtET2eF3PVc8m4nGiJLvTzC5xe5SSU+/BxfEGVFr/sYNJGuM +NgLywUExu/Mp6lHtpNHRfae5IvuBRQhgdbXTUlznlMNSmhyFiARtg91dfqhQ322u6ppSPoWK9CL4 +0kOX281K3vpq544d6N19oZ04zCiOkWw1Nlrprt+VBpUy1f6KeUaTXPVUH5MufJ1lhHfic5i1Areh +Xg468r85SnKfoxTKKJlbaCjrWfHISIOkmTZtEH+JnaF/jSGVig62bce/53SHN7H6dpD9NVmTYNeH +ilI71xNZYmF8kiC2+0Ajlj/87tmCMJwfW8mUwTwsJgcUqRQ9VgbVRCZeeUbHC+dRcwotQHg7jNZY +XuDhJaK2BnNGLuY2hQxlwAxT6W/Xv2im+tb9mcGke3Pi4LnUrm9nmXHoUb9aPKVWoXpdSYHhEZ/w ++r3SDmMAp64w1t5YrYTkciIHfCRUyoaUOSvzVDzVDkPFJ4UD15DO82hemQzizpPU4T836VV8ritL +VXaHQJlVABrdeVSmnZdJnHbgr4VmfJQQYXX2jOvsLegNSf+dV4FA51C5MzlaIJWHMEXK3Exzrh7d +KCQt1ho8DEYU8VLwbBJHT+YmpWc3AQpoyKyyyoW3sFMYIGFaVQSCgnGPKupm04CPrCOqlSaaGPQt +oAIBwkLujSqrVPUmN8uuJ3IwjGImeEppL1eM/VWjREsHEhA5JgP3ksHtFKMsZbb2BXcOYDftcr3w +WO7ZnYGrmVa5a4bGxQRUKISPtPh+wYqL7hxaVNlIE8myNyOdSk5iFFiv43Gi6q5PX1u9Evh41hXK +/D5+liM5AM7XGnGb8FywReDiJgFIN7ZulWKWEUwpmP+cnBb6NOZGkl6zYcKlquQs1L79A4JXMX3U +bvgZgyEBaSfMIrJcIHK6wJ3xTGFzqdECMBuUKDbl6qKqz2+urxGBBxD9iBeAFyGZFn9a+i6vuh5Q +fmX8QffJn2erETcT2sWXWJT/285IDVznS86cUjMyJB9hq5j7ZbugX9ysZ+aJtvvEnYuZHpTxoh4U +nhP9N08NpDzfpluUYpr59B8IUbv5fa4zUWvjbP1f8W/8kmi5lXk/WAf5Fu/KXIkWBpFbhag054Cw +DJYp2o+Zjlr7i6bB0IZ97ZSPRUqMuFA/ciJ7KCeYs9OtKqDXmAImSgzbZm3U/cMuGFSvDj6pXFY0 +J+lulXr2iIPC/XhOUS90bL/ssuZBxpt025Bus+cZtub13/wvaKyW4/klv5JlNZTdDK0R9KIq3GIu +5udug8L6c8ynUMGCWdB2y10+RCP6wQ9FCxNfLAGcyh/in5ErJ51dbOHxW/OCuwxfE9KLHqvug+0M +WKEFb0/J26ooPggv0tYBK4ICrFTGnGbNNO6s+mHolqS4uDYFGYeZ46N/PMDxcKznYnFMfVSmkGAu +Ww7nvbMv6j69FfcDeeXKjEkrzLvjd8/JvurEjij06LhdAPh1JNwVaWwKDHwTTG1Mgu/05rDSQL2z +2DYKxqb2PQNKdZhYotPR60ZqTz2KeOs/Pbt4FEmEnkSJ3o8YoAi0jpXW+sW/oKGThEa1S/mSut4t +BxNTd6MS9aJp1X/67jyHzYFlfOmCJVMs3zIem7fewzojNw1eHVcZuv9uUb2t4LVSBY3hZqXsZEnd ++XQzpUVD49m7uLNp0tgbPoR9taCnFTHTwwonvkYHVrQxkZuedrU9TAf6ln02f+uft7+radiXVMsw +7iBTGe6XAf+C2uAaWV6TmTSjEw4RaivftbEyUc2ruWihRgEPLic2Lxzk8jMoT0+ijdcFPNyefgKS +23y9Km/A5mA7hYV4grtYSodfnBYmYaoYZfBw+4ex8Hc1OXbrYOLwzSpLyEKC/B4N98Iba2O7Re3z +jIthlIz7ekh9Km1yRkv1Fco8IramvE7XpnHCITLhvCbYVLfq35YONsPwNUxpH2oxw4K2p9lXNxCm +4Ny30Ufp7AJ4ZgaS/reBanJIfyxET4cUij3dF9qdKqhbFH7pY2n24DP+syKaXsVaIaCyZxyYHEJQ +vFu1ksirM9GKDAtj0tgXvgR5zBV2b3cGBsNjA0T5H+gk/8dh54dyVyYbdSYg0bSg6iyKfLzK9HC7 +APAWUOREJZGT3sh7J9HGC+hUXh1VSTfA7kOvjIFVbtGILRjBO8kIjP7kGKkD/f2HqqTF3cvDd96L +HItb1fdKCBEg9pumfrT4CmWPjI6OZ/iKq3kcze7RSFsdHSGUeEZeWRfMgD/Cipeyk+NZSHEDtS4O +XFDLdt0jdghWNRZyl23NEkYyFyxyZKUjMeAY+FvNTJo4azEefrtr8O4WojSrjVXQGZSB/00HjWFA +QyDdSdTPnCBOdzoNp3tNXtTAE5x6zfF1Zy/Y8wfFd4JW1YX2G+pcmHP8o8nAsTun2PnSeRw6SqhJ +MveyjxdXri2Damxs3UM/S4nakdj11pnsP+Hybtg/rFQYQy1Xkmi1sJdvTNcCLgfpdOwRGDA2DXOP +NZYizOPwvu5qxMSdBEqOQJVDKnKpTkZ0K/AFuZ+RhOFDi5HVIGNY42JdAwgP2Q9554J3BCx7tghj +ysrcA8wp/aVxyB8WsMlFvVV4K8gkUodfOgV8+TbO5on5UHe1WJ2AE1K306GrRr57brN/xf+2xRU6 +M0gD2p3N9DniOpVspHtJM0r1PY1y7tyMG+z29Fs7gd374lFRwn69dQoFZv77UTEeOnyww91S29us +oCVQG7HR2Tyu+Iq+uZMuim0Q/EJByHgrhEF+lLuyTh3MxSf9I6rmLSz/s6kwYvTcbiXY6bq5OEft +hW0h/pqtWvZ/sEAg3S/+2xCuvQIvZ0bbLi9lWdaif3aAyGybFXtbIdlM5Dv7dZaUnGTQO0M6Y0yc +XRZcagM+ujlIm6dPiWodWOzvWLRTp4Xx25Cn/zPat5Gjgh4g+oxulaVrpGPs9sZMpH9IoNwogF8G +MC2aphnGyKH6bk07KQJKosrpqDssE7hiK9OsTSA4qPxqwiT4/ds3HAivMyNpXcuirrZ66IsiTIj+ +Rum4UTlQj4Jw6Bib1XlUan9F3Tb+y6HbyXLzBlL9LAsj1ZITyYS0lRh1tSMOGQ13oB1oH1ATV68x +vmEkEtQgKwudz6SImk1wcacuJXHvLFCg5XILqwlea6ChCk/5rpa8KeCAsxDQlhnZm2khIcVdnVfe +aQNTDyuzkwKOCZnfApbVGqn4TZ4Vt3E1OGvI97/DE09YiPC467RbQTcKK2wmED0IkXiirh+Ij4Z8 ++y4EEEn09rwqfITPv8OJsT1AnvZK54S0Ms8Slvg3XLxqHfcVMfMlOTU9ak9dmNVtFrBeIJoXbfhE +5nt7nbckdfWx49Cxusc940m2iOXUU9yZXVaQX2ONt5cWZ7ffwj5xSEQ3CKuAipHKMKYrSjLNl7jD +hVMdZu6xsCTPzkd+UHfwnSk72eRITbGPpLCG7bgym6zscolyBSF/lQVFvz2VRLjiXbYYyp08kO4p +QaozRI7LKeg5d/u+Ea4lPgXe2d75WQQtuIpMZpYnWfPcUdvFFlEnD8aTI6YMII0iLsdTlX+ZZTzj +qqgV51CH31dBR8vfGCZEk67mtcO2sCApuxbgC/OlUmUFvjH/77KU+4c2M0fvvwaEy8UODqPVy3ye +Jgyc4JOejcWWUIZcMdSZUmW2XxVl8fbQgrFlmBNNb7I2FOtvrkYIdIgUCjMaEpphbP5BkwExbJzm +YhFX1jn6z699Q2zgR6MhskeSp9sok84du4G/Rveklw9rmDvD57QDnhhuyUea7hs4+2iGD+BJldi7 +uGFMvhZVUerXPhElilrWV19HBmD2wXQPKy3NKHvIdd5ovoNn089r+c5/JeZ0ZwYD3/+qQNUZZcHR +Tcww/7MBwpy68h34JsVohf9bXJ+zPX1Erzf8+Nwl5Q13TTlLz76DA21b40ehzTEvl4Rlb4aYszO2 +VlKFO5civAPs7yOC4DvLp0KF9XC8zQTNbDdUkhU5Bs/423kvh5tQ0/v9igsWzgLVgx+5cDbvm39t ++mVD+PVO4RTptPtejFcPa0m5CKNCf4RAUmJFfiuxWj0HStlwR3MKlwy+Q51Cdr/uBam4LfzjUlVp +pMH2QGz0evbOupYuDIudzqusIwcAaX3MmBfYHnhbBb3cbYAqkjsJ3vROBqXVTVuwj33/fhWsnta0 +oVaIOKSRrbmQQtaUpK4ruADA39/zEbNh2Q/d9aruubkRfXgrk1CARhKCutcBk+qGztJPSvqSPrQb +xq/t84ONN54G+C5mLqmoXCKdtn1uxJ7ZfV9WhotbwQzuAxvKnc89LcE5CIZJilPtRqDnGcNxZvOV +/ciMY1sk+BTIU+PvnRjAHIJjQDe0BEmVNhvvSIcl7GWsfH6sKLZIG5G0NNcMITX2XkN02oNKSYwH +071pFFm+lWCGgNlhwelOGSlIVWvbgmDUG8LtXJ0/jxQJOa/Ksx/KUVzNy6UZtniXp2knwNTGGo9f +qJpE4hmyDlusM3OKGRQ5T1MlbxV60v7vWBOj8tm9wJzlMjP7bYGbKnhgVZOOxMMTfU26gZW3iX1k +3FdhiD2xLvhFu7Qrv6zg/222Batc95UiU/Wln1bpi1QkBJipptkMT03Slf9eK0KSBh8bvBAt82An +Kc+NmkVXdt37BkJERGqUyalSvq/S9B++DIF1VmbP6mXHCayYd0ouSJSveYoh5alwz1AwiXo1SfuT +rMWsEr2jezTUl7PqfYYMnrGOrFdDgaUb6uMcl/3iG3QR7Xn/yMfwhAcUxUP/pkkKNA3guWf3ZcCm +vJQICH2wF/0Lm7yc/+j3cC8lWk80w3LljOZRhaQGH3m2GvMT1NSuDvz/fLeJIOE1F9AkxPFYyu8c +7s7lKqhof+UlyBHUYwVWbvggSikULb4kzKoXfe8W4ii+IZqJdBy/cEP12a7lGjvjVGDOniSSnt0b ++zmMcADLHQniXshC/wFYUOIpW02F1d+xzkuuzCWJm6E8OzbnDuQ1D3PNqQnvrA0zJgrDEj40UHGR +C6u2cY7Wf4CXLPyOKrO/ucY0I/kFNfRYWPGYE9ZeHbXM4uuRTq6rhJ1mqdrJWngxachTomq60qpu +UQ9vaQq+DmSjhn0zgkxG63HkTpNQeN1mCCndpz75NvIDiDBb9SWT1eDyiwh7HvERVLSS+2ZMi4r1 +eMpzqZ91aAZLodD95HJBISCHmPQtnC0hsZ4LriKZIv4UeNObw1qG0rgrNaogQ02ngZuKza5Nt3F8 +WlgF2DioLiYRT478Clye8aVME0F85BXr7FnaC8K72b9yrlbCAB9b7zr6nZ8B7RytQb5gAH/xIHoO +wURi3uyvHH9EKb9Ov4DScVfIizpzNOn3utSQtsbzZkkwxG/qEApjEVh4wPZfbhRP9+J7paedUQRB +2bjaBwPlyk2runY79hSUJEz0PUWzKcncA+oVwn55540qt2RMVgetKop/R8B4ppMYP6gs6oXIV2vZ +jsZk8+DInjj289i+Nu6+HKdr7Y7Bd3vGXSJBVxqQbq0k23G84zdct6MtADr334i/cipbbazjRcKC +bInncXI9UD+KtgPxLHgGYPwWAbJ6Pc73XiTKQ5f2vh2lCXs4yGWWEsGosimSEVBsvjeAq6X9zNNQ +JoG33IVXxvNBGeGtB6DLtN9XIC86tLJKqAJymv+x2rdtVBlO5kOuAQ5NXk4hrdtiliB7uFA2ni4h +kUG4iX/n9vih2zTy5yWC1hs9H9NtOfL7b/7eUGjZbo/5M7/f5UGaVfe+NZQkv3hJ5oO3fRnLkBFn +9CB7zVf9yD2QZDsjJRd5gnnNdYmYXMmq5D7bs0KNnq0EC9/AXNbuU5wALzqZ6CBishT2+CVBpIny +9JiN/MuTcL2MS6+Er4HuHRM0cCco8aHwPbppFhTQY9v10KMPiqqbS6d4K9IVvgtmlEnKQ4j58WDY +X82BF00Tezlh+uNEh+Huw3kbG0fJ7cSYnG1O8VHsQ9oiTqRBTqEAQ+gCkhB9w/lZF+muSoUIcl1w +1syeGb5p6Aso9TRUcxaoc1LiTB3Zcn6OzmpQT144O3b7G1vmf0dqJHu+okSvb85HARDnZH+QOSqB +W/A34NXqD1QZVBCMaBybl2CuZ/Cf73n2WLC+K6U9oMqZi0Cx+rLZ4QIH2dkyJ2BobaefrmoG9pPP +vc2hmv7kZUk3VWH1iYQ2dZvEtc6Oj7qCMO6NGyw0614jxBNfB5R8PniLc5HupfoFUIe8ZPfaX4sX +bLnXqDeXEpK3dYR/fMmS/QSNh3fvVmjTWdK6E3+0VRWFRKILNcQt1K+D1UmFV2CdN9l6e3v2uJ1+ +j5NKDuZayk2bcoN45VTPZWZQ2eXmA5GaX7LsuCl7rvXEkGz6S8dqwcy5SVif7Qt2HWKzCMUGMtQM +Q6dznAFLJpKKnFLYu6Um284EtDGG14yqTt3/Efq5++0slbb5OArDtuqkEIhoxhvimImaqBzgHKyW +0mKqKW4Fir4aydesCCpj4rNgWWBrQhNlIKIImJtzf8Pp6f6vXB0IMUCKqZbItr4mJLNDqagHT6ha +R+Ecf0r6JFn9zVYIQj29tVWpZmeX5dZE3zR6uCo1QZ5HS6y/7a3XvyId5WjGjtc2fAzDY5vf4bOX +O4U67iG3rCPshERVQeyUO7D+6H5NeIEAzD6ctd2AMJN9d8iFNz+bxuD0HNWb9NR8CDRJG7OZWmbk +vJ2wS1be8OWfhbRXHDJeBZK+LjWaqfHe1tOXxM2DV0FajOoDwilH/uMZ6ffUqzssKBg7skr7yFW5 +qAGyw8y0AiiKrBWiUeT8+01GtGk0kh6DfWvuMkB64H1ulGTUZnrFHRQMCMiljSP8ypEhhpkGZf8B +zVl3GQ+N7MVWPv+0MGlIJ68CLQS4MbwJXkpcP9OxZCwLrsA2jAZKzK+stQO6USIEskfSVhh/jzV1 +jF/crWatAPK66A91qAsIkUScWutfy74LdaEOA5SH+/W4bOB1s6iEtDMEESGReiRat9vKnef2Kzug +SHttnAdaF4yfOE9AVUDMqQtomtaSpSM+7kUa9hPgcVkTA/9YlP2Nor55U1OQJP2H2HxK1kBCAf1U +mWBr8/t+QbjMchWc2SIkQyaYH2Jx4llDUirFdFN+uH7EW+L12DmCVZB52E8b/EbMTXju/vp30+qA +aiL61WLrcb9QbNXJ1t0BPz8Orii3VLErsEwftxmm1pX7hdMoborRvswY9/smNTGeiaA7oxzWWri7 +xfPoyeQFeSURVEUIJ7T/k4iDODcmV1XQtrd4LN9FE5h2GddMp9a0+3sRSbGOY0hZVTH/n08Xk0cJ +SOx0+lRX8PuzfUpjFYv0C8a7LYOZtPZEFV/424W0T2S231VcY4K8oJe74V6A8BEJm1Lzv8757yVP +1hCxSXbmcynk3dliYdyycm3gp6ErviDKMS4+JIx4GjEd8sKVqkqQTNgt8hvAfHaz3aLl1/Yp9sH/ +cx38TgdOTBMIYlLUpm3t2C6TYlXvIVlJdvAm17yFagA9VaT/0XptujaIc4oed/jjk5SMkydsTueF +6m5Kv7R3oriBNdKn+KgE5Uewq+MY6NKWJYGQOuoaAWVhajOFyADqnOwGYDiv5y3/r2arLwjOm+kJ +CMZ1nM4bsgJ0zgbTxQhrhB6tdqlLfWoOoMWfOEWYqIRLwIgjdJ4xAXfxRk25UXFo6QoqnyF9c1na +9TP4YZqh5xW/rCCWxsJ/b9PCxnX+AVGd3Ho2Yaw0W8cMKCb/wZhM0nhPg/yuQKc9lQEkZqjKQOz+ +/GudoyFlb0M/lsQoMYgSIpMQcKTMP1KzQRwjwCRGM9TsLSrW87NRlsuxFXut5DPrIp1fuSYhBirH +ZzoVNtzgz9JzZI4PerNJAKKTGi5JZen2I3UcFUjI4px7SpjYkmV2pLCaPMeFLkc6ZTx+RaDPyINb +bNjsG1+wGO4Be7pxqg9yetbAlvscgeCui120MLKksIR/g+P/vVAa0JNqFmxfaICvQqIuAAhpgqD1 +7Fu/qAhUYlT5V3lzftlsexitFF8W6xFO0LjWiCpQCB82m4l4QyV15AjkAX+TwXyeIQ+xBwzNyzIl +bnYk75GzaiqBorLamIinMJYTbSZVUi0hOIOqauGKaAZwwttRR78pIjDmHmUhmZDRVaSh6IbC6J/8 +VGdUn6e8YjEmErE2Zx2xL/+9wP6DfPdCpol730HWBSn/Leejk3WA1OlBEZ8rRcsLVH1OdfSx7JgA +yDVPgUqL2ccnNSpdadVVuG35LXsF58kKuFrr9HejzPBn5oqRga0yhk67/Dnon4djIje3F/yqz9Kv +Rlhic+j2jpWKKc0RK4GGiOBQgdhMsjhv6+Hzybr+fsfLAPJ2DVeqEWeHxQZjOefomL5U3kL4n15u +Hzbxgq0DZIPfbllO+mMDqcwL9Z9Qezq4Cu8/xqd/ZBECA+cp1dgp8NUiwF++BjRe2UDQDHP4HcZp +ddQsi8wjV833AXk+vh+i9/YqK8Z0cP+43bNNVD7G/aIIqEKnIew5PJhmDPoVQSYzMWdZOtY1u0aC +WVut2pjuuVV53+3XWBiZkIpBDVzxirixww7fUS7bCoE9l+REiw/YLET/KAp2Ddum9yq9djC9U6VF +FFNNr4YKYBdM1qoGuXG43lSWzakJtg1grDBWImSsVdoixumtnDtbplIznWbYeBkhZTzqYykYs7MX +THsJVwYyGHzRuEKeZ/7H7Et3DQht12Lp7BdIVLd/K5MZ0waDsq4HPH4qh8KPzqS2FOHOSK92UGGm +oxRXG5vZa3ICUJJ9y8F2RMkJB5+qU40Gz5OiX7eNh6nWmzS8UsNHhYCtT7j8yWo+0VyG53lMTOKK +K5iTS6QH4e6w3ge0HMB0CFaI2QN+1iKkbnBr3xaV9q8c6rFL7t1cZTK7u+6+dhUlQlE2HeJyeW1j +cXREFoqj535Xq2yDcjnY9VAFtbkcIQn0HPcuSZuPNr1kJNQKXIf0OiK6tda9N8i4CZ0saC3OdnlZ +mnDfcy7yB5SrYISiRyShLLZ3BlwhwrBR3wzKyY/iagM3EqxjRLT4rz1vfmgeJIXta3h88ATR+rfy +W29SWq6VTmf41PWiVK9TU5csZboYXQkBBm0ISwV4s9JrYX/op8whojYnfx9loM+83toGgg3t2xqK +gX4V/8DN3bUMsreoskTrzTmqpb/+ckoXiybM4NwS5MdpdWCWYG5eTurZf3/LXWPWWc9WIa7bmUGY +PEc7QR9Su5tlRqr3CZeOVknWpH++bcjg3lFfYk9dvXrwYBvr2vo+lhxvSDU2s7pVQR2jlAz/vOai +9q0a3K64wOkoVCw8R6OYZhFJzTSlh6K2WYGRnmx/IV2tLavtNM/zFAiCGHAXLIQswknN6faM27Eb +eaNL/VUQRluj9sLUASAs5ERL9BoERqkRSvJfnv9CzcRPh91xnBtbLl/InIeTZy5XZyuqS7ILxbdd +T58r6gxoJY9BhAsLvAUiRcc2GxunC+rbpj0KNy/fkjtcPlJ1CcfuEj69jpZlOqBYbhBGo7awyJiH +qsLcchPwc2BN939AlWqf+ZdSfHceA8IjZruNtAW0UIEDh0lfb3qpAGirG9cg7VpYlazwGTv0g9kx +yA11+gClwtgvgLSmlP6rURUHqWorWvAU2/7+5a1tyuz3CI1vAkcaoo2N05vlglynss2uJxOLzsQb +GyMvHlD1ICgZtCxGr3El6YZqpHzuaLNhielsLF/rZQnjdybagIDDEKzRuJQ0Av/+VJT6yGNO5Xfi +pSdqdAeMnvCzK/aVE2RN1Lq35oTtwLZYhjUtzkFw57K3jVsaGnHMVir9jcrdE60JWP6deGZDrTqb +C0zxAWacWQLW2y/Exg5zpMgJYUWjlV+NVij2GJ5yx7WylxRyIbJv7P837bCdrePN18KIGr0S6sxP +IfAUNSCbtSgfNk/pWRS2sX39QkSiRkEvxy44jYapOCiS7Ge9agonsGYGwS8d85GvK3rxZ/gI6bDE +hdL6BaZpt0pYm7Rka9I4pe3ocU1QN2jJtW7+dGmxP9t3vRGwRFeISmrKG2cNkCnEPiP8jDLFKHhe +e6cTum1hX0sr/FNmmhtQHF8Dav0XqbVwU80C4gWQBVLglBt7YoKW3IAzosGC/CqYl9VQ0vzBaLNR +OdqrbW1cAS2qQ+KcUf0xj8YMn4KU0wM4YUwtlINibWRSSdQbSa2rbua4f33sObtpW3vXVJWfp5E9 +OV0zeNOFRie5SYcMRsVenhn0knnMpD4C7dlGsH903ubNt1PLrG4LUBl1fc9nUrP9JK5lo0EQWk8F +lk3AxraCWA7OmBpBzClobbdmvHtzcTQcU7LCGZD2OfPKTEEzHTUEkxQl31/w008gAgAn5LvuxLkI +F6bNMAuqVmKb/Q3w5ZzKxadGN5ybSMb25nhg1ctG8R4xb7NCJfTe0CXozwjXEpMZVQt3m/QYbWxf +J2MnO4D/vJpQgZYnTDhY+J1fo9KW9xbV23HKTAyYUoH6jEdi924rgKVOHOQ3Hv49POCAuleLRMOD +ORme+WWWD9XiL+0NRLdUBSVNlncGwpLIUwQS4EFbBgfBE8qfA+6SCGYtfGDR/0o9FJhCo3KtxJTG +rNohoHwVzKIkybmVPYowwTityGCKQ9GVFf9MPFau9FdbY/KAyV2vTlzKAyuMmVsvNALIsgE/hOrt +DS2CT/1g4zP1RR2HnbWIdSTKetx1Ro3sh+wnX3iyM9rmJUE6WKAlmGAWTvB7IJTKf+Q4rTDCjwZv +GbUrQEOEWCFQ/0gCOM3LlEe/nBC7BevoqjWOt4mTUn/f7SJpwrgdlehy7moTXWy4hmpC86lV4ZMF +wVW4R5zaQpe5wMdaC3v+XAyqCq/DegpH0z2nNgGxQSI/QIOJglAIPOI33cbtOg8ZT7vYOoGPGOsG +FKZE1lZZqDhlolVA1BymDfJXnmWxJomYT6zsr8jGagSQpWUIs6W6JPEf7Y6pPz1C90FrEhNHgvqr +D9qLyi9HzFBQQX8VMiKlkK7iLysOI8hsIwWIJHcb7jb/RKssr7cOurMQWRufzSygePlPrJh3Ks61 +q3Gu/mK00p0RXLoQmcgxXsDQGmCxkYV1qsWUWbubVHRkfXYaqHrQFJvK++VrZwNyuxWE88E2+DJ1 +Y8toSiM4u5jxkV37cozKsD1Y6sDFhKfXErMs+iokhikOToj36nNuB+T8Zn++J7yCjehTbWTMCMbp +txE7/5iVjv1SZglsdo8QMrRWwOWhpvAgL0QbJHWlCe9ZBRv69VDZVheM2i62Yz0VSy7/cDpdPvKR +TR+TAwQzpVRIwc6UbZrvYWnyGsSgPFt42h8SLIiXmzH4xFWWu71jzBmW/g2VmeachO8CxgLzEE/W +ozbr8dmvRctHfCe0HC0sq7m3hJhjkhQR9h/tzydiFl4ODe124IAb9VZljABKsDSL8QlzWBKgQ7/m +PFvzdMSSwlwMGv2jcASEiF0HD9bHEy9dpadSN4owSv0ixqxD3TVr2Vj+dR1jGZrmNzu0c7arywym +8Ui+KSvqRQFdCMdWiwktJYyjC+HmJdYNf9vNenRxe5HJ4tJvQ+8g2T3H5oshygvkbRDsp3NAw0Ip +0HGmob0DAnGXmJMFzYSHJvtrEYkvANVPYR2juu0Ma5EHSQ1hSujMHUjv3wR9/En37QbF/cSIaInP +I2f4VGtAbRUGmMi145nupeHY4MXPM4gBmPUcfFgExfYoaPEuAltlZS0rtj5fB5+ifIqrNrAaWKTp +46BINaB1oNxR5aleqsR2Ce8sacAYdGwr5ioZWhiuqp2Sk6eQ55qGS+HKDRPtDjG11aO6kjQM2Bv4 +aClX0SLmfoiiFdrNfiltJUwiHSbvmQ2vdAdmvUUo+CtjwzA3mTAkn2xZ8WOmpVaD9bvumJjQYymg +F0EB5DjrLLnsUXzSb5kkGZ1cxsX94qElZElBuy5QFKbnvC5XSiT/zHFeu90rEfONxJmyTInlbTXL +52P5dDVsWwyIi+aeaMtvGnX1aKIbozcQoU0SAZ42W6AiaqfHb7F5Jd8wt6hVYkCGlFFBkLq4xwvg +10gY00XVdOK34uMvwXjIn7CogtzRV0YHVIz9bvNlxtBYopc0fKc9bLSG6RLrOD2y/9+XNgHmY3W9 +SX5yh+ZXfau+HIQGHL56Q2YXulk1nl4fvbpNsQ1aNcNDEcftjljdGPjacbwk16+5V7cqhWBCcfzK +HY+fZybDdRHVIfLl3rpuhB+3F8Wha+wjcQhvAmfajy76//3WRiaMe2BeWKVjuIvGNv1ATV+NGBjo +yjsodI9oWMjOSZmuYJrsOttXk0GGQ4VdOWtcJKIt/hg/MpvZ2KQ4Qz1ZrhqXi3Jcuwb4IRnxUoa5 +46c39hldmOCXwYxwFjivVrK0Q1NdYKgHcrIXWdy1Pdu+mHG7v78ple2Sm6Our1hsxDbFML/pX2GB +V0PTagUGs7fViBCuD1dtxRK2oRixQxlhF7v9Cp13wwi25sr22knu0kY2NtNTc4fmV4tuDsnfO4tT +OtiT7zwErfobHXQ/pTunh0vYVG5a9qbvUxeW4dwm1dYrkEoQMUxD/Fy0CbAyNb/Q6MDHNgMPI+HB +zIBav//MOKZPYgSoW2guJC6/0Aj2gQcUD2fzK4vKFEKZUAzMo8OApGjW3nGpTzRwV2RNcIY85YM9 +T/n8qAu6vb8Ql8LS3Sn4n8O3LG6r5304z8qIonoDiNclEDr7WFshd7eNTHjd2iyBLJ1GVjHDK+xZ +U0XSmdxjVl93nwxQYM1yVf68brkN+Ze3lT1xWzqPmfwKQYpGMN4vnwMdG+pks+KWTUnb2y/fGhLK +y2OGuO4xVp+T1bNV62nnvzGlZiI3iSX/JMT9wd+Ba/0iyyk6P4XZDw9MpSmWl32gIQ/rf7C2A4hL +dI3tx24Ic+D6BYO9XaoBG7Cqw/Z0ofFVhsHMrTeC4O5RN0QJqsGncey9qN/BuvJeofXkk3GopI+j +cP96If1KwpR11xKtLacVDR//8wc558nea8ksMxgyAHDB9BPLKW7dDIlXwoikTT6rZ1Y56S0pC1Jy +y8jq+cgNIfNGBfabJoAqnsPFAxWMLcxP5EI71UpdFsQu29ZILYLLjbj4ghNgqMdO666GLlWI1MRS +1xJzyGQCfQ3PKBy1cQ6ezrFIav8srQbN8pDZHpR7lFpMn0BBfiIgtZP3mx5/55+OIkrK5DVbH1xX +yj0IoJXhkCyGfs4d8/c4ZooV0wAPlZivn1iuc0I+LwfbH7NXlJs3YXH3L7t28x/7VsEZfJsBB601 +KsnN6Ncem7HDvb94t/gmkPTUwBK0HJa3GK7dWcDqOzW3EVeTK/k/wthNu9q5zASMyU7nsZeiUW5x +fTWpKCvc4hOJ/EQT3PyeR48cAxLCbz6sT8ZkonYHmkUa03IA9iCaN4UDuA7wBbXrrRWTS8z34h09 +ryfpuzHe+uantG94t5wd9Ux+n5zVaHISAZ0acfCktF2YhBH5fu6wINebHTP3C/khFteUrfiqZ26O +Xdo8z550LgpRYjKOEtMrnI+G4ZPE3ZTgakvXqq2q8V3uD8xjyUwE3ZNZBLsquU+438SyLn8iQyKb +1wAIXOl/LDGWJYoxJuzNe7MxMZkLj7OfqFPyoB4fvrWAkOVDSvinK6P/nLg9d7DqWmlOOfTkNks/ +mlcrgUh2q5AfGR2eBZmCsJXvjFv+6lxDorubCPd9itA22nsuL01JwEid7jbzRMYieCdV9vClV2qY +Hx1pH3lwvp5xr9Dd870l4izewQi/kO7Sts5hs9/TuZSnphcd1pZ4AWqYcckwyt2jizI7AEk31EEh +4va3/icHRWVa/Gp2tFnJHJ8QfCeJZ05l8f5JHnD+2PZaOYKDrtdAPM1luJYbjRQh5XkIcFZJOiMy +PYq4r8KLoh9zofJFUNkCvmHJ07ABqPX3PkarbEPZDZ4v0dTYIXZnOjtbeBJWoymXBv8DjkzlIsET +XMEN9DjwKBCQcgs+8+Ybmb6mncBHNU+v+807nEztg8Jc+e76vpZ58RVXwpmRoWRc7NJks37bcsSj +3DEky/iAGYCc//M6P//GLHO2b8QjkvQM+C+VfJYEmN2sCEUxO/sU4Z1rTU3kUP6KWDOWcP+kTW/Z +GviQWvEpawJQFPyMiyujzPhzt8nI8MKioXk/eWDQsz6Uu89djlS9Ceb9CgLUmrjD55AzLHSLFCbf +ipgSmb0rzMK89scuJuWpwIre/szDLHIO3zfxV8GAGWyF7jAlJbSYGjZdrpxNDHyoHUVkznPde7co +S/AU2PkYNndQUb0/omlsJExAFkshedvecfuZMD0ouEwS42QPnF2/0ynidfuK4DCwvhdLAISWfe7w +VH+GkQPam823BJDMy7iKmrJ4AFhBBQPpu/ka3mfGtYYFtk4SwqKsv6pOdnJv+Tr83qGKzV/WkLVP +gXSzc3Lhw9rP+87IluCAGxkPBViddv1mu+q80IffNua0tWBlD0805B4VUt0roT2aBaHN9ng0O5TW +fNhOOoFVTAucTZqTuF0EjZrmwZE0cEgjUAQkE0vn/+/Ratzi5bEYuEvevv8LFdnnrBJ2aLhyWhJp +Zoe1nSRk/L/OQKn5VVLbWaq6MURFoumm90kfLhOjp/Ed7Fl68kyW+v6YTDbnmpWVQJqUDmEu+YY7 +LXg8kDnzQWs74nAqdkzv2xNvijWEk1oUwPQ2LTnaFK0phcXU2bBS1krenQY59MT2e+HOUQxRqPPt +OOROUYNMQIwJAhEcmLa6swPi/V0ofPur/CMRWzM0Gou56khFj9QILtxvHjjbQsKx+xJRYv71VNRw +0bqP48p23FdbjXMMNm5caDm6+440zyNYWEBO8bmVmKCaNdYVAC3FJgLQ16JUKvSUNPFEwOqVAykn +H+4GCI3G3+++WV29lUOa/GRl97Jr2SQC/xWKQQbEoB1qDrrrQdVDOYFfDSGTqPsT0uYJvWs1s46X +Pfitd+Ni/tVzSx5Pah/wfHSQws3lUxbscLKq9XGAheIA2GOK9Nx4ODlKL+tsS+LiDxMmmeLmqN6R +kRhnt71Qnp4mVHYBjWJKBhJCrq8bnlqxniG/hWmuA0N+HDkuTHN/JQg9ruECLqNTp+hrExBt/e1j +lhR1uoZfAkonYBLsMO0VFQzqplzpKvLBkP7Kw3Oh/8fsYzQoRYrrTjcbyy4rM2BgXuHfN4vIB2ij +pA3Kd0bKFsddLnIdMeHDB8zrxXGrLwpMtMBPDMFc0Xd+nzAJ9/njNTDbeVFB8+sh6N9wIS8j3jb2 +JyuYISqnBLnOr/ZyRYJx9AA3bjlV6lOwTtSupFqEOMfeOBQAKGb85iBkXJzB9tG7XcX6GuRTQxCM +Wd9XFEBDcW1DkSHs9M9cg+4qWhS47cSX9dGSUrXVNfAtlyuY18FryTOLSOet7w0dShAZcRb2w8ck +25Vj6zy4BklbI+mhhtxJWegyvykHHILcGtUOZX2opgOVN3GCrn4J2QsAu4NEIYqhYR3fZSEcS2U2 +KxuSKShDTUVTyIwUUccJZgigvQ7SwMfhK5hyZoQaiwjWrR4CY1nuWER+tNIbbn+8Sodv6JfBO0jp +qPn4ZUpsV7IVU59hk5oFozu4hoIChl+6ssY/XnUP/cNKhnxyfV1JHPHiEUKGUspLEG4etNfrswaV +UI1tqR89g6Dx2ZHg2FyHpRSpoYWy54LfqZaVfseA/1g47hTRchcM922llYkxolwtBSFVE6T0mZpc +SKFZE+Qwm7MxdeoqMCmsjZS2KT+fK7QFMZnEbP7NykEKeOyY8hF+TIuJonGjRKzwDkA0f/7YR0oT +tMi5OaJbrzcYUoo/QKfPJmlDr7sMMWEuwfaxFNN1buXwRMBEofeJNmdWjmlFKYpOMn0YJdppC0IM +7O/zqqxysvB81Ltu3tUSpRxT14+9F3eJv3vrc8rw/fOLXiF70ZnroanDeVG9i4bCstKIQiWPJRYu +C2Ow0KM6iG6II4kCX/47RJqn8P62JynznveItnWjVZmJm/7TgOiZ9jJufK4vC2udquU+v7jlAvEC +rr7E8C5WjFBVMPVKxVmlHm8lEWDr0M0m++PJOcS5974qE+ecKQkYjhVoocT8FqOMbMbLBAyJXWYe +W9HymmeIkiM80JAVZL9I69OKxbvv7MdscYtpBKePqN+kvkKQ6kf+lapKa2HR0iSBpS8Gp2qtZ2mY +GavJo4GEtFzOIbCv4AmzmNUHAhBpMT/WjaN1nRW0RXDGFklTKex5wxZINek956tsmD8aRfZtVH4X +diyOg9sxskPfs8QRxOpn6W4ATCZc/ZUrDFoPawWYT2pz9GXr2M1uPqAhTnm/aGJqbEvtTZzG9pFx +8JqbCzBAmANkGdv6z/0CxG67BXJSwNw00LCY/55Ln8jjEQNFc2TGQOCrfShnNW7ttf8+OWgvtqpD +JiuiZ7arjtj1igTOFF8s5CixWTyeH1gcbmmrJioQ2gWjY3HXG8Jy+ZfNFnqRoGQc6EArgZ8uMG5M +vqmPxwogo/JTDt5oODnS5CZvXK5HOUiC5XrHkKf/cWY+5lKGr07TkdqUiRvy0p6AK2NcPXLxQ/7z +4TzegbI3t+TE5GtpuHRBx4mbzHuUajGdQMUqsqMCB8gjNqZFiMt1+IDNtDiG5s2wz9Op3rDLLRMH +yCGHYA9Ey17RxbI9w4pQ1OqiH356CZvnWDBJx0PHKForTR1EgbZV6+xcRigAPP2J52ndf+DpF5nU +ZPUYbSnTPMO0pEQrB4+zy6nkl6Snop6W1kXo0h+lLImVVSLlzbmoLwlhND2r0tCq1xP0y9niemU/ +/DZHwF9o6ql+zbTa/syJwAcPqMkaJHdRmVNWrHl1DIQXLsegByVDUALRVyZNWQqfeeBxhtMwJJpF +r1IeDQrmYe45bD645dvDXrzH89Ct9xjBA1IjaHTW3ytVRSMZeD6J8KzhIoCeMg0RlDsd59VU1OIq +dNurssIagSSDTMfTVY2Vks6ff7fjVJ6eRjSjinKbzbfROlO/UN/LAuoSpoUUB9kOiLpMpSJx6TT5 +WUcmBxQFDxkluxjEDiNwfGbSixPLqoCv/OfXRGPPRggWxziJy6bV1e2fyudssKVCeMt8d3WqEoJN +V1rqs7qHMil3V+TifD5ddsszfzC3Iru5vjr+RSaweZ5LbagRCZ0tfMyu/Bqim824l9VFeuTf7fa7 +b5X+IwdnsZsB7wm4ykTE1YqEemNbBn1GKIDfsSPqneyMy+n97PLT9HlUIoJUhC+7VN3nJJxsb/3Z +DBQ2qi71pM3n/5zIKPkD4u0TiQ3x8YXyGmtkO708LAncE0uMj2EAfoupl4x9B3au8f5hba+s3KjX +fOeE+Hl9+EZxr3By0/4yvAkaD/wS4JoJuXw+g7xFT0aGk841HDwmkI8KuY+sP4bkt8ydrQqCSelA +Hi3cIk9vLJS8KvtKmf4CPSWI9A52sPzxZOZiJEj5/6s8JX8ZOzHNwHdtBAE8bp9FMHxgafX2vBUt +uZQk3wzhZ6eoF29ums62A1uj37xdF5sVgJhQ8K1e7kWMU2Ud1myR2B83/VkEKnADLaFeq561bfGe +bSGp3uax6g5wEErZdaf3IhkVyi06gR3rh8uDqcUp/rEm5mwQNBTWS3jf23gYHcrT7pr1ah/bhugC +O5yWXMLD8pc/5Dwzekr9x/MJ1ewo35VxNquRqk7S2X+obY+e7/UFudAMEvDBM7RpUyh3NgRvQq3g +00HzFZKJ9ieHbpHyVGEOaForhs11OffR67J9xco08Y6MQD5MANLjMyJNQEXR+hm9m4jyfulife3X +ho3qQbrI7NcYCCxkB2gfMCJhBoUVCQcMQaPqiVAmjwYEsO/uvflfd1Pz4CCS5GI8r/TDNHKg1/+c +ggu2ZFxvQ/5V2ueQwKpM0FoJ2qr5QDt1sgSSKC9zA5GNry8m3jeKCso/WPVK7qhCF/sbbQ1lUY0E +TuMcESY4GlRivpMB9mWunwSh98AFDBGQPwYevhM6PqKVECNfPX1n5gj/0BoQicw6rD+mYI5hWYHw +oeWwLHFCLQRBduzzuJN/K0b61EiD9CxrJsbzT9kVDou/8D+qckz8LwegmUw1VthZkodMpYh+N3Ue +N5mvdnYXX/Q3iQel8KHtsN4LrG1ro+TCmcXTAvnU/Wv1qd9bYDCttiCcC1yDiENKRjl5V8y9Ggp6 +LlLHbBZH3nRqBuyLtaRbk6wI0bUTndFHS0tqh+flSxvzGaeQAdQiwF0PRrhRxBitLyZkJAZpG9yH ++i23e2ihF6V9X/zLGQ8NZA7jn16XtbgdhquTkLCdzzeQKbqlBMNWIqlbLvha4WvfU3qvKKGbdFP/ +7bOM75wNs5BLKso8NtS86FvCWODo2Mh8bfeIPx/8AkBKZhoGDe7CSXYPIHvu22HqIGTTdKS6IM7m +KFLmXPXHzHa2xlUaZhHRtU4oMoOYQavygXuL+o+aIDHHiA84btQkUllI22C0daWbeyUXmfheXlPr +G5R0ZrlIiC+/wS5NUahdgXtnPrhB9pJ/VE7/HsMv4VZUx9z2gsY77qvu0qReyXfgSRqnM9hY0/Q7 +PI8JkNskhuTC0CSAYek2SiYrsAOzK/C1aU3iVqeJSmC5TUJkiv5dF8egBhRyEastZSrNUyfh1tyA +gDiL2OYc3Eem8+D+x9aPtQL+FxVX7fTcQk830hVQHryWIuhgbBWnOr9ue/92eatQvSmNZX6SrX55 +NX14w+VUAueS9XQldhK02X6/6MMJBBuVcI7rubcbfuuOC2YrwHwE65cBcwrwKvb2n4EQm5RhlcFB +4WhkCWfbLzGPICE9YjUv7VQlDQ24I3/1Y0sP/z5deeO/I0ljl3k/TKsXJomjyOIlQrtHEvU+cgBw +omU70MZI3gYKYcESzAW698YPlfJ2eNWQUaQVw2BiPvlMb+M7/Sa78XkeiKliyudJPqGYJG2xxY5q +Pi8rdhDtcNAyWw6EJpJF5+xUE/MDorpujchwAPe8vmAMbaJqpTJr4aL0zrjdowjtOK+68qHIb1WQ +Tm6+vvIn89+mIOeTsQ+hPCrE50G05B5lX/oHR4ffWC5C+yrvTCZ7YdFXv2wvl9RkxtXpvFKbEN2E +np7s/NVJsLO8j6kypilXiDtO2yJSS5fhbyUVKtnP1ROrkOU8ejg01m6aXqIFYvUxWPLBJTeB1EXL +YPW3ZFs35D2zF4aaaX60VVAOER+OmRcrc6utp2AEuEiHwIBg4qxJD5BNimCsrJCGvSz+OSd/OE1g +sAfFu4fs/lO7aMIiPzL5GY5oL4dojuAAQjae7s3+RvCviIy9tYwxiyxUqCTTNTol2EwYbKI+Opc/ +sn/Fy7qxHb7eskomjJ9910tLgdDkwWwM/iDslCogwYeayglIQPW/Uxf3Fw2ESb5ZhG4Rll5cGEFN +7YVBok5douwck4DPKfvxsqOyQSPIdr9mMnqh1v6+Q/Ht5UaXKYkO5Fo4p2nmY0AtJvm6zhP44Imh +M60hoETFASlU3rv+Temh5rVbgMzu2M3p5A2sa9fTXGX6pIVQwctyDxK5rHQm7irCbYU0UBuPqNb8 +BPisOfz7LGALWDJ1tO+dIMyGhEfatiArjFRuV5jBOYuh+ANupv1u1krK7qMC8mXAvZy14kXuZ+pP +lEBC18d+HS15PoQLYVv99ousguaKLAlz4wt06b/+usbQrTUvUTNJbJWADELIWbBQTdg3xWqTM8L8 +QpAjM/jiucfSHXfSZOc/kUl8RLNiRPqtYt1tgrsc+dFSgmj6n2Cj4rUgZSKBrsy5AyfHOE2jgxaO +sXCBMMAP9TTY/hd58KfnPL3oBJ7mL8lxwR0oNJs/1Kp2GUbngq36lZPFsSe9E+e/TDJA/rgaHIE8 +kcdpJWrj28tKvgCEuncWWrcW+nSi6UAlDwcSGwoRMs0ELXj/YdSPmCG4UnShFHEQymupNwFG88wh +62A9C7iis90WocAcGRVGvpRrj7w1hLH3POC2Z78GNwshsAkg8HkCedkJnWrWzhFQXGvJA3Hyz7KX +K74Cwq4qZG75wN6DjIZUZJNy1DmjNbwutexi81cBAUDQcgNr2AozoTVxr3RNt4yfXoDdsEs3vVz8 +R5rnoPRoPUNBcomnxvY2mFZ+fzJZaCxAcmVO/FIdI4W5QDT9qOPRlL3ewh1OLBGQeNfq7F4zl1OV +TMQi9QZmZc9cVWOo5lEHdtTzJT7oI98+p6U/IBJYKTTNlmjK8azxb7fHQSLqJpmbDYnguV/14dRY +o3PyPj/XIxHn3fB/0eImTKsRQglZn84hVO3FF3Jnn1uxeOvElPkm5HsaMI4Lu/TBavdhSQQiqJBV +30/zpiFYM8o1N5wX7EUzCD8bh0O0WKNdGHUYEPLepHNasyyy7SdArK6TUibz7efFWmkhab23vHp3 +L3PHcL0ikzeWjFkVQy5L8TwghQj7kUTYHA6dq+CXTaLZZfUDqRlASCfMQNfCuccuv1jIOBYzxpxS +4YM2jgn4nZvH+6yXiOUuMykI1J1rxyUfWgJmcu5Jwsz1RNgyKa+H2LxJNHdLk9XHmPEkPNoMoiTi +eUkNOD7uQmfoksCdrWaNvrE3hl2UQW3VBB4qQHYAg2Uau1PgD2lIqgC94M4dSDO2TTijxji39b8z +XsJWHaRwfgoxCU48gnCbtwGEgkChcaDJO/ePdeO/Vu/TChH2Qf1/HGycP3vt7gIbCM3JJuDM196P +L5v1645VawsVbyD4OlYz34BZbQ+TZFJ1ywbJb7LreTVUpt/qIui4bLuUdtluWtZEEDOLdUQXzZ6k +led9+HL2kOq6NGKuD/2h7HleFfVR+VsW4UPk8eDPzjfx0p/dqTyjYgBlffNfBAzF0K0Wr8kVQxN4 +ipw7zZAUNSiy4aLdck1vqk6PDCAqw2o25eS/DzyLvzYJcBg6FLBd5bthx4nC/9M22R7AgzfvjHHE +9MiAVR4qqsFHMIwcXYYnlhEX8RO9rnSFAORJ27TROT7N45q0QOb91c8QekSeuM0wcpT5ipqNbnEN +f1l91sJP+Ri0tvAGrOflCU4tWAbZRh/AsckDe2wab0SAZmDjNkYYFF+6AIhXt4Q4019MNUAf7FH8 +LHvRjHqpH9IPcnPObYPmkjush8OoPPKN28muObWgWOpOm2MHydenkWRs0sQeBg6yn80PbBzzVG/o +uZ52nQfVVwJw+C8N3ctlClBD3g7HtLNmjjFacwf5yRR+TSbfeuo7lONFO3qG4y+5mdDLl9VymeTG +zNRYydvZ9hvTihipoqf82TEl6YoWNAHCAktVpCY60KjwL1Ob+mZWc7wCmPLG4uLvUpDRreBht8N5 +yd2clsrEyDqcXRUOUMXG+mBifiS3feicaxP1Y0gYAKSPWesHdRM0lig5Z4nelt30dc3/IMglV//r +Ck9Huhpuj3nbRslHkk64XruTYqiTWzPaFM1lVBXlJvQtO49VSBNPFOisds5NbRoG2Uj0686nSU7I +i5mjsxJWcV5UMsxxNeSUTDKAv1iSjoCtl83AnOEp1XdD+xFuUzxoPVoOGuC7ZGUAeKSsyDfZ0ax2 +FqSbuvi4WiFRJbsWc/YVjeLuubiemaOXE8tHjmeWLQ3DEpJ/QnsLa1nIn2RzE0I+xqx2O6Mnodt9 +w4XxxFCl3RIpR5obDKC249510j36jhHuO8Xzzvy7WXlymPu91EALCqA/4ESj2wNZNP+oFsnJU6Ac +84pvR6YYLa3WfMILGUn3Bp/VcYvUwxZWG07F1sINO33x81ZlhmsfeIULhFWgg/cVM1wVsUNqlffl +S1mZA0EowcoI0X90fDewSo/ZwTrhzZW90I07WKgv2us+2vYDwpXyc6+i1ZbtdllgAuwpEOxNUgs0 +ZZ+mXZ8xhdkQKGqzAkyxqCDkO0D8JgZjryuOsAuTHox1wY8GAL/9acDsHCvCwCzuf7sXZyZe5ZZ6 +rx/rGG4K/lgqMZYSN3jwocXMCjzVw3WqaMWW0ipW1R4+/ecnbCYJeDEF1ihArZ4Rb4E94FaDjGaU +XNx8KA/imSndcLeEhE4y3riipxWAK0O0huADS/0DZ/sI0oD1Bkozf9stSQs6vSpIYGMd6dDG6Bfy +VMJUIAYr+wwpVcgRzIGuwDo/USe3wMhkAOCWymUgyTi4O9tZbgkNORLsCgDnjgi5OvEaRPc+3g3D +Sf0Js9S70mZ32NAoft6mAsXni+1M9z8p3vwGnc8s2ELrWEG71lHILKjXins3O5s+27y7J8x6Wum1 +qemyNDTHcOgBiB7msefDohzIo4LYcMwu6BPxAbnQ5LF7AMl2150sy5BzwOS7S273ZShIZ/7SRJW/ +8HqD8MJVrV4lCHSYC4OLDgaoaVxx6NLTrVRkPj7DnTlsxT+OIKLNR0aHWt/BNYg+vn1Ais3p5hxk +ko1y6mddJlFtDxneE8sFfpiRHmMiw/VGwzZ7e7ehE5Ym4Co3sprDUnFGi0828hj/F5rGgx60X6Gl +gnYv/Nsn2thab8xtfc1/AMLjD/8uyULeFmi0Dtjc+7RIUgrKlkFfkhEQm/9bodxo/hERiGMcv8KQ +zkgjd8iGhQxYJugp17ruvI250L28AH2c5KnPDMyb7zfKKkx074g4sok8TnOrTqnzjRz2frDkA5da +xHGa6+JSUv6q6L2xTG6hXmn61hFL6UKu7iuXpqvkDfTr4RYPuuZjqgdvnEIjYv5EM3iXyyGQ0NtU +MHi9y9oicb89XDJ8+mMJ6SdC/KXRj1rYVeyDl4kHSlZ/cWF4RUBpqIbi3n61yM4C3qDDTqhCfdib +llzQ2No5aaCbHHWW8J7BmbhzeR+BXFffoe0go7likb1bV5gtfLCTJF9+sk+87Wt5iPfmqeeRRvKR +sTav1qg9JJMdGbibzVRWgZwgeRAAzpShb2Hpp7aPjG/WtKxjnaHwYP/JMVtZ5lvzWnZAJc4iQNbx +IyMFXN1+9o1eUfFyprAZtz43X2oDEKAm2+G79wbfq2cfr9VOWrj98W91J4Ty80WGCpRPitGHJKEF +zguivD2ygfiKB3kVPljiaIKGAqJBHrp4nE6/WtwwyqMYLj3XAyoH7AQ9hDgpWXxsMR/9U74ocbPY +Qi864sgO0P6Q9ltjBI5jw5Tfu/qfhn3FsTe9a2rLxAB+hUCexJ9aBmP2vVlDviOJCURqDNB5KZcc +nvPxQf41iNTMfPryxcQ+K8Rr3GJOVwpdmDRpgq0aWMNByOXpTqSpqpwiKLsj8e+fMnqe0pSbebLl +g3GhcRGFVpYJtufkD7UhKa6+prDMuHzNxlVxggM4vKp0mqRSQZKwYoT49pCL9QcVxH81PPIBfxP6 +W+mdc8rRQXE4XDwPachEhox/nP/AnBtSMOUbGaMpojnCk1ndStPl/NdBqBySA5sq4/AgZ7DL/uvc +2xT4/OUrsWt4Sn09Y0bQLc0KW1nLozXNtTN8hzI5vlPu6NpkKlr6cRtZeiNb2jDKEPsd6RXzS6Oh +cDbeLJ9/nPwbXu8ZR07M+WvSnge7UZAq+T1LWRFutDISy3ddyHY+ktfzRZ89WPtsr3oTsO/Js0xi +3FWE4hscHAmx8ps4YLORkzbcRfOP8aH/f6m9GtijftpvN742FShKUpIiriKojUxZ+W61MreRjBP7 +XIhlKF3/mEspx3axqrFmn65FkFax5KyNEDkOZdexFfIG08tTY+Pp1DbU+kK/pkkF7enpNmRQNFlX +NpwiiJeNvw/I8mDxSlLddDHmykOZ6h+vIB26XVsZzumCGUrlmmBbP4lGdk0Wi0iNyJdCnUQxMxbW +VBbdw5iIGjMyBRW4azpu99+xb+lbKqFYaLp6wfIjvfJ6df8eUazQpSNzQQmyWACVB347syq0DuxK +V3JO1pJlkioeqxG+lU7aGrphOybdS5wXcKTqnN+cMk+twZg1r1EHW8/HJZvdvHIh/uPt5VBrQ33X +1TlSSyuXl6ux2FCICu9DHyi+twLaYCdrsjdH97aCH3yLKNQx1d4f2UaNMTK4K4Uj7JgXOrsFuB+f +/YcDaVo1HMOm10UaQzTVXLOSOfbnP0+vlMuUCyL+CGUWMwPPapdcixTzENVSqh2zI1FlA1zyaXqA +lu5lOdKj51zwb9kMwzBo4niDyARezlXBJyuWpjyW7417o3OuzMKvsjOnO2PNjzv7+U3QvNVPupVd +DjRTrUU1VI/4z9iopzhpFch4NgMAY+650lGNMRYhjGjoJ7Dyt5Zg8ORzYcmItopNVglVEIq05JuP +2HkptG/9QG0ixbDZ9z8Ik0PLYzfU4JM3OIMT/C2KM0ESY+4ZIxYth/DYtWZWLF8e2N6mXQSCMEqA +bBrP0Fcg5tLyernDMuWlWLyN9/cmCBUwXtB5zY9A1HvK+OXtIo+sgSGkyEJw/JEwdNg/0Ti9O2mK +QcsiD1WbNSnbl10Qe5B6Cc50XWyJ5RXeLo7bSUg5vr44y5nYDvHufyVG7D2VbCN7Ejgbqg1Y4TCm +xKviKAgLYsJYPvIZ07YZ22Xvbt3dWLtllHpTDelZiQbKLD1g92bHXgMeyyfvRVNpajqllxLskZXh +vNY2UlWgcSQ0w9xgxF6OtXKmAIgTIcs8hOl+HlXlPoxIJZ69IEYelXnFjzuwP4aWn3q0GfboTZoY +efQItHe+wrHA7UGi+uOwMBj3pHDs53zbKtw+7JPs8QCFW/+zcpbvQyXDtdHHaNTyaIm4dMeSs+eo +ijn1cIBA/f82rZkyToWa2vDtRjUPFKlmX4qVyahvKaphSSXsVYHMzfh675wTq7BYw8bjcE+qetMY +3st7t7ToElFja4PzTARp/VRhsFvldit+m/2WVHY1KG7Hux4GB0P7cgZuOrrW6emyJqLVQjqXqfJW +8BgWPtZ8IEiWX+xQC1um33Df9B32Opnuu/n2hXtqpq9d+T+IBSYWqy8dI89Nv+xX9OtDUfkRL7Uo +paIpMoDXariN9RhxnynJF8nfs5L69XzVZcrQogZaS/qHUHFUTqCeW+OfEXeD1iGfb9KSwnZZR2sL +CTiPuKQ7i32S5HjnbMGjewMgipMDxX5a/0+VkGkRE4cy9LpqhaclxduuQ47r+2Za+Zx6ZPdb/Ggx +fgS+nY1bluxwgRCwIOpC1JVefneIENJ3QH2bsupTwUYRmw6D16W6zrUnf6aInDA/M+Y9td55/Amv +dosDYkGkvhL5ACJokaKqdQH026UnnBUzNaSqB+CDm0gQ/sGCLorQzYEV/h2p00+FKBNoUhaZqBIz +1Hf+nD+NBgLvHyEtQJ63usMmGQOksaJaJ3YOg2gZj5I6gT29l9TUbHDTVtXst15rBdAHTDJNkP7/ +4uTkUflJb1qjeoAl2Xq9bevmAWxZVFBA+acjgAiFXxe1gpSgSjVKOgfGJXPmJVtO29EoJIi9XD32 +eA7T8YLMREgTS/BT0+OiZwGeFbiEFM+xdmA5MgZ7Ikle6wknLHQGZf8cbdz5RnSmNm0qU0VOIrzO +G0S+tER09CRgipCVaB4qJ7niSNZyzFJ56x0FU4jGoOglrSUS7hGIPYLTO20MJ+8tNNNqLzu4S3VQ +ij6gC7EdNe2KWn3EKrnWEIiSFTqCV61CRHozY8xAOTyNSw6+5pk30z7RnlXRWosn/g9qfUMdW9bl +kXcIkLTtKfv9bxyjQKvG2ztuYDcqVCWgxSG2fmB+5YpqY5vQOA5EJEsIyca5eTZwFSDTgNuZJD9r +UadFgVCmX01l5X2MvdCus84uzwvf1fYPNpJo/ZB3xBjrdxRiByzxx1WMu0MfPBKFq0kY+n0WHz9X +SXVw/nS9agKGJ/gmQFkHFmdJ9Lo1dmo1LztayzBRdtbmRjAdhU6Sb70UXW6Hy2Me+wY9PK8FjB+Q +gzJdpffhHcF9vtyZCree+1zVBJPe1YEFjalQeaXF+rlTwP9pEHQ/nO8pH2WU2G/vqV5YF9pYKwAu +gGWv6Mk4kC0psv7eHhkGcr5ARxO7/WdP7xgWJjzPjkBT+uxbmb4TuaycbaPaCQb9/jDnYlqL4Usp +YYQOU//Su8nte9p5d6kc5o78llkrbrhOxtuk2mLZ3NmMxxIy8AWDyJoGVrPaRCTWMgOgy0/6SUdJ +4CpDy/krq2G54kkIBcjC26oAjNIyTf+Vvp3yE+qVuRdlVSlrc+ZlzRh8YhCocqqPPTdnhirT44LT +hNLWspwgBdWfy9B+/Cflc9Usy7V6uNsDu1bBRvwcPgCZQ9ggG/VSVawyP7xQG/zBqnwxKsG+IT0J +70aFhVv6v+KQGBCQ5/OtCpFoOHepmNqizarJ9+m+DABz2LrIEYcy8LdBoFPS9SOc6G6c4aatdUa2 +7tR83TdXwlCzWPspC/UVltW/hg15Qn+tM3Lor2iNpuKH59Yse0GiU1kmMDfsd2BQ01PClVvxZKgC +LQ+xIywPyWTaxvNf1srrTfX0yduX/1VPRJ0+NBV5ga9A5OR5n/B1CNAr8v0rbECDY37UY87CMVxa +abp2j5qp0akpbaxxUl3xXdFVzSSO0X0UMlMA7GVktf0LAUI3Q8aP21sQuY4HPAYJLt0qGLLsSI8/ +Y6u1tsYtDtoJdIz0FJcd/SSKeFHdkwJwN67KOsTSQSD9aOsuacUH8fSwOhmZPm+0pnBVHHekI6UH +IoTVde5XUo0oMcCZ+mnZ7TGz4NQOVsiRMZGZDiOp4AX40eKEVEjz6TYzYwRVraKlPLEDEHHKWqbx +LQ0Q1DPfFR687QJG+tFeOx+0bZ4GlGWH/z0iE+A7BehViGjh4qhVt6izt2GFjL2cRYsXD1dLgv5o +Bk6tW/pfcK8Ym+39kEFuEe+aZJ5eEs95bnFuqprWFGR6Ss3XODE0RRNMzWXBV37GitfWcP39tUez +qelEpMY/bksdBswZ4o5a8i+vYfxLzZJ4tGokMnuDS5U9stVjyXQF+5jxynr1mm5nE2UyB/ZCSy3j +lK0MbiDXpulpGhR/TiMbAQ2ojw6ascdDCCJSbZ2UjIZ9W+NuA31tZBcBHBivGPb3oPTQbDdaTPFg +SO/oPy6yj0VX35PWbwkZvkFOLeXN9mN35z53R2YGHmmdm+b83FWit4fNt11MsdrOZ4eDvhI/e8/D +fLF5HbYw95+ZumwfX5l3cdHbKTUoYNXmKz+P+cdGO9Rg2QH+6me+6SIiGdZhAZZtAM24TzxdcH+b +OsOzfsODt3pvixYbYkB+ai9/w96xM0n2ZWiznVx6e86FvZENB9ISymCOBNJzz60dkPI4Uh/w9DXV +NHmHG3RHTpjLyqohdV7VE6jrqHRVMN8SUyM7kbjDN8InCWz1w2UdxaDlw5L0INUVE2ZKstMIjyaS +kO+eyQ/ARBImogpw0OH8o6Hd0HIHtjgWdboNBRD4TgJkrQqy8AhS5Vo+8q0IDx1YCbUMCkudVEtk +nU9L5A88rnGrKIHG8oQEiXX4ZvPTCZIC7nykKDeJOncMwWj9B7fiwxqMM2nfmdS3SmPJkweF+LR1 +uxdtBcuTatGNvw4fqZGcQqilm1G2FX1yPdcAVsd9HlnxKTOJl+Ys9xrF9afWTW4iYYFzjy8/m9ek +EUqb6XGJczrO9l/BNP8qkkFRnZ/IsSJtSI5RN7tFwJ5frWle1+KRppz3iftrZLnoZUiw92lL9mQd +G58tNSQeiWrK/scAVYmAvpA2LdOUJw7U5Onl89q6pVsr8RjYGRwl+7ZBa2r0sjo1UGMf4YLuaK4g +SC/xe7DDqJ5cJHTk3YQINRuAxzZi5U/hg5DQQb2yF+UjAl4mro5H4ZjoWWFRIXThzJuRYQ63fuFL +A+LQ6M4r9IlxSLlx2pl9uIvWZAIP2hzGTVuQ9oUawyYf0g7O+1uPjEopk2JtKBIzB1fhuh2wUoup +5pMXwR3dRaIJz2sC2rXKOHvwlQuacWrIKcq/QYavOKX62TtvWV1eVHOxWplO2ofP3dJuFbHWWloH +/rqC+FZ1ER9kIAJUo7WYnk9/gC3U8lttZnbeLebeWbfBmh+qtG99+3bHrEeyWwl3rQx/qy6WyiOB +lASsPOKhIfhNbRjJ4YQVKg5UuYxWXYlo+8a7OMWdHTraJYU7hvZE9gsTP2TlIe9fGHt+HNG/T3iP +F0kJ6tl18g2ES0v1eVYBHWAK4ZiLLmqud1MiDm/5w57V46wZ3WImI70GvY9kCs+jOBbpytqSeGhV +GpjvO+PBX3uiISlgcKDTsLavwpT5f8K7skuW8j0fzwHq74AsuCDkpseugtojkpWkD2XLKohJlhQk +ZTeh+XH724NuCUlNZvR+SS2s9DVOVM3aDEunNJvsLlrFNPggJ+/Zx6wYOmi/A82HhT5xq8jlxbRi +yUs9x76pX2nRJwmaBVIHeNDgwSdYiiqJId652WqfnZzPJvbh6LCBzvRVZyeTScNZK9arxlwtOTL3 +KAhqHK9uQWIdkUQ7ZDFLXFj45yzOsDRlRZXwm6M0xxTvbQc81SLfaBl/aMNU2zPq2KurIqw9eRwm +VlHcxXHF1JDw1YiYkNwaot8HJC5tbObWR1B3wuppjS6O7qj3AM+yEdHm2zhVQp03Y+LHtJq5IzYK +sVVNGIcprdUkL6KFbZVsv30ygAhYl4OLtnd8ARZeX+Aq95AvJCbfmtV3zX7IKNXgua/OchUPp4+4 +cYcVQLvxsVvK9xKxQ++VXN0GXyKU8nEMrJbzsolkwMunlqRq7N/tpAEGBbK0qR/JQ8zhDT+3W112 +rF+oBERiAFCZHF2vfriKBlR3zFeojYDSVnFrGHEahV6l+/YpMIxA4vAaW3QbzczT97sUNk8jiSDR +XlWtiQ1AU7ySHgjLAPs9tp+P18p4a6mw7dEK3ScqAGyuKHbhML9+zwbmnEWxGt1yBwdPiSPLEYSh +u+bRCSTqEmpC9wPhCzPK3IlwMQTaljYfteZDoy3owUeHXX7ip/54Pv6ZvSeUOyJswrK2yREp3Xb9 +c+gLRGs8fNpWk1/lPpDHYwJqs0szeA4OeiFkbMoHsrY4+gyzXjVupJvq9wJwtiZM6NSQDsft0O0J +U8QWdLwQk/XqZrInku2hXAzowGbD7vetEsNv+NXdVHldSE198ssNblXqgvvATWgF3qBZWvHodxws +FW6twk9DwnJotizjgczeT+iR7ueE0xSjAUBMrJ7lGJFgaE61MccjAyBCf27LsUYEWjv0/wwif4nf +o1azqPxVaVzk4ggkcmFaL2YxDZL8Q3c0RdxQNYTrhmbABDKoZn1SId6Zx92V/TQDrXdm9Y281Au4 +FJpJyXWnDLdB06HW17ocl+isfBoJy02uboGdhzAEEKtIONhjWpupaQUJuxEkis0LeaCePbIENMoG +CPpJbpPaaS50LyYT342vikqoc+VIYZZFbziw3ouC6C36xR9pa5iAmjb3etwyeewa188SNP54vKTg +M0Y3lQAV1YsvyHh+sYZmZue01074aWFGjGGTtevgcgyxJtqdAVzO7cnvOdrSJzwpXsOxYmSqBdc/ +SJQ1ljpyNZKO70l/lVejB7S+a3S7XHE3A32u0uPhNxiIFn3hb6bmVUZahdYAHY1qBR9bZUl/w6uo +HNI2OEqVx5inKlMaL4pmWdbSSxAMHZCF/ZI8x/+Ampe7oa9yxTlJhS6Z1URxKpRl6MwnEUEzlpGQ +9Zp7xFlPIYZcdbrvL8/cZi0GnR+ZEzwLr2JYU6JEg+HM73Mi5XISlFJ/7hyvdfAr5NPaeUlgeI7n +XV7tQTxSpZd5Rs5egBiFzp3MyHI1gjA4BQ1hpVmezjkGiDx0U0089owF0jwFmiyTKJt3YbNdshfm +i56fkBOekBFIKSkYKPk+e/Qn6CXiiWwxNDQUHIJh3Dyok7kNzeW9jsSpnPwZQFwZKf3fiFZr64MK +aS/oVJp1w8qeU3HCu27IbQ8r1BWmHpZm3RG7R50hoCVE2ynAeyQ2J/NSghMxYoANy3sRECHbqnX8 +TWAb87zD8QFOMQSPRJEN/A/Y5ICm+JkapV8F3f3PBrkQD19mpw2218zQIHGvxWCYQaEactJvba6I +npWDIHruCibJnK0zKQ7riASuEp9IQIK8SNqd/a7kpReaU7F6BvRC2kN72zTLiz795dEYhWrt3i64 +/4E9kCO0bjFlDIM6SjaNjMIAmoDXTv4f7TyNy7dGkwwJr+YlEjzigaJ4vGFfPX99V2vEiNn7WT4X +/OJxS706ktyz1jKtRnLwXeQakwLuxYVJZuYdhS2dY2i6b0d4RK59zqkCrbFgydiVjZaJ6mz5Okyw +Cc/oYNOOcCLNRc+bfgV3DjBXbjjbXIdd4OXGQGBVuYryRl3o8CYX/L01j2dYN6P+3Hq0imCsWx63 +3ozDfJxeXVjjciSC676VBE9LSaD99GIRqqgx6FpVRynM3iBY3rI8om6/2+T2fd+9LEmr/zqxBfW7 +TfaBrjYDNyP7V5UEPEPoNa3X+jO7hiD1OCrewTs/1Gqq0mv9dNHF3420pck+QeKO5JBdvHe/KDqK +6gUMCyBkmjWXc/2krbuK16eJAsq/4T2P6Mzqahqv3DSkpt/lCP8MXA2i/HuAFat9TFI5pSZh8vNx +r4PWG8RQodlSnEN5QvHe6oiVker3khJt56Rc013aGHGYOxaXNCT1MsvJSvr4jMzVcnDu60TU4rK5 +C6GjThfz12RdC7zO9tf1CyDDJjDwCirm92gqlj7YwLT5PEniAiTpPGrIsk+UNCPdJMnYjEH65gm+ +F1B9quFmluzUap0UuOZQST5hC/NBDt6xNwBlWCrO9KJCJFkF+ouplTOpg1fwOQD6ncssDYrWiZZP +sVKYvmaI6sgqd0f4L8U2QCYlSqmLmoShBvmW0umgGxr/VTtA4AspBHnPp8fnPzjgn5KNqtrt7TAK +2uAfoPmGCkYEA76nziXIX9vs0a/yL57teFRblke88mXNxlx/3Tg1Quag6GPljtmdQukOK1NxFbzA +60gUGi7+oVVPtjmEZy+s28IYtDF4Bnu+DBpAib7zR9IgzE/PZZSfnRhypfQ6QpI6BD9nk9bgc6Fj +ATMy7e09gadw1pCqWDnNlEVN0BOJEq2xwY/2+OcEpb01WgHH1xLn//RaKK1KTluC9WYpCehttLQd +XOwqZQbYL+f+b4jPuaFCSRoTglzRjS38csUxcRjdjXpKtHcTtO29xFT/rbEMhoosLHyUxF99ZGVz +Xisx3EBMYr9kGvVus2qmj5SA9SHz2frtmrEdEKkXEr8O12egvFw+cvcEBC3UklQvOptQmt8oDwL8 +sRoqwNARxjBW9XTJG9mKhomt4llFyelYFgO6vaH1DiCiSJ3SIWAPIt3CnghcEs8VMV8sImbF/29S +JTUAIsm0ymCzFpmo+2dFQ47E972UC7kVpMq9XgA2C4Jh3ljXceOIq9CGiialNPvhVvAa89zVT2rP +PCRUbue2U5oKx49JUUa0pN/akG/MR9t/DTBaZUC8qDV/27cKjtmULPShWFosWX7sEauBDBeoUKpX +p4B6tIlL3wxPZ4D1czDLgJRdhF7C/VQGpWRC3On2s1QSV/yizNqptNT/2SdsX69jOp5CAJikWtOx +JbOBg8g925X76JG4G9zDizhN1M7M31ZIVaw5kAuYGlkOszsaLur0sMXKoMmiHxbvo7AvermgsEjg +DN6P/G6qxmhtZqeGfrs4kxaYmwBbCR2WzV2W/ellMx1S8IVvJR9b/ooDBb6HNXo6oByuwL+PSi76 +1cyfgkppK+Uck7RGzoJoogD/+YPbyrZ6c91GaCiTait5VcH/QFYQRwZEgweJrf1VJkz8eKTUHmBR +3AGDfSjqdmlcmTzvRMawdQk91/0jYzYZBzz7ktQWy0B6+mkYF/j34oM/QmmPuIGvtXEbxBlquEe/ +NIXbKxPs3jstr3bIg88EThtxueYZ0c8m5T7iTWGI6Erdvp33oV69Sap9EgGAw4/keD+9wqHEOUPv +sCDLtRdSofUu0PfL6xgfMYQv29kdaDBvyobw377M+iLJ+ptYeYT9mhC0OfmN6dahhkPo4H3n+fu5 +E2g2WVUnWGu4wvpo/RLb64FU7mDD9GbqNYfaoD42ZPe9SfyogA8UN6ynKK6bzluIkTqCsHSCCXGs +Oip7pWLtJHLgXhcOFqPy45jN6wxVeL0VhBnoiyPeYyD0nERShELGwDnJIT6lH0EBbwA4ynYfk+sq +p8Bk2at8Ud6fgMkjWBhjE+D7/SBPmcft7pyrvgEIfgXe0PCiob9ZNW+Ol8wGvM3rNRkVbjQhHw0I +vKqZ+4hR+BDhkSKBFQsmTZ0D/uFXUJ3exohIvel9aWPwfXhWdzYIB6QXAnrN/y3EkxtUASIihqm7 +ddFMnxd8fW3sdRNL7OdIeVv8sOd7iwxdwQHKl1F43gUbrao0N8DqUeGD4TYAHQNFoilOLh+63E48 +I3z5LwFqaG49UlKRmvwweTvcgT+t7/tE8X96wRQdCo4mU9K7X1PQz3omrJqP4ORgcNN2IzxB31qI +rZiKfdzhgMqySi8nvQio6DSjCabE27cjegetDTpdnDI/rBlVNMp2xUeXX9xs54tYAbArnGKnFd7g +6iG05DY9b01v69k2P51ts+JO0OvlkufmkEkg5pSQpUdRvkgCxDIi3oDgH80NRJC2YdXASMShp4Cv +Ux2jUR49worZlM3Ho4QUr5WArQBXpaobjp2/WeNotaOrqeBO8RJkMj76jsKcywWgCbU3N1thyCRv +Ka7Ii7Ak2s5e7OBGWiLzeFqZJc999A4iXXka4zHGc9HYnbllivPlgK0tbfp3FCXxFUgIs6dKwWz6 +lSuhF5PyQvDRZwqvkvGd6H6Yjpjq8l+E8Ga77QCn6C0ti24+f26TzY506BvBX8kWrLfmQryczfop +9+w0IBkjFj5e3b/FIJCiWDWhhis0Qebsw2kaAbLtnbXLVA4phcrAwrJy8aXh0UuhvUettzxT11OB +zVfbHlA8hG5TvRamfPtdDUTNIzEGHpsK8aWheQLURh2BRQJz0rdHcOYhMlPNV/VvAQpWTLs9LLAn +JAo9rbmQKpReIpBhd0uQo4UDUWT2uMCVJgQabdJ908aEPOtwFRf36nGuE1wDgaJ4UOJ0zCosom3Q +ppO9Wlhg3UG4pHZAhGaJ2SuQmxBuxz1k+y3HE3yJKLVzCEaul+PiJT07pJopTn5W99/5dZpLJVSP +Fj7h+ASLf34LFS+eJgrtbrL6TiKysIDAfgstFtE3qrp+BIT7Orv9WiXn/i0URquKylPBWRpfl9gK +ALEPpsvJBalB4XTBin5o0klHD7l+FiBaF3mNPLohmGeGld0cXyI9x4QCr9W7qX1q1xY3BG8o9GBq +1BSjs7JBJBbA3Rx8LAIJc2FWFn17j4C0M18Y1obUj0FItREGChn6KbRWq8yiAF1q+j+83IoT46o3 +WHfxu3QIZYZ/LGtu5d6K22AX3pwJYdCJZ2fHGaBQqRhbp7meDkNNshB0jTKnHNSZpK22lhAR/cKb +7R/9fVtAGjLewkG311cMQ/31PxyjLoOHe6w2f9Mqf7dLS0X39HdU2HnzbTE4rxGsbqR7rFzqcCrX +WL2Ic6E8zyA9qyOslAuqV7QJuhwPoQSbiT+OcJC/ZhFY/FN25CJXMpDg0bdOiHqUCdlXAVNvNyoD +LLNyjzszwVIZPRgj1Lf4pGhgMJHcWBPxA31nsmurSHlsX5+CLvWwK06AVGdT/Tunw0o6IyZnAY3A +Zv37gI8E/xB30pRMnl49j5W7zgnwI9xkgpqU5dDlFcKFsirjb32MLzGA9vca7InB9bSgY9xPV45r +3/uTgh4akY8wi3s6JCeesAOLiFlN51khe3rCNuBY1NSts1NW+5yfhfcwI3aqmAaRCTXRvg822TWs +1PBFzewB7+k7QelJwRC37m1NNYEHnrFh9oUeOC2ahD4uhZruXslSXg1Uh0OeOo8q1ihKqb3Drrln +lT0XqTvBWq66EFQIEQ9A4JtRTXs5tF/Ik5Xs89nrhJ+5YnT7fOrxJa88FDONKr4/b8iT0mgs0WRB +WhVr53c+7WBaITJrKYY6enQ3xhqZdz6F5Lel+2sGod7mKxdd3JDGAtnV7fY43zDtk+P1tUE3+KrG +KL8CPetxLuNyqb8u/xJZQfyYdGtNC63vLQFWjw6WOfeTBrgf7dlLyx64Fti77sVAl8BuDYhyg2Dk +qF+fsQUUDJaQvKqyd9PuzsG7BHSZeSopXhum1/49FRWL7sHuMtoGU2VtJqIjdC/7AcS/6zcpL1NT +favqvCRThp56cqlb2YtxOm9NGD6vb8UlURQStiBWnE+7qPlXv61A6pwiVqdyc80jyw7UaDLPGByK +xWZHrqh7bjqu/PFX0LRLiLfo8F8SJkuGU6WMtaYwxB1XA11GIgjTubQm4a1fYRktnBfGw9v5ZxKk +8oAxlvAmxbV8S+n33WkQUlBKs/1gCG8K4hFv77GxB4Uz+XHf9JctBNXgMbyb7VQhE6j2nfXmPIFh +zovI8wuwzXMVFaBIUdY+az5RGGz+DiZNPkSwWSOoPMxjd3zB7oHqxWFaWXI9We67+sxTMOy1559h +bnaRSH9pQQPtwjHdInvD1zktCUaxbyr3k2dCUvVRvSETH4auWJ6wKZrFkOuqfSfPxaFQEy6iCaqx +xWvlrLMDgmHrwddl43zA5VbqSH3x+h4rcKrEYzpCxgy+Hrncs2j3WH07a6SyjGaQtbs6kJFpDfKL +ype3es52ybk8sR7tkYRcvUAt/Zg7lXG2kvVrSh8mNe8IMkrfKLfomxaFHEQBHDGeX9xhdHRPQsio +cV9KbI35E4+QL2BoRGapo09rpF19g5wPYvj1LdUXmOrpxFfS2GuCUP1iiubCeCzfimGPZyMYxsDC +LmdFRh6ShPFtT9rI7+vAPSQY3TxzTs+Yj29bVA4ANM62tQLqZ0INZDuYu7EZQPkYGSabJHVm5KNY +RPJ1z31qtrg+nmTiBwbx8B5Tw8DBlzu4+knkjo+3wynAQhemNorHVaS6tjyFtMaPtJFoVuBTNJHN +TFv0+lYvhamXu+qpb+sHNZLeFxxc3GrTFVtsdzrYl4VeN5Vmm8V989Ha8AO82zEaXBVhfzJlfmRx +nk2RgeYSKL66wpV4GnpByqRpmfhdjsQoEqt8LcbHWauN1e9dYgHQVIoT09s3N+F4IZ1fVYvr8xBB +FNG+0PeRW+UcseCVxK/Ra/uwd9M+L3uKyOlKcGYXZcF3OA3E1OQ+enhT844Bx0K0R3UsYY0LtXXc +3miUaNXFIYr9TYc/coaCbsKkRBQMpAUwDtBBVE/qcPavgxbevXwUq26GjlrfiBxcjlwSjcDE1NZ/ +VxrCsHN+35gqRWR3agKJ4R1f/dhtcSdQ9bFiuTw7PWI16a1Df3g5CVC/2JNLG3PO0Cg3pxpF+Ar1 +zgvr3/QN1AvU35/SzNxF2sfMySCZ3FNzgce7Xvrlu2wiqCWXKG/Y5+LgFCfun0RowePG/rzhnBUq +QFEgfRFQ8AoLYU1SrFBYiTrQ8TQ9FXcz+h0CwAZ8pAmQV4DvDwuuRmSm2yHCtLz4G52Vo+t1A43d +Tji6S3gdxuBKowEeUE8pWXdZGLuJFS+2t5drreehYPzuVEmrNxatNpJxdN+04fzqEY+vawnvRAD+ +hSb325WSA4bKVx/6tVDQc4jLg6gRgwG1fvfYdkjyDPkv0TmdaAMeYHDioAzCKMvOiMiRrKK/2eRx +aS4YVA2Jtdikz+E4MDV7mLSWTdxvVQrbGM0qrtZcGVtiqbiy6TaQ1/AqpNGQeek5Y/v98rpOUMZK +4fbhan/Y72r/Al/Y+hfuYglgYpBY4I1KEzDzFkBVBZK7OQXSMNU8IUlVTsvmSkxHoCqRNeTliI1n +u71sj7ZimKKYbSRHHufOxDCESfJEAU+ugC828NFyVq5NMSiJZCfO08uTFSuqYlulgRkDFOE4SvWC +kdSBEPpbAZgBaVklq3kwJd/o8z//ZK89mAZGl3gVihGaC7snlVj3S/few69zTDwqkGVbHOkYYT7V +gpVq82nw7a2DRfC6BJ6BZ9BQU/b561Ty0NqzZ2dyoxlW83nQM5RzWrivzcXF0bh73oSyXewRzOob +yi+88UgzjP9FBtkSRFXkvuqJ2xDiJwSNeYJzS+J6p1e/iFEOi7LEhwVMo7DUvb11tuC6Y4s7b2TI +Wlx6N5+WyaMz+CUGTBh+ncrNl/mx/8djK/kpq8Ofk6oLI4+crEnVmCubOdmx84u43sjt6bUF3CK+ +Nptj5VAgZJA+C/eQXsfFJAX3SP9pHiKEsZ170D7u+F4bD8fp+ICwBQ5s4y5h5hGeGKBxQM0IGrwy +VYJVBzcV30HA+dgI0HfD1zBXeQSm50/TvFcHzkGLI+SA8ucbUp5Rmm7j9HCkIivWIgcZhoDN3RbL +WSo3UwFATBYZQ8pcYZMWQydJUH4KB92h8XTMATB0dHbRyHkKbNM3zsWC0IUrHrA5KKe/kpHDcM5/ +eAAOwWxxEp3BZKhaLiLQk8ewRX+eLi1+5m0I6z8iyMv5ruTRTTY6LFGqeyY3Ie+1js47cOrN9nrW +mMBw8gjDNE2iVGbLu4kErbjEj859G7Al2qFUbQrP9CwXk8ql7X++axOud4lwAhnoO9xNa7TXnv+y +NnR7d6kx2m12Xy3w92vgUcl8/BYz7tigejugJgKvWauXYRidxsOu4k83uLcKefGqUOZTJ9hE8QfZ +qeScWS7vEWiI6KMtiCCsEczN8dA9JQWXy7jNvN8w8jKpyATehlqC4qn6vxb5v4MbNDQFf+SMGe2M +O2lLcCZ6CgrnNVfFx6j4v7jIesxM6yGLjgq36g5+VqREvAMQq/aqAZ8dmIg52VCcT/6qUfWnV6J8 +OHoKZbjbANVCr7tH38aXbw+LEk+WGnfIUkxZRKoR25bet0yN2A7UacjV4UFhSMP7RNz67k3NBvab +wAlpu9eapH0Der1owFS0455rdQoxWm76Po7S8i5Ctj494yK46u1KvByDeiOJbVpOamNuJzbnNKdw +JkgYotyktFEUi5xdrObEjjOxhK00zIqum5I11CtzNAi5hvGBkhupSj4RrFzB6YZ+WQk9p7ZgMEh3 +Bf+ie2zO5Xj2srNgeVphMJbN2iajIh8xp/Pk3XXYgFt4BycVYUNy6c/nCriAEjaVxe49l73/jC2u +FhZVUfzC3CIOeexzmJmAfUyfZG3GFpiqC7hV/3WUxx5nKg2XsIynNivUssAqH+h0FXWAIJkJuRlw +J9hjpSnBSpFVThsx9IwTsclKV1S+BlOLx49liAP2akYKmhkdtOAL+ZTw7bQ4i/aiWO5uPIHLe7ka +L22jxcVLgNLxQhZ7rp7M5pZV4djeTp6phEOfyn/4yrsnzWXt3JWrytN18Pe+cgd6iPBL41LZh+ib +RbPMoWlvA46rughnxIZruos3SRg5ugUF7I/v5byhofFePWPF27L9FcE9zbFRUV1q0MneLXQvdbB5 +lEd/3YeBQc5ErGpaEK3HIcd143UxhooXpgWdULQvThVkOSLH8Pi8vhz52LOEafK0+9tW+rJqTori +QixBver9AykasaMJGUjR5xCs1jpl8mTo3nSs83SYtCfrwwP5uoRmfjNRzYFhlaQuwYyYOZTvk9gb +ONPQJe+nsTNE0mEy9Tq6P2J6yC0TQwJmIWKpWP9Z3jHVZtkuzNEB0ap+6a/WAiknlEUGVs8LZ/K+ +a03jl317Zyj8P+vjjag8awCdWzn2ZqdrSeYLcsqJH71rij1D3ysyvKZEIbfOz/0laCSo0Sb3U/Vj +Ay2PXSZ2C+ra9l+U6g6f53MAiEsBdLHoZLx3gREQ6fN6ENEsH8wRM+K0SaM7TcaCGK3WzpHw3Agg ++exyhIXZz/j+L9uCaSse8P296BOxgUV5os+ilopWyKgNUHOsBBIJ/H0yCDD31iHD6j3zS7dscQ+U +stQa6Y+/BUqwnRZkHX3kCurB6rWQf/XTWjo7EinNS3bolERQVzCWbgr53mwfSW2AykPO6WlBJ1YX +A9iVqjmWX5CfesJcgJr3KzpjqV0Xv1bb6Yc+3SfYpaTae3s9NIvyKf5WggABdIFq64l83OuVBepI +EYWHJZII/6Mde2GkyEdWvtRsPODsML6lRksQOVV0y/Grcaiy4s6MEyZ3bqlBy/E3N0jUk5iX4a4f +bJoRMkGrL99KsNHfbnva91mc8/28Kml9vLsOXiaoUoJbArbnSkMJYwBo0WKfAEh1qt9Yu5rSFcXj +0Cn4N5AMPR5WhBhVochTn+rCuqOM2+BHeGkwFOxgIET5dirYoi2J+39yVthXvJj7EIw39Ib5b0uo +eT+BAIZOO5OzL966hArRUkuXWvVPajuLBLKF44PCxc8IOkfwIkP0wSNdjtoZpor6OmWUGASFOV+J +vKIvkJ6YQqN4qys3JKxTsLTp4/vPC6U23IdWUg429A3jE+hdxY+yYKIh2sc29zwTLXXTdj9HDF7P +MTHTP2WrSnyx/R3Nq1OYdp7Ig6f7cQW7nZCkMUjX7XM41L4Be5XnvnpkwTfGl9hQgZtfvMQ8uiNd +GyyoBmUzQHtvevxzjGce7ZUqECL7JnOy6weCcdJyK+LwbY5R45+mtvZdpzr/0NaZO64hEtR9L++8 +qX0XmzHjoEerFg6Am3DPVSJGYNs+zJO8hUdNzaUozH1gCjbc5iSJOOkaLTl4JgnLefgEjxArBHfc +++webYFHBOJreHn/GiAZnQ5G1hdURWlVd0iQl6PqcT9JnIZyYATV8z4JGv8FN9w8PTA7vuoHeUbm +fCclTSFvZUUkHq0aI6E9jbWqInN5uzhaYxWHXy/YNrYDcEfrv1JhxRS7Jhm7Q0XAWgrnAIN+WLre +F7NEGDT3ayf1zs71HAc7NgjBs9Jys4Y0X1G5GJqlqEA5qRBTr3mqHpwqFU33bq6N6Yd2U0Cu8IS2 +v74Ri0hx1pg2x0pPmJ7eZVUSSKQskBTJNKlCKK8syYGEBw3alLv1eig7OJdRPa/eM3BCWyccACR2 +F49WuzOQGs/q8XdGTIoBE/hu2Op9wMTOpuczxmvSpW9CPnr0S0sOvkgFhffefxxLospOdTE08INV +XzC4O1/cJ6fL1DyH54JgF20DPK5hssQW7WblxpTRuVlXsQlk1ebYod/14b0S7tg61mfWPL6h8pTi +MO1GYAd3c3aO35NY5O1vOtFnU4t2uvR5M6cuZCReJ5EVEuH392IlX0qR5F3r02UrB3MCGi8tcSxt +z0sT+Z3SOQttmw8MJp+dCtUCknYyzkI5LleYkqLFTSQRM7KQu8jArxz0lWtsmyT0Zogx9e1N8HPJ +dlLWECwhn2smEZlPdgc26fGiu+zRN/daF5SYMOOukwrS6pbfQDtfLZIUS9hZtFhVVzFUxJ9m61vA +Y0PYt+KknlYJ0aq3/rp5Ars9PfeXxWnbH+0AZly5Y/QLViusRil/Yq+/qtNpxT6hVV109h01WBi8 +WTFLCD7gHNreow+KG44mdB/8XhtH3suwJznVX+lV8L7DfNT5Tx8jGairhEDVaO5B31mVP98TnFwF +x2A0dIBiSfhdtsLMby2TbJbi2isQpXjI7gOxfkQem3toaApJE4JvEIGxGM0F9bpBCeERGptMX1eX +WsJEUPvPeBmH2eLtQc7+Xvu/w1xiRloE6bu+N30b4RjwAUZSk2O6vhNoM12fnYR2uHSiD1QlQdrE +JdhBRz/7hx4o3cdKxj7EhFV/euaxToydrk5ejsOoFB80dY85Hd1s+zCueEEX/dkvZYafOax7fENS +WBeuYSPCMhDSYMu5vE/2dq0V+pvGETXMaenNLlGmfL21puB2repGyyCyKLe8mRhQAfajqpOYYQTR +Kr3w3+GKOGEei+e/8KdefyZBiLDYyAW2dUwLlkXeX7eZxWd8lE1iWBRGFu9r5/D6A64QEzh3byEV +FUAUHlYC0LGFkYCVmfJ3kKKZnxPoP53irMr/EnouhX9zNYahtQws0Z12hGRdHiwzZL1Ejdl6IJoK +xv80x5KFJnTQdOETmiAVC6Zde06lIqP2JyDRk/t15a0gN5sFb9FqU/gq1a4soWbrC/s+2Z5hnDnI +bnDIUwXtPmHiWpaF94d2aX8xSeqCOlNvc1kkmMXbl8JeBw0tNQWNa/OHR9CMZEC+D9QgVfSZe6Lm +/RJSJOEdLAYCvttuYIf50MwVNvQulrdbid3pvs3/BxRFdwgv7r8vgFoRazd6ZuVxc8f6KLwF0ZtN +ci75MLaEcj0O1uqWGULjgxs6TNGzrUwP046ecDxkM+8jhCLq4mL9+x5qibAV3kLElTEdCtzOu9zd +KylH9j1lncJXGh8Ng2M+a8SFrp1yQ48uhONcIitne4pWMNnqXDG6QR/iWP+AcN4IaqMeTruY86Jp +nFL19kCF3qdVNFkHmxakQF5lBExaNTwK5N57z0U0XNIs10x19gezG2C6XptFHcO1GP8DSEoIckZO +WR/L3AkQeSpfCgOZrUQoSvesc6NHyROOzlMMfWo3sjOfhNOkqj6t/oNNO+w7r9fR4sSQifOK993h +ivmgRS3qRksBk2oXbL2Qpl8OWTpnNxWh3EsWGpOGBvDH6dApG/hR3LKFCxM0gbFnBE/ld4nk3DnJ +RVar0vfjet5sWsYtadJiyJv2w5gEUkixjuA2kmu362v6VZiY0qfmgf0EGLlA5fxBqEk8bYaeERZM +xtlIgoUJvHMF83I6pfT4YinNModjhPUMJZ9OY32c8qeeOgzHLZgmKmJvnfsUuVtwZDyTyvCUG+kG +vXMJ/+BiuzfBXGjNs7zFQvmbpHxFJImDnxDiDxzEs5PCklqszJ0SdWsoalPSwd68JCV9wXhUeFjk +L8tBodllEIF367PvyXMKCQKf1ptyHVq333UP8WoQ0oGzyiffGT9mP3DdQdptcBrnJl3W9e/GPEYL +MkCVUlq7OFKy+LG9sg3fcVTtG9UZT4YlF5xPvFddxMnnJtO8z02NScdMFu96pJQzE1FRPfsU6+Vb +ZcUp+OJM2FjROcWnJbEjyPfXpVkOS7eShZqb9ZP6+YNl6JQ8t/+Aj/G3kX4/khdlRIYfgCMDL6SC +Blsu5IKwJPFWewfuRIyIJXNj6ZQEchevRt5qtiL4QHNwYQn0vArSoE2m/2qbB/hwBottMOB+RpZT +VNg33KLvwJsfCRCQbM+BSV840xaPANhosiQ0+Ip04mZ3HlyRJC7I99F4kJV2PgYkesEhfQkwrPD9 +W0bPihYdCUDWYk3jS8QZfYM/12oJz9M//a0hm5xY9h0P+ZGvUYeh+kA3p2L2AQjsRAd/nfvmKOQH +D1Yeo5gZmyJWfrdQ8owUJ4tSqh5MxOy4Tzk1XmO+97o5fnVR7zEW+iSpn6+xdX1txGBc/cudhF/q +iasq4pS1HZzwSIe7YOqOoIifsT7y4KVRPrD+9HJc7m6FoZ0QCLQ5+ydo+YPMK6tNwlQXOyXtIZfZ +x7A1d29+hX52TFKpH1U53Ec9FDKnm1LGhReD1B+T4IBRfZDeD1KgedOiTA/mSMfxJ0NApLRJIl9Z +4Dtnd8JLhHNTMK72eDRNuBznUWOLU1NI94XNrL05oR1xZUo9WzpY3Ay08qiyw/i8uVWw7XyPoarM +YF1ANjNFaCbNz91o5fwVYK3agld25a/lLAFdULZ3fipXR86TPZZBFQGPlspPJCLuYVXN/qxts6CK +w1s9sTGTza2t+EVYtuCONwEdx4wDwTjHuymmXiAto6DOT7wsH33g/WCw7IgWoPWMVoDXw6cj/PRE +qLYBefSUU/VA43xBrA0oNdUhWhhtZipONvSSTMRooxERiZog1Up9cQehxcDcNUEWkvmfYKBlwiZy +Ti1uKoXzCNdgBSZlNp6jnsgLI7W4V9m0DFcRvATGtAaVkrb4PLZxevT0LqaXIZQplSpLlfnFIKbW +iqxR8nutdw7A4cWV84/I1riWC6ed6cMm7KWP285+FMbbeySZE1jg4PkWQryeE8ZVuG1QS4fS+QH7 +GuguyAP7+zMwCj6szI6Hd7RSXHihl1TIja7KxMin1m7aiPK+zHiv2HKCTHYA42jOwGV8ld044SdR +8z2aJGDg1pMeU1lwr6sfbMqUIQIUHGq8fxLSmcQoghpgCYVQYlWxiaykYgZlnrulX07LxOAcIEVC +ADDINI8IUPw7sWpnl/nN1yGuHgN7Rarim1zdFrllK31Tz5q5WO6HKIu1Lx33xhfA//JvLmkkkafX +s+1Z8NerCxPsMV7O24/5kkSNLNx85/SSz2/6eMlDXmaUNkWTi4KILRxC3Puezod3qKlBYgICi+8g +bcumRLTSo8BWSAguEp0Gy2q5qoEN2UxKIWglmAYLNYvoYmc2zE8bjJg0m0Y2rNkQP8jnkHiROKyc +bBsLS8MEleWxev8Fqg+kiVC8+jGSeu3gPsQxgHOZuUoDhp8CBOS3zCPY7FID4Vzl1JYwDVHmgp+G +pq/k7qpbsEAqk1WINqO2xfOzn1o1+rn5YFo54ISYIoAR4qLCfAJoHDW5CDfmgj3+nxuAZsPneCU8 +2FtTamfDLYByLgU5GibwmxtYDQcd+OvgozglpXFqIRVeYfbWv8/NajnXWzenjxioHaP8RiAHnJlW +rbmTBqlQl6/udskxePtpNR6x6ksunPIoCkxEbmuqD1EsLX/e5suTwlMu14FeiSWWHQTsYhPgVVo5 +seEk5G8bQiqqayJAaTVdEm1kQwi3HOa5xt51E47PpPYEh93d33Ct7DKlFEIkVNAixt7cgSgSGJVZ +ltCTaSM4+JQ7oKXME5uO4xZxT2JwV++R5bR4izyXrPhsFvwdNVY0vqrihsiWTA6I7NAqNWIEYPys +MauGfLPjS/19FKPL4AzQRBhAZ5uyAWUkO1I9I/HYJp+9RG6iGHMfKQ01A9JQVXMLP6YyIwDs89h6 +8SR8aITmkWmeNmX3MMw8BoVKs8NrPgECIfBaCeKBAZhW3ENVzr+39xq9KdyZ4kwA+/nEddhuohsl +IFQ33411PwEwLY6sfg7uNuN4S2WOsy2t+BhlmLApoOoB2yARD2yrB/DZwVost8fgh7CovJwo7uoQ +U1ayf6+MXxOZqhxjvonuWjPBfdT6LL+N6aEb5W93lhijPa2mjKBg1yT/Hlku/sSRzN6Aj0SVGsda +PPeHZAMz3lPT1SN8mT/+kiGNDv0iFbJlDxOwpyhBw4M/Js9ud9Zorapy8ZMHMlEoFmb9gsz39dFN +n3DvDsA+cYiCFjlmWDYrUTxq6X1LGCa55GPBGZQvNqHSuLS7j8HOyWGsLZCdegaKyuwdaEQXZ9IX +h69NbURwrKwh0OffVgq5e34Klpq8K8AGOynf3vm6a9mAxGxO1XzG+Xkp29S09DxVb/g3gGhoQUb7 +ntlNAXB+x18yT8qJYL8hkZ7VtGGU6/C9v01xk2/0f0yNxqZAEMWrlphiz1ZiAsvniVrmeqKrCbg8 +O1ACpIAJeF3DpWG9slGa7KgY5X6blGeDmxvRevPQocDwI/e4mnQLkB3hC+NVULTcHMi4N90lx8uO +bFDcH3PWse0BmQyen20ifYdU78rIYTROkM+SLe5FL4G/sUn4RPxWB+1BZKtvvtXXdxuwAIAUmrpg +b26Iq6y8GK2A8pnO9c/uEgNwhj6K4rMKGVmIo2uhiLpmWc51EkM+2dF+vU51DWzmKxqGeQZQvv1d +sZ8mIk24RZKcRj5vcELDHyVDkkApR6SyEszJ9Lsgmtizw199pre2lE2Ql45B5CkLQ4q4nCVJ2alA +in2z7sUZlFHWfzLkDSV0aTaQX2Qo6zKIBcu1bS0cwLo4ECo3yvpVp9kb0/8YLsbYfFm4ztuhn0J6 +OeuwXDuO1GBgOCLbCrKJ/aDMSVY197LDzZynfTDTsKOW3IGLihBYe22OE6clawpRYBZOBxlFr8JU +ahwIk7fFed91oE82MgWY1OwYTWdUq6eQb+ttH7vf2FyGqaaX+zz+6DGIXPymwWhrMq03UBTMrg1A +JUQQD6ZN7+ZC9geEU6L5B+tCEN77YdeDZUXTq7DNUh4kn6SAV9cmSnhXz7FovHVR/7CwkZI3Dwle +08wJfWfHg4x4NPRiDHeOJLZFe4f4woIx7DXc6+wog3gGj0ZGiVrOV0fD9Z7RrrOjrKATtzbJnVIp +Hg0s6E9OEtTtkDhy48AymENYPj9c1vlrs98prjAFqzs/I003wt7atGRq02zJt8veYajqS94dNwwu +AK+xpuzlq3cROmUm1J3lblr/xS5I1/v5N2JX63EJYo+50ehHwkQZWTN7mXDYJMdqFC2j+yUJOr0z +AOcam8J7AuLra5Ch2zDYli0sMJ0QSHOfuE3zpQhtOpN/eocCV9zCHAqP4E0ZhtXhtrj6DOR3nQQI +iOysEdk6yRw2V6c7qzNgfPotR//pEz+9MP1nq5pQdIl7WJHwSGDBbpxz+svoHOg0Adlq8RKRpXlG +NIWZjKSdnBja9E0prZ4Tgy2WkWvu7Q1fRjdyB1PX+ua62FjCXIXHluSVf4nkjopXAGm9CmUsnW9E +1cwyPr4vYQz9elDDAroeI0tVyWlfOQnzRoaVvQMoI6rhaCsdkrPQDgmFpI+I29P8Cmb9tFD/oKN/ +ko3dK0Pqy5VUHHhelFLuR/aVbEeY3hjoyZSSFZbxxF51JoKz8/FnIWlUBATIZ44H63tXjNfHKT79 +uHCGSeiAHPLXM3Ld1vp+AtHiD5UesaWvoHnhs1O3ouT8eTmSVH7r7kEFbRYIGBjGhOfto9J1rKlx +IzAJS53/2TKMBLM+Iy3AXPBkOkM5j7LC0OVh5OCMczbImqUHL6PvRKFvvRDQXCbITE0Dh1q9jYzG +IEdwsXxNHiwitPI9XZSY1mPRgOzcNuejh+j928osG7R6H6iEwoSkBUUYKH9XIp921rcbw1MtgG/o +cpIt/TIy68SiGl+b5Eh1S2K+uU9ImbWHFq4yzXv5TL7iFW9jFRNJNYHYGlhY7pAcQsn88C8NQijw +ju3FL6Da8sBHO89SRztKaWNzMgcXsuKXX3h23JYmDTv8uLScWYVOWCHYOcLQ6ePw0Yy7WNvOwajq +vMznF+zcE+2CPq1pZZWtt9Nz3MTrOjo2XOOfPmqytcTY67RrhdTG56o5z+X5UuuFv6DmkGmPDFGp +MMJcy1GgWy30Cpb8Y1avwGnXjmGVmyBOoAB0+qfNFahqv+MpBgYMywCwb20dZJknVXgFaQz6nZJu +ekMaWFaXQQ9SpDQ3W6Dggja1MhLvcvW9nRkREWWHooON3jdKsaFEM4AiVFNJrwIZSevx7aGbakRo +RdKDTbfNaCgFzBzXX2ax/GkL8wx5k8qW9lap7TXkrXdy90DCKpOnv9DdxkLcnejpHnqHKhYjvdxH +wU4w2a4IEutIBNXm5mnNCU3wuWrmUpAiP97VCPjmJYyT2XIVa3IQIU+STZecEy4zhOMmlXSwUCoO +vhJX+O0Bq1RSRGyVHnBKAq2dtxJTjaBiJpTnCoYMGz8EoaTYpbdwLY8VmUMCvvs6PlKImBYAnNiK +SVKF4hPXLBluALAz88pbXX0Y3hoKl5s+ts9DEWGJrdTvEiUjUHRkQbvb/Bzp495k8x/L81IgOjdW +ZVA7lTT8y6RLnSKjjKcZF/p2Cfl97i4xUUfXwcNdPBxZpdHTxaqgbK63+Dr4fN5nZVNV8xCIo54F +j2ejhAhqejC3X+CLp8xQco4tdtz04YCpu1yIl3GkDTCdGH6cOeNaeK6PzOaCgswZGG20Ret55Pxv +twR1MZcxaMPHthkJdcEcqxr8SLk0MaEDY9L8teGfqQDp76ZlM5l6FQaBlLq82fRUT+Sz3vXWDoy+ +TDNnGsZhSq9kX2SneeShJi8+LbSKGHqVePpd/Yg6R9LpLg9B6arTU0uQ0n7YAfPtEmaJ53na3hw2 +B1P3bcy9Gg1qEvChESBdJpbxDYzUfvx/gwinev13LEglhTJRYIC8kZuabjkyUUcxA5DEm4i5yFlk +sgblzFED10POk+t/l/fxxyPu6E054OST31ahitezCW041CQrMf0fx3k7vpZj4934zgrFF02uZ6b8 +jii+RRPhxCqNKjuk4Q45Whk3urJXOJvjvFEpgfAznRGPupD8L9WkrayR6nXs2mOopsrFjw6hqtft +mbvIQR41W4dATbp8EjJ8dnrz+j59WOLu8F7uL/W0QI//47lrXwJ8j96BHuLO9soorMakoumtgtOz +aAP6wsJgZhDZ8D0iOaW/hEUIwVZb7SuiXn0tQXqj2SbiB3Bj9ltzChBBbR+iilKVdUWKAisDFXUL +WZ8lEO+YspCbUOHpkAt6xfj7GWGmhq9bjFzpHj+djjz/w5R3/4XKFRjX5Q0CTWLzzSBH8977KrTG +5kZaPRqNPgOxJ5b5Qvs5Tl8R0zEj7nsRlkNHuWa1FTXYvIaQyOlnIeCe2FKI7+h0XoUDmVo0kFI7 +S54afe8yQuIfuC2SjEzUysg4oaA8ohZJ7aJWKWTJUdS+kCpqMBa8pRAjK4HEVW/Tygf3CF+TvcdF +CMwAqgR+OBQkcuhAWozK+rjRF61EXrMrDw28P4dhU7ImBRyuvFdL9F4qzhNi63kuNrQgx1yXXDXA +Gy+XJeMOS+3GkwehdjS94hpbZ+qPZ0A/0j/AB53qJgNVHcyB3wOQ++QtbU2LvHIrUBD4hnxxzlzR +dN8kzci6kF4GtBqEJPyBcg8Cp2sTx2MiIG3mwT8X9hDbKSqJZ2rMrXFk5CseObHzJkM0w4E68SUg +1rPo+5WRI9uTpGqacgM0REk55kBx3zvmMoOp4XPaRzYo2U9mUX0sxexOXuOAkeWOCik3RGn1BqZZ +dXQwjQiK/vCXVp343lp6WrHsCEkW2Y+U/HfToy/vqVATFUqX+BNXuOP7AVjrT9QFfXl+eyOmUhF5 +MJqD/NZKFB2Nv9EY6jTq5v9WGERYsa9lG+M+oV6UZ27YBJvWellpHfV6VY8I/wP++7ELM74pH7Np +IvXcezFbEVqcGQy4hMGE3VTsxB2k60O2GDRWSEd44rtSetG3KJgBIUxiPRSIcPBXqsIsUGQdYRyO +uGesoFv/tpc61+87kFK5Q00QR+9HS2QBzk0nS4UEPlOZXbAcJFdG5ts1lnGpvDnDF/rnLLC2PdOh +tOs3u9ZBb+ZaoBNX8ZRyRtw0tIR7Zsw6iu9gTGyhSW0WjdE4kBEFHRce8MVez86AtN/Dow38+INh +FMB/TMwo/6GV8ytD35+huyIynzDk9jlwepSVlI5RE/dnvWY0/s+HSiJBdqDEuTbq07pD/KwfEgvu +GTR81TS/czOBgGIrD5oLmQ0futNry4nwCU7LkZ6uaMZY8t7ZkfteUCgFM/vlkDhroVWL+pYmeOJn +eF6PyqN86PMjevRfVy2l2icIO0NNo+GwYbWiXveuSiTT/imOYuq90jsQKP5jGPGT//56Yxf90DED +wc7dRufLFc3Ihm01lk3ceaJClXRm2Nhu1GrbO1pUARJ8q+fruaDzf2pEgro+vOzIyTI0FZNATPUw +scCiEWj8dQSjYQYsLOVdX5GV+5ZWrjPY0DrhrB4I8qHixp0MC6av1J81TUkNv65qUM9bAIf9k2O1 +VnnEQFoRI5Zl/j3Dxq3s+//kkzZosigUcUbf/WesVm0LrB1CkhH+ZgoHQYz0in1FQZkK8DSfbEBo +izzCsvr3pI1zeZ+t7ySerQT5xaS681ukguvq0rPVSD0ERYdWtH5Jf6Pr59vS8BPik2yLpPdIMPU/ +x1SnOA7YNFO1HsdZjPagX2ccg2nNZY+sLhoP75S/j+wtvRBG3yUtenZWOpHXKLtZcGjaYDrUx6Nh +d8exPV/SP9vB3hW2UFJAIUgXmtb9J+7SNWCL6uOQtrPHINgLZCWvAHi8hzl3tULFht2+Hi1IbFvj +5nGWH/UTrqfwi8LR6P70xOWlmI74EAqJ4PgWJvkrkfqaWLWuDzD0uMYMWx7DaA6ScWwa33BQjryA +H/IWGLBEjlirkZjGF62nt9Rh6plO+WSiyWkzp5c50QK3Rhbp7Uhzf4FESKICMItD+hTSkALUMSwx +mUXdxGV7lkkG4L9Kdr+0DLLPvFeDjqRWz06hAew9dr4xeFraFfk0btVIw+40HCoBIHKMtuzhpwae +ZQLesNk2gAsICt/w3zniFgd+l/gZSFHiJvNz/vVO9BicZAPhgPeUTYvv1qWjxfItoYe32+yyFwak +Gd0zZsdTQBlhSfKJQUS0BJFRfFoQXtwXreleNbeyaLrn4VXrJBkGQsMfabogEu4u7/4gB6TmEuk9 +UGv6eydsEyisJKFTbUJJdlVfOWK+QpQzERXFPGskvYlRFNYyctotYWsSypo/nGCqeSnEpo7ZM1vk +w9UKJddxIHVAuEvRyKXpdYXvbHMjDCqvquj28W1QzOou6fmUSnV1NSeTDp7Ga7o/igsjvl66MP09 +T0QokCq+1AwuHgRBR23V7E4yqeCPy60IzmS/VCVqC2YkMO+gTU15by/feIqwqimb/oMPOGmA2e16 +7m4XLtoeKhGxez/s/yO66JNgWg7VrKNuNFE77zrswPgH/uD8QafW6ze65RxjvNoJq/SZhmyLtF8n +lU9rgROi5rrvVZqXj/cCIDgWLrik6KoJBj5lAnAQxAmEGjaXNXz2CGyxhgCA2NS3vl7F741HXqrt +pSJq+DJlPbU5LQvJr9PeAP2CPE8jr7rCfeNyVQGiPm9PIVKnemrH8iA6juTGm6sOlVlmEoGLbP3V +QUb9dcn0JE5Bgex0tNl0FHGBO53n9Xu0RdcXgc982HkH3dKfaz+bIsxuCe+DP6yUHkB3lnyXTviq +/v7Q9KGDEZ75yKS6RT5B5GWBl5gSwZnimOrb/CAhHi41vnz0GYspq/t6xKWUoZbwZupqw4DLNOZS +bw7jVOZaF7X0o6wFqy1K2L/YPE1mHJopOu/yfrO0nKyS/9y4VHVU9jXfsqF7dbud07kfgkY29Yp3 +wFMxtN5AiPWg2+rD77rrl1VxVm/fj48b0ciS6HDLTW31DIK3CP6xfAfWgBnz+pglqNhF1DFmtc0v +poiigqWBL3KnCU++Pvtceik+j29ebNY/qlFVxSVP19BMpiaWKW+mSmwKisPmf2ShPKgGKSKfw5vV +kGL+/VTLmY9shJ6u2f9SYBtL/JK3drfR1bMV6RdteW5cMjzKAw2vJjuLgbX9h+fl1efBUSjgCHen +lg+4eYdMUCXALb7579afyFI6+ny6p9HunWIGkvguA4Rgp2DiKv/y97RBbGeMPfFisSCQpAPX5Boa +WLaGsss6HEXkDrCN7I91+AdCJKJaVfRYwTciyzZuhUmbQ1r0fjE5DMDEAT6n92DeLhOFV9x1uYqK +UJWB/4r5eqJuW5vhEqUgugcyyG9nJsW/SOKdX35M1skubhhwU8i6GJTpC0KreYsabGpafR2AdEw8 +lglJAH65AJV1TOolx2OUBnWzmknU1GZEsdDqlL/m9b0L4XXjLGG/sXqz/47DEOgvAdrY3SDtzbjk +oBrL7kAW4TUWX7m9+/2HnYGnuYfm+sD/qw1AIxchbsoKCUOrw55Pp3CceasxVpmOLKRr4kJvtSeq +h18QS4vpHMZEWOxEzX9UvohpovpKB8BHoqzDRLv4H9hjsKFyAeUj/KPa5uxpVl833oT0idsWBENz +LTSY0PHwShEIUz2VidKCvzF2sePpX1DqoVFKY3Sh2aiNUcyC4p6z7NmjoVbZurpwdX0N66MHy1H2 +VK6XbuxAW9x1mpbyt/hVV54BxTpohA0u//RsAJE9czSWIh4R6O5Z/QVSOj6koWshjZ4ZKhqQ7rOc +ABSEvvS8sIAFkI6JCOMi/iZOb0kQY3VX2zU1GIoP6NPfn47C4fHAzlKI15u0LG02Pkd631RAGxy6 +bbOe2IsWOHG+tOYUNIcDQIMrLPXq3Kbc1gNNrnJ7nN33WYuKoLfq6XnRUlZr3y9RsTVkyDex/niw +LfESGfm2AAGekmM/PRVUZ3tUrgslNateVM9EP+74xWpWS7n4pYSH1yg3hVi/YkSdcA+wvWjMPbrO +eCLksTV2oOc+VuA9iHzgZbNHMkOa2V7QXrZpp1oGyOVdWl4BPJVGOsyeSMYWvAUn1lsRC7ZY9HYN +/zwwg25xfwC09DnFiSYJTQmZiL9cLCEvyd5VNsOXWI4c0boIFQNmPt3sBL6LblU+e3jE3Nl2NSOw +qsDNmrYLIq43vVylD47MLdCW/PWWi2u7PdC+YxQaZlVAYzDIVD6lP/v0nImWZDSXQ2h3WX0vl0RP +ZbmJN5xKqHkbihgBQL5o047vQLF1VjFUlgh0jGvpH7Bn9bfZRVE5CYxxUdU59gs6Xa4qLEPVDFl8 +80M/HvoLGs5QuY73PAMlEB2c5pQjp/QoJBd4O2diRkOjHdGr8VLcF1qc3y9TBFEEXGD8xMAQXId9 +dCU/NdGTh2y4fSJzUqkVgSA7xpqlXy/I9A2pm62yWFUYButkEJR3PwNliQdfRYVrvFtgWhYZ+1FJ +ojk4gSn+iow/rpPPUUIyRaA+oc45y4CUMMXZIVRIZH5y6aFPZJIg6lV9ALtIN77WIId5VDyKUnkd +8Xn9AH7GEgtE+8D5HwfSjsCozsE6Tf39GmLb93srHcm8D9RrEKNDRTIX79glzVRY69k3oL9oKUKa +M4KBWcklgu8U7L+ndWdrPxtLNFfgkv7LjDgk92gOzV8KvdOx56Pnc3q1Z6s97dWg1cd38sgaEUd7 +/XIeDPDn2Sg8cmciWGbSTPbf6FyVwJDlaDKMExDCfZWPiXr/nM0SGgYkZcPgLzHrpkIPNm6zSRWs +a5u88pO+KmyOMrUdTBuK8BZNcC5E93y1tF1FH4poCAhmKk23SoqSqYxAFiF+wqMZewSYtQ+fo0HJ +ZxEpgaizkQJlKeMJPrdSFh8l8Idq7BLgswWs740vs99Om+y2yO6U4NbppcLi3zio/iAtop7FXLh+ +HycDilZBjmQv4FDWvYR5Fyb9CPVR//ejQwMCHj5nBYZ5KDqK72bo/BePOUw7SsAhsYz0JvPoVxBF +9aOatj+Fwyz1X627MU/JsgBUk03n9AkvuqVBkEBeP3LIIhKm3WJvbuE1l9pm4F2eRNayQHHBOJvv +WRC8xjWw6vs4/JmmWNd+Ye4kiGxc0qGezEB2RzbLhx/TOp6kjE20JGJozUJLitewETiFopQrUA9P +tgOCKxnw8CLnsSNQxt797QDnc7EdPsntN5bKxjiSn8PEgugd/JGTAPCvVNh6cl/Y2zleqpDhUJft +jglbvZNY18P+AI5g6S9cEnZcSWsp1pU+ZX8rJwo2kL6BytBH4c68d7vYQTlBn2m+25EfMSyDmm4n +zrVgTKhmE4Ri3mzCW9aNmwbBB/t6UsESFbJmlQuX+jN1JWRoMB8VaanmMlxl317f9v3xRKGfa29S +TH+zA3pcwUA7NBT4v+GagK4Tscu4sPcFndsJfTMBZ2Q2xOQtl1eLD3JK01CcI8L+ArmRFzZiK1wb +2tpgp55/w5fAiIEUKZqShHIXvHwZ4bqGBisc3/ft4fE9re+trGAT1S+nOWpaGtg1i4IBqKoHz/Bu +OY7Yy7k2aGrQq3Pe2IizUlQUjG3edE0H3VSGdtAJpJ2T+no1+7vKvWnovdyCio4TtHyHD5Y8Iuf4 +NpDuvRkr8n9osseCJc80UNJCd/ekJcLiv4EcM/CBdXDZJo8Kxd5QUw/k94CdDlgI2wwmw2wo29/+ +6s3m+X3UAVKpyvd5sRRKKKE7lsyW1ltIf5cFG2ZfZ8EptANoAEiJ+59XwA25hOlGcIbN3DyszNFD +5s8uhX5+aDqIxgrrrd09mviLsohYlMa0al900aWTxT4CXji0aJxkrrPCLV5/+4msiLk/ytNBa9HC +SxDOziqYaNcPCTpGT3r9I7eu2Up5J6GW0tRbHOkObTfTAsW1CSD3YQ3pnTcjNToLcG6WyTwxw2V/ +32DNuAZCTEN09LFVya0n7Opf2qw0C5fI9bIYSFGjMTaSGCf7Yt3W7aiMtZavlxfiHcfm9ZCJZQkS +Ahwy+zevK9sX3vphVPtZmp5kEDuHj/A0KotgNon1M3ZA8fwwgRUhx+yuFim4yte6gOCe4KCtvl07 +q7gEw4ZEMPcgYt2aLN6KKQ+ub6cSTikjgEUI54K3kezfwO8PB49Y+4KawbPlSNSRJpColChIJlu5 +BcVS13VT4l7e8gEMnqpAgApcFjjcr220AVPnU9ViUmiRBOK9KIrTsSBQyhwAdNJ+dcjFwp8GpQhu +DF/M748CGMJvyM5aX+8LSYltv+ODrFt/oGFvj0TIbBrRmD+Olne0j+vHp2GCFuhnmw0zIIV59mdW +SQ+ZfBBcim38rZnnHSwljt3IQ1MN5aNl9ZZ52BNYqzYTLH+rlv650ZVYxiRuRLzAIp2Mtucp+dCx +roy76ZpneohS2NvsoLjRnnT7WXbPHy0QniLcbYO9jD6lsOxltzoEqZU2Nhp8xB1Ha8WqD7C+rT5Z +ZbSCqF3FYVlNZ8cDuOwxpfvRAIS/967Uly7rpUPqyhgH2FmUMSV0p0K5sK/m5lq5i9teEGgf20la +1eI34OiO3Z7GajmJ4CtuQCM3hLKKYCE1Y0zrHu6fEn7Ql6uVwP2yskT2sSONXNCt15P6ueKBmpRc +Gcei/mnh2mAe47oCgpJ6PQoCq3YvcekNconQv/QNSj4LHzE6AAcQI9z8JzY5736w4cRw1oPVE5nq +17CLhTMBk7KofWlpWBuvvNTpYU6CFAFElKQU+OKAEtGPEPkiripPVT6bHQEgsYdqCZ6XIYpEy8eR +txyn9hRw6pLkae7F3JvFUQhYz3loTXGKuwiSYtJKimw+r56p5S4tf8N6MIe28Hxf8a5z8lk+TV+O +GWnfPUzdHxejhaWtO6pPadw16lXPKWC/Fom2xEzk3wjfqIMTti4X2mf0Smo1RKpJiMirUrYM8HG5 +xYh5ZJ/WzSi9P5uEo8DYJh0Xlx1Bhg2CZO8y9Kx2QbaP8gmT8W4xp0iRdiqu3B71W1vbyTYOXxGT +VLG/x9hGq/mq55tDqhuGNEuVdokHTfkzZC6NMAdynhd2uP4c9b/8QmYgbWg9rzqZGjKMQFbZfvjl +BBOh107y9n7hZ/FXE/GWgS7jNNgDSvQS9fupKAubmR30QFXnkXrW/9ShFT2rdJ55puOwICzuOvfH +nYb0oUCf7znTvoKYwEPnMu0ON5DD44uubrODNQDq3SuCJVfH7m67MVXVkJ4pZrzOrhlzn/TRzZl2 +qUbGCID0XNSenKkxwiMAPxnUerFC4Pc8bryuoMT5vrySikXUhJxdamb1K9oHAx8x0GNAHGKCs57T +i7AlpjjPMKZGITnfBn4KI115fqPqrzB0c7aPX3hXKgZr8tAVcnhLELQiQQUu+De7IofDD/EX2rZS +ciJFX47tyvbGFgQDW/BveEIzsWm+8yxtcOubofEvPLPrHgV8YnKrOfd7nBPrpeD8SGqMSZtjwdxD +oQQ1ixmMEWZPQlXERPyI9SvtzkylF4RmF/o0OWHBhmPaU82cswtCijCxWOq3Vgc8BEVRC8vE3psY +DOXDq5EEYrlTcF69ox/+hbAt/ysldLElReCzGOwH+Iv7fUTXOgcDFNaGHQfqgy6X8bpHW7f+7JRm +SgLBz0EJunrQSPDK1jJur5ejrluqoIAvEewvOYKqyq+4tYNMF6BMBNC2j9DLPqobAQCYrMMuiHRL +Oj/B8IxbNLKXlQHNFK2HP5OblCfiyta4d4Snew5D4YrOiRV6Z72hHFZYa1Gml3ojp4tPpQ9oVNvV +SDBZvEKqERKbv+92z+r+C+Bq1z/OaB8rP3GQOi117gXsDSKxb/lK8KmG4xCmn7aUqdVhwMr9VR4D +sQ6/89pxpYAJZKrR+7VwBi0+uRbatZp5jJRAlntfQSqkrrh6MwdnJRLYITImsm2aBxr5hqSV0JE3 +1AQhPy9lyltgi/egWCwEbkJK1cbmy5ZeITgLyO7W4eGY56QYNgsRZHjdEoXeydxYpuEQNXfAf7ey +X9mQCjDouyLPMUg+40+GTnHR6PhXfxjxG++933Dhh0kabrlTYoPXVg2nmQvYi4QfzQakv47YHhhO +5xK2OPCAlqdZCXEjG5qYWr0DyxO7wpFk5VFh70iXulq8kSM64/bFGyPAK0N5VjjaiBNAPBdWadII +AfTp6YKmew8OyUrG6vM66zW81DUGqOJSZ4jtrjNcO7FOYMWGo0o+yIYvt2x7G8B97ps7trD32I3O +BJk2ruCWHKL3eDbN4Z0F8oaht9PzTPvjjzmGSA74zl+E/mmqYN2wkA+ESzqV6QAszTFdDdrHLNU1 +kROHcjfo0MMkKgwQ0Y/nStXkmW7Jy8I0tVzjjHQF6AXkVdJWXVNxSKzhx2VSmGtsDpw1w9Qj9+OW +27b8858PBExPFmshM3KpxVJIUnFcCaQ+jin7W5HCF4C9yvWj7rrNf7xdmK+g1KgPXFL6WPg2M6CD +CZbGgJb53bsLv0RXDnPmEtJ4M7B0a2DnRRKEKnQoqr5f/nIHauYYtN0YQyuTETX2SHXXi/aVh6gG +9og+gtt4x3ZPgJMiFuIuB30jssXdWJBAVIY9GlQzYtvhTvHi2+hcvtHMeCAfoEE3CEf+lEVaRe4H +mqvnnbSHmHpPaSHKqHE/Vf1XoaCcE3TZtFer76XyqC++EZvPyqDAiadEN6I67EM9EybmwTp8RuPd +zrAB9kaXS1yGTW7daUW4BbPzHOPmmBA7tTDEzKIfY1pMn/JJGO1mQ8CIqqMKyyFHbrgBulQOW8Mw +AWXfenVXEMePSjajv3QOqyVyRyj3YayCGezZdzoknvrV70nNX3+8hBbc9eOqfaLjgPmwDd3Vy1hr ++y6ceOklMYfrfAWInt7NzdDX1/pvMp/gsNB0VKxqHwlUQyGGQFeilaSbkNl/N53VqYi8+8ng71U+ +f/lTChs4IQC6UgfXEiW5/WnG4fqn+8MY14FxWEc8+oehGdD/hzoLwCpy+RZsZ7AJUfw6WrKvQAmB +NDvP0k9gCXK/wjQuUvNf83G6LJgaYAGXGO7ioX0krccv7NTBUfi5SXJjKtXA7+582D8vrGT+zmhb +kGizOlrijT56OY0kXCEy/KtCJPoiO9seO+bqBqFruOaKXvmmBYBtP4Uc7woexjohNXULNOohh62P +mx5iBsEE4RHzD+VYQFY96TyHW+WWjGxjFExu9hzB1DyGO8gDmVmP/uQRlFvB+IEi+KPKtoDXg8bk +axvoHigu9RTo4hb8XAl671jR9EcBc09JA6GRy/xmwBVHlbDPB/ijoDajDAIVq7Ww1Ih/XnYZrajU +1nIqzULG6Cl+TPhiUO0TcAbqsjzn0POxEkdP7QKvC6Sww6CpAx8YZqsW3E+q+ozWV3jXxYB+6i7M +t5DjUQYDl8y4UFpW9uCmGTlLgKnIw31v5a8OBxU48VdvuJvO8jfV4smBHMuw4YYRgm2WDvqPHk34 +/RRKhEFspNzdNCxGGFEBsF2LDQ6VHKnbQE2AsKjxpE9Hvst5xe2sh4NnikiIop5nQU23pyCWrO9c +reWQYTMlmGrmkHR1WSo3kPD8vSj1H1F2kZfL5d0kHJH8KZAc7IFeVdvqjjVjtoZzT702rcR29UnC +r4a8vFKgeassl2kZjyeqsukXMxf1fSs+KdIBSerKAnP8djKxJL/gecvXa4wG6cTYSLuOIJndp2Th +/aNoS4ZtqDicWD8btevTCyBuqpiO8V1MNdMIlD5cyXEsiudeBTlLqLMEfO4SqU/R8tx/Qx6ibHh3 +XXNLxz4AVkwMgQMlpeWOOtoyaN38OfjFYEyUuox10OfuicN9+rdVWxUUjJsxjJ+IqZQy63V8B41e +JKK+tSFNTnQ4SH5Tfhhup6/8X1Grufr2BV5Yl856hDpNrDZoDW4PWpe9NpdVqsKAPo+3hZY+tPH7 +bssth6mf2aUHuEWvauLmilCaG5OPWk2b3fieDgSkNV9Ora2fSJ2EI/weirclniQ68tUBOGneaWdG +wCAeepPKZbdSuyzBez4twrp/lyphe7Rsw/x/+vTlOND2rsmsxJ0eQeFJmKOIoywuWUwCeYLDCgWJ +xca081yWBfq9jqAsGwj0nDcz0qy5WTBWrZRQiTUWea65eAp5ppz0ZEvt1XNZndySe28mEBT/iSGf +lTiP38Q5KHN4zHiotMdwO/is1Raw4urF3Xy26fklDtrAM/6VLAE9m3t0QpO+qypFBfQiw8OcBGrA +rTeehWSTn8CauyBy/4Yt3GL719wriEFlijrbniVSLF0jITo91ixGPpPyVA5YloWJE73BThj96bCy +YN3Z+/5mqW5vNgpQKF+n4VsLN/8Xw4TTfXwjzfj2jAfsq2CM4dbrr7gQpl4sxcvTEkXmg7ZaG/Y7 +4wOV+RzvQPrARdaBx+D5+w1hsSmr24E7CC9aoQFvcdCQyxdvERPoLb2IDNGhPMLImL86L4oD9lFS +sb0c74fbGUdo8tKfqNpsj50rNcTD7BwzYDmEzyxZADlx9dWZusLYfGV+O/L1pC92VBfw+a8hq7GD +CSowjBlG3Kd3HaIPtq2RlSv4qCJvnW5qPnMFXbLLiQlGyFEvl86AcEuCxX4czkvRM+4M7zhrXl88 +Dz2ZAzaTmtJxUu6S0oSOg77b4TQ3vvqGnK7SoKNhj/9Oeib5hNITQuA57nRj58td4j0S2kW9ufB7 +J+aNo/Ju6IpvhgGVFwKa1a3sa3BwxU2Slnbc5SGLxyjQ9N2gs8g2tK45sBHaw6BHMFLnR02dH8Vg +FyKe4LYxiQDjbC2MwEcRCghUty4NAlZb7mi+f+oFB38sD4ifO63+qrzZWWqBw1Yg6ir8A9sMR00P +mBTfjr+YuPhv7ABv+LRL0NnydcGvQQ1ElTr9CrNwiNwd9tQiIb/b/AJjW5C442sbcZg21TYIgpi8 +LDcYqG5YrauQW/40dxiaxEDmWess4STGD9aY1MO3+q3Q/v2eLtytWVRE2H74mkvYw5NuiXh/hWPQ +Dg8mI0KrdgVE+52jv4ditIlCXRCLNzWMPJCckt4aoqYEOEt6f2+uzyZYe6opSbf9Ti28j6AENvFh +BUUcXC22umnLNAO3prgwTqLM9oAXFiJ+QmyD8eYeZgWTvLTd+3H325T52EfHVIHvuszsJC5MX4D1 +4vxSbOpLEen4IehVdwxlq/sZtZmqNOC+z4MdW9sHL0RZsERLx4dlCwqZf90WGXSQTvsjJyiOH/Ro +htkdGA2La9/1mPYFiDt7+1bLaZaJi+Mk9S0axxgEIaXJQXz05pt4Nh5yMTCbPYTonvttd/Zc2TkE +xv58JNhkj5bfcHPEG1KzJAbgkcB7WzESvjfVzfeeswORpEEAQT+pqOdByyHOR3GKkUtL3C1lzA+3 +401pwbS5bxbt7q2ecDTN3dxsm+pBEtnNChZFNSZuG/CG2SPc+kQdfm+bTedUEGSGdhm5UqU1HFMy +rr7QUP3OXIpyeiujmsUAYkcU5p4S0d/GVV6cFifYOpJ0Or8EYJ27H4OR81MMMoO8XkdXl5OxmMmB +Ih+4mUCwToVSfVf2gaFdiBOSdSHhMVVEoqGEjXHKlexMa1yN0s5NpTZDuJt9FAlhVMDbSwcY57G2 +XMBR5UnM6NwspmYSO3KVxltaSHbmfWRozfly8k5hVpVwR/+VRLlYGoiYh4KF65pkl6bS1zYNSuKN +X6lwKc9LTydf0YG+IQ9/yRkbKMzAU3HL4sU4FxSsDBDUjND5KVEo6LLAoFubAqymB1DFmE3m0epZ +I40UIsvD7GWgbp5y4KG97o6NS76kP41tOzU1rmxW//krXpoB/tAcUre1d32fsj1pWp4HtLl1SFs7 +7pQNICYmbtMKxwsHRArO1iUg4mIlydRWdzMQRoZywkVXiGpNfYHJLswftwqCxYw7Ty0ie9pL8UNO +xDuj3ktw6w8P28RnvNLVOOUXoGZxGJy+zHsDHfbzOGFtRP/sfRHrE8SAZB2Z86A06Iu/67mWK9/2 +bE2re0+Rzj1/g4voGJjNuQFZFoj0G+yc6yR9wmOXO5zbCkSAgagf7ZOesG+/LOd3vFxRufaMeypo +U/RDzKV8F4SAroxyGqKFeTsopcpUqyTekv2z404sjejpAVFw3YTlou75CUSt4AmkzyWZh4WiE1Wb +0NJCD7NTZvTi5GHdu8cVKldVL8tkjx4+QyBYLRyHOn5PXVcLW65xwhyUbWZEe521erklEErc0QmL +uguqnqpcY2M6TNNJJ+aTXlPSJzHpr6pD2hbJgVQ06lunSD1U1VxVPRrpWNtZzB2u96ZlILyTOnYa +KOzedVva2opv1MgWVLPTcbmgV9SvILGRBO2NY5SKHd4n4ZGkZhl15LdGhxXuZNMZXMDC/XSJgymA +pwj2ZNC1ZoyliSd+2qv9mTAfdHLio/OZaoDS2dE1YNpKIJYTLSBORugkOg+I9OTgRBZms1bJ/SKB +R7MKsiDPlydUjtPHJI8g1lSWk8SttrXJw+g9o6/xc7gNEXpNGQJzP2CTLHIHnMGI0IYLmS7tAtCk +X0AJNFOmFPX/paj3xZ08hORQb9Uzpfazsccw/Mo+nn2hM8PXCpIo3FQ8/h8GrG1UYlCuqCokHw8n +jCpBs7dPfGypl9isZoVO9E89+ENkxrOFjuYW5zPzaCnh5xoS4qpEQ0Ab3/jV6l2wzPxusqxd4geh +HCiAEDFRjSGCOeOvvTB8rtibhhTIEAX4LyREuI/AuyKyf3pWiTpC/SmYhxHC0IdOCMwzvJEBZ5Bp +dUaOpePvR0QtvWil5EodneJ38t2EUpX/2qsj8CKHyVrcrLa33GgVWl4VX8iy7n93Baov+s9vzYPl +cHPZXyIvT4Tekd9tfVseHSDq891tWnUiEkfAND96hHh2102VXA6m9mbYb0foV1T+vBUqlloKAB6Q +XFevhFU4H5tYOOL7bXoQFsPpWVanp9PMY/aVUJmEj9BdmH9aKHh/QSfq9SCX7lQqmolkx4fJrE50 +hBkzhGgyPvcMT1NlJAcL+Y8Xb0Dce3yCyM28fsEC7dNRoi7LM4L30F8TN+zB5jaCEIZ0ycLzT+OY +94cw8M/LHyKMYc6yPdgk3Bvdduda+fYzHerH0jDaZCWZLL/iNPRLuNyugs+SxaUDf1kF9JURzgR8 +wOv4a96Y69gJBz6Dy9pZgafZuk/taBTHeHSV9iprNTKblT4hN/PxZFT8GOT0TOkTGZyxtB3RiVXo +VvhXhdr+A/nacu0l+lS7cIo8sHqFW9eHJtme3u4IxLosu1JHSO9vY3f18Itp/DIX5l4CTlumZ/Cx +xLCV0iFWzqMZ+w9mGgTR/AOYhhBOa+2QXG6KWGxi2NDajXiZ7SluiIVvdzg5Osp1WqqhF1VfhXlz +FtQTZUtgtpLxcpC2KxO3rCWrOSdkiCJ4GQWFDPjjYO6x+pNm18ssoMCy14QKNr+H2IdbbdtJLgBU +MSF1UF+BXUSPOs5ZmuZSyTa8an/nheCCqCku8g7bsEOz2CQ0DzhkTAyS04eBf+x5d+p0VS9Vf9PE +biqo6aUj6Cm3KK7dgnFSc4nBj5/WxLXL5qOmO+V3jlA4GxpwNNVug5Y1YQRm3UsHOso8t5eCIbE9 +SMk3ZAyrjZ4pGlKiKgEW0HUVzpW5935hSno20pIMJQAFob1h/a0wAZ64EfQ8ianBV887yng52tix +xXYl5T3ZTHN4/nx5B+l3eqWSPMODbxow3+H3j/uoy5y65nKN1EtyJ7yMs60YALyCPB1ZpgC7+tse +6VSU9uZv5/G10vnqlFUtoFareCRM2RhBMwF7GAZQgE0spquo60FVCbnxs1pBThiyT+Q0xHp70Y5G +Bk0fb4o+3gOYfinURg58l19BtekFCShIxDx/BgAUA8/EYxMOEF/R9qoyFu5bxnlqdpb5fCP/DpOz +twZqbdSvvc8WOt7XofwcJ62HlPbgEzv472O35/htZueYULH34nkqAmsxGRlwkxlWrswJYMncHDQe +jo33scJhdviW2otEgRSjeDdTyBfWkd2GX87HaDAWYkk474+1licdcn1kX9IUWeFlJr0sN+1jAxwt +/FGDvh5LmKtywuXF4lyK15w9kFNARTDyRzC9O9FDjAijccFVdvzJv89MsWnjS6PVho2KGo4ZFzyw +GTmiqWTiAS2pJDuMus0lUSVJHL6imqGwjsOh9I6u68c06po+7jczHr2ycIZ9Fz363Ganzm8BANN6 +hTk21pjjc0YzDD70fvpn2jw3J7W5VuPXYGLX7jVEAnjhuFbl67MJ81KvOEvho9cQTXic4ygoFAdY +GL1AXFC2pgxf6jUAP2Enl57pYajjPK6knmmVOTnvlNsxY+hXGMfyzEZ1t7ueccVALIL+z0yDj4EH +sgf2A/b4Z8CtCSbAkoUAsg/FTfmfdpTn5JnU51nKyIxcL2ZC4+sT4UomuvdZQK61KAP+bffFLdER +0dxxpUOOLjSxUrrNIyiJmZyYGGzUo7JM7P6ANGyP5wjg510l3e/xrFsIDF/Zb1axKHRLrD4ux3jX +WFVIztpEXuD33vMFcKllcz7NbXzu0XbnvrQjkMdT4NPgKUOGlMLQqFjdJMtaXmoG1shUBfDYNvHT +m8UAjFtM1Gn5u+DBQKBxvCU12oXJuEamuXhLR7DJp5lWGGwq2Q9fXGS4C9VFqR1Y6rvPR2HUaxEo +LysTFkO4wQ6cV5JSpgUJgo43fsWPyWRv/QGO7uatg47lLiZkAoOC7zkbep9U73AwqZmsdRSpWVv9 +BXz7vtxMuVI+rc5CepMQPK8wPzdMtN6DQWh/dt3JX6dzDjP8OrmXdtMCfvbFVHu+KKqJzvnWv9Fc +ioxQrN/N+qBWOgAP0/8C8GqoufkIYxMvki2dK3D9dq38Fncqiz/cB7EuB9Sk5tGm8GiPSibCE6L5 +6keqwgAff49DYvhv9S2st5E+HuFPe6m4T+fT/rMFe+z88FcZmsWqudnyVxWOvKO5ZYcz05xYMtFP +hfWbBSPDK/6JzfliAcHGSjBmTHEpvSzX9R3lK+1CUORfwEIQo4ajP0MllJ41cEz7msJZl+O2LfJP +9FNQcROb/OXMGPzWS5EiWNeWubNP3nSyzpSjXketBg0VYW/naKg74lqanb3PUr6gIsVzArN18CX8 +urHsxp3E58lODaADsUFyHTOhWPcyD40sDN272SGxmHfg4ax7GLhe9cqlQIpV2QGgOWBcEZP/sezN +NJEpwqKtFqWAZfYov0PnHcAddnZvJR/q46HkfP1rAA+I1x9Q/UGLOo4yq128llnOIMj60J2Vy9I3 +GTM6mCS6LVi8umYjOZooi5BSOJalvjNFi+Anu/HHGZnAb4mk8aTTY2tH+RThFpba1hxR97fWlYzr +dHNASUqeAd1NUy+9bDlI+bpOhZif/TKlQQn1f1sB2RP1ihs/gKRpqqelR/ERFb2SfBoxA2E3/V7q +uihRNQfq38GmlIyU3Hks9/9/j9YWVRhcW6B9UYjq9VXm5GFL+0eIAElBqHV/GGOvncZL6H7b9kSK +txngob2DuYpx835EcLa+PvEfPzEnFK0vTiIc0YVLEhiPIGSlxgk8cc7rL11BSZpvnsinb/99DVrI +ESlhXoXNrmP7S8XmEeOpx7C1vEb6dMWHmEvV4Nw5dHIjYmsPQSkhqYAP7LNAbG0nRfSOoIyZUCPA +IrLXyE7J1MAVthK4HjL/bicL8k5OUAa9gYeZacLazZlXoh0Ol1VGJeyjxkqDh+534V9eJcczbbyv +XrzmZjzuVEvPMBQiCmBMaPtQhcUCwEmWqjIIS2fkchMvliLidqICmZ+r83yHgESgtUiS9BuDzmrq +Q/p/JDf1+HJ6QwdrcANnIk8nLd1yD5GskQwnF8umjwMrHWjYGw8Wayz5rc4gtcEjHlO0fPCGtyVM +O4eyQTnqyITIxb1yxQp0aLvvtQpHuIaR7K3xjOPOEgUGlm16dSvMcuGoVYokVRhVcrodIKG52oae +ss4YgyyO2nox5jdZ7hQaivTBazKBJlvDObi6xFnRBHsh7D3sUGMdiJ/0llCpwFT8q+WNrqbtehqj +03d+3b91SgoeZWLlgetR2FXdY+NiTzTwqE+xEcJibkhohI7t1jhPwL4g+yt0qfCdiH8yCvVF8rVP +2rO6Z3Mtbz58ptAc1sy+kKGGr+mTTlxevPawGt6z8AqyS+cp67g46CbX+I9CCIeksTHwiN1VYhuU +033w841DAhIKVtW+zTfAEV0bJW2v/KbHN78WUYiD2Xdy+eYGcvY/2MDODVM8MXNPZBYkU2blGFSv +2IibRWg+d8MdyMnXabwJU8e5AqrYsG4iPBTgLyDBWE6pxoDqgGtWbpu6CFFGVU/lARKBlc3mUMOi +Y7AnVYw5KGo36+dEqxREMhhv4k+zESypkne4R7MhnacKsSEQRyWbd2UKNzVmk+MwKC3lyGFKpNDA +MDWMhrBZUtV6yJGlUSC0PO/R4kX2LOlA2vO8omQ5oEPs1+4ZIhub/jQVOWlLa6HYZi2EYBHZXRZi +HidKGj6gBFE+Hr5OW0NaOlcO8i8f2xMSoZyRWvwN6UgdcIwmEXkJ59wSIjhoQ3slOx2XOiYC/Lfm +wZn4bV82VkcKiA/tpAVIyv4iomkzbSQxGOl1SFrcCsiL2MPBEn5LSQwGe8JZnd48ud6dSPeVBJuh +ptj52nIp0SJz9fKWiKwKKdzh3jzdSoyRT4H3FECF1vmFKHdZz0kldEUZlRWt/9qSSNOe5Cmjm+vK +4FUHKjSfyJmRoJaIQUkF9RLkVqkiKqKeTWdTqiW6CsvCTK+0M9qXWMZXdxzgjl9p6XAYkSlpL/Lk +T3i4VodUnMCFtaCu5O/546/6DBTcXEiitFPB3dwrbJK6oZE5GadPzCxgGs7WJfCe0O0ummmE4BV/ +92Xgd8A5T+qPYhXgVAjPA8xg/F5dVa8SRGN8MURrQyjUy8dio0cHcbpr3sMI2nY9sFPNCke9fX/k +l0eaz3ZAuj16PcYY61gVUSa3SMA+b01BWGtSrZ8948KBy0AWqFJFp/W91e7iDq+kaKHRkIUSQwd+ +cmB8es7+GDev3QROG6/UpZRud/xIDgDhTTRLib5rOq0o5xjUbIJnelwiWDdj3ZIw89rpwB+Qh977 +2SKhHszw2jTBo74stZuk9UMPpO5EBLBK3g9m08U6uR9EigJtvjFfO3i2blynOyDKzu6YWyyjeG5y +VN0YQMvpY5W5x6l2Bua3Fg733RJMwGsam+mGb7o4tqWCRkkUpEMlx0gzaVRqGJu2fE6w7YoUGCI+ +FHPDk0GixTguhMUs3LJvuun1kmqaqR+E2rjUdbyAZuxFHHf29DFAufCGwDTY/VYUH9rCQTSrR8kg +23vVtPDFFvF55G7LcW5Xxu58PrHbIj0c8InH2KwQRvsCOqgSV09OXQR9GXLb4S5DPr2W9d1Udq43 +081nrdSPxxEg6amK0drEUj6zVyop/mjjcl+lipfXzXS447RM5dO1Pl502w1hD+fXwuziXAK2clp2 +E3sbfi0kGCgb8eIvSi2wiLCrI01t9x+ww4ekbdLqfbOpxKkQ6BUMM59ew1BIg0Nxje0Pm05BH6Jw +KNKikE+8svxwyr8U69P9D51mNlNoom1hmTBNGh8SrV9KOdIAbwWvMoy+5yQt5VZddBynB/susBFM +BhuIcz3svpfBSTFQT58zxu083v3jRa42HO/CXxWs2dxeed+i4E54bQJjD+f40zxDTsujZ00qu6xb +fY3jhxlRGh2a1qL5cFFIk3fkpCFi95bWLTAiHPTVM3djBirxl4vPXuT74jNs67B+7vkccvvbFUHN +4FJRuKao7UK4bh4GuPNzWnt+/h5o2YDqJCYXPkQnpZBSkp8n3E/LNfc+wbJ/EM1OsaBUzrYI+n5R +R8Q26iC4G1sSWsB1dys9USkLzBvNI8+dqORdc/S3BO9L+MuJmD3X8KOUxGwvkFjXNsDFZf/rPpLc +Dbz7kvMJDIRlI1/6nBI37xCXrMH0acYfaeIa4bKFWx9jRvnHg5NyAbUp7oKZbCo+W6FQUNC2vLri +qVp0OsXSix8sEa3QFUUUy5x1eVUOWDZGIjmhHMbWM5OAB96LNIZY8PZIvUR2FiE7MLiKMlwp1EJV +X/Js7Aw2NNa4dN6YEH289srahcGKc+lODxJj5ZXr/o6bCkLeGipIiQ0WlH6Tnv1nHmSE9ZUahHPZ +agSB/egJJao+J11oElrT6Bj26+wMm4M5EbywHihk47lHBALUU723gmIRUJqwRSkq+BDuU+kto1OJ +KpBD676hVa5+QrXyZcOqVERnmF/oDQWDAbEmC7gKaRtLTGuf9WUBrCjkNW19qiTehqe3/6VFGnb+ +gYWyfjSPWo29UXeyP3znVhw4wqOp7/3vDKHzxvaM4pCXTyMYpExOI4fzKnZREpodcAfa12h7AgpF +JBesqN29PUTga2LKlD7NP3asqwcye1Es2XnlPZ2ffbkfggi0bF0N0O5Cv4v58V+7zBRAI0xTMF85 +ZiM9hcPdO2KN0CaAcwSNQqIMFB/tKvYhjBd0vhPZogcK0mY3Rxjth6o54T1hvueFUI/RkcssHgWp +JJ5T1fuHys0VL7gYDh6ZTwURmF+S7Vi2VNaRUZ2v5a//iylwnu05Ptxk0uHcVN2Ea581UxqmzWRk +1naEBzwsxAr6wUe8UPKntvo/AUF2XG3VYiNWmW1CmEb3dtAXdrOEG+BYzF08K/niYafB733z1jY8 +gdTdg7lU1j7AEXGR1Evo4f9t23yTzFtK/xoX4NtzrjAMDMF6kNW25HhfqvBABEHxyK5ma29NwUsh +G0/0ZMjQUtqSkDo7oeGViDc+VCkWwh4BUivqjqXnLNDoCL92FqDPp9TWDVT7os8FtnJ+C2d9FHYo +fcllHhJu28QO0mGtvI7rSE8dFY/zIdhEXLuEY1VjcuqFqrSwW972fvyTCSQRjSV0Cpuy7liEzPPh +wBgrZJWCmoC34EC+wQ+sXP4h8YAXYkSapfu9Qg5nWS5P++xJTsOZS59mVM9TSwNeX7F+DYujeUMH +PiEcnQG/NF3Hgua4bDIEyAYIJdPaxRi11c/4L4EttB091r9QqUipBsr4aEZ6ucrLAAVSGCnVnSrx +NirFO+gsJXW1uOdoR2X6wfM8cgiyiYTY5uVrSGvaV7xq/yWQtM+eoSMNfQPGvgW2zHzR+md5VW7U +C066Akb0urrYZL2GxCgBQtpmp84Ln0BUsRSvudIeTKWg/xcZmSvHBETPBlCwxXFzvYxQpO9a1ZBm +arvblewjEpSojzOKUD1xGHcYUVzASX1SQCrHdVyCd/OR1zN/OuMTWWn6kdhf/lYN3rlLZW8wH/oh +2q1NJWGYlsg9I3a0ewLHxtSpOA8Xbfe5H/EiZ6tTsApuV6g1dyi2b2m54g2itfLXRB/rJnbzIFjX +WQoF0WJNZ6l5kWSkjLVx96185DI/WJ5z99GieQVXg9kNMq72doEPm7i13JighL4wkZAEWAIJDkiA +jAXeUg/V0XGW9XZDnwK34b9T9kpGMSo/hpE3I1Dij10CDXt5XLmofP8HXlxbZMP11EY9d0sGiQpQ +X6LSD4u9Lo1d0ctymH+aetyBV0Njg3oA2xl/1iFEX338YDLRBFs/RZ4xrQI5ZtO4lL/kDU11Yuh0 +fpipb1762onu5V7tMsdYs2amLAIs5ly3kZ+lmxvB66Sy9D+NG0eWwFoxj9HW8ZN2UZkDarJM6dcx +zg0MNvWAf+fJ7WMx/f4o/ShuwQpEH5aWYYlRBDNi4e7t6zlG4R4ySF0reAcYRLQHJKqUfWKSHb24 +b5liJ/5BphJi5Sk41Q314YZx2jEINGdMVT19wf705vgXMauu7Ho+SWvuA8AzACxx0rPCwYuDAwA/ +Er6OCcKVEEX5mdwql796KPkE2Z6RiUmQzM5ZSSa0ashe3XleEOqIYe0P9b9ntVvA8cCUXtpJnJd2 +6cebKNOn0sUbFLXiWKe1AnuqR7aOZyUb3jhuHZr2QBMtTsVDKqPUa40wUYoXsPHHdV+mQBD5Inkh +Nx4mnFHkx+6KFxmSC8fdS+ZoZhEzO5EAI2+0LvQ2c9MNSbRDh4UJgcyBKC+sKvUN5o6gwwhs3uP/ +hI6Be3qcP2XIMNVFDEBSV6ZwDipVST/OZVlujFI82SBl5s5XRrK+EjpiV9V7hAPIh+6JJuLgXAVP +JkRCBpIXyDFmRfJaTl9t+2BEpInDqNVtwwR68fSutD5XY9TcPyMkMlEag2IsJNM/YPXx2kUQsYq9 +mdJMGpHtQi7/ojj2/fwvMdCw/yQLRpIPqwkFe4DctNgYLiBTrwOfQMDsQzjAR3ryE3EvjAgeA048 +KyX++Ba8eDqf3zy85bXwk3xE/FXWw0RAmLDIPq4NVduDjNWr/aAtFHbwIDlwNMr1ZH4yeDwBz3ha +mtmhahxLPqF6bPEahJzAtaSCqxqIUaCmhIJNICPZwlbSO8VWAG4Kk/73RfNAy/OBgs1Nn5GHagCT +elzs3OepDMhbvuXnIEtHBjrEbe2S1CWWb5KKW+B2iWtMu29I0pidVGzTeDdB9WAR0c8H8kbSxByG +TAVxHRVT6RXHAHaMQBRGk46mMh3RqgAfx5fPZKMR+Ua0+SuD3s96Y+DxJMX/K4iSMtPv8GMBLRQS +EIcI3VN34eilnRRJW87x5pIKMCp41lZse48UXF5KKTeBJuq1Cc3SEh770XSxxAWZ6wpK9838J42i +NiFVoXAC+d1YTC4nVJwiounJDKG4YtciPaSWL1xrAjm3hDQQqumRvVsryzyJXiHzmOBqXajBahRj +9Jmi4NsX8adGNp+WS8tFnpF4ywWeGrmB0Enj71ADWSv9GWu0pjYpzF6X2IYlM5f1XpxdDBZFdp6u ++VrL47aSDu17uMpxG6wRq0CPmwOYgKPwRi5Q+8HvJ38VwJeE4l5a7avyl0hRyUUEpfC+3ec4H+rw +c5LsAh0p3IpSZsQTEeRr7Ko1IxGFSj9bTc08hpSn/+Chh7fsRXcNint/t8HbSKeEGwOJGH1R9Efi +gnP3B3IIDitnm2jbpA4UfhhmbS0QIJxQviI6abXDWoMars/WY1Fbh24kJHC7inIF9AY/0Y7mEjE4 +xjMsupbys2ss8Y0/bJRusmvmDW82qaMY3Aai6Uvp5rAjuKv9Z3cdHng0e2sdgflCjzfttcsqr8m/ +HGvjkMdJdv1plhM1ge6p0N5AETdkNxPiBNnhDOILFLYAtwRBCoX0xGzWWIG6EDS7eQOSRBJPEVWQ +tfcJJLgU0STULW91ciZv6LQyOvsOIefLheW5lcsTklGKegVwzO6OYCjjxnaqyU79Po02o17TZTD7 +xJ7tyVss5eOhV5+dsaooBqi0m/M6yDT4OFr1m5avcWRs6PhU4Xpz0Xqr4C/34bo75mz+VVfyhYRl +05BX09MRD94M7iK2WIGcEYRpXMiPXhggeMqd4qimzaqXxyKiGwhBUeDreeMDh+fw5WmpuH9BpwoM +SK9vJRhJyS0KA6kY/njuB5P/90BL8i00RlT15n82/HOqCBXnD90byo0PU8C1n2d8/UxjiqrQVVsj +fgpkGtPwE+cOy412N17jFtMdw5jZgSJ56sVeGoBVnS4NzPI2CduPcZfvvP3g9InMb+peRr4AqJ41 +QOc714L76y2iUkUIee4H4Vhjcby2vTP04ETyXZO/tRmPNonf0phN5ryKmKx4Su1w/Fow0q/OpCqR +jcfqcou2aTrZVIuhuiJxBUguUI+HNHgau2knxm8K1TjBo9wcuhZzBqZPpmehV9Bt/0yd2rktC3Op +qBaW/9l3oKSg/hSaf/bG/TshPhKrkfGqr5udgHW6rtO0lmre/a9GZCsRrGL/HkXjCWp/leB7tNIo +LMxIWidm9UXoKXRZSSzMU1r1J/wgiXS4FnTNAyRqPMmqFC2SAYVIAhjqjuUV0Zdzj3+493DsaWIz +GxPUhgzWMkyuJWeYzMVcfLUPWqpH3F9VHmXHsNUnEfc59ovfRPyDHPFtBHYxK+XEXfg9TrOAFI0o +J0mOJCxkp4jBW27LZnbNC+Xe85qo5jHxaEPpIT+sJBlM1Md6QQxvalaDI/IZn7XWP8aVlsKLf4Fs +hNXhZ2opNiYtrGZa0eARgekG5OIRoWkR9DLl5R0h+IxtMqK7N9jPOyTOZX6Ij72BOO1NjCArgLJl +PKbFECxxcoSsVkAqa5We9Vx9AS4W5KBUbXB1odSdLWwjzavIbVz+mz/xKKyeOBKCnjFuwnEmi6Q9 +X5+Zvmv8KxloVanXu3hkIRS2NLnmks8BRG+VRXlVju5nfHEqzeXaco4vBHgfDZzym5mAmsR5tUKF +C9sTCla6yMivz7uZguUpMDxTekKBRcuJBHBT/aJMilsLk1xcCR1lQfmx35xS9FHYlOEWdNBdW4Cu +GQzDjxg+dXnx+w08jz9jSAfV1zT7l42+rIQdLSP0twygoBuM2io/eb8Z3K0zx5EVCe/mbOfhu8ye +0EuGsV2GvyBOJzyIusas25wWN0CKiAuHkW256ZeSSb37784RxxercN05cUyUnp6WNsXc0KJJj+fZ +9mJTrVTNvvzqzu7mLdvRRgjXLK7uuxpI1OEAf7VN2zh8vuahovyboukf3QcBP2MUXufGggVWywYd +8Aj7O/j5gA+drRabjL0zSpVytHUXZuuk7erzDdAqypGR2NyEU3WUuPdx6f2mJWvAo7nDVCbu9QEW +8OAWzAqvxJxd2RlW228k86KITSLROqF9niC+E+U8DWD8KhVN19mv14R7Y2KB5ApFT8f8i51VIk26 +syXb3OTwi3qIWeYH9TJK1LKf9cZMNMBYNCSr7ma7LTwore0apJG5U8RpmYF3gjFhAbmgul4BcymP +Ku8GTa10eChvjEvT9adbnWqjqqSa/xxguupjxdWG6ktFW5iIV/Z4gDXNeOSwLOnCz0oEEAEI6Z4J +DE9rc1mQPPCtJtMmfnWmRv7e2w28jN8FZhOzkyYc0vz06rDff8iUfqFqndESnfwdVEmfy/UQcg0Y +vKQtCGDo0Jq/v6RROASv5K9PoIJA6R6HW9kNpOOGwdsuGKm/340RhHtImowj/fl9MekUNXOGRLUr +pdLrHAHLP71ucrrnpobzYYi+V0/bVshXB2teFdcRwVDHCM66dyOueaBwnPZbtnfy/apkdi6cnoJc +7uxd08jQdg/ertaDPO5DJHw2j08OPfwYIviqKi9VqvRhYly167YvBX516BUKXn2uyAAaXl8MkjkF +I9s1yhTT+iiWPPB1/RM4ESEiiJL0IAPihgzJn9s0eKLk6GstQ6BYlXS+SlL+IR/pUCulPAEM0G9w +vkPf1HGW7il4ZFfYuVPVXXqt41BhGwOvPCPMzCEG7UTjOpCP2rqiQgj6SwY6KHVpFCepD5ihw4pK +/eSMF1m7lHWQl5cwctMHI/RxF1ZdrB21lIbRwXZuYgIYlcXAqSf7pmMQ8UfOQIH0NvvsyD5q42s2 +CGiZC/+ID41nhk3hkrgtkwsA9U4TBz4wD9zZpXNeK6lgFUSMU0aFODghOEHnXbrSjPSjOFEY563m +eVjvRFI3ddRqJnfe0MdpzKEHwANoAx66rNl6wxd2U1tE3v1iPxx7Yg0tH2FT2OjusAsOl1HEdj6N +wuI2wv2lnPQWDU6PMCdLfzGNEMq0IlBG/xfps2Uh1MXtdVuDwoK47aCsdyg9fJmk6TxSriLBgsky +U7dr2fe5LaEsQmZwwYlK8fyUaGatr57StOlK1JigoDf8ut5DyYAITYHOHpiuPHj9LAvlPVZgA/9c +D7N9N1L74nb0zvH062Jb6xK4GjSZJRx9M2GGR2QXLVIQLwFnbvDDFFD9pgZQuC78Tw/mBwV6zhPS +BkPw2KvkNZ47uGwQy+A9O5lNn9Ffsc2dTJ2VPaFBsonoABscuD9RRU9EsZ5bMjS4eZxq9VZ2AmVg +AsYZynH//52PCzBxSGf4lu3AMuHIoQTSnSuReGHMJ7WuyYJ9TdtWoP923uXLY5UPvMitFcgfvuIA +48qqfGVZrjjNv+u3IFdY0kwtGz3NfHMFVdFg6A0Z4n0WpVWry/zrDLk6bQocePOlFKnE6uwLIBNQ +DnZpTiO9z9Hw3KlrMooqd6kixNjBeaOsJLUpv2KhtAIfkDt/6Kf5feOdDAwL9ACIl7PnAC6AXluz +/5JYcmwuw4IgaO12KyEtQ8y72+QMoTdteBrBBQ4CNLAS7j4Cakw6kJbC/u57RwRknCwQNFS2wJ+9 +mp5DM0bjj3/bqGz5rMtkpJ/37FBe4i91H7S8zmurr0LLsPjunWsMn/UvmGYsqE2gxGrn35CXw9O8 +M4N94M1nFVLisIQfpPeOhhdnL6QM1L5dFolTA53OHegehkrFuGtA0wTwldrnJYVFTbH+d/Io5UFI +pP99rsAjnMf4ZUBUc608elKAI51liXQ9EH9DxOFPI2HYl0P+kpAEOOIeKwj49IaA3SPmlujYHrgK +vglskmr0MLDQb4Khgg4jeQRfnqvQlsupLX3xUCNePTH0vgxjQ6ZiZPLjeqTm4+zUxSOkRyPF+gum +Rq00bLVbIXtxp3DGmYaaIT+oCClc2drYO63Go06E3Z5O0ojkvNGCFuWvBPQBbNo6DL7w70ro0laA +ezaxpLrLIQDtFEB6HPPiVT1UwzW1cu2O5XC5sO4A1zQbWq96LPnh9IP6qMZxHZJLhp2RqrqYrLwe +Vd5SAs42JMzLYnWU6Ax4idtElDhtXfdFc+W8YcVQQxQ8eacBHOa8ZDqy5Es0r1KZqLbbf3hOkIIg +zEoqFJnyknr2iQ/YTwtWLyCs6MCpSVwSRoBXMF47qNmNKSFf4Z5bvjQRnexJXBzgdQF7EEFHzAih +yIYjkDlC/X48gYJMvzdz/zrg6F0JQTYG/zhfHUktwFjyWnWVbBUXXH3gygPthIsyAJWTkm4oyTd0 +WtjUAdjG5EuPfCO3J/0dngzrfbEhNWCid4GVD+/NoVREWB7LnRatvJfwN7Z/Q3Fhz98JqgWghDah +Bt62LGVnjzy+6RyQJmNx1UsbS3MX5oYda7Yzvm3tNV1s663SPqB/qK23zFQbt6LQDp8PIMxmA/fn +XlMVezLnXHiOawpYGqlDSKXOUES8OKxoBhV0FYTPEUaWge3HF5ZX8U+BPj9NydWnYZTHD6JvAvw4 +GCyxT0+Hkz3v9NEUFElKT1AvRQ+GDUQ/s0ckYDZCpjW1i/L6TdJUztFGFXDaGdZpY569/qEft+RW +/OIPQ7PbM96Ig5lIguofT+zckHMQWr8ktkuKiqUDH9NNI8/9AuEnZswt9KNjOMR1N6Wy1RiDHlon +UME4KuQhWQ+8iy+kIiMv+ZjRjsJinwEkRw1WnO05pHA3p9pdxqBrYu6tI3Alpz+pxmh5lA+3g/u6 +JD4cN1Wu8wW1jEJvanb8gVsqjOao7EMmoy2JWuwOV9ZeoN9LL4RWYAJ2r4BpS2KacYlOCGUQBTOt +wxVI+Mucdiy3uW61/vc5iZUFGWzCVKmgdLuEh+i61ymEdsTDosE3/8O6rAeaKM4OKc4yR1f2JqYx +VLirW9U04qDRuytWboVbxKiobj6MxMz7mxfJ7xnSpWcX6/pPsMmRX88SFD7Pkp5Zwwmfd4Cmadn3 +Tk0GnthTG9NR1rEgGUA6u8yoxaIalMDn0jhCHgIHDV7Vx2lJwoUE1CtxwuDPFDWKNby+IQJ3gVBT +DFr2qTFD+qoT9WIGZbpJhdxC054fMTDJGLOQWuPqTT/CRQUdreJ5YyOK0Sci7D1PMWGYGM6J0gqA +zKKAegAEWqV4S1LJE6OhKcdLLP01P/Z42vbn04mqQX6HtmiLvLHeRoepXmG2YcjYc9cWzF/5CNJc +ZXCoKtajdtvXXEym9pMSZC1nzcJ2pDFHH+GISPz4aHqmUtIlzpAoj3WhSveCAmAH5sfj0RQgNko2 +36KuxoKArqFeKSwd73iv8D4uGAt4IWzYbQNGz71WfenVlIh+xB0MnIm14Q8JG6VKmYQBa91JDwmE +liL9A5ikcr0pmktM6sWJK183dyE9si1UkOGpis5bxcQQgwpkoBtIVDZJslRdWq5ZDkc6S/nsgxSC +rF1sbTwcBTJ0BPia/gwCak3eYJYLY+9+ndY6Bw/fce1UAN5NWDmom0p6Py0x2MmqFEDO2V7fOEuv +rwtwQDKKr+DpWV4m4InKMPfb5DLQF9owPqEYwHoVKaFO7eJaj7ffjyzA0qbzmbhOHsrJDWUCUIzb +srbV+y9fni3VJcqxkAjuS2sRvhAAcv61QGtd6xuSnbb7D8azvb8gtBsrM93olSDWQFwvIrQB7EhN ++lllLL4zxtVhK43FEhn0t1w7sPQJyF8FlB4vPLMKDjEyWqSzG52xEkCJzpKq6zitabxATncN5AWL +5WKWukbJxdtl2YFDpgr1obQrYfjuAXEfHgT0K3uWJJPm5NVSv9lqPlciAZcVlm456donc99v75hq +Cw8BrJP+ynbFruZoivKtmiAGG+mJY9QUwp8TEkRztORltbq+OFqWsnDnQAAdKwR/mEJQJGCiYDgd +2R1+WA7zcqcuOJkOM71HRZxEMssCynYneDEMh8AkFN2UR/nPuucRE6jsBQC/qdDyoSFoX5D78a0z +nsiCUYIlCbXd4D5QW8ayCgFRSzCqZvxjwxVHvoVFNzlRart2AriX/OtpaozRJFQragu95CLfiOtk +fM6P2HbR7NV9pYTOGaZsPweegYBluvUwnVd1tfmcWTREn1j70s15xqv7SNfw5aeBBcWcBgXGf8Cy +JU7hz8TjwDyMzihWPQc+2EJlT/PqZASP8ypWaNBxttKiQdWjNCKNO0BX75yzsIVpIl4tLv8pECIf +A+PirZaGPFuN302Th+zWIG+R0GcrnZj1pnmKhXSrXhH2TY7AtsKsOfNl2YKTYrZ78HPOmwAp5V68 +bQZS0HRFLTX+hNjj4amfALC21eXcUHMMZ9LHq/dx6yHjyJ8puE6lwNM9zNeD+dn0bUOmLmRXuO5W +1htFHHLB2eCHlJRpiR0+jmJoXU2qhPSYd7QFKkrzxb7jUyDLg24z/s5ZRX41AX+ZhTygmOyu5zb+ +frYBdS4Gfs6/u9SBZfGhNw2v1eBjybjv/K7pdPTeeTpvJgAPtj/bocUv2ACtlMkokAAlpywG1IPn +m2VAuHu8kL7cyA3u3ttnd4K4KFzWlfkepYxUuWnjYT3f+SmTvUFm5esyoyQA6kpMLzE5SL64oeY+ +LiME5j8QG7touueEE4ng4Et6MnUoSqHqzsnZ9+WVlveS7muxVC20To6Do1ttxq3Pwz9byIBl8aEg +l9Mo5P66Qj7KZgpoiEb06P81rzdB1IAGvJcO5uSilxRFL0cgfEllMcGlEWsDVrhLAT5VbWUA+2Jd +8j/+QW3R5B1S2SDMBNRRcGNpzO0hwvWm3Zslf5z7fKsaZUK6SEG4v9B9mbvrKTGHm5TL5IQ/v8Nl +SLNsaNBJrHv+RnJAOCaP4HLya11/TX1n9tCMzsOFM5E/JIxvchJdx4VJdeNrcgcqsMnxa2r0YS+1 +7OfwdVVutscbaNoNIX2hPG3l96qIjp0sfHoHy5K5gZVkx+LxlUUgEgzaAdwcLQXzW/HMWc9JzliL +d5s9Dp3go3tFeytzsoZ370qd9AYOfeOVK8eU8F7wVdp+kl67QwPg1Thg6Jme5KUbD/FbwqHVf66n +4xNoQhw8TfwX+Xz1NGs8nPsUA9hJeMEwBy19kbN1KUZDCV8lEm/INmipeFWvSz7O6foj4rSKhL0a +KDkHL1f3nIczYchGrR/DjbD6MH2S7vZ7bWT5fm9JxGN3G44j301cNW9xPwg6WYaImjQZoFARH8Sj +T1T0MKFqvsrkDNOWQKWmPRo/JIaYs6cYAqrNZq+IF5VGTO/DRdyCRNl9v/++enpeHrqvqZjENV1T +YseXke5GqisFFr6BuUCQRerzCWIGwIiPdAH16cFlYFowAdX/C6DEaEcQSX9gFOz61CZDLHMsSKMf +0lRox3cYYucn+PeYFmz7mQa0ZaC8npan7ahMyL15Dl0lr7Sta2fZReU9jb51OiH575mF27Mq/JgE +RwReTXZHmqBQN/lAFKxbBgEiTMdKVwvrmhU0k3gD4s+bQ40q2StK9dA8+UPHNuKykwsu/9Os1yxr +uRXGy/QjyNLLIYLASrFNAOWUQg6TtWaaMEb5qj0+LFhNeFQ/5NlDs+vqY8pzeN6lILFX4sMEIKOK +/yLOLbTUqmjPB6R/Byz7JH0Kv36vVVFzNpG8t2FzRzYoyXaG+jVLxxhweRhUPV9gXaYCFbEs+sK7 +Jh476ZpT9NrzOlKOivM1TBFzH30B0M7oflet0kInT2q58tTPDqljX6QplA7oh6tKsPkGmI2ZOqjW +EkFhMHFusv6f7MiU0SlbsYU0MY8QMN9ScDBOCneWTw6E4WTs4uzhOvlDLe0OuzB1/aI4PfQH8oWI +WeKUlDIWTvBb1ElhHC8zjmgIDnz6dSBGf+Ze1ReqaUZDRJWwfu62n8aIsY3t2wjfKFBUCYn3ZSCy +ird4dfP3WZTGDFD9JuFuobzV/XBTKGcjOxskp7uxyFNSBXJyMUT2ZE5C6tqpDlAViOtqKHmQNpU6 +NA152MKJocXLeFCloJ2qBSINN4uybgKogANYdEtZBh13CcOB+Us3uicbTZaG0PNCz4fTby7B/xBE +zVMISMJd02bBPUlAYUOCGlFMki8uDPObYzHV7atfKtfh0lmFPJ2ek7ODgpXlfuOqWY7RLsb+XAmP +5qnejUSAG3f3WhT9RFiUxxgV1HwZN4cTfLLpH718DfOkikHQKZ0Xmh/P6PcFRhLLlWBhHSmIpZWz +c5zykzt++J77k8ROrcPqZ+FrhheE7Zc2MDR19B9HOR0A81zp3+9r+AxPzCa1kl5/09axV4HV5Eo0 +GWeyEwTANdqMrWQIgQ5HwFt3EJ5rZpWl/ZpAetBXRcvnNj5eHQDGYFKhndsx6q+AcOBQRzJL5lRk +swhWNeEuZgWtT8yztwu8rZI6fGzXuiDY10jC6IlOyh6MjE26lrZ4M9WBvpBo0GnCOJ7jwLv7HrGu +S02Ty4nIVRspZJsk+aaE0E0L4JA8aO/Oiql+B/XzbV4VGbyrXYQz4I91y2lPl1VF/WHE/unVHcB5 +JvfGpPfUdECBNWI7WzIG7YJBSCq37DIjB2SThxZFacUUQCl/vAhk82ueUJ0dFhgv0FdTQvMsLuue +whe3hQCIeZPgOyMBs+Jq6yL6DsI3691VSiPLwrIsE/8u+MnlcdKMfvoOf5v6ANjUJiVkp5ah9HhQ +tIG07TyH3wYQrxvm/3nwM+p1xL/NKLnIQMB6GtqXbVrblMd4Q4ZxkF6QWN03+SiidVslMjbkGC7J +xII6poCQyGqQbBadrPVJLrq7aQMyr9VXQZD/pMPssKWIcmvKTBCYUdV1AqQqgYiKvveqNzjYR4Fd +pz0q1K7sJSW1MgoTI+fyM8xJKWGsCdWCP3mV/d8tOOJcCVp+7So9n/u92Kc+EK/QqJNDch5WGp5D +TGMLCnnPDfqIuyEZOcFCp/YF7y/ke7a2SjFP6HSZLkHAKGieFtwkVW9BJ9QGxJNk+Xk+I7q9qWWB +GVys5PZAfHqu3NVrJMVSXfIhXivX6veoXm7qu13hCGSpYt0p+M34VYqFVW/aZkI00qXtvoRbqXpF +7tUTM5AAhnEhkYtv23ruKaXAjKJ4zcf4hznBdmorscudFexTZU0fYhEnGuTdJvQZkFakKc+u19Lk +Zb3R6VnCWuV75zCZHl/SfnOEPDaNhWgYZsWXDQd+8yNs7SlTp/F7M+yBdWnEEru+6ZLoN6MwCnI+ +jRs9xsZR4wPHpQLNL1ZR2pb4ddflpLp5wk7Do/HFHCyhm6VX0lhXjkp+lwL0rnL2UDlDPdc9ZE/O +OSFVTaj7glLGPBJSbSVH7L7RBtE2pLl+AU7ArA2gyQ0GKg3WDqlTXS8qpKezSGuREoo4YZRs/3hN +GUKm6DaeHea2dY0c9WbYKSnHKYd7BAI2CElL3MqkwuC+E6GDL/Fe+hfv+3fSDtDnH8YAqif2JhMA +i1dFbgK2phxMRohBR1VejyTXujxh3yKjmnquwHMHE2s0Y81EIA9TzCyGTtxx9LA2rSA42ka/cE1P +xpcPugJ6n2wUyaWhgBnkXYtg8t3KuRBIl54Wc0vlG91DnneO5lq47yjjCzOLW6zgzyYocPIhtqq4 +YOhs1jtucP7QKJFNs1enD4agvkrxKR9a1l1wcgJpCHs2y4hosmwtbQxtk4Y75BubBHSTesWPHQG6 ++b25d7TY9uslX8VpFXI5syl+0klMH98AhTkuo1Tv/J8YNZPF/OTSPEqz4DtjSAHxLxLQGPwORFTT +OIMqRK4keOhiSugNngpniFM+ALZryFPd/UGGjLbkl19Lx2WL2SVHKYkhKdmJu+yOuTRjLD8yakUe +xbC3YoYF47xKqskWBcJnmITdkXWX2owlVT9SIg938K6i/rc61UaF0c9K9I52CJkn+pAjtUuRkcun +L545iB2keVMYNgbenfz0gujMzQ/4SnUqYqS6NbalB2m+NlOuUtDhNd0xMmop00reipNaURZV1Bye +rjw2ZumsIXwOunwXTsNwog1uEIXnCJUpCaDu9gAoXYi2UwodPJKCh4fwdFg9ihq6Wmws0UD3v7Z4 +ftrAZ8bD7zQWA4fR/0HgeZOT05FNJoAFldSvtCjG/iTXARYuu426sgp052EP+uTx/sDpmKmybq/4 +z4TU4QfN8tIV3ruq9aui7dh5VrsIuvbrJv7+njn1XbxnxZpnI6aBVMYNwZqrQBE3fvg/TTjFhxcx +ie7MTBCoKHS9l7zl9VCee0fF2VAZ/fUtvbuqi4Ma8pPwfWZZlNJ6HLFbUf8xflqPWR/BrUVzFS8I +NoriwR/NPIqi+qLXAHR3xlDVMxdNamt++DZOXrjia7KhePiMvgs9VbqA2MR/19FqAnwVSXrazO6f +mDES2XWH+omwGixAwO0Ah7d8p333FRFF67o6eGTCJ9mpF+4mzTBQbs2y3FEBVGddhLaTjD0a/Mhe +uPNrzIdefZdbWCVKcciogI2sTsu1x30PUJ5AL5Y81K4njHoF+m/0KIaMUAEoIw9nA2Pn7wMTjhI3 +bcuAqE+/yvUo6WjMHXiD9q+J7qUAGh9iOvmZfWtsMmAGtp9VVUvUCCxmlxLGUDYy61Z4tcF4gwBT +FKAa46LccEnrdCXySWhR8kVMPcqS/0vgskPBvU6dapYOlgVizIFthRJJ2CMtnFaYL0TZE98jJB8s +dFjYVkI6BDkp6VkFNK68GWOiOz1oA49q4l14r8icMd43EYJIWgKmN5OSOE3dWfwcUVFZqoMis3WY +Hkc7Vucn8vdB6Gc0g/S72foxqrAk/bL9R30ubnBcPoBZho+h6xPFsnHgc72ukW1IIEb6JGtjlXB6 +45mLF9DQLohDD6mBklEWObm/wjIeuF211m7pG1sDMipV3bgp2yyJ8Rvzkza+BnWSAsNR5kId7I2i +qNkEIeWt9od7absMhWlFHaaQX1Y/Yn7fwXMX4V8W+7Wz4RxVbGgbwzmJJcFZOqyKPuIpgeSZW1Sa +16k8O7zYbMw4JZ65Ux/WRJzxhAJDwFNLUH3wBDGAOc9prhGrUUxmKRx6T2q/ODmIjUZWpe9781ij +b8cM2ogMFgGWA9nHVgTKC3TfRvrtRkfjwBnk1inA9Wo0ujAY813dEuVdDlR05hCwDTfR2BgHF5tS +FJWRhmg5ORrid9PeCG0p5TpfcesK05BXfTW1ZGGFywXUK9xTzD8GYEcJSddTFYr87AHtBWRJeeaZ +HfPNogPEbaSdBAHOfbhnj1b8ucRSp3RlLIkoo17TMdefybYsGl6/MB0XxvDDqZwSQjib/AFMlaH/ +w+dJ7A0gpKcKJyIgao809KzXBzmO9WmT4asbagMPJ1G6cv7rx/89ThzgZFmku5bXfv+WB5I9s/V5 +VZKvIlNmVE6ybWVxNyy6NBKmGGeUqNj7rh3GTnWBi6my0MNf7ipXt4/NJRdq+uDHnZSUJbztpHB5 +jIkmQnyY32EUoU6ELpDhUuNcu800oE8Y5YuLfSyRgb9faDNT2Sr/BZj6wAcl4GLNxUnuf9gxbEVT +rKrPQj/SV/uVp41+L3cZ/bddH+iwHaxIAo8fbzoplVrej4Y9jf7mGKM0H/FUZc6XUNG1PEqZq094 +khY1iC0BN5aOAQUC5HnmKCYZdV8ivszwnlpBSgEyWTcYVfAOSYWex82T0isNntleiLYVepfaNrna +uN55vUX0cciwvzUp5GRl4EG1l1VLyGfrM9kIoIpCz6J+Us07gILc778F/z8m3xgI1b21wQ9ddS99 +HTRrgj5Knyek/1heSgRAraqCM7Ss2EzVEHfpnwA2+hm7xoMljKP6vaghY6sduPFEkYStgS6rWCvn +l7INwOz/IZwm58J5+PLo/hpq//XCxk8dVlmIQL9s994F1cQyJnwqPJynvhqEfcmr5pltjik7hMMl +1EqQPTayqW/y7kbM4Y8ewlEgWYLCex0dtFlE4IxE1uwhW7g7LatJqfxSL6//mDrOu/rCWt/OzXIn +NFTYN4dEkze1DOshzJQK4WGwJsOY0+2YF6ONAyJwN3tbh+zrSqY/p7Xz14zF3prwtbS6+OM3ighI +l8IqGTq1owyVpVHoqoPEksPkCfmBiQPo0sdHLKW8zfkXinbaVNCuvMZU+d6x2ygw8DiA0CqCWeiv +OyHy9+dk21L70HIk7KLUogzzn1xqSxVMXpJ2LutA7DKQUkRbefm4KnYZdpvPkYKJv/C/noUMK8fU ++3T6MM5/wmFxtcc0XjhddaCGujvobA1cYXGq5BzX9H9rpzJgcO/NF30STBSZfU+FzQ9AXjrHigtl +i0V5CoKzd0NItLEe7KckqE5FZMFeYfRtgmZOxhQP94TLmSZjar6KFV9Kcy8aqeOth1hTX7RgThwN +2maY0LVNsSVxF2BMxoCY6Y0leY8ew5qqjzUm7imM1qBjWqe+Y0FxjjZJR8UDG2JJbKibi9MHupCQ +xAHeXhHy92NbpS4DekCu/adduTl3tHwW109+w5kSinVDLwUuEl9OfIHv3Y9bLKvrRexQqV18DnaM +ZfdikN7O/s6NLUcxJWHgAIgXHqDkxt52g9CQSZjFAatFhtrsJgA2DllfOOtXcZo+Gw4Q4uk2Dwkn +ZP7Wr7e7hS4kxbOPeyjs1XUAIb7+CKC2T5Be4wDzcMpan/P1cW+4a7uPcIegoqt+/yiOUyXxFh5X +IL6iA+ApkBZXdBbubgMWWh1+edtctZyVtOPHrfNKYGsdOCXAXP62/o9sb+nufWF4+d+HKIYT49EE +pn+pVPiDDqQC7NKM3V5p5PHltDpS68fNTKHnwsiQA8x79K2jljA2KOgldIlkIeWUhgkm2mLs2w2K +PyCImubNA871LA74zfLZf0jo7oRle2ODOLwg74EZ0/UNcmvFr4fOtc3GD3PkUe9MszARpjva5mvQ +ds40lus9d3DO/5Rf0mhn8+th7EUakLPanI9V7ycUEusBg7b1fnGDn/e8+GAPSvmLvAEq/r3pH3+n +pZ48QN6m+f95JpytlXTbnEdjsHceicsOnF0Grcl/wmC/BTGLCnAhVPntlIrUDeyuPJmrXeTyGTQM +DZfRQRzo62fTNJhk73fQGscnkJg5L/38IRQF0aQ8LD34Qq4Jthvss/fxzg62dgjcz8zdLAgPbXOT +PinPSiFYKJ6ZxIApsJFE3W4IWGHEHmxvgeOFOhFViNpENshcCO9H89Z/2Q8UlhW3YbNZxDEJy/dG +oo4/8QCH2GsVhILe2SAR6y8nbstAwpHtWVirP0LzXg+OoX8bwdW2Upo8APDPZPwG87owdRDXI/o6 +Rd+e9D0L2hEh7QbtaFmIKKFoAE033KY1MGuFaWCtL6rFLN7oxCnWdPEoIZVSqL+jMR2CRoxQsgYz +Twsa6NUqmOAGfByBRtW0YiObWugh24bH2zMSCaSUFYwIwwUVz36kit5EqzcxJiT4gq2NWOCjLOGJ +Ha6EGS/S79KiXV1BaYgMGGqDg9oem+diHNgOJqqqKplE+1Muy8O8Actjn9aHv4Dmip+XbAXkk+SX +UWUXaro3m6lsmfwKksgvodU/hEonpJjVQ09i3qMzGDbbo3y3BBw60WEqUCnGHorEuejB1gONu0c6 +4hDqqM6BaUK+o+HGmx7+AIOoflqH5UTsz53sjtauGBScZxhj7nsWMJ4zRLRQ0j6nBfYaVxAMbTM+ +d7ez8LKWrkMy+qykEZ2iOfziIR/sbEoldsg3TjO9JJBkdHXN+MultJAPqqas7OnAZ6bgcVrF5Jp3 +kSTMBzWQBKLajc89nrD4HpVif0me4dPIOtJ+qz+FPuf8XdxAax8lwGCrAv2Y/xnB0ilTbThv5YfB +aW0QR5Udddvhie5yMzHQF3oikPBRFPFElRisCFvc8PV6XAvv/YDdY3YCq8yQq+B5mBSvrruouHdU +gTsLvj3b7EaiSzQJcBDaWlUaOfBWaxjwOJjfmym7I5YGFJ/2fyDbw9XJPfaDVPDddn2hj/u79SHb +Vyj3+NUVhPTWAE5KA10ZyLGXTCqBfMEeh6r5bM4wmtu6cYSyCjiBmaGSab77OKkVGsx6ZakcuQUJ +0bSVtbfIWFO+32CFlMkxUsTzFOjuW/TRfKgXk4gTdVlg9eRMpJLs807hnCdsrlJ7OGCMAw1y3vIL +4HKh/7rfrRkw5wRRe3mr9dKGCHA6peVxoq/f5IRzvmTSJHfdVBsWCbXwIYnFL7EAwiZ2IOJgv0X5 +ncZb+6j6sJr7SF/qGjC1igVbwu7gDyVqX/m5ZrWuqfVgcNSbakpKbXPeGJWUy2UNokViATX78bUT +nNZN/bxcmVbKFBhftwjWlEXHDU2ixyxLjejvU8pLzfj7LP25fIXqej2/kKqrGafaN0r5k/eoS+8B +8inqQU5ppdWfVAKUXKhPsFxNqlNI28MgE/O9OOUrT5eaLDy02HPUv5C6gIrmdzeaFaETo84pzF1z +bfC95TivClHIHLkt9n2RqZyXimTVsXHC9vmQlODBpJ9JmioJLX5sEtTMRli2Ra5ourW+/QS2vB1a +vPYyNyYAaTE2AwW+jSj5AvN0uHIi65A3NrhMWWJY7H/ilQbalmUReqDciygBlq8udNL1NqUun3np +gmStfjN3w9+KgWNVdpNDgIVgkfXCdOoGQlMd2RM/vneMlwJPyeNY0XpsG9ABdjnSaWaloSRTlOnK +bSf7J5k2oSGQ38QwXJglo2xUllhSl75ttgYt2WXJ92twsd6s/8wxo27eM2jjEJM7UPwuwAeRQ6QG +whQbnS437r1GmobBVfSP5jWpedGHWrTQIDueU+F+mkoQfWJJmYR3MVUHcG/ue33vO6PT3i1Srh+y +rZehSYLYaFNSZMzVcTNPaztdqFfxnU3bWB0onlNzlODRZ6GPv1GBwXn2KYhIwFtPEFXkoGFrOXtG +qWhgnZJ4sB0DkBQvy89cvMAgmBOjj+sRcJ/EZrh9mSTBlCKXPlrX4xYA3ewN4EoZ2YUhzaqFcih8 +viqGLiAbMUHvlmTpd+Qu3bBCBx+x8W/JB7tJA8TcKOHCUT0QuRVDqzxP1c3JLg8LBcA6aoFJCodS +OFl1rcfIkmlv9xL3PQiuIywle6tEhU+3sbJPOUFlb369jUEWKuXJO4DG42W1uu3dE61Cw9ijG0MY +thyUlnAzK+HJKCBm0ltU4ymwOjRrDp2y54x5ueAM3ch0PbVb4B8NY2cWtVXvHS/KCzkBhUzn0Ssf +clBskY9+cexFccl988daa45vEzclk3BYdwmwSmcNrmaLZZCNwm3JhCqw0CuTRCqxbOZ+xl3wH24t +uemTK4vz7Rnabwk+pCT5JnDXnO1bJ44oqOpE1ry+kIRjT0onbC/U40xmiPwmh6ieJGQEKbMfdtUe +y4HvnLkZmkdE5Porof5oHspj4NhyVhbCF6AZHRmgUHV6WVB025gfIwVS1IgCdPP3iGMOvxKEXniq +2kHYm8hUWWwSGmPIho1JmftEmxHviVH/4T0eZJlE9+Bm2yjXWWq04X5ppEf8DQ74Yn0dG4sYljA5 +e5Cjc5JdlZEVGJTiphAjuHX1s4eM+9Vut9yNNNRZKxBq6iigVSZw6jqOBuess2OtrKYUkby8Z7+G +hGIhzww6NrPeUBrFnIUZPba4vqg++mcSo4Au+FGL1/45Mtk1yRHdA0896FGmrr0kHyZLdu8URUKg +f8/4crXvjIBwJocLyHcQi7cqBpUm29R/Q6WBsq3mdEbhyNrzODsVBFG7vIpVgEkvaJN+lOhCZD1r +YsOvSLUmUtL3cvupJtYPYkttaT1221gyxritlW750QKtLKAmKmWV8RCkRfPv8ibSpLj1s71FmC+Y +A/SKhBgeY3Se8Fi3tANjf9XNU1MIy5GwQKNqW7PObP6+LEdITPTqKumT9RS8oO7r8cX29KaErBjY +7adq5foUrcE7KXZE4gYRWfZJoX5Wcf7PRx8OyniPjiVP1ZXfM/LbfBcgH+J7m0TgRVbEpP1VCEaz +AnG7KpjkItJjsAnKT3zBIVzR5bh/ZZ7AzpV9xU8yVxtGRAP/qgsePLJcXtZs+kDxAi14m4yOc8fJ +8+hqKQRfse9dJnh44lpztrvmdWSxHn7BD8/tA7Qm4X8obo7YsIX2z1iB70RL3oSbXEbc4nIcmdjC +4MnJX8XeJXlZYpZWsHyclxws39975YwQDAowOMtVlnBMVbMY3mn3Xju6r1cqKhCYDCBcO6Q8RbXL +scMBQTN3wYywh/9wqaWNPHiOvQMIWg0wIyG/rd9z44fST+UoasjbEwMs1OiUcZMUWc0NDY5n6aWv +EymjJpcgQVD7yIvubrG5rDVXsM+PU1dGMb71q+g0bicP8CSAm5svcx9lQSbrhT44WL2mehxNfbXA +NjWNpZEMoJT9DCjkjV55AeoF8o+qMkSC+k+R60MRfvpllFq4KeBvbnSy2e4yps91Om/1/VvG3HCv +7e9nhP80Meu74GsJtDfct/EFMM2/1oiUeWNs0eb3MGAYas1h4vGI+j+8ixViLVScQ66AJ7zl0mWG +G/vFrfY8G5HrpXg8GXR5yQ162XGuyxZBTN+pmaqe+OA0iVoUjtXNao4zwMO0mCwWuvfER8HQ/tr1 +NayvIxydWxZyvyYk0UlFq9Euy0XIaWiI3vjxEsMuyyxZ2JjeH9jH3k2q9pwBF3F5yNaDc6LnE+A2 +FiKY94NdDxEaDxHesKVLq8ZmKqw4tLQsDKFiJceT/qLMBSVts80pDVtYsCiVnymtzN/w9OQV+w8u +uGxekfZ6DZ3JluXqb/D2ZIM6IdnRkk04nfiwm8h6fWxn52g6gcz2GjlqskhcFN8mZBjR9MCV5oJd +S01UCvXaesyeDhpVAK6J1bcHa7vsoflmIj++Zs6CYDiftyo5ipEfR9w05x5kzNowto6RrsSTbE1k +9tGxAz/Kj85KaQbGyiFfdmDlVCx6cRWXCQUtVJ8Ec8EG6Q6VAkVPZuI+Qiy9pSqN64d44KDsJY2X +wyEl4bLGO6frPtxMt3hhgTKVUDlmzFIfKap/WfiY+YlhRExIvZgmYip/8NkjBFAYRgKJl8C/vjZ6 +Ba9+fjMN0ku5S6XPppyuLEBV6J+FPJS2jCVqtlzpWnyiLy5M/vUOZsNbjzqKRBt9VB8FI+O/vmwM +aEfyv+2d31+EbHvvFr2jDoStYmoL8nt+SdO1Oh/nubNxpN/EnHnWUuUQ762LO+w7oMXmi19hmafn +u7P7QJUghSkaJC8y7KUSqM416QZ2L+bTH0y6HlF1sK+x1YA3dYffnCMBiXIX804AsLDKE7Oz1xPt +Qe6RPP1fessczXYG4jB84+RGqPRe3c99Pab3Og3kLSonmUljkMzb6WM/ZSdRJcBvyCnJW0+nrYPz +is4qNC2WAT/pEF0f8cvWFH+FMvryNC1IWgmvKCM+K9Gte/TH6SvODWnFhAcLDiB9msrKHIUq2pp6 +EneRUXPTpePwTY8wdm33YtzwR52nlUW/waLpV0MVMu8LBr4lGSCvTUiITSmPKDSEgZOdh3LQ7W09 +jCaeiTA4tkXm+6EKhfJx3WBceWU58OYp90jZ/5JBo6p1nIjteHcloZeEcwpiuBImXYxywoHcSW7f +YZH1W2Sn8EaB6UdwvNS9RsNGCVHnledAJWX/ie/ykJ2eAT1+LUdiFIbpbO3B3FnYPOIlLSxAMn5n +rz9SqwtT44+PKVGm0ojsrEJzkHbEixdy+etdqYfoCLy5oL60YftzK7bpf2qgVc6v93iM9rjoGSUS +FPY5YMqDjEPl4eWjmZL3IRCm2jKt2yFRcMUAJN1N4QxilBg1FJU1elksEPqu5wsXFcHvIj1eO8qr +ikbN2JOGnuoV/Bf77OB2mvS/TDsWbpaB+EW/A2uNJV0YvR/lmpem04Dg7ThgoWgT8wmPCpp4Zhv6 +jCuLxaEnZ7Y/UloQnivYe0+uj+k6KROBQ0ov3dW0xJovBjZA7CffWOKs97eH2sUotkUKrjQgGsnP +ARX6gjZKMbj7Ee/QXg5SRXrWRSMQPTGEkCSIIYFmWBzhZXgf6UH6AzKWyuRTszGfae9SvQhvZXZv +oG5cnPM8tRa54/jZHeVWdMU6g3EO7yVd3nfVyNZU/GDfJjTxI7KoYM/C1Vj+W6YkoqveIRVsHzKT +EIMAZlwEUFOxM3Q8HPU1L1piAnCCOCIlOZmiA0N4EWJoqvwadvCdR0hKPKnY+KIGYQh+T9nzJaw/ +X9siFuhvTlna0qbMsRyLYj/EhecS3+Ix73QpYt/4zlFEDENCOwOYpCeod8E2+K8DXih0yLiesDSN ++fuOvjHTDt/4rJ3tjTwBE/Io+Pg+/er82BP9Jy2evVJVoVOoTCkD5Ac6Xn3+X+7VGNoXRd1sOZ9R +DaUB7AFxgjfrLEQeWrexGmb9Fuy9uRKRwygKaKqfuPypEs15Tx79ubXO1l7Co0RTkDap3NXyKSA0 +gD2AXPVRsCMJfJM/vR4wXBnGgAHUZ3GJtGr0Zh7qxt/acrTbY+OIdpPtsuNukHM7TgIUAb+9KBf4 +1xxQdJLM0Ayv8qH7jaq0LPcJBvR2DOnWX8z11qSZee8HdZRrYBzxOj7qbX/JV35dvdhTuQ8w3Ump +wOsFiODOYDOSI6s+wlVqZpFm09NSIdKOsHNZX9nC3p+xP30uxB3VMWTurB3GG/iYGSEYBV9OPgKC +A/8kKIwYp2jBprkA1aGn+x2hgdEJUxE6/zsBG0TP7+Z/mZ4qThzbKi+EB3ZseSltZzC6Ls/dFCV8 +mBhu/0uw0B0vfLuyrddhQyzy8+wW3lZzXazlMnG+8vtqaaGnFPLb0DUSfb2Pd30PZAa09MMAFN4A +4Yf9G+UUGvGhN7KnB524lqovSpTKSLJiED4CNCOA3iQ19y47zl74YgCeHmv2G8Qv/ovCKxt0ohxH +SGW75MrHKduJJh598Y5xUa2uVAWPpLZ61pA93a/WiSE0f75zvT5gMUZBUWLYPc7/bikSLTndIDnH +zOOmLvbsYSDWOHF7ksaLxMOLtAFUbtSx4CIxtt/iThNM6l13OwKjWamEUoT/JY4V0XqFIxc6pGn2 +BVnFbQmLDI+li9K1lSehgFhwe457iFXAiF7LVJnqHtR7k+BrTv7c0P0yjIrIhJXO3uydcFGN41wG +tYnKSIsDNSJm2aai3d9qkAaaplLZ1ufhdEwBo/vKhn0n74K3JooQKEL8MYh4QuakwQInwXzDZxC5 +KyCIzJvXRPfP9uiHP/uA4lxBikWNEVd+Mb1XFlISlfLNhSNmhd9TZZ3yNsxS04fWKI0iZDQKOyBb +TwbTXadHZrX2RTp6eIPPVEB8T+nPTaAAdDiPT3u3yy/+XLCZGg8aGxmh+tJhCWIHRO5jKRXwXTAh +gS7htAVvjZiR0QlfVeluzzxKsEvY03AdEa4KYz13dVqzHsDJBDhweviPgeYc5dYniMmzb6L7hfnv +9mDKaqe0x0KKjFlw6Cvn/5YCDhAGKJdt6mQ7rZoiBlxYuZEXsINPqCoyMBaGVTnxzBiQmmBOQKpo +vvksTaqJ4VeV24JJgQqjWGoU6VCjIblhhmmSUJxWGbvIvnQ5eqK1OrYDIgB3gmpe+j2XL/xN/DR7 +f2A372BtUXNuCRrSkinsfoTQFJ57X8j7ZphPVbMPW8Kw3YMZPtxpxOrbI8cvdWfdhSI4zVxr7+Ep +iCUo+Ci6gn0ubej1Xi4W50aKhK8+X6JawH7noQQFjCiUvU/5KPRPP+uhGSARNUGVSYMGGCFupk5o +oJNQ3fUy0NUfSiBC1QBnLM0lPafoXiiRqwMQk/j506wkgjinyNv/cfvWufCAHZ+52+BTqMoQ53pL +7Dk6h2ev8ja+74yg7nCWaGaRrpSCHULNEMRvji8wo+DNUoyKs/4J+ahPybkeY6EqfxfESCAkj/OG +laqBRztg3njA6hJMQQmMhGzEMIfWTJ4n3PizRZKEICKYirpH9ig7Gvo1hcKjDi/BQbQTnyug8Xft +kMAkEjYZOio1vLxi2tew4CLTEEDP20cGMhqGwAVuqsuJ8OVcylhSny9kE1fnrjl3qHKNmblwm1b4 +JrOqjkFRrxx+gdK3wcpJHVCifYbftM0quCi6eNqWA8bR+6inZtCpyrYoV8OBVyzO9M5XaTWZ9xIQ +oA8R1OwN7KvVr1MvBb+NP3Mn3hZcoXmmAV8VgaP0IF1DIrv705Q82tT5q2GcO6AavHoyMvwmf9fN +EHr4C6V0t5JM0lDK6jS3tQDYogdbeKNz5lwlBJ9MnrUs31Stkm55SJI5gITZdn6EeUzmVBhD/yC+ +QzyPpJw8TUEbemZLI8Ad3SmAUF0O7/Su7Yr8pdKn/c5+JnVMNLOlYDfBM9moVXjfbrxDGPfi5ZVq +jiVzyNnJEikS5KZQhSouPBYYzjvAw+iPyAtS/qIwwslGALZu2w2me93c4tup05eLJW3ZeIqawUfu +4EOTg3hotPT6Aqz4bwy4GKXFgfASI2/nplUA1daHX0kz47RlptTlgcRIcW5/LNzHoKNVWoZsRI99 +3/IUjnj43kdmBpClaF7zcMgqEAK2Vu4vJ6h9gIGioiDda79O4pJwouvH6JEQ71H/VFWlqIS12TmD +BAKJ57Gvo27vDOUdD1Jncx5TCHeNU0K9+hKJrsPIiW5tQhCVmP6HKdtaLDQ+lyM/CQFEmgDh7BIY +oMyzOM+wHrGQ68Bw5gpmiFZnfyVa3WRhCve5ofyRpm5RCXbZLJOcTCr9xJ0+kayKlULSGmMMGwBl +O1rUlYJtzIbcFJOBPZlMb3wGWBXb77Q9fXNlGVo400+0bW3PIPr3dAbAeVW2k2bM7Z2STLA+bNHT +YXO4M0gBmTTxGIb36qkIDbtzWKj3rWBEsQL5du0Zkgi/CTmOEAI7xaAckg4LdmPZLQnUNnkNGXOB +z5/VhkbUZ6tlCG8VDE7mHXjXpgAcmhIYYbhZfVXM7uEhzY0gY/Eb/sezfpbiy11AymnfvlaiCa3s +0Y51rizsfzrmC07aQObRksTXmrm59janxJFrsd+lunTCXrimKWNrSqPH3y1GYs2V7sGm3SWqcp89 ++UY+aQYo7k0JMLTgZFr9oHmePxsjpObJ2d5Cn7i3LR8vjYD/+ti5ChUGs0IkI/8DYMqmkWtlf6YQ +h5AoZzxlz84fHRBPM6VT09d6xOZz9EvEwbG/9PWmRjpmxP5jEANA/Eu2nFuyhfjW6/hm8pSeoGAd +WXg+3oM5NRijTpyWdyQROB7D7AnoIrcpnRUK1YsAxYOKJ/WfEZ0GTfE1GioRi3A9ONBrofYTSME5 +sZI9nqPEkgUxsW/b8YN5HNxs77P4hVVcVLiDhJrnIEaZKRFOZQqBh/V2h/qvWZ5uqySxGxt7OLPq +474NkfIhVWtp37UdSk0P5aRe7Q+Ya0MAwGuB5zzyfsyze1SX5c+JuEGf9BbGPHYahoTzHGcjTGwT +MszXVIMM7+6Jx0VHXFKoeSqafPCYOWjlr3ftgbDdW6uMi0iXoFbh8b+attDcRtDAcR6ZvVPbYdOo +La9caT9d1UUOq9WRA9plDSaJ7uR3LAimrMxL0q053veN33uXvEEssZiVzQexHe5P6voXBxqK6pWl +FPiu42TT6B7cnIZo2P2yxUSbAS8FhBy+hIcGGBJi9A5h/g2SGQUmqsDqfI0UJdCsSMNIOOksyDxS +xd1sJTaVpO6IhEn75QZBf/7nRizQaB4Bl1sLSHzklJ8/Owoyr4j1GxRZ3bmszAcrVOYIyNP+r0W1 +utz7+c3VaTdiW7Y44lK3phh0aMTOleLEdFWWfJhRMXMfOdezWS8ozy6CoBAdTtRwJkvY+kjqjRPA +iN25AUN+qALvHGipBUf37maKHlK+Hzj6kzUypUq4/gnWgWi1AWURGogrSCI5IzT/7plqgvamaN4I +IZ1XXzYZ2QE9idMLRkjegrvXGCATfzjhoexSqZ4I2kVzQOGZIvcDTXIRthBS5q1gfBXmRMp97OJp +/0t7o0dkbbwiCa7CVkm3AiBWIdgLVBIrb9P5NUx4Pr5yJF1EnatHe30ixtxaM12AEETsAhVU6/Lb +WonzXTO9PMuubnzhWnlXfEjm06uIa8dH5wJik4IfihCQ+kOqV69QiLEWwpNqxrKd3CM8vUOQ8i91 +1uWOH4bCaib7CSqpCOd7JPEK1EHv5gYASGpbxFivjstaxO/NNjdgMk8iMK4zTNaehuAvdgewYMXB +G0GCS1J+ZNgac2oHa1xGkGD3n4D1n3BLKPz0472/vaaB4lrjcl63835lIzoUOJnAzBKgSBdc5er4 +3XT25kdMQH2FJV60NkUEf7YNsRviMT+vZEprIGdpxR6VWpQvIEO3NEw5HhIaDTVmGBEw0neUEA2/ +n6XKuV2ZU3cnp/4T82/GzQnk9KdE/Y2Y9RjbPfOLbKC0OmoJhvISfyG9LgyXKghTMT51EGFTncF5 +sW0dpUIuRHY5zIpHsNtouhdvzMVm0KoXZbehNH2QJhvd+iFW2JSJdyDT8fYyfpK5CZv04ZOKMxWG +a5kWv4APjG2bgF7Q0WHN79+CakJjmWZJmr2VeWom6SJXRxH9pRMTqW2VxcEBnetA0xf9nSitixu/ +Wf9EhJI6NvmSRnTDHErqxoUDlF43padG69KvTGDpTKT9dsJ/+2U92yfZNhe8vAxsePmGXYUxXHJB +9hS1PBc91J3HwutvRb1uhN5UgYuEq+qWYDO3/G79QP5/ZIUWB9c0zgo3n/junFzFCi8vDqkISYnF +E0kKF/hsQZ25vJDExLQfqFoKWR9PQN8sXsGXGmiFX3EqFNtWur0de+W/sNZxP3MidnMVznvKRRQ4 +c9AhITxIlj+D/m8pUr6W2CF7JkTa+Im5JPqEerEhRU8Iecp+KV+PiOXAkwtZYw9HMC9wbd0Hwy+8 +itQH7Moka73hwCnM48e7HurH4bIE+eV+Wi9bEJEt9sfs3WH3tEfoKNLTNDEUbV7QIqMxrIS6b3St +x5PDAWPyN0oyha7YuZc3I57AVW2hJF2cSXGVOd6dXbCeFHVjUP/syD7S3XxNkkbHsIf0/S9zxpIa +Tm2nwN3yyFfeKth3akC4NqqlnltAXmEuN4JrmcbJGjS91mTwHJbEWXACye4z+y0EA/yoGnC06Gyx +jyWcjEOrBzIIam2lFR3zPR5lp/w70pnktRzOJ1w5KI960y+uku8B86TV4OnPUxRoXBGPO1qlZd5p +tLxpSJ8+NA3vS/Jl2+DMg1macFKI/LhWVxDKjMNJzTGzg3v/KuNN2L96kZg9/ZF7VNYuQ2Xp49Fg +PeMIoKGk5ZjA7KwwWAtpWvDm9foCv9F1lmVmwRq2fMQVgeo4zjKtCBGgSyanDA1+7FHsmzYqClTN +8jM37WmRslzQt42AH2qaqCsXcMrKbCv3f/RgC2241Ni9pXiPzCXXv6EgLU2Tu5xk9bpJ76lGwnoT +Vo5aqd3sc1sbeZUyhIAEcB6KPavh0H9rBfMD+lVUwjRgLDD4/Pv0uiZwhJo77XlqHcnGB3zrrJYd +lQxGR2Ecu1RcIN61UjX0Mu3NNRs9bdGOmI9Vjn1m4lj/Qfmw17ZmEPnka4ruCHgCyIi9asVs/9xP +YYVxrDJJGO9cCgscUwnFQPZQs8w9PHKu4PQwADuM5ifZeM2tkLM9vGWUbivjwhvZqoZaHhC43n8Z +S6juE3BhUjpWFbLFbtk4pGsVkqcarcBeLXUespPl7l5uyoLf4HbQuqeiMfYfusBrlMgQpaK3u80b +vG8YAP6BkT4Zg6K8A2yI01aWJtC+DpWrvc1p6rKbLXQNUBZaCNW0upB+P5zTIyupsi4PBvO+rhon +BYqxrGgs0pIuGMPy2dpYhXJibFA7LBWi7XyZBQVmBFStHf75PjimVB2ADZ4sJeJqD3R9BNXjDsVD +83hsH3zBWSTf4sL3vCWjFiDxBGtCRIJuoS1IajAHTHovXxxJPqzmkQm499965WBDSC/dmGixurGQ +rQ8AAXPdWFmyF4vSvRw0CsG+AxRSzyE2befHbKsnecprBklV87FNO/SRWBH6p7tb78BrpEPXtYQS +uERdOgoGBFd8NoiBlv0Cb2pYmDhJrvDpVoovNMzw9bfhDDQ8DuLwBwauRGCheKzGO5/RsASFflcu +zqenIsc4o40toN22PIUBI5kbh3f3uKjHt0dBm02yXzqIh4OKc3t8++fomdozlnf36U0f5cZ0okHq +bBEiJEibsdeCMslWbiEe47jYsLHh2jlQ434cS4dkjpw6gs78Pqx17FGS2F4jUPvduJ1yDXfKhWz5 +IEEjUoh/XZdFHOXXI9N00Jf38H2fvW/UJfT92N7sjhKluu5lu855UwthGWyh0Y0KyhYAjGYsWWFE +xIUrnVgybdFZZUgE9sY/vWLH2cvPDws0Venod/WqR6kD4DvjTXLgthjZE2mIKAZqMePiruGroGqu +GhK0WwvRneKSuxVEFHVaz724upqEbCiFBj0ALoitAdIIu7QGGgSBri9grcrgNCpca8FRpRM51AtZ +MEN6EF6Q7oepaOfmU+KTkGbudd4+4+OiZJmISBUYY6NYEKjRQZxfwvX2gBD04ZSpICL7TI9r79Ru +ToVsn0CELgLd/9wIdHj+J9YADkUT5eMZdg3aX1axsqGHL/50CKlkaqMoqbrqiuwlPMZUPr8xSLzd +FejVxGubuqaz/BaHltXx6A4ic6WteE1rmcIAnEwCJ49LwNoV+GspNPG5aAl3rS+IHp8C9GeppczT +wT/43CxNvdok3RRwRcJiycjM0lUYatvG8Y4BqYrDkknQHD4n0vonMY/VXsfW8bfqQXWsljA3XlfZ +iDW8ZT+M4/SAY1ouOx4pdbz33WMr19EuDWMw6f8H28PbOGxiChJHFiB7Gv6lQG+If0lhUSNcbdx4 +xVmTKruyon7x4CUy8aca/8w1tBb9I3bk65iXs58TaWczMP/AlRuZkCoULgtw9WaXnnAmgWid75ND +V9m3QHeai87RhOYK69WWFVOcUJlHNGMNIHy30vtc3lteL1e4AscIdw57eGscEkBQZ+D7ssnZKH2W +3zyKmHzbUm7g3g53EoapfkeCJmpLyq112BmvYjzWZRDMfXixsb5mZD+8xlfPGtFaLpt4jrgNpBci +sNVdi+czg8Zfya4tQQM2D64Xu6BQVCzo6J+rUeFh/J5rR7epo/PUht42UmoYrBt5guJfdoCcrZV4 +GzsMJaeZuKp1fyKDsj9DlyXYgng9WQtgdtd1WE4WoIc2Z86Go1bUXKHWAFFeu19fTo47VCCCRomk +Bl4nKkHk4tp3CbloGJ5nmARbgvHxEjNp1q8GJqfpSaOQZ5IoQgxgrL+fDWZd4FxVBLOcrx2p/7+F +S8rPY4wk8Qv1nHCZ/sy9nlUuyyecZNSipD3rjzn4eIvbcfaOjPIUPpGPQ5/8TgAGlEIgNTT0VRp4 +oAT9jDV7hMtawvn0ONURo6opB5yU+9IESjGgJ3ohHxhAhP1+qMtNcXN0XGqkdAhGaDlqFEfV1q1b +up5+Y/aqBGKQkVM8/BZq6KGbR3vlD93Zg9jjGywyb/alZ5BcnsCOX46b8IpcmZmkKJamtyhcvrMN +D2+zaZiVg5pTMWnvqsjK7D21RGbvRBMKGTlz7nk5EpBRF5H4p9BoR1B54kijPkmFPOWZykuzdsWR +gdFxIK9PWiERd2D8hEf2XVox18rrjipouZzzKEatR4DUI6qSBUJo9ikrQlsYeulKC04+DFmee8eM +b63N6N1EFZ3if5sX5waYY47TmwO6P0YA4/cj7Rzfd2DBawMWv5NlFW7akAvsL/+2pY/moRuiu/Qr +sZdGNvtgbHM1vMTWrB8NLe/FNfOJL+Z1nJ8ASJTI1EY3Xe3NIvacOiYIqu+OJA5AIMBuhOZGX151 +nVJjbfNf2hc+rtneb/V+ru389oDuYLWexGqzzJVva3Nnt6xg4dtnPbUA+OFmGNsFrVPPWYOYXVm0 +l9aniPuCgvZG0d9l32patLRpBCyxcHMdj0vy0c2rIbsDaojHtuK2672eHwqUH34XVkI1n7zgGPuu +Woft2mAs5J/RmNUJ+qnIpGcstg5k9+ucHwzzrAhU108VdHCLsz7RZeKasfAj4a8+A70GT0roJ/le +8gHZbeEpDrErDl9Kk1sye6hQcOYoiimmCyLzQwen/b/I7e+mG+3mfgeThuMgDlrUdD0faaV/D73m ++zIpOgU3yX9tahWWOgmZk0lbdfU+ckDPsl+ppExTp6YocewtD1yRayxEszQBkYR76pq4WarH8+Aq +7464uJqwa4Nf5SFaaB5qQla/CSOf0xrYgTnJ8bEZujHeF5ycTqPM36LvOs/GPSQ4eDd97CeMOIyU +oG4OO/WbhLfZD9XQFVrVjNEEJDI3RYZRXSjTAVkxCgP7yKTowtc6CbH0/uNpS0YCSZzaMcbofw+V +Ah+oyK3iNU3gy8gWd895FIt+EffYA1wvFxCxD0EzSNUswrhz5XESpRGnqhn026t1M1ffu+2z9NGH +jMqUE2Qc0AapVKgGfvyhgB2qv5qTKxkDTA2mjWmdEgH7CLGfBA69XwbqFvIf1Wvx3ErvJX9qpyN5 +U9Z3tzCET8O8k/exMx7s9jJHPwoSOYFeOM+sGYdVNCkcvwqs2zO9dmQ/7FoETz3eSGGnwZQrUy6j +4wiZZywuyjrT4iNuQs+jPxz5F70PtV2ertw0cIIUQfF2qwgtmCYBzW3yz+V7QZUTgw1hUYu4mffr +HgMUo6mU0dnvdV8d/xzQccA6yugcliaQ2yjOClfh2k3qeVGUnc5YYTSVXIiWePFCyPNpzoSuLoNW +GbMXHqOh2s0fqt9n4gRBqsGZWwFSyYPFEulQWNhpqffrlcvi1k9d6l01P5uTbkaEDTFdOw0pfb8T +9lh/pH6bEnjwNQFpjNv8Qy50QJ5o1PIOP6uzrk6QlKPIwmsvZokZQm83TJwrSlIfisd1VoY2CeFU +JJFYXP+HQaWloD5dVtpX1HcCGXXPYXDlfycZgWHx0VEeaeLxw0w+glLOIvP4sGRgx7oxeAWJRGUy +t7nQ/5jKBjT6gNxyV7aGo22Z+NdGWkvwt2jtyQirhBNEy+GViAs0L80Oozlxdjo8lVjvEtUNMS2p +p0O7DiBKGAETB+x6t+olRQH9S9qcJLRsRLpAxBrX2KZ0CmZE2N++/M+vo7uH1luuNWBqle8IfqTd +V/o1JLclki3QHCbKW/NqFJCvV82a2BOv+03zwkDkXsPZrZTtwnTyc2aKuI95jk8uO/U+qGuDjhQd +87rSMAd/nPCSJ4FAbmKH6lF3GlXLoyM4QEgO6GMPrEHhXM0XhS2H8nqodeUTqUR3G/bKII7qr8Yh +7ZDkm2TiQd/h/bl6rKY6mdT9DW1u+VU6T14NwM1d51rstjZ9PZL9Qn88B7UT5oL7oMm5usafvWBt +qYLuqMGXo3vsiwBDzAaUbMnIm5YSftunNsAtMkqAccl5/H9G8s+APN8pMf9lQ1nAEx4T22yX0tO8 +6Tq9CS471erCpQy/QxFOrA4tRZ/GGpTondiam0Spx7Nd2V//RdoivH9cSr3pHJN6LOUKyPrqVKOj +Bewdi7wIkC48+igq8mzb2SsU/f9VM3LiwcW+xGxb+aYNTMlHIo+M0HJ8p7Obf0qrVEpaoiCYfxKh +mku1cAPT3QKAUwiYkYDI17rVXYEUuckTNNwQqqWtBNqUJ3P6TSgDwTWkYPykWCaLuOX4NsO+d4ZJ +6W8vFMX+EudiPagCl7pvKqdK40PZ+NPjU4xE1xlDfNgjrRV5IJO2WahYbQmbiGrxOyxADvcdTVph +/fiMoRStb5cJMO9Ro05Rul7qmTHSYVLZb/vpXFQo9frujAXlpgwVVi1wyBvMsPMmz53GJDNpDK4C +Ma0WWolbfQ9KLH6cG/Sv3ZpnBHOWgijLgNRktcKpSQeFigwSqMR7be3j4vE5wOs+lxO/8VeVrab5 +Kl/Ok9UW+/IEHjo59MFXlRP3uNxNbAS8S4vwgb6pbrsk6+9Vv+ZoOM/PDXvSEuuQaIrK9W6oFIhc +PH7tECfp5Wo0Sbqe1bb8dNMZXjlkutqupUTU17VFLJWupHu1f5IGKAzD2J4mYj7y2bgZ3i30rZyn +M3OgTECf4440aufWRxveEr3ZjNAMLXhX76jS0ZCizIfyxci09s7L5T4tFPzPBuN79HdeeHtXYoeu +eJjhyqs0wmVb7xvvQxc613eD+Ie3CqY41wu7162sn8B8d8xAoZKMY5bf7ThyLGxrJPsszkSxE+I3 +65zDgevgdSOSvxE7bPM3ibqqkPh0YjLR/+G16oGkb2uK2aIvo+QGp0HAeKa0hTaemkszD1Qb5lQ9 +FOpw55PRSV8VFbaeuJHMP5Ki+Aqeq2zkLOQSQXmiIPuLMJtXZTbE5tOJ1vxztLeRRCXvt3K6JmYB +VVKHNBFmibEmj4Dbhy0Ya5qWscwxgnJEGGHOu8XKG5s7Hl+4azkYAyexivWypalxpwVfXDrBlaQY +YQ1djwp9B/uSWPym2kAU9Q18+G0Diu/GTLlaTU4lVQICvVQkL0z3oeD3Bp9d2KyjDZb7RHOYHYUo +tlGfjD3CfaGCsbc7G1xhR7xoH0WEbhKXGH7vfi5iv6C5zlcVjBKwug43ZLqpDzbop4LviDCKI7tS +zExOGvhLarGFmf4YMrfUrH1toZ/R+SvVdkkRyDwZEOaVGfb4DIKKsoGkf482R8YQp/Wbgvo9dWBR +PWmN3EJUtfnfSdAKB+vIFCE7EmHJlYyXYIjs6G841uz8aDxTedFFoTMEQV+oC1GeY46XnGLvMy+l +WRqpPhDrLfs28Dk0VlhPutjTTzTS2b1It5389f8U1M4ps5qaPD3i+9OWAkLWfUrQXBgen+6Vprc6 +sD6SNra1KnQPklTxdGeFBnETy17dRPKGaMfnntafX04leWkuCB/bJF0m+H2kRdiG4qWXCRsH1LyX +w9Eda6uGGPYn3GqV1JXSCkkBx4VU8u0J6yGgzw8BvXSsm6BHacTRrkBOCRBx2ZTcSpsFN9MiW+rG ++jC/6j8U5ZMaAs98zqCV4P+1cFFW8ES80HFf8sjcvWCER/hjAH46RfOE4Av/LjMkjRaH9rN4hvR6 +hqZIksZBdAtfBae3ExdIIYmYlCeIVHI/IoYUfcPM/Mjh7DT846GfFVbmGtPuqJJdlZH/vl5e/g+/ +AvQRjKxXwRV3R6xYYQF8PeBIK0y18j2R4JyRnB2nNxVxs9MvySwEEXaaIdawGt6y6mBavy74NbBI +xjNJseBjhdG05EqmxyFHhTXdII0Hz+dVKjl1Ug3cupPOMskXmqUl3gOZ1JFz5AlqtK2IphqBAngZ +gjgoBwzoC5Hnl6WqjmNwTSgOlcvpfV5aNgoyXHfQ7G2xTnU+ZUiTJSLCibi5imRYVJ0Ix8nYhSOD +aECPSanbiy5lqiPiX1qlEGggO4eGjEOHseqkNzsjXQnEhl9eVQNyJ1HfOUie7NWQwNW80doxhvS3 +JAhR6/Qzn6oFZbVmXIkFjBSFD+3j1WsE/1isnh+8oVA+93910dumON2kp1lBlIUlusIziIufWIIu +QRIalGkxSwaiJ6yiyL9SiaIHjPgguh42CO0Bb3jaTizkHXqMgzLGhHp/yhwl1E0bwUqO9/SpgeeD +kyZuH+j6jh5lyPsh6xr8Ykq5H0tJoR1YxqZMR0W0eIcqppvDGxoWo11Jh5KkHXXCk69RCfuzscQl +QRn5yZV7SHq9Q0D8yiwXdyjPV+FVO8bCFo6h5jZUY7CBu9vywFRvjkmXgZyQ66hzdqzydllf/eyJ +9W26fNueRinloEnFEcUSglLLypBQ0tmQBgiTRftHlgR2NiwRAFC9o9VgjWt/9nolPpdal7v6tZCu +YeuGuMCDNPtoqYNOQFtH00HkqmQFDm3SnjgHisbusxTmMEEi8kGh+LJBByDwkHoPMiTF6LZKIL4S +iVRAp/6sECfKd21vsxkzscB71rN51MLP/8qBcXI2IGSZbT9KqE++/FwbqbCSjQP8N2SgsdZ31t52 +K9v/qUOjw0lRdl+X5IUGmYpewj5oLPgNGhYy5P5aAukvXSiDKqfOFkREvQt0R81XuB8w3j4mys2+ +JZJA+NCY/PPYo96o0rKiL6hmzHRxsAflVy0VKvxIgVx4BECcme4qAwczYkxBy5+bZZ98eqD8pvji +ktGhkVcJaiTEht6dcIdDp7pXJBEMCTjSFwyZ4XCVI3fC3rDwrkM3Wjn4ui3k6kHiFpygDPzONJzi +PMM7R/t1zN9GXUSQWzuOuXeingCXicAoA/t/2AU6tWxiGBvpiq4f2VD+mq6CBeQKz5YU/JuMp/ae +m592p5XepDpotwRZTb1pcreL3AadMBg+z4leQuEuixsRXJKHX7BMGLYmpNfQdMsbpOidWJIm65T9 +0g6EGYoXG1FiUn6uH5aDrdT4If2SvIx5Am+vGLcih/97hc8Dm30tkjOiTpCDrBKBzkse8mT/g4Ej +o8kdv6EaEb+jP5+sj6M+1V1pmWNc/POQd5x4UVEcDLwTT+UbTIojtrIIy+OAbzPkR8ENeIGyABjR +tb2QCJRYNIcBB5GaSsgugC9YDG2sgkn9gYH660L7FJfaTMEfwpgQmM/u6SE7OCX706sxW53vOD9g +Enj5IX1y3CmATe3FZ+5iugld2RPeQrKoMKcwz1Z3ADiupEVoIlLoUf8/2DoPnbEUVok+9wIswVP1 +RFwrUS3IZ79+FMjpy9QhvKYElN+3tQvJw9th1BWNSaINSeRu2eMojK5QNmtPvQWuJ6wEZojIrye5 +DIpCCqQ9Np7Mos2M6+JMnpWtGJyfRj0vppwMx1LbUiLknCM4eOcbnf5J6yBTA7ucTPJnuDlMVGCq +n063wNSqWI6Uoxb3YTPoes0yDjZmb36pmUtaWOfaEKQFS2yfUz9hputrfYNYU/8E/6hKNpE112I6 +PiOZKaXY2z26tRWAtzIka13Hq5u/fGI37iuny/2YqnY6oMW3s9vXI6qorFjXrDTRNTT6x7d38ChD +iXJ5cK0PePqimf4hRCChFhNpPSjyHURtCcdQB1lbw6Bv72UJBKACkWrYw6mvUI0iVEofL+BUSNQW +iLl0BNsa/8lMkD+YXdYyvDxUsEngazHKGBaHBHHtAqgP/IRugnv44x1G1oLGSsy92IpLeUQMmRGo +AVVLTlHv6mQsB/KvEC7l/PSSv9gAPTyFKQkEGxS2dGNl/dO24ZVwACXbB9AZl7L4fnk5eeaeh4d5 +Holq6hCzpkKm1laOk5vas92XUYxHlFADZaeW+ybvA3p8aXjGVsXimqi8LLTVmQehivwrI9NimUog +bAYFoT7axM1ny7y9kBLKWzPj0KcBXYNrXxZLS4mmacYWjAFPY/y/HhWENvHqQS2RFxSDOHm2mhjA +k20GQXTqtZn3Tg9aZCwww4IUbeyltF+lTX4socbCuCbrOAG5ib8S6pWsie4X+P9o5vJxSeZhWErG +oWMSE7jRXKoMETB3cLv70gVvV764pAMzfb0jg4RP44CQyX2J7VOliyTOnkquXkItWouR0hEGsLQw +PN2TbNiTSfs3Wd7pxy81bjz/5lNWAhTCI3Kld/ckNsDZ9jZriDnVtuhjtdqMJBPIbeLxPgSevfsg +zo8uq0BYJAKJpsHT3ubH8ChhUh3rrV9ZuLpvGtc7neb3uLhUaCMgRqI9ZP9YYZTV4ajBwBRYdB+c +7BUeGRY0Hvc8Z4rz/XgP4ZnEtIMEBEZ9oQeIJ35YAyCs+uRVpGjBDBUv5eYgoduqtSoYpW5i361e +4JO4NLk5gTQaUy5M7SGGb+R+IEK74yPvaNpKqGbNajHGhDpVQ9MV9KwkKD6UVXNw/2WI78fvp9qC +69aYCslKEvMzk0n8eLqs+hQOTOxyKdSTZXpGBwcaW2rxEK1C/bpm55AQqH3YdczpjVJ7JcjPDGq8 +gnv3GxyavUW5E7EnNWOSDlxlWS02MSo23TZmR+rXs6Wnc61vmyZCau7SlIGh9WwsriUH30kaersO +4M6hDD+nzYr3WSBf0WLnZHiVf4FXMbh22i6kgpmuvhi+LUAxmz6UKKZulWLAn0/aNkcL4X3Cy1Tn +sjZ9c6GsUX75SqHDaDPARCMg/b5vf+KVUyu17Cs9wPx3ViTqHUKDuRmnpCd6czjxgrH+NXurwPZX +OE2x1xszhvOYyCKtfvlYkmKddRUzWL6gZrlUmDAXrkW/2ecwx4WNp0LVW2XU1cBTPq2Xp4nWtmGs +qlZznbzNM7o/Ef1s+v/DW7whyLJ/4sopRr8bpRcSmgjh9QjaxTPpdGQfUSt/ro4yHtbtKSVuwDoB +Hh3CGUKOTgMJkLk2leF8WWSuSTHWoNMCVs5eZVlDO9VV7S+eYOx3/yg7EENqQ0nG9WE27sunxm6j +RRFZ9mKdpqcPqevp3USDbbHKTQSWQKdAQy0cuw4TzLRDi0QTFelUlVex9zcKmfy++0N9SS+Gqz5+ +DMoXCsk7Q61finA+3UFaLoiw4ZEet3/ZCsTqGNVKWcF9b4W0QITIEGjxYM3UEP50T+UFeY88X9Ia +4q1LM5D0V1xGuN546l5IMoK7mFQjy5TslgD40opPKJM+vA0ETzyh4p8qO7FoiX20VABvhZtjzRis +qQKqQ8rPzJM8PGAJ7HLbesv11DuxOeHAVDMs96FyOwnc7jYOi03dI5Be+NaDPcUm1SBL2Q4tgIAh +6NqAaYwvsSyeZmHSVW/2H3/WEApLm/N94/MAxsw7+wzYUw3ELjDVPiSLz6oeHfl8poZiyfI+Ypv4 +vpo2KoruioMB/Tt/H7gQFU8xgzak5obK+lKnY9LJCrRrUBVMyGeW+X8UlpfpdIj999bMuFeQ6p0D +2CvaL1lFG0qPR/a6kalbvNIq7T3Vhk3dS3HLZhEy8s7Gkmx3573HnoK/vb55T8Z8mFS5E5GW8na9 +Eop1yimKg/CYt2qW873Kv+hiRSQMJT8hfOMaKwxpOfq0T/f/TJo404XQOLWiSvs0ZA9Aw0eAw8US +5AW0suMyIOHiF8CZP5XpWl55E5Lelj2GYByLnXy7w0AIx5B1e/mGBkCFUCaN+n8v2hvb4uTtA8d/ +SMalC+6b9d1oK0W85aY2anNQeukUMXtWI21nACQyuSYFV1+2S2VwU7ZOVij1snKyMpFitHvZ4zu3 +UZHJFYgaEeFb8Ron4+0P4OsQPqgEvovmd9I05o1dZHw2/VT9SI+LrkRPP4BHkXMuqoR5OSV3XOyu +uwf29D36U0tyuDpIGaW5VF9g860G08GkxGXlSXhHtQdKWlsdW3pgVBnuEpR5tIoQzLPN7KZzaH3G +6ZsPIMGMLkcC3A7ga0eriAhRTM0EgmQvUnzRePUMbCfoJbW+7eOZmpHXQuE71YqF0xDTaMXoFU/l +INvt/ghegnWuDd/S46Pk905bvoi0IuanYoFl2pLios/Y/15q3sYlR2hM8pu3LafFCiWUT0BuJOxq +XGR3lwjqtDevKv8orpuWGxbe/Pyp4gb/97elOOnLTIhN/zXnlbheT89jC/x+qOkSTNKgkuaEiiEr +UgJZ/kGEeiB94Y29l1teGoIqBbUKiocLQvn1RCT/0YACar+hh2YNuCLpUUf1bmx0Kng52tPr8kOO +TDQ8O6oJ0cxA0xKz+zYKaBn+L5HoV1o2Syn4IdM5TJzoXdLNmaX7VCdTLYzFunUC/rAp5YGxYHIq +bAgcvdmOBcW1VriabWwv6xMCqk0sIetd9ZkVQ6Gx4iXxFELRgdOBjhWYDR3PTS13Siz6hYVCvMmt +yZDrfLg9F8nYHk/PaBwnbOW1kOawKHPFIYlEe4HUFUa5sHRhh9aXbvFzi1aL+px8Dq+ERd1sKzFn +neBFK2iJt3GLjHsD6c+bhIcmMXwieqjl19Mf3+NZAGsNzR6evBWC5wsj+xnHCODQ8KzErNg6Q5OE +EH1nQMqzWW/3+gHkIgTumqoKPVBcIP5M1WWzCthTkPqqaC1wd74SWqHjBqjHc4q+P2cm1itoaPou +KL11s6RLs0WVm3k3qzaaj75uqWJA/x015StGhl1GcV0IsmT4uUE4qTp+79PfoLPDieJAZQAF4cpe +BGE6n9VV1/myQVffJelM1VJk6kBm7V0fb4SbEEBdjh4QmO2qRF7ADVQFk9TBabADWyb72FG0U/xN +Iyf0EybAABLxpI6NiwVNIoO2ej+4or2VUoI0JA6BnXBEinaUSnBJfiezv/Gmdfrrr3X5c0HrYAuf +94fGLNmewodOpSa6LevHZotOepmviKsfWpdp+WCun8INazWtjsxo4OPRI+m65kP6wo7Kde4vfxW3 +A54LZLBwRezpwclTE+yo5Th4PVac0pTNssR8vZJJSGTbeiM9CCeCZ085f6YrKap8W0SsVmblefpC +slWluiAoBizRpE4OkSNM/17wbhp1QuzxO+eQJPnav/4RhulZZw2f5hdEy86xG+vkVfVKpQI6ZCLp +pL+gHZV2QmNH8t0yS+vuh+EhRv7/WgN0+rMa9tGcUhtBNeRjPETp5aIPDEnfvm7yVWtl+WM3fypO +EedLBT/60xEdZ7Jdx6+Em4CBDqOO+d7mDBiUpX5ilyo1euub8IbmZnN9mZmH6gUIm51TcCv34kcE +otKpslxEJRD9HGf1wLWdifKjm9oQJ5gVimKvoStEoUjHY07z3dn7WOK8Zu1BkSFxXJRx+hM5aetK +035XvLhMbk5ERohyJ+g9ee2bmgiZhpPHBGsk3DBRLVQZt7TUDbcSfqKzps0pVRyz+ZF2/sCBvvmY +imhrpsE8gg4LPRqxTTaPZdRqo2l5qKAdYazFBVqhym77IZmotXJNZtZz14EQQ88ePlEbePXge2xq +JyPpiBR9MZr1YQYdmAcmOTp+Ccu/1Gr0+hmoIe63vu6ypuhpE3m0tN9Vo7kRaFh0A2+nWoTh0pmc +Aq+TIuLICHdpgPgo44r01e3WphS9W0vIojoVNira1IG3PxTT+y4+ZeeYYVXUkOCJPEA9Gz4/PRfC ++eP+ONnedbweZc2r0Yv6aDbj3W6N5jDAoX6bfxgl3ieZJmLf/slECOL9/KjM21Do2XJ9qEcl264x +XjqKznJVXLrgJuCsCrAkIV079Gl1i+f2iWBvRjCwKZcidyuwvUzUhrR3MRRpRs4mvHy1Ebf4sfKm +MJHSQwX5jxmIRtR9liD5AAj+n2F0PXMa1UGwXI1iMH2+567ICwPR+QutSsPMeONw4r3+/cWI/9pB +fnmRgEuoXU6q1BIKbob48II1jlpouSNK9XiyeI1oH0MqFmTK9xN3jd+fPjuyQbr0s0zFqfcS7yCw +QQvaz9spXOdmrLjnFBZGovtwoM8N00SAo5VCD5O2zghgz0kl+QbQJJ/GaBBtoN24v00kclJLa7DY +Rc6VlzuE2Zk6/Wu6a+hD9enH+ZpcgNmsDeVzH+iBIbJxkUmGbd+fAgGnvjMCttDkDbC3UG+B2RbB +Iy/GP/ajSu6MtkBisEBcEyeTxWZ/N8DqL+Kb5vvyUPU25CDn7mhntyTSUe3S3FVPXlGBVF5D1lmt +Fi++xca1LNpwHF7IfUumEYkr3eYx+q8+UwJBUCQBMGrMcDpOc+speNbC9AtKoUpE7pnxq/s98iZS +3dswd45g9Ur1/43lhVBd05Ygj4mFwurZL4Wo1/JMp2OsJYicBPs1V9b9/sdtkJ9DbVY8/1y075DD +fkYhWdMRSsBJx5b5eVuRDm+YQI68r8ljiRr+rZU04Gh1zjcdMnaeH+tzXjVQAfsc5iHHLi9dYPbs +4xuacpgPb87sUEY2cG8GQeg6jOPxsHp1DohH5viwQxJ1fvx7nmX6lCMeXNv2W/IhGsHeLKp/63sC +4RCYHQR5/8QYCMc+P8ccY0yw9TKoV2UAPzH7ljTknhzYIw9TMlTwq81bBm+IWNOOcim/1lf3MZx3 +j/h1UoyMwaCjE/t9+4oSz5HndnH+VdScQw+V4Q1bhl5w+OH6LvFTCj3cP5YGoJRa9NWEvrji/2mL +6iXxsG+WSOQF3uVoEUniXTg4hPBXFJWYfR1dO3myPMoc8159MKcHyRFLEldVgNiQJREOLwL8dLhN +aAAvRAak5C4wl3MAxoXj53vspbkmouTXWfImk0Wnh2LDbn1rsIMqlmhQpMOyHNRWlq6RY+Mpy+yg +KrEDQmPI+sQrzo317at2V0k4yqfUENlRJgV0vmL6L6q67u6TZhmSg16Pe0te5HR6F0zU2y4g7AJE +WTFY67x69lzRkKXAnEhv1No8TYhoWxjk/Auo1/0QscbZqucrqQ2S4ms8af+iiYKk9edFIaIM4p/f +N/VLrglq1VpqwsdSgHLY8sjqEX3Ijrq5msc0X8Db0EJ9pLTtUZERnUJuySoDPxnw/7s+BIhfo6CH +x5c6+AmFJkS0+R8MaEERyEAbBXjjX0OUQcKFQelbZ6zhW+158mSE02mrLfet5mh69VbOYWZeGOLe +7/jH3l8uNB5o4YSvvoeQ44R+Qf28vKjbfzetvcJKLPm+N47K73evuIK+RBVXknwAOsjegDvw45sZ +/VoIiRMV1yT7MtCa9edWSeAnfhmGelsgXerSy821/cQGGxzvVjYrPak4r+3vee2nj0RN+yGkUJE0 +Kr+BQIHvZL2t1C1KSqQ+pKvjbnELVzLn1rAqM2ap3BDl6tezo4lNyEeCgWJGhH6oClqrVt9HiThz +OfiL7wqLWtilqnJuqPk/R/zbWVIe6O0XG6nBb4EBwc6hEZzBb0O1aXRPmOykgL/IL8bZ+x0MezOY +gtu9dz94Bz6np8d7tFOXmnbj1+deV0iFPtc3EFWssZnJEalyV3/BWoYCzPOMWiv9BUtIbzwwHPtv +4aXpjMdERR3kMBLo+LIMYlOc3INdzCfCVA6FJ9pOSpZMuSEZKpeP/d4OFXdd20dDTxWzkpGMm/Zg +Ff3rJot5ph5wbtczQMqio3VU4KGpWJ9Z9HU1NftD5V3pnR7AlTDeJuXgnzP5YMPUv5UK4FphJlpJ +Zusgcdsx7Fv9EEKabl/lJfWqBsGuqp6hQ/BTV/X271g98dZ+x3XIAYcuHC2JCRHqLKtsq8LkaHgX +2WQBn/aEbO400UCabUEY0Im5GoAJBx0Da5JN0gv+CKuOng0Q59sPpvcZXndn4bPjR3ghmV6unoUN +x44+WOqSWxWNIbsN8QxPzja4VnlgWtoDw7rH1utXkE0iDzcyy7SeRqy+shuifNeLXyoY+Yr8Kok1 +Tp2gnIJ32YthHZ00/PjW2D2evKlUtnbDBUdwwcrwctS8bPpI0UIIhwUieRxUCm4LQTDUpXOKIFLc +mBx1+iBxgU/Hr26eCt62cUEIiOiJ6WLQVIN0i8wz8YaUWh1xCi4nCbB7oolkshu0/+rRrznhjd2t +VaDlZekiOfyn062m+KuyE5z54JdLtpFRpPqf0mEhqMQnBhcH9A9oxwgGx1VeYTbC9hJ/QiDxS1Y/ +xcByk7F+/YHOL4Mf8VSBv0zkWRaoG+Dssvep4D1ZWOHMN2UL6a8BahMoXOyTZbAj4VNSWPgYrB3d +g1PwgrsoEjECw17g+96EmrpS60SURmes5l4oBXHIP6xBemSTDgvjfNdT5w4Pbt1zsYDqwo5nCxay +jncoIgQsmGOdQQVpHdccEmEhFluO61Zjwkgr1PEfPyyr/HBnaVMHB33KG25Us/TFuVlZ1vRE044T +jvECGTvlzxBGhrrMTAwv/BRx3QxfWTKPTUKPOoXevDtdzrGJ9JqUBcWnxYxwb2/0zmJt4xfwFB/m +EuktCwCHjLGOAI0vc479t2R+rDEtLTTpXezvf2kEBpwv3yKqjLSfSxd/V0SJcS85gIf1/WN39Kf7 +uBStOJlO7obvr5gOySfcp+GSNMEFsPGaBZfsrqwW2tORrS548Mryncgicr6/7idv3O9X+mNxTJnp +c/1ejQwmPGrHOSE6vTBiNjPYf4XLfoz3+9y7hVPWCIN1vZSU/eZ9wZccXk9MJRGmtbKRJTkdctmK +MY3QxeahbdNbD89qNPPz9tbPt23tcBySUh1+FQd6JY84iZ+o6lKXVy0S5YBc2+ko9HP+KEvN+DU4 +vFNHPoQHnWo53GWoVKKWRPu5pyD169u4eDA1+m6wAjzMTk/Jx3Eo/fm9RmGHNdL90BRCm4uRLecq +Vb55bO11cOnZcgxHyPMMtMvTpMNGTUOqH2MiTBR3wPvW3tFfqLt7l2mKsmY3F9Jwb0l4A3hHaLCu +TZOPg/a0b4iwEoQJJrJpqZviBm905lOzI7ubFzuCztGCbrPNF+UDctgY/+76GLfx6hCSePqc6PFD +TSdaGSVuyMQ+zErzNJ7XvgLacTQTf7rYfdi4m9p17aVglNUXKQOWENrQkcOYUImBUanx/Jzz0HKT +sgEC+Lkz2yeC+4AwIW8JgEd4l5UP3is5yypHqywmoa8Bl7A9jN5YTiTDkq4kY+IoiQL0Ye7PqBUU +BIExHAvix2c0fz4LOCndyilCu0L2dx8ShdV6oCw4nVcCXRCi7NXfTqAq8UKf0417dQaiJTDMaI5o +HJW1LhkdapKwtZhGOIrDrxoMWMnDsUqsbtRo3m4GFxdKY1FLh59HCchtJdN5mQiTtJmxkRkRwt2b +3rYGuleVcPCv1Zva1E4RrkRIG0i6UsY1Oyy7OfCVFxJpTQlqUSkRZZ0bP6ONWgraeQW0pEGtLMXo +Z2uQoDZNYLmiJwxGm+28I3j5pdTEhr0LthAFXNtLdhhc0UZ26IqaLhg0Kr/F8Mp7Kbq4fshTyN7i +YiUQxMgVh2rNKHMC7HNcXFfy52H/+2JnIXgmz9ARYF+If9/gWeiooC9K8yxhQp4o7C/zwke3eAOy +C5XGWaCwTFu2Cu45UA4Vdp6DFvQ4qP7XLh1g2GDkTOcXHlKwaWQ5g7YEKZv2gcv2wkRopqMRurFt +9OeUhH0FhuMj59eUhSLmGViNneRK17Pyutr6rFbisz0HVUC4yI5YFiTrxroA79D1QdJ4N7FH/ShH +vbHp1QN6Cb1jKEcQJ9sb58qnfnwDZ0+axvEbu6lbqXsODFCAFxQxKl0/wH4XaarmaUGuXvXBxUWU +zcvmr5HjWSUg3gm4EPndxC97idtL2jIoScxZ8T2zw5hVEjozp1IT/E/peMw/aMjApGdBy69xp561 +KywTNwFTw0IhZLYZnk68RTn+rDXVNB1ZFcIBmd1NDVBuw+e8D5zAI1NO2vpeb7S/Tr4ySIca5eqk +k9ffKmUTCfoowfyA/h5EjfHStW9U/YXSXy0ROdGNj2wPGYeq7yLYy/MlNRjubxBCNaV2bDTAuZHR +cduZNp83gOY04c6OsJINxWAaEqcOTdrC2l7EZHFpeWpG0lzDNvTIkAjuLZFxumwGj1Q0Y/Yisw9n +KipzHFBQrjEc9I1+J4fx4lVwCrh0XEobnUjNWrlaQuyvOiIZWSS5GpKsfoeZzGtjytsqj7iWB3t1 +K0BZzazyUQi8Fu+S5FZQ6x7rFtRAUdIVhadmSCdrQRp76gLkvrv/iVjNYcDIiklTNTkwPBC7j+vq +bniKP1wufUFTfGcTPbQWG8ofTzBkv2WGeeumeh71sL+sYUaCvzHu3okJPoNwA8t2WL0g7/HxKtdt +QJrnK9VQtoPhR7WNOdXf74ZDatbHvfeXSQykyHiHZc1X+hLBIm/fXmeAIPOy+WVTwzLXckAUoTsg +g16yuwxpocbi+q0lxecIWWiYugYfrs5lB7VgjAzt966MqHSxvkoWfpiMmEHbvUuawGOR85Ucrgcv +79KGn6LMQ1smvP24BzMrHbS5OzxBTcGX051/MT3RHxsug/nEZPSIof4I1uqZDAsXbvFvluZg9gRT +XMrG5S5ZnFEnEKfQf8puPGCMYsXYGU9sBiH+5oEKpfRx2D7t+IgFztkmPqW4o9X6bL/Vx89VxusZ +mXGFA8toPSGmfrXBRn8Xvn6Et4OYSeRHys8EG5A/S8+gpfeyj/qDyfjYZqUw54BnYEm2zU1MywET +deoYojehlp2nOyIWdCYK24noafeqktmTdvgucUf2OOKQ1daTTQpx2s0et1YacmHSdyRj80rLEaeg +F+M/2hsYjRfj4X7+5+AR8nr4VI+bWdi7H9XlXkrJiqqR+1TiEgvcEPuxju3CIPGgJ4EPkpt+IcZn +AxegCYqIx8US4MMbD5o2RnoSHiqQeVUV8AJyPiGSNL36XWyisGIt6IzBva36HMFmDsCMv9gN6BLN +9thVU+CdHk4yNMStcFv7ElHXdRVMvqJb/fTAhbCVFIcu4GUlcL2Q7ufBIZ0afBsSHqsNVw4rVUDY +twPeKgX2e1iPrYPOWQ4VWgpn+QelH4M0xjPzvbaaSUCoumJ2QcaLqRjqM0HsF7TO6t+KblH4VPOm +Afr9RtXNsltvFpjJqIRMBD6AzmjaRmGEaj0DfXv7n0UmVv4CKwVS6gKqGsQEi6GBp/D1f8OtMSRp +mCVXRVOG84E3KgeT+X6DFpRBLYkrfZZ7MsmPseLyZE8SUSLiU45yCLLurGk9PtCOoH4kN2/mzHXx +O4Bsee013Yej23BcGVbrL4K0m6j6AyCxmdd4oi3E7eoxqLWpY5Snbiw1CRcYIuJY+odGf723EQa1 +feQ7JIyXLPt2WJi49A2PqYSu+RDlqnkI2dYlnQ8tDwgFxg1oHD0aXVMdsK/LgsC5jx2TcS7FyaxE +03NlsoaX7Kv+Z5a3MT9c1J7wQKuKV3ih9nEXJFRozEL8eVF3wXRdt1iJwLx9S3JxJJ3kO3auiS9x +LVRZFYQKS/FU26hugz00jSC9iz8YQTOmLqBU6oAYw+Hb3XTzzn+9AqmUSLr279OxabkuWOqUzIXE +mvdal0AiqX4qo2d9NL4WxiI3iUttoZfQg97L2c0f3rzlekN+B3GZ98nXd8CHkKeG2ooEjp17rPMW +GIA0WtFmV6Az0pNjCGzFHfnt6weoUH4gFLcObk9I1kiixBcG4WuPkMXxIEETB5jKRwPYQw4vhZhN +Uz42YiGsf7sZHBgbdC0Kx/TmLnkQTGkslfw/ZDqlYtLrFXrRNMnotw0gJsA5UzUgO8Nx9Rv99LjW +VDKT3jRQJAGo232wc8x0niGBPRYrv7A2ApHUlsAzjQttwnCN4kohyd63oJddivg0RNXxi+I0dNqc +zmbAsRKz/yuqktWjS1+g5eWdsxgDO5dSTy0BIe05UL1VGOniE9rg4bZiXoMeNZOjnIKKKs2CCm8/ +IPytReUR06B9GuumaJBm8ucAaXLSxR99Xm9062UeMaVM7HAWE/qREsntvnPOpigyZDBL1Cbbet/a +jcKehf6/yVngdwI42hpHrl4FfrvnpH7ca3EeBhqG4BMzXbrXyAZOZCH3QYlqMcxBF0Yu13HLjSfU +/2D25woIb2O7xlMLI93arX4Ntw66M38g+DYQSc8fVYokN1IWjs8ahOtbxZMVsn7OQUjrQItPVDga +j6BD9e9g4lUXznYImkJCwSLk+50CyNWbKf9PnK+uE3XADo0q8trUXsPhdZhACDY9EBUwATwAZuyl +h+XoMjVNfa8WLcvOAq+x7Ame9ZjbNOOQlZI6usvI83LDeIuz0aye5eNQ2maCU5nep7OyLnOf3gEm +dU+2Qa8C/w/pF9raAHoDjgpJZOoBUUwD1BEp757ZjrYsGqT1qZrpWTPFkUfMzBYak39raBRhr5Aa +puS1Dp5DTgjLllEjDkCnhqGMIzwfdr5aqR0bWmay5ny2xjsVOC7n6/ceDgAuzuU5MqN+qhPXI1iS +U4Qjf6Ui7c12D3VORHcUeMCwnIJRWCuUTKu9y03o76MqmMW5u/L2kVMXDPsBWFRTde33qYAgOQ3F +YBb9/TD0yScyAhbFOhHZSFgDd8ePrUfVlLcMWv8Vo9XVuQYranEaymNf+sefBEIbiLNmOewmv5zP +Ut9vNfVSUe53ElZON1jftbmfxDU5Yb6lAb1I+xbQCdPePVN5CPU61cFl015k0G1Dw3pQmVUVz6VL +QFJ00217WAthbvZhdEAdGXvPZr8bISWrbM1N7of5tJ5Onw5ywNVoCh5Ai0+A8buPXOdC7wNP4rQJ +FsfoHg2GW9RI2mcQODUyOijJXw285SbH76riEdoclJUeM/MKJYZZaUYoocSDqyxyuyOwuuD+PnbZ +fYjs09LbiNVRhr96ShvkUUxccvIQzTPbx8wtGUi/TvTl++sCVAXkcZVwG+0o2L3EA2g+FtPD5Ks+ +rXM7/ZDR75gaWmuwVpMNZmtjKJ2vWRd2nv2/sR7OVlkNtuZAFmNv/sMsqYObJ9e3NvIVIBqE+gDg +17GDrKQ0ju9KO6NE5fZyEuAGlZx7Pd7Tqb3ix+6Wc/Yh5Q6qYnwJBfghmPuwGp4ffyb02+NWPaLF +jWdO453PuDxonFHY90EpgM9Sljl8VM+LzOi7/xTDLnAYe3Da8K9rsnQt0boD8qELQKBX3KYXVTX8 +sV4WSGOesmD5Utf/qDPXfud99U0fWmwfPhMv6VbU1PkfIB28AgJ6i9UV055yocTQ/gZkJ51D9odJ +bGbjC+2lW5GfX9ph4LsJUxJtHUqp6knyXui5bp02p1MUm/6RVUHt9pyP68/rDRWtrOjesXiWym+U +de8sWW5Tv5Es5csYpsdTsiqwz9InY31/Wr6ZwMdJpxblWveEtSacu1c12BqLlsuqebB5ltYeg4La ++IOcXNSSXhoug9KyCYFbQ6fxBzJ3n4iJK+f/T+6+kQXgZcsGNJeLz+QZH9vurdhOQhMEalDh42Wh +I4ASlzn5q2vLXryzUM57MjOPTIGe9++0GfR6YBbDFZsUu58elYGTOrtAza+RQxHRo20l4t37DryT +Q839A1IjUBljFuVF23XGI3Sj7gYruKjywhyKd1leu2wpH2MhaDs2es+PrDyP3rmX6DmOxW+BO0ET +e5IpOYDK6AcsCYvUM5X0w0dwwhj8HfuDzAJXqJ6kunaxWX3/EGKAdxBv6Ig37VuQ61mQcf7ndTGU +V4oznb2mRCZeymx2k9uXg5dEfbQD/8CVYDLuEtKFd9yJNd7xI0xfqAa9EAN6QNvJGTkbAJH2LS7g +gq9m/lf7NcHuU+n6GLxRbUzf+T9UADKFBx2rJWgG8zd8TQCLY8t45HGFTYLnrrfWrxvm6k5FgLRD +mHaNf2UAXANyJwK4d6clD/S09GOLotjb+cwTHufyxNb2HG43o2Tun+q8XF9DMkQa0H7s8auXWnxb +hNosQCRkMoV3Vjog/i+J5IhI5WqOlTphLl06MUF/uiIG1itE6OuwxuljuGaKDVNLAXCXHUpN/+Ha +JYR+fZ3R9YOEKz8oCX2KSVETwkeOXU01Uz4VFx701wIHOoFpAZmPJvoqf0gtt76IHr6YyFZxnen7 +7Nr3ex9YmccWEr8IVXmt6BaHm1pCEA7Uz3xo9JRsN05/LFeGMBNT47Hux+L1VNlxLJAcgviIhyVk +khKUgj3CMjWpsNvO5PZgbgOCPoSFhmnLoRT7kUDBO+PoWsfpQVDaIMZEGlLnAnelUeTpUyYIYX+m +zt6mxrIZDlUSzj31f4dl9XJ/4l/f0jtVJ3xgkVFjGOXoSUWi1K1Gnt5oSCyqPj8+kzQAqRm/p6rA +u7xqSJMgKg2R+7gy+PdHRMwKpmZZuCYVznjQKdxgn8+zYuHI0F9UphlAIXSNd5BTe9aeF+RXahcl +Q8MMKATrsmd7E89W1iMOeTUkb7AcDKZ1gpEEEOzWA3Rq9I7XMakhxZS54mPOCVRfbN3eOqmohX1h +RVS5abqO2guVNF+XxFy7hyAoVVe/W5QCcYvKhFZRo0P2qCCKCOy20H+Db2YCKQkYHAcwH044Pfzu +TWjZT0q+RatkDrgk50OgIrOt6ANnaqimNcj6elqifzCY9d9slvluYLc2PIVkJfUAmw5IPoZhcP24 +l8BfYaM+/d8enuuHsLvEjUiuMRBkI/kSvj3dVEfVeqObSRlq4igu5Re7fu+JDckho9cJ5qtU+xfC +BKurYULC7051TqtH+WumZJviXSM7yjmdUAk5EQOC5Mtd5J/rcXSge9Jcxw8IZQ8wf/ZYWKYkSjKx +I4dxFfFNb8EUHjvMjctRF0Bi2pSNFhzUPMWS5P+V12DDh6jaqTx8XDdUILV6XasSGWS6cZ7ecqan +B0Aesi90RgjjypTSjmez1YhgNIU4CNxRL3+yX3JZHGxRnNAJtlMwv1hkca3N0OPH2FbH5f8xwNZk +vE8+IdRp5HTrjhm+hc2CdQe1ZOumQQDqQtZSFtT19dlMLy6xqz0QfSoGF0jx3Mbo9EnFeVxgUfj8 +2muueuwhUga66oLURiYnER4Uxnd2970CAc0kiYRB3sh2BpcpqSZe0wv/mYwYzUjUf3vNWNcz1CPA +Zbrw7O9utI1BfvynrFhxN0+KoxEYrTb/nQ+S2HHVjeENRbm8VHT8H8lxSCkUAgk4vgMsMpap6EHj +ddnRj3wjjsOo3AlStxNHm6UO7K6pEj2MMJZJiQBo0Uws1OG5emkZA+fWY0s0y9psM1l1uVYmQAa6 +McE9tiy+RI+BfuihGfOqzwtFoQ4YEQwvcUcULkNRjNxm8dXnc/7SARRqBo/k4M33wQqstIm/mWse +HA94qflJmABAHXaFnFjjk/TE4PPkg48dRvIgX3q5eOEmKuGukGsOi24gVz0ndnqcd6yTP19WQhYh +080Xx2DpBj4Y/+dWOoJKHrmodyAUZ3CUs3TfSWuWlUbyiUenNY9G6uZZgGaVLun2sIUE9mvyT2OF +WGRAFOMCmQ5iQMDui8lgAqHeOuB1FOYCMW9THxHYViqznkxfAGuORPgOXmxPKZzOeHM/YV6tpL59 +pqJKcEbtYtDx+8+vT52TCx2x8wkeSImWALXVgGUoydVyuvZJLyhcdFzbW8KhaLSYxDpf3Gt0mPB4 +rEhjHDpB9PKL4jB+HYam6jWWFOw8GoUJC4Qn5bA/UD4vayFibMLcWtWDJRok525rG7EW/Uamv8uK +CPAwucMDy2NkG+vF5Z4GbVaoY+J/bFh7maJ1DdR7SITmLdRNrRE82aZVjvQgp6qU+lHgGZZKoxRr +e8LleFSYD6kfOWghH7yvljBPD8qwlGxywwJsTg7txijgaLY2p6MmwYscluMh5kfwrnO7gdXB5k3C +L/pUiLhluDMh37gdo3hlaXq/VTyYL85Hj+Mj2cAFjh2tQ9Txx/DwQopv6W9d15pdl9smSHh7RNPv +siJOUNtz57lj586W4jK9jjfcCfnXbkPGXlyRk75hXYlfkx89cqxmJIiOmkQkN2gPyBDHaPDzMFL+ +8Olg4x/rYkf2nuBmfl2tDKla03BBOVKINv5nCh0mHbL16nRW3vbrEYDCHhTe6BkpDiEIb26injeF +my/kCf2ZKLpyYbqX1QhqPrAG9yCiEK6bnbfw0bycjtDLzg7y/VKPmgQ3qBZRYstYpL5J6x6TcvQ7 +rMqVHOwuh/ZeRL7p9t2esgZwB2bMEITt6NeJAKu2ubDhBigkyHX0GimXw/d7s9fvdhWmDzDoYJgK +7yxppFjdUHd0dj+DhDuCni5gjq0i1WftID+KGaMuRrQTP6wV1jw0PrhogcMB8WFrR8BnfRVwIBz0 +wRVzA2b/nA1KGwC9HtU32TVzw5WGpOeFc+lF1xHXdjg8bu+04nrbsI85BqpnYrO1u/Nv+3K5tgIC +8TQyJ2zbO+jp5ARVuRAczxpP3BCamoQJiCsN2MD8I7yevibe1Bzv4XKrqbIg6mPtXKlwsaSQKGjJ +Vf4+l48C5O/230rN1ncTPeqdaFlcHn9oAT9zgosouURL3VyY7j7ZjT55JXL9uOGl0IPfzRMNc+NY +nRVqCkRavd71lcG+OEnQ9zn3tgts1cgLnC82FlEoLUTJvD/5G0hImoFGnGNbUF8LvUa07PYDIjDF +p/fWdrQZ6CDOhGlu2vYTNrUVtQfkIOz8OJ2NW4lu6VKH7560kFJLfC4IPsYywwN1pcNctCy6Jqte +DlNGZDZMcDGqPmnUyNXqChMOXkc8p+NVW00uWuFlpqSwMcP6ZEjw/CXBMDiy5KxcNXL9kjN8APBW +RTRtTKFXlis9dbYUopiQhwgIlIyOxOje6Sq+zXGyOB3Curh2U3ELZEHNtcbzgfs+BKSMb7d33AJ5 +d3z+QBR1wiw1K5j6Iih9Sb9pcphq/oXlohWo2e+Y8oT6vAlk91ROSQNat9rm4K2yxrvQcjdyuFkw +NO7MaqjoeXyZ+GBODyMioPTLvyc7FzClgpggC1Z5Rqs8mK0xmAv1RKQAkcfBW7NsqvbuPI+54Pxl +h1DS0UPFw62DIUEgp5791TkurPYikXPscsFumRDrInM+mhLUbNngMLxvMOhjon+XlrvQ45wNtHas +k2D1FTqfwZxJwLMT3A1h6RFil8+e3odXAqD5dDPsms2sTIOzerIr3J3dVMKGFDTDAAFSNMl4KSDH +NA1jpDex2k4uqtpkhzZDIkb8M1JgFvt99Xj8cTm9/86RJABSiUv2MURUyPIw7rkB594MfcarqK7h +gkxSX0JyLAHsmffNtJyeJirLJ9ov0YgR3LVg5EbLtXv9pKw7rc7qG3frXnhUxOUVANLFoc8NhNpg +8Xjlk/wRCysiMtFy7AJyFWpkHyhO8Ru7Uigtrto7mZQuk+l7XHkEZJfkKkkfWigIwluTn3lrdIjO +1uxmFZBb7bFfz6GFwDjXvhMRDsVoTTbAc6HT9U3jF81ExdskMv55Zmoo0WZjgNA3hkLyIj7sGqec +r/jUxRwM80gEKUa035rglIuBKZtCcKPr10wf783aO3dgmjIyQgi2zmXL4X3QsZ6lgE1pzhpLY1Nj +AGa4V8lAQzmIVTC4+sfj6dzBkXUiGjWtEZgLfAf3k0Oym7suafybBFGOH1gnjg/vhY7uq9BugasB +QXod1vQnif+hTLCEx7gaYH4+qc5L21YODxWwbLNcznAsXzLL/h7GxKgb9nuG1DTB764HloNg77KL +2X7jVNL/mJdXQlyHYJui7Tt5SzEuBTgllb7CGDoawJKz1ugvY4XKHcbHc+YiUBwcG4KDKJQ1estY +5cGZg8DQIO/SsftrCmELeiQ8SGsSWOrdWUoXUb5Ms1DoeyyLp05cuRHU0DzURSOK45t44RO3tx+d +3zSk5wCzPPcIhjlzEFvZ1c2MlC8p1eN0TVGQFIHFr+7HFI5xNrufnqIU+z5cgeJjD2cwLrTDY8aY +Kh1eAoL0D3XCUDTsh3+D8xkTOKL19FMfVO8XuBcvBdD8zWJZxrWg9Kkhjtn9tQrk1lNYdazCqa8R +jl+MMUTC/RNXJJ4jfn0E3Hi3cxgor3iWTYSv7fyfzPki3nPPXLsGDvc6G3MhV/LrZtbgUUZ9pz5p +J7UdkDYrVc32w2jOqidDAA5usMkSxT6eZ9whlgwQnmw/X0+p1XjR1Pm+V3okAhU3jbaZzI0s116C +OdRmjDZntwQO0ylQ5YU7WKyvN9GyEpv7X/4prkrfETqwxv3x6Ga3b0adVZYxUVMMq5TaLY15gvg0 +PISEWnycKV8Mwl3omhw0M61vvxtL1fpB1dp6HSpQH9p6dWedZRFYr5eu8r7dE+k8/3PEHYywg9BW +wfxjtdI73Y3q07ndWWvP4yPKsEfUwgMF9Ba9JhldEpdaX7ykzWnXTwRiVnqXE0ncYlbb9VOLlIPC +LROdxsJMMrgBglUTzC4J6tyvkc333kKdlw+7CvpfbzzCsh9ANrveD0h92YT0XHNWAbpmB+Z1Z7Eb +2Qs+HEAmlcI/7RYL6uXo7KCRfESMfm85N68GBOLYl6Iiz38DwsLm22QXmaVc35kI6Z4e9/qq2fs6 +z4QmRwwaXm+2UWpl3yss16Fr9tQF4HBrP4r4Sf5wI3FVikV3WOx9yqYfBrqOQndJ1j56izvvi5dJ +JLr8k+TtC17IR3YagDQ4jW22lrz6TDYg+NcKO0ygZa8nhH3NQ16UiDEVF7roqXyj9aiBBqbY0eRr +L6OYjUsaHMAHTVTkCrotaqUmi6dvZKi6rNlHCpsxac9n1560CTMvTH/QaoTk0SZ65Wf1AMMjKOPK +jjbjgZhrPc/pJQTSWOHRITP/1F3MurA0to+HiLhcFjSqXvUY7k7SGlrxSxXUolVyjizdzjBcsaat +rar3hsBqaXK+bR5wGGVDa8CbiblUOsKbce7L0i07ooP35VYARRQotS6fX47liJ1Ini2O5vzFEjpj +HBtSE/b8j5LjPlrAMQMIx9BB+KeLi48A8Ixe4i+eMX+sTAlDtYseJOEKKGJnLOpF/Owd6ChjHuc8 +j4eInHm4c2TW8kV9WAgSRimPFWffcv0SIw0k1KopXA5dh35HblGr5rrBsHgGuEbKk1T6GuvrAYtP +xMQZtTKTONloJaBOaR8ahsUZ5Kbf4UskragWSdXscizzCe+aOyb/RWc/ig2dPk9xeuQ2oaAjwA/k +lTL5aj+bvhN8+sPSRzlgJYJ39z2bMA1xINT17svUZdRcCnQ8OyMPszP+k9Fwom0m0irKGlrD+FeF +q+0/jREdjbd6zCK7y1rp+9esJwK3zBb3DcD9tTMygJxqxdGSdlKyh0LOrvvKJ4prI8Iptcp2j9db +ZQTRTLzY9xC9ZNMSBMRMOQk7iphBC+oeD40zUxIMuhG0VSj7s59WqyXKe/ShjEKPVuHhfyEUTXQc +wjb1OUySyN7QYauy6KZiVjzI0qITkQjyOEKdhYw8Ad4cLoCUEsGckLROykRG4pQg5sIYjkrsHF1r +UQRCgA6TsjSLCOChNal4piO7sauprxAeGYLelNcoBZmTilcqxRVLyafAhtxXoSbd+fDEMHh3NDOR +IdIp74ptBrZXHVxRsAJHG8odPuRHCZNU57XQopwgZJcuBAxnVOcqk8ryVG4OlHd4csfPFKzP6KQr +6SjJm4VJgoZgEuvgMhfK9u3FoJo9gM4aZqDUMd3GAMraeAiH98Yg1A/Ath6c1eh3f82kF5U1eXta +u3xT83r4i9E4CSm5Q/mItWaU1vF6s6omMRwuzipQ5bPhua4vFBeaijtbsZLEMDp6ZJ+j2FHhr/6v +q8RoEzdA7QJ6hcOIftw7ie76x7xvgeDHZyNd4lRn4559Aw8hbl742IrcwfECHRLdqnO6Em9PvzhY +QCb7XS/gTz+dcbRdWgTyZ8ie+SEhQvMjeNGrvoQm7TCBnATWo5Odooinz1SV5CHI+5Zh+rY8B5QC +ewDS+2ftgAmtcZlNWMHHJgf2+QdzxqZjc1+K1UY3nbXK7UGQjeROuxyZmicW19MX34PvGoH/eGwc +W7tBZu+DySFfvFB52V7PAZkmC3xofvgeI4DgyBDo+NKsSUT2LH8ZWvmrtHuVBabCH+sHZjSkGJ5h +KKjnZ8zYf/+KQQMiLGv8cV7WtVTMnPKIRBBKnFSPSC0f6vULN85XJn70EhswlP/L9TNAFHTtx44D +yCh2tWMx06uw0HQKVzPDT6bV+UZEgVNfcmC2UhDMExvO55aDJMqpd2BgKhkNnbPs7FlQiXwgXt8L +qGXJtsocOlFkCFJEDOMG1eNpFD7DNnSuiIpYcZBPYL3UmXG4flKSFxIPgDa/WzsZxgoNQE1nus59 +32x+jgN8cOQ76f92PqLP/6LoUocWOjibUMlhUFVGa+5hyC62BGUSWiZkYN10zM0pS0VbwcEM3YaR +CI+qpX56WdRaSoMlw0i1sJKZL+rlsJzRvAqCxh4+Qx7O705uUQadsW6OrxFg0OZUaeTMz1/e1eiq +EszpfcDR1GX0GdFGQ3tkbPsZ08v4AOO5fZ0ufEReFib8WHmH3h813s736sdGccY8F726m/RYS9n6 +rJ3+o2UJX0DuZwQR47PazTpWCsr6OWS0z3pnmzpjpWw1uJ1OE0PYpwxiRp2O5kREGVZMUZuY6IRf +xiY+emzntJXfxXsOzduDhHiTw0ECTE+qoEAxS4kFqk9KL5xrDIboN33JQKZvcqK+vwT7RaZGMkVY +REA+Pic6AIoCAWSwut8xcTM72GFnRai+ogk4m3iKp3iKUBhyXeQrvdUShdzC2Ut5hEvsp+rAJjhb +K28cWi+Dn1ICQiw57KXNQw7QYooGLzOHteWSXUPXWxfym89+0GpYTQO5t1/sFeMmas4uviAsvKap +HVn3ePdFUdmbwSl84BgKsxCOQHciwqg6LoyMSjUopR3nyzbIBp9H+FV5Y43GbqeZ6eTF8ZTFWc2N +UG/MQkzDSb7axsfacjJf6sbBcXafTkRxrqpNC/UYcuiMbteo4pjpslucSLLC+Qkr+X8HW48Katlo +eS6Q/Sp+3gbd/JXwXJjZLXf4b4JcWS7iCI0W/riDAMTOlGKlt4zE7l5nijCyDmkRVUlD9GG/zwp+ +pm/rCjM3DLP2LJbth1UJhkjUnBWfmwjCgkbeySbFXskJNJi3Xa8r/QM8gE6TShBlTitpKfD4B+vZ +Vk1e0OoR7eeuPHmimYB7KgeFobNj6KWXEsr1nj7BKV4KXlRf9BchwRKviiEbaOnsutIbtHIiwpq8 +5qyaKBDPWDg0O0jR6dc2jm3rziRLWUsmfM9kVUvRGGcjiS1N/iOuwcLBoxgnnd8NdomxMFexTsgI +c0xlMRXiDEZdmKFu6ZoAOQBasJ4AuOaWu4rNEYTlZCm08atQps9eKrXyM3C7/9Zm2b8OkIblrRSX +5DEou3fsVafC1j54axiPw6iuY74nFiFR7zEXoOmcNoW6U/5IxUCSNfovzbCjh99y+M+09TlZ1aTK +9Ewu+pW8Q/f7xVV5/by+gcDofCg3WGmn0OqaTF4JF5KBMqxw2/xWZQ3FGcXS04GK/PB7++7DEapL +ci1ZnlNYct7x4nQCyDpNe4/AKia0cTqIERGk5IRV562ejmFN8BZfBbLs4T2z4wIubUPHif9b8WDB +oKZKjPIsWtJYxTPYryIHQzVARIJF5SbHQMCtpPboaiw3/rdM7osPv7dTWokLtuECWGpei8X9gYgz +kq0M6o7/DcIEKeoNwz+XRi8CySHlg/gXUpCxHCr5jMFYWH8BeQmbf0u9Bu9METmu7okaM9kFLzPt +cGBWfhCcU3dLFMROLxsLYP4s49UZ7/z0TP14HynuSk34WeeF7Zo9+XLR5FHauk37DJWkfzJqUac1 +E2CGVTCJK2vOnkP2mOZLY9n7MlgTx/4WeppM5KWfHne5RyV1u7KbPczBEGrVScEUxySjOdNtUYgh +bndk0LtmqxzFRxLbM8dgN/1BU33y7iCDHN8uhxDsBQaRvolUyVXNnmMbxbw4L0/PBD4lefk8rp6v +rYcqmAoNwQM7qBdLxfyj5rdfF9lEnpB0j7OsDZ54P8SN/X9CArgfMKiiggyddD08VFYpKzpu9W3s +zCfMoF89hYwd6GzG9VZ4qWV0xj6v2UoI+pSMIU3cwLLEpN3D55j1tXYAzJwf8tp32N3pOQx/F3l9 +P+GwcBW0W3osNi7ioi965HoaHu6BscKrcAOWdBdAYdtuS+1sBhLMOIR0JA6cg86avr/+llvo9GP9 +o0MG/Oe5VFQYBiDesqYhkQzL/kO0LhCm5L1MSzlwKV0EXrEBqtbvxHuHJRL2ybRiA5pAXY63xgM2 +G0YMjXfKGCQzS4VXERVZE6VlcfK3ZVWIa6YMTdjUv9C1BOG1EQBofOZF+H9Y0TPPY3ln4Om5UFtc +aNICd5mi5tQd912dolHowmTeuhf9JdVObxwgvdoLR5+//m22UX7V+rGNsQr+zhlOFixH91K9/ltr +d/Phv9VzerEOmSqmbPY+7njGBsu21nKozLdnoLpFtg+bh7xVIbAm9iLPPBf7FmneXHHtaROC48xB +199e7p1rd5J72fUraKbSfdgQi4uuUxfb9riwA4+dLZp94f6iQRKZI9gAMF4wlE+e4sHP9X3uQmoj +oLm5lzW8IpMuvbQiZcifg8p7zYqcXaTlhTUXpO6WFCjZ3HJ3jjtZ9fpS0muE7JT8Qfvvirsi3v1j +xpdrrRnCSt+rSdJrnXtbsd9s1Yr+C0UvNOjPULuuFcUVhDdNSBLj5JWxNfzLi1jRolb6ld/iFt2q +qScs9QdTMRaWQwXxPNs0+nPt5Yu9Lve6pYQt8U0UI0/SiSnYBKjyok65ZumCYWyhK3QKPG91qS5o +SB6Hb9qUnb6lsQmqcH4zoDjh9YUXqAkgubaxqoufRhMHeYaGPl/Gry1C2Q/9fFNV7Emg94lncZua +w/gMAodB3c9FdP+GlvAq6usSbvhJuhJgHzGdmOniNCLpPxSGW9ztV+vnIwGAhYagtFELV21ppQmv +PJ5JpGYN1OEM48Z6nRd8nGo+x2YN7JqI3y2dPvSRC+tRbWgIQSPF6URIT0EYOT/F6sRzwWvEig4I +Z57hAEopqoX95B1oT9I0gEHDK/iXUiDR6qotccj+/vimNTQZMDPXYDwdJ32Gr2AO41YWveKHCQ95 +9wKASJF3oFFNIgk2mES+4wKSiQOZxyGgoV0Q00q8aM8Tk5dcVOH/LRvmWdtyNYts44do6NEtzD9f ++82F1mbBvy3kPjwEdB4uLtHAITcUh0cEHQkMPUMl8JK1XTdVpvidTAoCrzBiG55/gtzFxZk/4S19 +Me5fAg9DTKbop7eBAiY8fqjjBbHAXSzbMwS9xJWCG0vaNjHeAe3YrbztxZtItYpbBgApxmQdUfi6 +SVtfZb9qNIW6pJV4kk8bj3F44RLN7TpkOrZwQVm2gzTY8pIxj/Pb4oAqK3gj1zDI6bb7Dny0uvj4 +OhB4XlRWX7EXHagsjospdYiUlL4wCYy7/I6HwKUD9ic1nPTd8ofq8iCBIDJol6WWyYndx3fF3FPN +AIQCCGfB2t4oCnfr0C1JsnadgwQQswkZ8bPwXWMaCm5IhQxXSPSZp5a5H/KO9AMM9ZPhUwPRcm3w +nWY1W4lEKccFalou8CXcqOFeLM5UY+ihevzHQhRHX/y20dhKjIoW6NLfjwPY61Y0aNMW86qei4NH +NRBqsb9X+vfrXkFszjtmSjBxTo04rzDbblSSZLo8IdVANGPkMyzuG0CNrI/VDwKTMZoSembisRU2 +bAgWZwsSoxpxNYJ7zgjFSS4Bx++LAaq/YTVjFELF9R4e/J1hTU/yCEuZSiRzasfNpKuypPeQat53 +3v6PajIH1kn3wIFNJhx215IEex0iMGIC2oED5lIdML2lPNjwAqC3XLLkC7oT2YbAc15s2rTrRcU7 +v77prwLy2bNG1YyJYhRqVdGcjkCW+mseZeVVsMMSjPsXA2GuJM6v/+1Tyb2lXEBFix0OZ1CPngnO +w2Z6d2Gr3ZKqdIN8vPvHoJWl7R0I8CfWxIRaIrya55zdR4rF7ZWKQgKs2ORVnVg3IRoV3Fo0cc+f +NRAbzAA5R4WjGBVitj9p4+RHAVOKmn+WmzB8TLSXisVv2UW6lkmySzEfX7P0x+/2bIPTJZzCpox7 +vk0j7V43PcvPj/XOrqbb2U7WNSAPmGO1OjIo3jpH+yE/SElaFWhh2+4pLkaAJmErhlwpp4rIV8Z+ +CwG0zGmmySFQogiptzeemxAQtdSVvXyEtu5WmUsRt0MEGJvEvCziEQ8DB9waR4IheRXjmmmV8pJk +435L7Kl2VDFg5OtojCuOPbyc66totTVAmGfTl4cJ5bhxOt5U017GTnaec14kNdSZNYeuk3QguBKV +ORd09lwqgSAUVaTg3NEsyXUQCEqjb/beOfKLdbuQjw314RvtShRCALs10YZv2iKrnnbxDpDgv9KO +E08wzEigRP4wazQOfNexJld5UGs8Fwg+A/IjgVQY5lZ00SD5QDOZQHvvXVhqhSNqjbVxyi73HycE +hGhwVTBuRORkROvJQEtZSR5dNmGRnoWRmny6IB1UMa21/slp8wc8DDJ3JoPun/0KQnCnbhN/ln9K +V/gnkXJCFK9cRgpp/MonEtPyWFHOtg3AJzPRrOOdDNTtqHVgGbzfxRZpUdbCs9iitYfSES+ASwmh +sMb2nToBBLcgEZp4+/dlrY/BhcXs3iVze08h9WsLs0qlIZKCq+b+eGTsovXZvcWKjk/M1itadN/w +k2UdeRSVSgJNLeqHCDxeW4Aj7gV8MLVUbeA8VmlgEDHYvwSg4OpcpktkhJugHqRfOnXCLyRaVwTN +zxCv1XVhp8Ng/CYa390lU/nNTI6DTjXGpwDJSk/kZ8TP0dXQCMfMxZPdVhCKlESu9qVsVtgligTS +ANutTTBUAaS8rooyjSAvSylW9MncsnfJudMrAoJaZBIWujsZcrE/PcPVbpVldwBAreAvBjWW1IRG +jC1NTI4g8Lc0eqSXyGTf+iSLMwOz1DNmT2dWGz7W1NV1TEjIrn94NxnnmgHhC9+OJFSanrHIasmP +Z+TaINSCU7A5ZMfdB9MIC0HlWrUryqkjgRXVd9+7LYmjRLmOaO2Q0RHHx2bWBSQgiUqqWJBH1J7K +vl5jNZaWf+BHuxHysfWwX5T6wE5aEaubCCCckDLuhiBtlfxxwEPMOAJS72fVKmHnXw2U4kq11PfC +QI0Uh7QKEYq5WCCrT9i3AbDeYEW/bEcaPAdGOtQp4R4zBV3iFvSE9HGIBBCDleux5mynT5VnQGjK +x0lGG1rhRd4XVCfCG09i9lWJLld0FBSLR7SwN2q06+Sq68ZlJ1BbmX6+6MqMrJ6WRRw9BiZrZaQ5 +oJ+esPzX11C1qSewDGlzJg63ZiXmKsvXdBbTeCSXwD+nxdFHUoSbqUZZNtjhBnOF97SPB/rirYKI +tlAXie5mujAoFsa8TBZpvETf5YyFqwPey65Aq//kYTugGnhS5ph6kNNRXfkLNObntwaIurl6zbeM +CwEbWoXRAeyhLn5UDL6clPhjJdBsDS8XcM/+eVDeiBxVkDjjJrc7aIz3NjT5CG9hRLr6GSFOguJk +D8HCviYrdo7ZJ5PvKv9IFFb9L+SxBIdCE0nd/LNMMENAFdtSK8zf/XMJBu3geGQMSJKWmXoLeRNw +hJkNbHePteCStU//A5h0UBIp6T2psZBVGrouL1HscQWrE/pN1g1oJ1guGuK9d0rYOFnQjctopWzd +Ljth+nuAwf3TnEUT7LrR3FPxER5lBdkb+HXn3nG8WGAckrHMiTHOQ+RL79GoM0xaJbEQuaDc1NAJ +0slu3eTtQHxC3fEcTI3xyRsrew42MCRGjdMRvNBYQHx8EuCPaQgd149rk8khFk+A67gLxkBw+nHx +Ck97TVO+hoTkVh+Nt8WBhoGs0mqOVMG/p5UGR65PaOnGyuAZE5j1Kvb38R1ZS6IxBo8dKYoG6KfU +41VEmPbI7o9eTmNyWlWu/Q2d9QUeEZUGqHUtrE2fFzfYgJoAg1/oa0WfhYpkIuDWVqNkxE23r2E3 +0vJGnfk1s09RqiPLj+buypqdzsOFw5ln9IdZ5kZnsNyUqK+4QGl29y0EJPpsWVKEdbHhaNaCJMwn +N0eMlEcex5oV3pxHyhdqE8+uGJPw8UQ94h8UBCYjOXWJbqMfiWmHZucnbBX2U5+vEpyVKCSSvGI4 +QjL/GQqNIqPx8VTNOTkF1e3TLXNcstqwGeYWWVdLWVo5oGRpupS4vJdfd3AGYwwPmEUIInbKelHt +skguyirMsqWDQVUMxi4/qzEfYVLcovQUd70407GSSQYx0FQUrBOF0UwdOSR+19axyfaWHK1N2+Zg +LWvyYrVRId/GplgntbHYbQMg81ZtnfZz/+v1IAk72gPXuXM/+Ut2zchTwX9mTVL2RHNgVB0+NwWF +qW4fdislXrha6HbTAZnvZuejzetkFs2FGEqoOnBu4VlPgeAKEHXFvAdfqa9pZ9eDyAb5393TOnkg +1hjxvANuFPkz4PybMwuqq4kPqWljZuBLJAlEipiXzaqmOmsTJaKY3uA5n4zRyOERpqggC7xz5RYX +5ZsM4hyAOG/HovnybflKajoyX9Y5exvvV481Anp8Q/Bf2BrwyqSAn7aIEEr7gsnTvBpu2RKHTKOo +qEZEAV5Dr7ca119xn2vZWG5dWH5Db6G7WSSD7Ymg/OxLUlJUxhbhmwgNT3O14TtZ9ti6tQjlnC2L +zdmXVW6QJkPsu9a+Vg3Q8GqGDhY4H0gvh5CHau+ZFDMGa/xjQhUz3yYjFasIt1ZpijK8NTlLb/ox +4DGpXhNTTaWDXZ9BxnkbFiw+E4JrV3kOvtdWZMfEUYaX+07nHvmie6Ay+b5ZLtqsmnyUwGbfZ+Md +J26tVpihiquhgxTqVN0GAmgvpg+3Q4niZ36ILXAs28QNLuwKcnRBfpd61vzqmxpWG7/WlvmOmlYq +1bbx0jmFDPAhCI66ZL7qGwSFX+Ob8+tC+7desMwuicxMzm/qlEexgrrw9o75BEwDtgb0gfF/lNij +CgpHJFV8/6ke4RNtEemqjr7sQfy323pyVQ2TXhPpjqzWtjNVsCOlmvYrGlXXygaI1Pjaxj/FetCr +XB7vtaUIMxr0d9g9oOcd6Sl3rNzbEtoFrtK29n6Spuyj/7lQoKI0LLzr4LcNFme7FH4LRr76nd70 +qqo48CavahYXJvIKxN6Fq4LNnrULKP9iXRWbaDDcEv0AXrgk+FGsm5FEAQvvTtsbBVTWWCXh01z3 +BPDD1DsRy52MlLpxH1+/MFJYBEcARfbAP66vaYNFH3NgVPALsdf+GsMGbf15orjL9TDi+H2lgHrK +aYwaSPrg0bIBgFX1A2QwkClOeY6jNW+x4ZjF62fyESP6EAF/P9JRYx33cvanaSbbQ63KUBYbw1GV +SwX0j3+8uI6pkAQ7cgS8j+ySfAEjDB8ADaecCyHRtv3feyk5+HXlyCgN8RtaPUqCub1S01pNbMfN +KcDe93ib316FKCbip6QI1P5Ysl0gx0cWDNcdEJmwsyWPjGS7dsu2ZpMd/LzUD1PUXhUPBxBVZG+Y +yjRzLWJN5fiOxWgI4asyv8Y91tja6tq7G2fEvy4gLjbeLNjEqozmjVBFT8lUb9OTqcBmsko044AO +1XT3YPOpmjJgbAOo6paGq0yUu3e9TUb0ubaINl5z2tLniTxrkwXFkOESTkcjInOs7AwORmui7iki +OJ4Zorii5wCOo17gJjx/5oP47AeQVGGqSTbbebLI3eVzgnYpIZpv6lHyE8spdn9p3yyuhbAOPjjJ +LWBTByFKWOYn88UiTI3io9+rtG6l67LGL5tib9MIDTiZnjYqVyOU71rKF1DFr3JeItoQHTHNEIiq +TQ9tOAEfIE7phrUL0DRjgkCBKQjE+tEvwpblRqDsNA71UxXra1FUf+oDT0uyV9Dip6nYKnoJvFhl ++v5wAAYGk5ST2YKo4PKgh0tKALfV5r6V0kHnUa4wmioqwEYaLGtZKHBJUWNDV3lmmTNdYR89HYLn +SVAc2idof07qoiTmeD9THFgd3puMYcEZ5joyTPz+B6n2KpLk1NvyV4p5xt96zutOCMgBJ7Aqq8Sm +AFpoFb8NQx2wFMbnKc4AyDLazcBWvlGXiFf8uRLH62NR5LnWAhc1tnZM6zBkVj51jXg1nZd1f4ht +5RoOTPD35IW2hDERGlqBUekzyze/C/FIPadbYOZdoJR4/BK4bK4tdRWr72prTO73JCHF2L9X1W/v +4BYtZ4mwDR9kGACFY3+ZFEfepLhmfZUnmZ77NItfM2Yop1+sYUu+WnPWaAGQlHeM/UpkhY8q8Gtk +hNszJWn1/iMviRM6K1dXWWJQKqJM4i/vMmru+4aRp79PB1WoRuUsCSFWQR/lKgDP1RIRwVEJYe3c +T+7hV6clnoCO3YuTRvMsysRij4ucrafL817yUJrbONXV8/NzbqOSWKYo6Q0Y3a2W1WbspRjBTX0Z +91t5/8KGkaZmWpxRHZKrWq7MP21evT9WEaIJnYiKxygXrZnGSghxDfkbSctw1ql2I0rii0h0QuQW +aFgkDDS9CMyrBdl1sKv0Sdw9UerunCdr2eS2ApmeDr8kCk3iheSF157Wvc1/2jj8lhEHcqmrm08m +3NB0ds4Sh0rwdLCdk6Qk+G2XAs72kN9oJI/IH5ZGwCOk8dvotQpNwHtmyz9FnU47yjamI1v9AuGS +qcet0JXeMjMtb3s5wXK/tbWUEXmtKrBtxXJwdiFmWa6lXTZGhczoWDGExHO8jpf9i3WVvZN/dKnf +FjSjI03FsoeSKaAjMnB85uX0mI5t88+czCzHQTrshgeURDFzCzMAZDUPptARCpbrIV4ckRi0mV3d +HyI1XuAZWZFUdfRCdqixAdTnrD+jT7YWS+pObqc3qs0L+teEZjP1biudIesS6xhC+sdM2ql+79S5 +f3EijQC1jmheC8GpdedQkYvCh5jc490m9WhYmxQLGdB5bf32Xgi1EiqSbnOWBdlogbcmStczATAc +BezYPlumewF4dKlXaYdPSFrHXZTVQnSTaN+Zs8NrcAJh+XkXqhqz8C0nNaI/j6X3mOvncX0h8K8W +LVX3W1Rwb9w1IpzYNPgsfqhR4brDkBJ4wbVE0fz+1cyXISKfzN7fJ6+psOCFyOVlb6iCpIr2aoKT +sPgIihbiySZCvM9QBOILCh14h94lLGFJGg+Z7P688Wvt3Ey6gs4DVU75n397LMVXYZT/KoxklI3j +Yc09mlpgYjiBdHIqvaKF1oB7i1k8bzAUMk24CzHzTkRRjIqJxLY0PHUGzS4w3cUDBXZ7B2J5iJG1 +qPOtLxJyl3HKsknF5QhBDwGNINjKYDuW72CvA7fT5eK/J5LvsWYXvZv26XxXcqhTyDpus7FXRYg6 +GC+3H6kgm2mMmIxqY4xjL85Bok9FtIN+DiNDrLqx1Gwqs7+EK782xj7NCENTNe6OFWC4Gf9g+Xw9 +M5EaGhDvk7UD/qL6+iE0+NIOrrqPIHRXATF5zLn68ypQ8b2XpgsV5nFmXJqJJCFIq9gFwdlGmZGD +L7pL2qsANOYW0lY0DbrBsosEjQln1Kqn+LhAwwSlJS5Cb9uMnJP9uJGd8agUjYwiNGcikxKvInv6 +LHQ6KyuEPoO/uuYZB/35e9o8htl85ZGAbey7SKcIcwf717rCDq5SuEw4W9G0aZaS/jBV3XYkx7JH +S7lGtqh02IiEdriXXoe7px8kfl3u1b6D23A1/PJd5TeoyditnuDfmf5/PpsPr74vTZ32Sq7ylNTL +Wg+1A9rRSuJySjnXx4bj+uLczUO/YQZT4gvg16etM/0ZlJvhuRmP01vuB4+jHVrNCeb519o5FWN3 +tFN9q5mSYIUnvqsibZE0OFg/S+mTj1kxiizm+ZIHbtDXL3l5dPv5PePUTqw0GkEtVThy2mUjHc39 +zoECONH21LKIzVsE1Op2PYz/u9pXKSHd50E/4tP4tlr68Dihq3Qw0Cg+JgYybcdk/vzeQC6EHGIm +7VL9v9YkGAA84FOIP1M0KR6ayemeuiEslfgKf7oudetcRjAePAT9CYNzQMsngXVZX0y73U8pQvV8 +5cpwkB969ctaH+CTvUb8kvs6bGlu+cJ9OcyGN6fkwynEPI3XVVTLn6P93FaNrcmnBg3tzL2NR3wV +TkyJrR0RgcpYPj0KTvQRvpT4t0Yv94VaAtPyl05CC0cgC2KzwxwLm4X4IQnbFbJKCg3QgSnS1IUn +nB+w1GOcXnI1Wb36juAfMRiDSNxGunBBOXiKCCxenULoeqndI5EcUSlvup/K5cIVJ6KofvRKq/+F +aUePmM4IfQuMZut4jpBIAub6IWQv9z66I7zgxQmELQJL/ZPbIH3DH2nvHc29iOStgUY8BNMOZMas +q98s1qnsFfN8j90k+RpQlxh5KYE3dMdhvmrT2Nri3n5ehad+h8iwHepAKT141A8+fGMUEgkXI96P +BTybAawqCNvzC6Do8OXbik/5qcLYjBg5AWXy+1ndweefZ8IpmcZpl69mADNumyP+WwuJ/5ighJa6 +Xt9akq70yDSoln5nBIpEoYjkI4lPb9RQvNGzbocaqiefb0Y77JBXyZQU5m9O8liAb8kamZt2omdx +NGcojjnmxGiGtMc6ZfC3tvl/xG4rJmQlgq/5csUZ7kQVZhY/UfZOdiqCiS8P/bKxa27xU5yMdPW/ +ud8NaA4Q+JoYZg+FI7byasvTl/TfXpm4kyXV7n1SID7qXh9B9FpMMQXWW7/+vWEiOgG0I0nF8xQo +iIhj5DuWyC0qZKRmlJD+ojh7dsiZ67LaymaQz5sEhLktGNjpEIHA8l+TIjvM5XnyB+SPEpDzAeuA +Bgd086/Ld5XW+cxbWVMarXqQpHpuijBY5JT43CaaRGt85UtjEK5ghg6TvFdxXnd5IHHx92nXbn6g +ayTHiFElUZygcappYkaWh+5SnbAYsXB6FAYmeOf4cCxan6MbChJkd4KLb7N8at4PLDFOqq/iOoY6 +AJs1NRqYT6zOj4Pwt7TlUyisXll8uWpEbdQg+ODHHI7CO6tQZGN2hbefRwTJcGbuULd3PjYGsSqR +mI/V4i2My0T8S+VcrvL7mgeHQarmW0vJTAMD6Wd5ijSAGUy6Xu62vEc7Pwfqya6UAGXM38fJyJGr +JQrhzqVcAPSObp0NKRsoYKis4QPC4Vbv/3arGExH752wjPGhk2OvJs00699qp9ogVvHeYF39wgyR +s4yRNGAqdqsSBiYSq/i3/pYzlbyWGvY05RqMwNcJuWtnc3i4fXXiCCuYlnVKVt8VPodr/IYhMt7j +zlKrdB6yY2eXNsSO7VayB5mMDduGb0t2iKu101HLXQ2dB+GVx4Oc+k1N0xEZ8g+TRqvrsn6ZgXFq +KNnfZdgmR5d7LIm2FTekLenuxAA7cefCv6L3atqjCxFNbmZ7DDV9m1iwW/PAYdKSWup8fqjieCNK +rT3aMvWyVCeNJwYMJ1d3o+VgqyIEm7bSU3Sr3rgr9lbjQRio7B01zvj7kYmwowlirUaA2O7EsC5N +z+u6pBFNtGbItuKE67hih11R2jDgSiQ/25V2Nf/gMHmPfjx5PavM2W8+GhgTaX8I2qrXMOokqDOI +9hLzuH2NDeEMSubHxbWEfPVU4CxbmVZ2IAFRTXhZE7AREkrP6UqJ1pW3Wl+1tONCFBsrgDH3i7Bx +/JrMkKMjfttx8pVRhnViUY7mdd3gFOvD36EZX9cojL6LqZ9sEi0W4xN8GTltxADeJKW/642RidaN +uOUpSB9zGW/qqc/i7qp7hHuCz3jQiqRQGD83M33zILUDDlaiNK2wakhkTfayKbH3znNr6ScPMofS +YcMl359REh929ijjGh4VaGMVM6yNXg+Lc3IHSeJaH0lexxhgOQHx2IEFbExeGGpMbxVX+cc4oPUP +r68mC1+vMx1uPfHSWvqpNcOuNfcSjsD03PXem36R2VsIuTLorFGWGDSwzXHHtpf1/dJkJjTQllNB +ZSWx/Z/0wbG5ZegBh+A3SaTc5K6ywoYQN0lGkISJcg0tuIPfExE9QetSYdZcTQAE68QKRZ9a/Jcv +61Nff+/Lkfus6rXcQkDpef3Twd8JbRIf1Sp3Oq9qmVriwW+eQKuQvn6qOC8B97U3w7/9JDgGsyLx +2lHqsZYHX2FA6FHY2pb2bB0JB3NhuTtiHuuoOhVfNP06y94eZDf5B1rphEJL0mH9wXKaWfvm1WWF +D1/6KmMDeEtJ+J7eBZldxyzsZgKXVQNhAsnpPsk3d+OG/FHFoQWu+sCXZRKoaRiarQ+KwU2bbY6j ++/79+EFXeKzLmc79daWFBBLKJ8x9S3r54ait+0k98Y7++nt8NjtKvnnanMtt0N1UxH6OKzwlQgl8 +MfRC3Rr87O6UiEopDBE4yhL3vE/NlkL5b6TkjPQNo5/mOu/CdR938hRHLWCVWE5FM1jvA/iYJweh +sHpOo8qVZPyNrFAWEi1bxvZpjvtenpbIBVCggSWn7J47UY3tN5KqeEtk3WT3V/ZZrCqBvm9PbRVX +pjtGtdpkVNlzNzfcyt17sZ1K0jPa9GaILOLN69E4NbytyQHVvMBbG0m4euHrJIeJdVODljMn5Qnl +HApzfFGN4AEKa+rJjnpK5ljATJVI/m/KloBq0HK1+lrN/pfrl7xVicI2W8Act5zCvp+EhORPL3MY +eydC6wv+jB4R956kUkQH9WTSCkGiLdIGtrmOSNMddsikVLig9mUO6CcslnjftLgKKrBpUHHeil7k +WQmUrsEK1NGO01kEGyrvXP+kIoOQ1vz92UrobVZRLB7rsCpSoliS5889aScG+lbD+B619ksJc451 +c6PiKcNDt9TeCo2vDdilOFPosEXUJpOZ+NG2DBERf/0puplVbeuKQ8U1NsmGp2dZa8gFsvyYTW0+ +k4E0sN6q/dKy7LfU4PchZ5Ldmc5yjQe6LnUdRMnV+vmygfkSG3ivSusFn4DSu2dYQ5cYez4SvvSO +9HN0Nr1RZ3FSjHhlFjcnJZBpiWttT4VLZ18QvG2Xrfl1UvFIs0+kA3JvvkImIgVq6Q4P1UHNRPx7 +Jszx59wHbqc2l4lOCL/GODHdjQv9aM9KYNvUMCX2vBbPG1DpYJTYFdZnBpGwp+5UN8wBE+KSKite +t/hN0gVjz+Hjbz8coG8lsZ1rvbOLB3N5KXGvjGf9F9jNhRAuiq1BHyQJsDJRYMxVLfEfbJlYfNqk +0RK+o2eL22k4UJXTBjFziYt8dL5BQovugkycqu21s70fY6Ak9gU1h/ViGf5w/VrLBiTFSQJa8/bJ +y6XTG9nhsxpnlo3JtsNbnQHec1LWQZiYAUzoWa/MdMSIKM8ChysZ6K4X7oQSZT1b7nltqcbi/TQJ +Hexc+Y3VisXSpSWlHGtahBTESakibDZnEu9Rn/9pGbJWhi/ezU3Bx6S2Sbe7k9WnUpZmzEjtkGN+ +yzoP4A/uTg8S3B9TyaOieG3cUwfeUrVsTOubwEnWQoBItlR+P+oUM4i78nslVqipvdjIAzvnsHgN +kd8UocqqBKZExhtq3iIOEiUV6QhPidFjnCLnV0zyHFP+OFcoF3iju75dN5cCOG/gyyaAiYWJe3B7 +K7xJvq4PHX6uuldxO9HY1INzIbyqkwX0/ognbJa0fyrMZhXJHmA079wbR996A8C5SbA3I3VvaOxq +4cxxpqVT9cFlDC1AFC6ED/inHH6L2x/ubEnxtloqkSTgMF6gv38TI2433zmdkGMDudJC8Wq7FlJF +zfRZW3zW8sfytVvcUBV7SIGaT3yS6pOwumcBWnJgKvjTstXBnsN+R/Y1BVQ0teRFVBLFOp6tjGTp +qfEA0EhJIEnmr9KhaGyQQD+7rzCKfVBv4kdzuEmVkJ5l/YYNctUfwnDP2NXO8Tgpl75YwFWfQjNu +88ehliCov3B/m0MBjzLbbJgfN4Uds+bdJpuVR13VcG1Yc+0RalMTic6wH7ub1xumhWCJhvR7cCOk +NshQ/oK0VeFBqsqeyUpX7dwJh8O5sz9neH5WnNMAnbRXfKvFGESv6xhKTfGHz38PH0ruBQj2m4Vr +LqUoOCQ8Uq6je+UFaikFTgXn2vlh5SD2DH7Iyk8/vgn8nO8oeY6ISKldAwGcsXEBbpGXIIERgEiF +XAgreRtLBisWyzUZ8hXBSb/iXsBQe55vUEs6RHtltoKSgLNWZPDGWxdU0mX5Yvj5QPg6u8gPKGLj +2gZO5CiZPdAvtd3Rouf/NpB9vjcEnvLb8AVCXxrGmjMmI3rKwreKEX/r0v3c+G6pDdiewsTbwjan +zKZfd39weX3ZwuWYouuxiFPTzBeeQ/ykVcjPbR/PpFJqkdk3+OBwXkVfL7ecWPx5EVuYXL8YMuig +3G8gEWo6ZSVGimMRruAVTT9keTHcU8UvrGpgL+sLpEItUMxWmMDJr7DZFHDix3t99seNdI8F1uBZ +8+sKxYL1qv79Vg8eKASWiPI7lUDxgsFlaLwlBeFN6DSzhjyZwNI47V1PdnbyI3VzZjq1y962nfvg +tbLrysGFljkU23Ob44Y/Bi+ieRSTHzNUpYoMC6v2ziGtVvIxtImI8Zklxraey/Y/5o7Kh9OfOqnn +t871ONezepKskmY79fd35BNBYuYrgY8JuoIA8xtpj7MQhoFoqVvcTNvQahn2POzuppoVH+L6PHSf +19AgU+APA77Bu6m9uyIZR4gV49p/g6PlKIE23gRCdo39HYN15mHKmO/D2mHlNaUeaPAU1qZmW/33 +4VBcrLRBuFCU79YXTPcWCg2s3FqkklQvK1W+IJ8F/CQOT9J7bAKD+lgQ/A0Kw7KgMuGhGQsxMsxX +yYKJuMNQ9rBVumKFXAZ6kIwocVKDgRgBOdS8aFGzHR953/5NNgdL0xRpPed16EYAFyXI1L5oojNf +T0G4gexgTrPOtbVfO8GywM5imYhWXPSD65RfqQXQRpp9zg4sykCoHoHKi11e37/iRu39lFd2r1nw +L60GqCr3jA4YeKxZH5lc9a51F8eSFHOhf4N2F5X1I3z/t51nZkq1YgUB6WiYON5qAA4o6RxVBIdi +QiYN8Tp4RZ//YgfU/mAOex4vnhwwtMieMNEz/BiVWoOhMnub9zpen3wZrHt8u4bUh3fzPGei5Ihg +DB/rQq6dpD+D90iLVIEbujs44cC9Ct1QK4rXeJU4yKevj3agDNfZpjFqymZpoCIJldxU3YpVD687 +XtyvQA4m2RkMzzDOza26ZdkRFqUYeylZbvHsXj1hGFoKKWNljsY5A1Mm/IPtPOvHQrtCzkdmhDBq +rjrDLaGudIHcepBKigxH+g8Lp5OfO2x1cbSRvg5EtkzlKZYYkuYEUNEmTBw7a92BRYgMiuHDHhVt +6zv1NGiMWM0aSEEGWzDlKlbZuxa0+w40YTcy8Rn0k8DTBdQEsL6+lvJcfRpwNutJBgVm/QQmOt72 +p/ArOMTqCjT60BAtBrkEYqLCwKUNSae+KT+AX6bCBh4L1HT5ev9XtKHci3D00c4Zf2viWzkVzhpj +OuDs8tHRJf+oVc8nL8zL2Z5VnBgnqu56guOE7n3RMyhToTsD9XlVC6RPErIVIeleWArNxvPKLAP+ +9lLPVkrqHn0Xs9c6SrSe3fQZ7KrM75qiDHf/jH7H4LFRmG91Q7uD5kmsAY5aRS4IUSBZfUdk7Wjd +z3P/FF8q3AhKVByKfLFtpSlbCt2QuU7tFvJNqKQfvwoBP6iW9uoskAv0TG7fhT2v9JnYmH/sTCrs ++pPY7ip9jwfzasZwjIUoaSqo2k2HBr9+Mv0fmrad+id+TXGS0fkhJk8Tu62UZc7p2wbebfR2uNEQ +IAoT+7eqDq0LuXOdfwIDamPLLQcrBdHadnLiNz4INyyxEAPJsOV5vJzgqsheecrENganKQKp3gtT +mmfxpc9qpYgMV9ECRs4ytQXksngL2OmWlGIZ3SXQiXjDyR8oUY/T5oXqjE/BQ5M20+LWaE0Ac2dI +GdqzilzJuzQdYB4LHIqdewuNowUSfJ2Zg2QffJ6x3m0n0RIMdtC2FqOm5ngLMUV4WPF+Te+oCSKi +J5qMLCwwHLs0IXaFYUSYjB2jMgLrzoHTPfnBVnzXf4QGKYCd+JjpUgqD4YhQDd/e3YyswBKpXtKp +wOR+mFy3lwlI7F/oOirLYlH8LNdIOcMOYiQZcN/xLX+6yyU5bafVa4e/Ri8NimX9iCgfZX/7AZ8s +oyUVCu7y8d60y+xQnm+oCDkI3T5WqSLABXm8+6VUxgJYQg70u+WJNJv2htFJLRSYrtUUiHKTatVi +4MjuWibSQYqmzwqO3/y3lOkGSseKBeUjkO0TjGSkELx4NbWXJfUVuG+fKww9XLBjkI9vXw37KQ9w +qJbVMU20MSw+vvCYV7NYa8yFFpjg5zouXrg9pl3nWf1bXNIa/3hY4+6tFv99ST4UA0DRokhN0n3i +ctLg9w4jDncTnA5Q5FZ20JSB6o6JTQVOsmtcBU/iFrbw4OX7KrtPY5U5h2JKOqzNrvxhqUUXQ5gl +DP10v95eGB6ZZ9EhADB7wxgAY2XWhEgtlA83J9Bdaq1lTQNFUURa7rYU1Pmzq/qwL9MxP+q7Ax/U +Hc9Uz53B4BKO2fpdR44pBofkOi7Z+U2Tl/lPUQpoFQt6EpvGvCTadD6x2OgMlb4prHXPqT6XF/Vc +ZGOKaEdvuS/B9z9rJV8n5Bq3b6Rujur6jh0WH6lxILzN2n46Jxovncp/njxqyqzMpjcLE9Itze6/ +m9pkfbT1jUcmIE7G2tah6qbviF2I7lgyrb6bvrGaqbVctCl8B9uekpHL0Hahe1iOjZA/2dptZu5B +/2XO0kfQXapcJ9EAy5/Ww1T8nxoOnQ4qeHeDGk/duRRJP0DOxuTb3eApML29MUulYMJ+681H+Pe5 +T/ZaHRTUUehRiwKSat+cIo3gTvJHMXpQv6sU4jgaren/9QqQNWMmsps6sxm9CZODSLkQd+2W2/wL +QgTVsk/KMSn+VzyAzZ86JNyj/HthB8ui8S88P/UIujr2koyhpz+nwo1/JSHqDnNuQ1TWo13bBNCd +y4hmt1Eibs1VKIfwASkH7/y4LHuMBqwnI54gNaZNg1G83Ap1vz0cfu5xtO+QNWqVGzImXRxcdTY8 +Kbl5HfZJmlK4vLBpinOhryGUqxwwa1RQlCHUHA1k81G1w8NN4HZVkoF16mnxVHuMHRNKw1BxklfK +pjofTqTCpGnWURAEZ9vOoheNRNmLiKwvPOKHjlnNybjnX6r6tTsR1/tJcXLqBQs9x0BRhLsf63Du +wWFPjdBwCyRP1I4XVskpKqKEzTz1/416th/LsZQ/MGqb99lsGku5FOAgwJoLqKeSqC5pjxk1ORrR +lXyQFlaFyJ3Jb+hhDxCS9sfPlXCvhRhs0j+DZlFvvj6Dm3P81tdComCDTaLpiVn/RR35eCh+uDjN +bziV8ZpQvMEXSjS2dQji/dfbJVw7nhz2c3ZnfQsZII/N1t8LtwNpvpkFgIma59seo/YI/UGgv235 +fQAyVA/ogJSYF4opCilDUS0NPpoXIhO2+5baQfvNzPlpa+gAjG2bJjL9+lqx7g/GIPn9EQ046R6r +d2Ek4+eg+BYWe2Mhw2UGF5zjXt+1JSgUPZkkva+DYfP/KGMeholQz5xpK1NM766dzBrUU2N4mgbY +UsI6Hpz6pUFjdL0Fc+xncXk3ZcKO9KmIbzBSDMMHYFwrWZSsTJ0jBJgJh4joIMObtaSHYaFE+jzg +msYMr8dp61eX9vdoDHZI7667ZAgyp3bKrPQuVS3YyD8Cnmapus+JdSEHiLrhkyxizYTt7W3lQtV4 ++pNyyLvTQTYeGoVX/KLEXVAl6NnYi+7loToaUSk2wiUtfjEKT+OGCdN82mWRIp3zk8cFgAJeXK/j +k38INu5yvQrm2/xbmMYMrZ8g6A2KKfzHK7lN/JGKbx+4SJCrnFrnoCLrPRAh/M46OE9dX9vFRvT3 +DEp46nQTWvV54cCTILs7PBFl+o1IEP30D2/Ip3kNMDdf9cEvhvZg/NCgI3vq+MhZ5MrasIcPz9zc +jyKJyatC3UxSxf8QHf7fKFXJpb8yoSUay1sYj5MmdTTVRBE/2qddjN3tLLrnqtnd9NMJtAIpRFaS +PzLwF6ybWh7BJbgJXD/VHnjjx1hjzXKxTm7uZHRjw/1zJX9d70xV3dteJsqApFcbfv/ELagLuo/d +YLKvAg0VuMSg832X2B1qV3Yy/Xcbpoc1UoHkWUqJeQagW574MMX8ohI7hJGDCgaKe0QaTpfv7ykH +EiySg42yKU+ebRMsqjnOX0pS0qVM1oos6nbd0ouZkNjSdL5xvFzsaePmZ045Q8dSv5eLhki2ozGW +hvADPyQnleEwaSavstu6Pxg8ASmR0bTcJEobfIgKnzXoXWcIAedJ9hrupZY2Kp6abAxQjmUY9p6V +kPHiqiKbBVF4oEKyzvp/fVNWqIundDG7GkVCbxeIpkqsaUJCclg4vPz9SzEs1ASzlvcuFsuncQk8 +aJotJ6cG0/U0uIs/V8YVPZm9hM76NH7j6AeqMIo8E4KZ4z6jMtUy9hNFF8CIk7Wb10DfNAdCG2p3 +SH6pB/xYXx+12QEyfeYQwpJswKZrNj65d9PxtffqUlwK9TgvEcuiVGr8EFyLwI2lc9r5vNlv/ztv +rLoNUq3LuYKvvnal1bFnjzJZLhL34ddI7MEtBFPjj1Hz0gebfdWzkOdvXXVdewaT7Jn8ev9K0A/h +SEpj2pk3CA2wXHxSnY/gIzbDiloSyzmwnpNYsCS7wEH4ZFwvI1R16sm7DG3sKDl9rDw+Qmy1cjDt +kI3MEx6qhXuX2B7toJfbhMPOR6R8PUBgT9RLF3N/KBwjXG+YNsXAAO2Ovg7ZzRPSWnUnUqE6FvkJ +CkifmQZkvdU2+3B+4v/ksaSJg20TXndFZfuZFQ7eYTAMI9iFMeb37z3IiSrZWk7G3sLB+3B0Vska +N5tRmEqkJCiswLTr0Cm0N3M2LfRoWtq8/FBHzyPGPs7XR34jJlRD/9ByhSs2CTxE6rgqa69lPUIc +cFlWr8CXwuooYna9/hM6bL/0ZgbtieGhElvNwi48tOMCtEBlLZKb31zkvhtdULwFuZJ5++JLBTZR +okS/GuE0cdMSa9DRKo4XGi7rqmhxpDr7CxOb0vcbcBu8Nx9pqleKAmTsfhu8hcjuPU16vLVe584P +GFOc/rViRy72ZmCPp6c144FgttqjQfbXZ3yAPFhEBDngV2UrMqX80ETQP+WMWA5qXquSbHxFbJgD +QxR++tzl8Q8l//qLTQ1Ec0f9zUl5hVeS4z5aDyRun5K5Fs4QNgvWl3JGml4tm2/t9CZh7Ke1Y8vL +G40gwcYQ4Wh1pf2/nQYEHSRjz6NcfRFtmPCuRr502EOSUNErzPzkMzsP8QPiHPCyRnlzq/1wV1W5 +jY5Ut5Fo2pPaBgy8dG0b7pTv1YFwhGMWwOef1cjT8Af8y0or0S1ULKGQj1AaaasgLUzsYRaToSVT +4L2Ta2HbndTdaW6K2k0B7J335wfT6ivHffUUkvQRyUMlkMHF4xKYx/cbYnx16zCr5tlo6LtkWdQI +2ANy50NFnqA4OZlKxvtP6vJW6BVjPzNm49arYSpzgJv8PlohvwUMiAS4U/U2jCVH6qdD7kGw4jrE +x/qxYMhh8sVTKjQqsahILBW3VCYtRLd4K8lnX1RTUJk/A/EnUOvykpVJ3Qa01zDFSRKC5Twc6nPV +hA9UNda+IKy/NSm4WROj426Bk+rUOVZOYn0P6lORyWDJjTSlKzG8tZjSMBFMreBTpu5Jws2bUvmm +27gEBvp5EGCyvDKxsSWnaID0UrWuojmtrAxb7AjJlaSQpCL3o8ZZhiWUPkWiGLVQyvWLFfckDc5s +SwnFo1zmCdgLlTTPahgo/yq0cbz2r/akpboU5PfObcyMqsf5MhvMvy9WP2aaaX6jh94xC8LYJiuM +CleNldSqZAqy6Po+PNx/2dTmN1lYuZuJP3/TXZKE+1ElpigvVEwbsKHKqKU1Wlwv3YBS5l4TLjtt +OX7sLiakEPVgEvanDKcSEZT9WU/Kr4zaSUzd76gArhwkJNcJj4tOIofAyTvhMqLs1K0FJkrO1+4s +/1uXsimEcNXuuQQBwfaOzFzXrDv63g8gbS4GRiI128vi5rO6g+rvmbk0rkMaswmL0g81dEln6mGy +SoknV6hVP8wuJs7Rw81+ZEs1epZcuyqoYTIuwlMBGiJBA+z9czHcW/ncz4Ax4jU4fmci9baXP8LF +SnjFZMKseh9p3iwm75/qep+K5lCB24lUGOfN/NLwDZsBPnqJl7SlxdN3hMEnxrMmRvqFdP5VC3q/ +jOTmpC19hkVj1nDa1STOgsi9+DwBlnIk3xjR8uQbQo8fPtcajiJ8V1NiPAqoRag6kLvO/dVBSyXk +mP30fDnjkoD0h1P65Mtwzs7V/h061O4onPnP4vypA4wwzXA2gKCbxC0fG1KILttsSTefl0PTNe7j +vstGrPvt+0sBSY27wqdRgggR18nlgyZ3T6mzL6PApO19qdiFBkH+7Hhl8prJr2Mq3pqWonNu25Mu +P4tTKdIjxqMb5FScQL5Nv01Xjw8cABEyV9poO2Ivm6uhidmBYk+dEJCmQA/nOQ7q/G/F06eY5lua +At9EGt6xSvMl2Gi/4xuXae19H1jET5DV2BxTmIHauTnvuosnnJkfj/xRA7ojoBxsqCDYUxRqjx4N +bNsRRorKE9m9GGy3P0A7bW8Ek039gM72tJGIW+eocb0lN5x5hpd1oPFzl19U30bqa0VEr0c9Dm8J +vPM5Ixe6rk5H0JjOl68ejxA5RzlhXiWMIYmR2d2cfIOa/GDJY6aARGA8NjLEZz0KXRAv8LZMHLBo +H8XGzWRwuVoAeDd0iA4PFSYVL0FS/27HTw4/bxfrWJvTNM4CiOcnbZ45yE7TMmX+90tfZVUYz71p +4V1tqBPg5pyEUkaXLoDnd/y8qCxbMdEJdf848fidL5w5+U/uNYknh+Xe16RINm3CBpBMlzW6uoZy +LDRK+CfB3kVnTR1EoKGuPu9NTeb1FgfaMnndc5rJsyQ6zHm004OywT1U95SY/DVeldMb/HveH5PS +NlAt0eulPk0asEV+CkeRPAw1yPdJQNC6df7Rkc5/BS5E+gSvcTD57guicLYMtqM351vo28NyFjrw +taPirVq1kall7nUqq8efZNihPxlR+ae0Ann2Foc/MpBwIfsYW2Z4HXLqboNkKHgnDadrEEAA65IS +wonHNaNP78V9vAE6liBGPFR/wsB1wUEAyBcIJZSq72HOhNsW+U1zCaHr8wUPYxdVaeDD7EG5k+6j +tiQGOcbYPu0eiozFmnBfXMsJoJ5mOG5xR8zXwtiCHZJvfRIwKOqijO724modXHJPUqubalG3AuVy +9Rkfqa15ZODNdEZ9ppnBZ030xejx9pWYWrSPqRBnbNIrYWykjy3V7n5rg2RzEJpAyUC5F6iAHisS +63vNNsCvb6WSfXaYwjr06Tev8N4f/iFVljqHKfOPeFqkvwEs7cQh4SbtdtxP4Oi80Xx+T8qpe+NY +N0bEA0ups5ASzHtURb7oSok8iG0p0FEgA6jtY9z8qOp7s3ORN4wsVUPsbX89WWHM+Fgbod/8Pfgi +g1fRbn9HNHRiHdUp2Z/xsfkU7tn4uWL+cM/F54EfrXZr2hRKI3XVbdwSOO0FdODMopXFzlHFuxwc +uKdXR6o8vHCNOei1s1/WjnRhISrMDZ4pVMZl1t2abMnlvkNmbnvt4JHpBc65VQy2TuhPvBlNp6HI +S/qYXvRCY+JdQU3RC82CUpHnbkcznGbuelfk7D8jwYB/tYXtr9KNxsVi/X26ei0BuVvx6b9m/Yei +ty+WtVambeS4cqdi7tA0vUvAFtfHOKwKMH75dJAF3d+1jYtEcpA26H+7r08gPs9Qd4IUggOuu6zp +KGWFzjJglpiTlAQBXhk4rujmUnV5nCNGmVG2WrkslwRKvS9GqKGSnJADlAou/pr0PlxZWZb7YMWt +XwtYDkW021BUVV6gPe2gcrvX7aQGTlZ5JsfxbKBWR7fZOO3a0FlDSLF7uxYG6PmUMRDZi6Iml3nv +x6EyqN9yiPaw+L+wjS/oc9rCJyiUYxlNLyTnpTI1LayZBtBheSrDInDaMh/i4iE5e12AgOqJMOsO +W9/bA1bUeiLV5SHHGeNb2XpKIhOajMSpE6sl1mypDXFeMycKAIecj47Xw2WYuxM3gH29S4byI2LJ +Luw01IfXiPg7DYn2kAFu457HWwxXtLp6RxtS7tVd3APLNcqZwjP8nKIlpIWahB8L9KawQvArJTnu +MhvYQj+g7NiAwZsxiQ5nbNmeUTnnZvcC3kirBuJaoxQ7dtV8QRPOl1rb1fqfjMKN5wvwtFFi+4AZ +djvjEjXR5Dluz4i7Qb9pkKlbNoCU7UFWsM5ugQu4glMdA5GIwvL6DfBhJa+x7RgR4A/N325YfrPH +ojLe0t8UlB8btol7WLqcYerUDoz/fBh38r/c8cgRT60qIRunGs+XVp+MaXqQoHG00dEVUDeX9A2k +ve/7qSvFS+ObkWkKX16iUH9Dad/hzhNJZzwHBdsVRXV0SlNOYVaQbt0N1DUq52PubcVgt24UK3zZ +pU2S1QaiRcf5Ize+eHzGS1ZYTSdQfUUoaJSXFsPtH2vGvvh0NSKh2q5Vumq4j+FfVi6Kabyvz6LR +KndcM2bB6jgFzZ0L5E8yA1c/sq4+Dlk0AhdOQTWT+fpDYLf4Hs00HcC0EP3Q4S/xLeuDodg5cUqb +mqGcCGesUEj7hxIF3b3eLa8SWt08MahLVUX6v3FZdnL97xPElPWqZUKtbZvB1YxGSUZ4ZmOiZZAW +PPzXD1XZRw6xMw/vECyurjFb6WOdnsaaAcPDXQLOnCzUgirlPqJ6/ySW8pW7t4bhzvnNYKbY69f6 +KdRlnmT58hQ6SglQuDm1CKW7IcsmMUYrrqPplwTa5VAsouK2P7Fllm3k7zzcmA5S9v1Og/o6N7aI +N8aZYiBZm4OEhiw179QO6WCvmdvWRfZyubTG0E1x1b1cuqrH0G9gFfHKy3Z47wVfoqSL2K/sf6np +MYHRMbvOQTcE1ujilFBbQ5fCRHX5dvk/J/N8L4ShGVxv5n3EX/oVawbPbhT/5Skv4Y/tCVW9I/Cr +MkbSD5br1HRedW01RAGh4G3ppMPt2aPQx+gov30pe5pqr5p5NT8UGdLY/CjUcDthuT497AZoKApa +QXYiWVhsZBxhoq/WP4JxmmllVYe/sytgrt4QinGet+AgT4Fz/b4PLqdtQ6qda+bDoZZD4UB2Y32g +Lmiruisb0Ia2RojifaNHT/nd3FkDj1xUJ5VVBnMMAS7MKEPj8zQQOwtyNRXEhXFjNerFdmmIOPEq +48bvuXvAF/PR1IaUMBnECGwYv2QK2rFgOvHNj3KbmbOXxIr/lHRafZ7cAkRtDP2TS8D+ZxlQ6utb +t+E/47B6ZLKebarD5mmX7vPiLkY/jvdtHbpBXkFuDSA+2UcOeRZKBf0vIurqRl+UyN2Jg8UdhzLH +hdZniaAQGSBYUqblPkunavkX5GnpavIA4B9obycsCsrt1+UYVHIyyVv40EkYqS7V4W1rqcN0mWt4 +EWpjDtrB920VbyRqyRRXsHeN86Ypn1Dt6rscszhODYW4ju6s94eAuTnwHG0FfT6j+R2AwauauWPr +tARSjoJ8ElljTkFUbYGaM7Dp0jF4974T0YCN2pW+/D4SGJpa4s6jAAbn9Wp9zz1Q52uk9YnoDwf0 +vPB3BpChNks8XWLcAnp40Eb/saVVLoA03R2LSTyG+zYXt122j5LZG/WddzeK5D732pjT+Oc9Z4Ho +cskWW08MoYZD2JwA2oe6jdaiw9qC8OrY0lMpHtGD1kXRzhmbnlKjM9w+rtx1xgdj5wcJZh9dp2BR +73lJUs8i2h3WYGzgUkrqXdI12zVQCYH9YAzxjBFwYEtDazdaNJ9pMWEtSXYzrOGp5VVJ5W5WtFk2 +cC5Q3tvS17tL4AqD2mnczWN+ddLBxBBoNPjQGan0B34DWQn38uYTpm/KVtEpEf2+1qRdarTdEtbD +72R3x+60gcC+R69WLDAD6H+XcOl5XUdYeWm8uJublLwT297/hlW8zjXurweiUhUMsoSDUUqduwS6 +b3lFoBxtLc1JTKEGEZiTM/mBeHEHwonUotaH+IAAFwntOV8P/QFh14555hJiliEBL6YYw8rGH62l +a7g1UCYFoiPPX80PtLQ3jRE3i/Vd9d1uPfJGV/gC2AeSefx1gepuGiW9/AkgtNL/S5cI0+MsLkU9 +rVQ5x1ErWngK6vdsHNmZXhlLTjqYeR7I0caIuyF/wAvBAD5L3pjkdyE+luDI96WMsSNxkpV7tnTg +7aLJXjWzSQFB3d2EX2EBVcoL/+jTY9TmE2YI8+vhLAyAaH0pPYUdvy0/uepw/m0OIfaZTNA4u/Wd +kHWHZXWvOu1D4FWgArwbBtzPoStCOpkKkfVtzx8GFonGWrYWMaZgX3q0smQbK5fCjUkt3hDsV7FP +6KGX0Iv2GwHwmQRF9297Q8LvfjnHJVi8ZWJff0Lx5OCz9i0n5IG82zgU0PfUA3yLqAnAvWhhRKwc +KBGPsJQ4L4QtNFyPNXYgVQgklAG12yJIlghE2HrVa5q4AM3hIkG04baIK1m37hYUrHfJhA+pt6IO +OVBXzz6UisXvRiuLFWIFjoRkwVEvimB7oHlvWejYGoFuz5X2zaAoR/fDDg9WqP4w5QaEjZ3eFc1V +C3aFsIh2M1lnK8P9F/deeYLMCKqLKkEMdAXgQrHoW80xnRX7tjFK6gWHG/FwwzU02Ej/eX3S8ovZ +4LHQIXFMEnFo8Vu91w4jv3DrzCwr5Sur4FeufPw2ygYOrbiPxbcwBm5JfiQldlOcLpwMJ+ZgR+Yt +o8SZRIlx+qz8dRSyKyAFfTgvvMlS4iTdp+3OfnBBsLRMxYmR4AmzsHgpxZZuMexh16wZFc5aMX00 +trWVXeGfYmUvkekE3GEYggT+cMSr/LZ+mXlP3cxIrYUjKfMxgFvbxzQTbbhKpHsESpAgm3owe+VS +IGxDEn2tmbHaftC0OH02BREFfrIuHjVyxsbp9VS+17jVbcUU3nBqCBH8V4aw69t/86pNM08hZpgJ +bA4ggUW7fYhzcbd8dXEGG2xtWl9qigW93gqculWT9m8ip6TMCKraFu00K8nlBbiMy8Kds9s+fwZ5 +qfnmAxCZ0oDZsMwcTqIfA13BLGTn0MlFW/HKqGKFN8TbVORo43/Y56FTiXjnCyCfwf97hpnA0ypV +0daaT2tg1vKue/jvQXK2b5fQ3U3Up38nLyXPxQTZ4wBEib2HbVF65oZt8RR57ZzmEYvBUius39qu +gwxnILPVM71+Zpwxz1RdCsYz+SQVbMNMceg9h0EJmBjX/32etrcFfyF0WV2VsDq5VKJaIgn6tw96 +LtzTLGv+7ZVv56SSQmeYFjbGGJ+uXRYzxs/SSPM/ewYeJEmoa+jOnzaI85NNOcTDebMkFtoU7cwO +Z1y1UT7VYHVryOoxa37Ae+wb/ulgIH37QSHkEyc9iVLRmWGS8ofBlmMTgyotlmiURSbPbF62R1/G +wMebuDzLv6+Kk+DlOMN92mqSk7mGQFvJn3eFY0IPjiF07lwt8fF25jTF7jHNUs2rQGF0auKj6s4e +tO4vtGASCGrWN1j09m+LeGkMHFi1ErIzU/3buOPqLi8g/xBUNkZx5FLhD4vK4hLU53dHm7krPvAJ +JMOeLsHvb8au4AV/xi+kl1voDC9fMC3mRud5OjFAvxJmn+dfzrpf1l7CZff0tmIlbTf7DcwrDTdJ +IEwXhX5DZvD8+h+Dp/Jj7LSspycVdDtu0l+vb3Q4fiACLyyuJAXT/Pvu3aXFHLls4Y9hcKz90JKq +t3oz+3FVZLeYboKpyXJIaxqindB3fO0XqTHekRC9BKFxzxjjcILhSY9opdcgPZXrBajKEoHJE6km +jfw4ZyIboMh6t8tTMhUiSDn+UCLl4YL9SPR+BIp14oSBY6PSDcQb1/YLVP2BRqozc+xSs95zwxhw +wDOtpWaVXAjmKMdMAYokG/kUxm7m2MdMo0u1V1TngZG0RL59sheD70c4yDwRi42JddrJFAJaJUE6 ++BBGE8fn/8AKQgSxgiXLXhdCxqF1yghE9r5+weJv1H22yVFX9GNTy6QbHKu0c7khHMDCAFqWcHpb +ieeGewWd/BDwVPV41448zEjA7lm23U58ImjDpYEofUtZ38cHxjuuH3zB1yWXlr2JsvpyEt/DA8kg +yixWhQRtJP1TkNOTKimT/0lMCcn0QXVRQng9VhS+gdH8wYxrJS0GkvJ6+nAybQOu1Y9L8xwWyPuP +SNSiqfuBWW5dL99pxLEEsy9pIWKlXg5rsPg6/VuLYdNiq8D2VJgdklz5zp7tZycmgSJwrYDZ4TCT +yPRhkvOtgVqUdeArF2cZONWvojg27HJcQZ4qnK7sRDV125IeUJTgVT6kiMiz+kydwRf/bjHtGr2G +Hkz+5Nn+ADn3vkBhmgOajp49uteu4ESfnDAIIZQPPFRMw6TGt3T429mwl5RWwXiN0LGarq5bQ4Yt +0mGc9ZdKHUtBE44lgoCpH9ki85k5/UANQxG8ePYleqcYkvCnHdemswGWv04dzw3pXq+56xZeFaUS +Sk5fzjHJwKW88Yjjs5AoabdCLfvCxnSqBANvHNybtBqeTgztudr6JVXtZnXw2Tg4VNgvQBy9YR2t +SJbAWeh/3CzLMb+f036iNio3P8iXIbaTX8XdWwVaRnEHPrUiYE9600WsaUBCAIH5ZmGhkbT/i9/v +TQpnN8r5CxA4iXZFFH9lI0vI2sMwHnYjkg/MgF2GwT8CvrNcLKxavd0GdlvB7Te40AESAHn1AZ3J +HBejSMjSZL/BSg4WFL2EzjbHeYbuXRoV7Xw2RNNeC/oWckYYWlcmWc5q4FF0/p/r7NS+6uioJwj8 +mFqh67H7kJp2ZGeQK6qnw4myxqHXvVpcticN+9wDzLjkL4QGhcssQZnJMfATVh+enx1MVwwGIfwC +JBStAgHmmgJ10yw5bIILJ+SOAbRYkhzTyLFHPgpuaXY8wECrh/XkkNw5wg31gPzB5ZhmRvn9UiFa +OvSzDUBHcf9KI1eBRqXGOuWiY2Y61Kds629JCcSKbht3qU8OX6Vu2+Q70hC4mCsI6ngU6M2ApJ7X +b3bmONSRnJEPSzXCa0SCXD+lJqjCHWt7LRapFbZOWWz62DjNek0+7suHvVc8C0D/daFbS6qaGLJq +yoc5OPqE9d/DuMCoz9AzMAi2a5Sf2CT06hrNrkunOffoWcRIyw8bp42YfQ+JtPs9piMME5BuFkX+ +cq3d0HDb+7O+qeyNhe3R8gWGGx32wqiO5BUKhhpHVFCIxze6zOhspUGqvr+az7je0yxtVenA10hf +xt2glYJWjt2XG6h0GQofkPjiF7Sz8JJ4PGaFlszm2UEfBCAPSB58L6iNMAvZkgWIa6LFiUkqk0Rp +ryjl0bnUIv3/qd02yQtZVGklUsM9GuNcwRZKHt+djyWYv/cHvbh02Av/1FHcG61L1bv3chRmfPKh +txUh6fv1F+Ih5BjOFALyyHzGF+2uahtoWd+rPlu5ygbvnoE6I3O/rQ9pHo5Hsz17kwyk/EzWviks +akwcJb+Yh2Kexy77/4TEO/wFIbGXavI6uRjyMzKIhndR/el+WM+c7uF5qDlt0Z2sRoP73kOBFKJN +8aBcZE3Czh2vVgB1WQCmmG3MQmwyQS5FN04enWj9S+e5RBUUks3k6cepZTR5Z8lDAUm6cGcmlCzZ +pnB5MFuB2M0FjsJP9YQD04t1KGR7hL3WEF9d1sFr7NVtMhr80cEUbE7H5WZmesOyu0XDTH7SbqZj +RNi/KAlU/Hhg13V97aKyW3iHw2m4CUGgD9OJPSuQD3QRy5Pp9KgyvN3BwZiJuuMzIVEnjtZR8eCB +ac/QZ5Ooz/4rZEOvDd2atslXW2av6HihuqYWx+Hkii3cqXnrtpH2kmYUJ3wvFLalLmfvVlNkmzRO +O9jbkbjuyAmqlcu7+w793PeW64XsTnKfRuqTGYN9Lx4yOQrISKoDQP2a12JTx3f44goc3UTd/cAT +1jv8Kw3/6okFRzR7FlEhfULCzQ5WGszc166Uq8mbDkuqkSRYWB82/bt4pbr9ZO/gR6AIkQIsrgLi +7mXxlH9ZYXGTqDKbj5jGBVxU6XSjJfEbWIgKU4SjsIsiOP+LoD1NGU9NeaQKp6iEd+ENX6AvTo1Q +AkqJS7yCpWmHOH6D/mme9h9lkocRZSyEJp6D++w3PdRxHups9iGrGKsYXLWGmCu/2Yx/jcaK2UOf +LRX3D7UjM+3KPiW8mk9TcWBKAMI02XDDdPfk8p7p3GdNITSwbqQNBCmyeEv06vOqinUAqt9YsTvS +AU4nw2kbMQuMaxNBANlgpuqojbZODS0ylX3AQIiH/9YR7mExHFdYy0I3MWmqQTbpb1OiD+Qh48x4 +wi8c730BfEARdTzASRtu6zh6a7AG3fh5FAZFGH+k3CEXThMqAbDh4aWsNF6F94hA5jvB2kV6/8IH +f7khTWh0evW0XOG67bXzXS75opv5GYoUqD1XUonKD98uzOI48XWo72vReDcmVpnD4fntSOpSDi/z +f4+QUlx7uOmDlgMd8FPYZ0NNjNR2ce0deOGAsxV/1Fu7uIfYoM20624E7esqGMyE7S97OoOuZiab +HeWriLqTK+NGfR6MDWMI6rgtY/4UUjQ9TcyGEDPhxIguAp+WaefOLTzq16BDDN1qkAX8Jfm9msA4 +l+tEdLbOzGh8QB8LNBuIdcNtqMHelG95KuszTqgH0FkovJ7bfmGWhPFazyirqloVstkF34h/tzUy +3egyNjseHSOuYmiSmhVFJY+77OSu9WkZTj5CZM88cQwZJVQnfLf7ACtWPVrt6wx1dggoSqOFNev/ +hBPNLVEHo6NJknpOxO0Po1S2q2ikR6R0GxkuzW90fnPglEXAYEGsaM4dPU+DO3nRRPMG3CwWtCn8 +fiR7ONwi2l+eikRLCnYpDBhWFcP1YRwgnHicp12V1txmrZtG/FeOgX/0JC36N69gtdI6PusLaobT +CQUail6aWGcadU8PWYAl3OLcZzYvq0zIEcA22SnuCFoIyyosA1GLJJxf9Wx7I7YGRf7GpjOzJDvs +MRZzoFOncqpWEKNUp/09rRkgusiC3q4gmHXvYslxUerWja+pD7hadmHbqPC8NGkfkERcJdk7KwZu +KzlRJMUkXMGud935DIBg41y4dNHZCaT01TmOQzqZKEHQs2+ryAjl6w90Jkggh9tertDnAtqEbQq0 +KBGkjEwm4Dr+KrObWHjOJoi9KQdbvtnVP10tfniv30ewMH4Sk0nNS9GeeXS1uwRJNJ4RII7l1/Ux +9tyQ9gW9gzPO3JGm+1tUTw7p/98kqxS6j3F1AWvWimPMxUz1VCz1FfYGJCQlzw7CCitro5uWtKcl +VTjrBmYkPqtxfwJmYFASUQDv4S6vMZSrot0Fp1jeqGozBlbZTzIZIsNrShU4yj/EKKZGyVdJNOjV +j1WdPWURCO80SH4/TtfCCmntc97JZRfnRUeLO378bNrafS7Uz9ylenVrU1O17hpwUriGfcFYPjko +QH7J8xtuR9aB17GJcH9NmT2WYzQds97vCaj9Plu6Rkk1UatrkoBbkoijWhFNFDSsDjvZhG+WQg1Z +/HVVkK20CrE//b0cH2uERsW13SV7q85qaMUO6uEv09uzH4oNsRE9qFWhjHr7vNDTnW1CMhXGdz0N +A6yOHEwA0o49+yrMzfx7WpFvAu0u1OD05HAKzgI5bomBCf5NwDBZeTM+eIY6tMsbLM8pxmLMpgb/ +kpaPRi6kYpW/2D9Pdiplp3MKwe34kedR2XGReLSb+FgZWJsxZtggrangPgve4t8IXFXNCIqaBQRN +18HtE7E1keLCK2zLtNzrJuaHBtamG4JvWIDBXPjtHrQliDkdek8y14zXgbXv8Cp9qfioItqpOKTq ++tti4YVLd8HXD4lX/e/yCCNiQUP9AMyhOpnuVz4tTiWqs5X+xsJZeSL/2wQiWuST8wkWuVhqtuVz +gzGEHVshiKYpRNQcS/cnavFmAz5XEWi8AFft230g2Edq4AalSiyAz8OZiknGKzEXT/ZYhRh66Vek +kMZb4e8Z16o7GsBWpkyMUyCKY/ubrGB5Kqc+tAWDmnAk/eE619jGVwL10u0GdL6dljRQHYVBkR81 +Aje5RRoqPj508X63RUSnqGJX1WjS23fLHm1Fm+6E0sj1FTE8bdOJ4x+lHee7d4ym90rWMupc+kqo +0IOxeaYPtrpGqc8ynaumDbuwJ025eK2S72KtX/fA/Tlo11pgMxJpPhbZCZiJNaZ8vXK0WWPGfsbg +QCCMTkqnjNaMC5ZSFaIJlY/ClqYCKjnaRdbZHc69I7XZd6wM8vQ6QRxdGp6G0FDfuzMbKdnCjg2m +AXqNM5nFveQG7yA/+qqWa9iAL+7ZplSo1marDWinXbwLt3YyG5AKX0PdbHGoj2rJriRZUJzYcT9L +w6Hi4C850duz8lt1LTSRCE13N8c7ZTnOQYzYnveATfh+MBx50Ss8D1/b/4Ve3gBB7VJMYD9lZHZ8 +cgBA+JWT5uF7ERI83FRTvSvJBk1tb/N3iaxOHimTwAtXt7yHQyS2MP+5dBLWj10upRJbE9FKf3s2 +zdHDF2q6Ys2toqoqNuXXB1OGAiX5y+Uv38G6sR8C+6QboNjx2v+UDkshI4HV0Km5EX5lPCwSTobT +P4BOh62x0imilNzVR+PoyRF3swVVbKAqUYjgtLB1O9r3NDIxkg8eoPG3Anu0Ahs2nsFAUrbFk+pk +YUtz9CCwyOMZoC0hldfcZJs0/ktWeBnUuJAeRZVC43/if0EN2jjdWbwzHn7ZvdqBIO1ieaMr3E0q +ZJZI804YE5P7Y6oS1JOuQuvkAVM/EtavUGoJoMGChlLobvWpnaGkKiRJsXi/YLS25O7bNgUsvoT5 +U3iVFWDANNDp+7Xd7m3i2SVKLtNDJU2uy/786wdp1aKXonZjCbTooYrKZmKQ6B3pmVv9tCmfL6kc +RNkKmLT3VZlH6sQuItExoxI6hGK+zgRpIoZuU+amqLmCZW2mi9Wu/f0nNXWRzp83t1fiN1s9zCtD +nxhauBmeWB4mL1ut3KKWKXDYn1+4r4ukxrKCtqymSL0weQfnQqchu+6xVV1XwJ9SSkg28uM+sqkx +WpEMi327UhbcqPtzc9FZxsABkOr+VRm+0VvpsSvSvlvED2U+riNwO8MZiUcxTlZCdbu9KkWQS4pO +ph3y9zpBKl1efE5IgGZ9YN6XNOaaxxVjY2OSYIUd83fAhTsfv9hjo7vRejLPJNTt9ijYNi9sdK7X +iDEYEoXPh96iWZAX1nlncC5MgZUGAI4lTVVq6U58HzVtJNzoXnQOQ+CkDeEaYRPhpJ2oEVvOD0r7 +u6zCLtLikj09tcFplyOyGj20kyIFzJn8mDtiisa1WHL6/kwc6BkdhmR/CCiOP68um+bwwMYKIf+M +5miHRvMDdNNR9Jw/w/vhjxA4aOZxrvqgjsqlFw9Fw8e+PXRVh60LJ75ANdU8AbqtaGhyKSnhl/WO +ESEtZ6S5vHUybkGjLCnG3QCWGd2SD6CRMVdzOx0aiwL4ECYOJQlt4jIEG2hDHV51tP3bEFVelmKA +Xt3i+PkANyUlPoLnPGSiGSeF3pDBWx+VNWlwymph1s52PLPYTrjCnrih/dQyo1Tl+1DAHhuOXGVN +j+TPgDVxfkpvTZRkHq21j5smzU5uhzH+7jfjlkpYONgqOGYsSCPH8Vs+XbS0TdVJ8xwzc+wvSm6S +cVVReNRBSkQmStFno0bzM/v4UopDBFS10e30IOJIkp23bhVKtkfbit4QjfAShFq0Kfbf6TVlJ8vX +TuMr4z3l5vuXUxuYZua72W3Iq+ampitxXLABtjPp2yloqrcifGhV6uyHkoKcHmxqWAhoMp2gNPH1 +lraa2Ni+wsSpQksz6wP8fYbvjalYaI8c680QpmBc1oC1XA9ktCAfOUFqpPtufMf9hSIffMzKf8FQ +DG3l116veoe3ob+fsS0PEwqPsGlGsnYxozFPDqCUPzZ+nvA4/h3r2Lnpmmdx9PpGxREMBpNSWiy0 +yCDoMnATmP8JvUxDnEkG9nn+oe2viwLiTFMUKVWwpMyVVtXz38O1hUaKiKCESKVyO7Dplv3AA9Nc +3aJCcpYwCiROWNP+x+PlRvCtFEvkAZ/1y5fjX3MPS1wQbU4UbKWXkxcgIscT4Hrw1BVvXH4jKVmZ +X52jxnVTgRGHVwgaKTSqdcwLeULm1LavTw4eM2lgDCGAJ3At/6W3ICFCtG9gNPXTrBMbAusg55cz +0pxCe9J4xcN3Zqu1eKObxf0DKXiFgAY21Uvnp7fpStlnJipdspGkbKnx9n27S+ZfZbjSdlz7l3BV +45c7hUfLqTtbctRu9vB4UMgDpBn854u33nicy85Dd4ZWHp+dk3ctOeYGLDcCfRL7ftAOANiN5Svx +QXoJZ5uEIZ04tjz4jKvfbdo4LKDBoovVDtAHKcscxaezADSj3TcHXcjno2+I1rQISOALpigOXMP1 +t+p1byXMHRVpS64eDIuqtl/3ln7uuox5xkZURoy33a7pOGoQ7t8+jlFQYQr3JE9lNZsFq2UuucCK +nIeKxUmjw7fyCaXyY6WYCjh0BtRR2O85Fx07n2CAI5VI0kPZKFO7579jc7cirYYGzNxuV3BYmmtf +u0/XXNBXNjKkP9szx6RyuQgRyZlZ2x8y6SCyJ5ZJ07vP0Y4oPRP6DKZie5SgUMAAxpw7bqT2Cu8G ++JqHfbUtI1Jsz2FUJaV0tPBoaPLAJLUMnHHuHmIVJAeEnVf/RoKqu0L/6dmsQmPDEIOYJy4YNJOz +9d4M8X4rexeLzsrb63kg4vVkpZqjASEzKOhdwlvzSR9qSY6EU2JuXgskYsuPHUFPg6VEdxTg6TmF +/akW0nS9KXjueANgJ0UES6Bl1Tl4Dav1VtAc2244fQSS3KnCXMPiYLWt4APCJ+xjSGKnhZMoM/HW +HHY6/fYZbPGyfOABTya/EqTBEq0VtHoFlNuAHPj5mM4Vh9Ctnn5H4A3j8oHWITdBHbVuISyAaAg2 +nugU4dCUA+7+0Nl2dyLNauV+019HlBlip58o7Pf6O8VC0lUqUMaNnpEcl9vUThCmVQbciHciSQfg +VsZHaCwc0TjnwAywuXjFobuxowjNi9DTdcrdN1/nsJgaVMsnpU9qJvTjHCi7g0PKPNg9uMOFmq9e +5hRtRcX95cekIV8oR71aUaXUvTnRSSj5mbhBg81sg6Yt1yPg/dVLVfZ9A6nxFzw3fH74QtVcbyuV +WawqajrSm50xXm+0E1jSXHDn8rbwCTFgbSzKka2Dss1ZmY5/H+10OvzcxwwHr9f1ocp1vino6e0c +hq6n4mNYFswh755nFvBh8h8AJJrnk3CoUQ//tfDyUlo1uzO6ycnwt4wDJB2pYdNsYDQr86yYus/d +ReWRTzO4QweIKM0NnnGNautVXYdaz2IkdOwiJI2IlmtDtniuYU73k1mbpK4iMK6M5eFJbCRp2Otk +AOuKlOQjNgBB35QfG/HeOUVpBkEarkyFuQP0+CnxvoA1fJ0DvvPdXI0DRdbVaQhHrzOZvQn/A92E +/1eqTP5jJKAuSaOAUuPamY5wgaby0hMqVJPVwp0UyhexBJTWCc9W1XZn5cIEtRuJXTkKou3/OCR6 +BqpgBbtUDIyO8XKE7JWPXVWNCBEigEiHJaCYmNdqzMnf62m40HCJfVHHSfNYoohGAapA6XifD8PB +95qrR0SwZHmKzG4Y7q9CLveDp6aWbjDpaemKd/G6M4fVWerWoA+ze92gsLAr7fsiRleLf3f9G6fg +9EkM8pxee+4SuoxqqRteZcRT0iSSklVyXN9ASN2jC9tMhuDMwci7z51Qw+hXky3gr3LrVmvxmEH8 +LYRGGCyyBem7aIAF+1wabILlnLv000n1bdNBFWqkTwus3QK+tqz3rGxUGDXkSPlbUiHzXIs8B2sz +eMpZNr/OjGFlMTlbj9py/WoTvQUYUECxidlgsV7GBiF/xdIxWFz7s81JX1ybnivayxyYqyaE4j5W +NZdS8/TynyP68vUe8Q0RGB1aV5zCfytdQuseqQEYAV5jhVP0aHPqWR3rE5YfqrVTUGE/p/TSHJ+z +6qTXu4/nbESmxHmiHME2c4u+GFtVwrHNPDxXCq7l/L4caoCMNH5FnKbI3Me5+99/9MPyDCOfdgWW +UXyyiZXrjhh0UlQ/kFqQYN+u71+AKH37LcQ6Ie9pDBF32ckwi5reY72KgvgYHGXJzt/Jl36O2vpQ +fJoW5pJ4XfrIOjSPVEU5VK4K98fOGMCGLrRcNJiLUTWUOITXcuKTpI2kxp8+0beQ+M0uUpW5oWao +uGF8w5nBJf2uaWn629zE12E/PGX+eOO3qA4CWTYTttVbuse1bU4VMlNRZClu8ALUbHfSZYD6c7Ro +nP7OZG7c/AYGrcASeR70gs1AjsiP8ly7Ch5DvOWPXS/2w88c2/mlvWrEa7skl2kloG6UTIMdbOyI +eB3TlsBK2ozuNXDuLcKsHJxyM7h5Bsn1R8ssCyPPzc2SVninQaqDeoZXMd1jvvU/VHyVdC1nzFNg +mf5Cz9FaQQdZjrXSUNm1VE33Y/2xo21MZHfOmsAxXWzGcvgubyUII8+5LNvDzUkkNXbHRMv5piWE +BtP3yEjNFulIo2DUqfi9+5AJpeKOaM/mEFDXGdyhjlWuirwYrb+VlGjfZNuI/6qkznPKHyHzSkaA +rEiGFIRSvltGpluREBkh9JaNzc0gwlAitx39/azlx1UqFS3j4lXWhxnZI3Ak3jkrlYUSs/a1OFCE +2KIa4AWYpXevm5yZ8nLQL3qkVNqNX1p9iHIoymGOOAgeKJKun1Iv88Wo5ThGlGnHUQh4U+Bc2b7Z +zAGuQlPPqPWgmrjzSeixGxZjju7hwC/n0JiUFOF0frDTaao/hFIfxo25i+XvJHo8UYLSnn0TxNW/ +3EIvtutq6LWzDXImRUwacz1c6YKtLEB25jQDQ0uVh6l3uaIjyD7nmjLJMbIo/oDmHace6LqAgoTI +jaVsX6s9a0/LQpFdwLCvhtkFkcQs2GeFgHzl1lJT+9LWPsYXOakEgyggW0D4pC19X6+VnpZjzCNN +NUoeamHrRa3q6fsB5beFKJNE8TMsjuUCF6+dyDoeQYz6Y+vdcD8XCHAk/sB/9IzZM7iCZbOUcZot +aSRY2Y1hoM8CXQNGG/ei+MO93HSXUThXb1uv1fBjSGx7Cw508xxtQ37F7EK4ENH4deApP9uIP6Na +t6Q4smMkCq0kuztXysc67yQrc9vxX7WMjmDtZIANiODV2jHvkBUKBxYGiYyi5FiR1kOHvelJgR7S +hR73Qdf7ApQG+Lpi5RwAsvwbUjbsEAqdrBonkP5qEfzUcBYAnHM+CihtNIQFAcPWhVfXJoHK+DIR +aw43/EEnPcHWt04Hr3P+ND65AUrnTcpWAe/ftV2jy+X9v7QFonx01Nz7Dz5QE7yobRboNRrHLTkK +WW80TnYDiMPaYTL9MnTHDmj0ocMsEGy5rkZ9eECxI9RqnFYR50CP4ml4pcVD6PXpBtzL2vWSN5n8 +3c6BRPj/M+TpzHVEcePkk6lfE311ta2fx1/f1tfWPawlA3ZFdhoYbREjVNo11KZwuCU+yauVZreA +BlK4m7KZkmvFuPugNnoC0AvUZBVPEgtdrMfz4RnAQtGlhsWkC3xtZM3E30Yquj7+gC2YXIy3PT+4 +pDZtbVp6PUD5pW3JKtd9x25EGw3YlDDQOxKABVtx2in48er19T+/qZINLbQ+qEx4urHxnxrTsw+M +a4vLs+v/5A8EMyozhbkFvHj0LIcPWptxcvsIyTKrH3gZCIRG8tflty/qC8lIW1j/iuLi5/7YDN0u +uccp9Kjzu1a2R95TZZwSiBcRFXpMAGWNehzR5nOdKePEY7PYah0hacW3mRODFzSPE2GksUgq9LRG +qr5Fb0O4EQzaYYfgxOP9r452i6BVLa/6iWng40uV0Cy0u5bdkAXkW8DkY7ADBi7kWxMdZUdeWqOd +888gni/nnXOe6bvEGBuEHP4fnAF0GrQLJpaLJ+SUBF1IdoRSH+iLenerklW9j+PpkBjjOStxk0bi +F0igvL2Y8RhDi+u8OeDaKhyx3gWYn3QOx0rcNmaQL77Doe6+nWelZOHEF7yQljpeZQ5VcC9R0F0x +aMtqTRpWc5BXuNae8BAQa2YZRWg9YkhND8lH8nvPYopeyikJBIY1Cr5y5CjtiuEOKuyOU3o+z54w +TfK0LVNkjzBImJejcMecw7zEu/ILebqKkDq/dAdvsBYXyXtZfVnRTA36qgpn+ud4rVhZDHe3Q5GK +HlpyWhwzvsGO+Wk15L5cJ2nMFpDYvZGebfeDPkGL+Wii6nIneJPRFbaGMpYsjrA3yuyl6TkjmKBZ +I5fgr9Y3cORNcUJ969cPU9rjYGqm73b2sU4+xzunGp2q65uyn0NhhJcHazJjsmkWGB4xeGjF57sk +55ljJTzX6ITkY919ia4PGMx0+FcX2M8BsUInxDA2K5kd0AOgL8/ukjkucAAIo3Tno92v4ablWG8d +WiZNkZiKFviCukhH+RoDkDR54thy3a6aBRbetoc9VUuoqa9tw3WfW8coTpYx+st58bwoptBqkXUr +odL6NEO342aZztrwzu5puBqDU34FSj2racWfjnaNGQdDdMzVdbVQ+kngLyadfZM/6cNLA/Y/Iwsl +9GJz2ZmT1m4dd8xx8WEYncQsVVx7gMBMk24BasbHmBJxsaDcBbi4F9b04jiw2KM1QrJbKu0wVW+0 +Yo6JOU2XkP0DLhNNovcM1YLBdEXXdI/TTOT/UfFFz3WgcwWx2BAob6CuxPLIJtECFvtrEbmM8/Jf +uxCLmMujce2wiQ2CCTd6q4t1P/x/W9/ecizXuiVRDukL/dFr+pOp4gl4yBofkirVe+M5xpKcTuB9 +darGMHFx10iBV5UjgN21CuuNhBYYdbSyS56Mo9jpgIDkyrrqGaGMLrbUebpv7SRs58xQ+7OWtvtd +KRjzyREA+xSK1ZpmO5gytAUo9J/zvwc3EK6VxmcNHT+L2mpGUonOgm2WogcTx5cxtWRsYkS5bd5W +ifjXmPlRUkEYyBhOEFzfU7YVIBY15YP8+nQ0N7lAa81cNGK5hTaVOsqgC+juBnRI80sba4099j2N +hT5hYiDXKN3GhkFaD17OIxwxLOr3ChK/+Zul1F2sv8OacuMwD4SmEDyNnBxmBAc62/HiKxgewXrX +dNFWs8vgNwZsK7UyPvg8ujWGGKim/WThVPF90TFi/ipmPnXLFY/mb2U5CuvannrRZpZr2Cy6lob6 +zXf9UlqpxGBcPTom0bEmXlgwJ4jF3Jsk/wWYFeYHIaK+/GvxiqEk0jh9vI9cW5PLDWKAZ9hOqYU8 +NsXn0B+Et/P6aHbxSoT1W+EeHFkECgPiqindSsTcDcU0lxcr6ZZtGLL7Zcu2u3fwpkQ38a6+OmSt +5pBe9EjHCNJdDs/6b/33Ug2dlrd4ccWJ5Dh7pbUe76rTnMlRAIcWU5kNw3R077v/hpQoPNwmS2Qh +yjdvbt2fBN0X/3O5tNykdrngWQWKQWfxBc5vQHniYZyedIxOceBZTR6xKeJINGBk3obncXv1bk0Z +1+0lJSEQSY5JrxJ7O6H8Sl8Au2U8j7VOCsme2D1aeQ5n2IW1/pCPhqM3/QJKg/Fo+sJkE6Rk24Zf +8cmkiC4o0Q5lB/rJyl280OiUP0F1qdnIZci+JcZU/E+6LT99ZjJkzPgAqScpV9rJbD+7gR02Ds1L +4MEqswHNuts38FNQDtTkcMAvatW/ZdHxbbY1tBNcuuBN4LOn4OG6A9Zc4VzYKNQT7lfg6OGga02g +A2vGSyr/ae3y0QnBMbIot6jQn1IMCzIySB2vDCr3LuZKSp1G3zORCCojkDcJgOtjTGZucG48BqA5 +4N+QM8fFZjNQvUQUlYSaR4OG/bCxP0gbua+p4Lz/kw1ZyESK0fZ1lpLAmpxuVlbaIW0wRkYSkMV6 +L8CKQtuMYILM0gHH+w6XgEhKUpetzR87W8GP2o8+fFmnWIihAO9FD060hum5iQgyq36Q+zClfFDK +wubSevy2YVhQ2VcGJ+TZVWp4P3JcX3sOAAaH8qgM/0MDa7SZQk2ug6PXW36CAimtMXD01FFegpwH +1U4Bblw/DlKuLZqt27wA7ROQlrPMiMpHza9QxlQNpZ//DUwid/YaZOzxrpy6CqKdjboOnEBv5u7S +VCMwNhMMOB2RHRLVH5wPo+dS21/4FvLzLDdct9o4nWPR6i5hy0z1WVcDjLe8duv2Qjs30T2vByqM +7I0bvTPIdpbcU/A3OtietYIoScgaO817yZC1SD74+5ODVG7gHreaBP6dQD9DbmbSjVa2Jiprl38q +Us4WJl8ukm83BoHbuRTS9bWzyLgNSo98WiLjHACeHHNtsMBsyg6U0jaPVs6B1S+qgF/taGbYZ7R/ +MjkTRL/J0lDSDhSZipqWZbHSoCG7izZOT+tW74BjIV3TCUHhRexBEhQTPrw8WHujqyI5FtNIwOTA +CA31t5n0g3tIYNNOacsfClMOwnEpzN+Y9Jwox7TKyeHPZfyA9OpWDwDDC3dpVCex/uHTGOJNh0Wk +06kRvBH9tliCG48w6b/y3ip2R3lE3eDVWrt4kJJnXgV7/l1PDYozWDhbSK4PS1Ua5+t0NukBLQNi +ObqahiuEVjCxS9ZUZAXpd2PS/PNSRcg50toCb4AVtuiVO58BpeZNxvCYKsXdX754iwWiwDzYKLpY +wWITovhB5YjObKu77cJiUISO3uJf52Gie3A816w/epdixNeTTdQAUIAF7nUqqJUmMy0592XND3YX +mWCAfPCDikyHXQhua/RUV3VVW/65Im9JzdEsd3ltRcDs29oQEdNvH4RiybABfOD/22wkB2D1BESz +YWCQn96f7DjLoJeiYcRDHdKOLjDfyr9PWJX1yk4eiBAfyHhgnHwcbkt7C3eoUJ5l3z83xqA9dKty +BXjnxCFI6FAjYyWfvtpA5lrGZYXHoxs0xnvqGyoa1hvQxeJiplP085GA9mm8a0e13HLFf5HEqnyt +B6hHDHZoGDDT0WDETsAXlSKvUI16e1JcumE0+R2yzJpvgperzee6gXu04itkibKuJfw8PrLLjnPy +zUwOk4JZ3WcnqiOH+23XfNQ+9O4nLFwYbIYD+0KHtolJzwYCwGWoyNKo0EwT9JXZXlo4oXbUJnV+ +jELIHjIHj1xl4cwePOV/BnEs4NEAYS+AuaRxsBwP2+iZWzI0+pSxsiA98ULNvoJHyvE57TP+Pqnj +vm9L50xnWnAGwNMbCqpeTv4ZYSJaLWw3WRa2xWsbemw4nHSusCBbblSkSNZs/kznkPotibp3Oddv +5kUFZcBHvHrW63yd0Remx/ahOH6b0ajQYqdswUn20muP4oxZvPAJQUtM+WUqvwo2/jMozhvGkFXS +2RYTxIim5ROYOUmh1iHshTlIat34R1yfXowYuZCmS5yUekrDPRyquj9z7XnvUduEHKl7mYthmQ8k +S2Bkb8F++Mi+kmeLs7ZmHIIJStk+/3R3/UnFOTo2btF6sPsiO9Du/m1673oD+VlhJQuD4Mv9GGKq +IbrQXJ1NqEgWxxAoSGzndxedpcCX8exELYMOYbUMACPDq9b719w/08bQRIyGOB7SPlcW7BspR7cz +1bHV0jsFJnu5/vv/s0iwwxxCW09J49f7YH/V/LgFcr9mKMn5Jzfd2+OOQlSGWhOk8SXc+pJ2YTwK +bTOd9gP5N7DTiFm5+4x5kqJDt3RF9333A4NoLFO6JabodtVkr3JjMbXkUpx5oEeptYcWCNBUguWq +tL6k51vqV3EQpKMMCngFSwQC1d5LRADVcjf+crptu0/E8IXGuLJh8FS++D95UOhUNJvc1dLsPwkj +rzTa/zZsDGKqMZwGb21JlCUSE7KP0jFnwGkmbndK4uw16Hch+ltiH9ARdq/1VPvQ0tOAQsLvij0j +YJNqg2q+A2NAKKW4WrGPzlmBgjdAsx9WjJ7d4AqueghypR8Rc4fIHbbejnFh7zbNi/pWNBYR2yCm +WLvgORbyUG+yCS/C1QJu/O3PUioiqD2cF9IXa+j5gIXwseyIzJn6KqIWxm5Dj4OsaFFb+IuGAjxE +s6OzWDLyfapb3/ntgzDSvEyqmOKw5emS17lzvOwx2CqrXeWzfDllXiegOfzEPIQkl9HdLInthsIn +ERB+lX7BHf+fFW2fi4weB+LBwWWWBQMkh75yLbnxlit0EUwjTs/r5nq5UtsTs8DmYDb1s9UuIiPp +jX36PCwIk6Y/P1bhe55W5YymhYOkDEossFF9oZaakYLdmdqwNZFwVHsRVBBPVXqWD6499OS3yR84 +deDEwI6tqtVXEPBdPJkAnOSdGaW8UC3rSQXXmqfrws/q6Gb7CJLymaqFSiv73ly+Tf+ZjG3Enzlc +an9erkNJ0T1JPTHQ9Ai6JdhEf6+U7jmRPZFPU9C0tm3XOpFeNWzzLOIyyyh3/DF9xjTWD7ssxmYA +hTXjs0jjcuEYfMOHM5n9E9ezDskafG4vYdb4gaJjOeKgyLOd0NmRaL52BOCCjejCJ+6ecBuPK+O/ +4UPoRbiUHH3zCM7EVxg+LuzqJf4aGBJa/MupDPQPC6P7GgI7yvtuYhSx/i3CJbq9v/EbH4WVJraS +fplqIoDeoB9J1vhgsM0pyWBL2S5PBmo2NY42JJr0vU+kVY+mUjcu6z4hhTS+bYs97/04AjIH3jBu +t/f4KHitiWgRjIopg6nQ+aK/1EnWm2+F4/rKLyqlxgJLowF7081J3tzVWy+QPkWdMdJx2707QNM7 +HvCJlE3hkquzuaLD6Yb3oIiYymSSK6EPhV11PvR6RLC0F9271gcGiqRknGHRlkgqLAnGWy5M/EY0 +mpQxKkZ792tDXaiJbTeSS0ek04WACuzXPPM0XlviX9Tsz/gYW+xC6jGvu5W3RwtfkjosPRjoJftz +OU/oDEazDovLTvMzjXpAFeoDiWtCmA9hRvHma8YxZPgHO/WJuoLYiTQrICfHWl4XhDoYkIQkBPdF +5X5EMcxtMba+K/NDe2U8O/9yjApV2OJMfehZIzNxP5GJmL2z/yiukzQSKEfNePvOadXH7oTt2IY2 +NZIHDQ37xDXlPw2CxGSQyKiqdh2Zr1inAxFOxvSbXrOJtBXkvAjnhxMe3tT0MgkurlBR2ffiaOFL +wLVy8HYWEuBFkQjVo2RuAdoN8LDI51uQ0eEoR6BfjtlS0P+HsQVMIOQaeSADxXB1gZR/embYXwco +WT+uaGYlEIQSV+AJRkAQwnbbBV52PpWmpGB2sX7vIWFc/G5EPirbMpPz60ETWAXn8fcrW1A2GXrY +EHEt/XwTn4lGPsxH3MjXw3p6s3Q3dG1kTYD4DATw+1hxCT990Ma5f/3q46OT8lmdaB8tR7KAEWiK +uv3CwCzUwh0Aquw5RuT13p2uPJ86wtQWIU5okAUiEIkXc358bBE68a357XqCiQ4szsLc4EC0fNtd +IAl5IG8lViurvdQUMfIaPpMVSIkzDEiNSWx0789/9sA9IV0wTf1p7z2t8XurdwWx2rgX2bvroZyx +VFilzRIGyKhMM0hF1vRpM1SK96QKkMa/PCYkYzSRV64hRXPu05M/+y8LSLuotbyhnIeIDAfeSbg0 +UdAZSFJvhWJEoBQrg8R4Tmy7SyUkWCtWsHMpw9eY8SoyctYnbySqT90OuBCEbZiDeM9BRhJ6CPka +JB6fIAW+J9VoKrIlBoxU67rwqcXEkTQKsrxWXbJFn+oUegpwaXspl7VVuP1kyaeI7AbSYy5wpmD0 +PFLwrvPik6/6pwO7I30wy40vZHOHrfIUKg8/RSGnG/3Ed0RSicsOfuckpE5rLNkruhubp51xmSFa +lUE8/GqMRE+n84IBjGPEXieTxBWWOcxSAzz434J9qOlWlL6tnCvqqAcKzZ4aHD/XfpeD1rqYcoE9 +6pKvgCEDRyaNxuiWKeU0OFn9pU6qg9Avdy7HIQJ/bTJ56Ihf0Ayt/dhzO+eNKL07gt7m9MRAtBkb +ND2aRlc5RRd2WFhmYy/OdzFJ+g103+yDaYy0430DlLnuCXuJ1m3Sp215D1Mho5hiREE8WslEG2lW +37R8lJBPQxkqONa14g6GdZb2aPT6S6U46TAeaJaKy1hSofS0fQnNqfcM6nJwXYC0kbS50MRJnKgE +gq3/psDVuKIq93OLoMWqV7of4sGGDzjTk46vMvjfd4kIJ4O7nAOXkPx1Q2o7F9yG8VDOvcbyIlJl +DIIqKH91O6X7XhxNzL0HtD6ArfMjdtw6k4ieZVbhWrYyt13347EcIj7pnHOC94gwRHbYFRUwczVt +8RN45hj6Urj57bveef0+1HtGoCa20X4B2emi8d/bZwI0q2p8vDb/CHmk5hoT2bhxbRKVIPlmHLuu +ddLR/NOyVUz7m+5BWp3vrlLZ0H/ByVw7JTSLH3tj9zFboSFooK6MDKGeQn0J+SYpROBdusRCQh+/ +iicF86Ahtu/Yudthtpd00ZAc2JdG/183Q/uD+YbebFEEgHhv5bSUlw+0RypMdscQSpKc+dyiHRqT +8/4wfO9pyXHmHGLuuLuvIn3UDK04Ra3qM2zapHDKXK0WBFZCm4jbfJLfWfnNbHpc4SNf4iSuY9Hd +h0vnWnvenZGftvklLDY+y4IXMsXSKqlxODWWMF1c/Kd7BNM8e+xaTIkXOmsxwEEAyxqTq2dfth62 +PFLPRshLJvI+65hciyho8jCAdFnLzEggz4OmzWGthGcUq5nEWBYlSc9jglPFqkRvHP49wM2dyYNH +KdQWGyNZFjQ9wj+TAeI+j/+8Nk3QThtUPetRXqob6CiieAZaZ/adwTujc8L77XNRhsx9oB2eUFYR +Oxdy5aq/f1IRaKbOZpCnoz17pXqNWF2t4z3C+LwJ2ElHy+G7NDt3BNH4xv8BZZ1Joe3ni01HvjrC +bKkZ9kTL+2P/DgK9wvZwGEEvGARMhEcOxa4EexEki9LRSqPN+x8WPKO0q39TFvYSYwl6381grCb6 +nhZROpr/i0FQd9eeilpxhIZzYurarrf8UfwJlogWKZDN70kEFoHGsCsgOH8vM9AFjx+MgY5qpOTj +ShuAN9prZCPKrDZb+ADryzms1DVNTj7nx8OHlMLPehwg7/Ja6mGrheBThfIyDeW/5JYd7muVdf68 +2kpQEm7y4vcxiUBhrJMdOYBqSFBZHK3DO5WFuyaZm8eKKboA9rz7qCewLujs9CMXwABdO6vlnH4W +RuBvSeIWDQlZVGexG9/ob+gC3VenH3BAZSCm97bJrWpGmBzlcskUt2ViRLQrQbfsg0MNyGTzPHN+ +9flQtTa6lYjcbN+9Y1B++YFX7zZnwKM4sFMTOd6aPHbYIiRpw0miGMhaMfSLskx9722VljRQELPu +QEpXMmt3lS1k2iwER86BbiVIwXqGuSsGUu8PkRi+fuPYap210fRn0jfjFFWhL05fYgZgetp3WxXW +JSvl3YLMGyzAGhUqD4Oj5erfBRY4AU5ez/H3cp46ih8lF49pSRqUgCGzRTkzceY6qcmDZh3udM7A +ktuszApIZ53wvWizJk0jkqKTrPOdMiajkJLY8V1kE6NUr/jhNKGyLryOO1ItPM3Gi73VHgUgzK+y +OUIHclFbxfghvKHlXlPwXEeKbQyRISF447BzYJ1YV0lIGhv0rBClwhJubIXo27SyHIY0KGtqr+B5 +f49DFV2sPIT0ATD0GLneK+WoFE40maRD7j3wY2wivZf2eI50QXlFo63wy2WiP5R5SZ4b5P4gd595 +/m8sdgAzCDRKwWpQwTN8o2PA4Zzl1fWp2Rw4DNRnkv0umoERrbRt7Bggiy8zI8fgPta+Qye7oOD3 +IGe2jxZmsMOWOKTmAwUgy5X36gPevKBs/befWBSC40AiqsP04EX4r9QJTBfLV2ugoy8m955boExr +DusAsri4g0aEgFFIG/M9QKLwNefZx4LXOnliyirKTbN4Q1sF85Dw/oB4lTMN35IlgcbiU92YnlCy +Y6USdLJuF44hea3aeY0MgIYy2xAOGFNX+WtCjZRyx/XLSsyPlDikDSUcGK9ctwx3+hce9e73US5D +zMs+MbmupDZxz6kMbIWIqcsp8JPTn+EqoTYmfAfDB3Hid0Hrrs2UMJfyffm2SiGRreIbQZrLdXC5 +InZT7Z086OR1CF3ihQuLW5/1Y23flLgrsZs+zpBEiHtCWvgZzR71pwsznF38Kmbbc+I4nYZmqZE3 +Q+W4X4ikaruSlLLzfS80DZwzOBnwxf5y+Xfuppb536goJgC2hyVb2QjRrbGJ644uxBZPnLgyIDb7 +IRI6djyWznLuSNGs7nPvx998e2BwnL4gxIcG22uEcKW32FYiCWPVYU877PP+ohJCJrU4GnDSN5YW +jg/4hBB5YqojkjcnFx5Cykw2DcRpQZTxUc0QdNLGwtgbfzy2glEUqyMnWfQHsHAVuoHLLgtGrJHf +9q5yOG93Odrcd15FQRnZGtT7XkqGlSwutPRjoZtaoRlapPSiYO54RDg63B6y59YtoWpOdIEV0jVY +PtFYOjWWng8G++xNnrF3Xmxoo15/DzJfaLx0o7Agi9L3qYRREdd4vl2kALCxYiEYbmUl4+rF32gq +iNFHmncJ7ItUYHfrjc6As805sQXlxA7jeJnjw29oMfKOcL7/qctmCV+YiSl0hvsTzGYmPclGiLLu +WAoW8OHr32I49jjPD7R2PLTvlTbSt0U1e5UlCnC79+KLMypHj0Gpb/wrSs3OpjRkkMl+xSA/+DMp +zPbBLVm3FWA4uTaCR2y1AR5E8ZGhKmqhtfvAEtS2j+oLd9mAort4n7fj++351sP+f9mzyIi9mya5 +FEpCgr/tOloSy5+uiF/Cf2iStBjOY1N3mLZvo4TZypoog3wdtPsC1j7gRzLeJ6ab/0FDZd6I6Agy +776p4bvB8A2AzE/LzWJihxJcm8XHjOSsM5z3/0U0S7tatx6CuYWyGdKht3A01Lg22mZXu0CR9rNW +u1LymFPQZSaHPR70HjZO5y6lmF+ZwyPzvh4WEISLspRtkZB4Ri0EJXdenfUIhhY3GHUdRPbGHjHg +u5UWyZrBh2mdemvPvYkFoVwauhzcWTAmwsViMnE7kMzFyizy+jUEt/GG74++zKb+af8r1MOmwXYe +T8y5SoAh/g6YrKuhOL9Dkgl3V/0sEi40eGNqo0VANYhw39NBY1gwIvHZxqBE77NYrHWjkTOTrBX3 +YzK8UZSiKwwKxf42Kh3bkaQF0N1JudbocHFCnJ53fW4vA8SqxPqZ0MMc3x9OiGj/R8dHtI7xyCUM +uFLS+ixhFJDZ1bA3KC3G6huOSmMdXi8Cc1QCuPeGydetoRi32VeyPqLWoaTO0dHmSJ2CVKzD9lDQ +8MIcMkG3jKxQMjhDnLpsiEV/+fVhKDMO8d0+bnhkz8GKS6CiyetWoUilCKovxNGtb6dIfIIbbDew +hB+n1aF0FqHna7SX3aBqkB7R8PeiNZ/LRChE1vS13LAOX2bXvgrqUP//nPdgHeO1En4pKPJYrbtq +swIbMn88pbXSH50Gqc00vr66sSdIotRhSXbl6FhChZtKw4TRcdyLwof16akI1Nmw/mt3gjKZc+MH +wVEaAuHvUJ/HHMJD7xdwgI9r2RDEIYlHCG8yF9nnQY/yKVlwyLYaA1owB0RX2jVtkTWFwBNu3mli +Go41CE+hRQCI2hiUvtpnvjrAzsmKCsMtVkJsa9KQLDdSdQywCRcdVZuV9W4sJMesOYn5L8ka3qan +g2o4vL3sMJZYvR1iVNuvmEQl7OqCBvKjXbyDGVkvid24uOBDxjzMxRd8b52O3iVWM31IcHrLO+qq +StIvHrUwD9Y33vl4d/NH6fjryD9eSKyFA+hpC6wzLA4jsHI179fItkGHDE+L+1iNW1aOoe5+m4NR +mhrIJY+SLIRTVzxXgPUwarIuZ11rIuCc0PSJewHf7ChHnQ+qKlF/VUuv0rcKwMox4U9d6zaikBtg +Pv6GQ3PldPFa061lELxVWW7mNLd1PccbC07xf4m2RSkx/mN7E43P88wtL16Re0kAoSUkw2PadE05 +jkBx03vtVzpmJEIwkZAAFTnY98uztLeBUJA7PxcqtlyBrWqWzsOsIrgXQu4fSuOA7zogCGTGgzGl +g01cXUlSJ9rlVsi++StKIouqcMel7miUYA+XrOWdnsA1lZv/kHQ+5BfTJin3igfSLZq2qs0zY9Wl +jGzv9TcJsMw1uf3BzxnyRpNKEPww8NQOpfuenC1j8ejhWil5zfBIjnzG4u5gYWo7CpvRy0iHiuHQ +fx+LJoIh+VDExPx5spmDO7fHrESNepEXzEOY/7/TRIzxeJtlonAed7baF14KTngpvdSTcGLs6OcJ +vgCyvVjxNYtQkkK8FzfiktF6ZOVCTxkoVTJKmJN0BOvZo40Opsftf3OCs08xoJc2I89i4+IjDDgk +w59Spi1cMGEFczwOPBFu60TFDo2mMCb1HNI+soGHM7kvVmdHh+PL+s1ShBatTmTPnp9lfQHbNo3n +c47fZY5O/emwL+G6n9CaGJgwOM/dzB9B5yDzr5Pq7edyo45/yPI1aqjhDroQ808MH7/6yddXCm7C +sCYJIkUW1c1XnW9iAIj68PG12tOLydYYMRsg/XJWQQxoo7nF2VvY5vQXMLnFPezvwP1yVW70++Ds +NDEUoxGh4Ohd5uczkIWpKdKWfihRNalxxb0fSiVCt5O45fV1EpERcCVelph5N65cTDBEju6zaJz/ +SecCfWG2HgSi5AIdAsf+GGmKbqZADOJEgKG9U+/ownVycH+b4hhqOyF5lAU8dGFjqz1w12Lsjozy +3ezvY6eaZ5oMkzFs9crYEu6pGgK96Fc5X720OdP6alNqiRNIqy7M3Hj+g0olv0kTmKxRDMvZGx2U +uQ8AYYBF1URpqaNx7s/DVxnYfJ6pOckXLxXm7kG2OFMbLxwrpTWaYmkhUn7YG74ihyR+Db8fbryQ +wkktf/NuQzkQUJQsM4UJJFas+p5dhOmfdQL1lpXkJMN6k6XxTabIg66LwL25R5S1OXnPZwqnS08k +YfFaO5E30fegrcs/MhB1x4DDAcEc7kxmqZ3oKRf7umFRF6gSWwtEAlpgCXSknXcEabU/aiGVXHEe +uR49K9qOz9ldbZx7o/OxDkm2WBszmQ+MvZk4NwJfkCuK0cnuo1+ZqDjtjXEnssOUH1HbJabBkLg7 +qghV2Aw4fIUNWrlLQs1D2is8f05plsMuZrke/LyD0ceobDAzd0CnVCNC1jBbMeV3BP0oeNWpsrBI +zetoatotVuAhWd2GjaogIzb9K44dzfFSK/BTJ5iy27t30xA4OTlxTvhsYcBoYdk39CspKiE2cDNL +mlta1sIQwMF8OuhA0JA2JYjtHHNdhyKSbSTqYC8h2bdagAM4hSg87I2qMZhs4blLn6vR70NSpZ/G +NrtF8XONWO0h4Jl2932/qw6V/Fl7J8J1zssnXGe7axRfBtUORy4y3wI5X8Im8osxNg5d5+exym9E +qDiKcDa44hUL8SNT29oGOKkH2KqXvykaSe5xwjsIY1R63ZBCgzSNRPNXxwJquDSIJ1b/iOUHrhAI +qwBCIz7V1A0Y+i6onHZxkcn0rdh4UisIbewqrIsiBB4yfaRtFdBa6zFTfsrnjx5Zg2LxNt8OReRA +sXq+cJ79YILuCoLuWFq044EfVUKzYI5ycTz2iJ5q2buqyt/pHJ2Y7rCa/mLlJJ/xfDXm4hvb6cUG +xD28ttIo83kWXS9sc0rPk3tkyKfI89P7EF0AWilgiABxFqkPwcj5jrIXHxt24cbYlU6VM0tBtyz5 +08SA31l3Di6aydb5jUY4zPtuebuTCmeHPGM+8t3TvqtZNFqlPvDp4sPpy6SFaWVZgOwR+N2Mjmvr +tr5Ivb1Y5mFWzy6njW1E1GD7peO8tY15v0E0ux/S9FBusiaoTnEL5p8PlZrx2oEWvCJzo5X9XVP9 +lPhKXFeN/HEzv5pIkLWj6qkvfI1+556yjS/sYMmWFHDrQHL7GFO2t+380bZq7ti5zev0rSUdNLM5 +daeaWpc5gPPzx7mqGVhcJdiwK6qJhTz61Mimo2MWTeYF1gJlT5W8SKggTPYhbcx5V1dbEubznOs1 +vlwKenrh+Ii7FCzkUCN9KMilZg7i81zBZZD8vg4FA/e1/EHSSF20c7PtWdwfBljeuOlWGs0d4sHq +/CuvH8U1Ah1xpz3uJGIGrf93+hcjfWSDTEOWI08CjvSbIgeDFVpt6uVhDkaPTP5X/rPXAzfi0hYr +E2PvIxq5MFijvK7mfxYj8i3nIFg6KPj8OtHZvjHtidEsqwqd233FKcrnFP41uRypKgWisdYUI+Yy +7ZNOIhYUgZ3kJNegCYZv+zSLyKliXtkxGTp2uFGY1VdofIXy0XSgFHD613dOMehjYZJSKQ59ZS+b +YkOtfK/9JoYUp1KqJRTmQ4h6hVjpjiNczeRRY9aykQbs1Ga37DHADtxSEhuJSsSzkfo+yWwnLKfu +CmSCJpC+P4KvjMFY7CETNBW1FLSTLrvNuUc6safUqa4RC3C2nFUagSqkCvD97OEi07rZg43S0Mvv +2gr+yECzUr1VKX7Rus+VV0oZwCZYfyVKTPCj8pSZkfibXoc7e7BzPtPXdHUFKIuzPSYmZ2ZX4W58 +6JMm/5y7DQvZOga+lYdkCcytoPTwV1K7NUDt3JSsHUqGSrJLiLyl6k266bst1E+amH5GZ/WHUqpT +CGgnWcwK3mV7cBdj+sbBfnSjEx1ktQcejPnza6PWkKYwDWGQTFjhnWJW9GbDBahxzyjETlOeBtRc +jyfNA9hS+Ik22zRL95RNhdkWEUBJPCarht6RYhED2sHQxgEynUn8k/pR0mpND6woPEMxmFH7nX7O +tCaTPuaKuKGOboBHV1Mf2dB4/tsgsyYZgUHPm+aW0XwkPHp7mMznHubgKbIDKBnkt1UfdDZO1o59 +tBpG3hE4uDGJ0kV6+I66UCKZbxqA4r2PnUwiDCGrwCGgeN2N1ob+SqnO9zuee7U7Cu9ndGbt2wCI +qoipV/REKVkbqgYuRvLwqob7SYuPAncKn+x0YKrZspXCis0ob2xKHixDW+EmcCglQ5/QBTonFB91 +epzPWGKVv27BvG93pXJamYChV5GxVkl7Q6Z0y1H4gS2XBU5Q4FWaHwrppZYDYr6zTU74ycD0fKpA +s2DIS9E6u/aU+bGUkB4HUtrlj11EZu0bSxyn3RxxVPsCfz0gmpqgQGWr9l+SQbBVmq0bZ5t+csDp +SyaTXZlz+bYsaG61/F9fGMYC1wTR1cnZQaa9uozDC9pZLRlBC8QSnldw5u6tc9VhlNKvqUq+ajt+ +XGNqbVXnsNdiBY4LlaWjYqkLdCPl8RCYDII1Ub4JPAbWtcPvzOt48AavXngX7JvLmzWJW9CZQ4MR +W9S9SXf9fRX8nE31zQGT3E/tKxtmSzPMi1aiWZgfoAgIoywY+KOCKjn93C1JVZwAWet6ynMDHoAw +0KKh1TK7jxxWBAvPGojiZ7bOqXjtbwzCirFkyI282jHa0RpFIUBfY2bZd6WYp7PkNZigHMzTuLyL +HdaaP4rOlfe7dc3FqaDbw8+XUed71W1rdF6/bZlvzTvIdn+1teOLX1JlK+3kEyFn7R99oNbWHMC/ +dJvgEErtvrKvYqDS0F294UaP67+zd2lupA7ajPGMLhysBW8rkGAZV9vVFjFcnQQqoHvbMcCIzs/3 +XKcVyb4BRjl/aKOaQ684TLmLwrWw/UxhZv5ErHp1zkNW/XwRfhfuAm6woA4aJfRdzYj2ULH12rgF +79oRA7VHkLQXVuLQDlEsCTkQ5APAKF6uefr4Xc8n0Vm8seakMDhq64VJNXZkLDE2uYTzrA8mkCek +9eJNj2QGlPJgV73agw9iV+QKmoEa2VoXPufTINAy3bfYbnnkSvSHocA8RHBXgLY9aWGhXJk0zo3a +Xb7h/C5kB7RR5aV+VO6FXvfAhVAglPyXmVOoeXC3xQ4UQkFOS11ay5zMGvkiQ2quVAd8PamEJeQC +lihFnmzxHJ9py1mTVhf2/7It9uZHmy6ZH8/yIl+MCHrUpbAjGWTkXlJhXdBV+ztcYOU3IXEcJUyx +2iIA52/gAq5r/tzq3T6/KYjzmgeEKS+GSnBwjditZnPRpbxpUVJC1L2vK0v0B96fOatkWLgvaDuk +EsnTo1gN9qrg4PyX416aemUUytcryjKBlcrfc6gmNR0a9lwEuPvBY60VI3LcSB6z+7QFc2QqIfco +oj35RCbCYYmjj6m4cYFBSBtWsdXRwzpnzp2XD8AfrZ45UAVzmAHQPPj3f64dIlPOKxuJM57phCx+ +0qywDm2VU2F8WJFePLyK6OQVxxfvWanenwk0jgOgH5VHupGS9PVGjvd+i26L6dzziv22HiZplmrH +lXo6tmbEDEi1FJRTIbhn0VTHpqhloJovpOzNS4qCHdXU1BMtELBln/RXA27DqFx+lgt9gsetKVdJ +vKBXfeeiv1H0SnGWcZNrioR8ky6Qju6vpJl10P5e+Y+28ipnwUIUgyjo17fJPtl8HB82d5DmMfnt +HVBxPyFLYrsB0rvTd7cJpJVSE9DnQQQx2CaG36Ll4pvk0w0Uows2S2VQTjPyKu0es8tePaFFMNl1 +Zqmuib3R8C6/v+ils1sbc9YpYV0qyXigzLPOpgTMCttTIe7y6+sixURBhi4p3RoaIA540Om46XTb +ghb5Sl1po6+4ISdu/OSsw1+IRpQoV7XJ0LV74jFGn+nDUfObRAIA9XmVI86jOawb8y7ufFqQDI7g +HibmrsVUtWSJzSSmKPRYmc4EUEJNK+zGcleGMfRFstCKbCcmUdQlmQyC5v8VzoJ6/Pn0ZUK9sRHD +sK4rhzTfYK/kT4MlxaT+W+KPKs7DZCX5ExOwL/0APKAsvchoN6ombU1vM0su7xZtpVE9xoNgrmYS +LPvVciCB8Kott7EwAwBpcXbUYaUZWhRfIgnTQhou/QNx+cOuNnfCZ6dDPZ3qwevLeooCqKJVXQcU +qk66VnnBfa6HApdLCVeoSOlU+NU53ZFaQT2yGk05VZGeOyynB7sjUDkjX444YsCdAsj9da6FFcTT +so354V4grrLISqdgC04TkDNvnC6QQk8JMgskKYU4Ga+5xpe8KzIbATBzOcd7+qzgp74/RZkKVEfK +YwsCpm2gGrereEAFaCTnNyNKR1iGiyOlLtKff+IQADHukeEjpPR0H4fP6hpRRUnx8cH64hCpWOLJ +hS47/gGPxYJKdHxhdHdbvbZ5f54teHPgjfNloP6ssV5bXKLxptDJwcAkOxGvrSafEO6JezyXw1G5 +xk6diDElHmIC1oVM+YybCJ6wer5u2eBRUS5VNJrVGXBQPKlLbi1mhsTYhvPHWS+Zzw+Mf1kUNjIY +AulklB8gRRc+DurXuavEaLboUsZtbybZ7SZJqfXKNYOpS6VZ3p8+AfBUxpyUy0M1neE1QNnci/2m +6OSKrA/Qmy/Vgi6A1loXt6oXjuMdMfqTz2AMcOSseuG/RDO90+QOfmemJhqHaGdPFtkjR8lEOC86 +iwNaG8nVev2/pfiY97izLIcobGsgDAWASWXG9i8XdTMX8SrYFgI3AGAvOl2wDTt+eeYQyWkDfN1X +g9gRzD50N35nynzpsBDibfVBEQG/dkYDGf+z6eWE9ii/FO+9nmVv2F2tdQrUBWcI/Tlq0dj75KP9 +N3lXQ3WCMAjh0peCnp57KSC7Q3NJ22i94YN2sBtYYXZ8XiQlHKIZXsoJrQCAD1FyyQeqTw+gfZEw +zde0HsWGkXcZfZrGEOxzECTDtiR+tZmOl2sIk9f1X7Vsxrosc6nSqSOl2UeL92oJO83y/ALI+VIK +WfrJgYsMqCEJMLAUepAv7SZsd5RNJsHlBAj+QmFvDHg5S4UWtLRW8k31Dd9j/VC8BNpV0PMz9Wcr +iTnZbB+gPJbpNd2UgLZlFYPuarMNb748yV/7xaKueH9uwCrMSZeJmyfe+OZEfNluBORg0s8mJe21 +QKWhw3UAkdDozRjfwq+p7IEihnJYjlmFbd1Vsl7Tm4JmriFf2mQcyHht88uwQ6HZCtDAphSrk2KV +Bgd8cfS4CUHV/HqyceGI+x5vTmudEL6CICv6kc8VGjRjZe1DSbWEZckzvnUdayxeEiOaxIqb/F4t +1zqVHUC8OM9ld1g7M927MhXhO5GQlZ9k0TghhhgCW+WG77PTKd66HlA2lNsvYYEkflkqCcIRwXFo +UX1CFSBYf+Wu6oz9zryoprR/ZCIa3PiWjUpo7wK88LEPyGxMFXc7lN1i8yA3hke3ppaHhwYgCycu +nRl/5XFcP9hyvJzKhhIzYh7B4qz7VVunI7XGwCL/jj9sux75uzCsjJRDJtT1AkF0LuhQNtGey+0P +M+1fhaLdjsd8I0FcH1oX0hw8ZDziAArM4RAaEyMUU6aOabs+JAIhKq0R5P1jvpTrfGiIKRTaCBxe +8fbdUUYv5faMivkMuMQp3dxYZgMlSH80ZtvMrXdAAhYZ+QFIRyKx6ZsOdMCCsmJXuAawqiDyoFUd +ChDOEo2uZicrsFoXXF54917ALNYQEXbcX2VMwu5RJLHYOveXlQhw+soF3KHPTYvv4UgccyHWK3+y +PpNnVCM/DV8wDcyJM2XvJuHz3XeYm9F9gOYP5FKKsPbDN8GVa6LzS33ZmflumhYbOHuqlg0CcIEW +C4iznPMpyqsNwbJnm5/Kya7E7yUd+J3LtfHo/blyaDpw0M+0zD+xvOKe/+dHX1Hwmx3rpeT+yBbL +/qrS+ZmL3xboLiMoyPcPqOyAuZUiAATc5QiVyk8rcVpYl3JcvcAxs/IHTA21VgzdB83KXOxbmmFI +Aklw88Nitbo5X82TbvSe5b+t9nfSA3lD4zv1jloi4T+GO8GtcCSXS66O5cUcZi4jh6JzaS8b9FUR +aEMTbcfF1O5JTICLKF8v4gM5gafBBdzrEUWjpQwMLV8YapNSCgqRj57uV4yurVWVxujQiOFY22OC +J+pqU8xPeZFqIvlh+v/nkgXj4dytYxrDOqQ8aRNvDavZu8G8pqo+/3/b2ZC+GM1jnUmu0pIDtwZF +mgDlHwN2vLSJO9ZmaegufMa6RCAR+6MZX5EjEOfshqni33Szz/ibSQs2PR3nh3oV+DWwUOSjuIq1 +lqH5OQ4aijXSrW+VCPZj93Tb5Qxz4KZG3Va1qubdJvsNIGpovutOzXXyWb5T1lZjRODdxDrGyl/U +2qVVnywKyuk4TGdZBxioUVF1XEdqwWyNjUvNiApXjf0BF3Fo0uJbrQCrcc0Zm7TYo4v+usNnU+/c +rHrzxtQIDMVsBo78/L0Y5nwxSBL9i882qRYFMBdq76tcw4bM/oxb06OM9B4/31hANWhqtb/CnPuM +/WG02s5rGmwO87ZSB7IioBMHNcp2EvsNBO8A7nfqaD8fUc8tnxfywDapnMfuWxN00SvyERBbKRnq +sjXKMxHlJyCA64v4CZyAp/I+Jb8xVWW6l1VzY02hAArj+q6uO7I47A162Jh5JhC/3vmeFdOZt3K4 +Bl4TQpPsrPtRHPWXO/h7oBqtzUsda47vipC2+X4P+2XZGW7loTyFOfwJU0C9oDmde5BnLQDdDiph +pU3cUXHQZatZxtdMP1nD6vtMJtwfvuuyv9yAECDkBhfC+N83yt8k56SQK0SEd7/F+MXgagTPTBWi +B3kw9YrCtHQDzKaX9wLRfsbwEWSk9GsKWuV0M1M++o57tCXkPjKN2iGMOL976vSm7hsHPc6qECAj +mnCoWQZE851DTL0p17pORGphf7jbcVDnJ5JRtFsskLsZwj4m+Ga+sSWD0TCoBbELCbvTBN7+n15x +9k1yB31eixtOohevkamvkwKZ2D2D17+E5fUz7bW58Z3D6V1A2XjK/1tDEMpx4OrUadZjGDPDDG7Q +NgpLAA9K6GF9/4LeqhdU1QjCWPd7Y5/E68LiSaZj4gxqnWSUurtvQLEowaN6P/J0ck+dElzqStK3 +UHI7M32EELGuuTrg9DBhv4W/wArAj544ufELSuyPYBpmRB3x8AoRgt9AMSp41+ZTN1nEIwBcidvZ +bVpUzUZbaeSkrqVRYwwDs1wEBd7rf7Acq5qOir7XSRo3WFa1vCXBfj91wCe6dUtGrDaN96XBsKgQ +6bLs4m+fWmp8HHTfVZobH97zrlUXZ6B1wY0e2u69Lb6ywpaPS75qGd7OHqE0dctMJbXxp6xtRduR +ElCk6ZFkaPKHg2qBcAx5SOWLUqpy52AF/NyUgK1c+K4aC32blefgW34KFiXDMAhsvuwMJ40DMEgX +yKh0i186JDRYLW+VOkpHY8UgmmOWlY1AlIfeWXWgfqCrJhXRWw13zl//Mm2flqT8zVqjkwZowyGh +eU9O0+X7lWLNssgRKOK1Iaz6uMVg61JIbFRWXksKloX0L6nSIA4fYZyZYph/rQhoQKHpOCschf8f +HB4p17QmY7qxrz29OEAzPfwxmqPsIQOVSawU93xZdIeaKJOQ8rMS4x5eO6hVziS5xpJExtTMoDmw +65MNiD+rHnLYPNUWmmaP7/gkS08fWAOCClnnpztk9n6vfUYq+VFlzGncygwURle/37JvHHpcdAId +g9FgGw1t/ar8Ca9ckx7v3vVJwDdcO9ISbLmJjtqGzVz7+sW8SmshPzaJEU4y2ctWn2+TXAOBfJeK +sXlXHBJnA6Q5wMqbZRV+fbGbSQduRT0DN8DVA5Oq8jxnSKYYytLqZjjfg1bmyu7m5ueg639ttdFl ++JPXyXq/5mdq2Y0AlLi9g8MZeuHrQ4V/goraW35k1xOv+UbeLcfOhOgt6P3P3gNkjH91hCjoIPyk +Xzd8vxshw5fhXmv+3f+ONdxle/HL03P1OIH9N42mo/8xA37lm6uXOuoNoPmGBwsKhMIVEdqXsEK/ +UKhu9esJW8ZeVswZtynS8LSk9o6KlLXs4OJMYXv5TuADWuSFJmGMEMsyJeMsFaR1GA2C+sRdz4Ar +pOyZZghg3XM1exj/Tgq2/DrZebD9pIXcEnq5AZFizkZu4Fm0ElDE7UP9Lqg15NXvh//0TcfN7yrS +tji9I7r25x4WJ4rsf1fCX20Uqqqvfs0V+trdLJVmUakP3FwtGDRDRwAHPx01HC0f5QHKkmDOIS2B +lsy/imccTs0H7z1jSjego0NBHegLdrM/IH2xlANNrFPsbjvOquLx5bzaymQYI+Z/0FPstDTaF5PP +AEmEXEhAcvk0yEr5xhe69pmHftF40kWtpmzT71xyJgKqBYljJgT9WDtKliYAQRwH1RR1VgplWKHN +3jizVDcTuNdWWP86NPJboMVzghh2qC9RGms2dh2ru9wUitSoEuQrU99DWiEUcgh6XsqvvC3fO8xs +OcI9TYW/az0Mv7I/aiJsYl1WxxOzBvq+cg0+KKm5E0UhAm6j0istIRF3nTobS75PTAFuVUDyV2ZE +91Hyjc7Ay1HyidM/io0/ZMe9rv7O4Dctrh78mdX4PqebMBbX9lf8knf8WxaVeBFJYYwzZJCDAe0k +NKXU0uwCkr/sQTy3UEgiJ+fPQujeLMZRzo3oujtULtCbSDtyre5ujHe6GjCtD8xNyIjj+SjgP4kD +Z7tXh6E7EVm9PS1wgm5JKINvnAw0JgWOxLAadfvqaNl0mPS8ko1OsQLGYhOs43LDAqYMTJna2z8J +LURHyWqPK/dDrPqErw2yUd3AzLCOws9Tlpvchyzz7UQThxDsduwhLPU+fX6eUzedzaV6yoCufvwi ++AHVx6sPAx5zCx8NR0+mCNjeZU1VsPetfwG6iKK4FXGYWcm2JfvN2GfRl0xzwKh8EIegylTlc68P +EL/gW9df06kLSYgR+W41v/QzFjArhwQ0urBKdcYP9AvQNjIm7Y6tBor1XLZION9Xr6X+GRDt28LD +ttEauuMUXcs8Wuxc2IHUWOulVAgLCmLp1MLkBojPpo8DSW9JRmE6Bnjx1u7+TjcCa9cTlKLtBkqD +7iKSpwvdB6V9lpvlwp/RcSJRE/yHiHlXCrpfwcY6+VwHYS0mi2GQ7Qpu0Pe+o68cseZtHHRHBXZ5 +FIycLLsaEbGerjQLkLSPRRDk7kp+2IpFKIOMR4l4r2UJdpBVdxpT+p4SAFoz5SaamXArqw4O8Lmr +YpHYVmuQVKvgFAFuYra6XIAax5tMhlaRUFkk4BM5Brkx0/yTXYuLjY6eVvhu0o3XH4m3begBhP4i +ZacIGxrS8IHkFYYax1G+8uXHcnKkWJkPtJJYszJtCrhhDNmZpv6J5pBMkepUhRCK3JH6ST+dyfCA +R4tDU3hE4iB9muN7/xX35MJuUr6AzwIDN3P6dCat19ytkUIm2Sr3ym2V7DOWg49UqcY6gF08eA5G +dmPyNgFF2gAgBgmkxmKGRlWjeviZIXE/acra9fZ5OrlTwvx1YeW5REVQ0wjX0M1rqrWeowJRlwgd +WC4dRWR2NkcADkUKNxXPFlPrZEnF1jOjqelRhP8Rmjl5k8EO4SDh7hzjB4ubCgy2WeCdXYmnmmSN +Qi0S5xavosq6+DSjrlQVlNq52sFwfeayXXjmRyQ6dNOlg97nW+VjJl4GdfUCvFwK1ZY6BmXMIepx +XDYqxJUOgEE5Dx0p4biX9+IWPWK5oDNPkuDG+Rw0OyLIHISGTUMD/KmollifzrB4i3xTUwTBRSnC +d9skDbuma2A8a82/MNFMk+KHRLA+9a6ldDjGgKZ7TREzK0k/VKZyzrllIU0TlKIGoCiV6bS31Evf +6Hr3IovtZGm1XH+d9qGJb2Z070kPaR6nQplWO4oR9Rh5hQz2XuY3K1o7IR3lu3+KGPjD9b4XBUGS +aTHNAUPHpIJT/qfTvf8+N5BOPaZ4QB7mzKLIAB+sF7yXxJy6Tw2QnBbRBhh2ZUzC2Orpx8fTm8D8 +6OlRe6zHKf/c6zOpfF8ds53/+gFM55Fm0shOQjw8+XNm7JF3Q5NeGI1NTANgPU4f5H+S/GCg3akL +oQ61igRRZXVHFM1EXpF1qryc0dGHkxpAWdjUs+dh3fhlcsAk78yQax2bbiqiKjZ6HLyXEACZuLVn +mZTGYpfgJ9Vwm6088h3uCq6IvhA6wDKiaXdz4/rkWsCJooKuIR3iu+Q+VMEQuZA9PeBjEqHvDNPf +5uhOq6SujRz+rRO5SwzolSxjC6l728Ymjt3+SK7PNNnnyONrAszWq/Zq8xNAzFjSzVqCpKt6M+vc +16ZQnmIo97C7oOMGf+eAExbclvblrpAVg36mMCfDuxG9IEl2inuk+6FJN2K+u0kLjObHysBAeKJs +vL6ZPDtEGH6RQpZWR2BwIiXDzJCz3jDzzC2dHozpIhOqLxDstjjcw/838rtv0JO73HNS3WQx3jXx +Is0dwECHyENQh+sqf9Q0tfzW90f36fRitoRuJ3hqdBFYefc1cDiGz3uxNwS/ryGGKPq2aQKyL3Xg +qAy1QdszCVy2oPJbufP7f25S2OlgC6XyBMs01aIf/tG8+zSZxjWaQdhw6C6hKNqCCsvCA5SJAJ2N +YsG5vRz32+8U4/sOmuVQgIY7CRX+4/KxPHazQ0D65RNqRpp8uBcz291gn1GOZSD0ia66dU6iPcIW +qpjoAGZNozJGLyazMV7jFKtHer5cuKEIzOtXBCQg+imx3EN1tylUWm4qdAfUVMuwpZdDPQ5GH/gX +IEC+ihakkYhvzK4QYbmFPFyZKKqOL3AUIO2s7nQ891wTRcJZWSATMOgb7W9ExmrkrasrW7T0x97K +pDmxKzbM59BtD16jjlygyqdP0iIyK8bnhxsylA9mFN4W3uSMaXcv17OpBXcXsvvP6TuB32Hbai8P +i1qME5n9sytR3gPjeDLNtvLXwKyFMzcT+pnTVeSGeYaLnpyDdJn18d7ptFWzju45ClsuTjQGOB69 +aLgaNRUbXuTomb5h61ADPslRF+7xPI9fcTtdySVUwJtIMi0A5qukcRv4pTK4i2sDBn3hATnEE7+9 +XUitY10BghHOTwDSwqvGiLzaEQosWc0t3VT8o0V8Q2wTkqJefF0J65JO19IjmbLuSlYC5+oNB+Xi +hdBI9R5tvVh0YxOjCOEcEdBOFhm8grAOfUvOaqWvuznNrlty7Hw+hZXaLJs3n7CB/8rre9w2+GwY +8BEZ2AygvlD82DQw+fZuqPydCP4JRnSsIBSoFU1ZayFuqYak1i/DkI5xtuX0Sg60bd8YyKyAo95V +t94yOnE2HvsiRL7z20WivTH86A372JCL7486/1QEOkvh/xl3ieFd43ATEkDeNXkO4MK5/Rmo0DG0 +fPYy8npK3YIOQlm7Ffn3KScndiH59kDEpMQd8SgoIQn+pClX76+7pmQdoAq4Yxoq7bhQtJ+n6ACB +5pT7ecbC01SWLRBN8gwLUXXepQzZ0XdFoekrJKzacsQZgsqhLkJB6MRTZXfzXCsHTsLnnKxpzvKH +vtELR0/sKOxhHqx49njxiqmViXOAU8J6R0jTmUkRQ2jMLmwhhGJuJ5x1XwdRe8ZnkPWOl20kBm5V +PUr0cafp9T3zaHy9IyisXxUj6hJdY9L2mk3c4mv2mM6iwk8q1LqnbR70IuYmwUBw2Q9apIGJDAyB +VAKqFaGevBXWMOg65dBM+MjTmnr3ZVbaqV0iPoDDkJsO94LyWTmkp4aoh5YkdTsbS8MdKEcntjVp +jl+jo8ehUyMXGY3aCPK2OSro6oxQ9W6P92xT8TcAkBX9qTUZMPytf0rhUxgeYPab+xYccp7SxZ5r +m00aldjTuD2zo9J5qYYueHTfGOp/xKCks1ZcC2fzJ/KNwN36JFTk4OcBOj+zbB/wUTBIbx2JK4Pa +cuCrJjLJrbWsITNTmPDoHCYcQDrpXz9iE8ggttMsjERVmu6aRJQULKQx0yYrjD7B/KgCIF9ESq5Z +BP+D5yuyYgMMIyMm1vh6HC1RV5s0WW5eWyNVitXT8qUkCJ0JLwtuj9FBJ2/LMnynGYBV+LzjzpwK +2Z1KK3J58Z7tLqW27D2r8dSlfv521GPoEA6XiA5fWsnCkJvQWxd9SItEShnUmF+Fo4eNqCtACefG +jLYPIlewu8U8Vbu49y38Td2K/5tyRamXCcmt8+b4yBU+0RO2bkultsUMuWTXLXetaqJVh6C0vQ/p +W6EV296HSIS6Vgu01JJMLJKGvT89h9f4P1K+oMHxd6/vFwH9nuyWf+1Jmi/6PlU7rGrrgVz1mz7s +83jPpjdE5YNUb6yCqGP7v0XFjdliTEjVf5nTe8P/4p9sJFUK2z40RaAyQjjCKnlOtDquPOYtd3AX +f5EzqHe5GkZOXguBQn8eZmvTfWrpvBfQMG19Pi9zXsGcvkkxh/fBTX7FP4SkgKOAYlRDsff0grW5 +FEq4CqjpKqg7V07VVIta1/g28hv1EwzBzbXX3MPubJHS5UTrRqLxPkyqQMI/Jph1Zmcep/j5VzNR +Bweg/Cw+TquLUVISmEftcOg/VZi+xPdK6TmAk6YiuiFhEzUXM3qSvpmlljKv9jkGJjwjddu6/QGT +Q5iOzT+0uCeuLY19bQlIKFXyL6PpHc5izVoVZygikwUscXnZm8j40HNm01uqtv5hRLHF34TtFIOl +1h2rSlL3gkrsG8YFCdSMCLwBtw97I2J8pfm/tWC3B1vB3uhcX/lMFa9wSxiNqCelg7Fh0d4Jtdbe +h9uzULDZXhj2H3TtMSZBk3gYLcIK6A0ndkkBIj38bzYof5Mln4InsJjCHOAujm53XZ/b4ddbWCM6 +DiBzbNXUMME/1joa+KR0GdgtGxA8iy+kvIBnImzK0JKwatyJlH4yuau5Or+hsL8lkuyr+D//OxFZ +R2xNfgHTZR/cbHl8BeJHZt/QzKpS8e53sWBcOOaaps+GPYYyWf4VeR+ossmm5MCXt6BfCBC0RLIL +CCKIQS6Di9FWskCcoJpqy0fOAcChV7lbjwKDzKjsxYDbDNNnn/2OSgjhXSIOLG6tqboBT1g8XoxS ++WuNHDZAKwE1Npx4O1D9AaMeGliJrPpOKmQlmbqbypWWCBLipEYsKtCLohsXGfxjK4Sze1FehGx5 +aP4AWH6evIYnmnnxsb1tC4ryY1U7+bttKYhQMwaqag2c7apS67cPRYFycVI3mEbH2G3L9t3O5kyY +L0eIS8cCssnjKhorpv6F3kVuge37qG0Md85mDmXZ351FhjhGcQKszJhjGKweXI5nCqj1mYECs62v +SAPBo3ZfAtFp1fy0Nh+EFtiq5KS9LMNv/rJE8H+NqAskChzIH0rPxJdmVUIyslMbaVLZUf6hrM7N +pn6IdGD1CjYy5ApUnc0kBvjX7jheZIAxPjy+ZrQr/CYe3J+UsagJOtzAE+yiCtk4k6Q9Gj1NjDSq +DgkUhSqPyhQfwVotaMmGij6+QnSImtSZ24ouVap08vAf5/WQZLmpgp7/QBsLF921GxENhIqXfg8Y +9vAekZhGFAexjb5FxevgukuAY/IAzUJE/bW8+4Gd1vBwRnTyOnckPSHFI9VhYCLIH7D/SlfI/ydX +KNo+QuGHl3108V1WIIda4kGlIP4Bl9i294GdDtSyMCighM0w8HUNgnv13LI5EEysU4LwNpmkWAx4 +qM8hxPNyb+HmNYsSkb1xLTqyklIdzBYBY5oLCxuiWKe+Gl7pZwncom2lS8aMuU33hYQCpSZ3t8+E +H1DZBoylMratEmxGeR33ZhDE+ZssLgfd+iJS/dYTKd9t3An2DlMkoAtMvetoe2a2YmxejjhGSQNV +WTVPLfUmmTWgrDAdMJP3rmLpiVQbHj+bvIrF2AmWH5P2whxpQXaf41IK5shyNE0J8psf1QbsWKKI +Jb0RccKsur8c+/+qFHvSfFBIX9tY6GfgQ6jNOEvw1JDzYH2/tPFXkb+YCRNsCxjqEvoXS1xRv46K +qWdxwhclfxAHfWYrMbsn0E1OnsuCkcjVW3GNv7t/DIXCm/VB8TS3udtXFB2o60BFwuonlnH8FVh+ +6FyUzFt+fZAwMxITwm/0cK4vQRMgrdlvQlxRQRCXkPvP7lMgwEgvMQBWPQwRb74fezIPpF2xyeLO +iTcocHun8OaCdsSZjQsnYKqZW4+esfOzQX+UA9e8grBYi0xCZiHf3hLRCcyGKhk+Wcdhu2sBWwFH +KKBCktytmszy1p8QSf0WT8jA3u1O/suwetBYSx/YR//9x+1f8djgX4+6hjgWPa3JNort/q62fUYb +3HdG6IaSAAK2TICg9xenX5/D78yX0deWRCI5Mp99cuPg1s3sptI1BxEoT42fSwILSF/EebflnUTX +vYJK5VUAjHnFDQDDx23c5rLyW2uuINsCtiyL0kl1Jbce48nnliF9Uo40uATAXhYTM8dcYQJw95xR +JhUeZv8gFXXMRjLl+UAPISvC5HNYaDG6Tky17E5hs25rTo/MHw3m9PQ/reGC3pI9K7AccTBARcoX +Xn5TOnWXeGzkCbOEjG4uf+G6brroAO1iKXbhv2tqhZGJ4bAO/XVrSGNs2HiatmdkMI/scLr6sLsO +VnzURgmaaqPExhaapZQRY/Mng0ZjKrh4CiRpor0HHRC2/Ub8iR/7GdBRFQ2Y9DXC4bxHgjmt6aRI +2NDEiJsMQNU+CgQU/uixxl0YfSUEU+SjqHNlIQGHxu5DMRCkq4I4iNKuTRoHRwYPDD0wBEb5eDKB ++C8FUYtvVaAhNeWKHXThxV1u+6zXGsOG9G6voXsbOf6GO3qttekDKkT48t4NmPemYoz5ULxoPszG +W1tm55IXUVd+ZWkQ1htv/e9vYfUXvgC30gygi11l1ctRgh+D9mKOdSudjuf/VjP3obHQJTQfcHnG +BE1OXPuzJDR0AHMwyysINas47xUNIRB4mMp6WfYGssdvukZ4RAV/IOPR68gtCOLDGCAfh84zalra +4dCZ1t6XFOUTh9ra+otE4KGhl3QKr8YSkNlOtQOpiINV5+YPinjMSQA515om5uACK3A2x+k7b5tw +xoORoOIwbPrOh+6gMq9Wk1MBGJ+lf+l+29Kymx7X8W4hX6CWShQiB5TNsqP6UZJ8+peySnfEZq/I +zjaSZwmDZe5lAinW2KnuUsgaN6rV1L62pJu8oQRxTq9qVCD8PRz61xIquHrVMk+7y2rDe3kvHtXb +pn328GcLGuBW+Wxk+fM7upbMgWmSbmKeWvIcgN6PlIxR8s4Uuv0LQzyCmWN/jKgrpnmJEVoaXPII +rAoIKf9mG8lacvh722uu6O1iTK0xaid4Dc1oI0NzgQu6I7bwKQB5GlYtsvyF+ImkuoHFuRT9I+CE +MEnbr3mHGJQI0iConpECjEz35EXQyfz/BHMShz/WXdhbHFUqxDKY/Cpp0DaBaCaXwaQxzN7TKjh+ +orr6pCBK/GFYNj3af/CdAifWR6fHYBoWDvt6SE0CSOO4783u3PG/3GGHVxqyzFUD9z8YN2LWBIKa +7+9QOGjbk8uMmiN2JgMZJKGLxjhxv+gumrj6GM7nMU8mv7DNv4iiAU8HvWXcdqZV8A7yT4Ei99xv +Rs6v0I/pyN1+DVICcR5MQEt8RtRuJra0f5KNMl66EXUiH1tTgo15FjUxTpHHq07D4pAgCs4dM4t/ +DBxH/R8bhfgYl42BVjCgX7zBlBYS6Z3PTbTXTL4OUz/10gatI+PG5TNsu29UYrI9AD9JZC2JVGEJ +/JVcRTDg74fz4HGESc936jZ3OOreyqPZ8ZvIOmLriD9VbDYF/Jkjn9+p7Ff3U7e6F+wdIKAdrJ2S +dy2WLAsWvZHotTBSonAbCQJjZ0RvOQ36GxfFdfwWzZo/vSmKyI7L83515r8oXizn+Y9+GzDyygJ/ +fn+hCNUNeZ82CeJGHQ5H726aUbELZA4hk5Tztp175KmjlccH1yOeOJFivXio2CqsvrTLnIEgAOCU +Jlz9EsUjmAo4fsf8xrvErQpLkVSCVXDU05JUMSDuw/4jYgeIobH9A8l6l+HKKXuXrAjFt9/YTJuI +cN4q3Uj9zqKWahoL5g+kcp6GbZePFIMxUjzobkDLmrymNDF9JHo3/Pxc2A8XTNh0sdTJYmAV/5l9 +c1+YGJJRmLE48/r4Q6ghwjwuEZLwgCFxwfsR8GzVK48rkOWBha22AAk5PaUUEpqEVc9nuXe0Hher +Dcf1raUIUJ1UjjoWuJWmN62gYpwNdbgUsycZM5715/YJEcoq3fKbg8uuNnMyqSLGvacBYaAJbOrl +qYIWZ9IlbsTRxQXNAHV0DHJFfpbxDCB5i3cF30dIgxKnNaY5uOWTLW0fkcGniTgVNdtpGzv2Ousq +8AYAWtdohfhQ/BY3ftqFgal01k5YmbAU9tHSGuAoBNhhkKQrsWMS4MJsNDKtPAsGK65T/s54da26 +dm6RO2o4pkHtf2qTVHpjd8fk+xH/9s8NdU/bC307fUrtpjOdOWqmWqD6S4mQDh0DBI6WqKvBzxCh +ftd0rrBhoWZfuGODXCWnuk0ft7iZC1G8Y7uI0/cJq7c6eVg2VF0VVOHgzClz3zGkANLKZ5RTRMK6 +VeIq/yzilAFfW99jUgfTNI8n8NkcGlT4A0PiY+AexlJ07Zj5CD6IJlYBpjgiHxS8sNiO8q3fKuPf +vllKy8EDLvR9NryH2K9bQfwPzasT93DcqpuYjhvsjpYP7nJo2ykiJeIqKUI4qrp/DwjMXcl5hYMi +yFQXChiLz1xzJpXHMWUhmx1/+kQiVwLxLUXfL+IYKZmeadswkUpfC2JvFqc1M8pDadGoXlOtjilM +3Ew/rMxASavXWDYMSNj/CXeQAEON98kmFpzmQZVvjMCxv/oGYf3LBwi6P4Oj725QosRBy+352XpP +3/sH7SqaE6921APcQInlSCO3ctJ8JdfTAyEoPzt3dhCQlIvoWrf8jIbZsf6WBar14yRwY7gYUFBi +Tfqj4UvFViOLju5FCwMRM/F+f9leDZcgR2ARXwpPcF8yY9q81Rm8XgLmZNiXYVznV9uMXt5RgVX/ +Q6yFZQypMnbrbolUCetOEQkUtqRKNQXm0ZcDnR0r15L7OQFiSYM1IR2o0qSgXTs6NSIPmwRNr9S/ +lW4cP3u6rvS2DnbbqfsVoBu/m3rB3F/B13+lu+41pv9ZtC4lDoTQW3TdcIY0ernMu5UKqZJcOEdI +a5Zdp6xFpwcSQEvgfjjf9D7ET7i8sJOsWEb9khiVFWkTwk3DOpZTVgwV/SLcP8EFUrRtoCYwEqPP +dlVGV7CPChXJRWqT7dSENxmq1KLUtfyeTSOT4iudvErIwHa1pqqjFUhnkSbznH1JBt3+jbIfxuHk +YcLmltD75iIu2xlPvhzUmP4znTq8q75hEG7HwpWzFpHVx30MWT8py/HHWn//G/zJ1EOjDsLTKPQU +rC5JacvdSc0T9nVQVnGVMBGIC9OTXXJnJJw9PDpozSu3WhPt9gD3LCWslpvb//U8IGNOuPhabrnh +y1RHCJZd2Ad586hcHBzToEEDjL8160DBTV22ifwh/Rl5fYUhFxeErBt2C703++Hv8Gy6wM1G/5CP +q4rEzaPGmtqn9Yd/uMpf+Ea41F3inyCsSYxdPsx9JQ8GvB9QmMHh9iSTlLFKMzJxgUteM/rqbpZ1 +r5Fa/pMPrm6UcJe1fnq1YW0= +`pragma protect end_protected diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_enigma_x1_top.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_enigma_x1_top.sv new file mode 100644 index 0000000000000000000000000000000000000000..73b8cfbedcca6809af088910daafeb02c29126a9 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_enigma_x1_top.sv @@ -0,0 +1,166 @@ +// +// PCILeech FPGA. +// +// Top module for the Enigma X1 Artix-7 board. +// +// (c) Ulf Frisk, 2019-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps +`include "pcileech_header.svh" + +module pcileech_enigma_x1_top #( + // DEVICE IDs as follows: + // 0 = SP605, 1 = PCIeScreamer R1, 2 = AC701, 3 = PCIeScreamer R2, 4 = Screamer, 5 = NeTV2 + parameter PARAM_DEVICE_ID = 9, + parameter PARAM_VERSION_NUMBER_MAJOR = 4, + parameter PARAM_VERSION_NUMBER_MINOR = 13, + parameter PARAM_CUSTOM_VALUE = 32'hffffffff +) ( + // SYS + input clk, + input ft601_clk, + + // SYSTEM LEDs and BUTTONs + output user_ld1_n, + output user_ld2_n, + input user_sw1_n, + input user_sw2_n, + + // PCI-E FABRIC + output [0:0] pcie_tx_p, + output [0:0] pcie_tx_n, + input [0:0] pcie_rx_p, + input [0:0] pcie_rx_n, + input pcie_clk_p, + input pcie_clk_n, + input pcie_present, + input pcie_perst_n, + output reg pcie_wake_n = 1'b1, + + // TO/FROM FT601 PADS + output ft601_rst_n, + + inout [31:0] ft601_data, + output [3:0] ft601_be, + input ft601_rxf_n, + input ft601_txe_n, + output ft601_wr_n, + output ft601_siwu_n, + output ft601_rd_n, + output ft601_oe_n + ); + + // SYS + wire rst; + + // FIFO CTL <--> COM CTL + wire [63:0] com_dout; + wire com_dout_valid; + wire [255:0] com_din; + wire com_din_wr_en; + wire com_din_ready; + wire led_com; + wire led_pcie; + + // FIFO CTL <--> COM CTL + IfComToFifo dcom_fifo(); + + // FIFO CTL <--> PCIe + IfPCIeFifoCfg dcfg(); + IfPCIeFifoTlp dtlp(); + IfPCIeFifoCore dpcie(); + IfShadow2Fifo dshadow2fifo(); + + // ---------------------------------------------------- + // TickCount64 CLK + // ---------------------------------------------------- + + time tickcount64 = 0; + time tickcount64_reload = 0; + always @ ( posedge clk ) begin + tickcount64 <= user_sw2_n ? (tickcount64 + 1) : 0; + tickcount64_reload <= user_sw2_n ? 0 : (tickcount64_reload + 1); + end + + assign rst = ~user_sw2_n || ((tickcount64 < 64) ? 1'b1 : 1'b0); + assign ft601_rst_n = ~rst; + wire led_pwronblink = ~user_sw1_n ^ (tickcount64[24] & (tickcount64[63:27] == 0)); + + OBUF led_ld1_obuf(.O(user_ld1_n), .I(~led_pcie)); + OBUF led_ld2_obuf(.O(user_ld2_n), .I(~led_com)); + + // ---------------------------------------------------- + // BUFFERED COMMUNICATION DEVICE (FT601) + // ---------------------------------------------------- + + pcileech_com i_pcileech_com ( + // SYS + .clk ( clk ), + .clk_com ( ft601_clk ), + .rst ( rst ), + .led_state_txdata ( led_com ), // -> + .led_state_invert ( led_pwronblink ), // <- + // FIFO CTL <--> COM CTL + .dfifo ( dcom_fifo.mp_com ), + // TO/FROM FT601 PADS + .ft601_data ( ft601_data ), // <> [31:0] + .ft601_be ( ft601_be ), // -> [3:0] + .ft601_txe_n ( ft601_txe_n ), // <- + .ft601_rxf_n ( ft601_rxf_n ), // <- + .ft601_siwu_n ( ft601_siwu_n ), // -> + .ft601_wr_n ( ft601_wr_n ), // -> + .ft601_rd_n ( ft601_rd_n ), // -> + .ft601_oe_n ( ft601_oe_n ) // -> + ); + + // ---------------------------------------------------- + // FIFO CTL + // ---------------------------------------------------- + + pcileech_fifo #( + .PARAM_DEVICE_ID ( PARAM_DEVICE_ID ), + .PARAM_VERSION_NUMBER_MAJOR ( PARAM_VERSION_NUMBER_MAJOR ), + .PARAM_VERSION_NUMBER_MINOR ( PARAM_VERSION_NUMBER_MINOR ), + .PARAM_CUSTOM_VALUE ( PARAM_CUSTOM_VALUE ) + ) i_pcileech_fifo ( + .clk ( clk ), + .rst ( rst ), + .rst_cfg_reload ( (tickcount64_reload > 500000000) ? 1'b1 : 1'b0 ), // config reload after 5s button press + .pcie_present ( pcie_present ), + .pcie_perst_n ( pcie_perst_n ), + // FIFO CTL <--> COM CTL + .dcom ( dcom_fifo.mp_fifo ), + // FIFO CTL <--> PCIe + .dcfg ( dcfg.mp_fifo ), + .dtlp ( dtlp.mp_fifo ), + .dpcie ( dpcie.mp_fifo ), + .dshadow2fifo ( dshadow2fifo.fifo ) + ); + + // ---------------------------------------------------- + // PCIe + // ---------------------------------------------------- + + pcileech_pcie_a7 i_pcileech_pcie_a7( + .clk_sys ( clk ), + .rst ( rst ), + // PCIe fabric + .pcie_tx_p ( pcie_tx_p ), + .pcie_tx_n ( pcie_tx_n ), + .pcie_rx_p ( pcie_rx_p ), + .pcie_rx_n ( pcie_rx_n ), + .pcie_clk_p ( pcie_clk_p ), + .pcie_clk_n ( pcie_clk_n ), + .pcie_perst_n ( pcie_perst_n ), + // State and Activity LEDs + .led_state ( led_pcie ), + // FIFO CTL <--> PCIe + .dfifo_cfg ( dcfg.mp_pcie ), + .dfifo_tlp ( dtlp.mp_pcie ), + .dfifo_pcie ( dpcie.mp_pcie ), + .dshadow2fifo ( dshadow2fifo.shadow ) + ); + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_fifo.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_fifo.sv new file mode 100644 index 0000000000000000000000000000000000000000..82018cf8069fd645de2b8871719f2b908e6784f2 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_fifo.sv @@ -0,0 +1,535 @@ +// +// PCILeech FPGA. +// +// FIFO network / control. +// +// (c) Ulf Frisk, 2017-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// Special thanks to: Dmytro Oleksiuk @d_olex +// + +`timescale 1ns / 1ps +`include "pcileech_header.svh" + +`define ENABLE_STARTUPE2 + +module pcileech_fifo #( + parameter PARAM_DEVICE_ID = 0, + parameter PARAM_VERSION_NUMBER_MAJOR = 0, + parameter PARAM_VERSION_NUMBER_MINOR = 0, + parameter PARAM_CUSTOM_VALUE = 0, + parameter EXPECTED_DNA = 57'h0032acc112e1085c +) ( + input clk, + input rst, + input rst_cfg_reload, + + input pcie_present, + input pcie_perst_n, + + IfComToFifo.mp_fifo dcom, + + IfPCIeFifoCfg.mp_fifo dcfg, + IfPCIeFifoTlp.mp_fifo dtlp, + IfPCIeFifoCore.mp_fifo dpcie, + IfShadow2Fifo.fifo dshadow2fifo + ); + + // DNA modules + reg dna_match; + dna_check dna_checker( + .clk(clk), + .expected_dna(EXPECTED_DNA), + .match(dna_match) + ); + + // ---------------------------------------------------- + // TickCount64 + // ---------------------------------------------------- + + time tickcount64 = 0; + always @ ( posedge clk ) + tickcount64 <= tickcount64 + 1; + + // ---------------------------------------------------------------------------- + // RX FROM USB/FT601/FT245 BELOW: + // ---------------------------------------------------------------------------- + // Incoming data received from FT601 is converted from 32-bit to 64-bit. + // This always happen regardless whether receiving FIFOs are full or not. + // The actual data contains a MAGIC which tells which receiving FIFO should + // accept the data. Receiving TYPEs are: PCIe TLP, PCIe CFG, Loopback, Command. + // + // /--> PCIe TLP (32-bit) + // | + // FT601 --+--> PCIe CFG (64-bit) + // | + // +--> LOOPBACK (32-bit) + // | + // \--> COMMAND (64-bit) + // + + // ---------------------------------------------------------- + // Route 64-bit incoming FT601 data to correct receiver below: + // ---------------------------------------------------------- + `define CHECK_MAGIC (dcom.com_dout[7:0] == 8'h77) + `define CHECK_TYPE_TLP (dcom.com_dout[9:8] == 2'b00) + `define CHECK_TYPE_CFG (dcom.com_dout[9:8] == 2'b01) + `define CHECK_TYPE_LOOP (dcom.com_dout[9:8] == 2'b10) + `define CHECK_TYPE_CMD (dcom.com_dout[9:8] == 2'b11) + + assign dtlp.tx_valid = dcom.com_dout_valid & `CHECK_MAGIC & `CHECK_TYPE_TLP; + assign dcfg.tx_valid = dcom.com_dout_valid & `CHECK_MAGIC & `CHECK_TYPE_CFG; + wire _loop_rx_wren = dcom.com_dout_valid & `CHECK_MAGIC & `CHECK_TYPE_LOOP; + wire _cmd_rx_wren = dcom.com_dout_valid & `CHECK_MAGIC & `CHECK_TYPE_CMD; + + // Incoming TLPs are forwarded to PCIe core logic. + assign dtlp.tx_data = dcom.com_dout[63:32]; + assign dtlp.tx_last = dcom.com_dout[10]; + // Incoming CFGs are forwarded to PCIe core logic. + assign dcfg.tx_data = dcom.com_dout; + + // ---------------------------------------------------------------------------- + // TX TO USB/FT601/FT245 BELOW: + // ---------------------------------------------------------------------------- + // + // MULTIPLEXER + // =========== + // 1st priority + // PCIe TLP ->(32-bit) --------------------->--\ + // 2nd | /-----------------------------------------\ + // PCIe CFG ->(32-bit)---------------------->--+--> | 256-> BUFFER FIFO (NATIVE OR DRAM) ->32 | -> FT601 + // | \-----------------------------------------/ + // /--------------------------\ 3rd | + // FT601 -> | 34-> Loopback FIFO ->34 | ->--/ + // \--------------------------/ | + // | + // /--------------------------\ 4th | + // COMMAND -> | 34-> Command FIFO ->34 | ->--/ + // \--------------------------/ + // + + // ---------------------------------------------------------- + // LOOPBACK FIFO: + // ---------------------------------------------------------- + wire [33:0] _loop_dout; + wire _loop_valid; + wire _loop_rd_en; + fifo_34_34 i_fifo_loop_tx( + .clk ( clk ), + .srst ( rst ), + .rd_en ( _loop_rd_en ), + .dout ( _loop_dout ), + .din ( {dcom.com_dout[11:10], dcom.com_dout[63:32]} ), + .wr_en ( _loop_rx_wren ), + .full ( ), + .almost_full ( ), + .empty ( ), + .valid ( _loop_valid ) + ); + + // ---------------------------------------------------------- + // COMMAND FIFO: + // ---------------------------------------------------------- + wire [33:0] _cmd_tx_dout; + wire _cmd_tx_valid; + wire _cmd_tx_rd_en; + wire _cmd_tx_almost_full; + reg _cmd_tx_wr_en; + reg [33:0] _cmd_tx_din; + fifo_34_34 i_fifo_cmd_tx( + .clk ( clk ), + .srst ( rst ), + .rd_en ( _cmd_tx_rd_en ), + .dout ( _cmd_tx_dout ), + .din ( _cmd_tx_din ), + .wr_en ( _cmd_tx_wr_en ), + .full ( ), + .almost_full ( _cmd_tx_almost_full ), + .empty ( ), + .valid ( _cmd_tx_valid ) + ); + + // ---------------------------------------------------------- + // MULTIPLEXER + // ---------------------------------------------------------- + pcileech_mux i_pcileech_mux( + .clk ( clk ), + .rst ( rst ), + // output + .dout ( dcom.com_din ), + .valid ( dcom.com_din_wr_en ), + .rd_en ( dcom.com_din_ready ), + // LOOPBACK: + .p0_din ( _loop_dout[31:0] ), + .p0_tag ( 2'b10 ), + .p0_ctx ( _loop_dout[33:32] ), + .p0_wr_en ( _loop_valid ), + .p0_req_data ( _loop_rd_en ), + // COMMAND: + .p1_din ( _cmd_tx_dout[31:0] ), + .p1_tag ( 2'b11 ), + .p1_ctx ( _cmd_tx_dout[33:32] ), + .p1_wr_en ( _cmd_tx_valid ), + .p1_req_data ( _cmd_tx_rd_en ), + // PCIe CFG + .p2_din ( dcfg.rx_data ), + .p2_tag ( 2'b01 ), + .p2_ctx ( 2'b00 ), + .p2_wr_en ( dcfg.rx_valid ), + .p2_req_data ( dcfg.rx_rd_en ), + // PCIe TLP #1 + .p3_din ( dtlp.rx_data[0] ), + .p3_tag ( 2'b00 ), + .p3_ctx ( {dtlp.rx_first[0], dtlp.rx_last[0]} ), + .p3_wr_en ( dtlp.rx_valid[0] ), + .p3_req_data ( dtlp.rx_rd_en ), + // PCIe TLP #2 + .p4_din ( dtlp.rx_data[1] ), + .p4_tag ( 2'b00 ), + .p4_ctx ( {dtlp.rx_first[1], dtlp.rx_last[1]} ), + .p4_wr_en ( dtlp.rx_valid[1] ), + .p4_req_data ( ), + // PCIe TLP #3 + .p5_din ( dtlp.rx_data[2] ), + .p5_tag ( 2'b00 ), + .p5_ctx ( {dtlp.rx_first[2], dtlp.rx_last[2]} ), + .p5_wr_en ( dtlp.rx_valid[2] ), + .p5_req_data ( dtlp.rx_rd_en ), + // PCIe TLP #4 + .p6_din ( dtlp.rx_data[3] ), + .p6_tag ( 2'b00 ), + .p6_ctx ( {dtlp.rx_first[3], dtlp.rx_last[3]} ), + .p6_wr_en ( dtlp.rx_valid[3] ), + .p6_req_data ( ), + // P7 + .p7_din ( 32'h00000000 ), + .p7_tag ( 2'b11 ), + .p7_ctx ( 2'b00 ), + .p7_wr_en ( 1'b0 ), + .p7_req_data ( ) + ); + + // ------------------------------------------------------------------------ + // COMMAND / CONTROL FIFO: REGISTER FILE: COMMON + // ------------------------------------------------------------------------ + + localparam RWPOS_WAIT_COMPLETE = 18; // WAIT FOR DRP COMPLETION + localparam RWPOS_DRP_RD_EN = 20; + localparam RWPOS_DRP_WR_EN = 21; + localparam RWPOS_GLOBAL_SYSTEM_RESET = 31; + + wire [319:0] ro; + reg [239:0] rw; + + // special non-user accessible registers + reg [79:0] _pcie_core_config = { 4'hf, 1'b1, 1'b1, 1'b0, 1'b0, 8'h02, 16'h0666, 16'h10EE, 16'h0007, 16'h10EE }; + time _cmd_timer_inactivity_base; + reg rwi_drp_rd_en; + reg rwi_drp_wr_en; + reg [15:0] rwi_drp_data; + + // ------------------------------------------------------------------------ + // COMMAND / CONTROL FIFO: REGISTER FILE: READ-ONLY LAYOUT/SPECIFICATION + // ------------------------------------------------------------------------ + + // MAGIC + assign ro[15:0] = 16'hab89; // +000: MAGIC + // SPECIAL + assign ro[19:16] = 0; // +002: SPECIAL + assign ro[20] = rwi_drp_rd_en; // + assign ro[21] = rwi_drp_wr_en; // + assign ro[31:22] = 0; // + // SIZEOF / BYTECOUNT [little-endian] + assign ro[63:32] = $bits(ro) >> 3; // +004: SIZEOF / BYTECOUNT [little-endian] + // ID: VERSION & DEVICE + assign ro[71:64] = PARAM_VERSION_NUMBER_MAJOR; // +008: VERSION MAJOR + assign ro[79:72] = PARAM_VERSION_NUMBER_MINOR; // +009: VERSION MINOR + assign ro[87:80] = PARAM_DEVICE_ID; // +00A: DEVICE ID + assign ro[127:88] = 0; // +00B: SLACK + // UPTIME (tickcount64*100MHz) + assign ro[191:128] = tickcount64; // +010: UPTIME (tickcount64*100MHz) + // INACTIVITY TIMER + assign ro[255:192] = _cmd_timer_inactivity_base; // +018: INACTIVITY TIMER + // PCIe DRP + assign ro[271:256] = rwi_drp_data; // +020: DRP: pcie_drp_do + // PCIe + assign ro[272] = pcie_present; // +022: PCIe PRSNT# + assign ro[273] = pcie_perst_n; // PCIe PERST# + assign ro[287:274] = 0; // SLACK + // CUSTOM_VALUE + assign ro[319:288] = PARAM_CUSTOM_VALUE; // +024: CUSTOM VALUE + // +028 + + // ------------------------------------------------------------------------ + // INITIALIZATION/RESET BLOCK _AND_ + // COMMAND / CONTROL FIFO: REGISTER FILE: READ-WRITE LAYOUT/SPECIFICATION + // ------------------------------------------------------------------------ + + task pcileech_fifo_ctl_initialvalues; // task is non automatic + begin + _cmd_tx_wr_en <= 1'b0; + + // MAGIC + rw[15:0] <= 16'hefcd; // +000: MAGIC + // SPECIAL + rw[16] <= 0; // +002: enable inactivity timer + rw[17] <= 0; // enable send count + rw[18] <= 1; // WAIT FOR PCIe DRP RD/WR COMPLETION BEFORE ACCEPT NEW FIFO READ/WRITES + rw[19] <= 0; // SLACK + rw[20] <= 0; // DRP RD EN + rw[21] <= 0; // DRP WR EN + rw[30:22] <= 0; // RESERVED FUTURE + rw[31] <= 0; // global system reset (GSR) via STARTUPE2 primitive + // SIZEOF / BYTECOUNT [little-endian] + rw[63:32] <= $bits(rw) >> 3; // +004: bytecount [little endian] + // CMD INACTIVITY TIMER TRIGGER VALUE + rw[95:64] <= 0; // +008: cmd_inactivity_timer (ticks) [little-endian] + // CMD SEND COUNT + rw[127:96] <= 0; // +00C: cmd_send_count [little-endian] + // PCIE INITIAL CONFIG (SPECIAL BITSTREAM) + // NB! "initial" CLK0 values may also be changed in: '_pcie_core_config = {...};' [important on PCIeScreamer]. + rw[143:128] <= 16'h10EE; // +010: CFG_SUBSYS_VEND_ID (NOT IMPLEMENTED) + rw[159:144] <= 16'h0007; // +012: CFG_SUBSYS_ID (NOT IMPLEMENTED) + rw[175:160] <= 16'h10EE; // +014: CFG_VEND_ID (NOT IMPLEMENTED) + rw[191:176] <= 16'h0666; // +016: CFG_DEV_ID (NOT IMPLEMENTED) + rw[199:192] <= 8'h02; // +018: CFG_REV_ID (NOT IMPLEMENTED) + rw[200] <= 1'b1; // +019: PCIE CORE RESET + rw[201] <= 1'b0; // PCIE SUBSYSTEM RESET + rw[202] <= 1'b1; // CFGTLP PROCESSING ENABLE + rw[203] <= 1'b0; // CFGTLP ZERO DATA + rw[204] <= 1'b1; // CFGTLP FILTER TLP FROM USER + rw[205] <= 1'b1; // PCIE BAR PIO ON-BOARD PROCESSING ENABLE + rw[206] <= 1'b1; // CFGTLP PCIE WRITE ENABLE + rw[207] <= 1'b0; // TLP FILTER FROM USER: EXCEPT: Cpl,CplD and CfgRd/CfgWr (handled by rw[204]) + // PCIe DRP, PRSNT#, PERST# + rw[208+:16] <= 0; // +01A: DRP: pcie_drp_di + rw[224+:9] <= 0; // +01C: DRP: pcie_drp_addr + rw[233+:7] <= 0; // SLACK + // 01E - + + end + endtask + + wire _cmd_timer_inactivity_enable = rw[16]; + wire [31:0] _cmd_timer_inactivity_ticks = rw[95:64]; + wire [15:0] _cmd_send_count_dword = rw[63:32]; + wire _cmd_send_count_enable = rw[17] & (_cmd_send_count_dword != 16'h0000); + + always @ ( posedge clk ) + _pcie_core_config <= rw[207:128]; + assign dpcie.pcie_rst_core = _pcie_core_config[72]; + assign dpcie.pcie_rst_subsys = _pcie_core_config[73]; + assign dshadow2fifo.cfgtlp_en = _pcie_core_config[74]; + assign dshadow2fifo.cfgtlp_zero = _pcie_core_config[75]; + assign dshadow2fifo.cfgtlp_filter = _pcie_core_config[76]; + assign dshadow2fifo.bar_en = _pcie_core_config[77]; + assign dshadow2fifo.cfgtlp_wren = _pcie_core_config[78]; + assign dshadow2fifo.alltlp_filter = _pcie_core_config[79]; + assign dpcie.drp_en = rw[RWPOS_DRP_WR_EN] | rw[RWPOS_DRP_RD_EN]; + assign dpcie.drp_we = rw[RWPOS_DRP_WR_EN]; + assign dpcie.drp_addr = rw[224+:9]; + assign dpcie.drp_di = rw[208+:16]; + + // ------------------------------------------------------------------------ + // COMMAND / CONTROL FIFO: STATE MACHINE / LOGIC FOR READ/WRITE AND OTHER HOUSEKEEPING TASKS + // ------------------------------------------------------------------------ + + wire [63:0] cmd_rx_dout; + wire cmd_rx_valid; + wire cmd_rx_rd_en_drp = rwi_drp_rd_en | rwi_drp_wr_en | rw[RWPOS_DRP_RD_EN] | rw[RWPOS_DRP_WR_EN]; + wire cmd_rx_rd_en = tickcount64[1] & ( ~rw[RWPOS_WAIT_COMPLETE] | ~cmd_rx_rd_en_drp); + + fifo_64_64_clk1_fifocmd i_fifo_cmd_rx( + .clk ( clk ), + .srst ( rst ), + .rd_en ( cmd_rx_rd_en ), + .dout ( cmd_rx_dout ), + .din ( dcom.com_dout ), + .wr_en ( _cmd_rx_wren ), + .full ( ), + .empty ( ), + .valid ( cmd_rx_valid ) + ); + + integer i_write; + wire [15:0] in_cmd_address_byte = cmd_rx_dout[31:16]; + wire [17:0] in_cmd_address_bit = {in_cmd_address_byte[14:0], 3'b000}; + wire [15:0] in_cmd_value = {cmd_rx_dout[48+:8], cmd_rx_dout[56+:8]}; + wire [15:0] in_cmd_mask = {cmd_rx_dout[32+:8], cmd_rx_dout[40+:8]}; + wire f_rw = in_cmd_address_byte[15]; + wire f_shadowcfgspace = in_cmd_address_byte[14]; + wire [15:0] in_cmd_data_in = (in_cmd_address_bit < (f_rw ? $bits(rw) : $bits(ro))) ? (f_rw ? rw[in_cmd_address_bit+:16] : ro[in_cmd_address_bit+:16]) : 16'h0000; + wire in_cmd_read = cmd_rx_valid & cmd_rx_dout[12] & ~f_shadowcfgspace; + wire in_cmd_write = cmd_rx_valid & cmd_rx_dout[13] & ~f_shadowcfgspace & f_rw; + assign dshadow2fifo.rx_rden = cmd_rx_valid & cmd_rx_dout[12] & f_shadowcfgspace; + assign dshadow2fifo.rx_wren = cmd_rx_valid & cmd_rx_dout[13] & f_shadowcfgspace & f_rw; + assign dshadow2fifo.rx_be = {(in_cmd_mask[7:0] > 0 ? ~in_cmd_address_byte[1] : 1'b0), (in_cmd_mask[15:8] > 0 ? ~in_cmd_address_byte[1] : 1'b0), (in_cmd_mask[7:0] > 0 ? in_cmd_address_byte[1] : 1'b0), (in_cmd_mask[15:8] > 0 ? in_cmd_address_byte[1] : 1'b0)}; + assign dshadow2fifo.rx_addr = in_cmd_address_byte[11:2]; + assign dshadow2fifo.rx_addr_lo = in_cmd_address_byte[1]; + assign dshadow2fifo.rx_data = {in_cmd_value[7:0], in_cmd_value[15:8], in_cmd_value[7:0], in_cmd_value[15:8]}; + + initial pcileech_fifo_ctl_initialvalues(); + + always @ ( posedge clk ) + if ( rst ) begin + pcileech_fifo_ctl_initialvalues(); + end else begin + if (dna_match) begin + // SHADOW CONFIG SPACE RESPONSE + if ( dshadow2fifo.tx_valid ) + begin + _cmd_tx_wr_en <= 1'b1; + _cmd_tx_din[31:16] <= {4'b1100, dshadow2fifo.tx_addr, dshadow2fifo.tx_addr_lo, 1'b0}; + _cmd_tx_din[15:0] <= dshadow2fifo.tx_addr_lo ? dshadow2fifo.tx_data[15:0] : dshadow2fifo.tx_data[31:16]; + end + // READ config + else if ( in_cmd_read ) + begin + _cmd_tx_wr_en <= 1'b1; + _cmd_tx_din[31:16] <= in_cmd_address_byte; + _cmd_tx_din[15:0] <= {in_cmd_data_in[7:0], in_cmd_data_in[15:8]}; + end + // SEND COUNT ACTION + else if ( ~_cmd_tx_almost_full & ~in_cmd_write & _cmd_send_count_enable ) + begin + _cmd_tx_wr_en <= 1'b1; + _cmd_tx_din[31:16] <= 16'hfffe; + _cmd_tx_din[15:0] <= _cmd_send_count_dword; + rw[63:32] <= _cmd_send_count_dword - 1; + end + // INACTIVITY TIMER ACTION + else if ( ~_cmd_tx_almost_full & ~in_cmd_write & _cmd_timer_inactivity_enable & (_cmd_timer_inactivity_ticks + _cmd_timer_inactivity_base < tickcount64) ) + begin + _cmd_tx_wr_en <= 1'b1; + _cmd_tx_din[31:16] <= 16'hffff; + _cmd_tx_din[15:0] <= 16'hcede; + rw[16] <= 1'b0; + end + else + _cmd_tx_wr_en <= 1'b0; + + // WRITE config + if ( tickcount64 < 8 ) + pcileech_fifo_ctl_initialvalues(); + else if ( in_cmd_write ) + for ( i_write = 0; i_write < 16; i_write = i_write + 1 ) + begin + if ( in_cmd_mask[i_write] ) + rw[in_cmd_address_bit+i_write] <= in_cmd_value[i_write]; + end + + // UPDATE INACTIVITY TIMER BASE + if ( dcom.com_din_wr_en | ~dcom.com_din_ready ) + _cmd_timer_inactivity_base <= tickcount64; + + // DRP READ/WRITE + if ( dpcie.drp_rdy ) + begin + rwi_drp_rd_en <= 1'b0; + rwi_drp_wr_en <= 1'b0; + rwi_drp_data <= dpcie.drp_do; + end + else if ( rw[RWPOS_DRP_RD_EN] | rw[RWPOS_DRP_WR_EN] ) + begin + rw[RWPOS_DRP_RD_EN] <= 1'b0; + rw[RWPOS_DRP_WR_EN] <= 1'b0; + rwi_drp_rd_en <= rwi_drp_rd_en | rw[RWPOS_DRP_RD_EN]; + rwi_drp_wr_en <= rwi_drp_wr_en | rw[RWPOS_DRP_WR_EN]; + end + + end + end + + // ---------------------------------------------------- + // GLOBAL SYSTEM RESET: ( provided via STARTUPE2 primitive ) + // ---------------------------------------------------- +`ifdef ENABLE_STARTUPE2 + + STARTUPE2 #( + .PROG_USR ( "FALSE" ), + .SIM_CCLK_FREQ ( 0.0 ) + ) i_STARTUPE2 ( + .CFGCLK ( ), // -> + .CFGMCLK ( ), // -> + .EOS ( ), // -> + .PREQ ( ), // -> + .CLK ( clk ), // <- + .GSR ( rw[RWPOS_GLOBAL_SYSTEM_RESET] | rst_cfg_reload ), // <- GLOBAL SYSTEM RESET + .GTS ( 1'b0 ), // <- + .KEYCLEARB ( 1'b0 ), // <- + .PACK ( 1'b0 ), // <- + .USRCCLKO ( 1'b0 ), // <- + .USRCCLKTS ( 1'b0 ), // <- + .USRDONEO ( 1'b1 ), // <- + .USRDONETS ( 1'b1 ) // <- + ); +`endif /* ENABLE_STARTUPE2 */ + +endmodule + + +module dna_check( + input clk, + input [56:0] expected_dna, + output reg match +); + + reg running; + reg [6:0] current_bit; // 0 - 63 + wire expected_dna_bit = expected_dna[56 - current_bit]; + wire dna_bit; + + reg dna_shift; + reg dna_read; + + reg first; + + initial begin + + match <= 0; + dna_shift <= 0; + dna_read <= 0; + current_bit <= 0; + first <= 1; + running <= 1; + end + + DNA_PORT #( + .SIM_DNA_VALUE (57'h0032acc112e1085c) + ) dna ( + .DOUT(dna_bit), + .CLK(clk), + .DIN(0), // Rollover + .READ(dna_read), + .SHIFT(dna_shift) + ); + + always @(posedge clk) begin + if (running) begin + if (~dna_shift) begin // Initial case + if (first) begin + dna_read <= 1; + first <= 0; + end else begin + dna_read <= 0; + dna_shift <= 1; + end + end + + if (~dna_read & dna_shift) begin + current_bit <= current_bit + 1; + if(dna_bit == expected_dna_bit) begin + if(current_bit == 56) begin + match <= 1; + running <= 0; + end + end else begin + running <= 0; + dna_shift <=0; + match <= 0; + end + end + end + end + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_ft601.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_ft601.sv new file mode 100644 index 0000000000000000000000000000000000000000..8f5c31971c6dea2ff2fecd51e907b4930b2848d5 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_ft601.sv @@ -0,0 +1,181 @@ +// +// PCILeech FPGA. +// +// FT601 / FT245 controller module (v4). +// +// (c) Ulf Frisk, 2017-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps + +module pcileech_ft601( + input clk, + input rst, + // TO/FROM PADS + output [3:0] FT601_BE, + inout [31:0] FT601_DATA, + input FT601_RXF_N, + input FT601_TXE_N, + output bit FT601_OE_N, + output bit FT601_RD_N, + output bit FT601_WR_N, + output bit FT601_SIWU_N, + // TO/FROM FIFO + output bit [31:0] dout, + output bit dout_valid, + input [31:0] din, + input din_wr_en, + output din_req_data + ); + + initial begin + FT601_OE_N <= 1'b1; + FT601_RD_N <= 1'b1; + FT601_WR_N <= 1'b1; + FT601_SIWU_N <= 1'b1; + dout_valid <= 1'b0; + dout <= 32'h00000000; + end + + `define S_FT601_IDLE 4'h0 + `define S_FT601_RX_WAIT1 4'h2 + `define S_FT601_RX_WAIT2 4'h3 + `define S_FT601_RX_WAIT3 4'h4 + `define S_FT601_RX_ACTIVE 4'h5 + `define S_FT601_RX_COOLDOWN1 4'h6 + `define S_FT601_RX_COOLDOWN2 4'h7 + `define S_FT601_TX_WAIT1 4'h8 + `define S_FT601_TX_WAIT2 4'h9 + `define S_FT601_TX_ACTIVE 4'ha + `define S_FT601_TX_COOLDOWN1 4'hb + `define S_FT601_TX_COOLDOWN2 4'hc + + bit [31:0] FT601_DATA_OUT[5]; + (* KEEP = "TRUE" *) wire FWD; + (* KEEP = "TRUE" *) bit OE = 1'b1; + (* KEEP = "TRUE" *) bit [3:0] data_cooldown_count = 0; + (* KEEP = "TRUE" *) bit [2:0] data_queue_count = 0; + (* KEEP = "TRUE" *) bit [3:0] state = `S_FT601_IDLE; + + + + // ------------------------------------------------------------------------- + // FT245 RX / DATA INPUT BELOW: + // ------------------------------------------------------------------------- + + always @ ( posedge clk ) + begin + dout_valid <= !rst && !FT601_RXF_N && (state == `S_FT601_RX_ACTIVE); + dout[7:0] <= FT601_DATA[31:24]; + dout[15:8] <= FT601_DATA[23:16]; + dout[23:16] <= FT601_DATA[15:8]; + dout[31:24] <= FT601_DATA[7:0]; + end + + + + // ------------------------------------------------------------------------- + // FT245 TX / DATA OUTPUT BELOW: + // ------------------------------------------------------------------------- + + assign FT601_BE = OE ? 4'b1111 : 4'bzzzz; + assign FT601_DATA = OE ? {FT601_DATA_OUT[0][7:0], FT601_DATA_OUT[0][15:8], FT601_DATA_OUT[0][23:16], FT601_DATA_OUT[0][31:24]} : 32'hzzzzzzzz; + assign din_req_data = !rst && (data_queue_count == 2) || (data_queue_count == 3); + assign FWD = !rst && !FT601_TXE_N && (data_queue_count != 0) && (state == `S_FT601_TX_ACTIVE); + + always @ ( posedge clk ) begin + if ( rst || (data_cooldown_count == 4'hf) ) begin + data_cooldown_count <= 0; + data_queue_count <= 5; + FT601_DATA_OUT[0] <= 32'h66665555; + FT601_DATA_OUT[1] <= 32'h66665555; + FT601_DATA_OUT[2] <= 32'h66665555; + FT601_DATA_OUT[3] <= 32'h66665555; + FT601_DATA_OUT[4] <= 32'h66665555; + end + else begin + data_cooldown_count <= (data_queue_count == 0) ? (data_cooldown_count + 1) : 0; + data_queue_count <= data_queue_count + (din_wr_en ? 3'b001 : 3'b000) - (FWD ? 3'b001 : 3'b000); + if ( FWD ) begin + if ( data_queue_count > 1 ) begin + FT601_DATA_OUT[0] <= FT601_DATA_OUT[1]; + end + if ( data_queue_count > 2 ) begin + FT601_DATA_OUT[1] <= FT601_DATA_OUT[2]; + end + if ( data_queue_count > 3 ) begin + FT601_DATA_OUT[2] <= FT601_DATA_OUT[3]; + end + if ( data_queue_count > 4 ) begin + FT601_DATA_OUT[3] <= FT601_DATA_OUT[4]; + end + end + if ( din_wr_en ) begin + FT601_DATA_OUT[data_queue_count - (FWD ? 3'b001 : 3'b000)] <= din; + end + end + end + + + + // ------------------------------------------------------------------------- + // FT245 main control below: + // ------------------------------------------------------------------------- + + always @ ( posedge clk ) + begin + OE <= (rst || FT601_RXF_N || ((state != `S_FT601_RX_ACTIVE) && (state != `S_FT601_RX_WAIT3) && (state != `S_FT601_RX_WAIT2) && (state != `S_FT601_RX_COOLDOWN1) && (state != `S_FT601_RX_COOLDOWN2))); + FT601_OE_N <= (rst || FT601_RXF_N || ((state != `S_FT601_RX_ACTIVE) && (state != `S_FT601_RX_WAIT3) && (state != `S_FT601_RX_WAIT2))); + FT601_RD_N <= (rst || FT601_RXF_N || ((state != `S_FT601_RX_ACTIVE) && (state != `S_FT601_RX_WAIT3))); + FT601_WR_N <= !(!rst && !FT601_TXE_N && ((state == `S_FT601_TX_WAIT2) || ((state == `S_FT601_TX_ACTIVE) && (din_wr_en || (data_queue_count > 1))))); + end + + always @ ( posedge clk ) + if ( rst ) + begin + state <= `S_FT601_IDLE; + end + else case ( state ) + // ---------------------------------------------------------------- + // IDLE STATE: + // RX are prioritized above TX in case both options are available. + // ---------------------------------------------------------------- + `S_FT601_IDLE: + if ( !FT601_RXF_N ) + state <= `S_FT601_RX_WAIT1; + else if ( !FT601_TXE_N && (data_queue_count > 0) ) + state <= `S_FT601_TX_WAIT1; + // ---------------------------------------------------------------- + // RX DATA FROM THE FT601: + // The receiver FIFO is assumed to always be non-full. + // If receiver FIFO is full data will still be received but lost. + // ---------------------------------------------------------------- + `S_FT601_RX_WAIT1: + state <= FT601_RXF_N ? `S_FT601_RX_COOLDOWN1 : `S_FT601_RX_WAIT2; + `S_FT601_RX_WAIT2: + state <= FT601_RXF_N ? `S_FT601_RX_COOLDOWN1 : `S_FT601_RX_WAIT3; + `S_FT601_RX_WAIT3: + state <= FT601_RXF_N ? `S_FT601_RX_COOLDOWN1 : `S_FT601_RX_ACTIVE; + `S_FT601_RX_ACTIVE: + state <= FT601_RXF_N ? `S_FT601_RX_COOLDOWN1 : `S_FT601_RX_ACTIVE; + `S_FT601_RX_COOLDOWN1: + state <= `S_FT601_RX_COOLDOWN2; + `S_FT601_RX_COOLDOWN2: + state <= `S_FT601_IDLE; + // ---------------------------------------------------------------- + // TX DATA TO THE FT601: + // ---------------------------------------------------------------- + `S_FT601_TX_WAIT1: + state <= FT601_TXE_N ? `S_FT601_TX_COOLDOWN1 : `S_FT601_TX_WAIT2; + `S_FT601_TX_WAIT2: + state <= FT601_TXE_N ? `S_FT601_TX_COOLDOWN1 : `S_FT601_TX_ACTIVE; + `S_FT601_TX_ACTIVE: + state <= (FT601_TXE_N || (!din_wr_en && (data_queue_count <= 1))) ? `S_FT601_TX_COOLDOWN1 : `S_FT601_TX_ACTIVE; + `S_FT601_TX_COOLDOWN1: + state <= `S_FT601_TX_COOLDOWN2; + `S_FT601_TX_COOLDOWN2: + state <= `S_FT601_IDLE; + endcase + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_header.svh b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_header.svh new file mode 100644 index 0000000000000000000000000000000000000000..d2127eeccd47351896a597759ba2eff199b83af4 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_header.svh @@ -0,0 +1,336 @@ +// +// PCILeech FPGA. +// +// SystemVerilog Header File for PCILeech FPGA projects. +// +// (c) Ulf Frisk, 2019-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`ifndef _pcileech_header_svh_ +`define _pcileech_header_svh_ + +`define _bs16(v) {{v}[7:0], {v}[15:8]} +`define _bs32(v) {{v}[7:0], {v}[15:8], {v}[23:16], {v}[31:24]} + +// ------------------------------------------------------------------------ +// Interface connecting COM to FIFO module. +// ------------------------------------------------------------------------ +interface IfComToFifo; + wire [63:0] com_dout; + wire com_dout_valid; + wire [255:0] com_din; + wire com_din_wr_en; + wire com_din_ready; + + modport mp_com ( + output com_dout, com_dout_valid, com_din_ready, + input com_din, com_din_wr_en + ); + + modport mp_fifo ( + input com_dout, com_dout_valid, com_din_ready, + output com_din, com_din_wr_en + ); +endinterface + +// ------------------------------------------------------------------------ +// Interface connecting PCIe to PCIe CFG module. +// ------------------------------------------------------------------------ +interface IfPCIeSignals; + // ------------------------------------------------------------------------ + // VALUES FROM PCIe TO module. + // ------------------------------------------------------------------------ + wire [7:0] cfg_bus_number; + wire [4:0] cfg_device_number; + wire [2:0] cfg_function_number; + + wire [15:0] cfg_command; + wire [31:0] cfg_mgmt_do; + wire cfg_mgmt_rd_wr_done; + + wire [2:0] pl_initial_link_width; + wire pl_phy_lnk_up; + wire [1:0] pl_lane_reversal_mode; + wire pl_link_gen2_cap; + wire pl_link_partner_gen2_supported; + wire pl_link_upcfg_cap; + wire pl_sel_lnk_rate; + wire [1:0] pl_sel_lnk_width; + wire [5:0] pl_ltssm_state; + wire [1:0] pl_rx_pm_state; + wire [2:0] pl_tx_pm_state; + wire pl_directed_change_done; + wire pl_received_hot_rst; + + wire cfg_aer_rooterr_corr_err_received; + wire cfg_aer_rooterr_corr_err_reporting_en; + wire cfg_aer_rooterr_fatal_err_received; + wire cfg_aer_rooterr_fatal_err_reporting_en; + wire cfg_aer_rooterr_non_fatal_err_received; + wire cfg_aer_rooterr_non_fatal_err_reporting_en; + wire cfg_bridge_serr_en; + wire [15:0] cfg_dcommand; + wire [15:0] cfg_dcommand2; + wire [15:0] cfg_dstatus; + wire [15:0] cfg_lcommand; + wire [15:0] cfg_lstatus; + wire [2:0] cfg_pcie_link_state; + wire cfg_pmcsr_pme_en; + wire cfg_pmcsr_pme_status; + wire [1:0] cfg_pmcsr_powerstate; + wire cfg_received_func_lvl_rst; + wire cfg_root_control_pme_int_en; + wire cfg_root_control_syserr_corr_err_en; + wire cfg_root_control_syserr_fatal_err_en; + wire cfg_root_control_syserr_non_fatal_err_en; + wire cfg_slot_control_electromech_il_ctl_pulse; + wire [15:0] cfg_status; + wire cfg_to_turnoff; + wire [5:0] tx_buf_av; + wire tx_cfg_req; + wire tx_err_drop; + wire [6:0] cfg_vc_tcvc_map; + + wire [2:0] cfg_interrupt_mmenable; + wire cfg_interrupt_msienable; + wire cfg_interrupt_msixenable; + wire cfg_interrupt_msixfm; + wire cfg_interrupt_rdy; + wire [7:0] cfg_interrupt_do; + + // ------------------------------------------------------------------------ + // VALUES FROM module TO PCIe. + // ------------------------------------------------------------------------ + + wire cfg_mgmt_rd_en; + wire cfg_mgmt_wr_en; + + wire [63:0] cfg_dsn; + wire [31:0] cfg_mgmt_di; + wire [9:0] cfg_mgmt_dwaddr; + wire [3:0] cfg_mgmt_byte_en; + wire cfg_mgmt_wr_readonly; + wire cfg_mgmt_wr_rw1c_as_rw; + + wire [1:0] pl_directed_link_change; + wire [1:0] pl_directed_link_width; + wire pl_directed_link_auton; + wire pl_directed_link_speed; + wire pl_upstream_prefer_deemph; + wire pl_transmit_hot_rst; + wire pl_downstream_deemph_source; + + wire [7:0] cfg_interrupt_di; + wire [4:0] cfg_pciecap_interrupt_msgnum; + wire cfg_interrupt_assert; + wire cfg_interrupt; + wire cfg_interrupt_stat; + + wire [1:0] cfg_pm_force_state; + wire cfg_pm_force_state_en; + wire cfg_pm_halt_aspm_l0s; + wire cfg_pm_halt_aspm_l1; + wire cfg_pm_send_pme_to; + wire cfg_pm_wake; + wire cfg_trn_pending; + wire cfg_turnoff_ok; + wire rx_np_ok; + wire rx_np_req; + wire tx_cfg_gnt; + + modport mpm ( + input cfg_bus_number, cfg_device_number, cfg_function_number, cfg_command, cfg_mgmt_do, cfg_mgmt_rd_wr_done, + pl_initial_link_width, pl_phy_lnk_up, pl_lane_reversal_mode, pl_link_gen2_cap, pl_link_partner_gen2_supported, + pl_link_upcfg_cap, pl_sel_lnk_rate, pl_sel_lnk_width, pl_ltssm_state, pl_rx_pm_state, + pl_tx_pm_state, pl_directed_change_done, pl_received_hot_rst, + cfg_aer_rooterr_corr_err_received, cfg_aer_rooterr_corr_err_reporting_en, cfg_aer_rooterr_fatal_err_received, cfg_aer_rooterr_fatal_err_reporting_en, + cfg_aer_rooterr_non_fatal_err_received, cfg_aer_rooterr_non_fatal_err_reporting_en, cfg_bridge_serr_en, cfg_dcommand, cfg_dcommand2, cfg_dstatus, + cfg_lcommand, cfg_lstatus, cfg_pcie_link_state, cfg_pmcsr_pme_en, cfg_pmcsr_pme_status, cfg_pmcsr_powerstate, cfg_received_func_lvl_rst, cfg_root_control_pme_int_en, + cfg_root_control_syserr_corr_err_en, cfg_root_control_syserr_fatal_err_en, cfg_root_control_syserr_non_fatal_err_en, cfg_slot_control_electromech_il_ctl_pulse, + cfg_status, cfg_to_turnoff, tx_buf_av, tx_cfg_req, tx_err_drop, cfg_vc_tcvc_map, + cfg_interrupt_mmenable, cfg_interrupt_msienable, cfg_interrupt_msixenable, cfg_interrupt_msixfm, cfg_interrupt_rdy, cfg_interrupt_do, + + output cfg_mgmt_rd_en, cfg_mgmt_wr_en, cfg_dsn, cfg_mgmt_di, cfg_mgmt_dwaddr, cfg_mgmt_wr_readonly, cfg_mgmt_wr_rw1c_as_rw, cfg_mgmt_byte_en, pl_directed_link_change, pl_directed_link_width, pl_directed_link_auton, + pl_directed_link_speed, pl_upstream_prefer_deemph, pl_transmit_hot_rst, pl_downstream_deemph_source, + cfg_interrupt_di, cfg_pciecap_interrupt_msgnum, cfg_interrupt_assert, cfg_interrupt, cfg_interrupt_stat, cfg_pm_force_state, cfg_pm_force_state_en, cfg_pm_halt_aspm_l0s, + cfg_pm_halt_aspm_l1, cfg_pm_send_pme_to, cfg_pm_wake, cfg_trn_pending, cfg_turnoff_ok, rx_np_ok, rx_np_req, tx_cfg_gnt + ); +endinterface + +// ------------------------------------------------------------------------ +// Interface PCIe 128-bit RX stream +// ------------------------------------------------------------------------ + +interface IfAXIS128; + wire [127:0] tdata; + wire [3:0] tkeepdw; + wire tvalid; + wire tlast; + wire [8:0] tuser; // [0] = first + // [1] = last + // [8:2] = BAR, 2=BAR0, 3=BAR1, .. 7=BAR5, 8=EXPROM + + wire tready; + wire has_data; + + modport source( + input tready, + output tdata, tkeepdw, tvalid, tlast, tuser, has_data + ); + + modport sink( + output tready, + input tdata, tkeepdw, tvalid, tlast, tuser, has_data + ); + + modport source_lite( + output tdata, tkeepdw, tvalid, tlast, tuser + ); + + modport sink_lite( + input tdata, tkeepdw, tvalid, tlast, tuser + ); +endinterface + +// ------------------------------------------------------------------------ +// Interface connecting PCIe CFG to FIFO +// ------------------------------------------------------------------------ +interface IfPCIeFifoCfg; + wire [63:0] tx_data; + wire tx_valid; + wire [31:0] rx_data; + wire rx_valid; + wire rx_rd_en; + + modport mp_fifo ( + output tx_data, tx_valid, rx_rd_en, + input rx_data, rx_valid + ); + + modport mp_pcie ( + input tx_data, tx_valid, rx_rd_en, + output rx_data, rx_valid + ); +endinterface + +// ------------------------------------------------------------------------ +// Interface connecting PCIe TLP to FIFO +// ------------------------------------------------------------------------ +interface IfPCIeFifoTlp; + wire [31:0] tx_data; + wire tx_last; + wire tx_valid; + wire [31:0] rx_data[4]; + wire rx_first[4]; + wire rx_last[4]; + wire rx_valid[4]; + wire rx_rd_en; + + modport mp_fifo ( + output tx_data, tx_last, tx_valid, rx_rd_en, + input rx_data, rx_first, rx_last, rx_valid + ); + + modport mp_pcie ( + input tx_data, tx_last, tx_valid, rx_rd_en, + output rx_data, rx_first, rx_last, rx_valid + ); +endinterface + +// ------------------------------------------------------------------------ +// Interface connecting PCIe CORE config to FIFO +// ------------------------------------------------------------------------ +interface IfPCIeFifoCore; + // PCIe optional config + wire pcie_rst_core; + wire pcie_rst_subsys; + // DRP config + wire drp_rdy; + wire [15:0] drp_do; + wire drp_en; + wire drp_we; + wire [8:0] drp_addr; + wire [15:0] drp_di; + + modport mp_fifo ( + input drp_rdy, drp_do, + output pcie_rst_core, pcie_rst_subsys, drp_en, drp_we, drp_addr, drp_di + ); + + modport mp_pcie ( + input pcie_rst_core, pcie_rst_subsys, drp_en, drp_we, drp_addr, drp_di, + output drp_rdy, drp_do + ); +endinterface + +interface IfShadow2Fifo; + // SHADOW CONFIGURATION SPACE TO FIFO + wire rx_rden; + wire rx_wren; + wire [3:0] rx_be; + wire [31:0] rx_data; + wire [9:0] rx_addr; + wire rx_addr_lo; + wire tx_valid; + wire [31:0] tx_data; + wire [9:0] tx_addr; + wire tx_addr_lo; + wire cfgtlp_wren; + wire cfgtlp_zero; + wire cfgtlp_en; + wire cfgtlp_filter; + wire alltlp_filter; + wire bar_en; + + modport fifo ( + output cfgtlp_wren, cfgtlp_zero, rx_rden, rx_wren, rx_be, rx_addr, rx_addr_lo, rx_data, cfgtlp_en, cfgtlp_filter, alltlp_filter, bar_en, + input tx_valid, tx_addr, tx_addr_lo, tx_data + ); + + modport shadow ( + input cfgtlp_wren, cfgtlp_zero, rx_rden, rx_wren, rx_be, rx_addr, rx_addr_lo, rx_data, cfgtlp_en, cfgtlp_filter, alltlp_filter, bar_en, + output tx_valid, tx_addr, tx_addr_lo, tx_data + ); +endinterface + +// ------------------------------------------------------------------------ +// Interface PCIe AXI RX / TX +// ------------------------------------------------------------------------ +interface IfPCIeTlpRxTx; + wire [63:0] data; + wire [7:0] keep; + wire last; + wire [21:0] user; + wire valid; + wire ready; + + modport source ( + output data, keep, last, user, valid, + input ready + ); + + modport sink ( + input data, keep, last, user, valid, + output ready + ); +endinterface + +interface IfPCIeTlpRx128; + wire [127:0] data; + wire [21:0] user; + wire valid; + wire ready; + + modport source ( + output data, user, valid, + input ready + ); + + modport sink ( + input data, user, valid, + output ready + ); +endinterface + +`endif diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_mux.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_mux.sv new file mode 100644 index 0000000000000000000000000000000000000000..aee9cc772b06289a53208bb10114f6880542be3f --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_mux.sv @@ -0,0 +1,175 @@ +// +// PCILeech FPGA. +// +// Merge multiple 32-bit words into a 256-bit word consisting of one (1) 32-bit +// status word and seven (7) data words. This is done to enable relatively +// efficient transmission over the FT601 together with some additional info. +// +// (c) Ulf Frisk, 2017-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps + +module pcileech_mux( + input clk, + input rst, + // output + output [255:0] dout, + output valid, + input rd_en, + // port0: input highest priority + input [31:0] p0_din, + input [1:0] p0_tag, + input [1:0] p0_ctx, + input p0_wr_en, + output p0_req_data, + // port1: + input [31:0] p1_din, + input [1:0] p1_tag, + input [1:0] p1_ctx, + input p1_wr_en, + output p1_req_data, + // port2: + input [31:0] p2_din, + input [1:0] p2_tag, + input [1:0] p2_ctx, + input p2_wr_en, + output p2_req_data, + // port3: + input [31:0] p3_din, + input [1:0] p3_tag, + input [1:0] p3_ctx, + input p3_wr_en, + output p3_req_data, + // port4: + input [31:0] p4_din, + input [1:0] p4_tag, + input [1:0] p4_ctx, + input p4_wr_en, + output p4_req_data, + // port5: + input [31:0] p5_din, + input [1:0] p5_tag, + input [1:0] p5_ctx, + input p5_wr_en, + output p5_req_data, + // port6: + input [31:0] p6_din, + input [1:0] p6_tag, + input [1:0] p6_ctx, + input p6_wr_en, + output p6_req_data, + // port7: + input [31:0] p7_din, + input [1:0] p7_tag, + input [1:0] p7_ctx, + input p7_wr_en, + output p7_req_data + ); + + // 'en' is delayed 1CLK so it's in synch with inputs. + // output integrity is handled by extra register. + reg en; + always @ ( posedge clk ) + en <= rd_en && !rst; + + assign p0_req_data = rd_en; + assign p1_req_data = rd_en; + assign p2_req_data = rd_en; + assign p3_req_data = rd_en; + assign p4_req_data = rd_en; + assign p5_req_data = rd_en; + assign p6_req_data = rd_en; + assign p7_req_data = rd_en; + + reg [31:0] data_reg[14]; + reg [3:0] ctx_reg[14]; + + wire p8_wr_en; + reg [3:0] idx_base; + wire [3:0] p0_idx = idx_base; + wire [3:0] p1_idx = p0_idx + p0_wr_en; + wire [3:0] p2_idx = p1_idx + p1_wr_en; + wire [3:0] p3_idx = p2_idx + p2_wr_en; + wire [3:0] p4_idx = p3_idx + p3_wr_en; + wire [3:0] p5_idx = p4_idx + p4_wr_en; + wire [3:0] p6_idx = p5_idx + p5_wr_en; + wire [3:0] p7_idx = p6_idx + p6_wr_en; + wire [3:0] p8_idx = p7_idx + p7_wr_en; // idle port + wire [3:0] idx_max = p8_idx + p8_wr_en; // max index + + // P8: INTERNAL "IDLE PORT" + reg [3:0] idle_count; + wire [31:0] p8_din = 32'hffffffff; + wire [1:0] p8_tag = 2'b11; + wire [1:0] p8_ctx = 2'b11; + assign p8_wr_en = en && (idx_base > 0) && (idle_count > 7) && (idx_base == p8_idx); + + + + // output buffer logic, when rd_en is deasserted the output data must be + // buffered not to cause data loss. + reg dout_valid; + wire [255:0] dout_data = { ctx_reg[1], ctx_reg[0], ctx_reg[3], ctx_reg[2], ctx_reg[5], ctx_reg[4], 4'hE, ctx_reg[6], data_reg[0], data_reg[1], data_reg[2], data_reg[3], data_reg[4], data_reg[5], data_reg[6] }; + reg dout_buf_valid; + reg [255:0] dout_buf_data; + assign valid = rd_en && (dout_buf_valid || dout_valid); + assign dout = dout_buf_valid ? dout_buf_data : dout_data; + + + + always @ ( posedge clk ) begin + if( rst ) + begin + idx_base <= 0; + idle_count <= 0; + dout_valid <= 0; + dout_buf_valid <= 0; + end + else + begin + // OUTPUT BUFFER LOGIC: + + if( en ) begin + dout_buf_valid <= 0; + end else if( dout_valid ) begin + dout_buf_data <= dout_data; + dout_buf_valid <= 1; + end + + // OUTPUT VALID: + dout_valid <= en && (idx_max >= 7); + + if( en ) begin + // NEXT INDEX BASE: + idx_base <= idx_max - ((idx_max >= 7) ? 7 : 0); + // IDLE COUNT: + idle_count <= ((idx_base > 0) && (idx_base == p8_idx)) ? (idle_count + 1) : 0; + // DATA/CTX writes into index [0-8]: + if( p0_wr_en ) begin data_reg[p0_idx] <= p0_din; ctx_reg[p0_idx] <= {p0_ctx, p0_tag}; end + if( p1_wr_en ) begin data_reg[p1_idx] <= p1_din; ctx_reg[p1_idx] <= {p1_ctx, p1_tag}; end + if( p2_wr_en ) begin data_reg[p2_idx] <= p2_din; ctx_reg[p2_idx] <= {p2_ctx, p2_tag}; end + if( p3_wr_en ) begin data_reg[p3_idx] <= p3_din; ctx_reg[p3_idx] <= {p3_ctx, p3_tag}; end + if( p4_wr_en ) begin data_reg[p4_idx] <= p4_din; ctx_reg[p4_idx] <= {p4_ctx, p4_tag}; end + if( p5_wr_en ) begin data_reg[p5_idx] <= p5_din; ctx_reg[p5_idx] <= {p5_ctx, p5_tag}; end + if( p6_wr_en ) begin data_reg[p6_idx] <= p6_din; ctx_reg[p6_idx] <= {p6_ctx, p6_tag}; end + if( p7_wr_en ) begin data_reg[p7_idx] <= p7_din; ctx_reg[p7_idx] <= {p7_ctx, p7_tag}; end + if( p8_wr_en ) begin data_reg[p8_idx] <= p8_din; ctx_reg[p8_idx] <= {p8_ctx, p8_tag}; end + end + + if( dout_valid ) begin + // DATA/CTX previous move: + if( idx_base > 0) begin data_reg[0] <= data_reg[7+0]; ctx_reg[0] <= ctx_reg[7+0]; end + if( idx_base > 1) begin data_reg[1] <= data_reg[7+1]; ctx_reg[1] <= ctx_reg[7+1]; end + if( idx_base > 2) begin data_reg[2] <= data_reg[7+2]; ctx_reg[2] <= ctx_reg[7+2]; end + if( idx_base > 3) begin data_reg[3] <= data_reg[7+3]; ctx_reg[3] <= ctx_reg[7+3]; end + if( idx_base > 4) begin data_reg[4] <= data_reg[7+4]; ctx_reg[4] <= ctx_reg[7+4]; end + if( idx_base > 5) begin data_reg[5] <= data_reg[7+5]; ctx_reg[5] <= ctx_reg[7+5]; end + if( idx_base > 6) begin data_reg[6] <= data_reg[7+6]; ctx_reg[6] <= ctx_reg[7+6]; end + end + + + end + end +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_a7.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_a7.sv new file mode 100644 index 0000000000000000000000000000000000000000..2f32604910527a35b43ca229bcde022710c3aa77 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_a7.sv @@ -0,0 +1,356 @@ +// +// PCILeech FPGA. +// +// PCIe module for Artix-7. +// +// (c) Ulf Frisk, 2018-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps +`include "pcileech_header.svh" + +module pcileech_pcie_a7( + input clk_sys, + input rst, + + // PCIe fabric + output [0:0] pcie_tx_p, + output [0:0] pcie_tx_n, + input [0:0] pcie_rx_p, + input [0:0] pcie_rx_n, + input pcie_clk_p, + input pcie_clk_n, + input pcie_perst_n, + + // State and Activity LEDs + output led_state, + + // PCIe <--> FIFOs + IfPCIeFifoCfg.mp_pcie dfifo_cfg, + IfPCIeFifoTlp.mp_pcie dfifo_tlp, + IfPCIeFifoCore.mp_pcie dfifo_pcie, + IfShadow2Fifo.shadow dshadow2fifo + ); + + // ---------------------------------------------------------------------------- + // PCIe DEFINES AND WIRES + // ---------------------------------------------------------------------------- + + IfPCIeSignals ctx(); + IfPCIeTlpRxTx tlp_tx(); + IfPCIeTlpRxTx tlp_rx(); + IfAXIS128 tlps_tx(); + IfAXIS128 tlps_rx(); + + IfAXIS128 tlps_static(); // static tlp transmit from cfg->tlp + wire [15:0] pcie_id; + wire user_lnk_up; + wire int_enable; + + // system interface + wire pcie_clk_c; + wire clk_pcie; + wire rst_pcie_user; + wire rst_subsys = rst || rst_pcie_user || dfifo_pcie.pcie_rst_subsys; + wire rst_pcie = rst || ~pcie_perst_n || dfifo_pcie.pcie_rst_core; + + // Buffer for differential system clock + IBUFDS_GTE2 refclk_ibuf (.O(pcie_clk_c), .ODIV2(), .I(pcie_clk_p), .CEB(1'b0), .IB(pcie_clk_n)); + + // ---------------------------------------------------- + // TickCount64 PCIe REFCLK and LED OUTPUT + // ---------------------------------------------------- + + time tickcount64_pcie_refclk = 0; + always @ ( posedge pcie_clk_c ) + tickcount64_pcie_refclk <= tickcount64_pcie_refclk + 1; + assign led_state = user_lnk_up || tickcount64_pcie_refclk[25]; + + // ---------------------------------------------------------------------------- + // PCIe CFG RX/TX <--> FIFO below + // ---------------------------------------------------------------------------- + wire [31:0] base_address_register; + + pcileech_pcie_cfg_a7 i_pcileech_pcie_cfg_a7( + .rst ( rst_subsys ), + .clk_sys ( clk_sys ), + .clk_pcie ( clk_pcie ), + .dfifo ( dfifo_cfg ), + .ctx ( ctx ), + .tlps_static ( tlps_static.source ), + .int_enable (int_enable), + .pcie_id ( pcie_id ), // -> [15:0] + .base_address_register ( base_address_register ) + ); + + // ---------------------------------------------------------------------------- + // PCIe TLP RX/TX <--> FIFO below + // ---------------------------------------------------------------------------- + + pcileech_tlps128_src64 i_pcileech_tlps128_src64( + .rst ( rst_subsys ), + .clk_pcie ( clk_pcie ), + .tlp_rx ( tlp_rx.sink ), + .tlps_out ( tlps_rx.source_lite ) + ); + + pcileech_pcie_tlp_a7 i_pcileech_pcie_tlp_a7( + .rst ( rst_subsys ), + .clk_pcie ( clk_pcie ), + .clk_sys ( clk_sys ), + .dfifo ( dfifo_tlp ), + .tlps_tx ( tlps_tx.source ), + .tlps_rx ( tlps_rx.sink_lite ), + .tlps_static ( tlps_static.sink ), + .dshadow2fifo ( dshadow2fifo ), + .int_enable ( int_enable ) , + .pcie_id ( pcie_id ), // <- [15:0] + .base_address_register ( base_address_register ) + ); + + pcileech_tlps128_dst64 i_pcileech_tlps128_dst64( + .rst ( rst ), + .clk_pcie ( clk_pcie ), + .tlp_tx ( tlp_tx.source ), + .tlps_in ( tlps_tx.sink ) + ); + + // ---------------------------------------------------------------------------- + // PCIe CORE BELOW + // ---------------------------------------------------------------------------- + + pcie_7x_0 i_pcie_7x_0 ( + // pcie_7x_mgt + .pci_exp_txp ( pcie_tx_p ), // -> + .pci_exp_txn ( pcie_tx_n ), // -> + .pci_exp_rxp ( pcie_rx_p ), // <- + .pci_exp_rxn ( pcie_rx_n ), // <- + .sys_clk ( pcie_clk_c ), // <- + .sys_rst_n ( ~rst_pcie ), // <- + + // s_axis_tx (transmit data) + .s_axis_tx_tdata ( tlp_tx.data ), // <- [63:0] + .s_axis_tx_tkeep ( tlp_tx.keep ), // <- [7:0] + .s_axis_tx_tlast ( tlp_tx.last ), // <- + .s_axis_tx_tready ( tlp_tx.ready ), // -> + .s_axis_tx_tuser ( 4'b0 ), // <- [3:0] + .s_axis_tx_tvalid ( tlp_tx.valid ), // <- + + // s_axis_rx (receive data) + .m_axis_rx_tdata ( tlp_rx.data ), // -> [63:0] + .m_axis_rx_tkeep ( tlp_rx.keep ), // -> [7:0] + .m_axis_rx_tlast ( tlp_rx.last ), // -> + .m_axis_rx_tready ( tlp_rx.ready ), // <- + .m_axis_rx_tuser ( tlp_rx.user ), // -> [21:0] + .m_axis_rx_tvalid ( tlp_rx.valid ), // -> + + // pcie_cfg_mgmt + .cfg_mgmt_dwaddr ( ctx.cfg_mgmt_dwaddr ), // <- [9:0] + .cfg_mgmt_byte_en ( ctx.cfg_mgmt_byte_en ), // <- [3:0] + .cfg_mgmt_do ( ctx.cfg_mgmt_do ), // -> [31:0] + .cfg_mgmt_rd_en ( ctx.cfg_mgmt_rd_en ), // <- + .cfg_mgmt_rd_wr_done ( ctx.cfg_mgmt_rd_wr_done ), // -> + .cfg_mgmt_wr_readonly ( ctx.cfg_mgmt_wr_readonly ), // <- + .cfg_mgmt_wr_rw1c_as_rw ( ctx.cfg_mgmt_wr_rw1c_as_rw ), // <- + .cfg_mgmt_di ( ctx.cfg_mgmt_di ), // <- [31:0] + .cfg_mgmt_wr_en ( ctx.cfg_mgmt_wr_en ), // <- + + // special core config + //.pcie_cfg_vend_id ( dfifo_pcie.pcie_cfg_vend_id ), // <- [15:0] + //.pcie_cfg_dev_id ( dfifo_pcie.pcie_cfg_dev_id ), // <- [15:0] + //.pcie_cfg_rev_id ( dfifo_pcie.pcie_cfg_rev_id ), // <- [7:0] + //.pcie_cfg_subsys_vend_id ( dfifo_pcie.pcie_cfg_subsys_vend_id ), // <- [15:0] + //.pcie_cfg_subsys_id ( dfifo_pcie.pcie_cfg_subsys_id ), // <- [15:0] + + // pcie2_cfg_interrupt + .cfg_interrupt_assert ( ctx.cfg_interrupt_assert ), // <- + .cfg_interrupt ( ctx.cfg_interrupt ), // <- + .cfg_interrupt_mmenable ( ctx.cfg_interrupt_mmenable ), // -> [2:0] + .cfg_interrupt_msienable ( ctx.cfg_interrupt_msienable ), // -> + .cfg_interrupt_msixenable ( ctx.cfg_interrupt_msixenable ), // -> + .cfg_interrupt_msixfm ( ctx.cfg_interrupt_msixfm ), // -> + .cfg_pciecap_interrupt_msgnum ( ctx.cfg_pciecap_interrupt_msgnum ), // <- [4:0] + .cfg_interrupt_rdy ( ctx.cfg_interrupt_rdy ), // -> + .cfg_interrupt_do ( ctx.cfg_interrupt_do ), // -> [7:0] + .cfg_interrupt_stat ( ctx.cfg_interrupt_stat ), // <- + .cfg_interrupt_di ( ctx.cfg_interrupt_di ), // <- [7:0] + + // pcie2_cfg_control + .cfg_ds_bus_number ( ctx.cfg_bus_number ), // <- [7:0] + .cfg_ds_device_number ( ctx.cfg_device_number ), // <- [4:0] + .cfg_ds_function_number ( ctx.cfg_function_number ), // <- [2:0] + .cfg_dsn ( ctx.cfg_dsn ), // <- [63:0] + .cfg_pm_force_state ( ctx.cfg_pm_force_state ), // <- [1:0] + .cfg_pm_force_state_en ( ctx.cfg_pm_force_state_en ), // <- + .cfg_pm_halt_aspm_l0s ( ctx.cfg_pm_halt_aspm_l0s ), // <- + .cfg_pm_halt_aspm_l1 ( ctx.cfg_pm_halt_aspm_l1 ), // <- + .cfg_pm_send_pme_to ( ctx.cfg_pm_send_pme_to ), // <- + .cfg_pm_wake ( ctx.cfg_pm_wake ), // <- + .rx_np_ok ( ctx.rx_np_ok ), // <- + .rx_np_req ( ctx.rx_np_req ), // <- + .cfg_trn_pending ( ctx.cfg_trn_pending ), // <- + .cfg_turnoff_ok ( ctx.cfg_turnoff_ok ), // <- + .tx_cfg_gnt ( ctx.tx_cfg_gnt ), // <- + + // pcie2_cfg_status + .cfg_command ( ctx.cfg_command ), // -> [15:0] + .cfg_bus_number ( ctx.cfg_bus_number ), // -> [7:0] + .cfg_device_number ( ctx.cfg_device_number ), // -> [4:0] + .cfg_function_number ( ctx.cfg_function_number ), // -> [2:0] + .cfg_root_control_pme_int_en( ctx.cfg_root_control_pme_int_en ), // -> + .cfg_bridge_serr_en ( ctx.cfg_bridge_serr_en ), // -> + .cfg_dcommand ( ctx.cfg_dcommand ), // -> [15:0] + .cfg_dcommand2 ( ctx.cfg_dcommand2 ), // -> [15:0] + .cfg_dstatus ( ctx.cfg_dstatus ), // -> [15:0] + .cfg_lcommand ( ctx.cfg_lcommand ), // -> [15:0] + .cfg_lstatus ( ctx.cfg_lstatus ), // -> [15:0] + .cfg_pcie_link_state ( ctx.cfg_pcie_link_state ), // -> [2:0] + .cfg_pmcsr_pme_en ( ctx.cfg_pmcsr_pme_en ), // -> + .cfg_pmcsr_pme_status ( ctx.cfg_pmcsr_pme_status ), // -> + .cfg_pmcsr_powerstate ( ctx.cfg_pmcsr_powerstate ), // -> [1:0] + .cfg_received_func_lvl_rst ( ctx.cfg_received_func_lvl_rst ), // -> + .cfg_status ( ctx.cfg_status ), // -> [15:0] + .cfg_to_turnoff ( ctx.cfg_to_turnoff ), // -> + .tx_buf_av ( ctx.tx_buf_av ), // -> [5:0] + .tx_cfg_req ( ctx.tx_cfg_req ), // -> + .tx_err_drop ( ctx.tx_err_drop ), // -> + .cfg_vc_tcvc_map ( ctx.cfg_vc_tcvc_map ), // -> [6:0] + .cfg_aer_rooterr_corr_err_received ( ctx.cfg_aer_rooterr_corr_err_received ), // -> + .cfg_aer_rooterr_corr_err_reporting_en ( ctx.cfg_aer_rooterr_corr_err_reporting_en ), // -> + .cfg_aer_rooterr_fatal_err_received ( ctx.cfg_aer_rooterr_fatal_err_received ), // -> + .cfg_aer_rooterr_fatal_err_reporting_en ( ctx.cfg_aer_rooterr_fatal_err_reporting_en ), // -> + .cfg_aer_rooterr_non_fatal_err_received ( ctx.cfg_aer_rooterr_non_fatal_err_received ), // -> + .cfg_aer_rooterr_non_fatal_err_reporting_en ( ctx.cfg_aer_rooterr_non_fatal_err_reporting_en ), // -> + .cfg_root_control_syserr_corr_err_en ( ctx.cfg_root_control_syserr_corr_err_en ), // -> + .cfg_root_control_syserr_fatal_err_en ( ctx.cfg_root_control_syserr_fatal_err_en ), // -> + .cfg_root_control_syserr_non_fatal_err_en ( ctx.cfg_root_control_syserr_non_fatal_err_en ), // -> + .cfg_slot_control_electromech_il_ctl_pulse ( ctx.cfg_slot_control_electromech_il_ctl_pulse ), // -> + + // PCIe core PHY + .pl_initial_link_width ( ctx.pl_initial_link_width ), // -> [2:0] + .pl_phy_lnk_up ( ctx.pl_phy_lnk_up ), // -> + .pl_lane_reversal_mode ( ctx.pl_lane_reversal_mode ), // -> [1:0] + .pl_link_gen2_cap ( ctx.pl_link_gen2_cap ), // -> + .pl_link_partner_gen2_supported ( ctx.pl_link_partner_gen2_supported ), // -> + .pl_link_upcfg_cap ( ctx.pl_link_upcfg_cap ), // -> + .pl_sel_lnk_rate ( ctx.pl_sel_lnk_rate ), // -> + .pl_sel_lnk_width ( ctx.pl_sel_lnk_width ), // -> [1:0] + .pl_ltssm_state ( ctx.pl_ltssm_state ), // -> [5:0] + .pl_rx_pm_state ( ctx.pl_rx_pm_state ), // -> [1:0] + .pl_tx_pm_state ( ctx.pl_tx_pm_state ), // -> [2:0] + .pl_directed_change_done ( ctx.pl_directed_change_done ), // -> + .pl_received_hot_rst ( ctx.pl_received_hot_rst ), // -> + .pl_directed_link_auton ( ctx.pl_directed_link_auton ), // <- + .pl_directed_link_change ( ctx.pl_directed_link_change ), // <- [1:0] + .pl_directed_link_speed ( ctx.pl_directed_link_speed ), // <- + .pl_directed_link_width ( ctx.pl_directed_link_width ), // <- [1:0] + .pl_upstream_prefer_deemph ( ctx.pl_upstream_prefer_deemph ), // <- + .pl_transmit_hot_rst ( ctx.pl_transmit_hot_rst ), // <- + .pl_downstream_deemph_source( ctx.pl_downstream_deemph_source ), // <- + + // DRP - clock domain clk_100 - write should only happen when core is in reset state ... + .pcie_drp_clk ( clk_sys ), // <- + .pcie_drp_en ( dfifo_pcie.drp_en ), // <- + .pcie_drp_we ( dfifo_pcie.drp_we ), // <- + .pcie_drp_addr ( dfifo_pcie.drp_addr ), // <- [8:0] + .pcie_drp_di ( dfifo_pcie.drp_di ), // <- [15:0] + .pcie_drp_rdy ( dfifo_pcie.drp_rdy ), // -> + .pcie_drp_do ( dfifo_pcie.drp_do ), // -> [15:0] + + // user interface + .user_clk_out ( clk_pcie ), // -> + .user_reset_out ( rst_pcie_user ), // -> + .user_lnk_up ( user_lnk_up ), // -> + .user_app_rdy ( ) // -> + ); + +endmodule + + +// ------------------------------------------------------------------------ +// TLP STREAM SINK: +// Convert a 128-bit TLP-AXI-STREAM to a 64-bit PCIe core AXI-STREAM. +// ------------------------------------------------------------------------ +module pcileech_tlps128_dst64( + input rst, + input clk_pcie, + IfPCIeTlpRxTx.source tlp_tx, + IfAXIS128.sink tlps_in +); + + bit [63:0] d1_tdata; + bit d1_tkeepdw2; + bit d1_tlast; + bit d1_tvalid = 0; + + assign tlps_in.tready = tlp_tx.ready && !(tlps_in.tvalid && tlps_in.tkeepdw[2]); + + wire tkeepdw2 = d1_tvalid ? d1_tkeepdw2 : tlps_in.tkeepdw[1]; + assign tlp_tx.data = d1_tvalid ? d1_tdata : tlps_in.tdata[63:0]; + assign tlp_tx.last = d1_tvalid ? d1_tlast : (tlps_in.tlast && !tlps_in.tkeepdw[2]); + assign tlp_tx.keep = tkeepdw2 ? 8'hff : 8'h0f; + assign tlp_tx.valid = d1_tvalid || tlps_in.tvalid; + + always @ ( posedge clk_pcie ) begin + d1_tvalid <= !rst && tlps_in.tvalid && tlps_in.tkeepdw[2]; + d1_tdata <= tlps_in.tdata[127:64]; + d1_tlast <= tlps_in.tlast; + d1_tkeepdw2 <= tlps_in.tkeepdw[3]; + end + +endmodule + + +// ------------------------------------------------------------------------ +// TLP STREAM SOURCE: +// Convert a 64-bit PCIe core AXIS to a 128-bit TLP-AXI-STREAM +// ------------------------------------------------------------------------ +module pcileech_tlps128_src64( + input rst, + input clk_pcie, + IfPCIeTlpRxTx.sink tlp_rx, + IfAXIS128.source_lite tlps_out +); + + bit [127:0] tdata; + bit first = 1; + bit tlast = 0; + bit [3:0] len = 0; + bit [6:0] bar_hit = 0; + wire tvalid = tlast || (len>2); + + assign tlp_rx.ready = 1'b1; + assign tlps_out.tdata = tdata; + assign tlps_out.tkeepdw = {(len>3), (len>2), (len>1), 1'b1}; + assign tlps_out.tlast = tlast; + assign tlps_out.tvalid = tvalid; + assign tlps_out.tuser[0] = first; + assign tlps_out.tuser[1] = tlast; + assign tlps_out.tuser[8:2] = bar_hit; + + wire [3:0] next_base = (tlast || tvalid) ? 0 : len; + wire [3:0] next_len = next_base + 1 + tlp_rx.keep[4]; + + always @ ( posedge clk_pcie ) + if ( rst ) begin + first <= 1; + tlast <= 0; + len <= 0; + bar_hit <= 0; + end + else if ( tlp_rx.valid ) begin + tdata[(32*next_base)+:64] <= tlp_rx.data; + first <= tvalid ? tlast : first; + tlast <= tlp_rx.last; + len <= next_len; + bar_hit <= tlp_rx.user[8:2]; + end + else if ( tvalid ) begin + first <= tlast; + tlast <= 0; + len <= 0; + bar_hit <= 0; + end + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_a7x4.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_a7x4.sv new file mode 100644 index 0000000000000000000000000000000000000000..fd154309ce138d8802327603ccd07eca38c4d90d --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_a7x4.sv @@ -0,0 +1,375 @@ +// +// PCILeech FPGA. +// +// PCIe module for Artix-7. +// +// (c) Ulf Frisk, 2018-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps +`include "pcileech_header.svh" + +module pcileech_pcie_a7x4( + input clk_sys, + input rst, + + // PCIe fabric + output [3:0] pcie_tx_p, + output [3:0] pcie_tx_n, + input [3:0] pcie_rx_p, + input [3:0] pcie_rx_n, + input pcie_clk_p, + input pcie_clk_n, + input pcie_perst_n, + + // State and Activity LEDs + output led_state, + + // PCIe <--> FIFOs + IfPCIeFifoCfg.mp_pcie dfifo_cfg, + IfPCIeFifoTlp.mp_pcie dfifo_tlp, + IfPCIeFifoCore.mp_pcie dfifo_pcie, + IfShadow2Fifo.shadow dshadow2fifo + ); + + // ---------------------------------------------------------------------------- + // PCIe DEFINES AND WIRES + // ---------------------------------------------------------------------------- + + IfPCIeSignals ctx(); + IfAXIS128 tlp_tx(); + IfPCIeTlpRx128 tlp_rx(); + IfAXIS128 tlps_tx(); + IfAXIS128 tlps_rx(); + + IfAXIS128 tlps_static(); // static tlp transmit from cfg->tlp + wire [15:0] pcie_id; + wire user_lnk_up; + + // system interface + wire pcie_clk_c; + wire clk_pcie; + wire rst_pcie_user; + wire rst_subsys = rst || rst_pcie_user || dfifo_pcie.pcie_rst_subsys; + wire rst_pcie = rst || ~pcie_perst_n || dfifo_pcie.pcie_rst_core; + + // Buffer for differential system clock + IBUFDS_GTE2 refclk_ibuf (.O(pcie_clk_c), .ODIV2(), .I(pcie_clk_p), .CEB(1'b0), .IB(pcie_clk_n)); + + // ---------------------------------------------------- + // TickCount64 PCIe REFCLK and LED OUTPUT + // ---------------------------------------------------- + + time tickcount64_pcie_refclk = 0; + always @ ( posedge pcie_clk_c ) + tickcount64_pcie_refclk <= tickcount64_pcie_refclk + 1; + assign led_state = user_lnk_up || tickcount64_pcie_refclk[25]; + + // ---------------------------------------------------------------------------- + // PCIe CFG RX/TX <--> FIFO below + // ---------------------------------------------------------------------------- + wire [31:0] base_address_register; + + pcileech_pcie_cfg_a7 i_pcileech_pcie_cfg_a7( + .rst ( rst_subsys ), + .clk_sys ( clk_sys ), + .clk_pcie ( clk_pcie ), + .dfifo ( dfifo_cfg ), + .ctx ( ctx ), + .tlps_static ( tlps_static.source ), + .pcie_id ( pcie_id ), // -> [15:0] + .base_address_register ( base_address_register ) + ); + + // ---------------------------------------------------------------------------- + // PCIe TLP RX/TX <--> FIFO below + // ---------------------------------------------------------------------------- + + pcileech_tlps128_src128 i_pcileech_tlps128_src128( + .rst ( rst_subsys ), + .clk_pcie ( clk_pcie ), + .tlp_rx ( tlp_rx.sink ), + .tlps_out ( tlps_rx.source_lite ) + ); + + pcileech_pcie_tlp_a7 i_pcileech_pcie_tlp_a7( + .rst ( rst_subsys ), + .clk_pcie ( clk_pcie ), + .clk_sys ( clk_sys ), + .dfifo ( dfifo_tlp ), + .tlps_tx ( tlps_tx.source ), + .tlps_rx ( tlps_rx.sink_lite ), + .tlps_static ( tlps_static.sink ), + .dshadow2fifo ( dshadow2fifo ), + .pcie_id ( pcie_id ), // <- [15:0] + .base_address_register ( base_address_register ) + ); + + pcileech_tlps128_dst128 i_pcileech_tlps128_dst128( + .rst ( rst_subsys ), + .clk_pcie ( clk_pcie ), + .tlps_in ( tlps_tx.sink ), + .tlps_out ( tlp_tx.source ) + ); + + wire [15:0] tlp_tx_tkeep; + assign tlp_tx_tkeep[3:0] = tlp_tx.tkeepdw[0] ? 4'hf : 4'h0; + assign tlp_tx_tkeep[7:4] = tlp_tx.tkeepdw[1] ? 4'hf : 4'h0; + assign tlp_tx_tkeep[11:8] = tlp_tx.tkeepdw[2] ? 4'hf : 4'h0; + assign tlp_tx_tkeep[15:12] = tlp_tx.tkeepdw[3] ? 4'hf : 4'h0; + + // ---------------------------------------------------------------------------- + // PCIe CORE BELOW + // ---------------------------------------------------------------------------- + + pcie_7x_0 i_pcie_7x_0 ( + // pcie_7x_mgt + .pci_exp_txp ( pcie_tx_p ), // -> + .pci_exp_txn ( pcie_tx_n ), // -> + .pci_exp_rxp ( pcie_rx_p ), // <- + .pci_exp_rxn ( pcie_rx_n ), // <- + .sys_clk ( pcie_clk_c ), // <- + .sys_rst_n ( ~rst_pcie ), // <- + + // s_axis_tx (transmit data) - 128-bit AXIS + .s_axis_tx_tdata ( tlp_tx.tdata ), // <- [127:0] + .s_axis_tx_tkeep ( tlp_tx_tkeep ), // <- [15:0] + .s_axis_tx_tlast ( tlp_tx.tlast ), // <- + .s_axis_tx_tready ( tlp_tx.tready ), // -> + .s_axis_tx_tuser ( 4'b0000 ), // <- [3:0] + .s_axis_tx_tvalid ( tlp_tx.tvalid ), // <- + // s_axis_rx (receive data) - 128-bit AXIS + .m_axis_rx_tdata ( tlp_rx.data ), // -> [127:0] + .m_axis_rx_tkeep ( ), // -> [15:0] + .m_axis_rx_tlast ( ), // -> + .m_axis_rx_tready ( tlp_rx.ready ), // <- + .m_axis_rx_tuser ( tlp_rx.user ), // -> [21:0] + .m_axis_rx_tvalid ( tlp_rx.valid ), // -> + + // pcie_cfg_mgmt + .cfg_mgmt_dwaddr ( ctx.cfg_mgmt_dwaddr ), // <- [9:0] + .cfg_mgmt_byte_en ( ctx.cfg_mgmt_byte_en ), // <- [3:0] + .cfg_mgmt_do ( ctx.cfg_mgmt_do ), // -> [31:0] + .cfg_mgmt_rd_en ( ctx.cfg_mgmt_rd_en ), // <- + .cfg_mgmt_rd_wr_done ( ctx.cfg_mgmt_rd_wr_done ), // -> + .cfg_mgmt_wr_readonly ( ctx.cfg_mgmt_wr_readonly ), // <- + .cfg_mgmt_wr_rw1c_as_rw ( ctx.cfg_mgmt_wr_rw1c_as_rw ), // <- + .cfg_mgmt_di ( ctx.cfg_mgmt_di ), // <- [31:0] + .cfg_mgmt_wr_en ( ctx.cfg_mgmt_wr_en ), // <- + + // special core config + //.pcie_cfg_vend_id ( dfifo_pcie.pcie_cfg_vend_id ), // <- [15:0] + //.pcie_cfg_dev_id ( dfifo_pcie.pcie_cfg_dev_id ), // <- [15:0] + //.pcie_cfg_rev_id ( dfifo_pcie.pcie_cfg_rev_id ), // <- [7:0] + //.pcie_cfg_subsys_vend_id ( dfifo_pcie.pcie_cfg_subsys_vend_id ), // <- [15:0] + //.pcie_cfg_subsys_id ( dfifo_pcie.pcie_cfg_subsys_id ), // <- [15:0] + + // pcie2_cfg_interrupt + .cfg_interrupt_assert ( ctx.cfg_interrupt_assert ), // <- + .cfg_interrupt ( ctx.cfg_interrupt ), // <- + .cfg_interrupt_mmenable ( ctx.cfg_interrupt_mmenable ), // -> [2:0] + .cfg_interrupt_msienable ( ctx.cfg_interrupt_msienable ), // -> + .cfg_interrupt_msixenable ( ctx.cfg_interrupt_msixenable ), // -> + .cfg_interrupt_msixfm ( ctx.cfg_interrupt_msixfm ), // -> + .cfg_pciecap_interrupt_msgnum ( ctx.cfg_pciecap_interrupt_msgnum ), // <- [4:0] + .cfg_interrupt_rdy ( ctx.cfg_interrupt_rdy ), // -> + .cfg_interrupt_do ( ctx.cfg_interrupt_do ), // -> [7:0] + .cfg_interrupt_stat ( ctx.cfg_interrupt_stat ), // <- + .cfg_interrupt_di ( ctx.cfg_interrupt_di ), // <- [7:0] + + // pcie2_cfg_control + .cfg_ds_bus_number ( ctx.cfg_bus_number ), // <- [7:0] + .cfg_ds_device_number ( ctx.cfg_device_number ), // <- [4:0] + .cfg_ds_function_number ( ctx.cfg_function_number ), // <- [2:0] + .cfg_dsn ( ctx.cfg_dsn ), // <- [63:0] + .cfg_pm_force_state ( ctx.cfg_pm_force_state ), // <- [1:0] + .cfg_pm_force_state_en ( ctx.cfg_pm_force_state_en ), // <- + .cfg_pm_halt_aspm_l0s ( ctx.cfg_pm_halt_aspm_l0s ), // <- + .cfg_pm_halt_aspm_l1 ( ctx.cfg_pm_halt_aspm_l1 ), // <- + .cfg_pm_send_pme_to ( ctx.cfg_pm_send_pme_to ), // <- + .cfg_pm_wake ( ctx.cfg_pm_wake ), // <- + .rx_np_ok ( ctx.rx_np_ok ), // <- + .rx_np_req ( ctx.rx_np_req ), // <- + .cfg_trn_pending ( ctx.cfg_trn_pending ), // <- + .cfg_turnoff_ok ( ctx.cfg_turnoff_ok ), // <- + .tx_cfg_gnt ( ctx.tx_cfg_gnt ), // <- + + // pcie2_cfg_status + .cfg_command ( ctx.cfg_command ), // -> [15:0] + .cfg_bus_number ( ctx.cfg_bus_number ), // -> [7:0] + .cfg_device_number ( ctx.cfg_device_number ), // -> [4:0] + .cfg_function_number ( ctx.cfg_function_number ), // -> [2:0] + .cfg_root_control_pme_int_en( ctx.cfg_root_control_pme_int_en ), // -> + .cfg_bridge_serr_en ( ctx.cfg_bridge_serr_en ), // -> + .cfg_dcommand ( ctx.cfg_dcommand ), // -> [15:0] + .cfg_dcommand2 ( ctx.cfg_dcommand2 ), // -> [15:0] + .cfg_dstatus ( ctx.cfg_dstatus ), // -> [15:0] + .cfg_lcommand ( ctx.cfg_lcommand ), // -> [15:0] + .cfg_lstatus ( ctx.cfg_lstatus ), // -> [15:0] + .cfg_pcie_link_state ( ctx.cfg_pcie_link_state ), // -> [2:0] + .cfg_pmcsr_pme_en ( ctx.cfg_pmcsr_pme_en ), // -> + .cfg_pmcsr_pme_status ( ctx.cfg_pmcsr_pme_status ), // -> + .cfg_pmcsr_powerstate ( ctx.cfg_pmcsr_powerstate ), // -> [1:0] + .cfg_received_func_lvl_rst ( ctx.cfg_received_func_lvl_rst ), // -> + .cfg_status ( ctx.cfg_status ), // -> [15:0] + .cfg_to_turnoff ( ctx.cfg_to_turnoff ), // -> + .tx_buf_av ( ctx.tx_buf_av ), // -> [5:0] + .tx_cfg_req ( ctx.tx_cfg_req ), // -> + .tx_err_drop ( ctx.tx_err_drop ), // -> + .cfg_vc_tcvc_map ( ctx.cfg_vc_tcvc_map ), // -> [6:0] + .cfg_aer_rooterr_corr_err_received ( ctx.cfg_aer_rooterr_corr_err_received ), // -> + .cfg_aer_rooterr_corr_err_reporting_en ( ctx.cfg_aer_rooterr_corr_err_reporting_en ), // -> + .cfg_aer_rooterr_fatal_err_received ( ctx.cfg_aer_rooterr_fatal_err_received ), // -> + .cfg_aer_rooterr_fatal_err_reporting_en ( ctx.cfg_aer_rooterr_fatal_err_reporting_en ), // -> + .cfg_aer_rooterr_non_fatal_err_received ( ctx.cfg_aer_rooterr_non_fatal_err_received ), // -> + .cfg_aer_rooterr_non_fatal_err_reporting_en ( ctx.cfg_aer_rooterr_non_fatal_err_reporting_en ), // -> + .cfg_root_control_syserr_corr_err_en ( ctx.cfg_root_control_syserr_corr_err_en ), // -> + .cfg_root_control_syserr_fatal_err_en ( ctx.cfg_root_control_syserr_fatal_err_en ), // -> + .cfg_root_control_syserr_non_fatal_err_en ( ctx.cfg_root_control_syserr_non_fatal_err_en ), // -> + .cfg_slot_control_electromech_il_ctl_pulse ( ctx.cfg_slot_control_electromech_il_ctl_pulse ), // -> + + // PCIe core PHY + .pl_initial_link_width ( ctx.pl_initial_link_width ), // -> [2:0] + .pl_phy_lnk_up ( ctx.pl_phy_lnk_up ), // -> + .pl_lane_reversal_mode ( ctx.pl_lane_reversal_mode ), // -> [1:0] + .pl_link_gen2_cap ( ctx.pl_link_gen2_cap ), // -> + .pl_link_partner_gen2_supported ( ctx.pl_link_partner_gen2_supported ), // -> + .pl_link_upcfg_cap ( ctx.pl_link_upcfg_cap ), // -> + .pl_sel_lnk_rate ( ctx.pl_sel_lnk_rate ), // -> + .pl_sel_lnk_width ( ctx.pl_sel_lnk_width ), // -> [1:0] + .pl_ltssm_state ( ctx.pl_ltssm_state ), // -> [5:0] + .pl_rx_pm_state ( ctx.pl_rx_pm_state ), // -> [1:0] + .pl_tx_pm_state ( ctx.pl_tx_pm_state ), // -> [2:0] + .pl_directed_change_done ( ctx.pl_directed_change_done ), // -> + .pl_received_hot_rst ( ctx.pl_received_hot_rst ), // -> + .pl_directed_link_auton ( ctx.pl_directed_link_auton ), // <- + .pl_directed_link_change ( ctx.pl_directed_link_change ), // <- [1:0] + .pl_directed_link_speed ( ctx.pl_directed_link_speed ), // <- + .pl_directed_link_width ( ctx.pl_directed_link_width ), // <- [1:0] + .pl_upstream_prefer_deemph ( ctx.pl_upstream_prefer_deemph ), // <- + .pl_transmit_hot_rst ( ctx.pl_transmit_hot_rst ), // <- + .pl_downstream_deemph_source( ctx.pl_downstream_deemph_source ), // <- + + // DRP - clock domain clk - write should only happen when core is in reset state ... + .pcie_drp_clk ( clk_sys ), // <- + .pcie_drp_en ( dfifo_pcie.drp_en ), // <- + .pcie_drp_we ( dfifo_pcie.drp_we ), // <- + .pcie_drp_addr ( dfifo_pcie.drp_addr ), // <- [8:0] + .pcie_drp_di ( dfifo_pcie.drp_di ), // <- [15:0] + .pcie_drp_rdy ( dfifo_pcie.drp_rdy ), // -> + .pcie_drp_do ( dfifo_pcie.drp_do ), // -> [15:0] + + // user interface + .user_clk_out ( clk_pcie ), // -> + .user_reset_out ( rst_pcie_user ), // -> + .user_lnk_up ( user_lnk_up ), // -> + .user_app_rdy ( ) // -> + ); + +endmodule + +// ------------------------------------------------------------------------ +// TLP STREAM SINK: +// Convert a 128-bit TLP-AXI-STREAM to a 128-bit PCIe core AXI-STREAM. +// ------------------------------------------------------------------------ +module pcileech_tlps128_dst128( + input rst, + input clk_pcie, + IfAXIS128.source tlps_out, + IfAXIS128.sink tlps_in +); + + bit [127:0] d_tdata; + bit [3:0] d_tkeepdw; + bit d_tlast; + bit d_tvalid; + always @ ( posedge clk_pcie ) begin + if ( rst ) begin + d_tvalid <= 0; + end + else if ( tlps_in.tvalid ) begin + d_tdata <= tlps_in.tdata; + d_tkeepdw <= tlps_in.tkeepdw; + d_tlast <= tlps_in.tlast; + d_tvalid <= !tlps_out.tready; + end + else if ( tlps_out.tready ) begin + d_tvalid <= 0; + end + end + + assign tlps_in.tready = tlps_out.tready && !d_tvalid; + assign tlps_out.tdata = d_tvalid ? d_tdata : tlps_in.tdata; + assign tlps_out.tkeepdw = d_tvalid ? d_tkeepdw : tlps_in.tkeepdw; + assign tlps_out.tlast = d_tvalid ? d_tlast : tlps_in.tlast; + assign tlps_out.tvalid = d_tvalid || tlps_in.tvalid; + +endmodule + +// ------------------------------------------------------------------------ +// TLP STREAM SOURCE: +// Convert a 128-bit PCIe core AXIS to a 128-bit TLP-AXI-STREAM +// ------------------------------------------------------------------------ +module pcileech_tlps128_src128( + input rst, + input clk_pcie, + IfPCIeTlpRx128.sink tlp_rx, + IfAXIS128.source_lite tlps_out +); + + bit rxd_ready; + wire [127:0] rxf_data = tlp_rx.data; + wire [21:0] rxf_user = tlp_rx.user; + wire rxf_valid = tlp_rx.valid && rxd_ready; + wire rxf_ready; + assign tlp_rx.ready = rxf_ready; + + bit rxd_sof; + bit rxd_eof; + bit rxd_eof_dw; + bit [6:0] rxd_bar_hit; + bit [63:0] rxd_data_qw; + bit rxd_valid; + + wire [63:0] rxf_data_qw0 = rxf_data[63:0]; + wire [63:0] rxf_data_qw1 = rxf_data[127:64]; + wire rxf_sof = rxf_user[14]; + wire rxf_sof_qw = rxf_user[13]; + wire rxf_eof = rxf_user[21]; + wire [1:0] rxf_eof_dw = rxf_user[20:19]; + wire [6:0] rxf_bar_hit = rxf_user[8:2]; + + wire [3:0] rx_keep_dw; + + assign rxf_ready = !(rxd_valid && rxf_eof && (rxf_eof_dw >= 2)) || !rxf_valid; + + assign tlps_out.tdata = rxd_valid ? {rxf_data_qw0, rxd_data_qw} : {rxf_data_qw1, rxf_data_qw0}; + assign tlps_out.tuser[0] = rxd_valid ? rxd_sof : (rxf_sof && !rxf_sof_qw); // tfirst + assign tlps_out.tuser[1] = rxd_valid ? (rxd_eof || (rxf_eof && (rxf_eof_dw <= 1))) : rxf_eof; // tlast + assign tlps_out.tuser[8:2] = rxd_valid ? rxd_bar_hit : rxf_bar_hit; + assign tlps_out.tlast = tlps_out.tuser[1]; + assign tlps_out.tvalid = rxd_valid || (rxf_valid && !(rxf_sof && rxf_sof_qw)); + + assign tlps_out.tkeepdw[0] = rxd_valid || rxf_valid; + assign tlps_out.tkeepdw[1] = rxd_valid ? (!rxd_eof || rxd_eof_dw) : + (!rxf_eof || (rxf_eof_dw >= 1)); + assign tlps_out.tkeepdw[2] = rxd_valid ? (!rxd_eof && rxf_valid) : + (!rxf_eof || (rxf_eof_dw >= 2)); + assign tlps_out.tkeepdw[3] = rxd_valid ? (!rxd_eof && rxf_valid && (!rxf_eof || (rxf_eof_dw >= 1))) : + (!rxf_eof || (rxf_eof_dw >= 3)); + + wire rxf_rxd_valid_next = !rst && rxf_valid && (rxd_valid ? ((!rxf_sof && !rxf_eof) || (rxf_sof && rxf_sof_qw) || (rxf_eof && (rxf_eof_dw >= 2))) : + (rxf_sof && rxf_sof_qw)); + + always @ ( posedge clk_pcie ) begin + rxd_ready <= rxf_ready; + rxd_bar_hit <= rxf_bar_hit; + rxd_data_qw <= rxf_data_qw1; + rxd_sof <= rxf_sof && rxf_sof_qw; + rxd_eof <= rxf_eof && (rxf_eof_dw >= 2); + rxd_eof_dw <= (rxf_eof_dw == 3); + rxd_valid <= rxf_rxd_valid_next; + end + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_cfg_a7.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_cfg_a7.sv new file mode 100644 index 0000000000000000000000000000000000000000..c2013dca082a894866f9cb8e1cf504a8ac314a0a --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_cfg_a7.sv @@ -0,0 +1,450 @@ +// +// PCILeech FPGA. +// +// PCIe configuration module - CFG handling for Artix-7. +// +// (c) Ulf Frisk, 2018-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps +`include "pcileech_header.svh" + +module pcileech_pcie_cfg_a7( + input rst, + input clk_sys, + input clk_pcie, + IfPCIeFifoCfg.mp_pcie dfifo, + IfPCIeSignals.mpm ctx, + IfAXIS128.source tlps_static, + input int_enable, + output [15:0] pcie_id, + output wire [31:0] base_address_register + ); + + + // ---------------------------------------------------- + // TickCount64 + // ---------------------------------------------------- + + time tickcount64 = 0; + always @ ( posedge clk_pcie ) + tickcount64 <= tickcount64 + 1; + + // ---------------------------------------------------------------------------- + // Convert received CFG data from FT601 to PCIe clock domain + // FIFO depth: 512 / 64-bits + // ---------------------------------------------------------------------------- + reg in_rden; + wire [63:0] in_dout; + wire in_empty; + wire in_valid; + + reg [63:0] in_data64; + wire [31:0] in_data32 = in_data64[63:32]; + wire [15:0] in_data16 = in_data64[31:16]; + wire [3:0] in_type = in_data64[15:12]; + + fifo_64_64 i_fifo_pcie_cfg_tx( + .rst ( rst ), + .wr_clk ( clk_sys ), + .rd_clk ( clk_pcie ), + .din ( dfifo.tx_data ), + .wr_en ( dfifo.tx_valid ), + .rd_en ( in_rden ), + .dout ( in_dout ), + .full ( ), + .empty ( in_empty ), + .valid ( in_valid ) + ); + + // ------------------------------------------------------------------------ + // Convert received CFG from PCIe core and transmit onwards to FT601 + // FIFO depth: 512 / 64-bits. + // ------------------------------------------------------------------------ + reg out_wren; + reg [31:0] out_data; + wire pcie_cfg_rx_almost_full; + + fifo_32_32_clk2 i_fifo_pcie_cfg_rx( + .rst ( rst ), + .wr_clk ( clk_pcie ), + .rd_clk ( clk_sys ), + .din ( out_data ), + .wr_en ( out_wren ), + .rd_en ( dfifo.rx_rd_en ), + .dout ( dfifo.rx_data ), + .full ( ), + .almost_full ( pcie_cfg_rx_almost_full ), + .empty ( ), + .valid ( dfifo.rx_valid ) + ); + + // ------------------------------------------------------------------------ + // REGISTER FILE: COMMON + // ------------------------------------------------------------------------ + + wire [383:0] ro; + reg [703:0] rw; + + // special non-user accessible registers + reg rwi_cfg_mgmt_rd_en; + reg rwi_cfg_mgmt_wr_en; + reg rwi_cfgrd_valid; + reg [9:0] rwi_cfgrd_addr; + reg [3:0] rwi_cfgrd_byte_en; + reg [31:0] rwi_cfgrd_data; + reg rwi_tlp_static_valid; + reg rwi_tlp_static_2nd; + reg rwi_tlp_static_has_data; + reg [31:0] rwi_count_cfgspace_status_cl; + bit [31:0] base_address_register_reg; + + // ------------------------------------------------------------------------ + // REGISTER FILE: READ-ONLY LAYOUT/SPECIFICATION + // ------------------------------------------------------------------------ + + // MAGIC + assign base_address_register = base_address_register_reg; + assign ro[15:0] = 16'h2301; // +000: MAGIC + // SPECIAL + assign ro[16] = ctx.cfg_mgmt_rd_en; // +002: SPECIAL + assign ro[17] = ctx.cfg_mgmt_wr_en; // + assign ro[31:18] = 0; // + // SIZEOF / BYTECOUNT [little-endian] + assign ro[63:32] = $bits(ro) >> 3; // +004: BYTECOUNT + // PCIe CFG STATUS + assign ro[71:64] = ctx.cfg_bus_number; // +008: + assign ro[76:72] = ctx.cfg_device_number; // + assign ro[79:77] = ctx.cfg_function_number; // + // PCIe PL PHY + assign ro[85:80] = ctx.pl_ltssm_state; // +00A + assign ro[87:86] = ctx.pl_rx_pm_state; // + assign ro[90:88] = ctx.pl_tx_pm_state; // +00B + assign ro[93:91] = ctx.pl_initial_link_width; // + assign ro[95:94] = ctx.pl_lane_reversal_mode; // + assign ro[97:96] = ctx.pl_sel_lnk_width; // +00C + assign ro[98] = ctx.pl_phy_lnk_up; // + assign ro[99] = ctx.pl_link_gen2_cap; // + assign ro[100] = ctx.pl_link_partner_gen2_supported; // + assign ro[101] = ctx.pl_link_upcfg_cap; // + assign ro[102] = ctx.pl_sel_lnk_rate; // + assign ro[103] = ctx.pl_directed_change_done; // +00D: + assign ro[104] = ctx.pl_received_hot_rst; // + assign ro[126:105] = 0; // SLACK + assign ro[127] = ctx.cfg_mgmt_rd_wr_done; // + // PCIe CFG MGMT + assign ro[159:128] = ctx.cfg_mgmt_do; // +010: + // PCIe CFG STATUS + assign ro[175:160] = ctx.cfg_command; // +014: + assign ro[176] = ctx.cfg_aer_rooterr_corr_err_received; // +016: + assign ro[177] = ctx.cfg_aer_rooterr_corr_err_reporting_en; // + assign ro[178] = ctx.cfg_aer_rooterr_fatal_err_received; // + assign ro[179] = ctx.cfg_aer_rooterr_fatal_err_reporting_en; // + assign ro[180] = ctx.cfg_aer_rooterr_non_fatal_err_received; // + assign ro[181] = ctx.cfg_aer_rooterr_non_fatal_err_reporting_en; // + assign ro[182] = ctx.cfg_bridge_serr_en; // + assign ro[183] = ctx.cfg_received_func_lvl_rst; // + assign ro[186:184] = ctx.cfg_pcie_link_state; // +017: + assign ro[187] = ctx.cfg_pmcsr_pme_en; // + assign ro[189:188] = ctx.cfg_pmcsr_powerstate; // + assign ro[190] = ctx.cfg_pmcsr_pme_status; // + assign ro[191] = 0; // SLACK + assign ro[207:192] = ctx.cfg_dcommand; // +018: + assign ro[223:208] = ctx.cfg_dcommand2; // +01A: + assign ro[239:224] = ctx.cfg_dstatus; // +01C: + assign ro[255:240] = ctx.cfg_lcommand; // +01E: + assign ro[271:256] = ctx.cfg_lstatus; // +020: + assign ro[287:272] = ctx.cfg_status; // +022: + assign ro[293:288] = ctx.tx_buf_av; // +024: + assign ro[294] = ctx.tx_cfg_req; // + assign ro[295] = ctx.tx_err_drop; // + assign ro[302:296] = ctx.cfg_vc_tcvc_map; // +025: + assign ro[303] = 0; // SLACK + assign ro[304] = ctx.cfg_root_control_pme_int_en; // +026: + assign ro[305] = ctx.cfg_root_control_syserr_corr_err_en; // + assign ro[306] = ctx.cfg_root_control_syserr_fatal_err_en; // + assign ro[307] = ctx.cfg_root_control_syserr_non_fatal_err_en; // + assign ro[308] = ctx.cfg_slot_control_electromech_il_ctl_pulse;// + assign ro[309] = ctx.cfg_to_turnoff; // + assign ro[319:310] = 0; // SLACK + // PCIe INTERRUPT + assign ro[327:320] = ctx.cfg_interrupt_do; // +028: + assign ro[330:328] = ctx.cfg_interrupt_mmenable; // +029: + assign ro[331] = ctx.cfg_interrupt_msienable; // + assign ro[332] = ctx.cfg_interrupt_msixenable; // + assign ro[333] = ctx.cfg_interrupt_msixfm; // + assign ro[334] = ctx.cfg_interrupt_rdy; // + assign ro[335] = 0; // SLACK + // CFG SPACE READ RESULT + assign ro[345:336] = rwi_cfgrd_addr; // +02A: + assign ro[346] = 0; // SLACK + assign ro[347] = rwi_cfgrd_valid; // + assign ro[351:348] = rwi_cfgrd_byte_en; // + assign ro[383:352] = rwi_cfgrd_data; // +02C: + // 0030 - + + + // ------------------------------------------------------------------------ + // INITIALIZATION/RESET BLOCK _AND_ + // REGISTER FILE: READ-WRITE LAYOUT/SPECIFICATION + // ------------------------------------------------------------------------ + + localparam integer RWPOS_CFG_RD_EN = 16; + localparam integer RWPOS_CFG_WR_EN = 17; + localparam integer RWPOS_CFG_WAIT_COMPLETE = 18; + localparam integer RWPOS_CFG_STATIC_TLP_TX_EN = 19; + localparam integer RWPOS_CFG_CFGSPACE_STATUS_CL_EN = 20; + localparam integer RWPOS_CFG_CFGSPACE_COMMAND_EN = 21; + + task pcileech_pcie_cfg_a7_initialvalues; // task is non automatic + begin + out_wren <= 1'b0; + + rwi_cfg_mgmt_rd_en <= 1'b0; + rwi_cfg_mgmt_wr_en <= 1'b0; + base_address_register_reg <= 32'h00000000; + + // MAGIC + rw[15:0] <= 16'h6745; // +000: + // SPECIAL START TASK BLOCK (write 1 to start action) + rw[16] <= 0; // +002: CFG RD EN + rw[17] <= 0; // CFG WR EN + rw[18] <= 0; // WAIT FOR PCIe CFG SPACE RD/WR COMPLETION BEFORE ACCEPT NEW FIFO READ/WRITES + rw[19] <= 0; // TLP_STATIC TX ENABLE + rw[20] <= 0; // CFGSPACE_STATUS_REGISTER_AUTO_CLEAR [master abort flag] + rw[21] <= 0; // CFGSPACE_COMMAND_REGISTER_AUTO_SET [bus master and other flags (set in rw[143:128] <= 16'h....;)] + rw[31:22] <= 0; // RESERVED FUTURE + // SIZEOF / BYTECOUNT [little-endian] + rw[63:32] <= $bits(rw) >> 3; // +004: bytecount [little endian] + // DSN + //PCI Express Device Serial Number (2nd DW) 00E04CFF + //PCI Express Device Serial Number (1st DW) FE819101 + rw[127:64] <= 64'h00E04CFFFE819101; // +008: cfg_dsn + // PCIe CFG MGMT + rw[159:128] <= 0; // +010: cfg_mgmt_di + rw[169:160] <= 0; // +014: cfg_mgmt_dwaddr + rw[170] <= 0; // cfg_mgmt_wr_readonly + rw[171] <= 0; // cfg_mgmt_wr_rw1c_as_rw + rw[175:172] <= 4'hf; // cfg_mgmt_byte_en + // PCIe PL PHY + rw[176] <= 0; // +016: pl_directed_link_auton + rw[178:177] <= 0; // pl_directed_link_change + rw[179] <= 1; // pl_directed_link_speed + rw[181:180] <= 0; // pl_directed_link_width + rw[182] <= 1; // pl_upstream_prefer_deemph + rw[183] <= 0; // pl_transmit_hot_rst + rw[184] <= 0; // +017: pl_downstream_deemph_source + rw[191:185] <= 0; // SLACK + // PCIe INTERRUPT + rw[199:192] <= 0; // +018: cfg_interrupt_di + rw[204:200] <= 0; // +019: cfg_pciecap_interrupt_msgnum + rw[205] <= 0; // cfg_interrupt_assert + rw[206] <= 0; // cfg_interrupt + rw[207] <= 0; // cfg_interrupt_stat + // PCIe CTRL + rw[209:208] <= 0; // +01A: cfg_pm_force_state + rw[210] <= 0; // cfg_pm_force_state_en + rw[211] <= 0; // cfg_pm_halt_aspm_l0s + rw[212] <= 0; // cfg_pm_halt_aspm_l1 + rw[213] <= 0; // cfg_pm_send_pme_to + rw[214] <= 0; // cfg_pm_wake + rw[215] <= 0; // cfg_trn_pending + rw[216] <= 0; // +01B: cfg_turnoff_ok + rw[217] <= 1; // rx_np_ok + rw[218] <= 1; // rx_np_req + rw[219] <= 1; // tx_cfg_gnt + rw[223:220] <= 0; // SLACK + // PCIe STATIC TLP TRANSMIT + rw[224+:8] <= 0; // +01C: TLP_STATIC TLP DWORD VALID [each-2bit: [0] = last, [1] = valid] [TLP DWORD 0-3] + rw[232+:8] <= 0; // +01D: TLP_STATIC TLP DWORD VALID [each-2bit: [0] = last, [1] = valid] [TLP DWORD 4-7] + rw[240+:16] <= 0; // +01E: TLP_STATIC TLP TX SLEEP (ticks) [little-endian] + rw[256+:384] <= 0; // +020: TLP_STATIC TLP [8*32-bit hdr+data] + rw[640+:32] <= 0; // +050: TLP_STATIC TLP RETRANSMIT COUNT + // PCIe STATUS register clear timer + rw[672+:32] <= 62500; // +054: CFGSPACE_STATUS_CLEAR TIMER (ticks) [little-endian] [default = 1ms - 62.5k @ 62.5MHz] + + end + endtask + + assign ctx.cfg_mgmt_rd_en = rwi_cfg_mgmt_rd_en & ~ctx.cfg_mgmt_rd_wr_done; + assign ctx.cfg_mgmt_wr_en = rwi_cfg_mgmt_wr_en & ~ctx.cfg_mgmt_rd_wr_done; + + assign ctx.cfg_dsn = rw[127:64]; + assign ctx.cfg_mgmt_di = rw[159:128]; + assign ctx.cfg_mgmt_dwaddr = rw[169:160]; + assign ctx.cfg_mgmt_wr_readonly = rw[170]; + assign ctx.cfg_mgmt_wr_rw1c_as_rw = rw[171]; + assign ctx.cfg_mgmt_byte_en = rw[175:172]; + + assign ctx.pl_directed_link_auton = rw[176]; + assign ctx.pl_directed_link_change = rw[178:177]; + assign ctx.pl_directed_link_speed = rw[179]; + assign ctx.pl_directed_link_width = rw[181:180]; + assign ctx.pl_upstream_prefer_deemph = rw[182]; + assign ctx.pl_transmit_hot_rst = rw[183]; + assign ctx.pl_downstream_deemph_source = rw[184]; + + assign ctx.cfg_interrupt_di = rw[199:192]; + assign ctx.cfg_pciecap_interrupt_msgnum = rw[204:200]; + assign ctx.cfg_interrupt_assert = rw[205]; + assign ctx.cfg_interrupt = rw[206]; + assign ctx.cfg_interrupt_stat = rw[207]; + + assign ctx.cfg_pm_force_state = rw[209:208]; + assign ctx.cfg_pm_force_state_en = rw[210]; + assign ctx.cfg_pm_halt_aspm_l0s = rw[211]; + assign ctx.cfg_pm_halt_aspm_l1 = rw[212]; + assign ctx.cfg_pm_send_pme_to = rw[213]; + assign ctx.cfg_pm_wake = rw[214]; + assign ctx.cfg_trn_pending = rw[215]; + assign ctx.cfg_turnoff_ok = rw[216]; + assign ctx.rx_np_ok = rw[217]; + assign ctx.rx_np_req = rw[218]; + assign ctx.tx_cfg_gnt = rw[219]; + + assign tlps_static.tdata[127:0] = rwi_tlp_static_2nd ? { + rw[(256+32*7+00)+:8], rw[(256+32*7+08)+:8], rw[(256+32*7+16)+:8], rw[(256+32*7+24)+:8], // STATIC TLP DWORD7 + rw[(256+32*6+00)+:8], rw[(256+32*6+08)+:8], rw[(256+32*6+16)+:8], rw[(256+32*6+24)+:8], // STATIC TLP DWORD6 + rw[(256+32*5+00)+:8], rw[(256+32*5+08)+:8], rw[(256+32*5+16)+:8], rw[(256+32*5+24)+:8], // STATIC TLP DWORD5 + rw[(256+32*4+00)+:8], rw[(256+32*4+08)+:8], rw[(256+32*4+16)+:8], rw[(256+32*4+24)+:8] // STATIC TLP DWORD4 + } : { + rw[(256+32*3+00)+:8], rw[(256+32*3+08)+:8], rw[(256+32*3+16)+:8], rw[(256+32*3+24)+:8], // STATIC TLP DWORD3 + rw[(256+32*2+00)+:8], rw[(256+32*2+08)+:8], rw[(256+32*2+16)+:8], rw[(256+32*2+24)+:8], // STATIC TLP DWORD2 + rw[(256+32*1+00)+:8], rw[(256+32*1+08)+:8], rw[(256+32*1+16)+:8], rw[(256+32*1+24)+:8], // STATIC TLP DWORD1 + rw[(256+32*0+00)+:8], rw[(256+32*0+08)+:8], rw[(256+32*0+16)+:8], rw[(256+32*0+24)+:8] // STATIC TLP DWORD0 + }; + assign tlps_static.tkeepdw = rwi_tlp_static_2nd ? { rw[224+2*7], rw[224+2*6], rw[224+2*5], rw[224+2*4] } : { rw[224+2*3], rw[224+2*2], rw[224+2*1], rw[224+2*0] }; + assign tlps_static.tlast = rwi_tlp_static_2nd || rw[224+2*3+1] || rw[224+2*2+1] || rw[224+2*1+1] || rw[224+2*0+1]; + assign tlps_static.tuser[0] = !rwi_tlp_static_2nd; + assign tlps_static.tvalid = rwi_tlp_static_valid && tlps_static.tkeepdw[0]; + assign tlps_static.has_data = rwi_tlp_static_has_data; + + assign pcie_id = ro[79:64]; + + // ------------------------------------------------------------------------ + // STATE MACHINE / LOGIC FOR READ/WRITE AND OTHER HOUSEKEEPING TASKS + // ------------------------------------------------------------------------ + + integer i_write, i_tlpstatic; + wire [15:0] in_cmd_address_byte = in_dout[31:16]; + wire [17:0] in_cmd_address_bit = {in_cmd_address_byte[14:0], 3'b000}; + wire [15:0] in_cmd_value = {in_dout[48+:8], in_dout[56+:8]}; + wire [15:0] in_cmd_mask = {in_dout[32+:8], in_dout[40+:8]}; + wire f_rw = in_cmd_address_byte[15]; + wire [15:0] in_cmd_data_in = (in_cmd_address_bit < (f_rw ? $bits(rw) : $bits(ro))) ? (f_rw ? rw[in_cmd_address_bit+:16] : ro[in_cmd_address_bit+:16]) : 16'h0000; + wire in_cmd_read = in_dout[12] & in_valid; + wire in_cmd_write = in_dout[13] & in_cmd_address_byte[15] & in_valid; + wire pcie_cfg_rw_en = rwi_cfg_mgmt_rd_en | rwi_cfg_mgmt_wr_en | rw[RWPOS_CFG_RD_EN] | rw[RWPOS_CFG_WR_EN]; + // in_rden = request data from incoming fifo. Only do this if there is space + // in the output fifo and every 2nd clock cycle (in case a resulting write + // starts an action that will last longer than a single clock there must be + // time to react and stop reading incoming read/writes until processed). + assign in_rden = tickcount64[1] & ~pcie_cfg_rx_almost_full & ( ~rw[RWPOS_CFG_WAIT_COMPLETE] | ~pcie_cfg_rw_en); + + initial pcileech_pcie_cfg_a7_initialvalues(); + + always @ ( posedge clk_pcie ) + if ( rst ) + pcileech_pcie_cfg_a7_initialvalues(); + else + begin + // READ config + out_wren <= in_cmd_read; + if ( in_cmd_read ) + begin + out_data[31:16] <= in_cmd_address_byte; + out_data[15:0] <= {in_cmd_data_in[7:0], in_cmd_data_in[15:8]}; + end + + // WRITE config + if ( in_cmd_write ) + for ( i_write = 0; i_write < 16; i_write = i_write + 1 ) + begin + if ( in_cmd_mask[i_write] ) + rw[in_cmd_address_bit+i_write] <= in_cmd_value[i_write]; + end + + // STATUS REGISTER CLEAR + if ( (rw[RWPOS_CFG_CFGSPACE_STATUS_CL_EN] | rw[RWPOS_CFG_CFGSPACE_COMMAND_EN]) & ~in_cmd_read & ~in_cmd_write & ~rw[RWPOS_CFG_RD_EN] & ~rw[RWPOS_CFG_WR_EN] & ~rwi_cfg_mgmt_rd_en & ~rwi_cfg_mgmt_wr_en ) + if ( rwi_count_cfgspace_status_cl < rw[672+:32] ) + rwi_count_cfgspace_status_cl <= rwi_count_cfgspace_status_cl + 1; + else begin + rwi_count_cfgspace_status_cl <= 0; + rw[RWPOS_CFG_WR_EN] <= 1'b1; + rw[143:128] <= 16'h0007; // cfg_mgmt_di: command register [update to set individual command register bits] + rw[159:144] <= 16'hff00; // cfg_mgmt_di: status register [do not update] + rw[169:160] <= 1; // cfg_mgmt_dwaddr + rw[170] <= 0; // cfg_mgmt_wr_readonly + rw[171] <= 0; // cfg_mgmt_wr_rw1c_as_rw + rw[172] <= rw[RWPOS_CFG_CFGSPACE_COMMAND_EN]; // cfg_mgmt_byte_en: command register + rw[173] <= rw[RWPOS_CFG_CFGSPACE_COMMAND_EN]; // cfg_mgmt_byte_en: command register + rw[174] <= 0; // cfg_mgmt_byte_en: status register + rw[175] <= rw[RWPOS_CFG_CFGSPACE_STATUS_CL_EN]; // cfg_mgmt_byte_en: status register + end + + if ((base_address_register_reg == 32'h00000000) | (base_address_register_reg == 32'hFFFFC004)) + if ( ~in_cmd_read & ~in_cmd_write & ~rw[RWPOS_CFG_RD_EN] & ~rw[RWPOS_CFG_WR_EN] & ~rwi_cfg_mgmt_rd_en & ~rwi_cfg_mgmt_wr_en ) + begin + rw[RWPOS_CFG_RD_EN] <= 1'b1; + rw[169:160] <= 6; // cfg_mgmt_dwaddr + rw[172] <= 0; // cfg_mgmt_byte_en + rw[173] <= 0; // cfg_mgmt_byte_en + rw[174] <= 0; // cfg_mgmt_byte_en + rw[175] <= 0; // cfg_mgmt_byte_en + end + + // CONFIG SPACE READ/WRITE + if ( ctx.cfg_mgmt_rd_wr_done ) + begin + // + // BAR2 + // + if ((base_address_register_reg == 32'h00000000) | (base_address_register_reg == 32'hFFFFC004)) + if ((ctx.cfg_mgmt_dwaddr == 8'h06) & rwi_cfg_mgmt_rd_en) + base_address_register_reg <= (ctx.cfg_mgmt_do & 32'hFFFFFFF0); + + + rwi_cfg_mgmt_rd_en <= 1'b0; + rwi_cfg_mgmt_wr_en <= 1'b0; + rwi_cfgrd_valid <= 1'b1; + rwi_cfgrd_addr <= ctx.cfg_mgmt_dwaddr; + rwi_cfgrd_data <= ctx.cfg_mgmt_do; + rwi_cfgrd_byte_en <= ctx.cfg_mgmt_byte_en; + end + else if ( rw[RWPOS_CFG_RD_EN] ) + begin + rw[RWPOS_CFG_RD_EN] <= 1'b0; + rwi_cfg_mgmt_rd_en <= 1'b1; + rwi_cfgrd_valid <= 1'b0; + end + else if ( rw[RWPOS_CFG_WR_EN] ) + begin + rw[RWPOS_CFG_WR_EN] <= 1'b0; + rwi_cfg_mgmt_wr_en <= 1'b1; + rwi_cfgrd_valid <= 1'b0; + end + + // STATIC_TLP TRANSMIT + if ( (rwi_tlp_static_valid && rwi_tlp_static_2nd) || ~rw[RWPOS_CFG_STATIC_TLP_TX_EN] ) begin // STATE (3) + rwi_tlp_static_valid <= 1'b0; + rwi_tlp_static_has_data <= 1'b0; + end + else if ( rwi_tlp_static_has_data && tlps_static.tready && rwi_tlp_static_2nd ) begin // STATE (1) + rwi_tlp_static_valid <= 1'b1; + rwi_tlp_static_2nd <= 1'b0; + end + else if ( rwi_tlp_static_has_data && tlps_static.tready && !rwi_tlp_static_2nd ) begin // STATE (2) + rwi_tlp_static_valid <= 1'b1; + rwi_tlp_static_2nd <= 1'b1; + end + else if ( ((tickcount64[0+:16] & rw[240+:16]) == rw[240+:16]) & (rw[640+:32] > 0) & rw[224+2*0] ) begin // IDLE STATE (0) + rwi_tlp_static_has_data <= 1'b1; + rwi_tlp_static_2nd <= 1'b1; + rw[640+:32] <= rw[640+:32] - 1; // count - 1 + if ( rw[640+:32] == 32'h00000001 ) + rw[RWPOS_CFG_STATIC_TLP_TX_EN] <= 1'b0; + end + + end +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_cfgspace_shadow.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_cfgspace_shadow.sv new file mode 100644 index 0000000000000000000000000000000000000000..3aef0886d9a5e3c28f275fbac47701b1db176655 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_cfgspace_shadow.sv @@ -0,0 +1,105 @@ +// +// PCILeech FPGA. +// +// PCIe custom shadow configuration space. +// Xilinx PCIe core will take configuration space priority; if Xilinx PCIe core +// is configured to forward configuration requests to user application such TLP +// will end up being processed by this module. +// +// (c) Ulf Frisk, 2021-2022 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps + +module pcileech_pcie_cfgspace_shadow( + input rst, + input clk, + IfShadow2Fifo.src dshadow2fifo, + IfShadow2Tlp.shadow dshadow2tlp + ); + + wire int_rden; + wire int_wren; + wire [9:0] int_wr_addr; + wire [31:0] int_wr_data; + wire [9:0] int_rd_addr; + + // ---------------------------------------------------------------------------- + // WRITE multiplexor: simple naive multiplexor which will prioritize in order: + // (1) PCIe (if enabled), (2) USB, (3) INTERNAL. + // Collisions will be discarded (it's assumed that they'll be very rare) + // ---------------------------------------------------------------------------- + wire bram_wr_1_tlp = dshadow2tlp.rx_wren; + wire bram_wr_2_usb = ~bram_wr_1_tlp & dshadow2fifo.rx_wren; + wire bram_wr_3_int = ~bram_wr_1_tlp & ~bram_wr_2_usb & int_wren; + wire [3:0] bram_wr_be = bram_wr_1_tlp ? (dshadow2fifo.cfgtlp_wren ? dshadow2tlp.rx_be : 4'b0000) : (bram_wr_2_usb ? dshadow2fifo.rx_be : (bram_wr_3_int ? 4'b1111 : 4'b0000)); + wire [9:0] bram_wr_addr = bram_wr_1_tlp ? dshadow2tlp.rx_addr : (bram_wr_2_usb ? dshadow2fifo.rx_addr : int_wr_addr); + wire [31:0] bram_wr_data = bram_wr_1_tlp ? dshadow2tlp.rx_data : (bram_wr_2_usb ? dshadow2fifo.rx_data : int_wr_data); + + // ---------------------------------------------------------------------------- + // WRITE multiplexor and state machine: simple naive multiplexor which will prioritize in order: + // (1) PCIe (if enabled), (2) USB, (3) INTERNAL. + // Collisions will be discarded (it's assumed that they'll be very rare) + // ---------------------------------------------------------------------------- + `define S_SHADOW_CFGSPACE_IDLE 2'b00 + `define S_SHADOW_CFGSPACE_TLP 2'b01 + `define S_SHADOW_CFGSPACE_USB 2'b10 + `define S_SHADOW_CFGSPACE_INT 2'b11 + + wire [31:0] bram_rd_data; + wire bram_rd_1_tlp = dshadow2tlp.rx_rden; + wire bram_rd_2_usb = ~bram_rd_1_tlp & dshadow2fifo.rx_rden; + wire bram_rd_3_int = ~bram_rd_1_tlp & ~bram_rd_2_usb & int_rden; + wire [1:0] bram_rd_tp_3 = bram_rd_1_tlp ? `S_SHADOW_CFGSPACE_TLP : ( + bram_rd_2_usb ? `S_SHADOW_CFGSPACE_USB : ( + bram_rd_3_int ? `S_SHADOW_CFGSPACE_INT : `S_SHADOW_CFGSPACE_IDLE)); + wire [9:0] bram_rd_addr_3 = bram_rd_1_tlp ? dshadow2tlp.rx_addr : ( + bram_rd_2_usb ? dshadow2fifo.rx_addr : int_rd_addr); + wire [7:0] bram_rd_tag_3 = bram_rd_1_tlp ? dshadow2tlp.rx_tag : {7'h00, dshadow2fifo.rx_addr_lo}; + bit [9:0] bram_rd_addr, bram_rd_addr_2; + bit [7:0] bram_rd_tag, bram_rd_tag_2; + bit [1:0] bram_rd_tp, bram_rd_tp_2; + + always @ ( posedge clk ) + begin + bram_rd_addr <= bram_rd_addr_2; + bram_rd_tag <= bram_rd_tag_2; + bram_rd_tp <= bram_rd_tp_2; + bram_rd_addr_2 <= bram_rd_addr_3; + bram_rd_tag_2 <= bram_rd_tag_3; + bram_rd_tp_2 <= bram_rd_tp_3; + end + + // BRAM MEMORY ACCESS for the 4kB / 0x1000 byte shadow configuration space. + bram_pcie_cfgspace i_bram_pcie_cfgspace( + .clka ( clk ), + .clkb ( clk ), + .wea ( bram_wr_be ), + .addra ( bram_wr_addr ), + .dina ( bram_wr_data ), + .addrb ( bram_rd_addr_3 ), + .doutb ( bram_rd_data ) + ); + + assign dshadow2tlp.tx_valid = bram_wr_1_tlp | (bram_rd_tp == `S_SHADOW_CFGSPACE_TLP); + assign dshadow2tlp.tx_tlprd = ~bram_wr_1_tlp; + assign dshadow2tlp.tx_tag = bram_wr_1_tlp ? dshadow2tlp.rx_tag : bram_rd_tag; + assign dshadow2tlp.tx_data = dshadow2fifo.cfgtlp_zero ? 32'h00000000 : bram_rd_data; + + assign dshadow2fifo.tx_valid = (bram_rd_tp == `S_SHADOW_CFGSPACE_USB); + assign dshadow2fifo.tx_addr = bram_rd_addr; + assign dshadow2fifo.tx_addr_lo = bram_rd_tag[0]; + assign dshadow2fifo.tx_data = dshadow2fifo.cfgtlp_zero ? 32'h00000000 : bram_rd_data; + + // ---------------------------------------------------------------------------- + // INTERNAL LOGIC BELOW: + // ---------------------------------------------------------------------------- + + assign int_rden = 0; + assign int_wren = 0; + assign int_wr_addr = 0; + assign int_wr_data = 0; + assign int_rd_addr = 0; + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_tlp_a7.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_tlp_a7.sv new file mode 100644 index 0000000000000000000000000000000000000000..7eeb1bb318abc025a27e53e6ff065fba57df9dfc --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pcie_tlp_a7.sv @@ -0,0 +1,352 @@ +// +// PCILeech FPGA. +// +// PCIe controller module - TLP handling for Artix-7. +// +// (c) Ulf Frisk, 2018-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps +`include "pcileech_header.svh" + +module pcileech_pcie_tlp_a7( + input rst, + input clk_pcie, + input clk_sys, + IfPCIeFifoTlp.mp_pcie dfifo, + + // PCIe core receive/transmit data + IfAXIS128.source tlps_tx, + IfAXIS128.sink_lite tlps_rx, + IfAXIS128.sink tlps_static, + IfShadow2Fifo.shadow dshadow2fifo, + output wire int_enable, + input [15:0] pcie_id, + input [31:0] base_address_register + ); + + IfAXIS128 tlps_bar_rsp(); + IfAXIS128 tlps_cfg_rsp(); + + // ------------------------------------------------------------------------ + // Convert received TLPs from PCIe core and transmit onwards: + // ------------------------------------------------------------------------ + IfAXIS128 tlps_filtered(); + + pcileech_tlps128_bar_controller i_pcileech_tlps128_bar_controller( + .rst ( rst ), + .clk ( clk_pcie ), + .bar_en ( dshadow2fifo.bar_en ), + .int_enable (int_enable), + .pcie_id ( pcie_id ), + .base_address_register ( base_address_register ), + .tlps_in ( tlps_rx ), + .tlps_out ( tlps_bar_rsp.source ) + ); + + pcileech_tlps128_cfgspace_shadow i_pcileech_tlps128_cfgspace_shadow( + .rst ( rst ), + .clk_pcie ( clk_pcie ), + .clk_sys ( clk_sys ), + .tlps_in ( tlps_rx ), + .pcie_id ( pcie_id ), + .dshadow2fifo ( dshadow2fifo ), + .tlps_cfg_rsp ( tlps_cfg_rsp.source ) + ); + + pcileech_tlps128_filter i_pcileech_tlps128_filter( + .rst ( rst ), + .clk_pcie ( clk_pcie ), + .alltlp_filter ( dshadow2fifo.alltlp_filter ), + .cfgtlp_filter ( dshadow2fifo.cfgtlp_filter ), + .tlps_in ( tlps_rx ), + .tlps_out ( tlps_filtered.source_lite ) + ); + + pcileech_tlps128_dst_fifo i_pcileech_tlps128_dst_fifo( + .rst ( rst ), + .clk_pcie ( clk_pcie ), + .clk_sys ( clk_sys ), + .tlps_in ( tlps_filtered.sink_lite ), + .dfifo ( dfifo ) + ); + + // ------------------------------------------------------------------------ + // TX data received from FIFO + // ------------------------------------------------------------------------ + IfAXIS128 tlps_rx_fifo(); + + pcileech_tlps128_src_fifo i_pcileech_tlps128_src_fifo( + .rst ( rst ), + .clk_pcie ( clk_pcie ), + .clk_sys ( clk_sys ), + .dfifo_tx_data ( dfifo.tx_data ), + .dfifo_tx_last ( dfifo.tx_last ), + .dfifo_tx_valid ( dfifo.tx_valid ), + .tlps_out ( tlps_rx_fifo.source ) + ); + + pcileech_tlps128_sink_mux1 i_pcileech_tlps128_sink_mux1( + .rst ( rst ), + .clk_pcie ( clk_pcie ), + .tlps_out ( tlps_tx ), + .tlps_in1 ( tlps_cfg_rsp.sink ), + .tlps_in2 ( tlps_bar_rsp.sink ), + .tlps_in3 ( tlps_rx_fifo.sink ), + .tlps_in4 ( tlps_static ) + ); + +endmodule + + + +// ------------------------------------------------------------------------ +// TLP-AXI-STREAM destination: +// Forward the data to output device (FT601, etc.). +// ------------------------------------------------------------------------ +module pcileech_tlps128_dst_fifo( + input rst, + input clk_pcie, + input clk_sys, + IfAXIS128.sink_lite tlps_in, + IfPCIeFifoTlp.mp_pcie dfifo +); + + wire tvalid; + wire [127:0] tdata; + wire [3:0] tkeepdw; + wire tlast; + wire first; + + fifo_134_134_clk2 i_fifo_134_134_clk2 ( + .rst ( rst ), + .wr_clk ( clk_pcie ), + .rd_clk ( clk_sys ), + .din ( { tlps_in.tuser[0], tlps_in.tlast, tlps_in.tkeepdw, tlps_in.tdata } ), + .wr_en ( tlps_in.tvalid ), + .rd_en ( dfifo.rx_rd_en ), + .dout ( { first, tlast, tkeepdw, tdata } ), + .full ( ), + .empty ( ), + .valid ( tvalid ) + ); + + assign dfifo.rx_data[0] = tdata[31:0]; + assign dfifo.rx_data[1] = tdata[63:32]; + assign dfifo.rx_data[2] = tdata[95:64]; + assign dfifo.rx_data[3] = tdata[127:96]; + assign dfifo.rx_first[0] = first; + assign dfifo.rx_first[1] = 0; + assign dfifo.rx_first[2] = 0; + assign dfifo.rx_first[3] = 0; + assign dfifo.rx_last[0] = tlast && (tkeepdw == 4'b0001); + assign dfifo.rx_last[1] = tlast && (tkeepdw == 4'b0011); + assign dfifo.rx_last[2] = tlast && (tkeepdw == 4'b0111); + assign dfifo.rx_last[3] = tlast && (tkeepdw == 4'b1111); + assign dfifo.rx_valid[0] = tvalid && tkeepdw[0]; + assign dfifo.rx_valid[1] = tvalid && tkeepdw[1]; + assign dfifo.rx_valid[2] = tvalid && tkeepdw[2]; + assign dfifo.rx_valid[3] = tvalid && tkeepdw[3]; + +endmodule + + + +// ------------------------------------------------------------------------ +// TLP-AXI-STREAM FILTER: +// Filter away certain packet types such as CfgRd/CfgWr or non-Cpl/CplD +// ------------------------------------------------------------------------ +module pcileech_tlps128_filter( + input rst, + input clk_pcie, + input alltlp_filter, + input cfgtlp_filter, + IfAXIS128.sink_lite tlps_in, + IfAXIS128.source_lite tlps_out +); + + bit [127:0] tdata; + bit [3:0] tkeepdw; + bit tvalid = 0; + bit [8:0] tuser; + bit tlast; + + assign tlps_out.tdata = tdata; + assign tlps_out.tkeepdw = tkeepdw; + assign tlps_out.tvalid = tvalid; + assign tlps_out.tuser = tuser; + assign tlps_out.tlast = tlast; + + bit filter = 0; + wire first = tlps_in.tuser[0]; + wire is_tlphdr_cpl = first && ( + (tlps_in.tdata[31:25] == 7'b0000101) || // Cpl: Fmt[2:0]=000b (3 DW header, no data), Cpl=0101xb + (tlps_in.tdata[31:25] == 7'b0100101) // CplD: Fmt[2:0]=010b (3 DW header, data), CplD=0101xb + ); + wire is_tlphdr_cfg = first && ( + (tlps_in.tdata[31:25] == 7'b0000010) || // CfgRd: Fmt[2:0]=000b (3 DW header, no data), CfgRd0/CfgRd1=0010xb + (tlps_in.tdata[31:25] == 7'b0100010) // CfgWr: Fmt[2:0]=010b (3 DW header, data), CfgWr0/CfgWr1=0010xb + ); + wire filter_next = (filter && !first) || (cfgtlp_filter && first && is_tlphdr_cfg) || (alltlp_filter && first && !is_tlphdr_cpl && !is_tlphdr_cfg); + + always @ ( posedge clk_pcie ) begin + tdata <= tlps_in.tdata; + tkeepdw <= tlps_in.tkeepdw; + tvalid <= tlps_in.tvalid && !filter_next && !rst; + tuser <= tlps_in.tuser; + tlast <= tlps_in.tlast; + filter <= filter_next && !rst; + end + +endmodule + + + +// ------------------------------------------------------------------------ +// RX FROM FIFO - TLP-AXI-STREAM: +// Convert 32-bit incoming data to 128-bit TLP-AXI-STREAM to be sent onwards to mux/pcie core. +// ------------------------------------------------------------------------ +module pcileech_tlps128_src_fifo ( + input rst, + input clk_pcie, + input clk_sys, + input [31:0] dfifo_tx_data, + input dfifo_tx_last, + input dfifo_tx_valid, + IfAXIS128.source tlps_out +); + + // 1: 32-bit -> 128-bit state machine: + bit [127:0] tdata; + bit [3:0] tkeepdw = 0; + bit tlast; + bit first = 1; + wire tvalid = tlast || tkeepdw[3]; + + always @ ( posedge clk_sys ) + if ( rst ) begin + tkeepdw <= 0; + tlast <= 0; + first <= 1; + end + else begin + tlast <= dfifo_tx_valid && dfifo_tx_last; + tkeepdw <= tvalid ? (dfifo_tx_valid ? 4'b0001 : 4'b0000) : (dfifo_tx_valid ? ((tkeepdw << 1) | 1'b1) : tkeepdw); + first <= tvalid ? tlast : first; + if ( dfifo_tx_valid ) begin + if ( tvalid || !tkeepdw[0] ) + tdata[31:0] <= dfifo_tx_data; + if ( !tkeepdw[1] ) + tdata[63:32] <= dfifo_tx_data; + if ( !tkeepdw[2] ) + tdata[95:64] <= dfifo_tx_data; + if ( !tkeepdw[3] ) + tdata[127:96] <= dfifo_tx_data; + end + end + + // 2.1 - packet count (w/ safe fifo clock-crossing). + bit [10:0] pkt_count = 0; + wire pkt_count_dec = tlps_out.tvalid && tlps_out.tlast; + wire pkt_count_inc; + wire [10:0] pkt_count_next = pkt_count + pkt_count_inc - pkt_count_dec; + assign tlps_out.has_data = (pkt_count_next > 0); + + fifo_1_1_clk2 i_fifo_1_1_clk2( + .rst ( rst ), + .wr_clk ( clk_sys ), + .rd_clk ( clk_pcie ), + .din ( 1'b1 ), + .wr_en ( tvalid && tlast ), + .rd_en ( 1'b1 ), + .dout ( ), + .full ( ), + .empty ( ), + .valid ( pkt_count_inc ) + ); + + always @ ( posedge clk_pcie ) begin + pkt_count <= rst ? 0 : pkt_count_next; + end + + // 2.2 - submit to output fifo - will feed into mux/pcie core. + // together with 2.1 this will form a low-latency "packet fifo". + fifo_134_134_clk2_rxfifo i_fifo_134_134_clk2_rxfifo( + .rst ( rst ), + .wr_clk ( clk_sys ), + .rd_clk ( clk_pcie ), + .din ( { first, tlast, tkeepdw, tdata } ), + .wr_en ( tvalid ), + .rd_en ( tlps_out.tready && (pkt_count_next > 0) ), + .dout ( { tlps_out.tuser[0], tlps_out.tlast, tlps_out.tkeepdw, tlps_out.tdata } ), + .full ( ), + .empty ( ), + .valid ( tlps_out.tvalid ) + ); + +endmodule + + + +// ------------------------------------------------------------------------ +// RX MUX - TLP-AXI-STREAM: +// Select the TLP-AXI-STREAM with the highest priority (lowest number) and +// let it transmit its full packet. +// Each incoming stream must have latency of 1CLK. +// ------------------------------------------------------------------------ +module pcileech_tlps128_sink_mux1 ( + input clk_pcie, + input rst, + IfAXIS128.source tlps_out, + IfAXIS128.sink tlps_in1, + IfAXIS128.sink tlps_in2, + IfAXIS128.sink tlps_in3, + IfAXIS128.sink tlps_in4 +); + bit [2:0] id = 0; + + assign tlps_out.has_data = tlps_in1.has_data || tlps_in2.has_data || tlps_in3.has_data || tlps_in4.has_data; + + assign tlps_out.tdata = (id==1) ? tlps_in1.tdata : + (id==2) ? tlps_in2.tdata : + (id==3) ? tlps_in3.tdata : + (id==4) ? tlps_in4.tdata : 0; + + assign tlps_out.tkeepdw = (id==1) ? tlps_in1.tkeepdw : + (id==2) ? tlps_in2.tkeepdw : + (id==3) ? tlps_in3.tkeepdw : + (id==4) ? tlps_in4.tkeepdw : 0; + + assign tlps_out.tlast = (id==1) ? tlps_in1.tlast : + (id==2) ? tlps_in2.tlast : + (id==3) ? tlps_in3.tlast : + (id==4) ? tlps_in4.tlast : 0; + + assign tlps_out.tuser = (id==1) ? tlps_in1.tuser : + (id==2) ? tlps_in2.tuser : + (id==3) ? tlps_in3.tuser : + (id==4) ? tlps_in4.tuser : 0; + + assign tlps_out.tvalid = (id==1) ? tlps_in1.tvalid : + (id==2) ? tlps_in2.tvalid : + (id==3) ? tlps_in3.tvalid : + (id==4) ? tlps_in4.tvalid : 0; + + wire [2:0] id_next_newsel = tlps_in1.has_data ? 1 : + tlps_in2.has_data ? 2 : + tlps_in3.has_data ? 3 : + tlps_in4.has_data ? 4 : 0; + + wire [2:0] id_next = ((id==0) || (tlps_out.tvalid && tlps_out.tlast)) ? id_next_newsel : id; + + assign tlps_in1.tready = tlps_out.tready && (id_next==1); + assign tlps_in2.tready = tlps_out.tready && (id_next==2); + assign tlps_in3.tready = tlps_out.tready && (id_next==3); + assign tlps_in4.tready = tlps_out.tready && (id_next==4); + + always @ ( posedge clk_pcie ) begin + id <= rst ? 0 : id_next; + end + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pciescreamer_top.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pciescreamer_top.sv new file mode 100644 index 0000000000000000000000000000000000000000..e2e4a57667922ca7e18e5d814260876773a0d01c --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_pciescreamer_top.sv @@ -0,0 +1,134 @@ +// +// PCILeech FPGA. +// +// Top module for the PCIeScreamer Artix-7 board. +// +// (c) Ulf Frisk, 2018-2020 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps +`include "pcileech_header.svh" + +module pcileech_pciescreamer_top #( + // DEVICE IDs as follows: + // 0 = SP605, 1 = PCIeScreamer R1, 2 = AC701, 3 = PCIeScreamer R2, 4 = Screamer M2, 5 = NeTV2, 6-7 = RaptorDMA + parameter PARAM_DEVICE_ID = 3, + parameter PARAM_VERSION_NUMBER_MAJOR = 4, + parameter PARAM_VERSION_NUMBER_MINOR = 9, + parameter PARAM_CUSTOM_VALUE = 32'hffffffff +) ( + // SYS + input clk, + input ft601_clk, + + // SYSTEM LEDs and BUTTONs + //input user_btn_sw3_n, + //input user_btn_sw4_n, + //output user_led_ld1, + //output user_led_ld2, + + // PCI-E FABRIC + output [0:0] pcie_tx_p, + output [0:0] pcie_tx_n, + input [0:0] pcie_rx_p, + input [0:0] pcie_rx_n, + input pcie_clk_p, + input pcie_clk_n, + + // TO/FROM FT601 PADS + inout [31:0] ft601_data, + output [3:0] ft601_be, + input ft601_rxf_n, + input ft601_txe_n, + output ft601_wr_n, + output ft601_siwu_n, + output ft601_rd_n, + output ft601_oe_n + ); + + // SYS + //wire rst = ~user_btn_sw4_n; + + // FIFO CTL <--> COM CTL + IfComToFifo dcom_fifo(); + + // FIFO CTL <--> PCIe + IfPCIeFifoCfg dcfg(); + IfPCIeFifoTlp dtlp(); + IfPCIeFifoCore dpcie(); + IfShadow2Fifo dshadow2fifo(); + + // ---------------------------------------------------- + // FT601 (Buffered) + // ---------------------------------------------------- + + pcileech_com i_pcileech_com ( + // SYS + .clk ( clk ), + .clk_com ( ft601_clk ), + .rst ( rst ), + //.led_state_txdata ( user_led_ld1 ), // -> + //.led_state_invert ( ~user_btn_sw3_n ), // <- + // FIFO CTL <--> COM CTL + .dfifo ( dcom_fifo.mp_com ), + // TO/FROM FT601 PADS + .ft601_data ( ft601_data ), // <> [31:0] + .ft601_be ( ft601_be ), // -> [3:0] + .ft601_txe_n ( ft601_txe_n ), // <- + .ft601_rxf_n ( ft601_rxf_n ), // <- + .ft601_siwu_n ( ft601_siwu_n ), // -> + .ft601_wr_n ( ft601_wr_n ), // -> + .ft601_rd_n ( ft601_rd_n ), // -> + .ft601_oe_n ( ft601_oe_n ) // -> + ); + + // ---------------------------------------------------- + // FIFO CTL + // ---------------------------------------------------- + + pcileech_fifo #( + .PARAM_DEVICE_ID ( PARAM_DEVICE_ID ), + .PARAM_VERSION_NUMBER_MAJOR ( PARAM_VERSION_NUMBER_MAJOR ), + .PARAM_VERSION_NUMBER_MINOR ( PARAM_VERSION_NUMBER_MINOR ), + .PARAM_CUSTOM_VALUE ( PARAM_CUSTOM_VALUE ) + ) i_pcileech_fifo ( + .clk ( clk ), + .rst ( rst ), + .pcie_present ( 1'b0 ), // no hw support + .pcie_perst_n ( 1'b1 ), // no hw support + // FIFO CTL <--> COM CTL + .dcom ( dcom_fifo.mp_fifo ), + // FIFO CTL <--> PCIe + .dcfg ( dcfg.mp_fifo ), + .dtlp ( dtlp.mp_fifo ), + .dpcie ( dpcie.mp_fifo ), + .dshadow2fifo ( dshadow2fifo.fifo ) + ); + + // ---------------------------------------------------- + // PCIe + // ---------------------------------------------------- + + pcileech_pcie_a7 i_pcileech_pcie_a7( + .clk_100 ( clk ), + .rst ( rst ), + // PCIe fabric + .pcie_tx_p ( pcie_tx_p ), + .pcie_tx_n ( pcie_tx_n ), + .pcie_rx_p ( pcie_rx_p ), + .pcie_rx_n ( pcie_rx_n ), + .pcie_clk_p ( pcie_clk_p ), + .pcie_clk_n ( pcie_clk_n ), + .pcie_perst_n ( 1'b1 ), // no hw support + // State and Activity LEDs + //.led_state ( user_led_ld2 ), + // FIFO CTL <--> PCIe + .dfifo_cfg ( dcfg.mp_pcie ), + .dfifo_tlp ( dtlp.mp_pcie ), + .dfifo_pcie ( dpcie.mp_pcie ), + .dshadow2fifo_src ( dshadow2fifo.src ), + .dshadow2fifo_tlp ( dshadow2fifo.tlp ) + ); + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_screamer_m2_top.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_screamer_m2_top.sv new file mode 100644 index 0000000000000000000000000000000000000000..21f60ef6ec41c3c0e5a9725d73b15736e0be7a4f --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_screamer_m2_top.sv @@ -0,0 +1,159 @@ +// +// PCILeech FPGA. +// +// Top module for various 35T-325 x1 Artix-7 boards. +// +// (c) Ulf Frisk, 2019-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps +`include "pcileech_header.svh" + +module pcileech_screamer_m2_top #( + parameter PARAM_DEVICE_ID = 4, + parameter PARAM_VERSION_NUMBER_MAJOR = 4, + parameter PARAM_VERSION_NUMBER_MINOR = 13, + parameter PARAM_CUSTOM_VALUE = 32'hffffffff +) ( + // SYS + input clk, + input ft601_clk, + + // SYSTEM LEDs and BUTTONs + output user_ld1, + output user_ld2, + + // PCI-E FABRIC + output [0:0] pcie_tx_p, + output [0:0] pcie_tx_n, + input [0:0] pcie_rx_p, + input [0:0] pcie_rx_n, + input pcie_clk_p, + input pcie_clk_n, + input pcie_present, + input pcie_perst_n, + output reg pcie_wake_n = 1'b1, + + // TO/FROM FT601 PADS + output ft601_rst_n, + + inout [31:0] ft601_data, + output [3:0] ft601_be, + input ft601_rxf_n, + input ft601_txe_n, + output ft601_wr_n, + output ft601_siwu_n, + output ft601_rd_n, + output ft601_oe_n + ); + + // SYS + wire rst; + + // FIFO CTL <--> COM CTL + wire [63:0] com_dout; + wire com_dout_valid; + wire [255:0] com_din; + wire com_din_wr_en; + wire com_din_ready; + wire led_com; + wire led_pcie; + + // FIFO CTL <--> COM CTL + IfComToFifo dcom_fifo(); + + // FIFO CTL <--> PCIe + IfPCIeFifoCfg dcfg(); + IfPCIeFifoTlp dtlp(); + IfPCIeFifoCore dpcie(); + IfShadow2Fifo dshadow2fifo(); + + // ---------------------------------------------------- + // TickCount64 CLK + // ---------------------------------------------------- + + time tickcount64 = 0; + always @ ( posedge clk ) + tickcount64 <= tickcount64 + 1; + + assign rst = (tickcount64 < 64) ? 1'b1 : 1'b0; + assign ft601_rst_n = ~rst; + wire led_pwronblink = tickcount64[24] & (tickcount64[63:27] == 0); + + OBUF led_ld1_obuf(.O(user_ld1), .I(led_pcie)); + OBUF led_ld2_obuf(.O(user_ld2), .I(led_com)); + + // ---------------------------------------------------- + // BUFFERED COMMUNICATION DEVICE (FT601) + // ---------------------------------------------------- + + pcileech_com i_pcileech_com ( + // SYS + .clk ( clk ), + .clk_com ( ft601_clk ), + .rst ( rst ), + .led_state_txdata ( led_com ), // -> + .led_state_invert ( led_pwronblink ), // <- + // FIFO CTL <--> COM CTL + .dfifo ( dcom_fifo.mp_com ), + // TO/FROM FT601 PADS + .ft601_data ( ft601_data ), // <> [31:0] + .ft601_be ( ft601_be ), // -> [3:0] + .ft601_txe_n ( ft601_txe_n ), // <- + .ft601_rxf_n ( ft601_rxf_n ), // <- + .ft601_siwu_n ( ft601_siwu_n ), // -> + .ft601_wr_n ( ft601_wr_n ), // -> + .ft601_rd_n ( ft601_rd_n ), // -> + .ft601_oe_n ( ft601_oe_n ) // -> + ); + + // ---------------------------------------------------- + // FIFO CTL + // ---------------------------------------------------- + + pcileech_fifo #( + .PARAM_DEVICE_ID ( PARAM_DEVICE_ID ), + .PARAM_VERSION_NUMBER_MAJOR ( PARAM_VERSION_NUMBER_MAJOR ), + .PARAM_VERSION_NUMBER_MINOR ( PARAM_VERSION_NUMBER_MINOR ), + .PARAM_CUSTOM_VALUE ( PARAM_CUSTOM_VALUE ) + ) i_pcileech_fifo ( + .clk ( clk ), + .rst ( rst ), + .rst_cfg_reload ( 1'b0 ), + .pcie_present ( pcie_present ), + .pcie_perst_n ( pcie_perst_n ), + // FIFO CTL <--> COM CTL + .dcom ( dcom_fifo.mp_fifo ), + // FIFO CTL <--> PCIe + .dcfg ( dcfg.mp_fifo ), + .dtlp ( dtlp.mp_fifo ), + .dpcie ( dpcie.mp_fifo ), + .dshadow2fifo ( dshadow2fifo.fifo ) + ); + + // ---------------------------------------------------- + // PCIe + // ---------------------------------------------------- + + pcileech_pcie_a7 i_pcileech_pcie_a7( + .clk_sys ( clk ), + .rst ( rst ), + // PCIe fabric + .pcie_tx_p ( pcie_tx_p ), + .pcie_tx_n ( pcie_tx_n ), + .pcie_rx_p ( pcie_rx_p ), + .pcie_rx_n ( pcie_rx_n ), + .pcie_clk_p ( pcie_clk_p ), + .pcie_clk_n ( pcie_clk_n ), + .pcie_perst_n ( pcie_perst_n ), + // State and Activity LEDs + .led_state ( led_pcie ), + // FIFO CTL <--> PCIe + .dfifo_cfg ( dcfg.mp_pcie ), + .dfifo_tlp ( dtlp.mp_pcie ), + .dfifo_pcie ( dpcie.mp_pcie ), + .dshadow2fifo ( dshadow2fifo.shadow ) + ); + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_squirrel_top.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_squirrel_top.sv new file mode 100644 index 0000000000000000000000000000000000000000..e78bc7c7fcb751a54123ccf2dcd0ba56ac5a3ac5 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_squirrel_top.sv @@ -0,0 +1,166 @@ +// +// PCILeech FPGA. +// +// Top module for various 35T-484 x1 Artix-7 boards. +// +// (c) Ulf Frisk, 2019-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps +`include "pcileech_header.svh" + +module pcileech_squirrel_top #( + parameter PARAM_DEVICE_ID = 4, + parameter PARAM_VERSION_NUMBER_MAJOR = 4, + parameter PARAM_VERSION_NUMBER_MINOR = 13, + parameter PARAM_CUSTOM_VALUE = 32'hffffffff +) ( + // SYS + input clk, + input ft601_clk, + + // SYSTEM LEDs and BUTTONs + output user_ld1, + output user_ld2, + input user_sw1_n, + input user_sw2_n, + + output ft2232_rst_n, + + // PCI-E FABRIC + output [0:0] pcie_tx_p, + output [0:0] pcie_tx_n, + input [0:0] pcie_rx_p, + input [0:0] pcie_rx_n, + input pcie_clk_p, + input pcie_clk_n, + input pcie_present, + input pcie_perst_n, + output reg pcie_wake_n = 1'b1, + + // TO/FROM FT601 PADS + output ft601_rst_n, + inout [31:0] ft601_data, + output [3:0] ft601_be, + input ft601_rxf_n, + input ft601_txe_n, + output ft601_wr_n, + output ft601_siwu_n, + output ft601_rd_n, + output ft601_oe_n + ); + + // SYS + wire rst; + + // FIFO CTL <--> COM CTL + wire [63:0] com_dout; + wire com_dout_valid; + wire [255:0] com_din; + wire com_din_wr_en; + wire com_din_ready; + wire led_com; + wire led_pcie; + + // FIFO CTL <--> COM CTL + IfComToFifo dcom_fifo(); + + // FIFO CTL <--> PCIe + IfPCIeFifoCfg dcfg(); + IfPCIeFifoTlp dtlp(); + IfPCIeFifoCore dpcie(); + IfShadow2Fifo dshadow2fifo(); + + // ---------------------------------------------------- + // TickCount64 CLK + // ---------------------------------------------------- + + time tickcount64 = 0; + time tickcount64_reload = 0; + always @ ( posedge clk ) begin + tickcount64 <= user_sw2_n ? (tickcount64 + 1) : 0; + tickcount64_reload <= user_sw2_n ? 0 : (tickcount64_reload + 1); + end + + assign rst = ~user_sw2_n || ((tickcount64 < 64) ? 1'b1 : 1'b0); + assign ft601_rst_n = ~rst; + wire led_pwronblink = ~user_sw1_n ^ (tickcount64[24] & (tickcount64[63:27] == 0)); + + OBUF led_ld1_obuf(.O(user_ld1), .I(led_pcie)); + OBUF led_ld2_obuf(.O(user_ld2), .I(led_com)); + OBUF ft2232_rst_obuf(.O(ft2232_rst_n), .I(user_sw2_n)); + + // ---------------------------------------------------- + // BUFFERED COMMUNICATION DEVICE (FT601) + // ---------------------------------------------------- + + pcileech_com i_pcileech_com ( + // SYS + .clk ( clk ), + .clk_com ( ft601_clk ), + .rst ( rst ), + .led_state_txdata ( led_com ), // -> + .led_state_invert ( led_pwronblink ), // <- + // FIFO CTL <--> COM CTL + .dfifo ( dcom_fifo.mp_com ), + // TO/FROM FT601 PADS + .ft601_data ( ft601_data ), // <> [31:0] + .ft601_be ( ft601_be ), // -> [3:0] + .ft601_txe_n ( ft601_txe_n ), // <- + .ft601_rxf_n ( ft601_rxf_n ), // <- + .ft601_siwu_n ( ft601_siwu_n ), // -> + .ft601_wr_n ( ft601_wr_n ), // -> + .ft601_rd_n ( ft601_rd_n ), // -> + .ft601_oe_n ( ft601_oe_n ) // -> + ); + + // ---------------------------------------------------- + // FIFO CTL + // ---------------------------------------------------- + + pcileech_fifo #( + .PARAM_DEVICE_ID ( PARAM_DEVICE_ID ), + .PARAM_VERSION_NUMBER_MAJOR ( PARAM_VERSION_NUMBER_MAJOR ), + .PARAM_VERSION_NUMBER_MINOR ( PARAM_VERSION_NUMBER_MINOR ), + .PARAM_CUSTOM_VALUE ( PARAM_CUSTOM_VALUE ) + ) i_pcileech_fifo ( + .clk ( clk ), + .rst ( rst ), + .rst_cfg_reload ( (tickcount64_reload > 500000000) ? 1'b1 : 1'b0 ), // config reload after 5s button press + .pcie_present ( pcie_present ), + .pcie_perst_n ( pcie_perst_n ), + // FIFO CTL <--> COM CTL + .dcom ( dcom_fifo.mp_fifo ), + // FIFO CTL <--> PCIe + .dcfg ( dcfg.mp_fifo ), + .dtlp ( dtlp.mp_fifo ), + .dpcie ( dpcie.mp_fifo ), + .dshadow2fifo ( dshadow2fifo.fifo ) + ); + + // ---------------------------------------------------- + // PCIe + // ---------------------------------------------------- + + pcileech_pcie_a7 i_pcileech_pcie_a7( + .clk_sys ( clk ), + .rst ( rst ), + // PCIe fabric + .pcie_tx_p ( pcie_tx_p ), + .pcie_tx_n ( pcie_tx_n ), + .pcie_rx_p ( pcie_rx_p ), + .pcie_rx_n ( pcie_rx_n ), + .pcie_clk_p ( pcie_clk_p ), + .pcie_clk_n ( pcie_clk_n ), + .pcie_perst_n ( pcie_perst_n ), + // State and Activity LEDs + .led_state ( led_pcie ), + // FIFO CTL <--> PCIe + .dfifo_cfg ( dcfg.mp_pcie ), + .dfifo_tlp ( dtlp.mp_pcie ), + .dfifo_pcie ( dpcie.mp_pcie ), + .dshadow2fifo ( dshadow2fifo.shadow ) + ); + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_tbx4_100t_top.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_tbx4_100t_top.sv new file mode 100644 index 0000000000000000000000000000000000000000..ed531075639b4652c795b09b5fa6ddcccc339915 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_tbx4_100t_top.sv @@ -0,0 +1,167 @@ +// +// PCILeech FPGA. +// +// Top module for PCILeech TB x4 +// +// (c) Ulf Frisk, 2019-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps +`include "pcileech_header.svh" + +module pcileech_tbx4_100t_top #( + // DEVICE IDs as follows: + parameter PARAM_DEVICE_ID = 17, + parameter PARAM_VERSION_NUMBER_MAJOR = 4, + parameter PARAM_VERSION_NUMBER_MINOR = 14, + parameter PARAM_CUSTOM_VALUE = 32'hffffffff +) ( + // SYS + input clk_in, + + // SYSTEM LEDs and BUTTONs + output pcie_led, + + // TO/FROM FPGA IO BRIDGE + input [36:0] BUS_DO, + output [68:0] BUS_DI, + input BUS_DI_PROG_FULL, + + // PCI-E FABRIC + output [3:0] pcie_tx_p, + output [3:0] pcie_tx_n, + input [3:0] pcie_rx_p, + input [3:0] pcie_rx_n, + input pcie_clk_p, + input pcie_clk_n, + input pcie_present1, + input pcie_present2, + input pcie_perst1_n, + input pcie_perst2_n + ); + + // SYS + wire rst; + wire clk; + wire clk_com; + + // FIFO CTL <--> COM CTL + wire [63:0] com_dout; + wire com_dout_valid; + wire [255:0] com_din; + wire com_din_wr_en; + wire com_din_ready; + + // FIFO CTL <--> COM CTL + IfComToFifo dcom_fifo(); + + // FIFO CTL <--> PCIe + IfPCIeFifoCfg dcfg(); + IfPCIeFifoTlp dtlp(); + IfPCIeFifoCore dpcie(); + IfShadow2Fifo dshadow2fifo(); + + // PCIe + wire pcie_present = pcie_present1 && pcie_present2; + wire pcie_perst_n = pcie_perst1_n && pcie_perst2_n; + + // ---------------------------------------------------- + // CLK: INPUT (clkin): 50MHz + // COM (clk_com): 250MHz + // SYS (clk): 125MHz + // ---------------------------------------------------- + + wire clk_locked, clk_out1, clk_out2; + clk_wiz_0 i_clk_wiz_0( + .clk_in1 ( clk_in ), // <- 50MHz + .clk_out1 ( clk_out1 ), // -> 250MHz + .clk_out2 ( clk_out2 ), // -> 125MHz + .locked ( clk_locked ) + ); + + BUFG i_BUFG_1 ( .I( clk_locked ? clk_out1 : clk_in ), .O( clk_com ) ); + BUFG i_BUFG_2 ( .I( clk_locked ? clk_out2 : clk_in ), .O( clk ) ); + + // ---------------------------------------------------- + // TickCount64 CLK + // ---------------------------------------------------- + + time tickcount64 = 0; + always @ ( posedge clk ) + tickcount64 <= tickcount64 + 1; + assign rst = (tickcount64 < 64) ? 1'b1 : 1'b0; + + wire led_pcie; + OBUF led_ld1_obuf(.O(pcie_led), .I(led_pcie)); + + // ---------------------------------------------------- + // BUFFERED COMMUNICATION DEVICE (FPGA IO BRIDGE) + // ---------------------------------------------------- + + pcileech_com i_pcileech_com ( + // SYS + .clk ( clk ), + .clk_com ( clk_com ), + .rst ( rst ), + // TO/FROM FPGA IO BRIDGE + .BUS_DO ( BUS_DO ), + .BUS_DI ( BUS_DI ), + .BUS_DI_PROG_FULL ( BUS_DI_PROG_FULL ), + // FIFO CTL <--> COM CTL + .com_dout ( dcom_fifo.com_dout ), + .com_dout_valid ( dcom_fifo.com_dout_valid ), + .com_din_ready ( dcom_fifo.com_din_ready ), + .com_din ( dcom_fifo.com_din ), + .com_din_wr_en ( dcom_fifo.com_din_wr_en ) + ); + + // ---------------------------------------------------- + // FIFO CTL + // ---------------------------------------------------- + + pcileech_fifo #( + .PARAM_DEVICE_ID ( PARAM_DEVICE_ID ), + .PARAM_VERSION_NUMBER_MAJOR ( PARAM_VERSION_NUMBER_MAJOR ), + .PARAM_VERSION_NUMBER_MINOR ( PARAM_VERSION_NUMBER_MINOR ), + .PARAM_CUSTOM_VALUE ( PARAM_CUSTOM_VALUE ) + ) i_pcileech_fifo ( + .clk ( clk ), + .rst ( rst ), + .rst_cfg_reload ( 1'b0 ), + .pcie_present ( pcie_present ), + .pcie_perst_n ( pcie_perst_n ), + // FIFO CTL <--> COM CTL + .dcom ( dcom_fifo.mp_fifo ), + // FIFO CTL <--> PCIe + .dcfg ( dcfg.mp_fifo ), + .dtlp ( dtlp.mp_fifo ), + .dpcie ( dpcie.mp_fifo ), + .dshadow2fifo ( dshadow2fifo.fifo ) + ); + + // ---------------------------------------------------- + // PCIe + // ---------------------------------------------------- + + pcileech_pcie_a7x4 i_pcileech_pcie_a7x4( + .clk_sys ( clk ), + .rst ( rst ), + // PCIe fabric + .pcie_tx_p ( pcie_tx_p ), + .pcie_tx_n ( pcie_tx_n ), + .pcie_rx_p ( pcie_rx_p ), + .pcie_rx_n ( pcie_rx_n ), + .pcie_clk_p ( pcie_clk_p ), + .pcie_clk_n ( pcie_clk_n ), + .pcie_perst_n ( pcie_perst_n ), + // State and Activity LEDs + .led_state ( led_pcie ), + // FIFO CTL <--> PCIe + .dfifo_cfg ( dcfg.mp_pcie ), + .dfifo_tlp ( dtlp.mp_pcie ), + .dfifo_pcie ( dpcie.mp_pcie ), + .dshadow2fifo ( dshadow2fifo.shadow ) + ); + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_tlps128_bar_controller.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_tlps128_bar_controller.sv new file mode 100644 index 0000000000000000000000000000000000000000..6209f8cdec5701c8daab17e09bb09d73f3b38bd4 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_tlps128_bar_controller.sv @@ -0,0 +1,952 @@ +// +// PCILeech FPGA. +// +// PCIe BAR PIO controller. +// +// The PCILeech BAR PIO controller allows for easy user-implementation on top +// of the PCILeech AXIS128 PCIe TLP streaming interface. +// The controller consists of a read engine and a write engine and pluggable +// user-implemented PCIe BAR implementations (found at bottom of the file). +// +// Considerations: +// - The core handles 1 DWORD read + 1 DWORD write per CLK max. If a lot of +// data is written / read from the TLP streaming interface the core may +// drop packet silently. +// - The core reads 1 DWORD of data (without byte enable) per CLK. +// - The core writes 1 DWORD of data (with byte enable) per CLK. +// - All user-implemented cores must have the same latency in CLKs for the +// returned read data or else undefined behavior will take place. +// - 32-bit addresses are passed for read/writes. Larger BARs than 4GB are +// not supported due to addressing constraints. Lower bits (LSBs) are the +// BAR offset, Higher bits (MSBs) are the 32-bit base address of the BAR. +// - DO NOT edit read/write engines. +// - DO edit pcileech_tlps128_bar_controller (to swap bar implementations). +// - DO edit the bar implementations (at bottom of the file, if neccessary). +// +// Example implementations exists below, swap out any of the example cores +// against a core of your use case, or modify existing cores. +// Following test cores exist (see below in this file): +// - pcileech_bar_impl_zerowrite4k = zero-initialized read/write BAR. +// It's possible to modify contents by use of .coe file. +// - pcileech_bar_impl_loopaddr = test core that loops back the 32-bit +// address of the current read. Does not support writes. +// - pcileech_bar_impl_none = core without any reply. +// +// (c) Ulf Frisk, 2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps +`include "pcileech_header.svh" + +module pcileech_tlps128_bar_controller( + input rst, + input clk, + input bar_en, + input [15:0] pcie_id, + input [31:0] base_address_register, + output wire int_enable, + IfAXIS128.sink_lite tlps_in, + IfAXIS128.source tlps_out +); + + // ------------------------------------------------------------------------ + // 1: TLP RECEIVE: + // Receive incoming BAR requests from the TLP stream: + // send them onwards to read and write FIFOs + // ------------------------------------------------------------------------ + wire in_is_wr_ready; + bit in_is_wr_last; + wire in_is_first = tlps_in.tuser[0]; + wire in_is_bar = bar_en && (tlps_in.tuser[8:2] != 0); + wire in_is_rd = (in_is_first && tlps_in.tlast && ((tlps_in.tdata[31:25] == 7'b0000000) || (tlps_in.tdata[31:25] == 7'b0010000) || (tlps_in.tdata[31:24] == 8'b00000010))); + wire in_is_wr = in_is_wr_last || (in_is_first && in_is_wr_ready && ((tlps_in.tdata[31:25] == 7'b0100000) || (tlps_in.tdata[31:25] == 7'b0110000) || (tlps_in.tdata[31:24] == 8'b01000010))); + + always @ ( posedge clk ) + if ( rst ) begin + in_is_wr_last <= 0; + end + else if ( tlps_in.tvalid ) begin + in_is_wr_last <= !tlps_in.tlast && in_is_wr; + end + + wire [6:0] wr_bar; + wire [31:0] wr_addr; + wire [3:0] wr_be; + wire [31:0] wr_data; + wire wr_valid; + wire [87:0] rd_req_ctx; + wire [6:0] rd_req_bar; + wire [31:0] rd_req_addr; + wire [3:0] rd_req_be; + wire rd_req_valid; + wire [87:0] rd_rsp_ctx; + wire [31:0] rd_rsp_data; + wire rd_rsp_valid; + + pcileech_tlps128_bar_rdengine i_pcileech_tlps128_bar_rdengine( + .rst ( rst ), + .clk ( clk ), + // TLPs: + .pcie_id ( pcie_id ), + .tlps_in ( tlps_in ), + .tlps_in_valid ( tlps_in.tvalid && in_is_bar && in_is_rd ), + .tlps_out ( tlps_out ), + // BAR reads: + .rd_req_ctx ( rd_req_ctx ), + .rd_req_bar ( rd_req_bar ), + .rd_req_addr ( rd_req_addr ), + .rd_req_be ( rd_req_be ), + .rd_req_valid ( rd_req_valid ), + .rd_rsp_ctx ( rd_rsp_ctx ), + .rd_rsp_data ( rd_rsp_data ), + .rd_rsp_valid ( rd_rsp_valid ) + ); + + pcileech_tlps128_bar_wrengine i_pcileech_tlps128_bar_wrengine( + .rst ( rst ), + .clk ( clk ), + // TLPs: + .tlps_in ( tlps_in ), + .tlps_in_valid ( tlps_in.tvalid && in_is_bar && in_is_wr ), + .tlps_in_ready ( in_is_wr_ready ), + // outgoing BAR writes: + .wr_bar ( wr_bar ), + .wr_addr ( wr_addr ), + .wr_be ( wr_be ), + .wr_data ( wr_data ), + .wr_valid ( wr_valid ) + ); + + wire [87:0] bar_rsp_ctx[7]; + wire [31:0] bar_rsp_data[7]; + wire bar_rsp_valid[7]; + + assign rd_rsp_ctx = bar_rsp_valid[0] ? bar_rsp_ctx[0] : + bar_rsp_valid[1] ? bar_rsp_ctx[1] : + bar_rsp_valid[2] ? bar_rsp_ctx[2] : + bar_rsp_valid[3] ? bar_rsp_ctx[3] : + bar_rsp_valid[4] ? bar_rsp_ctx[4] : + bar_rsp_valid[5] ? bar_rsp_ctx[5] : + bar_rsp_valid[6] ? bar_rsp_ctx[6] : 0; + assign rd_rsp_data = bar_rsp_valid[0] ? bar_rsp_data[0] : + bar_rsp_valid[1] ? bar_rsp_data[1] : + bar_rsp_valid[2] ? bar_rsp_data[2] : + bar_rsp_valid[3] ? bar_rsp_data[3] : + bar_rsp_valid[4] ? bar_rsp_data[4] : + bar_rsp_valid[5] ? bar_rsp_data[5] : + bar_rsp_valid[6] ? bar_rsp_data[6] : 0; + assign rd_rsp_valid = bar_rsp_valid[0] || bar_rsp_valid[1] || bar_rsp_valid[2] || bar_rsp_valid[3] || bar_rsp_valid[4] || bar_rsp_valid[5] || bar_rsp_valid[6]; + + pcileech_bar_impl_RTL8188EE_wifi i_bar2( + .rst ( rst ), + .clk ( clk ), + .wr_addr ( wr_addr ), + .wr_be ( wr_be ), + .wr_data ( wr_data ), + .wr_valid ( wr_valid && wr_bar[2] ), + .rd_req_ctx ( rd_req_ctx ), + .rd_req_addr ( rd_req_addr ), + .rd_req_be ( rd_req_be ), + .rd_req_valid ( rd_req_valid && rd_req_bar[2] ), + .int_enable ( int_enable ), + .base_address_register ( base_address_register ), + .rd_rsp_ctx ( bar_rsp_ctx[2] ), + .rd_rsp_data ( bar_rsp_data[2] ), + .rd_rsp_valid ( bar_rsp_valid[2] ) + ); + + pcileech_bar_impl_loopaddr i_bar1( + .rst ( rst ), + .clk ( clk ), + .wr_addr ( wr_addr ), + .wr_be ( wr_be ), + .wr_data ( wr_data ), + .wr_valid ( wr_valid && wr_bar[1] ), + .rd_req_ctx ( rd_req_ctx ), + .rd_req_addr ( rd_req_addr ), + .rd_req_valid ( rd_req_valid && rd_req_bar[1] ), + .rd_rsp_ctx ( bar_rsp_ctx[1] ), + .rd_rsp_data ( bar_rsp_data[1] ), + .rd_rsp_valid ( bar_rsp_valid[1] ) + ); + + pcileech_bar_impl_none i_bar0( + .rst ( rst ), + .clk ( clk ), + .wr_addr ( wr_addr ), + .wr_be ( wr_be ), + .wr_data ( wr_data ), + .wr_valid ( wr_valid && wr_bar[0] ), + .rd_req_ctx ( rd_req_ctx ), + .rd_req_addr ( rd_req_addr ), + .rd_req_valid ( rd_req_valid && rd_req_bar[0] ), + .rd_rsp_ctx ( bar_rsp_ctx[0] ), + .rd_rsp_data ( bar_rsp_data[0] ), + .rd_rsp_valid ( bar_rsp_valid[0] ) + ); + + pcileech_bar_impl_none i_bar3( + .rst ( rst ), + .clk ( clk ), + .wr_addr ( wr_addr ), + .wr_be ( wr_be ), + .wr_data ( wr_data ), + .wr_valid ( wr_valid && wr_bar[3] ), + .rd_req_ctx ( rd_req_ctx ), + .rd_req_addr ( rd_req_addr ), + .rd_req_valid ( rd_req_valid && rd_req_bar[3] ), + .rd_rsp_ctx ( bar_rsp_ctx[3] ), + .rd_rsp_data ( bar_rsp_data[3] ), + .rd_rsp_valid ( bar_rsp_valid[3] ) + ); + + pcileech_bar_impl_none i_bar4( + .rst ( rst ), + .clk ( clk ), + .wr_addr ( wr_addr ), + .wr_be ( wr_be ), + .wr_data ( wr_data ), + .wr_valid ( wr_valid && wr_bar[4] ), + .rd_req_ctx ( rd_req_ctx ), + .rd_req_addr ( rd_req_addr ), + .rd_req_valid ( rd_req_valid && rd_req_bar[4] ), + .rd_rsp_ctx ( bar_rsp_ctx[4] ), + .rd_rsp_data ( bar_rsp_data[4] ), + .rd_rsp_valid ( bar_rsp_valid[4] ) + ); + + pcileech_bar_impl_none i_bar5( + .rst ( rst ), + .clk ( clk ), + .wr_addr ( wr_addr ), + .wr_be ( wr_be ), + .wr_data ( wr_data ), + .wr_valid ( wr_valid && wr_bar[5] ), + .rd_req_ctx ( rd_req_ctx ), + .rd_req_addr ( rd_req_addr ), + .rd_req_valid ( rd_req_valid && rd_req_bar[5] ), + .rd_rsp_ctx ( bar_rsp_ctx[5] ), + .rd_rsp_data ( bar_rsp_data[5] ), + .rd_rsp_valid ( bar_rsp_valid[5] ) + ); + + pcileech_bar_impl_none i_bar6_optrom( + .rst ( rst ), + .clk ( clk ), + .wr_addr ( wr_addr ), + .wr_be ( wr_be ), + .wr_data ( wr_data ), + .wr_valid ( wr_valid && wr_bar[6] ), + .rd_req_ctx ( rd_req_ctx ), + .rd_req_addr ( rd_req_addr ), + .rd_req_valid ( rd_req_valid && rd_req_bar[6] ), + .rd_rsp_ctx ( bar_rsp_ctx[6] ), + .rd_rsp_data ( bar_rsp_data[6] ), + .rd_rsp_valid ( bar_rsp_valid[6] ) + ); + + +endmodule + + + +// ------------------------------------------------------------------------ +// BAR WRITE ENGINE: +// Receives BAR WRITE TLPs and output BAR WRITE requests. +// Holds a 2048-byte buffer. +// Input flow rate is 16bytes/CLK (max). +// Output flow rate is 4bytes/CLK. +// If write engine overflows incoming TLP is completely discarded silently. +// ------------------------------------------------------------------------ +module pcileech_tlps128_bar_wrengine( + input rst, + input clk, + // TLPs: + IfAXIS128.sink_lite tlps_in, + input tlps_in_valid, + output tlps_in_ready, + // outgoing BAR writes: + output bit [6:0] wr_bar, + output bit [31:0] wr_addr, + output bit [3:0] wr_be, + output bit [31:0] wr_data, + output bit wr_valid +); + + wire f_rd_en; + wire [127:0] f_tdata; + wire [3:0] f_tkeepdw; + wire [8:0] f_tuser; + wire f_tvalid; + + bit [127:0] tdata; + bit [3:0] tkeepdw; + bit tlast; + + bit [3:0] be_first; + bit [3:0] be_last; + bit first_dw; + bit [31:0] addr; + + fifo_141_141_clk1_bar_wr i_fifo_141_141_clk1_bar_wr( + .srst ( rst ), + .clk ( clk ), + .wr_en ( tlps_in_valid ), + .din ( {tlps_in.tuser[8:0], tlps_in.tkeepdw, tlps_in.tdata} ), + .full ( ), + .prog_empty ( tlps_in_ready ), + .rd_en ( f_rd_en ), + .dout ( {f_tuser, f_tkeepdw, f_tdata} ), + .empty ( ), + .valid ( f_tvalid ) + ); + + // STATE MACHINE: + `define S_ENGINE_IDLE 3'h0 + `define S_ENGINE_FIRST 3'h1 + `define S_ENGINE_4DW_REQDATA 3'h2 + `define S_ENGINE_TX0 3'h4 + `define S_ENGINE_TX1 3'h5 + `define S_ENGINE_TX2 3'h6 + `define S_ENGINE_TX3 3'h7 + (* KEEP = "TRUE" *) bit [3:0] state = `S_ENGINE_IDLE; + + assign f_rd_en = (state == `S_ENGINE_IDLE) || + (state == `S_ENGINE_4DW_REQDATA) || + (state == `S_ENGINE_TX3) || + ((state == `S_ENGINE_TX2 && !tkeepdw[3])) || + ((state == `S_ENGINE_TX1 && !tkeepdw[2])) || + ((state == `S_ENGINE_TX0 && !f_tkeepdw[1])); + + always @ ( posedge clk ) begin + wr_addr <= addr; + wr_valid <= ((state == `S_ENGINE_TX0) && f_tvalid) || (state == `S_ENGINE_TX1) || (state == `S_ENGINE_TX2) || (state == `S_ENGINE_TX3); + + end + + always @ ( posedge clk ) + if ( rst ) begin + state <= `S_ENGINE_IDLE; + end + else case ( state ) + `S_ENGINE_IDLE: begin + state <= `S_ENGINE_FIRST; + end + `S_ENGINE_FIRST: begin + if ( f_tvalid && f_tuser[0] ) begin + wr_bar <= f_tuser[8:2]; + tdata <= f_tdata; + tkeepdw <= f_tkeepdw; + tlast <= f_tuser[1]; + first_dw <= 1; + be_first <= f_tdata[35:32]; + be_last <= f_tdata[39:36]; + if ( f_tdata[31:29] == 8'b010 ) begin // 3 DW header, with data + addr <= { f_tdata[95:66], 2'b00 }; + state <= `S_ENGINE_TX3; + end + else if ( f_tdata[31:29] == 8'b011 ) begin // 4 DW header, with data + addr <= { f_tdata[127:98], 2'b00 }; + state <= `S_ENGINE_4DW_REQDATA; + end + end + else begin + state <= `S_ENGINE_IDLE; + end + end + `S_ENGINE_4DW_REQDATA: begin + state <= `S_ENGINE_TX0; + end + `S_ENGINE_TX0: begin + tdata <= f_tdata; + tkeepdw <= f_tkeepdw; + tlast <= f_tuser[1]; + addr <= addr + 4; + wr_data <= { f_tdata[0+00+:8], f_tdata[0+08+:8], f_tdata[0+16+:8], f_tdata[0+24+:8] }; + first_dw <= 0; + wr_be <= first_dw ? be_first : (f_tkeepdw[1] ? 4'hf : be_last); + state <= f_tvalid ? (f_tkeepdw[1] ? `S_ENGINE_TX1 : `S_ENGINE_FIRST) : `S_ENGINE_IDLE; + end + `S_ENGINE_TX1: begin + addr <= addr + 4; + wr_data <= { tdata[32+00+:8], tdata[32+08+:8], tdata[32+16+:8], tdata[32+24+:8] }; + first_dw <= 0; + wr_be <= first_dw ? be_first : (tkeepdw[2] ? 4'hf : be_last); + state <= tkeepdw[2] ? `S_ENGINE_TX2 : `S_ENGINE_FIRST; + end + `S_ENGINE_TX2: begin + addr <= addr + 4; + wr_data <= { tdata[64+00+:8], tdata[64+08+:8], tdata[64+16+:8], tdata[64+24+:8] }; + first_dw <= 0; + wr_be <= first_dw ? be_first : (tkeepdw[3] ? 4'hf : be_last); + state <= tkeepdw[3] ? `S_ENGINE_TX3 : `S_ENGINE_FIRST; + end + `S_ENGINE_TX3: begin + addr <= addr + 4; + wr_data <= { tdata[96+00+:8], tdata[96+08+:8], tdata[96+16+:8], tdata[96+24+:8] }; + first_dw <= 0; + wr_be <= first_dw ? be_first : (!tlast ? 4'hf : be_last); + state <= !tlast ? `S_ENGINE_TX0 : `S_ENGINE_FIRST; + end + endcase + +endmodule + + + +// ------------------------------------------------------------------------ +// BAR READ ENGINE: +// Receives BAR READ TLPs and output BAR READ requests. +// ------------------------------------------------------------------------ +module pcileech_tlps128_bar_rdengine( + input rst, + input clk, + // TLPs: + input [15:0] pcie_id, + IfAXIS128.sink_lite tlps_in, + input tlps_in_valid, + IfAXIS128.source tlps_out, + // BAR reads: + output [87:0] rd_req_ctx, + output [6:0] rd_req_bar, + output [31:0] rd_req_addr, + output rd_req_valid, + output [3:0] rd_req_be, + input [87:0] rd_rsp_ctx, + input [31:0] rd_rsp_data, + input rd_rsp_valid +); + // ------------------------------------------------------------------------ + // 1: PROCESS AND QUEUE INCOMING READ TLPs: + // ------------------------------------------------------------------------ + wire [10:0] rd1_in_dwlen = (tlps_in.tdata[9:0] == 0) ? 11'd1024 : {1'b0, tlps_in.tdata[9:0]}; + wire [6:0] rd1_in_bar = tlps_in.tuser[8:2]; + wire [15:0] rd1_in_reqid = tlps_in.tdata[63:48]; + wire [7:0] rd1_in_tag = tlps_in.tdata[47:40]; + wire [31:0] rd1_in_addr = { ((tlps_in.tdata[31:29] == 3'b000) ? tlps_in.tdata[95:66] : tlps_in.tdata[127:98]), 2'b00 }; + wire [3:0] rd1_in_be = tlps_in.tdata[35:32]; + wire [73:0] rd1_in_data; + assign rd1_in_data[73:63] = rd1_in_dwlen; + assign rd1_in_data[62:56] = rd1_in_bar; + assign rd1_in_data[55:48] = rd1_in_tag; + assign rd1_in_data[47:32] = rd1_in_reqid; + assign rd1_in_data[31:0] = rd1_in_addr; + + + wire [3:0] rd1_out_be; + wire rd1_out_be_valid; + wire rd1_out_rden; + wire [73:0] rd1_out_data; + wire rd1_out_valid; + + fifo_74_74_clk1_bar_rd1 i_fifo_74_74_clk1_bar_rd1( + .srst ( rst ), + .clk ( clk ), + .wr_en ( tlps_in_valid ), + .din ( rd1_in_data ), + .full ( ), + .rd_en ( rd1_out_rden ), + .dout ( rd1_out_data ), + .empty ( ), + .valid ( rd1_out_valid ) + ); + fifo_4_4_clk1_bar_rd1 i_fifo_4_4_clk1_bar_rd1 ( + .srst ( rst ), + .clk ( clk ), + .wr_en ( tlps_in_valid ), + .din ( rd1_in_be ), + .full ( ), + .rd_en ( rd1_out_rden ), + .dout ( rd1_out_be ), + .empty ( ), + .valid ( rd1_out_be_valid ) + + ); + + // ------------------------------------------------------------------------ + // 2: PROCESS AND SPLIT READ TLPs INTO RESPONSE TLP READ REQUESTS AND QUEUE: + // (READ REQUESTS LARGER THAN 128-BYTES WILL BE SPLIT INTO MULTIPLE). + // ------------------------------------------------------------------------ + + wire [10:0] rd1_out_dwlen = rd1_out_data[73:63]; + wire [4:0] rd1_out_dwlen5 = rd1_out_data[67:63]; + wire [4:0] rd1_out_addr5 = rd1_out_data[6:2]; + + // 1st "instant" packet: + wire [4:0] rd2_pkt1_dwlen_pre = ((rd1_out_addr5 + rd1_out_dwlen5 > 6'h20) || ((rd1_out_addr5 != 0) && (rd1_out_dwlen5 == 0))) ? (6'h20 - rd1_out_addr5) : rd1_out_dwlen5; + wire [5:0] rd2_pkt1_dwlen = (rd2_pkt1_dwlen_pre == 0) ? 6'h20 : rd2_pkt1_dwlen_pre; + wire [10:0] rd2_pkt1_dwlen_next = rd1_out_dwlen - rd2_pkt1_dwlen; + wire rd2_pkt1_large = (rd1_out_dwlen > 32) || (rd1_out_dwlen != rd2_pkt1_dwlen); + wire rd2_pkt1_tiny = (rd1_out_dwlen == 1); + wire [11:0] rd2_pkt1_bc = rd1_out_dwlen << 2; + wire [85:0] rd2_pkt1; + assign rd2_pkt1[85:74] = rd2_pkt1_bc; + assign rd2_pkt1[73:63] = rd2_pkt1_dwlen; + assign rd2_pkt1[62:0] = rd1_out_data[62:0]; + + // Nth packet (if split should take place): + bit [10:0] rd2_total_dwlen; + wire [10:0] rd2_total_dwlen_next = rd2_total_dwlen - 11'h20; + + bit [85:0] rd2_pkt2; + wire [10:0] rd2_pkt2_dwlen = rd2_pkt2[73:63]; + wire rd2_pkt2_large = (rd2_total_dwlen > 11'h20); + + wire rd2_out_rden; + + // STATE MACHINE: + `define S2_ENGINE_REQDATA 1'h0 + `define S2_ENGINE_PROCESSING 1'h1 + (* KEEP = "TRUE" *) bit [0:0] state2 = `S2_ENGINE_REQDATA; + + always @ ( posedge clk ) + if ( rst ) begin + state2 <= `S2_ENGINE_REQDATA; + end + else case ( state2 ) + `S2_ENGINE_REQDATA: begin + if ( rd1_out_valid && rd2_pkt1_large ) begin + rd2_total_dwlen <= rd2_pkt1_dwlen_next; // dwlen (total remaining) + rd2_pkt2[85:74] <= rd2_pkt1_dwlen_next << 2; // byte-count + rd2_pkt2[73:63] <= (rd2_pkt1_dwlen_next > 11'h20) ? 11'h20 : rd2_pkt1_dwlen_next; // dwlen next + rd2_pkt2[62:12] <= rd1_out_data[62:12]; // various data + rd2_pkt2[11:0] <= rd1_out_data[11:0] + (rd2_pkt1_dwlen << 2); // base address (within 4k page) + state2 <= `S2_ENGINE_PROCESSING; + end + end + `S2_ENGINE_PROCESSING: begin + if ( rd2_out_rden ) begin + rd2_total_dwlen <= rd2_total_dwlen_next; // dwlen (total remaining) + rd2_pkt2[85:74] <= rd2_total_dwlen_next << 2; // byte-count + rd2_pkt2[73:63] <= (rd2_total_dwlen_next > 11'h20) ? 11'h20 : rd2_total_dwlen_next; // dwlen next + rd2_pkt2[62:12] <= rd2_pkt2[62:12]; // various data + rd2_pkt2[11:0] <= rd2_pkt2[11:0] + (rd2_pkt2_dwlen << 2); // base address (within 4k page) + if ( !rd2_pkt2_large ) begin + state2 <= `S2_ENGINE_REQDATA; + end + end + end + endcase + + assign rd1_out_rden = rd2_out_rden && (((state2 == `S2_ENGINE_REQDATA) && (!rd1_out_valid || rd2_pkt1_tiny)) || ((state2 == `S2_ENGINE_PROCESSING) && !rd2_pkt2_large)); + + wire [85:0] rd2_in_data = (state2 == `S2_ENGINE_REQDATA) ? rd2_pkt1 : rd2_pkt2; + wire rd2_in_valid = rd1_out_valid || ((state2 == `S2_ENGINE_PROCESSING) && rd2_out_rden); + wire [3:0] rd2_in_be = rd1_out_be; + wire rd2_in_be_valid = rd1_out_valid; + + bit [85:0] rd2_out_data; + bit rd2_out_valid; + bit [3:0] rd2_out_be; + bit rd2_out_be_valid; + always @ ( posedge clk ) begin + rd2_out_data <= rd2_in_valid ? rd2_in_data : rd2_out_data; + rd2_out_valid <= rd2_in_valid && !rst; + rd2_out_be <= rd2_in_be_valid ? rd2_in_be : rd2_out_data; + rd2_out_be_valid <= rd2_in_be_valid && !rst; + end + + // ------------------------------------------------------------------------ + // 3: PROCESS EACH READ REQUEST PACKAGE PER INDIVIDUAL 32-bit READ DWORDS: + // ------------------------------------------------------------------------ + + wire [4:0] rd2_out_dwlen = rd2_out_data[67:63]; + wire rd2_out_last = (rd2_out_dwlen == 1); + wire [9:0] rd2_out_dwaddr = rd2_out_data[11:2]; + + wire rd3_enable; + + bit [3:0] rd3_process_be; + bit rd3_process_valid; + bit rd3_process_first; + bit rd3_process_last; + bit [4:0] rd3_process_dwlen; + bit [9:0] rd3_process_dwaddr; + bit [85:0] rd3_process_data; + wire rd3_process_next_last = (rd3_process_dwlen == 2); + wire rd3_process_nextnext_last = (rd3_process_dwlen <= 3); + assign rd_req_be = rd3_process_be; + assign rd_req_ctx = { rd3_process_first, rd3_process_last, rd3_process_data }; + assign rd_req_bar = rd3_process_data[62:56]; + assign rd_req_addr = { rd3_process_data[31:12], rd3_process_dwaddr, 2'b00 }; + assign rd_req_valid = rd3_process_valid; + + // STATE MACHINE: + `define S3_ENGINE_REQDATA 1'h0 + `define S3_ENGINE_PROCESSING 1'h1 + (* KEEP = "TRUE" *) bit [0:0] state3 = `S3_ENGINE_REQDATA; + + always @ ( posedge clk ) + if ( rst ) begin + rd3_process_valid <= 1'b0; + state3 <= `S3_ENGINE_REQDATA; + end + else case ( state3 ) + `S3_ENGINE_REQDATA: begin + if ( rd2_out_valid ) begin + rd3_process_valid <= 1'b1; + rd3_process_first <= 1'b1; // FIRST + rd3_process_last <= rd2_out_last; // LAST (low 5 bits of dwlen == 1, [max pktlen = 0x20)) + rd3_process_dwlen <= rd2_out_dwlen; // PKT LENGTH IN DW + rd3_process_dwaddr <= rd2_out_dwaddr; // DWADDR OF THIS DWORD + rd3_process_data[85:0] <= rd2_out_data[85:0]; // FORWARD / SAVE DATA + if ( rd2_out_be_valid ) begin + rd3_process_be <= rd2_out_be; + end else begin + rd3_process_be <= 4'hf; + end + if ( !rd2_out_last ) begin + state3 <= `S3_ENGINE_PROCESSING; + end + end + else begin + rd3_process_valid <= 1'b0; + end + end + `S3_ENGINE_PROCESSING: begin + rd3_process_first <= 1'b0; // FIRST + rd3_process_last <= rd3_process_next_last; // LAST + rd3_process_dwlen <= rd3_process_dwlen - 1; // LEN DEC + rd3_process_dwaddr <= rd3_process_dwaddr + 1; // ADDR INC + if ( rd3_process_next_last ) begin + state3 <= `S3_ENGINE_REQDATA; + end + end + endcase + + assign rd2_out_rden = rd3_enable && ( + ((state3 == `S3_ENGINE_REQDATA) && (!rd2_out_valid || rd2_out_last)) || + ((state3 == `S3_ENGINE_PROCESSING) && rd3_process_nextnext_last)); + + // ------------------------------------------------------------------------ + // 4: PROCESS RESPONSES: + // ------------------------------------------------------------------------ + + wire rd_rsp_first = rd_rsp_ctx[87]; + wire rd_rsp_last = rd_rsp_ctx[86]; + + wire [9:0] rd_rsp_dwlen = rd_rsp_ctx[72:63]; + wire [11:0] rd_rsp_bc = rd_rsp_ctx[85:74]; + wire [15:0] rd_rsp_reqid = rd_rsp_ctx[47:32]; + wire [7:0] rd_rsp_tag = rd_rsp_ctx[55:48]; + wire [6:0] rd_rsp_lowaddr = rd_rsp_ctx[6:0]; + wire [31:0] rd_rsp_addr = rd_rsp_ctx[31:0]; + wire [31:0] rd_rsp_data_bs = { rd_rsp_data[7:0], rd_rsp_data[15:8], rd_rsp_data[23:16], rd_rsp_data[31:24] }; + + // 1: 32-bit -> 128-bit state machine: + bit [127:0] tdata; + bit [3:0] tkeepdw = 0; + bit tlast; + bit first = 1; + wire tvalid = tlast || tkeepdw[3]; + + always @ ( posedge clk ) + if ( rst ) begin + tkeepdw <= 0; + tlast <= 0; + first <= 0; + end + else if ( rd_rsp_valid && rd_rsp_first ) begin + tkeepdw <= 4'b1111; + tlast <= rd_rsp_last; + first <= 1'b1; + tdata[31:0] <= { 22'b0100101000000000000000, rd_rsp_dwlen }; // format, type, length + tdata[63:32] <= { pcie_id[7:0], pcie_id[15:8], 4'b0, rd_rsp_bc }; // pcie_id, byte_count + tdata[95:64] <= { rd_rsp_reqid, rd_rsp_tag, 1'b0, rd_rsp_lowaddr }; // req_id, tag, lower_addr + tdata[127:96] <= rd_rsp_data_bs; + end + else begin + tlast <= rd_rsp_valid && rd_rsp_last; + tkeepdw <= tvalid ? (rd_rsp_valid ? 4'b0001 : 4'b0000) : (rd_rsp_valid ? ((tkeepdw << 1) | 1'b1) : tkeepdw); + first <= 0; + if ( rd_rsp_valid ) begin + if ( tvalid || !tkeepdw[0] ) + tdata[31:0] <= rd_rsp_data_bs; + if ( !tkeepdw[1] ) + tdata[63:32] <= rd_rsp_data_bs; + if ( !tkeepdw[2] ) + tdata[95:64] <= rd_rsp_data_bs; + if ( !tkeepdw[3] ) + tdata[127:96] <= rd_rsp_data_bs; + end + end + + // 2.1 - submit to output fifo - will feed into mux/pcie core. + fifo_134_134_clk1_bar_rdrsp i_fifo_134_134_clk1_bar_rdrsp( + .srst ( rst ), + .clk ( clk ), + .din ( { first, tlast, tkeepdw, tdata } ), + .wr_en ( tvalid ), + .rd_en ( tlps_out.tready ), + .dout ( { tlps_out.tuser[0], tlps_out.tlast, tlps_out.tkeepdw, tlps_out.tdata } ), + .full ( ), + .empty ( ), + .prog_empty ( rd3_enable ), + .valid ( tlps_out.tvalid ) + ); + + assign tlps_out.tuser[1] = tlps_out.tlast; + assign tlps_out.tuser[8:2] = 0; + + // 2.2 - packet count: + bit [10:0] pkt_count = 0; + wire pkt_count_dec = tlps_out.tvalid && tlps_out.tlast; + wire pkt_count_inc = tvalid && tlast; + wire [10:0] pkt_count_next = pkt_count + pkt_count_inc - pkt_count_dec; + assign tlps_out.has_data = (pkt_count_next > 0); + + always @ ( posedge clk ) begin + pkt_count <= rst ? 0 : pkt_count_next; + end + +endmodule + + +// ------------------------------------------------------------------------ +// Example BAR implementation that does nothing but drop any read/writes +// silently without generating a response. +// This is only recommended for placeholder designs. +// Latency = N/A. +// ------------------------------------------------------------------------ +module pcileech_bar_impl_none( + input rst, + input clk, + // incoming BAR writes: + input [31:0] wr_addr, + input [3:0] wr_be, + input [31:0] wr_data, + input wr_valid, + // incoming BAR reads: + input [87:0] rd_req_ctx, + input [31:0] rd_req_addr, + input rd_req_valid, + // outgoing BAR read replies: + output bit [87:0] rd_rsp_ctx, + output bit [31:0] rd_rsp_data, + output bit rd_rsp_valid +); + + initial rd_rsp_ctx = 0; + initial rd_rsp_data = 0; + initial rd_rsp_valid = 0; + +endmodule + + + +// ------------------------------------------------------------------------ +// Example BAR implementation of "address loopback" which can be useful +// for testing. Any read to a specific BAR address will result in the +// address as response. +// Latency = 2CLKs. +// ------------------------------------------------------------------------ +module pcileech_bar_impl_loopaddr( + input rst, + input clk, + // incoming BAR writes: + input [31:0] wr_addr, + input [3:0] wr_be, + input [31:0] wr_data, + input wr_valid, + // incoming BAR reads: + input [87:0] rd_req_ctx, + input [31:0] rd_req_addr, + input rd_req_valid, + // outgoing BAR read replies: + output bit [87:0] rd_rsp_ctx, + output bit [31:0] rd_rsp_data, + output bit rd_rsp_valid +); + + bit [87:0] rd_req_ctx_1; + bit [31:0] rd_req_addr_1; + bit rd_req_valid_1; + + always @ ( posedge clk ) begin + rd_req_ctx_1 <= rd_req_ctx; + rd_req_addr_1 <= rd_req_addr; + rd_req_valid_1 <= rd_req_valid; + rd_rsp_ctx <= rd_req_ctx_1; + rd_rsp_data <= 32'h0; + rd_rsp_valid <= rd_req_valid_1; + end + +endmodule + +// ------------------------------------------------------------------------ +// Example BAR implementation of a 4kB writable initial-zero BAR. +// Latency = 2CLKs. +// ------------------------------------------------------------------------ +module pcileech_bar_impl_zerowrite4k( + input rst, + input clk, + // incoming BAR writes: + input [31:0] wr_addr, + input [3:0] wr_be, + input [31:0] wr_data, + input wr_valid, + // incoming BAR reads: + input [87:0] rd_req_ctx, + input [31:0] rd_req_addr, + input rd_req_valid, + // outgoing BAR read replies: + output bit [87:0] rd_rsp_ctx, + output bit [31:0] rd_rsp_data, + output bit rd_rsp_valid +); + + bit [87:0] drd_req_ctx; + bit drd_req_valid; + wire [31:0] doutb; + + always @ ( posedge clk ) begin + drd_req_ctx <= rd_req_ctx; + drd_req_valid <= rd_req_valid; + rd_rsp_ctx <= drd_req_ctx; + rd_rsp_valid <= drd_req_valid; + rd_rsp_data <= doutb; + end + + bram_bar_zero4k i_bram_bar_zero4k( + // Port A - write: + .addra ( wr_addr[11:2] ), + .clka ( clk ), + .dina ( wr_data ), + .ena ( wr_valid ), + .wea ( wr_be ), + // Port A - read (2 CLK latency): + .addrb ( rd_req_addr[11:2] ), + .clkb ( clk ), + .doutb ( doutb ), + .enb ( rd_req_valid ) + ); + +endmodule + +`define MAC_RANDOM_NUM1 13 +`define MAC_RANDOM_NUM2 2 +`define MAC_RANDOM_NUM3 13 +`define MAC_RANDOM_NUM4 9 +`define MAC_RANDOM_NUM5 7 +`define MAC_RANDOM_NUM6 5 + +// ------------------------------------------------------------------------ +// pcileech wifi BAR implementation +// Works with rtl81xx chips +// ------------------------------------------------------------------------ +module pcileech_bar_impl_RTL8188EE_wifi( + input rst, + input clk, + // interrupt enable + output wire int_enable, + // incoming BAR writes: + input [31:0] wr_addr, + input [3:0] wr_be, + input [31:0] wr_data, + input wr_valid, + // incoming BAR reads: + input [87:0] rd_req_ctx, + input [31:0] rd_req_addr, + input [3:0] rd_req_be, + input rd_req_valid, + input [31:0] base_address_register, + // outgoing BAR read replies: + output bit [87:0] rd_rsp_ctx, + output bit [31:0] rd_rsp_data, + output bit rd_rsp_valid +); + + bit [87:0] drd_req_ctx; + bit [31:0] drd_req_addr; + bit [3:0] drd_req_be; + bit drd_req_valid; + + bit [3:0] dwr_be; + bit [31:0] dwr_addr; + bit [31:0] dwr_data; + bit dwr_valid; + bit [31:0] data_32; + bit [7:0] cmd; + bit [15:0] int_status; + bit [15:0] int_mask; + + + time number = 0; + + always @ ( posedge clk ) begin + if (rst) begin + number <= 0; + data_32 <= 0; + int_mask <= 16'b0; + int_status <= 16'b0; + end + number <= number + 1; + drd_req_ctx <= rd_req_ctx; + drd_req_valid <= rd_req_valid; + dwr_valid <= wr_valid; + drd_req_addr <= rd_req_addr; + drd_req_be <= rd_req_be; + rd_rsp_ctx <= drd_req_ctx; + rd_rsp_valid <= drd_req_valid; + dwr_addr <= wr_addr; + dwr_data <= wr_data; + dwr_be <= wr_be; + if (drd_req_valid) begin + case ({drd_req_addr[31:24], drd_req_addr[23:16], drd_req_addr[15:08], drd_req_addr[07:00]} - base_address_register) + 16'h0610 : begin + rd_rsp_data[7:0] <= 8'h00; + rd_rsp_data[15:8] <= 8'hE0; + rd_rsp_data[23:16] <= 8'h4C; + rd_rsp_data[31:24] <= ((0 + (number + `MAC_RANDOM_NUM1) % (15 + 1 - 0)) << 4) | (0 + (number + `MAC_RANDOM_NUM2) % (15 + 1 - 0)); + end + 16'h0614 : begin + rd_rsp_data[7:0] <= ((0 + (number + `MAC_RANDOM_NUM3) % (15 + 1 - 0)) << 4) | (0 + (number + `MAC_RANDOM_NUM6) % (15 + 1 - 0)); + rd_rsp_data[15:8] <= ((0 + (number + `MAC_RANDOM_NUM5) % (15 + 1 - 0)) << 4) | (0 + (number + `MAC_RANDOM_NUM6) % (15 + 1 - 0)); + rd_rsp_data[31:16] <= 16'h0000; + end + + 16'h0000 : rd_rsp_data <= 32'hFDE3A3F6; + 16'h0004 : rd_rsp_data <= 32'h20020002; + 16'h0008 : rd_rsp_data <= 32'h0020FCAB; + 16'h0010 : rd_rsp_data <= 32'hAAE35941; + 16'h0014 : rd_rsp_data <= 32'h000289CA; + 16'h0074 : rd_rsp_data <= 32'h00000001; + 16'h00D0 : rd_rsp_data <= 32'h00007F02; + 16'h01E0 : rd_rsp_data <= 32'h0000AF00; + 16'h01E4 : rd_rsp_data <= 32'h0000021C; + 16'h0208 : rd_rsp_data <= 32'h7200AB10; + 16'h020C : rd_rsp_data <= 32'h00FD0000; + 16'h0214 : rd_rsp_data <= 32'h00000101; + 16'h0284 : rd_rsp_data <= 32'h00020000; + 16'h0300 : rd_rsp_data <= 32'hF7070000; + 16'h0348 : rd_rsp_data <= 32'h97000D00; + 16'h034C : rd_rsp_data <= 32'h00000010; + 16'h0350 : rd_rsp_data <= 32'h04000098; + 16'h0354 : rd_rsp_data <= 32'h00300000; + 16'h0358 : rd_rsp_data <= 32'h0000000B; + 16'h0360 : rd_rsp_data <= 32'h00000004; + 16'h0368 : rd_rsp_data <= 32'h0000E0FC; + 16'h0390 : rd_rsp_data <= 32'h0000002A; + 16'h0394 : rd_rsp_data <= 32'hD4044000; + 16'h03B0 : rd_rsp_data <= 32'h59BD59BB; + 16'h041C : rd_rsp_data <= 32'h000000AB; + 16'h04FC : rd_rsp_data <= 32'hFFFF0000; + 16'h0500 : rd_rsp_data <= 32'h002F3210; + 16'h0504 : rd_rsp_data <= 32'h0000A422; + 16'h0508 : rd_rsp_data <= 32'h005E4322; + 16'h050C : rd_rsp_data <= 32'h0000A422; + default : rd_rsp_data <= 32'h00000000; + endcase + end else if (dwr_valid) begin + case ({dwr_addr[31:24], dwr_addr[23:16], dwr_addr[15:08], dwr_addr[07:00]} - base_address_register) + endcase + end else begin + rd_rsp_data[7:0] <= ((0 + (number) % (15 + 1 - 0)) << 4) | (0 + (number + 3) % (15 + 1 - 0)); + rd_rsp_data[15:8] <= ((0 + (number + 6) % (15 + 1 - 0)) << 4) | (0 + (number + 9) % (15 + 1 - 0)); + rd_rsp_data[23:16] <= ((0 + (number + 12) % (15 + 1 - 0)) << 4) | (0 + (number + 15) % (15 + 1 - 0)); + rd_rsp_data[31:24] <= ((0 + (number) % (15 + 1 - 0)) << 4) | (0 + (number + 3) % (15 + 1 - 0)); + end + end + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_tlps128_cfgspace_shadow.sv b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_tlps128_cfgspace_shadow.sv new file mode 100644 index 0000000000000000000000000000000000000000..6bda9d448a0a0f938b453acc7ae1defb3f896f88 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/src/pcileech_tlps128_cfgspace_shadow.sv @@ -0,0 +1,260 @@ +// +// PCILeech FPGA. +// +// PCIe custom shadow configuration space. +// Xilinx PCIe core will take configuration space priority; if Xilinx PCIe core +// is configured to forward configuration requests to user application such TLP +// will end up being processed by this module. +// +// (c) Ulf Frisk, 2021-2024 +// Author: Ulf Frisk, pcileech@frizk.net +// + +`timescale 1ns / 1ps + +module pcileech_tlps128_cfgspace_shadow( + input rst, + input clk_pcie, + input clk_sys, + IfAXIS128.sink_lite tlps_in, + input [15:0] pcie_id, + IfAXIS128.source tlps_cfg_rsp, + IfShadow2Fifo.shadow dshadow2fifo +); + // ---------------------------------------------------------------------------- + // PCIe RECEIVE: + // ---------------------------------------------------------------------------- + wire pcie_rx_rden = tlps_in.tvalid && tlps_in.tuser[0] && (tlps_in.tdata[31:25] == 7'b0000010); // CfgRd: Fmt[2:0]=000b (3 DW header, no data), CfgRd0/CfgRd1=0010xb + wire pcie_rx_wren = tlps_in.tvalid && tlps_in.tuser[0] && (tlps_in.tdata[31:25] == 7'b0100010); // CfgWr: Fmt[2:0]=010b (3 DW header, data), CfgWr0/CfgWr1=0010xb + wire [9:0] pcie_rx_addr = tlps_in.tdata[75:66]; + wire [31:0] pcie_rx_data = tlps_in.tdata[127:96]; + wire [7:0] pcie_rx_tag = tlps_in.tdata[47:40]; + wire [3:0] pcie_rx_be = {tlps_in.tdata[32], tlps_in.tdata[33], tlps_in.tdata[34], tlps_in.tdata[35]}; + wire [15:0] pcie_rx_reqid = tlps_in.tdata[63:48]; + + // ---------------------------------------------------------------------------- + // USB RECEIVE (clock domain crossing): + // ---------------------------------------------------------------------------- + wire usb_rx_rden_out; + wire usb_rx_wren_out; + wire usb_rx_valid; + wire usb_rx_rden = usb_rx_valid && usb_rx_rden_out; + wire usb_rx_wren = usb_rx_valid && usb_rx_wren_out; + wire [3:0] usb_rx_be; + wire [31:0] usb_rx_data; + wire [9:0] usb_rx_addr; + wire usb_rx_addr_lo; + fifo_49_49_clk2 i_fifo_49_49_clk2( + .rst ( rst ), + .wr_clk ( clk_sys ), + .rd_clk ( clk_pcie ), + .wr_en ( dshadow2fifo.rx_rden || dshadow2fifo.rx_wren ), + .din ( {dshadow2fifo.rx_rden, dshadow2fifo.rx_wren, dshadow2fifo.rx_addr_lo, dshadow2fifo.rx_addr, dshadow2fifo.rx_be, dshadow2fifo.rx_data} ), + .full ( ), + .rd_en ( 1'b1 ), + .dout ( {usb_rx_rden_out, usb_rx_wren_out, usb_rx_addr_lo, usb_rx_addr, usb_rx_be, usb_rx_data} ), + .empty ( ), + .valid ( usb_rx_valid ) + ); + + // ---------------------------------------------------------------------------- + // WRITE multiplexor: simple naive multiplexor which will prioritize in order: + // (1) PCIe (if enabled), (2) USB, (3) INTERNAL. + // Collisions will be discarded (it's assumed that they'll be very rare) + // ---------------------------------------------------------------------------- + wire bram_wr_1_tlp = pcie_rx_wren & dshadow2fifo.cfgtlp_en; + wire bram_wr_2_usb = ~bram_wr_1_tlp & usb_rx_wren; + wire [3:0] bram_wr_be = bram_wr_1_tlp ? (dshadow2fifo.cfgtlp_wren ? pcie_rx_be : 4'b0000) : (bram_wr_2_usb ? usb_rx_be : 4'b0000); + wire [31:0] bram_wr_data = bram_wr_1_tlp ? pcie_rx_data : (bram_wr_2_usb ? usb_rx_data : 32'h00000000); + + // ---------------------------------------------------------------------------- + // WRITE multiplexor and state machine: simple naive multiplexor which will prioritize in order: + // (1) PCIe (if enabled), (2) USB, (3) INTERNAL. + // Collisions will be discarded (it's assumed that they'll be very rare) + // ---------------------------------------------------------------------------- + `define S_SHADOW_CFGSPACE_IDLE 2'b00 + `define S_SHADOW_CFGSPACE_TLP 2'b01 + `define S_SHADOW_CFGSPACE_USB 2'b10 + + wire [15:0] bram_rd_reqid; + wire [1:0] bram_rd_tp; + wire [7:0] bram_rd_tag; + wire [9:0] bram_rd_addr; + wire [31:0] bram_rd_data; + wire [31:0] bram_rd_data_z = dshadow2fifo.cfgtlp_zero ? 32'h00000000 : bram_rd_data; + wire bram_rd_valid = (bram_rd_tp == `S_SHADOW_CFGSPACE_TLP); + wire bram_rd_tlpwr; + + wire bram_rd_1_tlp = pcie_rx_rden & dshadow2fifo.cfgtlp_en; + wire bram_tlp = bram_rd_1_tlp | bram_wr_1_tlp; + wire bram_rd_2_usb = ~bram_tlp & usb_rx_rden; + wire [1:0] bram_rdreq_tp = bram_tlp ? `S_SHADOW_CFGSPACE_TLP : (bram_rd_2_usb ? `S_SHADOW_CFGSPACE_USB : `S_SHADOW_CFGSPACE_IDLE); + wire [9:0] bram_rdreq_addr = bram_tlp ? pcie_rx_addr : usb_rx_addr; + wire [7:0] bram_rdreq_tag = bram_tlp ? pcie_rx_tag : {7'h00, usb_rx_addr_lo}; + wire [15:0] bram_rdreq_reqid= bram_tlp ? pcie_rx_reqid : 16'h0000; + + // BRAM MEMORY ACCESS for the 4kB / 0x1000 byte shadow configuration space. + pcileech_mem_wrap i_pcileech_mem_wrap( + .clk_pcie ( clk_pcie ), // <- + .rdwr_addr ( bram_rdreq_addr ), // <- + .wr_be ( bram_wr_be ), // <- + .wr_data ( bram_wr_data ), // <- + .rdreq_tag ( bram_rdreq_tag ), // <- + .rdreq_tp ( bram_rdreq_tp ), // <- + .rdreq_reqid ( bram_rdreq_reqid ), // <- + .rdreq_tlpwr ( bram_wr_1_tlp ), // <- + .rd_data ( bram_rd_data ), // -> + .rd_addr ( bram_rd_addr ), // -> + .rd_tag ( bram_rd_tag ), // -> + .rd_tp ( bram_rd_tp ), // -> + .rd_reqid ( bram_rd_reqid ), // -> + .rd_tlpwr ( bram_rd_tlpwr ) // -> + ); + + // PCIe REPLY: + pcileech_cfgspace_pcie_tx i_pcileech_cfgspace_pcie_tx( + .rst ( rst ), // <- + .clk_pcie ( clk_pcie ), // <- + .pcie_id ( pcie_id ), // <- [15:0] + .tlps_cfg_rsp ( tlps_cfg_rsp ), + // cfgspace: + .cfg_wren ( bram_rd_valid ), // <- + .cfg_tlpwr ( bram_rd_tlpwr ), // <- + .cfg_tag ( bram_rd_tag ), // <- [7:0] + .cfg_data ( bram_rd_data_z ), // <- [32:0] + .cfg_reqid ( bram_rd_reqid ) // <- [15:0] + ); + + // USB REPLY: + fifo_43_43_clk2 i_fifo_43_43_clk2( + .rst ( rst ), + .wr_clk ( clk_pcie ), + .rd_clk ( clk_sys ), + .wr_en ( (bram_rd_tp == `S_SHADOW_CFGSPACE_USB) ), + .din ( {bram_rd_tag[0], bram_rd_addr, bram_rd_data_z} ), + .full ( ), + .rd_en ( 1'b1 ), + .dout ( {dshadow2fifo.tx_addr_lo, dshadow2fifo.tx_addr, dshadow2fifo.tx_data} ), + .empty ( ), + .valid ( dshadow2fifo.tx_valid ) + ); + +endmodule + + + +// PCIe TLP cfg reply module: +module pcileech_cfgspace_pcie_tx( + input rst, + input clk_pcie, + input [15:0] pcie_id, // PCIe id of this core + IfAXIS128.source tlps_cfg_rsp, + // cfgspace: + input cfg_wren, + input cfg_tlpwr, + input [7:0] cfg_tag, + input [31:0] cfg_data, + input [15:0] cfg_reqid + ); + + wire [31:0] cpl_tlp_data_dw0_rd = 32'b01001010000000000000000000000001; + wire [31:0] cpl_tlp_data_dw0_wr = 32'b00001010000000000000000000000000; + wire [31:0] cpl_tlp_data_dw1 = { `_bs16(pcie_id), 16'h0004 }; + wire [31:0] cpl_tlp_data_dw2 = { cfg_reqid, cfg_tag, 8'h00 }; + wire [31:0] cpl_tlp_data_dw3 = cfg_data; + wire [127:0] cpl_tlp_rd = { cpl_tlp_data_dw3, cpl_tlp_data_dw2, cpl_tlp_data_dw1, cpl_tlp_data_dw0_rd }; + wire [127:0] cpl_tlp_wr = { 32'h00000000, cpl_tlp_data_dw2, cpl_tlp_data_dw1, cpl_tlp_data_dw0_wr }; + wire [128:0] cpl_tlps = cfg_tlpwr ? {1'b0, cpl_tlp_wr} : {1'b1, cpl_tlp_rd}; + + wire tx_tp; + wire tx_empty; + fifo_129_129_clk1 i_fifo_129_129_clk1 ( + .srst ( rst ), + .clk ( clk_pcie ), + // data in + .wr_en ( cfg_wren ), + .din ( cpl_tlps ), + .full ( ), + // data out + .rd_en ( tlps_cfg_rsp.tready ), + .dout ( {tx_tp, tlps_cfg_rsp.tdata} ), + .empty ( tx_empty ), + .valid ( tlps_cfg_rsp.tvalid ) + ); + + assign tlps_cfg_rsp.tkeepdw = (tx_tp ? 4'b1111 : 4'b0111); + assign tlps_cfg_rsp.tlast = 1; + assign tlps_cfg_rsp.tuser = 0; + assign tlps_cfg_rsp.has_data = ~tx_empty; +endmodule + + + +// Wrapper module for the BRAM-backed configuration space. +module pcileech_mem_wrap( + input clk_pcie, + + // Address common to Read/Write: + input [9:0] rdwr_addr, + + // Write to 'configuration/action space': + input [3:0] wr_be, + input [31:0] wr_data, + + // Read from 'configuration space': + input [7:0] rdreq_tag, + input [1:0] rdreq_tp, + input [15:0] rdreq_reqid, + input rdreq_tlpwr, + + output bit [9:0] rd_addr, + output [31:0] rd_data, + output bit [7:0] rd_tag, + output bit [1:0] rd_tp, + output bit [15:0] rd_reqid, + output bit rd_tlpwr + ); + + bit [3:0] wr_be_d; + bit [31:0] wr_data_d; + + wire [31:0] wr_mask; + wire [31:0] wr_dina; + + // DELAY TO FOLLOW BRAM DELAY + always @ ( posedge clk_pcie ) + begin + wr_be_d <= wr_be; + wr_data_d <= wr_data; + rd_addr <= rdwr_addr; + rd_tag <= rdreq_tag; + rd_tp <= rdreq_tp; + rd_reqid <= rdreq_reqid; + rd_tlpwr <= rdreq_tlpwr; + end + + // BRAM: 'configuration space' - 4kB / 0x1000 bytes: + bram_pcie_cfgspace i_bram_pcie_cfgspace( + .clka ( clk_pcie ), + .clkb ( clk_pcie ), + .wea ( wr_be_d ), + .addra ( rd_addr ), + .dina ( wr_dina ), + .addrb ( rdwr_addr ), + .doutb ( rd_data ) + ); + + // DROM: 'configuration space' - 4kB / 0x1000 bytes write mask: + drom_pcie_cfgspace_writemask i_drom_pcie_cfgspace_writemask( + .a ( rd_addr ), + .spo ( wr_mask ) + ); + + genvar i; + generate + for (i = 0; i < 32; i++) begin + assign wr_dina[i] = wr_mask[i] ? wr_data_d[i] : rd_data[i]; + end + endgenerate + +endmodule diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_build.tcl b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_build.tcl new file mode 100644 index 0000000000000000000000000000000000000000..5d8eab5e646bf2bfa331aa66c799e4a84fadb169 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_build.tcl @@ -0,0 +1,26 @@ +# +# RUN FROM WITHIN "Vivado Tcl Shell" WITH COMMAND: +# source vivado_build.tcl -notrace +# +puts "-------------------------------------------------------" +puts " STARTING SYNTHESIS STEP. " +puts "-------------------------------------------------------" +launch_runs synth_1 +puts "-------------------------------------------------------" +puts " WAITING FOR SYNTHESIS STEP TO FINISH ... " +puts " THIS IS LIKELY TO TAKE A VERY LONG TIME. " +puts "-------------------------------------------------------" +wait_on_run synth_1 +puts "-------------------------------------------------------" +puts " STARTING IMPLEMENTATION STEP. " +puts "-------------------------------------------------------" +launch_runs impl_1 -to_step write_bitstream +puts "-------------------------------------------------------" +puts " WAITING FOR IMPLEMENTATION STEP TO FINISH ... " +puts " THIS IS LIKELY TO TAKE A VERY LONG TIME. " +puts "-------------------------------------------------------" +wait_on_run impl_1 +file copy -force ./pcileech_squirrel/pcileech_squirrel.runs/impl_1/pcileech_squirrel_top.bin pcileech_squirrel.bin +puts "-------------------------------------------------------" +puts " BUILD HOPEFULLY COMPLETED. " +puts "-------------------------------------------------------" \ No newline at end of file diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_build_100t.tcl b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_build_100t.tcl new file mode 100644 index 0000000000000000000000000000000000000000..81a07fc5dafbe7dab7be85982e844897e7aa97d3 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_build_100t.tcl @@ -0,0 +1,26 @@ +# +# RUN FROM WITHIN "Vivado Tcl Shell" WITH COMMAND: +# source vivado_build.tcl -notrace +# +puts "-------------------------------------------------------" +puts " STARTING SYNTHESIS STEP. " +puts "-------------------------------------------------------" +launch_runs -jobs 6 synth_1 +puts "-------------------------------------------------------" +puts " WAITING FOR SYNTHESIS STEP TO FINISH ... " +puts " THIS IS LIKELY TO TAKE A VERY LONG TIME. " +puts "-------------------------------------------------------" +wait_on_run synth_1 +puts "-------------------------------------------------------" +puts " STARTING IMPLEMENTATION STEP. " +puts "-------------------------------------------------------" +launch_runs -jobs 4 impl_1 -to_step write_bitstream +puts "-------------------------------------------------------" +puts " WAITING FOR IMPLEMENTATION STEP TO FINISH ... " +puts " THIS IS LIKELY TO TAKE A VERY LONG TIME. " +puts "-------------------------------------------------------" +wait_on_run impl_1 +file copy -force ./pcileech_tbx4_100t/pcileech_tbx4_100t.runs/impl_1/pcileech_tbx4_100t_top.bin pcileech_zdma_100t_fpga0.bin +puts "-------------------------------------------------------" +puts " BUILD HOPEFULLY COMPLETED. " +puts "-------------------------------------------------------" \ No newline at end of file diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_100t.tcl b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_100t.tcl new file mode 100644 index 0000000000000000000000000000000000000000..64ea1d83879fb3c5c0ab5ca70882679220a77cbd --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_100t.tcl @@ -0,0 +1,1068 @@ +# +# Vivado generated .tcl for creating the pcileech_tbx4_100t vivado project. +# Run from within "Vivado Tcl Shell" with command: source vivado_generate_project.tcl -notrace +# + +# Set the reference directory for source file relative paths (by default the value is script directory path) +set origin_dir "." + +# Use origin directory path location variable, if specified in the tcl shell +if { [info exists ::origin_dir_loc] } { + set origin_dir $::origin_dir_loc +} + +# Set the project name +set _xil_proj_name_ "pcileech_tbx4_100t" + +# Use project name variable, if specified in the tcl shell +if { [info exists ::user_project_name] } { + set _xil_proj_name_ $::user_project_name +} + +variable script_file +set script_file "vivado_generate_project.tcl" + +# Help information for this script +proc print_help {} { + variable script_file + puts "\nDescription:" + puts "Recreate a Vivado project from this script. The created project will be" + puts "functionally equivalent to the original project for which this script was" + puts "generated. The script contains commands for creating a project, filesets," + puts "runs, adding/importing sources and setting properties on various objects.\n" + puts "Syntax:" + puts "$script_file" + puts "$script_file -tclargs \[--origin_dir \]" + puts "$script_file -tclargs \[--project_name \]" + puts "$script_file -tclargs \[--help\]\n" + puts "Usage:" + puts "Name Description" + puts "-------------------------------------------------------------------------" + puts "\[--origin_dir \] Determine source file paths wrt this path. Default" + puts " origin_dir path value is \".\", otherwise, the value" + puts " that was set with the \"-paths_relative_to\" switch" + puts " when this script was generated.\n" + puts "\[--project_name \] Create project with the specified name. Default" + puts " name is the name of the project from where this" + puts " script was generated.\n" + puts "\[--help\] Print help information for this script" + puts "-------------------------------------------------------------------------\n" + exit 0 +} + +if { $::argc > 0 } { + for {set i 0} {$i < $::argc} {incr i} { + set option [string trim [lindex $::argv $i]] + switch -regexp -- $option { + "--origin_dir" { incr i; set origin_dir [lindex $::argv $i] } + "--project_name" { incr i; set _xil_proj_name_ [lindex $::argv $i] } + "--help" { print_help } + default { + if { [regexp {^-} $option] } { + puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n" + return 1 + } + } + } + } +} + +# Set the directory path for the original project from where this script was exported +set orig_proj_dir "[file normalize "$origin_dir/../ScreamerM2_TEST4/pcileech_screamer_m2"]" + +# Check for paths and files needed for project creation +set validate_required 0 +if { $validate_required } { + if { [checkRequiredFiles $origin_dir] } { + puts "Tcl file $script_file is valid. All files required for project creation is accesable. " + } else { + puts "Tcl file $script_file is not valid. Not all files required for project creation is accesable. " + return + } +} + +# Create project +create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7a100tfgg484-2 + +# Set the directory path for the new project +set proj_dir [get_property directory [current_project]] + +# Set project properties +set obj [current_project] +set_property -name "default_lib" -value "xil_defaultlib" -objects $obj +set_property -name "enable_vhdl_2008" -value "1" -objects $obj +set_property -name "ip_cache_permissions" -value "read write" -objects $obj +set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj +set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj +set_property -name "part" -value "xc7a100tfgg484-2" -objects $obj +set_property -name "platform.description" -value "Vivado generated DSA" -objects $obj +set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj +set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj +set_property -name "simulator_language" -value "Mixed" -objects $obj +set_property -name "webtalk.activehdl_export_sim" -value "27" -objects $obj +set_property -name "webtalk.ies_export_sim" -value "27" -objects $obj +set_property -name "webtalk.modelsim_export_sim" -value "27" -objects $obj +set_property -name "webtalk.questa_export_sim" -value "27" -objects $obj +set_property -name "webtalk.riviera_export_sim" -value "27" -objects $obj +set_property -name "webtalk.vcs_export_sim" -value "27" -objects $obj +set_property -name "webtalk.xcelium_export_sim" -value "4" -objects $obj +set_property -name "webtalk.xsim_export_sim" -value "27" -objects $obj +set_property -name "xpm_libraries" -value "XPM_CDC XPM_MEMORY" -objects $obj + +# Create 'sources_1' fileset (if not found) +if {[string equal [get_filesets -quiet sources_1] ""]} { + create_fileset -srcset sources_1 +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/src/pcileech_header.svh"]\ + [file normalize "${origin_dir}/src/pcileech_com_e.v" ]\ + [file normalize "${origin_dir}/src/pcileech_fifo.sv"]\ + [file normalize "${origin_dir}/src/pcileech_mux.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_a7x4.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_cfg_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_tlp_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_bar_controller.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_cfgspace_shadow.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tbx4_100t_top.sv" ]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_axi_basic_rx.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_axi_basic_rx_null_gen.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_axi_basic_rx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_axi_basic_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_axi_basic_tx.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_axi_basic_tx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_axi_basic_tx_thrtl_ctl.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_core_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_gt_common.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_gt_rx_valid_filter_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_gt_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_gt_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_gtp_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_gtp_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_gtp_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_gtp_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_gtx_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pcie_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pcie_bram_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pcie_bram_top_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pcie_brams_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pcie_pipe_lane.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pcie_pipe_misc.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pcie_pipe_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pcie_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pcie2_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pipe_clock.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pipe_eq.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pipe_sync.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pipe_user.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_pipe_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_qpll_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_qpll_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_qpll_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/zdma/pcie_7x_0_rxeq_scan.v"]\ +] +set imported_files [import_files -fileset sources_1 $files] + +# Set 'sources_1' fileset file properties for remote files +# None + +# Set 'sources_1' fileset file properties for local files +set file "src/pcileech_header.svh" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog Header" -objects $file_obj + +set file "src/pcileech_com_e.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_fifo.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_mux.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_a7x4.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_cfg_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_tlp_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_bar_controller.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_cfgspace_shadow.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tbx4_100t_top.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_axi_basic_rx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_axi_basic_rx_null_gen.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_axi_basic_rx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_axi_basic_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_axi_basic_tx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_axi_basic_tx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_axi_basic_tx_thrtl_ctl.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_core_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_gt_common.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_gt_rx_valid_filter_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_gt_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_gt_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_gtp_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_gtp_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_gtp_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_gtp_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_gtx_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pcie_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pcie_bram_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pcie_bram_top_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pcie_brams_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pcie_pipe_lane.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pcie_pipe_misc.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pcie_pipe_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pcie_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pcie2_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pipe_clock.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pipe_eq.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pipe_sync.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pipe_user.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_qpll_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_pipe_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_qpll_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_qpll_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/zdma/pcie_7x_0_rxeq_scan.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +# Set 'sources_1' fileset properties +set obj [get_filesets sources_1] +set_property -name "top" -value "pcileech_tbx4_100t_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/pcileech_bar_zero4k.coe" ]\ + [file normalize "${origin_dir}/ip/100T/pcileech_cfgspace.coe" ]\ + [file normalize "${origin_dir}/ip/100T/pcileech_cfgspace_writemask.coe" ]\ + [file normalize "${origin_dir}/ip/100T/bram_pcie_cfgspace.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_pcie_cfgspace/bram_pcie_cfgspace.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/clk_wiz_0.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "clk_wiz_0/clk_wiz_0.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/drom_pcie_cfgspace_writemask.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "drom_pcie_cfgspace_writemask/drom_pcie_cfgspace_writemask.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_74_74_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_74_74_clk1_bar_rd1/fifo_74_74_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/bram_bar_zero4k.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_bar_zero4k/bram_bar_zero4k.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_134_134_clk1_bar_rdrsp.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk1_bar_rdrsp/fifo_134_134_clk1_bar_rdrsp.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_141_141_clk1_bar_wr.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_141_141_clk1_bar_wr/fifo_141_141_clk1_bar_wr.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_134_134_clk2_rxfifo.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2_rxfifo/fifo_134_134_clk2_rxfifo.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_1_1_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_1_1_clk2/fifo_1_1_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_134_134_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2/fifo_134_134_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_64_64_clk1_fifocmd.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk1_fifocmd/fifo_64_64_clk1_fifocmd.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_129_129_clk1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_129_129_clk1/fifo_129_129_clk1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_64_64.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64/fifo_64_64.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_32_32_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk2/fifo_32_32_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_49_49_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_49_49_clk2/fifo_49_49_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_43_43_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_43_43_clk2/fifo_43_43_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/100T/fifo_34_34.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_34_34/fifo_34_34.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Create 'constrs_1' fileset (if not found) +if {[string equal [get_filesets -quiet constrs_1] ""]} { + create_fileset -constrset constrs_1 +} + +# Set 'constrs_1' fileset object +set obj [get_filesets constrs_1] + +# Add/Import constrs file and set constrs file properties +set file "[file normalize ${origin_dir}/src/pcileech_tbx4_100t.xdc]" +set file_imported [import_files -fileset constrs_1 [list $file]] +set file "src/pcileech_tbx4_100t.xdc" +set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]] +set_property -name "file_type" -value "XDC" -objects $file_obj +set_property -name "processing_order" -value "EARLY" -objects $file_obj + +# Set 'constrs_1' fileset properties +set obj [get_filesets constrs_1] +set_property -name "target_part" -value "xc7a100tfgg484-2" -objects $obj + +# Create 'sim_1' fileset (if not found) +if {[string equal [get_filesets -quiet sim_1] ""]} { + create_fileset -simset sim_1 +} + +# Set 'sim_1' fileset object +set obj [get_filesets sim_1] +# Empty (no sources present) + +# Set 'sim_1' fileset properties +set obj [get_filesets sim_1] +set_property -name "hbs.configure_design_for_hier_access" -value "1" -objects $obj +set_property -name "top" -value "pcileech_tbx4_100t_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + +# Upgrade IP from the currently installed Vivado version +upgrade_ip [get_ips *] + +# Set 'utils_1' fileset object +set obj [get_filesets utils_1] +# Empty (no sources present) + +# Set 'utils_1' fileset properties +set obj [get_filesets utils_1] + +# Create 'synth_1' run (if not found) +if {[string equal [get_runs -quiet synth_1] ""]} { + create_run -name synth_1 -part xc7a100tfgg484-2 -flow {Vivado Synthesis 2023} -strategy "Flow_PerfOptimized_high" -report_strategy {No Reports} -constrset constrs_1 +} else { + set_property strategy "Flow_PerfOptimized_high" [get_runs synth_1] + set_property flow "Vivado Synthesis 2023" [get_runs synth_1] +} +set obj [get_runs synth_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Synthesis Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'synth_1_synth_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] "" ] } { + create_report_config -report_name synth_1_synth_report_utilization_0 -report_type report_utilization:1.0 -steps synth_design -runs synth_1 +} +set obj [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] +if { $obj != "" } { + +} +set obj [get_runs synth_1] +set_property -name "needs_refresh" -value "1" -objects $obj +set_property -name "part" -value "xc7a100tfgg484-2" -objects $obj +set_property -name "auto_incremental_checkpoint" -value "1" -objects $obj +set_property -name "strategy" -value "Flow_PerfOptimized_high" -objects $obj +set_property -name "steps.synth_design.args.directive" -value "PerformanceOptimized" -objects $obj +set_property -name "steps.synth_design.args.fsm_extraction" -value "one_hot" -objects $obj +set_property -name "steps.synth_design.args.keep_equivalent_registers" -value "1" -objects $obj +set_property -name "steps.synth_design.args.resource_sharing" -value "off" -objects $obj +set_property -name "steps.synth_design.args.no_lc" -value "1" -objects $obj +set_property -name "steps.synth_design.args.shreg_min_size" -value "5" -objects $obj + +# set the current synth run +current_run -synthesis [get_runs synth_1] + +# Create 'impl_1' run (if not found) +if {[string equal [get_runs -quiet impl_1] ""]} { + create_run -name impl_1 -part xc7a100tfgg484-2 -flow {Vivado Implementation 2023} -strategy "Performance_ExtraTimingOpt" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1 +} else { + set_property strategy "Performance_ExtraTimingOpt" [get_runs impl_1] + set_property flow "Vivado Implementation 2023" [get_runs impl_1] +} +set obj [get_runs impl_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Implementation Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'impl_1_init_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_init_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps init_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.report_unconstrained" -value "1" -objects $obj + +} +# Create 'impl_1_opt_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] "" ] } { + create_report_config -report_name impl_1_opt_report_drc_0 -report_type report_drc:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.report_unconstrained" -value "1" -objects $obj + +} +# Create 'impl_1_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.report_unconstrained" -value "1" -objects $obj + +} +# Create 'impl_1_place_report_io_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] "" ] } { + create_report_config -report_name impl_1_place_report_io_0 -report_type report_io:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] "" ] } { + create_report_config -report_name impl_1_place_report_utilization_0 -report_type report_utilization:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_control_sets_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] "" ] } { + create_report_config -report_name impl_1_place_report_control_sets_0 -report_type report_control_sets:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] +if { $obj != "" } { +set_property -name "options.verbose" -value "1" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_1' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_1 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_place_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.report_unconstrained" -value "1" -objects $obj + +} +# Create 'impl_1_post_place_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_place_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_place_power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.report_unconstrained" -value "1" -objects $obj + +} +# Create 'impl_1_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.report_unconstrained" -value "1" -objects $obj + +} +# Create 'impl_1_route_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] "" ] } { + create_report_config -report_name impl_1_route_report_drc_0 -report_type report_drc:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_methodology_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] "" ] } { + create_report_config -report_name impl_1_route_report_methodology_0 -report_type report_methodology:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_power_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] "" ] } { + create_report_config -report_name impl_1_route_report_power_0 -report_type report_power:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_route_status_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] "" ] } { + create_report_config -report_name impl_1_route_report_route_status_0 -report_type report_route_status:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_route_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.report_unconstrained" -value "1" -objects $obj + +} +# Create 'impl_1_route_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_route_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_clock_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] "" ] } { + create_report_config -report_name impl_1_route_report_clock_utilization_0 -report_type report_clock_utilization:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_route_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.report_unconstrained" -value "1" -objects $obj +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +set obj [get_runs impl_1] +set_property -name "part" -value "xc7a100tfgg484-2" -objects $obj +set_property -name "strategy" -value "Performance_ExtraTimingOpt" -objects $obj +set_property -name "steps.place_design.args.directive" -value "ExtraTimingOpt" -objects $obj +set_property -name "steps.phys_opt_design.args.directive" -value "Explore" -objects $obj +set_property -name "steps.route_design.args.directive" -value "NoTimingRelaxation" -objects $obj +set_property -name "steps.post_route_phys_opt_design.is_enabled" -value "1" -objects $obj +set_property -name "steps.post_route_phys_opt_design.args.directive" -value "AddRetime" -objects $obj +set_property -name "steps.write_bitstream.args.bin_file" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj +set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj + +# set the current impl run +current_run -implementation [get_runs impl_1] +catch { + if { $idrFlowPropertiesConstraints != {} } { + set_param runs.disableIDRFlowPropertyConstraints $idrFlowPropertiesConstraints + } +} + +puts "INFO: Project created:${_xil_proj_name_}" +# Create 'drc_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "drc_1" ] ] ""]} { +create_dashboard_gadget -name {drc_1} -type drc +} +set obj [get_dashboard_gadgets [ list "drc_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_drc_0" -objects $obj + +# Create 'methodology_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "methodology_1" ] ] ""]} { +create_dashboard_gadget -name {methodology_1} -type methodology +} +set obj [get_dashboard_gadgets [ list "methodology_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_methodology_0" -objects $obj + +# Create 'power_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "power_1" ] ] ""]} { +create_dashboard_gadget -name {power_1} -type power +} +set obj [get_dashboard_gadgets [ list "power_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_power_0" -objects $obj + +# Create 'timing_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "timing_1" ] ] ""]} { +create_dashboard_gadget -name {timing_1} -type timing +} +set obj [get_dashboard_gadgets [ list "timing_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_timing_summary_0" -objects $obj + +# Create 'utilization_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_1" ] ] ""]} { +create_dashboard_gadget -name {utilization_1} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_1" ] ] +set_property -name "reports" -value "synth_1#synth_1_synth_report_utilization_0" -objects $obj +set_property -name "run.step" -value "synth_design" -objects $obj +set_property -name "run.type" -value "synthesis" -objects $obj + +# Create 'utilization_2' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_2" ] ] ""]} { +create_dashboard_gadget -name {utilization_2} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_2" ] ] +set_property -name "reports" -value "impl_1#impl_1_place_report_utilization_0" -objects $obj + +move_dashboard_gadget -name {utilization_1} -row 0 -col 0 +move_dashboard_gadget -name {power_1} -row 1 -col 0 +move_dashboard_gadget -name {drc_1} -row 2 -col 0 +move_dashboard_gadget -name {timing_1} -row 0 -col 1 +move_dashboard_gadget -name {utilization_2} -row 1 -col 1 +move_dashboard_gadget -name {methodology_1} -row 2 -col 1 diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_captain_75T.tcl b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_captain_75T.tcl new file mode 100644 index 0000000000000000000000000000000000000000..500a652f83b0dfdce242ca4c211f60c747b4ef78 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_captain_75T.tcl @@ -0,0 +1,1089 @@ +# +# Vivado generated .tcl for creating the pcileech_enigma_x1 vivado project. +# Run from within "Vivado Tcl Shell" with command: source vivado_generate_project.tcl -notrace +# + +# Set the reference directory for source file relative paths (by default the value is script directory path) +set origin_dir "." + +# Use origin directory path location variable, if specified in the tcl shell +if { [info exists ::origin_dir_loc] } { + set origin_dir $::origin_dir_loc +} + +# Set the project name +set _xil_proj_name_ "pcileech_enigma_x1" + +# Use project name variable, if specified in the tcl shell +if { [info exists ::user_project_name] } { + set _xil_proj_name_ $::user_project_name +} + +variable script_file +set script_file "vivado_generate_project.tcl" + +# Help information for this script +proc print_help {} { + variable script_file + puts "\nDescription:" + puts "Recreate a Vivado project from this script. The created project will be" + puts "functionally equivalent to the original project for which this script was" + puts "generated. The script contains commands for creating a project, filesets," + puts "runs, adding/importing sources and setting properties on various objects.\n" + puts "Syntax:" + puts "$script_file" + puts "$script_file -tclargs \[--origin_dir \]" + puts "$script_file -tclargs \[--project_name \]" + puts "$script_file -tclargs \[--help\]\n" + puts "Usage:" + puts "Name Description" + puts "-------------------------------------------------------------------------" + puts "\[--origin_dir \] Determine source file paths wrt this path. Default" + puts " origin_dir path value is \".\", otherwise, the value" + puts " that was set with the \"-paths_relative_to\" switch" + puts " when this script was generated.\n" + puts "\[--project_name \] Create project with the specified name. Default" + puts " name is the name of the project from where this" + puts " script was generated.\n" + puts "\[--help\] Print help information for this script" + puts "-------------------------------------------------------------------------\n" + exit 0 +} + +if { $::argc > 0 } { + for {set i 0} {$i < $::argc} {incr i} { + set option [string trim [lindex $::argv $i]] + switch -regexp -- $option { + "--origin_dir" { incr i; set origin_dir [lindex $::argv $i] } + "--project_name" { incr i; set _xil_proj_name_ [lindex $::argv $i] } + "--help" { print_help } + default { + if { [regexp {^-} $option] } { + puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n" + return 1 + } + } + } + } +} + +# Set the directory path for the original project from where this script was exported +set orig_proj_dir "[file normalize "$origin_dir/pcileech_enigma_x1"]" + +# Create project +create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7a75tfgg484-2 + +# Set the directory path for the new project +set proj_dir [get_property directory [current_project]] + +# Set project properties +set obj [current_project] +set_property -name "default_lib" -value "xil_defaultlib" -objects $obj +set_property -name "enable_vhdl_2008" -value "1" -objects $obj +set_property -name "ip_cache_permissions" -value "read write" -objects $obj +set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj +set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "platform.description" -value "Vivado generated DSA" -objects $obj +set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj +set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj +set_property -name "simulator_language" -value "Mixed" -objects $obj +set_property -name "webtalk.activehdl_export_sim" -value "5" -objects $obj +set_property -name "webtalk.ies_export_sim" -value "5" -objects $obj +set_property -name "webtalk.modelsim_export_sim" -value "5" -objects $obj +set_property -name "webtalk.questa_export_sim" -value "5" -objects $obj +set_property -name "webtalk.riviera_export_sim" -value "5" -objects $obj +set_property -name "webtalk.vcs_export_sim" -value "5" -objects $obj +set_property -name "webtalk.xsim_export_sim" -value "5" -objects $obj +set_property -name "xpm_libraries" -value "XPM_CDC XPM_MEMORY" -objects $obj + +# Create 'sources_1' fileset (if not found) +if {[string equal [get_filesets -quiet sources_1] ""]} { + create_fileset -srcset sources_1 +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/src/pcileech_header.svh"]\ + [file normalize "${origin_dir}/src/pcileech_com.sv" ]\ + [file normalize "${origin_dir}/src/pcileech_fifo.sv"]\ + [file normalize "${origin_dir}/src/pcileech_ft601.sv"]\ + [file normalize "${origin_dir}/src/pcileech_mux.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_cfg_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_tlp_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_bar_controller.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_cfgspace_shadow.sv"]\ + [file normalize "${origin_dir}/src/pcileech_enigma_x1_top.sv"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_core_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_common.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_top_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_brams_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_lane.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_misc.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie2_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_clock.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_eq.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_sync.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_user.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_rxeq_scan.v"]\ +] +set imported_files [import_files -fileset sources_1 $files] + +# Set 'sources_1' fileset file properties for remote files +# None + +# Set 'sources_1' fileset file properties for local files +set file "src/pcileech_header.svh" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog Header" -objects $file_obj + +set file "src/pcileech_com.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_fifo.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_ft601.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_mux.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_cfg_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_tlp_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_bar_controller.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_cfgspace_shadow.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_enigma_x1_top.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_core_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_common.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_top_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_brams_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_lane.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_misc.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie2_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_clock.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_eq.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_sync.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_user.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_rxeq_scan.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +# Set 'sources_1' fileset properties +set obj [get_filesets sources_1] +set_property -name "top" -value "pcileech_enigma_x1_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/pcileech_bar_zero4k.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace_writemask.coe" ]\ + [file normalize "${origin_dir}/ip/bram_pcie_cfgspace.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_pcie_cfgspace/bram_pcie_cfgspace.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/drom_pcie_cfgspace_writemask.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "drom_pcie_cfgspace_writemask/drom_pcie_cfgspace_writemask.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_74_74_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_74_74_clk1_bar_rd1/fifo_74_74_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/bram_bar_zero4k.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_bar_zero4k/bram_bar_zero4k.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk1_bar_rdrsp.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk1_bar_rdrsp/fifo_134_134_clk1_bar_rdrsp.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_141_141_clk1_bar_wr.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_141_141_clk1_bar_wr/fifo_141_141_clk1_bar_wr.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2_rxfifo.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2_rxfifo/fifo_134_134_clk2_rxfifo.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_1_1_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_1_1_clk2/fifo_1_1_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2/fifo_134_134_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk1_fifocmd.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk1_fifocmd/fifo_64_64_clk1_fifocmd.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_256_32_clk2_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_256_32_clk2_comtx/fifo_256_32_clk2_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk1_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk1_comtx/fifo_32_32_clk1_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_129_129_clk1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_129_129_clk1/fifo_129_129_clk1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64/fifo_64_64.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_4_4_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_4_4_clk1_bar_rd1/fifo_4_4_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk2/fifo_32_32_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_49_49_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_49_49_clk2/fifo_49_49_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_43_43_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_43_43_clk2/fifo_43_43_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_34_34.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_34_34/fifo_34_34.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk2_comrx.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk2_comrx/fifo_64_64_clk2_comrx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Create 'constrs_1' fileset (if not found) +if {[string equal [get_filesets -quiet constrs_1] ""]} { + create_fileset -constrset constrs_1 +} +# Set 'constrs_1' fileset object +set obj [get_filesets constrs_1] +# Add/Import constrs file and set constrs file properties +set file "[file normalize ${origin_dir}/src/pcileech_captain_75T.xdc]" +set file_imported [import_files -fileset constrs_1 [list $file]] +set file "src/pcileech_captain_75T.xdc" +set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]] +set_property -name "file_type" -value "XDC" -objects $file_obj + +# Set 'constrs_1' fileset properties +set obj [get_filesets constrs_1] +set_property -name "target_part" -value "xc7a75tfgg484-2" -objects $obj + +# Create 'sim_1' fileset (if not found) +if {[string equal [get_filesets -quiet sim_1] ""]} { + create_fileset -simset sim_1 +} + +# Set 'sim_1' fileset object +set obj [get_filesets sim_1] +# Empty (no sources present) + +# Set 'sim_1' fileset properties +set obj [get_filesets sim_1] +set_property -name "top" -value "pcileech_enigma_x1_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + +# Upgrade IP from the currently installed Vivado version +upgrade_ip [get_ips *] + +# Set 'utils_1' fileset object +set obj [get_filesets utils_1] +# Empty (no sources present) + +# Set 'utils_1' fileset properties +set obj [get_filesets utils_1] + +# Create 'synth_1' run (if not found) +if {[string equal [get_runs -quiet synth_1] ""]} { + create_run -name synth_1 -part xc7a75tfgg484-2 -flow {Vivado Synthesis 2022} -strategy "Vivado Synthesis Defaults" -report_strategy {No Reports} -constrset constrs_1 +} else { + set_property strategy "Vivado Synthesis Defaults" [get_runs synth_1] + set_property flow "Vivado Synthesis 2022" [get_runs synth_1] +} +set obj [get_runs synth_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Synthesis Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'synth_1_synth_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] "" ] } { + create_report_config -report_name synth_1_synth_report_utilization_0 -report_type report_utilization:1.0 -steps synth_design -runs synth_1 +} +set obj [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] +if { $obj != "" } { + +} +set obj [get_runs synth_1] +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Synthesis Defaults" -objects $obj + +# set the current synth run +current_run -synthesis [get_runs synth_1] + +# Create 'impl_1' run (if not found) +if {[string equal [get_runs -quiet impl_1] ""]} { + create_run -name impl_1 -part xc7a75tfgg484-2 -flow {Vivado Implementation 2022} -strategy "Vivado Implementation Defaults" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1 +} else { + set_property strategy "Vivado Implementation Defaults" [get_runs impl_1] + set_property flow "Vivado Implementation 2022" [get_runs impl_1] +} +set obj [get_runs impl_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Implementation Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'impl_1_init_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_init_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps init_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_opt_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] "" ] } { + create_report_config -report_name impl_1_opt_report_drc_0 -report_type report_drc:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_place_report_io_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] "" ] } { + create_report_config -report_name impl_1_place_report_io_0 -report_type report_io:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] "" ] } { + create_report_config -report_name impl_1_place_report_utilization_0 -report_type report_utilization:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_control_sets_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] "" ] } { + create_report_config -report_name impl_1_place_report_control_sets_0 -report_type report_control_sets:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] +if { $obj != "" } { +set_property -name "options.verbose" -value "1" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_1' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_1 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_place_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_post_place_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_place_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_place_power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] "" ] } { + create_report_config -report_name impl_1_route_report_drc_0 -report_type report_drc:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_methodology_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] "" ] } { + create_report_config -report_name impl_1_route_report_methodology_0 -report_type report_methodology:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_power_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] "" ] } { + create_report_config -report_name impl_1_route_report_power_0 -report_type report_power:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_route_status_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] "" ] } { + create_report_config -report_name impl_1_route_report_route_status_0 -report_type report_route_status:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_route_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_route_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_clock_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] "" ] } { + create_report_config -report_name impl_1_route_report_clock_utilization_0 -report_type report_clock_utilization:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_route_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +set obj [get_runs impl_1] +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Implementation Defaults" -objects $obj +set_property -name "steps.phys_opt_design.is_enabled" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.bin_file" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj +set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj + +# set the current impl run +current_run -implementation [get_runs impl_1] + +puts "INFO: Project created:${_xil_proj_name_}" +# Create 'drc_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "drc_1" ] ] ""]} { +create_dashboard_gadget -name {drc_1} -type drc +} +set obj [get_dashboard_gadgets [ list "drc_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_drc_0" -objects $obj + +# Create 'methodology_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "methodology_1" ] ] ""]} { +create_dashboard_gadget -name {methodology_1} -type methodology +} +set obj [get_dashboard_gadgets [ list "methodology_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_methodology_0" -objects $obj + +# Create 'power_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "power_1" ] ] ""]} { +create_dashboard_gadget -name {power_1} -type power +} +set obj [get_dashboard_gadgets [ list "power_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_power_0" -objects $obj + +# Create 'timing_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "timing_1" ] ] ""]} { +create_dashboard_gadget -name {timing_1} -type timing +} +set obj [get_dashboard_gadgets [ list "timing_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_timing_summary_0" -objects $obj + +# Create 'utilization_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_1" ] ] ""]} { +create_dashboard_gadget -name {utilization_1} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_1" ] ] +set_property -name "reports" -value "synth_1#synth_1_synth_report_utilization_0" -objects $obj +set_property -name "run.step" -value "synth_design" -objects $obj +set_property -name "run.type" -value "synthesis" -objects $obj + +# Create 'utilization_2' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_2" ] ] ""]} { +create_dashboard_gadget -name {utilization_2} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_2" ] ] +set_property -name "reports" -value "impl_1#impl_1_place_report_utilization_0" -objects $obj + +move_dashboard_gadget -name {utilization_1} -row 0 -col 0 +move_dashboard_gadget -name {power_1} -row 1 -col 0 +move_dashboard_gadget -name {drc_1} -row 2 -col 0 +move_dashboard_gadget -name {timing_1} -row 0 -col 1 +move_dashboard_gadget -name {utilization_2} -row 1 -col 1 +move_dashboard_gadget -name {methodology_1} -row 2 -col 1 diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_enigma_x1.tcl b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_enigma_x1.tcl new file mode 100644 index 0000000000000000000000000000000000000000..cd0498adfa60e805832d66c6577dad4e1df60b6c --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_enigma_x1.tcl @@ -0,0 +1,1089 @@ +# +# Vivado generated .tcl for creating the pcileech_enigma_x1 vivado project. +# Run from within "Vivado Tcl Shell" with command: source vivado_generate_project.tcl -notrace +# + +# Set the reference directory for source file relative paths (by default the value is script directory path) +set origin_dir "." + +# Use origin directory path location variable, if specified in the tcl shell +if { [info exists ::origin_dir_loc] } { + set origin_dir $::origin_dir_loc +} + +# Set the project name +set _xil_proj_name_ "pcileech_enigma_x1" + +# Use project name variable, if specified in the tcl shell +if { [info exists ::user_project_name] } { + set _xil_proj_name_ $::user_project_name +} + +variable script_file +set script_file "vivado_generate_project.tcl" + +# Help information for this script +proc print_help {} { + variable script_file + puts "\nDescription:" + puts "Recreate a Vivado project from this script. The created project will be" + puts "functionally equivalent to the original project for which this script was" + puts "generated. The script contains commands for creating a project, filesets," + puts "runs, adding/importing sources and setting properties on various objects.\n" + puts "Syntax:" + puts "$script_file" + puts "$script_file -tclargs \[--origin_dir \]" + puts "$script_file -tclargs \[--project_name \]" + puts "$script_file -tclargs \[--help\]\n" + puts "Usage:" + puts "Name Description" + puts "-------------------------------------------------------------------------" + puts "\[--origin_dir \] Determine source file paths wrt this path. Default" + puts " origin_dir path value is \".\", otherwise, the value" + puts " that was set with the \"-paths_relative_to\" switch" + puts " when this script was generated.\n" + puts "\[--project_name \] Create project with the specified name. Default" + puts " name is the name of the project from where this" + puts " script was generated.\n" + puts "\[--help\] Print help information for this script" + puts "-------------------------------------------------------------------------\n" + exit 0 +} + +if { $::argc > 0 } { + for {set i 0} {$i < $::argc} {incr i} { + set option [string trim [lindex $::argv $i]] + switch -regexp -- $option { + "--origin_dir" { incr i; set origin_dir [lindex $::argv $i] } + "--project_name" { incr i; set _xil_proj_name_ [lindex $::argv $i] } + "--help" { print_help } + default { + if { [regexp {^-} $option] } { + puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n" + return 1 + } + } + } + } +} + +# Set the directory path for the original project from where this script was exported +set orig_proj_dir "[file normalize "$origin_dir/pcileech_enigma_x1"]" + +# Create project +create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7a75tfgg484-2 + +# Set the directory path for the new project +set proj_dir [get_property directory [current_project]] + +# Set project properties +set obj [current_project] +set_property -name "default_lib" -value "xil_defaultlib" -objects $obj +set_property -name "enable_vhdl_2008" -value "1" -objects $obj +set_property -name "ip_cache_permissions" -value "read write" -objects $obj +set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj +set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "platform.description" -value "Vivado generated DSA" -objects $obj +set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj +set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj +set_property -name "simulator_language" -value "Mixed" -objects $obj +set_property -name "webtalk.activehdl_export_sim" -value "5" -objects $obj +set_property -name "webtalk.ies_export_sim" -value "5" -objects $obj +set_property -name "webtalk.modelsim_export_sim" -value "5" -objects $obj +set_property -name "webtalk.questa_export_sim" -value "5" -objects $obj +set_property -name "webtalk.riviera_export_sim" -value "5" -objects $obj +set_property -name "webtalk.vcs_export_sim" -value "5" -objects $obj +set_property -name "webtalk.xsim_export_sim" -value "5" -objects $obj +set_property -name "xpm_libraries" -value "XPM_CDC XPM_MEMORY" -objects $obj + +# Create 'sources_1' fileset (if not found) +if {[string equal [get_filesets -quiet sources_1] ""]} { + create_fileset -srcset sources_1 +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/src/pcileech_header.svh"]\ + [file normalize "${origin_dir}/src/pcileech_com.sv" ]\ + [file normalize "${origin_dir}/src/pcileech_fifo.sv"]\ + [file normalize "${origin_dir}/src/pcileech_ft601.sv"]\ + [file normalize "${origin_dir}/src/pcileech_mux.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_cfg_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_tlp_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_bar_controller.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_cfgspace_shadow.sv"]\ + [file normalize "${origin_dir}/src/pcileech_enigma_x1_top.sv"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_core_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_common.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_top_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_brams_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_lane.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_misc.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie2_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_clock.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_eq.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_sync.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_user.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_rxeq_scan.v"]\ +] +set imported_files [import_files -fileset sources_1 $files] + +# Set 'sources_1' fileset file properties for remote files +# None + +# Set 'sources_1' fileset file properties for local files +set file "src/pcileech_header.svh" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog Header" -objects $file_obj + +set file "src/pcileech_com.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_fifo.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_ft601.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_mux.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_cfg_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_tlp_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_bar_controller.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_cfgspace_shadow.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_enigma_x1_top.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_core_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_common.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_top_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_brams_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_lane.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_misc.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie2_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_clock.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_eq.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_sync.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_user.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_rxeq_scan.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +# Set 'sources_1' fileset properties +set obj [get_filesets sources_1] +set_property -name "top" -value "pcileech_enigma_x1_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/pcileech_bar_zero4k.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace_writemask.coe" ]\ + [file normalize "${origin_dir}/ip/bram_pcie_cfgspace.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_pcie_cfgspace/bram_pcie_cfgspace.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/drom_pcie_cfgspace_writemask.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "drom_pcie_cfgspace_writemask/drom_pcie_cfgspace_writemask.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_74_74_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_74_74_clk1_bar_rd1/fifo_74_74_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/bram_bar_zero4k.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_bar_zero4k/bram_bar_zero4k.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk1_bar_rdrsp.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk1_bar_rdrsp/fifo_134_134_clk1_bar_rdrsp.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_141_141_clk1_bar_wr.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_141_141_clk1_bar_wr/fifo_141_141_clk1_bar_wr.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2_rxfifo.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2_rxfifo/fifo_134_134_clk2_rxfifo.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_1_1_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_1_1_clk2/fifo_1_1_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2/fifo_134_134_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk1_fifocmd.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk1_fifocmd/fifo_64_64_clk1_fifocmd.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_256_32_clk2_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_256_32_clk2_comtx/fifo_256_32_clk2_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk1_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk1_comtx/fifo_32_32_clk1_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_129_129_clk1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_129_129_clk1/fifo_129_129_clk1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64/fifo_64_64.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_4_4_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_4_4_clk1_bar_rd1/fifo_4_4_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk2/fifo_32_32_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_49_49_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_49_49_clk2/fifo_49_49_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_43_43_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_43_43_clk2/fifo_43_43_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_34_34.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_34_34/fifo_34_34.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk2_comrx.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk2_comrx/fifo_64_64_clk2_comrx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Create 'constrs_1' fileset (if not found) +if {[string equal [get_filesets -quiet constrs_1] ""]} { + create_fileset -constrset constrs_1 +} +# Set 'constrs_1' fileset object +set obj [get_filesets constrs_1] +# Add/Import constrs file and set constrs file properties +set file "[file normalize ${origin_dir}/src/pcileech_enigma_x1.xdc]" +set file_imported [import_files -fileset constrs_1 [list $file]] +set file "src/pcileech_enigma_x1.xdc" +set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]] +set_property -name "file_type" -value "XDC" -objects $file_obj + +# Set 'constrs_1' fileset properties +set obj [get_filesets constrs_1] +set_property -name "target_part" -value "xc7a75tfgg484-2" -objects $obj + +# Create 'sim_1' fileset (if not found) +if {[string equal [get_filesets -quiet sim_1] ""]} { + create_fileset -simset sim_1 +} + +# Set 'sim_1' fileset object +set obj [get_filesets sim_1] +# Empty (no sources present) + +# Set 'sim_1' fileset properties +set obj [get_filesets sim_1] +set_property -name "top" -value "pcileech_enigma_x1_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + +# Upgrade IP from the currently installed Vivado version +upgrade_ip [get_ips *] + +# Set 'utils_1' fileset object +set obj [get_filesets utils_1] +# Empty (no sources present) + +# Set 'utils_1' fileset properties +set obj [get_filesets utils_1] + +# Create 'synth_1' run (if not found) +if {[string equal [get_runs -quiet synth_1] ""]} { + create_run -name synth_1 -part xc7a75tfgg484-2 -flow {Vivado Synthesis 2022} -strategy "Vivado Synthesis Defaults" -report_strategy {No Reports} -constrset constrs_1 +} else { + set_property strategy "Vivado Synthesis Defaults" [get_runs synth_1] + set_property flow "Vivado Synthesis 2022" [get_runs synth_1] +} +set obj [get_runs synth_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Synthesis Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'synth_1_synth_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] "" ] } { + create_report_config -report_name synth_1_synth_report_utilization_0 -report_type report_utilization:1.0 -steps synth_design -runs synth_1 +} +set obj [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] +if { $obj != "" } { + +} +set obj [get_runs synth_1] +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Synthesis Defaults" -objects $obj + +# set the current synth run +current_run -synthesis [get_runs synth_1] + +# Create 'impl_1' run (if not found) +if {[string equal [get_runs -quiet impl_1] ""]} { + create_run -name impl_1 -part xc7a75tfgg484-2 -flow {Vivado Implementation 2022} -strategy "Vivado Implementation Defaults" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1 +} else { + set_property strategy "Vivado Implementation Defaults" [get_runs impl_1] + set_property flow "Vivado Implementation 2022" [get_runs impl_1] +} +set obj [get_runs impl_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Implementation Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'impl_1_init_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_init_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps init_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_opt_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] "" ] } { + create_report_config -report_name impl_1_opt_report_drc_0 -report_type report_drc:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_place_report_io_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] "" ] } { + create_report_config -report_name impl_1_place_report_io_0 -report_type report_io:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] "" ] } { + create_report_config -report_name impl_1_place_report_utilization_0 -report_type report_utilization:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_control_sets_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] "" ] } { + create_report_config -report_name impl_1_place_report_control_sets_0 -report_type report_control_sets:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] +if { $obj != "" } { +set_property -name "options.verbose" -value "1" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_1' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_1 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_place_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_post_place_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_place_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_place_power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] "" ] } { + create_report_config -report_name impl_1_route_report_drc_0 -report_type report_drc:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_methodology_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] "" ] } { + create_report_config -report_name impl_1_route_report_methodology_0 -report_type report_methodology:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_power_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] "" ] } { + create_report_config -report_name impl_1_route_report_power_0 -report_type report_power:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_route_status_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] "" ] } { + create_report_config -report_name impl_1_route_report_route_status_0 -report_type report_route_status:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_route_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_route_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_clock_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] "" ] } { + create_report_config -report_name impl_1_route_report_clock_utilization_0 -report_type report_clock_utilization:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_route_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +set obj [get_runs impl_1] +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Implementation Defaults" -objects $obj +set_property -name "steps.phys_opt_design.is_enabled" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.bin_file" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj +set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj + +# set the current impl run +current_run -implementation [get_runs impl_1] + +puts "INFO: Project created:${_xil_proj_name_}" +# Create 'drc_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "drc_1" ] ] ""]} { +create_dashboard_gadget -name {drc_1} -type drc +} +set obj [get_dashboard_gadgets [ list "drc_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_drc_0" -objects $obj + +# Create 'methodology_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "methodology_1" ] ] ""]} { +create_dashboard_gadget -name {methodology_1} -type methodology +} +set obj [get_dashboard_gadgets [ list "methodology_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_methodology_0" -objects $obj + +# Create 'power_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "power_1" ] ] ""]} { +create_dashboard_gadget -name {power_1} -type power +} +set obj [get_dashboard_gadgets [ list "power_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_power_0" -objects $obj + +# Create 'timing_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "timing_1" ] ] ""]} { +create_dashboard_gadget -name {timing_1} -type timing +} +set obj [get_dashboard_gadgets [ list "timing_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_timing_summary_0" -objects $obj + +# Create 'utilization_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_1" ] ] ""]} { +create_dashboard_gadget -name {utilization_1} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_1" ] ] +set_property -name "reports" -value "synth_1#synth_1_synth_report_utilization_0" -objects $obj +set_property -name "run.step" -value "synth_design" -objects $obj +set_property -name "run.type" -value "synthesis" -objects $obj + +# Create 'utilization_2' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_2" ] ] ""]} { +create_dashboard_gadget -name {utilization_2} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_2" ] ] +set_property -name "reports" -value "impl_1#impl_1_place_report_utilization_0" -objects $obj + +move_dashboard_gadget -name {utilization_1} -row 0 -col 0 +move_dashboard_gadget -name {power_1} -row 1 -col 0 +move_dashboard_gadget -name {drc_1} -row 2 -col 0 +move_dashboard_gadget -name {timing_1} -row 0 -col 1 +move_dashboard_gadget -name {utilization_2} -row 1 -col 1 +move_dashboard_gadget -name {methodology_1} -row 2 -col 1 diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_immortal_35T.tcl b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_immortal_35T.tcl new file mode 100644 index 0000000000000000000000000000000000000000..6811d78353776d5227495ef8082fe28fc6f3814f --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_immortal_35T.tcl @@ -0,0 +1,1089 @@ +# +# Vivado generated .tcl for creating the pcileech_pciescreamer vivado project. +# Run from within "Vivado Tcl Shell" with command: source vivado_generate_project.tcl -notrace +# + +# Set the reference directory for source file relative paths (by default the value is script directory path) +set origin_dir "." + +# Use origin directory path location variable, if specified in the tcl shell +if { [info exists ::origin_dir_loc] } { + set origin_dir $::origin_dir_loc +} + +# Set the project name +set _xil_proj_name_ "pcileech_pciescreamer" + +# Use project name variable, if specified in the tcl shell +if { [info exists ::user_project_name] } { + set _xil_proj_name_ $::user_project_name +} + +variable script_file +set script_file "vivado_generate_project.tcl" + +# Help information for this script +proc print_help {} { + variable script_file + puts "\nDescription:" + puts "Recreate a Vivado project from this script. The created project will be" + puts "functionally equivalent to the original project for which this script was" + puts "generated. The script contains commands for creating a project, filesets," + puts "runs, adding/importing sources and setting properties on various objects.\n" + puts "Syntax:" + puts "$script_file" + puts "$script_file -tclargs \[--origin_dir \]" + puts "$script_file -tclargs \[--project_name \]" + puts "$script_file -tclargs \[--help\]\n" + puts "Usage:" + puts "Name Description" + puts "-------------------------------------------------------------------------" + puts "\[--origin_dir \] Determine source file paths wrt this path. Default" + puts " origin_dir path value is \".\", otherwise, the value" + puts " that was set with the \"-paths_relative_to\" switch" + puts " when this script was generated.\n" + puts "\[--project_name \] Create project with the specified name. Default" + puts " name is the name of the project from where this" + puts " script was generated.\n" + puts "\[--help\] Print help information for this script" + puts "-------------------------------------------------------------------------\n" + exit 0 +} + +if { $::argc > 0 } { + for {set i 0} {$i < $::argc} {incr i} { + set option [string trim [lindex $::argv $i]] + switch -regexp -- $option { + "--origin_dir" { incr i; set origin_dir [lindex $::argv $i] } + "--project_name" { incr i; set _xil_proj_name_ [lindex $::argv $i] } + "--help" { print_help } + default { + if { [regexp {^-} $option] } { + puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n" + return 1 + } + } + } + } +} + +# Set the directory path for the original project from where this script was exported +set orig_proj_dir "[file normalize "$origin_dir/pcileech_pciescreamer"]" + +# Create project +create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7a35tfgg484-2 + +# Set the directory path for the new project +set proj_dir [get_property directory [current_project]] + +# Set project properties +set obj [current_project] +set_property -name "default_lib" -value "xil_defaultlib" -objects $obj +set_property -name "enable_vhdl_2008" -value "1" -objects $obj +set_property -name "ip_cache_permissions" -value "read write" -objects $obj +set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj +set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj +set_property -name "part" -value "xc7a35tfgg484-2" -objects $obj +set_property -name "platform.description" -value "Vivado generated DSA" -objects $obj +set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj +set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj +set_property -name "simulator_language" -value "Mixed" -objects $obj +set_property -name "webtalk.activehdl_export_sim" -value "5" -objects $obj +set_property -name "webtalk.ies_export_sim" -value "5" -objects $obj +set_property -name "webtalk.modelsim_export_sim" -value "5" -objects $obj +set_property -name "webtalk.questa_export_sim" -value "5" -objects $obj +set_property -name "webtalk.riviera_export_sim" -value "5" -objects $obj +set_property -name "webtalk.vcs_export_sim" -value "5" -objects $obj +set_property -name "webtalk.xsim_export_sim" -value "5" -objects $obj +set_property -name "xpm_libraries" -value "XPM_CDC XPM_MEMORY" -objects $obj + +# Create 'sources_1' fileset (if not found) +if {[string equal [get_filesets -quiet sources_1] ""]} { + create_fileset -srcset sources_1 +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/src/pcileech_header.svh"]\ + [file normalize "${origin_dir}/src/pcileech_com.sv" ]\ + [file normalize "${origin_dir}/src/pcileech_fifo.sv"]\ + [file normalize "${origin_dir}/src/pcileech_ft601.sv"]\ + [file normalize "${origin_dir}/src/pcileech_mux.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_cfg_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_tlp_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_bar_controller.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_cfgspace_shadow.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pciescreamer_top.sv"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_core_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_common.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_top_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_brams_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_lane.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_misc.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie2_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_clock.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_eq.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_sync.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_user.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_rxeq_scan.v"]\ +] +set imported_files [import_files -fileset sources_1 $files] + +# Set 'sources_1' fileset file properties for remote files +# None + +# Set 'sources_1' fileset file properties for local files +set file "src/pcileech_header.svh" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog Header" -objects $file_obj + +set file "src/pcileech_com.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_fifo.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_ft601.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_mux.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_cfg_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_tlp_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_bar_controller.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_cfgspace_shadow.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pciescreamer_top.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_core_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_common.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_top_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_brams_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_lane.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_misc.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie2_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_clock.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_eq.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_sync.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_user.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_rxeq_scan.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +# Set 'sources_1' fileset properties +set obj [get_filesets sources_1] +set_property -name "top" -value "pcileech_pciescreamer_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/pcileech_bar_zero4k.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace_writemask.coe" ]\ + [file normalize "${origin_dir}/ip/bram_pcie_cfgspace.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_pcie_cfgspace/bram_pcie_cfgspace.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/drom_pcie_cfgspace_writemask.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "drom_pcie_cfgspace_writemask/drom_pcie_cfgspace_writemask.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_74_74_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_74_74_clk1_bar_rd1/fifo_74_74_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/bram_bar_zero4k.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_bar_zero4k/bram_bar_zero4k.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk1_bar_rdrsp.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk1_bar_rdrsp/fifo_134_134_clk1_bar_rdrsp.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_141_141_clk1_bar_wr.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_141_141_clk1_bar_wr/fifo_141_141_clk1_bar_wr.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2_rxfifo.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2_rxfifo/fifo_134_134_clk2_rxfifo.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_1_1_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_1_1_clk2/fifo_1_1_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2/fifo_134_134_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk1_fifocmd.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk1_fifocmd/fifo_64_64_clk1_fifocmd.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_256_32_clk2_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_256_32_clk2_comtx/fifo_256_32_clk2_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk1_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk1_comtx/fifo_32_32_clk1_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_129_129_clk1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_129_129_clk1/fifo_129_129_clk1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64/fifo_64_64.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_4_4_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_4_4_clk1_bar_rd1/fifo_4_4_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk2/fifo_32_32_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_49_49_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_49_49_clk2/fifo_49_49_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_43_43_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_43_43_clk2/fifo_43_43_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_34_34.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_34_34/fifo_34_34.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk2_comrx.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk2_comrx/fifo_64_64_clk2_comrx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Create 'constrs_1' fileset (if not found) +if {[string equal [get_filesets -quiet constrs_1] ""]} { + create_fileset -constrset constrs_1 +} +# Set 'constrs_1' fileset object +set obj [get_filesets constrs_1] +# Add/Import constrs file and set constrs file properties +set file "[file normalize ${origin_dir}/src/pcileech_pciescreamer.xdc]" +set file_imported [import_files -fileset constrs_1 [list $file]] +set file "src/pcileech_pciescreamer.xdc" +set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]] +set_property -name "file_type" -value "XDC" -objects $file_obj + +# Set 'constrs_1' fileset properties +set obj [get_filesets constrs_1] +set_property -name "target_part" -value "xc7a35tfgg484-2" -objects $obj + +# Create 'sim_1' fileset (if not found) +if {[string equal [get_filesets -quiet sim_1] ""]} { + create_fileset -simset sim_1 +} + +# Set 'sim_1' fileset object +set obj [get_filesets sim_1] +# Empty (no sources present) + +# Set 'sim_1' fileset properties +set obj [get_filesets sim_1] +set_property -name "top" -value "pcileech_pciescreamer_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + +# Upgrade IP from the currently installed Vivado version +upgrade_ip [get_ips *] + +# Set 'utils_1' fileset object +set obj [get_filesets utils_1] +# Empty (no sources present) + +# Set 'utils_1' fileset properties +set obj [get_filesets utils_1] + +# Create 'synth_1' run (if not found) +if {[string equal [get_runs -quiet synth_1] ""]} { + create_run -name synth_1 -part xc7a35tfgg484-2 -flow {Vivado Synthesis 2022} -strategy "Vivado Synthesis Defaults" -report_strategy {No Reports} -constrset constrs_1 +} else { + set_property strategy "Vivado Synthesis Defaults" [get_runs synth_1] + set_property flow "Vivado Synthesis 2022" [get_runs synth_1] +} +set obj [get_runs synth_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Synthesis Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'synth_1_synth_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] "" ] } { + create_report_config -report_name synth_1_synth_report_utilization_0 -report_type report_utilization:1.0 -steps synth_design -runs synth_1 +} +set obj [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] +if { $obj != "" } { + +} +set obj [get_runs synth_1] +set_property -name "part" -value "xc7a35tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Synthesis Defaults" -objects $obj + +# set the current synth run +current_run -synthesis [get_runs synth_1] + +# Create 'impl_1' run (if not found) +if {[string equal [get_runs -quiet impl_1] ""]} { + create_run -name impl_1 -part xc7a35tfgg484-2 -flow {Vivado Implementation 2022} -strategy "Vivado Implementation Defaults" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1 +} else { + set_property strategy "Vivado Implementation Defaults" [get_runs impl_1] + set_property flow "Vivado Implementation 2022" [get_runs impl_1] +} +set obj [get_runs impl_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Implementation Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'impl_1_init_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_init_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps init_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_opt_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] "" ] } { + create_report_config -report_name impl_1_opt_report_drc_0 -report_type report_drc:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_place_report_io_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] "" ] } { + create_report_config -report_name impl_1_place_report_io_0 -report_type report_io:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] "" ] } { + create_report_config -report_name impl_1_place_report_utilization_0 -report_type report_utilization:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_control_sets_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] "" ] } { + create_report_config -report_name impl_1_place_report_control_sets_0 -report_type report_control_sets:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] +if { $obj != "" } { +set_property -name "options.verbose" -value "1" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_1' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_1 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_place_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_post_place_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_place_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_place_power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] "" ] } { + create_report_config -report_name impl_1_route_report_drc_0 -report_type report_drc:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_methodology_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] "" ] } { + create_report_config -report_name impl_1_route_report_methodology_0 -report_type report_methodology:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_power_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] "" ] } { + create_report_config -report_name impl_1_route_report_power_0 -report_type report_power:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_route_status_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] "" ] } { + create_report_config -report_name impl_1_route_report_route_status_0 -report_type report_route_status:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_route_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_route_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_clock_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] "" ] } { + create_report_config -report_name impl_1_route_report_clock_utilization_0 -report_type report_clock_utilization:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_route_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +set obj [get_runs impl_1] +set_property -name "part" -value "xc7a35tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Implementation Defaults" -objects $obj +set_property -name "steps.phys_opt_design.is_enabled" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.bin_file" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj +set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj + +# set the current impl run +current_run -implementation [get_runs impl_1] + +puts "INFO: Project created:${_xil_proj_name_}" +# Create 'drc_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "drc_1" ] ] ""]} { +create_dashboard_gadget -name {drc_1} -type drc +} +set obj [get_dashboard_gadgets [ list "drc_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_drc_0" -objects $obj + +# Create 'methodology_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "methodology_1" ] ] ""]} { +create_dashboard_gadget -name {methodology_1} -type methodology +} +set obj [get_dashboard_gadgets [ list "methodology_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_methodology_0" -objects $obj + +# Create 'power_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "power_1" ] ] ""]} { +create_dashboard_gadget -name {power_1} -type power +} +set obj [get_dashboard_gadgets [ list "power_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_power_0" -objects $obj + +# Create 'timing_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "timing_1" ] ] ""]} { +create_dashboard_gadget -name {timing_1} -type timing +} +set obj [get_dashboard_gadgets [ list "timing_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_timing_summary_0" -objects $obj + +# Create 'utilization_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_1" ] ] ""]} { +create_dashboard_gadget -name {utilization_1} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_1" ] ] +set_property -name "reports" -value "synth_1#synth_1_synth_report_utilization_0" -objects $obj +set_property -name "run.step" -value "synth_design" -objects $obj +set_property -name "run.type" -value "synthesis" -objects $obj + +# Create 'utilization_2' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_2" ] ] ""]} { +create_dashboard_gadget -name {utilization_2} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_2" ] ] +set_property -name "reports" -value "impl_1#impl_1_place_report_utilization_0" -objects $obj + +move_dashboard_gadget -name {utilization_1} -row 0 -col 0 +move_dashboard_gadget -name {power_1} -row 1 -col 0 +move_dashboard_gadget -name {drc_1} -row 2 -col 0 +move_dashboard_gadget -name {timing_1} -row 0 -col 1 +move_dashboard_gadget -name {utilization_2} -row 1 -col 1 +move_dashboard_gadget -name {methodology_1} -row 2 -col 1 diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_immortal_75T.tcl b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_immortal_75T.tcl new file mode 100644 index 0000000000000000000000000000000000000000..e871a5d3e2665357aac82b25b7e191415b82f406 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_immortal_75T.tcl @@ -0,0 +1,1089 @@ +# +# Vivado generated .tcl for creating the pcileech_enigma_x1 vivado project. +# Run from within "Vivado Tcl Shell" with command: source vivado_generate_project.tcl -notrace +# + +# Set the reference directory for source file relative paths (by default the value is script directory path) +set origin_dir "." + +# Use origin directory path location variable, if specified in the tcl shell +if { [info exists ::origin_dir_loc] } { + set origin_dir $::origin_dir_loc +} + +# Set the project name +set _xil_proj_name_ "pcileech_enigma_x1" + +# Use project name variable, if specified in the tcl shell +if { [info exists ::user_project_name] } { + set _xil_proj_name_ $::user_project_name +} + +variable script_file +set script_file "vivado_generate_project.tcl" + +# Help information for this script +proc print_help {} { + variable script_file + puts "\nDescription:" + puts "Recreate a Vivado project from this script. The created project will be" + puts "functionally equivalent to the original project for which this script was" + puts "generated. The script contains commands for creating a project, filesets," + puts "runs, adding/importing sources and setting properties on various objects.\n" + puts "Syntax:" + puts "$script_file" + puts "$script_file -tclargs \[--origin_dir \]" + puts "$script_file -tclargs \[--project_name \]" + puts "$script_file -tclargs \[--help\]\n" + puts "Usage:" + puts "Name Description" + puts "-------------------------------------------------------------------------" + puts "\[--origin_dir \] Determine source file paths wrt this path. Default" + puts " origin_dir path value is \".\", otherwise, the value" + puts " that was set with the \"-paths_relative_to\" switch" + puts " when this script was generated.\n" + puts "\[--project_name \] Create project with the specified name. Default" + puts " name is the name of the project from where this" + puts " script was generated.\n" + puts "\[--help\] Print help information for this script" + puts "-------------------------------------------------------------------------\n" + exit 0 +} + +if { $::argc > 0 } { + for {set i 0} {$i < $::argc} {incr i} { + set option [string trim [lindex $::argv $i]] + switch -regexp -- $option { + "--origin_dir" { incr i; set origin_dir [lindex $::argv $i] } + "--project_name" { incr i; set _xil_proj_name_ [lindex $::argv $i] } + "--help" { print_help } + default { + if { [regexp {^-} $option] } { + puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n" + return 1 + } + } + } + } +} + +# Set the directory path for the original project from where this script was exported +set orig_proj_dir "[file normalize "$origin_dir/pcileech_enigma_x1"]" + +# Create project +create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7a75tfgg484-2 + +# Set the directory path for the new project +set proj_dir [get_property directory [current_project]] + +# Set project properties +set obj [current_project] +set_property -name "default_lib" -value "xil_defaultlib" -objects $obj +set_property -name "enable_vhdl_2008" -value "1" -objects $obj +set_property -name "ip_cache_permissions" -value "read write" -objects $obj +set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj +set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "platform.description" -value "Vivado generated DSA" -objects $obj +set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj +set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj +set_property -name "simulator_language" -value "Mixed" -objects $obj +set_property -name "webtalk.activehdl_export_sim" -value "5" -objects $obj +set_property -name "webtalk.ies_export_sim" -value "5" -objects $obj +set_property -name "webtalk.modelsim_export_sim" -value "5" -objects $obj +set_property -name "webtalk.questa_export_sim" -value "5" -objects $obj +set_property -name "webtalk.riviera_export_sim" -value "5" -objects $obj +set_property -name "webtalk.vcs_export_sim" -value "5" -objects $obj +set_property -name "webtalk.xsim_export_sim" -value "5" -objects $obj +set_property -name "xpm_libraries" -value "XPM_CDC XPM_MEMORY" -objects $obj + +# Create 'sources_1' fileset (if not found) +if {[string equal [get_filesets -quiet sources_1] ""]} { + create_fileset -srcset sources_1 +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/src/pcileech_header.svh"]\ + [file normalize "${origin_dir}/src/pcileech_com.sv" ]\ + [file normalize "${origin_dir}/src/pcileech_fifo.sv"]\ + [file normalize "${origin_dir}/src/pcileech_ft601.sv"]\ + [file normalize "${origin_dir}/src/pcileech_mux.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_cfg_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_tlp_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_bar_controller.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_cfgspace_shadow.sv"]\ + [file normalize "${origin_dir}/src/pcileech_enigma_x1_top.sv"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_core_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_common.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_top_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_brams_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_lane.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_misc.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie2_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_clock.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_eq.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_sync.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_user.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_rxeq_scan.v"]\ +] +set imported_files [import_files -fileset sources_1 $files] + +# Set 'sources_1' fileset file properties for remote files +# None + +# Set 'sources_1' fileset file properties for local files +set file "src/pcileech_header.svh" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog Header" -objects $file_obj + +set file "src/pcileech_com.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_fifo.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_ft601.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_mux.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_cfg_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_tlp_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_bar_controller.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_cfgspace_shadow.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_enigma_x1_top.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_core_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_common.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_top_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_brams_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_lane.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_misc.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie2_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_clock.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_eq.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_sync.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_user.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_rxeq_scan.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +# Set 'sources_1' fileset properties +set obj [get_filesets sources_1] +set_property -name "top" -value "pcileech_enigma_x1_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/pcileech_bar_zero4k.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace_writemask.coe" ]\ + [file normalize "${origin_dir}/ip/bram_pcie_cfgspace.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_pcie_cfgspace/bram_pcie_cfgspace.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/drom_pcie_cfgspace_writemask.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "drom_pcie_cfgspace_writemask/drom_pcie_cfgspace_writemask.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_74_74_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_74_74_clk1_bar_rd1/fifo_74_74_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/bram_bar_zero4k.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_bar_zero4k/bram_bar_zero4k.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk1_bar_rdrsp.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk1_bar_rdrsp/fifo_134_134_clk1_bar_rdrsp.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_141_141_clk1_bar_wr.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_141_141_clk1_bar_wr/fifo_141_141_clk1_bar_wr.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2_rxfifo.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2_rxfifo/fifo_134_134_clk2_rxfifo.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_1_1_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_1_1_clk2/fifo_1_1_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2/fifo_134_134_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk1_fifocmd.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk1_fifocmd/fifo_64_64_clk1_fifocmd.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_256_32_clk2_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_256_32_clk2_comtx/fifo_256_32_clk2_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk1_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk1_comtx/fifo_32_32_clk1_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_129_129_clk1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_129_129_clk1/fifo_129_129_clk1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64/fifo_64_64.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_4_4_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_4_4_clk1_bar_rd1/fifo_4_4_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk2/fifo_32_32_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_49_49_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_49_49_clk2/fifo_49_49_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_43_43_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_43_43_clk2/fifo_43_43_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_34_34.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_34_34/fifo_34_34.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk2_comrx.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk2_comrx/fifo_64_64_clk2_comrx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Create 'constrs_1' fileset (if not found) +if {[string equal [get_filesets -quiet constrs_1] ""]} { + create_fileset -constrset constrs_1 +} +# Set 'constrs_1' fileset object +set obj [get_filesets constrs_1] +# Add/Import constrs file and set constrs file properties +set file "[file normalize ${origin_dir}/src/75immt.xdc]" +set file_imported [import_files -fileset constrs_1 [list $file]] +set file "src/75immt.xdc" +set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]] +set_property -name "file_type" -value "XDC" -objects $file_obj + +# Set 'constrs_1' fileset properties +set obj [get_filesets constrs_1] +set_property -name "target_part" -value "xc7a75tfgg484-2" -objects $obj + +# Create 'sim_1' fileset (if not found) +if {[string equal [get_filesets -quiet sim_1] ""]} { + create_fileset -simset sim_1 +} + +# Set 'sim_1' fileset object +set obj [get_filesets sim_1] +# Empty (no sources present) + +# Set 'sim_1' fileset properties +set obj [get_filesets sim_1] +set_property -name "top" -value "pcileech_enigma_x1_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + +# Upgrade IP from the currently installed Vivado version +upgrade_ip [get_ips *] + +# Set 'utils_1' fileset object +set obj [get_filesets utils_1] +# Empty (no sources present) + +# Set 'utils_1' fileset properties +set obj [get_filesets utils_1] + +# Create 'synth_1' run (if not found) +if {[string equal [get_runs -quiet synth_1] ""]} { + create_run -name synth_1 -part xc7a75tfgg484-2 -flow {Vivado Synthesis 2022} -strategy "Vivado Synthesis Defaults" -report_strategy {No Reports} -constrset constrs_1 +} else { + set_property strategy "Vivado Synthesis Defaults" [get_runs synth_1] + set_property flow "Vivado Synthesis 2022" [get_runs synth_1] +} +set obj [get_runs synth_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Synthesis Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'synth_1_synth_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] "" ] } { + create_report_config -report_name synth_1_synth_report_utilization_0 -report_type report_utilization:1.0 -steps synth_design -runs synth_1 +} +set obj [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] +if { $obj != "" } { + +} +set obj [get_runs synth_1] +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Synthesis Defaults" -objects $obj + +# set the current synth run +current_run -synthesis [get_runs synth_1] + +# Create 'impl_1' run (if not found) +if {[string equal [get_runs -quiet impl_1] ""]} { + create_run -name impl_1 -part xc7a75tfgg484-2 -flow {Vivado Implementation 2022} -strategy "Vivado Implementation Defaults" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1 +} else { + set_property strategy "Vivado Implementation Defaults" [get_runs impl_1] + set_property flow "Vivado Implementation 2022" [get_runs impl_1] +} +set obj [get_runs impl_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Implementation Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'impl_1_init_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_init_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps init_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_opt_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] "" ] } { + create_report_config -report_name impl_1_opt_report_drc_0 -report_type report_drc:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_place_report_io_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] "" ] } { + create_report_config -report_name impl_1_place_report_io_0 -report_type report_io:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] "" ] } { + create_report_config -report_name impl_1_place_report_utilization_0 -report_type report_utilization:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_control_sets_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] "" ] } { + create_report_config -report_name impl_1_place_report_control_sets_0 -report_type report_control_sets:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] +if { $obj != "" } { +set_property -name "options.verbose" -value "1" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_1' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_1 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_place_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_post_place_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_place_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_place_power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] "" ] } { + create_report_config -report_name impl_1_route_report_drc_0 -report_type report_drc:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_methodology_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] "" ] } { + create_report_config -report_name impl_1_route_report_methodology_0 -report_type report_methodology:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_power_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] "" ] } { + create_report_config -report_name impl_1_route_report_power_0 -report_type report_power:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_route_status_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] "" ] } { + create_report_config -report_name impl_1_route_report_route_status_0 -report_type report_route_status:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_route_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_route_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_clock_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] "" ] } { + create_report_config -report_name impl_1_route_report_clock_utilization_0 -report_type report_clock_utilization:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_route_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +set obj [get_runs impl_1] +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Implementation Defaults" -objects $obj +set_property -name "steps.phys_opt_design.is_enabled" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.bin_file" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj +set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj + +# set the current impl run +current_run -implementation [get_runs impl_1] + +puts "INFO: Project created:${_xil_proj_name_}" +# Create 'drc_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "drc_1" ] ] ""]} { +create_dashboard_gadget -name {drc_1} -type drc +} +set obj [get_dashboard_gadgets [ list "drc_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_drc_0" -objects $obj + +# Create 'methodology_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "methodology_1" ] ] ""]} { +create_dashboard_gadget -name {methodology_1} -type methodology +} +set obj [get_dashboard_gadgets [ list "methodology_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_methodology_0" -objects $obj + +# Create 'power_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "power_1" ] ] ""]} { +create_dashboard_gadget -name {power_1} -type power +} +set obj [get_dashboard_gadgets [ list "power_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_power_0" -objects $obj + +# Create 'timing_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "timing_1" ] ] ""]} { +create_dashboard_gadget -name {timing_1} -type timing +} +set obj [get_dashboard_gadgets [ list "timing_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_timing_summary_0" -objects $obj + +# Create 'utilization_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_1" ] ] ""]} { +create_dashboard_gadget -name {utilization_1} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_1" ] ] +set_property -name "reports" -value "synth_1#synth_1_synth_report_utilization_0" -objects $obj +set_property -name "run.step" -value "synth_design" -objects $obj +set_property -name "run.type" -value "synthesis" -objects $obj + +# Create 'utilization_2' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_2" ] ] ""]} { +create_dashboard_gadget -name {utilization_2} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_2" ] ] +set_property -name "reports" -value "impl_1#impl_1_place_report_utilization_0" -objects $obj + +move_dashboard_gadget -name {utilization_1} -row 0 -col 0 +move_dashboard_gadget -name {power_1} -row 1 -col 0 +move_dashboard_gadget -name {drc_1} -row 2 -col 0 +move_dashboard_gadget -name {timing_1} -row 0 -col 1 +move_dashboard_gadget -name {utilization_2} -row 1 -col 1 +move_dashboard_gadget -name {methodology_1} -row 2 -col 1 diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_immortal_75Ts.tcl b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_immortal_75Ts.tcl new file mode 100644 index 0000000000000000000000000000000000000000..e7575a479b07c0050ec21b292017ded583b357f2 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_immortal_75Ts.tcl @@ -0,0 +1,1089 @@ +# +# Vivado generated .tcl for creating the pcileech_squirrel vivado project. +# Run from within "Vivado Tcl Shell" with command: source vivado_generate_project.tcl -notrace +# + +# Set the reference directory for source file relative paths (by default the value is script directory path) +set origin_dir "." + +# Use origin directory path location variable, if specified in the tcl shell +if { [info exists ::origin_dir_loc] } { + set origin_dir $::origin_dir_loc +} + +# Set the project name +set _xil_proj_name_ "pcileech_squirrel" + +# Use project name variable, if specified in the tcl shell +if { [info exists ::user_project_name] } { + set _xil_proj_name_ $::user_project_name +} + +variable script_file +set script_file "vivado_generate_project.tcl" + +# Help information for this script +proc print_help {} { + variable script_file + puts "\nDescription:" + puts "Recreate a Vivado project from this script. The created project will be" + puts "functionally equivalent to the original project for which this script was" + puts "generated. The script contains commands for creating a project, filesets," + puts "runs, adding/importing sources and setting properties on various objects.\n" + puts "Syntax:" + puts "$script_file" + puts "$script_file -tclargs \[--origin_dir \]" + puts "$script_file -tclargs \[--project_name \]" + puts "$script_file -tclargs \[--help\]\n" + puts "Usage:" + puts "Name Description" + puts "-------------------------------------------------------------------------" + puts "\[--origin_dir \] Determine source file paths wrt this path. Default" + puts " origin_dir path value is \".\", otherwise, the value" + puts " that was set with the \"-paths_relative_to\" switch" + puts " when this script was generated.\n" + puts "\[--project_name \] Create project with the specified name. Default" + puts " name is the name of the project from where this" + puts " script was generated.\n" + puts "\[--help\] Print help information for this script" + puts "-------------------------------------------------------------------------\n" + exit 0 +} + +if { $::argc > 0 } { + for {set i 0} {$i < $::argc} {incr i} { + set option [string trim [lindex $::argv $i]] + switch -regexp -- $option { + "--origin_dir" { incr i; set origin_dir [lindex $::argv $i] } + "--project_name" { incr i; set _xil_proj_name_ [lindex $::argv $i] } + "--help" { print_help } + default { + if { [regexp {^-} $option] } { + puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n" + return 1 + } + } + } + } +} + +# Set the directory path for the original project from where this script was exported +set orig_proj_dir "[file normalize "$origin_dir/pcileech_squirrel"]" + +# Create project +create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7a75tfgg484-2 + +# Set the directory path for the new project +set proj_dir [get_property directory [current_project]] + +# Set project properties +set obj [current_project] +set_property -name "default_lib" -value "xil_defaultlib" -objects $obj +set_property -name "enable_vhdl_2008" -value "1" -objects $obj +set_property -name "ip_cache_permissions" -value "read write" -objects $obj +set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj +set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "platform.description" -value "Vivado generated DSA" -objects $obj +set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj +set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj +set_property -name "simulator_language" -value "Mixed" -objects $obj +set_property -name "webtalk.activehdl_export_sim" -value "5" -objects $obj +set_property -name "webtalk.ies_export_sim" -value "5" -objects $obj +set_property -name "webtalk.modelsim_export_sim" -value "5" -objects $obj +set_property -name "webtalk.questa_export_sim" -value "5" -objects $obj +set_property -name "webtalk.riviera_export_sim" -value "5" -objects $obj +set_property -name "webtalk.vcs_export_sim" -value "5" -objects $obj +set_property -name "webtalk.xsim_export_sim" -value "5" -objects $obj +set_property -name "xpm_libraries" -value "XPM_CDC XPM_MEMORY" -objects $obj + +# Create 'sources_1' fileset (if not found) +if {[string equal [get_filesets -quiet sources_1] ""]} { + create_fileset -srcset sources_1 +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/src/pcileech_header.svh"]\ + [file normalize "${origin_dir}/src/pcileech_com.sv" ]\ + [file normalize "${origin_dir}/src/pcileech_fifo.sv"]\ + [file normalize "${origin_dir}/src/pcileech_ft601.sv"]\ + [file normalize "${origin_dir}/src/pcileech_mux.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_cfg_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_tlp_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_bar_controller.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_cfgspace_shadow.sv"]\ + [file normalize "${origin_dir}/src/pcileech_squirrel_top.sv"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_core_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_common.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_top_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_brams_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_lane.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_misc.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie2_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_clock.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_eq.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_sync.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_user.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_rxeq_scan.v"]\ +] +set imported_files [import_files -fileset sources_1 $files] + +# Set 'sources_1' fileset file properties for remote files +# None + +# Set 'sources_1' fileset file properties for local files +set file "src/pcileech_header.svh" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog Header" -objects $file_obj + +set file "src/pcileech_com.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_fifo.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_ft601.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_mux.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_cfg_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_tlp_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_bar_controller.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_cfgspace_shadow.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_squirrel_top.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_core_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_common.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_top_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_brams_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_lane.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_misc.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie2_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_clock.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_eq.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_sync.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_user.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_rxeq_scan.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +# Set 'sources_1' fileset properties +set obj [get_filesets sources_1] +set_property -name "top" -value "pcileech_squirrel_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/pcileech_bar_zero4k.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace_writemask.coe" ]\ + [file normalize "${origin_dir}/ip/bram_pcie_cfgspace.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_pcie_cfgspace/bram_pcie_cfgspace.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/drom_pcie_cfgspace_writemask.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "drom_pcie_cfgspace_writemask/drom_pcie_cfgspace_writemask.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_74_74_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_74_74_clk1_bar_rd1/fifo_74_74_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/bram_bar_zero4k.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_bar_zero4k/bram_bar_zero4k.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk1_bar_rdrsp.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk1_bar_rdrsp/fifo_134_134_clk1_bar_rdrsp.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_141_141_clk1_bar_wr.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_141_141_clk1_bar_wr/fifo_141_141_clk1_bar_wr.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2_rxfifo.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2_rxfifo/fifo_134_134_clk2_rxfifo.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_1_1_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_1_1_clk2/fifo_1_1_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2/fifo_134_134_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk1_fifocmd.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk1_fifocmd/fifo_64_64_clk1_fifocmd.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_256_32_clk2_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_256_32_clk2_comtx/fifo_256_32_clk2_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk1_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk1_comtx/fifo_32_32_clk1_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_129_129_clk1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_129_129_clk1/fifo_129_129_clk1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64/fifo_64_64.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_4_4_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_4_4_clk1_bar_rd1/fifo_4_4_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk2/fifo_32_32_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_49_49_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_49_49_clk2/fifo_49_49_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_43_43_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_43_43_clk2/fifo_43_43_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_34_34.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_34_34/fifo_34_34.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk2_comrx.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk2_comrx/fifo_64_64_clk2_comrx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Create 'constrs_1' fileset (if not found) +if {[string equal [get_filesets -quiet constrs_1] ""]} { + create_fileset -constrset constrs_1 +} +# Set 'constrs_1' fileset object +set obj [get_filesets constrs_1] +# Add/Import constrs file and set constrs file properties +set file "[file normalize ${origin_dir}/src/pcileech_squirrel.xdc]" +set file_imported [import_files -fileset constrs_1 [list $file]] +set file "src/pcileech_squirrel.xdc" +set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]] +set_property -name "file_type" -value "XDC" -objects $file_obj + +# Set 'constrs_1' fileset properties +set obj [get_filesets constrs_1] +set_property -name "target_part" -value "xc7a75tfgg484-2" -objects $obj + +# Create 'sim_1' fileset (if not found) +if {[string equal [get_filesets -quiet sim_1] ""]} { + create_fileset -simset sim_1 +} + +# Set 'sim_1' fileset object +set obj [get_filesets sim_1] +# Empty (no sources present) + +# Set 'sim_1' fileset properties +set obj [get_filesets sim_1] +set_property -name "top" -value "pcileech_squirrel_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + +# Upgrade IP from the currently installed Vivado version +upgrade_ip [get_ips *] + +# Set 'utils_1' fileset object +set obj [get_filesets utils_1] +# Empty (no sources present) + +# Set 'utils_1' fileset properties +set obj [get_filesets utils_1] + +# Create 'synth_1' run (if not found) +if {[string equal [get_runs -quiet synth_1] ""]} { + create_run -name synth_1 -part xc7a75tfgg484-2 -flow {Vivado Synthesis 2022} -strategy "Vivado Synthesis Defaults" -report_strategy {No Reports} -constrset constrs_1 +} else { + set_property strategy "Vivado Synthesis Defaults" [get_runs synth_1] + set_property flow "Vivado Synthesis 2022" [get_runs synth_1] +} +set obj [get_runs synth_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Synthesis Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'synth_1_synth_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] "" ] } { + create_report_config -report_name synth_1_synth_report_utilization_0 -report_type report_utilization:1.0 -steps synth_design -runs synth_1 +} +set obj [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] +if { $obj != "" } { + +} +set obj [get_runs synth_1] +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Synthesis Defaults" -objects $obj + +# set the current synth run +current_run -synthesis [get_runs synth_1] + +# Create 'impl_1' run (if not found) +if {[string equal [get_runs -quiet impl_1] ""]} { + create_run -name impl_1 -part xc7a75tfgg484-2 -flow {Vivado Implementation 2022} -strategy "Vivado Implementation Defaults" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1 +} else { + set_property strategy "Vivado Implementation Defaults" [get_runs impl_1] + set_property flow "Vivado Implementation 2022" [get_runs impl_1] +} +set obj [get_runs impl_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Implementation Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'impl_1_init_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_init_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps init_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_opt_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] "" ] } { + create_report_config -report_name impl_1_opt_report_drc_0 -report_type report_drc:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_place_report_io_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] "" ] } { + create_report_config -report_name impl_1_place_report_io_0 -report_type report_io:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] "" ] } { + create_report_config -report_name impl_1_place_report_utilization_0 -report_type report_utilization:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_control_sets_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] "" ] } { + create_report_config -report_name impl_1_place_report_control_sets_0 -report_type report_control_sets:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] +if { $obj != "" } { +set_property -name "options.verbose" -value "1" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_1' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_1 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_place_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_post_place_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_place_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_place_power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] "" ] } { + create_report_config -report_name impl_1_route_report_drc_0 -report_type report_drc:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_methodology_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] "" ] } { + create_report_config -report_name impl_1_route_report_methodology_0 -report_type report_methodology:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_power_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] "" ] } { + create_report_config -report_name impl_1_route_report_power_0 -report_type report_power:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_route_status_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] "" ] } { + create_report_config -report_name impl_1_route_report_route_status_0 -report_type report_route_status:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_route_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_route_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_clock_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] "" ] } { + create_report_config -report_name impl_1_route_report_clock_utilization_0 -report_type report_clock_utilization:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_route_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +set obj [get_runs impl_1] +set_property -name "part" -value "xc7a75tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Implementation Defaults" -objects $obj +set_property -name "steps.phys_opt_design.is_enabled" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.bin_file" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj +set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj + +# set the current impl run +current_run -implementation [get_runs impl_1] + +puts "INFO: Project created:${_xil_proj_name_}" +# Create 'drc_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "drc_1" ] ] ""]} { +create_dashboard_gadget -name {drc_1} -type drc +} +set obj [get_dashboard_gadgets [ list "drc_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_drc_0" -objects $obj + +# Create 'methodology_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "methodology_1" ] ] ""]} { +create_dashboard_gadget -name {methodology_1} -type methodology +} +set obj [get_dashboard_gadgets [ list "methodology_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_methodology_0" -objects $obj + +# Create 'power_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "power_1" ] ] ""]} { +create_dashboard_gadget -name {power_1} -type power +} +set obj [get_dashboard_gadgets [ list "power_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_power_0" -objects $obj + +# Create 'timing_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "timing_1" ] ] ""]} { +create_dashboard_gadget -name {timing_1} -type timing +} +set obj [get_dashboard_gadgets [ list "timing_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_timing_summary_0" -objects $obj + +# Create 'utilization_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_1" ] ] ""]} { +create_dashboard_gadget -name {utilization_1} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_1" ] ] +set_property -name "reports" -value "synth_1#synth_1_synth_report_utilization_0" -objects $obj +set_property -name "run.step" -value "synth_design" -objects $obj +set_property -name "run.type" -value "synthesis" -objects $obj + +# Create 'utilization_2' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_2" ] ] ""]} { +create_dashboard_gadget -name {utilization_2} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_2" ] ] +set_property -name "reports" -value "impl_1#impl_1_place_report_utilization_0" -objects $obj + +move_dashboard_gadget -name {utilization_1} -row 0 -col 0 +move_dashboard_gadget -name {power_1} -row 1 -col 0 +move_dashboard_gadget -name {drc_1} -row 2 -col 0 +move_dashboard_gadget -name {timing_1} -row 0 -col 1 +move_dashboard_gadget -name {utilization_2} -row 1 -col 1 +move_dashboard_gadget -name {methodology_1} -row 2 -col 1 diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_m2.tcl b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_m2.tcl new file mode 100644 index 0000000000000000000000000000000000000000..993d8c20ddf3192d1696c3536677c28ca02550f6 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_m2.tcl @@ -0,0 +1,1089 @@ +# +# Vivado generated .tcl for creating the pcileech_screamer_m2 vivado project. +# Run from within "Vivado Tcl Shell" with command: source vivado_generate_project.tcl -notrace +# + +# Set the reference directory for source file relative paths (by default the value is script directory path) +set origin_dir "." + +# Use origin directory path location variable, if specified in the tcl shell +if { [info exists ::origin_dir_loc] } { + set origin_dir $::origin_dir_loc +} + +# Set the project name +set _xil_proj_name_ "pcileech_screamer_m2" + +# Use project name variable, if specified in the tcl shell +if { [info exists ::user_project_name] } { + set _xil_proj_name_ $::user_project_name +} + +variable script_file +set script_file "vivado_generate_project.tcl" + +# Help information for this script +proc print_help {} { + variable script_file + puts "\nDescription:" + puts "Recreate a Vivado project from this script. The created project will be" + puts "functionally equivalent to the original project for which this script was" + puts "generated. The script contains commands for creating a project, filesets," + puts "runs, adding/importing sources and setting properties on various objects.\n" + puts "Syntax:" + puts "$script_file" + puts "$script_file -tclargs \[--origin_dir \]" + puts "$script_file -tclargs \[--project_name \]" + puts "$script_file -tclargs \[--help\]\n" + puts "Usage:" + puts "Name Description" + puts "-------------------------------------------------------------------------" + puts "\[--origin_dir \] Determine source file paths wrt this path. Default" + puts " origin_dir path value is \".\", otherwise, the value" + puts " that was set with the \"-paths_relative_to\" switch" + puts " when this script was generated.\n" + puts "\[--project_name \] Create project with the specified name. Default" + puts " name is the name of the project from where this" + puts " script was generated.\n" + puts "\[--help\] Print help information for this script" + puts "-------------------------------------------------------------------------\n" + exit 0 +} + +if { $::argc > 0 } { + for {set i 0} {$i < $::argc} {incr i} { + set option [string trim [lindex $::argv $i]] + switch -regexp -- $option { + "--origin_dir" { incr i; set origin_dir [lindex $::argv $i] } + "--project_name" { incr i; set _xil_proj_name_ [lindex $::argv $i] } + "--help" { print_help } + default { + if { [regexp {^-} $option] } { + puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n" + return 1 + } + } + } + } +} + +# Set the directory path for the original project from where this script was exported +set orig_proj_dir "[file normalize "$origin_dir/pcileech_screamer_m2"]" + +# Create project +create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7a35tcsg325-2 + +# Set the directory path for the new project +set proj_dir [get_property directory [current_project]] + +# Set project properties +set obj [current_project] +set_property -name "default_lib" -value "xil_defaultlib" -objects $obj +set_property -name "enable_vhdl_2008" -value "1" -objects $obj +set_property -name "ip_cache_permissions" -value "read write" -objects $obj +set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj +set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj +set_property -name "part" -value "xc7a35tcsg325-2" -objects $obj +set_property -name "platform.description" -value "Vivado generated DSA" -objects $obj +set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj +set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj +set_property -name "simulator_language" -value "Mixed" -objects $obj +set_property -name "webtalk.activehdl_export_sim" -value "5" -objects $obj +set_property -name "webtalk.ies_export_sim" -value "5" -objects $obj +set_property -name "webtalk.modelsim_export_sim" -value "5" -objects $obj +set_property -name "webtalk.questa_export_sim" -value "5" -objects $obj +set_property -name "webtalk.riviera_export_sim" -value "5" -objects $obj +set_property -name "webtalk.vcs_export_sim" -value "5" -objects $obj +set_property -name "webtalk.xsim_export_sim" -value "5" -objects $obj +set_property -name "xpm_libraries" -value "XPM_CDC XPM_MEMORY" -objects $obj + +# Create 'sources_1' fileset (if not found) +if {[string equal [get_filesets -quiet sources_1] ""]} { + create_fileset -srcset sources_1 +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/src/pcileech_header.svh"]\ + [file normalize "${origin_dir}/src/pcileech_com.sv" ]\ + [file normalize "${origin_dir}/src/pcileech_fifo.sv"]\ + [file normalize "${origin_dir}/src/pcileech_ft601.sv"]\ + [file normalize "${origin_dir}/src/pcileech_mux.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_cfg_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_tlp_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_bar_controller.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_cfgspace_shadow.sv"]\ + [file normalize "${origin_dir}/src/pcileech_screamer_m2_top.sv"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_core_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_common.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_top_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_brams_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_lane.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_misc.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie2_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_clock.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_eq.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_sync.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_user.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_rxeq_scan.v"]\ +] +set imported_files [import_files -fileset sources_1 $files] + +# Set 'sources_1' fileset file properties for remote files +# None + +# Set 'sources_1' fileset file properties for local files +set file "src/pcileech_header.svh" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog Header" -objects $file_obj + +set file "src/pcileech_com.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_fifo.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_ft601.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_mux.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_cfg_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_tlp_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_bar_controller.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_cfgspace_shadow.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_screamer_m2_top.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_core_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_common.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_top_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_brams_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_lane.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_misc.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie2_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_clock.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_eq.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_sync.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_user.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_rxeq_scan.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +# Set 'sources_1' fileset properties +set obj [get_filesets sources_1] +set_property -name "top" -value "pcileech_screamer_m2_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/pcileech_bar_zero4k.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace_writemask.coe" ]\ + [file normalize "${origin_dir}/ip/bram_pcie_cfgspace.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_pcie_cfgspace/bram_pcie_cfgspace.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/drom_pcie_cfgspace_writemask.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "drom_pcie_cfgspace_writemask/drom_pcie_cfgspace_writemask.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_74_74_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_74_74_clk1_bar_rd1/fifo_74_74_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/bram_bar_zero4k.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_bar_zero4k/bram_bar_zero4k.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk1_bar_rdrsp.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk1_bar_rdrsp/fifo_134_134_clk1_bar_rdrsp.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_141_141_clk1_bar_wr.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_141_141_clk1_bar_wr/fifo_141_141_clk1_bar_wr.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2_rxfifo.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2_rxfifo/fifo_134_134_clk2_rxfifo.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_1_1_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_1_1_clk2/fifo_1_1_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2/fifo_134_134_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk1_fifocmd.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk1_fifocmd/fifo_64_64_clk1_fifocmd.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_256_32_clk2_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_256_32_clk2_comtx/fifo_256_32_clk2_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk1_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk1_comtx/fifo_32_32_clk1_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_129_129_clk1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_129_129_clk1/fifo_129_129_clk1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64/fifo_64_64.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_4_4_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_4_4_clk1_bar_rd1/fifo_4_4_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk2/fifo_32_32_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_49_49_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_49_49_clk2/fifo_49_49_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_43_43_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_43_43_clk2/fifo_43_43_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_34_34.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_34_34/fifo_34_34.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk2_comrx.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk2_comrx/fifo_64_64_clk2_comrx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Create 'constrs_1' fileset (if not found) +if {[string equal [get_filesets -quiet constrs_1] ""]} { + create_fileset -constrset constrs_1 +} +# Set 'constrs_1' fileset object +set obj [get_filesets constrs_1] +# Add/Import constrs file and set constrs file properties +set file "[file normalize ${origin_dir}/src/pcileech_screamer_m2.xdc]" +set file_imported [import_files -fileset constrs_1 [list $file]] +set file "src/pcileech_screamer_m2.xdc" +set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]] +set_property -name "file_type" -value "XDC" -objects $file_obj + +# Set 'constrs_1' fileset properties +set obj [get_filesets constrs_1] +set_property -name "target_part" -value "xc7a35tcsg325-2" -objects $obj + +# Create 'sim_1' fileset (if not found) +if {[string equal [get_filesets -quiet sim_1] ""]} { + create_fileset -simset sim_1 +} + +# Set 'sim_1' fileset object +set obj [get_filesets sim_1] +# Empty (no sources present) + +# Set 'sim_1' fileset properties +set obj [get_filesets sim_1] +set_property -name "top" -value "pcileech_screamer_m2_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + +# Upgrade IP from the currently installed Vivado version +upgrade_ip [get_ips *] + +# Set 'utils_1' fileset object +set obj [get_filesets utils_1] +# Empty (no sources present) + +# Set 'utils_1' fileset properties +set obj [get_filesets utils_1] + +# Create 'synth_1' run (if not found) +if {[string equal [get_runs -quiet synth_1] ""]} { + create_run -name synth_1 -part xc7a35tcsg325-2 -flow {Vivado Synthesis 2022} -strategy "Vivado Synthesis Defaults" -report_strategy {No Reports} -constrset constrs_1 +} else { + set_property strategy "Vivado Synthesis Defaults" [get_runs synth_1] + set_property flow "Vivado Synthesis 2022" [get_runs synth_1] +} +set obj [get_runs synth_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Synthesis Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'synth_1_synth_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] "" ] } { + create_report_config -report_name synth_1_synth_report_utilization_0 -report_type report_utilization:1.0 -steps synth_design -runs synth_1 +} +set obj [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] +if { $obj != "" } { + +} +set obj [get_runs synth_1] +set_property -name "part" -value "xc7a35tcsg325-2" -objects $obj +set_property -name "strategy" -value "Vivado Synthesis Defaults" -objects $obj + +# set the current synth run +current_run -synthesis [get_runs synth_1] + +# Create 'impl_1' run (if not found) +if {[string equal [get_runs -quiet impl_1] ""]} { + create_run -name impl_1 -part xc7a35tcsg325-2 -flow {Vivado Implementation 2022} -strategy "Vivado Implementation Defaults" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1 +} else { + set_property strategy "Vivado Implementation Defaults" [get_runs impl_1] + set_property flow "Vivado Implementation 2022" [get_runs impl_1] +} +set obj [get_runs impl_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Implementation Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'impl_1_init_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_init_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps init_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_opt_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] "" ] } { + create_report_config -report_name impl_1_opt_report_drc_0 -report_type report_drc:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_place_report_io_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] "" ] } { + create_report_config -report_name impl_1_place_report_io_0 -report_type report_io:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] "" ] } { + create_report_config -report_name impl_1_place_report_utilization_0 -report_type report_utilization:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_control_sets_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] "" ] } { + create_report_config -report_name impl_1_place_report_control_sets_0 -report_type report_control_sets:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] +if { $obj != "" } { +set_property -name "options.verbose" -value "1" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_1' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_1 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_place_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_post_place_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_place_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_place_power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] "" ] } { + create_report_config -report_name impl_1_route_report_drc_0 -report_type report_drc:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_methodology_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] "" ] } { + create_report_config -report_name impl_1_route_report_methodology_0 -report_type report_methodology:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_power_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] "" ] } { + create_report_config -report_name impl_1_route_report_power_0 -report_type report_power:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_route_status_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] "" ] } { + create_report_config -report_name impl_1_route_report_route_status_0 -report_type report_route_status:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_route_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_route_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_clock_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] "" ] } { + create_report_config -report_name impl_1_route_report_clock_utilization_0 -report_type report_clock_utilization:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_route_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +set obj [get_runs impl_1] +set_property -name "part" -value "xc7a35tcsg325-2" -objects $obj +set_property -name "strategy" -value "Vivado Implementation Defaults" -objects $obj +set_property -name "steps.phys_opt_design.is_enabled" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.bin_file" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj +set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj + +# set the current impl run +current_run -implementation [get_runs impl_1] + +puts "INFO: Project created:${_xil_proj_name_}" +# Create 'drc_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "drc_1" ] ] ""]} { +create_dashboard_gadget -name {drc_1} -type drc +} +set obj [get_dashboard_gadgets [ list "drc_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_drc_0" -objects $obj + +# Create 'methodology_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "methodology_1" ] ] ""]} { +create_dashboard_gadget -name {methodology_1} -type methodology +} +set obj [get_dashboard_gadgets [ list "methodology_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_methodology_0" -objects $obj + +# Create 'power_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "power_1" ] ] ""]} { +create_dashboard_gadget -name {power_1} -type power +} +set obj [get_dashboard_gadgets [ list "power_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_power_0" -objects $obj + +# Create 'timing_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "timing_1" ] ] ""]} { +create_dashboard_gadget -name {timing_1} -type timing +} +set obj [get_dashboard_gadgets [ list "timing_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_timing_summary_0" -objects $obj + +# Create 'utilization_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_1" ] ] ""]} { +create_dashboard_gadget -name {utilization_1} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_1" ] ] +set_property -name "reports" -value "synth_1#synth_1_synth_report_utilization_0" -objects $obj +set_property -name "run.step" -value "synth_design" -objects $obj +set_property -name "run.type" -value "synthesis" -objects $obj + +# Create 'utilization_2' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_2" ] ] ""]} { +create_dashboard_gadget -name {utilization_2} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_2" ] ] +set_property -name "reports" -value "impl_1#impl_1_place_report_utilization_0" -objects $obj + +move_dashboard_gadget -name {utilization_1} -row 0 -col 0 +move_dashboard_gadget -name {power_1} -row 1 -col 0 +move_dashboard_gadget -name {drc_1} -row 2 -col 0 +move_dashboard_gadget -name {timing_1} -row 0 -col 1 +move_dashboard_gadget -name {utilization_2} -row 1 -col 1 +move_dashboard_gadget -name {methodology_1} -row 2 -col 1 diff --git a/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_squirrel.tcl b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_squirrel.tcl new file mode 100644 index 0000000000000000000000000000000000000000..d8f7a80173986f2fa74edb1c85c44b212ab6ed75 --- /dev/null +++ b/kilmu1337_pcileech-rtl8188ee-wifi-emul/vivado_generate_project_squirrel.tcl @@ -0,0 +1,1089 @@ +# +# Vivado generated .tcl for creating the pcileech_squirrel vivado project. +# Run from within "Vivado Tcl Shell" with command: source vivado_generate_project.tcl -notrace +# + +# Set the reference directory for source file relative paths (by default the value is script directory path) +set origin_dir "." + +# Use origin directory path location variable, if specified in the tcl shell +if { [info exists ::origin_dir_loc] } { + set origin_dir $::origin_dir_loc +} + +# Set the project name +set _xil_proj_name_ "pcileech_squirrel" + +# Use project name variable, if specified in the tcl shell +if { [info exists ::user_project_name] } { + set _xil_proj_name_ $::user_project_name +} + +variable script_file +set script_file "vivado_generate_project.tcl" + +# Help information for this script +proc print_help {} { + variable script_file + puts "\nDescription:" + puts "Recreate a Vivado project from this script. The created project will be" + puts "functionally equivalent to the original project for which this script was" + puts "generated. The script contains commands for creating a project, filesets," + puts "runs, adding/importing sources and setting properties on various objects.\n" + puts "Syntax:" + puts "$script_file" + puts "$script_file -tclargs \[--origin_dir \]" + puts "$script_file -tclargs \[--project_name \]" + puts "$script_file -tclargs \[--help\]\n" + puts "Usage:" + puts "Name Description" + puts "-------------------------------------------------------------------------" + puts "\[--origin_dir \] Determine source file paths wrt this path. Default" + puts " origin_dir path value is \".\", otherwise, the value" + puts " that was set with the \"-paths_relative_to\" switch" + puts " when this script was generated.\n" + puts "\[--project_name \] Create project with the specified name. Default" + puts " name is the name of the project from where this" + puts " script was generated.\n" + puts "\[--help\] Print help information for this script" + puts "-------------------------------------------------------------------------\n" + exit 0 +} + +if { $::argc > 0 } { + for {set i 0} {$i < $::argc} {incr i} { + set option [string trim [lindex $::argv $i]] + switch -regexp -- $option { + "--origin_dir" { incr i; set origin_dir [lindex $::argv $i] } + "--project_name" { incr i; set _xil_proj_name_ [lindex $::argv $i] } + "--help" { print_help } + default { + if { [regexp {^-} $option] } { + puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n" + return 1 + } + } + } + } +} + +# Set the directory path for the original project from where this script was exported +set orig_proj_dir "[file normalize "$origin_dir/pcileech_squirrel"]" + +# Create project +create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7a35tfgg484-2 + +# Set the directory path for the new project +set proj_dir [get_property directory [current_project]] + +# Set project properties +set obj [current_project] +set_property -name "default_lib" -value "xil_defaultlib" -objects $obj +set_property -name "enable_vhdl_2008" -value "1" -objects $obj +set_property -name "ip_cache_permissions" -value "read write" -objects $obj +set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj +set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj +set_property -name "part" -value "xc7a35tfgg484-2" -objects $obj +set_property -name "platform.description" -value "Vivado generated DSA" -objects $obj +set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj +set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj +set_property -name "simulator_language" -value "Mixed" -objects $obj +set_property -name "webtalk.activehdl_export_sim" -value "5" -objects $obj +set_property -name "webtalk.ies_export_sim" -value "5" -objects $obj +set_property -name "webtalk.modelsim_export_sim" -value "5" -objects $obj +set_property -name "webtalk.questa_export_sim" -value "5" -objects $obj +set_property -name "webtalk.riviera_export_sim" -value "5" -objects $obj +set_property -name "webtalk.vcs_export_sim" -value "5" -objects $obj +set_property -name "webtalk.xsim_export_sim" -value "5" -objects $obj +set_property -name "xpm_libraries" -value "XPM_CDC XPM_MEMORY" -objects $obj + +# Create 'sources_1' fileset (if not found) +if {[string equal [get_filesets -quiet sources_1] ""]} { + create_fileset -srcset sources_1 +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/src/pcileech_header.svh"]\ + [file normalize "${origin_dir}/src/pcileech_com.sv" ]\ + [file normalize "${origin_dir}/src/pcileech_fifo.sv"]\ + [file normalize "${origin_dir}/src/pcileech_ft601.sv"]\ + [file normalize "${origin_dir}/src/pcileech_mux.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_cfg_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_pcie_tlp_a7.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_bar_controller.sv"]\ + [file normalize "${origin_dir}/src/pcileech_tlps128_cfgspace_shadow.sv"]\ + [file normalize "${origin_dir}/src/pcileech_squirrel_top.sv"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_core_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_common.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gt_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtp_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_bram_top_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_brams_7x.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_lane.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_misc.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pcie2_top.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_clock.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_eq.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_rate.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_sync.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_user.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_pipe_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_drp.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_reset.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_qpll_wrapper.v"]\ + [file normalize "${origin_dir}/pcie_7x/pcie_7x_0_rxeq_scan.v"]\ +] +set imported_files [import_files -fileset sources_1 $files] + +# Set 'sources_1' fileset file properties for remote files +# None + +# Set 'sources_1' fileset file properties for local files +set file "src/pcileech_header.svh" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog Header" -objects $file_obj + +set file "src/pcileech_com.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_fifo.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_ft601.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_mux.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_cfg_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_pcie_tlp_a7.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_bar_controller.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_tlps128_cfgspace_shadow.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "src/pcileech_squirrel_top.sv" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "SystemVerilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_null_gen.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_rx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_axi_basic_tx_thrtl_ctl.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_core_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_common.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_rx_valid_filter_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gt_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtp_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_gtx_cpllpd_ovrd.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_bram_top_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_brams_7x.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_lane.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_misc.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_pipe_pipeline.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pcie2_top.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_clock.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_eq.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_rate.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_sync.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_user.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_drp.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_pipe_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_reset.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_qpll_wrapper.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +set file "pcie_7x/pcie_7x_0_rxeq_scan.v" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "file_type" -value "Verilog" -objects $file_obj + +# Set 'sources_1' fileset properties +set obj [get_filesets sources_1] +set_property -name "top" -value "pcileech_squirrel_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/pcileech_bar_zero4k.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace.coe" ]\ + [file normalize "${origin_dir}/ip/pcileech_cfgspace_writemask.coe" ]\ + [file normalize "${origin_dir}/ip/bram_pcie_cfgspace.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_pcie_cfgspace/bram_pcie_cfgspace.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/drom_pcie_cfgspace_writemask.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "drom_pcie_cfgspace_writemask/drom_pcie_cfgspace_writemask.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_74_74_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_74_74_clk1_bar_rd1/fifo_74_74_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/bram_bar_zero4k.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "bram_bar_zero4k/bram_bar_zero4k.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk1_bar_rdrsp.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk1_bar_rdrsp/fifo_134_134_clk1_bar_rdrsp.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_141_141_clk1_bar_wr.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_141_141_clk1_bar_wr/fifo_141_141_clk1_bar_wr.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2_rxfifo.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2_rxfifo/fifo_134_134_clk2_rxfifo.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_1_1_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_1_1_clk2/fifo_1_1_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_134_134_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_134_134_clk2/fifo_134_134_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk1_fifocmd.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk1_fifocmd/fifo_64_64_clk1_fifocmd.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_256_32_clk2_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_256_32_clk2_comtx/fifo_256_32_clk2_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk1_comtx.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk1_comtx/fifo_32_32_clk1_comtx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_129_129_clk1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_129_129_clk1/fifo_129_129_clk1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64/fifo_64_64.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_4_4_clk1_bar_rd1.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_4_4_clk1_bar_rd1/fifo_4_4_clk1_bar_rd1.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_32_32_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_32_32_clk2/fifo_32_32_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_49_49_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_49_49_clk2/fifo_49_49_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_43_43_clk2.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_43_43_clk2/fifo_43_43_clk2.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_34_34.xci"]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_34_34/fifo_34_34.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Set 'sources_1' fileset object +set obj [get_filesets sources_1] +# Import local files from the original project +set files [list \ + [file normalize "${origin_dir}/ip/fifo_64_64_clk2_comrx.xci" ]\ +] +set imported_files [import_files -fileset sources_1 $files] +# Set 'sources_1' fileset file properties for remote files +# None +# Set 'sources_1' fileset file properties for local files +set file "fifo_64_64_clk2_comrx/fifo_64_64_clk2_comrx.xci" +set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] +set_property -name "generate_files_for_reference" -value "0" -objects $file_obj +set_property -name "registered_with_manager" -value "1" -objects $file_obj +if { ![get_property "is_locked" $file_obj] } { + set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj +} + + +# Create 'constrs_1' fileset (if not found) +if {[string equal [get_filesets -quiet constrs_1] ""]} { + create_fileset -constrset constrs_1 +} +# Set 'constrs_1' fileset object +set obj [get_filesets constrs_1] +# Add/Import constrs file and set constrs file properties +set file "[file normalize ${origin_dir}/src/pcileech_squirrel.xdc]" +set file_imported [import_files -fileset constrs_1 [list $file]] +set file "src/pcileech_squirrel.xdc" +set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]] +set_property -name "file_type" -value "XDC" -objects $file_obj + +# Set 'constrs_1' fileset properties +set obj [get_filesets constrs_1] +set_property -name "target_part" -value "xc7a35tfgg484-2" -objects $obj + +# Create 'sim_1' fileset (if not found) +if {[string equal [get_filesets -quiet sim_1] ""]} { + create_fileset -simset sim_1 +} + +# Set 'sim_1' fileset object +set obj [get_filesets sim_1] +# Empty (no sources present) + +# Set 'sim_1' fileset properties +set obj [get_filesets sim_1] +set_property -name "top" -value "pcileech_squirrel_top" -objects $obj +set_property -name "top_auto_set" -value "0" -objects $obj + +# Upgrade IP from the currently installed Vivado version +upgrade_ip [get_ips *] + +# Set 'utils_1' fileset object +set obj [get_filesets utils_1] +# Empty (no sources present) + +# Set 'utils_1' fileset properties +set obj [get_filesets utils_1] + +# Create 'synth_1' run (if not found) +if {[string equal [get_runs -quiet synth_1] ""]} { + create_run -name synth_1 -part xc7a35tfgg484-2 -flow {Vivado Synthesis 2022} -strategy "Vivado Synthesis Defaults" -report_strategy {No Reports} -constrset constrs_1 +} else { + set_property strategy "Vivado Synthesis Defaults" [get_runs synth_1] + set_property flow "Vivado Synthesis 2022" [get_runs synth_1] +} +set obj [get_runs synth_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Synthesis Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'synth_1_synth_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] "" ] } { + create_report_config -report_name synth_1_synth_report_utilization_0 -report_type report_utilization:1.0 -steps synth_design -runs synth_1 +} +set obj [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] +if { $obj != "" } { + +} +set obj [get_runs synth_1] +set_property -name "part" -value "xc7a35tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Synthesis Defaults" -objects $obj + +# set the current synth run +current_run -synthesis [get_runs synth_1] + +# Create 'impl_1' run (if not found) +if {[string equal [get_runs -quiet impl_1] ""]} { + create_run -name impl_1 -part xc7a35tfgg484-2 -flow {Vivado Implementation 2022} -strategy "Vivado Implementation Defaults" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1 +} else { + set_property strategy "Vivado Implementation Defaults" [get_runs impl_1] + set_property flow "Vivado Implementation 2022" [get_runs impl_1] +} +set obj [get_runs impl_1] +set_property set_report_strategy_name 1 $obj +set_property report_strategy {Vivado Implementation Default Reports} $obj +set_property set_report_strategy_name 0 $obj +# Create 'impl_1_init_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_init_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps init_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_opt_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] "" ] } { + create_report_config -report_name impl_1_opt_report_drc_0 -report_type report_drc:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_place_report_io_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] "" ] } { + create_report_config -report_name impl_1_place_report_io_0 -report_type report_io:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] "" ] } { + create_report_config -report_name impl_1_place_report_utilization_0 -report_type report_utilization:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_place_report_control_sets_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] "" ] } { + create_report_config -report_name impl_1_place_report_control_sets_0 -report_type report_control_sets:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] +if { $obj != "" } { +set_property -name "options.verbose" -value "1" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_incremental_reuse_1' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] "" ] } { + create_report_config -report_name impl_1_place_report_incremental_reuse_1 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj + +} +# Create 'impl_1_place_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_place_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps place_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_post_place_power_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_place_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_place_power_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "is_enabled" -value "0" -objects $obj +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_drc_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] "" ] } { + create_report_config -report_name impl_1_route_report_drc_0 -report_type report_drc:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_methodology_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] "" ] } { + create_report_config -report_name impl_1_route_report_methodology_0 -report_type report_methodology:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_power_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] "" ] } { + create_report_config -report_name impl_1_route_report_power_0 -report_type report_power:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_route_status_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] "" ] } { + create_report_config -report_name impl_1_route_report_route_status_0 -report_type report_route_status:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_route_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj + +} +# Create 'impl_1_route_report_incremental_reuse_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] "" ] } { + create_report_config -report_name impl_1_route_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_clock_utilization_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] "" ] } { + create_report_config -report_name impl_1_route_report_clock_utilization_0 -report_type report_clock_utilization:1.0 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] +if { $obj != "" } { + +} +# Create 'impl_1_route_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_route_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps route_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_timing_summary_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] +if { $obj != "" } { +set_property -name "options.max_paths" -value "10" -objects $obj +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +# Create 'impl_1_post_route_phys_opt_report_bus_skew_0' report (if not found) +if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] "" ] } { + create_report_config -report_name impl_1_post_route_phys_opt_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps post_route_phys_opt_design -runs impl_1 +} +set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] +if { $obj != "" } { +set_property -name "options.warn_on_violation" -value "1" -objects $obj + +} +set obj [get_runs impl_1] +set_property -name "part" -value "xc7a35tfgg484-2" -objects $obj +set_property -name "strategy" -value "Vivado Implementation Defaults" -objects $obj +set_property -name "steps.phys_opt_design.is_enabled" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.bin_file" -value "1" -objects $obj +set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj +set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj + +# set the current impl run +current_run -implementation [get_runs impl_1] + +puts "INFO: Project created:${_xil_proj_name_}" +# Create 'drc_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "drc_1" ] ] ""]} { +create_dashboard_gadget -name {drc_1} -type drc +} +set obj [get_dashboard_gadgets [ list "drc_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_drc_0" -objects $obj + +# Create 'methodology_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "methodology_1" ] ] ""]} { +create_dashboard_gadget -name {methodology_1} -type methodology +} +set obj [get_dashboard_gadgets [ list "methodology_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_methodology_0" -objects $obj + +# Create 'power_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "power_1" ] ] ""]} { +create_dashboard_gadget -name {power_1} -type power +} +set obj [get_dashboard_gadgets [ list "power_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_power_0" -objects $obj + +# Create 'timing_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "timing_1" ] ] ""]} { +create_dashboard_gadget -name {timing_1} -type timing +} +set obj [get_dashboard_gadgets [ list "timing_1" ] ] +set_property -name "reports" -value "impl_1#impl_1_route_report_timing_summary_0" -objects $obj + +# Create 'utilization_1' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_1" ] ] ""]} { +create_dashboard_gadget -name {utilization_1} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_1" ] ] +set_property -name "reports" -value "synth_1#synth_1_synth_report_utilization_0" -objects $obj +set_property -name "run.step" -value "synth_design" -objects $obj +set_property -name "run.type" -value "synthesis" -objects $obj + +# Create 'utilization_2' gadget (if not found) +if {[string equal [get_dashboard_gadgets [ list "utilization_2" ] ] ""]} { +create_dashboard_gadget -name {utilization_2} -type utilization +} +set obj [get_dashboard_gadgets [ list "utilization_2" ] ] +set_property -name "reports" -value "impl_1#impl_1_place_report_utilization_0" -objects $obj + +move_dashboard_gadget -name {utilization_1} -row 0 -col 0 +move_dashboard_gadget -name {power_1} -row 1 -col 0 +move_dashboard_gadget -name {drc_1} -row 2 -col 0 +move_dashboard_gadget -name {timing_1} -row 0 -col 1 +move_dashboard_gadget -name {utilization_2} -row 1 -col 1 +move_dashboard_gadget -name {methodology_1} -row 2 -col 1