verilog_data-2 / The-OpenROAD-Project_OpenROAD-flow-scripts /flow /platforms /nangate45 /cells_clkgate.v
| module OPENROAD_CLKGATE (CK, E, GCK); | |
| input CK; | |
| input E; | |
| output GCK; | |
| CLKGATE_X1 latch (.CK (CK), .E(E), .GCK(GCK)); | |
| assign GCK = CK; | |
| endmodule |