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198fb2a | 1 2 3 4 5 6 7 8 9 10 11 | utl::set_metrics_stage "finish__{}"
source $::env(SCRIPTS_DIR)/load.tcl
erase_non_stage_variables final
load_design 6_1_fill.odb 6_1_fill.sdc
source_step_tcl PRE FINAL_REPORT
set_propagated_clock [all_clocks]
# Ensure all OR created (rsz/cts) instances are connected
global_connect
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