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Datasets:
SAIFIINDUSTRIES
/
verilog_data-1

Dataset card Files Files and versions
xet
Community
verilog_data-1 / Juniper_open-register-design-tool /test /basic_tests
23.2 MB
  • 1 contributor
History: 1 commit
SAIFIINDUSTRIES's picture
SAIFIINDUSTRIES
Add Batch 5 with 10 repos
04fce28 verified 8 days ago
  • js_basic_01
    Add Batch 5 with 10 repos 8 days ago
  • rdl_basic_01
    Add Batch 5 with 10 repos 8 days ago
  • rdl_c_header
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  • rdl_fieldstruct
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  • rdl_hello
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  • rdl_hier_01
    Add Batch 5 with 10 repos 8 days ago
  • rdl_hier_02
    Add Batch 5 with 10 repos 8 days ago
  • rdl_hwload
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  • rdl_intr_01
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  • rdl_iwrap
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  • rdl_sec_if
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  • rdl_uvmmem_default
    Add Batch 5 with 10 repos 8 days ago
  • rdl_uvmmem_lite
    Add Batch 5 with 10 repos 8 days ago
  • rdl_uvmmem_mimic
    Add Batch 5 with 10 repos 8 days ago
  • rdl_uvmmem_nums
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  • rdl_write_enable
    Add Batch 5 with 10 repos 8 days ago