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verilog_data-1 / ZipCPU_zipcpu /sim

1.04 MB

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Add batch 2 (alexforencich_verilog-pcie, ZipCPU_zipcpu, XUANTIE-RV_openc910, aolofsson_oh, VerticalResearchGroup_miaow)

f007921 verified 8 days ago

cpp
Add batch 2 (alexforencich_verilog-pcie, ZipCPU_zipcpu, XUANTIE-RV_openc910, aolofsson_oh, VerticalResearchGroup_miaow) 8 days ago
rtl
Add batch 2 (alexforencich_verilog-pcie, ZipCPU_zipcpu, XUANTIE-RV_openc910, aolofsson_oh, VerticalResearchGroup_miaow) 8 days ago
verilator
Add batch 2 (alexforencich_verilog-pcie, ZipCPU_zipcpu, XUANTIE-RV_openc910, aolofsson_oh, VerticalResearchGroup_miaow) 8 days ago
zipsw
Add batch 2 (alexforencich_verilog-pcie, ZipCPU_zipcpu, XUANTIE-RV_openc910, aolofsson_oh, VerticalResearchGroup_miaow) 8 days ago
.gitignore

664 Bytes
Add batch 2 (alexforencich_verilog-pcie, ZipCPU_zipcpu, XUANTIE-RV_openc910, aolofsson_oh, VerticalResearchGroup_miaow) 8 days ago
Makefile

1.65 kB
Add batch 2 (alexforencich_verilog-pcie, ZipCPU_zipcpu, XUANTIE-RV_openc910, aolofsson_oh, VerticalResearchGroup_miaow) 8 days ago
sim_run.pl

18.2 kB
Add batch 2 (alexforencich_verilog-pcie, ZipCPU_zipcpu, XUANTIE-RV_openc910, aolofsson_oh, VerticalResearchGroup_miaow) 8 days ago
sim_testcases.txt

11.9 kB
Add batch 2 (alexforencich_verilog-pcie, ZipCPU_zipcpu, XUANTIE-RV_openc910, aolofsson_oh, VerticalResearchGroup_miaow) 8 days ago
zip-sim.exp

1.61 kB
Add batch 2 (alexforencich_verilog-pcie, ZipCPU_zipcpu, XUANTIE-RV_openc910, aolofsson_oh, VerticalResearchGroup_miaow) 8 days ago