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Datasets:
SAIFIINDUSTRIES
/
verilog_data-1
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Dataset card
Files
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xet
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27be9c5
verilog_data-1
/
WangXuan95_FPGA-UART
/
RTL
43.7 kB
1 contributor
History:
1 commit
SAIFIINDUSTRIES
Add batch 12 (WangXuan95_FPGA-UART, chipsalliance_VeeRwolf, bluespec_Piccolo, 16SalomonArs_Pcileech-DMA-NVMe-VMD, marmolejo_zet)
c22be57
verified
6 days ago
uart2axi4.v
Safe
10.8 kB
Add batch 12 (WangXuan95_FPGA-UART, chipsalliance_VeeRwolf, bluespec_Piccolo, 16SalomonArs_Pcileech-DMA-NVMe-VMD, marmolejo_zet)
6 days ago
uart_rx.v
Safe
16.1 kB
Add batch 12 (WangXuan95_FPGA-UART, chipsalliance_VeeRwolf, bluespec_Piccolo, 16SalomonArs_Pcileech-DMA-NVMe-VMD, marmolejo_zet)
6 days ago
uart_tx.v
Safe
16.8 kB
Add batch 12 (WangXuan95_FPGA-UART, chipsalliance_VeeRwolf, bluespec_Piccolo, 16SalomonArs_Pcileech-DMA-NVMe-VMD, marmolejo_zet)
6 days ago
