## Supported Instructions in This CPU Project

| Instruction | OP Type |
| ----------- | ------- | 
| LUI         | LUI     |
| AUIPC       | AUIPC   |
| JAL         | JAL     |
| JALR        | JALR    |
| BEQ         | BRANCH  |
| BNE         | BRANCH  |
| BLT         | BRANCH  |
| BGE         | BRANCH  |
| BLTU        | BRANCH  |
| BGEU        | BRANCH  |
| LB          | LOAD    |
| LH          | LOAD    |
| LW          | LOAD    |
| LBU         | LOAD    |
| LHU         | LOAD    |
| SB          | STORE   |
| SH          | STORE   |
| SW          | STORE   |
| ADDI        | OP-IMM  |
| SLTI        | OP-IMM  |
| SLTIU       | OP-IMM  |
| XORI        | OP-IMM  |
| ORI         | OP-IMM  |
| ANDI        | OP-IMM  |
| SLLI        | OP-IMM  |
| SRLI        | OP-IMM  |
| SRAI        | OP-IMM  |
| ADD         | OP      |
| SUB         | OP      |
| SLL         | OP      |
| SLT         | OP      |
| SLTU        | OP      |
| XOR         | OP      |
| SRL         | OP      |
| SRA         | OP      |
| OR          | OP      |
| AND         | OP      |