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verilog_data-1

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verilog_data-1 / The-OpenROAD-Project_OpenSTA /.github /workflows /github-actions-are-differences-found.yml

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Add batch 2 (danielholanda_LeFlow, The-OpenROAD-Project_OpenSTA, omarelhedaby_CNN-FPGA, QShen3_CNN-FPGA, openrisc_mor1kx)

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verified

SAIFIINDUSTRIES commited on 8 days ago