diff --git "a/LeiWang1999_ZYNQ-NVDLA/IP/component.xml" "b/LeiWang1999_ZYNQ-NVDLA/IP/component.xml" new file mode 100644--- /dev/null +++ "b/LeiWang1999_ZYNQ-NVDLA/IP/component.xml" @@ -0,0 +1,4086 @@ + + + xilinx.com + user + NV_nvdla_wrapper + 1.0 + + + m_axi + + + + + + + + + AWID + + + nvdla_core2dbb_aw_awid + + + + + AWADDR + + + nvdla_core2dbb_aw_awaddr + + + + + AWLEN + + + nvdla_core2dbb_aw_awlen + + + + + AWSIZE + + + nvdla_core2dbb_aw_awsize + + + + + AWBURST + + + m_axi_awburst + + + + + AWLOCK + + + m_axi_awlock + + + + + AWCACHE + + + m_axi_awcache + + + + + AWPROT + + + m_axi_awprot + + + + + AWQOS + + + m_axi_awqos + + + + + AWUSER + + + m_axi_awuser + + + + + AWVALID + + + nvdla_core2dbb_aw_awvalid + + + + + AWREADY + + + nvdla_core2dbb_aw_awready + + + + + WDATA + + + nvdla_core2dbb_w_wdata + + + + + WSTRB + + + nvdla_core2dbb_w_wstrb + + + + + WLAST + + + nvdla_core2dbb_w_wlast + + + + + WUSER + + + m_axi_wuser + + + + + WVALID + + + nvdla_core2dbb_w_wvalid + + + + + WREADY + + + nvdla_core2dbb_w_wready + + + + + BID + + + nvdla_core2dbb_b_bid + + + + + BRESP + + + m_axi_bresp + + + + + BUSER + + + m_axi_buser + + + + + BVALID + + + nvdla_core2dbb_b_bvalid + + + + + BREADY + + + nvdla_core2dbb_b_bready + + + + + ARID + + + nvdla_core2dbb_ar_arid + + + + + ARADDR + + + nvdla_core2dbb_ar_araddr + + + + + ARLEN + + + nvdla_core2dbb_ar_arlen + + + + + ARSIZE + + + nvdla_core2dbb_ar_arsize + + + + + ARBURST + + + m_axi_arburst + + + + + ARLOCK + + + m_axi_arlock + + + + + ARCACHE + + + m_axi_arcache + + + + + ARPROT + + + m_axi_arprot + + + + + ARQOS + + + m_axi_arqos + + + + + ARUSER + + + m_axi_aruser + + + + + ARVALID + + + nvdla_core2dbb_ar_arvalid + + + + + ARREADY + + + nvdla_core2dbb_ar_arready + + + + + RID + + + nvdla_core2dbb_r_rid + + + + + RDATA + + + nvdla_core2dbb_r_rdata + + + + + RRESP + + + m_axi_rresp + + + + + RLAST + + + nvdla_core2dbb_r_rlast + + + + + RUSER + + + m_axi_ruser + + + + + RVALID + + + nvdla_core2dbb_r_rvalid + + + + + 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