Add batch 1 (YosysHQ_picorv32, alexforencich_verilog-ethernet, The-OpenROAD-Project_OpenROAD, darklife_darkriscv, corundum_corundum)
f61bac1 verified | // SPDX-License-Identifier: BSD-3-Clause | |
| // Copyright (c) 2024-2025, The OpenROAD Authors | |
| map(in,numinputs=0) ord::Design* design { | |
| = static_cast<ord::Design*>(Tcl_GetAssocData(interp, "design", nullptr)); | |
| } | |