File size: 3,332 Bytes
b90fdbb | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 | // This program demonstrates how to resize a design of six NAND2 cells
// and reports timing/power/area values using OpenTimer C++ API.
//
// Design : sizer.v
// SDC : sizer.sdc
// SPEF : sizer.spef
// Library: NangateOpenCellLibrary
#include <ot/timer/timer.hpp>
int main(int argc, char* argv[]) {
ot::Timer timer;
// Builder
// - read cell library for both early/late mode (nullopt)
// - read the verilog
// - read the parasitics
// - read the design constraints
timer.read_celllib("NangateOpenCellLibrary_typical.lib", std::nullopt)
.read_verilog("sizer.v")
.read_spef ("sizer.spef")
.read_sdc ("sizer.sdc");
// Report the timing/power/area
std::optional<float> tns = timer.report_tns();
std::optional<float> wns = timer.report_wns();
std::optional<float> area = timer.report_area();
std::optional<float> lkp = timer.report_leakage_power();
std::cout << "\nBefore sizing\n"
<< "TNS : " << *tns << '\n'
<< "WNS : " << *wns << '\n'
<< "AREA : " << *area << '\n'
<< "LEAKAGE_POWER: " << *lkp << '\n';
// Downsize all gates from X2 to X1
timer.repower_gate("inst_0", "NAND2_X1")
.repower_gate("inst_1", "NAND2_X1")
.repower_gate("inst_2", "NAND2_X1")
.repower_gate("inst_3", "NAND2_X1")
.repower_gate("inst_4", "NAND2_X1")
.repower_gate("inst_5", "NAND2_X1");
tns = timer.report_tns();
wns = timer.report_wns();
area = timer.report_area();
lkp = timer.report_leakage_power();
std::cout << "\nDownsize all to NAND2_X1\n"
<< "TNS : " << *tns << '\n'
<< "WNS : " << *wns << '\n'
<< "AREA : " << *area << '\n'
<< "LEAKAGE_POWER: " << *lkp << '\n';
// Upsize all gates from X1 to X4
timer.repower_gate("inst_0", "NAND2_X4")
.repower_gate("inst_1", "NAND2_X4")
.repower_gate("inst_2", "NAND2_X4")
.repower_gate("inst_3", "NAND2_X4")
.repower_gate("inst_4", "NAND2_X4")
.repower_gate("inst_5", "NAND2_X4");
tns = timer.report_tns();
wns = timer.report_wns();
area = timer.report_area();
lkp = timer.report_leakage_power();
std::cout << "\nUpsize all to NAND2_X4\n"
<< "TNS : " << *tns << '\n'
<< "WNS : " << *wns << '\n'
<< "AREA : " << *area << '\n'
<< "LEAKAGE_POWER: " << *lkp << '\n';
// Output the top-3 critical paths
auto paths = timer.report_timing(3);
// report the critical paths
std::cout << "# critical paths: " << paths.size() << '\n';
for(size_t i=0; i<paths.size(); ++i) {
std::cout << "Path : " << i+1 << '\n'
<< "Slack: " << paths[i].slack << '\n'
<< "Split: " << (paths[i].endpoint->split() == ot::MIN ? "MIN" : "MAX") << '\n';
for(const auto& point : paths[i]) {
std::cout << " "
<< point.pin.name() << ' '
<< (point.transition == ot::RISE ? 'R' : 'F') << ' '
<< point.at;
if(auto gate = point.pin.gate()) {
std::cout << " (" << gate->name() << ' ' << gate->cell_name() << ')';
}
std::cout << '\n';
}
std::cout << '\n';
}
return 0;
}
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