# rvc_sample_csr - this is not a name we should use for the specific csr read of 0xb00 and 0xb02

- Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/489

Acording to the spec - done we have a "correct" name for the mcycle and instret?
Please revisit this and fix the name, the way we use it, where we use it, etc..
![image](https://github.com/FPGA-MAFIA/fpga_mafia/assets/81047407/36f4c59b-f1e9-4a53-904f-caf5ba0009d5)

PR Title: refactor lfsr read condition and address of time and instret csr's

Description: No description provided.

Commits:
1. "refactor CSR address from machine to user mode"
2. "refactor - lfsr read condition"
3. Merge branch 'main' into core_rrv

Linked Issue: #489 - "rvc_sample_csr - this is not a name we should use for the specific csr read of 0xb00 and 0xb02"

Comments:
amichai-bd (Reviewer): "Still this function name makes no sense to me.. 'rvc_sample_csr' -> what is this function actually do? I feel like I'm missing something here"

roman012285 (Author): "we read the clycle and instret in alive_ipc test and calculates ipc"

Status: Merged by roman012285 on Feb 20, 2024