# change csr names and design to fit the spec

- Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/421

make changes both to core_rrv and rv32i_ref

PR Title: add cycle and instret User mode csr's
PR Number: #428
Status: Merged
Author: roman012285
Merge Details: Merged on January 14, 2024, from branch core_rrv into main

Description:
No description was provided by the contributor.

Comments:
roman012285 (Collaborator) - January 14, 2024:
No substantive comment; the PR was opened without explanation.

Linked Issue:
Issue #421: "change csr names and design to fit the spec"
This pull request was flagged as potentially closing this issue.

Metadata:
- Commits: 2 commits
- Milestone: MAFIA 0.1 (later modified to include MAFIA 1.0)
- Participants: roman012285, amichai-bd
- Reviews: None documented
- Assignees: None